We need the serial/tty fixes in here as well.
Unified · Split
| @@ -143,6 +143,9 @@ x509.genkey · 142 unmodified lines | |||
| 143 | /allrandom.config | 143 | /allrandom.config |
| 144 | /allyes.config | 144 | /allyes.config |
| 145 | 145 | ||
| 146 | # Kconfig savedefconfig output | ||
| 147 | /defconfig | ||
| 148 | |||
| 146 | # Kdevelop4 | 149 | # Kdevelop4 |
| 147 | *.kdev4 | 150 | *.kdev4 |
| 148 | 151 | ||
| @@ -90,11 +90,16 @@ Frank Rowand <frowand.list@gmail.com> <frank.rowand@sonymobile.com> · 89 unmodified lines | |||
| 90 | Frank Zago <fzago@systemfabricworks.com> | 90 | Frank Zago <fzago@systemfabricworks.com> |
| 91 | Gao Xiang <xiang@kernel.org> <gaoxiang25@huawei.com> | 91 | Gao Xiang <xiang@kernel.org> <gaoxiang25@huawei.com> |
| 92 | Gao Xiang <xiang@kernel.org> <hsiangkao@aol.com> | 92 | Gao Xiang <xiang@kernel.org> <hsiangkao@aol.com> |
| 93 | Gerald Schaefer <gerald.schaefer@linux.ibm.com> <gerald.schaefer@de.ibm.com> | ||
| 94 | Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@de.ibm.com> | ||
| 95 | Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@linux.vnet.ibm.com> | ||
| 93 | Greg Kroah-Hartman <greg@echidna.(none)> | 96 | Greg Kroah-Hartman <greg@echidna.(none)> |
| 94 | Greg Kroah-Hartman <gregkh@suse.de> | 97 | Greg Kroah-Hartman <gregkh@suse.de> |
| 95 | Greg Kroah-Hartman <greg@kroah.com> | 98 | Greg Kroah-Hartman <greg@kroah.com> |
| 96 | Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com> | 99 | Gregory CLEMENT <gregory.clement@bootlin.com> <gregory.clement@free-electrons.com> |
| 97 | Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org> | 100 | Hanjun Guo <guohanjun@huawei.com> <hanjun.guo@linaro.org> |
| 101 | Heiko Carstens <hca@linux.ibm.com> <h.carstens@de.ibm.com> | ||
| 102 | Heiko Carstens <hca@linux.ibm.com> <heiko.carstens@de.ibm.com> | ||
| 98 | Henk Vergonet <Henk.Vergonet@gmail.com> | 103 | Henk Vergonet <Henk.Vergonet@gmail.com> |
| 99 | Henrik Kretzschmar <henne@nachtwindheim.de> | 104 | Henrik Kretzschmar <henne@nachtwindheim.de> |
| 100 | Henrik Rydberg <rydberg@bitmath.org> | 105 | Henrik Rydberg <rydberg@bitmath.org> |
| @@ -56,11 +56,6 @@ Description: The /dev/kmsg character device node provides userspace access · 55 unmodified lines | |||
| 56 | seek after the last record available at the time | 56 | seek after the last record available at the time |
| 57 | the last SYSLOG_ACTION_CLEAR was issued. | 57 | the last SYSLOG_ACTION_CLEAR was issued. |
| 58 | 58 | ||
| 59 | Due to the record nature of this interface with a "read all" | ||
| 60 | behavior and the specific positions each seek operation sets, | ||
| 61 | SEEK_CUR is not supported, returning -ESPIPE (invalid seek) to | ||
| 62 | errno whenever requested. | ||
| 63 | |||
| 64 | The output format consists of a prefix carrying the syslog | 59 | The output format consists of a prefix carrying the syslog |
| 65 | prefix including priority and facility, the 64 bit message | 60 | prefix including priority and facility, the 64 bit message |
| 66 | sequence number and the monotonic timestamp in microseconds, | 61 | sequence number and the monotonic timestamp in microseconds, |
| @@ -1,6 +1,6 @@ | |||
| 1 | What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_req | 1 | What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_req |
| 2 | Date: Feb 2014 | 2 | Date: Feb 2014 |
| 3 | Contact: Li Jun <b47624@freescale.com> | 3 | Contact: Li Jun <jun.li@nxp.com> |
| 4 | Description: | 4 | Description: |
| 5 | Can be set and read. | 5 | Can be set and read. |
| 6 | Set a_bus_req(A-device bus request) input to be 1 if | 6 | Set a_bus_req(A-device bus request) input to be 1 if |
| @@ -17,7 +17,7 @@ Description: · 10 unmodified lines | |||
| 17 | 17 | ||
| 18 | What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_drop | 18 | What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_drop |
| 19 | Date: Feb 2014 | 19 | Date: Feb 2014 |
| 20 | Contact: Li Jun <b47624@freescale.com> | 20 | Contact: Li Jun <jun.li@nxp.com> |
| 21 | Description: | 21 | Description: |
| 22 | Can be set and read | 22 | Can be set and read |
| 23 | The a_bus_drop(A-device bus drop) input is 1 when the | 23 | The a_bus_drop(A-device bus drop) input is 1 when the |
| @@ -32,7 +32,7 @@ Description: · 8 unmodified lines | |||
| 32 | 32 | ||
| 33 | What: /sys/bus/platform/devices/ci_hdrc.0/inputs/b_bus_req | 33 | What: /sys/bus/platform/devices/ci_hdrc.0/inputs/b_bus_req |
| 34 | Date: Feb 2014 | 34 | Date: Feb 2014 |
| 35 | Contact: Li Jun <b47624@freescale.com> | 35 | Contact: Li Jun <jun.li@nxp.com> |
| 36 | Description: | 36 | Description: |
| 37 | Can be set and read. | 37 | Can be set and read. |
| 38 | The b_bus_req(B-device bus request) input is 1 during the time | 38 | The b_bus_req(B-device bus request) input is 1 during the time |
| @@ -47,7 +47,7 @@ Description: · 8 unmodified lines | |||
| 47 | 47 | ||
| 48 | What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_clr_err | 48 | What: /sys/bus/platform/devices/ci_hdrc.0/inputs/a_clr_err |
| 49 | Date: Feb 2014 | 49 | Date: Feb 2014 |
| 50 | Contact: Li Jun <b47624@freescale.com> | 50 | Contact: Li Jun <jun.li@nxp.com> |
| 51 | Description: | 51 | Description: |
| 52 | Only can be set. | 52 | Only can be set. |
| 53 | The a_clr_err(A-device Vbus error clear) input is used to clear | 53 | The a_clr_err(A-device Vbus error clear) input is used to clear |
| @@ -258,7 +258,7 @@ Configuring the kernel · 257 unmodified lines | |||
| 258 | Compiling the kernel | 258 | Compiling the kernel |
| 259 | -------------------- | 259 | -------------------- |
| 260 | 260 | ||
| 261 | - Make sure you have at least gcc 4.6 available. | 261 | - Make sure you have at least gcc 4.9 available. |
| 262 | For more information, refer to :ref:`Documentation/process/changes.rst <changes>`. | 262 | For more information, refer to :ref:`Documentation/process/changes.rst <changes>`. |
| 263 | 263 | ||
| 264 | Please note that you can still run a.out user programs with this kernel. | 264 | Please note that you can still run a.out user programs with this kernel. |
| @@ -1356,8 +1356,8 @@ PAGE_SIZE multiple when read back. · 1355 unmodified lines | |||
| 1356 | 1356 | ||
| 1357 | thp_fault_alloc | 1357 | thp_fault_alloc |
| 1358 | Number of transparent hugepages which were allocated to satisfy | 1358 | Number of transparent hugepages which were allocated to satisfy |
| 1359 | a page fault, including COW faults. This counter is not present | 1359 | a page fault. This counter is not present when CONFIG_TRANSPARENT_HUGEPAGE |
| 1360 | when CONFIG_TRANSPARENT_HUGEPAGE is not set. | 1360 | is not set. |
| 1361 | 1361 | ||
| 1362 | thp_collapse_alloc | 1362 | thp_collapse_alloc |
| 1363 | Number of transparent hugepages which were allocated to allow | 1363 | Number of transparent hugepages which were allocated to allow |
| @@ -11,6 +11,7 @@ Device Mapper · 10 unmodified lines | |||
| 11 | dm-clone | 11 | dm-clone |
| 12 | dm-crypt | 12 | dm-crypt |
| 13 | dm-dust | 13 | dm-dust |
| 14 | dm-ebs | ||
| 14 | dm-flakey | 15 | dm-flakey |
| 15 | dm-init | 16 | dm-init |
| 16 | dm-integrity | 17 | dm-integrity |
| @@ -305,8 +305,7 @@ monitor how successfully the system is providing huge pages for use. · 304 unmodified lines | |||
| 305 | 305 | ||
| 306 | thp_fault_alloc | 306 | thp_fault_alloc |
| 307 | is incremented every time a huge page is successfully | 307 | is incremented every time a huge page is successfully |
| 308 | allocated to handle a page fault. This applies to both the | 308 | allocated to handle a page fault. |
| 309 | first time a page is faulted and for COW faults. | ||
| 310 | 309 | ||
| 311 | thp_collapse_alloc | 310 | thp_collapse_alloc |
| 312 | is incremented by khugepaged when it has found | 311 | is incremented by khugepaged when it has found |
| @@ -171,6 +171,7 @@ infrastructure: · 170 unmodified lines | |||
| 171 | 171 | ||
| 172 | 172 | ||
| 173 | 3) ID_AA64PFR1_EL1 - Processor Feature Register 1 | 173 | 3) ID_AA64PFR1_EL1 - Processor Feature Register 1 |
| 174 | |||
| 174 | +------------------------------+---------+---------+ | 175 | +------------------------------+---------+---------+ |
| 175 | | Name | bits | visible | | 176 | | Name | bits | visible | |
| 176 | +------------------------------+---------+---------+ | 177 | +------------------------------+---------+---------+ |
| @@ -181,6 +182,7 @@ infrastructure: · 4 unmodified lines | |||
| 181 | 182 | ||
| 182 | 183 | ||
| 183 | 4) MIDR_EL1 - Main ID Register | 184 | 4) MIDR_EL1 - Main ID Register |
| 185 | |||
| 184 | +------------------------------+---------+---------+ | 186 | +------------------------------+---------+---------+ |
| 185 | | Name | bits | visible | | 187 | | Name | bits | visible | |
| 186 | +------------------------------+---------+---------+ | 188 | +------------------------------+---------+---------+ |
| @@ -147,6 +147,14 @@ stable kernels. · 146 unmodified lines | |||
| 147 | +----------------+-----------------+-----------------+-----------------------------+ | 147 | +----------------+-----------------+-----------------+-----------------------------+ |
| 148 | | Qualcomm Tech. | Falkor v{1,2} | E1041 | QCOM_FALKOR_ERRATUM_1041 | | 148 | | Qualcomm Tech. | Falkor v{1,2} | E1041 | QCOM_FALKOR_ERRATUM_1041 | |
| 149 | +----------------+-----------------+-----------------+-----------------------------+ | 149 | +----------------+-----------------+-----------------+-----------------------------+ |
| 150 | | Qualcomm Tech. | Kryo4xx Gold | N/A | ARM64_ERRATUM_1463225 | | ||
| 151 | +----------------+-----------------+-----------------+-----------------------------+ | ||
| 152 | | Qualcomm Tech. | Kryo4xx Gold | N/A | ARM64_ERRATUM_1418040 | | ||
| 153 | +----------------+-----------------+-----------------+-----------------------------+ | ||
| 154 | | Qualcomm Tech. | Kryo4xx Silver | N/A | ARM64_ERRATUM_1530923 | | ||
| 155 | +----------------+-----------------+-----------------+-----------------------------+ | ||
| 156 | | Qualcomm Tech. | Kryo4xx Silver | N/A | ARM64_ERRATUM_1024718 | | ||
| 157 | +----------------+-----------------+-----------------+-----------------------------+ | ||
| 150 | +----------------+-----------------+-----------------+-----------------------------+ | 158 | +----------------+-----------------+-----------------+-----------------------------+ |
| 151 | | Fujitsu | A64FX | E#010001 | FUJITSU_ERRATUM_010001 | | 159 | | Fujitsu | A64FX | E#010001 | FUJITSU_ERRATUM_010001 | |
| 152 | +----------------+-----------------+-----------------+-----------------------------+ | 160 | +----------------+-----------------+-----------------+-----------------------------+ |
| @@ -492,13 +492,6 @@ set max_budget to higher values than those to which BFQ would have set · 491 unmodified lines | |||
| 492 | it with auto-tuning. An alternative way to achieve this goal is to | 492 | it with auto-tuning. An alternative way to achieve this goal is to |
| 493 | just increase the value of timeout_sync, leaving max_budget equal to 0. | 493 | just increase the value of timeout_sync, leaving max_budget equal to 0. |
| 494 | 494 | ||
| 495 | weights | ||
| 496 | ------- | ||
| 497 | |||
| 498 | Read-only parameter, used to show the weights of the currently active | ||
| 499 | BFQ queues. | ||
| 500 | |||
| 501 | |||
| 502 | 4. Group scheduling with BFQ | 495 | 4. Group scheduling with BFQ |
| 503 | ============================ | 496 | ============================ |
| 504 | 497 | ||
| @@ -566,7 +559,7 @@ Parameters to set · 61 unmodified lines | |||
| 566 | For each group, there is only the following parameter to set. | 559 | For each group, there is only the following parameter to set. |
| 567 | 560 | ||
| 568 | weight (namely blkio.bfq.weight or io.bfq-weight): the weight of the | 561 | weight (namely blkio.bfq.weight or io.bfq-weight): the weight of the |
| 569 | group inside its parent. Available values: 1..10000 (default 100). The | 562 | group inside its parent. Available values: 1..1000 (default 100). The |
| 570 | linear mapping between ioprio and weights, described at the beginning | 563 | linear mapping between ioprio and weights, described at the beginning |
| 571 | of the tunable section, is still valid, but all weights higher than | 564 | of the tunable section, is still valid, but all weights higher than |
| 572 | IOPRIO_BE_NR*10 are mapped to ioprio 0. | 565 | IOPRIO_BE_NR*10 are mapped to ioprio 0. |
| @@ -86,6 +86,20 @@ then the next program in the chain (A) will see those changes, · 85 unmodified lines | |||
| 86 | *not* the original input ``setsockopt`` arguments. The potentially | 86 | *not* the original input ``setsockopt`` arguments. The potentially |
| 87 | modified values will be then passed down to the kernel. | 87 | modified values will be then passed down to the kernel. |
| 88 | 88 | ||
| 89 | Large optval | ||
| 90 | ============ | ||
| 91 | When the ``optval`` is greater than the ``PAGE_SIZE``, the BPF program | ||
| 92 | can access only the first ``PAGE_SIZE`` of that data. So it has to options: | ||
| 93 | |||
| 94 | * Set ``optlen`` to zero, which indicates that the kernel should | ||
| 95 | use the original buffer from the userspace. Any modifications | ||
| 96 | done by the BPF program to the ``optval`` are ignored. | ||
| 97 | * Set ``optlen`` to the value less than ``PAGE_SIZE``, which | ||
| 98 | indicates that the kernel should use BPF's trimmed ``optval``. | ||
| 99 | |||
| 100 | When the BPF program returns with the ``optlen`` greater than | ||
| 101 | ``PAGE_SIZE``, the userspace will receive ``EFAULT`` errno. | ||
| 102 | |||
| 89 | Example | 103 | Example |
| 90 | ======= | 104 | ======= |
| 91 | 105 | ||
| @@ -204,6 +204,14 @@ Returns the maximum size of a mapping for the device. The size parameter · 203 unmodified lines | |||
| 204 | of the mapping functions like dma_map_single(), dma_map_page() and | 204 | of the mapping functions like dma_map_single(), dma_map_page() and |
| 205 | others should not be larger than the returned value. | 205 | others should not be larger than the returned value. |
| 206 | 206 | ||
| 207 | :: | ||
| 208 | |||
| 209 | bool | ||
| 210 | dma_need_sync(struct device *dev, dma_addr_t dma_addr); | ||
| 211 | |||
| 212 | Returns %true if dma_sync_single_for_{device,cpu} calls are required to | ||
| 213 | transfer memory ownership. Returns %false if those calls can be skipped. | ||
| 214 | |||
| 207 | :: | 215 | :: |
| 208 | 216 | ||
| 209 | unsigned long | 217 | unsigned long |
| @@ -33,7 +33,7 @@ all combinations of get*(), pin*(), FOLL_LONGTERM, and more. Also, the · 32 unmodified lines | |||
| 33 | pin_user_pages*() APIs are clearly distinct from the get_user_pages*() APIs, so | 33 | pin_user_pages*() APIs are clearly distinct from the get_user_pages*() APIs, so |
| 34 | that's a natural dividing line, and a good point to make separate wrapper calls. | 34 | that's a natural dividing line, and a good point to make separate wrapper calls. |
| 35 | In other words, use pin_user_pages*() for DMA-pinned pages, and | 35 | In other words, use pin_user_pages*() for DMA-pinned pages, and |
| 36 | get_user_pages*() for other cases. There are four cases described later on in | 36 | get_user_pages*() for other cases. There are five cases described later on in |
| 37 | this document, to further clarify that concept. | 37 | this document, to further clarify that concept. |
| 38 | 38 | ||
| 39 | FOLL_PIN and FOLL_GET are mutually exclusive for a given gup call. However, | 39 | FOLL_PIN and FOLL_GET are mutually exclusive for a given gup call. However, |
| @@ -114,12 +114,6 @@ the below options are available: · 113 unmodified lines | |||
| 114 | To dynamically limit for which functions to generate reports, see the | 114 | To dynamically limit for which functions to generate reports, see the |
| 115 | `DebugFS interface`_ blacklist/whitelist feature. | 115 | `DebugFS interface`_ blacklist/whitelist feature. |
| 116 | 116 | ||
| 117 | For ``__always_inline`` functions, replace ``__always_inline`` with | ||
| 118 | ``__no_kcsan_or_inline`` (which implies ``__always_inline``):: | ||
| 119 | |||
| 120 | static __no_kcsan_or_inline void foo(void) { | ||
| 121 | ... | ||
| 122 | |||
| 123 | * To disable data race detection for a particular compilation unit, add to the | 117 | * To disable data race detection for a particular compilation unit, add to the |
| 124 | ``Makefile``:: | 118 | ``Makefile``:: |
| 125 | 119 | ||
| @@ -61,3 +61,43 @@ test, or an end-to-end test. · 60 unmodified lines | |||
| 61 | kernel by installing a production configuration of the kernel on production | 61 | kernel by installing a production configuration of the kernel on production |
| 62 | hardware with a production userspace and then trying to exercise some behavior | 62 | hardware with a production userspace and then trying to exercise some behavior |
| 63 | that depends on interactions between the hardware, the kernel, and userspace. | 63 | that depends on interactions between the hardware, the kernel, and userspace. |
| 64 | |||
| 65 | KUnit isn't working, what should I do? | ||
| 66 | ====================================== | ||
| 67 | |||
| 68 | Unfortunately, there are a number of things which can break, but here are some | ||
| 69 | things to try. | ||
| 70 | |||
| 71 | 1. Try running ``./tools/testing/kunit/kunit.py run`` with the ``--raw_output`` | ||
| 72 | parameter. This might show details or error messages hidden by the kunit_tool | ||
| 73 | parser. | ||
| 74 | 2. Instead of running ``kunit.py run``, try running ``kunit.py config``, | ||
| 75 | ``kunit.py build``, and ``kunit.py exec`` independently. This can help track | ||
| 76 | down where an issue is occurring. (If you think the parser is at fault, you | ||
| 77 | can run it manually against stdin or a file with ``kunit.py parse``.) | ||
| 78 | 3. Running the UML kernel directly can often reveal issues or error messages | ||
| 79 | kunit_tool ignores. This should be as simple as running ``./vmlinux`` after | ||
| 80 | building the UML kernel (e.g., by using ``kunit.py build``). Note that UML | ||
| 81 | has some unusual requirements (such as the host having a tmpfs filesystem | ||
| 82 | mounted), and has had issues in the past when built statically and the host | ||
| 83 | has KASLR enabled. (On older host kernels, you may need to run ``setarch | ||
| 84 | `uname -m` -R ./vmlinux`` to disable KASLR.) | ||
| 85 | 4. Make sure the kernel .config has ``CONFIG_KUNIT=y`` and at least one test | ||
| 86 | (e.g. ``CONFIG_KUNIT_EXAMPLE_TEST=y``). kunit_tool will keep its .config | ||
| 87 | around, so you can see what config was used after running ``kunit.py run``. | ||
| 88 | It also preserves any config changes you might make, so you can | ||
| 89 | enable/disable things with ``make ARCH=um menuconfig`` or similar, and then | ||
| 90 | re-run kunit_tool. | ||
| 91 | 5. Try to run ``make ARCH=um defconfig`` before running ``kunit.py run``. This | ||
| 92 | may help clean up any residual config items which could be causing problems. | ||
| 93 | 6. Finally, try running KUnit outside UML. KUnit and KUnit tests can run be | ||
| 94 | built into any kernel, or can be built as a module and loaded at runtime. | ||
| 95 | Doing so should allow you to determine if UML is causing the issue you're | ||
| 96 | seeing. When tests are built-in, they will execute when the kernel boots, and | ||
| 97 | modules will automatically execute associated tests when loaded. Test results | ||
| 98 | can be collected from ``/sys/kernel/debug/kunit/<test suite>/results``, and | ||
| 99 | can be parsed with ``kunit.py parse``. For more details, see "KUnit on | ||
| 100 | non-UML architectures" in :doc:`usage`. | ||
| 101 | |||
| 102 | If none of the above tricks help, you are always welcome to email any issues to | ||
| 103 | kunit-dev@googlegroups.com. | ||
| @@ -2,7 +2,6 @@ · 1 unmodified line | |||
| 2 | DT_DOC_CHECKER ?= dt-doc-validate | 2 | DT_DOC_CHECKER ?= dt-doc-validate |
| 3 | DT_EXTRACT_EX ?= dt-extract-example | 3 | DT_EXTRACT_EX ?= dt-extract-example |
| 4 | DT_MK_SCHEMA ?= dt-mk-schema | 4 | DT_MK_SCHEMA ?= dt-mk-schema |
| 5 | DT_MK_SCHEMA_USERONLY_FLAG := $(if $(DT_SCHEMA_FILES), -u) | ||
| 6 | 5 | ||
| 7 | DT_SCHEMA_MIN_VERSION = 2020.5 | 6 | DT_SCHEMA_MIN_VERSION = 2020.5 |
| 8 | 7 | ||
| @@ -35,21 +34,40 @@ quiet_cmd_mk_schema = SCHEMA $@ · 26 unmodified lines | |||
| 35 | 34 | ||
| 36 | DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||') | 35 | DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||') |
| 37 | 36 | ||
| 38 | DT_SCHEMA_FILES ?= $(DT_DOCS) | ||
| 39 | |||
| 40 | extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES)) | ||
| 41 | extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES)) | ||
| 42 | extra-$(CHECK_DT_BINDING) += processed-schema-examples.yaml | ||
| 43 | |||
| 44 | override DTC_FLAGS := \ | 37 | override DTC_FLAGS := \ |
| 45 | -Wno-avoid_unnecessary_addr_size \ | 38 | -Wno-avoid_unnecessary_addr_size \ |
| 46 | -Wno-graph_child_address | 39 | -Wno-graph_child_address \ |
| 40 | -Wno-interrupt_provider | ||
| 47 | 41 | ||
| 48 | $(obj)/processed-schema-examples.yaml: $(DT_DOCS) check_dtschema_version FORCE | 42 | $(obj)/processed-schema-examples.yaml: $(DT_DOCS) check_dtschema_version FORCE |
| 49 | $(call if_changed,mk_schema) | 43 | $(call if_changed,mk_schema) |
| 50 | 44 | ||
| 51 | $(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := $(DT_MK_SCHEMA_USERONLY_FLAG) | 45 | ifeq ($(DT_SCHEMA_FILES),) |
| 46 | |||
| 47 | # Unless DT_SCHEMA_FILES is specified, use the full schema for dtbs_check too. | ||
| 48 | # Just copy processed-schema-examples.yaml | ||
| 49 | |||
| 50 | $(obj)/processed-schema.yaml: $(obj)/processed-schema-examples.yaml FORCE | ||
| 51 | $(call if_changed,copy) | ||
| 52 | |||
| 53 | DT_SCHEMA_FILES = $(DT_DOCS) | ||
| 54 | |||
| 55 | else | ||
| 56 | |||
| 57 | # If DT_SCHEMA_FILES is specified, use it for processed-schema.yaml | ||
| 58 | |||
| 59 | $(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := -u | ||
| 52 | $(obj)/processed-schema.yaml: $(DT_SCHEMA_FILES) check_dtschema_version FORCE | 60 | $(obj)/processed-schema.yaml: $(DT_SCHEMA_FILES) check_dtschema_version FORCE |
| 53 | $(call if_changed,mk_schema) | 61 | $(call if_changed,mk_schema) |
| 54 | 62 | ||
| 55 | extra-y += processed-schema.yaml | 63 | endif |
| 64 | |||
| 65 | extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES)) | ||
| 66 | extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES)) | ||
| 67 | extra-$(CHECK_DT_BINDING) += processed-schema-examples.yaml | ||
| 68 | extra-$(CHECK_DTBS) += processed-schema.yaml | ||
| 69 | |||
| 70 | # Hack: avoid 'Argument list too long' error for 'make clean'. Remove most of | ||
| 71 | # build artifacts here before they are processed by scripts/Makefile.clean | ||
| 72 | clean-files = $(shell find $(obj) \( -name '*.example.dts' -o \ | ||
| 73 | -name '*.example.dt.yaml' \) -delete 2>/dev/null) | ||
| @@ -47,7 +47,7 @@ Required properties: · 46 unmodified lines | |||
| 47 | &lsio_mu1 1 2 | 47 | &lsio_mu1 1 2 |
| 48 | &lsio_mu1 1 3 | 48 | &lsio_mu1 1 3 |
| 49 | &lsio_mu1 3 3>; | 49 | &lsio_mu1 3 3>; |
| 50 | See Documentation/devicetree/bindings/mailbox/fsl,mu.txt | 50 | See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml |
| 51 | for detailed mailbox binding. | 51 | for detailed mailbox binding. |
| 52 | 52 | ||
| 53 | Note: Each mu which supports general interrupt should have an alias correctly | 53 | Note: Each mu which supports general interrupt should have an alias correctly |
| @@ -80,14 +80,14 @@ examples: · 79 unmodified lines | |||
| 80 | ranges = <1 0x00000000 0x42000000 0x02000000>, | 80 | ranges = <1 0x00000000 0x42000000 0x02000000>, |
| 81 | <5 0x00000000 0x46000000 0x01000000>; | 81 | <5 0x00000000 0x46000000 0x01000000>; |
| 82 | 82 | ||
| 83 | ethernet@1,01f00000 { | 83 | ethernet@1,1f00000 { |
| 84 | compatible = "smsc,lan9115"; | 84 | compatible = "smsc,lan9115"; |
| 85 | reg = <1 0x01f00000 0x1000>; | 85 | reg = <1 0x01f00000 0x1000>; |
| 86 | interrupts = <0 48 4>; | 86 | interrupts = <0 48 4>; |
| 87 | phy-mode = "mii"; | 87 | phy-mode = "mii"; |
| 88 | }; | 88 | }; |
| 89 | 89 | ||
| 90 | uart@5,00200000 { | 90 | serial@5,200000 { |
| 91 | compatible = "ns16550a"; | 91 | compatible = "ns16550a"; |
| 92 | reg = <5 0x00200000 0x20>; | 92 | reg = <5 0x00200000 0x20>; |
| 93 | interrupts = <0 49 4>; | 93 | interrupts = <0 49 4>; |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | |||
| 7 | title: Clock bindings for Freescale i.MX27 | 7 | title: Clock bindings for Freescale i.MX27 |
| 8 | 8 | ||
| 9 | maintainers: | 9 | maintainers: |
| 10 | - Fabio Estevam <fabio.estevam@freescale.com> | 10 | - Fabio Estevam <fabio.estevam@nxp.com> |
| 11 | 11 | ||
| 12 | description: | | 12 | description: | |
| 13 | The clock consumer should specify the desired clock by having the clock | 13 | The clock consumer should specify the desired clock by having the clock |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | |||
| 7 | title: Clock bindings for Freescale i.MX31 | 7 | title: Clock bindings for Freescale i.MX31 |
| 8 | 8 | ||
| 9 | maintainers: | 9 | maintainers: |
| 10 | - Fabio Estevam <fabio.estevam@freescale.com> | 10 | - Fabio Estevam <fabio.estevam@nxp.com> |
| 11 | 11 | ||
| 12 | description: | | 12 | description: | |
| 13 | The clock consumer should specify the desired clock by having the clock | 13 | The clock consumer should specify the desired clock by having the clock |
| @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines | |||
| 7 | title: Clock bindings for Freescale i.MX5 | 7 | title: Clock bindings for Freescale i.MX5 |
| 8 | 8 | ||
| 9 | maintainers: | 9 | maintainers: |
| 10 | - Fabio Estevam <fabio.estevam@freescale.com> | 10 | - Fabio Estevam <fabio.estevam@nxp.com> |
| 11 | 11 | ||
| 12 | description: | | 12 | description: | |
| 13 | The clock consumer should specify the desired clock by having the clock | 13 | The clock consumer should specify the desired clock by having the clock |
| @@ -37,7 +37,7 @@ Optional properties: · 36 unmodified lines | |||
| 37 | simple-card or audio-graph-card binding. See their binding | 37 | simple-card or audio-graph-card binding. See their binding |
| 38 | documents on how to describe the way the sii902x device is | 38 | documents on how to describe the way the sii902x device is |
| 39 | connected to the rest of the audio system: | 39 | connected to the rest of the audio system: |
| 40 | Documentation/devicetree/bindings/sound/simple-card.txt | 40 | Documentation/devicetree/bindings/sound/simple-card.yaml |
| 41 | Documentation/devicetree/bindings/sound/audio-graph-card.txt | 41 | Documentation/devicetree/bindings/sound/audio-graph-card.txt |
| 42 | Note: In case of the audio-graph-card binding the used port | 42 | Note: In case of the audio-graph-card binding the used port |
| 43 | index should be 3. | 43 | index should be 3. |
| @@ -68,7 +68,7 @@ Required properties: · 67 unmodified lines | |||
| 68 | datasheet | 68 | datasheet |
| 69 | - clocks : phandle to the PRE axi clock input, as described | 69 | - clocks : phandle to the PRE axi clock input, as described |
| 70 | in Documentation/devicetree/bindings/clock/clock-bindings.txt and | 70 | in Documentation/devicetree/bindings/clock/clock-bindings.txt and |
| 71 | Documentation/devicetree/bindings/clock/imx6q-clock.txt. | 71 | Documentation/devicetree/bindings/clock/imx6q-clock.yaml. |
| 72 | - clock-names: should be "axi" | 72 | - clock-names: should be "axi" |
| 73 | - interrupts: should contain the PRE interrupt | 73 | - interrupts: should contain the PRE interrupt |
| 74 | - fsl,iram: phandle pointing to the mmio-sram device node, that should be | 74 | - fsl,iram: phandle pointing to the mmio-sram device node, that should be |
| @@ -94,7 +94,7 @@ Required properties: · 19 unmodified lines | |||
| 94 | datasheet | 94 | datasheet |
| 95 | - clocks : phandles to the PRG ipg and axi clock inputs, as described | 95 | - clocks : phandles to the PRG ipg and axi clock inputs, as described |
| 96 | in Documentation/devicetree/bindings/clock/clock-bindings.txt and | 96 | in Documentation/devicetree/bindings/clock/clock-bindings.txt and |
| 97 | Documentation/devicetree/bindings/clock/imx6q-clock.txt. | 97 | Documentation/devicetree/bindings/clock/imx6q-clock.yaml. |
| 98 | - clock-names: should be "ipg" and "axi" | 98 | - clock-names: should be "ipg" and "axi" |
| 99 | - fsl,pres: phandles to the PRE units attached to this PRG, with the fixed | 99 | - fsl,pres: phandles to the PRE units attached to this PRG, with the fixed |
| 100 | PRE as the first entry and the muxable PREs following. | 100 | PRE as the first entry and the muxable PREs following. |
| @@ -30,8 +30,8 @@ Required properties: · 29 unmodified lines | |||
| 30 | "di2_sel" - IPU2 DI0 mux | 30 | "di2_sel" - IPU2 DI0 mux |
| 31 | "di3_sel" - IPU2 DI1 mux | 31 | "di3_sel" - IPU2 DI1 mux |
| 32 | The needed clock numbers for each are documented in | 32 | The needed clock numbers for each are documented in |
| 33 | Documentation/devicetree/bindings/clock/imx5-clock.txt, and in | 33 | Documentation/devicetree/bindings/clock/imx5-clock.yaml, and in |
| 34 | Documentation/devicetree/bindings/clock/imx6q-clock.txt. | 34 | Documentation/devicetree/bindings/clock/imx6q-clock.yaml. |
| 35 | 35 | ||
| 36 | Optional properties: | 36 | Optional properties: |
| 37 | - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q | 37 | - pinctrl-names : should be "default" on i.MX53, not used on i.MX6q |
| @@ -33,7 +33,7 @@ additionalProperties: false · 32 unmodified lines | |||
| 33 | 33 | ||
| 34 | examples: | 34 | examples: |
| 35 | - | | 35 | - | |
| 36 | sysreg { | 36 | sysreg@0 { |
| 37 | compatible = "arm,versatile-sysreg", "syscon", "simple-mfd"; | 37 | compatible = "arm,versatile-sysreg", "syscon", "simple-mfd"; |
| 38 | reg = <0x00000 0x1000>; | 38 | reg = <0x00000 0x1000>; |
| 39 | 39 | ||
| @@ -24,7 +24,7 @@ properties: · 23 unmodified lines | |||
| 24 | description: | | 24 | description: | |
| 25 | Should contain a list of phandles pointing to display interface port | 25 | Should contain a list of phandles pointing to display interface port |
| 26 | of vop devices. vop definitions as defined in | 26 | of vop devices. vop definitions as defined in |
| 27 | Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt | 27 | Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml |
| 28 | 28 | ||
| 29 | required: | 29 | required: |
| 30 | - compatible | 30 | - compatible |
| @@ -12,7 +12,7 @@ Required properties for the top level node: · 11 unmodified lines | |||
| 12 | Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. | 12 | Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. |
| 13 | - #interrupt-cells : Specifies the number of cells needed to encode an | 13 | - #interrupt-cells : Specifies the number of cells needed to encode an |
| 14 | interrupt. Should be 2. The first cell defines the interrupt number, | 14 | interrupt. Should be 2. The first cell defines the interrupt number, |
| 15 | the second encodes the triger flags encoded as described in | 15 | the second encodes the trigger flags encoded as described in |
| 16 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt | 16 | Documentation/devicetree/bindings/interrupt-controller/interrupts.txt |
| 17 | - compatible: | 17 | - compatible: |
| 18 | - "mediatek,mt7621-gpio" for Mediatek controllers | 18 | - "mediatek,mt7621-gpio" for Mediatek controllers |
| @@ -10,7 +10,7 @@ Interrupt number definition: · 9 unmodified lines | |||
| 10 | 16-31 : private irq, and we use 16 as the co-processor timer. | 10 | 16-31 : private irq, and we use 16 as the co-processor timer. |
| 11 | 31-1024: common irq for soc ip. | 11 | 31-1024: common irq for soc ip. |
| 12 | 12 | ||
| 13 | Interrupt triger mode: (Defined in dt-bindings/interrupt-controller/irq.h) | 13 | Interrupt trigger mode: (Defined in dt-bindings/interrupt-controller/irq.h) |
| 14 | IRQ_TYPE_LEVEL_HIGH (default) | 14 | IRQ_TYPE_LEVEL_HIGH (default) |
| 15 | IRQ_TYPE_LEVEL_LOW | 15 | IRQ_TYPE_LEVEL_LOW |
| 16 | IRQ_TYPE_EDGE_RISING | 16 | IRQ_TYPE_EDGE_RISING |
| @@ -87,7 +87,7 @@ Example: · 86 unmodified lines | |||
| 87 | ranges; | 87 | ranges; |
| 88 | 88 | ||
| 89 | /* APU<->RPU0 IPI mailbox controller */ | 89 | /* APU<->RPU0 IPI mailbox controller */ |
| 90 | ipi_mailbox_rpu0: mailbox@ff90400 { | 90 | ipi_mailbox_rpu0: mailbox@ff990400 { |
| 91 | reg = <0xff990400 0x20>, | 91 | reg = <0xff990400 0x20>, |
| 92 | <0xff990420 0x20>, | 92 | <0xff990420 0x20>, |
| 93 | <0xff990080 0x20>, | 93 | <0xff990080 0x20>, |
| @@ -8,7 +8,7 @@ The embedded controller requires the SPI controller driver to signal readiness · 7 unmodified lines | |||
| 8 | to receive a transfer (that is, when TX FIFO contains the response data) by | 8 | to receive a transfer (that is, when TX FIFO contains the response data) by |
| 9 | strobing the ACK pin with the ready signal. See the "ready-gpios" property of the | 9 | strobing the ACK pin with the ready signal. See the "ready-gpios" property of the |
| 10 | SSP binding as documented in: | 10 | SSP binding as documented in: |
| 11 | <Documentation/devicetree/bindings/spi/spi-pxa2xx.txt>. | 11 | <Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml>. |
| 12 | 12 | ||
| 13 | Example: | 13 | Example: |
| 14 | &ssp3 { | 14 | &ssp3 { |
| @@ -3,7 +3,7 @@ MediaTek SoC built-in Bluetooth Devices · 2 unmodified lines | |||
| 3 | 3 | ||
| 4 | This device is a serial attached device to BTIF device and thus it must be a | 4 | This device is a serial attached device to BTIF device and thus it must be a |
| 5 | child node of the serial node with BTIF. The dt-bindings details for BTIF | 5 | child node of the serial node with BTIF. The dt-bindings details for BTIF |
| 6 | device can be known via Documentation/devicetree/bindings/serial/8250.txt. | 6 | device can be known via Documentation/devicetree/bindings/serial/8250.yaml. |
| 7 | 7 | ||
| 8 | Required properties: | 8 | Required properties: |
| 9 | 9 | ||
| @@ -114,7 +114,7 @@ with values derived from the SoC user manual. · 113 unmodified lines | |||
| 114 | [flags]> | 114 | [flags]> |
| 115 | 115 | ||
| 116 | On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver. | 116 | On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver. |
| 117 | Please refer to Documentation/devicetree/bindings/gpio/renesas,gpio-rcar.txt | 117 | Please refer to Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml |
| 118 | for documentation of the GPIO device tree bindings on those platforms. | 118 | for documentation of the GPIO device tree bindings on those platforms. |
| 119 | 119 | ||
| 120 | 120 | ||
| @@ -5,7 +5,7 @@ It is based on common bindings for device graphs. · 4 unmodified lines | |||
| 5 | see ${LINUX}/Documentation/devicetree/bindings/graph.txt | 5 | see ${LINUX}/Documentation/devicetree/bindings/graph.txt |
| 6 | 6 | ||
| 7 | Basically, Audio Graph Card property is same as Simple Card. | 7 | Basically, Audio Graph Card property is same as Simple Card. |
| 8 | see ${LINUX}/Documentation/devicetree/bindings/sound/simple-card.txt | 8 | see ${LINUX}/Documentation/devicetree/bindings/sound/simple-card.yaml |
| 9 | 9 | ||
| 10 | Below are same as Simple-Card. | 10 | Below are same as Simple-Card. |
| 11 | 11 | ||
| @@ -5,7 +5,7 @@ codec or external codecs. · 4 unmodified lines | |||
| 5 | 5 | ||
| 6 | sti sound drivers allows to expose sti SoC audio interface through the | 6 | sti sound drivers allows to expose sti SoC audio interface through the |
| 7 | generic ASoC simple card. For details about sound card declaration please refer to | 7 | generic ASoC simple card. For details about sound card declaration please refer to |
| 8 | Documentation/devicetree/bindings/sound/simple-card.txt. | 8 | Documentation/devicetree/bindings/sound/simple-card.yaml. |
| 9 | 9 | ||
| 10 | 1) sti-uniperiph-dai: audio dai device. | 10 | 1) sti-uniperiph-dai: audio dai device. |
| 11 | --------------------------------------- | 11 | --------------------------------------- |
| @@ -34,12 +34,15 @@ properties: · 33 unmodified lines | |||
| 34 | maxItems: 1 | 34 | maxItems: 1 |
| 35 | 35 | ||
| 36 | clocks: | 36 | clocks: |
| 37 | maxItems: 1 | 37 | minItems: 1 |
| 38 | maxItems: 2 | ||
| 39 | items: | ||
| 40 | - description: controller register bus clock | ||
| 41 | - description: baud rate generator and delay control clock | ||
| 38 | 42 | ||
| 39 | clock-names: | 43 | clock-names: |
| 40 | description: input clock for the baud rate generator | 44 | minItems: 1 |
| 41 | items: | 45 | maxItems: 2 |
| 42 | - const: core | ||
| 43 | 46 | ||
| 44 | if: | 47 | if: |
| 45 | properties: | 48 | properties: |
| @@ -51,17 +54,22 @@ if: · 5 unmodified lines | |||
| 51 | then: | 54 | then: |
| 52 | properties: | 55 | properties: |
| 53 | clocks: | 56 | clocks: |
| 54 | contains: | 57 | minItems: 2 |
| 55 | items: | ||
| 56 | - description: controller register bus clock | ||
| 57 | - description: baud rate generator and delay control clock | ||
| 58 | 58 | ||
| 59 | clock-names: | 59 | clock-names: |
| 60 | minItems: 2 | ||
| 61 | items: | 60 | items: |
| 62 | - const: core | 61 | - const: core |
| 63 | - const: pclk | 62 | - const: pclk |
| 64 | 63 | ||
| 64 | else: | ||
| 65 | properties: | ||
| 66 | clocks: | ||
| 67 | maxItems: 1 | ||
| 68 | |||
| 69 | clock-names: | ||
| 70 | items: | ||
| 71 | - const: core | ||
| 72 | |||
| 65 | required: | 73 | required: |
| 66 | - compatible | 74 | - compatible |
| 67 | - reg | 75 | - reg |
| @@ -19,7 +19,7 @@ Required properties: · 18 unmodified lines | |||
| 19 | 19 | ||
| 20 | SPI Controller nodes must be child of GENI based Qualcomm Universal | 20 | SPI Controller nodes must be child of GENI based Qualcomm Universal |
| 21 | Peripharal. Please refer GENI based QUP wrapper controller node bindings | 21 | Peripharal. Please refer GENI based QUP wrapper controller node bindings |
| 22 | described in Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt. | 22 | described in Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml. |
| 23 | 23 | ||
| 24 | SPI slave nodes must be children of the SPI master node and conform to SPI bus | 24 | SPI slave nodes must be children of the SPI master node and conform to SPI bus |
| 25 | binding as described in Documentation/devicetree/bindings/spi/spi-bus.txt. | 25 | binding as described in Documentation/devicetree/bindings/spi/spi-bus.txt. |
| @@ -41,7 +41,7 @@ examples: · 40 unmodified lines | |||
| 41 | #include <dt-bindings/interrupt-controller/arm-gic.h> | 41 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 42 | 42 | ||
| 43 | // Example 1: SDM845 TSENS | 43 | // Example 1: SDM845 TSENS |
| 44 | soc: soc@0 { | 44 | soc: soc { |
| 45 | #address-cells = <2>; | 45 | #address-cells = <2>; |
| 46 | #size-cells = <2>; | 46 | #size-cells = <2>; |
| 47 | 47 | ||
| @@ -224,7 +224,7 @@ examples: · 223 unmodified lines | |||
| 224 | #include <dt-bindings/thermal/thermal.h> | 224 | #include <dt-bindings/thermal/thermal.h> |
| 225 | 225 | ||
| 226 | // Example 1: SDM845 TSENS | 226 | // Example 1: SDM845 TSENS |
| 227 | soc: soc@0 { | 227 | soc { |
| 228 | #address-cells = <2>; | 228 | #address-cells = <2>; |
| 229 | #size-cells = <2>; | 229 | #size-cells = <2>; |
| 230 | 230 | ||
| @@ -35,7 +35,7 @@ examples: · 34 unmodified lines | |||
| 35 | #include <dt-bindings/soc/ti,sci_pm_domain.h> | 35 | #include <dt-bindings/soc/ti,sci_pm_domain.h> |
| 36 | vtm: thermal@42050000 { | 36 | vtm: thermal@42050000 { |
| 37 | compatible = "ti,am654-vtm"; | 37 | compatible = "ti,am654-vtm"; |
| 38 | reg = <0x0 0x42050000 0x0 0x25c>; | 38 | reg = <0x42050000 0x25c>; |
| 39 | power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>; | 39 | power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>; |
| 40 | #thermal-sensor-cells = <1>; | 40 | #thermal-sensor-cells = <1>; |
| 41 | }; | 41 | }; |
| @@ -8,7 +8,7 @@ regs is accessed by cpu co-processor 4 registers with mtcr/mfcr. · 7 unmodified lines | |||
| 8 | - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer. | 8 | - PTIM_CTLR "cr<0, 14>" Control reg to start reset timer. |
| 9 | - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg. | 9 | - PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg. |
| 10 | - PTIM_CCVR "cr<3, 14>" Current counter value reg. | 10 | - PTIM_CCVR "cr<3, 14>" Current counter value reg. |
| 11 | - PTIM_LVR "cr<6, 14>" Window value reg to triger next event. | 11 | - PTIM_LVR "cr<6, 14>" Window value reg to trigger next event. |
| 12 | 12 | ||
| 13 | ============================== | 13 | ============================== |
| 14 | timer node bindings definition | 14 | timer node bindings definition |
| @@ -127,8 +127,8 @@ examples: · 126 unmodified lines | |||
| 127 | #address-cells = <1>; | 127 | #address-cells = <1>; |
| 128 | #size-cells = <0>; | 128 | #size-cells = <0>; |
| 129 | 129 | ||
| 130 | string@0409 { | 130 | string@409 { |
| 131 | reg = <0x0409>; | 131 | reg = <0x409>; |
| 132 | manufacturer = "ASPEED"; | 132 | manufacturer = "ASPEED"; |
| 133 | product = "USB Virtual Hub"; | 133 | product = "USB Virtual Hub"; |
| 134 | serial-number = "0000"; | 134 | serial-number = "0000"; |
| @@ -1,4 +1,4 @@ | |||
| 1 | :orphan: | 1 | .. SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | ||
| 3 | Writing DeviceTree Bindings in json-schema | 3 | Writing DeviceTree Bindings in json-schema |
| 4 | ========================================== | 4 | ========================================== |
| @@ -124,9 +124,12 @@ dtc must also be built with YAML output support enabled. This requires that · 119 unmodified lines | |||
| 124 | libyaml and its headers be installed on the host system. For some distributions | 124 | libyaml and its headers be installed on the host system. For some distributions |
| 125 | that involves installing the development package, such as: | 125 | that involves installing the development package, such as: |
| 126 | 126 | ||
| 127 | Debian: | 127 | Debian:: |
| 128 | |||
| 128 | apt-get install libyaml-dev | 129 | apt-get install libyaml-dev |
| 129 | Fedora: | 130 | |
| 131 | Fedora:: | ||
| 132 | |||
| 130 | dnf -y install libyaml-devel | 133 | dnf -y install libyaml-devel |
| 131 | 134 | ||
| 132 | Running checks | 135 | Running checks |
| @@ -560,8 +560,8 @@ When the NFS export feature is enabled, all directory index entries are · 559 unmodified lines | |||
| 560 | verified on mount time to check that upper file handles are not stale. | 560 | verified on mount time to check that upper file handles are not stale. |
| 561 | This verification may cause significant overhead in some cases. | 561 | This verification may cause significant overhead in some cases. |
| 562 | 562 | ||
| 563 | Note: the mount options index=off,nfs_export=on are conflicting and will | 563 | Note: the mount options index=off,nfs_export=on are conflicting for a |
| 564 | result in an error. | 564 | read-write mount and will result in an error. |
| 565 | 565 | ||
| 566 | 566 | ||
| 567 | Testsuite | 567 | Testsuite |
| @@ -1,14 +1,26 @@ | |||
| 1 | ============================== | 1 | ============================== |
| 2 | Linux I2C slave eeprom backend | 2 | Linux I2C slave EEPROM backend |
| 3 | ============================== | 3 | ============================== |
| 4 | 4 | ||
| 5 | by Wolfram Sang <wsa@sang-engineering.com> in 2014-15 | 5 | by Wolfram Sang <wsa@sang-engineering.com> in 2014-20 |
| 6 | 6 | ||
| 7 | This is a proof-of-concept backend which acts like an EEPROM on the connected | 7 | This backend simulates an EEPROM on the connected I2C bus. Its memory contents |
| 8 | I2C bus. The memory contents can be modified from userspace via this file | 8 | can be accessed from userspace via this file located in sysfs:: |
| 9 | located in sysfs:: | ||
| 10 | 9 | ||
| 11 | /sys/bus/i2c/devices/<device-directory>/slave-eeprom | 10 | /sys/bus/i2c/devices/<device-directory>/slave-eeprom |
| 12 | 11 | ||
| 12 | The following types are available: 24c02, 24c32, 24c64, and 24c512. Read-only | ||
| 13 | variants are also supported. The name needed for instantiating has the form | ||
| 14 | 'slave-<type>[ro]'. Examples follow: | ||
| 15 | |||
| 16 | 24c02, read/write, address 0x64: | ||
| 17 | # echo slave-24c02 0x1064 > /sys/bus/i2c/devices/i2c-1/new_device | ||
| 18 | |||
| 19 | 24c512, read-only, address 0x42: | ||
| 20 | # echo slave-24c512ro 0x1042 > /sys/bus/i2c/devices/i2c-1/new_device | ||
| 21 | |||
| 22 | You can also preload data during boot if a device-property named | ||
| 23 | 'firmware-name' contains a valid filename (DT or ACPI only). | ||
| 24 | |||
| 13 | As of 2015, Linux doesn't support poll on binary sysfs files, so there is no | 25 | As of 2015, Linux doesn't support poll on binary sysfs files, so there is no |
| 14 | notification when another master changed the content. | 26 | notification when another master changed the content. |
| @@ -182,7 +182,8 @@ module 8123.ko, which is built from the following files:: · 181 unmodified lines | |||
| 182 | 8123_pci.c | 182 | 8123_pci.c |
| 183 | 8123_bin.o_shipped <= Binary blob | 183 | 8123_bin.o_shipped <= Binary blob |
| 184 | 184 | ||
| 185 | --- 3.1 Shared Makefile | 185 | 3.1 Shared Makefile |
| 186 | ------------------- | ||
| 186 | 187 | ||
| 187 | An external module always includes a wrapper makefile that | 188 | An external module always includes a wrapper makefile that |
| 188 | supports building the module using "make" with no arguments. | 189 | supports building the module using "make" with no arguments. |
| @@ -470,9 +471,9 @@ build. · 281 unmodified lines | |||
| 470 | 471 | ||
| 471 | The syntax of the Module.symvers file is:: | 472 | The syntax of the Module.symvers file is:: |
| 472 | 473 | ||
| 473 | <CRC> <Symbol> <Module> <Export Type> <Namespace> | 474 | <CRC> <Symbol> <Module> <Export Type> <Namespace> |
| 474 | 475 | ||
| 475 | 0xe1cc2a05 usb_stor_suspend drivers/usb/storage/usb-storage EXPORT_SYMBOL_GPL USB_STORAGE | 476 | 0xe1cc2a05 usb_stor_suspend drivers/usb/storage/usb-storage EXPORT_SYMBOL_GPL USB_STORAGE |
| 476 | 477 | ||
| 477 | The fields are separated by tabs and values may be empty (e.g. | 478 | The fields are separated by tabs and values may be empty (e.g. |
| 478 | if no namespace is defined for an exported symbol). | 479 | if no namespace is defined for an exported symbol). |
| @@ -101,7 +101,7 @@ Structure randomisation · 100 unmodified lines | |||
| 101 | 101 | ||
| 102 | If you enable ``CONFIG_GCC_PLUGIN_RANDSTRUCT``, you will need to | 102 | If you enable ``CONFIG_GCC_PLUGIN_RANDSTRUCT``, you will need to |
| 103 | pre-generate the random seed in | 103 | pre-generate the random seed in |
| 104 | ``scripts/gcc-plgins/randomize_layout_seed.h`` so the same value | 104 | ``scripts/gcc-plugins/randomize_layout_seed.h`` so the same value |
| 105 | is used in rebuilds. | 105 | is used in rebuilds. |
| 106 | 106 | ||
| 107 | Debug info conflicts | 107 | Debug info conflicts |
| @@ -68,4 +68,4 @@ and frameworks can be controlled from the same registers, all of these · 67 unmodified lines | |||
| 68 | drivers access their registers through the same regmap. | 68 | drivers access their registers through the same regmap. |
| 69 | 69 | ||
| 70 | For more information regarding the devicetree bindings of the TCU drivers, | 70 | For more information regarding the devicetree bindings of the TCU drivers, |
| 71 | have a look at Documentation/devicetree/bindings/timer/ingenic,tcu.txt. | 71 | have a look at Documentation/devicetree/bindings/timer/ingenic,tcu.yaml. |
| @@ -434,7 +434,7 @@ can set up your network then: · 433 unmodified lines | |||
| 434 | ifconfig arc0 insight | 434 | ifconfig arc0 insight |
| 435 | route add insight arc0 | 435 | route add insight arc0 |
| 436 | route add freedom arc0 /* I would use the subnet here (like I said | 436 | route add freedom arc0 /* I would use the subnet here (like I said |
| 437 | to to in "single protocol" above), | 437 | to in "single protocol" above), |
| 438 | but the rest of the subnet | 438 | but the rest of the subnet |
| 439 | unfortunately lies across the PPP | 439 | unfortunately lies across the PPP |
| 440 | link on freedom, which confuses | 440 | link on freedom, which confuses |
| @@ -6,7 +6,7 @@ AX.25 · 5 unmodified lines | |||
| 6 | 6 | ||
| 7 | To use the amateur radio protocols within Linux you will need to get a | 7 | To use the amateur radio protocols within Linux you will need to get a |
| 8 | suitable copy of the AX.25 Utilities. More detailed information about | 8 | suitable copy of the AX.25 Utilities. More detailed information about |
| 9 | AX.25, NET/ROM and ROSE, associated programs and and utilities can be | 9 | AX.25, NET/ROM and ROSE, associated programs and utilities can be |
| 10 | found on http://www.linux-ax25.org. | 10 | found on http://www.linux-ax25.org. |
| 11 | 11 | ||
| 12 | There is an active mailing list for discussing Linux amateur radio matters | 12 | There is an active mailing list for discussing Linux amateur radio matters |
| @@ -144,7 +144,7 @@ UCAN_COMMAND_SET_BITTIMING · 143 unmodified lines | |||
| 144 | 144 | ||
| 145 | *Host2Dev; mandatory* | 145 | *Host2Dev; mandatory* |
| 146 | 146 | ||
| 147 | Setup bittiming by sending the the structure | 147 | Setup bittiming by sending the structure |
| 148 | ``ucan_ctl_payload_t.cmd_set_bittiming`` (see ``struct bittiming`` for | 148 | ``ucan_ctl_payload_t.cmd_set_bittiming`` (see ``struct bittiming`` for |
| 149 | details) | 149 | details) |
| 150 | 150 | ||
| @@ -232,7 +232,7 @@ UCAN_IN_TX_COMPLETE · 81 unmodified lines | |||
| 232 | zero | 232 | zero |
| 233 | 233 | ||
| 234 | The CAN device has sent a message to the CAN bus. It answers with a | 234 | The CAN device has sent a message to the CAN bus. It answers with a |
| 235 | list of of tuples <echo-ids, flags>. | 235 | list of tuples <echo-ids, flags>. |
| 236 | 236 | ||
| 237 | The echo-id identifies the frame from (echos the id from a previous | 237 | The echo-id identifies the frame from (echos the id from a previous |
| 238 | UCAN_OUT_TX message). The flag indicates the result of the | 238 | UCAN_OUT_TX message). The flag indicates the result of the |
| @@ -95,7 +95,7 @@ Ethernet switch. · 94 unmodified lines | |||
| 95 | Networking stack hooks | 95 | Networking stack hooks |
| 96 | ---------------------- | 96 | ---------------------- |
| 97 | 97 | ||
| 98 | When a master netdev is used with DSA, a small hook is placed in in the | 98 | When a master netdev is used with DSA, a small hook is placed in the |
| 99 | networking stack is in order to have the DSA subsystem process the Ethernet | 99 | networking stack is in order to have the DSA subsystem process the Ethernet |
| 100 | switch specific tagging protocol. DSA accomplishes this by registering a | 100 | switch specific tagging protocol. DSA accomplishes this by registering a |
| 101 | specific (and fake) Ethernet type (later becoming ``skb->protocol``) with the | 101 | specific (and fake) Ethernet type (later becoming ``skb->protocol``) with the |
| @@ -30,8 +30,8 @@ Socket API · 29 unmodified lines | |||
| 30 | 30 | ||
| 31 | The address family, socket addresses etc. are defined in the | 31 | The address family, socket addresses etc. are defined in the |
| 32 | include/net/af_ieee802154.h header or in the special header | 32 | include/net/af_ieee802154.h header or in the special header |
| 33 | in the userspace package (see either http://wpan.cakelab.org/ or the | 33 | in the userspace package (see either https://linux-wpan.org/wpan-tools.html |
| 34 | git tree at https://github.com/linux-wpan/wpan-tools). | 34 | or the git tree at https://github.com/linux-wpan/wpan-tools). |
| 35 | 35 | ||
| 36 | 6LoWPAN Linux implementation | 36 | 6LoWPAN Linux implementation |
| 37 | ============================ | 37 | ============================ |
| @@ -741,7 +741,7 @@ tcp_fastopen - INTEGER · 740 unmodified lines | |||
| 741 | 741 | ||
| 742 | Default: 0x1 | 742 | Default: 0x1 |
| 743 | 743 | ||
| 744 | Note that that additional client or server features are only | 744 | Note that additional client or server features are only |
| 745 | effective if the basic support (0x1 and 0x2) are enabled respectively. | 745 | effective if the basic support (0x1 and 0x2) are enabled respectively. |
| 746 | 746 | ||
| 747 | tcp_fastopen_blackhole_timeout_sec - INTEGER | 747 | tcp_fastopen_blackhole_timeout_sec - INTEGER |
| @@ -114,7 +114,7 @@ drop_entry - INTEGER · 113 unmodified lines | |||
| 114 | modes (when there is no enough available memory, the strategy | 114 | modes (when there is no enough available memory, the strategy |
| 115 | is enabled and the variable is automatically set to 2, | 115 | is enabled and the variable is automatically set to 2, |
| 116 | otherwise the strategy is disabled and the variable is set to | 116 | otherwise the strategy is disabled and the variable is set to |
| 117 | 1), and 3 means that that the strategy is always enabled. | 117 | 1), and 3 means that the strategy is always enabled. |
| 118 | 118 | ||
| 119 | drop_packet - INTEGER | 119 | drop_packet - INTEGER |
| 120 | - 0 - disabled (default) | 120 | - 0 - disabled (default) |
| @@ -186,7 +186,7 @@ About the AF_RXRPC driver: · 185 unmodified lines | |||
| 186 | time [tunable] after the last connection using it discarded, in case a new | 186 | time [tunable] after the last connection using it discarded, in case a new |
| 187 | connection is made that could use it. | 187 | connection is made that could use it. |
| 188 | 188 | ||
| 189 | (#) A client-side connection is only shared between calls if they have have | 189 | (#) A client-side connection is only shared between calls if they have |
| 190 | the same key struct describing their security (and assuming the calls | 190 | the same key struct describing their security (and assuming the calls |
| 191 | would otherwise share the connection). Non-secured calls would also be | 191 | would otherwise share the connection). Non-secured calls would also be |
| 192 | able to share connections with each other. | 192 | able to share connections with each other. |
| @@ -213,7 +213,7 @@ request buffers are not in memory. The operating system handles the fault by · 212 unmodified lines | |||
| 213 | updating CSB with the following data: | 213 | updating CSB with the following data: |
| 214 | 214 | ||
| 215 | csb.flags = CSB_V; | 215 | csb.flags = CSB_V; |
| 216 | csb.cc = CSB_CC_TRANSLATION; | 216 | csb.cc = CSB_CC_FAULT_ADDRESS; |
| 217 | csb.ce = CSB_CE_TERMINATION; | 217 | csb.ce = CSB_CE_TERMINATION; |
| 218 | csb.address = fault_address; | 218 | csb.address = fault_address; |
| 219 | 219 | ||
| @@ -29,7 +29,7 @@ you probably needn't concern yourself with pcmciautils. · 28 unmodified lines | |||
| 29 | ====================== =============== ======================================== | 29 | ====================== =============== ======================================== |
| 30 | Program Minimal version Command to check the version | 30 | Program Minimal version Command to check the version |
| 31 | ====================== =============== ======================================== | 31 | ====================== =============== ======================================== |
| 32 | GNU C 4.8 gcc --version | 32 | GNU C 4.9 gcc --version |
| 33 | GNU make 3.81 make --version | 33 | GNU make 3.81 make --version |
| 34 | binutils 2.23 ld -v | 34 | binutils 2.23 ld -v |
| 35 | flex 2.5.35 flex --version | 35 | flex 2.5.35 flex --version |
| @@ -319,6 +319,26 @@ If you are afraid to mix up your local variable names, you have another · 318 unmodified lines | |||
| 319 | problem, which is called the function-growth-hormone-imbalance syndrome. | 319 | problem, which is called the function-growth-hormone-imbalance syndrome. |
| 320 | See chapter 6 (Functions). | 320 | See chapter 6 (Functions). |
| 321 | 321 | ||
| 322 | For symbol names and documentation, avoid introducing new usage of | ||
| 323 | 'master / slave' (or 'slave' independent of 'master') and 'blacklist / | ||
| 324 | whitelist'. | ||
| 325 | |||
| 326 | Recommended replacements for 'master / slave' are: | ||
| 327 | '{primary,main} / {secondary,replica,subordinate}' | ||
| 328 | '{initiator,requester} / {target,responder}' | ||
| 329 | '{controller,host} / {device,worker,proxy}' | ||
| 330 | 'leader / follower' | ||
| 331 | 'director / performer' | ||
| 332 | |||
| 333 | Recommended replacements for 'blacklist/whitelist' are: | ||
| 334 | 'denylist / allowlist' | ||
| 335 | 'blocklist / passlist' | ||
| 336 | |||
| 337 | Exceptions for introducing new usage is to maintain a userspace ABI/API, | ||
| 338 | or when updating code for an existing (as of 2020) hardware or protocol | ||
| 339 | specification that mandates those terms. For new specifications | ||
| 340 | translate specification usage of the terminology to the kernel coding | ||
| 341 | standard where possible. | ||
| 322 | 342 | ||
| 323 | 5) Typedefs | 343 | 5) Typedefs |
| 324 | ----------- | 344 | ----------- |
| @@ -4339,14 +4339,15 @@ Errors: · 4338 unmodified lines | |||
| 4339 | #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001 | 4339 | #define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001 |
| 4340 | 4340 | ||
| 4341 | struct kvm_vmx_nested_state_hdr { | 4341 | struct kvm_vmx_nested_state_hdr { |
| 4342 | __u32 flags; | ||
| 4343 | __u64 vmxon_pa; | 4342 | __u64 vmxon_pa; |
| 4344 | __u64 vmcs12_pa; | 4343 | __u64 vmcs12_pa; |
| 4345 | __u64 preemption_timer_deadline; | ||
| 4346 | 4344 | ||
| 4347 | struct { | 4345 | struct { |
| 4348 | __u16 flags; | 4346 | __u16 flags; |
| 4349 | } smm; | 4347 | } smm; |
| 4348 | |||
| 4349 | __u32 flags; | ||
| 4350 | __u64 preemption_timer_deadline; | ||
| 4350 | }; | 4351 | }; |
| 4351 | 4352 | ||
| 4352 | struct kvm_vmx_nested_state_data { | 4353 | struct kvm_vmx_nested_state_data { |
| @@ -2929,6 +2929,7 @@ F: include/uapi/linux/atm* · 2928 unmodified lines | |||
| 2929 | 2929 | ||
| 2930 | ATMEL MACB ETHERNET DRIVER | 2930 | ATMEL MACB ETHERNET DRIVER |
| 2931 | M: Nicolas Ferre <nicolas.ferre@microchip.com> | 2931 | M: Nicolas Ferre <nicolas.ferre@microchip.com> |
| 2932 | M: Claudiu Beznea <claudiu.beznea@microchip.com> | ||
| 2932 | S: Supported | 2933 | S: Supported |
| 2933 | F: drivers/net/ethernet/cadence/ | 2934 | F: drivers/net/ethernet/cadence/ |
| 2934 | 2935 | ||
| @@ -3306,7 +3307,7 @@ X: arch/riscv/net/bpf_jit_comp32.c · 371 unmodified lines | |||
| 3306 | 3307 | ||
| 3307 | BPF JIT for S390 | 3308 | BPF JIT for S390 |
| 3308 | M: Ilya Leoshkevich <iii@linux.ibm.com> | 3309 | M: Ilya Leoshkevich <iii@linux.ibm.com> |
| 3309 | M: Heiko Carstens <heiko.carstens@de.ibm.com> | 3310 | M: Heiko Carstens <hca@linux.ibm.com> |
| 3310 | M: Vasily Gorbik <gor@linux.ibm.com> | 3311 | M: Vasily Gorbik <gor@linux.ibm.com> |
| 3311 | L: netdev@vger.kernel.org | 3312 | L: netdev@vger.kernel.org |
| 3312 | L: bpf@vger.kernel.org | 3313 | L: bpf@vger.kernel.org |
| @@ -3946,7 +3947,7 @@ L: linux-crypto@vger.kernel.org · 633 unmodified lines | |||
| 3946 | S: Supported | 3947 | S: Supported |
| 3947 | F: drivers/char/hw_random/cctrng.c | 3948 | F: drivers/char/hw_random/cctrng.c |
| 3948 | F: drivers/char/hw_random/cctrng.h | 3949 | F: drivers/char/hw_random/cctrng.h |
| 3949 | F: Documentation/devicetree/bindings/rng/arm-cctrng.txt | 3950 | F: Documentation/devicetree/bindings/rng/arm-cctrng.yaml |
| 3950 | W: https://developer.arm.com/products/system-ip/trustzone-cryptocell/cryptocell-700-family | 3951 | W: https://developer.arm.com/products/system-ip/trustzone-cryptocell/cryptocell-700-family |
| 3951 | 3952 | ||
| 3952 | CEC FRAMEWORK | 3953 | CEC FRAMEWORK |
| @@ -5021,7 +5022,6 @@ F: drivers/mfd/da91??-*.c · 1068 unmodified lines | |||
| 5021 | F: drivers/pinctrl/pinctrl-da90??.c | 5022 | F: drivers/pinctrl/pinctrl-da90??.c |
| 5022 | F: drivers/power/supply/da9052-battery.c | 5023 | F: drivers/power/supply/da9052-battery.c |
| 5023 | F: drivers/power/supply/da91??-*.c | 5024 | F: drivers/power/supply/da91??-*.c |
| 5024 | F: drivers/regulator/da903x.c | ||
| 5025 | F: drivers/regulator/da9???-regulator.[ch] | 5025 | F: drivers/regulator/da9???-regulator.[ch] |
| 5026 | F: drivers/regulator/slg51000-regulator.[ch] | 5026 | F: drivers/regulator/slg51000-regulator.[ch] |
| 5027 | F: drivers/rtc/rtc-da90??.c | 5027 | F: drivers/rtc/rtc-da90??.c |
| @@ -5111,7 +5111,7 @@ M: Vinod Koul <vkoul@kernel.org> · 83 unmodified lines | |||
| 5111 | L: dmaengine@vger.kernel.org | 5111 | L: dmaengine@vger.kernel.org |
| 5112 | S: Maintained | 5112 | S: Maintained |
| 5113 | Q: https://patchwork.kernel.org/project/linux-dmaengine/list/ | 5113 | Q: https://patchwork.kernel.org/project/linux-dmaengine/list/ |
| 5114 | T: git git://git.infradead.org/users/vkoul/slave-dma.git | 5114 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git |
| 5115 | F: Documentation/devicetree/bindings/dma/ | 5115 | F: Documentation/devicetree/bindings/dma/ |
| 5116 | F: Documentation/driver-api/dmaengine/ | 5116 | F: Documentation/driver-api/dmaengine/ |
| 5117 | F: drivers/dma/ | 5117 | F: drivers/dma/ |
| @@ -5490,7 +5490,7 @@ F: include/uapi/drm/r128_drm.h · 372 unmodified lines | |||
| 5490 | DRM DRIVER FOR RAYDIUM RM67191 PANELS | 5490 | DRM DRIVER FOR RAYDIUM RM67191 PANELS |
| 5491 | M: Robert Chiras <robert.chiras@nxp.com> | 5491 | M: Robert Chiras <robert.chiras@nxp.com> |
| 5492 | S: Maintained | 5492 | S: Maintained |
| 5493 | F: Documentation/devicetree/bindings/display/panel/raydium,rm67191.txt | 5493 | F: Documentation/devicetree/bindings/display/panel/raydium,rm67191.yaml |
| 5494 | F: drivers/gpu/drm/panel/panel-raydium-rm67191.c | 5494 | F: drivers/gpu/drm/panel/panel-raydium-rm67191.c |
| 5495 | 5495 | ||
| 5496 | DRM DRIVER FOR ROCKTECH JH057N00900 PANELS | 5496 | DRM DRIVER FOR ROCKTECH JH057N00900 PANELS |
| @@ -8333,7 +8333,7 @@ M: Alexander Aring <alex.aring@gmail.com> · 2836 unmodified lines | |||
| 8333 | M: Stefan Schmidt <stefan@datenfreihafen.org> | 8333 | M: Stefan Schmidt <stefan@datenfreihafen.org> |
| 8334 | L: linux-wpan@vger.kernel.org | 8334 | L: linux-wpan@vger.kernel.org |
| 8335 | S: Maintained | 8335 | S: Maintained |
| 8336 | W: http://wpan.cakelab.org/ | 8336 | W: https://linux-wpan.org/ |
| 8337 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan.git | 8337 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan.git |
| 8338 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan-next.git | 8338 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan-next.git |
| 8339 | F: Documentation/networking/ieee802154.rst | 8339 | F: Documentation/networking/ieee802154.rst |
| @@ -10808,7 +10808,7 @@ F: Documentation/devicetree/bindings/dma/mtk-* · 2468 unmodified lines | |||
| 10808 | F: drivers/dma/mediatek/ | 10808 | F: drivers/dma/mediatek/ |
| 10809 | 10809 | ||
| 10810 | MEDIATEK ETHERNET DRIVER | 10810 | MEDIATEK ETHERNET DRIVER |
| 10811 | M: Felix Fietkau <nbd@openwrt.org> | 10811 | M: Felix Fietkau <nbd@nbd.name> |
| 10812 | M: John Crispin <john@phrozen.org> | 10812 | M: John Crispin <john@phrozen.org> |
| 10813 | M: Sean Wang <sean.wang@mediatek.com> | 10813 | M: Sean Wang <sean.wang@mediatek.com> |
| 10814 | M: Mark Lee <Mark-MC.Lee@mediatek.com> | 10814 | M: Mark Lee <Mark-MC.Lee@mediatek.com> |
| @@ -12695,13 +12695,13 @@ F: arch/mips/boot/dts/ralink/omega2p.dts · 1880 unmodified lines | |||
| 12695 | 12695 | ||
| 12696 | OP-TEE DRIVER | 12696 | OP-TEE DRIVER |
| 12697 | M: Jens Wiklander <jens.wiklander@linaro.org> | 12697 | M: Jens Wiklander <jens.wiklander@linaro.org> |
| 12698 | L: tee-dev@lists.linaro.org | 12698 | L: op-tee@lists.trustedfirmware.org |
| 12699 | S: Maintained | 12699 | S: Maintained |
| 12700 | F: drivers/tee/optee/ | 12700 | F: drivers/tee/optee/ |
| 12701 | 12701 | ||
| 12702 | OP-TEE RANDOM NUMBER GENERATOR (RNG) DRIVER | 12702 | OP-TEE RANDOM NUMBER GENERATOR (RNG) DRIVER |
| 12703 | M: Sumit Garg <sumit.garg@linaro.org> | 12703 | M: Sumit Garg <sumit.garg@linaro.org> |
| 12704 | L: tee-dev@lists.linaro.org | 12704 | L: op-tee@lists.trustedfirmware.org |
| 12705 | S: Maintained | 12705 | S: Maintained |
| 12706 | F: drivers/char/hw_random/optee-rng.c | 12706 | F: drivers/char/hw_random/optee-rng.c |
| 12707 | 12707 | ||
| @@ -14574,8 +14574,8 @@ RENESAS R-CAR THERMAL DRIVERS · 1866 unmodified lines | |||
| 14574 | M: Niklas Söderlund <niklas.soderlund@ragnatech.se> | 14574 | M: Niklas Söderlund <niklas.soderlund@ragnatech.se> |
| 14575 | L: linux-renesas-soc@vger.kernel.org | 14575 | L: linux-renesas-soc@vger.kernel.org |
| 14576 | S: Supported | 14576 | S: Supported |
| 14577 | F: Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.txt | 14577 | F: Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml |
| 14578 | F: Documentation/devicetree/bindings/thermal/rcar-thermal.txt | 14578 | F: Documentation/devicetree/bindings/thermal/rcar-thermal.yaml |
| 14579 | F: drivers/thermal/rcar_gen3_thermal.c | 14579 | F: drivers/thermal/rcar_gen3_thermal.c |
| 14580 | F: drivers/thermal/rcar_thermal.c | 14580 | F: drivers/thermal/rcar_thermal.c |
| 14581 | 14581 | ||
| @@ -14831,7 +14831,7 @@ S: Maintained · 249 unmodified lines | |||
| 14831 | F: drivers/video/fbdev/savage/ | 14831 | F: drivers/video/fbdev/savage/ |
| 14832 | 14832 | ||
| 14833 | S390 | 14833 | S390 |
| 14834 | M: Heiko Carstens <heiko.carstens@de.ibm.com> | 14834 | M: Heiko Carstens <hca@linux.ibm.com> |
| 14835 | M: Vasily Gorbik <gor@linux.ibm.com> | 14835 | M: Vasily Gorbik <gor@linux.ibm.com> |
| 14836 | M: Christian Borntraeger <borntraeger@de.ibm.com> | 14836 | M: Christian Borntraeger <borntraeger@de.ibm.com> |
| 14837 | L: linux-s390@vger.kernel.org | 14837 | L: linux-s390@vger.kernel.org |
| @@ -14862,7 +14862,7 @@ F: drivers/s390/block/dasd* · 24 unmodified lines | |||
| 14862 | F: include/linux/dasd_mod.h | 14862 | F: include/linux/dasd_mod.h |
| 14863 | 14863 | ||
| 14864 | S390 IOMMU (PCI) | 14864 | S390 IOMMU (PCI) |
| 14865 | M: Gerald Schaefer <gerald.schaefer@de.ibm.com> | 14865 | M: Gerald Schaefer <gerald.schaefer@linux.ibm.com> |
| 14866 | L: linux-s390@vger.kernel.org | 14866 | L: linux-s390@vger.kernel.org |
| 14867 | S: Supported | 14867 | S: Supported |
| 14868 | W: http://www.ibm.com/developerworks/linux/linux390/ | 14868 | W: http://www.ibm.com/developerworks/linux/linux390/ |
| @@ -14890,7 +14890,7 @@ F: drivers/s390/net/ · 21 unmodified lines | |||
| 14890 | 14890 | ||
| 14891 | S390 PCI SUBSYSTEM | 14891 | S390 PCI SUBSYSTEM |
| 14892 | M: Niklas Schnelle <schnelle@linux.ibm.com> | 14892 | M: Niklas Schnelle <schnelle@linux.ibm.com> |
| 14893 | M: Gerald Schaefer <gerald.schaefer@de.ibm.com> | 14893 | M: Gerald Schaefer <gerald.schaefer@linux.ibm.com> |
| 14894 | L: linux-s390@vger.kernel.org | 14894 | L: linux-s390@vger.kernel.org |
| 14895 | S: Supported | 14895 | S: Supported |
| 14896 | W: http://www.ibm.com/developerworks/linux/linux390/ | 14896 | W: http://www.ibm.com/developerworks/linux/linux390/ |
| @@ -16058,8 +16058,10 @@ SPARSE CHECKER · 1161 unmodified lines | |||
| 16058 | M: "Luc Van Oostenryck" <luc.vanoostenryck@gmail.com> | 16058 | M: "Luc Van Oostenryck" <luc.vanoostenryck@gmail.com> |
| 16059 | L: linux-sparse@vger.kernel.org | 16059 | L: linux-sparse@vger.kernel.org |
| 16060 | S: Maintained | 16060 | S: Maintained |
| 16061 | W: https://sparse.wiki.kernel.org/ | 16061 | W: https://sparse.docs.kernel.org/ |
| 16062 | T: git git://git.kernel.org/pub/scm/devel/sparse/sparse.git | 16062 | T: git git://git.kernel.org/pub/scm/devel/sparse/sparse.git |
| 16063 | Q: https://patchwork.kernel.org/project/linux-sparse/list/ | ||
| 16064 | B: https://bugzilla.kernel.org/enter_bug.cgi?component=Sparse&product=Tools | ||
| 16063 | F: include/linux/compiler.h | 16065 | F: include/linux/compiler.h |
| 16064 | 16066 | ||
| 16065 | SPEAR CLOCK FRAMEWORK SUPPORT | 16067 | SPEAR CLOCK FRAMEWORK SUPPORT |
| @@ -16772,7 +16774,7 @@ F: include/media/i2c/tw9910.h · 706 unmodified lines | |||
| 16772 | 16774 | ||
| 16773 | TEE SUBSYSTEM | 16775 | TEE SUBSYSTEM |
| 16774 | M: Jens Wiklander <jens.wiklander@linaro.org> | 16776 | M: Jens Wiklander <jens.wiklander@linaro.org> |
| 16775 | L: tee-dev@lists.linaro.org | 16777 | L: op-tee@lists.trustedfirmware.org |
| 16776 | S: Maintained | 16778 | S: Maintained |
| 16777 | F: Documentation/tee.txt | 16779 | F: Documentation/tee.txt |
| 16778 | F: drivers/tee/ | 16780 | F: drivers/tee/ |
| @@ -17511,7 +17513,7 @@ F: Documentation/admin-guide/ufs.rst · 732 unmodified lines | |||
| 17511 | F: fs/ufs/ | 17513 | F: fs/ufs/ |
| 17512 | 17514 | ||
| 17513 | UHID USERSPACE HID IO DRIVER | 17515 | UHID USERSPACE HID IO DRIVER |
| 17514 | M: David Herrmann <dh.herrmann@googlemail.com> | 17516 | M: David Rheinsberg <david.rheinsberg@gmail.com> |
| 17515 | L: linux-input@vger.kernel.org | 17517 | L: linux-input@vger.kernel.org |
| 17516 | S: Maintained | 17518 | S: Maintained |
| 17517 | F: drivers/hid/uhid.c | 17519 | F: drivers/hid/uhid.c |
| @@ -18470,7 +18472,7 @@ S: Maintained · 952 unmodified lines | |||
| 18470 | F: drivers/rtc/rtc-sd3078.c | 18472 | F: drivers/rtc/rtc-sd3078.c |
| 18471 | 18473 | ||
| 18472 | WIIMOTE HID DRIVER | 18474 | WIIMOTE HID DRIVER |
| 18473 | M: David Herrmann <dh.herrmann@googlemail.com> | 18475 | M: David Rheinsberg <david.rheinsberg@gmail.com> |
| 18474 | L: linux-input@vger.kernel.org | 18476 | L: linux-input@vger.kernel.org |
| 18475 | S: Maintained | 18477 | S: Maintained |
| 18476 | F: drivers/hid/hid-wiimote* | 18478 | F: drivers/hid/hid-wiimote* |
| @@ -2,7 +2,7 @@ · 1 unmodified line | |||
| 2 | VERSION = 5 | 2 | VERSION = 5 |
| 3 | PATCHLEVEL = 8 | 3 | PATCHLEVEL = 8 |
| 4 | SUBLEVEL = 0 | 4 | SUBLEVEL = 0 |
| 5 | EXTRAVERSION = -rc2 | 5 | EXTRAVERSION = -rc6 |
| 6 | NAME = Kleptomaniac Octopus | 6 | NAME = Kleptomaniac Octopus |
| 7 | 7 | ||
| 8 | # *DOCUMENTATION* | 8 | # *DOCUMENTATION* |
| @@ -970,8 +970,8 @@ LDFLAGS_vmlinux += --pack-dyn-relocs=relr · 961 unmodified lines | |||
| 970 | endif | 970 | endif |
| 971 | 971 | ||
| 972 | # Align the bit size of userspace programs with the kernel | 972 | # Align the bit size of userspace programs with the kernel |
| 973 | KBUILD_USERCFLAGS += $(filter -m32 -m64, $(KBUILD_CFLAGS)) | 973 | KBUILD_USERCFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CFLAGS)) |
| 974 | KBUILD_USERLDFLAGS += $(filter -m32 -m64, $(KBUILD_CFLAGS)) | 974 | KBUILD_USERLDFLAGS += $(filter -m32 -m64 --target=%, $(KBUILD_CFLAGS)) |
| 975 | 975 | ||
| 976 | # make the checker run with the right architecture | 976 | # make the checker run with the right architecture |
| 977 | CHECKFLAGS += --arch=$(ARCH) | 977 | CHECKFLAGS += --arch=$(ARCH) |
| @@ -170,6 +170,15 @@ config ARC_CPU_HS · 169 unmodified lines | |||
| 170 | 170 | ||
| 171 | endchoice | 171 | endchoice |
| 172 | 172 | ||
| 173 | config ARC_TUNE_MCPU | ||
| 174 | string "Override default -mcpu compiler flag" | ||
| 175 | default "" | ||
| 176 | help | ||
| 177 | Override default -mcpu=xxx compiler flag (which is set depending on | ||
| 178 | the ISA version) with the specified value. | ||
| 179 | NOTE: If specified flag isn't supported by current compiler the | ||
| 180 | ISA default value will be used as a fallback. | ||
| 181 | |||
| 173 | config CPU_BIG_ENDIAN | 182 | config CPU_BIG_ENDIAN |
| 174 | bool "Enable Big Endian Mode" | 183 | bool "Enable Big Endian Mode" |
| 175 | help | 184 | help |
| @@ -465,6 +474,12 @@ config ARC_IRQ_NO_AUTOSAVE · 289 unmodified lines | |||
| 465 | This is programmable and can be optionally disabled in which case | 474 | This is programmable and can be optionally disabled in which case |
| 466 | software INTERRUPT_PROLOGUE/EPILGUE do the needed work | 475 | software INTERRUPT_PROLOGUE/EPILGUE do the needed work |
| 467 | 476 | ||
| 477 | config ARC_LPB_DISABLE | ||
| 478 | bool "Disable loop buffer (LPB)" | ||
| 479 | help | ||
| 480 | On HS cores, loop buffer (LPB) is programmable in runtime and can | ||
| 481 | be optionally disabled. | ||
| 482 | |||
| 468 | endif # ISA_ARCV2 | 483 | endif # ISA_ARCV2 |
| 469 | 484 | ||
| 470 | endmenu # "ARC CPU Configuration" | 485 | endmenu # "ARC CPU Configuration" |
| @@ -10,8 +10,25 @@ CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux-) · 9 unmodified lines | |||
| 10 | endif | 10 | endif |
| 11 | 11 | ||
| 12 | cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__ | 12 | cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__ |
| 13 | cflags-$(CONFIG_ISA_ARCOMPACT) += -mA7 | 13 | |
| 14 | cflags-$(CONFIG_ISA_ARCV2) += -mcpu=hs38 | 14 | tune-mcpu-def-$(CONFIG_ISA_ARCOMPACT) := -mcpu=arc700 |
| 15 | tune-mcpu-def-$(CONFIG_ISA_ARCV2) := -mcpu=hs38 | ||
| 16 | |||
| 17 | ifeq ($(CONFIG_ARC_TUNE_MCPU),"") | ||
| 18 | cflags-y += $(tune-mcpu-def-y) | ||
| 19 | else | ||
| 20 | tune-mcpu := $(shell echo $(CONFIG_ARC_TUNE_MCPU)) | ||
| 21 | tune-mcpu-ok := $(call cc-option-yn, $(tune-mcpu)) | ||
| 22 | ifeq ($(tune-mcpu-ok),y) | ||
| 23 | cflags-y += $(tune-mcpu) | ||
| 24 | else | ||
| 25 | # The flag provided by 'CONFIG_ARC_TUNE_MCPU' option isn't known by this compiler | ||
| 26 | # (probably the compiler is too old). Use ISA default mcpu flag instead as a safe option. | ||
| 27 | $(warning ** WARNING ** CONFIG_ARC_TUNE_MCPU flag '$(tune-mcpu)' is unknown, fallback to '$(tune-mcpu-def-y)') | ||
| 28 | cflags-y += $(tune-mcpu-def-y) | ||
| 29 | endif | ||
| 30 | endif | ||
| 31 | |||
| 15 | 32 | ||
| 16 | ifdef CONFIG_ARC_CURR_IN_REG | 33 | ifdef CONFIG_ARC_CURR_IN_REG |
| 17 | # For a global register defintion, make sure it gets passed to every file | 34 | # For a global register defintion, make sure it gets passed to every file |
| @@ -19,7 +19,7 @@ · 18 unmodified lines | |||
| 19 | #define R_ARC_32_PCREL 0x31 | 19 | #define R_ARC_32_PCREL 0x31 |
| 20 | 20 | ||
| 21 | /*to set parameters in the core dumps */ | 21 | /*to set parameters in the core dumps */ |
| 22 | #define ELF_ARCH EM_ARCOMPACT | 22 | #define ELF_ARCH EM_ARC_INUSE |
| 23 | #define ELF_CLASS ELFCLASS32 | 23 | #define ELF_CLASS ELFCLASS32 |
| 24 | 24 | ||
| 25 | #ifdef CONFIG_CPU_BIG_ENDIAN | 25 | #ifdef CONFIG_CPU_BIG_ENDIAN |
| @@ -90,6 +90,9 @@ static inline void arch_local_irq_restore(unsigned long flags) · 89 unmodified lines | |||
| 90 | /* | 90 | /* |
| 91 | * Unconditionally Enable IRQs | 91 | * Unconditionally Enable IRQs |
| 92 | */ | 92 | */ |
| 93 | #ifdef CONFIG_ARC_COMPACT_IRQ_LEVELS | ||
| 94 | extern void arch_local_irq_enable(void); | ||
| 95 | #else | ||
| 93 | static inline void arch_local_irq_enable(void) | 96 | static inline void arch_local_irq_enable(void) |
| 94 | { | 97 | { |
| 95 | unsigned long temp; | 98 | unsigned long temp; |
| @@ -102,7 +105,7 @@ static inline void arch_local_irq_enable(void) · 6 unmodified lines | |||
| 102 | : "n"((STATUS_E1_MASK | STATUS_E2_MASK)) | 105 | : "n"((STATUS_E1_MASK | STATUS_E2_MASK)) |
| 103 | : "cc", "memory"); | 106 | : "cc", "memory"); |
| 104 | } | 107 | } |
| 105 | 108 | #endif | |
| 106 | 109 | ||
| 107 | /* | 110 | /* |
| 108 | * Unconditionally Disable IRQs | 111 | * Unconditionally Disable IRQs |
| @@ -165,7 +165,6 @@ END(EV_Extension) · 164 unmodified lines | |||
| 165 | tracesys: | 165 | tracesys: |
| 166 | ; save EFA in case tracer wants the PC of traced task | 166 | ; save EFA in case tracer wants the PC of traced task |
| 167 | ; using ERET won't work since next-PC has already committed | 167 | ; using ERET won't work since next-PC has already committed |
| 168 | lr r12, [efa] | ||
| 169 | GET_CURR_TASK_FIELD_PTR TASK_THREAD, r11 | 168 | GET_CURR_TASK_FIELD_PTR TASK_THREAD, r11 |
| 170 | st r12, [r11, THREAD_FAULT_ADDR] ; thread.fault_address | 169 | st r12, [r11, THREAD_FAULT_ADDR] ; thread.fault_address |
| 171 | 170 | ||
| @@ -208,15 +207,9 @@ tracesys_exit: · 36 unmodified lines | |||
| 208 | ; Breakpoint TRAP | 207 | ; Breakpoint TRAP |
| 209 | ; --------------------------------------------- | 208 | ; --------------------------------------------- |
| 210 | trap_with_param: | 209 | trap_with_param: |
| 211 | 210 | mov r0, r12 ; EFA in case ptracer/gdb wants stop_pc | |
| 212 | ; stop_pc info by gdb needs this info | ||
| 213 | lr r0, [efa] | ||
| 214 | mov r1, sp | 211 | mov r1, sp |
| 215 | 212 | ||
| 216 | ; Now that we have read EFA, it is safe to do "fake" rtie | ||
| 217 | ; and get out of CPU exception mode | ||
| 218 | FAKE_RET_FROM_EXCPN | ||
| 219 | |||
| 220 | ; Save callee regs in case gdb wants to have a look | 213 | ; Save callee regs in case gdb wants to have a look |
| 221 | ; SP will grow up by size of CALLEE Reg-File | 214 | ; SP will grow up by size of CALLEE Reg-File |
| 222 | ; NOTE: clobbers r12 | 215 | ; NOTE: clobbers r12 |
| @@ -243,6 +236,10 @@ ENTRY(EV_Trap) · 20 unmodified lines | |||
| 243 | 236 | ||
| 244 | EXCEPTION_PROLOGUE | 237 | EXCEPTION_PROLOGUE |
| 245 | 238 | ||
| 239 | lr r12, [efa] | ||
| 240 | |||
| 241 | FAKE_RET_FROM_EXCPN | ||
| 242 | |||
| 246 | ;============ TRAP 1 :breakpoints | 243 | ;============ TRAP 1 :breakpoints |
| 247 | ; Check ECR for trap with arg (PROLOGUE ensures r10 has ECR) | 244 | ; Check ECR for trap with arg (PROLOGUE ensures r10 has ECR) |
| 248 | bmsk.f 0, r10, 7 | 245 | bmsk.f 0, r10, 7 |
| @@ -250,9 +247,6 @@ ENTRY(EV_Trap) · 1 unmodified line | |||
| 250 | 247 | ||
| 251 | ;============ TRAP (no param): syscall top level | 248 | ;============ TRAP (no param): syscall top level |
| 252 | 249 | ||
| 253 | ; First return from Exception to pure K mode (Exception/IRQs renabled) | ||
| 254 | FAKE_RET_FROM_EXCPN | ||
| 255 | |||
| 256 | ; If syscall tracing ongoing, invoke pre-post-hooks | 250 | ; If syscall tracing ongoing, invoke pre-post-hooks |
| 257 | GET_CURR_THR_INFO_FLAGS r10 | 251 | GET_CURR_THR_INFO_FLAGS r10 |
| 258 | btst r10, TIF_SYSCALL_TRACE | 252 | btst r10, TIF_SYSCALL_TRACE |
| @@ -59,6 +59,14 @@ · 58 unmodified lines | |||
| 59 | bclr r5, r5, STATUS_AD_BIT | 59 | bclr r5, r5, STATUS_AD_BIT |
| 60 | #endif | 60 | #endif |
| 61 | kflag r5 | 61 | kflag r5 |
| 62 | |||
| 63 | #ifdef CONFIG_ARC_LPB_DISABLE | ||
| 64 | lr r5, [ARC_REG_LPB_BUILD] | ||
| 65 | breq r5, 0, 1f ; LPB doesn't exist | ||
| 66 | mov r5, 1 | ||
| 67 | sr r5, [ARC_REG_LPB_CTRL] | ||
| 68 | 1: | ||
| 69 | #endif /* CONFIG_ARC_LPB_DISABLE */ | ||
| 62 | #endif | 70 | #endif |
| 63 | ; Config DSP_CTRL properly, so kernel may use integer multiply, | 71 | ; Config DSP_CTRL properly, so kernel may use integer multiply, |
| 64 | ; multiply-accumulate, and divide operations | 72 | ; multiply-accumulate, and divide operations |
| @@ -58,10 +58,12 @@ static const struct id_to_str arc_legacy_rel[] = { · 57 unmodified lines | |||
| 58 | { 0x00, NULL } | 58 | { 0x00, NULL } |
| 59 | }; | 59 | }; |
| 60 | 60 | ||
| 61 | static const struct id_to_str arc_cpu_rel[] = { | 61 | static const struct id_to_str arc_hs_ver54_rel[] = { |
| 62 | /* UARCH.MAJOR, Release */ | 62 | /* UARCH.MAJOR, Release */ |
| 63 | { 0, "R3.10a"}, | 63 | { 0, "R3.10a"}, |
| 64 | { 1, "R3.50a"}, | 64 | { 1, "R3.50a"}, |
| 65 | { 2, "R3.60a"}, | ||
| 66 | { 3, "R4.00a"}, | ||
| 65 | { 0xFF, NULL } | 67 | { 0xFF, NULL } |
| 66 | }; | 68 | }; |
| 67 | 69 | ||
| @@ -117,12 +119,6 @@ static void decode_arc_core(struct cpuinfo_arc *cpu) · 49 unmodified lines | |||
| 117 | struct bcr_uarch_build_arcv2 uarch; | 119 | struct bcr_uarch_build_arcv2 uarch; |
| 118 | const struct id_to_str *tbl; | 120 | const struct id_to_str *tbl; |
| 119 | 121 | ||
| 120 | /* | ||
| 121 | * Up until (including) the first core4 release (0x54) things were | ||
| 122 | * simple: AUX IDENTITY.ARCVER was sufficient to identify arc family | ||
| 123 | * and release: 0x50 to 0x53 was HS38, 0x54 was HS48 (dual issue) | ||
| 124 | */ | ||
| 125 | |||
| 126 | if (cpu->core.family < 0x54) { /* includes arc700 */ | 122 | if (cpu->core.family < 0x54) { /* includes arc700 */ |
| 127 | 123 | ||
| 128 | for (tbl = &arc_legacy_rel[0]; tbl->id != 0; tbl++) { | 124 | for (tbl = &arc_legacy_rel[0]; tbl->id != 0; tbl++) { |
| @@ -143,11 +139,10 @@ static void decode_arc_core(struct cpuinfo_arc *cpu) · 14 unmodified lines | |||
| 143 | } | 139 | } |
| 144 | 140 | ||
| 145 | /* | 141 | /* |
| 146 | * However the subsequent HS release (same 0x54) allow HS38 or HS48 | 142 | * Initial HS cores bumped AUX IDENTITY.ARCVER for each release until |
| 147 | * configurations and encode this info in a different BCR. | 143 | * ARCVER 0x54 which introduced AUX MICRO_ARCH_BUILD and subsequent |
| 148 | * The BCR was introduced in 0x54 so can't be read unconditionally. | 144 | * releases only update it. |
| 149 | */ | 145 | */ |
| 150 | |||
| 151 | READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch); | 146 | READ_BCR(ARC_REG_MICRO_ARCH_BCR, uarch); |
| 152 | 147 | ||
| 153 | if (uarch.prod == 4) { | 148 | if (uarch.prod == 4) { |
| @@ -158,7 +153,7 @@ static void decode_arc_core(struct cpuinfo_arc *cpu) · 4 unmodified lines | |||
| 158 | cpu->name = "HS38"; | 153 | cpu->name = "HS38"; |
| 159 | } | 154 | } |
| 160 | 155 | ||
| 161 | for (tbl = &arc_cpu_rel[0]; tbl->id != 0xFF; tbl++) { | 156 | for (tbl = &arc_hs_ver54_rel[0]; tbl->id != 0xFF; tbl++) { |
| 162 | if (uarch.maj == tbl->id) { | 157 | if (uarch.maj == tbl->id) { |
| 163 | cpu->release = tbl->str; | 158 | cpu->release = tbl->str; |
| 164 | break; | 159 | break; |
| @@ -369,7 +369,7 @@ · 368 unmodified lines | |||
| 369 | &mmc2 { | 369 | &mmc2 { |
| 370 | status = "okay"; | 370 | status = "okay"; |
| 371 | vmmc-supply = <&wl12xx_vmmc>; | 371 | vmmc-supply = <&wl12xx_vmmc>; |
| 372 | ti,non-removable; | 372 | non-removable; |
| 373 | bus-width = <4>; | 373 | bus-width = <4>; |
| 374 | cap-power-off-card; | 374 | cap-power-off-card; |
| 375 | pinctrl-names = "default"; | 375 | pinctrl-names = "default"; |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | |||
| 22 | pinctrl-0 = <&emmc_pins>; | 22 | pinctrl-0 = <&emmc_pins>; |
| 23 | bus-width = <8>; | 23 | bus-width = <8>; |
| 24 | status = "okay"; | 24 | status = "okay"; |
| 25 | non-removable; | ||
| 25 | }; | 26 | }; |
| 26 | 27 | ||
| 27 | &am33xx_pinmux { | 28 | &am33xx_pinmux { |
| @@ -75,7 +75,6 @@ · 74 unmodified lines | |||
| 75 | bus-width = <4>; | 75 | bus-width = <4>; |
| 76 | non-removable; | 76 | non-removable; |
| 77 | cap-power-off-card; | 77 | cap-power-off-card; |
| 78 | ti,needs-special-hs-handling; | ||
| 79 | keep-power-in-suspend; | 78 | keep-power-in-suspend; |
| 80 | pinctrl-names = "default"; | 79 | pinctrl-names = "default"; |
| 81 | pinctrl-0 = <&mmc3_pins &wl18xx_pins>; | 80 | pinctrl-0 = <&mmc3_pins &wl18xx_pins>; |
| @@ -367,7 +367,6 @@ · 366 unmodified lines | |||
| 367 | bus-width = <4>; | 367 | bus-width = <4>; |
| 368 | non-removable; | 368 | non-removable; |
| 369 | cap-power-off-card; | 369 | cap-power-off-card; |
| 370 | ti,needs-special-hs-handling; | ||
| 371 | keep-power-in-suspend; | 370 | keep-power-in-suspend; |
| 372 | pinctrl-names = "default"; | 371 | pinctrl-names = "default"; |
| 373 | pinctrl-0 = <&mmc3_pins &wl18xx_pins>; | 372 | pinctrl-0 = <&mmc3_pins &wl18xx_pins>; |
| @@ -75,7 +75,6 @@ · 74 unmodified lines | |||
| 75 | bus-width = <4>; | 75 | bus-width = <4>; |
| 76 | non-removable; | 76 | non-removable; |
| 77 | cap-power-off-card; | 77 | cap-power-off-card; |
| 78 | ti,needs-special-hs-handling; | ||
| 79 | keep-power-in-suspend; | 78 | keep-power-in-suspend; |
| 80 | pinctrl-names = "default"; | 79 | pinctrl-names = "default"; |
| 81 | pinctrl-0 = <&mmc3_pins &wl18xx_pins>; | 80 | pinctrl-0 = <&mmc3_pins &wl18xx_pins>; |
| @@ -743,8 +743,7 @@ · 742 unmodified lines | |||
| 743 | bus-width = <4>; | 743 | bus-width = <4>; |
| 744 | pinctrl-names = "default"; | 744 | pinctrl-names = "default"; |
| 745 | pinctrl-0 = <&mmc3_pins &wlan_pins>; | 745 | pinctrl-0 = <&mmc3_pins &wlan_pins>; |
| 746 | ti,non-removable; | 746 | non-removable; |
| 747 | ti,needs-special-hs-handling; | ||
| 748 | cap-power-off-card; | 747 | cap-power-off-card; |
| 749 | keep-power-in-suspend; | 748 | keep-power-in-suspend; |
| 750 | 749 | ||
| @@ -655,7 +655,7 @@ · 654 unmodified lines | |||
| 655 | &mmc2 { | 655 | &mmc2 { |
| 656 | status = "okay"; | 656 | status = "okay"; |
| 657 | vmmc-supply = <&wl12xx_vmmc>; | 657 | vmmc-supply = <&wl12xx_vmmc>; |
| 658 | ti,non-removable; | 658 | non-removable; |
| 659 | bus-width = <4>; | 659 | bus-width = <4>; |
| 660 | cap-power-off-card; | 660 | cap-power-off-card; |
| 661 | keep-power-in-suspend; | 661 | keep-power-in-suspend; |
| @@ -339,7 +339,7 @@ · 338 unmodified lines | |||
| 339 | pinctrl-0 = <&emmc_pins>; | 339 | pinctrl-0 = <&emmc_pins>; |
| 340 | vmmc-supply = <&vmmcsd_fixed>; | 340 | vmmc-supply = <&vmmcsd_fixed>; |
| 341 | bus-width = <8>; | 341 | bus-width = <8>; |
| 342 | ti,non-removable; | 342 | non-removable; |
| 343 | status = "okay"; | 343 | status = "okay"; |
| 344 | }; | 344 | }; |
| 345 | 345 | ||
| @@ -159,7 +159,7 @@ · 158 unmodified lines | |||
| 159 | vmmc-supply = <&vmmcsd_fixed>; | 159 | vmmc-supply = <&vmmcsd_fixed>; |
| 160 | bus-width = <8>; | 160 | bus-width = <8>; |
| 161 | pinctrl-0 = <&mmc1_pins_default>; | 161 | pinctrl-0 = <&mmc1_pins_default>; |
| 162 | ti,non-removable; | 162 | non-removable; |
| 163 | status = "okay"; | 163 | status = "okay"; |
| 164 | }; | 164 | }; |
| 165 | 165 | ||
| @@ -451,7 +451,7 @@ · 450 unmodified lines | |||
| 451 | vmmc-supply = <&vmmcsd_fixed>; | 451 | vmmc-supply = <&vmmcsd_fixed>; |
| 452 | bus-width = <8>; | 452 | bus-width = <8>; |
| 453 | pinctrl-0 = <&mmc2_pins_default>; | 453 | pinctrl-0 = <&mmc2_pins_default>; |
| 454 | ti,non-removable; | 454 | non-removable; |
| 455 | status = "okay"; | 455 | status = "okay"; |
| 456 | }; | 456 | }; |
| 457 | 457 | ||
| @@ -341,7 +341,7 @@ · 340 unmodified lines | |||
| 341 | pinctrl-0 = <&emmc_pins>; | 341 | pinctrl-0 = <&emmc_pins>; |
| 342 | vmmc-supply = <&ldo3_reg>; | 342 | vmmc-supply = <&ldo3_reg>; |
| 343 | bus-width = <8>; | 343 | bus-width = <8>; |
| 344 | ti,non-removable; | 344 | non-removable; |
| 345 | }; | 345 | }; |
| 346 | 346 | ||
| 347 | &mmc3 { | 347 | &mmc3 { |
| @@ -351,7 +351,7 @@ · 3 unmodified lines | |||
| 351 | pinctrl-0 = <&wireless_pins>; | 351 | pinctrl-0 = <&wireless_pins>; |
| 352 | vmmmc-supply = <&v3v3c_reg>; | 352 | vmmmc-supply = <&v3v3c_reg>; |
| 353 | bus-width = <4>; | 353 | bus-width = <4>; |
| 354 | ti,non-removable; | 354 | non-removable; |
| 355 | dmas = <&edma_xbar 12 0 1 | 355 | dmas = <&edma_xbar 12 0 1 |
| 356 | &edma_xbar 13 0 2>; | 356 | &edma_xbar 13 0 2>; |
| 357 | dma-names = "tx", "rx"; | 357 | dma-names = "tx", "rx"; |
| @@ -69,7 +69,7 @@ · 68 unmodified lines | |||
| 69 | pinctrl-0 = <&emmc_pins>; | 69 | pinctrl-0 = <&emmc_pins>; |
| 70 | vmmc-supply = <&vmmc_reg>; | 70 | vmmc-supply = <&vmmc_reg>; |
| 71 | bus-width = <8>; | 71 | bus-width = <8>; |
| 72 | ti,non-removable; | 72 | non-removable; |
| 73 | status = "disabled"; | 73 | status = "disabled"; |
| 74 | }; | 74 | }; |
| 75 | 75 | ||
| @@ -88,7 +88,6 @@ · 87 unmodified lines | |||
| 88 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) | 88 | AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) |
| 89 | AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) | 89 | AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) |
| 90 | AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) | 90 | AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) |
| 91 | AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT, MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */ | ||
| 92 | >; | 91 | >; |
| 93 | }; | 92 | }; |
| 94 | 93 | ||
| @@ -1335,10 +1335,8 @@ · 1334 unmodified lines | |||
| 1335 | ranges = <0x0 0x60000 0x1000>; | 1335 | ranges = <0x0 0x60000 0x1000>; |
| 1336 | 1336 | ||
| 1337 | mmc1: mmc@0 { | 1337 | mmc1: mmc@0 { |
| 1338 | compatible = "ti,omap4-hsmmc"; | 1338 | compatible = "ti,am335-sdhci"; |
| 1339 | ti,dual-volt; | ||
| 1340 | ti,needs-special-reset; | 1339 | ti,needs-special-reset; |
| 1341 | ti,needs-special-hs-handling; | ||
| 1342 | dmas = <&edma_xbar 24 0 0 | 1340 | dmas = <&edma_xbar 24 0 0 |
| 1343 | &edma_xbar 25 0 0>; | 1341 | &edma_xbar 25 0 0>; |
| 1344 | dma-names = "tx", "rx"; | 1342 | dma-names = "tx", "rx"; |
| @@ -1816,7 +1814,7 @@ · 471 unmodified lines | |||
| 1816 | ranges = <0x0 0xd8000 0x1000>; | 1814 | ranges = <0x0 0xd8000 0x1000>; |
| 1817 | 1815 | ||
| 1818 | mmc2: mmc@0 { | 1816 | mmc2: mmc@0 { |
| 1819 | compatible = "ti,omap4-hsmmc"; | 1817 | compatible = "ti,am335-sdhci"; |
| 1820 | ti,needs-special-reset; | 1818 | ti,needs-special-reset; |
| 1821 | dmas = <&edma 2 0 | 1819 | dmas = <&edma 2 0 |
| 1822 | &edma 3 0>; | 1820 | &edma 3 0>; |
| @@ -322,10 +322,11 @@ · 321 unmodified lines | |||
| 322 | ranges = <0x0 0x47810000 0x1000>; | 322 | ranges = <0x0 0x47810000 0x1000>; |
| 323 | 323 | ||
| 324 | mmc3: mmc@0 { | 324 | mmc3: mmc@0 { |
| 325 | compatible = "ti,omap4-hsmmc"; | 325 | compatible = "ti,am335-sdhci"; |
| 326 | ti,needs-special-reset; | 326 | ti,needs-special-reset; |
| 327 | interrupts = <29>; | 327 | interrupts = <29>; |
| 328 | reg = <0x0 0x1000>; | 328 | reg = <0x0 0x1000>; |
| 329 | status = "disabled"; | ||
| 329 | }; | 330 | }; |
| 330 | }; | 331 | }; |
| 331 | 332 | ||
| @@ -335,7 +336,7 @@ · 3 unmodified lines | |||
| 335 | <0x47400010 0x4>; | 336 | <0x47400010 0x4>; |
| 336 | reg-names = "rev", "sysc"; | 337 | reg-names = "rev", "sysc"; |
| 337 | ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | | 338 | ti,sysc-mask = <(SYSC_OMAP4_FREEEMU | |
| 338 | SYSC_OMAP2_SOFTRESET)>; | 339 | SYSC_OMAP4_SOFTRESET)>; |
| 339 | ti,sysc-midle = <SYSC_IDLE_FORCE>, | 340 | ti,sysc-midle = <SYSC_IDLE_FORCE>, |
| 340 | <SYSC_IDLE_NO>, | 341 | <SYSC_IDLE_NO>, |
| 341 | <SYSC_IDLE_SMART>; | 342 | <SYSC_IDLE_SMART>; |
| @@ -347,7 +348,7 @@ · 5 unmodified lines | |||
| 347 | clock-names = "fck"; | 348 | clock-names = "fck"; |
| 348 | #address-cells = <1>; | 349 | #address-cells = <1>; |
| 349 | #size-cells = <1>; | 350 | #size-cells = <1>; |
| 350 | ranges = <0x0 0x47400000 0x5000>; | 351 | ranges = <0x0 0x47400000 0x8000>; |
| 351 | 352 | ||
| 352 | usb0_phy: usb-phy@1300 { | 353 | usb0_phy: usb-phy@1300 { |
| 353 | compatible = "ti,am335x-usb-phy"; | 354 | compatible = "ti,am335x-usb-phy"; |
| @@ -316,10 +316,11 @@ · 315 unmodified lines | |||
| 316 | ranges = <0x0 0x47810000 0x1000>; | 316 | ranges = <0x0 0x47810000 0x1000>; |
| 317 | 317 | ||
| 318 | mmc3: mmc@0 { | 318 | mmc3: mmc@0 { |
| 319 | compatible = "ti,omap4-hsmmc"; | 319 | compatible = "ti,am437-sdhci"; |
| 320 | ti,needs-special-reset; | 320 | ti,needs-special-reset; |
| 321 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; | 321 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; |
| 322 | reg = <0x0 0x1000>; | 322 | reg = <0x0 0x1000>; |
| 323 | status = "disabled"; | ||
| 323 | }; | 324 | }; |
| 324 | }; | 325 | }; |
| 325 | 326 | ||
| @@ -291,7 +291,7 @@ · 290 unmodified lines | |||
| 291 | pinctrl-0 = <&emmc_pins>; | 291 | pinctrl-0 = <&emmc_pins>; |
| 292 | vmmc-supply = <&vmmc_3v3>; | 292 | vmmc-supply = <&vmmc_3v3>; |
| 293 | bus-width = <8>; | 293 | bus-width = <8>; |
| 294 | ti,non-removable; | 294 | non-removable; |
| 295 | }; | 295 | }; |
| 296 | 296 | ||
| 297 | &spi0 { | 297 | &spi0 { |
| @@ -91,22 +91,6 @@ · 90 unmodified lines | |||
| 91 | 91 | ||
| 92 | backlight = <&lcd_bl>; | 92 | backlight = <&lcd_bl>; |
| 93 | 93 | ||
| 94 | panel-timing { | ||
| 95 | clock-frequency = <33000000>; | ||
| 96 | hactive = <800>; | ||
| 97 | vactive = <480>; | ||
| 98 | hfront-porch = <210>; | ||
| 99 | hback-porch = <16>; | ||
| 100 | hsync-len = <30>; | ||
| 101 | vback-porch = <10>; | ||
| 102 | vfront-porch = <22>; | ||
| 103 | vsync-len = <13>; | ||
| 104 | hsync-active = <0>; | ||
| 105 | vsync-active = <0>; | ||
| 106 | de-active = <1>; | ||
| 107 | pixelclk-active = <1>; | ||
| 108 | }; | ||
| 109 | |||
| 110 | port { | 94 | port { |
| 111 | lcd_in: endpoint { | 95 | lcd_in: endpoint { |
| 112 | remote-endpoint = <&dpi_out>; | 96 | remote-endpoint = <&dpi_out>; |
| @@ -869,7 +853,7 @@ · 756 unmodified lines | |||
| 869 | pinctrl-names = "default", "sleep"; | 853 | pinctrl-names = "default", "sleep"; |
| 870 | pinctrl-0 = <&emmc_pins_default>; | 854 | pinctrl-0 = <&emmc_pins_default>; |
| 871 | pinctrl-1 = <&emmc_pins_sleep>; | 855 | pinctrl-1 = <&emmc_pins_sleep>; |
| 872 | ti,non-removable; | 856 | non-removable; |
| 873 | }; | 857 | }; |
| 874 | 858 | ||
| 875 | &mmc3 { | 859 | &mmc3 { |
| @@ -886,7 +870,7 @@ · 10 unmodified lines | |||
| 886 | pinctrl-1 = <&mmc3_pins_sleep>; | 870 | pinctrl-1 = <&mmc3_pins_sleep>; |
| 887 | cap-power-off-card; | 871 | cap-power-off-card; |
| 888 | keep-power-in-suspend; | 872 | keep-power-in-suspend; |
| 889 | ti,non-removable; | 873 | non-removable; |
| 890 | 874 | ||
| 891 | #address-cells = <1>; | 875 | #address-cells = <1>; |
| 892 | #size-cells = <0>; | 876 | #size-cells = <0>; |
| @@ -1083,9 +1083,8 @@ · 1082 unmodified lines | |||
| 1083 | ranges = <0x0 0x60000 0x1000>; | 1083 | ranges = <0x0 0x60000 0x1000>; |
| 1084 | 1084 | ||
| 1085 | mmc1: mmc@0 { | 1085 | mmc1: mmc@0 { |
| 1086 | compatible = "ti,omap4-hsmmc"; | 1086 | compatible = "ti,am437-sdhci"; |
| 1087 | reg = <0x0 0x1000>; | 1087 | reg = <0x0 0x1000>; |
| 1088 | ti,dual-volt; | ||
| 1089 | ti,needs-special-reset; | 1088 | ti,needs-special-reset; |
| 1090 | dmas = <&edma 24 0>, | 1089 | dmas = <&edma 24 0>, |
| 1091 | <&edma 25 0>; | 1090 | <&edma 25 0>; |
| @@ -1541,8 +1540,9 @@ · 449 unmodified lines | |||
| 1541 | reg = <0xcc020 0x4>; | 1540 | reg = <0xcc020 0x4>; |
| 1542 | reg-names = "rev"; | 1541 | reg-names = "rev"; |
| 1543 | /* Domains (P, C): per_pwrdm, l4ls_clkdm */ | 1542 | /* Domains (P, C): per_pwrdm, l4ls_clkdm */ |
| 1544 | clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>; | 1543 | clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>, |
| 1545 | clock-names = "fck"; | 1544 | <&dcan0_fck>; |
| 1545 | clock-names = "fck", "osc"; | ||
| 1546 | #address-cells = <1>; | 1546 | #address-cells = <1>; |
| 1547 | #size-cells = <1>; | 1547 | #size-cells = <1>; |
| 1548 | ranges = <0x0 0xcc000 0x2000>; | 1548 | ranges = <0x0 0xcc000 0x2000>; |
| @@ -1550,6 +1550,8 @@ · 1 unmodified line | |||
| 1550 | dcan0: can@0 { | 1550 | dcan0: can@0 { |
| 1551 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; | 1551 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; |
| 1552 | reg = <0x0 0x2000>; | 1552 | reg = <0x0 0x2000>; |
| 1553 | clocks = <&dcan0_fck>; | ||
| 1554 | clock-names = "fck"; | ||
| 1553 | syscon-raminit = <&scm_conf 0x644 0>; | 1555 | syscon-raminit = <&scm_conf 0x644 0>; |
| 1554 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; | 1556 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; |
| 1555 | status = "disabled"; | 1557 | status = "disabled"; |
| @@ -1561,8 +1563,9 @@ · 5 unmodified lines | |||
| 1561 | reg = <0xd0020 0x4>; | 1563 | reg = <0xd0020 0x4>; |
| 1562 | reg-names = "rev"; | 1564 | reg-names = "rev"; |
| 1563 | /* Domains (P, C): per_pwrdm, l4ls_clkdm */ | 1565 | /* Domains (P, C): per_pwrdm, l4ls_clkdm */ |
| 1564 | clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>; | 1566 | clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>, |
| 1565 | clock-names = "fck"; | 1567 | <&dcan1_fck>; |
| 1568 | clock-names = "fck", "osc"; | ||
| 1566 | #address-cells = <1>; | 1569 | #address-cells = <1>; |
| 1567 | #size-cells = <1>; | 1570 | #size-cells = <1>; |
| 1568 | ranges = <0x0 0xd0000 0x2000>; | 1571 | ranges = <0x0 0xd0000 0x2000>; |
| @@ -1570,6 +1573,8 @@ · 1 unmodified line | |||
| 1570 | dcan1: can@0 { | 1573 | dcan1: can@0 { |
| 1571 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; | 1574 | compatible = "ti,am4372-d_can", "ti,am3352-d_can"; |
| 1572 | reg = <0x0 0x2000>; | 1575 | reg = <0x0 0x2000>; |
| 1576 | clocks = <&dcan1_fck>; | ||
| 1577 | clock-name = "fck"; | ||
| 1573 | syscon-raminit = <&scm_conf 0x644 1>; | 1578 | syscon-raminit = <&scm_conf 0x644 1>; |
| 1574 | interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; | 1579 | interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; |
| 1575 | status = "disabled"; | 1580 | status = "disabled"; |
| @@ -1598,7 +1603,7 @@ · 22 unmodified lines | |||
| 1598 | ranges = <0x0 0xd8000 0x1000>; | 1603 | ranges = <0x0 0xd8000 0x1000>; |
| 1599 | 1604 | ||
| 1600 | mmc2: mmc@0 { | 1605 | mmc2: mmc@0 { |
| 1601 | compatible = "ti,omap4-hsmmc"; | 1606 | compatible = "ti,am437-sdhci"; |
| 1602 | reg = <0x0 0x1000>; | 1607 | reg = <0x0 0x1000>; |
| 1603 | ti,needs-special-reset; | 1608 | ti,needs-special-reset; |
| 1604 | dmas = <&edma 2 0>, | 1609 | dmas = <&edma 2 0>, |
| @@ -134,22 +134,6 @@ · 133 unmodified lines | |||
| 134 | 134 | ||
| 135 | enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; | 135 | enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
| 136 | 136 | ||
| 137 | panel-timing { | ||
| 138 | clock-frequency = <9000000>; | ||
| 139 | hactive = <480>; | ||
| 140 | vactive = <272>; | ||
| 141 | hfront-porch = <2>; | ||
| 142 | hback-porch = <2>; | ||
| 143 | hsync-len = <41>; | ||
| 144 | vfront-porch = <2>; | ||
| 145 | vback-porch = <2>; | ||
| 146 | vsync-len = <10>; | ||
| 147 | hsync-active = <0>; | ||
| 148 | vsync-active = <0>; | ||
| 149 | de-active = <1>; | ||
| 150 | pixelclk-active = <1>; | ||
| 151 | }; | ||
| 152 | |||
| 153 | port { | 137 | port { |
| 154 | lcd_in: endpoint { | 138 | lcd_in: endpoint { |
| 155 | remote-endpoint = <&dpi_out>; | 139 | remote-endpoint = <&dpi_out>; |
| @@ -719,7 +703,7 @@ · 563 unmodified lines | |||
| 719 | pinctrl-1 = <&mmc3_pins_sleep>; | 703 | pinctrl-1 = <&mmc3_pins_sleep>; |
| 720 | cap-power-off-card; | 704 | cap-power-off-card; |
| 721 | keep-power-in-suspend; | 705 | keep-power-in-suspend; |
| 722 | ti,non-removable; | 706 | non-removable; |
| 723 | 707 | ||
| 724 | #address-cells = <1>; | 708 | #address-cells = <1>; |
| 725 | #size-cells = <0>; | 709 | #size-cells = <0>; |
| @@ -47,22 +47,6 @@ · 46 unmodified lines | |||
| 47 | 47 | ||
| 48 | backlight = <&lcd_bl>; | 48 | backlight = <&lcd_bl>; |
| 49 | 49 | ||
| 50 | panel-timing { | ||
| 51 | clock-frequency = <33000000>; | ||
| 52 | hactive = <800>; | ||
| 53 | vactive = <480>; | ||
| 54 | hfront-porch = <210>; | ||
| 55 | hback-porch = <16>; | ||
| 56 | hsync-len = <30>; | ||
| 57 | vback-porch = <10>; | ||
| 58 | vfront-porch = <22>; | ||
| 59 | vsync-len = <13>; | ||
| 60 | hsync-active = <0>; | ||
| 61 | vsync-active = <0>; | ||
| 62 | de-active = <1>; | ||
| 63 | pixelclk-active = <1>; | ||
| 64 | }; | ||
| 65 | |||
| 66 | port { | 50 | port { |
| 67 | lcd_in: endpoint { | 51 | lcd_in: endpoint { |
| 68 | remote-endpoint = <&dpi_out>; | 52 | remote-endpoint = <&dpi_out>; |
| @@ -505,7 +505,7 @@ · 504 unmodified lines | |||
| 505 | 505 | ||
| 506 | &cpsw_emac0 { | 506 | &cpsw_emac0 { |
| 507 | phy-handle = <&phy0>; | 507 | phy-handle = <&phy0>; |
| 508 | phy-mode = "rgmii"; | 508 | phy-mode = "rgmii-rxid"; |
| 509 | }; | 509 | }; |
| 510 | 510 | ||
| 511 | &ocp { | 511 | &ocp { |
| @@ -200,7 +200,7 @@ · 199 unmodified lines | |||
| 200 | status = "disabled"; | 200 | status = "disabled"; |
| 201 | }; | 201 | }; |
| 202 | 202 | ||
| 203 | dma@20000 { | 203 | dma: dma@20000 { |
| 204 | compatible = "arm,pl330", "arm,primecell"; | 204 | compatible = "arm,pl330", "arm,primecell"; |
| 205 | reg = <0x20000 0x1000>; | 205 | reg = <0x20000 0x1000>; |
| 206 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, | 206 | interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, |
| @@ -215,6 +215,8 @@ · 8 unmodified lines | |||
| 215 | clocks = <&iprocslow>; | 215 | clocks = <&iprocslow>; |
| 216 | clock-names = "apb_pclk"; | 216 | clock-names = "apb_pclk"; |
| 217 | #dma-cells = <1>; | 217 | #dma-cells = <1>; |
| 218 | dma-coherent; | ||
| 219 | status = "disabled"; | ||
| 218 | }; | 220 | }; |
| 219 | 221 | ||
| 220 | sdio: sdhci@21000 { | 222 | sdio: sdhci@21000 { |
| @@ -257,10 +259,10 @@ · 36 unmodified lines | |||
| 257 | status = "disabled"; | 259 | status = "disabled"; |
| 258 | }; | 260 | }; |
| 259 | 261 | ||
| 260 | mailbox: mailbox@25000 { | 262 | mailbox: mailbox@25c00 { |
| 261 | compatible = "brcm,iproc-fa2-mbox"; | 263 | compatible = "brcm,iproc-fa2-mbox"; |
| 262 | reg = <0x25000 0x445>; | 264 | reg = <0x25c00 0x400>; |
| 263 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; | 265 | interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; |
| 264 | #mbox-cells = <1>; | 266 | #mbox-cells = <1>; |
| 265 | brcm,rx-status-len = <32>; | 267 | brcm,rx-status-len = <32>; |
| 266 | brcm,use-bcm-hdr; | 268 | brcm,use-bcm-hdr; |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | |||
| 17 | }; | 17 | }; |
| 18 | 18 | ||
| 19 | memory { | 19 | memory { |
| 20 | device_type = "memory"; | ||
| 20 | reg = <0x00000000 0x08000000 | 21 | reg = <0x00000000 0x08000000 |
| 21 | 0x88000000 0x18000000>; | 22 | 0x88000000 0x18000000>; |
| 22 | }; | 23 | }; |
| @@ -58,6 +58,10 @@ · 57 unmodified lines | |||
| 58 | 58 | ||
| 59 | /* USB 3 support needed to be complete */ | 59 | /* USB 3 support needed to be complete */ |
| 60 | 60 | ||
| 61 | &dma { | ||
| 62 | status = "okay"; | ||
| 63 | }; | ||
| 64 | |||
| 61 | &amac0 { | 65 | &amac0 { |
| 62 | status = "okay"; | 66 | status = "okay"; |
| 63 | }; | 67 | }; |
| @@ -58,6 +58,10 @@ · 57 unmodified lines | |||
| 58 | 58 | ||
| 59 | /* USB 3 support needed to be complete */ | 59 | /* USB 3 support needed to be complete */ |
| 60 | 60 | ||
| 61 | &dma { | ||
| 62 | status = "okay"; | ||
| 63 | }; | ||
| 64 | |||
| 61 | &amac0 { | 65 | &amac0 { |
| 62 | status = "okay"; | 66 | status = "okay"; |
| 63 | }; | 67 | }; |
| @@ -58,6 +58,10 @@ · 57 unmodified lines | |||
| 58 | 58 | ||
| 59 | /* XHCI support needed to be complete */ | 59 | /* XHCI support needed to be complete */ |
| 60 | 60 | ||
| 61 | &dma { | ||
| 62 | status = "okay"; | ||
| 63 | }; | ||
| 64 | |||
| 61 | &amac0 { | 65 | &amac0 { |
| 62 | status = "okay"; | 66 | status = "okay"; |
| 63 | }; | 67 | }; |
| @@ -58,6 +58,10 @@ · 57 unmodified lines | |||
| 58 | 58 | ||
| 59 | /* USB 3 and SLIC support needed to be complete */ | 59 | /* USB 3 and SLIC support needed to be complete */ |
| 60 | 60 | ||
| 61 | &dma { | ||
| 62 | status = "okay"; | ||
| 63 | }; | ||
| 64 | |||
| 61 | &amac0 { | 65 | &amac0 { |
| 62 | status = "okay"; | 66 | status = "okay"; |
| 63 | }; | 67 | }; |
| @@ -58,6 +58,10 @@ · 57 unmodified lines | |||
| 58 | 58 | ||
| 59 | /* USB 3 and SLIC support needed to be complete */ | 59 | /* USB 3 and SLIC support needed to be complete */ |
| 60 | 60 | ||
| 61 | &dma { | ||
| 62 | status = "okay"; | ||
| 63 | }; | ||
| 64 | |||
| 61 | &amac0 { | 65 | &amac0 { |
| 62 | status = "okay"; | 66 | status = "okay"; |
| 63 | }; | 67 | }; |
| @@ -69,6 +69,10 @@ · 68 unmodified lines | |||
| 69 | status = "okay"; | 69 | status = "okay"; |
| 70 | }; | 70 | }; |
| 71 | 71 | ||
| 72 | &dma { | ||
| 73 | status = "okay"; | ||
| 74 | }; | ||
| 75 | |||
| 72 | &amac0 { | 76 | &amac0 { |
| 73 | status = "okay"; | 77 | status = "okay"; |
| 74 | }; | 78 | }; |
| @@ -48,6 +48,10 @@ · 47 unmodified lines | |||
| 48 | }; | 48 | }; |
| 49 | }; | 49 | }; |
| 50 | 50 | ||
| 51 | &dma { | ||
| 52 | status = "okay"; | ||
| 53 | }; | ||
| 54 | |||
| 51 | &amac0 { | 55 | &amac0 { |
| 52 | status = "okay"; | 56 | status = "okay"; |
| 53 | }; | 57 | }; |
| @@ -245,26 +245,6 @@ · 244 unmodified lines | |||
| 245 | rx-num-evt = <32>; | 245 | rx-num-evt = <32>; |
| 246 | }; | 246 | }; |
| 247 | 247 | ||
| 248 | &mailbox5 { | ||
| 249 | status = "okay"; | ||
| 250 | mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { | ||
| 251 | status = "okay"; | ||
| 252 | }; | ||
| 253 | mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { | ||
| 254 | status = "okay"; | ||
| 255 | }; | ||
| 256 | }; | ||
| 257 | |||
| 258 | &mailbox6 { | ||
| 259 | status = "okay"; | ||
| 260 | mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { | ||
| 261 | status = "okay"; | ||
| 262 | }; | ||
| 263 | mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { | ||
| 264 | status = "okay"; | ||
| 265 | }; | ||
| 266 | }; | ||
| 267 | |||
| 268 | &pcie1_rc { | 248 | &pcie1_rc { |
| 269 | status = "okay"; | 249 | status = "okay"; |
| 270 | }; | 250 | }; |
| @@ -1207,9 +1207,8 @@ · 1206 unmodified lines | |||
| 1207 | <SYSC_IDLE_SMART>, | 1207 | <SYSC_IDLE_SMART>, |
| 1208 | <SYSC_IDLE_SMART_WKUP>; | 1208 | <SYSC_IDLE_SMART_WKUP>; |
| 1209 | /* Domains (P, C): l4per_pwrdm, l4per_clkdm */ | 1209 | /* Domains (P, C): l4per_pwrdm, l4per_clkdm */ |
| 1210 | clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>, | 1210 | clocks = <&l4per_clkctrl DRA7_L4PER_TIMER4_CLKCTRL 0>; |
| 1211 | <&timer_sys_clk_div>; | 1211 | clock-names = "fck"; |
| 1212 | clock-names = "fck", "timer_sys_ck"; | ||
| 1213 | #address-cells = <1>; | 1212 | #address-cells = <1>; |
| 1214 | #size-cells = <1>; | 1213 | #size-cells = <1>; |
| 1215 | ranges = <0x0 0x36000 0x1000>; | 1214 | ranges = <0x0 0x36000 0x1000>; |
| @@ -3352,8 +3351,8 @@ · 2136 unmodified lines | |||
| 3352 | <SYSC_IDLE_SMART>, | 3351 | <SYSC_IDLE_SMART>, |
| 3353 | <SYSC_IDLE_SMART_WKUP>; | 3352 | <SYSC_IDLE_SMART_WKUP>; |
| 3354 | /* Domains (P, C): ipu_pwrdm, ipu_clkdm */ | 3353 | /* Domains (P, C): ipu_pwrdm, ipu_clkdm */ |
| 3355 | clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>, <&timer_sys_clk_div>; | 3354 | clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 0>; |
| 3356 | clock-names = "fck", "timer_sys_ck"; | 3355 | clock-names = "fck"; |
| 3357 | #address-cells = <1>; | 3356 | #address-cells = <1>; |
| 3358 | #size-cells = <1>; | 3357 | #size-cells = <1>; |
| 3359 | ranges = <0x0 0x20000 0x1000>; | 3358 | ranges = <0x0 0x20000 0x1000>; |
| @@ -3361,8 +3360,8 @@ · 1 unmodified line | |||
| 3361 | timer5: timer@0 { | 3360 | timer5: timer@0 { |
| 3362 | compatible = "ti,omap5430-timer"; | 3361 | compatible = "ti,omap5430-timer"; |
| 3363 | reg = <0x0 0x80>; | 3362 | reg = <0x0 0x80>; |
| 3364 | clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>; | 3363 | clocks = <&ipu_clkctrl DRA7_IPU_TIMER5_CLKCTRL 24>, <&timer_sys_clk_div>; |
| 3365 | clock-names = "fck"; | 3364 | clock-names = "fck", "timer_sys_ck"; |
| 3366 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; | 3365 | interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; |
| 3367 | }; | 3366 | }; |
| 3368 | }; | 3367 | }; |
| @@ -3379,9 +3378,8 @@ · 10 unmodified lines | |||
| 3379 | <SYSC_IDLE_SMART>, | 3378 | <SYSC_IDLE_SMART>, |
| 3380 | <SYSC_IDLE_SMART_WKUP>; | 3379 | <SYSC_IDLE_SMART_WKUP>; |
| 3381 | /* Domains (P, C): ipu_pwrdm, ipu_clkdm */ | 3380 | /* Domains (P, C): ipu_pwrdm, ipu_clkdm */ |
| 3382 | clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>, | 3381 | clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 0>; |
| 3383 | <&timer_sys_clk_div>; | 3382 | clock-names = "fck"; |
| 3384 | clock-names = "fck", "timer_sys_ck"; | ||
| 3385 | #address-cells = <1>; | 3383 | #address-cells = <1>; |
| 3386 | #size-cells = <1>; | 3384 | #size-cells = <1>; |
| 3387 | ranges = <0x0 0x22000 0x1000>; | 3385 | ranges = <0x0 0x22000 0x1000>; |
| @@ -3389,8 +3387,8 @@ · 1 unmodified line | |||
| 3389 | timer6: timer@0 { | 3387 | timer6: timer@0 { |
| 3390 | compatible = "ti,omap5430-timer"; | 3388 | compatible = "ti,omap5430-timer"; |
| 3391 | reg = <0x0 0x80>; | 3389 | reg = <0x0 0x80>; |
| 3392 | clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>; | 3390 | clocks = <&ipu_clkctrl DRA7_IPU_TIMER6_CLKCTRL 24>, <&timer_sys_clk_div>; |
| 3393 | clock-names = "fck"; | 3391 | clock-names = "fck", "timer_sys_ck"; |
| 3394 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; | 3392 | interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; |
| 3395 | }; | 3393 | }; |
| 3396 | }; | 3394 | }; |
| @@ -3498,8 +3496,8 @@ · 101 unmodified lines | |||
| 3498 | timer14: timer@0 { | 3496 | timer14: timer@0 { |
| 3499 | compatible = "ti,omap5430-timer"; | 3497 | compatible = "ti,omap5430-timer"; |
| 3500 | reg = <0x0 0x80>; | 3498 | reg = <0x0 0x80>; |
| 3501 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>; | 3499 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER14_CLKCTRL 24>, <&timer_sys_clk_div>; |
| 3502 | clock-names = "fck"; | 3500 | clock-names = "fck", "timer_sys_ck"; |
| 3503 | interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>; | 3501 | interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>; |
| 3504 | ti,timer-pwm; | 3502 | ti,timer-pwm; |
| 3505 | }; | 3503 | }; |
| @@ -3526,8 +3524,8 @@ · 20 unmodified lines | |||
| 3526 | timer15: timer@0 { | 3524 | timer15: timer@0 { |
| 3527 | compatible = "ti,omap5430-timer"; | 3525 | compatible = "ti,omap5430-timer"; |
| 3528 | reg = <0x0 0x80>; | 3526 | reg = <0x0 0x80>; |
| 3529 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>; | 3527 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER15_CLKCTRL 24>, <&timer_sys_clk_div>; |
| 3530 | clock-names = "fck"; | 3528 | clock-names = "fck", "timer_sys_ck"; |
| 3531 | interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; | 3529 | interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>; |
| 3532 | ti,timer-pwm; | 3530 | ti,timer-pwm; |
| 3533 | }; | 3531 | }; |
| @@ -3554,8 +3552,8 @@ · 20 unmodified lines | |||
| 3554 | timer16: timer@0 { | 3552 | timer16: timer@0 { |
| 3555 | compatible = "ti,omap5430-timer"; | 3553 | compatible = "ti,omap5430-timer"; |
| 3556 | reg = <0x0 0x80>; | 3554 | reg = <0x0 0x80>; |
| 3557 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>; | 3555 | clocks = <&l4per3_clkctrl DRA7_L4PER3_TIMER16_CLKCTRL 24>, <&timer_sys_clk_div>; |
| 3558 | clock-names = "fck"; | 3556 | clock-names = "fck", "timer_sys_ck"; |
| 3559 | interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>; | 3557 | interrupts = <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>; |
| 3560 | ti,timer-pwm; | 3558 | ti,timer-pwm; |
| 3561 | }; | 3559 | }; |
| @@ -110,7 +110,7 @@ · 109 unmodified lines | |||
| 110 | simple-audio-card,frame-master = <&sound_codec>; | 110 | simple-audio-card,frame-master = <&sound_codec>; |
| 111 | 111 | ||
| 112 | sound_cpu: simple-audio-card,cpu { | 112 | sound_cpu: simple-audio-card,cpu { |
| 113 | sound-dai = <&ssi2>; | 113 | sound-dai = <&ssi1>; |
| 114 | }; | 114 | }; |
| 115 | 115 | ||
| 116 | sound_codec: simple-audio-card,codec { | 116 | sound_codec: simple-audio-card,codec { |
| @@ -232,13 +232,6 @@ · 231 unmodified lines | |||
| 232 | status = "okay"; | 232 | status = "okay"; |
| 233 | }; | 233 | }; |
| 234 | 234 | ||
| 235 | &wdog1 { | ||
| 236 | pinctrl-names = "default"; | ||
| 237 | pinctrl-0 = <&pinctrl_wdog>; | ||
| 238 | fsl,ext-reset-output; | ||
| 239 | status = "okay"; | ||
| 240 | }; | ||
| 241 | |||
| 242 | &iomuxc { | 235 | &iomuxc { |
| 243 | pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>; | 236 | pinctrl-0 = <&pinctrl_reset_out &pinctrl_gpio>; |
| 244 | 237 | ||
| @@ -409,10 +402,4 @@ · 164 unmodified lines | |||
| 409 | MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 | 402 | MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x170f9 |
| 410 | >; | 403 | >; |
| 411 | }; | 404 | }; |
| 412 | |||
| 413 | pinctrl_wdog: wdoggrp { | ||
| 414 | fsl,pins = < | ||
| 415 | MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x30b0 | ||
| 416 | >; | ||
| 417 | }; | ||
| 418 | }; | 405 | }; |
| @@ -57,6 +57,13 @@ · 56 unmodified lines | |||
| 57 | status = "okay"; | 57 | status = "okay"; |
| 58 | }; | 58 | }; |
| 59 | 59 | ||
| 60 | &wdog1 { | ||
| 61 | pinctrl-names = "default"; | ||
| 62 | pinctrl-0 = <&pinctrl_wdog>; | ||
| 63 | fsl,ext-reset-output; | ||
| 64 | status = "okay"; | ||
| 65 | }; | ||
| 66 | |||
| 60 | &iomuxc { | 67 | &iomuxc { |
| 61 | pinctrl-names = "default"; | 68 | pinctrl-names = "default"; |
| 62 | pinctrl-0 = <&pinctrl_reset_out>; | 69 | pinctrl-0 = <&pinctrl_reset_out>; |
| @@ -106,4 +113,10 @@ · 43 unmodified lines | |||
| 106 | MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 | 113 | MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 |
| 107 | >; | 114 | >; |
| 108 | }; | 115 | }; |
| 116 | |||
| 117 | pinctrl_wdog: wdoggrp { | ||
| 118 | fsl,pins = < | ||
| 119 | MX6UL_PAD_GPIO1_IO09__WDOG1_WDOG_ANY 0x18b0 | ||
| 120 | >; | ||
| 121 | }; | ||
| 109 | }; | 122 | }; |
| @@ -11,7 +11,7 @@ · 10 unmodified lines | |||
| 11 | #size-cells = <1>; | 11 | #size-cells = <1>; |
| 12 | interrupt-parent = <&gic>; | 12 | interrupt-parent = <&gic>; |
| 13 | 13 | ||
| 14 | L2: l2-cache-controller@c4200000 { | 14 | L2: cache-controller@c4200000 { |
| 15 | compatible = "arm,pl310-cache"; | 15 | compatible = "arm,pl310-cache"; |
| 16 | reg = <0xc4200000 0x1000>; | 16 | reg = <0xc4200000 0x1000>; |
| 17 | cache-unified; | 17 | cache-unified; |
| @@ -13,8 +13,10 @@ · 12 unmodified lines | |||
| 13 | #interrupt-cells = <2>; | 13 | #interrupt-cells = <2>; |
| 14 | #address-cells = <1>; | 14 | #address-cells = <1>; |
| 15 | #size-cells = <0>; | 15 | #size-cells = <0>; |
| 16 | spi-max-frequency = <3000000>; | 16 | spi-max-frequency = <9600000>; |
| 17 | spi-cs-high; | 17 | spi-cs-high; |
| 18 | spi-cpol; | ||
| 19 | spi-cpha; | ||
| 18 | 20 | ||
| 19 | cpcap_adc: adc { | 21 | cpcap_adc: adc { |
| 20 | compatible = "motorola,mapphone-cpcap-adc"; | 22 | compatible = "motorola,mapphone-cpcap-adc"; |
| @@ -105,6 +105,14 @@ · 104 unmodified lines | |||
| 105 | linux,code = <SW_FRONT_PROXIMITY>; | 105 | linux,code = <SW_FRONT_PROXIMITY>; |
| 106 | linux,can-disable; | 106 | linux,can-disable; |
| 107 | }; | 107 | }; |
| 108 | |||
| 109 | machine_cover { | ||
| 110 | label = "Machine Cover"; | ||
| 111 | gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */ | ||
| 112 | linux,input-type = <EV_SW>; | ||
| 113 | linux,code = <SW_MACHINE_COVER>; | ||
| 114 | linux,can-disable; | ||
| 115 | }; | ||
| 108 | }; | 116 | }; |
| 109 | 117 | ||
| 110 | isp1707: isp1707 { | 118 | isp1707: isp1707 { |
| @@ -819,10 +827,6 @@ · 708 unmodified lines | |||
| 819 | pinctrl-0 = <&mmc1_pins>; | 827 | pinctrl-0 = <&mmc1_pins>; |
| 820 | vmmc-supply = <&vmmc1>; | 828 | vmmc-supply = <&vmmc1>; |
| 821 | bus-width = <4>; | 829 | bus-width = <4>; |
| 822 | /* For debugging, it is often good idea to remove this GPIO. | ||
| 823 | It means you can remove back cover (to reboot by removing | ||
| 824 | battery) and still use the MMC card. */ | ||
| 825 | cd-gpios = <&gpio6 0 GPIO_ACTIVE_LOW>; /* 160 */ | ||
| 826 | }; | 830 | }; |
| 827 | 831 | ||
| 828 | /* most boards use vaux3, only some old versions use vmmc2 instead */ | 832 | /* most boards use vaux3, only some old versions use vmmc2 instead */ |
| @@ -139,7 +139,7 @@ · 138 unmodified lines | |||
| 139 | ethernet@gpmc { | 139 | ethernet@gpmc { |
| 140 | reg = <5 0 0xff>; | 140 | reg = <5 0 0xff>; |
| 141 | interrupt-parent = <&gpio2>; | 141 | interrupt-parent = <&gpio2>; |
| 142 | interrupts = <12 IRQ_TYPE_EDGE_FALLING>; /* gpio_44 */ | 142 | interrupts = <12 IRQ_TYPE_LEVEL_LOW>; /* gpio_44 */ |
| 143 | 143 | ||
| 144 | phy-mode = "mii"; | 144 | phy-mode = "mii"; |
| 145 | 145 | ||
| @@ -662,6 +662,6 @@ · 661 unmodified lines | |||
| 662 | ti,no-idle; | 662 | ti,no-idle; |
| 663 | timer@0 { | 663 | timer@0 { |
| 664 | assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>; | 664 | assigned-clocks = <&l4_wkup_clkctrl OMAP4_TIMER1_CLKCTRL 24>; |
| 665 | assigned-clock-parents = <&sys_clkin_ck>; | 665 | assigned-clock-parents = <&sys_32k_ck>; |
| 666 | }; | 666 | }; |
| 667 | }; | 667 | }; |
| @@ -726,7 +726,7 @@ · 725 unmodified lines | |||
| 726 | }; | 726 | }; |
| 727 | }; | 727 | }; |
| 728 | 728 | ||
| 729 | L2: l2-cache@fffef000 { | 729 | L2: cache-controller@fffef000 { |
| 730 | compatible = "arm,pl310-cache"; | 730 | compatible = "arm,pl310-cache"; |
| 731 | reg = <0xfffef000 0x1000>; | 731 | reg = <0xfffef000 0x1000>; |
| 732 | interrupts = <0 38 0x04>; | 732 | interrupts = <0 38 0x04>; |
| @@ -636,7 +636,7 @@ · 635 unmodified lines | |||
| 636 | reg = <0xffcfb100 0x80>; | 636 | reg = <0xffcfb100 0x80>; |
| 637 | }; | 637 | }; |
| 638 | 638 | ||
| 639 | L2: l2-cache@fffff000 { | 639 | L2: cache-controller@fffff000 { |
| 640 | compatible = "arm,pl310-cache"; | 640 | compatible = "arm,pl310-cache"; |
| 641 | reg = <0xfffff000 0x1000>; | 641 | reg = <0xfffff000 0x1000>; |
| 642 | interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; | 642 | interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; |
| @@ -100,79 +100,6 @@ · 99 unmodified lines | |||
| 100 | }; | 100 | }; |
| 101 | }; | 101 | }; |
| 102 | 102 | ||
| 103 | mcc { | ||
| 104 | compatible = "arm,vexpress,config-bus"; | ||
| 105 | arm,vexpress,config-bridge = <&v2m_sysreg>; | ||
| 106 | |||
| 107 | oscclk0 { | ||
| 108 | /* MCC static memory clock */ | ||
| 109 | compatible = "arm,vexpress-osc"; | ||
| 110 | arm,vexpress-sysreg,func = <1 0>; | ||
| 111 | freq-range = <25000000 60000000>; | ||
| 112 | #clock-cells = <0>; | ||
| 113 | clock-output-names = "v2m:oscclk0"; | ||
| 114 | }; | ||
| 115 | |||
| 116 | v2m_oscclk1: oscclk1 { | ||
| 117 | /* CLCD clock */ | ||
| 118 | compatible = "arm,vexpress-osc"; | ||
| 119 | arm,vexpress-sysreg,func = <1 1>; | ||
| 120 | freq-range = <23750000 65000000>; | ||
| 121 | #clock-cells = <0>; | ||
| 122 | clock-output-names = "v2m:oscclk1"; | ||
| 123 | }; | ||
| 124 | |||
| 125 | v2m_oscclk2: oscclk2 { | ||
| 126 | /* IO FPGA peripheral clock */ | ||
| 127 | compatible = "arm,vexpress-osc"; | ||
| 128 | arm,vexpress-sysreg,func = <1 2>; | ||
| 129 | freq-range = <24000000 24000000>; | ||
| 130 | #clock-cells = <0>; | ||
| 131 | clock-output-names = "v2m:oscclk2"; | ||
| 132 | }; | ||
| 133 | |||
| 134 | volt-vio { | ||
| 135 | /* Logic level voltage */ | ||
| 136 | compatible = "arm,vexpress-volt"; | ||
| 137 | arm,vexpress-sysreg,func = <2 0>; | ||
| 138 | regulator-name = "VIO"; | ||
| 139 | regulator-always-on; | ||
| 140 | label = "VIO"; | ||
| 141 | }; | ||
| 142 | |||
| 143 | temp-mcc { | ||
| 144 | /* MCC internal operating temperature */ | ||
| 145 | compatible = "arm,vexpress-temp"; | ||
| 146 | arm,vexpress-sysreg,func = <4 0>; | ||
| 147 | label = "MCC"; | ||
| 148 | }; | ||
| 149 | |||
| 150 | reset { | ||
| 151 | compatible = "arm,vexpress-reset"; | ||
| 152 | arm,vexpress-sysreg,func = <5 0>; | ||
| 153 | }; | ||
| 154 | |||
| 155 | muxfpga { | ||
| 156 | compatible = "arm,vexpress-muxfpga"; | ||
| 157 | arm,vexpress-sysreg,func = <7 0>; | ||
| 158 | }; | ||
| 159 | |||
| 160 | shutdown { | ||
| 161 | compatible = "arm,vexpress-shutdown"; | ||
| 162 | arm,vexpress-sysreg,func = <8 0>; | ||
| 163 | }; | ||
| 164 | |||
| 165 | reboot { | ||
| 166 | compatible = "arm,vexpress-reboot"; | ||
| 167 | arm,vexpress-sysreg,func = <9 0>; | ||
| 168 | }; | ||
| 169 | |||
| 170 | dvimode { | ||
| 171 | compatible = "arm,vexpress-dvimode"; | ||
| 172 | arm,vexpress-sysreg,func = <11 0>; | ||
| 173 | }; | ||
| 174 | }; | ||
| 175 | |||
| 176 | bus@8000000 { | 103 | bus@8000000 { |
| 177 | motherboard-bus { | 104 | motherboard-bus { |
| 178 | model = "V2M-P1"; | 105 | model = "V2M-P1"; |
| @@ -435,6 +362,79 @@ · 256 unmodified lines | |||
| 435 | }; | 362 | }; |
| 436 | }; | 363 | }; |
| 437 | }; | 364 | }; |
| 365 | |||
| 366 | mcc { | ||
| 367 | compatible = "arm,vexpress,config-bus"; | ||
| 368 | arm,vexpress,config-bridge = <&v2m_sysreg>; | ||
| 369 | |||
| 370 | oscclk0 { | ||
| 371 | /* MCC static memory clock */ | ||
| 372 | compatible = "arm,vexpress-osc"; | ||
| 373 | arm,vexpress-sysreg,func = <1 0>; | ||
| 374 | freq-range = <25000000 60000000>; | ||
| 375 | #clock-cells = <0>; | ||
| 376 | clock-output-names = "v2m:oscclk0"; | ||
| 377 | }; | ||
| 378 | |||
| 379 | v2m_oscclk1: oscclk1 { | ||
| 380 | /* CLCD clock */ | ||
| 381 | compatible = "arm,vexpress-osc"; | ||
| 382 | arm,vexpress-sysreg,func = <1 1>; | ||
| 383 | freq-range = <23750000 65000000>; | ||
| 384 | #clock-cells = <0>; | ||
| 385 | clock-output-names = "v2m:oscclk1"; | ||
| 386 | }; | ||
| 387 | |||
| 388 | v2m_oscclk2: oscclk2 { | ||
| 389 | /* IO FPGA peripheral clock */ | ||
| 390 | compatible = "arm,vexpress-osc"; | ||
| 391 | arm,vexpress-sysreg,func = <1 2>; | ||
| 392 | freq-range = <24000000 24000000>; | ||
| 393 | #clock-cells = <0>; | ||
| 394 | clock-output-names = "v2m:oscclk2"; | ||
| 395 | }; | ||
| 396 | |||
| 397 | volt-vio { | ||
| 398 | /* Logic level voltage */ | ||
| 399 | compatible = "arm,vexpress-volt"; | ||
| 400 | arm,vexpress-sysreg,func = <2 0>; | ||
| 401 | regulator-name = "VIO"; | ||
| 402 | regulator-always-on; | ||
| 403 | label = "VIO"; | ||
| 404 | }; | ||
| 405 | |||
| 406 | temp-mcc { | ||
| 407 | /* MCC internal operating temperature */ | ||
| 408 | compatible = "arm,vexpress-temp"; | ||
| 409 | arm,vexpress-sysreg,func = <4 0>; | ||
| 410 | label = "MCC"; | ||
| 411 | }; | ||
| 412 | |||
| 413 | reset { | ||
| 414 | compatible = "arm,vexpress-reset"; | ||
| 415 | arm,vexpress-sysreg,func = <5 0>; | ||
| 416 | }; | ||
| 417 | |||
| 418 | muxfpga { | ||
| 419 | compatible = "arm,vexpress-muxfpga"; | ||
| 420 | arm,vexpress-sysreg,func = <7 0>; | ||
| 421 | }; | ||
| 422 | |||
| 423 | shutdown { | ||
| 424 | compatible = "arm,vexpress-shutdown"; | ||
| 425 | arm,vexpress-sysreg,func = <8 0>; | ||
| 426 | }; | ||
| 427 | |||
| 428 | reboot { | ||
| 429 | compatible = "arm,vexpress-reboot"; | ||
| 430 | arm,vexpress-sysreg,func = <9 0>; | ||
| 431 | }; | ||
| 432 | |||
| 433 | dvimode { | ||
| 434 | compatible = "arm,vexpress-dvimode"; | ||
| 435 | arm,vexpress-sysreg,func = <11 0>; | ||
| 436 | }; | ||
| 437 | }; | ||
| 438 | }; | 438 | }; |
| 439 | }; | 439 | }; |
| 440 | }; | 440 | }; |
| @@ -87,4 +87,11 @@ static inline unsigned long efi_get_max_initrd_addr(unsigned long dram_base, · 86 unmodified lines | |||
| 87 | return dram_base + SZ_512M; | 87 | return dram_base + SZ_512M; |
| 88 | } | 88 | } |
| 89 | 89 | ||
| 90 | struct efi_arm_entry_state { | ||
| 91 | u32 cpsr_before_ebs; | ||
| 92 | u32 sctlr_before_ebs; | ||
| 93 | u32 cpsr_after_ebs; | ||
| 94 | u32 sctlr_after_ebs; | ||
| 95 | }; | ||
| 96 | |||
| 90 | #endif /* _ASM_ARM_EFI_H */ | 97 | #endif /* _ASM_ARM_EFI_H */ |
| @@ -31,15 +31,6 @@ · 30 unmodified lines | |||
| 31 | #if defined(__APCS_26__) | 31 | #if defined(__APCS_26__) |
| 32 | #error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32 | 32 | #error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32 |
| 33 | #endif | 33 | #endif |
| 34 | /* | ||
| 35 | * GCC 4.8.0-4.8.2: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58854 | ||
| 36 | * miscompiles find_get_entry(), and can result in EXT3 and EXT4 | ||
| 37 | * filesystem corruption (possibly other FS too). | ||
| 38 | */ | ||
| 39 | #if defined(GCC_VERSION) && GCC_VERSION >= 40800 && GCC_VERSION < 40803 | ||
| 40 | #error Your compiler is too buggy; it is known to miscompile kernels | ||
| 41 | #error and result in filesystem corruption and oopses. | ||
| 42 | #endif | ||
| 43 | 34 | ||
| 44 | int main(void) | 35 | int main(void) |
| 45 | { | 36 | { |
| @@ -53,6 +53,7 @@ config ARCH_BCM_NSP · 52 unmodified lines | |||
| 53 | select ARM_ERRATA_754322 | 53 | select ARM_ERRATA_754322 |
| 54 | select ARM_ERRATA_775420 | 54 | select ARM_ERRATA_775420 |
| 55 | select ARM_ERRATA_764369 if SMP | 55 | select ARM_ERRATA_764369 if SMP |
| 56 | select ARM_TIMER_SP804 | ||
| 56 | select THERMAL | 57 | select THERMAL |
| 57 | select THERMAL_OF | 58 | select THERMAL_OF |
| 58 | help | 59 | help |
| @@ -289,6 +289,6 @@ struct platform_device *__init imx_add_spi_imx( · 288 unmodified lines | |||
| 289 | const struct spi_imx_master *pdata); | 289 | const struct spi_imx_master *pdata); |
| 290 | 290 | ||
| 291 | struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase, | 291 | struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase, |
| 292 | int irq, int irq_err); | 292 | int irq); |
| 293 | struct platform_device *imx_add_imx_sdma(char *name, | 293 | struct platform_device *imx_add_imx_sdma(char *name, |
| 294 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata); | 294 | resource_size_t iobase, int irq, struct sdma_platform_data *pdata); |
| @@ -24,7 +24,8 @@ struct platform_device *__init mxc_register_gpio(char *name, int id, · 23 unmodified lines | |||
| 24 | .flags = IORESOURCE_IRQ, | 24 | .flags = IORESOURCE_IRQ, |
| 25 | }, | 25 | }, |
| 26 | }; | 26 | }; |
| 27 | unsigned int nres; | ||
| 27 | 28 | ||
| 28 | return platform_device_register_resndata(&mxc_aips_bus, | 29 | nres = irq_high ? ARRAY_SIZE(res) : ARRAY_SIZE(res) - 1; |
| 29 | name, id, res, ARRAY_SIZE(res), NULL, 0); | 30 | return platform_device_register_resndata(&mxc_aips_bus, name, id, res, nres, NULL, 0); |
| 30 | } | 31 | } |
| @@ -6,7 +6,7 @@ · 5 unmodified lines | |||
| 6 | #include "devices-common.h" | 6 | #include "devices-common.h" |
| 7 | 7 | ||
| 8 | struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name, | 8 | struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name, |
| 9 | resource_size_t iobase, int irq, int irq_err) | 9 | resource_size_t iobase, int irq) |
| 10 | { | 10 | { |
| 11 | struct resource res[] = { | 11 | struct resource res[] = { |
| 12 | { | 12 | { |
| @@ -17,10 +17,6 @@ struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name, · 4 unmodified lines | |||
| 17 | .start = irq, | 17 | .start = irq, |
| 18 | .end = irq, | 18 | .end = irq, |
| 19 | .flags = IORESOURCE_IRQ, | 19 | .flags = IORESOURCE_IRQ, |
| 20 | }, { | ||
| 21 | .start = irq_err, | ||
| 22 | .end = irq_err, | ||
| 23 | .flags = IORESOURCE_IRQ, | ||
| 24 | }, | 20 | }, |
| 25 | }; | 21 | }; |
| 26 | 22 | ||
| @@ -78,8 +78,7 @@ void __init imx21_soc_init(void) · 77 unmodified lines | |||
| 78 | mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); | 78 | mxc_register_gpio("imx21-gpio", 5, MX21_GPIO6_BASE_ADDR, SZ_256, MX21_INT_GPIO, 0); |
| 79 | 79 | ||
| 80 | pinctrl_provide_dummies(); | 80 | pinctrl_provide_dummies(); |
| 81 | imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR, | 81 | imx_add_imx_dma("imx21-dma", MX21_DMA_BASE_ADDR, MX21_INT_DMACH0); |
| 82 | MX21_INT_DMACH0, 0); /* No ERR irq */ | ||
| 83 | platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res, | 82 | platform_device_register_simple("imx21-audmux", 0, imx21_audmux_res, |
| 84 | ARRAY_SIZE(imx21_audmux_res)); | 83 | ARRAY_SIZE(imx21_audmux_res)); |
| 85 | } | 84 | } |
| @@ -79,8 +79,7 @@ void __init imx27_soc_init(void) · 78 unmodified lines | |||
| 79 | mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); | 79 | mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); |
| 80 | 80 | ||
| 81 | pinctrl_provide_dummies(); | 81 | pinctrl_provide_dummies(); |
| 82 | imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR, | 82 | imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR, MX27_INT_DMACH0); |
| 83 | MX27_INT_DMACH0, 0); /* No ERR irq */ | ||
| 84 | /* imx27 has the imx21 type audmux */ | 83 | /* imx27 has the imx21 type audmux */ |
| 85 | platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, | 84 | platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, |
| 86 | ARRAY_SIZE(imx27_audmux_res)); | 85 | ARRAY_SIZE(imx27_audmux_res)); |
| @@ -295,14 +295,14 @@ static int __init imx_suspend_alloc_ocram( · 294 unmodified lines | |||
| 295 | if (!ocram_pool) { | 295 | if (!ocram_pool) { |
| 296 | pr_warn("%s: ocram pool unavailable!\n", __func__); | 296 | pr_warn("%s: ocram pool unavailable!\n", __func__); |
| 297 | ret = -ENODEV; | 297 | ret = -ENODEV; |
| 298 | goto put_node; | 298 | goto put_device; |
| 299 | } | 299 | } |
| 300 | 300 | ||
| 301 | ocram_base = gen_pool_alloc(ocram_pool, size); | 301 | ocram_base = gen_pool_alloc(ocram_pool, size); |
| 302 | if (!ocram_base) { | 302 | if (!ocram_base) { |
| 303 | pr_warn("%s: unable to alloc ocram!\n", __func__); | 303 | pr_warn("%s: unable to alloc ocram!\n", __func__); |
| 304 | ret = -ENOMEM; | 304 | ret = -ENOMEM; |
| 305 | goto put_node; | 305 | goto put_device; |
| 306 | } | 306 | } |
| 307 | 307 | ||
| 308 | phys = gen_pool_virt_to_phys(ocram_pool, ocram_base); | 308 | phys = gen_pool_virt_to_phys(ocram_pool, ocram_base); |
| @@ -312,6 +312,8 @@ static int __init imx_suspend_alloc_ocram( · 3 unmodified lines | |||
| 312 | if (virt_out) | 312 | if (virt_out) |
| 313 | *virt_out = virt; | 313 | *virt_out = virt; |
| 314 | 314 | ||
| 315 | put_device: | ||
| 316 | put_device(&pdev->dev); | ||
| 315 | put_node: | 317 | put_node: |
| 316 | of_node_put(node); | 318 | of_node_put(node); |
| 317 | 319 | ||
| @@ -493,14 +493,14 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) · 492 unmodified lines | |||
| 493 | if (!ocram_pool) { | 493 | if (!ocram_pool) { |
| 494 | pr_warn("%s: ocram pool unavailable!\n", __func__); | 494 | pr_warn("%s: ocram pool unavailable!\n", __func__); |
| 495 | ret = -ENODEV; | 495 | ret = -ENODEV; |
| 496 | goto put_node; | 496 | goto put_device; |
| 497 | } | 497 | } |
| 498 | 498 | ||
| 499 | ocram_base = gen_pool_alloc(ocram_pool, MX6Q_SUSPEND_OCRAM_SIZE); | 499 | ocram_base = gen_pool_alloc(ocram_pool, MX6Q_SUSPEND_OCRAM_SIZE); |
| 500 | if (!ocram_base) { | 500 | if (!ocram_base) { |
| 501 | pr_warn("%s: unable to alloc ocram!\n", __func__); | 501 | pr_warn("%s: unable to alloc ocram!\n", __func__); |
| 502 | ret = -ENOMEM; | 502 | ret = -ENOMEM; |
| 503 | goto put_node; | 503 | goto put_device; |
| 504 | } | 504 | } |
| 505 | 505 | ||
| 506 | ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base); | 506 | ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base); |
| @@ -523,7 +523,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) · 16 unmodified lines | |||
| 523 | ret = imx6_pm_get_base(&pm_info->mmdc_base, socdata->mmdc_compat); | 523 | ret = imx6_pm_get_base(&pm_info->mmdc_base, socdata->mmdc_compat); |
| 524 | if (ret) { | 524 | if (ret) { |
| 525 | pr_warn("%s: failed to get mmdc base %d!\n", __func__, ret); | 525 | pr_warn("%s: failed to get mmdc base %d!\n", __func__, ret); |
| 526 | goto put_node; | 526 | goto put_device; |
| 527 | } | 527 | } |
| 528 | 528 | ||
| 529 | ret = imx6_pm_get_base(&pm_info->src_base, socdata->src_compat); | 529 | ret = imx6_pm_get_base(&pm_info->src_base, socdata->src_compat); |
| @@ -570,7 +570,7 @@ static int __init imx6q_suspend_init(const struct imx6_pm_socdata *socdata) · 40 unmodified lines | |||
| 570 | &imx6_suspend, | 570 | &imx6_suspend, |
| 571 | MX6Q_SUSPEND_OCRAM_SIZE - sizeof(*pm_info)); | 571 | MX6Q_SUSPEND_OCRAM_SIZE - sizeof(*pm_info)); |
| 572 | 572 | ||
| 573 | goto put_node; | 573 | goto put_device; |
| 574 | 574 | ||
| 575 | pl310_cache_map_failed: | 575 | pl310_cache_map_failed: |
| 576 | iounmap(pm_info->gpc_base.vbase); | 576 | iounmap(pm_info->gpc_base.vbase); |
| @@ -580,6 +580,8 @@ iomuxc_map_failed: · 3 unmodified lines | |||
| 580 | iounmap(pm_info->src_base.vbase); | 580 | iounmap(pm_info->src_base.vbase); |
| 581 | src_map_failed: | 581 | src_map_failed: |
| 582 | iounmap(pm_info->mmdc_base.vbase); | 582 | iounmap(pm_info->mmdc_base.vbase); |
| 583 | put_device: | ||
| 584 | put_device(&pdev->dev); | ||
| 583 | put_node: | 585 | put_node: |
| 584 | of_node_put(node); | 586 | of_node_put(node); |
| 585 | 587 | ||
| @@ -3435,7 +3435,7 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, · 3434 unmodified lines | |||
| 3435 | regs = ioremap(data->module_pa, | 3435 | regs = ioremap(data->module_pa, |
| 3436 | data->module_size); | 3436 | data->module_size); |
| 3437 | if (!regs) | 3437 | if (!regs) |
| 3438 | return -ENOMEM; | 3438 | goto out_free_sysc; |
| 3439 | } | 3439 | } |
| 3440 | 3440 | ||
| 3441 | /* | 3441 | /* |
| @@ -3445,13 +3445,13 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, · 3 unmodified lines | |||
| 3445 | if (oh->class->name && strcmp(oh->class->name, data->name)) { | 3445 | if (oh->class->name && strcmp(oh->class->name, data->name)) { |
| 3446 | class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL); | 3446 | class = kmemdup(oh->class, sizeof(*oh->class), GFP_KERNEL); |
| 3447 | if (!class) | 3447 | if (!class) |
| 3448 | return -ENOMEM; | 3448 | goto out_unmap; |
| 3449 | } | 3449 | } |
| 3450 | 3450 | ||
| 3451 | if (list_empty(&oh->slave_ports)) { | 3451 | if (list_empty(&oh->slave_ports)) { |
| 3452 | oi = kcalloc(1, sizeof(*oi), GFP_KERNEL); | 3452 | oi = kcalloc(1, sizeof(*oi), GFP_KERNEL); |
| 3453 | if (!oi) | 3453 | if (!oi) |
| 3454 | return -ENOMEM; | 3454 | goto out_free_class; |
| 3455 | 3455 | ||
| 3456 | /* | 3456 | /* |
| 3457 | * Note that we assume interconnect interface clocks will be | 3457 | * Note that we assume interconnect interface clocks will be |
| @@ -3478,6 +3478,14 @@ static int omap_hwmod_allocate_module(struct device *dev, struct omap_hwmod *oh, · 20 unmodified lines | |||
| 3478 | spin_unlock_irqrestore(&oh->_lock, flags); | 3478 | spin_unlock_irqrestore(&oh->_lock, flags); |
| 3479 | 3479 | ||
| 3480 | return 0; | 3480 | return 0; |
| 3481 | |||
| 3482 | out_free_class: | ||
| 3483 | kfree(class); | ||
| 3484 | out_unmap: | ||
| 3485 | iounmap(regs); | ||
| 3486 | out_free_sysc: | ||
| 3487 | kfree(sysc); | ||
| 3488 | return -ENOMEM; | ||
| 3481 | } | 3489 | } |
| 3482 | 3490 | ||
| 3483 | static const struct omap_hwmod_reset omap24xx_reset_quirks[] = { | 3491 | static const struct omap_hwmod_reset omap24xx_reset_quirks[] = { |
| @@ -3489,7 +3497,7 @@ static const struct omap_hwmod_reset dra7_reset_quirks[] = { · 5 unmodified lines | |||
| 3489 | }; | 3497 | }; |
| 3490 | 3498 | ||
| 3491 | static const struct omap_hwmod_reset omap_reset_quirks[] = { | 3499 | static const struct omap_hwmod_reset omap_reset_quirks[] = { |
| 3492 | { .match = "dss", .len = 3, .reset = omap_dss_reset, }, | 3500 | { .match = "dss_core", .len = 8, .reset = omap_dss_reset, }, |
| 3493 | { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, }, | 3501 | { .match = "hdq1w", .len = 5, .reset = omap_hdq1w_reset, }, |
| 3494 | { .match = "i2c", .len = 3, .reset = omap_i2c_reset, }, | 3502 | { .match = "i2c", .len = 3, .reset = omap_i2c_reset, }, |
| 3495 | { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, }, | 3503 | { .match = "wd_timer", .len = 8, .reset = omap2_wd_timer_reset, }, |
| @@ -20,14 +20,6 @@ static const char *const stih41x_dt_match[] __initconst = { · 19 unmodified lines | |||
| 20 | NULL | 20 | NULL |
| 21 | }; | 21 | }; |
| 22 | 22 | ||
| 23 | static void sti_l2_write_sec(unsigned long val, unsigned reg) | ||
| 24 | { | ||
| 25 | /* | ||
| 26 | * We can't write to secure registers as we are in non-secure | ||
| 27 | * mode, until we have some SMI service available. | ||
| 28 | */ | ||
| 29 | } | ||
| 30 | |||
| 31 | DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree") | 23 | DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree") |
| 32 | .dt_compat = stih41x_dt_match, | 24 | .dt_compat = stih41x_dt_match, |
| 33 | .l2c_aux_val = L2C_AUX_CTRL_SHARED_OVERRIDE | | 25 | .l2c_aux_val = L2C_AUX_CTRL_SHARED_OVERRIDE | |
| @@ -36,5 +28,4 @@ DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree") · 2 unmodified lines | |||
| 36 | L2C_AUX_CTRL_WAY_SIZE(4), | 28 | L2C_AUX_CTRL_WAY_SIZE(4), |
| 37 | .l2c_aux_mask = 0xc0000fff, | 29 | .l2c_aux_mask = 0xc0000fff, |
| 38 | .smp = smp_ops(sti_smp_ops), | 30 | .smp = smp_ops(sti_smp_ops), |
| 39 | .l2c_write_sec = sti_l2_write_sec, | ||
| 40 | MACHINE_END | 31 | MACHINE_END |
| @@ -241,7 +241,6 @@ static int __init fdt_find_hyper_node(unsigned long node, const char *uname, · 240 unmodified lines | |||
| 241 | * see Documentation/devicetree/bindings/arm/xen.txt for the | 241 | * see Documentation/devicetree/bindings/arm/xen.txt for the |
| 242 | * documentation of the Xen Device Tree format. | 242 | * documentation of the Xen Device Tree format. |
| 243 | */ | 243 | */ |
| 244 | #define GRANT_TABLE_PHYSADDR 0 | ||
| 245 | void __init xen_early_init(void) | 244 | void __init xen_early_init(void) |
| 246 | { | 245 | { |
| 247 | of_scan_flat_dt(fdt_find_hyper_node, NULL); | 246 | of_scan_flat_dt(fdt_find_hyper_node, NULL); |
| @@ -1518,9 +1518,9 @@ config ARM64_PTR_AUTH · 1517 unmodified lines | |||
| 1518 | default y | 1518 | default y |
| 1519 | depends on !KVM || ARM64_VHE | 1519 | depends on !KVM || ARM64_VHE |
| 1520 | depends on (CC_HAS_SIGN_RETURN_ADDRESS || CC_HAS_BRANCH_PROT_PAC_RET) && AS_HAS_PAC | 1520 | depends on (CC_HAS_SIGN_RETURN_ADDRESS || CC_HAS_BRANCH_PROT_PAC_RET) && AS_HAS_PAC |
| 1521 | # GCC 9.1 and later inserts a .note.gnu.property section note for PAC | 1521 | # Modern compilers insert a .note.gnu.property section note for PAC |
| 1522 | # which is only understood by binutils starting with version 2.33.1. | 1522 | # which is only understood by binutils starting with version 2.33.1. |
| 1523 | depends on !CC_IS_GCC || GCC_VERSION < 90100 || LD_VERSION >= 233010000 | 1523 | depends on LD_IS_LLD || LD_VERSION >= 233010000 || (CC_IS_GCC && GCC_VERSION < 90100) |
| 1524 | depends on !CC_IS_CLANG || AS_HAS_CFI_NEGATE_RA_STATE | 1524 | depends on !CC_IS_CLANG || AS_HAS_CFI_NEGATE_RA_STATE |
| 1525 | depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS) | 1525 | depends on (!FUNCTION_GRAPH_TRACER || DYNAMIC_FTRACE_WITH_REGS) |
| 1526 | help | 1526 | help |
| @@ -77,7 +77,7 @@ · 76 unmodified lines | |||
| 77 | method = "smc"; | 77 | method = "smc"; |
| 78 | }; | 78 | }; |
| 79 | 79 | ||
| 80 | intc: intc@fffc1000 { | 80 | intc: interrupt-controller@fffc1000 { |
| 81 | compatible = "arm,gic-400", "arm,cortex-a15-gic"; | 81 | compatible = "arm,gic-400", "arm,cortex-a15-gic"; |
| 82 | #interrupt-cells = <3>; | 82 | #interrupt-cells = <3>; |
| 83 | interrupt-controller; | 83 | interrupt-controller; |
| @@ -302,7 +302,7 @@ · 218 unmodified lines | |||
| 302 | status = "disabled"; | 302 | status = "disabled"; |
| 303 | }; | 303 | }; |
| 304 | 304 | ||
| 305 | nand: nand@ffb90000 { | 305 | nand: nand-controller@ffb90000 { |
| 306 | #address-cells = <1>; | 306 | #address-cells = <1>; |
| 307 | #size-cells = <0>; | 307 | #size-cells = <0>; |
| 308 | compatible = "altr,socfpga-denali-nand"; | 308 | compatible = "altr,socfpga-denali-nand"; |
| @@ -445,7 +445,7 @@ · 136 unmodified lines | |||
| 445 | clock-names = "timer"; | 445 | clock-names = "timer"; |
| 446 | }; | 446 | }; |
| 447 | 447 | ||
| 448 | uart0: serial0@ffc02000 { | 448 | uart0: serial@ffc02000 { |
| 449 | compatible = "snps,dw-apb-uart"; | 449 | compatible = "snps,dw-apb-uart"; |
| 450 | reg = <0xffc02000 0x100>; | 450 | reg = <0xffc02000 0x100>; |
| 451 | interrupts = <0 108 4>; | 451 | interrupts = <0 108 4>; |
| @@ -456,7 +456,7 @@ · 4 unmodified lines | |||
| 456 | status = "disabled"; | 456 | status = "disabled"; |
| 457 | }; | 457 | }; |
| 458 | 458 | ||
| 459 | uart1: serial1@ffc02100 { | 459 | uart1: serial@ffc02100 { |
| 460 | compatible = "snps,dw-apb-uart"; | 460 | compatible = "snps,dw-apb-uart"; |
| 461 | reg = <0xffc02100 0x100>; | 461 | reg = <0xffc02100 0x100>; |
| 462 | interrupts = <0 109 4>; | 462 | interrupts = <0 109 4>; |
| @@ -155,6 +155,7 @@ · 154 unmodified lines | |||
| 155 | }; | 155 | }; |
| 156 | 156 | ||
| 157 | &qspi { | 157 | &qspi { |
| 158 | status = "okay"; | ||
| 158 | flash@0 { | 159 | flash@0 { |
| 159 | #address-cells = <1>; | 160 | #address-cells = <1>; |
| 160 | #size-cells = <1>; | 161 | #size-cells = <1>; |
| @@ -188,6 +188,7 @@ · 187 unmodified lines | |||
| 188 | }; | 188 | }; |
| 189 | 189 | ||
| 190 | &qspi { | 190 | &qspi { |
| 191 | status = "okay"; | ||
| 191 | flash@0 { | 192 | flash@0 { |
| 192 | #address-cells = <1>; | 193 | #address-cells = <1>; |
| 193 | #size-cells = <1>; | 194 | #size-cells = <1>; |
| @@ -211,12 +212,12 @@ · 17 unmodified lines | |||
| 211 | 212 | ||
| 212 | qspi_boot: partition@0 { | 213 | qspi_boot: partition@0 { |
| 213 | label = "Boot and fpga data"; | 214 | label = "Boot and fpga data"; |
| 214 | reg = <0x0 0x034B0000>; | 215 | reg = <0x0 0x03FE0000>; |
| 215 | }; | 216 | }; |
| 216 | 217 | ||
| 217 | qspi_rootfs: partition@4000000 { | 218 | qspi_rootfs: partition@3FE0000 { |
| 218 | label = "Root Filesystem - JFFS2"; | 219 | label = "Root Filesystem - JFFS2"; |
| 219 | reg = <0x034B0000 0x0EB50000>; | 220 | reg = <0x03FE0000 0x0C020000>; |
| 220 | }; | 221 | }; |
| 221 | }; | 222 | }; |
| 222 | }; | 223 | }; |
| @@ -10,7 +10,7 @@ · 9 unmodified lines | |||
| 10 | #include <dt-bindings/input/input.h> | 10 | #include <dt-bindings/input/input.h> |
| 11 | #include <dt-bindings/sound/meson-aiu.h> | 11 | #include <dt-bindings/sound/meson-aiu.h> |
| 12 | 12 | ||
| 13 | #include "meson-gxl-s905x.dtsi" | 13 | #include "meson-gxl-s805x.dtsi" |
| 14 | 14 | ||
| 15 | / { | 15 | / { |
| 16 | compatible = "libretech,aml-s805x-ac", "amlogic,s805x", | 16 | compatible = "libretech,aml-s805x-ac", "amlogic,s805x", |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | |||
| 9 | 9 | ||
| 10 | #include <dt-bindings/input/input.h> | 10 | #include <dt-bindings/input/input.h> |
| 11 | 11 | ||
| 12 | #include "meson-gxl-s905x.dtsi" | 12 | #include "meson-gxl-s805x.dtsi" |
| 13 | 13 | ||
| 14 | / { | 14 | / { |
| 15 | compatible = "amlogic,p241", "amlogic,s805x", "amlogic,meson-gxl"; | 15 | compatible = "amlogic,p241", "amlogic,s805x", "amlogic,meson-gxl"; |
| @@ -0,0 +1,24 @@ | |||
| 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) | ||
| 2 | /* | ||
| 3 | * Copyright (c) 2020 BayLibre SAS | ||
| 4 | * Author: Neil Armstrong <narmstrong@baylibre.com> | ||
| 5 | */ | ||
| 6 | |||
| 7 | #include "meson-gxl-s905x.dtsi" | ||
| 8 | |||
| 9 | / { | ||
| 10 | compatible = "amlogic,s805x", "amlogic,meson-gxl"; | ||
| 11 | }; | ||
| 12 | |||
| 13 | /* The S805X Package doesn't seem to handle the 744MHz OPP correctly */ | ||
| 14 | &mali { | ||
| 15 | assigned-clocks = <&clkc CLKID_MALI_0_SEL>, | ||
| 16 | <&clkc CLKID_MALI_0>, | ||
| 17 | <&clkc CLKID_MALI>; /* Glitch free mux */ | ||
| 18 | assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, | ||
| 19 | <0>, /* Do Nothing */ | ||
| 20 | <&clkc CLKID_MALI_0>; | ||
| 21 | assigned-clock-rates = <0>, /* Do Nothing */ | ||
| 22 | <666666666>, | ||
| 23 | <0>; /* Do Nothing */ | ||
| 24 | }; | ||
| @@ -337,6 +337,11 @@ · 336 unmodified lines | |||
| 337 | }; | 337 | }; |
| 338 | }; | 338 | }; |
| 339 | 339 | ||
| 340 | &hwrng { | ||
| 341 | clocks = <&clkc CLKID_RNG0>; | ||
| 342 | clock-names = "core"; | ||
| 343 | }; | ||
| 344 | |||
| 340 | &i2c_A { | 345 | &i2c_A { |
| 341 | clocks = <&clkc CLKID_I2C>; | 346 | clocks = <&clkc CLKID_I2C>; |
| 342 | }; | 347 | }; |
| @@ -136,7 +136,7 @@ · 135 unmodified lines | |||
| 136 | 136 | ||
| 137 | ldo1_reg: LDO1 { | 137 | ldo1_reg: LDO1 { |
| 138 | regulator-name = "LDO1"; | 138 | regulator-name = "LDO1"; |
| 139 | regulator-min-microvolt = <3000000>; | 139 | regulator-min-microvolt = <1600000>; |
| 140 | regulator-max-microvolt = <3300000>; | 140 | regulator-max-microvolt = <3300000>; |
| 141 | regulator-boot-on; | 141 | regulator-boot-on; |
| 142 | regulator-always-on; | 142 | regulator-always-on; |
| @@ -144,7 +144,7 @@ · 1 unmodified line | |||
| 144 | 144 | ||
| 145 | ldo2_reg: LDO2 { | 145 | ldo2_reg: LDO2 { |
| 146 | regulator-name = "LDO2"; | 146 | regulator-name = "LDO2"; |
| 147 | regulator-min-microvolt = <900000>; | 147 | regulator-min-microvolt = <800000>; |
| 148 | regulator-max-microvolt = <900000>; | 148 | regulator-max-microvolt = <900000>; |
| 149 | regulator-boot-on; | 149 | regulator-boot-on; |
| 150 | regulator-always-on; | 150 | regulator-always-on; |
| @@ -208,7 +208,7 @@ · 207 unmodified lines | |||
| 208 | 208 | ||
| 209 | ldo1_reg: LDO1 { | 209 | ldo1_reg: LDO1 { |
| 210 | regulator-name = "LDO1"; | 210 | regulator-name = "LDO1"; |
| 211 | regulator-min-microvolt = <3000000>; | 211 | regulator-min-microvolt = <1600000>; |
| 212 | regulator-max-microvolt = <3300000>; | 212 | regulator-max-microvolt = <3300000>; |
| 213 | regulator-boot-on; | 213 | regulator-boot-on; |
| 214 | regulator-always-on; | 214 | regulator-always-on; |
| @@ -216,7 +216,7 @@ · 1 unmodified line | |||
| 216 | 216 | ||
| 217 | ldo2_reg: LDO2 { | 217 | ldo2_reg: LDO2 { |
| 218 | regulator-name = "LDO2"; | 218 | regulator-name = "LDO2"; |
| 219 | regulator-min-microvolt = <900000>; | 219 | regulator-min-microvolt = <800000>; |
| 220 | regulator-max-microvolt = <900000>; | 220 | regulator-max-microvolt = <900000>; |
| 221 | regulator-boot-on; | 221 | regulator-boot-on; |
| 222 | regulator-always-on; | 222 | regulator-always-on; |
| @@ -113,7 +113,7 @@ · 112 unmodified lines | |||
| 113 | 113 | ||
| 114 | ldo1_reg: LDO1 { | 114 | ldo1_reg: LDO1 { |
| 115 | regulator-name = "LDO1"; | 115 | regulator-name = "LDO1"; |
| 116 | regulator-min-microvolt = <3000000>; | 116 | regulator-min-microvolt = <1600000>; |
| 117 | regulator-max-microvolt = <3300000>; | 117 | regulator-max-microvolt = <3300000>; |
| 118 | regulator-boot-on; | 118 | regulator-boot-on; |
| 119 | regulator-always-on; | 119 | regulator-always-on; |
| @@ -121,7 +121,7 @@ · 1 unmodified line | |||
| 121 | 121 | ||
| 122 | ldo2_reg: LDO2 { | 122 | ldo2_reg: LDO2 { |
| 123 | regulator-name = "LDO2"; | 123 | regulator-name = "LDO2"; |
| 124 | regulator-min-microvolt = <900000>; | 124 | regulator-min-microvolt = <800000>; |
| 125 | regulator-max-microvolt = <900000>; | 125 | regulator-max-microvolt = <900000>; |
| 126 | regulator-boot-on; | 126 | regulator-boot-on; |
| 127 | regulator-always-on; | 127 | regulator-always-on; |
| @@ -98,6 +98,7 @@ · 97 unmodified lines | |||
| 98 | }; | 98 | }; |
| 99 | 99 | ||
| 100 | &qspi { | 100 | &qspi { |
| 101 | status = "okay"; | ||
| 101 | flash@0 { | 102 | flash@0 { |
| 102 | #address-cells = <1>; | 103 | #address-cells = <1>; |
| 103 | #size-cells = <1>; | 104 | #size-cells = <1>; |
| @@ -194,7 +194,7 @@ CONFIG_HOTPLUG_PCI=y · 193 unmodified lines | |||
| 194 | CONFIG_HOTPLUG_PCI_ACPI=y | 194 | CONFIG_HOTPLUG_PCI_ACPI=y |
| 195 | CONFIG_PCI_AARDVARK=y | 195 | CONFIG_PCI_AARDVARK=y |
| 196 | CONFIG_PCI_TEGRA=y | 196 | CONFIG_PCI_TEGRA=y |
| 197 | CONFIG_PCIE_RCAR=y | 197 | CONFIG_PCIE_RCAR_HOST=y |
| 198 | CONFIG_PCI_HOST_GENERIC=y | 198 | CONFIG_PCI_HOST_GENERIC=y |
| 199 | CONFIG_PCI_XGENE=y | 199 | CONFIG_PCI_XGENE=y |
| 200 | CONFIG_PCIE_ALTERA=y | 200 | CONFIG_PCIE_ALTERA=y |
| @@ -73,11 +73,11 @@ static inline void apply_alternatives_module(void *start, size_t length) { } · 72 unmodified lines | |||
| 73 | ".pushsection .altinstructions,\"a\"\n" \ | 73 | ".pushsection .altinstructions,\"a\"\n" \ |
| 74 | ALTINSTR_ENTRY(feature) \ | 74 | ALTINSTR_ENTRY(feature) \ |
| 75 | ".popsection\n" \ | 75 | ".popsection\n" \ |
| 76 | ".pushsection .altinstr_replacement, \"a\"\n" \ | 76 | ".subsection 1\n" \ |
| 77 | "663:\n\t" \ | 77 | "663:\n\t" \ |
| 78 | newinstr "\n" \ | 78 | newinstr "\n" \ |
| 79 | "664:\n\t" \ | 79 | "664:\n\t" \ |
| 80 | ".popsection\n\t" \ | 80 | ".previous\n\t" \ |
| 81 | ".org . - (664b-663b) + (662b-661b)\n\t" \ | 81 | ".org . - (664b-663b) + (662b-661b)\n\t" \ |
| 82 | ".org . - (662b-661b) + (664b-663b)\n" \ | 82 | ".org . - (662b-661b) + (664b-663b)\n" \ |
| 83 | ".endif\n" | 83 | ".endif\n" |
| @@ -117,9 +117,9 @@ static inline void apply_alternatives_module(void *start, size_t length) { } · 33 unmodified lines | |||
| 117 | 662: .pushsection .altinstructions, "a" | 117 | 662: .pushsection .altinstructions, "a" |
| 118 | altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f | 118 | altinstruction_entry 661b, 663f, \cap, 662b-661b, 664f-663f |
| 119 | .popsection | 119 | .popsection |
| 120 | .pushsection .altinstr_replacement, "ax" | 120 | .subsection 1 |
| 121 | 663: \insn2 | 121 | 663: \insn2 |
| 122 | 664: .popsection | 122 | 664: .previous |
| 123 | .org . - (664b-663b) + (662b-661b) | 123 | .org . - (664b-663b) + (662b-661b) |
| 124 | .org . - (662b-661b) + (664b-663b) | 124 | .org . - (662b-661b) + (664b-663b) |
| 125 | .endif | 125 | .endif |
| @@ -160,7 +160,7 @@ static inline void apply_alternatives_module(void *start, size_t length) { } · 34 unmodified lines | |||
| 160 | .pushsection .altinstructions, "a" | 160 | .pushsection .altinstructions, "a" |
| 161 | altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f | 161 | altinstruction_entry 663f, 661f, \cap, 664f-663f, 662f-661f |
| 162 | .popsection | 162 | .popsection |
| 163 | .pushsection .altinstr_replacement, "ax" | 163 | .subsection 1 |
| 164 | .align 2 /* So GAS knows label 661 is suitably aligned */ | 164 | .align 2 /* So GAS knows label 661 is suitably aligned */ |
| 165 | 661: | 165 | 661: |
| 166 | .endm | 166 | .endm |
| @@ -179,9 +179,9 @@ static inline void apply_alternatives_module(void *start, size_t length) { } · 12 unmodified lines | |||
| 179 | .macro alternative_else | 179 | .macro alternative_else |
| 180 | 662: | 180 | 662: |
| 181 | .if .Lasm_alt_mode==0 | 181 | .if .Lasm_alt_mode==0 |
| 182 | .pushsection .altinstr_replacement, "ax" | 182 | .subsection 1 |
| 183 | .else | 183 | .else |
| 184 | .popsection | 184 | .previous |
| 185 | .endif | 185 | .endif |
| 186 | 663: | 186 | 663: |
| 187 | .endm | 187 | .endm |
| @@ -192,7 +192,7 @@ static inline void apply_alternatives_module(void *start, size_t length) { } · 4 unmodified lines | |||
| 192 | .macro alternative_endif | 192 | .macro alternative_endif |
| 193 | 664: | 193 | 664: |
| 194 | .if .Lasm_alt_mode==0 | 194 | .if .Lasm_alt_mode==0 |
| 195 | .popsection | 195 | .previous |
| 196 | .endif | 196 | .endif |
| 197 | .org . - (664b-663b) + (662b-661b) | 197 | .org . - (664b-663b) + (662b-661b) |
| 198 | .org . - (662b-661b) + (664b-663b) | 198 | .org . - (662b-661b) + (664b-663b) |
| @@ -109,7 +109,7 @@ static inline u32 gic_read_pmr(void) · 108 unmodified lines | |||
| 109 | return read_sysreg_s(SYS_ICC_PMR_EL1); | 109 | return read_sysreg_s(SYS_ICC_PMR_EL1); |
| 110 | } | 110 | } |
| 111 | 111 | ||
| 112 | static inline void gic_write_pmr(u32 val) | 112 | static __always_inline void gic_write_pmr(u32 val) |
| 113 | { | 113 | { |
| 114 | write_sysreg_s(val, SYS_ICC_PMR_EL1); | 114 | write_sysreg_s(val, SYS_ICC_PMR_EL1); |
| 115 | } | 115 | } |
| @@ -58,6 +58,7 @@ struct arch_timer_erratum_workaround { · 57 unmodified lines | |||
| 58 | u64 (*read_cntvct_el0)(void); | 58 | u64 (*read_cntvct_el0)(void); |
| 59 | int (*set_next_event_phys)(unsigned long, struct clock_event_device *); | 59 | int (*set_next_event_phys)(unsigned long, struct clock_event_device *); |
| 60 | int (*set_next_event_virt)(unsigned long, struct clock_event_device *); | 60 | int (*set_next_event_virt)(unsigned long, struct clock_event_device *); |
| 61 | bool disable_compat_vdso; | ||
| 61 | }; | 62 | }; |
| 62 | 63 | ||
| 63 | DECLARE_PER_CPU(const struct arch_timer_erratum_workaround *, | 64 | DECLARE_PER_CPU(const struct arch_timer_erratum_workaround *, |
| @@ -675,7 +675,7 @@ static inline bool system_supports_generic_auth(void) · 674 unmodified lines | |||
| 675 | cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH); | 675 | cpus_have_const_cap(ARM64_HAS_GENERIC_AUTH); |
| 676 | } | 676 | } |
| 677 | 677 | ||
| 678 | static inline bool system_uses_irq_prio_masking(void) | 678 | static __always_inline bool system_uses_irq_prio_masking(void) |
| 679 | { | 679 | { |
| 680 | return IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && | 680 | return IS_ENABLED(CONFIG_ARM64_PSEUDO_NMI) && |
| 681 | cpus_have_const_cap(ARM64_HAS_IRQ_PRIO_MASKING); | 681 | cpus_have_const_cap(ARM64_HAS_IRQ_PRIO_MASKING); |
| @@ -86,6 +86,7 @@ · 85 unmodified lines | |||
| 86 | #define QCOM_CPU_PART_FALKOR 0xC00 | 86 | #define QCOM_CPU_PART_FALKOR 0xC00 |
| 87 | #define QCOM_CPU_PART_KRYO 0x200 | 87 | #define QCOM_CPU_PART_KRYO 0x200 |
| 88 | #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 | 88 | #define QCOM_CPU_PART_KRYO_3XX_SILVER 0x803 |
| 89 | #define QCOM_CPU_PART_KRYO_4XX_GOLD 0x804 | ||
| 89 | #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 | 90 | #define QCOM_CPU_PART_KRYO_4XX_SILVER 0x805 |
| 90 | 91 | ||
| 91 | #define NVIDIA_CPU_PART_DENVER 0x003 | 92 | #define NVIDIA_CPU_PART_DENVER 0x003 |
| @@ -114,6 +115,7 @@ · 22 unmodified lines | |||
| 114 | #define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR) | 115 | #define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR) |
| 115 | #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO) | 116 | #define MIDR_QCOM_KRYO MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO) |
| 116 | #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER) | 117 | #define MIDR_QCOM_KRYO_3XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_3XX_SILVER) |
| 118 | #define MIDR_QCOM_KRYO_4XX_GOLD MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_GOLD) | ||
| 117 | #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER) | 119 | #define MIDR_QCOM_KRYO_4XX_SILVER MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_KRYO_4XX_SILVER) |
| 118 | #define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER) | 120 | #define MIDR_NVIDIA_DENVER MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_DENVER) |
| 119 | #define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL) | 121 | #define MIDR_NVIDIA_CARMEL MIDR_CPU_MODEL(ARM_CPU_IMP_NVIDIA, NVIDIA_CPU_PART_CARMEL) |
| @@ -109,6 +109,8 @@ void disable_debug_monitors(enum dbg_active_el el); · 108 unmodified lines | |||
| 109 | 109 | ||
| 110 | void user_rewind_single_step(struct task_struct *task); | 110 | void user_rewind_single_step(struct task_struct *task); |
| 111 | void user_fastforward_single_step(struct task_struct *task); | 111 | void user_fastforward_single_step(struct task_struct *task); |
| 112 | void user_regs_reset_single_step(struct user_pt_regs *regs, | ||
| 113 | struct task_struct *task); | ||
| 112 | 114 | ||
| 113 | void kernel_enable_single_step(struct pt_regs *regs); | 115 | void kernel_enable_single_step(struct pt_regs *regs); |
| 114 | void kernel_disable_single_step(void); | 116 | void kernel_disable_single_step(void); |
| @@ -12,7 +12,6 @@ · 11 unmodified lines | |||
| 12 | * instead. | 12 | * instead. |
| 13 | */ | 13 | */ |
| 14 | #define BTI_C hint 34 ; | 14 | #define BTI_C hint 34 ; |
| 15 | #define BTI_J hint 36 ; | ||
| 16 | 15 | ||
| 17 | /* | 16 | /* |
| 18 | * When using in-kernel BTI we need to ensure that PCS-conformant assembly | 17 | * When using in-kernel BTI we need to ensure that PCS-conformant assembly |
| @@ -43,11 +42,6 @@ · 24 unmodified lines | |||
| 43 | SYM_START(name, SYM_L_WEAK, SYM_A_NONE) \ | 42 | SYM_START(name, SYM_L_WEAK, SYM_A_NONE) \ |
| 44 | BTI_C | 43 | BTI_C |
| 45 | 44 | ||
| 46 | #define SYM_INNER_LABEL(name, linkage) \ | ||
| 47 | .type name SYM_T_NONE ASM_NL \ | ||
| 48 | SYM_ENTRY(name, linkage, SYM_A_NONE) \ | ||
| 49 | BTI_J | ||
| 50 | |||
| 51 | #endif | 45 | #endif |
| 52 | 46 | ||
| 53 | /* | 47 | /* |
| @@ -19,6 +19,9 @@ · 18 unmodified lines | |||
| 19 | 19 | ||
| 20 | typedef struct { | 20 | typedef struct { |
| 21 | atomic64_t id; | 21 | atomic64_t id; |
| 22 | #ifdef CONFIG_COMPAT | ||
| 23 | void *sigpage; | ||
| 24 | #endif | ||
| 22 | void *vdso; | 25 | void *vdso; |
| 23 | unsigned long flags; | 26 | unsigned long flags; |
| 24 | } mm_context_t; | 27 | } mm_context_t; |
| @@ -67,7 +67,7 @@ extern bool arm64_use_ng_mappings; · 66 unmodified lines | |||
| 67 | #define PAGE_HYP __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_HYP_XN) | 67 | #define PAGE_HYP __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_HYP_XN) |
| 68 | #define PAGE_HYP_EXEC __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY) | 68 | #define PAGE_HYP_EXEC __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY) |
| 69 | #define PAGE_HYP_RO __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY | PTE_HYP_XN) | 69 | #define PAGE_HYP_RO __pgprot(_HYP_PAGE_DEFAULT | PTE_HYP | PTE_RDONLY | PTE_HYP_XN) |
| 70 | #define PAGE_HYP_DEVICE __pgprot(PROT_DEVICE_nGnRE | PTE_HYP) | 70 | #define PAGE_HYP_DEVICE __pgprot(_PROT_DEFAULT | PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_HYP | PTE_HYP_XN) |
| 71 | 71 | ||
| 72 | #define PAGE_S2_MEMATTR(attr) \ | 72 | #define PAGE_S2_MEMATTR(attr) \ |
| 73 | ({ \ | 73 | ({ \ |
| @@ -34,6 +34,10 @@ static inline long syscall_get_error(struct task_struct *task, · 33 unmodified lines | |||
| 34 | struct pt_regs *regs) | 34 | struct pt_regs *regs) |
| 35 | { | 35 | { |
| 36 | unsigned long error = regs->regs[0]; | 36 | unsigned long error = regs->regs[0]; |
| 37 | |||
| 38 | if (is_compat_thread(task_thread_info(task))) | ||
| 39 | error = sign_extend64(error, 31); | ||
| 40 | |||
| 37 | return IS_ERR_VALUE(error) ? error : 0; | 41 | return IS_ERR_VALUE(error) ? error : 0; |
| 38 | } | 42 | } |
| 39 | 43 | ||
| @@ -47,7 +51,13 @@ static inline void syscall_set_return_value(struct task_struct *task, · 7 unmodified lines | |||
| 47 | struct pt_regs *regs, | 51 | struct pt_regs *regs, |
| 48 | int error, long val) | 52 | int error, long val) |
| 49 | { | 53 | { |
| 50 | regs->regs[0] = (long) error ? error : val; | 54 | if (error) |
| 55 | val = error; | ||
| 56 | |||
| 57 | if (is_compat_thread(task_thread_info(task))) | ||
| 58 | val = lower_32_bits(val); | ||
| 59 | |||
| 60 | regs->regs[0] = val; | ||
| 51 | } | 61 | } |
| 52 | 62 | ||
| 53 | #define SYSCALL_MAX_ARGS 6 | 63 | #define SYSCALL_MAX_ARGS 6 |
| @@ -93,6 +93,7 @@ void arch_release_task_struct(struct task_struct *tsk); · 92 unmodified lines | |||
| 93 | #define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU) | 93 | #define _TIF_SYSCALL_EMU (1 << TIF_SYSCALL_EMU) |
| 94 | #define _TIF_UPROBE (1 << TIF_UPROBE) | 94 | #define _TIF_UPROBE (1 << TIF_UPROBE) |
| 95 | #define _TIF_FSCHECK (1 << TIF_FSCHECK) | 95 | #define _TIF_FSCHECK (1 << TIF_FSCHECK) |
| 96 | #define _TIF_SINGLESTEP (1 << TIF_SINGLESTEP) | ||
| 96 | #define _TIF_32BIT (1 << TIF_32BIT) | 97 | #define _TIF_32BIT (1 << TIF_32BIT) |
| 97 | #define _TIF_SVE (1 << TIF_SVE) | 98 | #define _TIF_SVE (1 << TIF_SVE) |
| 98 | 99 | ||
| @@ -2,7 +2,10 @@ · 1 unmodified line | |||
| 2 | #ifndef __ASM_VDSOCLOCKSOURCE_H | 2 | #ifndef __ASM_VDSOCLOCKSOURCE_H |
| 3 | #define __ASM_VDSOCLOCKSOURCE_H | 3 | #define __ASM_VDSOCLOCKSOURCE_H |
| 4 | 4 | ||
| 5 | #define VDSO_ARCH_CLOCKMODES \ | 5 | #define VDSO_ARCH_CLOCKMODES \ |
| 6 | VDSO_CLOCKMODE_ARCHTIMER | 6 | /* vdso clocksource for both 32 and 64bit tasks */ \ |
| 7 | VDSO_CLOCKMODE_ARCHTIMER, \ | ||
| 8 | /* vdso clocksource for 64bit tasks only */ \ | ||
| 9 | VDSO_CLOCKMODE_ARCHTIMER_NOCOMPAT | ||
| 7 | 10 | ||
| 8 | #endif | 11 | #endif |
| @@ -111,7 +111,7 @@ static __always_inline u64 __arch_get_hw_counter(s32 clock_mode) · 110 unmodified lines | |||
| 111 | * update. Return something. Core will do another round and then | 111 | * update. Return something. Core will do another round and then |
| 112 | * see the mode change and fallback to the syscall. | 112 | * see the mode change and fallback to the syscall. |
| 113 | */ | 113 | */ |
| 114 | if (clock_mode == VDSO_CLOCKMODE_NONE) | 114 | if (clock_mode != VDSO_CLOCKMODE_ARCHTIMER) |
| 115 | return 0; | 115 | return 0; |
| 116 | 116 | ||
| 117 | /* | 117 | /* |
| @@ -152,6 +152,12 @@ static __always_inline const struct vdso_data *__arch_get_vdso_data(void) · 34 unmodified lines | |||
| 152 | return ret; | 152 | return ret; |
| 153 | } | 153 | } |
| 154 | 154 | ||
| 155 | static inline bool vdso_clocksource_ok(const struct vdso_data *vd) | ||
| 156 | { | ||
| 157 | return vd->clock_mode == VDSO_CLOCKMODE_ARCHTIMER; | ||
| 158 | } | ||
| 159 | #define vdso_clocksource_ok vdso_clocksource_ok | ||
| 160 | |||
| 155 | #endif /* !__ASSEMBLY__ */ | 161 | #endif /* !__ASSEMBLY__ */ |
| 156 | 162 | ||
| 157 | #endif /* __ASM_VDSO_GETTIMEOFDAY_H */ | 163 | #endif /* __ASM_VDSO_GETTIMEOFDAY_H */ |
| @@ -29,9 +29,7 @@ $(obj)/%.stub.o: $(obj)/%.o FORCE · 28 unmodified lines | |||
| 29 | 29 | ||
| 30 | obj-$(CONFIG_COMPAT) += sys32.o signal32.o \ | 30 | obj-$(CONFIG_COMPAT) += sys32.o signal32.o \ |
| 31 | sys_compat.o | 31 | sys_compat.o |
| 32 | ifneq ($(CONFIG_COMPAT_VDSO), y) | ||
| 33 | obj-$(CONFIG_COMPAT) += sigreturn32.o | 32 | obj-$(CONFIG_COMPAT) += sigreturn32.o |
| 34 | endif | ||
| 35 | obj-$(CONFIG_KUSER_HELPERS) += kuser32.o | 33 | obj-$(CONFIG_KUSER_HELPERS) += kuser32.o |
| 36 | obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o | 34 | obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o entry-ftrace.o |
| 37 | obj-$(CONFIG_MODULES) += module.o | 35 | obj-$(CONFIG_MODULES) += module.o |
| @@ -43,20 +43,8 @@ bool alternative_is_applied(u16 cpufeature) · 42 unmodified lines | |||
| 43 | */ | 43 | */ |
| 44 | static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc) | 44 | static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc) |
| 45 | { | 45 | { |
| 46 | unsigned long replptr; | 46 | unsigned long replptr = (unsigned long)ALT_REPL_PTR(alt); |
| 47 | 47 | return !(pc >= replptr && pc <= (replptr + alt->alt_len)); | |
| 48 | if (kernel_text_address(pc)) | ||
| 49 | return true; | ||
| 50 | |||
| 51 | replptr = (unsigned long)ALT_REPL_PTR(alt); | ||
| 52 | if (pc >= replptr && pc <= (replptr + alt->alt_len)) | ||
| 53 | return false; | ||
| 54 | |||
| 55 | /* | ||
| 56 | * Branching into *another* alternate sequence is doomed, and | ||
| 57 | * we're not even trying to fix it up. | ||
| 58 | */ | ||
| 59 | BUG(); | ||
| 60 | } | 48 | } |
| 61 | 49 | ||
| 62 | #define align_down(x, a) ((unsigned long)(x) & ~(((unsigned long)(a)) - 1)) | 50 | #define align_down(x, a) ((unsigned long)(x) & ~(((unsigned long)(a)) - 1)) |
| @@ -460,6 +460,8 @@ static const struct midr_range arm64_ssb_cpus[] = { · 459 unmodified lines | |||
| 460 | MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), | 460 | MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), |
| 461 | MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), | 461 | MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), |
| 462 | MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), | 462 | MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), |
| 463 | MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER), | ||
| 464 | MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER), | ||
| 463 | {}, | 465 | {}, |
| 464 | }; | 466 | }; |
| 465 | 467 | ||
| @@ -470,12 +472,7 @@ static bool · 4 unmodified lines | |||
| 470 | has_cortex_a76_erratum_1463225(const struct arm64_cpu_capabilities *entry, | 472 | has_cortex_a76_erratum_1463225(const struct arm64_cpu_capabilities *entry, |
| 471 | int scope) | 473 | int scope) |
| 472 | { | 474 | { |
| 473 | u32 midr = read_cpuid_id(); | 475 | return is_affected_midr_range_list(entry, scope) && is_kernel_in_hyp_mode(); |
| 474 | /* Cortex-A76 r0p0 - r3p1 */ | ||
| 475 | struct midr_range range = MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 1); | ||
| 476 | |||
| 477 | WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible()); | ||
| 478 | return is_midr_in_range(midr, &range) && is_kernel_in_hyp_mode(); | ||
| 479 | } | 476 | } |
| 480 | #endif | 477 | #endif |
| 481 | 478 | ||
| @@ -726,6 +723,8 @@ static const struct midr_range erratum_1418040_list[] = { · 244 unmodified lines | |||
| 726 | MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 1), | 723 | MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 1), |
| 727 | /* Neoverse-N1 r0p0 to r3p1 */ | 724 | /* Neoverse-N1 r0p0 to r3p1 */ |
| 728 | MIDR_RANGE(MIDR_NEOVERSE_N1, 0, 0, 3, 1), | 725 | MIDR_RANGE(MIDR_NEOVERSE_N1, 0, 0, 3, 1), |
| 726 | /* Kryo4xx Gold (rcpe to rfpf) => (r0p0 to r3p1) */ | ||
| 727 | MIDR_RANGE(MIDR_QCOM_KRYO_4XX_GOLD, 0xc, 0xe, 0xf, 0xf), | ||
| 729 | {}, | 728 | {}, |
| 730 | }; | 729 | }; |
| 731 | #endif | 730 | #endif |
| @@ -770,11 +769,23 @@ static const struct midr_range erratum_speculative_at_list[] = { · 38 unmodified lines | |||
| 770 | #ifdef CONFIG_ARM64_ERRATUM_1530923 | 769 | #ifdef CONFIG_ARM64_ERRATUM_1530923 |
| 771 | /* Cortex A55 r0p0 to r2p0 */ | 770 | /* Cortex A55 r0p0 to r2p0 */ |
| 772 | MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 2, 0), | 771 | MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 2, 0), |
| 772 | /* Kryo4xx Silver (rdpe => r1p0) */ | ||
| 773 | MIDR_REV(MIDR_QCOM_KRYO_4XX_SILVER, 0xd, 0xe), | ||
| 773 | #endif | 774 | #endif |
| 774 | {}, | 775 | {}, |
| 775 | }; | 776 | }; |
| 776 | #endif | 777 | #endif |
| 777 | 778 | ||
| 779 | #ifdef CONFIG_ARM64_ERRATUM_1463225 | ||
| 780 | static const struct midr_range erratum_1463225[] = { | ||
| 781 | /* Cortex-A76 r0p0 - r3p1 */ | ||
| 782 | MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 1), | ||
| 783 | /* Kryo4xx Gold (rcpe to rfpf) => (r0p0 to r3p1) */ | ||
| 784 | MIDR_RANGE(MIDR_QCOM_KRYO_4XX_GOLD, 0xc, 0xe, 0xf, 0xf), | ||
| 785 | {}, | ||
| 786 | }; | ||
| 787 | #endif | ||
| 788 | |||
| 778 | const struct arm64_cpu_capabilities arm64_errata[] = { | 789 | const struct arm64_cpu_capabilities arm64_errata[] = { |
| 779 | #ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE | 790 | #ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE |
| 780 | { | 791 | { |
| @@ -914,6 +925,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = { · 133 unmodified lines | |||
| 914 | .capability = ARM64_WORKAROUND_1463225, | 925 | .capability = ARM64_WORKAROUND_1463225, |
| 915 | .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, | 926 | .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, |
| 916 | .matches = has_cortex_a76_erratum_1463225, | 927 | .matches = has_cortex_a76_erratum_1463225, |
| 928 | .midr_range_list = erratum_1463225, | ||
| 917 | }, | 929 | }, |
| 918 | #endif | 930 | #endif |
| 919 | #ifdef CONFIG_CAVIUM_TX2_ERRATUM_219 | 931 | #ifdef CONFIG_CAVIUM_TX2_ERRATUM_219 |
| @@ -1290,6 +1290,8 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry, · 1289 unmodified lines | |||
| 1290 | MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), | 1290 | MIDR_ALL_VERSIONS(MIDR_CORTEX_A73), |
| 1291 | MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), | 1291 | MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), |
| 1292 | MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL), | 1292 | MIDR_ALL_VERSIONS(MIDR_NVIDIA_CARMEL), |
| 1293 | MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_3XX_SILVER), | ||
| 1294 | MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_SILVER), | ||
| 1293 | { /* sentinel */ } | 1295 | { /* sentinel */ } |
| 1294 | }; | 1296 | }; |
| 1295 | char const *str = "kpti command line option"; | 1297 | char const *str = "kpti command line option"; |
| @@ -1406,6 +1408,8 @@ static bool cpu_has_broken_dbm(void) · 110 unmodified lines | |||
| 1406 | static const struct midr_range cpus[] = { | 1408 | static const struct midr_range cpus[] = { |
| 1407 | #ifdef CONFIG_ARM64_ERRATUM_1024718 | 1409 | #ifdef CONFIG_ARM64_ERRATUM_1024718 |
| 1408 | MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0), // A55 r0p0 -r1p0 | 1410 | MIDR_RANGE(MIDR_CORTEX_A55, 0, 0, 1, 0), // A55 r0p0 -r1p0 |
| 1411 | /* Kryo4xx Silver (rdpe => r1p0) */ | ||
| 1412 | MIDR_REV(MIDR_QCOM_KRYO_4XX_SILVER, 0xd, 0xe), | ||
| 1409 | #endif | 1413 | #endif |
| 1410 | {}, | 1414 | {}, |
| 1411 | }; | 1415 | }; |
| @@ -141,17 +141,20 @@ postcore_initcall(debug_monitors_init); · 140 unmodified lines | |||
| 141 | /* | 141 | /* |
| 142 | * Single step API and exception handling. | 142 | * Single step API and exception handling. |
| 143 | */ | 143 | */ |
| 144 | static void set_regs_spsr_ss(struct pt_regs *regs) | 144 | static void set_user_regs_spsr_ss(struct user_pt_regs *regs) |
| 145 | { | 145 | { |
| 146 | regs->pstate |= DBG_SPSR_SS; | 146 | regs->pstate |= DBG_SPSR_SS; |
| 147 | } | 147 | } |
| 148 | NOKPROBE_SYMBOL(set_regs_spsr_ss); | 148 | NOKPROBE_SYMBOL(set_user_regs_spsr_ss); |
| 149 | 149 | ||
| 150 | static void clear_regs_spsr_ss(struct pt_regs *regs) | 150 | static void clear_user_regs_spsr_ss(struct user_pt_regs *regs) |
| 151 | { | 151 | { |
| 152 | regs->pstate &= ~DBG_SPSR_SS; | 152 | regs->pstate &= ~DBG_SPSR_SS; |
| 153 | } | 153 | } |
| 154 | NOKPROBE_SYMBOL(clear_regs_spsr_ss); | 154 | NOKPROBE_SYMBOL(clear_user_regs_spsr_ss); |
| 155 | |||
| 156 | #define set_regs_spsr_ss(r) set_user_regs_spsr_ss(&(r)->user_regs) | ||
| 157 | #define clear_regs_spsr_ss(r) clear_user_regs_spsr_ss(&(r)->user_regs) | ||
| 155 | 158 | ||
| 156 | static DEFINE_SPINLOCK(debug_hook_lock); | 159 | static DEFINE_SPINLOCK(debug_hook_lock); |
| 157 | static LIST_HEAD(user_step_hook); | 160 | static LIST_HEAD(user_step_hook); |
| @@ -391,17 +394,26 @@ void user_rewind_single_step(struct task_struct *task) · 233 unmodified lines | |||
| 391 | * If single step is active for this thread, then set SPSR.SS | 394 | * If single step is active for this thread, then set SPSR.SS |
| 392 | * to 1 to avoid returning to the active-pending state. | 395 | * to 1 to avoid returning to the active-pending state. |
| 393 | */ | 396 | */ |
| 394 | if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP)) | 397 | if (test_tsk_thread_flag(task, TIF_SINGLESTEP)) |
| 395 | set_regs_spsr_ss(task_pt_regs(task)); | 398 | set_regs_spsr_ss(task_pt_regs(task)); |
| 396 | } | 399 | } |
| 397 | NOKPROBE_SYMBOL(user_rewind_single_step); | 400 | NOKPROBE_SYMBOL(user_rewind_single_step); |
| 398 | 401 | ||
| 399 | void user_fastforward_single_step(struct task_struct *task) | 402 | void user_fastforward_single_step(struct task_struct *task) |
| 400 | { | 403 | { |
| 401 | if (test_ti_thread_flag(task_thread_info(task), TIF_SINGLESTEP)) | 404 | if (test_tsk_thread_flag(task, TIF_SINGLESTEP)) |
| 402 | clear_regs_spsr_ss(task_pt_regs(task)); | 405 | clear_regs_spsr_ss(task_pt_regs(task)); |
| 403 | } | 406 | } |
| 404 | 407 | ||
| 408 | void user_regs_reset_single_step(struct user_pt_regs *regs, | ||
| 409 | struct task_struct *task) | ||
| 410 | { | ||
| 411 | if (test_tsk_thread_flag(task, TIF_SINGLESTEP)) | ||
| 412 | set_user_regs_spsr_ss(regs); | ||
| 413 | else | ||
| 414 | clear_user_regs_spsr_ss(regs); | ||
| 415 | } | ||
| 416 | |||
| 405 | /* Kernel API */ | 417 | /* Kernel API */ |
| 406 | void kernel_enable_single_step(struct pt_regs *regs) | 418 | void kernel_enable_single_step(struct pt_regs *regs) |
| 407 | { | 419 | { |
| @@ -57,7 +57,7 @@ static void notrace el1_dbg(struct pt_regs *regs, unsigned long esr) · 56 unmodified lines | |||
| 57 | /* | 57 | /* |
| 58 | * The CPU masked interrupts, and we are leaving them masked during | 58 | * The CPU masked interrupts, and we are leaving them masked during |
| 59 | * do_debug_exception(). Update PMR as if we had called | 59 | * do_debug_exception(). Update PMR as if we had called |
| 60 | * local_mask_daif(). | 60 | * local_daif_mask(). |
| 61 | */ | 61 | */ |
| 62 | if (system_uses_irq_prio_masking()) | 62 | if (system_uses_irq_prio_masking()) |
| 63 | gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET); | 63 | gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET); |
| @@ -126,8 +126,10 @@ alternative_else_nop_endif · 125 unmodified lines | |||
| 126 | add \dst, \dst, #(\sym - .entry.tramp.text) | 126 | add \dst, \dst, #(\sym - .entry.tramp.text) |
| 127 | .endm | 127 | .endm |
| 128 | 128 | ||
| 129 | // This macro corrupts x0-x3. It is the caller's duty | 129 | /* |
| 130 | // to save/restore them if required. | 130 | * This macro corrupts x0-x3. It is the caller's duty to save/restore |
| 131 | * them if required. | ||
| 132 | */ | ||
| 131 | .macro apply_ssbd, state, tmp1, tmp2 | 133 | .macro apply_ssbd, state, tmp1, tmp2 |
| 132 | #ifdef CONFIG_ARM64_SSBD | 134 | #ifdef CONFIG_ARM64_SSBD |
| 133 | alternative_cb arm64_enable_wa2_handling | 135 | alternative_cb arm64_enable_wa2_handling |
| @@ -167,13 +169,28 @@ alternative_cb_end · 33 unmodified lines | |||
| 167 | stp x28, x29, [sp, #16 * 14] | 169 | stp x28, x29, [sp, #16 * 14] |
| 168 | 170 | ||
| 169 | .if \el == 0 | 171 | .if \el == 0 |
| 172 | .if \regsize == 32 | ||
| 173 | /* | ||
| 174 | * If we're returning from a 32-bit task on a system affected by | ||
| 175 | * 1418040 then re-enable userspace access to the virtual counter. | ||
| 176 | */ | ||
| 177 | #ifdef CONFIG_ARM64_ERRATUM_1418040 | ||
| 178 | alternative_if ARM64_WORKAROUND_1418040 | ||
| 179 | mrs x0, cntkctl_el1 | ||
| 180 | orr x0, x0, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN | ||
| 181 | msr cntkctl_el1, x0 | ||
| 182 | alternative_else_nop_endif | ||
| 183 | #endif | ||
| 184 | .endif | ||
| 170 | clear_gp_regs | 185 | clear_gp_regs |
| 171 | mrs x21, sp_el0 | 186 | mrs x21, sp_el0 |
| 172 | ldr_this_cpu tsk, __entry_task, x20 | 187 | ldr_this_cpu tsk, __entry_task, x20 |
| 173 | msr sp_el0, tsk | 188 | msr sp_el0, tsk |
| 174 | 189 | ||
| 175 | // Ensure MDSCR_EL1.SS is clear, since we can unmask debug exceptions | 190 | /* |
| 176 | // when scheduling. | 191 | * Ensure MDSCR_EL1.SS is clear, since we can unmask debug exceptions |
| 192 | * when scheduling. | ||
| 193 | */ | ||
| 177 | ldr x19, [tsk, #TSK_TI_FLAGS] | 194 | ldr x19, [tsk, #TSK_TI_FLAGS] |
| 178 | disable_step_tsk x19, x20 | 195 | disable_step_tsk x19, x20 |
| 179 | 196 | ||
| @@ -320,6 +337,14 @@ alternative_else_nop_endif · 140 unmodified lines | |||
| 320 | tst x22, #PSR_MODE32_BIT // native task? | 337 | tst x22, #PSR_MODE32_BIT // native task? |
| 321 | b.eq 3f | 338 | b.eq 3f |
| 322 | 339 | ||
| 340 | #ifdef CONFIG_ARM64_ERRATUM_1418040 | ||
| 341 | alternative_if ARM64_WORKAROUND_1418040 | ||
| 342 | mrs x0, cntkctl_el1 | ||
| 343 | bic x0, x0, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN | ||
| 344 | msr cntkctl_el1, x0 | ||
| 345 | alternative_else_nop_endif | ||
| 346 | #endif | ||
| 347 | |||
| 323 | #ifdef CONFIG_ARM64_ERRATUM_845719 | 348 | #ifdef CONFIG_ARM64_ERRATUM_845719 |
| 324 | alternative_if ARM64_WORKAROUND_845719 | 349 | alternative_if ARM64_WORKAROUND_845719 |
| 325 | #ifdef CONFIG_PID_IN_CONTEXTIDR | 350 | #ifdef CONFIG_PID_IN_CONTEXTIDR |
| @@ -331,21 +356,6 @@ alternative_if ARM64_WORKAROUND_845719 · 5 unmodified lines | |||
| 331 | alternative_else_nop_endif | 356 | alternative_else_nop_endif |
| 332 | #endif | 357 | #endif |
| 333 | 3: | 358 | 3: |
| 334 | #ifdef CONFIG_ARM64_ERRATUM_1418040 | ||
| 335 | alternative_if_not ARM64_WORKAROUND_1418040 | ||
| 336 | b 4f | ||
| 337 | alternative_else_nop_endif | ||
| 338 | /* | ||
| 339 | * if (x22.mode32 == cntkctl_el1.el0vcten) | ||
| 340 | * cntkctl_el1.el0vcten = ~cntkctl_el1.el0vcten | ||
| 341 | */ | ||
| 342 | mrs x1, cntkctl_el1 | ||
| 343 | eon x0, x1, x22, lsr #3 | ||
| 344 | tbz x0, #1, 4f | ||
| 345 | eor x1, x1, #2 // ARCH_TIMER_USR_VCT_ACCESS_EN | ||
| 346 | msr cntkctl_el1, x1 | ||
| 347 | 4: | ||
| 348 | #endif | ||
| 349 | scs_save tsk, x0 | 359 | scs_save tsk, x0 |
| 350 | 360 | ||
| 351 | /* No kernel C function calls after this as user keys are set. */ | 361 | /* No kernel C function calls after this as user keys are set. */ |
| @@ -377,11 +387,11 @@ alternative_else_nop_endif · 25 unmodified lines | |||
| 377 | .if \el == 0 | 387 | .if \el == 0 |
| 378 | alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0 | 388 | alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0 |
| 379 | #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 | 389 | #ifdef CONFIG_UNMAP_KERNEL_AT_EL0 |
| 380 | bne 5f | 390 | bne 4f |
| 381 | msr far_el1, x30 | 391 | msr far_el1, x30 |
| 382 | tramp_alias x30, tramp_exit_native | 392 | tramp_alias x30, tramp_exit_native |
| 383 | br x30 | 393 | br x30 |
| 384 | 5: | 394 | 4: |
| 385 | tramp_alias x30, tramp_exit_compat | 395 | tramp_alias x30, tramp_exit_compat |
| 386 | br x30 | 396 | br x30 |
| 387 | #endif | 397 | #endif |
| @@ -252,7 +252,7 @@ static int kgdb_step_brk_fn(struct pt_regs *regs, unsigned int esr) · 251 unmodified lines | |||
| 252 | if (!kgdb_single_step) | 252 | if (!kgdb_single_step) |
| 253 | return DBG_HOOK_ERROR; | 253 | return DBG_HOOK_ERROR; |
| 254 | 254 | ||
| 255 | kgdb_handle_exception(1, SIGTRAP, 0, regs); | 255 | kgdb_handle_exception(0, SIGTRAP, 0, regs); |
| 256 | return DBG_HOOK_HANDLED; | 256 | return DBG_HOOK_HANDLED; |
| 257 | } | 257 | } |
| 258 | NOKPROBE_SYMBOL(kgdb_step_brk_fn); | 258 | NOKPROBE_SYMBOL(kgdb_step_brk_fn); |
| @@ -15,15 +15,34 @@ u64 perf_reg_value(struct pt_regs *regs, int idx) · 14 unmodified lines | |||
| 15 | return 0; | 15 | return 0; |
| 16 | 16 | ||
| 17 | /* | 17 | /* |
| 18 | * Compat (i.e. 32 bit) mode: | 18 | * Our handling of compat tasks (PERF_SAMPLE_REGS_ABI_32) is weird, but |
| 19 | * - PC has been set in the pt_regs struct in kernel_entry, | 19 | * we're stuck with it for ABI compatability reasons. |
| 20 | * - Handle SP and LR here. | 20 | * |
| 21 | * For a 32-bit consumer inspecting a 32-bit task, then it will look at | ||
| 22 | * the first 16 registers (see arch/arm/include/uapi/asm/perf_regs.h). | ||
| 23 | * These correspond directly to a prefix of the registers saved in our | ||
| 24 | * 'struct pt_regs', with the exception of the PC, so we copy that down | ||
| 25 | * (x15 corresponds to SP_hyp in the architecture). | ||
| 26 | * | ||
| 27 | * So far, so good. | ||
| 28 | * | ||
| 29 | * The oddity arises when a 64-bit consumer looks at a 32-bit task and | ||
| 30 | * asks for registers beyond PERF_REG_ARM_MAX. In this case, we return | ||
| 31 | * SP_usr, LR_usr and PC in the positions where the AArch64 SP, LR and | ||
| 32 | * PC registers would normally live. The initial idea was to allow a | ||
| 33 | * 64-bit unwinder to unwind a 32-bit task and, although it's not clear | ||
| 34 | * how well that works in practice, somebody might be relying on it. | ||
| 35 | * | ||
| 36 | * At the time we make a sample, we don't know whether the consumer is | ||
| 37 | * 32-bit or 64-bit, so we have to cater for both possibilities. | ||
| 21 | */ | 38 | */ |
| 22 | if (compat_user_mode(regs)) { | 39 | if (compat_user_mode(regs)) { |
| 23 | if ((u32)idx == PERF_REG_ARM64_SP) | 40 | if ((u32)idx == PERF_REG_ARM64_SP) |
| 24 | return regs->compat_sp; | 41 | return regs->compat_sp; |
| 25 | if ((u32)idx == PERF_REG_ARM64_LR) | 42 | if ((u32)idx == PERF_REG_ARM64_LR) |
| 26 | return regs->compat_lr; | 43 | return regs->compat_lr; |
| 44 | if (idx == 15) | ||
| 45 | return regs->pc; | ||
| 27 | } | 46 | } |
| 28 | 47 | ||
| 29 | if ((u32)idx == PERF_REG_ARM64_SP) | 48 | if ((u32)idx == PERF_REG_ARM64_SP) |
| @@ -120,15 +120,9 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) · 119 unmodified lines | |||
| 120 | 120 | ||
| 121 | void *alloc_insn_page(void) | 121 | void *alloc_insn_page(void) |
| 122 | { | 122 | { |
| 123 | void *page; | 123 | return __vmalloc_node_range(PAGE_SIZE, 1, VMALLOC_START, VMALLOC_END, |
| 124 | 124 | GFP_KERNEL, PAGE_KERNEL_ROX, VM_FLUSH_RESET_PERMS, | |
| 125 | page = vmalloc_exec(PAGE_SIZE); | 125 | NUMA_NO_NODE, __builtin_return_address(0)); |
| 126 | if (page) { | ||
| 127 | set_memory_ro((unsigned long)page, 1); | ||
| 128 | set_vm_flush_reset_perms(page); | ||
| 129 | } | ||
| 130 | |||
| 131 | return page; | ||
| 132 | } | 126 | } |
| 133 | 127 | ||
| 134 | /* arm kprobe: install breakpoint in text */ | 128 | /* arm kprobe: install breakpoint in text */ |
| @@ -1811,19 +1811,42 @@ static void tracehook_report_syscall(struct pt_regs *regs, · 1810 unmodified lines | |||
| 1811 | unsigned long saved_reg; | 1811 | unsigned long saved_reg; |
| 1812 | 1812 | ||
| 1813 | /* | 1813 | /* |
| 1814 | * A scratch register (ip(r12) on AArch32, x7 on AArch64) is | 1814 | * We have some ABI weirdness here in the way that we handle syscall |
| 1815 | * used to denote syscall entry/exit: | 1815 | * exit stops because we indicate whether or not the stop has been |
| 1816 | * signalled from syscall entry or syscall exit by clobbering a general | ||
| 1817 | * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee | ||
| 1818 | * and restoring its old value after the stop. This means that: | ||
| 1819 | * | ||
| 1820 | * - Any writes by the tracer to this register during the stop are | ||
| 1821 | * ignored/discarded. | ||
| 1822 | * | ||
| 1823 | * - The actual value of the register is not available during the stop, | ||
| 1824 | * so the tracer cannot save it and restore it later. | ||
| 1825 | * | ||
| 1826 | * - Syscall stops behave differently to seccomp and pseudo-step traps | ||
| 1827 | * (the latter do not nobble any registers). | ||
| 1816 | */ | 1828 | */ |
| 1817 | regno = (is_compat_task() ? 12 : 7); | 1829 | regno = (is_compat_task() ? 12 : 7); |
| 1818 | saved_reg = regs->regs[regno]; | 1830 | saved_reg = regs->regs[regno]; |
| 1819 | regs->regs[regno] = dir; | 1831 | regs->regs[regno] = dir; |
| 1820 | 1832 | ||
| 1821 | if (dir == PTRACE_SYSCALL_EXIT) | 1833 | if (dir == PTRACE_SYSCALL_ENTER) { |
| 1834 | if (tracehook_report_syscall_entry(regs)) | ||
| 1835 | forget_syscall(regs); | ||
| 1836 | regs->regs[regno] = saved_reg; | ||
| 1837 | } else if (!test_thread_flag(TIF_SINGLESTEP)) { | ||
| 1822 | tracehook_report_syscall_exit(regs, 0); | 1838 | tracehook_report_syscall_exit(regs, 0); |
| 1823 | else if (tracehook_report_syscall_entry(regs)) | 1839 | regs->regs[regno] = saved_reg; |
| 1824 | forget_syscall(regs); | 1840 | } else { |
| 1841 | regs->regs[regno] = saved_reg; | ||
| 1825 | 1842 | ||
| 1826 | regs->regs[regno] = saved_reg; | 1843 | /* |
| 1844 | * Signal a pseudo-step exception since we are stepping but | ||
| 1845 | * tracer modifications to the registers may have rewound the | ||
| 1846 | * state machine. | ||
| 1847 | */ | ||
| 1848 | tracehook_report_syscall_exit(regs, 1); | ||
| 1849 | } | ||
| 1827 | } | 1850 | } |
| 1828 | 1851 | ||
| 1829 | int syscall_trace_enter(struct pt_regs *regs) | 1852 | int syscall_trace_enter(struct pt_regs *regs) |
| @@ -1833,12 +1856,12 @@ int syscall_trace_enter(struct pt_regs *regs) · 3 unmodified lines | |||
| 1833 | if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) { | 1856 | if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) { |
| 1834 | tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); | 1857 | tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER); |
| 1835 | if (!in_syscall(regs) || (flags & _TIF_SYSCALL_EMU)) | 1858 | if (!in_syscall(regs) || (flags & _TIF_SYSCALL_EMU)) |
| 1836 | return -1; | 1859 | return NO_SYSCALL; |
| 1837 | } | 1860 | } |
| 1838 | 1861 | ||
| 1839 | /* Do the secure computing after ptrace; failures should be fast. */ | 1862 | /* Do the secure computing after ptrace; failures should be fast. */ |
| 1840 | if (secure_computing() == -1) | 1863 | if (secure_computing() == -1) |
| 1841 | return -1; | 1864 | return NO_SYSCALL; |
| 1842 | 1865 | ||
| 1843 | if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) | 1866 | if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) |
| 1844 | trace_sys_enter(regs, regs->syscallno); | 1867 | trace_sys_enter(regs, regs->syscallno); |
| @@ -1851,12 +1874,14 @@ int syscall_trace_enter(struct pt_regs *regs) · 6 unmodified lines | |||
| 1851 | 1874 | ||
| 1852 | void syscall_trace_exit(struct pt_regs *regs) | 1875 | void syscall_trace_exit(struct pt_regs *regs) |
| 1853 | { | 1876 | { |
| 1877 | unsigned long flags = READ_ONCE(current_thread_info()->flags); | ||
| 1878 | |||
| 1854 | audit_syscall_exit(regs); | 1879 | audit_syscall_exit(regs); |
| 1855 | 1880 | ||
| 1856 | if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) | 1881 | if (flags & _TIF_SYSCALL_TRACEPOINT) |
| 1857 | trace_sys_exit(regs, regs_return_value(regs)); | 1882 | trace_sys_exit(regs, regs_return_value(regs)); |
| 1858 | 1883 | ||
| 1859 | if (test_thread_flag(TIF_SYSCALL_TRACE)) | 1884 | if (flags & (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP)) |
| 1860 | tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT); | 1885 | tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT); |
| 1861 | 1886 | ||
| 1862 | rseq_syscall(regs); | 1887 | rseq_syscall(regs); |
| @@ -1934,8 +1959,8 @@ static int valid_native_regs(struct user_pt_regs *regs) · 71 unmodified lines | |||
| 1934 | */ | 1959 | */ |
| 1935 | int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task) | 1960 | int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task) |
| 1936 | { | 1961 | { |
| 1937 | if (!test_tsk_thread_flag(task, TIF_SINGLESTEP)) | 1962 | /* https://lore.kernel.org/lkml/20191118131525.GA4180@willie-the-truck */ |
| 1938 | regs->pstate &= ~DBG_SPSR_SS; | 1963 | user_regs_reset_single_step(regs, task); |
| 1939 | 1964 | ||
| 1940 | if (is_compat_thread(task_thread_info(task))) | 1965 | if (is_compat_thread(task_thread_info(task))) |
| 1941 | return valid_compat_regs(regs); | 1966 | return valid_compat_regs(regs); |
| @@ -800,7 +800,6 @@ static void setup_restart_syscall(struct pt_regs *regs) · 799 unmodified lines | |||
| 800 | */ | 800 | */ |
| 801 | static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) | 801 | static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) |
| 802 | { | 802 | { |
| 803 | struct task_struct *tsk = current; | ||
| 804 | sigset_t *oldset = sigmask_to_save(); | 803 | sigset_t *oldset = sigmask_to_save(); |
| 805 | int usig = ksig->sig; | 804 | int usig = ksig->sig; |
| 806 | int ret; | 805 | int ret; |
| @@ -824,14 +823,8 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs) · 17 unmodified lines | |||
| 824 | */ | 823 | */ |
| 825 | ret |= !valid_user_regs(®s->user_regs, current); | 824 | ret |= !valid_user_regs(®s->user_regs, current); |
| 826 | 825 | ||
| 827 | /* | 826 | /* Step into the signal handler if we are stepping */ |
| 828 | * Fast forward the stepping logic so we step into the signal | 827 | signal_setup_done(ret, ksig, test_thread_flag(TIF_SINGLESTEP)); |
| 829 | * handler. | ||
| 830 | */ | ||
| 831 | if (!ret) | ||
| 832 | user_fastforward_single_step(tsk); | ||
| 833 | |||
| 834 | signal_setup_done(ret, ksig, 0); | ||
| 835 | } | 828 | } |
| 836 | 829 | ||
| 837 | /* | 830 | /* |
| @@ -342,38 +342,13 @@ static void compat_setup_return(struct pt_regs *regs, struct k_sigaction *ka, · 341 unmodified lines | |||
| 342 | retcode = ptr_to_compat(ka->sa.sa_restorer); | 342 | retcode = ptr_to_compat(ka->sa.sa_restorer); |
| 343 | } else { | 343 | } else { |
| 344 | /* Set up sigreturn pointer */ | 344 | /* Set up sigreturn pointer */ |
| 345 | #ifdef CONFIG_COMPAT_VDSO | ||
| 346 | void *vdso_base = current->mm->context.vdso; | ||
| 347 | void *vdso_trampoline; | ||
| 348 | |||
| 349 | if (ka->sa.sa_flags & SA_SIGINFO) { | ||
| 350 | if (thumb) { | ||
| 351 | vdso_trampoline = VDSO_SYMBOL(vdso_base, | ||
| 352 | compat_rt_sigreturn_thumb); | ||
| 353 | } else { | ||
| 354 | vdso_trampoline = VDSO_SYMBOL(vdso_base, | ||
| 355 | compat_rt_sigreturn_arm); | ||
| 356 | } | ||
| 357 | } else { | ||
| 358 | if (thumb) { | ||
| 359 | vdso_trampoline = VDSO_SYMBOL(vdso_base, | ||
| 360 | compat_sigreturn_thumb); | ||
| 361 | } else { | ||
| 362 | vdso_trampoline = VDSO_SYMBOL(vdso_base, | ||
| 363 | compat_sigreturn_arm); | ||
| 364 | } | ||
| 365 | } | ||
| 366 | |||
| 367 | retcode = ptr_to_compat(vdso_trampoline) + thumb; | ||
| 368 | #else | ||
| 369 | unsigned int idx = thumb << 1; | 345 | unsigned int idx = thumb << 1; |
| 370 | 346 | ||
| 371 | if (ka->sa.sa_flags & SA_SIGINFO) | 347 | if (ka->sa.sa_flags & SA_SIGINFO) |
| 372 | idx += 3; | 348 | idx += 3; |
| 373 | 349 | ||
| 374 | retcode = (unsigned long)current->mm->context.vdso + | 350 | retcode = (unsigned long)current->mm->context.sigpage + |
| 375 | (idx << 2) + thumb; | 351 | (idx << 2) + thumb; |
| 376 | #endif | ||
| 377 | } | 352 | } |
| 378 | 353 | ||
| 379 | regs->regs[0] = usig; | 354 | regs->regs[0] = usig; |
| @@ -50,6 +50,9 @@ static void invoke_syscall(struct pt_regs *regs, unsigned int scno, · 49 unmodified lines | |||
| 50 | ret = do_ni_syscall(regs, scno); | 50 | ret = do_ni_syscall(regs, scno); |
| 51 | } | 51 | } |
| 52 | 52 | ||
| 53 | if (is_compat_task()) | ||
| 54 | ret = lower_32_bits(ret); | ||
| 55 | |||
| 53 | regs->regs[0] = ret; | 56 | regs->regs[0] = ret; |
| 54 | } | 57 | } |
| 55 | 58 | ||
| @@ -121,7 +124,21 @@ static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr, · 65 unmodified lines | |||
| 121 | user_exit(); | 124 | user_exit(); |
| 122 | 125 | ||
| 123 | if (has_syscall_work(flags)) { | 126 | if (has_syscall_work(flags)) { |
| 124 | /* set default errno for user-issued syscall(-1) */ | 127 | /* |
| 128 | * The de-facto standard way to skip a system call using ptrace | ||
| 129 | * is to set the system call to -1 (NO_SYSCALL) and set x0 to a | ||
| 130 | * suitable error code for consumption by userspace. However, | ||
| 131 | * this cannot be distinguished from a user-issued syscall(-1) | ||
| 132 | * and so we must set x0 to -ENOSYS here in case the tracer doesn't | ||
| 133 | * issue the skip and we fall into trace_exit with x0 preserved. | ||
| 134 | * | ||
| 135 | * This is slightly odd because it also means that if a tracer | ||
| 136 | * sets the system call number to -1 but does not initialise x0, | ||
| 137 | * then x0 will be preserved for all system calls apart from a | ||
| 138 | * user-issued syscall(-1). However, requesting a skip and not | ||
| 139 | * setting the return value is unlikely to do anything sensible | ||
| 140 | * anyway. | ||
| 141 | */ | ||
| 125 | if (scno == NO_SYSCALL) | 142 | if (scno == NO_SYSCALL) |
| 126 | regs->regs[0] = -ENOSYS; | 143 | regs->regs[0] = -ENOSYS; |
| 127 | scno = syscall_trace_enter(regs); | 144 | scno = syscall_trace_enter(regs); |
| @@ -139,7 +156,7 @@ static void el0_svc_common(struct pt_regs *regs, int scno, int sc_nr, · 11 unmodified lines | |||
| 139 | if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { | 156 | if (!has_syscall_work(flags) && !IS_ENABLED(CONFIG_DEBUG_RSEQ)) { |
| 140 | local_daif_mask(); | 157 | local_daif_mask(); |
| 141 | flags = current_thread_info()->flags; | 158 | flags = current_thread_info()->flags; |
| 142 | if (!has_syscall_work(flags)) { | 159 | if (!has_syscall_work(flags) && !(flags & _TIF_SINGLESTEP)) { |
| 143 | /* | 160 | /* |
| 144 | * We're off to userspace, where interrupts are | 161 | * We're off to userspace, where interrupts are |
| 145 | * always enabled after we restore the flags from | 162 | * always enabled after we restore the flags from |
| @@ -191,15 +191,12 @@ enum aarch32_map { · 190 unmodified lines | |||
| 191 | #ifdef CONFIG_COMPAT_VDSO | 191 | #ifdef CONFIG_COMPAT_VDSO |
| 192 | AA32_MAP_VVAR, | 192 | AA32_MAP_VVAR, |
| 193 | AA32_MAP_VDSO, | 193 | AA32_MAP_VDSO, |
| 194 | #else | ||
| 195 | AA32_MAP_SIGPAGE | ||
| 196 | #endif | 194 | #endif |
| 195 | AA32_MAP_SIGPAGE | ||
| 197 | }; | 196 | }; |
| 198 | 197 | ||
| 199 | static struct page *aarch32_vectors_page __ro_after_init; | 198 | static struct page *aarch32_vectors_page __ro_after_init; |
| 200 | #ifndef CONFIG_COMPAT_VDSO | ||
| 201 | static struct page *aarch32_sig_page __ro_after_init; | 199 | static struct page *aarch32_sig_page __ro_after_init; |
| 202 | #endif | ||
| 203 | 200 | ||
| 204 | static struct vm_special_mapping aarch32_vdso_maps[] = { | 201 | static struct vm_special_mapping aarch32_vdso_maps[] = { |
| 205 | [AA32_MAP_VECTORS] = { | 202 | [AA32_MAP_VECTORS] = { |
| @@ -214,12 +211,11 @@ static struct vm_special_mapping aarch32_vdso_maps[] = { · 8 unmodified lines | |||
| 214 | .name = "[vdso]", | 211 | .name = "[vdso]", |
| 215 | .mremap = aarch32_vdso_mremap, | 212 | .mremap = aarch32_vdso_mremap, |
| 216 | }, | 213 | }, |
| 217 | #else | 214 | #endif /* CONFIG_COMPAT_VDSO */ |
| 218 | [AA32_MAP_SIGPAGE] = { | 215 | [AA32_MAP_SIGPAGE] = { |
| 219 | .name = "[sigpage]", /* ABI */ | 216 | .name = "[sigpage]", /* ABI */ |
| 220 | .pages = &aarch32_sig_page, | 217 | .pages = &aarch32_sig_page, |
| 221 | }, | 218 | }, |
| 222 | #endif /* CONFIG_COMPAT_VDSO */ | ||
| 223 | }; | 219 | }; |
| 224 | 220 | ||
| 225 | static int aarch32_alloc_kuser_vdso_page(void) | 221 | static int aarch32_alloc_kuser_vdso_page(void) |
| @@ -242,27 +238,11 @@ static int aarch32_alloc_kuser_vdso_page(void) · 16 unmodified lines | |||
| 242 | return 0; | 238 | return 0; |
| 243 | } | 239 | } |
| 244 | 240 | ||
| 245 | #ifdef CONFIG_COMPAT_VDSO | 241 | static int aarch32_alloc_sigpage(void) |
| 246 | static int __aarch32_alloc_vdso_pages(void) | ||
| 247 | { | ||
| 248 | int ret; | ||
| 249 | |||
| 250 | vdso_info[VDSO_ABI_AA32].dm = &aarch32_vdso_maps[AA32_MAP_VVAR]; | ||
| 251 | vdso_info[VDSO_ABI_AA32].cm = &aarch32_vdso_maps[AA32_MAP_VDSO]; | ||
| 252 | |||
| 253 | ret = __vdso_init(VDSO_ABI_AA32); | ||
| 254 | if (ret) | ||
| 255 | return ret; | ||
| 256 | |||
| 257 | return aarch32_alloc_kuser_vdso_page(); | ||
| 258 | } | ||
| 259 | #else | ||
| 260 | static int __aarch32_alloc_vdso_pages(void) | ||
| 261 | { | 242 | { |
| 262 | extern char __aarch32_sigret_code_start[], __aarch32_sigret_code_end[]; | 243 | extern char __aarch32_sigret_code_start[], __aarch32_sigret_code_end[]; |
| 263 | int sigret_sz = __aarch32_sigret_code_end - __aarch32_sigret_code_start; | 244 | int sigret_sz = __aarch32_sigret_code_end - __aarch32_sigret_code_start; |
| 264 | unsigned long sigpage; | 245 | unsigned long sigpage; |
| 265 | int ret; | ||
| 266 | 246 | ||
| 267 | sigpage = get_zeroed_page(GFP_ATOMIC); | 247 | sigpage = get_zeroed_page(GFP_ATOMIC); |
| 268 | if (!sigpage) | 248 | if (!sigpage) |
| @@ -271,18 +251,34 @@ static int __aarch32_alloc_vdso_pages(void) · 2 unmodified lines | |||
| 271 | memcpy((void *)sigpage, __aarch32_sigret_code_start, sigret_sz); | 251 | memcpy((void *)sigpage, __aarch32_sigret_code_start, sigret_sz); |
| 272 | aarch32_sig_page = virt_to_page(sigpage); | 252 | aarch32_sig_page = virt_to_page(sigpage); |
| 273 | flush_dcache_page(aarch32_sig_page); | 253 | flush_dcache_page(aarch32_sig_page); |
| 254 | return 0; | ||
| 255 | } | ||
| 274 | 256 | ||
| 275 | ret = aarch32_alloc_kuser_vdso_page(); | 257 | #ifdef CONFIG_COMPAT_VDSO |
| 276 | if (ret) | 258 | static int __aarch32_alloc_vdso_pages(void) |
| 277 | free_page(sigpage); | 259 | { |
| 260 | vdso_info[VDSO_ABI_AA32].dm = &aarch32_vdso_maps[AA32_MAP_VVAR]; | ||
| 261 | vdso_info[VDSO_ABI_AA32].cm = &aarch32_vdso_maps[AA32_MAP_VDSO]; | ||
| 278 | 262 | ||
| 279 | return ret; | 263 | return __vdso_init(VDSO_ABI_AA32); |
| 280 | } | 264 | } |
| 281 | #endif /* CONFIG_COMPAT_VDSO */ | 265 | #endif /* CONFIG_COMPAT_VDSO */ |
| 282 | 266 | ||
| 283 | static int __init aarch32_alloc_vdso_pages(void) | 267 | static int __init aarch32_alloc_vdso_pages(void) |
| 284 | { | 268 | { |
| 285 | return __aarch32_alloc_vdso_pages(); | 269 | int ret; |
| 270 | |||
| 271 | #ifdef CONFIG_COMPAT_VDSO | ||
| 272 | ret = __aarch32_alloc_vdso_pages(); | ||
| 273 | if (ret) | ||
| 274 | return ret; | ||
| 275 | #endif | ||
| 276 | |||
| 277 | ret = aarch32_alloc_sigpage(); | ||
| 278 | if (ret) | ||
| 279 | return ret; | ||
| 280 | |||
| 281 | return aarch32_alloc_kuser_vdso_page(); | ||
| 286 | } | 282 | } |
| 287 | arch_initcall(aarch32_alloc_vdso_pages); | 283 | arch_initcall(aarch32_alloc_vdso_pages); |
| 288 | 284 | ||
| @@ -305,7 +301,6 @@ static int aarch32_kuser_helpers_setup(struct mm_struct *mm) · 16 unmodified lines | |||
| 305 | return PTR_ERR_OR_ZERO(ret); | 301 | return PTR_ERR_OR_ZERO(ret); |
| 306 | } | 302 | } |
| 307 | 303 | ||
| 308 | #ifndef CONFIG_COMPAT_VDSO | ||
| 309 | static int aarch32_sigreturn_setup(struct mm_struct *mm) | 304 | static int aarch32_sigreturn_setup(struct mm_struct *mm) |
| 310 | { | 305 | { |
| 311 | unsigned long addr; | 306 | unsigned long addr; |
| @@ -328,12 +323,11 @@ static int aarch32_sigreturn_setup(struct mm_struct *mm) · 16 unmodified lines | |||
| 328 | if (IS_ERR(ret)) | 323 | if (IS_ERR(ret)) |
| 329 | goto out; | 324 | goto out; |
| 330 | 325 | ||
| 331 | mm->context.vdso = (void *)addr; | 326 | mm->context.sigpage = (void *)addr; |
| 332 | 327 | ||
| 333 | out: | 328 | out: |
| 334 | return PTR_ERR_OR_ZERO(ret); | 329 | return PTR_ERR_OR_ZERO(ret); |
| 335 | } | 330 | } |
| 336 | #endif /* !CONFIG_COMPAT_VDSO */ | ||
| 337 | 331 | ||
| 338 | int aarch32_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) | 332 | int aarch32_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) |
| 339 | { | 333 | { |
| @@ -352,10 +346,11 @@ int aarch32_setup_additional_pages(struct linux_binprm *bprm, int uses_interp) · 12 unmodified lines | |||
| 352 | mm, | 346 | mm, |
| 353 | bprm, | 347 | bprm, |
| 354 | uses_interp); | 348 | uses_interp); |
| 355 | #else | 349 | if (ret) |
| 356 | ret = aarch32_sigreturn_setup(mm); | 350 | goto out; |
| 357 | #endif /* CONFIG_COMPAT_VDSO */ | 351 | #endif /* CONFIG_COMPAT_VDSO */ |
| 358 | 352 | ||
| 353 | ret = aarch32_sigreturn_setup(mm); | ||
| 359 | out: | 354 | out: |
| 360 | mmap_write_unlock(mm); | 355 | mmap_write_unlock(mm); |
| 361 | return ret; | 356 | return ret; |
| @@ -23,13 +23,14 @@ btildflags-$(CONFIG_ARM64_BTI_KERNEL) += -z force-bti · 22 unmodified lines | |||
| 23 | # potential future proofing if we end up with internal calls to the exported | 23 | # potential future proofing if we end up with internal calls to the exported |
| 24 | # routines, as x86 does (see 6f121e548f83 ("x86, vdso: Reimplement vdso.so | 24 | # routines, as x86 does (see 6f121e548f83 ("x86, vdso: Reimplement vdso.so |
| 25 | # preparation in build-time C")). | 25 | # preparation in build-time C")). |
| 26 | ldflags-y := -shared -nostdlib -soname=linux-vdso.so.1 --hash-style=sysv \ | 26 | ldflags-y := -shared -nostdlib -soname=linux-vdso.so.1 --hash-style=sysv \ |
| 27 | -Bsymbolic --eh-frame-hdr --build-id -n $(btildflags-y) -T | 27 | -Bsymbolic $(call ld-option, --no-eh-frame-hdr) --build-id -n \ |
| 28 | $(btildflags-y) -T | ||
| 28 | 29 | ||
| 29 | ccflags-y := -fno-common -fno-builtin -fno-stack-protector -ffixed-x18 | 30 | ccflags-y := -fno-common -fno-builtin -fno-stack-protector -ffixed-x18 |
| 30 | ccflags-y += -DDISABLE_BRANCH_PROFILING | 31 | ccflags-y += -DDISABLE_BRANCH_PROFILING |
| 31 | 32 | ||
| 32 | CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS) | 33 | CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS) $(GCC_PLUGINS_CFLAGS) |
| 33 | KBUILD_CFLAGS += $(DISABLE_LTO) | 34 | KBUILD_CFLAGS += $(DISABLE_LTO) |
| 34 | KASAN_SANITIZE := n | 35 | KASAN_SANITIZE := n |
| 35 | UBSAN_SANITIZE := n | 36 | UBSAN_SANITIZE := n |
| @@ -18,29 +18,40 @@ · 17 unmodified lines | |||
| 18 | 18 | ||
| 19 | .text | 19 | .text |
| 20 | 20 | ||
| 21 | /* | ||
| 22 | * NOTE!!! You may notice that all of the .cfi directives in this file have | ||
| 23 | * been commented out. This is because they have been shown to trigger segfaults | ||
| 24 | * in libgcc when unwinding out of a SIGCANCEL handler to invoke pthread | ||
| 25 | * cleanup handlers during the thread cancellation dance. By omitting the | ||
| 26 | * directives, we trigger an arm64-specific fallback path in the unwinder which | ||
| 27 | * recognises the signal frame and restores many of the registers directly from | ||
| 28 | * the sigcontext. Re-enabling the cfi directives here therefore needs to be | ||
| 29 | * much more comprehensive to reduce the risk of further regressions. | ||
| 30 | */ | ||
| 31 | |||
| 21 | /* Ensure that the mysterious NOP can be associated with a function. */ | 32 | /* Ensure that the mysterious NOP can be associated with a function. */ |
| 22 | .cfi_startproc | 33 | // .cfi_startproc |
| 23 | 34 | ||
| 24 | /* | 35 | /* |
| 25 | * .cfi_signal_frame causes the corresponding Frame Description Entry in the | 36 | * .cfi_signal_frame causes the corresponding Frame Description Entry (FDE) in |
| 26 | * .eh_frame section to be annotated as a signal frame. This allows DWARF | 37 | * the .eh_frame section to be annotated as a signal frame. This allows DWARF |
| 27 | * unwinders (e.g. libstdc++) to implement _Unwind_GetIPInfo(), which permits | 38 | * unwinders (e.g. libstdc++) to implement _Unwind_GetIPInfo() and identify |
| 28 | * unwinding out of the signal trampoline without the need for the mysterious | 39 | * the next frame using the unmodified return address instead of subtracting 1, |
| 29 | * NOP. | 40 | * which may yield the wrong FDE. |
| 30 | */ | 41 | */ |
| 31 | .cfi_signal_frame | 42 | // .cfi_signal_frame |
| 32 | 43 | ||
| 33 | /* | 44 | /* |
| 34 | * Tell the unwinder where to locate the frame record linking back to the | 45 | * Tell the unwinder where to locate the frame record linking back to the |
| 35 | * interrupted context. We don't provide unwind info for registers other | 46 | * interrupted context. We don't provide unwind info for registers other than |
| 36 | * than the frame pointer and the link register here; in practice, this | 47 | * the frame pointer and the link register here; in practice, this is likely to |
| 37 | * is sufficient for unwinding in C/C++ based runtimes and the values in | 48 | * be insufficient for unwinding in C/C++ based runtimes, especially without a |
| 38 | * the sigcontext may have been modified by this point anyway. Debuggers | 49 | * means to restore the stack pointer. Thankfully, unwinders and debuggers |
| 39 | * already have baked-in strategies for attempting to unwind out of signals. | 50 | * already have baked-in strategies for attempting to unwind out of signals. |
| 40 | */ | 51 | */ |
| 41 | .cfi_def_cfa x29, 0 | 52 | // .cfi_def_cfa x29, 0 |
| 42 | .cfi_offset x29, 0 * 8 | 53 | // .cfi_offset x29, 0 * 8 |
| 43 | .cfi_offset x30, 1 * 8 | 54 | // .cfi_offset x30, 1 * 8 |
| 44 | 55 | ||
| 45 | /* | 56 | /* |
| 46 | * This mysterious NOP is required for some unwinders (e.g. libc++) that | 57 | * This mysterious NOP is required for some unwinders (e.g. libc++) that |
| @@ -51,16 +62,19 @@ · 4 unmodified lines | |||
| 51 | nop // Mysterious NOP | 62 | nop // Mysterious NOP |
| 52 | 63 | ||
| 53 | /* | 64 | /* |
| 54 | * GDB relies on being able to identify the sigreturn instruction sequence to | 65 | * GDB, libgcc and libunwind rely on being able to identify the sigreturn |
| 55 | * unwind from signal handlers. We cannot, therefore, use SYM_FUNC_START() | 66 | * instruction sequence to unwind from signal handlers. We cannot, therefore, |
| 56 | * here, as it will emit a BTI C instruction and break the unwinder. Thankfully, | 67 | * use SYM_FUNC_START() here, as it will emit a BTI C instruction and break the |
| 57 | * this function is only ever called from a RET and so omitting the landing pad | 68 | * unwinder. Thankfully, this function is only ever called from a RET and so |
| 58 | * is perfectly fine. | 69 | * omitting the landing pad is perfectly fine. |
| 59 | */ | 70 | */ |
| 60 | SYM_CODE_START(__kernel_rt_sigreturn) | 71 | SYM_CODE_START(__kernel_rt_sigreturn) |
| 72 | // PLEASE DO NOT MODIFY | ||
| 61 | mov x8, #__NR_rt_sigreturn | 73 | mov x8, #__NR_rt_sigreturn |
| 74 | // PLEASE DO NOT MODIFY | ||
| 62 | svc #0 | 75 | svc #0 |
| 63 | .cfi_endproc | 76 | // PLEASE DO NOT MODIFY |
| 77 | // .cfi_endproc | ||
| 64 | SYM_CODE_END(__kernel_rt_sigreturn) | 78 | SYM_CODE_END(__kernel_rt_sigreturn) |
| 65 | 79 | ||
| 66 | emit_aarch64_feature_1_and | 80 | emit_aarch64_feature_1_and |
| @@ -140,7 +140,6 @@ hostprogs := $(munge) · 139 unmodified lines | |||
| 140 | 140 | ||
| 141 | c-obj-vdso := note.o | 141 | c-obj-vdso := note.o |
| 142 | c-obj-vdso-gettimeofday := vgettimeofday.o | 142 | c-obj-vdso-gettimeofday := vgettimeofday.o |
| 143 | asm-obj-vdso := sigreturn.o | ||
| 144 | 143 | ||
| 145 | ifneq ($(c-gettimeofday-y),) | 144 | ifneq ($(c-gettimeofday-y),) |
| 146 | VDSO_CFLAGS_gettimeofday_o += -include $(c-gettimeofday-y) | 145 | VDSO_CFLAGS_gettimeofday_o += -include $(c-gettimeofday-y) |
| @@ -1,58 +0,0 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 2 | /* | ||
| 3 | * This file provides both A32 and T32 versions, in accordance with the | ||
| 4 | * arm sigreturn code. | ||
| 5 | * | ||
| 6 | * Please read the comments in arch/arm64/kernel/vdso/sigreturn.S to | ||
| 7 | * understand some of the craziness in here. | ||
| 8 | * | ||
| 9 | * Copyright (C) 2018 ARM Limited | ||
| 10 | */ | ||
| 11 | |||
| 12 | #include <linux/linkage.h> | ||
| 13 | #include <asm/asm-offsets.h> | ||
| 14 | #include <asm/unistd.h> | ||
| 15 | |||
| 16 | .text | ||
| 17 | |||
| 18 | .arm | ||
| 19 | .fnstart | ||
| 20 | .save {r0-r15} | ||
| 21 | .pad #COMPAT_SIGFRAME_REGS_OFFSET | ||
| 22 | nop | ||
| 23 | SYM_CODE_START(__kernel_sigreturn_arm) | ||
| 24 | mov r7, #__NR_compat_sigreturn | ||
| 25 | svc #0 | ||
| 26 | .fnend | ||
| 27 | SYM_CODE_END(__kernel_sigreturn_arm) | ||
| 28 | |||
| 29 | .fnstart | ||
| 30 | .save {r0-r15} | ||
| 31 | .pad #COMPAT_RT_SIGFRAME_REGS_OFFSET | ||
| 32 | nop | ||
| 33 | SYM_CODE_START(__kernel_rt_sigreturn_arm) | ||
| 34 | mov r7, #__NR_compat_rt_sigreturn | ||
| 35 | svc #0 | ||
| 36 | .fnend | ||
| 37 | SYM_CODE_END(__kernel_rt_sigreturn_arm) | ||
| 38 | |||
| 39 | .thumb | ||
| 40 | .fnstart | ||
| 41 | .save {r0-r15} | ||
| 42 | .pad #COMPAT_SIGFRAME_REGS_OFFSET | ||
| 43 | nop | ||
| 44 | SYM_CODE_START(__kernel_sigreturn_thumb) | ||
| 45 | mov r7, #__NR_compat_sigreturn | ||
| 46 | svc #0 | ||
| 47 | .fnend | ||
| 48 | SYM_CODE_END(__kernel_sigreturn_thumb) | ||
| 49 | |||
| 50 | .fnstart | ||
| 51 | .save {r0-r15} | ||
| 52 | .pad #COMPAT_RT_SIGFRAME_REGS_OFFSET | ||
| 53 | nop | ||
| 54 | SYM_CODE_START(__kernel_rt_sigreturn_thumb) | ||
| 55 | mov r7, #__NR_compat_rt_sigreturn | ||
| 56 | svc #0 | ||
| 57 | .fnend | ||
| 58 | SYM_CODE_END(__kernel_rt_sigreturn_thumb) | ||
| @@ -64,19 +64,7 @@ VERSION · 63 unmodified lines | |||
| 64 | __vdso_clock_gettime; | 64 | __vdso_clock_gettime; |
| 65 | __vdso_gettimeofday; | 65 | __vdso_gettimeofday; |
| 66 | __vdso_clock_getres; | 66 | __vdso_clock_getres; |
| 67 | __kernel_sigreturn_arm; | ||
| 68 | __kernel_sigreturn_thumb; | ||
| 69 | __kernel_rt_sigreturn_arm; | ||
| 70 | __kernel_rt_sigreturn_thumb; | ||
| 71 | __vdso_clock_gettime64; | 67 | __vdso_clock_gettime64; |
| 72 | local: *; | 68 | local: *; |
| 73 | }; | 69 | }; |
| 74 | } | 70 | } |
| 75 | |||
| 76 | /* | ||
| 77 | * Make the sigreturn code visible to the kernel. | ||
| 78 | */ | ||
| 79 | VDSO_compat_sigreturn_arm = __kernel_sigreturn_arm; | ||
| 80 | VDSO_compat_sigreturn_thumb = __kernel_sigreturn_thumb; | ||
| 81 | VDSO_compat_rt_sigreturn_arm = __kernel_rt_sigreturn_arm; | ||
| 82 | VDSO_compat_rt_sigreturn_thumb = __kernel_rt_sigreturn_thumb; | ||
| @@ -165,9 +165,6 @@ SECTIONS · 164 unmodified lines | |||
| 165 | *(.altinstructions) | 165 | *(.altinstructions) |
| 166 | __alt_instructions_end = .; | 166 | __alt_instructions_end = .; |
| 167 | } | 167 | } |
| 168 | .altinstr_replacement : { | ||
| 169 | *(.altinstr_replacement) | ||
| 170 | } | ||
| 171 | 168 | ||
| 172 | . = ALIGN(SEGMENT_ALIGN); | 169 | . = ALIGN(SEGMENT_ALIGN); |
| 173 | __inittext_end = .; | 170 | __inittext_end = .; |
| @@ -136,11 +136,15 @@ SYM_CODE_START(__kvm_handle_stub_hvc) · 135 unmodified lines | |||
| 136 | 136 | ||
| 137 | 1: cmp x0, #HVC_RESET_VECTORS | 137 | 1: cmp x0, #HVC_RESET_VECTORS |
| 138 | b.ne 1f | 138 | b.ne 1f |
| 139 | reset: | 139 | |
| 140 | /* | 140 | /* |
| 141 | * Reset kvm back to the hyp stub. Do not clobber x0-x4 in | 141 | * Set the HVC_RESET_VECTORS return code before entering the common |
| 142 | * case we coming via HVC_SOFT_RESTART. | 142 | * path so that we do not clobber x0-x2 in case we are coming via |
| 143 | * HVC_SOFT_RESTART. | ||
| 143 | */ | 144 | */ |
| 145 | mov x0, xzr | ||
| 146 | reset: | ||
| 147 | /* Reset kvm back to the hyp stub. */ | ||
| 144 | mrs x5, sctlr_el2 | 148 | mrs x5, sctlr_el2 |
| 145 | mov_q x6, SCTLR_ELx_FLAGS | 149 | mov_q x6, SCTLR_ELx_FLAGS |
| 146 | bic x5, x5, x6 // Clear SCTL_M and etc | 150 | bic x5, x5, x6 // Clear SCTL_M and etc |
| @@ -151,7 +155,6 @@ reset: · 4 unmodified lines | |||
| 151 | /* Install stub vectors */ | 155 | /* Install stub vectors */ |
| 152 | adr_l x5, __hyp_stub_vectors | 156 | adr_l x5, __hyp_stub_vectors |
| 153 | msr vbar_el2, x5 | 157 | msr vbar_el2, x5 |
| 154 | mov x0, xzr | ||
| 155 | eret | 158 | eret |
| 156 | 159 | ||
| 157 | 1: /* Bad stub call */ | 160 | 1: /* Bad stub call */ |
| @@ -159,7 +159,10 @@ static void kvm_vcpu_pmu_disable_el0(unsigned long events) · 158 unmodified lines | |||
| 159 | } | 159 | } |
| 160 | 160 | ||
| 161 | /* | 161 | /* |
| 162 | * On VHE ensure that only guest events have EL0 counting enabled | 162 | * On VHE ensure that only guest events have EL0 counting enabled. |
| 163 | * This is called from both vcpu_{load,put} and the sysreg handling. | ||
| 164 | * Since the latter is preemptible, special care must be taken to | ||
| 165 | * disable preemption. | ||
| 163 | */ | 166 | */ |
| 164 | void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) | 167 | void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) |
| 165 | { | 168 | { |
| @@ -169,12 +172,14 @@ void kvm_vcpu_pmu_restore_guest(struct kvm_vcpu *vcpu) · 3 unmodified lines | |||
| 169 | if (!has_vhe()) | 172 | if (!has_vhe()) |
| 170 | return; | 173 | return; |
| 171 | 174 | ||
| 175 | preempt_disable(); | ||
| 172 | host = this_cpu_ptr(&kvm_host_data); | 176 | host = this_cpu_ptr(&kvm_host_data); |
| 173 | events_guest = host->pmu_events.events_guest; | 177 | events_guest = host->pmu_events.events_guest; |
| 174 | events_host = host->pmu_events.events_host; | 178 | events_host = host->pmu_events.events_host; |
| 175 | 179 | ||
| 176 | kvm_vcpu_pmu_enable_el0(events_guest); | 180 | kvm_vcpu_pmu_enable_el0(events_guest); |
| 177 | kvm_vcpu_pmu_disable_el0(events_host); | 181 | kvm_vcpu_pmu_disable_el0(events_host); |
| 182 | preempt_enable(); | ||
| 178 | } | 183 | } |
| 179 | 184 | ||
| 180 | /* | 185 | /* |
| @@ -3,6 +3,7 @@ · 2 unmodified lines | |||
| 3 | 3 | ||
| 4 | #include <linux/arm-smccc.h> | 4 | #include <linux/arm-smccc.h> |
| 5 | #include <linux/kvm_host.h> | 5 | #include <linux/kvm_host.h> |
| 6 | #include <linux/sched/stat.h> | ||
| 6 | 7 | ||
| 7 | #include <asm/kvm_mmu.h> | 8 | #include <asm/kvm_mmu.h> |
| 8 | #include <asm/pvclock-abi.h> | 9 | #include <asm/pvclock-abi.h> |
| @@ -73,6 +74,11 @@ gpa_t kvm_init_stolen_time(struct kvm_vcpu *vcpu) · 64 unmodified lines | |||
| 73 | return base; | 74 | return base; |
| 74 | } | 75 | } |
| 75 | 76 | ||
| 77 | static bool kvm_arm_pvtime_supported(void) | ||
| 78 | { | ||
| 79 | return !!sched_info_on(); | ||
| 80 | } | ||
| 81 | |||
| 76 | int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, | 82 | int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, |
| 77 | struct kvm_device_attr *attr) | 83 | struct kvm_device_attr *attr) |
| 78 | { | 84 | { |
| @@ -82,7 +88,8 @@ int kvm_arm_pvtime_set_attr(struct kvm_vcpu *vcpu, · 3 unmodified lines | |||
| 82 | int ret = 0; | 88 | int ret = 0; |
| 83 | int idx; | 89 | int idx; |
| 84 | 90 | ||
| 85 | if (attr->attr != KVM_ARM_VCPU_PVTIME_IPA) | 91 | if (!kvm_arm_pvtime_supported() || |
| 92 | attr->attr != KVM_ARM_VCPU_PVTIME_IPA) | ||
| 86 | return -ENXIO; | 93 | return -ENXIO; |
| 87 | 94 | ||
| 88 | if (get_user(ipa, user)) | 95 | if (get_user(ipa, user)) |
| @@ -110,7 +117,8 @@ int kvm_arm_pvtime_get_attr(struct kvm_vcpu *vcpu, · 21 unmodified lines | |||
| 110 | u64 __user *user = (u64 __user *)attr->addr; | 117 | u64 __user *user = (u64 __user *)attr->addr; |
| 111 | u64 ipa; | 118 | u64 ipa; |
| 112 | 119 | ||
| 113 | if (attr->attr != KVM_ARM_VCPU_PVTIME_IPA) | 120 | if (!kvm_arm_pvtime_supported() || |
| 121 | attr->attr != KVM_ARM_VCPU_PVTIME_IPA) | ||
| 114 | return -ENXIO; | 122 | return -ENXIO; |
| 115 | 123 | ||
| 116 | ipa = vcpu->arch.steal.base; | 124 | ipa = vcpu->arch.steal.base; |
| @@ -125,7 +133,8 @@ int kvm_arm_pvtime_has_attr(struct kvm_vcpu *vcpu, · 8 unmodified lines | |||
| 125 | { | 133 | { |
| 126 | switch (attr->attr) { | 134 | switch (attr->attr) { |
| 127 | case KVM_ARM_VCPU_PVTIME_IPA: | 135 | case KVM_ARM_VCPU_PVTIME_IPA: |
| 128 | return 0; | 136 | if (kvm_arm_pvtime_supported()) |
| 137 | return 0; | ||
| 129 | } | 138 | } |
| 130 | return -ENXIO; | 139 | return -ENXIO; |
| 131 | } | 140 | } |
| @@ -245,7 +245,7 @@ static int kvm_vcpu_enable_ptrauth(struct kvm_vcpu *vcpu) · 244 unmodified lines | |||
| 245 | */ | 245 | */ |
| 246 | int kvm_reset_vcpu(struct kvm_vcpu *vcpu) | 246 | int kvm_reset_vcpu(struct kvm_vcpu *vcpu) |
| 247 | { | 247 | { |
| 248 | int ret = -EINVAL; | 248 | int ret; |
| 249 | bool loaded; | 249 | bool loaded; |
| 250 | u32 pstate; | 250 | u32 pstate; |
| 251 | 251 | ||
| @@ -269,15 +269,19 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) · 17 unmodified lines | |||
| 269 | 269 | ||
| 270 | if (test_bit(KVM_ARM_VCPU_PTRAUTH_ADDRESS, vcpu->arch.features) || | 270 | if (test_bit(KVM_ARM_VCPU_PTRAUTH_ADDRESS, vcpu->arch.features) || |
| 271 | test_bit(KVM_ARM_VCPU_PTRAUTH_GENERIC, vcpu->arch.features)) { | 271 | test_bit(KVM_ARM_VCPU_PTRAUTH_GENERIC, vcpu->arch.features)) { |
| 272 | if (kvm_vcpu_enable_ptrauth(vcpu)) | 272 | if (kvm_vcpu_enable_ptrauth(vcpu)) { |
| 273 | ret = -EINVAL; | ||
| 273 | goto out; | 274 | goto out; |
| 275 | } | ||
| 274 | } | 276 | } |
| 275 | 277 | ||
| 276 | switch (vcpu->arch.target) { | 278 | switch (vcpu->arch.target) { |
| 277 | default: | 279 | default: |
| 278 | if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) { | 280 | if (test_bit(KVM_ARM_VCPU_EL1_32BIT, vcpu->arch.features)) { |
| 279 | if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1)) | 281 | if (!cpus_have_const_cap(ARM64_HAS_32BIT_EL1)) { |
| 282 | ret = -EINVAL; | ||
| 280 | goto out; | 283 | goto out; |
| 284 | } | ||
| 281 | pstate = VCPU_RESET_PSTATE_SVC; | 285 | pstate = VCPU_RESET_PSTATE_SVC; |
| 282 | } else { | 286 | } else { |
| 283 | pstate = VCPU_RESET_PSTATE_EL1; | 287 | pstate = VCPU_RESET_PSTATE_EL1; |
| @@ -90,7 +90,15 @@ static irqreturn_t vgic_v4_doorbell_handler(int irq, void *info) · 89 unmodified lines | |||
| 90 | !irqd_irq_disabled(&irq_to_desc(irq)->irq_data)) | 90 | !irqd_irq_disabled(&irq_to_desc(irq)->irq_data)) |
| 91 | disable_irq_nosync(irq); | 91 | disable_irq_nosync(irq); |
| 92 | 92 | ||
| 93 | /* | ||
| 94 | * The v4.1 doorbell can fire concurrently with the vPE being | ||
| 95 | * made non-resident. Ensure we only update pending_last | ||
| 96 | * *after* the non-residency sequence has completed. | ||
| 97 | */ | ||
| 98 | raw_spin_lock(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vpe_lock); | ||
| 93 | vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last = true; | 99 | vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last = true; |
| 100 | raw_spin_unlock(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vpe_lock); | ||
| 101 | |||
| 94 | kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); | 102 | kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu); |
| 95 | kvm_vcpu_kick(vcpu); | 103 | kvm_vcpu_kick(vcpu); |
| 96 | 104 | ||
| @@ -138,7 +138,8 @@ void __init setup_arch(char **cmdline_p) · 137 unmodified lines | |||
| 138 | pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ", | 138 | pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ", |
| 139 | __bss_stop, memory_start, memory_start, memory_end); | 139 | __bss_stop, memory_start, memory_start, memory_end); |
| 140 | 140 | ||
| 141 | memblock_add(memory_start, memory_end - memory_start); | 141 | memblock_add(_rambase, memory_end - _rambase); |
| 142 | memblock_reserve(_rambase, memory_start - _rambase); | ||
| 142 | 143 | ||
| 143 | /* Keep a copy of command line */ | 144 | /* Keep a copy of command line */ |
| 144 | *cmdline_p = &command_line[0]; | 145 | *cmdline_p = &command_line[0]; |
| @@ -174,7 +174,7 @@ void __init cf_bootmem_alloc(void) · 173 unmodified lines | |||
| 174 | m68k_memory[0].addr = _rambase; | 174 | m68k_memory[0].addr = _rambase; |
| 175 | m68k_memory[0].size = _ramend - _rambase; | 175 | m68k_memory[0].size = _ramend - _rambase; |
| 176 | 176 | ||
| 177 | memblock_add(m68k_memory[0].addr, m68k_memory[0].size); | 177 | memblock_add_node(m68k_memory[0].addr, m68k_memory[0].size, 0); |
| 178 | 178 | ||
| 179 | /* compute total pages in system */ | 179 | /* compute total pages in system */ |
| 180 | num_pages = PFN_DOWN(_ramend - _rambase); | 180 | num_pages = PFN_DOWN(_ramend - _rambase); |
| @@ -92,7 +92,7 @@ · 91 unmodified lines | |||
| 92 | "MIC1N", "Built-in Mic"; | 92 | "MIC1N", "Built-in Mic"; |
| 93 | simple-audio-card,pin-switches = "Speaker", "Headphones"; | 93 | simple-audio-card,pin-switches = "Speaker", "Headphones"; |
| 94 | 94 | ||
| 95 | simple-audio-card,hp-det-gpio = <&gpf 21 GPIO_ACTIVE_HIGH>; | 95 | simple-audio-card,hp-det-gpio = <&gpf 21 GPIO_ACTIVE_LOW>; |
| 96 | simple-audio-card,aux-devs = <&speaker_amp>, <&headphones_amp>; | 96 | simple-audio-card,aux-devs = <&speaker_amp>, <&headphones_amp>; |
| 97 | 97 | ||
| 98 | simple-audio-card,bitclock-master = <&dai_codec>; | 98 | simple-audio-card,bitclock-master = <&dai_codec>; |
| @@ -19,15 +19,13 @@ · 18 unmodified lines | |||
| 19 | \ | 19 | \ |
| 20 | /* \ | 20 | /* \ |
| 21 | * We can't unroll if the number of iterations isn't \ | 21 | * We can't unroll if the number of iterations isn't \ |
| 22 | * compile-time constant. Unfortunately GCC versions \ | 22 | * compile-time constant. Unfortunately clang versions \ |
| 23 | * up until 4.6 tend to miss obvious constants & cause \ | 23 | * up until 8.0 tend to miss obvious constants & cause \ |
| 24 | * this check to fail, even though they go on to \ | 24 | * this check to fail, even though they go on to \ |
| 25 | * generate reasonable code for the switch statement, \ | 25 | * generate reasonable code for the switch statement, \ |
| 26 | * so we skip the sanity check for those compilers. \ | 26 | * so we skip the sanity check for those compilers. \ |
| 27 | */ \ | 27 | */ \ |
| 28 | BUILD_BUG_ON((CONFIG_GCC_VERSION >= 40700 || \ | 28 | BUILD_BUG_ON(!__builtin_constant_p(times)); \ |
| 29 | CONFIG_CLANG_VERSION >= 80000) && \ | ||
| 30 | !__builtin_constant_p(times)); \ | ||
| 31 | \ | 29 | \ |
| 32 | switch (times) { \ | 30 | switch (times) { \ |
| 33 | case 32: fn(__VA_ARGS__); /* fall through */ \ | 31 | case 32: fn(__VA_ARGS__); /* fall through */ \ |
| @@ -723,12 +723,14 @@ static int simulate_loongson3_cpucfg(struct pt_regs *regs, · 722 unmodified lines | |||
| 723 | perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0); | 723 | perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0); |
| 724 | 724 | ||
| 725 | /* Do not emulate on unsupported core models. */ | 725 | /* Do not emulate on unsupported core models. */ |
| 726 | if (!loongson3_cpucfg_emulation_enabled(¤t_cpu_data)) | 726 | preempt_disable(); |
| 727 | if (!loongson3_cpucfg_emulation_enabled(¤t_cpu_data)) { | ||
| 728 | preempt_enable(); | ||
| 727 | return -1; | 729 | return -1; |
| 728 | 730 | } | |
| 729 | regs->regs[rd] = loongson3_cpucfg_read_synthesized( | 731 | regs->regs[rd] = loongson3_cpucfg_read_synthesized( |
| 730 | ¤t_cpu_data, sel); | 732 | ¤t_cpu_data, sel); |
| 731 | 733 | preempt_enable(); | |
| 732 | return 0; | 734 | return 0; |
| 733 | } | 735 | } |
| 734 | 736 | ||
| @@ -2169,6 +2171,7 @@ static void configure_status(void) · 1434 unmodified lines | |||
| 2169 | 2171 | ||
| 2170 | change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX, | 2172 | change_c0_status(ST0_CU|ST0_MX|ST0_RE|ST0_FR|ST0_BEV|ST0_TS|ST0_KX|ST0_SX|ST0_UX, |
| 2171 | status_set); | 2173 | status_set); |
| 2174 | back_to_back_c0_hazard(); | ||
| 2172 | } | 2175 | } |
| 2173 | 2176 | ||
| 2174 | unsigned int hwrena; | 2177 | unsigned int hwrena; |
| @@ -1722,6 +1722,7 @@ enum emulation_result kvm_mips_emulate_store(union mips_instruction inst, · 1721 unmodified lines | |||
| 1722 | vcpu->arch.gprs[rt], *(u32 *)data); | 1722 | vcpu->arch.gprs[rt], *(u32 *)data); |
| 1723 | break; | 1723 | break; |
| 1724 | 1724 | ||
| 1725 | #if defined(CONFIG_64BIT) && defined(CONFIG_KVM_MIPS_VZ) | ||
| 1725 | case sdl_op: | 1726 | case sdl_op: |
| 1726 | run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa( | 1727 | run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa( |
| 1727 | vcpu->arch.host_cp0_badvaddr) & (~0x7); | 1728 | vcpu->arch.host_cp0_badvaddr) & (~0x7); |
| @@ -1815,6 +1816,7 @@ enum emulation_result kvm_mips_emulate_store(union mips_instruction inst, · 87 unmodified lines | |||
| 1815 | vcpu->arch.pc, vcpu->arch.host_cp0_badvaddr, | 1816 | vcpu->arch.pc, vcpu->arch.host_cp0_badvaddr, |
| 1816 | vcpu->arch.gprs[rt], *(u64 *)data); | 1817 | vcpu->arch.gprs[rt], *(u64 *)data); |
| 1817 | break; | 1818 | break; |
| 1819 | #endif | ||
| 1818 | 1820 | ||
| 1819 | #ifdef CONFIG_CPU_LOONGSON64 | 1821 | #ifdef CONFIG_CPU_LOONGSON64 |
| 1820 | case sdc2_op: | 1822 | case sdc2_op: |
| @@ -2002,6 +2004,7 @@ enum emulation_result kvm_mips_emulate_load(union mips_instruction inst, · 181 unmodified lines | |||
| 2002 | } | 2004 | } |
| 2003 | break; | 2005 | break; |
| 2004 | 2006 | ||
| 2007 | #if defined(CONFIG_64BIT) && defined(CONFIG_KVM_MIPS_VZ) | ||
| 2005 | case ldl_op: | 2008 | case ldl_op: |
| 2006 | run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa( | 2009 | run->mmio.phys_addr = kvm_mips_callbacks->gva_to_gpa( |
| 2007 | vcpu->arch.host_cp0_badvaddr) & (~0x7); | 2010 | vcpu->arch.host_cp0_badvaddr) & (~0x7); |
| @@ -2073,6 +2076,7 @@ enum emulation_result kvm_mips_emulate_load(union mips_instruction inst, · 65 unmodified lines | |||
| 2073 | break; | 2076 | break; |
| 2074 | } | 2077 | } |
| 2075 | break; | 2078 | break; |
| 2079 | #endif | ||
| 2076 | 2080 | ||
| 2077 | #ifdef CONFIG_CPU_LOONGSON64 | 2081 | #ifdef CONFIG_CPU_LOONGSON64 |
| 2078 | case ldc2_op: | 2082 | case ldc2_op: |
| @@ -67,7 +67,9 @@ struct kvm_stats_debugfs_item debugfs_entries[] = { · 66 unmodified lines | |||
| 67 | VCPU_STAT("vz_ghfc", vz_ghfc_exits), | 67 | VCPU_STAT("vz_ghfc", vz_ghfc_exits), |
| 68 | VCPU_STAT("vz_gpa", vz_gpa_exits), | 68 | VCPU_STAT("vz_gpa", vz_gpa_exits), |
| 69 | VCPU_STAT("vz_resvd", vz_resvd_exits), | 69 | VCPU_STAT("vz_resvd", vz_resvd_exits), |
| 70 | #ifdef CONFIG_CPU_LOONGSON64 | ||
| 70 | VCPU_STAT("vz_cpucfg", vz_cpucfg_exits), | 71 | VCPU_STAT("vz_cpucfg", vz_cpucfg_exits), |
| 72 | #endif | ||
| 71 | #endif | 73 | #endif |
| 72 | VCPU_STAT("halt_successful_poll", halt_successful_poll), | 74 | VCPU_STAT("halt_successful_poll", halt_successful_poll), |
| 73 | VCPU_STAT("halt_attempted_poll", halt_attempted_poll), | 75 | VCPU_STAT("halt_attempted_poll", halt_attempted_poll), |
| @@ -514,8 +514,8 @@ void __init ltq_soc_init(void) · 513 unmodified lines | |||
| 514 | clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | | 514 | clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | |
| 515 | PMU_PPE_DP | PMU_PPE_TC); | 515 | PMU_PPE_DP | PMU_PPE_TC); |
| 516 | clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF); | 516 | clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF); |
| 517 | clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY); | 517 | clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY); |
| 518 | clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY); | 518 | clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY); |
| 519 | clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); | 519 | clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); |
| 520 | clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE); | 520 | clkdev_add_pmu("1e116000.mei", "afe", 1, 2, PMU_ANALOG_DSL_AFE); |
| 521 | clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); | 521 | clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); |
| @@ -538,8 +538,8 @@ void __init ltq_soc_init(void) · 16 unmodified lines | |||
| 538 | PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM | | 538 | PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM | |
| 539 | PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 | | 539 | PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 | |
| 540 | PMU_PPE_QSB | PMU_PPE_TOP); | 540 | PMU_PPE_QSB | PMU_PPE_TOP); |
| 541 | clkdev_add_pmu("1e108000.gswip", "gphy0", 0, 0, PMU_GPHY); | 541 | clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY); |
| 542 | clkdev_add_pmu("1e108000.gswip", "gphy1", 0, 0, PMU_GPHY); | 542 | clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY); |
| 543 | clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); | 543 | clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO); |
| 544 | clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); | 544 | clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU); |
| 545 | clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); | 545 | clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE); |
| @@ -627,9 +627,10 @@ static int bridge_probe(struct platform_device *pdev) · 626 unmodified lines | |||
| 627 | return -ENOMEM; | 627 | return -ENOMEM; |
| 628 | domain = irq_domain_create_hierarchy(parent, 0, 8, fn, | 628 | domain = irq_domain_create_hierarchy(parent, 0, 8, fn, |
| 629 | &bridge_domain_ops, NULL); | 629 | &bridge_domain_ops, NULL); |
| 630 | irq_domain_free_fwnode(fn); | 630 | if (!domain) { |
| 631 | if (!domain) | 631 | irq_domain_free_fwnode(fn); |
| 632 | return -ENOMEM; | 632 | return -ENOMEM; |
| 633 | } | ||
| 633 | 634 | ||
| 634 | pci_set_flags(PCI_PROBE_ONLY); | 635 | pci_set_flags(PCI_PROBE_ONLY); |
| 635 | 636 | ||
| @@ -74,8 +74,11 @@ void *arch_dma_set_uncached(void *cpu_addr, size_t size) · 73 unmodified lines | |||
| 74 | * We need to iterate through the pages, clearing the dcache for | 74 | * We need to iterate through the pages, clearing the dcache for |
| 75 | * them and setting the cache-inhibit bit. | 75 | * them and setting the cache-inhibit bit. |
| 76 | */ | 76 | */ |
| 77 | mmap_read_lock(&init_mm); | ||
| 77 | error = walk_page_range(&init_mm, va, va + size, &set_nocache_walk_ops, | 78 | error = walk_page_range(&init_mm, va, va + size, &set_nocache_walk_ops, |
| 78 | NULL); | 79 | NULL); |
| 80 | mmap_read_unlock(&init_mm); | ||
| 81 | |||
| 79 | if (error) | 82 | if (error) |
| 80 | return ERR_PTR(error); | 83 | return ERR_PTR(error); |
| 81 | return cpu_addr; | 84 | return cpu_addr; |
| @@ -85,9 +88,11 @@ void arch_dma_clear_uncached(void *cpu_addr, size_t size) · 3 unmodified lines | |||
| 85 | { | 88 | { |
| 86 | unsigned long va = (unsigned long)cpu_addr; | 89 | unsigned long va = (unsigned long)cpu_addr; |
| 87 | 90 | ||
| 91 | mmap_read_lock(&init_mm); | ||
| 88 | /* walk_page_range shouldn't be able to fail here */ | 92 | /* walk_page_range shouldn't be able to fail here */ |
| 89 | WARN_ON(walk_page_range(&init_mm, va, va + size, | 93 | WARN_ON(walk_page_range(&init_mm, va, va + size, |
| 90 | &clear_nocache_walk_ops, NULL)); | 94 | &clear_nocache_walk_ops, NULL)); |
| 95 | mmap_read_unlock(&init_mm); | ||
| 91 | } | 96 | } |
| 92 | 97 | ||
| 93 | void arch_sync_dma_for_device(phys_addr_t addr, size_t size, | 98 | void arch_sync_dma_for_device(phys_addr_t addr, size_t size, |
| @@ -77,6 +77,8 @@ struct coprocessor_completion_block { · 76 unmodified lines | |||
| 77 | #define CSB_CC_CHAIN (37) | 77 | #define CSB_CC_CHAIN (37) |
| 78 | #define CSB_CC_SEQUENCE (38) | 78 | #define CSB_CC_SEQUENCE (38) |
| 79 | #define CSB_CC_HW (39) | 79 | #define CSB_CC_HW (39) |
| 80 | /* P9 DD2 NX Workbook 3.2 (Table 4-36): Address translation fault */ | ||
| 81 | #define CSB_CC_FAULT_ADDRESS (250) | ||
| 80 | 82 | ||
| 81 | #define CSB_SIZE (0x10) | 83 | #define CSB_SIZE (0x10) |
| 82 | #define CSB_ALIGN CSB_SIZE | 84 | #define CSB_ALIGN CSB_SIZE |
| @@ -2551,7 +2551,7 @@ EXC_VIRT_NONE(0x5400, 0x100) · 2550 unmodified lines | |||
| 2551 | INT_DEFINE_BEGIN(denorm_exception) | 2551 | INT_DEFINE_BEGIN(denorm_exception) |
| 2552 | IVEC=0x1500 | 2552 | IVEC=0x1500 |
| 2553 | IHSRR=1 | 2553 | IHSRR=1 |
| 2554 | IBRANCH_COMMON=0 | 2554 | IBRANCH_TO_COMMON=0 |
| 2555 | IKVM_REAL=1 | 2555 | IKVM_REAL=1 |
| 2556 | INT_DEFINE_END(denorm_exception) | 2556 | INT_DEFINE_END(denorm_exception) |
| 2557 | 2557 | ||
| @@ -87,7 +87,7 @@ static void *__init alloc_shared_lppaca(unsigned long size, unsigned long align, · 86 unmodified lines | |||
| 87 | * This is very early in boot, so no harm done if the kernel crashes at | 87 | * This is very early in boot, so no harm done if the kernel crashes at |
| 88 | * this point. | 88 | * this point. |
| 89 | */ | 89 | */ |
| 90 | BUG_ON(shared_lppaca_size >= shared_lppaca_total_size); | 90 | BUG_ON(shared_lppaca_size > shared_lppaca_total_size); |
| 91 | 91 | ||
| 92 | return ptr; | 92 | return ptr; |
| 93 | } | 93 | } |
| @@ -40,7 +40,8 @@ unsigned long __kvmhv_copy_tofrom_guest_radix(int lpid, int pid, · 39 unmodified lines | |||
| 40 | /* Can't access quadrants 1 or 2 in non-HV mode, call the HV to do it */ | 40 | /* Can't access quadrants 1 or 2 in non-HV mode, call the HV to do it */ |
| 41 | if (kvmhv_on_pseries()) | 41 | if (kvmhv_on_pseries()) |
| 42 | return plpar_hcall_norets(H_COPY_TOFROM_GUEST, lpid, pid, eaddr, | 42 | return plpar_hcall_norets(H_COPY_TOFROM_GUEST, lpid, pid, eaddr, |
| 43 | __pa(to), __pa(from), n); | 43 | (to != NULL) ? __pa(to): 0, |
| 44 | (from != NULL) ? __pa(from): 0, n); | ||
| 44 | 45 | ||
| 45 | quadrant = 1; | 46 | quadrant = 1; |
| 46 | if (!pid) | 47 | if (!pid) |
| @@ -353,16 +353,15 @@ static bool pkey_access_permitted(int pkey, bool write, bool execute) · 352 unmodified lines | |||
| 353 | int pkey_shift; | 353 | int pkey_shift; |
| 354 | u64 amr; | 354 | u64 amr; |
| 355 | 355 | ||
| 356 | if (!is_pkey_enabled(pkey)) | ||
| 357 | return true; | ||
| 358 | |||
| 359 | pkey_shift = pkeyshift(pkey); | 356 | pkey_shift = pkeyshift(pkey); |
| 360 | if (execute && !(read_iamr() & (IAMR_EX_BIT << pkey_shift))) | 357 | if (execute) |
| 361 | return true; | 358 | return !(read_iamr() & (IAMR_EX_BIT << pkey_shift)); |
| 359 | |||
| 360 | amr = read_amr(); | ||
| 361 | if (write) | ||
| 362 | return !(amr & (AMR_WR_BIT << pkey_shift)); | ||
| 362 | 363 | ||
| 363 | amr = read_amr(); /* Delay reading amr until absolutely needed */ | 364 | return !(amr & (AMR_RD_BIT << pkey_shift)); |
| 364 | return ((!write && !(amr & (AMR_RD_BIT << pkey_shift))) || | ||
| 365 | (write && !(amr & (AMR_WR_BIT << pkey_shift)))); | ||
| 366 | } | 365 | } |
| 367 | 366 | ||
| 368 | bool arch_pte_access_permitted(u64 pte, bool write, bool execute) | 367 | bool arch_pte_access_permitted(u64 pte, bool write, bool execute) |
| @@ -14,6 +14,7 @@ · 13 unmodified lines | |||
| 14 | #include <linux/memblock.h> | 14 | #include <linux/memblock.h> |
| 15 | #include <linux/libfdt.h> | 15 | #include <linux/libfdt.h> |
| 16 | #include <linux/crash_core.h> | 16 | #include <linux/crash_core.h> |
| 17 | #include <asm/cacheflush.h> | ||
| 17 | #include <asm/pgalloc.h> | 18 | #include <asm/pgalloc.h> |
| 18 | #include <asm/prom.h> | 19 | #include <asm/prom.h> |
| 19 | #include <asm/kdump.h> | 20 | #include <asm/kdump.h> |
| @@ -79,7 +79,7 @@ static void update_csb(struct vas_window *window, · 78 unmodified lines | |||
| 79 | csb_addr = (void __user *)be64_to_cpu(crb->csb_addr); | 79 | csb_addr = (void __user *)be64_to_cpu(crb->csb_addr); |
| 80 | 80 | ||
| 81 | memset(&csb, 0, sizeof(csb)); | 81 | memset(&csb, 0, sizeof(csb)); |
| 82 | csb.cc = CSB_CC_TRANSLATION; | 82 | csb.cc = CSB_CC_FAULT_ADDRESS; |
| 83 | csb.ce = CSB_CE_TERMINATION; | 83 | csb.ce = CSB_CE_TERMINATION; |
| 84 | csb.cs = 0; | 84 | csb.cs = 0; |
| 85 | csb.count = 0; | 85 | csb.count = 0; |
| @@ -23,6 +23,8 @@ config RISCV · 22 unmodified lines | |||
| 23 | select ARCH_HAS_SET_DIRECT_MAP | 23 | select ARCH_HAS_SET_DIRECT_MAP |
| 24 | select ARCH_HAS_SET_MEMORY | 24 | select ARCH_HAS_SET_MEMORY |
| 25 | select ARCH_HAS_STRICT_KERNEL_RWX if MMU | 25 | select ARCH_HAS_STRICT_KERNEL_RWX if MMU |
| 26 | select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX | ||
| 27 | select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT | ||
| 26 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU | 28 | select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU |
| 27 | select ARCH_WANT_FRAME_POINTERS | 29 | select ARCH_WANT_FRAME_POINTERS |
| 28 | select ARCH_WANT_HUGE_PMD_SHARE if 64BIT | 30 | select ARCH_WANT_HUGE_PMD_SHARE if 64BIT |
| @@ -58,8 +58,16 @@ do { \ · 57 unmodified lines | |||
| 58 | * The AQ/RL pair provides a RCpc critical section, but there's not really any | 58 | * The AQ/RL pair provides a RCpc critical section, but there's not really any |
| 59 | * way we can take advantage of that here because the ordering is only enforced | 59 | * way we can take advantage of that here because the ordering is only enforced |
| 60 | * on that one lock. Thus, we're just doing a full fence. | 60 | * on that one lock. Thus, we're just doing a full fence. |
| 61 | * | ||
| 62 | * Since we allow writeX to be called from preemptive regions we need at least | ||
| 63 | * an "o" in the predecessor set to ensure device writes are visible before the | ||
| 64 | * task is marked as available for scheduling on a new hart. While I don't see | ||
| 65 | * any concrete reason we need a full IO fence, it seems safer to just upgrade | ||
| 66 | * this in order to avoid any IO crossing a scheduling boundary. In both | ||
| 67 | * instances the scheduler pairs this with an mb(), so nothing is necessary on | ||
| 68 | * the new hart. | ||
| 61 | */ | 69 | */ |
| 62 | #define smp_mb__after_spinlock() RISCV_FENCE(rw,rw) | 70 | #define smp_mb__after_spinlock() RISCV_FENCE(iorw,iorw) |
| 63 | 71 | ||
| 64 | #include <asm-generic/barrier.h> | 72 | #include <asm-generic/barrier.h> |
| 65 | 73 | ||
| @@ -3,8 +3,7 @@ · 2 unmodified lines | |||
| 3 | #ifndef __ASM_GDB_XML_H_ | 3 | #ifndef __ASM_GDB_XML_H_ |
| 4 | #define __ASM_GDB_XML_H_ | 4 | #define __ASM_GDB_XML_H_ |
| 5 | 5 | ||
| 6 | #define kgdb_arch_gdb_stub_feature riscv_gdb_stub_feature | 6 | const char riscv_gdb_stub_feature[64] = |
| 7 | static const char riscv_gdb_stub_feature[64] = | ||
| 8 | "PacketSize=800;qXfer:features:read+;"; | 7 | "PacketSize=800;qXfer:features:read+;"; |
| 9 | 8 | ||
| 10 | static const char gdb_xfer_read_target[31] = "qXfer:features:read:target.xml:"; | 9 | static const char gdb_xfer_read_target[31] = "qXfer:features:read:target.xml:"; |
| @@ -19,7 +19,6 @@ · 18 unmodified lines | |||
| 19 | 19 | ||
| 20 | #ifndef __ASSEMBLY__ | 20 | #ifndef __ASSEMBLY__ |
| 21 | 21 | ||
| 22 | extern int kgdb_has_hit_break(unsigned long addr); | ||
| 23 | extern unsigned long kgdb_compiled_break; | 22 | extern unsigned long kgdb_compiled_break; |
| 24 | 23 | ||
| 25 | static inline void arch_kgdb_breakpoint(void) | 24 | static inline void arch_kgdb_breakpoint(void) |
| @@ -106,7 +105,9 @@ static inline void arch_kgdb_breakpoint(void) · 80 unmodified lines | |||
| 106 | #define DBG_REG_BADADDR_OFF 34 | 105 | #define DBG_REG_BADADDR_OFF 34 |
| 107 | #define DBG_REG_CAUSE_OFF 35 | 106 | #define DBG_REG_CAUSE_OFF 35 |
| 108 | 107 | ||
| 109 | #include <asm/gdb_xml.h> | 108 | extern const char riscv_gdb_stub_feature[64]; |
| 109 | |||
| 110 | #define kgdb_arch_gdb_stub_feature riscv_gdb_stub_feature | ||
| 110 | 111 | ||
| 111 | #endif | 112 | #endif |
| 112 | #endif | 113 | #endif |
| @@ -12,7 +12,11 @@ · 11 unmodified lines | |||
| 12 | #include <linux/const.h> | 12 | #include <linux/const.h> |
| 13 | 13 | ||
| 14 | /* thread information allocation */ | 14 | /* thread information allocation */ |
| 15 | #ifdef CONFIG_64BIT | ||
| 16 | #define THREAD_SIZE_ORDER (2) | ||
| 17 | #else | ||
| 15 | #define THREAD_SIZE_ORDER (1) | 18 | #define THREAD_SIZE_ORDER (1) |
| 19 | #endif | ||
| 16 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) | 20 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) |
| 17 | 21 | ||
| 18 | #ifndef __ASSEMBLY__ | 22 | #ifndef __ASSEMBLY__ |
| @@ -44,18 +44,18 @@ DECLARE_INSN(c_beqz, MATCH_C_BEQZ, MASK_C_BEQZ) · 43 unmodified lines | |||
| 44 | DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ) | 44 | DECLARE_INSN(c_bnez, MATCH_C_BNEZ, MASK_C_BNEZ) |
| 45 | DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) | 45 | DECLARE_INSN(sret, MATCH_SRET, MASK_SRET) |
| 46 | 46 | ||
| 47 | int decode_register_index(unsigned long opcode, int offset) | 47 | static int decode_register_index(unsigned long opcode, int offset) |
| 48 | { | 48 | { |
| 49 | return (opcode >> offset) & 0x1F; | 49 | return (opcode >> offset) & 0x1F; |
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | int decode_register_index_short(unsigned long opcode, int offset) | 52 | static int decode_register_index_short(unsigned long opcode, int offset) |
| 53 | { | 53 | { |
| 54 | return ((opcode >> offset) & 0x7) + 8; | 54 | return ((opcode >> offset) & 0x7) + 8; |
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | /* Calculate the new address for after a step */ | 57 | /* Calculate the new address for after a step */ |
| 58 | int get_step_address(struct pt_regs *regs, unsigned long *next_addr) | 58 | static int get_step_address(struct pt_regs *regs, unsigned long *next_addr) |
| 59 | { | 59 | { |
| 60 | unsigned long pc = regs->epc; | 60 | unsigned long pc = regs->epc; |
| 61 | unsigned long *regs_ptr = (unsigned long *)regs; | 61 | unsigned long *regs_ptr = (unsigned long *)regs; |
| @@ -136,7 +136,7 @@ int get_step_address(struct pt_regs *regs, unsigned long *next_addr) · 74 unmodified lines | |||
| 136 | return 0; | 136 | return 0; |
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | int do_single_step(struct pt_regs *regs) | 139 | static int do_single_step(struct pt_regs *regs) |
| 140 | { | 140 | { |
| 141 | /* Determine where the target instruction will send us to */ | 141 | /* Determine where the target instruction will send us to */ |
| 142 | unsigned long addr = 0; | 142 | unsigned long addr = 0; |
| @@ -320,7 +320,7 @@ int kgdb_arch_handle_exception(int vector, int signo, int err_code, · 177 unmodified lines | |||
| 320 | return err; | 320 | return err; |
| 321 | } | 321 | } |
| 322 | 322 | ||
| 323 | int kgdb_riscv_kgdbbreak(unsigned long addr) | 323 | static int kgdb_riscv_kgdbbreak(unsigned long addr) |
| 324 | { | 324 | { |
| 325 | if (stepped_address == addr) | 325 | if (stepped_address == addr) |
| 326 | return KGDB_SW_SINGLE_STEP; | 326 | return KGDB_SW_SINGLE_STEP; |
| @@ -17,7 +17,7 @@ vdso-syms += flush_icache · 16 unmodified lines | |||
| 17 | obj-vdso = $(patsubst %, %.o, $(vdso-syms)) note.o | 17 | obj-vdso = $(patsubst %, %.o, $(vdso-syms)) note.o |
| 18 | 18 | ||
| 19 | ifneq ($(c-gettimeofday-y),) | 19 | ifneq ($(c-gettimeofday-y),) |
| 20 | CFLAGS_vgettimeofday.o += -include $(c-gettimeofday-y) | 20 | CFLAGS_vgettimeofday.o += -fPIC -include $(c-gettimeofday-y) |
| 21 | endif | 21 | endif |
| 22 | 22 | ||
| 23 | # Build rules | 23 | # Build rules |
| @@ -27,6 +27,9 @@ obj-vdso := $(addprefix $(obj)/, $(obj-vdso)) · 3 unmodified lines | |||
| 27 | obj-y += vdso.o vdso-syms.o | 27 | obj-y += vdso.o vdso-syms.o |
| 28 | CPPFLAGS_vdso.lds += -P -C -U$(ARCH) | 28 | CPPFLAGS_vdso.lds += -P -C -U$(ARCH) |
| 29 | 29 | ||
| 30 | # Disable -pg to prevent insert call site | ||
| 31 | CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os | ||
| 32 | |||
| 30 | # Disable gcov profiling for VDSO code | 33 | # Disable gcov profiling for VDSO code |
| 31 | GCOV_PROFILE := n | 34 | GCOV_PROFILE := n |
| 32 | 35 | ||
| @@ -9,16 +9,22 @@ · 8 unmodified lines | |||
| 9 | #include <linux/time.h> | 9 | #include <linux/time.h> |
| 10 | #include <linux/types.h> | 10 | #include <linux/types.h> |
| 11 | 11 | ||
| 12 | extern | ||
| 13 | int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts); | ||
| 12 | int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts) | 14 | int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts) |
| 13 | { | 15 | { |
| 14 | return __cvdso_clock_gettime(clock, ts); | 16 | return __cvdso_clock_gettime(clock, ts); |
| 15 | } | 17 | } |
| 16 | 18 | ||
| 19 | extern | ||
| 20 | int __vdso_gettimeofday(struct __kernel_old_timeval *tv, struct timezone *tz); | ||
| 17 | int __vdso_gettimeofday(struct __kernel_old_timeval *tv, struct timezone *tz) | 21 | int __vdso_gettimeofday(struct __kernel_old_timeval *tv, struct timezone *tz) |
| 18 | { | 22 | { |
| 19 | return __cvdso_gettimeofday(tv, tz); | 23 | return __cvdso_gettimeofday(tv, tz); |
| 20 | } | 24 | } |
| 21 | 25 | ||
| 26 | extern | ||
| 27 | int __vdso_clock_getres(clockid_t clock_id, struct __kernel_timespec *res); | ||
| 22 | int __vdso_clock_getres(clockid_t clock_id, struct __kernel_timespec *res) | 28 | int __vdso_clock_getres(clockid_t clock_id, struct __kernel_timespec *res) |
| 23 | { | 29 | { |
| 24 | return __cvdso_clock_getres(clock_id, res); | 30 | return __cvdso_clock_getres(clock_id, res); |
| @@ -1,5 +1,6 @@ | |||
| 1 | CONFIG_SYSVIPC=y | 1 | CONFIG_SYSVIPC=y |
| 2 | CONFIG_POSIX_MQUEUE=y | 2 | CONFIG_POSIX_MQUEUE=y |
| 3 | CONFIG_WATCH_QUEUE=y | ||
| 3 | CONFIG_AUDIT=y | 4 | CONFIG_AUDIT=y |
| 4 | CONFIG_NO_HZ_IDLE=y | 5 | CONFIG_NO_HZ_IDLE=y |
| 5 | CONFIG_HIGH_RES_TIMERS=y | 6 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -14,7 +15,6 @@ CONFIG_IKCONFIG=y · 8 unmodified lines | |||
| 14 | CONFIG_IKCONFIG_PROC=y | 15 | CONFIG_IKCONFIG_PROC=y |
| 15 | CONFIG_NUMA_BALANCING=y | 16 | CONFIG_NUMA_BALANCING=y |
| 16 | CONFIG_MEMCG=y | 17 | CONFIG_MEMCG=y |
| 17 | CONFIG_MEMCG_SWAP=y | ||
| 18 | CONFIG_BLK_CGROUP=y | 18 | CONFIG_BLK_CGROUP=y |
| 19 | CONFIG_CFS_BANDWIDTH=y | 19 | CONFIG_CFS_BANDWIDTH=y |
| 20 | CONFIG_RT_GROUP_SCHED=y | 20 | CONFIG_RT_GROUP_SCHED=y |
| @@ -31,9 +31,9 @@ CONFIG_NAMESPACES=y · 10 unmodified lines | |||
| 31 | CONFIG_USER_NS=y | 31 | CONFIG_USER_NS=y |
| 32 | CONFIG_CHECKPOINT_RESTORE=y | 32 | CONFIG_CHECKPOINT_RESTORE=y |
| 33 | CONFIG_SCHED_AUTOGROUP=y | 33 | CONFIG_SCHED_AUTOGROUP=y |
| 34 | CONFIG_BLK_DEV_INITRD=y | ||
| 35 | CONFIG_EXPERT=y | 34 | CONFIG_EXPERT=y |
| 36 | # CONFIG_SYSFS_SYSCALL is not set | 35 | # CONFIG_SYSFS_SYSCALL is not set |
| 36 | CONFIG_BPF_LSM=y | ||
| 37 | CONFIG_BPF_SYSCALL=y | 37 | CONFIG_BPF_SYSCALL=y |
| 38 | CONFIG_USERFAULTFD=y | 38 | CONFIG_USERFAULTFD=y |
| 39 | # CONFIG_COMPAT_BRK is not set | 39 | # CONFIG_COMPAT_BRK is not set |
| @@ -51,14 +51,11 @@ CONFIG_CHSC_SCH=y · 11 unmodified lines | |||
| 51 | CONFIG_VFIO_CCW=m | 51 | CONFIG_VFIO_CCW=m |
| 52 | CONFIG_VFIO_AP=m | 52 | CONFIG_VFIO_AP=m |
| 53 | CONFIG_CRASH_DUMP=y | 53 | CONFIG_CRASH_DUMP=y |
| 54 | CONFIG_HIBERNATION=y | ||
| 55 | CONFIG_PM_DEBUG=y | ||
| 56 | CONFIG_PROTECTED_VIRTUALIZATION_GUEST=y | 54 | CONFIG_PROTECTED_VIRTUALIZATION_GUEST=y |
| 57 | CONFIG_CMM=m | 55 | CONFIG_CMM=m |
| 58 | CONFIG_APPLDATA_BASE=y | 56 | CONFIG_APPLDATA_BASE=y |
| 59 | CONFIG_KVM=m | 57 | CONFIG_KVM=m |
| 60 | CONFIG_VHOST_NET=m | 58 | CONFIG_S390_UNWIND_SELFTEST=y |
| 61 | CONFIG_VHOST_VSOCK=m | ||
| 62 | CONFIG_OPROFILE=m | 59 | CONFIG_OPROFILE=m |
| 63 | CONFIG_KPROBES=y | 60 | CONFIG_KPROBES=y |
| 64 | CONFIG_JUMP_LABEL=y | 61 | CONFIG_JUMP_LABEL=y |
| @@ -77,6 +74,8 @@ CONFIG_BLK_DEV_THROTTLING=y · 12 unmodified lines | |||
| 77 | CONFIG_BLK_WBT=y | 74 | CONFIG_BLK_WBT=y |
| 78 | CONFIG_BLK_CGROUP_IOLATENCY=y | 75 | CONFIG_BLK_CGROUP_IOLATENCY=y |
| 79 | CONFIG_BLK_CGROUP_IOCOST=y | 76 | CONFIG_BLK_CGROUP_IOCOST=y |
| 77 | CONFIG_BLK_INLINE_ENCRYPTION=y | ||
| 78 | CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y | ||
| 80 | CONFIG_PARTITION_ADVANCED=y | 79 | CONFIG_PARTITION_ADVANCED=y |
| 81 | CONFIG_IBM_PARTITION=y | 80 | CONFIG_IBM_PARTITION=y |
| 82 | CONFIG_BSD_DISKLABEL=y | 81 | CONFIG_BSD_DISKLABEL=y |
| @@ -96,7 +95,6 @@ CONFIG_CMA_DEBUG=y · 13 unmodified lines | |||
| 96 | CONFIG_CMA_DEBUGFS=y | 95 | CONFIG_CMA_DEBUGFS=y |
| 97 | CONFIG_MEM_SOFT_DIRTY=y | 96 | CONFIG_MEM_SOFT_DIRTY=y |
| 98 | CONFIG_ZSWAP=y | 97 | CONFIG_ZSWAP=y |
| 99 | CONFIG_ZBUD=m | ||
| 100 | CONFIG_ZSMALLOC=m | 98 | CONFIG_ZSMALLOC=m |
| 101 | CONFIG_ZSMALLOC_STAT=y | 99 | CONFIG_ZSMALLOC_STAT=y |
| 102 | CONFIG_DEFERRED_STRUCT_PAGE_INIT=y | 100 | CONFIG_DEFERRED_STRUCT_PAGE_INIT=y |
| @@ -130,6 +128,7 @@ CONFIG_SYN_COOKIES=y · 27 unmodified lines | |||
| 130 | CONFIG_NET_IPVTI=m | 128 | CONFIG_NET_IPVTI=m |
| 131 | CONFIG_INET_AH=m | 129 | CONFIG_INET_AH=m |
| 132 | CONFIG_INET_ESP=m | 130 | CONFIG_INET_ESP=m |
| 131 | CONFIG_INET_ESPINTCP=y | ||
| 133 | CONFIG_INET_IPCOMP=m | 132 | CONFIG_INET_IPCOMP=m |
| 134 | CONFIG_INET_DIAG=m | 133 | CONFIG_INET_DIAG=m |
| 135 | CONFIG_INET_UDP_DIAG=m | 134 | CONFIG_INET_UDP_DIAG=m |
| @@ -144,6 +143,7 @@ CONFIG_TCP_CONG_ILLINOIS=m · 8 unmodified lines | |||
| 144 | CONFIG_IPV6_ROUTER_PREF=y | 143 | CONFIG_IPV6_ROUTER_PREF=y |
| 145 | CONFIG_INET6_AH=m | 144 | CONFIG_INET6_AH=m |
| 146 | CONFIG_INET6_ESP=m | 145 | CONFIG_INET6_ESP=m |
| 146 | CONFIG_INET6_ESPINTCP=y | ||
| 147 | CONFIG_INET6_IPCOMP=m | 147 | CONFIG_INET6_IPCOMP=m |
| 148 | CONFIG_IPV6_MIP6=m | 148 | CONFIG_IPV6_MIP6=m |
| 149 | CONFIG_IPV6_VTI=m | 149 | CONFIG_IPV6_VTI=m |
| @@ -151,7 +151,10 @@ CONFIG_IPV6_SIT=m · 1 unmodified line | |||
| 151 | CONFIG_IPV6_GRE=m | 151 | CONFIG_IPV6_GRE=m |
| 152 | CONFIG_IPV6_MULTIPLE_TABLES=y | 152 | CONFIG_IPV6_MULTIPLE_TABLES=y |
| 153 | CONFIG_IPV6_SUBTREES=y | 153 | CONFIG_IPV6_SUBTREES=y |
| 154 | CONFIG_IPV6_RPL_LWTUNNEL=y | ||
| 155 | CONFIG_MPTCP=y | ||
| 154 | CONFIG_NETFILTER=y | 156 | CONFIG_NETFILTER=y |
| 157 | CONFIG_BRIDGE_NETFILTER=m | ||
| 155 | CONFIG_NF_CONNTRACK=m | 158 | CONFIG_NF_CONNTRACK=m |
| 156 | CONFIG_NF_CONNTRACK_SECMARK=y | 159 | CONFIG_NF_CONNTRACK_SECMARK=y |
| 157 | CONFIG_NF_CONNTRACK_EVENTS=y | 160 | CONFIG_NF_CONNTRACK_EVENTS=y |
| @@ -317,6 +320,7 @@ CONFIG_L2TP_V3=y · 159 unmodified lines | |||
| 317 | CONFIG_L2TP_IP=m | 320 | CONFIG_L2TP_IP=m |
| 318 | CONFIG_L2TP_ETH=m | 321 | CONFIG_L2TP_ETH=m |
| 319 | CONFIG_BRIDGE=m | 322 | CONFIG_BRIDGE=m |
| 323 | CONFIG_BRIDGE_MRP=y | ||
| 320 | CONFIG_VLAN_8021Q=m | 324 | CONFIG_VLAN_8021Q=m |
| 321 | CONFIG_VLAN_8021Q_GVRP=y | 325 | CONFIG_VLAN_8021Q_GVRP=y |
| 322 | CONFIG_NET_SCHED=y | 326 | CONFIG_NET_SCHED=y |
| @@ -341,6 +345,7 @@ CONFIG_NET_SCH_CODEL=m · 18 unmodified lines | |||
| 341 | CONFIG_NET_SCH_FQ_CODEL=m | 345 | CONFIG_NET_SCH_FQ_CODEL=m |
| 342 | CONFIG_NET_SCH_INGRESS=m | 346 | CONFIG_NET_SCH_INGRESS=m |
| 343 | CONFIG_NET_SCH_PLUG=m | 347 | CONFIG_NET_SCH_PLUG=m |
| 348 | CONFIG_NET_SCH_ETS=m | ||
| 344 | CONFIG_NET_CLS_BASIC=m | 349 | CONFIG_NET_CLS_BASIC=m |
| 345 | CONFIG_NET_CLS_TCINDEX=m | 350 | CONFIG_NET_CLS_TCINDEX=m |
| 346 | CONFIG_NET_CLS_ROUTE4=m | 351 | CONFIG_NET_CLS_ROUTE4=m |
| @@ -364,6 +369,7 @@ CONFIG_NET_ACT_PEDIT=m · 17 unmodified lines | |||
| 364 | CONFIG_NET_ACT_SIMP=m | 369 | CONFIG_NET_ACT_SIMP=m |
| 365 | CONFIG_NET_ACT_SKBEDIT=m | 370 | CONFIG_NET_ACT_SKBEDIT=m |
| 366 | CONFIG_NET_ACT_CSUM=m | 371 | CONFIG_NET_ACT_CSUM=m |
| 372 | CONFIG_NET_ACT_GATE=m | ||
| 367 | CONFIG_DNS_RESOLVER=y | 373 | CONFIG_DNS_RESOLVER=y |
| 368 | CONFIG_OPENVSWITCH=m | 374 | CONFIG_OPENVSWITCH=m |
| 369 | CONFIG_VSOCKETS=m | 375 | CONFIG_VSOCKETS=m |
| @@ -374,6 +380,7 @@ CONFIG_BPF_JIT=y · 4 unmodified lines | |||
| 374 | CONFIG_NET_PKTGEN=m | 380 | CONFIG_NET_PKTGEN=m |
| 375 | # CONFIG_NET_DROP_MONITOR is not set | 381 | # CONFIG_NET_DROP_MONITOR is not set |
| 376 | CONFIG_PCI=y | 382 | CONFIG_PCI=y |
| 383 | # CONFIG_PCIEASPM is not set | ||
| 377 | CONFIG_PCI_DEBUG=y | 384 | CONFIG_PCI_DEBUG=y |
| 378 | CONFIG_HOTPLUG_PCI=y | 385 | CONFIG_HOTPLUG_PCI=y |
| 379 | CONFIG_HOTPLUG_PCI_S390=y | 386 | CONFIG_HOTPLUG_PCI_S390=y |
| @@ -435,6 +442,7 @@ CONFIG_DM_ZERO=m · 55 unmodified lines | |||
| 435 | CONFIG_DM_MULTIPATH=m | 442 | CONFIG_DM_MULTIPATH=m |
| 436 | CONFIG_DM_MULTIPATH_QL=m | 443 | CONFIG_DM_MULTIPATH_QL=m |
| 437 | CONFIG_DM_MULTIPATH_ST=m | 444 | CONFIG_DM_MULTIPATH_ST=m |
| 445 | CONFIG_DM_MULTIPATH_HST=m | ||
| 438 | CONFIG_DM_DELAY=m | 446 | CONFIG_DM_DELAY=m |
| 439 | CONFIG_DM_UEVENT=y | 447 | CONFIG_DM_UEVENT=y |
| 440 | CONFIG_DM_FLAKEY=m | 448 | CONFIG_DM_FLAKEY=m |
| @@ -448,6 +456,8 @@ CONFIG_EQUALIZER=m · 7 unmodified lines | |||
| 448 | CONFIG_IFB=m | 456 | CONFIG_IFB=m |
| 449 | CONFIG_MACVLAN=m | 457 | CONFIG_MACVLAN=m |
| 450 | CONFIG_MACVTAP=m | 458 | CONFIG_MACVTAP=m |
| 459 | CONFIG_VXLAN=m | ||
| 460 | CONFIG_BAREUDP=m | ||
| 451 | CONFIG_TUN=m | 461 | CONFIG_TUN=m |
| 452 | CONFIG_VETH=m | 462 | CONFIG_VETH=m |
| 453 | CONFIG_VIRTIO_NET=m | 463 | CONFIG_VIRTIO_NET=m |
| @@ -481,7 +491,6 @@ CONFIG_NLMON=m · 27 unmodified lines | |||
| 481 | CONFIG_MLX4_EN=m | 491 | CONFIG_MLX4_EN=m |
| 482 | CONFIG_MLX5_CORE=m | 492 | CONFIG_MLX5_CORE=m |
| 483 | CONFIG_MLX5_CORE_EN=y | 493 | CONFIG_MLX5_CORE_EN=y |
| 484 | # CONFIG_MLXFW is not set | ||
| 485 | # CONFIG_NET_VENDOR_MICREL is not set | 494 | # CONFIG_NET_VENDOR_MICREL is not set |
| 486 | # CONFIG_NET_VENDOR_MICROCHIP is not set | 495 | # CONFIG_NET_VENDOR_MICROCHIP is not set |
| 487 | # CONFIG_NET_VENDOR_MICROSEMI is not set | 496 | # CONFIG_NET_VENDOR_MICROSEMI is not set |
| @@ -514,6 +523,7 @@ CONFIG_MLX5_CORE_EN=y · 26 unmodified lines | |||
| 514 | # CONFIG_NET_VENDOR_TI is not set | 523 | # CONFIG_NET_VENDOR_TI is not set |
| 515 | # CONFIG_NET_VENDOR_VIA is not set | 524 | # CONFIG_NET_VENDOR_VIA is not set |
| 516 | # CONFIG_NET_VENDOR_WIZNET is not set | 525 | # CONFIG_NET_VENDOR_WIZNET is not set |
| 526 | # CONFIG_NET_VENDOR_XILINX is not set | ||
| 517 | CONFIG_PPP=m | 527 | CONFIG_PPP=m |
| 518 | CONFIG_PPP_BSDCOMP=m | 528 | CONFIG_PPP_BSDCOMP=m |
| 519 | CONFIG_PPP_DEFLATE=m | 529 | CONFIG_PPP_DEFLATE=m |
| @@ -561,6 +571,8 @@ CONFIG_VFIO_MDEV_DEVICE=m · 41 unmodified lines | |||
| 561 | CONFIG_VIRTIO_PCI=m | 571 | CONFIG_VIRTIO_PCI=m |
| 562 | CONFIG_VIRTIO_BALLOON=m | 572 | CONFIG_VIRTIO_BALLOON=m |
| 563 | CONFIG_VIRTIO_INPUT=y | 573 | CONFIG_VIRTIO_INPUT=y |
| 574 | CONFIG_VHOST_NET=m | ||
| 575 | CONFIG_VHOST_VSOCK=m | ||
| 564 | CONFIG_S390_CCW_IOMMU=y | 576 | CONFIG_S390_CCW_IOMMU=y |
| 565 | CONFIG_S390_AP_IOMMU=y | 577 | CONFIG_S390_AP_IOMMU=y |
| 566 | CONFIG_EXT4_FS=y | 578 | CONFIG_EXT4_FS=y |
| @@ -608,6 +620,7 @@ CONFIG_ZISOFS=y · 41 unmodified lines | |||
| 608 | CONFIG_UDF_FS=m | 620 | CONFIG_UDF_FS=m |
| 609 | CONFIG_MSDOS_FS=m | 621 | CONFIG_MSDOS_FS=m |
| 610 | CONFIG_VFAT_FS=m | 622 | CONFIG_VFAT_FS=m |
| 623 | CONFIG_EXFAT_FS=m | ||
| 611 | CONFIG_NTFS_FS=m | 624 | CONFIG_NTFS_FS=m |
| 612 | CONFIG_NTFS_RW=y | 625 | CONFIG_NTFS_RW=y |
| 613 | CONFIG_PROC_KCORE=y | 626 | CONFIG_PROC_KCORE=y |
| @@ -650,8 +663,8 @@ CONFIG_NLS_UTF8=m · 36 unmodified lines | |||
| 650 | CONFIG_DLM=m | 663 | CONFIG_DLM=m |
| 651 | CONFIG_UNICODE=y | 664 | CONFIG_UNICODE=y |
| 652 | CONFIG_PERSISTENT_KEYRINGS=y | 665 | CONFIG_PERSISTENT_KEYRINGS=y |
| 653 | CONFIG_BIG_KEYS=y | ||
| 654 | CONFIG_ENCRYPTED_KEYS=m | 666 | CONFIG_ENCRYPTED_KEYS=m |
| 667 | CONFIG_KEY_NOTIFICATIONS=y | ||
| 655 | CONFIG_SECURITY=y | 668 | CONFIG_SECURITY=y |
| 656 | CONFIG_SECURITY_NETWORK=y | 669 | CONFIG_SECURITY_NETWORK=y |
| 657 | CONFIG_FORTIFY_SOURCE=y | 670 | CONFIG_FORTIFY_SOURCE=y |
| @@ -675,8 +688,11 @@ CONFIG_CRYPTO_TEST=m · 17 unmodified lines | |||
| 675 | CONFIG_CRYPTO_DH=m | 688 | CONFIG_CRYPTO_DH=m |
| 676 | CONFIG_CRYPTO_ECDH=m | 689 | CONFIG_CRYPTO_ECDH=m |
| 677 | CONFIG_CRYPTO_ECRDSA=m | 690 | CONFIG_CRYPTO_ECRDSA=m |
| 691 | CONFIG_CRYPTO_CURVE25519=m | ||
| 692 | CONFIG_CRYPTO_GCM=y | ||
| 678 | CONFIG_CRYPTO_CHACHA20POLY1305=m | 693 | CONFIG_CRYPTO_CHACHA20POLY1305=m |
| 679 | CONFIG_CRYPTO_AEGIS128=m | 694 | CONFIG_CRYPTO_AEGIS128=m |
| 695 | CONFIG_CRYPTO_SEQIV=y | ||
| 680 | CONFIG_CRYPTO_CFB=m | 696 | CONFIG_CRYPTO_CFB=m |
| 681 | CONFIG_CRYPTO_LRW=m | 697 | CONFIG_CRYPTO_LRW=m |
| 682 | CONFIG_CRYPTO_PCBC=m | 698 | CONFIG_CRYPTO_PCBC=m |
| @@ -685,6 +701,7 @@ CONFIG_CRYPTO_ADIANTUM=m · 2 unmodified lines | |||
| 685 | CONFIG_CRYPTO_XCBC=m | 701 | CONFIG_CRYPTO_XCBC=m |
| 686 | CONFIG_CRYPTO_VMAC=m | 702 | CONFIG_CRYPTO_VMAC=m |
| 687 | CONFIG_CRYPTO_CRC32=m | 703 | CONFIG_CRYPTO_CRC32=m |
| 704 | CONFIG_CRYPTO_BLAKE2S=m | ||
| 688 | CONFIG_CRYPTO_MICHAEL_MIC=m | 705 | CONFIG_CRYPTO_MICHAEL_MIC=m |
| 689 | CONFIG_CRYPTO_RMD128=m | 706 | CONFIG_CRYPTO_RMD128=m |
| 690 | CONFIG_CRYPTO_RMD160=m | 707 | CONFIG_CRYPTO_RMD160=m |
| @@ -701,6 +718,7 @@ CONFIG_CRYPTO_BLOWFISH=m · 10 unmodified lines | |||
| 701 | CONFIG_CRYPTO_CAMELLIA=m | 718 | CONFIG_CRYPTO_CAMELLIA=m |
| 702 | CONFIG_CRYPTO_CAST5=m | 719 | CONFIG_CRYPTO_CAST5=m |
| 703 | CONFIG_CRYPTO_CAST6=m | 720 | CONFIG_CRYPTO_CAST6=m |
| 721 | CONFIG_CRYPTO_DES=m | ||
| 704 | CONFIG_CRYPTO_FCRYPT=m | 722 | CONFIG_CRYPTO_FCRYPT=m |
| 705 | CONFIG_CRYPTO_KHAZAD=m | 723 | CONFIG_CRYPTO_KHAZAD=m |
| 706 | CONFIG_CRYPTO_SALSA20=m | 724 | CONFIG_CRYPTO_SALSA20=m |
| @@ -719,6 +737,9 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m · 12 unmodified lines | |||
| 719 | CONFIG_CRYPTO_USER_API_RNG=m | 737 | CONFIG_CRYPTO_USER_API_RNG=m |
| 720 | CONFIG_CRYPTO_USER_API_AEAD=m | 738 | CONFIG_CRYPTO_USER_API_AEAD=m |
| 721 | CONFIG_CRYPTO_STATS=y | 739 | CONFIG_CRYPTO_STATS=y |
| 740 | CONFIG_CRYPTO_LIB_BLAKE2S=m | ||
| 741 | CONFIG_CRYPTO_LIB_CURVE25519=m | ||
| 742 | CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m | ||
| 722 | CONFIG_ZCRYPT=m | 743 | CONFIG_ZCRYPT=m |
| 723 | CONFIG_PKEY=m | 744 | CONFIG_PKEY=m |
| 724 | CONFIG_CRYPTO_PAES_S390=m | 745 | CONFIG_CRYPTO_PAES_S390=m |
| @@ -774,6 +795,7 @@ CONFIG_DEBUG_SHIRQ=y · 49 unmodified lines | |||
| 774 | CONFIG_PANIC_ON_OOPS=y | 795 | CONFIG_PANIC_ON_OOPS=y |
| 775 | CONFIG_DETECT_HUNG_TASK=y | 796 | CONFIG_DETECT_HUNG_TASK=y |
| 776 | CONFIG_WQ_WATCHDOG=y | 797 | CONFIG_WQ_WATCHDOG=y |
| 798 | CONFIG_TEST_LOCKUP=m | ||
| 777 | CONFIG_DEBUG_TIMEKEEPING=y | 799 | CONFIG_DEBUG_TIMEKEEPING=y |
| 778 | CONFIG_PROVE_LOCKING=y | 800 | CONFIG_PROVE_LOCKING=y |
| 779 | CONFIG_LOCK_STAT=y | 801 | CONFIG_LOCK_STAT=y |
| @@ -786,7 +808,9 @@ CONFIG_BUG_ON_DATA_CORRUPTION=y · 6 unmodified lines | |||
| 786 | CONFIG_DEBUG_CREDENTIALS=y | 808 | CONFIG_DEBUG_CREDENTIALS=y |
| 787 | CONFIG_RCU_TORTURE_TEST=m | 809 | CONFIG_RCU_TORTURE_TEST=m |
| 788 | CONFIG_RCU_CPU_STALL_TIMEOUT=300 | 810 | CONFIG_RCU_CPU_STALL_TIMEOUT=300 |
| 811 | # CONFIG_RCU_TRACE is not set | ||
| 789 | CONFIG_LATENCYTOP=y | 812 | CONFIG_LATENCYTOP=y |
| 813 | CONFIG_BOOTTIME_TRACING=y | ||
| 790 | CONFIG_FUNCTION_PROFILER=y | 814 | CONFIG_FUNCTION_PROFILER=y |
| 791 | CONFIG_STACK_TRACER=y | 815 | CONFIG_STACK_TRACER=y |
| 792 | CONFIG_IRQSOFF_TRACER=y | 816 | CONFIG_IRQSOFF_TRACER=y |
| @@ -808,10 +832,12 @@ CONFIG_FAULT_INJECTION_DEBUG_FS=y · 15 unmodified lines | |||
| 808 | CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y | 832 | CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y |
| 809 | CONFIG_LKDTM=m | 833 | CONFIG_LKDTM=m |
| 810 | CONFIG_TEST_LIST_SORT=y | 834 | CONFIG_TEST_LIST_SORT=y |
| 835 | CONFIG_TEST_MIN_HEAP=y | ||
| 811 | CONFIG_TEST_SORT=y | 836 | CONFIG_TEST_SORT=y |
| 812 | CONFIG_KPROBES_SANITY_TEST=y | 837 | CONFIG_KPROBES_SANITY_TEST=y |
| 813 | CONFIG_RBTREE_TEST=y | 838 | CONFIG_RBTREE_TEST=y |
| 814 | CONFIG_INTERVAL_TREE_TEST=m | 839 | CONFIG_INTERVAL_TREE_TEST=m |
| 815 | CONFIG_PERCPU_TEST=m | 840 | CONFIG_PERCPU_TEST=m |
| 816 | CONFIG_ATOMIC64_SELFTEST=y | 841 | CONFIG_ATOMIC64_SELFTEST=y |
| 842 | CONFIG_TEST_BITOPS=m | ||
| 817 | CONFIG_TEST_BPF=m | 843 | CONFIG_TEST_BPF=m |
| @@ -1,5 +1,6 @@ | |||
| 1 | CONFIG_SYSVIPC=y | 1 | CONFIG_SYSVIPC=y |
| 2 | CONFIG_POSIX_MQUEUE=y | 2 | CONFIG_POSIX_MQUEUE=y |
| 3 | CONFIG_WATCH_QUEUE=y | ||
| 3 | CONFIG_AUDIT=y | 4 | CONFIG_AUDIT=y |
| 4 | CONFIG_NO_HZ_IDLE=y | 5 | CONFIG_NO_HZ_IDLE=y |
| 5 | CONFIG_HIGH_RES_TIMERS=y | 6 | CONFIG_HIGH_RES_TIMERS=y |
| @@ -13,7 +14,6 @@ CONFIG_IKCONFIG=y · 7 unmodified lines | |||
| 13 | CONFIG_IKCONFIG_PROC=y | 14 | CONFIG_IKCONFIG_PROC=y |
| 14 | CONFIG_NUMA_BALANCING=y | 15 | CONFIG_NUMA_BALANCING=y |
| 15 | CONFIG_MEMCG=y | 16 | CONFIG_MEMCG=y |
| 16 | CONFIG_MEMCG_SWAP=y | ||
| 17 | CONFIG_BLK_CGROUP=y | 17 | CONFIG_BLK_CGROUP=y |
| 18 | CONFIG_CFS_BANDWIDTH=y | 18 | CONFIG_CFS_BANDWIDTH=y |
| 19 | CONFIG_RT_GROUP_SCHED=y | 19 | CONFIG_RT_GROUP_SCHED=y |
| @@ -30,9 +30,9 @@ CONFIG_NAMESPACES=y · 10 unmodified lines | |||
| 30 | CONFIG_USER_NS=y | 30 | CONFIG_USER_NS=y |
| 31 | CONFIG_CHECKPOINT_RESTORE=y | 31 | CONFIG_CHECKPOINT_RESTORE=y |
| 32 | CONFIG_SCHED_AUTOGROUP=y | 32 | CONFIG_SCHED_AUTOGROUP=y |
| 33 | CONFIG_BLK_DEV_INITRD=y | ||
| 34 | CONFIG_EXPERT=y | 33 | CONFIG_EXPERT=y |
| 35 | # CONFIG_SYSFS_SYSCALL is not set | 34 | # CONFIG_SYSFS_SYSCALL is not set |
| 35 | CONFIG_BPF_LSM=y | ||
| 36 | CONFIG_BPF_SYSCALL=y | 36 | CONFIG_BPF_SYSCALL=y |
| 37 | CONFIG_USERFAULTFD=y | 37 | CONFIG_USERFAULTFD=y |
| 38 | # CONFIG_COMPAT_BRK is not set | 38 | # CONFIG_COMPAT_BRK is not set |
| @@ -41,7 +41,6 @@ CONFIG_LIVEPATCH=y · 2 unmodified lines | |||
| 41 | CONFIG_TUNE_ZEC12=y | 41 | CONFIG_TUNE_ZEC12=y |
| 42 | CONFIG_NR_CPUS=512 | 42 | CONFIG_NR_CPUS=512 |
| 43 | CONFIG_NUMA=y | 43 | CONFIG_NUMA=y |
| 44 | # CONFIG_NUMA_EMU is not set | ||
| 45 | CONFIG_HZ_100=y | 44 | CONFIG_HZ_100=y |
| 46 | CONFIG_KEXEC_FILE=y | 45 | CONFIG_KEXEC_FILE=y |
| 47 | CONFIG_KEXEC_SIG=y | 46 | CONFIG_KEXEC_SIG=y |
| @@ -51,14 +50,11 @@ CONFIG_CHSC_SCH=y · 3 unmodified lines | |||
| 51 | CONFIG_VFIO_CCW=m | 50 | CONFIG_VFIO_CCW=m |
| 52 | CONFIG_VFIO_AP=m | 51 | CONFIG_VFIO_AP=m |
| 53 | CONFIG_CRASH_DUMP=y | 52 | CONFIG_CRASH_DUMP=y |
| 54 | CONFIG_HIBERNATION=y | ||
| 55 | CONFIG_PM_DEBUG=y | ||
| 56 | CONFIG_PROTECTED_VIRTUALIZATION_GUEST=y | 53 | CONFIG_PROTECTED_VIRTUALIZATION_GUEST=y |
| 57 | CONFIG_CMM=m | 54 | CONFIG_CMM=m |
| 58 | CONFIG_APPLDATA_BASE=y | 55 | CONFIG_APPLDATA_BASE=y |
| 59 | CONFIG_KVM=m | 56 | CONFIG_KVM=m |
| 60 | CONFIG_VHOST_NET=m | 57 | CONFIG_S390_UNWIND_SELFTEST=m |
| 61 | CONFIG_VHOST_VSOCK=m | ||
| 62 | CONFIG_OPROFILE=m | 58 | CONFIG_OPROFILE=m |
| 63 | CONFIG_KPROBES=y | 59 | CONFIG_KPROBES=y |
| 64 | CONFIG_JUMP_LABEL=y | 60 | CONFIG_JUMP_LABEL=y |
| @@ -74,6 +70,8 @@ CONFIG_BLK_DEV_THROTTLING=y · 9 unmodified lines | |||
| 74 | CONFIG_BLK_WBT=y | 70 | CONFIG_BLK_WBT=y |
| 75 | CONFIG_BLK_CGROUP_IOLATENCY=y | 71 | CONFIG_BLK_CGROUP_IOLATENCY=y |
| 76 | CONFIG_BLK_CGROUP_IOCOST=y | 72 | CONFIG_BLK_CGROUP_IOCOST=y |
| 73 | CONFIG_BLK_INLINE_ENCRYPTION=y | ||
| 74 | CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK=y | ||
| 77 | CONFIG_PARTITION_ADVANCED=y | 75 | CONFIG_PARTITION_ADVANCED=y |
| 78 | CONFIG_IBM_PARTITION=y | 76 | CONFIG_IBM_PARTITION=y |
| 79 | CONFIG_BSD_DISKLABEL=y | 77 | CONFIG_BSD_DISKLABEL=y |
| @@ -91,7 +89,6 @@ CONFIG_CLEANCACHE=y · 11 unmodified lines | |||
| 91 | CONFIG_FRONTSWAP=y | 89 | CONFIG_FRONTSWAP=y |
| 92 | CONFIG_MEM_SOFT_DIRTY=y | 90 | CONFIG_MEM_SOFT_DIRTY=y |
| 93 | CONFIG_ZSWAP=y | 91 | CONFIG_ZSWAP=y |
| 94 | CONFIG_ZBUD=m | ||
| 95 | CONFIG_ZSMALLOC=m | 92 | CONFIG_ZSMALLOC=m |
| 96 | CONFIG_ZSMALLOC_STAT=y | 93 | CONFIG_ZSMALLOC_STAT=y |
| 97 | CONFIG_DEFERRED_STRUCT_PAGE_INIT=y | 94 | CONFIG_DEFERRED_STRUCT_PAGE_INIT=y |
| @@ -125,6 +122,7 @@ CONFIG_SYN_COOKIES=y · 27 unmodified lines | |||
| 125 | CONFIG_NET_IPVTI=m | 122 | CONFIG_NET_IPVTI=m |
| 126 | CONFIG_INET_AH=m | 123 | CONFIG_INET_AH=m |
| 127 | CONFIG_INET_ESP=m | 124 | CONFIG_INET_ESP=m |
| 125 | CONFIG_INET_ESPINTCP=y | ||
| 128 | CONFIG_INET_IPCOMP=m | 126 | CONFIG_INET_IPCOMP=m |
| 129 | CONFIG_INET_DIAG=m | 127 | CONFIG_INET_DIAG=m |
| 130 | CONFIG_INET_UDP_DIAG=m | 128 | CONFIG_INET_UDP_DIAG=m |
| @@ -139,6 +137,7 @@ CONFIG_TCP_CONG_ILLINOIS=m · 8 unmodified lines | |||
| 139 | CONFIG_IPV6_ROUTER_PREF=y | 137 | CONFIG_IPV6_ROUTER_PREF=y |
| 140 | CONFIG_INET6_AH=m | 138 | CONFIG_INET6_AH=m |
| 141 | CONFIG_INET6_ESP=m | 139 | CONFIG_INET6_ESP=m |
| 140 | CONFIG_INET6_ESPINTCP=y | ||
| 142 | CONFIG_INET6_IPCOMP=m | 141 | CONFIG_INET6_IPCOMP=m |
| 143 | CONFIG_IPV6_MIP6=m | 142 | CONFIG_IPV6_MIP6=m |
| 144 | CONFIG_IPV6_VTI=m | 143 | CONFIG_IPV6_VTI=m |
| @@ -146,7 +145,10 @@ CONFIG_IPV6_SIT=m · 1 unmodified line | |||
| 146 | CONFIG_IPV6_GRE=m | 145 | CONFIG_IPV6_GRE=m |
| 147 | CONFIG_IPV6_MULTIPLE_TABLES=y | 146 | CONFIG_IPV6_MULTIPLE_TABLES=y |
| 148 | CONFIG_IPV6_SUBTREES=y | 147 | CONFIG_IPV6_SUBTREES=y |
| 148 | CONFIG_IPV6_RPL_LWTUNNEL=y | ||
| 149 | CONFIG_MPTCP=y | ||
| 149 | CONFIG_NETFILTER=y | 150 | CONFIG_NETFILTER=y |
| 151 | CONFIG_BRIDGE_NETFILTER=m | ||
| 150 | CONFIG_NF_CONNTRACK=m | 152 | CONFIG_NF_CONNTRACK=m |
| 151 | CONFIG_NF_CONNTRACK_SECMARK=y | 153 | CONFIG_NF_CONNTRACK_SECMARK=y |
| 152 | CONFIG_NF_CONNTRACK_EVENTS=y | 154 | CONFIG_NF_CONNTRACK_EVENTS=y |
| @@ -311,6 +313,7 @@ CONFIG_L2TP_V3=y · 158 unmodified lines | |||
| 311 | CONFIG_L2TP_IP=m | 313 | CONFIG_L2TP_IP=m |
| 312 | CONFIG_L2TP_ETH=m | 314 | CONFIG_L2TP_ETH=m |
| 313 | CONFIG_BRIDGE=m | 315 | CONFIG_BRIDGE=m |
| 316 | CONFIG_BRIDGE_MRP=y | ||
| 314 | CONFIG_VLAN_8021Q=m | 317 | CONFIG_VLAN_8021Q=m |
| 315 | CONFIG_VLAN_8021Q_GVRP=y | 318 | CONFIG_VLAN_8021Q_GVRP=y |
| 316 | CONFIG_NET_SCHED=y | 319 | CONFIG_NET_SCHED=y |
| @@ -335,6 +338,7 @@ CONFIG_NET_SCH_CODEL=m · 18 unmodified lines | |||
| 335 | CONFIG_NET_SCH_FQ_CODEL=m | 338 | CONFIG_NET_SCH_FQ_CODEL=m |
| 336 | CONFIG_NET_SCH_INGRESS=m | 339 | CONFIG_NET_SCH_INGRESS=m |
| 337 | CONFIG_NET_SCH_PLUG=m | 340 | CONFIG_NET_SCH_PLUG=m |
| 341 | CONFIG_NET_SCH_ETS=m | ||
| 338 | CONFIG_NET_CLS_BASIC=m | 342 | CONFIG_NET_CLS_BASIC=m |
| 339 | CONFIG_NET_CLS_TCINDEX=m | 343 | CONFIG_NET_CLS_TCINDEX=m |
| 340 | CONFIG_NET_CLS_ROUTE4=m | 344 | CONFIG_NET_CLS_ROUTE4=m |
| @@ -358,6 +362,7 @@ CONFIG_NET_ACT_PEDIT=m · 17 unmodified lines | |||
| 358 | CONFIG_NET_ACT_SIMP=m | 362 | CONFIG_NET_ACT_SIMP=m |
| 359 | CONFIG_NET_ACT_SKBEDIT=m | 363 | CONFIG_NET_ACT_SKBEDIT=m |
| 360 | CONFIG_NET_ACT_CSUM=m | 364 | CONFIG_NET_ACT_CSUM=m |
| 365 | CONFIG_NET_ACT_GATE=m | ||
| 361 | CONFIG_DNS_RESOLVER=y | 366 | CONFIG_DNS_RESOLVER=y |
| 362 | CONFIG_OPENVSWITCH=m | 367 | CONFIG_OPENVSWITCH=m |
| 363 | CONFIG_VSOCKETS=m | 368 | CONFIG_VSOCKETS=m |
| @@ -368,6 +373,7 @@ CONFIG_BPF_JIT=y · 4 unmodified lines | |||
| 368 | CONFIG_NET_PKTGEN=m | 373 | CONFIG_NET_PKTGEN=m |
| 369 | # CONFIG_NET_DROP_MONITOR is not set | 374 | # CONFIG_NET_DROP_MONITOR is not set |
| 370 | CONFIG_PCI=y | 375 | CONFIG_PCI=y |
| 376 | # CONFIG_PCIEASPM is not set | ||
| 371 | CONFIG_HOTPLUG_PCI=y | 377 | CONFIG_HOTPLUG_PCI=y |
| 372 | CONFIG_HOTPLUG_PCI_S390=y | 378 | CONFIG_HOTPLUG_PCI_S390=y |
| 373 | CONFIG_UEVENT_HELPER=y | 379 | CONFIG_UEVENT_HELPER=y |
| @@ -430,6 +436,7 @@ CONFIG_DM_ZERO=m · 56 unmodified lines | |||
| 430 | CONFIG_DM_MULTIPATH=m | 436 | CONFIG_DM_MULTIPATH=m |
| 431 | CONFIG_DM_MULTIPATH_QL=m | 437 | CONFIG_DM_MULTIPATH_QL=m |
| 432 | CONFIG_DM_MULTIPATH_ST=m | 438 | CONFIG_DM_MULTIPATH_ST=m |
| 439 | CONFIG_DM_MULTIPATH_HST=m | ||
| 433 | CONFIG_DM_DELAY=m | 440 | CONFIG_DM_DELAY=m |
| 434 | CONFIG_DM_UEVENT=y | 441 | CONFIG_DM_UEVENT=y |
| 435 | CONFIG_DM_FLAKEY=m | 442 | CONFIG_DM_FLAKEY=m |
| @@ -444,6 +451,8 @@ CONFIG_EQUALIZER=m · 8 unmodified lines | |||
| 444 | CONFIG_IFB=m | 451 | CONFIG_IFB=m |
| 445 | CONFIG_MACVLAN=m | 452 | CONFIG_MACVLAN=m |
| 446 | CONFIG_MACVTAP=m | 453 | CONFIG_MACVTAP=m |
| 454 | CONFIG_VXLAN=m | ||
| 455 | CONFIG_BAREUDP=m | ||
| 447 | CONFIG_TUN=m | 456 | CONFIG_TUN=m |
| 448 | CONFIG_VETH=m | 457 | CONFIG_VETH=m |
| 449 | CONFIG_VIRTIO_NET=m | 458 | CONFIG_VIRTIO_NET=m |
| @@ -477,7 +486,6 @@ CONFIG_NLMON=m · 27 unmodified lines | |||
| 477 | CONFIG_MLX4_EN=m | 486 | CONFIG_MLX4_EN=m |
| 478 | CONFIG_MLX5_CORE=m | 487 | CONFIG_MLX5_CORE=m |
| 479 | CONFIG_MLX5_CORE_EN=y | 488 | CONFIG_MLX5_CORE_EN=y |
| 480 | # CONFIG_MLXFW is not set | ||
| 481 | # CONFIG_NET_VENDOR_MICREL is not set | 489 | # CONFIG_NET_VENDOR_MICREL is not set |
| 482 | # CONFIG_NET_VENDOR_MICROCHIP is not set | 490 | # CONFIG_NET_VENDOR_MICROCHIP is not set |
| 483 | # CONFIG_NET_VENDOR_MICROSEMI is not set | 491 | # CONFIG_NET_VENDOR_MICROSEMI is not set |
| @@ -510,6 +518,7 @@ CONFIG_MLX5_CORE_EN=y · 26 unmodified lines | |||
| 510 | # CONFIG_NET_VENDOR_TI is not set | 518 | # CONFIG_NET_VENDOR_TI is not set |
| 511 | # CONFIG_NET_VENDOR_VIA is not set | 519 | # CONFIG_NET_VENDOR_VIA is not set |
| 512 | # CONFIG_NET_VENDOR_WIZNET is not set | 520 | # CONFIG_NET_VENDOR_WIZNET is not set |
| 521 | # CONFIG_NET_VENDOR_XILINX is not set | ||
| 513 | CONFIG_PPP=m | 522 | CONFIG_PPP=m |
| 514 | CONFIG_PPP_BSDCOMP=m | 523 | CONFIG_PPP_BSDCOMP=m |
| 515 | CONFIG_PPP_DEFLATE=m | 524 | CONFIG_PPP_DEFLATE=m |
| @@ -557,6 +566,8 @@ CONFIG_VFIO_MDEV_DEVICE=m · 41 unmodified lines | |||
| 557 | CONFIG_VIRTIO_PCI=m | 566 | CONFIG_VIRTIO_PCI=m |
| 558 | CONFIG_VIRTIO_BALLOON=m | 567 | CONFIG_VIRTIO_BALLOON=m |
| 559 | CONFIG_VIRTIO_INPUT=y | 568 | CONFIG_VIRTIO_INPUT=y |
| 569 | CONFIG_VHOST_NET=m | ||
| 570 | CONFIG_VHOST_VSOCK=m | ||
| 560 | CONFIG_S390_CCW_IOMMU=y | 571 | CONFIG_S390_CCW_IOMMU=y |
| 561 | CONFIG_S390_AP_IOMMU=y | 572 | CONFIG_S390_AP_IOMMU=y |
| 562 | CONFIG_EXT4_FS=y | 573 | CONFIG_EXT4_FS=y |
| @@ -600,6 +611,7 @@ CONFIG_ZISOFS=y · 37 unmodified lines | |||
| 600 | CONFIG_UDF_FS=m | 611 | CONFIG_UDF_FS=m |
| 601 | CONFIG_MSDOS_FS=m | 612 | CONFIG_MSDOS_FS=m |
| 602 | CONFIG_VFAT_FS=m | 613 | CONFIG_VFAT_FS=m |
| 614 | CONFIG_EXFAT_FS=m | ||
| 603 | CONFIG_NTFS_FS=m | 615 | CONFIG_NTFS_FS=m |
| 604 | CONFIG_NTFS_RW=y | 616 | CONFIG_NTFS_RW=y |
| 605 | CONFIG_PROC_KCORE=y | 617 | CONFIG_PROC_KCORE=y |
| @@ -642,8 +654,8 @@ CONFIG_NLS_UTF8=m · 36 unmodified lines | |||
| 642 | CONFIG_DLM=m | 654 | CONFIG_DLM=m |
| 643 | CONFIG_UNICODE=y | 655 | CONFIG_UNICODE=y |
| 644 | CONFIG_PERSISTENT_KEYRINGS=y | 656 | CONFIG_PERSISTENT_KEYRINGS=y |
| 645 | CONFIG_BIG_KEYS=y | ||
| 646 | CONFIG_ENCRYPTED_KEYS=m | 657 | CONFIG_ENCRYPTED_KEYS=m |
| 658 | CONFIG_KEY_NOTIFICATIONS=y | ||
| 647 | CONFIG_SECURITY=y | 659 | CONFIG_SECURITY=y |
| 648 | CONFIG_SECURITY_NETWORK=y | 660 | CONFIG_SECURITY_NETWORK=y |
| 649 | CONFIG_SECURITY_SELINUX=y | 661 | CONFIG_SECURITY_SELINUX=y |
| @@ -667,8 +679,11 @@ CONFIG_CRYPTO_TEST=m · 17 unmodified lines | |||
| 667 | CONFIG_CRYPTO_DH=m | 679 | CONFIG_CRYPTO_DH=m |
| 668 | CONFIG_CRYPTO_ECDH=m | 680 | CONFIG_CRYPTO_ECDH=m |
| 669 | CONFIG_CRYPTO_ECRDSA=m | 681 | CONFIG_CRYPTO_ECRDSA=m |
| 682 | CONFIG_CRYPTO_CURVE25519=m | ||
| 683 | CONFIG_CRYPTO_GCM=y | ||
| 670 | CONFIG_CRYPTO_CHACHA20POLY1305=m | 684 | CONFIG_CRYPTO_CHACHA20POLY1305=m |
| 671 | CONFIG_CRYPTO_AEGIS128=m | 685 | CONFIG_CRYPTO_AEGIS128=m |
| 686 | CONFIG_CRYPTO_SEQIV=y | ||
| 672 | CONFIG_CRYPTO_CFB=m | 687 | CONFIG_CRYPTO_CFB=m |
| 673 | CONFIG_CRYPTO_LRW=m | 688 | CONFIG_CRYPTO_LRW=m |
| 674 | CONFIG_CRYPTO_OFB=m | 689 | CONFIG_CRYPTO_OFB=m |
| @@ -678,6 +693,7 @@ CONFIG_CRYPTO_ADIANTUM=m · 3 unmodified lines | |||
| 678 | CONFIG_CRYPTO_XCBC=m | 693 | CONFIG_CRYPTO_XCBC=m |
| 679 | CONFIG_CRYPTO_VMAC=m | 694 | CONFIG_CRYPTO_VMAC=m |
| 680 | CONFIG_CRYPTO_CRC32=m | 695 | CONFIG_CRYPTO_CRC32=m |
| 696 | CONFIG_CRYPTO_BLAKE2S=m | ||
| 681 | CONFIG_CRYPTO_MICHAEL_MIC=m | 697 | CONFIG_CRYPTO_MICHAEL_MIC=m |
| 682 | CONFIG_CRYPTO_RMD128=m | 698 | CONFIG_CRYPTO_RMD128=m |
| 683 | CONFIG_CRYPTO_RMD160=m | 699 | CONFIG_CRYPTO_RMD160=m |
| @@ -694,6 +710,7 @@ CONFIG_CRYPTO_BLOWFISH=m · 10 unmodified lines | |||
| 694 | CONFIG_CRYPTO_CAMELLIA=m | 710 | CONFIG_CRYPTO_CAMELLIA=m |
| 695 | CONFIG_CRYPTO_CAST5=m | 711 | CONFIG_CRYPTO_CAST5=m |
| 696 | CONFIG_CRYPTO_CAST6=m | 712 | CONFIG_CRYPTO_CAST6=m |
| 713 | CONFIG_CRYPTO_DES=m | ||
| 697 | CONFIG_CRYPTO_FCRYPT=m | 714 | CONFIG_CRYPTO_FCRYPT=m |
| 698 | CONFIG_CRYPTO_KHAZAD=m | 715 | CONFIG_CRYPTO_KHAZAD=m |
| 699 | CONFIG_CRYPTO_SALSA20=m | 716 | CONFIG_CRYPTO_SALSA20=m |
| @@ -712,6 +729,9 @@ CONFIG_CRYPTO_USER_API_SKCIPHER=m · 12 unmodified lines | |||
| 712 | CONFIG_CRYPTO_USER_API_RNG=m | 729 | CONFIG_CRYPTO_USER_API_RNG=m |
| 713 | CONFIG_CRYPTO_USER_API_AEAD=m | 730 | CONFIG_CRYPTO_USER_API_AEAD=m |
| 714 | CONFIG_CRYPTO_STATS=y | 731 | CONFIG_CRYPTO_STATS=y |
| 732 | CONFIG_CRYPTO_LIB_BLAKE2S=m | ||
| 733 | CONFIG_CRYPTO_LIB_CURVE25519=m | ||
| 734 | CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m | ||
| 715 | CONFIG_ZCRYPT=m | 735 | CONFIG_ZCRYPT=m |
| 716 | CONFIG_PKEY=m | 736 | CONFIG_PKEY=m |
| 717 | CONFIG_CRYPTO_PAES_S390=m | 737 | CONFIG_CRYPTO_PAES_S390=m |
| @@ -725,6 +745,7 @@ CONFIG_CRYPTO_AES_S390=m · 7 unmodified lines | |||
| 725 | CONFIG_CRYPTO_GHASH_S390=m | 745 | CONFIG_CRYPTO_GHASH_S390=m |
| 726 | CONFIG_CRYPTO_CRC32_S390=y | 746 | CONFIG_CRYPTO_CRC32_S390=y |
| 727 | CONFIG_CORDIC=m | 747 | CONFIG_CORDIC=m |
| 748 | CONFIG_PRIME_NUMBERS=m | ||
| 728 | CONFIG_CRC4=m | 749 | CONFIG_CRC4=m |
| 729 | CONFIG_CRC7=m | 750 | CONFIG_CRC7=m |
| 730 | CONFIG_CRC8=m | 751 | CONFIG_CRC8=m |
| @@ -739,10 +760,12 @@ CONFIG_DEBUG_SECTION_MISMATCH=y · 8 unmodified lines | |||
| 739 | CONFIG_MAGIC_SYSRQ=y | 760 | CONFIG_MAGIC_SYSRQ=y |
| 740 | CONFIG_DEBUG_MEMORY_INIT=y | 761 | CONFIG_DEBUG_MEMORY_INIT=y |
| 741 | CONFIG_PANIC_ON_OOPS=y | 762 | CONFIG_PANIC_ON_OOPS=y |
| 763 | CONFIG_TEST_LOCKUP=m | ||
| 742 | CONFIG_BUG_ON_DATA_CORRUPTION=y | 764 | CONFIG_BUG_ON_DATA_CORRUPTION=y |
| 743 | CONFIG_RCU_TORTURE_TEST=m | 765 | CONFIG_RCU_TORTURE_TEST=m |
| 744 | CONFIG_RCU_CPU_STALL_TIMEOUT=60 | 766 | CONFIG_RCU_CPU_STALL_TIMEOUT=60 |
| 745 | CONFIG_LATENCYTOP=y | 767 | CONFIG_LATENCYTOP=y |
| 768 | CONFIG_BOOTTIME_TRACING=y | ||
| 746 | CONFIG_FUNCTION_PROFILER=y | 769 | CONFIG_FUNCTION_PROFILER=y |
| 747 | CONFIG_STACK_TRACER=y | 770 | CONFIG_STACK_TRACER=y |
| 748 | CONFIG_SCHED_TRACER=y | 771 | CONFIG_SCHED_TRACER=y |
| @@ -30,6 +30,7 @@ CONFIG_IBM_PARTITION=y · 29 unmodified lines | |||
| 30 | # CONFIG_BOUNCE is not set | 30 | # CONFIG_BOUNCE is not set |
| 31 | CONFIG_NET=y | 31 | CONFIG_NET=y |
| 32 | # CONFIG_IUCV is not set | 32 | # CONFIG_IUCV is not set |
| 33 | # CONFIG_ETHTOOL_NETLINK is not set | ||
| 33 | CONFIG_DEVTMPFS=y | 34 | CONFIG_DEVTMPFS=y |
| 34 | CONFIG_BLK_DEV_RAM=y | 35 | CONFIG_BLK_DEV_RAM=y |
| 35 | # CONFIG_BLK_DEV_XPRAM is not set | 36 | # CONFIG_BLK_DEV_XPRAM is not set |
| @@ -55,6 +56,8 @@ CONFIG_RAW_DRIVER=y · 19 unmodified lines | |||
| 55 | # CONFIG_MONWRITER is not set | 56 | # CONFIG_MONWRITER is not set |
| 56 | # CONFIG_S390_VMUR is not set | 57 | # CONFIG_S390_VMUR is not set |
| 57 | # CONFIG_HID is not set | 58 | # CONFIG_HID is not set |
| 59 | # CONFIG_VIRTIO_MENU is not set | ||
| 60 | # CONFIG_VHOST_MENU is not set | ||
| 58 | # CONFIG_IOMMU_SUPPORT is not set | 61 | # CONFIG_IOMMU_SUPPORT is not set |
| 59 | # CONFIG_DNOTIFY is not set | 62 | # CONFIG_DNOTIFY is not set |
| 60 | # CONFIG_INOTIFY_USER is not set | 63 | # CONFIG_INOTIFY_USER is not set |
| @@ -62,7 +65,9 @@ CONFIG_CONFIGFS_FS=y · 1 unmodified line | |||
| 62 | # CONFIG_MISC_FILESYSTEMS is not set | 65 | # CONFIG_MISC_FILESYSTEMS is not set |
| 63 | # CONFIG_NETWORK_FILESYSTEMS is not set | 66 | # CONFIG_NETWORK_FILESYSTEMS is not set |
| 64 | CONFIG_LSM="yama,loadpin,safesetid,integrity" | 67 | CONFIG_LSM="yama,loadpin,safesetid,integrity" |
| 68 | # CONFIG_ZLIB_DFLTCC is not set | ||
| 65 | CONFIG_PRINTK_TIME=y | 69 | CONFIG_PRINTK_TIME=y |
| 70 | # CONFIG_SYMBOLIC_ERRNAME is not set | ||
| 66 | CONFIG_DEBUG_INFO=y | 71 | CONFIG_DEBUG_INFO=y |
| 67 | CONFIG_DEBUG_FS=y | 72 | CONFIG_DEBUG_FS=y |
| 68 | CONFIG_DEBUG_KERNEL=y | 73 | CONFIG_DEBUG_KERNEL=y |
| @@ -31,12 +31,12 @@ · 30 unmodified lines | |||
| 31 | #define KVM_USER_MEM_SLOTS 32 | 31 | #define KVM_USER_MEM_SLOTS 32 |
| 32 | 32 | ||
| 33 | /* | 33 | /* |
| 34 | * These seem to be used for allocating ->chip in the routing table, | 34 | * These seem to be used for allocating ->chip in the routing table, which we |
| 35 | * which we don't use. 4096 is an out-of-thin-air value. If we need | 35 | * don't use. 1 is as small as we can get to reduce the needed memory. If we |
| 36 | * to look at ->chip later on, we'll need to revisit this. | 36 | * need to look at ->chip later on, we'll need to revisit this. |
| 37 | */ | 37 | */ |
| 38 | #define KVM_NR_IRQCHIPS 1 | 38 | #define KVM_NR_IRQCHIPS 1 |
| 39 | #define KVM_IRQCHIP_NUM_PINS 4096 | 39 | #define KVM_IRQCHIP_NUM_PINS 1 |
| 40 | #define KVM_HALT_POLL_NS_DEFAULT 50000 | 40 | #define KVM_HALT_POLL_NS_DEFAULT 50000 |
| 41 | 41 | ||
| 42 | /* s390-specific vcpu->requests bit members */ | 42 | /* s390-specific vcpu->requests bit members */ |
| @@ -198,9 +198,10 @@ static debug_entry_t ***debug_areas_alloc(int pages_per_area, int nr_areas) · 197 unmodified lines | |||
| 198 | if (!areas) | 198 | if (!areas) |
| 199 | goto fail_malloc_areas; | 199 | goto fail_malloc_areas; |
| 200 | for (i = 0; i < nr_areas; i++) { | 200 | for (i = 0; i < nr_areas; i++) { |
| 201 | /* GFP_NOWARN to avoid user triggerable WARN, we handle fails */ | ||
| 201 | areas[i] = kmalloc_array(pages_per_area, | 202 | areas[i] = kmalloc_array(pages_per_area, |
| 202 | sizeof(debug_entry_t *), | 203 | sizeof(debug_entry_t *), |
| 203 | GFP_KERNEL); | 204 | GFP_KERNEL | __GFP_NOWARN); |
| 204 | if (!areas[i]) | 205 | if (!areas[i]) |
| 205 | goto fail_malloc_areas2; | 206 | goto fail_malloc_areas2; |
| 206 | for (j = 0; j < pages_per_area; j++) { | 207 | for (j = 0; j < pages_per_area; j++) { |
| @@ -170,6 +170,8 @@ static noinline __init void setup_lowcore_early(void) · 169 unmodified lines | |||
| 170 | psw_t psw; | 170 | psw_t psw; |
| 171 | 171 | ||
| 172 | psw.mask = PSW_MASK_BASE | PSW_DEFAULT_KEY | PSW_MASK_EA | PSW_MASK_BA; | 172 | psw.mask = PSW_MASK_BASE | PSW_DEFAULT_KEY | PSW_MASK_EA | PSW_MASK_BA; |
| 173 | if (IS_ENABLED(CONFIG_KASAN)) | ||
| 174 | psw.mask |= PSW_MASK_DAT; | ||
| 173 | psw.addr = (unsigned long) s390_base_ext_handler; | 175 | psw.addr = (unsigned long) s390_base_ext_handler; |
| 174 | S390_lowcore.external_new_psw = psw; | 176 | S390_lowcore.external_new_psw = psw; |
| 175 | psw.addr = (unsigned long) s390_base_pgm_handler; | 177 | psw.addr = (unsigned long) s390_base_pgm_handler; |
| @@ -378,9 +378,9 @@ ENTRY(system_call) · 377 unmodified lines | |||
| 378 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC | 378 | stmg %r8,%r15,__LC_SAVE_AREA_SYNC |
| 379 | BPOFF | 379 | BPOFF |
| 380 | lg %r12,__LC_CURRENT | 380 | lg %r12,__LC_CURRENT |
| 381 | lghi %r13,__TASK_thread | ||
| 382 | lghi %r14,_PIF_SYSCALL | 381 | lghi %r14,_PIF_SYSCALL |
| 383 | .Lsysc_per: | 382 | .Lsysc_per: |
| 383 | lghi %r13,__TASK_thread | ||
| 384 | lg %r15,__LC_KERNEL_STACK | 384 | lg %r15,__LC_KERNEL_STACK |
| 385 | la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs | 385 | la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs |
| 386 | UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER | 386 | UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER |
| @@ -881,12 +881,21 @@ out: · 880 unmodified lines | |||
| 881 | return err; | 881 | return err; |
| 882 | } | 882 | } |
| 883 | 883 | ||
| 884 | static bool is_callchain_event(struct perf_event *event) | ||
| 885 | { | ||
| 886 | u64 sample_type = event->attr.sample_type; | ||
| 887 | |||
| 888 | return sample_type & (PERF_SAMPLE_CALLCHAIN | PERF_SAMPLE_REGS_USER | | ||
| 889 | PERF_SAMPLE_STACK_USER); | ||
| 890 | } | ||
| 891 | |||
| 884 | static int cpumsf_pmu_event_init(struct perf_event *event) | 892 | static int cpumsf_pmu_event_init(struct perf_event *event) |
| 885 | { | 893 | { |
| 886 | int err; | 894 | int err; |
| 887 | 895 | ||
| 888 | /* No support for taken branch sampling */ | 896 | /* No support for taken branch sampling */ |
| 889 | if (has_branch_stack(event)) | 897 | /* No support for callchain, stacks and registers */ |
| 898 | if (has_branch_stack(event) || is_callchain_event(event)) | ||
| 890 | return -EOPNOTSUPP; | 899 | return -EOPNOTSUPP; |
| 891 | 900 | ||
| 892 | switch (event->attr.type) { | 901 | switch (event->attr.type) { |
| @@ -1100,6 +1100,7 @@ void __init setup_arch(char **cmdline_p) · 1099 unmodified lines | |||
| 1100 | if (IS_ENABLED(CONFIG_EXPOLINE_AUTO)) | 1100 | if (IS_ENABLED(CONFIG_EXPOLINE_AUTO)) |
| 1101 | nospec_auto_detect(); | 1101 | nospec_auto_detect(); |
| 1102 | 1102 | ||
| 1103 | jump_label_init(); | ||
| 1103 | parse_early_param(); | 1104 | parse_early_param(); |
| 1104 | #ifdef CONFIG_CRASH_DUMP | 1105 | #ifdef CONFIG_CRASH_DUMP |
| 1105 | /* Deactivate elfcorehdr= kernel parameter */ | 1106 | /* Deactivate elfcorehdr= kernel parameter */ |
| @@ -117,7 +117,7 @@ static inline pte_t __rste_to_pte(unsigned long rste) · 116 unmodified lines | |||
| 117 | _PAGE_YOUNG); | 117 | _PAGE_YOUNG); |
| 118 | #ifdef CONFIG_MEM_SOFT_DIRTY | 118 | #ifdef CONFIG_MEM_SOFT_DIRTY |
| 119 | pte_val(pte) |= move_set_bit(rste, _SEGMENT_ENTRY_SOFT_DIRTY, | 119 | pte_val(pte) |= move_set_bit(rste, _SEGMENT_ENTRY_SOFT_DIRTY, |
| 120 | _PAGE_DIRTY); | 120 | _PAGE_SOFT_DIRTY); |
| 121 | #endif | 121 | #endif |
| 122 | pte_val(pte) |= move_set_bit(rste, _SEGMENT_ENTRY_NOEXEC, | 122 | pte_val(pte) |= move_set_bit(rste, _SEGMENT_ENTRY_NOEXEC, |
| 123 | _PAGE_NOEXEC); | 123 | _PAGE_NOEXEC); |
| @@ -62,11 +62,15 @@ notrace void *s390_kernel_write(void *dst, const void *src, size_t size) · 61 unmodified lines | |||
| 62 | long copied; | 62 | long copied; |
| 63 | 63 | ||
| 64 | spin_lock_irqsave(&s390_kernel_write_lock, flags); | 64 | spin_lock_irqsave(&s390_kernel_write_lock, flags); |
| 65 | while (size) { | 65 | if (!(flags & PSW_MASK_DAT)) { |
| 66 | copied = s390_kernel_write_odd(tmp, src, size); | 66 | memcpy(dst, src, size); |
| 67 | tmp += copied; | 67 | } else { |
| 68 | src += copied; | 68 | while (size) { |
| 69 | size -= copied; | 69 | copied = s390_kernel_write_odd(tmp, src, size); |
| 70 | tmp += copied; | ||
| 71 | src += copied; | ||
| 72 | size -= copied; | ||
| 73 | } | ||
| 70 | } | 74 | } |
| 71 | spin_unlock_irqrestore(&s390_kernel_write_lock, flags); | 75 | spin_unlock_irqrestore(&s390_kernel_write_lock, flags); |
| 72 | 76 | ||
| @@ -94,7 +94,18 @@ static void __zpci_event_availability(struct zpci_ccdf_avail *ccdf) · 93 unmodified lines | |||
| 94 | } | 94 | } |
| 95 | zdev->fh = ccdf->fh; | 95 | zdev->fh = ccdf->fh; |
| 96 | zdev->state = ZPCI_FN_STATE_CONFIGURED; | 96 | zdev->state = ZPCI_FN_STATE_CONFIGURED; |
| 97 | zpci_create_device(zdev); | 97 | ret = zpci_enable_device(zdev); |
| 98 | if (ret) | ||
| 99 | break; | ||
| 100 | |||
| 101 | pdev = pci_scan_single_device(zdev->zbus->bus, zdev->devfn); | ||
| 102 | if (!pdev) | ||
| 103 | break; | ||
| 104 | |||
| 105 | pci_bus_add_device(pdev); | ||
| 106 | pci_lock_rescan_remove(); | ||
| 107 | pci_bus_add_devices(zdev->zbus->bus); | ||
| 108 | pci_unlock_rescan_remove(); | ||
| 98 | break; | 109 | break; |
| 99 | case 0x0302: /* Reserved -> Standby */ | 110 | case 0x0302: /* Reserved -> Standby */ |
| 100 | if (!zdev) { | 111 | if (!zdev) { |
| @@ -67,7 +67,7 @@ config X86 · 66 unmodified lines | |||
| 67 | select ARCH_HAS_FILTER_PGPROT | 67 | select ARCH_HAS_FILTER_PGPROT |
| 68 | select ARCH_HAS_FORTIFY_SOURCE | 68 | select ARCH_HAS_FORTIFY_SOURCE |
| 69 | select ARCH_HAS_GCOV_PROFILE_ALL | 69 | select ARCH_HAS_GCOV_PROFILE_ALL |
| 70 | select ARCH_HAS_KCOV if X86_64 | 70 | select ARCH_HAS_KCOV if X86_64 && STACK_VALIDATION |
| 71 | select ARCH_HAS_MEM_ENCRYPT | 71 | select ARCH_HAS_MEM_ENCRYPT |
| 72 | select ARCH_HAS_MEMBARRIER_SYNC_CORE | 72 | select ARCH_HAS_MEMBARRIER_SYNC_CORE |
| 73 | select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE | 73 | select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE |
| @@ -90,8 +90,8 @@ endif · 89 unmodified lines | |||
| 90 | 90 | ||
| 91 | vmlinux-objs-$(CONFIG_ACPI) += $(obj)/acpi.o | 91 | vmlinux-objs-$(CONFIG_ACPI) += $(obj)/acpi.o |
| 92 | 92 | ||
| 93 | vmlinux-objs-$(CONFIG_EFI_STUB) += $(objtree)/drivers/firmware/efi/libstub/lib.a | ||
| 94 | vmlinux-objs-$(CONFIG_EFI_MIXED) += $(obj)/efi_thunk_$(BITS).o | 93 | vmlinux-objs-$(CONFIG_EFI_MIXED) += $(obj)/efi_thunk_$(BITS).o |
| 94 | efi-obj-$(CONFIG_EFI_STUB) = $(objtree)/drivers/firmware/efi/libstub/lib.a | ||
| 95 | 95 | ||
| 96 | # The compressed kernel is built with -fPIC/-fPIE so that a boot loader | 96 | # The compressed kernel is built with -fPIC/-fPIE so that a boot loader |
| 97 | # can place it anywhere in memory and it will still run. However, since | 97 | # can place it anywhere in memory and it will still run. However, since |
| @@ -115,7 +115,7 @@ endef · 17 unmodified lines | |||
| 115 | quiet_cmd_check-and-link-vmlinux = LD $@ | 115 | quiet_cmd_check-and-link-vmlinux = LD $@ |
| 116 | cmd_check-and-link-vmlinux = $(cmd_check_data_rel); $(cmd_ld) | 116 | cmd_check-and-link-vmlinux = $(cmd_check_data_rel); $(cmd_ld) |
| 117 | 117 | ||
| 118 | $(obj)/vmlinux: $(vmlinux-objs-y) FORCE | 118 | $(obj)/vmlinux: $(vmlinux-objs-y) $(efi-obj-y) FORCE |
| 119 | $(call if_changed,check-and-link-vmlinux) | 119 | $(call if_changed,check-and-link-vmlinux) |
| 120 | 120 | ||
| 121 | OBJCOPYFLAGS_vmlinux.bin := -R .comment -S | 121 | OBJCOPYFLAGS_vmlinux.bin := -R .comment -S |
| @@ -213,7 +213,6 @@ SYM_FUNC_START(startup_32) · 212 unmodified lines | |||
| 213 | * We place all of the values on our mini stack so lret can | 213 | * We place all of the values on our mini stack so lret can |
| 214 | * used to perform that far jump. | 214 | * used to perform that far jump. |
| 215 | */ | 215 | */ |
| 216 | pushl $__KERNEL_CS | ||
| 217 | leal startup_64(%ebp), %eax | 216 | leal startup_64(%ebp), %eax |
| 218 | #ifdef CONFIG_EFI_MIXED | 217 | #ifdef CONFIG_EFI_MIXED |
| 219 | movl efi32_boot_args(%ebp), %edi | 218 | movl efi32_boot_args(%ebp), %edi |
| @@ -224,11 +223,20 @@ SYM_FUNC_START(startup_32) · 4 unmodified lines | |||
| 224 | movl efi32_boot_args+8(%ebp), %edx // saved bootparams pointer | 223 | movl efi32_boot_args+8(%ebp), %edx // saved bootparams pointer |
| 225 | cmpl $0, %edx | 224 | cmpl $0, %edx |
| 226 | jnz 1f | 225 | jnz 1f |
| 226 | /* | ||
| 227 | * efi_pe_entry uses MS calling convention, which requires 32 bytes of | ||
| 228 | * shadow space on the stack even if all arguments are passed in | ||
| 229 | * registers. We also need an additional 8 bytes for the space that | ||
| 230 | * would be occupied by the return address, and this also results in | ||
| 231 | * the correct stack alignment for entry. | ||
| 232 | */ | ||
| 233 | subl $40, %esp | ||
| 227 | leal efi_pe_entry(%ebp), %eax | 234 | leal efi_pe_entry(%ebp), %eax |
| 228 | movl %edi, %ecx // MS calling convention | 235 | movl %edi, %ecx // MS calling convention |
| 229 | movl %esi, %edx | 236 | movl %esi, %edx |
| 230 | 1: | 237 | 1: |
| 231 | #endif | 238 | #endif |
| 239 | pushl $__KERNEL_CS | ||
| 232 | pushl %eax | 240 | pushl %eax |
| 233 | 241 | ||
| 234 | /* Enter paged protected Mode, activating Long Mode */ | 242 | /* Enter paged protected Mode, activating Long Mode */ |
| @@ -784,6 +792,7 @@ SYM_DATA_LOCAL(boot_heap, .fill BOOT_HEAP_SIZE, 1, 0) · 549 unmodified lines | |||
| 784 | 792 | ||
| 785 | SYM_DATA_START_LOCAL(boot_stack) | 793 | SYM_DATA_START_LOCAL(boot_stack) |
| 786 | .fill BOOT_STACK_SIZE, 1, 0 | 794 | .fill BOOT_STACK_SIZE, 1, 0 |
| 795 | .balign 16 | ||
| 787 | SYM_DATA_END_LABEL(boot_stack, SYM_L_LOCAL, boot_stack_end) | 796 | SYM_DATA_END_LABEL(boot_stack, SYM_L_LOCAL, boot_stack_end) |
| 788 | 797 | ||
| 789 | /* | 798 | /* |
| @@ -7,12 +7,20 @@ KASAN_SANITIZE := n · 6 unmodified lines | |||
| 7 | UBSAN_SANITIZE := n | 7 | UBSAN_SANITIZE := n |
| 8 | KCOV_INSTRUMENT := n | 8 | KCOV_INSTRUMENT := n |
| 9 | 9 | ||
| 10 | CFLAGS_REMOVE_common.o = $(CC_FLAGS_FTRACE) -fstack-protector -fstack-protector-strong | 10 | CFLAGS_REMOVE_common.o = $(CC_FLAGS_FTRACE) |
| 11 | CFLAGS_REMOVE_syscall_32.o = $(CC_FLAGS_FTRACE) -fstack-protector -fstack-protector-strong | 11 | CFLAGS_REMOVE_syscall_64.o = $(CC_FLAGS_FTRACE) |
| 12 | CFLAGS_REMOVE_syscall_64.o = $(CC_FLAGS_FTRACE) -fstack-protector -fstack-protector-strong | 12 | CFLAGS_REMOVE_syscall_32.o = $(CC_FLAGS_FTRACE) |
| 13 | CFLAGS_REMOVE_syscall_x32.o = $(CC_FLAGS_FTRACE) | ||
| 14 | |||
| 15 | CFLAGS_common.o += -fno-stack-protector | ||
| 16 | CFLAGS_syscall_64.o += -fno-stack-protector | ||
| 17 | CFLAGS_syscall_32.o += -fno-stack-protector | ||
| 18 | CFLAGS_syscall_x32.o += -fno-stack-protector | ||
| 13 | 19 | ||
| 14 | CFLAGS_syscall_64.o += $(call cc-option,-Wno-override-init,) | 20 | CFLAGS_syscall_64.o += $(call cc-option,-Wno-override-init,) |
| 15 | CFLAGS_syscall_32.o += $(call cc-option,-Wno-override-init,) | 21 | CFLAGS_syscall_32.o += $(call cc-option,-Wno-override-init,) |
| 22 | CFLAGS_syscall_x32.o += $(call cc-option,-Wno-override-init,) | ||
| 23 | |||
| 16 | obj-y := entry_$(BITS).o thunk_$(BITS).o syscall_$(BITS).o | 24 | obj-y := entry_$(BITS).o thunk_$(BITS).o syscall_$(BITS).o |
| 17 | obj-y += common.o | 25 | obj-y += common.o |
| 18 | 26 | ||
| @@ -45,6 +45,32 @@ · 44 unmodified lines | |||
| 45 | #define CREATE_TRACE_POINTS | 45 | #define CREATE_TRACE_POINTS |
| 46 | #include <trace/events/syscalls.h> | 46 | #include <trace/events/syscalls.h> |
| 47 | 47 | ||
| 48 | /* Check that the stack and regs on entry from user mode are sane. */ | ||
| 49 | static noinstr void check_user_regs(struct pt_regs *regs) | ||
| 50 | { | ||
| 51 | if (IS_ENABLED(CONFIG_DEBUG_ENTRY)) { | ||
| 52 | /* | ||
| 53 | * Make sure that the entry code gave us a sensible EFLAGS | ||
| 54 | * register. Native because we want to check the actual CPU | ||
| 55 | * state, not the interrupt state as imagined by Xen. | ||
| 56 | */ | ||
| 57 | unsigned long flags = native_save_fl(); | ||
| 58 | WARN_ON_ONCE(flags & (X86_EFLAGS_AC | X86_EFLAGS_DF | | ||
| 59 | X86_EFLAGS_NT)); | ||
| 60 | |||
| 61 | /* We think we came from user mode. Make sure pt_regs agrees. */ | ||
| 62 | WARN_ON_ONCE(!user_mode(regs)); | ||
| 63 | |||
| 64 | /* | ||
| 65 | * All entries from user mode (except #DF) should be on the | ||
| 66 | * normal thread stack and should have user pt_regs in the | ||
| 67 | * correct location. | ||
| 68 | */ | ||
| 69 | WARN_ON_ONCE(!on_thread_stack()); | ||
| 70 | WARN_ON_ONCE(regs != task_pt_regs(current)); | ||
| 71 | } | ||
| 72 | } | ||
| 73 | |||
| 48 | #ifdef CONFIG_CONTEXT_TRACKING | 74 | #ifdef CONFIG_CONTEXT_TRACKING |
| 49 | /** | 75 | /** |
| 50 | * enter_from_user_mode - Establish state when coming from user mode | 76 | * enter_from_user_mode - Establish state when coming from user mode |
| @@ -127,9 +153,6 @@ static long syscall_trace_enter(struct pt_regs *regs) · 76 unmodified lines | |||
| 127 | unsigned long ret = 0; | 153 | unsigned long ret = 0; |
| 128 | u32 work; | 154 | u32 work; |
| 129 | 155 | ||
| 130 | if (IS_ENABLED(CONFIG_DEBUG_ENTRY)) | ||
| 131 | BUG_ON(regs != task_pt_regs(current)); | ||
| 132 | |||
| 133 | work = READ_ONCE(ti->flags); | 156 | work = READ_ONCE(ti->flags); |
| 134 | 157 | ||
| 135 | if (work & (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_EMU)) { | 158 | if (work & (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_EMU)) { |
| @@ -271,7 +294,7 @@ static void __prepare_exit_to_usermode(struct pt_regs *regs) · 135 unmodified lines | |||
| 271 | #endif | 294 | #endif |
| 272 | } | 295 | } |
| 273 | 296 | ||
| 274 | __visible noinstr void prepare_exit_to_usermode(struct pt_regs *regs) | 297 | static noinstr void prepare_exit_to_usermode(struct pt_regs *regs) |
| 275 | { | 298 | { |
| 276 | instrumentation_begin(); | 299 | instrumentation_begin(); |
| 277 | __prepare_exit_to_usermode(regs); | 300 | __prepare_exit_to_usermode(regs); |
| @@ -346,6 +369,8 @@ __visible noinstr void do_syscall_64(unsigned long nr, struct pt_regs *regs) · 68 unmodified lines | |||
| 346 | { | 369 | { |
| 347 | struct thread_info *ti; | 370 | struct thread_info *ti; |
| 348 | 371 | ||
| 372 | check_user_regs(regs); | ||
| 373 | |||
| 349 | enter_from_user_mode(); | 374 | enter_from_user_mode(); |
| 350 | instrumentation_begin(); | 375 | instrumentation_begin(); |
| 351 | 376 | ||
| @@ -409,6 +434,8 @@ static void do_syscall_32_irqs_on(struct pt_regs *regs) · 57 unmodified lines | |||
| 409 | /* Handles int $0x80 */ | 434 | /* Handles int $0x80 */ |
| 410 | __visible noinstr void do_int80_syscall_32(struct pt_regs *regs) | 435 | __visible noinstr void do_int80_syscall_32(struct pt_regs *regs) |
| 411 | { | 436 | { |
| 437 | check_user_regs(regs); | ||
| 438 | |||
| 412 | enter_from_user_mode(); | 439 | enter_from_user_mode(); |
| 413 | instrumentation_begin(); | 440 | instrumentation_begin(); |
| 414 | 441 | ||
| @@ -460,6 +487,8 @@ __visible noinstr long do_fast_syscall_32(struct pt_regs *regs) · 45 unmodified lines | |||
| 460 | vdso_image_32.sym_int80_landing_pad; | 487 | vdso_image_32.sym_int80_landing_pad; |
| 461 | bool success; | 488 | bool success; |
| 462 | 489 | ||
| 490 | check_user_regs(regs); | ||
| 491 | |||
| 463 | /* | 492 | /* |
| 464 | * SYSENTER loses EIP, and even SYSCALL32 needs us to skip forward | 493 | * SYSENTER loses EIP, and even SYSCALL32 needs us to skip forward |
| 465 | * so that 'regs->ip -= 2' lands back on an int $0x80 instruction. | 494 | * so that 'regs->ip -= 2' lands back on an int $0x80 instruction. |
| @@ -510,6 +539,18 @@ __visible noinstr long do_fast_syscall_32(struct pt_regs *regs) · 44 unmodified lines | |||
| 510 | (regs->flags & (X86_EFLAGS_RF | X86_EFLAGS_TF | X86_EFLAGS_VM)) == 0; | 539 | (regs->flags & (X86_EFLAGS_RF | X86_EFLAGS_TF | X86_EFLAGS_VM)) == 0; |
| 511 | #endif | 540 | #endif |
| 512 | } | 541 | } |
| 542 | |||
| 543 | /* Returns 0 to return using IRET or 1 to return using SYSEXIT/SYSRETL. */ | ||
| 544 | __visible noinstr long do_SYSENTER_32(struct pt_regs *regs) | ||
| 545 | { | ||
| 546 | /* SYSENTER loses RSP, but the vDSO saved it in RBP. */ | ||
| 547 | regs->sp = regs->bp; | ||
| 548 | |||
| 549 | /* SYSENTER clobbers EFLAGS.IF. Assume it was set in usermode. */ | ||
| 550 | regs->flags |= X86_EFLAGS_IF; | ||
| 551 | |||
| 552 | return do_fast_syscall_32(regs); | ||
| 553 | } | ||
| 513 | #endif | 554 | #endif |
| 514 | 555 | ||
| 515 | SYSCALL_DEFINE0(ni_syscall) | 556 | SYSCALL_DEFINE0(ni_syscall) |
| @@ -553,6 +594,7 @@ SYSCALL_DEFINE0(ni_syscall) · 37 unmodified lines | |||
| 553 | bool noinstr idtentry_enter_cond_rcu(struct pt_regs *regs) | 594 | bool noinstr idtentry_enter_cond_rcu(struct pt_regs *regs) |
| 554 | { | 595 | { |
| 555 | if (user_mode(regs)) { | 596 | if (user_mode(regs)) { |
| 597 | check_user_regs(regs); | ||
| 556 | enter_from_user_mode(); | 598 | enter_from_user_mode(); |
| 557 | return false; | 599 | return false; |
| 558 | } | 600 | } |
| @@ -686,6 +728,7 @@ void noinstr idtentry_exit_cond_rcu(struct pt_regs *regs, bool rcu_exit) · 127 unmodified lines | |||
| 686 | */ | 728 | */ |
| 687 | void noinstr idtentry_enter_user(struct pt_regs *regs) | 729 | void noinstr idtentry_enter_user(struct pt_regs *regs) |
| 688 | { | 730 | { |
| 731 | check_user_regs(regs); | ||
| 689 | enter_from_user_mode(); | 732 | enter_from_user_mode(); |
| 690 | } | 733 | } |
| 691 | 734 | ||
| @@ -933,9 +933,8 @@ SYM_FUNC_START(entry_SYSENTER_32) · 932 unmodified lines | |||
| 933 | 933 | ||
| 934 | .Lsysenter_past_esp: | 934 | .Lsysenter_past_esp: |
| 935 | pushl $__USER_DS /* pt_regs->ss */ | 935 | pushl $__USER_DS /* pt_regs->ss */ |
| 936 | pushl %ebp /* pt_regs->sp (stashed in bp) */ | 936 | pushl $0 /* pt_regs->sp (placeholder) */ |
| 937 | pushfl /* pt_regs->flags (except IF = 0) */ | 937 | pushfl /* pt_regs->flags (except IF = 0) */ |
| 938 | orl $X86_EFLAGS_IF, (%esp) /* Fix IF */ | ||
| 939 | pushl $__USER_CS /* pt_regs->cs */ | 938 | pushl $__USER_CS /* pt_regs->cs */ |
| 940 | pushl $0 /* pt_regs->ip = 0 (placeholder) */ | 939 | pushl $0 /* pt_regs->ip = 0 (placeholder) */ |
| 941 | pushl %eax /* pt_regs->orig_ax */ | 940 | pushl %eax /* pt_regs->orig_ax */ |
| @@ -965,7 +964,7 @@ SYM_FUNC_START(entry_SYSENTER_32) · 23 unmodified lines | |||
| 965 | .Lsysenter_flags_fixed: | 964 | .Lsysenter_flags_fixed: |
| 966 | 965 | ||
| 967 | movl %esp, %eax | 966 | movl %esp, %eax |
| 968 | call do_fast_syscall_32 | 967 | call do_SYSENTER_32 |
| 969 | /* XEN PV guests always use IRET path */ | 968 | /* XEN PV guests always use IRET path */ |
| 970 | ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ | 969 | ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ |
| 971 | "jmp .Lsyscall_32_done", X86_FEATURE_XENPV | 970 | "jmp .Lsyscall_32_done", X86_FEATURE_XENPV |
| @@ -57,29 +57,30 @@ SYM_CODE_START(entry_SYSENTER_compat) · 56 unmodified lines | |||
| 57 | 57 | ||
| 58 | movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp | 58 | movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp |
| 59 | 59 | ||
| 60 | /* | ||
| 61 | * User tracing code (ptrace or signal handlers) might assume that | ||
| 62 | * the saved RAX contains a 32-bit number when we're invoking a 32-bit | ||
| 63 | * syscall. Just in case the high bits are nonzero, zero-extend | ||
| 64 | * the syscall number. (This could almost certainly be deleted | ||
| 65 | * with no ill effects.) | ||
| 66 | */ | ||
| 67 | movl %eax, %eax | ||
| 68 | |||
| 69 | /* Construct struct pt_regs on stack */ | 60 | /* Construct struct pt_regs on stack */ |
| 70 | pushq $__USER32_DS /* pt_regs->ss */ | 61 | pushq $__USER32_DS /* pt_regs->ss */ |
| 71 | pushq %rbp /* pt_regs->sp (stashed in bp) */ | 62 | pushq $0 /* pt_regs->sp = 0 (placeholder) */ |
| 72 | 63 | ||
| 73 | /* | 64 | /* |
| 74 | * Push flags. This is nasty. First, interrupts are currently | 65 | * Push flags. This is nasty. First, interrupts are currently |
| 75 | * off, but we need pt_regs->flags to have IF set. Second, even | 66 | * off, but we need pt_regs->flags to have IF set. Second, if TS |
| 76 | * if TF was set when SYSENTER started, it's clear by now. We fix | 67 | * was set in usermode, it's still set, and we're singlestepping |
| 77 | * that later using TIF_SINGLESTEP. | 68 | * through this code. do_SYSENTER_32() will fix up IF. |
| 78 | */ | 69 | */ |
| 79 | pushfq /* pt_regs->flags (except IF = 0) */ | 70 | pushfq /* pt_regs->flags (except IF = 0) */ |
| 80 | orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */ | ||
| 81 | pushq $__USER32_CS /* pt_regs->cs */ | 71 | pushq $__USER32_CS /* pt_regs->cs */ |
| 82 | pushq $0 /* pt_regs->ip = 0 (placeholder) */ | 72 | pushq $0 /* pt_regs->ip = 0 (placeholder) */ |
| 73 | SYM_INNER_LABEL(entry_SYSENTER_compat_after_hwframe, SYM_L_GLOBAL) | ||
| 74 | |||
| 75 | /* | ||
| 76 | * User tracing code (ptrace or signal handlers) might assume that | ||
| 77 | * the saved RAX contains a 32-bit number when we're invoking a 32-bit | ||
| 78 | * syscall. Just in case the high bits are nonzero, zero-extend | ||
| 79 | * the syscall number. (This could almost certainly be deleted | ||
| 80 | * with no ill effects.) | ||
| 81 | */ | ||
| 82 | movl %eax, %eax | ||
| 83 | |||
| 83 | pushq %rax /* pt_regs->orig_ax */ | 84 | pushq %rax /* pt_regs->orig_ax */ |
| 84 | pushq %rdi /* pt_regs->di */ | 85 | pushq %rdi /* pt_regs->di */ |
| 85 | pushq %rsi /* pt_regs->si */ | 86 | pushq %rsi /* pt_regs->si */ |
| @@ -135,7 +136,7 @@ SYM_CODE_START(entry_SYSENTER_compat) · 49 unmodified lines | |||
| 135 | .Lsysenter_flags_fixed: | 136 | .Lsysenter_flags_fixed: |
| 136 | 137 | ||
| 137 | movq %rsp, %rdi | 138 | movq %rsp, %rdi |
| 138 | call do_fast_syscall_32 | 139 | call do_SYSENTER_32 |
| 139 | /* XEN PV guests always use IRET path */ | 140 | /* XEN PV guests always use IRET path */ |
| 140 | ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \ | 141 | ALTERNATIVE "testl %eax, %eax; jz swapgs_restore_regs_and_return_to_usermode", \ |
| 141 | "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV | 142 | "jmp swapgs_restore_regs_and_return_to_usermode", X86_FEATURE_XENPV |
| @@ -1,6 +1,6 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0-only | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | obj-y += core.o probe.o | 2 | obj-y += core.o probe.o |
| 3 | obj-$(PERF_EVENTS_INTEL_RAPL) += rapl.o | 3 | obj-$(CONFIG_PERF_EVENTS_INTEL_RAPL) += rapl.o |
| 4 | obj-y += amd/ | 4 | obj-y += amd/ |
| 5 | obj-$(CONFIG_X86_LOCAL_APIC) += msr.o | 5 | obj-$(CONFIG_X86_LOCAL_APIC) += msr.o |
| 6 | obj-$(CONFIG_CPU_SUP_INTEL) += intel/ | 6 | obj-$(CONFIG_CPU_SUP_INTEL) += intel/ |
| @@ -375,7 +375,10 @@ void __init hyperv_init(void) · 374 unmodified lines | |||
| 375 | guest_id = generate_guest_id(0, LINUX_VERSION_CODE, 0); | 375 | guest_id = generate_guest_id(0, LINUX_VERSION_CODE, 0); |
| 376 | wrmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id); | 376 | wrmsrl(HV_X64_MSR_GUEST_OS_ID, guest_id); |
| 377 | 377 | ||
| 378 | hv_hypercall_pg = vmalloc_exec(PAGE_SIZE); | 378 | hv_hypercall_pg = __vmalloc_node_range(PAGE_SIZE, 1, VMALLOC_START, |
| 379 | VMALLOC_END, GFP_KERNEL, PAGE_KERNEL_ROX, | ||
| 380 | VM_FLUSH_RESET_PERMS, NUMA_NO_NODE, | ||
| 381 | __builtin_return_address(0)); | ||
| 379 | if (hv_hypercall_pg == NULL) { | 382 | if (hv_hypercall_pg == NULL) { |
| 380 | wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0); | 383 | wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0); |
| 381 | goto remove_cpuhp_state; | 384 | goto remove_cpuhp_state; |
| @@ -201,12 +201,8 @@ arch_test_and_change_bit(long nr, volatile unsigned long *addr) · 200 unmodified lines | |||
| 201 | return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(btc), *addr, c, "Ir", nr); | 201 | return GEN_BINARY_RMWcc(LOCK_PREFIX __ASM_SIZE(btc), *addr, c, "Ir", nr); |
| 202 | } | 202 | } |
| 203 | 203 | ||
| 204 | static __no_kcsan_or_inline bool constant_test_bit(long nr, const volatile unsigned long *addr) | 204 | static __always_inline bool constant_test_bit(long nr, const volatile unsigned long *addr) |
| 205 | { | 205 | { |
| 206 | /* | ||
| 207 | * Because this is a plain access, we need to disable KCSAN here to | ||
| 208 | * avoid double instrumentation via instrumented bitops. | ||
| 209 | */ | ||
| 210 | return ((1UL << (nr & (BITS_PER_LONG-1))) & | 206 | return ((1UL << (nr & (BITS_PER_LONG-1))) & |
| 211 | (addr[nr >> _BITOPS_LONG_SHIFT])) != 0; | 207 | (addr[nr >> _BITOPS_LONG_SHIFT])) != 0; |
| 212 | } | 208 | } |
| @@ -75,6 +75,12 @@ do { \ · 74 unmodified lines | |||
| 75 | unreachable(); \ | 75 | unreachable(); \ |
| 76 | } while (0) | 76 | } while (0) |
| 77 | 77 | ||
| 78 | /* | ||
| 79 | * This instrumentation_begin() is strictly speaking incorrect; but it | ||
| 80 | * suppresses the complaints from WARN()s in noinstr code. If such a WARN() | ||
| 81 | * were to trigger, we'd rather wreck the machine in an attempt to get the | ||
| 82 | * message out than not know about it. | ||
| 83 | */ | ||
| 78 | #define __WARN_FLAGS(flags) \ | 84 | #define __WARN_FLAGS(flags) \ |
| 79 | do { \ | 85 | do { \ |
| 80 | instrumentation_begin(); \ | 86 | instrumentation_begin(); \ |
| @@ -58,4 +58,9 @@ static inline bool handle_guest_split_lock(unsigned long ip) · 57 unmodified lines | |||
| 58 | return false; | 58 | return false; |
| 59 | } | 59 | } |
| 60 | #endif | 60 | #endif |
| 61 | #ifdef CONFIG_IA32_FEAT_CTL | ||
| 62 | void init_ia32_feat_ctl(struct cpuinfo_x86 *c); | ||
| 63 | #else | ||
| 64 | static inline void init_ia32_feat_ctl(struct cpuinfo_x86 *c) {} | ||
| 65 | #endif | ||
| 61 | #endif /* _ASM_X86_CPU_H */ | 66 | #endif /* _ASM_X86_CPU_H */ |
| @@ -11,5 +11,23 @@ extern cpumask_var_t cpu_sibling_setup_mask; · 10 unmodified lines | |||
| 11 | 11 | ||
| 12 | extern void setup_cpu_local_masks(void); | 12 | extern void setup_cpu_local_masks(void); |
| 13 | 13 | ||
| 14 | /* | ||
| 15 | * NMI and MCE exceptions need cpu_is_offline() _really_ early, | ||
| 16 | * provide an arch_ special for them to avoid instrumentation. | ||
| 17 | */ | ||
| 18 | #if NR_CPUS > 1 | ||
| 19 | static __always_inline bool arch_cpu_online(int cpu) | ||
| 20 | { | ||
| 21 | return arch_test_bit(cpu, cpumask_bits(cpu_online_mask)); | ||
| 22 | } | ||
| 23 | #else | ||
| 24 | static __always_inline bool arch_cpu_online(int cpu) | ||
| 25 | { | ||
| 26 | return cpu == 0; | ||
| 27 | } | ||
| 28 | #endif | ||
| 29 | |||
| 30 | #define arch_cpu_is_offline(cpu) unlikely(!arch_cpu_online(cpu)) | ||
| 31 | |||
| 14 | #endif /* __ASSEMBLY__ */ | 32 | #endif /* __ASSEMBLY__ */ |
| 15 | #endif /* _ASM_X86_CPUMASK_H */ | 33 | #endif /* _ASM_X86_CPUMASK_H */ |
| @@ -623,6 +623,11 @@ static inline void switch_fpu_finish(struct fpu *new_fpu) · 622 unmodified lines | |||
| 623 | * MXCSR and XCR definitions: | 623 | * MXCSR and XCR definitions: |
| 624 | */ | 624 | */ |
| 625 | 625 | ||
| 626 | static inline void ldmxcsr(u32 mxcsr) | ||
| 627 | { | ||
| 628 | asm volatile("ldmxcsr %0" :: "m" (mxcsr)); | ||
| 629 | } | ||
| 630 | |||
| 626 | extern unsigned int mxcsr_feature_mask; | 631 | extern unsigned int mxcsr_feature_mask; |
| 627 | 632 | ||
| 628 | #define XCR_XFEATURE_ENABLED_MASK 0x00000000 | 633 | #define XCR_XFEATURE_ENABLED_MASK 0x00000000 |
| @@ -353,10 +353,6 @@ static __always_inline void __##func(struct pt_regs *regs) · 352 unmodified lines | |||
| 353 | 353 | ||
| 354 | #else /* CONFIG_X86_64 */ | 354 | #else /* CONFIG_X86_64 */ |
| 355 | 355 | ||
| 356 | /* Maps to a regular IDTENTRY on 32bit for now */ | ||
| 357 | # define DECLARE_IDTENTRY_IST DECLARE_IDTENTRY | ||
| 358 | # define DEFINE_IDTENTRY_IST DEFINE_IDTENTRY | ||
| 359 | |||
| 360 | /** | 356 | /** |
| 361 | * DECLARE_IDTENTRY_DF - Declare functions for double fault 32bit variant | 357 | * DECLARE_IDTENTRY_DF - Declare functions for double fault 32bit variant |
| 362 | * @vector: Vector number (ignored for C) | 358 | * @vector: Vector number (ignored for C) |
| @@ -387,28 +383,18 @@ __visible noinstr void func(struct pt_regs *regs, \ · 24 unmodified lines | |||
| 387 | #endif /* !CONFIG_X86_64 */ | 383 | #endif /* !CONFIG_X86_64 */ |
| 388 | 384 | ||
| 389 | /* C-Code mapping */ | 385 | /* C-Code mapping */ |
| 386 | #define DECLARE_IDTENTRY_NMI DECLARE_IDTENTRY_RAW | ||
| 387 | #define DEFINE_IDTENTRY_NMI DEFINE_IDTENTRY_RAW | ||
| 388 | |||
| 389 | #ifdef CONFIG_X86_64 | ||
| 390 | #define DECLARE_IDTENTRY_MCE DECLARE_IDTENTRY_IST | 390 | #define DECLARE_IDTENTRY_MCE DECLARE_IDTENTRY_IST |
| 391 | #define DEFINE_IDTENTRY_MCE DEFINE_IDTENTRY_IST | 391 | #define DEFINE_IDTENTRY_MCE DEFINE_IDTENTRY_IST |
| 392 | #define DEFINE_IDTENTRY_MCE_USER DEFINE_IDTENTRY_NOIST | 392 | #define DEFINE_IDTENTRY_MCE_USER DEFINE_IDTENTRY_NOIST |
| 393 | 393 | ||
| 394 | #define DECLARE_IDTENTRY_NMI DECLARE_IDTENTRY_RAW | ||
| 395 | #define DEFINE_IDTENTRY_NMI DEFINE_IDTENTRY_RAW | ||
| 396 | |||
| 397 | #define DECLARE_IDTENTRY_DEBUG DECLARE_IDTENTRY_IST | 394 | #define DECLARE_IDTENTRY_DEBUG DECLARE_IDTENTRY_IST |
| 398 | #define DEFINE_IDTENTRY_DEBUG DEFINE_IDTENTRY_IST | 395 | #define DEFINE_IDTENTRY_DEBUG DEFINE_IDTENTRY_IST |
| 399 | #define DEFINE_IDTENTRY_DEBUG_USER DEFINE_IDTENTRY_NOIST | 396 | #define DEFINE_IDTENTRY_DEBUG_USER DEFINE_IDTENTRY_NOIST |
| 400 | 397 | #endif | |
| 401 | /** | ||
| 402 | * DECLARE_IDTENTRY_XEN - Declare functions for XEN redirect IDT entry points | ||
| 403 | * @vector: Vector number (ignored for C) | ||
| 404 | * @func: Function name of the entry point | ||
| 405 | * | ||
| 406 | * Used for xennmi and xendebug redirections. No DEFINE as this is all ASM | ||
| 407 | * indirection magic. | ||
| 408 | */ | ||
| 409 | #define DECLARE_IDTENTRY_XEN(vector, func) \ | ||
| 410 | asmlinkage void xen_asm_exc_xen##func(void); \ | ||
| 411 | asmlinkage void asm_exc_xen##func(void) | ||
| 412 | 398 | ||
| 413 | #else /* !__ASSEMBLY__ */ | 399 | #else /* !__ASSEMBLY__ */ |
| 414 | 400 | ||
| @@ -455,9 +441,6 @@ __visible noinstr void func(struct pt_regs *regs, \ · 40 unmodified lines | |||
| 455 | # define DECLARE_IDTENTRY_MCE(vector, func) \ | 441 | # define DECLARE_IDTENTRY_MCE(vector, func) \ |
| 456 | DECLARE_IDTENTRY(vector, func) | 442 | DECLARE_IDTENTRY(vector, func) |
| 457 | 443 | ||
| 458 | # define DECLARE_IDTENTRY_DEBUG(vector, func) \ | ||
| 459 | DECLARE_IDTENTRY(vector, func) | ||
| 460 | |||
| 461 | /* No ASM emitted for DF as this goes through a C shim */ | 444 | /* No ASM emitted for DF as this goes through a C shim */ |
| 462 | # define DECLARE_IDTENTRY_DF(vector, func) | 445 | # define DECLARE_IDTENTRY_DF(vector, func) |
| 463 | 446 | ||
| @@ -469,10 +452,6 @@ __visible noinstr void func(struct pt_regs *regs, \ · 5 unmodified lines | |||
| 469 | /* No ASM code emitted for NMI */ | 452 | /* No ASM code emitted for NMI */ |
| 470 | #define DECLARE_IDTENTRY_NMI(vector, func) | 453 | #define DECLARE_IDTENTRY_NMI(vector, func) |
| 471 | 454 | ||
| 472 | /* XEN NMI and DB wrapper */ | ||
| 473 | #define DECLARE_IDTENTRY_XEN(vector, func) \ | ||
| 474 | idtentry vector asm_exc_xen##func exc_##func has_error_code=0 | ||
| 475 | |||
| 476 | /* | 455 | /* |
| 477 | * ASM code to emit the common vector entry stubs where each stub is | 456 | * ASM code to emit the common vector entry stubs where each stub is |
| 478 | * packed into 8 bytes. | 457 | * packed into 8 bytes. |
| @@ -490,16 +469,15 @@ __visible noinstr void func(struct pt_regs *regs, \ · 11 unmodified lines | |||
| 490 | .align 8 | 469 | .align 8 |
| 491 | SYM_CODE_START(irq_entries_start) | 470 | SYM_CODE_START(irq_entries_start) |
| 492 | vector=FIRST_EXTERNAL_VECTOR | 471 | vector=FIRST_EXTERNAL_VECTOR |
| 493 | pos = . | ||
| 494 | .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) | 472 | .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) |
| 495 | UNWIND_HINT_IRET_REGS | 473 | UNWIND_HINT_IRET_REGS |
| 474 | 0 : | ||
| 496 | .byte 0x6a, vector | 475 | .byte 0x6a, vector |
| 497 | jmp asm_common_interrupt | 476 | jmp asm_common_interrupt |
| 498 | nop | 477 | nop |
| 499 | /* Ensure that the above is 8 bytes max */ | 478 | /* Ensure that the above is 8 bytes max */ |
| 500 | . = pos + 8 | 479 | . = 0b + 8 |
| 501 | pos=pos+8 | 480 | vector = vector+1 |
| 502 | vector=vector+1 | ||
| 503 | .endr | 481 | .endr |
| 504 | SYM_CODE_END(irq_entries_start) | 482 | SYM_CODE_END(irq_entries_start) |
| 505 | 483 | ||
| @@ -507,16 +485,15 @@ SYM_CODE_END(irq_entries_start) · 1 unmodified line | |||
| 507 | .align 8 | 485 | .align 8 |
| 508 | SYM_CODE_START(spurious_entries_start) | 486 | SYM_CODE_START(spurious_entries_start) |
| 509 | vector=FIRST_SYSTEM_VECTOR | 487 | vector=FIRST_SYSTEM_VECTOR |
| 510 | pos = . | ||
| 511 | .rept (NR_VECTORS - FIRST_SYSTEM_VECTOR) | 488 | .rept (NR_VECTORS - FIRST_SYSTEM_VECTOR) |
| 512 | UNWIND_HINT_IRET_REGS | 489 | UNWIND_HINT_IRET_REGS |
| 490 | 0 : | ||
| 513 | .byte 0x6a, vector | 491 | .byte 0x6a, vector |
| 514 | jmp asm_spurious_interrupt | 492 | jmp asm_spurious_interrupt |
| 515 | nop | 493 | nop |
| 516 | /* Ensure that the above is 8 bytes max */ | 494 | /* Ensure that the above is 8 bytes max */ |
| 517 | . = pos + 8 | 495 | . = 0b + 8 |
| 518 | pos=pos+8 | 496 | vector = vector+1 |
| 519 | vector=vector+1 | ||
| 520 | .endr | 497 | .endr |
| 521 | SYM_CODE_END(spurious_entries_start) | 498 | SYM_CODE_END(spurious_entries_start) |
| 522 | #endif | 499 | #endif |
| @@ -565,16 +542,28 @@ DECLARE_IDTENTRY_RAW(X86_TRAP_BP, exc_int3); · 42 unmodified lines | |||
| 565 | DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_PF, exc_page_fault); | 542 | DECLARE_IDTENTRY_RAW_ERRORCODE(X86_TRAP_PF, exc_page_fault); |
| 566 | 543 | ||
| 567 | #ifdef CONFIG_X86_MCE | 544 | #ifdef CONFIG_X86_MCE |
| 545 | #ifdef CONFIG_X86_64 | ||
| 568 | DECLARE_IDTENTRY_MCE(X86_TRAP_MC, exc_machine_check); | 546 | DECLARE_IDTENTRY_MCE(X86_TRAP_MC, exc_machine_check); |
| 547 | #else | ||
| 548 | DECLARE_IDTENTRY_RAW(X86_TRAP_MC, exc_machine_check); | ||
| 549 | #endif | ||
| 569 | #endif | 550 | #endif |
| 570 | 551 | ||
| 571 | /* NMI */ | 552 | /* NMI */ |
| 572 | DECLARE_IDTENTRY_NMI(X86_TRAP_NMI, exc_nmi); | 553 | DECLARE_IDTENTRY_NMI(X86_TRAP_NMI, exc_nmi); |
| 573 | DECLARE_IDTENTRY_XEN(X86_TRAP_NMI, nmi); | 554 | #if defined(CONFIG_XEN_PV) && defined(CONFIG_X86_64) |
| 555 | DECLARE_IDTENTRY_RAW(X86_TRAP_NMI, xenpv_exc_nmi); | ||
| 556 | #endif | ||
| 574 | 557 | ||
| 575 | /* #DB */ | 558 | /* #DB */ |
| 559 | #ifdef CONFIG_X86_64 | ||
| 576 | DECLARE_IDTENTRY_DEBUG(X86_TRAP_DB, exc_debug); | 560 | DECLARE_IDTENTRY_DEBUG(X86_TRAP_DB, exc_debug); |
| 577 | DECLARE_IDTENTRY_XEN(X86_TRAP_DB, debug); | 561 | #else |
| 562 | DECLARE_IDTENTRY_RAW(X86_TRAP_DB, exc_debug); | ||
| 563 | #endif | ||
| 564 | #if defined(CONFIG_XEN_PV) && defined(CONFIG_X86_64) | ||
| 565 | DECLARE_IDTENTRY_RAW(X86_TRAP_DB, xenpv_exc_debug); | ||
| 566 | #endif | ||
| 578 | 567 | ||
| 579 | /* #DF */ | 568 | /* #DF */ |
| 580 | DECLARE_IDTENTRY_DF(X86_TRAP_DF, exc_double_fault); | 569 | DECLARE_IDTENTRY_DF(X86_TRAP_DF, exc_double_fault); |
| @@ -635,8 +624,8 @@ DECLARE_IDTENTRY_SYSVEC(POSTED_INTR_NESTED_VECTOR, sysvec_kvm_posted_intr_nested · 54 unmodified lines | |||
| 635 | 624 | ||
| 636 | #if IS_ENABLED(CONFIG_HYPERV) | 625 | #if IS_ENABLED(CONFIG_HYPERV) |
| 637 | DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback); | 626 | DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_CALLBACK_VECTOR, sysvec_hyperv_callback); |
| 638 | DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment); | 627 | DECLARE_IDTENTRY_SYSVEC(HYPERV_REENLIGHTENMENT_VECTOR, sysvec_hyperv_reenlightenment); |
| 639 | DECLARE_IDTENTRY_SYSVEC(HYPERVISOR_STIMER0_VECTOR, sysvec_hyperv_stimer0); | 628 | DECLARE_IDTENTRY_SYSVEC(HYPERV_STIMER0_VECTOR, sysvec_hyperv_stimer0); |
| 640 | #endif | 629 | #endif |
| 641 | 630 | ||
| 642 | #if IS_ENABLED(CONFIG_ACRN_GUEST) | 631 | #if IS_ENABLED(CONFIG_ACRN_GUEST) |
| @@ -19,12 +19,28 @@ struct task_struct; · 18 unmodified lines | |||
| 19 | void io_bitmap_share(struct task_struct *tsk); | 19 | void io_bitmap_share(struct task_struct *tsk); |
| 20 | void io_bitmap_exit(struct task_struct *tsk); | 20 | void io_bitmap_exit(struct task_struct *tsk); |
| 21 | 21 | ||
| 22 | static inline void native_tss_invalidate_io_bitmap(void) | ||
| 23 | { | ||
| 24 | /* | ||
| 25 | * Invalidate the I/O bitmap by moving io_bitmap_base outside the | ||
| 26 | * TSS limit so any subsequent I/O access from user space will | ||
| 27 | * trigger a #GP. | ||
| 28 | * | ||
| 29 | * This is correct even when VMEXIT rewrites the TSS limit | ||
| 30 | * to 0x67 as the only requirement is that the base points | ||
| 31 | * outside the limit. | ||
| 32 | */ | ||
| 33 | this_cpu_write(cpu_tss_rw.x86_tss.io_bitmap_base, | ||
| 34 | IO_BITMAP_OFFSET_INVALID); | ||
| 35 | } | ||
| 36 | |||
| 22 | void native_tss_update_io_bitmap(void); | 37 | void native_tss_update_io_bitmap(void); |
| 23 | 38 | ||
| 24 | #ifdef CONFIG_PARAVIRT_XXL | 39 | #ifdef CONFIG_PARAVIRT_XXL |
| 25 | #include <asm/paravirt.h> | 40 | #include <asm/paravirt.h> |
| 26 | #else | 41 | #else |
| 27 | #define tss_update_io_bitmap native_tss_update_io_bitmap | 42 | #define tss_update_io_bitmap native_tss_update_io_bitmap |
| 43 | #define tss_invalidate_io_bitmap native_tss_invalidate_io_bitmap | ||
| 28 | #endif | 44 | #endif |
| 29 | 45 | ||
| 30 | #else | 46 | #else |
| @@ -943,7 +943,7 @@ struct kvm_arch { · 942 unmodified lines | |||
| 943 | atomic_t vapics_in_nmi_mode; | 943 | atomic_t vapics_in_nmi_mode; |
| 944 | struct mutex apic_map_lock; | 944 | struct mutex apic_map_lock; |
| 945 | struct kvm_apic_map *apic_map; | 945 | struct kvm_apic_map *apic_map; |
| 946 | bool apic_map_dirty; | 946 | atomic_t apic_map_dirty; |
| 947 | 947 | ||
| 948 | bool apic_access_page_done; | 948 | bool apic_access_page_done; |
| 949 | unsigned long apicv_inhibit_reasons; | 949 | unsigned long apicv_inhibit_reasons; |
| @@ -1220,7 +1220,7 @@ struct kvm_x86_ops { · 270 unmodified lines | |||
| 1220 | void (*enable_log_dirty_pt_masked)(struct kvm *kvm, | 1220 | void (*enable_log_dirty_pt_masked)(struct kvm *kvm, |
| 1221 | struct kvm_memory_slot *slot, | 1221 | struct kvm_memory_slot *slot, |
| 1222 | gfn_t offset, unsigned long mask); | 1222 | gfn_t offset, unsigned long mask); |
| 1223 | int (*write_log_dirty)(struct kvm_vcpu *vcpu); | 1223 | int (*write_log_dirty)(struct kvm_vcpu *vcpu, gpa_t l2_gpa); |
| 1224 | 1224 | ||
| 1225 | /* pmu operations of sub-arch */ | 1225 | /* pmu operations of sub-arch */ |
| 1226 | const struct kvm_pmu_ops *pmu_ops; | 1226 | const struct kvm_pmu_ops *pmu_ops; |
| @@ -25,8 +25,6 @@ · 24 unmodified lines | |||
| 25 | #define TPAUSE_C01_STATE 1 | 25 | #define TPAUSE_C01_STATE 1 |
| 26 | #define TPAUSE_C02_STATE 0 | 26 | #define TPAUSE_C02_STATE 0 |
| 27 | 27 | ||
| 28 | u32 get_umwait_control_msr(void); | ||
| 29 | |||
| 30 | static inline void __monitor(const void *eax, unsigned long ecx, | 28 | static inline void __monitor(const void *eax, unsigned long ecx, |
| 31 | unsigned long edx) | 29 | unsigned long edx) |
| 32 | { | 30 | { |
| @@ -302,6 +302,11 @@ static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g) · 301 unmodified lines | |||
| 302 | } | 302 | } |
| 303 | 303 | ||
| 304 | #ifdef CONFIG_X86_IOPL_IOPERM | 304 | #ifdef CONFIG_X86_IOPL_IOPERM |
| 305 | static inline void tss_invalidate_io_bitmap(void) | ||
| 306 | { | ||
| 307 | PVOP_VCALL0(cpu.invalidate_io_bitmap); | ||
| 308 | } | ||
| 309 | |||
| 305 | static inline void tss_update_io_bitmap(void) | 310 | static inline void tss_update_io_bitmap(void) |
| 306 | { | 311 | { |
| 307 | PVOP_VCALL0(cpu.update_io_bitmap); | 312 | PVOP_VCALL0(cpu.update_io_bitmap); |
| @@ -141,6 +141,7 @@ struct pv_cpu_ops { · 140 unmodified lines | |||
| 141 | void (*load_sp0)(unsigned long sp0); | 141 | void (*load_sp0)(unsigned long sp0); |
| 142 | 142 | ||
| 143 | #ifdef CONFIG_X86_IOPL_IOPERM | 143 | #ifdef CONFIG_X86_IOPL_IOPERM |
| 144 | void (*invalidate_io_bitmap)(void); | ||
| 144 | void (*update_io_bitmap)(void); | 145 | void (*update_io_bitmap)(void); |
| 145 | #endif | 146 | #endif |
| 146 | 147 | ||
| @@ -194,6 +194,7 @@ enum page_cache_mode { · 193 unmodified lines | |||
| 194 | #define _PAGE_TABLE_NOENC (__PP|__RW|_USR|___A| 0|___D| 0| 0) | 194 | #define _PAGE_TABLE_NOENC (__PP|__RW|_USR|___A| 0|___D| 0| 0) |
| 195 | #define _PAGE_TABLE (__PP|__RW|_USR|___A| 0|___D| 0| 0| _ENC) | 195 | #define _PAGE_TABLE (__PP|__RW|_USR|___A| 0|___D| 0| 0| _ENC) |
| 196 | #define __PAGE_KERNEL_RO (__PP| 0| 0|___A|__NX|___D| 0|___G) | 196 | #define __PAGE_KERNEL_RO (__PP| 0| 0|___A|__NX|___D| 0|___G) |
| 197 | #define __PAGE_KERNEL_ROX (__PP| 0| 0|___A| 0|___D| 0|___G) | ||
| 197 | #define __PAGE_KERNEL_NOCACHE (__PP|__RW| 0|___A|__NX|___D| 0|___G| __NC) | 198 | #define __PAGE_KERNEL_NOCACHE (__PP|__RW| 0|___A|__NX|___D| 0|___G| __NC) |
| 198 | #define __PAGE_KERNEL_VVAR (__PP| 0|_USR|___A|__NX|___D| 0|___G) | 199 | #define __PAGE_KERNEL_VVAR (__PP| 0|_USR|___A|__NX|___D| 0|___G) |
| 199 | #define __PAGE_KERNEL_LARGE (__PP|__RW| 0|___A|__NX|___D|_PSE|___G) | 200 | #define __PAGE_KERNEL_LARGE (__PP|__RW| 0|___A|__NX|___D|_PSE|___G) |
| @@ -219,6 +220,7 @@ enum page_cache_mode { · 19 unmodified lines | |||
| 219 | #define PAGE_KERNEL_RO __pgprot_mask(__PAGE_KERNEL_RO | _ENC) | 220 | #define PAGE_KERNEL_RO __pgprot_mask(__PAGE_KERNEL_RO | _ENC) |
| 220 | #define PAGE_KERNEL_EXEC __pgprot_mask(__PAGE_KERNEL_EXEC | _ENC) | 221 | #define PAGE_KERNEL_EXEC __pgprot_mask(__PAGE_KERNEL_EXEC | _ENC) |
| 221 | #define PAGE_KERNEL_EXEC_NOENC __pgprot_mask(__PAGE_KERNEL_EXEC | 0) | 222 | #define PAGE_KERNEL_EXEC_NOENC __pgprot_mask(__PAGE_KERNEL_EXEC | 0) |
| 223 | #define PAGE_KERNEL_ROX __pgprot_mask(__PAGE_KERNEL_ROX | _ENC) | ||
| 222 | #define PAGE_KERNEL_NOCACHE __pgprot_mask(__PAGE_KERNEL_NOCACHE | _ENC) | 224 | #define PAGE_KERNEL_NOCACHE __pgprot_mask(__PAGE_KERNEL_NOCACHE | _ENC) |
| 223 | #define PAGE_KERNEL_LARGE __pgprot_mask(__PAGE_KERNEL_LARGE | _ENC) | 225 | #define PAGE_KERNEL_LARGE __pgprot_mask(__PAGE_KERNEL_LARGE | _ENC) |
| 224 | #define PAGE_KERNEL_LARGE_EXEC __pgprot_mask(__PAGE_KERNEL_LARGE_EXEC | _ENC) | 226 | #define PAGE_KERNEL_LARGE_EXEC __pgprot_mask(__PAGE_KERNEL_LARGE_EXEC | _ENC) |
| @@ -370,7 +370,7 @@ struct x86_hw_tss { · 369 unmodified lines | |||
| 370 | #define IO_BITMAP_OFFSET_INVALID (__KERNEL_TSS_LIMIT + 1) | 370 | #define IO_BITMAP_OFFSET_INVALID (__KERNEL_TSS_LIMIT + 1) |
| 371 | 371 | ||
| 372 | struct entry_stack { | 372 | struct entry_stack { |
| 373 | unsigned long words[64]; | 373 | char stack[PAGE_SIZE]; |
| 374 | }; | 374 | }; |
| 375 | 375 | ||
| 376 | struct entry_stack_page { | 376 | struct entry_stack_page { |
| @@ -408,14 +408,15 @@ struct kvm_vmx_nested_state_data { · 407 unmodified lines | |||
| 408 | }; | 408 | }; |
| 409 | 409 | ||
| 410 | struct kvm_vmx_nested_state_hdr { | 410 | struct kvm_vmx_nested_state_hdr { |
| 411 | __u32 flags; | ||
| 412 | __u64 vmxon_pa; | 411 | __u64 vmxon_pa; |
| 413 | __u64 vmcs12_pa; | 412 | __u64 vmcs12_pa; |
| 414 | __u64 preemption_timer_deadline; | ||
| 415 | 413 | ||
| 416 | struct { | 414 | struct { |
| 417 | __u16 flags; | 415 | __u16 flags; |
| 418 | } smm; | 416 | } smm; |
| 417 | |||
| 418 | __u32 flags; | ||
| 419 | __u64 preemption_timer_deadline; | ||
| 419 | }; | 420 | }; |
| 420 | 421 | ||
| 421 | struct kvm_svm_nested_state_data { | 422 | struct kvm_svm_nested_state_data { |
| @@ -2316,12 +2316,12 @@ static int mp_irqdomain_create(int ioapic) · 2315 unmodified lines | |||
| 2316 | ip->irqdomain = irq_domain_create_linear(fn, hwirqs, cfg->ops, | 2316 | ip->irqdomain = irq_domain_create_linear(fn, hwirqs, cfg->ops, |
| 2317 | (void *)(long)ioapic); | 2317 | (void *)(long)ioapic); |
| 2318 | 2318 | ||
| 2319 | /* Release fw handle if it was allocated above */ | 2319 | if (!ip->irqdomain) { |
| 2320 | if (!cfg->dev) | 2320 | /* Release fw handle if it was allocated above */ |
| 2321 | irq_domain_free_fwnode(fn); | 2321 | if (!cfg->dev) |
| 2322 | 2322 | irq_domain_free_fwnode(fn); | |
| 2323 | if (!ip->irqdomain) | ||
| 2324 | return -ENOMEM; | 2323 | return -ENOMEM; |
| 2324 | } | ||
| 2325 | 2325 | ||
| 2326 | ip->irqdomain->parent = parent; | 2326 | ip->irqdomain->parent = parent; |
| 2327 | 2327 | ||
| @@ -263,12 +263,13 @@ void __init arch_init_msi_domain(struct irq_domain *parent) · 262 unmodified lines | |||
| 263 | msi_default_domain = | 263 | msi_default_domain = |
| 264 | pci_msi_create_irq_domain(fn, &pci_msi_domain_info, | 264 | pci_msi_create_irq_domain(fn, &pci_msi_domain_info, |
| 265 | parent); | 265 | parent); |
| 266 | irq_domain_free_fwnode(fn); | ||
| 267 | } | 266 | } |
| 268 | if (!msi_default_domain) | 267 | if (!msi_default_domain) { |
| 268 | irq_domain_free_fwnode(fn); | ||
| 269 | pr_warn("failed to initialize irqdomain for MSI/MSI-x.\n"); | 269 | pr_warn("failed to initialize irqdomain for MSI/MSI-x.\n"); |
| 270 | else | 270 | } else { |
| 271 | msi_default_domain->flags |= IRQ_DOMAIN_MSI_NOMASK_QUIRK; | 271 | msi_default_domain->flags |= IRQ_DOMAIN_MSI_NOMASK_QUIRK; |
| 272 | } | ||
| 272 | } | 273 | } |
| 273 | 274 | ||
| 274 | #ifdef CONFIG_IRQ_REMAP | 275 | #ifdef CONFIG_IRQ_REMAP |
| @@ -301,7 +302,8 @@ struct irq_domain *arch_create_remap_msi_irq_domain(struct irq_domain *parent, · 26 unmodified lines | |||
| 301 | if (!fn) | 302 | if (!fn) |
| 302 | return NULL; | 303 | return NULL; |
| 303 | d = pci_msi_create_irq_domain(fn, &pci_msi_ir_domain_info, parent); | 304 | d = pci_msi_create_irq_domain(fn, &pci_msi_ir_domain_info, parent); |
| 304 | irq_domain_free_fwnode(fn); | 305 | if (!d) |
| 306 | irq_domain_free_fwnode(fn); | ||
| 305 | return d; | 307 | return d; |
| 306 | } | 308 | } |
| 307 | #endif | 309 | #endif |
| @@ -364,7 +366,8 @@ static struct irq_domain *dmar_get_irq_domain(void) · 56 unmodified lines | |||
| 364 | if (fn) { | 366 | if (fn) { |
| 365 | dmar_domain = msi_create_irq_domain(fn, &dmar_msi_domain_info, | 367 | dmar_domain = msi_create_irq_domain(fn, &dmar_msi_domain_info, |
| 366 | x86_vector_domain); | 368 | x86_vector_domain); |
| 367 | irq_domain_free_fwnode(fn); | 369 | if (!dmar_domain) |
| 370 | irq_domain_free_fwnode(fn); | ||
| 368 | } | 371 | } |
| 369 | out: | 372 | out: |
| 370 | mutex_unlock(&dmar_lock); | 373 | mutex_unlock(&dmar_lock); |
| @@ -489,7 +492,10 @@ struct irq_domain *hpet_create_irq_domain(int hpet_id) · 118 unmodified lines | |||
| 489 | } | 492 | } |
| 490 | 493 | ||
| 491 | d = msi_create_irq_domain(fn, domain_info, parent); | 494 | d = msi_create_irq_domain(fn, domain_info, parent); |
| 492 | irq_domain_free_fwnode(fn); | 495 | if (!d) { |
| 496 | irq_domain_free_fwnode(fn); | ||
| 497 | kfree(domain_info); | ||
| 498 | } | ||
| 493 | return d; | 499 | return d; |
| 494 | } | 500 | } |
| 495 | 501 | ||
| @@ -446,12 +446,10 @@ static int x86_vector_activate(struct irq_domain *dom, struct irq_data *irqd, · 445 unmodified lines | |||
| 446 | trace_vector_activate(irqd->irq, apicd->is_managed, | 446 | trace_vector_activate(irqd->irq, apicd->is_managed, |
| 447 | apicd->can_reserve, reserve); | 447 | apicd->can_reserve, reserve); |
| 448 | 448 | ||
| 449 | /* Nothing to do for fixed assigned vectors */ | ||
| 450 | if (!apicd->can_reserve && !apicd->is_managed) | ||
| 451 | return 0; | ||
| 452 | |||
| 453 | raw_spin_lock_irqsave(&vector_lock, flags); | 449 | raw_spin_lock_irqsave(&vector_lock, flags); |
| 454 | if (reserve || irqd_is_managed_and_shutdown(irqd)) | 450 | if (!apicd->can_reserve && !apicd->is_managed) |
| 451 | assign_irq_vector_any_locked(irqd); | ||
| 452 | else if (reserve || irqd_is_managed_and_shutdown(irqd)) | ||
| 455 | vector_assign_managed_shutdown(irqd); | 453 | vector_assign_managed_shutdown(irqd); |
| 456 | else if (apicd->is_managed) | 454 | else if (apicd->is_managed) |
| 457 | ret = activate_managed(irqd); | 455 | ret = activate_managed(irqd); |
| @@ -709,7 +707,6 @@ int __init arch_early_irq_init(void) · 251 unmodified lines | |||
| 709 | x86_vector_domain = irq_domain_create_tree(fn, &x86_vector_domain_ops, | 707 | x86_vector_domain = irq_domain_create_tree(fn, &x86_vector_domain_ops, |
| 710 | NULL); | 708 | NULL); |
| 711 | BUG_ON(x86_vector_domain == NULL); | 709 | BUG_ON(x86_vector_domain == NULL); |
| 712 | irq_domain_free_fwnode(fn); | ||
| 713 | irq_set_default_host(x86_vector_domain); | 710 | irq_set_default_host(x86_vector_domain); |
| 714 | 711 | ||
| 715 | arch_init_msi_domain(x86_vector_domain); | 712 | arch_init_msi_domain(x86_vector_domain); |
| @@ -775,20 +772,10 @@ void lapic_offline(void) · 59 unmodified lines | |||
| 775 | static int apic_set_affinity(struct irq_data *irqd, | 772 | static int apic_set_affinity(struct irq_data *irqd, |
| 776 | const struct cpumask *dest, bool force) | 773 | const struct cpumask *dest, bool force) |
| 777 | { | 774 | { |
| 778 | struct apic_chip_data *apicd = apic_chip_data(irqd); | ||
| 779 | int err; | 775 | int err; |
| 780 | 776 | ||
| 781 | /* | 777 | if (WARN_ON_ONCE(!irqd_is_activated(irqd))) |
| 782 | * Core code can call here for inactive interrupts. For inactive | 778 | return -EIO; |
| 783 | * interrupts which use managed or reservation mode there is no | ||
| 784 | * point in going through the vector assignment right now as the | ||
| 785 | * activation will assign a vector which fits the destination | ||
| 786 | * cpumask. Let the core code store the destination mask and be | ||
| 787 | * done with it. | ||
| 788 | */ | ||
| 789 | if (!irqd_is_activated(irqd) && | ||
| 790 | (apicd->is_managed || apicd->can_reserve)) | ||
| 791 | return IRQ_SET_MASK_OK; | ||
| 792 | 779 | ||
| 793 | raw_spin_lock(&vector_lock); | 780 | raw_spin_lock(&vector_lock); |
| 794 | cpumask_and(vector_searchmask, dest, cpu_online_mask); | 781 | cpumask_and(vector_searchmask, dest, cpu_online_mask); |
| @@ -3,6 +3,7 @@ · 2 unmodified lines | |||
| 3 | #include <linux/sched.h> | 3 | #include <linux/sched.h> |
| 4 | #include <linux/sched/clock.h> | 4 | #include <linux/sched/clock.h> |
| 5 | 5 | ||
| 6 | #include <asm/cpu.h> | ||
| 6 | #include <asm/cpufeature.h> | 7 | #include <asm/cpufeature.h> |
| 7 | #include <asm/e820/api.h> | 8 | #include <asm/e820/api.h> |
| 8 | #include <asm/mtrr.h> | 9 | #include <asm/mtrr.h> |
| @@ -347,6 +347,9 @@ out: · 346 unmodified lines | |||
| 347 | cr4_clear_bits(X86_CR4_UMIP); | 347 | cr4_clear_bits(X86_CR4_UMIP); |
| 348 | } | 348 | } |
| 349 | 349 | ||
| 350 | /* These bits should not change their value after CPU init is finished. */ | ||
| 351 | static const unsigned long cr4_pinned_mask = | ||
| 352 | X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP | X86_CR4_FSGSBASE; | ||
| 350 | static DEFINE_STATIC_KEY_FALSE_RO(cr_pinning); | 353 | static DEFINE_STATIC_KEY_FALSE_RO(cr_pinning); |
| 351 | static unsigned long cr4_pinned_bits __ro_after_init; | 354 | static unsigned long cr4_pinned_bits __ro_after_init; |
| 352 | 355 | ||
| @@ -371,20 +374,20 @@ EXPORT_SYMBOL(native_write_cr0); · 18 unmodified lines | |||
| 371 | 374 | ||
| 372 | void native_write_cr4(unsigned long val) | 375 | void native_write_cr4(unsigned long val) |
| 373 | { | 376 | { |
| 374 | unsigned long bits_missing = 0; | 377 | unsigned long bits_changed = 0; |
| 375 | 378 | ||
| 376 | set_register: | 379 | set_register: |
| 377 | asm volatile("mov %0,%%cr4": "+r" (val), "+m" (cr4_pinned_bits)); | 380 | asm volatile("mov %0,%%cr4": "+r" (val), "+m" (cr4_pinned_bits)); |
| 378 | 381 | ||
| 379 | if (static_branch_likely(&cr_pinning)) { | 382 | if (static_branch_likely(&cr_pinning)) { |
| 380 | if (unlikely((val & cr4_pinned_bits) != cr4_pinned_bits)) { | 383 | if (unlikely((val & cr4_pinned_mask) != cr4_pinned_bits)) { |
| 381 | bits_missing = ~val & cr4_pinned_bits; | 384 | bits_changed = (val & cr4_pinned_mask) ^ cr4_pinned_bits; |
| 382 | val |= bits_missing; | 385 | val = (val & ~cr4_pinned_mask) | cr4_pinned_bits; |
| 383 | goto set_register; | 386 | goto set_register; |
| 384 | } | 387 | } |
| 385 | /* Warn after we've set the missing bits. */ | 388 | /* Warn after we've corrected the changed bits. */ |
| 386 | WARN_ONCE(bits_missing, "CR4 bits went missing: %lx!?\n", | 389 | WARN_ONCE(bits_changed, "pinned CR4 bits changed: 0x%lx!?\n", |
| 387 | bits_missing); | 390 | bits_changed); |
| 388 | } | 391 | } |
| 389 | } | 392 | } |
| 390 | #if IS_MODULE(CONFIG_LKDTM) | 393 | #if IS_MODULE(CONFIG_LKDTM) |
| @@ -419,7 +422,7 @@ void cr4_init(void) · 28 unmodified lines | |||
| 419 | if (boot_cpu_has(X86_FEATURE_PCID)) | 422 | if (boot_cpu_has(X86_FEATURE_PCID)) |
| 420 | cr4 |= X86_CR4_PCIDE; | 423 | cr4 |= X86_CR4_PCIDE; |
| 421 | if (static_branch_likely(&cr_pinning)) | 424 | if (static_branch_likely(&cr_pinning)) |
| 422 | cr4 |= cr4_pinned_bits; | 425 | cr4 = (cr4 & ~cr4_pinned_mask) | cr4_pinned_bits; |
| 423 | 426 | ||
| 424 | __write_cr4(cr4); | 427 | __write_cr4(cr4); |
| 425 | 428 | ||
| @@ -434,10 +437,7 @@ void cr4_init(void) · 8 unmodified lines | |||
| 434 | */ | 437 | */ |
| 435 | static void __init setup_cr_pinning(void) | 438 | static void __init setup_cr_pinning(void) |
| 436 | { | 439 | { |
| 437 | unsigned long mask; | 440 | cr4_pinned_bits = this_cpu_read(cpu_tlbstate.cr4) & cr4_pinned_mask; |
| 438 | |||
| 439 | mask = (X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP); | ||
| 440 | cr4_pinned_bits = this_cpu_read(cpu_tlbstate.cr4) & mask; | ||
| 441 | static_key_enable(&cr_pinning.key); | 441 | static_key_enable(&cr_pinning.key); |
| 442 | } | 442 | } |
| 443 | 443 | ||
| @@ -81,8 +81,4 @@ extern void update_srbds_msr(void); · 80 unmodified lines | |||
| 81 | 81 | ||
| 82 | extern u64 x86_read_arch_cap_msr(void); | 82 | extern u64 x86_read_arch_cap_msr(void); |
| 83 | 83 | ||
| 84 | #ifdef CONFIG_IA32_FEAT_CTL | ||
| 85 | void init_ia32_feat_ctl(struct cpuinfo_x86 *c); | ||
| 86 | #endif | ||
| 87 | |||
| 88 | #endif /* ARCH_X86_CPU_H */ | 84 | #endif /* ARCH_X86_CPU_H */ |
| @@ -49,6 +49,13 @@ enum split_lock_detect_state { · 48 unmodified lines | |||
| 49 | static enum split_lock_detect_state sld_state __ro_after_init = sld_off; | 49 | static enum split_lock_detect_state sld_state __ro_after_init = sld_off; |
| 50 | static u64 msr_test_ctrl_cache __ro_after_init; | 50 | static u64 msr_test_ctrl_cache __ro_after_init; |
| 51 | 51 | ||
| 52 | /* | ||
| 53 | * With a name like MSR_TEST_CTL it should go without saying, but don't touch | ||
| 54 | * MSR_TEST_CTL unless the CPU is one of the whitelisted models. Writing it | ||
| 55 | * on CPUs that do not support SLD can cause fireworks, even when writing '0'. | ||
| 56 | */ | ||
| 57 | static bool cpu_model_supports_sld __ro_after_init; | ||
| 58 | |||
| 52 | /* | 59 | /* |
| 53 | * Processors which have self-snooping capability can handle conflicting | 60 | * Processors which have self-snooping capability can handle conflicting |
| 54 | * memory type across CPUs by snooping its own cache. However, there exists | 61 | * memory type across CPUs by snooping its own cache. However, there exists |
| @@ -1071,7 +1078,8 @@ static void sld_update_msr(bool on) · 1016 unmodified lines | |||
| 1071 | 1078 | ||
| 1072 | static void split_lock_init(void) | 1079 | static void split_lock_init(void) |
| 1073 | { | 1080 | { |
| 1074 | split_lock_verify_msr(sld_state != sld_off); | 1081 | if (cpu_model_supports_sld) |
| 1082 | split_lock_verify_msr(sld_state != sld_off); | ||
| 1075 | } | 1083 | } |
| 1076 | 1084 | ||
| 1077 | static void split_lock_warn(unsigned long ip) | 1085 | static void split_lock_warn(unsigned long ip) |
| @@ -1177,5 +1185,6 @@ void __init cpu_set_core_cap_bits(struct cpuinfo_x86 *c) · 99 unmodified lines | |||
| 1177 | return; | 1185 | return; |
| 1178 | } | 1186 | } |
| 1179 | 1187 | ||
| 1188 | cpu_model_supports_sld = true; | ||
| 1180 | split_lock_setup(); | 1189 | split_lock_setup(); |
| 1181 | } | 1190 | } |
| @@ -1083,7 +1083,7 @@ static noinstr bool mce_check_crashing_cpu(void) · 1082 unmodified lines | |||
| 1083 | { | 1083 | { |
| 1084 | unsigned int cpu = smp_processor_id(); | 1084 | unsigned int cpu = smp_processor_id(); |
| 1085 | 1085 | ||
| 1086 | if (cpu_is_offline(cpu) || | 1086 | if (arch_cpu_is_offline(cpu) || |
| 1087 | (crashing_cpu != -1 && crashing_cpu != cpu)) { | 1087 | (crashing_cpu != -1 && crashing_cpu != cpu)) { |
| 1088 | u64 mcgstatus; | 1088 | u64 mcgstatus; |
| 1089 | 1089 | ||
| @@ -1901,6 +1901,8 @@ void (*machine_check_vector)(struct pt_regs *) = unexpected_machine_check; · 811 unmodified lines | |||
| 1901 | 1901 | ||
| 1902 | static __always_inline void exc_machine_check_kernel(struct pt_regs *regs) | 1902 | static __always_inline void exc_machine_check_kernel(struct pt_regs *regs) |
| 1903 | { | 1903 | { |
| 1904 | WARN_ON_ONCE(user_mode(regs)); | ||
| 1905 | |||
| 1904 | /* | 1906 | /* |
| 1905 | * Only required when from kernel mode. See | 1907 | * Only required when from kernel mode. See |
| 1906 | * mce_check_crashing_cpu() for details. | 1908 | * mce_check_crashing_cpu() for details. |
| @@ -1954,7 +1956,7 @@ DEFINE_IDTENTRY_MCE_USER(exc_machine_check) · 47 unmodified lines | |||
| 1954 | } | 1956 | } |
| 1955 | #else | 1957 | #else |
| 1956 | /* 32bit unified entry point */ | 1958 | /* 32bit unified entry point */ |
| 1957 | DEFINE_IDTENTRY_MCE(exc_machine_check) | 1959 | DEFINE_IDTENTRY_RAW(exc_machine_check) |
| 1958 | { | 1960 | { |
| 1959 | unsigned long dr7; | 1961 | unsigned long dr7; |
| 1960 | 1962 | ||
| @@ -981,10 +981,10 @@ void resctrl_cpu_detect(struct cpuinfo_x86 *c) · 980 unmodified lines | |||
| 981 | 981 | ||
| 982 | c->x86_cache_max_rmid = ecx; | 982 | c->x86_cache_max_rmid = ecx; |
| 983 | c->x86_cache_occ_scale = ebx; | 983 | c->x86_cache_occ_scale = ebx; |
| 984 | if (c->x86_vendor == X86_VENDOR_INTEL) | 984 | c->x86_cache_mbm_width_offset = eax & 0xff; |
| 985 | c->x86_cache_mbm_width_offset = eax & 0xff; | 985 | |
| 986 | else | 986 | if (c->x86_vendor == X86_VENDOR_AMD && !c->x86_cache_mbm_width_offset) |
| 987 | c->x86_cache_mbm_width_offset = -1; | 987 | c->x86_cache_mbm_width_offset = MBM_CNTR_WIDTH_OFFSET_AMD; |
| 988 | } | 988 | } |
| 989 | } | 989 | } |
| 990 | 990 | ||
| @@ -37,6 +37,7 @@ · 36 unmodified lines | |||
| 37 | #define MBA_IS_LINEAR 0x4 | 37 | #define MBA_IS_LINEAR 0x4 |
| 38 | #define MBA_MAX_MBPS U32_MAX | 38 | #define MBA_MAX_MBPS U32_MAX |
| 39 | #define MAX_MBA_BW_AMD 0x800 | 39 | #define MAX_MBA_BW_AMD 0x800 |
| 40 | #define MBM_CNTR_WIDTH_OFFSET_AMD 20 | ||
| 40 | 41 | ||
| 41 | #define RMID_VAL_ERROR BIT_ULL(63) | 42 | #define RMID_VAL_ERROR BIT_ULL(63) |
| 42 | #define RMID_VAL_UNAVAIL BIT_ULL(62) | 43 | #define RMID_VAL_UNAVAIL BIT_ULL(62) |
| @@ -1117,6 +1117,7 @@ static int rdt_cdp_peer_get(struct rdt_resource *r, struct rdt_domain *d, · 1116 unmodified lines | |||
| 1117 | _d_cdp = rdt_find_domain(_r_cdp, d->id, NULL); | 1117 | _d_cdp = rdt_find_domain(_r_cdp, d->id, NULL); |
| 1118 | if (WARN_ON(IS_ERR_OR_NULL(_d_cdp))) { | 1118 | if (WARN_ON(IS_ERR_OR_NULL(_d_cdp))) { |
| 1119 | _r_cdp = NULL; | 1119 | _r_cdp = NULL; |
| 1120 | _d_cdp = NULL; | ||
| 1120 | ret = -EINVAL; | 1121 | ret = -EINVAL; |
| 1121 | } | 1122 | } |
| 1122 | 1123 | ||
| @@ -18,12 +18,6 @@ · 17 unmodified lines | |||
| 18 | */ | 18 | */ |
| 19 | static u32 umwait_control_cached = UMWAIT_CTRL_VAL(100000, UMWAIT_C02_ENABLE); | 19 | static u32 umwait_control_cached = UMWAIT_CTRL_VAL(100000, UMWAIT_C02_ENABLE); |
| 20 | 20 | ||
| 21 | u32 get_umwait_control_msr(void) | ||
| 22 | { | ||
| 23 | return umwait_control_cached; | ||
| 24 | } | ||
| 25 | EXPORT_SYMBOL_GPL(get_umwait_control_msr); | ||
| 26 | |||
| 27 | /* | 21 | /* |
| 28 | * Cache the original IA32_UMWAIT_CONTROL MSR value which is configured by | 22 | * Cache the original IA32_UMWAIT_CONTROL MSR value which is configured by |
| 29 | * hardware or BIOS before kernel boot. | 23 | * hardware or BIOS before kernel boot. |
| @@ -2,6 +2,7 @@ · 1 unmodified line | |||
| 2 | #include <linux/sched.h> | 2 | #include <linux/sched.h> |
| 3 | #include <linux/sched/clock.h> | 3 | #include <linux/sched/clock.h> |
| 4 | 4 | ||
| 5 | #include <asm/cpu.h> | ||
| 5 | #include <asm/cpufeature.h> | 6 | #include <asm/cpufeature.h> |
| 6 | 7 | ||
| 7 | #include "cpu.h" | 8 | #include "cpu.h" |
| @@ -101,6 +101,12 @@ void kernel_fpu_begin(void) · 100 unmodified lines | |||
| 101 | copy_fpregs_to_fpstate(¤t->thread.fpu); | 101 | copy_fpregs_to_fpstate(¤t->thread.fpu); |
| 102 | } | 102 | } |
| 103 | __cpu_invalidate_fpregs_state(); | 103 | __cpu_invalidate_fpregs_state(); |
| 104 | |||
| 105 | if (boot_cpu_has(X86_FEATURE_XMM)) | ||
| 106 | ldmxcsr(MXCSR_DEFAULT); | ||
| 107 | |||
| 108 | if (boot_cpu_has(X86_FEATURE_FPU)) | ||
| 109 | asm volatile ("fninit"); | ||
| 104 | } | 110 | } |
| 105 | EXPORT_SYMBOL_GPL(kernel_fpu_begin); | 111 | EXPORT_SYMBOL_GPL(kernel_fpu_begin); |
| 106 | 112 | ||
| @@ -29,6 +29,8 @@ · 28 unmodified lines | |||
| 29 | #include <asm/mmu_context.h> | 29 | #include <asm/mmu_context.h> |
| 30 | #include <asm/pgtable_areas.h> | 30 | #include <asm/pgtable_areas.h> |
| 31 | 31 | ||
| 32 | #include <xen/xen.h> | ||
| 33 | |||
| 32 | /* This is a multiple of PAGE_SIZE. */ | 34 | /* This is a multiple of PAGE_SIZE. */ |
| 33 | #define LDT_SLOT_STRIDE (LDT_ENTRIES * LDT_ENTRY_SIZE) | 35 | #define LDT_SLOT_STRIDE (LDT_ENTRIES * LDT_ENTRY_SIZE) |
| 34 | 36 | ||
| @@ -543,6 +545,28 @@ static int read_default_ldt(void __user *ptr, unsigned long bytecount) · 508 unmodified lines | |||
| 543 | return bytecount; | 545 | return bytecount; |
| 544 | } | 546 | } |
| 545 | 547 | ||
| 548 | static bool allow_16bit_segments(void) | ||
| 549 | { | ||
| 550 | if (!IS_ENABLED(CONFIG_X86_16BIT)) | ||
| 551 | return false; | ||
| 552 | |||
| 553 | #ifdef CONFIG_XEN_PV | ||
| 554 | /* | ||
| 555 | * Xen PV does not implement ESPFIX64, which means that 16-bit | ||
| 556 | * segments will not work correctly. Until either Xen PV implements | ||
| 557 | * ESPFIX64 and can signal this fact to the guest or unless someone | ||
| 558 | * provides compelling evidence that allowing broken 16-bit segments | ||
| 559 | * is worthwhile, disallow 16-bit segments under Xen PV. | ||
| 560 | */ | ||
| 561 | if (xen_pv_domain()) { | ||
| 562 | pr_info_once("Warning: 16-bit segments do not work correctly in a Xen PV guest\n"); | ||
| 563 | return false; | ||
| 564 | } | ||
| 565 | #endif | ||
| 566 | |||
| 567 | return true; | ||
| 568 | } | ||
| 569 | |||
| 546 | static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) | 570 | static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) |
| 547 | { | 571 | { |
| 548 | struct mm_struct *mm = current->mm; | 572 | struct mm_struct *mm = current->mm; |
| @@ -574,7 +598,7 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) · 25 unmodified lines | |||
| 574 | /* The user wants to clear the entry. */ | 598 | /* The user wants to clear the entry. */ |
| 575 | memset(&ldt, 0, sizeof(ldt)); | 599 | memset(&ldt, 0, sizeof(ldt)); |
| 576 | } else { | 600 | } else { |
| 577 | if (!IS_ENABLED(CONFIG_X86_16BIT) && !ldt_info.seg_32bit) { | 601 | if (!ldt_info.seg_32bit && !allow_16bit_segments()) { |
| 578 | error = -EINVAL; | 602 | error = -EINVAL; |
| 579 | goto out; | 603 | goto out; |
| 580 | } | 604 | } |
| @@ -478,7 +478,7 @@ static DEFINE_PER_CPU(unsigned long, nmi_dr7); · 477 unmodified lines | |||
| 478 | 478 | ||
| 479 | DEFINE_IDTENTRY_RAW(exc_nmi) | 479 | DEFINE_IDTENTRY_RAW(exc_nmi) |
| 480 | { | 480 | { |
| 481 | if (IS_ENABLED(CONFIG_SMP) && cpu_is_offline(smp_processor_id())) | 481 | if (IS_ENABLED(CONFIG_SMP) && arch_cpu_is_offline(smp_processor_id())) |
| 482 | return; | 482 | return; |
| 483 | 483 | ||
| 484 | if (this_cpu_read(nmi_state) != NMI_NOT_RUNNING) { | 484 | if (this_cpu_read(nmi_state) != NMI_NOT_RUNNING) { |
| @@ -324,7 +324,8 @@ struct paravirt_patch_template pv_ops = { · 323 unmodified lines | |||
| 324 | .cpu.swapgs = native_swapgs, | 324 | .cpu.swapgs = native_swapgs, |
| 325 | 325 | ||
| 326 | #ifdef CONFIG_X86_IOPL_IOPERM | 326 | #ifdef CONFIG_X86_IOPL_IOPERM |
| 327 | .cpu.update_io_bitmap = native_tss_update_io_bitmap, | 327 | .cpu.invalidate_io_bitmap = native_tss_invalidate_io_bitmap, |
| 328 | .cpu.update_io_bitmap = native_tss_update_io_bitmap, | ||
| 328 | #endif | 329 | #endif |
| 329 | 330 | ||
| 330 | .cpu.start_context_switch = paravirt_nop, | 331 | .cpu.start_context_switch = paravirt_nop, |
| @@ -322,20 +322,6 @@ void arch_setup_new_exec(void) · 321 unmodified lines | |||
| 322 | } | 322 | } |
| 323 | 323 | ||
| 324 | #ifdef CONFIG_X86_IOPL_IOPERM | 324 | #ifdef CONFIG_X86_IOPL_IOPERM |
| 325 | static inline void tss_invalidate_io_bitmap(struct tss_struct *tss) | ||
| 326 | { | ||
| 327 | /* | ||
| 328 | * Invalidate the I/O bitmap by moving io_bitmap_base outside the | ||
| 329 | * TSS limit so any subsequent I/O access from user space will | ||
| 330 | * trigger a #GP. | ||
| 331 | * | ||
| 332 | * This is correct even when VMEXIT rewrites the TSS limit | ||
| 333 | * to 0x67 as the only requirement is that the base points | ||
| 334 | * outside the limit. | ||
| 335 | */ | ||
| 336 | tss->x86_tss.io_bitmap_base = IO_BITMAP_OFFSET_INVALID; | ||
| 337 | } | ||
| 338 | |||
| 339 | static inline void switch_to_bitmap(unsigned long tifp) | 325 | static inline void switch_to_bitmap(unsigned long tifp) |
| 340 | { | 326 | { |
| 341 | /* | 327 | /* |
| @@ -346,7 +332,7 @@ static inline void switch_to_bitmap(unsigned long tifp) · 4 unmodified lines | |||
| 346 | * user mode. | 332 | * user mode. |
| 347 | */ | 333 | */ |
| 348 | if (tifp & _TIF_IO_BITMAP) | 334 | if (tifp & _TIF_IO_BITMAP) |
| 349 | tss_invalidate_io_bitmap(this_cpu_ptr(&cpu_tss_rw)); | 335 | tss_invalidate_io_bitmap(); |
| 350 | } | 336 | } |
| 351 | 337 | ||
| 352 | static void tss_copy_io_bitmap(struct tss_struct *tss, struct io_bitmap *iobm) | 338 | static void tss_copy_io_bitmap(struct tss_struct *tss, struct io_bitmap *iobm) |
| @@ -380,7 +366,7 @@ void native_tss_update_io_bitmap(void) · 27 unmodified lines | |||
| 380 | u16 *base = &tss->x86_tss.io_bitmap_base; | 366 | u16 *base = &tss->x86_tss.io_bitmap_base; |
| 381 | 367 | ||
| 382 | if (!test_thread_flag(TIF_IO_BITMAP)) { | 368 | if (!test_thread_flag(TIF_IO_BITMAP)) { |
| 383 | tss_invalidate_io_bitmap(tss); | 369 | native_tss_invalidate_io_bitmap(); |
| 384 | return; | 370 | return; |
| 385 | } | 371 | } |
| 386 | 372 | ||
| @@ -84,17 +84,16 @@ static inline void cond_local_irq_disable(struct pt_regs *regs) · 83 unmodified lines | |||
| 84 | local_irq_disable(); | 84 | local_irq_disable(); |
| 85 | } | 85 | } |
| 86 | 86 | ||
| 87 | int is_valid_bugaddr(unsigned long addr) | 87 | __always_inline int is_valid_bugaddr(unsigned long addr) |
| 88 | { | 88 | { |
| 89 | unsigned short ud; | ||
| 90 | |||
| 91 | if (addr < TASK_SIZE_MAX) | 89 | if (addr < TASK_SIZE_MAX) |
| 92 | return 0; | 90 | return 0; |
| 93 | 91 | ||
| 94 | if (get_kernel_nofault(ud, (unsigned short *)addr)) | 92 | /* |
| 95 | return 0; | 93 | * We got #UD, if the text isn't readable we'd have gotten |
| 96 | 94 | * a different exception. | |
| 97 | return ud == INSN_UD0 || ud == INSN_UD2; | 95 | */ |
| 96 | return *(unsigned short *)addr == INSN_UD2; | ||
| 98 | } | 97 | } |
| 99 | 98 | ||
| 100 | static nokprobe_inline int | 99 | static nokprobe_inline int |
| @@ -216,40 +215,45 @@ static inline void handle_invalid_op(struct pt_regs *regs) · 115 unmodified lines | |||
| 216 | ILL_ILLOPN, error_get_trap_addr(regs)); | 215 | ILL_ILLOPN, error_get_trap_addr(regs)); |
| 217 | } | 216 | } |
| 218 | 217 | ||
| 219 | DEFINE_IDTENTRY_RAW(exc_invalid_op) | 218 | static noinstr bool handle_bug(struct pt_regs *regs) |
| 220 | { | 219 | { |
| 221 | bool rcu_exit; | 220 | bool handled = false; |
| 221 | |||
| 222 | if (!is_valid_bugaddr(regs->ip)) | ||
| 223 | return handled; | ||
| 222 | 224 | ||
| 223 | /* | 225 | /* |
| 224 | * Handle BUG/WARN like NMIs instead of like normal idtentries: | 226 | * All lies, just get the WARN/BUG out. |
| 225 | * if we bugged/warned in a bad RCU context, for example, the last | 227 | */ |
| 226 | * thing we want is to BUG/WARN again in the idtentry code, ad | 228 | instrumentation_begin(); |
| 227 | * infinitum. | 229 | /* |
| 230 | * Since we're emulating a CALL with exceptions, restore the interrupt | ||
| 231 | * state to what it was at the exception site. | ||
| 228 | */ | 232 | */ |
| 229 | if (!user_mode(regs) && is_valid_bugaddr(regs->ip)) { | 233 | if (regs->flags & X86_EFLAGS_IF) |
| 230 | enum bug_trap_type type; | 234 | raw_local_irq_enable(); |
| 235 | if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN) { | ||
| 236 | regs->ip += LEN_UD2; | ||
| 237 | handled = true; | ||
| 238 | } | ||
| 239 | if (regs->flags & X86_EFLAGS_IF) | ||
| 240 | raw_local_irq_disable(); | ||
| 241 | instrumentation_end(); | ||
| 231 | 242 | ||
| 232 | nmi_enter(); | 243 | return handled; |
| 233 | instrumentation_begin(); | 244 | } |
| 234 | trace_hardirqs_off_finish(); | ||
| 235 | type = report_bug(regs->ip, regs); | ||
| 236 | if (regs->flags & X86_EFLAGS_IF) | ||
| 237 | trace_hardirqs_on_prepare(); | ||
| 238 | instrumentation_end(); | ||
| 239 | nmi_exit(); | ||
| 240 | 245 | ||
| 241 | if (type == BUG_TRAP_TYPE_WARN) { | 246 | DEFINE_IDTENTRY_RAW(exc_invalid_op) |
| 242 | /* Skip the ud2. */ | 247 | { |
| 243 | regs->ip += LEN_UD2; | 248 | bool rcu_exit; |
| 244 | return; | ||
| 245 | } | ||
| 246 | 249 | ||
| 247 | /* | 250 | /* |
| 248 | * Else, if this was a BUG and report_bug returns or if this | 251 | * We use UD2 as a short encoding for 'CALL __WARN', as such |
| 249 | * was just a normal #UD, we want to continue onward and | 252 | * handle it before exception entry to avoid recursive WARN |
| 250 | * crash. | 253 | * in case exception entry is the one triggering WARNs. |
| 251 | */ | 254 | */ |
| 252 | } | 255 | if (!user_mode(regs) && handle_bug(regs)) |
| 256 | return; | ||
| 253 | 257 | ||
| 254 | rcu_exit = idtentry_enter_cond_rcu(regs); | 258 | rcu_exit = idtentry_enter_cond_rcu(regs); |
| 255 | instrumentation_begin(); | 259 | instrumentation_begin(); |
| @@ -299,6 +303,8 @@ DEFINE_IDTENTRY_ERRORCODE(exc_alignment_check) · 43 unmodified lines | |||
| 299 | 303 | ||
| 300 | do_trap(X86_TRAP_AC, SIGBUS, "alignment check", regs, | 304 | do_trap(X86_TRAP_AC, SIGBUS, "alignment check", regs, |
| 301 | error_code, BUS_ADRALN, NULL); | 305 | error_code, BUS_ADRALN, NULL); |
| 306 | |||
| 307 | local_irq_disable(); | ||
| 302 | } | 308 | } |
| 303 | 309 | ||
| 304 | #ifdef CONFIG_VMAP_STACK | 310 | #ifdef CONFIG_VMAP_STACK |
| @@ -691,13 +697,13 @@ struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s) · 386 unmodified lines | |||
| 691 | (struct bad_iret_stack *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; | 697 | (struct bad_iret_stack *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; |
| 692 | 698 | ||
| 693 | /* Copy the IRET target to the temporary storage. */ | 699 | /* Copy the IRET target to the temporary storage. */ |
| 694 | memcpy(&tmp.regs.ip, (void *)s->regs.sp, 5*8); | 700 | __memcpy(&tmp.regs.ip, (void *)s->regs.sp, 5*8); |
| 695 | 701 | ||
| 696 | /* Copy the remainder of the stack from the current stack. */ | 702 | /* Copy the remainder of the stack from the current stack. */ |
| 697 | memcpy(&tmp, s, offsetof(struct bad_iret_stack, regs.ip)); | 703 | __memcpy(&tmp, s, offsetof(struct bad_iret_stack, regs.ip)); |
| 698 | 704 | ||
| 699 | /* Update the entry stack */ | 705 | /* Update the entry stack */ |
| 700 | memcpy(new_stack, &tmp, sizeof(tmp)); | 706 | __memcpy(new_stack, &tmp, sizeof(tmp)); |
| 701 | 707 | ||
| 702 | BUG_ON(!user_mode(&new_stack->regs)); | 708 | BUG_ON(!user_mode(&new_stack->regs)); |
| 703 | return new_stack; | 709 | return new_stack; |
| @@ -865,6 +871,12 @@ static __always_inline void exc_debug_kernel(struct pt_regs *regs, · 161 unmodified lines | |||
| 865 | instrumentation_begin(); | 871 | instrumentation_begin(); |
| 866 | trace_hardirqs_off_finish(); | 872 | trace_hardirqs_off_finish(); |
| 867 | 873 | ||
| 874 | /* | ||
| 875 | * If something gets miswired and we end up here for a user mode | ||
| 876 | * #DB, we will malfunction. | ||
| 877 | */ | ||
| 878 | WARN_ON_ONCE(user_mode(regs)); | ||
| 879 | |||
| 868 | /* | 880 | /* |
| 869 | * Catch SYSENTER with TF set and clear DR_STEP. If this hit a | 881 | * Catch SYSENTER with TF set and clear DR_STEP. If this hit a |
| 870 | * watchpoint at the same time then that will still be handled. | 882 | * watchpoint at the same time then that will still be handled. |
| @@ -883,6 +895,12 @@ static __always_inline void exc_debug_kernel(struct pt_regs *regs, · 12 unmodified lines | |||
| 883 | static __always_inline void exc_debug_user(struct pt_regs *regs, | 895 | static __always_inline void exc_debug_user(struct pt_regs *regs, |
| 884 | unsigned long dr6) | 896 | unsigned long dr6) |
| 885 | { | 897 | { |
| 898 | /* | ||
| 899 | * If something gets miswired and we end up here for a kernel mode | ||
| 900 | * #DB, we will malfunction. | ||
| 901 | */ | ||
| 902 | WARN_ON_ONCE(!user_mode(regs)); | ||
| 903 | |||
| 886 | idtentry_enter_user(regs); | 904 | idtentry_enter_user(regs); |
| 887 | instrumentation_begin(); | 905 | instrumentation_begin(); |
| 888 | 906 | ||
| @@ -913,7 +931,7 @@ DEFINE_IDTENTRY_DEBUG_USER(exc_debug) · 24 unmodified lines | |||
| 913 | } | 931 | } |
| 914 | #else | 932 | #else |
| 915 | /* 32 bit does not have separate entry points. */ | 933 | /* 32 bit does not have separate entry points. */ |
| 916 | DEFINE_IDTENTRY_DEBUG(exc_debug) | 934 | DEFINE_IDTENTRY_RAW(exc_debug) |
| 917 | { | 935 | { |
| 918 | unsigned long dr6, dr7; | 936 | unsigned long dr6, dr7; |
| 919 | 937 | ||
| @@ -7,7 +7,7 @@ · 6 unmodified lines | |||
| 7 | #define KVM_POSSIBLE_CR0_GUEST_BITS X86_CR0_TS | 7 | #define KVM_POSSIBLE_CR0_GUEST_BITS X86_CR0_TS |
| 8 | #define KVM_POSSIBLE_CR4_GUEST_BITS \ | 8 | #define KVM_POSSIBLE_CR4_GUEST_BITS \ |
| 9 | (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \ | 9 | (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \ |
| 10 | | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_PGE) | 10 | | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_PGE | X86_CR4_TSD) |
| 11 | 11 | ||
| 12 | #define BUILD_KVM_GPR_ACCESSORS(lname, uname) \ | 12 | #define BUILD_KVM_GPR_ACCESSORS(lname, uname) \ |
| 13 | static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\ | 13 | static __always_inline unsigned long kvm_##lname##_read(struct kvm_vcpu *vcpu)\ |
| @@ -169,6 +169,18 @@ static void kvm_apic_map_free(struct rcu_head *rcu) · 168 unmodified lines | |||
| 169 | kvfree(map); | 169 | kvfree(map); |
| 170 | } | 170 | } |
| 171 | 171 | ||
| 172 | /* | ||
| 173 | * CLEAN -> DIRTY and UPDATE_IN_PROGRESS -> DIRTY changes happen without a lock. | ||
| 174 | * | ||
| 175 | * DIRTY -> UPDATE_IN_PROGRESS and UPDATE_IN_PROGRESS -> CLEAN happen with | ||
| 176 | * apic_map_lock_held. | ||
| 177 | */ | ||
| 178 | enum { | ||
| 179 | CLEAN, | ||
| 180 | UPDATE_IN_PROGRESS, | ||
| 181 | DIRTY | ||
| 182 | }; | ||
| 183 | |||
| 172 | void kvm_recalculate_apic_map(struct kvm *kvm) | 184 | void kvm_recalculate_apic_map(struct kvm *kvm) |
| 173 | { | 185 | { |
| 174 | struct kvm_apic_map *new, *old = NULL; | 186 | struct kvm_apic_map *new, *old = NULL; |
| @@ -176,17 +188,17 @@ void kvm_recalculate_apic_map(struct kvm *kvm) · 1 unmodified line | |||
| 176 | int i; | 188 | int i; |
| 177 | u32 max_id = 255; /* enough space for any xAPIC ID */ | 189 | u32 max_id = 255; /* enough space for any xAPIC ID */ |
| 178 | 190 | ||
| 179 | if (!kvm->arch.apic_map_dirty) { | 191 | /* Read kvm->arch.apic_map_dirty before kvm->arch.apic_map. */ |
| 180 | /* | 192 | if (atomic_read_acquire(&kvm->arch.apic_map_dirty) == CLEAN) |
| 181 | * Read kvm->arch.apic_map_dirty before | ||
| 182 | * kvm->arch.apic_map | ||
| 183 | */ | ||
| 184 | smp_rmb(); | ||
| 185 | return; | 193 | return; |
| 186 | } | ||
| 187 | 194 | ||
| 188 | mutex_lock(&kvm->arch.apic_map_lock); | 195 | mutex_lock(&kvm->arch.apic_map_lock); |
| 189 | if (!kvm->arch.apic_map_dirty) { | 196 | /* |
| 197 | * Read kvm->arch.apic_map_dirty before kvm->arch.apic_map | ||
| 198 | * (if clean) or the APIC registers (if dirty). | ||
| 199 | */ | ||
| 200 | if (atomic_cmpxchg_acquire(&kvm->arch.apic_map_dirty, | ||
| 201 | DIRTY, UPDATE_IN_PROGRESS) == CLEAN) { | ||
| 190 | /* Someone else has updated the map. */ | 202 | /* Someone else has updated the map. */ |
| 191 | mutex_unlock(&kvm->arch.apic_map_lock); | 203 | mutex_unlock(&kvm->arch.apic_map_lock); |
| 192 | return; | 204 | return; |
| @@ -256,11 +268,11 @@ out: · 63 unmodified lines | |||
| 256 | lockdep_is_held(&kvm->arch.apic_map_lock)); | 268 | lockdep_is_held(&kvm->arch.apic_map_lock)); |
| 257 | rcu_assign_pointer(kvm->arch.apic_map, new); | 269 | rcu_assign_pointer(kvm->arch.apic_map, new); |
| 258 | /* | 270 | /* |
| 259 | * Write kvm->arch.apic_map before | 271 | * Write kvm->arch.apic_map before clearing apic->apic_map_dirty. |
| 260 | * clearing apic->apic_map_dirty | 272 | * If another update has come in, leave it DIRTY. |
| 261 | */ | 273 | */ |
| 262 | smp_wmb(); | 274 | atomic_cmpxchg_release(&kvm->arch.apic_map_dirty, |
| 263 | kvm->arch.apic_map_dirty = false; | 275 | UPDATE_IN_PROGRESS, CLEAN); |
| 264 | mutex_unlock(&kvm->arch.apic_map_lock); | 276 | mutex_unlock(&kvm->arch.apic_map_lock); |
| 265 | 277 | ||
| 266 | if (old) | 278 | if (old) |
| @@ -282,20 +294,20 @@ static inline void apic_set_spiv(struct kvm_lapic *apic, u32 val) · 15 unmodified lines | |||
| 282 | else | 294 | else |
| 283 | static_key_slow_inc(&apic_sw_disabled.key); | 295 | static_key_slow_inc(&apic_sw_disabled.key); |
| 284 | 296 | ||
| 285 | apic->vcpu->kvm->arch.apic_map_dirty = true; | 297 | atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); |
| 286 | } | 298 | } |
| 287 | } | 299 | } |
| 288 | 300 | ||
| 289 | static inline void kvm_apic_set_xapic_id(struct kvm_lapic *apic, u8 id) | 301 | static inline void kvm_apic_set_xapic_id(struct kvm_lapic *apic, u8 id) |
| 290 | { | 302 | { |
| 291 | kvm_lapic_set_reg(apic, APIC_ID, id << 24); | 303 | kvm_lapic_set_reg(apic, APIC_ID, id << 24); |
| 292 | apic->vcpu->kvm->arch.apic_map_dirty = true; | 304 | atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); |
| 293 | } | 305 | } |
| 294 | 306 | ||
| 295 | static inline void kvm_apic_set_ldr(struct kvm_lapic *apic, u32 id) | 307 | static inline void kvm_apic_set_ldr(struct kvm_lapic *apic, u32 id) |
| 296 | { | 308 | { |
| 297 | kvm_lapic_set_reg(apic, APIC_LDR, id); | 309 | kvm_lapic_set_reg(apic, APIC_LDR, id); |
| 298 | apic->vcpu->kvm->arch.apic_map_dirty = true; | 310 | atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); |
| 299 | } | 311 | } |
| 300 | 312 | ||
| 301 | static inline u32 kvm_apic_calc_x2apic_ldr(u32 id) | 313 | static inline u32 kvm_apic_calc_x2apic_ldr(u32 id) |
| @@ -311,7 +323,7 @@ static inline void kvm_apic_set_x2apic_id(struct kvm_lapic *apic, u32 id) · 9 unmodified lines | |||
| 311 | 323 | ||
| 312 | kvm_lapic_set_reg(apic, APIC_ID, id); | 324 | kvm_lapic_set_reg(apic, APIC_ID, id); |
| 313 | kvm_lapic_set_reg(apic, APIC_LDR, ldr); | 325 | kvm_lapic_set_reg(apic, APIC_LDR, ldr); |
| 314 | apic->vcpu->kvm->arch.apic_map_dirty = true; | 326 | atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); |
| 315 | } | 327 | } |
| 316 | 328 | ||
| 317 | static inline int apic_lvt_enabled(struct kvm_lapic *apic, int lvt_type) | 329 | static inline int apic_lvt_enabled(struct kvm_lapic *apic, int lvt_type) |
| @@ -1976,7 +1988,7 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) · 1658 unmodified lines | |||
| 1976 | case APIC_DFR: | 1988 | case APIC_DFR: |
| 1977 | if (!apic_x2apic_mode(apic)) { | 1989 | if (!apic_x2apic_mode(apic)) { |
| 1978 | kvm_lapic_set_reg(apic, APIC_DFR, val | 0x0FFFFFFF); | 1990 | kvm_lapic_set_reg(apic, APIC_DFR, val | 0x0FFFFFFF); |
| 1979 | apic->vcpu->kvm->arch.apic_map_dirty = true; | 1991 | atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); |
| 1980 | } else | 1992 | } else |
| 1981 | ret = 1; | 1993 | ret = 1; |
| 1982 | break; | 1994 | break; |
| @@ -2232,7 +2244,7 @@ void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value) · 249 unmodified lines | |||
| 2232 | static_key_slow_dec_deferred(&apic_hw_disabled); | 2244 | static_key_slow_dec_deferred(&apic_hw_disabled); |
| 2233 | } else { | 2245 | } else { |
| 2234 | static_key_slow_inc(&apic_hw_disabled.key); | 2246 | static_key_slow_inc(&apic_hw_disabled.key); |
| 2235 | vcpu->kvm->arch.apic_map_dirty = true; | 2247 | atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); |
| 2236 | } | 2248 | } |
| 2237 | } | 2249 | } |
| 2238 | 2250 | ||
| @@ -2273,7 +2285,6 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) · 34 unmodified lines | |||
| 2273 | if (!apic) | 2285 | if (!apic) |
| 2274 | return; | 2286 | return; |
| 2275 | 2287 | ||
| 2276 | vcpu->kvm->arch.apic_map_dirty = false; | ||
| 2277 | /* Stop the timer in case it's a reset to an active apic */ | 2288 | /* Stop the timer in case it's a reset to an active apic */ |
| 2278 | hrtimer_cancel(&apic->lapic_timer.timer); | 2289 | hrtimer_cancel(&apic->lapic_timer.timer); |
| 2279 | 2290 | ||
| @@ -2567,6 +2578,7 @@ int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s) · 287 unmodified lines | |||
| 2567 | } | 2578 | } |
| 2568 | memcpy(vcpu->arch.apic->regs, s->regs, sizeof(*s)); | 2579 | memcpy(vcpu->arch.apic->regs, s->regs, sizeof(*s)); |
| 2569 | 2580 | ||
| 2581 | atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); | ||
| 2570 | kvm_recalculate_apic_map(vcpu->kvm); | 2582 | kvm_recalculate_apic_map(vcpu->kvm); |
| 2571 | kvm_apic_set_version(vcpu); | 2583 | kvm_apic_set_version(vcpu); |
| 2572 | 2584 | ||
| @@ -222,7 +222,7 @@ void kvm_mmu_gfn_disallow_lpage(struct kvm_memory_slot *slot, gfn_t gfn); · 221 unmodified lines | |||
| 222 | void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn); | 222 | void kvm_mmu_gfn_allow_lpage(struct kvm_memory_slot *slot, gfn_t gfn); |
| 223 | bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, | 223 | bool kvm_mmu_slot_gfn_write_protect(struct kvm *kvm, |
| 224 | struct kvm_memory_slot *slot, u64 gfn); | 224 | struct kvm_memory_slot *slot, u64 gfn); |
| 225 | int kvm_arch_write_log_dirty(struct kvm_vcpu *vcpu); | 225 | int kvm_arch_write_log_dirty(struct kvm_vcpu *vcpu, gpa_t l2_gpa); |
| 226 | 226 | ||
| 227 | int kvm_mmu_post_init_vm(struct kvm *kvm); | 227 | int kvm_mmu_post_init_vm(struct kvm *kvm); |
| 228 | void kvm_mmu_pre_destroy_vm(struct kvm *kvm); | 228 | void kvm_mmu_pre_destroy_vm(struct kvm *kvm); |
| @@ -1745,10 +1745,10 @@ void kvm_arch_mmu_enable_log_dirty_pt_masked(struct kvm *kvm, · 1744 unmodified lines | |||
| 1745 | * Emulate arch specific page modification logging for the | 1745 | * Emulate arch specific page modification logging for the |
| 1746 | * nested hypervisor | 1746 | * nested hypervisor |
| 1747 | */ | 1747 | */ |
| 1748 | int kvm_arch_write_log_dirty(struct kvm_vcpu *vcpu) | 1748 | int kvm_arch_write_log_dirty(struct kvm_vcpu *vcpu, gpa_t l2_gpa) |
| 1749 | { | 1749 | { |
| 1750 | if (kvm_x86_ops.write_log_dirty) | 1750 | if (kvm_x86_ops.write_log_dirty) |
| 1751 | return kvm_x86_ops.write_log_dirty(vcpu); | 1751 | return kvm_x86_ops.write_log_dirty(vcpu, l2_gpa); |
| 1752 | 1752 | ||
| 1753 | return 0; | 1753 | return 0; |
| 1754 | } | 1754 | } |
| @@ -4449,7 +4449,7 @@ __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, · 2694 unmodified lines | |||
| 4449 | nonleaf_bit8_rsvd | rsvd_bits(7, 7) | | 4449 | nonleaf_bit8_rsvd | rsvd_bits(7, 7) | |
| 4450 | rsvd_bits(maxphyaddr, 51); | 4450 | rsvd_bits(maxphyaddr, 51); |
| 4451 | rsvd_check->rsvd_bits_mask[0][2] = exb_bit_rsvd | | 4451 | rsvd_check->rsvd_bits_mask[0][2] = exb_bit_rsvd | |
| 4452 | nonleaf_bit8_rsvd | gbpages_bit_rsvd | | 4452 | gbpages_bit_rsvd | |
| 4453 | rsvd_bits(maxphyaddr, 51); | 4453 | rsvd_bits(maxphyaddr, 51); |
| 4454 | rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd | | 4454 | rsvd_check->rsvd_bits_mask[0][1] = exb_bit_rsvd | |
| 4455 | rsvd_bits(maxphyaddr, 51); | 4455 | rsvd_bits(maxphyaddr, 51); |
| @@ -235,7 +235,7 @@ static inline unsigned FNAME(gpte_access)(u64 gpte) · 234 unmodified lines | |||
| 235 | static int FNAME(update_accessed_dirty_bits)(struct kvm_vcpu *vcpu, | 235 | static int FNAME(update_accessed_dirty_bits)(struct kvm_vcpu *vcpu, |
| 236 | struct kvm_mmu *mmu, | 236 | struct kvm_mmu *mmu, |
| 237 | struct guest_walker *walker, | 237 | struct guest_walker *walker, |
| 238 | int write_fault) | 238 | gpa_t addr, int write_fault) |
| 239 | { | 239 | { |
| 240 | unsigned level, index; | 240 | unsigned level, index; |
| 241 | pt_element_t pte, orig_pte; | 241 | pt_element_t pte, orig_pte; |
| @@ -260,7 +260,7 @@ static int FNAME(update_accessed_dirty_bits)(struct kvm_vcpu *vcpu, · 18 unmodified lines | |||
| 260 | !(pte & PT_GUEST_DIRTY_MASK)) { | 260 | !(pte & PT_GUEST_DIRTY_MASK)) { |
| 261 | trace_kvm_mmu_set_dirty_bit(table_gfn, index, sizeof(pte)); | 261 | trace_kvm_mmu_set_dirty_bit(table_gfn, index, sizeof(pte)); |
| 262 | #if PTTYPE == PTTYPE_EPT | 262 | #if PTTYPE == PTTYPE_EPT |
| 263 | if (kvm_arch_write_log_dirty(vcpu)) | 263 | if (kvm_arch_write_log_dirty(vcpu, addr)) |
| 264 | return -EINVAL; | 264 | return -EINVAL; |
| 265 | #endif | 265 | #endif |
| 266 | pte |= PT_GUEST_DIRTY_MASK; | 266 | pte |= PT_GUEST_DIRTY_MASK; |
| @@ -360,7 +360,6 @@ retry_walk: · 93 unmodified lines | |||
| 360 | ++walker->level; | 360 | ++walker->level; |
| 361 | 361 | ||
| 362 | do { | 362 | do { |
| 363 | gfn_t real_gfn; | ||
| 364 | unsigned long host_addr; | 363 | unsigned long host_addr; |
| 365 | 364 | ||
| 366 | pt_access = pte_access; | 365 | pt_access = pte_access; |
| @@ -375,7 +374,7 @@ retry_walk: · 8 unmodified lines | |||
| 375 | walker->table_gfn[walker->level - 1] = table_gfn; | 374 | walker->table_gfn[walker->level - 1] = table_gfn; |
| 376 | walker->pte_gpa[walker->level - 1] = pte_gpa; | 375 | walker->pte_gpa[walker->level - 1] = pte_gpa; |
| 377 | 376 | ||
| 378 | real_gfn = mmu->translate_gpa(vcpu, gfn_to_gpa(table_gfn), | 377 | real_gpa = mmu->translate_gpa(vcpu, gfn_to_gpa(table_gfn), |
| 379 | nested_access, | 378 | nested_access, |
| 380 | &walker->fault); | 379 | &walker->fault); |
| 381 | 380 | ||
| @@ -389,12 +388,10 @@ retry_walk: · 7 unmodified lines | |||
| 389 | * information to fix the exit_qualification or exit_info_1 | 388 | * information to fix the exit_qualification or exit_info_1 |
| 390 | * fields. | 389 | * fields. |
| 391 | */ | 390 | */ |
| 392 | if (unlikely(real_gfn == UNMAPPED_GVA)) | 391 | if (unlikely(real_gpa == UNMAPPED_GVA)) |
| 393 | return 0; | 392 | return 0; |
| 394 | 393 | ||
| 395 | real_gfn = gpa_to_gfn(real_gfn); | 394 | host_addr = kvm_vcpu_gfn_to_hva_prot(vcpu, gpa_to_gfn(real_gpa), |
| 396 | |||
| 397 | host_addr = kvm_vcpu_gfn_to_hva_prot(vcpu, real_gfn, | ||
| 398 | &walker->pte_writable[walker->level - 1]); | 395 | &walker->pte_writable[walker->level - 1]); |
| 399 | if (unlikely(kvm_is_error_hva(host_addr))) | 396 | if (unlikely(kvm_is_error_hva(host_addr))) |
| 400 | goto error; | 397 | goto error; |
| @@ -457,7 +454,8 @@ retry_walk: · 56 unmodified lines | |||
| 457 | (PT_GUEST_DIRTY_SHIFT - PT_GUEST_ACCESSED_SHIFT); | 454 | (PT_GUEST_DIRTY_SHIFT - PT_GUEST_ACCESSED_SHIFT); |
| 458 | 455 | ||
| 459 | if (unlikely(!accessed_dirty)) { | 456 | if (unlikely(!accessed_dirty)) { |
| 460 | ret = FNAME(update_accessed_dirty_bits)(vcpu, mmu, walker, write_fault); | 457 | ret = FNAME(update_accessed_dirty_bits)(vcpu, mmu, walker, |
| 458 | addr, write_fault); | ||
| 461 | if (unlikely(ret < 0)) | 459 | if (unlikely(ret < 0)) |
| 462 | goto error; | 460 | goto error; |
| 463 | else if (ret) | 461 | else if (ret) |
| @@ -3344,7 +3344,7 @@ static fastpath_t svm_exit_handlers_fastpath(struct kvm_vcpu *vcpu) · 3343 unmodified lines | |||
| 3344 | 3344 | ||
| 3345 | void __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs); | 3345 | void __svm_vcpu_run(unsigned long vmcb_pa, unsigned long *regs); |
| 3346 | 3346 | ||
| 3347 | static fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu) | 3347 | static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu) |
| 3348 | { | 3348 | { |
| 3349 | fastpath_t exit_fastpath; | 3349 | fastpath_t exit_fastpath; |
| 3350 | struct vcpu_svm *svm = to_svm(vcpu); | 3350 | struct vcpu_svm *svm = to_svm(vcpu); |
| @@ -4109,7 +4109,7 @@ static void load_vmcs12_host_state(struct kvm_vcpu *vcpu, · 4108 unmodified lines | |||
| 4109 | * CR0_GUEST_HOST_MASK is already set in the original vmcs01 | 4109 | * CR0_GUEST_HOST_MASK is already set in the original vmcs01 |
| 4110 | * (KVM doesn't change it); | 4110 | * (KVM doesn't change it); |
| 4111 | */ | 4111 | */ |
| 4112 | vcpu->arch.cr0_guest_owned_bits = X86_CR0_TS; | 4112 | vcpu->arch.cr0_guest_owned_bits = KVM_POSSIBLE_CR0_GUEST_BITS; |
| 4113 | vmx_set_cr0(vcpu, vmcs12->host_cr0); | 4113 | vmx_set_cr0(vcpu, vmcs12->host_cr0); |
| 4114 | 4114 | ||
| 4115 | /* Same as above - no reason to call set_cr4_guest_host_mask(). */ | 4115 | /* Same as above - no reason to call set_cr4_guest_host_mask(). */ |
| @@ -4259,7 +4259,7 @@ static void nested_vmx_restore_host_state(struct kvm_vcpu *vcpu) · 143 unmodified lines | |||
| 4259 | */ | 4259 | */ |
| 4260 | vmx_set_efer(vcpu, nested_vmx_get_vmcs01_guest_efer(vmx)); | 4260 | vmx_set_efer(vcpu, nested_vmx_get_vmcs01_guest_efer(vmx)); |
| 4261 | 4261 | ||
| 4262 | vcpu->arch.cr0_guest_owned_bits = X86_CR0_TS; | 4262 | vcpu->arch.cr0_guest_owned_bits = KVM_POSSIBLE_CR0_GUEST_BITS; |
| 4263 | vmx_set_cr0(vcpu, vmcs_readl(CR0_READ_SHADOW)); | 4263 | vmx_set_cr0(vcpu, vmcs_readl(CR0_READ_SHADOW)); |
| 4264 | 4264 | ||
| 4265 | vcpu->arch.cr4_guest_owned_bits = ~vmcs_readl(CR4_GUEST_HOST_MASK); | 4265 | vcpu->arch.cr4_guest_owned_bits = ~vmcs_readl(CR4_GUEST_HOST_MASK); |
| @@ -6176,6 +6176,7 @@ static int vmx_set_nested_state(struct kvm_vcpu *vcpu, · 1910 unmodified lines | |||
| 6176 | goto error_guest_mode; | 6176 | goto error_guest_mode; |
| 6177 | } | 6177 | } |
| 6178 | 6178 | ||
| 6179 | vmx->nested.has_preemption_timer_deadline = false; | ||
| 6179 | if (kvm_state->hdr.vmx.flags & KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE) { | 6180 | if (kvm_state->hdr.vmx.flags & KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE) { |
| 6180 | vmx->nested.has_preemption_timer_deadline = true; | 6181 | vmx->nested.has_preemption_timer_deadline = true; |
| 6181 | vmx->nested.preemption_timer_deadline = | 6182 | vmx->nested.preemption_timer_deadline = |
| @@ -72,11 +72,24 @@ struct loaded_vmcs { · 71 unmodified lines | |||
| 72 | struct vmcs_controls_shadow controls_shadow; | 72 | struct vmcs_controls_shadow controls_shadow; |
| 73 | }; | 73 | }; |
| 74 | 74 | ||
| 75 | static inline bool is_intr_type(u32 intr_info, u32 type) | ||
| 76 | { | ||
| 77 | const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK; | ||
| 78 | |||
| 79 | return (intr_info & mask) == (INTR_INFO_VALID_MASK | type); | ||
| 80 | } | ||
| 81 | |||
| 82 | static inline bool is_intr_type_n(u32 intr_info, u32 type, u8 vector) | ||
| 83 | { | ||
| 84 | const u32 mask = INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK | | ||
| 85 | INTR_INFO_VECTOR_MASK; | ||
| 86 | |||
| 87 | return (intr_info & mask) == (INTR_INFO_VALID_MASK | type | vector); | ||
| 88 | } | ||
| 89 | |||
| 75 | static inline bool is_exception_n(u32 intr_info, u8 vector) | 90 | static inline bool is_exception_n(u32 intr_info, u8 vector) |
| 76 | { | 91 | { |
| 77 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | | 92 | return is_intr_type_n(intr_info, INTR_TYPE_HARD_EXCEPTION, vector); |
| 78 | INTR_INFO_VALID_MASK)) == | ||
| 79 | (INTR_TYPE_HARD_EXCEPTION | vector | INTR_INFO_VALID_MASK); | ||
| 80 | } | 93 | } |
| 81 | 94 | ||
| 82 | static inline bool is_debug(u32 intr_info) | 95 | static inline bool is_debug(u32 intr_info) |
| @@ -106,28 +119,23 @@ static inline bool is_gp_fault(u32 intr_info) · 23 unmodified lines | |||
| 106 | 119 | ||
| 107 | static inline bool is_machine_check(u32 intr_info) | 120 | static inline bool is_machine_check(u32 intr_info) |
| 108 | { | 121 | { |
| 109 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK | | 122 | return is_exception_n(intr_info, MC_VECTOR); |
| 110 | INTR_INFO_VALID_MASK)) == | ||
| 111 | (INTR_TYPE_HARD_EXCEPTION | MC_VECTOR | INTR_INFO_VALID_MASK); | ||
| 112 | } | 123 | } |
| 113 | 124 | ||
| 114 | /* Undocumented: icebp/int1 */ | 125 | /* Undocumented: icebp/int1 */ |
| 115 | static inline bool is_icebp(u32 intr_info) | 126 | static inline bool is_icebp(u32 intr_info) |
| 116 | { | 127 | { |
| 117 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK)) | 128 | return is_intr_type(intr_info, INTR_TYPE_PRIV_SW_EXCEPTION); |
| 118 | == (INTR_TYPE_PRIV_SW_EXCEPTION | INTR_INFO_VALID_MASK); | ||
| 119 | } | 129 | } |
| 120 | 130 | ||
| 121 | static inline bool is_nmi(u32 intr_info) | 131 | static inline bool is_nmi(u32 intr_info) |
| 122 | { | 132 | { |
| 123 | return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK)) | 133 | return is_intr_type(intr_info, INTR_TYPE_NMI_INTR); |
| 124 | == (INTR_TYPE_NMI_INTR | INTR_INFO_VALID_MASK); | ||
| 125 | } | 134 | } |
| 126 | 135 | ||
| 127 | static inline bool is_external_intr(u32 intr_info) | 136 | static inline bool is_external_intr(u32 intr_info) |
| 128 | { | 137 | { |
| 129 | return (intr_info & (INTR_INFO_VALID_MASK | INTR_INFO_INTR_TYPE_MASK)) | 138 | return is_intr_type(intr_info, INTR_TYPE_EXT_INTR); |
| 130 | == (INTR_INFO_VALID_MASK | INTR_TYPE_EXT_INTR); | ||
| 131 | } | 139 | } |
| 132 | 140 | ||
| 133 | enum vmcs_field_width { | 141 | enum vmcs_field_width { |
| @@ -133,9 +133,6 @@ module_param_named(preemption_timer, enable_preemption_timer, bool, S_IRUGO); · 132 unmodified lines | |||
| 133 | #define KVM_VM_CR0_ALWAYS_ON \ | 133 | #define KVM_VM_CR0_ALWAYS_ON \ |
| 134 | (KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | \ | 134 | (KVM_VM_CR0_ALWAYS_ON_UNRESTRICTED_GUEST | \ |
| 135 | X86_CR0_WP | X86_CR0_PG | X86_CR0_PE) | 135 | X86_CR0_WP | X86_CR0_PG | X86_CR0_PE) |
| 136 | #define KVM_CR4_GUEST_OWNED_BITS \ | ||
| 137 | (X86_CR4_PVI | X86_CR4_DE | X86_CR4_PCE | X86_CR4_OSFXSR \ | ||
| 138 | | X86_CR4_OSXMMEXCPT | X86_CR4_LA57 | X86_CR4_TSD) | ||
| 139 | 136 | ||
| 140 | #define KVM_VM_CR4_ALWAYS_ON_UNRESTRICTED_GUEST X86_CR4_VMXE | 137 | #define KVM_VM_CR4_ALWAYS_ON_UNRESTRICTED_GUEST X86_CR4_VMXE |
| 141 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) | 138 | #define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE) |
| @@ -4034,9 +4031,9 @@ void vmx_set_constant_host_state(struct vcpu_vmx *vmx) · 3892 unmodified lines | |||
| 4034 | 4031 | ||
| 4035 | void set_cr4_guest_host_mask(struct vcpu_vmx *vmx) | 4032 | void set_cr4_guest_host_mask(struct vcpu_vmx *vmx) |
| 4036 | { | 4033 | { |
| 4037 | vmx->vcpu.arch.cr4_guest_owned_bits = KVM_CR4_GUEST_OWNED_BITS; | 4034 | vmx->vcpu.arch.cr4_guest_owned_bits = KVM_POSSIBLE_CR4_GUEST_BITS; |
| 4038 | if (enable_ept) | 4035 | if (!enable_ept) |
| 4039 | vmx->vcpu.arch.cr4_guest_owned_bits |= X86_CR4_PGE; | 4036 | vmx->vcpu.arch.cr4_guest_owned_bits &= ~X86_CR4_PGE; |
| 4040 | if (is_guest_mode(&vmx->vcpu)) | 4037 | if (is_guest_mode(&vmx->vcpu)) |
| 4041 | vmx->vcpu.arch.cr4_guest_owned_bits &= | 4038 | vmx->vcpu.arch.cr4_guest_owned_bits &= |
| 4042 | ~get_vmcs12(&vmx->vcpu)->cr4_guest_host_mask; | 4039 | ~get_vmcs12(&vmx->vcpu)->cr4_guest_host_mask; |
| @@ -4333,8 +4330,8 @@ static void init_vmcs(struct vcpu_vmx *vmx) · 290 unmodified lines | |||
| 4333 | /* 22.2.1, 20.8.1 */ | 4330 | /* 22.2.1, 20.8.1 */ |
| 4334 | vm_entry_controls_set(vmx, vmx_vmentry_ctrl()); | 4331 | vm_entry_controls_set(vmx, vmx_vmentry_ctrl()); |
| 4335 | 4332 | ||
| 4336 | vmx->vcpu.arch.cr0_guest_owned_bits = X86_CR0_TS; | 4333 | vmx->vcpu.arch.cr0_guest_owned_bits = KVM_POSSIBLE_CR0_GUEST_BITS; |
| 4337 | vmcs_writel(CR0_GUEST_HOST_MASK, ~X86_CR0_TS); | 4334 | vmcs_writel(CR0_GUEST_HOST_MASK, ~vmx->vcpu.arch.cr0_guest_owned_bits); |
| 4338 | 4335 | ||
| 4339 | set_cr4_guest_host_mask(vmx); | 4336 | set_cr4_guest_host_mask(vmx); |
| 4340 | 4337 | ||
| @@ -6606,23 +6603,6 @@ static void atomic_switch_perf_msrs(struct vcpu_vmx *vmx) · 2265 unmodified lines | |||
| 6606 | msrs[i].host, false); | 6603 | msrs[i].host, false); |
| 6607 | } | 6604 | } |
| 6608 | 6605 | ||
| 6609 | static void atomic_switch_umwait_control_msr(struct vcpu_vmx *vmx) | ||
| 6610 | { | ||
| 6611 | u32 host_umwait_control; | ||
| 6612 | |||
| 6613 | if (!vmx_has_waitpkg(vmx)) | ||
| 6614 | return; | ||
| 6615 | |||
| 6616 | host_umwait_control = get_umwait_control_msr(); | ||
| 6617 | |||
| 6618 | if (vmx->msr_ia32_umwait_control != host_umwait_control) | ||
| 6619 | add_atomic_switch_msr(vmx, MSR_IA32_UMWAIT_CONTROL, | ||
| 6620 | vmx->msr_ia32_umwait_control, | ||
| 6621 | host_umwait_control, false); | ||
| 6622 | else | ||
| 6623 | clear_atomic_switch_msr(vmx, MSR_IA32_UMWAIT_CONTROL); | ||
| 6624 | } | ||
| 6625 | |||
| 6626 | static void vmx_update_hv_timer(struct kvm_vcpu *vcpu) | 6606 | static void vmx_update_hv_timer(struct kvm_vcpu *vcpu) |
| 6627 | { | 6607 | { |
| 6628 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 6608 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| @@ -6728,9 +6708,7 @@ reenter_guest: · 99 unmodified lines | |||
| 6728 | 6708 | ||
| 6729 | pt_guest_enter(vmx); | 6709 | pt_guest_enter(vmx); |
| 6730 | 6710 | ||
| 6731 | if (vcpu_to_pmu(vcpu)->version) | 6711 | atomic_switch_perf_msrs(vmx); |
| 6732 | atomic_switch_perf_msrs(vmx); | ||
| 6733 | atomic_switch_umwait_control_msr(vmx); | ||
| 6734 | 6712 | ||
| 6735 | if (enable_preemption_timer) | 6713 | if (enable_preemption_timer) |
| 6736 | vmx_update_hv_timer(vcpu); | 6714 | vmx_update_hv_timer(vcpu); |
| @@ -7501,11 +7479,11 @@ static void vmx_flush_log_dirty(struct kvm *kvm) · 764 unmodified lines | |||
| 7501 | kvm_flush_pml_buffers(kvm); | 7479 | kvm_flush_pml_buffers(kvm); |
| 7502 | } | 7480 | } |
| 7503 | 7481 | ||
| 7504 | static int vmx_write_pml_buffer(struct kvm_vcpu *vcpu) | 7482 | static int vmx_write_pml_buffer(struct kvm_vcpu *vcpu, gpa_t gpa) |
| 7505 | { | 7483 | { |
| 7506 | struct vmcs12 *vmcs12; | 7484 | struct vmcs12 *vmcs12; |
| 7507 | struct vcpu_vmx *vmx = to_vmx(vcpu); | 7485 | struct vcpu_vmx *vmx = to_vmx(vcpu); |
| 7508 | gpa_t gpa, dst; | 7486 | gpa_t dst; |
| 7509 | 7487 | ||
| 7510 | if (is_guest_mode(vcpu)) { | 7488 | if (is_guest_mode(vcpu)) { |
| 7511 | WARN_ON_ONCE(vmx->nested.pml_full); | 7489 | WARN_ON_ONCE(vmx->nested.pml_full); |
| @@ -7524,7 +7502,7 @@ static int vmx_write_pml_buffer(struct kvm_vcpu *vcpu) · 12 unmodified lines | |||
| 7524 | return 1; | 7502 | return 1; |
| 7525 | } | 7503 | } |
| 7526 | 7504 | ||
| 7527 | gpa = vmcs_read64(GUEST_PHYSICAL_ADDRESS) & ~0xFFFull; | 7505 | gpa &= ~0xFFFull; |
| 7528 | dst = vmcs12->pml_address + sizeof(u64) * vmcs12->guest_pml_index; | 7506 | dst = vmcs12->pml_address + sizeof(u64) * vmcs12->guest_pml_index; |
| 7529 | 7507 | ||
| 7530 | if (kvm_write_guest_page(vcpu->kvm, gpa_to_gfn(dst), &gpa, | 7508 | if (kvm_write_guest_page(vcpu->kvm, gpa_to_gfn(dst), &gpa, |
| @@ -288,8 +288,6 @@ struct vcpu_vmx { · 287 unmodified lines | |||
| 288 | 288 | ||
| 289 | u64 current_tsc_ratio; | 289 | u64 current_tsc_ratio; |
| 290 | 290 | ||
| 291 | u32 host_pkru; | ||
| 292 | |||
| 293 | unsigned long host_debugctlmsr; | 291 | unsigned long host_debugctlmsr; |
| 294 | 292 | ||
| 295 | /* | 293 | /* |
| @@ -975,6 +975,8 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) · 974 unmodified lines | |||
| 975 | if (is_long_mode(vcpu)) { | 975 | if (is_long_mode(vcpu)) { |
| 976 | if (!(cr4 & X86_CR4_PAE)) | 976 | if (!(cr4 & X86_CR4_PAE)) |
| 977 | return 1; | 977 | return 1; |
| 978 | if ((cr4 ^ old_cr4) & X86_CR4_LA57) | ||
| 979 | return 1; | ||
| 978 | } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE) | 980 | } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE) |
| 979 | && ((cr4 ^ old_cr4) & pdptr_bits) | 981 | && ((cr4 ^ old_cr4) & pdptr_bits) |
| 980 | && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, | 982 | && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, |
| @@ -2693,6 +2695,9 @@ static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data) · 1712 unmodified lines | |||
| 2693 | if (data & 0x30) | 2695 | if (data & 0x30) |
| 2694 | return 1; | 2696 | return 1; |
| 2695 | 2697 | ||
| 2698 | if (!lapic_in_kernel(vcpu)) | ||
| 2699 | return 1; | ||
| 2700 | |||
| 2696 | vcpu->arch.apf.msr_en_val = data; | 2701 | vcpu->arch.apf.msr_en_val = data; |
| 2697 | 2702 | ||
| 2698 | if (!kvm_pv_async_pf_enabled(vcpu)) { | 2703 | if (!kvm_pv_async_pf_enabled(vcpu)) { |
| @@ -2856,7 +2861,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 157 unmodified lines | |||
| 2856 | return kvm_mtrr_set_msr(vcpu, msr, data); | 2861 | return kvm_mtrr_set_msr(vcpu, msr, data); |
| 2857 | case MSR_IA32_APICBASE: | 2862 | case MSR_IA32_APICBASE: |
| 2858 | return kvm_set_apic_base(vcpu, msr_info); | 2863 | return kvm_set_apic_base(vcpu, msr_info); |
| 2859 | case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff: | 2864 | case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff: |
| 2860 | return kvm_x2apic_msr_write(vcpu, msr, data); | 2865 | return kvm_x2apic_msr_write(vcpu, msr, data); |
| 2861 | case MSR_IA32_TSCDEADLINE: | 2866 | case MSR_IA32_TSCDEADLINE: |
| 2862 | kvm_set_lapic_tscdeadline_msr(vcpu, data); | 2867 | kvm_set_lapic_tscdeadline_msr(vcpu, data); |
| @@ -3196,7 +3201,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 333 unmodified lines | |||
| 3196 | case MSR_IA32_APICBASE: | 3201 | case MSR_IA32_APICBASE: |
| 3197 | msr_info->data = kvm_get_apic_base(vcpu); | 3202 | msr_info->data = kvm_get_apic_base(vcpu); |
| 3198 | break; | 3203 | break; |
| 3199 | case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff: | 3204 | case APIC_BASE_MSR ... APIC_BASE_MSR + 0xff: |
| 3200 | return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data); | 3205 | return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data); |
| 3201 | case MSR_IA32_TSCDEADLINE: | 3206 | case MSR_IA32_TSCDEADLINE: |
| 3202 | msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu); | 3207 | msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu); |
| @@ -4603,7 +4608,8 @@ long kvm_arch_vcpu_ioctl(struct file *filp, · 1400 unmodified lines | |||
| 4603 | r = -EINVAL; | 4608 | r = -EINVAL; |
| 4604 | user_tsc_khz = (u32)arg; | 4609 | user_tsc_khz = (u32)arg; |
| 4605 | 4610 | ||
| 4606 | if (user_tsc_khz >= kvm_max_guest_tsc_khz) | 4611 | if (kvm_has_tsc_control && |
| 4612 | user_tsc_khz >= kvm_max_guest_tsc_khz) | ||
| 4607 | goto out; | 4613 | goto out; |
| 4608 | 4614 | ||
| 4609 | if (user_tsc_khz == 0) | 4615 | if (user_tsc_khz == 0) |
| @@ -8,6 +8,8 @@ · 7 unmodified lines | |||
| 8 | #include <asm/alternative-asm.h> | 8 | #include <asm/alternative-asm.h> |
| 9 | #include <asm/export.h> | 9 | #include <asm/export.h> |
| 10 | 10 | ||
| 11 | .pushsection .noinstr.text, "ax" | ||
| 12 | |||
| 11 | /* | 13 | /* |
| 12 | * We build a jump to memcpy_orig by default which gets NOPped out on | 14 | * We build a jump to memcpy_orig by default which gets NOPped out on |
| 13 | * the majority of x86 CPUs which set REP_GOOD. In addition, CPUs which | 15 | * the majority of x86 CPUs which set REP_GOOD. In addition, CPUs which |
| @@ -184,6 +186,8 @@ SYM_FUNC_START_LOCAL(memcpy_orig) · 170 unmodified lines | |||
| 184 | retq | 186 | retq |
| 185 | SYM_FUNC_END(memcpy_orig) | 187 | SYM_FUNC_END(memcpy_orig) |
| 186 | 188 | ||
| 189 | .popsection | ||
| 190 | |||
| 187 | #ifndef CONFIG_UML | 191 | #ifndef CONFIG_UML |
| 188 | 192 | ||
| 189 | MCSAFE_TEST_CTL | 193 | MCSAFE_TEST_CTL |
| @@ -24,6 +24,7 @@ unsigned long __clear_user(void __user *addr, unsigned long size) · 23 unmodified lines | |||
| 24 | asm volatile( | 24 | asm volatile( |
| 25 | " testq %[size8],%[size8]\n" | 25 | " testq %[size8],%[size8]\n" |
| 26 | " jz 4f\n" | 26 | " jz 4f\n" |
| 27 | " .align 16\n" | ||
| 27 | "0: movq $0,(%[dst])\n" | 28 | "0: movq $0,(%[dst])\n" |
| 28 | " addq $8,%[dst]\n" | 29 | " addq $8,%[dst]\n" |
| 29 | " decl %%ecx ; jnz 0b\n" | 30 | " decl %%ecx ; jnz 0b\n" |
| @@ -209,7 +209,7 @@ sqrt_stage_2_finish: · 208 unmodified lines | |||
| 209 | 209 | ||
| 210 | #ifdef PARANOID | 210 | #ifdef PARANOID |
| 211 | /* It should be possible to get here only if the arg is ffff....ffff */ | 211 | /* It should be possible to get here only if the arg is ffff....ffff */ |
| 212 | cmp $0xffffffff,FPU_fsqrt_arg_1 | 212 | cmpl $0xffffffff,FPU_fsqrt_arg_1 |
| 213 | jnz sqrt_stage_2_error | 213 | jnz sqrt_stage_2_error |
| 214 | #endif /* PARANOID */ | 214 | #endif /* PARANOID */ |
| 215 | 215 | ||
| @@ -167,9 +167,10 @@ static struct irq_domain *uv_get_irq_domain(void) · 166 unmodified lines | |||
| 167 | goto out; | 167 | goto out; |
| 168 | 168 | ||
| 169 | uv_domain = irq_domain_create_tree(fn, &uv_domain_ops, NULL); | 169 | uv_domain = irq_domain_create_tree(fn, &uv_domain_ops, NULL); |
| 170 | irq_domain_free_fwnode(fn); | ||
| 171 | if (uv_domain) | 170 | if (uv_domain) |
| 172 | uv_domain->parent = x86_vector_domain; | 171 | uv_domain->parent = x86_vector_domain; |
| 172 | else | ||
| 173 | irq_domain_free_fwnode(fn); | ||
| 173 | out: | 174 | out: |
| 174 | mutex_unlock(&uv_lock); | 175 | mutex_unlock(&uv_lock); |
| 175 | 176 | ||
| @@ -193,6 +193,8 @@ static void fix_processor_context(void) · 192 unmodified lines | |||
| 193 | */ | 193 | */ |
| 194 | static void notrace __restore_processor_state(struct saved_context *ctxt) | 194 | static void notrace __restore_processor_state(struct saved_context *ctxt) |
| 195 | { | 195 | { |
| 196 | struct cpuinfo_x86 *c; | ||
| 197 | |||
| 196 | if (ctxt->misc_enable_saved) | 198 | if (ctxt->misc_enable_saved) |
| 197 | wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable); | 199 | wrmsrl(MSR_IA32_MISC_ENABLE, ctxt->misc_enable); |
| 198 | /* | 200 | /* |
| @@ -263,6 +265,10 @@ static void notrace __restore_processor_state(struct saved_context *ctxt) · 64 unmodified lines | |||
| 263 | mtrr_bp_restore(); | 265 | mtrr_bp_restore(); |
| 264 | perf_restore_debug_store(); | 266 | perf_restore_debug_store(); |
| 265 | msr_restore_context(ctxt); | 267 | msr_restore_context(ctxt); |
| 268 | |||
| 269 | c = &cpu_data(smp_processor_id()); | ||
| 270 | if (cpu_has(c, X86_FEATURE_MSR_IA32_FEAT_CTL)) | ||
| 271 | init_ia32_feat_ctl(c); | ||
| 266 | } | 272 | } |
| 267 | 273 | ||
| 268 | /* Needed by apm.c */ | 274 | /* Needed by apm.c */ |
| @@ -598,6 +598,26 @@ static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum, · 597 unmodified lines | |||
| 598 | } | 598 | } |
| 599 | 599 | ||
| 600 | #ifdef CONFIG_X86_64 | 600 | #ifdef CONFIG_X86_64 |
| 601 | void noist_exc_debug(struct pt_regs *regs); | ||
| 602 | |||
| 603 | DEFINE_IDTENTRY_RAW(xenpv_exc_nmi) | ||
| 604 | { | ||
| 605 | /* On Xen PV, NMI doesn't use IST. The C part is the sane as native. */ | ||
| 606 | exc_nmi(regs); | ||
| 607 | } | ||
| 608 | |||
| 609 | DEFINE_IDTENTRY_RAW(xenpv_exc_debug) | ||
| 610 | { | ||
| 611 | /* | ||
| 612 | * There's no IST on Xen PV, but we still need to dispatch | ||
| 613 | * to the correct handler. | ||
| 614 | */ | ||
| 615 | if (user_mode(regs)) | ||
| 616 | noist_exc_debug(regs); | ||
| 617 | else | ||
| 618 | exc_debug(regs); | ||
| 619 | } | ||
| 620 | |||
| 601 | struct trap_array_entry { | 621 | struct trap_array_entry { |
| 602 | void (*orig)(void); | 622 | void (*orig)(void); |
| 603 | void (*xen)(void); | 623 | void (*xen)(void); |
| @@ -609,18 +629,18 @@ struct trap_array_entry { · 5 unmodified lines | |||
| 609 | .xen = xen_asm_##func, \ | 629 | .xen = xen_asm_##func, \ |
| 610 | .ist_okay = ist_ok } | 630 | .ist_okay = ist_ok } |
| 611 | 631 | ||
| 612 | #define TRAP_ENTRY_REDIR(func, xenfunc, ist_ok) { \ | 632 | #define TRAP_ENTRY_REDIR(func, ist_ok) { \ |
| 613 | .orig = asm_##func, \ | 633 | .orig = asm_##func, \ |
| 614 | .xen = xen_asm_##xenfunc, \ | 634 | .xen = xen_asm_xenpv_##func, \ |
| 615 | .ist_okay = ist_ok } | 635 | .ist_okay = ist_ok } |
| 616 | 636 | ||
| 617 | static struct trap_array_entry trap_array[] = { | 637 | static struct trap_array_entry trap_array[] = { |
| 618 | TRAP_ENTRY_REDIR(exc_debug, exc_xendebug, true ), | 638 | TRAP_ENTRY_REDIR(exc_debug, true ), |
| 619 | TRAP_ENTRY(exc_double_fault, true ), | 639 | TRAP_ENTRY(exc_double_fault, true ), |
| 620 | #ifdef CONFIG_X86_MCE | 640 | #ifdef CONFIG_X86_MCE |
| 621 | TRAP_ENTRY(exc_machine_check, true ), | 641 | TRAP_ENTRY(exc_machine_check, true ), |
| 622 | #endif | 642 | #endif |
| 623 | TRAP_ENTRY_REDIR(exc_nmi, exc_xennmi, true ), | 643 | TRAP_ENTRY_REDIR(exc_nmi, true ), |
| 624 | TRAP_ENTRY(exc_int3, false ), | 644 | TRAP_ENTRY(exc_int3, false ), |
| 625 | TRAP_ENTRY(exc_overflow, false ), | 645 | TRAP_ENTRY(exc_overflow, false ), |
| 626 | #ifdef CONFIG_IA32_EMULATION | 646 | #ifdef CONFIG_IA32_EMULATION |
| @@ -850,6 +870,17 @@ static void xen_load_sp0(unsigned long sp0) · 223 unmodified lines | |||
| 850 | } | 870 | } |
| 851 | 871 | ||
| 852 | #ifdef CONFIG_X86_IOPL_IOPERM | 872 | #ifdef CONFIG_X86_IOPL_IOPERM |
| 873 | static void xen_invalidate_io_bitmap(void) | ||
| 874 | { | ||
| 875 | struct physdev_set_iobitmap iobitmap = { | ||
| 876 | .bitmap = 0, | ||
| 877 | .nr_ports = 0, | ||
| 878 | }; | ||
| 879 | |||
| 880 | native_tss_invalidate_io_bitmap(); | ||
| 881 | HYPERVISOR_physdev_op(PHYSDEVOP_set_iobitmap, &iobitmap); | ||
| 882 | } | ||
| 883 | |||
| 853 | static void xen_update_io_bitmap(void) | 884 | static void xen_update_io_bitmap(void) |
| 854 | { | 885 | { |
| 855 | struct physdev_set_iobitmap iobitmap; | 886 | struct physdev_set_iobitmap iobitmap; |
| @@ -1079,6 +1110,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = { · 223 unmodified lines | |||
| 1079 | .load_sp0 = xen_load_sp0, | 1110 | .load_sp0 = xen_load_sp0, |
| 1080 | 1111 | ||
| 1081 | #ifdef CONFIG_X86_IOPL_IOPERM | 1112 | #ifdef CONFIG_X86_IOPL_IOPERM |
| 1113 | .invalidate_io_bitmap = xen_invalidate_io_bitmap, | ||
| 1082 | .update_io_bitmap = xen_update_io_bitmap, | 1114 | .update_io_bitmap = xen_update_io_bitmap, |
| 1083 | #endif | 1115 | #endif |
| 1084 | .io_delay = xen_io_delay, | 1116 | .io_delay = xen_io_delay, |
| @@ -29,10 +29,9 @@ _ASM_NOKPROBE(xen_\name) · 28 unmodified lines | |||
| 29 | .endm | 29 | .endm |
| 30 | 30 | ||
| 31 | xen_pv_trap asm_exc_divide_error | 31 | xen_pv_trap asm_exc_divide_error |
| 32 | xen_pv_trap asm_exc_debug | 32 | xen_pv_trap asm_xenpv_exc_debug |
| 33 | xen_pv_trap asm_exc_xendebug | ||
| 34 | xen_pv_trap asm_exc_int3 | 33 | xen_pv_trap asm_exc_int3 |
| 35 | xen_pv_trap asm_exc_xennmi | 34 | xen_pv_trap asm_xenpv_exc_nmi |
| 36 | xen_pv_trap asm_exc_overflow | 35 | xen_pv_trap asm_exc_overflow |
| 37 | xen_pv_trap asm_exc_bounds | 36 | xen_pv_trap asm_exc_bounds |
| 38 | xen_pv_trap asm_exc_invalid_op | 37 | xen_pv_trap asm_exc_invalid_op |
| @@ -161,10 +160,22 @@ SYM_FUNC_END(xen_syscall32_target) · 122 unmodified lines | |||
| 161 | 160 | ||
| 162 | /* 32-bit compat sysenter target */ | 161 | /* 32-bit compat sysenter target */ |
| 163 | SYM_FUNC_START(xen_sysenter_target) | 162 | SYM_FUNC_START(xen_sysenter_target) |
| 164 | mov 0*8(%rsp), %rcx | 163 | /* |
| 165 | mov 1*8(%rsp), %r11 | 164 | * NB: Xen is polite and clears TF from EFLAGS for us. This means |
| 166 | mov 5*8(%rsp), %rsp | 165 | * that we don't need to guard against single step exceptions here. |
| 167 | jmp entry_SYSENTER_compat | 166 | */ |
| 167 | popq %rcx | ||
| 168 | popq %r11 | ||
| 169 | |||
| 170 | /* | ||
| 171 | * Neither Xen nor the kernel really knows what the old SS and | ||
| 172 | * CS were. The kernel expects __USER32_DS and __USER32_CS, so | ||
| 173 | * report those values even though Xen will guess its own values. | ||
| 174 | */ | ||
| 175 | movq $__USER32_DS, 4*8(%rsp) | ||
| 176 | movq $__USER32_CS, 1*8(%rsp) | ||
| 177 | |||
| 178 | jmp entry_SYSENTER_compat_after_hwframe | ||
| 168 | SYM_FUNC_END(xen_sysenter_target) | 179 | SYM_FUNC_END(xen_sysenter_target) |
| 169 | 180 | ||
| 170 | #else /* !CONFIG_IA32_EMULATION */ | 181 | #else /* !CONFIG_IA32_EMULATION */ |
| @@ -362,9 +362,7 @@ irqreturn_t xtensa_pmu_irq_handler(int irq, void *dev_id) · 361 unmodified lines | |||
| 362 | struct xtensa_pmu_events *ev = this_cpu_ptr(&xtensa_pmu_events); | 362 | struct xtensa_pmu_events *ev = this_cpu_ptr(&xtensa_pmu_events); |
| 363 | unsigned i; | 363 | unsigned i; |
| 364 | 364 | ||
| 365 | for (i = find_first_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS); | 365 | for_each_set_bit(i, ev->used_mask, XCHAL_NUM_PERF_COUNTERS) { |
| 366 | i < XCHAL_NUM_PERF_COUNTERS; | ||
| 367 | i = find_next_bit(ev->used_mask, XCHAL_NUM_PERF_COUNTERS, i + 1)) { | ||
| 368 | uint32_t v = get_er(XTENSA_PMU_PMSTAT(i)); | 366 | uint32_t v = get_er(XTENSA_PMU_PMSTAT(i)); |
| 369 | struct perf_event *event = ev->event[i]; | 367 | struct perf_event *event = ev->event[i]; |
| 370 | struct hw_perf_event *hwc = &event->hw; | 368 | struct hw_perf_event *hwc = &event->hw; |
| @@ -724,7 +724,8 @@ c_start(struct seq_file *f, loff_t *pos) · 723 unmodified lines | |||
| 724 | static void * | 724 | static void * |
| 725 | c_next(struct seq_file *f, void *v, loff_t *pos) | 725 | c_next(struct seq_file *f, void *v, loff_t *pos) |
| 726 | { | 726 | { |
| 727 | return NULL; | 727 | ++*pos; |
| 728 | return c_start(f, pos); | ||
| 728 | } | 729 | } |
| 729 | 730 | ||
| 730 | static void | 731 | static void |
| @@ -87,13 +87,13 @@ void __xtensa_libgcc_window_spill(void) · 86 unmodified lines | |||
| 87 | } | 87 | } |
| 88 | EXPORT_SYMBOL(__xtensa_libgcc_window_spill); | 88 | EXPORT_SYMBOL(__xtensa_libgcc_window_spill); |
| 89 | 89 | ||
| 90 | unsigned long __sync_fetch_and_and_4(unsigned long *p, unsigned long v) | 90 | unsigned int __sync_fetch_and_and_4(volatile void *p, unsigned int v) |
| 91 | { | 91 | { |
| 92 | BUG(); | 92 | BUG(); |
| 93 | } | 93 | } |
| 94 | EXPORT_SYMBOL(__sync_fetch_and_and_4); | 94 | EXPORT_SYMBOL(__sync_fetch_and_and_4); |
| 95 | 95 | ||
| 96 | unsigned long __sync_fetch_and_or_4(unsigned long *p, unsigned long v) | 96 | unsigned int __sync_fetch_and_or_4(volatile void *p, unsigned int v) |
| 97 | { | 97 | { |
| 98 | BUG(); | 98 | BUG(); |
| 99 | } | 99 | } |
| @@ -24,6 +24,19 @@ void blk_flush_integrity(void) · 23 unmodified lines | |||
| 24 | flush_workqueue(kintegrityd_wq); | 24 | flush_workqueue(kintegrityd_wq); |
| 25 | } | 25 | } |
| 26 | 26 | ||
| 27 | static void __bio_integrity_free(struct bio_set *bs, | ||
| 28 | struct bio_integrity_payload *bip) | ||
| 29 | { | ||
| 30 | if (bs && mempool_initialized(&bs->bio_integrity_pool)) { | ||
| 31 | if (bip->bip_vec) | ||
| 32 | bvec_free(&bs->bvec_integrity_pool, bip->bip_vec, | ||
| 33 | bip->bip_slab); | ||
| 34 | mempool_free(bip, &bs->bio_integrity_pool); | ||
| 35 | } else { | ||
| 36 | kfree(bip); | ||
| 37 | } | ||
| 38 | } | ||
| 39 | |||
| 27 | /** | 40 | /** |
| 28 | * bio_integrity_alloc - Allocate integrity payload and attach it to bio | 41 | * bio_integrity_alloc - Allocate integrity payload and attach it to bio |
| 29 | * @bio: bio to attach integrity metadata to | 42 | * @bio: bio to attach integrity metadata to |
| @@ -78,7 +91,7 @@ struct bio_integrity_payload *bio_integrity_alloc(struct bio *bio, · 48 unmodified lines | |||
| 78 | 91 | ||
| 79 | return bip; | 92 | return bip; |
| 80 | err: | 93 | err: |
| 81 | mempool_free(bip, &bs->bio_integrity_pool); | 94 | __bio_integrity_free(bs, bip); |
| 82 | return ERR_PTR(-ENOMEM); | 95 | return ERR_PTR(-ENOMEM); |
| 83 | } | 96 | } |
| 84 | EXPORT_SYMBOL(bio_integrity_alloc); | 97 | EXPORT_SYMBOL(bio_integrity_alloc); |
| @@ -99,14 +112,7 @@ void bio_integrity_free(struct bio *bio) · 14 unmodified lines | |||
| 99 | kfree(page_address(bip->bip_vec->bv_page) + | 112 | kfree(page_address(bip->bip_vec->bv_page) + |
| 100 | bip->bip_vec->bv_offset); | 113 | bip->bip_vec->bv_offset); |
| 101 | 114 | ||
| 102 | if (bs && mempool_initialized(&bs->bio_integrity_pool)) { | 115 | __bio_integrity_free(bs, bip); |
| 103 | bvec_free(&bs->bvec_integrity_pool, bip->bip_vec, bip->bip_slab); | ||
| 104 | |||
| 105 | mempool_free(bip, &bs->bio_integrity_pool); | ||
| 106 | } else { | ||
| 107 | kfree(bip); | ||
| 108 | } | ||
| 109 | |||
| 110 | bio->bi_integrity = NULL; | 116 | bio->bi_integrity = NULL; |
| 111 | bio->bi_opf &= ~REQ_INTEGRITY; | 117 | bio->bi_opf &= ~REQ_INTEGRITY; |
| 112 | } | 118 | } |
| @@ -125,6 +125,9 @@ static const char *const blk_queue_flag_name[] = { · 124 unmodified lines | |||
| 125 | QUEUE_FLAG_NAME(REGISTERED), | 125 | QUEUE_FLAG_NAME(REGISTERED), |
| 126 | QUEUE_FLAG_NAME(SCSI_PASSTHROUGH), | 126 | QUEUE_FLAG_NAME(SCSI_PASSTHROUGH), |
| 127 | QUEUE_FLAG_NAME(QUIESCED), | 127 | QUEUE_FLAG_NAME(QUIESCED), |
| 128 | QUEUE_FLAG_NAME(PCI_P2PDMA), | ||
| 129 | QUEUE_FLAG_NAME(ZONE_RESETALL), | ||
| 130 | QUEUE_FLAG_NAME(RQ_ALLOC_TIME), | ||
| 128 | }; | 131 | }; |
| 129 | #undef QUEUE_FLAG_NAME | 132 | #undef QUEUE_FLAG_NAME |
| 130 | 133 | ||
| @@ -828,10 +828,10 @@ static bool blk_mq_rq_inflight(struct blk_mq_hw_ctx *hctx, struct request *rq, · 827 unmodified lines | |||
| 828 | void *priv, bool reserved) | 828 | void *priv, bool reserved) |
| 829 | { | 829 | { |
| 830 | /* | 830 | /* |
| 831 | * If we find a request that is inflight and the queue matches, | 831 | * If we find a request that isn't idle and the queue matches, |
| 832 | * we know the queue is busy. Return false to stop the iteration. | 832 | * we know the queue is busy. Return false to stop the iteration. |
| 833 | */ | 833 | */ |
| 834 | if (rq->state == MQ_RQ_IN_FLIGHT && rq->q == hctx->queue) { | 834 | if (blk_mq_request_started(rq) && rq->q == hctx->queue) { |
| 835 | bool *busy = priv; | 835 | bool *busy = priv; |
| 836 | 836 | ||
| 837 | *busy = true; | 837 | *busy = true; |
| @@ -374,8 +374,7 @@ void blk_ksm_destroy(struct blk_keyslot_manager *ksm) · 373 unmodified lines | |||
| 374 | if (!ksm) | 374 | if (!ksm) |
| 375 | return; | 375 | return; |
| 376 | kvfree(ksm->slot_hashtable); | 376 | kvfree(ksm->slot_hashtable); |
| 377 | memzero_explicit(ksm->slots, sizeof(ksm->slots[0]) * ksm->num_slots); | 377 | kvfree_sensitive(ksm->slots, sizeof(ksm->slots[0]) * ksm->num_slots); |
| 378 | kvfree(ksm->slots); | ||
| 379 | memzero_explicit(ksm, sizeof(*ksm)); | 378 | memzero_explicit(ksm, sizeof(*ksm)); |
| 380 | } | 379 | } |
| 381 | EXPORT_SYMBOL_GPL(blk_ksm_destroy); | 380 | EXPORT_SYMBOL_GPL(blk_ksm_destroy); |
| @@ -128,21 +128,15 @@ EXPORT_SYMBOL_GPL(af_alg_release); · 127 unmodified lines | |||
| 128 | void af_alg_release_parent(struct sock *sk) | 128 | void af_alg_release_parent(struct sock *sk) |
| 129 | { | 129 | { |
| 130 | struct alg_sock *ask = alg_sk(sk); | 130 | struct alg_sock *ask = alg_sk(sk); |
| 131 | unsigned int nokey = ask->nokey_refcnt; | 131 | unsigned int nokey = atomic_read(&ask->nokey_refcnt); |
| 132 | bool last = nokey && !ask->refcnt; | ||
| 133 | 132 | ||
| 134 | sk = ask->parent; | 133 | sk = ask->parent; |
| 135 | ask = alg_sk(sk); | 134 | ask = alg_sk(sk); |
| 136 | 135 | ||
| 137 | local_bh_disable(); | 136 | if (nokey) |
| 138 | bh_lock_sock(sk); | 137 | atomic_dec(&ask->nokey_refcnt); |
| 139 | ask->nokey_refcnt -= nokey; | ||
| 140 | if (!last) | ||
| 141 | last = !--ask->refcnt; | ||
| 142 | bh_unlock_sock(sk); | ||
| 143 | local_bh_enable(); | ||
| 144 | 138 | ||
| 145 | if (last) | 139 | if (atomic_dec_and_test(&ask->refcnt)) |
| 146 | sock_put(sk); | 140 | sock_put(sk); |
| 147 | } | 141 | } |
| 148 | EXPORT_SYMBOL_GPL(af_alg_release_parent); | 142 | EXPORT_SYMBOL_GPL(af_alg_release_parent); |
| @@ -187,7 +181,7 @@ static int alg_bind(struct socket *sock, struct sockaddr *uaddr, int addr_len) · 38 unmodified lines | |||
| 187 | 181 | ||
| 188 | err = -EBUSY; | 182 | err = -EBUSY; |
| 189 | lock_sock(sk); | 183 | lock_sock(sk); |
| 190 | if (ask->refcnt | ask->nokey_refcnt) | 184 | if (atomic_read(&ask->refcnt)) |
| 191 | goto unlock; | 185 | goto unlock; |
| 192 | 186 | ||
| 193 | swap(ask->type, type); | 187 | swap(ask->type, type); |
| @@ -236,7 +230,7 @@ static int alg_setsockopt(struct socket *sock, int level, int optname, · 42 unmodified lines | |||
| 236 | int err = -EBUSY; | 230 | int err = -EBUSY; |
| 237 | 231 | ||
| 238 | lock_sock(sk); | 232 | lock_sock(sk); |
| 239 | if (ask->refcnt) | 233 | if (atomic_read(&ask->refcnt) != atomic_read(&ask->nokey_refcnt)) |
| 240 | goto unlock; | 234 | goto unlock; |
| 241 | 235 | ||
| 242 | type = ask->type; | 236 | type = ask->type; |
| @@ -301,12 +295,14 @@ int af_alg_accept(struct sock *sk, struct socket *newsock, bool kern) · 58 unmodified lines | |||
| 301 | if (err) | 295 | if (err) |
| 302 | goto unlock; | 296 | goto unlock; |
| 303 | 297 | ||
| 304 | if (nokey || !ask->refcnt++) | 298 | if (atomic_inc_return_relaxed(&ask->refcnt) == 1) |
| 305 | sock_hold(sk); | 299 | sock_hold(sk); |
| 306 | ask->nokey_refcnt += nokey; | 300 | if (nokey) { |
| 301 | atomic_inc(&ask->nokey_refcnt); | ||
| 302 | atomic_set(&alg_sk(sk2)->nokey_refcnt, 1); | ||
| 303 | } | ||
| 307 | alg_sk(sk2)->parent = sk; | 304 | alg_sk(sk2)->parent = sk; |
| 308 | alg_sk(sk2)->type = type; | 305 | alg_sk(sk2)->type = type; |
| 309 | alg_sk(sk2)->nokey_refcnt = nokey; | ||
| 310 | 306 | ||
| 311 | newsock->ops = type->ops; | 307 | newsock->ops = type->ops; |
| 312 | newsock->state = SS_CONNECTED; | 308 | newsock->state = SS_CONNECTED; |
| @@ -384,7 +384,7 @@ static int aead_check_key(struct socket *sock) · 383 unmodified lines | |||
| 384 | struct alg_sock *ask = alg_sk(sk); | 384 | struct alg_sock *ask = alg_sk(sk); |
| 385 | 385 | ||
| 386 | lock_sock(sk); | 386 | lock_sock(sk); |
| 387 | if (ask->refcnt) | 387 | if (!atomic_read(&ask->nokey_refcnt)) |
| 388 | goto unlock_child; | 388 | goto unlock_child; |
| 389 | 389 | ||
| 390 | psk = ask->parent; | 390 | psk = ask->parent; |
| @@ -396,11 +396,8 @@ static int aead_check_key(struct socket *sock) · 5 unmodified lines | |||
| 396 | if (crypto_aead_get_flags(tfm->aead) & CRYPTO_TFM_NEED_KEY) | 396 | if (crypto_aead_get_flags(tfm->aead) & CRYPTO_TFM_NEED_KEY) |
| 397 | goto unlock; | 397 | goto unlock; |
| 398 | 398 | ||
| 399 | if (!pask->refcnt++) | 399 | atomic_dec(&pask->nokey_refcnt); |
| 400 | sock_hold(psk); | 400 | atomic_set(&ask->nokey_refcnt, 0); |
| 401 | |||
| 402 | ask->refcnt = 1; | ||
| 403 | sock_put(psk); | ||
| 404 | 401 | ||
| 405 | err = 0; | 402 | err = 0; |
| 406 | 403 | ||
| @@ -301,7 +301,7 @@ static int hash_check_key(struct socket *sock) · 300 unmodified lines | |||
| 301 | struct alg_sock *ask = alg_sk(sk); | 301 | struct alg_sock *ask = alg_sk(sk); |
| 302 | 302 | ||
| 303 | lock_sock(sk); | 303 | lock_sock(sk); |
| 304 | if (ask->refcnt) | 304 | if (!atomic_read(&ask->nokey_refcnt)) |
| 305 | goto unlock_child; | 305 | goto unlock_child; |
| 306 | 306 | ||
| 307 | psk = ask->parent; | 307 | psk = ask->parent; |
| @@ -313,11 +313,8 @@ static int hash_check_key(struct socket *sock) · 5 unmodified lines | |||
| 313 | if (crypto_ahash_get_flags(tfm) & CRYPTO_TFM_NEED_KEY) | 313 | if (crypto_ahash_get_flags(tfm) & CRYPTO_TFM_NEED_KEY) |
| 314 | goto unlock; | 314 | goto unlock; |
| 315 | 315 | ||
| 316 | if (!pask->refcnt++) | 316 | atomic_dec(&pask->nokey_refcnt); |
| 317 | sock_hold(psk); | 317 | atomic_set(&ask->nokey_refcnt, 0); |
| 318 | |||
| 319 | ask->refcnt = 1; | ||
| 320 | sock_put(psk); | ||
| 321 | 318 | ||
| 322 | err = 0; | 319 | err = 0; |
| 323 | 320 | ||
| @@ -211,7 +211,7 @@ static int skcipher_check_key(struct socket *sock) · 210 unmodified lines | |||
| 211 | struct alg_sock *ask = alg_sk(sk); | 211 | struct alg_sock *ask = alg_sk(sk); |
| 212 | 212 | ||
| 213 | lock_sock(sk); | 213 | lock_sock(sk); |
| 214 | if (ask->refcnt) | 214 | if (!atomic_read(&ask->nokey_refcnt)) |
| 215 | goto unlock_child; | 215 | goto unlock_child; |
| 216 | 216 | ||
| 217 | psk = ask->parent; | 217 | psk = ask->parent; |
| @@ -223,11 +223,8 @@ static int skcipher_check_key(struct socket *sock) · 5 unmodified lines | |||
| 223 | if (crypto_skcipher_get_flags(tfm) & CRYPTO_TFM_NEED_KEY) | 223 | if (crypto_skcipher_get_flags(tfm) & CRYPTO_TFM_NEED_KEY) |
| 224 | goto unlock; | 224 | goto unlock; |
| 225 | 225 | ||
| 226 | if (!pask->refcnt++) | 226 | atomic_dec(&pask->nokey_refcnt); |
| 227 | sock_hold(psk); | 227 | atomic_set(&ask->nokey_refcnt, 0); |
| 228 | |||
| 229 | ask->refcnt = 1; | ||
| 230 | sock_put(psk); | ||
| 231 | 228 | ||
| 232 | err = 0; | 229 | err = 0; |
| 233 | 230 | ||
| @@ -119,6 +119,7 @@ static int software_key_query(const struct kernel_pkey_params *params, · 118 unmodified lines | |||
| 119 | if (IS_ERR(tfm)) | 119 | if (IS_ERR(tfm)) |
| 120 | return PTR_ERR(tfm); | 120 | return PTR_ERR(tfm); |
| 121 | 121 | ||
| 122 | ret = -ENOMEM; | ||
| 122 | key = kmalloc(pkey->keylen + sizeof(u32) * 2 + pkey->paramlen, | 123 | key = kmalloc(pkey->keylen + sizeof(u32) * 2 + pkey->paramlen, |
| 123 | GFP_KERNEL); | 124 | GFP_KERNEL); |
| 124 | if (!key) | 125 | if (!key) |
| @@ -11,6 +11,7 @@ · 10 unmodified lines | |||
| 11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
| 12 | #include <linux/configfs.h> | 12 | #include <linux/configfs.h> |
| 13 | #include <linux/acpi.h> | 13 | #include <linux/acpi.h> |
| 14 | #include <linux/security.h> | ||
| 14 | 15 | ||
| 15 | #include "acpica/accommon.h" | 16 | #include "acpica/accommon.h" |
| 16 | #include "acpica/actables.h" | 17 | #include "acpica/actables.h" |
| @@ -28,7 +29,10 @@ static ssize_t acpi_table_aml_write(struct config_item *cfg, · 11 unmodified lines | |||
| 28 | { | 29 | { |
| 29 | const struct acpi_table_header *header = data; | 30 | const struct acpi_table_header *header = data; |
| 30 | struct acpi_table *table; | 31 | struct acpi_table *table; |
| 31 | int ret; | 32 | int ret = security_locked_down(LOCKDOWN_ACPI_TABLES); |
| 33 | |||
| 34 | if (ret) | ||
| 35 | return ret; | ||
| 32 | 36 | ||
| 33 | table = container_of(cfg, struct acpi_table, cfg); | 37 | table = container_of(cfg, struct acpi_table, cfg); |
| 34 | 38 | ||
| @@ -228,6 +228,7 @@ static const struct acpi_device_id int3407_device_ids[] = { · 227 unmodified lines | |||
| 228 | {"INT3407", 0}, | 228 | {"INT3407", 0}, |
| 229 | {"INT3532", 0}, | 229 | {"INT3532", 0}, |
| 230 | {"INTC1047", 0}, | 230 | {"INTC1047", 0}, |
| 231 | {"INTC1050", 0}, | ||
| 231 | {"", 0}, | 232 | {"", 0}, |
| 232 | }; | 233 | }; |
| 233 | MODULE_DEVICE_TABLE(acpi, int3407_device_ids); | 234 | MODULE_DEVICE_TABLE(acpi, int3407_device_ids); |
| @@ -25,8 +25,8 @@ static int acpi_fan_remove(struct platform_device *pdev); · 24 unmodified lines | |||
| 25 | 25 | ||
| 26 | static const struct acpi_device_id fan_device_ids[] = { | 26 | static const struct acpi_device_id fan_device_ids[] = { |
| 27 | {"PNP0C0B", 0}, | 27 | {"PNP0C0B", 0}, |
| 28 | {"INT1044", 0}, | ||
| 29 | {"INT3404", 0}, | 28 | {"INT3404", 0}, |
| 29 | {"INTC1044", 0}, | ||
| 30 | {"", 0}, | 30 | {"", 0}, |
| 31 | }; | 31 | }; |
| 32 | MODULE_DEVICE_TABLE(acpi, fan_device_ids); | 32 | MODULE_DEVICE_TABLE(acpi, fan_device_ids); |
| @@ -938,13 +938,13 @@ static void __exit interrupt_stats_exit(void) · 937 unmodified lines | |||
| 938 | } | 938 | } |
| 939 | 939 | ||
| 940 | static ssize_t | 940 | static ssize_t |
| 941 | acpi_show_profile(struct device *dev, struct device_attribute *attr, | 941 | acpi_show_profile(struct kobject *kobj, struct kobj_attribute *attr, |
| 942 | char *buf) | 942 | char *buf) |
| 943 | { | 943 | { |
| 944 | return sprintf(buf, "%d\n", acpi_gbl_FADT.preferred_profile); | 944 | return sprintf(buf, "%d\n", acpi_gbl_FADT.preferred_profile); |
| 945 | } | 945 | } |
| 946 | 946 | ||
| 947 | static const struct device_attribute pm_profile_attr = | 947 | static const struct kobj_attribute pm_profile_attr = |
| 948 | __ATTR(pm_profile, S_IRUGO, acpi_show_profile, NULL); | 948 | __ATTR(pm_profile, S_IRUGO, acpi_show_profile, NULL); |
| 949 | 949 | ||
| 950 | static ssize_t hotplug_enabled_show(struct kobject *kobj, | 950 | static ssize_t hotplug_enabled_show(struct kobject *kobj, |
| @@ -4686,8 +4686,15 @@ static struct binder_thread *binder_get_thread(struct binder_proc *proc) · 4685 unmodified lines | |||
| 4686 | 4686 | ||
| 4687 | static void binder_free_proc(struct binder_proc *proc) | 4687 | static void binder_free_proc(struct binder_proc *proc) |
| 4688 | { | 4688 | { |
| 4689 | struct binder_device *device; | ||
| 4690 | |||
| 4689 | BUG_ON(!list_empty(&proc->todo)); | 4691 | BUG_ON(!list_empty(&proc->todo)); |
| 4690 | BUG_ON(!list_empty(&proc->delivered_death)); | 4692 | BUG_ON(!list_empty(&proc->delivered_death)); |
| 4693 | device = container_of(proc->context, struct binder_device, context); | ||
| 4694 | if (refcount_dec_and_test(&device->ref)) { | ||
| 4695 | kfree(proc->context->name); | ||
| 4696 | kfree(device); | ||
| 4697 | } | ||
| 4691 | binder_alloc_deferred_release(&proc->alloc); | 4698 | binder_alloc_deferred_release(&proc->alloc); |
| 4692 | put_task_struct(proc->tsk); | 4699 | put_task_struct(proc->tsk); |
| 4693 | binder_stats_deleted(BINDER_STAT_PROC); | 4700 | binder_stats_deleted(BINDER_STAT_PROC); |
| @@ -5406,7 +5413,6 @@ static int binder_node_release(struct binder_node *node, int refs) · 712 unmodified lines | |||
| 5406 | static void binder_deferred_release(struct binder_proc *proc) | 5413 | static void binder_deferred_release(struct binder_proc *proc) |
| 5407 | { | 5414 | { |
| 5408 | struct binder_context *context = proc->context; | 5415 | struct binder_context *context = proc->context; |
| 5409 | struct binder_device *device; | ||
| 5410 | struct rb_node *n; | 5416 | struct rb_node *n; |
| 5411 | int threads, nodes, incoming_refs, outgoing_refs, active_transactions; | 5417 | int threads, nodes, incoming_refs, outgoing_refs, active_transactions; |
| 5412 | 5418 | ||
| @@ -5423,12 +5429,6 @@ static void binder_deferred_release(struct binder_proc *proc) · 10 unmodified lines | |||
| 5423 | context->binder_context_mgr_node = NULL; | 5429 | context->binder_context_mgr_node = NULL; |
| 5424 | } | 5430 | } |
| 5425 | mutex_unlock(&context->context_mgr_node_lock); | 5431 | mutex_unlock(&context->context_mgr_node_lock); |
| 5426 | device = container_of(proc->context, struct binder_device, context); | ||
| 5427 | if (refcount_dec_and_test(&device->ref)) { | ||
| 5428 | kfree(context->name); | ||
| 5429 | kfree(device); | ||
| 5430 | } | ||
| 5431 | proc->context = NULL; | ||
| 5432 | binder_inner_proc_lock(proc); | 5432 | binder_inner_proc_lock(proc); |
| 5433 | /* | 5433 | /* |
| 5434 | * Make sure proc stays alive after we | 5434 | * Make sure proc stays alive after we |
| @@ -153,7 +153,6 @@ extern char *make_class_name(const char *name, struct kobject *kobj); · 152 unmodified lines | |||
| 153 | extern int devres_release_all(struct device *dev); | 153 | extern int devres_release_all(struct device *dev); |
| 154 | extern void device_block_probing(void); | 154 | extern void device_block_probing(void); |
| 155 | extern void device_unblock_probing(void); | 155 | extern void device_unblock_probing(void); |
| 156 | extern void driver_deferred_probe_force_trigger(void); | ||
| 157 | 156 | ||
| 158 | /* /sys/devices directory */ | 157 | /* /sys/devices directory */ |
| 159 | extern struct kset *devices_kset; | 158 | extern struct kset *devices_kset; |
| @@ -50,6 +50,7 @@ static DEFINE_MUTEX(wfs_lock); · 49 unmodified lines | |||
| 50 | static LIST_HEAD(deferred_sync); | 50 | static LIST_HEAD(deferred_sync); |
| 51 | static unsigned int defer_sync_state_count = 1; | 51 | static unsigned int defer_sync_state_count = 1; |
| 52 | static unsigned int defer_fw_devlink_count; | 52 | static unsigned int defer_fw_devlink_count; |
| 53 | static LIST_HEAD(deferred_fw_devlink); | ||
| 53 | static DEFINE_MUTEX(defer_fw_devlink_lock); | 54 | static DEFINE_MUTEX(defer_fw_devlink_lock); |
| 54 | static bool fw_devlink_is_permissive(void); | 55 | static bool fw_devlink_is_permissive(void); |
| 55 | 56 | ||
| @@ -754,11 +755,11 @@ static void __device_links_queue_sync_state(struct device *dev, · 698 unmodified lines | |||
| 754 | */ | 755 | */ |
| 755 | dev->state_synced = true; | 756 | dev->state_synced = true; |
| 756 | 757 | ||
| 757 | if (WARN_ON(!list_empty(&dev->links.defer_sync))) | 758 | if (WARN_ON(!list_empty(&dev->links.defer_hook))) |
| 758 | return; | 759 | return; |
| 759 | 760 | ||
| 760 | get_device(dev); | 761 | get_device(dev); |
| 761 | list_add_tail(&dev->links.defer_sync, list); | 762 | list_add_tail(&dev->links.defer_hook, list); |
| 762 | } | 763 | } |
| 763 | 764 | ||
| 764 | /** | 765 | /** |
| @@ -776,8 +777,8 @@ static void device_links_flush_sync_list(struct list_head *list, · 11 unmodified lines | |||
| 776 | { | 777 | { |
| 777 | struct device *dev, *tmp; | 778 | struct device *dev, *tmp; |
| 778 | 779 | ||
| 779 | list_for_each_entry_safe(dev, tmp, list, links.defer_sync) { | 780 | list_for_each_entry_safe(dev, tmp, list, links.defer_hook) { |
| 780 | list_del_init(&dev->links.defer_sync); | 781 | list_del_init(&dev->links.defer_hook); |
| 781 | 782 | ||
| 782 | if (dev != dont_lock_dev) | 783 | if (dev != dont_lock_dev) |
| 783 | device_lock(dev); | 784 | device_lock(dev); |
| @@ -815,12 +816,12 @@ void device_links_supplier_sync_state_resume(void) · 31 unmodified lines | |||
| 815 | if (defer_sync_state_count) | 816 | if (defer_sync_state_count) |
| 816 | goto out; | 817 | goto out; |
| 817 | 818 | ||
| 818 | list_for_each_entry_safe(dev, tmp, &deferred_sync, links.defer_sync) { | 819 | list_for_each_entry_safe(dev, tmp, &deferred_sync, links.defer_hook) { |
| 819 | /* | 820 | /* |
| 820 | * Delete from deferred_sync list before queuing it to | 821 | * Delete from deferred_sync list before queuing it to |
| 821 | * sync_list because defer_sync is used for both lists. | 822 | * sync_list because defer_hook is used for both lists. |
| 822 | */ | 823 | */ |
| 823 | list_del_init(&dev->links.defer_sync); | 824 | list_del_init(&dev->links.defer_hook); |
| 824 | __device_links_queue_sync_state(dev, &sync_list); | 825 | __device_links_queue_sync_state(dev, &sync_list); |
| 825 | } | 826 | } |
| 826 | out: | 827 | out: |
| @@ -838,8 +839,8 @@ late_initcall(sync_state_resume_initcall); · 11 unmodified lines | |||
| 838 | 839 | ||
| 839 | static void __device_links_supplier_defer_sync(struct device *sup) | 840 | static void __device_links_supplier_defer_sync(struct device *sup) |
| 840 | { | 841 | { |
| 841 | if (list_empty(&sup->links.defer_sync) && dev_has_sync_state(sup)) | 842 | if (list_empty(&sup->links.defer_hook) && dev_has_sync_state(sup)) |
| 842 | list_add_tail(&sup->links.defer_sync, &deferred_sync); | 843 | list_add_tail(&sup->links.defer_hook, &deferred_sync); |
| 843 | } | 844 | } |
| 844 | 845 | ||
| 845 | static void device_link_drop_managed(struct device_link *link) | 846 | static void device_link_drop_managed(struct device_link *link) |
| @@ -1052,7 +1053,7 @@ void device_links_driver_cleanup(struct device *dev) · 206 unmodified lines | |||
| 1052 | WRITE_ONCE(link->status, DL_STATE_DORMANT); | 1053 | WRITE_ONCE(link->status, DL_STATE_DORMANT); |
| 1053 | } | 1054 | } |
| 1054 | 1055 | ||
| 1055 | list_del_init(&dev->links.defer_sync); | 1056 | list_del_init(&dev->links.defer_hook); |
| 1056 | __device_links_no_driver(dev); | 1057 | __device_links_no_driver(dev); |
| 1057 | 1058 | ||
| 1058 | device_links_write_unlock(); | 1059 | device_links_write_unlock(); |
| @@ -1244,6 +1245,12 @@ static void fw_devlink_link_device(struct device *dev) · 185 unmodified lines | |||
| 1244 | fw_ret = -EAGAIN; | 1245 | fw_ret = -EAGAIN; |
| 1245 | } else { | 1246 | } else { |
| 1246 | fw_ret = -ENODEV; | 1247 | fw_ret = -ENODEV; |
| 1248 | /* | ||
| 1249 | * defer_hook is not used to add device to deferred_sync list | ||
| 1250 | * until device is bound. Since deferred fw devlink also blocks | ||
| 1251 | * probing, same list hook can be used for deferred_fw_devlink. | ||
| 1252 | */ | ||
| 1253 | list_add_tail(&dev->links.defer_hook, &deferred_fw_devlink); | ||
| 1247 | } | 1254 | } |
| 1248 | 1255 | ||
| 1249 | if (fw_ret == -ENODEV) | 1256 | if (fw_ret == -ENODEV) |
| @@ -1312,6 +1319,9 @@ void fw_devlink_pause(void) · 62 unmodified lines | |||
| 1312 | */ | 1319 | */ |
| 1313 | void fw_devlink_resume(void) | 1320 | void fw_devlink_resume(void) |
| 1314 | { | 1321 | { |
| 1322 | struct device *dev, *tmp; | ||
| 1323 | LIST_HEAD(probe_list); | ||
| 1324 | |||
| 1315 | mutex_lock(&defer_fw_devlink_lock); | 1325 | mutex_lock(&defer_fw_devlink_lock); |
| 1316 | if (!defer_fw_devlink_count) { | 1326 | if (!defer_fw_devlink_count) { |
| 1317 | WARN(true, "Unmatched fw_devlink pause/resume!"); | 1327 | WARN(true, "Unmatched fw_devlink pause/resume!"); |
| @@ -1323,9 +1333,19 @@ void fw_devlink_resume(void) · 5 unmodified lines | |||
| 1323 | goto out; | 1333 | goto out; |
| 1324 | 1334 | ||
| 1325 | device_link_add_missing_supplier_links(); | 1335 | device_link_add_missing_supplier_links(); |
| 1326 | driver_deferred_probe_force_trigger(); | 1336 | list_splice_tail_init(&deferred_fw_devlink, &probe_list); |
| 1327 | out: | 1337 | out: |
| 1328 | mutex_unlock(&defer_fw_devlink_lock); | 1338 | mutex_unlock(&defer_fw_devlink_lock); |
| 1339 | |||
| 1340 | /* | ||
| 1341 | * bus_probe_device() can cause new devices to get added and they'll | ||
| 1342 | * try to grab defer_fw_devlink_lock. So, this needs to be done outside | ||
| 1343 | * the defer_fw_devlink_lock. | ||
| 1344 | */ | ||
| 1345 | list_for_each_entry_safe(dev, tmp, &probe_list, links.defer_hook) { | ||
| 1346 | list_del_init(&dev->links.defer_hook); | ||
| 1347 | bus_probe_device(dev); | ||
| 1348 | } | ||
| 1329 | } | 1349 | } |
| 1330 | /* Device links support end. */ | 1350 | /* Device links support end. */ |
| 1331 | 1351 | ||
| @@ -2172,7 +2192,7 @@ void device_initialize(struct device *dev) · 840 unmodified lines | |||
| 2172 | INIT_LIST_HEAD(&dev->links.consumers); | 2192 | INIT_LIST_HEAD(&dev->links.consumers); |
| 2173 | INIT_LIST_HEAD(&dev->links.suppliers); | 2193 | INIT_LIST_HEAD(&dev->links.suppliers); |
| 2174 | INIT_LIST_HEAD(&dev->links.needs_suppliers); | 2194 | INIT_LIST_HEAD(&dev->links.needs_suppliers); |
| 2175 | INIT_LIST_HEAD(&dev->links.defer_sync); | 2195 | INIT_LIST_HEAD(&dev->links.defer_hook); |
| 2176 | dev->links.status = DL_DEV_NO_DRIVER; | 2196 | dev->links.status = DL_DEV_NO_DRIVER; |
| 2177 | } | 2197 | } |
| 2178 | EXPORT_SYMBOL_GPL(device_initialize); | 2198 | EXPORT_SYMBOL_GPL(device_initialize); |
| @@ -164,11 +164,6 @@ static void driver_deferred_probe_trigger(void) · 163 unmodified lines | |||
| 164 | if (!driver_deferred_probe_enable) | 164 | if (!driver_deferred_probe_enable) |
| 165 | return; | 165 | return; |
| 166 | 166 | ||
| 167 | driver_deferred_probe_force_trigger(); | ||
| 168 | } | ||
| 169 | |||
| 170 | void driver_deferred_probe_force_trigger(void) | ||
| 171 | { | ||
| 172 | /* | 167 | /* |
| 173 | * A successful probe means that all the devices in the pending list | 168 | * A successful probe means that all the devices in the pending list |
| 174 | * should be triggered to be reprobed. Move all the deferred devices | 169 | * should be triggered to be reprobed. Move all the deferred devices |
| @@ -265,14 +265,14 @@ static struct notifier_block pm_trace_nb = { · 264 unmodified lines | |||
| 265 | .notifier_call = pm_trace_notify, | 265 | .notifier_call = pm_trace_notify, |
| 266 | }; | 266 | }; |
| 267 | 267 | ||
| 268 | static int early_resume_init(void) | 268 | static int __init early_resume_init(void) |
| 269 | { | 269 | { |
| 270 | hash_value_early_read = read_magic_time(); | 270 | hash_value_early_read = read_magic_time(); |
| 271 | register_pm_notifier(&pm_trace_nb); | 271 | register_pm_notifier(&pm_trace_nb); |
| 272 | return 0; | 272 | return 0; |
| 273 | } | 273 | } |
| 274 | 274 | ||
| 275 | static int late_resume_init(void) | 275 | static int __init late_resume_init(void) |
| 276 | { | 276 | { |
| 277 | unsigned int val = hash_value_early_read; | 277 | unsigned int val = hash_value_early_read; |
| 278 | unsigned int user, file, dev; | 278 | unsigned int user, file, dev; |
| @@ -4,7 +4,7 @@ · 3 unmodified lines | |||
| 4 | # subsystems should select the appropriate symbols. | 4 | # subsystems should select the appropriate symbols. |
| 5 | 5 | ||
| 6 | config REGMAP | 6 | config REGMAP |
| 7 | default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SCCB || REGMAP_I3C) | 7 | default y if (REGMAP_I2C || REGMAP_SPI || REGMAP_SPMI || REGMAP_W1 || REGMAP_AC97 || REGMAP_MMIO || REGMAP_IRQ || REGMAP_SOUNDWIRE || REGMAP_SCCB || REGMAP_I3C) |
| 8 | select IRQ_DOMAIN if REGMAP_IRQ | 8 | select IRQ_DOMAIN if REGMAP_IRQ |
| 9 | bool | 9 | bool |
| 10 | 10 | ||
| @@ -463,29 +463,31 @@ static ssize_t regmap_cache_only_write_file(struct file *file, · 462 unmodified lines | |||
| 463 | { | 463 | { |
| 464 | struct regmap *map = container_of(file->private_data, | 464 | struct regmap *map = container_of(file->private_data, |
| 465 | struct regmap, cache_only); | 465 | struct regmap, cache_only); |
| 466 | ssize_t result; | 466 | bool new_val, require_sync = false; |
| 467 | bool was_enabled, require_sync = false; | ||
| 468 | int err; | 467 | int err; |
| 469 | 468 | ||
| 470 | map->lock(map->lock_arg); | 469 | err = kstrtobool_from_user(user_buf, count, &new_val); |
| 470 | /* Ignore malforned data like debugfs_write_file_bool() */ | ||
| 471 | if (err) | ||
| 472 | return count; | ||
| 471 | 473 | ||
| 472 | was_enabled = map->cache_only; | 474 | err = debugfs_file_get(file->f_path.dentry); |
| 475 | if (err) | ||
| 476 | return err; | ||
| 473 | 477 | ||
| 474 | result = debugfs_write_file_bool(file, user_buf, count, ppos); | 478 | map->lock(map->lock_arg); |
| 475 | if (result < 0) { | ||
| 476 | map->unlock(map->lock_arg); | ||
| 477 | return result; | ||
| 478 | } | ||
| 479 | 479 | ||
| 480 | if (map->cache_only && !was_enabled) { | 480 | if (new_val && !map->cache_only) { |
| 481 | dev_warn(map->dev, "debugfs cache_only=Y forced\n"); | 481 | dev_warn(map->dev, "debugfs cache_only=Y forced\n"); |
| 482 | add_taint(TAINT_USER, LOCKDEP_STILL_OK); | 482 | add_taint(TAINT_USER, LOCKDEP_STILL_OK); |
| 483 | } else if (!map->cache_only && was_enabled) { | 483 | } else if (!new_val && map->cache_only) { |
| 484 | dev_warn(map->dev, "debugfs cache_only=N forced: syncing cache\n"); | 484 | dev_warn(map->dev, "debugfs cache_only=N forced: syncing cache\n"); |
| 485 | require_sync = true; | 485 | require_sync = true; |
| 486 | } | 486 | } |
| 487 | map->cache_only = new_val; | ||
| 487 | 488 | ||
| 488 | map->unlock(map->lock_arg); | 489 | map->unlock(map->lock_arg); |
| 490 | debugfs_file_put(file->f_path.dentry); | ||
| 489 | 491 | ||
| 490 | if (require_sync) { | 492 | if (require_sync) { |
| 491 | err = regcache_sync(map); | 493 | err = regcache_sync(map); |
| @@ -493,7 +495,7 @@ static ssize_t regmap_cache_only_write_file(struct file *file, · 1 unmodified line | |||
| 493 | dev_err(map->dev, "Failed to sync cache %d\n", err); | 495 | dev_err(map->dev, "Failed to sync cache %d\n", err); |
| 494 | } | 496 | } |
| 495 | 497 | ||
| 496 | return result; | 498 | return count; |
| 497 | } | 499 | } |
| 498 | 500 | ||
| 499 | static const struct file_operations regmap_cache_only_fops = { | 501 | static const struct file_operations regmap_cache_only_fops = { |
| @@ -508,28 +510,32 @@ static ssize_t regmap_cache_bypass_write_file(struct file *file, · 8 unmodified lines | |||
| 508 | { | 510 | { |
| 509 | struct regmap *map = container_of(file->private_data, | 511 | struct regmap *map = container_of(file->private_data, |
| 510 | struct regmap, cache_bypass); | 512 | struct regmap, cache_bypass); |
| 511 | ssize_t result; | 513 | bool new_val; |
| 512 | bool was_enabled; | 514 | int err; |
| 513 | 515 | ||
| 514 | map->lock(map->lock_arg); | 516 | err = kstrtobool_from_user(user_buf, count, &new_val); |
| 517 | /* Ignore malforned data like debugfs_write_file_bool() */ | ||
| 518 | if (err) | ||
| 519 | return count; | ||
| 515 | 520 | ||
| 516 | was_enabled = map->cache_bypass; | 521 | err = debugfs_file_get(file->f_path.dentry); |
| 522 | if (err) | ||
| 523 | return err; | ||
| 517 | 524 | ||
| 518 | result = debugfs_write_file_bool(file, user_buf, count, ppos); | 525 | map->lock(map->lock_arg); |
| 519 | if (result < 0) | ||
| 520 | goto out; | ||
| 521 | 526 | ||
| 522 | if (map->cache_bypass && !was_enabled) { | 527 | if (new_val && !map->cache_bypass) { |
| 523 | dev_warn(map->dev, "debugfs cache_bypass=Y forced\n"); | 528 | dev_warn(map->dev, "debugfs cache_bypass=Y forced\n"); |
| 524 | add_taint(TAINT_USER, LOCKDEP_STILL_OK); | 529 | add_taint(TAINT_USER, LOCKDEP_STILL_OK); |
| 525 | } else if (!map->cache_bypass && was_enabled) { | 530 | } else if (!new_val && map->cache_bypass) { |
| 526 | dev_warn(map->dev, "debugfs cache_bypass=N forced\n"); | 531 | dev_warn(map->dev, "debugfs cache_bypass=N forced\n"); |
| 527 | } | 532 | } |
| 533 | map->cache_bypass = new_val; | ||
| 528 | 534 | ||
| 529 | out: | ||
| 530 | map->unlock(map->lock_arg); | 535 | map->unlock(map->lock_arg); |
| 536 | debugfs_file_put(file->f_path.dentry); | ||
| 531 | 537 | ||
| 532 | return result; | 538 | return count; |
| 533 | } | 539 | } |
| 534 | 540 | ||
| 535 | static const struct file_operations regmap_cache_bypass_fops = { | 541 | static const struct file_operations regmap_cache_bypass_fops = { |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | |||
| 17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
| 18 | #include <linux/log2.h> | 18 | #include <linux/log2.h> |
| 19 | #include <linux/hwspinlock.h> | 19 | #include <linux/hwspinlock.h> |
| 20 | #include <asm/unaligned.h> | ||
| 20 | 21 | ||
| 21 | #define CREATE_TRACE_POINTS | 22 | #define CREATE_TRACE_POINTS |
| 22 | #include "trace.h" | 23 | #include "trace.h" |
| @@ -249,22 +250,20 @@ static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) · 226 unmodified lines | |||
| 249 | 250 | ||
| 250 | static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) | 251 | static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) |
| 251 | { | 252 | { |
| 252 | __be16 *b = buf; | 253 | put_unaligned_be16(val << shift, buf); |
| 253 | |||
| 254 | b[0] = cpu_to_be16(val << shift); | ||
| 255 | } | 254 | } |
| 256 | 255 | ||
| 257 | static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) | 256 | static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) |
| 258 | { | 257 | { |
| 259 | __le16 *b = buf; | 258 | put_unaligned_le16(val << shift, buf); |
| 260 | |||
| 261 | b[0] = cpu_to_le16(val << shift); | ||
| 262 | } | 259 | } |
| 263 | 260 | ||
| 264 | static void regmap_format_16_native(void *buf, unsigned int val, | 261 | static void regmap_format_16_native(void *buf, unsigned int val, |
| 265 | unsigned int shift) | 262 | unsigned int shift) |
| 266 | { | 263 | { |
| 267 | *(u16 *)buf = val << shift; | 264 | u16 v = val << shift; |
| 265 | |||
| 266 | memcpy(buf, &v, sizeof(v)); | ||
| 268 | } | 267 | } |
| 269 | 268 | ||
| 270 | static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) | 269 | static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) |
| @@ -280,43 +279,39 @@ static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) · 9 unmodified lines | |||
| 280 | 279 | ||
| 281 | static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) | 280 | static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) |
| 282 | { | 281 | { |
| 283 | __be32 *b = buf; | 282 | put_unaligned_be32(val << shift, buf); |
| 284 | |||
| 285 | b[0] = cpu_to_be32(val << shift); | ||
| 286 | } | 283 | } |
| 287 | 284 | ||
| 288 | static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) | 285 | static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) |
| 289 | { | 286 | { |
| 290 | __le32 *b = buf; | 287 | put_unaligned_le32(val << shift, buf); |
| 291 | |||
| 292 | b[0] = cpu_to_le32(val << shift); | ||
| 293 | } | 288 | } |
| 294 | 289 | ||
| 295 | static void regmap_format_32_native(void *buf, unsigned int val, | 290 | static void regmap_format_32_native(void *buf, unsigned int val, |
| 296 | unsigned int shift) | 291 | unsigned int shift) |
| 297 | { | 292 | { |
| 298 | *(u32 *)buf = val << shift; | 293 | u32 v = val << shift; |
| 294 | |||
| 295 | memcpy(buf, &v, sizeof(v)); | ||
| 299 | } | 296 | } |
| 300 | 297 | ||
| 301 | #ifdef CONFIG_64BIT | 298 | #ifdef CONFIG_64BIT |
| 302 | static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift) | 299 | static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift) |
| 303 | { | 300 | { |
| 304 | __be64 *b = buf; | 301 | put_unaligned_be64((u64) val << shift, buf); |
| 305 | |||
| 306 | b[0] = cpu_to_be64((u64)val << shift); | ||
| 307 | } | 302 | } |
| 308 | 303 | ||
| 309 | static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift) | 304 | static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift) |
| 310 | { | 305 | { |
| 311 | __le64 *b = buf; | 306 | put_unaligned_le64((u64) val << shift, buf); |
| 312 | |||
| 313 | b[0] = cpu_to_le64((u64)val << shift); | ||
| 314 | } | 307 | } |
| 315 | 308 | ||
| 316 | static void regmap_format_64_native(void *buf, unsigned int val, | 309 | static void regmap_format_64_native(void *buf, unsigned int val, |
| 317 | unsigned int shift) | 310 | unsigned int shift) |
| 318 | { | 311 | { |
| 319 | *(u64 *)buf = (u64)val << shift; | 312 | u64 v = (u64) val << shift; |
| 313 | |||
| 314 | memcpy(buf, &v, sizeof(v)); | ||
| 320 | } | 315 | } |
| 321 | #endif | 316 | #endif |
| 322 | 317 | ||
| @@ -333,35 +328,34 @@ static unsigned int regmap_parse_8(const void *buf) · 10 unmodified lines | |||
| 333 | 328 | ||
| 334 | static unsigned int regmap_parse_16_be(const void *buf) | 329 | static unsigned int regmap_parse_16_be(const void *buf) |
| 335 | { | 330 | { |
| 336 | const __be16 *b = buf; | 331 | return get_unaligned_be16(buf); |
| 337 | |||
| 338 | return be16_to_cpu(b[0]); | ||
| 339 | } | 332 | } |
| 340 | 333 | ||
| 341 | static unsigned int regmap_parse_16_le(const void *buf) | 334 | static unsigned int regmap_parse_16_le(const void *buf) |
| 342 | { | 335 | { |
| 343 | const __le16 *b = buf; | 336 | return get_unaligned_le16(buf); |
| 344 | |||
| 345 | return le16_to_cpu(b[0]); | ||
| 346 | } | 337 | } |
| 347 | 338 | ||
| 348 | static void regmap_parse_16_be_inplace(void *buf) | 339 | static void regmap_parse_16_be_inplace(void *buf) |
| 349 | { | 340 | { |
| 350 | __be16 *b = buf; | 341 | u16 v = get_unaligned_be16(buf); |
| 351 | 342 | ||
| 352 | b[0] = be16_to_cpu(b[0]); | 343 | memcpy(buf, &v, sizeof(v)); |
| 353 | } | 344 | } |
| 354 | 345 | ||
| 355 | static void regmap_parse_16_le_inplace(void *buf) | 346 | static void regmap_parse_16_le_inplace(void *buf) |
| 356 | { | 347 | { |
| 357 | __le16 *b = buf; | 348 | u16 v = get_unaligned_le16(buf); |
| 358 | 349 | ||
| 359 | b[0] = le16_to_cpu(b[0]); | 350 | memcpy(buf, &v, sizeof(v)); |
| 360 | } | 351 | } |
| 361 | 352 | ||
| 362 | static unsigned int regmap_parse_16_native(const void *buf) | 353 | static unsigned int regmap_parse_16_native(const void *buf) |
| 363 | { | 354 | { |
| 364 | return *(u16 *)buf; | 355 | u16 v; |
| 356 | |||
| 357 | memcpy(&v, buf, sizeof(v)); | ||
| 358 | return v; | ||
| 365 | } | 359 | } |
| 366 | 360 | ||
| 367 | static unsigned int regmap_parse_24(const void *buf) | 361 | static unsigned int regmap_parse_24(const void *buf) |
| @@ -376,69 +370,67 @@ static unsigned int regmap_parse_24(const void *buf) · 8 unmodified lines | |||
| 376 | 370 | ||
| 377 | static unsigned int regmap_parse_32_be(const void *buf) | 371 | static unsigned int regmap_parse_32_be(const void *buf) |
| 378 | { | 372 | { |
| 379 | const __be32 *b = buf; | 373 | return get_unaligned_be32(buf); |
| 380 | |||
| 381 | return be32_to_cpu(b[0]); | ||
| 382 | } | 374 | } |
| 383 | 375 | ||
| 384 | static unsigned int regmap_parse_32_le(const void *buf) | 376 | static unsigned int regmap_parse_32_le(const void *buf) |
| 385 | { | 377 | { |
| 386 | const __le32 *b = buf; | 378 | return get_unaligned_le32(buf); |
| 387 | |||
| 388 | return le32_to_cpu(b[0]); | ||
| 389 | } | 379 | } |
| 390 | 380 | ||
| 391 | static void regmap_parse_32_be_inplace(void *buf) | 381 | static void regmap_parse_32_be_inplace(void *buf) |
| 392 | { | 382 | { |
| 393 | __be32 *b = buf; | 383 | u32 v = get_unaligned_be32(buf); |
| 394 | 384 | ||
| 395 | b[0] = be32_to_cpu(b[0]); | 385 | memcpy(buf, &v, sizeof(v)); |
| 396 | } | 386 | } |
| 397 | 387 | ||
| 398 | static void regmap_parse_32_le_inplace(void *buf) | 388 | static void regmap_parse_32_le_inplace(void *buf) |
| 399 | { | 389 | { |
| 400 | __le32 *b = buf; | 390 | u32 v = get_unaligned_le32(buf); |
| 401 | 391 | ||
| 402 | b[0] = le32_to_cpu(b[0]); | 392 | memcpy(buf, &v, sizeof(v)); |
| 403 | } | 393 | } |
| 404 | 394 | ||
| 405 | static unsigned int regmap_parse_32_native(const void *buf) | 395 | static unsigned int regmap_parse_32_native(const void *buf) |
| 406 | { | 396 | { |
| 407 | return *(u32 *)buf; | 397 | u32 v; |
| 398 | |||
| 399 | memcpy(&v, buf, sizeof(v)); | ||
| 400 | return v; | ||
| 408 | } | 401 | } |
| 409 | 402 | ||
| 410 | #ifdef CONFIG_64BIT | 403 | #ifdef CONFIG_64BIT |
| 411 | static unsigned int regmap_parse_64_be(const void *buf) | 404 | static unsigned int regmap_parse_64_be(const void *buf) |
| 412 | { | 405 | { |
| 413 | const __be64 *b = buf; | 406 | return get_unaligned_be64(buf); |
| 414 | |||
| 415 | return be64_to_cpu(b[0]); | ||
| 416 | } | 407 | } |
| 417 | 408 | ||
| 418 | static unsigned int regmap_parse_64_le(const void *buf) | 409 | static unsigned int regmap_parse_64_le(const void *buf) |
| 419 | { | 410 | { |
| 420 | const __le64 *b = buf; | 411 | return get_unaligned_le64(buf); |
| 421 | |||
| 422 | return le64_to_cpu(b[0]); | ||
| 423 | } | 412 | } |
| 424 | 413 | ||
| 425 | static void regmap_parse_64_be_inplace(void *buf) | 414 | static void regmap_parse_64_be_inplace(void *buf) |
| 426 | { | 415 | { |
| 427 | __be64 *b = buf; | 416 | u64 v = get_unaligned_be64(buf); |
| 428 | 417 | ||
| 429 | b[0] = be64_to_cpu(b[0]); | 418 | memcpy(buf, &v, sizeof(v)); |
| 430 | } | 419 | } |
| 431 | 420 | ||
| 432 | static void regmap_parse_64_le_inplace(void *buf) | 421 | static void regmap_parse_64_le_inplace(void *buf) |
| 433 | { | 422 | { |
| 434 | __le64 *b = buf; | 423 | u64 v = get_unaligned_le64(buf); |
| 435 | 424 | ||
| 436 | b[0] = le64_to_cpu(b[0]); | 425 | memcpy(buf, &v, sizeof(v)); |
| 437 | } | 426 | } |
| 438 | 427 | ||
| 439 | static unsigned int regmap_parse_64_native(const void *buf) | 428 | static unsigned int regmap_parse_64_native(const void *buf) |
| 440 | { | 429 | { |
| 441 | return *(u64 *)buf; | 430 | u64 v; |
| 431 | |||
| 432 | memcpy(&v, buf, sizeof(v)); | ||
| 433 | return v; | ||
| 442 | } | 434 | } |
| 443 | #endif | 435 | #endif |
| 444 | 436 | ||
| @@ -1357,6 +1349,7 @@ void regmap_exit(struct regmap *map) · 912 unmodified lines | |||
| 1357 | if (map->hwlock) | 1349 | if (map->hwlock) |
| 1358 | hwspin_lock_free(map->hwlock); | 1350 | hwspin_lock_free(map->hwlock); |
| 1359 | kfree_const(map->name); | 1351 | kfree_const(map->name); |
| 1352 | kfree(map->patch); | ||
| 1360 | kfree(map); | 1353 | kfree(map); |
| 1361 | } | 1354 | } |
| 1362 | EXPORT_SYMBOL_GPL(regmap_exit); | 1355 | EXPORT_SYMBOL_GPL(regmap_exit); |
| @@ -1371,7 +1364,7 @@ static int dev_get_regmap_match(struct device *dev, void *res, void *data) · 8 unmodified lines | |||
| 1371 | 1364 | ||
| 1372 | /* If the user didn't specify a name match any */ | 1365 | /* If the user didn't specify a name match any */ |
| 1373 | if (data) | 1366 | if (data) |
| 1374 | return (*r)->name == data; | 1367 | return !strcmp((*r)->name, data); |
| 1375 | else | 1368 | else |
| 1376 | return 1; | 1369 | return 1; |
| 1377 | } | 1370 | } |
| @@ -2944,8 +2937,9 @@ EXPORT_SYMBOL_GPL(regmap_update_bits_base); · 1566 unmodified lines | |||
| 2944 | * @reg: Register to read from | 2937 | * @reg: Register to read from |
| 2945 | * @bits: Bits to test | 2938 | * @bits: Bits to test |
| 2946 | * | 2939 | * |
| 2947 | * Returns -1 if the underlying regmap_read() fails, 0 if at least one of the | 2940 | * Returns 0 if at least one of the tested bits is not set, 1 if all tested |
| 2948 | * tested bits is not set and 1 if all tested bits are set. | 2941 | * bits are set and a negative error number if the underlying regmap_read() |
| 2942 | * fails. | ||
| 2949 | */ | 2943 | */ |
| 2950 | int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits) | 2944 | int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits) |
| 2951 | { | 2945 | { |
| @@ -1033,25 +1033,26 @@ static int nbd_add_socket(struct nbd_device *nbd, unsigned long arg, · 1032 unmodified lines | |||
| 1033 | test_bit(NBD_RT_BOUND, &config->runtime_flags))) { | 1033 | test_bit(NBD_RT_BOUND, &config->runtime_flags))) { |
| 1034 | dev_err(disk_to_dev(nbd->disk), | 1034 | dev_err(disk_to_dev(nbd->disk), |
| 1035 | "Device being setup by another task"); | 1035 | "Device being setup by another task"); |
| 1036 | sockfd_put(sock); | 1036 | err = -EBUSY; |
| 1037 | return -EBUSY; | 1037 | goto put_socket; |
| 1038 | } | ||
| 1039 | |||
| 1040 | nsock = kzalloc(sizeof(*nsock), GFP_KERNEL); | ||
| 1041 | if (!nsock) { | ||
| 1042 | err = -ENOMEM; | ||
| 1043 | goto put_socket; | ||
| 1038 | } | 1044 | } |
| 1039 | 1045 | ||
| 1040 | socks = krealloc(config->socks, (config->num_connections + 1) * | 1046 | socks = krealloc(config->socks, (config->num_connections + 1) * |
| 1041 | sizeof(struct nbd_sock *), GFP_KERNEL); | 1047 | sizeof(struct nbd_sock *), GFP_KERNEL); |
| 1042 | if (!socks) { | 1048 | if (!socks) { |
| 1043 | sockfd_put(sock); | 1049 | kfree(nsock); |
| 1044 | return -ENOMEM; | 1050 | err = -ENOMEM; |
| 1051 | goto put_socket; | ||
| 1045 | } | 1052 | } |
| 1046 | 1053 | ||
| 1047 | config->socks = socks; | 1054 | config->socks = socks; |
| 1048 | 1055 | ||
| 1049 | nsock = kzalloc(sizeof(struct nbd_sock), GFP_KERNEL); | ||
| 1050 | if (!nsock) { | ||
| 1051 | sockfd_put(sock); | ||
| 1052 | return -ENOMEM; | ||
| 1053 | } | ||
| 1054 | |||
| 1055 | nsock->fallback_index = -1; | 1056 | nsock->fallback_index = -1; |
| 1056 | nsock->dead = false; | 1057 | nsock->dead = false; |
| 1057 | mutex_init(&nsock->tx_lock); | 1058 | mutex_init(&nsock->tx_lock); |
| @@ -1063,6 +1064,10 @@ static int nbd_add_socket(struct nbd_device *nbd, unsigned long arg, · 5 unmodified lines | |||
| 1063 | atomic_inc(&config->live_connections); | 1064 | atomic_inc(&config->live_connections); |
| 1064 | 1065 | ||
| 1065 | return 0; | 1066 | return 0; |
| 1067 | |||
| 1068 | put_socket: | ||
| 1069 | sockfd_put(sock); | ||
| 1070 | return err; | ||
| 1066 | } | 1071 | } |
| 1067 | 1072 | ||
| 1068 | static int nbd_reconnect_socket(struct nbd_device *nbd, unsigned long arg) | 1073 | static int nbd_reconnect_socket(struct nbd_device *nbd, unsigned long arg) |
| @@ -878,6 +878,7 @@ out_put_disk: · 877 unmodified lines | |||
| 878 | put_disk(vblk->disk); | 878 | put_disk(vblk->disk); |
| 879 | out_free_vq: | 879 | out_free_vq: |
| 880 | vdev->config->del_vqs(vdev); | 880 | vdev->config->del_vqs(vdev); |
| 881 | kfree(vblk->vqs); | ||
| 881 | out_free_vblk: | 882 | out_free_vblk: |
| 882 | kfree(vblk); | 883 | kfree(vblk); |
| 883 | out_free_index: | 884 | out_free_index: |
| @@ -2021,7 +2021,8 @@ static ssize_t hot_add_show(struct class *class, · 2020 unmodified lines | |||
| 2021 | return ret; | 2021 | return ret; |
| 2022 | return scnprintf(buf, PAGE_SIZE, "%d\n", ret); | 2022 | return scnprintf(buf, PAGE_SIZE, "%d\n", ret); |
| 2023 | } | 2023 | } |
| 2024 | static CLASS_ATTR_RO(hot_add); | 2024 | static struct class_attribute class_attr_hot_add = |
| 2025 | __ATTR(hot_add, 0400, hot_add_show, NULL); | ||
| 2025 | 2026 | ||
| 2026 | static ssize_t hot_remove_store(struct class *class, | 2027 | static ssize_t hot_remove_store(struct class *class, |
| 2027 | struct class_attribute *attr, | 2028 | struct class_attribute *attr, |
| @@ -221,6 +221,34 @@ static u32 sysc_read_sysstatus(struct sysc *ddata) · 220 unmodified lines | |||
| 221 | return sysc_read(ddata, offset); | 221 | return sysc_read(ddata, offset); |
| 222 | } | 222 | } |
| 223 | 223 | ||
| 224 | /* Poll on reset status */ | ||
| 225 | static int sysc_wait_softreset(struct sysc *ddata) | ||
| 226 | { | ||
| 227 | u32 sysc_mask, syss_done, rstval; | ||
| 228 | int syss_offset, error = 0; | ||
| 229 | |||
| 230 | syss_offset = ddata->offsets[SYSC_SYSSTATUS]; | ||
| 231 | sysc_mask = BIT(ddata->cap->regbits->srst_shift); | ||
| 232 | |||
| 233 | if (ddata->cfg.quirks & SYSS_QUIRK_RESETDONE_INVERTED) | ||
| 234 | syss_done = 0; | ||
| 235 | else | ||
| 236 | syss_done = ddata->cfg.syss_mask; | ||
| 237 | |||
| 238 | if (syss_offset >= 0) { | ||
| 239 | error = readx_poll_timeout_atomic(sysc_read_sysstatus, ddata, | ||
| 240 | rstval, (rstval & ddata->cfg.syss_mask) == | ||
| 241 | syss_done, 100, MAX_MODULE_SOFTRESET_WAIT); | ||
| 242 | |||
| 243 | } else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS) { | ||
| 244 | error = readx_poll_timeout_atomic(sysc_read_sysconfig, ddata, | ||
| 245 | rstval, !(rstval & sysc_mask), | ||
| 246 | 100, MAX_MODULE_SOFTRESET_WAIT); | ||
| 247 | } | ||
| 248 | |||
| 249 | return error; | ||
| 250 | } | ||
| 251 | |||
| 224 | static int sysc_add_named_clock_from_child(struct sysc *ddata, | 252 | static int sysc_add_named_clock_from_child(struct sysc *ddata, |
| 225 | const char *name, | 253 | const char *name, |
| 226 | const char *optfck_name) | 254 | const char *optfck_name) |
| @@ -925,18 +953,47 @@ static int sysc_enable_module(struct device *dev) · 698 unmodified lines | |||
| 925 | struct sysc *ddata; | 953 | struct sysc *ddata; |
| 926 | const struct sysc_regbits *regbits; | 954 | const struct sysc_regbits *regbits; |
| 927 | u32 reg, idlemodes, best_mode; | 955 | u32 reg, idlemodes, best_mode; |
| 956 | int error; | ||
| 928 | 957 | ||
| 929 | ddata = dev_get_drvdata(dev); | 958 | ddata = dev_get_drvdata(dev); |
| 959 | |||
| 960 | /* | ||
| 961 | * Some modules like DSS reset automatically on idle. Enable optional | ||
| 962 | * reset clocks and wait for OCP softreset to complete. | ||
| 963 | */ | ||
| 964 | if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET) { | ||
| 965 | error = sysc_enable_opt_clocks(ddata); | ||
| 966 | if (error) { | ||
| 967 | dev_err(ddata->dev, | ||
| 968 | "Optional clocks failed for enable: %i\n", | ||
| 969 | error); | ||
| 970 | return error; | ||
| 971 | } | ||
| 972 | } | ||
| 973 | error = sysc_wait_softreset(ddata); | ||
| 974 | if (error) | ||
| 975 | dev_warn(ddata->dev, "OCP softreset timed out\n"); | ||
| 976 | if (ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_IN_RESET) | ||
| 977 | sysc_disable_opt_clocks(ddata); | ||
| 978 | |||
| 979 | /* | ||
| 980 | * Some subsystem private interconnects, like DSS top level module, | ||
| 981 | * need only the automatic OCP softreset handling with no sysconfig | ||
| 982 | * register bits to configure. | ||
| 983 | */ | ||
| 930 | if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV) | 984 | if (ddata->offsets[SYSC_SYSCONFIG] == -ENODEV) |
| 931 | return 0; | 985 | return 0; |
| 932 | 986 | ||
| 933 | regbits = ddata->cap->regbits; | 987 | regbits = ddata->cap->regbits; |
| 934 | reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]); | 988 | reg = sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]); |
| 935 | 989 | ||
| 936 | /* Set CLOCKACTIVITY, we only use it for ick */ | 990 | /* |
| 991 | * Set CLOCKACTIVITY, we only use it for ick. And we only configure it | ||
| 992 | * based on the SYSC_QUIRK_USE_CLOCKACT flag, not based on the hardware | ||
| 993 | * capabilities. See the old HWMOD_SET_DEFAULT_CLOCKACT flag. | ||
| 994 | */ | ||
| 937 | if (regbits->clkact_shift >= 0 && | 995 | if (regbits->clkact_shift >= 0 && |
| 938 | (ddata->cfg.quirks & SYSC_QUIRK_USE_CLOCKACT || | 996 | (ddata->cfg.quirks & SYSC_QUIRK_USE_CLOCKACT)) |
| 939 | ddata->cfg.sysc_val & BIT(regbits->clkact_shift))) | ||
| 940 | reg |= SYSC_CLOCACT_ICK << regbits->clkact_shift; | 997 | reg |= SYSC_CLOCACT_ICK << regbits->clkact_shift; |
| 941 | 998 | ||
| 942 | /* Set SIDLE mode */ | 999 | /* Set SIDLE mode */ |
| @@ -991,6 +1048,9 @@ set_autoidle: · 48 unmodified lines | |||
| 991 | sysc_write_sysconfig(ddata, reg); | 1048 | sysc_write_sysconfig(ddata, reg); |
| 992 | } | 1049 | } |
| 993 | 1050 | ||
| 1051 | /* Flush posted write */ | ||
| 1052 | sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]); | ||
| 1053 | |||
| 994 | if (ddata->module_enable_quirk) | 1054 | if (ddata->module_enable_quirk) |
| 995 | ddata->module_enable_quirk(ddata); | 1055 | ddata->module_enable_quirk(ddata); |
| 996 | 1056 | ||
| @@ -1071,6 +1131,9 @@ set_sidle: · 74 unmodified lines | |||
| 1071 | reg |= 1 << regbits->autoidle_shift; | 1131 | reg |= 1 << regbits->autoidle_shift; |
| 1072 | sysc_write_sysconfig(ddata, reg); | 1132 | sysc_write_sysconfig(ddata, reg); |
| 1073 | 1133 | ||
| 1134 | /* Flush posted write */ | ||
| 1135 | sysc_read(ddata, ddata->offsets[SYSC_SYSCONFIG]); | ||
| 1136 | |||
| 1074 | return 0; | 1137 | return 0; |
| 1075 | } | 1138 | } |
| 1076 | 1139 | ||
| @@ -1215,7 +1278,8 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev) · 138 unmodified lines | |||
| 1215 | 1278 | ||
| 1216 | ddata = dev_get_drvdata(dev); | 1279 | ddata = dev_get_drvdata(dev); |
| 1217 | 1280 | ||
| 1218 | if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE) | 1281 | if (ddata->cfg.quirks & |
| 1282 | (SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE)) | ||
| 1219 | return 0; | 1283 | return 0; |
| 1220 | 1284 | ||
| 1221 | return pm_runtime_force_suspend(dev); | 1285 | return pm_runtime_force_suspend(dev); |
| @@ -1227,7 +1291,8 @@ static int __maybe_unused sysc_noirq_resume(struct device *dev) · 5 unmodified lines | |||
| 1227 | 1291 | ||
| 1228 | ddata = dev_get_drvdata(dev); | 1292 | ddata = dev_get_drvdata(dev); |
| 1229 | 1293 | ||
| 1230 | if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE) | 1294 | if (ddata->cfg.quirks & |
| 1295 | (SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE)) | ||
| 1231 | return 0; | 1296 | return 0; |
| 1232 | 1297 | ||
| 1233 | return pm_runtime_force_resume(dev); | 1298 | return pm_runtime_force_resume(dev); |
| @@ -1488,7 +1553,7 @@ static u32 sysc_quirk_dispc(struct sysc *ddata, int dispc_offset, · 254 unmodified lines | |||
| 1488 | bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false; | 1553 | bool lcd_en, digit_en, lcd2_en = false, lcd3_en = false; |
| 1489 | const int lcd_en_mask = BIT(0), digit_en_mask = BIT(1); | 1554 | const int lcd_en_mask = BIT(0), digit_en_mask = BIT(1); |
| 1490 | int manager_count; | 1555 | int manager_count; |
| 1491 | bool framedonetv_irq; | 1556 | bool framedonetv_irq = true; |
| 1492 | u32 val, irq_mask = 0; | 1557 | u32 val, irq_mask = 0; |
| 1493 | 1558 | ||
| 1494 | switch (sysc_soc->soc) { | 1559 | switch (sysc_soc->soc) { |
| @@ -1505,6 +1570,7 @@ static u32 sysc_quirk_dispc(struct sysc *ddata, int dispc_offset, · 10 unmodified lines | |||
| 1505 | break; | 1570 | break; |
| 1506 | case SOC_AM4: | 1571 | case SOC_AM4: |
| 1507 | manager_count = 1; | 1572 | manager_count = 1; |
| 1573 | framedonetv_irq = false; | ||
| 1508 | break; | 1574 | break; |
| 1509 | case SOC_UNKNOWN: | 1575 | case SOC_UNKNOWN: |
| 1510 | default: | 1576 | default: |
| @@ -1663,8 +1729,8 @@ static void sysc_quirk_rtc(struct sysc *ddata, bool lock) · 152 unmodified lines | |||
| 1663 | 1729 | ||
| 1664 | local_irq_save(flags); | 1730 | local_irq_save(flags); |
| 1665 | /* RTC_STATUS BUSY bit may stay active for 1/32768 seconds (~30 usec) */ | 1731 | /* RTC_STATUS BUSY bit may stay active for 1/32768 seconds (~30 usec) */ |
| 1666 | error = readl_poll_timeout(ddata->module_va + 0x44, val, | 1732 | error = readl_poll_timeout_atomic(ddata->module_va + 0x44, val, |
| 1667 | !(val & BIT(0)), 100, 50); | 1733 | !(val & BIT(0)), 100, 50); |
| 1668 | if (error) | 1734 | if (error) |
| 1669 | dev_warn(ddata->dev, "rtc busy timeout\n"); | 1735 | dev_warn(ddata->dev, "rtc busy timeout\n"); |
| 1670 | /* Now we have ~15 microseconds to read/write various registers */ | 1736 | /* Now we have ~15 microseconds to read/write various registers */ |
| @@ -1822,11 +1888,10 @@ static int sysc_legacy_init(struct sysc *ddata) · 151 unmodified lines | |||
| 1822 | */ | 1888 | */ |
| 1823 | static int sysc_reset(struct sysc *ddata) | 1889 | static int sysc_reset(struct sysc *ddata) |
| 1824 | { | 1890 | { |
| 1825 | int sysc_offset, syss_offset, sysc_val, rstval, error = 0; | 1891 | int sysc_offset, sysc_val, error; |
| 1826 | u32 sysc_mask, syss_done; | 1892 | u32 sysc_mask; |
| 1827 | 1893 | ||
| 1828 | sysc_offset = ddata->offsets[SYSC_SYSCONFIG]; | 1894 | sysc_offset = ddata->offsets[SYSC_SYSCONFIG]; |
| 1829 | syss_offset = ddata->offsets[SYSC_SYSSTATUS]; | ||
| 1830 | 1895 | ||
| 1831 | if (ddata->legacy_mode || | 1896 | if (ddata->legacy_mode || |
| 1832 | ddata->cap->regbits->srst_shift < 0 || | 1897 | ddata->cap->regbits->srst_shift < 0 || |
| @@ -1835,11 +1900,6 @@ static int sysc_reset(struct sysc *ddata) · 2 unmodified lines | |||
| 1835 | 1900 | ||
| 1836 | sysc_mask = BIT(ddata->cap->regbits->srst_shift); | 1901 | sysc_mask = BIT(ddata->cap->regbits->srst_shift); |
| 1837 | 1902 | ||
| 1838 | if (ddata->cfg.quirks & SYSS_QUIRK_RESETDONE_INVERTED) | ||
| 1839 | syss_done = 0; | ||
| 1840 | else | ||
| 1841 | syss_done = ddata->cfg.syss_mask; | ||
| 1842 | |||
| 1843 | if (ddata->pre_reset_quirk) | 1903 | if (ddata->pre_reset_quirk) |
| 1844 | ddata->pre_reset_quirk(ddata); | 1904 | ddata->pre_reset_quirk(ddata); |
| 1845 | 1905 | ||
| @@ -1856,18 +1916,9 @@ static int sysc_reset(struct sysc *ddata) · 10 unmodified lines | |||
| 1856 | if (ddata->post_reset_quirk) | 1916 | if (ddata->post_reset_quirk) |
| 1857 | ddata->post_reset_quirk(ddata); | 1917 | ddata->post_reset_quirk(ddata); |
| 1858 | 1918 | ||
| 1859 | /* Poll on reset status */ | 1919 | error = sysc_wait_softreset(ddata); |
| 1860 | if (syss_offset >= 0) { | 1920 | if (error) |
| 1861 | error = readx_poll_timeout(sysc_read_sysstatus, ddata, rstval, | 1921 | dev_warn(ddata->dev, "OCP softreset timed out\n"); |
| 1862 | (rstval & ddata->cfg.syss_mask) == | ||
| 1863 | syss_done, | ||
| 1864 | 100, MAX_MODULE_SOFTRESET_WAIT); | ||
| 1865 | |||
| 1866 | } else if (ddata->cfg.quirks & SYSC_QUIRK_RESET_STATUS) { | ||
| 1867 | error = readx_poll_timeout(sysc_read_sysconfig, ddata, rstval, | ||
| 1868 | !(rstval & sysc_mask), | ||
| 1869 | 100, MAX_MODULE_SOFTRESET_WAIT); | ||
| 1870 | } | ||
| 1871 | 1922 | ||
| 1872 | if (ddata->reset_done_quirk) | 1923 | if (ddata->reset_done_quirk) |
| 1873 | ddata->reset_done_quirk(ddata); | 1924 | ddata->reset_done_quirk(ddata); |
| @@ -210,7 +210,7 @@ static int st33zp24_i2c_request_resources(struct i2c_client *client) · 209 unmodified lines | |||
| 210 | 210 | ||
| 211 | /* | 211 | /* |
| 212 | * st33zp24_i2c_probe initialize the TPM device | 212 | * st33zp24_i2c_probe initialize the TPM device |
| 213 | * @param: client, the i2c_client drescription (TPM I2C description). | 213 | * @param: client, the i2c_client description (TPM I2C description). |
| 214 | * @param: id, the i2c_device_id struct. | 214 | * @param: id, the i2c_device_id struct. |
| 215 | * @return: 0 in case of success. | 215 | * @return: 0 in case of success. |
| 216 | * -1 in other case. | 216 | * -1 in other case. |
| @@ -329,7 +329,7 @@ static int st33zp24_spi_request_resources(struct spi_device *dev) · 328 unmodified lines | |||
| 329 | 329 | ||
| 330 | /* | 330 | /* |
| 331 | * st33zp24_spi_probe initialize the TPM device | 331 | * st33zp24_spi_probe initialize the TPM device |
| 332 | * @param: dev, the spi_device drescription (TPM SPI description). | 332 | * @param: dev, the spi_device description (TPM SPI description). |
| 333 | * @return: 0 in case of success. | 333 | * @return: 0 in case of success. |
| 334 | * or a negative value describing the error. | 334 | * or a negative value describing the error. |
| 335 | */ | 335 | */ |
| @@ -378,7 +378,7 @@ static int st33zp24_spi_probe(struct spi_device *dev) · 42 unmodified lines | |||
| 378 | 378 | ||
| 379 | /* | 379 | /* |
| 380 | * st33zp24_spi_remove remove the TPM device | 380 | * st33zp24_spi_remove remove the TPM device |
| 381 | * @param: client, the spi_device drescription (TPM SPI description). | 381 | * @param: client, the spi_device description (TPM SPI description). |
| 382 | * @return: 0 in case of success. | 382 | * @return: 0 in case of success. |
| 383 | */ | 383 | */ |
| 384 | static int st33zp24_spi_remove(struct spi_device *dev) | 384 | static int st33zp24_spi_remove(struct spi_device *dev) |
| @@ -502,7 +502,7 @@ static const struct tpm_class_ops st33zp24_tpm = { · 501 unmodified lines | |||
| 502 | 502 | ||
| 503 | /* | 503 | /* |
| 504 | * st33zp24_probe initialize the TPM device | 504 | * st33zp24_probe initialize the TPM device |
| 505 | * @param: client, the i2c_client drescription (TPM I2C description). | 505 | * @param: client, the i2c_client description (TPM I2C description). |
| 506 | * @param: id, the i2c_device_id struct. | 506 | * @param: id, the i2c_device_id struct. |
| 507 | * @return: 0 in case of success. | 507 | * @return: 0 in case of success. |
| 508 | * -1 in other case. | 508 | * -1 in other case. |
| @@ -189,15 +189,6 @@ ssize_t tpm_common_write(struct file *file, const char __user *buf, · 188 unmodified lines | |||
| 189 | goto out; | 189 | goto out; |
| 190 | } | 190 | } |
| 191 | 191 | ||
| 192 | /* atomic tpm command send and result receive. We only hold the ops | ||
| 193 | * lock during this period so that the tpm can be unregistered even if | ||
| 194 | * the char dev is held open. | ||
| 195 | */ | ||
| 196 | if (tpm_try_get_ops(priv->chip)) { | ||
| 197 | ret = -EPIPE; | ||
| 198 | goto out; | ||
| 199 | } | ||
| 200 | |||
| 201 | priv->response_length = 0; | 192 | priv->response_length = 0; |
| 202 | priv->response_read = false; | 193 | priv->response_read = false; |
| 203 | *off = 0; | 194 | *off = 0; |
| @@ -211,11 +202,19 @@ ssize_t tpm_common_write(struct file *file, const char __user *buf, · 7 unmodified lines | |||
| 211 | if (file->f_flags & O_NONBLOCK) { | 202 | if (file->f_flags & O_NONBLOCK) { |
| 212 | priv->command_enqueued = true; | 203 | priv->command_enqueued = true; |
| 213 | queue_work(tpm_dev_wq, &priv->async_work); | 204 | queue_work(tpm_dev_wq, &priv->async_work); |
| 214 | tpm_put_ops(priv->chip); | ||
| 215 | mutex_unlock(&priv->buffer_mutex); | 205 | mutex_unlock(&priv->buffer_mutex); |
| 216 | return size; | 206 | return size; |
| 217 | } | 207 | } |
| 218 | 208 | ||
| 209 | /* atomic tpm command send and result receive. We only hold the ops | ||
| 210 | * lock during this period so that the tpm can be unregistered even if | ||
| 211 | * the char dev is held open. | ||
| 212 | */ | ||
| 213 | if (tpm_try_get_ops(priv->chip)) { | ||
| 214 | ret = -EPIPE; | ||
| 215 | goto out; | ||
| 216 | } | ||
| 217 | |||
| 219 | ret = tpm_dev_transmit(priv->chip, priv->space, priv->data_buffer, | 218 | ret = tpm_dev_transmit(priv->chip, priv->space, priv->data_buffer, |
| 220 | sizeof(priv->data_buffer)); | 219 | sizeof(priv->data_buffer)); |
| 221 | tpm_put_ops(priv->chip); | 220 | tpm_put_ops(priv->chip); |
| @@ -683,13 +683,6 @@ static int tpm_ibmvtpm_probe(struct vio_dev *vio_dev, · 682 unmodified lines | |||
| 683 | if (rc) | 683 | if (rc) |
| 684 | goto init_irq_cleanup; | 684 | goto init_irq_cleanup; |
| 685 | 685 | ||
| 686 | if (!strcmp(id->compat, "IBM,vtpm20")) { | ||
| 687 | chip->flags |= TPM_CHIP_FLAG_TPM2; | ||
| 688 | rc = tpm2_get_cc_attrs_tbl(chip); | ||
| 689 | if (rc) | ||
| 690 | goto init_irq_cleanup; | ||
| 691 | } | ||
| 692 | |||
| 693 | if (!wait_event_timeout(ibmvtpm->crq_queue.wq, | 686 | if (!wait_event_timeout(ibmvtpm->crq_queue.wq, |
| 694 | ibmvtpm->rtce_buf != NULL, | 687 | ibmvtpm->rtce_buf != NULL, |
| 695 | HZ)) { | 688 | HZ)) { |
| @@ -697,6 +690,13 @@ static int tpm_ibmvtpm_probe(struct vio_dev *vio_dev, · 1 unmodified line | |||
| 697 | goto init_irq_cleanup; | 690 | goto init_irq_cleanup; |
| 698 | } | 691 | } |
| 699 | 692 | ||
| 693 | if (!strcmp(id->compat, "IBM,vtpm20")) { | ||
| 694 | chip->flags |= TPM_CHIP_FLAG_TPM2; | ||
| 695 | rc = tpm2_get_cc_attrs_tbl(chip); | ||
| 696 | if (rc) | ||
| 697 | goto init_irq_cleanup; | ||
| 698 | } | ||
| 699 | |||
| 700 | return tpm_chip_register(chip); | 700 | return tpm_chip_register(chip); |
| 701 | init_irq_cleanup: | 701 | init_irq_cleanup: |
| 702 | do { | 702 | do { |
| @@ -235,6 +235,13 @@ static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev, · 234 unmodified lines | |||
| 235 | return tpm_tis_init(&pnp_dev->dev, &tpm_info); | 235 | return tpm_tis_init(&pnp_dev->dev, &tpm_info); |
| 236 | } | 236 | } |
| 237 | 237 | ||
| 238 | /* | ||
| 239 | * There is a known bug caused by 93e1b7d42e1e ("[PATCH] tpm: add HID module | ||
| 240 | * parameter"). This commit added IFX0102 device ID, which is also used by | ||
| 241 | * tpm_infineon but ignored to add quirks to probe which driver ought to be | ||
| 242 | * used. | ||
| 243 | */ | ||
| 244 | |||
| 238 | static struct pnp_device_id tpm_pnp_tbl[] = { | 245 | static struct pnp_device_id tpm_pnp_tbl[] = { |
| 239 | {"PNP0C31", 0}, /* TPM */ | 246 | {"PNP0C31", 0}, /* TPM */ |
| 240 | {"ATM1200", 0}, /* Atmel */ | 247 | {"ATM1200", 0}, /* Atmel */ |
| @@ -1085,7 +1085,7 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq, · 1084 unmodified lines | |||
| 1085 | 1085 | ||
| 1086 | return 0; | 1086 | return 0; |
| 1087 | out_err: | 1087 | out_err: |
| 1088 | if ((chip->ops != NULL) && (chip->ops->clk_enable != NULL)) | 1088 | if (chip->ops->clk_enable != NULL) |
| 1089 | chip->ops->clk_enable(chip, false); | 1089 | chip->ops->clk_enable(chip, false); |
| 1090 | 1090 | ||
| 1091 | tpm_tis_remove(chip); | 1091 | tpm_tis_remove(chip); |
| @@ -53,8 +53,6 @@ static int tpm_tis_spi_flow_control(struct tpm_tis_spi_phy *phy, · 52 unmodified lines | |||
| 53 | 53 | ||
| 54 | if ((phy->iobuf[3] & 0x01) == 0) { | 54 | if ((phy->iobuf[3] & 0x01) == 0) { |
| 55 | // handle SPI wait states | 55 | // handle SPI wait states |
| 56 | phy->iobuf[0] = 0; | ||
| 57 | |||
| 58 | for (i = 0; i < TPM_RETRY; i++) { | 56 | for (i = 0; i < TPM_RETRY; i++) { |
| 59 | spi_xfer->len = 1; | 57 | spi_xfer->len = 1; |
| 60 | spi_message_init(&m); | 58 | spi_message_init(&m); |
| @@ -104,6 +102,8 @@ int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len, · 43 unmodified lines | |||
| 104 | if (ret < 0) | 102 | if (ret < 0) |
| 105 | goto exit; | 103 | goto exit; |
| 106 | 104 | ||
| 105 | /* Flow control transfers are receive only */ | ||
| 106 | spi_xfer.tx_buf = NULL; | ||
| 107 | ret = phy->flow_control(phy, &spi_xfer); | 107 | ret = phy->flow_control(phy, &spi_xfer); |
| 108 | if (ret < 0) | 108 | if (ret < 0) |
| 109 | goto exit; | 109 | goto exit; |
| @@ -113,9 +113,8 @@ int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len, · 3 unmodified lines | |||
| 113 | spi_xfer.delay.value = 5; | 113 | spi_xfer.delay.value = 5; |
| 114 | spi_xfer.delay.unit = SPI_DELAY_UNIT_USECS; | 114 | spi_xfer.delay.unit = SPI_DELAY_UNIT_USECS; |
| 115 | 115 | ||
| 116 | if (in) { | 116 | if (out) { |
| 117 | spi_xfer.tx_buf = NULL; | 117 | spi_xfer.tx_buf = phy->iobuf; |
| 118 | } else if (out) { | ||
| 119 | spi_xfer.rx_buf = NULL; | 118 | spi_xfer.rx_buf = NULL; |
| 120 | memcpy(phy->iobuf, out, transfer_len); | 119 | memcpy(phy->iobuf, out, transfer_len); |
| 121 | out += transfer_len; | 120 | out += transfer_len; |
| @@ -288,6 +287,7 @@ static struct spi_driver tpm_tis_spi_driver = { · 166 unmodified lines | |||
| 288 | .pm = &tpm_tis_pm, | 287 | .pm = &tpm_tis_pm, |
| 289 | .of_match_table = of_match_ptr(of_tis_spi_match), | 288 | .of_match_table = of_match_ptr(of_tis_spi_match), |
| 290 | .acpi_match_table = ACPI_PTR(acpi_tis_spi_match), | 289 | .acpi_match_table = ACPI_PTR(acpi_tis_spi_match), |
| 290 | .probe_type = PROBE_PREFER_ASYNCHRONOUS, | ||
| 291 | }, | 291 | }, |
| 292 | .probe = tpm_tis_spi_driver_probe, | 292 | .probe = tpm_tis_spi_driver_probe, |
| 293 | .remove = tpm_tis_spi_remove, | 293 | .remove = tpm_tis_spi_remove, |
| @@ -2116,6 +2116,7 @@ static struct virtio_device_id id_table[] = { · 2115 unmodified lines | |||
| 2116 | { VIRTIO_ID_CONSOLE, VIRTIO_DEV_ANY_ID }, | 2116 | { VIRTIO_ID_CONSOLE, VIRTIO_DEV_ANY_ID }, |
| 2117 | { 0 }, | 2117 | { 0 }, |
| 2118 | }; | 2118 | }; |
| 2119 | MODULE_DEVICE_TABLE(virtio, id_table); | ||
| 2119 | 2120 | ||
| 2120 | static unsigned int features[] = { | 2121 | static unsigned int features[] = { |
| 2121 | VIRTIO_CONSOLE_F_SIZE, | 2122 | VIRTIO_CONSOLE_F_SIZE, |
| @@ -2128,6 +2129,7 @@ static struct virtio_device_id rproc_serial_id_table[] = { · 6 unmodified lines | |||
| 2128 | #endif | 2129 | #endif |
| 2129 | { 0 }, | 2130 | { 0 }, |
| 2130 | }; | 2131 | }; |
| 2132 | MODULE_DEVICE_TABLE(virtio, rproc_serial_id_table); | ||
| 2131 | 2133 | ||
| 2132 | static unsigned int rproc_serial_features[] = { | 2134 | static unsigned int rproc_serial_features[] = { |
| 2133 | }; | 2135 | }; |
| @@ -2280,6 +2282,5 @@ static void __exit fini(void) · 146 unmodified lines | |||
| 2280 | module_init(init); | 2282 | module_init(init); |
| 2281 | module_exit(fini); | 2283 | module_exit(fini); |
| 2282 | 2284 | ||
| 2283 | MODULE_DEVICE_TABLE(virtio, id_table); | ||
| 2284 | MODULE_DESCRIPTION("Virtio console driver"); | 2285 | MODULE_DESCRIPTION("Virtio console driver"); |
| 2285 | MODULE_LICENSE("GPL"); | 2286 | MODULE_LICENSE("GPL"); |
| @@ -50,6 +50,7 @@ source "drivers/clk/versatile/Kconfig" · 49 unmodified lines | |||
| 50 | config CLK_HSDK | 50 | config CLK_HSDK |
| 51 | bool "PLL Driver for HSDK platform" | 51 | bool "PLL Driver for HSDK platform" |
| 52 | depends on OF || COMPILE_TEST | 52 | depends on OF || COMPILE_TEST |
| 53 | depends on IOMEM | ||
| 53 | help | 54 | help |
| 54 | This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs | 55 | This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs |
| 55 | control. | 56 | control. |
| @@ -131,6 +131,18 @@ static const struct clk_div_table ast2600_eclk_div_table[] = { · 130 unmodified lines | |||
| 131 | { 0 } | 131 | { 0 } |
| 132 | }; | 132 | }; |
| 133 | 133 | ||
| 134 | static const struct clk_div_table ast2600_emmc_extclk_div_table[] = { | ||
| 135 | { 0x0, 2 }, | ||
| 136 | { 0x1, 4 }, | ||
| 137 | { 0x2, 6 }, | ||
| 138 | { 0x3, 8 }, | ||
| 139 | { 0x4, 10 }, | ||
| 140 | { 0x5, 12 }, | ||
| 141 | { 0x6, 14 }, | ||
| 142 | { 0x7, 16 }, | ||
| 143 | { 0 } | ||
| 144 | }; | ||
| 145 | |||
| 134 | static const struct clk_div_table ast2600_mac_div_table[] = { | 146 | static const struct clk_div_table ast2600_mac_div_table[] = { |
| 135 | { 0x0, 4 }, | 147 | { 0x0, 4 }, |
| 136 | { 0x1, 4 }, | 148 | { 0x1, 4 }, |
| @@ -390,6 +402,11 @@ static struct clk_hw *aspeed_g6_clk_hw_register_gate(struct device *dev, · 253 unmodified lines | |||
| 390 | return hw; | 402 | return hw; |
| 391 | } | 403 | } |
| 392 | 404 | ||
| 405 | static const char *const emmc_extclk_parent_names[] = { | ||
| 406 | "emmc_extclk_hpll_in", | ||
| 407 | "mpll", | ||
| 408 | }; | ||
| 409 | |||
| 393 | static const char * const vclk_parent_names[] = { | 410 | static const char * const vclk_parent_names[] = { |
| 394 | "dpll", | 411 | "dpll", |
| 395 | "d1pll", | 412 | "d1pll", |
| @@ -459,16 +476,32 @@ static int aspeed_g6_clk_probe(struct platform_device *pdev) · 63 unmodified lines | |||
| 459 | return PTR_ERR(hw); | 476 | return PTR_ERR(hw); |
| 460 | aspeed_g6_clk_data->hws[ASPEED_CLK_UARTX] = hw; | 477 | aspeed_g6_clk_data->hws[ASPEED_CLK_UARTX] = hw; |
| 461 | 478 | ||
| 462 | /* EMMC ext clock divider */ | 479 | /* EMMC ext clock */ |
| 463 | hw = clk_hw_register_gate(dev, "emmc_extclk_gate", "hpll", 0, | 480 | hw = clk_hw_register_fixed_factor(dev, "emmc_extclk_hpll_in", "hpll", |
| 464 | scu_g6_base + ASPEED_G6_CLK_SELECTION1, 15, 0, | 481 | 0, 1, 2); |
| 465 | &aspeed_g6_clk_lock); | ||
| 466 | if (IS_ERR(hw)) | 482 | if (IS_ERR(hw)) |
| 467 | return PTR_ERR(hw); | 483 | return PTR_ERR(hw); |
| 468 | hw = clk_hw_register_divider_table(dev, "emmc_extclk", "emmc_extclk_gate", 0, | 484 | |
| 469 | scu_g6_base + ASPEED_G6_CLK_SELECTION1, 12, 3, 0, | 485 | hw = clk_hw_register_mux(dev, "emmc_extclk_mux", |
| 470 | ast2600_div_table, | 486 | emmc_extclk_parent_names, |
| 471 | &aspeed_g6_clk_lock); | 487 | ARRAY_SIZE(emmc_extclk_parent_names), 0, |
| 488 | scu_g6_base + ASPEED_G6_CLK_SELECTION1, 11, 1, | ||
| 489 | 0, &aspeed_g6_clk_lock); | ||
| 490 | if (IS_ERR(hw)) | ||
| 491 | return PTR_ERR(hw); | ||
| 492 | |||
| 493 | hw = clk_hw_register_gate(dev, "emmc_extclk_gate", "emmc_extclk_mux", | ||
| 494 | 0, scu_g6_base + ASPEED_G6_CLK_SELECTION1, | ||
| 495 | 15, 0, &aspeed_g6_clk_lock); | ||
| 496 | if (IS_ERR(hw)) | ||
| 497 | return PTR_ERR(hw); | ||
| 498 | |||
| 499 | hw = clk_hw_register_divider_table(dev, "emmc_extclk", | ||
| 500 | "emmc_extclk_gate", 0, | ||
| 501 | scu_g6_base + | ||
| 502 | ASPEED_G6_CLK_SELECTION1, 12, | ||
| 503 | 3, 0, ast2600_emmc_extclk_div_table, | ||
| 504 | &aspeed_g6_clk_lock); | ||
| 472 | if (IS_ERR(hw)) | 505 | if (IS_ERR(hw)) |
| 473 | return PTR_ERR(hw); | 506 | return PTR_ERR(hw); |
| 474 | aspeed_g6_clk_data->hws[ASPEED_CLK_EMMC] = hw; | 507 | aspeed_g6_clk_data->hws[ASPEED_CLK_EMMC] = hw; |
| @@ -42,6 +42,7 @@ config ARMADA_AP806_SYSCON · 41 unmodified lines | |||
| 42 | 42 | ||
| 43 | config ARMADA_AP_CPU_CLK | 43 | config ARMADA_AP_CPU_CLK |
| 44 | bool | 44 | bool |
| 45 | select ARMADA_AP_CP_HELPER | ||
| 45 | 46 | ||
| 46 | config ARMADA_CP110_SYSCON | 47 | config ARMADA_CP110_SYSCON |
| 47 | bool | 48 | bool |
| @@ -586,7 +586,10 @@ static int sifive_fu540_prci_probe(struct platform_device *pdev) · 585 unmodified lines | |||
| 586 | struct __prci_data *pd; | 586 | struct __prci_data *pd; |
| 587 | int r; | 587 | int r; |
| 588 | 588 | ||
| 589 | pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); | 589 | pd = devm_kzalloc(dev, |
| 590 | struct_size(pd, hw_clks.hws, | ||
| 591 | ARRAY_SIZE(__prci_init_clocks)), | ||
| 592 | GFP_KERNEL); | ||
| 590 | if (!pd) | 593 | if (!pd) |
| 591 | return -ENOMEM; | 594 | return -ENOMEM; |
| 592 | 595 | ||
| @@ -480,6 +480,14 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = { · 479 unmodified lines | |||
| 480 | .set_next_event_virt = erratum_set_next_event_tval_virt, | 480 | .set_next_event_virt = erratum_set_next_event_tval_virt, |
| 481 | }, | 481 | }, |
| 482 | #endif | 482 | #endif |
| 483 | #ifdef CONFIG_ARM64_ERRATUM_1418040 | ||
| 484 | { | ||
| 485 | .match_type = ate_match_local_cap_id, | ||
| 486 | .id = (void *)ARM64_WORKAROUND_1418040, | ||
| 487 | .desc = "ARM erratum 1418040", | ||
| 488 | .disable_compat_vdso = true, | ||
| 489 | }, | ||
| 490 | #endif | ||
| 483 | }; | 491 | }; |
| 484 | 492 | ||
| 485 | typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *, | 493 | typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *, |
| @@ -566,6 +574,9 @@ void arch_timer_enable_workaround(const struct arch_timer_erratum_workaround *wa · 80 unmodified lines | |||
| 566 | if (wa->read_cntvct_el0) { | 574 | if (wa->read_cntvct_el0) { |
| 567 | clocksource_counter.vdso_clock_mode = VDSO_CLOCKMODE_NONE; | 575 | clocksource_counter.vdso_clock_mode = VDSO_CLOCKMODE_NONE; |
| 568 | vdso_default = VDSO_CLOCKMODE_NONE; | 576 | vdso_default = VDSO_CLOCKMODE_NONE; |
| 577 | } else if (wa->disable_compat_vdso && vdso_default != VDSO_CLOCKMODE_NONE) { | ||
| 578 | vdso_default = VDSO_CLOCKMODE_ARCHTIMER_NOCOMPAT; | ||
| 579 | clocksource_counter.vdso_clock_mode = vdso_default; | ||
| 569 | } | 580 | } |
| 570 | } | 581 | } |
| 571 | 582 | ||
| @@ -1274,18 +1274,26 @@ static ssize_t quad8_signal_cable_fault_read(struct counter_device *counter, · 1273 unmodified lines | |||
| 1274 | struct counter_signal *signal, | 1274 | struct counter_signal *signal, |
| 1275 | void *private, char *buf) | 1275 | void *private, char *buf) |
| 1276 | { | 1276 | { |
| 1277 | const struct quad8_iio *const priv = counter->priv; | 1277 | struct quad8_iio *const priv = counter->priv; |
| 1278 | const size_t channel_id = signal->id / 2; | 1278 | const size_t channel_id = signal->id / 2; |
| 1279 | const bool disabled = !(priv->cable_fault_enable & BIT(channel_id)); | 1279 | bool disabled; |
| 1280 | unsigned int status; | 1280 | unsigned int status; |
| 1281 | unsigned int fault; | 1281 | unsigned int fault; |
| 1282 | 1282 | ||
| 1283 | if (disabled) | 1283 | mutex_lock(&priv->lock); |
| 1284 | |||
| 1285 | disabled = !(priv->cable_fault_enable & BIT(channel_id)); | ||
| 1286 | |||
| 1287 | if (disabled) { | ||
| 1288 | mutex_unlock(&priv->lock); | ||
| 1284 | return -EINVAL; | 1289 | return -EINVAL; |
| 1290 | } | ||
| 1285 | 1291 | ||
| 1286 | /* Logic 0 = cable fault */ | 1292 | /* Logic 0 = cable fault */ |
| 1287 | status = inb(priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS); | 1293 | status = inb(priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS); |
| 1288 | 1294 | ||
| 1295 | mutex_unlock(&priv->lock); | ||
| 1296 | |||
| 1289 | /* Mask respective channel and invert logic */ | 1297 | /* Mask respective channel and invert logic */ |
| 1290 | fault = !(status & BIT(channel_id)); | 1298 | fault = !(status & BIT(channel_id)); |
| 1291 | 1299 | ||
| @@ -1317,6 +1325,8 @@ static ssize_t quad8_signal_cable_fault_enable_write( · 25 unmodified lines | |||
| 1317 | if (ret) | 1325 | if (ret) |
| 1318 | return ret; | 1326 | return ret; |
| 1319 | 1327 | ||
| 1328 | mutex_lock(&priv->lock); | ||
| 1329 | |||
| 1320 | if (enable) | 1330 | if (enable) |
| 1321 | priv->cable_fault_enable |= BIT(channel_id); | 1331 | priv->cable_fault_enable |= BIT(channel_id); |
| 1322 | else | 1332 | else |
| @@ -1327,6 +1337,8 @@ static ssize_t quad8_signal_cable_fault_enable_write( · 4 unmodified lines | |||
| 1327 | 1337 | ||
| 1328 | outb(cable_fault_enable, priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS); | 1338 | outb(cable_fault_enable, priv->base + QUAD8_DIFF_ENCODER_CABLE_STATUS); |
| 1329 | 1339 | ||
| 1340 | mutex_unlock(&priv->lock); | ||
| 1341 | |||
| 1330 | return len; | 1342 | return len; |
| 1331 | } | 1343 | } |
| 1332 | 1344 | ||
| @@ -1353,6 +1365,8 @@ static ssize_t quad8_signal_fck_prescaler_write(struct counter_device *counter, · 20 unmodified lines | |||
| 1353 | if (ret) | 1365 | if (ret) |
| 1354 | return ret; | 1366 | return ret; |
| 1355 | 1367 | ||
| 1368 | mutex_lock(&priv->lock); | ||
| 1369 | |||
| 1356 | priv->fck_prescaler[channel_id] = prescaler; | 1370 | priv->fck_prescaler[channel_id] = prescaler; |
| 1357 | 1371 | ||
| 1358 | /* Reset Byte Pointer */ | 1372 | /* Reset Byte Pointer */ |
| @@ -1363,6 +1377,8 @@ static ssize_t quad8_signal_fck_prescaler_write(struct counter_device *counter, · 4 unmodified lines | |||
| 1363 | outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC, | 1377 | outb(QUAD8_CTR_RLD | QUAD8_RLD_RESET_BP | QUAD8_RLD_PRESET_PSC, |
| 1364 | base_offset + 1); | 1378 | base_offset + 1); |
| 1365 | 1379 | ||
| 1380 | mutex_unlock(&priv->lock); | ||
| 1381 | |||
| 1366 | return len; | 1382 | return len; |
| 1367 | } | 1383 | } |
| 1368 | 1384 | ||
| @@ -2464,7 +2464,7 @@ static struct cpufreq_driver intel_cpufreq = { · 2463 unmodified lines | |||
| 2464 | .name = "intel_cpufreq", | 2464 | .name = "intel_cpufreq", |
| 2465 | }; | 2465 | }; |
| 2466 | 2466 | ||
| 2467 | static struct cpufreq_driver *default_driver = &intel_pstate; | 2467 | static struct cpufreq_driver *default_driver; |
| 2468 | 2468 | ||
| 2469 | static void intel_pstate_driver_cleanup(void) | 2469 | static void intel_pstate_driver_cleanup(void) |
| 2470 | { | 2470 | { |
| @@ -2677,6 +2677,8 @@ static struct acpi_platform_list plat_info[] __initdata = { · 206 unmodified lines | |||
| 2677 | { } /* End */ | 2677 | { } /* End */ |
| 2678 | }; | 2678 | }; |
| 2679 | 2679 | ||
| 2680 | #define BITMASK_OOB (BIT(8) | BIT(18)) | ||
| 2681 | |||
| 2680 | static bool __init intel_pstate_platform_pwr_mgmt_exists(void) | 2682 | static bool __init intel_pstate_platform_pwr_mgmt_exists(void) |
| 2681 | { | 2683 | { |
| 2682 | const struct x86_cpu_id *id; | 2684 | const struct x86_cpu_id *id; |
| @@ -2686,8 +2688,9 @@ static bool __init intel_pstate_platform_pwr_mgmt_exists(void) · 3 unmodified lines | |||
| 2686 | id = x86_match_cpu(intel_pstate_cpu_oob_ids); | 2688 | id = x86_match_cpu(intel_pstate_cpu_oob_ids); |
| 2687 | if (id) { | 2689 | if (id) { |
| 2688 | rdmsrl(MSR_MISC_PWR_MGMT, misc_pwr); | 2690 | rdmsrl(MSR_MISC_PWR_MGMT, misc_pwr); |
| 2689 | if (misc_pwr & (1 << 8)) { | 2691 | if (misc_pwr & BITMASK_OOB) { |
| 2690 | pr_debug("Bit 8 in the MISC_PWR_MGMT MSR set\n"); | 2692 | pr_debug("Bit 8 or 18 in the MISC_PWR_MGMT MSR set\n"); |
| 2693 | pr_debug("P states are controlled in Out of Band mode by the firmware/hardware\n"); | ||
| 2691 | return true; | 2694 | return true; |
| 2692 | } | 2695 | } |
| 2693 | } | 2696 | } |
| @@ -2755,6 +2758,7 @@ static int __init intel_pstate_init(void) · 61 unmodified lines | |||
| 2755 | hwp_active++; | 2758 | hwp_active++; |
| 2756 | hwp_mode_bdw = id->driver_data; | 2759 | hwp_mode_bdw = id->driver_data; |
| 2757 | intel_pstate.attr = hwp_cpufreq_attrs; | 2760 | intel_pstate.attr = hwp_cpufreq_attrs; |
| 2761 | default_driver = &intel_pstate; | ||
| 2758 | goto hwp_cpu_matched; | 2762 | goto hwp_cpu_matched; |
| 2759 | } | 2763 | } |
| 2760 | } else { | 2764 | } else { |
| @@ -2772,7 +2776,8 @@ static int __init intel_pstate_init(void) · 11 unmodified lines | |||
| 2772 | return -ENODEV; | 2776 | return -ENODEV; |
| 2773 | } | 2777 | } |
| 2774 | /* Without HWP start in the passive mode. */ | 2778 | /* Without HWP start in the passive mode. */ |
| 2775 | default_driver = &intel_cpufreq; | 2779 | if (!default_driver) |
| 2780 | default_driver = &intel_cpufreq; | ||
| 2776 | 2781 | ||
| 2777 | hwp_cpu_matched: | 2782 | hwp_cpu_matched: |
| 2778 | /* | 2783 | /* |
| @@ -2817,6 +2822,8 @@ static int __init intel_pstate_setup(char *str) · 38 unmodified lines | |||
| 2817 | 2822 | ||
| 2818 | if (!strcmp(str, "disable")) { | 2823 | if (!strcmp(str, "disable")) { |
| 2819 | no_load = 1; | 2824 | no_load = 1; |
| 2825 | } else if (!strcmp(str, "active")) { | ||
| 2826 | default_driver = &intel_pstate; | ||
| 2820 | } else if (!strcmp(str, "passive")) { | 2827 | } else if (!strcmp(str, "passive")) { |
| 2821 | default_driver = &intel_cpufreq; | 2828 | default_driver = &intel_cpufreq; |
| 2822 | no_hwp = 1; | 2829 | no_hwp = 1; |
| @@ -186,9 +186,10 @@ int cpuidle_enter_s2idle(struct cpuidle_driver *drv, struct cpuidle_device *dev) · 185 unmodified lines | |||
| 186 | * be frozen safely. | 186 | * be frozen safely. |
| 187 | */ | 187 | */ |
| 188 | index = find_deepest_state(drv, dev, U64_MAX, 0, true); | 188 | index = find_deepest_state(drv, dev, U64_MAX, 0, true); |
| 189 | if (index > 0) | 189 | if (index > 0) { |
| 190 | enter_s2idle_proper(drv, dev, index); | 190 | enter_s2idle_proper(drv, dev, index); |
| 191 | 191 | local_irq_enable(); | |
| 192 | } | ||
| 192 | return index; | 193 | return index; |
| 193 | } | 194 | } |
| 194 | #endif /* CONFIG_SUSPEND */ | 195 | #endif /* CONFIG_SUSPEND */ |
| @@ -45,46 +45,20 @@ static char *dmabuffs_dname(struct dentry *dentry, char *buffer, int buflen) · 44 unmodified lines | |||
| 45 | size_t ret = 0; | 45 | size_t ret = 0; |
| 46 | 46 | ||
| 47 | dmabuf = dentry->d_fsdata; | 47 | dmabuf = dentry->d_fsdata; |
| 48 | dma_resv_lock(dmabuf->resv, NULL); | 48 | spin_lock(&dmabuf->name_lock); |
| 49 | if (dmabuf->name) | 49 | if (dmabuf->name) |
| 50 | ret = strlcpy(name, dmabuf->name, DMA_BUF_NAME_LEN); | 50 | ret = strlcpy(name, dmabuf->name, DMA_BUF_NAME_LEN); |
| 51 | dma_resv_unlock(dmabuf->resv); | 51 | spin_unlock(&dmabuf->name_lock); |
| 52 | 52 | ||
| 53 | return dynamic_dname(dentry, buffer, buflen, "/%s:%s", | 53 | return dynamic_dname(dentry, buffer, buflen, "/%s:%s", |
| 54 | dentry->d_name.name, ret > 0 ? name : ""); | 54 | dentry->d_name.name, ret > 0 ? name : ""); |
| 55 | } | 55 | } |
| 56 | 56 | ||
| 57 | static const struct dentry_operations dma_buf_dentry_ops = { | 57 | static void dma_buf_release(struct dentry *dentry) |
| 58 | .d_dname = dmabuffs_dname, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static struct vfsmount *dma_buf_mnt; | ||
| 62 | |||
| 63 | static int dma_buf_fs_init_context(struct fs_context *fc) | ||
| 64 | { | ||
| 65 | struct pseudo_fs_context *ctx; | ||
| 66 | |||
| 67 | ctx = init_pseudo(fc, DMA_BUF_MAGIC); | ||
| 68 | if (!ctx) | ||
| 69 | return -ENOMEM; | ||
| 70 | ctx->dops = &dma_buf_dentry_ops; | ||
| 71 | return 0; | ||
| 72 | } | ||
| 73 | |||
| 74 | static struct file_system_type dma_buf_fs_type = { | ||
| 75 | .name = "dmabuf", | ||
| 76 | .init_fs_context = dma_buf_fs_init_context, | ||
| 77 | .kill_sb = kill_anon_super, | ||
| 78 | }; | ||
| 79 | |||
| 80 | static int dma_buf_release(struct inode *inode, struct file *file) | ||
| 81 | { | 58 | { |
| 82 | struct dma_buf *dmabuf; | 59 | struct dma_buf *dmabuf; |
| 83 | 60 | ||
| 84 | if (!is_dma_buf_file(file)) | 61 | dmabuf = dentry->d_fsdata; |
| 85 | return -EINVAL; | ||
| 86 | |||
| 87 | dmabuf = file->private_data; | ||
| 88 | 62 | ||
| 89 | BUG_ON(dmabuf->vmapping_counter); | 63 | BUG_ON(dmabuf->vmapping_counter); |
| 90 | 64 | ||
| @@ -110,9 +84,32 @@ static int dma_buf_release(struct inode *inode, struct file *file) · 19 unmodified lines | |||
| 110 | module_put(dmabuf->owner); | 84 | module_put(dmabuf->owner); |
| 111 | kfree(dmabuf->name); | 85 | kfree(dmabuf->name); |
| 112 | kfree(dmabuf); | 86 | kfree(dmabuf); |
| 87 | } | ||
| 88 | |||
| 89 | static const struct dentry_operations dma_buf_dentry_ops = { | ||
| 90 | .d_dname = dmabuffs_dname, | ||
| 91 | .d_release = dma_buf_release, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static struct vfsmount *dma_buf_mnt; | ||
| 95 | |||
| 96 | static int dma_buf_fs_init_context(struct fs_context *fc) | ||
| 97 | { | ||
| 98 | struct pseudo_fs_context *ctx; | ||
| 99 | |||
| 100 | ctx = init_pseudo(fc, DMA_BUF_MAGIC); | ||
| 101 | if (!ctx) | ||
| 102 | return -ENOMEM; | ||
| 103 | ctx->dops = &dma_buf_dentry_ops; | ||
| 113 | return 0; | 104 | return 0; |
| 114 | } | 105 | } |
| 115 | 106 | ||
| 107 | static struct file_system_type dma_buf_fs_type = { | ||
| 108 | .name = "dmabuf", | ||
| 109 | .init_fs_context = dma_buf_fs_init_context, | ||
| 110 | .kill_sb = kill_anon_super, | ||
| 111 | }; | ||
| 112 | |||
| 116 | static int dma_buf_mmap_internal(struct file *file, struct vm_area_struct *vma) | 113 | static int dma_buf_mmap_internal(struct file *file, struct vm_area_struct *vma) |
| 117 | { | 114 | { |
| 118 | struct dma_buf *dmabuf; | 115 | struct dma_buf *dmabuf; |
| @@ -341,8 +338,10 @@ static long dma_buf_set_name(struct dma_buf *dmabuf, const char __user *buf) · 222 unmodified lines | |||
| 341 | kfree(name); | 338 | kfree(name); |
| 342 | goto out_unlock; | 339 | goto out_unlock; |
| 343 | } | 340 | } |
| 341 | spin_lock(&dmabuf->name_lock); | ||
| 344 | kfree(dmabuf->name); | 342 | kfree(dmabuf->name); |
| 345 | dmabuf->name = name; | 343 | dmabuf->name = name; |
| 344 | spin_unlock(&dmabuf->name_lock); | ||
| 346 | 345 | ||
| 347 | out_unlock: | 346 | out_unlock: |
| 348 | dma_resv_unlock(dmabuf->resv); | 347 | dma_resv_unlock(dmabuf->resv); |
| @@ -405,14 +404,13 @@ static void dma_buf_show_fdinfo(struct seq_file *m, struct file *file) · 56 unmodified lines | |||
| 405 | /* Don't count the temporary reference taken inside procfs seq_show */ | 404 | /* Don't count the temporary reference taken inside procfs seq_show */ |
| 406 | seq_printf(m, "count:\t%ld\n", file_count(dmabuf->file) - 1); | 405 | seq_printf(m, "count:\t%ld\n", file_count(dmabuf->file) - 1); |
| 407 | seq_printf(m, "exp_name:\t%s\n", dmabuf->exp_name); | 406 | seq_printf(m, "exp_name:\t%s\n", dmabuf->exp_name); |
| 408 | dma_resv_lock(dmabuf->resv, NULL); | 407 | spin_lock(&dmabuf->name_lock); |
| 409 | if (dmabuf->name) | 408 | if (dmabuf->name) |
| 410 | seq_printf(m, "name:\t%s\n", dmabuf->name); | 409 | seq_printf(m, "name:\t%s\n", dmabuf->name); |
| 411 | dma_resv_unlock(dmabuf->resv); | 410 | spin_unlock(&dmabuf->name_lock); |
| 412 | } | 411 | } |
| 413 | 412 | ||
| 414 | static const struct file_operations dma_buf_fops = { | 413 | static const struct file_operations dma_buf_fops = { |
| 415 | .release = dma_buf_release, | ||
| 416 | .mmap = dma_buf_mmap_internal, | 414 | .mmap = dma_buf_mmap_internal, |
| 417 | .llseek = dma_buf_llseek, | 415 | .llseek = dma_buf_llseek, |
| 418 | .poll = dma_buf_poll, | 416 | .poll = dma_buf_poll, |
| @@ -546,6 +544,7 @@ struct dma_buf *dma_buf_export(const struct dma_buf_export_info *exp_info) · 127 unmodified lines | |||
| 546 | dmabuf->size = exp_info->size; | 544 | dmabuf->size = exp_info->size; |
| 547 | dmabuf->exp_name = exp_info->exp_name; | 545 | dmabuf->exp_name = exp_info->exp_name; |
| 548 | dmabuf->owner = exp_info->owner; | 546 | dmabuf->owner = exp_info->owner; |
| 547 | spin_lock_init(&dmabuf->name_lock); | ||
| 549 | init_waitqueue_head(&dmabuf->poll); | 548 | init_waitqueue_head(&dmabuf->poll); |
| 550 | dmabuf->cb_excl.poll = dmabuf->cb_shared.poll = &dmabuf->poll; | 549 | dmabuf->cb_excl.poll = dmabuf->cb_shared.poll = &dmabuf->poll; |
| 551 | dmabuf->cb_excl.active = dmabuf->cb_shared.active = 0; | 550 | dmabuf->cb_excl.active = dmabuf->cb_shared.active = 0; |
| @@ -1176,6 +1176,8 @@ static int dmatest_run_set(const char *val, const struct kernel_param *kp) · 1175 unmodified lines | |||
| 1176 | } else if (dmatest_run) { | 1176 | } else if (dmatest_run) { |
| 1177 | if (!is_threaded_test_pending(info)) { | 1177 | if (!is_threaded_test_pending(info)) { |
| 1178 | pr_info("No channels configured, continue with any\n"); | 1178 | pr_info("No channels configured, continue with any\n"); |
| 1179 | if (!is_threaded_test_run(info)) | ||
| 1180 | stop_threaded_test(info); | ||
| 1179 | add_threaded_test(info); | 1181 | add_threaded_test(info); |
| 1180 | } | 1182 | } |
| 1181 | start_threaded_tests(info); | 1183 | start_threaded_tests(info); |
| @@ -118,16 +118,11 @@ static void dwc_initialize(struct dw_dma_chan *dwc) · 117 unmodified lines | |||
| 118 | { | 118 | { |
| 119 | struct dw_dma *dw = to_dw_dma(dwc->chan.device); | 119 | struct dw_dma *dw = to_dw_dma(dwc->chan.device); |
| 120 | 120 | ||
| 121 | if (test_bit(DW_DMA_IS_INITIALIZED, &dwc->flags)) | ||
| 122 | return; | ||
| 123 | |||
| 124 | dw->initialize_chan(dwc); | 121 | dw->initialize_chan(dwc); |
| 125 | 122 | ||
| 126 | /* Enable interrupts */ | 123 | /* Enable interrupts */ |
| 127 | channel_set_bit(dw, MASK.XFER, dwc->mask); | 124 | channel_set_bit(dw, MASK.XFER, dwc->mask); |
| 128 | channel_set_bit(dw, MASK.ERROR, dwc->mask); | 125 | channel_set_bit(dw, MASK.ERROR, dwc->mask); |
| 129 | |||
| 130 | set_bit(DW_DMA_IS_INITIALIZED, &dwc->flags); | ||
| 131 | } | 126 | } |
| 132 | 127 | ||
| 133 | /*----------------------------------------------------------------------*/ | 128 | /*----------------------------------------------------------------------*/ |
| @@ -954,8 +949,6 @@ static void dwc_issue_pending(struct dma_chan *chan) · 820 unmodified lines | |||
| 954 | 949 | ||
| 955 | void do_dw_dma_off(struct dw_dma *dw) | 950 | void do_dw_dma_off(struct dw_dma *dw) |
| 956 | { | 951 | { |
| 957 | unsigned int i; | ||
| 958 | |||
| 959 | dma_writel(dw, CFG, 0); | 952 | dma_writel(dw, CFG, 0); |
| 960 | 953 | ||
| 961 | channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); | 954 | channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); |
| @@ -966,9 +959,6 @@ void do_dw_dma_off(struct dw_dma *dw) · 4 unmodified lines | |||
| 966 | 959 | ||
| 967 | while (dma_readl(dw, CFG) & DW_CFG_DMA_EN) | 960 | while (dma_readl(dw, CFG) & DW_CFG_DMA_EN) |
| 968 | cpu_relax(); | 961 | cpu_relax(); |
| 969 | |||
| 970 | for (i = 0; i < dw->dma.chancnt; i++) | ||
| 971 | clear_bit(DW_DMA_IS_INITIALIZED, &dw->chan[i].flags); | ||
| 972 | } | 962 | } |
| 973 | 963 | ||
| 974 | void do_dw_dma_on(struct dw_dma *dw) | 964 | void do_dw_dma_on(struct dw_dma *dw) |
| @@ -1032,8 +1022,6 @@ static void dwc_free_chan_resources(struct dma_chan *chan) · 57 unmodified lines | |||
| 1032 | /* Clear custom channel configuration */ | 1022 | /* Clear custom channel configuration */ |
| 1033 | memset(&dwc->dws, 0, sizeof(struct dw_dma_slave)); | 1023 | memset(&dwc->dws, 0, sizeof(struct dw_dma_slave)); |
| 1034 | 1024 | ||
| 1035 | clear_bit(DW_DMA_IS_INITIALIZED, &dwc->flags); | ||
| 1036 | |||
| 1037 | /* Disable interrupts */ | 1025 | /* Disable interrupts */ |
| 1038 | channel_clear_bit(dw, MASK.XFER, dwc->mask); | 1026 | channel_clear_bit(dw, MASK.XFER, dwc->mask); |
| 1039 | channel_clear_bit(dw, MASK.BLOCK, dwc->mask); | 1027 | channel_clear_bit(dw, MASK.BLOCK, dwc->mask); |
| @@ -352,26 +352,28 @@ static void fsl_edma_set_tcd_regs(struct fsl_edma_chan *fsl_chan, · 351 unmodified lines | |||
| 352 | /* | 352 | /* |
| 353 | * TCD parameters are stored in struct fsl_edma_hw_tcd in little | 353 | * TCD parameters are stored in struct fsl_edma_hw_tcd in little |
| 354 | * endian format. However, we need to load the TCD registers in | 354 | * endian format. However, we need to load the TCD registers in |
| 355 | * big- or little-endian obeying the eDMA engine model endian. | 355 | * big- or little-endian obeying the eDMA engine model endian, |
| 356 | * and this is performed from specific edma_write functions | ||
| 356 | */ | 357 | */ |
| 357 | edma_writew(edma, 0, ®s->tcd[ch].csr); | 358 | edma_writew(edma, 0, ®s->tcd[ch].csr); |
| 358 | edma_writel(edma, le32_to_cpu(tcd->saddr), ®s->tcd[ch].saddr); | ||
| 359 | edma_writel(edma, le32_to_cpu(tcd->daddr), ®s->tcd[ch].daddr); | ||
| 360 | 359 | ||
| 361 | edma_writew(edma, le16_to_cpu(tcd->attr), ®s->tcd[ch].attr); | 360 | edma_writel(edma, (s32)tcd->saddr, ®s->tcd[ch].saddr); |
| 362 | edma_writew(edma, le16_to_cpu(tcd->soff), ®s->tcd[ch].soff); | 361 | edma_writel(edma, (s32)tcd->daddr, ®s->tcd[ch].daddr); |
| 363 | 362 | ||
| 364 | edma_writel(edma, le32_to_cpu(tcd->nbytes), ®s->tcd[ch].nbytes); | 363 | edma_writew(edma, (s16)tcd->attr, ®s->tcd[ch].attr); |
| 365 | edma_writel(edma, le32_to_cpu(tcd->slast), ®s->tcd[ch].slast); | 364 | edma_writew(edma, tcd->soff, ®s->tcd[ch].soff); |
| 366 | 365 | ||
| 367 | edma_writew(edma, le16_to_cpu(tcd->citer), ®s->tcd[ch].citer); | 366 | edma_writel(edma, (s32)tcd->nbytes, ®s->tcd[ch].nbytes); |
| 368 | edma_writew(edma, le16_to_cpu(tcd->biter), ®s->tcd[ch].biter); | 367 | edma_writel(edma, (s32)tcd->slast, ®s->tcd[ch].slast); |
| 369 | edma_writew(edma, le16_to_cpu(tcd->doff), ®s->tcd[ch].doff); | ||
| 370 | 368 | ||
| 371 | edma_writel(edma, le32_to_cpu(tcd->dlast_sga), | 369 | edma_writew(edma, (s16)tcd->citer, ®s->tcd[ch].citer); |
| 370 | edma_writew(edma, (s16)tcd->biter, ®s->tcd[ch].biter); | ||
| 371 | edma_writew(edma, (s16)tcd->doff, ®s->tcd[ch].doff); | ||
| 372 | |||
| 373 | edma_writel(edma, (s32)tcd->dlast_sga, | ||
| 372 | ®s->tcd[ch].dlast_sga); | 374 | ®s->tcd[ch].dlast_sga); |
| 373 | 375 | ||
| 374 | edma_writew(edma, le16_to_cpu(tcd->csr), ®s->tcd[ch].csr); | 376 | edma_writew(edma, (s16)tcd->csr, ®s->tcd[ch].csr); |
| 375 | } | 377 | } |
| 376 | 378 | ||
| 377 | static inline | 379 | static inline |
| @@ -589,6 +591,8 @@ void fsl_edma_xfer_desc(struct fsl_edma_chan *fsl_chan) · 211 unmodified lines | |||
| 589 | { | 591 | { |
| 590 | struct virt_dma_desc *vdesc; | 592 | struct virt_dma_desc *vdesc; |
| 591 | 593 | ||
| 594 | lockdep_assert_held(&fsl_chan->vchan.lock); | ||
| 595 | |||
| 592 | vdesc = vchan_next_desc(&fsl_chan->vchan); | 596 | vdesc = vchan_next_desc(&fsl_chan->vchan); |
| 593 | if (!vdesc) | 597 | if (!vdesc) |
| 594 | return; | 598 | return; |
| @@ -33,7 +33,7 @@ · 32 unmodified lines | |||
| 33 | #define EDMA_TCD_ATTR_DSIZE_16BIT BIT(0) | 33 | #define EDMA_TCD_ATTR_DSIZE_16BIT BIT(0) |
| 34 | #define EDMA_TCD_ATTR_DSIZE_32BIT BIT(1) | 34 | #define EDMA_TCD_ATTR_DSIZE_32BIT BIT(1) |
| 35 | #define EDMA_TCD_ATTR_DSIZE_64BIT (BIT(0) | BIT(1)) | 35 | #define EDMA_TCD_ATTR_DSIZE_64BIT (BIT(0) | BIT(1)) |
| 36 | #define EDMA_TCD_ATTR_DSIZE_32BYTE (BIT(3) | BIT(0)) | 36 | #define EDMA_TCD_ATTR_DSIZE_32BYTE (BIT(2) | BIT(0)) |
| 37 | #define EDMA_TCD_ATTR_SSIZE_8BIT 0 | 37 | #define EDMA_TCD_ATTR_SSIZE_8BIT 0 |
| 38 | #define EDMA_TCD_ATTR_SSIZE_16BIT (EDMA_TCD_ATTR_DSIZE_16BIT << 8) | 38 | #define EDMA_TCD_ATTR_SSIZE_16BIT (EDMA_TCD_ATTR_DSIZE_16BIT << 8) |
| 39 | #define EDMA_TCD_ATTR_SSIZE_32BIT (EDMA_TCD_ATTR_DSIZE_32BIT << 8) | 39 | #define EDMA_TCD_ATTR_SSIZE_32BIT (EDMA_TCD_ATTR_DSIZE_32BIT << 8) |
| @@ -45,6 +45,13 @@ static irqreturn_t fsl_edma_tx_handler(int irq, void *dev_id) · 44 unmodified lines | |||
| 45 | fsl_chan = &fsl_edma->chans[ch]; | 45 | fsl_chan = &fsl_edma->chans[ch]; |
| 46 | 46 | ||
| 47 | spin_lock(&fsl_chan->vchan.lock); | 47 | spin_lock(&fsl_chan->vchan.lock); |
| 48 | |||
| 49 | if (!fsl_chan->edesc) { | ||
| 50 | /* terminate_all called before */ | ||
| 51 | spin_unlock(&fsl_chan->vchan.lock); | ||
| 52 | continue; | ||
| 53 | } | ||
| 54 | |||
| 48 | if (!fsl_chan->edesc->iscyclic) { | 55 | if (!fsl_chan->edesc->iscyclic) { |
| 49 | list_del(&fsl_chan->edesc->vdesc.node); | 56 | list_del(&fsl_chan->edesc->vdesc.node); |
| 50 | vchan_cookie_complete(&fsl_chan->edesc->vdesc); | 57 | vchan_cookie_complete(&fsl_chan->edesc->vdesc); |
| @@ -74,6 +74,7 @@ static int idxd_cdev_open(struct inode *inode, struct file *filp) · 73 unmodified lines | |||
| 74 | struct idxd_device *idxd; | 74 | struct idxd_device *idxd; |
| 75 | struct idxd_wq *wq; | 75 | struct idxd_wq *wq; |
| 76 | struct device *dev; | 76 | struct device *dev; |
| 77 | int rc = 0; | ||
| 77 | 78 | ||
| 78 | wq = inode_wq(inode); | 79 | wq = inode_wq(inode); |
| 79 | idxd = wq->idxd; | 80 | idxd = wq->idxd; |
| @@ -81,17 +82,27 @@ static int idxd_cdev_open(struct inode *inode, struct file *filp) · 1 unmodified line | |||
| 81 | 82 | ||
| 82 | dev_dbg(dev, "%s called: %d\n", __func__, idxd_wq_refcount(wq)); | 83 | dev_dbg(dev, "%s called: %d\n", __func__, idxd_wq_refcount(wq)); |
| 83 | 84 | ||
| 84 | if (idxd_wq_refcount(wq) > 0 && wq_dedicated(wq)) | ||
| 85 | return -EBUSY; | ||
| 86 | |||
| 87 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); | 85 | ctx = kzalloc(sizeof(*ctx), GFP_KERNEL); |
| 88 | if (!ctx) | 86 | if (!ctx) |
| 89 | return -ENOMEM; | 87 | return -ENOMEM; |
| 90 | 88 | ||
| 89 | mutex_lock(&wq->wq_lock); | ||
| 90 | |||
| 91 | if (idxd_wq_refcount(wq) > 0 && wq_dedicated(wq)) { | ||
| 92 | rc = -EBUSY; | ||
| 93 | goto failed; | ||
| 94 | } | ||
| 95 | |||
| 91 | ctx->wq = wq; | 96 | ctx->wq = wq; |
| 92 | filp->private_data = ctx; | 97 | filp->private_data = ctx; |
| 93 | idxd_wq_get(wq); | 98 | idxd_wq_get(wq); |
| 99 | mutex_unlock(&wq->wq_lock); | ||
| 94 | return 0; | 100 | return 0; |
| 101 | |||
| 102 | failed: | ||
| 103 | mutex_unlock(&wq->wq_lock); | ||
| 104 | kfree(ctx); | ||
| 105 | return rc; | ||
| 95 | } | 106 | } |
| 96 | 107 | ||
| 97 | static int idxd_cdev_release(struct inode *node, struct file *filep) | 108 | static int idxd_cdev_release(struct inode *node, struct file *filep) |
| @@ -105,7 +116,9 @@ static int idxd_cdev_release(struct inode *node, struct file *filep) · 7 unmodified lines | |||
| 105 | filep->private_data = NULL; | 116 | filep->private_data = NULL; |
| 106 | 117 | ||
| 107 | kfree(ctx); | 118 | kfree(ctx); |
| 119 | mutex_lock(&wq->wq_lock); | ||
| 108 | idxd_wq_put(wq); | 120 | idxd_wq_put(wq); |
| 121 | mutex_unlock(&wq->wq_lock); | ||
| 109 | return 0; | 122 | return 0; |
| 110 | } | 123 | } |
| 111 | 124 | ||
| @@ -320,6 +320,31 @@ void idxd_wq_unmap_portal(struct idxd_wq *wq) · 319 unmodified lines | |||
| 320 | devm_iounmap(dev, wq->dportal); | 320 | devm_iounmap(dev, wq->dportal); |
| 321 | } | 321 | } |
| 322 | 322 | ||
| 323 | void idxd_wq_disable_cleanup(struct idxd_wq *wq) | ||
| 324 | { | ||
| 325 | struct idxd_device *idxd = wq->idxd; | ||
| 326 | struct device *dev = &idxd->pdev->dev; | ||
| 327 | int i, wq_offset; | ||
| 328 | |||
| 329 | lockdep_assert_held(&idxd->dev_lock); | ||
| 330 | memset(&wq->wqcfg, 0, sizeof(wq->wqcfg)); | ||
| 331 | wq->type = IDXD_WQT_NONE; | ||
| 332 | wq->size = 0; | ||
| 333 | wq->group = NULL; | ||
| 334 | wq->threshold = 0; | ||
| 335 | wq->priority = 0; | ||
| 336 | clear_bit(WQ_FLAG_DEDICATED, &wq->flags); | ||
| 337 | memset(wq->name, 0, WQ_NAME_SIZE); | ||
| 338 | |||
| 339 | for (i = 0; i < 8; i++) { | ||
| 340 | wq_offset = idxd->wqcfg_offset + wq->id * 32 + i * sizeof(u32); | ||
| 341 | iowrite32(0, idxd->reg_base + wq_offset); | ||
| 342 | dev_dbg(dev, "WQ[%d][%d][%#x]: %#x\n", | ||
| 343 | wq->id, i, wq_offset, | ||
| 344 | ioread32(idxd->reg_base + wq_offset)); | ||
| 345 | } | ||
| 346 | } | ||
| 347 | |||
| 323 | /* Device control bits */ | 348 | /* Device control bits */ |
| 324 | static inline bool idxd_is_enabled(struct idxd_device *idxd) | 349 | static inline bool idxd_is_enabled(struct idxd_device *idxd) |
| 325 | { | 350 | { |
| @@ -290,6 +290,7 @@ int idxd_wq_enable(struct idxd_wq *wq); · 289 unmodified lines | |||
| 290 | int idxd_wq_disable(struct idxd_wq *wq); | 290 | int idxd_wq_disable(struct idxd_wq *wq); |
| 291 | int idxd_wq_map_portal(struct idxd_wq *wq); | 291 | int idxd_wq_map_portal(struct idxd_wq *wq); |
| 292 | void idxd_wq_unmap_portal(struct idxd_wq *wq); | 292 | void idxd_wq_unmap_portal(struct idxd_wq *wq); |
| 293 | void idxd_wq_disable_cleanup(struct idxd_wq *wq); | ||
| 293 | 294 | ||
| 294 | /* submission */ | 295 | /* submission */ |
| 295 | int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc); | 296 | int idxd_submit_desc(struct idxd_wq *wq, struct idxd_desc *desc); |
| @@ -141,7 +141,7 @@ irqreturn_t idxd_misc_thread(int vec, void *data) · 140 unmodified lines | |||
| 141 | 141 | ||
| 142 | iowrite32(cause, idxd->reg_base + IDXD_INTCAUSE_OFFSET); | 142 | iowrite32(cause, idxd->reg_base + IDXD_INTCAUSE_OFFSET); |
| 143 | if (!err) | 143 | if (!err) |
| 144 | return IRQ_HANDLED; | 144 | goto out; |
| 145 | 145 | ||
| 146 | gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET); | 146 | gensts.bits = ioread32(idxd->reg_base + IDXD_GENSTATS_OFFSET); |
| 147 | if (gensts.state == IDXD_DEVICE_STATE_HALT) { | 147 | if (gensts.state == IDXD_DEVICE_STATE_HALT) { |
| @@ -162,6 +162,7 @@ irqreturn_t idxd_misc_thread(int vec, void *data) · 14 unmodified lines | |||
| 162 | spin_unlock_bh(&idxd->dev_lock); | 162 | spin_unlock_bh(&idxd->dev_lock); |
| 163 | } | 163 | } |
| 164 | 164 | ||
| 165 | out: | ||
| 165 | idxd_unmask_msix_vector(idxd, irq_entry->id); | 166 | idxd_unmask_msix_vector(idxd, irq_entry->id); |
| 166 | return IRQ_HANDLED; | 167 | return IRQ_HANDLED; |
| 167 | } | 168 | } |
| @@ -315,6 +315,11 @@ static int idxd_config_bus_remove(struct device *dev) · 314 unmodified lines | |||
| 315 | idxd_unregister_dma_device(idxd); | 315 | idxd_unregister_dma_device(idxd); |
| 316 | spin_lock_irqsave(&idxd->dev_lock, flags); | 316 | spin_lock_irqsave(&idxd->dev_lock, flags); |
| 317 | rc = idxd_device_disable(idxd); | 317 | rc = idxd_device_disable(idxd); |
| 318 | for (i = 0; i < idxd->max_wqs; i++) { | ||
| 319 | struct idxd_wq *wq = &idxd->wqs[i]; | ||
| 320 | |||
| 321 | idxd_wq_disable_cleanup(wq); | ||
| 322 | } | ||
| 318 | spin_unlock_irqrestore(&idxd->dev_lock, flags); | 323 | spin_unlock_irqrestore(&idxd->dev_lock, flags); |
| 319 | module_put(THIS_MODULE); | 324 | module_put(THIS_MODULE); |
| 320 | if (rc < 0) | 325 | if (rc < 0) |
| @@ -1331,8 +1331,7 @@ static void sdma_free_chan_resources(struct dma_chan *chan) · 1330 unmodified lines | |||
| 1331 | 1331 | ||
| 1332 | sdma_channel_synchronize(chan); | 1332 | sdma_channel_synchronize(chan); |
| 1333 | 1333 | ||
| 1334 | if (sdmac->event_id0 >= 0) | 1334 | sdma_event_disable(sdmac, sdmac->event_id0); |
| 1335 | sdma_event_disable(sdmac, sdmac->event_id0); | ||
| 1336 | if (sdmac->event_id1) | 1335 | if (sdmac->event_id1) |
| 1337 | sdma_event_disable(sdmac, sdmac->event_id1); | 1336 | sdma_event_disable(sdmac, sdmac->event_id1); |
| 1338 | 1337 | ||
| @@ -1632,11 +1631,9 @@ static int sdma_config(struct dma_chan *chan, · 293 unmodified lines | |||
| 1632 | memcpy(&sdmac->slave_config, dmaengine_cfg, sizeof(*dmaengine_cfg)); | 1631 | memcpy(&sdmac->slave_config, dmaengine_cfg, sizeof(*dmaengine_cfg)); |
| 1633 | 1632 | ||
| 1634 | /* Set ENBLn earlier to make sure dma request triggered after that */ | 1633 | /* Set ENBLn earlier to make sure dma request triggered after that */ |
| 1635 | if (sdmac->event_id0 >= 0) { | 1634 | if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events) |
| 1636 | if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events) | 1635 | return -EINVAL; |
| 1637 | return -EINVAL; | 1636 | sdma_event_enable(sdmac, sdmac->event_id0); |
| 1638 | sdma_event_enable(sdmac, sdmac->event_id0); | ||
| 1639 | } | ||
| 1640 | 1637 | ||
| 1641 | if (sdmac->event_id1) { | 1638 | if (sdmac->event_id1) { |
| 1642 | if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events) | 1639 | if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events) |
| @@ -26,6 +26,18 @@ · 25 unmodified lines | |||
| 26 | 26 | ||
| 27 | #include "../dmaengine.h" | 27 | #include "../dmaengine.h" |
| 28 | 28 | ||
| 29 | int completion_timeout = 200; | ||
| 30 | module_param(completion_timeout, int, 0644); | ||
| 31 | MODULE_PARM_DESC(completion_timeout, | ||
| 32 | "set ioat completion timeout [msec] (default 200 [msec])"); | ||
| 33 | int idle_timeout = 2000; | ||
| 34 | module_param(idle_timeout, int, 0644); | ||
| 35 | MODULE_PARM_DESC(idle_timeout, | ||
| 36 | "set ioat idel timeout [msec] (default 2000 [msec])"); | ||
| 37 | |||
| 38 | #define IDLE_TIMEOUT msecs_to_jiffies(idle_timeout) | ||
| 39 | #define COMPLETION_TIMEOUT msecs_to_jiffies(completion_timeout) | ||
| 40 | |||
| 29 | static char *chanerr_str[] = { | 41 | static char *chanerr_str[] = { |
| 30 | "DMA Transfer Source Address Error", | 42 | "DMA Transfer Source Address Error", |
| 31 | "DMA Transfer Destination Address Error", | 43 | "DMA Transfer Destination Address Error", |
| @@ -104,8 +104,6 @@ struct ioatdma_chan { · 103 unmodified lines | |||
| 104 | #define IOAT_RUN 5 | 104 | #define IOAT_RUN 5 |
| 105 | #define IOAT_CHAN_ACTIVE 6 | 105 | #define IOAT_CHAN_ACTIVE 6 |
| 106 | struct timer_list timer; | 106 | struct timer_list timer; |
| 107 | #define COMPLETION_TIMEOUT msecs_to_jiffies(100) | ||
| 108 | #define IDLE_TIMEOUT msecs_to_jiffies(2000) | ||
| 109 | #define RESET_DELAY msecs_to_jiffies(100) | 107 | #define RESET_DELAY msecs_to_jiffies(100) |
| 110 | struct ioatdma_device *ioat_dma; | 108 | struct ioatdma_device *ioat_dma; |
| 111 | dma_addr_t completion_dma; | 109 | dma_addr_t completion_dma; |
| @@ -35,6 +35,13 @@ static irqreturn_t mcf_edma_tx_handler(int irq, void *dev_id) · 34 unmodified lines | |||
| 35 | mcf_chan = &mcf_edma->chans[ch]; | 35 | mcf_chan = &mcf_edma->chans[ch]; |
| 36 | 36 | ||
| 37 | spin_lock(&mcf_chan->vchan.lock); | 37 | spin_lock(&mcf_chan->vchan.lock); |
| 38 | |||
| 39 | if (!mcf_chan->edesc) { | ||
| 40 | /* terminate_all called before */ | ||
| 41 | spin_unlock(&mcf_chan->vchan.lock); | ||
| 42 | continue; | ||
| 43 | } | ||
| 44 | |||
| 38 | if (!mcf_chan->edesc->iscyclic) { | 45 | if (!mcf_chan->edesc->iscyclic) { |
| 39 | list_del(&mcf_chan->edesc->vdesc.node); | 46 | list_del(&mcf_chan->edesc->vdesc.node); |
| 40 | vchan_cookie_complete(&mcf_chan->edesc->vdesc); | 47 | vchan_cookie_complete(&mcf_chan->edesc->vdesc); |
| @@ -586,6 +586,8 @@ static void usb_dmac_isr_transfer_end(struct usb_dmac_chan *chan) · 585 unmodified lines | |||
| 586 | desc->residue = usb_dmac_get_current_residue(chan, desc, | 586 | desc->residue = usb_dmac_get_current_residue(chan, desc, |
| 587 | desc->sg_index - 1); | 587 | desc->sg_index - 1); |
| 588 | desc->done_cookie = desc->vd.tx.cookie; | 588 | desc->done_cookie = desc->vd.tx.cookie; |
| 589 | desc->vd.tx_result.result = DMA_TRANS_NOERROR; | ||
| 590 | desc->vd.tx_result.residue = desc->residue; | ||
| 589 | vchan_cookie_complete(&desc->vd); | 591 | vchan_cookie_complete(&desc->vd); |
| 590 | 592 | ||
| 591 | /* Restart the next transfer if this driver has a next desc */ | 593 | /* Restart the next transfer if this driver has a next desc */ |
| @@ -658,6 +658,7 @@ static int tegra_adma_alloc_chan_resources(struct dma_chan *dc) · 657 unmodified lines | |||
| 658 | 658 | ||
| 659 | ret = pm_runtime_get_sync(tdc2dev(tdc)); | 659 | ret = pm_runtime_get_sync(tdc2dev(tdc)); |
| 660 | if (ret < 0) { | 660 | if (ret < 0) { |
| 661 | pm_runtime_put_noidle(tdc2dev(tdc)); | ||
| 661 | free_irq(tdc->irq, tdc); | 662 | free_irq(tdc->irq, tdc); |
| 662 | return ret; | 663 | return ret; |
| 663 | } | 664 | } |
| @@ -869,8 +870,10 @@ static int tegra_adma_probe(struct platform_device *pdev) · 205 unmodified lines | |||
| 869 | pm_runtime_enable(&pdev->dev); | 870 | pm_runtime_enable(&pdev->dev); |
| 870 | 871 | ||
| 871 | ret = pm_runtime_get_sync(&pdev->dev); | 872 | ret = pm_runtime_get_sync(&pdev->dev); |
| 872 | if (ret < 0) | 873 | if (ret < 0) { |
| 874 | pm_runtime_put_noidle(&pdev->dev); | ||
| 873 | goto rpm_disable; | 875 | goto rpm_disable; |
| 876 | } | ||
| 874 | 877 | ||
| 875 | ret = tegra_adma_init(tdma); | 878 | ret = tegra_adma_init(tdma); |
| 876 | if (ret) | 879 | if (ret) |
| @@ -42,6 +42,7 @@ struct udma_dev *of_xudma_dev_get(struct device_node *np, const char *property) · 41 unmodified lines | |||
| 42 | ud = platform_get_drvdata(pdev); | 42 | ud = platform_get_drvdata(pdev); |
| 43 | if (!ud) { | 43 | if (!ud) { |
| 44 | pr_debug("UDMA has not been probed\n"); | 44 | pr_debug("UDMA has not been probed\n"); |
| 45 | put_device(&pdev->dev); | ||
| 45 | return ERR_PTR(-EPROBE_DEFER); | 46 | return ERR_PTR(-EPROBE_DEFER); |
| 46 | } | 47 | } |
| 47 | 48 | ||
| @@ -1753,7 +1753,8 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 1752 unmodified lines | |||
| 1753 | dev_err(ud->ddev.dev, | 1753 | dev_err(ud->ddev.dev, |
| 1754 | "Descriptor pool allocation failed\n"); | 1754 | "Descriptor pool allocation failed\n"); |
| 1755 | uc->use_dma_pool = false; | 1755 | uc->use_dma_pool = false; |
| 1756 | return -ENOMEM; | 1756 | ret = -ENOMEM; |
| 1757 | goto err_cleanup; | ||
| 1757 | } | 1758 | } |
| 1758 | } | 1759 | } |
| 1759 | 1760 | ||
| @@ -1773,16 +1774,18 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 13 unmodified lines | |||
| 1773 | 1774 | ||
| 1774 | ret = udma_get_chan_pair(uc); | 1775 | ret = udma_get_chan_pair(uc); |
| 1775 | if (ret) | 1776 | if (ret) |
| 1776 | return ret; | 1777 | goto err_cleanup; |
| 1777 | 1778 | ||
| 1778 | ret = udma_alloc_tx_resources(uc); | 1779 | ret = udma_alloc_tx_resources(uc); |
| 1779 | if (ret) | 1780 | if (ret) { |
| 1780 | return ret; | 1781 | udma_put_rchan(uc); |
| 1782 | goto err_cleanup; | ||
| 1783 | } | ||
| 1781 | 1784 | ||
| 1782 | ret = udma_alloc_rx_resources(uc); | 1785 | ret = udma_alloc_rx_resources(uc); |
| 1783 | if (ret) { | 1786 | if (ret) { |
| 1784 | udma_free_tx_resources(uc); | 1787 | udma_free_tx_resources(uc); |
| 1785 | return ret; | 1788 | goto err_cleanup; |
| 1786 | } | 1789 | } |
| 1787 | 1790 | ||
| 1788 | uc->config.src_thread = ud->psil_base + uc->tchan->id; | 1791 | uc->config.src_thread = ud->psil_base + uc->tchan->id; |
| @@ -1800,10 +1803,8 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 11 unmodified lines | |||
| 1800 | uc->id); | 1803 | uc->id); |
| 1801 | 1804 | ||
| 1802 | ret = udma_alloc_tx_resources(uc); | 1805 | ret = udma_alloc_tx_resources(uc); |
| 1803 | if (ret) { | 1806 | if (ret) |
| 1804 | uc->config.remote_thread_id = -1; | 1807 | goto err_cleanup; |
| 1805 | return ret; | ||
| 1806 | } | ||
| 1807 | 1808 | ||
| 1808 | uc->config.src_thread = ud->psil_base + uc->tchan->id; | 1809 | uc->config.src_thread = ud->psil_base + uc->tchan->id; |
| 1809 | uc->config.dst_thread = uc->config.remote_thread_id; | 1810 | uc->config.dst_thread = uc->config.remote_thread_id; |
| @@ -1820,10 +1821,8 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 10 unmodified lines | |||
| 1820 | uc->id); | 1821 | uc->id); |
| 1821 | 1822 | ||
| 1822 | ret = udma_alloc_rx_resources(uc); | 1823 | ret = udma_alloc_rx_resources(uc); |
| 1823 | if (ret) { | 1824 | if (ret) |
| 1824 | uc->config.remote_thread_id = -1; | 1825 | goto err_cleanup; |
| 1825 | return ret; | ||
| 1826 | } | ||
| 1827 | 1826 | ||
| 1828 | uc->config.src_thread = uc->config.remote_thread_id; | 1827 | uc->config.src_thread = uc->config.remote_thread_id; |
| 1829 | uc->config.dst_thread = (ud->psil_base + uc->rchan->id) | | 1828 | uc->config.dst_thread = (ud->psil_base + uc->rchan->id) | |
| @@ -1838,7 +1837,9 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 8 unmodified lines | |||
| 1838 | /* Can not happen */ | 1837 | /* Can not happen */ |
| 1839 | dev_err(uc->ud->dev, "%s: chan%d invalid direction (%u)\n", | 1838 | dev_err(uc->ud->dev, "%s: chan%d invalid direction (%u)\n", |
| 1840 | __func__, uc->id, uc->config.dir); | 1839 | __func__, uc->id, uc->config.dir); |
| 1841 | return -EINVAL; | 1840 | ret = -EINVAL; |
| 1841 | goto err_cleanup; | ||
| 1842 | |||
| 1842 | } | 1843 | } |
| 1843 | 1844 | ||
| 1844 | /* check if the channel configuration was successful */ | 1845 | /* check if the channel configuration was successful */ |
| @@ -1847,7 +1848,7 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 2 unmodified lines | |||
| 1847 | 1848 | ||
| 1848 | if (udma_is_chan_running(uc)) { | 1849 | if (udma_is_chan_running(uc)) { |
| 1849 | dev_warn(ud->dev, "chan%d: is running!\n", uc->id); | 1850 | dev_warn(ud->dev, "chan%d: is running!\n", uc->id); |
| 1850 | udma_stop(uc); | 1851 | udma_reset_chan(uc, false); |
| 1851 | if (udma_is_chan_running(uc)) { | 1852 | if (udma_is_chan_running(uc)) { |
| 1852 | dev_err(ud->dev, "chan%d: won't stop!\n", uc->id); | 1853 | dev_err(ud->dev, "chan%d: won't stop!\n", uc->id); |
| 1853 | ret = -EBUSY; | 1854 | ret = -EBUSY; |
| @@ -1906,8 +1907,6 @@ static int udma_alloc_chan_resources(struct dma_chan *chan) · 52 unmodified lines | |||
| 1906 | 1907 | ||
| 1907 | udma_reset_rings(uc); | 1908 | udma_reset_rings(uc); |
| 1908 | 1909 | ||
| 1909 | INIT_DELAYED_WORK_ONSTACK(&uc->tx_drain.work, | ||
| 1910 | udma_check_tx_completion); | ||
| 1911 | return 0; | 1910 | return 0; |
| 1912 | 1911 | ||
| 1913 | err_irq_free: | 1912 | err_irq_free: |
| @@ -1919,7 +1918,7 @@ err_psi_free: · 5 unmodified lines | |||
| 1919 | err_res_free: | 1918 | err_res_free: |
| 1920 | udma_free_tx_resources(uc); | 1919 | udma_free_tx_resources(uc); |
| 1921 | udma_free_rx_resources(uc); | 1920 | udma_free_rx_resources(uc); |
| 1922 | 1921 | err_cleanup: | |
| 1923 | udma_reset_uchan(uc); | 1922 | udma_reset_uchan(uc); |
| 1924 | 1923 | ||
| 1925 | if (uc->use_dma_pool) { | 1924 | if (uc->use_dma_pool) { |
| @@ -3019,7 +3018,6 @@ static void udma_free_chan_resources(struct dma_chan *chan) · 1093 unmodified lines | |||
| 3019 | } | 3018 | } |
| 3020 | 3019 | ||
| 3021 | cancel_delayed_work_sync(&uc->tx_drain.work); | 3020 | cancel_delayed_work_sync(&uc->tx_drain.work); |
| 3022 | destroy_delayed_work_on_stack(&uc->tx_drain.work); | ||
| 3023 | 3021 | ||
| 3024 | if (uc->irq_num_ring > 0) { | 3022 | if (uc->irq_num_ring > 0) { |
| 3025 | free_irq(uc->irq_num_ring, uc); | 3023 | free_irq(uc->irq_num_ring, uc); |
| @@ -3593,7 +3591,7 @@ static int udma_probe(struct platform_device *pdev) · 567 unmodified lines | |||
| 3593 | return ret; | 3591 | return ret; |
| 3594 | } | 3592 | } |
| 3595 | 3593 | ||
| 3596 | ret = of_property_read_u32(navss_node, "ti,udma-atype", &ud->atype); | 3594 | ret = of_property_read_u32(dev->of_node, "ti,udma-atype", &ud->atype); |
| 3597 | if (!ret && ud->atype > 2) { | 3595 | if (!ret && ud->atype > 2) { |
| 3598 | dev_err(dev, "Invalid atype: %u\n", ud->atype); | 3596 | dev_err(dev, "Invalid atype: %u\n", ud->atype); |
| 3599 | return -EINVAL; | 3597 | return -EINVAL; |
| @@ -3711,6 +3709,7 @@ static int udma_probe(struct platform_device *pdev) · 111 unmodified lines | |||
| 3711 | tasklet_init(&uc->vc.task, udma_vchan_complete, | 3709 | tasklet_init(&uc->vc.task, udma_vchan_complete, |
| 3712 | (unsigned long)&uc->vc); | 3710 | (unsigned long)&uc->vc); |
| 3713 | init_completion(&uc->teardown_completed); | 3711 | init_completion(&uc->teardown_completed); |
| 3712 | INIT_DELAYED_WORK(&uc->tx_drain.work, udma_check_tx_completion); | ||
| 3714 | } | 3713 | } |
| 3715 | 3714 | ||
| 3716 | ret = dma_async_device_register(&ud->ddev); | 3715 | ret = dma_async_device_register(&ud->ddev); |
| @@ -269,6 +269,8 @@ static int get_scrub_rate(struct mem_ctl_info *mci) · 268 unmodified lines | |||
| 269 | 269 | ||
| 270 | if (pvt->model == 0x60) | 270 | if (pvt->model == 0x60) |
| 271 | amd64_read_pci_cfg(pvt->F2, F15H_M60H_SCRCTRL, &scrubval); | 271 | amd64_read_pci_cfg(pvt->F2, F15H_M60H_SCRCTRL, &scrubval); |
| 272 | else | ||
| 273 | amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval); | ||
| 272 | } else { | 274 | } else { |
| 273 | amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval); | 275 | amd64_read_pci_cfg(pvt->F3, SCRCTRL, &scrubval); |
| 274 | } | 276 | } |
| @@ -278,3 +278,14 @@ config EFI_EARLYCON · 277 unmodified lines | |||
| 278 | depends on SERIAL_EARLYCON && !ARM && !IA64 | 278 | depends on SERIAL_EARLYCON && !ARM && !IA64 |
| 279 | select FONT_SUPPORT | 279 | select FONT_SUPPORT |
| 280 | select ARCH_USE_MEMREMAP_PROT | 280 | select ARCH_USE_MEMREMAP_PROT |
| 281 | |||
| 282 | config EFI_CUSTOM_SSDT_OVERLAYS | ||
| 283 | bool "Load custom ACPI SSDT overlay from an EFI variable" | ||
| 284 | depends on EFI_VARS && ACPI | ||
| 285 | default ACPI_TABLE_UPGRADE | ||
| 286 | help | ||
| 287 | Allow loading of an ACPI SSDT overlay from an EFI variable specified | ||
| 288 | by a kernel command line option. | ||
| 289 | |||
| 290 | See Documentation/admin-guide/acpi/ssdt-overlays.rst for more | ||
| 291 | information. | ||
| @@ -52,9 +52,11 @@ static phys_addr_t __init efi_to_phys(unsigned long addr) · 51 unmodified lines | |||
| 52 | } | 52 | } |
| 53 | 53 | ||
| 54 | static __initdata unsigned long screen_info_table = EFI_INVALID_TABLE_ADDR; | 54 | static __initdata unsigned long screen_info_table = EFI_INVALID_TABLE_ADDR; |
| 55 | static __initdata unsigned long cpu_state_table = EFI_INVALID_TABLE_ADDR; | ||
| 55 | 56 | ||
| 56 | static const efi_config_table_type_t arch_tables[] __initconst = { | 57 | static const efi_config_table_type_t arch_tables[] __initconst = { |
| 57 | {LINUX_EFI_ARM_SCREEN_INFO_TABLE_GUID, &screen_info_table}, | 58 | {LINUX_EFI_ARM_SCREEN_INFO_TABLE_GUID, &screen_info_table}, |
| 59 | {LINUX_EFI_ARM_CPU_STATE_TABLE_GUID, &cpu_state_table}, | ||
| 58 | {} | 60 | {} |
| 59 | }; | 61 | }; |
| 60 | 62 | ||
| @@ -62,7 +64,8 @@ static void __init init_screen_info(void) · 1 unmodified line | |||
| 62 | { | 64 | { |
| 63 | struct screen_info *si; | 65 | struct screen_info *si; |
| 64 | 66 | ||
| 65 | if (screen_info_table != EFI_INVALID_TABLE_ADDR) { | 67 | if (IS_ENABLED(CONFIG_ARM) && |
| 68 | screen_info_table != EFI_INVALID_TABLE_ADDR) { | ||
| 66 | si = early_memremap_ro(screen_info_table, sizeof(*si)); | 69 | si = early_memremap_ro(screen_info_table, sizeof(*si)); |
| 67 | if (!si) { | 70 | if (!si) { |
| 68 | pr_err("Could not map screen_info config table\n"); | 71 | pr_err("Could not map screen_info config table\n"); |
| @@ -116,7 +119,8 @@ static int __init uefi_init(u64 efi_system_table) · 47 unmodified lines | |||
| 116 | goto out; | 119 | goto out; |
| 117 | } | 120 | } |
| 118 | retval = efi_config_parse_tables(config_tables, systab->nr_tables, | 121 | retval = efi_config_parse_tables(config_tables, systab->nr_tables, |
| 119 | arch_tables); | 122 | IS_ENABLED(CONFIG_ARM) ? arch_tables |
| 123 | : NULL); | ||
| 120 | 124 | ||
| 121 | early_memunmap(config_tables, table_size); | 125 | early_memunmap(config_tables, table_size); |
| 122 | out: | 126 | out: |
| @@ -238,9 +242,37 @@ void __init efi_init(void) · 115 unmodified lines | |||
| 238 | 242 | ||
| 239 | init_screen_info(); | 243 | init_screen_info(); |
| 240 | 244 | ||
| 245 | #ifdef CONFIG_ARM | ||
| 241 | /* ARM does not permit early mappings to persist across paging_init() */ | 246 | /* ARM does not permit early mappings to persist across paging_init() */ |
| 242 | if (IS_ENABLED(CONFIG_ARM)) | 247 | efi_memmap_unmap(); |
| 243 | efi_memmap_unmap(); | 248 | |
| 249 | if (cpu_state_table != EFI_INVALID_TABLE_ADDR) { | ||
| 250 | struct efi_arm_entry_state *state; | ||
| 251 | bool dump_state = true; | ||
| 252 | |||
| 253 | state = early_memremap_ro(cpu_state_table, | ||
| 254 | sizeof(struct efi_arm_entry_state)); | ||
| 255 | if (state == NULL) { | ||
| 256 | pr_warn("Unable to map CPU entry state table.\n"); | ||
| 257 | return; | ||
| 258 | } | ||
| 259 | |||
| 260 | if ((state->sctlr_before_ebs & 1) == 0) | ||
| 261 | pr_warn(FW_BUG "EFI stub was entered with MMU and Dcache disabled, please fix your firmware!\n"); | ||
| 262 | else if ((state->sctlr_after_ebs & 1) == 0) | ||
| 263 | pr_warn(FW_BUG "ExitBootServices() returned with MMU and Dcache disabled, please fix your firmware!\n"); | ||
| 264 | else | ||
| 265 | dump_state = false; | ||
| 266 | |||
| 267 | if (dump_state || efi_enabled(EFI_DBG)) { | ||
| 268 | pr_info("CPSR at EFI stub entry : 0x%08x\n", state->cpsr_before_ebs); | ||
| 269 | pr_info("SCTLR at EFI stub entry : 0x%08x\n", state->sctlr_before_ebs); | ||
| 270 | pr_info("CPSR after ExitBootServices() : 0x%08x\n", state->cpsr_after_ebs); | ||
| 271 | pr_info("SCTLR after ExitBootServices(): 0x%08x\n", state->sctlr_after_ebs); | ||
| 272 | } | ||
| 273 | early_memunmap(state, sizeof(struct efi_arm_entry_state)); | ||
| 274 | } | ||
| 275 | #endif | ||
| 244 | } | 276 | } |
| 245 | 277 | ||
| 246 | static bool efifb_overlaps_pci_range(const struct of_pci_range *range) | 278 | static bool efifb_overlaps_pci_range(const struct of_pci_range *range) |
| @@ -189,7 +189,7 @@ static void generic_ops_unregister(void) · 188 unmodified lines | |||
| 189 | efivars_unregister(&generic_efivars); | 189 | efivars_unregister(&generic_efivars); |
| 190 | } | 190 | } |
| 191 | 191 | ||
| 192 | #if IS_ENABLED(CONFIG_ACPI) | 192 | #ifdef CONFIG_EFI_CUSTOM_SSDT_OVERLAYS |
| 193 | #define EFIVAR_SSDT_NAME_MAX 16 | 193 | #define EFIVAR_SSDT_NAME_MAX 16 |
| 194 | static char efivar_ssdt[EFIVAR_SSDT_NAME_MAX] __initdata; | 194 | static char efivar_ssdt[EFIVAR_SSDT_NAME_MAX] __initdata; |
| 195 | static int __init efivar_ssdt_setup(char *str) | 195 | static int __init efivar_ssdt_setup(char *str) |
| @@ -622,7 +622,8 @@ int __init efi_config_parse_tables(const efi_config_table_t *config_tables, · 426 unmodified lines | |||
| 622 | rsv = (void *)(p + prsv % PAGE_SIZE); | 622 | rsv = (void *)(p + prsv % PAGE_SIZE); |
| 623 | 623 | ||
| 624 | /* reserve the entry itself */ | 624 | /* reserve the entry itself */ |
| 625 | memblock_reserve(prsv, EFI_MEMRESERVE_SIZE(rsv->size)); | 625 | memblock_reserve(prsv, |
| 626 | struct_size(rsv, entry, rsv->size)); | ||
| 626 | 627 | ||
| 627 | for (i = 0; i < atomic_read(&rsv->count); i++) { | 628 | for (i = 0; i < atomic_read(&rsv->count); i++) { |
| 628 | memblock_reserve(rsv->entry[i].base, | 629 | memblock_reserve(rsv->entry[i].base, |
| @@ -181,7 +181,7 @@ static int esre_create_sysfs_entry(void *esre, int entry_num) · 180 unmodified lines | |||
| 181 | rc = kobject_init_and_add(&entry->kobj, &esre1_ktype, NULL, | 181 | rc = kobject_init_and_add(&entry->kobj, &esre1_ktype, NULL, |
| 182 | "entry%d", entry_num); | 182 | "entry%d", entry_num); |
| 183 | if (rc) { | 183 | if (rc) { |
| 184 | kfree(entry); | 184 | kobject_put(&entry->kobj); |
| 185 | return rc; | 185 | return rc; |
| 186 | } | 186 | } |
| 187 | } | 187 | } |
| @@ -6,7 +6,8 @@ · 5 unmodified lines | |||
| 6 | # enabled, even if doing so doesn't break the build. | 6 | # enabled, even if doing so doesn't break the build. |
| 7 | # | 7 | # |
| 8 | cflags-$(CONFIG_X86_32) := -march=i386 | 8 | cflags-$(CONFIG_X86_32) := -march=i386 |
| 9 | cflags-$(CONFIG_X86_64) := -mcmodel=small | 9 | cflags-$(CONFIG_X86_64) := -mcmodel=small \ |
| 10 | $(call cc-option,-maccumulate-outgoing-args) | ||
| 10 | cflags-$(CONFIG_X86) += -m$(BITS) -D__KERNEL__ \ | 11 | cflags-$(CONFIG_X86) += -m$(BITS) -D__KERNEL__ \ |
| 11 | -fPIC -fno-strict-aliasing -mno-red-zone \ | 12 | -fPIC -fno-strict-aliasing -mno-red-zone \ |
| 12 | -mno-mmx -mno-sse -fshort-wchar \ | 13 | -mno-mmx -mno-sse -fshort-wchar \ |
| @@ -7,10 +7,49 @@ · 6 unmodified lines | |||
| 7 | 7 | ||
| 8 | #include "efistub.h" | 8 | #include "efistub.h" |
| 9 | 9 | ||
| 10 | static efi_guid_t cpu_state_guid = LINUX_EFI_ARM_CPU_STATE_TABLE_GUID; | ||
| 11 | |||
| 12 | struct efi_arm_entry_state *efi_entry_state; | ||
| 13 | |||
| 14 | static void get_cpu_state(u32 *cpsr, u32 *sctlr) | ||
| 15 | { | ||
| 16 | asm("mrs %0, cpsr" : "=r"(*cpsr)); | ||
| 17 | if ((*cpsr & MODE_MASK) == HYP_MODE) | ||
| 18 | asm("mrc p15, 4, %0, c1, c0, 0" : "=r"(*sctlr)); | ||
| 19 | else | ||
| 20 | asm("mrc p15, 0, %0, c1, c0, 0" : "=r"(*sctlr)); | ||
| 21 | } | ||
| 22 | |||
| 10 | efi_status_t check_platform_features(void) | 23 | efi_status_t check_platform_features(void) |
| 11 | { | 24 | { |
| 25 | efi_status_t status; | ||
| 26 | u32 cpsr, sctlr; | ||
| 12 | int block; | 27 | int block; |
| 13 | 28 | ||
| 29 | get_cpu_state(&cpsr, &sctlr); | ||
| 30 | |||
| 31 | efi_info("Entering in %s mode with MMU %sabled\n", | ||
| 32 | ((cpsr & MODE_MASK) == HYP_MODE) ? "HYP" : "SVC", | ||
| 33 | (sctlr & 1) ? "en" : "dis"); | ||
| 34 | |||
| 35 | status = efi_bs_call(allocate_pool, EFI_LOADER_DATA, | ||
| 36 | sizeof(*efi_entry_state), | ||
| 37 | (void **)&efi_entry_state); | ||
| 38 | if (status != EFI_SUCCESS) { | ||
| 39 | efi_err("allocate_pool() failed\n"); | ||
| 40 | return status; | ||
| 41 | } | ||
| 42 | |||
| 43 | efi_entry_state->cpsr_before_ebs = cpsr; | ||
| 44 | efi_entry_state->sctlr_before_ebs = sctlr; | ||
| 45 | |||
| 46 | status = efi_bs_call(install_configuration_table, &cpu_state_guid, | ||
| 47 | efi_entry_state); | ||
| 48 | if (status != EFI_SUCCESS) { | ||
| 49 | efi_err("install_configuration_table() failed\n"); | ||
| 50 | goto free_state; | ||
| 51 | } | ||
| 52 | |||
| 14 | /* non-LPAE kernels can run anywhere */ | 53 | /* non-LPAE kernels can run anywhere */ |
| 15 | if (!IS_ENABLED(CONFIG_ARM_LPAE)) | 54 | if (!IS_ENABLED(CONFIG_ARM_LPAE)) |
| 16 | return EFI_SUCCESS; | 55 | return EFI_SUCCESS; |
| @@ -19,9 +58,22 @@ efi_status_t check_platform_features(void) · 2 unmodified lines | |||
| 19 | block = cpuid_feature_extract(CPUID_EXT_MMFR0, 0); | 58 | block = cpuid_feature_extract(CPUID_EXT_MMFR0, 0); |
| 20 | if (block < 5) { | 59 | if (block < 5) { |
| 21 | efi_err("This LPAE kernel is not supported by your CPU\n"); | 60 | efi_err("This LPAE kernel is not supported by your CPU\n"); |
| 22 | return EFI_UNSUPPORTED; | 61 | status = EFI_UNSUPPORTED; |
| 62 | goto drop_table; | ||
| 23 | } | 63 | } |
| 24 | return EFI_SUCCESS; | 64 | return EFI_SUCCESS; |
| 65 | |||
| 66 | drop_table: | ||
| 67 | efi_bs_call(install_configuration_table, &cpu_state_guid, NULL); | ||
| 68 | free_state: | ||
| 69 | efi_bs_call(free_pool, efi_entry_state); | ||
| 70 | return status; | ||
| 71 | } | ||
| 72 | |||
| 73 | void efi_handle_post_ebs_state(void) | ||
| 74 | { | ||
| 75 | get_cpu_state(&efi_entry_state->cpsr_after_ebs, | ||
| 76 | &efi_entry_state->sctlr_after_ebs); | ||
| 25 | } | 77 | } |
| 26 | 78 | ||
| 27 | static efi_guid_t screen_info_guid = LINUX_EFI_ARM_SCREEN_INFO_TABLE_GUID; | 79 | static efi_guid_t screen_info_guid = LINUX_EFI_ARM_SCREEN_INFO_TABLE_GUID; |
| @@ -35,13 +35,16 @@ efi_status_t check_platform_features(void) · 34 unmodified lines | |||
| 35 | } | 35 | } |
| 36 | 36 | ||
| 37 | /* | 37 | /* |
| 38 | * Relocatable kernels can fix up the misalignment with respect to | 38 | * Although relocatable kernels can fix up the misalignment with respect to |
| 39 | * MIN_KIMG_ALIGN, so they only require a minimum alignment of EFI_KIMG_ALIGN | 39 | * MIN_KIMG_ALIGN, the resulting virtual text addresses are subtly out of |
| 40 | * (which accounts for the alignment of statically allocated objects such as | 40 | * sync with those recorded in the vmlinux when kaslr is disabled but the |
| 41 | * the swapper stack.) | 41 | * image required relocation anyway. Therefore retain 2M alignment unless |
| 42 | * KASLR is in use. | ||
| 42 | */ | 43 | */ |
| 43 | static const u64 min_kimg_align = IS_ENABLED(CONFIG_RELOCATABLE) ? EFI_KIMG_ALIGN | 44 | static u64 min_kimg_align(void) |
| 44 | : MIN_KIMG_ALIGN; | 45 | { |
| 46 | return efi_nokaslr ? MIN_KIMG_ALIGN : EFI_KIMG_ALIGN; | ||
| 47 | } | ||
| 45 | 48 | ||
| 46 | efi_status_t handle_kernel_image(unsigned long *image_addr, | 49 | efi_status_t handle_kernel_image(unsigned long *image_addr, |
| 47 | unsigned long *image_size, | 50 | unsigned long *image_size, |
| @@ -74,21 +77,21 @@ efi_status_t handle_kernel_image(unsigned long *image_addr, · 26 unmodified lines | |||
| 74 | 77 | ||
| 75 | kernel_size = _edata - _text; | 78 | kernel_size = _edata - _text; |
| 76 | kernel_memsize = kernel_size + (_end - _edata); | 79 | kernel_memsize = kernel_size + (_end - _edata); |
| 77 | *reserve_size = kernel_memsize + TEXT_OFFSET % min_kimg_align; | 80 | *reserve_size = kernel_memsize + TEXT_OFFSET % min_kimg_align(); |
| 78 | 81 | ||
| 79 | if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && phys_seed != 0) { | 82 | if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && phys_seed != 0) { |
| 80 | /* | 83 | /* |
| 81 | * If KASLR is enabled, and we have some randomness available, | 84 | * If KASLR is enabled, and we have some randomness available, |
| 82 | * locate the kernel at a randomized offset in physical memory. | 85 | * locate the kernel at a randomized offset in physical memory. |
| 83 | */ | 86 | */ |
| 84 | status = efi_random_alloc(*reserve_size, min_kimg_align, | 87 | status = efi_random_alloc(*reserve_size, min_kimg_align(), |
| 85 | reserve_addr, phys_seed); | 88 | reserve_addr, phys_seed); |
| 86 | } else { | 89 | } else { |
| 87 | status = EFI_OUT_OF_RESOURCES; | 90 | status = EFI_OUT_OF_RESOURCES; |
| 88 | } | 91 | } |
| 89 | 92 | ||
| 90 | if (status != EFI_SUCCESS) { | 93 | if (status != EFI_SUCCESS) { |
| 91 | if (IS_ALIGNED((u64)_text - TEXT_OFFSET, min_kimg_align)) { | 94 | if (IS_ALIGNED((u64)_text - TEXT_OFFSET, min_kimg_align())) { |
| 92 | /* | 95 | /* |
| 93 | * Just execute from wherever we were loaded by the | 96 | * Just execute from wherever we were loaded by the |
| 94 | * UEFI PE/COFF loader if the alignment is suitable. | 97 | * UEFI PE/COFF loader if the alignment is suitable. |
| @@ -99,7 +102,7 @@ efi_status_t handle_kernel_image(unsigned long *image_addr, · 4 unmodified lines | |||
| 99 | } | 102 | } |
| 100 | 103 | ||
| 101 | status = efi_allocate_pages_aligned(*reserve_size, reserve_addr, | 104 | status = efi_allocate_pages_aligned(*reserve_size, reserve_addr, |
| 102 | ULONG_MAX, min_kimg_align); | 105 | ULONG_MAX, min_kimg_align()); |
| 103 | 106 | ||
| 104 | if (status != EFI_SUCCESS) { | 107 | if (status != EFI_SUCCESS) { |
| 105 | efi_err("Failed to relocate kernel\n"); | 108 | efi_err("Failed to relocate kernel\n"); |
| @@ -108,7 +111,7 @@ efi_status_t handle_kernel_image(unsigned long *image_addr, · 2 unmodified lines | |||
| 108 | } | 111 | } |
| 109 | } | 112 | } |
| 110 | 113 | ||
| 111 | *image_addr = *reserve_addr + TEXT_OFFSET % min_kimg_align; | 114 | *image_addr = *reserve_addr + TEXT_OFFSET % min_kimg_align(); |
| 112 | memcpy((void *)*image_addr, _text, kernel_size); | 115 | memcpy((void *)*image_addr, _text, kernel_size); |
| 113 | 116 | ||
| 114 | return EFI_SUCCESS; | 117 | return EFI_SUCCESS; |
| @@ -19,7 +19,7 @@ · 18 unmodified lines | |||
| 19 | #include "efistub.h" | 19 | #include "efistub.h" |
| 20 | 20 | ||
| 21 | bool efi_nochunk; | 21 | bool efi_nochunk; |
| 22 | bool efi_nokaslr; | 22 | bool efi_nokaslr = !IS_ENABLED(CONFIG_RANDOMIZE_BASE); |
| 23 | bool efi_noinitrd; | 23 | bool efi_noinitrd; |
| 24 | int efi_loglevel = CONSOLE_LOGLEVEL_DEFAULT; | 24 | int efi_loglevel = CONSOLE_LOGLEVEL_DEFAULT; |
| 25 | bool efi_novamap; | 25 | bool efi_novamap; |
| @@ -32,6 +32,10 @@ bool __pure __efi_soft_reserve_enabled(void) · 6 unmodified lines | |||
| 32 | return !efi_nosoftreserve; | 32 | return !efi_nosoftreserve; |
| 33 | } | 33 | } |
| 34 | 34 | ||
| 35 | /** | ||
| 36 | * efi_char16_puts() - Write a UCS-2 encoded string to the console | ||
| 37 | * @str: UCS-2 encoded string | ||
| 38 | */ | ||
| 35 | void efi_char16_puts(efi_char16_t *str) | 39 | void efi_char16_puts(efi_char16_t *str) |
| 36 | { | 40 | { |
| 37 | efi_call_proto(efi_table_attr(efi_system_table, con_out), | 41 | efi_call_proto(efi_table_attr(efi_system_table, con_out), |
| @@ -83,6 +87,10 @@ u32 utf8_to_utf32(const u8 **s8) · 45 unmodified lines | |||
| 83 | return c32; | 87 | return c32; |
| 84 | } | 88 | } |
| 85 | 89 | ||
| 90 | /** | ||
| 91 | * efi_puts() - Write a UTF-8 encoded string to the console | ||
| 92 | * @str: UTF-8 encoded string | ||
| 93 | */ | ||
| 86 | void efi_puts(const char *str) | 94 | void efi_puts(const char *str) |
| 87 | { | 95 | { |
| 88 | efi_char16_t buf[128]; | 96 | efi_char16_t buf[128]; |
| @@ -113,6 +121,16 @@ void efi_puts(const char *str) · 24 unmodified lines | |||
| 113 | } | 121 | } |
| 114 | } | 122 | } |
| 115 | 123 | ||
| 124 | /** | ||
| 125 | * efi_printk() - Print a kernel message | ||
| 126 | * @fmt: format string | ||
| 127 | * | ||
| 128 | * The first letter of the format string is used to determine the logging level | ||
| 129 | * of the message. If the level is less then the current EFI logging level, the | ||
| 130 | * message is suppressed. The message will be truncated to 255 bytes. | ||
| 131 | * | ||
| 132 | * Return: number of printed characters | ||
| 133 | */ | ||
| 116 | int efi_printk(const char *fmt, ...) | 134 | int efi_printk(const char *fmt, ...) |
| 117 | { | 135 | { |
| 118 | char printf_buf[256]; | 136 | char printf_buf[256]; |
| @@ -154,13 +172,18 @@ int efi_printk(const char *fmt, ...) · 35 unmodified lines | |||
| 154 | return printed; | 172 | return printed; |
| 155 | } | 173 | } |
| 156 | 174 | ||
| 157 | /* | 175 | /** |
| 158 | * Parse the ASCII string 'cmdline' for EFI options, denoted by the efi= | 176 | * efi_parse_options() - Parse EFI command line options |
| 177 | * @cmdline: kernel command line | ||
| 178 | * | ||
| 179 | * Parse the ASCII string @cmdline for EFI options, denoted by the efi= | ||
| 159 | * option, e.g. efi=nochunk. | 180 | * option, e.g. efi=nochunk. |
| 160 | * | 181 | * |
| 161 | * It should be noted that efi= is parsed in two very different | 182 | * It should be noted that efi= is parsed in two very different |
| 162 | * environments, first in the early boot environment of the EFI boot | 183 | * environments, first in the early boot environment of the EFI boot |
| 163 | * stub, and subsequently during the kernel boot. | 184 | * stub, and subsequently during the kernel boot. |
| 185 | * | ||
| 186 | * Return: status code | ||
| 164 | */ | 187 | */ |
| 165 | efi_status_t efi_parse_options(char const *cmdline) | 188 | efi_status_t efi_parse_options(char const *cmdline) |
| 166 | { | 189 | { |
| @@ -286,13 +309,21 @@ char *efi_convert_cmdline(efi_loaded_image_t *image, int *cmd_line_len) · 119 unmodified lines | |||
| 286 | return (char *)cmdline_addr; | 309 | return (char *)cmdline_addr; |
| 287 | } | 310 | } |
| 288 | 311 | ||
| 289 | /* | 312 | /** |
| 313 | * efi_exit_boot_services() - Exit boot services | ||
| 314 | * @handle: handle of the exiting image | ||
| 315 | * @map: pointer to receive the memory map | ||
| 316 | * @priv: argument to be passed to @priv_func | ||
| 317 | * @priv_func: function to process the memory map before exiting boot services | ||
| 318 | * | ||
| 290 | * Handle calling ExitBootServices according to the requirements set out by the | 319 | * Handle calling ExitBootServices according to the requirements set out by the |
| 291 | * spec. Obtains the current memory map, and returns that info after calling | 320 | * spec. Obtains the current memory map, and returns that info after calling |
| 292 | * ExitBootServices. The client must specify a function to perform any | 321 | * ExitBootServices. The client must specify a function to perform any |
| 293 | * processing of the memory map data prior to ExitBootServices. A client | 322 | * processing of the memory map data prior to ExitBootServices. A client |
| 294 | * specific structure may be passed to the function via priv. The client | 323 | * specific structure may be passed to the function via priv. The client |
| 295 | * function may be called multiple times. | 324 | * function may be called multiple times. |
| 325 | * | ||
| 326 | * Return: status code | ||
| 296 | */ | 327 | */ |
| 297 | efi_status_t efi_exit_boot_services(void *handle, | 328 | efi_status_t efi_exit_boot_services(void *handle, |
| 298 | struct efi_boot_memmap *map, | 329 | struct efi_boot_memmap *map, |
| @@ -361,6 +392,11 @@ fail: · 62 unmodified lines | |||
| 361 | return status; | 392 | return status; |
| 362 | } | 393 | } |
| 363 | 394 | ||
| 395 | /** | ||
| 396 | * get_efi_config_table() - retrieve UEFI configuration table | ||
| 397 | * @guid: GUID of the configuration table to be retrieved | ||
| 398 | * Return: pointer to the configuration table or NULL | ||
| 399 | */ | ||
| 364 | void *get_efi_config_table(efi_guid_t guid) | 400 | void *get_efi_config_table(efi_guid_t guid) |
| 365 | { | 401 | { |
| 366 | unsigned long tables = efi_table_attr(efi_system_table, tables); | 402 | unsigned long tables = efi_table_attr(efi_system_table, tables); |
| @@ -408,17 +444,18 @@ static const struct { · 41 unmodified lines | |||
| 408 | }; | 444 | }; |
| 409 | 445 | ||
| 410 | /** | 446 | /** |
| 411 | * efi_load_initrd_dev_path - load the initrd from the Linux initrd device path | 447 | * efi_load_initrd_dev_path() - load the initrd from the Linux initrd device path |
| 412 | * @load_addr: pointer to store the address where the initrd was loaded | 448 | * @load_addr: pointer to store the address where the initrd was loaded |
| 413 | * @load_size: pointer to store the size of the loaded initrd | 449 | * @load_size: pointer to store the size of the loaded initrd |
| 414 | * @max: upper limit for the initrd memory allocation | 450 | * @max: upper limit for the initrd memory allocation |
| 415 | * @return: %EFI_SUCCESS if the initrd was loaded successfully, in which | 451 | * |
| 416 | * case @load_addr and @load_size are assigned accordingly | 452 | * Return: |
| 417 | * %EFI_NOT_FOUND if no LoadFile2 protocol exists on the initrd | 453 | * * %EFI_SUCCESS if the initrd was loaded successfully, in which |
| 418 | * device path | 454 | * case @load_addr and @load_size are assigned accordingly |
| 419 | * %EFI_INVALID_PARAMETER if load_addr == NULL or load_size == NULL | 455 | * * %EFI_NOT_FOUND if no LoadFile2 protocol exists on the initrd device path |
| 420 | * %EFI_OUT_OF_RESOURCES if memory allocation failed | 456 | * * %EFI_INVALID_PARAMETER if load_addr == NULL or load_size == NULL |
| 421 | * %EFI_LOAD_ERROR in all other cases | 457 | * * %EFI_OUT_OF_RESOURCES if memory allocation failed |
| 458 | * * %EFI_LOAD_ERROR in all other cases | ||
| 422 | */ | 459 | */ |
| 423 | static | 460 | static |
| 424 | efi_status_t efi_load_initrd_dev_path(unsigned long *load_addr, | 461 | efi_status_t efi_load_initrd_dev_path(unsigned long *load_addr, |
| @@ -481,6 +518,16 @@ efi_status_t efi_load_initrd_cmdline(efi_loaded_image_t *image, · 56 unmodified lines | |||
| 481 | load_addr, load_size); | 518 | load_addr, load_size); |
| 482 | } | 519 | } |
| 483 | 520 | ||
| 521 | /** | ||
| 522 | * efi_load_initrd() - Load initial RAM disk | ||
| 523 | * @image: EFI loaded image protocol | ||
| 524 | * @load_addr: pointer to loaded initrd | ||
| 525 | * @load_size: size of loaded initrd | ||
| 526 | * @soft_limit: preferred size of allocated memory for loading the initrd | ||
| 527 | * @hard_limit: minimum size of allocated memory | ||
| 528 | * | ||
| 529 | * Return: status code | ||
| 530 | */ | ||
| 484 | efi_status_t efi_load_initrd(efi_loaded_image_t *image, | 531 | efi_status_t efi_load_initrd(efi_loaded_image_t *image, |
| 485 | unsigned long *load_addr, | 532 | unsigned long *load_addr, |
| 486 | unsigned long *load_size, | 533 | unsigned long *load_size, |
| @@ -505,6 +552,15 @@ efi_status_t efi_load_initrd(efi_loaded_image_t *image, · 18 unmodified lines | |||
| 505 | return status; | 552 | return status; |
| 506 | } | 553 | } |
| 507 | 554 | ||
| 555 | /** | ||
| 556 | * efi_wait_for_key() - Wait for key stroke | ||
| 557 | * @usec: number of microseconds to wait for key stroke | ||
| 558 | * @key: key entered | ||
| 559 | * | ||
| 560 | * Wait for up to @usec microseconds for a key stroke. | ||
| 561 | * | ||
| 562 | * Return: status code, EFI_SUCCESS if key received | ||
| 563 | */ | ||
| 508 | efi_status_t efi_wait_for_key(unsigned long usec, efi_input_key_t *key) | 564 | efi_status_t efi_wait_for_key(unsigned long usec, efi_input_key_t *key) |
| 509 | { | 565 | { |
| 510 | efi_event_t events[2], timer; | 566 | efi_event_t events[2], timer; |
| @@ -329,6 +329,9 @@ efi_status_t __efiapi efi_pe_entry(efi_handle_t handle, · 328 unmodified lines | |||
| 329 | if (status != EFI_SUCCESS) | 329 | if (status != EFI_SUCCESS) |
| 330 | goto fail_free_initrd; | 330 | goto fail_free_initrd; |
| 331 | 331 | ||
| 332 | if (IS_ENABLED(CONFIG_ARM)) | ||
| 333 | efi_handle_post_ebs_state(); | ||
| 334 | |||
| 332 | efi_enter_kernel(image_addr, fdt_addr, fdt_totalsize((void *)fdt_addr)); | 335 | efi_enter_kernel(image_addr, fdt_addr, fdt_totalsize((void *)fdt_addr)); |
| 333 | /* not reached */ | 336 | /* not reached */ |
| 334 | 337 | ||
| @@ -157,8 +157,14 @@ typedef void (__efiapi *efi_event_notify_t)(efi_event_t, void *); · 156 unmodified lines | |||
| 157 | #define EFI_EVT_NOTIFY_WAIT 0x00000100U | 157 | #define EFI_EVT_NOTIFY_WAIT 0x00000100U |
| 158 | #define EFI_EVT_NOTIFY_SIGNAL 0x00000200U | 158 | #define EFI_EVT_NOTIFY_SIGNAL 0x00000200U |
| 159 | 159 | ||
| 160 | /* | 160 | /** |
| 161 | * boottime->wait_for_event takes an array of events as input. | 161 | * efi_set_event_at() - add event to events array |
| 162 | * | ||
| 163 | * @events: array of UEFI events | ||
| 164 | * @ids: index where to put the event in the array | ||
| 165 | * @event: event to add to the aray | ||
| 166 | * | ||
| 167 | * boottime->wait_for_event() takes an array of events as input. | ||
| 162 | * Provide a helper to set it up correctly for mixed mode. | 168 | * Provide a helper to set it up correctly for mixed mode. |
| 163 | */ | 169 | */ |
| 164 | static inline | 170 | static inline |
| @@ -771,4 +777,6 @@ efi_status_t efi_load_initrd(efi_loaded_image_t *image, · 606 unmodified lines | |||
| 771 | unsigned long soft_limit, | 777 | unsigned long soft_limit, |
| 772 | unsigned long hard_limit); | 778 | unsigned long hard_limit); |
| 773 | 779 | ||
| 780 | void efi_handle_post_ebs_state(void); | ||
| 781 | |||
| 774 | #endif | 782 | #endif |
| @@ -102,12 +102,20 @@ static int find_file_option(const efi_char16_t *cmdline, int cmdline_len, · 101 unmodified lines | |||
| 102 | if (!found) | 102 | if (!found) |
| 103 | return 0; | 103 | return 0; |
| 104 | 104 | ||
| 105 | /* Skip any leading slashes */ | ||
| 106 | while (cmdline[i] == L'/' || cmdline[i] == L'\\') | ||
| 107 | i++; | ||
| 108 | |||
| 105 | while (--result_len > 0 && i < cmdline_len) { | 109 | while (--result_len > 0 && i < cmdline_len) { |
| 106 | if (cmdline[i] == L'\0' || | 110 | efi_char16_t c = cmdline[i++]; |
| 107 | cmdline[i] == L'\n' || | 111 | |
| 108 | cmdline[i] == L' ') | 112 | if (c == L'\0' || c == L'\n' || c == L' ') |
| 109 | break; | 113 | break; |
| 110 | *result++ = cmdline[i++]; | 114 | else if (c == L'/') |
| 115 | /* Replace UNIX dir separators with EFI standard ones */ | ||
| 116 | *result++ = L'\\'; | ||
| 117 | else | ||
| 118 | *result++ = c; | ||
| 111 | } | 119 | } |
| 112 | *result = L'\0'; | 120 | *result = L'\0'; |
| 113 | return i; | 121 | return i; |
| @@ -1,6 +1,7 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | 2 | ||
| 3 | #include <linux/ctype.h> | 3 | #include <linux/ctype.h> |
| 4 | #include <linux/string.h> | ||
| 4 | #include <linux/types.h> | 5 | #include <linux/types.h> |
| 5 | 6 | ||
| 6 | char *skip_spaces(const char *str) | 7 | char *skip_spaces(const char *str) |
| @@ -157,8 +157,10 @@ static int alloc_init_cpu_groups(cpumask_var_t **pcpu_groups) · 156 unmodified lines | |||
| 157 | 157 | ||
| 158 | cpu_groups = kcalloc(nb_available_cpus, sizeof(cpu_groups), | 158 | cpu_groups = kcalloc(nb_available_cpus, sizeof(cpu_groups), |
| 159 | GFP_KERNEL); | 159 | GFP_KERNEL); |
| 160 | if (!cpu_groups) | 160 | if (!cpu_groups) { |
| 161 | free_cpumask_var(tmp); | ||
| 161 | return -ENOMEM; | 162 | return -ENOMEM; |
| 163 | } | ||
| 162 | 164 | ||
| 163 | cpumask_copy(tmp, cpu_online_mask); | 165 | cpumask_copy(tmp, cpu_online_mask); |
| 164 | 166 | ||
| @@ -167,6 +169,7 @@ static int alloc_init_cpu_groups(cpumask_var_t **pcpu_groups) · 2 unmodified lines | |||
| 167 | topology_core_cpumask(cpumask_any(tmp)); | 169 | topology_core_cpumask(cpumask_any(tmp)); |
| 168 | 170 | ||
| 169 | if (!alloc_cpumask_var(&cpu_groups[num_groups], GFP_KERNEL)) { | 171 | if (!alloc_cpumask_var(&cpu_groups[num_groups], GFP_KERNEL)) { |
| 172 | free_cpumask_var(tmp); | ||
| 170 | free_cpu_groups(num_groups, &cpu_groups); | 173 | free_cpu_groups(num_groups, &cpu_groups); |
| 171 | return -ENOMEM; | 174 | return -ENOMEM; |
| 172 | } | 175 | } |
| @@ -196,13 +199,12 @@ static int hotplug_tests(void) · 23 unmodified lines | |||
| 196 | if (!page_buf) | 199 | if (!page_buf) |
| 197 | goto out_free_cpu_groups; | 200 | goto out_free_cpu_groups; |
| 198 | 201 | ||
| 199 | err = 0; | ||
| 200 | /* | 202 | /* |
| 201 | * Of course the last CPU cannot be powered down and cpu_down() should | 203 | * Of course the last CPU cannot be powered down and cpu_down() should |
| 202 | * refuse doing that. | 204 | * refuse doing that. |
| 203 | */ | 205 | */ |
| 204 | pr_info("Trying to turn off and on again all CPUs\n"); | 206 | pr_info("Trying to turn off and on again all CPUs\n"); |
| 205 | err += down_and_up_cpus(cpu_online_mask, offlined_cpus); | 207 | err = down_and_up_cpus(cpu_online_mask, offlined_cpus); |
| 206 | 208 | ||
| 207 | /* | 209 | /* |
| 208 | * Take down CPUs by cpu group this time. When the last CPU is turned | 210 | * Take down CPUs by cpu group this time. When the last CPU is turned |
| @@ -181,6 +181,7 @@ EXPORT_SYMBOL_GPL(rpi_firmware_property); · 180 unmodified lines | |||
| 181 | static void | 181 | static void |
| 182 | rpi_firmware_print_firmware_revision(struct rpi_firmware *fw) | 182 | rpi_firmware_print_firmware_revision(struct rpi_firmware *fw) |
| 183 | { | 183 | { |
| 184 | time64_t date_and_time; | ||
| 184 | u32 packet; | 185 | u32 packet; |
| 185 | int ret = rpi_firmware_property(fw, | 186 | int ret = rpi_firmware_property(fw, |
| 186 | RPI_FIRMWARE_GET_FIRMWARE_REVISION, | 187 | RPI_FIRMWARE_GET_FIRMWARE_REVISION, |
| @@ -189,7 +190,9 @@ rpi_firmware_print_firmware_revision(struct rpi_firmware *fw) · 2 unmodified lines | |||
| 189 | if (ret) | 190 | if (ret) |
| 190 | return; | 191 | return; |
| 191 | 192 | ||
| 192 | dev_info(fw->cl.dev, "Attached to firmware from %ptT\n", &packet); | 193 | /* This is not compatible with y2038 */ |
| 194 | date_and_time = packet; | ||
| 195 | dev_info(fw->cl.dev, "Attached to firmware from %ptT\n", &date_and_time); | ||
| 193 | } | 196 | } |
| 194 | 197 | ||
| 195 | static void | 198 | static void |
| @@ -208,7 +208,7 @@ config FPGA_DFL_PCI · 207 unmodified lines | |||
| 208 | 208 | ||
| 209 | config FPGA_MGR_ZYNQMP_FPGA | 209 | config FPGA_MGR_ZYNQMP_FPGA |
| 210 | tristate "Xilinx ZynqMP FPGA" | 210 | tristate "Xilinx ZynqMP FPGA" |
| 211 | depends on ARCH_ZYNQMP || COMPILE_TEST | 211 | depends on ZYNQMP_FIRMWARE || (!ZYNQMP_FIRMWARE && COMPILE_TEST) |
| 212 | help | 212 | help |
| 213 | FPGA manager driver support for Xilinx ZynqMP FPGAs. | 213 | FPGA manager driver support for Xilinx ZynqMP FPGAs. |
| 214 | This driver uses the processor configuration port(PCAP) | 214 | This driver uses the processor configuration port(PCAP) |
| @@ -64,6 +64,7 @@ static int arizona_gpio_get(struct gpio_chip *chip, unsigned offset) · 63 unmodified lines | |||
| 64 | ret = pm_runtime_get_sync(chip->parent); | 64 | ret = pm_runtime_get_sync(chip->parent); |
| 65 | if (ret < 0) { | 65 | if (ret < 0) { |
| 66 | dev_err(chip->parent, "Failed to resume: %d\n", ret); | 66 | dev_err(chip->parent, "Failed to resume: %d\n", ret); |
| 67 | pm_runtime_put_autosuspend(chip->parent); | ||
| 67 | return ret; | 68 | return ret; |
| 68 | } | 69 | } |
| 69 | 70 | ||
| @@ -72,12 +73,15 @@ static int arizona_gpio_get(struct gpio_chip *chip, unsigned offset) · 2 unmodified lines | |||
| 72 | if (ret < 0) { | 73 | if (ret < 0) { |
| 73 | dev_err(chip->parent, "Failed to drop cache: %d\n", | 74 | dev_err(chip->parent, "Failed to drop cache: %d\n", |
| 74 | ret); | 75 | ret); |
| 76 | pm_runtime_put_autosuspend(chip->parent); | ||
| 75 | return ret; | 77 | return ret; |
| 76 | } | 78 | } |
| 77 | 79 | ||
| 78 | ret = regmap_read(arizona->regmap, reg, &val); | 80 | ret = regmap_read(arizona->regmap, reg, &val); |
| 79 | if (ret < 0) | 81 | if (ret < 0) { |
| 82 | pm_runtime_put_autosuspend(chip->parent); | ||
| 80 | return ret; | 83 | return ret; |
| 84 | } | ||
| 81 | 85 | ||
| 82 | pm_runtime_mark_last_busy(chip->parent); | 86 | pm_runtime_mark_last_busy(chip->parent); |
| 83 | pm_runtime_put_autosuspend(chip->parent); | 87 | pm_runtime_put_autosuspend(chip->parent); |
| @@ -106,6 +110,7 @@ static int arizona_gpio_direction_out(struct gpio_chip *chip, · 22 unmodified lines | |||
| 106 | ret = pm_runtime_get_sync(chip->parent); | 110 | ret = pm_runtime_get_sync(chip->parent); |
| 107 | if (ret < 0) { | 111 | if (ret < 0) { |
| 108 | dev_err(chip->parent, "Failed to resume: %d\n", ret); | 112 | dev_err(chip->parent, "Failed to resume: %d\n", ret); |
| 113 | pm_runtime_put(chip->parent); | ||
| 109 | return ret; | 114 | return ret; |
| 110 | } | 115 | } |
| 111 | } | 116 | } |
| @@ -107,6 +107,84 @@ static const struct i2c_device_id pca953x_id[] = { · 106 unmodified lines | |||
| 107 | }; | 107 | }; |
| 108 | MODULE_DEVICE_TABLE(i2c, pca953x_id); | 108 | MODULE_DEVICE_TABLE(i2c, pca953x_id); |
| 109 | 109 | ||
| 110 | #ifdef CONFIG_GPIO_PCA953X_IRQ | ||
| 111 | |||
| 112 | #include <linux/dmi.h> | ||
| 113 | #include <linux/gpio.h> | ||
| 114 | #include <linux/list.h> | ||
| 115 | |||
| 116 | static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = { | ||
| 117 | { | ||
| 118 | /* | ||
| 119 | * On Intel Galileo Gen 2 board the IRQ pin of one of | ||
| 120 | * the I²C GPIO expanders, which has GpioInt() resource, | ||
| 121 | * is provided as an absolute number instead of being | ||
| 122 | * relative. Since first controller (gpio-sch.c) and | ||
| 123 | * second (gpio-dwapb.c) are at the fixed bases, we may | ||
| 124 | * safely refer to the number in the global space to get | ||
| 125 | * an IRQ out of it. | ||
| 126 | */ | ||
| 127 | .matches = { | ||
| 128 | DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"), | ||
| 129 | }, | ||
| 130 | }, | ||
| 131 | {} | ||
| 132 | }; | ||
| 133 | |||
| 134 | #ifdef CONFIG_ACPI | ||
| 135 | static int pca953x_acpi_get_pin(struct acpi_resource *ares, void *data) | ||
| 136 | { | ||
| 137 | struct acpi_resource_gpio *agpio; | ||
| 138 | int *pin = data; | ||
| 139 | |||
| 140 | if (acpi_gpio_get_irq_resource(ares, &agpio)) | ||
| 141 | *pin = agpio->pin_table[0]; | ||
| 142 | return 1; | ||
| 143 | } | ||
| 144 | |||
| 145 | static int pca953x_acpi_find_pin(struct device *dev) | ||
| 146 | { | ||
| 147 | struct acpi_device *adev = ACPI_COMPANION(dev); | ||
| 148 | int pin = -ENOENT, ret; | ||
| 149 | LIST_HEAD(r); | ||
| 150 | |||
| 151 | ret = acpi_dev_get_resources(adev, &r, pca953x_acpi_get_pin, &pin); | ||
| 152 | acpi_dev_free_resource_list(&r); | ||
| 153 | if (ret < 0) | ||
| 154 | return ret; | ||
| 155 | |||
| 156 | return pin; | ||
| 157 | } | ||
| 158 | #else | ||
| 159 | static inline int pca953x_acpi_find_pin(struct device *dev) { return -ENXIO; } | ||
| 160 | #endif | ||
| 161 | |||
| 162 | static int pca953x_acpi_get_irq(struct device *dev) | ||
| 163 | { | ||
| 164 | int pin, ret; | ||
| 165 | |||
| 166 | pin = pca953x_acpi_find_pin(dev); | ||
| 167 | if (pin < 0) | ||
| 168 | return pin; | ||
| 169 | |||
| 170 | dev_info(dev, "Applying ACPI interrupt quirk (GPIO %d)\n", pin); | ||
| 171 | |||
| 172 | if (!gpio_is_valid(pin)) | ||
| 173 | return -EINVAL; | ||
| 174 | |||
| 175 | ret = gpio_request(pin, "pca953x interrupt"); | ||
| 176 | if (ret) | ||
| 177 | return ret; | ||
| 178 | |||
| 179 | ret = gpio_to_irq(pin); | ||
| 180 | |||
| 181 | /* When pin is used as an IRQ, no need to keep it requested */ | ||
| 182 | gpio_free(pin); | ||
| 183 | |||
| 184 | return ret; | ||
| 185 | } | ||
| 186 | #endif | ||
| 187 | |||
| 110 | static const struct acpi_device_id pca953x_acpi_ids[] = { | 188 | static const struct acpi_device_id pca953x_acpi_ids[] = { |
| 111 | { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, | 189 | { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, }, |
| 112 | { } | 190 | { } |
| @@ -322,6 +400,7 @@ static const struct regmap_config pca953x_ai_i2c_regmap = { · 209 unmodified lines | |||
| 322 | .writeable_reg = pca953x_writeable_register, | 400 | .writeable_reg = pca953x_writeable_register, |
| 323 | .volatile_reg = pca953x_volatile_register, | 401 | .volatile_reg = pca953x_volatile_register, |
| 324 | 402 | ||
| 403 | .disable_locking = true, | ||
| 325 | .cache_type = REGCACHE_RBTREE, | 404 | .cache_type = REGCACHE_RBTREE, |
| 326 | .max_register = 0x7f, | 405 | .max_register = 0x7f, |
| 327 | }; | 406 | }; |
| @@ -623,8 +702,6 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) · 295 unmodified lines | |||
| 623 | DECLARE_BITMAP(reg_direction, MAX_LINE); | 702 | DECLARE_BITMAP(reg_direction, MAX_LINE); |
| 624 | int level; | 703 | int level; |
| 625 | 704 | ||
| 626 | pca953x_read_regs(chip, chip->regs->direction, reg_direction); | ||
| 627 | |||
| 628 | if (chip->driver_data & PCA_PCAL) { | 705 | if (chip->driver_data & PCA_PCAL) { |
| 629 | /* Enable latch on interrupt-enabled inputs */ | 706 | /* Enable latch on interrupt-enabled inputs */ |
| 630 | pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); | 707 | pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask); |
| @@ -635,7 +712,11 @@ static void pca953x_irq_bus_sync_unlock(struct irq_data *d) · 4 unmodified lines | |||
| 635 | pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask); | 712 | pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask); |
| 636 | } | 713 | } |
| 637 | 714 | ||
| 715 | /* Switch direction to input if needed */ | ||
| 716 | pca953x_read_regs(chip, chip->regs->direction, reg_direction); | ||
| 717 | |||
| 638 | bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio); | 718 | bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio); |
| 719 | bitmap_complement(reg_direction, reg_direction, gc->ngpio); | ||
| 639 | bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio); | 720 | bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio); |
| 640 | 721 | ||
| 641 | /* Look for any newly setup interrupt */ | 722 | /* Look for any newly setup interrupt */ |
| @@ -734,14 +815,16 @@ static irqreturn_t pca953x_irq_handler(int irq, void *devid) · 92 unmodified lines | |||
| 734 | struct gpio_chip *gc = &chip->gpio_chip; | 815 | struct gpio_chip *gc = &chip->gpio_chip; |
| 735 | DECLARE_BITMAP(pending, MAX_LINE); | 816 | DECLARE_BITMAP(pending, MAX_LINE); |
| 736 | int level; | 817 | int level; |
| 818 | bool ret; | ||
| 737 | 819 | ||
| 738 | if (!pca953x_irq_pending(chip, pending)) | 820 | mutex_lock(&chip->i2c_lock); |
| 739 | return IRQ_NONE; | 821 | ret = pca953x_irq_pending(chip, pending); |
| 822 | mutex_unlock(&chip->i2c_lock); | ||
| 740 | 823 | ||
| 741 | for_each_set_bit(level, pending, gc->ngpio) | 824 | for_each_set_bit(level, pending, gc->ngpio) |
| 742 | handle_nested_irq(irq_find_mapping(gc->irq.domain, level)); | 825 | handle_nested_irq(irq_find_mapping(gc->irq.domain, level)); |
| 743 | 826 | ||
| 744 | return IRQ_HANDLED; | 827 | return IRQ_RETVAL(ret); |
| 745 | } | 828 | } |
| 746 | 829 | ||
| 747 | static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) | 830 | static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) |
| @@ -752,6 +835,12 @@ static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base) · 4 unmodified lines | |||
| 752 | DECLARE_BITMAP(irq_stat, MAX_LINE); | 835 | DECLARE_BITMAP(irq_stat, MAX_LINE); |
| 753 | int ret; | 836 | int ret; |
| 754 | 837 | ||
| 838 | if (dmi_first_match(pca953x_dmi_acpi_irq_info)) { | ||
| 839 | ret = pca953x_acpi_get_irq(&client->dev); | ||
| 840 | if (ret > 0) | ||
| 841 | client->irq = ret; | ||
| 842 | } | ||
| 843 | |||
| 755 | if (!client->irq) | 844 | if (!client->irq) |
| 756 | return 0; | 845 | return 0; |
| 757 | 846 | ||
| @@ -204,6 +204,7 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev, · 203 unmodified lines | |||
| 204 | (mode_info->atom_context->bios + data_offset); | 204 | (mode_info->atom_context->bios + data_offset); |
| 205 | switch (crev) { | 205 | switch (crev) { |
| 206 | case 11: | 206 | case 11: |
| 207 | case 12: | ||
| 207 | mem_channel_number = igp_info->v11.umachannelnumber; | 208 | mem_channel_number = igp_info->v11.umachannelnumber; |
| 208 | /* channel width is 64 */ | 209 | /* channel width is 64 */ |
| 209 | if (vram_width) | 210 | if (vram_width) |
| @@ -1295,27 +1295,37 @@ static void amdgpu_ib_preempt_job_recovery(struct drm_gpu_scheduler *sched) · 1294 unmodified lines | |||
| 1295 | static void amdgpu_ib_preempt_mark_partial_job(struct amdgpu_ring *ring) | 1295 | static void amdgpu_ib_preempt_mark_partial_job(struct amdgpu_ring *ring) |
| 1296 | { | 1296 | { |
| 1297 | struct amdgpu_job *job; | 1297 | struct amdgpu_job *job; |
| 1298 | struct drm_sched_job *s_job; | 1298 | struct drm_sched_job *s_job, *tmp; |
| 1299 | uint32_t preempt_seq; | 1299 | uint32_t preempt_seq; |
| 1300 | struct dma_fence *fence, **ptr; | 1300 | struct dma_fence *fence, **ptr; |
| 1301 | struct amdgpu_fence_driver *drv = &ring->fence_drv; | 1301 | struct amdgpu_fence_driver *drv = &ring->fence_drv; |
| 1302 | struct drm_gpu_scheduler *sched = &ring->sched; | 1302 | struct drm_gpu_scheduler *sched = &ring->sched; |
| 1303 | bool preempted = true; | ||
| 1303 | 1304 | ||
| 1304 | if (ring->funcs->type != AMDGPU_RING_TYPE_GFX) | 1305 | if (ring->funcs->type != AMDGPU_RING_TYPE_GFX) |
| 1305 | return; | 1306 | return; |
| 1306 | 1307 | ||
| 1307 | preempt_seq = le32_to_cpu(*(drv->cpu_addr + 2)); | 1308 | preempt_seq = le32_to_cpu(*(drv->cpu_addr + 2)); |
| 1308 | if (preempt_seq <= atomic_read(&drv->last_seq)) | 1309 | if (preempt_seq <= atomic_read(&drv->last_seq)) { |
| 1309 | return; | 1310 | preempted = false; |
| 1311 | goto no_preempt; | ||
| 1312 | } | ||
| 1310 | 1313 | ||
| 1311 | preempt_seq &= drv->num_fences_mask; | 1314 | preempt_seq &= drv->num_fences_mask; |
| 1312 | ptr = &drv->fences[preempt_seq]; | 1315 | ptr = &drv->fences[preempt_seq]; |
| 1313 | fence = rcu_dereference_protected(*ptr, 1); | 1316 | fence = rcu_dereference_protected(*ptr, 1); |
| 1314 | 1317 | ||
| 1318 | no_preempt: | ||
| 1315 | spin_lock(&sched->job_list_lock); | 1319 | spin_lock(&sched->job_list_lock); |
| 1316 | list_for_each_entry(s_job, &sched->ring_mirror_list, node) { | 1320 | list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) { |
| 1321 | if (dma_fence_is_signaled(&s_job->s_fence->finished)) { | ||
| 1322 | /* remove job from ring_mirror_list */ | ||
| 1323 | list_del_init(&s_job->node); | ||
| 1324 | sched->ops->free_job(s_job); | ||
| 1325 | continue; | ||
| 1326 | } | ||
| 1317 | job = to_amdgpu_job(s_job); | 1327 | job = to_amdgpu_job(s_job); |
| 1318 | if (job->fence == fence) | 1328 | if (preempted && job->fence == fence) |
| 1319 | /* mark the job as preempted */ | 1329 | /* mark the job as preempted */ |
| 1320 | job->preemption_status |= AMDGPU_IB_PREEMPTED; | 1330 | job->preemption_status |= AMDGPU_IB_PREEMPTED; |
| 1321 | } | 1331 | } |
| @@ -37,7 +37,8 @@ static void amdgpu_job_timedout(struct drm_sched_job *s_job) · 36 unmodified lines | |||
| 37 | 37 | ||
| 38 | memset(&ti, 0, sizeof(struct amdgpu_task_info)); | 38 | memset(&ti, 0, sizeof(struct amdgpu_task_info)); |
| 39 | 39 | ||
| 40 | if (amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) { | 40 | if (amdgpu_gpu_recovery && |
| 41 | amdgpu_ring_soft_recovery(ring, job->vmid, s_job->s_fence->parent)) { | ||
| 41 | DRM_ERROR("ring %s timeout, but soft recovered\n", | 42 | DRM_ERROR("ring %s timeout, but soft recovered\n", |
| 42 | s_job->sched->name); | 43 | s_job->sched->name); |
| 43 | return; | 44 | return; |
| @@ -2784,7 +2784,7 @@ static ssize_t amdgpu_hwmon_show_sclk(struct device *dev, · 2783 unmodified lines | |||
| 2784 | if (r) | 2784 | if (r) |
| 2785 | return r; | 2785 | return r; |
| 2786 | 2786 | ||
| 2787 | return snprintf(buf, PAGE_SIZE, "%d\n", sclk * 10 * 1000); | 2787 | return snprintf(buf, PAGE_SIZE, "%u\n", sclk * 10 * 1000); |
| 2788 | } | 2788 | } |
| 2789 | 2789 | ||
| 2790 | static ssize_t amdgpu_hwmon_show_sclk_label(struct device *dev, | 2790 | static ssize_t amdgpu_hwmon_show_sclk_label(struct device *dev, |
| @@ -2819,7 +2819,7 @@ static ssize_t amdgpu_hwmon_show_mclk(struct device *dev, · 28 unmodified lines | |||
| 2819 | if (r) | 2819 | if (r) |
| 2820 | return r; | 2820 | return r; |
| 2821 | 2821 | ||
| 2822 | return snprintf(buf, PAGE_SIZE, "%d\n", mclk * 10 * 1000); | 2822 | return snprintf(buf, PAGE_SIZE, "%u\n", mclk * 10 * 1000); |
| 2823 | } | 2823 | } |
| 2824 | 2824 | ||
| 2825 | static ssize_t amdgpu_hwmon_show_mclk_label(struct device *dev, | 2825 | static ssize_t amdgpu_hwmon_show_mclk_label(struct device *dev, |
| @@ -372,6 +372,52 @@ static int psp_tmr_load(struct psp_context *psp) · 371 unmodified lines | |||
| 372 | return ret; | 372 | return ret; |
| 373 | } | 373 | } |
| 374 | 374 | ||
| 375 | static void psp_prep_tmr_unload_cmd_buf(struct psp_context *psp, | ||
| 376 | struct psp_gfx_cmd_resp *cmd) | ||
| 377 | { | ||
| 378 | if (amdgpu_sriov_vf(psp->adev)) | ||
| 379 | cmd->cmd_id = GFX_CMD_ID_DESTROY_VMR; | ||
| 380 | else | ||
| 381 | cmd->cmd_id = GFX_CMD_ID_DESTROY_TMR; | ||
| 382 | } | ||
| 383 | |||
| 384 | static int psp_tmr_unload(struct psp_context *psp) | ||
| 385 | { | ||
| 386 | int ret; | ||
| 387 | struct psp_gfx_cmd_resp *cmd; | ||
| 388 | |||
| 389 | cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL); | ||
| 390 | if (!cmd) | ||
| 391 | return -ENOMEM; | ||
| 392 | |||
| 393 | psp_prep_tmr_unload_cmd_buf(psp, cmd); | ||
| 394 | DRM_INFO("free PSP TMR buffer\n"); | ||
| 395 | |||
| 396 | ret = psp_cmd_submit_buf(psp, NULL, cmd, | ||
| 397 | psp->fence_buf_mc_addr); | ||
| 398 | |||
| 399 | kfree(cmd); | ||
| 400 | |||
| 401 | return ret; | ||
| 402 | } | ||
| 403 | |||
| 404 | static int psp_tmr_terminate(struct psp_context *psp) | ||
| 405 | { | ||
| 406 | int ret; | ||
| 407 | void *tmr_buf; | ||
| 408 | void **pptr; | ||
| 409 | |||
| 410 | ret = psp_tmr_unload(psp); | ||
| 411 | if (ret) | ||
| 412 | return ret; | ||
| 413 | |||
| 414 | /* free TMR memory buffer */ | ||
| 415 | pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; | ||
| 416 | amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr); | ||
| 417 | |||
| 418 | return 0; | ||
| 419 | } | ||
| 420 | |||
| 375 | static void psp_prep_asd_load_cmd_buf(struct psp_gfx_cmd_resp *cmd, | 421 | static void psp_prep_asd_load_cmd_buf(struct psp_gfx_cmd_resp *cmd, |
| 376 | uint64_t asd_mc, uint32_t size) | 422 | uint64_t asd_mc, uint32_t size) |
| 377 | { | 423 | { |
| @@ -1779,8 +1825,6 @@ static int psp_hw_fini(void *handle) · 1401 unmodified lines | |||
| 1779 | { | 1825 | { |
| 1780 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 1826 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
| 1781 | struct psp_context *psp = &adev->psp; | 1827 | struct psp_context *psp = &adev->psp; |
| 1782 | void *tmr_buf; | ||
| 1783 | void **pptr; | ||
| 1784 | 1828 | ||
| 1785 | if (psp->adev->psp.ta_fw) { | 1829 | if (psp->adev->psp.ta_fw) { |
| 1786 | psp_ras_terminate(psp); | 1830 | psp_ras_terminate(psp); |
| @@ -1790,10 +1834,9 @@ static int psp_hw_fini(void *handle) · 3 unmodified lines | |||
| 1790 | 1834 | ||
| 1791 | psp_asd_unload(psp); | 1835 | psp_asd_unload(psp); |
| 1792 | 1836 | ||
| 1837 | psp_tmr_terminate(psp); | ||
| 1793 | psp_ring_destroy(psp, PSP_RING_TYPE__KM); | 1838 | psp_ring_destroy(psp, PSP_RING_TYPE__KM); |
| 1794 | 1839 | ||
| 1795 | pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL; | ||
| 1796 | amdgpu_bo_free_kernel(&psp->tmr_bo, &psp->tmr_mc_addr, pptr); | ||
| 1797 | amdgpu_bo_free_kernel(&psp->fw_pri_bo, | 1840 | amdgpu_bo_free_kernel(&psp->fw_pri_bo, |
| 1798 | &psp->fw_pri_mc_addr, &psp->fw_pri_buf); | 1841 | &psp->fw_pri_mc_addr, &psp->fw_pri_buf); |
| 1799 | amdgpu_bo_free_kernel(&psp->fence_buf_bo, | 1842 | amdgpu_bo_free_kernel(&psp->fence_buf_bo, |
| @@ -1840,6 +1883,18 @@ static int psp_suspend(void *handle) · 40 unmodified lines | |||
| 1840 | } | 1883 | } |
| 1841 | } | 1884 | } |
| 1842 | 1885 | ||
| 1886 | ret = psp_asd_unload(psp); | ||
| 1887 | if (ret) { | ||
| 1888 | DRM_ERROR("Failed to unload asd\n"); | ||
| 1889 | return ret; | ||
| 1890 | } | ||
| 1891 | |||
| 1892 | ret = psp_tmr_terminate(psp); | ||
| 1893 | if (ret) { | ||
| 1894 | DRM_ERROR("Falied to terminate tmr\n"); | ||
| 1895 | return ret; | ||
| 1896 | } | ||
| 1897 | |||
| 1843 | ret = psp_ring_stop(psp, PSP_RING_TYPE__KM); | 1898 | ret = psp_ring_stop(psp, PSP_RING_TYPE__KM); |
| 1844 | if (ret) { | 1899 | if (ret) { |
| 1845 | DRM_ERROR("PSP ring stop failed\n"); | 1900 | DRM_ERROR("PSP ring stop failed\n"); |
| @@ -7513,12 +7513,17 @@ static int gfx_v10_0_ring_preempt_ib(struct amdgpu_ring *ring) · 7512 unmodified lines | |||
| 7513 | struct amdgpu_device *adev = ring->adev; | 7513 | struct amdgpu_device *adev = ring->adev; |
| 7514 | struct amdgpu_kiq *kiq = &adev->gfx.kiq; | 7514 | struct amdgpu_kiq *kiq = &adev->gfx.kiq; |
| 7515 | struct amdgpu_ring *kiq_ring = &kiq->ring; | 7515 | struct amdgpu_ring *kiq_ring = &kiq->ring; |
| 7516 | unsigned long flags; | ||
| 7516 | 7517 | ||
| 7517 | if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) | 7518 | if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) |
| 7518 | return -EINVAL; | 7519 | return -EINVAL; |
| 7519 | 7520 | ||
| 7520 | if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) | 7521 | spin_lock_irqsave(&kiq->ring_lock, flags); |
| 7522 | |||
| 7523 | if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) { | ||
| 7524 | spin_unlock_irqrestore(&kiq->ring_lock, flags); | ||
| 7521 | return -ENOMEM; | 7525 | return -ENOMEM; |
| 7526 | } | ||
| 7522 | 7527 | ||
| 7523 | /* assert preemption condition */ | 7528 | /* assert preemption condition */ |
| 7524 | amdgpu_ring_set_preempt_cond_exec(ring, false); | 7529 | amdgpu_ring_set_preempt_cond_exec(ring, false); |
| @@ -7529,6 +7534,8 @@ static int gfx_v10_0_ring_preempt_ib(struct amdgpu_ring *ring) · 4 unmodified lines | |||
| 7529 | ++ring->trail_seq); | 7534 | ++ring->trail_seq); |
| 7530 | amdgpu_ring_commit(kiq_ring); | 7535 | amdgpu_ring_commit(kiq_ring); |
| 7531 | 7536 | ||
| 7537 | spin_unlock_irqrestore(&kiq->ring_lock, flags); | ||
| 7538 | |||
| 7532 | /* poll the trailing fence */ | 7539 | /* poll the trailing fence */ |
| 7533 | for (i = 0; i < adev->usec_timeout; i++) { | 7540 | for (i = 0; i < adev->usec_timeout; i++) { |
| 7534 | if (ring->trail_seq == | 7541 | if (ring->trail_seq == |
| @@ -314,30 +314,20 @@ static uint64_t sdma_v5_0_ring_get_rptr(struct amdgpu_ring *ring) · 313 unmodified lines | |||
| 314 | static uint64_t sdma_v5_0_ring_get_wptr(struct amdgpu_ring *ring) | 314 | static uint64_t sdma_v5_0_ring_get_wptr(struct amdgpu_ring *ring) |
| 315 | { | 315 | { |
| 316 | struct amdgpu_device *adev = ring->adev; | 316 | struct amdgpu_device *adev = ring->adev; |
| 317 | u64 *wptr = NULL; | 317 | u64 wptr; |
| 318 | uint64_t local_wptr = 0; | ||
| 319 | 318 | ||
| 320 | if (ring->use_doorbell) { | 319 | if (ring->use_doorbell) { |
| 321 | /* XXX check if swapping is necessary on BE */ | 320 | /* XXX check if swapping is necessary on BE */ |
| 322 | wptr = ((u64 *)&adev->wb.wb[ring->wptr_offs]); | 321 | wptr = READ_ONCE(*((u64 *)&adev->wb.wb[ring->wptr_offs])); |
| 323 | DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", *wptr); | 322 | DRM_DEBUG("wptr/doorbell before shift == 0x%016llx\n", wptr); |
| 324 | *wptr = (*wptr) >> 2; | ||
| 325 | DRM_DEBUG("wptr/doorbell after shift == 0x%016llx\n", *wptr); | ||
| 326 | } else { | 323 | } else { |
| 327 | u32 lowbit, highbit; | 324 | wptr = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)); |
| 328 | 325 | wptr = wptr << 32; | |
| 329 | wptr = &local_wptr; | 326 | wptr |= RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)); |
| 330 | lowbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR)) >> 2; | 327 | DRM_DEBUG("wptr before shift [%i] wptr == 0x%016llx\n", ring->me, wptr); |
| 331 | highbit = RREG32(sdma_v5_0_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI)) >> 2; | ||
| 332 | |||
| 333 | DRM_DEBUG("wptr [%i]high== 0x%08x low==0x%08x\n", | ||
| 334 | ring->me, highbit, lowbit); | ||
| 335 | *wptr = highbit; | ||
| 336 | *wptr = (*wptr) << 32; | ||
| 337 | *wptr |= lowbit; | ||
| 338 | } | 328 | } |
| 339 | 329 | ||
| 340 | return *wptr; | 330 | return wptr >> 2; |
| 341 | } | 331 | } |
| 342 | 332 | ||
| 343 | /** | 333 | /** |
| @@ -1298,8 +1288,12 @@ static int sdma_v5_0_sw_fini(void *handle) · 954 unmodified lines | |||
| 1298 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 1288 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
| 1299 | int i; | 1289 | int i; |
| 1300 | 1290 | ||
| 1301 | for (i = 0; i < adev->sdma.num_instances; i++) | 1291 | for (i = 0; i < adev->sdma.num_instances; i++) { |
| 1292 | if (adev->sdma.instance[i].fw != NULL) | ||
| 1293 | release_firmware(adev->sdma.instance[i].fw); | ||
| 1294 | |||
| 1302 | amdgpu_ring_fini(&adev->sdma.instance[i].ring); | 1295 | amdgpu_ring_fini(&adev->sdma.instance[i].ring); |
| 1296 | } | ||
| 1303 | 1297 | ||
| 1304 | return 0; | 1298 | return 0; |
| 1305 | } | 1299 | } |
| @@ -428,6 +428,7 @@ struct kfd_process *kfd_create_process(struct file *filep) · 427 unmodified lines | |||
| 428 | (int)process->lead_thread->pid); | 428 | (int)process->lead_thread->pid); |
| 429 | if (ret) { | 429 | if (ret) { |
| 430 | pr_warn("Creating procfs pid directory failed"); | 430 | pr_warn("Creating procfs pid directory failed"); |
| 431 | kobject_put(process->kobj); | ||
| 431 | goto out; | 432 | goto out; |
| 432 | } | 433 | } |
| 433 | 434 | ||
| @@ -974,6 +974,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) · 973 unmodified lines | |||
| 974 | /* Update the actual used number of crtc */ | 974 | /* Update the actual used number of crtc */ |
| 975 | adev->mode_info.num_crtc = adev->dm.display_indexes_num; | 975 | adev->mode_info.num_crtc = adev->dm.display_indexes_num; |
| 976 | 976 | ||
| 977 | /* create fake encoders for MST */ | ||
| 978 | dm_dp_create_fake_mst_encoders(adev); | ||
| 979 | |||
| 977 | /* TODO: Add_display_info? */ | 980 | /* TODO: Add_display_info? */ |
| 978 | 981 | ||
| 979 | /* TODO use dynamic cursor width */ | 982 | /* TODO use dynamic cursor width */ |
| @@ -997,6 +1000,12 @@ error: · 17 unmodified lines | |||
| 997 | 1000 | ||
| 998 | static void amdgpu_dm_fini(struct amdgpu_device *adev) | 1001 | static void amdgpu_dm_fini(struct amdgpu_device *adev) |
| 999 | { | 1002 | { |
| 1003 | int i; | ||
| 1004 | |||
| 1005 | for (i = 0; i < adev->dm.display_indexes_num; i++) { | ||
| 1006 | drm_encoder_cleanup(&adev->dm.mst_encoders[i].base); | ||
| 1007 | } | ||
| 1008 | |||
| 1000 | amdgpu_dm_audio_fini(adev); | 1009 | amdgpu_dm_audio_fini(adev); |
| 1001 | 1010 | ||
| 1002 | amdgpu_dm_destroy_drm_device(&adev->dm); | 1011 | amdgpu_dm_destroy_drm_device(&adev->dm); |
| @@ -1358,7 +1367,7 @@ static int dm_late_init(void *handle) · 355 unmodified lines | |||
| 1358 | struct dmcu *dmcu = NULL; | 1367 | struct dmcu *dmcu = NULL; |
| 1359 | bool ret; | 1368 | bool ret; |
| 1360 | 1369 | ||
| 1361 | if (!adev->dm.fw_dmcu) | 1370 | if (!adev->dm.fw_dmcu && !adev->dm.dmub_fw) |
| 1362 | return detect_mst_link_for_all_connectors(adev->ddev); | 1371 | return detect_mst_link_for_all_connectors(adev->ddev); |
| 1363 | 1372 | ||
| 1364 | dmcu = adev->dm.dc->res_pool->dmcu; | 1373 | dmcu = adev->dm.dc->res_pool->dmcu; |
| @@ -2010,6 +2019,7 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector) · 645 unmodified lines | |||
| 2010 | struct amdgpu_display_manager *dm; | 2019 | struct amdgpu_display_manager *dm; |
| 2011 | struct drm_connector *conn_base; | 2020 | struct drm_connector *conn_base; |
| 2012 | struct amdgpu_device *adev; | 2021 | struct amdgpu_device *adev; |
| 2022 | struct dc_link *link = NULL; | ||
| 2013 | static const u8 pre_computed_values[] = { | 2023 | static const u8 pre_computed_values[] = { |
| 2014 | 50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69, | 2024 | 50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69, |
| 2015 | 71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98}; | 2025 | 71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98}; |
| @@ -2017,6 +2027,10 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector) · 1 unmodified line | |||
| 2017 | if (!aconnector || !aconnector->dc_link) | 2027 | if (!aconnector || !aconnector->dc_link) |
| 2018 | return; | 2028 | return; |
| 2019 | 2029 | ||
| 2030 | link = aconnector->dc_link; | ||
| 2031 | if (link->connector_signal != SIGNAL_TYPE_EDP) | ||
| 2032 | return; | ||
| 2033 | |||
| 2020 | conn_base = &aconnector->base; | 2034 | conn_base = &aconnector->base; |
| 2021 | adev = conn_base->dev->dev_private; | 2035 | adev = conn_base->dev->dev_private; |
| 2022 | dm = &adev->dm; | 2036 | dm = &adev->dm; |
| @@ -5024,7 +5038,8 @@ create_validate_stream_for_sink(struct amdgpu_dm_connector *aconnector, · 3001 unmodified lines | |||
| 5024 | struct drm_connector *connector = &aconnector->base; | 5038 | struct drm_connector *connector = &aconnector->base; |
| 5025 | struct amdgpu_device *adev = connector->dev->dev_private; | 5039 | struct amdgpu_device *adev = connector->dev->dev_private; |
| 5026 | struct dc_stream_state *stream; | 5040 | struct dc_stream_state *stream; |
| 5027 | int requested_bpc = connector->state ? connector->state->max_requested_bpc : 8; | 5041 | const struct drm_connector_state *drm_state = dm_state ? &dm_state->base : NULL; |
| 5042 | int requested_bpc = drm_state ? drm_state->max_requested_bpc : 8; | ||
| 5028 | enum dc_status dc_result = DC_OK; | 5043 | enum dc_status dc_result = DC_OK; |
| 5029 | 5044 | ||
| 5030 | do { | 5045 | do { |
| @@ -43,6 +43,9 @@ · 42 unmodified lines | |||
| 43 | */ | 43 | */ |
| 44 | 44 | ||
| 45 | #define AMDGPU_DM_MAX_DISPLAY_INDEX 31 | 45 | #define AMDGPU_DM_MAX_DISPLAY_INDEX 31 |
| 46 | |||
| 47 | #define AMDGPU_DM_MAX_CRTC 6 | ||
| 48 | |||
| 46 | /* | 49 | /* |
| 47 | #include "include/amdgpu_dal_power_if.h" | 50 | #include "include/amdgpu_dal_power_if.h" |
| 48 | #include "amdgpu_dm_irq.h" | 51 | #include "amdgpu_dm_irq.h" |
| @@ -328,6 +331,13 @@ struct amdgpu_display_manager { · 279 unmodified lines | |||
| 328 | * available in FW | 331 | * available in FW |
| 329 | */ | 332 | */ |
| 330 | const struct gpu_info_soc_bounding_box_v1_0 *soc_bounding_box; | 333 | const struct gpu_info_soc_bounding_box_v1_0 *soc_bounding_box; |
| 334 | |||
| 335 | /** | ||
| 336 | * @mst_encoders: | ||
| 337 | * | ||
| 338 | * fake encoders used for DP MST. | ||
| 339 | */ | ||
| 340 | struct amdgpu_encoder mst_encoders[AMDGPU_DM_MAX_CRTC]; | ||
| 331 | }; | 341 | }; |
| 332 | 342 | ||
| 333 | struct amdgpu_dm_connector { | 343 | struct amdgpu_dm_connector { |
| @@ -356,7 +366,6 @@ struct amdgpu_dm_connector { · 22 unmodified lines | |||
| 356 | struct amdgpu_dm_dp_aux dm_dp_aux; | 366 | struct amdgpu_dm_dp_aux dm_dp_aux; |
| 357 | struct drm_dp_mst_port *port; | 367 | struct drm_dp_mst_port *port; |
| 358 | struct amdgpu_dm_connector *mst_port; | 368 | struct amdgpu_dm_connector *mst_port; |
| 359 | struct amdgpu_encoder *mst_encoder; | ||
| 360 | struct drm_dp_aux *dsc_aux; | 369 | struct drm_dp_aux *dsc_aux; |
| 361 | 370 | ||
| 362 | /* TODO see if we can merge with ddc_bus or make a dm_connector */ | 371 | /* TODO see if we can merge with ddc_bus or make a dm_connector */ |
| @@ -1058,7 +1058,6 @@ static const struct { · 1057 unmodified lines | |||
| 1058 | {"link_settings", &dp_link_settings_debugfs_fops}, | 1058 | {"link_settings", &dp_link_settings_debugfs_fops}, |
| 1059 | {"phy_settings", &dp_phy_settings_debugfs_fop}, | 1059 | {"phy_settings", &dp_phy_settings_debugfs_fop}, |
| 1060 | {"test_pattern", &dp_phy_test_pattern_fops}, | 1060 | {"test_pattern", &dp_phy_test_pattern_fops}, |
| 1061 | {"output_bpc", &output_bpc_fops}, | ||
| 1062 | {"vrr_range", &vrr_range_fops}, | 1061 | {"vrr_range", &vrr_range_fops}, |
| 1063 | #ifdef CONFIG_DRM_AMD_DC_HDCP | 1062 | #ifdef CONFIG_DRM_AMD_DC_HDCP |
| 1064 | {"hdcp_sink_capability", &hdcp_sink_capability_fops}, | 1063 | {"hdcp_sink_capability", &hdcp_sink_capability_fops}, |
| @@ -1142,6 +1141,9 @@ void connector_debugfs_init(struct amdgpu_dm_connector *connector) · 77 unmodified lines | |||
| 1142 | debugfs_create_file_unsafe("force_yuv420_output", 0644, dir, connector, | 1141 | debugfs_create_file_unsafe("force_yuv420_output", 0644, dir, connector, |
| 1143 | &force_yuv420_output_fops); | 1142 | &force_yuv420_output_fops); |
| 1144 | 1143 | ||
| 1144 | debugfs_create_file("output_bpc", 0644, dir, connector, | ||
| 1145 | &output_bpc_fops); | ||
| 1146 | |||
| 1145 | connector->debugfs_dpcd_address = 0; | 1147 | connector->debugfs_dpcd_address = 0; |
| 1146 | connector->debugfs_dpcd_size = 0; | 1148 | connector->debugfs_dpcd_size = 0; |
| 1147 | 1149 | ||
| @@ -510,8 +510,10 @@ static ssize_t srm_data_read(struct file *filp, struct kobject *kobj, struct bin · 509 unmodified lines | |||
| 510 | 510 | ||
| 511 | srm = psp_get_srm(work->hdcp.config.psp.handle, &srm_version, &srm_size); | 511 | srm = psp_get_srm(work->hdcp.config.psp.handle, &srm_version, &srm_size); |
| 512 | 512 | ||
| 513 | if (!srm) | 513 | if (!srm) { |
| 514 | return -EINVAL; | 514 | ret = -EINVAL; |
| 515 | goto ret; | ||
| 516 | } | ||
| 515 | 517 | ||
| 516 | if (pos >= srm_size) | 518 | if (pos >= srm_size) |
| 517 | ret = 0; | 519 | ret = 0; |
| @@ -95,7 +95,6 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector) · 94 unmodified lines | |||
| 95 | { | 95 | { |
| 96 | struct amdgpu_dm_connector *aconnector = | 96 | struct amdgpu_dm_connector *aconnector = |
| 97 | to_amdgpu_dm_connector(connector); | 97 | to_amdgpu_dm_connector(connector); |
| 98 | struct amdgpu_encoder *amdgpu_encoder = aconnector->mst_encoder; | ||
| 99 | 98 | ||
| 100 | if (aconnector->dc_sink) { | 99 | if (aconnector->dc_sink) { |
| 101 | dc_link_remove_remote_sink(aconnector->dc_link, | 100 | dc_link_remove_remote_sink(aconnector->dc_link, |
| @@ -105,8 +104,6 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector) · 3 unmodified lines | |||
| 105 | 104 | ||
| 106 | kfree(aconnector->edid); | 105 | kfree(aconnector->edid); |
| 107 | 106 | ||
| 108 | drm_encoder_cleanup(&amdgpu_encoder->base); | ||
| 109 | kfree(amdgpu_encoder); | ||
| 110 | drm_connector_cleanup(connector); | 107 | drm_connector_cleanup(connector); |
| 111 | drm_dp_mst_put_port_malloc(aconnector->port); | 108 | drm_dp_mst_put_port_malloc(aconnector->port); |
| 112 | kfree(aconnector); | 109 | kfree(aconnector); |
| @@ -243,7 +240,11 @@ static struct drm_encoder * · 130 unmodified lines | |||
| 243 | dm_mst_atomic_best_encoder(struct drm_connector *connector, | 240 | dm_mst_atomic_best_encoder(struct drm_connector *connector, |
| 244 | struct drm_connector_state *connector_state) | 241 | struct drm_connector_state *connector_state) |
| 245 | { | 242 | { |
| 246 | return &to_amdgpu_dm_connector(connector)->mst_encoder->base; | 243 | struct drm_device *dev = connector->dev; |
| 244 | struct amdgpu_device *adev = dev->dev_private; | ||
| 245 | struct amdgpu_crtc *acrtc = to_amdgpu_crtc(connector_state->crtc); | ||
| 246 | |||
| 247 | return &adev->dm.mst_encoders[acrtc->crtc_id].base; | ||
| 247 | } | 248 | } |
| 248 | 249 | ||
| 249 | static int | 250 | static int |
| @@ -306,31 +307,27 @@ static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = { · 56 unmodified lines | |||
| 306 | .destroy = amdgpu_dm_encoder_destroy, | 307 | .destroy = amdgpu_dm_encoder_destroy, |
| 307 | }; | 308 | }; |
| 308 | 309 | ||
| 309 | static struct amdgpu_encoder * | 310 | void |
| 310 | dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector) | 311 | dm_dp_create_fake_mst_encoders(struct amdgpu_device *adev) |
| 311 | { | 312 | { |
| 312 | struct drm_device *dev = connector->base.dev; | 313 | struct drm_device *dev = adev->ddev; |
| 313 | struct amdgpu_device *adev = dev->dev_private; | 314 | int i; |
| 314 | struct amdgpu_encoder *amdgpu_encoder; | ||
| 315 | struct drm_encoder *encoder; | ||
| 316 | |||
| 317 | amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL); | ||
| 318 | if (!amdgpu_encoder) | ||
| 319 | return NULL; | ||
| 320 | 315 | ||
| 321 | encoder = &amdgpu_encoder->base; | 316 | for (i = 0; i < adev->dm.display_indexes_num; i++) { |
| 322 | encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev); | 317 | struct amdgpu_encoder *amdgpu_encoder = &adev->dm.mst_encoders[i]; |
| 318 | struct drm_encoder *encoder = &amdgpu_encoder->base; | ||
| 323 | 319 | ||
| 324 | drm_encoder_init( | 320 | encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev); |
| 325 | dev, | ||
| 326 | &amdgpu_encoder->base, | ||
| 327 | &amdgpu_dm_encoder_funcs, | ||
| 328 | DRM_MODE_ENCODER_DPMST, | ||
| 329 | NULL); | ||
| 330 | 321 | ||
| 331 | drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs); | 322 | drm_encoder_init( |
| 323 | dev, | ||
| 324 | &amdgpu_encoder->base, | ||
| 325 | &amdgpu_dm_encoder_funcs, | ||
| 326 | DRM_MODE_ENCODER_DPMST, | ||
| 327 | NULL); | ||
| 332 | 328 | ||
| 333 | return amdgpu_encoder; | 329 | drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs); |
| 330 | } | ||
| 334 | } | 331 | } |
| 335 | 332 | ||
| 336 | static struct drm_connector * | 333 | static struct drm_connector * |
| @@ -343,6 +340,7 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, · 6 unmodified lines | |||
| 343 | struct amdgpu_device *adev = dev->dev_private; | 340 | struct amdgpu_device *adev = dev->dev_private; |
| 344 | struct amdgpu_dm_connector *aconnector; | 341 | struct amdgpu_dm_connector *aconnector; |
| 345 | struct drm_connector *connector; | 342 | struct drm_connector *connector; |
| 343 | int i; | ||
| 346 | 344 | ||
| 347 | aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL); | 345 | aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL); |
| 348 | if (!aconnector) | 346 | if (!aconnector) |
| @@ -369,9 +367,10 @@ dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, · 20 unmodified lines | |||
| 369 | master->dc_link, | 367 | master->dc_link, |
| 370 | master->connector_id); | 368 | master->connector_id); |
| 371 | 369 | ||
| 372 | aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master); | 370 | for (i = 0; i < adev->dm.display_indexes_num; i++) { |
| 373 | drm_connector_attach_encoder(&aconnector->base, | 371 | drm_connector_attach_encoder(&aconnector->base, |
| 374 | &aconnector->mst_encoder->base); | 372 | &adev->dm.mst_encoders[i].base); |
| 373 | } | ||
| 375 | 374 | ||
| 376 | connector->max_bpc_property = master->base.max_bpc_property; | 375 | connector->max_bpc_property = master->base.max_bpc_property; |
| 377 | if (connector->max_bpc_property) | 376 | if (connector->max_bpc_property) |
| @@ -35,6 +35,9 @@ void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm, · 34 unmodified lines | |||
| 35 | struct amdgpu_dm_connector *aconnector, | 35 | struct amdgpu_dm_connector *aconnector, |
| 36 | int link_index); | 36 | int link_index); |
| 37 | 37 | ||
| 38 | void | ||
| 39 | dm_dp_create_fake_mst_encoders(struct amdgpu_device *adev); | ||
| 40 | |||
| 38 | #if defined(CONFIG_DRM_AMD_DC_DCN) | 41 | #if defined(CONFIG_DRM_AMD_DC_DCN) |
| 39 | bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state, | 42 | bool compute_mst_dsc_configs_for_state(struct drm_atomic_state *state, |
| 40 | struct dc_state *dc_state); | 43 | struct dc_state *dc_state); |
| @@ -2538,10 +2538,12 @@ void dc_commit_updates_for_stream(struct dc *dc, · 2537 unmodified lines | |||
| 2538 | 2538 | ||
| 2539 | copy_stream_update_to_stream(dc, context, stream, stream_update); | 2539 | copy_stream_update_to_stream(dc, context, stream, stream_update); |
| 2540 | 2540 | ||
| 2541 | if (!dc->res_pool->funcs->validate_bandwidth(dc, context, false)) { | 2541 | if (update_type > UPDATE_TYPE_FAST) { |
| 2542 | DC_ERROR("Mode validation failed for stream update!\n"); | 2542 | if (!dc->res_pool->funcs->validate_bandwidth(dc, context, false)) { |
| 2543 | dc_release_state(context); | 2543 | DC_ERROR("Mode validation failed for stream update!\n"); |
| 2544 | return; | 2544 | dc_release_state(context); |
| 2545 | return; | ||
| 2546 | } | ||
| 2545 | } | 2547 | } |
| 2546 | 2548 | ||
| 2547 | commit_planes_for_stream( | 2549 | commit_planes_for_stream( |
| @@ -56,7 +56,7 @@ void update_stream_signal(struct dc_stream_state *stream, struct dc_sink *sink) · 55 unmodified lines | |||
| 56 | } | 56 | } |
| 57 | } | 57 | } |
| 58 | 58 | ||
| 59 | static void dc_stream_construct(struct dc_stream_state *stream, | 59 | static bool dc_stream_construct(struct dc_stream_state *stream, |
| 60 | struct dc_sink *dc_sink_data) | 60 | struct dc_sink *dc_sink_data) |
| 61 | { | 61 | { |
| 62 | uint32_t i = 0; | 62 | uint32_t i = 0; |
| @@ -118,11 +118,17 @@ static void dc_stream_construct(struct dc_stream_state *stream, · 55 unmodified lines | |||
| 118 | update_stream_signal(stream, dc_sink_data); | 118 | update_stream_signal(stream, dc_sink_data); |
| 119 | 119 | ||
| 120 | stream->out_transfer_func = dc_create_transfer_func(); | 120 | stream->out_transfer_func = dc_create_transfer_func(); |
| 121 | if (stream->out_transfer_func == NULL) { | ||
| 122 | dc_sink_release(dc_sink_data); | ||
| 123 | return false; | ||
| 124 | } | ||
| 121 | stream->out_transfer_func->type = TF_TYPE_BYPASS; | 125 | stream->out_transfer_func->type = TF_TYPE_BYPASS; |
| 122 | stream->out_transfer_func->ctx = stream->ctx; | 126 | stream->out_transfer_func->ctx = stream->ctx; |
| 123 | 127 | ||
| 124 | stream->stream_id = stream->ctx->dc_stream_id_count; | 128 | stream->stream_id = stream->ctx->dc_stream_id_count; |
| 125 | stream->ctx->dc_stream_id_count++; | 129 | stream->ctx->dc_stream_id_count++; |
| 130 | |||
| 131 | return true; | ||
| 126 | } | 132 | } |
| 127 | 133 | ||
| 128 | static void dc_stream_destruct(struct dc_stream_state *stream) | 134 | static void dc_stream_destruct(struct dc_stream_state *stream) |
| @@ -164,13 +170,20 @@ struct dc_stream_state *dc_create_stream_for_sink( · 35 unmodified lines | |||
| 164 | 170 | ||
| 165 | stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL); | 171 | stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL); |
| 166 | if (stream == NULL) | 172 | if (stream == NULL) |
| 167 | return NULL; | 173 | goto alloc_fail; |
| 168 | 174 | ||
| 169 | dc_stream_construct(stream, sink); | 175 | if (dc_stream_construct(stream, sink) == false) |
| 176 | goto construct_fail; | ||
| 170 | 177 | ||
| 171 | kref_init(&stream->refcount); | 178 | kref_init(&stream->refcount); |
| 172 | 179 | ||
| 173 | return stream; | 180 | return stream; |
| 181 | |||
| 182 | construct_fail: | ||
| 183 | kfree(stream); | ||
| 184 | |||
| 185 | alloc_fail: | ||
| 186 | return NULL; | ||
| 174 | } | 187 | } |
| 175 | 188 | ||
| 176 | struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream) | 189 | struct dc_stream_state *dc_copy_stream(const struct dc_stream_state *stream) |
| @@ -689,7 +689,7 @@ static int renoir_set_power_profile_mode(struct smu_context *smu, long *input, u · 688 unmodified lines | |||
| 689 | return -EINVAL; | 689 | return -EINVAL; |
| 690 | } | 690 | } |
| 691 | 691 | ||
| 692 | ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetWorkloadMask, | 692 | ret = smu_send_smc_msg_with_param(smu, SMU_MSG_ActiveProcessNotify, |
| 693 | 1 << workload_type, | 693 | 1 << workload_type, |
| 694 | NULL); | 694 | NULL); |
| 695 | if (ret) { | 695 | if (ret) { |
| @@ -522,9 +522,11 @@ static int vega20_smu_init(struct pp_hwmgr *hwmgr) · 521 unmodified lines | |||
| 522 | priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].version = 0x01; | 522 | priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].version = 0x01; |
| 523 | priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size = sizeof(DpmActivityMonitorCoeffInt_t); | 523 | priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size = sizeof(DpmActivityMonitorCoeffInt_t); |
| 524 | 524 | ||
| 525 | ret = smu_v11_0_i2c_eeprom_control_init(&adev->pm.smu_i2c); | 525 | if (adev->psp.ras.ras) { |
| 526 | if (ret) | 526 | ret = smu_v11_0_i2c_eeprom_control_init(&adev->pm.smu_i2c); |
| 527 | goto err4; | 527 | if (ret) |
| 528 | goto err4; | ||
| 529 | } | ||
| 528 | 530 | ||
| 529 | return 0; | 531 | return 0; |
| 530 | 532 | ||
| @@ -560,7 +562,8 @@ static int vega20_smu_fini(struct pp_hwmgr *hwmgr) · 29 unmodified lines | |||
| 560 | (struct vega20_smumgr *)(hwmgr->smu_backend); | 562 | (struct vega20_smumgr *)(hwmgr->smu_backend); |
| 561 | struct amdgpu_device *adev = hwmgr->adev; | 563 | struct amdgpu_device *adev = hwmgr->adev; |
| 562 | 564 | ||
| 563 | smu_v11_0_i2c_eeprom_control_fini(&adev->pm.smu_i2c); | 565 | if (adev->psp.ras.ras) |
| 566 | smu_v11_0_i2c_eeprom_control_fini(&adev->pm.smu_i2c); | ||
| 564 | 567 | ||
| 565 | if (priv) { | 568 | if (priv) { |
| 566 | amdgpu_bo_free_kernel(&priv->smu_tables.entry[TABLE_PPTABLE].handle, | 569 | amdgpu_bo_free_kernel(&priv->smu_tables.entry[TABLE_PPTABLE].handle, |
| @@ -173,8 +173,6 @@ static int aspeed_gfx_load(struct drm_device *drm) · 172 unmodified lines | |||
| 173 | 173 | ||
| 174 | drm_mode_config_reset(drm); | 174 | drm_mode_config_reset(drm); |
| 175 | 175 | ||
| 176 | drm_fbdev_generic_setup(drm, 32); | ||
| 177 | |||
| 178 | return 0; | 176 | return 0; |
| 179 | } | 177 | } |
| 180 | 178 | ||
| @@ -225,6 +223,7 @@ static int aspeed_gfx_probe(struct platform_device *pdev) · 44 unmodified lines | |||
| 225 | if (ret) | 223 | if (ret) |
| 226 | goto err_unload; | 224 | goto err_unload; |
| 227 | 225 | ||
| 226 | drm_fbdev_generic_setup(&priv->drm, 32); | ||
| 228 | return 0; | 227 | return 0; |
| 229 | 228 | ||
| 230 | err_unload: | 229 | err_unload: |
| @@ -227,18 +227,9 @@ int drm_fb_helper_debug_leave(struct fb_info *info) · 226 unmodified lines | |||
| 227 | } | 227 | } |
| 228 | EXPORT_SYMBOL(drm_fb_helper_debug_leave); | 228 | EXPORT_SYMBOL(drm_fb_helper_debug_leave); |
| 229 | 229 | ||
| 230 | /** | 230 | static int |
| 231 | * drm_fb_helper_restore_fbdev_mode_unlocked - restore fbdev configuration | 231 | __drm_fb_helper_restore_fbdev_mode_unlocked(struct drm_fb_helper *fb_helper, |
| 232 | * @fb_helper: driver-allocated fbdev helper, can be NULL | 232 | bool force) |
| 233 | * | ||
| 234 | * This should be called from driver's drm &drm_driver.lastclose callback | ||
| 235 | * when implementing an fbcon on top of kms using this helper. This ensures that | ||
| 236 | * the user isn't greeted with a black screen when e.g. X dies. | ||
| 237 | * | ||
| 238 | * RETURNS: | ||
| 239 | * Zero if everything went ok, negative error code otherwise. | ||
| 240 | */ | ||
| 241 | int drm_fb_helper_restore_fbdev_mode_unlocked(struct drm_fb_helper *fb_helper) | ||
| 242 | { | 233 | { |
| 243 | bool do_delayed; | 234 | bool do_delayed; |
| 244 | int ret; | 235 | int ret; |
| @@ -250,7 +241,16 @@ int drm_fb_helper_restore_fbdev_mode_unlocked(struct drm_fb_helper *fb_helper) · 5 unmodified lines | |||
| 250 | return 0; | 241 | return 0; |
| 251 | 242 | ||
| 252 | mutex_lock(&fb_helper->lock); | 243 | mutex_lock(&fb_helper->lock); |
| 253 | ret = drm_client_modeset_commit(&fb_helper->client); | 244 | if (force) { |
| 245 | /* | ||
| 246 | * Yes this is the _locked version which expects the master lock | ||
| 247 | * to be held. But for forced restores we're intentionally | ||
| 248 | * racing here, see drm_fb_helper_set_par(). | ||
| 249 | */ | ||
| 250 | ret = drm_client_modeset_commit_locked(&fb_helper->client); | ||
| 251 | } else { | ||
| 252 | ret = drm_client_modeset_commit(&fb_helper->client); | ||
| 253 | } | ||
| 254 | 254 | ||
| 255 | do_delayed = fb_helper->delayed_hotplug; | 255 | do_delayed = fb_helper->delayed_hotplug; |
| 256 | if (do_delayed) | 256 | if (do_delayed) |
| @@ -262,6 +262,22 @@ int drm_fb_helper_restore_fbdev_mode_unlocked(struct drm_fb_helper *fb_helper) · 5 unmodified lines | |||
| 262 | 262 | ||
| 263 | return ret; | 263 | return ret; |
| 264 | } | 264 | } |
| 265 | |||
| 266 | /** | ||
| 267 | * drm_fb_helper_restore_fbdev_mode_unlocked - restore fbdev configuration | ||
| 268 | * @fb_helper: driver-allocated fbdev helper, can be NULL | ||
| 269 | * | ||
| 270 | * This should be called from driver's drm &drm_driver.lastclose callback | ||
| 271 | * when implementing an fbcon on top of kms using this helper. This ensures that | ||
| 272 | * the user isn't greeted with a black screen when e.g. X dies. | ||
| 273 | * | ||
| 274 | * RETURNS: | ||
| 275 | * Zero if everything went ok, negative error code otherwise. | ||
| 276 | */ | ||
| 277 | int drm_fb_helper_restore_fbdev_mode_unlocked(struct drm_fb_helper *fb_helper) | ||
| 278 | { | ||
| 279 | return __drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper, false); | ||
| 280 | } | ||
| 265 | EXPORT_SYMBOL(drm_fb_helper_restore_fbdev_mode_unlocked); | 281 | EXPORT_SYMBOL(drm_fb_helper_restore_fbdev_mode_unlocked); |
| 266 | 282 | ||
| 267 | #ifdef CONFIG_MAGIC_SYSRQ | 283 | #ifdef CONFIG_MAGIC_SYSRQ |
| @@ -1318,6 +1334,7 @@ int drm_fb_helper_set_par(struct fb_info *info) · 1050 unmodified lines | |||
| 1318 | { | 1334 | { |
| 1319 | struct drm_fb_helper *fb_helper = info->par; | 1335 | struct drm_fb_helper *fb_helper = info->par; |
| 1320 | struct fb_var_screeninfo *var = &info->var; | 1336 | struct fb_var_screeninfo *var = &info->var; |
| 1337 | bool force; | ||
| 1321 | 1338 | ||
| 1322 | if (oops_in_progress) | 1339 | if (oops_in_progress) |
| 1323 | return -EBUSY; | 1340 | return -EBUSY; |
| @@ -1327,7 +1344,25 @@ int drm_fb_helper_set_par(struct fb_info *info) · 3 unmodified lines | |||
| 1327 | return -EINVAL; | 1344 | return -EINVAL; |
| 1328 | } | 1345 | } |
| 1329 | 1346 | ||
| 1330 | drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper); | 1347 | /* |
| 1348 | * Normally we want to make sure that a kms master takes precedence over | ||
| 1349 | * fbdev, to avoid fbdev flickering and occasionally stealing the | ||
| 1350 | * display status. But Xorg first sets the vt back to text mode using | ||
| 1351 | * the KDSET IOCTL with KD_TEXT, and only after that drops the master | ||
| 1352 | * status when exiting. | ||
| 1353 | * | ||
| 1354 | * In the past this was caught by drm_fb_helper_lastclose(), but on | ||
| 1355 | * modern systems where logind always keeps a drm fd open to orchestrate | ||
| 1356 | * the vt switching, this doesn't work. | ||
| 1357 | * | ||
| 1358 | * To not break the userspace ABI we have this special case here, which | ||
| 1359 | * is only used for the above case. Everything else uses the normal | ||
| 1360 | * commit function, which ensures that we never steal the display from | ||
| 1361 | * an active drm master. | ||
| 1362 | */ | ||
| 1363 | force = var->activate & FB_ACTIVATE_KD_TEXT; | ||
| 1364 | |||
| 1365 | __drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper, force); | ||
| 1331 | 1366 | ||
| 1332 | return 0; | 1367 | return 0; |
| 1333 | } | 1368 | } |
| @@ -30,12 +30,6 @@ struct drm_dmi_panel_orientation_data { · 29 unmodified lines | |||
| 30 | int orientation; | 30 | int orientation; |
| 31 | }; | 31 | }; |
| 32 | 32 | ||
| 33 | static const struct drm_dmi_panel_orientation_data acer_s1003 = { | ||
| 34 | .width = 800, | ||
| 35 | .height = 1280, | ||
| 36 | .orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP, | ||
| 37 | }; | ||
| 38 | |||
| 39 | static const struct drm_dmi_panel_orientation_data asus_t100ha = { | 33 | static const struct drm_dmi_panel_orientation_data asus_t100ha = { |
| 40 | .width = 800, | 34 | .width = 800, |
| 41 | .height = 1280, | 35 | .height = 1280, |
| @@ -114,13 +108,19 @@ static const struct dmi_system_id orientation_data[] = { · 72 unmodified lines | |||
| 114 | DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Acer"), | 108 | DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Acer"), |
| 115 | DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "One S1003"), | 109 | DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "One S1003"), |
| 116 | }, | 110 | }, |
| 117 | .driver_data = (void *)&acer_s1003, | 111 | .driver_data = (void *)&lcd800x1280_rightside_up, |
| 118 | }, { /* Asus T100HA */ | 112 | }, { /* Asus T100HA */ |
| 119 | .matches = { | 113 | .matches = { |
| 120 | DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), | 114 | DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), |
| 121 | DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100HAN"), | 115 | DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T100HAN"), |
| 122 | }, | 116 | }, |
| 123 | .driver_data = (void *)&asus_t100ha, | 117 | .driver_data = (void *)&asus_t100ha, |
| 118 | }, { /* Asus T101HA */ | ||
| 119 | .matches = { | ||
| 120 | DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."), | ||
| 121 | DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "T101HA"), | ||
| 122 | }, | ||
| 123 | .driver_data = (void *)&lcd800x1280_rightside_up, | ||
| 124 | }, { /* GPD MicroPC (generic strings, also match on bios date) */ | 124 | }, { /* GPD MicroPC (generic strings, also match on bios date) */ |
| 125 | .matches = { | 125 | .matches = { |
| 126 | DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Default string"), | 126 | DMI_EXACT_MATCH(DMI_SYS_VENDOR, "Default string"), |
| @@ -61,7 +61,7 @@ static int drm_iommu_attach_device(struct drm_device *drm_dev, · 60 unmodified lines | |||
| 61 | struct device *subdrv_dev, void **dma_priv) | 61 | struct device *subdrv_dev, void **dma_priv) |
| 62 | { | 62 | { |
| 63 | struct exynos_drm_private *priv = drm_dev->dev_private; | 63 | struct exynos_drm_private *priv = drm_dev->dev_private; |
| 64 | int ret; | 64 | int ret = 0; |
| 65 | 65 | ||
| 66 | if (get_dma_ops(priv->dma_dev) != get_dma_ops(subdrv_dev)) { | 66 | if (get_dma_ops(priv->dma_dev) != get_dma_ops(subdrv_dev)) { |
| 67 | DRM_DEV_ERROR(subdrv_dev, "Device %s lacks support for IOMMU\n", | 67 | DRM_DEV_ERROR(subdrv_dev, "Device %s lacks support for IOMMU\n", |
| @@ -92,7 +92,7 @@ static int drm_iommu_attach_device(struct drm_device *drm_dev, · 24 unmodified lines | |||
| 92 | if (ret) | 92 | if (ret) |
| 93 | clear_dma_max_seg_size(subdrv_dev); | 93 | clear_dma_max_seg_size(subdrv_dev); |
| 94 | 94 | ||
| 95 | return 0; | 95 | return ret; |
| 96 | } | 96 | } |
| 97 | 97 | ||
| 98 | /* | 98 | /* |
| @@ -1498,7 +1498,6 @@ static int g2d_probe(struct platform_device *pdev) · 1497 unmodified lines | |||
| 1498 | 1498 | ||
| 1499 | g2d->irq = platform_get_irq(pdev, 0); | 1499 | g2d->irq = platform_get_irq(pdev, 0); |
| 1500 | if (g2d->irq < 0) { | 1500 | if (g2d->irq < 0) { |
| 1501 | dev_err(dev, "failed to get irq\n"); | ||
| 1502 | ret = g2d->irq; | 1501 | ret = g2d->irq; |
| 1503 | goto err_put_clk; | 1502 | goto err_put_clk; |
| 1504 | } | 1503 | } |
| @@ -269,8 +269,10 @@ static void mic_pre_enable(struct drm_bridge *bridge) · 268 unmodified lines | |||
| 269 | goto unlock; | 269 | goto unlock; |
| 270 | 270 | ||
| 271 | ret = pm_runtime_get_sync(mic->dev); | 271 | ret = pm_runtime_get_sync(mic->dev); |
| 272 | if (ret < 0) | 272 | if (ret < 0) { |
| 273 | pm_runtime_put_noidle(mic->dev); | ||
| 273 | goto unlock; | 274 | goto unlock; |
| 275 | } | ||
| 274 | 276 | ||
| 275 | mic_set_path(mic, 1); | 277 | mic_set_path(mic, 1); |
| 276 | 278 | ||
| @@ -307,8 +307,6 @@ static int hibmc_load(struct drm_device *dev) · 306 unmodified lines | |||
| 307 | /* reset all the states of crtc/plane/encoder/connector */ | 307 | /* reset all the states of crtc/plane/encoder/connector */ |
| 308 | drm_mode_config_reset(dev); | 308 | drm_mode_config_reset(dev); |
| 309 | 309 | ||
| 310 | drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth); | ||
| 311 | |||
| 312 | return 0; | 310 | return 0; |
| 313 | 311 | ||
| 314 | err: | 312 | err: |
| @@ -355,6 +353,9 @@ static int hibmc_pci_probe(struct pci_dev *pdev, · 40 unmodified lines | |||
| 355 | ret); | 353 | ret); |
| 356 | goto err_unload; | 354 | goto err_unload; |
| 357 | } | 355 | } |
| 356 | |||
| 357 | drm_fbdev_generic_setup(dev, dev->mode_config.preferred_depth); | ||
| 358 | |||
| 358 | return 0; | 359 | return 0; |
| 359 | 360 | ||
| 360 | err_unload: | 361 | err_unload: |
| @@ -3822,6 +3822,17 @@ skl_check_main_ccs_coordinates(struct intel_plane_state *plane_state, · 3821 unmodified lines | |||
| 3822 | return true; | 3822 | return true; |
| 3823 | } | 3823 | } |
| 3824 | 3824 | ||
| 3825 | unsigned int | ||
| 3826 | intel_plane_fence_y_offset(const struct intel_plane_state *plane_state) | ||
| 3827 | { | ||
| 3828 | int x = 0, y = 0; | ||
| 3829 | |||
| 3830 | intel_plane_adjust_aligned_offset(&x, &y, plane_state, 0, | ||
| 3831 | plane_state->color_plane[0].offset, 0); | ||
| 3832 | |||
| 3833 | return y; | ||
| 3834 | } | ||
| 3835 | |||
| 3825 | static int skl_check_main_surface(struct intel_plane_state *plane_state) | 3836 | static int skl_check_main_surface(struct intel_plane_state *plane_state) |
| 3826 | { | 3837 | { |
| 3827 | struct drm_i915_private *dev_priv = to_i915(plane_state->uapi.plane->dev); | 3838 | struct drm_i915_private *dev_priv = to_i915(plane_state->uapi.plane->dev); |
| @@ -608,6 +608,7 @@ unsigned int i9xx_plane_max_stride(struct intel_plane *plane, · 607 unmodified lines | |||
| 608 | u32 pixel_format, u64 modifier, | 608 | u32 pixel_format, u64 modifier, |
| 609 | unsigned int rotation); | 609 | unsigned int rotation); |
| 610 | int bdw_get_pipemisc_bpp(struct intel_crtc *crtc); | 610 | int bdw_get_pipemisc_bpp(struct intel_crtc *crtc); |
| 611 | unsigned int intel_plane_fence_y_offset(const struct intel_plane_state *plane_state); | ||
| 611 | 612 | ||
| 612 | struct intel_display_error_state * | 613 | struct intel_display_error_state * |
| 613 | intel_display_capture_error_state(struct drm_i915_private *dev_priv); | 614 | intel_display_capture_error_state(struct drm_i915_private *dev_priv); |
| @@ -47,19 +47,6 @@ · 46 unmodified lines | |||
| 47 | #include "intel_fbc.h" | 47 | #include "intel_fbc.h" |
| 48 | #include "intel_frontbuffer.h" | 48 | #include "intel_frontbuffer.h" |
| 49 | 49 | ||
| 50 | /* | ||
| 51 | * In some platforms where the CRTC's x:0/y:0 coordinates doesn't match the | ||
| 52 | * frontbuffer's x:0/y:0 coordinates we lie to the hardware about the plane's | ||
| 53 | * origin so the x and y offsets can actually fit the registers. As a | ||
| 54 | * consequence, the fence doesn't really start exactly at the display plane | ||
| 55 | * address we program because it starts at the real start of the buffer, so we | ||
| 56 | * have to take this into consideration here. | ||
| 57 | */ | ||
| 58 | static unsigned int get_crtc_fence_y_offset(struct intel_fbc *fbc) | ||
| 59 | { | ||
| 60 | return fbc->state_cache.plane.y - fbc->state_cache.plane.adjusted_y; | ||
| 61 | } | ||
| 62 | |||
| 63 | /* | 50 | /* |
| 64 | * For SKL+, the plane source size used by the hardware is based on the value we | 51 | * For SKL+, the plane source size used by the hardware is based on the value we |
| 65 | * write to the PLANE_SIZE register. For BDW-, the hardware looks at the value | 52 | * write to the PLANE_SIZE register. For BDW-, the hardware looks at the value |
| @@ -141,7 +128,7 @@ static void i8xx_fbc_activate(struct drm_i915_private *dev_priv) · 75 unmodified lines | |||
| 141 | fbc_ctl2 |= FBC_CTL_CPU_FENCE; | 128 | fbc_ctl2 |= FBC_CTL_CPU_FENCE; |
| 142 | intel_de_write(dev_priv, FBC_CONTROL2, fbc_ctl2); | 129 | intel_de_write(dev_priv, FBC_CONTROL2, fbc_ctl2); |
| 143 | intel_de_write(dev_priv, FBC_FENCE_OFF, | 130 | intel_de_write(dev_priv, FBC_FENCE_OFF, |
| 144 | params->crtc.fence_y_offset); | 131 | params->fence_y_offset); |
| 145 | } | 132 | } |
| 146 | 133 | ||
| 147 | /* enable it... */ | 134 | /* enable it... */ |
| @@ -175,7 +162,7 @@ static void g4x_fbc_activate(struct drm_i915_private *dev_priv) · 27 unmodified lines | |||
| 175 | if (params->fence_id >= 0) { | 162 | if (params->fence_id >= 0) { |
| 176 | dpfc_ctl |= DPFC_CTL_FENCE_EN | params->fence_id; | 163 | dpfc_ctl |= DPFC_CTL_FENCE_EN | params->fence_id; |
| 177 | intel_de_write(dev_priv, DPFC_FENCE_YOFF, | 164 | intel_de_write(dev_priv, DPFC_FENCE_YOFF, |
| 178 | params->crtc.fence_y_offset); | 165 | params->fence_y_offset); |
| 179 | } else { | 166 | } else { |
| 180 | intel_de_write(dev_priv, DPFC_FENCE_YOFF, 0); | 167 | intel_de_write(dev_priv, DPFC_FENCE_YOFF, 0); |
| 181 | } | 168 | } |
| @@ -243,7 +230,7 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv) · 61 unmodified lines | |||
| 243 | intel_de_write(dev_priv, SNB_DPFC_CTL_SA, | 230 | intel_de_write(dev_priv, SNB_DPFC_CTL_SA, |
| 244 | SNB_CPU_FENCE_ENABLE | params->fence_id); | 231 | SNB_CPU_FENCE_ENABLE | params->fence_id); |
| 245 | intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, | 232 | intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, |
| 246 | params->crtc.fence_y_offset); | 233 | params->fence_y_offset); |
| 247 | } | 234 | } |
| 248 | } else { | 235 | } else { |
| 249 | if (IS_GEN(dev_priv, 6)) { | 236 | if (IS_GEN(dev_priv, 6)) { |
| @@ -253,7 +240,7 @@ static void ilk_fbc_activate(struct drm_i915_private *dev_priv) · 3 unmodified lines | |||
| 253 | } | 240 | } |
| 254 | 241 | ||
| 255 | intel_de_write(dev_priv, ILK_DPFC_FENCE_YOFF, | 242 | intel_de_write(dev_priv, ILK_DPFC_FENCE_YOFF, |
| 256 | params->crtc.fence_y_offset); | 243 | params->fence_y_offset); |
| 257 | /* enable it... */ | 244 | /* enable it... */ |
| 258 | intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); | 245 | intel_de_write(dev_priv, ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); |
| 259 | 246 | ||
| @@ -320,7 +307,7 @@ static void gen7_fbc_activate(struct drm_i915_private *dev_priv) · 60 unmodified lines | |||
| 320 | intel_de_write(dev_priv, SNB_DPFC_CTL_SA, | 307 | intel_de_write(dev_priv, SNB_DPFC_CTL_SA, |
| 321 | SNB_CPU_FENCE_ENABLE | params->fence_id); | 308 | SNB_CPU_FENCE_ENABLE | params->fence_id); |
| 322 | intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, | 309 | intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, |
| 323 | params->crtc.fence_y_offset); | 310 | params->fence_y_offset); |
| 324 | } else if (dev_priv->ggtt.num_fences) { | 311 | } else if (dev_priv->ggtt.num_fences) { |
| 325 | intel_de_write(dev_priv, SNB_DPFC_CTL_SA, 0); | 312 | intel_de_write(dev_priv, SNB_DPFC_CTL_SA, 0); |
| 326 | intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, 0); | 313 | intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, 0); |
| @@ -631,8 +618,8 @@ static bool rotation_is_valid(struct drm_i915_private *dev_priv, · 304 unmodified lines | |||
| 631 | /* | 618 | /* |
| 632 | * For some reason, the hardware tracking starts looking at whatever we | 619 | * For some reason, the hardware tracking starts looking at whatever we |
| 633 | * programmed as the display plane base address register. It does not look at | 620 | * programmed as the display plane base address register. It does not look at |
| 634 | * the X and Y offset registers. That's why we look at the crtc->adjusted{x,y} | 621 | * the X and Y offset registers. That's why we include the src x/y offsets |
| 635 | * variables instead of just looking at the pipe/plane size. | 622 | * instead of just looking at the plane size. |
| 636 | */ | 623 | */ |
| 637 | static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc) | 624 | static bool intel_fbc_hw_tracking_covers_screen(struct intel_crtc *crtc) |
| 638 | { | 625 | { |
| @@ -705,7 +692,6 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc, · 66 unmodified lines | |||
| 705 | cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16; | 692 | cache->plane.src_h = drm_rect_height(&plane_state->uapi.src) >> 16; |
| 706 | cache->plane.adjusted_x = plane_state->color_plane[0].x; | 693 | cache->plane.adjusted_x = plane_state->color_plane[0].x; |
| 707 | cache->plane.adjusted_y = plane_state->color_plane[0].y; | 694 | cache->plane.adjusted_y = plane_state->color_plane[0].y; |
| 708 | cache->plane.y = plane_state->uapi.src.y1 >> 16; | ||
| 709 | 695 | ||
| 710 | cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode; | 696 | cache->plane.pixel_blend_mode = plane_state->hw.pixel_blend_mode; |
| 711 | 697 | ||
| @@ -713,6 +699,8 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc, · 1 unmodified line | |||
| 713 | cache->fb.stride = fb->pitches[0]; | 699 | cache->fb.stride = fb->pitches[0]; |
| 714 | cache->fb.modifier = fb->modifier; | 700 | cache->fb.modifier = fb->modifier; |
| 715 | 701 | ||
| 702 | cache->fence_y_offset = intel_plane_fence_y_offset(plane_state); | ||
| 703 | |||
| 716 | drm_WARN_ON(&dev_priv->drm, plane_state->flags & PLANE_HAS_FENCE && | 704 | drm_WARN_ON(&dev_priv->drm, plane_state->flags & PLANE_HAS_FENCE && |
| 717 | !plane_state->vma->fence); | 705 | !plane_state->vma->fence); |
| 718 | 706 | ||
| @@ -731,6 +719,25 @@ static bool intel_fbc_cfb_size_changed(struct drm_i915_private *dev_priv) · 12 unmodified lines | |||
| 731 | fbc->compressed_fb.size * fbc->threshold; | 719 | fbc->compressed_fb.size * fbc->threshold; |
| 732 | } | 720 | } |
| 733 | 721 | ||
| 722 | static u16 intel_fbc_gen9_wa_cfb_stride(struct drm_i915_private *dev_priv) | ||
| 723 | { | ||
| 724 | struct intel_fbc *fbc = &dev_priv->fbc; | ||
| 725 | struct intel_fbc_state_cache *cache = &fbc->state_cache; | ||
| 726 | |||
| 727 | if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) && | ||
| 728 | cache->fb.modifier != I915_FORMAT_MOD_X_TILED) | ||
| 729 | return DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8; | ||
| 730 | else | ||
| 731 | return 0; | ||
| 732 | } | ||
| 733 | |||
| 734 | static bool intel_fbc_gen9_wa_cfb_stride_changed(struct drm_i915_private *dev_priv) | ||
| 735 | { | ||
| 736 | struct intel_fbc *fbc = &dev_priv->fbc; | ||
| 737 | |||
| 738 | return fbc->params.gen9_wa_cfb_stride != intel_fbc_gen9_wa_cfb_stride(dev_priv); | ||
| 739 | } | ||
| 740 | |||
| 734 | static bool intel_fbc_can_enable(struct drm_i915_private *dev_priv) | 741 | static bool intel_fbc_can_enable(struct drm_i915_private *dev_priv) |
| 735 | { | 742 | { |
| 736 | struct intel_fbc *fbc = &dev_priv->fbc; | 743 | struct intel_fbc *fbc = &dev_priv->fbc; |
| @@ -883,12 +890,13 @@ static void intel_fbc_get_reg_params(struct intel_crtc *crtc, · 146 unmodified lines | |||
| 883 | memset(params, 0, sizeof(*params)); | 890 | memset(params, 0, sizeof(*params)); |
| 884 | 891 | ||
| 885 | params->fence_id = cache->fence_id; | 892 | params->fence_id = cache->fence_id; |
| 893 | params->fence_y_offset = cache->fence_y_offset; | ||
| 886 | 894 | ||
| 887 | params->crtc.pipe = crtc->pipe; | 895 | params->crtc.pipe = crtc->pipe; |
| 888 | params->crtc.i9xx_plane = to_intel_plane(crtc->base.primary)->i9xx_plane; | 896 | params->crtc.i9xx_plane = to_intel_plane(crtc->base.primary)->i9xx_plane; |
| 889 | params->crtc.fence_y_offset = get_crtc_fence_y_offset(fbc); | ||
| 890 | 897 | ||
| 891 | params->fb.format = cache->fb.format; | 898 | params->fb.format = cache->fb.format; |
| 899 | params->fb.modifier = cache->fb.modifier; | ||
| 892 | params->fb.stride = cache->fb.stride; | 900 | params->fb.stride = cache->fb.stride; |
| 893 | 901 | ||
| 894 | params->cfb_size = intel_fbc_calculate_cfb_size(dev_priv, cache); | 902 | params->cfb_size = intel_fbc_calculate_cfb_size(dev_priv, cache); |
| @@ -918,6 +926,9 @@ static bool intel_fbc_can_flip_nuke(const struct intel_crtc_state *crtc_state) · 23 unmodified lines | |||
| 918 | if (params->fb.format != cache->fb.format) | 926 | if (params->fb.format != cache->fb.format) |
| 919 | return false; | 927 | return false; |
| 920 | 928 | ||
| 929 | if (params->fb.modifier != cache->fb.modifier) | ||
| 930 | return false; | ||
| 931 | |||
| 921 | if (params->fb.stride != cache->fb.stride) | 932 | if (params->fb.stride != cache->fb.stride) |
| 922 | return false; | 933 | return false; |
| 923 | 934 | ||
| @@ -1197,7 +1208,8 @@ void intel_fbc_enable(struct intel_atomic_state *state, · 273 unmodified lines | |||
| 1197 | 1208 | ||
| 1198 | if (fbc->crtc) { | 1209 | if (fbc->crtc) { |
| 1199 | if (fbc->crtc != crtc || | 1210 | if (fbc->crtc != crtc || |
| 1200 | !intel_fbc_cfb_size_changed(dev_priv)) | 1211 | (!intel_fbc_cfb_size_changed(dev_priv) && |
| 1212 | !intel_fbc_gen9_wa_cfb_stride_changed(dev_priv))) | ||
| 1201 | goto out; | 1213 | goto out; |
| 1202 | 1214 | ||
| 1203 | __intel_fbc_disable(dev_priv); | 1215 | __intel_fbc_disable(dev_priv); |
| @@ -1219,12 +1231,7 @@ void intel_fbc_enable(struct intel_atomic_state *state, · 15 unmodified lines | |||
| 1219 | goto out; | 1231 | goto out; |
| 1220 | } | 1232 | } |
| 1221 | 1233 | ||
| 1222 | if ((IS_GEN9_BC(dev_priv) || IS_BROXTON(dev_priv)) && | 1234 | cache->gen9_wa_cfb_stride = intel_fbc_gen9_wa_cfb_stride(dev_priv); |
| 1223 | plane_state->hw.fb->modifier != I915_FORMAT_MOD_X_TILED) | ||
| 1224 | cache->gen9_wa_cfb_stride = | ||
| 1225 | DIV_ROUND_UP(cache->plane.src_w, 32 * fbc->threshold) * 8; | ||
| 1226 | else | ||
| 1227 | cache->gen9_wa_cfb_stride = 0; | ||
| 1228 | 1235 | ||
| 1229 | drm_dbg_kms(&dev_priv->drm, "Enabling FBC on pipe %c\n", | 1236 | drm_dbg_kms(&dev_priv->drm, "Enabling FBC on pipe %c\n", |
| 1230 | pipe_name(crtc->pipe)); | 1237 | pipe_name(crtc->pipe)); |
| @@ -2867,19 +2867,13 @@ intel_hdmi_connector_register(struct drm_connector *connector) · 2866 unmodified lines | |||
| 2867 | return ret; | 2867 | return ret; |
| 2868 | } | 2868 | } |
| 2869 | 2869 | ||
| 2870 | static void intel_hdmi_destroy(struct drm_connector *connector) | 2870 | static void intel_hdmi_connector_unregister(struct drm_connector *connector) |
| 2871 | { | 2871 | { |
| 2872 | struct cec_notifier *n = intel_attached_hdmi(to_intel_connector(connector))->cec_notifier; | 2872 | struct cec_notifier *n = intel_attached_hdmi(to_intel_connector(connector))->cec_notifier; |
| 2873 | 2873 | ||
| 2874 | cec_notifier_conn_unregister(n); | 2874 | cec_notifier_conn_unregister(n); |
| 2875 | 2875 | ||
| 2876 | intel_connector_destroy(connector); | ||
| 2877 | } | ||
| 2878 | |||
| 2879 | static void intel_hdmi_connector_unregister(struct drm_connector *connector) | ||
| 2880 | { | ||
| 2881 | intel_hdmi_remove_i2c_symlink(connector); | 2876 | intel_hdmi_remove_i2c_symlink(connector); |
| 2882 | |||
| 2883 | intel_connector_unregister(connector); | 2877 | intel_connector_unregister(connector); |
| 2884 | } | 2878 | } |
| 2885 | 2879 | ||
| @@ -2891,7 +2885,7 @@ static const struct drm_connector_funcs intel_hdmi_connector_funcs = { · 5 unmodified lines | |||
| 2891 | .atomic_set_property = intel_digital_connector_atomic_set_property, | 2885 | .atomic_set_property = intel_digital_connector_atomic_set_property, |
| 2892 | .late_register = intel_hdmi_connector_register, | 2886 | .late_register = intel_hdmi_connector_register, |
| 2893 | .early_unregister = intel_hdmi_connector_unregister, | 2887 | .early_unregister = intel_hdmi_connector_unregister, |
| 2894 | .destroy = intel_hdmi_destroy, | 2888 | .destroy = intel_connector_destroy, |
| 2895 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, | 2889 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
| 2896 | .atomic_duplicate_state = intel_digital_connector_duplicate_state, | 2890 | .atomic_duplicate_state = intel_digital_connector_duplicate_state, |
| 2897 | }; | 2891 | }; |
| @@ -204,25 +204,25 @@ static int __ring_active(struct intel_ring *ring) · 203 unmodified lines | |||
| 204 | { | 204 | { |
| 205 | int err; | 205 | int err; |
| 206 | 206 | ||
| 207 | err = i915_active_acquire(&ring->vma->active); | 207 | err = intel_ring_pin(ring); |
| 208 | if (err) | 208 | if (err) |
| 209 | return err; | 209 | return err; |
| 210 | 210 | ||
| 211 | err = intel_ring_pin(ring); | 211 | err = i915_active_acquire(&ring->vma->active); |
| 212 | if (err) | 212 | if (err) |
| 213 | goto err_active; | 213 | goto err_pin; |
| 214 | 214 | ||
| 215 | return 0; | 215 | return 0; |
| 216 | 216 | ||
| 217 | err_active: | 217 | err_pin: |
| 218 | i915_active_release(&ring->vma->active); | 218 | intel_ring_unpin(ring); |
| 219 | return err; | 219 | return err; |
| 220 | } | 220 | } |
| 221 | 221 | ||
| 222 | static void __ring_retire(struct intel_ring *ring) | 222 | static void __ring_retire(struct intel_ring *ring) |
| 223 | { | 223 | { |
| 224 | intel_ring_unpin(ring); | ||
| 225 | i915_active_release(&ring->vma->active); | 224 | i915_active_release(&ring->vma->active); |
| 225 | intel_ring_unpin(ring); | ||
| 226 | } | 226 | } |
| 227 | 227 | ||
| 228 | __i915_active_call | 228 | __i915_active_call |
| @@ -5396,13 +5396,8 @@ static void virtual_engine_initial_hint(struct virtual_engine *ve) · 5395 unmodified lines | |||
| 5396 | * typically be the first we inspect for submission. | 5396 | * typically be the first we inspect for submission. |
| 5397 | */ | 5397 | */ |
| 5398 | swp = prandom_u32_max(ve->num_siblings); | 5398 | swp = prandom_u32_max(ve->num_siblings); |
| 5399 | if (!swp) | 5399 | if (swp) |
| 5400 | return; | 5400 | swap(ve->siblings[swp], ve->siblings[0]); |
| 5401 | |||
| 5402 | swap(ve->siblings[swp], ve->siblings[0]); | ||
| 5403 | if (!intel_engine_has_relative_mmio(ve->siblings[0])) | ||
| 5404 | virtual_update_register_offsets(ve->context.lrc_reg_state, | ||
| 5405 | ve->siblings[0]); | ||
| 5406 | } | 5401 | } |
| 5407 | 5402 | ||
| 5408 | static int virtual_context_alloc(struct intel_context *ce) | 5403 | static int virtual_context_alloc(struct intel_context *ce) |
| @@ -5415,15 +5410,9 @@ static int virtual_context_alloc(struct intel_context *ce) · 6 unmodified lines | |||
| 5415 | static int virtual_context_pin(struct intel_context *ce) | 5410 | static int virtual_context_pin(struct intel_context *ce) |
| 5416 | { | 5411 | { |
| 5417 | struct virtual_engine *ve = container_of(ce, typeof(*ve), context); | 5412 | struct virtual_engine *ve = container_of(ce, typeof(*ve), context); |
| 5418 | int err; | ||
| 5419 | 5413 | ||
| 5420 | /* Note: we must use a real engine class for setting up reg state */ | 5414 | /* Note: we must use a real engine class for setting up reg state */ |
| 5421 | err = __execlists_context_pin(ce, ve->siblings[0]); | 5415 | return __execlists_context_pin(ce, ve->siblings[0]); |
| 5422 | if (err) | ||
| 5423 | return err; | ||
| 5424 | |||
| 5425 | virtual_engine_initial_hint(ve); | ||
| 5426 | return 0; | ||
| 5427 | } | 5416 | } |
| 5428 | 5417 | ||
| 5429 | static void virtual_context_enter(struct intel_context *ce) | 5418 | static void virtual_context_enter(struct intel_context *ce) |
| @@ -5688,6 +5677,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings, · 258 unmodified lines | |||
| 5688 | intel_engine_init_active(&ve->base, ENGINE_VIRTUAL); | 5677 | intel_engine_init_active(&ve->base, ENGINE_VIRTUAL); |
| 5689 | intel_engine_init_breadcrumbs(&ve->base); | 5678 | intel_engine_init_breadcrumbs(&ve->base); |
| 5690 | intel_engine_init_execlists(&ve->base); | 5679 | intel_engine_init_execlists(&ve->base); |
| 5680 | ve->base.breadcrumbs.irq_armed = true; /* fake HW, used for irq_work */ | ||
| 5691 | 5681 | ||
| 5692 | ve->base.cops = &virtual_context_ops; | 5682 | ve->base.cops = &virtual_context_ops; |
| 5693 | ve->base.request_alloc = execlists_request_alloc; | 5683 | ve->base.request_alloc = execlists_request_alloc; |
| @@ -5769,6 +5759,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings, · 75 unmodified lines | |||
| 5769 | 5759 | ||
| 5770 | ve->base.flags |= I915_ENGINE_IS_VIRTUAL; | 5760 | ve->base.flags |= I915_ENGINE_IS_VIRTUAL; |
| 5771 | 5761 | ||
| 5762 | virtual_engine_initial_hint(ve); | ||
| 5772 | return &ve->context; | 5763 | return &ve->context; |
| 5773 | 5764 | ||
| 5774 | err_put: | 5765 | err_put: |
| @@ -44,9 +44,9 @@ static int cmp_u64(const void *A, const void *B) · 43 unmodified lines | |||
| 44 | { | 44 | { |
| 45 | const u64 *a = A, *b = B; | 45 | const u64 *a = A, *b = B; |
| 46 | 46 | ||
| 47 | if (a < b) | 47 | if (*a < *b) |
| 48 | return -1; | 48 | return -1; |
| 49 | else if (a > b) | 49 | else if (*a > *b) |
| 50 | return 1; | 50 | return 1; |
| 51 | else | 51 | else |
| 52 | return 0; | 52 | return 0; |
| @@ -56,9 +56,9 @@ static int cmp_u32(const void *A, const void *B) · 3 unmodified lines | |||
| 56 | { | 56 | { |
| 57 | const u32 *a = A, *b = B; | 57 | const u32 *a = A, *b = B; |
| 58 | 58 | ||
| 59 | if (a < b) | 59 | if (*a < *b) |
| 60 | return -1; | 60 | return -1; |
| 61 | else if (a > b) | 61 | else if (*a > *b) |
| 62 | return 1; | 62 | return 1; |
| 63 | else | 63 | else |
| 64 | return 0; | 64 | return 0; |
| @@ -0,0 +1,46 @@ | |||
| 1 | ASM sources for auto generated shaders | ||
| 2 | ====================================== | ||
| 3 | |||
| 4 | The i915/gt/hsw_clear_kernel.c and i915/gt/ivb_clear_kernel.c files contain | ||
| 5 | pre-compiled batch chunks that will clear any residual render cache during | ||
| 6 | context switch. | ||
| 7 | |||
| 8 | They are generated from their respective platform ASM files present on | ||
| 9 | i915/gt/shaders/clear_kernel directory. | ||
| 10 | |||
| 11 | The generated .c files should never be modified directly. Instead, any modification | ||
| 12 | needs to be done on the on their respective ASM files and build instructions below | ||
| 13 | needes to be followed. | ||
| 14 | |||
| 15 | Building | ||
| 16 | ======== | ||
| 17 | |||
| 18 | Environment | ||
| 19 | ----------- | ||
| 20 | |||
| 21 | IGT GPU tool scripts and the Mesa's i965 instruction assembler tool are used | ||
| 22 | on building. | ||
| 23 | |||
| 24 | Please make sure your Mesa tool is compiled with "-Dtools=intel" and | ||
| 25 | "-Ddri-drivers=i965", and run this script from IGT source root directory" | ||
| 26 | |||
| 27 | The instructions bellow assume: | ||
| 28 | * IGT gpu tools source code is located on your home directory (~) as ~/igt | ||
| 29 | * Mesa source code is located on your home directory (~) as ~/mesa | ||
| 30 | and built under the ~/mesa/build directory | ||
| 31 | * Linux kernel source code is under your home directory (~) as ~/linux | ||
| 32 | |||
| 33 | Instructions | ||
| 34 | ------------ | ||
| 35 | |||
| 36 | ~ $ cp ~/linux/drivers/gpu/drm/i915/gt/shaders/clear_kernel/ivb.asm \ | ||
| 37 | ~/igt/lib/i915/shaders/clear_kernel/ivb.asm | ||
| 38 | ~ $ cd ~/igt | ||
| 39 | igt $ ./scripts/generate_clear_kernel.sh -g ivb \ | ||
| 40 | -m ~/mesa/build/src/intel/tools/i965_asm | ||
| 41 | |||
| 42 | ~ $ cp ~/linux/drivers/gpu/drm/i915/gt/shaders/clear_kernel/hsw.asm \ | ||
| 43 | ~/igt/lib/i915/shaders/clear_kernel/hsw.asm | ||
| 44 | ~ $ cd ~/igt | ||
| 45 | igt $ ./scripts/generate_clear_kernel.sh -g hsw \ | ||
| 46 | -m ~/mesa/build/src/intel/tools/i965_asm | ||
| @@ -0,0 +1,119 @@ | |||
| 1 | // SPDX-License-Identifier: MIT | ||
| 2 | /* | ||
| 3 | * Copyright © 2020 Intel Corporation | ||
| 4 | */ | ||
| 5 | |||
| 6 | /* | ||
| 7 | * Kernel for PAVP buffer clear. | ||
| 8 | * | ||
| 9 | * 1. Clear all 64 GRF registers assigned to the kernel with designated value; | ||
| 10 | * 2. Write 32x16 block of all "0" to render target buffer which indirectly clears | ||
| 11 | * 512 bytes of Render Cache. | ||
| 12 | */ | ||
| 13 | |||
| 14 | /* Store designated "clear GRF" value */ | ||
| 15 | mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N }; | ||
| 16 | |||
| 17 | /** | ||
| 18 | * Curbe Format | ||
| 19 | * | ||
| 20 | * DW 1.0 - Block Offset to write Render Cache | ||
| 21 | * DW 1.1 [15:0] - Clear Word | ||
| 22 | * DW 1.2 - Delay iterations | ||
| 23 | * DW 1.3 - Enable Instrumentation (only for debug) | ||
| 24 | * DW 1.4 - Rsvd (intended for context ID) | ||
| 25 | * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount | ||
| 26 | * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count) | ||
| 27 | * DW 1.7 - Rsvd MBZ (inteded for Total Thread Count) | ||
| 28 | * | ||
| 29 | * Binding Table | ||
| 30 | * | ||
| 31 | * BTI 0: 2D Surface to help clear L3 (Render/Data Cache) | ||
| 32 | * BTI 1: Wait/Instrumentation Buffer | ||
| 33 | * Size : (SliceCount * SubSliceCount * 16 EUs/SubSlice) rows * (16 threads/EU) cols (Format R32_UINT) | ||
| 34 | * Expected to be initialized to 0 by driver/another kernel | ||
| 35 | * Layout: | ||
| 36 | * RowN: Histogram for EU-N: (SliceID*SubSlicePerSliceCount + SSID)*16 + EUID [assume max 16 EUs / SS] | ||
| 37 | * Col-k[DW-k]: Threads Executed on ThreadID-k for EU-N | ||
| 38 | */ | ||
| 39 | add(1) g1.2<1>UD g1.2<0,1,0>UD 0x00000001UD { align1 1N }; /* Loop count to delay kernel: Init to (g1.2 + 1) */ | ||
| 40 | cmp.z.f0.0(1) null<1>UD g1.3<0,1,0>UD 0x00000000UD { align1 1N }; | ||
| 41 | (+f0.0) jmpi(1) 352D { align1 WE_all 1N }; | ||
| 42 | |||
| 43 | /** | ||
| 44 | * State Register has info on where this thread is running | ||
| 45 | * IVB: sr0.0 :: [15:13]: MBZ, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID | ||
| 46 | * HSW: sr0.0 :: 15: MBZ, [14:13]: SliceID, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID | ||
| 47 | */ | ||
| 48 | mov(8) g3<1>UD 0x00000000UD { align1 1Q }; | ||
| 49 | shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N }; | ||
| 50 | and(1) g3<1>D g3<0,1,0>D 1D { align1 1N }; /* g3 has HSID */ | ||
| 51 | shr(1) g3.1<1>D sr0<0,1,0>D 13D { align1 1N }; | ||
| 52 | and(1) g3.1<1>D g3.1<0,1,0>D 3D { align1 1N }; /* g3.1 has sliceID */ | ||
| 53 | mul(1) g3.5<1>D g3.1<0,1,0>D g1.10<0,1,0>UW { align1 1N }; | ||
| 54 | add(1) g3<1>D g3<0,1,0>D g3.5<0,1,0>D { align1 1N }; /* g3 = sliceID * SubSlicePerSliceCount + HSID */ | ||
| 55 | shr(1) g3.2<1>D sr0<0,1,0>D 8D { align1 1N }; | ||
| 56 | and(1) g3.2<1>D g3.2<0,1,0>D 15D { align1 1N }; /* g3.2 = EUID */ | ||
| 57 | mul(1) g3.4<1>D g3<0,1,0>D 16D { align1 1N }; | ||
| 58 | add(1) g3.2<1>D g3.2<0,1,0>D g3.4<0,1,0>D { align1 1N }; /* g3.2 now points to EU row number (Y-pixel = V address ) in instrumentation surf */ | ||
| 59 | |||
| 60 | mov(8) g5<1>UD 0x00000000UD { align1 1Q }; | ||
| 61 | and(1) g3.3<1>D sr0<0,1,0>D 7D { align1 1N }; | ||
| 62 | mul(1) g3.3<1>D g3.3<0,1,0>D 4D { align1 1N }; | ||
| 63 | |||
| 64 | mov(8) g4<1>UD g0<8,8,1>UD { align1 1Q }; /* Initialize message header with g0 */ | ||
| 65 | mov(1) g4<1>UD g3.3<0,1,0>UD { align1 1N }; /* Block offset */ | ||
| 66 | mov(1) g4.1<1>UD g3.2<0,1,0>UD { align1 1N }; /* Block offset */ | ||
| 67 | mov(1) g4.2<1>UD 0x00000003UD { align1 1N }; /* Block size (1 row x 4 bytes) */ | ||
| 68 | and(1) g4.3<1>UD g4.3<0,1,0>UW 0xffffffffUD { align1 1N }; | ||
| 69 | |||
| 70 | /* Media block read to fetch current value at specified location in instrumentation buffer */ | ||
| 71 | sendc(8) g5<1>UD g4<8,8,1>F 0x02190001 | ||
| 72 | |||
| 73 | render MsgDesc: media block read MsgCtrl = 0x0 Surface = 1 mlen 1 rlen 1 { align1 1Q }; | ||
| 74 | add(1) g5<1>D g5<0,1,0>D 1D { align1 1N }; | ||
| 75 | |||
| 76 | /* Media block write for updated value at specified location in instrumentation buffer */ | ||
| 77 | sendc(8) g5<1>UD g4<8,8,1>F 0x040a8001 | ||
| 78 | render MsgDesc: media block write MsgCtrl = 0x0 Surface = 1 mlen 2 rlen 0 { align1 1Q }; | ||
| 79 | |||
| 80 | /* Delay thread for specified parameter */ | ||
| 81 | add.nz.f0.0(1) g1.2<1>UD g1.2<0,1,0>UD -1D { align1 1N }; | ||
| 82 | (+f0.0) jmpi(1) -32D { align1 WE_all 1N }; | ||
| 83 | |||
| 84 | /* Store designated "clear GRF" value */ | ||
| 85 | mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N }; | ||
| 86 | |||
| 87 | /* Initialize looping parameters */ | ||
| 88 | mov(1) a0<1>D 0D { align1 1N }; /* Initialize a0.0:w=0 */ | ||
| 89 | mov(1) a0.4<1>W 127W { align1 1N }; /* Loop count. Each loop contains 16 GRF's */ | ||
| 90 | |||
| 91 | /* Write 32x16 all "0" block */ | ||
| 92 | mov(8) g2<1>UD g0<8,8,1>UD { align1 1Q }; | ||
| 93 | mov(8) g127<1>UD g0<8,8,1>UD { align1 1Q }; | ||
| 94 | mov(2) g2<1>UD g1<2,2,1>UW { align1 1N }; | ||
| 95 | mov(1) g2.2<1>UD 0x000f000fUD { align1 1N }; /* Block size (16x16) */ | ||
| 96 | and(1) g2.3<1>UD g2.3<0,1,0>UW 0xffffffefUD { align1 1N }; | ||
| 97 | mov(16) g3<1>UD 0x00000000UD { align1 1H }; | ||
| 98 | mov(16) g4<1>UD 0x00000000UD { align1 1H }; | ||
| 99 | mov(16) g5<1>UD 0x00000000UD { align1 1H }; | ||
| 100 | mov(16) g6<1>UD 0x00000000UD { align1 1H }; | ||
| 101 | mov(16) g7<1>UD 0x00000000UD { align1 1H }; | ||
| 102 | mov(16) g8<1>UD 0x00000000UD { align1 1H }; | ||
| 103 | mov(16) g9<1>UD 0x00000000UD { align1 1H }; | ||
| 104 | mov(16) g10<1>UD 0x00000000UD { align1 1H }; | ||
| 105 | sendc(8) null<1>UD g2<8,8,1>F 0x120a8000 | ||
| 106 | render MsgDesc: media block write MsgCtrl = 0x0 Surface = 0 mlen 9 rlen 0 { align1 1Q }; | ||
| 107 | add(1) g2<1>UD g1<0,1,0>UW 0x0010UW { align1 1N }; | ||
| 108 | sendc(8) null<1>UD g2<8,8,1>F 0x120a8000 | ||
| 109 | render MsgDesc: media block write MsgCtrl = 0x0 Surface = 0 mlen 9 rlen 0 { align1 1Q }; | ||
| 110 | |||
| 111 | /* Now, clear all GRF registers */ | ||
| 112 | add.nz.f0.0(1) a0.4<1>W a0.4<0,1,0>W -1W { align1 1N }; | ||
| 113 | mov(16) g[a0]<1>UW f0.1<0,1,0>UW { align1 1H }; | ||
| 114 | add(1) a0<1>D a0<0,1,0>D 32D { align1 1N }; | ||
| 115 | (+f0.0) jmpi(1) -64D { align1 WE_all 1N }; | ||
| 116 | |||
| 117 | /* Terminante the thread */ | ||
| 118 | sendc(8) null<1>UD g127<8,8,1>F 0x82000010 | ||
| 119 | thread_spawner MsgDesc: mlen 1 rlen 0 { align1 1Q EOT }; | ||
| @@ -0,0 +1,117 @@ | |||
| 1 | // SPDX-License-Identifier: MIT | ||
| 2 | /* | ||
| 3 | * Copyright © 2020 Intel Corporation | ||
| 4 | */ | ||
| 5 | |||
| 6 | /* | ||
| 7 | * Kernel for PAVP buffer clear. | ||
| 8 | * | ||
| 9 | * 1. Clear all 64 GRF registers assigned to the kernel with designated value; | ||
| 10 | * 2. Write 32x16 block of all "0" to render target buffer which indirectly clears | ||
| 11 | * 512 bytes of Render Cache. | ||
| 12 | */ | ||
| 13 | |||
| 14 | /* Store designated "clear GRF" value */ | ||
| 15 | mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N }; | ||
| 16 | |||
| 17 | /** | ||
| 18 | * Curbe Format | ||
| 19 | * | ||
| 20 | * DW 1.0 - Block Offset to write Render Cache | ||
| 21 | * DW 1.1 [15:0] - Clear Word | ||
| 22 | * DW 1.2 - Delay iterations | ||
| 23 | * DW 1.3 - Enable Instrumentation (only for debug) | ||
| 24 | * DW 1.4 - Rsvd (intended for context ID) | ||
| 25 | * DW 1.5 - [31:16]:SliceCount, [15:0]:SubSlicePerSliceCount | ||
| 26 | * DW 1.6 - Rsvd MBZ (intended for Enable Wait on Total Thread Count) | ||
| 27 | * DW 1.7 - Rsvd MBZ (inteded for Total Thread Count) | ||
| 28 | * | ||
| 29 | * Binding Table | ||
| 30 | * | ||
| 31 | * BTI 0: 2D Surface to help clear L3 (Render/Data Cache) | ||
| 32 | * BTI 1: Wait/Instrumentation Buffer | ||
| 33 | * Size : (SliceCount * SubSliceCount * 16 EUs/SubSlice) rows * (16 threads/EU) cols (Format R32_UINT) | ||
| 34 | * Expected to be initialized to 0 by driver/another kernel | ||
| 35 | * Layout : | ||
| 36 | * RowN: Histogram for EU-N: (SliceID*SubSlicePerSliceCount + SSID)*16 + EUID [assume max 16 EUs / SS] | ||
| 37 | * Col-k[DW-k]: Threads Executed on ThreadID-k for EU-N | ||
| 38 | */ | ||
| 39 | add(1) g1.2<1>UD g1.2<0,1,0>UD 0x00000001UD { align1 1N }; /* Loop count to delay kernel: Init to (g1.2 + 1) */ | ||
| 40 | cmp.z.f0.0(1) null<1>UD g1.3<0,1,0>UD 0x00000000UD { align1 1N }; | ||
| 41 | (+f0.0) jmpi(1) 44D { align1 WE_all 1N }; | ||
| 42 | |||
| 43 | /** | ||
| 44 | * State Register has info on where this thread is running | ||
| 45 | * IVB: sr0.0 :: [15:13]: MBZ, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID | ||
| 46 | * HSW: sr0.0 :: 15: MBZ, [14:13]: SliceID, 12: HSID (Half-Slice ID), [11:8]EUID, [2:0] ThreadSlotID | ||
| 47 | */ | ||
| 48 | mov(8) g3<1>UD 0x00000000UD { align1 1Q }; | ||
| 49 | shr(1) g3<1>D sr0<0,1,0>D 12D { align1 1N }; | ||
| 50 | and(1) g3<1>D g3<0,1,0>D 1D { align1 1N }; /* g3 has HSID */ | ||
| 51 | shr(1) g3.1<1>D sr0<0,1,0>D 13D { align1 1N }; | ||
| 52 | and(1) g3.1<1>D g3.1<0,1,0>D 3D { align1 1N }; /* g3.1 has sliceID */ | ||
| 53 | mul(1) g3.5<1>D g3.1<0,1,0>D g1.10<0,1,0>UW { align1 1N }; | ||
| 54 | add(1) g3<1>D g3<0,1,0>D g3.5<0,1,0>D { align1 1N }; /* g3 = sliceID * SubSlicePerSliceCount + HSID */ | ||
| 55 | shr(1) g3.2<1>D sr0<0,1,0>D 8D { align1 1N }; | ||
| 56 | and(1) g3.2<1>D g3.2<0,1,0>D 15D { align1 1N }; /* g3.2 = EUID */ | ||
| 57 | mul(1) g3.4<1>D g3<0,1,0>D 16D { align1 1N }; | ||
| 58 | add(1) g3.2<1>D g3.2<0,1,0>D g3.4<0,1,0>D { align1 1N }; /* g3.2 now points to EU row number (Y-pixel = V address ) in instrumentation surf */ | ||
| 59 | |||
| 60 | mov(8) g5<1>UD 0x00000000UD { align1 1Q }; | ||
| 61 | and(1) g3.3<1>D sr0<0,1,0>D 7D { align1 1N }; | ||
| 62 | mul(1) g3.3<1>D g3.3<0,1,0>D 4D { align1 1N }; | ||
| 63 | |||
| 64 | mov(8) g4<1>UD g0<8,8,1>UD { align1 1Q }; /* Initialize message header with g0 */ | ||
| 65 | mov(1) g4<1>UD g3.3<0,1,0>UD { align1 1N }; /* Block offset */ | ||
| 66 | mov(1) g4.1<1>UD g3.2<0,1,0>UD { align1 1N }; /* Block offset */ | ||
| 67 | mov(1) g4.2<1>UD 0x00000003UD { align1 1N }; /* Block size (1 row x 4 bytes) */ | ||
| 68 | and(1) g4.3<1>UD g4.3<0,1,0>UW 0xffffffffUD { align1 1N }; | ||
| 69 | |||
| 70 | /* Media block read to fetch current value at specified location in instrumentation buffer */ | ||
| 71 | sendc(8) g5<1>UD g4<8,8,1>F 0x02190001 | ||
| 72 | render MsgDesc: media block read MsgCtrl = 0x0 Surface = 1 mlen 1 rlen 1 { align1 1Q }; | ||
| 73 | add(1) g5<1>D g5<0,1,0>D 1D { align1 1N }; | ||
| 74 | |||
| 75 | /* Media block write for updated value at specified location in instrumentation buffer */ | ||
| 76 | sendc(8) g5<1>UD g4<8,8,1>F 0x040a8001 | ||
| 77 | render MsgDesc: media block write MsgCtrl = 0x0 Surface = 1 mlen 2 rlen 0 { align1 1Q }; | ||
| 78 | /* Delay thread for specified parameter */ | ||
| 79 | add.nz.f0.0(1) g1.2<1>UD g1.2<0,1,0>UD -1D { align1 1N }; | ||
| 80 | (+f0.0) jmpi(1) -4D { align1 WE_all 1N }; | ||
| 81 | |||
| 82 | /* Store designated "clear GRF" value */ | ||
| 83 | mov(1) f0.1<1>UW g1.2<0,1,0>UW { align1 1N }; | ||
| 84 | |||
| 85 | /* Initialize looping parameters */ | ||
| 86 | mov(1) a0<1>D 0D { align1 1N }; /* Initialize a0.0:w=0 */ | ||
| 87 | mov(1) a0.4<1>W 127W { align1 1N }; /* Loop count. Each loop contains 16 GRF's */ | ||
| 88 | |||
| 89 | /* Write 32x16 all "0" block */ | ||
| 90 | mov(8) g2<1>UD g0<8,8,1>UD { align1 1Q }; | ||
| 91 | mov(8) g127<1>UD g0<8,8,1>UD { align1 1Q }; | ||
| 92 | mov(2) g2<1>UD g1<2,2,1>UW { align1 1N }; | ||
| 93 | mov(1) g2.2<1>UD 0x000f000fUD { align1 1N }; /* Block size (16x16) */ | ||
| 94 | and(1) g2.3<1>UD g2.3<0,1,0>UW 0xffffffefUD { align1 1N }; | ||
| 95 | mov(16) g3<1>UD 0x00000000UD { align1 1H }; | ||
| 96 | mov(16) g4<1>UD 0x00000000UD { align1 1H }; | ||
| 97 | mov(16) g5<1>UD 0x00000000UD { align1 1H }; | ||
| 98 | mov(16) g6<1>UD 0x00000000UD { align1 1H }; | ||
| 99 | mov(16) g7<1>UD 0x00000000UD { align1 1H }; | ||
| 100 | mov(16) g8<1>UD 0x00000000UD { align1 1H }; | ||
| 101 | mov(16) g9<1>UD 0x00000000UD { align1 1H }; | ||
| 102 | mov(16) g10<1>UD 0x00000000UD { align1 1H }; | ||
| 103 | sendc(8) null<1>UD g2<8,8,1>F 0x120a8000 | ||
| 104 | render MsgDesc: media block write MsgCtrl = 0x0 Surface = 0 mlen 9 rlen 0 { align1 1Q }; | ||
| 105 | add(1) g2<1>UD g1<0,1,0>UW 0x0010UW { align1 1N }; | ||
| 106 | sendc(8) null<1>UD g2<8,8,1>F 0x120a8000 | ||
| 107 | render MsgDesc: media block write MsgCtrl = 0x0 Surface = 0 mlen 9 rlen 0 { align1 1Q }; | ||
| 108 | |||
| 109 | /* Now, clear all GRF registers */ | ||
| 110 | add.nz.f0.0(1) a0.4<1>W a0.4<0,1,0>W -1W { align1 1N }; | ||
| 111 | mov(16) g[a0]<1>UW f0.1<0,1,0>UW { align1 1H }; | ||
| 112 | add(1) a0<1>D a0<0,1,0>D 32D { align1 1N }; | ||
| 113 | (+f0.0) jmpi(1) -8D { align1 WE_all 1N }; | ||
| 114 | |||
| 115 | /* Terminante the thread */ | ||
| 116 | sendc(8) null<1>UD g127<8,8,1>F 0x82000010 | ||
| 117 | thread_spawner MsgDesc: mlen 1 rlen 0 { align1 1Q EOT }; | ||
| @@ -66,7 +66,7 @@ static inline int mmio_diff_handler(struct intel_gvt *gvt, · 65 unmodified lines | |||
| 66 | vreg = vgpu_vreg(param->vgpu, offset); | 66 | vreg = vgpu_vreg(param->vgpu, offset); |
| 67 | 67 | ||
| 68 | if (preg != vreg) { | 68 | if (preg != vreg) { |
| 69 | node = kmalloc(sizeof(*node), GFP_KERNEL); | 69 | node = kmalloc(sizeof(*node), GFP_ATOMIC); |
| 70 | if (!node) | 70 | if (!node) |
| 71 | return -ENOMEM; | 71 | return -ENOMEM; |
| 72 | 72 | ||
| @@ -1726,13 +1726,13 @@ static int ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, · 1725 unmodified lines | |||
| 1726 | (*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(2); | 1726 | (*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(2); |
| 1727 | write_vreg(vgpu, offset, p_data, bytes); | 1727 | write_vreg(vgpu, offset, p_data, bytes); |
| 1728 | 1728 | ||
| 1729 | if (data & _MASKED_BIT_ENABLE(1)) { | 1729 | if (IS_MASKED_BITS_ENABLED(data, 1)) { |
| 1730 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST); | 1730 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST); |
| 1731 | return 0; | 1731 | return 0; |
| 1732 | } | 1732 | } |
| 1733 | 1733 | ||
| 1734 | if (IS_COFFEELAKE(vgpu->gvt->gt->i915) && | 1734 | if (IS_COFFEELAKE(vgpu->gvt->gt->i915) && |
| 1735 | data & _MASKED_BIT_ENABLE(2)) { | 1735 | IS_MASKED_BITS_ENABLED(data, 2)) { |
| 1736 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST); | 1736 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST); |
| 1737 | return 0; | 1737 | return 0; |
| 1738 | } | 1738 | } |
| @@ -1741,14 +1741,14 @@ static int ring_mode_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, · 2 unmodified lines | |||
| 1741 | * pvinfo, if not, we will treat this guest as non-gvtg-aware | 1741 | * pvinfo, if not, we will treat this guest as non-gvtg-aware |
| 1742 | * guest, and stop emulating its cfg space, mmio, gtt, etc. | 1742 | * guest, and stop emulating its cfg space, mmio, gtt, etc. |
| 1743 | */ | 1743 | */ |
| 1744 | if (((data & _MASKED_BIT_ENABLE(GFX_PPGTT_ENABLE)) || | 1744 | if ((IS_MASKED_BITS_ENABLED(data, GFX_PPGTT_ENABLE) || |
| 1745 | (data & _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE))) | 1745 | IS_MASKED_BITS_ENABLED(data, GFX_RUN_LIST_ENABLE)) && |
| 1746 | && !vgpu->pv_notified) { | 1746 | !vgpu->pv_notified) { |
| 1747 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST); | 1747 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST); |
| 1748 | return 0; | 1748 | return 0; |
| 1749 | } | 1749 | } |
| 1750 | if ((data & _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE)) | 1750 | if (IS_MASKED_BITS_ENABLED(data, GFX_RUN_LIST_ENABLE) || |
| 1751 | || (data & _MASKED_BIT_DISABLE(GFX_RUN_LIST_ENABLE))) { | 1751 | IS_MASKED_BITS_DISABLED(data, GFX_RUN_LIST_ENABLE)) { |
| 1752 | enable_execlist = !!(data & GFX_RUN_LIST_ENABLE); | 1752 | enable_execlist = !!(data & GFX_RUN_LIST_ENABLE); |
| 1753 | 1753 | ||
| 1754 | gvt_dbg_core("EXECLIST %s on ring %s\n", | 1754 | gvt_dbg_core("EXECLIST %s on ring %s\n", |
| @@ -1809,7 +1809,7 @@ static int ring_reset_ctl_write(struct intel_vgpu *vgpu, · 54 unmodified lines | |||
| 1809 | write_vreg(vgpu, offset, p_data, bytes); | 1809 | write_vreg(vgpu, offset, p_data, bytes); |
| 1810 | data = vgpu_vreg(vgpu, offset); | 1810 | data = vgpu_vreg(vgpu, offset); |
| 1811 | 1811 | ||
| 1812 | if (data & _MASKED_BIT_ENABLE(RESET_CTL_REQUEST_RESET)) | 1812 | if (IS_MASKED_BITS_ENABLED(data, RESET_CTL_REQUEST_RESET)) |
| 1813 | data |= RESET_CTL_READY_TO_RESET; | 1813 | data |= RESET_CTL_READY_TO_RESET; |
| 1814 | else if (data & _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)) | 1814 | else if (data & _MASKED_BIT_DISABLE(RESET_CTL_REQUEST_RESET)) |
| 1815 | data &= ~RESET_CTL_READY_TO_RESET; | 1815 | data &= ~RESET_CTL_READY_TO_RESET; |
| @@ -1827,7 +1827,8 @@ static int csfe_chicken1_mmio_write(struct intel_vgpu *vgpu, · 11 unmodified lines | |||
| 1827 | (*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(0x18); | 1827 | (*(u32 *)p_data) &= ~_MASKED_BIT_ENABLE(0x18); |
| 1828 | write_vreg(vgpu, offset, p_data, bytes); | 1828 | write_vreg(vgpu, offset, p_data, bytes); |
| 1829 | 1829 | ||
| 1830 | if (data & _MASKED_BIT_ENABLE(0x10) || data & _MASKED_BIT_ENABLE(0x8)) | 1830 | if (IS_MASKED_BITS_ENABLED(data, 0x10) || |
| 1831 | IS_MASKED_BITS_ENABLED(data, 0x8)) | ||
| 1831 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST); | 1832 | enter_failsafe_mode(vgpu, GVT_FAILSAFE_UNSUPPORTED_GUEST); |
| 1832 | 1833 | ||
| 1833 | return 0; | 1834 | return 0; |
| @@ -3055,6 +3056,7 @@ static int init_skl_mmio_info(struct intel_gvt *gvt) · 1221 unmodified lines | |||
| 3055 | MMIO_D(_MMIO(0x72380), D_SKL_PLUS); | 3056 | MMIO_D(_MMIO(0x72380), D_SKL_PLUS); |
| 3056 | MMIO_D(_MMIO(0x7239c), D_SKL_PLUS); | 3057 | MMIO_D(_MMIO(0x7239c), D_SKL_PLUS); |
| 3057 | MMIO_D(_MMIO(_PLANE_SURF_3_A), D_SKL_PLUS); | 3058 | MMIO_D(_MMIO(_PLANE_SURF_3_A), D_SKL_PLUS); |
| 3059 | MMIO_D(_MMIO(_PLANE_SURF_3_B), D_SKL_PLUS); | ||
| 3058 | 3060 | ||
| 3059 | MMIO_D(CSR_SSP_BASE, D_SKL_PLUS); | 3061 | MMIO_D(CSR_SSP_BASE, D_SKL_PLUS); |
| 3060 | MMIO_D(CSR_HTP_SKL, D_SKL_PLUS); | 3062 | MMIO_D(CSR_HTP_SKL, D_SKL_PLUS); |
| @@ -3131,8 +3133,8 @@ static int init_skl_mmio_info(struct intel_gvt *gvt) · 70 unmodified lines | |||
| 3131 | MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS, | 3133 | MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS, |
| 3132 | NULL, NULL); | 3134 | NULL, NULL); |
| 3133 | 3135 | ||
| 3134 | MMIO_D(GAMT_CHKN_BIT_REG, D_KBL); | 3136 | MMIO_D(GAMT_CHKN_BIT_REG, D_KBL | D_CFL); |
| 3135 | MMIO_D(GEN9_CTX_PREEMPT_REG, D_KBL | D_SKL); | 3137 | MMIO_D(GEN9_CTX_PREEMPT_REG, D_SKL_PLUS); |
| 3136 | 3138 | ||
| 3137 | return 0; | 3139 | return 0; |
| 3138 | } | 3140 | } |
| @@ -54,8 +54,8 @@ bool is_inhibit_context(struct intel_context *ce); · 53 unmodified lines | |||
| 54 | 54 | ||
| 55 | int intel_vgpu_restore_inhibit_context(struct intel_vgpu *vgpu, | 55 | int intel_vgpu_restore_inhibit_context(struct intel_vgpu *vgpu, |
| 56 | struct i915_request *req); | 56 | struct i915_request *req); |
| 57 | #define IS_RESTORE_INHIBIT(a) \ | 57 | |
| 58 | (_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT) == \ | 58 | #define IS_RESTORE_INHIBIT(a) \ |
| 59 | ((a) & _MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT))) | 59 | IS_MASKED_BITS_ENABLED(a, CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT) |
| 60 | 60 | ||
| 61 | #endif | 61 | #endif |
| @@ -94,6 +94,11 @@ · 93 unmodified lines | |||
| 94 | #define GFX_MODE_BIT_SET_IN_MASK(val, bit) \ | 94 | #define GFX_MODE_BIT_SET_IN_MASK(val, bit) \ |
| 95 | ((((bit) & 0xffff0000) == 0) && !!((val) & (((bit) << 16)))) | 95 | ((((bit) & 0xffff0000) == 0) && !!((val) & (((bit) << 16)))) |
| 96 | 96 | ||
| 97 | #define IS_MASKED_BITS_ENABLED(_val, _b) \ | ||
| 98 | (((_val) & _MASKED_BIT_ENABLE(_b)) == _MASKED_BIT_ENABLE(_b)) | ||
| 99 | #define IS_MASKED_BITS_DISABLED(_val, _b) \ | ||
| 100 | ((_val) & _MASKED_BIT_DISABLE(_b)) | ||
| 101 | |||
| 97 | #define FORCEWAKE_RENDER_GEN9_REG 0xa278 | 102 | #define FORCEWAKE_RENDER_GEN9_REG 0xa278 |
| 98 | #define FORCEWAKE_ACK_RENDER_GEN9_REG 0x0D84 | 103 | #define FORCEWAKE_ACK_RENDER_GEN9_REG 0x0D84 |
| 99 | #define FORCEWAKE_BLITTER_GEN9_REG 0xa188 | 104 | #define FORCEWAKE_BLITTER_GEN9_REG 0xa188 |
| @@ -230,7 +230,7 @@ static int per_file_stats(int id, void *ptr, void *data) · 229 unmodified lines | |||
| 230 | struct file_stats *stats = data; | 230 | struct file_stats *stats = data; |
| 231 | struct i915_vma *vma; | 231 | struct i915_vma *vma; |
| 232 | 232 | ||
| 233 | if (!kref_get_unless_zero(&obj->base.refcount)) | 233 | if (IS_ERR_OR_NULL(obj) || !kref_get_unless_zero(&obj->base.refcount)) |
| 234 | return 0; | 234 | return 0; |
| 235 | 235 | ||
| 236 | stats->count++; | 236 | stats->count++; |
| @@ -410,8 +410,6 @@ struct intel_fbc { · 409 unmodified lines | |||
| 410 | int adjusted_x; | 410 | int adjusted_x; |
| 411 | int adjusted_y; | 411 | int adjusted_y; |
| 412 | 412 | ||
| 413 | int y; | ||
| 414 | |||
| 415 | u16 pixel_blend_mode; | 413 | u16 pixel_blend_mode; |
| 416 | } plane; | 414 | } plane; |
| 417 | 415 | ||
| @@ -420,6 +418,8 @@ struct intel_fbc { · 2 unmodified lines | |||
| 420 | unsigned int stride; | 418 | unsigned int stride; |
| 421 | u64 modifier; | 419 | u64 modifier; |
| 422 | } fb; | 420 | } fb; |
| 421 | |||
| 422 | unsigned int fence_y_offset; | ||
| 423 | u16 gen9_wa_cfb_stride; | 423 | u16 gen9_wa_cfb_stride; |
| 424 | s8 fence_id; | 424 | s8 fence_id; |
| 425 | } state_cache; | 425 | } state_cache; |
| @@ -435,15 +435,16 @@ struct intel_fbc { · 9 unmodified lines | |||
| 435 | struct { | 435 | struct { |
| 436 | enum pipe pipe; | 436 | enum pipe pipe; |
| 437 | enum i9xx_plane_id i9xx_plane; | 437 | enum i9xx_plane_id i9xx_plane; |
| 438 | unsigned int fence_y_offset; | ||
| 439 | } crtc; | 438 | } crtc; |
| 440 | 439 | ||
| 441 | struct { | 440 | struct { |
| 442 | const struct drm_format_info *format; | 441 | const struct drm_format_info *format; |
| 443 | unsigned int stride; | 442 | unsigned int stride; |
| 443 | u64 modifier; | ||
| 444 | } fb; | 444 | } fb; |
| 445 | 445 | ||
| 446 | int cfb_size; | 446 | int cfb_size; |
| 447 | unsigned int fence_y_offset; | ||
| 447 | u16 gen9_wa_cfb_stride; | 448 | u16 gen9_wa_cfb_stride; |
| 448 | s8 fence_id; | 449 | s8 fence_id; |
| 449 | bool plane_visible; | 450 | bool plane_visible; |
| @@ -1592,6 +1592,7 @@ static u32 *save_restore_register(struct i915_perf_stream *stream, u32 *cs, · 1591 unmodified lines | |||
| 1592 | u32 d; | 1592 | u32 d; |
| 1593 | 1593 | ||
| 1594 | cmd = save ? MI_STORE_REGISTER_MEM : MI_LOAD_REGISTER_MEM; | 1594 | cmd = save ? MI_STORE_REGISTER_MEM : MI_LOAD_REGISTER_MEM; |
| 1595 | cmd |= MI_SRM_LRM_GLOBAL_GTT; | ||
| 1595 | if (INTEL_GEN(stream->perf->i915) >= 8) | 1596 | if (INTEL_GEN(stream->perf->i915) >= 8) |
| 1596 | cmd++; | 1597 | cmd++; |
| 1597 | 1598 | ||
| @@ -104,6 +104,7 @@ vma_create(struct drm_i915_gem_object *obj, · 103 unmodified lines | |||
| 104 | struct i915_address_space *vm, | 104 | struct i915_address_space *vm, |
| 105 | const struct i915_ggtt_view *view) | 105 | const struct i915_ggtt_view *view) |
| 106 | { | 106 | { |
| 107 | struct i915_vma *pos = ERR_PTR(-E2BIG); | ||
| 107 | struct i915_vma *vma; | 108 | struct i915_vma *vma; |
| 108 | struct rb_node *rb, **p; | 109 | struct rb_node *rb, **p; |
| 109 | 110 | ||
| @@ -184,7 +185,6 @@ vma_create(struct drm_i915_gem_object *obj, · 74 unmodified lines | |||
| 184 | rb = NULL; | 185 | rb = NULL; |
| 185 | p = &obj->vma.tree.rb_node; | 186 | p = &obj->vma.tree.rb_node; |
| 186 | while (*p) { | 187 | while (*p) { |
| 187 | struct i915_vma *pos; | ||
| 188 | long cmp; | 188 | long cmp; |
| 189 | 189 | ||
| 190 | rb = *p; | 190 | rb = *p; |
| @@ -196,16 +196,12 @@ vma_create(struct drm_i915_gem_object *obj, · 5 unmodified lines | |||
| 196 | * and dispose of ours. | 196 | * and dispose of ours. |
| 197 | */ | 197 | */ |
| 198 | cmp = i915_vma_compare(pos, vm, view); | 198 | cmp = i915_vma_compare(pos, vm, view); |
| 199 | if (cmp == 0) { | ||
| 200 | spin_unlock(&obj->vma.lock); | ||
| 201 | i915_vma_free(vma); | ||
| 202 | return pos; | ||
| 203 | } | ||
| 204 | |||
| 205 | if (cmp < 0) | 199 | if (cmp < 0) |
| 206 | p = &rb->rb_right; | 200 | p = &rb->rb_right; |
| 207 | else | 201 | else if (cmp > 0) |
| 208 | p = &rb->rb_left; | 202 | p = &rb->rb_left; |
| 203 | else | ||
| 204 | goto err_unlock; | ||
| 209 | } | 205 | } |
| 210 | rb_link_node(&vma->obj_node, rb, p); | 206 | rb_link_node(&vma->obj_node, rb, p); |
| 211 | rb_insert_color(&vma->obj_node, &obj->vma.tree); | 207 | rb_insert_color(&vma->obj_node, &obj->vma.tree); |
| @@ -228,8 +224,9 @@ vma_create(struct drm_i915_gem_object *obj, · 16 unmodified lines | |||
| 228 | err_unlock: | 224 | err_unlock: |
| 229 | spin_unlock(&obj->vma.lock); | 225 | spin_unlock(&obj->vma.lock); |
| 230 | err_vma: | 226 | err_vma: |
| 227 | i915_vm_put(vm); | ||
| 231 | i915_vma_free(vma); | 228 | i915_vma_free(vma); |
| 232 | return ERR_PTR(-E2BIG); | 229 | return pos; |
| 233 | } | 230 | } |
| 234 | 231 | ||
| 235 | static struct i915_vma * | 232 | static struct i915_vma * |
| @@ -812,7 +812,7 @@ static void mcde_display_enable(struct drm_simple_display_pipe *pipe, · 811 unmodified lines | |||
| 812 | struct drm_crtc *crtc = &pipe->crtc; | 812 | struct drm_crtc *crtc = &pipe->crtc; |
| 813 | struct drm_plane *plane = &pipe->plane; | 813 | struct drm_plane *plane = &pipe->plane; |
| 814 | struct drm_device *drm = crtc->dev; | 814 | struct drm_device *drm = crtc->dev; |
| 815 | struct mcde *mcde = drm->dev_private; | 815 | struct mcde *mcde = to_mcde(drm); |
| 816 | const struct drm_display_mode *mode = &cstate->mode; | 816 | const struct drm_display_mode *mode = &cstate->mode; |
| 817 | struct drm_framebuffer *fb = plane->state->fb; | 817 | struct drm_framebuffer *fb = plane->state->fb; |
| 818 | u32 format = fb->format->format; | 818 | u32 format = fb->format->format; |
| @@ -209,7 +209,6 @@ static int mcde_modeset_init(struct drm_device *drm) · 208 unmodified lines | |||
| 209 | 209 | ||
| 210 | drm_mode_config_reset(drm); | 210 | drm_mode_config_reset(drm); |
| 211 | drm_kms_helper_poll_init(drm); | 211 | drm_kms_helper_poll_init(drm); |
| 212 | drm_fbdev_generic_setup(drm, 32); | ||
| 213 | 212 | ||
| 214 | return 0; | 213 | return 0; |
| 215 | } | 214 | } |
| @@ -264,6 +263,8 @@ static int mcde_drm_bind(struct device *dev) · 48 unmodified lines | |||
| 264 | if (ret < 0) | 263 | if (ret < 0) |
| 265 | goto unbind; | 264 | goto unbind; |
| 266 | 265 | ||
| 266 | drm_fbdev_generic_setup(drm, 32); | ||
| 267 | |||
| 267 | return 0; | 268 | return 0; |
| 268 | 269 | ||
| 269 | unbind: | 270 | unbind: |
| @@ -6,12 +6,12 @@ config DRM_MEDIATEK · 5 unmodified lines | |||
| 6 | depends on COMMON_CLK | 6 | depends on COMMON_CLK |
| 7 | depends on HAVE_ARM_SMCCC | 7 | depends on HAVE_ARM_SMCCC |
| 8 | depends on OF | 8 | depends on OF |
| 9 | depends on MTK_MMSYS | ||
| 9 | select DRM_GEM_CMA_HELPER | 10 | select DRM_GEM_CMA_HELPER |
| 10 | select DRM_KMS_HELPER | 11 | select DRM_KMS_HELPER |
| 11 | select DRM_MIPI_DSI | 12 | select DRM_MIPI_DSI |
| 12 | select DRM_PANEL | 13 | select DRM_PANEL |
| 13 | select MEMORY | 14 | select MEMORY |
| 14 | select MTK_MMSYS | ||
| 15 | select MTK_SMI | 15 | select MTK_SMI |
| 16 | select VIDEOMODE_HELPERS | 16 | select VIDEOMODE_HELPERS |
| 17 | help | 17 | help |
| @@ -193,7 +193,6 @@ static int mtk_crtc_ddp_clk_enable(struct mtk_drm_crtc *mtk_crtc) · 192 unmodified lines | |||
| 193 | int ret; | 193 | int ret; |
| 194 | int i; | 194 | int i; |
| 195 | 195 | ||
| 196 | DRM_DEBUG_DRIVER("%s\n", __func__); | ||
| 197 | for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { | 196 | for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { |
| 198 | ret = clk_prepare_enable(mtk_crtc->ddp_comp[i]->clk); | 197 | ret = clk_prepare_enable(mtk_crtc->ddp_comp[i]->clk); |
| 199 | if (ret) { | 198 | if (ret) { |
| @@ -213,7 +212,6 @@ static void mtk_crtc_ddp_clk_disable(struct mtk_drm_crtc *mtk_crtc) · 13 unmodified lines | |||
| 213 | { | 212 | { |
| 214 | int i; | 213 | int i; |
| 215 | 214 | ||
| 216 | DRM_DEBUG_DRIVER("%s\n", __func__); | ||
| 217 | for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) | 215 | for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) |
| 218 | clk_disable_unprepare(mtk_crtc->ddp_comp[i]->clk); | 216 | clk_disable_unprepare(mtk_crtc->ddp_comp[i]->clk); |
| 219 | } | 217 | } |
| @@ -258,7 +256,6 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) · 38 unmodified lines | |||
| 258 | int ret; | 256 | int ret; |
| 259 | int i; | 257 | int i; |
| 260 | 258 | ||
| 261 | DRM_DEBUG_DRIVER("%s\n", __func__); | ||
| 262 | if (WARN_ON(!crtc->state)) | 259 | if (WARN_ON(!crtc->state)) |
| 263 | return -EINVAL; | 260 | return -EINVAL; |
| 264 | 261 | ||
| @@ -299,7 +296,6 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) · 34 unmodified lines | |||
| 299 | goto err_mutex_unprepare; | 296 | goto err_mutex_unprepare; |
| 300 | } | 297 | } |
| 301 | 298 | ||
| 302 | DRM_DEBUG_DRIVER("mediatek_ddp_ddp_path_setup\n"); | ||
| 303 | for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { | 299 | for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { |
| 304 | mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev, | 300 | mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev, |
| 305 | mtk_crtc->ddp_comp[i]->id, | 301 | mtk_crtc->ddp_comp[i]->id, |
| @@ -349,7 +345,6 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc) · 43 unmodified lines | |||
| 349 | struct drm_crtc *crtc = &mtk_crtc->base; | 345 | struct drm_crtc *crtc = &mtk_crtc->base; |
| 350 | int i; | 346 | int i; |
| 351 | 347 | ||
| 352 | DRM_DEBUG_DRIVER("%s\n", __func__); | ||
| 353 | for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { | 348 | for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { |
| 354 | mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]); | 349 | mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]); |
| 355 | if (i == 1) | 350 | if (i == 1) |
| @@ -831,7 +826,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, · 475 unmodified lines | |||
| 831 | 826 | ||
| 832 | #if IS_REACHABLE(CONFIG_MTK_CMDQ) | 827 | #if IS_REACHABLE(CONFIG_MTK_CMDQ) |
| 833 | mtk_crtc->cmdq_client = | 828 | mtk_crtc->cmdq_client = |
| 834 | cmdq_mbox_create(dev, drm_crtc_index(&mtk_crtc->base), | 829 | cmdq_mbox_create(mtk_crtc->mmsys_dev, |
| 830 | drm_crtc_index(&mtk_crtc->base), | ||
| 835 | 2000); | 831 | 2000); |
| 836 | if (IS_ERR(mtk_crtc->cmdq_client)) { | 832 | if (IS_ERR(mtk_crtc->cmdq_client)) { |
| 837 | dev_dbg(dev, "mtk_crtc %d failed to create mailbox client, writing register by CPU now\n", | 833 | dev_dbg(dev, "mtk_crtc %d failed to create mailbox client, writing register by CPU now\n", |
| @@ -444,7 +444,6 @@ static int mtk_drm_probe(struct platform_device *pdev) · 443 unmodified lines | |||
| 444 | if (!private) | 444 | if (!private) |
| 445 | return -ENOMEM; | 445 | return -ENOMEM; |
| 446 | 446 | ||
| 447 | private->data = of_device_get_match_data(dev); | ||
| 448 | private->mmsys_dev = dev->parent; | 447 | private->mmsys_dev = dev->parent; |
| 449 | if (!private->mmsys_dev) { | 448 | if (!private->mmsys_dev) { |
| 450 | dev_err(dev, "Failed to get MMSYS device\n"); | 449 | dev_err(dev, "Failed to get MMSYS device\n"); |
| @@ -514,7 +513,8 @@ static int mtk_drm_probe(struct platform_device *pdev) · 63 unmodified lines | |||
| 514 | goto err_node; | 513 | goto err_node; |
| 515 | } | 514 | } |
| 516 | 515 | ||
| 517 | ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL); | 516 | ret = mtk_ddp_comp_init(dev->parent, node, comp, |
| 517 | comp_id, NULL); | ||
| 518 | if (ret) { | 518 | if (ret) { |
| 519 | of_node_put(node); | 519 | of_node_put(node); |
| 520 | goto err_node; | 520 | goto err_node; |
| @@ -571,7 +571,6 @@ static int mtk_drm_sys_suspend(struct device *dev) · 50 unmodified lines | |||
| 571 | int ret; | 571 | int ret; |
| 572 | 572 | ||
| 573 | ret = drm_mode_config_helper_suspend(drm); | 573 | ret = drm_mode_config_helper_suspend(drm); |
| 574 | DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n"); | ||
| 575 | 574 | ||
| 576 | return ret; | 575 | return ret; |
| 577 | } | 576 | } |
| @@ -583,7 +582,6 @@ static int mtk_drm_sys_resume(struct device *dev) · 5 unmodified lines | |||
| 583 | int ret; | 582 | int ret; |
| 584 | 583 | ||
| 585 | ret = drm_mode_config_helper_resume(drm); | 584 | ret = drm_mode_config_helper_resume(drm); |
| 586 | DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n"); | ||
| 587 | 585 | ||
| 588 | return ret; | 586 | return ret; |
| 589 | } | 587 | } |
| @@ -164,6 +164,16 @@ static int mtk_plane_atomic_check(struct drm_plane *plane, · 163 unmodified lines | |||
| 164 | true, true); | 164 | true, true); |
| 165 | } | 165 | } |
| 166 | 166 | ||
| 167 | static void mtk_plane_atomic_disable(struct drm_plane *plane, | ||
| 168 | struct drm_plane_state *old_state) | ||
| 169 | { | ||
| 170 | struct mtk_plane_state *state = to_mtk_plane_state(plane->state); | ||
| 171 | |||
| 172 | state->pending.enable = false; | ||
| 173 | wmb(); /* Make sure the above parameter is set before update */ | ||
| 174 | state->pending.dirty = true; | ||
| 175 | } | ||
| 176 | |||
| 167 | static void mtk_plane_atomic_update(struct drm_plane *plane, | 177 | static void mtk_plane_atomic_update(struct drm_plane *plane, |
| 168 | struct drm_plane_state *old_state) | 178 | struct drm_plane_state *old_state) |
| 169 | { | 179 | { |
| @@ -178,6 +188,11 @@ static void mtk_plane_atomic_update(struct drm_plane *plane, · 8 unmodified lines | |||
| 178 | if (!crtc || WARN_ON(!fb)) | 188 | if (!crtc || WARN_ON(!fb)) |
| 179 | return; | 189 | return; |
| 180 | 190 | ||
| 191 | if (!plane->state->visible) { | ||
| 192 | mtk_plane_atomic_disable(plane, old_state); | ||
| 193 | return; | ||
| 194 | } | ||
| 195 | |||
| 181 | gem = fb->obj[0]; | 196 | gem = fb->obj[0]; |
| 182 | mtk_gem = to_mtk_gem_obj(gem); | 197 | mtk_gem = to_mtk_gem_obj(gem); |
| 183 | addr = mtk_gem->dma_addr; | 198 | addr = mtk_gem->dma_addr; |
| @@ -200,16 +215,6 @@ static void mtk_plane_atomic_update(struct drm_plane *plane, · 16 unmodified lines | |||
| 200 | state->pending.dirty = true; | 215 | state->pending.dirty = true; |
| 201 | } | 216 | } |
| 202 | 217 | ||
| 203 | static void mtk_plane_atomic_disable(struct drm_plane *plane, | ||
| 204 | struct drm_plane_state *old_state) | ||
| 205 | { | ||
| 206 | struct mtk_plane_state *state = to_mtk_plane_state(plane->state); | ||
| 207 | |||
| 208 | state->pending.enable = false; | ||
| 209 | wmb(); /* Make sure the above parameter is set before update */ | ||
| 210 | state->pending.dirty = true; | ||
| 211 | } | ||
| 212 | |||
| 213 | static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = { | 218 | static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = { |
| 214 | .prepare_fb = drm_gem_fb_prepare_fb, | 219 | .prepare_fb = drm_gem_fb_prepare_fb, |
| 215 | .atomic_check = mtk_plane_atomic_check, | 220 | .atomic_check = mtk_plane_atomic_check, |
| @@ -316,10 +316,7 @@ static void mtk_dsi_lane0_ulp_mode_leave(struct mtk_dsi *dsi) · 315 unmodified lines | |||
| 316 | 316 | ||
| 317 | static bool mtk_dsi_clk_hs_state(struct mtk_dsi *dsi) | 317 | static bool mtk_dsi_clk_hs_state(struct mtk_dsi *dsi) |
| 318 | { | 318 | { |
| 319 | u32 tmp_reg1; | 319 | return readl(dsi->regs + DSI_PHY_LCCON) & LC_HS_TX_EN; |
| 320 | |||
| 321 | tmp_reg1 = readl(dsi->regs + DSI_PHY_LCCON); | ||
| 322 | return ((tmp_reg1 & LC_HS_TX_EN) == 1) ? true : false; | ||
| 323 | } | 320 | } |
| 324 | 321 | ||
| 325 | static void mtk_dsi_clk_hs_mode(struct mtk_dsi *dsi, bool enter) | 322 | static void mtk_dsi_clk_hs_mode(struct mtk_dsi *dsi, bool enter) |
| @@ -1630,8 +1630,6 @@ static int mtk_hdmi_audio_startup(struct device *dev, void *data) · 1629 unmodified lines | |||
| 1630 | { | 1630 | { |
| 1631 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); | 1631 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); |
| 1632 | 1632 | ||
| 1633 | dev_dbg(dev, "%s\n", __func__); | ||
| 1634 | |||
| 1635 | mtk_hdmi_audio_enable(hdmi); | 1633 | mtk_hdmi_audio_enable(hdmi); |
| 1636 | 1634 | ||
| 1637 | return 0; | 1635 | return 0; |
| @@ -1641,8 +1639,6 @@ static void mtk_hdmi_audio_shutdown(struct device *dev, void *data) · 3 unmodified lines | |||
| 1641 | { | 1639 | { |
| 1642 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); | 1640 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); |
| 1643 | 1641 | ||
| 1644 | dev_dbg(dev, "%s\n", __func__); | ||
| 1645 | |||
| 1646 | mtk_hdmi_audio_disable(hdmi); | 1642 | mtk_hdmi_audio_disable(hdmi); |
| 1647 | } | 1643 | } |
| 1648 | 1644 | ||
| @@ -1651,8 +1647,6 @@ mtk_hdmi_audio_digital_mute(struct device *dev, void *data, bool enable) · 2 unmodified lines | |||
| 1651 | { | 1647 | { |
| 1652 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); | 1648 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); |
| 1653 | 1649 | ||
| 1654 | dev_dbg(dev, "%s(%d)\n", __func__, enable); | ||
| 1655 | |||
| 1656 | if (enable) | 1650 | if (enable) |
| 1657 | mtk_hdmi_hw_aud_mute(hdmi); | 1651 | mtk_hdmi_hw_aud_mute(hdmi); |
| 1658 | else | 1652 | else |
| @@ -1665,8 +1659,6 @@ static int mtk_hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf, · 6 unmodified lines | |||
| 1665 | { | 1659 | { |
| 1666 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); | 1660 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); |
| 1667 | 1661 | ||
| 1668 | dev_dbg(dev, "%s\n", __func__); | ||
| 1669 | |||
| 1670 | memcpy(buf, hdmi->conn.eld, min(sizeof(hdmi->conn.eld), len)); | 1662 | memcpy(buf, hdmi->conn.eld, min(sizeof(hdmi->conn.eld), len)); |
| 1671 | 1663 | ||
| 1672 | return 0; | 1664 | return 0; |
| @@ -1766,7 +1758,6 @@ static int mtk_drm_hdmi_probe(struct platform_device *pdev) · 93 unmodified lines | |||
| 1766 | goto err_bridge_remove; | 1758 | goto err_bridge_remove; |
| 1767 | } | 1759 | } |
| 1768 | 1760 | ||
| 1769 | dev_dbg(dev, "mediatek hdmi probe success\n"); | ||
| 1770 | return 0; | 1761 | return 0; |
| 1771 | 1762 | ||
| 1772 | err_bridge_remove: | 1763 | err_bridge_remove: |
| @@ -1789,7 +1780,7 @@ static int mtk_hdmi_suspend(struct device *dev) · 16 unmodified lines | |||
| 1789 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); | 1780 | struct mtk_hdmi *hdmi = dev_get_drvdata(dev); |
| 1790 | 1781 | ||
| 1791 | mtk_hdmi_clk_disable_audio(hdmi); | 1782 | mtk_hdmi_clk_disable_audio(hdmi); |
| 1792 | dev_dbg(dev, "hdmi suspend success!\n"); | 1783 | |
| 1793 | return 0; | 1784 | return 0; |
| 1794 | } | 1785 | } |
| 1795 | 1786 | ||
| @@ -1804,7 +1795,6 @@ static int mtk_hdmi_resume(struct device *dev) · 8 unmodified lines | |||
| 1804 | return ret; | 1795 | return ret; |
| 1805 | } | 1796 | } |
| 1806 | 1797 | ||
| 1807 | dev_dbg(dev, "hdmi resume success!\n"); | ||
| 1808 | return 0; | 1798 | return 0; |
| 1809 | } | 1799 | } |
| 1810 | #endif | 1800 | #endif |
| @@ -107,60 +107,10 @@ · 106 unmodified lines | |||
| 107 | #define RGS_HDMITX_5T1_EDG (0xf << 4) | 107 | #define RGS_HDMITX_5T1_EDG (0xf << 4) |
| 108 | #define RGS_HDMITX_PLUG_TST BIT(0) | 108 | #define RGS_HDMITX_PLUG_TST BIT(0) |
| 109 | 109 | ||
| 110 | static const u8 PREDIV[3][4] = { | ||
| 111 | {0x0, 0x0, 0x0, 0x0}, /* 27Mhz */ | ||
| 112 | {0x1, 0x1, 0x1, 0x1}, /* 74Mhz */ | ||
| 113 | {0x1, 0x1, 0x1, 0x1} /* 148Mhz */ | ||
| 114 | }; | ||
| 115 | |||
| 116 | static const u8 TXDIV[3][4] = { | ||
| 117 | {0x3, 0x3, 0x3, 0x2}, /* 27Mhz */ | ||
| 118 | {0x2, 0x1, 0x1, 0x1}, /* 74Mhz */ | ||
| 119 | {0x1, 0x0, 0x0, 0x0} /* 148Mhz */ | ||
| 120 | }; | ||
| 121 | |||
| 122 | static const u8 FBKSEL[3][4] = { | ||
| 123 | {0x1, 0x1, 0x1, 0x1}, /* 27Mhz */ | ||
| 124 | {0x1, 0x0, 0x1, 0x1}, /* 74Mhz */ | ||
| 125 | {0x1, 0x0, 0x1, 0x1} /* 148Mhz */ | ||
| 126 | }; | ||
| 127 | |||
| 128 | static const u8 FBKDIV[3][4] = { | ||
| 129 | {19, 24, 29, 19}, /* 27Mhz */ | ||
| 130 | {19, 24, 14, 19}, /* 74Mhz */ | ||
| 131 | {19, 24, 14, 19} /* 148Mhz */ | ||
| 132 | }; | ||
| 133 | |||
| 134 | static const u8 DIVEN[3][4] = { | ||
| 135 | {0x2, 0x1, 0x1, 0x2}, /* 27Mhz */ | ||
| 136 | {0x2, 0x2, 0x2, 0x2}, /* 74Mhz */ | ||
| 137 | {0x2, 0x2, 0x2, 0x2} /* 148Mhz */ | ||
| 138 | }; | ||
| 139 | |||
| 140 | static const u8 HTPLLBP[3][4] = { | ||
| 141 | {0xc, 0xc, 0x8, 0xc}, /* 27Mhz */ | ||
| 142 | {0xc, 0xf, 0xf, 0xc}, /* 74Mhz */ | ||
| 143 | {0xc, 0xf, 0xf, 0xc} /* 148Mhz */ | ||
| 144 | }; | ||
| 145 | |||
| 146 | static const u8 HTPLLBC[3][4] = { | ||
| 147 | {0x2, 0x3, 0x3, 0x2}, /* 27Mhz */ | ||
| 148 | {0x2, 0x3, 0x3, 0x2}, /* 74Mhz */ | ||
| 149 | {0x2, 0x3, 0x3, 0x2} /* 148Mhz */ | ||
| 150 | }; | ||
| 151 | |||
| 152 | static const u8 HTPLLBR[3][4] = { | ||
| 153 | {0x1, 0x1, 0x0, 0x1}, /* 27Mhz */ | ||
| 154 | {0x1, 0x2, 0x2, 0x1}, /* 74Mhz */ | ||
| 155 | {0x1, 0x2, 0x2, 0x1} /* 148Mhz */ | ||
| 156 | }; | ||
| 157 | |||
| 158 | static int mtk_hdmi_pll_prepare(struct clk_hw *hw) | 110 | static int mtk_hdmi_pll_prepare(struct clk_hw *hw) |
| 159 | { | 111 | { |
| 160 | struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); | 112 | struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); |
| 161 | 113 | ||
| 162 | dev_dbg(hdmi_phy->dev, "%s\n", __func__); | ||
| 163 | |||
| 164 | mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_AUTOK_EN); | 114 | mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_AUTOK_EN); |
| 165 | mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_POSDIV); | 115 | mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_POSDIV); |
| 166 | mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON3, RG_HDMITX_MHLCK_EN); | 116 | mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON3, RG_HDMITX_MHLCK_EN); |
| @@ -178,8 +128,6 @@ static void mtk_hdmi_pll_unprepare(struct clk_hw *hw) · 11 unmodified lines | |||
| 178 | { | 128 | { |
| 179 | struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); | 129 | struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw); |
| 180 | 130 | ||
| 181 | dev_dbg(hdmi_phy->dev, "%s\n", __func__); | ||
| 182 | |||
| 183 | mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_TXDIV_EN); | 131 | mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_TXDIV_EN); |
| 184 | mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_BIAS_LPF_EN); | 132 | mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_BIAS_LPF_EN); |
| 185 | usleep_range(100, 150); | 133 | usleep_range(100, 150); |
| @@ -261,6 +261,12 @@ · 260 unmodified lines | |||
| 261 | #define VIU_OSD_FIFO_DEPTH_VAL(val) ((val & 0x7f) << 12) | 261 | #define VIU_OSD_FIFO_DEPTH_VAL(val) ((val & 0x7f) << 12) |
| 262 | #define VIU_OSD_WORDS_PER_BURST(words) (((words & 0x4) >> 1) << 22) | 262 | #define VIU_OSD_WORDS_PER_BURST(words) (((words & 0x4) >> 1) << 22) |
| 263 | #define VIU_OSD_FIFO_LIMITS(size) ((size & 0xf) << 24) | 263 | #define VIU_OSD_FIFO_LIMITS(size) ((size & 0xf) << 24) |
| 264 | #define VIU_OSD_BURST_LENGTH_24 (0x0 << 31 | 0x0 << 10) | ||
| 265 | #define VIU_OSD_BURST_LENGTH_32 (0x0 << 31 | 0x1 << 10) | ||
| 266 | #define VIU_OSD_BURST_LENGTH_48 (0x0 << 31 | 0x2 << 10) | ||
| 267 | #define VIU_OSD_BURST_LENGTH_64 (0x0 << 31 | 0x3 << 10) | ||
| 268 | #define VIU_OSD_BURST_LENGTH_96 (0x1 << 31 | 0x0 << 10) | ||
| 269 | #define VIU_OSD_BURST_LENGTH_128 (0x1 << 31 | 0x1 << 10) | ||
| 264 | 270 | ||
| 265 | #define VD1_IF0_GEN_REG 0x1a50 | 271 | #define VD1_IF0_GEN_REG 0x1a50 |
| 266 | #define VD1_IF0_CANVAS0 0x1a51 | 272 | #define VD1_IF0_CANVAS0 0x1a51 |
| @@ -411,13 +411,6 @@ void meson_viu_gxm_disable_osd1_afbc(struct meson_drm *priv) · 410 unmodified lines | |||
| 411 | priv->io_base + _REG(VIU_MISC_CTRL1)); | 411 | priv->io_base + _REG(VIU_MISC_CTRL1)); |
| 412 | } | 412 | } |
| 413 | 413 | ||
| 414 | static inline uint32_t meson_viu_osd_burst_length_reg(uint32_t length) | ||
| 415 | { | ||
| 416 | uint32_t val = (((length & 0x80) % 24) / 12); | ||
| 417 | |||
| 418 | return (((val & 0x3) << 10) | (((val & 0x4) >> 2) << 31)); | ||
| 419 | } | ||
| 420 | |||
| 421 | void meson_viu_init(struct meson_drm *priv) | 414 | void meson_viu_init(struct meson_drm *priv) |
| 422 | { | 415 | { |
| 423 | uint32_t reg; | 416 | uint32_t reg; |
| @@ -444,9 +437,9 @@ void meson_viu_init(struct meson_drm *priv) · 20 unmodified lines | |||
| 444 | VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */ | 437 | VIU_OSD_FIFO_LIMITS(2); /* fifo_lim: 2*16=32 */ |
| 445 | 438 | ||
| 446 | if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) | 439 | if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) |
| 447 | reg |= meson_viu_osd_burst_length_reg(32); | 440 | reg |= VIU_OSD_BURST_LENGTH_32; |
| 448 | else | 441 | else |
| 449 | reg |= meson_viu_osd_burst_length_reg(64); | 442 | reg |= VIU_OSD_BURST_LENGTH_64; |
| 450 | 443 | ||
| 451 | writel_relaxed(reg, priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT)); | 444 | writel_relaxed(reg, priv->io_base + _REG(VIU_OSD1_FIFO_CTRL_STAT)); |
| 452 | writel_relaxed(reg, priv->io_base + _REG(VIU_OSD2_FIFO_CTRL_STAT)); | 445 | writel_relaxed(reg, priv->io_base + _REG(VIU_OSD2_FIFO_CTRL_STAT)); |
| @@ -408,7 +408,7 @@ a2xx_create_address_space(struct msm_gpu *gpu, struct platform_device *pdev) · 407 unmodified lines | |||
| 408 | struct msm_gem_address_space *aspace; | 408 | struct msm_gem_address_space *aspace; |
| 409 | 409 | ||
| 410 | aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M, | 410 | aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M, |
| 411 | SZ_16M + 0xfff * SZ_64K); | 411 | 0xfff * SZ_64K); |
| 412 | 412 | ||
| 413 | if (IS_ERR(aspace) && !IS_ERR(mmu)) | 413 | if (IS_ERR(aspace) && !IS_ERR(mmu)) |
| 414 | mmu->funcs->destroy(mmu); | 414 | mmu->funcs->destroy(mmu); |
| @@ -1121,7 +1121,7 @@ static int a6xx_gmu_memory_probe(struct a6xx_gmu *gmu) · 1120 unmodified lines | |||
| 1121 | return -ENODEV; | 1121 | return -ENODEV; |
| 1122 | 1122 | ||
| 1123 | mmu = msm_iommu_new(gmu->dev, domain); | 1123 | mmu = msm_iommu_new(gmu->dev, domain); |
| 1124 | gmu->aspace = msm_gem_address_space_create(mmu, "gmu", 0x0, 0x7fffffff); | 1124 | gmu->aspace = msm_gem_address_space_create(mmu, "gmu", 0x0, 0x80000000); |
| 1125 | if (IS_ERR(gmu->aspace)) { | 1125 | if (IS_ERR(gmu->aspace)) { |
| 1126 | iommu_domain_free(domain); | 1126 | iommu_domain_free(domain); |
| 1127 | return PTR_ERR(gmu->aspace); | 1127 | return PTR_ERR(gmu->aspace); |
| @@ -893,8 +893,8 @@ static const struct adreno_gpu_funcs funcs = { · 892 unmodified lines | |||
| 893 | #if defined(CONFIG_DRM_MSM_GPU_STATE) | 893 | #if defined(CONFIG_DRM_MSM_GPU_STATE) |
| 894 | .gpu_state_get = a6xx_gpu_state_get, | 894 | .gpu_state_get = a6xx_gpu_state_get, |
| 895 | .gpu_state_put = a6xx_gpu_state_put, | 895 | .gpu_state_put = a6xx_gpu_state_put, |
| 896 | .create_address_space = adreno_iommu_create_address_space, | ||
| 897 | #endif | 896 | #endif |
| 897 | .create_address_space = adreno_iommu_create_address_space, | ||
| 898 | }, | 898 | }, |
| 899 | .get_timestamp = a6xx_get_timestamp, | 899 | .get_timestamp = a6xx_get_timestamp, |
| 900 | }; | 900 | }; |
| @@ -194,7 +194,7 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, · 193 unmodified lines | |||
| 194 | struct msm_gem_address_space *aspace; | 194 | struct msm_gem_address_space *aspace; |
| 195 | 195 | ||
| 196 | aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M, | 196 | aspace = msm_gem_address_space_create(mmu, "gpu", SZ_16M, |
| 197 | 0xfffffff); | 197 | 0xffffffff - SZ_16M); |
| 198 | 198 | ||
| 199 | if (IS_ERR(aspace) && !IS_ERR(mmu)) | 199 | if (IS_ERR(aspace) && !IS_ERR(mmu)) |
| 200 | mmu->funcs->destroy(mmu); | 200 | mmu->funcs->destroy(mmu); |
| @@ -521,7 +521,7 @@ static struct msm_display_topology dpu_encoder_get_topology( · 520 unmodified lines | |||
| 521 | struct dpu_kms *dpu_kms, | 521 | struct dpu_kms *dpu_kms, |
| 522 | struct drm_display_mode *mode) | 522 | struct drm_display_mode *mode) |
| 523 | { | 523 | { |
| 524 | struct msm_display_topology topology; | 524 | struct msm_display_topology topology = {0}; |
| 525 | int i, intf_count = 0; | 525 | int i, intf_count = 0; |
| 526 | 526 | ||
| 527 | for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++) | 527 | for (i = 0; i < MAX_PHYS_ENCODERS_PER_VIRTUAL; i++) |
| @@ -537,7 +537,8 @@ static struct msm_display_topology dpu_encoder_get_topology( · 9 unmodified lines | |||
| 537 | * 1 LM, 1 INTF | 537 | * 1 LM, 1 INTF |
| 538 | * 2 LM, 1 INTF (stream merge to support high resolution interfaces) | 538 | * 2 LM, 1 INTF (stream merge to support high resolution interfaces) |
| 539 | * | 539 | * |
| 540 | * Adding color blocks only to primary interface | 540 | * Adding color blocks only to primary interface if available in |
| 541 | * sufficient number | ||
| 541 | */ | 542 | */ |
| 542 | if (intf_count == 2) | 543 | if (intf_count == 2) |
| 543 | topology.num_lm = 2; | 544 | topology.num_lm = 2; |
| @@ -546,8 +547,11 @@ static struct msm_display_topology dpu_encoder_get_topology( · 2 unmodified lines | |||
| 546 | else | 547 | else |
| 547 | topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1; | 548 | topology.num_lm = (mode->hdisplay > MAX_HDISPLAY_SPLIT) ? 2 : 1; |
| 548 | 549 | ||
| 549 | if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) | 550 | if (dpu_enc->disp_info.intf_type == DRM_MODE_ENCODER_DSI) { |
| 550 | topology.num_dspp = topology.num_lm; | 551 | if (dpu_kms->catalog->dspp && |
| 552 | (dpu_kms->catalog->dspp_count >= topology.num_lm)) | ||
| 553 | topology.num_dspp = topology.num_lm; | ||
| 554 | } | ||
| 551 | 555 | ||
| 552 | topology.num_enc = 0; | 556 | topology.num_enc = 0; |
| 553 | topology.num_intf = intf_count; | 557 | topology.num_intf = intf_count; |
| @@ -2136,7 +2140,6 @@ int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, · 1582 unmodified lines | |||
| 2136 | 2140 | ||
| 2137 | dpu_enc = to_dpu_encoder_virt(enc); | 2141 | dpu_enc = to_dpu_encoder_virt(enc); |
| 2138 | 2142 | ||
| 2139 | mutex_init(&dpu_enc->enc_lock); | ||
| 2140 | ret = dpu_encoder_setup_display(dpu_enc, dpu_kms, disp_info); | 2143 | ret = dpu_encoder_setup_display(dpu_enc, dpu_kms, disp_info); |
| 2141 | if (ret) | 2144 | if (ret) |
| 2142 | goto fail; | 2145 | goto fail; |
| @@ -2151,7 +2154,6 @@ int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc, · 8 unmodified lines | |||
| 2151 | 0); | 2154 | 0); |
| 2152 | 2155 | ||
| 2153 | 2156 | ||
| 2154 | mutex_init(&dpu_enc->rc_lock); | ||
| 2155 | INIT_DELAYED_WORK(&dpu_enc->delayed_off_work, | 2157 | INIT_DELAYED_WORK(&dpu_enc->delayed_off_work, |
| 2156 | dpu_encoder_off_work); | 2158 | dpu_encoder_off_work); |
| 2157 | dpu_enc->idle_timeout = IDLE_TIMEOUT; | 2159 | dpu_enc->idle_timeout = IDLE_TIMEOUT; |
| @@ -2183,7 +2185,7 @@ struct drm_encoder *dpu_encoder_init(struct drm_device *dev, · 25 unmodified lines | |||
| 2183 | 2185 | ||
| 2184 | dpu_enc = devm_kzalloc(dev->dev, sizeof(*dpu_enc), GFP_KERNEL); | 2186 | dpu_enc = devm_kzalloc(dev->dev, sizeof(*dpu_enc), GFP_KERNEL); |
| 2185 | if (!dpu_enc) | 2187 | if (!dpu_enc) |
| 2186 | return ERR_PTR(ENOMEM); | 2188 | return ERR_PTR(-ENOMEM); |
| 2187 | 2189 | ||
| 2188 | rc = drm_encoder_init(dev, &dpu_enc->base, &dpu_encoder_funcs, | 2190 | rc = drm_encoder_init(dev, &dpu_enc->base, &dpu_encoder_funcs, |
| 2189 | drm_enc_mode, NULL); | 2191 | drm_enc_mode, NULL); |
| @@ -2196,6 +2198,8 @@ struct drm_encoder *dpu_encoder_init(struct drm_device *dev, · 6 unmodified lines | |||
| 2196 | 2198 | ||
| 2197 | spin_lock_init(&dpu_enc->enc_spinlock); | 2199 | spin_lock_init(&dpu_enc->enc_spinlock); |
| 2198 | dpu_enc->enabled = false; | 2200 | dpu_enc->enabled = false; |
| 2201 | mutex_init(&dpu_enc->enc_lock); | ||
| 2202 | mutex_init(&dpu_enc->rc_lock); | ||
| 2199 | 2203 | ||
| 2200 | return &dpu_enc->base; | 2204 | return &dpu_enc->base; |
| 2201 | } | 2205 | } |
| @@ -780,7 +780,7 @@ static int _dpu_kms_mmu_init(struct dpu_kms *dpu_kms) · 779 unmodified lines | |||
| 780 | 780 | ||
| 781 | mmu = msm_iommu_new(dpu_kms->dev->dev, domain); | 781 | mmu = msm_iommu_new(dpu_kms->dev->dev, domain); |
| 782 | aspace = msm_gem_address_space_create(mmu, "dpu1", | 782 | aspace = msm_gem_address_space_create(mmu, "dpu1", |
| 783 | 0x1000, 0xfffffff); | 783 | 0x1000, 0x100000000 - 0x1000); |
| 784 | 784 | ||
| 785 | if (IS_ERR(aspace)) { | 785 | if (IS_ERR(aspace)) { |
| 786 | mmu->funcs->destroy(mmu); | 786 | mmu->funcs->destroy(mmu); |
| @@ -514,7 +514,7 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev) · 513 unmodified lines | |||
| 514 | config->iommu); | 514 | config->iommu); |
| 515 | 515 | ||
| 516 | aspace = msm_gem_address_space_create(mmu, | 516 | aspace = msm_gem_address_space_create(mmu, |
| 517 | "mdp4", 0x1000, 0xffffffff); | 517 | "mdp4", 0x1000, 0x100000000 - 0x1000); |
| 518 | 518 | ||
| 519 | if (IS_ERR(aspace)) { | 519 | if (IS_ERR(aspace)) { |
| 520 | if (!IS_ERR(mmu)) | 520 | if (!IS_ERR(mmu)) |
| @@ -633,7 +633,7 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev) · 632 unmodified lines | |||
| 633 | mmu = msm_iommu_new(iommu_dev, config->platform.iommu); | 633 | mmu = msm_iommu_new(iommu_dev, config->platform.iommu); |
| 634 | 634 | ||
| 635 | aspace = msm_gem_address_space_create(mmu, "mdp5", | 635 | aspace = msm_gem_address_space_create(mmu, "mdp5", |
| 636 | 0x1000, 0xffffffff); | 636 | 0x1000, 0x100000000 - 0x1000); |
| 637 | 637 | ||
| 638 | if (IS_ERR(aspace)) { | 638 | if (IS_ERR(aspace)) { |
| 639 | if (!IS_ERR(mmu)) | 639 | if (!IS_ERR(mmu)) |
| @@ -71,8 +71,10 @@ int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx, · 70 unmodified lines | |||
| 71 | queue->flags = flags; | 71 | queue->flags = flags; |
| 72 | 72 | ||
| 73 | if (priv->gpu) { | 73 | if (priv->gpu) { |
| 74 | if (prio >= priv->gpu->nr_rings) | 74 | if (prio >= priv->gpu->nr_rings) { |
| 75 | kfree(queue); | ||
| 75 | return -EINVAL; | 76 | return -EINVAL; |
| 77 | } | ||
| 76 | 78 | ||
| 77 | queue->prio = prio; | 79 | queue->prio = prio; |
| 78 | } | 80 | } |
| @@ -601,6 +601,9 @@ nv50_audio_disable(struct drm_encoder *encoder, struct nouveau_crtc *nv_crtc) · 600 unmodified lines | |||
| 601 | (0x0100 << nv_crtc->index), | 601 | (0x0100 << nv_crtc->index), |
| 602 | }; | 602 | }; |
| 603 | 603 | ||
| 604 | if (!nv_encoder->audio) | ||
| 605 | return; | ||
| 606 | |||
| 604 | nv_encoder->audio = false; | 607 | nv_encoder->audio = false; |
| 605 | nvif_mthd(&disp->disp->object, 0, &args, sizeof(args)); | 608 | nvif_mthd(&disp->disp->object, 0, &args, sizeof(args)); |
| 606 | 609 | ||
| @@ -550,7 +550,7 @@ static unsigned long nouveau_dmem_migrate_copy_one(struct nouveau_drm *drm, · 549 unmodified lines | |||
| 550 | DMA_BIDIRECTIONAL); | 550 | DMA_BIDIRECTIONAL); |
| 551 | if (dma_mapping_error(dev, *dma_addr)) | 551 | if (dma_mapping_error(dev, *dma_addr)) |
| 552 | goto out_free_page; | 552 | goto out_free_page; |
| 553 | if (drm->dmem->migrate.copy_func(drm, page_size(spage), | 553 | if (drm->dmem->migrate.copy_func(drm, 1, |
| 554 | NOUVEAU_APER_VRAM, paddr, NOUVEAU_APER_HOST, *dma_addr)) | 554 | NOUVEAU_APER_VRAM, paddr, NOUVEAU_APER_HOST, *dma_addr)) |
| 555 | goto out_dma_unmap; | 555 | goto out_dma_unmap; |
| 556 | } else { | 556 | } else { |
| @@ -562,6 +562,7 @@ static int nouveau_range_fault(struct nouveau_svmm *svmm, · 561 unmodified lines | |||
| 562 | .end = notifier->notifier.interval_tree.last + 1, | 562 | .end = notifier->notifier.interval_tree.last + 1, |
| 563 | .pfn_flags_mask = HMM_PFN_REQ_FAULT | HMM_PFN_REQ_WRITE, | 563 | .pfn_flags_mask = HMM_PFN_REQ_FAULT | HMM_PFN_REQ_WRITE, |
| 564 | .hmm_pfns = hmm_pfns, | 564 | .hmm_pfns = hmm_pfns, |
| 565 | .dev_private_owner = drm->dev, | ||
| 565 | }; | 566 | }; |
| 566 | struct mm_struct *mm = notifier->notifier.mm; | 567 | struct mm_struct *mm = notifier->notifier.mm; |
| 567 | int ret; | 568 | int ret; |
| @@ -118,10 +118,10 @@ g94_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 117 unmodified lines | |||
| 118 | if (retries) | 118 | if (retries) |
| 119 | udelay(400); | 119 | udelay(400); |
| 120 | 120 | ||
| 121 | /* transaction request, wait up to 1ms for it to complete */ | 121 | /* transaction request, wait up to 2ms for it to complete */ |
| 122 | nvkm_wr32(device, 0x00e4e4 + base, 0x00010000 | ctrl); | 122 | nvkm_wr32(device, 0x00e4e4 + base, 0x00010000 | ctrl); |
| 123 | 123 | ||
| 124 | timeout = 1000; | 124 | timeout = 2000; |
| 125 | do { | 125 | do { |
| 126 | ctrl = nvkm_rd32(device, 0x00e4e4 + base); | 126 | ctrl = nvkm_rd32(device, 0x00e4e4 + base); |
| 127 | udelay(1); | 127 | udelay(1); |
| @@ -118,10 +118,10 @@ gm200_i2c_aux_xfer(struct nvkm_i2c_aux *obj, bool retry, · 117 unmodified lines | |||
| 118 | if (retries) | 118 | if (retries) |
| 119 | udelay(400); | 119 | udelay(400); |
| 120 | 120 | ||
| 121 | /* transaction request, wait up to 1ms for it to complete */ | 121 | /* transaction request, wait up to 2ms for it to complete */ |
| 122 | nvkm_wr32(device, 0x00d954 + base, 0x00010000 | ctrl); | 122 | nvkm_wr32(device, 0x00d954 + base, 0x00010000 | ctrl); |
| 123 | 123 | ||
| 124 | timeout = 1000; | 124 | timeout = 2000; |
| 125 | do { | 125 | do { |
| 126 | ctrl = nvkm_rd32(device, 0x00d954 + base); | 126 | ctrl = nvkm_rd32(device, 0x00d954 + base); |
| 127 | udelay(1); | 127 | udelay(1); |
| @@ -2495,6 +2495,7 @@ static const struct panel_desc logicpd_type_28 = { · 2494 unmodified lines | |||
| 2495 | .bus_format = MEDIA_BUS_FMT_RGB888_1X24, | 2495 | .bus_format = MEDIA_BUS_FMT_RGB888_1X24, |
| 2496 | .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE | | 2496 | .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE | |
| 2497 | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE, | 2497 | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE, |
| 2498 | .connector_type = DRM_MODE_CONNECTOR_DPI, | ||
| 2498 | }; | 2499 | }; |
| 2499 | 2500 | ||
| 2500 | static const struct panel_desc mitsubishi_aa070mc01 = { | 2501 | static const struct panel_desc mitsubishi_aa070mc01 = { |
| @@ -2663,6 +2664,7 @@ static const struct panel_desc newhaven_nhd_43_480272ef_atxl = { · 162 unmodified lines | |||
| 2663 | .bus_format = MEDIA_BUS_FMT_RGB888_1X24, | 2664 | .bus_format = MEDIA_BUS_FMT_RGB888_1X24, |
| 2664 | .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE | | 2665 | .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE | |
| 2665 | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE, | 2666 | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE, |
| 2667 | .connector_type = DRM_MODE_CONNECTOR_DPI, | ||
| 2666 | }; | 2668 | }; |
| 2667 | 2669 | ||
| 2668 | static const struct display_timing nlt_nl192108ac18_02d_timing = { | 2670 | static const struct display_timing nlt_nl192108ac18_02d_timing = { |
| @@ -5563,6 +5563,7 @@ static int ci_parse_power_table(struct radeon_device *rdev) · 5562 unmodified lines | |||
| 5563 | if (!rdev->pm.dpm.ps) | 5563 | if (!rdev->pm.dpm.ps) |
| 5564 | return -ENOMEM; | 5564 | return -ENOMEM; |
| 5565 | power_state_offset = (u8 *)state_array->states; | 5565 | power_state_offset = (u8 *)state_array->states; |
| 5566 | rdev->pm.dpm.num_ps = 0; | ||
| 5566 | for (i = 0; i < state_array->ucNumEntries; i++) { | 5567 | for (i = 0; i < state_array->ucNumEntries; i++) { |
| 5567 | u8 *idx; | 5568 | u8 *idx; |
| 5568 | power_state = (union pplib_power_state *)power_state_offset; | 5569 | power_state = (union pplib_power_state *)power_state_offset; |
| @@ -5572,10 +5573,8 @@ static int ci_parse_power_table(struct radeon_device *rdev) · 3 unmodified lines | |||
| 5572 | if (!rdev->pm.power_state[i].clock_info) | 5573 | if (!rdev->pm.power_state[i].clock_info) |
| 5573 | return -EINVAL; | 5574 | return -EINVAL; |
| 5574 | ps = kzalloc(sizeof(struct ci_ps), GFP_KERNEL); | 5575 | ps = kzalloc(sizeof(struct ci_ps), GFP_KERNEL); |
| 5575 | if (ps == NULL) { | 5576 | if (ps == NULL) |
| 5576 | kfree(rdev->pm.dpm.ps); | ||
| 5577 | return -ENOMEM; | 5577 | return -ENOMEM; |
| 5578 | } | ||
| 5579 | rdev->pm.dpm.ps[i].ps_priv = ps; | 5578 | rdev->pm.dpm.ps[i].ps_priv = ps; |
| 5580 | ci_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], | 5579 | ci_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i], |
| 5581 | non_clock_info, | 5580 | non_clock_info, |
| @@ -5597,8 +5596,8 @@ static int ci_parse_power_table(struct radeon_device *rdev) · 15 unmodified lines | |||
| 5597 | k++; | 5596 | k++; |
| 5598 | } | 5597 | } |
| 5599 | power_state_offset += 2 + power_state->v2.ucNumDPMLevels; | 5598 | power_state_offset += 2 + power_state->v2.ucNumDPMLevels; |
| 5599 | rdev->pm.dpm.num_ps = i + 1; | ||
| 5600 | } | 5600 | } |
| 5601 | rdev->pm.dpm.num_ps = state_array->ucNumEntries; | ||
| 5602 | 5601 | ||
| 5603 | /* fill in the vce power states */ | 5602 | /* fill in the vce power states */ |
| 5604 | for (i = 0; i < RADEON_MAX_VCE_LEVELS; i++) { | 5603 | for (i = 0; i < RADEON_MAX_VCE_LEVELS; i++) { |
| @@ -2127,7 +2127,7 @@ static int ni_init_smc_spll_table(struct radeon_device *rdev) · 2126 unmodified lines | |||
| 2127 | if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) | 2127 | if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) |
| 2128 | ret = -EINVAL; | 2128 | ret = -EINVAL; |
| 2129 | 2129 | ||
| 2130 | if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) | 2130 | if (fb_div & ~(SMC_NISLANDS_SPLL_DIV_TABLE_FBDIV_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_FBDIV_SHIFT)) |
| 2131 | ret = -EINVAL; | 2131 | ret = -EINVAL; |
| 2132 | 2132 | ||
| 2133 | if (clk_v & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT)) | 2133 | if (clk_v & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKV_SHIFT)) |
| @@ -31,6 +31,7 @@ config DRM_RCAR_DW_HDMI · 30 unmodified lines | |||
| 31 | config DRM_RCAR_LVDS | 31 | config DRM_RCAR_LVDS |
| 32 | tristate "R-Car DU LVDS Encoder Support" | 32 | tristate "R-Car DU LVDS Encoder Support" |
| 33 | depends on DRM && DRM_BRIDGE && OF | 33 | depends on DRM && DRM_BRIDGE && OF |
| 34 | select DRM_KMS_HELPER | ||
| 34 | select DRM_PANEL | 35 | select DRM_PANEL |
| 35 | select OF_FLATTREE | 36 | select OF_FLATTREE |
| 36 | select OF_OVERLAY | 37 | select OF_OVERLAY |
| @@ -259,9 +259,8 @@ sun4i_hdmi_connector_detect(struct drm_connector *connector, bool force) · 258 unmodified lines | |||
| 259 | struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector); | 259 | struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector); |
| 260 | unsigned long reg; | 260 | unsigned long reg; |
| 261 | 261 | ||
| 262 | if (readl_poll_timeout(hdmi->base + SUN4I_HDMI_HPD_REG, reg, | 262 | reg = readl(hdmi->base + SUN4I_HDMI_HPD_REG); |
| 263 | reg & SUN4I_HDMI_HPD_HIGH, | 263 | if (reg & SUN4I_HDMI_HPD_HIGH) { |
| 264 | 0, 500000)) { | ||
| 265 | cec_phys_addr_invalidate(hdmi->cec_adap); | 264 | cec_phys_addr_invalidate(hdmi->cec_adap); |
| 266 | return connector_status_disconnected; | 265 | return connector_status_disconnected; |
| 267 | } | 266 | } |
| @@ -363,6 +363,19 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, · 362 unmodified lines | |||
| 363 | mixer->engine.ops = &sun8i_engine_ops; | 363 | mixer->engine.ops = &sun8i_engine_ops; |
| 364 | mixer->engine.node = dev->of_node; | 364 | mixer->engine.node = dev->of_node; |
| 365 | 365 | ||
| 366 | if (of_find_property(dev->of_node, "iommus", NULL)) { | ||
| 367 | /* | ||
| 368 | * This assume we have the same DMA constraints for | ||
| 369 | * all our the mixers in our pipeline. This sounds | ||
| 370 | * bad, but it has always been the case for us, and | ||
| 371 | * DRM doesn't do per-device allocation either, so we | ||
| 372 | * would need to fix DRM first... | ||
| 373 | */ | ||
| 374 | ret = of_dma_configure(drm->dev, dev->of_node, true); | ||
| 375 | if (ret) | ||
| 376 | return ret; | ||
| 377 | } | ||
| 378 | |||
| 366 | /* | 379 | /* |
| 367 | * While this function can fail, we shouldn't do anything | 380 | * While this function can fail, we shouldn't do anything |
| 368 | * if this happens. Some early DE2 DT entries don't provide | 381 | * if this happens. Some early DE2 DT entries don't provide |
| @@ -957,6 +957,7 @@ static struct drm_plane *tegra_dc_cursor_plane_create(struct drm_device *drm, · 956 unmodified lines | |||
| 957 | } | 957 | } |
| 958 | 958 | ||
| 959 | drm_plane_helper_add(&plane->base, &tegra_cursor_plane_helper_funcs); | 959 | drm_plane_helper_add(&plane->base, &tegra_cursor_plane_helper_funcs); |
| 960 | drm_plane_create_zpos_immutable_property(&plane->base, 255); | ||
| 960 | 961 | ||
| 961 | return &plane->base; | 962 | return &plane->base; |
| 962 | } | 963 | } |
| @@ -149,7 +149,9 @@ int tegra_display_hub_prepare(struct tegra_display_hub *hub) · 148 unmodified lines | |||
| 149 | for (i = 0; i < hub->soc->num_wgrps; i++) { | 149 | for (i = 0; i < hub->soc->num_wgrps; i++) { |
| 150 | struct tegra_windowgroup *wgrp = &hub->wgrps[i]; | 150 | struct tegra_windowgroup *wgrp = &hub->wgrps[i]; |
| 151 | 151 | ||
| 152 | tegra_windowgroup_enable(wgrp); | 152 | /* Skip orphaned window group whose parent DC is disabled */ |
| 153 | if (wgrp->parent) | ||
| 154 | tegra_windowgroup_enable(wgrp); | ||
| 153 | } | 155 | } |
| 154 | 156 | ||
| 155 | return 0; | 157 | return 0; |
| @@ -166,7 +168,9 @@ void tegra_display_hub_cleanup(struct tegra_display_hub *hub) · 10 unmodified lines | |||
| 166 | for (i = 0; i < hub->soc->num_wgrps; i++) { | 168 | for (i = 0; i < hub->soc->num_wgrps; i++) { |
| 167 | struct tegra_windowgroup *wgrp = &hub->wgrps[i]; | 169 | struct tegra_windowgroup *wgrp = &hub->wgrps[i]; |
| 168 | 170 | ||
| 169 | tegra_windowgroup_disable(wgrp); | 171 | /* Skip orphaned window group whose parent DC is disabled */ |
| 172 | if (wgrp->parent) | ||
| 173 | tegra_windowgroup_disable(wgrp); | ||
| 170 | } | 174 | } |
| 171 | } | 175 | } |
| 172 | 176 | ||
| @@ -944,6 +948,15 @@ static int tegra_display_hub_probe(struct platform_device *pdev) · 771 unmodified lines | |||
| 944 | dev_err(&pdev->dev, "failed to register host1x client: %d\n", | 948 | dev_err(&pdev->dev, "failed to register host1x client: %d\n", |
| 945 | err); | 949 | err); |
| 946 | 950 | ||
| 951 | err = devm_of_platform_populate(&pdev->dev); | ||
| 952 | if (err < 0) | ||
| 953 | goto unregister; | ||
| 954 | |||
| 955 | return err; | ||
| 956 | |||
| 957 | unregister: | ||
| 958 | host1x_client_unregister(&hub->client); | ||
| 959 | pm_runtime_disable(&pdev->dev); | ||
| 947 | return err; | 960 | return err; |
| 948 | } | 961 | } |
| 949 | 962 | ||
| @@ -883,8 +883,10 @@ static int ttm_bo_add_move_fence(struct ttm_buffer_object *bo, · 882 unmodified lines | |||
| 883 | if (!fence) | 883 | if (!fence) |
| 884 | return 0; | 884 | return 0; |
| 885 | 885 | ||
| 886 | if (no_wait_gpu) | 886 | if (no_wait_gpu) { |
| 887 | dma_fence_put(fence); | ||
| 887 | return -EBUSY; | 888 | return -EBUSY; |
| 889 | } | ||
| 888 | 890 | ||
| 889 | dma_resv_add_shared_fence(bo->base.resv, fence); | 891 | dma_resv_add_shared_fence(bo->base.resv, fence); |
| 890 | 892 | ||
| @@ -300,8 +300,10 @@ vm_fault_t ttm_bo_vm_fault_reserved(struct vm_fault *vmf, · 299 unmodified lines | |||
| 300 | break; | 300 | break; |
| 301 | case -EBUSY: | 301 | case -EBUSY: |
| 302 | case -ERESTARTSYS: | 302 | case -ERESTARTSYS: |
| 303 | dma_fence_put(moving); | ||
| 303 | return VM_FAULT_NOPAGE; | 304 | return VM_FAULT_NOPAGE; |
| 304 | default: | 305 | default: |
| 306 | dma_fence_put(moving); | ||
| 305 | return VM_FAULT_SIGBUS; | 307 | return VM_FAULT_SIGBUS; |
| 306 | } | 308 | } |
| 307 | 309 | ||
| @@ -1069,10 +1069,6 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 1068 unmodified lines | |||
| 1069 | if (new_content_type != SAME_AS_DISPLAY) { | 1069 | if (new_content_type != SAME_AS_DISPLAY) { |
| 1070 | struct vmw_surface_metadata metadata = {0}; | 1070 | struct vmw_surface_metadata metadata = {0}; |
| 1071 | 1071 | ||
| 1072 | metadata.base_size.width = hdisplay; | ||
| 1073 | metadata.base_size.height = vdisplay; | ||
| 1074 | metadata.base_size.depth = 1; | ||
| 1075 | |||
| 1076 | /* | 1072 | /* |
| 1077 | * If content buffer is a buffer object, then we have to | 1073 | * If content buffer is a buffer object, then we have to |
| 1078 | * construct surface info | 1074 | * construct surface info |
| @@ -1104,6 +1100,10 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 25 unmodified lines | |||
| 1104 | metadata = new_vfbs->surface->metadata; | 1100 | metadata = new_vfbs->surface->metadata; |
| 1105 | } | 1101 | } |
| 1106 | 1102 | ||
| 1103 | metadata.base_size.width = hdisplay; | ||
| 1104 | metadata.base_size.height = vdisplay; | ||
| 1105 | metadata.base_size.depth = 1; | ||
| 1106 | |||
| 1107 | if (vps->surf) { | 1107 | if (vps->surf) { |
| 1108 | struct drm_vmw_size cur_base_size = | 1108 | struct drm_vmw_size cur_base_size = |
| 1109 | vps->surf->metadata.base_size; | 1109 | vps->surf->metadata.base_size; |
| @@ -686,8 +686,17 @@ EXPORT_SYMBOL(host1x_driver_register_full); · 685 unmodified lines | |||
| 686 | */ | 686 | */ |
| 687 | void host1x_driver_unregister(struct host1x_driver *driver) | 687 | void host1x_driver_unregister(struct host1x_driver *driver) |
| 688 | { | 688 | { |
| 689 | struct host1x *host1x; | ||
| 690 | |||
| 689 | driver_unregister(&driver->driver); | 691 | driver_unregister(&driver->driver); |
| 690 | 692 | ||
| 693 | mutex_lock(&devices_lock); | ||
| 694 | |||
| 695 | list_for_each_entry(host1x, &devices, list) | ||
| 696 | host1x_detach_driver(host1x, driver); | ||
| 697 | |||
| 698 | mutex_unlock(&devices_lock); | ||
| 699 | |||
| 691 | mutex_lock(&drivers_lock); | 700 | mutex_lock(&drivers_lock); |
| 692 | list_del_init(&driver->list); | 701 | list_del_init(&driver->list); |
| 693 | mutex_unlock(&drivers_lock); | 702 | mutex_unlock(&drivers_lock); |
| @@ -468,11 +468,18 @@ static int host1x_probe(struct platform_device *pdev) · 467 unmodified lines | |||
| 468 | 468 | ||
| 469 | err = host1x_register(host); | 469 | err = host1x_register(host); |
| 470 | if (err < 0) | 470 | if (err < 0) |
| 471 | goto deinit_intr; | 471 | goto deinit_debugfs; |
| 472 | |||
| 473 | err = devm_of_platform_populate(&pdev->dev); | ||
| 474 | if (err < 0) | ||
| 475 | goto unregister; | ||
| 472 | 476 | ||
| 473 | return 0; | 477 | return 0; |
| 474 | 478 | ||
| 475 | deinit_intr: | 479 | unregister: |
| 480 | host1x_unregister(host); | ||
| 481 | deinit_debugfs: | ||
| 482 | host1x_debug_deinit(host); | ||
| 476 | host1x_intr_deinit(host); | 483 | host1x_intr_deinit(host); |
| 477 | deinit_syncpt: | 484 | deinit_syncpt: |
| 478 | host1x_syncpt_deinit(host); | 485 | host1x_syncpt_deinit(host); |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | |||
| 25 | 25 | ||
| 26 | #define U1_MOUSE_REPORT_ID 0x01 /* Mouse data ReportID */ | 26 | #define U1_MOUSE_REPORT_ID 0x01 /* Mouse data ReportID */ |
| 27 | #define U1_ABSOLUTE_REPORT_ID 0x03 /* Absolute data ReportID */ | 27 | #define U1_ABSOLUTE_REPORT_ID 0x03 /* Absolute data ReportID */ |
| 28 | #define U1_ABSOLUTE_REPORT_ID_SECD 0x02 /* FW-PTP Absolute data ReportID */ | ||
| 28 | #define U1_FEATURE_REPORT_ID 0x05 /* Feature ReportID */ | 29 | #define U1_FEATURE_REPORT_ID 0x05 /* Feature ReportID */ |
| 29 | #define U1_SP_ABSOLUTE_REPORT_ID 0x06 /* Feature ReportID */ | 30 | #define U1_SP_ABSOLUTE_REPORT_ID 0x06 /* Feature ReportID */ |
| 30 | 31 | ||
| @@ -368,6 +369,7 @@ static int u1_raw_event(struct alps_dev *hdata, u8 *data, int size) · 337 unmodified lines | |||
| 368 | case U1_FEATURE_REPORT_ID: | 369 | case U1_FEATURE_REPORT_ID: |
| 369 | break; | 370 | break; |
| 370 | case U1_ABSOLUTE_REPORT_ID: | 371 | case U1_ABSOLUTE_REPORT_ID: |
| 372 | case U1_ABSOLUTE_REPORT_ID_SECD: | ||
| 371 | for (i = 0; i < hdata->max_fingers; i++) { | 373 | for (i = 0; i < hdata->max_fingers; i++) { |
| 372 | u8 *contact = &data[i * 5]; | 374 | u8 *contact = &data[i * 5]; |
| 373 | 375 | ||
| @@ -60,6 +60,7 @@ MODULE_PARM_DESC(swap_fn_leftctrl, "Swap the Fn and left Control keys. " · 59 unmodified lines | |||
| 60 | struct apple_sc { | 60 | struct apple_sc { |
| 61 | unsigned long quirks; | 61 | unsigned long quirks; |
| 62 | unsigned int fn_on; | 62 | unsigned int fn_on; |
| 63 | unsigned int fn_found; | ||
| 63 | DECLARE_BITMAP(pressed_numlock, KEY_CNT); | 64 | DECLARE_BITMAP(pressed_numlock, KEY_CNT); |
| 64 | }; | 65 | }; |
| 65 | 66 | ||
| @@ -365,12 +366,15 @@ static int apple_input_mapping(struct hid_device *hdev, struct hid_input *hi, · 299 unmodified lines | |||
| 365 | struct hid_field *field, struct hid_usage *usage, | 366 | struct hid_field *field, struct hid_usage *usage, |
| 366 | unsigned long **bit, int *max) | 367 | unsigned long **bit, int *max) |
| 367 | { | 368 | { |
| 369 | struct apple_sc *asc = hid_get_drvdata(hdev); | ||
| 370 | |||
| 368 | if (usage->hid == (HID_UP_CUSTOM | 0x0003) || | 371 | if (usage->hid == (HID_UP_CUSTOM | 0x0003) || |
| 369 | usage->hid == (HID_UP_MSVENDOR | 0x0003) || | 372 | usage->hid == (HID_UP_MSVENDOR | 0x0003) || |
| 370 | usage->hid == (HID_UP_HPVENDOR2 | 0x0003)) { | 373 | usage->hid == (HID_UP_HPVENDOR2 | 0x0003)) { |
| 371 | /* The fn key on Apple USB keyboards */ | 374 | /* The fn key on Apple USB keyboards */ |
| 372 | set_bit(EV_REP, hi->input->evbit); | 375 | set_bit(EV_REP, hi->input->evbit); |
| 373 | hid_map_usage_clear(hi, usage, bit, max, EV_KEY, KEY_FN); | 376 | hid_map_usage_clear(hi, usage, bit, max, EV_KEY, KEY_FN); |
| 377 | asc->fn_found = true; | ||
| 374 | apple_setup_input(hi->input); | 378 | apple_setup_input(hi->input); |
| 375 | return 1; | 379 | return 1; |
| 376 | } | 380 | } |
| @@ -397,6 +401,19 @@ static int apple_input_mapped(struct hid_device *hdev, struct hid_input *hi, · 20 unmodified lines | |||
| 397 | return 0; | 401 | return 0; |
| 398 | } | 402 | } |
| 399 | 403 | ||
| 404 | static int apple_input_configured(struct hid_device *hdev, | ||
| 405 | struct hid_input *hidinput) | ||
| 406 | { | ||
| 407 | struct apple_sc *asc = hid_get_drvdata(hdev); | ||
| 408 | |||
| 409 | if ((asc->quirks & APPLE_HAS_FN) && !asc->fn_found) { | ||
| 410 | hid_info(hdev, "Fn key not found (Apple Wireless Keyboard clone?), disabling Fn key handling\n"); | ||
| 411 | asc->quirks = 0; | ||
| 412 | } | ||
| 413 | |||
| 414 | return 0; | ||
| 415 | } | ||
| 416 | |||
| 400 | static int apple_probe(struct hid_device *hdev, | 417 | static int apple_probe(struct hid_device *hdev, |
| 401 | const struct hid_device_id *id) | 418 | const struct hid_device_id *id) |
| 402 | { | 419 | { |
| @@ -611,6 +628,7 @@ static struct hid_driver apple_driver = { · 208 unmodified lines | |||
| 611 | .event = apple_event, | 628 | .event = apple_event, |
| 612 | .input_mapping = apple_input_mapping, | 629 | .input_mapping = apple_input_mapping, |
| 613 | .input_mapped = apple_input_mapped, | 630 | .input_mapped = apple_input_mapped, |
| 631 | .input_configured = apple_input_configured, | ||
| 614 | }; | 632 | }; |
| 615 | module_hid_driver(apple_driver); | 633 | module_hid_driver(apple_driver); |
| 616 | 634 | ||
| @@ -618,6 +618,7 @@ · 617 unmodified lines | |||
| 618 | #define USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A081 0xa081 | 618 | #define USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A081 0xa081 |
| 619 | #define USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A0C2 0xa0c2 | 619 | #define USB_DEVICE_ID_HOLTEK_ALT_MOUSE_A0C2 0xa0c2 |
| 620 | #define USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A096 0xa096 | 620 | #define USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A096 0xa096 |
| 621 | #define USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A293 0xa293 | ||
| 621 | 622 | ||
| 622 | #define USB_VENDOR_ID_IMATION 0x0718 | 623 | #define USB_VENDOR_ID_IMATION 0x0718 |
| 623 | #define USB_DEVICE_ID_DISC_STAKKA 0xd000 | 624 | #define USB_DEVICE_ID_DISC_STAKKA 0xd000 |
| @@ -998,6 +999,8 @@ · 374 unmodified lines | |||
| 998 | #define USB_DEVICE_ID_ROCCAT_RYOS_MK_PRO 0x3232 | 999 | #define USB_DEVICE_ID_ROCCAT_RYOS_MK_PRO 0x3232 |
| 999 | #define USB_DEVICE_ID_ROCCAT_SAVU 0x2d5a | 1000 | #define USB_DEVICE_ID_ROCCAT_SAVU 0x2d5a |
| 1000 | 1001 | ||
| 1002 | #define USB_VENDOR_ID_SAI 0x17dd | ||
| 1003 | |||
| 1001 | #define USB_VENDOR_ID_SAITEK 0x06a3 | 1004 | #define USB_VENDOR_ID_SAITEK 0x06a3 |
| 1002 | #define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff17 | 1005 | #define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff17 |
| 1003 | #define USB_DEVICE_ID_SAITEK_PS1000 0x0621 | 1006 | #define USB_DEVICE_ID_SAITEK_PS1000 0x0621 |
| @@ -1153,7 +1153,7 @@ static int logi_dj_recv_query_paired_devices(struct dj_receiver_dev *djrcv_dev) · 1152 unmodified lines | |||
| 1153 | if (!dj_report) | 1153 | if (!dj_report) |
| 1154 | return -ENOMEM; | 1154 | return -ENOMEM; |
| 1155 | dj_report->report_id = REPORT_ID_DJ_SHORT; | 1155 | dj_report->report_id = REPORT_ID_DJ_SHORT; |
| 1156 | dj_report->device_index = 0xFF; | 1156 | dj_report->device_index = HIDPP_RECEIVER_INDEX; |
| 1157 | dj_report->report_type = REPORT_TYPE_CMD_GET_PAIRED_DEVICES; | 1157 | dj_report->report_type = REPORT_TYPE_CMD_GET_PAIRED_DEVICES; |
| 1158 | retval = logi_dj_recv_send_report(djrcv_dev, dj_report); | 1158 | retval = logi_dj_recv_send_report(djrcv_dev, dj_report); |
| 1159 | kfree(dj_report); | 1159 | kfree(dj_report); |
| @@ -1175,7 +1175,7 @@ static int logi_dj_recv_switch_to_dj_mode(struct dj_receiver_dev *djrcv_dev, · 15 unmodified lines | |||
| 1175 | 1175 | ||
| 1176 | if (djrcv_dev->type == recvr_type_dj) { | 1176 | if (djrcv_dev->type == recvr_type_dj) { |
| 1177 | dj_report->report_id = REPORT_ID_DJ_SHORT; | 1177 | dj_report->report_id = REPORT_ID_DJ_SHORT; |
| 1178 | dj_report->device_index = 0xFF; | 1178 | dj_report->device_index = HIDPP_RECEIVER_INDEX; |
| 1179 | dj_report->report_type = REPORT_TYPE_CMD_SWITCH; | 1179 | dj_report->report_type = REPORT_TYPE_CMD_SWITCH; |
| 1180 | dj_report->report_params[CMD_SWITCH_PARAM_DEVBITFIELD] = 0x3F; | 1180 | dj_report->report_params[CMD_SWITCH_PARAM_DEVBITFIELD] = 0x3F; |
| 1181 | dj_report->report_params[CMD_SWITCH_PARAM_TIMEOUT_SECONDS] = | 1181 | dj_report->report_params[CMD_SWITCH_PARAM_TIMEOUT_SECONDS] = |
| @@ -1204,7 +1204,7 @@ static int logi_dj_recv_switch_to_dj_mode(struct dj_receiver_dev *djrcv_dev, · 22 unmodified lines | |||
| 1204 | memset(buf, 0, HIDPP_REPORT_SHORT_LENGTH); | 1204 | memset(buf, 0, HIDPP_REPORT_SHORT_LENGTH); |
| 1205 | 1205 | ||
| 1206 | buf[0] = REPORT_ID_HIDPP_SHORT; | 1206 | buf[0] = REPORT_ID_HIDPP_SHORT; |
| 1207 | buf[1] = 0xFF; | 1207 | buf[1] = HIDPP_RECEIVER_INDEX; |
| 1208 | buf[2] = 0x80; | 1208 | buf[2] = 0x80; |
| 1209 | buf[3] = 0x00; | 1209 | buf[3] = 0x00; |
| 1210 | buf[4] = 0x00; | 1210 | buf[4] = 0x00; |
| @@ -3146,7 +3146,7 @@ static int hi_res_scroll_enable(struct hidpp_device *hidpp) · 3145 unmodified lines | |||
| 3146 | multiplier = 1; | 3146 | multiplier = 1; |
| 3147 | 3147 | ||
| 3148 | hidpp->vertical_wheel_counter.wheel_multiplier = multiplier; | 3148 | hidpp->vertical_wheel_counter.wheel_multiplier = multiplier; |
| 3149 | hid_info(hidpp->hid_dev, "multiplier = %d\n", multiplier); | 3149 | hid_dbg(hidpp->hid_dev, "wheel multiplier = %d\n", multiplier); |
| 3150 | return 0; | 3150 | return 0; |
| 3151 | } | 3151 | } |
| 3152 | 3152 | ||
| @@ -535,6 +535,12 @@ static int magicmouse_setup_input(struct input_dev *input, struct hid_device *hd · 534 unmodified lines | |||
| 535 | __set_bit(MSC_RAW, input->mscbit); | 535 | __set_bit(MSC_RAW, input->mscbit); |
| 536 | } | 536 | } |
| 537 | 537 | ||
| 538 | /* | ||
| 539 | * hid-input may mark device as using autorepeat, but neither | ||
| 540 | * the trackpad, nor the mouse actually want it. | ||
| 541 | */ | ||
| 542 | __clear_bit(EV_REP, input->evbit); | ||
| 543 | |||
| 538 | return 0; | 544 | return 0; |
| 539 | } | 545 | } |
| 540 | 546 | ||
| @@ -88,6 +88,7 @@ static const struct hid_device_id hid_quirks[] = { · 87 unmodified lines | |||
| 88 | { HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, | 88 | { HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, |
| 89 | { HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FLYING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, | 89 | { HID_USB_DEVICE(USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FLYING), HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, |
| 90 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A096), HID_QUIRK_NO_INIT_REPORTS }, | 90 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A096), HID_QUIRK_NO_INIT_REPORTS }, |
| 91 | { HID_USB_DEVICE(USB_VENDOR_ID_HOLTEK_ALT, USB_DEVICE_ID_HOLTEK_ALT_KEYBOARD_A293), HID_QUIRK_ALWAYS_POLL }, | ||
| 91 | { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0A4A), HID_QUIRK_ALWAYS_POLL }, | 92 | { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0A4A), HID_QUIRK_ALWAYS_POLL }, |
| 92 | { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A), HID_QUIRK_ALWAYS_POLL }, | 93 | { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A), HID_QUIRK_ALWAYS_POLL }, |
| 93 | { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE), HID_QUIRK_ALWAYS_POLL }, | 94 | { HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE), HID_QUIRK_ALWAYS_POLL }, |
| @@ -832,6 +833,7 @@ static const struct hid_device_id hid_ignore_list[] = { · 738 unmodified lines | |||
| 832 | { HID_USB_DEVICE(USB_VENDOR_ID_PETZL, USB_DEVICE_ID_PETZL_HEADLAMP) }, | 833 | { HID_USB_DEVICE(USB_VENDOR_ID_PETZL, USB_DEVICE_ID_PETZL_HEADLAMP) }, |
| 833 | { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS, USB_DEVICE_ID_PHILIPS_IEEE802154_DONGLE) }, | 834 | { HID_USB_DEVICE(USB_VENDOR_ID_PHILIPS, USB_DEVICE_ID_PHILIPS_IEEE802154_DONGLE) }, |
| 834 | { HID_USB_DEVICE(USB_VENDOR_ID_POWERCOM, USB_DEVICE_ID_POWERCOM_UPS) }, | 835 | { HID_USB_DEVICE(USB_VENDOR_ID_POWERCOM, USB_DEVICE_ID_POWERCOM_UPS) }, |
| 836 | { HID_USB_DEVICE(USB_VENDOR_ID_SAI, USB_DEVICE_ID_CYPRESS_HIDCOM) }, | ||
| 835 | #if IS_ENABLED(CONFIG_MOUSE_SYNAPTICS_USB) | 837 | #if IS_ENABLED(CONFIG_MOUSE_SYNAPTICS_USB) |
| 836 | { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_TP) }, | 838 | { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_TP) }, |
| 837 | { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_INT_TP) }, | 839 | { HID_USB_DEVICE(USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_INT_TP) }, |
| @@ -526,7 +526,8 @@ static int steam_register(struct steam_device *steam) · 525 unmodified lines | |||
| 526 | steam_battery_register(steam); | 526 | steam_battery_register(steam); |
| 527 | 527 | ||
| 528 | mutex_lock(&steam_devices_lock); | 528 | mutex_lock(&steam_devices_lock); |
| 529 | list_add(&steam->list, &steam_devices); | 529 | if (list_empty(&steam->list)) |
| 530 | list_add(&steam->list, &steam_devices); | ||
| 530 | mutex_unlock(&steam_devices_lock); | 531 | mutex_unlock(&steam_devices_lock); |
| 531 | } | 532 | } |
| 532 | 533 | ||
| @@ -552,7 +553,7 @@ static void steam_unregister(struct steam_device *steam) · 19 unmodified lines | |||
| 552 | hid_info(steam->hdev, "Steam Controller '%s' disconnected", | 553 | hid_info(steam->hdev, "Steam Controller '%s' disconnected", |
| 553 | steam->serial_no); | 554 | steam->serial_no); |
| 554 | mutex_lock(&steam_devices_lock); | 555 | mutex_lock(&steam_devices_lock); |
| 555 | list_del(&steam->list); | 556 | list_del_init(&steam->list); |
| 556 | mutex_unlock(&steam_devices_lock); | 557 | mutex_unlock(&steam_devices_lock); |
| 557 | steam->serial_no[0] = 0; | 558 | steam->serial_no[0] = 0; |
| 558 | } | 559 | } |
| @@ -738,6 +739,7 @@ static int steam_probe(struct hid_device *hdev, · 179 unmodified lines | |||
| 738 | mutex_init(&steam->mutex); | 739 | mutex_init(&steam->mutex); |
| 739 | steam->quirks = id->driver_data; | 740 | steam->quirks = id->driver_data; |
| 740 | INIT_WORK(&steam->work_connect, steam_work_connect_cb); | 741 | INIT_WORK(&steam->work_connect, steam_work_connect_cb); |
| 742 | INIT_LIST_HEAD(&steam->list); | ||
| 741 | 743 | ||
| 742 | steam->client_hdev = steam_create_client_hid(hdev); | 744 | steam->client_hdev = steam_create_client_hid(hdev); |
| 743 | if (IS_ERR(steam->client_hdev)) { | 745 | if (IS_ERR(steam->client_hdev)) { |
| @@ -373,6 +373,14 @@ static const struct dmi_system_id i2c_hid_dmi_desc_override_table[] = { · 372 unmodified lines | |||
| 373 | }, | 373 | }, |
| 374 | .driver_data = (void *)&sipodev_desc | 374 | .driver_data = (void *)&sipodev_desc |
| 375 | }, | 375 | }, |
| 376 | { | ||
| 377 | .ident = "Mediacom FlexBook edge 13", | ||
| 378 | .matches = { | ||
| 379 | DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MEDIACOM"), | ||
| 380 | DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "FlexBook_edge13-M-FBE13"), | ||
| 381 | }, | ||
| 382 | .driver_data = (void *)&sipodev_desc | ||
| 383 | }, | ||
| 376 | { | 384 | { |
| 377 | .ident = "Odys Winbook 13", | 385 | .ident = "Odys Winbook 13", |
| 378 | .matches = { | 386 | .matches = { |
| @@ -1368,7 +1368,7 @@ static void hv_kmsg_dump(struct kmsg_dumper *dumper, · 1367 unmodified lines | |||
| 1368 | * Write dump contents to the page. No need to synchronize; panic should | 1368 | * Write dump contents to the page. No need to synchronize; panic should |
| 1369 | * be single-threaded. | 1369 | * be single-threaded. |
| 1370 | */ | 1370 | */ |
| 1371 | kmsg_dump_get_buffer(dumper, true, hv_panic_page, HV_HYP_PAGE_SIZE, | 1371 | kmsg_dump_get_buffer(dumper, false, hv_panic_page, HV_HYP_PAGE_SIZE, |
| 1372 | &bytes_written); | 1372 | &bytes_written); |
| 1373 | if (bytes_written) | 1373 | if (bytes_written) |
| 1374 | hyperv_report_panic_msg(panic_pa, bytes_written); | 1374 | hyperv_report_panic_msg(panic_pa, bytes_written); |
| @@ -883,7 +883,7 @@ static int acpi_power_meter_add(struct acpi_device *device) · 882 unmodified lines | |||
| 883 | 883 | ||
| 884 | res = setup_attrs(resource); | 884 | res = setup_attrs(resource); |
| 885 | if (res) | 885 | if (res) |
| 886 | goto exit_free; | 886 | goto exit_free_capability; |
| 887 | 887 | ||
| 888 | resource->hwmon_dev = hwmon_device_register(&device->dev); | 888 | resource->hwmon_dev = hwmon_device_register(&device->dev); |
| 889 | if (IS_ERR(resource->hwmon_dev)) { | 889 | if (IS_ERR(resource->hwmon_dev)) { |
| @@ -896,6 +896,8 @@ static int acpi_power_meter_add(struct acpi_device *device) · 6 unmodified lines | |||
| 896 | 896 | ||
| 897 | exit_remove: | 897 | exit_remove: |
| 898 | remove_attrs(resource); | 898 | remove_attrs(resource); |
| 899 | exit_free_capability: | ||
| 900 | free_capabilities(resource); | ||
| 899 | exit_free: | 901 | exit_free: |
| 900 | kfree(resource); | 902 | kfree(resource); |
| 901 | exit: | 903 | exit: |
| @@ -362,7 +362,7 @@ static struct platform_driver amd_energy_driver = { · 361 unmodified lines | |||
| 362 | static struct platform_device *amd_energy_platdev; | 362 | static struct platform_device *amd_energy_platdev; |
| 363 | 363 | ||
| 364 | static const struct x86_cpu_id cpu_ids[] __initconst = { | 364 | static const struct x86_cpu_id cpu_ids[] __initconst = { |
| 365 | X86_MATCH_VENDOR_FAM(AMD, 0x17, NULL), | 365 | X86_MATCH_VENDOR_FAM_MODEL(AMD, 0x17, 0x31, NULL), |
| 366 | {} | 366 | {} |
| 367 | }; | 367 | }; |
| 368 | MODULE_DEVICE_TABLE(x86cpu, cpu_ids); | 368 | MODULE_DEVICE_TABLE(x86cpu, cpu_ids); |
| @@ -851,6 +851,8 @@ static int aspeed_create_fan(struct device *dev, · 850 unmodified lines | |||
| 851 | ret = of_property_read_u32(child, "reg", &pwm_port); | 851 | ret = of_property_read_u32(child, "reg", &pwm_port); |
| 852 | if (ret) | 852 | if (ret) |
| 853 | return ret; | 853 | return ret; |
| 854 | if (pwm_port >= ARRAY_SIZE(pwm_port_params)) | ||
| 855 | return -EINVAL; | ||
| 854 | aspeed_create_pwm_port(priv, (u8)pwm_port); | 856 | aspeed_create_pwm_port(priv, (u8)pwm_port); |
| 855 | 857 | ||
| 856 | ret = of_property_count_u8_elems(child, "cooling-levels"); | 858 | ret = of_property_count_u8_elems(child, "cooling-levels"); |
| @@ -64,7 +64,7 @@ static const struct pvt_sensor_info pvt_info[] = { · 63 unmodified lines | |||
| 64 | * 48380, | 64 | * 48380, |
| 65 | * where T = [-48380, 147438] mC and N = [0, 1023]. | 65 | * where T = [-48380, 147438] mC and N = [0, 1023]. |
| 66 | */ | 66 | */ |
| 67 | static const struct pvt_poly poly_temp_to_N = { | 67 | static const struct pvt_poly __maybe_unused poly_temp_to_N = { |
| 68 | .total_divider = 10000, | 68 | .total_divider = 10000, |
| 69 | .terms = { | 69 | .terms = { |
| 70 | {4, 18322, 10000, 10000}, | 70 | {4, 18322, 10000, 10000}, |
| @@ -96,7 +96,7 @@ static const struct pvt_poly poly_N_to_temp = { · 25 unmodified lines | |||
| 96 | * N = (18658e-3*V - 11572) / 10, | 96 | * N = (18658e-3*V - 11572) / 10, |
| 97 | * V = N * 10^5 / 18658 + 11572 * 10^4 / 18658. | 97 | * V = N * 10^5 / 18658 + 11572 * 10^4 / 18658. |
| 98 | */ | 98 | */ |
| 99 | static const struct pvt_poly poly_volt_to_N = { | 99 | static const struct pvt_poly __maybe_unused poly_volt_to_N = { |
| 100 | .total_divider = 10, | 100 | .total_divider = 10, |
| 101 | .terms = { | 101 | .terms = { |
| 102 | {1, 18658, 1000, 1}, | 102 | {1, 18658, 1000, 1}, |
| @@ -300,12 +300,12 @@ static irqreturn_t pvt_soft_isr(int irq, void *data) · 197 unmodified lines | |||
| 300 | return IRQ_HANDLED; | 300 | return IRQ_HANDLED; |
| 301 | } | 301 | } |
| 302 | 302 | ||
| 303 | inline umode_t pvt_limit_is_visible(enum pvt_sensor_type type) | 303 | static inline umode_t pvt_limit_is_visible(enum pvt_sensor_type type) |
| 304 | { | 304 | { |
| 305 | return 0644; | 305 | return 0644; |
| 306 | } | 306 | } |
| 307 | 307 | ||
| 308 | inline umode_t pvt_alarm_is_visible(enum pvt_sensor_type type) | 308 | static inline umode_t pvt_alarm_is_visible(enum pvt_sensor_type type) |
| 309 | { | 309 | { |
| 310 | return 0444; | 310 | return 0444; |
| 311 | } | 311 | } |
| @@ -462,12 +462,12 @@ static irqreturn_t pvt_hard_isr(int irq, void *data) · 150 unmodified lines | |||
| 462 | 462 | ||
| 463 | #define pvt_soft_isr NULL | 463 | #define pvt_soft_isr NULL |
| 464 | 464 | ||
| 465 | inline umode_t pvt_limit_is_visible(enum pvt_sensor_type type) | 465 | static inline umode_t pvt_limit_is_visible(enum pvt_sensor_type type) |
| 466 | { | 466 | { |
| 467 | return 0; | 467 | return 0; |
| 468 | } | 468 | } |
| 469 | 469 | ||
| 470 | inline umode_t pvt_alarm_is_visible(enum pvt_sensor_type type) | 470 | static inline umode_t pvt_alarm_is_visible(enum pvt_sensor_type type) |
| 471 | { | 471 | { |
| 472 | return 0; | 472 | return 0; |
| 473 | } | 473 | } |
| @@ -285,6 +285,42 @@ static int drivetemp_get_scttemp(struct drivetemp_data *st, u32 attr, long *val) · 284 unmodified lines | |||
| 285 | return err; | 285 | return err; |
| 286 | } | 286 | } |
| 287 | 287 | ||
| 288 | static const char * const sct_avoid_models[] = { | ||
| 289 | /* | ||
| 290 | * These drives will have WRITE FPDMA QUEUED command timeouts and sometimes just | ||
| 291 | * freeze until power-cycled under heavy write loads when their temperature is | ||
| 292 | * getting polled in SCT mode. The SMART mode seems to be fine, though. | ||
| 293 | * | ||
| 294 | * While only the 3 TB model (DT01ACA3) was actually caught exhibiting the | ||
| 295 | * problem let's play safe here to avoid data corruption and ban the whole | ||
| 296 | * DT01ACAx family. | ||
| 297 | |||
| 298 | * The models from this array are prefix-matched. | ||
| 299 | */ | ||
| 300 | "TOSHIBA DT01ACA", | ||
| 301 | }; | ||
| 302 | |||
| 303 | static bool drivetemp_sct_avoid(struct drivetemp_data *st) | ||
| 304 | { | ||
| 305 | struct scsi_device *sdev = st->sdev; | ||
| 306 | unsigned int ctr; | ||
| 307 | |||
| 308 | if (!sdev->model) | ||
| 309 | return false; | ||
| 310 | |||
| 311 | /* | ||
| 312 | * The "model" field contains just the raw SCSI INQUIRY response | ||
| 313 | * "product identification" field, which has a width of 16 bytes. | ||
| 314 | * This field is space-filled, but is NOT NULL-terminated. | ||
| 315 | */ | ||
| 316 | for (ctr = 0; ctr < ARRAY_SIZE(sct_avoid_models); ctr++) | ||
| 317 | if (!strncmp(sdev->model, sct_avoid_models[ctr], | ||
| 318 | strlen(sct_avoid_models[ctr]))) | ||
| 319 | return true; | ||
| 320 | |||
| 321 | return false; | ||
| 322 | } | ||
| 323 | |||
| 288 | static int drivetemp_identify_sata(struct drivetemp_data *st) | 324 | static int drivetemp_identify_sata(struct drivetemp_data *st) |
| 289 | { | 325 | { |
| 290 | struct scsi_device *sdev = st->sdev; | 326 | struct scsi_device *sdev = st->sdev; |
| @@ -326,6 +362,13 @@ static int drivetemp_identify_sata(struct drivetemp_data *st) · 35 unmodified lines | |||
| 326 | /* bail out if this is not a SATA device */ | 362 | /* bail out if this is not a SATA device */ |
| 327 | if (!is_ata || !is_sata) | 363 | if (!is_ata || !is_sata) |
| 328 | return -ENODEV; | 364 | return -ENODEV; |
| 365 | |||
| 366 | if (have_sct && drivetemp_sct_avoid(st)) { | ||
| 367 | dev_notice(&sdev->sdev_gendev, | ||
| 368 | "will avoid using SCT for temperature monitoring\n"); | ||
| 369 | have_sct = false; | ||
| 370 | } | ||
| 371 | |||
| 329 | if (!have_sct) | 372 | if (!have_sct) |
| 330 | goto skip_sct; | 373 | goto skip_sct; |
| 331 | 374 | ||
| @@ -443,7 +443,7 @@ static ssize_t pwm1_enable_store(struct device *dev, · 442 unmodified lines | |||
| 443 | } | 443 | } |
| 444 | 444 | ||
| 445 | result = read_u8_from_i2c(client, REG_FAN_CONF1, &conf_reg); | 445 | result = read_u8_from_i2c(client, REG_FAN_CONF1, &conf_reg); |
| 446 | if (result) { | 446 | if (result < 0) { |
| 447 | count = result; | 447 | count = result; |
| 448 | goto err; | 448 | goto err; |
| 449 | } | 449 | } |
| @@ -38,8 +38,9 @@ static const u8 MAX6697_REG_CRIT[] = { · 37 unmodified lines | |||
| 38 | * Map device tree / platform data register bit map to chip bit map. | 38 | * Map device tree / platform data register bit map to chip bit map. |
| 39 | * Applies to alert register and over-temperature register. | 39 | * Applies to alert register and over-temperature register. |
| 40 | */ | 40 | */ |
| 41 | #define MAX6697_MAP_BITS(reg) ((((reg) & 0x7e) >> 1) | \ | 41 | #define MAX6697_ALERT_MAP_BITS(reg) ((((reg) & 0x7e) >> 1) | \ |
| 42 | (((reg) & 0x01) << 6) | ((reg) & 0x80)) | 42 | (((reg) & 0x01) << 6) | ((reg) & 0x80)) |
| 43 | #define MAX6697_OVERT_MAP_BITS(reg) (((reg) >> 1) | (((reg) & 0x01) << 7)) | ||
| 43 | 44 | ||
| 44 | #define MAX6697_REG_STAT(n) (0x44 + (n)) | 45 | #define MAX6697_REG_STAT(n) (0x44 + (n)) |
| 45 | 46 | ||
| @@ -562,12 +563,12 @@ static int max6697_init_chip(struct max6697_data *data, · 516 unmodified lines | |||
| 562 | return ret; | 563 | return ret; |
| 563 | 564 | ||
| 564 | ret = i2c_smbus_write_byte_data(client, MAX6697_REG_ALERT_MASK, | 565 | ret = i2c_smbus_write_byte_data(client, MAX6697_REG_ALERT_MASK, |
| 565 | MAX6697_MAP_BITS(pdata->alert_mask)); | 566 | MAX6697_ALERT_MAP_BITS(pdata->alert_mask)); |
| 566 | if (ret < 0) | 567 | if (ret < 0) |
| 567 | return ret; | 568 | return ret; |
| 568 | 569 | ||
| 569 | ret = i2c_smbus_write_byte_data(client, MAX6697_REG_OVERT_MASK, | 570 | ret = i2c_smbus_write_byte_data(client, MAX6697_REG_OVERT_MASK, |
| 570 | MAX6697_MAP_BITS(pdata->over_temperature_mask)); | 571 | MAX6697_OVERT_MAP_BITS(pdata->over_temperature_mask)); |
| 571 | if (ret < 0) | 572 | if (ret < 0) |
| 572 | return ret; | 573 | return ret; |
| 573 | 574 | ||
| @@ -786,13 +786,13 @@ static const char *const nct6798_temp_label[] = { · 785 unmodified lines | |||
| 786 | "Agent1 Dimm1", | 786 | "Agent1 Dimm1", |
| 787 | "BYTE_TEMP0", | 787 | "BYTE_TEMP0", |
| 788 | "BYTE_TEMP1", | 788 | "BYTE_TEMP1", |
| 789 | "", | 789 | "PECI Agent 0 Calibration", /* undocumented */ |
| 790 | "", | 790 | "PECI Agent 1 Calibration", /* undocumented */ |
| 791 | "", | 791 | "", |
| 792 | "Virtual_TEMP" | 792 | "Virtual_TEMP" |
| 793 | }; | 793 | }; |
| 794 | 794 | ||
| 795 | #define NCT6798_TEMP_MASK 0x8fff0ffe | 795 | #define NCT6798_TEMP_MASK 0xbfff0ffe |
| 796 | #define NCT6798_VIRT_TEMP_MASK 0x80000c00 | 796 | #define NCT6798_VIRT_TEMP_MASK 0x80000c00 |
| 797 | 797 | ||
| 798 | /* NCT6102D/NCT6106D specific data */ | 798 | /* NCT6102D/NCT6106D specific data */ |
| @@ -71,7 +71,7 @@ config SENSORS_IR35221 · 70 unmodified lines | |||
| 71 | Infineon IR35221 controller. | 71 | Infineon IR35221 controller. |
| 72 | 72 | ||
| 73 | This driver can also be built as a module. If so, the module will | 73 | This driver can also be built as a module. If so, the module will |
| 74 | be called ir35521. | 74 | be called ir35221. |
| 75 | 75 | ||
| 76 | config SENSORS_IR38064 | 76 | config SENSORS_IR38064 |
| 77 | tristate "Infineon IR38064" | 77 | tristate "Infineon IR38064" |
| @@ -465,6 +465,7 @@ MODULE_DEVICE_TABLE(i2c, adm1275_id); · 464 unmodified lines | |||
| 465 | static int adm1275_probe(struct i2c_client *client, | 465 | static int adm1275_probe(struct i2c_client *client, |
| 466 | const struct i2c_device_id *id) | 466 | const struct i2c_device_id *id) |
| 467 | { | 467 | { |
| 468 | s32 (*config_read_fn)(const struct i2c_client *client, u8 reg); | ||
| 468 | u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1]; | 469 | u8 block_buffer[I2C_SMBUS_BLOCK_MAX + 1]; |
| 469 | int config, device_config; | 470 | int config, device_config; |
| 470 | int ret; | 471 | int ret; |
| @@ -510,11 +511,16 @@ static int adm1275_probe(struct i2c_client *client, · 39 unmodified lines | |||
| 510 | "Device mismatch: Configured %s, detected %s\n", | 511 | "Device mismatch: Configured %s, detected %s\n", |
| 511 | id->name, mid->name); | 512 | id->name, mid->name); |
| 512 | 513 | ||
| 513 | config = i2c_smbus_read_byte_data(client, ADM1275_PMON_CONFIG); | 514 | if (mid->driver_data == adm1272 || mid->driver_data == adm1278 || |
| 515 | mid->driver_data == adm1293 || mid->driver_data == adm1294) | ||
| 516 | config_read_fn = i2c_smbus_read_word_data; | ||
| 517 | else | ||
| 518 | config_read_fn = i2c_smbus_read_byte_data; | ||
| 519 | config = config_read_fn(client, ADM1275_PMON_CONFIG); | ||
| 514 | if (config < 0) | 520 | if (config < 0) |
| 515 | return config; | 521 | return config; |
| 516 | 522 | ||
| 517 | device_config = i2c_smbus_read_byte_data(client, ADM1275_DEVICE_CONFIG); | 523 | device_config = config_read_fn(client, ADM1275_DEVICE_CONFIG); |
| 518 | if (device_config < 0) | 524 | if (device_config < 0) |
| 519 | return device_config; | 525 | return device_config; |
| 520 | 526 | ||
| @@ -1869,7 +1869,7 @@ static int pmbus_add_fan_ctrl(struct i2c_client *client, · 1868 unmodified lines | |||
| 1869 | struct pmbus_sensor *sensor; | 1869 | struct pmbus_sensor *sensor; |
| 1870 | 1870 | ||
| 1871 | sensor = pmbus_add_sensor(data, "fan", "target", index, page, | 1871 | sensor = pmbus_add_sensor(data, "fan", "target", index, page, |
| 1872 | PMBUS_VIRT_FAN_TARGET_1 + id, 0xff, PSC_FAN, | 1872 | 0xff, PMBUS_VIRT_FAN_TARGET_1 + id, PSC_FAN, |
| 1873 | false, false, true); | 1873 | false, false, true); |
| 1874 | 1874 | ||
| 1875 | if (!sensor) | 1875 | if (!sensor) |
| @@ -1880,14 +1880,14 @@ static int pmbus_add_fan_ctrl(struct i2c_client *client, · 4 unmodified lines | |||
| 1880 | return 0; | 1880 | return 0; |
| 1881 | 1881 | ||
| 1882 | sensor = pmbus_add_sensor(data, "pwm", NULL, index, page, | 1882 | sensor = pmbus_add_sensor(data, "pwm", NULL, index, page, |
| 1883 | PMBUS_VIRT_PWM_1 + id, 0xff, PSC_PWM, | 1883 | 0xff, PMBUS_VIRT_PWM_1 + id, PSC_PWM, |
| 1884 | false, false, true); | 1884 | false, false, true); |
| 1885 | 1885 | ||
| 1886 | if (!sensor) | 1886 | if (!sensor) |
| 1887 | return -ENOMEM; | 1887 | return -ENOMEM; |
| 1888 | 1888 | ||
| 1889 | sensor = pmbus_add_sensor(data, "pwm", "enable", index, page, | 1889 | sensor = pmbus_add_sensor(data, "pwm", "enable", index, page, |
| 1890 | PMBUS_VIRT_PWM_ENABLE_1 + id, 0xff, PSC_PWM, | 1890 | 0xff, PMBUS_VIRT_PWM_ENABLE_1 + id, PSC_PWM, |
| 1891 | true, false, false); | 1891 | true, false, false); |
| 1892 | 1892 | ||
| 1893 | if (!sensor) | 1893 | if (!sensor) |
| @@ -1929,7 +1929,7 @@ static int pmbus_add_fan_attributes(struct i2c_client *client, · 35 unmodified lines | |||
| 1929 | continue; | 1929 | continue; |
| 1930 | 1930 | ||
| 1931 | if (pmbus_add_sensor(data, "fan", "input", index, | 1931 | if (pmbus_add_sensor(data, "fan", "input", index, |
| 1932 | page, pmbus_fan_registers[f], 0xff, | 1932 | page, 0xff, pmbus_fan_registers[f], |
| 1933 | PSC_FAN, true, true, true) == NULL) | 1933 | PSC_FAN, true, true, true) == NULL) |
| 1934 | return -ENOMEM; | 1934 | return -ENOMEM; |
| 1935 | 1935 | ||
| @@ -147,7 +147,7 @@ static enum hwmon_sensor_types scmi_types[] = { · 146 unmodified lines | |||
| 147 | [ENERGY] = hwmon_energy, | 147 | [ENERGY] = hwmon_energy, |
| 148 | }; | 148 | }; |
| 149 | 149 | ||
| 150 | static u32 hwmon_attributes[] = { | 150 | static u32 hwmon_attributes[hwmon_max] = { |
| 151 | [hwmon_chip] = HWMON_C_REGISTER_TZ, | 151 | [hwmon_chip] = HWMON_C_REGISTER_TZ, |
| 152 | [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL, | 152 | [hwmon_temp] = HWMON_T_INPUT | HWMON_T_LABEL, |
| 153 | [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL, | 153 | [hwmon_in] = HWMON_I_INPUT | HWMON_I_LABEL, |
| @@ -747,17 +747,50 @@ static int cti_dying_cpu(unsigned int cpu) · 746 unmodified lines | |||
| 747 | return 0; | 747 | return 0; |
| 748 | } | 748 | } |
| 749 | 749 | ||
| 750 | static int cti_pm_setup(struct cti_drvdata *drvdata) | ||
| 751 | { | ||
| 752 | int ret; | ||
| 753 | |||
| 754 | if (drvdata->ctidev.cpu == -1) | ||
| 755 | return 0; | ||
| 756 | |||
| 757 | if (nr_cti_cpu) | ||
| 758 | goto done; | ||
| 759 | |||
| 760 | cpus_read_lock(); | ||
| 761 | ret = cpuhp_setup_state_nocalls_cpuslocked( | ||
| 762 | CPUHP_AP_ARM_CORESIGHT_CTI_STARTING, | ||
| 763 | "arm/coresight_cti:starting", | ||
| 764 | cti_starting_cpu, cti_dying_cpu); | ||
| 765 | if (ret) { | ||
| 766 | cpus_read_unlock(); | ||
| 767 | return ret; | ||
| 768 | } | ||
| 769 | |||
| 770 | ret = cpu_pm_register_notifier(&cti_cpu_pm_nb); | ||
| 771 | cpus_read_unlock(); | ||
| 772 | if (ret) { | ||
| 773 | cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_CTI_STARTING); | ||
| 774 | return ret; | ||
| 775 | } | ||
| 776 | |||
| 777 | done: | ||
| 778 | nr_cti_cpu++; | ||
| 779 | cti_cpu_drvdata[drvdata->ctidev.cpu] = drvdata; | ||
| 780 | |||
| 781 | return 0; | ||
| 782 | } | ||
| 783 | |||
| 750 | /* release PM registrations */ | 784 | /* release PM registrations */ |
| 751 | static void cti_pm_release(struct cti_drvdata *drvdata) | 785 | static void cti_pm_release(struct cti_drvdata *drvdata) |
| 752 | { | 786 | { |
| 753 | if (drvdata->ctidev.cpu >= 0) { | 787 | if (drvdata->ctidev.cpu == -1) |
| 754 | if (--nr_cti_cpu == 0) { | 788 | return; |
| 755 | cpu_pm_unregister_notifier(&cti_cpu_pm_nb); | ||
| 756 | 789 | ||
| 757 | cpuhp_remove_state_nocalls( | 790 | cti_cpu_drvdata[drvdata->ctidev.cpu] = NULL; |
| 758 | CPUHP_AP_ARM_CORESIGHT_CTI_STARTING); | 791 | if (--nr_cti_cpu == 0) { |
| 759 | } | 792 | cpu_pm_unregister_notifier(&cti_cpu_pm_nb); |
| 760 | cti_cpu_drvdata[drvdata->ctidev.cpu] = NULL; | 793 | cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_CTI_STARTING); |
| 761 | } | 794 | } |
| 762 | } | 795 | } |
| 763 | 796 | ||
| @@ -823,19 +856,14 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 59 unmodified lines | |||
| 823 | 856 | ||
| 824 | /* driver data*/ | 857 | /* driver data*/ |
| 825 | drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); | 858 | drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); |
| 826 | if (!drvdata) { | 859 | if (!drvdata) |
| 827 | ret = -ENOMEM; | 860 | return -ENOMEM; |
| 828 | dev_info(dev, "%s, mem err\n", __func__); | ||
| 829 | goto err_out; | ||
| 830 | } | ||
| 831 | 861 | ||
| 832 | /* Validity for the resource is already checked by the AMBA core */ | 862 | /* Validity for the resource is already checked by the AMBA core */ |
| 833 | base = devm_ioremap_resource(dev, res); | 863 | base = devm_ioremap_resource(dev, res); |
| 834 | if (IS_ERR(base)) { | 864 | if (IS_ERR(base)) |
| 835 | ret = PTR_ERR(base); | 865 | return PTR_ERR(base); |
| 836 | dev_err(dev, "%s, remap err\n", __func__); | 866 | |
| 837 | goto err_out; | ||
| 838 | } | ||
| 839 | drvdata->base = base; | 867 | drvdata->base = base; |
| 840 | 868 | ||
| 841 | dev_set_drvdata(dev, drvdata); | 869 | dev_set_drvdata(dev, drvdata); |
| @@ -854,8 +882,7 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 12 unmodified lines | |||
| 854 | pdata = coresight_cti_get_platform_data(dev); | 882 | pdata = coresight_cti_get_platform_data(dev); |
| 855 | if (IS_ERR(pdata)) { | 883 | if (IS_ERR(pdata)) { |
| 856 | dev_err(dev, "coresight_cti_get_platform_data err\n"); | 884 | dev_err(dev, "coresight_cti_get_platform_data err\n"); |
| 857 | ret = PTR_ERR(pdata); | 885 | return PTR_ERR(pdata); |
| 858 | goto err_out; | ||
| 859 | } | 886 | } |
| 860 | 887 | ||
| 861 | /* default to powered - could change on PM notifications */ | 888 | /* default to powered - could change on PM notifications */ |
| @@ -867,35 +894,20 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 5 unmodified lines | |||
| 867 | drvdata->ctidev.cpu); | 894 | drvdata->ctidev.cpu); |
| 868 | else | 895 | else |
| 869 | cti_desc.name = coresight_alloc_device_name(&cti_sys_devs, dev); | 896 | cti_desc.name = coresight_alloc_device_name(&cti_sys_devs, dev); |
| 870 | if (!cti_desc.name) { | 897 | if (!cti_desc.name) |
| 871 | ret = -ENOMEM; | 898 | return -ENOMEM; |
| 872 | goto err_out; | ||
| 873 | } | ||
| 874 | 899 | ||
| 875 | /* setup CPU power management handling for CPU bound CTI devices. */ | 900 | /* setup CPU power management handling for CPU bound CTI devices. */ |
| 876 | if (drvdata->ctidev.cpu >= 0) { | 901 | ret = cti_pm_setup(drvdata); |
| 877 | cti_cpu_drvdata[drvdata->ctidev.cpu] = drvdata; | 902 | if (ret) |
| 878 | if (!nr_cti_cpu++) { | 903 | return ret; |
| 879 | cpus_read_lock(); | ||
| 880 | ret = cpuhp_setup_state_nocalls_cpuslocked( | ||
| 881 | CPUHP_AP_ARM_CORESIGHT_CTI_STARTING, | ||
| 882 | "arm/coresight_cti:starting", | ||
| 883 | cti_starting_cpu, cti_dying_cpu); | ||
| 884 | |||
| 885 | if (!ret) | ||
| 886 | ret = cpu_pm_register_notifier(&cti_cpu_pm_nb); | ||
| 887 | cpus_read_unlock(); | ||
| 888 | if (ret) | ||
| 889 | goto err_out; | ||
| 890 | } | ||
| 891 | } | ||
| 892 | 904 | ||
| 893 | /* create dynamic attributes for connections */ | 905 | /* create dynamic attributes for connections */ |
| 894 | ret = cti_create_cons_sysfs(dev, drvdata); | 906 | ret = cti_create_cons_sysfs(dev, drvdata); |
| 895 | if (ret) { | 907 | if (ret) { |
| 896 | dev_err(dev, "%s: create dynamic sysfs entries failed\n", | 908 | dev_err(dev, "%s: create dynamic sysfs entries failed\n", |
| 897 | cti_desc.name); | 909 | cti_desc.name); |
| 898 | goto err_out; | 910 | goto pm_release; |
| 899 | } | 911 | } |
| 900 | 912 | ||
| 901 | /* set up coresight component description */ | 913 | /* set up coresight component description */ |
| @@ -908,7 +920,7 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 6 unmodified lines | |||
| 908 | drvdata->csdev = coresight_register(&cti_desc); | 920 | drvdata->csdev = coresight_register(&cti_desc); |
| 909 | if (IS_ERR(drvdata->csdev)) { | 921 | if (IS_ERR(drvdata->csdev)) { |
| 910 | ret = PTR_ERR(drvdata->csdev); | 922 | ret = PTR_ERR(drvdata->csdev); |
| 911 | goto err_out; | 923 | goto pm_release; |
| 912 | } | 924 | } |
| 913 | 925 | ||
| 914 | /* add to list of CTI devices */ | 926 | /* add to list of CTI devices */ |
| @@ -927,7 +939,7 @@ static int cti_probe(struct amba_device *adev, const struct amba_id *id) · 12 unmodified lines | |||
| 927 | dev_info(&drvdata->csdev->dev, "CTI initialized\n"); | 939 | dev_info(&drvdata->csdev->dev, "CTI initialized\n"); |
| 928 | return 0; | 940 | return 0; |
| 929 | 941 | ||
| 930 | err_out: | 942 | pm_release: |
| 931 | cti_pm_release(drvdata); | 943 | cti_pm_release(drvdata); |
| 932 | return ret; | 944 | return ret; |
| 933 | } | 945 | } |
| @@ -1388,18 +1388,57 @@ static struct notifier_block etm4_cpu_pm_nb = { · 1387 unmodified lines | |||
| 1388 | .notifier_call = etm4_cpu_pm_notify, | 1388 | .notifier_call = etm4_cpu_pm_notify, |
| 1389 | }; | 1389 | }; |
| 1390 | 1390 | ||
| 1391 | static int etm4_cpu_pm_register(void) | 1391 | /* Setup PM. Called with cpus locked. Deals with error conditions and counts */ |
| 1392 | static int etm4_pm_setup_cpuslocked(void) | ||
| 1392 | { | 1393 | { |
| 1393 | if (IS_ENABLED(CONFIG_CPU_PM)) | 1394 | int ret; |
| 1394 | return cpu_pm_register_notifier(&etm4_cpu_pm_nb); | ||
| 1395 | 1395 | ||
| 1396 | return 0; | 1396 | if (etm4_count++) |
| 1397 | return 0; | ||
| 1398 | |||
| 1399 | ret = cpu_pm_register_notifier(&etm4_cpu_pm_nb); | ||
| 1400 | if (ret) | ||
| 1401 | goto reduce_count; | ||
| 1402 | |||
| 1403 | ret = cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ARM_CORESIGHT_STARTING, | ||
| 1404 | "arm/coresight4:starting", | ||
| 1405 | etm4_starting_cpu, etm4_dying_cpu); | ||
| 1406 | |||
| 1407 | if (ret) | ||
| 1408 | goto unregister_notifier; | ||
| 1409 | |||
| 1410 | ret = cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ONLINE_DYN, | ||
| 1411 | "arm/coresight4:online", | ||
| 1412 | etm4_online_cpu, NULL); | ||
| 1413 | |||
| 1414 | /* HP dyn state ID returned in ret on success */ | ||
| 1415 | if (ret > 0) { | ||
| 1416 | hp_online = ret; | ||
| 1417 | return 0; | ||
| 1418 | } | ||
| 1419 | |||
| 1420 | /* failed dyn state - remove others */ | ||
| 1421 | cpuhp_remove_state_nocalls_cpuslocked(CPUHP_AP_ARM_CORESIGHT_STARTING); | ||
| 1422 | |||
| 1423 | unregister_notifier: | ||
| 1424 | cpu_pm_unregister_notifier(&etm4_cpu_pm_nb); | ||
| 1425 | |||
| 1426 | reduce_count: | ||
| 1427 | --etm4_count; | ||
| 1428 | return ret; | ||
| 1397 | } | 1429 | } |
| 1398 | 1430 | ||
| 1399 | static void etm4_cpu_pm_unregister(void) | 1431 | static void etm4_pm_clear(void) |
| 1400 | { | 1432 | { |
| 1401 | if (IS_ENABLED(CONFIG_CPU_PM)) | 1433 | if (--etm4_count != 0) |
| 1402 | cpu_pm_unregister_notifier(&etm4_cpu_pm_nb); | 1434 | return; |
| 1435 | |||
| 1436 | cpu_pm_unregister_notifier(&etm4_cpu_pm_nb); | ||
| 1437 | cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_STARTING); | ||
| 1438 | if (hp_online) { | ||
| 1439 | cpuhp_remove_state_nocalls(hp_online); | ||
| 1440 | hp_online = 0; | ||
| 1441 | } | ||
| 1403 | } | 1442 | } |
| 1404 | 1443 | ||
| 1405 | static int etm4_probe(struct amba_device *adev, const struct amba_id *id) | 1444 | static int etm4_probe(struct amba_device *adev, const struct amba_id *id) |
| @@ -1453,24 +1492,15 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) · 47 unmodified lines | |||
| 1453 | etm4_init_arch_data, drvdata, 1)) | 1492 | etm4_init_arch_data, drvdata, 1)) |
| 1454 | dev_err(dev, "ETM arch init failed\n"); | 1493 | dev_err(dev, "ETM arch init failed\n"); |
| 1455 | 1494 | ||
| 1456 | if (!etm4_count++) { | 1495 | ret = etm4_pm_setup_cpuslocked(); |
| 1457 | cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ARM_CORESIGHT_STARTING, | 1496 | cpus_read_unlock(); |
| 1458 | "arm/coresight4:starting", | ||
| 1459 | etm4_starting_cpu, etm4_dying_cpu); | ||
| 1460 | ret = cpuhp_setup_state_nocalls_cpuslocked(CPUHP_AP_ONLINE_DYN, | ||
| 1461 | "arm/coresight4:online", | ||
| 1462 | etm4_online_cpu, NULL); | ||
| 1463 | if (ret < 0) | ||
| 1464 | goto err_arch_supported; | ||
| 1465 | hp_online = ret; | ||
| 1466 | 1497 | ||
| 1467 | ret = etm4_cpu_pm_register(); | 1498 | /* etm4_pm_setup_cpuslocked() does its own cleanup - exit on error */ |
| 1468 | if (ret) | 1499 | if (ret) { |
| 1469 | goto err_arch_supported; | 1500 | etmdrvdata[drvdata->cpu] = NULL; |
| 1501 | return ret; | ||
| 1470 | } | 1502 | } |
| 1471 | 1503 | ||
| 1472 | cpus_read_unlock(); | ||
| 1473 | |||
| 1474 | if (etm4_arch_supported(drvdata->arch) == false) { | 1504 | if (etm4_arch_supported(drvdata->arch) == false) { |
| 1475 | ret = -EINVAL; | 1505 | ret = -EINVAL; |
| 1476 | goto err_arch_supported; | 1506 | goto err_arch_supported; |
| @@ -1517,13 +1547,7 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id) · 40 unmodified lines | |||
| 1517 | 1547 | ||
| 1518 | err_arch_supported: | 1548 | err_arch_supported: |
| 1519 | etmdrvdata[drvdata->cpu] = NULL; | 1549 | etmdrvdata[drvdata->cpu] = NULL; |
| 1520 | if (--etm4_count == 0) { | 1550 | etm4_pm_clear(); |
| 1521 | etm4_cpu_pm_unregister(); | ||
| 1522 | |||
| 1523 | cpuhp_remove_state_nocalls(CPUHP_AP_ARM_CORESIGHT_STARTING); | ||
| 1524 | if (hp_online) | ||
| 1525 | cpuhp_remove_state_nocalls(hp_online); | ||
| 1526 | } | ||
| 1527 | return ret; | 1551 | return ret; |
| 1528 | } | 1552 | } |
| 1529 | 1553 | ||
| @@ -1021,15 +1021,30 @@ int intel_th_set_output(struct intel_th_device *thdev, · 1020 unmodified lines | |||
| 1021 | { | 1021 | { |
| 1022 | struct intel_th_device *hub = to_intel_th_hub(thdev); | 1022 | struct intel_th_device *hub = to_intel_th_hub(thdev); |
| 1023 | struct intel_th_driver *hubdrv = to_intel_th_driver(hub->dev.driver); | 1023 | struct intel_th_driver *hubdrv = to_intel_th_driver(hub->dev.driver); |
| 1024 | int ret; | ||
| 1024 | 1025 | ||
| 1025 | /* In host mode, this is up to the external debugger, do nothing. */ | 1026 | /* In host mode, this is up to the external debugger, do nothing. */ |
| 1026 | if (hub->host_mode) | 1027 | if (hub->host_mode) |
| 1027 | return 0; | 1028 | return 0; |
| 1028 | 1029 | ||
| 1029 | if (!hubdrv->set_output) | 1030 | /* |
| 1030 | return -ENOTSUPP; | 1031 | * hub is instantiated together with the source device that |
| 1032 | * calls here, so guaranteed to be present. | ||
| 1033 | */ | ||
| 1034 | hubdrv = to_intel_th_driver(hub->dev.driver); | ||
| 1035 | if (!hubdrv || !try_module_get(hubdrv->driver.owner)) | ||
| 1036 | return -EINVAL; | ||
| 1037 | |||
| 1038 | if (!hubdrv->set_output) { | ||
| 1039 | ret = -ENOTSUPP; | ||
| 1040 | goto out; | ||
| 1041 | } | ||
| 1042 | |||
| 1043 | ret = hubdrv->set_output(hub, master); | ||
| 1031 | 1044 | ||
| 1032 | return hubdrv->set_output(hub, master); | 1045 | out: |
| 1046 | module_put(hubdrv->driver.owner); | ||
| 1047 | return ret; | ||
| 1033 | } | 1048 | } |
| 1034 | EXPORT_SYMBOL_GPL(intel_th_set_output); | 1049 | EXPORT_SYMBOL_GPL(intel_th_set_output); |
| 1035 | 1050 | ||
| @@ -233,11 +233,21 @@ static const struct pci_device_id intel_th_pci_id_table[] = { · 232 unmodified lines | |||
| 233 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa0a6), | 233 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa0a6), |
| 234 | .driver_data = (kernel_ulong_t)&intel_th_2x, | 234 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 235 | }, | 235 | }, |
| 236 | { | ||
| 237 | /* Tiger Lake PCH-H */ | ||
| 238 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x43a6), | ||
| 239 | .driver_data = (kernel_ulong_t)&intel_th_2x, | ||
| 240 | }, | ||
| 236 | { | 241 | { |
| 237 | /* Jasper Lake PCH */ | 242 | /* Jasper Lake PCH */ |
| 238 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4da6), | 243 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4da6), |
| 239 | .driver_data = (kernel_ulong_t)&intel_th_2x, | 244 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 240 | }, | 245 | }, |
| 246 | { | ||
| 247 | /* Jasper Lake CPU */ | ||
| 248 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4e29), | ||
| 249 | .driver_data = (kernel_ulong_t)&intel_th_2x, | ||
| 250 | }, | ||
| 241 | { | 251 | { |
| 242 | /* Elkhart Lake CPU */ | 252 | /* Elkhart Lake CPU */ |
| 243 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4529), | 253 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4529), |
| @@ -248,6 +258,11 @@ static const struct pci_device_id intel_th_pci_id_table[] = { · 4 unmodified lines | |||
| 248 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4b26), | 258 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4b26), |
| 249 | .driver_data = (kernel_ulong_t)&intel_th_2x, | 259 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
| 250 | }, | 260 | }, |
| 261 | { | ||
| 262 | /* Emmitsburg PCH */ | ||
| 263 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1bcc), | ||
| 264 | .driver_data = (kernel_ulong_t)&intel_th_2x, | ||
| 265 | }, | ||
| 251 | { 0 }, | 266 | { 0 }, |
| 252 | }; | 267 | }; |
| 253 | 268 | ||
| @@ -161,9 +161,7 @@ static int sth_stm_link(struct stm_data *stm_data, unsigned int master, · 160 unmodified lines | |||
| 161 | { | 161 | { |
| 162 | struct sth_device *sth = container_of(stm_data, struct sth_device, stm); | 162 | struct sth_device *sth = container_of(stm_data, struct sth_device, stm); |
| 163 | 163 | ||
| 164 | intel_th_set_output(to_intel_th_device(sth->dev), master); | 164 | return intel_th_set_output(to_intel_th_device(sth->dev), master); |
| 165 | |||
| 166 | return 0; | ||
| 167 | } | 165 | } |
| 168 | 166 | ||
| 169 | static int intel_th_sw_init(struct sth_device *sth) | 167 | static int intel_th_sw_init(struct sth_device *sth) |
| @@ -113,11 +113,18 @@ config I2C_STUB · 112 unmodified lines | |||
| 113 | 113 | ||
| 114 | config I2C_SLAVE | 114 | config I2C_SLAVE |
| 115 | bool "I2C slave support" | 115 | bool "I2C slave support" |
| 116 | help | ||
| 117 | This enables Linux to act as an I2C slave device. Note that your I2C | ||
| 118 | bus master driver also needs to support this functionality. Please | ||
| 119 | read Documentation/i2c/slave-interface.rst for further details. | ||
| 116 | 120 | ||
| 117 | if I2C_SLAVE | 121 | if I2C_SLAVE |
| 118 | 122 | ||
| 119 | config I2C_SLAVE_EEPROM | 123 | config I2C_SLAVE_EEPROM |
| 120 | tristate "I2C eeprom slave driver" | 124 | tristate "I2C eeprom slave driver" |
| 125 | help | ||
| 126 | This backend makes Linux behave like an I2C EEPROM. Please read | ||
| 127 | Documentation/i2c/slave-eeprom-backend.rst for further details. | ||
| 121 | 128 | ||
| 122 | endif | 129 | endif |
| 123 | 130 | ||
| @@ -314,7 +314,8 @@ static int pca_xfer(struct i2c_adapter *i2c_adap, · 313 unmodified lines | |||
| 314 | DEB2("BUS ERROR - SDA Stuck low\n"); | 314 | DEB2("BUS ERROR - SDA Stuck low\n"); |
| 315 | pca_reset(adap); | 315 | pca_reset(adap); |
| 316 | goto out; | 316 | goto out; |
| 317 | case 0x90: /* Bus error - SCL stuck low */ | 317 | case 0x78: /* Bus error - SCL stuck low (PCA9665) */ |
| 318 | case 0x90: /* Bus error - SCL stuck low (PCA9564) */ | ||
| 318 | DEB2("BUS ERROR - SCL Stuck low\n"); | 319 | DEB2("BUS ERROR - SCL Stuck low\n"); |
| 319 | pca_reset(adap); | 320 | pca_reset(adap); |
| 320 | goto out; | 321 | goto out; |
| @@ -286,10 +286,8 @@ int i2c_dw_acpi_configure(struct device *device) · 285 unmodified lines | |||
| 286 | } | 286 | } |
| 287 | EXPORT_SYMBOL_GPL(i2c_dw_acpi_configure); | 287 | EXPORT_SYMBOL_GPL(i2c_dw_acpi_configure); |
| 288 | 288 | ||
| 289 | void i2c_dw_acpi_adjust_bus_speed(struct device *device) | 289 | static u32 i2c_dw_acpi_round_bus_speed(struct device *device) |
| 290 | { | 290 | { |
| 291 | struct dw_i2c_dev *dev = dev_get_drvdata(device); | ||
| 292 | struct i2c_timings *t = &dev->timings; | ||
| 293 | u32 acpi_speed; | 291 | u32 acpi_speed; |
| 294 | int i; | 292 | int i; |
| 295 | 293 | ||
| @@ -300,9 +298,22 @@ void i2c_dw_acpi_adjust_bus_speed(struct device *device) · 4 unmodified lines | |||
| 300 | */ | 298 | */ |
| 301 | for (i = 0; i < ARRAY_SIZE(supported_speeds); i++) { | 299 | for (i = 0; i < ARRAY_SIZE(supported_speeds); i++) { |
| 302 | if (acpi_speed >= supported_speeds[i]) | 300 | if (acpi_speed >= supported_speeds[i]) |
| 303 | break; | 301 | return supported_speeds[i]; |
| 304 | } | 302 | } |
| 305 | acpi_speed = i < ARRAY_SIZE(supported_speeds) ? supported_speeds[i] : 0; | 303 | |
| 304 | return 0; | ||
| 305 | } | ||
| 306 | |||
| 307 | #else /* CONFIG_ACPI */ | ||
| 308 | |||
| 309 | static inline u32 i2c_dw_acpi_round_bus_speed(struct device *device) { return 0; } | ||
| 310 | |||
| 311 | #endif /* CONFIG_ACPI */ | ||
| 312 | |||
| 313 | void i2c_dw_adjust_bus_speed(struct dw_i2c_dev *dev) | ||
| 314 | { | ||
| 315 | u32 acpi_speed = i2c_dw_acpi_round_bus_speed(dev->dev); | ||
| 316 | struct i2c_timings *t = &dev->timings; | ||
| 306 | 317 | ||
| 307 | /* | 318 | /* |
| 308 | * Find bus speed from the "clock-frequency" device property, ACPI | 319 | * Find bus speed from the "clock-frequency" device property, ACPI |
| @@ -315,9 +326,7 @@ void i2c_dw_acpi_adjust_bus_speed(struct device *device) · 6 unmodified lines | |||
| 315 | else | 326 | else |
| 316 | t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ; | 327 | t->bus_freq_hz = I2C_MAX_FAST_MODE_FREQ; |
| 317 | } | 328 | } |
| 318 | EXPORT_SYMBOL_GPL(i2c_dw_acpi_adjust_bus_speed); | 329 | EXPORT_SYMBOL_GPL(i2c_dw_adjust_bus_speed); |
| 319 | |||
| 320 | #endif /* CONFIG_ACPI */ | ||
| 321 | 330 | ||
| 322 | u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset) | 331 | u32 i2c_dw_scl_hcnt(u32 ic_clk, u32 tSYMBOL, u32 tf, int cond, int offset) |
| 323 | { | 332 | { |
| @@ -361,11 +361,10 @@ static inline int i2c_dw_probe_lock_support(struct dw_i2c_dev *dev) { return 0; · 360 unmodified lines | |||
| 361 | #endif | 361 | #endif |
| 362 | 362 | ||
| 363 | int i2c_dw_validate_speed(struct dw_i2c_dev *dev); | 363 | int i2c_dw_validate_speed(struct dw_i2c_dev *dev); |
| 364 | void i2c_dw_adjust_bus_speed(struct dw_i2c_dev *dev); | ||
| 364 | 365 | ||
| 365 | #if IS_ENABLED(CONFIG_ACPI) | 366 | #if IS_ENABLED(CONFIG_ACPI) |
| 366 | int i2c_dw_acpi_configure(struct device *device); | 367 | int i2c_dw_acpi_configure(struct device *device); |
| 367 | void i2c_dw_acpi_adjust_bus_speed(struct device *device); | ||
| 368 | #else | 368 | #else |
| 369 | static inline int i2c_dw_acpi_configure(struct device *device) { return -ENODEV; } | 369 | static inline int i2c_dw_acpi_configure(struct device *device) { return -ENODEV; } |
| 370 | static inline void i2c_dw_acpi_adjust_bus_speed(struct device *device) {} | ||
| 371 | #endif | 370 | #endif |
| @@ -240,7 +240,7 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev, · 239 unmodified lines | |||
| 240 | } | 240 | } |
| 241 | } | 241 | } |
| 242 | 242 | ||
| 243 | i2c_dw_acpi_adjust_bus_speed(&pdev->dev); | 243 | i2c_dw_adjust_bus_speed(dev); |
| 244 | 244 | ||
| 245 | if (has_acpi_companion(&pdev->dev)) | 245 | if (has_acpi_companion(&pdev->dev)) |
| 246 | i2c_dw_acpi_configure(&pdev->dev); | 246 | i2c_dw_acpi_configure(&pdev->dev); |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | |||
| 12 | #include <linux/clk-provider.h> | 12 | #include <linux/clk-provider.h> |
| 13 | #include <linux/clk.h> | 13 | #include <linux/clk.h> |
| 14 | #include <linux/delay.h> | 14 | #include <linux/delay.h> |
| 15 | #include <linux/dmi.h> | ||
| 15 | #include <linux/err.h> | 16 | #include <linux/err.h> |
| 16 | #include <linux/errno.h> | 17 | #include <linux/errno.h> |
| 17 | #include <linux/i2c.h> | 18 | #include <linux/i2c.h> |
| @@ -191,6 +192,17 @@ static int dw_i2c_plat_request_regs(struct dw_i2c_dev *dev) · 173 unmodified lines | |||
| 191 | return ret; | 192 | return ret; |
| 192 | } | 193 | } |
| 193 | 194 | ||
| 195 | static const struct dmi_system_id dw_i2c_hwmon_class_dmi[] = { | ||
| 196 | { | ||
| 197 | .ident = "Qtechnology QT5222", | ||
| 198 | .matches = { | ||
| 199 | DMI_MATCH(DMI_SYS_VENDOR, "Qtechnology"), | ||
| 200 | DMI_MATCH(DMI_PRODUCT_NAME, "QT5222"), | ||
| 201 | }, | ||
| 202 | }, | ||
| 203 | { } /* terminate list */ | ||
| 204 | }; | ||
| 205 | |||
| 194 | static int dw_i2c_plat_probe(struct platform_device *pdev) | 206 | static int dw_i2c_plat_probe(struct platform_device *pdev) |
| 195 | { | 207 | { |
| 196 | struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev); | 208 | struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev); |
| @@ -228,7 +240,7 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) · 31 unmodified lines | |||
| 228 | else | 240 | else |
| 229 | i2c_parse_fw_timings(&pdev->dev, t, false); | 241 | i2c_parse_fw_timings(&pdev->dev, t, false); |
| 230 | 242 | ||
| 231 | i2c_dw_acpi_adjust_bus_speed(&pdev->dev); | 243 | i2c_dw_adjust_bus_speed(dev); |
| 232 | 244 | ||
| 233 | if (pdev->dev.of_node) | 245 | if (pdev->dev.of_node) |
| 234 | dw_i2c_of_configure(pdev); | 246 | dw_i2c_of_configure(pdev); |
| @@ -267,7 +279,8 @@ static int dw_i2c_plat_probe(struct platform_device *pdev) · 32 unmodified lines | |||
| 267 | 279 | ||
| 268 | adap = &dev->adapter; | 280 | adap = &dev->adapter; |
| 269 | adap->owner = THIS_MODULE; | 281 | adap->owner = THIS_MODULE; |
| 270 | adap->class = I2C_CLASS_DEPRECATED; | 282 | adap->class = dmi_check_system(dw_i2c_hwmon_class_dmi) ? |
| 283 | I2C_CLASS_HWMON : I2C_CLASS_DEPRECATED; | ||
| 271 | ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); | 284 | ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev)); |
| 272 | adap->dev.of_node = pdev->dev.of_node; | 285 | adap->dev.of_node = pdev->dev.of_node; |
| 273 | adap->nr = -1; | 286 | adap->nr = -1; |
| @@ -180,6 +180,7 @@ static const struct pci_device_id pch_pcidev_id[] = { · 179 unmodified lines | |||
| 180 | { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7831_I2C), 1, }, | 180 | { PCI_VDEVICE(ROHM, PCI_DEVICE_ID_ML7831_I2C), 1, }, |
| 181 | {0,} | 181 | {0,} |
| 182 | }; | 182 | }; |
| 183 | MODULE_DEVICE_TABLE(pci, pch_pcidev_id); | ||
| 183 | 184 | ||
| 184 | static irqreturn_t pch_i2c_handler(int irq, void *pData); | 185 | static irqreturn_t pch_i2c_handler(int irq, void *pData); |
| 185 | 186 | ||
| @@ -98,7 +98,7 @@ · 97 unmodified lines | |||
| 98 | #define I2C_STAT_DAT_REQ BIT(25) | 98 | #define I2C_STAT_DAT_REQ BIT(25) |
| 99 | #define I2C_STAT_CMD_COMP BIT(24) | 99 | #define I2C_STAT_CMD_COMP BIT(24) |
| 100 | #define I2C_STAT_STOP_ERR BIT(23) | 100 | #define I2C_STAT_STOP_ERR BIT(23) |
| 101 | #define I2C_STAT_MAX_PORT GENMASK(19, 16) | 101 | #define I2C_STAT_MAX_PORT GENMASK(22, 16) |
| 102 | #define I2C_STAT_ANY_INT BIT(15) | 102 | #define I2C_STAT_ANY_INT BIT(15) |
| 103 | #define I2C_STAT_SCL_IN BIT(11) | 103 | #define I2C_STAT_SCL_IN BIT(11) |
| 104 | #define I2C_STAT_SDA_IN BIT(10) | 104 | #define I2C_STAT_SDA_IN BIT(10) |
| @@ -337,9 +337,9 @@ static int mlxcpld_i2c_wait_for_tc(struct mlxcpld_i2c_priv *priv) · 336 unmodified lines | |||
| 337 | if (priv->smbus_block && (val & MLXCPLD_I2C_SMBUS_BLK_BIT)) { | 337 | if (priv->smbus_block && (val & MLXCPLD_I2C_SMBUS_BLK_BIT)) { |
| 338 | mlxcpld_i2c_read_comm(priv, MLXCPLD_LPCI2C_NUM_DAT_REG, | 338 | mlxcpld_i2c_read_comm(priv, MLXCPLD_LPCI2C_NUM_DAT_REG, |
| 339 | &datalen, 1); | 339 | &datalen, 1); |
| 340 | if (unlikely(datalen > (I2C_SMBUS_BLOCK_MAX + 1))) { | 340 | if (unlikely(datalen > I2C_SMBUS_BLOCK_MAX)) { |
| 341 | dev_err(priv->dev, "Incorrect smbus block read message len\n"); | 341 | dev_err(priv->dev, "Incorrect smbus block read message len\n"); |
| 342 | return -E2BIG; | 342 | return -EPROTO; |
| 343 | } | 343 | } |
| 344 | } else { | 344 | } else { |
| 345 | datalen = priv->xfer.data_len; | 345 | datalen = priv->xfer.data_len; |
| @@ -495,6 +495,13 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter *adapter, u16 addr, · 494 unmodified lines | |||
| 495 | break; | 495 | break; |
| 496 | case I2C_SMBUS_BLOCK_DATA: | 496 | case I2C_SMBUS_BLOCK_DATA: |
| 497 | case I2C_SMBUS_BLOCK_PROC_CALL: | 497 | case I2C_SMBUS_BLOCK_PROC_CALL: |
| 498 | if (msg[1].buf[0] > I2C_SMBUS_BLOCK_MAX) { | ||
| 499 | dev_err(&adapter->dev, | ||
| 500 | "Invalid block size returned: %d\n", | ||
| 501 | msg[1].buf[0]); | ||
| 502 | status = -EPROTO; | ||
| 503 | goto cleanup; | ||
| 504 | } | ||
| 498 | for (i = 0; i < msg[1].buf[0] + 1; i++) | 505 | for (i = 0; i < msg[1].buf[0] + 1; i++) |
| 499 | data->block[i] = msg[1].buf[i]; | 506 | data->block[i] = msg[1].buf[i]; |
| 500 | break; | 507 | break; |
| @@ -1685,10 +1685,13 @@ static int mma8452_probe(struct i2c_client *client, · 1684 unmodified lines | |||
| 1685 | 1685 | ||
| 1686 | ret = mma8452_set_freefall_mode(data, false); | 1686 | ret = mma8452_set_freefall_mode(data, false); |
| 1687 | if (ret < 0) | 1687 | if (ret < 0) |
| 1688 | goto buffer_cleanup; | 1688 | goto unregister_device; |
| 1689 | 1689 | ||
| 1690 | return 0; | 1690 | return 0; |
| 1691 | 1691 | ||
| 1692 | unregister_device: | ||
| 1693 | iio_device_unregister(indio_dev); | ||
| 1694 | |||
| 1692 | buffer_cleanup: | 1695 | buffer_cleanup: |
| 1693 | iio_triggered_buffer_cleanup(indio_dev); | 1696 | iio_triggered_buffer_cleanup(indio_dev); |
| 1694 | 1697 | ||
| @@ -329,7 +329,7 @@ static int ad7780_probe(struct spi_device *spi) · 328 unmodified lines | |||
| 329 | 329 | ||
| 330 | ret = ad7780_init_gpios(&spi->dev, st); | 330 | ret = ad7780_init_gpios(&spi->dev, st); |
| 331 | if (ret) | 331 | if (ret) |
| 332 | goto error_cleanup_buffer_and_trigger; | 332 | return ret; |
| 333 | 333 | ||
| 334 | st->reg = devm_regulator_get(&spi->dev, "avdd"); | 334 | st->reg = devm_regulator_get(&spi->dev, "avdd"); |
| 335 | if (IS_ERR(st->reg)) | 335 | if (IS_ERR(st->reg)) |
| @@ -332,12 +332,12 @@ static struct adi_axi_adc_client *adi_axi_adc_attach_client(struct device *dev) · 331 unmodified lines | |||
| 332 | if (cl->dev->of_node != cln) | 332 | if (cl->dev->of_node != cln) |
| 333 | continue; | 333 | continue; |
| 334 | 334 | ||
| 335 | if (!try_module_get(dev->driver->owner)) { | 335 | if (!try_module_get(cl->dev->driver->owner)) { |
| 336 | mutex_unlock(®istered_clients_lock); | 336 | mutex_unlock(®istered_clients_lock); |
| 337 | return ERR_PTR(-ENODEV); | 337 | return ERR_PTR(-ENODEV); |
| 338 | } | 338 | } |
| 339 | 339 | ||
| 340 | get_device(dev); | 340 | get_device(cl->dev); |
| 341 | cl->info = info; | 341 | cl->info = info; |
| 342 | mutex_unlock(®istered_clients_lock); | 342 | mutex_unlock(®istered_clients_lock); |
| 343 | return cl; | 343 | return cl; |
| @@ -65,6 +65,7 @@ static const struct reg_field afe4403_reg_fields[] = { · 64 unmodified lines | |||
| 65 | * @regulator: Pointer to the regulator for the IC | 65 | * @regulator: Pointer to the regulator for the IC |
| 66 | * @trig: IIO trigger for this device | 66 | * @trig: IIO trigger for this device |
| 67 | * @irq: ADC_RDY line interrupt number | 67 | * @irq: ADC_RDY line interrupt number |
| 68 | * @buffer: Used to construct data layout to push into IIO buffer. | ||
| 68 | */ | 69 | */ |
| 69 | struct afe4403_data { | 70 | struct afe4403_data { |
| 70 | struct device *dev; | 71 | struct device *dev; |
| @@ -74,6 +75,8 @@ struct afe4403_data { · 3 unmodified lines | |||
| 74 | struct regulator *regulator; | 75 | struct regulator *regulator; |
| 75 | struct iio_trigger *trig; | 76 | struct iio_trigger *trig; |
| 76 | int irq; | 77 | int irq; |
| 78 | /* Ensure suitable alignment for timestamp */ | ||
| 79 | s32 buffer[8] __aligned(8); | ||
| 77 | }; | 80 | }; |
| 78 | 81 | ||
| 79 | enum afe4403_chan_id { | 82 | enum afe4403_chan_id { |
| @@ -309,7 +312,6 @@ static irqreturn_t afe4403_trigger_handler(int irq, void *private) · 229 unmodified lines | |||
| 309 | struct iio_dev *indio_dev = pf->indio_dev; | 312 | struct iio_dev *indio_dev = pf->indio_dev; |
| 310 | struct afe4403_data *afe = iio_priv(indio_dev); | 313 | struct afe4403_data *afe = iio_priv(indio_dev); |
| 311 | int ret, bit, i = 0; | 314 | int ret, bit, i = 0; |
| 312 | s32 buffer[8]; | ||
| 313 | u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; | 315 | u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; |
| 314 | u8 rx[3]; | 316 | u8 rx[3]; |
| 315 | 317 | ||
| @@ -326,7 +328,7 @@ static irqreturn_t afe4403_trigger_handler(int irq, void *private) · 10 unmodified lines | |||
| 326 | if (ret) | 328 | if (ret) |
| 327 | goto err; | 329 | goto err; |
| 328 | 330 | ||
| 329 | buffer[i++] = get_unaligned_be24(&rx[0]); | 331 | afe->buffer[i++] = get_unaligned_be24(&rx[0]); |
| 330 | } | 332 | } |
| 331 | 333 | ||
| 332 | /* Disable reading from the device */ | 334 | /* Disable reading from the device */ |
| @@ -335,7 +337,8 @@ static irqreturn_t afe4403_trigger_handler(int irq, void *private) · 2 unmodified lines | |||
| 335 | if (ret) | 337 | if (ret) |
| 336 | goto err; | 338 | goto err; |
| 337 | 339 | ||
| 338 | iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp); | 340 | iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer, |
| 341 | pf->timestamp); | ||
| 339 | err: | 342 | err: |
| 340 | iio_trigger_notify_done(indio_dev->trig); | 343 | iio_trigger_notify_done(indio_dev->trig); |
| 341 | 344 | ||
| @@ -83,6 +83,7 @@ static const struct reg_field afe4404_reg_fields[] = { · 82 unmodified lines | |||
| 83 | * @regulator: Pointer to the regulator for the IC | 83 | * @regulator: Pointer to the regulator for the IC |
| 84 | * @trig: IIO trigger for this device | 84 | * @trig: IIO trigger for this device |
| 85 | * @irq: ADC_RDY line interrupt number | 85 | * @irq: ADC_RDY line interrupt number |
| 86 | * @buffer: Used to construct a scan to push to the iio buffer. | ||
| 86 | */ | 87 | */ |
| 87 | struct afe4404_data { | 88 | struct afe4404_data { |
| 88 | struct device *dev; | 89 | struct device *dev; |
| @@ -91,6 +92,7 @@ struct afe4404_data { · 2 unmodified lines | |||
| 91 | struct regulator *regulator; | 92 | struct regulator *regulator; |
| 92 | struct iio_trigger *trig; | 93 | struct iio_trigger *trig; |
| 93 | int irq; | 94 | int irq; |
| 95 | s32 buffer[10] __aligned(8); | ||
| 94 | }; | 96 | }; |
| 95 | 97 | ||
| 96 | enum afe4404_chan_id { | 98 | enum afe4404_chan_id { |
| @@ -328,17 +330,17 @@ static irqreturn_t afe4404_trigger_handler(int irq, void *private) · 231 unmodified lines | |||
| 328 | struct iio_dev *indio_dev = pf->indio_dev; | 330 | struct iio_dev *indio_dev = pf->indio_dev; |
| 329 | struct afe4404_data *afe = iio_priv(indio_dev); | 331 | struct afe4404_data *afe = iio_priv(indio_dev); |
| 330 | int ret, bit, i = 0; | 332 | int ret, bit, i = 0; |
| 331 | s32 buffer[10]; | ||
| 332 | 333 | ||
| 333 | for_each_set_bit(bit, indio_dev->active_scan_mask, | 334 | for_each_set_bit(bit, indio_dev->active_scan_mask, |
| 334 | indio_dev->masklength) { | 335 | indio_dev->masklength) { |
| 335 | ret = regmap_read(afe->regmap, afe4404_channel_values[bit], | 336 | ret = regmap_read(afe->regmap, afe4404_channel_values[bit], |
| 336 | &buffer[i++]); | 337 | &afe->buffer[i++]); |
| 337 | if (ret) | 338 | if (ret) |
| 338 | goto err; | 339 | goto err; |
| 339 | } | 340 | } |
| 340 | 341 | ||
| 341 | iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp); | 342 | iio_push_to_buffers_with_timestamp(indio_dev, afe->buffer, |
| 343 | pf->timestamp); | ||
| 342 | err: | 344 | err: |
| 343 | iio_trigger_notify_done(indio_dev->trig); | 345 | iio_trigger_notify_done(indio_dev->trig); |
| 344 | 346 | ||
| @@ -38,6 +38,11 @@ struct hdc100x_data { · 37 unmodified lines | |||
| 38 | 38 | ||
| 39 | /* integration time of the sensor */ | 39 | /* integration time of the sensor */ |
| 40 | int adc_int_us[2]; | 40 | int adc_int_us[2]; |
| 41 | /* Ensure natural alignment of timestamp */ | ||
| 42 | struct { | ||
| 43 | __be16 channels[2]; | ||
| 44 | s64 ts __aligned(8); | ||
| 45 | } scan; | ||
| 41 | }; | 46 | }; |
| 42 | 47 | ||
| 43 | /* integration time in us */ | 48 | /* integration time in us */ |
| @@ -322,7 +327,6 @@ static irqreturn_t hdc100x_trigger_handler(int irq, void *p) · 278 unmodified lines | |||
| 322 | struct i2c_client *client = data->client; | 327 | struct i2c_client *client = data->client; |
| 323 | int delay = data->adc_int_us[0] + data->adc_int_us[1]; | 328 | int delay = data->adc_int_us[0] + data->adc_int_us[1]; |
| 324 | int ret; | 329 | int ret; |
| 325 | s16 buf[8]; /* 2x s16 + padding + 8 byte timestamp */ | ||
| 326 | 330 | ||
| 327 | /* dual read starts at temp register */ | 331 | /* dual read starts at temp register */ |
| 328 | mutex_lock(&data->lock); | 332 | mutex_lock(&data->lock); |
| @@ -333,13 +337,13 @@ static irqreturn_t hdc100x_trigger_handler(int irq, void *p) · 4 unmodified lines | |||
| 333 | } | 337 | } |
| 334 | usleep_range(delay, delay + 1000); | 338 | usleep_range(delay, delay + 1000); |
| 335 | 339 | ||
| 336 | ret = i2c_master_recv(client, (u8 *)buf, 4); | 340 | ret = i2c_master_recv(client, (u8 *)data->scan.channels, 4); |
| 337 | if (ret < 0) { | 341 | if (ret < 0) { |
| 338 | dev_err(&client->dev, "cannot read sensor data\n"); | 342 | dev_err(&client->dev, "cannot read sensor data\n"); |
| 339 | goto err; | 343 | goto err; |
| 340 | } | 344 | } |
| 341 | 345 | ||
| 342 | iio_push_to_buffers_with_timestamp(indio_dev, buf, | 346 | iio_push_to_buffers_with_timestamp(indio_dev, &data->scan, |
| 343 | iio_get_time_ns(indio_dev)); | 347 | iio_get_time_ns(indio_dev)); |
| 344 | err: | 348 | err: |
| 345 | mutex_unlock(&data->lock); | 349 | mutex_unlock(&data->lock); |
| @@ -14,8 +14,6 @@ · 13 unmodified lines | |||
| 14 | 14 | ||
| 15 | #include <linux/iio/iio.h> | 15 | #include <linux/iio/iio.h> |
| 16 | 16 | ||
| 17 | #define HTS221_DATA_SIZE 2 | ||
| 18 | |||
| 19 | enum hts221_sensor_type { | 17 | enum hts221_sensor_type { |
| 20 | HTS221_SENSOR_H, | 18 | HTS221_SENSOR_H, |
| 21 | HTS221_SENSOR_T, | 19 | HTS221_SENSOR_T, |
| @@ -39,6 +37,11 @@ struct hts221_hw { · 17 unmodified lines | |||
| 39 | 37 | ||
| 40 | bool enabled; | 38 | bool enabled; |
| 41 | u8 odr; | 39 | u8 odr; |
| 40 | /* Ensure natural alignment of timestamp */ | ||
| 41 | struct { | ||
| 42 | __le16 channels[2]; | ||
| 43 | s64 ts __aligned(8); | ||
| 44 | } scan; | ||
| 42 | }; | 45 | }; |
| 43 | 46 | ||
| 44 | extern const struct dev_pm_ops hts221_pm_ops; | 47 | extern const struct dev_pm_ops hts221_pm_ops; |
| @@ -160,7 +160,6 @@ static const struct iio_buffer_setup_ops hts221_buffer_ops = { · 159 unmodified lines | |||
| 160 | 160 | ||
| 161 | static irqreturn_t hts221_buffer_handler_thread(int irq, void *p) | 161 | static irqreturn_t hts221_buffer_handler_thread(int irq, void *p) |
| 162 | { | 162 | { |
| 163 | u8 buffer[ALIGN(2 * HTS221_DATA_SIZE, sizeof(s64)) + sizeof(s64)]; | ||
| 164 | struct iio_poll_func *pf = p; | 163 | struct iio_poll_func *pf = p; |
| 165 | struct iio_dev *iio_dev = pf->indio_dev; | 164 | struct iio_dev *iio_dev = pf->indio_dev; |
| 166 | struct hts221_hw *hw = iio_priv(iio_dev); | 165 | struct hts221_hw *hw = iio_priv(iio_dev); |
| @@ -170,18 +169,20 @@ static irqreturn_t hts221_buffer_handler_thread(int irq, void *p) · 3 unmodified lines | |||
| 170 | /* humidity data */ | 169 | /* humidity data */ |
| 171 | ch = &iio_dev->channels[HTS221_SENSOR_H]; | 170 | ch = &iio_dev->channels[HTS221_SENSOR_H]; |
| 172 | err = regmap_bulk_read(hw->regmap, ch->address, | 171 | err = regmap_bulk_read(hw->regmap, ch->address, |
| 173 | buffer, HTS221_DATA_SIZE); | 172 | &hw->scan.channels[0], |
| 173 | sizeof(hw->scan.channels[0])); | ||
| 174 | if (err < 0) | 174 | if (err < 0) |
| 175 | goto out; | 175 | goto out; |
| 176 | 176 | ||
| 177 | /* temperature data */ | 177 | /* temperature data */ |
| 178 | ch = &iio_dev->channels[HTS221_SENSOR_T]; | 178 | ch = &iio_dev->channels[HTS221_SENSOR_T]; |
| 179 | err = regmap_bulk_read(hw->regmap, ch->address, | 179 | err = regmap_bulk_read(hw->regmap, ch->address, |
| 180 | buffer + HTS221_DATA_SIZE, HTS221_DATA_SIZE); | 180 | &hw->scan.channels[1], |
| 181 | sizeof(hw->scan.channels[1])); | ||
| 181 | if (err < 0) | 182 | if (err < 0) |
| 182 | goto out; | 183 | goto out; |
| 183 | 184 | ||
| 184 | iio_push_to_buffers_with_timestamp(iio_dev, buffer, | 185 | iio_push_to_buffers_with_timestamp(iio_dev, &hw->scan, |
| 185 | iio_get_time_ns(iio_dev)); | 186 | iio_get_time_ns(iio_dev)); |
| 186 | 187 | ||
| 187 | out: | 188 | out: |
| @@ -130,6 +130,8 @@ static const char * const iio_modifier_names[] = { · 129 unmodified lines | |||
| 130 | [IIO_MOD_PM2P5] = "pm2p5", | 130 | [IIO_MOD_PM2P5] = "pm2p5", |
| 131 | [IIO_MOD_PM4] = "pm4", | 131 | [IIO_MOD_PM4] = "pm4", |
| 132 | [IIO_MOD_PM10] = "pm10", | 132 | [IIO_MOD_PM10] = "pm10", |
| 133 | [IIO_MOD_ETHANOL] = "ethanol", | ||
| 134 | [IIO_MOD_H2] = "h2", | ||
| 133 | }; | 135 | }; |
| 134 | 136 | ||
| 135 | /* relies on pairs of these shared then separate */ | 137 | /* relies on pairs of these shared then separate */ |
| @@ -192,6 +192,11 @@ struct ak8974 { · 191 unmodified lines | |||
| 192 | bool drdy_irq; | 192 | bool drdy_irq; |
| 193 | struct completion drdy_complete; | 193 | struct completion drdy_complete; |
| 194 | bool drdy_active_low; | 194 | bool drdy_active_low; |
| 195 | /* Ensure timestamp is naturally aligned */ | ||
| 196 | struct { | ||
| 197 | __le16 channels[3]; | ||
| 198 | s64 ts __aligned(8); | ||
| 199 | } scan; | ||
| 195 | }; | 200 | }; |
| 196 | 201 | ||
| 197 | static const char ak8974_reg_avdd[] = "avdd"; | 202 | static const char ak8974_reg_avdd[] = "avdd"; |
| @@ -657,7 +662,6 @@ static void ak8974_fill_buffer(struct iio_dev *indio_dev) · 459 unmodified lines | |||
| 657 | { | 662 | { |
| 658 | struct ak8974 *ak8974 = iio_priv(indio_dev); | 663 | struct ak8974 *ak8974 = iio_priv(indio_dev); |
| 659 | int ret; | 664 | int ret; |
| 660 | __le16 hw_values[8]; /* Three axes + 64bit padding */ | ||
| 661 | 665 | ||
| 662 | pm_runtime_get_sync(&ak8974->i2c->dev); | 666 | pm_runtime_get_sync(&ak8974->i2c->dev); |
| 663 | mutex_lock(&ak8974->lock); | 667 | mutex_lock(&ak8974->lock); |
| @@ -667,13 +671,13 @@ static void ak8974_fill_buffer(struct iio_dev *indio_dev) · 3 unmodified lines | |||
| 667 | dev_err(&ak8974->i2c->dev, "error triggering measure\n"); | 671 | dev_err(&ak8974->i2c->dev, "error triggering measure\n"); |
| 668 | goto out_unlock; | 672 | goto out_unlock; |
| 669 | } | 673 | } |
| 670 | ret = ak8974_getresult(ak8974, hw_values); | 674 | ret = ak8974_getresult(ak8974, ak8974->scan.channels); |
| 671 | if (ret) { | 675 | if (ret) { |
| 672 | dev_err(&ak8974->i2c->dev, "error getting measures\n"); | 676 | dev_err(&ak8974->i2c->dev, "error getting measures\n"); |
| 673 | goto out_unlock; | 677 | goto out_unlock; |
| 674 | } | 678 | } |
| 675 | 679 | ||
| 676 | iio_push_to_buffers_with_timestamp(indio_dev, hw_values, | 680 | iio_push_to_buffers_with_timestamp(indio_dev, &ak8974->scan, |
| 677 | iio_get_time_ns(indio_dev)); | 681 | iio_get_time_ns(indio_dev)); |
| 678 | 682 | ||
| 679 | out_unlock: | 683 | out_unlock: |
| @@ -862,19 +866,21 @@ static int ak8974_probe(struct i2c_client *i2c, · 182 unmodified lines | |||
| 862 | ak8974->map = devm_regmap_init_i2c(i2c, &ak8974_regmap_config); | 866 | ak8974->map = devm_regmap_init_i2c(i2c, &ak8974_regmap_config); |
| 863 | if (IS_ERR(ak8974->map)) { | 867 | if (IS_ERR(ak8974->map)) { |
| 864 | dev_err(&i2c->dev, "failed to allocate register map\n"); | 868 | dev_err(&i2c->dev, "failed to allocate register map\n"); |
| 869 | pm_runtime_put_noidle(&i2c->dev); | ||
| 870 | pm_runtime_disable(&i2c->dev); | ||
| 865 | return PTR_ERR(ak8974->map); | 871 | return PTR_ERR(ak8974->map); |
| 866 | } | 872 | } |
| 867 | 873 | ||
| 868 | ret = ak8974_set_power(ak8974, AK8974_PWR_ON); | 874 | ret = ak8974_set_power(ak8974, AK8974_PWR_ON); |
| 869 | if (ret) { | 875 | if (ret) { |
| 870 | dev_err(&i2c->dev, "could not power on\n"); | 876 | dev_err(&i2c->dev, "could not power on\n"); |
| 871 | goto power_off; | 877 | goto disable_pm; |
| 872 | } | 878 | } |
| 873 | 879 | ||
| 874 | ret = ak8974_detect(ak8974); | 880 | ret = ak8974_detect(ak8974); |
| 875 | if (ret) { | 881 | if (ret) { |
| 876 | dev_err(&i2c->dev, "neither AK8974 nor AMI30x found\n"); | 882 | dev_err(&i2c->dev, "neither AK8974 nor AMI30x found\n"); |
| 877 | goto power_off; | 883 | goto disable_pm; |
| 878 | } | 884 | } |
| 879 | 885 | ||
| 880 | ret = ak8974_selftest(ak8974); | 886 | ret = ak8974_selftest(ak8974); |
| @@ -884,14 +890,9 @@ static int ak8974_probe(struct i2c_client *i2c, · 3 unmodified lines | |||
| 884 | ret = ak8974_reset(ak8974); | 890 | ret = ak8974_reset(ak8974); |
| 885 | if (ret) { | 891 | if (ret) { |
| 886 | dev_err(&i2c->dev, "AK8974 reset failed\n"); | 892 | dev_err(&i2c->dev, "AK8974 reset failed\n"); |
| 887 | goto power_off; | 893 | goto disable_pm; |
| 888 | } | 894 | } |
| 889 | 895 | ||
| 890 | pm_runtime_set_autosuspend_delay(&i2c->dev, | ||
| 891 | AK8974_AUTOSUSPEND_DELAY); | ||
| 892 | pm_runtime_use_autosuspend(&i2c->dev); | ||
| 893 | pm_runtime_put(&i2c->dev); | ||
| 894 | |||
| 895 | indio_dev->dev.parent = &i2c->dev; | 896 | indio_dev->dev.parent = &i2c->dev; |
| 896 | switch (ak8974->variant) { | 897 | switch (ak8974->variant) { |
| 897 | case AK8974_WHOAMI_VALUE_AMI306: | 898 | case AK8974_WHOAMI_VALUE_AMI306: |
| @@ -957,6 +958,11 @@ no_irq: · 59 unmodified lines | |||
| 957 | goto cleanup_buffer; | 958 | goto cleanup_buffer; |
| 958 | } | 959 | } |
| 959 | 960 | ||
| 961 | pm_runtime_set_autosuspend_delay(&i2c->dev, | ||
| 962 | AK8974_AUTOSUSPEND_DELAY); | ||
| 963 | pm_runtime_use_autosuspend(&i2c->dev); | ||
| 964 | pm_runtime_put(&i2c->dev); | ||
| 965 | |||
| 960 | return 0; | 966 | return 0; |
| 961 | 967 | ||
| 962 | cleanup_buffer: | 968 | cleanup_buffer: |
| @@ -965,7 +971,6 @@ disable_pm: · 2 unmodified lines | |||
| 965 | pm_runtime_put_noidle(&i2c->dev); | 971 | pm_runtime_put_noidle(&i2c->dev); |
| 966 | pm_runtime_disable(&i2c->dev); | 972 | pm_runtime_disable(&i2c->dev); |
| 967 | ak8974_set_power(ak8974, AK8974_PWR_OFF); | 973 | ak8974_set_power(ak8974, AK8974_PWR_OFF); |
| 968 | power_off: | ||
| 969 | regulator_bulk_disable(ARRAY_SIZE(ak8974->regs), ak8974->regs); | 974 | regulator_bulk_disable(ARRAY_SIZE(ak8974->regs), ak8974->regs); |
| 970 | 975 | ||
| 971 | return ret; | 976 | return ret; |
| @@ -212,16 +212,21 @@ static irqreturn_t ms5611_trigger_handler(int irq, void *p) · 211 unmodified lines | |||
| 212 | struct iio_poll_func *pf = p; | 212 | struct iio_poll_func *pf = p; |
| 213 | struct iio_dev *indio_dev = pf->indio_dev; | 213 | struct iio_dev *indio_dev = pf->indio_dev; |
| 214 | struct ms5611_state *st = iio_priv(indio_dev); | 214 | struct ms5611_state *st = iio_priv(indio_dev); |
| 215 | s32 buf[4]; /* s32 (pressure) + s32 (temp) + 2 * s32 (timestamp) */ | 215 | /* Ensure buffer elements are naturally aligned */ |
| 216 | struct { | ||
| 217 | s32 channels[2]; | ||
| 218 | s64 ts __aligned(8); | ||
| 219 | } scan; | ||
| 216 | int ret; | 220 | int ret; |
| 217 | 221 | ||
| 218 | mutex_lock(&st->lock); | 222 | mutex_lock(&st->lock); |
| 219 | ret = ms5611_read_temp_and_pressure(indio_dev, &buf[1], &buf[0]); | 223 | ret = ms5611_read_temp_and_pressure(indio_dev, &scan.channels[1], |
| 224 | &scan.channels[0]); | ||
| 220 | mutex_unlock(&st->lock); | 225 | mutex_unlock(&st->lock); |
| 221 | if (ret < 0) | 226 | if (ret < 0) |
| 222 | goto err; | 227 | goto err; |
| 223 | 228 | ||
| 224 | iio_push_to_buffers_with_timestamp(indio_dev, buf, | 229 | iio_push_to_buffers_with_timestamp(indio_dev, &scan, |
| 225 | iio_get_time_ns(indio_dev)); | 230 | iio_get_time_ns(indio_dev)); |
| 226 | 231 | ||
| 227 | err: | 232 | err: |
| @@ -665,8 +665,10 @@ static int zpa2326_resume(const struct iio_dev *indio_dev) · 664 unmodified lines | |||
| 665 | int err; | 665 | int err; |
| 666 | 666 | ||
| 667 | err = pm_runtime_get_sync(indio_dev->dev.parent); | 667 | err = pm_runtime_get_sync(indio_dev->dev.parent); |
| 668 | if (err < 0) | 668 | if (err < 0) { |
| 669 | pm_runtime_put(indio_dev->dev.parent); | ||
| 669 | return err; | 670 | return err; |
| 671 | } | ||
| 670 | 672 | ||
| 671 | if (err > 0) { | 673 | if (err > 0) { |
| 672 | /* | 674 | /* |
| @@ -918,6 +918,7 @@ static void cm_free_work(struct cm_work *work) · 917 unmodified lines | |||
| 918 | 918 | ||
| 919 | static void cm_queue_work_unlock(struct cm_id_private *cm_id_priv, | 919 | static void cm_queue_work_unlock(struct cm_id_private *cm_id_priv, |
| 920 | struct cm_work *work) | 920 | struct cm_work *work) |
| 921 | __releases(&cm_id_priv->lock) | ||
| 921 | { | 922 | { |
| 922 | bool immediate; | 923 | bool immediate; |
| 923 | 924 | ||
| @@ -1624,6 +1624,8 @@ static struct rdma_id_private *cma_find_listener( · 1623 unmodified lines | |||
| 1624 | { | 1624 | { |
| 1625 | struct rdma_id_private *id_priv, *id_priv_dev; | 1625 | struct rdma_id_private *id_priv, *id_priv_dev; |
| 1626 | 1626 | ||
| 1627 | lockdep_assert_held(&lock); | ||
| 1628 | |||
| 1627 | if (!bind_list) | 1629 | if (!bind_list) |
| 1628 | return ERR_PTR(-EINVAL); | 1630 | return ERR_PTR(-EINVAL); |
| 1629 | 1631 | ||
| @@ -1670,6 +1672,7 @@ cma_ib_id_from_event(struct ib_cm_id *cm_id, · 40 unmodified lines | |||
| 1670 | } | 1672 | } |
| 1671 | } | 1673 | } |
| 1672 | 1674 | ||
| 1675 | mutex_lock(&lock); | ||
| 1673 | /* | 1676 | /* |
| 1674 | * Net namespace might be getting deleted while route lookup, | 1677 | * Net namespace might be getting deleted while route lookup, |
| 1675 | * cm_id lookup is in progress. Therefore, perform netdevice | 1678 | * cm_id lookup is in progress. Therefore, perform netdevice |
| @@ -1711,6 +1714,7 @@ cma_ib_id_from_event(struct ib_cm_id *cm_id, · 35 unmodified lines | |||
| 1711 | id_priv = cma_find_listener(bind_list, cm_id, ib_event, req, *net_dev); | 1714 | id_priv = cma_find_listener(bind_list, cm_id, ib_event, req, *net_dev); |
| 1712 | err: | 1715 | err: |
| 1713 | rcu_read_unlock(); | 1716 | rcu_read_unlock(); |
| 1717 | mutex_unlock(&lock); | ||
| 1714 | if (IS_ERR(id_priv) && *net_dev) { | 1718 | if (IS_ERR(id_priv) && *net_dev) { |
| 1715 | dev_put(*net_dev); | 1719 | dev_put(*net_dev); |
| 1716 | *net_dev = NULL; | 1720 | *net_dev = NULL; |
| @@ -2492,6 +2496,8 @@ static void cma_listen_on_dev(struct rdma_id_private *id_priv, · 775 unmodified lines | |||
| 2492 | struct net *net = id_priv->id.route.addr.dev_addr.net; | 2496 | struct net *net = id_priv->id.route.addr.dev_addr.net; |
| 2493 | int ret; | 2497 | int ret; |
| 2494 | 2498 | ||
| 2499 | lockdep_assert_held(&lock); | ||
| 2500 | |||
| 2495 | if (cma_family(id_priv) == AF_IB && !rdma_cap_ib_cm(cma_dev->device, 1)) | 2501 | if (cma_family(id_priv) == AF_IB && !rdma_cap_ib_cm(cma_dev->device, 1)) |
| 2496 | return; | 2502 | return; |
| 2497 | 2503 | ||
| @@ -3342,6 +3348,8 @@ static void cma_bind_port(struct rdma_bind_list *bind_list, · 844 unmodified lines | |||
| 3342 | u64 sid, mask; | 3348 | u64 sid, mask; |
| 3343 | __be16 port; | 3349 | __be16 port; |
| 3344 | 3350 | ||
| 3351 | lockdep_assert_held(&lock); | ||
| 3352 | |||
| 3345 | addr = cma_src_addr(id_priv); | 3353 | addr = cma_src_addr(id_priv); |
| 3346 | port = htons(bind_list->port); | 3354 | port = htons(bind_list->port); |
| 3347 | 3355 | ||
| @@ -3370,6 +3378,8 @@ static int cma_alloc_port(enum rdma_ucm_port_space ps, · 22 unmodified lines | |||
| 3370 | struct rdma_bind_list *bind_list; | 3378 | struct rdma_bind_list *bind_list; |
| 3371 | int ret; | 3379 | int ret; |
| 3372 | 3380 | ||
| 3381 | lockdep_assert_held(&lock); | ||
| 3382 | |||
| 3373 | bind_list = kzalloc(sizeof *bind_list, GFP_KERNEL); | 3383 | bind_list = kzalloc(sizeof *bind_list, GFP_KERNEL); |
| 3374 | if (!bind_list) | 3384 | if (!bind_list) |
| 3375 | return -ENOMEM; | 3385 | return -ENOMEM; |
| @@ -3396,6 +3406,8 @@ static int cma_port_is_unique(struct rdma_bind_list *bind_list, · 20 unmodified lines | |||
| 3396 | struct sockaddr *saddr = cma_src_addr(id_priv); | 3406 | struct sockaddr *saddr = cma_src_addr(id_priv); |
| 3397 | __be16 dport = cma_port(daddr); | 3407 | __be16 dport = cma_port(daddr); |
| 3398 | 3408 | ||
| 3409 | lockdep_assert_held(&lock); | ||
| 3410 | |||
| 3399 | hlist_for_each_entry(cur_id, &bind_list->owners, node) { | 3411 | hlist_for_each_entry(cur_id, &bind_list->owners, node) { |
| 3400 | struct sockaddr *cur_daddr = cma_dst_addr(cur_id); | 3412 | struct sockaddr *cur_daddr = cma_dst_addr(cur_id); |
| 3401 | struct sockaddr *cur_saddr = cma_src_addr(cur_id); | 3413 | struct sockaddr *cur_saddr = cma_src_addr(cur_id); |
| @@ -3435,6 +3447,8 @@ static int cma_alloc_any_port(enum rdma_ucm_port_space ps, · 33 unmodified lines | |||
| 3435 | unsigned int rover; | 3447 | unsigned int rover; |
| 3436 | struct net *net = id_priv->id.route.addr.dev_addr.net; | 3448 | struct net *net = id_priv->id.route.addr.dev_addr.net; |
| 3437 | 3449 | ||
| 3450 | lockdep_assert_held(&lock); | ||
| 3451 | |||
| 3438 | inet_get_local_port_range(net, &low, &high); | 3452 | inet_get_local_port_range(net, &low, &high); |
| 3439 | remaining = (high - low) + 1; | 3453 | remaining = (high - low) + 1; |
| 3440 | rover = prandom_u32() % remaining + low; | 3454 | rover = prandom_u32() % remaining + low; |
| @@ -3482,6 +3496,8 @@ static int cma_check_port(struct rdma_bind_list *bind_list, · 41 unmodified lines | |||
| 3482 | struct rdma_id_private *cur_id; | 3496 | struct rdma_id_private *cur_id; |
| 3483 | struct sockaddr *addr, *cur_addr; | 3497 | struct sockaddr *addr, *cur_addr; |
| 3484 | 3498 | ||
| 3499 | lockdep_assert_held(&lock); | ||
| 3500 | |||
| 3485 | addr = cma_src_addr(id_priv); | 3501 | addr = cma_src_addr(id_priv); |
| 3486 | hlist_for_each_entry(cur_id, &bind_list->owners, node) { | 3502 | hlist_for_each_entry(cur_id, &bind_list->owners, node) { |
| 3487 | if (id_priv == cur_id) | 3503 | if (id_priv == cur_id) |
| @@ -3512,6 +3528,8 @@ static int cma_use_port(enum rdma_ucm_port_space ps, · 24 unmodified lines | |||
| 3512 | unsigned short snum; | 3528 | unsigned short snum; |
| 3513 | int ret; | 3529 | int ret; |
| 3514 | 3530 | ||
| 3531 | lockdep_assert_held(&lock); | ||
| 3532 | |||
| 3515 | snum = ntohs(cma_port(cma_src_addr(id_priv))); | 3533 | snum = ntohs(cma_port(cma_src_addr(id_priv))); |
| 3516 | if (snum < PROT_SOCK && !capable(CAP_NET_BIND_SERVICE)) | 3534 | if (snum < PROT_SOCK && !capable(CAP_NET_BIND_SERVICE)) |
| 3517 | return -EACCES; | 3535 | return -EACCES; |
| @@ -202,7 +202,7 @@ static int __rdma_counter_unbind_qp(struct ib_qp *qp) · 201 unmodified lines | |||
| 202 | return ret; | 202 | return ret; |
| 203 | } | 203 | } |
| 204 | 204 | ||
| 205 | static void counter_history_stat_update(const struct rdma_counter *counter) | 205 | static void counter_history_stat_update(struct rdma_counter *counter) |
| 206 | { | 206 | { |
| 207 | struct ib_device *dev = counter->device; | 207 | struct ib_device *dev = counter->device; |
| 208 | struct rdma_port_counter *port_counter; | 208 | struct rdma_port_counter *port_counter; |
| @@ -212,6 +212,8 @@ static void counter_history_stat_update(const struct rdma_counter *counter) · 3 unmodified lines | |||
| 212 | if (!port_counter->hstats) | 212 | if (!port_counter->hstats) |
| 213 | return; | 213 | return; |
| 214 | 214 | ||
| 215 | rdma_counter_query_stats(counter); | ||
| 216 | |||
| 215 | for (i = 0; i < counter->stats->num_counters; i++) | 217 | for (i = 0; i < counter->stats->num_counters; i++) |
| 216 | port_counter->hstats->value[i] += counter->stats->value[i]; | 218 | port_counter->hstats->value[i] += counter->stats->value[i]; |
| 217 | } | 219 | } |
| @@ -509,10 +509,10 @@ static void unregister_mad_agent(struct ib_mad_agent_private *mad_agent_priv) · 508 unmodified lines | |||
| 509 | xa_erase(&ib_mad_clients, mad_agent_priv->agent.hi_tid); | 509 | xa_erase(&ib_mad_clients, mad_agent_priv->agent.hi_tid); |
| 510 | 510 | ||
| 511 | flush_workqueue(port_priv->wq); | 511 | flush_workqueue(port_priv->wq); |
| 512 | ib_cancel_rmpp_recvs(mad_agent_priv); | ||
| 513 | 512 | ||
| 514 | deref_mad_agent(mad_agent_priv); | 513 | deref_mad_agent(mad_agent_priv); |
| 515 | wait_for_completion(&mad_agent_priv->comp); | 514 | wait_for_completion(&mad_agent_priv->comp); |
| 515 | ib_cancel_rmpp_recvs(mad_agent_priv); | ||
| 516 | 516 | ||
| 517 | ib_mad_agent_security_cleanup(&mad_agent_priv->agent); | 517 | ib_mad_agent_security_cleanup(&mad_agent_priv->agent); |
| 518 | 518 | ||
| @@ -2718,6 +2718,7 @@ static int ib_mad_post_receive_mads(struct ib_mad_qp_info *qp_info, · 2199 unmodified lines | |||
| 2718 | DMA_FROM_DEVICE); | 2718 | DMA_FROM_DEVICE); |
| 2719 | if (unlikely(ib_dma_mapping_error(qp_info->port_priv->device, | 2719 | if (unlikely(ib_dma_mapping_error(qp_info->port_priv->device, |
| 2720 | sg_list.addr))) { | 2720 | sg_list.addr))) { |
| 2721 | kfree(mad_priv); | ||
| 2721 | ret = -ENOMEM; | 2722 | ret = -ENOMEM; |
| 2722 | break; | 2723 | break; |
| 2723 | } | 2724 | } |
| @@ -470,40 +470,46 @@ static struct ib_uobject * · 469 unmodified lines | |||
| 470 | alloc_begin_fd_uobject(const struct uverbs_api_object *obj, | 470 | alloc_begin_fd_uobject(const struct uverbs_api_object *obj, |
| 471 | struct uverbs_attr_bundle *attrs) | 471 | struct uverbs_attr_bundle *attrs) |
| 472 | { | 472 | { |
| 473 | const struct uverbs_obj_fd_type *fd_type = | 473 | const struct uverbs_obj_fd_type *fd_type; |
| 474 | container_of(obj->type_attrs, struct uverbs_obj_fd_type, type); | ||
| 475 | int new_fd; | 474 | int new_fd; |
| 476 | struct ib_uobject *uobj; | 475 | struct ib_uobject *uobj, *ret; |
| 477 | struct file *filp; | 476 | struct file *filp; |
| 478 | 477 | ||
| 478 | uobj = alloc_uobj(attrs, obj); | ||
| 479 | if (IS_ERR(uobj)) | ||
| 480 | return uobj; | ||
| 481 | |||
| 482 | fd_type = | ||
| 483 | container_of(obj->type_attrs, struct uverbs_obj_fd_type, type); | ||
| 479 | if (WARN_ON(fd_type->fops->release != &uverbs_uobject_fd_release && | 484 | if (WARN_ON(fd_type->fops->release != &uverbs_uobject_fd_release && |
| 480 | fd_type->fops->release != &uverbs_async_event_release)) | 485 | fd_type->fops->release != &uverbs_async_event_release)) { |
| 481 | return ERR_PTR(-EINVAL); | 486 | ret = ERR_PTR(-EINVAL); |
| 487 | goto err_fd; | ||
| 488 | } | ||
| 482 | 489 | ||
| 483 | new_fd = get_unused_fd_flags(O_CLOEXEC); | 490 | new_fd = get_unused_fd_flags(O_CLOEXEC); |
| 484 | if (new_fd < 0) | 491 | if (new_fd < 0) { |
| 485 | return ERR_PTR(new_fd); | 492 | ret = ERR_PTR(new_fd); |
| 486 | |||
| 487 | uobj = alloc_uobj(attrs, obj); | ||
| 488 | if (IS_ERR(uobj)) | ||
| 489 | goto err_fd; | 493 | goto err_fd; |
| 494 | } | ||
| 490 | 495 | ||
| 491 | /* Note that uverbs_uobject_fd_release() is called during abort */ | 496 | /* Note that uverbs_uobject_fd_release() is called during abort */ |
| 492 | filp = anon_inode_getfile(fd_type->name, fd_type->fops, NULL, | 497 | filp = anon_inode_getfile(fd_type->name, fd_type->fops, NULL, |
| 493 | fd_type->flags); | 498 | fd_type->flags); |
| 494 | if (IS_ERR(filp)) { | 499 | if (IS_ERR(filp)) { |
| 495 | uverbs_uobject_put(uobj); | 500 | ret = ERR_CAST(filp); |
| 496 | uobj = ERR_CAST(filp); | 501 | goto err_getfile; |
| 497 | goto err_fd; | ||
| 498 | } | 502 | } |
| 499 | uobj->object = filp; | 503 | uobj->object = filp; |
| 500 | 504 | ||
| 501 | uobj->id = new_fd; | 505 | uobj->id = new_fd; |
| 502 | return uobj; | 506 | return uobj; |
| 503 | 507 | ||
| 504 | err_fd: | 508 | err_getfile: |
| 505 | put_unused_fd(new_fd); | 509 | put_unused_fd(new_fd); |
| 506 | return uobj; | 510 | err_fd: |
| 511 | uverbs_uobject_put(uobj); | ||
| 512 | return ret; | ||
| 507 | } | 513 | } |
| 508 | 514 | ||
| 509 | struct ib_uobject *rdma_alloc_begin_uobject(const struct uverbs_api_object *obj, | 515 | struct ib_uobject *rdma_alloc_begin_uobject(const struct uverbs_api_object *obj, |
| @@ -829,13 +829,20 @@ static int ib_nl_get_path_rec_attrs_len(ib_sa_comp_mask comp_mask) · 828 unmodified lines | |||
| 829 | return len; | 829 | return len; |
| 830 | } | 830 | } |
| 831 | 831 | ||
| 832 | static int ib_nl_send_msg(struct ib_sa_query *query, gfp_t gfp_mask) | 832 | static int ib_nl_make_request(struct ib_sa_query *query, gfp_t gfp_mask) |
| 833 | { | 833 | { |
| 834 | struct sk_buff *skb = NULL; | 834 | struct sk_buff *skb = NULL; |
| 835 | struct nlmsghdr *nlh; | 835 | struct nlmsghdr *nlh; |
| 836 | void *data; | 836 | void *data; |
| 837 | struct ib_sa_mad *mad; | 837 | struct ib_sa_mad *mad; |
| 838 | int len; | 838 | int len; |
| 839 | unsigned long flags; | ||
| 840 | unsigned long delay; | ||
| 841 | gfp_t gfp_flag; | ||
| 842 | int ret; | ||
| 843 | |||
| 844 | INIT_LIST_HEAD(&query->list); | ||
| 845 | query->seq = (u32)atomic_inc_return(&ib_nl_sa_request_seq); | ||
| 839 | 846 | ||
| 840 | mad = query->mad_buf->mad; | 847 | mad = query->mad_buf->mad; |
| 841 | len = ib_nl_get_path_rec_attrs_len(mad->sa_hdr.comp_mask); | 848 | len = ib_nl_get_path_rec_attrs_len(mad->sa_hdr.comp_mask); |
| @@ -860,36 +867,25 @@ static int ib_nl_send_msg(struct ib_sa_query *query, gfp_t gfp_mask) · 18 unmodified lines | |||
| 860 | /* Repair the nlmsg header length */ | 867 | /* Repair the nlmsg header length */ |
| 861 | nlmsg_end(skb, nlh); | 868 | nlmsg_end(skb, nlh); |
| 862 | 869 | ||
| 863 | return rdma_nl_multicast(&init_net, skb, RDMA_NL_GROUP_LS, gfp_mask); | 870 | gfp_flag = ((gfp_mask & GFP_ATOMIC) == GFP_ATOMIC) ? GFP_ATOMIC : |
| 864 | } | 871 | GFP_NOWAIT; |
| 865 | 872 | ||
| 866 | static int ib_nl_make_request(struct ib_sa_query *query, gfp_t gfp_mask) | 873 | spin_lock_irqsave(&ib_nl_request_lock, flags); |
| 867 | { | 874 | ret = rdma_nl_multicast(&init_net, skb, RDMA_NL_GROUP_LS, gfp_flag); |
| 868 | unsigned long flags; | ||
| 869 | unsigned long delay; | ||
| 870 | int ret; | ||
| 871 | 875 | ||
| 872 | INIT_LIST_HEAD(&query->list); | 876 | if (ret) |
| 873 | query->seq = (u32)atomic_inc_return(&ib_nl_sa_request_seq); | 877 | goto out; |
| 874 | 878 | ||
| 875 | /* Put the request on the list first.*/ | 879 | /* Put the request on the list.*/ |
| 876 | spin_lock_irqsave(&ib_nl_request_lock, flags); | ||
| 877 | delay = msecs_to_jiffies(sa_local_svc_timeout_ms); | 880 | delay = msecs_to_jiffies(sa_local_svc_timeout_ms); |
| 878 | query->timeout = delay + jiffies; | 881 | query->timeout = delay + jiffies; |
| 879 | list_add_tail(&query->list, &ib_nl_request_list); | 882 | list_add_tail(&query->list, &ib_nl_request_list); |
| 880 | /* Start the timeout if this is the only request */ | 883 | /* Start the timeout if this is the only request */ |
| 881 | if (ib_nl_request_list.next == &query->list) | 884 | if (ib_nl_request_list.next == &query->list) |
| 882 | queue_delayed_work(ib_nl_wq, &ib_nl_timed_work, delay); | 885 | queue_delayed_work(ib_nl_wq, &ib_nl_timed_work, delay); |
| 883 | spin_unlock_irqrestore(&ib_nl_request_lock, flags); | ||
| 884 | 886 | ||
| 885 | ret = ib_nl_send_msg(query, gfp_mask); | 887 | out: |
| 886 | if (ret) { | 888 | spin_unlock_irqrestore(&ib_nl_request_lock, flags); |
| 887 | ret = -EIO; | ||
| 888 | /* Remove the request */ | ||
| 889 | spin_lock_irqsave(&ib_nl_request_lock, flags); | ||
| 890 | list_del(&query->list); | ||
| 891 | spin_unlock_irqrestore(&ib_nl_request_lock, flags); | ||
| 892 | } | ||
| 893 | 889 | ||
| 894 | return ret; | 890 | return ret; |
| 895 | } | 891 | } |
| @@ -212,6 +212,7 @@ int efa_query_device(struct ib_device *ibdev, · 211 unmodified lines | |||
| 212 | props->max_send_sge = dev_attr->max_sq_sge; | 212 | props->max_send_sge = dev_attr->max_sq_sge; |
| 213 | props->max_recv_sge = dev_attr->max_rq_sge; | 213 | props->max_recv_sge = dev_attr->max_rq_sge; |
| 214 | props->max_sge_rd = dev_attr->max_wr_rdma_sge; | 214 | props->max_sge_rd = dev_attr->max_wr_rdma_sge; |
| 215 | props->max_pkeys = 1; | ||
| 215 | 216 | ||
| 216 | if (udata && udata->outlen) { | 217 | if (udata && udata->outlen) { |
| 217 | resp.max_sq_sge = dev_attr->max_sq_sge; | 218 | resp.max_sq_sge = dev_attr->max_sq_sge; |
| @@ -985,15 +985,10 @@ static ssize_t qsfp2_debugfs_read(struct file *file, char __user *buf, · 984 unmodified lines | |||
| 985 | static int __i2c_debugfs_open(struct inode *in, struct file *fp, u32 target) | 985 | static int __i2c_debugfs_open(struct inode *in, struct file *fp, u32 target) |
| 986 | { | 986 | { |
| 987 | struct hfi1_pportdata *ppd; | 987 | struct hfi1_pportdata *ppd; |
| 988 | int ret; | ||
| 989 | 988 | ||
| 990 | ppd = private2ppd(fp); | 989 | ppd = private2ppd(fp); |
| 991 | 990 | ||
| 992 | ret = acquire_chip_resource(ppd->dd, i2c_target(target), 0); | 991 | return acquire_chip_resource(ppd->dd, i2c_target(target), 0); |
| 993 | if (ret) /* failed - release the module */ | ||
| 994 | module_put(THIS_MODULE); | ||
| 995 | |||
| 996 | return ret; | ||
| 997 | } | 992 | } |
| 998 | 993 | ||
| 999 | static int i2c1_debugfs_open(struct inode *in, struct file *fp) | 994 | static int i2c1_debugfs_open(struct inode *in, struct file *fp) |
| @@ -1013,7 +1008,6 @@ static int __i2c_debugfs_release(struct inode *in, struct file *fp, u32 target) · 13 unmodified lines | |||
| 1013 | ppd = private2ppd(fp); | 1008 | ppd = private2ppd(fp); |
| 1014 | 1009 | ||
| 1015 | release_chip_resource(ppd->dd, i2c_target(target)); | 1010 | release_chip_resource(ppd->dd, i2c_target(target)); |
| 1016 | module_put(THIS_MODULE); | ||
| 1017 | 1011 | ||
| 1018 | return 0; | 1012 | return 0; |
| 1019 | } | 1013 | } |
| @@ -1031,18 +1025,10 @@ static int i2c2_debugfs_release(struct inode *in, struct file *fp) · 11 unmodified lines | |||
| 1031 | static int __qsfp_debugfs_open(struct inode *in, struct file *fp, u32 target) | 1025 | static int __qsfp_debugfs_open(struct inode *in, struct file *fp, u32 target) |
| 1032 | { | 1026 | { |
| 1033 | struct hfi1_pportdata *ppd; | 1027 | struct hfi1_pportdata *ppd; |
| 1034 | int ret; | ||
| 1035 | |||
| 1036 | if (!try_module_get(THIS_MODULE)) | ||
| 1037 | return -ENODEV; | ||
| 1038 | 1028 | ||
| 1039 | ppd = private2ppd(fp); | 1029 | ppd = private2ppd(fp); |
| 1040 | 1030 | ||
| 1041 | ret = acquire_chip_resource(ppd->dd, i2c_target(target), 0); | 1031 | return acquire_chip_resource(ppd->dd, i2c_target(target), 0); |
| 1042 | if (ret) /* failed - release the module */ | ||
| 1043 | module_put(THIS_MODULE); | ||
| 1044 | |||
| 1045 | return ret; | ||
| 1046 | } | 1032 | } |
| 1047 | 1033 | ||
| 1048 | static int qsfp1_debugfs_open(struct inode *in, struct file *fp) | 1034 | static int qsfp1_debugfs_open(struct inode *in, struct file *fp) |
| @@ -1062,7 +1048,6 @@ static int __qsfp_debugfs_release(struct inode *in, struct file *fp, u32 target) · 13 unmodified lines | |||
| 1062 | ppd = private2ppd(fp); | 1048 | ppd = private2ppd(fp); |
| 1063 | 1049 | ||
| 1064 | release_chip_resource(ppd->dd, i2c_target(target)); | 1050 | release_chip_resource(ppd->dd, i2c_target(target)); |
| 1065 | module_put(THIS_MODULE); | ||
| 1066 | 1051 | ||
| 1067 | return 0; | 1052 | return 0; |
| 1068 | } | 1053 | } |
| @@ -830,6 +830,29 @@ wq_error: · 829 unmodified lines | |||
| 830 | return -ENOMEM; | 830 | return -ENOMEM; |
| 831 | } | 831 | } |
| 832 | 832 | ||
| 833 | /** | ||
| 834 | * destroy_workqueues - destroy per port workqueues | ||
| 835 | * @dd: the hfi1_ib device | ||
| 836 | */ | ||
| 837 | static void destroy_workqueues(struct hfi1_devdata *dd) | ||
| 838 | { | ||
| 839 | int pidx; | ||
| 840 | struct hfi1_pportdata *ppd; | ||
| 841 | |||
| 842 | for (pidx = 0; pidx < dd->num_pports; ++pidx) { | ||
| 843 | ppd = dd->pport + pidx; | ||
| 844 | |||
| 845 | if (ppd->hfi1_wq) { | ||
| 846 | destroy_workqueue(ppd->hfi1_wq); | ||
| 847 | ppd->hfi1_wq = NULL; | ||
| 848 | } | ||
| 849 | if (ppd->link_wq) { | ||
| 850 | destroy_workqueue(ppd->link_wq); | ||
| 851 | ppd->link_wq = NULL; | ||
| 852 | } | ||
| 853 | } | ||
| 854 | } | ||
| 855 | |||
| 833 | /** | 856 | /** |
| 834 | * enable_general_intr() - Enable the IRQs that will be handled by the | 857 | * enable_general_intr() - Enable the IRQs that will be handled by the |
| 835 | * general interrupt handler. | 858 | * general interrupt handler. |
| @@ -1103,15 +1126,10 @@ static void shutdown_device(struct hfi1_devdata *dd) · 267 unmodified lines | |||
| 1103 | * We can't count on interrupts since we are stopping. | 1126 | * We can't count on interrupts since we are stopping. |
| 1104 | */ | 1127 | */ |
| 1105 | hfi1_quiet_serdes(ppd); | 1128 | hfi1_quiet_serdes(ppd); |
| 1106 | 1129 | if (ppd->hfi1_wq) | |
| 1107 | if (ppd->hfi1_wq) { | 1130 | flush_workqueue(ppd->hfi1_wq); |
| 1108 | destroy_workqueue(ppd->hfi1_wq); | 1131 | if (ppd->link_wq) |
| 1109 | ppd->hfi1_wq = NULL; | 1132 | flush_workqueue(ppd->link_wq); |
| 1110 | } | ||
| 1111 | if (ppd->link_wq) { | ||
| 1112 | destroy_workqueue(ppd->link_wq); | ||
| 1113 | ppd->link_wq = NULL; | ||
| 1114 | } | ||
| 1115 | } | 1133 | } |
| 1116 | sdma_exit(dd); | 1134 | sdma_exit(dd); |
| 1117 | } | 1135 | } |
| @@ -1756,6 +1774,7 @@ static void remove_one(struct pci_dev *pdev) · 638 unmodified lines | |||
| 1756 | * clear dma engines, etc. | 1774 | * clear dma engines, etc. |
| 1757 | */ | 1775 | */ |
| 1758 | shutdown_device(dd); | 1776 | shutdown_device(dd); |
| 1777 | destroy_workqueues(dd); | ||
| 1759 | 1778 | ||
| 1760 | stop_timers(dd); | 1779 | stop_timers(dd); |
| 1761 | 1780 | ||
| @@ -399,7 +399,7 @@ static inline void iowait_get_priority(struct iowait *w) · 398 unmodified lines | |||
| 399 | * @wait_head: the wait queue | 399 | * @wait_head: the wait queue |
| 400 | * | 400 | * |
| 401 | * This function is called to insert an iowait struct into a | 401 | * This function is called to insert an iowait struct into a |
| 402 | * wait queue after a resource (eg, sdma decriptor or pio | 402 | * wait queue after a resource (eg, sdma descriptor or pio |
| 403 | * buffer) is run out. | 403 | * buffer) is run out. |
| 404 | */ | 404 | */ |
| 405 | static inline void iowait_queue(bool pkts_sent, struct iowait *w, | 405 | static inline void iowait_queue(bool pkts_sent, struct iowait *w, |
| @@ -67,6 +67,9 @@ struct hfi1_ipoib_circ_buf { · 66 unmodified lines | |||
| 67 | * @sde: sdma engine | 67 | * @sde: sdma engine |
| 68 | * @tx_list: tx request list | 68 | * @tx_list: tx request list |
| 69 | * @sent_txreqs: count of txreqs posted to sdma | 69 | * @sent_txreqs: count of txreqs posted to sdma |
| 70 | * @stops: count of stops of queue | ||
| 71 | * @ring_full: ring has been filled | ||
| 72 | * @no_desc: descriptor shortage seen | ||
| 70 | * @flow: tracks when list needs to be flushed for a flow change | 73 | * @flow: tracks when list needs to be flushed for a flow change |
| 71 | * @q_idx: ipoib Tx queue index | 74 | * @q_idx: ipoib Tx queue index |
| 72 | * @pkts_sent: indicator packets have been sent from this queue | 75 | * @pkts_sent: indicator packets have been sent from this queue |
| @@ -80,6 +83,9 @@ struct hfi1_ipoib_txq { · 7 unmodified lines | |||
| 80 | struct sdma_engine *sde; | 83 | struct sdma_engine *sde; |
| 81 | struct list_head tx_list; | 84 | struct list_head tx_list; |
| 82 | u64 sent_txreqs; | 85 | u64 sent_txreqs; |
| 86 | atomic_t stops; | ||
| 87 | atomic_t ring_full; | ||
| 88 | atomic_t no_desc; | ||
| 83 | union hfi1_ipoib_flow flow; | 89 | union hfi1_ipoib_flow flow; |
| 84 | u8 q_idx; | 90 | u8 q_idx; |
| 85 | bool pkts_sent; | 91 | bool pkts_sent; |
| @@ -55,23 +55,48 @@ static u64 hfi1_ipoib_txreqs(const u64 sent, const u64 completed) · 54 unmodified lines | |||
| 55 | return sent - completed; | 55 | return sent - completed; |
| 56 | } | 56 | } |
| 57 | 57 | ||
| 58 | static void hfi1_ipoib_check_queue_depth(struct hfi1_ipoib_txq *txq) | 58 | static u64 hfi1_ipoib_used(struct hfi1_ipoib_txq *txq) |
| 59 | { | 59 | { |
| 60 | if (unlikely(hfi1_ipoib_txreqs(++txq->sent_txreqs, | 60 | return hfi1_ipoib_txreqs(txq->sent_txreqs, |
| 61 | atomic64_read(&txq->complete_txreqs)) >= | 61 | atomic64_read(&txq->complete_txreqs)); |
| 62 | min_t(unsigned int, txq->priv->netdev->tx_queue_len, | 62 | } |
| 63 | txq->tx_ring.max_items - 1))) | 63 | |
| 64 | static void hfi1_ipoib_stop_txq(struct hfi1_ipoib_txq *txq) | ||
| 65 | { | ||
| 66 | if (atomic_inc_return(&txq->stops) == 1) | ||
| 64 | netif_stop_subqueue(txq->priv->netdev, txq->q_idx); | 67 | netif_stop_subqueue(txq->priv->netdev, txq->q_idx); |
| 65 | } | 68 | } |
| 66 | 69 | ||
| 70 | static void hfi1_ipoib_wake_txq(struct hfi1_ipoib_txq *txq) | ||
| 71 | { | ||
| 72 | if (atomic_dec_and_test(&txq->stops)) | ||
| 73 | netif_wake_subqueue(txq->priv->netdev, txq->q_idx); | ||
| 74 | } | ||
| 75 | |||
| 76 | static uint hfi1_ipoib_ring_hwat(struct hfi1_ipoib_txq *txq) | ||
| 77 | { | ||
| 78 | return min_t(uint, txq->priv->netdev->tx_queue_len, | ||
| 79 | txq->tx_ring.max_items - 1); | ||
| 80 | } | ||
| 81 | |||
| 82 | static uint hfi1_ipoib_ring_lwat(struct hfi1_ipoib_txq *txq) | ||
| 83 | { | ||
| 84 | return min_t(uint, txq->priv->netdev->tx_queue_len, | ||
| 85 | txq->tx_ring.max_items) >> 1; | ||
| 86 | } | ||
| 87 | |||
| 88 | static void hfi1_ipoib_check_queue_depth(struct hfi1_ipoib_txq *txq) | ||
| 89 | { | ||
| 90 | ++txq->sent_txreqs; | ||
| 91 | if (hfi1_ipoib_used(txq) >= hfi1_ipoib_ring_hwat(txq) && | ||
| 92 | !atomic_xchg(&txq->ring_full, 1)) | ||
| 93 | hfi1_ipoib_stop_txq(txq); | ||
| 94 | } | ||
| 95 | |||
| 67 | static void hfi1_ipoib_check_queue_stopped(struct hfi1_ipoib_txq *txq) | 96 | static void hfi1_ipoib_check_queue_stopped(struct hfi1_ipoib_txq *txq) |
| 68 | { | 97 | { |
| 69 | struct net_device *dev = txq->priv->netdev; | 98 | struct net_device *dev = txq->priv->netdev; |
| 70 | 99 | ||
| 71 | /* If the queue is already running just return */ | ||
| 72 | if (likely(!__netif_subqueue_stopped(dev, txq->q_idx))) | ||
| 73 | return; | ||
| 74 | |||
| 75 | /* If shutting down just return as queue state is irrelevant */ | 100 | /* If shutting down just return as queue state is irrelevant */ |
| 76 | if (unlikely(dev->reg_state != NETREG_REGISTERED)) | 101 | if (unlikely(dev->reg_state != NETREG_REGISTERED)) |
| 77 | return; | 102 | return; |
| @@ -86,11 +111,9 @@ static void hfi1_ipoib_check_queue_stopped(struct hfi1_ipoib_txq *txq) · 8 unmodified lines | |||
| 86 | * Use the minimum of the current tx_queue_len or the rings max txreqs | 111 | * Use the minimum of the current tx_queue_len or the rings max txreqs |
| 87 | * to protect against ring overflow. | 112 | * to protect against ring overflow. |
| 88 | */ | 113 | */ |
| 89 | if (hfi1_ipoib_txreqs(txq->sent_txreqs, | 114 | if (hfi1_ipoib_used(txq) < hfi1_ipoib_ring_lwat(txq) && |
| 90 | atomic64_read(&txq->complete_txreqs)) | 115 | atomic_xchg(&txq->ring_full, 0)) |
| 91 | < min_t(unsigned int, dev->tx_queue_len, | 116 | hfi1_ipoib_wake_txq(txq); |
| 92 | txq->tx_ring.max_items) >> 1) | ||
| 93 | netif_wake_subqueue(dev, txq->q_idx); | ||
| 94 | } | 117 | } |
| 95 | 118 | ||
| 96 | static void hfi1_ipoib_free_tx(struct ipoib_txreq *tx, int budget) | 119 | static void hfi1_ipoib_free_tx(struct ipoib_txreq *tx, int budget) |
| @@ -364,11 +387,12 @@ static struct ipoib_txreq *hfi1_ipoib_send_dma_common(struct net_device *dev, · 267 unmodified lines | |||
| 364 | if (unlikely(!tx)) | 387 | if (unlikely(!tx)) |
| 365 | return ERR_PTR(-ENOMEM); | 388 | return ERR_PTR(-ENOMEM); |
| 366 | 389 | ||
| 367 | /* so that we can test if the sdma decriptors are there */ | 390 | /* so that we can test if the sdma descriptors are there */ |
| 368 | tx->txreq.num_desc = 0; | 391 | tx->txreq.num_desc = 0; |
| 369 | tx->priv = priv; | 392 | tx->priv = priv; |
| 370 | tx->txq = txp->txq; | 393 | tx->txq = txp->txq; |
| 371 | tx->skb = skb; | 394 | tx->skb = skb; |
| 395 | INIT_LIST_HEAD(&tx->txreq.list); | ||
| 372 | 396 | ||
| 373 | hfi1_ipoib_build_ib_tx_headers(tx, txp); | 397 | hfi1_ipoib_build_ib_tx_headers(tx, txp); |
| 374 | 398 | ||
| @@ -469,6 +493,7 @@ static int hfi1_ipoib_send_dma_single(struct net_device *dev, · 94 unmodified lines | |||
| 469 | 493 | ||
| 470 | ret = hfi1_ipoib_submit_tx(txq, tx); | 494 | ret = hfi1_ipoib_submit_tx(txq, tx); |
| 471 | if (likely(!ret)) { | 495 | if (likely(!ret)) { |
| 496 | tx_ok: | ||
| 472 | trace_sdma_output_ibhdr(tx->priv->dd, | 497 | trace_sdma_output_ibhdr(tx->priv->dd, |
| 473 | &tx->sdma_hdr.hdr, | 498 | &tx->sdma_hdr.hdr, |
| 474 | ib_is_sc5(txp->flow.sc5)); | 499 | ib_is_sc5(txp->flow.sc5)); |
| @@ -478,20 +503,8 @@ static int hfi1_ipoib_send_dma_single(struct net_device *dev, · 3 unmodified lines | |||
| 478 | 503 | ||
| 479 | txq->pkts_sent = false; | 504 | txq->pkts_sent = false; |
| 480 | 505 | ||
| 481 | if (ret == -EBUSY) { | 506 | if (ret == -EBUSY || ret == -ECOMM) |
| 482 | list_add_tail(&tx->txreq.list, &txq->tx_list); | 507 | goto tx_ok; |
| 483 | |||
| 484 | trace_sdma_output_ibhdr(tx->priv->dd, | ||
| 485 | &tx->sdma_hdr.hdr, | ||
| 486 | ib_is_sc5(txp->flow.sc5)); | ||
| 487 | hfi1_ipoib_check_queue_depth(txq); | ||
| 488 | return NETDEV_TX_OK; | ||
| 489 | } | ||
| 490 | |||
| 491 | if (ret == -ECOMM) { | ||
| 492 | hfi1_ipoib_check_queue_depth(txq); | ||
| 493 | return NETDEV_TX_OK; | ||
| 494 | } | ||
| 495 | 508 | ||
| 496 | sdma_txclean(priv->dd, &tx->txreq); | 509 | sdma_txclean(priv->dd, &tx->txreq); |
| 497 | dev_kfree_skb_any(skb); | 510 | dev_kfree_skb_any(skb); |
| @@ -509,9 +522,17 @@ static int hfi1_ipoib_send_dma_list(struct net_device *dev, · 11 unmodified lines | |||
| 509 | struct ipoib_txreq *tx; | 522 | struct ipoib_txreq *tx; |
| 510 | 523 | ||
| 511 | /* Has the flow change ? */ | 524 | /* Has the flow change ? */ |
| 512 | if (txq->flow.as_int != txp->flow.as_int) | 525 | if (txq->flow.as_int != txp->flow.as_int) { |
| 513 | (void)hfi1_ipoib_flush_tx_list(dev, txq); | 526 | int ret; |
| 514 | 527 | ||
| 528 | ret = hfi1_ipoib_flush_tx_list(dev, txq); | ||
| 529 | if (unlikely(ret)) { | ||
| 530 | if (ret == -EBUSY) | ||
| 531 | ++dev->stats.tx_dropped; | ||
| 532 | dev_kfree_skb_any(skb); | ||
| 533 | return NETDEV_TX_OK; | ||
| 534 | } | ||
| 535 | } | ||
| 515 | tx = hfi1_ipoib_send_dma_common(dev, skb, txp); | 536 | tx = hfi1_ipoib_send_dma_common(dev, skb, txp); |
| 516 | if (IS_ERR(tx)) { | 537 | if (IS_ERR(tx)) { |
| 517 | int ret = PTR_ERR(tx); | 538 | int ret = PTR_ERR(tx); |
| @@ -610,10 +631,14 @@ static int hfi1_ipoib_sdma_sleep(struct sdma_engine *sde, · 92 unmodified lines | |||
| 610 | return -EAGAIN; | 631 | return -EAGAIN; |
| 611 | } | 632 | } |
| 612 | 633 | ||
| 613 | netif_stop_subqueue(txq->priv->netdev, txq->q_idx); | 634 | if (list_empty(&txreq->list)) |
| 614 | 635 | /* came from non-list submit */ | |
| 615 | if (list_empty(&txq->wait.list)) | 636 | list_add_tail(&txreq->list, &txq->tx_list); |
| 637 | if (list_empty(&txq->wait.list)) { | ||
| 638 | if (!atomic_xchg(&txq->no_desc, 1)) | ||
| 639 | hfi1_ipoib_stop_txq(txq); | ||
| 616 | iowait_queue(pkts_sent, wait->iow, &sde->dmawait); | 640 | iowait_queue(pkts_sent, wait->iow, &sde->dmawait); |
| 641 | } | ||
| 617 | 642 | ||
| 618 | write_sequnlock(&sde->waitlock); | 643 | write_sequnlock(&sde->waitlock); |
| 619 | return -EBUSY; | 644 | return -EBUSY; |
| @@ -648,9 +673,9 @@ static void hfi1_ipoib_flush_txq(struct work_struct *work) · 28 unmodified lines | |||
| 648 | struct net_device *dev = txq->priv->netdev; | 673 | struct net_device *dev = txq->priv->netdev; |
| 649 | 674 | ||
| 650 | if (likely(dev->reg_state == NETREG_REGISTERED) && | 675 | if (likely(dev->reg_state == NETREG_REGISTERED) && |
| 651 | likely(__netif_subqueue_stopped(dev, txq->q_idx)) && | ||
| 652 | likely(!hfi1_ipoib_flush_tx_list(dev, txq))) | 676 | likely(!hfi1_ipoib_flush_tx_list(dev, txq))) |
| 653 | netif_wake_subqueue(dev, txq->q_idx); | 677 | if (atomic_xchg(&txq->no_desc, 0)) |
| 678 | hfi1_ipoib_wake_txq(txq); | ||
| 654 | } | 679 | } |
| 655 | 680 | ||
| 656 | int hfi1_ipoib_txreq_init(struct hfi1_ipoib_dev_priv *priv) | 681 | int hfi1_ipoib_txreq_init(struct hfi1_ipoib_dev_priv *priv) |
| @@ -704,6 +729,9 @@ int hfi1_ipoib_txreq_init(struct hfi1_ipoib_dev_priv *priv) · 47 unmodified lines | |||
| 704 | txq->sde = NULL; | 729 | txq->sde = NULL; |
| 705 | INIT_LIST_HEAD(&txq->tx_list); | 730 | INIT_LIST_HEAD(&txq->tx_list); |
| 706 | atomic64_set(&txq->complete_txreqs, 0); | 731 | atomic64_set(&txq->complete_txreqs, 0); |
| 732 | atomic_set(&txq->stops, 0); | ||
| 733 | atomic_set(&txq->ring_full, 0); | ||
| 734 | atomic_set(&txq->no_desc, 0); | ||
| 707 | txq->q_idx = i; | 735 | txq->q_idx = i; |
| 708 | txq->flow.tx_queue = 0xff; | 736 | txq->flow.tx_queue = 0xff; |
| 709 | txq->flow.sc5 = 0xff; | 737 | txq->flow.sc5 = 0xff; |
| @@ -769,7 +797,7 @@ static void hfi1_ipoib_drain_tx_list(struct hfi1_ipoib_txq *txq) · 59 unmodified lines | |||
| 769 | atomic64_inc(complete_txreqs); | 797 | atomic64_inc(complete_txreqs); |
| 770 | } | 798 | } |
| 771 | 799 | ||
| 772 | if (hfi1_ipoib_txreqs(txq->sent_txreqs, atomic64_read(complete_txreqs))) | 800 | if (hfi1_ipoib_used(txq)) |
| 773 | dd_dev_warn(txq->priv->dd, | 801 | dd_dev_warn(txq->priv->dd, |
| 774 | "txq %d not empty found %llu requests\n", | 802 | "txq %d not empty found %llu requests\n", |
| 775 | txq->q_idx, | 803 | txq->q_idx, |
| @@ -373,7 +373,7 @@ void hfi1_netdev_free(struct hfi1_devdata *dd) · 372 unmodified lines | |||
| 373 | { | 373 | { |
| 374 | if (dd->dummy_netdev) { | 374 | if (dd->dummy_netdev) { |
| 375 | dd_dev_info(dd, "hfi1 netdev freed\n"); | 375 | dd_dev_info(dd, "hfi1 netdev freed\n"); |
| 376 | free_netdev(dd->dummy_netdev); | 376 | kfree(dd->dummy_netdev); |
| 377 | dd->dummy_netdev = NULL; | 377 | dd->dummy_netdev = NULL; |
| 378 | } | 378 | } |
| 379 | } | 379 | } |
| @@ -195,7 +195,7 @@ static inline int verbs_mtu_enum_to_int(struct ib_device *dev, enum ib_mtu mtu) · 194 unmodified lines | |||
| 195 | { | 195 | { |
| 196 | /* Constraining 10KB packets to 8KB packets */ | 196 | /* Constraining 10KB packets to 8KB packets */ |
| 197 | if (mtu == (enum ib_mtu)OPA_MTU_10240) | 197 | if (mtu == (enum ib_mtu)OPA_MTU_10240) |
| 198 | mtu = OPA_MTU_8192; | 198 | mtu = (enum ib_mtu)OPA_MTU_8192; |
| 199 | return opa_mtu_enum_to_int((enum opa_mtu)mtu); | 199 | return opa_mtu_enum_to_int((enum opa_mtu)mtu); |
| 200 | } | 200 | } |
| 201 | 201 | ||
| @@ -367,7 +367,10 @@ bool _hfi1_schedule_send(struct rvt_qp *qp) · 165 unmodified lines | |||
| 367 | struct hfi1_ibport *ibp = | 367 | struct hfi1_ibport *ibp = |
| 368 | to_iport(qp->ibqp.device, qp->port_num); | 368 | to_iport(qp->ibqp.device, qp->port_num); |
| 369 | struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); | 369 | struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); |
| 370 | struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device); | 370 | struct hfi1_devdata *dd = ppd->dd; |
| 371 | |||
| 372 | if (dd->flags & HFI1_SHUTDOWN) | ||
| 373 | return true; | ||
| 371 | 374 | ||
| 372 | return iowait_schedule(&priv->s_iowait, ppd->hfi1_wq, | 375 | return iowait_schedule(&priv->s_iowait, ppd->hfi1_wq, |
| 373 | priv->s_sde ? | 376 | priv->s_sde ? |
| @@ -5406,7 +5406,10 @@ static bool _hfi1_schedule_tid_send(struct rvt_qp *qp) · 5405 unmodified lines | |||
| 5406 | struct hfi1_ibport *ibp = | 5406 | struct hfi1_ibport *ibp = |
| 5407 | to_iport(qp->ibqp.device, qp->port_num); | 5407 | to_iport(qp->ibqp.device, qp->port_num); |
| 5408 | struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); | 5408 | struct hfi1_pportdata *ppd = ppd_from_ibp(ibp); |
| 5409 | struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device); | 5409 | struct hfi1_devdata *dd = ppd->dd; |
| 5410 | |||
| 5411 | if ((dd->flags & HFI1_SHUTDOWN)) | ||
| 5412 | return true; | ||
| 5410 | 5413 | ||
| 5411 | return iowait_tid_schedule(&priv->s_iowait, ppd->hfi1_wq, | 5414 | return iowait_tid_schedule(&priv->s_iowait, ppd->hfi1_wq, |
| 5412 | priv->s_sde ? | 5415 | priv->s_sde ? |
| @@ -91,7 +91,7 @@ static inline struct verbs_txreq *get_txreq(struct hfi1_ibdev *dev, · 90 unmodified lines | |||
| 91 | tx->mr = NULL; | 91 | tx->mr = NULL; |
| 92 | tx->sde = priv->s_sde; | 92 | tx->sde = priv->s_sde; |
| 93 | tx->psc = priv->s_sendcontext; | 93 | tx->psc = priv->s_sendcontext; |
| 94 | /* so that we can test if the sdma decriptors are there */ | 94 | /* so that we can test if the sdma descriptors are there */ |
| 95 | tx->txreq.num_desc = 0; | 95 | tx->txreq.num_desc = 0; |
| 96 | /* Set the header type */ | 96 | /* Set the header type */ |
| 97 | tx->phdr.hdr.hdr_type = priv->hdr_type; | 97 | tx->phdr.hdr.hdr_type = priv->hdr_type; |
| @@ -898,13 +898,14 @@ struct hns_roce_hw { · 897 unmodified lines | |||
| 898 | int (*set_mac)(struct hns_roce_dev *hr_dev, u8 phy_port, u8 *addr); | 898 | int (*set_mac)(struct hns_roce_dev *hr_dev, u8 phy_port, u8 *addr); |
| 899 | void (*set_mtu)(struct hns_roce_dev *hr_dev, u8 phy_port, | 899 | void (*set_mtu)(struct hns_roce_dev *hr_dev, u8 phy_port, |
| 900 | enum ib_mtu mtu); | 900 | enum ib_mtu mtu); |
| 901 | int (*write_mtpt)(void *mb_buf, struct hns_roce_mr *mr, | 901 | int (*write_mtpt)(struct hns_roce_dev *hr_dev, void *mb_buf, |
| 902 | unsigned long mtpt_idx); | 902 | struct hns_roce_mr *mr, unsigned long mtpt_idx); |
| 903 | int (*rereg_write_mtpt)(struct hns_roce_dev *hr_dev, | 903 | int (*rereg_write_mtpt)(struct hns_roce_dev *hr_dev, |
| 904 | struct hns_roce_mr *mr, int flags, u32 pdn, | 904 | struct hns_roce_mr *mr, int flags, u32 pdn, |
| 905 | int mr_access_flags, u64 iova, u64 size, | 905 | int mr_access_flags, u64 iova, u64 size, |
| 906 | void *mb_buf); | 906 | void *mb_buf); |
| 907 | int (*frmr_write_mtpt)(void *mb_buf, struct hns_roce_mr *mr); | 907 | int (*frmr_write_mtpt)(struct hns_roce_dev *hr_dev, void *mb_buf, |
| 908 | struct hns_roce_mr *mr); | ||
| 908 | int (*mw_write_mtpt)(void *mb_buf, struct hns_roce_mw *mw); | 909 | int (*mw_write_mtpt)(void *mb_buf, struct hns_roce_mw *mw); |
| 909 | void (*write_cqc)(struct hns_roce_dev *hr_dev, | 910 | void (*write_cqc)(struct hns_roce_dev *hr_dev, |
| 910 | struct hns_roce_cq *hr_cq, void *mb_buf, u64 *mtts, | 911 | struct hns_roce_cq *hr_cq, void *mb_buf, u64 *mtts, |
| @@ -1756,10 +1756,10 @@ static void hns_roce_v1_set_mtu(struct hns_roce_dev *hr_dev, u8 phy_port, · 1755 unmodified lines | |||
| 1756 | val); | 1756 | val); |
| 1757 | } | 1757 | } |
| 1758 | 1758 | ||
| 1759 | static int hns_roce_v1_write_mtpt(void *mb_buf, struct hns_roce_mr *mr, | 1759 | static int hns_roce_v1_write_mtpt(struct hns_roce_dev *hr_dev, void *mb_buf, |
| 1760 | struct hns_roce_mr *mr, | ||
| 1760 | unsigned long mtpt_idx) | 1761 | unsigned long mtpt_idx) |
| 1761 | { | 1762 | { |
| 1762 | struct hns_roce_dev *hr_dev = to_hr_dev(mr->ibmr.device); | ||
| 1763 | u64 pages[HNS_ROCE_MAX_INNER_MTPT_NUM] = { 0 }; | 1763 | u64 pages[HNS_ROCE_MAX_INNER_MTPT_NUM] = { 0 }; |
| 1764 | struct ib_device *ibdev = &hr_dev->ib_dev; | 1764 | struct ib_device *ibdev = &hr_dev->ib_dev; |
| 1765 | struct hns_roce_v1_mpt_entry *mpt_entry; | 1765 | struct hns_roce_v1_mpt_entry *mpt_entry; |
| @@ -910,7 +910,7 @@ static int hns_roce_v2_rst_process_cmd(struct hns_roce_dev *hr_dev) · 909 unmodified lines | |||
| 910 | instance_stage = handle->rinfo.instance_state; | 910 | instance_stage = handle->rinfo.instance_state; |
| 911 | reset_stage = handle->rinfo.reset_state; | 911 | reset_stage = handle->rinfo.reset_state; |
| 912 | reset_cnt = ops->ae_dev_reset_cnt(handle); | 912 | reset_cnt = ops->ae_dev_reset_cnt(handle); |
| 913 | hw_resetting = ops->get_hw_reset_stat(handle); | 913 | hw_resetting = ops->get_cmdq_stat(handle); |
| 914 | sw_resetting = ops->ae_dev_resetting(handle); | 914 | sw_resetting = ops->ae_dev_resetting(handle); |
| 915 | 915 | ||
| 916 | if (reset_cnt != hr_dev->reset_cnt) | 916 | if (reset_cnt != hr_dev->reset_cnt) |
| @@ -2529,10 +2529,10 @@ static int hns_roce_v2_set_mac(struct hns_roce_dev *hr_dev, u8 phy_port, · 1612 unmodified lines | |||
| 2529 | return hns_roce_cmq_send(hr_dev, &desc, 1); | 2529 | return hns_roce_cmq_send(hr_dev, &desc, 1); |
| 2530 | } | 2530 | } |
| 2531 | 2531 | ||
| 2532 | static int set_mtpt_pbl(struct hns_roce_v2_mpt_entry *mpt_entry, | 2532 | static int set_mtpt_pbl(struct hns_roce_dev *hr_dev, |
| 2533 | struct hns_roce_v2_mpt_entry *mpt_entry, | ||
| 2533 | struct hns_roce_mr *mr) | 2534 | struct hns_roce_mr *mr) |
| 2534 | { | 2535 | { |
| 2535 | struct hns_roce_dev *hr_dev = to_hr_dev(mr->ibmr.device); | ||
| 2536 | u64 pages[HNS_ROCE_V2_MAX_INNER_MTPT_NUM] = { 0 }; | 2536 | u64 pages[HNS_ROCE_V2_MAX_INNER_MTPT_NUM] = { 0 }; |
| 2537 | struct ib_device *ibdev = &hr_dev->ib_dev; | 2537 | struct ib_device *ibdev = &hr_dev->ib_dev; |
| 2538 | dma_addr_t pbl_ba; | 2538 | dma_addr_t pbl_ba; |
| @@ -2571,7 +2571,8 @@ static int set_mtpt_pbl(struct hns_roce_v2_mpt_entry *mpt_entry, · 32 unmodified lines | |||
| 2571 | return 0; | 2571 | return 0; |
| 2572 | } | 2572 | } |
| 2573 | 2573 | ||
| 2574 | static int hns_roce_v2_write_mtpt(void *mb_buf, struct hns_roce_mr *mr, | 2574 | static int hns_roce_v2_write_mtpt(struct hns_roce_dev *hr_dev, |
| 2575 | void *mb_buf, struct hns_roce_mr *mr, | ||
| 2575 | unsigned long mtpt_idx) | 2576 | unsigned long mtpt_idx) |
| 2576 | { | 2577 | { |
| 2577 | struct hns_roce_v2_mpt_entry *mpt_entry; | 2578 | struct hns_roce_v2_mpt_entry *mpt_entry; |
| @@ -2620,7 +2621,7 @@ static int hns_roce_v2_write_mtpt(void *mb_buf, struct hns_roce_mr *mr, · 42 unmodified lines | |||
| 2620 | if (mr->type == MR_TYPE_DMA) | 2621 | if (mr->type == MR_TYPE_DMA) |
| 2621 | return 0; | 2622 | return 0; |
| 2622 | 2623 | ||
| 2623 | ret = set_mtpt_pbl(mpt_entry, mr); | 2624 | ret = set_mtpt_pbl(hr_dev, mpt_entry, mr); |
| 2624 | 2625 | ||
| 2625 | return ret; | 2626 | return ret; |
| 2626 | } | 2627 | } |
| @@ -2666,15 +2667,15 @@ static int hns_roce_v2_rereg_write_mtpt(struct hns_roce_dev *hr_dev, · 39 unmodified lines | |||
| 2666 | mr->iova = iova; | 2667 | mr->iova = iova; |
| 2667 | mr->size = size; | 2668 | mr->size = size; |
| 2668 | 2669 | ||
| 2669 | ret = set_mtpt_pbl(mpt_entry, mr); | 2670 | ret = set_mtpt_pbl(hr_dev, mpt_entry, mr); |
| 2670 | } | 2671 | } |
| 2671 | 2672 | ||
| 2672 | return ret; | 2673 | return ret; |
| 2673 | } | 2674 | } |
| 2674 | 2675 | ||
| 2675 | static int hns_roce_v2_frmr_write_mtpt(void *mb_buf, struct hns_roce_mr *mr) | 2676 | static int hns_roce_v2_frmr_write_mtpt(struct hns_roce_dev *hr_dev, |
| 2677 | void *mb_buf, struct hns_roce_mr *mr) | ||
| 2676 | { | 2678 | { |
| 2677 | struct hns_roce_dev *hr_dev = to_hr_dev(mr->ibmr.device); | ||
| 2678 | struct ib_device *ibdev = &hr_dev->ib_dev; | 2679 | struct ib_device *ibdev = &hr_dev->ib_dev; |
| 2679 | struct hns_roce_v2_mpt_entry *mpt_entry; | 2680 | struct hns_roce_v2_mpt_entry *mpt_entry; |
| 2680 | dma_addr_t pbl_ba = 0; | 2681 | dma_addr_t pbl_ba = 0; |
| @@ -180,9 +180,10 @@ static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev, · 179 unmodified lines | |||
| 180 | } | 180 | } |
| 181 | 181 | ||
| 182 | if (mr->type != MR_TYPE_FRMR) | 182 | if (mr->type != MR_TYPE_FRMR) |
| 183 | ret = hr_dev->hw->write_mtpt(mailbox->buf, mr, mtpt_idx); | 183 | ret = hr_dev->hw->write_mtpt(hr_dev, mailbox->buf, mr, |
| 184 | mtpt_idx); | ||
| 184 | else | 185 | else |
| 185 | ret = hr_dev->hw->frmr_write_mtpt(mailbox->buf, mr); | 186 | ret = hr_dev->hw->frmr_write_mtpt(hr_dev, mailbox->buf, mr); |
| 186 | if (ret) { | 187 | if (ret) { |
| 187 | dev_err(dev, "Write mtpt fail!\n"); | 188 | dev_err(dev, "Write mtpt fail!\n"); |
| 188 | goto err_page; | 189 | goto err_page; |
| @@ -511,7 +511,7 @@ static int mlx5_query_port_roce(struct ib_device *device, u8 port_num, · 510 unmodified lines | |||
| 511 | mdev_port_num); | 511 | mdev_port_num); |
| 512 | if (err) | 512 | if (err) |
| 513 | goto out; | 513 | goto out; |
| 514 | ext = MLX5_CAP_PCAM_FEATURE(dev->mdev, ptys_extended_ethernet); | 514 | ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability); |
| 515 | eth_prot_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper); | 515 | eth_prot_oper = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, eth_proto_oper); |
| 516 | 516 | ||
| 517 | props->active_width = IB_WIDTH_4X; | 517 | props->active_width = IB_WIDTH_4X; |
| @@ -1862,7 +1862,7 @@ static int create_xrc_tgt_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 1861 unmodified lines | |||
| 1862 | if (!in) | 1862 | if (!in) |
| 1863 | return -ENOMEM; | 1863 | return -ENOMEM; |
| 1864 | 1864 | ||
| 1865 | if (MLX5_CAP_GEN(mdev, ece_support)) | 1865 | if (MLX5_CAP_GEN(mdev, ece_support) && ucmd) |
| 1866 | MLX5_SET(create_qp_in, in, ece, ucmd->ece_options); | 1866 | MLX5_SET(create_qp_in, in, ece, ucmd->ece_options); |
| 1867 | qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); | 1867 | qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); |
| 1868 | 1868 | ||
| @@ -2341,18 +2341,18 @@ static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 472 unmodified lines | |||
| 2341 | unsigned long flags; | 2341 | unsigned long flags; |
| 2342 | int err; | 2342 | int err; |
| 2343 | 2343 | ||
| 2344 | if (qp->ibqp.rwq_ind_tbl) { | 2344 | if (qp->is_rss) { |
| 2345 | destroy_rss_raw_qp_tir(dev, qp); | 2345 | destroy_rss_raw_qp_tir(dev, qp); |
| 2346 | return; | 2346 | return; |
| 2347 | } | 2347 | } |
| 2348 | 2348 | ||
| 2349 | base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || | 2349 | base = (qp->type == IB_QPT_RAW_PACKET || |
| 2350 | qp->flags & IB_QP_CREATE_SOURCE_QPN) ? | 2350 | qp->flags & IB_QP_CREATE_SOURCE_QPN) ? |
| 2351 | &qp->raw_packet_qp.rq.base : | 2351 | &qp->raw_packet_qp.rq.base : |
| 2352 | &qp->trans_qp.base; | 2352 | &qp->trans_qp.base; |
| 2353 | 2353 | ||
| 2354 | if (qp->state != IB_QPS_RESET) { | 2354 | if (qp->state != IB_QPS_RESET) { |
| 2355 | if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && | 2355 | if (qp->type != IB_QPT_RAW_PACKET && |
| 2356 | !(qp->flags & IB_QP_CREATE_SOURCE_QPN)) { | 2356 | !(qp->flags & IB_QP_CREATE_SOURCE_QPN)) { |
| 2357 | err = mlx5_core_qp_modify(dev, MLX5_CMD_OP_2RST_QP, 0, | 2357 | err = mlx5_core_qp_modify(dev, MLX5_CMD_OP_2RST_QP, 0, |
| 2358 | NULL, &base->mqp, NULL); | 2358 | NULL, &base->mqp, NULL); |
| @@ -2368,8 +2368,8 @@ static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 9 unmodified lines | |||
| 2368 | base->mqp.qpn); | 2368 | base->mqp.qpn); |
| 2369 | } | 2369 | } |
| 2370 | 2370 | ||
| 2371 | get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, | 2371 | get_cqs(qp->type, qp->ibqp.send_cq, qp->ibqp.recv_cq, &send_cq, |
| 2372 | &send_cq, &recv_cq); | 2372 | &recv_cq); |
| 2373 | 2373 | ||
| 2374 | spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); | 2374 | spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); |
| 2375 | mlx5_ib_lock_cqs(send_cq, recv_cq); | 2375 | mlx5_ib_lock_cqs(send_cq, recv_cq); |
| @@ -2391,7 +2391,7 @@ static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 15 unmodified lines | |||
| 2391 | mlx5_ib_unlock_cqs(send_cq, recv_cq); | 2391 | mlx5_ib_unlock_cqs(send_cq, recv_cq); |
| 2392 | spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); | 2392 | spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); |
| 2393 | 2393 | ||
| 2394 | if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || | 2394 | if (qp->type == IB_QPT_RAW_PACKET || |
| 2395 | qp->flags & IB_QP_CREATE_SOURCE_QPN) { | 2395 | qp->flags & IB_QP_CREATE_SOURCE_QPN) { |
| 2396 | destroy_raw_packet_qp(dev, qp); | 2396 | destroy_raw_packet_qp(dev, qp); |
| 2397 | } else { | 2397 | } else { |
| @@ -2668,6 +2668,13 @@ static int process_create_flags(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 270 unmodified lines | |||
| 2668 | if (qp_type == IB_QPT_RAW_PACKET && attr->rwq_ind_tbl) | 2668 | if (qp_type == IB_QPT_RAW_PACKET && attr->rwq_ind_tbl) |
| 2669 | return (create_flags) ? -EINVAL : 0; | 2669 | return (create_flags) ? -EINVAL : 0; |
| 2670 | 2670 | ||
| 2671 | process_create_flag(dev, &create_flags, IB_QP_CREATE_NETIF_QP, | ||
| 2672 | mlx5_get_flow_namespace(dev->mdev, | ||
| 2673 | MLX5_FLOW_NAMESPACE_BYPASS), | ||
| 2674 | qp); | ||
| 2675 | process_create_flag(dev, &create_flags, | ||
| 2676 | IB_QP_CREATE_INTEGRITY_EN, | ||
| 2677 | MLX5_CAP_GEN(mdev, sho), qp); | ||
| 2671 | process_create_flag(dev, &create_flags, | 2678 | process_create_flag(dev, &create_flags, |
| 2672 | IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK, | 2679 | IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK, |
| 2673 | MLX5_CAP_GEN(mdev, block_lb_mc), qp); | 2680 | MLX5_CAP_GEN(mdev, block_lb_mc), qp); |
| @@ -2873,7 +2880,6 @@ static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) · 199 unmodified lines | |||
| 2873 | static int check_ucmd_data(struct mlx5_ib_dev *dev, | 2880 | static int check_ucmd_data(struct mlx5_ib_dev *dev, |
| 2874 | struct mlx5_create_qp_params *params) | 2881 | struct mlx5_create_qp_params *params) |
| 2875 | { | 2882 | { |
| 2876 | struct ib_qp_init_attr *attr = params->attr; | ||
| 2877 | struct ib_udata *udata = params->udata; | 2883 | struct ib_udata *udata = params->udata; |
| 2878 | size_t size, last; | 2884 | size_t size, last; |
| 2879 | int ret; | 2885 | int ret; |
| @@ -2885,14 +2891,7 @@ static int check_ucmd_data(struct mlx5_ib_dev *dev, · 5 unmodified lines | |||
| 2885 | */ | 2891 | */ |
| 2886 | last = sizeof(struct mlx5_ib_create_qp_rss); | 2892 | last = sizeof(struct mlx5_ib_create_qp_rss); |
| 2887 | else | 2893 | else |
| 2888 | /* IB_QPT_RAW_PACKET doesn't have ECE data */ | 2894 | last = offsetof(struct mlx5_ib_create_qp, reserved); |
| 2889 | switch (attr->qp_type) { | ||
| 2890 | case IB_QPT_RAW_PACKET: | ||
| 2891 | last = offsetof(struct mlx5_ib_create_qp, ece_options); | ||
| 2892 | break; | ||
| 2893 | default: | ||
| 2894 | last = offsetof(struct mlx5_ib_create_qp, reserved); | ||
| 2895 | } | ||
| 2896 | 2895 | ||
| 2897 | if (udata->inlen <= last) | 2896 | if (udata->inlen <= last) |
| 2898 | return 0; | 2897 | return 0; |
| @@ -2907,7 +2906,7 @@ static int check_ucmd_data(struct mlx5_ib_dev *dev, · 8 unmodified lines | |||
| 2907 | if (!ret) | 2906 | if (!ret) |
| 2908 | mlx5_ib_dbg( | 2907 | mlx5_ib_dbg( |
| 2909 | dev, | 2908 | dev, |
| 2910 | "udata is not cleared, inlen = %lu, ucmd = %lu, last = %lu, size = %lu\n", | 2909 | "udata is not cleared, inlen = %zu, ucmd = %zu, last = %zu, size = %zu\n", |
| 2911 | udata->inlen, params->ucmd_size, last, size); | 2910 | udata->inlen, params->ucmd_size, last, size); |
| 2912 | return ret ? 0 : -EINVAL; | 2911 | return ret ? 0 : -EINVAL; |
| 2913 | } | 2912 | } |
| @@ -3002,10 +3001,19 @@ struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attr, · 88 unmodified lines | |||
| 3002 | return &qp->ibqp; | 3001 | return &qp->ibqp; |
| 3003 | 3002 | ||
| 3004 | destroy_qp: | 3003 | destroy_qp: |
| 3005 | if (qp->type == MLX5_IB_QPT_DCT) | 3004 | if (qp->type == MLX5_IB_QPT_DCT) { |
| 3006 | mlx5_ib_destroy_dct(qp); | 3005 | mlx5_ib_destroy_dct(qp); |
| 3007 | else | 3006 | } else { |
| 3007 | /* | ||
| 3008 | * These lines below are temp solution till QP allocation | ||
| 3009 | * will be moved to be under IB/core responsiblity. | ||
| 3010 | */ | ||
| 3011 | qp->ibqp.send_cq = attr->send_cq; | ||
| 3012 | qp->ibqp.recv_cq = attr->recv_cq; | ||
| 3013 | qp->ibqp.pd = pd; | ||
| 3008 | destroy_qp_common(dev, qp, udata); | 3014 | destroy_qp_common(dev, qp, udata); |
| 3015 | } | ||
| 3016 | |||
| 3009 | qp = NULL; | 3017 | qp = NULL; |
| 3010 | free_qp: | 3018 | free_qp: |
| 3011 | kfree(qp); | 3019 | kfree(qp); |
| @@ -4162,8 +4170,6 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, · 1150 unmodified lines | |||
| 4162 | 4170 | ||
| 4163 | if (udata->outlen < min_resp_len) | 4171 | if (udata->outlen < min_resp_len) |
| 4164 | return -EINVAL; | 4172 | return -EINVAL; |
| 4165 | resp.response_length = min_resp_len; | ||
| 4166 | |||
| 4167 | /* | 4173 | /* |
| 4168 | * If we don't have enough space for the ECE options, | 4174 | * If we don't have enough space for the ECE options, |
| 4169 | * simply indicate it with resp.response_length. | 4175 | * simply indicate it with resp.response_length. |
| @@ -4384,8 +4390,7 @@ static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, · 214 unmodified lines | |||
| 4384 | MLX5_GET(ads, path, src_addr_index), | 4390 | MLX5_GET(ads, path, src_addr_index), |
| 4385 | MLX5_GET(ads, path, hop_limit), | 4391 | MLX5_GET(ads, path, hop_limit), |
| 4386 | MLX5_GET(ads, path, tclass)); | 4392 | MLX5_GET(ads, path, tclass)); |
| 4387 | memcpy(ah_attr, MLX5_ADDR_OF(ads, path, rgid_rip), | 4393 | rdma_ah_set_dgid_raw(ah_attr, MLX5_ADDR_OF(ads, path, rgid_rip)); |
| 4388 | MLX5_FLD_SZ_BYTES(ads, rgid_rip)); | ||
| 4389 | } | 4394 | } |
| 4390 | } | 4395 | } |
| 4391 | 4396 | ||
| @@ -346,6 +346,9 @@ static int get_ece_from_mbox(void *out, u16 opcode) · 345 unmodified lines | |||
| 346 | int ece = 0; | 346 | int ece = 0; |
| 347 | 347 | ||
| 348 | switch (opcode) { | 348 | switch (opcode) { |
| 349 | case MLX5_CMD_OP_INIT2INIT_QP: | ||
| 350 | ece = MLX5_GET(init2init_qp_out, out, ece); | ||
| 351 | break; | ||
| 349 | case MLX5_CMD_OP_INIT2RTR_QP: | 352 | case MLX5_CMD_OP_INIT2RTR_QP: |
| 350 | ece = MLX5_GET(init2rtr_qp_out, out, ece); | 353 | ece = MLX5_GET(init2rtr_qp_out, out, ece); |
| 351 | break; | 354 | break; |
| @@ -355,6 +358,9 @@ static int get_ece_from_mbox(void *out, u16 opcode) · 3 unmodified lines | |||
| 355 | case MLX5_CMD_OP_RTS2RTS_QP: | 358 | case MLX5_CMD_OP_RTS2RTS_QP: |
| 356 | ece = MLX5_GET(rts2rts_qp_out, out, ece); | 359 | ece = MLX5_GET(rts2rts_qp_out, out, ece); |
| 357 | break; | 360 | break; |
| 361 | case MLX5_CMD_OP_RST2INIT_QP: | ||
| 362 | ece = MLX5_GET(rst2init_qp_out, out, ece); | ||
| 363 | break; | ||
| 358 | default: | 364 | default: |
| 359 | break; | 365 | break; |
| 360 | } | 366 | } |
| @@ -406,6 +412,7 @@ static int modify_qp_mbox_alloc(struct mlx5_core_dev *dev, u16 opcode, int qpn, · 45 unmodified lines | |||
| 406 | return -ENOMEM; | 412 | return -ENOMEM; |
| 407 | MOD_QP_IN_SET_QPC(rst2init_qp, mbox->in, opcode, qpn, | 413 | MOD_QP_IN_SET_QPC(rst2init_qp, mbox->in, opcode, qpn, |
| 408 | opt_param_mask, qpc, uid); | 414 | opt_param_mask, qpc, uid); |
| 415 | MLX5_SET(rst2init_qp_in, mbox->in, ece, ece); | ||
| 409 | break; | 416 | break; |
| 410 | case MLX5_CMD_OP_INIT2RTR_QP: | 417 | case MLX5_CMD_OP_INIT2RTR_QP: |
| 411 | if (MBOX_ALLOC(mbox, init2rtr_qp)) | 418 | if (MBOX_ALLOC(mbox, init2rtr_qp)) |
| @@ -439,6 +446,7 @@ static int modify_qp_mbox_alloc(struct mlx5_core_dev *dev, u16 opcode, int qpn, · 27 unmodified lines | |||
| 439 | return -ENOMEM; | 446 | return -ENOMEM; |
| 440 | MOD_QP_IN_SET_QPC(init2init_qp, mbox->in, opcode, qpn, | 447 | MOD_QP_IN_SET_QPC(init2init_qp, mbox->in, opcode, qpn, |
| 441 | opt_param_mask, qpc, uid); | 448 | opt_param_mask, qpc, uid); |
| 449 | MLX5_SET(init2init_qp_in, mbox->in, ece, ece); | ||
| 442 | break; | 450 | break; |
| 443 | default: | 451 | default: |
| 444 | return -EINVAL; | 452 | return -EINVAL; |
| @@ -150,8 +150,17 @@ qedr_iw_issue_event(void *context, · 149 unmodified lines | |||
| 150 | if (params->cm_info) { | 150 | if (params->cm_info) { |
| 151 | event.ird = params->cm_info->ird; | 151 | event.ird = params->cm_info->ird; |
| 152 | event.ord = params->cm_info->ord; | 152 | event.ord = params->cm_info->ord; |
| 153 | event.private_data_len = params->cm_info->private_data_len; | 153 | /* Only connect_request and reply have valid private data |
| 154 | event.private_data = (void *)params->cm_info->private_data; | 154 | * the rest of the events this may be left overs from |
| 155 | * connection establishment. CONNECT_REQUEST is issued via | ||
| 156 | * qedr_iw_mpa_request | ||
| 157 | */ | ||
| 158 | if (event_type == IW_CM_EVENT_CONNECT_REPLY) { | ||
| 159 | event.private_data_len = | ||
| 160 | params->cm_info->private_data_len; | ||
| 161 | event.private_data = | ||
| 162 | (void *)params->cm_info->private_data; | ||
| 163 | } | ||
| 155 | } | 164 | } |
| 156 | 165 | ||
| 157 | if (ep->cm_id) | 166 | if (ep->cm_id) |
| @@ -1204,7 +1204,7 @@ struct ib_qp *rvt_create_qp(struct ib_pd *ibpd, · 1203 unmodified lines | |||
| 1204 | err = alloc_ud_wq_attr(qp, rdi->dparms.node); | 1204 | err = alloc_ud_wq_attr(qp, rdi->dparms.node); |
| 1205 | if (err) { | 1205 | if (err) { |
| 1206 | ret = (ERR_PTR(err)); | 1206 | ret = (ERR_PTR(err)); |
| 1207 | goto bail_driver_priv; | 1207 | goto bail_rq_rvt; |
| 1208 | } | 1208 | } |
| 1209 | 1209 | ||
| 1210 | if (init_attr->create_flags & IB_QP_CREATE_NETDEV_USE) | 1210 | if (init_attr->create_flags & IB_QP_CREATE_NETDEV_USE) |
| @@ -1314,9 +1314,11 @@ bail_qpn: · 103 unmodified lines | |||
| 1314 | rvt_free_qpn(&rdi->qp_dev->qpn_table, qp->ibqp.qp_num); | 1314 | rvt_free_qpn(&rdi->qp_dev->qpn_table, qp->ibqp.qp_num); |
| 1315 | 1315 | ||
| 1316 | bail_rq_wq: | 1316 | bail_rq_wq: |
| 1317 | rvt_free_rq(&qp->r_rq); | ||
| 1318 | free_ud_wq_attr(qp); | 1317 | free_ud_wq_attr(qp); |
| 1319 | 1318 | ||
| 1319 | bail_rq_rvt: | ||
| 1320 | rvt_free_rq(&qp->r_rq); | ||
| 1321 | |||
| 1320 | bail_driver_priv: | 1322 | bail_driver_priv: |
| 1321 | rdi->driver_f.qp_priv_free(rdi, qp); | 1323 | rdi->driver_f.qp_priv_free(rdi, qp); |
| 1322 | 1324 | ||
| @@ -67,12 +67,13 @@ static int siw_device_register(struct siw_device *sdev, const char *name) · 66 unmodified lines | |||
| 67 | static int dev_id = 1; | 67 | static int dev_id = 1; |
| 68 | int rv; | 68 | int rv; |
| 69 | 69 | ||
| 70 | sdev->vendor_part_id = dev_id++; | ||
| 71 | |||
| 70 | rv = ib_register_device(base_dev, name); | 72 | rv = ib_register_device(base_dev, name); |
| 71 | if (rv) { | 73 | if (rv) { |
| 72 | pr_warn("siw: device registration error %d\n", rv); | 74 | pr_warn("siw: device registration error %d\n", rv); |
| 73 | return rv; | 75 | return rv; |
| 74 | } | 76 | } |
| 75 | sdev->vendor_part_id = dev_id++; | ||
| 76 | 77 | ||
| 77 | siw_dbg(base_dev, "HWaddr=%pM\n", sdev->netdev->dev_addr); | 78 | siw_dbg(base_dev, "HWaddr=%pM\n", sdev->netdev->dev_addr); |
| 78 | 79 | ||
| @@ -139,7 +139,8 @@ static int siw_rx_pbl(struct siw_rx_stream *srx, int *pbl_idx, · 138 unmodified lines | |||
| 139 | break; | 139 | break; |
| 140 | 140 | ||
| 141 | bytes = min(bytes, len); | 141 | bytes = min(bytes, len); |
| 142 | if (siw_rx_kva(srx, (void *)buf_addr, bytes) == bytes) { | 142 | if (siw_rx_kva(srx, (void *)(uintptr_t)buf_addr, bytes) == |
| 143 | bytes) { | ||
| 143 | copied += bytes; | 144 | copied += bytes; |
| 144 | offset += bytes; | 145 | offset += bytes; |
| 145 | len -= bytes; | 146 | len -= bytes; |
| @@ -951,6 +951,8 @@ static void elan_report_absolute(struct elan_tp_data *data, u8 *packet) · 950 unmodified lines | |||
| 951 | u8 hover_info = packet[ETP_HOVER_INFO_OFFSET]; | 951 | u8 hover_info = packet[ETP_HOVER_INFO_OFFSET]; |
| 952 | bool contact_valid, hover_event; | 952 | bool contact_valid, hover_event; |
| 953 | 953 | ||
| 954 | pm_wakeup_event(&data->client->dev, 0); | ||
| 955 | |||
| 954 | hover_event = hover_info & 0x40; | 956 | hover_event = hover_info & 0x40; |
| 955 | for (i = 0; i < ETP_MAX_FINGERS; i++) { | 957 | for (i = 0; i < ETP_MAX_FINGERS; i++) { |
| 956 | contact_valid = tp_info & (1U << (3 + i)); | 958 | contact_valid = tp_info & (1U << (3 + i)); |
| @@ -974,6 +976,8 @@ static void elan_report_trackpoint(struct elan_tp_data *data, u8 *report) · 17 unmodified lines | |||
| 974 | u8 *packet = &report[ETP_REPORT_ID_OFFSET + 1]; | 976 | u8 *packet = &report[ETP_REPORT_ID_OFFSET + 1]; |
| 975 | int x, y; | 977 | int x, y; |
| 976 | 978 | ||
| 979 | pm_wakeup_event(&data->client->dev, 0); | ||
| 980 | |||
| 977 | if (!data->tp_input) { | 981 | if (!data->tp_input) { |
| 978 | dev_warn_once(&data->client->dev, | 982 | dev_warn_once(&data->client->dev, |
| 979 | "received a trackpoint report while no trackpoint device has been created. Please report upstream.\n"); | 983 | "received a trackpoint report while no trackpoint device has been created. Please report upstream.\n"); |
| @@ -998,7 +1002,6 @@ static void elan_report_trackpoint(struct elan_tp_data *data, u8 *report) · 18 unmodified lines | |||
| 998 | static irqreturn_t elan_isr(int irq, void *dev_id) | 1002 | static irqreturn_t elan_isr(int irq, void *dev_id) |
| 999 | { | 1003 | { |
| 1000 | struct elan_tp_data *data = dev_id; | 1004 | struct elan_tp_data *data = dev_id; |
| 1001 | struct device *dev = &data->client->dev; | ||
| 1002 | int error; | 1005 | int error; |
| 1003 | u8 report[ETP_MAX_REPORT_LEN]; | 1006 | u8 report[ETP_MAX_REPORT_LEN]; |
| 1004 | 1007 | ||
| @@ -1016,8 +1019,6 @@ static irqreturn_t elan_isr(int irq, void *dev_id) · 11 unmodified lines | |||
| 1016 | if (error) | 1019 | if (error) |
| 1017 | goto out; | 1020 | goto out; |
| 1018 | 1021 | ||
| 1019 | pm_wakeup_event(dev, 0); | ||
| 1020 | |||
| 1021 | switch (report[ETP_REPORT_ID_OFFSET]) { | 1022 | switch (report[ETP_REPORT_ID_OFFSET]) { |
| 1022 | case ETP_REPORT_ID: | 1023 | case ETP_REPORT_ID: |
| 1023 | elan_report_absolute(data, report); | 1024 | elan_report_absolute(data, report); |
| @@ -1026,7 +1027,7 @@ static irqreturn_t elan_isr(int irq, void *dev_id) · 2 unmodified lines | |||
| 1026 | elan_report_trackpoint(data, report); | 1027 | elan_report_trackpoint(data, report); |
| 1027 | break; | 1028 | break; |
| 1028 | default: | 1029 | default: |
| 1029 | dev_err(dev, "invalid report id data (%x)\n", | 1030 | dev_err(&data->client->dev, "invalid report id data (%x)\n", |
| 1030 | report[ETP_REPORT_ID_OFFSET]); | 1031 | report[ETP_REPORT_ID_OFFSET]); |
| 1031 | } | 1032 | } |
| 1032 | 1033 | ||
| @@ -179,6 +179,7 @@ static const char * const smbus_pnp_ids[] = { · 178 unmodified lines | |||
| 179 | "LEN0093", /* T480 */ | 179 | "LEN0093", /* T480 */ |
| 180 | "LEN0096", /* X280 */ | 180 | "LEN0096", /* X280 */ |
| 181 | "LEN0097", /* X280 -> ALPS trackpoint */ | 181 | "LEN0097", /* X280 -> ALPS trackpoint */ |
| 182 | "LEN0099", /* X1 Extreme 1st */ | ||
| 182 | "LEN009b", /* T580 */ | 183 | "LEN009b", /* T580 */ |
| 183 | "LEN200f", /* T450s */ | 184 | "LEN200f", /* T450s */ |
| 184 | "LEN2044", /* L470 */ | 185 | "LEN2044", /* L470 */ |
| @@ -425,6 +425,13 @@ static const struct dmi_system_id __initconst i8042_dmi_nomux_table[] = { · 424 unmodified lines | |||
| 425 | DMI_MATCH(DMI_PRODUCT_NAME, "076804U"), | 425 | DMI_MATCH(DMI_PRODUCT_NAME, "076804U"), |
| 426 | }, | 426 | }, |
| 427 | }, | 427 | }, |
| 428 | { | ||
| 429 | /* Lenovo XiaoXin Air 12 */ | ||
| 430 | .matches = { | ||
| 431 | DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | ||
| 432 | DMI_MATCH(DMI_PRODUCT_NAME, "80UN"), | ||
| 433 | }, | ||
| 434 | }, | ||
| 428 | { | 435 | { |
| 429 | .matches = { | 436 | .matches = { |
| 430 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | 437 | DMI_MATCH(DMI_SYS_VENDOR, "Acer"), |
| @@ -1325,7 +1325,6 @@ static int elants_i2c_probe(struct i2c_client *client, · 1324 unmodified lines | |||
| 1325 | 0, MT_TOOL_PALM, 0, 0); | 1325 | 0, MT_TOOL_PALM, 0, 0); |
| 1326 | input_abs_set_res(ts->input, ABS_MT_POSITION_X, ts->x_res); | 1326 | input_abs_set_res(ts->input, ABS_MT_POSITION_X, ts->x_res); |
| 1327 | input_abs_set_res(ts->input, ABS_MT_POSITION_Y, ts->y_res); | 1327 | input_abs_set_res(ts->input, ABS_MT_POSITION_Y, ts->y_res); |
| 1328 | input_abs_set_res(ts->input, ABS_MT_TOUCH_MAJOR, 1); | ||
| 1329 | 1328 | ||
| 1330 | touchscreen_parse_properties(ts->input, true, &ts->prop); | 1329 | touchscreen_parse_properties(ts->input, true, &ts->prop); |
| 1331 | 1330 | ||
| @@ -211,7 +211,7 @@ config INTEL_IOMMU_DEBUGFS · 210 unmodified lines | |||
| 211 | 211 | ||
| 212 | config INTEL_IOMMU_SVM | 212 | config INTEL_IOMMU_SVM |
| 213 | bool "Support for Shared Virtual Memory with Intel IOMMU" | 213 | bool "Support for Shared Virtual Memory with Intel IOMMU" |
| 214 | depends on INTEL_IOMMU && X86 | 214 | depends on INTEL_IOMMU && X86_64 |
| 215 | select PCI_PASID | 215 | select PCI_PASID |
| 216 | select PCI_PRI | 216 | select PCI_PRI |
| 217 | select MMU_NOTIFIER | 217 | select MMU_NOTIFIER |
| @@ -305,6 +305,7 @@ config ROCKCHIP_IOMMU · 87 unmodified lines | |||
| 305 | 305 | ||
| 306 | config SUN50I_IOMMU | 306 | config SUN50I_IOMMU |
| 307 | bool "Allwinner H6 IOMMU Support" | 307 | bool "Allwinner H6 IOMMU Support" |
| 308 | depends on HAS_DMA | ||
| 308 | depends on ARCH_SUNXI || COMPILE_TEST | 309 | depends on ARCH_SUNXI || COMPILE_TEST |
| 309 | select ARM_DMA_USE_IOMMU | 310 | select ARM_DMA_USE_IOMMU |
| 310 | select IOMMU_API | 311 | select IOMMU_API |
| @@ -102,7 +102,7 @@ extern int __init add_special_device(u8 type, u8 id, u16 *devid, · 101 unmodified lines | |||
| 102 | #ifdef CONFIG_DMI | 102 | #ifdef CONFIG_DMI |
| 103 | void amd_iommu_apply_ivrs_quirks(void); | 103 | void amd_iommu_apply_ivrs_quirks(void); |
| 104 | #else | 104 | #else |
| 105 | static void amd_iommu_apply_ivrs_quirks(void) { } | 105 | static inline void amd_iommu_apply_ivrs_quirks(void) { } |
| 106 | #endif | 106 | #endif |
| 107 | 107 | ||
| 108 | #endif | 108 | #endif |
| @@ -3985,9 +3985,10 @@ int amd_iommu_create_irq_domain(struct amd_iommu *iommu) · 3984 unmodified lines | |||
| 3985 | if (!fn) | 3985 | if (!fn) |
| 3986 | return -ENOMEM; | 3986 | return -ENOMEM; |
| 3987 | iommu->ir_domain = irq_domain_create_tree(fn, &amd_ir_domain_ops, iommu); | 3987 | iommu->ir_domain = irq_domain_create_tree(fn, &amd_ir_domain_ops, iommu); |
| 3988 | irq_domain_free_fwnode(fn); | 3988 | if (!iommu->ir_domain) { |
| 3989 | if (!iommu->ir_domain) | 3989 | irq_domain_free_fwnode(fn); |
| 3990 | return -ENOMEM; | 3990 | return -ENOMEM; |
| 3991 | } | ||
| 3991 | 3992 | ||
| 3992 | iommu->ir_domain->parent = arch_get_ir_parent_domain(); | 3993 | iommu->ir_domain->parent = arch_get_ir_parent_domain(); |
| 3993 | iommu->msi_domain = arch_create_remap_msi_irq_domain(iommu->ir_domain, | 3994 | iommu->msi_domain = arch_create_remap_msi_irq_domain(iommu->ir_domain, |
| @@ -12,7 +12,7 @@ struct qcom_smmu { · 11 unmodified lines | |||
| 12 | struct arm_smmu_device smmu; | 12 | struct arm_smmu_device smmu; |
| 13 | }; | 13 | }; |
| 14 | 14 | ||
| 15 | static const struct of_device_id qcom_smmu_client_of_match[] = { | 15 | static const struct of_device_id qcom_smmu_client_of_match[] __maybe_unused = { |
| 16 | { .compatible = "qcom,adreno" }, | 16 | { .compatible = "qcom,adreno" }, |
| 17 | { .compatible = "qcom,mdp4" }, | 17 | { .compatible = "qcom,mdp4" }, |
| 18 | { .compatible = "qcom,mdss" }, | 18 | { .compatible = "qcom,mdss" }, |
| @@ -155,7 +155,10 @@ static int __init hyperv_prepare_irq_remapping(void) · 154 unmodified lines | |||
| 155 | 0, IOAPIC_REMAPPING_ENTRY, fn, | 155 | 0, IOAPIC_REMAPPING_ENTRY, fn, |
| 156 | &hyperv_ir_domain_ops, NULL); | 156 | &hyperv_ir_domain_ops, NULL); |
| 157 | 157 | ||
| 158 | irq_domain_free_fwnode(fn); | 158 | if (!ioapic_ir_domain) { |
| 159 | irq_domain_free_fwnode(fn); | ||
| 160 | return -ENOMEM; | ||
| 161 | } | ||
| 159 | 162 | ||
| 160 | /* | 163 | /* |
| 161 | * Hyper-V doesn't provide irq remapping function for | 164 | * Hyper-V doesn't provide irq remapping function for |
| @@ -898,7 +898,8 @@ int __init detect_intel_iommu(void) · 897 unmodified lines | |||
| 898 | if (!ret) | 898 | if (!ret) |
| 899 | ret = dmar_walk_dmar_table((struct acpi_table_dmar *)dmar_tbl, | 899 | ret = dmar_walk_dmar_table((struct acpi_table_dmar *)dmar_tbl, |
| 900 | &validate_drhd_cb); | 900 | &validate_drhd_cb); |
| 901 | if (!ret && !no_iommu && !iommu_detected && !dmar_disabled) { | 901 | if (!ret && !no_iommu && !iommu_detected && |
| 902 | (!dmar_disabled || dmar_platform_optin())) { | ||
| 902 | iommu_detected = 1; | 903 | iommu_detected = 1; |
| 903 | /* Make sure ACS will be enabled */ | 904 | /* Make sure ACS will be enabled */ |
| 904 | pci_request_acs(); | 905 | pci_request_acs(); |
| @@ -612,6 +612,12 @@ struct intel_iommu *domain_get_iommu(struct dmar_domain *domain) · 611 unmodified lines | |||
| 612 | return g_iommus[iommu_id]; | 612 | return g_iommus[iommu_id]; |
| 613 | } | 613 | } |
| 614 | 614 | ||
| 615 | static inline bool iommu_paging_structure_coherency(struct intel_iommu *iommu) | ||
| 616 | { | ||
| 617 | return sm_supported(iommu) ? | ||
| 618 | ecap_smpwc(iommu->ecap) : ecap_coherent(iommu->ecap); | ||
| 619 | } | ||
| 620 | |||
| 615 | static void domain_update_iommu_coherency(struct dmar_domain *domain) | 621 | static void domain_update_iommu_coherency(struct dmar_domain *domain) |
| 616 | { | 622 | { |
| 617 | struct dmar_drhd_unit *drhd; | 623 | struct dmar_drhd_unit *drhd; |
| @@ -623,7 +629,7 @@ static void domain_update_iommu_coherency(struct dmar_domain *domain) · 5 unmodified lines | |||
| 623 | 629 | ||
| 624 | for_each_domain_iommu(i, domain) { | 630 | for_each_domain_iommu(i, domain) { |
| 625 | found = true; | 631 | found = true; |
| 626 | if (!ecap_coherent(g_iommus[i]->ecap)) { | 632 | if (!iommu_paging_structure_coherency(g_iommus[i])) { |
| 627 | domain->iommu_coherency = 0; | 633 | domain->iommu_coherency = 0; |
| 628 | break; | 634 | break; |
| 629 | } | 635 | } |
| @@ -634,7 +640,7 @@ static void domain_update_iommu_coherency(struct dmar_domain *domain) · 4 unmodified lines | |||
| 634 | /* No hardware attached; use lowest common denominator */ | 640 | /* No hardware attached; use lowest common denominator */ |
| 635 | rcu_read_lock(); | 641 | rcu_read_lock(); |
| 636 | for_each_active_iommu(iommu, drhd) { | 642 | for_each_active_iommu(iommu, drhd) { |
| 637 | if (!ecap_coherent(iommu->ecap)) { | 643 | if (!iommu_paging_structure_coherency(iommu)) { |
| 638 | domain->iommu_coherency = 0; | 644 | domain->iommu_coherency = 0; |
| 639 | break; | 645 | break; |
| 640 | } | 646 | } |
| @@ -921,7 +927,7 @@ static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain, · 280 unmodified lines | |||
| 921 | domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); | 927 | domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); |
| 922 | pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE; | 928 | pteval = ((uint64_t)virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE; |
| 923 | if (domain_use_first_level(domain)) | 929 | if (domain_use_first_level(domain)) |
| 924 | pteval |= DMA_FL_PTE_XD; | 930 | pteval |= DMA_FL_PTE_XD | DMA_FL_PTE_US; |
| 925 | if (cmpxchg64(&pte->val, 0ULL, pteval)) | 931 | if (cmpxchg64(&pte->val, 0ULL, pteval)) |
| 926 | /* Someone else set it while we were thinking; use theirs. */ | 932 | /* Someone else set it while we were thinking; use theirs. */ |
| 927 | free_pgtable_page(tmp_page); | 933 | free_pgtable_page(tmp_page); |
| @@ -1951,7 +1957,6 @@ static inline void · 1023 unmodified lines | |||
| 1951 | context_set_sm_rid2pasid(struct context_entry *context, unsigned long pasid) | 1957 | context_set_sm_rid2pasid(struct context_entry *context, unsigned long pasid) |
| 1952 | { | 1958 | { |
| 1953 | context->hi |= pasid & ((1 << 20) - 1); | 1959 | context->hi |= pasid & ((1 << 20) - 1); |
| 1954 | context->hi |= (1 << 20); | ||
| 1955 | } | 1960 | } |
| 1956 | 1961 | ||
| 1957 | /* | 1962 | /* |
| @@ -2095,7 +2100,8 @@ static int domain_context_mapping_one(struct dmar_domain *domain, · 137 unmodified lines | |||
| 2095 | 2100 | ||
| 2096 | context_set_fault_enable(context); | 2101 | context_set_fault_enable(context); |
| 2097 | context_set_present(context); | 2102 | context_set_present(context); |
| 2098 | domain_flush_cache(domain, context, sizeof(*context)); | 2103 | if (!ecap_coherent(iommu->ecap)) |
| 2104 | clflush_cache_range(context, sizeof(*context)); | ||
| 2099 | 2105 | ||
| 2100 | /* | 2106 | /* |
| 2101 | * It's a non-present to present mapping. If hardware doesn't cache | 2107 | * It's a non-present to present mapping. If hardware doesn't cache |
| @@ -2243,7 +2249,7 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, · 141 unmodified lines | |||
| 2243 | 2249 | ||
| 2244 | attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP); | 2250 | attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP); |
| 2245 | if (domain_use_first_level(domain)) | 2251 | if (domain_use_first_level(domain)) |
| 2246 | attr |= DMA_FL_PTE_PRESENT | DMA_FL_PTE_XD; | 2252 | attr |= DMA_FL_PTE_PRESENT | DMA_FL_PTE_XD | DMA_FL_PTE_US; |
| 2247 | 2253 | ||
| 2248 | if (!sg) { | 2254 | if (!sg) { |
| 2249 | sg_res = nr_pages; | 2255 | sg_res = nr_pages; |
| @@ -2695,7 +2701,9 @@ static int __init si_domain_init(int hw) · 445 unmodified lines | |||
| 2695 | end >> agaw_to_width(si_domain->agaw))) | 2701 | end >> agaw_to_width(si_domain->agaw))) |
| 2696 | continue; | 2702 | continue; |
| 2697 | 2703 | ||
| 2698 | ret = iommu_domain_identity_map(si_domain, start, end); | 2704 | ret = iommu_domain_identity_map(si_domain, |
| 2705 | mm_to_dma_pfn(start >> PAGE_SHIFT), | ||
| 2706 | mm_to_dma_pfn(end >> PAGE_SHIFT)); | ||
| 2699 | if (ret) | 2707 | if (ret) |
| 2700 | return ret; | 2708 | return ret; |
| 2701 | } | 2709 | } |
| @@ -6021,6 +6029,23 @@ intel_iommu_domain_set_attr(struct iommu_domain *domain, · 3319 unmodified lines | |||
| 6021 | return ret; | 6029 | return ret; |
| 6022 | } | 6030 | } |
| 6023 | 6031 | ||
| 6032 | /* | ||
| 6033 | * Check that the device does not live on an external facing PCI port that is | ||
| 6034 | * marked as untrusted. Such devices should not be able to apply quirks and | ||
| 6035 | * thus not be able to bypass the IOMMU restrictions. | ||
| 6036 | */ | ||
| 6037 | static bool risky_device(struct pci_dev *pdev) | ||
| 6038 | { | ||
| 6039 | if (pdev->untrusted) { | ||
| 6040 | pci_info(pdev, | ||
| 6041 | "Skipping IOMMU quirk for dev [%04X:%04X] on untrusted PCI link\n", | ||
| 6042 | pdev->vendor, pdev->device); | ||
| 6043 | pci_info(pdev, "Please check with your BIOS/Platform vendor about this\n"); | ||
| 6044 | return true; | ||
| 6045 | } | ||
| 6046 | return false; | ||
| 6047 | } | ||
| 6048 | |||
| 6024 | const struct iommu_ops intel_iommu_ops = { | 6049 | const struct iommu_ops intel_iommu_ops = { |
| 6025 | .capable = intel_iommu_capable, | 6050 | .capable = intel_iommu_capable, |
| 6026 | .domain_alloc = intel_iommu_domain_alloc, | 6051 | .domain_alloc = intel_iommu_domain_alloc, |
| @@ -6060,6 +6085,9 @@ const struct iommu_ops intel_iommu_ops = { · 33 unmodified lines | |||
| 6060 | 6085 | ||
| 6061 | static void quirk_iommu_igfx(struct pci_dev *dev) | 6086 | static void quirk_iommu_igfx(struct pci_dev *dev) |
| 6062 | { | 6087 | { |
| 6088 | if (risky_device(dev)) | ||
| 6089 | return; | ||
| 6090 | |||
| 6063 | pci_info(dev, "Disabling IOMMU for graphics on this chipset\n"); | 6091 | pci_info(dev, "Disabling IOMMU for graphics on this chipset\n"); |
| 6064 | dmar_map_gfx = 0; | 6092 | dmar_map_gfx = 0; |
| 6065 | } | 6093 | } |
| @@ -6101,6 +6129,9 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x163D, quirk_iommu_igfx); · 35 unmodified lines | |||
| 6101 | 6129 | ||
| 6102 | static void quirk_iommu_rwbf(struct pci_dev *dev) | 6130 | static void quirk_iommu_rwbf(struct pci_dev *dev) |
| 6103 | { | 6131 | { |
| 6132 | if (risky_device(dev)) | ||
| 6133 | return; | ||
| 6134 | |||
| 6104 | /* | 6135 | /* |
| 6105 | * Mobile 4 Series Chipset neglects to set RWBF capability, | 6136 | * Mobile 4 Series Chipset neglects to set RWBF capability, |
| 6106 | * but needs it. Same seems to hold for the desktop versions. | 6137 | * but needs it. Same seems to hold for the desktop versions. |
| @@ -6131,6 +6162,9 @@ static void quirk_calpella_no_shadow_gtt(struct pci_dev *dev) · 24 unmodified lines | |||
| 6131 | { | 6162 | { |
| 6132 | unsigned short ggc; | 6163 | unsigned short ggc; |
| 6133 | 6164 | ||
| 6165 | if (risky_device(dev)) | ||
| 6166 | return; | ||
| 6167 | |||
| 6134 | if (pci_read_config_word(dev, GGC, &ggc)) | 6168 | if (pci_read_config_word(dev, GGC, &ggc)) |
| 6135 | return; | 6169 | return; |
| 6136 | 6170 | ||
| @@ -6164,6 +6198,12 @@ static void __init check_tylersburg_isoch(void) · 27 unmodified lines | |||
| 6164 | pdev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x3a3e, NULL); | 6198 | pdev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x3a3e, NULL); |
| 6165 | if (!pdev) | 6199 | if (!pdev) |
| 6166 | return; | 6200 | return; |
| 6201 | |||
| 6202 | if (risky_device(pdev)) { | ||
| 6203 | pci_dev_put(pdev); | ||
| 6204 | return; | ||
| 6205 | } | ||
| 6206 | |||
| 6167 | pci_dev_put(pdev); | 6207 | pci_dev_put(pdev); |
| 6168 | 6208 | ||
| 6169 | /* System Management Registers. Might be hidden, in which case | 6209 | /* System Management Registers. Might be hidden, in which case |
| @@ -6173,6 +6213,11 @@ static void __init check_tylersburg_isoch(void) · 3 unmodified lines | |||
| 6173 | if (!pdev) | 6213 | if (!pdev) |
| 6174 | return; | 6214 | return; |
| 6175 | 6215 | ||
| 6216 | if (risky_device(pdev)) { | ||
| 6217 | pci_dev_put(pdev); | ||
| 6218 | return; | ||
| 6219 | } | ||
| 6220 | |||
| 6176 | if (pci_read_config_dword(pdev, 0x188, &vtisochctrl)) { | 6221 | if (pci_read_config_dword(pdev, 0x188, &vtisochctrl)) { |
| 6177 | pci_dev_put(pdev); | 6222 | pci_dev_put(pdev); |
| 6178 | return; | 6223 | return; |
| @@ -563,8 +563,8 @@ static int intel_setup_irq_remapping(struct intel_iommu *iommu) · 562 unmodified lines | |||
| 563 | 0, INTR_REMAP_TABLE_ENTRIES, | 563 | 0, INTR_REMAP_TABLE_ENTRIES, |
| 564 | fn, &intel_ir_domain_ops, | 564 | fn, &intel_ir_domain_ops, |
| 565 | iommu); | 565 | iommu); |
| 566 | irq_domain_free_fwnode(fn); | ||
| 567 | if (!iommu->ir_domain) { | 566 | if (!iommu->ir_domain) { |
| 567 | irq_domain_free_fwnode(fn); | ||
| 568 | pr_err("IR%d: failed to allocate irqdomain\n", iommu->seq_id); | 568 | pr_err("IR%d: failed to allocate irqdomain\n", iommu->seq_id); |
| 569 | goto out_free_bitmap; | 569 | goto out_free_bitmap; |
| 570 | } | 570 | } |
| @@ -295,10 +295,10 @@ void iommu_release_device(struct device *dev) · 294 unmodified lines | |||
| 295 | return; | 295 | return; |
| 296 | 296 | ||
| 297 | iommu_device_unlink(dev->iommu->iommu_dev, dev); | 297 | iommu_device_unlink(dev->iommu->iommu_dev, dev); |
| 298 | iommu_group_remove_device(dev); | ||
| 299 | 298 | ||
| 300 | ops->release_device(dev); | 299 | ops->release_device(dev); |
| 301 | 300 | ||
| 301 | iommu_group_remove_device(dev); | ||
| 302 | module_put(ops->owner); | 302 | module_put(ops->owner); |
| 303 | dev_iommu_free(dev); | 303 | dev_iommu_free(dev); |
| 304 | } | 304 | } |
| @@ -313,9 +313,9 @@ static int sun50i_iommu_flush_all_tlb(struct sun50i_iommu *iommu) · 312 unmodified lines | |||
| 313 | IOMMU_TLB_FLUSH_MICRO_TLB(1) | | 313 | IOMMU_TLB_FLUSH_MICRO_TLB(1) | |
| 314 | IOMMU_TLB_FLUSH_MICRO_TLB(0)); | 314 | IOMMU_TLB_FLUSH_MICRO_TLB(0)); |
| 315 | 315 | ||
| 316 | ret = readl_poll_timeout(iommu->base + IOMMU_TLB_FLUSH_REG, | 316 | ret = readl_poll_timeout_atomic(iommu->base + IOMMU_TLB_FLUSH_REG, |
| 317 | reg, !reg, | 317 | reg, !reg, |
| 318 | 1, 2000); | 318 | 1, 2000); |
| 319 | if (ret) | 319 | if (ret) |
| 320 | dev_warn(iommu->dev, "TLB Flush timed out!\n"); | 320 | dev_warn(iommu->dev, "TLB Flush timed out!\n"); |
| 321 | 321 | ||
| @@ -556,7 +556,6 @@ static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova · 234 unmodified lines | |||
| 556 | { | 556 | { |
| 557 | struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain); | 557 | struct sun50i_iommu_domain *sun50i_domain = to_sun50i_domain(domain); |
| 558 | phys_addr_t pt_phys; | 558 | phys_addr_t pt_phys; |
| 559 | dma_addr_t pte_dma; | ||
| 560 | u32 *pte_addr; | 559 | u32 *pte_addr; |
| 561 | u32 dte; | 560 | u32 dte; |
| 562 | 561 | ||
| @@ -566,7 +565,6 @@ static size_t sun50i_iommu_unmap(struct iommu_domain *domain, unsigned long iova · 3 unmodified lines | |||
| 566 | 565 | ||
| 567 | pt_phys = sun50i_dte_get_pt_address(dte); | 566 | pt_phys = sun50i_dte_get_pt_address(dte); |
| 568 | pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova); | 567 | pte_addr = (u32 *)phys_to_virt(pt_phys) + sun50i_iova_get_pte_index(iova); |
| 569 | pte_dma = pt_phys + sun50i_iova_get_pte_index(iova) * PT_ENTRY_SIZE; | ||
| 570 | 568 | ||
| 571 | if (!sun50i_pte_is_page_valid(*pte_addr)) | 569 | if (!sun50i_pte_is_page_valid(*pte_addr)) |
| 572 | return 0; | 570 | return 0; |
| @@ -563,7 +563,7 @@ config LOONGSON_PCH_PIC · 562 unmodified lines | |||
| 563 | Support for the Loongson PCH PIC Controller. | 563 | Support for the Loongson PCH PIC Controller. |
| 564 | 564 | ||
| 565 | config LOONGSON_PCH_MSI | 565 | config LOONGSON_PCH_MSI |
| 566 | bool "Loongson PCH PIC Controller" | 566 | bool "Loongson PCH MSI Controller" |
| 567 | depends on MACH_LOONGSON64 || COMPILE_TEST | 567 | depends on MACH_LOONGSON64 || COMPILE_TEST |
| 568 | depends on PCI | 568 | depends on PCI |
| 569 | default MACH_LOONGSON64 | 569 | default MACH_LOONGSON64 |
| @@ -3797,10 +3797,10 @@ static void its_wait_vpt_parse_complete(void) · 3796 unmodified lines | |||
| 3797 | if (!gic_rdists->has_vpend_valid_dirty) | 3797 | if (!gic_rdists->has_vpend_valid_dirty) |
| 3798 | return; | 3798 | return; |
| 3799 | 3799 | ||
| 3800 | WARN_ON_ONCE(readq_relaxed_poll_timeout(vlpi_base + GICR_VPENDBASER, | 3800 | WARN_ON_ONCE(readq_relaxed_poll_timeout_atomic(vlpi_base + GICR_VPENDBASER, |
| 3801 | val, | 3801 | val, |
| 3802 | !(val & GICR_VPENDBASER_Dirty), | 3802 | !(val & GICR_VPENDBASER_Dirty), |
| 3803 | 10, 500)); | 3803 | 10, 500)); |
| 3804 | } | 3804 | } |
| 3805 | 3805 | ||
| 3806 | static void its_vpe_schedule(struct its_vpe *vpe) | 3806 | static void its_vpe_schedule(struct its_vpe *vpe) |
| @@ -4054,16 +4054,24 @@ static void its_vpe_4_1_deschedule(struct its_vpe *vpe, · 247 unmodified lines | |||
| 4054 | u64 val; | 4054 | u64 val; |
| 4055 | 4055 | ||
| 4056 | if (info->req_db) { | 4056 | if (info->req_db) { |
| 4057 | unsigned long flags; | ||
| 4058 | |||
| 4057 | /* | 4059 | /* |
| 4058 | * vPE is going to block: make the vPE non-resident with | 4060 | * vPE is going to block: make the vPE non-resident with |
| 4059 | * PendingLast clear and DB set. The GIC guarantees that if | 4061 | * PendingLast clear and DB set. The GIC guarantees that if |
| 4060 | * we read-back PendingLast clear, then a doorbell will be | 4062 | * we read-back PendingLast clear, then a doorbell will be |
| 4061 | * delivered when an interrupt comes. | 4063 | * delivered when an interrupt comes. |
| 4064 | * | ||
| 4065 | * Note the locking to deal with the concurrent update of | ||
| 4066 | * pending_last from the doorbell interrupt handler that can | ||
| 4067 | * run concurrently. | ||
| 4062 | */ | 4068 | */ |
| 4069 | raw_spin_lock_irqsave(&vpe->vpe_lock, flags); | ||
| 4063 | val = its_clear_vpend_valid(vlpi_base, | 4070 | val = its_clear_vpend_valid(vlpi_base, |
| 4064 | GICR_VPENDBASER_PendingLast, | 4071 | GICR_VPENDBASER_PendingLast, |
| 4065 | GICR_VPENDBASER_4_1_DB); | 4072 | GICR_VPENDBASER_4_1_DB); |
| 4066 | vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); | 4073 | vpe->pending_last = !!(val & GICR_VPENDBASER_PendingLast); |
| 4074 | raw_spin_unlock_irqrestore(&vpe->vpe_lock, flags); | ||
| 4067 | } else { | 4075 | } else { |
| 4068 | /* | 4076 | /* |
| 4069 | * We're not blocking, so just make the vPE non-resident | 4077 | * We're not blocking, so just make the vPE non-resident |
| @@ -329,10 +329,8 @@ static int gic_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu) · 328 unmodified lines | |||
| 329 | static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, | 329 | static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, |
| 330 | bool force) | 330 | bool force) |
| 331 | { | 331 | { |
| 332 | void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); | 332 | void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + gic_irq(d); |
| 333 | unsigned int cpu, shift = (gic_irq(d) % 4) * 8; | 333 | unsigned int cpu; |
| 334 | u32 val, mask, bit; | ||
| 335 | unsigned long flags; | ||
| 336 | 334 | ||
| 337 | if (!force) | 335 | if (!force) |
| 338 | cpu = cpumask_any_and(mask_val, cpu_online_mask); | 336 | cpu = cpumask_any_and(mask_val, cpu_online_mask); |
| @@ -342,13 +340,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, · 3 unmodified lines | |||
| 342 | if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) | 340 | if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) |
| 343 | return -EINVAL; | 341 | return -EINVAL; |
| 344 | 342 | ||
| 345 | gic_lock_irqsave(flags); | 343 | writeb_relaxed(gic_cpu_map[cpu], reg); |
| 346 | mask = 0xff << shift; | ||
| 347 | bit = gic_cpu_map[cpu] << shift; | ||
| 348 | val = readl_relaxed(reg) & ~mask; | ||
| 349 | writel_relaxed(val | bit, reg); | ||
| 350 | gic_unlock_irqrestore(flags); | ||
| 351 | |||
| 352 | irq_data_update_effective_affinity(d, cpumask_of(cpu)); | 344 | irq_data_update_effective_affinity(d, cpumask_of(cpu)); |
| 353 | 345 | ||
| 354 | return IRQ_SET_MASK_OK_DONE; | 346 | return IRQ_SET_MASK_OK_DONE; |
| @@ -99,7 +99,7 @@ static int __init riscv_intc_init(struct device_node *node, · 98 unmodified lines | |||
| 99 | 99 | ||
| 100 | hartid = riscv_of_parent_hartid(node); | 100 | hartid = riscv_of_parent_hartid(node); |
| 101 | if (hartid < 0) { | 101 | if (hartid < 0) { |
| 102 | pr_warn("unable to fine hart id for %pOF\n", node); | 102 | pr_warn("unable to find hart id for %pOF\n", node); |
| 103 | return 0; | 103 | return 0; |
| 104 | } | 104 | } |
| 105 | 105 | ||
| @@ -1471,7 +1471,7 @@ static void retrieve_deps(struct dm_table *table, · 1470 unmodified lines | |||
| 1471 | /* | 1471 | /* |
| 1472 | * Check we have enough space. | 1472 | * Check we have enough space. |
| 1473 | */ | 1473 | */ |
| 1474 | needed = sizeof(*deps) + (sizeof(*deps->dev) * count); | 1474 | needed = struct_size(deps, dev, count); |
| 1475 | if (len < needed) { | 1475 | if (len < needed) { |
| 1476 | param->flags |= DM_BUFFER_FULL_FLAG; | 1476 | param->flags |= DM_BUFFER_FULL_FLAG; |
| 1477 | return; | 1477 | return; |
| @@ -146,10 +146,6 @@ static void rq_end_stats(struct mapped_device *md, struct request *orig) · 145 unmodified lines | |||
| 146 | */ | 146 | */ |
| 147 | static void rq_completed(struct mapped_device *md) | 147 | static void rq_completed(struct mapped_device *md) |
| 148 | { | 148 | { |
| 149 | /* nudge anyone waiting on suspend queue */ | ||
| 150 | if (unlikely(wq_has_sleeper(&md->wait))) | ||
| 151 | wake_up(&md->wait); | ||
| 152 | |||
| 153 | /* | 149 | /* |
| 154 | * dm_put() must be at the end of this function. See the comment above | 150 | * dm_put() must be at the end of this function. See the comment above |
| 155 | */ | 151 | */ |
| @@ -282,6 +282,8 @@ static int persistent_memory_claim(struct dm_writecache *wc) · 281 unmodified lines | |||
| 282 | while (daa-- && i < p) { | 282 | while (daa-- && i < p) { |
| 283 | pages[i++] = pfn_t_to_page(pfn); | 283 | pages[i++] = pfn_t_to_page(pfn); |
| 284 | pfn.val++; | 284 | pfn.val++; |
| 285 | if (!(i & 15)) | ||
| 286 | cond_resched(); | ||
| 285 | } | 287 | } |
| 286 | } while (i < p); | 288 | } while (i < p); |
| 287 | wc->memory_map = vmap(pages, p, VM_MAP, PAGE_KERNEL); | 289 | wc->memory_map = vmap(pages, p, VM_MAP, PAGE_KERNEL); |
| @@ -849,10 +851,14 @@ static void writecache_discard(struct dm_writecache *wc, sector_t start, sector_ · 561 unmodified lines | |||
| 849 | 851 | ||
| 850 | if (likely(!e->write_in_progress)) { | 852 | if (likely(!e->write_in_progress)) { |
| 851 | if (!discarded_something) { | 853 | if (!discarded_something) { |
| 852 | writecache_wait_for_ios(wc, READ); | 854 | if (!WC_MODE_PMEM(wc)) { |
| 853 | writecache_wait_for_ios(wc, WRITE); | 855 | writecache_wait_for_ios(wc, READ); |
| 856 | writecache_wait_for_ios(wc, WRITE); | ||
| 857 | } | ||
| 854 | discarded_something = true; | 858 | discarded_something = true; |
| 855 | } | 859 | } |
| 860 | if (!writecache_entry_is_committed(wc, e)) | ||
| 861 | wc->uncommitted_blocks--; | ||
| 856 | writecache_free_entry(wc, e); | 862 | writecache_free_entry(wc, e); |
| 857 | } | 863 | } |
| 858 | 864 | ||
| @@ -2260,6 +2266,12 @@ invalid_optional: · 1401 unmodified lines | |||
| 2260 | } | 2266 | } |
| 2261 | 2267 | ||
| 2262 | if (WC_MODE_PMEM(wc)) { | 2268 | if (WC_MODE_PMEM(wc)) { |
| 2269 | if (!dax_synchronous(wc->ssd_dev->dax_dev)) { | ||
| 2270 | r = -EOPNOTSUPP; | ||
| 2271 | ti->error = "Asynchronous persistent memory not supported as pmem cache"; | ||
| 2272 | goto bad; | ||
| 2273 | } | ||
| 2274 | |||
| 2263 | r = persistent_memory_claim(wc); | 2275 | r = persistent_memory_claim(wc); |
| 2264 | if (r) { | 2276 | if (r) { |
| 2265 | ti->error = "Unable to map persistent memory for cache"; | 2277 | ti->error = "Unable to map persistent memory for cache"; |
| @@ -1078,7 +1078,8 @@ static int dmz_check_sb(struct dmz_metadata *zmd, struct dmz_sb *dsb, · 1077 unmodified lines | |||
| 1078 | nr_meta_zones = (le32_to_cpu(sb->nr_meta_blocks) + zmd->zone_nr_blocks - 1) | 1078 | nr_meta_zones = (le32_to_cpu(sb->nr_meta_blocks) + zmd->zone_nr_blocks - 1) |
| 1079 | >> zmd->zone_nr_blocks_shift; | 1079 | >> zmd->zone_nr_blocks_shift; |
| 1080 | if (!nr_meta_zones || | 1080 | if (!nr_meta_zones || |
| 1081 | nr_meta_zones >= zmd->nr_rnd_zones) { | 1081 | (zmd->nr_devs <= 1 && nr_meta_zones >= zmd->nr_rnd_zones) || |
| 1082 | (zmd->nr_devs > 1 && nr_meta_zones >= zmd->nr_cache_zones)) { | ||
| 1082 | dmz_dev_err(dev, "Invalid number of metadata blocks"); | 1083 | dmz_dev_err(dev, "Invalid number of metadata blocks"); |
| 1083 | return -ENXIO; | 1084 | return -ENXIO; |
| 1084 | } | 1085 | } |
| @@ -1949,7 +1950,7 @@ static struct dm_zone *dmz_get_rnd_zone_for_reclaim(struct dmz_metadata *zmd, · 864 unmodified lines | |||
| 1949 | unsigned int idx, bool idle) | 1950 | unsigned int idx, bool idle) |
| 1950 | { | 1951 | { |
| 1951 | struct dm_zone *dzone = NULL; | 1952 | struct dm_zone *dzone = NULL; |
| 1952 | struct dm_zone *zone, *last = NULL; | 1953 | struct dm_zone *zone, *maxw_z = NULL; |
| 1953 | struct list_head *zone_list; | 1954 | struct list_head *zone_list; |
| 1954 | 1955 | ||
| 1955 | /* If we have cache zones select from the cache zone list */ | 1956 | /* If we have cache zones select from the cache zone list */ |
| @@ -1961,18 +1962,37 @@ static struct dm_zone *dmz_get_rnd_zone_for_reclaim(struct dmz_metadata *zmd, · 5 unmodified lines | |||
| 1961 | } else | 1962 | } else |
| 1962 | zone_list = &zmd->dev[idx].map_rnd_list; | 1963 | zone_list = &zmd->dev[idx].map_rnd_list; |
| 1963 | 1964 | ||
| 1965 | /* | ||
| 1966 | * Find the buffer zone with the heaviest weight or the first (oldest) | ||
| 1967 | * data zone that can be reclaimed. | ||
| 1968 | */ | ||
| 1964 | list_for_each_entry(zone, zone_list, link) { | 1969 | list_for_each_entry(zone, zone_list, link) { |
| 1965 | if (dmz_is_buf(zone)) { | 1970 | if (dmz_is_buf(zone)) { |
| 1966 | dzone = zone->bzone; | 1971 | dzone = zone->bzone; |
| 1967 | if (dzone->dev->dev_idx != idx) | 1972 | if (dmz_is_rnd(dzone) && dzone->dev->dev_idx != idx) |
| 1968 | continue; | ||
| 1969 | if (!last) { | ||
| 1970 | last = dzone; | ||
| 1971 | continue; | 1973 | continue; |
| 1972 | } | 1974 | if (!maxw_z || maxw_z->weight < dzone->weight) |
| 1973 | if (last->weight < dzone->weight) | 1975 | maxw_z = dzone; |
| 1976 | } else { | ||
| 1977 | dzone = zone; | ||
| 1978 | if (dmz_lock_zone_reclaim(dzone)) | ||
| 1979 | return dzone; | ||
| 1980 | } | ||
| 1981 | } | ||
| 1982 | |||
| 1983 | if (maxw_z && dmz_lock_zone_reclaim(maxw_z)) | ||
| 1984 | return maxw_z; | ||
| 1985 | |||
| 1986 | /* | ||
| 1987 | * If we come here, none of the zones inspected could be locked for | ||
| 1988 | * reclaim. Try again, being more aggressive, that is, find the | ||
| 1989 | * first zone that can be reclaimed regardless of its weitght. | ||
| 1990 | */ | ||
| 1991 | list_for_each_entry(zone, zone_list, link) { | ||
| 1992 | if (dmz_is_buf(zone)) { | ||
| 1993 | dzone = zone->bzone; | ||
| 1994 | if (dmz_is_rnd(dzone) && dzone->dev->dev_idx != idx) | ||
| 1974 | continue; | 1995 | continue; |
| 1975 | dzone = last; | ||
| 1976 | } else | 1996 | } else |
| 1977 | dzone = zone; | 1997 | dzone = zone; |
| 1978 | if (dmz_lock_zone_reclaim(dzone)) | 1998 | if (dmz_lock_zone_reclaim(dzone)) |
| @@ -2006,7 +2026,7 @@ static struct dm_zone *dmz_get_seq_zone_for_reclaim(struct dmz_metadata *zmd, · 27 unmodified lines | |||
| 2006 | struct dm_zone *dmz_get_zone_for_reclaim(struct dmz_metadata *zmd, | 2026 | struct dm_zone *dmz_get_zone_for_reclaim(struct dmz_metadata *zmd, |
| 2007 | unsigned int dev_idx, bool idle) | 2027 | unsigned int dev_idx, bool idle) |
| 2008 | { | 2028 | { |
| 2009 | struct dm_zone *zone; | 2029 | struct dm_zone *zone = NULL; |
| 2010 | 2030 | ||
| 2011 | /* | 2031 | /* |
| 2012 | * Search for a zone candidate to reclaim: 2 cases are possible. | 2032 | * Search for a zone candidate to reclaim: 2 cases are possible. |
| @@ -2019,7 +2039,7 @@ struct dm_zone *dmz_get_zone_for_reclaim(struct dmz_metadata *zmd, · 6 unmodified lines | |||
| 2019 | dmz_lock_map(zmd); | 2039 | dmz_lock_map(zmd); |
| 2020 | if (list_empty(&zmd->reserved_seq_zones_list)) | 2040 | if (list_empty(&zmd->reserved_seq_zones_list)) |
| 2021 | zone = dmz_get_seq_zone_for_reclaim(zmd, dev_idx); | 2041 | zone = dmz_get_seq_zone_for_reclaim(zmd, dev_idx); |
| 2022 | else | 2042 | if (!zone) |
| 2023 | zone = dmz_get_rnd_zone_for_reclaim(zmd, dev_idx, idle); | 2043 | zone = dmz_get_rnd_zone_for_reclaim(zmd, dev_idx, idle); |
| 2024 | dmz_unlock_map(zmd); | 2044 | dmz_unlock_map(zmd); |
| 2025 | 2045 | ||
| @@ -2197,8 +2217,15 @@ struct dm_zone *dmz_alloc_zone(struct dmz_metadata *zmd, unsigned int dev_idx, · 171 unmodified lines | |||
| 2197 | { | 2217 | { |
| 2198 | struct list_head *list; | 2218 | struct list_head *list; |
| 2199 | struct dm_zone *zone; | 2219 | struct dm_zone *zone; |
| 2200 | int i = 0; | 2220 | int i; |
| 2221 | |||
| 2222 | /* Schedule reclaim to ensure free zones are available */ | ||
| 2223 | if (!(flags & DMZ_ALLOC_RECLAIM)) { | ||
| 2224 | for (i = 0; i < zmd->nr_devs; i++) | ||
| 2225 | dmz_schedule_reclaim(zmd->dev[i].reclaim); | ||
| 2226 | } | ||
| 2201 | 2227 | ||
| 2228 | i = 0; | ||
| 2202 | again: | 2229 | again: |
| 2203 | if (flags & DMZ_ALLOC_CACHE) | 2230 | if (flags & DMZ_ALLOC_CACHE) |
| 2204 | list = &zmd->unmap_cache_list; | 2231 | list = &zmd->unmap_cache_list; |
| @@ -377,6 +377,7 @@ static int dmz_do_reclaim(struct dmz_reclaim *zrc) · 376 unmodified lines | |||
| 377 | dmz_metadata_label(zmd), zrc->dev_idx); | 377 | dmz_metadata_label(zmd), zrc->dev_idx); |
| 378 | return -EBUSY; | 378 | return -EBUSY; |
| 379 | } | 379 | } |
| 380 | rzone = dzone; | ||
| 380 | 381 | ||
| 381 | start = jiffies; | 382 | start = jiffies; |
| 382 | if (dmz_is_cache(dzone) || dmz_is_rnd(dzone)) { | 383 | if (dmz_is_cache(dzone) || dmz_is_rnd(dzone)) { |
| @@ -391,8 +392,6 @@ static int dmz_do_reclaim(struct dmz_reclaim *zrc) · 8 unmodified lines | |||
| 391 | */ | 392 | */ |
| 392 | ret = dmz_reclaim_rnd_data(zrc, dzone); | 393 | ret = dmz_reclaim_rnd_data(zrc, dzone); |
| 393 | } | 394 | } |
| 394 | rzone = dzone; | ||
| 395 | |||
| 396 | } else { | 395 | } else { |
| 397 | struct dm_zone *bzone = dzone->bzone; | 396 | struct dm_zone *bzone = dzone->bzone; |
| 398 | sector_t chunk_block = 0; | 397 | sector_t chunk_block = 0; |
| @@ -415,7 +414,6 @@ static int dmz_do_reclaim(struct dmz_reclaim *zrc) · 16 unmodified lines | |||
| 415 | * be later reclaimed. | 414 | * be later reclaimed. |
| 416 | */ | 415 | */ |
| 417 | ret = dmz_reclaim_seq_data(zrc, dzone); | 416 | ret = dmz_reclaim_seq_data(zrc, dzone); |
| 418 | rzone = dzone; | ||
| 419 | } | 417 | } |
| 420 | } | 418 | } |
| 421 | out: | 419 | out: |
| @@ -458,6 +456,8 @@ static unsigned int dmz_reclaim_percentage(struct dmz_reclaim *zrc) · 36 unmodified lines | |||
| 458 | nr_zones = dmz_nr_rnd_zones(zmd, zrc->dev_idx); | 456 | nr_zones = dmz_nr_rnd_zones(zmd, zrc->dev_idx); |
| 459 | nr_unmap = dmz_nr_unmap_rnd_zones(zmd, zrc->dev_idx); | 457 | nr_unmap = dmz_nr_unmap_rnd_zones(zmd, zrc->dev_idx); |
| 460 | } | 458 | } |
| 459 | if (nr_unmap <= 1) | ||
| 460 | return 0; | ||
| 461 | return nr_unmap * 100 / nr_zones; | 461 | return nr_unmap * 100 / nr_zones; |
| 462 | } | 462 | } |
| 463 | 463 | ||
| @@ -503,7 +503,7 @@ static void dmz_reclaim_work(struct work_struct *work) · 39 unmodified lines | |||
| 503 | { | 503 | { |
| 504 | struct dmz_reclaim *zrc = container_of(work, struct dmz_reclaim, work.work); | 504 | struct dmz_reclaim *zrc = container_of(work, struct dmz_reclaim, work.work); |
| 505 | struct dmz_metadata *zmd = zrc->metadata; | 505 | struct dmz_metadata *zmd = zrc->metadata; |
| 506 | unsigned int p_unmap, nr_unmap_rnd = 0, nr_rnd = 0; | 506 | unsigned int p_unmap; |
| 507 | int ret; | 507 | int ret; |
| 508 | 508 | ||
| 509 | if (dmz_dev_is_dying(zmd)) | 509 | if (dmz_dev_is_dying(zmd)) |
| @@ -529,9 +529,6 @@ static void dmz_reclaim_work(struct work_struct *work) · 19 unmodified lines | |||
| 529 | zrc->kc_throttle.throttle = min(75U, 100U - p_unmap / 2); | 529 | zrc->kc_throttle.throttle = min(75U, 100U - p_unmap / 2); |
| 530 | } | 530 | } |
| 531 | 531 | ||
| 532 | nr_unmap_rnd = dmz_nr_unmap_rnd_zones(zmd, zrc->dev_idx); | ||
| 533 | nr_rnd = dmz_nr_rnd_zones(zmd, zrc->dev_idx); | ||
| 534 | |||
| 535 | DMDEBUG("(%s/%u): Reclaim (%u): %s, %u%% free zones (%u/%u cache %u/%u random)", | 532 | DMDEBUG("(%s/%u): Reclaim (%u): %s, %u%% free zones (%u/%u cache %u/%u random)", |
| 536 | dmz_metadata_label(zmd), zrc->dev_idx, | 533 | dmz_metadata_label(zmd), zrc->dev_idx, |
| 537 | zrc->kc_throttle.throttle, | 534 | zrc->kc_throttle.throttle, |
| @@ -400,15 +400,7 @@ static void dmz_handle_bio(struct dmz_target *dmz, struct dm_chunk_work *cw, · 399 unmodified lines | |||
| 400 | dm_per_bio_data(bio, sizeof(struct dmz_bioctx)); | 400 | dm_per_bio_data(bio, sizeof(struct dmz_bioctx)); |
| 401 | struct dmz_metadata *zmd = dmz->metadata; | 401 | struct dmz_metadata *zmd = dmz->metadata; |
| 402 | struct dm_zone *zone; | 402 | struct dm_zone *zone; |
| 403 | int i, ret; | 403 | int ret; |
| 404 | |||
| 405 | /* | ||
| 406 | * Write may trigger a zone allocation. So make sure the | ||
| 407 | * allocation can succeed. | ||
| 408 | */ | ||
| 409 | if (bio_op(bio) == REQ_OP_WRITE) | ||
| 410 | for (i = 0; i < dmz->nr_ddevs; i++) | ||
| 411 | dmz_schedule_reclaim(dmz->dev[i].reclaim); | ||
| 412 | 404 | ||
| 413 | dmz_lock_metadata(zmd); | 405 | dmz_lock_metadata(zmd); |
| 414 | 406 | ||
| @@ -890,7 +882,7 @@ static int dmz_ctr(struct dm_target *ti, unsigned int argc, char **argv) · 475 unmodified lines | |||
| 890 | } | 882 | } |
| 891 | 883 | ||
| 892 | /* Set target (no write same support) */ | 884 | /* Set target (no write same support) */ |
| 893 | ti->max_io_len = dmz_zone_nr_sectors(dmz->metadata) << 9; | 885 | ti->max_io_len = dmz_zone_nr_sectors(dmz->metadata); |
| 894 | ti->num_flush_bios = 1; | 886 | ti->num_flush_bios = 1; |
| 895 | ti->num_discard_bios = 1; | 887 | ti->num_discard_bios = 1; |
| 896 | ti->num_write_zeroes_bios = 1; | 888 | ti->num_write_zeroes_bios = 1; |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | |||
| 12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
| 13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
| 14 | #include <linux/mutex.h> | 14 | #include <linux/mutex.h> |
| 15 | #include <linux/sched/mm.h> | ||
| 15 | #include <linux/sched/signal.h> | 16 | #include <linux/sched/signal.h> |
| 16 | #include <linux/blkpg.h> | 17 | #include <linux/blkpg.h> |
| 17 | #include <linux/bio.h> | 18 | #include <linux/bio.h> |
| @@ -654,28 +655,6 @@ static void free_tio(struct dm_target_io *tio) · 636 unmodified lines | |||
| 654 | bio_put(&tio->clone); | 655 | bio_put(&tio->clone); |
| 655 | } | 656 | } |
| 656 | 657 | ||
| 657 | static bool md_in_flight_bios(struct mapped_device *md) | ||
| 658 | { | ||
| 659 | int cpu; | ||
| 660 | struct hd_struct *part = &dm_disk(md)->part0; | ||
| 661 | long sum = 0; | ||
| 662 | |||
| 663 | for_each_possible_cpu(cpu) { | ||
| 664 | sum += part_stat_local_read_cpu(part, in_flight[0], cpu); | ||
| 665 | sum += part_stat_local_read_cpu(part, in_flight[1], cpu); | ||
| 666 | } | ||
| 667 | |||
| 668 | return sum != 0; | ||
| 669 | } | ||
| 670 | |||
| 671 | static bool md_in_flight(struct mapped_device *md) | ||
| 672 | { | ||
| 673 | if (queue_is_mq(md->queue)) | ||
| 674 | return blk_mq_queue_inflight(md->queue); | ||
| 675 | else | ||
| 676 | return md_in_flight_bios(md); | ||
| 677 | } | ||
| 678 | |||
| 679 | u64 dm_start_time_ns_from_clone(struct bio *bio) | 658 | u64 dm_start_time_ns_from_clone(struct bio *bio) |
| 680 | { | 659 | { |
| 681 | struct dm_target_io *tio = container_of(bio, struct dm_target_io, clone); | 660 | struct dm_target_io *tio = container_of(bio, struct dm_target_io, clone); |
| @@ -1009,6 +988,7 @@ static void clone_endio(struct bio *bio) · 327 unmodified lines | |||
| 1009 | struct dm_io *io = tio->io; | 988 | struct dm_io *io = tio->io; |
| 1010 | struct mapped_device *md = tio->io->md; | 989 | struct mapped_device *md = tio->io->md; |
| 1011 | dm_endio_fn endio = tio->ti->type->end_io; | 990 | dm_endio_fn endio = tio->ti->type->end_io; |
| 991 | struct bio *orig_bio = io->orig_bio; | ||
| 1012 | 992 | ||
| 1013 | if (unlikely(error == BLK_STS_TARGET) && md->type != DM_TYPE_NVME_BIO_BASED) { | 993 | if (unlikely(error == BLK_STS_TARGET) && md->type != DM_TYPE_NVME_BIO_BASED) { |
| 1014 | if (bio_op(bio) == REQ_OP_DISCARD && | 994 | if (bio_op(bio) == REQ_OP_DISCARD && |
| @@ -1022,6 +1002,18 @@ static void clone_endio(struct bio *bio) · 7 unmodified lines | |||
| 1022 | disable_write_zeroes(md); | 1002 | disable_write_zeroes(md); |
| 1023 | } | 1003 | } |
| 1024 | 1004 | ||
| 1005 | /* | ||
| 1006 | * For zone-append bios get offset in zone of the written | ||
| 1007 | * sector and add that to the original bio sector pos. | ||
| 1008 | */ | ||
| 1009 | if (bio_op(orig_bio) == REQ_OP_ZONE_APPEND) { | ||
| 1010 | sector_t written_sector = bio->bi_iter.bi_sector; | ||
| 1011 | struct request_queue *q = orig_bio->bi_disk->queue; | ||
| 1012 | u64 mask = (u64)blk_queue_zone_sectors(q) - 1; | ||
| 1013 | |||
| 1014 | orig_bio->bi_iter.bi_sector += written_sector & mask; | ||
| 1015 | } | ||
| 1016 | |||
| 1025 | if (endio) { | 1017 | if (endio) { |
| 1026 | int r = endio(tio->ti, bio, &error); | 1018 | int r = endio(tio->ti, bio, &error); |
| 1027 | switch (r) { | 1019 | switch (r) { |
| @@ -1452,9 +1444,6 @@ static int __send_empty_flush(struct clone_info *ci) · 424 unmodified lines | |||
| 1452 | BUG_ON(bio_has_data(ci->bio)); | 1444 | BUG_ON(bio_has_data(ci->bio)); |
| 1453 | while ((ti = dm_table_get_target(ci->map, target_nr++))) | 1445 | while ((ti = dm_table_get_target(ci->map, target_nr++))) |
| 1454 | __send_duplicate_bios(ci, ti, ti->num_flush_bios, NULL); | 1446 | __send_duplicate_bios(ci, ti, ti->num_flush_bios, NULL); |
| 1455 | |||
| 1456 | bio_disassociate_blkg(ci->bio); | ||
| 1457 | |||
| 1458 | return 0; | 1447 | return 0; |
| 1459 | } | 1448 | } |
| 1460 | 1449 | ||
| @@ -1642,6 +1631,7 @@ static blk_qc_t __split_and_process_bio(struct mapped_device *md, · 181 unmodified lines | |||
| 1642 | ci.bio = &flush_bio; | 1631 | ci.bio = &flush_bio; |
| 1643 | ci.sector_count = 0; | 1632 | ci.sector_count = 0; |
| 1644 | error = __send_empty_flush(&ci); | 1633 | error = __send_empty_flush(&ci); |
| 1634 | bio_uninit(ci.bio); | ||
| 1645 | /* dec_pending submits any data associated with flush */ | 1635 | /* dec_pending submits any data associated with flush */ |
| 1646 | } else if (op_is_zone_mgmt(bio_op(bio))) { | 1636 | } else if (op_is_zone_mgmt(bio_op(bio))) { |
| 1647 | ci.bio = bio; | 1637 | ci.bio = bio; |
| @@ -1716,6 +1706,7 @@ static blk_qc_t __process_bio(struct mapped_device *md, struct dm_table *map, · 68 unmodified lines | |||
| 1716 | ci.bio = &flush_bio; | 1706 | ci.bio = &flush_bio; |
| 1717 | ci.sector_count = 0; | 1707 | ci.sector_count = 0; |
| 1718 | error = __send_empty_flush(&ci); | 1708 | error = __send_empty_flush(&ci); |
| 1709 | bio_uninit(ci.bio); | ||
| 1719 | /* dec_pending submits any data associated with flush */ | 1710 | /* dec_pending submits any data associated with flush */ |
| 1720 | } else { | 1711 | } else { |
| 1721 | struct dm_target_io *tio; | 1712 | struct dm_target_io *tio; |
| @@ -2457,15 +2448,29 @@ void dm_put(struct mapped_device *md) · 735 unmodified lines | |||
| 2457 | } | 2448 | } |
| 2458 | EXPORT_SYMBOL_GPL(dm_put); | 2449 | EXPORT_SYMBOL_GPL(dm_put); |
| 2459 | 2450 | ||
| 2460 | static int dm_wait_for_completion(struct mapped_device *md, long task_state) | 2451 | static bool md_in_flight_bios(struct mapped_device *md) |
| 2452 | { | ||
| 2453 | int cpu; | ||
| 2454 | struct hd_struct *part = &dm_disk(md)->part0; | ||
| 2455 | long sum = 0; | ||
| 2456 | |||
| 2457 | for_each_possible_cpu(cpu) { | ||
| 2458 | sum += part_stat_local_read_cpu(part, in_flight[0], cpu); | ||
| 2459 | sum += part_stat_local_read_cpu(part, in_flight[1], cpu); | ||
| 2460 | } | ||
| 2461 | |||
| 2462 | return sum != 0; | ||
| 2463 | } | ||
| 2464 | |||
| 2465 | static int dm_wait_for_bios_completion(struct mapped_device *md, long task_state) | ||
| 2461 | { | 2466 | { |
| 2462 | int r = 0; | 2467 | int r = 0; |
| 2463 | DEFINE_WAIT(wait); | 2468 | DEFINE_WAIT(wait); |
| 2464 | 2469 | ||
| 2465 | while (1) { | 2470 | while (true) { |
| 2466 | prepare_to_wait(&md->wait, &wait, task_state); | 2471 | prepare_to_wait(&md->wait, &wait, task_state); |
| 2467 | 2472 | ||
| 2468 | if (!md_in_flight(md)) | 2473 | if (!md_in_flight_bios(md)) |
| 2469 | break; | 2474 | break; |
| 2470 | 2475 | ||
| 2471 | if (signal_pending_state(task_state, current)) { | 2476 | if (signal_pending_state(task_state, current)) { |
| @@ -2480,6 +2485,28 @@ static int dm_wait_for_completion(struct mapped_device *md, long task_state) · 8 unmodified lines | |||
| 2480 | return r; | 2485 | return r; |
| 2481 | } | 2486 | } |
| 2482 | 2487 | ||
| 2488 | static int dm_wait_for_completion(struct mapped_device *md, long task_state) | ||
| 2489 | { | ||
| 2490 | int r = 0; | ||
| 2491 | |||
| 2492 | if (!queue_is_mq(md->queue)) | ||
| 2493 | return dm_wait_for_bios_completion(md, task_state); | ||
| 2494 | |||
| 2495 | while (true) { | ||
| 2496 | if (!blk_mq_queue_inflight(md->queue)) | ||
| 2497 | break; | ||
| 2498 | |||
| 2499 | if (signal_pending_state(task_state, current)) { | ||
| 2500 | r = -EINTR; | ||
| 2501 | break; | ||
| 2502 | } | ||
| 2503 | |||
| 2504 | msleep(5); | ||
| 2505 | } | ||
| 2506 | |||
| 2507 | return r; | ||
| 2508 | } | ||
| 2509 | |||
| 2483 | /* | 2510 | /* |
| 2484 | * Process the deferred bios | 2511 | * Process the deferred bios |
| 2485 | */ | 2512 | */ |
| @@ -2913,17 +2940,25 @@ EXPORT_SYMBOL_GPL(dm_internal_resume_fast); · 427 unmodified lines | |||
| 2913 | int dm_kobject_uevent(struct mapped_device *md, enum kobject_action action, | 2940 | int dm_kobject_uevent(struct mapped_device *md, enum kobject_action action, |
| 2914 | unsigned cookie) | 2941 | unsigned cookie) |
| 2915 | { | 2942 | { |
| 2943 | int r; | ||
| 2944 | unsigned noio_flag; | ||
| 2916 | char udev_cookie[DM_COOKIE_LENGTH]; | 2945 | char udev_cookie[DM_COOKIE_LENGTH]; |
| 2917 | char *envp[] = { udev_cookie, NULL }; | 2946 | char *envp[] = { udev_cookie, NULL }; |
| 2918 | 2947 | ||
| 2948 | noio_flag = memalloc_noio_save(); | ||
| 2949 | |||
| 2919 | if (!cookie) | 2950 | if (!cookie) |
| 2920 | return kobject_uevent(&disk_to_dev(md->disk)->kobj, action); | 2951 | r = kobject_uevent(&disk_to_dev(md->disk)->kobj, action); |
| 2921 | else { | 2952 | else { |
| 2922 | snprintf(udev_cookie, DM_COOKIE_LENGTH, "%s=%u", | 2953 | snprintf(udev_cookie, DM_COOKIE_LENGTH, "%s=%u", |
| 2923 | DM_COOKIE_ENV_VAR_NAME, cookie); | 2954 | DM_COOKIE_ENV_VAR_NAME, cookie); |
| 2924 | return kobject_uevent_env(&disk_to_dev(md->disk)->kobj, | 2955 | r = kobject_uevent_env(&disk_to_dev(md->disk)->kobj, |
| 2925 | action, envp); | 2956 | action, envp); |
| 2926 | } | 2957 | } |
| 2958 | |||
| 2959 | memalloc_noio_restore(noio_flag); | ||
| 2960 | |||
| 2961 | return r; | ||
| 2927 | } | 2962 | } |
| 2928 | 2963 | ||
| 2929 | uint32_t dm_next_uevent_seq(struct mapped_device *md) | 2964 | uint32_t dm_next_uevent_seq(struct mapped_device *md) |
| @@ -39,8 +39,6 @@ · 38 unmodified lines | |||
| 39 | * Troy Laramy <t-laramy@ti.com> | 39 | * Troy Laramy <t-laramy@ti.com> |
| 40 | */ | 40 | */ |
| 41 | 41 | ||
| 42 | #include <asm/cacheflush.h> | ||
| 43 | |||
| 44 | #include <linux/clk.h> | 42 | #include <linux/clk.h> |
| 45 | #include <linux/clkdev.h> | 43 | #include <linux/clkdev.h> |
| 46 | #include <linux/delay.h> | 44 | #include <linux/delay.h> |
| @@ -18,7 +18,6 @@ · 17 unmodified lines | |||
| 18 | #include <linux/sched.h> | 18 | #include <linux/sched.h> |
| 19 | #include <linux/slab.h> | 19 | #include <linux/slab.h> |
| 20 | #include <linux/vmalloc.h> | 20 | #include <linux/vmalloc.h> |
| 21 | #include <asm/cacheflush.h> | ||
| 22 | 21 | ||
| 23 | #include <media/v4l2-dev.h> | 22 | #include <media/v4l2-dev.h> |
| 24 | #include <media/v4l2-ioctl.h> | 23 | #include <media/v4l2-ioctl.h> |
| @@ -1324,13 +1324,13 @@ mpt_host_page_alloc(MPT_ADAPTER *ioc, pIOCInit_t ioc_init) · 1323 unmodified lines | |||
| 1324 | return 0; /* fw doesn't need any host buffers */ | 1324 | return 0; /* fw doesn't need any host buffers */ |
| 1325 | 1325 | ||
| 1326 | /* spin till we get enough memory */ | 1326 | /* spin till we get enough memory */ |
| 1327 | while(host_page_buffer_sz > 0) { | 1327 | while (host_page_buffer_sz > 0) { |
| 1328 | 1328 | ioc->HostPageBuffer = | |
| 1329 | if((ioc->HostPageBuffer = pci_alloc_consistent( | 1329 | dma_alloc_coherent(&ioc->pcidev->dev, |
| 1330 | ioc->pcidev, | 1330 | host_page_buffer_sz, |
| 1331 | host_page_buffer_sz, | 1331 | &ioc->HostPageBuffer_dma, |
| 1332 | &ioc->HostPageBuffer_dma)) != NULL) { | 1332 | GFP_KERNEL); |
| 1333 | 1333 | if (ioc->HostPageBuffer) { | |
| 1334 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT | 1334 | dinitprintk(ioc, printk(MYIOC_s_DEBUG_FMT |
| 1335 | "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n", | 1335 | "host_page_buffer @ %p, dma @ %x, sz=%d bytes\n", |
| 1336 | ioc->name, ioc->HostPageBuffer, | 1336 | ioc->name, ioc->HostPageBuffer, |
| @@ -2741,8 +2741,8 @@ mpt_adapter_disable(MPT_ADAPTER *ioc) · 1404 unmodified lines | |||
| 2741 | sz = ioc->alloc_sz; | 2741 | sz = ioc->alloc_sz; |
| 2742 | dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free @ %p, sz=%d bytes\n", | 2742 | dexitprintk(ioc, printk(MYIOC_s_INFO_FMT "free @ %p, sz=%d bytes\n", |
| 2743 | ioc->name, ioc->alloc, ioc->alloc_sz)); | 2743 | ioc->name, ioc->alloc, ioc->alloc_sz)); |
| 2744 | pci_free_consistent(ioc->pcidev, sz, | 2744 | dma_free_coherent(&ioc->pcidev->dev, sz, ioc->alloc, |
| 2745 | ioc->alloc, ioc->alloc_dma); | 2745 | ioc->alloc_dma); |
| 2746 | ioc->reply_frames = NULL; | 2746 | ioc->reply_frames = NULL; |
| 2747 | ioc->req_frames = NULL; | 2747 | ioc->req_frames = NULL; |
| 2748 | ioc->alloc = NULL; | 2748 | ioc->alloc = NULL; |
| @@ -2751,8 +2751,8 @@ mpt_adapter_disable(MPT_ADAPTER *ioc) · 2 unmodified lines | |||
| 2751 | 2751 | ||
| 2752 | if (ioc->sense_buf_pool != NULL) { | 2752 | if (ioc->sense_buf_pool != NULL) { |
| 2753 | sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC); | 2753 | sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC); |
| 2754 | pci_free_consistent(ioc->pcidev, sz, | 2754 | dma_free_coherent(&ioc->pcidev->dev, sz, ioc->sense_buf_pool, |
| 2755 | ioc->sense_buf_pool, ioc->sense_buf_pool_dma); | 2755 | ioc->sense_buf_pool_dma); |
| 2756 | ioc->sense_buf_pool = NULL; | 2756 | ioc->sense_buf_pool = NULL; |
| 2757 | ioc->alloc_total -= sz; | 2757 | ioc->alloc_total -= sz; |
| 2758 | } | 2758 | } |
| @@ -2802,7 +2802,7 @@ mpt_adapter_disable(MPT_ADAPTER *ioc) · 43 unmodified lines | |||
| 2802 | "HostPageBuffer free @ %p, sz=%d bytes\n", | 2802 | "HostPageBuffer free @ %p, sz=%d bytes\n", |
| 2803 | ioc->name, ioc->HostPageBuffer, | 2803 | ioc->name, ioc->HostPageBuffer, |
| 2804 | ioc->HostPageBuffer_sz)); | 2804 | ioc->HostPageBuffer_sz)); |
| 2805 | pci_free_consistent(ioc->pcidev, ioc->HostPageBuffer_sz, | 2805 | dma_free_coherent(&ioc->pcidev->dev, ioc->HostPageBuffer_sz, |
| 2806 | ioc->HostPageBuffer, ioc->HostPageBuffer_dma); | 2806 | ioc->HostPageBuffer, ioc->HostPageBuffer_dma); |
| 2807 | ioc->HostPageBuffer = NULL; | 2807 | ioc->HostPageBuffer = NULL; |
| 2808 | ioc->HostPageBuffer_sz = 0; | 2808 | ioc->HostPageBuffer_sz = 0; |
| @@ -4497,7 +4497,8 @@ PrimeIocFifos(MPT_ADAPTER *ioc) · 1688 unmodified lines | |||
| 4497 | ioc->name, sz, sz, num_chain)); | 4497 | ioc->name, sz, sz, num_chain)); |
| 4498 | 4498 | ||
| 4499 | total_size += sz; | 4499 | total_size += sz; |
| 4500 | mem = pci_alloc_consistent(ioc->pcidev, total_size, &alloc_dma); | 4500 | mem = dma_alloc_coherent(&ioc->pcidev->dev, total_size, |
| 4501 | &alloc_dma, GFP_KERNEL); | ||
| 4501 | if (mem == NULL) { | 4502 | if (mem == NULL) { |
| 4502 | printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n", | 4503 | printk(MYIOC_s_ERR_FMT "Unable to allocate Reply, Request, Chain Buffers!\n", |
| 4503 | ioc->name); | 4504 | ioc->name); |
| @@ -4574,8 +4575,8 @@ PrimeIocFifos(MPT_ADAPTER *ioc) · 70 unmodified lines | |||
| 4574 | spin_unlock_irqrestore(&ioc->FreeQlock, flags); | 4575 | spin_unlock_irqrestore(&ioc->FreeQlock, flags); |
| 4575 | 4576 | ||
| 4576 | sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC); | 4577 | sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC); |
| 4577 | ioc->sense_buf_pool = | 4578 | ioc->sense_buf_pool = dma_alloc_coherent(&ioc->pcidev->dev, sz, |
| 4578 | pci_alloc_consistent(ioc->pcidev, sz, &ioc->sense_buf_pool_dma); | 4579 | &ioc->sense_buf_pool_dma, GFP_KERNEL); |
| 4579 | if (ioc->sense_buf_pool == NULL) { | 4580 | if (ioc->sense_buf_pool == NULL) { |
| 4580 | printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n", | 4581 | printk(MYIOC_s_ERR_FMT "Unable to allocate Sense Buffers!\n", |
| 4581 | ioc->name); | 4582 | ioc->name); |
| @@ -4613,18 +4614,16 @@ out_fail: · 31 unmodified lines | |||
| 4613 | 4614 | ||
| 4614 | if (ioc->alloc != NULL) { | 4615 | if (ioc->alloc != NULL) { |
| 4615 | sz = ioc->alloc_sz; | 4616 | sz = ioc->alloc_sz; |
| 4616 | pci_free_consistent(ioc->pcidev, | 4617 | dma_free_coherent(&ioc->pcidev->dev, sz, ioc->alloc, |
| 4617 | sz, | 4618 | ioc->alloc_dma); |
| 4618 | ioc->alloc, ioc->alloc_dma); | ||
| 4619 | ioc->reply_frames = NULL; | 4619 | ioc->reply_frames = NULL; |
| 4620 | ioc->req_frames = NULL; | 4620 | ioc->req_frames = NULL; |
| 4621 | ioc->alloc_total -= sz; | 4621 | ioc->alloc_total -= sz; |
| 4622 | } | 4622 | } |
| 4623 | if (ioc->sense_buf_pool != NULL) { | 4623 | if (ioc->sense_buf_pool != NULL) { |
| 4624 | sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC); | 4624 | sz = (ioc->req_depth * MPT_SENSE_BUFFER_ALLOC); |
| 4625 | pci_free_consistent(ioc->pcidev, | 4625 | dma_free_coherent(&ioc->pcidev->dev, sz, ioc->sense_buf_pool, |
| 4626 | sz, | 4626 | ioc->sense_buf_pool_dma); |
| 4627 | ioc->sense_buf_pool, ioc->sense_buf_pool_dma); | ||
| 4628 | ioc->sense_buf_pool = NULL; | 4627 | ioc->sense_buf_pool = NULL; |
| 4629 | } | 4628 | } |
| 4630 | 4629 | ||
| @@ -118,8 +118,6 @@ int mptscsih_suspend(struct pci_dev *pdev, pm_message_t state); · 117 unmodified lines | |||
| 118 | int mptscsih_resume(struct pci_dev *pdev); | 118 | int mptscsih_resume(struct pci_dev *pdev); |
| 119 | #endif | 119 | #endif |
| 120 | 120 | ||
| 121 | #define SNS_LEN(scp) SCSI_SENSE_BUFFERSIZE | ||
| 122 | |||
| 123 | 121 | ||
| 124 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ | 122 | /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/ |
| 125 | /* | 123 | /* |
| @@ -2422,7 +2420,7 @@ mptscsih_copy_sense_data(struct scsi_cmnd *sc, MPT_SCSI_HOST *hd, MPT_FRAME_HDR · 2296 unmodified lines | |||
| 2422 | /* Copy the sense received into the scsi command block. */ | 2420 | /* Copy the sense received into the scsi command block. */ |
| 2423 | req_index = le16_to_cpu(mf->u.frame.hwhdr.msgctxu.fld.req_idx); | 2421 | req_index = le16_to_cpu(mf->u.frame.hwhdr.msgctxu.fld.req_idx); |
| 2424 | sense_data = ((u8 *)ioc->sense_buf_pool + (req_index * MPT_SENSE_BUFFER_ALLOC)); | 2422 | sense_data = ((u8 *)ioc->sense_buf_pool + (req_index * MPT_SENSE_BUFFER_ALLOC)); |
| 2425 | memcpy(sc->sense_buffer, sense_data, SNS_LEN(sc)); | 2423 | memcpy(sc->sense_buffer, sense_data, MPT_SENSE_BUFFER_ALLOC); |
| 2426 | 2424 | ||
| 2427 | /* Log SMART data (asc = 0x5D, non-IM case only) if required. | 2425 | /* Log SMART data (asc = 0x5D, non-IM case only) if required. |
| 2428 | */ | 2426 | */ |
| @@ -142,10 +142,11 @@ static int ioc3_irq_domain_setup(struct ioc3_priv_data *ipd, int irq) · 141 unmodified lines | |||
| 142 | goto err; | 142 | goto err; |
| 143 | 143 | ||
| 144 | domain = irq_domain_create_linear(fn, 24, &ioc3_irq_domain_ops, ipd); | 144 | domain = irq_domain_create_linear(fn, 24, &ioc3_irq_domain_ops, ipd); |
| 145 | if (!domain) | 145 | if (!domain) { |
| 146 | irq_domain_free_fwnode(fn); | ||
| 146 | goto err; | 147 | goto err; |
| 148 | } | ||
| 147 | 149 | ||
| 148 | irq_domain_free_fwnode(fn); | ||
| 149 | ipd->domain = domain; | 150 | ipd->domain = domain; |
| 150 | 151 | ||
| 151 | irq_set_chained_handler_and_data(irq, ioc3_irq_handler, domain); | 152 | irq_set_chained_handler_and_data(irq, ioc3_irq_handler, domain); |
| @@ -10,7 +10,7 @@ · 9 unmodified lines | |||
| 10 | #include <linux/clk.h> | 10 | #include <linux/clk.h> |
| 11 | #include <linux/err.h> | 11 | #include <linux/err.h> |
| 12 | #include <linux/io.h> | 12 | #include <linux/io.h> |
| 13 | #include <linux/spinlock.h> | 13 | #include <linux/mutex.h> |
| 14 | #include <linux/atmel-ssc.h> | 14 | #include <linux/atmel-ssc.h> |
| 15 | #include <linux/slab.h> | 15 | #include <linux/slab.h> |
| 16 | #include <linux/module.h> | 16 | #include <linux/module.h> |
| @@ -20,7 +20,7 @@ · 3 unmodified lines | |||
| 20 | #include "../../sound/soc/atmel/atmel_ssc_dai.h" | 20 | #include "../../sound/soc/atmel/atmel_ssc_dai.h" |
| 21 | 21 | ||
| 22 | /* Serialize access to ssc_list and user count */ | 22 | /* Serialize access to ssc_list and user count */ |
| 23 | static DEFINE_SPINLOCK(user_lock); | 23 | static DEFINE_MUTEX(user_lock); |
| 24 | static LIST_HEAD(ssc_list); | 24 | static LIST_HEAD(ssc_list); |
| 25 | 25 | ||
| 26 | struct ssc_device *ssc_request(unsigned int ssc_num) | 26 | struct ssc_device *ssc_request(unsigned int ssc_num) |
| @@ -28,7 +28,7 @@ struct ssc_device *ssc_request(unsigned int ssc_num) · 1 unmodified line | |||
| 28 | int ssc_valid = 0; | 28 | int ssc_valid = 0; |
| 29 | struct ssc_device *ssc; | 29 | struct ssc_device *ssc; |
| 30 | 30 | ||
| 31 | spin_lock(&user_lock); | 31 | mutex_lock(&user_lock); |
| 32 | list_for_each_entry(ssc, &ssc_list, list) { | 32 | list_for_each_entry(ssc, &ssc_list, list) { |
| 33 | if (ssc->pdev->dev.of_node) { | 33 | if (ssc->pdev->dev.of_node) { |
| 34 | if (of_alias_get_id(ssc->pdev->dev.of_node, "ssc") | 34 | if (of_alias_get_id(ssc->pdev->dev.of_node, "ssc") |
| @@ -44,18 +44,18 @@ struct ssc_device *ssc_request(unsigned int ssc_num) · 9 unmodified lines | |||
| 44 | } | 44 | } |
| 45 | 45 | ||
| 46 | if (!ssc_valid) { | 46 | if (!ssc_valid) { |
| 47 | spin_unlock(&user_lock); | 47 | mutex_unlock(&user_lock); |
| 48 | pr_err("ssc: ssc%d platform device is missing\n", ssc_num); | 48 | pr_err("ssc: ssc%d platform device is missing\n", ssc_num); |
| 49 | return ERR_PTR(-ENODEV); | 49 | return ERR_PTR(-ENODEV); |
| 50 | } | 50 | } |
| 51 | 51 | ||
| 52 | if (ssc->user) { | 52 | if (ssc->user) { |
| 53 | spin_unlock(&user_lock); | 53 | mutex_unlock(&user_lock); |
| 54 | dev_dbg(&ssc->pdev->dev, "module busy\n"); | 54 | dev_dbg(&ssc->pdev->dev, "module busy\n"); |
| 55 | return ERR_PTR(-EBUSY); | 55 | return ERR_PTR(-EBUSY); |
| 56 | } | 56 | } |
| 57 | ssc->user++; | 57 | ssc->user++; |
| 58 | spin_unlock(&user_lock); | 58 | mutex_unlock(&user_lock); |
| 59 | 59 | ||
| 60 | clk_prepare(ssc->clk); | 60 | clk_prepare(ssc->clk); |
| 61 | 61 | ||
| @@ -67,14 +67,14 @@ void ssc_free(struct ssc_device *ssc) · 5 unmodified lines | |||
| 67 | { | 67 | { |
| 68 | bool disable_clk = true; | 68 | bool disable_clk = true; |
| 69 | 69 | ||
| 70 | spin_lock(&user_lock); | 70 | mutex_lock(&user_lock); |
| 71 | if (ssc->user) | 71 | if (ssc->user) |
| 72 | ssc->user--; | 72 | ssc->user--; |
| 73 | else { | 73 | else { |
| 74 | disable_clk = false; | 74 | disable_clk = false; |
| 75 | dev_dbg(&ssc->pdev->dev, "device already free\n"); | 75 | dev_dbg(&ssc->pdev->dev, "device already free\n"); |
| 76 | } | 76 | } |
| 77 | spin_unlock(&user_lock); | 77 | mutex_unlock(&user_lock); |
| 78 | 78 | ||
| 79 | if (disable_clk) | 79 | if (disable_clk) |
| 80 | clk_unprepare(ssc->clk); | 80 | clk_unprepare(ssc->clk); |
| @@ -237,9 +237,9 @@ static int ssc_probe(struct platform_device *pdev) · 156 unmodified lines | |||
| 237 | return -ENXIO; | 237 | return -ENXIO; |
| 238 | } | 238 | } |
| 239 | 239 | ||
| 240 | spin_lock(&user_lock); | 240 | mutex_lock(&user_lock); |
| 241 | list_add_tail(&ssc->list, &ssc_list); | 241 | list_add_tail(&ssc->list, &ssc_list); |
| 242 | spin_unlock(&user_lock); | 242 | mutex_unlock(&user_lock); |
| 243 | 243 | ||
| 244 | platform_set_drvdata(pdev, ssc); | 244 | platform_set_drvdata(pdev, ssc); |
| 245 | 245 | ||
| @@ -258,9 +258,9 @@ static int ssc_remove(struct platform_device *pdev) · 12 unmodified lines | |||
| 258 | 258 | ||
| 259 | ssc_sound_dai_remove(ssc); | 259 | ssc_sound_dai_remove(ssc); |
| 260 | 260 | ||
| 261 | spin_lock(&user_lock); | 261 | mutex_lock(&user_lock); |
| 262 | list_del(&ssc->list); | 262 | list_del(&ssc->list); |
| 263 | spin_unlock(&user_lock); | 263 | mutex_unlock(&user_lock); |
| 264 | 264 | ||
| 265 | return 0; | 265 | return 0; |
| 266 | } | 266 | } |
| @@ -62,6 +62,12 @@ static void hl_fence_release(struct dma_fence *fence) · 61 unmodified lines | |||
| 62 | container_of(fence, struct hl_cs_compl, base_fence); | 62 | container_of(fence, struct hl_cs_compl, base_fence); |
| 63 | struct hl_device *hdev = hl_cs_cmpl->hdev; | 63 | struct hl_device *hdev = hl_cs_cmpl->hdev; |
| 64 | 64 | ||
| 65 | /* EBUSY means the CS was never submitted and hence we don't have | ||
| 66 | * an attached hw_sob object that we should handle here | ||
| 67 | */ | ||
| 68 | if (fence->error == -EBUSY) | ||
| 69 | goto free; | ||
| 70 | |||
| 65 | if ((hl_cs_cmpl->type == CS_TYPE_SIGNAL) || | 71 | if ((hl_cs_cmpl->type == CS_TYPE_SIGNAL) || |
| 66 | (hl_cs_cmpl->type == CS_TYPE_WAIT)) { | 72 | (hl_cs_cmpl->type == CS_TYPE_WAIT)) { |
| 67 | 73 | ||
| @@ -92,6 +98,7 @@ static void hl_fence_release(struct dma_fence *fence) · 24 unmodified lines | |||
| 92 | kref_put(&hl_cs_cmpl->hw_sob->kref, hl_sob_reset); | 98 | kref_put(&hl_cs_cmpl->hw_sob->kref, hl_sob_reset); |
| 93 | } | 99 | } |
| 94 | 100 | ||
| 101 | free: | ||
| 95 | kfree_rcu(hl_cs_cmpl, base_fence.rcu); | 102 | kfree_rcu(hl_cs_cmpl, base_fence.rcu); |
| 96 | } | 103 | } |
| 97 | 104 | ||
| @@ -328,10 +335,16 @@ static void cs_do_release(struct kref *ref) · 230 unmodified lines | |||
| 328 | 335 | ||
| 329 | hl_ctx_put(cs->ctx); | 336 | hl_ctx_put(cs->ctx); |
| 330 | 337 | ||
| 338 | /* We need to mark an error for not submitted because in that case | ||
| 339 | * the dma fence release flow is different. Mainly, we don't need | ||
| 340 | * to handle hw_sob for signal/wait | ||
| 341 | */ | ||
| 331 | if (cs->timedout) | 342 | if (cs->timedout) |
| 332 | dma_fence_set_error(cs->fence, -ETIMEDOUT); | 343 | dma_fence_set_error(cs->fence, -ETIMEDOUT); |
| 333 | else if (cs->aborted) | 344 | else if (cs->aborted) |
| 334 | dma_fence_set_error(cs->fence, -EIO); | 345 | dma_fence_set_error(cs->fence, -EIO); |
| 346 | else if (!cs->submitted) | ||
| 347 | dma_fence_set_error(cs->fence, -EBUSY); | ||
| 335 | 348 | ||
| 336 | dma_fence_signal(cs->fence); | 349 | dma_fence_signal(cs->fence); |
| 337 | dma_fence_put(cs->fence); | 350 | dma_fence_put(cs->fence); |
| @@ -480,7 +480,7 @@ out: · 479 unmodified lines | |||
| 480 | return 0; | 480 | return 0; |
| 481 | } | 481 | } |
| 482 | 482 | ||
| 483 | static ssize_t mmu_write(struct file *file, const char __user *buf, | 483 | static ssize_t mmu_asid_va_write(struct file *file, const char __user *buf, |
| 484 | size_t count, loff_t *f_pos) | 484 | size_t count, loff_t *f_pos) |
| 485 | { | 485 | { |
| 486 | struct seq_file *s = file->private_data; | 486 | struct seq_file *s = file->private_data; |
| @@ -1125,7 +1125,7 @@ static const struct hl_info_list hl_debugfs_list[] = { · 638 unmodified lines | |||
| 1125 | {"command_submission_jobs", command_submission_jobs_show, NULL}, | 1125 | {"command_submission_jobs", command_submission_jobs_show, NULL}, |
| 1126 | {"userptr", userptr_show, NULL}, | 1126 | {"userptr", userptr_show, NULL}, |
| 1127 | {"vm", vm_show, NULL}, | 1127 | {"vm", vm_show, NULL}, |
| 1128 | {"mmu", mmu_show, mmu_write}, | 1128 | {"mmu", mmu_show, mmu_asid_va_write}, |
| 1129 | {"engines", engines_show, NULL} | 1129 | {"engines", engines_show, NULL} |
| 1130 | }; | 1130 | }; |
| 1131 | 1131 | ||
| @@ -96,7 +96,7 @@ · 95 unmodified lines | |||
| 96 | 96 | ||
| 97 | #define GAUDI_NUM_OF_QM_ARB_ERR_CAUSE 3 | 97 | #define GAUDI_NUM_OF_QM_ARB_ERR_CAUSE 3 |
| 98 | 98 | ||
| 99 | #define GAUDI_ARB_WDT_TIMEOUT 0x400000 | 99 | #define GAUDI_ARB_WDT_TIMEOUT 0x1000000 |
| 100 | 100 | ||
| 101 | static const char gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = { | 101 | static const char gaudi_irq_name[GAUDI_MSI_ENTRIES][GAUDI_MAX_STRING_LEN] = { |
| 102 | "gaudi cq 0_0", "gaudi cq 0_1", "gaudi cq 0_2", "gaudi cq 0_3", | 102 | "gaudi cq 0_0", "gaudi cq 0_1", "gaudi cq 0_2", "gaudi cq 0_3", |
| @@ -1893,6 +1893,8 @@ static void gaudi_init_pci_dma_qman(struct hl_device *hdev, int dma_id, · 1790 unmodified lines | |||
| 1893 | WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 + q_off, so_base_ws_lo); | 1893 | WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_LO_0 + q_off, so_base_ws_lo); |
| 1894 | WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_0 + q_off, so_base_ws_hi); | 1894 | WREG32(mmDMA0_QM_CP_MSG_BASE3_ADDR_HI_0 + q_off, so_base_ws_hi); |
| 1895 | 1895 | ||
| 1896 | WREG32(mmDMA0_QM_CP_BARRIER_CFG_0 + q_off, 0x100); | ||
| 1897 | |||
| 1896 | /* The following configuration is needed only once per QMAN */ | 1898 | /* The following configuration is needed only once per QMAN */ |
| 1897 | if (qman_id == 0) { | 1899 | if (qman_id == 0) { |
| 1898 | /* Configure RAZWI IRQ */ | 1900 | /* Configure RAZWI IRQ */ |
| @@ -2725,6 +2727,12 @@ static int gaudi_mmu_init(struct hl_device *hdev) · 826 unmodified lines | |||
| 2725 | WREG32(mmSTLB_HOP_CONFIGURATION, | 2727 | WREG32(mmSTLB_HOP_CONFIGURATION, |
| 2726 | hdev->mmu_huge_page_opt ? 0x30440 : 0x40440); | 2728 | hdev->mmu_huge_page_opt ? 0x30440 : 0x40440); |
| 2727 | 2729 | ||
| 2730 | /* | ||
| 2731 | * The H/W expects the first PI after init to be 1. After wraparound | ||
| 2732 | * we'll write 0. | ||
| 2733 | */ | ||
| 2734 | gaudi->mmu_cache_inv_pi = 1; | ||
| 2735 | |||
| 2728 | gaudi->hw_cap_initialized |= HW_CAP_MMU; | 2736 | gaudi->hw_cap_initialized |= HW_CAP_MMU; |
| 2729 | 2737 | ||
| 2730 | return 0; | 2738 | return 0; |
| @@ -3790,6 +3798,25 @@ static int gaudi_validate_dma_pkt_no_mmu(struct hl_device *hdev, · 1059 unmodified lines | |||
| 3790 | src_in_host); | 3798 | src_in_host); |
| 3791 | } | 3799 | } |
| 3792 | 3800 | ||
| 3801 | static int gaudi_validate_load_and_exe_pkt(struct hl_device *hdev, | ||
| 3802 | struct hl_cs_parser *parser, | ||
| 3803 | struct packet_load_and_exe *user_pkt) | ||
| 3804 | { | ||
| 3805 | u32 cfg; | ||
| 3806 | |||
| 3807 | cfg = le32_to_cpu(user_pkt->cfg); | ||
| 3808 | |||
| 3809 | if (cfg & GAUDI_PKT_LOAD_AND_EXE_CFG_DST_MASK) { | ||
| 3810 | dev_err(hdev->dev, | ||
| 3811 | "User not allowed to use Load and Execute\n"); | ||
| 3812 | return -EPERM; | ||
| 3813 | } | ||
| 3814 | |||
| 3815 | parser->patched_cb_size += sizeof(struct packet_load_and_exe); | ||
| 3816 | |||
| 3817 | return 0; | ||
| 3818 | } | ||
| 3819 | |||
| 3793 | static int gaudi_validate_cb(struct hl_device *hdev, | 3820 | static int gaudi_validate_cb(struct hl_device *hdev, |
| 3794 | struct hl_cs_parser *parser, bool is_mmu) | 3821 | struct hl_cs_parser *parser, bool is_mmu) |
| 3795 | { | 3822 | { |
| @@ -3838,6 +3865,11 @@ static int gaudi_validate_cb(struct hl_device *hdev, · 42 unmodified lines | |||
| 3838 | rc = -EPERM; | 3865 | rc = -EPERM; |
| 3839 | break; | 3866 | break; |
| 3840 | 3867 | ||
| 3868 | case PACKET_LOAD_AND_EXE: | ||
| 3869 | rc = gaudi_validate_load_and_exe_pkt(hdev, parser, | ||
| 3870 | (struct packet_load_and_exe *) user_pkt); | ||
| 3871 | break; | ||
| 3872 | |||
| 3841 | case PACKET_LIN_DMA: | 3873 | case PACKET_LIN_DMA: |
| 3842 | parser->contains_dma_pkt = true; | 3874 | parser->contains_dma_pkt = true; |
| 3843 | if (is_mmu) | 3875 | if (is_mmu) |
| @@ -3855,7 +3887,6 @@ static int gaudi_validate_cb(struct hl_device *hdev, · 11 unmodified lines | |||
| 3855 | case PACKET_FENCE: | 3887 | case PACKET_FENCE: |
| 3856 | case PACKET_NOP: | 3888 | case PACKET_NOP: |
| 3857 | case PACKET_ARB_POINT: | 3889 | case PACKET_ARB_POINT: |
| 3858 | case PACKET_LOAD_AND_EXE: | ||
| 3859 | parser->patched_cb_size += pkt_size; | 3890 | parser->patched_cb_size += pkt_size; |
| 3860 | break; | 3891 | break; |
| 3861 | 3892 | ||
| @@ -5994,6 +6025,8 @@ static int gaudi_mmu_invalidate_cache(struct hl_device *hdev, bool is_hard, · 2132 unmodified lines | |||
| 5994 | mutex_lock(&hdev->mmu_cache_lock); | 6025 | mutex_lock(&hdev->mmu_cache_lock); |
| 5995 | 6026 | ||
| 5996 | /* L0 & L1 invalidation */ | 6027 | /* L0 & L1 invalidation */ |
| 6028 | WREG32(mmSTLB_INV_PS, 3); | ||
| 6029 | WREG32(mmSTLB_CACHE_INV, gaudi->mmu_cache_inv_pi++); | ||
| 5997 | WREG32(mmSTLB_INV_PS, 2); | 6030 | WREG32(mmSTLB_INV_PS, 2); |
| 5998 | 6031 | ||
| 5999 | rc = hl_poll_timeout( | 6032 | rc = hl_poll_timeout( |
| @@ -229,6 +229,8 @@ struct gaudi_internal_qman_info { · 228 unmodified lines | |||
| 229 | * @multi_msi_mode: whether we are working in multi MSI single MSI mode. | 229 | * @multi_msi_mode: whether we are working in multi MSI single MSI mode. |
| 230 | * Multi MSI is possible only with IOMMU enabled. | 230 | * Multi MSI is possible only with IOMMU enabled. |
| 231 | * @ext_queue_idx: helper index for external queues initialization. | 231 | * @ext_queue_idx: helper index for external queues initialization. |
| 232 | * @mmu_cache_inv_pi: PI for MMU cache invalidation flow. The H/W expects an | ||
| 233 | * 8-bit value so use u8. | ||
| 232 | */ | 234 | */ |
| 233 | struct gaudi_device { | 235 | struct gaudi_device { |
| 234 | int (*armcp_info_get)(struct hl_device *hdev); | 236 | int (*armcp_info_get)(struct hl_device *hdev); |
| @@ -248,6 +250,7 @@ struct gaudi_device { · 13 unmodified lines | |||
| 248 | u32 hw_cap_initialized; | 250 | u32 hw_cap_initialized; |
| 249 | u8 multi_msi_mode; | 251 | u8 multi_msi_mode; |
| 250 | u8 ext_queue_idx; | 252 | u8 ext_queue_idx; |
| 253 | u8 mmu_cache_inv_pi; | ||
| 251 | }; | 254 | }; |
| 252 | 255 | ||
| 253 | void gaudi_init_security(struct hl_device *hdev); | 256 | void gaudi_init_security(struct hl_device *hdev); |
| @@ -197,6 +197,9 @@ struct packet_wait { · 196 unmodified lines | |||
| 197 | __le32 ctl; | 197 | __le32 ctl; |
| 198 | }; | 198 | }; |
| 199 | 199 | ||
| 200 | #define GAUDI_PKT_LOAD_AND_EXE_CFG_DST_SHIFT 0 | ||
| 201 | #define GAUDI_PKT_LOAD_AND_EXE_CFG_DST_MASK 0x00000001 | ||
| 202 | |||
| 200 | struct packet_load_and_exe { | 203 | struct packet_load_and_exe { |
| 201 | __le32 cfg; | 204 | __le32 cfg; |
| 202 | __le32 ctl; | 205 | __le32 ctl; |
| @@ -745,9 +745,8 @@ static int mei_cl_device_remove(struct device *dev) · 744 unmodified lines | |||
| 745 | 745 | ||
| 746 | mei_cl_bus_module_put(cldev); | 746 | mei_cl_bus_module_put(cldev); |
| 747 | module_put(THIS_MODULE); | 747 | module_put(THIS_MODULE); |
| 748 | dev->driver = NULL; | ||
| 749 | return ret; | ||
| 750 | 748 | ||
| 749 | return ret; | ||
| 751 | } | 750 | } |
| 752 | 751 | ||
| 753 | static ssize_t name_show(struct device *dev, struct device_attribute *a, | 752 | static ssize_t name_show(struct device *dev, struct device_attribute *a, |
| @@ -94,6 +94,7 @@ · 93 unmodified lines | |||
| 94 | #define MEI_DEV_ID_JSP_N 0x4DE0 /* Jasper Lake Point N */ | 94 | #define MEI_DEV_ID_JSP_N 0x4DE0 /* Jasper Lake Point N */ |
| 95 | 95 | ||
| 96 | #define MEI_DEV_ID_TGP_LP 0xA0E0 /* Tiger Lake Point LP */ | 96 | #define MEI_DEV_ID_TGP_LP 0xA0E0 /* Tiger Lake Point LP */ |
| 97 | #define MEI_DEV_ID_TGP_H 0x43E0 /* Tiger Lake Point H */ | ||
| 97 | 98 | ||
| 98 | #define MEI_DEV_ID_MCC 0x4B70 /* Mule Creek Canyon (EHL) */ | 99 | #define MEI_DEV_ID_MCC 0x4B70 /* Mule Creek Canyon (EHL) */ |
| 99 | #define MEI_DEV_ID_MCC_4 0x4B75 /* Mule Creek Canyon 4 (EHL) */ | 100 | #define MEI_DEV_ID_MCC_4 0x4B75 /* Mule Creek Canyon 4 (EHL) */ |
| @@ -107,6 +108,8 @@ · 7 unmodified lines | |||
| 107 | # define PCI_CFG_HFS_1_D0I3_MSK 0x80000000 | 108 | # define PCI_CFG_HFS_1_D0I3_MSK 0x80000000 |
| 108 | #define PCI_CFG_HFS_2 0x48 | 109 | #define PCI_CFG_HFS_2 0x48 |
| 109 | #define PCI_CFG_HFS_3 0x60 | 110 | #define PCI_CFG_HFS_3 0x60 |
| 111 | # define PCI_CFG_HFS_3_FW_SKU_MSK 0x00000070 | ||
| 112 | # define PCI_CFG_HFS_3_FW_SKU_SPS 0x00000060 | ||
| 110 | #define PCI_CFG_HFS_4 0x64 | 113 | #define PCI_CFG_HFS_4 0x64 |
| 111 | #define PCI_CFG_HFS_5 0x68 | 114 | #define PCI_CFG_HFS_5 0x68 |
| 112 | #define PCI_CFG_HFS_6 0x6C | 115 | #define PCI_CFG_HFS_6 0x6C |
| @@ -1366,7 +1366,7 @@ static bool mei_me_fw_type_nm(struct pci_dev *pdev) · 1365 unmodified lines | |||
| 1366 | #define MEI_CFG_FW_NM \ | 1366 | #define MEI_CFG_FW_NM \ |
| 1367 | .quirk_probe = mei_me_fw_type_nm | 1367 | .quirk_probe = mei_me_fw_type_nm |
| 1368 | 1368 | ||
| 1369 | static bool mei_me_fw_type_sps(struct pci_dev *pdev) | 1369 | static bool mei_me_fw_type_sps_4(struct pci_dev *pdev) |
| 1370 | { | 1370 | { |
| 1371 | u32 reg; | 1371 | u32 reg; |
| 1372 | unsigned int devfn; | 1372 | unsigned int devfn; |
| @@ -1382,7 +1382,36 @@ static bool mei_me_fw_type_sps(struct pci_dev *pdev) · 9 unmodified lines | |||
| 1382 | return (reg & 0xf0000) == 0xf0000; | 1382 | return (reg & 0xf0000) == 0xf0000; |
| 1383 | } | 1383 | } |
| 1384 | 1384 | ||
| 1385 | #define MEI_CFG_FW_SPS \ | 1385 | #define MEI_CFG_FW_SPS_4 \ |
| 1386 | .quirk_probe = mei_me_fw_type_sps_4 | ||
| 1387 | |||
| 1388 | /** | ||
| 1389 | * mei_me_fw_sku_sps() - check for sps sku | ||
| 1390 | * | ||
| 1391 | * Read ME FW Status register to check for SPS Firmware. | ||
| 1392 | * The SPS FW is only signaled in pci function 0 | ||
| 1393 | * | ||
| 1394 | * @pdev: pci device | ||
| 1395 | * | ||
| 1396 | * Return: true in case of SPS firmware | ||
| 1397 | */ | ||
| 1398 | static bool mei_me_fw_type_sps(struct pci_dev *pdev) | ||
| 1399 | { | ||
| 1400 | u32 reg; | ||
| 1401 | u32 fw_type; | ||
| 1402 | unsigned int devfn; | ||
| 1403 | |||
| 1404 | devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0); | ||
| 1405 | pci_bus_read_config_dword(pdev->bus, devfn, PCI_CFG_HFS_3, ®); | ||
| 1406 | trace_mei_pci_cfg_read(&pdev->dev, "PCI_CFG_HFS_3", PCI_CFG_HFS_3, reg); | ||
| 1407 | fw_type = (reg & PCI_CFG_HFS_3_FW_SKU_MSK); | ||
| 1408 | |||
| 1409 | dev_dbg(&pdev->dev, "fw type is %d\n", fw_type); | ||
| 1410 | |||
| 1411 | return fw_type == PCI_CFG_HFS_3_FW_SKU_SPS; | ||
| 1412 | } | ||
| 1413 | |||
| 1414 | #define MEI_CFG_FW_SPS \ | ||
| 1386 | .quirk_probe = mei_me_fw_type_sps | 1415 | .quirk_probe = mei_me_fw_type_sps |
| 1387 | 1416 | ||
| 1388 | #define MEI_CFG_FW_VER_SUPP \ | 1417 | #define MEI_CFG_FW_VER_SUPP \ |
| @@ -1452,10 +1481,17 @@ static const struct mei_cfg mei_me_pch8_cfg = { · 63 unmodified lines | |||
| 1452 | }; | 1481 | }; |
| 1453 | 1482 | ||
| 1454 | /* PCH8 Lynx Point with quirk for SPS Firmware exclusion */ | 1483 | /* PCH8 Lynx Point with quirk for SPS Firmware exclusion */ |
| 1455 | static const struct mei_cfg mei_me_pch8_sps_cfg = { | 1484 | static const struct mei_cfg mei_me_pch8_sps_4_cfg = { |
| 1456 | MEI_CFG_PCH8_HFS, | 1485 | MEI_CFG_PCH8_HFS, |
| 1457 | MEI_CFG_FW_VER_SUPP, | 1486 | MEI_CFG_FW_VER_SUPP, |
| 1458 | MEI_CFG_FW_SPS, | 1487 | MEI_CFG_FW_SPS_4, |
| 1488 | }; | ||
| 1489 | |||
| 1490 | /* LBG with quirk for SPS (4.0) Firmware exclusion */ | ||
| 1491 | static const struct mei_cfg mei_me_pch12_sps_4_cfg = { | ||
| 1492 | MEI_CFG_PCH8_HFS, | ||
| 1493 | MEI_CFG_FW_VER_SUPP, | ||
| 1494 | MEI_CFG_FW_SPS_4, | ||
| 1459 | }; | 1495 | }; |
| 1460 | 1496 | ||
| 1461 | /* Cannon Lake and newer devices */ | 1497 | /* Cannon Lake and newer devices */ |
| @@ -1465,8 +1501,18 @@ static const struct mei_cfg mei_me_pch12_cfg = { · 3 unmodified lines | |||
| 1465 | MEI_CFG_DMA_128, | 1501 | MEI_CFG_DMA_128, |
| 1466 | }; | 1502 | }; |
| 1467 | 1503 | ||
| 1468 | /* LBG with quirk for SPS Firmware exclusion */ | 1504 | /* Cannon Lake with quirk for SPS 5.0 and newer Firmware exclusion */ |
| 1469 | static const struct mei_cfg mei_me_pch12_sps_cfg = { | 1505 | static const struct mei_cfg mei_me_pch12_sps_cfg = { |
| 1506 | MEI_CFG_PCH8_HFS, | ||
| 1507 | MEI_CFG_FW_VER_SUPP, | ||
| 1508 | MEI_CFG_DMA_128, | ||
| 1509 | MEI_CFG_FW_SPS, | ||
| 1510 | }; | ||
| 1511 | |||
| 1512 | /* Cannon Lake with quirk for SPS 5.0 and newer Firmware exclusion | ||
| 1513 | * w/o DMA support | ||
| 1514 | */ | ||
| 1515 | static const struct mei_cfg mei_me_pch12_nodma_sps_cfg = { | ||
| 1470 | MEI_CFG_PCH8_HFS, | 1516 | MEI_CFG_PCH8_HFS, |
| 1471 | MEI_CFG_FW_VER_SUPP, | 1517 | MEI_CFG_FW_VER_SUPP, |
| 1472 | MEI_CFG_FW_SPS, | 1518 | MEI_CFG_FW_SPS, |
| @@ -1480,6 +1526,15 @@ static const struct mei_cfg mei_me_pch15_cfg = { · 7 unmodified lines | |||
| 1480 | MEI_CFG_TRC, | 1526 | MEI_CFG_TRC, |
| 1481 | }; | 1527 | }; |
| 1482 | 1528 | ||
| 1529 | /* Tiger Lake with quirk for SPS 5.0 and newer Firmware exclusion */ | ||
| 1530 | static const struct mei_cfg mei_me_pch15_sps_cfg = { | ||
| 1531 | MEI_CFG_PCH8_HFS, | ||
| 1532 | MEI_CFG_FW_VER_SUPP, | ||
| 1533 | MEI_CFG_DMA_128, | ||
| 1534 | MEI_CFG_TRC, | ||
| 1535 | MEI_CFG_FW_SPS, | ||
| 1536 | }; | ||
| 1537 | |||
| 1483 | /* | 1538 | /* |
| 1484 | * mei_cfg_list - A list of platform platform specific configurations. | 1539 | * mei_cfg_list - A list of platform platform specific configurations. |
| 1485 | * Note: has to be synchronized with enum mei_cfg_idx. | 1540 | * Note: has to be synchronized with enum mei_cfg_idx. |
| @@ -1492,10 +1547,13 @@ static const struct mei_cfg *const mei_cfg_list[] = { · 6 unmodified lines | |||
| 1492 | [MEI_ME_PCH7_CFG] = &mei_me_pch7_cfg, | 1547 | [MEI_ME_PCH7_CFG] = &mei_me_pch7_cfg, |
| 1493 | [MEI_ME_PCH_CPT_PBG_CFG] = &mei_me_pch_cpt_pbg_cfg, | 1548 | [MEI_ME_PCH_CPT_PBG_CFG] = &mei_me_pch_cpt_pbg_cfg, |
| 1494 | [MEI_ME_PCH8_CFG] = &mei_me_pch8_cfg, | 1549 | [MEI_ME_PCH8_CFG] = &mei_me_pch8_cfg, |
| 1495 | [MEI_ME_PCH8_SPS_CFG] = &mei_me_pch8_sps_cfg, | 1550 | [MEI_ME_PCH8_SPS_4_CFG] = &mei_me_pch8_sps_4_cfg, |
| 1496 | [MEI_ME_PCH12_CFG] = &mei_me_pch12_cfg, | 1551 | [MEI_ME_PCH12_CFG] = &mei_me_pch12_cfg, |
| 1552 | [MEI_ME_PCH12_SPS_4_CFG] = &mei_me_pch12_sps_4_cfg, | ||
| 1497 | [MEI_ME_PCH12_SPS_CFG] = &mei_me_pch12_sps_cfg, | 1553 | [MEI_ME_PCH12_SPS_CFG] = &mei_me_pch12_sps_cfg, |
| 1554 | [MEI_ME_PCH12_SPS_NODMA_CFG] = &mei_me_pch12_nodma_sps_cfg, | ||
| 1498 | [MEI_ME_PCH15_CFG] = &mei_me_pch15_cfg, | 1555 | [MEI_ME_PCH15_CFG] = &mei_me_pch15_cfg, |
| 1556 | [MEI_ME_PCH15_SPS_CFG] = &mei_me_pch15_sps_cfg, | ||
| 1499 | }; | 1557 | }; |
| 1500 | 1558 | ||
| 1501 | const struct mei_cfg *mei_me_get_cfg(kernel_ulong_t idx) | 1559 | const struct mei_cfg *mei_me_get_cfg(kernel_ulong_t idx) |
| @@ -1,6 +1,6 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* | 2 | /* |
| 3 | * Copyright (c) 2012-2019, Intel Corporation. All rights reserved. | 3 | * Copyright (c) 2012-2020, Intel Corporation. All rights reserved. |
| 4 | * Intel Management Engine Interface (Intel MEI) Linux driver | 4 | * Intel Management Engine Interface (Intel MEI) Linux driver |
| 5 | */ | 5 | */ |
| 6 | 6 | ||
| @@ -76,14 +76,20 @@ struct mei_me_hw { · 69 unmodified lines | |||
| 76 | * with quirk for Node Manager exclusion. | 76 | * with quirk for Node Manager exclusion. |
| 77 | * @MEI_ME_PCH8_CFG: Platform Controller Hub Gen8 and newer | 77 | * @MEI_ME_PCH8_CFG: Platform Controller Hub Gen8 and newer |
| 78 | * client platforms. | 78 | * client platforms. |
| 79 | * @MEI_ME_PCH8_SPS_CFG: Platform Controller Hub Gen8 and newer | 79 | * @MEI_ME_PCH8_SPS_4_CFG: Platform Controller Hub Gen8 and newer |
| 80 | * servers platforms with quirk for | 80 | * servers platforms with quirk for |
| 81 | * SPS firmware exclusion. | 81 | * SPS firmware exclusion. |
| 82 | * @MEI_ME_PCH12_CFG: Platform Controller Hub Gen12 and newer | 82 | * @MEI_ME_PCH12_CFG: Platform Controller Hub Gen12 and newer |
| 83 | * @MEI_ME_PCH12_SPS_CFG: Platform Controller Hub Gen12 and newer | 83 | * @MEI_ME_PCH12_SPS_4_CFG:Platform Controller Hub Gen12 up to 4.0 |
| 84 | * servers platforms with quirk for | ||
| 85 | * SPS firmware exclusion. | ||
| 86 | * @MEI_ME_PCH12_SPS_CFG: Platform Controller Hub Gen12 5.0 and newer | ||
| 84 | * servers platforms with quirk for | 87 | * servers platforms with quirk for |
| 85 | * SPS firmware exclusion. | 88 | * SPS firmware exclusion. |
| 86 | * @MEI_ME_PCH15_CFG: Platform Controller Hub Gen15 and newer | 89 | * @MEI_ME_PCH15_CFG: Platform Controller Hub Gen15 and newer |
| 90 | * @MEI_ME_PCH15_SPS_CFG: Platform Controller Hub Gen15 and newer | ||
| 91 | * servers platforms with quirk for | ||
| 92 | * SPS firmware exclusion. | ||
| 87 | * @MEI_ME_NUM_CFG: Upper Sentinel. | 93 | * @MEI_ME_NUM_CFG: Upper Sentinel. |
| 88 | */ | 94 | */ |
| 89 | enum mei_cfg_idx { | 95 | enum mei_cfg_idx { |
| @@ -94,10 +100,13 @@ enum mei_cfg_idx { · 4 unmodified lines | |||
| 94 | MEI_ME_PCH7_CFG, | 100 | MEI_ME_PCH7_CFG, |
| 95 | MEI_ME_PCH_CPT_PBG_CFG, | 101 | MEI_ME_PCH_CPT_PBG_CFG, |
| 96 | MEI_ME_PCH8_CFG, | 102 | MEI_ME_PCH8_CFG, |
| 97 | MEI_ME_PCH8_SPS_CFG, | 103 | MEI_ME_PCH8_SPS_4_CFG, |
| 98 | MEI_ME_PCH12_CFG, | 104 | MEI_ME_PCH12_CFG, |
| 105 | MEI_ME_PCH12_SPS_4_CFG, | ||
| 99 | MEI_ME_PCH12_SPS_CFG, | 106 | MEI_ME_PCH12_SPS_CFG, |
| 107 | MEI_ME_PCH12_SPS_NODMA_CFG, | ||
| 100 | MEI_ME_PCH15_CFG, | 108 | MEI_ME_PCH15_CFG, |
| 109 | MEI_ME_PCH15_SPS_CFG, | ||
| 101 | MEI_ME_NUM_CFG, | 110 | MEI_ME_NUM_CFG, |
| 102 | }; | 111 | }; |
| 103 | 112 | ||
| @@ -59,18 +59,18 @@ static const struct pci_device_id mei_me_pci_tbl[] = { · 58 unmodified lines | |||
| 59 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH7_CFG)}, | 59 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH7_CFG)}, |
| 60 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH7_CFG)}, | 60 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH7_CFG)}, |
| 61 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH7_CFG)}, | 61 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH7_CFG)}, |
| 62 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_CFG)}, | 62 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_4_CFG)}, |
| 63 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_CFG)}, | 63 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_4_CFG)}, |
| 64 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)}, | 64 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)}, |
| 65 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, MEI_ME_PCH8_SPS_CFG)}, | 65 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, MEI_ME_PCH8_SPS_4_CFG)}, |
| 66 | {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, MEI_ME_PCH8_CFG)}, | 66 | {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, MEI_ME_PCH8_CFG)}, |
| 67 | {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, MEI_ME_PCH8_CFG)}, | 67 | {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, MEI_ME_PCH8_CFG)}, |
| 68 | 68 | ||
| 69 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, MEI_ME_PCH8_CFG)}, | 69 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, MEI_ME_PCH8_CFG)}, |
| 70 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)}, | 70 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)}, |
| 71 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_CFG)}, | 71 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_4_CFG)}, |
| 72 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_CFG)}, | 72 | {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_4_CFG)}, |
| 73 | {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_SPS_CFG)}, | 73 | {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_SPS_4_CFG)}, |
| 74 | 74 | ||
| 75 | {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)}, | 75 | {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)}, |
| 76 | {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)}, | 76 | {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)}, |
| @@ -84,8 +84,8 @@ static const struct pci_device_id mei_me_pci_tbl[] = { · 7 unmodified lines | |||
| 84 | 84 | ||
| 85 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP, MEI_ME_PCH12_CFG)}, | 85 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP, MEI_ME_PCH12_CFG)}, |
| 86 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP_3, MEI_ME_PCH8_CFG)}, | 86 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP_3, MEI_ME_PCH8_CFG)}, |
| 87 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH12_CFG)}, | 87 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH12_SPS_CFG)}, |
| 88 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_3, MEI_ME_PCH8_CFG)}, | 88 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_3, MEI_ME_PCH12_SPS_NODMA_CFG)}, |
| 89 | 89 | ||
| 90 | {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP, MEI_ME_PCH12_CFG)}, | 90 | {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP, MEI_ME_PCH12_CFG)}, |
| 91 | {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP_3, MEI_ME_PCH8_CFG)}, | 91 | {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP_3, MEI_ME_PCH8_CFG)}, |
| @@ -96,6 +96,7 @@ static const struct pci_device_id mei_me_pci_tbl[] = { · 4 unmodified lines | |||
| 96 | {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, | 96 | {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, |
| 97 | 97 | ||
| 98 | {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH15_CFG)}, | 98 | {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH15_CFG)}, |
| 99 | {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_H, MEI_ME_PCH15_SPS_CFG)}, | ||
| 99 | 100 | ||
| 100 | {MEI_PCI_DEVICE(MEI_DEV_ID_JSP_N, MEI_ME_PCH15_CFG)}, | 101 | {MEI_PCI_DEVICE(MEI_DEV_ID_JSP_N, MEI_ME_PCH15_CFG)}, |
| 101 | 102 | ||
| @@ -1146,9 +1146,11 @@ static int meson_mmc_probe(struct platform_device *pdev) · 1145 unmodified lines | |||
| 1146 | 1146 | ||
| 1147 | mmc->caps |= MMC_CAP_CMD23; | 1147 | mmc->caps |= MMC_CAP_CMD23; |
| 1148 | if (host->dram_access_quirk) { | 1148 | if (host->dram_access_quirk) { |
| 1149 | /* Limit segments to 1 due to low available sram memory */ | ||
| 1150 | mmc->max_segs = 1; | ||
| 1149 | /* Limit to the available sram memory */ | 1151 | /* Limit to the available sram memory */ |
| 1150 | mmc->max_segs = SD_EMMC_SRAM_DATA_BUF_LEN / mmc->max_blk_size; | 1152 | mmc->max_blk_count = SD_EMMC_SRAM_DATA_BUF_LEN / |
| 1151 | mmc->max_blk_count = mmc->max_segs; | 1153 | mmc->max_blk_size; |
| 1152 | } else { | 1154 | } else { |
| 1153 | mmc->max_blk_count = CMD_CFG_LENGTH_MASK; | 1155 | mmc->max_blk_count = CMD_CFG_LENGTH_MASK; |
| 1154 | mmc->max_segs = SD_EMMC_DESC_BUF_LEN / | 1156 | mmc->max_segs = SD_EMMC_DESC_BUF_LEN / |
| @@ -689,7 +689,7 @@ MODULE_DEVICE_TABLE(of, owl_mmc_of_match); · 688 unmodified lines | |||
| 689 | static struct platform_driver owl_mmc_driver = { | 689 | static struct platform_driver owl_mmc_driver = { |
| 690 | .driver = { | 690 | .driver = { |
| 691 | .name = "owl_mmc", | 691 | .name = "owl_mmc", |
| 692 | .of_match_table = of_match_ptr(owl_mmc_of_match), | 692 | .of_match_table = owl_mmc_of_match, |
| 693 | }, | 693 | }, |
| 694 | .probe = owl_mmc_probe, | 694 | .probe = owl_mmc_probe, |
| 695 | .remove = owl_mmc_remove, | 695 | .remove = owl_mmc_remove, |
| @@ -618,8 +618,9 @@ static int msm_init_cm_dll(struct sdhci_host *host) · 617 unmodified lines | |||
| 618 | config &= ~CORE_CLK_PWRSAVE; | 618 | config &= ~CORE_CLK_PWRSAVE; |
| 619 | writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec); | 619 | writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec); |
| 620 | 620 | ||
| 621 | config = msm_host->dll_config; | 621 | if (msm_host->dll_config) |
| 622 | writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config); | 622 | writel_relaxed(msm_host->dll_config, |
| 623 | host->ioaddr + msm_offset->core_dll_config); | ||
| 623 | 624 | ||
| 624 | if (msm_host->use_14lpp_dll_reset) { | 625 | if (msm_host->use_14lpp_dll_reset) { |
| 625 | config = readl_relaxed(host->ioaddr + | 626 | config = readl_relaxed(host->ioaddr + |
| @@ -1273,8 +1273,8 @@ int mtd_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, · 1272 unmodified lines | |||
| 1273 | return -EROFS; | 1273 | return -EROFS; |
| 1274 | if (!len) | 1274 | if (!len) |
| 1275 | return 0; | 1275 | return 0; |
| 1276 | if (!mtd->oops_panic_write) | 1276 | if (!master->oops_panic_write) |
| 1277 | mtd->oops_panic_write = true; | 1277 | master->oops_panic_write = true; |
| 1278 | 1278 | ||
| 1279 | return master->_panic_write(master, mtd_get_master_ofs(mtd, to), len, | 1279 | return master->_panic_write(master, mtd_get_master_ofs(mtd, to), len, |
| 1280 | retlen, buf); | 1280 | retlen, buf); |
| @@ -1761,7 +1761,7 @@ static void ns_switch_state(struct nandsim *ns) · 1760 unmodified lines | |||
| 1761 | 1761 | ||
| 1762 | NS_DBG("switch_state: operation is unknown, try to find it\n"); | 1762 | NS_DBG("switch_state: operation is unknown, try to find it\n"); |
| 1763 | 1763 | ||
| 1764 | if (!ns_find_operation(ns, 0)) | 1764 | if (ns_find_operation(ns, 0)) |
| 1765 | return; | 1765 | return; |
| 1766 | 1766 | ||
| 1767 | if ((ns->state & ACTION_MASK) && | 1767 | if ((ns->state & ACTION_MASK) && |
| @@ -224,7 +224,7 @@ static int xway_nand_remove(struct platform_device *pdev) · 223 unmodified lines | |||
| 224 | struct nand_chip *chip = &data->chip; | 224 | struct nand_chip *chip = &data->chip; |
| 225 | int ret; | 225 | int ret; |
| 226 | 226 | ||
| 227 | ret = mtd_device_unregister(mtd); | 227 | ret = mtd_device_unregister(nand_to_mtd(chip)); |
| 228 | WARN_ON(ret); | 228 | WARN_ON(ret); |
| 229 | nand_cleanup(chip); | 229 | nand_cleanup(chip); |
| 230 | 230 | ||
| @@ -572,6 +572,9 @@ static int bareudp2info(struct nlattr *data[], struct bareudp_conf *conf, · 571 unmodified lines | |||
| 572 | if (data[IFLA_BAREUDP_SRCPORT_MIN]) | 572 | if (data[IFLA_BAREUDP_SRCPORT_MIN]) |
| 573 | conf->sport_min = nla_get_u16(data[IFLA_BAREUDP_SRCPORT_MIN]); | 573 | conf->sport_min = nla_get_u16(data[IFLA_BAREUDP_SRCPORT_MIN]); |
| 574 | 574 | ||
| 575 | if (data[IFLA_BAREUDP_MULTIPROTO_MODE]) | ||
| 576 | conf->multi_proto_mode = true; | ||
| 577 | |||
| 575 | return 0; | 578 | return 0; |
| 576 | } | 579 | } |
| 577 | 580 | ||
| @@ -1147,6 +1147,8 @@ static int bcm_sf2_sw_probe(struct platform_device *pdev) · 1146 unmodified lines | |||
| 1147 | set_bit(0, priv->cfp.used); | 1147 | set_bit(0, priv->cfp.used); |
| 1148 | set_bit(0, priv->cfp.unique); | 1148 | set_bit(0, priv->cfp.unique); |
| 1149 | 1149 | ||
| 1150 | /* Balance of_node_put() done by of_find_node_by_name() */ | ||
| 1151 | of_node_get(dn); | ||
| 1150 | ports = of_find_node_by_name(dn, "ports"); | 1152 | ports = of_find_node_by_name(dn, "ports"); |
| 1151 | if (ports) { | 1153 | if (ports) { |
| 1152 | bcm_sf2_identify_ports(priv, ports); | 1154 | bcm_sf2_identify_ports(priv, ports); |
| @@ -1268,6 +1268,9 @@ static int ksz8795_switch_init(struct ksz_device *dev) · 1267 unmodified lines | |||
| 1268 | return -ENOMEM; | 1268 | return -ENOMEM; |
| 1269 | } | 1269 | } |
| 1270 | 1270 | ||
| 1271 | /* set the real number of ports */ | ||
| 1272 | dev->ds->num_ports = dev->port_cnt; | ||
| 1273 | |||
| 1271 | return 0; | 1274 | return 0; |
| 1272 | } | 1275 | } |
| 1273 | 1276 | ||
| @@ -1588,6 +1588,9 @@ static int ksz9477_switch_init(struct ksz_device *dev) · 1587 unmodified lines | |||
| 1588 | return -ENOMEM; | 1588 | return -ENOMEM; |
| 1589 | } | 1589 | } |
| 1590 | 1590 | ||
| 1591 | /* set the real number of ports */ | ||
| 1592 | dev->ds->num_ports = dev->port_cnt; | ||
| 1593 | |||
| 1591 | return 0; | 1594 | return 0; |
| 1592 | } | 1595 | } |
| 1593 | 1596 | ||
| @@ -79,6 +79,7 @@ MODULE_DEVICE_TABLE(i2c, ksz9477_i2c_id); · 78 unmodified lines | |||
| 79 | static const struct of_device_id ksz9477_dt_ids[] = { | 79 | static const struct of_device_id ksz9477_dt_ids[] = { |
| 80 | { .compatible = "microchip,ksz9477" }, | 80 | { .compatible = "microchip,ksz9477" }, |
| 81 | { .compatible = "microchip,ksz9897" }, | 81 | { .compatible = "microchip,ksz9897" }, |
| 82 | { .compatible = "microchip,ksz9893" }, | ||
| 82 | { .compatible = "microchip,ksz9567" }, | 83 | { .compatible = "microchip,ksz9567" }, |
| 83 | {}, | 84 | {}, |
| 84 | }; | 85 | }; |
| @@ -7,6 +7,165 @@ · 6 unmodified lines | |||
| 7 | 7 | ||
| 8 | #define SJA1105_SIZE_VL_STATUS 8 | 8 | #define SJA1105_SIZE_VL_STATUS 8 |
| 9 | 9 | ||
| 10 | /* Insert into the global gate list, sorted by gate action time. */ | ||
| 11 | static int sja1105_insert_gate_entry(struct sja1105_gating_config *gating_cfg, | ||
| 12 | struct sja1105_rule *rule, | ||
| 13 | u8 gate_state, s64 entry_time, | ||
| 14 | struct netlink_ext_ack *extack) | ||
| 15 | { | ||
| 16 | struct sja1105_gate_entry *e; | ||
| 17 | int rc; | ||
| 18 | |||
| 19 | e = kzalloc(sizeof(*e), GFP_KERNEL); | ||
| 20 | if (!e) | ||
| 21 | return -ENOMEM; | ||
| 22 | |||
| 23 | e->rule = rule; | ||
| 24 | e->gate_state = gate_state; | ||
| 25 | e->interval = entry_time; | ||
| 26 | |||
| 27 | if (list_empty(&gating_cfg->entries)) { | ||
| 28 | list_add(&e->list, &gating_cfg->entries); | ||
| 29 | } else { | ||
| 30 | struct sja1105_gate_entry *p; | ||
| 31 | |||
| 32 | list_for_each_entry(p, &gating_cfg->entries, list) { | ||
| 33 | if (p->interval == e->interval) { | ||
| 34 | NL_SET_ERR_MSG_MOD(extack, | ||
| 35 | "Gate conflict"); | ||
| 36 | rc = -EBUSY; | ||
| 37 | goto err; | ||
| 38 | } | ||
| 39 | |||
| 40 | if (e->interval < p->interval) | ||
| 41 | break; | ||
| 42 | } | ||
| 43 | list_add(&e->list, p->list.prev); | ||
| 44 | } | ||
| 45 | |||
| 46 | gating_cfg->num_entries++; | ||
| 47 | |||
| 48 | return 0; | ||
| 49 | err: | ||
| 50 | kfree(e); | ||
| 51 | return rc; | ||
| 52 | } | ||
| 53 | |||
| 54 | /* The gate entries contain absolute times in their e->interval field. Convert | ||
| 55 | * that to proper intervals (i.e. "0, 5, 10, 15" to "5, 5, 5, 5"). | ||
| 56 | */ | ||
| 57 | static void | ||
| 58 | sja1105_gating_cfg_time_to_interval(struct sja1105_gating_config *gating_cfg, | ||
| 59 | u64 cycle_time) | ||
| 60 | { | ||
| 61 | struct sja1105_gate_entry *last_e; | ||
| 62 | struct sja1105_gate_entry *e; | ||
| 63 | struct list_head *prev; | ||
| 64 | |||
| 65 | list_for_each_entry(e, &gating_cfg->entries, list) { | ||
| 66 | struct sja1105_gate_entry *p; | ||
| 67 | |||
| 68 | prev = e->list.prev; | ||
| 69 | |||
| 70 | if (prev == &gating_cfg->entries) | ||
| 71 | continue; | ||
| 72 | |||
| 73 | p = list_entry(prev, struct sja1105_gate_entry, list); | ||
| 74 | p->interval = e->interval - p->interval; | ||
| 75 | } | ||
| 76 | last_e = list_last_entry(&gating_cfg->entries, | ||
| 77 | struct sja1105_gate_entry, list); | ||
| 78 | last_e->interval = cycle_time - last_e->interval; | ||
| 79 | } | ||
| 80 | |||
| 81 | static void sja1105_free_gating_config(struct sja1105_gating_config *gating_cfg) | ||
| 82 | { | ||
| 83 | struct sja1105_gate_entry *e, *n; | ||
| 84 | |||
| 85 | list_for_each_entry_safe(e, n, &gating_cfg->entries, list) { | ||
| 86 | list_del(&e->list); | ||
| 87 | kfree(e); | ||
| 88 | } | ||
| 89 | } | ||
| 90 | |||
| 91 | static int sja1105_compose_gating_subschedule(struct sja1105_private *priv, | ||
| 92 | struct netlink_ext_ack *extack) | ||
| 93 | { | ||
| 94 | struct sja1105_gating_config *gating_cfg = &priv->tas_data.gating_cfg; | ||
| 95 | struct sja1105_rule *rule; | ||
| 96 | s64 max_cycle_time = 0; | ||
| 97 | s64 its_base_time = 0; | ||
| 98 | int i, rc = 0; | ||
| 99 | |||
| 100 | sja1105_free_gating_config(gating_cfg); | ||
| 101 | |||
| 102 | list_for_each_entry(rule, &priv->flow_block.rules, list) { | ||
| 103 | if (rule->type != SJA1105_RULE_VL) | ||
| 104 | continue; | ||
| 105 | if (rule->vl.type != SJA1105_VL_TIME_TRIGGERED) | ||
| 106 | continue; | ||
| 107 | |||
| 108 | if (max_cycle_time < rule->vl.cycle_time) { | ||
| 109 | max_cycle_time = rule->vl.cycle_time; | ||
| 110 | its_base_time = rule->vl.base_time; | ||
| 111 | } | ||
| 112 | } | ||
| 113 | |||
| 114 | if (!max_cycle_time) | ||
| 115 | return 0; | ||
| 116 | |||
| 117 | dev_dbg(priv->ds->dev, "max_cycle_time %lld its_base_time %lld\n", | ||
| 118 | max_cycle_time, its_base_time); | ||
| 119 | |||
| 120 | gating_cfg->base_time = its_base_time; | ||
| 121 | gating_cfg->cycle_time = max_cycle_time; | ||
| 122 | gating_cfg->num_entries = 0; | ||
| 123 | |||
| 124 | list_for_each_entry(rule, &priv->flow_block.rules, list) { | ||
| 125 | s64 time; | ||
| 126 | s64 rbt; | ||
| 127 | |||
| 128 | if (rule->type != SJA1105_RULE_VL) | ||
| 129 | continue; | ||
| 130 | if (rule->vl.type != SJA1105_VL_TIME_TRIGGERED) | ||
| 131 | continue; | ||
| 132 | |||
| 133 | /* Calculate the difference between this gating schedule's | ||
| 134 | * base time, and the base time of the gating schedule with the | ||
| 135 | * longest cycle time. We call it the relative base time (rbt). | ||
| 136 | */ | ||
| 137 | rbt = future_base_time(rule->vl.base_time, rule->vl.cycle_time, | ||
| 138 | its_base_time); | ||
| 139 | rbt -= its_base_time; | ||
| 140 | |||
| 141 | time = rbt; | ||
| 142 | |||
| 143 | for (i = 0; i < rule->vl.num_entries; i++) { | ||
| 144 | u8 gate_state = rule->vl.entries[i].gate_state; | ||
| 145 | s64 entry_time = time; | ||
| 146 | |||
| 147 | while (entry_time < max_cycle_time) { | ||
| 148 | rc = sja1105_insert_gate_entry(gating_cfg, rule, | ||
| 149 | gate_state, | ||
| 150 | entry_time, | ||
| 151 | extack); | ||
| 152 | if (rc) | ||
| 153 | goto err; | ||
| 154 | |||
| 155 | entry_time += rule->vl.cycle_time; | ||
| 156 | } | ||
| 157 | time += rule->vl.entries[i].interval; | ||
| 158 | } | ||
| 159 | } | ||
| 160 | |||
| 161 | sja1105_gating_cfg_time_to_interval(gating_cfg, max_cycle_time); | ||
| 162 | |||
| 163 | return 0; | ||
| 164 | err: | ||
| 165 | sja1105_free_gating_config(gating_cfg); | ||
| 166 | return rc; | ||
| 167 | } | ||
| 168 | |||
| 10 | /* The switch flow classification core implements TTEthernet, which 'thinks' in | 169 | /* The switch flow classification core implements TTEthernet, which 'thinks' in |
| 11 | * terms of Virtual Links (VL), a concept borrowed from ARINC 664 part 7. | 170 | * terms of Virtual Links (VL), a concept borrowed from ARINC 664 part 7. |
| 12 | * However it also has one other operating mode (VLLUPFORMAT=0) where it acts | 171 | * However it also has one other operating mode (VLLUPFORMAT=0) where it acts |
| @@ -342,7 +501,9 @@ int sja1105_vl_redirect(struct sja1105_private *priv, int port, · 329 unmodified lines | |||
| 342 | NL_SET_ERR_MSG_MOD(extack, | 501 | NL_SET_ERR_MSG_MOD(extack, |
| 343 | "Can only redirect based on DMAC"); | 502 | "Can only redirect based on DMAC"); |
| 344 | return -EOPNOTSUPP; | 503 | return -EOPNOTSUPP; |
| 345 | } else if (key->type != SJA1105_KEY_VLAN_AWARE_VL) { | 504 | } else if ((priv->vlan_state == SJA1105_VLAN_BEST_EFFORT || |
| 505 | priv->vlan_state == SJA1105_VLAN_FILTERING_FULL) && | ||
| 506 | key->type != SJA1105_KEY_VLAN_AWARE_VL) { | ||
| 346 | NL_SET_ERR_MSG_MOD(extack, | 507 | NL_SET_ERR_MSG_MOD(extack, |
| 347 | "Can only redirect based on {DMAC, VID, PCP}"); | 508 | "Can only redirect based on {DMAC, VID, PCP}"); |
| 348 | return -EOPNOTSUPP; | 509 | return -EOPNOTSUPP; |
| @@ -388,171 +549,19 @@ int sja1105_vl_delete(struct sja1105_private *priv, int port, · 39 unmodified lines | |||
| 388 | kfree(rule); | 549 | kfree(rule); |
| 389 | } | 550 | } |
| 390 | 551 | ||
| 391 | rc = sja1105_init_virtual_links(priv, extack); | 552 | rc = sja1105_compose_gating_subschedule(priv, extack); |
| 392 | if (rc) | 553 | if (rc) |
| 393 | return rc; | 554 | return rc; |
| 394 | 555 | ||
| 395 | return sja1105_static_config_reload(priv, SJA1105_VIRTUAL_LINKS); | 556 | rc = sja1105_init_virtual_links(priv, extack); |
| 396 | } | 557 | if (rc) |
| 397 | 558 | return rc; | |
| 398 | /* Insert into the global gate list, sorted by gate action time. */ | ||
| 399 | static int sja1105_insert_gate_entry(struct sja1105_gating_config *gating_cfg, | ||
| 400 | struct sja1105_rule *rule, | ||
| 401 | u8 gate_state, s64 entry_time, | ||
| 402 | struct netlink_ext_ack *extack) | ||
| 403 | { | ||
| 404 | struct sja1105_gate_entry *e; | ||
| 405 | int rc; | ||
| 406 | |||
| 407 | e = kzalloc(sizeof(*e), GFP_KERNEL); | ||
| 408 | if (!e) | ||
| 409 | return -ENOMEM; | ||
| 410 | |||
| 411 | e->rule = rule; | ||
| 412 | e->gate_state = gate_state; | ||
| 413 | e->interval = entry_time; | ||
| 414 | |||
| 415 | if (list_empty(&gating_cfg->entries)) { | ||
| 416 | list_add(&e->list, &gating_cfg->entries); | ||
| 417 | } else { | ||
| 418 | struct sja1105_gate_entry *p; | ||
| 419 | |||
| 420 | list_for_each_entry(p, &gating_cfg->entries, list) { | ||
| 421 | if (p->interval == e->interval) { | ||
| 422 | NL_SET_ERR_MSG_MOD(extack, | ||
| 423 | "Gate conflict"); | ||
| 424 | rc = -EBUSY; | ||
| 425 | goto err; | ||
| 426 | } | ||
| 427 | |||
| 428 | if (e->interval < p->interval) | ||
| 429 | break; | ||
| 430 | } | ||
| 431 | list_add(&e->list, p->list.prev); | ||
| 432 | } | ||
| 433 | |||
| 434 | gating_cfg->num_entries++; | ||
| 435 | |||
| 436 | return 0; | ||
| 437 | err: | ||
| 438 | kfree(e); | ||
| 439 | return rc; | ||
| 440 | } | ||
| 441 | |||
| 442 | /* The gate entries contain absolute times in their e->interval field. Convert | ||
| 443 | * that to proper intervals (i.e. "0, 5, 10, 15" to "5, 5, 5, 5"). | ||
| 444 | */ | ||
| 445 | static void | ||
| 446 | sja1105_gating_cfg_time_to_interval(struct sja1105_gating_config *gating_cfg, | ||
| 447 | u64 cycle_time) | ||
| 448 | { | ||
| 449 | struct sja1105_gate_entry *last_e; | ||
| 450 | struct sja1105_gate_entry *e; | ||
| 451 | struct list_head *prev; | ||
| 452 | |||
| 453 | list_for_each_entry(e, &gating_cfg->entries, list) { | ||
| 454 | struct sja1105_gate_entry *p; | ||
| 455 | |||
| 456 | prev = e->list.prev; | ||
| 457 | |||
| 458 | if (prev == &gating_cfg->entries) | ||
| 459 | continue; | ||
| 460 | |||
| 461 | p = list_entry(prev, struct sja1105_gate_entry, list); | ||
| 462 | p->interval = e->interval - p->interval; | ||
| 463 | } | ||
| 464 | last_e = list_last_entry(&gating_cfg->entries, | ||
| 465 | struct sja1105_gate_entry, list); | ||
| 466 | if (last_e->list.prev != &gating_cfg->entries) | ||
| 467 | last_e->interval = cycle_time - last_e->interval; | ||
| 468 | } | ||
| 469 | |||
| 470 | static void sja1105_free_gating_config(struct sja1105_gating_config *gating_cfg) | ||
| 471 | { | ||
| 472 | struct sja1105_gate_entry *e, *n; | ||
| 473 | |||
| 474 | list_for_each_entry_safe(e, n, &gating_cfg->entries, list) { | ||
| 475 | list_del(&e->list); | ||
| 476 | kfree(e); | ||
| 477 | } | ||
| 478 | } | ||
| 479 | |||
| 480 | static int sja1105_compose_gating_subschedule(struct sja1105_private *priv, | ||
| 481 | struct netlink_ext_ack *extack) | ||
| 482 | { | ||
| 483 | struct sja1105_gating_config *gating_cfg = &priv->tas_data.gating_cfg; | ||
| 484 | struct sja1105_rule *rule; | ||
| 485 | s64 max_cycle_time = 0; | ||
| 486 | s64 its_base_time = 0; | ||
| 487 | int i, rc = 0; | ||
| 488 | |||
| 489 | list_for_each_entry(rule, &priv->flow_block.rules, list) { | ||
| 490 | if (rule->type != SJA1105_RULE_VL) | ||
| 491 | continue; | ||
| 492 | if (rule->vl.type != SJA1105_VL_TIME_TRIGGERED) | ||
| 493 | continue; | ||
| 494 | |||
| 495 | if (max_cycle_time < rule->vl.cycle_time) { | ||
| 496 | max_cycle_time = rule->vl.cycle_time; | ||
| 497 | its_base_time = rule->vl.base_time; | ||
| 498 | } | ||
| 499 | } | ||
| 500 | |||
| 501 | if (!max_cycle_time) | ||
| 502 | return 0; | ||
| 503 | |||
| 504 | dev_dbg(priv->ds->dev, "max_cycle_time %lld its_base_time %lld\n", | ||
| 505 | max_cycle_time, its_base_time); | ||
| 506 | |||
| 507 | sja1105_free_gating_config(gating_cfg); | ||
| 508 | |||
| 509 | gating_cfg->base_time = its_base_time; | ||
| 510 | gating_cfg->cycle_time = max_cycle_time; | ||
| 511 | gating_cfg->num_entries = 0; | ||
| 512 | |||
| 513 | list_for_each_entry(rule, &priv->flow_block.rules, list) { | ||
| 514 | s64 time; | ||
| 515 | s64 rbt; | ||
| 516 | |||
| 517 | if (rule->type != SJA1105_RULE_VL) | ||
| 518 | continue; | ||
| 519 | if (rule->vl.type != SJA1105_VL_TIME_TRIGGERED) | ||
| 520 | continue; | ||
| 521 | |||
| 522 | /* Calculate the difference between this gating schedule's | ||
| 523 | * base time, and the base time of the gating schedule with the | ||
| 524 | * longest cycle time. We call it the relative base time (rbt). | ||
| 525 | */ | ||
| 526 | rbt = future_base_time(rule->vl.base_time, rule->vl.cycle_time, | ||
| 527 | its_base_time); | ||
| 528 | rbt -= its_base_time; | ||
| 529 | |||
| 530 | time = rbt; | ||
| 531 | |||
| 532 | for (i = 0; i < rule->vl.num_entries; i++) { | ||
| 533 | u8 gate_state = rule->vl.entries[i].gate_state; | ||
| 534 | s64 entry_time = time; | ||
| 535 | |||
| 536 | while (entry_time < max_cycle_time) { | ||
| 537 | rc = sja1105_insert_gate_entry(gating_cfg, rule, | ||
| 538 | gate_state, | ||
| 539 | entry_time, | ||
| 540 | extack); | ||
| 541 | if (rc) | ||
| 542 | goto err; | ||
| 543 | |||
| 544 | entry_time += rule->vl.cycle_time; | ||
| 545 | } | ||
| 546 | time += rule->vl.entries[i].interval; | ||
| 547 | } | ||
| 548 | } | ||
| 549 | 559 | ||
| 550 | sja1105_gating_cfg_time_to_interval(gating_cfg, max_cycle_time); | 560 | rc = sja1105_init_scheduling(priv); |
| 561 | if (rc < 0) | ||
| 562 | return rc; | ||
| 551 | 563 | ||
| 552 | return 0; | 564 | return sja1105_static_config_reload(priv, SJA1105_VIRTUAL_LINKS); |
| 553 | err: | ||
| 554 | sja1105_free_gating_config(gating_cfg); | ||
| 555 | return rc; | ||
| 556 | } | 565 | } |
| 557 | 566 | ||
| 558 | int sja1105_vl_gate(struct sja1105_private *priv, int port, | 567 | int sja1105_vl_gate(struct sja1105_private *priv, int port, |
| @@ -588,14 +597,12 @@ int sja1105_vl_gate(struct sja1105_private *priv, int port, · 29 unmodified lines | |||
| 588 | 597 | ||
| 589 | if (priv->vlan_state == SJA1105_VLAN_UNAWARE && | 598 | if (priv->vlan_state == SJA1105_VLAN_UNAWARE && |
| 590 | key->type != SJA1105_KEY_VLAN_UNAWARE_VL) { | 599 | key->type != SJA1105_KEY_VLAN_UNAWARE_VL) { |
| 591 | dev_err(priv->ds->dev, "1: vlan state %d key type %d\n", | ||
| 592 | priv->vlan_state, key->type); | ||
| 593 | NL_SET_ERR_MSG_MOD(extack, | 600 | NL_SET_ERR_MSG_MOD(extack, |
| 594 | "Can only gate based on DMAC"); | 601 | "Can only gate based on DMAC"); |
| 595 | return -EOPNOTSUPP; | 602 | return -EOPNOTSUPP; |
| 596 | } else if (key->type != SJA1105_KEY_VLAN_AWARE_VL) { | 603 | } else if ((priv->vlan_state == SJA1105_VLAN_BEST_EFFORT || |
| 597 | dev_err(priv->ds->dev, "2: vlan state %d key type %d\n", | 604 | priv->vlan_state == SJA1105_VLAN_FILTERING_FULL) && |
| 598 | priv->vlan_state, key->type); | 605 | key->type != SJA1105_KEY_VLAN_AWARE_VL) { |
| 599 | NL_SET_ERR_MSG_MOD(extack, | 606 | NL_SET_ERR_MSG_MOD(extack, |
| 600 | "Can only gate based on {DMAC, VID, PCP}"); | 607 | "Can only gate based on {DMAC, VID, PCP}"); |
| 601 | return -EOPNOTSUPP; | 608 | return -EOPNOTSUPP; |
| @@ -1700,7 +1700,7 @@ void hw_atl_rpfl3l4_ipv6_src_addr_set(struct aq_hw_s *aq_hw, u8 location, · 1699 unmodified lines | |||
| 1700 | for (i = 0; i < 4; ++i) | 1700 | for (i = 0; i < 4; ++i) |
| 1701 | aq_hw_write_reg(aq_hw, | 1701 | aq_hw_write_reg(aq_hw, |
| 1702 | HW_ATL_RPF_L3_SRCA_ADR(location + i), | 1702 | HW_ATL_RPF_L3_SRCA_ADR(location + i), |
| 1703 | ipv6_src[i]); | 1703 | ipv6_src[3 - i]); |
| 1704 | } | 1704 | } |
| 1705 | 1705 | ||
| 1706 | void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location, | 1706 | void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location, |
| @@ -1711,7 +1711,7 @@ void hw_atl_rpfl3l4_ipv6_dest_addr_set(struct aq_hw_s *aq_hw, u8 location, · 4 unmodified lines | |||
| 1711 | for (i = 0; i < 4; ++i) | 1711 | for (i = 0; i < 4; ++i) |
| 1712 | aq_hw_write_reg(aq_hw, | 1712 | aq_hw_write_reg(aq_hw, |
| 1713 | HW_ATL_RPF_L3_DSTA_ADR(location + i), | 1713 | HW_ATL_RPF_L3_DSTA_ADR(location + i), |
| 1714 | ipv6_dest[i]); | 1714 | ipv6_dest[3 - i]); |
| 1715 | } | 1715 | } |
| 1716 | 1716 | ||
| 1717 | u32 hw_atl_sem_ram_get(struct aq_hw_s *self) | 1717 | u32 hw_atl_sem_ram_get(struct aq_hw_s *self) |
| @@ -1360,7 +1360,7 @@ · 1359 unmodified lines | |||
| 1360 | */ | 1360 | */ |
| 1361 | 1361 | ||
| 1362 | /* Register address for bitfield pif_rpf_l3_da0_i[31:0] */ | 1362 | /* Register address for bitfield pif_rpf_l3_da0_i[31:0] */ |
| 1363 | #define HW_ATL_RPF_L3_DSTA_ADR(filter) (0x000053B0 + (filter) * 0x4) | 1363 | #define HW_ATL_RPF_L3_DSTA_ADR(filter) (0x000053D0 + (filter) * 0x4) |
| 1364 | /* Bitmask for bitfield l3_da0[1F:0] */ | 1364 | /* Bitmask for bitfield l3_da0[1F:0] */ |
| 1365 | #define HW_ATL_RPF_L3_DSTA_MSK 0xFFFFFFFFu | 1365 | #define HW_ATL_RPF_L3_DSTA_MSK 0xFFFFFFFFu |
| 1366 | /* Inverted bitmask for bitfield l3_da0[1F:0] */ | 1366 | /* Inverted bitmask for bitfield l3_da0[1F:0] */ |
| @@ -6292,6 +6292,7 @@ int bnxt_hwrm_set_coal(struct bnxt *bp) · 6291 unmodified lines | |||
| 6292 | 6292 | ||
| 6293 | static void bnxt_hwrm_stat_ctx_free(struct bnxt *bp) | 6293 | static void bnxt_hwrm_stat_ctx_free(struct bnxt *bp) |
| 6294 | { | 6294 | { |
| 6295 | struct hwrm_stat_ctx_clr_stats_input req0 = {0}; | ||
| 6295 | struct hwrm_stat_ctx_free_input req = {0}; | 6296 | struct hwrm_stat_ctx_free_input req = {0}; |
| 6296 | int i; | 6297 | int i; |
| 6297 | 6298 | ||
| @@ -6301,6 +6302,7 @@ static void bnxt_hwrm_stat_ctx_free(struct bnxt *bp) · 3 unmodified lines | |||
| 6301 | if (BNXT_CHIP_TYPE_NITRO_A0(bp)) | 6302 | if (BNXT_CHIP_TYPE_NITRO_A0(bp)) |
| 6302 | return; | 6303 | return; |
| 6303 | 6304 | ||
| 6305 | bnxt_hwrm_cmd_hdr_init(bp, &req0, HWRM_STAT_CTX_CLR_STATS, -1, -1); | ||
| 6304 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_STAT_CTX_FREE, -1, -1); | 6306 | bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_STAT_CTX_FREE, -1, -1); |
| 6305 | 6307 | ||
| 6306 | mutex_lock(&bp->hwrm_cmd_lock); | 6308 | mutex_lock(&bp->hwrm_cmd_lock); |
| @@ -6310,7 +6312,11 @@ static void bnxt_hwrm_stat_ctx_free(struct bnxt *bp) · 3 unmodified lines | |||
| 6310 | 6312 | ||
| 6311 | if (cpr->hw_stats_ctx_id != INVALID_STATS_CTX_ID) { | 6313 | if (cpr->hw_stats_ctx_id != INVALID_STATS_CTX_ID) { |
| 6312 | req.stat_ctx_id = cpu_to_le32(cpr->hw_stats_ctx_id); | 6314 | req.stat_ctx_id = cpu_to_le32(cpr->hw_stats_ctx_id); |
| 6313 | 6315 | if (BNXT_FW_MAJ(bp) <= 20) { | |
| 6316 | req0.stat_ctx_id = req.stat_ctx_id; | ||
| 6317 | _hwrm_send_message(bp, &req0, sizeof(req0), | ||
| 6318 | HWRM_CMD_TIMEOUT); | ||
| 6319 | } | ||
| 6314 | _hwrm_send_message(bp, &req, sizeof(req), | 6320 | _hwrm_send_message(bp, &req, sizeof(req), |
| 6315 | HWRM_CMD_TIMEOUT); | 6321 | HWRM_CMD_TIMEOUT); |
| 6316 | 6322 | ||
| @@ -6976,7 +6982,8 @@ static int __bnxt_hwrm_func_qcaps(struct bnxt *bp) · 659 unmodified lines | |||
| 6976 | bp->fw_cap |= BNXT_FW_CAP_ERR_RECOVER_RELOAD; | 6982 | bp->fw_cap |= BNXT_FW_CAP_ERR_RECOVER_RELOAD; |
| 6977 | 6983 | ||
| 6978 | bp->tx_push_thresh = 0; | 6984 | bp->tx_push_thresh = 0; |
| 6979 | if (flags & FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED) | 6985 | if ((flags & FUNC_QCAPS_RESP_FLAGS_PUSH_MODE_SUPPORTED) && |
| 6986 | BNXT_FW_MAJ(bp) > 217) | ||
| 6980 | bp->tx_push_thresh = BNXT_TX_PUSH_THRESH; | 6987 | bp->tx_push_thresh = BNXT_TX_PUSH_THRESH; |
| 6981 | 6988 | ||
| 6982 | hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx); | 6989 | hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx); |
| @@ -7240,8 +7247,9 @@ static int __bnxt_hwrm_ver_get(struct bnxt *bp, bool silent) · 257 unmodified lines | |||
| 7240 | static int bnxt_hwrm_ver_get(struct bnxt *bp) | 7247 | static int bnxt_hwrm_ver_get(struct bnxt *bp) |
| 7241 | { | 7248 | { |
| 7242 | struct hwrm_ver_get_output *resp = bp->hwrm_cmd_resp_addr; | 7249 | struct hwrm_ver_get_output *resp = bp->hwrm_cmd_resp_addr; |
| 7250 | u16 fw_maj, fw_min, fw_bld, fw_rsv; | ||
| 7243 | u32 dev_caps_cfg, hwrm_ver; | 7251 | u32 dev_caps_cfg, hwrm_ver; |
| 7244 | int rc; | 7252 | int rc, len; |
| 7245 | 7253 | ||
| 7246 | bp->hwrm_max_req_len = HWRM_MAX_REQ_LEN; | 7254 | bp->hwrm_max_req_len = HWRM_MAX_REQ_LEN; |
| 7247 | mutex_lock(&bp->hwrm_cmd_lock); | 7255 | mutex_lock(&bp->hwrm_cmd_lock); |
| @@ -7273,9 +7281,22 @@ static int bnxt_hwrm_ver_get(struct bnxt *bp) · 25 unmodified lines | |||
| 7273 | resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b, | 7281 | resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b, |
| 7274 | resp->hwrm_intf_upd_8b); | 7282 | resp->hwrm_intf_upd_8b); |
| 7275 | 7283 | ||
| 7276 | snprintf(bp->fw_ver_str, BC_HWRM_STR_LEN, "%d.%d.%d.%d", | 7284 | fw_maj = le16_to_cpu(resp->hwrm_fw_major); |
| 7277 | resp->hwrm_fw_maj_8b, resp->hwrm_fw_min_8b, | 7285 | if (bp->hwrm_spec_code > 0x10803 && fw_maj) { |
| 7278 | resp->hwrm_fw_bld_8b, resp->hwrm_fw_rsvd_8b); | 7286 | fw_min = le16_to_cpu(resp->hwrm_fw_minor); |
| 7287 | fw_bld = le16_to_cpu(resp->hwrm_fw_build); | ||
| 7288 | fw_rsv = le16_to_cpu(resp->hwrm_fw_patch); | ||
| 7289 | len = FW_VER_STR_LEN; | ||
| 7290 | } else { | ||
| 7291 | fw_maj = resp->hwrm_fw_maj_8b; | ||
| 7292 | fw_min = resp->hwrm_fw_min_8b; | ||
| 7293 | fw_bld = resp->hwrm_fw_bld_8b; | ||
| 7294 | fw_rsv = resp->hwrm_fw_rsvd_8b; | ||
| 7295 | len = BC_HWRM_STR_LEN; | ||
| 7296 | } | ||
| 7297 | bp->fw_ver_code = BNXT_FW_VER_CODE(fw_maj, fw_min, fw_bld, fw_rsv); | ||
| 7298 | snprintf(bp->fw_ver_str, len, "%d.%d.%d.%d", fw_maj, fw_min, fw_bld, | ||
| 7299 | fw_rsv); | ||
| 7279 | 7300 | ||
| 7280 | if (strlen(resp->active_pkg_name)) { | 7301 | if (strlen(resp->active_pkg_name)) { |
| 7281 | int fw_ver_len = strlen(bp->fw_ver_str); | 7302 | int fw_ver_len = strlen(bp->fw_ver_str); |
| @@ -11892,7 +11913,8 @@ static int bnxt_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 4610 unmodified lines | |||
| 11892 | dev->ethtool_ops = &bnxt_ethtool_ops; | 11913 | dev->ethtool_ops = &bnxt_ethtool_ops; |
| 11893 | pci_set_drvdata(pdev, dev); | 11914 | pci_set_drvdata(pdev, dev); |
| 11894 | 11915 | ||
| 11895 | bnxt_vpd_read_info(bp); | 11916 | if (BNXT_PF(bp)) |
| 11917 | bnxt_vpd_read_info(bp); | ||
| 11896 | 11918 | ||
| 11897 | rc = bnxt_alloc_hwrm_resources(bp); | 11919 | rc = bnxt_alloc_hwrm_resources(bp); |
| 11898 | if (rc) | 11920 | if (rc) |
| @@ -1746,6 +1746,11 @@ struct bnxt { · 1745 unmodified lines | |||
| 1746 | #define PHY_VER_STR_LEN (FW_VER_STR_LEN - BC_HWRM_STR_LEN) | 1746 | #define PHY_VER_STR_LEN (FW_VER_STR_LEN - BC_HWRM_STR_LEN) |
| 1747 | char fw_ver_str[FW_VER_STR_LEN]; | 1747 | char fw_ver_str[FW_VER_STR_LEN]; |
| 1748 | char hwrm_ver_supp[FW_VER_STR_LEN]; | 1748 | char hwrm_ver_supp[FW_VER_STR_LEN]; |
| 1749 | u64 fw_ver_code; | ||
| 1750 | #define BNXT_FW_VER_CODE(maj, min, bld, rsv) \ | ||
| 1751 | ((u64)(maj) << 48 | (u64)(min) << 32 | (u64)(bld) << 16 | (rsv)) | ||
| 1752 | #define BNXT_FW_MAJ(bp) ((bp)->fw_ver_code >> 48) | ||
| 1753 | |||
| 1749 | __be16 vxlan_port; | 1754 | __be16 vxlan_port; |
| 1750 | u8 vxlan_port_cnt; | 1755 | u8 vxlan_port_cnt; |
| 1751 | __le16 vxlan_fw_dst_port_id; | 1756 | __le16 vxlan_fw_dst_port_id; |
| @@ -396,6 +396,7 @@ static void bnxt_free_vf_resources(struct bnxt *bp) · 395 unmodified lines | |||
| 396 | } | 396 | } |
| 397 | } | 397 | } |
| 398 | 398 | ||
| 399 | bp->pf.active_vfs = 0; | ||
| 399 | kfree(bp->pf.vf); | 400 | kfree(bp->pf.vf); |
| 400 | bp->pf.vf = NULL; | 401 | bp->pf.vf = NULL; |
| 401 | } | 402 | } |
| @@ -835,7 +836,6 @@ void bnxt_sriov_disable(struct bnxt *bp) · 433 unmodified lines | |||
| 835 | 836 | ||
| 836 | bnxt_free_vf_resources(bp); | 837 | bnxt_free_vf_resources(bp); |
| 837 | 838 | ||
| 838 | bp->pf.active_vfs = 0; | ||
| 839 | /* Reclaim all resources for the PF. */ | 839 | /* Reclaim all resources for the PF. */ |
| 840 | rtnl_lock(); | 840 | rtnl_lock(); |
| 841 | bnxt_restore_pf_fw_resources(bp); | 841 | bnxt_restore_pf_fw_resources(bp); |
| @@ -1889,7 +1889,8 @@ static void bnxt_tc_setup_indr_rel(void *cb_priv) · 1888 unmodified lines | |||
| 1889 | } | 1889 | } |
| 1890 | 1890 | ||
| 1891 | static int bnxt_tc_setup_indr_block(struct net_device *netdev, struct bnxt *bp, | 1891 | static int bnxt_tc_setup_indr_block(struct net_device *netdev, struct bnxt *bp, |
| 1892 | struct flow_block_offload *f) | 1892 | struct flow_block_offload *f, void *data, |
| 1893 | void (*cleanup)(struct flow_block_cb *block_cb)) | ||
| 1893 | { | 1894 | { |
| 1894 | struct bnxt_flower_indr_block_cb_priv *cb_priv; | 1895 | struct bnxt_flower_indr_block_cb_priv *cb_priv; |
| 1895 | struct flow_block_cb *block_cb; | 1896 | struct flow_block_cb *block_cb; |
| @@ -1907,9 +1908,10 @@ static int bnxt_tc_setup_indr_block(struct net_device *netdev, struct bnxt *bp, · 11 unmodified lines | |||
| 1907 | cb_priv->bp = bp; | 1908 | cb_priv->bp = bp; |
| 1908 | list_add(&cb_priv->list, &bp->tc_indr_block_list); | 1909 | list_add(&cb_priv->list, &bp->tc_indr_block_list); |
| 1909 | 1910 | ||
| 1910 | block_cb = flow_block_cb_alloc(bnxt_tc_setup_indr_block_cb, | 1911 | block_cb = flow_indr_block_cb_alloc(bnxt_tc_setup_indr_block_cb, |
| 1911 | cb_priv, cb_priv, | 1912 | cb_priv, cb_priv, |
| 1912 | bnxt_tc_setup_indr_rel); | 1913 | bnxt_tc_setup_indr_rel, f, |
| 1914 | netdev, data, bp, cleanup); | ||
| 1913 | if (IS_ERR(block_cb)) { | 1915 | if (IS_ERR(block_cb)) { |
| 1914 | list_del(&cb_priv->list); | 1916 | list_del(&cb_priv->list); |
| 1915 | kfree(cb_priv); | 1917 | kfree(cb_priv); |
| @@ -1930,7 +1932,7 @@ static int bnxt_tc_setup_indr_block(struct net_device *netdev, struct bnxt *bp, · 14 unmodified lines | |||
| 1930 | if (!block_cb) | 1932 | if (!block_cb) |
| 1931 | return -ENOENT; | 1933 | return -ENOENT; |
| 1932 | 1934 | ||
| 1933 | flow_block_cb_remove(block_cb, f); | 1935 | flow_indr_block_cb_remove(block_cb, f); |
| 1934 | list_del(&block_cb->driver_list); | 1936 | list_del(&block_cb->driver_list); |
| 1935 | break; | 1937 | break; |
| 1936 | default: | 1938 | default: |
| @@ -1945,14 +1947,17 @@ static bool bnxt_is_netdev_indr_offload(struct net_device *netdev) · 8 unmodified lines | |||
| 1945 | } | 1947 | } |
| 1946 | 1948 | ||
| 1947 | static int bnxt_tc_setup_indr_cb(struct net_device *netdev, void *cb_priv, | 1949 | static int bnxt_tc_setup_indr_cb(struct net_device *netdev, void *cb_priv, |
| 1948 | enum tc_setup_type type, void *type_data) | 1950 | enum tc_setup_type type, void *type_data, |
| 1951 | void *data, | ||
| 1952 | void (*cleanup)(struct flow_block_cb *block_cb)) | ||
| 1949 | { | 1953 | { |
| 1950 | if (!bnxt_is_netdev_indr_offload(netdev)) | 1954 | if (!bnxt_is_netdev_indr_offload(netdev)) |
| 1951 | return -EOPNOTSUPP; | 1955 | return -EOPNOTSUPP; |
| 1952 | 1956 | ||
| 1953 | switch (type) { | 1957 | switch (type) { |
| 1954 | case TC_SETUP_BLOCK: | 1958 | case TC_SETUP_BLOCK: |
| 1955 | return bnxt_tc_setup_indr_block(netdev, cb_priv, type_data); | 1959 | return bnxt_tc_setup_indr_block(netdev, cb_priv, type_data, data, |
| 1960 | cleanup); | ||
| 1956 | default: | 1961 | default: |
| 1957 | break; | 1962 | break; |
| 1958 | } | 1963 | } |
| @@ -2074,7 +2079,7 @@ void bnxt_shutdown_tc(struct bnxt *bp) · 115 unmodified lines | |||
| 2074 | return; | 2079 | return; |
| 2075 | 2080 | ||
| 2076 | flow_indr_dev_unregister(bnxt_tc_setup_indr_cb, bp, | 2081 | flow_indr_dev_unregister(bnxt_tc_setup_indr_cb, bp, |
| 2077 | bnxt_tc_setup_indr_block_cb); | 2082 | bnxt_tc_setup_indr_rel); |
| 2078 | rhashtable_destroy(&tc_info->flow_table); | 2083 | rhashtable_destroy(&tc_info->flow_table); |
| 2079 | rhashtable_destroy(&tc_info->l2_table); | 2084 | rhashtable_destroy(&tc_info->l2_table); |
| 2080 | rhashtable_destroy(&tc_info->decap_l2_table); | 2085 | rhashtable_destroy(&tc_info->decap_l2_table); |
| @@ -459,17 +459,6 @@ static inline void bcmgenet_rdma_ring_writel(struct bcmgenet_priv *priv, · 458 unmodified lines | |||
| 459 | genet_dma_ring_regs[r]); | 459 | genet_dma_ring_regs[r]); |
| 460 | } | 460 | } |
| 461 | 461 | ||
| 462 | static bool bcmgenet_hfb_is_filter_enabled(struct bcmgenet_priv *priv, | ||
| 463 | u32 f_index) | ||
| 464 | { | ||
| 465 | u32 offset; | ||
| 466 | u32 reg; | ||
| 467 | |||
| 468 | offset = HFB_FLT_ENABLE_V3PLUS + (f_index < 32) * sizeof(u32); | ||
| 469 | reg = bcmgenet_hfb_reg_readl(priv, offset); | ||
| 470 | return !!(reg & (1 << (f_index % 32))); | ||
| 471 | } | ||
| 472 | |||
| 473 | static void bcmgenet_hfb_enable_filter(struct bcmgenet_priv *priv, u32 f_index) | 462 | static void bcmgenet_hfb_enable_filter(struct bcmgenet_priv *priv, u32 f_index) |
| 474 | { | 463 | { |
| 475 | u32 offset; | 464 | u32 offset; |
| @@ -533,19 +522,6 @@ static void bcmgenet_hfb_set_filter_length(struct bcmgenet_priv *priv, · 57 unmodified lines | |||
| 533 | bcmgenet_hfb_reg_writel(priv, reg, offset); | 522 | bcmgenet_hfb_reg_writel(priv, reg, offset); |
| 534 | } | 523 | } |
| 535 | 524 | ||
| 536 | static int bcmgenet_hfb_find_unused_filter(struct bcmgenet_priv *priv) | ||
| 537 | { | ||
| 538 | u32 f_index; | ||
| 539 | |||
| 540 | /* First MAX_NUM_OF_FS_RULES are reserved for Rx NFC filters */ | ||
| 541 | for (f_index = MAX_NUM_OF_FS_RULES; | ||
| 542 | f_index < priv->hw_params->hfb_filter_cnt; f_index++) | ||
| 543 | if (!bcmgenet_hfb_is_filter_enabled(priv, f_index)) | ||
| 544 | return f_index; | ||
| 545 | |||
| 546 | return -ENOMEM; | ||
| 547 | } | ||
| 548 | |||
| 549 | static int bcmgenet_hfb_validate_mask(void *mask, size_t size) | 525 | static int bcmgenet_hfb_validate_mask(void *mask, size_t size) |
| 550 | { | 526 | { |
| 551 | while (size) { | 527 | while (size) { |
| @@ -634,8 +610,9 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 82 unmodified lines | |||
| 634 | { | 610 | { |
| 635 | struct ethtool_rx_flow_spec *fs = &rule->fs; | 611 | struct ethtool_rx_flow_spec *fs = &rule->fs; |
| 636 | int err = 0, offset = 0, f_length = 0; | 612 | int err = 0, offset = 0, f_length = 0; |
| 637 | u16 val_16, mask_16; | ||
| 638 | u8 val_8, mask_8; | 613 | u8 val_8, mask_8; |
| 614 | __be16 val_16; | ||
| 615 | u16 mask_16; | ||
| 639 | size_t size; | 616 | size_t size; |
| 640 | u32 *f_data; | 617 | u32 *f_data; |
| 641 | 618 | ||
| @@ -744,59 +721,6 @@ static int bcmgenet_hfb_create_rxnfc_filter(struct bcmgenet_priv *priv, · 102 unmodified lines | |||
| 744 | return err; | 721 | return err; |
| 745 | } | 722 | } |
| 746 | 723 | ||
| 747 | /* bcmgenet_hfb_add_filter | ||
| 748 | * | ||
| 749 | * Add new filter to Hardware Filter Block to match and direct Rx traffic to | ||
| 750 | * desired Rx queue. | ||
| 751 | * | ||
| 752 | * f_data is an array of unsigned 32-bit integers where each 32-bit integer | ||
| 753 | * provides filter data for 2 bytes (4 nibbles) of Rx frame: | ||
| 754 | * | ||
| 755 | * bits 31:20 - unused | ||
| 756 | * bit 19 - nibble 0 match enable | ||
| 757 | * bit 18 - nibble 1 match enable | ||
| 758 | * bit 17 - nibble 2 match enable | ||
| 759 | * bit 16 - nibble 3 match enable | ||
| 760 | * bits 15:12 - nibble 0 data | ||
| 761 | * bits 11:8 - nibble 1 data | ||
| 762 | * bits 7:4 - nibble 2 data | ||
| 763 | * bits 3:0 - nibble 3 data | ||
| 764 | * | ||
| 765 | * Example: | ||
| 766 | * In order to match: | ||
| 767 | * - Ethernet frame type = 0x0800 (IP) | ||
| 768 | * - IP version field = 4 | ||
| 769 | * - IP protocol field = 0x11 (UDP) | ||
| 770 | * | ||
| 771 | * The following filter is needed: | ||
| 772 | * u32 hfb_filter_ipv4_udp[] = { | ||
| 773 | * Rx frame offset 0x00: 0x00000000, 0x00000000, 0x00000000, 0x00000000, | ||
| 774 | * Rx frame offset 0x08: 0x00000000, 0x00000000, 0x000F0800, 0x00084000, | ||
| 775 | * Rx frame offset 0x10: 0x00000000, 0x00000000, 0x00000000, 0x00030011, | ||
| 776 | * }; | ||
| 777 | * | ||
| 778 | * To add the filter to HFB and direct the traffic to Rx queue 0, call: | ||
| 779 | * bcmgenet_hfb_add_filter(priv, hfb_filter_ipv4_udp, | ||
| 780 | * ARRAY_SIZE(hfb_filter_ipv4_udp), 0); | ||
| 781 | */ | ||
| 782 | int bcmgenet_hfb_add_filter(struct bcmgenet_priv *priv, u32 *f_data, | ||
| 783 | u32 f_length, u32 rx_queue) | ||
| 784 | { | ||
| 785 | int f_index; | ||
| 786 | |||
| 787 | f_index = bcmgenet_hfb_find_unused_filter(priv); | ||
| 788 | if (f_index < 0) | ||
| 789 | return -ENOMEM; | ||
| 790 | |||
| 791 | if (f_length > priv->hw_params->hfb_filter_size) | ||
| 792 | return -EINVAL; | ||
| 793 | |||
| 794 | bcmgenet_hfb_set_filter(priv, f_data, f_length, rx_queue, f_index); | ||
| 795 | bcmgenet_hfb_enable_filter(priv, f_index); | ||
| 796 | |||
| 797 | return 0; | ||
| 798 | } | ||
| 799 | |||
| 800 | /* bcmgenet_hfb_clear | 724 | /* bcmgenet_hfb_clear |
| 801 | * | 725 | * |
| 802 | * Clear Hardware Filter Block and disable all filtering. | 726 | * Clear Hardware Filter Block and disable all filtering. |
| @@ -2118,11 +2042,6 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev) · 1315 unmodified lines | |||
| 2118 | goto out; | 2042 | goto out; |
| 2119 | } | 2043 | } |
| 2120 | 2044 | ||
| 2121 | if (skb_padto(skb, ETH_ZLEN)) { | ||
| 2122 | ret = NETDEV_TX_OK; | ||
| 2123 | goto out; | ||
| 2124 | } | ||
| 2125 | |||
| 2126 | /* Retain how many bytes will be sent on the wire, without TSB inserted | 2045 | /* Retain how many bytes will be sent on the wire, without TSB inserted |
| 2127 | * by transmit checksum offload | 2046 | * by transmit checksum offload |
| 2128 | */ | 2047 | */ |
| @@ -2169,6 +2088,9 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev) · 40 unmodified lines | |||
| 2169 | len_stat = (size << DMA_BUFLENGTH_SHIFT) | | 2088 | len_stat = (size << DMA_BUFLENGTH_SHIFT) | |
| 2170 | (priv->hw_params->qtag_mask << DMA_TX_QTAG_SHIFT); | 2089 | (priv->hw_params->qtag_mask << DMA_TX_QTAG_SHIFT); |
| 2171 | 2090 | ||
| 2091 | /* Note: if we ever change from DMA_TX_APPEND_CRC below we | ||
| 2092 | * will need to restore software padding of "runt" packets | ||
| 2093 | */ | ||
| 2172 | if (!i) { | 2094 | if (!i) { |
| 2173 | len_stat |= DMA_TX_APPEND_CRC | DMA_SOP; | 2095 | len_stat |= DMA_TX_APPEND_CRC | DMA_SOP; |
| 2174 | if (skb->ip_summed == CHECKSUM_PARTIAL) | 2096 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
| @@ -18168,8 +18168,8 @@ static pci_ers_result_t tg3_io_error_detected(struct pci_dev *pdev, · 18167 unmodified lines | |||
| 18168 | 18168 | ||
| 18169 | rtnl_lock(); | 18169 | rtnl_lock(); |
| 18170 | 18170 | ||
| 18171 | /* We probably don't have netdev yet */ | 18171 | /* Could be second call or maybe we don't have netdev yet */ |
| 18172 | if (!netdev || !netif_running(netdev)) | 18172 | if (!netdev || tp->pcierr_recovery || !netif_running(netdev)) |
| 18173 | goto done; | 18173 | goto done; |
| 18174 | 18174 | ||
| 18175 | /* We needn't recover from permanent error */ | 18175 | /* We needn't recover from permanent error */ |
| @@ -2558,7 +2558,7 @@ static int macb_open(struct net_device *dev) · 2557 unmodified lines | |||
| 2558 | 2558 | ||
| 2559 | err = macb_phylink_connect(bp); | 2559 | err = macb_phylink_connect(bp); |
| 2560 | if (err) | 2560 | if (err) |
| 2561 | goto napi_exit; | 2561 | goto reset_hw; |
| 2562 | 2562 | ||
| 2563 | netif_tx_start_all_queues(dev); | 2563 | netif_tx_start_all_queues(dev); |
| 2564 | 2564 | ||
| @@ -2567,9 +2567,11 @@ static int macb_open(struct net_device *dev) · 2 unmodified lines | |||
| 2567 | 2567 | ||
| 2568 | return 0; | 2568 | return 0; |
| 2569 | 2569 | ||
| 2570 | napi_exit: | 2570 | reset_hw: |
| 2571 | macb_reset_hw(bp); | ||
| 2571 | for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) | 2572 | for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) |
| 2572 | napi_disable(&queue->napi); | 2573 | napi_disable(&queue->napi); |
| 2574 | macb_free_consistent(bp); | ||
| 2573 | pm_exit: | 2575 | pm_exit: |
| 2574 | pm_runtime_put_sync(&bp->pdev->dev); | 2576 | pm_runtime_put_sync(&bp->pdev->dev); |
| 2575 | return err; | 2577 | return err; |
| @@ -2819,11 +2821,13 @@ static void macb_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) · 243 unmodified lines | |||
| 2819 | { | 2821 | { |
| 2820 | struct macb *bp = netdev_priv(netdev); | 2822 | struct macb *bp = netdev_priv(netdev); |
| 2821 | 2823 | ||
| 2822 | wol->supported = 0; | 2824 | if (bp->wol & MACB_WOL_HAS_MAGIC_PACKET) { |
| 2823 | wol->wolopts = 0; | ||
| 2824 | |||
| 2825 | if (bp->wol & MACB_WOL_HAS_MAGIC_PACKET) | ||
| 2826 | phylink_ethtool_get_wol(bp->phylink, wol); | 2825 | phylink_ethtool_get_wol(bp->phylink, wol); |
| 2826 | wol->supported |= WAKE_MAGIC; | ||
| 2827 | |||
| 2828 | if (bp->wol & MACB_WOL_ENABLED) | ||
| 2829 | wol->wolopts |= WAKE_MAGIC; | ||
| 2830 | } | ||
| 2827 | } | 2831 | } |
| 2828 | 2832 | ||
| 2829 | static int macb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | 2833 | static int macb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) |
| @@ -2831,9 +2835,13 @@ static int macb_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) · 1 unmodified line | |||
| 2831 | struct macb *bp = netdev_priv(netdev); | 2835 | struct macb *bp = netdev_priv(netdev); |
| 2832 | int ret; | 2836 | int ret; |
| 2833 | 2837 | ||
| 2838 | /* Pass the order to phylink layer */ | ||
| 2834 | ret = phylink_ethtool_set_wol(bp->phylink, wol); | 2839 | ret = phylink_ethtool_set_wol(bp->phylink, wol); |
| 2835 | if (!ret) | 2840 | /* Don't manage WoL on MAC if handled by the PHY |
| 2836 | return 0; | 2841 | * or if there's a failure in talking to the PHY |
| 2842 | */ | ||
| 2843 | if (!ret || ret != -EOPNOTSUPP) | ||
| 2844 | return ret; | ||
| 2837 | 2845 | ||
| 2838 | if (!(bp->wol & MACB_WOL_HAS_MAGIC_PACKET) || | 2846 | if (!(bp->wol & MACB_WOL_HAS_MAGIC_PACKET) || |
| 2839 | (wol->wolopts & ~WAKE_MAGIC)) | 2847 | (wol->wolopts & ~WAKE_MAGIC)) |
| @@ -3760,15 +3768,9 @@ static int macb_init(struct platform_device *pdev) · 920 unmodified lines | |||
| 3760 | 3768 | ||
| 3761 | static struct sifive_fu540_macb_mgmt *mgmt; | 3769 | static struct sifive_fu540_macb_mgmt *mgmt; |
| 3762 | 3770 | ||
| 3763 | /* Initialize and start the Receiver and Transmit subsystems */ | 3771 | static int at91ether_alloc_coherent(struct macb *lp) |
| 3764 | static int at91ether_start(struct net_device *dev) | ||
| 3765 | { | 3772 | { |
| 3766 | struct macb *lp = netdev_priv(dev); | ||
| 3767 | struct macb_queue *q = &lp->queues[0]; | 3773 | struct macb_queue *q = &lp->queues[0]; |
| 3768 | struct macb_dma_desc *desc; | ||
| 3769 | dma_addr_t addr; | ||
| 3770 | u32 ctl; | ||
| 3771 | int i; | ||
| 3772 | 3774 | ||
| 3773 | q->rx_ring = dma_alloc_coherent(&lp->pdev->dev, | 3775 | q->rx_ring = dma_alloc_coherent(&lp->pdev->dev, |
| 3774 | (AT91ETHER_MAX_RX_DESCR * | 3776 | (AT91ETHER_MAX_RX_DESCR * |
| @@ -3790,6 +3792,43 @@ static int at91ether_start(struct net_device *dev) · 15 unmodified lines | |||
| 3790 | return -ENOMEM; | 3792 | return -ENOMEM; |
| 3791 | } | 3793 | } |
| 3792 | 3794 | ||
| 3795 | return 0; | ||
| 3796 | } | ||
| 3797 | |||
| 3798 | static void at91ether_free_coherent(struct macb *lp) | ||
| 3799 | { | ||
| 3800 | struct macb_queue *q = &lp->queues[0]; | ||
| 3801 | |||
| 3802 | if (q->rx_ring) { | ||
| 3803 | dma_free_coherent(&lp->pdev->dev, | ||
| 3804 | AT91ETHER_MAX_RX_DESCR * | ||
| 3805 | macb_dma_desc_get_size(lp), | ||
| 3806 | q->rx_ring, q->rx_ring_dma); | ||
| 3807 | q->rx_ring = NULL; | ||
| 3808 | } | ||
| 3809 | |||
| 3810 | if (q->rx_buffers) { | ||
| 3811 | dma_free_coherent(&lp->pdev->dev, | ||
| 3812 | AT91ETHER_MAX_RX_DESCR * | ||
| 3813 | AT91ETHER_MAX_RBUFF_SZ, | ||
| 3814 | q->rx_buffers, q->rx_buffers_dma); | ||
| 3815 | q->rx_buffers = NULL; | ||
| 3816 | } | ||
| 3817 | } | ||
| 3818 | |||
| 3819 | /* Initialize and start the Receiver and Transmit subsystems */ | ||
| 3820 | static int at91ether_start(struct macb *lp) | ||
| 3821 | { | ||
| 3822 | struct macb_queue *q = &lp->queues[0]; | ||
| 3823 | struct macb_dma_desc *desc; | ||
| 3824 | dma_addr_t addr; | ||
| 3825 | u32 ctl; | ||
| 3826 | int i, ret; | ||
| 3827 | |||
| 3828 | ret = at91ether_alloc_coherent(lp); | ||
| 3829 | if (ret) | ||
| 3830 | return ret; | ||
| 3831 | |||
| 3793 | addr = q->rx_buffers_dma; | 3832 | addr = q->rx_buffers_dma; |
| 3794 | for (i = 0; i < AT91ETHER_MAX_RX_DESCR; i++) { | 3833 | for (i = 0; i < AT91ETHER_MAX_RX_DESCR; i++) { |
| 3795 | desc = macb_rx_desc(q, i); | 3834 | desc = macb_rx_desc(q, i); |
| @@ -3811,9 +3850,39 @@ static int at91ether_start(struct net_device *dev) · 15 unmodified lines | |||
| 3811 | ctl = macb_readl(lp, NCR); | 3850 | ctl = macb_readl(lp, NCR); |
| 3812 | macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE)); | 3851 | macb_writel(lp, NCR, ctl | MACB_BIT(RE) | MACB_BIT(TE)); |
| 3813 | 3852 | ||
| 3853 | /* Enable MAC interrupts */ | ||
| 3854 | macb_writel(lp, IER, MACB_BIT(RCOMP) | | ||
| 3855 | MACB_BIT(RXUBR) | | ||
| 3856 | MACB_BIT(ISR_TUND) | | ||
| 3857 | MACB_BIT(ISR_RLE) | | ||
| 3858 | MACB_BIT(TCOMP) | | ||
| 3859 | MACB_BIT(ISR_ROVR) | | ||
| 3860 | MACB_BIT(HRESP)); | ||
| 3861 | |||
| 3814 | return 0; | 3862 | return 0; |
| 3815 | } | 3863 | } |
| 3816 | 3864 | ||
| 3865 | static void at91ether_stop(struct macb *lp) | ||
| 3866 | { | ||
| 3867 | u32 ctl; | ||
| 3868 | |||
| 3869 | /* Disable MAC interrupts */ | ||
| 3870 | macb_writel(lp, IDR, MACB_BIT(RCOMP) | | ||
| 3871 | MACB_BIT(RXUBR) | | ||
| 3872 | MACB_BIT(ISR_TUND) | | ||
| 3873 | MACB_BIT(ISR_RLE) | | ||
| 3874 | MACB_BIT(TCOMP) | | ||
| 3875 | MACB_BIT(ISR_ROVR) | | ||
| 3876 | MACB_BIT(HRESP)); | ||
| 3877 | |||
| 3878 | /* Disable Receiver and Transmitter */ | ||
| 3879 | ctl = macb_readl(lp, NCR); | ||
| 3880 | macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE))); | ||
| 3881 | |||
| 3882 | /* Free resources. */ | ||
| 3883 | at91ether_free_coherent(lp); | ||
| 3884 | } | ||
| 3885 | |||
| 3817 | /* Open the ethernet interface */ | 3886 | /* Open the ethernet interface */ |
| 3818 | static int at91ether_open(struct net_device *dev) | 3887 | static int at91ether_open(struct net_device *dev) |
| 3819 | { | 3888 | { |
| @@ -3833,63 +3902,36 @@ static int at91ether_open(struct net_device *dev) · 13 unmodified lines | |||
| 3833 | 3902 | ||
| 3834 | macb_set_hwaddr(lp); | 3903 | macb_set_hwaddr(lp); |
| 3835 | 3904 | ||
| 3836 | ret = at91ether_start(dev); | 3905 | ret = at91ether_start(lp); |
| 3837 | if (ret) | 3906 | if (ret) |
| 3838 | return ret; | 3907 | goto pm_exit; |
| 3839 | |||
| 3840 | /* Enable MAC interrupts */ | ||
| 3841 | macb_writel(lp, IER, MACB_BIT(RCOMP) | | ||
| 3842 | MACB_BIT(RXUBR) | | ||
| 3843 | MACB_BIT(ISR_TUND) | | ||
| 3844 | MACB_BIT(ISR_RLE) | | ||
| 3845 | MACB_BIT(TCOMP) | | ||
| 3846 | MACB_BIT(ISR_ROVR) | | ||
| 3847 | MACB_BIT(HRESP)); | ||
| 3848 | 3908 | ||
| 3849 | ret = macb_phylink_connect(lp); | 3909 | ret = macb_phylink_connect(lp); |
| 3850 | if (ret) | 3910 | if (ret) |
| 3851 | return ret; | 3911 | goto stop; |
| 3852 | 3912 | ||
| 3853 | netif_start_queue(dev); | 3913 | netif_start_queue(dev); |
| 3854 | 3914 | ||
| 3855 | return 0; | 3915 | return 0; |
| 3916 | |||
| 3917 | stop: | ||
| 3918 | at91ether_stop(lp); | ||
| 3919 | pm_exit: | ||
| 3920 | pm_runtime_put_sync(&lp->pdev->dev); | ||
| 3921 | return ret; | ||
| 3856 | } | 3922 | } |
| 3857 | 3923 | ||
| 3858 | /* Close the interface */ | 3924 | /* Close the interface */ |
| 3859 | static int at91ether_close(struct net_device *dev) | 3925 | static int at91ether_close(struct net_device *dev) |
| 3860 | { | 3926 | { |
| 3861 | struct macb *lp = netdev_priv(dev); | 3927 | struct macb *lp = netdev_priv(dev); |
| 3862 | struct macb_queue *q = &lp->queues[0]; | ||
| 3863 | u32 ctl; | ||
| 3864 | |||
| 3865 | /* Disable Receiver and Transmitter */ | ||
| 3866 | ctl = macb_readl(lp, NCR); | ||
| 3867 | macb_writel(lp, NCR, ctl & ~(MACB_BIT(TE) | MACB_BIT(RE))); | ||
| 3868 | |||
| 3869 | /* Disable MAC interrupts */ | ||
| 3870 | macb_writel(lp, IDR, MACB_BIT(RCOMP) | | ||
| 3871 | MACB_BIT(RXUBR) | | ||
| 3872 | MACB_BIT(ISR_TUND) | | ||
| 3873 | MACB_BIT(ISR_RLE) | | ||
| 3874 | MACB_BIT(TCOMP) | | ||
| 3875 | MACB_BIT(ISR_ROVR) | | ||
| 3876 | MACB_BIT(HRESP)); | ||
| 3877 | 3928 | ||
| 3878 | netif_stop_queue(dev); | 3929 | netif_stop_queue(dev); |
| 3879 | 3930 | ||
| 3880 | phylink_stop(lp->phylink); | 3931 | phylink_stop(lp->phylink); |
| 3881 | phylink_disconnect_phy(lp->phylink); | 3932 | phylink_disconnect_phy(lp->phylink); |
| 3882 | 3933 | ||
| 3883 | dma_free_coherent(&lp->pdev->dev, | 3934 | at91ether_stop(lp); |
| 3884 | AT91ETHER_MAX_RX_DESCR * | ||
| 3885 | macb_dma_desc_get_size(lp), | ||
| 3886 | q->rx_ring, q->rx_ring_dma); | ||
| 3887 | q->rx_ring = NULL; | ||
| 3888 | |||
| 3889 | dma_free_coherent(&lp->pdev->dev, | ||
| 3890 | AT91ETHER_MAX_RX_DESCR * AT91ETHER_MAX_RBUFF_SZ, | ||
| 3891 | q->rx_buffers, q->rx_buffers_dma); | ||
| 3892 | q->rx_buffers = NULL; | ||
| 3893 | 3935 | ||
| 3894 | return pm_runtime_put(&lp->pdev->dev); | 3936 | return pm_runtime_put(&lp->pdev->dev); |
| 3895 | } | 3937 | } |
| @@ -4386,7 +4428,7 @@ static int macb_probe(struct platform_device *pdev) · 490 unmodified lines | |||
| 4386 | bp->wol = 0; | 4428 | bp->wol = 0; |
| 4387 | if (of_get_property(np, "magic-packet", NULL)) | 4429 | if (of_get_property(np, "magic-packet", NULL)) |
| 4388 | bp->wol |= MACB_WOL_HAS_MAGIC_PACKET; | 4430 | bp->wol |= MACB_WOL_HAS_MAGIC_PACKET; |
| 4389 | device_init_wakeup(&pdev->dev, bp->wol & MACB_WOL_HAS_MAGIC_PACKET); | 4431 | device_set_wakeup_capable(&pdev->dev, bp->wol & MACB_WOL_HAS_MAGIC_PACKET); |
| 4390 | 4432 | ||
| 4391 | spin_lock_init(&bp->lock); | 4433 | spin_lock_init(&bp->lock); |
| 4392 | 4434 | ||
| @@ -4562,10 +4604,10 @@ static int __maybe_unused macb_suspend(struct device *dev) · 169 unmodified lines | |||
| 4562 | bp->pm_data.scrt2 = gem_readl_n(bp, ETHT, SCRT2_ETHT); | 4604 | bp->pm_data.scrt2 = gem_readl_n(bp, ETHT, SCRT2_ETHT); |
| 4563 | } | 4605 | } |
| 4564 | 4606 | ||
| 4565 | netif_carrier_off(netdev); | ||
| 4566 | if (bp->ptp_info) | 4607 | if (bp->ptp_info) |
| 4567 | bp->ptp_info->ptp_remove(netdev); | 4608 | bp->ptp_info->ptp_remove(netdev); |
| 4568 | pm_runtime_force_suspend(dev); | 4609 | if (!device_may_wakeup(dev)) |
| 4610 | pm_runtime_force_suspend(dev); | ||
| 4569 | 4611 | ||
| 4570 | return 0; | 4612 | return 0; |
| 4571 | } | 4613 | } |
| @@ -4580,7 +4622,8 @@ static int __maybe_unused macb_resume(struct device *dev) · 8 unmodified lines | |||
| 4580 | if (!netif_running(netdev)) | 4622 | if (!netif_running(netdev)) |
| 4581 | return 0; | 4623 | return 0; |
| 4582 | 4624 | ||
| 4583 | pm_runtime_force_resume(dev); | 4625 | if (!device_may_wakeup(dev)) |
| 4626 | pm_runtime_force_resume(dev); | ||
| 4584 | 4627 | ||
| 4585 | if (bp->wol & MACB_WOL_ENABLED) { | 4628 | if (bp->wol & MACB_WOL_ENABLED) { |
| 4586 | macb_writel(bp, IDR, MACB_BIT(WOL)); | 4629 | macb_writel(bp, IDR, MACB_BIT(WOL)); |
| @@ -4618,7 +4661,7 @@ static int __maybe_unused macb_runtime_suspend(struct device *dev) · 31 unmodified lines | |||
| 4618 | struct net_device *netdev = dev_get_drvdata(dev); | 4661 | struct net_device *netdev = dev_get_drvdata(dev); |
| 4619 | struct macb *bp = netdev_priv(netdev); | 4662 | struct macb *bp = netdev_priv(netdev); |
| 4620 | 4663 | ||
| 4621 | if (!(device_may_wakeup(&bp->dev->dev))) { | 4664 | if (!(device_may_wakeup(dev))) { |
| 4622 | clk_disable_unprepare(bp->tx_clk); | 4665 | clk_disable_unprepare(bp->tx_clk); |
| 4623 | clk_disable_unprepare(bp->hclk); | 4666 | clk_disable_unprepare(bp->hclk); |
| 4624 | clk_disable_unprepare(bp->pclk); | 4667 | clk_disable_unprepare(bp->pclk); |
| @@ -4634,7 +4677,7 @@ static int __maybe_unused macb_runtime_resume(struct device *dev) · 9 unmodified lines | |||
| 4634 | struct net_device *netdev = dev_get_drvdata(dev); | 4677 | struct net_device *netdev = dev_get_drvdata(dev); |
| 4635 | struct macb *bp = netdev_priv(netdev); | 4678 | struct macb *bp = netdev_priv(netdev); |
| 4636 | 4679 | ||
| 4637 | if (!(device_may_wakeup(&bp->dev->dev))) { | 4680 | if (!(device_may_wakeup(dev))) { |
| 4638 | clk_prepare_enable(bp->pclk); | 4681 | clk_prepare_enable(bp->pclk); |
| 4639 | clk_prepare_enable(bp->hclk); | 4682 | clk_prepare_enable(bp->hclk); |
| 4640 | clk_prepare_enable(bp->tx_clk); | 4683 | clk_prepare_enable(bp->tx_clk); |
| @@ -1975,7 +1975,6 @@ int cudbg_collect_dump_context(struct cudbg_init *pdbg_init, · 1974 unmodified lines | |||
| 1975 | u8 mem_type[CTXT_INGRESS + 1] = { 0 }; | 1975 | u8 mem_type[CTXT_INGRESS + 1] = { 0 }; |
| 1976 | struct cudbg_buffer temp_buff = { 0 }; | 1976 | struct cudbg_buffer temp_buff = { 0 }; |
| 1977 | struct cudbg_ch_cntxt *buff; | 1977 | struct cudbg_ch_cntxt *buff; |
| 1978 | u64 *dst_off, *src_off; | ||
| 1979 | u8 *ctx_buf; | 1978 | u8 *ctx_buf; |
| 1980 | u8 i, k; | 1979 | u8 i, k; |
| 1981 | int rc; | 1980 | int rc; |
| @@ -2044,8 +2043,11 @@ int cudbg_collect_dump_context(struct cudbg_init *pdbg_init, · 62 unmodified lines | |||
| 2044 | } | 2043 | } |
| 2045 | 2044 | ||
| 2046 | for (j = 0; j < max_ctx_qid; j++) { | 2045 | for (j = 0; j < max_ctx_qid; j++) { |
| 2046 | __be64 *dst_off; | ||
| 2047 | u64 *src_off; | ||
| 2048 | |||
| 2047 | src_off = (u64 *)(ctx_buf + j * SGE_CTXT_SIZE); | 2049 | src_off = (u64 *)(ctx_buf + j * SGE_CTXT_SIZE); |
| 2048 | dst_off = (u64 *)buff->data; | 2050 | dst_off = (__be64 *)buff->data; |
| 2049 | 2051 | ||
| 2050 | /* The data is stored in 64-bit cpu order. Convert it | 2052 | /* The data is stored in 64-bit cpu order. Convert it |
| 2051 | * to big endian before parsing. | 2053 | * to big endian before parsing. |
| @@ -136,6 +136,9 @@ static inline __u8 bitswap_1(unsigned char val) · 135 unmodified lines | |||
| 136 | ((val & 0x02) << 5) | | 136 | ((val & 0x02) << 5) | |
| 137 | ((val & 0x01) << 7); | 137 | ((val & 0x01) << 7); |
| 138 | } | 138 | } |
| 139 | |||
| 140 | extern const char * const dcb_ver_array[]; | ||
| 141 | |||
| 139 | #define CXGB4_DCB_ENABLED true | 142 | #define CXGB4_DCB_ENABLED true |
| 140 | 143 | ||
| 141 | #else /* !CONFIG_CHELSIO_T4_DCB */ | 144 | #else /* !CONFIG_CHELSIO_T4_DCB */ |
| @@ -2379,7 +2379,6 @@ static const struct file_operations rss_vf_config_debugfs_fops = { · 2378 unmodified lines | |||
| 2379 | }; | 2379 | }; |
| 2380 | 2380 | ||
| 2381 | #ifdef CONFIG_CHELSIO_T4_DCB | 2381 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 2382 | extern char *dcb_ver_array[]; | ||
| 2383 | 2382 | ||
| 2384 | /* Data Center Briging information for each port. | 2383 | /* Data Center Briging information for each port. |
| 2385 | */ | 2384 | */ |
| @@ -588,7 +588,7 @@ static void fw_caps_to_lmm(enum fw_port_type port_type, · 587 unmodified lines | |||
| 588 | /** | 588 | /** |
| 589 | * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware | 589 | * lmm_to_fw_caps - translate ethtool Link Mode Mask to Firmware |
| 590 | * capabilities | 590 | * capabilities |
| 591 | * @et_lmm: ethtool Link Mode Mask | 591 | * @link_mode_mask: ethtool Link Mode Mask |
| 592 | * | 592 | * |
| 593 | * Translate ethtool Link Mode Mask into a Firmware Port capabilities | 593 | * Translate ethtool Link Mode Mask into a Firmware Port capabilities |
| 594 | * value. | 594 | * value. |
| @@ -165,6 +165,9 @@ static void set_nat_params(struct adapter *adap, struct filter_entry *f, · 164 unmodified lines | |||
| 165 | unsigned int tid, bool dip, bool sip, bool dp, | 165 | unsigned int tid, bool dip, bool sip, bool dp, |
| 166 | bool sp) | 166 | bool sp) |
| 167 | { | 167 | { |
| 168 | u8 *nat_lp = (u8 *)&f->fs.nat_lport; | ||
| 169 | u8 *nat_fp = (u8 *)&f->fs.nat_fport; | ||
| 170 | |||
| 168 | if (dip) { | 171 | if (dip) { |
| 169 | if (f->fs.type) { | 172 | if (f->fs.type) { |
| 170 | set_tcb_field(adap, f, tid, TCB_SND_UNA_RAW_W, | 173 | set_tcb_field(adap, f, tid, TCB_SND_UNA_RAW_W, |
| @@ -236,8 +239,9 @@ static void set_nat_params(struct adapter *adap, struct filter_entry *f, · 65 unmodified lines | |||
| 236 | } | 239 | } |
| 237 | 240 | ||
| 238 | set_tcb_field(adap, f, tid, TCB_PDU_HDR_LEN_W, WORD_MASK, | 241 | set_tcb_field(adap, f, tid, TCB_PDU_HDR_LEN_W, WORD_MASK, |
| 239 | (dp ? f->fs.nat_lport : 0) | | 242 | (dp ? (nat_lp[1] | nat_lp[0] << 8) : 0) | |
| 240 | (sp ? f->fs.nat_fport << 16 : 0), 1); | 243 | (sp ? (nat_fp[1] << 16 | nat_fp[0] << 24) : 0), |
| 244 | 1); | ||
| 241 | } | 245 | } |
| 242 | 246 | ||
| 243 | /* Validate filter spec against configuration done on the card. */ | 247 | /* Validate filter spec against configuration done on the card. */ |
| @@ -909,6 +913,9 @@ int set_filter_wr(struct adapter *adapter, int fidx) · 665 unmodified lines | |||
| 909 | fwr->fpm = htons(f->fs.mask.fport); | 913 | fwr->fpm = htons(f->fs.mask.fport); |
| 910 | 914 | ||
| 911 | if (adapter->params.filter2_wr_support) { | 915 | if (adapter->params.filter2_wr_support) { |
| 916 | u8 *nat_lp = (u8 *)&f->fs.nat_lport; | ||
| 917 | u8 *nat_fp = (u8 *)&f->fs.nat_fport; | ||
| 918 | |||
| 912 | fwr->natmode_to_ulp_type = | 919 | fwr->natmode_to_ulp_type = |
| 913 | FW_FILTER2_WR_ULP_TYPE_V(f->fs.nat_mode ? | 920 | FW_FILTER2_WR_ULP_TYPE_V(f->fs.nat_mode ? |
| 914 | ULP_MODE_TCPDDP : | 921 | ULP_MODE_TCPDDP : |
| @@ -916,8 +923,8 @@ int set_filter_wr(struct adapter *adapter, int fidx) · 1 unmodified line | |||
| 916 | FW_FILTER2_WR_NATMODE_V(f->fs.nat_mode); | 923 | FW_FILTER2_WR_NATMODE_V(f->fs.nat_mode); |
| 917 | memcpy(fwr->newlip, f->fs.nat_lip, sizeof(fwr->newlip)); | 924 | memcpy(fwr->newlip, f->fs.nat_lip, sizeof(fwr->newlip)); |
| 918 | memcpy(fwr->newfip, f->fs.nat_fip, sizeof(fwr->newfip)); | 925 | memcpy(fwr->newfip, f->fs.nat_fip, sizeof(fwr->newfip)); |
| 919 | fwr->newlport = htons(f->fs.nat_lport); | 926 | fwr->newlport = htons(nat_lp[1] | nat_lp[0] << 8); |
| 920 | fwr->newfport = htons(f->fs.nat_fport); | 927 | fwr->newfport = htons(nat_fp[1] | nat_fp[0] << 8); |
| 921 | } | 928 | } |
| 922 | 929 | ||
| 923 | /* Mark the filter as "pending" and ship off the Filter Work Request. | 930 | /* Mark the filter as "pending" and ship off the Filter Work Request. |
| @@ -1105,16 +1112,16 @@ static bool is_addr_all_mask(u8 *ipmask, int family) · 181 unmodified lines | |||
| 1105 | struct in_addr *addr; | 1112 | struct in_addr *addr; |
| 1106 | 1113 | ||
| 1107 | addr = (struct in_addr *)ipmask; | 1114 | addr = (struct in_addr *)ipmask; |
| 1108 | if (addr->s_addr == 0xffffffff) | 1115 | if (addr->s_addr == htonl(0xffffffff)) |
| 1109 | return true; | 1116 | return true; |
| 1110 | } else if (family == AF_INET6) { | 1117 | } else if (family == AF_INET6) { |
| 1111 | struct in6_addr *addr6; | 1118 | struct in6_addr *addr6; |
| 1112 | 1119 | ||
| 1113 | addr6 = (struct in6_addr *)ipmask; | 1120 | addr6 = (struct in6_addr *)ipmask; |
| 1114 | if (addr6->s6_addr32[0] == 0xffffffff && | 1121 | if (addr6->s6_addr32[0] == htonl(0xffffffff) && |
| 1115 | addr6->s6_addr32[1] == 0xffffffff && | 1122 | addr6->s6_addr32[1] == htonl(0xffffffff) && |
| 1116 | addr6->s6_addr32[2] == 0xffffffff && | 1123 | addr6->s6_addr32[2] == htonl(0xffffffff) && |
| 1117 | addr6->s6_addr32[3] == 0xffffffff) | 1124 | addr6->s6_addr32[3] == htonl(0xffffffff)) |
| 1118 | return true; | 1125 | return true; |
| 1119 | } | 1126 | } |
| 1120 | return false; | 1127 | return false; |
| @@ -449,7 +449,7 @@ static int set_rxmode(struct net_device *dev, int mtu, bool sleep_ok) · 448 unmodified lines | |||
| 449 | * or -1 | 449 | * or -1 |
| 450 | * @addr: the new MAC address value | 450 | * @addr: the new MAC address value |
| 451 | * @persist: whether a new MAC allocation should be persistent | 451 | * @persist: whether a new MAC allocation should be persistent |
| 452 | * @add_smt: if true also add the address to the HW SMT | 452 | * @smt_idx: the destination to store the new SMT index. |
| 453 | * | 453 | * |
| 454 | * Modifies an MPS filter and sets it to the new MAC address if | 454 | * Modifies an MPS filter and sets it to the new MAC address if |
| 455 | * @tcam_idx >= 0, or adds the MAC address to a new filter if | 455 | * @tcam_idx >= 0, or adds the MAC address to a new filter if |
| @@ -1615,6 +1615,7 @@ static int tid_init(struct tid_info *t) · 1159 unmodified lines | |||
| 1615 | * @stid: the server TID | 1615 | * @stid: the server TID |
| 1616 | * @sip: local IP address to bind server to | 1616 | * @sip: local IP address to bind server to |
| 1617 | * @sport: the server's TCP port | 1617 | * @sport: the server's TCP port |
| 1618 | * @vlan: the VLAN header information | ||
| 1618 | * @queue: queue to direct messages from this server to | 1619 | * @queue: queue to direct messages from this server to |
| 1619 | * | 1620 | * |
| 1620 | * Create an IP server for the given port and address. | 1621 | * Create an IP server for the given port and address. |
| @@ -2609,7 +2610,7 @@ int cxgb4_create_server_filter(const struct net_device *dev, unsigned int stid, · 988 unmodified lines | |||
| 2609 | 2610 | ||
| 2610 | /* Clear out filter specifications */ | 2611 | /* Clear out filter specifications */ |
| 2611 | memset(&f->fs, 0, sizeof(struct ch_filter_specification)); | 2612 | memset(&f->fs, 0, sizeof(struct ch_filter_specification)); |
| 2612 | f->fs.val.lport = cpu_to_be16(sport); | 2613 | f->fs.val.lport = be16_to_cpu(sport); |
| 2613 | f->fs.mask.lport = ~0; | 2614 | f->fs.mask.lport = ~0; |
| 2614 | val = (u8 *)&sip; | 2615 | val = (u8 *)&sip; |
| 2615 | if ((val[0] | val[1] | val[2] | val[3]) != 0) { | 2616 | if ((val[0] | val[1] | val[2] | val[3]) != 0) { |
| @@ -5377,10 +5378,10 @@ static inline bool is_x_10g_port(const struct link_config *lc) · 2761 unmodified lines | |||
| 5377 | static int cfg_queues(struct adapter *adap) | 5378 | static int cfg_queues(struct adapter *adap) |
| 5378 | { | 5379 | { |
| 5379 | u32 avail_qsets, avail_eth_qsets, avail_uld_qsets; | 5380 | u32 avail_qsets, avail_eth_qsets, avail_uld_qsets; |
| 5380 | u32 i, n10g = 0, qidx = 0, n1g = 0; | ||
| 5381 | u32 ncpus = num_online_cpus(); | 5381 | u32 ncpus = num_online_cpus(); |
| 5382 | u32 niqflint, neq, num_ulds; | 5382 | u32 niqflint, neq, num_ulds; |
| 5383 | struct sge *s = &adap->sge; | 5383 | struct sge *s = &adap->sge; |
| 5384 | u32 i, n10g = 0, qidx = 0; | ||
| 5384 | u32 q10g = 0, q1g; | 5385 | u32 q10g = 0, q1g; |
| 5385 | 5386 | ||
| 5386 | /* Reduce memory usage in kdump environment, disable all offload. */ | 5387 | /* Reduce memory usage in kdump environment, disable all offload. */ |
| @@ -5426,7 +5427,6 @@ static int cfg_queues(struct adapter *adap) · 39 unmodified lines | |||
| 5426 | if (n10g) | 5427 | if (n10g) |
| 5427 | q10g = (avail_eth_qsets - (adap->params.nports - n10g)) / n10g; | 5428 | q10g = (avail_eth_qsets - (adap->params.nports - n10g)) / n10g; |
| 5428 | 5429 | ||
| 5429 | n1g = adap->params.nports - n10g; | ||
| 5430 | #ifdef CONFIG_CHELSIO_T4_DCB | 5430 | #ifdef CONFIG_CHELSIO_T4_DCB |
| 5431 | /* For Data Center Bridging support we need to be able to support up | 5431 | /* For Data Center Bridging support we need to be able to support up |
| 5432 | * to 8 Traffic Priorities; each of which will be assigned to its | 5432 | * to 8 Traffic Priorities; each of which will be assigned to its |
| @@ -5444,7 +5444,8 @@ static int cfg_queues(struct adapter *adap) · 11 unmodified lines | |||
| 5444 | else | 5444 | else |
| 5445 | q10g = max(8U, q10g); | 5445 | q10g = max(8U, q10g); |
| 5446 | 5446 | ||
| 5447 | while ((q10g * n10g) > (avail_eth_qsets - n1g * q1g)) | 5447 | while ((q10g * n10g) > |
| 5448 | (avail_eth_qsets - (adap->params.nports - n10g) * q1g)) | ||
| 5448 | q10g--; | 5449 | q10g--; |
| 5449 | 5450 | ||
| 5450 | #else /* !CONFIG_CHELSIO_T4_DCB */ | 5451 | #else /* !CONFIG_CHELSIO_T4_DCB */ |
| @@ -194,6 +194,7 @@ int cxgb4_ptp_redirect_rx_packet(struct adapter *adapter, struct port_info *pi) · 193 unmodified lines | |||
| 194 | } | 194 | } |
| 195 | 195 | ||
| 196 | /** | 196 | /** |
| 197 | * cxgb4_ptp_adjfreq - Adjust frequency of PHC cycle counter | ||
| 197 | * @ptp: ptp clock structure | 198 | * @ptp: ptp clock structure |
| 198 | * @ppb: Desired frequency change in parts per billion | 199 | * @ppb: Desired frequency change in parts per billion |
| 199 | * | 200 | * |
| @@ -229,7 +230,7 @@ static int cxgb4_ptp_adjfreq(struct ptp_clock_info *ptp, s32 ppb) · 29 unmodified lines | |||
| 229 | 230 | ||
| 230 | /** | 231 | /** |
| 231 | * cxgb4_ptp_fineadjtime - Shift the time of the hardware clock | 232 | * cxgb4_ptp_fineadjtime - Shift the time of the hardware clock |
| 232 | * @ptp: ptp clock structure | 233 | * @adapter: board private structure |
| 233 | * @delta: Desired change in nanoseconds | 234 | * @delta: Desired change in nanoseconds |
| 234 | * | 235 | * |
| 235 | * Adjust the timer by resetting the timecounter structure. | 236 | * Adjust the timer by resetting the timecounter structure. |
| @@ -58,10 +58,6 @@ static struct ch_tc_pedit_fields pedits[] = { · 57 unmodified lines | |||
| 58 | PEDIT_FIELDS(IP6_, DST_63_32, 4, nat_lip, 4), | 58 | PEDIT_FIELDS(IP6_, DST_63_32, 4, nat_lip, 4), |
| 59 | PEDIT_FIELDS(IP6_, DST_95_64, 4, nat_lip, 8), | 59 | PEDIT_FIELDS(IP6_, DST_95_64, 4, nat_lip, 8), |
| 60 | PEDIT_FIELDS(IP6_, DST_127_96, 4, nat_lip, 12), | 60 | PEDIT_FIELDS(IP6_, DST_127_96, 4, nat_lip, 12), |
| 61 | PEDIT_FIELDS(TCP_, SPORT, 2, nat_fport, 0), | ||
| 62 | PEDIT_FIELDS(TCP_, DPORT, 2, nat_lport, 0), | ||
| 63 | PEDIT_FIELDS(UDP_, SPORT, 2, nat_fport, 0), | ||
| 64 | PEDIT_FIELDS(UDP_, DPORT, 2, nat_lport, 0), | ||
| 65 | }; | 61 | }; |
| 66 | 62 | ||
| 67 | static struct ch_tc_flower_entry *allocate_flower_entry(void) | 63 | static struct ch_tc_flower_entry *allocate_flower_entry(void) |
| @@ -156,14 +152,14 @@ static void cxgb4_process_flow_match(struct net_device *dev, · 88 unmodified lines | |||
| 156 | struct flow_match_ports match; | 152 | struct flow_match_ports match; |
| 157 | 153 | ||
| 158 | flow_rule_match_ports(rule, &match); | 154 | flow_rule_match_ports(rule, &match); |
| 159 | fs->val.lport = cpu_to_be16(match.key->dst); | 155 | fs->val.lport = be16_to_cpu(match.key->dst); |
| 160 | fs->mask.lport = cpu_to_be16(match.mask->dst); | 156 | fs->mask.lport = be16_to_cpu(match.mask->dst); |
| 161 | fs->val.fport = cpu_to_be16(match.key->src); | 157 | fs->val.fport = be16_to_cpu(match.key->src); |
| 162 | fs->mask.fport = cpu_to_be16(match.mask->src); | 158 | fs->mask.fport = be16_to_cpu(match.mask->src); |
| 163 | 159 | ||
| 164 | /* also initialize nat_lport/fport to same values */ | 160 | /* also initialize nat_lport/fport to same values */ |
| 165 | fs->nat_lport = cpu_to_be16(match.key->dst); | 161 | fs->nat_lport = fs->val.lport; |
| 166 | fs->nat_fport = cpu_to_be16(match.key->src); | 162 | fs->nat_fport = fs->val.fport; |
| 167 | } | 163 | } |
| 168 | 164 | ||
| 169 | if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IP)) { | 165 | if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_IP)) { |
| @@ -354,12 +350,9 @@ static void process_pedit_field(struct ch_filter_specification *fs, u32 val, · 184 unmodified lines | |||
| 354 | switch (offset) { | 350 | switch (offset) { |
| 355 | case PEDIT_TCP_SPORT_DPORT: | 351 | case PEDIT_TCP_SPORT_DPORT: |
| 356 | if (~mask & PEDIT_TCP_UDP_SPORT_MASK) | 352 | if (~mask & PEDIT_TCP_UDP_SPORT_MASK) |
| 357 | offload_pedit(fs, cpu_to_be32(val) >> 16, | 353 | fs->nat_fport = val; |
| 358 | cpu_to_be32(mask) >> 16, | ||
| 359 | TCP_SPORT); | ||
| 360 | else | 354 | else |
| 361 | offload_pedit(fs, cpu_to_be32(val), | 355 | fs->nat_lport = val >> 16; |
| 362 | cpu_to_be32(mask), TCP_DPORT); | ||
| 363 | } | 356 | } |
| 364 | fs->nat_mode = NAT_MODE_ALL; | 357 | fs->nat_mode = NAT_MODE_ALL; |
| 365 | break; | 358 | break; |
| @@ -367,12 +360,9 @@ static void process_pedit_field(struct ch_filter_specification *fs, u32 val, · 1 unmodified line | |||
| 367 | switch (offset) { | 360 | switch (offset) { |
| 368 | case PEDIT_UDP_SPORT_DPORT: | 361 | case PEDIT_UDP_SPORT_DPORT: |
| 369 | if (~mask & PEDIT_TCP_UDP_SPORT_MASK) | 362 | if (~mask & PEDIT_TCP_UDP_SPORT_MASK) |
| 370 | offload_pedit(fs, cpu_to_be32(val) >> 16, | 363 | fs->nat_fport = val; |
| 371 | cpu_to_be32(mask) >> 16, | ||
| 372 | UDP_SPORT); | ||
| 373 | else | 364 | else |
| 374 | offload_pedit(fs, cpu_to_be32(val), | 365 | fs->nat_lport = val >> 16; |
| 375 | cpu_to_be32(mask), UDP_DPORT); | ||
| 376 | } | 366 | } |
| 377 | fs->nat_mode = NAT_MODE_ALL; | 367 | fs->nat_mode = NAT_MODE_ALL; |
| 378 | } | 368 | } |
| @@ -48,7 +48,7 @@ static int fill_match_fields(struct adapter *adap, · 47 unmodified lines | |||
| 48 | bool next_header) | 48 | bool next_header) |
| 49 | { | 49 | { |
| 50 | unsigned int i, j; | 50 | unsigned int i, j; |
| 51 | u32 val, mask; | 51 | __be32 val, mask; |
| 52 | int off, err; | 52 | int off, err; |
| 53 | bool found; | 53 | bool found; |
| 54 | 54 | ||
| @@ -228,7 +228,7 @@ int cxgb4_config_knode(struct net_device *dev, struct tc_cls_u32_offload *cls) · 173 unmodified lines | |||
| 228 | const struct cxgb4_next_header *next; | 228 | const struct cxgb4_next_header *next; |
| 229 | bool found = false; | 229 | bool found = false; |
| 230 | unsigned int i, j; | 230 | unsigned int i, j; |
| 231 | u32 val, mask; | 231 | __be32 val, mask; |
| 232 | int off; | 232 | int off; |
| 233 | 233 | ||
| 234 | if (t->table[link_uhtid - 1].link_handle) { | 234 | if (t->table[link_uhtid - 1].link_handle) { |
| @@ -242,10 +242,10 @@ int cxgb4_config_knode(struct net_device *dev, struct tc_cls_u32_offload *cls) · 7 unmodified lines | |||
| 242 | 242 | ||
| 243 | /* Try to find matches that allow jumps to next header. */ | 243 | /* Try to find matches that allow jumps to next header. */ |
| 244 | for (i = 0; next[i].jump; i++) { | 244 | for (i = 0; next[i].jump; i++) { |
| 245 | if (next[i].offoff != cls->knode.sel->offoff || | 245 | if (next[i].sel.offoff != cls->knode.sel->offoff || |
| 246 | next[i].shift != cls->knode.sel->offshift || | 246 | next[i].sel.offshift != cls->knode.sel->offshift || |
| 247 | next[i].mask != cls->knode.sel->offmask || | 247 | next[i].sel.offmask != cls->knode.sel->offmask || |
| 248 | next[i].offset != cls->knode.sel->off) | 248 | next[i].sel.off != cls->knode.sel->off) |
| 249 | continue; | 249 | continue; |
| 250 | 250 | ||
| 251 | /* Found a possible candidate. Find a key that | 251 | /* Found a possible candidate. Find a key that |
| @@ -257,9 +257,9 @@ int cxgb4_config_knode(struct net_device *dev, struct tc_cls_u32_offload *cls) · 5 unmodified lines | |||
| 257 | val = cls->knode.sel->keys[j].val; | 257 | val = cls->knode.sel->keys[j].val; |
| 258 | mask = cls->knode.sel->keys[j].mask; | 258 | mask = cls->knode.sel->keys[j].mask; |
| 259 | 259 | ||
| 260 | if (next[i].match_off == off && | 260 | if (next[i].key.off == off && |
| 261 | next[i].match_val == val && | 261 | next[i].key.val == val && |
| 262 | next[i].match_mask == mask) { | 262 | next[i].key.mask == mask) { |
| 263 | found = true; | 263 | found = true; |
| 264 | break; | 264 | break; |
| 265 | } | 265 | } |
| @@ -38,12 +38,12 @@ · 37 unmodified lines | |||
| 38 | struct cxgb4_match_field { | 38 | struct cxgb4_match_field { |
| 39 | int off; /* Offset from the beginning of the header to match */ | 39 | int off; /* Offset from the beginning of the header to match */ |
| 40 | /* Fill the value/mask pair in the spec if matched */ | 40 | /* Fill the value/mask pair in the spec if matched */ |
| 41 | int (*val)(struct ch_filter_specification *f, u32 val, u32 mask); | 41 | int (*val)(struct ch_filter_specification *f, __be32 val, __be32 mask); |
| 42 | }; | 42 | }; |
| 43 | 43 | ||
| 44 | /* IPv4 match fields */ | 44 | /* IPv4 match fields */ |
| 45 | static inline int cxgb4_fill_ipv4_tos(struct ch_filter_specification *f, | 45 | static inline int cxgb4_fill_ipv4_tos(struct ch_filter_specification *f, |
| 46 | u32 val, u32 mask) | 46 | __be32 val, __be32 mask) |
| 47 | { | 47 | { |
| 48 | f->val.tos = (ntohl(val) >> 16) & 0x000000FF; | 48 | f->val.tos = (ntohl(val) >> 16) & 0x000000FF; |
| 49 | f->mask.tos = (ntohl(mask) >> 16) & 0x000000FF; | 49 | f->mask.tos = (ntohl(mask) >> 16) & 0x000000FF; |
| @@ -52,7 +52,7 @@ static inline int cxgb4_fill_ipv4_tos(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 52 | } | 52 | } |
| 53 | 53 | ||
| 54 | static inline int cxgb4_fill_ipv4_frag(struct ch_filter_specification *f, | 54 | static inline int cxgb4_fill_ipv4_frag(struct ch_filter_specification *f, |
| 55 | u32 val, u32 mask) | 55 | __be32 val, __be32 mask) |
| 56 | { | 56 | { |
| 57 | u32 mask_val; | 57 | u32 mask_val; |
| 58 | u8 frag_val; | 58 | u8 frag_val; |
| @@ -74,7 +74,7 @@ static inline int cxgb4_fill_ipv4_frag(struct ch_filter_specification *f, · 15 unmodified lines | |||
| 74 | } | 74 | } |
| 75 | 75 | ||
| 76 | static inline int cxgb4_fill_ipv4_proto(struct ch_filter_specification *f, | 76 | static inline int cxgb4_fill_ipv4_proto(struct ch_filter_specification *f, |
| 77 | u32 val, u32 mask) | 77 | __be32 val, __be32 mask) |
| 78 | { | 78 | { |
| 79 | f->val.proto = (ntohl(val) >> 16) & 0x000000FF; | 79 | f->val.proto = (ntohl(val) >> 16) & 0x000000FF; |
| 80 | f->mask.proto = (ntohl(mask) >> 16) & 0x000000FF; | 80 | f->mask.proto = (ntohl(mask) >> 16) & 0x000000FF; |
| @@ -83,7 +83,7 @@ static inline int cxgb4_fill_ipv4_proto(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 83 | } | 83 | } |
| 84 | 84 | ||
| 85 | static inline int cxgb4_fill_ipv4_src_ip(struct ch_filter_specification *f, | 85 | static inline int cxgb4_fill_ipv4_src_ip(struct ch_filter_specification *f, |
| 86 | u32 val, u32 mask) | 86 | __be32 val, __be32 mask) |
| 87 | { | 87 | { |
| 88 | memcpy(&f->val.fip[0], &val, sizeof(u32)); | 88 | memcpy(&f->val.fip[0], &val, sizeof(u32)); |
| 89 | memcpy(&f->mask.fip[0], &mask, sizeof(u32)); | 89 | memcpy(&f->mask.fip[0], &mask, sizeof(u32)); |
| @@ -92,7 +92,7 @@ static inline int cxgb4_fill_ipv4_src_ip(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 92 | } | 92 | } |
| 93 | 93 | ||
| 94 | static inline int cxgb4_fill_ipv4_dst_ip(struct ch_filter_specification *f, | 94 | static inline int cxgb4_fill_ipv4_dst_ip(struct ch_filter_specification *f, |
| 95 | u32 val, u32 mask) | 95 | __be32 val, __be32 mask) |
| 96 | { | 96 | { |
| 97 | memcpy(&f->val.lip[0], &val, sizeof(u32)); | 97 | memcpy(&f->val.lip[0], &val, sizeof(u32)); |
| 98 | memcpy(&f->mask.lip[0], &mask, sizeof(u32)); | 98 | memcpy(&f->mask.lip[0], &mask, sizeof(u32)); |
| @@ -111,7 +111,7 @@ static const struct cxgb4_match_field cxgb4_ipv4_fields[] = { · 12 unmodified lines | |||
| 111 | 111 | ||
| 112 | /* IPv6 match fields */ | 112 | /* IPv6 match fields */ |
| 113 | static inline int cxgb4_fill_ipv6_tos(struct ch_filter_specification *f, | 113 | static inline int cxgb4_fill_ipv6_tos(struct ch_filter_specification *f, |
| 114 | u32 val, u32 mask) | 114 | __be32 val, __be32 mask) |
| 115 | { | 115 | { |
| 116 | f->val.tos = (ntohl(val) >> 20) & 0x000000FF; | 116 | f->val.tos = (ntohl(val) >> 20) & 0x000000FF; |
| 117 | f->mask.tos = (ntohl(mask) >> 20) & 0x000000FF; | 117 | f->mask.tos = (ntohl(mask) >> 20) & 0x000000FF; |
| @@ -120,7 +120,7 @@ static inline int cxgb4_fill_ipv6_tos(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 120 | } | 120 | } |
| 121 | 121 | ||
| 122 | static inline int cxgb4_fill_ipv6_proto(struct ch_filter_specification *f, | 122 | static inline int cxgb4_fill_ipv6_proto(struct ch_filter_specification *f, |
| 123 | u32 val, u32 mask) | 123 | __be32 val, __be32 mask) |
| 124 | { | 124 | { |
| 125 | f->val.proto = (ntohl(val) >> 8) & 0x000000FF; | 125 | f->val.proto = (ntohl(val) >> 8) & 0x000000FF; |
| 126 | f->mask.proto = (ntohl(mask) >> 8) & 0x000000FF; | 126 | f->mask.proto = (ntohl(mask) >> 8) & 0x000000FF; |
| @@ -129,7 +129,7 @@ static inline int cxgb4_fill_ipv6_proto(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 129 | } | 129 | } |
| 130 | 130 | ||
| 131 | static inline int cxgb4_fill_ipv6_src_ip0(struct ch_filter_specification *f, | 131 | static inline int cxgb4_fill_ipv6_src_ip0(struct ch_filter_specification *f, |
| 132 | u32 val, u32 mask) | 132 | __be32 val, __be32 mask) |
| 133 | { | 133 | { |
| 134 | memcpy(&f->val.fip[0], &val, sizeof(u32)); | 134 | memcpy(&f->val.fip[0], &val, sizeof(u32)); |
| 135 | memcpy(&f->mask.fip[0], &mask, sizeof(u32)); | 135 | memcpy(&f->mask.fip[0], &mask, sizeof(u32)); |
| @@ -138,7 +138,7 @@ static inline int cxgb4_fill_ipv6_src_ip0(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 138 | } | 138 | } |
| 139 | 139 | ||
| 140 | static inline int cxgb4_fill_ipv6_src_ip1(struct ch_filter_specification *f, | 140 | static inline int cxgb4_fill_ipv6_src_ip1(struct ch_filter_specification *f, |
| 141 | u32 val, u32 mask) | 141 | __be32 val, __be32 mask) |
| 142 | { | 142 | { |
| 143 | memcpy(&f->val.fip[4], &val, sizeof(u32)); | 143 | memcpy(&f->val.fip[4], &val, sizeof(u32)); |
| 144 | memcpy(&f->mask.fip[4], &mask, sizeof(u32)); | 144 | memcpy(&f->mask.fip[4], &mask, sizeof(u32)); |
| @@ -147,7 +147,7 @@ static inline int cxgb4_fill_ipv6_src_ip1(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 147 | } | 147 | } |
| 148 | 148 | ||
| 149 | static inline int cxgb4_fill_ipv6_src_ip2(struct ch_filter_specification *f, | 149 | static inline int cxgb4_fill_ipv6_src_ip2(struct ch_filter_specification *f, |
| 150 | u32 val, u32 mask) | 150 | __be32 val, __be32 mask) |
| 151 | { | 151 | { |
| 152 | memcpy(&f->val.fip[8], &val, sizeof(u32)); | 152 | memcpy(&f->val.fip[8], &val, sizeof(u32)); |
| 153 | memcpy(&f->mask.fip[8], &mask, sizeof(u32)); | 153 | memcpy(&f->mask.fip[8], &mask, sizeof(u32)); |
| @@ -156,7 +156,7 @@ static inline int cxgb4_fill_ipv6_src_ip2(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 156 | } | 156 | } |
| 157 | 157 | ||
| 158 | static inline int cxgb4_fill_ipv6_src_ip3(struct ch_filter_specification *f, | 158 | static inline int cxgb4_fill_ipv6_src_ip3(struct ch_filter_specification *f, |
| 159 | u32 val, u32 mask) | 159 | __be32 val, __be32 mask) |
| 160 | { | 160 | { |
| 161 | memcpy(&f->val.fip[12], &val, sizeof(u32)); | 161 | memcpy(&f->val.fip[12], &val, sizeof(u32)); |
| 162 | memcpy(&f->mask.fip[12], &mask, sizeof(u32)); | 162 | memcpy(&f->mask.fip[12], &mask, sizeof(u32)); |
| @@ -165,7 +165,7 @@ static inline int cxgb4_fill_ipv6_src_ip3(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 165 | } | 165 | } |
| 166 | 166 | ||
| 167 | static inline int cxgb4_fill_ipv6_dst_ip0(struct ch_filter_specification *f, | 167 | static inline int cxgb4_fill_ipv6_dst_ip0(struct ch_filter_specification *f, |
| 168 | u32 val, u32 mask) | 168 | __be32 val, __be32 mask) |
| 169 | { | 169 | { |
| 170 | memcpy(&f->val.lip[0], &val, sizeof(u32)); | 170 | memcpy(&f->val.lip[0], &val, sizeof(u32)); |
| 171 | memcpy(&f->mask.lip[0], &mask, sizeof(u32)); | 171 | memcpy(&f->mask.lip[0], &mask, sizeof(u32)); |
| @@ -174,7 +174,7 @@ static inline int cxgb4_fill_ipv6_dst_ip0(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 174 | } | 174 | } |
| 175 | 175 | ||
| 176 | static inline int cxgb4_fill_ipv6_dst_ip1(struct ch_filter_specification *f, | 176 | static inline int cxgb4_fill_ipv6_dst_ip1(struct ch_filter_specification *f, |
| 177 | u32 val, u32 mask) | 177 | __be32 val, __be32 mask) |
| 178 | { | 178 | { |
| 179 | memcpy(&f->val.lip[4], &val, sizeof(u32)); | 179 | memcpy(&f->val.lip[4], &val, sizeof(u32)); |
| 180 | memcpy(&f->mask.lip[4], &mask, sizeof(u32)); | 180 | memcpy(&f->mask.lip[4], &mask, sizeof(u32)); |
| @@ -183,7 +183,7 @@ static inline int cxgb4_fill_ipv6_dst_ip1(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 183 | } | 183 | } |
| 184 | 184 | ||
| 185 | static inline int cxgb4_fill_ipv6_dst_ip2(struct ch_filter_specification *f, | 185 | static inline int cxgb4_fill_ipv6_dst_ip2(struct ch_filter_specification *f, |
| 186 | u32 val, u32 mask) | 186 | __be32 val, __be32 mask) |
| 187 | { | 187 | { |
| 188 | memcpy(&f->val.lip[8], &val, sizeof(u32)); | 188 | memcpy(&f->val.lip[8], &val, sizeof(u32)); |
| 189 | memcpy(&f->mask.lip[8], &mask, sizeof(u32)); | 189 | memcpy(&f->mask.lip[8], &mask, sizeof(u32)); |
| @@ -192,7 +192,7 @@ static inline int cxgb4_fill_ipv6_dst_ip2(struct ch_filter_specification *f, · 2 unmodified lines | |||
| 192 | } | 192 | } |
| 193 | 193 | ||
| 194 | static inline int cxgb4_fill_ipv6_dst_ip3(struct ch_filter_specification *f, | 194 | static inline int cxgb4_fill_ipv6_dst_ip3(struct ch_filter_specification *f, |
| 195 | u32 val, u32 mask) | 195 | __be32 val, __be32 mask) |
| 196 | { | 196 | { |
| 197 | memcpy(&f->val.lip[12], &val, sizeof(u32)); | 197 | memcpy(&f->val.lip[12], &val, sizeof(u32)); |
| 198 | memcpy(&f->mask.lip[12], &mask, sizeof(u32)); | 198 | memcpy(&f->mask.lip[12], &mask, sizeof(u32)); |
| @@ -216,7 +216,7 @@ static const struct cxgb4_match_field cxgb4_ipv6_fields[] = { · 17 unmodified lines | |||
| 216 | 216 | ||
| 217 | /* TCP/UDP match */ | 217 | /* TCP/UDP match */ |
| 218 | static inline int cxgb4_fill_l4_ports(struct ch_filter_specification *f, | 218 | static inline int cxgb4_fill_l4_ports(struct ch_filter_specification *f, |
| 219 | u32 val, u32 mask) | 219 | __be32 val, __be32 mask) |
| 220 | { | 220 | { |
| 221 | f->val.fport = ntohl(val) >> 16; | 221 | f->val.fport = ntohl(val) >> 16; |
| 222 | f->mask.fport = ntohl(mask) >> 16; | 222 | f->mask.fport = ntohl(mask) >> 16; |
| @@ -237,19 +237,13 @@ static const struct cxgb4_match_field cxgb4_udp_fields[] = { · 14 unmodified lines | |||
| 237 | }; | 237 | }; |
| 238 | 238 | ||
| 239 | struct cxgb4_next_header { | 239 | struct cxgb4_next_header { |
| 240 | unsigned int offset; /* Offset to next header */ | 240 | /* Offset, shift, and mask added to beginning of the header |
| 241 | /* offset, shift, and mask added to offset above | ||
| 242 | * to get to next header. Useful when using a header | 241 | * to get to next header. Useful when using a header |
| 243 | * field's value to jump to next header such as IHL field | 242 | * field's value to jump to next header such as IHL field |
| 244 | * in IPv4 header. | 243 | * in IPv4 header. |
| 245 | */ | 244 | */ |
| 246 | unsigned int offoff; | 245 | struct tc_u32_sel sel; |
| 247 | u32 shift; | 246 | struct tc_u32_key key; |
| 248 | u32 mask; | ||
| 249 | /* match criteria to make this jump */ | ||
| 250 | unsigned int match_off; | ||
| 251 | u32 match_val; | ||
| 252 | u32 match_mask; | ||
| 253 | /* location of jump to make */ | 247 | /* location of jump to make */ |
| 254 | const struct cxgb4_match_field *jump; | 248 | const struct cxgb4_match_field *jump; |
| 255 | }; | 249 | }; |
| @@ -258,26 +252,74 @@ struct cxgb4_next_header { · 2 unmodified lines | |||
| 258 | * IPv4 header. | 252 | * IPv4 header. |
| 259 | */ | 253 | */ |
| 260 | static const struct cxgb4_next_header cxgb4_ipv4_jumps[] = { | 254 | static const struct cxgb4_next_header cxgb4_ipv4_jumps[] = { |
| 261 | { .offset = 0, .offoff = 0, .shift = 6, .mask = 0xF, | 255 | { |
| 262 | .match_off = 8, .match_val = 0x600, .match_mask = 0xFF00, | 256 | /* TCP Jump */ |
| 263 | .jump = cxgb4_tcp_fields }, | 257 | .sel = { |
| 264 | { .offset = 0, .offoff = 0, .shift = 6, .mask = 0xF, | 258 | .off = 0, |
| 265 | .match_off = 8, .match_val = 0x1100, .match_mask = 0xFF00, | 259 | .offoff = 0, |
| 266 | .jump = cxgb4_udp_fields }, | 260 | .offshift = 6, |
| 267 | { .jump = NULL } | 261 | .offmask = cpu_to_be16(0x0f00), |
| 262 | }, | ||
| 263 | .key = { | ||
| 264 | .off = 8, | ||
| 265 | .val = cpu_to_be32(0x00060000), | ||
| 266 | .mask = cpu_to_be32(0x00ff0000), | ||
| 267 | }, | ||
| 268 | .jump = cxgb4_tcp_fields, | ||
| 269 | }, | ||
| 270 | { | ||
| 271 | /* UDP Jump */ | ||
| 272 | .sel = { | ||
| 273 | .off = 0, | ||
| 274 | .offoff = 0, | ||
| 275 | .offshift = 6, | ||
| 276 | .offmask = cpu_to_be16(0x0f00), | ||
| 277 | }, | ||
| 278 | .key = { | ||
| 279 | .off = 8, | ||
| 280 | .val = cpu_to_be32(0x00110000), | ||
| 281 | .mask = cpu_to_be32(0x00ff0000), | ||
| 282 | }, | ||
| 283 | .jump = cxgb4_udp_fields, | ||
| 284 | }, | ||
| 285 | { .jump = NULL }, | ||
| 268 | }; | 286 | }; |
| 269 | 287 | ||
| 270 | /* Accept a rule with a jump directly past the 40 Bytes of IPv6 fixed header | 288 | /* Accept a rule with a jump directly past the 40 Bytes of IPv6 fixed header |
| 271 | * to get to transport layer header. | 289 | * to get to transport layer header. |
| 272 | */ | 290 | */ |
| 273 | static const struct cxgb4_next_header cxgb4_ipv6_jumps[] = { | 291 | static const struct cxgb4_next_header cxgb4_ipv6_jumps[] = { |
| 274 | { .offset = 0x28, .offoff = 0, .shift = 0, .mask = 0, | 292 | { |
| 275 | .match_off = 4, .match_val = 0x60000, .match_mask = 0xFF0000, | 293 | /* TCP Jump */ |
| 276 | .jump = cxgb4_tcp_fields }, | 294 | .sel = { |
| 277 | { .offset = 0x28, .offoff = 0, .shift = 0, .mask = 0, | 295 | .off = 40, |
| 278 | .match_off = 4, .match_val = 0x110000, .match_mask = 0xFF0000, | 296 | .offoff = 0, |
| 279 | .jump = cxgb4_udp_fields }, | 297 | .offshift = 0, |
| 280 | { .jump = NULL } | 298 | .offmask = 0, |
| 299 | }, | ||
| 300 | .key = { | ||
| 301 | .off = 4, | ||
| 302 | .val = cpu_to_be32(0x00000600), | ||
| 303 | .mask = cpu_to_be32(0x0000ff00), | ||
| 304 | }, | ||
| 305 | .jump = cxgb4_tcp_fields, | ||
| 306 | }, | ||
| 307 | { | ||
| 308 | /* UDP Jump */ | ||
| 309 | .sel = { | ||
| 310 | .off = 40, | ||
| 311 | .offoff = 0, | ||
| 312 | .offshift = 0, | ||
| 313 | .offmask = 0, | ||
| 314 | }, | ||
| 315 | .key = { | ||
| 316 | .off = 4, | ||
| 317 | .val = cpu_to_be32(0x00001100), | ||
| 318 | .mask = cpu_to_be32(0x0000ff00), | ||
| 319 | }, | ||
| 320 | .jump = cxgb4_udp_fields, | ||
| 321 | }, | ||
| 322 | { .jump = NULL }, | ||
| 281 | }; | 323 | }; |
| 282 | 324 | ||
| 283 | struct cxgb4_link { | 325 | struct cxgb4_link { |
| @@ -502,41 +502,20 @@ u64 cxgb4_select_ntuple(struct net_device *dev, · 501 unmodified lines | |||
| 502 | } | 502 | } |
| 503 | EXPORT_SYMBOL(cxgb4_select_ntuple); | 503 | EXPORT_SYMBOL(cxgb4_select_ntuple); |
| 504 | 504 | ||
| 505 | /* | ||
| 506 | * Called when address resolution fails for an L2T entry to handle packets | ||
| 507 | * on the arpq head. If a packet specifies a failure handler it is invoked, | ||
| 508 | * otherwise the packet is sent to the device. | ||
| 509 | */ | ||
| 510 | static void handle_failed_resolution(struct adapter *adap, struct l2t_entry *e) | ||
| 511 | { | ||
| 512 | struct sk_buff *skb; | ||
| 513 | |||
| 514 | while ((skb = __skb_dequeue(&e->arpq)) != NULL) { | ||
| 515 | const struct l2t_skb_cb *cb = L2T_SKB_CB(skb); | ||
| 516 | |||
| 517 | spin_unlock(&e->lock); | ||
| 518 | if (cb->arp_err_handler) | ||
| 519 | cb->arp_err_handler(cb->handle, skb); | ||
| 520 | else | ||
| 521 | t4_ofld_send(adap, skb); | ||
| 522 | spin_lock(&e->lock); | ||
| 523 | } | ||
| 524 | } | ||
| 525 | |||
| 526 | /* | 505 | /* |
| 527 | * Called when the host's neighbor layer makes a change to some entry that is | 506 | * Called when the host's neighbor layer makes a change to some entry that is |
| 528 | * loaded into the HW L2 table. | 507 | * loaded into the HW L2 table. |
| 529 | */ | 508 | */ |
| 530 | void t4_l2t_update(struct adapter *adap, struct neighbour *neigh) | 509 | void t4_l2t_update(struct adapter *adap, struct neighbour *neigh) |
| 531 | { | 510 | { |
| 532 | struct l2t_entry *e; | ||
| 533 | struct sk_buff_head *arpq = NULL; | ||
| 534 | struct l2t_data *d = adap->l2t; | ||
| 535 | unsigned int addr_len = neigh->tbl->key_len; | 511 | unsigned int addr_len = neigh->tbl->key_len; |
| 536 | u32 *addr = (u32 *) neigh->primary_key; | 512 | u32 *addr = (u32 *) neigh->primary_key; |
| 537 | int ifidx = neigh->dev->ifindex; | 513 | int hash, ifidx = neigh->dev->ifindex; |
| 538 | int hash = addr_hash(d, addr, addr_len, ifidx); | 514 | struct sk_buff_head *arpq = NULL; |
| 515 | struct l2t_data *d = adap->l2t; | ||
| 516 | struct l2t_entry *e; | ||
| 539 | 517 | ||
| 518 | hash = addr_hash(d, addr, addr_len, ifidx); | ||
| 540 | read_lock_bh(&d->lock); | 519 | read_lock_bh(&d->lock); |
| 541 | for (e = d->l2tab[hash].first; e; e = e->next) | 520 | for (e = d->l2tab[hash].first; e; e = e->next) |
| 542 | if (!addreq(e, addr) && e->ifindex == ifidx) { | 521 | if (!addreq(e, addr) && e->ifindex == ifidx) { |
| @@ -569,8 +548,25 @@ void t4_l2t_update(struct adapter *adap, struct neighbour *neigh) · 26 unmodified lines | |||
| 569 | write_l2e(adap, e, 0); | 548 | write_l2e(adap, e, 0); |
| 570 | } | 549 | } |
| 571 | 550 | ||
| 572 | if (arpq) | 551 | if (arpq) { |
| 573 | handle_failed_resolution(adap, e); | 552 | struct sk_buff *skb; |
| 553 | |||
| 554 | /* Called when address resolution fails for an L2T | ||
| 555 | * entry to handle packets on the arpq head. If a | ||
| 556 | * packet specifies a failure handler it is invoked, | ||
| 557 | * otherwise the packet is sent to the device. | ||
| 558 | */ | ||
| 559 | while ((skb = __skb_dequeue(&e->arpq)) != NULL) { | ||
| 560 | const struct l2t_skb_cb *cb = L2T_SKB_CB(skb); | ||
| 561 | |||
| 562 | spin_unlock(&e->lock); | ||
| 563 | if (cb->arp_err_handler) | ||
| 564 | cb->arp_err_handler(cb->handle, skb); | ||
| 565 | else | ||
| 566 | t4_ofld_send(adap, skb); | ||
| 567 | spin_lock(&e->lock); | ||
| 568 | } | ||
| 569 | } | ||
| 574 | spin_unlock_bh(&e->lock); | 570 | spin_unlock_bh(&e->lock); |
| 575 | } | 571 | } |
| 576 | 572 | ||
| @@ -613,6 +609,7 @@ struct l2t_entry *t4_l2t_alloc_switching(struct adapter *adap, u16 vlan, · 36 unmodified lines | |||
| 613 | } | 609 | } |
| 614 | 610 | ||
| 615 | /** | 611 | /** |
| 612 | * cxgb4_l2t_alloc_switching - Allocates an L2T entry for switch filters | ||
| 616 | * @dev: net_device pointer | 613 | * @dev: net_device pointer |
| 617 | * @vlan: VLAN Id | 614 | * @vlan: VLAN Id |
| 618 | * @port: Associated port | 615 | * @port: Associated port |
| @@ -598,7 +598,7 @@ struct sched_class *cxgb4_sched_class_alloc(struct net_device *dev, · 597 unmodified lines | |||
| 598 | /** | 598 | /** |
| 599 | * cxgb4_sched_class_free - free a scheduling class | 599 | * cxgb4_sched_class_free - free a scheduling class |
| 600 | * @dev: net_device pointer | 600 | * @dev: net_device pointer |
| 601 | * @e: scheduling class | 601 | * @classid: scheduling class id to free |
| 602 | * | 602 | * |
| 603 | * Frees a scheduling class if there are no users. | 603 | * Frees a scheduling class if there are no users. |
| 604 | */ | 604 | */ |
| @@ -302,7 +302,7 @@ static void deferred_unmap_destructor(struct sk_buff *skb) · 301 unmodified lines | |||
| 302 | 302 | ||
| 303 | /** | 303 | /** |
| 304 | * free_tx_desc - reclaims Tx descriptors and their buffers | 304 | * free_tx_desc - reclaims Tx descriptors and their buffers |
| 305 | * @adapter: the adapter | 305 | * @adap: the adapter |
| 306 | * @q: the Tx queue to reclaim descriptors from | 306 | * @q: the Tx queue to reclaim descriptors from |
| 307 | * @n: the number of descriptors to reclaim | 307 | * @n: the number of descriptors to reclaim |
| 308 | * @unmap: whether the buffers should be unmapped for DMA | 308 | * @unmap: whether the buffers should be unmapped for DMA |
| @@ -722,6 +722,7 @@ static inline unsigned int flits_to_desc(unsigned int n) · 413 unmodified lines | |||
| 722 | /** | 722 | /** |
| 723 | * is_eth_imm - can an Ethernet packet be sent as immediate data? | 723 | * is_eth_imm - can an Ethernet packet be sent as immediate data? |
| 724 | * @skb: the packet | 724 | * @skb: the packet |
| 725 | * @chip_ver: chip version | ||
| 725 | * | 726 | * |
| 726 | * Returns whether an Ethernet packet is small enough to fit as | 727 | * Returns whether an Ethernet packet is small enough to fit as |
| 727 | * immediate data. Return value corresponds to headroom required. | 728 | * immediate data. Return value corresponds to headroom required. |
| @@ -749,6 +750,7 @@ static inline int is_eth_imm(const struct sk_buff *skb, unsigned int chip_ver) · 21 unmodified lines | |||
| 749 | /** | 750 | /** |
| 750 | * calc_tx_flits - calculate the number of flits for a packet Tx WR | 751 | * calc_tx_flits - calculate the number of flits for a packet Tx WR |
| 751 | * @skb: the packet | 752 | * @skb: the packet |
| 753 | * @chip_ver: chip version | ||
| 752 | * | 754 | * |
| 753 | * Returns the number of flits needed for a Tx WR for the given Ethernet | 755 | * Returns the number of flits needed for a Tx WR for the given Ethernet |
| 754 | * packet, including the needed WR and CPL headers. | 756 | * packet, including the needed WR and CPL headers. |
| @@ -804,6 +806,7 @@ static inline unsigned int calc_tx_flits(const struct sk_buff *skb, · 49 unmodified lines | |||
| 804 | /** | 806 | /** |
| 805 | * calc_tx_descs - calculate the number of Tx descriptors for a packet | 807 | * calc_tx_descs - calculate the number of Tx descriptors for a packet |
| 806 | * @skb: the packet | 808 | * @skb: the packet |
| 809 | * @chip_ver: chip version | ||
| 807 | * | 810 | * |
| 808 | * Returns the number of Tx descriptors needed for the given Ethernet | 811 | * Returns the number of Tx descriptors needed for the given Ethernet |
| 809 | * packet, including the needed WR and CPL headers. | 812 | * packet, including the needed WR and CPL headers. |
| @@ -1425,12 +1428,10 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev) · 615 unmodified lines | |||
| 1425 | 1428 | ||
| 1426 | qidx = skb_get_queue_mapping(skb); | 1429 | qidx = skb_get_queue_mapping(skb); |
| 1427 | if (ptp_enabled) { | 1430 | if (ptp_enabled) { |
| 1428 | spin_lock(&adap->ptp_lock); | ||
| 1429 | if (!(adap->ptp_tx_skb)) { | 1431 | if (!(adap->ptp_tx_skb)) { |
| 1430 | skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; | 1432 | skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; |
| 1431 | adap->ptp_tx_skb = skb_get(skb); | 1433 | adap->ptp_tx_skb = skb_get(skb); |
| 1432 | } else { | 1434 | } else { |
| 1433 | spin_unlock(&adap->ptp_lock); | ||
| 1434 | goto out_free; | 1435 | goto out_free; |
| 1435 | } | 1436 | } |
| 1436 | q = &adap->sge.ptptxq; | 1437 | q = &adap->sge.ptptxq; |
| @@ -1444,11 +1445,8 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev) · 7 unmodified lines | |||
| 1444 | 1445 | ||
| 1445 | #ifdef CONFIG_CHELSIO_T4_FCOE | 1446 | #ifdef CONFIG_CHELSIO_T4_FCOE |
| 1446 | ret = cxgb_fcoe_offload(skb, adap, pi, &cntrl); | 1447 | ret = cxgb_fcoe_offload(skb, adap, pi, &cntrl); |
| 1447 | if (unlikely(ret == -ENOTSUPP)) { | 1448 | if (unlikely(ret == -EOPNOTSUPP)) |
| 1448 | if (ptp_enabled) | ||
| 1449 | spin_unlock(&adap->ptp_lock); | ||
| 1450 | goto out_free; | 1449 | goto out_free; |
| 1451 | } | ||
| 1452 | #endif /* CONFIG_CHELSIO_T4_FCOE */ | 1450 | #endif /* CONFIG_CHELSIO_T4_FCOE */ |
| 1453 | 1451 | ||
| 1454 | chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip); | 1452 | chip_ver = CHELSIO_CHIP_VERSION(adap->params.chip); |
| @@ -1461,8 +1459,6 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev) · 6 unmodified lines | |||
| 1461 | dev_err(adap->pdev_dev, | 1459 | dev_err(adap->pdev_dev, |
| 1462 | "%s: Tx ring %u full while queue awake!\n", | 1460 | "%s: Tx ring %u full while queue awake!\n", |
| 1463 | dev->name, qidx); | 1461 | dev->name, qidx); |
| 1464 | if (ptp_enabled) | ||
| 1465 | spin_unlock(&adap->ptp_lock); | ||
| 1466 | return NETDEV_TX_BUSY; | 1462 | return NETDEV_TX_BUSY; |
| 1467 | } | 1463 | } |
| 1468 | 1464 | ||
| @@ -1481,8 +1477,6 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev) · 12 unmodified lines | |||
| 1481 | unlikely(cxgb4_map_skb(adap->pdev_dev, skb, sgl_sdesc->addr) < 0)) { | 1477 | unlikely(cxgb4_map_skb(adap->pdev_dev, skb, sgl_sdesc->addr) < 0)) { |
| 1482 | memset(sgl_sdesc->addr, 0, sizeof(sgl_sdesc->addr)); | 1478 | memset(sgl_sdesc->addr, 0, sizeof(sgl_sdesc->addr)); |
| 1483 | q->mapping_err++; | 1479 | q->mapping_err++; |
| 1484 | if (ptp_enabled) | ||
| 1485 | spin_unlock(&adap->ptp_lock); | ||
| 1486 | goto out_free; | 1480 | goto out_free; |
| 1487 | } | 1481 | } |
| 1488 | 1482 | ||
| @@ -1533,8 +1527,7 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev) · 44 unmodified lines | |||
| 1533 | if (iph->version == 4) { | 1527 | if (iph->version == 4) { |
| 1534 | iph->check = 0; | 1528 | iph->check = 0; |
| 1535 | iph->tot_len = 0; | 1529 | iph->tot_len = 0; |
| 1536 | iph->check = (u16)(~ip_fast_csum((u8 *)iph, | 1530 | iph->check = ~ip_fast_csum((u8 *)iph, iph->ihl); |
| 1537 | iph->ihl)); | ||
| 1538 | } | 1531 | } |
| 1539 | if (skb->ip_summed == CHECKSUM_PARTIAL) | 1532 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
| 1540 | cntrl = hwcsum(adap->params.chip, skb); | 1533 | cntrl = hwcsum(adap->params.chip, skb); |
| @@ -1630,8 +1623,6 @@ static netdev_tx_t cxgb4_eth_xmit(struct sk_buff *skb, struct net_device *dev) · 89 unmodified lines | |||
| 1630 | txq_advance(&q->q, ndesc); | 1623 | txq_advance(&q->q, ndesc); |
| 1631 | 1624 | ||
| 1632 | cxgb4_ring_tx_db(adap, &q->q, ndesc); | 1625 | cxgb4_ring_tx_db(adap, &q->q, ndesc); |
| 1633 | if (ptp_enabled) | ||
| 1634 | spin_unlock(&adap->ptp_lock); | ||
| 1635 | return NETDEV_TX_OK; | 1626 | return NETDEV_TX_OK; |
| 1636 | 1627 | ||
| 1637 | out_free: | 1628 | out_free: |
| @@ -2377,6 +2368,16 @@ netdev_tx_t t4_start_xmit(struct sk_buff *skb, struct net_device *dev) · 739 unmodified lines | |||
| 2377 | if (unlikely(qid >= pi->nqsets)) | 2368 | if (unlikely(qid >= pi->nqsets)) |
| 2378 | return cxgb4_ethofld_xmit(skb, dev); | 2369 | return cxgb4_ethofld_xmit(skb, dev); |
| 2379 | 2370 | ||
| 2371 | if (is_ptp_enabled(skb, dev)) { | ||
| 2372 | struct adapter *adap = netdev2adap(dev); | ||
| 2373 | netdev_tx_t ret; | ||
| 2374 | |||
| 2375 | spin_lock(&adap->ptp_lock); | ||
| 2376 | ret = cxgb4_eth_xmit(skb, dev); | ||
| 2377 | spin_unlock(&adap->ptp_lock); | ||
| 2378 | return ret; | ||
| 2379 | } | ||
| 2380 | |||
| 2380 | return cxgb4_eth_xmit(skb, dev); | 2381 | return cxgb4_eth_xmit(skb, dev); |
| 2381 | } | 2382 | } |
| 2382 | 2383 | ||
| @@ -2410,9 +2411,9 @@ static void eosw_txq_flush_pending_skbs(struct sge_eosw_txq *eosw_txq) · 27 unmodified lines | |||
| 2410 | 2411 | ||
| 2411 | /** | 2412 | /** |
| 2412 | * cxgb4_ethofld_send_flowc - Send ETHOFLD flowc request to bind eotid to tc. | 2413 | * cxgb4_ethofld_send_flowc - Send ETHOFLD flowc request to bind eotid to tc. |
| 2413 | * @dev - netdevice | 2414 | * @dev: netdevice |
| 2414 | * @eotid - ETHOFLD tid to bind/unbind | 2415 | * @eotid: ETHOFLD tid to bind/unbind |
| 2415 | * @tc - traffic class. If set to FW_SCHED_CLS_NONE, then unbinds the @eotid | 2416 | * @tc: traffic class. If set to FW_SCHED_CLS_NONE, then unbinds the @eotid |
| 2416 | * | 2417 | * |
| 2417 | * Send a FLOWC work request to bind an ETHOFLD TID to a traffic class. | 2418 | * Send a FLOWC work request to bind an ETHOFLD TID to a traffic class. |
| 2418 | * If @tc is set to FW_SCHED_CLS_NONE, then the @eotid is unbound from | 2419 | * If @tc is set to FW_SCHED_CLS_NONE, then the @eotid is unbound from |
| @@ -2691,7 +2692,6 @@ static inline unsigned int calc_tx_flits_ofld(const struct sk_buff *skb) · 272 unmodified lines | |||
| 2691 | 2692 | ||
| 2692 | /** | 2693 | /** |
| 2693 | * txq_stop_maperr - stop a Tx queue due to I/O MMU exhaustion | 2694 | * txq_stop_maperr - stop a Tx queue due to I/O MMU exhaustion |
| 2694 | * @adap: the adapter | ||
| 2695 | * @q: the queue to stop | 2695 | * @q: the queue to stop |
| 2696 | * | 2696 | * |
| 2697 | * Mark a Tx queue stopped due to I/O MMU exhaustion and resulting | 2697 | * Mark a Tx queue stopped due to I/O MMU exhaustion and resulting |
| @@ -3286,7 +3286,7 @@ enum { · 588 unmodified lines | |||
| 3286 | 3286 | ||
| 3287 | /** | 3287 | /** |
| 3288 | * t4_systim_to_hwstamp - read hardware time stamp | 3288 | * t4_systim_to_hwstamp - read hardware time stamp |
| 3289 | * @adap: the adapter | 3289 | * @adapter: the adapter |
| 3290 | * @skb: the packet | 3290 | * @skb: the packet |
| 3291 | * | 3291 | * |
| 3292 | * Read Time Stamp from MPS packet and insert in skb which | 3292 | * Read Time Stamp from MPS packet and insert in skb which |
| @@ -3313,15 +3313,16 @@ static noinline int t4_systim_to_hwstamp(struct adapter *adapter, · 20 unmodified lines | |||
| 3313 | 3313 | ||
| 3314 | hwtstamps = skb_hwtstamps(skb); | 3314 | hwtstamps = skb_hwtstamps(skb); |
| 3315 | memset(hwtstamps, 0, sizeof(*hwtstamps)); | 3315 | memset(hwtstamps, 0, sizeof(*hwtstamps)); |
| 3316 | hwtstamps->hwtstamp = ns_to_ktime(be64_to_cpu(*((u64 *)data))); | 3316 | hwtstamps->hwtstamp = ns_to_ktime(get_unaligned_be64(data)); |
| 3317 | 3317 | ||
| 3318 | return RX_PTP_PKT_SUC; | 3318 | return RX_PTP_PKT_SUC; |
| 3319 | } | 3319 | } |
| 3320 | 3320 | ||
| 3321 | /** | 3321 | /** |
| 3322 | * t4_rx_hststamp - Recv PTP Event Message | 3322 | * t4_rx_hststamp - Recv PTP Event Message |
| 3323 | * @adap: the adapter | 3323 | * @adapter: the adapter |
| 3324 | * @rsp: the response queue descriptor holding the RX_PKT message | 3324 | * @rsp: the response queue descriptor holding the RX_PKT message |
| 3325 | * @rxq: the response queue holding the RX_PKT message | ||
| 3325 | * @skb: the packet | 3326 | * @skb: the packet |
| 3326 | * | 3327 | * |
| 3327 | * PTP enabled and MPS packet, read HW timestamp | 3328 | * PTP enabled and MPS packet, read HW timestamp |
| @@ -3345,7 +3346,7 @@ static int t4_rx_hststamp(struct adapter *adapter, const __be64 *rsp, · 17 unmodified lines | |||
| 3345 | 3346 | ||
| 3346 | /** | 3347 | /** |
| 3347 | * t4_tx_hststamp - Loopback PTP Transmit Event Message | 3348 | * t4_tx_hststamp - Loopback PTP Transmit Event Message |
| 3348 | * @adap: the adapter | 3349 | * @adapter: the adapter |
| 3349 | * @skb: the packet | 3350 | * @skb: the packet |
| 3350 | * @dev: the ingress net device | 3351 | * @dev: the ingress net device |
| 3351 | * | 3352 | * |
| @@ -103,6 +103,7 @@ static void t4_smte_free(struct smt_entry *e) · 102 unmodified lines | |||
| 103 | } | 103 | } |
| 104 | 104 | ||
| 105 | /** | 105 | /** |
| 106 | * cxgb4_smt_release - Release SMT entry | ||
| 106 | * @e: smt entry to release | 107 | * @e: smt entry to release |
| 107 | * | 108 | * |
| 108 | * Releases ref count and frees up an smt entry from SMT table | 109 | * Releases ref count and frees up an smt entry from SMT table |
| @@ -231,6 +232,7 @@ static struct smt_entry *t4_smt_alloc_switching(struct adapter *adap, u16 pfvf, · 122 unmodified lines | |||
| 231 | } | 232 | } |
| 232 | 233 | ||
| 233 | /** | 234 | /** |
| 235 | * cxgb4_smt_alloc_switching - Allocates an SMT entry for switch filters. | ||
| 234 | * @dev: net_device pointer | 236 | * @dev: net_device pointer |
| 235 | * @smac: MAC address to add to SMT | 237 | * @smac: MAC address to add to SMT |
| 236 | * Returns pointer to the SMT entry created | 238 | * Returns pointer to the SMT entry created |
| @@ -3163,7 +3163,7 @@ int t4_get_tp_version(struct adapter *adapter, u32 *vers) · 3162 unmodified lines | |||
| 3163 | 3163 | ||
| 3164 | /** | 3164 | /** |
| 3165 | * t4_get_exprom_version - return the Expansion ROM version (if any) | 3165 | * t4_get_exprom_version - return the Expansion ROM version (if any) |
| 3166 | * @adapter: the adapter | 3166 | * @adap: the adapter |
| 3167 | * @vers: where to place the version | 3167 | * @vers: where to place the version |
| 3168 | * | 3168 | * |
| 3169 | * Reads the Expansion ROM header from FLASH and returns the version | 3169 | * Reads the Expansion ROM header from FLASH and returns the version |
| @@ -3493,7 +3493,7 @@ int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, · 323 unmodified lines | |||
| 3493 | drv_fw = &fw_info->fw_hdr; | 3493 | drv_fw = &fw_info->fw_hdr; |
| 3494 | 3494 | ||
| 3495 | /* Read the header of the firmware on the card */ | 3495 | /* Read the header of the firmware on the card */ |
| 3496 | ret = -t4_read_flash(adap, FLASH_FW_START, | 3496 | ret = t4_read_flash(adap, FLASH_FW_START, |
| 3497 | sizeof(*card_fw) / sizeof(uint32_t), | 3497 | sizeof(*card_fw) / sizeof(uint32_t), |
| 3498 | (uint32_t *)card_fw, 1); | 3498 | (uint32_t *)card_fw, 1); |
| 3499 | if (ret == 0) { | 3499 | if (ret == 0) { |
| @@ -3522,8 +3522,8 @@ int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, · 22 unmodified lines | |||
| 3522 | should_install_fs_fw(adap, card_fw_usable, | 3522 | should_install_fs_fw(adap, card_fw_usable, |
| 3523 | be32_to_cpu(fs_fw->fw_ver), | 3523 | be32_to_cpu(fs_fw->fw_ver), |
| 3524 | be32_to_cpu(card_fw->fw_ver))) { | 3524 | be32_to_cpu(card_fw->fw_ver))) { |
| 3525 | ret = -t4_fw_upgrade(adap, adap->mbox, fw_data, | 3525 | ret = t4_fw_upgrade(adap, adap->mbox, fw_data, |
| 3526 | fw_size, 0); | 3526 | fw_size, 0); |
| 3527 | if (ret != 0) { | 3527 | if (ret != 0) { |
| 3528 | dev_err(adap->pdev_dev, | 3528 | dev_err(adap->pdev_dev, |
| 3529 | "failed to install firmware: %d\n", ret); | 3529 | "failed to install firmware: %d\n", ret); |
| @@ -3554,7 +3554,7 @@ int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info, · 24 unmodified lines | |||
| 3554 | FW_HDR_FW_VER_MICRO_G(c), FW_HDR_FW_VER_BUILD_G(c), | 3554 | FW_HDR_FW_VER_MICRO_G(c), FW_HDR_FW_VER_BUILD_G(c), |
| 3555 | FW_HDR_FW_VER_MAJOR_G(k), FW_HDR_FW_VER_MINOR_G(k), | 3555 | FW_HDR_FW_VER_MAJOR_G(k), FW_HDR_FW_VER_MINOR_G(k), |
| 3556 | FW_HDR_FW_VER_MICRO_G(k), FW_HDR_FW_VER_BUILD_G(k)); | 3556 | FW_HDR_FW_VER_MICRO_G(k), FW_HDR_FW_VER_BUILD_G(k)); |
| 3557 | ret = EINVAL; | 3557 | ret = -EINVAL; |
| 3558 | goto bye; | 3558 | goto bye; |
| 3559 | } | 3559 | } |
| 3560 | 3560 | ||
| @@ -5310,7 +5310,7 @@ static unsigned int t4_use_ldst(struct adapter *adap) · 1749 unmodified lines | |||
| 5310 | * @cmd: TP fw ldst address space type | 5310 | * @cmd: TP fw ldst address space type |
| 5311 | * @vals: where the indirect register values are stored/written | 5311 | * @vals: where the indirect register values are stored/written |
| 5312 | * @nregs: how many indirect registers to read/write | 5312 | * @nregs: how many indirect registers to read/write |
| 5313 | * @start_idx: index of first indirect register to read/write | 5313 | * @start_index: index of first indirect register to read/write |
| 5314 | * @rw: Read (1) or Write (0) | 5314 | * @rw: Read (1) or Write (0) |
| 5315 | * @sleep_ok: if true we may sleep while awaiting command completion | 5315 | * @sleep_ok: if true we may sleep while awaiting command completion |
| 5316 | * | 5316 | * |
| @@ -6115,7 +6115,7 @@ void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]) · 798 unmodified lines | |||
| 6115 | 6115 | ||
| 6116 | /** | 6116 | /** |
| 6117 | * compute_mps_bg_map - compute the MPS Buffer Group Map for a Port | 6117 | * compute_mps_bg_map - compute the MPS Buffer Group Map for a Port |
| 6118 | * @adap: the adapter | 6118 | * @adapter: the adapter |
| 6119 | * @pidx: the port index | 6119 | * @pidx: the port index |
| 6120 | * | 6120 | * |
| 6121 | * Computes and returns a bitmap indicating which MPS buffer groups are | 6121 | * Computes and returns a bitmap indicating which MPS buffer groups are |
| @@ -6252,7 +6252,7 @@ static unsigned int t4_get_tp_e2c_map(struct adapter *adapter, int pidx) · 130 unmodified lines | |||
| 6252 | 6252 | ||
| 6253 | /** | 6253 | /** |
| 6254 | * t4_get_tp_ch_map - return TP ingress channels associated with a port | 6254 | * t4_get_tp_ch_map - return TP ingress channels associated with a port |
| 6255 | * @adapter: the adapter | 6255 | * @adap: the adapter |
| 6256 | * @pidx: the port index | 6256 | * @pidx: the port index |
| 6257 | * | 6257 | * |
| 6258 | * Returns a bitmap indicating which TP Ingress Channels are associated | 6258 | * Returns a bitmap indicating which TP Ingress Channels are associated |
| @@ -6589,7 +6589,7 @@ int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, · 330 unmodified lines | |||
| 6589 | * @phy_addr: the PHY address | 6589 | * @phy_addr: the PHY address |
| 6590 | * @mmd: the PHY MMD to access (0 for clause 22 PHYs) | 6590 | * @mmd: the PHY MMD to access (0 for clause 22 PHYs) |
| 6591 | * @reg: the register to write | 6591 | * @reg: the register to write |
| 6592 | * @valp: value to write | 6592 | * @val: value to write |
| 6593 | * | 6593 | * |
| 6594 | * Issues a FW command through the given mailbox to write a PHY register. | 6594 | * Issues a FW command through the given mailbox to write a PHY register. |
| 6595 | */ | 6595 | */ |
| @@ -6615,7 +6615,7 @@ int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, · 19 unmodified lines | |||
| 6615 | 6615 | ||
| 6616 | /** | 6616 | /** |
| 6617 | * t4_sge_decode_idma_state - decode the idma state | 6617 | * t4_sge_decode_idma_state - decode the idma state |
| 6618 | * @adap: the adapter | 6618 | * @adapter: the adapter |
| 6619 | * @state: the state idma is stuck in | 6619 | * @state: the state idma is stuck in |
| 6620 | */ | 6620 | */ |
| 6621 | void t4_sge_decode_idma_state(struct adapter *adapter, int state) | 6621 | void t4_sge_decode_idma_state(struct adapter *adapter, int state) |
| @@ -6782,7 +6782,7 @@ void t4_sge_decode_idma_state(struct adapter *adapter, int state) · 160 unmodified lines | |||
| 6782 | * t4_sge_ctxt_flush - flush the SGE context cache | 6782 | * t4_sge_ctxt_flush - flush the SGE context cache |
| 6783 | * @adap: the adapter | 6783 | * @adap: the adapter |
| 6784 | * @mbox: mailbox to use for the FW command | 6784 | * @mbox: mailbox to use for the FW command |
| 6785 | * @ctx_type: Egress or Ingress | 6785 | * @ctxt_type: Egress or Ingress |
| 6786 | * | 6786 | * |
| 6787 | * Issues a FW command through the given mailbox to flush the | 6787 | * Issues a FW command through the given mailbox to flush the |
| 6788 | * SGE context cache. | 6788 | * SGE context cache. |
| @@ -6809,7 +6809,7 @@ int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox, int ctxt_type) · 20 unmodified lines | |||
| 6809 | 6809 | ||
| 6810 | /** | 6810 | /** |
| 6811 | * t4_read_sge_dbqtimers - read SGE Doorbell Queue Timer values | 6811 | * t4_read_sge_dbqtimers - read SGE Doorbell Queue Timer values |
| 6812 | * @adap - the adapter | 6812 | * @adap: the adapter |
| 6813 | * @ndbqtimers: size of the provided SGE Doorbell Queue Timer table | 6813 | * @ndbqtimers: size of the provided SGE Doorbell Queue Timer table |
| 6814 | * @dbqtimers: SGE Doorbell Queue Timer table | 6814 | * @dbqtimers: SGE Doorbell Queue Timer table |
| 6815 | * | 6815 | * |
| @@ -7092,6 +7092,7 @@ static int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force) · 276 unmodified lines | |||
| 7092 | /** | 7092 | /** |
| 7093 | * t4_fw_restart - restart the firmware by taking the uP out of RESET | 7093 | * t4_fw_restart - restart the firmware by taking the uP out of RESET |
| 7094 | * @adap: the adapter | 7094 | * @adap: the adapter |
| 7095 | * @mbox: mailbox to use for the FW command | ||
| 7095 | * @reset: if we want to do a RESET to restart things | 7096 | * @reset: if we want to do a RESET to restart things |
| 7096 | * | 7097 | * |
| 7097 | * Restart firmware previously halted by t4_fw_halt(). On successful | 7098 | * Restart firmware previously halted by t4_fw_halt(). On successful |
| @@ -7630,6 +7631,8 @@ int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, · 532 unmodified lines | |||
| 7630 | * @nmac: number of MAC addresses needed (1 to 5) | 7631 | * @nmac: number of MAC addresses needed (1 to 5) |
| 7631 | * @mac: the MAC addresses of the VI | 7632 | * @mac: the MAC addresses of the VI |
| 7632 | * @rss_size: size of RSS table slice associated with this VI | 7633 | * @rss_size: size of RSS table slice associated with this VI |
| 7634 | * @vivld: the destination to store the VI Valid value. | ||
| 7635 | * @vin: the destination to store the VIN value. | ||
| 7633 | * | 7636 | * |
| 7634 | * Allocates a virtual interface for the given physical port. If @mac is | 7637 | * Allocates a virtual interface for the given physical port. If @mac is |
| 7635 | * not %NULL it contains the MAC addresses of the VI as assigned by FW. | 7638 | * not %NULL it contains the MAC addresses of the VI as assigned by FW. |
| @@ -7848,7 +7851,7 @@ int t4_free_raw_mac_filt(struct adapter *adap, unsigned int viid, · 212 unmodified lines | |||
| 7848 | * t4_alloc_encap_mac_filt - Adds a mac entry in mps tcam with VNI support | 7851 | * t4_alloc_encap_mac_filt - Adds a mac entry in mps tcam with VNI support |
| 7849 | * @adap: the adapter | 7852 | * @adap: the adapter |
| 7850 | * @viid: the VI id | 7853 | * @viid: the VI id |
| 7851 | * @mac: the MAC address | 7854 | * @addr: the MAC address |
| 7852 | * @mask: the mask | 7855 | * @mask: the mask |
| 7853 | * @vni: the VNI id for the tunnel protocol | 7856 | * @vni: the VNI id for the tunnel protocol |
| 7854 | * @vni_mask: mask for the VNI id | 7857 | * @vni_mask: mask for the VNI id |
| @@ -7897,11 +7900,11 @@ int t4_alloc_encap_mac_filt(struct adapter *adap, unsigned int viid, · 42 unmodified lines | |||
| 7897 | * t4_alloc_raw_mac_filt - Adds a mac entry in mps tcam | 7900 | * t4_alloc_raw_mac_filt - Adds a mac entry in mps tcam |
| 7898 | * @adap: the adapter | 7901 | * @adap: the adapter |
| 7899 | * @viid: the VI id | 7902 | * @viid: the VI id |
| 7900 | * @mac: the MAC address | 7903 | * @addr: the MAC address |
| 7901 | * @mask: the mask | 7904 | * @mask: the mask |
| 7902 | * @idx: index at which to add this entry | 7905 | * @idx: index at which to add this entry |
| 7903 | * @port_id: the port index | ||
| 7904 | * @lookup_type: MAC address for inner (1) or outer (0) header | 7906 | * @lookup_type: MAC address for inner (1) or outer (0) header |
| 7907 | * @port_id: the port index | ||
| 7905 | * @sleep_ok: call is allowed to sleep | 7908 | * @sleep_ok: call is allowed to sleep |
| 7906 | * | 7909 | * |
| 7907 | * Adds the mac entry at the specified index using raw mac interface. | 7910 | * Adds the mac entry at the specified index using raw mac interface. |
| @@ -8126,7 +8129,7 @@ int t4_free_mac_filt(struct adapter *adap, unsigned int mbox, · 218 unmodified lines | |||
| 8126 | * @idx: index of existing filter for old value of MAC address, or -1 | 8129 | * @idx: index of existing filter for old value of MAC address, or -1 |
| 8127 | * @addr: the new MAC address value | 8130 | * @addr: the new MAC address value |
| 8128 | * @persist: whether a new MAC allocation should be persistent | 8131 | * @persist: whether a new MAC allocation should be persistent |
| 8129 | * @add_smt: if true also add the address to the HW SMT | 8132 | * @smt_idx: the destination to store the new SMT index. |
| 8130 | * | 8133 | * |
| 8131 | * Modifies an exact-match filter and sets it to the new MAC address. | 8134 | * Modifies an exact-match filter and sets it to the new MAC address. |
| 8132 | * Note that in general it is not possible to modify the value of a given | 8135 | * Note that in general it is not possible to modify the value of a given |
| @@ -8448,7 +8451,6 @@ int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, · 315 unmodified lines | |||
| 8448 | 8451 | ||
| 8449 | /** | 8452 | /** |
| 8450 | * t4_link_down_rc_str - return a string for a Link Down Reason Code | 8453 | * t4_link_down_rc_str - return a string for a Link Down Reason Code |
| 8451 | * @adap: the adapter | ||
| 8452 | * @link_down_rc: Link Down Reason Code | 8454 | * @link_down_rc: Link Down Reason Code |
| 8453 | * | 8455 | * |
| 8454 | * Returns a string representation of the Link Down Reason Code. | 8456 | * Returns a string representation of the Link Down Reason Code. |
| @@ -8472,9 +8474,7 @@ static const char *t4_link_down_rc_str(unsigned char link_down_rc) · 17 unmodified lines | |||
| 8472 | return reason[link_down_rc]; | 8474 | return reason[link_down_rc]; |
| 8473 | } | 8475 | } |
| 8474 | 8476 | ||
| 8475 | /** | 8477 | /* Return the highest speed set in the port capabilities, in Mb/s. */ |
| 8476 | * Return the highest speed set in the port capabilities, in Mb/s. | ||
| 8477 | */ | ||
| 8478 | static unsigned int fwcap_to_speed(fw_port_cap32_t caps) | 8478 | static unsigned int fwcap_to_speed(fw_port_cap32_t caps) |
| 8479 | { | 8479 | { |
| 8480 | #define TEST_SPEED_RETURN(__caps_speed, __speed) \ | 8480 | #define TEST_SPEED_RETURN(__caps_speed, __speed) \ |
| @@ -9110,7 +9110,6 @@ found: · 629 unmodified lines | |||
| 9110 | /** | 9110 | /** |
| 9111 | * t4_prep_adapter - prepare SW and HW for operation | 9111 | * t4_prep_adapter - prepare SW and HW for operation |
| 9112 | * @adapter: the adapter | 9112 | * @adapter: the adapter |
| 9113 | * @reset: if true perform a HW reset | ||
| 9114 | * | 9113 | * |
| 9115 | * Initialize adapter SW state for the various HW modules, set initial | 9114 | * Initialize adapter SW state for the various HW modules, set initial |
| 9116 | * values for some adapter tunables, take PHYs out of reset, and | 9115 | * values for some adapter tunables, take PHYs out of reset, and |
| @@ -10395,6 +10394,7 @@ int t4_sched_params(struct adapter *adapter, u8 type, u8 level, u8 mode, · 1278 unmodified lines | |||
| 10395 | /** | 10394 | /** |
| 10396 | * t4_i2c_rd - read I2C data from adapter | 10395 | * t4_i2c_rd - read I2C data from adapter |
| 10397 | * @adap: the adapter | 10396 | * @adap: the adapter |
| 10397 | * @mbox: mailbox to use for the FW command | ||
| 10398 | * @port: Port number if per-port device; <0 if not | 10398 | * @port: Port number if per-port device; <0 if not |
| 10399 | * @devid: per-port device ID or absolute device ID | 10399 | * @devid: per-port device ID or absolute device ID |
| 10400 | * @offset: byte offset into device I2C space | 10400 | * @offset: byte offset into device I2C space |
| @@ -10450,7 +10450,7 @@ int t4_i2c_rd(struct adapter *adap, unsigned int mbox, int port, · 49 unmodified lines | |||
| 10450 | 10450 | ||
| 10451 | /** | 10451 | /** |
| 10452 | * t4_set_vlan_acl - Set a VLAN id for the specified VF | 10452 | * t4_set_vlan_acl - Set a VLAN id for the specified VF |
| 10453 | * @adapter: the adapter | 10453 | * @adap: the adapter |
| 10454 | * @mbox: mailbox to use for the FW command | 10454 | * @mbox: mailbox to use for the FW command |
| 10455 | * @vf: one of the VFs instantiated by the specified PF | 10455 | * @vf: one of the VFs instantiated by the specified PF |
| 10456 | * @vlan: The vlanid to be set | 10456 | * @vlan: The vlanid to be set |
| @@ -260,8 +260,7 @@ static int cxgb4vf_set_addr_hash(struct port_info *pi) · 259 unmodified lines | |||
| 260 | * @tcam_idx: TCAM index of existing filter for old value of MAC address, | 260 | * @tcam_idx: TCAM index of existing filter for old value of MAC address, |
| 261 | * or -1 | 261 | * or -1 |
| 262 | * @addr: the new MAC address value | 262 | * @addr: the new MAC address value |
| 263 | * @persist: whether a new MAC allocation should be persistent | 263 | * @persistent: whether a new MAC allocation should be persistent |
| 264 | * @add_smt: if true also add the address to the HW SMT | ||
| 265 | * | 264 | * |
| 266 | * Modifies an MPS filter and sets it to the new MAC address if | 265 | * Modifies an MPS filter and sets it to the new MAC address if |
| 267 | * @tcam_idx >= 0, or adds the MAC address to a new filter if | 266 | * @tcam_idx >= 0, or adds the MAC address to a new filter if |
| @@ -1692,7 +1692,7 @@ static inline bool is_new_response(const struct rsp_ctrl *rc, · 1691 unmodified lines | |||
| 1692 | * restore_rx_bufs - put back a packet's RX buffers | 1692 | * restore_rx_bufs - put back a packet's RX buffers |
| 1693 | * @gl: the packet gather list | 1693 | * @gl: the packet gather list |
| 1694 | * @fl: the SGE Free List | 1694 | * @fl: the SGE Free List |
| 1695 | * @nfrags: how many fragments in @si | 1695 | * @frags: how many fragments in @si |
| 1696 | * | 1696 | * |
| 1697 | * Called when we find out that the current packet, @si, can't be | 1697 | * Called when we find out that the current packet, @si, can't be |
| 1698 | * processed right away for some reason. This is a very rare event and | 1698 | * processed right away for some reason. This is a very rare event and |
| @@ -2054,7 +2054,7 @@ irq_handler_t t4vf_intr_handler(struct adapter *adapter) · 355 unmodified lines | |||
| 2054 | 2054 | ||
| 2055 | /** | 2055 | /** |
| 2056 | * sge_rx_timer_cb - perform periodic maintenance of SGE RX queues | 2056 | * sge_rx_timer_cb - perform periodic maintenance of SGE RX queues |
| 2057 | * @data: the adapter | 2057 | * @t: Rx timer |
| 2058 | * | 2058 | * |
| 2059 | * Runs periodically from a timer to perform maintenance of SGE RX queues. | 2059 | * Runs periodically from a timer to perform maintenance of SGE RX queues. |
| 2060 | * | 2060 | * |
| @@ -2113,7 +2113,7 @@ static void sge_rx_timer_cb(struct timer_list *t) · 52 unmodified lines | |||
| 2113 | 2113 | ||
| 2114 | /** | 2114 | /** |
| 2115 | * sge_tx_timer_cb - perform periodic maintenance of SGE Tx queues | 2115 | * sge_tx_timer_cb - perform periodic maintenance of SGE Tx queues |
| 2116 | * @data: the adapter | 2116 | * @t: Tx timer |
| 2117 | * | 2117 | * |
| 2118 | * Runs periodically from a timer to perform maintenance of SGE TX queues. | 2118 | * Runs periodically from a timer to perform maintenance of SGE TX queues. |
| 2119 | * | 2119 | * |
| @@ -2405,6 +2405,7 @@ err: · 285 unmodified lines | |||
| 2405 | * t4vf_sge_alloc_eth_txq - allocate an SGE Ethernet TX Queue | 2405 | * t4vf_sge_alloc_eth_txq - allocate an SGE Ethernet TX Queue |
| 2406 | * @adapter: the adapter | 2406 | * @adapter: the adapter |
| 2407 | * @txq: pointer to the new txq to be filled in | 2407 | * @txq: pointer to the new txq to be filled in |
| 2408 | * @dev: the network device | ||
| 2408 | * @devq: the network TX queue associated with the new txq | 2409 | * @devq: the network TX queue associated with the new txq |
| 2409 | * @iqid: the relative ingress queue ID to which events relating to | 2410 | * @iqid: the relative ingress queue ID to which events relating to |
| 2410 | * the new txq should be directed | 2411 | * the new txq should be directed |
| @@ -389,9 +389,7 @@ static inline enum cc_fec fwcap_to_cc_fec(fw_port_cap32_t fw_fec) · 388 unmodified lines | |||
| 389 | return cc_fec; | 389 | return cc_fec; |
| 390 | } | 390 | } |
| 391 | 391 | ||
| 392 | /** | 392 | /* Return the highest speed set in the port capabilities, in Mb/s. */ |
| 393 | * Return the highest speed set in the port capabilities, in Mb/s. | ||
| 394 | */ | ||
| 395 | static unsigned int fwcap_to_speed(fw_port_cap32_t caps) | 393 | static unsigned int fwcap_to_speed(fw_port_cap32_t caps) |
| 396 | { | 394 | { |
| 397 | #define TEST_SPEED_RETURN(__caps_speed, __speed) \ | 395 | #define TEST_SPEED_RETURN(__caps_speed, __speed) \ |
| @@ -1467,6 +1465,7 @@ int t4vf_identify_port(struct adapter *adapter, unsigned int viid, · 1069 unmodified lines | |||
| 1467 | * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change | 1465 | * @bcast: 1 to enable broadcast Rx, 0 to disable it, -1 no change |
| 1468 | * @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it, | 1466 | * @vlanex: 1 to enable hardware VLAN Tag extraction, 0 to disable it, |
| 1469 | * -1 no change | 1467 | * -1 no change |
| 1468 | * @sleep_ok: call is allowed to sleep | ||
| 1470 | * | 1469 | * |
| 1471 | * Sets Rx properties of a virtual interface. | 1470 | * Sets Rx properties of a virtual interface. |
| 1472 | */ | 1471 | */ |
| @@ -1906,7 +1905,7 @@ static const char *t4vf_link_down_rc_str(unsigned char link_down_rc) · 433 unmodified lines | |||
| 1906 | /** | 1905 | /** |
| 1907 | * t4vf_handle_get_port_info - process a FW reply message | 1906 | * t4vf_handle_get_port_info - process a FW reply message |
| 1908 | * @pi: the port info | 1907 | * @pi: the port info |
| 1909 | * @rpl: start of the FW message | 1908 | * @cmd: start of the FW message |
| 1910 | * | 1909 | * |
| 1911 | * Processes a GET_PORT_INFO FW reply message. | 1910 | * Processes a GET_PORT_INFO FW reply message. |
| 1912 | */ | 1911 | */ |
| @@ -2137,8 +2136,6 @@ int t4vf_handle_fw_rpl(struct adapter *adapter, const __be64 *rpl) · 224 unmodified lines | |||
| 2137 | return 0; | 2136 | return 0; |
| 2138 | } | 2137 | } |
| 2139 | 2138 | ||
| 2140 | /** | ||
| 2141 | */ | ||
| 2142 | int t4vf_prep_adapter(struct adapter *adapter) | 2139 | int t4vf_prep_adapter(struct adapter *adapter) |
| 2143 | { | 2140 | { |
| 2144 | int err; | 2141 | int err; |
| @@ -266,7 +266,7 @@ static irqreturn_t enetc_msix(int irq, void *data) · 265 unmodified lines | |||
| 266 | /* disable interrupts */ | 266 | /* disable interrupts */ |
| 267 | enetc_wr_reg(v->rbier, 0); | 267 | enetc_wr_reg(v->rbier, 0); |
| 268 | 268 | ||
| 269 | for_each_set_bit(i, &v->tx_rings_map, v->count_tx_rings) | 269 | for_each_set_bit(i, &v->tx_rings_map, ENETC_MAX_NUM_TXQS) |
| 270 | enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), 0); | 270 | enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), 0); |
| 271 | 271 | ||
| 272 | napi_schedule_irqoff(&v->napi); | 272 | napi_schedule_irqoff(&v->napi); |
| @@ -302,7 +302,7 @@ static int enetc_poll(struct napi_struct *napi, int budget) · 29 unmodified lines | |||
| 302 | /* enable interrupts */ | 302 | /* enable interrupts */ |
| 303 | enetc_wr_reg(v->rbier, ENETC_RBIER_RXTIE); | 303 | enetc_wr_reg(v->rbier, ENETC_RBIER_RXTIE); |
| 304 | 304 | ||
| 305 | for_each_set_bit(i, &v->tx_rings_map, v->count_tx_rings) | 305 | for_each_set_bit(i, &v->tx_rings_map, ENETC_MAX_NUM_TXQS) |
| 306 | enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), | 306 | enetc_wr_reg(v->tbier_base + ENETC_BDR_OFF(i), |
| 307 | ENETC_TBIER_TXTIE); | 307 | ENETC_TBIER_TXTIE); |
| 308 | 308 | ||
| @@ -1595,6 +1595,24 @@ static int enetc_set_psfp(struct net_device *ndev, int en) · 1286 unmodified lines | |||
| 1595 | return 0; | 1595 | return 0; |
| 1596 | } | 1596 | } |
| 1597 | 1597 | ||
| 1598 | static void enetc_enable_rxvlan(struct net_device *ndev, bool en) | ||
| 1599 | { | ||
| 1600 | struct enetc_ndev_priv *priv = netdev_priv(ndev); | ||
| 1601 | int i; | ||
| 1602 | |||
| 1603 | for (i = 0; i < priv->num_rx_rings; i++) | ||
| 1604 | enetc_bdr_enable_rxvlan(&priv->si->hw, i, en); | ||
| 1605 | } | ||
| 1606 | |||
| 1607 | static void enetc_enable_txvlan(struct net_device *ndev, bool en) | ||
| 1608 | { | ||
| 1609 | struct enetc_ndev_priv *priv = netdev_priv(ndev); | ||
| 1610 | int i; | ||
| 1611 | |||
| 1612 | for (i = 0; i < priv->num_tx_rings; i++) | ||
| 1613 | enetc_bdr_enable_txvlan(&priv->si->hw, i, en); | ||
| 1614 | } | ||
| 1615 | |||
| 1598 | int enetc_set_features(struct net_device *ndev, | 1616 | int enetc_set_features(struct net_device *ndev, |
| 1599 | netdev_features_t features) | 1617 | netdev_features_t features) |
| 1600 | { | 1618 | { |
| @@ -1604,6 +1622,14 @@ int enetc_set_features(struct net_device *ndev, · 3 unmodified lines | |||
| 1604 | if (changed & NETIF_F_RXHASH) | 1622 | if (changed & NETIF_F_RXHASH) |
| 1605 | enetc_set_rss(ndev, !!(features & NETIF_F_RXHASH)); | 1623 | enetc_set_rss(ndev, !!(features & NETIF_F_RXHASH)); |
| 1606 | 1624 | ||
| 1625 | if (changed & NETIF_F_HW_VLAN_CTAG_RX) | ||
| 1626 | enetc_enable_rxvlan(ndev, | ||
| 1627 | !!(features & NETIF_F_HW_VLAN_CTAG_RX)); | ||
| 1628 | |||
| 1629 | if (changed & NETIF_F_HW_VLAN_CTAG_TX) | ||
| 1630 | enetc_enable_txvlan(ndev, | ||
| 1631 | !!(features & NETIF_F_HW_VLAN_CTAG_TX)); | ||
| 1632 | |||
| 1607 | if (changed & NETIF_F_HW_TC) | 1633 | if (changed & NETIF_F_HW_TC) |
| 1608 | err = enetc_set_psfp(ndev, !!(features & NETIF_F_HW_TC)); | 1634 | err = enetc_set_psfp(ndev, !!(features & NETIF_F_HW_TC)); |
| 1609 | 1635 | ||
| @@ -531,22 +531,22 @@ struct enetc_msg_cmd_header { · 530 unmodified lines | |||
| 531 | 531 | ||
| 532 | /* Common H/W utility functions */ | 532 | /* Common H/W utility functions */ |
| 533 | 533 | ||
| 534 | static inline void enetc_enable_rxvlan(struct enetc_hw *hw, int si_idx, | 534 | static inline void enetc_bdr_enable_rxvlan(struct enetc_hw *hw, int idx, |
| 535 | bool en) | 535 | bool en) |
| 536 | { | 536 | { |
| 537 | u32 val = enetc_rxbdr_rd(hw, si_idx, ENETC_RBMR); | 537 | u32 val = enetc_rxbdr_rd(hw, idx, ENETC_RBMR); |
| 538 | 538 | ||
| 539 | val = (val & ~ENETC_RBMR_VTE) | (en ? ENETC_RBMR_VTE : 0); | 539 | val = (val & ~ENETC_RBMR_VTE) | (en ? ENETC_RBMR_VTE : 0); |
| 540 | enetc_rxbdr_wr(hw, si_idx, ENETC_RBMR, val); | 540 | enetc_rxbdr_wr(hw, idx, ENETC_RBMR, val); |
| 541 | } | 541 | } |
| 542 | 542 | ||
| 543 | static inline void enetc_enable_txvlan(struct enetc_hw *hw, int si_idx, | 543 | static inline void enetc_bdr_enable_txvlan(struct enetc_hw *hw, int idx, |
| 544 | bool en) | 544 | bool en) |
| 545 | { | 545 | { |
| 546 | u32 val = enetc_txbdr_rd(hw, si_idx, ENETC_TBMR); | 546 | u32 val = enetc_txbdr_rd(hw, idx, ENETC_TBMR); |
| 547 | 547 | ||
| 548 | val = (val & ~ENETC_TBMR_VIH) | (en ? ENETC_TBMR_VIH : 0); | 548 | val = (val & ~ENETC_TBMR_VIH) | (en ? ENETC_TBMR_VIH : 0); |
| 549 | enetc_txbdr_wr(hw, si_idx, ENETC_TBMR, val); | 549 | enetc_txbdr_wr(hw, idx, ENETC_TBMR, val); |
| 550 | } | 550 | } |
| 551 | 551 | ||
| 552 | static inline void enetc_set_bdr_prio(struct enetc_hw *hw, int bdr_idx, | 552 | static inline void enetc_set_bdr_prio(struct enetc_hw *hw, int bdr_idx, |
| @@ -649,14 +649,6 @@ static int enetc_pf_set_features(struct net_device *ndev, · 648 unmodified lines | |||
| 649 | netdev_features_t changed = ndev->features ^ features; | 649 | netdev_features_t changed = ndev->features ^ features; |
| 650 | struct enetc_ndev_priv *priv = netdev_priv(ndev); | 650 | struct enetc_ndev_priv *priv = netdev_priv(ndev); |
| 651 | 651 | ||
| 652 | if (changed & NETIF_F_HW_VLAN_CTAG_RX) | ||
| 653 | enetc_enable_rxvlan(&priv->si->hw, 0, | ||
| 654 | !!(features & NETIF_F_HW_VLAN_CTAG_RX)); | ||
| 655 | |||
| 656 | if (changed & NETIF_F_HW_VLAN_CTAG_TX) | ||
| 657 | enetc_enable_txvlan(&priv->si->hw, 0, | ||
| 658 | !!(features & NETIF_F_HW_VLAN_CTAG_TX)); | ||
| 659 | |||
| 660 | if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) { | 652 | if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) { |
| 661 | struct enetc_pf *pf = enetc_si_priv(priv->si); | 653 | struct enetc_pf *pf = enetc_si_priv(priv->si); |
| 662 | 654 | ||
| @@ -525,11 +525,6 @@ struct fec_enet_private { · 524 unmodified lines | |||
| 525 | unsigned int total_tx_ring_size; | 525 | unsigned int total_tx_ring_size; |
| 526 | unsigned int total_rx_ring_size; | 526 | unsigned int total_rx_ring_size; |
| 527 | 527 | ||
| 528 | unsigned long work_tx; | ||
| 529 | unsigned long work_rx; | ||
| 530 | unsigned long work_ts; | ||
| 531 | unsigned long work_mdio; | ||
| 532 | |||
| 533 | struct platform_device *pdev; | 528 | struct platform_device *pdev; |
| 534 | 529 | ||
| 535 | int dev_id; | 530 | int dev_id; |
| @@ -75,8 +75,6 @@ static void fec_enet_itr_coal_init(struct net_device *ndev); · 74 unmodified lines | |||
| 75 | 75 | ||
| 76 | #define DRIVER_NAME "fec" | 76 | #define DRIVER_NAME "fec" |
| 77 | 77 | ||
| 78 | #define FEC_ENET_GET_QUQUE(_x) ((_x == 0) ? 1 : ((_x == 1) ? 2 : 0)) | ||
| 79 | |||
| 80 | /* Pause frame feild and FIFO threshold */ | 78 | /* Pause frame feild and FIFO threshold */ |
| 81 | #define FEC_ENET_FCE (1 << 5) | 79 | #define FEC_ENET_FCE (1 << 5) |
| 82 | #define FEC_ENET_RSEM_V 0x84 | 80 | #define FEC_ENET_RSEM_V 0x84 |
| @@ -1248,8 +1246,6 @@ fec_enet_tx_queue(struct net_device *ndev, u16 queue_id) · 1165 unmodified lines | |||
| 1248 | 1246 | ||
| 1249 | fep = netdev_priv(ndev); | 1247 | fep = netdev_priv(ndev); |
| 1250 | 1248 | ||
| 1251 | queue_id = FEC_ENET_GET_QUQUE(queue_id); | ||
| 1252 | |||
| 1253 | txq = fep->tx_queue[queue_id]; | 1249 | txq = fep->tx_queue[queue_id]; |
| 1254 | /* get next bdp of dirty_tx */ | 1250 | /* get next bdp of dirty_tx */ |
| 1255 | nq = netdev_get_tx_queue(ndev, queue_id); | 1251 | nq = netdev_get_tx_queue(ndev, queue_id); |
| @@ -1340,17 +1336,14 @@ skb_done: · 84 unmodified lines | |||
| 1340 | writel(0, txq->bd.reg_desc_active); | 1336 | writel(0, txq->bd.reg_desc_active); |
| 1341 | } | 1337 | } |
| 1342 | 1338 | ||
| 1343 | static void | 1339 | static void fec_enet_tx(struct net_device *ndev) |
| 1344 | fec_enet_tx(struct net_device *ndev) | ||
| 1345 | { | 1340 | { |
| 1346 | struct fec_enet_private *fep = netdev_priv(ndev); | 1341 | struct fec_enet_private *fep = netdev_priv(ndev); |
| 1347 | u16 queue_id; | 1342 | int i; |
| 1348 | /* First process class A queue, then Class B and Best Effort queue */ | 1343 | |
| 1349 | for_each_set_bit(queue_id, &fep->work_tx, FEC_ENET_MAX_TX_QS) { | 1344 | /* Make sure that AVB queues are processed first. */ |
| 1350 | clear_bit(queue_id, &fep->work_tx); | 1345 | for (i = fep->num_tx_queues - 1; i >= 0; i--) |
| 1351 | fec_enet_tx_queue(ndev, queue_id); | 1346 | fec_enet_tx_queue(ndev, i); |
| 1352 | } | ||
| 1353 | return; | ||
| 1354 | } | 1347 | } |
| 1355 | 1348 | ||
| 1356 | static int | 1349 | static int |
| @@ -1426,7 +1419,6 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id) · 69 unmodified lines | |||
| 1426 | #ifdef CONFIG_M532x | 1419 | #ifdef CONFIG_M532x |
| 1427 | flush_cache_all(); | 1420 | flush_cache_all(); |
| 1428 | #endif | 1421 | #endif |
| 1429 | queue_id = FEC_ENET_GET_QUQUE(queue_id); | ||
| 1430 | rxq = fep->rx_queue[queue_id]; | 1422 | rxq = fep->rx_queue[queue_id]; |
| 1431 | 1423 | ||
| 1432 | /* First, grab all of the stats for the incoming packet. | 1424 | /* First, grab all of the stats for the incoming packet. |
| @@ -1550,6 +1542,7 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id) · 117 unmodified lines | |||
| 1550 | htons(ETH_P_8021Q), | 1542 | htons(ETH_P_8021Q), |
| 1551 | vlan_tag); | 1543 | vlan_tag); |
| 1552 | 1544 | ||
| 1545 | skb_record_rx_queue(skb, queue_id); | ||
| 1553 | napi_gro_receive(&fep->napi, skb); | 1546 | napi_gro_receive(&fep->napi, skb); |
| 1554 | 1547 | ||
| 1555 | if (is_copybreak) { | 1548 | if (is_copybreak) { |
| @@ -1595,48 +1588,30 @@ rx_processing_done: · 39 unmodified lines | |||
| 1595 | return pkt_received; | 1588 | return pkt_received; |
| 1596 | } | 1589 | } |
| 1597 | 1590 | ||
| 1598 | static int | 1591 | static int fec_enet_rx(struct net_device *ndev, int budget) |
| 1599 | fec_enet_rx(struct net_device *ndev, int budget) | ||
| 1600 | { | 1592 | { |
| 1601 | int pkt_received = 0; | ||
| 1602 | u16 queue_id; | ||
| 1603 | struct fec_enet_private *fep = netdev_priv(ndev); | 1593 | struct fec_enet_private *fep = netdev_priv(ndev); |
| 1594 | int i, done = 0; | ||
| 1604 | 1595 | ||
| 1605 | for_each_set_bit(queue_id, &fep->work_rx, FEC_ENET_MAX_RX_QS) { | 1596 | /* Make sure that AVB queues are processed first. */ |
| 1606 | int ret; | 1597 | for (i = fep->num_rx_queues - 1; i >= 0; i--) |
| 1607 | 1598 | done += fec_enet_rx_queue(ndev, budget - done, i); | |
| 1608 | ret = fec_enet_rx_queue(ndev, | ||
| 1609 | budget - pkt_received, queue_id); | ||
| 1610 | 1599 | ||
| 1611 | if (ret < budget - pkt_received) | 1600 | return done; |
| 1612 | clear_bit(queue_id, &fep->work_rx); | ||
| 1613 | |||
| 1614 | pkt_received += ret; | ||
| 1615 | } | ||
| 1616 | return pkt_received; | ||
| 1617 | } | 1601 | } |
| 1618 | 1602 | ||
| 1619 | static bool | 1603 | static bool fec_enet_collect_events(struct fec_enet_private *fep) |
| 1620 | fec_enet_collect_events(struct fec_enet_private *fep, uint int_events) | ||
| 1621 | { | 1604 | { |
| 1622 | if (int_events == 0) | 1605 | uint int_events; |
| 1623 | return false; | 1606 | |
| 1607 | int_events = readl(fep->hwp + FEC_IEVENT); | ||
| 1624 | 1608 | ||
| 1625 | if (int_events & FEC_ENET_RXF_0) | 1609 | /* Don't clear MDIO events, we poll for those */ |
| 1626 | fep->work_rx |= (1 << 2); | 1610 | int_events &= ~FEC_ENET_MII; |
| 1627 | if (int_events & FEC_ENET_RXF_1) | ||
| 1628 | fep->work_rx |= (1 << 0); | ||
| 1629 | if (int_events & FEC_ENET_RXF_2) | ||
| 1630 | fep->work_rx |= (1 << 1); | ||
| 1631 | 1611 | ||
| 1632 | if (int_events & FEC_ENET_TXF_0) | 1612 | writel(int_events, fep->hwp + FEC_IEVENT); |
| 1633 | fep->work_tx |= (1 << 2); | ||
| 1634 | if (int_events & FEC_ENET_TXF_1) | ||
| 1635 | fep->work_tx |= (1 << 0); | ||
| 1636 | if (int_events & FEC_ENET_TXF_2) | ||
| 1637 | fep->work_tx |= (1 << 1); | ||
| 1638 | 1613 | ||
| 1639 | return true; | 1614 | return int_events != 0; |
| 1640 | } | 1615 | } |
| 1641 | 1616 | ||
| 1642 | static irqreturn_t | 1617 | static irqreturn_t |
| @@ -1644,18 +1619,9 @@ fec_enet_interrupt(int irq, void *dev_id) · 1 unmodified line | |||
| 1644 | { | 1619 | { |
| 1645 | struct net_device *ndev = dev_id; | 1620 | struct net_device *ndev = dev_id; |
| 1646 | struct fec_enet_private *fep = netdev_priv(ndev); | 1621 | struct fec_enet_private *fep = netdev_priv(ndev); |
| 1647 | uint int_events; | ||
| 1648 | irqreturn_t ret = IRQ_NONE; | 1622 | irqreturn_t ret = IRQ_NONE; |
| 1649 | 1623 | ||
| 1650 | int_events = readl(fep->hwp + FEC_IEVENT); | 1624 | if (fec_enet_collect_events(fep) && fep->link) { |
| 1651 | |||
| 1652 | /* Don't clear MDIO events, we poll for those */ | ||
| 1653 | int_events &= ~FEC_ENET_MII; | ||
| 1654 | |||
| 1655 | writel(int_events, fep->hwp + FEC_IEVENT); | ||
| 1656 | fec_enet_collect_events(fep, int_events); | ||
| 1657 | |||
| 1658 | if ((fep->work_tx || fep->work_rx) && fep->link) { | ||
| 1659 | ret = IRQ_HANDLED; | 1625 | ret = IRQ_HANDLED; |
| 1660 | 1626 | ||
| 1661 | if (napi_schedule_prep(&fep->napi)) { | 1627 | if (napi_schedule_prep(&fep->napi)) { |
| @@ -1672,17 +1638,19 @@ static int fec_enet_rx_napi(struct napi_struct *napi, int budget) · 10 unmodified lines | |||
| 1672 | { | 1638 | { |
| 1673 | struct net_device *ndev = napi->dev; | 1639 | struct net_device *ndev = napi->dev; |
| 1674 | struct fec_enet_private *fep = netdev_priv(ndev); | 1640 | struct fec_enet_private *fep = netdev_priv(ndev); |
| 1675 | int pkts; | 1641 | int done = 0; |
| 1676 | 1642 | ||
| 1677 | pkts = fec_enet_rx(ndev, budget); | 1643 | do { |
| 1678 | 1644 | done += fec_enet_rx(ndev, budget - done); | |
| 1679 | fec_enet_tx(ndev); | 1645 | fec_enet_tx(ndev); |
| 1646 | } while ((done < budget) && fec_enet_collect_events(fep)); | ||
| 1680 | 1647 | ||
| 1681 | if (pkts < budget) { | 1648 | if (done < budget) { |
| 1682 | napi_complete_done(napi, pkts); | 1649 | napi_complete_done(napi, done); |
| 1683 | writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); | 1650 | writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK); |
| 1684 | } | 1651 | } |
| 1685 | return pkts; | 1652 | |
| 1653 | return done; | ||
| 1686 | } | 1654 | } |
| 1687 | 1655 | ||
| 1688 | /* ------------------------------------------------------------------------- */ | 1656 | /* ------------------------------------------------------------------------- */ |
| @@ -699,7 +699,7 @@ static void hns_nic_rx_up_pro(struct hns_nic_ring_data *ring_data, · 698 unmodified lines | |||
| 699 | struct net_device *ndev = ring_data->napi.dev; | 699 | struct net_device *ndev = ring_data->napi.dev; |
| 700 | 700 | ||
| 701 | skb->protocol = eth_type_trans(skb, ndev); | 701 | skb->protocol = eth_type_trans(skb, ndev); |
| 702 | (void)napi_gro_receive(&ring_data->napi, skb); | 702 | napi_gro_receive(&ring_data->napi, skb); |
| 703 | } | 703 | } |
| 704 | 704 | ||
| 705 | static int hns_desc_unused(struct hnae_ring *ring) | 705 | static int hns_desc_unused(struct hnae_ring *ring) |
| @@ -4127,9 +4127,8 @@ static void hns3_client_uninit(struct hnae3_handle *handle, bool reset) · 4126 unmodified lines | |||
| 4127 | 4127 | ||
| 4128 | hns3_put_ring_config(priv); | 4128 | hns3_put_ring_config(priv); |
| 4129 | 4129 | ||
| 4130 | hns3_dbg_uninit(handle); | ||
| 4131 | |||
| 4132 | out_netdev_free: | 4130 | out_netdev_free: |
| 4131 | hns3_dbg_uninit(handle); | ||
| 4133 | free_netdev(netdev); | 4132 | free_netdev(netdev); |
| 4134 | } | 4133 | } |
| 4135 | 4134 | ||
| @@ -180,18 +180,21 @@ static void hns3_lb_check_skb_data(struct hns3_enet_ring *ring, · 179 unmodified lines | |||
| 180 | { | 180 | { |
| 181 | struct hns3_enet_tqp_vector *tqp_vector = ring->tqp_vector; | 181 | struct hns3_enet_tqp_vector *tqp_vector = ring->tqp_vector; |
| 182 | unsigned char *packet = skb->data; | 182 | unsigned char *packet = skb->data; |
| 183 | u32 len = skb_headlen(skb); | ||
| 183 | u32 i; | 184 | u32 i; |
| 184 | 185 | ||
| 185 | for (i = 0; i < skb->len; i++) | 186 | len = min_t(u32, len, HNS3_NIC_LB_TEST_PACKET_SIZE); |
| 187 | |||
| 188 | for (i = 0; i < len; i++) | ||
| 186 | if (packet[i] != (unsigned char)(i & 0xff)) | 189 | if (packet[i] != (unsigned char)(i & 0xff)) |
| 187 | break; | 190 | break; |
| 188 | 191 | ||
| 189 | /* The packet is correctly received */ | 192 | /* The packet is correctly received */ |
| 190 | if (i == skb->len) | 193 | if (i == HNS3_NIC_LB_TEST_PACKET_SIZE) |
| 191 | tqp_vector->rx_group.total_packets++; | 194 | tqp_vector->rx_group.total_packets++; |
| 192 | else | 195 | else |
| 193 | print_hex_dump(KERN_ERR, "selftest:", DUMP_PREFIX_OFFSET, 16, 1, | 196 | print_hex_dump(KERN_ERR, "selftest:", DUMP_PREFIX_OFFSET, 16, 1, |
| 194 | skb->data, skb->len, true); | 197 | skb->data, len, true); |
| 195 | 198 | ||
| 196 | dev_kfree_skb_any(skb); | 199 | dev_kfree_skb_any(skb); |
| 197 | } | 200 | } |
| @@ -9859,7 +9859,7 @@ retry: · 9858 unmodified lines | |||
| 9859 | set_bit(HCLGE_STATE_RST_HANDLING, &hdev->state); | 9859 | set_bit(HCLGE_STATE_RST_HANDLING, &hdev->state); |
| 9860 | hdev->reset_type = HNAE3_FLR_RESET; | 9860 | hdev->reset_type = HNAE3_FLR_RESET; |
| 9861 | ret = hclge_reset_prepare(hdev); | 9861 | ret = hclge_reset_prepare(hdev); |
| 9862 | if (ret) { | 9862 | if (ret || hdev->reset_pending) { |
| 9863 | dev_err(&hdev->pdev->dev, "fail to prepare FLR, ret=%d\n", | 9863 | dev_err(&hdev->pdev->dev, "fail to prepare FLR, ret=%d\n", |
| 9864 | ret); | 9864 | ret); |
| 9865 | if (hdev->reset_pending || | 9865 | if (hdev->reset_pending || |
| @@ -1793,6 +1793,11 @@ static int hclgevf_reset_prepare_wait(struct hclgevf_dev *hdev) · 1792 unmodified lines | |||
| 1793 | if (hdev->reset_type == HNAE3_VF_FUNC_RESET) { | 1793 | if (hdev->reset_type == HNAE3_VF_FUNC_RESET) { |
| 1794 | hclgevf_build_send_msg(&send_msg, HCLGE_MBX_RESET, 0); | 1794 | hclgevf_build_send_msg(&send_msg, HCLGE_MBX_RESET, 0); |
| 1795 | ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); | 1795 | ret = hclgevf_send_mbx_msg(hdev, &send_msg, true, NULL, 0); |
| 1796 | if (ret) { | ||
| 1797 | dev_err(&hdev->pdev->dev, | ||
| 1798 | "failed to assert VF reset, ret = %d\n", ret); | ||
| 1799 | return ret; | ||
| 1800 | } | ||
| 1796 | hdev->rst_stats.vf_func_rst_cnt++; | 1801 | hdev->rst_stats.vf_func_rst_cnt++; |
| 1797 | } | 1802 | } |
| 1798 | 1803 | ||
| @@ -814,6 +814,8 @@ err_aeqs_init: · 813 unmodified lines | |||
| 814 | err_init_msix: | 814 | err_init_msix: |
| 815 | err_pfhwdev_alloc: | 815 | err_pfhwdev_alloc: |
| 816 | hinic_free_hwif(hwif); | 816 | hinic_free_hwif(hwif); |
| 817 | if (err > 0) | ||
| 818 | err = -EIO; | ||
| 817 | return ERR_PTR(err); | 819 | return ERR_PTR(err); |
| 818 | } | 820 | } |
| 819 | 821 | ||
| @@ -370,48 +370,89 @@ int hinic_msg_to_mgmt(struct hinic_pf_to_mgmt *pf_to_mgmt, · 369 unmodified lines | |||
| 370 | MSG_NOT_RESP, timeout); | 370 | MSG_NOT_RESP, timeout); |
| 371 | } | 371 | } |
| 372 | 372 | ||
| 373 | /** | 373 | static void recv_mgmt_msg_work_handler(struct work_struct *work) |
| 374 | * mgmt_recv_msg_handler - handler for message from mgmt cpu | ||
| 375 | * @pf_to_mgmt: PF to MGMT channel | ||
| 376 | * @recv_msg: received message details | ||
| 377 | **/ | ||
| 378 | static void mgmt_recv_msg_handler(struct hinic_pf_to_mgmt *pf_to_mgmt, | ||
| 379 | struct hinic_recv_msg *recv_msg) | ||
| 380 | { | 374 | { |
| 381 | struct hinic_hwif *hwif = pf_to_mgmt->hwif; | 375 | struct hinic_mgmt_msg_handle_work *mgmt_work = |
| 382 | struct pci_dev *pdev = hwif->pdev; | 376 | container_of(work, struct hinic_mgmt_msg_handle_work, work); |
| 383 | u8 *buf_out = recv_msg->buf_out; | 377 | struct hinic_pf_to_mgmt *pf_to_mgmt = mgmt_work->pf_to_mgmt; |
| 378 | struct pci_dev *pdev = pf_to_mgmt->hwif->pdev; | ||
| 379 | u8 *buf_out = pf_to_mgmt->mgmt_ack_buf; | ||
| 384 | struct hinic_mgmt_cb *mgmt_cb; | 380 | struct hinic_mgmt_cb *mgmt_cb; |
| 385 | unsigned long cb_state; | 381 | unsigned long cb_state; |
| 386 | u16 out_size = 0; | 382 | u16 out_size = 0; |
| 387 | 383 | ||
| 388 | if (recv_msg->mod >= HINIC_MOD_MAX) { | 384 | memset(buf_out, 0, MAX_PF_MGMT_BUF_SIZE); |
| 385 | |||
| 386 | if (mgmt_work->mod >= HINIC_MOD_MAX) { | ||
| 389 | dev_err(&pdev->dev, "Unknown MGMT MSG module = %d\n", | 387 | dev_err(&pdev->dev, "Unknown MGMT MSG module = %d\n", |
| 390 | recv_msg->mod); | 388 | mgmt_work->mod); |
| 389 | kfree(mgmt_work->msg); | ||
| 390 | kfree(mgmt_work); | ||
| 391 | return; | 391 | return; |
| 392 | } | 392 | } |
| 393 | 393 | ||
| 394 | mgmt_cb = &pf_to_mgmt->mgmt_cb[recv_msg->mod]; | 394 | mgmt_cb = &pf_to_mgmt->mgmt_cb[mgmt_work->mod]; |
| 395 | 395 | ||
| 396 | cb_state = cmpxchg(&mgmt_cb->state, | 396 | cb_state = cmpxchg(&mgmt_cb->state, |
| 397 | HINIC_MGMT_CB_ENABLED, | 397 | HINIC_MGMT_CB_ENABLED, |
| 398 | HINIC_MGMT_CB_ENABLED | HINIC_MGMT_CB_RUNNING); | 398 | HINIC_MGMT_CB_ENABLED | HINIC_MGMT_CB_RUNNING); |
| 399 | 399 | ||
| 400 | if ((cb_state == HINIC_MGMT_CB_ENABLED) && (mgmt_cb->cb)) | 400 | if ((cb_state == HINIC_MGMT_CB_ENABLED) && (mgmt_cb->cb)) |
| 401 | mgmt_cb->cb(mgmt_cb->handle, recv_msg->cmd, | 401 | mgmt_cb->cb(mgmt_cb->handle, mgmt_work->cmd, |
| 402 | recv_msg->msg, recv_msg->msg_len, | 402 | mgmt_work->msg, mgmt_work->msg_len, |
| 403 | buf_out, &out_size); | 403 | buf_out, &out_size); |
| 404 | else | 404 | else |
| 405 | dev_err(&pdev->dev, "No MGMT msg handler, mod: %d, cmd: %d\n", | 405 | dev_err(&pdev->dev, "No MGMT msg handler, mod: %d, cmd: %d\n", |
| 406 | recv_msg->mod, recv_msg->cmd); | 406 | mgmt_work->mod, mgmt_work->cmd); |
| 407 | 407 | ||
| 408 | mgmt_cb->state &= ~HINIC_MGMT_CB_RUNNING; | 408 | mgmt_cb->state &= ~HINIC_MGMT_CB_RUNNING; |
| 409 | 409 | ||
| 410 | if (!recv_msg->async_mgmt_to_pf) | 410 | if (!mgmt_work->async_mgmt_to_pf) |
| 411 | /* MGMT sent sync msg, send the response */ | 411 | /* MGMT sent sync msg, send the response */ |
| 412 | msg_to_mgmt_async(pf_to_mgmt, recv_msg->mod, recv_msg->cmd, | 412 | msg_to_mgmt_async(pf_to_mgmt, mgmt_work->mod, mgmt_work->cmd, |
| 413 | buf_out, out_size, MGMT_RESP, | 413 | buf_out, out_size, MGMT_RESP, |
| 414 | recv_msg->msg_id); | 414 | mgmt_work->msg_id); |
| 415 | |||
| 416 | kfree(mgmt_work->msg); | ||
| 417 | kfree(mgmt_work); | ||
| 418 | } | ||
| 419 | |||
| 420 | /** | ||
| 421 | * mgmt_recv_msg_handler - handler for message from mgmt cpu | ||
| 422 | * @pf_to_mgmt: PF to MGMT channel | ||
| 423 | * @recv_msg: received message details | ||
| 424 | **/ | ||
| 425 | static void mgmt_recv_msg_handler(struct hinic_pf_to_mgmt *pf_to_mgmt, | ||
| 426 | struct hinic_recv_msg *recv_msg) | ||
| 427 | { | ||
| 428 | struct hinic_mgmt_msg_handle_work *mgmt_work = NULL; | ||
| 429 | struct pci_dev *pdev = pf_to_mgmt->hwif->pdev; | ||
| 430 | |||
| 431 | mgmt_work = kzalloc(sizeof(*mgmt_work), GFP_KERNEL); | ||
| 432 | if (!mgmt_work) { | ||
| 433 | dev_err(&pdev->dev, "Allocate mgmt work memory failed\n"); | ||
| 434 | return; | ||
| 435 | } | ||
| 436 | |||
| 437 | if (recv_msg->msg_len) { | ||
| 438 | mgmt_work->msg = kzalloc(recv_msg->msg_len, GFP_KERNEL); | ||
| 439 | if (!mgmt_work->msg) { | ||
| 440 | dev_err(&pdev->dev, "Allocate mgmt msg memory failed\n"); | ||
| 441 | kfree(mgmt_work); | ||
| 442 | return; | ||
| 443 | } | ||
| 444 | } | ||
| 445 | |||
| 446 | mgmt_work->pf_to_mgmt = pf_to_mgmt; | ||
| 447 | mgmt_work->msg_len = recv_msg->msg_len; | ||
| 448 | memcpy(mgmt_work->msg, recv_msg->msg, recv_msg->msg_len); | ||
| 449 | mgmt_work->msg_id = recv_msg->msg_id; | ||
| 450 | mgmt_work->mod = recv_msg->mod; | ||
| 451 | mgmt_work->cmd = recv_msg->cmd; | ||
| 452 | mgmt_work->async_mgmt_to_pf = recv_msg->async_mgmt_to_pf; | ||
| 453 | |||
| 454 | INIT_WORK(&mgmt_work->work, recv_mgmt_msg_work_handler); | ||
| 455 | queue_work(pf_to_mgmt->workq, &mgmt_work->work); | ||
| 415 | } | 456 | } |
| 416 | 457 | ||
| 417 | /** | 458 | /** |
| @@ -546,6 +587,12 @@ static int alloc_msg_buf(struct hinic_pf_to_mgmt *pf_to_mgmt) · 128 unmodified lines | |||
| 546 | if (!pf_to_mgmt->sync_msg_buf) | 587 | if (!pf_to_mgmt->sync_msg_buf) |
| 547 | return -ENOMEM; | 588 | return -ENOMEM; |
| 548 | 589 | ||
| 590 | pf_to_mgmt->mgmt_ack_buf = devm_kzalloc(&pdev->dev, | ||
| 591 | MAX_PF_MGMT_BUF_SIZE, | ||
| 592 | GFP_KERNEL); | ||
| 593 | if (!pf_to_mgmt->mgmt_ack_buf) | ||
| 594 | return -ENOMEM; | ||
| 595 | |||
| 549 | return 0; | 596 | return 0; |
| 550 | } | 597 | } |
| 551 | 598 | ||
| @@ -571,6 +618,11 @@ int hinic_pf_to_mgmt_init(struct hinic_pf_to_mgmt *pf_to_mgmt, · 19 unmodified lines | |||
| 571 | return 0; | 618 | return 0; |
| 572 | 619 | ||
| 573 | sema_init(&pf_to_mgmt->sync_msg_lock, 1); | 620 | sema_init(&pf_to_mgmt->sync_msg_lock, 1); |
| 621 | pf_to_mgmt->workq = create_singlethread_workqueue("hinic_mgmt"); | ||
| 622 | if (!pf_to_mgmt->workq) { | ||
| 623 | dev_err(&pdev->dev, "Failed to initialize MGMT workqueue\n"); | ||
| 624 | return -ENOMEM; | ||
| 625 | } | ||
| 574 | pf_to_mgmt->sync_msg_id = 0; | 626 | pf_to_mgmt->sync_msg_id = 0; |
| 575 | 627 | ||
| 576 | err = alloc_msg_buf(pf_to_mgmt); | 628 | err = alloc_msg_buf(pf_to_mgmt); |
| @@ -605,4 +657,5 @@ void hinic_pf_to_mgmt_free(struct hinic_pf_to_mgmt *pf_to_mgmt) · 28 unmodified lines | |||
| 605 | 657 | ||
| 606 | hinic_aeq_unregister_hw_cb(&hwdev->aeqs, HINIC_MSG_FROM_MGMT_CPU); | 658 | hinic_aeq_unregister_hw_cb(&hwdev->aeqs, HINIC_MSG_FROM_MGMT_CPU); |
| 607 | hinic_api_cmd_free(pf_to_mgmt->cmd_chain); | 659 | hinic_api_cmd_free(pf_to_mgmt->cmd_chain); |
| 660 | destroy_workqueue(pf_to_mgmt->workq); | ||
| 608 | } | 661 | } |
| @@ -119,6 +119,7 @@ struct hinic_pf_to_mgmt { · 118 unmodified lines | |||
| 119 | struct semaphore sync_msg_lock; | 119 | struct semaphore sync_msg_lock; |
| 120 | u16 sync_msg_id; | 120 | u16 sync_msg_id; |
| 121 | u8 *sync_msg_buf; | 121 | u8 *sync_msg_buf; |
| 122 | void *mgmt_ack_buf; | ||
| 122 | 123 | ||
| 123 | struct hinic_recv_msg recv_resp_msg_from_mgmt; | 124 | struct hinic_recv_msg recv_resp_msg_from_mgmt; |
| 124 | struct hinic_recv_msg recv_msg_from_mgmt; | 125 | struct hinic_recv_msg recv_msg_from_mgmt; |
| @@ -126,6 +127,21 @@ struct hinic_pf_to_mgmt { · 1 unmodified line | |||
| 126 | struct hinic_api_cmd_chain *cmd_chain[HINIC_API_CMD_MAX]; | 127 | struct hinic_api_cmd_chain *cmd_chain[HINIC_API_CMD_MAX]; |
| 127 | 128 | ||
| 128 | struct hinic_mgmt_cb mgmt_cb[HINIC_MOD_MAX]; | 129 | struct hinic_mgmt_cb mgmt_cb[HINIC_MOD_MAX]; |
| 130 | |||
| 131 | struct workqueue_struct *workq; | ||
| 132 | }; | ||
| 133 | |||
| 134 | struct hinic_mgmt_msg_handle_work { | ||
| 135 | struct work_struct work; | ||
| 136 | struct hinic_pf_to_mgmt *pf_to_mgmt; | ||
| 137 | |||
| 138 | void *msg; | ||
| 139 | u16 msg_len; | ||
| 140 | |||
| 141 | enum hinic_mod_type mod; | ||
| 142 | u8 cmd; | ||
| 143 | u16 msg_id; | ||
| 144 | int async_mgmt_to_pf; | ||
| 129 | }; | 145 | }; |
| 130 | 146 | ||
| 131 | void hinic_register_mgmt_msg_cb(struct hinic_pf_to_mgmt *pf_to_mgmt, | 147 | void hinic_register_mgmt_msg_cb(struct hinic_pf_to_mgmt *pf_to_mgmt, |
| @@ -1715,7 +1715,7 @@ static int ibmveth_probe(struct vio_dev *dev, const struct vio_device_id *id) · 1714 unmodified lines | |||
| 1715 | } | 1715 | } |
| 1716 | 1716 | ||
| 1717 | netdev->min_mtu = IBMVETH_MIN_MTU; | 1717 | netdev->min_mtu = IBMVETH_MIN_MTU; |
| 1718 | netdev->max_mtu = ETH_MAX_MTU; | 1718 | netdev->max_mtu = ETH_MAX_MTU - IBMVETH_BUFF_OH; |
| 1719 | 1719 | ||
| 1720 | memcpy(netdev->dev_addr, mac_addr_p, ETH_ALEN); | 1720 | memcpy(netdev->dev_addr, mac_addr_p, ETH_ALEN); |
| 1721 | 1721 | ||
| @@ -1971,13 +1971,18 @@ static int do_reset(struct ibmvnic_adapter *adapter, · 1970 unmodified lines | |||
| 1971 | release_sub_crqs(adapter, 1); | 1971 | release_sub_crqs(adapter, 1); |
| 1972 | } else { | 1972 | } else { |
| 1973 | rc = ibmvnic_reset_crq(adapter); | 1973 | rc = ibmvnic_reset_crq(adapter); |
| 1974 | if (!rc) | 1974 | if (rc == H_CLOSED || rc == H_SUCCESS) { |
| 1975 | rc = vio_enable_interrupts(adapter->vdev); | 1975 | rc = vio_enable_interrupts(adapter->vdev); |
| 1976 | if (rc) | ||
| 1977 | netdev_err(adapter->netdev, | ||
| 1978 | "Reset failed to enable interrupts. rc=%d\n", | ||
| 1979 | rc); | ||
| 1980 | } | ||
| 1976 | } | 1981 | } |
| 1977 | 1982 | ||
| 1978 | if (rc) { | 1983 | if (rc) { |
| 1979 | netdev_err(adapter->netdev, | 1984 | netdev_err(adapter->netdev, |
| 1980 | "Couldn't initialize crq. rc=%d\n", rc); | 1985 | "Reset couldn't initialize crq. rc=%d\n", rc); |
| 1981 | goto out; | 1986 | goto out; |
| 1982 | } | 1987 | } |
| 1983 | 1988 | ||
| @@ -2070,6 +2070,9 @@ static int i40e_set_ringparam(struct net_device *netdev, · 2069 unmodified lines | |||
| 2070 | */ | 2070 | */ |
| 2071 | rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; | 2071 | rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS; |
| 2072 | err = i40e_setup_rx_descriptors(&rx_rings[i]); | 2072 | err = i40e_setup_rx_descriptors(&rx_rings[i]); |
| 2073 | if (err) | ||
| 2074 | goto rx_unwind; | ||
| 2075 | err = i40e_alloc_rx_bi(&rx_rings[i]); | ||
| 2073 | if (err) | 2076 | if (err) |
| 2074 | goto rx_unwind; | 2077 | goto rx_unwind; |
| 2075 | 2078 | ||
| @@ -439,11 +439,15 @@ static void i40e_get_netdev_stats_struct(struct net_device *netdev, · 438 unmodified lines | |||
| 439 | i40e_get_netdev_stats_struct_tx(ring, stats); | 439 | i40e_get_netdev_stats_struct_tx(ring, stats); |
| 440 | 440 | ||
| 441 | if (i40e_enabled_xdp_vsi(vsi)) { | 441 | if (i40e_enabled_xdp_vsi(vsi)) { |
| 442 | ring++; | 442 | ring = READ_ONCE(vsi->xdp_rings[i]); |
| 443 | if (!ring) | ||
| 444 | continue; | ||
| 443 | i40e_get_netdev_stats_struct_tx(ring, stats); | 445 | i40e_get_netdev_stats_struct_tx(ring, stats); |
| 444 | } | 446 | } |
| 445 | 447 | ||
| 446 | ring++; | 448 | ring = READ_ONCE(vsi->rx_rings[i]); |
| 449 | if (!ring) | ||
| 450 | continue; | ||
| 447 | do { | 451 | do { |
| 448 | start = u64_stats_fetch_begin_irq(&ring->syncp); | 452 | start = u64_stats_fetch_begin_irq(&ring->syncp); |
| 449 | packets = ring->stats.packets; | 453 | packets = ring->stats.packets; |
| @@ -787,6 +791,8 @@ static void i40e_update_vsi_stats(struct i40e_vsi *vsi) · 337 unmodified lines | |||
| 787 | for (q = 0; q < vsi->num_queue_pairs; q++) { | 791 | for (q = 0; q < vsi->num_queue_pairs; q++) { |
| 788 | /* locate Tx ring */ | 792 | /* locate Tx ring */ |
| 789 | p = READ_ONCE(vsi->tx_rings[q]); | 793 | p = READ_ONCE(vsi->tx_rings[q]); |
| 794 | if (!p) | ||
| 795 | continue; | ||
| 790 | 796 | ||
| 791 | do { | 797 | do { |
| 792 | start = u64_stats_fetch_begin_irq(&p->syncp); | 798 | start = u64_stats_fetch_begin_irq(&p->syncp); |
| @@ -800,8 +806,11 @@ static void i40e_update_vsi_stats(struct i40e_vsi *vsi) · 7 unmodified lines | |||
| 800 | tx_linearize += p->tx_stats.tx_linearize; | 806 | tx_linearize += p->tx_stats.tx_linearize; |
| 801 | tx_force_wb += p->tx_stats.tx_force_wb; | 807 | tx_force_wb += p->tx_stats.tx_force_wb; |
| 802 | 808 | ||
| 803 | /* Rx queue is part of the same block as Tx queue */ | 809 | /* locate Rx ring */ |
| 804 | p = &p[1]; | 810 | p = READ_ONCE(vsi->rx_rings[q]); |
| 811 | if (!p) | ||
| 812 | continue; | ||
| 813 | |||
| 805 | do { | 814 | do { |
| 806 | start = u64_stats_fetch_begin_irq(&p->syncp); | 815 | start = u64_stats_fetch_begin_irq(&p->syncp); |
| 807 | packets = p->stats.packets; | 816 | packets = p->stats.packets; |
| @@ -10824,10 +10833,10 @@ static void i40e_vsi_clear_rings(struct i40e_vsi *vsi) · 10016 unmodified lines | |||
| 10824 | if (vsi->tx_rings && vsi->tx_rings[0]) { | 10833 | if (vsi->tx_rings && vsi->tx_rings[0]) { |
| 10825 | for (i = 0; i < vsi->alloc_queue_pairs; i++) { | 10834 | for (i = 0; i < vsi->alloc_queue_pairs; i++) { |
| 10826 | kfree_rcu(vsi->tx_rings[i], rcu); | 10835 | kfree_rcu(vsi->tx_rings[i], rcu); |
| 10827 | vsi->tx_rings[i] = NULL; | 10836 | WRITE_ONCE(vsi->tx_rings[i], NULL); |
| 10828 | vsi->rx_rings[i] = NULL; | 10837 | WRITE_ONCE(vsi->rx_rings[i], NULL); |
| 10829 | if (vsi->xdp_rings) | 10838 | if (vsi->xdp_rings) |
| 10830 | vsi->xdp_rings[i] = NULL; | 10839 | WRITE_ONCE(vsi->xdp_rings[i], NULL); |
| 10831 | } | 10840 | } |
| 10832 | } | 10841 | } |
| 10833 | } | 10842 | } |
| @@ -10861,7 +10870,7 @@ static int i40e_alloc_rings(struct i40e_vsi *vsi) · 27 unmodified lines | |||
| 10861 | if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) | 10870 | if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE) |
| 10862 | ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; | 10871 | ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; |
| 10863 | ring->itr_setting = pf->tx_itr_default; | 10872 | ring->itr_setting = pf->tx_itr_default; |
| 10864 | vsi->tx_rings[i] = ring++; | 10873 | WRITE_ONCE(vsi->tx_rings[i], ring++); |
| 10865 | 10874 | ||
| 10866 | if (!i40e_enabled_xdp_vsi(vsi)) | 10875 | if (!i40e_enabled_xdp_vsi(vsi)) |
| 10867 | goto setup_rx; | 10876 | goto setup_rx; |
| @@ -10879,7 +10888,7 @@ static int i40e_alloc_rings(struct i40e_vsi *vsi) · 11 unmodified lines | |||
| 10879 | ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; | 10888 | ring->flags = I40E_TXR_FLAGS_WB_ON_ITR; |
| 10880 | set_ring_xdp(ring); | 10889 | set_ring_xdp(ring); |
| 10881 | ring->itr_setting = pf->tx_itr_default; | 10890 | ring->itr_setting = pf->tx_itr_default; |
| 10882 | vsi->xdp_rings[i] = ring++; | 10891 | WRITE_ONCE(vsi->xdp_rings[i], ring++); |
| 10883 | 10892 | ||
| 10884 | setup_rx: | 10893 | setup_rx: |
| 10885 | ring->queue_index = i; | 10894 | ring->queue_index = i; |
| @@ -10892,7 +10901,7 @@ setup_rx: · 6 unmodified lines | |||
| 10892 | ring->size = 0; | 10901 | ring->size = 0; |
| 10893 | ring->dcb_tc = 0; | 10902 | ring->dcb_tc = 0; |
| 10894 | ring->itr_setting = pf->rx_itr_default; | 10903 | ring->itr_setting = pf->rx_itr_default; |
| 10895 | vsi->rx_rings[i] = ring; | 10904 | WRITE_ONCE(vsi->rx_rings[i], ring); |
| 10896 | } | 10905 | } |
| 10897 | 10906 | ||
| 10898 | return 0; | 10907 | return 0; |
| @@ -1194,7 +1194,7 @@ static void ice_vsi_clear_rings(struct ice_vsi *vsi) · 1193 unmodified lines | |||
| 1194 | for (i = 0; i < vsi->alloc_txq; i++) { | 1194 | for (i = 0; i < vsi->alloc_txq; i++) { |
| 1195 | if (vsi->tx_rings[i]) { | 1195 | if (vsi->tx_rings[i]) { |
| 1196 | kfree_rcu(vsi->tx_rings[i], rcu); | 1196 | kfree_rcu(vsi->tx_rings[i], rcu); |
| 1197 | vsi->tx_rings[i] = NULL; | 1197 | WRITE_ONCE(vsi->tx_rings[i], NULL); |
| 1198 | } | 1198 | } |
| 1199 | } | 1199 | } |
| 1200 | } | 1200 | } |
| @@ -1202,7 +1202,7 @@ static void ice_vsi_clear_rings(struct ice_vsi *vsi) · 1 unmodified line | |||
| 1202 | for (i = 0; i < vsi->alloc_rxq; i++) { | 1202 | for (i = 0; i < vsi->alloc_rxq; i++) { |
| 1203 | if (vsi->rx_rings[i]) { | 1203 | if (vsi->rx_rings[i]) { |
| 1204 | kfree_rcu(vsi->rx_rings[i], rcu); | 1204 | kfree_rcu(vsi->rx_rings[i], rcu); |
| 1205 | vsi->rx_rings[i] = NULL; | 1205 | WRITE_ONCE(vsi->rx_rings[i], NULL); |
| 1206 | } | 1206 | } |
| 1207 | } | 1207 | } |
| 1208 | } | 1208 | } |
| @@ -1235,7 +1235,7 @@ static int ice_vsi_alloc_rings(struct ice_vsi *vsi) · 26 unmodified lines | |||
| 1235 | ring->vsi = vsi; | 1235 | ring->vsi = vsi; |
| 1236 | ring->dev = dev; | 1236 | ring->dev = dev; |
| 1237 | ring->count = vsi->num_tx_desc; | 1237 | ring->count = vsi->num_tx_desc; |
| 1238 | vsi->tx_rings[i] = ring; | 1238 | WRITE_ONCE(vsi->tx_rings[i], ring); |
| 1239 | } | 1239 | } |
| 1240 | 1240 | ||
| 1241 | /* Allocate Rx rings */ | 1241 | /* Allocate Rx rings */ |
| @@ -1254,7 +1254,7 @@ static int ice_vsi_alloc_rings(struct ice_vsi *vsi) · 12 unmodified lines | |||
| 1254 | ring->netdev = vsi->netdev; | 1254 | ring->netdev = vsi->netdev; |
| 1255 | ring->dev = dev; | 1255 | ring->dev = dev; |
| 1256 | ring->count = vsi->num_rx_desc; | 1256 | ring->count = vsi->num_rx_desc; |
| 1257 | vsi->rx_rings[i] = ring; | 1257 | WRITE_ONCE(vsi->rx_rings[i], ring); |
| 1258 | } | 1258 | } |
| 1259 | 1259 | ||
| 1260 | return 0; | 1260 | return 0; |
| @@ -1702,7 +1702,7 @@ static int ice_xdp_alloc_setup_rings(struct ice_vsi *vsi) · 1701 unmodified lines | |||
| 1702 | xdp_ring->netdev = NULL; | 1702 | xdp_ring->netdev = NULL; |
| 1703 | xdp_ring->dev = dev; | 1703 | xdp_ring->dev = dev; |
| 1704 | xdp_ring->count = vsi->num_tx_desc; | 1704 | xdp_ring->count = vsi->num_tx_desc; |
| 1705 | vsi->xdp_rings[i] = xdp_ring; | 1705 | WRITE_ONCE(vsi->xdp_rings[i], xdp_ring); |
| 1706 | if (ice_setup_tx_ring(xdp_ring)) | 1706 | if (ice_setup_tx_ring(xdp_ring)) |
| 1707 | goto free_xdp_rings; | 1707 | goto free_xdp_rings; |
| 1708 | ice_set_ring_xdp(xdp_ring); | 1708 | ice_set_ring_xdp(xdp_ring); |
| @@ -921,7 +921,7 @@ static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter, · 920 unmodified lines | |||
| 921 | ring->queue_index = txr_idx; | 921 | ring->queue_index = txr_idx; |
| 922 | 922 | ||
| 923 | /* assign ring to adapter */ | 923 | /* assign ring to adapter */ |
| 924 | adapter->tx_ring[txr_idx] = ring; | 924 | WRITE_ONCE(adapter->tx_ring[txr_idx], ring); |
| 925 | 925 | ||
| 926 | /* update count and index */ | 926 | /* update count and index */ |
| 927 | txr_count--; | 927 | txr_count--; |
| @@ -948,7 +948,7 @@ static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter, · 20 unmodified lines | |||
| 948 | set_ring_xdp(ring); | 948 | set_ring_xdp(ring); |
| 949 | 949 | ||
| 950 | /* assign ring to adapter */ | 950 | /* assign ring to adapter */ |
| 951 | adapter->xdp_ring[xdp_idx] = ring; | 951 | WRITE_ONCE(adapter->xdp_ring[xdp_idx], ring); |
| 952 | 952 | ||
| 953 | /* update count and index */ | 953 | /* update count and index */ |
| 954 | xdp_count--; | 954 | xdp_count--; |
| @@ -991,7 +991,7 @@ static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter, · 36 unmodified lines | |||
| 991 | ring->queue_index = rxr_idx; | 991 | ring->queue_index = rxr_idx; |
| 992 | 992 | ||
| 993 | /* assign ring to adapter */ | 993 | /* assign ring to adapter */ |
| 994 | adapter->rx_ring[rxr_idx] = ring; | 994 | WRITE_ONCE(adapter->rx_ring[rxr_idx], ring); |
| 995 | 995 | ||
| 996 | /* update count and index */ | 996 | /* update count and index */ |
| 997 | rxr_count--; | 997 | rxr_count--; |
| @@ -1020,13 +1020,13 @@ static void ixgbe_free_q_vector(struct ixgbe_adapter *adapter, int v_idx) · 22 unmodified lines | |||
| 1020 | 1020 | ||
| 1021 | ixgbe_for_each_ring(ring, q_vector->tx) { | 1021 | ixgbe_for_each_ring(ring, q_vector->tx) { |
| 1022 | if (ring_is_xdp(ring)) | 1022 | if (ring_is_xdp(ring)) |
| 1023 | adapter->xdp_ring[ring->queue_index] = NULL; | 1023 | WRITE_ONCE(adapter->xdp_ring[ring->queue_index], NULL); |
| 1024 | else | 1024 | else |
| 1025 | adapter->tx_ring[ring->queue_index] = NULL; | 1025 | WRITE_ONCE(adapter->tx_ring[ring->queue_index], NULL); |
| 1026 | } | 1026 | } |
| 1027 | 1027 | ||
| 1028 | ixgbe_for_each_ring(ring, q_vector->rx) | 1028 | ixgbe_for_each_ring(ring, q_vector->rx) |
| 1029 | adapter->rx_ring[ring->queue_index] = NULL; | 1029 | WRITE_ONCE(adapter->rx_ring[ring->queue_index], NULL); |
| 1030 | 1030 | ||
| 1031 | adapter->q_vector[v_idx] = NULL; | 1031 | adapter->q_vector[v_idx] = NULL; |
| 1032 | napi_hash_del(&q_vector->napi); | 1032 | napi_hash_del(&q_vector->napi); |
| @@ -7051,7 +7051,10 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter) · 7050 unmodified lines | |||
| 7051 | } | 7051 | } |
| 7052 | 7052 | ||
| 7053 | for (i = 0; i < adapter->num_rx_queues; i++) { | 7053 | for (i = 0; i < adapter->num_rx_queues; i++) { |
| 7054 | struct ixgbe_ring *rx_ring = adapter->rx_ring[i]; | 7054 | struct ixgbe_ring *rx_ring = READ_ONCE(adapter->rx_ring[i]); |
| 7055 | |||
| 7056 | if (!rx_ring) | ||
| 7057 | continue; | ||
| 7055 | non_eop_descs += rx_ring->rx_stats.non_eop_descs; | 7058 | non_eop_descs += rx_ring->rx_stats.non_eop_descs; |
| 7056 | alloc_rx_page += rx_ring->rx_stats.alloc_rx_page; | 7059 | alloc_rx_page += rx_ring->rx_stats.alloc_rx_page; |
| 7057 | alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed; | 7060 | alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed; |
| @@ -7072,15 +7075,20 @@ void ixgbe_update_stats(struct ixgbe_adapter *adapter) · 14 unmodified lines | |||
| 7072 | packets = 0; | 7075 | packets = 0; |
| 7073 | /* gather some stats to the adapter struct that are per queue */ | 7076 | /* gather some stats to the adapter struct that are per queue */ |
| 7074 | for (i = 0; i < adapter->num_tx_queues; i++) { | 7077 | for (i = 0; i < adapter->num_tx_queues; i++) { |
| 7075 | struct ixgbe_ring *tx_ring = adapter->tx_ring[i]; | 7078 | struct ixgbe_ring *tx_ring = READ_ONCE(adapter->tx_ring[i]); |
| 7079 | |||
| 7080 | if (!tx_ring) | ||
| 7081 | continue; | ||
| 7076 | restart_queue += tx_ring->tx_stats.restart_queue; | 7082 | restart_queue += tx_ring->tx_stats.restart_queue; |
| 7077 | tx_busy += tx_ring->tx_stats.tx_busy; | 7083 | tx_busy += tx_ring->tx_stats.tx_busy; |
| 7078 | bytes += tx_ring->stats.bytes; | 7084 | bytes += tx_ring->stats.bytes; |
| 7079 | packets += tx_ring->stats.packets; | 7085 | packets += tx_ring->stats.packets; |
| 7080 | } | 7086 | } |
| 7081 | for (i = 0; i < adapter->num_xdp_queues; i++) { | 7087 | for (i = 0; i < adapter->num_xdp_queues; i++) { |
| 7082 | struct ixgbe_ring *xdp_ring = adapter->xdp_ring[i]; | 7088 | struct ixgbe_ring *xdp_ring = READ_ONCE(adapter->xdp_ring[i]); |
| 7083 | 7089 | ||
| 7090 | if (!xdp_ring) | ||
| 7091 | continue; | ||
| 7084 | restart_queue += xdp_ring->tx_stats.restart_queue; | 7092 | restart_queue += xdp_ring->tx_stats.restart_queue; |
| 7085 | tx_busy += xdp_ring->tx_stats.tx_busy; | 7093 | tx_busy += xdp_ring->tx_stats.tx_busy; |
| 7086 | bytes += xdp_ring->stats.bytes; | 7094 | bytes += xdp_ring->stats.bytes; |
| @@ -106,9 +106,11 @@ · 105 unmodified lines | |||
| 106 | #define MVNETA_TX_IN_PRGRS BIT(1) | 106 | #define MVNETA_TX_IN_PRGRS BIT(1) |
| 107 | #define MVNETA_TX_FIFO_EMPTY BIT(8) | 107 | #define MVNETA_TX_FIFO_EMPTY BIT(8) |
| 108 | #define MVNETA_RX_MIN_FRAME_SIZE 0x247c | 108 | #define MVNETA_RX_MIN_FRAME_SIZE 0x247c |
| 109 | /* Only exists on Armada XP and Armada 370 */ | ||
| 109 | #define MVNETA_SERDES_CFG 0x24A0 | 110 | #define MVNETA_SERDES_CFG 0x24A0 |
| 110 | #define MVNETA_SGMII_SERDES_PROTO 0x0cc7 | 111 | #define MVNETA_SGMII_SERDES_PROTO 0x0cc7 |
| 111 | #define MVNETA_QSGMII_SERDES_PROTO 0x0667 | 112 | #define MVNETA_QSGMII_SERDES_PROTO 0x0667 |
| 113 | #define MVNETA_HSGMII_SERDES_PROTO 0x1107 | ||
| 112 | #define MVNETA_TYPE_PRIO 0x24bc | 114 | #define MVNETA_TYPE_PRIO 0x24bc |
| 113 | #define MVNETA_FORCE_UNI BIT(21) | 115 | #define MVNETA_FORCE_UNI BIT(21) |
| 114 | #define MVNETA_TXQ_CMD_1 0x24e4 | 116 | #define MVNETA_TXQ_CMD_1 0x24e4 |
| @@ -3529,26 +3531,60 @@ static int mvneta_setup_txqs(struct mvneta_port *pp) · 3414 unmodified lines | |||
| 3529 | return 0; | 3531 | return 0; |
| 3530 | } | 3532 | } |
| 3531 | 3533 | ||
| 3532 | static int mvneta_comphy_init(struct mvneta_port *pp) | 3534 | static int mvneta_comphy_init(struct mvneta_port *pp, phy_interface_t interface) |
| 3533 | { | 3535 | { |
| 3534 | int ret; | 3536 | int ret; |
| 3535 | 3537 | ||
| 3536 | if (!pp->comphy) | 3538 | ret = phy_set_mode_ext(pp->comphy, PHY_MODE_ETHERNET, interface); |
| 3537 | return 0; | ||
| 3538 | |||
| 3539 | ret = phy_set_mode_ext(pp->comphy, PHY_MODE_ETHERNET, | ||
| 3540 | pp->phy_interface); | ||
| 3541 | if (ret) | 3539 | if (ret) |
| 3542 | return ret; | 3540 | return ret; |
| 3543 | 3541 | ||
| 3544 | return phy_power_on(pp->comphy); | 3542 | return phy_power_on(pp->comphy); |
| 3545 | } | 3543 | } |
| 3546 | 3544 | ||
| 3545 | static int mvneta_config_interface(struct mvneta_port *pp, | ||
| 3546 | phy_interface_t interface) | ||
| 3547 | { | ||
| 3548 | int ret = 0; | ||
| 3549 | |||
| 3550 | if (pp->comphy) { | ||
| 3551 | if (interface == PHY_INTERFACE_MODE_SGMII || | ||
| 3552 | interface == PHY_INTERFACE_MODE_1000BASEX || | ||
| 3553 | interface == PHY_INTERFACE_MODE_2500BASEX) { | ||
| 3554 | ret = mvneta_comphy_init(pp, interface); | ||
| 3555 | } | ||
| 3556 | } else { | ||
| 3557 | switch (interface) { | ||
| 3558 | case PHY_INTERFACE_MODE_QSGMII: | ||
| 3559 | mvreg_write(pp, MVNETA_SERDES_CFG, | ||
| 3560 | MVNETA_QSGMII_SERDES_PROTO); | ||
| 3561 | break; | ||
| 3562 | |||
| 3563 | case PHY_INTERFACE_MODE_SGMII: | ||
| 3564 | case PHY_INTERFACE_MODE_1000BASEX: | ||
| 3565 | mvreg_write(pp, MVNETA_SERDES_CFG, | ||
| 3566 | MVNETA_SGMII_SERDES_PROTO); | ||
| 3567 | break; | ||
| 3568 | |||
| 3569 | case PHY_INTERFACE_MODE_2500BASEX: | ||
| 3570 | mvreg_write(pp, MVNETA_SERDES_CFG, | ||
| 3571 | MVNETA_HSGMII_SERDES_PROTO); | ||
| 3572 | break; | ||
| 3573 | default: | ||
| 3574 | break; | ||
| 3575 | } | ||
| 3576 | } | ||
| 3577 | |||
| 3578 | pp->phy_interface = interface; | ||
| 3579 | |||
| 3580 | return ret; | ||
| 3581 | } | ||
| 3582 | |||
| 3547 | static void mvneta_start_dev(struct mvneta_port *pp) | 3583 | static void mvneta_start_dev(struct mvneta_port *pp) |
| 3548 | { | 3584 | { |
| 3549 | int cpu; | 3585 | int cpu; |
| 3550 | 3586 | ||
| 3551 | WARN_ON(mvneta_comphy_init(pp)); | 3587 | WARN_ON(mvneta_config_interface(pp, pp->phy_interface)); |
| 3552 | 3588 | ||
| 3553 | mvneta_max_rx_size_set(pp, pp->pkt_size); | 3589 | mvneta_max_rx_size_set(pp, pp->pkt_size); |
| 3554 | mvneta_txq_max_tx_size_set(pp, pp->pkt_size); | 3590 | mvneta_txq_max_tx_size_set(pp, pp->pkt_size); |
| @@ -3923,17 +3959,13 @@ static void mvneta_mac_config(struct phylink_config *config, unsigned int mode, · 368 unmodified lines | |||
| 3923 | /* When at 2.5G, the link partner can send frames with shortened | 3959 | /* When at 2.5G, the link partner can send frames with shortened |
| 3924 | * preambles. | 3960 | * preambles. |
| 3925 | */ | 3961 | */ |
| 3926 | if (state->speed == SPEED_2500) | 3962 | if (state->interface == PHY_INTERFACE_MODE_2500BASEX) |
| 3927 | new_ctrl4 |= MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE; | 3963 | new_ctrl4 |= MVNETA_GMAC4_SHORT_PREAMBLE_ENABLE; |
| 3928 | 3964 | ||
| 3929 | if (pp->comphy && pp->phy_interface != state->interface && | 3965 | if (pp->phy_interface != state->interface) { |
| 3930 | (state->interface == PHY_INTERFACE_MODE_SGMII || | 3966 | if (pp->comphy) |
| 3931 | state->interface == PHY_INTERFACE_MODE_1000BASEX || | 3967 | WARN_ON(phy_power_off(pp->comphy)); |
| 3932 | state->interface == PHY_INTERFACE_MODE_2500BASEX)) { | 3968 | WARN_ON(mvneta_config_interface(pp, state->interface)); |
| 3933 | pp->phy_interface = state->interface; | ||
| 3934 | |||
| 3935 | WARN_ON(phy_power_off(pp->comphy)); | ||
| 3936 | WARN_ON(mvneta_comphy_init(pp)); | ||
| 3937 | } | 3969 | } |
| 3938 | 3970 | ||
| 3939 | if (new_ctrl0 != gmac_ctrl0) | 3971 | if (new_ctrl0 != gmac_ctrl0) |
| @@ -4982,12 +5014,10 @@ static int mvneta_port_power_up(struct mvneta_port *pp, int phy_mode) · 1042 unmodified lines | |||
| 4982 | /* MAC Cause register should be cleared */ | 5014 | /* MAC Cause register should be cleared */ |
| 4983 | mvreg_write(pp, MVNETA_UNIT_INTR_CAUSE, 0); | 5015 | mvreg_write(pp, MVNETA_UNIT_INTR_CAUSE, 0); |
| 4984 | 5016 | ||
| 4985 | if (phy_mode == PHY_INTERFACE_MODE_QSGMII) | 5017 | if (phy_mode != PHY_INTERFACE_MODE_QSGMII && |
| 4986 | mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_QSGMII_SERDES_PROTO); | 5018 | phy_mode != PHY_INTERFACE_MODE_SGMII && |
| 4987 | else if (phy_mode == PHY_INTERFACE_MODE_SGMII || | 5019 | !phy_interface_mode_is_8023z(phy_mode) && |
| 4988 | phy_interface_mode_is_8023z(phy_mode)) | 5020 | !phy_interface_mode_is_rgmii(phy_mode)) |
| 4989 | mvreg_write(pp, MVNETA_SERDES_CFG, MVNETA_SGMII_SERDES_PROTO); | ||
| 4990 | else if (!phy_interface_mode_is_rgmii(phy_mode)) | ||
| 4991 | return -EINVAL; | 5021 | return -EINVAL; |
| 4992 | 5022 | ||
| 4993 | return 0; | 5023 | return 0; |
| @@ -5176,10 +5206,10 @@ static int mvneta_probe(struct platform_device *pdev) · 182 unmodified lines | |||
| 5176 | if (err < 0) | 5206 | if (err < 0) |
| 5177 | goto err_netdev; | 5207 | goto err_netdev; |
| 5178 | 5208 | ||
| 5179 | err = mvneta_port_power_up(pp, phy_mode); | 5209 | err = mvneta_port_power_up(pp, pp->phy_interface); |
| 5180 | if (err < 0) { | 5210 | if (err < 0) { |
| 5181 | dev_err(&pdev->dev, "can't power up port\n"); | 5211 | dev_err(&pdev->dev, "can't power up port\n"); |
| 5182 | goto err_netdev; | 5212 | return err; |
| 5183 | } | 5213 | } |
| 5184 | 5214 | ||
| 5185 | /* Armada3700 network controller does not support per-cpu | 5215 | /* Armada3700 network controller does not support per-cpu |
| @@ -203,7 +203,7 @@ io_error: · 202 unmodified lines | |||
| 203 | 203 | ||
| 204 | static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg) | 204 | static inline u16 gm_phy_read(struct sky2_hw *hw, unsigned port, u16 reg) |
| 205 | { | 205 | { |
| 206 | u16 v; | 206 | u16 v = 0; |
| 207 | __gm_phy_read(hw, port, reg, &v); | 207 | __gm_phy_read(hw, port, reg, &v); |
| 208 | return v; | 208 | return v; |
| 209 | } | 209 | } |
| @@ -29,6 +29,7 @@ struct mlx5e_dcbx { · 28 unmodified lines | |||
| 29 | bool manual_buffer; | 29 | bool manual_buffer; |
| 30 | u32 cable_len; | 30 | u32 cable_len; |
| 31 | u32 xoff; | 31 | u32 xoff; |
| 32 | u16 port_buff_cell_sz; | ||
| 32 | }; | 33 | }; |
| 33 | 34 | ||
| 34 | #define MLX5E_MAX_DSCP (64) | 35 | #define MLX5E_MAX_DSCP (64) |
| @@ -78,11 +78,26 @@ static const u32 mlx5e_ext_link_speed[MLX5E_EXT_LINK_MODES_NUMBER] = { · 77 unmodified lines | |||
| 78 | [MLX5E_400GAUI_8] = 400000, | 78 | [MLX5E_400GAUI_8] = 400000, |
| 79 | }; | 79 | }; |
| 80 | 80 | ||
| 81 | bool mlx5e_ptys_ext_supported(struct mlx5_core_dev *mdev) | ||
| 82 | { | ||
| 83 | struct mlx5e_port_eth_proto eproto; | ||
| 84 | int err; | ||
| 85 | |||
| 86 | if (MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet)) | ||
| 87 | return true; | ||
| 88 | |||
| 89 | err = mlx5_port_query_eth_proto(mdev, 1, true, &eproto); | ||
| 90 | if (err) | ||
| 91 | return false; | ||
| 92 | |||
| 93 | return !!eproto.cap; | ||
| 94 | } | ||
| 95 | |||
| 81 | static void mlx5e_port_get_speed_arr(struct mlx5_core_dev *mdev, | 96 | static void mlx5e_port_get_speed_arr(struct mlx5_core_dev *mdev, |
| 82 | const u32 **arr, u32 *size, | 97 | const u32 **arr, u32 *size, |
| 83 | bool force_legacy) | 98 | bool force_legacy) |
| 84 | { | 99 | { |
| 85 | bool ext = force_legacy ? false : MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); | 100 | bool ext = force_legacy ? false : mlx5e_ptys_ext_supported(mdev); |
| 86 | 101 | ||
| 87 | *size = ext ? ARRAY_SIZE(mlx5e_ext_link_speed) : | 102 | *size = ext ? ARRAY_SIZE(mlx5e_ext_link_speed) : |
| 88 | ARRAY_SIZE(mlx5e_link_speed); | 103 | ARRAY_SIZE(mlx5e_link_speed); |
| @@ -177,7 +192,7 @@ int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed) · 88 unmodified lines | |||
| 177 | bool ext; | 192 | bool ext; |
| 178 | int err; | 193 | int err; |
| 179 | 194 | ||
| 180 | ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); | 195 | ext = mlx5e_ptys_ext_supported(mdev); |
| 181 | err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto); | 196 | err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto); |
| 182 | if (err) | 197 | if (err) |
| 183 | goto out; | 198 | goto out; |
| @@ -205,7 +220,7 @@ int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed) · 21 unmodified lines | |||
| 205 | int err; | 220 | int err; |
| 206 | int i; | 221 | int i; |
| 207 | 222 | ||
| 208 | ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); | 223 | ext = mlx5e_ptys_ext_supported(mdev); |
| 209 | err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto); | 224 | err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto); |
| 210 | if (err) | 225 | if (err) |
| 211 | return err; | 226 | return err; |
| @@ -54,7 +54,7 @@ int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed); · 53 unmodified lines | |||
| 54 | int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed); | 54 | int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed); |
| 55 | u32 mlx5e_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed, | 55 | u32 mlx5e_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed, |
| 56 | bool force_legacy); | 56 | bool force_legacy); |
| 57 | 57 | bool mlx5e_ptys_ext_supported(struct mlx5_core_dev *mdev); | |
| 58 | int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out); | 58 | int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out); |
| 59 | int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in); | 59 | int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in); |
| 60 | int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer); | 60 | int mlx5e_port_query_priority2buffer(struct mlx5_core_dev *mdev, u8 *buffer); |
| @@ -34,6 +34,7 @@ · 33 unmodified lines | |||
| 34 | int mlx5e_port_query_buffer(struct mlx5e_priv *priv, | 34 | int mlx5e_port_query_buffer(struct mlx5e_priv *priv, |
| 35 | struct mlx5e_port_buffer *port_buffer) | 35 | struct mlx5e_port_buffer *port_buffer) |
| 36 | { | 36 | { |
| 37 | u16 port_buff_cell_sz = priv->dcbx.port_buff_cell_sz; | ||
| 37 | struct mlx5_core_dev *mdev = priv->mdev; | 38 | struct mlx5_core_dev *mdev = priv->mdev; |
| 38 | int sz = MLX5_ST_SZ_BYTES(pbmc_reg); | 39 | int sz = MLX5_ST_SZ_BYTES(pbmc_reg); |
| 39 | u32 total_used = 0; | 40 | u32 total_used = 0; |
| @@ -57,11 +58,11 @@ int mlx5e_port_query_buffer(struct mlx5e_priv *priv, · 17 unmodified lines | |||
| 57 | port_buffer->buffer[i].epsb = | 58 | port_buffer->buffer[i].epsb = |
| 58 | MLX5_GET(bufferx_reg, buffer, epsb); | 59 | MLX5_GET(bufferx_reg, buffer, epsb); |
| 59 | port_buffer->buffer[i].size = | 60 | port_buffer->buffer[i].size = |
| 60 | MLX5_GET(bufferx_reg, buffer, size) << MLX5E_BUFFER_CELL_SHIFT; | 61 | MLX5_GET(bufferx_reg, buffer, size) * port_buff_cell_sz; |
| 61 | port_buffer->buffer[i].xon = | 62 | port_buffer->buffer[i].xon = |
| 62 | MLX5_GET(bufferx_reg, buffer, xon_threshold) << MLX5E_BUFFER_CELL_SHIFT; | 63 | MLX5_GET(bufferx_reg, buffer, xon_threshold) * port_buff_cell_sz; |
| 63 | port_buffer->buffer[i].xoff = | 64 | port_buffer->buffer[i].xoff = |
| 64 | MLX5_GET(bufferx_reg, buffer, xoff_threshold) << MLX5E_BUFFER_CELL_SHIFT; | 65 | MLX5_GET(bufferx_reg, buffer, xoff_threshold) * port_buff_cell_sz; |
| 65 | total_used += port_buffer->buffer[i].size; | 66 | total_used += port_buffer->buffer[i].size; |
| 66 | 67 | ||
| 67 | mlx5e_dbg(HW, priv, "buffer %d: size=%d, xon=%d, xoff=%d, epsb=%d, lossy=%d\n", i, | 68 | mlx5e_dbg(HW, priv, "buffer %d: size=%d, xon=%d, xoff=%d, epsb=%d, lossy=%d\n", i, |
| @@ -73,7 +74,7 @@ int mlx5e_port_query_buffer(struct mlx5e_priv *priv, · 5 unmodified lines | |||
| 73 | } | 74 | } |
| 74 | 75 | ||
| 75 | port_buffer->port_buffer_size = | 76 | port_buffer->port_buffer_size = |
| 76 | MLX5_GET(pbmc_reg, out, port_buffer_size) << MLX5E_BUFFER_CELL_SHIFT; | 77 | MLX5_GET(pbmc_reg, out, port_buffer_size) * port_buff_cell_sz; |
| 77 | port_buffer->spare_buffer_size = | 78 | port_buffer->spare_buffer_size = |
| 78 | port_buffer->port_buffer_size - total_used; | 79 | port_buffer->port_buffer_size - total_used; |
| 79 | 80 | ||
| @@ -88,9 +89,9 @@ out: · 8 unmodified lines | |||
| 88 | static int port_set_buffer(struct mlx5e_priv *priv, | 89 | static int port_set_buffer(struct mlx5e_priv *priv, |
| 89 | struct mlx5e_port_buffer *port_buffer) | 90 | struct mlx5e_port_buffer *port_buffer) |
| 90 | { | 91 | { |
| 92 | u16 port_buff_cell_sz = priv->dcbx.port_buff_cell_sz; | ||
| 91 | struct mlx5_core_dev *mdev = priv->mdev; | 93 | struct mlx5_core_dev *mdev = priv->mdev; |
| 92 | int sz = MLX5_ST_SZ_BYTES(pbmc_reg); | 94 | int sz = MLX5_ST_SZ_BYTES(pbmc_reg); |
| 93 | void *buffer; | ||
| 94 | void *in; | 95 | void *in; |
| 95 | int err; | 96 | int err; |
| 96 | int i; | 97 | int i; |
| @@ -104,16 +105,18 @@ static int port_set_buffer(struct mlx5e_priv *priv, · 7 unmodified lines | |||
| 104 | goto out; | 105 | goto out; |
| 105 | 106 | ||
| 106 | for (i = 0; i < MLX5E_MAX_BUFFER; i++) { | 107 | for (i = 0; i < MLX5E_MAX_BUFFER; i++) { |
| 107 | buffer = MLX5_ADDR_OF(pbmc_reg, in, buffer[i]); | 108 | void *buffer = MLX5_ADDR_OF(pbmc_reg, in, buffer[i]); |
| 108 | 109 | u64 size = port_buffer->buffer[i].size; | |
| 109 | MLX5_SET(bufferx_reg, buffer, size, | 110 | u64 xoff = port_buffer->buffer[i].xoff; |
| 110 | port_buffer->buffer[i].size >> MLX5E_BUFFER_CELL_SHIFT); | 111 | u64 xon = port_buffer->buffer[i].xon; |
| 111 | MLX5_SET(bufferx_reg, buffer, lossy, | 112 | |
| 112 | port_buffer->buffer[i].lossy); | 113 | do_div(size, port_buff_cell_sz); |
| 113 | MLX5_SET(bufferx_reg, buffer, xoff_threshold, | 114 | do_div(xoff, port_buff_cell_sz); |
| 114 | port_buffer->buffer[i].xoff >> MLX5E_BUFFER_CELL_SHIFT); | 115 | do_div(xon, port_buff_cell_sz); |
| 115 | MLX5_SET(bufferx_reg, buffer, xon_threshold, | 116 | MLX5_SET(bufferx_reg, buffer, size, size); |
| 116 | port_buffer->buffer[i].xon >> MLX5E_BUFFER_CELL_SHIFT); | 117 | MLX5_SET(bufferx_reg, buffer, lossy, port_buffer->buffer[i].lossy); |
| 118 | MLX5_SET(bufferx_reg, buffer, xoff_threshold, xoff); | ||
| 119 | MLX5_SET(bufferx_reg, buffer, xon_threshold, xon); | ||
| 117 | } | 120 | } |
| 118 | 121 | ||
| 119 | err = mlx5e_port_set_pbmc(mdev, in); | 122 | err = mlx5e_port_set_pbmc(mdev, in); |
| @@ -143,7 +146,7 @@ static u32 calculate_xoff(struct mlx5e_priv *priv, unsigned int mtu) · 23 unmodified lines | |||
| 143 | } | 146 | } |
| 144 | 147 | ||
| 145 | static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer, | 148 | static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer, |
| 146 | u32 xoff, unsigned int max_mtu) | 149 | u32 xoff, unsigned int max_mtu, u16 port_buff_cell_sz) |
| 147 | { | 150 | { |
| 148 | int i; | 151 | int i; |
| 149 | 152 | ||
| @@ -155,7 +158,7 @@ static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer, · 5 unmodified lines | |||
| 155 | } | 158 | } |
| 156 | 159 | ||
| 157 | if (port_buffer->buffer[i].size < | 160 | if (port_buffer->buffer[i].size < |
| 158 | (xoff + max_mtu + (1 << MLX5E_BUFFER_CELL_SHIFT))) { | 161 | (xoff + max_mtu + port_buff_cell_sz)) { |
| 159 | pr_err("buffer_size[%d]=%d is not enough for lossless buffer\n", | 162 | pr_err("buffer_size[%d]=%d is not enough for lossless buffer\n", |
| 160 | i, port_buffer->buffer[i].size); | 163 | i, port_buffer->buffer[i].size); |
| 161 | return -ENOMEM; | 164 | return -ENOMEM; |
| @@ -175,6 +178,7 @@ static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer, · 13 unmodified lines | |||
| 175 | * @pfc_en: <input> current pfc configuration | 178 | * @pfc_en: <input> current pfc configuration |
| 176 | * @buffer: <input> current prio to buffer mapping | 179 | * @buffer: <input> current prio to buffer mapping |
| 177 | * @xoff: <input> xoff value | 180 | * @xoff: <input> xoff value |
| 181 | * @port_buff_cell_sz: <input> port buffer cell_size | ||
| 178 | * @port_buffer: <output> port receive buffer configuration | 182 | * @port_buffer: <output> port receive buffer configuration |
| 179 | * @change: <output> | 183 | * @change: <output> |
| 180 | * | 184 | * |
| @@ -189,7 +193,7 @@ static int update_xoff_threshold(struct mlx5e_port_buffer *port_buffer, · 8 unmodified lines | |||
| 189 | * sets change to true if buffer configuration was modified. | 193 | * sets change to true if buffer configuration was modified. |
| 190 | */ | 194 | */ |
| 191 | static int update_buffer_lossy(unsigned int max_mtu, | 195 | static int update_buffer_lossy(unsigned int max_mtu, |
| 192 | u8 pfc_en, u8 *buffer, u32 xoff, | 196 | u8 pfc_en, u8 *buffer, u32 xoff, u16 port_buff_cell_sz, |
| 193 | struct mlx5e_port_buffer *port_buffer, | 197 | struct mlx5e_port_buffer *port_buffer, |
| 194 | bool *change) | 198 | bool *change) |
| 195 | { | 199 | { |
| @@ -225,7 +229,7 @@ static int update_buffer_lossy(unsigned int max_mtu, · 29 unmodified lines | |||
| 225 | } | 229 | } |
| 226 | 230 | ||
| 227 | if (changed) { | 231 | if (changed) { |
| 228 | err = update_xoff_threshold(port_buffer, xoff, max_mtu); | 232 | err = update_xoff_threshold(port_buffer, xoff, max_mtu, port_buff_cell_sz); |
| 229 | if (err) | 233 | if (err) |
| 230 | return err; | 234 | return err; |
| 231 | 235 | ||
| @@ -262,6 +266,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 30 unmodified lines | |||
| 262 | u32 *buffer_size, | 266 | u32 *buffer_size, |
| 263 | u8 *prio2buffer) | 267 | u8 *prio2buffer) |
| 264 | { | 268 | { |
| 269 | u16 port_buff_cell_sz = priv->dcbx.port_buff_cell_sz; | ||
| 265 | struct mlx5e_port_buffer port_buffer; | 270 | struct mlx5e_port_buffer port_buffer; |
| 266 | u32 xoff = calculate_xoff(priv, mtu); | 271 | u32 xoff = calculate_xoff(priv, mtu); |
| 267 | bool update_prio2buffer = false; | 272 | bool update_prio2buffer = false; |
| @@ -282,7 +287,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 14 unmodified lines | |||
| 282 | 287 | ||
| 283 | if (change & MLX5E_PORT_BUFFER_CABLE_LEN) { | 288 | if (change & MLX5E_PORT_BUFFER_CABLE_LEN) { |
| 284 | update_buffer = true; | 289 | update_buffer = true; |
| 285 | err = update_xoff_threshold(&port_buffer, xoff, max_mtu); | 290 | err = update_xoff_threshold(&port_buffer, xoff, max_mtu, port_buff_cell_sz); |
| 286 | if (err) | 291 | if (err) |
| 287 | return err; | 292 | return err; |
| 288 | } | 293 | } |
| @@ -292,7 +297,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 3 unmodified lines | |||
| 292 | if (err) | 297 | if (err) |
| 293 | return err; | 298 | return err; |
| 294 | 299 | ||
| 295 | err = update_buffer_lossy(max_mtu, pfc->pfc_en, buffer, xoff, | 300 | err = update_buffer_lossy(max_mtu, pfc->pfc_en, buffer, xoff, port_buff_cell_sz, |
| 296 | &port_buffer, &update_buffer); | 301 | &port_buffer, &update_buffer); |
| 297 | if (err) | 302 | if (err) |
| 298 | return err; | 303 | return err; |
| @@ -304,7 +309,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 5 unmodified lines | |||
| 304 | if (err) | 309 | if (err) |
| 305 | return err; | 310 | return err; |
| 306 | 311 | ||
| 307 | err = update_buffer_lossy(max_mtu, curr_pfc_en, prio2buffer, | 312 | err = update_buffer_lossy(max_mtu, curr_pfc_en, prio2buffer, port_buff_cell_sz, |
| 308 | xoff, &port_buffer, &update_buffer); | 313 | xoff, &port_buffer, &update_buffer); |
| 309 | if (err) | 314 | if (err) |
| 310 | return err; | 315 | return err; |
| @@ -329,7 +334,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 18 unmodified lines | |||
| 329 | return -EINVAL; | 334 | return -EINVAL; |
| 330 | 335 | ||
| 331 | update_buffer = true; | 336 | update_buffer = true; |
| 332 | err = update_xoff_threshold(&port_buffer, xoff, max_mtu); | 337 | err = update_xoff_threshold(&port_buffer, xoff, max_mtu, port_buff_cell_sz); |
| 333 | if (err) | 338 | if (err) |
| 334 | return err; | 339 | return err; |
| 335 | } | 340 | } |
| @@ -337,7 +342,7 @@ int mlx5e_port_manual_buffer_config(struct mlx5e_priv *priv, · 1 unmodified line | |||
| 337 | /* Need to update buffer configuration if xoff value is changed */ | 342 | /* Need to update buffer configuration if xoff value is changed */ |
| 338 | if (!update_buffer && xoff != priv->dcbx.xoff) { | 343 | if (!update_buffer && xoff != priv->dcbx.xoff) { |
| 339 | update_buffer = true; | 344 | update_buffer = true; |
| 340 | err = update_xoff_threshold(&port_buffer, xoff, max_mtu); | 345 | err = update_xoff_threshold(&port_buffer, xoff, max_mtu, port_buff_cell_sz); |
| 341 | if (err) | 346 | if (err) |
| 342 | return err; | 347 | return err; |
| 343 | } | 348 | } |
| @@ -36,7 +36,6 @@ · 35 unmodified lines | |||
| 36 | #include "port.h" | 36 | #include "port.h" |
| 37 | 37 | ||
| 38 | #define MLX5E_MAX_BUFFER 8 | 38 | #define MLX5E_MAX_BUFFER 8 |
| 39 | #define MLX5E_BUFFER_CELL_SHIFT 7 | ||
| 40 | #define MLX5E_DEFAULT_CABLE_LEN 7 /* 7 meters */ | 39 | #define MLX5E_DEFAULT_CABLE_LEN 7 /* 7 meters */ |
| 41 | 40 | ||
| 42 | #define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \ | 41 | #define MLX5_BUFFER_SUPPORTED(mdev) (MLX5_CAP_GEN(mdev, pcam_reg) && \ |
| @@ -6,7 +6,6 @@ · 5 unmodified lines | |||
| 6 | #include <linux/rculist.h> | 6 | #include <linux/rculist.h> |
| 7 | #include <linux/rtnetlink.h> | 7 | #include <linux/rtnetlink.h> |
| 8 | #include <linux/workqueue.h> | 8 | #include <linux/workqueue.h> |
| 9 | #include <linux/rwlock.h> | ||
| 10 | #include <linux/spinlock.h> | 9 | #include <linux/spinlock.h> |
| 11 | #include <linux/notifier.h> | 10 | #include <linux/notifier.h> |
| 12 | #include <net/netevent.h> | 11 | #include <net/netevent.h> |
| @@ -407,7 +407,9 @@ static int · 406 unmodified lines | |||
| 407 | mlx5e_rep_indr_setup_block(struct net_device *netdev, | 407 | mlx5e_rep_indr_setup_block(struct net_device *netdev, |
| 408 | struct mlx5e_rep_priv *rpriv, | 408 | struct mlx5e_rep_priv *rpriv, |
| 409 | struct flow_block_offload *f, | 409 | struct flow_block_offload *f, |
| 410 | flow_setup_cb_t *setup_cb) | 410 | flow_setup_cb_t *setup_cb, |
| 411 | void *data, | ||
| 412 | void (*cleanup)(struct flow_block_cb *block_cb)) | ||
| 411 | { | 413 | { |
| 412 | struct mlx5e_priv *priv = netdev_priv(rpriv->netdev); | 414 | struct mlx5e_priv *priv = netdev_priv(rpriv->netdev); |
| 413 | struct mlx5e_rep_indr_block_priv *indr_priv; | 415 | struct mlx5e_rep_indr_block_priv *indr_priv; |
| @@ -438,8 +440,10 @@ mlx5e_rep_indr_setup_block(struct net_device *netdev, · 24 unmodified lines | |||
| 438 | list_add(&indr_priv->list, | 440 | list_add(&indr_priv->list, |
| 439 | &rpriv->uplink_priv.tc_indr_block_priv_list); | 441 | &rpriv->uplink_priv.tc_indr_block_priv_list); |
| 440 | 442 | ||
| 441 | block_cb = flow_block_cb_alloc(setup_cb, indr_priv, indr_priv, | 443 | block_cb = flow_indr_block_cb_alloc(setup_cb, indr_priv, indr_priv, |
| 442 | mlx5e_rep_indr_block_unbind); | 444 | mlx5e_rep_indr_block_unbind, |
| 445 | f, netdev, data, rpriv, | ||
| 446 | cleanup); | ||
| 443 | if (IS_ERR(block_cb)) { | 447 | if (IS_ERR(block_cb)) { |
| 444 | list_del(&indr_priv->list); | 448 | list_del(&indr_priv->list); |
| 445 | kfree(indr_priv); | 449 | kfree(indr_priv); |
| @@ -458,7 +462,7 @@ mlx5e_rep_indr_setup_block(struct net_device *netdev, · 12 unmodified lines | |||
| 458 | if (!block_cb) | 462 | if (!block_cb) |
| 459 | return -ENOENT; | 463 | return -ENOENT; |
| 460 | 464 | ||
| 461 | flow_block_cb_remove(block_cb, f); | 465 | flow_indr_block_cb_remove(block_cb, f); |
| 462 | list_del(&block_cb->driver_list); | 466 | list_del(&block_cb->driver_list); |
| 463 | return 0; | 467 | return 0; |
| 464 | default: | 468 | default: |
| @@ -469,15 +473,19 @@ mlx5e_rep_indr_setup_block(struct net_device *netdev, · 4 unmodified lines | |||
| 469 | 473 | ||
| 470 | static | 474 | static |
| 471 | int mlx5e_rep_indr_setup_cb(struct net_device *netdev, void *cb_priv, | 475 | int mlx5e_rep_indr_setup_cb(struct net_device *netdev, void *cb_priv, |
| 472 | enum tc_setup_type type, void *type_data) | 476 | enum tc_setup_type type, void *type_data, |
| 477 | void *data, | ||
| 478 | void (*cleanup)(struct flow_block_cb *block_cb)) | ||
| 473 | { | 479 | { |
| 474 | switch (type) { | 480 | switch (type) { |
| 475 | case TC_SETUP_BLOCK: | 481 | case TC_SETUP_BLOCK: |
| 476 | return mlx5e_rep_indr_setup_block(netdev, cb_priv, type_data, | 482 | return mlx5e_rep_indr_setup_block(netdev, cb_priv, type_data, |
| 477 | mlx5e_rep_indr_setup_tc_cb); | 483 | mlx5e_rep_indr_setup_tc_cb, |
| 484 | data, cleanup); | ||
| 478 | case TC_SETUP_FT: | 485 | case TC_SETUP_FT: |
| 479 | return mlx5e_rep_indr_setup_block(netdev, cb_priv, type_data, | 486 | return mlx5e_rep_indr_setup_block(netdev, cb_priv, type_data, |
| 480 | mlx5e_rep_indr_setup_ft_cb); | 487 | mlx5e_rep_indr_setup_ft_cb, |
| 488 | data, cleanup); | ||
| 481 | default: | 489 | default: |
| 482 | return -EOPNOTSUPP; | 490 | return -EOPNOTSUPP; |
| 483 | } | 491 | } |
| @@ -496,7 +504,7 @@ int mlx5e_rep_tc_netdevice_event_register(struct mlx5e_rep_priv *rpriv) · 12 unmodified lines | |||
| 496 | void mlx5e_rep_tc_netdevice_event_unregister(struct mlx5e_rep_priv *rpriv) | 504 | void mlx5e_rep_tc_netdevice_event_unregister(struct mlx5e_rep_priv *rpriv) |
| 497 | { | 505 | { |
| 498 | flow_indr_dev_unregister(mlx5e_rep_indr_setup_cb, rpriv, | 506 | flow_indr_dev_unregister(mlx5e_rep_indr_setup_cb, rpriv, |
| 499 | mlx5e_rep_indr_setup_tc_cb); | 507 | mlx5e_rep_indr_block_unbind); |
| 500 | } | 508 | } |
| 501 | 509 | ||
| 502 | #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT) | 510 | #if IS_ENABLED(CONFIG_NET_TC_SKB_EXT) |
| @@ -1097,6 +1097,7 @@ mlx5_tc_ct_flush_ft_entry(void *ptr, void *arg) · 1096 unmodified lines | |||
| 1097 | struct mlx5_ct_entry *entry = ptr; | 1097 | struct mlx5_ct_entry *entry = ptr; |
| 1098 | 1098 | ||
| 1099 | mlx5_tc_ct_entry_del_rules(ct_priv, entry); | 1099 | mlx5_tc_ct_entry_del_rules(ct_priv, entry); |
| 1100 | kfree(entry); | ||
| 1100 | } | 1101 | } |
| 1101 | 1102 | ||
| 1102 | static void | 1103 | static void |
| @@ -1217,6 +1217,24 @@ static int mlx5e_trust_initialize(struct mlx5e_priv *priv) · 1216 unmodified lines | |||
| 1217 | return 0; | 1217 | return 0; |
| 1218 | } | 1218 | } |
| 1219 | 1219 | ||
| 1220 | #define MLX5E_BUFFER_CELL_SHIFT 7 | ||
| 1221 | |||
| 1222 | static u16 mlx5e_query_port_buffers_cell_size(struct mlx5e_priv *priv) | ||
| 1223 | { | ||
| 1224 | struct mlx5_core_dev *mdev = priv->mdev; | ||
| 1225 | u32 out[MLX5_ST_SZ_DW(sbcam_reg)] = {}; | ||
| 1226 | u32 in[MLX5_ST_SZ_DW(sbcam_reg)] = {}; | ||
| 1227 | |||
| 1228 | if (!MLX5_CAP_GEN(mdev, sbcam_reg)) | ||
| 1229 | return (1 << MLX5E_BUFFER_CELL_SHIFT); | ||
| 1230 | |||
| 1231 | if (mlx5_core_access_reg(mdev, in, sizeof(in), out, sizeof(out), | ||
| 1232 | MLX5_REG_SBCAM, 0, 0)) | ||
| 1233 | return (1 << MLX5E_BUFFER_CELL_SHIFT); | ||
| 1234 | |||
| 1235 | return MLX5_GET(sbcam_reg, out, cap_cell_size); | ||
| 1236 | } | ||
| 1237 | |||
| 1220 | void mlx5e_dcbnl_initialize(struct mlx5e_priv *priv) | 1238 | void mlx5e_dcbnl_initialize(struct mlx5e_priv *priv) |
| 1221 | { | 1239 | { |
| 1222 | struct mlx5e_dcbx *dcbx = &priv->dcbx; | 1240 | struct mlx5e_dcbx *dcbx = &priv->dcbx; |
| @@ -1234,6 +1252,7 @@ void mlx5e_dcbnl_initialize(struct mlx5e_priv *priv) · 11 unmodified lines | |||
| 1234 | if (priv->dcbx.mode == MLX5E_DCBX_PARAM_VER_OPER_HOST) | 1252 | if (priv->dcbx.mode == MLX5E_DCBX_PARAM_VER_OPER_HOST) |
| 1235 | priv->dcbx.cap |= DCB_CAP_DCBX_HOST; | 1253 | priv->dcbx.cap |= DCB_CAP_DCBX_HOST; |
| 1236 | 1254 | ||
| 1255 | priv->dcbx.port_buff_cell_sz = mlx5e_query_port_buffers_cell_size(priv); | ||
| 1237 | priv->dcbx.manual_buffer = false; | 1256 | priv->dcbx.manual_buffer = false; |
| 1238 | priv->dcbx.cable_len = MLX5E_DEFAULT_CABLE_LEN; | 1257 | priv->dcbx.cable_len = MLX5E_DEFAULT_CABLE_LEN; |
| 1239 | 1258 | ||
| @@ -200,7 +200,7 @@ static void mlx5e_ethtool_get_speed_arr(struct mlx5_core_dev *mdev, · 199 unmodified lines | |||
| 200 | struct ptys2ethtool_config **arr, | 200 | struct ptys2ethtool_config **arr, |
| 201 | u32 *size) | 201 | u32 *size) |
| 202 | { | 202 | { |
| 203 | bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); | 203 | bool ext = mlx5e_ptys_ext_supported(mdev); |
| 204 | 204 | ||
| 205 | *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table; | 205 | *arr = ext ? ptys2ext_ethtool_table : ptys2legacy_ethtool_table; |
| 206 | *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) : | 206 | *size = ext ? ARRAY_SIZE(ptys2ext_ethtool_table) : |
| @@ -883,7 +883,7 @@ static void get_lp_advertising(struct mlx5_core_dev *mdev, u32 eth_proto_lp, · 676 unmodified lines | |||
| 883 | struct ethtool_link_ksettings *link_ksettings) | 883 | struct ethtool_link_ksettings *link_ksettings) |
| 884 | { | 884 | { |
| 885 | unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising; | 885 | unsigned long *lp_advertising = link_ksettings->link_modes.lp_advertising; |
| 886 | bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); | 886 | bool ext = mlx5e_ptys_ext_supported(mdev); |
| 887 | 887 | ||
| 888 | ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext); | 888 | ptys2ethtool_adver_link(lp_advertising, eth_proto_lp, ext); |
| 889 | } | 889 | } |
| @@ -913,7 +913,7 @@ int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv, · 23 unmodified lines | |||
| 913 | __func__, err); | 913 | __func__, err); |
| 914 | goto err_query_regs; | 914 | goto err_query_regs; |
| 915 | } | 915 | } |
| 916 | ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); | 916 | ext = !!MLX5_GET_ETH_PROTO(ptys_reg, out, true, eth_proto_capability); |
| 917 | eth_proto_cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, | 917 | eth_proto_cap = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, |
| 918 | eth_proto_capability); | 918 | eth_proto_capability); |
| 919 | eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, | 919 | eth_proto_admin = MLX5_GET_ETH_PROTO(ptys_reg, out, ext, |
| @@ -1066,7 +1066,7 @@ int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv, · 146 unmodified lines | |||
| 1066 | autoneg = link_ksettings->base.autoneg; | 1066 | autoneg = link_ksettings->base.autoneg; |
| 1067 | speed = link_ksettings->base.speed; | 1067 | speed = link_ksettings->base.speed; |
| 1068 | 1068 | ||
| 1069 | ext_supported = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet); | 1069 | ext_supported = mlx5e_ptys_ext_supported(mdev); |
| 1070 | ext = ext_requested(autoneg, adver, ext_supported); | 1070 | ext = ext_requested(autoneg, adver, ext_supported); |
| 1071 | if (!ext_supported && ext) | 1071 | if (!ext_supported && ext) |
| 1072 | return -EOPNOTSUPP; | 1072 | return -EOPNOTSUPP; |
| @@ -3104,9 +3104,6 @@ int mlx5e_open(struct net_device *netdev) · 3103 unmodified lines | |||
| 3104 | mlx5_set_port_admin_status(priv->mdev, MLX5_PORT_UP); | 3104 | mlx5_set_port_admin_status(priv->mdev, MLX5_PORT_UP); |
| 3105 | mutex_unlock(&priv->state_lock); | 3105 | mutex_unlock(&priv->state_lock); |
| 3106 | 3106 | ||
| 3107 | if (mlx5_vxlan_allowed(priv->mdev->vxlan)) | ||
| 3108 | udp_tunnel_get_rx_info(netdev); | ||
| 3109 | |||
| 3110 | return err; | 3107 | return err; |
| 3111 | } | 3108 | } |
| 3112 | 3109 | ||
| @@ -5121,6 +5118,10 @@ static int mlx5e_init_nic_rx(struct mlx5e_priv *priv) · 2008 unmodified lines | |||
| 5121 | if (err) | 5118 | if (err) |
| 5122 | goto err_destroy_flow_steering; | 5119 | goto err_destroy_flow_steering; |
| 5123 | 5120 | ||
| 5121 | #ifdef CONFIG_MLX5_EN_ARFS | ||
| 5122 | priv->netdev->rx_cpu_rmap = mlx5_eq_table_get_rmap(priv->mdev); | ||
| 5123 | #endif | ||
| 5124 | |||
| 5124 | return 0; | 5125 | return 0; |
| 5125 | 5126 | ||
| 5126 | err_destroy_flow_steering: | 5127 | err_destroy_flow_steering: |
| @@ -5202,6 +5203,8 @@ static void mlx5e_nic_enable(struct mlx5e_priv *priv) · 75 unmodified lines | |||
| 5202 | rtnl_lock(); | 5203 | rtnl_lock(); |
| 5203 | if (netif_running(netdev)) | 5204 | if (netif_running(netdev)) |
| 5204 | mlx5e_open(netdev); | 5205 | mlx5e_open(netdev); |
| 5206 | if (mlx5_vxlan_allowed(priv->mdev->vxlan)) | ||
| 5207 | udp_tunnel_get_rx_info(netdev); | ||
| 5205 | netif_device_attach(netdev); | 5208 | netif_device_attach(netdev); |
| 5206 | rtnl_unlock(); | 5209 | rtnl_unlock(); |
| 5207 | } | 5210 | } |
| @@ -5216,6 +5219,8 @@ static void mlx5e_nic_disable(struct mlx5e_priv *priv) · 8 unmodified lines | |||
| 5216 | rtnl_lock(); | 5219 | rtnl_lock(); |
| 5217 | if (netif_running(priv->netdev)) | 5220 | if (netif_running(priv->netdev)) |
| 5218 | mlx5e_close(priv->netdev); | 5221 | mlx5e_close(priv->netdev); |
| 5222 | if (mlx5_vxlan_allowed(priv->mdev->vxlan)) | ||
| 5223 | udp_tunnel_drop_rx_info(priv->netdev); | ||
| 5219 | netif_device_detach(priv->netdev); | 5224 | netif_device_detach(priv->netdev); |
| 5220 | rtnl_unlock(); | 5225 | rtnl_unlock(); |
| 5221 | 5226 | ||
| @@ -5288,10 +5293,6 @@ int mlx5e_netdev_init(struct net_device *netdev, · 66 unmodified lines | |||
| 5288 | /* netdev init */ | 5293 | /* netdev init */ |
| 5289 | netif_carrier_off(netdev); | 5294 | netif_carrier_off(netdev); |
| 5290 | 5295 | ||
| 5291 | #ifdef CONFIG_MLX5_EN_ARFS | ||
| 5292 | netdev->rx_cpu_rmap = mlx5_eq_table_get_rmap(mdev); | ||
| 5293 | #endif | ||
| 5294 | |||
| 5295 | return 0; | 5296 | return 0; |
| 5296 | 5297 | ||
| 5297 | err_free_cpumask: | 5298 | err_free_cpumask: |
| @@ -4670,9 +4670,10 @@ static bool is_flow_rule_duplicate_allowed(struct net_device *dev, · 4669 unmodified lines | |||
| 4670 | struct mlx5e_rep_priv *rpriv) | 4670 | struct mlx5e_rep_priv *rpriv) |
| 4671 | { | 4671 | { |
| 4672 | /* Offloaded flow rule is allowed to duplicate on non-uplink representor | 4672 | /* Offloaded flow rule is allowed to duplicate on non-uplink representor |
| 4673 | * sharing tc block with other slaves of a lag device. | 4673 | * sharing tc block with other slaves of a lag device. Rpriv can be NULL if this |
| 4674 | * function is called from NIC mode. | ||
| 4674 | */ | 4675 | */ |
| 4675 | return netif_is_lag_port(dev) && rpriv->rep->vport != MLX5_VPORT_UPLINK; | 4676 | return netif_is_lag_port(dev) && rpriv && rpriv->rep->vport != MLX5_VPORT_UPLINK; |
| 4676 | } | 4677 | } |
| 4677 | 4678 | ||
| 4678 | int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv, | 4679 | int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv, |
| @@ -4686,13 +4687,12 @@ int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv, · 7 unmodified lines | |||
| 4686 | 4687 | ||
| 4687 | rcu_read_lock(); | 4688 | rcu_read_lock(); |
| 4688 | flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params); | 4689 | flow = rhashtable_lookup(tc_ht, &f->cookie, tc_ht_params); |
| 4689 | rcu_read_unlock(); | ||
| 4690 | if (flow) { | 4690 | if (flow) { |
| 4691 | /* Same flow rule offloaded to non-uplink representor sharing tc block, | 4691 | /* Same flow rule offloaded to non-uplink representor sharing tc block, |
| 4692 | * just return 0. | 4692 | * just return 0. |
| 4693 | */ | 4693 | */ |
| 4694 | if (is_flow_rule_duplicate_allowed(dev, rpriv) && flow->orig_dev != dev) | 4694 | if (is_flow_rule_duplicate_allowed(dev, rpriv) && flow->orig_dev != dev) |
| 4695 | goto out; | 4695 | goto rcu_unlock; |
| 4696 | 4696 | ||
| 4697 | NL_SET_ERR_MSG_MOD(extack, | 4697 | NL_SET_ERR_MSG_MOD(extack, |
| 4698 | "flow cookie already exists, ignoring"); | 4698 | "flow cookie already exists, ignoring"); |
| @@ -4700,8 +4700,12 @@ int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv, · 1 unmodified line | |||
| 4700 | "flow cookie %lx already exists, ignoring\n", | 4700 | "flow cookie %lx already exists, ignoring\n", |
| 4701 | f->cookie); | 4701 | f->cookie); |
| 4702 | err = -EEXIST; | 4702 | err = -EEXIST; |
| 4703 | goto out; | 4703 | goto rcu_unlock; |
| 4704 | } | 4704 | } |
| 4705 | rcu_unlock: | ||
| 4706 | rcu_read_unlock(); | ||
| 4707 | if (flow) | ||
| 4708 | goto out; | ||
| 4705 | 4709 | ||
| 4706 | trace_mlx5e_configure_flower(f); | 4710 | trace_mlx5e_configure_flower(f); |
| 4707 | err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow); | 4711 | err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow); |
| @@ -217,7 +217,6 @@ int esw_acl_ingress_lgcy_setup(struct mlx5_eswitch *esw, · 216 unmodified lines | |||
| 217 | } | 217 | } |
| 218 | 218 | ||
| 219 | /* Create ingress allow rule */ | 219 | /* Create ingress allow rule */ |
| 220 | memset(spec, 0, sizeof(*spec)); | ||
| 221 | spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; | 220 | spec->match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; |
| 222 | flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW; | 221 | flow_act.action = MLX5_FLOW_CONTEXT_ACTION_ALLOW; |
| 223 | vport->ingress.allow_rule = mlx5_add_flow_rules(vport->ingress.acl, spec, | 222 | vport->ingress.allow_rule = mlx5_add_flow_rules(vport->ingress.acl, spec, |
| @@ -293,7 +293,40 @@ static int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num) · 292 unmodified lines | |||
| 293 | return 0; | 293 | return 0; |
| 294 | } | 294 | } |
| 295 | 295 | ||
| 296 | static int mlx5_eeprom_page(int offset) | 296 | static int mlx5_query_module_id(struct mlx5_core_dev *dev, int module_num, |
| 297 | u8 *module_id) | ||
| 298 | { | ||
| 299 | u32 in[MLX5_ST_SZ_DW(mcia_reg)] = {}; | ||
| 300 | u32 out[MLX5_ST_SZ_DW(mcia_reg)]; | ||
| 301 | int err, status; | ||
| 302 | u8 *ptr; | ||
| 303 | |||
| 304 | MLX5_SET(mcia_reg, in, i2c_device_address, MLX5_I2C_ADDR_LOW); | ||
| 305 | MLX5_SET(mcia_reg, in, module, module_num); | ||
| 306 | MLX5_SET(mcia_reg, in, device_address, 0); | ||
| 307 | MLX5_SET(mcia_reg, in, page_number, 0); | ||
| 308 | MLX5_SET(mcia_reg, in, size, 1); | ||
| 309 | MLX5_SET(mcia_reg, in, l, 0); | ||
| 310 | |||
| 311 | err = mlx5_core_access_reg(dev, in, sizeof(in), out, | ||
| 312 | sizeof(out), MLX5_REG_MCIA, 0, 0); | ||
| 313 | if (err) | ||
| 314 | return err; | ||
| 315 | |||
| 316 | status = MLX5_GET(mcia_reg, out, status); | ||
| 317 | if (status) { | ||
| 318 | mlx5_core_err(dev, "query_mcia_reg failed: status: 0x%x\n", | ||
| 319 | status); | ||
| 320 | return -EIO; | ||
| 321 | } | ||
| 322 | ptr = MLX5_ADDR_OF(mcia_reg, out, dword_0); | ||
| 323 | |||
| 324 | *module_id = ptr[0]; | ||
| 325 | |||
| 326 | return 0; | ||
| 327 | } | ||
| 328 | |||
| 329 | static int mlx5_qsfp_eeprom_page(u16 offset) | ||
| 297 | { | 330 | { |
| 298 | if (offset < MLX5_EEPROM_PAGE_LENGTH) | 331 | if (offset < MLX5_EEPROM_PAGE_LENGTH) |
| 299 | /* Addresses between 0-255 - page 00 */ | 332 | /* Addresses between 0-255 - page 00 */ |
| @@ -307,7 +340,7 @@ static int mlx5_eeprom_page(int offset) · 7 unmodified lines | |||
| 307 | MLX5_EEPROM_HIGH_PAGE_LENGTH); | 340 | MLX5_EEPROM_HIGH_PAGE_LENGTH); |
| 308 | } | 341 | } |
| 309 | 342 | ||
| 310 | static int mlx5_eeprom_high_page_offset(int page_num) | 343 | static int mlx5_qsfp_eeprom_high_page_offset(int page_num) |
| 311 | { | 344 | { |
| 312 | if (!page_num) /* Page 0 always start from low page */ | 345 | if (!page_num) /* Page 0 always start from low page */ |
| 313 | return 0; | 346 | return 0; |
| @@ -316,35 +349,62 @@ static int mlx5_eeprom_high_page_offset(int page_num) · 2 unmodified lines | |||
| 316 | return page_num * MLX5_EEPROM_HIGH_PAGE_LENGTH; | 349 | return page_num * MLX5_EEPROM_HIGH_PAGE_LENGTH; |
| 317 | } | 350 | } |
| 318 | 351 | ||
| 352 | static void mlx5_qsfp_eeprom_params_set(u16 *i2c_addr, int *page_num, u16 *offset) | ||
| 353 | { | ||
| 354 | *i2c_addr = MLX5_I2C_ADDR_LOW; | ||
| 355 | *page_num = mlx5_qsfp_eeprom_page(*offset); | ||
| 356 | *offset -= mlx5_qsfp_eeprom_high_page_offset(*page_num); | ||
| 357 | } | ||
| 358 | |||
| 359 | static void mlx5_sfp_eeprom_params_set(u16 *i2c_addr, int *page_num, u16 *offset) | ||
| 360 | { | ||
| 361 | *i2c_addr = MLX5_I2C_ADDR_LOW; | ||
| 362 | *page_num = 0; | ||
| 363 | |||
| 364 | if (*offset < MLX5_EEPROM_PAGE_LENGTH) | ||
| 365 | return; | ||
| 366 | |||
| 367 | *i2c_addr = MLX5_I2C_ADDR_HIGH; | ||
| 368 | *offset -= MLX5_EEPROM_PAGE_LENGTH; | ||
| 369 | } | ||
| 370 | |||
| 319 | int mlx5_query_module_eeprom(struct mlx5_core_dev *dev, | 371 | int mlx5_query_module_eeprom(struct mlx5_core_dev *dev, |
| 320 | u16 offset, u16 size, u8 *data) | 372 | u16 offset, u16 size, u8 *data) |
| 321 | { | 373 | { |
| 322 | int module_num, page_num, status, err; | 374 | int module_num, status, err, page_num = 0; |
| 375 | u32 in[MLX5_ST_SZ_DW(mcia_reg)] = {}; | ||
| 323 | u32 out[MLX5_ST_SZ_DW(mcia_reg)]; | 376 | u32 out[MLX5_ST_SZ_DW(mcia_reg)]; |
| 324 | u32 in[MLX5_ST_SZ_DW(mcia_reg)]; | 377 | u16 i2c_addr = 0; |
| 325 | u16 i2c_addr; | 378 | u8 module_id; |
| 326 | void *ptr = MLX5_ADDR_OF(mcia_reg, out, dword_0); | 379 | void *ptr; |
| 327 | 380 | ||
| 328 | err = mlx5_query_module_num(dev, &module_num); | 381 | err = mlx5_query_module_num(dev, &module_num); |
| 329 | if (err) | 382 | if (err) |
| 330 | return err; | 383 | return err; |
| 331 | 384 | ||
| 332 | memset(in, 0, sizeof(in)); | 385 | err = mlx5_query_module_id(dev, module_num, &module_id); |
| 333 | size = min_t(int, size, MLX5_EEPROM_MAX_BYTES); | 386 | if (err) |
| 334 | 387 | return err; | |
| 335 | /* Get the page number related to the given offset */ | ||
| 336 | page_num = mlx5_eeprom_page(offset); | ||
| 337 | 388 | ||
| 338 | /* Set the right offset according to the page number, | 389 | switch (module_id) { |
| 339 | * For page_num > 0, relative offset is always >= 128 (high page). | 390 | case MLX5_MODULE_ID_SFP: |
| 340 | */ | 391 | mlx5_sfp_eeprom_params_set(&i2c_addr, &page_num, &offset); |
| 341 | offset -= mlx5_eeprom_high_page_offset(page_num); | 392 | break; |
| 393 | case MLX5_MODULE_ID_QSFP: | ||
| 394 | case MLX5_MODULE_ID_QSFP_PLUS: | ||
| 395 | case MLX5_MODULE_ID_QSFP28: | ||
| 396 | mlx5_qsfp_eeprom_params_set(&i2c_addr, &page_num, &offset); | ||
| 397 | break; | ||
| 398 | default: | ||
| 399 | mlx5_core_err(dev, "Module ID not recognized: 0x%x\n", module_id); | ||
| 400 | return -EINVAL; | ||
| 401 | } | ||
| 342 | 402 | ||
| 343 | if (offset + size > MLX5_EEPROM_PAGE_LENGTH) | 403 | if (offset + size > MLX5_EEPROM_PAGE_LENGTH) |
| 344 | /* Cross pages read, read until offset 256 in low page */ | 404 | /* Cross pages read, read until offset 256 in low page */ |
| 345 | size -= offset + size - MLX5_EEPROM_PAGE_LENGTH; | 405 | size -= offset + size - MLX5_EEPROM_PAGE_LENGTH; |
| 346 | 406 | ||
| 347 | i2c_addr = MLX5_I2C_ADDR_LOW; | 407 | size = min_t(int, size, MLX5_EEPROM_MAX_BYTES); |
| 348 | 408 | ||
| 349 | MLX5_SET(mcia_reg, in, l, 0); | 409 | MLX5_SET(mcia_reg, in, l, 0); |
| 350 | MLX5_SET(mcia_reg, in, module, module_num); | 410 | MLX5_SET(mcia_reg, in, module, module_num); |
| @@ -365,6 +425,7 @@ int mlx5_query_module_eeprom(struct mlx5_core_dev *dev, · 14 unmodified lines | |||
| 365 | return -EIO; | 425 | return -EIO; |
| 366 | } | 426 | } |
| 367 | 427 | ||
| 428 | ptr = MLX5_ADDR_OF(mcia_reg, out, dword_0); | ||
| 368 | memcpy(data, ptr, size); | 429 | memcpy(data, ptr, size); |
| 369 | 430 | ||
| 370 | return size; | 431 | return size; |
| @@ -1414,23 +1414,12 @@ static int mlxsw_pci_init(void *bus_priv, struct mlxsw_core *mlxsw_core, · 1413 unmodified lines | |||
| 1414 | u16 num_pages; | 1414 | u16 num_pages; |
| 1415 | int err; | 1415 | int err; |
| 1416 | 1416 | ||
| 1417 | mutex_init(&mlxsw_pci->cmd.lock); | ||
| 1418 | init_waitqueue_head(&mlxsw_pci->cmd.wait); | ||
| 1419 | |||
| 1420 | mlxsw_pci->core = mlxsw_core; | 1417 | mlxsw_pci->core = mlxsw_core; |
| 1421 | 1418 | ||
| 1422 | mbox = mlxsw_cmd_mbox_alloc(); | 1419 | mbox = mlxsw_cmd_mbox_alloc(); |
| 1423 | if (!mbox) | 1420 | if (!mbox) |
| 1424 | return -ENOMEM; | 1421 | return -ENOMEM; |
| 1425 | 1422 | ||
| 1426 | err = mlxsw_pci_mbox_alloc(mlxsw_pci, &mlxsw_pci->cmd.in_mbox); | ||
| 1427 | if (err) | ||
| 1428 | goto mbox_put; | ||
| 1429 | |||
| 1430 | err = mlxsw_pci_mbox_alloc(mlxsw_pci, &mlxsw_pci->cmd.out_mbox); | ||
| 1431 | if (err) | ||
| 1432 | goto err_out_mbox_alloc; | ||
| 1433 | |||
| 1434 | err = mlxsw_pci_sw_reset(mlxsw_pci, mlxsw_pci->id); | 1423 | err = mlxsw_pci_sw_reset(mlxsw_pci, mlxsw_pci->id); |
| 1435 | if (err) | 1424 | if (err) |
| 1436 | goto err_sw_reset; | 1425 | goto err_sw_reset; |
| @@ -1537,9 +1526,6 @@ err_query_fw: · 100 unmodified lines | |||
| 1537 | mlxsw_pci_free_irq_vectors(mlxsw_pci); | 1526 | mlxsw_pci_free_irq_vectors(mlxsw_pci); |
| 1538 | err_alloc_irq: | 1527 | err_alloc_irq: |
| 1539 | err_sw_reset: | 1528 | err_sw_reset: |
| 1540 | mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.out_mbox); | ||
| 1541 | err_out_mbox_alloc: | ||
| 1542 | mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.in_mbox); | ||
| 1543 | mbox_put: | 1529 | mbox_put: |
| 1544 | mlxsw_cmd_mbox_free(mbox); | 1530 | mlxsw_cmd_mbox_free(mbox); |
| 1545 | return err; | 1531 | return err; |
| @@ -1553,8 +1539,6 @@ static void mlxsw_pci_fini(void *bus_priv) · 7 unmodified lines | |||
| 1553 | mlxsw_pci_aqs_fini(mlxsw_pci); | 1539 | mlxsw_pci_aqs_fini(mlxsw_pci); |
| 1554 | mlxsw_pci_fw_area_fini(mlxsw_pci); | 1540 | mlxsw_pci_fw_area_fini(mlxsw_pci); |
| 1555 | mlxsw_pci_free_irq_vectors(mlxsw_pci); | 1541 | mlxsw_pci_free_irq_vectors(mlxsw_pci); |
| 1556 | mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.out_mbox); | ||
| 1557 | mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.in_mbox); | ||
| 1558 | } | 1542 | } |
| 1559 | 1543 | ||
| 1560 | static struct mlxsw_pci_queue * | 1544 | static struct mlxsw_pci_queue * |
| @@ -1776,6 +1760,37 @@ static const struct mlxsw_bus mlxsw_pci_bus = { · 215 unmodified lines | |||
| 1776 | .features = MLXSW_BUS_F_TXRX | MLXSW_BUS_F_RESET, | 1760 | .features = MLXSW_BUS_F_TXRX | MLXSW_BUS_F_RESET, |
| 1777 | }; | 1761 | }; |
| 1778 | 1762 | ||
| 1763 | static int mlxsw_pci_cmd_init(struct mlxsw_pci *mlxsw_pci) | ||
| 1764 | { | ||
| 1765 | int err; | ||
| 1766 | |||
| 1767 | mutex_init(&mlxsw_pci->cmd.lock); | ||
| 1768 | init_waitqueue_head(&mlxsw_pci->cmd.wait); | ||
| 1769 | |||
| 1770 | err = mlxsw_pci_mbox_alloc(mlxsw_pci, &mlxsw_pci->cmd.in_mbox); | ||
| 1771 | if (err) | ||
| 1772 | goto err_in_mbox_alloc; | ||
| 1773 | |||
| 1774 | err = mlxsw_pci_mbox_alloc(mlxsw_pci, &mlxsw_pci->cmd.out_mbox); | ||
| 1775 | if (err) | ||
| 1776 | goto err_out_mbox_alloc; | ||
| 1777 | |||
| 1778 | return 0; | ||
| 1779 | |||
| 1780 | err_out_mbox_alloc: | ||
| 1781 | mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.in_mbox); | ||
| 1782 | err_in_mbox_alloc: | ||
| 1783 | mutex_destroy(&mlxsw_pci->cmd.lock); | ||
| 1784 | return err; | ||
| 1785 | } | ||
| 1786 | |||
| 1787 | static void mlxsw_pci_cmd_fini(struct mlxsw_pci *mlxsw_pci) | ||
| 1788 | { | ||
| 1789 | mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.out_mbox); | ||
| 1790 | mlxsw_pci_mbox_free(mlxsw_pci, &mlxsw_pci->cmd.in_mbox); | ||
| 1791 | mutex_destroy(&mlxsw_pci->cmd.lock); | ||
| 1792 | } | ||
| 1793 | |||
| 1779 | static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) | 1794 | static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) |
| 1780 | { | 1795 | { |
| 1781 | const char *driver_name = pdev->driver->name; | 1796 | const char *driver_name = pdev->driver->name; |
| @@ -1831,6 +1846,10 @@ static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 49 unmodified lines | |||
| 1831 | mlxsw_pci->pdev = pdev; | 1846 | mlxsw_pci->pdev = pdev; |
| 1832 | pci_set_drvdata(pdev, mlxsw_pci); | 1847 | pci_set_drvdata(pdev, mlxsw_pci); |
| 1833 | 1848 | ||
| 1849 | err = mlxsw_pci_cmd_init(mlxsw_pci); | ||
| 1850 | if (err) | ||
| 1851 | goto err_pci_cmd_init; | ||
| 1852 | |||
| 1834 | mlxsw_pci->bus_info.device_kind = driver_name; | 1853 | mlxsw_pci->bus_info.device_kind = driver_name; |
| 1835 | mlxsw_pci->bus_info.device_name = pci_name(mlxsw_pci->pdev); | 1854 | mlxsw_pci->bus_info.device_name = pci_name(mlxsw_pci->pdev); |
| 1836 | mlxsw_pci->bus_info.dev = &pdev->dev; | 1855 | mlxsw_pci->bus_info.dev = &pdev->dev; |
| @@ -1848,6 +1867,8 @@ static int mlxsw_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 11 unmodified lines | |||
| 1848 | return 0; | 1867 | return 0; |
| 1849 | 1868 | ||
| 1850 | err_bus_device_register: | 1869 | err_bus_device_register: |
| 1870 | mlxsw_pci_cmd_fini(mlxsw_pci); | ||
| 1871 | err_pci_cmd_init: | ||
| 1851 | iounmap(mlxsw_pci->hw_addr); | 1872 | iounmap(mlxsw_pci->hw_addr); |
| 1852 | err_ioremap: | 1873 | err_ioremap: |
| 1853 | err_pci_resource_len_check: | 1874 | err_pci_resource_len_check: |
| @@ -1865,6 +1886,7 @@ static void mlxsw_pci_remove(struct pci_dev *pdev) · 11 unmodified lines | |||
| 1865 | struct mlxsw_pci *mlxsw_pci = pci_get_drvdata(pdev); | 1886 | struct mlxsw_pci *mlxsw_pci = pci_get_drvdata(pdev); |
| 1866 | 1887 | ||
| 1867 | mlxsw_core_bus_device_unregister(mlxsw_pci->core, false); | 1888 | mlxsw_core_bus_device_unregister(mlxsw_pci->core, false); |
| 1889 | mlxsw_pci_cmd_fini(mlxsw_pci); | ||
| 1868 | iounmap(mlxsw_pci->hw_addr); | 1890 | iounmap(mlxsw_pci->hw_addr); |
| 1869 | pci_release_regions(mlxsw_pci->pdev); | 1891 | pci_release_regions(mlxsw_pci->pdev); |
| 1870 | pci_disable_device(mlxsw_pci->pdev); | 1892 | pci_disable_device(mlxsw_pci->pdev); |
| @@ -978,10 +978,10 @@ int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu, · 977 unmodified lines | |||
| 978 | 978 | ||
| 979 | lossy = !(pfc || pause_en); | 979 | lossy = !(pfc || pause_en); |
| 980 | thres_cells = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu); | 980 | thres_cells = mlxsw_sp_pg_buf_threshold_get(mlxsw_sp, mtu); |
| 981 | mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, &thres_cells); | 981 | thres_cells = mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, thres_cells); |
| 982 | delay_cells = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay, | 982 | delay_cells = mlxsw_sp_pg_buf_delay_get(mlxsw_sp, mtu, delay, |
| 983 | pfc, pause_en); | 983 | pfc, pause_en); |
| 984 | mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, &delay_cells); | 984 | delay_cells = mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, delay_cells); |
| 985 | total_cells = thres_cells + delay_cells; | 985 | total_cells = thres_cells + delay_cells; |
| 986 | 986 | ||
| 987 | taken_headroom_cells += total_cells; | 987 | taken_headroom_cells += total_cells; |
| @@ -374,17 +374,15 @@ mlxsw_sp_port_vlan_find_by_vid(const struct mlxsw_sp_port *mlxsw_sp_port, · 373 unmodified lines | |||
| 374 | return NULL; | 374 | return NULL; |
| 375 | } | 375 | } |
| 376 | 376 | ||
| 377 | static inline void | 377 | static inline u32 |
| 378 | mlxsw_sp_port_headroom_8x_adjust(const struct mlxsw_sp_port *mlxsw_sp_port, | 378 | mlxsw_sp_port_headroom_8x_adjust(const struct mlxsw_sp_port *mlxsw_sp_port, |
| 379 | u16 *p_size) | 379 | u32 size_cells) |
| 380 | { | 380 | { |
| 381 | /* Ports with eight lanes use two headroom buffers between which the | 381 | /* Ports with eight lanes use two headroom buffers between which the |
| 382 | * configured headroom size is split. Therefore, multiply the calculated | 382 | * configured headroom size is split. Therefore, multiply the calculated |
| 383 | * headroom size by two. | 383 | * headroom size by two. |
| 384 | */ | 384 | */ |
| 385 | if (mlxsw_sp_port->mapping.width != 8) | 385 | return mlxsw_sp_port->mapping.width == 8 ? 2 * size_cells : size_cells; |
| 386 | return; | ||
| 387 | *p_size *= 2; | ||
| 388 | } | 386 | } |
| 389 | 387 | ||
| 390 | enum mlxsw_sp_flood_type { | 388 | enum mlxsw_sp_flood_type { |
| @@ -312,7 +312,7 @@ static int mlxsw_sp_port_pb_init(struct mlxsw_sp_port *mlxsw_sp_port) · 311 unmodified lines | |||
| 312 | 312 | ||
| 313 | if (i == MLXSW_SP_PB_UNUSED) | 313 | if (i == MLXSW_SP_PB_UNUSED) |
| 314 | continue; | 314 | continue; |
| 315 | mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, &size); | 315 | size = mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, size); |
| 316 | mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, i, size); | 316 | mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, i, size); |
| 317 | } | 317 | } |
| 318 | mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, | 318 | mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, |
| @@ -6262,7 +6262,7 @@ static int mlxsw_sp_router_fib_event(struct notifier_block *nb, · 6261 unmodified lines | |||
| 6262 | } | 6262 | } |
| 6263 | 6263 | ||
| 6264 | fib_work = kzalloc(sizeof(*fib_work), GFP_ATOMIC); | 6264 | fib_work = kzalloc(sizeof(*fib_work), GFP_ATOMIC); |
| 6265 | if (WARN_ON(!fib_work)) | 6265 | if (!fib_work) |
| 6266 | return NOTIFY_BAD; | 6266 | return NOTIFY_BAD; |
| 6267 | 6267 | ||
| 6268 | fib_work->mlxsw_sp = router->mlxsw_sp; | 6268 | fib_work->mlxsw_sp = router->mlxsw_sp; |
| @@ -782,7 +782,7 @@ mlxsw_sp_span_port_buffer_update(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu) · 781 unmodified lines | |||
| 782 | speed = 0; | 782 | speed = 0; |
| 783 | 783 | ||
| 784 | buffsize = mlxsw_sp_span_buffsize_get(mlxsw_sp, speed, mtu); | 784 | buffsize = mlxsw_sp_span_buffsize_get(mlxsw_sp, speed, mtu); |
| 785 | mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, (u16 *) &buffsize); | 785 | buffsize = mlxsw_sp_port_headroom_8x_adjust(mlxsw_sp_port, buffsize); |
| 786 | mlxsw_reg_sbib_pack(sbib_pl, mlxsw_sp_port->local_port, buffsize); | 786 | mlxsw_reg_sbib_pack(sbib_pl, mlxsw_sp_port->local_port, buffsize); |
| 787 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); | 787 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); |
| 788 | } | 788 | } |
| @@ -297,7 +297,7 @@ struct vxge_hw_fifo_config { · 296 unmodified lines | |||
| 297 | * @greedy_return: If Set it forces the device to return absolutely all RxD | 297 | * @greedy_return: If Set it forces the device to return absolutely all RxD |
| 298 | * that are consumed and still on board when a timer interrupt | 298 | * that are consumed and still on board when a timer interrupt |
| 299 | * triggers. If Clear, then if the device has already returned | 299 | * triggers. If Clear, then if the device has already returned |
| 300 | * RxD before current timer interrupt trigerred and after the | 300 | * RxD before current timer interrupt triggered and after the |
| 301 | * previous timer interrupt triggered, then the device is not | 301 | * previous timer interrupt triggered, then the device is not |
| 302 | * forced to returned the rest of the consumed RxD that it has | 302 | * forced to returned the rest of the consumed RxD that it has |
| 303 | * on board which account for a byte count less than the one | 303 | * on board which account for a byte count less than the one |
| @@ -861,7 +861,7 @@ static void nfp_flower_clean(struct nfp_app *app) · 860 unmodified lines | |||
| 861 | flush_work(&app_priv->cmsg_work); | 861 | flush_work(&app_priv->cmsg_work); |
| 862 | 862 | ||
| 863 | flow_indr_dev_unregister(nfp_flower_indr_setup_tc_cb, app, | 863 | flow_indr_dev_unregister(nfp_flower_indr_setup_tc_cb, app, |
| 864 | nfp_flower_setup_indr_block_cb); | 864 | nfp_flower_setup_indr_tc_release); |
| 865 | 865 | ||
| 866 | if (app_priv->flower_ext_feats & NFP_FL_FEATS_VF_RLIM) | 866 | if (app_priv->flower_ext_feats & NFP_FL_FEATS_VF_RLIM) |
| 867 | nfp_flower_qos_cleanup(app); | 867 | nfp_flower_qos_cleanup(app); |
| @@ -459,9 +459,10 @@ int nfp_flower_setup_qos_offload(struct nfp_app *app, struct net_device *netdev, · 458 unmodified lines | |||
| 459 | struct tc_cls_matchall_offload *flow); | 459 | struct tc_cls_matchall_offload *flow); |
| 460 | void nfp_flower_stats_rlim_reply(struct nfp_app *app, struct sk_buff *skb); | 460 | void nfp_flower_stats_rlim_reply(struct nfp_app *app, struct sk_buff *skb); |
| 461 | int nfp_flower_indr_setup_tc_cb(struct net_device *netdev, void *cb_priv, | 461 | int nfp_flower_indr_setup_tc_cb(struct net_device *netdev, void *cb_priv, |
| 462 | enum tc_setup_type type, void *type_data); | 462 | enum tc_setup_type type, void *type_data, |
| 463 | int nfp_flower_setup_indr_block_cb(enum tc_setup_type type, void *type_data, | 463 | void *data, |
| 464 | void *cb_priv); | 464 | void (*cleanup)(struct flow_block_cb *block_cb)); |
| 465 | void nfp_flower_setup_indr_tc_release(void *cb_priv); | ||
| 465 | 466 | ||
| 466 | void | 467 | void |
| 467 | __nfp_flower_non_repr_priv_get(struct nfp_flower_non_repr_priv *non_repr_priv); | 468 | __nfp_flower_non_repr_priv_get(struct nfp_flower_non_repr_priv *non_repr_priv); |
| @@ -1619,8 +1619,8 @@ nfp_flower_indr_block_cb_priv_lookup(struct nfp_app *app, · 1618 unmodified lines | |||
| 1619 | return NULL; | 1619 | return NULL; |
| 1620 | } | 1620 | } |
| 1621 | 1621 | ||
| 1622 | int nfp_flower_setup_indr_block_cb(enum tc_setup_type type, | 1622 | static int nfp_flower_setup_indr_block_cb(enum tc_setup_type type, |
| 1623 | void *type_data, void *cb_priv) | 1623 | void *type_data, void *cb_priv) |
| 1624 | { | 1624 | { |
| 1625 | struct nfp_flower_indr_block_cb_priv *priv = cb_priv; | 1625 | struct nfp_flower_indr_block_cb_priv *priv = cb_priv; |
| 1626 | struct flow_cls_offload *flower = type_data; | 1626 | struct flow_cls_offload *flower = type_data; |
| @@ -1637,7 +1637,7 @@ int nfp_flower_setup_indr_block_cb(enum tc_setup_type type, · 10 unmodified lines | |||
| 1637 | } | 1637 | } |
| 1638 | } | 1638 | } |
| 1639 | 1639 | ||
| 1640 | static void nfp_flower_setup_indr_tc_release(void *cb_priv) | 1640 | void nfp_flower_setup_indr_tc_release(void *cb_priv) |
| 1641 | { | 1641 | { |
| 1642 | struct nfp_flower_indr_block_cb_priv *priv = cb_priv; | 1642 | struct nfp_flower_indr_block_cb_priv *priv = cb_priv; |
| 1643 | 1643 | ||
| @@ -1647,7 +1647,8 @@ static void nfp_flower_setup_indr_tc_release(void *cb_priv) · 3 unmodified lines | |||
| 1647 | 1647 | ||
| 1648 | static int | 1648 | static int |
| 1649 | nfp_flower_setup_indr_tc_block(struct net_device *netdev, struct nfp_app *app, | 1649 | nfp_flower_setup_indr_tc_block(struct net_device *netdev, struct nfp_app *app, |
| 1650 | struct flow_block_offload *f) | 1650 | struct flow_block_offload *f, void *data, |
| 1651 | void (*cleanup)(struct flow_block_cb *block_cb)) | ||
| 1651 | { | 1652 | { |
| 1652 | struct nfp_flower_indr_block_cb_priv *cb_priv; | 1653 | struct nfp_flower_indr_block_cb_priv *cb_priv; |
| 1653 | struct nfp_flower_priv *priv = app->priv; | 1654 | struct nfp_flower_priv *priv = app->priv; |
| @@ -1676,9 +1677,10 @@ nfp_flower_setup_indr_tc_block(struct net_device *netdev, struct nfp_app *app, · 22 unmodified lines | |||
| 1676 | cb_priv->app = app; | 1677 | cb_priv->app = app; |
| 1677 | list_add(&cb_priv->list, &priv->indr_block_cb_priv); | 1678 | list_add(&cb_priv->list, &priv->indr_block_cb_priv); |
| 1678 | 1679 | ||
| 1679 | block_cb = flow_block_cb_alloc(nfp_flower_setup_indr_block_cb, | 1680 | block_cb = flow_indr_block_cb_alloc(nfp_flower_setup_indr_block_cb, |
| 1680 | cb_priv, cb_priv, | 1681 | cb_priv, cb_priv, |
| 1681 | nfp_flower_setup_indr_tc_release); | 1682 | nfp_flower_setup_indr_tc_release, |
| 1683 | f, netdev, data, app, cleanup); | ||
| 1682 | if (IS_ERR(block_cb)) { | 1684 | if (IS_ERR(block_cb)) { |
| 1683 | list_del(&cb_priv->list); | 1685 | list_del(&cb_priv->list); |
| 1684 | kfree(cb_priv); | 1686 | kfree(cb_priv); |
| @@ -1699,7 +1701,7 @@ nfp_flower_setup_indr_tc_block(struct net_device *netdev, struct nfp_app *app, · 14 unmodified lines | |||
| 1699 | if (!block_cb) | 1701 | if (!block_cb) |
| 1700 | return -ENOENT; | 1702 | return -ENOENT; |
| 1701 | 1703 | ||
| 1702 | flow_block_cb_remove(block_cb, f); | 1704 | flow_indr_block_cb_remove(block_cb, f); |
| 1703 | list_del(&block_cb->driver_list); | 1705 | list_del(&block_cb->driver_list); |
| 1704 | return 0; | 1706 | return 0; |
| 1705 | default: | 1707 | default: |
| @@ -1710,7 +1712,9 @@ nfp_flower_setup_indr_tc_block(struct net_device *netdev, struct nfp_app *app, · 4 unmodified lines | |||
| 1710 | 1712 | ||
| 1711 | int | 1713 | int |
| 1712 | nfp_flower_indr_setup_tc_cb(struct net_device *netdev, void *cb_priv, | 1714 | nfp_flower_indr_setup_tc_cb(struct net_device *netdev, void *cb_priv, |
| 1713 | enum tc_setup_type type, void *type_data) | 1715 | enum tc_setup_type type, void *type_data, |
| 1716 | void *data, | ||
| 1717 | void (*cleanup)(struct flow_block_cb *block_cb)) | ||
| 1714 | { | 1718 | { |
| 1715 | if (!nfp_fl_is_netdev_to_offload(netdev)) | 1719 | if (!nfp_fl_is_netdev_to_offload(netdev)) |
| 1716 | return -EOPNOTSUPP; | 1720 | return -EOPNOTSUPP; |
| @@ -1718,7 +1722,7 @@ nfp_flower_indr_setup_tc_cb(struct net_device *netdev, void *cb_priv, · 1 unmodified line | |||
| 1718 | switch (type) { | 1722 | switch (type) { |
| 1719 | case TC_SETUP_BLOCK: | 1723 | case TC_SETUP_BLOCK: |
| 1720 | return nfp_flower_setup_indr_tc_block(netdev, cb_priv, | 1724 | return nfp_flower_setup_indr_tc_block(netdev, cb_priv, |
| 1721 | type_data); | 1725 | type_data, data, cleanup); |
| 1722 | default: | 1726 | default: |
| 1723 | return -EOPNOTSUPP; | 1727 | return -EOPNOTSUPP; |
| 1724 | } | 1728 | } |
| @@ -147,7 +147,7 @@ struct pch_gbe_regs { · 146 unmodified lines | |||
| 147 | #define PCH_GBE_RH_ALM_FULL_8 0x00001000 /* 8 words */ | 147 | #define PCH_GBE_RH_ALM_FULL_8 0x00001000 /* 8 words */ |
| 148 | #define PCH_GBE_RH_ALM_FULL_16 0x00002000 /* 16 words */ | 148 | #define PCH_GBE_RH_ALM_FULL_16 0x00002000 /* 16 words */ |
| 149 | #define PCH_GBE_RH_ALM_FULL_32 0x00003000 /* 32 words */ | 149 | #define PCH_GBE_RH_ALM_FULL_32 0x00003000 /* 32 words */ |
| 150 | /* RX FIFO Read Triger Threshold */ | 150 | /* RX FIFO Read Trigger Threshold */ |
| 151 | #define PCH_GBE_RH_RD_TRG_4 0x00000000 /* 4 words */ | 151 | #define PCH_GBE_RH_RD_TRG_4 0x00000000 /* 4 words */ |
| 152 | #define PCH_GBE_RH_RD_TRG_8 0x00000200 /* 8 words */ | 152 | #define PCH_GBE_RH_RD_TRG_8 0x00000200 /* 8 words */ |
| 153 | #define PCH_GBE_RH_RD_TRG_16 0x00000400 /* 16 words */ | 153 | #define PCH_GBE_RH_RD_TRG_16 0x00000400 /* 16 words */ |
| @@ -468,12 +468,18 @@ static void ionic_get_ringparam(struct net_device *netdev, · 467 unmodified lines | |||
| 468 | ring->rx_pending = lif->nrxq_descs; | 468 | ring->rx_pending = lif->nrxq_descs; |
| 469 | } | 469 | } |
| 470 | 470 | ||
| 471 | static void ionic_set_ringsize(struct ionic_lif *lif, void *arg) | ||
| 472 | { | ||
| 473 | struct ethtool_ringparam *ring = arg; | ||
| 474 | |||
| 475 | lif->ntxq_descs = ring->tx_pending; | ||
| 476 | lif->nrxq_descs = ring->rx_pending; | ||
| 477 | } | ||
| 478 | |||
| 471 | static int ionic_set_ringparam(struct net_device *netdev, | 479 | static int ionic_set_ringparam(struct net_device *netdev, |
| 472 | struct ethtool_ringparam *ring) | 480 | struct ethtool_ringparam *ring) |
| 473 | { | 481 | { |
| 474 | struct ionic_lif *lif = netdev_priv(netdev); | 482 | struct ionic_lif *lif = netdev_priv(netdev); |
| 475 | bool running; | ||
| 476 | int err; | ||
| 477 | 483 | ||
| 478 | if (ring->rx_mini_pending || ring->rx_jumbo_pending) { | 484 | if (ring->rx_mini_pending || ring->rx_jumbo_pending) { |
| 479 | netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n"); | 485 | netdev_info(netdev, "Changing jumbo or mini descriptors not supported\n"); |
| @@ -491,22 +497,7 @@ static int ionic_set_ringparam(struct net_device *netdev, · 11 unmodified lines | |||
| 491 | ring->rx_pending == lif->nrxq_descs) | 497 | ring->rx_pending == lif->nrxq_descs) |
| 492 | return 0; | 498 | return 0; |
| 493 | 499 | ||
| 494 | err = ionic_wait_for_bit(lif, IONIC_LIF_F_QUEUE_RESET); | ||
| 495 | if (err) | ||
| 496 | return err; | ||
| 497 | |||
| 498 | running = test_bit(IONIC_LIF_F_UP, lif->state); | ||
| 499 | if (running) | ||
| 500 | ionic_stop(netdev); | ||
| 501 | |||
| 502 | lif->ntxq_descs = ring->tx_pending; | ||
| 503 | lif->nrxq_descs = ring->rx_pending; | ||
| 504 | |||
| 505 | if (running) | ||
| 506 | ionic_open(netdev); | ||
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This diff is large: its 25 lines aren’t shown here.
This diff is large: its 88 lines aren’t shown here.
This diff is large: its 163 lines aren’t shown here.
This diff is large: its 49 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 63 lines aren’t shown here.
This diff is large: its 20 lines aren’t shown here.
This diff is large: its 210 lines aren’t shown here.
This diff is large: its 36 lines aren’t shown here.
This diff is large: its 42 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 105 lines aren’t shown here.
This diff is large: its 39 lines aren’t shown here.
This diff is large: its 29 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 39 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 28 lines aren’t shown here.
This diff is large: its 12 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 44 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 52 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 51 lines aren’t shown here.
This diff is large: its 14 lines aren’t shown here.
This diff is large: its 37 lines aren’t shown here.
This diff is large: its 20 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 52 lines aren’t shown here.
This diff is large: its 43 lines aren’t shown here.
This diff is large: its 23 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 57 lines aren’t shown here.
This diff is large: its 31 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 77 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 23 lines aren’t shown here.
This diff is large: its 24 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 78 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 7 lines aren’t shown here.
This diff is large: its 22 lines aren’t shown here.
This diff is large: its 7 lines aren’t shown here.
This diff is large: its 97 lines aren’t shown here.
This diff is large: its 103 lines aren’t shown here.
This diff is large: its 42 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 30 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 56 lines aren’t shown here.
This diff is large: its 32 lines aren’t shown here.
This diff is large: its 68 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 8 lines aren’t shown here.
This diff is large: its 37 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
This diff is large: its 23 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 31 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 23 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
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This diff is large: its 11 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 11 lines aren’t shown here.
This diff is large: its 106 lines aren’t shown here.
This diff is large: its 88 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 26 lines aren’t shown here.
This diff is large: its 26 lines aren’t shown here.
This diff is large: its 99 lines aren’t shown here.
This diff is large: its 22 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 46 lines aren’t shown here.
This diff is large: its 53 lines aren’t shown here.
This diff is large: its 57 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 20 lines aren’t shown here.
This diff is large: its 66 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 176 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.
This diff is large: its 12 lines aren’t shown here.
This diff is large: its 17 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 9 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
This diff is large: its 18 lines aren’t shown here.
This diff is large: its 79 lines aren’t shown here.
This diff is large: its 20 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
This diff is large: its 201 lines aren’t shown here.
This diff is large: its 124 lines aren’t shown here.
This diff is large: its 22 lines aren’t shown here.
This diff is large: its 13 lines aren’t shown here.
This diff is large: its 42 lines aren’t shown here.
This diff is large: its 31 lines aren’t shown here.
This diff is large: its 32 lines aren’t shown here.
This diff is large: its 81 lines aren’t shown here.
This diff is large: its 31 lines aren’t shown here.
This diff is large: its 37 lines aren’t shown here.
This diff is large: its 19 lines aren’t shown here.
This diff is large: its 15 lines aren’t shown here.
This diff is large: its 254 lines aren’t shown here.
This diff is large: its 16 lines aren’t shown here.
This diff is large: its 10 lines aren’t shown here.