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Merge tag 'mediatek-drm-next-5.6' of https://github.com/ckhu-mediatek/linux.git-tags into drm-next

Mediatek DRM Next for Linux 5.6 This fix non-smooth cursor problem, add cmdq support, add ctm property support and some refinement. Signed-off-by: Dave Airlie <airlied@redhat.com>

Dave Airlie committed 6 years ago

Commit 6fc376f2 parents fd7226f d04a07a15 files · +666 −261Browse files

Showing the changes to include/linux (2 of 15 files). Show all

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2 files
  1. include/linux/mailbox/mtk-cmdq-mailbox.h +11 −0
  2. include/linux/soc/mediatek/mtk-cmdq.h +53 −0
include/linux/mailbox/mtk-cmdq-mailbox.h+11−0
@@ -20,6 +20,16 @@ · 19 unmodified lines
20#define CMDQ_WFE_WAIT BIT(15)20#define CMDQ_WFE_WAIT BIT(15)
21#define CMDQ_WFE_WAIT_VALUE 0x121#define CMDQ_WFE_WAIT_VALUE 0x1
22 22
23/*
24 * WFE arg_b
25 * bit 0-11: wait value
26 * bit 15: 1 - wait, 0 - no wait
27 * bit 16-27: update value
28 * bit 31: 1 - update, 0 - no update
29 */
30#define CMDQ_WFE_OPTION (CMDQ_WFE_UPDATE | CMDQ_WFE_WAIT | \
31 CMDQ_WFE_WAIT_VALUE)
32
23/** cmdq event maximum */33/** cmdq event maximum */
24#define CMDQ_MAX_EVENT 0x3ff34#define CMDQ_MAX_EVENT 0x3ff
25 35
@@ -45,6 +55,7 @@ · 19 unmodified lines
45enum cmdq_code {55enum cmdq_code {
46 CMDQ_CODE_MASK = 0x02,56 CMDQ_CODE_MASK = 0x02,
47 CMDQ_CODE_WRITE = 0x04,57 CMDQ_CODE_WRITE = 0x04,
58 CMDQ_CODE_POLL = 0x08,
48 CMDQ_CODE_JUMP = 0x10,59 CMDQ_CODE_JUMP = 0x10,
49 CMDQ_CODE_WFE = 0x20,60 CMDQ_CODE_WFE = 0x20,
50 CMDQ_CODE_EOC = 0x40,61 CMDQ_CODE_EOC = 0x40,
include/linux/soc/mediatek/mtk-cmdq.h+53−0
@@ -15,6 +15,12 @@ · 14 unmodified lines
15 15
16struct cmdq_pkt;16struct cmdq_pkt;
17 17
18struct cmdq_client_reg {
19 u8 subsys;
20 u16 offset;
21 u16 size;
22};
23
18struct cmdq_client {24struct cmdq_client {
19 spinlock_t lock;25 spinlock_t lock;
20 u32 pkt_cnt;26 u32 pkt_cnt;
@@ -24,6 +30,21 @@ struct cmdq_client { · 3 unmodified lines
24 u32 timeout_ms; /* in unit of microsecond */30 u32 timeout_ms; /* in unit of microsecond */
25};31};
26 32
33/**
34 * cmdq_dev_get_client_reg() - parse cmdq client reg from the device
35 * node of CMDQ client
36 * @dev: device of CMDQ mailbox client
37 * @client_reg: CMDQ client reg pointer
38 * @idx: the index of desired reg
39 *
40 * Return: 0 for success; else the error code is returned
41 *
42 * Help CMDQ client parsing the cmdq client reg
43 * from the device node of CMDQ client.
44 */
45int cmdq_dev_get_client_reg(struct device *dev,
46 struct cmdq_client_reg *client_reg, int idx);
47
27/**48/**
28 * cmdq_mbox_create() - create CMDQ mailbox client and channel49 * cmdq_mbox_create() - create CMDQ mailbox client and channel
29 * @dev: device of CMDQ mailbox client50 * @dev: device of CMDQ mailbox client
@@ -99,6 +120,38 @@ int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event); · 69 unmodified lines
99 */120 */
100int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);121int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event);
101 122
123/**
124 * cmdq_pkt_poll() - Append polling command to the CMDQ packet, ask GCE to
125 * execute an instruction that wait for a specified
126 * hardware register to check for the value w/o mask.
127 * All GCE hardware threads will be blocked by this
128 * instruction.
129 * @pkt: the CMDQ packet
130 * @subsys: the CMDQ sub system code
131 * @offset: register offset from CMDQ sub system
132 * @value: the specified target register value
133 *
134 * Return: 0 for success; else the error code is returned
135 */
136int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys,
137 u16 offset, u32 value);
138
139/**
140 * cmdq_pkt_poll_mask() - Append polling command to the CMDQ packet, ask GCE to
141 * execute an instruction that wait for a specified
142 * hardware register to check for the value w/ mask.
143 * All GCE hardware threads will be blocked by this
144 * instruction.
145 * @pkt: the CMDQ packet
146 * @subsys: the CMDQ sub system code
147 * @offset: register offset from CMDQ sub system
148 * @value: the specified target register value
149 * @mask: the specified target register mask
150 *
151 * Return: 0 for success; else the error code is returned
152 */
153int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys,
154 u16 offset, u32 value, u32 mask);
102/**155/**
103 * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ156 * cmdq_pkt_flush_async() - trigger CMDQ to asynchronously execute the CMDQ
104 * packet and call back at the end of done packet157 * packet and call back at the end of done packet