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drm/amdgpu: update userqueue BOs and PDs

This patch updates the VM_IOCTL to allow userspace to synchronize the mapping/unmapping of a BO in the page table. The major changes are: - it adds a drm_timeline object as an input parameter to the VM IOCTL. - this object is used by the kernel to sync the update of the BO in the page table during the mapping of the object. - the kernel also synchronizes the tlb flush of the page table entry of this object during the unmapping (Added in this series: https://patchwork.freedesktop.org/series/131276/ and https://patchwork.freedesktop.org/patch/584182/) - the userspace can wait on this timeline, and then the BO is ready to be consumed by the GPU. The UAPI for the same has been approved here: https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/392 V2: - remove the eviction fence coupling V3: - added the drm timeline support instead of input/output fence (Christian) V4: - made timeline 64-bit (Christian) - bug fix (Arvind) V5: GLCTS bug fix (Arvind) V6: Rename syncobj_handle -> timeline_syncobj_out Rename point -> timeline_point_in (Marek) V7: Addressed review comments from Christian: - do not send last_update fence in case of vm_clear_freed, instead return the fence from gen_va_update_vm - move the functions to update bo_mapping to amdgpu_gem.c - do not use amdgpu_userq_update_vm anymore in userq_create() V8: Addressed review comments from Christian: - Split amdgpu_gem_update_bo_mapping function. - amdgpu_gem_va_update_vm should return stub for error. V9: Addressed review comments from Christian: - Rename the function amdgpu_gem_update_timeline_node. - amdgpu_gem_update_timeline_node should be void function. - when timeline_point is zero don't allocate a chain and call drm_syncobj_replace_fence() instead of drm_syncobj_add_point(). V11: rebase V12: Fix 32-bit holes issue in sturct drm_amdgpu_gem_va. V13: Fix the review comment by renaming timeline syncobj (Marek)

Arvind Yadav committed 2 years ago

Commit 70773be1 parent 89498432 files · +113 −9Browse files

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include/uapi/drm/amdgpu_drm.h+9−0
@@ -857,6 +857,15 @@ struct drm_amdgpu_gem_va { · 856 unmodified lines
857857 __u64 offset_in_bo;
858858 /** Specify mapping size. Must be correctly aligned. */
859859 __u64 map_size;
860+ /**
861+ * vm_timeline_point is a sequence number used to add new timeline point.
862+ */
863+ __u64 vm_timeline_point;
864+ /**
865+ * The vm page table update fence is installed in given vm_timeline_syncobj_out
866+ * at vm_timeline_point.
867+ */
868+ __u32 vm_timeline_syncobj_out;
860869 };
861870
862871 #define AMDGPU_HW_IP_GFX 0