Now that all AUX allocations are high-order by default, the software double buffering PMU capability doesn't make sense any more, get rid of it. In case some PMUs choose to opt out, we can re-introduce it.
Unified · Split
| @@ -1525,8 +1525,7 @@ static __init int pt_init(void) · 1524 unmodified lines | ||
| 1525 | 1525 | } |
| 1526 | 1526 | |
| 1527 | 1527 | if (!intel_pt_validate_hw_cap(PT_CAP_topa_multiple_entries)) |
| 1528 | − pt_pmu.pmu.capabilities = | |
| 1529 | − PERF_PMU_CAP_AUX_NO_SG | PERF_PMU_CAP_AUX_SW_DOUBLEBUF; | |
| 1528 | + pt_pmu.pmu.capabilities = PERF_PMU_CAP_AUX_NO_SG; | |
| 1530 | 1529 | |
| 1531 | 1530 | pt_pmu.pmu.capabilities |= PERF_PMU_CAP_EXCLUSIVE | PERF_PMU_CAP_ITRACE; |
| 1532 | 1531 | pt_pmu.pmu.attr_groups = pt_attr_groups; |
| @@ -240,7 +240,6 @@ struct perf_event; · 239 unmodified lines | ||
| 240 | 240 | #define PERF_PMU_CAP_NO_INTERRUPT 0x01 |
| 241 | 241 | #define PERF_PMU_CAP_NO_NMI 0x02 |
| 242 | 242 | #define PERF_PMU_CAP_AUX_NO_SG 0x04 |
| 243 | −#define PERF_PMU_CAP_AUX_SW_DOUBLEBUF 0x08 | |
| 244 | 243 | #define PERF_PMU_CAP_EXCLUSIVE 0x10 |
| 245 | 244 | #define PERF_PMU_CAP_ITRACE 0x20 |
| 246 | 245 | #define PERF_PMU_CAP_HETEROGENEOUS_CPUS 0x40 |