Pull KVM updates from Paolo Bonzini: "ARM: - data abort report and injection - steal time support - GICv4 performance improvements - vgic ITS emulation fixes - simplify FWB handling - enable halt polling counters - make the emulated timer PREEMPT_RT compliant s390: - small fixes and cleanups - selftest improvements - yield improvements PPC: - add capability to tell userspace whether we can single-step the guest - improve the allocation of XIVE virtual processor IDs - rewrite interrupt synthesis code to deliver interrupts in virtual mode when appropriate. - minor cleanups and improvements. x86: - XSAVES support for AMD - more accurate report of nested guest TSC to the nested hypervisor - retpoline optimizations - support for nested 5-level page tables - PMU virtualization optimizations, and improved support for nested PMU virtualization - correct latching of INITs for nested virtualization - IOAPIC optimization - TSX_CTRL virtualization for more TAA happiness - improved allocation and flushing of SEV ASIDs - many bugfixes and cleanups" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (127 commits) kvm: nVMX: Relax guest IA32_FEATURE_CONTROL constraints KVM: x86: Grab KVM's srcu lock when setting nested state KVM: x86: Open code shared_msr_update() in its only caller KVM: Fix jump label out_free_* in kvm_init() KVM: x86: Remove a spurious export of a static function KVM: x86: create mmu/ subdirectory KVM: nVMX: Remove unnecessary TLB flushes on L1<->L2 switches when L1 use apic-access-page KVM: x86: remove set but not used variable 'called' KVM: nVMX: Do not mark vmcs02->apic_access_page as dirty when unpinning KVM: vmx: use MSR_IA32_TSX_CTRL to hard-disable TSX on guest that lack it KVM: vmx: implement MSR_IA32_TSX_CTRL disable RTM functionality KVM: x86: implement MSR_IA32_TSX_CTRL effect on CPUID KVM: x86: do not modify masked bits of shared MSRs KVM: x86: fix presentation of TSX feature in ARCH_CAPABILITIES KVM: PPC: Book3S HV: XIVE: Fix potential page leak on error path KVM: PPC: Book3S HV: XIVE: Free previous EQ page when setting up a new one KVM: nVMX: Assume TLB entries of L1 and L2 are tagged differently if L0 use EPT KVM: x86: Unexport kvm_vcpu_reload_apic_access_page() KVM: nVMX: add CR4_LA57 bit to nested CR4_FIXED1 KVM: nVMX: Use semi-colon instead of comma for exit-handlers initialization ...
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| @@ -235,6 +235,7 @@ struct kvm_hyperv_exit { · 234 unmodified lines | ||
| 235 | 235 | #define KVM_EXIT_S390_STSI 25 |
| 236 | 236 | #define KVM_EXIT_IOAPIC_EOI 26 |
| 237 | 237 | #define KVM_EXIT_HYPERV 27 |
| 238 | +#define KVM_EXIT_ARM_NISV 28 | |
| 238 | 239 | |
| 239 | 240 | /* For KVM_EXIT_INTERNAL_ERROR */ |
| 240 | 241 | /* Emulate instruction failed. */ |
| @@ -394,6 +395,11 @@ struct kvm_run { · 153 unmodified lines | ||
| 394 | 395 | } eoi; |
| 395 | 396 | /* KVM_EXIT_HYPERV */ |
| 396 | 397 | struct kvm_hyperv_exit hyperv; |
| 398 | + /* KVM_EXIT_ARM_NISV */ | |
| 399 | + struct { | |
| 400 | + __u64 esr_iss; | |
| 401 | + __u64 fault_ipa; | |
| 402 | + } arm_nisv; | |
| 397 | 403 | /* Fix the size of the union. */ |
| 398 | 404 | char padding[256]; |
| 399 | 405 | }; |
| @@ -1000,6 +1006,9 @@ struct kvm_ppc_resize_hpt { · 600 unmodified lines | ||
| 1000 | 1006 | #define KVM_CAP_PMU_EVENT_FILTER 173 |
| 1001 | 1007 | #define KVM_CAP_ARM_IRQ_LINE_LAYOUT_2 174 |
| 1002 | 1008 | #define KVM_CAP_HYPERV_DIRECT_TLBFLUSH 175 |
| 1009 | +#define KVM_CAP_PPC_GUEST_DEBUG_SSTEP 176 | |
| 1010 | +#define KVM_CAP_ARM_NISV_TO_USER 177 | |
| 1011 | +#define KVM_CAP_ARM_INJECT_EXT_DABT 178 | |
| 1003 | 1012 | |
| 1004 | 1013 | #ifdef KVM_CAP_IRQ_ROUTING |
| 1005 | 1014 | |
| @@ -1227,6 +1236,8 @@ enum kvm_device_type { · 221 unmodified lines | ||
| 1227 | 1236 | #define KVM_DEV_TYPE_ARM_VGIC_ITS KVM_DEV_TYPE_ARM_VGIC_ITS |
| 1228 | 1237 | KVM_DEV_TYPE_XIVE, |
| 1229 | 1238 | #define KVM_DEV_TYPE_XIVE KVM_DEV_TYPE_XIVE |
| 1239 | + KVM_DEV_TYPE_ARM_PV_TIME, | |
| 1240 | +#define KVM_DEV_TYPE_ARM_PV_TIME KVM_DEV_TYPE_ARM_PV_TIME | |
| 1230 | 1241 | KVM_DEV_TYPE_MAX, |
| 1231 | 1242 | }; |
| 1232 | 1243 | |