lael-labs/linux

Documentation/admin-guide/hw-vuln/spectre.rst+80−8

@@ -41,10 +41,11 @@ Related CVEs · 40 unmodified lines
41		41
42	The following CVE entries describe Spectre variants:	42	The following CVE entries describe Spectre variants:
43		43
44	============= ======================= =================	44	============= ======================= ==========================
45	CVE-2017-5753 Bounds check bypass Spectre variant 1	45	CVE-2017-5753 Bounds check bypass Spectre variant 1
46	CVE-2017-5715 Branch target injection Spectre variant 2	46	CVE-2017-5715 Branch target injection Spectre variant 2
47	============= ======================= =================	47	CVE-2019-1125 Spectre v1 swapgs Spectre variant 1 (swapgs)
		48	============= ======================= ==========================
48		49
49	Problem	50	Problem
50	-------	51	-------
@@ -78,6 +79,13 @@ There are some extensions of Spectre variant 1 attacks for reading data · 27 unmodified lines
78	over the network, see :ref:`[12] <spec_ref12>`. However such attacks	79	over the network, see :ref:`[12] <spec_ref12>`. However such attacks
79	are difficult, low bandwidth, fragile, and are considered low risk.	80	are difficult, low bandwidth, fragile, and are considered low risk.
80		81
		82	Note that, despite "Bounds Check Bypass" name, Spectre variant 1 is not
		83	only about user-controlled array bounds checks. It can affect any
		84	conditional checks. The kernel entry code interrupt, exception, and NMI
		85	handlers all have conditional swapgs checks. Those may be problematic
		86	in the context of Spectre v1, as kernel code can speculatively run with
		87	a user GS.
		88
81	Spectre variant 2 (Branch Target Injection)	89	Spectre variant 2 (Branch Target Injection)
82	-------------------------------------------	90	-------------------------------------------
83		91
@@ -132,6 +140,9 @@ not cover all possible attack vectors. · 48 unmodified lines
132	1. A user process attacking the kernel	140	1. A user process attacking the kernel
133	^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^	141	^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
134		142
		143	Spectre variant 1
		144	~~~~~~~~~~~~~~~~~
		145
135	The attacker passes a parameter to the kernel via a register or	146	The attacker passes a parameter to the kernel via a register or
136	via a known address in memory during a syscall. Such parameter may	147	via a known address in memory during a syscall. Such parameter may
137	be used later by the kernel as an index to an array or to derive	148	be used later by the kernel as an index to an array or to derive
@@ -144,7 +155,40 @@ not cover all possible attack vectors. · 6 unmodified lines
144	potentially be influenced for Spectre attacks, new "nospec" accessor	155	potentially be influenced for Spectre attacks, new "nospec" accessor
145	macros are used to prevent speculative loading of data.	156	macros are used to prevent speculative loading of data.
146		157
147	Spectre variant 2 attacker can :ref:`poison <poison_btb>` the branch	158	Spectre variant 1 (swapgs)
		159	~~~~~~~~~~~~~~~~~~~~~~~~~~
		160
		161	An attacker can train the branch predictor to speculatively skip the
		162	swapgs path for an interrupt or exception. If they initialize
		163	the GS register to a user-space value, if the swapgs is speculatively
		164	skipped, subsequent GS-related percpu accesses in the speculation
		165	window will be done with the attacker-controlled GS value. This
		166	could cause privileged memory to be accessed and leaked.
		167
		168	For example:
		169
		170	::
		171
		172	if (coming from user space)
		173	swapgs
		174	mov %gs:<percpu_offset>, %reg
		175	mov (%reg), %reg1
		176
		177	When coming from user space, the CPU can speculatively skip the
		178	swapgs, and then do a speculative percpu load using the user GS
		179	value. So the user can speculatively force a read of any kernel
		180	value. If a gadget exists which uses the percpu value as an address
		181	in another load/store, then the contents of the kernel value may
		182	become visible via an L1 side channel attack.
		183
		184	A similar attack exists when coming from kernel space. The CPU can
		185	speculatively do the swapgs, causing the user GS to get used for the
		186	rest of the speculative window.
		187
		188	Spectre variant 2
		189	~~~~~~~~~~~~~~~~~
		190
		191	A spectre variant 2 attacker can :ref:`poison <poison_btb>` the branch
148	target buffer (BTB) before issuing syscall to launch an attack.	192	target buffer (BTB) before issuing syscall to launch an attack.
149	After entering the kernel, the kernel could use the poisoned branch	193	After entering the kernel, the kernel could use the poisoned branch
150	target buffer on indirect jump and jump to gadget code in speculative	194	target buffer on indirect jump and jump to gadget code in speculative
@@ -280,11 +324,18 @@ The sysfs file showing Spectre variant 1 mitigation status is: · 129 unmodified lines
280		324
281	The possible values in this file are:	325	The possible values in this file are:
282		326
283	======================================= =================================	327	.. list-table::
284	'Mitigation: __user pointer sanitation' Protection in kernel on a case by	328
285	case base with explicit pointer	329	* - 'Not affected'
286	sanitation.	330	- The processor is not vulnerable.
287	======================================= =================================	331	* - 'Vulnerable: __user pointer sanitization and usercopy barriers only; no swapgs barriers'
		332	- The swapgs protections are disabled; otherwise it has
		333	protection in the kernel on a case by case base with explicit
		334	pointer sanitation and usercopy LFENCE barriers.
		335	* - 'Mitigation: usercopy/swapgs barriers and __user pointer sanitization'
		336	- Protection in the kernel on a case by case base with explicit
		337	pointer sanitation, usercopy LFENCE barriers, and swapgs LFENCE
		338	barriers.
288		339
289	However, the protections are put in place on a case by case basis,	340	However, the protections are put in place on a case by case basis,
290	and there is no guarantee that all possible attack vectors for Spectre	341	and there is no guarantee that all possible attack vectors for Spectre
@@ -366,12 +417,27 @@ Turning on mitigation for Spectre variant 1 and Spectre variant 2 · 75 unmodified lines
366	1. Kernel mitigation	417	1. Kernel mitigation
367	^^^^^^^^^^^^^^^^^^^^	418	^^^^^^^^^^^^^^^^^^^^
368		419
		420	Spectre variant 1
		421	~~~~~~~~~~~~~~~~~
		422
369	For the Spectre variant 1, vulnerable kernel code (as determined	423	For the Spectre variant 1, vulnerable kernel code (as determined
370	by code audit or scanning tools) is annotated on a case by case	424	by code audit or scanning tools) is annotated on a case by case
371	basis to use nospec accessor macros for bounds clipping :ref:`[2]	425	basis to use nospec accessor macros for bounds clipping :ref:`[2]
372	<spec_ref2>` to avoid any usable disclosure gadgets. However, it may	426	<spec_ref2>` to avoid any usable disclosure gadgets. However, it may
373	not cover all attack vectors for Spectre variant 1.	427	not cover all attack vectors for Spectre variant 1.
374		428
		429	Copy-from-user code has an LFENCE barrier to prevent the access_ok()
		430	check from being mis-speculated. The barrier is done by the
		431	barrier_nospec() macro.
		432
		433	For the swapgs variant of Spectre variant 1, LFENCE barriers are
		434	added to interrupt, exception and NMI entry where needed. These
		435	barriers are done by the FENCE_SWAPGS_KERNEL_ENTRY and
		436	FENCE_SWAPGS_USER_ENTRY macros.
		437
		438	Spectre variant 2
		439	~~~~~~~~~~~~~~~~~
		440
375	For Spectre variant 2 mitigation, the compiler turns indirect calls or	441	For Spectre variant 2 mitigation, the compiler turns indirect calls or
376	jumps in the kernel into equivalent return trampolines (retpolines)	442	jumps in the kernel into equivalent return trampolines (retpolines)
377	:ref:`[3] <spec_ref3>` :ref:`[9] <spec_ref9>` to go to the target	443	:ref:`[3] <spec_ref3>` :ref:`[9] <spec_ref9>` to go to the target
@@ -473,6 +539,12 @@ Mitigation control on the kernel command line · 95 unmodified lines
473	Spectre variant 2 mitigation can be disabled or force enabled at the	539	Spectre variant 2 mitigation can be disabled or force enabled at the
474	kernel command line.	540	kernel command line.
475		541
		542	nospectre_v1
		543
		544	[X86,PPC] Disable mitigations for Spectre Variant 1
		545	(bounds check bypass). With this option data leaks are
		546	possible in the system.
		547
476	nospectre_v2	548	nospectre_v2
477		549
478	[X86] Disable all mitigations for the Spectre variant 2	550	[X86] Disable all mitigations for the Spectre variant 2

Documentation/admin-guide/kernel-parameters.txt+4−4

@@ -2604,7 +2604,7 @@ · 2603 unmodified lines
2604	expose users to several CPU vulnerabilities.	2604	expose users to several CPU vulnerabilities.
2605	Equivalent to: nopti [X86,PPC]	2605	Equivalent to: nopti [X86,PPC]
2606	kpti=0 [ARM64]	2606	kpti=0 [ARM64]
2607	nospectre_v1 [PPC]	2607	nospectre_v1 [X86,PPC]
2608	nobp=0 [S390]	2608	nobp=0 [S390]
2609	nospectre_v2 [X86,PPC,S390,ARM64]	2609	nospectre_v2 [X86,PPC,S390,ARM64]
2610	spectre_v2_user=off [X86]	2610	spectre_v2_user=off [X86]
@@ -2965,9 +2965,9 @@ · 354 unmodified lines
2965	nosmt=force: Force disable SMT, cannot be undone	2965	nosmt=force: Force disable SMT, cannot be undone
2966	via the sysfs control file.	2966	via the sysfs control file.
2967		2967
2968	nospectre_v1 [PPC] Disable mitigations for Spectre Variant 1 (bounds	2968	nospectre_v1 [X86,PPC] Disable mitigations for Spectre Variant 1
2969	check bypass). With this option data leaks are possible	2969	(bounds check bypass). With this option data leaks are
2970	in the system.	2970	possible in the system.
2971		2971
2972	nospectre_v2 [X86,PPC_FSL_BOOK3E,ARM64] Disable all mitigations for	2972	nospectre_v2 [X86,PPC_FSL_BOOK3E,ARM64] Disable all mitigations for
2973	the Spectre variant 2 (indirect branch prediction)	2973	the Spectre variant 2 (indirect branch prediction)

Documentation/devicetree/bindings/riscv/cpus.txt+0−162

@@ -1,162 +0,0 @@
1	===================
2	RISC-V CPU Bindings
3	===================
4
5	The device tree allows to describe the layout of CPUs in a system through
6	the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
7	defining properties for every cpu.
8
9	Bindings for CPU nodes follow the Devicetree Specification, available from:
10
11	https://www.devicetree.org/specifications/
12
13	with updates for 32-bit and 64-bit RISC-V systems provided in this document.
14
15	===========
16	Terminology
17	===========
18
19	This document uses some terminology common to the RISC-V community that is not
20	widely used, the definitions of which are listed here:
21
22	* hart: A hardware execution context, which contains all the state mandated by
23	the RISC-V ISA: a PC and some registers. This terminology is designed to
24	disambiguate software's view of execution contexts from any particular
25	microarchitectural implementation strategy. For example, my Intel laptop is
26	described as having one socket with two cores, each of which has two hyper
27	threads. Therefore this system has four harts.
28
29	=====================================
30	cpus and cpu node bindings definition
31	=====================================
32
33	The RISC-V architecture, in accordance with the Devicetree Specification,
34	requires the cpus and cpu nodes to be present and contain the properties
35	described below.
36
37	- cpus node
38
39	Description: Container of cpu nodes
40
41	The node name must be "cpus".
42
43	A cpus node must define the following properties:
44
45	- #address-cells
46	Usage: required
47	Value type: <u32>
48	Definition: must be set to 1
49	- #size-cells
50	Usage: required
51	Value type: <u32>
52	Definition: must be set to 0
53
54	- cpu node
55
56	Description: Describes a hart context
57
58	PROPERTIES
59
60	- device_type
61	Usage: required
62	Value type: <string>
63	Definition: must be "cpu"
64	- reg
65	Usage: required
66	Value type: <u32>
67	Definition: The hart ID of this CPU node
68	- compatible:
69	Usage: required
70	Value type: <stringlist>
71	Definition: must contain "riscv", may contain one of
72	"sifive,rocket0"
73	- mmu-type:
74	Usage: optional
75	Value type: <string>
76	Definition: Specifies the CPU's MMU type. Possible values are
77	"riscv,sv32"
78	"riscv,sv39"
79	"riscv,sv48"
80	- riscv,isa:
81	Usage: required
82	Value type: <string>
83	Definition: Contains the RISC-V ISA string of this hart. These
84	ISA strings are defined by the RISC-V ISA manual.
85
86	Example: SiFive Freedom U540G Development Kit
87	---------------------------------------------
88
89	This system contains two harts: a hart marked as disabled that's used for
90	low-level system tasks and should be ignored by Linux, and a second hart that
91	Linux is allowed to run on.
92
93	cpus {
94	#address-cells = <1>;
95	#size-cells = <0>;
96	timebase-frequency = <1000000>;
97	cpu@0 {
98	clock-frequency = <1600000000>;
99	compatible = "sifive,rocket0", "riscv";
100	device_type = "cpu";
101	i-cache-block-size = <64>;
102	i-cache-sets = <128>;
103	i-cache-size = <16384>;
104	next-level-cache = <&L15 &L0>;
105	reg = <0>;
106	riscv,isa = "rv64imac";
107	status = "disabled";
108	L10: interrupt-controller {
109	#interrupt-cells = <1>;
110	compatible = "riscv,cpu-intc";
111	interrupt-controller;
112	};
113	};
114	cpu@1 {
115	clock-frequency = <1600000000>;
116	compatible = "sifive,rocket0", "riscv";
117	d-cache-block-size = <64>;
118	d-cache-sets = <64>;
119	d-cache-size = <32768>;
120	d-tlb-sets = <1>;
121	d-tlb-size = <32>;
122	device_type = "cpu";
123	i-cache-block-size = <64>;
124	i-cache-sets = <64>;
125	i-cache-size = <32768>;
126	i-tlb-sets = <1>;
127	i-tlb-size = <32>;
128	mmu-type = "riscv,sv39";
129	next-level-cache = <&L15 &L0>;
130	reg = <1>;
131	riscv,isa = "rv64imafdc";
132	status = "okay";
133	tlb-split;
134	L13: interrupt-controller {
135	#interrupt-cells = <1>;
136	compatible = "riscv,cpu-intc";
137	interrupt-controller;
138	};
139	};
140	};
141
142	Example: Spike ISA Simulator with 1 Hart
143	----------------------------------------
144
145	This device tree matches the Spike ISA golden model as run with `spike -p1`.
146
147	cpus {
148	cpu@0 {
149	device_type = "cpu";
150	reg = <0x00000000>;
151	status = "okay";
152	compatible = "riscv";
153	riscv,isa = "rv64imafdc";
154	mmu-type = "riscv,sv48";
155	clock-frequency = <0x3b9aca00>;
156	interrupt-controller {
157	#interrupt-cells = <0x00000001>;
158	interrupt-controller;
159	compatible = "riscv,cpu-intc";
160	}
161	}
162	}

Documentation/devicetree/bindings/riscv/cpus.yaml+16−0

@@ -10,6 +10,18 @@ maintainers: · 9 unmodified lines
10	- Paul Walmsley <paul.walmsley@sifive.com>	10	- Paul Walmsley <paul.walmsley@sifive.com>
11	- Palmer Dabbelt <palmer@sifive.com>	11	- Palmer Dabbelt <palmer@sifive.com>
12		12
		13	description: \|
		14	This document uses some terminology common to the RISC-V community
		15	that is not widely used, the definitions of which are listed here:
		16
		17	hart: A hardware execution context, which contains all the state
		18	mandated by the RISC-V ISA: a PC and some registers. This
		19	terminology is designed to disambiguate software's view of execution
		20	contexts from any particular microarchitectural implementation
		21	strategy. For example, an Intel laptop containing one socket with
		22	two cores, each of which has two hyperthreads, could be described as
		23	having four harts.
		24
13	properties:	25	properties:
14	compatible:	26	compatible:
15	items:	27	items:
@@ -50,6 +62,10 @@ properties: · 34 unmodified lines
50	User-Level ISA document, available from	62	User-Level ISA document, available from
51	https://riscv.org/specifications/	63	https://riscv.org/specifications/
52		64
		65	While the isa strings in ISA specification are case
		66	insensitive, letters in the riscv,isa string must be all
		67	lowercase to simplify parsing.
		68
53	timebase-frequency:	69	timebase-frequency:
54	type: integer	70	type: integer
55	minimum: 1	71	minimum: 1

Documentation/devicetree/bindings/riscv/sifive.yaml+1−1

@@ -19,7 +19,7 @@ properties: · 18 unmodified lines
19	compatible:	19	compatible:
20	items:	20	items:
21	- enum:	21	- enum:
22	- sifive,freedom-unleashed-a00	22	- sifive,hifive-unleashed-a00
23	- const: sifive,fu540-c000	23	- const: sifive,fu540-c000
24	- const: sifive,fu540	24	- const: sifive,fu540
25	...	25	...

Documentation/devicetree/bindings/spi/spi-controller.yaml+0−1

@@ -73,7 +73,6 @@ patternProperties: · 72 unmodified lines
73	Compatible of the SPI device.	73	Compatible of the SPI device.
74		74
75	reg:	75	reg:
76	maxItems: 1
77	minimum: 0	76	minimum: 0
78	maximum: 256	77	maximum: 256
79	description:	78	description:

Documentation/filesystems/cifs/TODO+16−10

    - T10 copy offload ie "ODX" (copy chunk, and "Duplicate Extents" ioctl
      currently the only two server side copy mechanisms supported)
-b) improved sparse file support
+b) improved sparse file support (fiemap and SEEK_HOLE are implemented
+but additional features would be supportable by the protocol).
 c) Directory entry caching relies on a 1 second timer, rather than
 using Directory Leases, currently only the root file handle is cached longer
 d) quota support (needs minor kernel change since quota calls
 to make it to network filesystems or deviceless filesystems)
-e) Additional use cases where we use "compoounding" (e.g. open/query/close
+e) Additional use cases can be optimized to use "compounding"
-and open/setinfo/close) to reduce the number of roundtrips, and also
+(e.g. open/query/close and open/setinfo/close) to reduce the number
-open to reduce redundant opens (using deferred close and reference counts more).
+of roundtrips to the server and improve performance. Various cases
+(stat, statfs, create, unlink, mkdir) already have been improved by
+using compounding but more can be done.  In addition we could significantly
+reduce redundant opens by using deferred close (with handle caching leases)
+and better using reference counters on file handles.
 f) Finish inotify support so kde and gnome file list windows
 will autorefresh (partially complete by Asser). Needs minor kernel
 exists. Also better integration with winbind for resolving SID owners
 k) Add tools to take advantage of more smb3 specific ioctls and features
-(passthrough ioctl/fsctl for sending various SMB3 fsctls to the server
+(passthrough ioctl/fsctl is now implemented in cifs.ko to allow sending
-is in progress, and a passthrough query_info call is already implemented
+various SMB3 fsctls and query info and set info calls directly from user space)
-in cifs.ko to allow smb3 info levels queries to be sent from userspace)
+Add tools to make setting various non-POSIX metadata attributes easier
+from tools (e.g. extending what was done in smb-info tool).
 l) encrypted file support
 m) improved stats gathering tools (perhaps integration with nfsometer?)
 to extend and make easier to use what is currently in /proc/fs/cifs/Stats
-n) allow setting more NTFS/SMB3 file attributes remotely (currently limited to compressed
+n) Add support for claims based ACLs ("DAC")
-file attribute via chflags) and improve user space tools for managing and
-viewing them.
 o) mount helper GUI (to simplify the various configuration options on mount)
 w) Add support for additional strong encryption types, and additional spnego
 authentication mechanisms (see MS-SMB2)
+x) Finish support for SMB3.1.1 compression
 KNOWN BUGS
 ====================================
 See http://bugzilla.samba.org - search on product "CifsVFS" for

Documentation/networking/tls-offload.rst+17−6

 Following minimum set of TLS-related statistics should be reported
 by the driver:
- * ``rx_tls_decrypted`` - number of successfully decrypted TLS segments
+ * ``rx_tls_decrypted_packets`` - number of successfully decrypted RX packets
- * ``tx_tls_encrypted`` - number of in-order TLS segments passed to device
+   which were part of a TLS stream.
-   for encryption
+ * ``rx_tls_decrypted_bytes`` - number of TLS payload bytes in RX packets
+   which were successfully decrypted.
+ * ``tx_tls_encrypted_packets`` - number of TX packets passed to the device
+   for encryption of their TLS payload.
+ * ``tx_tls_encrypted_bytes`` - number of TLS payload bytes in TX packets
+   passed to the device for encryption.
+ * ``tx_tls_ctx`` - number of TLS TX HW offload contexts added to device for
+   encryption.
  * ``tx_tls_ooo`` - number of TX packets which were part of a TLS stream
-   but did not arrive in the expected order
+   but did not arrive in the expected order.
- * ``tx_tls_drop_no_sync_data`` - number of TX packets dropped because
+ * ``tx_tls_drop_no_sync_data`` - number of TX packets which were part of
-   they arrived out of order and associated record could not be found
+   a TLS stream dropped, because they arrived out of order and associated
+   record could not be found.
+ * ``tx_tls_drop_bypass_req`` - number of TX packets which were part of a TLS
+   stream dropped, because they contain both data that has been encrypted by
+   software and data that expects hardware crypto offload.
 Notable corner cases, exceptions and additional requirements
 ============================================================

Documentation/vm/hmm.rst+1−1

@@ -237,7 +237,7 @@ The usage pattern is:: · 236 unmodified lines
237	ret = hmm_range_snapshot(&range);	237	ret = hmm_range_snapshot(&range);
238	if (ret) {	238	if (ret) {
239	up_read(&mm->mmap_sem);	239	up_read(&mm->mmap_sem);
240	if (ret == -EAGAIN) {	240	if (ret == -EBUSY) {
241	/*	241	/*
242	* No need to check hmm_range_wait_until_valid() return value	242	* No need to check hmm_range_wait_until_valid() return value
243	* on retry we will get proper error with hmm_range_snapshot()	243	* on retry we will get proper error with hmm_range_snapshot()

MAINTAINERS+18−12

 ARM/RENESAS ARM64 ARCHITECTURE
 M:	Simon Horman <horms@verge.net.au>
+M:	Geert Uytterhoeven <geert+renesas@glider.be>
 M:	Magnus Damm <magnus.damm@gmail.com>
 L:	linux-renesas-soc@vger.kernel.org
 Q:	http://patchwork.kernel.org/project/linux-renesas-soc/list/
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
 S:	Supported
 F:	arch/arm64/boot/dts/renesas/
 F:	Documentation/devicetree/bindings/arm/renesas.yaml
 ARM/SHMOBILE ARM ARCHITECTURE
 M:	Simon Horman <horms@verge.net.au>
+M:	Geert Uytterhoeven <geert+renesas@glider.be>
 M:	Magnus Damm <magnus.damm@gmail.com>
 L:	linux-renesas-soc@vger.kernel.org
 Q:	http://patchwork.kernel.org/project/linux-renesas-soc/list/
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next
 S:	Supported
 F:	arch/arm/boot/dts/emev2*
 F:	arch/arm/boot/dts/gr-peach*
 F:	drivers/counter/ftm-quaddec.c
 FLOPPY DRIVER
-S:	Orphan
+M:	Denis Efremov <efremov@linux.com>
+S:	Odd Fixes
 L:	linux-block@vger.kernel.org
 F:	drivers/block/floppy.c
 M:	Moritz Fischer <mdf@kernel.org>
 L:	linux-fpga@vger.kernel.org
 S:	Maintained
-T:	git git://git.kernel.org/pub/scm/linux/kernel/git/atull/linux-fpga.git
+T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga.git
 Q:	http://patchwork.kernel.org/project/linux-fpga/list/
 F:	Documentation/fpga/
 F:	Documentation/driver-api/fpga/
 M:	Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
 L:	dri-devel@lists.freedesktop.org
 L:	linux-fbdev@vger.kernel.org
-T:	git git://github.com/bzolnier/linux.git
+T:	git git://anongit.freedesktop.org/drm/drm-misc
 Q:	http://patchwork.kernel.org/project/linux-fbdev/list/
 S:	Maintained
 F:	Documentation/fb/
 F:	fs/gfs2/
 F:	include/uapi/linux/gfs2_ondisk.h
-GIGASET ISDN DRIVERS
-M:	Paul Bolle <pebolle@tiscali.nl>
-L:	gigaset307x-common@lists.sourceforge.net
-W:	http://gigaset307x.sourceforge.net/
-S:	Odd Fixes
-F:	drivers/staging/isdn/gigaset/
 GNSS SUBSYSTEM
 M:	Johan Hovold <johan@kernel.org>
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/johan/gnss.git
 F:	drivers/video/fbdev/i810/
 INTEL ASoC DRIVERS
+M:	Cezary Rojewski <cezary.rojewski@intel.com>
 M:	Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
 M:	Liam Girdwood <liam.r.girdwood@linux.intel.com>
 M:	Jie Yang <yang.jie@linux.intel.com>
 S:	Maintained
 W:	https://fedorahosted.org/dropwatch/
 F:	net/core/drop_monitor.c
+F:	include/uapi/linux/net_dropmon.h
 NETWORKING DRIVERS
 M:	"David S. Miller" <davem@davemloft.net>
 M:	Dave Watson <davejwatson@fb.com>
 M:	John Fastabend <john.fastabend@gmail.com>
 M:	Daniel Borkmann <daniel@iogearbox.net>
+M:	Jakub Kicinski <jakub.kicinski@netronome.com>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	net/tls/*
 F:	drivers/media/pci/saa7146/
 F:	include/media/drv-intf/saa7146*
+SAFESETID SECURITY MODULE
+M:     Micah Morton <mortonm@chromium.org>
+S:     Supported
+F:     security/safesetid/
+F:     Documentation/admin-guide/LSM/SafeSetID.rst
 SAMSUNG AUDIO (ASoC) DRIVERS
 M:	Krzysztof Kozlowski <krzk@kernel.org>
 M:	Sangbeom Kim <sbkim73@samsung.com>
 F:	drivers/net/ethernet/ti/netcp*
 TI PCM3060 ASoC CODEC DRIVER
-M:	Kirill Marinushkin <kmarinushkin@birdec.tech>
+M:	Kirill Marinushkin <kmarinushkin@birdec.com>
 L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
 S:	Maintained
 F:	Documentation/devicetree/bindings/sound/pcm3060.txt
 M:	Jesper Dangaard Brouer <hawk@kernel.org>
 M:	John Fastabend <john.fastabend@gmail.com>
 L:	netdev@vger.kernel.org
-L:	xdp-newbies@vger.kernel.org
 L:	bpf@vger.kernel.org
 S:	Supported
 F:	net/core/xdp.c

Makefile+20−7

 VERSION = 5
 PATCHLEVEL = 3
 SUBLEVEL = 0
-EXTRAVERSION = -rc2
+EXTRAVERSION = -rc4
 NAME = Bobtail Squid
 # *DOCUMENTATION*
 STRIP		= $(CROSS_COMPILE)strip
 OBJCOPY		= $(CROSS_COMPILE)objcopy
 OBJDUMP		= $(CROSS_COMPILE)objdump
+OBJSIZE		= $(CROSS_COMPILE)size
 PAHOLE		= pahole
 LEX		= flex
 YACC		= bison
 KBUILD_LDFLAGS_MODULE := -T $(srctree)/scripts/module-common.lds
 KBUILD_LDFLAGS :=
 GCC_PLUGINS_CFLAGS :=
+CLANG_FLAGS :=
 export ARCH SRCARCH CONFIG_SHELL HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD CC
-export CPP AR NM STRIP OBJCOPY OBJDUMP PAHOLE KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS
+export CPP AR NM STRIP OBJCOPY OBJDUMP OBJSIZE PAHOLE LEX YACC AWK INSTALLKERNEL
-export MAKE LEX YACC AWK INSTALLKERNEL PERL PYTHON PYTHON2 PYTHON3 UTS_MACHINE
+export PERL PYTHON PYTHON2 PYTHON3 CHECK CHECKFLAGS MAKE UTS_MACHINE HOSTCXX
-export HOSTCXX KBUILD_HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS
+export KBUILD_HOSTCXXFLAGS KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS LDFLAGS_MODULE
 export KBUILD_CPPFLAGS NOSTDINC_FLAGS LINUXINCLUDE OBJCOPYFLAGS KBUILD_LDFLAGS
 export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE
 ifneq ($(shell $(CC) --version 2>&1 | head -n 1 | grep clang),)
 ifneq ($(CROSS_COMPILE),)
-CLANG_FLAGS	:= --target=$(notdir $(CROSS_COMPILE:%-=%))
+CLANG_FLAGS	+= --target=$(notdir $(CROSS_COMPILE:%-=%))
 GCC_TOOLCHAIN_DIR := $(dir $(shell which $(CROSS_COMPILE)elfedit))
 CLANG_FLAGS	+= --prefix=$(GCC_TOOLCHAIN_DIR)
 GCC_TOOLCHAIN	:= $(realpath $(GCC_TOOLCHAIN_DIR)/..)
 KBUILD_CFLAGS += -Wdeclaration-after-statement
 # Warn about unmarked fall-throughs in switch statement.
-KBUILD_CFLAGS += $(call cc-option,-Wimplicit-fallthrough=3,)
+KBUILD_CFLAGS += $(call cc-option,-Wimplicit-fallthrough,)
 # Variable Length Arrays (VLAs) should not be used anywhere in the kernel
 KBUILD_CFLAGS += -Wvla
 PHONY += prepare0
+export MODORDER := $(if $(KBUILD_EXTMOD),$(KBUILD_EXTMOD)/)modules.order
 ifeq ($(KBUILD_EXTMOD),)
 core-y		+= kernel/ certs/ mm/ fs/ ipc/ security/ crypto/ block/
 	$(Q)$(MAKE) $(build)=$(build-dir) $(build-target)
 %.symtypes: prepare FORCE
 	$(Q)$(MAKE) $(build)=$(build-dir) $(build-target)
+ifeq ($(KBUILD_EXTMOD),)
+# For the single build of an in-tree module, use a temporary file to avoid
+# the situation of modules_install installing an invalid modules.order.
+%.ko: MODORDER := .modules.tmp
+endif
+%.ko: prepare FORCE
+	$(Q)$(MAKE) $(build)=$(build-dir) $(build-target:.ko=.mod)
+	$(Q)echo $(build-target) > $(MODORDER)
+	$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost
 # Modules
 PHONY += /
 /: ./
 %/: prepare FORCE
-	$(Q)$(MAKE) KBUILD_MODULES=1 $(build)=$(build-dir)
+	$(Q)$(MAKE) KBUILD_MODULES=1 $(build)=$(build-dir) need-modorder=1
 # FIXME Should go into a make.lib or something
 # ===========================================================================

arch/arm/include/asm/dma-mapping.h+3−1

@@ -18,7 +18,9 @@ extern const struct dma_map_ops arm_coherent_dma_ops; · 17 unmodified lines
18		18
19	static inline const struct dma_map_ops get_arch_dma_ops(struct bus_type bus)	19	static inline const struct dma_map_ops get_arch_dma_ops(struct bus_type bus)
20	{	20	{
21	return IS_ENABLED(CONFIG_MMU) ? &arm_dma_ops : NULL;	21	if (IS_ENABLED(CONFIG_MMU) && !IS_ENABLED(CONFIG_ARM_LPAE))
		22	return &arm_dma_ops;
		23	return NULL;
22	}	24	}
23		25
24	#ifdef __arch_page_to_dma	26	#ifdef __arch_page_to_dma

arch/arm/kernel/hw_breakpoint.c+5−0

 		if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE)
 			&& max_watchpoint_len >= 8)
 			break;
+		/* Else, fall through */
 	default:
 		return -EINVAL;
 	}
 		/* Allow halfword watchpoints and breakpoints. */
 		if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
 			break;
+		/* Else, fall through */
 	case 3:
 		/* Allow single byte watchpoint. */
 		if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
 			break;
+		/* Else, fall through */
 	default:
 		ret = -EINVAL;
 		goto out;
 		break;
 	case ARM_ENTRY_ASYNC_WATCHPOINT:
 		WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
+		/* Fall through */
 	case ARM_ENTRY_SYNC_WATCHPOINT:
 		watchpoint_handler(addr, fsr, regs);
 		break;
 		ARM_DBG_READ(c1, c1, 4, oslsr);
 		if (oslsr & ARM_OSLSR_OSLM0)
 			return true;
+		/* Else, fall through */
 	default:
 		return false;
 	}

arch/arm/kernel/signal.c+1−0

@@ -596,6 +596,7 @@ static int do_signal(struct pt_regs *regs, int syscall) · 595 unmodified lines
596	switch (retval) {	596	switch (retval) {
597	case -ERESTART_RESTARTBLOCK:	597	case -ERESTART_RESTARTBLOCK:
598	restart -= 2;	598	restart -= 2;
		599	/* Fall through */
599	case -ERESTARTNOHAND:	600	case -ERESTARTNOHAND:
600	case -ERESTARTSYS:	601	case -ERESTARTSYS:
601	case -ERESTARTNOINTR:	602	case -ERESTARTNOINTR:

arch/arm/kvm/coproc.c+15−8

@@ -651,13 +651,22 @@ int kvm_handle_cp14_64(struct kvm_vcpu vcpu, struct kvm_run run) · 650 unmodified lines
651	}	651	}
652		652
653	static void reset_coproc_regs(struct kvm_vcpu *vcpu,	653	static void reset_coproc_regs(struct kvm_vcpu *vcpu,
654	const struct coproc_reg *table, size_t num)	654	const struct coproc_reg *table, size_t num,
		655	unsigned long *bmap)
655	{	656	{
656	unsigned long i;	657	unsigned long i;
657		658
658	for (i = 0; i < num; i++)	659	for (i = 0; i < num; i++)
659	if (table[i].reset)	660	if (table[i].reset) {
		661	int reg = table[i].reg;
		662
660	table[i].reset(vcpu, &table[i]);	663	table[i].reset(vcpu, &table[i]);
		664	if (reg > 0 && reg < NR_CP15_REGS) {
		665	set_bit(reg, bmap);
		666	if (table[i].is_64bit)
		667	set_bit(reg + 1, bmap);
		668	}
		669	}
661	}	670	}
662		671
663	static struct coproc_params decode_32bit_hsr(struct kvm_vcpu *vcpu)	672	static struct coproc_params decode_32bit_hsr(struct kvm_vcpu *vcpu)
@@ -1432,17 +1441,15 @@ void kvm_reset_coprocs(struct kvm_vcpu *vcpu) · 768 unmodified lines
1432	{	1441	{
1433	size_t num;	1442	size_t num;
1434	const struct coproc_reg *table;	1443	const struct coproc_reg *table;
1435		1444	DECLARE_BITMAP(bmap, NR_CP15_REGS) = { 0, };
1436	/* Catch someone adding a register without putting in reset entry. */
1437	memset(vcpu->arch.ctxt.cp15, 0x42, sizeof(vcpu->arch.ctxt.cp15));
1438		1445
1439	/* Generic chip reset first (so target could override). */	1446	/* Generic chip reset first (so target could override). */
1440	reset_coproc_regs(vcpu, cp15_regs, ARRAY_SIZE(cp15_regs));	1447	reset_coproc_regs(vcpu, cp15_regs, ARRAY_SIZE(cp15_regs), bmap);
1441		1448
1442	table = get_target_table(vcpu->arch.target, &num);	1449	table = get_target_table(vcpu->arch.target, &num);
1443	reset_coproc_regs(vcpu, table, num);	1450	reset_coproc_regs(vcpu, table, num, bmap);
1444		1451
1445	for (num = 1; num < NR_CP15_REGS; num++)	1452	for (num = 1; num < NR_CP15_REGS; num++)
1446	WARN(vcpu_cp15(vcpu, num) == 0x42424242,	1453	WARN(!test_bit(num, bmap),
1447	"Didn't reset vcpu_cp15(vcpu, %zi)", num);	1454	"Didn't reset vcpu_cp15(vcpu, %zi)", num);
1448	}	1455	}

arch/arm/mach-ep93xx/crunch.c+1−0

@@ -49,6 +49,7 @@ static int crunch_do(struct notifier_block self, unsigned long cmd, void t) · 48 unmodified lines
49	* FALLTHROUGH: Ensure we don't try to overwrite our newly	49	* FALLTHROUGH: Ensure we don't try to overwrite our newly
50	* initialised state information on the first fault.	50	* initialised state information on the first fault.
51	*/	51	*/
		52	/* Fall through */
52		53
53	case THREAD_NOTIFY_EXIT:	54	case THREAD_NOTIFY_EXIT:
54	crunch_task_release(thread);	55	crunch_task_release(thread);

arch/arm/mach-tegra/reset.c+1−1

@@ -70,7 +70,7 @@ static void __init tegra_cpu_reset_handler_enable(void) · 69 unmodified lines
70	switch (err) {	70	switch (err) {
71	case -ENOSYS:	71	case -ENOSYS:
72	tegra_cpu_reset_handler_set(reset_address);	72	tegra_cpu_reset_handler_set(reset_address);
73	/* pass-through */	73	/* fall through */
74	case 0:	74	case 0:
75	is_enabled = true;	75	is_enabled = true;
76	break;	76	break;

arch/arm/mm/Kconfig+5−0

 	depends on MMU && CPU_32v7 && !CPU_32v6 && !CPU_32v5 && \
 		!CPU_32v4 && !CPU_32v3
 	select PHYS_ADDR_T_64BIT
+	select SWIOTLB
+	select ARCH_HAS_DMA_COHERENT_TO_PFN
+	select ARCH_HAS_DMA_MMAP_PGPROT
+	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
+	select ARCH_HAS_SYNC_DMA_FOR_CPU
 	help
 	  Say Y if you have an ARMv7 processor supporting the LPAE page
 	  table format and you would like to access memory beyond the

arch/arm/mm/alignment.c+3−1

 			return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] |
 			    (tinstr & 255);		/* register_list */
 		}
-		/* Else fall through for illegal instruction case */
+		/* Else, fall through - for illegal instruction case */
 	default:
 		return BAD_INSTR;
 	case 0xe8e0:
 	case 0xe9e0:
 		poffset->un = (tinst2 & 0xff) << 2;
+		/* Fall through */
 	case 0xe940:
 	case 0xe9c0:
 		return do_alignment_ldrdstrd;

arch/arm/mm/dma-mapping.c+61−0

@@ -15,6 +15,7 @@ · 14 unmodified lines
15	#include <linux/init.h>	15	#include <linux/init.h>
16	#include <linux/device.h>	16	#include <linux/device.h>
17	#include <linux/dma-mapping.h>	17	#include <linux/dma-mapping.h>
		18	#include <linux/dma-noncoherent.h>
18	#include <linux/dma-contiguous.h>	19	#include <linux/dma-contiguous.h>
19	#include <linux/highmem.h>	20	#include <linux/highmem.h>
20	#include <linux/memblock.h>	21	#include <linux/memblock.h>
@@ -1125,6 +1126,19 @@ int arm_dma_supported(struct device *dev, u64 mask) · 1104 unmodified lines
1125		1126
1126	static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)	1127	static const struct dma_map_ops *arm_get_dma_map_ops(bool coherent)
1127	{	1128	{
		1129	/*
		1130	* When CONFIG_ARM_LPAE is set, physical address can extend above
		1131	* 32-bits, which then can't be addressed by devices that only support
		1132	* 32-bit DMA.
		1133	* Use the generic dma-direct / swiotlb ops code in that case, as that
		1134	* handles bounce buffering for us.
		1135	*
		1136	* Note: this checks CONFIG_ARM_LPAE instead of CONFIG_SWIOTLB as the
		1137	* latter is also selected by the Xen code, but that code for now relies
		1138	* on non-NULL dev_dma_ops. To be cleaned up later.
		1139	*/
		1140	if (IS_ENABLED(CONFIG_ARM_LPAE))
		1141	return NULL;
1128	return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;	1142	return coherent ? &arm_coherent_dma_ops : &arm_dma_ops;
1129	}	1143	}
1130		1144
@@ -2329,6 +2343,9 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, · 1198 unmodified lines
2329	const struct dma_map_ops *dma_ops;	2343	const struct dma_map_ops *dma_ops;
2330		2344
2331	dev->archdata.dma_coherent = coherent;	2345	dev->archdata.dma_coherent = coherent;
		2346	#ifdef CONFIG_SWIOTLB
		2347	dev->dma_coherent = coherent;
		2348	#endif
2332		2349
2333	/*	2350	/*
2334	* Don't override the dma_ops if they have already been set. Ideally	2351	* Don't override the dma_ops if they have already been set. Ideally
@@ -2363,3 +2380,47 @@ void arch_teardown_dma_ops(struct device *dev) · 28 unmodified lines
2363	/* Let arch_setup_dma_ops() start again from scratch upon re-probe */	2380	/* Let arch_setup_dma_ops() start again from scratch upon re-probe */
2364	set_dma_ops(dev, NULL);	2381	set_dma_ops(dev, NULL);
2365	}	2382	}
		2383
		2384	#ifdef CONFIG_SWIOTLB
		2385	void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
		2386	size_t size, enum dma_data_direction dir)
		2387	{
		2388	__dma_page_cpu_to_dev(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
		2389	size, dir);
		2390	}
		2391
		2392	void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
		2393	size_t size, enum dma_data_direction dir)
		2394	{
		2395	__dma_page_dev_to_cpu(phys_to_page(paddr), paddr & (PAGE_SIZE - 1),
		2396	size, dir);
		2397	}
		2398
		2399	long arch_dma_coherent_to_pfn(struct device dev, void cpu_addr,
		2400	dma_addr_t dma_addr)
		2401	{
		2402	return dma_to_pfn(dev, dma_addr);
		2403	}
		2404
		2405	pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot,
		2406	unsigned long attrs)
		2407	{
		2408	if (!dev_is_dma_coherent(dev))
		2409	return __get_dma_pgprot(attrs, prot);
		2410	return prot;
		2411	}
		2412
		2413	void arch_dma_alloc(struct device dev, size_t size, dma_addr_t *dma_handle,
		2414	gfp_t gfp, unsigned long attrs)
		2415	{
		2416	return __dma_alloc(dev, size, dma_handle, gfp,
		2417	__get_dma_pgprot(attrs, PAGE_KERNEL), false,
		2418	attrs, __builtin_return_address(0));
		2419	}
		2420
		2421	void arch_dma_free(struct device dev, size_t size, void cpu_addr,
		2422	dma_addr_t dma_handle, unsigned long attrs)
		2423	{
		2424	__arm_dma_free(dev, size, cpu_addr, dma_handle, attrs, false);
		2425	}
		2426	#endif /* CONFIG_SWIOTLB */

arch/arm/mm/init.c+5−0

 #include <linux/dma-contiguous.h>
 #include <linux/sizes.h>
 #include <linux/stop_machine.h>
+#include <linux/swiotlb.h>
 #include <asm/cp15.h>
 #include <asm/mach-types.h>
  */
 void __init mem_init(void)
 {
+#ifdef CONFIG_ARM_LPAE
+	swiotlb_init(1);
+#endif
 	set_max_mapnr(pfn_to_page(max_pfn) - mem_map);
 	/* this will put all unused low memory onto the freelists */

arch/arm/plat-omap/dma.c+5−9

 		/*
 		 * not supported by current hardware on OMAP1
 		 * w |= (0x03 << 7);
-		 * fall through
 		 */
+		/* fall through */
 	case OMAP_DMA_DATA_BURST_16:
 		if (dma_omap2plus()) {
 			burst = 0x3;
 			break;
 		}
-		/*
+		/* OMAP1 don't support burst 16 */
-		 * OMAP1 don't support burst 16
+		/* fall through */
-		 * fall through
-		 */
 	default:
 		BUG();
 	}
 			burst = 0x3;
 			break;
 		}
-		/*
+		/* OMAP1 don't support burst 16 */
-		 * OMAP1 don't support burst 16
+		/* fall through */
-		 * fall through
-		 */
 	default:
 		printk(KERN_ERR "Invalid DMA burst mode\n");
 		BUG();

arch/arm64/Makefile+1−1

@@ -52,7 +52,7 @@ ifeq ($(CONFIG_GENERIC_COMPAT_VDSO), y) · 51 unmodified lines
52		52
53	ifeq ($(CONFIG_CC_IS_CLANG), y)	53	ifeq ($(CONFIG_CC_IS_CLANG), y)
54	$(warning CROSS_COMPILE_COMPAT is clang, the compat vDSO will not be built)	54	$(warning CROSS_COMPILE_COMPAT is clang, the compat vDSO will not be built)
55	else ifeq ($(CROSS_COMPILE_COMPAT),)	55	else ifeq ($(strip $(CROSS_COMPILE_COMPAT)),)
56	$(warning CROSS_COMPILE_COMPAT not defined or empty, the compat vDSO will not be built)	56	$(warning CROSS_COMPILE_COMPAT not defined or empty, the compat vDSO will not be built)
57	else ifeq ($(shell which $(CROSS_COMPILE_COMPAT)gcc 2> /dev/null),)	57	else ifeq ($(shell which $(CROSS_COMPILE_COMPAT)gcc 2> /dev/null),)
58	$(error $(CROSS_COMPILE_COMPAT)gcc not found, check CROSS_COMPILE_COMPAT)	58	$(error $(CROSS_COMPILE_COMPAT)gcc not found, check CROSS_COMPILE_COMPAT)

arch/arm64/include/asm/arch_gicv3.h+6−0

 	BUILD_BUG_ON(GICD_INT_DEF_PRI < (GIC_PRIO_IRQOFF |
 					 GIC_PRIO_PSR_I_SET));
 	BUILD_BUG_ON(GICD_INT_DEF_PRI >= GIC_PRIO_IRQON);
+	/*
+	 * Need to make sure IRQON allows IRQs when SCR_EL3.FIQ is cleared
+	 * and non-secure PMR accesses are not subject to the shifts that
+	 * are applied to IRQ priorities
+	 */
+	BUILD_BUG_ON((0x80 | (GICD_INT_DEF_PRI >> 1)) >= GIC_PRIO_IRQON);
 	gic_write_pmr(GIC_PRIO_IRQOFF);
 }

arch/arm64/include/asm/cpufeature.h+4−3

  */
 enum ftr_type {
-	FTR_EXACT,	/* Use a predefined safe value */
+	FTR_EXACT,			/* Use a predefined safe value */
-	FTR_LOWER_SAFE,	/* Smaller value is safe */
+	FTR_LOWER_SAFE,			/* Smaller value is safe */
-	FTR_HIGHER_SAFE,/* Bigger value is safe */
+	FTR_HIGHER_SAFE,		/* Bigger value is safe */
+	FTR_HIGHER_OR_ZERO_SAFE,	/* Bigger value is safe, but 0 is biggest */
 };
 #define FTR_STRICT	true	/* SANITY check strict matching required */

arch/arm64/include/asm/daifflags.h+2−0

@@ -13,6 +13,8 @@ · 12 unmodified lines
13	#define DAIF_PROCCTX 0	13	#define DAIF_PROCCTX 0
14	#define DAIF_PROCCTX_NOIRQ PSR_I_BIT	14	#define DAIF_PROCCTX_NOIRQ PSR_I_BIT
15	#define DAIF_ERRCTX (PSR_I_BIT \| PSR_A_BIT)	15	#define DAIF_ERRCTX (PSR_I_BIT \| PSR_A_BIT)
		16	#define DAIF_MASK (PSR_D_BIT \| PSR_A_BIT \| PSR_I_BIT \| PSR_F_BIT)
		17
16		18
17	/* mask/save/unmask/restore all exceptions, including interrupts. */	19	/* mask/save/unmask/restore all exceptions, including interrupts. */
18	static inline void local_daif_mask(void)	20	static inline void local_daif_mask(void)

arch/arm64/include/asm/efi.h+5−1

@@ -105,7 +105,11 @@ static inline unsigned long efi_get_max_initrd_addr(unsigned long dram_base, · 104 unmodified lines
105	((protocol##_t *)instance)->f(instance, ##__VA_ARGS__)	105	((protocol##_t *)instance)->f(instance, ##__VA_ARGS__)
106		106
107	#define alloc_screen_info(x...) &screen_info	107	#define alloc_screen_info(x...) &screen_info
108	#define free_screen_info(x...)	108
		109	static inline void free_screen_info(efi_system_table_t *sys_table_arg,
		110	struct screen_info *si)
		111	{
		112	}
109		113
110	/* redeclare as 'hidden' so the compiler will generate relative references */	114	/* redeclare as 'hidden' so the compiler will generate relative references */
111	extern struct screen_info screen_info __attribute__((__visibility__("hidden")));	115	extern struct screen_info screen_info __attribute__((__visibility__("hidden")));

arch/arm64/include/asm/kvm_arm.h+4−3

 #define kvm_arm_exception_class \
 	ECN(UNKNOWN), ECN(WFx), ECN(CP15_32), ECN(CP15_64), ECN(CP14_MR), \
-	ECN(CP14_LS), ECN(FP_ASIMD), ECN(CP10_ID), ECN(CP14_64), ECN(SVC64), \
+	ECN(CP14_LS), ECN(FP_ASIMD), ECN(CP10_ID), ECN(PAC), ECN(CP14_64), \
-	ECN(HVC64), ECN(SMC64), ECN(SYS64), ECN(IMP_DEF), ECN(IABT_LOW), \
+	ECN(SVC64), ECN(HVC64), ECN(SMC64), ECN(SYS64), ECN(SVE), \
-	ECN(IABT_CUR), ECN(PC_ALIGN), ECN(DABT_LOW), ECN(DABT_CUR), \
+	ECN(IMP_DEF), ECN(IABT_LOW), ECN(IABT_CUR), \
+	ECN(PC_ALIGN), ECN(DABT_LOW), ECN(DABT_CUR), \
 	ECN(SP_ALIGN), ECN(FP_EXC32), ECN(FP_EXC64), ECN(SERROR), \
 	ECN(BREAKPT_LOW), ECN(BREAKPT_CUR), ECN(SOFTSTP_LOW), \
 	ECN(SOFTSTP_CUR), ECN(WATCHPT_LOW), ECN(WATCHPT_CUR), \

arch/arm64/include/asm/memory.h+7−3

 #define __tag_reset(addr)	untagged_addr(addr)
 #define __tag_get(addr)		(__u8)((u64)(addr) >> 56)
 #else
-#define __tag_set(addr, tag)	(addr)
+static inline const void *__tag_set(const void *addr, u8 tag)
+{
+	return addr;
+}
 #define __tag_reset(addr)	(addr)
 #define __tag_get(addr)		0
 #endif
 #define page_to_virt(page)	({					\
 	unsigned long __addr =						\
 		((__page_to_voff(page)) | PAGE_OFFSET);			\
-	unsigned long __addr_tag =					\
+	const void *__addr_tag =					\
-		 __tag_set(__addr, page_kasan_tag(page));		\
+		__tag_set((void *)__addr, page_kasan_tag(page));	\
 	((void *)__addr_tag);						\
 })

arch/arm64/include/asm/pgtable.h+7−4

 static inline pte_t pte_mkdevmap(pte_t pte)
 {
-	return set_pte_bit(pte, __pgprot(PTE_DEVMAP));
+	return set_pte_bit(pte, __pgprot(PTE_DEVMAP | PTE_SPECIAL));
 }
 static inline void set_pte(pte_t *ptep, pte_t pte)
 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
 #define pmd_devmap(pmd)		pte_devmap(pmd_pte(pmd))
 #endif
-#define pmd_mkdevmap(pmd)	pte_pmd(pte_mkdevmap(pmd_pte(pmd)))
+static inline pmd_t pmd_mkdevmap(pmd_t pmd)
+{
+	return pte_pmd(set_pte_bit(pmd_pte(pmd), __pgprot(PTE_DEVMAP)));
+}
 #define __pmd_to_phys(pmd)	__pte_to_phys(pmd_pte(pmd))
 #define __phys_to_pmd_val(phys)	__phys_to_pte_val(phys)
 				 PMD_TYPE_SECT)
 #if defined(CONFIG_ARM64_64K_PAGES) || CONFIG_PGTABLE_LEVELS < 3
-#define pud_sect(pud)		(0)
+static inline bool pud_sect(pud_t pud) { return false; }
-#define pud_table(pud)		(1)
+static inline bool pud_table(pud_t pud) { return true; }
 #else
 #define pud_sect(pud)		((pud_val(pud) & PUD_TYPE_MASK) == \
 				 PUD_TYPE_SECT)

arch/arm64/include/asm/ptrace.h+1−1

@@ -30,7 +30,7 @@ · 29 unmodified lines
30	* in the the priority mask, it indicates that PSR.I should be set and	30	* in the the priority mask, it indicates that PSR.I should be set and
31	* interrupt disabling temporarily does not rely on IRQ priorities.	31	* interrupt disabling temporarily does not rely on IRQ priorities.
32	*/	32	*/
33	#define GIC_PRIO_IRQON 0xc0	33	#define GIC_PRIO_IRQON 0xe0
34	#define GIC_PRIO_IRQOFF (GIC_PRIO_IRQON & ~0x80)	34	#define GIC_PRIO_IRQOFF (GIC_PRIO_IRQON & ~0x80)
35	#define GIC_PRIO_PSR_I_SET (1 << 4)	35	#define GIC_PRIO_PSR_I_SET (1 << 4)
36		36

arch/arm64/include/asm/vdso/compat_gettimeofday.h+40−0

@@ -16,6 +16,8 @@ · 15 unmodified lines
16		16
17	#define VDSO_HAS_CLOCK_GETRES 1	17	#define VDSO_HAS_CLOCK_GETRES 1
18		18
		19	#define VDSO_HAS_32BIT_FALLBACK 1
		20
19	static __always_inline	21	static __always_inline
20	int gettimeofday_fallback(struct __kernel_old_timeval *_tv,	22	int gettimeofday_fallback(struct __kernel_old_timeval *_tv,
21	struct timezone *_tz)	23	struct timezone *_tz)
@@ -51,6 +53,23 @@ long clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 29 unmodified lines
51	return ret;	53	return ret;
52	}	54	}
53		55
		56	static __always_inline
		57	long clock_gettime32_fallback(clockid_t _clkid, struct old_timespec32 *_ts)
		58	{
		59	register struct old_timespec32 *ts asm("r1") = _ts;
		60	register clockid_t clkid asm("r0") = _clkid;
		61	register long ret asm ("r0");
		62	register long nr asm("r7") = __NR_compat_clock_gettime;
		63
		64	asm volatile(
		65	" swi #0\n"
		66	: "=r" (ret)
		67	: "r" (clkid), "r" (ts), "r" (nr)
		68	: "memory");
		69
		70	return ret;
		71	}
		72
54	static __always_inline	73	static __always_inline
55	int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)	74	int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)
56	{	75	{
@@ -72,6 +91,27 @@ int clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 15 unmodified lines
72	return ret;	91	return ret;
73	}	92	}
74		93
		94	static __always_inline
		95	int clock_getres32_fallback(clockid_t _clkid, struct old_timespec32 *_ts)
		96	{
		97	register struct old_timespec32 *ts asm("r1") = _ts;
		98	register clockid_t clkid asm("r0") = _clkid;
		99	register long ret asm ("r0");
		100	register long nr asm("r7") = __NR_compat_clock_getres;
		101
		102	/* The checks below are required for ABI consistency with arm */
		103	if ((_clkid >= MAX_CLOCKS) && (_ts == NULL))
		104	return -EINVAL;
		105
		106	asm volatile(
		107	" swi #0\n"
		108	: "=r" (ret)
		109	: "r" (clkid), "r" (ts), "r" (nr)
		110	: "memory");
		111
		112	return ret;
		113	}
		114
75	static __always_inline u64 __arch_get_hw_counter(s32 clock_mode)	115	static __always_inline u64 __arch_get_hw_counter(s32 clock_mode)
76	{	116	{
77	u64 res;	117	u64 res;

arch/arm64/kernel/cpufeature.c+6−2

 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, 31, 1, 1), /* RES1 */
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, CTR_DIC_SHIFT, 1, 1),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, CTR_IDC_SHIFT, 1, 1),
-	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_SAFE, CTR_CWG_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, CTR_CWG_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_SAFE, CTR_ERG_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_OR_ZERO_SAFE, CTR_ERG_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, CTR_DMINLINE_SHIFT, 4, 1),
 	/*
 	 * Linux can handle differing I-cache policies. Userspace JITs will
 	case FTR_LOWER_SAFE:
 		ret = new < cur ? new : cur;
 		break;
+	case FTR_HIGHER_OR_ZERO_SAFE:
+		if (!cur || !new)
+			break;
+		/* Fallthrough */
 	case FTR_HIGHER_SAFE:
 		ret = new > cur ? new : cur;
 		break;

arch/arm64/kernel/debug-monitors.c+8−6

@@ -207,16 +207,16 @@ static int call_step_hook(struct pt_regs *regs, unsigned int esr) · 206 unmodified lines
207		207
208	list = user_mode(regs) ? &user_step_hook : &kernel_step_hook;	208	list = user_mode(regs) ? &user_step_hook : &kernel_step_hook;
209		209
210	rcu_read_lock();	210	/*
211		211	* Since single-step exception disables interrupt, this function is
		212	* entirely not preemptible, and we can use rcu list safely here.
		213	*/
212	list_for_each_entry_rcu(hook, list, node) {	214	list_for_each_entry_rcu(hook, list, node) {
213	retval = hook->fn(regs, esr);	215	retval = hook->fn(regs, esr);
214	if (retval == DBG_HOOK_HANDLED)	216	if (retval == DBG_HOOK_HANDLED)
215	break;	217	break;
216	}	218	}
217		219
218	rcu_read_unlock();
219
220	return retval;	220	return retval;
221	}	221	}
222	NOKPROBE_SYMBOL(call_step_hook);	222	NOKPROBE_SYMBOL(call_step_hook);
@@ -305,14 +305,16 @@ static int call_break_hook(struct pt_regs *regs, unsigned int esr) · 82 unmodified lines
305		305
306	list = user_mode(regs) ? &user_break_hook : &kernel_break_hook;	306	list = user_mode(regs) ? &user_break_hook : &kernel_break_hook;
307		307
308	rcu_read_lock();	308	/*
		309	* Since brk exception disables interrupt, this function is
		310	* entirely not preemptible, and we can use rcu list safely here.
		311	*/
309	list_for_each_entry_rcu(hook, list, node) {	312	list_for_each_entry_rcu(hook, list, node) {
310	unsigned int comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;	313	unsigned int comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK;
311		314
312	if ((comment & ~hook->mask) == hook->imm)	315	if ((comment & ~hook->mask) == hook->imm)
313	fn = hook->fn;	316	fn = hook->fn;
314	}	317	}
315	rcu_read_unlock();
316		318
317	return fn ? fn(regs, esr) : DBG_HOOK_ERROR;	319	return fn ? fn(regs, esr) : DBG_HOOK_ERROR;
318	}	320	}

arch/arm64/kernel/hw_breakpoint.c+8−3

 			/* Aligned */
 			break;
 		case 1:
-			/* Allow single byte watchpoint. */
-			if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
-				break;
 		case 2:
 			/* Allow halfword watchpoints and breakpoints. */
 			if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
 				break;
+			/* Fallthrough */
+		case 3:
+			/* Allow single byte watchpoint. */
+			if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
+				break;
+			/* Fallthrough */
 		default:
 			return -EINVAL;
 		}

arch/arm64/kernel/module.c+4−0

 		/* MOVW instruction relocations. */
 		case R_AARCH64_MOVW_UABS_G0_NC:
 			overflow_check = false;
+			/* Fall through */
 		case R_AARCH64_MOVW_UABS_G0:
 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0,
 					      AARCH64_INSN_IMM_MOVKZ);
 			break;
 		case R_AARCH64_MOVW_UABS_G1_NC:
 			overflow_check = false;
+			/* Fall through */
 		case R_AARCH64_MOVW_UABS_G1:
 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16,
 					      AARCH64_INSN_IMM_MOVKZ);
 			break;
 		case R_AARCH64_MOVW_UABS_G2_NC:
 			overflow_check = false;
+			/* Fall through */
 		case R_AARCH64_MOVW_UABS_G2:
 			ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32,
 					      AARCH64_INSN_IMM_MOVKZ);
 			break;
 		case R_AARCH64_ADR_PREL_PG_HI21_NC:
 			overflow_check = false;
+			/* Fall through */
 		case R_AARCH64_ADR_PREL_PG_HI21:
 			ovf = reloc_insn_adrp(me, sechdrs, loc, val);
 			if (ovf && ovf != -ERANGE)

arch/arm64/kernel/probes/kprobes.c+6−34

 #include <asm/ptrace.h>
 #include <asm/cacheflush.h>
 #include <asm/debug-monitors.h>
+#include <asm/daifflags.h>
 #include <asm/system_misc.h>
 #include <asm/insn.h>
 #include <linux/uaccess.h>
 	__this_cpu_write(current_kprobe, p);
 }
-/*
- * When PSTATE.D is set (masked), then software step exceptions can not be
- * generated.
- * SPSR's D bit shows the value of PSTATE.D immediately before the
- * exception was taken. PSTATE.D is set while entering into any exception
- * mode, however software clears it for any normal (none-debug-exception)
- * mode in the exception entry. Therefore, when we are entering into kprobe
- * breakpoint handler from any normal mode then SPSR.D bit is already
- * cleared, however it is set when we are entering from any debug exception
- * mode.
- * Since we always need to generate single step exception after a kprobe
- * breakpoint exception therefore we need to clear it unconditionally, when
- * we become sure that the current breakpoint exception is for kprobe.
- */
-static void __kprobes
-spsr_set_debug_flag(struct pt_regs *regs, int mask)
-{
-	unsigned long spsr = regs->pstate;
-	if (mask)
-		spsr |= PSR_D_BIT;
-	else
-		spsr &= ~PSR_D_BIT;
-	regs->pstate = spsr;
-}
 /*
  * Interrupts need to be disabled before single-step mode is set, and not
  * reenabled until after single-step mode ends.
 static void __kprobes kprobes_save_local_irqflag(struct kprobe_ctlblk *kcb,
 						struct pt_regs *regs)
 {
-	kcb->saved_irqflag = regs->pstate;
+	kcb->saved_irqflag = regs->pstate & DAIF_MASK;
 	regs->pstate |= PSR_I_BIT;
+	/* Unmask PSTATE.D for enabling software step exceptions. */
+	regs->pstate &= ~PSR_D_BIT;
 }
 static void __kprobes kprobes_restore_local_irqflag(struct kprobe_ctlblk *kcb,
 						struct pt_regs *regs)
 {
-	if (kcb->saved_irqflag & PSR_I_BIT)
+	regs->pstate &= ~DAIF_MASK;
-		regs->pstate |= PSR_I_BIT;
+	regs->pstate |= kcb->saved_irqflag;
-	else
-		regs->pstate &= ~PSR_I_BIT;
 }
 static void __kprobes
 		set_ss_context(kcb, slot);	/* mark pending ss */
-		spsr_set_debug_flag(regs, 0);
 		/* IRQs and single stepping do not mix well. */
 		kprobes_save_local_irqflag(kcb, regs);
 		kernel_enable_single_step(regs);

arch/arm64/kernel/return_address.c+3−0

 #include <linux/export.h>
 #include <linux/ftrace.h>
+#include <linux/kprobes.h>
 #include <asm/stack_pointer.h>
 #include <asm/stacktrace.h>
 		return 0;
 	}
 }
+NOKPROBE_SYMBOL(save_return_addr);
 void *return_address(unsigned int level)
 {
 		return NULL;
 }
 EXPORT_SYMBOL_GPL(return_address);
+NOKPROBE_SYMBOL(return_address);

arch/arm64/kernel/smp.c+1−1

 				pr_crit("CPU%u: died during early boot\n", cpu);
 				break;
 			}
-			/* Fall through */
 			pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
+			/* Fall through */
 		case CPU_STUCK_IN_KERNEL:
 			pr_crit("CPU%u: is stuck in kernel\n", cpu);
 			if (status & CPU_STUCK_REASON_52_BIT_VA)

arch/arm64/kernel/stacktrace.c+3−0

 #include <linux/kernel.h>
 #include <linux/export.h>
 #include <linux/ftrace.h>
+#include <linux/kprobes.h>
 #include <linux/sched.h>
 #include <linux/sched/debug.h>
 #include <linux/sched/task_stack.h>
 	return 0;
 }
+NOKPROBE_SYMBOL(unwind_frame);
 void notrace walk_stackframe(struct task_struct *tsk, struct stackframe *frame,
 		     int (*fn)(struct stackframe *, void *), void *data)
 			break;
 	}
 }
+NOKPROBE_SYMBOL(walk_stackframe);
 #ifdef CONFIG_STACKTRACE
 struct stack_trace_data {

arch/arm64/kernel/traps.c+1−0

@@ -733,6 +733,7 @@ static const char *esr_class_str[] = { · 732 unmodified lines
733	[ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",	733	[ESR_ELx_EC_CP14_LS] = "CP14 LDC/STC",
734	[ESR_ELx_EC_FP_ASIMD] = "ASIMD",	734	[ESR_ELx_EC_FP_ASIMD] = "ASIMD",
735	[ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",	735	[ESR_ELx_EC_CP10_ID] = "CP10 MRC/VMRS",
		736	[ESR_ELx_EC_PAC] = "PAC",
736	[ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",	737	[ESR_ELx_EC_CP14_64] = "CP14 MCRR/MRRC",
737	[ESR_ELx_EC_ILL] = "PSTATE.IL",	738	[ESR_ELx_EC_ILL] = "PSTATE.IL",
738	[ESR_ELx_EC_SVC32] = "SVC (AArch32)",	739	[ESR_ELx_EC_SVC32] = "SVC (AArch32)",

arch/arm64/kvm/hyp/debug-sr.c+30−0

 #define save_debug(ptr,reg,nr)						\
 	switch (nr) {							\
 	case 15:	ptr[15] = read_debug(reg, 15);			\
+			/* Fall through */				\
 	case 14:	ptr[14] = read_debug(reg, 14);			\
+			/* Fall through */				\
 	case 13:	ptr[13] = read_debug(reg, 13);			\
+			/* Fall through */				\
 	case 12:	ptr[12] = read_debug(reg, 12);			\
+			/* Fall through */				\
 	case 11:	ptr[11] = read_debug(reg, 11);			\
+			/* Fall through */				\
 	case 10:	ptr[10] = read_debug(reg, 10);			\
+			/* Fall through */				\
 	case 9:		ptr[9] = read_debug(reg, 9);			\
+			/* Fall through */				\
 	case 8:		ptr[8] = read_debug(reg, 8);			\
+			/* Fall through */				\
 	case 7:		ptr[7] = read_debug(reg, 7);			\
+			/* Fall through */				\
 	case 6:		ptr[6] = read_debug(reg, 6);			\
+			/* Fall through */				\
 	case 5:		ptr[5] = read_debug(reg, 5);			\
+			/* Fall through */				\
 	case 4:		ptr[4] = read_debug(reg, 4);			\
+			/* Fall through */				\
 	case 3:		ptr[3] = read_debug(reg, 3);			\
+			/* Fall through */				\
 	case 2:		ptr[2] = read_debug(reg, 2);			\
+			/* Fall through */				\
 	case 1:		ptr[1] = read_debug(reg, 1);			\
+			/* Fall through */				\
 	default:	ptr[0] = read_debug(reg, 0);			\
 	}
 #define restore_debug(ptr,reg,nr)					\
 	switch (nr) {							\
 	case 15:	write_debug(ptr[15], reg, 15);			\
+			/* Fall through */				\
 	case 14:	write_debug(ptr[14], reg, 14);			\
+			/* Fall through */				\
 	case 13:	write_debug(ptr[13], reg, 13);			\
+			/* Fall through */				\
 	case 12:	write_debug(ptr[12], reg, 12);			\
+			/* Fall through */				\
 	case 11:	write_debug(ptr[11], reg, 11);			\
+			/* Fall through */				\
 	case 10:	write_debug(ptr[10], reg, 10);			\
+			/* Fall through */				\
 	case 9:		write_debug(ptr[9], reg, 9);			\
+			/* Fall through */				\
 	case 8:		write_debug(ptr[8], reg, 8);			\
+			/* Fall through */				\
 	case 7:		write_debug(ptr[7], reg, 7);			\
+			/* Fall through */				\
 	case 6:		write_debug(ptr[6], reg, 6);			\
+			/* Fall through */				\
 	case 5:		write_debug(ptr[5], reg, 5);			\
+			/* Fall through */				\
 	case 4:		write_debug(ptr[4], reg, 4);			\
+			/* Fall through */				\
 	case 3:		write_debug(ptr[3], reg, 3);			\
+			/* Fall through */				\
 	case 2:		write_debug(ptr[2], reg, 2);			\
+			/* Fall through */				\
 	case 1:		write_debug(ptr[1], reg, 1);			\
+			/* Fall through */				\
 	default:	write_debug(ptr[0], reg, 0);			\
 	}

arch/arm64/kvm/regmap.c+5−0

 	switch (spsr_idx) {
 	case KVM_SPSR_SVC:
 		write_sysreg_el1(v, SYS_SPSR);
+		break;
 	case KVM_SPSR_ABT:
 		write_sysreg(v, spsr_abt);
+		break;
 	case KVM_SPSR_UND:
 		write_sysreg(v, spsr_und);
+		break;
 	case KVM_SPSR_IRQ:
 		write_sysreg(v, spsr_irq);
+		break;
 	case KVM_SPSR_FIQ:
 		write_sysreg(v, spsr_fiq);
+		break;
 	}
 }

arch/arm64/kvm/sys_regs.c+18−14

@@ -632,7 +632,7 @@ static void reset_pmcr(struct kvm_vcpu vcpu, const struct sys_reg_desc r) · 631 unmodified lines
632	*/	632	*/
633	val = ((pmcr & ~ARMV8_PMU_PMCR_MASK)	633	val = ((pmcr & ~ARMV8_PMU_PMCR_MASK)
634	\| (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E);	634	\| (ARMV8_PMU_PMCR_MASK & 0xdecafbad)) & (~ARMV8_PMU_PMCR_E);
635	__vcpu_sys_reg(vcpu, PMCR_EL0) = val;	635	__vcpu_sys_reg(vcpu, r->reg) = val;
636	}	636	}
637		637
638	static bool check_pmu_access_disabled(struct kvm_vcpu *vcpu, u64 flags)	638	static bool check_pmu_access_disabled(struct kvm_vcpu *vcpu, u64 flags)
@@ -981,13 +981,13 @@ static bool access_pmuserenr(struct kvm_vcpu vcpu, struct sys_reg_params p, · 342 unmodified lines
981	/* Silly macro to expand the DBG{BCR,BVR,WVR,WCR}n_EL1 registers in one go */	981	/* Silly macro to expand the DBG{BCR,BVR,WVR,WCR}n_EL1 registers in one go */
982	#define DBG_BCR_BVR_WCR_WVR_EL1(n) \	982	#define DBG_BCR_BVR_WCR_WVR_EL1(n) \
983	{ SYS_DESC(SYS_DBGBVRn_EL1(n)), \	983	{ SYS_DESC(SYS_DBGBVRn_EL1(n)), \
984	trap_bvr, reset_bvr, n, 0, get_bvr, set_bvr }, \	984	trap_bvr, reset_bvr, 0, 0, get_bvr, set_bvr }, \
985	{ SYS_DESC(SYS_DBGBCRn_EL1(n)), \	985	{ SYS_DESC(SYS_DBGBCRn_EL1(n)), \
986	trap_bcr, reset_bcr, n, 0, get_bcr, set_bcr }, \	986	trap_bcr, reset_bcr, 0, 0, get_bcr, set_bcr }, \
987	{ SYS_DESC(SYS_DBGWVRn_EL1(n)), \	987	{ SYS_DESC(SYS_DBGWVRn_EL1(n)), \
988	trap_wvr, reset_wvr, n, 0, get_wvr, set_wvr }, \	988	trap_wvr, reset_wvr, 0, 0, get_wvr, set_wvr }, \
989	{ SYS_DESC(SYS_DBGWCRn_EL1(n)), \	989	{ SYS_DESC(SYS_DBGWCRn_EL1(n)), \
990	trap_wcr, reset_wcr, n, 0, get_wcr, set_wcr }	990	trap_wcr, reset_wcr, 0, 0, get_wcr, set_wcr }
991		991
992	/* Macro to expand the PMEVCNTRn_EL0 register */	992	/* Macro to expand the PMEVCNTRn_EL0 register */
993	#define PMU_PMEVCNTR_EL0(n) \	993	#define PMU_PMEVCNTR_EL0(n) \
@@ -1540,7 +1540,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { · 546 unmodified lines
1540	{ SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 },	1540	{ SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 },
1541	{ SYS_DESC(SYS_CTR_EL0), access_ctr },	1541	{ SYS_DESC(SYS_CTR_EL0), access_ctr },
1542		1542
1543	{ SYS_DESC(SYS_PMCR_EL0), access_pmcr, reset_pmcr, },	1543	{ SYS_DESC(SYS_PMCR_EL0), access_pmcr, reset_pmcr, PMCR_EL0 },
1544	{ SYS_DESC(SYS_PMCNTENSET_EL0), access_pmcnten, reset_unknown, PMCNTENSET_EL0 },	1544	{ SYS_DESC(SYS_PMCNTENSET_EL0), access_pmcnten, reset_unknown, PMCNTENSET_EL0 },
1545	{ SYS_DESC(SYS_PMCNTENCLR_EL0), access_pmcnten, NULL, PMCNTENSET_EL0 },	1545	{ SYS_DESC(SYS_PMCNTENCLR_EL0), access_pmcnten, NULL, PMCNTENSET_EL0 },
1546	{ SYS_DESC(SYS_PMOVSCLR_EL0), access_pmovs, NULL, PMOVSSET_EL0 },	1546	{ SYS_DESC(SYS_PMOVSCLR_EL0), access_pmovs, NULL, PMOVSSET_EL0 },
@@ -2254,13 +2254,19 @@ static int emulate_sys_reg(struct kvm_vcpu *vcpu, · 707 unmodified lines
2254	}	2254	}
2255		2255
2256	static void reset_sys_reg_descs(struct kvm_vcpu *vcpu,	2256	static void reset_sys_reg_descs(struct kvm_vcpu *vcpu,
2257	const struct sys_reg_desc *table, size_t num)	2257	const struct sys_reg_desc *table, size_t num,
		2258	unsigned long *bmap)
2258	{	2259	{
2259	unsigned long i;	2260	unsigned long i;
2260		2261
2261	for (i = 0; i < num; i++)	2262	for (i = 0; i < num; i++)
2262	if (table[i].reset)	2263	if (table[i].reset) {
		2264	int reg = table[i].reg;
		2265
2263	table[i].reset(vcpu, &table[i]);	2266	table[i].reset(vcpu, &table[i]);
		2267	if (reg > 0 && reg < NR_SYS_REGS)
		2268	set_bit(reg, bmap);
		2269	}
2264	}	2270	}
2265		2271
2266	/**	2272	/**
@@ -2774,18 +2780,16 @@ void kvm_reset_sys_regs(struct kvm_vcpu *vcpu) · 507 unmodified lines
2774	{	2780	{
2775	size_t num;	2781	size_t num;
2776	const struct sys_reg_desc *table;	2782	const struct sys_reg_desc *table;
2777		2783	DECLARE_BITMAP(bmap, NR_SYS_REGS) = { 0, };
2778	/* Catch someone adding a register without putting in reset entry. */
2779	memset(&vcpu->arch.ctxt.sys_regs, 0x42, sizeof(vcpu->arch.ctxt.sys_regs));
2780		2784
2781	/* Generic chip reset first (so target could override). */	2785	/* Generic chip reset first (so target could override). */
2782	reset_sys_reg_descs(vcpu, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));	2786	reset_sys_reg_descs(vcpu, sys_reg_descs, ARRAY_SIZE(sys_reg_descs), bmap);
2783		2787
2784	table = get_target_table(vcpu->arch.target, true, &num);	2788	table = get_target_table(vcpu->arch.target, true, &num);
2785	reset_sys_reg_descs(vcpu, table, num);	2789	reset_sys_reg_descs(vcpu, table, num, bmap);
2786		2790
2787	for (num = 1; num < NR_SYS_REGS; num++) {	2791	for (num = 1; num < NR_SYS_REGS; num++) {
2788	if (WARN(__vcpu_sys_reg(vcpu, num) == 0x4242424242424242,	2792	if (WARN(!test_bit(num, bmap),
2789	"Didn't reset __vcpu_sys_reg(%zi)\n", num))	2793	"Didn't reset __vcpu_sys_reg(%zi)\n", num))
2790	break;	2794	break;
2791	}	2795	}

arch/arm64/mm/fault.c+49−8

@@ -777,6 +777,53 @@ void __init hook_debug_fault_code(int nr, · 776 unmodified lines
777	debug_fault_info[nr].name = name;	777	debug_fault_info[nr].name = name;
778	}	778	}
779		779
		780	/*
		781	* In debug exception context, we explicitly disable preemption despite
		782	* having interrupts disabled.
		783	* This serves two purposes: it makes it much less likely that we would
		784	* accidentally schedule in exception context and it will force a warning
		785	* if we somehow manage to schedule by accident.
		786	*/
		787	static void debug_exception_enter(struct pt_regs *regs)
		788	{
		789	/*
		790	* Tell lockdep we disabled irqs in entry.S. Do nothing if they were
		791	* already disabled to preserve the last enabled/disabled addresses.
		792	*/
		793	if (interrupts_enabled(regs))
		794	trace_hardirqs_off();
		795
		796	if (user_mode(regs)) {
		797	RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
		798	} else {
		799	/*
		800	* We might have interrupted pretty much anything. In
		801	* fact, if we're a debug exception, we can even interrupt
		802	* NMI processing. We don't want this code makes in_nmi()
		803	* to return true, but we need to notify RCU.
		804	*/
		805	rcu_nmi_enter();
		806	}
		807
		808	preempt_disable();
		809
		810	/* This code is a bit fragile. Test it. */
		811	RCU_LOCKDEP_WARN(!rcu_is_watching(), "exception_enter didn't work");
		812	}
		813	NOKPROBE_SYMBOL(debug_exception_enter);
		814
		815	static void debug_exception_exit(struct pt_regs *regs)
		816	{
		817	preempt_enable_no_resched();
		818
		819	if (!user_mode(regs))
		820	rcu_nmi_exit();
		821
		822	if (interrupts_enabled(regs))
		823	trace_hardirqs_on();
		824	}
		825	NOKPROBE_SYMBOL(debug_exception_exit);
		826
780	#ifdef CONFIG_ARM64_ERRATUM_1463225	827	#ifdef CONFIG_ARM64_ERRATUM_1463225
781	DECLARE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa);	828	DECLARE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa);
782		829
@@ -817,12 +864,7 @@ asmlinkage void __exception do_debug_exception(unsigned long addr_if_watchpoint, · 34 unmodified lines
817	if (cortex_a76_erratum_1463225_debug_handler(regs))	864	if (cortex_a76_erratum_1463225_debug_handler(regs))
818	return;	865	return;
819		866
820	/*	867	debug_exception_enter(regs);
821	* Tell lockdep we disabled irqs in entry.S. Do nothing if they were
822	* already disabled to preserve the last enabled/disabled addresses.
823	*/
824	if (interrupts_enabled(regs))
825	trace_hardirqs_off();
826		868
827	if (user_mode(regs) && !is_ttbr0_addr(pc))	869	if (user_mode(regs) && !is_ttbr0_addr(pc))
828	arm64_apply_bp_hardening();	870	arm64_apply_bp_hardening();
@@ -832,7 +874,6 @@ asmlinkage void __exception do_debug_exception(unsigned long addr_if_watchpoint, · 3 unmodified lines
832	inf->sig, inf->code, (void __user *)pc, esr);	874	inf->sig, inf->code, (void __user *)pc, esr);
833	}	875	}
834		876
835	if (interrupts_enabled(regs))	877	debug_exception_exit(regs);
836	trace_hardirqs_on();
837	}	878	}
838	NOKPROBE_SYMBOL(do_debug_exception);	879	NOKPROBE_SYMBOL(do_debug_exception);

arch/mips/cavium-octeon/octeon-usb.c+1−0

@@ -398,6 +398,7 @@ static int dwc3_octeon_clocks_start(struct device *dev, u64 base) · 397 unmodified lines
398	default:	398	default:
399	dev_err(dev, "Invalid ref_clk %u, using 100000000 instead\n",	399	dev_err(dev, "Invalid ref_clk %u, using 100000000 instead\n",
400	clock_rate);	400	clock_rate);
		401	/* fall through */
401	case 100000000:	402	case 100000000:
402	mpll_mul = 0x19;	403	mpll_mul = 0x19;
403	if (ref_clk_sel < 2)	404	if (ref_clk_sel < 2)

arch/mips/kernel/cacheinfo.c+2−0

@@ -69,6 +69,8 @@ static int __populate_cache_leaves(unsigned int cpu) · 68 unmodified lines
69	if (c->tcache.waysize)	69	if (c->tcache.waysize)
70	populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED);	70	populate_cache(tcache, this_leaf, 3, CACHE_TYPE_UNIFIED);
71		71
		72	this_cpu_ci->cpu_map_populated = true;
		73
72	return 0;	74	return 0;
73	}	75	}
74		76

arch/mips/kernel/i8253.c+2−1

@@ -32,7 +32,8 @@ void __init setup_pit_timer(void) · 31 unmodified lines
32		32
33	static int __init init_pit_clocksource(void)	33	static int __init init_pit_clocksource(void)
34	{	34	{
35	if (num_possible_cpus() > 1) /* PIT does not scale! */	35	if (num_possible_cpus() > 1 \|\| /* PIT does not scale! */
		36	!clockevent_state_periodic(&i8253_clockevent))
36	return 0;	37	return 0;
37		38
38	return clocksource_i8253_init();	39	return clocksource_i8253_init();

arch/mips/kvm/emulate.c+1−0

@@ -140,6 +140,7 @@ static int kvm_compute_return_epc(struct kvm_vcpu *vcpu, unsigned long instpc, · 139 unmodified lines
140	/* These are unconditional and in j_format. */	140	/* These are unconditional and in j_format. */
141	case jal_op:	141	case jal_op:
142	arch->gprs[31] = instpc + 8;	142	arch->gprs[31] = instpc + 8;
		143	/* fall through */
143	case j_op:	144	case j_op:
144	epc += 4;	145	epc += 4;
145	epc >>= 28;	146	epc >>= 28;

arch/mips/kvm/mips.c+0−10

@@ -150,16 +150,6 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) · 149 unmodified lines
150	return 0;	150	return 0;
151	}	151	}
152		152
153	bool kvm_arch_has_vcpu_debugfs(void)
154	{
155	return false;
156	}
157
158	int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu)
159	{
160	return 0;
161	}
162
163	void kvm_mips_free_vcpus(struct kvm *kvm)	153	void kvm_mips_free_vcpus(struct kvm *kvm)
164	{	154	{
165	unsigned int i;	155	unsigned int i;

arch/mips/oprofile/op_model_mipsxx.c+13−0

 	case 4:
 		w_c0_perfctrl3(0);
 		w_c0_perfcntr3(reg.counter[3]);
+		/* fall through */
 	case 3:
 		w_c0_perfctrl2(0);
 		w_c0_perfcntr2(reg.counter[2]);
+		/* fall through */
 	case 2:
 		w_c0_perfctrl1(0);
 		w_c0_perfcntr1(reg.counter[1]);
+		/* fall through */
 	case 1:
 		w_c0_perfctrl0(0);
 		w_c0_perfcntr0(reg.counter[0]);
 	switch (counters) {
 	case 4:
 		w_c0_perfctrl3(WHAT | reg.control[3]);
+		/* fall through */
 	case 3:
 		w_c0_perfctrl2(WHAT | reg.control[2]);
+		/* fall through */
 	case 2:
 		w_c0_perfctrl1(WHAT | reg.control[1]);
+		/* fall through */
 	case 1:
 		w_c0_perfctrl0(WHAT | reg.control[0]);
 	}
 	switch (counters) {
 	case 4:
 		w_c0_perfctrl3(0);
+		/* fall through */
 	case 3:
 		w_c0_perfctrl2(0);
+		/* fall through */
 	case 2:
 		w_c0_perfctrl1(0);
+		/* fall through */
 	case 1:
 		w_c0_perfctrl0(0);
 	}
 	switch (counters) {
 #define HANDLE_COUNTER(n)						\
+	/* fall through */						\
 	case n + 1:							\
 		control = r_c0_perfctrl ## n();				\
 		counter = r_c0_perfcntr ## n();				\
 	case 4:
 		w_c0_perfctrl3(0);
 		w_c0_perfcntr3(0);
+		/* fall through */
 	case 3:
 		w_c0_perfctrl2(0);
 		w_c0_perfcntr2(0);
+		/* fall through */
 	case 2:
 		w_c0_perfctrl1(0);
 		w_c0_perfcntr1(0);
+		/* fall through */
 	case 1:
 		w_c0_perfctrl0(0);
 		w_c0_perfcntr0(0);

arch/mips/pci/ops-bcm63xx.c+1−0

@@ -474,6 +474,7 @@ static int bcm63xx_pcie_can_access(struct pci_bus *bus, int devfn) · 473 unmodified lines
474	if (PCI_SLOT(devfn) == 0)	474	if (PCI_SLOT(devfn) == 0)
475	return bcm_pcie_readl(PCIE_DLSTATUS_REG)	475	return bcm_pcie_readl(PCIE_DLSTATUS_REG)
476	& DLSTATUS_PHYLINKUP;	476	& DLSTATUS_PHYLINKUP;
		477	/* else, fall through */
477	default:	478	default:
478	return false;	479	return false;
479	}	480	}

arch/mips/vdso/vdso.h+1−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	#if _MIPS_SIM != _MIPS_SIM_ABI64 && defined(CONFIG_64BIT)	9	#if _MIPS_SIM != _MIPS_SIM_ABI64 && defined(CONFIG_64BIT)
10		10
11	/* Building 32-bit VDSO for the 64-bit kernel. Fake a 32-bit Kconfig. */	11	/* Building 32-bit VDSO for the 64-bit kernel. Fake a 32-bit Kconfig. */
		12	#define BUILD_VDSO32_64
12	#undef CONFIG_64BIT	13	#undef CONFIG_64BIT
13	#define CONFIG_32BIT 1	14	#define CONFIG_32BIT 1
14	#ifndef __ASSEMBLY__	15	#ifndef __ASSEMBLY__

arch/parisc/Makefile+3−2

 KBUILD_IMAGE := vmlinuz
-KBUILD_DEFCONFIG := default_defconfig
 NM		= sh $(srctree)/arch/parisc/nm
 CHECKFLAGS	+= -D__hppa__=1
 LIBGCC		= $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
 	@echo  '  zinstall	- Install compressed vmlinuz kernel'
 endef
+archclean:
+	$(Q)$(MAKE) $(clean)=$(boot)
 archheaders:
 	$(Q)$(MAKE) $(build)=arch/parisc/kernel/syscalls all

arch/parisc/boot/compressed/Makefile+3−1

 targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2
 targets += vmlinux.bin.xz vmlinux.bin.lzma vmlinux.bin.lzo vmlinux.bin.lz4
 targets += misc.o piggy.o sizes.h head.o real2.o firmware.o
+targets += real2.S firmware.c
 KBUILD_CFLAGS := -D__KERNEL__ -O2 -DBOOTLOADER
 KBUILD_CFLAGS += -DDISABLE_BRANCH_PROFILING
 CPPFLAGS_vmlinux.lds += -I$(objtree)/$(obj) -DBOOTLOADER
 $(obj)/vmlinux.lds: $(obj)/sizes.h
-$(obj)/vmlinux.bin: vmlinux
+OBJCOPYFLAGS_vmlinux.bin := -R .comment -R .note -S
+$(obj)/vmlinux.bin: vmlinux FORCE
 	$(call if_changed,objcopy)
 vmlinux.bin.all-y := $(obj)/vmlinux.bin

arch/parisc/boot/compressed/vmlinux.lds.S+2−2

@@ -48,8 +48,8 @@ SECTIONS · 47 unmodified lines
48	*(.rodata.compressed)	48	*(.rodata.compressed)
49	}	49	}
50		50
51	/* bootloader code and data starts behind area of extracted kernel */	51	/* bootloader code and data starts at least behind area of extracted kernel */
52	. = (SZ_end - SZparisc_kernel_start + KERNEL_BINARY_TEXT_START);	52	. = MAX(ABSOLUTE(.), (SZ_end - SZparisc_kernel_start + KERNEL_BINARY_TEXT_START));
53		53
54	/* align on next page boundary */	54	/* align on next page boundary */
55	. = ALIGN(4096);	55	. = ALIGN(4096);

arch/parisc/configs/defconfigrenamed from arch/parisc/configs/default_defconfig+0−0

File renamed without changes.

arch/parisc/kernel/ftrace.c+2−1

 	for (i = 0; i < ARRAY_SIZE(insn); i++)
 		insn[i] = INSN_NOP;
+	__patch_text((void *)rec->ip, INSN_NOP);
 	__patch_text_multiple((void *)rec->ip + 4 - sizeof(insn),
-			      insn, sizeof(insn));
+			      insn, sizeof(insn)-4);
 	return 0;
 }
 #endif

arch/parisc/math-emu/Makefile+1−0

@@ -18,3 +18,4 @@ obj-y := frnd.o driver.o decode_exc.o fpudispatch.o denormal.o \ · 17 unmodified lines
18	# other very old or stripped-down PA-RISC CPUs -- not currently supported	18	# other very old or stripped-down PA-RISC CPUs -- not currently supported
19		19
20	obj-$(CONFIG_MATH_EMULATION) += unimplemented-math-emulation.o	20	obj-$(CONFIG_MATH_EMULATION) += unimplemented-math-emulation.o
		21	CFLAGS_REMOVE_fpudispatch.o = -Wimplicit-fallthrough

arch/parisc/mm/fault.c+1−0

@@ -66,6 +66,7 @@ parisc_acctyp(unsigned long code, unsigned int inst) · 65 unmodified lines
66	case 0x30000000: /* coproc2 */	66	case 0x30000000: /* coproc2 */
67	if (bit22set(inst))	67	if (bit22set(inst))
68	return VM_WRITE;	68	return VM_WRITE;
		69	/* fall through */
69		70
70	case 0x0: /* indexed/memory management */	71	case 0x0: /* indexed/memory management */
71	if (bit22set(inst)) {	72	if (bit22set(inst)) {

arch/powerpc/include/asm/cache.h+4−4

@@ -107,22 +107,22 @@ extern void _set_L3CR(unsigned long); · 106 unmodified lines
107		107
108	static inline void dcbz(void *addr)	108	static inline void dcbz(void *addr)
109	{	109	{
110	__asm__ __volatile__ ("dcbz %y0" : : "Z"((u8 )addr) : "memory");	110	__asm__ __volatile__ ("dcbz 0, %0" : : "r"(addr) : "memory");
111	}	111	}
112		112
113	static inline void dcbi(void *addr)	113	static inline void dcbi(void *addr)
114	{	114	{
115	__asm__ __volatile__ ("dcbi %y0" : : "Z"((u8 )addr) : "memory");	115	__asm__ __volatile__ ("dcbi 0, %0" : : "r"(addr) : "memory");
116	}	116	}
117		117
118	static inline void dcbf(void *addr)	118	static inline void dcbf(void *addr)
119	{	119	{
120	__asm__ __volatile__ ("dcbf %y0" : : "Z"((u8 )addr) : "memory");	120	__asm__ __volatile__ ("dcbf 0, %0" : : "r"(addr) : "memory");
121	}	121	}
122		122
123	static inline void dcbst(void *addr)	123	static inline void dcbst(void *addr)
124	{	124	{
125	__asm__ __volatile__ ("dcbst %y0" : : "Z"((u8 )addr) : "memory");	125	__asm__ __volatile__ ("dcbst 0, %0" : : "r"(addr) : "memory");
126	}	126	}
127	#endif /* !__ASSEMBLY__ */	127	#endif /* !__ASSEMBLY__ */
128	#endif /* __KERNEL__ */	128	#endif /* __KERNEL__ */

arch/powerpc/include/asm/unistd.h+1−0

@@ -49,6 +49,7 @@ · 48 unmodified lines
49	#define __ARCH_WANT_SYS_FORK	49	#define __ARCH_WANT_SYS_FORK
50	#define __ARCH_WANT_SYS_VFORK	50	#define __ARCH_WANT_SYS_VFORK
51	#define __ARCH_WANT_SYS_CLONE	51	#define __ARCH_WANT_SYS_CLONE
		52	#define __ARCH_WANT_SYS_CLONE3
52		53
53	#endif /* __ASSEMBLY__ */	54	#endif /* __ASSEMBLY__ */
54	#endif /* _ASM_POWERPC_UNISTD_H_ */	55	#endif /* _ASM_POWERPC_UNISTD_H_ */

arch/powerpc/kernel/align.c+4−0

 			ret |= __get_user_inatomic(temp.v[1], p++);
 			ret |= __get_user_inatomic(temp.v[2], p++);
 			ret |= __get_user_inatomic(temp.v[3], p++);
+			/* fall through */
 		case 4:
 			ret |= __get_user_inatomic(temp.v[4], p++);
 			ret |= __get_user_inatomic(temp.v[5], p++);
+			/* fall through */
 		case 2:
 			ret |= __get_user_inatomic(temp.v[6], p++);
 			ret |= __get_user_inatomic(temp.v[7], p++);
 			ret |= __put_user_inatomic(data.v[1], p++);
 			ret |= __put_user_inatomic(data.v[2], p++);
 			ret |= __put_user_inatomic(data.v[3], p++);
+			/* fall through */
 		case 4:
 			ret |= __put_user_inatomic(data.v[4], p++);
 			ret |= __put_user_inatomic(data.v[5], p++);
+			/* fall through */
 		case 2:
 			ret |= __put_user_inatomic(data.v[6], p++);
 			ret |= __put_user_inatomic(data.v[7], p++);

arch/powerpc/kernel/entry_32.S+8−0

@@ -597,6 +597,14 @@ ppc_clone: · 596 unmodified lines
597	stw r0,_TRAP(r1) /* register set saved */	597	stw r0,_TRAP(r1) /* register set saved */
598	b sys_clone	598	b sys_clone
599		599
		600	.globl ppc_clone3
		601	ppc_clone3:
		602	SAVE_NVGPRS(r1)
		603	lwz r0,_TRAP(r1)
		604	rlwinm r0,r0,0,0,30 /* clear LSB to indicate full */
		605	stw r0,_TRAP(r1) /* register set saved */
		606	b sys_clone3
		607
600	.globl ppc_swapcontext	608	.globl ppc_swapcontext
601	ppc_swapcontext:	609	ppc_swapcontext:
602	SAVE_NVGPRS(r1)	610	SAVE_NVGPRS(r1)

arch/powerpc/kernel/entry_64.S+5−0

 	bl	sys_clone
 	b	.Lsyscall_exit
+_GLOBAL(ppc_clone3)
+       bl      save_nvgprs
+       bl      sys_clone3
+       b       .Lsyscall_exit
 _GLOBAL(ppc32_swapcontext)
 	bl	save_nvgprs
 	bl	compat_sys_swapcontext

arch/powerpc/kernel/syscalls/syscall.tbl+1−1

@@ -516,4 +516,4 @@ · 515 unmodified lines
516	432 common fsmount sys_fsmount	516	432 common fsmount sys_fsmount
517	433 common fspick sys_fspick	517	433 common fspick sys_fspick
518	434 common pidfd_open sys_pidfd_open	518	434 common pidfd_open sys_pidfd_open
519	# 435 reserved for clone3	519	435 nospu clone3 ppc_clone3

arch/powerpc/kvm/book3s_32_mmu.c+1−0

@@ -239,6 +239,7 @@ static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr, · 238 unmodified lines
239	case 2:	239	case 2:
240	case 6:	240	case 6:
241	pte->may_write = true;	241	pte->may_write = true;
		242	/* fall through */
242	case 3:	243	case 3:
243	case 5:	244	case 5:
244	case 7:	245	case 7:

arch/powerpc/kvm/powerpc.c+5−10

 	return !!(v->arch.pending_exceptions) || kvm_request_pending(v);
 }
+bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
+{
+	return kvm_arch_vcpu_runnable(vcpu);
+}
 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
 {
 	return false;
 	return -EINVAL;
 }
-bool kvm_arch_has_vcpu_debugfs(void)
-{
-	return false;
-}
-int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu)
-{
-	return 0;
-}
 void kvm_arch_destroy_vm(struct kvm *kvm)
 {
 	unsigned int i;

arch/powerpc/mm/kasan/kasan_init_32.c+5−2

 		__set_pte_at(&init_mm, va, ptep, pfn_pte(PHYS_PFN(pa), prot), 0);
 }
-static int kasan_init_shadow_page_tables(unsigned long k_start, unsigned long k_end)
+static int __ref kasan_init_shadow_page_tables(unsigned long k_start, unsigned long k_end)
 {
 	pmd_t *pmd;
 	unsigned long k_cur, k_next;
 		if ((void *)pmd_page_vaddr(*pmd) != kasan_early_shadow_pte)
 			continue;
-		new = pte_alloc_one_kernel(&init_mm);
+		if (slab_is_available())
+			new = pte_alloc_one_kernel(&init_mm);
+		else
+			new = memblock_alloc(PTE_FRAG_SIZE, PTE_FRAG_SIZE);
 		if (!new)
 			return -ENOMEM;

arch/powerpc/platforms/pseries/papr_scm.c+27−2

 	NULL,
 };
+static inline int papr_scm_node(int node)
+{
+	int min_dist = INT_MAX, dist;
+	int nid, min_node;
+	if ((node == NUMA_NO_NODE) || node_online(node))
+		return node;
+	min_node = first_online_node;
+	for_each_online_node(nid) {
+		dist = node_distance(node, nid);
+		if (dist < min_dist) {
+			min_dist = dist;
+			min_node = nid;
+		}
+	}
+	return min_node;
+}
 static int papr_scm_nvdimm_init(struct papr_scm_priv *p)
 {
 	struct device *dev = &p->pdev->dev;
 	struct nd_mapping_desc mapping;
 	struct nd_region_desc ndr_desc;
 	unsigned long dimm_flags;
+	int target_nid, online_nid;
 	p->bus_desc.ndctl = papr_scm_ndctl;
 	p->bus_desc.module = THIS_MODULE;
 	memset(&ndr_desc, 0, sizeof(ndr_desc));
 	ndr_desc.attr_groups = region_attr_groups;
-	ndr_desc.numa_node = dev_to_node(&p->pdev->dev);
+	target_nid = dev_to_node(&p->pdev->dev);
-	ndr_desc.target_node = ndr_desc.numa_node;
+	online_nid = papr_scm_node(target_nid);
+	ndr_desc.numa_node = online_nid;
+	ndr_desc.target_node = target_nid;
 	ndr_desc.res = &p->res;
 	ndr_desc.of_node = p->dn;
 	ndr_desc.provider_data = p;
 				ndr_desc.res, p->dn);
 		goto err;
 	}
+	if (target_nid != online_nid)
+		dev_info(dev, "Region registered with target node %d and online node %d",
+			 target_nid, online_nid);
 	return 0;

arch/riscv/boot/dts/sifive/fu540-c000.dtsi+0−1

@@ -21,7 +21,6 @@ · 20 unmodified lines
21	cpus {	21	cpus {
22	#address-cells = <1>;	22	#address-cells = <1>;
23	#size-cells = <0>;	23	#size-cells = <0>;
24	timebase-frequency = <1000000>;
25	cpu0: cpu@0 {	24	cpu0: cpu@0 {
26	compatible = "sifive,e51", "sifive,rocket0", "riscv";	25	compatible = "sifive,e51", "sifive,rocket0", "riscv";
27	device_type = "cpu";	26	device_type = "cpu";

arch/riscv/configs/defconfig+5−5

 CONFIG_PCI_HOST_GENERIC=y
 CONFIG_PCIE_XILINX=y
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
 CONFIG_HVC_RISCV_SBI=y
+CONFIG_SPI=y
+CONFIG_SPI_SIFIVE=y
 # CONFIG_PTP_1588_CLOCK is not set
 CONFIG_DRM=y
 CONFIG_DRM_RADEON=y
 CONFIG_USB_OHCI_HCD_PLATFORM=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_UAS=y
+CONFIG_MMC=y
+CONFIG_MMC_SPI=y
 CONFIG_VIRTIO_MMIO=y
-CONFIG_SPI_SIFIVE=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_CRYPTO_USER_API_HASH=y
 CONFIG_CRYPTO_DEV_VIRTIO=y
 CONFIG_PRINTK_TIME=y
-CONFIG_SPI=y
-CONFIG_MMC_SPI=y
-CONFIG_MMC=y
-CONFIG_DEVTMPFS_MOUNT=y
 # CONFIG_RCU_TRACE is not set

arch/riscv/kernel/vdso/Makefile+1−1

@@ -37,7 +37,7 @@ $(obj)/vdso.so.dbg: $(src)/vdso.lds $(obj-vdso) FORCE · 36 unmodified lines
37	# these symbols in the kernel code rather than hand-coded addresses.	37	# these symbols in the kernel code rather than hand-coded addresses.
38		38
39	SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \	39	SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \
40	-Wl,--hash-style=both	40	-Wl,--build-id -Wl,--hash-style=both
41	$(obj)/vdso-dummy.o: $(src)/vdso.lds $(obj)/rt_sigreturn.o FORCE	41	$(obj)/vdso-dummy.o: $(src)/vdso.lds $(obj)/rt_sigreturn.o FORCE
42	$(call if_changed,vdsold)	42	$(call if_changed,vdsold)
43		43

arch/riscv/lib/Makefile+0−2

@@ -5,5 +5,3 @@ lib-y += memset.o · 4 unmodified lines
5	lib-y += uaccess.o	5	lib-y += uaccess.o
6		6
7	lib-$(CONFIG_64BIT) += tishift.o	7	lib-$(CONFIG_64BIT) += tishift.o
8
9	lib-$(CONFIG_32BIT) += udivdi3.o

arch/riscv/lib/delay.c+5−1

 void udelay(unsigned long usecs)
 {
 	u64 ucycles = (u64)usecs * lpj_fine * UDELAY_MULT;
+	u64 n;
 	if (unlikely(usecs > MAX_UDELAY_US)) {
-		__delay((u64)usecs * riscv_timebase / 1000000ULL);
+		n = (u64)usecs * riscv_timebase;
+		do_div(n, 1000000);
+		__delay(n);
 		return;
 	}

arch/riscv/lib/udivdi3.S+0−32

@@ -1,32 +0,0 @@
1	/* SPDX-License-Identifier: GPL-2.0-only */
2	/*
3	* Copyright (C) 2016-2017 Free Software Foundation, Inc.
4	*/
5
6	#include <linux/linkage.h>
7
8	ENTRY(__udivdi3)
9	mv a2, a1
10	mv a1, a0
11	li a0, -1
12	beqz a2, .L5
13	li a3, 1
14	bgeu a2, a1, .L2
15	.L1:
16	blez a2, .L2
17	slli a2, a2, 1
18	slli a3, a3, 1
19	bgtu a1, a2, .L1
20	.L2:
21	li a0, 0
22	.L3:
23	bltu a1, a2, .L4
24	sub a1, a1, a2
25	or a0, a0, a3
26	.L4:
27	srli a3, a3, 1
28	srli a2, a2, 1
29	bnez a3, .L3
30	.L5:
31	ret
32	ENDPROC(__udivdi3)

arch/s390/boot/boot.h+1−0

@@ -8,6 +8,7 @@ void store_ipl_parmblock(void); · 7 unmodified lines
8	void setup_boot_command_line(void);	8	void setup_boot_command_line(void);
9	void parse_boot_command_line(void);	9	void parse_boot_command_line(void);
10	void setup_memory_end(void);	10	void setup_memory_end(void);
		11	void verify_facilities(void);
11	void print_missing_facilities(void);	12	void print_missing_facilities(void);
12	unsigned long get_random_base(unsigned long safe_addr);	13	unsigned long get_random_base(unsigned long safe_addr);
13		14

arch/s390/boot/ipl_parm.c+0−2

 {
 	int rc;
-	uv_set_shared(__pa(&ipl_block));
 	rc = __diag308(DIAG308_STORE, &ipl_block);
-	uv_remove_shared(__pa(&ipl_block));
 	if (rc == DIAG308_RC_OK &&
 	    ipl_block.hdr.version <= IPL_MAX_SUPPORTED_VERSION)
 		ipl_block_valid = 1;

arch/s390/boot/kaslr.c+1−0

@@ -7,6 +7,7 @@ · 6 unmodified lines
7	#include <asm/timex.h>	7	#include <asm/timex.h>
8	#include <asm/sclp.h>	8	#include <asm/sclp.h>
9	#include "compressed/decompressor.h"	9	#include "compressed/decompressor.h"
		10	#include "boot.h"
10		11
11	#define PRNG_MODE_TDES 1	12	#define PRNG_MODE_TDES 1
12	#define PRNG_MODE_SHA512 2	13	#define PRNG_MODE_SHA512 2

arch/s390/configs/debug_defconfig+199−131

 CONFIG_AUDIT=y
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
+CONFIG_PREEMPT=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_BSD_PROCESS_ACCT_V3=y
 CONFIG_TASKSTATS=y
 CONFIG_CFS_BANDWIDTH=y
 CONFIG_RT_GROUP_SCHED=y
 CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_RDMA=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CGROUP_HUGETLB=y
 CONFIG_CPUSETS=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_BPF=y
 CONFIG_NAMESPACES=y
 CONFIG_USER_NS=y
+CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_SCHED_AUTOGROUP=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
-CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_BPF_SYSCALL=y
 CONFIG_USERFAULTFD=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_PROFILING=y
+CONFIG_LIVEPATCH=y
+CONFIG_TUNE_ZEC12=y
+CONFIG_NR_CPUS=512
+CONFIG_NUMA=y
+CONFIG_HZ_100=y
+CONFIG_KEXEC_FILE=y
+CONFIG_EXPOLINE=y
+CONFIG_EXPOLINE_AUTO=y
+CONFIG_CHSC_SCH=y
+CONFIG_VFIO_CCW=m
+CONFIG_VFIO_AP=m
+CONFIG_CRASH_DUMP=y
+CONFIG_HIBERNATION=y
+CONFIG_PM_DEBUG=y
+CONFIG_CMM=m
+CONFIG_APPLDATA_BASE=y
+CONFIG_KVM=m
+CONFIG_VHOST_NET=m
+CONFIG_VHOST_VSOCK=m
 CONFIG_OPROFILE=m
 CONFIG_KPROBES=y
 CONFIG_JUMP_LABEL=y
 CONFIG_STATIC_KEYS_SELFTEST=y
+CONFIG_REFCOUNT_FULL=y
+CONFIG_LOCK_EVENT_COUNTS=y
 CONFIG_MODULES=y
 CONFIG_MODULE_FORCE_LOAD=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_MODULE_SIG=y
+CONFIG_MODULE_SIG_SHA256=y
 CONFIG_BLK_DEV_INTEGRITY=y
 CONFIG_BLK_DEV_THROTTLING=y
 CONFIG_BLK_WBT=y
-CONFIG_BLK_WBT_SQ=y
+CONFIG_BLK_CGROUP_IOLATENCY=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_IBM_PARTITION=y
 CONFIG_BSD_DISKLABEL=y
 CONFIG_MINIX_SUBPARTITION=y
 CONFIG_SOLARIS_X86_PARTITION=y
 CONFIG_UNIXWARE_DISKLABEL=y
-CONFIG_CFQ_GROUP_IOSCHED=y
+CONFIG_IOSCHED_BFQ=y
-CONFIG_DEFAULT_DEADLINE=y
+CONFIG_BFQ_GROUP_IOSCHED=y
-CONFIG_LIVEPATCH=y
+CONFIG_BINFMT_MISC=m
-CONFIG_TUNE_ZEC12=y
-CONFIG_NR_CPUS=512
-CONFIG_NUMA=y
-CONFIG_PREEMPT=y
-CONFIG_HZ_100=y
-CONFIG_KEXEC_FILE=y
-CONFIG_KEXEC_VERIFY_SIG=y
-CONFIG_EXPOLINE=y
-CONFIG_EXPOLINE_AUTO=y
 CONFIG_MEMORY_HOTPLUG=y
 CONFIG_MEMORY_HOTREMOVE=y
 CONFIG_KSM=y
 CONFIG_ZSMALLOC_STAT=y
 CONFIG_DEFERRED_STRUCT_PAGE_INIT=y
 CONFIG_IDLE_PAGE_TRACKING=y
-CONFIG_PCI=y
+CONFIG_PERCPU_STATS=y
-CONFIG_PCI_DEBUG=y
+CONFIG_GUP_BENCHMARK=y
-CONFIG_HOTPLUG_PCI=y
-CONFIG_HOTPLUG_PCI_S390=y
-CONFIG_CHSC_SCH=y
-CONFIG_VFIO_AP=m
-CONFIG_VFIO_CCW=m
-CONFIG_CRASH_DUMP=y
-CONFIG_BINFMT_MISC=m
-CONFIG_HIBERNATION=y
-CONFIG_PM_DEBUG=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_PACKET_DIAG=m
 CONFIG_INET_AH=m
 CONFIG_INET_ESP=m
 CONFIG_INET_IPCOMP=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INET_XFRM_MODE_BEET=m
 CONFIG_INET_DIAG=m
 CONFIG_INET_UDP_DIAG=m
 CONFIG_TCP_CONG_ADVANCED=y
 CONFIG_INET6_ESP=m
 CONFIG_INET6_IPCOMP=m
 CONFIG_IPV6_MIP6=m
-CONFIG_INET6_XFRM_MODE_TRANSPORT=m
-CONFIG_INET6_XFRM_MODE_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_BEET=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
 CONFIG_IPV6_VTI=m
 CONFIG_IPV6_SIT=m
 CONFIG_IPV6_GRE=m
 CONFIG_IP_VS_NQ=m
 CONFIG_IP_VS_FTP=m
 CONFIG_IP_VS_PE_SIP=m
-CONFIG_NF_CONNTRACK_IPV4=m
 CONFIG_NF_TABLES_IPV4=y
-CONFIG_NFT_CHAIN_ROUTE_IPV4=m
 CONFIG_NF_TABLES_ARP=y
-CONFIG_NFT_CHAIN_NAT_IPV4=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_AH=m
 CONFIG_IP_NF_MATCH_ECN=m
 CONFIG_IP_NF_ARPTABLES=m
 CONFIG_IP_NF_ARPFILTER=m
 CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_NF_CONNTRACK_IPV6=m
 CONFIG_NF_TABLES_IPV6=y
-CONFIG_NFT_CHAIN_ROUTE_IPV6=m
-CONFIG_NFT_CHAIN_NAT_IPV6=m
 CONFIG_IP6_NF_IPTABLES=m
 CONFIG_IP6_NF_MATCH_AH=m
 CONFIG_IP6_NF_MATCH_EUI64=m
 CONFIG_IP6_NF_SECURITY=m
 CONFIG_IP6_NF_NAT=m
 CONFIG_IP6_NF_TARGET_MASQUERADE=m
-CONFIG_NF_TABLES_BRIDGE=y
+CONFIG_NF_TABLES_BRIDGE=m
 CONFIG_RDS=m
 CONFIG_RDS_RDMA=m
 CONFIG_RDS_TCP=m
 CONFIG_CGROUP_NET_PRIO=y
 CONFIG_BPF_JIT=y
 CONFIG_NET_PKTGEN=m
+CONFIG_PCI=y
+CONFIG_PCI_DEBUG=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_HOTPLUG_PCI_S390=y
 CONFIG_DEVTMPFS=y
-CONFIG_DMA_CMA=y
-CONFIG_CMA_SIZE_MBYTES=0
 CONFIG_CONNECTOR=y
 CONFIG_ZRAM=m
 CONFIG_BLK_DEV_LOOP=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=m
-CONFIG_CHR_DEV_OSST=m
 CONFIG_BLK_DEV_SR=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_SCH=m
 CONFIG_SCSI_DH_HP_SW=m
 CONFIG_SCSI_DH_EMC=m
 CONFIG_SCSI_DH_ALUA=m
-CONFIG_SCSI_OSD_INITIATOR=m
-CONFIG_SCSI_OSD_ULD=m
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
 CONFIG_MD_LINEAR=m
 CONFIG_MD_MULTIPATH=m
 CONFIG_MD_FAULTY=m
+CONFIG_MD_CLUSTER=m
+CONFIG_BCACHE=m
 CONFIG_BLK_DEV_DM=m
+CONFIG_DM_UNSTRIPED=m
 CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
+CONFIG_DM_WRITECACHE=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_LOG_USERSPACE=m
 CONFIG_DM_RAID=m
 CONFIG_IFB=m
 CONFIG_MACVLAN=m
 CONFIG_MACVTAP=m
-CONFIG_VXLAN=m
 CONFIG_TUN=m
 CONFIG_VETH=m
 CONFIG_VIRTIO_NET=m
 CONFIG_NLMON=m
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_ADAPTEC is not set
+# CONFIG_NET_VENDOR_AGERE is not set
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+# CONFIG_NET_VENDOR_ALTEON is not set
+# CONFIG_NET_VENDOR_AMAZON is not set
+# CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_VENDOR_AQUANTIA is not set
 # CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_ATHEROS is not set
+# CONFIG_NET_VENDOR_AURORA is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
+# CONFIG_NET_VENDOR_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
 # CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CISCO is not set
+# CONFIG_NET_VENDOR_CORTINA is not set
+# CONFIG_NET_VENDOR_DEC is not set
+# CONFIG_NET_VENDOR_DLINK is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+# CONFIG_NET_VENDOR_GOOGLE is not set
+# CONFIG_NET_VENDOR_HP is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 CONFIG_MLX4_EN=m
 CONFIG_MLX5_CORE=m
 CONFIG_MLX5_CORE_EN=y
+# CONFIG_MLXFW is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_MICROSEMI is not set
+# CONFIG_NET_VENDOR_MYRI is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NETERION is not set
+# CONFIG_NET_VENDOR_NETRONOME is not set
+# CONFIG_NET_VENDOR_NI is not set
+# CONFIG_NET_VENDOR_NVIDIA is not set
+# CONFIG_NET_VENDOR_OKI is not set
+# CONFIG_NET_VENDOR_PACKET_ENGINES is not set
+# CONFIG_NET_VENDOR_QLOGIC is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_RDC is not set
+# CONFIG_NET_VENDOR_REALTEK is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
+# CONFIG_NET_VENDOR_SILAN is not set
+# CONFIG_NET_VENDOR_SIS is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_SUN is not set
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_TEHUTI is not set
+# CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
 CONFIG_PPP=m
 CONFIG_PPP_BSDCOMP=m
 CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_FILTER=y
 CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
 CONFIG_PPPOE=m
 CONFIG_PPTP=m
 CONFIG_PPPOL2TP=m
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
 CONFIG_LEGACY_PTY_COUNT=0
+CONFIG_NULL_TTY=m
 CONFIG_HW_RANDOM_VIRTIO=m
 CONFIG_RAW_DRIVER=m
 CONFIG_HANGCHECK_TIMER=m
 CONFIG_TN3270_FS=y
+CONFIG_PPS=m
+# CONFIG_PTP_1588_CLOCK is not set
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_VIRTIO_PCI=m
 CONFIG_VIRTIO_BALLOON=m
 CONFIG_VIRTIO_INPUT=y
-CONFIG_S390_AP_IOMMU=y
 CONFIG_S390_CCW_IOMMU=y
+CONFIG_S390_AP_IOMMU=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
 CONFIG_BTRFS_FS=y
 CONFIG_BTRFS_FS_POSIX_ACL=y
 CONFIG_BTRFS_DEBUG=y
+CONFIG_BTRFS_ASSERT=y
 CONFIG_NILFS2_FS=m
 CONFIG_FS_DAX=y
 CONFIG_EXPORTFS_BLOCK_OPS=y
 CONFIG_CRAMFS=m
 CONFIG_SQUASHFS=m
 CONFIG_SQUASHFS_XATTR=y
+CONFIG_SQUASHFS_LZ4=y
 CONFIG_SQUASHFS_LZO=y
 CONFIG_SQUASHFS_XZ=y
+CONFIG_SQUASHFS_ZSTD=y
 CONFIG_ROMFS_FS=m
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFSD_V4=y
 CONFIG_NFSD_V4_SECURITY_LABEL=y
 CONFIG_CIFS=m
-CONFIG_CIFS_STATS=y
 CONFIG_CIFS_STATS2=y
 CONFIG_CIFS_WEAK_PW_HASH=y
 CONFIG_CIFS_UPCALL=y
 CONFIG_NLS_ISO8859_15=m
 CONFIG_NLS_UTF8=m
 CONFIG_DLM=m
+CONFIG_UNICODE=y
+CONFIG_PERSISTENT_KEYRINGS=y
+CONFIG_BIG_KEYS=y
+CONFIG_ENCRYPTED_KEYS=m
+CONFIG_SECURITY=y
+CONFIG_SECURITY_NETWORK=y
+CONFIG_FORTIFY_SOURCE=y
+CONFIG_SECURITY_SELINUX=y
+CONFIG_SECURITY_SELINUX_BOOTPARAM=y
+CONFIG_SECURITY_SELINUX_DISABLE=y
+CONFIG_INTEGRITY_SIGNATURE=y
+CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y
+CONFIG_IMA=y
+CONFIG_IMA_DEFAULT_HASH_SHA256=y
+CONFIG_IMA_WRITE_POLICY=y
+CONFIG_IMA_APPRAISE=y
+CONFIG_CRYPTO_USER=m
+# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
+CONFIG_CRYPTO_PCRYPT=m
+CONFIG_CRYPTO_CRYPTD=m
+CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_DH=m
+CONFIG_CRYPTO_ECDH=m
+CONFIG_CRYPTO_ECRDSA=m
+CONFIG_CRYPTO_CHACHA20POLY1305=m
+CONFIG_CRYPTO_AEGIS128=m
+CONFIG_CRYPTO_AEGIS128L=m
+CONFIG_CRYPTO_AEGIS256=m
+CONFIG_CRYPTO_MORUS640=m
+CONFIG_CRYPTO_MORUS1280=m
+CONFIG_CRYPTO_CFB=m
+CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_KEYWRAP=m
+CONFIG_CRYPTO_ADIANTUM=m
+CONFIG_CRYPTO_XCBC=m
+CONFIG_CRYPTO_VMAC=m
+CONFIG_CRYPTO_CRC32=m
+CONFIG_CRYPTO_XXHASH=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+CONFIG_CRYPTO_RMD128=m
+CONFIG_CRYPTO_RMD160=m
+CONFIG_CRYPTO_RMD256=m
+CONFIG_CRYPTO_RMD320=m
+CONFIG_CRYPTO_SHA3=m
+CONFIG_CRYPTO_SM3=m
+CONFIG_CRYPTO_TGR192=m
+CONFIG_CRYPTO_WP512=m
+CONFIG_CRYPTO_AES_TI=m
+CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
+CONFIG_CRYPTO_BLOWFISH=m
+CONFIG_CRYPTO_CAMELLIA=m
+CONFIG_CRYPTO_CAST5=m
+CONFIG_CRYPTO_CAST6=m
+CONFIG_CRYPTO_FCRYPT=m
+CONFIG_CRYPTO_KHAZAD=m
+CONFIG_CRYPTO_SALSA20=m
+CONFIG_CRYPTO_SEED=m
+CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_SM4=m
+CONFIG_CRYPTO_TEA=m
+CONFIG_CRYPTO_TWOFISH=m
+CONFIG_CRYPTO_842=m
+CONFIG_CRYPTO_LZ4=m
+CONFIG_CRYPTO_LZ4HC=m
+CONFIG_CRYPTO_ZSTD=m
+CONFIG_CRYPTO_ANSI_CPRNG=m
+CONFIG_CRYPTO_USER_API_HASH=m
+CONFIG_CRYPTO_USER_API_SKCIPHER=m
+CONFIG_CRYPTO_USER_API_RNG=m
+CONFIG_CRYPTO_USER_API_AEAD=m
+CONFIG_CRYPTO_STATS=y
+CONFIG_ZCRYPT=m
+CONFIG_PKEY=m
+CONFIG_CRYPTO_PAES_S390=m
+CONFIG_CRYPTO_SHA1_S390=m
+CONFIG_CRYPTO_SHA256_S390=m
+CONFIG_CRYPTO_SHA512_S390=m
+CONFIG_CRYPTO_DES_S390=m
+CONFIG_CRYPTO_AES_S390=m
+CONFIG_CRYPTO_GHASH_S390=m
+CONFIG_CRYPTO_CRC32_S390=y
+CONFIG_CORDIC=m
+CONFIG_CRC32_SELFTEST=y
+CONFIG_CRC4=m
+CONFIG_CRC7=m
+CONFIG_CRC8=m
+CONFIG_RANDOM32_SELFTEST=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=0
+CONFIG_DMA_API_DEBUG=y
+CONFIG_STRING_SELFTEST=y
 CONFIG_PRINTK_TIME=y
 CONFIG_DYNAMIC_DEBUG=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_INFO_DWARF4=y
 CONFIG_GDB_SCRIPTS=y
 CONFIG_FRAME_WARN=1024
-CONFIG_READABLE_ASM=y
 CONFIG_UNUSED_SYMBOLS=y
 CONFIG_HEADERS_INSTALL=y
 CONFIG_HEADERS_CHECK=y
 CONFIG_DEBUG_SECTION_MISMATCH=y
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_PAGEALLOC=y
+CONFIG_PAGE_OWNER=y
 CONFIG_DEBUG_RODATA_TEST=y
 CONFIG_DEBUG_OBJECTS=y
 CONFIG_DEBUG_OBJECTS_SELFTEST=y
 CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_FUNCTION_PROFILER=y
 CONFIG_HIST_TRIGGERS=y
-CONFIG_DMA_API_DEBUG=y
 CONFIG_LKDTM=m
 CONFIG_TEST_LIST_SORT=y
 CONFIG_TEST_SORT=y
 CONFIG_TEST_BPF=m
 CONFIG_BUG_ON_DATA_CORRUPTION=y
 CONFIG_S390_PTDUMP=y
-CONFIG_PERSISTENT_KEYRINGS=y
-CONFIG_BIG_KEYS=y
-CONFIG_ENCRYPTED_KEYS=m
-CONFIG_SECURITY=y
-CONFIG_SECURITY_NETWORK=y
-CONFIG_FORTIFY_SOURCE=y
-CONFIG_SECURITY_SELINUX=y
-CONFIG_SECURITY_SELINUX_BOOTPARAM=y
-CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
-CONFIG_SECURITY_SELINUX_DISABLE=y
-CONFIG_INTEGRITY_SIGNATURE=y
-CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y
-CONFIG_IMA=y
-CONFIG_IMA_DEFAULT_HASH_SHA256=y
-CONFIG_IMA_WRITE_POLICY=y
-CONFIG_IMA_APPRAISE=y
-CONFIG_CRYPTO_DH=m
-CONFIG_CRYPTO_ECDH=m
-CONFIG_CRYPTO_USER=m
-# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
-CONFIG_CRYPTO_PCRYPT=m
-CONFIG_CRYPTO_CRYPTD=m
-CONFIG_CRYPTO_TEST=m
-CONFIG_CRYPTO_CHACHA20POLY1305=m
-CONFIG_CRYPTO_LRW=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_KEYWRAP=m
-CONFIG_CRYPTO_XCBC=m
-CONFIG_CRYPTO_VMAC=m
-CONFIG_CRYPTO_CRC32=m
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_RMD128=m
-CONFIG_CRYPTO_RMD160=m
-CONFIG_CRYPTO_RMD256=m
-CONFIG_CRYPTO_RMD320=m
-CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_SHA3=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_AES_TI=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAMELLIA=m
-CONFIG_CRYPTO_CAST5=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_FCRYPT=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_SALSA20=m
-CONFIG_CRYPTO_SEED=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_842=m
-CONFIG_CRYPTO_LZ4=m
-CONFIG_CRYPTO_LZ4HC=m
-CONFIG_CRYPTO_ANSI_CPRNG=m
-CONFIG_CRYPTO_USER_API_HASH=m
-CONFIG_CRYPTO_USER_API_SKCIPHER=m
-CONFIG_CRYPTO_USER_API_RNG=m
-CONFIG_CRYPTO_USER_API_AEAD=m
-CONFIG_ZCRYPT=m
-CONFIG_PKEY=m
-CONFIG_CRYPTO_PAES_S390=m
-CONFIG_CRYPTO_SHA1_S390=m
-CONFIG_CRYPTO_SHA256_S390=m
-CONFIG_CRYPTO_SHA512_S390=m
-CONFIG_CRYPTO_DES_S390=m
-CONFIG_CRYPTO_AES_S390=m
-CONFIG_CRYPTO_GHASH_S390=m
-CONFIG_CRYPTO_CRC32_S390=y
-CONFIG_PKCS7_MESSAGE_PARSER=y
-CONFIG_SYSTEM_TRUSTED_KEYRING=y
-CONFIG_CRC7=m
-CONFIG_CRC8=m
-CONFIG_RANDOM32_SELFTEST=y
-CONFIG_CORDIC=m
-CONFIG_CMM=m
-CONFIG_APPLDATA_BASE=y
-CONFIG_KVM=m
-CONFIG_KVM_S390_UCONTROL=y
-CONFIG_VHOST_NET=m
-CONFIG_VHOST_VSOCK=m

arch/s390/configs/defconfig+150−83

 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_NUMA_BALANCING=y
-# CONFIG_NUMA_BALANCING_DEFAULT_ENABLED is not set
 CONFIG_MEMCG=y
 CONFIG_MEMCG_SWAP=y
 CONFIG_BLK_CGROUP=y
 CONFIG_CFS_BANDWIDTH=y
 CONFIG_RT_GROUP_SCHED=y
 CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_RDMA=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CGROUP_HUGETLB=y
 CONFIG_CPUSETS=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_CGROUP_PERF=y
+CONFIG_CGROUP_BPF=y
 CONFIG_NAMESPACES=y
 CONFIG_USER_NS=y
+CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_SCHED_AUTOGROUP=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
-CONFIG_CHECKPOINT_RESTORE=y
 CONFIG_BPF_SYSCALL=y
 CONFIG_USERFAULTFD=y
 # CONFIG_COMPAT_BRK is not set
 CONFIG_PROFILING=y
+CONFIG_LIVEPATCH=y
+CONFIG_TUNE_ZEC12=y
+CONFIG_NR_CPUS=512
+CONFIG_NUMA=y
+# CONFIG_NUMA_EMU is not set
+CONFIG_HZ_100=y
+CONFIG_KEXEC_FILE=y
+CONFIG_EXPOLINE=y
+CONFIG_EXPOLINE_AUTO=y
+CONFIG_CHSC_SCH=y
+CONFIG_VFIO_CCW=m
+CONFIG_VFIO_AP=m
+CONFIG_CRASH_DUMP=y
+CONFIG_HIBERNATION=y
+CONFIG_PM_DEBUG=y
+CONFIG_CMM=m
+CONFIG_APPLDATA_BASE=y
+CONFIG_KVM=m
+CONFIG_VHOST_NET=m
+CONFIG_VHOST_VSOCK=m
 CONFIG_OPROFILE=m
 CONFIG_KPROBES=y
 CONFIG_JUMP_LABEL=y
 CONFIG_MODULE_SRCVERSION_ALL=y
 CONFIG_MODULE_SIG=y
 CONFIG_MODULE_SIG_SHA256=y
-CONFIG_BLK_DEV_INTEGRITY=y
 CONFIG_BLK_DEV_THROTTLING=y
 CONFIG_BLK_WBT=y
-CONFIG_BLK_WBT_SQ=y
+CONFIG_BLK_CGROUP_IOLATENCY=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_IBM_PARTITION=y
 CONFIG_BSD_DISKLABEL=y
 CONFIG_MINIX_SUBPARTITION=y
 CONFIG_SOLARIS_X86_PARTITION=y
 CONFIG_UNIXWARE_DISKLABEL=y
-CONFIG_CFQ_GROUP_IOSCHED=y
+CONFIG_IOSCHED_BFQ=y
-CONFIG_DEFAULT_DEADLINE=y
+CONFIG_BFQ_GROUP_IOSCHED=y
-CONFIG_LIVEPATCH=y
+CONFIG_BINFMT_MISC=m
-CONFIG_TUNE_ZEC12=y
-CONFIG_NR_CPUS=512
-CONFIG_NUMA=y
-CONFIG_HZ_100=y
-CONFIG_KEXEC_FILE=y
-CONFIG_KEXEC_VERIFY_SIG=y
-CONFIG_EXPOLINE=y
-CONFIG_EXPOLINE_AUTO=y
 CONFIG_MEMORY_HOTPLUG=y
 CONFIG_MEMORY_HOTREMOVE=y
 CONFIG_KSM=y
 CONFIG_ZSMALLOC_STAT=y
 CONFIG_DEFERRED_STRUCT_PAGE_INIT=y
 CONFIG_IDLE_PAGE_TRACKING=y
-CONFIG_PCI=y
+CONFIG_PERCPU_STATS=y
-CONFIG_HOTPLUG_PCI=y
+CONFIG_GUP_BENCHMARK=y
-CONFIG_HOTPLUG_PCI_S390=y
-CONFIG_CHSC_SCH=y
-CONFIG_VFIO_AP=m
-CONFIG_VFIO_CCW=m
-CONFIG_CRASH_DUMP=y
-CONFIG_BINFMT_MISC=m
-CONFIG_HIBERNATION=y
-CONFIG_PM_DEBUG=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_PACKET_DIAG=m
 CONFIG_INET_AH=m
 CONFIG_INET_ESP=m
 CONFIG_INET_IPCOMP=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INET_XFRM_MODE_BEET=m
 CONFIG_INET_DIAG=m
 CONFIG_INET_UDP_DIAG=m
 CONFIG_TCP_CONG_ADVANCED=y
 CONFIG_INET6_ESP=m
 CONFIG_INET6_IPCOMP=m
 CONFIG_IPV6_MIP6=m
-CONFIG_INET6_XFRM_MODE_TRANSPORT=m
-CONFIG_INET6_XFRM_MODE_TUNNEL=m
-CONFIG_INET6_XFRM_MODE_BEET=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
 CONFIG_IPV6_VTI=m
 CONFIG_IPV6_SIT=m
 CONFIG_IPV6_GRE=m
 CONFIG_IP_VS_NQ=m
 CONFIG_IP_VS_FTP=m
 CONFIG_IP_VS_PE_SIP=m
-CONFIG_NF_CONNTRACK_IPV4=m
 CONFIG_NF_TABLES_IPV4=y
-CONFIG_NFT_CHAIN_ROUTE_IPV4=m
 CONFIG_NF_TABLES_ARP=y
-CONFIG_NFT_CHAIN_NAT_IPV4=m
 CONFIG_IP_NF_IPTABLES=m
 CONFIG_IP_NF_MATCH_AH=m
 CONFIG_IP_NF_MATCH_ECN=m
 CONFIG_IP_NF_ARPTABLES=m
 CONFIG_IP_NF_ARPFILTER=m
 CONFIG_IP_NF_ARP_MANGLE=m
-CONFIG_NF_CONNTRACK_IPV6=m
 CONFIG_NF_TABLES_IPV6=y
-CONFIG_NFT_CHAIN_ROUTE_IPV6=m
-CONFIG_NFT_CHAIN_NAT_IPV6=m
 CONFIG_IP6_NF_IPTABLES=m
 CONFIG_IP6_NF_MATCH_AH=m
 CONFIG_IP6_NF_MATCH_EUI64=m
 CONFIG_IP6_NF_SECURITY=m
 CONFIG_IP6_NF_NAT=m
 CONFIG_IP6_NF_TARGET_MASQUERADE=m
-CONFIG_NF_TABLES_BRIDGE=y
+CONFIG_NF_TABLES_BRIDGE=m
 CONFIG_RDS=m
 CONFIG_RDS_RDMA=m
 CONFIG_RDS_TCP=m
 CONFIG_CGROUP_NET_PRIO=y
 CONFIG_BPF_JIT=y
 CONFIG_NET_PKTGEN=m
+CONFIG_PCI=y
+CONFIG_HOTPLUG_PCI=y
+CONFIG_HOTPLUG_PCI_S390=y
+CONFIG_UEVENT_HELPER=y
 CONFIG_DEVTMPFS=y
-CONFIG_DMA_CMA=y
-CONFIG_CMA_SIZE_MBYTES=0
 CONFIG_CONNECTOR=y
 CONFIG_ZRAM=m
 CONFIG_BLK_DEV_LOOP=m
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
+# CONFIG_BLK_DEV_XPRAM is not set
 CONFIG_VIRTIO_BLK=y
 CONFIG_BLK_DEV_RBD=m
 CONFIG_BLK_DEV_NVME=m
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=m
-CONFIG_CHR_DEV_OSST=m
 CONFIG_BLK_DEV_SR=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_CHR_DEV_SCH=m
 CONFIG_SCSI_DH_HP_SW=m
 CONFIG_SCSI_DH_EMC=m
 CONFIG_SCSI_DH_ALUA=m
-CONFIG_SCSI_OSD_INITIATOR=m
-CONFIG_SCSI_OSD_ULD=m
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
 CONFIG_MD_LINEAR=m
 CONFIG_MD_MULTIPATH=m
 CONFIG_MD_FAULTY=m
+CONFIG_MD_CLUSTER=m
+CONFIG_BCACHE=m
 CONFIG_BLK_DEV_DM=m
+CONFIG_DM_UNSTRIPED=m
 CONFIG_DM_CRYPT=m
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_THIN_PROVISIONING=m
+CONFIG_DM_WRITECACHE=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_LOG_USERSPACE=m
 CONFIG_DM_RAID=m
 CONFIG_DM_FLAKEY=m
 CONFIG_DM_VERITY=m
 CONFIG_DM_SWITCH=m
+CONFIG_DM_INTEGRITY=m
 CONFIG_NETDEVICES=y
 CONFIG_BONDING=m
 CONFIG_DUMMY=m
 CONFIG_IFB=m
 CONFIG_MACVLAN=m
 CONFIG_MACVTAP=m
-CONFIG_VXLAN=m
 CONFIG_TUN=m
 CONFIG_VETH=m
 CONFIG_VIRTIO_NET=m
 CONFIG_NLMON=m
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_ADAPTEC is not set
+# CONFIG_NET_VENDOR_AGERE is not set
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+# CONFIG_NET_VENDOR_ALTEON is not set
+# CONFIG_NET_VENDOR_AMAZON is not set
+# CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_VENDOR_AQUANTIA is not set
 # CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_ATHEROS is not set
+# CONFIG_NET_VENDOR_AURORA is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
+# CONFIG_NET_VENDOR_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
 # CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CISCO is not set
+# CONFIG_NET_VENDOR_CORTINA is not set
+# CONFIG_NET_VENDOR_DEC is not set
+# CONFIG_NET_VENDOR_DLINK is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+# CONFIG_NET_VENDOR_GOOGLE is not set
+# CONFIG_NET_VENDOR_HP is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
 # CONFIG_NET_VENDOR_INTEL is not set
 # CONFIG_NET_VENDOR_MARVELL is not set
 CONFIG_MLX4_EN=m
 CONFIG_MLX5_CORE=m
 CONFIG_MLX5_CORE_EN=y
+# CONFIG_MLXFW is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_MICROSEMI is not set
+# CONFIG_NET_VENDOR_MYRI is not set
 # CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NETERION is not set
+# CONFIG_NET_VENDOR_NETRONOME is not set
+# CONFIG_NET_VENDOR_NI is not set
+# CONFIG_NET_VENDOR_NVIDIA is not set
+# CONFIG_NET_VENDOR_OKI is not set
+# CONFIG_NET_VENDOR_PACKET_ENGINES is not set
+# CONFIG_NET_VENDOR_QLOGIC is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_RDC is not set
+# CONFIG_NET_VENDOR_REALTEK is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
+# CONFIG_NET_VENDOR_SILAN is not set
+# CONFIG_NET_VENDOR_SIS is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_SUN is not set
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_TEHUTI is not set
+# CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
 CONFIG_PPP=m
 CONFIG_PPP_BSDCOMP=m
 CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_FILTER=y
 CONFIG_PPP_MPPE=m
+CONFIG_PPP_MULTILINK=y
 CONFIG_PPPOE=m
 CONFIG_PPTP=m
 CONFIG_PPPOL2TP=m
 # CONFIG_INPUT_MOUSE is not set
 # CONFIG_SERIO is not set
 CONFIG_LEGACY_PTY_COUNT=0
+CONFIG_NULL_TTY=m
 CONFIG_HW_RANDOM_VIRTIO=m
 CONFIG_RAW_DRIVER=m
 CONFIG_HANGCHECK_TIMER=m
 CONFIG_TN3270_FS=y
+# CONFIG_PTP_1588_CLOCK is not set
 # CONFIG_HWMON is not set
 CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_CORE=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 CONFIG_SOFT_WATCHDOG=m
 CONFIG_DIAG288_WATCHDOG=m
 CONFIG_DRM=y
 CONFIG_DRM_VIRTIO_GPU=y
+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
 CONFIG_FRAMEBUFFER_CONSOLE=y
 # CONFIG_HID is not set
 # CONFIG_USB_SUPPORT is not set
 CONFIG_VIRTIO_PCI=m
 CONFIG_VIRTIO_BALLOON=m
 CONFIG_VIRTIO_INPUT=y
-CONFIG_S390_AP_IOMMU=y
 CONFIG_S390_CCW_IOMMU=y
+CONFIG_S390_AP_IOMMU=y
 CONFIG_EXT4_FS=y
 CONFIG_EXT4_FS_POSIX_ACL=y
 CONFIG_EXT4_FS_SECURITY=y
 CONFIG_CRAMFS=m
 CONFIG_SQUASHFS=m
 CONFIG_SQUASHFS_XATTR=y
+CONFIG_SQUASHFS_LZ4=y
 CONFIG_SQUASHFS_LZO=y
 CONFIG_SQUASHFS_XZ=y
+CONFIG_SQUASHFS_ZSTD=y
 CONFIG_ROMFS_FS=m
 CONFIG_NFS_FS=m
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFSD_V4=y
 CONFIG_NFSD_V4_SECURITY_LABEL=y
 CONFIG_CIFS=m
-CONFIG_CIFS_STATS=y
 CONFIG_CIFS_STATS2=y
 CONFIG_CIFS_WEAK_PW_HASH=y
 CONFIG_CIFS_UPCALL=y
 CONFIG_NLS_ISO8859_15=m
 CONFIG_NLS_UTF8=m
 CONFIG_DLM=m
-CONFIG_PRINTK_TIME=y
+CONFIG_UNICODE=y
-CONFIG_DEBUG_INFO=y
-CONFIG_DEBUG_INFO_DWARF4=y
-CONFIG_GDB_SCRIPTS=y
-# CONFIG_ENABLE_MUST_CHECK is not set
-CONFIG_FRAME_WARN=1024
-CONFIG_UNUSED_SYMBOLS=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_MEMORY_INIT=y
-CONFIG_PANIC_ON_OOPS=y
-CONFIG_RCU_TORTURE_TEST=m
-CONFIG_RCU_CPU_STALL_TIMEOUT=60
-CONFIG_LATENCYTOP=y
-CONFIG_SCHED_TRACER=y
-CONFIG_FTRACE_SYSCALLS=y
-CONFIG_STACK_TRACER=y
-CONFIG_BLK_DEV_IO_TRACE=y
-CONFIG_FUNCTION_PROFILER=y
-CONFIG_HIST_TRIGGERS=y
-CONFIG_LKDTM=m
-CONFIG_PERCPU_TEST=m
-CONFIG_ATOMIC64_SELFTEST=y
-CONFIG_TEST_BPF=m
-CONFIG_BUG_ON_DATA_CORRUPTION=y
-CONFIG_S390_PTDUMP=y
 CONFIG_PERSISTENT_KEYRINGS=y
 CONFIG_BIG_KEYS=y
 CONFIG_ENCRYPTED_KEYS=m
 CONFIG_SECURITY_NETWORK=y
 CONFIG_SECURITY_SELINUX=y
 CONFIG_SECURITY_SELINUX_BOOTPARAM=y
-CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=0
 CONFIG_SECURITY_SELINUX_DISABLE=y
 CONFIG_INTEGRITY_SIGNATURE=y
 CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y
 CONFIG_IMA_WRITE_POLICY=y
 CONFIG_IMA_APPRAISE=y
 CONFIG_CRYPTO_FIPS=y
-CONFIG_CRYPTO_DH=m
-CONFIG_CRYPTO_ECDH=m
 CONFIG_CRYPTO_USER=m
 # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
 CONFIG_CRYPTO_PCRYPT=m
 CONFIG_CRYPTO_CRYPTD=m
 CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_DH=m
+CONFIG_CRYPTO_ECDH=m
+CONFIG_CRYPTO_ECRDSA=m
 CONFIG_CRYPTO_CHACHA20POLY1305=m
+CONFIG_CRYPTO_AEGIS128=m
+CONFIG_CRYPTO_AEGIS128L=m
+CONFIG_CRYPTO_AEGIS256=m
+CONFIG_CRYPTO_MORUS640=m
+CONFIG_CRYPTO_MORUS1280=m
+CONFIG_CRYPTO_CFB=m
 CONFIG_CRYPTO_LRW=m
+CONFIG_CRYPTO_OFB=m
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_KEYWRAP=m
+CONFIG_CRYPTO_ADIANTUM=m
 CONFIG_CRYPTO_XCBC=m
 CONFIG_CRYPTO_VMAC=m
 CONFIG_CRYPTO_CRC32=m
+CONFIG_CRYPTO_XXHASH=m
 CONFIG_CRYPTO_MICHAEL_MIC=m
 CONFIG_CRYPTO_RMD128=m
 CONFIG_CRYPTO_RMD160=m
 CONFIG_CRYPTO_RMD256=m
 CONFIG_CRYPTO_RMD320=m
-CONFIG_CRYPTO_SHA512=m
 CONFIG_CRYPTO_SHA3=m
+CONFIG_CRYPTO_SM3=m
 CONFIG_CRYPTO_TGR192=m
 CONFIG_CRYPTO_WP512=m
 CONFIG_CRYPTO_AES_TI=m
 CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
 CONFIG_CRYPTO_BLOWFISH=m
 CONFIG_CRYPTO_CAMELLIA=m
 CONFIG_CRYPTO_CAST5=m
 CONFIG_CRYPTO_SALSA20=m
 CONFIG_CRYPTO_SEED=m
 CONFIG_CRYPTO_SERPENT=m
+CONFIG_CRYPTO_SM4=m
 CONFIG_CRYPTO_TEA=m
 CONFIG_CRYPTO_TWOFISH=m
 CONFIG_CRYPTO_842=m
 CONFIG_CRYPTO_LZ4=m
 CONFIG_CRYPTO_LZ4HC=m
+CONFIG_CRYPTO_ZSTD=m
 CONFIG_CRYPTO_ANSI_CPRNG=m
 CONFIG_CRYPTO_USER_API_HASH=m
 CONFIG_CRYPTO_USER_API_SKCIPHER=m
 CONFIG_CRYPTO_USER_API_RNG=m
 CONFIG_CRYPTO_USER_API_AEAD=m
+CONFIG_CRYPTO_STATS=y
 CONFIG_ZCRYPT=m
 CONFIG_PKEY=m
 CONFIG_CRYPTO_PAES_S390=m
 CONFIG_CRYPTO_AES_S390=m
 CONFIG_CRYPTO_GHASH_S390=m
 CONFIG_CRYPTO_CRC32_S390=y
+CONFIG_CORDIC=m
+CONFIG_CRC4=m
 CONFIG_CRC7=m
 CONFIG_CRC8=m
-CONFIG_CORDIC=m
+CONFIG_DMA_CMA=y
-CONFIG_CMM=m
+CONFIG_CMA_SIZE_MBYTES=0
-CONFIG_APPLDATA_BASE=y
+CONFIG_PRINTK_TIME=y
-CONFIG_KVM=m
+CONFIG_DEBUG_INFO=y
-CONFIG_KVM_S390_UCONTROL=y
+CONFIG_DEBUG_INFO_DWARF4=y
-CONFIG_VHOST_NET=m
+CONFIG_GDB_SCRIPTS=y
-CONFIG_VHOST_VSOCK=m
+CONFIG_FRAME_WARN=1024
+CONFIG_UNUSED_SYMBOLS=y
+CONFIG_DEBUG_SECTION_MISMATCH=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_PANIC_ON_OOPS=y
+CONFIG_RCU_TORTURE_TEST=m
+CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_LATENCYTOP=y
+CONFIG_SCHED_TRACER=y
+CONFIG_FTRACE_SYSCALLS=y
+CONFIG_STACK_TRACER=y
+CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_FUNCTION_PROFILER=y
+CONFIG_HIST_TRIGGERS=y
+CONFIG_LKDTM=m
+CONFIG_PERCPU_TEST=m
+CONFIG_ATOMIC64_SELFTEST=y
+CONFIG_TEST_BPF=m
+CONFIG_BUG_ON_DATA_CORRUPTION=y
+CONFIG_S390_PTDUMP=y

arch/s390/configs/zfcpdump_defconfig+17−14

 # CONFIG_SWAP is not set
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
+# CONFIG_CPU_ISOLATION is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 # CONFIG_COMPAT_BRK is not set
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_IBM_PARTITION=y
-CONFIG_DEFAULT_DEADLINE=y
 CONFIG_TUNE_ZEC12=y
 # CONFIG_COMPAT is not set
 CONFIG_NR_CPUS=2
-# CONFIG_HOTPLUG_CPU is not set
 CONFIG_HZ_100=y
 # CONFIG_ARCH_RANDOM is not set
-# CONFIG_COMPACTION is not set
+# CONFIG_RELOCATABLE is not set
-# CONFIG_MIGRATION is not set
-# CONFIG_BOUNCE is not set
-# CONFIG_CHECK_STACK is not set
 # CONFIG_CHSC_SCH is not set
 # CONFIG_SCM_BUS is not set
 CONFIG_CRASH_DUMP=y
-# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 # CONFIG_SECCOMP is not set
+# CONFIG_PFAULT is not set
+# CONFIG_S390_HYPFS_FS is not set
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_S390_GUEST is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_IBM_PARTITION=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+# CONFIG_COMPACTION is not set
+# CONFIG_MIGRATION is not set
+# CONFIG_BOUNCE is not set
 CONFIG_NET=y
 # CONFIG_IUCV is not set
 CONFIG_DEVTMPFS=y
 # CONFIG_HVC_IUCV is not set
 # CONFIG_HW_RANDOM_S390 is not set
 CONFIG_RAW_DRIVER=y
-# CONFIG_SCLP_ASYNC is not set
 # CONFIG_HMC_DRV is not set
 # CONFIG_S390_TAPE is not set
 # CONFIG_VMCP is not set
 CONFIG_CONFIGFS_FS=y
 # CONFIG_MISC_FILESYSTEMS is not set
 # CONFIG_NETWORK_FILESYSTEMS is not set
+# CONFIG_DIMLIB is not set
 CONFIG_PRINTK_TIME=y
 CONFIG_DEBUG_INFO=y
 CONFIG_DEBUG_FS=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_RCU_CPU_STALL_TIMEOUT=60
 # CONFIG_FTRACE is not set
-# CONFIG_PFAULT is not set
+# CONFIG_RUNTIME_TESTING_MENU is not set
-# CONFIG_S390_HYPFS_FS is not set
-# CONFIG_VIRTUALIZATION is not set
-# CONFIG_S390_GUEST is not set

arch/s390/include/asm/qdio.h+5−5

  * @sliba: storage list information block address
  * @sla: storage list address
  * @slsba: storage list state block address
- * @akey: access key for DLIB
+ * @akey: access key for SLIB
  * @bkey: access key for SL
  * @ckey: access key for SBALs
  * @dkey: access key for SLSB
 /**
  * struct qdr - queue description record (QDR)
  * @qfmt: queue format
- * @pfmt: implementation dependent parameter format
  * @ac: adapter characteristics
  * @iqdcnt: input queue descriptor count
  * @oqdcnt: output queue descriptor count
- * @iqdsz: inpout queue descriptor size
+ * @iqdsz: input queue descriptor size
  * @oqdsz: output queue descriptor size
  * @qiba: queue information block address
  * @qkey: queue information block key
  */
 struct qdr {
 	u32 qfmt   : 8;
-	u32 pfmt   : 8;
+	u32	   : 16;
-	u32	   : 8;
 	u32 ac	   : 8;
 	u32	   : 8;
 	u32 iqdcnt : 8;
  * struct qdio_initialize - qdio initialization data
  * @cdev: associated ccw device
  * @q_format: queue format
+ * @qdr_ac: feature flags to set
  * @adapter_name: name for the adapter
  * @qib_param_field_format: format for qib_parm_field
  * @qib_param_field: pointer to 128 bytes or NULL, if no param field
  * @input_handler: handler to be called for input queues
  * @output_handler: handler to be called for output queues
  * @queue_start_poll_array: polling handlers (one per input queue or NULL)
+ * @scan_threshold: # of in-use buffers that triggers scan on output queue
  * @int_parm: interruption parameter
  * @input_sbal_addr_array:  address of no_input_qs * 128 pointers
  * @output_sbal_addr_array: address of no_output_qs * 128 pointers

arch/s390/include/asm/setup.h+1−0

@@ -84,6 +84,7 @@ extern int noexec_disabled; · 83 unmodified lines
84	extern int memory_end_set;	84	extern int memory_end_set;
85	extern unsigned long memory_end;	85	extern unsigned long memory_end;
86	extern unsigned long max_physmem_end;	86	extern unsigned long max_physmem_end;
		87	extern unsigned long __swsusp_reset_dma;
87		88
88	#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM)	89	#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM)
89	#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM)	90	#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM)

arch/s390/kernel/dumpstack.c+1−5

 	 * If it comes up a second time then there's something wrong going on:
 	 * just break out and report an unknown stack type.
 	 */
-	if (*visit_mask & (1UL << info->type)) {
+	if (*visit_mask & (1UL << info->type))
-		printk_deferred_once(KERN_WARNING
-			"WARNING: stack recursion on stack type %d\n",
-			info->type);
 		goto unknown;
-	}
 	*visit_mask |= 1UL << info->type;
 	return 0;
 unknown:

arch/s390/kernel/head64.S+0−7

@@ -60,12 +60,5 @@ ENTRY(startup_continue) · 59 unmodified lines
60		60
61	.align 16	61	.align 16
62	.LPG1:	62	.LPG1:
63	.Lpcmsk:.quad 0x0000000180000000
64	.L4malign:.quad 0xffffffffffc00000
65	.Lscan2g:.quad 0x80000000 + 0x20000 - 8 # 2GB + 128K - 8
66	.Lnop: .long 0x07000700
67	.Lparmaddr:
68	.quad PARMAREA
69	.align 64
70	.Ldw: .quad 0x0002000180000000,0x0000000000000000	63	.Ldw: .quad 0x0002000180000000,0x0000000000000000
71	.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0	64	.Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0

arch/s390/kernel/ipl.c+0−9

 #include <asm/os_info.h>
 #include <asm/sections.h>
 #include <asm/boot_data.h>
-#include <asm/uv.h>
 #include "entry.h"
 #define IPL_PARM_BLOCK_VERSION 0
 {
 	switch (reipl_type) {
 	case IPL_TYPE_CCW:
-		uv_set_shared(__pa(reipl_block_ccw));
 		diag308(DIAG308_SET, reipl_block_ccw);
-		uv_remove_shared(__pa(reipl_block_ccw));
 		diag308(DIAG308_LOAD_CLEAR, NULL);
 		break;
 	case IPL_TYPE_FCP:
-		uv_set_shared(__pa(reipl_block_fcp));
 		diag308(DIAG308_SET, reipl_block_fcp);
-		uv_remove_shared(__pa(reipl_block_fcp));
 		diag308(DIAG308_LOAD_CLEAR, NULL);
 		break;
 	case IPL_TYPE_NSS:
-		uv_set_shared(__pa(reipl_block_nss));
 		diag308(DIAG308_SET, reipl_block_nss);
-		uv_remove_shared(__pa(reipl_block_nss));
 		diag308(DIAG308_LOAD_CLEAR, NULL);
 		break;
 	case IPL_TYPE_UNKNOWN:
 static void diag308_dump(void *dump_block)
 {
-	uv_set_shared(__pa(dump_block));
 	diag308(DIAG308_SET, dump_block);
-	uv_remove_shared(__pa(dump_block));
 	while (1) {
 		if (diag308(DIAG308_LOAD_NORMAL_DUMP, NULL) != 0x302)
 			break;

arch/s390/kernel/machine_kexec_reloc.c+1−0

@@ -1,5 +1,6 @@
1	// SPDX-License-Identifier: GPL-2.0	1	// SPDX-License-Identifier: GPL-2.0
2	#include <linux/elf.h>	2	#include <linux/elf.h>
		3	#include <asm/kexec.h>
3		4
4	int arch_kexec_do_relocs(int r_type, void *loc, unsigned long val,	5	int arch_kexec_do_relocs(int r_type, void *loc, unsigned long val,
5	unsigned long addr)	6	unsigned long addr)

arch/s390/kernel/perf_cpum_cf_diag.c+1−1

@@ -34,7 +34,7 @@ struct cf_diag_csd { /* Counter set data per CPU */ · 33 unmodified lines
34	unsigned char start[PAGE_SIZE]; /* Counter set at event start */	34	unsigned char start[PAGE_SIZE]; /* Counter set at event start */
35	unsigned char data[PAGE_SIZE]; /* Counter set at event delete */	35	unsigned char data[PAGE_SIZE]; /* Counter set at event delete */
36	};	36	};
37	DEFINE_PER_CPU(struct cf_diag_csd, cf_diag_csd);	37	static DEFINE_PER_CPU(struct cf_diag_csd, cf_diag_csd);
38		38
39	/* Counter sets are stored as data stream in a page sized memory buffer and	39	/* Counter sets are stored as data stream in a page sized memory buffer and
40	* exported to user space via raw data attached to the event sample data.	40	* exported to user space via raw data attached to the event sample data.

arch/s390/kernel/setup.c+1−2

@@ -1114,8 +1114,7 @@ void __init setup_arch(char **cmdline_p) · 1113 unmodified lines
1114		1114
1115	ROOT_DEV = Root_RAM0;	1115	ROOT_DEV = Root_RAM0;
1116		1116
1117	/* Is init_mm really needed? */	1117	init_mm.start_code = (unsigned long) _text;
1118	init_mm.start_code = PAGE_OFFSET;
1119	init_mm.end_code = (unsigned long) _etext;	1118	init_mm.end_code = (unsigned long) _etext;
1120	init_mm.end_data = (unsigned long) _edata;	1119	init_mm.end_data = (unsigned long) _edata;
1121	init_mm.brk = (unsigned long) _end;	1120	init_mm.brk = (unsigned long) _end;

arch/s390/kernel/vdso.c+0−5

 	if (!vdso_enabled)
 		return 0;
-	/*
-	 * Only map the vdso for dynamically linked elf binaries.
-	 */
-	if (!uses_interp)
-		return 0;
 	vdso_pages = vdso64_pages;
 #ifdef CONFIG_COMPAT_VDSO

arch/s390/kernel/vmlinux.lds.S+4−6

 SECTIONS
 {
 	. = 0x100000;
-	_stext = .;		/* Start of text section */
 	.text : {
-		/* Text and read-only data */
+		_stext = .;		/* Start of text section */
-		_text = .;
+		_text = .;		/* Text and read-only data */
 		HEAD_TEXT
 		TEXT_TEXT
 		SCHED_TEXT
 		*(.text.*_indirect_*)
 		*(.fixup)
 		*(.gnu.warning)
+		. = ALIGN(PAGE_SIZE);
+		_etext = .;		/* End of text section */
 	} :text = 0x0700
-	. = ALIGN(PAGE_SIZE);
-	_etext = .;		/* End of text section */
 	NOTES :text :note
 	.dummy : { *(.dummy) } :data

arch/s390/kvm/kvm-s390.c+0−10

@@ -2516,16 +2516,6 @@ out_err: · 2515 unmodified lines
2516	return rc;	2516	return rc;
2517	}	2517	}
2518		2518
2519	bool kvm_arch_has_vcpu_debugfs(void)
2520	{
2521	return false;
2522	}
2523
2524	int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu)
2525	{
2526	return 0;
2527	}
2528
2529	void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)	2519	void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
2530	{	2520	{
2531	VCPU_EVENT(vcpu, 3, "%s", "free cpu");	2521	VCPU_EVENT(vcpu, 3, "%s", "free cpu");

arch/s390/lib/xor.c+1−0

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	#include <linux/types.h>	9	#include <linux/types.h>
10	#include <linux/export.h>	10	#include <linux/export.h>
11	#include <linux/raid/xor.h>	11	#include <linux/raid/xor.h>
		12	#include <asm/xor.h>
12		13
13	static void xor_xc_2(unsigned long bytes, unsigned long p1, unsigned long p2)	14	static void xor_xc_2(unsigned long bytes, unsigned long p1, unsigned long p2)
14	{	15	{

arch/s390/mm/dump_pagetables.c+6−6

 	}
 #endif
-	for (i = 0; i < PTRS_PER_PMD && addr < max_addr; i++) {
+	pmd = pmd_offset(pud, addr);
+	for (i = 0; i < PTRS_PER_PMD && addr < max_addr; i++, pmd++) {
 		st->current_address = addr;
-		pmd = pmd_offset(pud, addr);
 		if (!pmd_none(*pmd)) {
 			if (pmd_large(*pmd)) {
 				prot = pmd_val(*pmd) &
 	}
 #endif
-	for (i = 0; i < PTRS_PER_PUD && addr < max_addr; i++) {
+	pud = pud_offset(p4d, addr);
+	for (i = 0; i < PTRS_PER_PUD && addr < max_addr; i++, pud++) {
 		st->current_address = addr;
-		pud = pud_offset(p4d, addr);
 		if (!pud_none(*pud))
 			if (pud_large(*pud)) {
 				prot = pud_val(*pud) &
 	}
 #endif
-	for (i = 0; i < PTRS_PER_P4D && addr < max_addr; i++) {
+	p4d = p4d_offset(pgd, addr);
+	for (i = 0; i < PTRS_PER_P4D && addr < max_addr; i++, p4d++) {
 		st->current_address = addr;
-		p4d = p4d_offset(pgd, addr);
 		if (!p4d_none(*p4d))
 			walk_pud_level(m, st, p4d, addr);
 		else

arch/s390/mm/fault.c+3−0

 	case VM_FAULT_BADACCESS:
 		if (access == VM_EXEC && signal_return(regs) == 0)
 			break;
+		/* fallthrough */
 	case VM_FAULT_BADMAP:
 		/* Bad memory access. Check if it is kernel or user space. */
 		if (user_mode(regs)) {
 			do_sigsegv(regs, si_code);
 			break;
 		}
+		/* fallthrough */
 	case VM_FAULT_BADCONTEXT:
+		/* fallthrough */
 	case VM_FAULT_PFAULT:
 		do_no_context(regs);
 		break;

arch/s390/mm/gmap.c+2−2

@@ -2424,8 +2424,8 @@ EXPORT_SYMBOL_GPL(gmap_pmdp_idte_global); · 2423 unmodified lines
2424	* This function is assumed to be called with the guest_table_lock	2424	* This function is assumed to be called with the guest_table_lock
2425	* held.	2425	* held.
2426	*/	2426	*/
2427	bool gmap_test_and_clear_dirty_pmd(struct gmap gmap, pmd_t pmdp,	2427	static bool gmap_test_and_clear_dirty_pmd(struct gmap gmap, pmd_t pmdp,
2428	unsigned long gaddr)	2428	unsigned long gaddr)
2429	{	2429	{
2430	if (pmd_val(*pmdp) & _SEGMENT_ENTRY_INVALID)	2430	if (pmd_val(*pmdp) & _SEGMENT_ENTRY_INVALID)
2431	return false;	2431	return false;

arch/s390/scripts/Makefile.chkbss+1−2

@@ -11,8 +11,7 @@ chkbss: $(addprefix $(obj)/, $(chkbss-files)) · 10 unmodified lines
11		11
12	quiet_cmd_chkbss = CHKBSS $<	12	quiet_cmd_chkbss = CHKBSS $<
13	cmd_chkbss = \	13	cmd_chkbss = \
14	if $(OBJDUMP) -h $< \| grep -q "\.bss" && \	14	if ! $(OBJSIZE) --common $< \| $(AWK) 'END { if ($$3) exit 1 }'; then \
15	! $(OBJDUMP) -j .bss -w -h $< \| awk 'END { if ($$3) exit 1 }'; then \
16	echo "error: $< .bss section is not empty" >&2; exit 1; \	15	echo "error: $< .bss section is not empty" >&2; exit 1; \
17	fi; \	16	fi; \
18	touch $@;	17	touch $@;

arch/x86/boot/string.c+8−0

@@ -37,6 +37,14 @@ int memcmp(const void s1, const void s2, size_t len) · 36 unmodified lines
37	return diff;	37	return diff;
38	}	38	}
39		39
		40	/*
		41	* Clang may lower `memcmp == 0` to `bcmp == 0`.
		42	*/
		43	int bcmp(const void s1, const void s2, size_t len)
		44	{
		45	return memcmp(s1, s2, len);
		46	}
		47
40	int strcmp(const char str1, const char str2)	48	int strcmp(const char str1, const char str2)
41	{	49	{
42	const unsigned char s1 = (const unsigned char )str1;	50	const unsigned char s1 = (const unsigned char )str1;

arch/x86/entry/calling.h+17−0

@@ -314,6 +314,23 @@ For 32-bit we have the following conventions - kernel is built with · 313 unmodified lines
314		314
315	#endif	315	#endif
316		316
		317	/*
		318	* Mitigate Spectre v1 for conditional swapgs code paths.
		319	*
		320	* FENCE_SWAPGS_USER_ENTRY is used in the user entry swapgs code path, to
		321	* prevent a speculative swapgs when coming from kernel space.
		322	*
		323	* FENCE_SWAPGS_KERNEL_ENTRY is used in the kernel entry non-swapgs code path,
		324	* to prevent the swapgs from getting speculatively skipped when coming from
		325	* user space.
		326	*/
		327	.macro FENCE_SWAPGS_USER_ENTRY
		328	ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_USER
		329	.endm
		330	.macro FENCE_SWAPGS_KERNEL_ENTRY
		331	ALTERNATIVE "", "lfence", X86_FEATURE_FENCE_SWAPGS_KERNEL
		332	.endm
		333
317	.macro STACKLEAK_ERASE_NOCLOBBER	334	.macro STACKLEAK_ERASE_NOCLOBBER
318	#ifdef CONFIG_GCC_PLUGIN_STACKLEAK	335	#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
319	PUSH_AND_CLEAR_REGS	336	PUSH_AND_CLEAR_REGS

arch/x86/entry/entry_64.S+18−3

@@ -519,7 +519,7 @@ ENTRY(interrupt_entry) · 518 unmodified lines
519	testb $3, CS-ORIG_RAX+8(%rsp)	519	testb $3, CS-ORIG_RAX+8(%rsp)
520	jz 1f	520	jz 1f
521	SWAPGS	521	SWAPGS
522		522	FENCE_SWAPGS_USER_ENTRY
523	/*	523	/*
524	* Switch to the thread stack. The IRET frame and orig_ax are	524	* Switch to the thread stack. The IRET frame and orig_ax are
525	* on the stack, as well as the return address. RDI..R12 are	525	* on the stack, as well as the return address. RDI..R12 are
@@ -549,8 +549,10 @@ ENTRY(interrupt_entry) · 23 unmodified lines
549	UNWIND_HINT_FUNC	549	UNWIND_HINT_FUNC
550		550
551	movq (%rdi), %rdi	551	movq (%rdi), %rdi
		552	jmp 2f
552	1:	553	1:
553		554	FENCE_SWAPGS_KERNEL_ENTRY
		555	2:
554	PUSH_AND_CLEAR_REGS save_ret=1	556	PUSH_AND_CLEAR_REGS save_ret=1
555	ENCODE_FRAME_POINTER 8	557	ENCODE_FRAME_POINTER 8
556		558
@@ -1238,6 +1240,13 @@ ENTRY(paranoid_entry) · 681 unmodified lines
1238	*/	1240	*/
1239	SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg=%rax save_reg=%r14	1241	SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg=%rax save_reg=%r14
1240		1242
		1243	/*
		1244	* The above SAVE_AND_SWITCH_TO_KERNEL_CR3 macro doesn't do an
		1245	* unconditional CR3 write, even in the PTI case. So do an lfence
		1246	* to prevent GS speculation, regardless of whether PTI is enabled.
		1247	*/
		1248	FENCE_SWAPGS_KERNEL_ENTRY
		1249
1241	ret	1250	ret
1242	END(paranoid_entry)	1251	END(paranoid_entry)
1243		1252
@@ -1288,6 +1297,7 @@ ENTRY(error_entry) · 44 unmodified lines
1288	* from user mode due to an IRET fault.	1297	* from user mode due to an IRET fault.
1289	*/	1298	*/
1290	SWAPGS	1299	SWAPGS
		1300	FENCE_SWAPGS_USER_ENTRY
1291	/* We have user CR3. Change to kernel CR3. */	1301	/* We have user CR3. Change to kernel CR3. */
1292	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax	1302	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
1293		1303
@@ -1301,6 +1311,8 @@ ENTRY(error_entry) · 7 unmodified lines
1301	pushq %r12	1311	pushq %r12
1302	ret	1312	ret
1303		1313
		1314	.Lerror_entry_done_lfence:
		1315	FENCE_SWAPGS_KERNEL_ENTRY
1304	.Lerror_entry_done:	1316	.Lerror_entry_done:
1305	ret	1317	ret
1306		1318
@@ -1318,7 +1330,7 @@ ENTRY(error_entry) · 11 unmodified lines
1318	cmpq %rax, RIP+8(%rsp)	1330	cmpq %rax, RIP+8(%rsp)
1319	je .Lbstep_iret	1331	je .Lbstep_iret
1320	cmpq $.Lgs_change, RIP+8(%rsp)	1332	cmpq $.Lgs_change, RIP+8(%rsp)
1321	jne .Lerror_entry_done	1333	jne .Lerror_entry_done_lfence
1322		1334
1323	/*	1335	/*
1324	* hack: .Lgs_change can fail with user gsbase. If this happens, fix up	1336	* hack: .Lgs_change can fail with user gsbase. If this happens, fix up
@@ -1326,6 +1338,7 @@ ENTRY(error_entry) · 1 unmodified line
1326	* .Lgs_change's error handler with kernel gsbase.	1338	* .Lgs_change's error handler with kernel gsbase.
1327	*/	1339	*/
1328	SWAPGS	1340	SWAPGS
		1341	FENCE_SWAPGS_USER_ENTRY
1329	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax	1342	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
1330	jmp .Lerror_entry_done	1343	jmp .Lerror_entry_done
1331		1344
@@ -1340,6 +1353,7 @@ ENTRY(error_entry) · 8 unmodified lines
1340	* gsbase and CR3. Switch to kernel gsbase and CR3:	1353	* gsbase and CR3. Switch to kernel gsbase and CR3:
1341	*/	1354	*/
1342	SWAPGS	1355	SWAPGS
		1356	FENCE_SWAPGS_USER_ENTRY
1343	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax	1357	SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
1344		1358
1345	/*	1359	/*
@@ -1431,6 +1445,7 @@ ENTRY(nmi) · 85 unmodified lines
1431		1445
1432	swapgs	1446	swapgs
1433	cld	1447	cld
		1448	FENCE_SWAPGS_USER_ENTRY
1434	SWITCH_TO_KERNEL_CR3 scratch_reg=%rdx	1449	SWITCH_TO_KERNEL_CR3 scratch_reg=%rdx
1435	movq %rsp, %rdx	1450	movq %rsp, %rdx
1436	movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp	1451	movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp

arch/x86/include/asm/cpufeatures.h+3−0

 #define X86_FEATURE_CQM_OCCUP_LLC	(11*32+ 1) /* LLC occupancy monitoring */
 #define X86_FEATURE_CQM_MBM_TOTAL	(11*32+ 2) /* LLC Total MBM monitoring */
 #define X86_FEATURE_CQM_MBM_LOCAL	(11*32+ 3) /* LLC Local MBM monitoring */
+#define X86_FEATURE_FENCE_SWAPGS_USER	(11*32+ 4) /* "" LFENCE in user entry SWAPGS path */
+#define X86_FEATURE_FENCE_SWAPGS_KERNEL	(11*32+ 5) /* "" LFENCE in kernel entry SWAPGS path */
 /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
 #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
 #define X86_BUG_L1TF			X86_BUG(18) /* CPU is affected by L1 Terminal Fault */
 #define X86_BUG_MDS			X86_BUG(19) /* CPU is affected by Microarchitectural data sampling */
 #define X86_BUG_MSBDS_ONLY		X86_BUG(20) /* CPU is only affected by the  MSDBS variant of BUG_MDS */
+#define X86_BUG_SWAPGS			X86_BUG(21) /* CPU is affected by speculation through SWAPGS */
 #endif /* _ASM_X86_CPUFEATURES_H */

arch/x86/include/asm/kvm_host.h+3−0

 #include <asm/kvm_vcpu_regs.h>
 #include <asm/hyperv-tlfs.h>
+#define __KVM_HAVE_ARCH_VCPU_DEBUGFS
 #define KVM_MAX_VCPUS 288
 #define KVM_SOFT_MAX_VCPUS 240
 #define KVM_MAX_VCPU_ID 1023
 	int (*update_pi_irte)(struct kvm *kvm, unsigned int host_irq,
 			      uint32_t guest_irq, bool set);
 	void (*apicv_post_state_restore)(struct kvm_vcpu *vcpu);
+	bool (*dy_apicv_has_pending_interrupt)(struct kvm_vcpu *vcpu);
 	int (*set_hv_timer)(struct kvm_vcpu *vcpu, u64 guest_deadline_tsc,
 			    bool *expired);

arch/x86/include/asm/vdso/gettimeofday.h+36−0

@@ -96,6 +96,8 @@ long clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 95 unmodified lines
96		96
97	#else	97	#else
98		98
		99	#define VDSO_HAS_32BIT_FALLBACK 1
		100
99	static __always_inline	101	static __always_inline
100	long clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)	102	long clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts)
101	{	103	{
@@ -113,6 +115,23 @@ long clock_gettime_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 11 unmodified lines
113	return ret;	115	return ret;
114	}	116	}
115		117
		118	static __always_inline
		119	long clock_gettime32_fallback(clockid_t _clkid, struct old_timespec32 *_ts)
		120	{
		121	long ret;
		122
		123	asm (
		124	"mov %%ebx, %%edx \n"
		125	"mov %[clock], %%ebx \n"
		126	"call __kernel_vsyscall \n"
		127	"mov %%edx, %%ebx \n"
		128	: "=a" (ret), "=m" (*_ts)
		129	: "0" (__NR_clock_gettime), [clock] "g" (_clkid), "c" (_ts)
		130	: "edx");
		131
		132	return ret;
		133	}
		134
116	static __always_inline	135	static __always_inline
117	long gettimeofday_fallback(struct __kernel_old_timeval *_tv,	136	long gettimeofday_fallback(struct __kernel_old_timeval *_tv,
118	struct timezone *_tz)	137	struct timezone *_tz)
@@ -148,6 +167,23 @@ clock_getres_fallback(clockid_t _clkid, struct __kernel_timespec *_ts) · 29 unmodified lines
148	return ret;	167	return ret;
149	}	168	}
150		169
		170	static __always_inline
		171	long clock_getres32_fallback(clockid_t _clkid, struct old_timespec32 *_ts)
		172	{
		173	long ret;
		174
		175	asm (
		176	"mov %%ebx, %%edx \n"
		177	"mov %[clock], %%ebx \n"
		178	"call __kernel_vsyscall \n"
		179	"mov %%edx, %%ebx \n"
		180	: "=a" (ret), "=m" (*_ts)
		181	: "0" (__NR_clock_getres), [clock] "g" (_clkid), "c" (_ts)
		182	: "edx");
		183
		184	return ret;
		185	}
		186
151	#endif	187	#endif
152		188
153	#ifdef CONFIG_PARAVIRT_CLOCK	189	#ifdef CONFIG_PARAVIRT_CLOCK

arch/x86/kernel/cpu/bugs.c+96−9

@@ -34,6 +34,7 @@ · 33 unmodified lines
34		34
35	#include "cpu.h"	35	#include "cpu.h"
36		36
		37	static void __init spectre_v1_select_mitigation(void);
37	static void __init spectre_v2_select_mitigation(void);	38	static void __init spectre_v2_select_mitigation(void);
38	static void __init ssb_select_mitigation(void);	39	static void __init ssb_select_mitigation(void);
39	static void __init l1tf_select_mitigation(void);	40	static void __init l1tf_select_mitigation(void);
@@ -98,17 +99,11 @@ void __init check_bugs(void) · 58 unmodified lines
98	if (boot_cpu_has(X86_FEATURE_STIBP))	99	if (boot_cpu_has(X86_FEATURE_STIBP))
99	x86_spec_ctrl_mask \|= SPEC_CTRL_STIBP;	100	x86_spec_ctrl_mask \|= SPEC_CTRL_STIBP;
100		101
101	/* Select the proper spectre mitigation before patching alternatives */	102	/* Select the proper CPU mitigations before patching alternatives: */
		103	spectre_v1_select_mitigation();
102	spectre_v2_select_mitigation();	104	spectre_v2_select_mitigation();
103
104	/*
105	* Select proper mitigation for any exposure to the Speculative Store
106	* Bypass vulnerability.
107	*/
108	ssb_select_mitigation();	105	ssb_select_mitigation();
109
110	l1tf_select_mitigation();	106	l1tf_select_mitigation();
111
112	mds_select_mitigation();	107	mds_select_mitigation();
113		108
114	arch_smt_update();	109	arch_smt_update();
@@ -273,6 +268,98 @@ static int __init mds_cmdline(char *str) · 158 unmodified lines
273	}	268	}
274	early_param("mds", mds_cmdline);	269	early_param("mds", mds_cmdline);
275		270
		271	#undef pr_fmt
		272	#define pr_fmt(fmt) "Spectre V1 : " fmt
		273
		274	enum spectre_v1_mitigation {
		275	SPECTRE_V1_MITIGATION_NONE,
		276	SPECTRE_V1_MITIGATION_AUTO,
		277	};
		278
		279	static enum spectre_v1_mitigation spectre_v1_mitigation __ro_after_init =
		280	SPECTRE_V1_MITIGATION_AUTO;
		281
		282	static const char * const spectre_v1_strings[] = {
		283	[SPECTRE_V1_MITIGATION_NONE] = "Vulnerable: __user pointer sanitization and usercopy barriers only; no swapgs barriers",
		284	[SPECTRE_V1_MITIGATION_AUTO] = "Mitigation: usercopy/swapgs barriers and __user pointer sanitization",
		285	};
		286
		287	/*
		288	* Does SMAP provide full mitigation against speculative kernel access to
		289	* userspace?
		290	*/
		291	static bool smap_works_speculatively(void)
		292	{
		293	if (!boot_cpu_has(X86_FEATURE_SMAP))
		294	return false;
		295
		296	/*
		297	* On CPUs which are vulnerable to Meltdown, SMAP does not
		298	* prevent speculative access to user data in the L1 cache.
		299	* Consider SMAP to be non-functional as a mitigation on these
		300	* CPUs.
		301	*/
		302	if (boot_cpu_has(X86_BUG_CPU_MELTDOWN))
		303	return false;
		304
		305	return true;
		306	}
		307
		308	static void __init spectre_v1_select_mitigation(void)
		309	{
		310	if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V1) \|\| cpu_mitigations_off()) {
		311	spectre_v1_mitigation = SPECTRE_V1_MITIGATION_NONE;
		312	return;
		313	}
		314
		315	if (spectre_v1_mitigation == SPECTRE_V1_MITIGATION_AUTO) {
		316	/*
		317	* With Spectre v1, a user can speculatively control either
		318	* path of a conditional swapgs with a user-controlled GS
		319	* value. The mitigation is to add lfences to both code paths.
		320	*
		321	* If FSGSBASE is enabled, the user can put a kernel address in
		322	* GS, in which case SMAP provides no protection.
		323	*
		324	* [ NOTE: Don't check for X86_FEATURE_FSGSBASE until the
		325	* FSGSBASE enablement patches have been merged. ]
		326	*
		327	* If FSGSBASE is disabled, the user can only put a user space
		328	* address in GS. That makes an attack harder, but still
		329	* possible if there's no SMAP protection.
		330	*/
		331	if (!smap_works_speculatively()) {
		332	/*
		333	* Mitigation can be provided from SWAPGS itself or
		334	* PTI as the CR3 write in the Meltdown mitigation
		335	* is serializing.
		336	*
		337	* If neither is there, mitigate with an LFENCE to
		338	* stop speculation through swapgs.
		339	*/
		340	if (boot_cpu_has_bug(X86_BUG_SWAPGS) &&
		341	!boot_cpu_has(X86_FEATURE_PTI))
		342	setup_force_cpu_cap(X86_FEATURE_FENCE_SWAPGS_USER);
		343
		344	/*
		345	* Enable lfences in the kernel entry (non-swapgs)
		346	* paths, to prevent user entry from speculatively
		347	* skipping swapgs.
		348	*/
		349	setup_force_cpu_cap(X86_FEATURE_FENCE_SWAPGS_KERNEL);
		350	}
		351	}
		352
		353	pr_info("%s\n", spectre_v1_strings[spectre_v1_mitigation]);
		354	}
		355
		356	static int __init nospectre_v1_cmdline(char *str)
		357	{
		358	spectre_v1_mitigation = SPECTRE_V1_MITIGATION_NONE;
		359	return 0;
		360	}
		361	early_param("nospectre_v1", nospectre_v1_cmdline);
		362
276	#undef pr_fmt	363	#undef pr_fmt
277	#define pr_fmt(fmt) "Spectre V2 : " fmt	364	#define pr_fmt(fmt) "Spectre V2 : " fmt
278		365
@@ -1290,7 +1377,7 @@ static ssize_t cpu_show_common(struct device dev, struct device_attribute attr · 1011 unmodified lines
1290	break;	1377	break;
1291		1378
1292	case X86_BUG_SPECTRE_V1:	1379	case X86_BUG_SPECTRE_V1:
1293	return sprintf(buf, "Mitigation: __user pointer sanitization\n");	1380	return sprintf(buf, "%s\n", spectre_v1_strings[spectre_v1_mitigation]);
1294		1381
1295	case X86_BUG_SPECTRE_V2:	1382	case X86_BUG_SPECTRE_V2:
1296	return sprintf(buf, "%s%s%s%s%s%s\n", spectre_v2_strings[spectre_v2_enabled],	1383	return sprintf(buf, "%s%s%s%s%s%s\n", spectre_v2_strings[spectre_v2_enabled],

arch/x86/kernel/cpu/common.c+28−16

 #define NO_L1TF		BIT(3)
 #define NO_MDS		BIT(4)
 #define MSBDS_ONLY	BIT(5)
+#define NO_SWAPGS	BIT(6)
 #define VULNWL(_vendor, _family, _model, _whitelist)	\
 	{ X86_VENDOR_##_vendor, _family, _model, X86_FEATURE_ANY, _whitelist }
 	VULNWL_INTEL(ATOM_BONNELL,		NO_SPECULATION),
 	VULNWL_INTEL(ATOM_BONNELL_MID,		NO_SPECULATION),
-	VULNWL_INTEL(ATOM_SILVERMONT,		NO_SSB | NO_L1TF | MSBDS_ONLY),
+	VULNWL_INTEL(ATOM_SILVERMONT,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS),
-	VULNWL_INTEL(ATOM_SILVERMONT_X,		NO_SSB | NO_L1TF | MSBDS_ONLY),
+	VULNWL_INTEL(ATOM_SILVERMONT_X,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS),
-	VULNWL_INTEL(ATOM_SILVERMONT_MID,	NO_SSB | NO_L1TF | MSBDS_ONLY),
+	VULNWL_INTEL(ATOM_SILVERMONT_MID,	NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS),
-	VULNWL_INTEL(ATOM_AIRMONT,		NO_SSB | NO_L1TF | MSBDS_ONLY),
+	VULNWL_INTEL(ATOM_AIRMONT,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS),
-	VULNWL_INTEL(XEON_PHI_KNL,		NO_SSB | NO_L1TF | MSBDS_ONLY),
+	VULNWL_INTEL(XEON_PHI_KNL,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS),
-	VULNWL_INTEL(XEON_PHI_KNM,		NO_SSB | NO_L1TF | MSBDS_ONLY),
+	VULNWL_INTEL(XEON_PHI_KNM,		NO_SSB | NO_L1TF | MSBDS_ONLY | NO_SWAPGS),
 	VULNWL_INTEL(CORE_YONAH,		NO_SSB),
-	VULNWL_INTEL(ATOM_AIRMONT_MID,		NO_L1TF | MSBDS_ONLY),
+	VULNWL_INTEL(ATOM_AIRMONT_MID,		NO_L1TF | MSBDS_ONLY | NO_SWAPGS),
-	VULNWL_INTEL(ATOM_GOLDMONT,		NO_MDS | NO_L1TF),
+	VULNWL_INTEL(ATOM_GOLDMONT,		NO_MDS | NO_L1TF | NO_SWAPGS),
-	VULNWL_INTEL(ATOM_GOLDMONT_X,		NO_MDS | NO_L1TF),
+	VULNWL_INTEL(ATOM_GOLDMONT_X,		NO_MDS | NO_L1TF | NO_SWAPGS),
-	VULNWL_INTEL(ATOM_GOLDMONT_PLUS,	NO_MDS | NO_L1TF),
+	VULNWL_INTEL(ATOM_GOLDMONT_PLUS,	NO_MDS | NO_L1TF | NO_SWAPGS),
+	/*
+	 * Technically, swapgs isn't serializing on AMD (despite it previously
+	 * being documented as such in the APM).  But according to AMD, %gs is
+	 * updated non-speculatively, and the issuing of %gs-relative memory
+	 * operands will be blocked until the %gs update completes, which is
+	 * good enough for our purposes.
+	 */
 	/* AMD Family 0xf - 0x12 */
-	VULNWL_AMD(0x0f,	NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS),
+	VULNWL_AMD(0x0f,	NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS),
-	VULNWL_AMD(0x10,	NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS),
+	VULNWL_AMD(0x10,	NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS),
-	VULNWL_AMD(0x11,	NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS),
+	VULNWL_AMD(0x11,	NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS),
-	VULNWL_AMD(0x12,	NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS),
+	VULNWL_AMD(0x12,	NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS),
 	/* FAMILY_ANY must be last, otherwise 0x0f - 0x12 matches won't work */
-	VULNWL_AMD(X86_FAMILY_ANY,	NO_MELTDOWN | NO_L1TF | NO_MDS),
+	VULNWL_AMD(X86_FAMILY_ANY,	NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS),
-	VULNWL_HYGON(X86_FAMILY_ANY,	NO_MELTDOWN | NO_L1TF | NO_MDS),
+	VULNWL_HYGON(X86_FAMILY_ANY,	NO_MELTDOWN | NO_L1TF | NO_MDS | NO_SWAPGS),
 	{}
 };
 			setup_force_cpu_bug(X86_BUG_MSBDS_ONLY);
 	}
+	if (!cpu_matches(NO_SWAPGS))
+		setup_force_cpu_bug(X86_BUG_SWAPGS);
 	if (cpu_matches(NO_MELTDOWN))
 		return;

arch/x86/kernel/cpu/mtrr/cyrix.c+1−0

@@ -98,6 +98,7 @@ cyrix_get_free_region(unsigned long base, unsigned long size, int replace_reg) · 97 unmodified lines
98	case 7:	98	case 7:
99	if (size < 0x40)	99	if (size < 0x40)
100	break;	100	break;
		101	/* Else, fall through */
101	case 6:	102	case 6:
102	case 5:	103	case 5:
103	case 4:	104	case 4:

arch/x86/kernel/kvm.c+0−8

 static void kvm_guest_cpu_init(void)
 {
-	if (!kvm_para_available())
-		return;
 	if (kvm_para_has_feature(KVM_FEATURE_ASYNC_PF) && kvmapf) {
 		u64 pa = slow_virt_to_phys(this_cpu_ptr(&apf_reason));
 {
 	int i;
-	if (!kvm_para_available())
-		return;
 	paravirt_ops_setup();
 	register_reboot_notifier(&kvm_pv_reboot_nb);
 	for (i = 0; i < KVM_TASK_SLEEP_HASHSIZE; i++)
  */
 void __init kvm_spinlock_init(void)
 {
-	if (!kvm_para_available())
-		return;
 	/* Does host kernel support KVM_FEATURE_PV_UNHALT? */
 	if (!kvm_para_has_feature(KVM_FEATURE_PV_UNHALT))
 		return;

arch/x86/kernel/ptrace.c+1−0

@@ -201,6 +201,7 @@ static int set_segment_reg(struct task_struct *task, · 200 unmodified lines
201	case offsetof(struct user_regs_struct, ss):	201	case offsetof(struct user_regs_struct, ss):
202	if (unlikely(value == 0))	202	if (unlikely(value == 0))
203	return -EIO;	203	return -EIO;
		204	/* Else, fall through */
204		205
205	default:	206	default:
206	*pt_regs_access(task_pt_regs(task), offset) = value;	207	*pt_regs_access(task_pt_regs(task), offset) = value;

arch/x86/kvm/debugfs.c+13−33

@@ -8,11 +8,6 @@ · 7 unmodified lines
8	#include <linux/debugfs.h>	8	#include <linux/debugfs.h>
9	#include "lapic.h"	9	#include "lapic.h"
10		10
11	bool kvm_arch_has_vcpu_debugfs(void)
12	{
13	return true;
14	}
15
16	static int vcpu_get_timer_advance_ns(void data, u64 val)	11	static int vcpu_get_timer_advance_ns(void data, u64 val)
17	{	12	{
18	struct kvm_vcpu vcpu = (struct kvm_vcpu ) data;	13	struct kvm_vcpu vcpu = (struct kvm_vcpu ) data;
@@ -48,37 +43,22 @@ static int vcpu_get_tsc_scaling_frac_bits(void data, u64 val) · 29 unmodified lines
48		43
49	DEFINE_SIMPLE_ATTRIBUTE(vcpu_tsc_scaling_frac_fops, vcpu_get_tsc_scaling_frac_bits, NULL, "%llu\n");	44	DEFINE_SIMPLE_ATTRIBUTE(vcpu_tsc_scaling_frac_fops, vcpu_get_tsc_scaling_frac_bits, NULL, "%llu\n");
50		45
51	int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu)	46	void kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu)
52	{	47	{
53	struct dentry *ret;	48	debugfs_create_file("tsc-offset", 0444, vcpu->debugfs_dentry, vcpu,
54		49	&vcpu_tsc_offset_fops);
55	ret = debugfs_create_file("tsc-offset", 0444,
56	vcpu->debugfs_dentry,
57	vcpu, &vcpu_tsc_offset_fops);
58	if (!ret)
59	return -ENOMEM;
60		50
61	if (lapic_in_kernel(vcpu)) {	51	if (lapic_in_kernel(vcpu))
62	ret = debugfs_create_file("lapic_timer_advance_ns", 0444,	52	debugfs_create_file("lapic_timer_advance_ns", 0444,
63	vcpu->debugfs_dentry,	53	vcpu->debugfs_dentry, vcpu,
64	vcpu, &vcpu_timer_advance_ns_fops);	54	&vcpu_timer_advance_ns_fops);
65	if (!ret)
66	return -ENOMEM;
67	}
68		55
69	if (kvm_has_tsc_control) {	56	if (kvm_has_tsc_control) {
70	ret = debugfs_create_file("tsc-scaling-ratio", 0444,	57	debugfs_create_file("tsc-scaling-ratio", 0444,
71	vcpu->debugfs_dentry,	58	vcpu->debugfs_dentry, vcpu,
72	vcpu, &vcpu_tsc_scaling_fops);	59	&vcpu_tsc_scaling_fops);
73	if (!ret)	60	debugfs_create_file("tsc-scaling-ratio-frac-bits", 0444,
74	return -ENOMEM;	61	vcpu->debugfs_dentry, vcpu,
75	ret = debugfs_create_file("tsc-scaling-ratio-frac-bits", 0444,	62	&vcpu_tsc_scaling_frac_fops);
76	vcpu->debugfs_dentry,
77	vcpu, &vcpu_tsc_scaling_frac_fops);
78	if (!ret)
79	return -ENOMEM;
80
81	}	63	}
82
83	return 0;
84	}	64	}

arch/x86/kvm/lapic.c+0−8

 static void apic_timer_expired(struct kvm_lapic *apic)
 {
 	struct kvm_vcpu *vcpu = apic->vcpu;
-	struct swait_queue_head *q = &vcpu->wq;
 	struct kvm_timer *ktimer = &apic->lapic_timer;
 	if (atomic_read(&apic->lapic_timer.pending))
 	atomic_inc(&apic->lapic_timer.pending);
 	kvm_set_pending_timer(vcpu);
-	/*
-	 * For x86, the atomic_inc() is serialized, thus
-	 * using swait_active() is safe.
-	 */
-	if (swait_active(q))
-		swake_up_one(q);
 }
 static void start_sw_tscdeadline(struct kvm_lapic *apic)

arch/x86/kvm/svm.c+6−0

 		kvm_vcpu_wake_up(vcpu);
 }
+static bool svm_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu)
+{
+	return false;
+}
 static void svm_ir_list_del(struct vcpu_svm *svm, struct amd_iommu_pi_data *pi)
 {
 	unsigned long flags;
 	.pmu_ops = &amd_pmu_ops,
 	.deliver_posted_interrupt = svm_deliver_avic_intr,
+	.dy_apicv_has_pending_interrupt = svm_dy_apicv_has_pending_interrupt,
 	.update_pi_irte = svm_update_pi_irte,
 	.setup_mce = svm_setup_mce,

arch/x86/kvm/vmx/vmx.c+6−0

 	return max_irr;
 }
+static bool vmx_dy_apicv_has_pending_interrupt(struct kvm_vcpu *vcpu)
+{
+	return pi_test_on(vcpu_to_pi_desc(vcpu));
+}
 static void vmx_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)
 {
 	if (!kvm_vcpu_apicv_active(vcpu))
 	.guest_apic_has_interrupt = vmx_guest_apic_has_interrupt,
 	.sync_pir_to_irr = vmx_sync_pir_to_irr,
 	.deliver_posted_interrupt = vmx_deliver_posted_interrupt,
+	.dy_apicv_has_pending_interrupt = vmx_dy_apicv_has_pending_interrupt,
 	.set_tss_addr = vmx_set_tss_addr,
 	.set_identity_map_addr = vmx_set_identity_map_addr,

arch/x86/kvm/x86.c+16−0

@@ -9698,6 +9698,22 @@ int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu) · 9697 unmodified lines
9698	return kvm_vcpu_running(vcpu) \|\| kvm_vcpu_has_events(vcpu);	9698	return kvm_vcpu_running(vcpu) \|\| kvm_vcpu_has_events(vcpu);
9699	}	9699	}
9700		9700
		9701	bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
		9702	{
		9703	if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
		9704	return true;
		9705
		9706	if (kvm_test_request(KVM_REQ_NMI, vcpu) \|\|
		9707	kvm_test_request(KVM_REQ_SMI, vcpu) \|\|
		9708	kvm_test_request(KVM_REQ_EVENT, vcpu))
		9709	return true;
		9710
		9711	if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
		9712	return true;
		9713
		9714	return false;
		9715	}
		9716
9701	bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)	9717	bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9702	{	9718	{
9703	return vcpu->arch.preempted_in_kernel;	9719	return vcpu->arch.preempted_in_kernel;

arch/x86/lib/cpu.c+1−0

@@ -1,6 +1,7 @@
1	// SPDX-License-Identifier: GPL-2.0-only	1	// SPDX-License-Identifier: GPL-2.0-only
2	#include <linux/types.h>	2	#include <linux/types.h>
3	#include <linux/export.h>	3	#include <linux/export.h>
		4	#include <asm/cpu.h>
4		5
5	unsigned int x86_family(unsigned int sig)	6	unsigned int x86_family(unsigned int sig)
6	{	7	{

arch/x86/purgatory/Makefile+31−5

@@ -6,6 +6,9 @@ purgatory-y := purgatory.o stack.o setup-x86_$(BITS).o sha256.o entry64.o string · 5 unmodified lines
6	targets += $(purgatory-y)	6	targets += $(purgatory-y)
7	PURGATORY_OBJS = $(addprefix $(obj)/,$(purgatory-y))	7	PURGATORY_OBJS = $(addprefix $(obj)/,$(purgatory-y))
8		8
		9	$(obj)/string.o: $(srctree)/arch/x86/boot/compressed/string.c FORCE
		10	$(call if_changed_rule,cc_o_c)
		11
9	$(obj)/sha256.o: $(srctree)/lib/sha256.c FORCE	12	$(obj)/sha256.o: $(srctree)/lib/sha256.c FORCE
10	$(call if_changed_rule,cc_o_c)	13	$(call if_changed_rule,cc_o_c)
11		14
@@ -17,11 +20,34 @@ KCOV_INSTRUMENT := n · 5 unmodified lines
17		20
18	# Default KBUILD_CFLAGS can have -pg option set when FTRACE is enabled. That	21	# Default KBUILD_CFLAGS can have -pg option set when FTRACE is enabled. That
19	# in turn leaves some undefined symbols like __fentry__ in purgatory and not	22	# in turn leaves some undefined symbols like __fentry__ in purgatory and not
20	# sure how to relocate those. Like kexec-tools, use custom flags.	23	# sure how to relocate those.
21		24	ifdef CONFIG_FUNCTION_TRACER
22	KBUILD_CFLAGS := -fno-strict-aliasing -Wall -Wstrict-prototypes -fno-zero-initialized-in-bss -fno-builtin -ffreestanding -c -Os -mcmodel=large	25	CFLAGS_REMOVE_sha256.o += $(CC_FLAGS_FTRACE)
23	KBUILD_CFLAGS += -m$(BITS)	26	CFLAGS_REMOVE_purgatory.o += $(CC_FLAGS_FTRACE)
24	KBUILD_CFLAGS += $(call cc-option,-fno-PIE)	27	CFLAGS_REMOVE_string.o += $(CC_FLAGS_FTRACE)
		28	CFLAGS_REMOVE_kexec-purgatory.o += $(CC_FLAGS_FTRACE)
		29	endif
		30
		31	ifdef CONFIG_STACKPROTECTOR
		32	CFLAGS_REMOVE_sha256.o += -fstack-protector
		33	CFLAGS_REMOVE_purgatory.o += -fstack-protector
		34	CFLAGS_REMOVE_string.o += -fstack-protector
		35	CFLAGS_REMOVE_kexec-purgatory.o += -fstack-protector
		36	endif
		37
		38	ifdef CONFIG_STACKPROTECTOR_STRONG
		39	CFLAGS_REMOVE_sha256.o += -fstack-protector-strong
		40	CFLAGS_REMOVE_purgatory.o += -fstack-protector-strong
		41	CFLAGS_REMOVE_string.o += -fstack-protector-strong
		42	CFLAGS_REMOVE_kexec-purgatory.o += -fstack-protector-strong
		43	endif
		44
		45	ifdef CONFIG_RETPOLINE
		46	CFLAGS_REMOVE_sha256.o += $(RETPOLINE_CFLAGS)
		47	CFLAGS_REMOVE_purgatory.o += $(RETPOLINE_CFLAGS)
		48	CFLAGS_REMOVE_string.o += $(RETPOLINE_CFLAGS)
		49	CFLAGS_REMOVE_kexec-purgatory.o += $(RETPOLINE_CFLAGS)
		50	endif
25		51
26	$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE	52	$(obj)/purgatory.ro: $(PURGATORY_OBJS) FORCE
27	$(call if_changed,ld)	53	$(call if_changed,ld)

arch/x86/purgatory/purgatory.c+6−0

@@ -68,3 +68,9 @@ void purgatory(void) · 67 unmodified lines
68	}	68	}
69	copy_backup_region();	69	copy_backup_region();
70	}	70	}
		71
		72	/*
		73	* Defined in order to reuse memcpy() and memset() from
		74	* arch/x86/boot/compressed/string.c
		75	*/
		76	void warn(const char *msg) {}

arch/x86/purgatory/string.c+0−23

@@ -1,23 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* Simple string functions.
4	*
5	* Copyright (C) 2014 Red Hat Inc.
6	*
7	* Author:
8	* Vivek Goyal <vgoyal@redhat.com>
9	*/
10
11	#include <linux/types.h>
12
13	#include "../boot/string.c"
14
15	void memcpy(void dst, const void *src, size_t len)
16	{
17	return __builtin_memcpy(dst, src, len);
18	}
19
20	void memset(void dst, int c, size_t len)
21	{
22	return __builtin_memset(dst, c, len);
23	}

arch/xtensa/kernel/coprocessor.S+1−0

@@ -14,6 +14,7 @@ · 13 unmodified lines
14		14
15	#include <linux/linkage.h>	15	#include <linux/linkage.h>
16	#include <asm/asm-offsets.h>	16	#include <asm/asm-offsets.h>
		17	#include <asm/asmmacro.h>
17	#include <asm/processor.h>	18	#include <asm/processor.h>
18	#include <asm/coprocessor.h>	19	#include <asm/coprocessor.h>
19	#include <asm/thread_info.h>	20	#include <asm/thread_info.h>

block/bfq-iosched.c+47−21

 		 * confirmed no later than during the next
 		 * I/O-plugging interval for bfqq.
 		 */
-		if (!bfq_bfqq_has_short_ttime(bfqq) &&
+		if (bfqd->last_completed_rq_bfqq &&
+		    !bfq_bfqq_has_short_ttime(bfqq) &&
 		    ktime_get_ns() - bfqd->last_completion <
 		    200 * NSEC_PER_USEC) {
 			if (bfqd->last_completed_rq_bfqq != bfqq &&
-				   bfqd->last_completed_rq_bfqq !=
+			    bfqd->last_completed_rq_bfqq !=
-				   bfqq->waker_bfqq) {
+			    bfqq->waker_bfqq) {
 				/*
 				 * First synchronization detected with
 				 * a candidate waker queue, or with a
 	    blk_rq_pos(container_of(rb_prev(&req->rb_node),
 				    struct request, rb_node))) {
 		struct bfq_queue *bfqq = bfq_init_rq(req);
-		struct bfq_data *bfqd = bfqq->bfqd;
+		struct bfq_data *bfqd;
 		struct request *prev, *next_rq;
+		if (!bfqq)
+			return;
+		bfqd = bfqq->bfqd;
 		/* Reposition request in its sort_list */
 		elv_rb_del(&bfqq->sort_list, req);
 		elv_rb_add(&bfqq->sort_list, req);
 	struct bfq_queue *bfqq = bfq_init_rq(rq),
 		*next_bfqq = bfq_init_rq(next);
+	if (!bfqq)
+		return;
 	/*
 	 * If next and rq belong to the same bfq_queue and next is older
 	 * than rq, then reposition rq in the fifo (by substituting next
  */
 void bfq_put_queue(struct bfq_queue *bfqq)
 {
+	struct bfq_queue *item;
+	struct hlist_node *n;
 #ifdef CONFIG_BFQ_GROUP_IOSCHED
 	struct bfq_group *bfqg = bfqq_group(bfqq);
 #endif
 			bfqq->bfqd->burst_size--;
 	}
+	/*
+	 * bfqq does not exist any longer, so it cannot be woken by
+	 * any other queue, and cannot wake any other queue. Then bfqq
+	 * must be removed from the woken list of its possible waker
+	 * queue, and all queues in the woken list of bfqq must stop
+	 * having a waker queue. Strictly speaking, these updates
+	 * should be performed when bfqq remains with no I/O source
+	 * attached to it, which happens before bfqq gets freed. In
+	 * particular, this happens when the last process associated
+	 * with bfqq exits or gets associated with a different
+	 * queue. However, both events lead to bfqq being freed soon,
+	 * and dangling references would come out only after bfqq gets
+	 * freed. So these updates are done here, as a simple and safe
+	 * way to handle all cases.
+	 */
+	/* remove bfqq from woken list */
+	if (!hlist_unhashed(&bfqq->woken_list_node))
+		hlist_del_init(&bfqq->woken_list_node);
+	/* reset waker for all queues in woken list */
+	hlist_for_each_entry_safe(item, n, &bfqq->woken_list,
+				  woken_list_node) {
+		item->waker_bfqq = NULL;
+		bfq_clear_bfqq_has_waker(item);
+		hlist_del_init(&item->woken_list_node);
+	}
+	if (bfqq->bfqd && bfqq->bfqd->last_completed_rq_bfqq == bfqq)
+		bfqq->bfqd->last_completed_rq_bfqq = NULL;
 	kmem_cache_free(bfq_pool, bfqq);
 #ifdef CONFIG_BFQ_GROUP_IOSCHED
 	bfqg_and_blkg_put(bfqg);
 static void bfq_exit_bfqq(struct bfq_data *bfqd, struct bfq_queue *bfqq)
 {
-	struct bfq_queue *item;
-	struct hlist_node *n;
 	if (bfqq == bfqd->in_service_queue) {
 		__bfq_bfqq_expire(bfqd, bfqq, BFQQE_BUDGET_TIMEOUT);
 		bfq_schedule_dispatch(bfqd);
 	bfq_put_cooperator(bfqq);
-	/* remove bfqq from woken list */
-	if (!hlist_unhashed(&bfqq->woken_list_node))
-		hlist_del_init(&bfqq->woken_list_node);
-	/* reset waker for all queues in woken list */
-	hlist_for_each_entry_safe(item, n, &bfqq->woken_list,
-				  woken_list_node) {
-		item->waker_bfqq = NULL;
-		bfq_clear_bfqq_has_waker(item);
-		hlist_del_init(&item->woken_list_node);
-	}
 	bfq_put_queue(bfqq); /* release process reference */
 }
 	spin_lock_irq(&bfqd->lock);
 	bfqq = bfq_init_rq(rq);
-	if (at_head || blk_rq_is_passthrough(rq)) {
+	if (!bfqq || at_head || blk_rq_is_passthrough(rq)) {
 		if (at_head)
 			list_add(&rq->queuelist, &bfqd->dispatch);
 		else
 			list_add_tail(&rq->queuelist, &bfqd->dispatch);
-	} else { /* bfqq is assumed to be non null here */
+	} else {
 		idle_timer_disabled = __bfq_insert_request(bfqd, rq);
 		/*
 		 * Update bfqq, because, if a queue merge has occurred

drivers/acpi/device_pm.c+3−1

 		if (device->power.flags.power_resources)
 			result = acpi_power_transition(device, target_state);
 	} else {
+		int cur_state = device->power.state;
 		if (device->power.flags.power_resources) {
 			result = acpi_power_transition(device, ACPI_STATE_D0);
 			if (result)
 				goto end;
 		}
-		if (device->power.state == ACPI_STATE_D0) {
+		if (cur_state == ACPI_STATE_D0) {
 			int psc;
 			/* Nothing to do here if _PSC is not present. */

drivers/acpi/scan.c+6−0

 	acpi_gpe_apply_masked_gpes();
 	acpi_update_all_gpes();
+	/*
+	 * Although we call __add_memory() that is documented to require the
+	 * device_hotplug_lock, it is not necessary here because this is an
+	 * early code when userspace or any other code path cannot trigger
+	 * hotplug/hotunplug operations.
+	 */
 	mutex_lock(&acpi_scan_lock);
 	/*
 	 * Enumerate devices in the ACPI namespace.

drivers/ata/libahci_platform.c+3−0

 		hpriv->phys[port] = NULL;
 		rc = 0;
 		break;
+	case -EPROBE_DEFER:
+		/* Do not complain yet */
+		break;
 	default:
 		dev_err(dev,

drivers/ata/libata-scsi.c+21−0

 	return 1;
 }
+static bool ata_check_nblocks(struct scsi_cmnd *scmd, u32 n_blocks)
+{
+	struct request *rq = scmd->request;
+	u32 req_blocks;
+	if (!blk_rq_is_passthrough(rq))
+		return true;
+	req_blocks = blk_rq_bytes(rq) / scmd->device->sector_size;
+	if (n_blocks > req_blocks)
+		return false;
+	return true;
+}
 /**
  *	ata_scsi_rw_xlat - Translate SCSI r/w command into an ATA one
  *	@qc: Storage for translated ATA taskfile
 		scsi_10_lba_len(cdb, &block, &n_block);
 		if (cdb[1] & (1 << 3))
 			tf_flags |= ATA_TFLAG_FUA;
+		if (!ata_check_nblocks(scmd, n_block))
+			goto invalid_fld;
 		break;
 	case READ_6:
 	case WRITE_6:
 		 */
 		if (!n_block)
 			n_block = 256;
+		if (!ata_check_nblocks(scmd, n_block))
+			goto invalid_fld;
 		break;
 	case READ_16:
 	case WRITE_16:
 		scsi_16_lba_len(cdb, &block, &n_block);
 		if (cdb[1] & (1 << 3))
 			tf_flags |= ATA_TFLAG_FUA;
+		if (!ata_check_nblocks(scmd, n_block))
+			goto invalid_fld;
 		break;
 	default:
 		DPRINTK("no-byte command\n");

drivers/ata/libata-sff.c+6−0

 	unsigned int offset;
 	unsigned char *buf;
+	if (!qc->cursg) {
+		qc->curbytes = qc->nbytes;
+		return;
+	}
 	if (qc->curbytes == qc->nbytes - qc->sect_size)
 		ap->hsm_task_state = HSM_ST_LAST;
 	if (qc->cursg_ofs == qc->cursg->length) {
 		qc->cursg = sg_next(qc->cursg);
+		if (!qc->cursg)
+			ap->hsm_task_state = HSM_ST_LAST;
 		qc->cursg_ofs = 0;
 	}
 }

drivers/ata/libata-zpodd.c+1−1

@@ -56,7 +56,7 @@ static enum odd_mech_type zpodd_get_mech_type(struct ata_device *dev) · 55 unmodified lines
56	unsigned int ret;	56	unsigned int ret;
57	struct rm_feature_desc *desc;	57	struct rm_feature_desc *desc;
58	struct ata_taskfile tf;	58	struct ata_taskfile tf;
59	static const char cdb[] = { GPCMD_GET_CONFIGURATION,	59	static const char cdb[ATAPI_CDB_LEN] = { GPCMD_GET_CONFIGURATION,
60	2, /* only 1 feature descriptor requested */	60	2, /* only 1 feature descriptor requested */
61	0, 3, /* 3, removable medium feature */	61	0, 3, /* 3, removable medium feature */
62	0, 0, 0,/* reserved */	62	0, 0, 0,/* reserved */

drivers/ata/pata_rb532_cf.c+0−1

@@ -158,7 +158,6 @@ static int rb532_pata_driver_probe(struct platform_device *pdev) · 157 unmodified lines
158	static int rb532_pata_driver_remove(struct platform_device *pdev)	158	static int rb532_pata_driver_remove(struct platform_device *pdev)
159	{	159	{
160	struct ata_host *ah = platform_get_drvdata(pdev);	160	struct ata_host *ah = platform_get_drvdata(pdev);
161	struct rb532_cf_info *info = ah->private_data;
162		161
163	ata_host_detach(ah);	162	ata_host_detach(ah);
164		163

drivers/atm/iphase.c+6−2

@@ -63,6 +63,7 @@ · 62 unmodified lines
63	#include <asm/byteorder.h>	63	#include <asm/byteorder.h>
64	#include <linux/vmalloc.h>	64	#include <linux/vmalloc.h>
65	#include <linux/jiffies.h>	65	#include <linux/jiffies.h>
		66	#include <linux/nospec.h>
66	#include "iphase.h"	67	#include "iphase.h"
67	#include "suni.h"	68	#include "suni.h"
68	#define swap_byte_order(x) (((x & 0xff) << 8) \| ((x & 0xff00) >> 8))	69	#define swap_byte_order(x) (((x & 0xff) << 8) \| ((x & 0xff00) >> 8))
@@ -2760,8 +2761,11 @@ static int ia_ioctl(struct atm_dev dev, unsigned int cmd, void __user arg) · 2691 unmodified lines
2760	}	2761	}
2761	if (copy_from_user(&ia_cmds, arg, sizeof ia_cmds)) return -EFAULT;	2762	if (copy_from_user(&ia_cmds, arg, sizeof ia_cmds)) return -EFAULT;
2762	board = ia_cmds.status;	2763	board = ia_cmds.status;
2763	if ((board < 0) \|\| (board > iadev_count))	2764
2764	board = 0;	2765	if ((board < 0) \|\| (board > iadev_count))
		2766	board = 0;
		2767	board = array_index_nospec(board, iadev_count + 1);
		2768
2765	iadev = ia_dev[board];	2769	iadev = ia_dev[board];
2766	switch (ia_cmds.cmd) {	2770	switch (ia_cmds.cmd) {
2767	case MEMDUMP:	2771	case MEMDUMP:

drivers/base/core.c+52−1

@@ -1823,12 +1823,63 @@ static inline struct kobject get_glue_dir(struct device dev) · 1822 unmodified lines
1823	*/	1823	*/
1824	static void cleanup_glue_dir(struct device dev, struct kobject glue_dir)	1824	static void cleanup_glue_dir(struct device dev, struct kobject glue_dir)
1825	{	1825	{
		1826	unsigned int ref;
		1827
1826	/* see if we live in a "glue" directory */	1828	/* see if we live in a "glue" directory */
1827	if (!live_in_glue_dir(glue_dir, dev))	1829	if (!live_in_glue_dir(glue_dir, dev))
1828	return;	1830	return;
1829		1831
1830	mutex_lock(&gdp_mutex);	1832	mutex_lock(&gdp_mutex);
1831	if (!kobject_has_children(glue_dir))	1833	/**
		1834	* There is a race condition between removing glue directory
		1835	* and adding a new device under the glue directory.
		1836	*
		1837	* CPU1: CPU2:
		1838	*
		1839	* device_add()
		1840	* get_device_parent()
		1841	* class_dir_create_and_add()
		1842	* kobject_add_internal()
		1843	* create_dir() // create glue_dir
		1844	*
		1845	* device_add()
		1846	* get_device_parent()
		1847	* kobject_get() // get glue_dir
		1848	*
		1849	* device_del()
		1850	* cleanup_glue_dir()
		1851	* kobject_del(glue_dir)
		1852	*
		1853	* kobject_add()
		1854	* kobject_add_internal()
		1855	* create_dir() // in glue_dir
		1856	* sysfs_create_dir_ns()
		1857	* kernfs_create_dir_ns(sd)
		1858	*
		1859	* sysfs_remove_dir() // glue_dir->sd=NULL
		1860	* sysfs_put() // free glue_dir->sd
		1861	*
		1862	* // sd is freed
		1863	* kernfs_new_node(sd)
		1864	* kernfs_get(glue_dir)
		1865	* kernfs_add_one()
		1866	* kernfs_put()
		1867	*
		1868	* Before CPU1 remove last child device under glue dir, if CPU2 add
		1869	* a new device under glue dir, the glue_dir kobject reference count
		1870	* will be increase to 2 in kobject_get(k). And CPU2 has been called
		1871	* kernfs_create_dir_ns(). Meanwhile, CPU1 call sysfs_remove_dir()
		1872	* and sysfs_put(). This result in glue_dir->sd is freed.
		1873	*
		1874	* Then the CPU2 will see a stale "empty" but still potentially used
		1875	* glue dir around in kernfs_new_node().
		1876	*
		1877	* In order to avoid this happening, we also should make sure that
		1878	* kernfs_node for glue_dir is released in CPU1 only when refcount
		1879	* for glue_dir kobj is 1.
		1880	*/
		1881	ref = kref_read(&glue_dir->kref);
		1882	if (!kobject_has_children(glue_dir) && !--ref)
1832	kobject_del(glue_dir);	1883	kobject_del(glue_dir);
1833	kobject_put(glue_dir);	1884	kobject_put(glue_dir);
1834	mutex_unlock(&gdp_mutex);	1885	mutex_unlock(&gdp_mutex);

drivers/base/platform.c+7−2

 	 * the device will only expose one IRQ, and this fallback
 	 * allows a common code path across either kind of resource.
 	 */
-	if (num == 0 && has_acpi_companion(&dev->dev))
+	if (num == 0 && has_acpi_companion(&dev->dev)) {
-		return acpi_dev_gpio_irq_get(ACPI_COMPANION(&dev->dev), num);
+		int ret = acpi_dev_gpio_irq_get(ACPI_COMPANION(&dev->dev), num);
+		/* Our callers expect -ENXIO for missing IRQs. */
+		if (ret >= 0 || ret == -EPROBE_DEFER)
+			return ret;
+	}
 	return -ENXIO;
 #endif

drivers/block/aoe/aoedev.c+10−3

 	}
 	flush_scheduled_work();
-	/* pass one: without sleeping, do aoedev_downdev */
+	/* pass one: do aoedev_downdev, which might sleep */
+restart1:
 	spin_lock_irqsave(&devlist_lock, flags);
 	for (d = devlist; d; d = d->next) {
 		spin_lock(&d->lock);
+		if (d->flags & DEVFL_TKILL)
+			goto cont;
 		if (exiting) {
 			/* unconditionally take each device down */
 		} else if (specified) {
 		|| d->ref)
 			goto cont;
+		spin_unlock(&d->lock);
+		spin_unlock_irqrestore(&devlist_lock, flags);
 		aoedev_downdev(d);
 		d->flags |= DEVFL_TKILL;
+		goto restart1;
 cont:
 		spin_unlock(&d->lock);
 	}
 	/* pass two: call freedev, which might sleep,
 	 * for aoedevs marked with DEVFL_TKILL
 	 */
-restart:
+restart2:
 	spin_lock_irqsave(&devlist_lock, flags);
 	for (d = devlist; d; d = d->next) {
 		spin_lock(&d->lock);
 			spin_unlock(&d->lock);
 			spin_unlock_irqrestore(&devlist_lock, flags);
 			freedev(d);
-			goto restart;
+			goto restart2;
 		}
 		spin_unlock(&d->lock);
 	}

drivers/block/ataflop.c+1−0

@@ -1726,6 +1726,7 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, · 1725 unmodified lines
1726	/* MSch: invalidate default_params */	1726	/* MSch: invalidate default_params */
1727	default_params[drive].blocks = 0;	1727	default_params[drive].blocks = 0;
1728	set_capacity(floppy->disk, MAX_DISK_SIZE * 2);	1728	set_capacity(floppy->disk, MAX_DISK_SIZE * 2);
		1729	/* Fall through */
1729	case FDFMTEND:	1730	case FDFMTEND:
1730	case FDFLUSH:	1731	case FDFLUSH:
1731	/* invalidate the buffer track to force a reread */	1732	/* invalidate the buffer track to force a reread */

drivers/block/loop.c+10−8

 static int loop_kthread_worker_fn(void *worker_ptr)
 {
-	current->flags |= PF_LESS_THROTTLE;
+	current->flags |= PF_LESS_THROTTLE | PF_MEMALLOC_NOIO;
 	return kthread_worker_fn(worker_ptr);
 }
 	struct file	*file;
 	struct inode	*inode;
 	struct address_space *mapping;
+	struct block_device *claimed_bdev = NULL;
 	int		lo_flags = 0;
 	int		error;
 	loff_t		size;
 	 * here to avoid changing device under exclusive owner.
 	 */
 	if (!(mode & FMODE_EXCL)) {
-		bdgrab(bdev);
+		claimed_bdev = bd_start_claiming(bdev, loop_set_fd);
-		error = blkdev_get(bdev, mode | FMODE_EXCL, loop_set_fd);
+		if (IS_ERR(claimed_bdev)) {
-		if (error)
+			error = PTR_ERR(claimed_bdev);
 			goto out_putf;
+		}
 	}
 	error = mutex_lock_killable(&loop_ctl_mutex);
 	mutex_unlock(&loop_ctl_mutex);
 	if (partscan)
 		loop_reread_partitions(lo, bdev);
-	if (!(mode & FMODE_EXCL))
+	if (claimed_bdev)
-		blkdev_put(bdev, mode | FMODE_EXCL);
+		bd_abort_claiming(bdev, claimed_bdev, loop_set_fd);
 	return 0;
 out_unlock:
 	mutex_unlock(&loop_ctl_mutex);
 out_bdev:
-	if (!(mode & FMODE_EXCL))
+	if (claimed_bdev)
-		blkdev_put(bdev, mode | FMODE_EXCL);
+		bd_abort_claiming(bdev, claimed_bdev, loop_set_fd);
 out_putf:
 	fput(file);
 out:

drivers/block/nbd.c+1−1

@@ -1231,7 +1231,7 @@ static void nbd_clear_sock_ioctl(struct nbd_device *nbd, · 1230 unmodified lines
1231	struct block_device *bdev)	1231	struct block_device *bdev)
1232	{	1232	{
1233	sock_shutdown(nbd);	1233	sock_shutdown(nbd);
1234	kill_bdev(bdev);	1234	__invalidate_device(bdev, true);
1235	nbd_bdev_reset(bdev);	1235	nbd_bdev_reset(bdev);
1236	if (test_and_clear_bit(NBD_HAS_CONFIG_REF,	1236	if (test_and_clear_bit(NBD_HAS_CONFIG_REF,
1237	&nbd->config->runtime_flags))	1237	&nbd->config->runtime_flags))

drivers/bluetooth/hci_ath.c+3−0

@@ -98,6 +98,9 @@ static int ath_open(struct hci_uart *hu) · 97 unmodified lines
98		98
99	BT_DBG("hu %p", hu);	99	BT_DBG("hu %p", hu);
100		100
		101	if (!hci_uart_has_flow_control(hu))
		102	return -EOPNOTSUPP;
		103
101	ath = kzalloc(sizeof(*ath), GFP_KERNEL);	104	ath = kzalloc(sizeof(*ath), GFP_KERNEL);
102	if (!ath)	105	if (!ath)
103	return -ENOMEM;	106	return -ENOMEM;

drivers/bluetooth/hci_bcm.c+3−0

@@ -406,6 +406,9 @@ static int bcm_open(struct hci_uart *hu) · 405 unmodified lines
406		406
407	bt_dev_dbg(hu->hdev, "hu %p", hu);	407	bt_dev_dbg(hu->hdev, "hu %p", hu);
408		408
		409	if (!hci_uart_has_flow_control(hu))
		410	return -EOPNOTSUPP;
		411
409	bcm = kzalloc(sizeof(*bcm), GFP_KERNEL);	412	bcm = kzalloc(sizeof(*bcm), GFP_KERNEL);
410	if (!bcm)	413	if (!bcm)
411	return -ENOMEM;	414	return -ENOMEM;

drivers/bluetooth/hci_intel.c+3−0

@@ -391,6 +391,9 @@ static int intel_open(struct hci_uart *hu) · 390 unmodified lines
391		391
392	BT_DBG("hu %p", hu);	392	BT_DBG("hu %p", hu);
393		393
		394	if (!hci_uart_has_flow_control(hu))
		395	return -EOPNOTSUPP;
		396
394	intel = kzalloc(sizeof(*intel), GFP_KERNEL);	397	intel = kzalloc(sizeof(*intel), GFP_KERNEL);
395	if (!intel)	398	if (!intel)
396	return -ENOMEM;	399	return -ENOMEM;

drivers/bluetooth/hci_ldisc.c+13−0

@@ -292,6 +292,19 @@ static int hci_uart_send_frame(struct hci_dev hdev, struct sk_buff skb) · 291 unmodified lines
292	return 0;	292	return 0;
293	}	293	}
294		294
		295	/* Check the underlying device or tty has flow control support */
		296	bool hci_uart_has_flow_control(struct hci_uart *hu)
		297	{
		298	/* serdev nodes check if the needed operations are present */
		299	if (hu->serdev)
		300	return true;
		301
		302	if (hu->tty->driver->ops->tiocmget && hu->tty->driver->ops->tiocmset)
		303	return true;
		304
		305	return false;
		306	}
		307
295	/* Flow control or un-flow control the device */	308	/* Flow control or un-flow control the device */
296	void hci_uart_set_flow_control(struct hci_uart *hu, bool enable)	309	void hci_uart_set_flow_control(struct hci_uart *hu, bool enable)
297	{	310	{

drivers/bluetooth/hci_mrvl.c+3−0

@@ -59,6 +59,9 @@ static int mrvl_open(struct hci_uart *hu) · 58 unmodified lines
59		59
60	BT_DBG("hu %p", hu);	60	BT_DBG("hu %p", hu);
61		61
		62	if (!hci_uart_has_flow_control(hu))
		63	return -EOPNOTSUPP;
		64
62	mrvl = kzalloc(sizeof(*mrvl), GFP_KERNEL);	65	mrvl = kzalloc(sizeof(*mrvl), GFP_KERNEL);
63	if (!mrvl)	66	if (!mrvl)
64	return -ENOMEM;	67	return -ENOMEM;

drivers/bluetooth/hci_qca.c+3−0

@@ -473,6 +473,9 @@ static int qca_open(struct hci_uart *hu) · 472 unmodified lines
473		473
474	BT_DBG("hu %p qca_open", hu);	474	BT_DBG("hu %p qca_open", hu);
475		475
		476	if (!hci_uart_has_flow_control(hu))
		477	return -EOPNOTSUPP;
		478
476	qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);	479	qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);
477	if (!qca)	480	if (!qca)
478	return -ENOMEM;	481	return -ENOMEM;

drivers/bluetooth/hci_uart.h+1−0

@@ -104,6 +104,7 @@ int hci_uart_wait_until_sent(struct hci_uart *hu); · 103 unmodified lines
104	int hci_uart_init_ready(struct hci_uart *hu);	104	int hci_uart_init_ready(struct hci_uart *hu);
105	void hci_uart_init_work(struct work_struct *work);	105	void hci_uart_init_work(struct work_struct *work);
106	void hci_uart_set_baudrate(struct hci_uart *hu, unsigned int speed);	106	void hci_uart_set_baudrate(struct hci_uart *hu, unsigned int speed);
		107	bool hci_uart_has_flow_control(struct hci_uart *hu);
107	void hci_uart_set_flow_control(struct hci_uart *hu, bool enable);	108	void hci_uart_set_flow_control(struct hci_uart *hu, bool enable);
108	void hci_uart_set_speeds(struct hci_uart *hu, unsigned int init_speed,	109	void hci_uart_set_speeds(struct hci_uart *hu, unsigned int init_speed,
109	unsigned int oper_speed);	110	unsigned int oper_speed);

drivers/char/ipmi/ipmb_dev_int.c+1−1

@@ -76,7 +76,7 @@ static ssize_t ipmb_read(struct file file, char __user buf, size_t count, · 75 unmodified lines
76	struct ipmb_dev *ipmb_dev = to_ipmb_dev(file);	76	struct ipmb_dev *ipmb_dev = to_ipmb_dev(file);
77	struct ipmb_request_elem *queue_elem;	77	struct ipmb_request_elem *queue_elem;
78	struct ipmb_msg msg;	78	struct ipmb_msg msg;
79	ssize_t ret;	79	ssize_t ret = 0;
80		80
81	memset(&msg, 0, sizeof(msg));	81	memset(&msg, 0, sizeof(msg));
82		82

drivers/char/tpm/tpm-chip.c+36−7

 	return chip->ops->go_idle(chip);
 }
+static void tpm_clk_enable(struct tpm_chip *chip)
+{
+	if (chip->ops->clk_enable)
+		chip->ops->clk_enable(chip, true);
+}
+static void tpm_clk_disable(struct tpm_chip *chip)
+{
+	if (chip->ops->clk_enable)
+		chip->ops->clk_enable(chip, false);
+}
 /**
  * tpm_chip_start() - power on the TPM
  * @chip:	a TPM chip to use
 {
 	int ret;
-	if (chip->ops->clk_enable)
+	tpm_clk_enable(chip);
-		chip->ops->clk_enable(chip, true);
 	if (chip->locality == -1) {
 		ret = tpm_request_locality(chip);
 		if (ret) {
-			chip->ops->clk_enable(chip, false);
+			tpm_clk_disable(chip);
 			return ret;
 		}
 	}
 	ret = tpm_cmd_ready(chip);
 	if (ret) {
 		tpm_relinquish_locality(chip);
-		if (chip->ops->clk_enable)
+		tpm_clk_disable(chip);
-			chip->ops->clk_enable(chip, false);
 		return ret;
 	}
 {
 	tpm_go_idle(chip);
 	tpm_relinquish_locality(chip);
-	if (chip->ops->clk_enable)
+	tpm_clk_disable(chip);
-		chip->ops->clk_enable(chip, false);
 }
 EXPORT_SYMBOL_GPL(tpm_chip_stop);
 	return hwrng_register(&chip->hwrng);
 }
+static int tpm_get_pcr_allocation(struct tpm_chip *chip)
+{
+	int rc;
+	rc = (chip->flags & TPM_CHIP_FLAG_TPM2) ?
+	     tpm2_get_pcr_allocation(chip) :
+	     tpm1_get_pcr_allocation(chip);
+	if (rc > 0)
+		return -ENODEV;
+	return rc;
+}
 /*
  * tpm_chip_register() - create a character device for the TPM chip
  * @chip: TPM chip to use.
 	if (rc)
 		return rc;
 	rc = tpm_auto_startup(chip);
+	if (rc) {
+		tpm_chip_stop(chip);
+		return rc;
+	}
+	rc = tpm_get_pcr_allocation(chip);
 	tpm_chip_stop(chip);
 	if (rc)
 		return rc;

drivers/char/tpm/tpm.h+2−0

 ssize_t tpm1_getcap(struct tpm_chip *chip, u32 subcap_id, cap_t *cap,
 		    const char *desc, size_t min_cap_length);
 int tpm1_get_random(struct tpm_chip *chip, u8 *out, size_t max);
+int tpm1_get_pcr_allocation(struct tpm_chip *chip);
 unsigned long tpm_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal);
 int tpm_pm_suspend(struct device *dev);
 int tpm_pm_resume(struct device *dev);
 ssize_t tpm2_get_tpm_pt(struct tpm_chip *chip, u32 property_id,
 			u32 *value, const char *desc);
+ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip);
 int tpm2_auto_startup(struct tpm_chip *chip);
 void tpm2_shutdown(struct tpm_chip *chip, u16 shutdown_type);
 unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *chip, u32 ordinal);

drivers/char/tpm/tpm1-cmd.c+24−12

@@ -699,18 +699,6 @@ int tpm1_auto_startup(struct tpm_chip *chip) · 698 unmodified lines
699	goto out;	699	goto out;
700	}	700	}
701		701
702	chip->allocated_banks = kcalloc(1, sizeof(*chip->allocated_banks),
703	GFP_KERNEL);
704	if (!chip->allocated_banks) {
705	rc = -ENOMEM;
706	goto out;
707	}
708
709	chip->allocated_banks[0].alg_id = TPM_ALG_SHA1;
710	chip->allocated_banks[0].digest_size = hash_digest_size[HASH_ALGO_SHA1];
711	chip->allocated_banks[0].crypto_id = HASH_ALGO_SHA1;
712	chip->nr_allocated_banks = 1;
713
714	return rc;	702	return rc;
715	out:	703	out:
716	if (rc > 0)	704	if (rc > 0)
@@ -779,3 +767,27 @@ int tpm1_pm_suspend(struct tpm_chip *chip, u32 tpm_suspend_pcr) · 62 unmodified lines
779	return rc;	767	return rc;
780	}	768	}
781		769
		770	/**
		771	* tpm1_get_pcr_allocation() - initialize the allocated bank
		772	* @chip: TPM chip to use.
		773	*
		774	* The function initializes the SHA1 allocated bank to extend PCR
		775	*
		776	* Return:
		777	* * 0 on success,
		778	* * < 0 on error.
		779	*/
		780	int tpm1_get_pcr_allocation(struct tpm_chip *chip)
		781	{
		782	chip->allocated_banks = kcalloc(1, sizeof(*chip->allocated_banks),
		783	GFP_KERNEL);
		784	if (!chip->allocated_banks)
		785	return -ENOMEM;
		786
		787	chip->allocated_banks[0].alg_id = TPM_ALG_SHA1;
		788	chip->allocated_banks[0].digest_size = hash_digest_size[HASH_ALGO_SHA1];
		789	chip->allocated_banks[0].crypto_id = HASH_ALGO_SHA1;
		790	chip->nr_allocated_banks = 1;
		791
		792	return 0;
		793	}

drivers/char/tpm/tpm2-cmd.c+1−5

 	u8  pcr_select[3];
 } __packed;
-static ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip)
+ssize_t tpm2_get_pcr_allocation(struct tpm_chip *chip)
 {
 	struct tpm2_pcr_selection pcr_selection;
 	struct tpm_buf buf;
 			goto out;
 	}
-	rc = tpm2_get_pcr_allocation(chip);
-	if (rc)
-		goto out;
 	rc = tpm2_get_cc_attrs_tbl(chip);
 out:

drivers/clk/at91/clk-generated.c+2−0

@@ -141,6 +141,8 @@ static int clk_generated_determine_rate(struct clk_hw *hw, · 140 unmodified lines
141	continue;	141	continue;
142		142
143	div = DIV_ROUND_CLOSEST(parent_rate, req->rate);	143	div = DIV_ROUND_CLOSEST(parent_rate, req->rate);
		144	if (div > GENERATED_MAX_DIV + 1)
		145	div = GENERATED_MAX_DIV + 1;
144		146
145	clk_generated_best_diff(req, parent, parent_rate, div,	147	clk_generated_best_diff(req, parent, parent_rate, div,
146	&best_diff, &best_rate);	148	&best_diff, &best_rate);

drivers/clk/mediatek/clk-mt8183.c+34−12

 	FIXED_CLK(CLK_TOP_UNIVP_192M, "univpll_192m", "univpll", 192000000),
 };
+static const struct mtk_fixed_factor top_early_divs[] = {
+	FACTOR(CLK_TOP_CLK13M, "clk13m", "clk26m", 1, 2),
+};
 static const struct mtk_fixed_factor top_divs[] = {
-	FACTOR(CLK_TOP_CLK13M, "clk13m", "clk26m", 1,
-		2),
 	FACTOR(CLK_TOP_F26M_CK_D2, "csw_f26m_ck_d2", "clk26m", 1,
 		2),
 	FACTOR(CLK_TOP_SYSPLL_CK, "syspll_ck", "mainpll", 1,
 	return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
 }
+static struct clk_onecell_data *top_clk_data;
+static void clk_mt8183_top_init_early(struct device_node *node)
+{
+	int i;
+	top_clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
+	for (i = 0; i < CLK_TOP_NR_CLK; i++)
+		top_clk_data->clks[i] = ERR_PTR(-EPROBE_DEFER);
+	mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs),
+			top_clk_data);
+	of_clk_add_provider(node, of_clk_src_onecell_get, top_clk_data);
+}
+CLK_OF_DECLARE_DRIVER(mt8183_topckgen, "mediatek,mt8183-topckgen",
+			clk_mt8183_top_init_early);
 static int clk_mt8183_top_probe(struct platform_device *pdev)
 {
 	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	void __iomem *base;
-	struct clk_onecell_data *clk_data;
 	struct device_node *node = pdev->dev.of_node;
 	base = devm_ioremap_resource(&pdev->dev, res);
 	if (IS_ERR(base))
 		return PTR_ERR(base);
-	clk_data = mtk_alloc_clk_data(CLK_TOP_NR_CLK);
 	mtk_clk_register_fixed_clks(top_fixed_clks, ARRAY_SIZE(top_fixed_clks),
-		clk_data);
+		top_clk_data);
+	mtk_clk_register_factors(top_early_divs, ARRAY_SIZE(top_early_divs),
+		top_clk_data);
-	mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), clk_data);
+	mtk_clk_register_factors(top_divs, ARRAY_SIZE(top_divs), top_clk_data);
 	mtk_clk_register_muxes(top_muxes, ARRAY_SIZE(top_muxes),
-		node, &mt8183_clk_lock, clk_data);
+		node, &mt8183_clk_lock, top_clk_data);
 	mtk_clk_register_composites(top_aud_muxes, ARRAY_SIZE(top_aud_muxes),
-		base, &mt8183_clk_lock, clk_data);
+		base, &mt8183_clk_lock, top_clk_data);
 	mtk_clk_register_composites(top_aud_divs, ARRAY_SIZE(top_aud_divs),
-		base, &mt8183_clk_lock, clk_data);
+		base, &mt8183_clk_lock, top_clk_data);
 	mtk_clk_register_gates(node, top_clks, ARRAY_SIZE(top_clks),
-		clk_data);
+		top_clk_data);
-	return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
+	return of_clk_add_provider(node, of_clk_src_onecell_get, top_clk_data);
 }
 static int clk_mt8183_infra_probe(struct platform_device *pdev)

drivers/clk/renesas/renesas-cpg-mssr.c+2−14

 	unsigned int reg = id / 32;
 	unsigned int bit = id % 32;
 	u32 bitmask = BIT(bit);
-	unsigned long flags;
-	u32 value;
 	dev_dbg(priv->dev, "reset %u%02u\n", reg, bit);
 	/* Reset module */
-	spin_lock_irqsave(&priv->rmw_lock, flags);
+	writel(bitmask, priv->base + SRCR(reg));
-	value = readl(priv->base + SRCR(reg));
-	value |= bitmask;
-	writel(value, priv->base + SRCR(reg));
-	spin_unlock_irqrestore(&priv->rmw_lock, flags);
 	/* Wait for at least one cycle of the RCLK clock (@ ca. 32 kHz) */
 	udelay(35);
 	unsigned int reg = id / 32;
 	unsigned int bit = id % 32;
 	u32 bitmask = BIT(bit);
-	unsigned long flags;
-	u32 value;
 	dev_dbg(priv->dev, "assert %u%02u\n", reg, bit);
-	spin_lock_irqsave(&priv->rmw_lock, flags);
+	writel(bitmask, priv->base + SRCR(reg));
-	value = readl(priv->base + SRCR(reg));
-	value |= bitmask;
-	writel(value, priv->base + SRCR(reg));
-	spin_unlock_irqrestore(&priv->rmw_lock, flags);
 	return 0;
 }

drivers/clk/sprd/Kconfig+1−0

@@ -3,6 +3,7 @@ config SPRD_COMMON_CLK · 2 unmodified lines
3	tristate "Clock support for Spreadtrum SoCs"	3	tristate "Clock support for Spreadtrum SoCs"
4	depends on ARCH_SPRD \|\| COMPILE_TEST	4	depends on ARCH_SPRD \|\| COMPILE_TEST
5	default ARCH_SPRD	5	default ARCH_SPRD
		6	select REGMAP_MMIO
6		7
7	if SPRD_COMMON_CLK	8	if SPRD_COMMON_CLK
8		9

drivers/clocksource/timer-riscv.c+2−4

 	return get_cycles64();
 }
-static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
+static struct clocksource riscv_clocksource = {
 	.name		= "riscv_clocksource",
 	.rating		= 300,
 	.mask		= CLOCKSOURCE_MASK(64),
 static int __init riscv_timer_init_dt(struct device_node *n)
 {
 	int cpuid, hartid, error;
-	struct clocksource *cs;
 	hartid = riscv_of_processor_hartid(n);
 	if (hartid < 0) {
 	pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
 	       __func__, cpuid, hartid);
-	cs = per_cpu_ptr(&riscv_clocksource, cpuid);
+	error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
-	error = clocksource_register_hz(cs, riscv_timebase);
 	if (error) {
 		pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
 		       error, cpuid);

drivers/crypto/ccp/ccp-crypto-aes-galois.c+14−0

@@ -58,6 +58,19 @@ static int ccp_aes_gcm_setkey(struct crypto_aead tfm, const u8 key, · 57 unmodified lines
58	static int ccp_aes_gcm_setauthsize(struct crypto_aead *tfm,	58	static int ccp_aes_gcm_setauthsize(struct crypto_aead *tfm,
59	unsigned int authsize)	59	unsigned int authsize)
60	{	60	{
		61	switch (authsize) {
		62	case 16:
		63	case 15:
		64	case 14:
		65	case 13:
		66	case 12:
		67	case 8:
		68	case 4:
		69	break;
		70	default:
		71	return -EINVAL;
		72	}
		73
61	return 0;	74	return 0;
62	}	75	}
63		76
@@ -104,6 +117,7 @@ static int ccp_aes_gcm_crypt(struct aead_request *req, bool encrypt) · 40 unmodified lines
104	memset(&rctx->cmd, 0, sizeof(rctx->cmd));	117	memset(&rctx->cmd, 0, sizeof(rctx->cmd));
105	INIT_LIST_HEAD(&rctx->cmd.entry);	118	INIT_LIST_HEAD(&rctx->cmd.entry);
106	rctx->cmd.engine = CCP_ENGINE_AES;	119	rctx->cmd.engine = CCP_ENGINE_AES;
		120	rctx->cmd.u.aes.authsize = crypto_aead_authsize(tfm);
107	rctx->cmd.u.aes.type = ctx->u.aes.type;	121	rctx->cmd.u.aes.type = ctx->u.aes.type;
108	rctx->cmd.u.aes.mode = ctx->u.aes.mode;	122	rctx->cmd.u.aes.mode = ctx->u.aes.mode;
109	rctx->cmd.u.aes.action = encrypt;	123	rctx->cmd.u.aes.action = encrypt;

drivers/crypto/ccp/ccp-ops.c+24−9

 	unsigned long long *final;
 	unsigned int dm_offset;
+	unsigned int authsize;
 	unsigned int jobid;
 	unsigned int ilen;
 	bool in_place = true; /* Default value */
 	if (!aes->key) /* Gotta have a key SGL */
 		return -EINVAL;
+	/* Zero defaults to 16 bytes, the maximum size */
+	authsize = aes->authsize ? aes->authsize : AES_BLOCK_SIZE;
+	switch (authsize) {
+	case 16:
+	case 15:
+	case 14:
+	case 13:
+	case 12:
+	case 8:
+	case 4:
+		break;
+	default:
+		return -EINVAL;
+	}
 	/* First, decompose the source buffer into AAD & PT,
 	 * and the destination buffer into AAD, CT & tag, or
 	 * the input into CT & tag.
 		p_tag = scatterwalk_ffwd(sg_tag, p_outp, ilen);
 	} else {
 		/* Input length for decryption includes tag */
-		ilen = aes->src_len - AES_BLOCK_SIZE;
+		ilen = aes->src_len - authsize;
 		p_tag = scatterwalk_ffwd(sg_tag, p_inp, ilen);
 	}
 		while (src.sg_wa.bytes_left) {
 			ccp_prepare_data(&src, &dst, &op, AES_BLOCK_SIZE, true);
 			if (!src.sg_wa.bytes_left) {
-				unsigned int nbytes = aes->src_len
+				unsigned int nbytes = ilen % AES_BLOCK_SIZE;
-						      % AES_BLOCK_SIZE;
 				if (nbytes) {
 					op.eom = 1;
 	if (aes->action == CCP_AES_ACTION_ENCRYPT) {
 		/* Put the ciphered tag after the ciphertext. */
-		ccp_get_dm_area(&final_wa, 0, p_tag, 0, AES_BLOCK_SIZE);
+		ccp_get_dm_area(&final_wa, 0, p_tag, 0, authsize);
 	} else {
 		/* Does this ciphered tag match the input? */
-		ret = ccp_init_dm_workarea(&tag, cmd_q, AES_BLOCK_SIZE,
+		ret = ccp_init_dm_workarea(&tag, cmd_q, authsize,
 					   DMA_BIDIRECTIONAL);
 		if (ret)
 			goto e_tag;
-		ret = ccp_set_dm_area(&tag, 0, p_tag, 0, AES_BLOCK_SIZE);
+		ret = ccp_set_dm_area(&tag, 0, p_tag, 0, authsize);
 		if (ret)
 			goto e_tag;
 		ret = crypto_memneq(tag.address, final_wa.address,
-				    AES_BLOCK_SIZE) ? -EBADMSG : 0;
+				    authsize) ? -EBADMSG : 0;
 		ccp_dm_free(&tag);
 	}
 	ccp_dm_free(&final_wa);
 e_dst:
-	if (aes->src_len && !in_place)
+	if (ilen > 0 && !in_place)
 		ccp_free_data(&dst, cmd_q);
 e_src:
-	if (aes->src_len)
+	if (ilen > 0)
 		ccp_free_data(&src, cmd_q);
 e_aad:

drivers/crypto/ux500/cryp/cryp.c+6−0

 	case CRYP_KEY_SIZE_256:
 		ctx->key_4_l = readl_relaxed(&src_reg->key_4_l);
 		ctx->key_4_r = readl_relaxed(&src_reg->key_4_r);
+		/* Fall through */
 	case CRYP_KEY_SIZE_192:
 		ctx->key_3_l = readl_relaxed(&src_reg->key_3_l);
 		ctx->key_3_r = readl_relaxed(&src_reg->key_3_r);
+		/* Fall through */
 	case CRYP_KEY_SIZE_128:
 		ctx->key_2_l = readl_relaxed(&src_reg->key_2_l);
 		ctx->key_2_r = readl_relaxed(&src_reg->key_2_r);
+		/* Fall through */
 	default:
 		ctx->key_1_l = readl_relaxed(&src_reg->key_1_l);
 	case CRYP_KEY_SIZE_256:
 		writel_relaxed(ctx->key_4_l, &reg->key_4_l);
 		writel_relaxed(ctx->key_4_r, &reg->key_4_r);
+		/* Fall through */
 	case CRYP_KEY_SIZE_192:
 		writel_relaxed(ctx->key_3_l, &reg->key_3_l);
 		writel_relaxed(ctx->key_3_r, &reg->key_3_r);
+		/* Fall through */
 	case CRYP_KEY_SIZE_128:
 		writel_relaxed(ctx->key_2_l, &reg->key_2_l);
 		writel_relaxed(ctx->key_2_r, &reg->key_2_r);
+		/* Fall through */
 	default:
 		writel_relaxed(ctx->key_1_l, &reg->key_1_l);

drivers/gpio/gpiolib.c+15−8

 	}
 	if (eflags & GPIOEVENT_REQUEST_RISING_EDGE)
-		irqflags |= IRQF_TRIGGER_RISING;
+		irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
+			IRQF_TRIGGER_FALLING : IRQF_TRIGGER_RISING;
 	if (eflags & GPIOEVENT_REQUEST_FALLING_EDGE)
-		irqflags |= IRQF_TRIGGER_FALLING;
+		irqflags |= test_bit(FLAG_ACTIVE_LOW, &desc->flags) ?
+			IRQF_TRIGGER_RISING : IRQF_TRIGGER_FALLING;
 	irqflags |= IRQF_ONESHOT;
 	INIT_KFIFO(le->events);
 	for (i = 0; i < chip->ngpio; i++) {
 		struct gpio_desc *desc = &gdev->descs[i];
-		if (chip->get_direction && gpiochip_line_is_valid(chip, i))
+		if (chip->get_direction && gpiochip_line_is_valid(chip, i)) {
-			desc->flags = !chip->get_direction(chip, i) ?
+			if (!chip->get_direction(chip, i))
-					(1 << FLAG_IS_OUT) : 0;
+				set_bit(FLAG_IS_OUT, &desc->flags);
-		else
+			else
-			desc->flags = !chip->direction_input ?
+				clear_bit(FLAG_IS_OUT, &desc->flags);
-					(1 << FLAG_IS_OUT) : 0;
+		} else {
+			if (!chip->direction_input)
+				set_bit(FLAG_IS_OUT, &desc->flags);
+			else
+				clear_bit(FLAG_IS_OUT, &desc->flags);
+		}
 	}
 	acpi_gpiochip_add(chip);

drivers/gpu/drm/Kconfig+1−1

@@ -394,7 +394,7 @@ config DRM_R128 · 393 unmodified lines
394	config DRM_I810	394	config DRM_I810
395	tristate "Intel I810"	395	tristate "Intel I810"
396	# !PREEMPT because of missing ioctl locking	396	# !PREEMPT because of missing ioctl locking
397	depends on DRM && AGP && AGP_INTEL && (!PREEMPT \|\| BROKEN)	397	depends on DRM && AGP && AGP_INTEL && (!PREEMPTION \|\| BROKEN)
398	help	398	help
399	Choose this option if you have an Intel I810 graphics card. If M is	399	Choose this option if you have an Intel I810 graphics card. If M is
400	selected, the module will be called i810. AGP support is required	400	selected, the module will be called i810. AGP support is required

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c+2−1

@@ -1140,7 +1140,8 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu( · 1139 unmodified lines
1140	adev->asic_type != CHIP_FIJI &&	1140	adev->asic_type != CHIP_FIJI &&
1141	adev->asic_type != CHIP_POLARIS10 &&	1141	adev->asic_type != CHIP_POLARIS10 &&
1142	adev->asic_type != CHIP_POLARIS11 &&	1142	adev->asic_type != CHIP_POLARIS11 &&
1143	adev->asic_type != CHIP_POLARIS12) ?	1143	adev->asic_type != CHIP_POLARIS12 &&
		1144	adev->asic_type != CHIP_VEGAM) ?
1144	VI_BO_SIZE_ALIGN : 1;	1145	VI_BO_SIZE_ALIGN : 1;
1145		1146
1146	mapping_flags = AMDGPU_VM_PAGE_READABLE;	1147	mapping_flags = AMDGPU_VM_PAGE_READABLE;

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+12−14

 			return r;
 		}
-		fence = amdgpu_ctx_get_fence(ctx, entity,
+		fence = amdgpu_ctx_get_fence(ctx, entity, deps[i].handle);
-					     deps[i].handle);
+		amdgpu_ctx_put(ctx);
+		if (IS_ERR(fence))
+			return PTR_ERR(fence);
+		else if (!fence)
+			continue;
 		if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {
-			struct drm_sched_fence *s_fence = to_drm_sched_fence(fence);
+			struct drm_sched_fence *s_fence;
 			struct dma_fence *old = fence;
+			s_fence = to_drm_sched_fence(fence);
 			fence = dma_fence_get(&s_fence->scheduled);
 			dma_fence_put(old);
 		}
-		if (IS_ERR(fence)) {
+		r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true);
-			r = PTR_ERR(fence);
+		dma_fence_put(fence);
-			amdgpu_ctx_put(ctx);
+		if (r)
 			return r;
-		} else if (fence) {
-			r = amdgpu_sync_fence(p->adev, &p->job->sync, fence,
-					true);
-			dma_fence_put(fence);
-			amdgpu_ctx_put(ctx);
-			if (r)
-				return r;
-		}
 	}
 	return 0;
 }

drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c+1−1

@@ -707,7 +707,7 @@ static ssize_t amdgpu_debugfs_gpr_read(struct file f, char __user buf, · 706 unmodified lines
707	thread = (*pos & GENMASK_ULL(59, 52)) >> 52;	707	thread = (*pos & GENMASK_ULL(59, 52)) >> 52;
708	bank = (*pos & GENMASK_ULL(61, 60)) >> 60;	708	bank = (*pos & GENMASK_ULL(61, 60)) >> 60;
709		709
710	data = kmalloc_array(1024, sizeof(*data), GFP_KERNEL);	710	data = kcalloc(1024, sizeof(*data), GFP_KERNEL);
711	if (!data)	711	if (!data)
712	return -ENOMEM;	712	return -ENOMEM;
713		713

drivers/gpu/drm/amd/amdgpu/amdgpu_gds.h+0−1

@@ -32,7 +32,6 @@ struct amdgpu_gds { · 31 unmodified lines
32	uint32_t gws_size;	32	uint32_t gws_size;
33	uint32_t oa_size;	33	uint32_t oa_size;
34	uint32_t gds_compute_max_wave_id;	34	uint32_t gds_compute_max_wave_id;
35	uint32_t vgt_gs_max_wave_id;
36	};	35	};
37		36
38	struct amdgpu_gds_reg_offset {	37	struct amdgpu_gds_reg_offset {

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c+49−25

 	struct amdgpu_device *adev = ddev->dev_private;
 	enum amd_pm_state_type pm;
-	if (is_support_sw_smu(adev) && adev->smu.ppt_funcs->get_current_power_state)
+	if (is_support_sw_smu(adev)) {
-		pm = amdgpu_smu_get_current_power_state(adev);
+		if (adev->smu.ppt_funcs->get_current_power_state)
-	else if (adev->powerplay.pp_funcs->get_current_power_state)
+			pm = amdgpu_smu_get_current_power_state(adev);
+		else
+			pm = adev->pm.dpm.user_state;
+	} else if (adev->powerplay.pp_funcs->get_current_power_state) {
 		pm = amdgpu_dpm_get_current_power_state(adev);
-	else
+	} else {
 		pm = adev->pm.dpm.user_state;
+	}
 	return snprintf(buf, PAGE_SIZE, "%s\n",
 			(pm == POWER_STATE_TYPE_BATTERY) ? "battery" :
 		goto fail;
 	}
-	if (adev->powerplay.pp_funcs->dispatch_tasks) {
+	if (is_support_sw_smu(adev)) {
+		mutex_lock(&adev->pm.mutex);
+		adev->pm.dpm.user_state = state;
+		mutex_unlock(&adev->pm.mutex);
+	} else if (adev->powerplay.pp_funcs->dispatch_tasks) {
 		amdgpu_dpm_dispatch_task(adev, AMD_PP_TASK_ENABLE_USER_STATE, &state);
 	} else {
 		mutex_lock(&adev->pm.mutex);
 	if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK, (void *)&value64, &size))
 		seq_printf(m, "SMC Feature Mask: 0x%016llx\n", value64);
-	/* UVD clocks */
+	if (adev->asic_type > CHIP_VEGA20) {
-	if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, (void *)&value, &size)) {
+		/* VCN clocks */
-		if (!value) {
+		if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCN_POWER_STATE, (void *)&value, &size)) {
-			seq_printf(m, "UVD: Disabled\n");
+			if (!value) {
-		} else {
+				seq_printf(m, "VCN: Disabled\n");
-			seq_printf(m, "UVD: Enabled\n");
+			} else {
-			if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size))
+				seq_printf(m, "VCN: Enabled\n");
-				seq_printf(m, "\t%u MHz (DCLK)\n", value/100);
+				if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size))
-			if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size))
+					seq_printf(m, "\t%u MHz (DCLK)\n", value/100);
-				seq_printf(m, "\t%u MHz (VCLK)\n", value/100);
+				if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size))
+					seq_printf(m, "\t%u MHz (VCLK)\n", value/100);
+			}
 		}
-	}
+		seq_printf(m, "\n");
-	seq_printf(m, "\n");
+	} else {
+		/* UVD clocks */
+		if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_POWER, (void *)&value, &size)) {
+			if (!value) {
+				seq_printf(m, "UVD: Disabled\n");
+			} else {
+				seq_printf(m, "UVD: Enabled\n");
+				if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_DCLK, (void *)&value, &size))
+					seq_printf(m, "\t%u MHz (DCLK)\n", value/100);
+				if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_UVD_VCLK, (void *)&value, &size))
+					seq_printf(m, "\t%u MHz (VCLK)\n", value/100);
+			}
+		}
+		seq_printf(m, "\n");
-	/* VCE clocks */
+		/* VCE clocks */
-	if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, (void *)&value, &size)) {
+		if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_POWER, (void *)&value, &size)) {
-		if (!value) {
+			if (!value) {
-			seq_printf(m, "VCE: Disabled\n");
+				seq_printf(m, "VCE: Disabled\n");
-		} else {
+			} else {
-			seq_printf(m, "VCE: Enabled\n");
+				seq_printf(m, "VCE: Enabled\n");
-			if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, (void *)&value, &size))
+				if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VCE_ECCLK, (void *)&value, &size))
-				seq_printf(m, "\t%u MHz (ECCLK)\n", value/100);
+					seq_printf(m, "\t%u MHz (ECCLK)\n", value/100);
+			}
 		}
 	}

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h+1−0

@@ -30,6 +30,7 @@ · 29 unmodified lines
30	#define AMDGPU_VCN_FIRMWARE_OFFSET 256	30	#define AMDGPU_VCN_FIRMWARE_OFFSET 256
31	#define AMDGPU_VCN_MAX_ENC_RINGS 3	31	#define AMDGPU_VCN_MAX_ENC_RINGS 3
32		32
		33	#define VCN_DEC_KMD_CMD 0x80000000
33	#define VCN_DEC_CMD_FENCE 0x00000000	34	#define VCN_DEC_CMD_FENCE 0x00000000
34	#define VCN_DEC_CMD_TRAP 0x00000001	35	#define VCN_DEC_CMD_TRAP 0x00000001
35	#define VCN_DEC_CMD_WRITE_REG 0x00000004	36	#define VCN_DEC_CMD_WRITE_REG 0x00000004

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+1−11

 	unsigned vmid = AMDGPU_JOB_GET_VMID(job);
 	u32 header, control = 0;
-	/* Prevent a hw deadlock due to a wave ID mismatch between ME and GDS.
-	 * This resets the wave ID counters. (needed by transform feedback)
-	 * TODO: This might only be needed on a VMID switch when we change
-	 *       the GDS OA mapping, not sure.
-	 */
-	amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
-	amdgpu_ring_write(ring, mmVGT_GS_MAX_WAVE_ID);
-	amdgpu_ring_write(ring, ring->adev->gds.vgt_gs_max_wave_id);
 	if (ib->flags & AMDGPU_IB_FLAG_CE)
 		header = PACKET3(PACKET3_INDIRECT_BUFFER_CNST, 2);
 	else
 		5 + /* HDP_INVL */
 		8 + 8 + /* FENCE x2 */
 		2, /* SWITCH_BUFFER */
-	.emit_ib_size =	7, /* gfx_v10_0_ring_emit_ib_gfx */
+	.emit_ib_size =	4, /* gfx_v10_0_ring_emit_ib_gfx */
 	.emit_ib = gfx_v10_0_ring_emit_ib_gfx,
 	.emit_fence = gfx_v10_0_ring_emit_fence,
 	.emit_pipeline_sync = gfx_v10_0_ring_emit_pipeline_sync,
 	default:
 		adev->gds.gds_size = 0x10000;
 		adev->gds.gds_compute_max_wave_id = 0x4ff;
-		adev->gds.vgt_gs_max_wave_id = 0x3ff;
 		break;
 	}

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+40−0

@@ -1321,6 +1321,39 @@ static int gfx_v8_0_rlc_init(struct amdgpu_device *adev) · 1320 unmodified lines
1321	return 0;	1321	return 0;
1322	}	1322	}
1323		1323
		1324	static int gfx_v8_0_csb_vram_pin(struct amdgpu_device *adev)
		1325	{
		1326	int r;
		1327
		1328	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false);
		1329	if (unlikely(r != 0))
		1330	return r;
		1331
		1332	r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj,
		1333	AMDGPU_GEM_DOMAIN_VRAM);
		1334	if (!r)
		1335	adev->gfx.rlc.clear_state_gpu_addr =
		1336	amdgpu_bo_gpu_offset(adev->gfx.rlc.clear_state_obj);
		1337
		1338	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
		1339
		1340	return r;
		1341	}
		1342
		1343	static void gfx_v8_0_csb_vram_unpin(struct amdgpu_device *adev)
		1344	{
		1345	int r;
		1346
		1347	if (!adev->gfx.rlc.clear_state_obj)
		1348	return;
		1349
		1350	r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true);
		1351	if (likely(r == 0)) {
		1352	amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj);
		1353	amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj);
		1354	}
		1355	}
		1356
1324	static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)	1357	static void gfx_v8_0_mec_fini(struct amdgpu_device *adev)
1325	{	1358	{
1326	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);	1359	amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL);
@@ -4785,6 +4818,10 @@ static int gfx_v8_0_hw_init(void *handle) · 3458 unmodified lines
4785	gfx_v8_0_init_golden_registers(adev);	4818	gfx_v8_0_init_golden_registers(adev);
4786	gfx_v8_0_constants_init(adev);	4819	gfx_v8_0_constants_init(adev);
4787		4820
		4821	r = gfx_v8_0_csb_vram_pin(adev);
		4822	if (r)
		4823	return r;
		4824
4788	r = adev->gfx.rlc.funcs->resume(adev);	4825	r = adev->gfx.rlc.funcs->resume(adev);
4789	if (r)	4826	if (r)
4790	return r;	4827	return r;
@@ -4901,6 +4938,9 @@ static int gfx_v8_0_hw_fini(void *handle) · 110 unmodified lines
4901	else	4938	else
4902	pr_err("rlc is busy, skip halt rlc\n");	4939	pr_err("rlc is busy, skip halt rlc\n");
4903	amdgpu_gfx_rlc_exit_safe_mode(adev);	4940	amdgpu_gfx_rlc_exit_safe_mode(adev);
		4941
		4942	gfx_v8_0_csb_vram_unpin(adev);
		4943
4904	return 0;	4944	return 0;
4905	}	4945	}
4906		4946

drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c+37−7

 	amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0_INTERNAL_OFFSET, 0));
 	amdgpu_ring_write(ring, 0);
 	amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0));
-	amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_START << 1);
+	amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_START << 1));
 }
 /**
 static void vcn_v2_0_dec_ring_insert_end(struct amdgpu_ring *ring)
 {
 	amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0));
-	amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_END << 1);
+	amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_END << 1));
 }
 /**
 	amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);
 	amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0));
-	amdgpu_ring_write(ring, VCN_DEC_CMD_FENCE << 1);
+	amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_FENCE << 1));
 	amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0_INTERNAL_OFFSET, 0));
 	amdgpu_ring_write(ring, 0);
 	amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0));
-	amdgpu_ring_write(ring, VCN_DEC_CMD_TRAP << 1);
+	amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_TRAP << 1));
 }
 /**
 	amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0));
-	amdgpu_ring_write(ring, VCN_DEC_CMD_REG_READ_COND_WAIT << 1);
+	amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_REG_READ_COND_WAIT << 1));
 }
 static void vcn_v2_0_dec_ring_emit_vm_flush(struct amdgpu_ring *ring,
 	amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0));
-	amdgpu_ring_write(ring, VCN_DEC_CMD_WRITE_REG << 1);
+	amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_WRITE_REG << 1));
 }
 /**
 	return 0;
 }
+static int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring *ring)
+{
+	struct amdgpu_device *adev = ring->adev;
+	uint32_t tmp = 0;
+	unsigned i;
+	int r;
+	WREG32(adev->vcn.external.scratch9, 0xCAFEDEAD);
+	r = amdgpu_ring_alloc(ring, 4);
+	if (r)
+		return r;
+	amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD_INTERNAL_OFFSET, 0));
+	amdgpu_ring_write(ring, VCN_DEC_KMD_CMD | (VCN_DEC_CMD_PACKET_START << 1));
+	amdgpu_ring_write(ring, PACKET0(adev->vcn.internal.scratch9, 0));
+	amdgpu_ring_write(ring, 0xDEADBEEF);
+	amdgpu_ring_commit(ring);
+	for (i = 0; i < adev->usec_timeout; i++) {
+		tmp = RREG32(adev->vcn.external.scratch9);
+		if (tmp == 0xDEADBEEF)
+			break;
+		DRM_UDELAY(1);
+	}
+	if (i >= adev->usec_timeout)
+		r = -ETIMEDOUT;
+	return r;
+}
 static int vcn_v2_0_set_powergating_state(void *handle,
 					  enum amd_powergating_state state)
 {
 	.emit_ib = vcn_v2_0_dec_ring_emit_ib,
 	.emit_fence = vcn_v2_0_dec_ring_emit_fence,
 	.emit_vm_flush = vcn_v2_0_dec_ring_emit_vm_flush,
-	.test_ring = amdgpu_vcn_dec_ring_test_ring,
+	.test_ring = vcn_v2_0_dec_ring_test_ring,
 	.test_ib = amdgpu_vcn_dec_ring_test_ib,
 	.insert_nop = vcn_v2_0_dec_ring_insert_nop,
 	.insert_start = vcn_v2_0_dec_ring_insert_start,

drivers/gpu/drm/amd/amdkfd/kfd_chardev.c+0−28

@@ -1567,32 +1567,6 @@ copy_from_user_failed: · 1566 unmodified lines
1567	return err;	1567	return err;
1568	}	1568	}
1569		1569
1570	static int kfd_ioctl_alloc_queue_gws(struct file *filep,
1571	struct kfd_process p, void data)
1572	{
1573	int retval;
1574	struct kfd_ioctl_alloc_queue_gws_args *args = data;
1575	struct kfd_dev *dev;
1576
1577	if (!hws_gws_support)
1578	return -ENODEV;
1579
1580	dev = kfd_device_by_id(args->gpu_id);
1581	if (!dev) {
1582	pr_debug("Could not find gpu id 0x%x\n", args->gpu_id);
1583	return -ENODEV;
1584	}
1585	if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS)
1586	return -ENODEV;
1587
1588	mutex_lock(&p->mutex);
1589	retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL);
1590	mutex_unlock(&p->mutex);
1591
1592	args->first_gws = 0;
1593	return retval;
1594	}
1595
1596	static int kfd_ioctl_get_dmabuf_info(struct file *filep,	1570	static int kfd_ioctl_get_dmabuf_info(struct file *filep,
1597	struct kfd_process p, void data)	1571	struct kfd_process p, void data)
1598	{	1572	{
@@ -1795,8 +1769,6 @@ static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = { · 196 unmodified lines
1795	AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF,	1769	AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF,
1796	kfd_ioctl_import_dmabuf, 0),	1770	kfd_ioctl_import_dmabuf, 0),
1797		1771
1798	AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS,
1799	kfd_ioctl_alloc_queue_gws, 0),
1800	};	1772	};
1801		1773
1802	#define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls)	1774	#define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls)

drivers/gpu/drm/amd/include/kgd_pp_interface.h+1−0

@@ -123,6 +123,7 @@ enum amd_pp_sensors { · 122 unmodified lines
123	AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK,	123	AMDGPU_PP_SENSOR_ENABLED_SMC_FEATURES_MASK,
124	AMDGPU_PP_SENSOR_MIN_FAN_RPM,	124	AMDGPU_PP_SENSOR_MIN_FAN_RPM,
125	AMDGPU_PP_SENSOR_MAX_FAN_RPM,	125	AMDGPU_PP_SENSOR_MAX_FAN_RPM,
		126	AMDGPU_PP_SENSOR_VCN_POWER_STATE,
126	};	127	};
127		128
128	enum amd_pp_task {	129	enum amd_pp_task {

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c+17−8

 	/* not support power state */
 	memset(state_info, 0, sizeof(struct pp_states_info));
-	state_info->nums = 0;
+	state_info->nums = 1;
+	state_info->states[0] = POWER_STATE_TYPE_DEFAULT;
 	return 0;
 }
 int smu_common_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor,
 			   void *data, uint32_t *size)
 {
+	struct smu_power_context *smu_power = &smu->smu_power;
+	struct smu_power_gate *power_gate = &smu_power->power_gate;
 	int ret = 0;
 	switch (sensor) {
 		*(uint32_t *)data = smu_feature_is_enabled(smu, SMU_FEATURE_DPM_VCE_BIT) ? 1 : 0;
 		*size = 4;
 		break;
+	case AMDGPU_PP_SENSOR_VCN_POWER_STATE:
+		*(uint32_t *)data = power_gate->vcn_gated ? 0 : 1;
+		*size = 4;
+		break;
 	default:
 		ret = -EINVAL;
 		break;
 		return ret;
 	}
+	ret = smu_register_irq_handler(smu);
+	if (ret) {
+		pr_err("Failed to register smc irq handler!\n");
+		return ret;
+	}
 	return 0;
 }
 	struct smu_context *smu = &adev->smu;
 	int ret;
+	kfree(smu->irq_source);
+	smu->irq_source = NULL;
 	ret = smu_smc_table_sw_fini(smu);
 	if (ret) {
 		pr_err("Failed to sw fini smc table!\n");
 	if (ret)
 		goto failed;
-	ret = smu_register_irq_handler(smu);
-	if (ret)
-		goto failed;
 	if (!smu->pm_enabled)
 		adev->pm.dpm_enabled = false;
 	else
 	kfree(table_context->overdrive_table);
 	table_context->overdrive_table = NULL;
-	kfree(smu->irq_source);
-	smu->irq_source = NULL;
 	ret = smu_fini_fb_allocations(smu);
 	if (ret)
 		return ret;

drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c+9−0

 static int smu10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
 			  void *value, int *size)
 {
+	struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
 	uint32_t sclk, mclk;
 	int ret = 0;
 	case AMDGPU_PP_SENSOR_GPU_TEMP:
 		*((uint32_t *)value) = smu10_thermal_get_temperature(hwmgr);
 		break;
+	case AMDGPU_PP_SENSOR_VCN_POWER_STATE:
+		*(uint32_t *)value =  smu10_data->vcn_power_gated ? 0 : 1;
+		*size = 4;
+		break;
 	default:
 		ret = -EINVAL;
 		break;
 static void smu10_powergate_vcn(struct pp_hwmgr *hwmgr, bool bgate)
 {
+	struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
 	if (bgate) {
 		amdgpu_device_ip_set_powergating_state(hwmgr->adev,
 						AMD_IP_BLOCK_TYPE_VCN,
 						AMD_PG_STATE_GATE);
 		smum_send_msg_to_smc_with_parameter(hwmgr,
 					PPSMC_MSG_PowerDownVcn, 0);
+		smu10_data->vcn_power_gated = true;
 	} else {
 		smum_send_msg_to_smc_with_parameter(hwmgr,
 						PPSMC_MSG_PowerUpVcn, 0);
 		amdgpu_device_ip_set_powergating_state(hwmgr->adev,
 						AMD_IP_BLOCK_TYPE_VCN,
 						AMD_PG_STATE_UNGATE);
+		smu10_data->vcn_power_gated = false;
 	}
 }

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h+1−1

 	struct smu_table		*tables;
 	uint32_t			table_count;
 	struct smu_table		memory_pool;
-	uint16_t                        software_shutdown_temp;
 	uint8_t                         thermal_controller_type;
 	uint16_t			TDPODLimit;
 struct smu_power_gate {
 	bool uvd_gated;
 	bool vce_gated;
+	bool vcn_gated;
 };
 struct smu_power_context {

drivers/gpu/drm/amd/powerplay/navi10_ppt.c+68−31

@@ -23,6 +23,7 @@ · 22 unmodified lines
23		23
24	#include "pp_debug.h"	24	#include "pp_debug.h"
25	#include <linux/firmware.h>	25	#include <linux/firmware.h>
		26	#include <linux/pci.h>
26	#include "amdgpu.h"	27	#include "amdgpu.h"
27	#include "amdgpu_smu.h"	28	#include "amdgpu_smu.h"
28	#include "atomfirmware.h"	29	#include "atomfirmware.h"
@@ -501,6 +502,8 @@ static int navi10_store_powerplay_table(struct smu_context *smu) · 472 unmodified lines
501		502
502	static int navi10_tables_init(struct smu_context smu, struct smu_table tables)	503	static int navi10_tables_init(struct smu_context smu, struct smu_table tables)
503	{	504	{
		505	struct smu_table_context *smu_table = &smu->smu_table;
		506
504	SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),	507	SMU_TABLE_INIT(tables, SMU_TABLE_PPTABLE, sizeof(PPTable_t),
505	PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);	508	PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM);
506	SMU_TABLE_INIT(tables, SMU_TABLE_WATERMARKS, sizeof(Watermarks_t),	509	SMU_TABLE_INIT(tables, SMU_TABLE_WATERMARKS, sizeof(Watermarks_t),
@@ -515,9 +518,35 @@ static int navi10_tables_init(struct smu_context smu, struct smu_table tables) · 8 unmodified lines
515	sizeof(DpmActivityMonitorCoeffInt_t), PAGE_SIZE,	518	sizeof(DpmActivityMonitorCoeffInt_t), PAGE_SIZE,
516	AMDGPU_GEM_DOMAIN_VRAM);	519	AMDGPU_GEM_DOMAIN_VRAM);
517		520
		521	smu_table->metrics_table = kzalloc(sizeof(SmuMetrics_t), GFP_KERNEL);
		522	if (!smu_table->metrics_table)
		523	return -ENOMEM;
		524	smu_table->metrics_time = 0;
		525
518	return 0;	526	return 0;
519	}	527	}
520		528
		529	static int navi10_get_metrics_table(struct smu_context *smu,
		530	SmuMetrics_t *metrics_table)
		531	{
		532	struct smu_table_context *smu_table= &smu->smu_table;
		533	int ret = 0;
		534
		535	if (!smu_table->metrics_time \|\| time_after(jiffies, smu_table->metrics_time + HZ / 1000)) {
		536	ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0,
		537	(void *)smu_table->metrics_table, false);
		538	if (ret) {
		539	pr_info("Failed to export SMU metrics table!\n");
		540	return ret;
		541	}
		542	smu_table->metrics_time = jiffies;
		543	}
		544
		545	memcpy(metrics_table, smu_table->metrics_table, sizeof(SmuMetrics_t));
		546
		547	return ret;
		548	}
		549
521	static int navi10_allocate_dpm_context(struct smu_context *smu)	550	static int navi10_allocate_dpm_context(struct smu_context *smu)
522	{	551	{
523	struct smu_dpm_context *smu_dpm = &smu->smu_dpm;	552	struct smu_dpm_context *smu_dpm = &smu->smu_dpm;
@@ -576,44 +605,38 @@ static int navi10_set_default_dpm_table(struct smu_context *smu) · 52 unmodified lines
576		605
577	static int navi10_dpm_set_uvd_enable(struct smu_context *smu, bool enable)	606	static int navi10_dpm_set_uvd_enable(struct smu_context *smu, bool enable)
578	{	607	{
579	int ret = 0;
580	struct smu_power_context *smu_power = &smu->smu_power;	608	struct smu_power_context *smu_power = &smu->smu_power;
581	struct smu_power_gate *power_gate = &smu_power->power_gate;	609	struct smu_power_gate *power_gate = &smu_power->power_gate;
		610	int ret = 0;
582		611
583	if (enable && power_gate->uvd_gated) {	612	if (enable) {
584	if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UVD_BIT)) {	613	/* vcn dpm on is a prerequisite for vcn power gate messages */
		614	if (smu_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) {
585	ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 1);	615	ret = smu_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 1);
586	if (ret)	616	if (ret)
587	return ret;	617	return ret;
588	}	618	}
589	power_gate->uvd_gated = false;	619	power_gate->vcn_gated = false;
590	} else {	620	} else {
591	if (!enable && !power_gate->uvd_gated) {	621	if (smu_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) {
592	if (smu_feature_is_enabled(smu, SMU_FEATURE_DPM_UVD_BIT)) {	622	ret = smu_send_smc_msg(smu, SMU_MSG_PowerDownVcn);
593	ret = smu_send_smc_msg(smu, SMU_MSG_PowerDownVcn);	623	if (ret)
594	if (ret)	624	return ret;
595	return ret;
596	}
597	power_gate->uvd_gated = true;
598	}	625	}
		626	power_gate->vcn_gated = true;
599	}	627	}
600		628
601	return 0;	629	return ret;
602	}	630	}
603		631
604	static int navi10_get_current_clk_freq_by_table(struct smu_context *smu,	632	static int navi10_get_current_clk_freq_by_table(struct smu_context *smu,
605	enum smu_clk_type clk_type,	633	enum smu_clk_type clk_type,
606	uint32_t *value)	634	uint32_t *value)
607	{	635	{
608	static SmuMetrics_t metrics;
609	int ret = 0, clk_id = 0;	636	int ret = 0, clk_id = 0;
		637	SmuMetrics_t metrics;
610		638
611	if (!value)	639	ret = navi10_get_metrics_table(smu, &metrics);
612	return -EINVAL;
613
614	memset(&metrics, 0, sizeof(metrics));
615
616	ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0, (void *)&metrics, false);
617	if (ret)	640	if (ret)
618	return ret;	641	return ret;
619		642
@@ -901,8 +924,9 @@ static int navi10_get_gpu_power(struct smu_context smu, uint32_t value) · 281 unmodified lines
901	if (!value)	924	if (!value)
902	return -EINVAL;	925	return -EINVAL;
903		926
904	ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0, (void *)&metrics,	927	ret = navi10_get_metrics_table(smu, &metrics);
905	false);	928	if (ret)
		929	return ret;
906	if (ret)	930	if (ret)
907	return ret;	931	return ret;
908		932
@@ -921,10 +945,7 @@ static int navi10_get_current_activity_percent(struct smu_context *smu, · 12 unmodified lines
921	if (!value)	945	if (!value)
922	return -EINVAL;	946	return -EINVAL;
923		947
924	msleep(1);	948	ret = navi10_get_metrics_table(smu, &metrics);
925
926	ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0,
927	(void *)&metrics, false);
928	if (ret)	949	if (ret)
929	return ret;	950	return ret;
930		951
@@ -963,10 +984,9 @@ static int navi10_get_fan_speed_rpm(struct smu_context *smu, · 32 unmodified lines
963	if (!speed)	984	if (!speed)
964	return -EINVAL;	985	return -EINVAL;
965		986
966	memset(&metrics, 0, sizeof(metrics));	987	ret = navi10_get_metrics_table(smu, &metrics);
967		988	if (ret)
968	ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0,	989	return ret;
969	(void *)&metrics, false);
970	if (ret)	990	if (ret)
971	return ret;	991	return ret;
972		992
@@ -1314,7 +1334,7 @@ static int navi10_thermal_get_temperature(struct smu_context *smu, · 341 unmodified lines
1314	if (!value)	1334	if (!value)
1315	return -EINVAL;	1335	return -EINVAL;
1316		1336
1317	ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0, (void *)&metrics, false);	1337	ret = navi10_get_metrics_table(smu, &metrics);
1318	if (ret)	1338	if (ret)
1319	return ret;	1339	return ret;
1320		1340
@@ -1573,7 +1593,7 @@ static int navi10_set_peak_clock_by_device(struct smu_context *smu) · 252 unmodified lines
1573	uint32_t sclk_freq = 0, uclk_freq = 0;	1593	uint32_t sclk_freq = 0, uclk_freq = 0;
1574	uint32_t uclk_level = 0;	1594	uint32_t uclk_level = 0;
1575		1595
1576	switch (adev->rev_id) {	1596	switch (adev->pdev->revision) {
1577	case 0xf0: /* XTX */	1597	case 0xf0: /* XTX */
1578	case 0xc0:	1598	case 0xc0:
1579	sclk_freq = NAVI10_PEAK_SCLK_XTX;	1599	sclk_freq = NAVI10_PEAK_SCLK_XTX;
@@ -1620,6 +1640,22 @@ static int navi10_set_performance_level(struct smu_context *smu, enum amd_dpm_fo · 40 unmodified lines
1620	return ret;	1640	return ret;
1621	}	1641	}
1622		1642
		1643	static int navi10_get_thermal_temperature_range(struct smu_context *smu,
		1644	struct smu_temperature_range *range)
		1645	{
		1646	struct smu_table_context *table_context = &smu->smu_table;
		1647	struct smu_11_0_powerplay_table *powerplay_table = table_context->power_play_table;
		1648
		1649	if (!range \|\| !powerplay_table)
		1650	return -EINVAL;
		1651
		1652	/* The unit is temperature */
		1653	range->min = 0;
		1654	range->max = powerplay_table->software_shutdown_temp;
		1655
		1656	return 0;
		1657	}
		1658
1623	static const struct pptable_funcs navi10_ppt_funcs = {	1659	static const struct pptable_funcs navi10_ppt_funcs = {
1624	.tables_init = navi10_tables_init,	1660	.tables_init = navi10_tables_init,
1625	.alloc_dpm_context = navi10_allocate_dpm_context,	1661	.alloc_dpm_context = navi10_allocate_dpm_context,
@@ -1657,6 +1693,7 @@ static const struct pptable_funcs navi10_ppt_funcs = { · 31 unmodified lines
1657	.get_ppfeature_status = navi10_get_ppfeature_status,	1693	.get_ppfeature_status = navi10_get_ppfeature_status,
1658	.set_ppfeature_status = navi10_set_ppfeature_status,	1694	.set_ppfeature_status = navi10_set_ppfeature_status,
1659	.set_performance_level = navi10_set_performance_level,	1695	.set_performance_level = navi10_set_performance_level,
		1696	.get_thermal_temperature_range = navi10_get_thermal_temperature_range,
1660	};	1697	};
1661		1698
1662	void navi10_set_ppt_funcs(struct smu_context *smu)	1699	void navi10_set_ppt_funcs(struct smu_context *smu)

drivers/gpu/drm/amd/powerplay/smu_v11_0.c+22−16

 				       struct smu_temperature_range *range)
 {
 	struct amdgpu_device *adev = smu->adev;
-	int low = SMU_THERMAL_MINIMUM_ALERT_TEMP *
+	int low = SMU_THERMAL_MINIMUM_ALERT_TEMP;
-		SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	int high = SMU_THERMAL_MAXIMUM_ALERT_TEMP;
-	int high = SMU_THERMAL_MAXIMUM_ALERT_TEMP *
-		SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 	uint32_t val;
 	if (!range)
 	if (high > range->max)
 		high = range->max;
+	low = max(SMU_THERMAL_MINIMUM_ALERT_TEMP, range->min);
+	high = min(SMU_THERMAL_MAXIMUM_ALERT_TEMP, range->max);
 	if (low > high)
 		return -EINVAL;
 	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
 	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_INTH_MASK, 0);
 	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_INTL_MASK, 0);
-	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / SMU_TEMPERATURE_UNITS_PER_CENTIGRADES));
+	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high & 0xff));
-	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / SMU_TEMPERATURE_UNITS_PER_CENTIGRADES));
+	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low & 0xff));
 	val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
 	WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
 	if (!smu->pm_enabled)
 		return ret;
 	ret = smu_get_thermal_temperature_range(smu, &range);
+	if (ret)
+		return ret;
 	if (smu->smu_table.thermal_controller_type) {
 		ret = smu_v11_0_set_thermal_range(smu, &range);
 			return ret;
 	}
-	adev->pm.dpm.thermal.min_temp = range.min;
+	adev->pm.dpm.thermal.min_temp = range.min * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	adev->pm.dpm.thermal.max_temp = range.max;
+	adev->pm.dpm.thermal.max_temp = range.max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max;
+	adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min;
+	adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max;
+	adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max;
+	adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	adev->pm.dpm.thermal.min_mem_temp = range.mem_min;
+	adev->pm.dpm.thermal.min_mem_temp = range.mem_min * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max;
+	adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
-	adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max;
+	adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	adev->pm.dpm.thermal.min_temp = range.min * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	adev->pm.dpm.thermal.max_temp = range.max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
 	return ret;
 }
 {
 	int ret = 0;
-	if (smu_feature_is_supported(smu, SMU_FEATURE_FAN_CONTROL_BIT))
+	if (!smu_feature_is_supported(smu, SMU_FEATURE_FAN_CONTROL_BIT))
 		return 0;
 	ret = smu_feature_set_enabled(smu, SMU_FEATURE_FAN_CONTROL_BIT, start);

drivers/gpu/drm/amd/powerplay/vega20_ppt.c+11−23

@@ -450,7 +450,6 @@ static int vega20_store_powerplay_table(struct smu_context *smu) · 449 unmodified lines
450	memcpy(table_context->driver_pptable, &powerplay_table->smcPPTable,	450	memcpy(table_context->driver_pptable, &powerplay_table->smcPPTable,
451	sizeof(PPTable_t));	451	sizeof(PPTable_t));
452		452
453	table_context->software_shutdown_temp = powerplay_table->usSoftwareShutdownTemp;
454	table_context->thermal_controller_type = powerplay_table->ucThermalControllerType;	453	table_context->thermal_controller_type = powerplay_table->ucThermalControllerType;
455	table_context->TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPERCENTAGE]);	454	table_context->TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPERCENTAGE]);
456		455
@@ -3234,35 +3233,24 @@ static int vega20_set_watermarks_table(struct smu_context *smu, · 2777 unmodified lines
3234	return 0;	3233	return 0;
3235	}	3234	}
3236		3235
3237	static const struct smu_temperature_range vega20_thermal_policy[] =
3238	{
3239	{-273150, 99000, 99000, -273150, 99000, 99000, -273150, 99000, 99000},
3240	{ 120000, 120000, 120000, 120000, 120000, 120000, 120000, 120000, 120000},
3241	};
3242
3243	static int vega20_get_thermal_temperature_range(struct smu_context *smu,	3236	static int vega20_get_thermal_temperature_range(struct smu_context *smu,
3244	struct smu_temperature_range *range)	3237	struct smu_temperature_range *range)
3245	{	3238	{
3246		3239	struct smu_table_context *table_context = &smu->smu_table;
		3240	ATOM_Vega20_POWERPLAYTABLE *powerplay_table = table_context->power_play_table;
3247	PPTable_t *pptable = smu->smu_table.driver_pptable;	3241	PPTable_t *pptable = smu->smu_table.driver_pptable;
3248		3242
3249	if (!range)	3243	if (!range \|\| !powerplay_table)
3250	return -EINVAL;	3244	return -EINVAL;
3251		3245
3252	memcpy(range, &vega20_thermal_policy[0], sizeof(struct smu_temperature_range));	3246	/* The unit is temperature */
3253		3247	range->min = 0;
3254	range->max = pptable->TedgeLimit *	3248	range->max = powerplay_table->usSoftwareShutdownTemp;
3255	SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;	3249	range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE);
3256	range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) *	3250	range->hotspot_crit_max = pptable->ThotspotLimit;
3257	SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;	3251	range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT);
3258	range->hotspot_crit_max = pptable->ThotspotLimit *	3252	range->mem_crit_max = pptable->ThbmLimit;
3259	SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;	3253	range->mem_emergency_max = (pptable->ThbmLimit + CTF_OFFSET_HBM);
3260	range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) *
3261	SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
3262	range->mem_crit_max = pptable->ThbmLimit *
3263	SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
3264	range->mem_emergency_max = (pptable->ThbmLimit + CTF_OFFSET_HBM)*
3265	SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
3266		3254
3267		3255
3268	return 0;	3256	return 0;

drivers/gpu/drm/bochs/bochs_kms.c+1−0

@@ -191,6 +191,7 @@ int bochs_kms_init(struct bochs_device *bochs) · 190 unmodified lines
191	bochs->dev->mode_config.fb_base = bochs->fb_base;	191	bochs->dev->mode_config.fb_base = bochs->fb_base;
192	bochs->dev->mode_config.preferred_depth = 24;	192	bochs->dev->mode_config.preferred_depth = 24;
193	bochs->dev->mode_config.prefer_shadow = 0;	193	bochs->dev->mode_config.prefer_shadow = 0;
		194	bochs->dev->mode_config.prefer_shadow_fbdev = 1;
194	bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true;	195	bochs->dev->mode_config.quirk_addfb_prefer_host_byte_order = true;
195		196
196	bochs->dev->mode_config.funcs = &bochs_mode_funcs;	197	bochs->dev->mode_config.funcs = &bochs_mode_funcs;

drivers/gpu/drm/bridge/Kconfig+3−1

 config DRM_LVDS_ENCODER
 	tristate "Transparent parallel to LVDS encoder support"
 	depends on OF
+	select DRM_KMS_HELPER
 	select DRM_PANEL_BRIDGE
 	help
 	  Support for transparent parallel to LVDS encoders that don't require
 config DRM_TOSHIBA_TC358764
 	tristate "TC358764 DSI/LVDS bridge"
-	depends on DRM && DRM_PANEL
 	depends on OF
 	select DRM_MIPI_DSI
+	select DRM_KMS_HELPER
+	select DRM_PANEL
 	help
 	  Toshiba TC358764 DSI/LVDS bridge driver.

drivers/gpu/drm/drm_client.c+49−11

@@ -254,7 +254,6 @@ drm_client_buffer_create(struct drm_client_dev *client, u32 width, u32 height, u · 253 unmodified lines
254	struct drm_device *dev = client->dev;	254	struct drm_device *dev = client->dev;
255	struct drm_client_buffer *buffer;	255	struct drm_client_buffer *buffer;
256	struct drm_gem_object *obj;	256	struct drm_gem_object *obj;
257	void *vaddr;
258	int ret;	257	int ret;
259		258
260	buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);	259	buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
@@ -281,6 +280,36 @@ drm_client_buffer_create(struct drm_client_dev *client, u32 width, u32 height, u · 20 unmodified lines
281		280
282	buffer->gem = obj;	281	buffer->gem = obj;
283		282
		283	return buffer;
		284
		285	err_delete:
		286	drm_client_buffer_delete(buffer);
		287
		288	return ERR_PTR(ret);
		289	}
		290
		291	/**
		292	* drm_client_buffer_vmap - Map DRM client buffer into address space
		293	* @buffer: DRM client buffer
		294	*
		295	* This function maps a client buffer into kernel address space. If the
		296	* buffer is already mapped, it returns the mapping's address.
		297	*
		298	* Client buffer mappings are not ref'counted. Each call to
		299	* drm_client_buffer_vmap() should be followed by a call to
		300	* drm_client_buffer_vunmap(); or the client buffer should be mapped
		301	* throughout its lifetime.
		302	*
		303	* Returns:
		304	* The mapped memory's address
		305	*/
		306	void drm_client_buffer_vmap(struct drm_client_buffer buffer)
		307	{
		308	void *vaddr;
		309
		310	if (buffer->vaddr)
		311	return buffer->vaddr;
		312
284	/*	313	/*
285	* FIXME: The dependency on GEM here isn't required, we could	314	* FIXME: The dependency on GEM here isn't required, we could
286	* convert the driver handle to a dma-buf instead and use the	315	* convert the driver handle to a dma-buf instead and use the
@@ -289,21 +318,30 @@ drm_client_buffer_create(struct drm_client_dev *client, u32 width, u32 height, u · 2 unmodified lines
289	* fd_install step out of the driver backend hooks, to make that	318	* fd_install step out of the driver backend hooks, to make that
290	* final step optional for internal users.	319	* final step optional for internal users.
291	*/	320	*/
292	vaddr = drm_gem_vmap(obj);	321	vaddr = drm_gem_vmap(buffer->gem);
293	if (IS_ERR(vaddr)) {	322	if (IS_ERR(vaddr))
294	ret = PTR_ERR(vaddr);	323	return vaddr;
295	goto err_delete;
296	}
297		324
298	buffer->vaddr = vaddr;	325	buffer->vaddr = vaddr;
299		326
300	return buffer;	327	return vaddr;
301		328	}
302	err_delete:	329	EXPORT_SYMBOL(drm_client_buffer_vmap);
303	drm_client_buffer_delete(buffer);
304		330
305	return ERR_PTR(ret);	331	/**
		332	* drm_client_buffer_vunmap - Unmap DRM client buffer
		333	* @buffer: DRM client buffer
		334	*
		335	* This function removes a client buffer's memory mapping. Calling this
		336	* function is only required by clients that manage their buffer mappings
		337	* by themselves.
		338	*/
		339	void drm_client_buffer_vunmap(struct drm_client_buffer *buffer)
		340	{
		341	drm_gem_vunmap(buffer->gem, buffer->vaddr);
		342	buffer->vaddr = NULL;
306	}	343	}
		344	EXPORT_SYMBOL(drm_client_buffer_vunmap);
307		345
308	static void drm_client_buffer_rmfb(struct drm_client_buffer *buffer)	346	static void drm_client_buffer_rmfb(struct drm_client_buffer *buffer)
309	{	347	{

drivers/gpu/drm/drm_fb_helper.c+40−11

@@ -403,6 +403,7 @@ static void drm_fb_helper_dirty_work(struct work_struct *work) · 402 unmodified lines
403	struct drm_clip_rect *clip = &helper->dirty_clip;	403	struct drm_clip_rect *clip = &helper->dirty_clip;
404	struct drm_clip_rect clip_copy;	404	struct drm_clip_rect clip_copy;
405	unsigned long flags;	405	unsigned long flags;
		406	void *vaddr;
406		407
407	spin_lock_irqsave(&helper->dirty_lock, flags);	408	spin_lock_irqsave(&helper->dirty_lock, flags);
408	clip_copy = *clip;	409	clip_copy = *clip;
@@ -412,10 +413,20 @@ static void drm_fb_helper_dirty_work(struct work_struct *work) · 3 unmodified lines
412		413
413	/* call dirty callback only when it has been really touched */	414	/* call dirty callback only when it has been really touched */
414	if (clip_copy.x1 < clip_copy.x2 && clip_copy.y1 < clip_copy.y2) {	415	if (clip_copy.x1 < clip_copy.x2 && clip_copy.y1 < clip_copy.y2) {
		416
415	/* Generic fbdev uses a shadow buffer */	417	/* Generic fbdev uses a shadow buffer */
416	if (helper->buffer)	418	if (helper->buffer) {
		419	vaddr = drm_client_buffer_vmap(helper->buffer);
		420	if (IS_ERR(vaddr))
		421	return;
417	drm_fb_helper_dirty_blit_real(helper, &clip_copy);	422	drm_fb_helper_dirty_blit_real(helper, &clip_copy);
418	helper->fb->funcs->dirty(helper->fb, NULL, 0, 0, &clip_copy, 1);	423	}
		424	if (helper->fb->funcs->dirty)
		425	helper->fb->funcs->dirty(helper->fb, NULL, 0, 0,
		426	&clip_copy, 1);
		427
		428	if (helper->buffer)
		429	drm_client_buffer_vunmap(helper->buffer);
419	}	430	}
420	}	431	}
421		432
@@ -604,6 +615,16 @@ void drm_fb_helper_unlink_fbi(struct drm_fb_helper *fb_helper) · 182 unmodified lines
604	}	615	}
605	EXPORT_SYMBOL(drm_fb_helper_unlink_fbi);	616	EXPORT_SYMBOL(drm_fb_helper_unlink_fbi);
606		617
		618	static bool drm_fbdev_use_shadow_fb(struct drm_fb_helper *fb_helper)
		619	{
		620	struct drm_device *dev = fb_helper->dev;
		621	struct drm_framebuffer *fb = fb_helper->fb;
		622
		623	return dev->mode_config.prefer_shadow_fbdev \|\|
		624	dev->mode_config.prefer_shadow \|\|
		625	fb->funcs->dirty;
		626	}
		627
607	static void drm_fb_helper_dirty(struct fb_info *info, u32 x, u32 y,	628	static void drm_fb_helper_dirty(struct fb_info *info, u32 x, u32 y,
608	u32 width, u32 height)	629	u32 width, u32 height)
609	{	630	{
@@ -611,7 +632,7 @@ static void drm_fb_helper_dirty(struct fb_info *info, u32 x, u32 y, · 1 unmodified line
611	struct drm_clip_rect *clip = &helper->dirty_clip;	632	struct drm_clip_rect *clip = &helper->dirty_clip;
612	unsigned long flags;	633	unsigned long flags;
613		634
614	if (!helper->fb->funcs->dirty)	635	if (!drm_fbdev_use_shadow_fb(helper))
615	return;	636	return;
616		637
617	spin_lock_irqsave(&helper->dirty_lock, flags);	638	spin_lock_irqsave(&helper->dirty_lock, flags);
@@ -2178,6 +2199,7 @@ int drm_fb_helper_generic_probe(struct drm_fb_helper *fb_helper, · 1560 unmodified lines
2178	struct drm_framebuffer *fb;	2199	struct drm_framebuffer *fb;
2179	struct fb_info *fbi;	2200	struct fb_info *fbi;
2180	u32 format;	2201	u32 format;
		2202	void *vaddr;
2181		2203
2182	DRM_DEBUG_KMS("surface width(%d), height(%d) and bpp(%d)\n",	2204	DRM_DEBUG_KMS("surface width(%d), height(%d) and bpp(%d)\n",
2183	sizes->surface_width, sizes->surface_height,	2205	sizes->surface_width, sizes->surface_height,
@@ -2200,16 +2222,10 @@ int drm_fb_helper_generic_probe(struct drm_fb_helper *fb_helper, · 16 unmodified lines
2200	fbi->fbops = &drm_fbdev_fb_ops;	2222	fbi->fbops = &drm_fbdev_fb_ops;
2201	fbi->screen_size = fb->height * fb->pitches[0];	2223	fbi->screen_size = fb->height * fb->pitches[0];
2202	fbi->fix.smem_len = fbi->screen_size;	2224	fbi->fix.smem_len = fbi->screen_size;
2203	fbi->screen_buffer = buffer->vaddr;	2225
2204	/* Shamelessly leak the physical address to user-space */
2205	#if IS_ENABLED(CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM)
2206	if (drm_leak_fbdev_smem && fbi->fix.smem_start == 0)
2207	fbi->fix.smem_start =
2208	page_to_phys(virt_to_page(fbi->screen_buffer));
2209	#endif
2210	drm_fb_helper_fill_info(fbi, fb_helper, sizes);	2226	drm_fb_helper_fill_info(fbi, fb_helper, sizes);
2211		2227
2212	if (fb->funcs->dirty) {	2228	if (drm_fbdev_use_shadow_fb(fb_helper)) {
2213	struct fb_ops *fbops;	2229	struct fb_ops *fbops;
2214	void *shadow;	2230	void *shadow;
2215		2231
@@ -2231,6 +2247,19 @@ int drm_fb_helper_generic_probe(struct drm_fb_helper *fb_helper, · 15 unmodified lines
2231	fbi->fbdefio = &drm_fbdev_defio;	2247	fbi->fbdefio = &drm_fbdev_defio;
2232		2248
2233	fb_deferred_io_init(fbi);	2249	fb_deferred_io_init(fbi);
		2250	} else {
		2251	/* buffer is mapped for HW framebuffer */
		2252	vaddr = drm_client_buffer_vmap(fb_helper->buffer);
		2253	if (IS_ERR(vaddr))
		2254	return PTR_ERR(vaddr);
		2255
		2256	fbi->screen_buffer = vaddr;
		2257	/* Shamelessly leak the physical address to user-space */
		2258	#if IS_ENABLED(CONFIG_DRM_FBDEV_LEAK_PHYS_SMEM)
		2259	if (drm_leak_fbdev_smem && fbi->fix.smem_start == 0)
		2260	fbi->fix.smem_start =
		2261	page_to_phys(virt_to_page(fbi->screen_buffer));
		2262	#endif
2234	}	2263	}
2235		2264
2236	return 0;	2265	return 0;

drivers/gpu/drm/drm_modes.c+3−1

 	}
 	if (named_mode) {
-		strncpy(mode->name, name, mode_end);
+		if (mode_end + 1 > DRM_DISPLAY_MODE_LEN)
+			return false;
+		strscpy(mode->name, name, mode_end + 1);
 	} else {
 		ret = drm_mode_parse_cmdline_res_mode(name, mode_end,
 						      parse_extras,

drivers/gpu/drm/exynos/Kconfig+1−0

@@ -2,6 +2,7 @@ · 1 unmodified line
2	config DRM_EXYNOS	2	config DRM_EXYNOS
3	tristate "DRM Support for Samsung SoC EXYNOS Series"	3	tristate "DRM Support for Samsung SoC EXYNOS Series"
4	depends on OF && DRM && (ARCH_S3C64XX \|\| ARCH_S5PV210 \|\| ARCH_EXYNOS \|\| ARCH_MULTIPLATFORM \|\| COMPILE_TEST)	4	depends on OF && DRM && (ARCH_S3C64XX \|\| ARCH_S5PV210 \|\| ARCH_EXYNOS \|\| ARCH_MULTIPLATFORM \|\| COMPILE_TEST)
		5	depends on MMU
5	select DRM_KMS_HELPER	6	select DRM_KMS_HELPER
6	select VIDEOMODE_HELPERS	7	select VIDEOMODE_HELPERS
7	select SND_SOC_HDMI_CODEC if SND_SOC	8	select SND_SOC_HDMI_CODEC if SND_SOC

drivers/gpu/drm/exynos/exynos_drm_fimc.c+1−1

@@ -44,7 +44,7 @@ static unsigned int fimc_mask = 0xc; · 43 unmodified lines
44	module_param_named(fimc_devs, fimc_mask, uint, 0644);	44	module_param_named(fimc_devs, fimc_mask, uint, 0644);
45	MODULE_PARM_DESC(fimc_devs, "Alias mask for assigning FIMC devices to Exynos DRM");	45	MODULE_PARM_DESC(fimc_devs, "Alias mask for assigning FIMC devices to Exynos DRM");
46		46
47	#define get_fimc_context(dev) platform_get_drvdata(to_platform_device(dev))	47	#define get_fimc_context(dev) dev_get_drvdata(dev)
48		48
49	enum {	49	enum {
50	FIMC_CLK_LCLK,	50	FIMC_CLK_LCLK,

drivers/gpu/drm/exynos/exynos_drm_g2d.c+1−1

@@ -267,7 +267,7 @@ static inline void g2d_hw_reset(struct g2d_data *g2d) · 266 unmodified lines
267	static int g2d_init_cmdlist(struct g2d_data *g2d)	267	static int g2d_init_cmdlist(struct g2d_data *g2d)
268	{	268	{
269	struct device *dev = g2d->dev;	269	struct device *dev = g2d->dev;
270	struct g2d_cmdlist_node *node = g2d->cmdlist_node;	270	struct g2d_cmdlist_node *node;
271	int nr;	271	int nr;
272	int ret;	272	int ret;
273	struct g2d_buf_info *buf_info;	273	struct g2d_buf_info *buf_info;

drivers/gpu/drm/exynos/exynos_drm_gsc.c+1−1

@@ -58,7 +58,7 @@ · 57 unmodified lines
58	#define GSC_COEF_DEPTH 3	58	#define GSC_COEF_DEPTH 3
59	#define GSC_AUTOSUSPEND_DELAY 2000	59	#define GSC_AUTOSUSPEND_DELAY 2000
60		60
61	#define get_gsc_context(dev) platform_get_drvdata(to_platform_device(dev))	61	#define get_gsc_context(dev) dev_get_drvdata(dev)
62	#define gsc_read(offset) readl(ctx->regs + (offset))	62	#define gsc_read(offset) readl(ctx->regs + (offset))
63	#define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset))	63	#define gsc_write(cfg, offset) writel(cfg, ctx->regs + (offset))
64		64

drivers/gpu/drm/exynos/exynos_drm_scaler.c+2−2

@@ -94,12 +94,12 @@ static inline int scaler_reset(struct scaler_context *scaler) · 93 unmodified lines
94	scaler_write(SCALER_CFG_SOFT_RESET, SCALER_CFG);	94	scaler_write(SCALER_CFG_SOFT_RESET, SCALER_CFG);
95	do {	95	do {
96	cpu_relax();	96	cpu_relax();
97	} while (retry > 1 &&	97	} while (--retry > 1 &&
98	scaler_read(SCALER_CFG) & SCALER_CFG_SOFT_RESET);	98	scaler_read(SCALER_CFG) & SCALER_CFG_SOFT_RESET);
99	do {	99	do {
100	cpu_relax();	100	cpu_relax();
101	scaler_write(1, SCALER_INT_EN);	101	scaler_write(1, SCALER_INT_EN);
102	} while (retry > 0 && scaler_read(SCALER_INT_EN) != 1);	102	} while (--retry > 0 && scaler_read(SCALER_INT_EN) != 1);
103		103
104	return retry ? 0 : -EIO;	104	return retry ? 0 : -EIO;
105	}	105	}

drivers/gpu/drm/i915/display/intel_bios.c+1−1

@@ -765,7 +765,7 @@ parse_psr(struct drm_i915_private dev_priv, const struct bdb_header bdb) · 764 unmodified lines
765	}	765	}
766		766
767	if (bdb->version >= 226) {	767	if (bdb->version >= 226) {
768	u32 wakeup_time = psr_table->psr2_tp2_tp3_wakeup_time;	768	u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
769		769
770	wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;	770	wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
771	switch (wakeup_time) {	771	switch (wakeup_time) {

drivers/gpu/drm/i915/display/intel_bw.c+10−5

 		clpchgroup = (sa->deburst * deinterleave / num_channels) << i;
 		bi->num_planes = (ipqdepth - clpchgroup) / clpchgroup + 1;
+		bi->num_qgv_points = qi.num_points;
 		for (j = 0; j < qi.num_points; j++) {
 			const struct intel_qgv_point *sp = &qi.points[j];
 			int ct, bw;
 			bi->deratedbw[j] = min(maxdebw,
 					       bw * 9 / 10); /* 90% */
-			DRM_DEBUG_KMS("BW%d / QGV %d: num_planes=%d deratedbw=%d\n",
+			DRM_DEBUG_KMS("BW%d / QGV %d: num_planes=%d deratedbw=%u\n",
 				      i, j, bi->num_planes, bi->deratedbw[j]);
 		}
 {
 	int i;
-	/* Did we initialize the bw limits successfully? */
-	if (dev_priv->max_bw[0].num_planes == 0)
-		return UINT_MAX;
 	for (i = 0; i < ARRAY_SIZE(dev_priv->max_bw); i++) {
 		const struct intel_bw_info *bi =
 			&dev_priv->max_bw[i];
+		/*
+		 * Pcode will not expose all QGV points when
+		 * SAGV is forced to off/min/med/max.
+		 */
+		if (qgv_point >= bi->num_qgv_points)
+			return UINT_MAX;
 		if (num_planes >= bi->num_planes)
 			return bi->deratedbw[qgv_point];
 	}

drivers/gpu/drm/i915/display/intel_cdclk.c+11−0

@@ -2239,6 +2239,17 @@ int intel_crtc_compute_min_cdclk(const struct intel_crtc_state *crtc_state) · 2238 unmodified lines
2239	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)	2239	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
2240	min_cdclk = max(2 * 96000, min_cdclk);	2240	min_cdclk = max(2 * 96000, min_cdclk);
2241		2241
		2242	/*
		2243	* "For DP audio configuration, cdclk frequency shall be set to
		2244	* meet the following requirements:
		2245	* DP Link Frequency(MHz) \| Cdclk frequency(MHz)
		2246	* 270 \| 320 or higher
		2247	* 162 \| 200 or higher"
		2248	*/
		2249	if ((IS_VALLEYVIEW(dev_priv) \|\| IS_CHERRYVIEW(dev_priv)) &&
		2250	intel_crtc_has_dp_encoder(crtc_state) && crtc_state->has_audio)
		2251	min_cdclk = max(crtc_state->port_clock, min_cdclk);
		2252
2242	/*	2253	/*
2243	* On Valleyview some DSI panels lose (v\|h)sync when the clock is lower	2254	* On Valleyview some DSI panels lose (v\|h)sync when the clock is lower
2244	* than 320000KHz.	2255	* than 320000KHz.

drivers/gpu/drm/i915/display/intel_display.c+2−2

@@ -1839,7 +1839,7 @@ static void intel_enable_pipe(const struct intel_crtc_state *new_crtc_state) · 1838 unmodified lines
1839	/* FIXME: assert CPU port conditions for SNB+ */	1839	/* FIXME: assert CPU port conditions for SNB+ */
1840	}	1840	}
1841		1841
1842	trace_intel_pipe_enable(dev_priv, pipe);	1842	trace_intel_pipe_enable(crtc);
1843		1843
1844	reg = PIPECONF(cpu_transcoder);	1844	reg = PIPECONF(cpu_transcoder);
1845	val = I915_READ(reg);	1845	val = I915_READ(reg);
@@ -1880,7 +1880,7 @@ static void intel_disable_pipe(const struct intel_crtc_state *old_crtc_state) · 34 unmodified lines
1880	*/	1880	*/
1881	assert_planes_disabled(crtc);	1881	assert_planes_disabled(crtc);
1882		1882
1883	trace_intel_pipe_disable(dev_priv, pipe);	1883	trace_intel_pipe_disable(crtc);
1884		1884
1885	reg = PIPECONF(cpu_transcoder);	1885	reg = PIPECONF(cpu_transcoder);
1886	val = I915_READ(reg);	1886	val = I915_READ(reg);

drivers/gpu/drm/i915/display/intel_display_power.c+9−2

 #define ICL_AUX_PW_TO_CH(pw_idx)	\
 	((pw_idx) - ICL_PW_CTL_IDX_AUX_A + AUX_CH_A)
+#define ICL_TBT_AUX_PW_TO_CH(pw_idx)	\
+	((pw_idx) - ICL_PW_CTL_IDX_AUX_TBT1 + AUX_CH_C)
 static void
 icl_tc_phy_aux_power_well_enable(struct drm_i915_private *dev_priv,
 				 struct i915_power_well *power_well)
 {
-	enum aux_ch aux_ch = ICL_AUX_PW_TO_CH(power_well->desc->hsw.idx);
+	int pw_idx = power_well->desc->hsw.idx;
+	bool is_tbt = power_well->desc->hsw.is_tc_tbt;
+	enum aux_ch aux_ch;
 	u32 val;
+	aux_ch = is_tbt ? ICL_TBT_AUX_PW_TO_CH(pw_idx) :
+			  ICL_AUX_PW_TO_CH(pw_idx);
 	val = I915_READ(DP_AUX_CH_CTL(aux_ch));
 	val &= ~DP_AUX_CH_CTL_TBT_IO;
-	if (power_well->desc->hsw.is_tc_tbt)
+	if (is_tbt)
 		val |= DP_AUX_CH_CTL_TBT_IO;
 	I915_WRITE(DP_AUX_CH_CTL(aux_ch), val);

drivers/gpu/drm/i915/display/intel_hdcp.c+2−1

@@ -536,7 +536,8 @@ int intel_hdcp_auth_downstream(struct intel_connector *connector) · 535 unmodified lines
536		536
537	if (drm_hdcp_check_ksvs_revoked(dev, ksv_fifo, num_downstream)) {	537	if (drm_hdcp_check_ksvs_revoked(dev, ksv_fifo, num_downstream)) {
538	DRM_ERROR("Revoked Ksv(s) in ksv_fifo\n");	538	DRM_ERROR("Revoked Ksv(s) in ksv_fifo\n");
539	return -EPERM;	539	ret = -EPERM;
		540	goto err;
540	}	541	}
541		542
542	/*	543	/*

drivers/gpu/drm/i915/display/intel_vbt_defs.h+3−3

 	/* TP wake up time in multiple of 100 */
 	u16 tp1_wakeup_time;
 	u16 tp2_tp3_wakeup_time;
-	/* PSR2 TP2/TP3 wakeup time for 16 panels */
-	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 struct bdb_psr {
 	struct psr_table psr_table[16];
+	/* PSR2 TP2/TP3 wakeup time for 16 panels */
+	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 /*

drivers/gpu/drm/i915/display/vlv_dsi_pll.c+2−2

@@ -396,8 +396,8 @@ static void glk_dsi_program_esc_clock(struct drm_device *dev, · 395 unmodified lines
396	else	396	else
397	txesc2_div = 10;	397	txesc2_div = 10;
398		398
399	I915_WRITE(MIPIO_TXESC_CLK_DIV1, txesc1_div & GLK_TX_ESC_CLK_DIV1_MASK);	399	I915_WRITE(MIPIO_TXESC_CLK_DIV1, (1 << (txesc1_div - 1)) & GLK_TX_ESC_CLK_DIV1_MASK);
400	I915_WRITE(MIPIO_TXESC_CLK_DIV2, txesc2_div & GLK_TX_ESC_CLK_DIV2_MASK);	400	I915_WRITE(MIPIO_TXESC_CLK_DIV2, (1 << (txesc2_div - 1)) & GLK_TX_ESC_CLK_DIV2_MASK);
401	}	401	}
402		402
403	/* Program BXT Mipi clocks and dividers */	403	/* Program BXT Mipi clocks and dividers */

drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c+9−11

 static int eb_copy_relocations(const struct i915_execbuffer *eb)
 {
+	struct drm_i915_gem_relocation_entry *relocs;
 	const unsigned int count = eb->buffer_count;
 	unsigned int i;
 	int err;
 	for (i = 0; i < count; i++) {
 		const unsigned int nreloc = eb->exec[i].relocation_count;
 		struct drm_i915_gem_relocation_entry __user *urelocs;
-		struct drm_i915_gem_relocation_entry *relocs;
 		unsigned long size;
 		unsigned long copied;
 			if (__copy_from_user((char *)relocs + copied,
 					     (char __user *)urelocs + copied,
-					     len)) {
+					     len))
-end_user:
+				goto end;
-				user_access_end();
-end:
-				kvfree(relocs);
-				err = -EFAULT;
-				goto err;
-			}
 			copied += len;
 		} while (copied < size);
 	return 0;
+end_user:
+	user_access_end();
+end:
+	kvfree(relocs);
+	err = -EFAULT;
 err:
 	while (i--) {
-		struct drm_i915_gem_relocation_entry *relocs =
+		relocs = u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr);
-			u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr);
 		if (eb->exec[i].relocation_count)
 			kvfree(relocs);
 	}

drivers/gpu/drm/i915/gem/i915_gem_pm.c+4−3

 	i915_gem_restore_gtt_mappings(i915);
 	i915_gem_restore_fences(i915);
+	if (i915_gem_init_hw(i915))
+		goto err_wedged;
 	/*
 	 * As we didn't flush the kernel context before suspend, we cannot
 	 * guarantee that the context image is complete. So let's just reset
 	 * it and start again.
 	 */
-	intel_gt_resume(i915);
+	if (intel_gt_resume(i915))
-	if (i915_gem_init_hw(i915))
 		goto err_wedged;
 	intel_uc_resume(i915);

drivers/gpu/drm/i915/gem/i915_gem_userptr.c+9−1

@@ -664,7 +664,15 @@ i915_gem_userptr_put_pages(struct drm_i915_gem_object *obj, · 663 unmodified lines
664		664
665	for_each_sgt_page(page, sgt_iter, pages) {	665	for_each_sgt_page(page, sgt_iter, pages) {
666	if (obj->mm.dirty)	666	if (obj->mm.dirty)
667	set_page_dirty(page);	667	/*
		668	* As this may not be anonymous memory (e.g. shmem)
		669	* but exist on a real mapping, we have to lock
		670	* the page in order to dirty it -- holding
		671	* the page reference is not sufficient to
		672	* prevent the inode from being truncated.
		673	* Play safe and take the lock.
		674	*/
		675	set_page_dirty_lock(page);
668		676
669	mark_page_accessed(page);	677	mark_page_accessed(page);
670	put_page(page);	678	put_page(page);

drivers/gpu/drm/i915/gt/intel_context.c+18−9

 	if (ce->state)
 		__context_unpin_state(ce->state);
+	intel_ring_unpin(ce->ring);
 	intel_context_put(ce);
 }
 	intel_context_get(ce);
+	err = intel_ring_pin(ce->ring);
+	if (err)
+		goto err_put;
 	if (!ce->state)
 		return 0;
 	err = __context_pin_state(ce->state, flags);
-	if (err) {
+	if (err)
-		i915_active_cancel(&ce->active);
+		goto err_ring;
-		intel_context_put(ce);
-		return err;
-	}
 	/* Preallocate tracking nodes */
 	if (!i915_gem_context_is_kernel(ce->gem_context)) {
 		err = i915_active_acquire_preallocate_barrier(&ce->active,
 							      ce->engine);
-		if (err) {
+		if (err)
-			i915_active_release(&ce->active);
+			goto err_state;
-			return err;
-		}
 	}
 	return 0;
+err_state:
+	__context_unpin_state(ce->state);
+err_ring:
+	intel_ring_unpin(ce->ring);
+err_put:
+	intel_context_put(ce);
+	i915_active_cancel(&ce->active);
+	return err;
 }
 void intel_context_active_release(struct intel_context *ce)

drivers/gpu/drm/i915/gt/intel_engine_cs.c+11−9

@@ -969,9 +969,14 @@ const char i915_cache_level_str(struct drm_i915_private i915, int type) · 968 unmodified lines
969	u32 intel_calculate_mcr_s_ss_select(struct drm_i915_private *dev_priv)	969	u32 intel_calculate_mcr_s_ss_select(struct drm_i915_private *dev_priv)
970	{	970	{
971	const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;	971	const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
		972	unsigned int slice = fls(sseu->slice_mask) - 1;
		973	unsigned int subslice;
972	u32 mcr_s_ss_select;	974	u32 mcr_s_ss_select;
973	u32 slice = fls(sseu->slice_mask);	975
974	u32 subslice = fls(sseu->subslice_mask[slice]);	976	GEM_BUG_ON(slice >= ARRAY_SIZE(sseu->subslice_mask));
		977	subslice = fls(sseu->subslice_mask[slice]);
		978	GEM_BUG_ON(!subslice);
		979	subslice--;
975		980
976	if (IS_GEN(dev_priv, 10))	981	if (IS_GEN(dev_priv, 10))
977	mcr_s_ss_select = GEN8_MCR_SLICE(slice) \|	982	mcr_s_ss_select = GEN8_MCR_SLICE(slice) \|
@@ -1471,6 +1476,7 @@ void intel_engine_dump(struct intel_engine_cs *engine, · 493 unmodified lines
1471	struct i915_gpu_error * const error = &engine->i915->gpu_error;	1476	struct i915_gpu_error * const error = &engine->i915->gpu_error;
1472	struct i915_request *rq;	1477	struct i915_request *rq;
1473	intel_wakeref_t wakeref;	1478	intel_wakeref_t wakeref;
		1479	unsigned long flags;
1474		1480
1475	if (header) {	1481	if (header) {
1476	va_list ap;	1482	va_list ap;
@@ -1490,10 +1496,9 @@ void intel_engine_dump(struct intel_engine_cs *engine, · 13 unmodified lines
1490	i915_reset_engine_count(error, engine),	1496	i915_reset_engine_count(error, engine),
1491	i915_reset_count(error));	1497	i915_reset_count(error));
1492		1498
1493	rcu_read_lock();
1494
1495	drm_printf(m, "\tRequests:\n");	1499	drm_printf(m, "\tRequests:\n");
1496		1500
		1501	spin_lock_irqsave(&engine->active.lock, flags);
1497	rq = intel_engine_find_active_request(engine);	1502	rq = intel_engine_find_active_request(engine);
1498	if (rq) {	1503	if (rq) {
1499	print_request(m, rq, "\t\tactive ");	1504	print_request(m, rq, "\t\tactive ");
@@ -1513,8 +1518,7 @@ void intel_engine_dump(struct intel_engine_cs *engine, · 13 unmodified lines
1513		1518
1514	print_request_ring(m, rq);	1519	print_request_ring(m, rq);
1515	}	1520	}
1516		1521	spin_unlock_irqrestore(&engine->active.lock, flags);
1517	rcu_read_unlock();
1518		1522
1519	wakeref = intel_runtime_pm_get_if_in_use(&engine->i915->runtime_pm);	1523	wakeref = intel_runtime_pm_get_if_in_use(&engine->i915->runtime_pm);
1520	if (wakeref) {	1524	if (wakeref) {
@@ -1672,7 +1676,6 @@ struct i915_request * · 151 unmodified lines
1672	intel_engine_find_active_request(struct intel_engine_cs *engine)	1676	intel_engine_find_active_request(struct intel_engine_cs *engine)
1673	{	1677	{
1674	struct i915_request request, active = NULL;	1678	struct i915_request request, active = NULL;
1675	unsigned long flags;
1676		1679
1677	/*	1680	/*
1678	* We are called by the error capture, reset and to dump engine	1681	* We are called by the error capture, reset and to dump engine
@@ -1685,7 +1688,7 @@ intel_engine_find_active_request(struct intel_engine_cs *engine) · 6 unmodified lines
1685	* At all other times, we must assume the GPU is still running, but	1688	* At all other times, we must assume the GPU is still running, but
1686	* we only care about the snapshot of this moment.	1689	* we only care about the snapshot of this moment.
1687	*/	1690	*/
1688	spin_lock_irqsave(&engine->active.lock, flags);	1691	lockdep_assert_held(&engine->active.lock);
1689	list_for_each_entry(request, &engine->active.requests, sched.link) {	1692	list_for_each_entry(request, &engine->active.requests, sched.link) {
1690	if (i915_request_completed(request))	1693	if (i915_request_completed(request))
1691	continue;	1694	continue;
@@ -1700,7 +1703,6 @@ intel_engine_find_active_request(struct intel_engine_cs *engine) · 8 unmodified lines
1700	active = request;	1703	active = request;
1701	break;	1704	break;
1702	}	1705	}
1703	spin_unlock_irqrestore(&engine->active.lock, flags);
1704		1706
1705	return active;	1707	return active;
1706	}	1708	}

drivers/gpu/drm/i915/gt/intel_engine_pm.c+0−24

@@ -142,27 +142,3 @@ void intel_engine_init__pm(struct intel_engine_cs *engine) · 141 unmodified lines
142	{	142	{
143	intel_wakeref_init(&engine->wakeref);	143	intel_wakeref_init(&engine->wakeref);
144	}	144	}
145
146	int intel_engines_resume(struct drm_i915_private *i915)
147	{
148	struct intel_engine_cs *engine;
149	enum intel_engine_id id;
150	int err = 0;
151
152	intel_gt_pm_get(i915);
153	for_each_engine(engine, i915, id) {
154	intel_engine_pm_get(engine);
155	engine->serial++; /* kernel context lost */
156	err = engine->resume(engine);
157	intel_engine_pm_put(engine);
158	if (err) {
159	dev_err(i915->drm.dev,
160	"Failed to restart %s (%d)\n",
161	engine->name, err);
162	break;
163	}
164	}
165	intel_gt_pm_put(i915);
166
167	return err;
168	}

drivers/gpu/drm/i915/gt/intel_engine_pm.h+9−3

 #ifndef INTEL_ENGINE_PM_H
 #define INTEL_ENGINE_PM_H
+#include "intel_engine_types.h"
+#include "intel_wakeref.h"
 struct drm_i915_private;
-struct intel_engine_cs;
 void intel_engine_pm_get(struct intel_engine_cs *engine);
 void intel_engine_pm_put(struct intel_engine_cs *engine);
+static inline bool
+intel_engine_pm_get_if_awake(struct intel_engine_cs *engine)
+{
+	return intel_wakeref_get_if_active(&engine->wakeref);
+}
 void intel_engine_park(struct intel_engine_cs *engine);
 void intel_engine_init__pm(struct intel_engine_cs *engine);
-int intel_engines_resume(struct drm_i915_private *i915);
 #endif /* INTEL_ENGINE_PM_H */

drivers/gpu/drm/i915/gt/intel_engine_types.h+12−0

@@ -70,6 +70,18 @@ struct intel_ring { · 69 unmodified lines
70	struct list_head request_list;	70	struct list_head request_list;
71	struct list_head active_link;	71	struct list_head active_link;
72		72
		73	/*
		74	* As we have two types of rings, one global to the engine used
		75	* by ringbuffer submission and those that are exclusive to a
		76	* context used by execlists, we have to play safe and allow
		77	* atomic updates to the pin_count. However, the actual pinning
		78	* of the context is either done during initialisation for
		79	* ringbuffer submission or serialised as part of the context
		80	* pinning for execlists, and so we do not need a mutex ourselves
		81	* to serialise intel_ring_pin/intel_ring_unpin.
		82	*/
		83	atomic_t pin_count;
		84
73	u32 head;	85	u32 head;
74	u32 tail;	86	u32 tail;
75	u32 emit;	87	u32 emit;

drivers/gpu/drm/i915/gt/intel_gt_pm.c+20−1

  */
 #include "i915_drv.h"
+#include "intel_engine_pm.h"
 #include "intel_gt_pm.h"
 #include "intel_pm.h"
 #include "intel_wakeref.h"
 		intel_engine_reset(engine, false);
 }
-void intel_gt_resume(struct drm_i915_private *i915)
+int intel_gt_resume(struct drm_i915_private *i915)
 {
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
+	int err = 0;
 	/*
 	 * After resume, we may need to poke into the pinned kernel
 	 * Only the kernel contexts should remain pinned over suspend,
 	 * allowing us to fixup the user contexts on their first pin.
 	 */
+	intel_gt_pm_get(i915);
 	for_each_engine(engine, i915, id) {
 		struct intel_context *ce;
+		intel_engine_pm_get(engine);
 		ce = engine->kernel_context;
 		if (ce)
 			ce->ops->reset(ce);
 		ce = engine->preempt_context;
 		if (ce)
 			ce->ops->reset(ce);
+		engine->serial++; /* kernel context lost */
+		err = engine->resume(engine);
+		intel_engine_pm_put(engine);
+		if (err) {
+			dev_err(i915->drm.dev,
+				"Failed to restart %s (%d)\n",
+				engine->name, err);
+			break;
+		}
 	}
+	intel_gt_pm_put(i915);
+	return err;
 }

drivers/gpu/drm/i915/gt/intel_gt_pm.h+1−1

@@ -22,6 +22,6 @@ void intel_gt_pm_put(struct drm_i915_private *i915); · 21 unmodified lines
22	void intel_gt_pm_init(struct drm_i915_private *i915);	22	void intel_gt_pm_init(struct drm_i915_private *i915);
23		23
24	void intel_gt_sanitize(struct drm_i915_private *i915, bool force);	24	void intel_gt_sanitize(struct drm_i915_private *i915, bool force);
25	void intel_gt_resume(struct drm_i915_private *i915);	25	int intel_gt_resume(struct drm_i915_private *i915);
26		26
27	#endif /* INTEL_GT_PM_H */	27	#endif /* INTEL_GT_PM_H */

drivers/gpu/drm/i915/gt/intel_lrc.c+2−8

 {
 	struct intel_context *ce = container_of(kref, typeof(*ce), ref);
+	GEM_BUG_ON(!i915_active_is_idle(&ce->active));
 	GEM_BUG_ON(intel_context_is_pinned(ce));
 	if (ce->state)
 {
 	i915_gem_context_unpin_hw_id(ce->gem_context);
 	i915_gem_object_unpin_map(ce->state->obj);
-	intel_ring_unpin(ce->ring);
 }
 static void
 		goto unpin_active;
 	}
-	ret = intel_ring_pin(ce->ring);
-	if (ret)
-		goto unpin_map;
 	ret = i915_gem_context_pin_hw_id(ce->gem_context);
 	if (ret)
-		goto unpin_ring;
+		goto unpin_map;
 	ce->lrc_desc = lrc_descriptor(ce, engine);
 	ce->lrc_reg_state = vaddr + LRC_STATE_PN * PAGE_SIZE;
 	return 0;
-unpin_ring:
-	intel_ring_unpin(ce->ring);
 unpin_map:
 	i915_gem_object_unpin_map(ce->state->obj);
 unpin_active:

drivers/gpu/drm/i915/gt/intel_reset.c+42−16

 	 * written to the powercontext is undefined and so we may lose
 	 * GPU state upon resume, i.e. fail to restart after a reset.
 	 */
-	intel_engine_pm_get(engine);
 	intel_uncore_forcewake_get(engine->uncore, FORCEWAKE_ALL);
 	engine->reset.prepare(engine);
 }
 	}
 }
-static void reset_prepare(struct drm_i915_private *i915)
+static intel_engine_mask_t reset_prepare(struct drm_i915_private *i915)
 {
 	struct intel_engine_cs *engine;
+	intel_engine_mask_t awake = 0;
 	enum intel_engine_id id;
-	intel_gt_pm_get(i915);
+	for_each_engine(engine, i915, id) {
-	for_each_engine(engine, i915, id)
+		if (intel_engine_pm_get_if_awake(engine))
+			awake |= engine->mask;
 		reset_prepare_engine(engine);
+	}
 	intel_uc_reset_prepare(i915);
+	return awake;
 }
 static void gt_revoke(struct drm_i915_private *i915)
 static void reset_finish_engine(struct intel_engine_cs *engine)
 {
 	engine->reset.finish(engine);
-	intel_engine_pm_put(engine);
 	intel_uncore_forcewake_put(engine->uncore, FORCEWAKE_ALL);
+	intel_engine_signal_breadcrumbs(engine);
 }
-static void reset_finish(struct drm_i915_private *i915)
+static void reset_finish(struct drm_i915_private *i915,
+			 intel_engine_mask_t awake)
 {
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
 	for_each_engine(engine, i915, id) {
 		reset_finish_engine(engine);
-		intel_engine_signal_breadcrumbs(engine);
+		if (awake & engine->mask)
+			intel_engine_pm_put(engine);
 	}
-	intel_gt_pm_put(i915);
 }
 static void nop_submit_request(struct i915_request *request)
 {
 	struct i915_gpu_error *error = &i915->gpu_error;
 	struct intel_engine_cs *engine;
+	intel_engine_mask_t awake;
 	enum intel_engine_id id;
 	if (test_bit(I915_WEDGED, &error->flags))
 	 * rolling the global seqno forward (since this would complete requests
 	 * for which we haven't set the fence error to EIO yet).
 	 */
-	reset_prepare(i915);
+	awake = reset_prepare(i915);
 	/* Even if the GPU reset fails, it should still stop the engines */
 	if (!INTEL_INFO(i915)->gpu_reset_clobbers_display)
 	for_each_engine(engine, i915, id)
 		engine->cancel_requests(engine);
-	reset_finish(i915);
+	reset_finish(i915, awake);
 	GEM_TRACE("end\n");
 }
 	return gt_reset(i915, stalled_mask);
 }
+static int resume(struct drm_i915_private *i915)
+{
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	int ret;
+	for_each_engine(engine, i915, id) {
+		ret = engine->resume(engine);
+		if (ret)
+			return ret;
+	}
+	return 0;
+}
 /**
  * i915_reset - reset chip after a hang
  * @i915: #drm_i915_private to reset
 		const char *reason)
 {
 	struct i915_gpu_error *error = &i915->gpu_error;
+	intel_engine_mask_t awake;
 	int ret;
 	GEM_TRACE("flags=%lx\n", error->flags);
 		dev_notice(i915->drm.dev, "Resetting chip for %s\n", reason);
 	error->reset_count++;
-	reset_prepare(i915);
+	awake = reset_prepare(i915);
 	if (!intel_has_gpu_reset(i915)) {
 		if (i915_modparams.reset)
 	if (ret) {
 		DRM_ERROR("Failed to initialise HW following reset (%d)\n",
 			  ret);
-		goto error;
+		goto taint;
 	}
+	ret = resume(i915);
+	if (ret)
+		goto taint;
 	i915_queue_hangcheck(i915);
 finish:
-	reset_finish(i915);
+	reset_finish(i915, awake);
 unlock:
 	mutex_unlock(&error->wedge_mutex);
 	return;
 	GEM_TRACE("%s flags=%lx\n", engine->name, error->flags);
 	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &error->flags));
-	if (!intel_wakeref_active(&engine->wakeref))
+	if (!intel_engine_pm_get_if_awake(engine))
 		return 0;
 	reset_prepare_engine(engine);
 	 * process to program RING_MODE, HWSP and re-enable submission.
 	 */
 	ret = engine->resume(engine);
-	if (ret)
-		goto out;
 out:
 	intel_engine_cancel_stop_cs(engine);
 	reset_finish_engine(engine);
+	intel_engine_pm_put(engine);
 	return ret;
 }

drivers/gpu/drm/i915/gt/intel_ringbuffer.c+20−11

 int intel_ring_pin(struct intel_ring *ring)
 {
 	struct i915_vma *vma = ring->vma;
-	enum i915_map_type map = i915_coherent_map_type(vma->vm->i915);
 	unsigned int flags;
 	void *addr;
 	int ret;
-	GEM_BUG_ON(ring->vaddr);
+	if (atomic_fetch_inc(&ring->pin_count))
+		return 0;
 	ret = i915_timeline_pin(ring->timeline);
 	if (ret)
-		return ret;
+		goto err_unpin;
 	flags = PIN_GLOBAL;
 	ret = i915_vma_pin(vma, 0, 0, flags);
 	if (unlikely(ret))
-		goto unpin_timeline;
+		goto err_timeline;
 	if (i915_vma_is_map_and_fenceable(vma))
 		addr = (void __force *)i915_vma_pin_iomap(vma);
 	else
-		addr = i915_gem_object_pin_map(vma->obj, map);
+		addr = i915_gem_object_pin_map(vma->obj,
+					       i915_coherent_map_type(vma->vm->i915));
 	if (IS_ERR(addr)) {
 		ret = PTR_ERR(addr);
-		goto unpin_ring;
+		goto err_ring;
 	}
 	vma->obj->pin_global++;
+	GEM_BUG_ON(ring->vaddr);
 	ring->vaddr = addr;
 	return 0;
-unpin_ring:
+err_ring:
 	i915_vma_unpin(vma);
-unpin_timeline:
+err_timeline:
 	i915_timeline_unpin(ring->timeline);
+err_unpin:
+	atomic_dec(&ring->pin_count);
 	return ret;
 }
 void intel_ring_unpin(struct intel_ring *ring)
 {
-	GEM_BUG_ON(!ring->vma);
+	if (!atomic_dec_and_test(&ring->pin_count))
-	GEM_BUG_ON(!ring->vaddr);
+		return;
 	/* Discard any unused bytes beyond that submitted to hw. */
 	intel_ring_reset(ring, ring->tail);
+	GEM_BUG_ON(!ring->vma);
 	if (i915_vma_is_map_and_fenceable(ring->vma))
 		i915_vma_unpin_iomap(ring->vma);
 	else
 		i915_gem_object_unpin_map(ring->vma->obj);
+	GEM_BUG_ON(!ring->vaddr);
 	ring->vaddr = NULL;
 	ring->vma->obj->pin_global--;
 	WARN_ON(INTEL_GEN(dev_priv) > 2 &&
 		(ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE) == 0);
+	intel_engine_cleanup_common(engine);
 	intel_ring_unpin(engine->buffer);
 	intel_ring_put(engine->buffer);
-	intel_engine_cleanup_common(engine);
 	kfree(engine);
 }

drivers/gpu/drm/i915/gt/intel_workarounds.c+35−3

@@ -1098,10 +1098,25 @@ static void glk_whitelist_build(struct intel_engine_cs *engine) · 1097 unmodified lines
1098		1098
1099	static void cfl_whitelist_build(struct intel_engine_cs *engine)	1099	static void cfl_whitelist_build(struct intel_engine_cs *engine)
1100	{	1100	{
		1101	struct i915_wa_list *w = &engine->whitelist;
		1102
1101	if (engine->class != RENDER_CLASS)	1103	if (engine->class != RENDER_CLASS)
1102	return;	1104	return;
1103		1105
1104	gen9_whitelist_build(&engine->whitelist);	1106	gen9_whitelist_build(w);
		1107
		1108	/*
		1109	* WaAllowPMDepthAndInvocationCountAccessFromUMD:cfl,whl,cml,aml
		1110	*
		1111	* This covers 4 register which are next to one another :
		1112	* - PS_INVOCATION_COUNT
		1113	* - PS_INVOCATION_COUNT_UDW
		1114	* - PS_DEPTH_COUNT
		1115	* - PS_DEPTH_COUNT_UDW
		1116	*/
		1117	whitelist_reg_ext(w, PS_INVOCATION_COUNT,
		1118	RING_FORCE_TO_NONPRIV_RD \|
		1119	RING_FORCE_TO_NONPRIV_RANGE_4);
1105	}	1120	}
1106		1121
1107	static void cnl_whitelist_build(struct intel_engine_cs *engine)	1122	static void cnl_whitelist_build(struct intel_engine_cs *engine)
@@ -1129,6 +1144,19 @@ static void icl_whitelist_build(struct intel_engine_cs *engine) · 21 unmodified lines
1129		1144
1130	/* WaEnableStateCacheRedirectToCS:icl */	1145	/* WaEnableStateCacheRedirectToCS:icl */
1131	whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);	1146	whitelist_reg(w, GEN9_SLICE_COMMON_ECO_CHICKEN1);
		1147
		1148	/*
		1149	* WaAllowPMDepthAndInvocationCountAccessFromUMD:icl
		1150	*
		1151	* This covers 4 register which are next to one another :
		1152	* - PS_INVOCATION_COUNT
		1153	* - PS_INVOCATION_COUNT_UDW
		1154	* - PS_DEPTH_COUNT
		1155	* - PS_DEPTH_COUNT_UDW
		1156	*/
		1157	whitelist_reg_ext(w, PS_INVOCATION_COUNT,
		1158	RING_FORCE_TO_NONPRIV_RD \|
		1159	RING_FORCE_TO_NONPRIV_RANGE_4);
1132	break;	1160	break;
1133		1161
1134	case VIDEO_DECODE_CLASS:	1162	case VIDEO_DECODE_CLASS:
@@ -1258,8 +1286,12 @@ rcs_engine_wa_init(struct intel_engine_cs engine, struct i915_wa_list wal) · 123 unmodified lines
1258	if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_B0))	1286	if (IS_ICL_REVID(i915, ICL_REVID_A0, ICL_REVID_B0))
1259	wa_write_or(wal,	1287	wa_write_or(wal,
1260	GEN7_SARCHKMD,	1288	GEN7_SARCHKMD,
1261	GEN7_DISABLE_DEMAND_PREFETCH \|	1289	GEN7_DISABLE_DEMAND_PREFETCH);
1262	GEN7_DISABLE_SAMPLER_PREFETCH);	1290
		1291	/* Wa_1606682166:icl */
		1292	wa_write_or(wal,
		1293	GEN7_SARCHKMD,
		1294	GEN7_DISABLE_SAMPLER_PREFETCH);
1263	}	1295	}
1264		1296
1265	if (IS_GEN_RANGE(i915, 9, 11)) {	1297	if (IS_GEN_RANGE(i915, 9, 11)) {

drivers/gpu/drm/i915/gt/mock_engine.c+1−0

@@ -66,6 +66,7 @@ static struct intel_ring mock_ring(struct intel_engine_cs engine) · 65 unmodified lines
66	ring->base.effective_size = sz;	66	ring->base.effective_size = sz;
67	ring->base.vaddr = (void *)(ring + 1);	67	ring->base.vaddr = (void *)(ring + 1);
68	ring->base.timeline = &ring->timeline;	68	ring->base.timeline = &ring->timeline;
		69	atomic_set(&ring->base.pin_count, 1);
69		70
70	INIT_LIST_HEAD(&ring->base.request_list);	71	INIT_LIST_HEAD(&ring->base.request_list);
71	intel_ring_update_space(&ring->base);	72	intel_ring_update_space(&ring->base);

drivers/gpu/drm/i915/gt/selftest_reset.c+4−1

 		goto unlock;
 	for (p = igt_atomic_phases; p->name; p++) {
+		intel_engine_mask_t awake;
 		GEM_TRACE("intel_gpu_reset under %s\n", p->name);
+		awake = reset_prepare(i915);
 		p->critical_section_begin();
 		reset_prepare(i915);
 		err = intel_gpu_reset(i915, ALL_ENGINES);
-		reset_finish(i915);
 		p->critical_section_end();
+		reset_finish(i915, awake);
 		if (err) {
 			pr_err("intel_gpu_reset failed under %s\n", p->name);

drivers/gpu/drm/i915/gt/selftest_workarounds.c+6−1

 	err = 0;
 	for (i = 0; i < engine->whitelist.count; i++) {
-		if (!fn(engine, a[i], b[i], engine->whitelist.list[i].reg))
+		const struct i915_wa *wa = &engine->whitelist.list[i];
+		if (i915_mmio_reg_offset(wa->reg) & RING_FORCE_TO_NONPRIV_RD)
+			continue;
+		if (!fn(engine, a[i], b[i], wa->reg))
 			err = -EINVAL;
 	}

drivers/gpu/drm/i915/gvt/cmd_parser.c+0−10

 		gma_head == gma_tail)
 		return 0;
-	if (!intel_gvt_ggtt_validate_range(s.vgpu, s.ring_start, s.ring_size)) {
-		ret = -EINVAL;
-		goto out;
-	}
 	ret = ip_gma_set(&s, gma_head);
 	if (ret)
 		goto out;
 	s.workload = workload;
 	s.is_ctx_wa = true;
-	if (!intel_gvt_ggtt_validate_range(s.vgpu, s.ring_start, s.ring_size)) {
-		ret = -EINVAL;
-		goto out;
-	}
 	ret = ip_gma_set(&s, gma_head);
 	if (ret)
 		goto out;

drivers/gpu/drm/i915/gvt/fb_decoder.c+3−3

@@ -245,7 +245,7 @@ int intel_vgpu_decode_primary_plane(struct intel_vgpu *vgpu, · 244 unmodified lines
245	plane->hw_format = fmt;	245	plane->hw_format = fmt;
246		246
247	plane->base = vgpu_vreg_t(vgpu, DSPSURF(pipe)) & I915_GTT_PAGE_MASK;	247	plane->base = vgpu_vreg_t(vgpu, DSPSURF(pipe)) & I915_GTT_PAGE_MASK;
248	if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0))	248	if (!vgpu_gmadr_is_valid(vgpu, plane->base))
249	return -EINVAL;	249	return -EINVAL;
250		250
251	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);	251	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);
@@ -368,7 +368,7 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu, · 116 unmodified lines
368	alpha_plane, alpha_force);	368	alpha_plane, alpha_force);
369		369
370	plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK;	370	plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK;
371	if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0))	371	if (!vgpu_gmadr_is_valid(vgpu, plane->base))
372	return -EINVAL;	372	return -EINVAL;
373		373
374	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);	374	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);
@@ -472,7 +472,7 @@ int intel_vgpu_decode_sprite_plane(struct intel_vgpu *vgpu, · 97 unmodified lines
472	plane->drm_format = drm_format;	472	plane->drm_format = drm_format;
473		473
474	plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK;	474	plane->base = vgpu_vreg_t(vgpu, SPRSURF(pipe)) & I915_GTT_PAGE_MASK;
475	if (!intel_gvt_ggtt_validate_range(vgpu, plane->base, 0))	475	if (!vgpu_gmadr_is_valid(vgpu, plane->base))
476	return -EINVAL;	476	return -EINVAL;
477		477
478	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);	478	plane->base_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm, plane->base);

drivers/gpu/drm/i915/gvt/gtt.c+9−0

 	struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;
 	const struct intel_gvt_device_info *info = &vgpu->gvt->device_info;
 	unsigned long index = off >> info->gtt_entry_size_shift;
+	unsigned long gma;
 	struct intel_gvt_gtt_entry e;
 	if (bytes != 4 && bytes != 8)
 		return -EINVAL;
+	gma = index << I915_GTT_PAGE_SHIFT;
+	if (!intel_gvt_ggtt_validate_range(vgpu,
+					   gma, 1 << I915_GTT_PAGE_SHIFT)) {
+		gvt_dbg_mm("read invalid ggtt at 0x%lx\n", gma);
+		memset(p_data, 0, bytes);
+		return 0;
+	}
 	ggtt_get_guest_entry(ggtt_mm, &e, index);
 	memcpy(p_data, (void *)&e.val64 + (off & (info->gtt_entry_size - 1)),
 			bytes);

drivers/gpu/drm/i915/gvt/kvmgt.c+12−0

@@ -1904,6 +1904,18 @@ static int kvmgt_dma_map_guest_page(unsigned long handle, unsigned long gfn, · 1903 unmodified lines
1904		1904
1905	entry = __gvt_cache_find_gfn(info->vgpu, gfn);	1905	entry = __gvt_cache_find_gfn(info->vgpu, gfn);
1906	if (!entry) {	1906	if (!entry) {
		1907	ret = gvt_dma_map_page(vgpu, gfn, dma_addr, size);
		1908	if (ret)
		1909	goto err_unlock;
		1910
		1911	ret = __gvt_cache_add(info->vgpu, gfn, *dma_addr, size);
		1912	if (ret)
		1913	goto err_unmap;
		1914	} else if (entry->size != size) {
		1915	/* the same gfn with different size: unmap and re-map */
		1916	gvt_dma_unmap_page(vgpu, gfn, entry->dma_addr, entry->size);
		1917	__gvt_cache_remove_entry(vgpu, entry);
		1918
1907	ret = gvt_dma_map_page(vgpu, gfn, dma_addr, size);	1919	ret = gvt_dma_map_page(vgpu, gfn, dma_addr, size);
1908	if (ret)	1920	if (ret)
1909	goto err_unlock;	1921	goto err_unlock;

drivers/gpu/drm/i915/gvt/scheduler.c+44−15

 	wa_ctx->indirect_ctx.shadow_va = NULL;
 }
-static int set_context_ppgtt_from_shadow(struct intel_vgpu_workload *workload,
+static void set_context_ppgtt_from_shadow(struct intel_vgpu_workload *workload,
-					 struct i915_gem_context *ctx)
+					  struct i915_gem_context *ctx)
 {
 	struct intel_vgpu_mm *mm = workload->shadow_mm;
 	struct i915_ppgtt *ppgtt = i915_vm_to_ppgtt(ctx->vm);
 	int i = 0;
-	if (mm->type != INTEL_GVT_MM_PPGTT || !mm->ppgtt_mm.shadowed)
-		return -EINVAL;
 	if (mm->ppgtt_mm.root_entry_type == GTT_TYPE_PPGTT_ROOT_L4_ENTRY) {
 		px_dma(ppgtt->pd) = mm->ppgtt_mm.shadow_pdps[0];
 	} else {
 			px_dma(pd) = mm->ppgtt_mm.shadow_pdps[i];
 		}
 	}
-	return 0;
 }
 static int
 static int prepare_workload(struct intel_vgpu_workload *workload)
 {
 	struct intel_vgpu *vgpu = workload->vgpu;
+	struct intel_vgpu_submission *s = &vgpu->submission;
+	int ring = workload->ring_id;
 	int ret = 0;
 	ret = intel_vgpu_pin_mm(workload->shadow_mm);
 		return ret;
 	}
+	if (workload->shadow_mm->type != INTEL_GVT_MM_PPGTT ||
+	    !workload->shadow_mm->ppgtt_mm.shadowed) {
+		gvt_vgpu_err("workload shadow ppgtt isn't ready\n");
+		return -EINVAL;
+	}
 	update_shadow_pdps(workload);
+	set_context_ppgtt_from_shadow(workload, s->shadow[ring]->gem_context);
 	ret = intel_vgpu_sync_oos_pages(workload->vgpu);
 	if (ret) {
 		gvt_vgpu_err("fail to vgpu sync oos pages\n");
 {
 	struct intel_vgpu *vgpu = workload->vgpu;
 	struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
-	struct intel_vgpu_submission *s = &vgpu->submission;
 	struct i915_request *rq;
 	int ring_id = workload->ring_id;
 	int ret;
 	mutex_lock(&vgpu->vgpu_lock);
 	mutex_lock(&dev_priv->drm.struct_mutex);
-	ret = set_context_ppgtt_from_shadow(workload,
-					    s->shadow[ring_id]->gem_context);
-	if (ret < 0) {
-		gvt_vgpu_err("workload shadow ppgtt isn't ready\n");
-		goto err_req;
-	}
 	ret = intel_gvt_workload_req_alloc(workload);
 	if (ret)
 		goto err_req;
 	int ret;
 	bool need_force_wake = (INTEL_GEN(gvt->dev_priv) >= 9);
 	DEFINE_WAIT_FUNC(wait, woken_wake_function);
+	struct intel_runtime_pm *rpm = &gvt->dev_priv->runtime_pm;
 	kfree(p);
 				workload->ring_id, workload,
 				workload->vgpu->id);
+		intel_runtime_pm_get(rpm);
 		gvt_dbg_sched("ring id %d will dispatch workload %p\n",
 				workload->ring_id, workload);
 			intel_uncore_forcewake_put(&gvt->dev_priv->uncore,
 					FORCEWAKE_ALL);
+		intel_runtime_pm_put_unchecked(rpm);
 		if (ret && (vgpu_is_vm_unhealthy(ret)))
 			enter_failsafe_mode(vgpu, GVT_FAILSAFE_GUEST_ERR);
 	}
 	intel_gvt_hypervisor_read_gpa(vgpu, ring_context_gpa +
 			RING_CTX_OFF(ctx_ctrl.val), &ctx_ctl, 4);
+	if (!intel_gvt_ggtt_validate_range(vgpu, start,
+				_RING_CTL_BUF_SIZE(ctl))) {
+		gvt_vgpu_err("context contain invalid rb at: 0x%x\n", start);
+		return ERR_PTR(-EINVAL);
+	}
 	workload = alloc_workload(vgpu);
 	if (IS_ERR(workload))
 		return workload;
 		workload->wa_ctx.indirect_ctx.size =
 			(indirect_ctx & INDIRECT_CTX_SIZE_MASK) *
 			CACHELINE_BYTES;
+		if (workload->wa_ctx.indirect_ctx.size != 0) {
+			if (!intel_gvt_ggtt_validate_range(vgpu,
+				workload->wa_ctx.indirect_ctx.guest_gma,
+				workload->wa_ctx.indirect_ctx.size)) {
+				kmem_cache_free(s->workloads, workload);
+				gvt_vgpu_err("invalid wa_ctx at: 0x%lx\n",
+				    workload->wa_ctx.indirect_ctx.guest_gma);
+				return ERR_PTR(-EINVAL);
+			}
+		}
 		workload->wa_ctx.per_ctx.guest_gma =
 			per_ctx & PER_CTX_ADDR_MASK;
 		workload->wa_ctx.per_ctx.valid = per_ctx & 1;
+		if (workload->wa_ctx.per_ctx.valid) {
+			if (!intel_gvt_ggtt_validate_range(vgpu,
+				workload->wa_ctx.per_ctx.guest_gma,
+				CACHELINE_BYTES)) {
+				kmem_cache_free(s->workloads, workload);
+				gvt_vgpu_err("invalid per_ctx at: 0x%lx\n",
+					workload->wa_ctx.per_ctx.guest_gma);
+				return ERR_PTR(-EINVAL);
+			}
+		}
 	}
 	gvt_dbg_el("workload %p ring id %d head %x tail %x start %x ctl %x\n",

drivers/gpu/drm/i915/gvt/trace_points.c+0−2

@@ -28,8 +28,6 @@ · 27 unmodified lines
28	*	28	*
29	*/	29	*/
30		30
31	#include "trace.h"
32
33	#ifndef __CHECKER__	31	#ifndef __CHECKER__
34	#define CREATE_TRACE_POINTS	32	#define CREATE_TRACE_POINTS
35	#include "trace.h"	33	#include "trace.h"

drivers/gpu/drm/i915/i915_drv.h+3−2

@@ -1674,8 +1674,9 @@ struct drm_i915_private { · 1673 unmodified lines
1674	} dram_info;	1674	} dram_info;
1675		1675
1676	struct intel_bw_info {	1676	struct intel_bw_info {
1677	int num_planes;	1677	unsigned int deratedbw[3]; /* for each QGV point */
1678	int deratedbw[3];	1678	u8 num_qgv_points;
		1679	u8 num_planes;
1679	} max_bw[6];	1680	} max_bw[6];
1680		1681
1681	struct drm_private_obj bw_obj;	1682	struct drm_private_obj bw_obj;

drivers/gpu/drm/i915/i915_gem.c+11−14

 #include "gem/i915_gem_ioctls.h"
 #include "gem/i915_gem_pm.h"
 #include "gem/i915_gemfs.h"
-#include "gt/intel_engine_pm.h"
 #include "gt/intel_gt_pm.h"
 #include "gt/intel_mocs.h"
 #include "gt/intel_reset.h"
 	intel_mocs_init_l3cc_table(dev_priv);
-	/* Only when the HW is re-initialised, can we replay the requests */
-	ret = intel_engines_resume(dev_priv);
-	if (ret)
-		goto cleanup_uc;
 	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
 	intel_engines_set_scheduler_caps(dev_priv);
 	return 0;
-cleanup_uc:
-	intel_uc_fini_hw(dev_priv);
 out:
 	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
 	return ret;
 }
 	if (ret)
 		goto err_uc_init;
+	/* Only when the HW is re-initialised, can we replay the requests */
+	ret = intel_gt_resume(dev_priv);
+	if (ret)
+		goto err_init_hw;
 	/*
 	 * Despite its name intel_init_clock_gating applies both display
 	 * clock gating workarounds; GT mmio workarounds and the occasional
 	ret = intel_engines_verify_workarounds(dev_priv);
 	if (ret)
-		goto err_init_hw;
+		goto err_gt;
 	ret = __intel_engines_record_defaults(dev_priv);
 	if (ret)
-		goto err_init_hw;
+		goto err_gt;
 	if (i915_inject_load_failure()) {
 		ret = -ENODEV;
-		goto err_init_hw;
+		goto err_gt;
 	}
 	if (i915_inject_load_failure()) {
 		ret = -EIO;
-		goto err_init_hw;
+		goto err_gt;
 	}
 	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
 	 * HW as irrevisibly wedged, but keep enough state around that the
 	 * driver doesn't explode during runtime.
 	 */
-err_init_hw:
+err_gt:
 	mutex_unlock(&dev_priv->drm.struct_mutex);
 	i915_gem_set_wedged(dev_priv);
 	i915_gem_drain_workqueue(dev_priv);
 	mutex_lock(&dev_priv->drm.struct_mutex);
+err_init_hw:
 	intel_uc_fini_hw(dev_priv);
 err_uc_init:
 	intel_uc_fini(dev_priv);

drivers/gpu/drm/i915/i915_gem_gtt.c+6−2

 	spin_lock(&pdp->lock);
 	if (atomic_dec_and_test(&pd->used)) {
 		gen8_ppgtt_set_pdpe(pdp, vm->scratch_pd, pdpe);
+		pdp->entry[pdpe] = vm->scratch_pd;
 		GEM_BUG_ON(!atomic_read(&pdp->used));
 		atomic_dec(&pdp->used);
-		free_pd(vm, pd);
+		GEM_BUG_ON(alloc);
+		alloc = pd; /* defer the free to after the lock */
 	}
 	spin_unlock(&pdp->lock);
 unwind:
 	spin_lock(&pml4->lock);
 	if (atomic_dec_and_test(&pdp->used)) {
 		gen8_ppgtt_set_pml4e(pml4, vm->scratch_pdp, pml4e);
-		free_pd(vm, pdp);
+		pml4->entry[pml4e] = vm->scratch_pdp;
+		GEM_BUG_ON(alloc);
+		alloc = pdp; /* defer the free until after the lock */
 	}
 	spin_unlock(&pml4->lock);
 unwind:

drivers/gpu/drm/i915/i915_gpu_error.c+4−2

 		struct intel_engine_cs *engine = i915->engine[i];
 		struct drm_i915_error_engine *ee = &error->engine[i];
 		struct i915_request *request;
+		unsigned long flags;
 		ee->engine_id = -1;
 		error_record_engine_registers(error, engine, ee);
 		error_record_engine_execlists(engine, ee);
+		spin_lock_irqsave(&engine->active.lock, flags);
 		request = intel_engine_find_active_request(engine);
 		if (request) {
 			struct i915_gem_context *ctx = request->gem_context;
-			struct intel_ring *ring;
+			struct intel_ring *ring = request->ring;
 			ee->vm = ctx->vm ?: &ggtt->vm;
 			ee->rq_post = request->postfix;
 			ee->rq_tail = request->tail;
-			ring = request->ring;
 			ee->cpu_ring_head = ring->head;
 			ee->cpu_ring_tail = ring->tail;
 			ee->ringbuffer =
 			engine_record_requests(engine, request, ee);
 		}
+		spin_unlock_irqrestore(&engine->active.lock, flags);
 		ee->hws_page =
 			i915_error_object_create(i915,

drivers/gpu/drm/i915/i915_perf.c+43−24

@@ -1567,28 +1567,10 @@ static void config_oa_regs(struct drm_i915_private *dev_priv, · 1566 unmodified lines
1567	}	1567	}
1568	}	1568	}
1569		1569
1570	static int hsw_enable_metric_set(struct i915_perf_stream *stream)	1570	static void delay_after_mux(void)
1571	{	1571	{
1572	struct drm_i915_private *dev_priv = stream->dev_priv;	1572	/*
1573	const struct i915_oa_config *oa_config = stream->oa_config;	1573	* It apparently takes a fairly long time for a new MUX
1574
1575	/* PRM:
1576	*
1577	* OA unit is using “crclk” for its functionality. When trunk
1578	* level clock gating takes place, OA clock would be gated,
1579	* unable to count the events from non-render clock domain.
1580	* Render clock gating must be disabled when OA is enabled to
1581	* count the events from non-render domain. Unit level clock
1582	* gating for RCS should also be disabled.
1583	*/
1584	I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) &
1585	~GEN7_DOP_CLOCK_GATE_ENABLE));
1586	I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) \|
1587	GEN6_CSUNIT_CLOCK_GATE_DISABLE));
1588
1589	config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len);
1590
1591	/* It apparently takes a fairly long time for a new MUX
1592	* configuration to be be applied after these register writes.	1574	* configuration to be be applied after these register writes.
1593	* This delay duration was derived empirically based on the	1575	* This delay duration was derived empirically based on the
1594	* render_basic config but hopefully it covers the maximum	1576	* render_basic config but hopefully it covers the maximum
@@ -1610,6 +1592,30 @@ static int hsw_enable_metric_set(struct i915_perf_stream *stream) · 15 unmodified lines
1610	* a delay at this location would mitigate any invalid reports.	1592	* a delay at this location would mitigate any invalid reports.
1611	*/	1593	*/
1612	usleep_range(15000, 20000);	1594	usleep_range(15000, 20000);
		1595	}
		1596
		1597	static int hsw_enable_metric_set(struct i915_perf_stream *stream)
		1598	{
		1599	struct drm_i915_private *dev_priv = stream->dev_priv;
		1600	const struct i915_oa_config *oa_config = stream->oa_config;
		1601
		1602	/*
		1603	* PRM:
		1604	*
		1605	* OA unit is using “crclk” for its functionality. When trunk
		1606	* level clock gating takes place, OA clock would be gated,
		1607	* unable to count the events from non-render clock domain.
		1608	* Render clock gating must be disabled when OA is enabled to
		1609	* count the events from non-render domain. Unit level clock
		1610	* gating for RCS should also be disabled.
		1611	*/
		1612	I915_WRITE(GEN7_MISCCPCTL, (I915_READ(GEN7_MISCCPCTL) &
		1613	~GEN7_DOP_CLOCK_GATE_ENABLE));
		1614	I915_WRITE(GEN6_UCGCTL1, (I915_READ(GEN6_UCGCTL1) \|
		1615	GEN6_CSUNIT_CLOCK_GATE_DISABLE));
		1616
		1617	config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len);
		1618	delay_after_mux();
1613		1619
1614	config_oa_regs(dev_priv, oa_config->b_counter_regs,	1620	config_oa_regs(dev_priv, oa_config->b_counter_regs,
1615	oa_config->b_counter_regs_len);	1621	oa_config->b_counter_regs_len);
@@ -1835,6 +1841,7 @@ static int gen8_enable_metric_set(struct i915_perf_stream *stream) · 219 unmodified lines
1835	return ret;	1841	return ret;
1836		1842
1837	config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len);	1843	config_oa_regs(dev_priv, oa_config->mux_regs, oa_config->mux_regs_len);
		1844	delay_after_mux();
1838		1845
1839	config_oa_regs(dev_priv, oa_config->b_counter_regs,	1846	config_oa_regs(dev_priv, oa_config->b_counter_regs,
1840	oa_config->b_counter_regs_len);	1847	oa_config->b_counter_regs_len);
@@ -2515,6 +2522,9 @@ static int i915_perf_release(struct inode inode, struct file file) · 674 unmodified lines
2515	i915_perf_destroy_locked(stream);	2522	i915_perf_destroy_locked(stream);
2516	mutex_unlock(&dev_priv->perf.lock);	2523	mutex_unlock(&dev_priv->perf.lock);
2517		2524
		2525	/* Release the reference the perf stream kept on the driver. */
		2526	drm_dev_put(&dev_priv->drm);
		2527
2518	return 0;	2528	return 0;
2519	}	2529	}
2520		2530
@@ -2650,6 +2660,11 @@ i915_perf_open_ioctl_locked(struct drm_i915_private *dev_priv, · 129 unmodified lines
2650	if (!(param->flags & I915_PERF_FLAG_DISABLED))	2660	if (!(param->flags & I915_PERF_FLAG_DISABLED))
2651	i915_perf_enable_locked(stream);	2661	i915_perf_enable_locked(stream);
2652		2662
		2663	/* Take a reference on the driver that will be kept with stream_fd
		2664	* until its release.
		2665	*/
		2666	drm_dev_get(&dev_priv->drm);
		2667
2653	return stream_fd;	2668	return stream_fd;
2654		2669
2655	err_open:	2670	err_open:
@@ -3477,9 +3492,13 @@ void i915_perf_init(struct drm_i915_private *dev_priv) · 821 unmodified lines
3477	dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set;	3492	dev_priv->perf.oa.ops.enable_metric_set = gen8_enable_metric_set;
3478	dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set;	3493	dev_priv->perf.oa.ops.disable_metric_set = gen10_disable_metric_set;
3479		3494
3480	dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;	3495	if (IS_GEN(dev_priv, 10)) {
3481	dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;	3496	dev_priv->perf.oa.ctx_oactxctrl_offset = 0x128;
3482		3497	dev_priv->perf.oa.ctx_flexeu0_offset = 0x3de;
		3498	} else {
		3499	dev_priv->perf.oa.ctx_oactxctrl_offset = 0x124;
		3500	dev_priv->perf.oa.ctx_flexeu0_offset = 0x78e;
		3501	}
3483	dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);	3502	dev_priv->perf.oa.gen8_valid_ctx_bit = (1<<16);
3484	}	3503	}
3485	}	3504	}

drivers/gpu/drm/i915/i915_trace.h+33−43

 /* watermark/fifo updates */
 TRACE_EVENT(intel_pipe_enable,
-	    TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pipe),
+	    TP_PROTO(struct intel_crtc *crtc),
-	    TP_ARGS(dev_priv, pipe),
+	    TP_ARGS(crtc),
 	    TP_STRUCT__entry(
 			     __array(u32, frame, 3)
 			     __array(u32, scanline, 3)
 			     __field(enum pipe, pipe)
 			     ),
 	    TP_fast_assign(
-			   enum pipe _pipe;
+			   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-			   for_each_pipe(dev_priv, _pipe) {
+			   struct intel_crtc *it__;
-				   __entry->frame[_pipe] =
+			   for_each_intel_crtc(&dev_priv->drm, it__) {
-					   dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, _pipe);
+				   __entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
-				   __entry->scanline[_pipe] =
+				   __entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);
-					   intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, _pipe));
 			   }
-			   __entry->pipe = pipe;
+			   __entry->pipe = crtc->pipe;
 			   ),
 	    TP_printk("pipe %c enable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u",
 );
 TRACE_EVENT(intel_pipe_disable,
-	    TP_PROTO(struct drm_i915_private *dev_priv, enum pipe pipe),
+	    TP_PROTO(struct intel_crtc *crtc),
-	    TP_ARGS(dev_priv, pipe),
+	    TP_ARGS(crtc),
 	    TP_STRUCT__entry(
 			     __array(u32, frame, 3)
 			     ),
 	    TP_fast_assign(
-			   enum pipe _pipe;
+			   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-			   for_each_pipe(dev_priv, _pipe) {
+			   struct intel_crtc *it__;
-				   __entry->frame[_pipe] =
+			   for_each_intel_crtc(&dev_priv->drm, it__) {
-					   dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, _pipe);
+				   __entry->frame[it__->pipe] = intel_crtc_get_vblank_counter(it__);
-				   __entry->scanline[_pipe] =
+				   __entry->scanline[it__->pipe] = intel_get_crtc_scanline(it__);
-					   intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, _pipe));
 			   }
-			   __entry->pipe = pipe;
+			   __entry->pipe = crtc->pipe;
 			   ),
 	    TP_printk("pipe %c disable, pipe A: frame=%u, scanline=%u, pipe B: frame=%u, scanline=%u, pipe C: frame=%u, scanline=%u",
 	    TP_fast_assign(
 			   __entry->pipe = crtc->pipe;
-			   __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev,
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
-										       crtc->pipe);
 			   __entry->scanline = intel_get_crtc_scanline(crtc);
 			   memcpy(__entry->crcs, crcs, sizeof(__entry->crcs));
 			   ),
 			     ),
 	    TP_fast_assign(
+			    struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
 			   __entry->pipe = pipe;
-			   __entry->frame = dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe);
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
-			   __entry->scanline = intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe));
+			   __entry->scanline = intel_get_crtc_scanline(crtc);
 			   ),
 	    TP_printk("pipe %c, frame=%u, scanline=%u",
 	    TP_fast_assign(
 			   enum pipe pipe = pch_transcoder;
+			   struct intel_crtc *crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
 			   __entry->pipe = pipe;
-			   __entry->frame = dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe);
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
-			   __entry->scanline = intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe));
+			   __entry->scanline = intel_get_crtc_scanline(crtc);
 			   ),
 	    TP_printk("pch transcoder %c, frame=%u, scanline=%u",
 			     ),
 	    TP_fast_assign(
-			   enum pipe pipe;
+			   struct intel_crtc *crtc;
-			   for_each_pipe(dev_priv, pipe) {
+			   for_each_intel_crtc(&dev_priv->drm, crtc) {
-				   __entry->frame[pipe] =
+				   __entry->frame[crtc->pipe] = intel_crtc_get_vblank_counter(crtc);
-					   dev_priv->drm.driver->get_vblank_counter(&dev_priv->drm, pipe);
+				   __entry->scanline[crtc->pipe] = intel_get_crtc_scanline(crtc);
-				   __entry->scanline[pipe] =
-					   intel_get_crtc_scanline(intel_get_crtc_for_pipe(dev_priv, pipe));
 			   }
 			   __entry->old = old;
 			   __entry->new = new;
 	    TP_fast_assign(
 			   __entry->pipe = crtc->pipe;
-			   __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev,
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
-										       crtc->pipe);
 			   __entry->scanline = intel_get_crtc_scanline(crtc);
 			   __entry->primary = wm->pipe[crtc->pipe].plane[PLANE_PRIMARY];
 			   __entry->sprite = wm->pipe[crtc->pipe].plane[PLANE_SPRITE0];
 	    TP_fast_assign(
 			   __entry->pipe = crtc->pipe;
-			   __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev,
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
-										       crtc->pipe);
 			   __entry->scanline = intel_get_crtc_scanline(crtc);
 			   __entry->level = wm->level;
 			   __entry->cxsr = wm->cxsr;
 	    TP_fast_assign(
 			   __entry->pipe = crtc->pipe;
-			   __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev,
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
-										       crtc->pipe);
 			   __entry->scanline = intel_get_crtc_scanline(crtc);
 			   __entry->sprite0_start = sprite0_start;
 			   __entry->sprite1_start = sprite1_start;
 	    TP_fast_assign(
 			   __entry->pipe = crtc->pipe;
 			   __entry->name = plane->name;
-			   __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev,
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
-										       crtc->pipe);
 			   __entry->scanline = intel_get_crtc_scanline(crtc);
 			   memcpy(__entry->src, &plane->state->src, sizeof(__entry->src));
 			   memcpy(__entry->dst, &plane->state->dst, sizeof(__entry->dst));
 	    TP_fast_assign(
 			   __entry->pipe = crtc->pipe;
 			   __entry->name = plane->name;
-			   __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev,
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
-										       crtc->pipe);
 			   __entry->scanline = intel_get_crtc_scanline(crtc);
 			   ),
 	    TP_fast_assign(
 			   __entry->pipe = crtc->pipe;
-			   __entry->frame = crtc->base.dev->driver->get_vblank_counter(crtc->base.dev,
+			   __entry->frame = intel_crtc_get_vblank_counter(crtc);
-										       crtc->pipe);
 			   __entry->scanline = intel_get_crtc_scanline(crtc);
 			   __entry->min = crtc->debug.min_vbl;
 			   __entry->max = crtc->debug.max_vbl;

drivers/gpu/drm/i915/intel_runtime_pm.c+4−6

 static void
 dump_and_free_wakeref_tracking(struct intel_runtime_pm_debug *debug)
 {
-	struct drm_printer p;
+	if (debug->count) {
+		struct drm_printer p = drm_debug_printer("i915");
-	if (!debug->count)
+		__print_intel_runtime_pm_wakeref(&p, debug);
-		return;
+	}
-	p = drm_debug_printer("i915");
-	__print_intel_runtime_pm_wakeref(&p, debug);
 	kfree(debug->owners);
 }

drivers/gpu/drm/i915/intel_wakeref.h+15−0

@@ -65,6 +65,21 @@ intel_wakeref_get(struct intel_runtime_pm *rpm, · 64 unmodified lines
65	return 0;	65	return 0;
66	}	66	}
67		67
		68	/**
		69	* intel_wakeref_get_if_in_use: Acquire the wakeref
		70	* @wf: the wakeref
		71	*
		72	* Acquire a hold on the wakeref, but only if the wakeref is already
		73	* active.
		74	*
		75	* Returns: true if the wakeref was acquired, false otherwise.
		76	*/
		77	static inline bool
		78	intel_wakeref_get_if_active(struct intel_wakeref *wf)
		79	{
		80	return atomic_inc_not_zero(&wf->count);
		81	}
		82
68	/**	83	/**
69	* intel_wakeref_put: Release the wakeref	84	* intel_wakeref_put: Release the wakeref
70	* @i915: the drm_i915_private device	85	* @i915: the drm_i915_private device

drivers/gpu/drm/msm/adreno/a5xx_gpu.c+2−0

 		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
 			if (priv->lastctx == ctx)
 				break;
+			/* fall-thru */
 		case MSM_SUBMIT_CMD_BUF:
 			/* copy commands into RB: */
 			obj = submit->bos[submit->cmd[i].idx].obj;
 		case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
 			if (priv->lastctx == ctx)
 				break;
+			/* fall-thru */
 		case MSM_SUBMIT_CMD_BUF:
 			OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);
 			OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu.c+1−0

@@ -115,6 +115,7 @@ static void a6xx_submit(struct msm_gpu gpu, struct msm_gem_submit submit, · 114 unmodified lines
115	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:	115	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
116	if (priv->lastctx == ctx)	116	if (priv->lastctx == ctx)
117	break;	117	break;
		118	/* fall-thru */
118	case MSM_SUBMIT_CMD_BUF:	119	case MSM_SUBMIT_CMD_BUF:
119	OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);	120	OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);
120	OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));	121	OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/adreno_gpu.c+1−0

@@ -428,6 +428,7 @@ void adreno_submit(struct msm_gpu gpu, struct msm_gem_submit submit, · 427 unmodified lines
428	/* ignore if there has not been a ctx switch: */	428	/* ignore if there has not been a ctx switch: */
429	if (priv->lastctx == ctx)	429	if (priv->lastctx == ctx)
430	break;	430	break;
		431	/* fall-thru */
431	case MSM_SUBMIT_CMD_BUF:	432	case MSM_SUBMIT_CMD_BUF:
432	OUT_PKT3(ring, adreno_is_a430(adreno_gpu) ?	433	OUT_PKT3(ring, adreno_is_a430(adreno_gpu) ?
433	CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2);	434	CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2);

drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c+15−1

 	mdp5_crtc->enabled = false;
 }
+static void mdp5_crtc_vblank_on(struct drm_crtc *crtc)
+{
+	struct mdp5_crtc_state *mdp5_cstate = to_mdp5_crtc_state(crtc->state);
+	struct mdp5_interface *intf = mdp5_cstate->pipeline.intf;
+	u32 count;
+	count = intf->mode == MDP5_INTF_DSI_MODE_COMMAND ? 0 : 0xffffffff;
+	drm_crtc_set_max_vblank_count(crtc, count);
+	drm_crtc_vblank_on(crtc);
+}
 static void mdp5_crtc_atomic_enable(struct drm_crtc *crtc,
 				    struct drm_crtc_state *old_state)
 {
 	}
 	/* Restore vblank irq handling after power is enabled */
-	drm_crtc_vblank_on(crtc);
+	mdp5_crtc_vblank_on(crtc);
 	mdp5_crtc_mode_set_nofb(crtc);
 		mdp5_crtc_destroy_state(crtc, crtc->state);
 	__drm_atomic_helper_crtc_reset(crtc, &mdp5_cstate->base);
+	drm_crtc_vblank_reset(crtc);
 }
 static const struct drm_crtc_funcs mdp5_crtc_funcs = {

drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c+1−1

@@ -740,7 +740,7 @@ struct msm_kms mdp5_kms_init(struct drm_device dev) · 739 unmodified lines
740	dev->driver->get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos;	740	dev->driver->get_vblank_timestamp = drm_calc_vbltimestamp_from_scanoutpos;
741	dev->driver->get_scanout_position = mdp5_get_scanoutpos;	741	dev->driver->get_scanout_position = mdp5_get_scanoutpos;
742	dev->driver->get_vblank_counter = mdp5_get_vblank_counter;	742	dev->driver->get_vblank_counter = mdp5_get_vblank_counter;
743	dev->max_vblank_count = 0xffffffff;	743	dev->max_vblank_count = 0; /* max_vblank_count is set on each CRTC */
744	dev->vblank_disable_immediate = true;	744	dev->vblank_disable_immediate = true;
745		745
746	return kms;	746	return kms;

drivers/gpu/drm/msm/msm_drv.c+2−1

@@ -1279,7 +1279,8 @@ static int add_gpu_components(struct device *dev, · 1278 unmodified lines
1279	if (!np)	1279	if (!np)
1280	return 0;	1280	return 0;
1281		1281
1282	drm_of_component_match_add(dev, matchptr, compare_of, np);	1282	if (of_device_is_available(np))
		1283	drm_of_component_match_add(dev, matchptr, compare_of, np);
1283		1284
1284	of_node_put(np);	1285	of_node_put(np);
1285		1286

drivers/gpu/drm/msm/msm_gem.c+42−5

@@ -32,6 +32,46 @@ static bool use_pages(struct drm_gem_object *obj) · 31 unmodified lines
32	return !msm_obj->vram_node;	32	return !msm_obj->vram_node;
33	}	33	}
34		34
		35	/*
		36	* Cache sync.. this is a bit over-complicated, to fit dma-mapping
		37	* API. Really GPU cache is out of scope here (handled on cmdstream)
		38	* and all we need to do is invalidate newly allocated pages before
		39	* mapping to CPU as uncached/writecombine.
		40	*
		41	* On top of this, we have the added headache, that depending on
		42	* display generation, the display's iommu may be wired up to either
		43	* the toplevel drm device (mdss), or to the mdp sub-node, meaning
		44	* that here we either have dma-direct or iommu ops.
		45	*
		46	* Let this be a cautionary tail of abstraction gone wrong.
		47	*/
		48
		49	static void sync_for_device(struct msm_gem_object *msm_obj)
		50	{
		51	struct device *dev = msm_obj->base.dev->dev;
		52
		53	if (get_dma_ops(dev)) {
		54	dma_sync_sg_for_device(dev, msm_obj->sgt->sgl,
		55	msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
		56	} else {
		57	dma_map_sg(dev, msm_obj->sgt->sgl,
		58	msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
		59	}
		60	}
		61
		62	static void sync_for_cpu(struct msm_gem_object *msm_obj)
		63	{
		64	struct device *dev = msm_obj->base.dev->dev;
		65
		66	if (get_dma_ops(dev)) {
		67	dma_sync_sg_for_cpu(dev, msm_obj->sgt->sgl,
		68	msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
		69	} else {
		70	dma_unmap_sg(dev, msm_obj->sgt->sgl,
		71	msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
		72	}
		73	}
		74
35	/* allocate pages from VRAM carveout, used when no IOMMU: */	75	/* allocate pages from VRAM carveout, used when no IOMMU: */
36	static struct page *get_pages_vram(struct drm_gem_object obj, int npages)	76	static struct page *get_pages_vram(struct drm_gem_object obj, int npages)
37	{	77	{
@@ -97,8 +137,7 @@ static struct page *get_pages(struct drm_gem_object obj) · 59 unmodified lines
97	* because display controller, GPU, etc. are not coherent:	137	* because display controller, GPU, etc. are not coherent:
98	*/	138	*/
99	if (msm_obj->flags & (MSM_BO_WC\|MSM_BO_UNCACHED))	139	if (msm_obj->flags & (MSM_BO_WC\|MSM_BO_UNCACHED))
100	dma_sync_sg_for_device(dev->dev, msm_obj->sgt->sgl,	140	sync_for_device(msm_obj);
101	msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
102	}	141	}
103		142
104	return msm_obj->pages;	143	return msm_obj->pages;
@@ -127,9 +166,7 @@ static void put_pages(struct drm_gem_object *obj) · 22 unmodified lines
127	* GPU, etc. are not coherent:	166	* GPU, etc. are not coherent:
128	*/	167	*/
129	if (msm_obj->flags & (MSM_BO_WC\|MSM_BO_UNCACHED))	168	if (msm_obj->flags & (MSM_BO_WC\|MSM_BO_UNCACHED))
130	dma_sync_sg_for_cpu(obj->dev->dev, msm_obj->sgt->sgl,	169	sync_for_cpu(msm_obj);
131	msm_obj->sgt->nents,
132	DMA_BIDIRECTIONAL);
133		170
134	sg_free_table(msm_obj->sgt);	171	sg_free_table(msm_obj->sgt);
135	kfree(msm_obj->sgt);	172	kfree(msm_obj->sgt);

drivers/gpu/drm/nouveau/dispnv50/disp.c+1−1

@@ -780,7 +780,7 @@ nv50_msto_atomic_check(struct drm_encoder *encoder, · 779 unmodified lines
780	drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock,	780	drm_dp_calc_pbn_mode(crtc_state->adjusted_mode.clock,
781	connector->display_info.bpc * 3);	781	connector->display_info.bpc * 3);
782		782
783	if (drm_atomic_crtc_needs_modeset(crtc_state)) {	783	if (crtc_state->mode_changed) {
784	slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr,	784	slots = drm_dp_atomic_find_vcpi_slots(state, &mstm->mgr,
785	mstc->port,	785	mstc->port,
786	asyh->dp.pbn);	786	asyh->dp.pbn);

drivers/gpu/drm/nouveau/nouveau_svm.c+44−3

@@ -475,6 +475,47 @@ nouveau_svm_fault_cache(struct nouveau_svm *svm, · 474 unmodified lines
475	fault->inst, fault->addr, fault->access);	475	fault->inst, fault->addr, fault->access);
476	}	476	}
477		477
		478	static inline bool
		479	nouveau_range_done(struct hmm_range *range)
		480	{
		481	bool ret = hmm_range_valid(range);
		482
		483	hmm_range_unregister(range);
		484	return ret;
		485	}
		486
		487	static int
		488	nouveau_range_fault(struct hmm_mirror mirror, struct hmm_range range)
		489	{
		490	long ret;
		491
		492	range->default_flags = 0;
		493	range->pfn_flags_mask = -1UL;
		494
		495	ret = hmm_range_register(range, mirror,
		496	range->start, range->end,
		497	PAGE_SHIFT);
		498	if (ret) {
		499	up_read(&range->vma->vm_mm->mmap_sem);
		500	return (int)ret;
		501	}
		502
		503	if (!hmm_range_wait_until_valid(range, HMM_RANGE_DEFAULT_TIMEOUT)) {
		504	up_read(&range->vma->vm_mm->mmap_sem);
		505	return -EAGAIN;
		506	}
		507
		508	ret = hmm_range_fault(range, true);
		509	if (ret <= 0) {
		510	if (ret == 0)
		511	ret = -EBUSY;
		512	up_read(&range->vma->vm_mm->mmap_sem);
		513	hmm_range_unregister(range);
		514	return ret;
		515	}
		516	return 0;
		517	}
		518
478	static int	519	static int
479	nouveau_svm_fault(struct nvif_notify *notify)	520	nouveau_svm_fault(struct nvif_notify *notify)
480	{	521	{
@@ -649,10 +690,10 @@ nouveau_svm_fault(struct nvif_notify *notify) · 168 unmodified lines
649	range.values = nouveau_svm_pfn_values;	690	range.values = nouveau_svm_pfn_values;
650	range.pfn_shift = NVIF_VMM_PFNMAP_V0_ADDR_SHIFT;	691	range.pfn_shift = NVIF_VMM_PFNMAP_V0_ADDR_SHIFT;
651	again:	692	again:
652	ret = hmm_vma_fault(&svmm->mirror, &range, true);	693	ret = nouveau_range_fault(&svmm->mirror, &range);
653	if (ret == 0) {	694	if (ret == 0) {
654	mutex_lock(&svmm->mutex);	695	mutex_lock(&svmm->mutex);
655	if (!hmm_vma_range_done(&range)) {	696	if (!nouveau_range_done(&range)) {
656	mutex_unlock(&svmm->mutex);	697	mutex_unlock(&svmm->mutex);
657	goto again;	698	goto again;
658	}	699	}
@@ -666,8 +707,8 @@ again: · 7 unmodified lines
666	NULL);	707	NULL);
667	svmm->vmm->vmm.object.client->super = false;	708	svmm->vmm->vmm.object.client->super = false;
668	mutex_unlock(&svmm->mutex);	709	mutex_unlock(&svmm->mutex);
		710	up_read(&svmm->mm->mmap_sem);
669	}	711	}
670	up_read(&svmm->mm->mmap_sem);
671		712
672	/* Cancel any faults in the window whose pages didn't manage	713	/* Cancel any faults in the window whose pages didn't manage
673	* to keep their valid bit, or stay writeable when required.	714	* to keep their valid bit, or stay writeable when required.

drivers/gpu/drm/rockchip/analogix_dp-rockchip.c+1−1

@@ -432,7 +432,7 @@ static int rockchip_dp_resume(struct device *dev) · 431 unmodified lines
432		432
433	static const struct dev_pm_ops rockchip_dp_pm_ops = {	433	static const struct dev_pm_ops rockchip_dp_pm_ops = {
434	#ifdef CONFIG_PM_SLEEP	434	#ifdef CONFIG_PM_SLEEP
435	.suspend = rockchip_dp_suspend,	435	.suspend_late = rockchip_dp_suspend,
436	.resume_early = rockchip_dp_resume,	436	.resume_early = rockchip_dp_resume,
437	#endif	437	#endif
438	};	438	};

drivers/gpu/drm/tegra/output.c+6−2

 						       "nvidia,hpd-gpio", 0,
 						       GPIOD_IN,
 						       "HDMI hotplug detect");
-	if (IS_ERR(output->hpd_gpio))
+	if (IS_ERR(output->hpd_gpio)) {
-		return PTR_ERR(output->hpd_gpio);
+		if (PTR_ERR(output->hpd_gpio) != -ENOENT)
+			return PTR_ERR(output->hpd_gpio);
+		output->hpd_gpio = NULL;
+	}
 	if (output->hpd_gpio) {
 		err = gpiod_to_irq(output->hpd_gpio);

drivers/gpu/drm/vmwgfx/vmwgfx_msg.c+3−1

 		break;
 	}
-	if (retries == RETRIES)
+	if (retries == RETRIES) {
+		kfree(reply);
 		return -EINVAL;
+	}
 	*msg_len = reply_len;
 	*msg     = reply;

drivers/hid/hid-a4tech.c+27−3

 #define A4_2WHEEL_MOUSE_HACK_7	0x01
 #define A4_2WHEEL_MOUSE_HACK_B8	0x02
+#define A4_WHEEL_ORIENTATION	(HID_UP_GENDESK | 0x000000b8)
 struct a4tech_sc {
 	unsigned long quirks;
 	unsigned int hw_wheel;
 	__s32 delayed_value;
 };
+static int a4_input_mapping(struct hid_device *hdev, struct hid_input *hi,
+			    struct hid_field *field, struct hid_usage *usage,
+			    unsigned long **bit, int *max)
+{
+	struct a4tech_sc *a4 = hid_get_drvdata(hdev);
+	if (a4->quirks & A4_2WHEEL_MOUSE_HACK_B8 &&
+	    usage->hid == A4_WHEEL_ORIENTATION) {
+		/*
+		 * We do not want to have this usage mapped to anything as it's
+		 * nonstandard and doesn't really behave like an HID report.
+		 * It's only selecting the orientation (vertical/horizontal) of
+		 * the previous mouse wheel report. The input_events will be
+		 * generated once both reports are recorded in a4_event().
+		 */
+		return -1;
+	}
+	return 0;
+}
 static int a4_input_mapped(struct hid_device *hdev, struct hid_input *hi,
 		struct hid_field *field, struct hid_usage *usage,
 		unsigned long **bit, int *max)
 	struct a4tech_sc *a4 = hid_get_drvdata(hdev);
 	struct input_dev *input;
-	if (!(hdev->claimed & HID_CLAIMED_INPUT) || !field->hidinput ||
+	if (!(hdev->claimed & HID_CLAIMED_INPUT) || !field->hidinput)
-			!usage->type)
 		return 0;
 	input = field->hidinput->input;
 			return 1;
 		}
-		if (usage->hid == 0x000100b8) {
+		if (usage->hid == A4_WHEEL_ORIENTATION) {
 			input_event(input, EV_REL, value ? REL_HWHEEL :
 					REL_WHEEL, a4->delayed_value);
 			input_event(input, EV_REL, value ? REL_HWHEEL_HI_RES :
 static struct hid_driver a4_driver = {
 	.name = "a4tech",
 	.id_table = a4_devices,
+	.input_mapping = a4_input_mapping,
 	.input_mapped = a4_input_mapped,
 	.event = a4_event,
 	.probe = a4_probe,

drivers/hid/hid-holtek-kbd.c+7−2

 	/* Locate the boot interface, to receive the LED change events */
 	struct usb_interface *boot_interface = usb_ifnum_to_if(usb_dev, 0);
+	struct hid_device *boot_hid;
+	struct hid_input *boot_hid_input;
-	struct hid_device *boot_hid = usb_get_intfdata(boot_interface);
+	if (unlikely(boot_interface == NULL))
-	struct hid_input *boot_hid_input = list_first_entry(&boot_hid->inputs,
+		return -ENODEV;
+	boot_hid = usb_get_intfdata(boot_interface);
+	boot_hid_input = list_first_entry(&boot_hid->inputs,
 		struct hid_input, list);
 	return boot_hid_input->input->event(boot_hid_input->input, type, code,

drivers/hid/hid-ids.h+4−1

 #define USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A	0x0b4a
 #define USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE		0x134a
 #define USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_094A	0x094a
+#define USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_0641	0x0641
 #define USB_VENDOR_ID_HUION		0x256c
 #define USB_DEVICE_ID_HUION_TABLET	0x006e
 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER		0xc52f
 #define USB_DEVICE_ID_LOGITECH_UNIFYING_RECEIVER_2	0xc532
 #define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_2		0xc534
-#define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_GAMING	0xc539
+#define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED	0xc539
+#define USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_POWERPLAY	0xc53a
 #define USB_DEVICE_ID_SPACETRAVELLER	0xc623
 #define USB_DEVICE_ID_SPACENAVIGATOR	0xc626
 #define USB_DEVICE_ID_DINOVO_DESKTOP	0xc704
 #define USB_DEVICE_ID_SAITEK_RAT7	0x0cd7
 #define USB_DEVICE_ID_SAITEK_RAT9	0x0cfa
 #define USB_DEVICE_ID_SAITEK_MMO7	0x0cd0
+#define USB_DEVICE_ID_SAITEK_X52	0x075c
 #define USB_VENDOR_ID_SAMSUNG		0x0419
 #define USB_DEVICE_ID_SAMSUNG_IR_REMOTE	0x0001

drivers/hid/hid-logitech-dj.c+7−3

 				    HID_REQ_SET_REPORT);
 	kfree(hidpp_report);
-	return retval;
+	return (retval < 0) ? retval : 0;
 }
 static int logi_dj_recv_query_paired_devices(struct dj_receiver_dev *djrcv_dev)
 	  HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
 			 USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_2),
 	 .driver_data = recvr_type_hidpp},
-	{ /* Logitech gaming receiver (0xc539) */
+	{ /* Logitech lightspeed receiver (0xc539) */
 	  HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
-		USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_GAMING),
+		USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_LIGHTSPEED),
 	 .driver_data = recvr_type_gaming_hidpp},
 	{ /* Logitech 27 MHz HID++ 1.0 receiver (0xc513) */
 	  HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_MX3000_RECEIVER),
 	 .driver_data = recvr_type_27mhz},
+	{ /* Logitech powerplay receiver (0xc53a) */
+	  HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
+		USB_DEVICE_ID_LOGITECH_NANO_RECEIVER_POWERPLAY),
+	 .driver_data = recvr_type_gaming_hidpp},
 	{ /* Logitech 27 MHz HID++ 1.0 receiver (0xc517) */
 	  HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH,
 		USB_DEVICE_ID_S510_RECEIVER_2),

drivers/hid/hid-logitech-hidpp.c+31−1

@@ -3749,15 +3749,45 @@ static const struct hid_device_id hidpp_devices[] = { · 3748 unmodified lines
3749		3749
3750	{ L27MHZ_DEVICE(HID_ANY_ID) },	3750	{ L27MHZ_DEVICE(HID_ANY_ID) },
3751		3751
3752	{ /* Logitech G403 Gaming Mouse over USB */	3752	{ /* Logitech G203/Prodigy Gaming Mouse */
		3753	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC084) },
		3754	{ /* Logitech G302 Gaming Mouse */
		3755	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC07F) },
		3756	{ /* Logitech G303 Gaming Mouse */
		3757	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC080) },
		3758	{ /* Logitech G400 Gaming Mouse */
		3759	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC07E) },
		3760	{ /* Logitech G403 Wireless Gaming Mouse over USB */
3753	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC082) },	3761	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC082) },
		3762	{ /* Logitech G403 Gaming Mouse */
		3763	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC083) },
		3764	{ /* Logitech G403 Hero Gaming Mouse over USB */
		3765	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC08F) },
		3766	{ /* Logitech G502 Proteus Core Gaming Mouse */
		3767	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC07D) },
		3768	{ /* Logitech G502 Proteus Spectrum Gaming Mouse over USB */
		3769	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC332) },
		3770	{ /* Logitech G502 Hero Gaming Mouse over USB */
		3771	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC08B) },
3754	{ /* Logitech G700 Gaming Mouse over USB */	3772	{ /* Logitech G700 Gaming Mouse over USB */
3755	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC06B) },	3773	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC06B) },
		3774	{ /* Logitech G700s Gaming Mouse over USB */
		3775	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC07C) },
		3776	{ /* Logitech G703 Gaming Mouse over USB */
		3777	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC087) },
		3778	{ /* Logitech G703 Hero Gaming Mouse over USB */
		3779	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC090) },
3756	{ /* Logitech G900 Gaming Mouse over USB */	3780	{ /* Logitech G900 Gaming Mouse over USB */
3757	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC081) },	3781	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC081) },
		3782	{ /* Logitech G903 Gaming Mouse over USB */
		3783	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC086) },
		3784	{ /* Logitech G903 Hero Gaming Mouse over USB */
		3785	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC091) },
3758	{ /* Logitech G920 Wheel over USB */	3786	{ /* Logitech G920 Wheel over USB */
3759	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_G920_WHEEL),	3787	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_G920_WHEEL),
3760	.driver_data = HIDPP_QUIRK_CLASS_G920 \| HIDPP_QUIRK_FORCE_OUTPUT_REPORTS},	3788	.driver_data = HIDPP_QUIRK_CLASS_G920 \| HIDPP_QUIRK_FORCE_OUTPUT_REPORTS},
		3789	{ /* Logitech G Pro Gaming Mouse over USB */
		3790	HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, 0xC088) },
3761		3791
3762	{ /* MX5000 keyboard over Bluetooth */	3792	{ /* MX5000 keyboard over Bluetooth */
3763	HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, 0xb305),	3793	HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_LOGITECH, 0xb305),

drivers/hid/hid-quirks.c+2−0

 	{ HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_LOGITECH_OEM_USB_OPTICAL_MOUSE_0B4A), HID_QUIRK_ALWAYS_POLL },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE), HID_QUIRK_ALWAYS_POLL },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_094A), HID_QUIRK_ALWAYS_POLL },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_HP, USB_PRODUCT_ID_HP_PIXART_OEM_USB_OPTICAL_MOUSE_0641), HID_QUIRK_ALWAYS_POLL },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_IDEACOM, USB_DEVICE_ID_IDEACOM_IDC6680), HID_QUIRK_MULTI_INPUT },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_INNOMEDIA, USB_DEVICE_ID_INNEX_GENESIS_ATARI), HID_QUIRK_MULTI_INPUT },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M610X), HID_QUIRK_MULTI_INPUT },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_RETROUSB, USB_DEVICE_ID_RETROUSB_SNES_RETROPAD), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_RETROUSB, USB_DEVICE_ID_RETROUSB_SNES_RETROPORT), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RUMBLEPAD), HID_QUIRK_BADPAD },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SEMICO, USB_DEVICE_ID_SEMICO_USB_KEYKOARD2), HID_QUIRK_NO_INIT_REPORTS },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SEMICO, USB_DEVICE_ID_SEMICO_USB_KEYKOARD), HID_QUIRK_NO_INIT_REPORTS },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SENNHEISER, USB_DEVICE_ID_SENNHEISER_BTD500USB), HID_QUIRK_NOGET },

drivers/hid/hid-sony.c+12−3

 static inline void sony_schedule_work(struct sony_sc *sc,
 				      enum sony_worker which)
 {
+	unsigned long flags;
 	switch (which) {
 	case SONY_WORKER_STATE:
-		if (!sc->defer_initialization)
+		spin_lock_irqsave(&sc->lock, flags);
+		if (!sc->defer_initialization && sc->state_worker_initialized)
 			schedule_work(&sc->state_worker);
+		spin_unlock_irqrestore(&sc->lock, flags);
 		break;
 	case SONY_WORKER_HOTPLUG:
 		if (sc->hotplug_worker_initialized)
 static inline void sony_cancel_work_sync(struct sony_sc *sc)
 {
+	unsigned long flags;
 	if (sc->hotplug_worker_initialized)
 		cancel_work_sync(&sc->hotplug_worker);
-	if (sc->state_worker_initialized)
+	if (sc->state_worker_initialized) {
+		spin_lock_irqsave(&sc->lock, flags);
+		sc->state_worker_initialized = 0;
+		spin_unlock_irqrestore(&sc->lock, flags);
 		cancel_work_sync(&sc->state_worker);
+	}
 }
 static int sony_input_configured(struct hid_device *hdev,
 					struct hid_input *hidinput)
 {

drivers/hid/hid-tmff.c+12−0

 #include "hid-ids.h"
+#define THRUSTMASTER_DEVICE_ID_2_IN_1_DT	0xb320
 static const signed short ff_rumble[] = {
 	FF_RUMBLE,
 	-1
 	struct hid_field *ff_field = tmff->ff_field;
 	int x, y;
 	int left, right;	/* Rumbling */
+	int motor_swap;
 	switch (effect->type) {
 	case FF_CONSTANT:
 					ff_field->logical_minimum,
 					ff_field->logical_maximum);
+		/* 2-in-1 strong motor is left */
+		if (hid->product == THRUSTMASTER_DEVICE_ID_2_IN_1_DT) {
+			motor_swap = left;
+			left = right;
+			right = motor_swap;
+		}
 		dbg_hid("(left,right)=(%08x, %08x)\n", left, right);
 		ff_field->value[0] = left;
 		ff_field->value[1] = right;
 		.driver_data = (unsigned long)ff_rumble },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb304),   /* FireStorm Dual Power 2 (and 3) */
 		.driver_data = (unsigned long)ff_rumble },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, THRUSTMASTER_DEVICE_ID_2_IN_1_DT),   /* Dual Trigger 2-in-1 */
+		.driver_data = (unsigned long)ff_rumble },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb323),   /* Dual Trigger 3-in-1 (PC Mode) */
 		.driver_data = (unsigned long)ff_rumble },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb324),   /* Dual Trigger 3-in-1 (PS3 Mode) */

drivers/hid/usbhid/hiddev.c+12−0

 	spin_unlock_irq(&list->hiddev->list_lock);
 	mutex_lock(&hiddev->existancelock);
+	/*
+	 * recheck exist with existance lock held to
+	 * avoid opening a disconnected device
+	 */
+	if (!list->hiddev->exist) {
+		res = -ENODEV;
+		goto bail_unlock;
+	}
 	if (!list->hiddev->open++)
 		if (list->hiddev->exist) {
 			struct hid_device *hid = hiddev->hid;
 	hid_hw_power(hid, PM_HINT_NORMAL);
 bail_unlock:
 	mutex_unlock(&hiddev->existancelock);
+	spin_lock_irq(&list->hiddev->list_lock);
+	list_del(&list->node);
+	spin_unlock_irq(&list->hiddev->list_lock);
 bail:
 	file->private_data = NULL;
 	vfree(list);

drivers/hid/wacom_wac.c+6−6

@@ -533,14 +533,14 @@ static int wacom_intuos_pad(struct wacom_wac *wacom) · 532 unmodified lines
533	*/	533	*/
534	buttons = (data[4] << 1) \| (data[3] & 0x01);	534	buttons = (data[4] << 1) \| (data[3] & 0x01);
535	} else if (features->type == CINTIQ_COMPANION_2) {	535	} else if (features->type == CINTIQ_COMPANION_2) {
536	/* d-pad right -> data[4] & 0x10	536	/* d-pad right -> data[2] & 0x10
537	* d-pad up -> data[4] & 0x20	537	* d-pad up -> data[2] & 0x20
538	* d-pad left -> data[4] & 0x40	538	* d-pad left -> data[2] & 0x40
539	* d-pad down -> data[4] & 0x80	539	* d-pad down -> data[2] & 0x80
540	* d-pad center -> data[3] & 0x01	540	* d-pad center -> data[1] & 0x01
541	*/	541	*/
542	buttons = ((data[2] >> 4) << 7) \|	542	buttons = ((data[2] >> 4) << 7) \|
543	((data[1] & 0x04) << 6) \|	543	((data[1] & 0x04) << 4) \|
544	((data[2] & 0x0F) << 2) \|	544	((data[2] & 0x0F) << 2) \|
545	(data[1] & 0x03);	545	(data[1] & 0x03);
546	} else if (features->type >= INTUOS5S && features->type <= INTUOSPL) {	546	} else if (features->type >= INTUOS5S && features->type <= INTUOSPL) {

drivers/hwmon/lm75.c+1−1

@@ -343,7 +343,7 @@ lm75_probe(struct i2c_client client, const struct i2c_device_id id) · 342 unmodified lines
343	data->sample_time = MSEC_PER_SEC / 2;	343	data->sample_time = MSEC_PER_SEC / 2;
344	break;	344	break;
345	case tmp75b: /* not one-shot mode, Conversion rate 37Hz */	345	case tmp75b: /* not one-shot mode, Conversion rate 37Hz */
346	clr_mask \|= 1 << 15 \| 0x3 << 13;	346	clr_mask \|= 1 << 7 \| 0x3 << 5;
347	data->resolution = 12;	347	data->resolution = 12;
348	data->sample_time = MSEC_PER_SEC / 37;	348	data->sample_time = MSEC_PER_SEC / 37;
349	break;	349	break;

drivers/hwmon/nct7802.c+3−3

@@ -704,7 +704,7 @@ static struct attribute *nct7802_in_attrs[] = { · 703 unmodified lines
704	&sensor_dev_attr_in3_alarm.dev_attr.attr,	704	&sensor_dev_attr_in3_alarm.dev_attr.attr,
705	&sensor_dev_attr_in3_beep.dev_attr.attr,	705	&sensor_dev_attr_in3_beep.dev_attr.attr,
706		706
707	&sensor_dev_attr_in4_input.dev_attr.attr, /* 17 */	707	&sensor_dev_attr_in4_input.dev_attr.attr, /* 16 */
708	&sensor_dev_attr_in4_min.dev_attr.attr,	708	&sensor_dev_attr_in4_min.dev_attr.attr,
709	&sensor_dev_attr_in4_max.dev_attr.attr,	709	&sensor_dev_attr_in4_max.dev_attr.attr,
710	&sensor_dev_attr_in4_alarm.dev_attr.attr,	710	&sensor_dev_attr_in4_alarm.dev_attr.attr,
@@ -730,9 +730,9 @@ static umode_t nct7802_in_is_visible(struct kobject *kobj, · 19 unmodified lines
730		730
731	if (index >= 6 && index < 11 && (reg & 0x03) != 0x03) /* VSEN1 */	731	if (index >= 6 && index < 11 && (reg & 0x03) != 0x03) /* VSEN1 */
732	return 0;	732	return 0;
733	if (index >= 11 && index < 17 && (reg & 0x0c) != 0x0c) /* VSEN2 */	733	if (index >= 11 && index < 16 && (reg & 0x0c) != 0x0c) /* VSEN2 */
734	return 0;	734	return 0;
735	if (index >= 17 && (reg & 0x30) != 0x30) /* VSEN3 */	735	if (index >= 16 && (reg & 0x30) != 0x30) /* VSEN3 */
736	return 0;	736	return 0;
737		737
738	return attr->mode;	738	return attr->mode;

drivers/hwtracing/coresight/coresight-etm-perf.c+1−0

@@ -544,6 +544,7 @@ int etm_perf_add_symlink_sink(struct coresight_device *csdev) · 543 unmodified lines
544	/* See function coresight_get_sink_by_id() to know where this is used */	544	/* See function coresight_get_sink_by_id() to know where this is used */
545	hash = hashlen_hash(hashlen_string(NULL, name));	545	hash = hashlen_hash(hashlen_string(NULL, name));
546		546
		547	sysfs_attr_init(&ea->attr.attr);
547	ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL);	548	ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL);
548	if (!ea->attr.attr.name)	549	if (!ea->attr.attr.name)
549	return -ENOMEM;	550	return -ENOMEM;

drivers/i2c/busses/i2c-at91-core.c+1−1

@@ -142,7 +142,7 @@ static struct at91_twi_pdata sama5d4_config = { · 141 unmodified lines
142		142
143	static struct at91_twi_pdata sama5d2_config = {	143	static struct at91_twi_pdata sama5d2_config = {
144	.clk_max_div = 7,	144	.clk_max_div = 7,
145	.clk_offset = 4,	145	.clk_offset = 3,
146	.has_unre_flag = true,	146	.has_unre_flag = true,
147	.has_alt_cmd = true,	147	.has_alt_cmd = true,
148	.has_hold_field = true,	148	.has_hold_field = true,

drivers/i2c/busses/i2c-at91-master.c+5−4

 	writeb_relaxed(*dev->buf, dev->base + AT91_TWI_THR);
 	/* send stop when last byte has been written */
-	if (--dev->buf_len == 0)
+	if (--dev->buf_len == 0) {
 		if (!dev->use_alt_cmd)
 			at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP);
+		at91_twi_write(dev, AT91_TWI_IDR, AT91_TWI_TXRDY);
+	}
 	dev_dbg(dev->dev, "wrote 0x%x, to go %zu\n", *dev->buf, dev->buf_len);
 		} else {
 			at91_twi_write_next_byte(dev);
 			at91_twi_write(dev, AT91_TWI_IER,
-				       AT91_TWI_TXCOMP |
+				       AT91_TWI_TXCOMP | AT91_TWI_NACK |
-				       AT91_TWI_NACK |
+				       (dev->buf_len ? AT91_TWI_TXRDY : 0));
-				       AT91_TWI_TXRDY);
 		}
 	}

drivers/i2c/busses/i2c-bcm-iproc.c+6−4

@@ -392,16 +392,18 @@ static bool bcm_iproc_i2c_slave_isr(struct bcm_iproc_i2c_dev *iproc_i2c, · 391 unmodified lines
392	static void bcm_iproc_i2c_read_valid_bytes(struct bcm_iproc_i2c_dev *iproc_i2c)	392	static void bcm_iproc_i2c_read_valid_bytes(struct bcm_iproc_i2c_dev *iproc_i2c)
393	{	393	{
394	struct i2c_msg *msg = iproc_i2c->msg;	394	struct i2c_msg *msg = iproc_i2c->msg;
		395	uint32_t val;
395		396
396	/* Read valid data from RX FIFO */	397	/* Read valid data from RX FIFO */
397	while (iproc_i2c->rx_bytes < msg->len) {	398	while (iproc_i2c->rx_bytes < msg->len) {
398	if (!((iproc_i2c_rd_reg(iproc_i2c, M_FIFO_CTRL_OFFSET) >> M_FIFO_RX_CNT_SHIFT)	399	val = iproc_i2c_rd_reg(iproc_i2c, M_RX_OFFSET);
399	& M_FIFO_RX_CNT_MASK))	400
		401	/* rx fifo empty */
		402	if (!((val >> M_RX_STATUS_SHIFT) & M_RX_STATUS_MASK))
400	break;	403	break;
401		404
402	msg->buf[iproc_i2c->rx_bytes] =	405	msg->buf[iproc_i2c->rx_bytes] =
403	(iproc_i2c_rd_reg(iproc_i2c, M_RX_OFFSET) >>	406	(val >> M_RX_DATA_SHIFT) & M_RX_DATA_MASK;
404	M_RX_DATA_SHIFT) & M_RX_DATA_MASK;
405	iproc_i2c->rx_bytes++;	407	iproc_i2c->rx_bytes++;
406	}	408	}
407	}	409	}

drivers/i2c/busses/i2c-s3c2410.c+1−0

@@ -435,6 +435,7 @@ static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) · 434 unmodified lines
435	* fall through to the write state, as we will need to	435	* fall through to the write state, as we will need to
436	* send a byte as well	436	* send a byte as well
437	*/	437	*/
		438	/* Fall through */
438		439
439	case STATE_WRITE:	440	case STATE_WRITE:
440	/*	441	/*

drivers/iio/accel/cros_ec_accel_legacy.c+0−1

@@ -319,7 +319,6 @@ static const struct iio_chan_spec_ext_info cros_ec_accel_legacy_ext_info[] = { · 318 unmodified lines
319	.modified = 1, \	319	.modified = 1, \
320	.info_mask_separate = \	320	.info_mask_separate = \
321	BIT(IIO_CHAN_INFO_RAW) \| \	321	BIT(IIO_CHAN_INFO_RAW) \| \
322	BIT(IIO_CHAN_INFO_SCALE) \| \
323	BIT(IIO_CHAN_INFO_CALIBBIAS), \	322	BIT(IIO_CHAN_INFO_CALIBBIAS), \
324	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SCALE), \	323	.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SCALE), \
325	.ext_info = cros_ec_accel_legacy_ext_info, \	324	.ext_info = cros_ec_accel_legacy_ext_info, \

drivers/iio/adc/ingenic-adc.c+54−0

@@ -11,6 +11,7 @@ · 10 unmodified lines
11	#include <linux/iio/iio.h>	11	#include <linux/iio/iio.h>
12	#include <linux/io.h>	12	#include <linux/io.h>
13	#include <linux/iopoll.h>	13	#include <linux/iopoll.h>
		14	#include <linux/kernel.h>
14	#include <linux/module.h>	15	#include <linux/module.h>
15	#include <linux/mutex.h>	16	#include <linux/mutex.h>
16	#include <linux/platform_device.h>	17	#include <linux/platform_device.h>
@@ -22,8 +23,11 @@ · 5 unmodified lines
22	#define JZ_ADC_REG_ADTCH 0x18	23	#define JZ_ADC_REG_ADTCH 0x18
23	#define JZ_ADC_REG_ADBDAT 0x1c	24	#define JZ_ADC_REG_ADBDAT 0x1c
24	#define JZ_ADC_REG_ADSDAT 0x20	25	#define JZ_ADC_REG_ADSDAT 0x20
		26	#define JZ_ADC_REG_ADCLK 0x28
25		27
26	#define JZ_ADC_REG_CFG_BAT_MD BIT(4)	28	#define JZ_ADC_REG_CFG_BAT_MD BIT(4)
		29	#define JZ_ADC_REG_ADCLK_CLKDIV_LSB 0
		30	#define JZ_ADC_REG_ADCLK_CLKDIV10US_LSB 16
27		31
28	#define JZ_ADC_AUX_VREF 3300	32	#define JZ_ADC_AUX_VREF 3300
29	#define JZ_ADC_AUX_VREF_BITS 12	33	#define JZ_ADC_AUX_VREF_BITS 12
@@ -34,6 +38,8 @@ · 4 unmodified lines
34	#define JZ4740_ADC_BATTERY_HIGH_VREF (7500 * 0.986)	38	#define JZ4740_ADC_BATTERY_HIGH_VREF (7500 * 0.986)
35	#define JZ4740_ADC_BATTERY_HIGH_VREF_BITS 12	39	#define JZ4740_ADC_BATTERY_HIGH_VREF_BITS 12
36		40
		41	struct ingenic_adc;
		42
37	struct ingenic_adc_soc_data {	43	struct ingenic_adc_soc_data {
38	unsigned int battery_high_vref;	44	unsigned int battery_high_vref;
39	unsigned int battery_high_vref_bits;	45	unsigned int battery_high_vref_bits;
@@ -41,6 +47,7 @@ struct ingenic_adc_soc_data { · 1 unmodified line
41	size_t battery_raw_avail_size;	47	size_t battery_raw_avail_size;
42	const int *battery_scale_avail;	48	const int *battery_scale_avail;
43	size_t battery_scale_avail_size;	49	size_t battery_scale_avail_size;
		50	int (init_clk_div)(struct device dev, struct ingenic_adc *adc);
44	};	51	};
45		52
46	struct ingenic_adc {	53	struct ingenic_adc {
@@ -151,6 +158,42 @@ static const int jz4740_adc_battery_scale_avail[] = { · 104 unmodified lines
151	JZ_ADC_BATTERY_LOW_VREF, JZ_ADC_BATTERY_LOW_VREF_BITS,	158	JZ_ADC_BATTERY_LOW_VREF, JZ_ADC_BATTERY_LOW_VREF_BITS,
152	};	159	};
153		160
		161	static int jz4725b_adc_init_clk_div(struct device dev, struct ingenic_adc adc)
		162	{
		163	struct clk *parent_clk;
		164	unsigned long parent_rate, rate;
		165	unsigned int div_main, div_10us;
		166
		167	parent_clk = clk_get_parent(adc->clk);
		168	if (!parent_clk) {
		169	dev_err(dev, "ADC clock has no parent\n");
		170	return -ENODEV;
		171	}
		172	parent_rate = clk_get_rate(parent_clk);
		173
		174	/*
		175	* The JZ4725B ADC works at 500 kHz to 8 MHz.
		176	* We pick the highest rate possible.
		177	* In practice we typically get 6 MHz, half of the 12 MHz EXT clock.
		178	*/
		179	div_main = DIV_ROUND_UP(parent_rate, 8000000);
		180	div_main = clamp(div_main, 1u, 64u);
		181	rate = parent_rate / div_main;
		182	if (rate < 500000 \|\| rate > 8000000) {
		183	dev_err(dev, "No valid divider for ADC main clock\n");
		184	return -EINVAL;
		185	}
		186
		187	/* We also need a divider that produces a 10us clock. */
		188	div_10us = DIV_ROUND_UP(rate, 100000);
		189
		190	writel(((div_10us - 1) << JZ_ADC_REG_ADCLK_CLKDIV10US_LSB) \|
		191	(div_main - 1) << JZ_ADC_REG_ADCLK_CLKDIV_LSB,
		192	adc->base + JZ_ADC_REG_ADCLK);
		193
		194	return 0;
		195	}
		196
154	static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = {	197	static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = {
155	.battery_high_vref = JZ4725B_ADC_BATTERY_HIGH_VREF,	198	.battery_high_vref = JZ4725B_ADC_BATTERY_HIGH_VREF,
156	.battery_high_vref_bits = JZ4725B_ADC_BATTERY_HIGH_VREF_BITS,	199	.battery_high_vref_bits = JZ4725B_ADC_BATTERY_HIGH_VREF_BITS,
@@ -158,6 +201,7 @@ static const struct ingenic_adc_soc_data jz4725b_adc_soc_data = { · 1 unmodified line
158	.battery_raw_avail_size = ARRAY_SIZE(jz4725b_adc_battery_raw_avail),	201	.battery_raw_avail_size = ARRAY_SIZE(jz4725b_adc_battery_raw_avail),
159	.battery_scale_avail = jz4725b_adc_battery_scale_avail,	202	.battery_scale_avail = jz4725b_adc_battery_scale_avail,
160	.battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail),	203	.battery_scale_avail_size = ARRAY_SIZE(jz4725b_adc_battery_scale_avail),
		204	.init_clk_div = jz4725b_adc_init_clk_div,
161	};	205	};
162		206
163	static const struct ingenic_adc_soc_data jz4740_adc_soc_data = {	207	static const struct ingenic_adc_soc_data jz4740_adc_soc_data = {
@@ -167,6 +211,7 @@ static const struct ingenic_adc_soc_data jz4740_adc_soc_data = { · 3 unmodified lines
167	.battery_raw_avail_size = ARRAY_SIZE(jz4740_adc_battery_raw_avail),	211	.battery_raw_avail_size = ARRAY_SIZE(jz4740_adc_battery_raw_avail),
168	.battery_scale_avail = jz4740_adc_battery_scale_avail,	212	.battery_scale_avail = jz4740_adc_battery_scale_avail,
169	.battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail),	213	.battery_scale_avail_size = ARRAY_SIZE(jz4740_adc_battery_scale_avail),
		214	.init_clk_div = NULL, /* no ADCLK register on JZ4740 */
170	};	215	};
171		216
172	static int ingenic_adc_read_avail(struct iio_dev *iio_dev,	217	static int ingenic_adc_read_avail(struct iio_dev *iio_dev,
@@ -317,6 +362,15 @@ static int ingenic_adc_probe(struct platform_device *pdev) · 144 unmodified lines
317	return ret;	362	return ret;
318	}	363	}
319		364
		365	/* Set clock dividers. */
		366	if (soc_data->init_clk_div) {
		367	ret = soc_data->init_clk_div(dev, adc);
		368	if (ret) {
		369	clk_disable_unprepare(adc->clk);
		370	return ret;
		371	}
		372	}
		373
320	/* Put hardware in a known passive state. */	374	/* Put hardware in a known passive state. */
321	writeb(0x00, adc->base + JZ_ADC_REG_ENABLE);	375	writeb(0x00, adc->base + JZ_ADC_REG_ENABLE);
322	writeb(0xff, adc->base + JZ_ADC_REG_CTRL);	376	writeb(0xff, adc->base + JZ_ADC_REG_CTRL);

drivers/iio/adc/max9611.c+1−1

@@ -83,7 +83,7 @@ · 82 unmodified lines
83	#define MAX9611_TEMP_MAX_POS 0x7f80	83	#define MAX9611_TEMP_MAX_POS 0x7f80
84	#define MAX9611_TEMP_MAX_NEG 0xff80	84	#define MAX9611_TEMP_MAX_NEG 0xff80
85	#define MAX9611_TEMP_MIN_NEG 0xd980	85	#define MAX9611_TEMP_MIN_NEG 0xd980
86	#define MAX9611_TEMP_MASK GENMASK(7, 15)	86	#define MAX9611_TEMP_MASK GENMASK(15, 7)
87	#define MAX9611_TEMP_SHIFT 0x07	87	#define MAX9611_TEMP_SHIFT 0x07
88	#define MAX9611_TEMP_RAW(_r) ((_r) >> MAX9611_TEMP_SHIFT)	88	#define MAX9611_TEMP_RAW(_r) ((_r) >> MAX9611_TEMP_SHIFT)
89	#define MAX9611_TEMP_SCALE_NUM 1000000	89	#define MAX9611_TEMP_SCALE_NUM 1000000

drivers/iio/adc/rcar-gyroadc.c+2−2

@@ -382,7 +382,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev) · 381 unmodified lines
382	dev_err(dev,	382	dev_err(dev,
383	"Only %i channels supported with %pOFn, but reg = <%i>.\n",	383	"Only %i channels supported with %pOFn, but reg = <%i>.\n",
384	num_channels, child, reg);	384	num_channels, child, reg);
385	return ret;	385	return -EINVAL;
386	}	386	}
387	}	387	}
388		388
@@ -391,7 +391,7 @@ static int rcar_gyroadc_parse_subdevs(struct iio_dev *indio_dev) · 2 unmodified lines
391	dev_err(dev,	391	dev_err(dev,
392	"Channel %i uses different ADC mode than the rest.\n",	392	"Channel %i uses different ADC mode than the rest.\n",
393	reg);	393	reg);
394	return ret;	394	return -EINVAL;
395	}	395	}
396		396
397	/* Channel is valid, grab the regulator. */	397	/* Channel is valid, grab the regulator. */

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c+43−0

@@ -845,6 +845,25 @@ static const struct iio_chan_spec inv_mpu_channels[] = { · 844 unmodified lines
845	INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),	845	INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
846	};	846	};
847		847
		848	static const unsigned long inv_mpu_scan_masks[] = {
		849	/* 3-axis accel */
		850	BIT(INV_MPU6050_SCAN_ACCL_X)
		851	\| BIT(INV_MPU6050_SCAN_ACCL_Y)
		852	\| BIT(INV_MPU6050_SCAN_ACCL_Z),
		853	/* 3-axis gyro */
		854	BIT(INV_MPU6050_SCAN_GYRO_X)
		855	\| BIT(INV_MPU6050_SCAN_GYRO_Y)
		856	\| BIT(INV_MPU6050_SCAN_GYRO_Z),
		857	/* 6-axis accel + gyro */
		858	BIT(INV_MPU6050_SCAN_ACCL_X)
		859	\| BIT(INV_MPU6050_SCAN_ACCL_Y)
		860	\| BIT(INV_MPU6050_SCAN_ACCL_Z)
		861	\| BIT(INV_MPU6050_SCAN_GYRO_X)
		862	\| BIT(INV_MPU6050_SCAN_GYRO_Y)
		863	\| BIT(INV_MPU6050_SCAN_GYRO_Z),
		864	0,
		865	};
		866
848	static const struct iio_chan_spec inv_icm20602_channels[] = {	867	static const struct iio_chan_spec inv_icm20602_channels[] = {
849	IIO_CHAN_SOFT_TIMESTAMP(INV_ICM20602_SCAN_TIMESTAMP),	868	IIO_CHAN_SOFT_TIMESTAMP(INV_ICM20602_SCAN_TIMESTAMP),
850	{	869	{
@@ -871,6 +890,28 @@ static const struct iio_chan_spec inv_icm20602_channels[] = { · 20 unmodified lines
871	INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_ICM20602_SCAN_ACCL_Z),	890	INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_ICM20602_SCAN_ACCL_Z),
872	};	891	};
873		892
		893	static const unsigned long inv_icm20602_scan_masks[] = {
		894	/* 3-axis accel + temp (mandatory) */
		895	BIT(INV_ICM20602_SCAN_ACCL_X)
		896	\| BIT(INV_ICM20602_SCAN_ACCL_Y)
		897	\| BIT(INV_ICM20602_SCAN_ACCL_Z)
		898	\| BIT(INV_ICM20602_SCAN_TEMP),
		899	/* 3-axis gyro + temp (mandatory) */
		900	BIT(INV_ICM20602_SCAN_GYRO_X)
		901	\| BIT(INV_ICM20602_SCAN_GYRO_Y)
		902	\| BIT(INV_ICM20602_SCAN_GYRO_Z)
		903	\| BIT(INV_ICM20602_SCAN_TEMP),
		904	/* 6-axis accel + gyro + temp (mandatory) */
		905	BIT(INV_ICM20602_SCAN_ACCL_X)
		906	\| BIT(INV_ICM20602_SCAN_ACCL_Y)
		907	\| BIT(INV_ICM20602_SCAN_ACCL_Z)
		908	\| BIT(INV_ICM20602_SCAN_GYRO_X)
		909	\| BIT(INV_ICM20602_SCAN_GYRO_Y)
		910	\| BIT(INV_ICM20602_SCAN_GYRO_Z)
		911	\| BIT(INV_ICM20602_SCAN_TEMP),
		912	0,
		913	};
		914
874	/*	915	/*
875	* The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and	916	* The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and
876	* INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the	917	* INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the
@@ -1130,9 +1171,11 @@ int inv_mpu_core_probe(struct regmap regmap, int irq, const char name, · 253 unmodified lines
1130	if (chip_type == INV_ICM20602) {	1171	if (chip_type == INV_ICM20602) {
1131	indio_dev->channels = inv_icm20602_channels;	1172	indio_dev->channels = inv_icm20602_channels;
1132	indio_dev->num_channels = ARRAY_SIZE(inv_icm20602_channels);	1173	indio_dev->num_channels = ARRAY_SIZE(inv_icm20602_channels);
		1174	indio_dev->available_scan_masks = inv_icm20602_scan_masks;
1133	} else {	1175	} else {
1134	indio_dev->channels = inv_mpu_channels;	1176	indio_dev->channels = inv_mpu_channels;
1135	indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);	1177	indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
		1178	indio_dev->available_scan_masks = inv_mpu_scan_masks;
1136	}	1179	}
1137		1180
1138	indio_dev->info = &mpu_info;	1181	indio_dev->info = &mpu_info;

drivers/infiniband/core/core_priv.h+4−1

 					  struct ib_udata *udata,
 					  struct ib_uobject *uobj)
 {
+	enum ib_qp_type qp_type = attr->qp_type;
 	struct ib_qp *qp;
+	bool is_xrc;
 	if (!dev->ops.create_qp)
 		return ERR_PTR(-EOPNOTSUPP);
 	 * and more importantly they are created internaly by driver,
 	 * see mlx5 create_dev_resources() as an example.
 	 */
-	if (attr->qp_type < IB_QPT_XRC_INI) {
+	is_xrc = qp_type == IB_QPT_XRC_INI || qp_type == IB_QPT_XRC_TGT;
+	if ((qp_type < IB_QPT_MAX && !is_xrc) || qp_type == IB_QPT_DRIVER) {
 		qp->res.type = RDMA_RESTRACK_QP;
 		if (uobj)
 			rdma_restrack_uadd(&qp->res);

drivers/infiniband/core/counters.c+7−4

 	u64 sum;
 	port_counter = &dev->port_data[port].port_counter;
+	if (!port_counter->hstats)
+		return 0;
 	sum = get_running_counters_hwstat_sum(dev, port, index);
 	sum += port_counter->hstats->value[index];
 	struct rdma_port_counter *port_counter;
 	u32 port;
-	if (!dev->ops.alloc_hw_stats || !dev->port_data)
+	if (!dev->port_data)
 		return;
 	rdma_for_each_port(dev, port) {
 		port_counter->mode.mode = RDMA_COUNTER_MODE_NONE;
 		mutex_init(&port_counter->lock);
+		if (!dev->ops.alloc_hw_stats)
+			continue;
 		port_counter->hstats = dev->ops.alloc_hw_stats(dev, port);
 		if (!port_counter->hstats)
 			goto fail;
 	struct rdma_port_counter *port_counter;
 	u32 port;
-	if (!dev->ops.alloc_hw_stats)
-		return;
 	rdma_for_each_port(dev, port) {
 		port_counter = &dev->port_data[port].port_counter;
 		kfree(port_counter->hstats);

drivers/infiniband/core/device.c+68−34

@@ -94,11 +94,17 @@ static DEFINE_XARRAY_FLAGS(devices, XA_FLAGS_ALLOC); · 93 unmodified lines
94	static DECLARE_RWSEM(devices_rwsem);	94	static DECLARE_RWSEM(devices_rwsem);
95	#define DEVICE_REGISTERED XA_MARK_1	95	#define DEVICE_REGISTERED XA_MARK_1
96		96
97	static LIST_HEAD(client_list);	97	static u32 highest_client_id;
98	#define CLIENT_REGISTERED XA_MARK_1	98	#define CLIENT_REGISTERED XA_MARK_1
99	static DEFINE_XARRAY_FLAGS(clients, XA_FLAGS_ALLOC);	99	static DEFINE_XARRAY_FLAGS(clients, XA_FLAGS_ALLOC);
100	static DECLARE_RWSEM(clients_rwsem);	100	static DECLARE_RWSEM(clients_rwsem);
101		101
		102	static void ib_client_put(struct ib_client *client)
		103	{
		104	if (refcount_dec_and_test(&client->uses))
		105	complete(&client->uses_zero);
		106	}
		107
102	/*	108	/*
103	* If client_data is registered then the corresponding client must also still	109	* If client_data is registered then the corresponding client must also still
104	* be registered.	110	* be registered.
@@ -660,6 +666,14 @@ static int add_client_context(struct ib_device *device, · 555 unmodified lines
660	return 0;	666	return 0;
661		667
662	down_write(&device->client_data_rwsem);	668	down_write(&device->client_data_rwsem);
		669	/*
		670	* So long as the client is registered hold both the client and device
		671	* unregistration locks.
		672	*/
		673	if (!refcount_inc_not_zero(&client->uses))
		674	goto out_unlock;
		675	refcount_inc(&device->refcount);
		676
663	/*	677	/*
664	* Another caller to add_client_context got here first and has already	678	* Another caller to add_client_context got here first and has already
665	* completely initialized context.	679	* completely initialized context.
@@ -683,6 +697,9 @@ static int add_client_context(struct ib_device *device, · 17 unmodified lines
683	return 0;	697	return 0;
684		698
685	out:	699	out:
		700	ib_device_put(device);
		701	ib_client_put(client);
		702	out_unlock:
686	up_write(&device->client_data_rwsem);	703	up_write(&device->client_data_rwsem);
687	return ret;	704	return ret;
688	}	705	}
@@ -702,7 +719,7 @@ static void remove_client_context(struct ib_device *device, · 13 unmodified lines
702	client_data = xa_load(&device->client_data, client_id);	719	client_data = xa_load(&device->client_data, client_id);
703	xa_clear_mark(&device->client_data, client_id, CLIENT_DATA_REGISTERED);	720	xa_clear_mark(&device->client_data, client_id, CLIENT_DATA_REGISTERED);
704	client = xa_load(&clients, client_id);	721	client = xa_load(&clients, client_id);
705	downgrade_write(&device->client_data_rwsem);	722	up_write(&device->client_data_rwsem);
706		723
707	/*	724	/*
708	* Notice we cannot be holding any exclusive locks when calling the	725	* Notice we cannot be holding any exclusive locks when calling the
@@ -712,17 +729,13 @@ static void remove_client_context(struct ib_device *device, · 3 unmodified lines
712	*	729	*
713	* For this reason clients and drivers should not call the	730	* For this reason clients and drivers should not call the
714	* unregistration functions will holdling any locks.	731	* unregistration functions will holdling any locks.
715	*
716	* It tempting to drop the client_data_rwsem too, but this is required
717	* to ensure that unregister_client does not return until all clients
718	* are completely unregistered, which is required to avoid module
719	* unloading races.
720	*/	732	*/
721	if (client->remove)	733	if (client->remove)
722	client->remove(device, client_data);	734	client->remove(device, client_data);
723		735
724	xa_erase(&device->client_data, client_id);	736	xa_erase(&device->client_data, client_id);
725	up_read(&device->client_data_rwsem);	737	ib_device_put(device);
		738	ib_client_put(client);
726	}	739	}
727		740
728	static int alloc_port_data(struct ib_device *device)	741	static int alloc_port_data(struct ib_device *device)
@@ -1224,7 +1237,7 @@ static int setup_device(struct ib_device *device) · 495 unmodified lines
1224		1237
1225	static void disable_device(struct ib_device *device)	1238	static void disable_device(struct ib_device *device)
1226	{	1239	{
1227	struct ib_client *client;	1240	u32 cid;
1228		1241
1229	WARN_ON(!refcount_read(&device->refcount));	1242	WARN_ON(!refcount_read(&device->refcount));
1230		1243
@@ -1232,10 +1245,19 @@ static void disable_device(struct ib_device *device) · 1 unmodified line
1232	xa_clear_mark(&devices, device->index, DEVICE_REGISTERED);	1245	xa_clear_mark(&devices, device->index, DEVICE_REGISTERED);
1233	up_write(&devices_rwsem);	1246	up_write(&devices_rwsem);
1234		1247
		1248	/*
		1249	* Remove clients in LIFO order, see assign_client_id. This could be
		1250	* more efficient if xarray learns to reverse iterate. Since no new
		1251	* clients can be added to this ib_device past this point we only need
		1252	* the maximum possible client_id value here.
		1253	*/
1235	down_read(&clients_rwsem);	1254	down_read(&clients_rwsem);
1236	list_for_each_entry_reverse(client, &client_list, list)	1255	cid = highest_client_id;
1237	remove_client_context(device, client->client_id);
1238	up_read(&clients_rwsem);	1256	up_read(&clients_rwsem);
		1257	while (cid) {
		1258	cid--;
		1259	remove_client_context(device, cid);
		1260	}
1239		1261
1240	/* Pairs with refcount_set in enable_device */	1262	/* Pairs with refcount_set in enable_device */
1241	ib_device_put(device);	1263	ib_device_put(device);
@@ -1662,30 +1684,31 @@ static int assign_client_id(struct ib_client *client) · 420 unmodified lines
1662	/*	1684	/*
1663	* The add/remove callbacks must be called in FIFO/LIFO order. To	1685	* The add/remove callbacks must be called in FIFO/LIFO order. To
1664	* achieve this we assign client_ids so they are sorted in	1686	* achieve this we assign client_ids so they are sorted in
1665	* registration order, and retain a linked list we can reverse iterate	1687	* registration order.
1666	* to get the LIFO order. The extra linked list can go away if xarray
1667	* learns to reverse iterate.
1668	*/	1688	*/
1669	if (list_empty(&client_list)) {	1689	client->client_id = highest_client_id;
1670	client->client_id = 0;
1671	} else {
1672	struct ib_client *last;
1673
1674	last = list_last_entry(&client_list, struct ib_client, list);
1675	client->client_id = last->client_id + 1;
1676	}
1677	ret = xa_insert(&clients, client->client_id, client, GFP_KERNEL);	1690	ret = xa_insert(&clients, client->client_id, client, GFP_KERNEL);
1678	if (ret)	1691	if (ret)
1679	goto out;	1692	goto out;
1680		1693
		1694	highest_client_id++;
1681	xa_set_mark(&clients, client->client_id, CLIENT_REGISTERED);	1695	xa_set_mark(&clients, client->client_id, CLIENT_REGISTERED);
1682	list_add_tail(&client->list, &client_list);
1683		1696
1684	out:	1697	out:
1685	up_write(&clients_rwsem);	1698	up_write(&clients_rwsem);
1686	return ret;	1699	return ret;
1687	}	1700	}
1688		1701
		1702	static void remove_client_id(struct ib_client *client)
		1703	{
		1704	down_write(&clients_rwsem);
		1705	xa_erase(&clients, client->client_id);
		1706	for (; highest_client_id; highest_client_id--)
		1707	if (xa_load(&clients, highest_client_id - 1))
		1708	break;
		1709	up_write(&clients_rwsem);
		1710	}
		1711
1689	/**	1712	/**
1690	* ib_register_client - Register an IB client	1713	* ib_register_client - Register an IB client
1691	* @client:Client to register	1714	* @client:Client to register
@@ -1705,6 +1728,8 @@ int ib_register_client(struct ib_client *client) · 13 unmodified lines
1705	unsigned long index;	1728	unsigned long index;
1706	int ret;	1729	int ret;
1707		1730
		1731	refcount_set(&client->uses, 1);
		1732	init_completion(&client->uses_zero);
1708	ret = assign_client_id(client);	1733	ret = assign_client_id(client);
1709	if (ret)	1734	if (ret)
1710	return ret;	1735	return ret;
@@ -1740,21 +1765,30 @@ void ib_unregister_client(struct ib_client *client) · 29 unmodified lines
1740	unsigned long index;	1765	unsigned long index;
1741		1766
1742	down_write(&clients_rwsem);	1767	down_write(&clients_rwsem);
		1768	ib_client_put(client);
1743	xa_clear_mark(&clients, client->client_id, CLIENT_REGISTERED);	1769	xa_clear_mark(&clients, client->client_id, CLIENT_REGISTERED);
1744	up_write(&clients_rwsem);	1770	up_write(&clients_rwsem);
1745	/*	1771
1746	* Every device still known must be serialized to make sure we are	1772	/* We do not want to have locks while calling client->remove() */
1747	* done with the client callbacks before we return.	1773	rcu_read_lock();
1748	*/	1774	xa_for_each (&devices, index, device) {
1749	down_read(&devices_rwsem);	1775	if (!ib_device_try_get(device))
1750	xa_for_each (&devices, index, device)	1776	continue;
		1777	rcu_read_unlock();
		1778
1751	remove_client_context(device, client->client_id);	1779	remove_client_context(device, client->client_id);
1752	up_read(&devices_rwsem);
1753		1780
1754	down_write(&clients_rwsem);	1781	ib_device_put(device);
1755	list_del(&client->list);	1782	rcu_read_lock();
1756	xa_erase(&clients, client->client_id);	1783	}
1757	up_write(&clients_rwsem);	1784	rcu_read_unlock();
		1785
		1786	/*
		1787	* remove_client_context() is not a fence, it can return even though a
		1788	* removal is ongoing. Wait until all removals are completed.
		1789	*/
		1790	wait_for_completion(&client->uses_zero);
		1791	remove_client_id(client);
1758	}	1792	}
1759	EXPORT_SYMBOL(ib_unregister_client);	1793	EXPORT_SYMBOL(ib_unregister_client);
1760		1794

drivers/infiniband/core/mad.c+10−10

 	if (has_smi)
 		cq_size *= 2;
+	port_priv->pd = ib_alloc_pd(device, 0);
+	if (IS_ERR(port_priv->pd)) {
+		dev_err(&device->dev, "Couldn't create ib_mad PD\n");
+		ret = PTR_ERR(port_priv->pd);
+		goto error3;
+	}
 	port_priv->cq = ib_alloc_cq(port_priv->device, port_priv, cq_size, 0,
 			IB_POLL_UNBOUND_WORKQUEUE);
 	if (IS_ERR(port_priv->cq)) {
 		dev_err(&device->dev, "Couldn't create ib_mad CQ\n");
 		ret = PTR_ERR(port_priv->cq);
-		goto error3;
-	}
-	port_priv->pd = ib_alloc_pd(device, 0);
-	if (IS_ERR(port_priv->pd)) {
-		dev_err(&device->dev, "Couldn't create ib_mad PD\n");
-		ret = PTR_ERR(port_priv->pd);
 		goto error4;
 	}
 error7:
 	destroy_mad_qp(&port_priv->qp_info[0]);
 error6:
-	ib_dealloc_pd(port_priv->pd);
-error4:
 	ib_free_cq(port_priv->cq);
 	cleanup_recv_queue(&port_priv->qp_info[1]);
 	cleanup_recv_queue(&port_priv->qp_info[0]);
+error4:
+	ib_dealloc_pd(port_priv->pd);
 error3:
 	kfree(port_priv);
 	destroy_workqueue(port_priv->wq);
 	destroy_mad_qp(&port_priv->qp_info[1]);
 	destroy_mad_qp(&port_priv->qp_info[0]);
-	ib_dealloc_pd(port_priv->pd);
 	ib_free_cq(port_priv->cq);
+	ib_dealloc_pd(port_priv->pd);
 	cleanup_recv_queue(&port_priv->qp_info[1]);
 	cleanup_recv_queue(&port_priv->qp_info[0]);
 	/* XXX: Handle deallocation of MAD registration tables */

drivers/infiniband/core/user_mad.c+5−1

 #include <linux/sched.h>
 #include <linux/semaphore.h>
 #include <linux/slab.h>
+#include <linux/nospec.h>
 #include <linux/uaccess.h>
 	if (get_user(id, arg))
 		return -EFAULT;
+	if (id >= IB_UMAD_MAX_AGENTS)
+		return -EINVAL;
 	mutex_lock(&file->port->file_mutex);
 	mutex_lock(&file->mutex);
-	if (id >= IB_UMAD_MAX_AGENTS || !__get_agent(file, id)) {
+	id = array_index_nospec(id, IB_UMAD_MAX_AGENTS);
+	if (!__get_agent(file, id)) {
 		ret = -EINVAL;
 		goto out;
 	}

drivers/infiniband/hw/bnxt_re/ib_verbs.c+5−2

 	struct bnxt_re_dev *rdev = to_bnxt_re_dev(attr->device, ibdev);
 	struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl;
 	struct bnxt_qplib_gid *gid_to_del;
+	u16 vlan_id = 0xFFFF;
 	/* Delete the entry from the hardware */
 	ctx = *context;
 	if (sgid_tbl && sgid_tbl->active) {
 		if (ctx->idx >= sgid_tbl->max)
 			return -EINVAL;
-		gid_to_del = &sgid_tbl->tbl[ctx->idx];
+		gid_to_del = &sgid_tbl->tbl[ctx->idx].gid;
+		vlan_id = sgid_tbl->tbl[ctx->idx].vlan_id;
 		/* DEL_GID is called in WQ context(netdevice_event_work_handler)
 		 * or via the ib_unregister_device path. In the former case QP1
 		 * may not be destroyed yet, in which case just return as FW
 		}
 		ctx->refcnt--;
 		if (!ctx->refcnt) {
-			rc = bnxt_qplib_del_sgid(sgid_tbl, gid_to_del, true);
+			rc = bnxt_qplib_del_sgid(sgid_tbl, gid_to_del,
+						 vlan_id,  true);
 			if (rc) {
 				dev_err(rdev_to_dev(rdev),
 					"Failed to remove GID: %#x", rc);

drivers/infiniband/hw/bnxt_re/qplib_res.c+9−4

 				     struct bnxt_qplib_sgid_tbl *sgid_tbl,
 				     u16 max)
 {
-	sgid_tbl->tbl = kcalloc(max, sizeof(struct bnxt_qplib_gid), GFP_KERNEL);
+	sgid_tbl->tbl = kcalloc(max, sizeof(*sgid_tbl->tbl), GFP_KERNEL);
 	if (!sgid_tbl->tbl)
 		return -ENOMEM;
 	for (i = 0; i < sgid_tbl->max; i++) {
 		if (memcmp(&sgid_tbl->tbl[i], &bnxt_qplib_gid_zero,
 			   sizeof(bnxt_qplib_gid_zero)))
-			bnxt_qplib_del_sgid(sgid_tbl, &sgid_tbl->tbl[i], true);
+			bnxt_qplib_del_sgid(sgid_tbl, &sgid_tbl->tbl[i].gid,
+					    sgid_tbl->tbl[i].vlan_id, true);
 	}
-	memset(sgid_tbl->tbl, 0, sizeof(struct bnxt_qplib_gid) * sgid_tbl->max);
+	memset(sgid_tbl->tbl, 0, sizeof(*sgid_tbl->tbl) * sgid_tbl->max);
 	memset(sgid_tbl->hw_id, -1, sizeof(u16) * sgid_tbl->max);
 	memset(sgid_tbl->vlan, 0, sizeof(u8) * sgid_tbl->max);
 	sgid_tbl->active = 0;
 static void bnxt_qplib_init_sgid_tbl(struct bnxt_qplib_sgid_tbl *sgid_tbl,
 				     struct net_device *netdev)
 {
-	memset(sgid_tbl->tbl, 0, sizeof(struct bnxt_qplib_gid) * sgid_tbl->max);
+	u32 i;
+	for (i = 0; i < sgid_tbl->max; i++)
+		sgid_tbl->tbl[i].vlan_id = 0xffff;
 	memset(sgid_tbl->hw_id, -1, sizeof(u16) * sgid_tbl->max);
 }

drivers/infiniband/hw/bnxt_re/qplib_res.h+1−1

@@ -111,7 +111,7 @@ struct bnxt_qplib_pd_tbl { · 110 unmodified lines
111	};	111	};
112		112
113	struct bnxt_qplib_sgid_tbl {	113	struct bnxt_qplib_sgid_tbl {
114	struct bnxt_qplib_gid *tbl;	114	struct bnxt_qplib_gid_info *tbl;
115	u16 *hw_id;	115	u16 *hw_id;
116	u16 max;	116	u16 max;
117	u16 active;	117	u16 active;

drivers/infiniband/hw/bnxt_re/qplib_sp.c+9−5

 			index, sgid_tbl->max);
 		return -EINVAL;
 	}
-	memcpy(gid, &sgid_tbl->tbl[index], sizeof(*gid));
+	memcpy(gid, &sgid_tbl->tbl[index].gid, sizeof(*gid));
 	return 0;
 }
 int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
-			struct bnxt_qplib_gid *gid, bool update)
+			struct bnxt_qplib_gid *gid, u16 vlan_id, bool update)
 {
 	struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl,
 						   struct bnxt_qplib_res,
 		return -ENOMEM;
 	}
 	for (index = 0; index < sgid_tbl->max; index++) {
-		if (!memcmp(&sgid_tbl->tbl[index], gid, sizeof(*gid)))
+		if (!memcmp(&sgid_tbl->tbl[index].gid, gid, sizeof(*gid)) &&
+		    vlan_id == sgid_tbl->tbl[index].vlan_id)
 			break;
 	}
 	if (index == sgid_tbl->max) {
 		if (rc)
 			return rc;
 	}
-	memcpy(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero,
+	memcpy(&sgid_tbl->tbl[index].gid, &bnxt_qplib_gid_zero,
 	       sizeof(bnxt_qplib_gid_zero));
+	sgid_tbl->tbl[index].vlan_id = 0xFFFF;
 	sgid_tbl->vlan[index] = 0;
 	sgid_tbl->active--;
 	dev_dbg(&res->pdev->dev,
 	}
 	free_idx = sgid_tbl->max;
 	for (i = 0; i < sgid_tbl->max; i++) {
-		if (!memcmp(&sgid_tbl->tbl[i], gid, sizeof(*gid))) {
+		if (!memcmp(&sgid_tbl->tbl[i], gid, sizeof(*gid)) &&
+		    sgid_tbl->tbl[i].vlan_id == vlan_id) {
 			dev_dbg(&res->pdev->dev,
 				"SGID entry already exist in entry %d!\n", i);
 			*index = i;
 	}
 	/* Add GID to the sgid_tbl */
 	memcpy(&sgid_tbl->tbl[free_idx], gid, sizeof(*gid));
+	sgid_tbl->tbl[free_idx].vlan_id = vlan_id;
 	sgid_tbl->active++;
 	if (vlan_id != 0xFFFF)
 		sgid_tbl->vlan[free_idx] = 1;

drivers/infiniband/hw/bnxt_re/qplib_sp.h+6−1

 	u8				data[16];
 };
+struct bnxt_qplib_gid_info {
+	struct bnxt_qplib_gid gid;
+	u16 vlan_id;
+};
 struct bnxt_qplib_ah {
 	struct bnxt_qplib_gid		dgid;
 	struct bnxt_qplib_pd		*pd;
 			struct bnxt_qplib_sgid_tbl *sgid_tbl, int index,
 			struct bnxt_qplib_gid *gid);
 int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
-			struct bnxt_qplib_gid *gid, bool update);
+			struct bnxt_qplib_gid *gid, u16 vlan_id, bool update);
 int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl,
 			struct bnxt_qplib_gid *gid, u8 *mac, u16 vlan_id,
 			bool update, u32 *index);

drivers/infiniband/hw/hfi1/chip.c+9−2

 		clear_rcvctrl(dd, RCV_CTRL_RCV_RSM_ENABLE_SMASK);
 }
-static void init_rxe(struct hfi1_devdata *dd)
+static int init_rxe(struct hfi1_devdata *dd)
 {
 	struct rsm_map_table *rmt;
 	u64 val;
 	write_csr(dd, RCV_ERR_MASK, ~0ull);
 	rmt = alloc_rsm_map_table(dd);
+	if (!rmt)
+		return -ENOMEM;
 	/* set up QOS, including the QPN map table */
 	init_qos(dd, rmt);
 	init_fecn_handling(dd, rmt);
 	val |= ((4ull & RCV_BYPASS_HDR_SIZE_MASK) <<
 		RCV_BYPASS_HDR_SIZE_SHIFT);
 	write_csr(dd, RCV_BYPASS, val);
+	return 0;
 }
 static void init_other(struct hfi1_devdata *dd)
 		goto bail_cleanup;
 	/* set initial RXE CSRs */
-	init_rxe(dd);
+	ret = init_rxe(dd);
+	if (ret)
+		goto bail_cleanup;
 	/* set initial TXE CSRs */
 	init_txe(dd);
 	/* set initial non-RXE, non-TXE CSRs */

drivers/infiniband/hw/hfi1/rc.c+0−2

 		    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
 			break;
 		trdma_clean_swqe(qp, wqe);
-		rvt_qp_wqe_unreserve(qp, wqe);
 		trace_hfi1_qp_send_completion(qp, wqe, qp->s_last);
 		rvt_qp_complete_swqe(qp,
 				     wqe,
 	if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
 	    cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
 		trdma_clean_swqe(qp, wqe);
-		rvt_qp_wqe_unreserve(qp, wqe);
 		trace_hfi1_qp_send_completion(qp, wqe, qp->s_last);
 		rvt_qp_complete_swqe(qp,
 				     wqe,

drivers/infiniband/hw/hfi1/tid_rdma.c+2−41

@@ -1620,6 +1620,7 @@ static int hfi1_kern_exp_rcv_alloc_flows(struct tid_rdma_request *req, · 1619 unmodified lines
1620	flows[i].req = req;	1620	flows[i].req = req;
1621	flows[i].npagesets = 0;	1621	flows[i].npagesets = 0;
1622	flows[i].pagesets[0].mapped = 0;	1622	flows[i].pagesets[0].mapped = 0;
		1623	flows[i].resync_npkts = 0;
1623	}	1624	}
1624	req->flows = flows;	1625	req->flows = flows;
1625	return 0;	1626	return 0;
@@ -1673,34 +1674,6 @@ static struct tid_rdma_flow find_flow_ib(struct tid_rdma_request req, · 47 unmodified lines
1673	return NULL;	1674	return NULL;
1674	}	1675	}
1675		1676
1676	static struct tid_rdma_flow *
1677	__find_flow_ranged(struct tid_rdma_request *req, u16 head, u16 tail,
1678	u32 psn, u16 *fidx)
1679	{
1680	for ( ; CIRC_CNT(head, tail, MAX_FLOWS);
1681	tail = CIRC_NEXT(tail, MAX_FLOWS)) {
1682	struct tid_rdma_flow *flow = &req->flows[tail];
1683	u32 spsn, lpsn;
1684
1685	spsn = full_flow_psn(flow, flow->flow_state.spsn);
1686	lpsn = full_flow_psn(flow, flow->flow_state.lpsn);
1687
1688	if (cmp_psn(psn, spsn) >= 0 && cmp_psn(psn, lpsn) <= 0) {
1689	if (fidx)
1690	*fidx = tail;
1691	return flow;
1692	}
1693	}
1694	return NULL;
1695	}
1696
1697	static struct tid_rdma_flow find_flow(struct tid_rdma_request req,
1698	u32 psn, u16 *fidx)
1699	{
1700	return __find_flow_ranged(req, req->setup_head, req->clear_tail, psn,
1701	fidx);
1702	}
1703
1704	/* TID RDMA READ functions */	1677	/* TID RDMA READ functions */
1705	u32 hfi1_build_tid_rdma_read_packet(struct rvt_swqe *wqe,	1678	u32 hfi1_build_tid_rdma_read_packet(struct rvt_swqe *wqe,
1706	struct ib_other_headers ohdr, u32 bth1,	1679	struct ib_other_headers ohdr, u32 bth1,
@@ -2788,19 +2761,7 @@ static bool handle_read_kdeth_eflags(struct hfi1_ctxtdata *rcd, · 1081 unmodified lines
2788	* to prevent continuous Flow Sequence errors for any	2761	* to prevent continuous Flow Sequence errors for any
2789	* packets that could be still in the fabric.	2762	* packets that could be still in the fabric.
2790	*/	2763	*/
2791	flow = find_flow(req, psn, NULL);	2764	flow = &req->flows[req->clear_tail];
2792	if (!flow) {
2793	/*
2794	* We can't find the IB PSN matching the
2795	* received KDETH PSN. The only thing we can
2796	* do at this point is report the error to
2797	* the QP.
2798	*/
2799	hfi1_kern_read_tid_flow_free(qp);
2800	spin_unlock(&qp->s_lock);
2801	rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2802	return ret;
2803	}
2804	if (priv->s_flags & HFI1_R_TID_SW_PSN) {	2765	if (priv->s_flags & HFI1_R_TID_SW_PSN) {
2805	diff = cmp_psn(psn,	2766	diff = cmp_psn(psn,
2806	flow->flow_state.r_next_psn);	2767	flow->flow_state.r_next_psn);

drivers/infiniband/hw/hfi1/verbs.c+2−0

 #include <linux/mm.h>
 #include <linux/vmalloc.h>
 #include <rdma/opa_addr.h>
+#include <linux/nospec.h>
 #include "hfi.h"
 #include "common.h"
 	sl = rdma_ah_get_sl(ah_attr);
 	if (sl >= ARRAY_SIZE(ibp->sl_to_sc))
 		return -EINVAL;
+	sl = array_index_nospec(sl, ARRAY_SIZE(ibp->sl_to_sc));
 	sc5 = ibp->sl_to_sc[sl];
 	if (sc_to_vlt(dd, sc5) > num_vls && sc_to_vlt(dd, sc5) != 0xf)

drivers/infiniband/hw/hns/Kconfig+3−3

@@ -1,6 +1,6 @@
1	# SPDX-License-Identifier: GPL-2.0-only	1	# SPDX-License-Identifier: GPL-2.0-only
2	config INFINIBAND_HNS	2	config INFINIBAND_HNS
3	tristate "HNS RoCE Driver"	3	bool "HNS RoCE Driver"
4	depends on NET_VENDOR_HISILICON	4	depends on NET_VENDOR_HISILICON
5	depends on ARM64 \|\| (COMPILE_TEST && 64BIT)	5	depends on ARM64 \|\| (COMPILE_TEST && 64BIT)
6	---help---	6	---help---
@@ -11,7 +11,7 @@ config INFINIBAND_HNS · 4 unmodified lines
11	To compile HIP06 or HIP08 driver as module, choose M here.	11	To compile HIP06 or HIP08 driver as module, choose M here.
12		12
13	config INFINIBAND_HNS_HIP06	13	config INFINIBAND_HNS_HIP06
14	bool "Hisilicon Hip06 Family RoCE support"	14	tristate "Hisilicon Hip06 Family RoCE support"
15	depends on INFINIBAND_HNS && HNS && HNS_DSAF && HNS_ENET	15	depends on INFINIBAND_HNS && HNS && HNS_DSAF && HNS_ENET
16	---help---	16	---help---
17	RoCE driver support for Hisilicon RoCE engine in Hisilicon Hip06 and	17	RoCE driver support for Hisilicon RoCE engine in Hisilicon Hip06 and
@@ -21,7 +21,7 @@ config INFINIBAND_HNS_HIP06 · 3 unmodified lines
21	module will be called hns-roce-hw-v1	21	module will be called hns-roce-hw-v1
22		22
23	config INFINIBAND_HNS_HIP08	23	config INFINIBAND_HNS_HIP08
24	bool "Hisilicon Hip08 Family RoCE support"	24	tristate "Hisilicon Hip08 Family RoCE support"
25	depends on INFINIBAND_HNS && PCI && HNS3	25	depends on INFINIBAND_HNS && PCI && HNS3
26	---help---	26	---help---
27	RoCE driver support for Hisilicon RoCE engine in Hisilicon Hip08 SoC.	27	RoCE driver support for Hisilicon RoCE engine in Hisilicon Hip08 SoC.

drivers/infiniband/hw/hns/Makefile+2−6

 	hns_roce_ah.o hns_roce_hem.o hns_roce_mr.o hns_roce_qp.o \
 	hns_roce_cq.o hns_roce_alloc.o hns_roce_db.o hns_roce_srq.o hns_roce_restrack.o
-ifdef CONFIG_INFINIBAND_HNS_HIP06
 hns-roce-hw-v1-objs := hns_roce_hw_v1.o $(hns-roce-objs)
-obj-$(CONFIG_INFINIBAND_HNS) += hns-roce-hw-v1.o
+obj-$(CONFIG_INFINIBAND_HNS_HIP06) += hns-roce-hw-v1.o
-endif
-ifdef CONFIG_INFINIBAND_HNS_HIP08
 hns-roce-hw-v2-objs := hns_roce_hw_v2.o hns_roce_hw_v2_dfx.o $(hns-roce-objs)
-obj-$(CONFIG_INFINIBAND_HNS) += hns-roce-hw-v2.o
+obj-$(CONFIG_INFINIBAND_HNS_HIP08) += hns-roce-hw-v2.o
-endif

drivers/infiniband/hw/hns/hns_roce_db.c+8−7

 			 struct ib_udata *udata, unsigned long virt,
 			 struct hns_roce_db *db)
 {
+	unsigned long page_addr = virt & PAGE_MASK;
 	struct hns_roce_user_db_page *page;
+	unsigned int offset;
 	int ret = 0;
 	mutex_lock(&context->page_mutex);
 	list_for_each_entry(page, &context->page_list, list)
-		if (page->user_virt == (virt & PAGE_MASK))
+		if (page->user_virt == page_addr)
 			goto found;
 	page = kmalloc(sizeof(*page), GFP_KERNEL);
 	}
 	refcount_set(&page->refcount, 1);
-	page->user_virt = (virt & PAGE_MASK);
+	page->user_virt = page_addr;
-	page->umem = ib_umem_get(udata, virt & PAGE_MASK, PAGE_SIZE, 0, 0);
+	page->umem = ib_umem_get(udata, page_addr, PAGE_SIZE, 0, 0);
 	if (IS_ERR(page->umem)) {
 		ret = PTR_ERR(page->umem);
 		kfree(page);
 	list_add(&page->list, &context->page_list);
 found:
-	db->dma = sg_dma_address(page->umem->sg_head.sgl) +
+	offset = virt - page_addr;
-		  (virt & ~PAGE_MASK);
+	db->dma = sg_dma_address(page->umem->sg_head.sgl) + offset;
-	page->umem->sg_head.sgl->offset = virt & ~PAGE_MASK;
+	db->virt_addr = sg_virt(page->umem->sg_head.sgl) + offset;
-	db->virt_addr = sg_virt(page->umem->sg_head.sgl);
 	db->u.user_page = page;
 	refcount_inc(&page->refcount);

drivers/infiniband/hw/hns/hns_roce_hw_v1.c+3−1

 	atomic_set(&free_mr->mr_free_cq->ib_cq.usecnt, 0);
 	pd = rdma_zalloc_drv_obj(ibdev, ib_pd);
-	if (!pd)
+	if (!pd) {
+		ret = -ENOMEM;
 		goto alloc_mem_failed;
+	}
 	pd->device  = ibdev;
 	ret = hns_roce_alloc_pd(pd, NULL);

drivers/infiniband/hw/mlx5/main.c+3−4

 		return;
 	}
-	if (mpi->mdev_events.notifier_call)
-		mlx5_notifier_unregister(mpi->mdev, &mpi->mdev_events);
-	mpi->mdev_events.notifier_call = NULL;
 	mpi->ibdev = NULL;
 	spin_unlock(&port->mp.mpi_lock);
+	if (mpi->mdev_events.notifier_call)
+		mlx5_notifier_unregister(mpi->mdev, &mpi->mdev_events);
+	mpi->mdev_events.notifier_call = NULL;
 	mlx5_remove_netdev_notifier(ibdev, port_num);
 	spin_lock(&port->mp.mpi_lock);

drivers/infiniband/hw/mlx5/mlx5_ib.h+1−0

@@ -481,6 +481,7 @@ struct mlx5_umr_wr { · 480 unmodified lines
481	u64 length;	481	u64 length;
482	int access_flags;	482	int access_flags;
483	u32 mkey;	483	u32 mkey;
		484	u8 ignore_free_state:1;
484	};	485	};
485		486
486	static inline const struct mlx5_umr_wr umr_wr(const struct ib_send_wr wr)	487	static inline const struct mlx5_umr_wr umr_wr(const struct ib_send_wr wr)

drivers/infiniband/hw/mlx5/mr.c+23−27

 static void dereg_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr);
 static int mr_cache_max_order(struct mlx5_ib_dev *dev);
 static int unreg_umr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr);
-static bool umr_can_modify_entity_size(struct mlx5_ib_dev *dev)
-{
-	return !MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled);
-}
 static bool umr_can_use_indirect_mkey(struct mlx5_ib_dev *dev)
 {
 	return !MLX5_CAP_GEN(dev->mdev, umr_indirect_mkey_disabled);
 }
-static bool use_umr(struct mlx5_ib_dev *dev, int order)
-{
-	return order <= mr_cache_max_order(dev) &&
-		umr_can_modify_entity_size(dev);
-}
 static int destroy_mkey(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)
 {
 	int err = mlx5_core_destroy_mkey(dev->mdev, &mr->mmkey);
 		return;
 	c = order2idx(dev, mr->order);
-	if (c < 0 || c >= MAX_MR_CACHE_ENTRIES) {
+	WARN_ON(c < 0 || c >= MAX_MR_CACHE_ENTRIES);
-		mlx5_ib_warn(dev, "order %d, cache index %d\n", mr->order, c);
-		return;
-	}
-	if (unreg_umr(dev, mr))
+	if (unreg_umr(dev, mr)) {
+		mr->allocated_from_cache = false;
+		destroy_mkey(dev, mr);
+		ent = &cache->ent[c];
+		if (ent->cur < ent->limit)
+			queue_work(cache->wq, &ent->work);
 		return;
+	}
 	ent = &cache->ent[c];
 	spin_lock_irq(&ent->lock);
 {
 	struct mlx5_ib_dev *dev = to_mdev(pd->device);
 	struct mlx5_ib_mr *mr = NULL;
-	bool populate_mtts = false;
+	bool use_umr;
 	struct ib_umem *umem;
 	int page_shift;
 	int npages;
 	if (err < 0)
 		return ERR_PTR(err);
-	if (use_umr(dev, order)) {
+	use_umr = !MLX5_CAP_GEN(dev->mdev, umr_modify_entity_size_disabled) &&
+		  (!MLX5_CAP_GEN(dev->mdev, umr_modify_atomic_disabled) ||
+		   !MLX5_CAP_GEN(dev->mdev, atomic));
+	if (order <= mr_cache_max_order(dev) && use_umr) {
 		mr = alloc_mr_from_cache(pd, umem, virt_addr, length, ncont,
 					 page_shift, order, access_flags);
 		if (PTR_ERR(mr) == -EAGAIN) {
 			mlx5_ib_dbg(dev, "cache empty for order %d\n", order);
 			mr = NULL;
 		}
-		populate_mtts = false;
 	} else if (!MLX5_CAP_GEN(dev->mdev, umr_extended_translation_offset)) {
 		if (access_flags & IB_ACCESS_ON_DEMAND) {
 			err = -EINVAL;
 			pr_err("Got MR registration for ODP MR > 512MB, not supported for Connect-IB\n");
 			goto error;
 		}
-		populate_mtts = true;
+		use_umr = false;
 	}
 	if (!mr) {
-		if (!umr_can_modify_entity_size(dev))
-			populate_mtts = true;
 		mutex_lock(&dev->slow_path_mutex);
 		mr = reg_create(NULL, pd, virt_addr, length, umem, ncont,
-				page_shift, access_flags, populate_mtts);
+				page_shift, access_flags, !use_umr);
 		mutex_unlock(&dev->slow_path_mutex);
 	}
 	update_odp_mr(mr);
-	if (!populate_mtts) {
+	if (use_umr) {
 		int update_xlt_flags = MLX5_IB_UPD_XLT_ENABLE;
 		if (access_flags & IB_ACCESS_ON_DEMAND)
 		return 0;
 	umrwr.wr.send_flags = MLX5_IB_SEND_UMR_DISABLE_MR |
-			      MLX5_IB_SEND_UMR_FAIL_IF_FREE;
+			      MLX5_IB_SEND_UMR_UPDATE_PD_ACCESS;
 	umrwr.wr.opcode = MLX5_IB_WR_UMR;
+	umrwr.pd = dev->umrc.pd;
 	umrwr.mkey = mr->mmkey.key;
+	umrwr.ignore_free_state = 1;
 	return mlx5_ib_post_send_wait(dev, &umrwr);
 }
 		mr->sig = NULL;
 	}
-	mlx5_free_priv_descs(mr);
+	if (!allocated_from_cache) {
-	if (!allocated_from_cache)
 		destroy_mkey(dev, mr);
+		mlx5_free_priv_descs(mr);
+	}
 }
 static void dereg_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr)

drivers/infiniband/hw/mlx5/odp.c+4−3

@@ -246,7 +246,7 @@ void mlx5_ib_invalidate_range(struct ib_umem_odp *umem_odp, unsigned long start, · 245 unmodified lines
246	* overwrite the same MTTs. Concurent invalidations might race us,	246	* overwrite the same MTTs. Concurent invalidations might race us,
247	* but they will write 0s as well, so no difference in the end result.	247	* but they will write 0s as well, so no difference in the end result.
248	*/	248	*/
249		249	mutex_lock(&umem_odp->umem_mutex);
250	for (addr = start; addr < end; addr += BIT(umem_odp->page_shift)) {	250	for (addr = start; addr < end; addr += BIT(umem_odp->page_shift)) {
251	idx = (addr - ib_umem_start(umem_odp)) >> umem_odp->page_shift;	251	idx = (addr - ib_umem_start(umem_odp)) >> umem_odp->page_shift;
252	/*	252	/*
@@ -278,6 +278,7 @@ void mlx5_ib_invalidate_range(struct ib_umem_odp *umem_odp, unsigned long start, · 25 unmodified lines
278	idx - blk_start_idx + 1, 0,	278	idx - blk_start_idx + 1, 0,
279	MLX5_IB_UPD_XLT_ZAP \|	279	MLX5_IB_UPD_XLT_ZAP \|
280	MLX5_IB_UPD_XLT_ATOMIC);	280	MLX5_IB_UPD_XLT_ATOMIC);
		281	mutex_unlock(&umem_odp->umem_mutex);
281	/*	282	/*
282	* We are now sure that the device will not access the	283	* We are now sure that the device will not access the
283	* memory. We can safely unmap it, and mark it as dirty if	284	* memory. We can safely unmap it, and mark it as dirty if
@@ -1771,7 +1772,7 @@ static void mlx5_ib_prefetch_mr_work(struct work_struct *work) · 1487 unmodified lines
1771		1772
1772	num_pending_prefetch_dec(to_mdev(w->pd->device), w->sg_list,	1773	num_pending_prefetch_dec(to_mdev(w->pd->device), w->sg_list,
1773	w->num_sge, 0);	1774	w->num_sge, 0);
1774	kfree(w);	1775	kvfree(w);
1775	}	1776	}
1776		1777
1777	int mlx5_ib_advise_mr_prefetch(struct ib_pd *pd,	1778	int mlx5_ib_advise_mr_prefetch(struct ib_pd *pd,
@@ -1813,7 +1814,7 @@ int mlx5_ib_advise_mr_prefetch(struct ib_pd *pd, · 35 unmodified lines
1813	if (valid_req)	1814	if (valid_req)
1814	queue_work(system_unbound_wq, &work->work);	1815	queue_work(system_unbound_wq, &work->work);
1815	else	1816	else
1816	kfree(work);	1817	kvfree(work);
1817		1818
1818	srcu_read_unlock(&dev->mr_srcu, srcu_key);	1819	srcu_read_unlock(&dev->mr_srcu, srcu_key);
1819		1820

drivers/infiniband/hw/mlx5/qp.c+8−5

 		}
 		MLX5_SET(tirc, tirc, rx_hash_fn, MLX5_RX_HASH_FN_TOEPLITZ);
-		MLX5_SET(tirc, tirc, rx_hash_symmetric, 1);
 		memcpy(rss_key, ucmd.rx_hash_key, len);
 		break;
 	}
 	memset(umr, 0, sizeof(*umr));
-	if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE)
+	if (!umrwr->ignore_free_state) {
-		umr->flags = MLX5_UMR_CHECK_FREE; /* fail if free */
+		if (wr->send_flags & MLX5_IB_SEND_UMR_FAIL_IF_FREE)
-	else
+			 /* fail if free */
-		umr->flags = MLX5_UMR_CHECK_NOT_FREE; /* fail if not free */
+			umr->flags = MLX5_UMR_CHECK_FREE;
+		else
+			/* fail if not free */
+			umr->flags = MLX5_UMR_CHECK_NOT_FREE;
+	}
 	umr->xlt_octowords = cpu_to_be16(get_xlt_octo(umrwr->xlt_size));
 	if (wr->send_flags & MLX5_IB_SEND_UMR_UPDATE_XLT) {

drivers/infiniband/hw/qedr/main.c+8−2

 	struct qedr_dev *dev =
 		rdma_device_to_drv_device(device, struct qedr_dev, ibdev);
-	return scnprintf(buf, PAGE_SIZE, "0x%x\n", dev->pdev->vendor);
+	return scnprintf(buf, PAGE_SIZE, "0x%x\n", dev->attr.hw_ver);
 }
 static DEVICE_ATTR_RO(hw_rev);
 static ssize_t hca_type_show(struct device *device,
 			     struct device_attribute *attr, char *buf)
 {
-	return scnprintf(buf, PAGE_SIZE, "%s\n", "HCA_TYPE_TO_SET");
+	struct qedr_dev *dev =
+		rdma_device_to_drv_device(device, struct qedr_dev, ibdev);
+	return scnprintf(buf, PAGE_SIZE, "FastLinQ QL%x %s\n",
+			 dev->pdev->device,
+			 rdma_protocol_iwarp(&dev->ibdev, 1) ?
+			 "iWARP" : "RoCE");
 }
 static DEVICE_ATTR_RO(hca_type);

drivers/infiniband/sw/siw/siw_cm.c+1−2

 static void siw_cep_set_inuse(struct siw_cep *cep)
 {
 	unsigned long flags;
-	int rv;
 retry:
 	spin_lock_irqsave(&cep->lock, flags);
 	if (cep->in_use) {
 		spin_unlock_irqrestore(&cep->lock, flags);
-		rv = wait_event_interruptible(cep->waitq, !cep->in_use);
+		wait_event_interruptible(cep->waitq, !cep->in_use);
 		if (signal_pending(current))
 			flush_signals(current);
 		goto retry;

drivers/infiniband/sw/siw/siw_main.c+1−0

@@ -612,6 +612,7 @@ static __init int siw_init_module(void) · 611 unmodified lines
612		612
613	if (!siw_create_tx_threads()) {	613	if (!siw_create_tx_threads()) {
614	pr_info("siw: Could not start any TX thread\n");	614	pr_info("siw: Could not start any TX thread\n");
		615	rv = -ENOMEM;
615	goto out_error;	616	goto out_error;
616	}	617	}
617	/*	618	/*

drivers/infiniband/sw/siw/siw_qp.c+4−2

 {
 	struct siw_rx_stream *c_rx = &qp->rx_stream;
 	struct siw_iwarp_tx *c_tx = &qp->tx_ctx;
-	int size = crypto_shash_descsize(siw_crypto_shash) +
+	int size;
-			sizeof(struct shash_desc);
 	if (siw_crypto_shash == NULL)
 		return -ENOENT;
+	size = crypto_shash_descsize(siw_crypto_shash) +
+		sizeof(struct shash_desc);
 	c_tx->mpa_crc_hd = kzalloc(size, GFP_KERNEL);
 	c_rx->mpa_crc_hd = kzalloc(size, GFP_KERNEL);
 	if (!c_tx->mpa_crc_hd || !c_rx->mpa_crc_hd) {

drivers/input/joystick/iforce/iforce-usb.c+5−0

 		return -ENODEV;
 	epirq = &interface->endpoint[0].desc;
+	if (!usb_endpoint_is_int_in(epirq))
+		return -ENODEV;
 	epout = &interface->endpoint[1].desc;
+	if (!usb_endpoint_is_int_out(epout))
+		return -ENODEV;
 	iforce_usb = kzalloc(sizeof(*iforce_usb), GFP_KERNEL);
 	if (!iforce_usb)

drivers/input/keyboard/Kconfig+2−0

 	depends on ACPI && EFI
 	depends on SPI
 	depends on X86 || COMPILE_TEST
+	depends on LEDS_CLASS
+	select CRC16
 	help
 	  Say Y here if you are running Linux on any Apple MacBook8,1 or later,
 	  or any MacBookPro13,* or MacBookPro14,*.

drivers/input/keyboard/applespi.c+16−13

  * struct tp_finger - single trackpad finger structure, le16-aligned
  *
  * @origin:		zero when switching track finger
- * @abs_x:		absolute x coodinate
+ * @abs_x:		absolute x coordinate
- * @abs_y:		absolute y coodinate
+ * @abs_y:		absolute y coordinate
- * @rel_x:		relative x coodinate
+ * @rel_x:		relative x coordinate
- * @rel_y:		relative y coodinate
+ * @rel_y:		relative y coordinate
  * @tool_major:		tool area, major axis
  * @tool_minor:		tool area, minor axis
  * @orientation:	16384 when point, else 15 bit angle
 static void applespi_debug_update_dimensions(struct applespi_data *applespi,
 					     const struct tp_finger *f)
 {
-	applespi->tp_dim_min_x = min_t(int, applespi->tp_dim_min_x, f->abs_x);
+	applespi->tp_dim_min_x = min(applespi->tp_dim_min_x,
-	applespi->tp_dim_max_x = max_t(int, applespi->tp_dim_max_x, f->abs_x);
+				     le16_to_int(f->abs_x));
-	applespi->tp_dim_min_y = min_t(int, applespi->tp_dim_min_y, f->abs_y);
+	applespi->tp_dim_max_x = max(applespi->tp_dim_max_x,
-	applespi->tp_dim_max_y = max_t(int, applespi->tp_dim_max_y, f->abs_y);
+				     le16_to_int(f->abs_x));
+	applespi->tp_dim_min_y = min(applespi->tp_dim_min_y,
+				     le16_to_int(f->abs_y));
+	applespi->tp_dim_max_y = max(applespi->tp_dim_max_y,
+				     le16_to_int(f->abs_y));
 }
 static int applespi_tp_dim_open(struct inode *inode, struct file *file)
 		size_t tp_len;
 		tp = &message->touchpad;
-		tp_len = sizeof(*tp) +
+		tp_len = struct_size(tp, fingers, tp->number_of_fingers);
-			 tp->number_of_fingers * sizeof(tp->fingers[0]);
 		if (le16_to_cpu(message->length) + 2 != tp_len) {
 			dev_warn_ratelimited(&applespi->spi->dev,
 	efi_attr = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS |
 		   EFI_VARIABLE_RUNTIME_ACCESS;
-	sts = efivar_entry_set_safe(EFI_BL_LEVEL_NAME, efi_guid, efi_attr, true,
+	sts = efivar_entry_set_safe((efi_char16_t *)EFI_BL_LEVEL_NAME, efi_guid,
-				    efi_data_len, &efi_data);
+				    efi_attr, true, efi_data_len, &efi_data);
 	if (sts)
 		dev_warn(&applespi->spi->dev,
 			 "Error saving backlight level to EFI vars: %d\n", sts);
 };
 MODULE_DEVICE_TABLE(acpi, applespi_acpi_match);
-const struct dev_pm_ops applespi_pm_ops = {
+static const struct dev_pm_ops applespi_pm_ops = {
 	SET_SYSTEM_SLEEP_PM_OPS(applespi_suspend, applespi_resume)
 	.poweroff_late	= applespi_poweroff_late,
 };

drivers/input/mouse/elantech.c+26−29

 				  leave_breadcrumbs);
 }
+static bool elantech_use_host_notify(struct psmouse *psmouse,
+				     struct elantech_device_info *info)
+{
+	if (ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version))
+		return true;
+	switch (info->bus) {
+	case ETP_BUS_PS2_ONLY:
+		/* expected case */
+		break;
+	case ETP_BUS_SMB_HST_NTFY_ONLY:
+	case ETP_BUS_PS2_SMB_HST_NTFY:
+		/* SMbus implementation is stable since 2018 */
+		if (dmi_get_bios_year() >= 2018)
+			return true;
+		/* fall through */
+	default:
+		psmouse_dbg(psmouse,
+			    "Ignoring SMBus bus provider %d\n", info->bus);
+		break;
+	}
+	return false;
+}
 /**
  * elantech_setup_smbus - called once the PS/2 devices are enumerated
  * and decides to instantiate a SMBus InterTouch device.
 		 * i2c_blacklist_pnp_ids.
 		 * Old ICs are up to the user to decide.
 		 */
-		if (!ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version) ||
+		if (!elantech_use_host_notify(psmouse, info) ||
 		    psmouse_matches_pnp_id(psmouse, i2c_blacklist_pnp_ids))
 			return -ENXIO;
 	}
 	return 0;
 }
-static bool elantech_use_host_notify(struct psmouse *psmouse,
-				     struct elantech_device_info *info)
-{
-	if (ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version))
-		return true;
-	switch (info->bus) {
-	case ETP_BUS_PS2_ONLY:
-		/* expected case */
-		break;
-	case ETP_BUS_SMB_ALERT_ONLY:
-		/* fall-through  */
-	case ETP_BUS_PS2_SMB_ALERT:
-		psmouse_dbg(psmouse, "Ignoring SMBus provider through alert protocol.\n");
-		break;
-	case ETP_BUS_SMB_HST_NTFY_ONLY:
-		/* fall-through  */
-	case ETP_BUS_PS2_SMB_HST_NTFY:
-		return true;
-	default:
-		psmouse_dbg(psmouse,
-			    "Ignoring SMBus bus provider %d.\n",
-			    info->bus);
-	}
-	return false;
-}
 int elantech_init_smbus(struct psmouse *psmouse)
 {
 	struct elantech_device_info info;

drivers/input/mouse/synaptics.c+1−0

@@ -182,6 +182,7 @@ static const char * const smbus_pnp_ids[] = { · 181 unmodified lines
182	"LEN2055", /* E580 */	182	"LEN2055", /* E580 */
183	"SYN3052", /* HP EliteBook 840 G4 */	183	"SYN3052", /* HP EliteBook 840 G4 */
184	"SYN3221", /* HP 15-ay000 */	184	"SYN3221", /* HP 15-ay000 */
		185	"SYN323d", /* HP Spectre X360 13-w013dx */
185	NULL	186	NULL
186	};	187	};
187		188

drivers/input/tablet/kbtab.c+4−2

 	if (intf->cur_altsetting->desc.bNumEndpoints < 1)
 		return -ENODEV;
+	endpoint = &intf->cur_altsetting->endpoint[0].desc;
+	if (!usb_endpoint_is_int_in(endpoint))
+		return -ENODEV;
 	kbtab = kzalloc(sizeof(struct kbtab), GFP_KERNEL);
 	input_dev = input_allocate_device();
 	if (!kbtab || !input_dev)
 	input_set_abs_params(input_dev, ABS_Y, 0, 0x1750, 4, 0);
 	input_set_abs_params(input_dev, ABS_PRESSURE, 0, 0xff, 0, 0);
-	endpoint = &intf->cur_altsetting->endpoint[0].desc;
 	usb_fill_int_urb(kbtab->irq, dev,
 			 usb_rcvintpipe(dev, endpoint->bEndpointAddress),
 			 kbtab->data, 8,

drivers/input/touchscreen/usbtouchscreen.c+2−0

@@ -1659,6 +1659,8 @@ static int usbtouch_probe(struct usb_interface *intf, · 1658 unmodified lines
1659	if (!usbtouch \|\| !input_dev)	1659	if (!usbtouch \|\| !input_dev)
1660	goto out_free;	1660	goto out_free;
1661		1661
		1662	mutex_init(&usbtouch->pm_mutex);
		1663
1662	type = &usbtouch_dev_info[id->driver_info];	1664	type = &usbtouch_dev_info[id->driver_info];
1663	usbtouch->type = type;	1665	usbtouch->type = type;
1664	if (!type->process_pkt)	1666	if (!type->process_pkt)

drivers/iommu/virtio-iommu.c+29−11

 /*
  * Virtio driver for the paravirtualized IOMMU
  *
- * Copyright (C) 2018 Arm Limited
+ * Copyright (C) 2019 Arm Limited
  */
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 	/* Device configuration */
 	struct iommu_domain_geometry	geometry;
 	u64				pgsize_bitmap;
-	u8				domain_bits;
+	u32				first_domain;
+	u32				last_domain;
+	/* Supported MAP flags */
+	u32				map_flags;
 	u32				probe_size;
 };
 	struct viommu_dev		*viommu;
 	struct mutex			mutex; /* protects viommu pointer */
 	unsigned int			id;
+	u32				map_flags;
 	spinlock_t			mappings_lock;
 	struct rb_root_cached		mappings;
 		return -ENOENT;
 	case VIRTIO_IOMMU_S_FAULT:
 		return -EFAULT;
+	case VIRTIO_IOMMU_S_NOMEM:
+		return -ENOMEM;
 	case VIRTIO_IOMMU_S_IOERR:
 	case VIRTIO_IOMMU_S_DEVERR:
 	default:
 {
 	int ret;
 	struct viommu_domain *vdomain = to_viommu_domain(domain);
-	unsigned int max_domain = viommu->domain_bits > 31 ? ~0 :
-				  (1U << viommu->domain_bits) - 1;
 	vdomain->viommu		= viommu;
+	vdomain->map_flags	= viommu->map_flags;
 	domain->pgsize_bitmap	= viommu->pgsize_bitmap;
 	domain->geometry	= viommu->geometry;
-	ret = ida_alloc_max(&viommu->domain_ids, max_domain, GFP_KERNEL);
+	ret = ida_alloc_range(&viommu->domain_ids, viommu->first_domain,
+			      viommu->last_domain, GFP_KERNEL);
 	if (ret >= 0)
 		vdomain->id = (unsigned int)ret;
 		      phys_addr_t paddr, size_t size, int prot)
 {
 	int ret;
-	int flags;
+	u32 flags;
 	struct virtio_iommu_req_map map;
 	struct viommu_domain *vdomain = to_viommu_domain(domain);
 		(prot & IOMMU_WRITE ? VIRTIO_IOMMU_MAP_F_WRITE : 0) |
 		(prot & IOMMU_MMIO ? VIRTIO_IOMMU_MAP_F_MMIO : 0);
+	if (flags & ~vdomain->map_flags)
+		return -EINVAL;
 	ret = viommu_add_mapping(vdomain, iova, paddr, size, flags);
 	if (ret)
 		return ret;
 		goto err_free_vqs;
 	}
-	viommu->domain_bits = 32;
+	viommu->map_flags = VIRTIO_IOMMU_MAP_F_READ | VIRTIO_IOMMU_MAP_F_WRITE;
+	viommu->last_domain = ~0U;
 	/* Optional features */
 	virtio_cread_feature(vdev, VIRTIO_IOMMU_F_INPUT_RANGE,
 			     struct virtio_iommu_config, input_range.end,
 			     &input_end);
-	virtio_cread_feature(vdev, VIRTIO_IOMMU_F_DOMAIN_BITS,
+	virtio_cread_feature(vdev, VIRTIO_IOMMU_F_DOMAIN_RANGE,
-			     struct virtio_iommu_config, domain_bits,
+			     struct virtio_iommu_config, domain_range.start,
-			     &viommu->domain_bits);
+			     &viommu->first_domain);
+	virtio_cread_feature(vdev, VIRTIO_IOMMU_F_DOMAIN_RANGE,
+			     struct virtio_iommu_config, domain_range.end,
+			     &viommu->last_domain);
 	virtio_cread_feature(vdev, VIRTIO_IOMMU_F_PROBE,
 			     struct virtio_iommu_config, probe_size,
 		.force_aperture	= true,
 	};
+	if (virtio_has_feature(vdev, VIRTIO_IOMMU_F_MMIO))
+		viommu->map_flags |= VIRTIO_IOMMU_MAP_F_MMIO;
 	viommu_ops.pgsize_bitmap = viommu->pgsize_bitmap;
 	virtio_device_ready(vdev);
 static unsigned int features[] = {
 	VIRTIO_IOMMU_F_MAP_UNMAP,
-	VIRTIO_IOMMU_F_DOMAIN_BITS,
 	VIRTIO_IOMMU_F_INPUT_RANGE,
+	VIRTIO_IOMMU_F_DOMAIN_RANGE,
 	VIRTIO_IOMMU_F_PROBE,
+	VIRTIO_IOMMU_F_MMIO,
 };
 static struct virtio_device_id id_table[] = {

drivers/irqchip/irq-gic-v3-its.c+1−1

@@ -3010,7 +3010,7 @@ static int its_vpe_init(struct its_vpe *vpe) · 3009 unmodified lines
3010		3010
3011	if (!its_alloc_vpe_table(vpe_id)) {	3011	if (!its_alloc_vpe_table(vpe_id)) {
3012	its_vpe_id_free(vpe_id);	3012	its_vpe_id_free(vpe_id);
3013	its_free_pending_table(vpe->vpt_page);	3013	its_free_pending_table(vpt_page);
3014	return -ENOMEM;	3014	return -ENOMEM;
3015	}	3015	}
3016		3016

drivers/irqchip/irq-gic-v3.c+4−0

 		case 7:
 			write_gicreg(0, ICC_AP0R3_EL1);
 			write_gicreg(0, ICC_AP0R2_EL1);
+		/* Fall through */
 		case 6:
 			write_gicreg(0, ICC_AP0R1_EL1);
+		/* Fall through */
 		case 5:
 		case 4:
 			write_gicreg(0, ICC_AP0R0_EL1);
 	case 7:
 		write_gicreg(0, ICC_AP1R3_EL1);
 		write_gicreg(0, ICC_AP1R2_EL1);
+		/* Fall through */
 	case 6:
 		write_gicreg(0, ICC_AP1R1_EL1);
+		/* Fall through */
 	case 5:
 	case 4:
 		write_gicreg(0, ICC_AP1R0_EL1);

drivers/irqchip/irq-imx-gpcv2.c+1−0

@@ -131,6 +131,7 @@ static struct irq_chip gpcv2_irqchip_data_chip = { · 130 unmodified lines
131	.irq_unmask = imx_gpcv2_irq_unmask,	131	.irq_unmask = imx_gpcv2_irq_unmask,
132	.irq_set_wake = imx_gpcv2_irq_set_wake,	132	.irq_set_wake = imx_gpcv2_irq_set_wake,
133	.irq_retrigger = irq_chip_retrigger_hierarchy,	133	.irq_retrigger = irq_chip_retrigger_hierarchy,
		134	.irq_set_type = irq_chip_set_type_parent,
134	#ifdef CONFIG_SMP	135	#ifdef CONFIG_SMP
135	.irq_set_affinity = irq_chip_set_affinity_parent,	136	.irq_set_affinity = irq_chip_set_affinity_parent,
136	#endif	137	#endif

drivers/irqchip/irq-mbigen.c+7−2

 		parent = platform_bus_type.dev_root;
 		child = of_platform_device_create(np, NULL, parent);
-		if (!child)
+		if (!child) {
+			of_node_put(np);
 			return -ENOMEM;
+		}
 		if (of_property_read_u32(child->dev.of_node, "num-pins",
 					 &num_pins) < 0) {
 			dev_err(&pdev->dev, "No num-pins property\n");
+			of_node_put(np);
 			return -EINVAL;
 		}
 							   mbigen_write_msg,
 							   &mbigen_domain_ops,
 							   mgn_chip);
-		if (!domain)
+		if (!domain) {
+			of_node_put(np);
 			return -ENOMEM;
+		}
 	}
 	return 0;

drivers/isdn/hardware/mISDN/hfcsusb.c+12−1

 				printk(KERN_DEBUG
 				       "%s: %s: alloc urb for fifo %i failed",
 				       hw->name, __func__, fifo->fifonum);
+				continue;
 			}
 			fifo->iso[i].owner_fifo = (struct usb_fifo *) fifo;
 			fifo->iso[i].indx = i;
 static int
 setup_hfcsusb(struct hfcsusb *hw)
 {
+	void *dmabuf = kmalloc(sizeof(u_char), GFP_KERNEL);
 	u_char b;
+	int ret;
 	if (debug & DBG_HFC_CALL_TRACE)
 		printk(KERN_DEBUG "%s: %s\n", hw->name, __func__);
+	if (!dmabuf)
+		return -ENOMEM;
+	ret = read_reg_atomic(hw, HFCUSB_CHIP_ID, dmabuf);
+	memcpy(&b, dmabuf, sizeof(u_char));
+	kfree(dmabuf);
 	/* check the chip id */
-	if (read_reg_atomic(hw, HFCUSB_CHIP_ID, &b) != 1) {
+	if (ret != 1) {
 		printk(KERN_DEBUG "%s: %s: cannot read chip id\n",
 		       hw->name, __func__);
 		return 1;

drivers/macintosh/smu.c+1−0

@@ -852,6 +852,7 @@ int smu_queue_i2c(struct smu_i2c_cmd *cmd) · 851 unmodified lines
852	break;	852	break;
853	case SMU_I2C_TRANSFER_COMBINED:	853	case SMU_I2C_TRANSFER_COMBINED:
854	cmd->info.devaddr &= 0xfe;	854	cmd->info.devaddr &= 0xfe;
		855	/* fall through */
855	case SMU_I2C_TRANSFER_STDSUB:	856	case SMU_I2C_TRANSFER_STDSUB:
856	if (cmd->info.sublen > 3)	857	if (cmd->info.sublen > 3)
857	return -EINVAL;	858	return -EINVAL;

drivers/md/bcache/sysfs.c+12−8

 	"writethrough",
 	"writeback",
 	"writearound",
-	"none"
+	"none",
+	NULL
 };
 /* Default is 0 ("auto") */
 static const char * const bch_stop_on_failure_modes[] = {
 	"auto",
-	"always"
+	"always",
+	NULL
 };
 static const char * const cache_replacement_policies[] = {
 	"lru",
 	"fifo",
-	"random"
+	"random",
+	NULL
 };
 static const char * const error_actions[] = {
 	"unregister",
-	"panic"
+	"panic",
+	NULL
 };
 write_attribute(attach);
 	}
 	if (attr == &sysfs_cache_mode) {
-		v = sysfs_match_string(bch_cache_modes, buf);
+		v = __sysfs_match_string(bch_cache_modes, -1, buf);
 		if (v < 0)
 			return v;
 	}
 	if (attr == &sysfs_stop_when_cache_set_failed) {
-		v = sysfs_match_string(bch_stop_on_failure_modes, buf);
+		v = __sysfs_match_string(bch_stop_on_failure_modes, -1, buf);
 		if (v < 0)
 			return v;
 			    0, UINT_MAX);
 	if (attr == &sysfs_errors) {
-		v = sysfs_match_string(error_actions, buf);
+		v = __sysfs_match_string(error_actions, -1, buf);
 		if (v < 0)
 			return v;
 	}
 	if (attr == &sysfs_cache_replacement_policy) {
-		v = sysfs_match_string(cache_replacement_policies, buf);
+		v = __sysfs_match_string(cache_replacement_policies, -1, buf);
 		if (v < 0)
 			return v;

drivers/md/dm-table.c+8−8

drivers/media/platform/vivid/vivid-core.c+4−4

 	/* start creating the vb2 queues */
 	if (dev->has_vid_cap) {
+		snprintf(dev->vid_cap_dev.name, sizeof(dev->vid_cap_dev.name),
+			 "vivid-%03d-vid-cap", inst);
 		/* initialize vid_cap queue */
 		q = &dev->vb_vid_cap_q;
 		q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE :
 	}
 	if (dev->has_vid_out) {
+		snprintf(dev->vid_out_dev.name, sizeof(dev->vid_out_dev.name),
+			 "vivid-%03d-vid-out", inst);
 		/* initialize vid_out queue */
 		q = &dev->vb_vid_out_q;
 		q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE :
 	/* finally start creating the device nodes */
 	if (dev->has_vid_cap) {
 		vfd = &dev->vid_cap_dev;
-		snprintf(vfd->name, sizeof(vfd->name),
-			 "vivid-%03d-vid-cap", inst);
 		vfd->fops = &vivid_fops;
 		vfd->ioctl_ops = &vivid_ioctl_ops;
 		vfd->device_caps = dev->vid_cap_caps;
 	if (dev->has_vid_out) {
 		vfd = &dev->vid_out_dev;
-		snprintf(vfd->name, sizeof(vfd->name),
-			 "vivid-%03d-vid-out", inst);
 		vfd->vfl_dir = VFL_DIR_TX;
 		vfd->fops = &vivid_fops;
 		vfd->ioctl_ops = &vivid_ioctl_ops;

drivers/mfd/db8500-prcmu.c+2−0

 	switch (divsel) {
 	case PRCM_DSI_PLLOUT_SEL_PHI_4:
 		div *= 2;
+		/* Fall through */
 	case PRCM_DSI_PLLOUT_SEL_PHI_2:
 		div *= 2;
+		/* Fall through */
 	case PRCM_DSI_PLLOUT_SEL_PHI:
 		return pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK),
 			PLL_RAW) / div;

drivers/mfd/omap-usb-host.c+2−2

@@ -308,7 +308,7 @@ static int usbhs_runtime_resume(struct device *dev) · 307 unmodified lines
308	i, r);	308	i, r);
309	}	309	}
310	}	310	}
311	/* Fall through as HSIC mode needs utmi_clk */	311	/* Fall through - as HSIC mode needs utmi_clk */
312		312
313	case OMAP_EHCI_PORT_MODE_TLL:	313	case OMAP_EHCI_PORT_MODE_TLL:
314	if (!IS_ERR(omap->utmi_clk[i])) {	314	if (!IS_ERR(omap->utmi_clk[i])) {
@@ -344,7 +344,7 @@ static int usbhs_runtime_suspend(struct device *dev) · 29 unmodified lines
344		344
345	if (!IS_ERR(omap->hsic480m_clk[i]))	345	if (!IS_ERR(omap->hsic480m_clk[i]))
346	clk_disable_unprepare(omap->hsic480m_clk[i]);	346	clk_disable_unprepare(omap->hsic480m_clk[i]);
347	/* Fall through as utmi_clks were used in HSIC mode */	347	/* Fall through - as utmi_clks were used in HSIC mode */
348		348
349	case OMAP_EHCI_PORT_MODE_TLL:	349	case OMAP_EHCI_PORT_MODE_TLL:
350	if (!IS_ERR(omap->utmi_clk[i]))	350	if (!IS_ERR(omap->utmi_clk[i]))

drivers/misc/eeprom/at24.c+1−1

@@ -685,7 +685,7 @@ static int at24_probe(struct i2c_client *client) · 684 unmodified lines
685	nvmem_config.name = dev_name(dev);	685	nvmem_config.name = dev_name(dev);
686	nvmem_config.dev = dev;	686	nvmem_config.dev = dev;
687	nvmem_config.read_only = !writable;	687	nvmem_config.read_only = !writable;
688	nvmem_config.root_only = true;	688	nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
689	nvmem_config.owner = THIS_MODULE;	689	nvmem_config.owner = THIS_MODULE;
690	nvmem_config.compat = true;	690	nvmem_config.compat = true;
691	nvmem_config.base_dev = dev;	691	nvmem_config.base_dev = dev;

drivers/misc/habanalabs/command_submission.c+1−1

@@ -683,7 +683,7 @@ int hl_cs_ioctl(struct hl_fpriv hpriv, void data) · 682 unmodified lines
683		683
684	rc = hl_poll_timeout_memory(hdev,	684	rc = hl_poll_timeout_memory(hdev,
685	&ctx->thread_ctx_switch_wait_token, tmp, (tmp == 1),	685	&ctx->thread_ctx_switch_wait_token, tmp, (tmp == 1),
686	100, jiffies_to_usecs(hdev->timeout_jiffies));	686	100, jiffies_to_usecs(hdev->timeout_jiffies), false);
687		687
688	if (rc == -ETIMEDOUT) {	688	if (rc == -ETIMEDOUT) {
689	dev_err(hdev->dev,	689	dev_err(hdev->dev,

drivers/misc/habanalabs/firmware_if.c+4−18

 {
 	const struct firmware *fw;
 	const u64 *fw_data;
-	size_t fw_size, i;
+	size_t fw_size;
 	int rc;
 	rc = request_firmware(&fw, fw_name, hdev->dev);
 	fw_data = (const u64 *) fw->data;
-	if ((fw->size % 8) != 0)
+	memcpy_toio(dst, fw_data, fw_size);
-		fw_size -= 8;
-	for (i = 0 ; i < fw_size ; i += 8, fw_data++, dst += 8) {
-		if (!(i & (0x80000 - 1))) {
-			dev_dbg(hdev->dev,
-				"copied so far %zu out of %zu for %s firmware",
-				i, fw_size, fw_name);
-			usleep_range(20, 100);
-		}
-		writeq(*fw_data, dst);
-	}
-	if ((fw->size % 8) != 0)
-		writel(*(const u32 *) fw_data, dst);
 out:
 	release_firmware(fw);
 	}
 	rc = hl_poll_timeout_memory(hdev, &pkt->fence, tmp,
-				(tmp == ARMCP_PACKET_FENCE_VAL), 1000, timeout);
+				(tmp == ARMCP_PACKET_FENCE_VAL), 1000,
+				timeout, true);
 	hl_hw_queue_inc_ci_kernel(hdev, hw_queue_id);

drivers/misc/habanalabs/goya/goya.c+3−2

 	}
 	rc = hl_poll_timeout_memory(hdev, fence_ptr, tmp,
-				(tmp == GOYA_QMAN0_FENCE_VAL), 1000, timeout);
+				(tmp == GOYA_QMAN0_FENCE_VAL), 1000,
+				timeout, true);
 	hl_hw_queue_inc_ci_kernel(hdev, GOYA_QUEUE_ID_DMA_0);
 	}
 	rc = hl_poll_timeout_memory(hdev, fence_ptr, tmp, (tmp == fence_val),
-					1000, GOYA_TEST_QUEUE_WAIT_USEC);
+					1000, GOYA_TEST_QUEUE_WAIT_USEC, true);
 	hl_hw_queue_inc_ci_kernel(hdev, hw_queue_id);

drivers/misc/habanalabs/habanalabs.h+14−2

 /*
  * address in this macro points always to a memory location in the
  * host's (server's) memory. That location is updated asynchronously
- * either by the direct access of the device or by another core
+ * either by the direct access of the device or by another core.
+ *
+ * To work both in LE and BE architectures, we need to distinguish between the
+ * two states (device or another core updates the memory location). Therefore,
+ * if mem_written_by_device is true, the host memory being polled will be
+ * updated directly by the device. If false, the host memory being polled will
+ * be updated by host CPU. Required so host knows whether or not the memory
+ * might need to be byte-swapped before returning value to caller.
  */
-#define hl_poll_timeout_memory(hdev, addr, val, cond, sleep_us, timeout_us) \
+#define hl_poll_timeout_memory(hdev, addr, val, cond, sleep_us, timeout_us, \
+				mem_written_by_device) \
 ({ \
 	ktime_t __timeout; \
 	/* timeout should be longer when working with simulator */ \
 		/* Verify we read updates done by other cores or by device */ \
 		mb(); \
 		(val) = *((u32 *) (uintptr_t) (addr)); \
+		if (mem_written_by_device) \
+			(val) = le32_to_cpu(val); \
 		if (cond) \
 			break; \
 		if (timeout_us && ktime_compare(ktime_get(), __timeout) > 0) { \
 			(val) = *((u32 *) (uintptr_t) (addr)); \
+			if (mem_written_by_device) \
+				(val) = le32_to_cpu(val); \
 			break; \
 		} \
 		if (sleep_us) \

drivers/mmc/core/queue.c+5−0

 #include <linux/kthread.h>
 #include <linux/scatterlist.h>
 #include <linux/dma-mapping.h>
+#include <linux/backing-dev.h>
 #include <linux/mmc/card.h>
 #include <linux/mmc/host.h>
 		goto free_tag_set;
 	}
+	if (mmc_host_is_spi(host) && host->use_spi_crc)
+		mq->queue->backing_dev_info->capabilities |=
+			BDI_CAP_STABLE_WRITES;
 	mq->queue->queuedata = mq;
 	blk_queue_rq_timeout(mq->queue, 60 * HZ);

drivers/mmc/host/cavium.c+3−1

 {
 	data->bytes_xfered = data->blocks * data->blksz;
 	data->error = 0;
+	dma_unmap_sg(host->dev, data->sg, data->sg_len, get_dma_dir(data));
 	return 1;
 }
 		mmc->max_segs = 1;
 	/* DMA size field can address up to 8 MB */
-	mmc->max_seg_size = 8 * 1024 * 1024;
+	mmc->max_seg_size = min_t(unsigned int, 8 * 1024 * 1024,
+				  dma_get_max_seg_size(host->dev));
 	mmc->max_req_size = mmc->max_seg_size;
 	/* External DMA is in 512 byte blocks */
 	mmc->max_blk_size = 512;

drivers/mmc/host/dw_mmc.c+1−2

 				 * delayed. Allowing the transfer to take place
 				 * avoids races and keeps things simple.
 				 */
-				if ((err != -ETIMEDOUT) &&
+				if (err != -ETIMEDOUT) {
-				    (cmd->opcode == MMC_SEND_TUNING_BLOCK)) {
 					state = STATE_SENDING_DATA;
 					continue;
 				}

drivers/mmc/host/meson-mx-sdio.c+1−1

@@ -73,7 +73,7 @@ · 72 unmodified lines
73	#define MESON_MX_SDIO_IRQC_IF_CONFIG_MASK GENMASK(7, 6)	73	#define MESON_MX_SDIO_IRQC_IF_CONFIG_MASK GENMASK(7, 6)
74	#define MESON_MX_SDIO_IRQC_FORCE_DATA_CLK BIT(8)	74	#define MESON_MX_SDIO_IRQC_FORCE_DATA_CLK BIT(8)
75	#define MESON_MX_SDIO_IRQC_FORCE_DATA_CMD BIT(9)	75	#define MESON_MX_SDIO_IRQC_FORCE_DATA_CMD BIT(9)
76	#define MESON_MX_SDIO_IRQC_FORCE_DATA_DAT_MASK GENMASK(10, 13)	76	#define MESON_MX_SDIO_IRQC_FORCE_DATA_DAT_MASK GENMASK(13, 10)
77	#define MESON_MX_SDIO_IRQC_SOFT_RESET BIT(15)	77	#define MESON_MX_SDIO_IRQC_SOFT_RESET BIT(15)
78	#define MESON_MX_SDIO_IRQC_FORCE_HALT BIT(30)	78	#define MESON_MX_SDIO_IRQC_FORCE_HALT BIT(30)
79	#define MESON_MX_SDIO_IRQC_HALT_HOLE BIT(31)	79	#define MESON_MX_SDIO_IRQC_HALT_HOLE BIT(31)

drivers/mmc/host/sdhci-acpi.c+1−1

@@ -883,7 +883,7 @@ static int sdhci_acpi_runtime_resume(struct device *dev) · 882 unmodified lines
883		883
884	sdhci_acpi_byt_setting(&c->pdev->dev);	884	sdhci_acpi_byt_setting(&c->pdev->dev);
885		885
886	return sdhci_runtime_resume_host(c->host);	886	return sdhci_runtime_resume_host(c->host, 0);
887	}	887	}
888		888
889	#endif	889	#endif

drivers/mmc/host/sdhci-esdhc-imx.c+1−1

@@ -1705,7 +1705,7 @@ static int sdhci_esdhc_runtime_resume(struct device *dev) · 1704 unmodified lines
1705	esdhc_pltfm_set_clock(host, imx_data->actual_clock);	1705	esdhc_pltfm_set_clock(host, imx_data->actual_clock);
1706	}	1706	}
1707		1707
1708	err = sdhci_runtime_resume_host(host);	1708	err = sdhci_runtime_resume_host(host, 0);
1709	if (err)	1709	if (err)
1710	goto disable_ipg_clk;	1710	goto disable_ipg_clk;
1711		1711

drivers/mmc/host/sdhci-of-at91.c+1−1

@@ -289,7 +289,7 @@ static int sdhci_at91_runtime_resume(struct device *dev) · 288 unmodified lines
289	}	289	}
290		290
291	out:	291	out:
292	return sdhci_runtime_resume_host(host);	292	return sdhci_runtime_resume_host(host, 0);
293	}	293	}
294	#endif /* CONFIG_PM */	294	#endif /* CONFIG_PM */
295		295

drivers/mmc/host/sdhci-pci-core.c+2−2

@@ -167,7 +167,7 @@ static int sdhci_pci_runtime_suspend_host(struct sdhci_pci_chip *chip) · 166 unmodified lines
167		167
168	err_pci_runtime_suspend:	168	err_pci_runtime_suspend:
169	while (--i >= 0)	169	while (--i >= 0)
170	sdhci_runtime_resume_host(chip->slots[i]->host);	170	sdhci_runtime_resume_host(chip->slots[i]->host, 0);
171	return ret;	171	return ret;
172	}	172	}
173		173
@@ -181,7 +181,7 @@ static int sdhci_pci_runtime_resume_host(struct sdhci_pci_chip *chip) · 7 unmodified lines
181	if (!slot)	181	if (!slot)
182	continue;	182	continue;
183		183
184	ret = sdhci_runtime_resume_host(slot->host);	184	ret = sdhci_runtime_resume_host(slot->host, 0);
185	if (ret)	185	if (ret)
186	return ret;	186	return ret;
187	}	187	}

drivers/mmc/host/sdhci-pxav3.c+1−1

@@ -554,7 +554,7 @@ static int sdhci_pxav3_runtime_resume(struct device *dev) · 553 unmodified lines
554	if (!IS_ERR(pxa->clk_core))	554	if (!IS_ERR(pxa->clk_core))
555	clk_prepare_enable(pxa->clk_core);	555	clk_prepare_enable(pxa->clk_core);
556		556
557	return sdhci_runtime_resume_host(host);	557	return sdhci_runtime_resume_host(host, 0);
558	}	558	}
559	#endif	559	#endif
560		560

drivers/mmc/host/sdhci-s3c.c+1−1

@@ -745,7 +745,7 @@ static int sdhci_s3c_runtime_resume(struct device *dev) · 744 unmodified lines
745	clk_prepare_enable(busclk);	745	clk_prepare_enable(busclk);
746	if (ourhost->cur_clk >= 0)	746	if (ourhost->cur_clk >= 0)
747	clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]);	747	clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]);
748	ret = sdhci_runtime_resume_host(host);	748	ret = sdhci_runtime_resume_host(host, 0);
749	return ret;	749	return ret;
750	}	750	}
751	#endif	751	#endif

drivers/mmc/host/sdhci-sprd.c+2−1

 	sdhci_cleanup_host(host);
 pm_runtime_disable:
+	pm_runtime_put_noidle(&pdev->dev);
 	pm_runtime_disable(&pdev->dev);
 	pm_runtime_set_suspended(&pdev->dev);
 	if (ret)
 		goto clk_disable;
-	sdhci_runtime_resume_host(host);
+	sdhci_runtime_resume_host(host, 1);
 	return 0;
 clk_disable:

drivers/mmc/host/sdhci-xenon.c+1−1

@@ -638,7 +638,7 @@ static int xenon_runtime_resume(struct device *dev) · 637 unmodified lines
638	priv->restore_needed = false;	638	priv->restore_needed = false;
639	}	639	}
640		640
641	ret = sdhci_runtime_resume_host(host);	641	ret = sdhci_runtime_resume_host(host, 0);
642	if (ret)	642	if (ret)
643	goto out;	643	goto out;
644	return 0;	644	return 0;

drivers/mmc/host/sdhci.c+2−2

@@ -3320,7 +3320,7 @@ int sdhci_runtime_suspend_host(struct sdhci_host *host) · 3319 unmodified lines
3320	}	3320	}
3321	EXPORT_SYMBOL_GPL(sdhci_runtime_suspend_host);	3321	EXPORT_SYMBOL_GPL(sdhci_runtime_suspend_host);
3322		3322
3323	int sdhci_runtime_resume_host(struct sdhci_host *host)	3323	int sdhci_runtime_resume_host(struct sdhci_host *host, int soft_reset)
3324	{	3324	{
3325	struct mmc_host *mmc = host->mmc;	3325	struct mmc_host *mmc = host->mmc;
3326	unsigned long flags;	3326	unsigned long flags;
@@ -3331,7 +3331,7 @@ int sdhci_runtime_resume_host(struct sdhci_host *host) · 4 unmodified lines
3331	host->ops->enable_dma(host);	3331	host->ops->enable_dma(host);
3332	}	3332	}
3333		3333
3334	sdhci_init(host, 0);	3334	sdhci_init(host, soft_reset);
3335		3335
3336	if (mmc->ios.power_mode != MMC_POWER_UNDEFINED &&	3336	if (mmc->ios.power_mode != MMC_POWER_UNDEFINED &&
3337	mmc->ios.power_mode != MMC_POWER_OFF) {	3337	mmc->ios.power_mode != MMC_POWER_OFF) {

drivers/mmc/host/sdhci.h+1−1

@@ -781,7 +781,7 @@ void sdhci_adma_write_desc(struct sdhci_host host, void *desc, · 780 unmodified lines
781	int sdhci_suspend_host(struct sdhci_host *host);	781	int sdhci_suspend_host(struct sdhci_host *host);
782	int sdhci_resume_host(struct sdhci_host *host);	782	int sdhci_resume_host(struct sdhci_host *host);
783	int sdhci_runtime_suspend_host(struct sdhci_host *host);	783	int sdhci_runtime_suspend_host(struct sdhci_host *host);
784	int sdhci_runtime_resume_host(struct sdhci_host *host);	784	int sdhci_runtime_resume_host(struct sdhci_host *host, int soft_reset);
785	#endif	785	#endif
786		786
787	void sdhci_cqe_enable(struct mmc_host *mmc);	787	void sdhci_cqe_enable(struct mmc_host *mmc);

drivers/mtd/hyperbus/Kconfig+2−1

 config HBMC_AM654
 	tristate "HyperBus controller driver for AM65x SoC"
+	depends on ARM64 || COMPILE_TEST
 	select MULTIPLEXER
-	select MUX_MMIO
+	imply MUX_MMIO
 	help
 	 This is the driver for HyperBus controller on TI's AM65x and
 	 other SoCs

drivers/mtd/nand/raw/nand_micron.c+11−3

 	    (chip->id.data[4] & MICRON_ID_INTERNAL_ECC_MASK) != 0x2)
 		return MICRON_ON_DIE_UNSUPPORTED;
+	/*
+	 * It seems that there are devices which do not support ECC officially.
+	 * At least the MT29F2G08ABAGA / MT29F2G08ABBGA devices supports
+	 * enabling the ECC feature but don't reflect that to the READ_ID table.
+	 * So we have to guarantee that we disable the ECC feature directly
+	 * after we did the READ_ID table command. Later we can evaluate the
+	 * ECC_ENABLE support.
+	 */
 	ret = micron_nand_on_die_ecc_setup(chip, true);
 	if (ret)
 		return MICRON_ON_DIE_UNSUPPORTED;
 	if (ret)
 		return MICRON_ON_DIE_UNSUPPORTED;
-	if (!(id[4] & MICRON_ID_ECC_ENABLED))
-		return MICRON_ON_DIE_UNSUPPORTED;
 	ret = micron_nand_on_die_ecc_setup(chip, false);
 	if (ret)
 		return MICRON_ON_DIE_UNSUPPORTED;
+	if (!(id[4] & MICRON_ID_ECC_ENABLED))
+		return MICRON_ON_DIE_UNSUPPORTED;
 	ret = nand_readid_op(chip, 0, id, sizeof(id));
 	if (ret)
 		return MICRON_ON_DIE_UNSUPPORTED;

drivers/net/arcnet/arc-rimi.c+3−0

 	switch (ints[0]) {
 	default:		/* ERROR */
 		pr_err("Too many arguments\n");
+		/* Fall through */
 	case 3:		/* Node ID */
 		node = ints[3];
+		/* Fall through */
 	case 2:		/* IRQ */
 		irq = ints[2];
+		/* Fall through */
 	case 1:		/* IO address */
 		io = ints[1];
 	}

drivers/net/arcnet/com20020-isa.c+6−0

 	switch (ints[0]) {
 	default:		/* ERROR */
 		pr_info("Too many arguments\n");
+		/* Fall through */
 	case 6:		/* Timeout */
 		timeout = ints[6];
+		/* Fall through */
 	case 5:		/* CKP value */
 		clockp = ints[5];
+		/* Fall through */
 	case 4:		/* Backplane flag */
 		backplane = ints[4];
+		/* Fall through */
 	case 3:		/* Node ID */
 		node = ints[3];
+		/* Fall through */
 	case 2:		/* IRQ */
 		irq = ints[2];
+		/* Fall through */
 	case 1:		/* IO address */
 		io = ints[1];
 	}

drivers/net/arcnet/com90io.c+2−0

 	switch (ints[0]) {
 	default:		/* ERROR */
 		pr_err("Too many arguments\n");
+		/* Fall through */
 	case 2:		/* IRQ */
 		irq = ints[2];
+		/* Fall through */
 	case 1:		/* IO address */
 		io = ints[1];
 	}

drivers/net/arcnet/com90xx.c+3−0

 	switch (ints[0]) {
 	default:		/* ERROR */
 		pr_err("Too many arguments\n");
+		/* Fall through */
 	case 3:		/* Mem address */
 		shmem = ints[3];
+		/* Fall through */
 	case 2:		/* IRQ */
 		irq = ints[2];
+		/* Fall through */
 	case 1:		/* IO address */
 		io = ints[1];
 	}

drivers/net/bonding/bond_main.c+9−0

@@ -2196,6 +2196,15 @@ static void bond_miimon_commit(struct bonding *bond) · 2195 unmodified lines
2196	bond_for_each_slave(bond, slave, iter) {	2196	bond_for_each_slave(bond, slave, iter) {
2197	switch (slave->new_link) {	2197	switch (slave->new_link) {
2198	case BOND_LINK_NOCHANGE:	2198	case BOND_LINK_NOCHANGE:
		2199	/* For 802.3ad mode, check current slave speed and
		2200	* duplex again in case its port was disabled after
		2201	* invalid speed/duplex reporting but recovered before
		2202	* link monitoring could make a decision on the actual
		2203	* link status
		2204	*/
		2205	if (BOND_MODE(bond) == BOND_MODE_8023AD &&
		2206	slave->link == BOND_LINK_UP)
		2207	bond_3ad_adapter_speed_duplex_changed(slave);
2199	continue;	2208	continue;
2200		2209
2201	case BOND_LINK_UP:	2210	case BOND_LINK_UP:

drivers/net/can/dev.c+2−0

@@ -1249,6 +1249,8 @@ int register_candev(struct net_device *dev) · 1248 unmodified lines
1249	return -EINVAL;	1249	return -EINVAL;
1250		1250
1251	dev->rtnl_link_ops = &can_link_ops;	1251	dev->rtnl_link_ops = &can_link_ops;
		1252	netif_carrier_off(dev);
		1253
1252	return register_netdev(dev);	1254	return register_netdev(dev);
1253	}	1255	}
1254	EXPORT_SYMBOL_GPL(register_candev);	1256	EXPORT_SYMBOL_GPL(register_candev);

drivers/net/can/flexcan.c+32−7

 	priv->write(reg_mcr, &regs->mcr);
 }
-static inline void flexcan_enter_stop_mode(struct flexcan_priv *priv)
+static inline int flexcan_enter_stop_mode(struct flexcan_priv *priv)
 {
 	struct flexcan_regs __iomem *regs = priv->regs;
+	unsigned int ackval;
 	u32 reg_mcr;
 	reg_mcr = priv->read(&regs->mcr);
 	/* enable stop request */
 	regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr,
 			   1 << priv->stm.req_bit, 1 << priv->stm.req_bit);
+	/* get stop acknowledgment */
+	if (regmap_read_poll_timeout(priv->stm.gpr, priv->stm.ack_gpr,
+				     ackval, ackval & (1 << priv->stm.ack_bit),
+				     0, FLEXCAN_TIMEOUT_US))
+		return -ETIMEDOUT;
+	return 0;
 }
-static inline void flexcan_exit_stop_mode(struct flexcan_priv *priv)
+static inline int flexcan_exit_stop_mode(struct flexcan_priv *priv)
 {
 	struct flexcan_regs __iomem *regs = priv->regs;
+	unsigned int ackval;
 	u32 reg_mcr;
 	/* remove stop request */
 	regmap_update_bits(priv->stm.gpr, priv->stm.req_gpr,
 			   1 << priv->stm.req_bit, 0);
+	/* get stop acknowledgment */
+	if (regmap_read_poll_timeout(priv->stm.gpr, priv->stm.ack_gpr,
+				     ackval, !(ackval & (1 << priv->stm.ack_bit)),
+				     0, FLEXCAN_TIMEOUT_US))
+		return -ETIMEDOUT;
 	reg_mcr = priv->read(&regs->mcr);
 	reg_mcr &= ~FLEXCAN_MCR_SLF_WAK;
 	priv->write(reg_mcr, &regs->mcr);
+	return 0;
 }
 static inline void flexcan_error_irq_enable(const struct flexcan_priv *priv)
 	priv = netdev_priv(dev);
 	priv->stm.gpr = syscon_node_to_regmap(gpr_np);
-	of_node_put(gpr_np);
 	if (IS_ERR(priv->stm.gpr)) {
 		dev_dbg(&pdev->dev, "could not find gpr regmap\n");
-		return PTR_ERR(priv->stm.gpr);
+		ret = PTR_ERR(priv->stm.gpr);
+		goto out_put_node;
 	}
 	priv->stm.req_gpr = out_val[1];
 	device_set_wakeup_capable(&pdev->dev, true);
-	return 0;
+out_put_node:
+	of_node_put(gpr_np);
+	return ret;
 }
 static const struct of_device_id flexcan_of_match[] = {
 		 */
 		if (device_may_wakeup(device)) {
 			enable_irq_wake(dev->irq);
-			flexcan_enter_stop_mode(priv);
+			err = flexcan_enter_stop_mode(priv);
+			if (err)
+				return err;
 		} else {
 			err = flexcan_chip_disable(priv);
 			if (err)
 {
 	struct net_device *dev = dev_get_drvdata(device);
 	struct flexcan_priv *priv = netdev_priv(dev);
+	int err;
 	if (netif_running(dev) && device_may_wakeup(device)) {
 		flexcan_enable_wakeup_irq(priv, false);
-		flexcan_exit_stop_mode(priv);
+		err = flexcan_exit_stop_mode(priv);
+		if (err)
+			return err;
 	}
 	return 0;

drivers/net/can/rcar/rcar_canfd.c+5−4

 	/* All packets processed */
 	if (num_pkts < quota) {
-		napi_complete_done(napi, num_pkts);
+		if (napi_complete_done(napi, num_pkts)) {
-		/* Enable Rx FIFO interrupts */
+			/* Enable Rx FIFO interrupts */
-		rcar_canfd_set_bit(priv->base, RCANFD_RFCC(ridx),
+			rcar_canfd_set_bit(priv->base, RCANFD_RFCC(ridx),
-				   RCANFD_RFCC_RFIE);
+					   RCANFD_RFCC_RFIE);
+		}
 	}
 	return num_pkts;
 }

drivers/net/can/sja1000/peak_pcmcia.c+1−1

@@ -479,7 +479,7 @@ static void pcan_free_channels(struct pcan_pccard *card) · 478 unmodified lines
479	if (!netdev)	479	if (!netdev)
480	continue;	480	continue;
481		481
482	strncpy(name, netdev->name, IFNAMSIZ);	482	strlcpy(name, netdev->name, IFNAMSIZ);
483		483
484	unregister_sja1000dev(netdev);	484	unregister_sja1000dev(netdev);
485		485

drivers/net/can/spi/mcp251x.c+22−27

 		return regulator_disable(reg);
 }
-static void mcp251x_open_clean(struct net_device *net)
-{
-	struct mcp251x_priv *priv = netdev_priv(net);
-	struct spi_device *spi = priv->spi;
-	free_irq(spi->irq, priv);
-	mcp251x_hw_sleep(spi);
-	mcp251x_power_enable(priv->transceiver, 0);
-	close_candev(net);
-}
 static int mcp251x_stop(struct net_device *net)
 {
 	struct mcp251x_priv *priv = netdev_priv(net);
 				   flags | IRQF_ONESHOT, DEVICE_NAME, priv);
 	if (ret) {
 		dev_err(&spi->dev, "failed to acquire irq %d\n", spi->irq);
-		mcp251x_power_enable(priv->transceiver, 0);
+		goto out_close;
-		close_candev(net);
-		goto open_unlock;
 	}
 	priv->wq = alloc_workqueue("mcp251x_wq", WQ_FREEZABLE | WQ_MEM_RECLAIM,
 				   0);
+	if (!priv->wq) {
+		ret = -ENOMEM;
+		goto out_clean;
+	}
 	INIT_WORK(&priv->tx_work, mcp251x_tx_work_handler);
 	INIT_WORK(&priv->restart_work, mcp251x_restart_work_handler);
 	ret = mcp251x_hw_reset(spi);
-	if (ret) {
+	if (ret)
-		mcp251x_open_clean(net);
+		goto out_free_wq;
-		goto open_unlock;
-	}
 	ret = mcp251x_setup(net, spi);
-	if (ret) {
+	if (ret)
-		mcp251x_open_clean(net);
+		goto out_free_wq;
-		goto open_unlock;
-	}
 	ret = mcp251x_set_normal_mode(spi);
-	if (ret) {
+	if (ret)
-		mcp251x_open_clean(net);
+		goto out_free_wq;
-		goto open_unlock;
-	}
 	can_led_event(net, CAN_LED_EVENT_OPEN);
 	netif_wake_queue(net);
+	mutex_unlock(&priv->mcp_lock);
-open_unlock:
+	return 0;
+out_free_wq:
+	destroy_workqueue(priv->wq);
+out_clean:
+	free_irq(spi->irq, priv);
+	mcp251x_hw_sleep(spi);
+out_close:
+	mcp251x_power_enable(priv->transceiver, 0);
+	close_candev(net);
 	mutex_unlock(&priv->mcp_lock);
 	return ret;
 }

drivers/net/can/usb/peak_usb/pcan_usb_core.c+5−5

 	dev->state &= ~PCAN_USB_STATE_STARTED;
 	netif_stop_queue(netdev);
+	close_candev(netdev);
+	dev->can.state = CAN_STATE_STOPPED;
 	/* unlink all pending urbs and free used memory */
 	peak_usb_unlink_all_urbs(dev);
 	if (dev->adapter->dev_stop)
 		dev->adapter->dev_stop(dev);
-	close_candev(netdev);
-	dev->can.state = CAN_STATE_STOPPED;
 	/* can set bus off now */
 	if (dev->adapter->dev_set_bus) {
 		int err = dev->adapter->dev_set_bus(dev, 0);
 		dev_prev_siblings = dev->prev_siblings;
 		dev->state &= ~PCAN_USB_STATE_CONNECTED;
-		strncpy(name, netdev->name, IFNAMSIZ);
+		strlcpy(name, netdev->name, IFNAMSIZ);
 		unregister_netdev(netdev);

drivers/net/can/usb/peak_usb/pcan_usb_fd.c+1−1

@@ -841,7 +841,7 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev) · 840 unmodified lines
841	goto err_out;	841	goto err_out;
842		842
843	/* allocate command buffer once for all for the interface */	843	/* allocate command buffer once for all for the interface */
844	pdev->cmd_buffer_addr = kmalloc(PCAN_UFD_CMD_BUFFER_SIZE,	844	pdev->cmd_buffer_addr = kzalloc(PCAN_UFD_CMD_BUFFER_SIZE,
845	GFP_KERNEL);	845	GFP_KERNEL);
846	if (!pdev->cmd_buffer_addr)	846	if (!pdev->cmd_buffer_addr)
847	goto err_out_1;	847	goto err_out_1;

drivers/net/can/usb/peak_usb/pcan_usb_pro.c+1−1

@@ -494,7 +494,7 @@ static int pcan_usb_pro_drv_loaded(struct peak_usb_device *dev, int loaded) · 493 unmodified lines
494	u8 *buffer;	494	u8 *buffer;
495	int err;	495	int err;
496		496
497	buffer = kmalloc(PCAN_USBPRO_FCT_DRVLD_REQ_LEN, GFP_KERNEL);	497	buffer = kzalloc(PCAN_USBPRO_FCT_DRVLD_REQ_LEN, GFP_KERNEL);
498	if (!buffer)	498	if (!buffer)
499	return -ENOMEM;	499	return -ENOMEM;
500		500

drivers/net/dsa/mv88e6xxx/chip.c+2−27

 #include <linux/platform_data/mv88e6xxx.h>
 #include <linux/netdevice.h>
 #include <linux/gpio/consumer.h>
-#include <linux/phy.h>
 #include <linux/phylink.h>
 #include <net/dsa.h>
 		return 0;
 	/* Port's MAC control must not be changed unless the link is down */
-	err = chip->info->ops->port_set_link(chip, port, 0);
+	err = chip->info->ops->port_set_link(chip, port, LINK_FORCED_DOWN);
 	if (err)
 		return err;
 	return port < chip->info->num_internal_phys;
 }
-/* We expect the switch to perform auto negotiation if there is a real
- * phy. However, in the case of a fixed link phy, we force the port
- * settings from the fixed link settings.
- */
-static void mv88e6xxx_adjust_link(struct dsa_switch *ds, int port,
-				  struct phy_device *phydev)
-{
-	struct mv88e6xxx_chip *chip = ds->priv;
-	int err;
-	if (!phy_is_pseudo_fixed_link(phydev) &&
-	    mv88e6xxx_phy_is_internal(ds, port))
-		return;
-	mv88e6xxx_reg_lock(chip);
-	err = mv88e6xxx_port_setup_mac(chip, port, phydev->link, phydev->speed,
-				       phydev->duplex, phydev->pause,
-				       phydev->interface);
-	mv88e6xxx_reg_unlock(chip);
-	if (err && err != -EOPNOTSUPP)
-		dev_err(ds->dev, "p%d: failed to configure MAC\n", port);
-}
 static void mv88e6065_phylink_validate(struct mv88e6xxx_chip *chip, int port,
 				       unsigned long *mask,
 				       struct phylink_link_state *state)
 			err = mv88e6xxx_mdio_register(chip, child, true);
 			if (err) {
 				mv88e6xxx_mdios_unregister(chip);
+				of_node_put(child);
 				return err;
 			}
 		}
 static const struct dsa_switch_ops mv88e6xxx_switch_ops = {
 	.get_tag_protocol	= mv88e6xxx_get_tag_protocol,
 	.setup			= mv88e6xxx_setup,
-	.adjust_link		= mv88e6xxx_adjust_link,
 	.phylink_validate	= mv88e6xxx_validate,
 	.phylink_mac_link_state	= mv88e6xxx_link_state,
 	.phylink_mac_config	= mv88e6xxx_mac_config,

drivers/net/dsa/qca8k.c+8−2

 /*
  * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
  * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
- * Copyright (c) 2015, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved.
  * Copyright (c) 2016 John Crispin <john@phrozen.org>
  */
 	for_each_available_child_of_node(ports, port) {
 		err = of_property_read_u32(port, "reg", &reg);
-		if (err)
+		if (err) {
+			of_node_put(port);
+			of_node_put(ports);
 			return err;
+		}
 		if (!dsa_is_user_port(priv->ds, reg))
 			continue;
 			internal_mdio_mask |= BIT(reg);
 	}
+	of_node_put(ports);
 	if (!external_mdio_mask && !internal_mdio_mask) {
 		dev_err(priv->dev, "no PHYs are defined.\n");
 		return -EINVAL;
 	qca8k_port_set_status(priv, port, 1);
 	priv->port_sts[port].enabled = 1;
+	phy_support_asym_pause(phy);
 	return 0;
 }

drivers/net/dsa/sja1105/sja1105_dynamic_config.c+13−1

 			SJA1105ET_SIZE_L2_LOOKUP_ENTRY, op);
 }
+static size_t sja1105et_dyn_l2_lookup_entry_packing(void *buf, void *entry_ptr,
+						    enum packing_op op)
+{
+	struct sja1105_l2_lookup_entry *entry = entry_ptr;
+	u8 *cmd = buf + SJA1105ET_SIZE_L2_LOOKUP_ENTRY;
+	const int size = SJA1105_SIZE_DYN_CMD;
+	sja1105_packing(cmd, &entry->lockeds, 28, 28, size, op);
+	return sja1105et_l2_lookup_entry_packing(buf, entry_ptr, op);
+}
 static void
 sja1105et_mgmt_route_cmd_packing(void *buf, struct sja1105_dyn_cmd *cmd,
 				 enum packing_op op)
 /* SJA1105E/T: First generation */
 struct sja1105_dynamic_table_ops sja1105et_dyn_ops[BLK_IDX_MAX_DYN] = {
 	[BLK_IDX_L2_LOOKUP] = {
-		.entry_packing = sja1105et_l2_lookup_entry_packing,
+		.entry_packing = sja1105et_dyn_l2_lookup_entry_packing,
 		.cmd_packing = sja1105et_l2_lookup_cmd_packing,
 		.access = (OP_READ | OP_WRITE | OP_DEL),
 		.max_entry_count = SJA1105_MAX_L2_LOOKUP_COUNT,

drivers/net/dsa/sja1105/sja1105_main.c+60−83

@@ -218,7 +218,7 @@ static int sja1105_init_l2_lookup_params(struct sja1105_private *priv) · 217 unmodified lines
218	/* This selects between Independent VLAN Learning (IVL) and	218	/* This selects between Independent VLAN Learning (IVL) and
219	* Shared VLAN Learning (SVL)	219	* Shared VLAN Learning (SVL)
220	*/	220	*/
221	.shared_learn = false,	221	.shared_learn = true,
222	/* Don't discard management traffic based on ENFPORT -	222	/* Don't discard management traffic based on ENFPORT -
223	* we don't perform SMAC port enforcement anyway, so	223	* we don't perform SMAC port enforcement anyway, so
224	* what we are setting here doesn't matter.	224	* what we are setting here doesn't matter.
@@ -625,6 +625,7 @@ static int sja1105_parse_ports_node(struct sja1105_private *priv, · 400 unmodified lines
625	if (of_property_read_u32(child, "reg", &index) < 0) {	625	if (of_property_read_u32(child, "reg", &index) < 0) {
626	dev_err(dev, "Port number not defined in device tree "	626	dev_err(dev, "Port number not defined in device tree "
627	"(property \"reg\")\n");	627	"(property \"reg\")\n");
		628	of_node_put(child);
628	return -ENODEV;	629	return -ENODEV;
629	}	630	}
630		631
@@ -634,6 +635,7 @@ static int sja1105_parse_ports_node(struct sja1105_private *priv, · 3 unmodified lines
634	dev_err(dev, "Failed to read phy-mode or "	635	dev_err(dev, "Failed to read phy-mode or "
635	"phy-interface-type property for port %d\n",	636	"phy-interface-type property for port %d\n",
636	index);	637	index);
		638	of_node_put(child);
637	return -ENODEV;	639	return -ENODEV;
638	}	640	}
639	ports[index].phy_mode = phy_mode;	641	ports[index].phy_mode = phy_mode;
@@ -643,6 +645,7 @@ static int sja1105_parse_ports_node(struct sja1105_private *priv, · 3 unmodified lines
643	if (!of_phy_is_fixed_link(child)) {	645	if (!of_phy_is_fixed_link(child)) {
644	dev_err(dev, "phy-handle or fixed-link "	646	dev_err(dev, "phy-handle or fixed-link "
645	"properties missing!\n");	647	"properties missing!\n");
		648	of_node_put(child);
646	return -ENODEV;	649	return -ENODEV;
647	}	650	}
648	/* phy-handle is missing, but fixed-link isn't.	651	/* phy-handle is missing, but fixed-link isn't.
@@ -1089,8 +1092,13 @@ int sja1105pqrs_fdb_add(struct dsa_switch *ds, int port, · 440 unmodified lines
1089	l2_lookup.vlanid = vid;	1092	l2_lookup.vlanid = vid;
1090	l2_lookup.iotag = SJA1105_S_TAG;	1093	l2_lookup.iotag = SJA1105_S_TAG;
1091	l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);	1094	l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1092	l2_lookup.mask_vlanid = VLAN_VID_MASK;	1095	if (dsa_port_is_vlan_filtering(&ds->ports[port])) {
1093	l2_lookup.mask_iotag = BIT(0);	1096	l2_lookup.mask_vlanid = VLAN_VID_MASK;
		1097	l2_lookup.mask_iotag = BIT(0);
		1098	} else {
		1099	l2_lookup.mask_vlanid = 0;
		1100	l2_lookup.mask_iotag = 0;
		1101	}
1094	l2_lookup.destports = BIT(port);	1102	l2_lookup.destports = BIT(port);
1095		1103
1096	rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,	1104	rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
@@ -1147,8 +1155,13 @@ int sja1105pqrs_fdb_del(struct dsa_switch *ds, int port, · 50 unmodified lines
1147	l2_lookup.vlanid = vid;	1155	l2_lookup.vlanid = vid;
1148	l2_lookup.iotag = SJA1105_S_TAG;	1156	l2_lookup.iotag = SJA1105_S_TAG;
1149	l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);	1157	l2_lookup.mask_macaddr = GENMASK_ULL(ETH_ALEN * 8 - 1, 0);
1150	l2_lookup.mask_vlanid = VLAN_VID_MASK;	1158	if (dsa_port_is_vlan_filtering(&ds->ports[port])) {
1151	l2_lookup.mask_iotag = BIT(0);	1159	l2_lookup.mask_vlanid = VLAN_VID_MASK;
		1160	l2_lookup.mask_iotag = BIT(0);
		1161	} else {
		1162	l2_lookup.mask_vlanid = 0;
		1163	l2_lookup.mask_iotag = 0;
		1164	}
1152	l2_lookup.destports = BIT(port);	1165	l2_lookup.destports = BIT(port);
1153		1166
1154	rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,	1167	rc = sja1105_dynamic_config_read(priv, BLK_IDX_L2_LOOKUP,
@@ -1178,60 +1191,31 @@ static int sja1105_fdb_add(struct dsa_switch *ds, int port, · 23 unmodified lines
1178	const unsigned char *addr, u16 vid)	1191	const unsigned char *addr, u16 vid)
1179	{	1192	{
1180	struct sja1105_private *priv = ds->priv;	1193	struct sja1105_private *priv = ds->priv;
1181	u16 rx_vid, tx_vid;
1182	int rc, i;
1183		1194
1184	if (dsa_port_is_vlan_filtering(&ds->ports[port]))	1195	/* dsa_8021q is in effect when the bridge's vlan_filtering isn't,
1185	return priv->info->fdb_add_cmd(ds, port, addr, vid);	1196	* so the switch still does some VLAN processing internally.
1186		1197	* But Shared VLAN Learning (SVL) is also active, and it will take
1187	/* Since we make use of VLANs even when the bridge core doesn't tell us	1198	* care of autonomous forwarding between the unique pvid's of each
1188	* to, translate these FDB entries into the correct dsa_8021q ones.	1199	* port. Here we just make sure that users can't add duplicate FDB
1189	* The basic idea (also repeats for removal below) is:	1200	* entries when in this mode - the actual VID doesn't matter except
1190	* - Each of the other front-panel ports needs to be able to forward a	1201	* for what gets printed in 'bridge fdb show'. In the case of zero,
1191	* pvid-tagged (aka tagged with their rx_vid) frame that matches this	1202	* no VID gets printed at all.
1192	* DMAC.
1193	* - The CPU port (aka the tx_vid of this port) needs to be able to
1194	* send a frame matching this DMAC to the specified port.
1195	* For a better picture see net/dsa/tag_8021q.c.
1196	*/	1203	*/
1197	for (i = 0; i < SJA1105_NUM_PORTS; i++) {	1204	if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
1198	if (i == port)	1205	vid = 0;
1199	continue;
1200	if (i == dsa_upstream_port(priv->ds, port))
1201	continue;
1202		1206
1203	rx_vid = dsa_8021q_rx_vid(ds, i);	1207	return priv->info->fdb_add_cmd(ds, port, addr, vid);
1204	rc = priv->info->fdb_add_cmd(ds, port, addr, rx_vid);
1205	if (rc < 0)
1206	return rc;
1207	}
1208	tx_vid = dsa_8021q_tx_vid(ds, port);
1209	return priv->info->fdb_add_cmd(ds, port, addr, tx_vid);
1210	}	1208	}
1211		1209
1212	static int sja1105_fdb_del(struct dsa_switch *ds, int port,	1210	static int sja1105_fdb_del(struct dsa_switch *ds, int port,
1213	const unsigned char *addr, u16 vid)	1211	const unsigned char *addr, u16 vid)
1214	{	1212	{
1215	struct sja1105_private *priv = ds->priv;	1213	struct sja1105_private *priv = ds->priv;
1216	u16 rx_vid, tx_vid;
1217	int rc, i;
1218
1219	if (dsa_port_is_vlan_filtering(&ds->ports[port]))
1220	return priv->info->fdb_del_cmd(ds, port, addr, vid);
1221		1214
1222	for (i = 0; i < SJA1105_NUM_PORTS; i++) {	1215	if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
1223	if (i == port)	1216	vid = 0;
1224	continue;
1225	if (i == dsa_upstream_port(priv->ds, port))
1226	continue;
1227		1217
1228	rx_vid = dsa_8021q_rx_vid(ds, i);	1218	return priv->info->fdb_del_cmd(ds, port, addr, vid);
1229	rc = priv->info->fdb_del_cmd(ds, port, addr, rx_vid);
1230	if (rc < 0)
1231	return rc;
1232	}
1233	tx_vid = dsa_8021q_tx_vid(ds, port);
1234	return priv->info->fdb_del_cmd(ds, port, addr, tx_vid);
1235	}	1219	}
1236		1220
1237	static int sja1105_fdb_dump(struct dsa_switch *ds, int port,	1221	static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
@@ -1270,39 +1254,9 @@ static int sja1105_fdb_dump(struct dsa_switch *ds, int port, · 32 unmodified lines
1270	continue;	1254	continue;
1271	u64_to_ether_addr(l2_lookup.macaddr, macaddr);	1255	u64_to_ether_addr(l2_lookup.macaddr, macaddr);
1272		1256
1273	/* On SJA1105 E/T, the switch doesn't implement the LOCKEDS	1257	/* We need to hide the dsa_8021q VLANs from the user. */
1274	* bit, so it doesn't tell us whether a FDB entry is static	1258	if (!dsa_port_is_vlan_filtering(&ds->ports[port]))
1275	* or not.	1259	l2_lookup.vlanid = 0;
1276	* But, of course, we can find out - we're the ones who added
1277	* it in the first place.
1278	*/
1279	if (priv->info->device_id == SJA1105E_DEVICE_ID \|\|
1280	priv->info->device_id == SJA1105T_DEVICE_ID) {
1281	int match;
1282
1283	match = sja1105_find_static_fdb_entry(priv, port,
1284	&l2_lookup);
1285	l2_lookup.lockeds = (match >= 0);
1286	}
1287
1288	/* We need to hide the dsa_8021q VLANs from the user. This
1289	* basically means hiding the duplicates and only showing
1290	* the pvid that is supposed to be active in standalone and
1291	* non-vlan_filtering modes (aka 1).
1292	* - For statically added FDB entries (bridge fdb add), we
1293	* can convert the TX VID (coming from the CPU port) into the
1294	* pvid and ignore the RX VIDs of the other ports.
1295	* - For dynamically learned FDB entries, a single entry with
1296	* no duplicates is learned - that which has the real port's
1297	* pvid, aka RX VID.
1298	*/
1299	if (!dsa_port_is_vlan_filtering(&ds->ports[port])) {
1300	if (l2_lookup.vlanid == tx_vid \|\|
1301	l2_lookup.vlanid == rx_vid)
1302	l2_lookup.vlanid = 1;
1303	else
1304	continue;
1305	}
1306	cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);	1260	cb(macaddr, l2_lookup.vlanid, l2_lookup.lockeds, data);
1307	}	1261	}
1308	return 0;	1262	return 0;
@@ -1594,6 +1548,7 @@ static int sja1105_vlan_prepare(struct dsa_switch *ds, int port, · 285 unmodified lines
1594	*/	1548	*/
1595	static int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled)	1549	static int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled)
1596	{	1550	{
		1551	struct sja1105_l2_lookup_params_entry *l2_lookup_params;
1597	struct sja1105_general_params_entry *general_params;	1552	struct sja1105_general_params_entry *general_params;
1598	struct sja1105_private *priv = ds->priv;	1553	struct sja1105_private *priv = ds->priv;
1599	struct sja1105_table *table;	1554	struct sja1105_table *table;
@@ -1622,6 +1577,28 @@ static int sja1105_vlan_filtering(struct dsa_switch *ds, int port, bool enabled) · 22 unmodified lines
1622	general_params->incl_srcpt1 = enabled;	1577	general_params->incl_srcpt1 = enabled;
1623	general_params->incl_srcpt0 = enabled;	1578	general_params->incl_srcpt0 = enabled;
1624		1579
		1580	/* VLAN filtering => independent VLAN learning.
		1581	* No VLAN filtering => shared VLAN learning.
		1582	*
		1583	* In shared VLAN learning mode, untagged traffic still gets
		1584	* pvid-tagged, and the FDB table gets populated with entries
		1585	* containing the "real" (pvid or from VLAN tag) VLAN ID.
		1586	* However the switch performs a masked L2 lookup in the FDB,
		1587	* effectively only looking up a frame's DMAC (and not VID) for the
		1588	* forwarding decision.
		1589	*
		1590	* This is extremely convenient for us, because in modes with
		1591	* vlan_filtering=0, dsa_8021q actually installs unique pvid's into
		1592	* each front panel port. This is good for identification but breaks
		1593	* learning badly - the VID of the learnt FDB entry is unique, aka
		1594	* no frames coming from any other port are going to have it. So
		1595	* for forwarding purposes, this is as though learning was broken
		1596	* (all frames get flooded).
		1597	*/
		1598	table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP_PARAMS];
		1599	l2_lookup_params = table->entries;
		1600	l2_lookup_params->shared_learn = !enabled;
		1601
1625	rc = sja1105_static_config_reload(priv);	1602	rc = sja1105_static_config_reload(priv);
1626	if (rc)	1603	if (rc)
1627	dev_err(ds->dev, "Failed to change VLAN Ethertype\n");	1604	dev_err(ds->dev, "Failed to change VLAN Ethertype\n");
@@ -1751,6 +1728,8 @@ static void sja1105_teardown(struct dsa_switch *ds) · 123 unmodified lines
1751		1728
1752	cancel_work_sync(&priv->tagger_data.rxtstamp_work);	1729	cancel_work_sync(&priv->tagger_data.rxtstamp_work);
1753	skb_queue_purge(&priv->tagger_data.skb_rxtstamp_queue);	1730	skb_queue_purge(&priv->tagger_data.skb_rxtstamp_queue);
		1731	sja1105_ptp_clock_unregister(priv);
		1732	sja1105_static_config_free(&priv->static_config);
1754	}	1733	}
1755		1734
1756	static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,	1735	static int sja1105_mgmt_xmit(struct dsa_switch *ds, int port, int slot,
@@ -2208,9 +2187,7 @@ static int sja1105_remove(struct spi_device *spi) · 451 unmodified lines
2208	{	2187	{
2209	struct sja1105_private *priv = spi_get_drvdata(spi);	2188	struct sja1105_private *priv = spi_get_drvdata(spi);
2210		2189
2211	sja1105_ptp_clock_unregister(priv);
2212	dsa_unregister_switch(priv->ds);	2190	dsa_unregister_switch(priv->ds);
2213	sja1105_static_config_free(&priv->static_config);
2214	return 0;	2191	return 0;
2215	}	2192	}
2216		2193

drivers/net/dsa/sja1105/sja1105_ptp.c+3−4

 		.mult = SJA1105_CC_MULT,
 	};
 	mutex_init(&priv->ptp_lock);
-	INIT_DELAYED_WORK(&priv->refresh_work, sja1105_ptp_overflow_check);
-	schedule_delayed_work(&priv->refresh_work, SJA1105_REFRESH_INTERVAL);
 	priv->ptp_caps = sja1105_ptp_caps;
 	priv->clock = ptp_clock_register(&priv->ptp_caps, ds->dev);
 	if (IS_ERR_OR_NULL(priv->clock))
 		return PTR_ERR(priv->clock);
+	INIT_DELAYED_WORK(&priv->refresh_work, sja1105_ptp_overflow_check);
+	schedule_delayed_work(&priv->refresh_work, SJA1105_REFRESH_INTERVAL);
 	return sja1105_ptp_reset(priv);
 }

drivers/net/ethernet/8390/Kconfig+2−2

@@ -12,8 +12,8 @@ config NET_VENDOR_8390 · 11 unmodified lines
12		12
13	Note that the answer to this question doesn't directly affect the	13	Note that the answer to this question doesn't directly affect the
14	kernel: saying N will just cause the configurator to skip all	14	kernel: saying N will just cause the configurator to skip all
15	the questions about Western Digital cards. If you say Y, you will be	15	the questions about National Semiconductor 8390 cards. If you say Y,
16	asked for your specific card in the following questions.	16	you will be asked for your specific card in the following questions.
17		17
18	if NET_VENDOR_8390	18	if NET_VENDOR_8390
19		19

drivers/net/ethernet/agere/et131x.c+1−1

@@ -2362,7 +2362,7 @@ static int et131x_tx_dma_memory_alloc(struct et131x_adapter *adapter) · 2361 unmodified lines
2362		2362
2363	/* Allocate memory for the TCB's (Transmit Control Block) */	2363	/* Allocate memory for the TCB's (Transmit Control Block) */
2364	tx_ring->tcb_ring = kcalloc(NUM_TCB, sizeof(struct tcb),	2364	tx_ring->tcb_ring = kcalloc(NUM_TCB, sizeof(struct tcb),
2365	GFP_ATOMIC \| GFP_DMA);	2365	GFP_KERNEL \| GFP_DMA);
2366	if (!tx_ring->tcb_ring)	2366	if (!tx_ring->tcb_ring)
2367	return -ENOMEM;	2367	return -ENOMEM;
2368		2368

drivers/net/ethernet/allwinner/sun4i-emac.c+3−1

 		goto out_clk_disable_unprepare;
 	}
-	db->phy_node = of_parse_phandle(np, "phy", 0);
+	db->phy_node = of_parse_phandle(np, "phy-handle", 0);
+	if (!db->phy_node)
+		db->phy_node = of_parse_phandle(np, "phy", 0);
 	if (!db->phy_node) {
 		dev_err(&pdev->dev, "no associated PHY\n");
 		ret = -ENODEV;

drivers/net/ethernet/amd/Kconfig+1−1

@@ -14,7 +14,7 @@ config NET_VENDOR_AMD · 13 unmodified lines
14	say Y.	14	say Y.
15		15
16	Note that the answer to this question does not directly affect	16	Note that the answer to this question does not directly affect
17	the kernel: saying N will just case the configurator to skip all	17	the kernel: saying N will just cause the configurator to skip all
18	the questions regarding AMD chipsets. If you say Y, you will be asked	18	the questions regarding AMD chipsets. If you say Y, you will be asked
19	for your specific chipset/driver in the following questions.	19	for your specific chipset/driver in the following questions.
20		20

drivers/net/ethernet/apple/Kconfig+2−2

@@ -11,8 +11,8 @@ config NET_VENDOR_APPLE · 10 unmodified lines
11	If you have a network (Ethernet) card belonging to this class, say Y.	11	If you have a network (Ethernet) card belonging to this class, say Y.
12		12
13	Note that the answer to this question doesn't directly affect the	13	Note that the answer to this question doesn't directly affect the
14	kernel: saying N will just cause the configurator to skip all	14	kernel: saying N will just cause the configurator to skip all the
15	the questions about IBM devices. If you say Y, you will be asked for	15	questions about Apple devices. If you say Y, you will be asked for
16	your specific card in the following questions.	16	your specific card in the following questions.
17		17
18	if NET_VENDOR_APPLE	18	if NET_VENDOR_APPLE

drivers/net/ethernet/atheros/ag71xx.c+1−1

@@ -1141,7 +1141,7 @@ static int ag71xx_rings_init(struct ag71xx *ag) · 1140 unmodified lines
1141		1141
1142	tx->descs_cpu = dma_alloc_coherent(&ag->pdev->dev,	1142	tx->descs_cpu = dma_alloc_coherent(&ag->pdev->dev,
1143	ring_size * AG71XX_DESC_SIZE,	1143	ring_size * AG71XX_DESC_SIZE,
1144	&tx->descs_dma, GFP_ATOMIC);	1144	&tx->descs_dma, GFP_KERNEL);
1145	if (!tx->descs_cpu) {	1145	if (!tx->descs_cpu) {
1146	kfree(tx->buf);	1146	kfree(tx->buf);
1147	tx->buf = NULL;	1147	tx->buf = NULL;

drivers/net/ethernet/broadcom/Kconfig+3−3

@@ -14,9 +14,9 @@ config NET_VENDOR_BROADCOM · 13 unmodified lines
14	say Y.	14	say Y.
15		15
16	Note that the answer to this question does not directly affect	16	Note that the answer to this question does not directly affect
17	the kernel: saying N will just case the configurator to skip all	17	the kernel: saying N will just cause the configurator to skip all
18	the questions regarding AMD chipsets. If you say Y, you will be asked	18	the questions regarding Broadcom chipsets. If you say Y, you will
19	for your specific chipset/driver in the following questions.	19	be asked for your specific chipset/driver in the following questions.
20		20
21	if NET_VENDOR_BROADCOM	21	if NET_VENDOR_BROADCOM
22		22

drivers/net/ethernet/broadcom/bcmsysport.c+1−1

@@ -992,7 +992,7 @@ static int bcm_sysport_poll(struct napi_struct *napi, int budget) · 991 unmodified lines
992	{	992	{
993	struct bcm_sysport_priv *priv =	993	struct bcm_sysport_priv *priv =
994	container_of(napi, struct bcm_sysport_priv, napi);	994	container_of(napi, struct bcm_sysport_priv, napi);
995	struct dim_sample dim_sample;	995	struct dim_sample dim_sample = {};
996	unsigned int work_done = 0;	996	unsigned int work_done = 0;
997		997
998	work_done = bcm_sysport_desc_rx(priv, budget);	998	work_done = bcm_sysport_desc_rx(priv, budget);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c+1−2

@@ -1934,8 +1934,7 @@ u16 bnx2x_select_queue(struct net_device dev, struct sk_buff skb, · 1933 unmodified lines
1934	}	1934	}
1935		1935
1936	/* select a non-FCoE queue */	1936	/* select a non-FCoE queue */
1937	return netdev_pick_tx(dev, skb, NULL) %	1937	return netdev_pick_tx(dev, skb, NULL) % (BNX2X_NUM_ETH_QUEUES(bp));
1938	(BNX2X_NUM_ETH_QUEUES(bp) * bp->max_cos);
1939	}	1938	}
1940		1939
1941	void bnx2x_set_num_queues(struct bnx2x *bp)	1940	void bnx2x_set_num_queues(struct bnx2x *bp)

drivers/net/ethernet/broadcom/bnxt/bnxt.c+1−1

@@ -2136,7 +2136,7 @@ static int bnxt_poll(struct napi_struct *napi, int budget) · 2135 unmodified lines
2136	}	2136	}
2137	}	2137	}
2138	if (bp->flags & BNXT_FLAG_DIM) {	2138	if (bp->flags & BNXT_FLAG_DIM) {
2139	struct dim_sample dim_sample;	2139	struct dim_sample dim_sample = {};
2140		2140
2141	dim_update_sample(cpr->event_ctr,	2141	dim_update_sample(cpr->event_ctr,
2142	cpr->rx_packets,	2142	cpr->rx_packets,

drivers/net/ethernet/broadcom/genet/bcmgenet.c+1−1

@@ -1895,7 +1895,7 @@ static int bcmgenet_rx_poll(struct napi_struct *napi, int budget) · 1894 unmodified lines
1895	{	1895	{
1896	struct bcmgenet_rx_ring *ring = container_of(napi,	1896	struct bcmgenet_rx_ring *ring = container_of(napi,
1897	struct bcmgenet_rx_ring, napi);	1897	struct bcmgenet_rx_ring, napi);
1898	struct dim_sample dim_sample;	1898	struct dim_sample dim_sample = {};
1899	unsigned int work_done;	1899	unsigned int work_done;
1900		1900
1901	work_done = bcmgenet_desc_rx(ring, budget);	1901	work_done = bcmgenet_desc_rx(ring, budget);

drivers/net/ethernet/cavium/thunder/thunder_bgx.c+6−12

 				u8 *dst)
 {
 	u8 mac[ETH_ALEN];
-	int ret;
+	u8 *addr;
-	ret = fwnode_property_read_u8_array(acpi_fwnode_handle(adev),
+	addr = fwnode_get_mac_address(acpi_fwnode_handle(adev), mac, ETH_ALEN);
-					    "mac-address", mac, ETH_ALEN);
+	if (!addr) {
-	if (ret)
-		goto out;
-	if (!is_valid_ether_addr(mac)) {
 		dev_err(dev, "MAC address invalid: %pM\n", mac);
-		ret = -EINVAL;
+		return -EINVAL;
-		goto out;
 	}
 	dev_info(dev, "MAC address set to: %pM\n", mac);
-	memcpy(dst, mac, ETH_ALEN);
+	ether_addr_copy(dst, mac);
-out:
+	return 0;
-	return ret;
 }
 /* Currently only sets the MAC address. */

drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c+4−1

 	if (!adapter->regs) {
 		dev_err(&pdev->dev, "cannot map device registers\n");
 		err = -ENOMEM;
-		goto out_free_adapter;
+		goto out_free_adapter_nofail;
 	}
 	adapter->pdev = pdev;
 		if (adapter->port[i])
 			free_netdev(adapter->port[i]);
+out_free_adapter_nofail:
+	kfree_skb(adapter->nofail_skb);
 out_free_adapter:
 	kfree(adapter);

drivers/net/ethernet/emulex/benet/be_cmds.c+2−4

 	int num = 0, status = 0;
 	struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
-	spin_lock(&adapter->mcc_cq_lock);
+	spin_lock_bh(&adapter->mcc_cq_lock);
 	while ((compl = be_mcc_compl_get(adapter))) {
 		if (compl->flags & CQE_FLAGS_ASYNC_MASK) {
 	if (num)
 		be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num);
-	spin_unlock(&adapter->mcc_cq_lock);
+	spin_unlock_bh(&adapter->mcc_cq_lock);
 	return status;
 }
 		if (be_check_error(adapter, BE_ERROR_ANY))
 			return -EIO;
-		local_bh_disable();
 		status = be_process_mcc(adapter);
-		local_bh_enable();
 		if (atomic_read(&mcc_obj->q.used) == 0)
 			break;

drivers/net/ethernet/emulex/benet/be_main.c+0−2

 	 * mcc completions
 	 */
 	if (!netif_running(adapter->netdev)) {
-		local_bh_disable();
 		be_process_mcc(adapter);
-		local_bh_enable();
 		goto reschedule;
 	}

drivers/net/ethernet/freescale/enetc/Kconfig+2−0

 config FSL_ENETC
 	tristate "ENETC PF driver"
 	depends on PCI && PCI_MSI && (ARCH_LAYERSCAPE || COMPILE_TEST)
+	select PHYLIB
 	help
 	  This driver supports NXP ENETC gigabit ethernet controller PCIe
 	  physical function (PF) devices, managing ENETC Ports at a privileged
 config FSL_ENETC_VF
 	tristate "ENETC VF driver"
 	depends on PCI && PCI_MSI && (ARCH_LAYERSCAPE || COMPILE_TEST)
+	select PHYLIB
 	help
 	  This driver supports NXP ENETC gigabit ethernet controller PCIe
 	  virtual function (VF) devices enabled by the ENETC PF driver.

drivers/net/ethernet/freescale/fman/fman.c+0−3

  * buffers when not using jumbo frames.
  * Must be large enough to accommodate the network MTU, but small enough
  * to avoid wasting skb memory.
- *
- * Could be overridden once, at boot-time, via the
- * fm_set_max_frm() callback.
  */
 static int fsl_fm_max_frm = FSL_FM_MAX_FRAME_SIZE;
 module_param(fsl_fm_max_frm, int, 0);

drivers/net/ethernet/google/gve/gve.h+3−5

 struct gve_rx_desc_queue {
 	struct gve_rx_desc *desc_ring; /* the descriptor ring */
 	dma_addr_t bus; /* the bus for the desc_ring */
-	u32 cnt; /* free-running total number of completed packets */
-	u32 fill_cnt; /* free-running total number of descriptors posted */
-	u32 mask; /* masks the cnt to the size of the ring */
 	u8 seqno; /* the next expected seqno for this desc*/
 };
 	dma_addr_t data_bus; /* dma mapping of the slots */
 	struct gve_rx_slot_page_info *page_info; /* page info of the buffers */
 	struct gve_queue_page_list *qpl; /* qpl assigned to this queue */
-	u32 mask; /* masks the cnt to the size of the ring */
-	u32 cnt; /* free-running total number of completed packets */
 };
 struct gve_priv;
 	struct gve_rx_data_queue data;
 	u64 rbytes; /* free-running bytes received */
 	u64 rpackets; /* free-running packets received */
+	u32 cnt; /* free-running total number of completed packets */
+	u32 fill_cnt; /* free-running total number of descs and buffs posted */
+	u32 mask; /* masks the cnt and fill_cnt to the size of the ring */
 	u32 q_num; /* queue index */
 	u32 ntfy_id; /* notification block index */
 	struct gve_queue_resources *q_resources; /* head and tail pointer idx */

drivers/net/ethernet/google/gve/gve_ethtool.c+2−2

@@ -138,8 +138,8 @@ gve_get_ethtool_stats(struct net_device *netdev, · 137 unmodified lines
138	for (ring = 0; ring < priv->rx_cfg.num_queues; ring++) {	138	for (ring = 0; ring < priv->rx_cfg.num_queues; ring++) {
139	struct gve_rx_ring *rx = &priv->rx[ring];	139	struct gve_rx_ring *rx = &priv->rx[ring];
140		140
141	data[i++] = rx->desc.cnt;	141	data[i++] = rx->cnt;
142	data[i++] = rx->desc.fill_cnt;	142	data[i++] = rx->fill_cnt;
143	}	143	}
144	} else {	144	} else {
145	i += priv->rx_cfg.num_queues * NUM_GVE_RX_CNTS;	145	i += priv->rx_cfg.num_queues * NUM_GVE_RX_CNTS;

drivers/net/ethernet/google/gve/gve_rx.c+15−19

 	rx->data.qpl = NULL;
 	kvfree(rx->data.page_info);
-	slots = rx->data.mask + 1;
+	slots = rx->mask + 1;
 	bytes = sizeof(*rx->data.data_ring) * slots;
 	dma_free_coherent(dev, bytes, rx->data.data_ring,
 			  rx->data.data_bus);
 	/* Allocate one page per Rx queue slot. Each page is split into two
 	 * packet buffers, when possible we "page flip" between the two.
 	 */
-	slots = rx->data.mask + 1;
+	slots = rx->mask + 1;
 	rx->data.page_info = kvzalloc(slots *
 				      sizeof(*rx->data.page_info), GFP_KERNEL);
 	rx->q_num = idx;
 	slots = priv->rx_pages_per_qpl;
-	rx->data.mask = slots - 1;
+	rx->mask = slots - 1;
 	/* alloc rx data ring */
 	bytes = sizeof(*rx->data.data_ring) * slots;
 		err = -ENOMEM;
 		goto abort_with_slots;
 	}
-	rx->desc.fill_cnt = filled_pages;
+	rx->fill_cnt = filled_pages;
 	/* Ensure data ring slots (packet buffers) are visible. */
 	dma_wmb();
 		err = -ENOMEM;
 		goto abort_with_q_resources;
 	}
-	rx->desc.mask = slots - 1;
+	rx->mask = slots - 1;
-	rx->desc.cnt = 0;
+	rx->cnt = 0;
 	rx->desc.seqno = 1;
 	gve_rx_add_to_block(priv, idx);
 {
 	u32 db_idx = be32_to_cpu(rx->q_resources->db_index);
-	iowrite32be(rx->desc.fill_cnt, &priv->db_bar2[db_idx]);
+	iowrite32be(rx->fill_cnt, &priv->db_bar2[db_idx]);
 }
 static enum pkt_hash_types gve_rss_type(__be16 pkt_flags)
 }
 static bool gve_rx(struct gve_rx_ring *rx, struct gve_rx_desc *rx_desc,
-		   netdev_features_t feat)
+		   netdev_features_t feat, u32 idx)
 {
 	struct gve_rx_slot_page_info *page_info;
 	struct gve_priv *priv = rx->gve;
 	struct sk_buff *skb;
 	int pagecount;
 	u16 len;
-	u32 idx;
 	/* drop this packet */
 	if (unlikely(rx_desc->flags_seq & GVE_RXF_ERR))
 		return true;
 	len = be16_to_cpu(rx_desc->len) - GVE_RX_PAD;
-	idx = rx->data.cnt & rx->data.mask;
 	page_info = &rx->data.page_info[idx];
 	/* gvnic can only receive into registered segments. If the buffer
 	if (!skb)
 		return true;
-	rx->data.cnt++;
 	if (likely(feat & NETIF_F_RXCSUM)) {
 		/* NIC passes up the partial sum */
 		if (rx_desc->csum)
 	__be16 flags_seq;
 	u32 next_idx;
-	next_idx = rx->desc.cnt & rx->desc.mask;
+	next_idx = rx->cnt & rx->mask;
 	desc = rx->desc.desc_ring + next_idx;
 	flags_seq = desc->flags_seq;
 {
 	struct gve_priv *priv = rx->gve;
 	struct gve_rx_desc *desc;
-	u32 cnt = rx->desc.cnt;
+	u32 cnt = rx->cnt;
-	u32 idx = cnt & rx->desc.mask;
+	u32 idx = cnt & rx->mask;
 	u32 work_done = 0;
 	u64 bytes = 0;
 			   rx->q_num, GVE_SEQNO(desc->flags_seq),
 			   rx->desc.seqno);
 		bytes += be16_to_cpu(desc->len) - GVE_RX_PAD;
-		if (!gve_rx(rx, desc, feat))
+		if (!gve_rx(rx, desc, feat, idx))
 			gve_schedule_reset(priv);
 		cnt++;
-		idx = cnt & rx->desc.mask;
+		idx = cnt & rx->mask;
 		desc = rx->desc.desc_ring + idx;
 		rx->desc.seqno = gve_next_seqno(rx->desc.seqno);
 		work_done++;
 	rx->rpackets += work_done;
 	rx->rbytes += bytes;
 	u64_stats_update_end(&rx->statss);
-	rx->desc.cnt = cnt;
+	rx->cnt = cnt;
-	rx->desc.fill_cnt += work_done;
+	rx->fill_cnt += work_done;
 	/* restock desc ring slots */
 	dma_wmb();	/* Ensure descs are visible before ringing doorbell */

drivers/net/ethernet/hisilicon/hip04_eth.c+16−12

 	unsigned int reg_inten;
 	struct napi_struct napi;
+	struct device *dev;
 	struct net_device *ndev;
 	struct tx_desc *tx_desc;
 static inline unsigned int tx_count(unsigned int head, unsigned int tail)
 {
-	return (head - tail) % (TX_DESC_NUM - 1);
+	return (head - tail) % TX_DESC_NUM;
 }
 static void hip04_config_port(struct net_device *ndev, u32 speed, u32 duplex)
 		}
 		if (priv->tx_phys[tx_tail]) {
-			dma_unmap_single(&ndev->dev, priv->tx_phys[tx_tail],
+			dma_unmap_single(priv->dev, priv->tx_phys[tx_tail],
 					 priv->tx_skb[tx_tail]->len,
 					 DMA_TO_DEVICE);
 			priv->tx_phys[tx_tail] = 0;
 		return NETDEV_TX_BUSY;
 	}
-	phys = dma_map_single(&ndev->dev, skb->data, skb->len, DMA_TO_DEVICE);
+	phys = dma_map_single(priv->dev, skb->data, skb->len, DMA_TO_DEVICE);
-	if (dma_mapping_error(&ndev->dev, phys)) {
+	if (dma_mapping_error(priv->dev, phys)) {
 		dev_kfree_skb(skb);
 		return NETDEV_TX_OK;
 	}
 	u16 len;
 	u32 err;
+	/* clean up tx descriptors */
+	tx_remaining = hip04_tx_reclaim(ndev, false);
 	while (cnt && !last) {
 		buf = priv->rx_buf[priv->rx_head];
 		skb = build_skb(buf, priv->rx_buf_size);
 			goto refill;
 		}
-		dma_unmap_single(&ndev->dev, priv->rx_phys[priv->rx_head],
+		dma_unmap_single(priv->dev, priv->rx_phys[priv->rx_head],
 				 RX_BUF_SIZE, DMA_FROM_DEVICE);
 		priv->rx_phys[priv->rx_head] = 0;
 		buf = netdev_alloc_frag(priv->rx_buf_size);
 		if (!buf)
 			goto done;
-		phys = dma_map_single(&ndev->dev, buf,
+		phys = dma_map_single(priv->dev, buf,
 				      RX_BUF_SIZE, DMA_FROM_DEVICE);
-		if (dma_mapping_error(&ndev->dev, phys))
+		if (dma_mapping_error(priv->dev, phys))
 			goto done;
 		priv->rx_buf[priv->rx_head] = buf;
 		priv->rx_phys[priv->rx_head] = phys;
 	}
 	napi_complete_done(napi, rx);
 done:
-	/* clean up tx descriptors and start a new timer if necessary */
+	/* start a new timer if necessary */
-	tx_remaining = hip04_tx_reclaim(ndev, false);
 	if (rx < budget && tx_remaining)
 		hip04_start_tx_timer(priv);
 	for (i = 0; i < RX_DESC_NUM; i++) {
 		dma_addr_t phys;
-		phys = dma_map_single(&ndev->dev, priv->rx_buf[i],
+		phys = dma_map_single(priv->dev, priv->rx_buf[i],
 				      RX_BUF_SIZE, DMA_FROM_DEVICE);
-		if (dma_mapping_error(&ndev->dev, phys))
+		if (dma_mapping_error(priv->dev, phys))
 			return -EIO;
 		priv->rx_phys[i] = phys;
 	for (i = 0; i < RX_DESC_NUM; i++) {
 		if (priv->rx_phys[i]) {
-			dma_unmap_single(&ndev->dev, priv->rx_phys[i],
+			dma_unmap_single(priv->dev, priv->rx_phys[i],
 					 RX_BUF_SIZE, DMA_FROM_DEVICE);
 			priv->rx_phys[i] = 0;
 		}
 		return -ENOMEM;
 	priv = netdev_priv(ndev);
+	priv->dev = d;
 	priv->ndev = ndev;
 	platform_set_drvdata(pdev, ndev);
 	SET_NETDEV_DEV(ndev, &pdev->dev);

drivers/net/ethernet/ibm/ehea/ehea_main.c+1−1

@@ -3251,7 +3251,7 @@ static int ehea_mem_notifier(struct notifier_block *nb, · 3250 unmodified lines
3251	switch (action) {	3251	switch (action) {
3252	case MEM_CANCEL_OFFLINE:	3252	case MEM_CANCEL_OFFLINE:
3253	pr_info("memory offlining canceled");	3253	pr_info("memory offlining canceled");
3254	/* Fall through: re-add canceled memory block */	3254	/* Fall through - re-add canceled memory block */
3255		3255
3256	case MEM_ONLINE:	3256	case MEM_ONLINE:
3257	pr_info("memory is going online");	3257	pr_info("memory is going online");

drivers/net/ethernet/marvell/mvmdio.c+22−9

 	init_waitqueue_head(&dev->smi_busy_wait);
-	for (i = 0; i < ARRAY_SIZE(dev->clk); i++) {
+	if (pdev->dev.of_node) {
-		dev->clk[i] = of_clk_get(pdev->dev.of_node, i);
+		for (i = 0; i < ARRAY_SIZE(dev->clk); i++) {
-		if (PTR_ERR(dev->clk[i]) == -EPROBE_DEFER) {
+			dev->clk[i] = of_clk_get(pdev->dev.of_node, i);
+			if (PTR_ERR(dev->clk[i]) == -EPROBE_DEFER) {
+				ret = -EPROBE_DEFER;
+				goto out_clk;
+			}
+			if (IS_ERR(dev->clk[i]))
+				break;
+			clk_prepare_enable(dev->clk[i]);
+		}
+		if (!IS_ERR(of_clk_get(pdev->dev.of_node,
+				       ARRAY_SIZE(dev->clk))))
+			dev_warn(&pdev->dev,
+				 "unsupported number of clocks, limiting to the first "
+				 __stringify(ARRAY_SIZE(dev->clk)) "\n");
+	} else {
+		dev->clk[0] = clk_get(&pdev->dev, NULL);
+		if (PTR_ERR(dev->clk[0]) == -EPROBE_DEFER) {
 			ret = -EPROBE_DEFER;
 			goto out_clk;
 		}
-		if (IS_ERR(dev->clk[i]))
+		if (!IS_ERR(dev->clk[0]))
-			break;
+			clk_prepare_enable(dev->clk[0]);
-		clk_prepare_enable(dev->clk[i]);
 	}
-	if (!IS_ERR(of_clk_get(pdev->dev.of_node, ARRAY_SIZE(dev->clk))))
-		dev_warn(&pdev->dev, "unsupported number of clocks, limiting to the first "
-			 __stringify(ARRAY_SIZE(dev->clk)) "\n");
 	dev->err_interrupt = platform_get_irq(pdev, 0);
 	if (dev->err_interrupt > 0 &&

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c+40−47

@@ -811,6 +811,26 @@ static int mvpp2_swf_bm_pool_init(struct mvpp2_port *port) · 810 unmodified lines
811	return 0;	811	return 0;
812	}	812	}
813		813
		814	static void mvpp2_set_hw_csum(struct mvpp2_port *port,
		815	enum mvpp2_bm_pool_log_num new_long_pool)
		816	{
		817	const netdev_features_t csums = NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM;
		818
		819	/* Update L4 checksum when jumbo enable/disable on port.
		820	* Only port 0 supports hardware checksum offload due to
		821	* the Tx FIFO size limitation.
		822	* Also, don't set NETIF_F_HW_CSUM because L3_offset in TX descriptor
		823	* has 7 bits, so the maximum L3 offset is 128.
		824	*/
		825	if (new_long_pool == MVPP2_BM_JUMBO && port->id != 0) {
		826	port->dev->features &= ~csums;
		827	port->dev->hw_features &= ~csums;
		828	} else {
		829	port->dev->features \|= csums;
		830	port->dev->hw_features \|= csums;
		831	}
		832	}
		833
814	static int mvpp2_bm_update_mtu(struct net_device *dev, int mtu)	834	static int mvpp2_bm_update_mtu(struct net_device *dev, int mtu)
815	{	835	{
816	struct mvpp2_port *port = netdev_priv(dev);	836	struct mvpp2_port *port = netdev_priv(dev);
@@ -843,15 +863,7 @@ static int mvpp2_bm_update_mtu(struct net_device *dev, int mtu) · 26 unmodified lines
843	/* Add port to new short & long pool */	863	/* Add port to new short & long pool */
844	mvpp2_swf_bm_pool_init(port);	864	mvpp2_swf_bm_pool_init(port);
845		865
846	/* Update L4 checksum when jumbo enable/disable on port */	866	mvpp2_set_hw_csum(port, new_long_pool);
847	if (new_long_pool == MVPP2_BM_JUMBO && port->id != 0) {
848	dev->features &= ~(NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM);
849	dev->hw_features &= ~(NETIF_F_IP_CSUM \|
850	NETIF_F_IPV6_CSUM);
851	} else {
852	dev->features \|= NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM;
853	dev->hw_features \|= NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM;
854	}
855	}	867	}
856		868
857	dev->mtu = mtu;	869	dev->mtu = mtu;
@@ -3700,6 +3712,7 @@ static int mvpp2_set_mac_address(struct net_device dev, void p) · 2842 unmodified lines
3700	static int mvpp2_change_mtu(struct net_device *dev, int mtu)	3712	static int mvpp2_change_mtu(struct net_device *dev, int mtu)
3701	{	3713	{
3702	struct mvpp2_port *port = netdev_priv(dev);	3714	struct mvpp2_port *port = netdev_priv(dev);
		3715	bool running = netif_running(dev);
3703	int err;	3716	int err;
3704		3717
3705	if (!IS_ALIGNED(MVPP2_RX_PKT_SIZE(mtu), 8)) {	3718	if (!IS_ALIGNED(MVPP2_RX_PKT_SIZE(mtu), 8)) {
@@ -3708,40 +3721,24 @@ static int mvpp2_change_mtu(struct net_device *dev, int mtu) · 2 unmodified lines
3708	mtu = ALIGN(MVPP2_RX_PKT_SIZE(mtu), 8);	3721	mtu = ALIGN(MVPP2_RX_PKT_SIZE(mtu), 8);
3709	}	3722	}
3710		3723
3711	if (!netif_running(dev)) {	3724	if (running)
3712	err = mvpp2_bm_update_mtu(dev, mtu);	3725	mvpp2_stop_dev(port);
3713	if (!err) {
3714	port->pkt_size = MVPP2_RX_PKT_SIZE(mtu);
3715	return 0;
3716	}
3717
3718	/* Reconfigure BM to the original MTU */
3719	err = mvpp2_bm_update_mtu(dev, dev->mtu);
3720	if (err)
3721	goto log_error;
3722	}
3723
3724	mvpp2_stop_dev(port);
3725		3726
3726	err = mvpp2_bm_update_mtu(dev, mtu);	3727	err = mvpp2_bm_update_mtu(dev, mtu);
3727	if (!err) {	3728	if (err) {
		3729	netdev_err(dev, "failed to change MTU\n");
		3730	/* Reconfigure BM to the original MTU */
		3731	mvpp2_bm_update_mtu(dev, dev->mtu);
		3732	} else {
3728	port->pkt_size = MVPP2_RX_PKT_SIZE(mtu);	3733	port->pkt_size = MVPP2_RX_PKT_SIZE(mtu);
3729	goto out_start;
3730	}	3734	}
3731		3735
3732	/* Reconfigure BM to the original MTU */	3736	if (running) {
3733	err = mvpp2_bm_update_mtu(dev, dev->mtu);	3737	mvpp2_start_dev(port);
3734	if (err)	3738	mvpp2_egress_enable(port);
3735	goto log_error;	3739	mvpp2_ingress_enable(port);
3736		3740	}
3737	out_start:
3738	mvpp2_start_dev(port);
3739	mvpp2_egress_enable(port);
3740	mvpp2_ingress_enable(port);
3741		3741
3742	return 0;
3743	log_error:
3744	netdev_err(dev, "failed to change MTU\n");
3745	return err;	3742	return err;
3746	}	3743	}
3747		3744
@@ -4739,9 +4736,9 @@ static void mvpp2_xlg_config(struct mvpp2_port *port, unsigned int mode, · 991 unmodified lines
4739	else	4736	else
4740	ctrl0 &= ~MVPP22_XLG_CTRL0_RX_FLOW_CTRL_EN;	4737	ctrl0 &= ~MVPP22_XLG_CTRL0_RX_FLOW_CTRL_EN;
4741		4738
4742	ctrl4 &= ~MVPP22_XLG_CTRL4_MACMODSELECT_GMAC;	4739	ctrl4 &= ~(MVPP22_XLG_CTRL4_MACMODSELECT_GMAC \|
4743	ctrl4 \|= MVPP22_XLG_CTRL4_FWD_FC \| MVPP22_XLG_CTRL4_FWD_PFC \|	4740	MVPP22_XLG_CTRL4_EN_IDLE_CHECK);
4744	MVPP22_XLG_CTRL4_EN_IDLE_CHECK;	4741	ctrl4 \|= MVPP22_XLG_CTRL4_FWD_FC \| MVPP22_XLG_CTRL4_FWD_PFC;
4745		4742
4746	if (old_ctrl0 != ctrl0)	4743	if (old_ctrl0 != ctrl0)
4747	writel(ctrl0, port->base + MVPP22_XLG_CTRL0_REG);	4744	writel(ctrl0, port->base + MVPP22_XLG_CTRL0_REG);
@@ -5208,10 +5205,7 @@ static int mvpp2_port_probe(struct platform_device *pdev, · 460 unmodified lines
5208	dev->features \|= NETIF_F_NTUPLE;	5205	dev->features \|= NETIF_F_NTUPLE;
5209	}	5206	}
5210		5207
5211	if (port->pool_long->id == MVPP2_BM_JUMBO && port->id != 0) {	5208	mvpp2_set_hw_csum(port, port->pool_long->id);
5212	dev->features &= ~(NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM);
5213	dev->hw_features &= ~(NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM);
5214	}
5215		5209
5216	dev->vlan_features \|= features;	5210	dev->vlan_features \|= features;
5217	dev->gso_max_segs = MVPP2_MAX_TSO_SEGS;	5211	dev->gso_max_segs = MVPP2_MAX_TSO_SEGS;
@@ -5759,9 +5753,6 @@ static int mvpp2_remove(struct platform_device *pdev) · 541 unmodified lines
5759		5753
5760	mvpp2_dbgfs_cleanup(priv);	5754	mvpp2_dbgfs_cleanup(priv);
5761		5755
5762	flush_workqueue(priv->stats_queue);
5763	destroy_workqueue(priv->stats_queue);
5764
5765	fwnode_for_each_available_child_node(fwnode, port_fwnode) {	5756	fwnode_for_each_available_child_node(fwnode, port_fwnode) {
5766	if (priv->port_list[i]) {	5757	if (priv->port_list[i]) {
5767	mutex_destroy(&priv->port_list[i]->gather_stats_lock);	5758	mutex_destroy(&priv->port_list[i]->gather_stats_lock);
@@ -5770,6 +5761,8 @@ static int mvpp2_remove(struct platform_device *pdev) · 2 unmodified lines
5770	i++;	5761	i++;
5771	}	5762	}
5772		5763
		5764	destroy_workqueue(priv->stats_queue);
		5765
5773	for (i = 0; i < MVPP2_BM_POOLS_NUM; i++) {	5766	for (i = 0; i < MVPP2_BM_POOLS_NUM; i++) {
5774	struct mvpp2_bm_pool *bm_pool = &priv->bm_pools[i];	5767	struct mvpp2_bm_pool *bm_pool = &priv->bm_pools[i];
5775		5768

drivers/net/ethernet/marvell/sky2.c+7−0

@@ -4924,6 +4924,13 @@ static const struct dmi_system_id msi_blacklist[] = { · 4923 unmodified lines
4924	DMI_MATCH(DMI_PRODUCT_NAME, "P5W DH Deluxe"),	4924	DMI_MATCH(DMI_PRODUCT_NAME, "P5W DH Deluxe"),
4925	},	4925	},
4926	},	4926	},
		4927	{
		4928	.ident = "ASUS P6T",
		4929	.matches = {
		4930	DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
		4931	DMI_MATCH(DMI_BOARD_NAME, "P6T"),
		4932	},
		4933	},
4927	{}	4934	{}
4928	};	4935	};
4929		4936

drivers/net/ethernet/mediatek/Kconfig+0−1

@@ -9,7 +9,6 @@ if NET_VENDOR_MEDIATEK · 8 unmodified lines
9		9
10	config NET_MEDIATEK_SOC	10	config NET_MEDIATEK_SOC
11	tristate "MediaTek SoC Gigabit Ethernet support"	11	tristate "MediaTek SoC Gigabit Ethernet support"
12	depends on NET_VENDOR_MEDIATEK
13	select PHYLIB	12	select PHYLIB
14	---help---	13	---help---
15	This driver supports the gigabit ethernet MACs in the	14	This driver supports the gigabit ethernet MACs in the

drivers/net/ethernet/mellanox/mlx5/core/dev.c+1−1

@@ -213,7 +213,7 @@ void mlx5_unregister_device(struct mlx5_core_dev *dev) · 212 unmodified lines
213	struct mlx5_interface *intf;	213	struct mlx5_interface *intf;
214		214
215	mutex_lock(&mlx5_intf_mutex);	215	mutex_lock(&mlx5_intf_mutex);
216	list_for_each_entry(intf, &intf_list, list)	216	list_for_each_entry_reverse(intf, &intf_list, list)
217	mlx5_remove_device(intf, priv);	217	mlx5_remove_device(intf, priv);
218	list_del(&priv->dev_list);	218	list_del(&priv->dev_list);
219	mutex_unlock(&mlx5_intf_mutex);	219	mutex_unlock(&mlx5_intf_mutex);

drivers/net/ethernet/mellanox/mlx5/core/en.h+3−9

 enum mlx5e_rq_group {
 	MLX5E_RQ_GROUP_REGULAR,
 	MLX5E_RQ_GROUP_XSK,
-	MLX5E_NUM_RQ_GROUPS /* Keep last. */
+#define MLX5E_NUM_RQ_GROUPS(g) (1 + MLX5E_RQ_GROUP_##g)
 };
 static inline u16 mlx5_min_rx_wqes(int wq_type, u32 wq_size)
 		min_t(int, mlx5_comp_vectors_count(mdev), MLX5E_MAX_NUM_CHANNELS);
 }
-/* Use this function to get max num channels after netdev was created */
-static inline int mlx5e_get_netdev_max_channels(struct net_device *netdev)
-{
-	return min_t(unsigned int,
-		     netdev->num_rx_queues / MLX5E_NUM_RQ_GROUPS,
-		     netdev->num_tx_queues);
-}
 struct mlx5e_tx_wqe {
 	struct mlx5_wqe_ctrl_seg ctrl;
 	struct mlx5_wqe_eth_seg  eth;
 	struct net_device         *netdev;
 	struct mlx5e_stats         stats;
 	struct mlx5e_channel_stats channel_stats[MLX5E_MAX_NUM_CHANNELS];
+	u16                        max_nch;
 	u8                         max_opened_tc;
 	struct hwtstamp_config     tstamp;
 	u16                        q_counter;
 		mlx5e_fp_handle_rx_cqe handle_rx_cqe_mpwqe;
 	} rx_handlers;
 	int	max_tc;
+	u8	rq_groups;
 };
 void mlx5e_build_ptys2ethtool_map(void);

drivers/net/ethernet/mellanox/mlx5/core/en/params.h+3−2

 	*group = qid / nch;
 }
-static inline bool mlx5e_qid_validate(struct mlx5e_params *params, u64 qid)
+static inline bool mlx5e_qid_validate(const struct mlx5e_profile *profile,
+				      struct mlx5e_params *params, u64 qid)
 {
-	return qid < params->num_channels * MLX5E_NUM_RQ_GROUPS;
+	return qid < params->num_channels * profile->rq_groups;
 }
 /* Parameter calculations */

drivers/net/ethernet/mellanox/mlx5/core/en/port.c+18−9

@@ -78,9 +78,10 @@ static const u32 mlx5e_ext_link_speed[MLX5E_EXT_LINK_MODES_NUMBER] = { · 77 unmodified lines
78	};	78	};
79		79
80	static void mlx5e_port_get_speed_arr(struct mlx5_core_dev *mdev,	80	static void mlx5e_port_get_speed_arr(struct mlx5_core_dev *mdev,
81	const u32 *arr, u32 size)	81	const u32 *arr, u32 size,
		82	bool force_legacy)
82	{	83	{
83	bool ext = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);	84	bool ext = force_legacy ? false : MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
84		85
85	*size = ext ? ARRAY_SIZE(mlx5e_ext_link_speed) :	86	*size = ext ? ARRAY_SIZE(mlx5e_ext_link_speed) :
86	ARRAY_SIZE(mlx5e_link_speed);	87	ARRAY_SIZE(mlx5e_link_speed);
@@ -152,7 +153,8 @@ int mlx5_port_set_eth_ptys(struct mlx5_core_dev *dev, bool an_disable, · 65 unmodified lines
152	sizeof(out), MLX5_REG_PTYS, 0, 1);	153	sizeof(out), MLX5_REG_PTYS, 0, 1);
153	}	154	}
154		155
155	u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper)	156	u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper,
		157	bool force_legacy)
156	{	158	{
157	unsigned long temp = eth_proto_oper;	159	unsigned long temp = eth_proto_oper;
158	const u32 *table;	160	const u32 *table;
@@ -160,7 +162,7 @@ u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper) · 1 unmodified line
160	u32 max_size;	162	u32 max_size;
161	int i;	163	int i;
162		164
163	mlx5e_port_get_speed_arr(mdev, &table, &max_size);	165	mlx5e_port_get_speed_arr(mdev, &table, &max_size, force_legacy);
164	i = find_first_bit(&temp, max_size);	166	i = find_first_bit(&temp, max_size);
165	if (i < max_size)	167	if (i < max_size)
166	speed = table[i];	168	speed = table[i];
@@ -170,6 +172,7 @@ u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper) · 3 unmodified lines
170	int mlx5e_port_linkspeed(struct mlx5_core_dev mdev, u32 speed)	172	int mlx5e_port_linkspeed(struct mlx5_core_dev mdev, u32 speed)
171	{	173	{
172	struct mlx5e_port_eth_proto eproto;	174	struct mlx5e_port_eth_proto eproto;
		175	bool force_legacy = false;
173	bool ext;	176	bool ext;
174	int err;	177	int err;
175		178
@@ -177,8 +180,13 @@ int mlx5e_port_linkspeed(struct mlx5_core_dev mdev, u32 speed) · 1 unmodified line
177	err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);	180	err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
178	if (err)	181	if (err)
179	goto out;	182	goto out;
180		183	if (ext && !eproto.admin) {
181	*speed = mlx5e_port_ptys2speed(mdev, eproto.oper);	184	force_legacy = true;
		185	err = mlx5_port_query_eth_proto(mdev, 1, false, &eproto);
		186	if (err)
		187	goto out;
		188	}
		189	*speed = mlx5e_port_ptys2speed(mdev, eproto.oper, force_legacy);
182	if (!(*speed))	190	if (!(*speed))
183	err = -EINVAL;	191	err = -EINVAL;
184		192
@@ -201,7 +209,7 @@ int mlx5e_port_max_linkspeed(struct mlx5_core_dev mdev, u32 speed) · 16 unmodified lines
201	if (err)	209	if (err)
202	return err;	210	return err;
203		211
204	mlx5e_port_get_speed_arr(mdev, &table, &max_size);	212	mlx5e_port_get_speed_arr(mdev, &table, &max_size, false);
205	for (i = 0; i < max_size; ++i)	213	for (i = 0; i < max_size; ++i)
206	if (eproto.cap & MLX5E_PROT_MASK(i))	214	if (eproto.cap & MLX5E_PROT_MASK(i))
207	max_speed = max(max_speed, table[i]);	215	max_speed = max(max_speed, table[i]);
@@ -210,14 +218,15 @@ int mlx5e_port_max_linkspeed(struct mlx5_core_dev mdev, u32 speed) · 2 unmodified lines
210	return 0;	218	return 0;
211	}	219	}
212		220
213	u32 mlx5e_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed)	221	u32 mlx5e_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed,
		222	bool force_legacy)
214	{	223	{
215	u32 link_modes = 0;	224	u32 link_modes = 0;
216	const u32 *table;	225	const u32 *table;
217	u32 max_size;	226	u32 max_size;
218	int i;	227	int i;
219		228
220	mlx5e_port_get_speed_arr(mdev, &table, &max_size);	229	mlx5e_port_get_speed_arr(mdev, &table, &max_size, force_legacy);
221	for (i = 0; i < max_size; ++i) {	230	for (i = 0; i < max_size; ++i) {
222	if (table[i] == speed)	231	if (table[i] == speed)
223	link_modes \|= MLX5E_PROT_MASK(i);	232	link_modes \|= MLX5E_PROT_MASK(i);

drivers/net/ethernet/mellanox/mlx5/core/en/port.h+4−2

 				 u8 *an_disable_cap, u8 *an_disable_admin);
 int mlx5_port_set_eth_ptys(struct mlx5_core_dev *dev, bool an_disable,
 			   u32 proto_admin, bool ext);
-u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper);
+u32 mlx5e_port_ptys2speed(struct mlx5_core_dev *mdev, u32 eth_proto_oper,
+			  bool force_legacy);
 int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
 int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
-u32 mlx5e_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed);
+u32 mlx5e_port_speed2linkmodes(struct mlx5_core_dev *mdev, u32 speed,
+			       bool force_legacy);
 int mlx5e_port_query_pbmc(struct mlx5_core_dev *mdev, void *out);
 int mlx5e_port_set_pbmc(struct mlx5_core_dev *mdev, void *in);

drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c+1−1

@@ -412,7 +412,7 @@ struct sk_buff mlx5e_ktls_handle_tx_skb(struct net_device netdev, · 411 unmodified lines
412	goto out;	412	goto out;
413		413
414	tls_ctx = tls_get_ctx(skb->sk);	414	tls_ctx = tls_get_ctx(skb->sk);
415	if (unlikely(tls_ctx->netdev != netdev))	415	if (unlikely(WARN_ON_ONCE(tls_ctx->netdev != netdev)))
416	goto err_out;	416	goto err_out;
417		417
418	priv_tx = mlx5e_get_ktls_tx_priv_ctx(tls_ctx);	418	priv_tx = mlx5e_get_ktls_tx_priv_ctx(tls_ctx);

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c+47−22

 {
 	mutex_lock(&priv->state_lock);
-	ch->max_combined   = mlx5e_get_netdev_max_channels(priv->netdev);
+	ch->max_combined   = priv->max_nch;
 	ch->combined_count = priv->channels.params.num_channels;
 	if (priv->xsk.refcnt) {
 		/* The upper half are XSK queues. */
 }
 static void get_speed_duplex(struct net_device *netdev,
-			     u32 eth_proto_oper,
+			     u32 eth_proto_oper, bool force_legacy,
 			     struct ethtool_link_ksettings *link_ksettings)
 {
 	struct mlx5e_priv *priv = netdev_priv(netdev);
 	if (!netif_carrier_ok(netdev))
 		goto out;
-	speed = mlx5e_port_ptys2speed(priv->mdev, eth_proto_oper);
+	speed = mlx5e_port_ptys2speed(priv->mdev, eth_proto_oper, force_legacy);
 	if (!speed) {
 		speed = SPEED_UNKNOWN;
 		goto out;
 	/* Fields: eth_proto_admin and ext_eth_proto_admin  are
 	 * mutually exclusive. Hence try reading legacy advertising
 	 * when extended advertising is zero.
-	 * admin_ext indicates how eth_proto_admin should be
+	 * admin_ext indicates which proto_admin (ext vs. legacy)
-	 * interpreted
+	 * should be read and interpreted
 	 */
 	admin_ext = ext;
 	if (ext && !eth_proto_admin) {
 		admin_ext = false;
 	}
-	eth_proto_oper   = MLX5_GET_ETH_PROTO(ptys_reg, out, ext,
+	eth_proto_oper   = MLX5_GET_ETH_PROTO(ptys_reg, out, admin_ext,
 					      eth_proto_oper);
 	eth_proto_lp	    = MLX5_GET(ptys_reg, out, eth_proto_lp_advertise);
 	an_disable_admin    = MLX5_GET(ptys_reg, out, an_disable_admin);
 	get_supported(mdev, eth_proto_cap, link_ksettings);
 	get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
 			admin_ext);
-	get_speed_duplex(priv->netdev, eth_proto_oper, link_ksettings);
+	get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
+			 link_ksettings);
 	eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
 	return ptys_modes;
 }
+static bool ext_link_mode_requested(const unsigned long *adver)
+{
+#define MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT ETHTOOL_LINK_MODE_50000baseKR_Full_BIT
+	int size = __ETHTOOL_LINK_MODE_MASK_NBITS - MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT;
+	__ETHTOOL_DECLARE_LINK_MODE_MASK(modes);
+	bitmap_set(modes, MLX5E_MIN_PTYS_EXT_LINK_MODE_BIT, size);
+	return bitmap_intersects(modes, adver, __ETHTOOL_LINK_MODE_MASK_NBITS);
+}
+static bool ext_speed_requested(u32 speed)
+{
+#define MLX5E_MAX_PTYS_LEGACY_SPEED 100000
+	return !!(speed > MLX5E_MAX_PTYS_LEGACY_SPEED);
+}
+static bool ext_requested(u8 autoneg, const unsigned long *adver, u32 speed)
+{
+	bool ext_link_mode = ext_link_mode_requested(adver);
+	bool ext_speed = ext_speed_requested(speed);
+	return  autoneg == AUTONEG_ENABLE ? ext_link_mode : ext_speed;
+}
 int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
 				     const struct ethtool_link_ksettings *link_ksettings)
 {
 	struct mlx5_core_dev *mdev = priv->mdev;
 	struct mlx5e_port_eth_proto eproto;
+	const unsigned long *adver;
 	bool an_changes = false;
 	u8 an_disable_admin;
 	bool ext_supported;
-	bool ext_requested;
 	u8 an_disable_cap;
 	bool an_disable;
 	u32 link_modes;
 	u8 an_status;
+	u8 autoneg;
 	u32 speed;
+	bool ext;
 	int err;
 	u32 (*ethtool2ptys_adver_func)(const unsigned long *adver);
-#define MLX5E_PTYS_EXT ((1ULL << ETHTOOL_LINK_MODE_50000baseKR_Full_BIT) - 1)
+	adver = link_ksettings->link_modes.advertising;
+	autoneg = link_ksettings->base.autoneg;
+	speed = link_ksettings->base.speed;
-	ext_requested = !!(link_ksettings->link_modes.advertising[0] >
+	ext = ext_requested(autoneg, adver, speed),
-			MLX5E_PTYS_EXT ||
-			link_ksettings->link_modes.advertising[1]);
 	ext_supported = MLX5_CAP_PCAM_FEATURE(mdev, ptys_extended_ethernet);
-	ext_requested &= ext_supported;
+	if (!ext_supported && ext)
+		return -EOPNOTSUPP;
-	speed = link_ksettings->base.speed;
+	ethtool2ptys_adver_func = ext ? mlx5e_ethtool2ptys_ext_adver_link :
-	ethtool2ptys_adver_func = ext_requested ?
-				  mlx5e_ethtool2ptys_ext_adver_link :
 				  mlx5e_ethtool2ptys_adver_link;
-	err = mlx5_port_query_eth_proto(mdev, 1, ext_requested, &eproto);
+	err = mlx5_port_query_eth_proto(mdev, 1, ext, &eproto);
 	if (err) {
 		netdev_err(priv->netdev, "%s: query port eth proto failed: %d\n",
 			   __func__, err);
 		goto out;
 	}
-	link_modes = link_ksettings->base.autoneg == AUTONEG_ENABLE ?
+	link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
-		ethtool2ptys_adver_func(link_ksettings->link_modes.advertising) :
+		mlx5e_port_speed2linkmodes(mdev, speed, !ext);
-		mlx5e_port_speed2linkmodes(mdev, speed);
 	link_modes = link_modes & eproto.cap;
 	if (!link_modes) {
 	mlx5_port_query_eth_autoneg(mdev, &an_status, &an_disable_cap,
 				    &an_disable_admin);
-	an_disable = link_ksettings->base.autoneg == AUTONEG_DISABLE;
+	an_disable = autoneg == AUTONEG_DISABLE;
 	an_changes = ((!an_disable && an_disable_admin) ||
 		      (an_disable && !an_disable_admin));
 	if (!an_changes && link_modes == eproto.admin)
 		goto out;
-	mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext_requested);
+	mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
 	mlx5_toggle_port_link(mdev);
 out:

drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c+2−1

@@ -611,7 +611,8 @@ static int validate_flow(struct mlx5e_priv *priv, · 610 unmodified lines
611	return -ENOSPC;	611	return -ENOSPC;
612		612
613	if (fs->ring_cookie != RX_CLS_FLOW_DISC)	613	if (fs->ring_cookie != RX_CLS_FLOW_DISC)
614	if (!mlx5e_qid_validate(&priv->channels.params, fs->ring_cookie))	614	if (!mlx5e_qid_validate(priv->profile, &priv->channels.params,
		615	fs->ring_cookie))
615	return -EINVAL;	616	return -EINVAL;
616		617
617	switch (fs->flow_type & ~(FLOW_EXT \| FLOW_MAC_EXT)) {	618	switch (fs->flow_type & ~(FLOW_EXT \| FLOW_MAC_EXT)) {

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+18−23

 static void mlx5e_init_frags_partition(struct mlx5e_rq *rq)
 {
-	struct mlx5e_wqe_frag_info next_frag, *prev;
+	struct mlx5e_wqe_frag_info next_frag = {};
+	struct mlx5e_wqe_frag_info *prev = NULL;
 	int i;
 	next_frag.di = &rq->wqe.di[0];
-	next_frag.offset = 0;
-	prev = NULL;
 	for (i = 0; i < mlx5_wq_cyc_get_size(&rq->wqe.wq); i++) {
 		struct mlx5e_rq_frag_info *frag_info = &rq->wqe.info.arr[0];
 			  struct mlx5e_channel_param *cparam)
 {
 	struct mlx5e_priv *priv = c->priv;
-	int err, tc, max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
+	int err, tc;
 	for (tc = 0; tc < params->num_tc; tc++) {
-		int txq_ix = c->ix + tc * max_nch;
+		int txq_ix = c->ix + tc * priv->max_nch;
 		err = mlx5e_open_txqsq(c, c->priv->tisn[tc], txq_ix,
 				       params, &cparam->sq, &c->sq[tc], tc);
 int mlx5e_create_direct_rqts(struct mlx5e_priv *priv, struct mlx5e_tir *tirs)
 {
-	const int max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
 	int err;
 	int ix;
-	for (ix = 0; ix < max_nch; ix++) {
+	for (ix = 0; ix < priv->max_nch; ix++) {
 		err = mlx5e_create_rqt(priv, 1 /*size */, &tirs[ix].rqt);
 		if (unlikely(err))
 			goto err_destroy_rqts;
 void mlx5e_destroy_direct_rqts(struct mlx5e_priv *priv, struct mlx5e_tir *tirs)
 {
-	const int max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
 	int i;
-	for (i = 0; i < max_nch; i++)
+	for (i = 0; i < priv->max_nch; i++)
 		mlx5e_destroy_rqt(priv, &tirs[i].rqt);
 }
 		mlx5e_redirect_rqt(priv, rqtn, MLX5E_INDIR_RQT_SIZE, rrp);
 	}
-	for (ix = 0; ix < mlx5e_get_netdev_max_channels(priv->netdev); ix++) {
+	for (ix = 0; ix < priv->max_nch; ix++) {
 		struct mlx5e_redirect_rqt_param direct_rrp = {
 			.is_rss = false,
 			{
 			goto free_in;
 	}
-	for (ix = 0; ix < mlx5e_get_netdev_max_channels(priv->netdev); ix++) {
+	for (ix = 0; ix < priv->max_nch; ix++) {
 		err = mlx5_core_modify_tir(mdev, priv->direct_tir[ix].tirn,
 					   in, inlen);
 		if (err)
 static void mlx5e_build_tc2txq_maps(struct mlx5e_priv *priv)
 {
-	int max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
 	int i, tc;
-	for (i = 0; i < max_nch; i++)
+	for (i = 0; i < priv->max_nch; i++)
 		for (tc = 0; tc < priv->profile->max_tc; tc++)
-			priv->channel_tc2txq[i][tc] = i + tc * max_nch;
+			priv->channel_tc2txq[i][tc] = i + tc * priv->max_nch;
 }
 static void mlx5e_build_tx2sq_maps(struct mlx5e_priv *priv)
 void mlx5e_activate_priv_channels(struct mlx5e_priv *priv)
 {
 	int num_txqs = priv->channels.num * priv->channels.params.num_tc;
-	int num_rxqs = priv->channels.num * MLX5E_NUM_RQ_GROUPS;
+	int num_rxqs = priv->channels.num * priv->profile->rq_groups;
 	struct net_device *netdev = priv->netdev;
 	mlx5e_netdev_set_tcs(netdev);
 int mlx5e_create_direct_tirs(struct mlx5e_priv *priv, struct mlx5e_tir *tirs)
 {
-	const int max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
 	struct mlx5e_tir *tir;
 	void *tirc;
 	int inlen;
 	if (!in)
 		return -ENOMEM;
-	for (ix = 0; ix < max_nch; ix++) {
+	for (ix = 0; ix < priv->max_nch; ix++) {
 		memset(in, 0, inlen);
 		tir = &tirs[ix];
 		tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
 void mlx5e_destroy_direct_tirs(struct mlx5e_priv *priv, struct mlx5e_tir *tirs)
 {
-	const int max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
 	int i;
-	for (i = 0; i < max_nch; i++)
+	for (i = 0; i < priv->max_nch; i++)
 		mlx5e_destroy_tir(priv->mdev, &tirs[i]);
 }
 {
 	int i;
-	for (i = 0; i < mlx5e_get_netdev_max_channels(priv->netdev); i++) {
+	for (i = 0; i < priv->max_nch; i++) {
 		struct mlx5e_channel_stats *channel_stats = &priv->channel_stats[i];
 		struct mlx5e_rq_stats *xskrq_stats = &channel_stats->xskrq;
 		struct mlx5e_rq_stats *rq_stats = &channel_stats->rq;
 		return err;
 	mlx5e_build_nic_params(mdev, &priv->xsk, rss, &priv->channels.params,
-			       mlx5e_get_netdev_max_channels(netdev),
+			       priv->max_nch, netdev->mtu);
-			       netdev->mtu);
 	mlx5e_timestamp_init(priv);
 	.rx_handlers.handle_rx_cqe       = mlx5e_handle_rx_cqe,
 	.rx_handlers.handle_rx_cqe_mpwqe = mlx5e_handle_rx_cqe_mpwrq,
 	.max_tc		   = MLX5E_MAX_NUM_TC,
+	.rq_groups	   = MLX5E_NUM_RQ_GROUPS(XSK),
 };
 /* mlx5e generic netdev management API (move to en_common.c) */
 	priv->profile     = profile;
 	priv->ppriv       = ppriv;
 	priv->msglevel    = MLX5E_MSG_LEVEL;
+	priv->max_nch     = netdev->num_rx_queues / max_t(u8, profile->rq_groups, 1);
 	priv->max_opened_tc = 1;
 	mutex_init(&priv->state_lock);
 	netdev = alloc_etherdev_mqs(sizeof(struct mlx5e_priv),
 				    nch * profile->max_tc,
-				    nch * MLX5E_NUM_RQ_GROUPS);
+				    nch * profile->rq_groups);
 	if (!netdev) {
 		mlx5_core_err(mdev, "alloc_etherdev_mqs() failed\n");
 		return NULL;

drivers/net/ethernet/mellanox/mlx5/core/en_rep.c+2−0

 	.rx_handlers.handle_rx_cqe       = mlx5e_handle_rx_cqe_rep,
 	.rx_handlers.handle_rx_cqe_mpwqe = mlx5e_handle_rx_cqe_mpwrq,
 	.max_tc			= 1,
+	.rq_groups		= MLX5E_NUM_RQ_GROUPS(REGULAR),
 };
 static const struct mlx5e_profile mlx5e_uplink_rep_profile = {
 	.rx_handlers.handle_rx_cqe       = mlx5e_handle_rx_cqe_rep,
 	.rx_handlers.handle_rx_cqe_mpwqe = mlx5e_handle_rx_cqe_mpwrq,
 	.max_tc			= MLX5E_MAX_NUM_TC,
+	.rq_groups		= MLX5E_NUM_RQ_GROUPS(REGULAR),
 };
 static bool

drivers/net/ethernet/mellanox/mlx5/core/en_stats.c+4−4

 	memset(s, 0, sizeof(*s));
-	for (i = 0; i < mlx5e_get_netdev_max_channels(priv->netdev); i++) {
+	for (i = 0; i < priv->max_nch; i++) {
 		struct mlx5e_channel_stats *channel_stats =
 			&priv->channel_stats[i];
 		struct mlx5e_xdpsq_stats *xdpsq_red_stats = &channel_stats->xdpsq;
 static int mlx5e_grp_channels_get_num_stats(struct mlx5e_priv *priv)
 {
-	int max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
+	int max_nch = priv->max_nch;
 	return (NUM_RQ_STATS * max_nch) +
 	       (NUM_CH_STATS * max_nch) +
 static int mlx5e_grp_channels_fill_strings(struct mlx5e_priv *priv, u8 *data,
 					   int idx)
 {
-	int max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
 	bool is_xsk = priv->xsk.ever_used;
+	int max_nch = priv->max_nch;
 	int i, j, tc;
 	for (i = 0; i < max_nch; i++)
 static int mlx5e_grp_channels_fill_stats(struct mlx5e_priv *priv, u64 *data,
 					 int idx)
 {
-	int max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
 	bool is_xsk = priv->xsk.ever_used;
+	int max_nch = priv->max_nch;
 	int i, j, tc;
 	for (i = 0; i < max_nch; i++)

drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+2−2

 void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe)
 {
 	struct mlx5e_neigh *m_neigh = &nhe->m_neigh;
-	u64 bytes, packets, lastuse = 0;
 	struct mlx5e_tc_flow *flow;
 	struct mlx5e_encap_entry *e;
 	struct mlx5_fc *counter;
 	struct neigh_table *tbl;
 	bool neigh_used = false;
 	struct neighbour *n;
+	u64 lastuse;
 	if (m_neigh->family == AF_INET)
 		tbl = &arp_tbl;
 					    encaps[efi->index]);
 			if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) {
 				counter = mlx5e_tc_get_counter(flow);
-				mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse);
+				lastuse = mlx5_fc_query_lastuse(counter);
 				if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) {
 					neigh_used = true;
 					break;

drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c+2−2

@@ -49,7 +49,7 @@ static inline bool mlx5e_channel_no_affinity_change(struct mlx5e_channel *c) · 48 unmodified lines
49	static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq)	49	static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq)
50	{	50	{
51	struct mlx5e_sq_stats *stats = sq->stats;	51	struct mlx5e_sq_stats *stats = sq->stats;
52	struct dim_sample dim_sample;	52	struct dim_sample dim_sample = {};
53		53
54	if (unlikely(!test_bit(MLX5E_SQ_STATE_AM, &sq->state)))	54	if (unlikely(!test_bit(MLX5E_SQ_STATE_AM, &sq->state)))
55	return;	55	return;
@@ -61,7 +61,7 @@ static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq) · 5 unmodified lines
61	static void mlx5e_handle_rx_dim(struct mlx5e_rq *rq)	61	static void mlx5e_handle_rx_dim(struct mlx5e_rq *rq)
62	{	62	{
63	struct mlx5e_rq_stats *stats = rq->stats;	63	struct mlx5e_rq_stats *stats = rq->stats;
64	struct dim_sample dim_sample;	64	struct dim_sample dim_sample = {};
65		65
66	if (unlikely(!test_bit(MLX5E_RQ_STATE_AM, &rq->state)))	66	if (unlikely(!test_bit(MLX5E_RQ_STATE_AM, &rq->state)))
67	return;	67	return;

drivers/net/ethernet/mellanox/mlx5/core/fs_core.h+3−2

 	FS_FT_SNIFFER_RX	= 0X5,
 	FS_FT_SNIFFER_TX	= 0X6,
 	FS_FT_RDMA_RX		= 0X7,
-	FS_FT_MAX_TYPE = FS_FT_SNIFFER_TX,
+	FS_FT_MAX_TYPE = FS_FT_RDMA_RX,
 };
 enum fs_flow_table_op_mod {
 	(type == FS_FT_FDB) ? MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, cap) :		\
 	(type == FS_FT_SNIFFER_RX) ? MLX5_CAP_FLOWTABLE_SNIFFER_RX(mdev, cap) :		\
 	(type == FS_FT_SNIFFER_TX) ? MLX5_CAP_FLOWTABLE_SNIFFER_TX(mdev, cap) :		\
-	(BUILD_BUG_ON_ZERO(FS_FT_SNIFFER_TX != FS_FT_MAX_TYPE))\
+	(type == FS_FT_RDMA_RX) ? MLX5_CAP_FLOWTABLE_RDMA_RX(mdev, cap) :		\
+	(BUILD_BUG_ON_ZERO(FS_FT_RDMA_RX != FS_FT_MAX_TYPE))\
 	)
 #endif

drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c+5−0

 }
 EXPORT_SYMBOL(mlx5_fc_query);
+u64 mlx5_fc_query_lastuse(struct mlx5_fc *counter)
+{
+	return counter->cache.lastuse;
+}
 void mlx5_fc_query_cached(struct mlx5_fc *counter,
 			  u64 *bytes, u64 *packets, u64 *lastuse)
 {

drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c+3−4

 	netdev->mtu = netdev->max_mtu;
 	mlx5e_build_nic_params(mdev, NULL, &priv->rss_params, &priv->channels.params,
-			       mlx5e_get_netdev_max_channels(netdev),
+			       priv->max_nch, netdev->mtu);
-			       netdev->mtu);
 	mlx5i_build_nic_params(mdev, &priv->channels.params);
 	mlx5e_timestamp_init(priv);
 static void mlx5i_grp_sw_update_stats(struct mlx5e_priv *priv)
 {
-	int max_nch = mlx5e_get_netdev_max_channels(priv->netdev);
 	struct mlx5e_sw_stats s = { 0 };
 	int i, j;
-	for (i = 0; i < max_nch; i++) {
+	for (i = 0; i < priv->max_nch; i++) {
 		struct mlx5e_channel_stats *channel_stats;
 		struct mlx5e_rq_stats *rq_stats;
 	.rx_handlers.handle_rx_cqe       = mlx5i_handle_rx_cqe,
 	.rx_handlers.handle_rx_cqe_mpwqe = NULL, /* Not supported */
 	.max_tc		   = MLX5I_MAX_NUM_TC,
+	.rq_groups	   = MLX5E_NUM_RQ_GROUPS(REGULAR),
 };
 /* mlx5i netdev NDos */

drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib_vlan.c+1−0

@@ -355,6 +355,7 @@ static const struct mlx5e_profile mlx5i_pkey_nic_profile = { · 354 unmodified lines
355	.rx_handlers.handle_rx_cqe = mlx5i_handle_rx_cqe,	355	.rx_handlers.handle_rx_cqe = mlx5i_handle_rx_cqe,
356	.rx_handlers.handle_rx_cqe_mpwqe = NULL, /* Not supported */	356	.rx_handlers.handle_rx_cqe_mpwqe = NULL, /* Not supported */
357	.max_tc = MLX5I_MAX_NUM_TC,	357	.max_tc = MLX5I_MAX_NUM_TC,
		358	.rq_groups = MLX5E_NUM_RQ_GROUPS(REGULAR),
358	};	359	};
359		360
360	const struct mlx5e_profile *mlx5i_pkey_get_profile(void)	361	const struct mlx5e_profile *mlx5i_pkey_get_profile(void)

drivers/net/ethernet/mellanox/mlxsw/spectrum.c+1−1

@@ -6330,7 +6330,7 @@ static int __init mlxsw_sp_module_init(void) · 6329 unmodified lines
6330	return 0;	6330	return 0;
6331		6331
6332	err_sp2_pci_driver_register:	6332	err_sp2_pci_driver_register:
6333	mlxsw_pci_driver_unregister(&mlxsw_sp2_pci_driver);	6333	mlxsw_pci_driver_unregister(&mlxsw_sp1_pci_driver);
6334	err_sp1_pci_driver_register:	6334	err_sp1_pci_driver_register:
6335	mlxsw_core_driver_unregister(&mlxsw_sp2_driver);	6335	mlxsw_core_driver_unregister(&mlxsw_sp2_driver);
6336	err_sp2_core_driver_register:	6336	err_sp2_core_driver_register:

drivers/net/ethernet/mellanox/mlxsw/spectrum.h+4−0

@@ -951,4 +951,8 @@ void mlxsw_sp_port_nve_fini(struct mlxsw_sp_port *mlxsw_sp_port); · 950 unmodified lines
951	int mlxsw_sp_nve_init(struct mlxsw_sp *mlxsw_sp);	951	int mlxsw_sp_nve_init(struct mlxsw_sp *mlxsw_sp);
952	void mlxsw_sp_nve_fini(struct mlxsw_sp *mlxsw_sp);	952	void mlxsw_sp_nve_fini(struct mlxsw_sp *mlxsw_sp);
953		953
		954	/* spectrum_nve_vxlan.c */
		955	int mlxsw_sp_nve_inc_parsing_depth_get(struct mlxsw_sp *mlxsw_sp);
		956	void mlxsw_sp_nve_inc_parsing_depth_put(struct mlxsw_sp *mlxsw_sp);
		957
954	#endif	958	#endif

drivers/net/ethernet/mellanox/mlxsw/spectrum_buffers.c+2−2

@@ -437,8 +437,8 @@ static const struct mlxsw_sp_sb_pr mlxsw_sp1_sb_prs[] = { · 436 unmodified lines
437	MLXSW_SP1_SB_PR_CPU_SIZE, true, false),	437	MLXSW_SP1_SB_PR_CPU_SIZE, true, false),
438	};	438	};
439		439
440	#define MLXSW_SP2_SB_PR_INGRESS_SIZE 38128752	440	#define MLXSW_SP2_SB_PR_INGRESS_SIZE 35297568
441	#define MLXSW_SP2_SB_PR_EGRESS_SIZE 38128752	441	#define MLXSW_SP2_SB_PR_EGRESS_SIZE 35297568
442	#define MLXSW_SP2_SB_PR_CPU_SIZE (256 * 1000)	442	#define MLXSW_SP2_SB_PR_CPU_SIZE (256 * 1000)
443		443
444	/* Order according to mlxsw_sp2_sb_pool_dess */	444	/* Order according to mlxsw_sp2_sb_pool_dess */

drivers/net/ethernet/mellanox/mlxsw/spectrum_nve.c+1−0

@@ -775,6 +775,7 @@ static void mlxsw_sp_nve_tunnel_fini(struct mlxsw_sp *mlxsw_sp) · 774 unmodified lines
775	ops->fini(nve);	775	ops->fini(nve);
776	mlxsw_sp_kvdl_free(mlxsw_sp, MLXSW_SP_KVDL_ENTRY_TYPE_ADJ, 1,	776	mlxsw_sp_kvdl_free(mlxsw_sp, MLXSW_SP_KVDL_ENTRY_TYPE_ADJ, 1,
777	nve->tunnel_index);	777	nve->tunnel_index);
		778	memset(&nve->config, 0, sizeof(nve->config));
778	}	779	}
779	nve->num_nve_tunnels--;	780	nve->num_nve_tunnels--;
780	}	781	}

drivers/net/ethernet/mellanox/mlxsw/spectrum_nve.h+1−0

@@ -29,6 +29,7 @@ struct mlxsw_sp_nve { · 28 unmodified lines
29	unsigned int num_max_mc_entries[MLXSW_SP_L3_PROTO_MAX];	29	unsigned int num_max_mc_entries[MLXSW_SP_L3_PROTO_MAX];
30	u32 tunnel_index;	30	u32 tunnel_index;
31	u16 ul_rif_index; /* Reserved for Spectrum */	31	u16 ul_rif_index; /* Reserved for Spectrum */
		32	unsigned int inc_parsing_depth_refs;
32	};	33	};
33		34
34	struct mlxsw_sp_nve_ops {	35	struct mlxsw_sp_nve_ops {

drivers/net/ethernet/mellanox/mlxsw/spectrum_nve_vxlan.c+59−17

 	config->udp_dport = cfg->dst_port;
 }
-static int mlxsw_sp_nve_parsing_set(struct mlxsw_sp *mlxsw_sp,
+static int __mlxsw_sp_nve_parsing_set(struct mlxsw_sp *mlxsw_sp,
-				    unsigned int parsing_depth,
+				      unsigned int parsing_depth,
-				    __be16 udp_dport)
+				      __be16 udp_dport)
 {
 	char mprs_pl[MLXSW_REG_MPRS_LEN];
 	return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mprs), mprs_pl);
 }
+static int mlxsw_sp_nve_parsing_set(struct mlxsw_sp *mlxsw_sp,
+				    __be16 udp_dport)
+{
+	int parsing_depth = mlxsw_sp->nve->inc_parsing_depth_refs ?
+				MLXSW_SP_NVE_VXLAN_PARSING_DEPTH :
+				MLXSW_SP_NVE_DEFAULT_PARSING_DEPTH;
+	return __mlxsw_sp_nve_parsing_set(mlxsw_sp, parsing_depth, udp_dport);
+}
+static int
+__mlxsw_sp_nve_inc_parsing_depth_get(struct mlxsw_sp *mlxsw_sp,
+				     __be16 udp_dport)
+{
+	int err;
+	mlxsw_sp->nve->inc_parsing_depth_refs++;
+	err = mlxsw_sp_nve_parsing_set(mlxsw_sp, udp_dport);
+	if (err)
+		goto err_nve_parsing_set;
+	return 0;
+err_nve_parsing_set:
+	mlxsw_sp->nve->inc_parsing_depth_refs--;
+	return err;
+}
+static void
+__mlxsw_sp_nve_inc_parsing_depth_put(struct mlxsw_sp *mlxsw_sp,
+				     __be16 udp_dport)
+{
+	mlxsw_sp->nve->inc_parsing_depth_refs--;
+	mlxsw_sp_nve_parsing_set(mlxsw_sp, udp_dport);
+}
+int mlxsw_sp_nve_inc_parsing_depth_get(struct mlxsw_sp *mlxsw_sp)
+{
+	__be16 udp_dport = mlxsw_sp->nve->config.udp_dport;
+	return __mlxsw_sp_nve_inc_parsing_depth_get(mlxsw_sp, udp_dport);
+}
+void mlxsw_sp_nve_inc_parsing_depth_put(struct mlxsw_sp *mlxsw_sp)
+{
+	__be16 udp_dport = mlxsw_sp->nve->config.udp_dport;
+	__mlxsw_sp_nve_inc_parsing_depth_put(mlxsw_sp, udp_dport);
+}
 static void
 mlxsw_sp_nve_vxlan_config_prepare(char *tngcr_pl,
 				  const struct mlxsw_sp_nve_config *config)
 	struct mlxsw_sp *mlxsw_sp = nve->mlxsw_sp;
 	int err;
-	err = mlxsw_sp_nve_parsing_set(mlxsw_sp,
+	err = __mlxsw_sp_nve_inc_parsing_depth_get(mlxsw_sp, config->udp_dport);
-				       MLXSW_SP_NVE_VXLAN_PARSING_DEPTH,
-				       config->udp_dport);
 	if (err)
 		return err;
 err_rtdp_set:
 	mlxsw_sp1_nve_vxlan_config_clear(mlxsw_sp);
 err_config_set:
-	mlxsw_sp_nve_parsing_set(mlxsw_sp, MLXSW_SP_NVE_DEFAULT_PARSING_DEPTH,
+	__mlxsw_sp_nve_inc_parsing_depth_put(mlxsw_sp, 0);
-				 config->udp_dport);
 	return err;
 }
 	mlxsw_sp_router_nve_demote_decap(mlxsw_sp, config->ul_tb_id,
 					 config->ul_proto, &config->ul_sip);
 	mlxsw_sp1_nve_vxlan_config_clear(mlxsw_sp);
-	mlxsw_sp_nve_parsing_set(mlxsw_sp, MLXSW_SP_NVE_DEFAULT_PARSING_DEPTH,
+	__mlxsw_sp_nve_inc_parsing_depth_put(mlxsw_sp, 0);
-				 config->udp_dport);
 }
 static int
 	struct mlxsw_sp *mlxsw_sp = nve->mlxsw_sp;
 	int err;
-	err = mlxsw_sp_nve_parsing_set(mlxsw_sp,
+	err = __mlxsw_sp_nve_inc_parsing_depth_get(mlxsw_sp, config->udp_dport);
-				       MLXSW_SP_NVE_VXLAN_PARSING_DEPTH,
-				       config->udp_dport);
 	if (err)
 		return err;
 err_rtdp_set:
 	mlxsw_sp2_nve_vxlan_config_clear(mlxsw_sp);
 err_config_set:
-	mlxsw_sp_nve_parsing_set(mlxsw_sp, MLXSW_SP_NVE_DEFAULT_PARSING_DEPTH,
+	__mlxsw_sp_nve_inc_parsing_depth_put(mlxsw_sp, 0);
-				 config->udp_dport);
 	return err;
 }
 	mlxsw_sp_router_nve_demote_decap(mlxsw_sp, config->ul_tb_id,
 					 config->ul_proto, &config->ul_sip);
 	mlxsw_sp2_nve_vxlan_config_clear(mlxsw_sp);
-	mlxsw_sp_nve_parsing_set(mlxsw_sp, MLXSW_SP_NVE_DEFAULT_PARSING_DEPTH,
+	__mlxsw_sp_nve_inc_parsing_depth_put(mlxsw_sp, 0);
-				 config->udp_dport);
 }
 const struct mlxsw_sp_nve_ops mlxsw_sp2_nve_vxlan_ops = {

drivers/net/ethernet/mellanox/mlxsw/spectrum_ptp.c+17−0

 {
 	struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
 	struct mlxsw_sp_port *tmp;
+	u16 orig_ing_types = 0;
+	u16 orig_egr_types = 0;
+	int err;
 	int i;
 	/* MTPPPC configures timestamping globally, not per port. Find the
 	 */
 	for (i = 1; i < mlxsw_core_max_ports(mlxsw_sp->core); i++) {
 		tmp = mlxsw_sp->ports[i];
+		if (tmp) {
+			orig_ing_types |= tmp->ptp.ing_types;
+			orig_egr_types |= tmp->ptp.egr_types;
+		}
 		if (tmp && tmp != mlxsw_sp_port) {
 			ing_types |= tmp->ptp.ing_types;
 			egr_types |= tmp->ptp.egr_types;
 		}
 	}
+	if ((ing_types || egr_types) && !(orig_ing_types || orig_egr_types)) {
+		err = mlxsw_sp_nve_inc_parsing_depth_get(mlxsw_sp);
+		if (err) {
+			netdev_err(mlxsw_sp_port->dev, "Failed to increase parsing depth");
+			return err;
+		}
+	}
+	if (!(ing_types || egr_types) && (orig_ing_types || orig_egr_types))
+		mlxsw_sp_nve_inc_parsing_depth_put(mlxsw_sp);
 	return mlxsw_sp1_ptp_mtpppc_set(mlxsw_sp_port->mlxsw_sp,
 				       ing_types, egr_types);
 }

drivers/net/ethernet/mscc/ocelot.c+1−0

@@ -1818,6 +1818,7 @@ EXPORT_SYMBOL(ocelot_init); · 1817 unmodified lines
1818		1818
1819	void ocelot_deinit(struct ocelot *ocelot)	1819	void ocelot_deinit(struct ocelot *ocelot)
1820	{	1820	{
		1821	cancel_delayed_work(&ocelot->stats_work);
1821	destroy_workqueue(ocelot->stats_queue);	1822	destroy_workqueue(ocelot->stats_queue);
1822	mutex_destroy(&ocelot->stats_lock);	1823	mutex_destroy(&ocelot->stats_lock);
1823	ocelot_ace_deinit();	1824	ocelot_ace_deinit();

drivers/net/ethernet/netronome/nfp/nfp_net_ethtool.c+2−2

@@ -444,12 +444,12 @@ static u8 nfp_vnic_get_sw_stats_strings(struct net_device netdev, u8 *data) · 443 unmodified lines
444	data = nfp_pr_et(data, "hw_rx_csum_complete");	444	data = nfp_pr_et(data, "hw_rx_csum_complete");
445	data = nfp_pr_et(data, "hw_rx_csum_err");	445	data = nfp_pr_et(data, "hw_rx_csum_err");
446	data = nfp_pr_et(data, "rx_replace_buf_alloc_fail");	446	data = nfp_pr_et(data, "rx_replace_buf_alloc_fail");
447	data = nfp_pr_et(data, "rx_tls_decrypted");	447	data = nfp_pr_et(data, "rx_tls_decrypted_packets");
448	data = nfp_pr_et(data, "hw_tx_csum");	448	data = nfp_pr_et(data, "hw_tx_csum");
449	data = nfp_pr_et(data, "hw_tx_inner_csum");	449	data = nfp_pr_et(data, "hw_tx_inner_csum");
450	data = nfp_pr_et(data, "tx_gather");	450	data = nfp_pr_et(data, "tx_gather");
451	data = nfp_pr_et(data, "tx_lso");	451	data = nfp_pr_et(data, "tx_lso");
452	data = nfp_pr_et(data, "tx_tls_encrypted");	452	data = nfp_pr_et(data, "tx_tls_encrypted_packets");
453	data = nfp_pr_et(data, "tx_tls_ooo");	453	data = nfp_pr_et(data, "tx_tls_ooo");
454	data = nfp_pr_et(data, "tx_tls_drop_no_sync_data");	454	data = nfp_pr_et(data, "tx_tls_drop_no_sync_data");
455		455

drivers/net/ethernet/ni/Kconfig+1−1

@@ -11,7 +11,7 @@ config NET_VENDOR_NI · 10 unmodified lines
11		11
12	Note that the answer to this question doesn't directly affect the	12	Note that the answer to this question doesn't directly affect the
13	kernel: saying N will just cause the configurator to skip all	13	kernel: saying N will just cause the configurator to skip all
14	the questions about National Instrument devices.	14	the questions about National Instruments devices.
15	If you say Y, you will be asked for your specific device in the	15	If you say Y, you will be asked for your specific device in the
16	following questions.	16	following questions.
17		17

drivers/net/ethernet/packetengines/Kconfig+3−3

@@ -1,10 +1,10 @@
1	# SPDX-License-Identifier: GPL-2.0-only	1	# SPDX-License-Identifier: GPL-2.0-only
2	#	2	#
3	# Packet engine device configuration	3	# Packet Engines device configuration
4	#	4	#
5		5
6	config NET_VENDOR_PACKET_ENGINES	6	config NET_VENDOR_PACKET_ENGINES
7	bool "Packet Engine devices"	7	bool "Packet Engines devices"
8	default y	8	default y
9	depends on PCI	9	depends on PCI
10	---help---	10	---help---
@@ -12,7 +12,7 @@ config NET_VENDOR_PACKET_ENGINES · 1 unmodified line
12		12
13	Note that the answer to this question doesn't directly affect the	13	Note that the answer to this question doesn't directly affect the
14	kernel: saying N will just cause the configurator to skip all	14	kernel: saying N will just cause the configurator to skip all
15	the questions about packet engine devices. If you say Y, you will	15	the questions about Packet Engines devices. If you say Y, you will
16	be asked for your specific card in the following questions.	16	be asked for your specific card in the following questions.
17		17
18	if NET_VENDOR_PACKET_ENGINES	18	if NET_VENDOR_PACKET_ENGINES

drivers/net/ethernet/packetengines/Makefile+1−1

@@ -1,6 +1,6 @@
1	# SPDX-License-Identifier: GPL-2.0-only	1	# SPDX-License-Identifier: GPL-2.0-only
2	#	2	#
3	# Makefile for the Packet Engine network device drivers.	3	# Makefile for the Packet Engines network device drivers.
4	#	4	#
5		5
6	obj-$(CONFIG_HAMACHI) += hamachi.o	6	obj-$(CONFIG_HAMACHI) += hamachi.o

drivers/net/ethernet/qlogic/qed/qed_int.c+1−1

@@ -1093,7 +1093,7 @@ static int qed_int_deassertion(struct qed_hwfn *p_hwfn, · 1092 unmodified lines
1093	snprintf(bit_name, 30,	1093	snprintf(bit_name, 30,
1094	p_aeu->bit_name, num);	1094	p_aeu->bit_name, num);
1095	else	1095	else
1096	strncpy(bit_name,	1096	strlcpy(bit_name,
1097	p_aeu->bit_name, 30);	1097	p_aeu->bit_name, 30);
1098		1098
1099	/* We now need to pass bitmask in its	1099	/* We now need to pass bitmask in its

drivers/net/ethernet/qlogic/qed/qed_rdma.c+1−1

@@ -442,7 +442,7 @@ static void qed_rdma_init_devinfo(struct qed_hwfn *p_hwfn, · 441 unmodified lines
442	/* Vendor specific information */	442	/* Vendor specific information */
443	dev->vendor_id = cdev->vendor_id;	443	dev->vendor_id = cdev->vendor_id;
444	dev->vendor_part_id = cdev->device_id;	444	dev->vendor_part_id = cdev->device_id;
445	dev->hw_ver = 0;	445	dev->hw_ver = cdev->chip_rev;
446	dev->fw_ver = (FW_MAJOR_VERSION << 24) \| (FW_MINOR_VERSION << 16) \|	446	dev->fw_ver = (FW_MAJOR_VERSION << 24) \| (FW_MINOR_VERSION << 16) \|
447	(FW_REVISION_VERSION << 8) \| (FW_ENGINEERING_VERSION);	447	(FW_REVISION_VERSION << 8) \| (FW_ENGINEERING_VERSION);
448		448

drivers/net/ethernet/qualcomm/rmnet/rmnet_map_data.c+9−4

@@ -206,9 +206,9 @@ rmnet_map_ipv4_ul_csum_header(void *iphdr, · 205 unmodified lines
206	ul_header->csum_insert_offset = skb->csum_offset;	206	ul_header->csum_insert_offset = skb->csum_offset;
207	ul_header->csum_enabled = 1;	207	ul_header->csum_enabled = 1;
208	if (ip4h->protocol == IPPROTO_UDP)	208	if (ip4h->protocol == IPPROTO_UDP)
209	ul_header->udp_ip4_ind = 1;	209	ul_header->udp_ind = 1;
210	else	210	else
211	ul_header->udp_ip4_ind = 0;	211	ul_header->udp_ind = 0;
212		212
213	/* Changing remaining fields to network order */	213	/* Changing remaining fields to network order */
214	hdr++;	214	hdr++;
@@ -239,6 +239,7 @@ rmnet_map_ipv6_ul_csum_header(void *ip6hdr, · 24 unmodified lines
239	struct rmnet_map_ul_csum_header *ul_header,	239	struct rmnet_map_ul_csum_header *ul_header,
240	struct sk_buff *skb)	240	struct sk_buff *skb)
241	{	241	{
		242	struct ipv6hdr ip6h = (struct ipv6hdr )ip6hdr;
242	__be16 hdr = (__be16 )ul_header, offset;	243	__be16 hdr = (__be16 )ul_header, offset;
243		244
244	offset = htons((__force u16)(skb_transport_header(skb) -	245	offset = htons((__force u16)(skb_transport_header(skb) -
@@ -246,7 +247,11 @@ rmnet_map_ipv6_ul_csum_header(void *ip6hdr, · 1 unmodified line
246	ul_header->csum_start_offset = offset;	247	ul_header->csum_start_offset = offset;
247	ul_header->csum_insert_offset = skb->csum_offset;	248	ul_header->csum_insert_offset = skb->csum_offset;
248	ul_header->csum_enabled = 1;	249	ul_header->csum_enabled = 1;
249	ul_header->udp_ip4_ind = 0;	250
		251	if (ip6h->nexthdr == IPPROTO_UDP)
		252	ul_header->udp_ind = 1;
		253	else
		254	ul_header->udp_ind = 0;
250		255
251	/* Changing remaining fields to network order */	256	/* Changing remaining fields to network order */
252	hdr++;	257	hdr++;
@@ -419,7 +424,7 @@ sw_csum: · 166 unmodified lines
419	ul_header->csum_start_offset = 0;	424	ul_header->csum_start_offset = 0;
420	ul_header->csum_insert_offset = 0;	425	ul_header->csum_insert_offset = 0;
421	ul_header->csum_enabled = 0;	426	ul_header->csum_enabled = 0;
422	ul_header->udp_ip4_ind = 0;	427	ul_header->udp_ind = 0;
423		428
424	priv->stats.csum_sw++;	429	priv->stats.csum_sw++;
425	}	430	}

drivers/net/ethernet/realtek/r8169_main.c+8−6

 	if (ret)
 		return ret;
-	if (tp->supports_gmii)
+	if (!tp->supports_gmii)
-		phy_remove_link_mode(phydev,
-				     ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
-	else
 		phy_set_max_speed(phydev, SPEED_100);
 	phy_support_asym_pause(phydev);
 {
 	unsigned int flags;
-	if (tp->mac_version <= RTL_GIGA_MAC_VER_06) {
+	switch (tp->mac_version) {
+	case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
 		rtl_unlock_config_regs(tp);
 		RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~MSIEnable);
 		rtl_lock_config_regs(tp);
+		/* fall through */
+	case RTL_GIGA_MAC_VER_07 ... RTL_GIGA_MAC_VER_24:
 		flags = PCI_IRQ_LEGACY;
-	} else {
+		break;
+	default:
 		flags = PCI_IRQ_ALL_TYPES;
+		break;
 	}
 	return pci_alloc_irq_vectors(tp->pci_dev, 1, 1, flags);

drivers/net/ethernet/rocker/rocker_main.c+2−0

 			if (fen_info->fi->fib_nh_is_v6) {
 				NL_SET_ERR_MSG_MOD(info->extack, "IPv6 gateway with IPv4 route is not supported");
+				kfree(fib_work);
 				return notifier_from_errno(-EINVAL);
 			}
 			if (fen_info->fi->nh) {
 				NL_SET_ERR_MSG_MOD(info->extack, "IPv4 route with nexthop objects is not supported");
+				kfree(fib_work);
 				return notifier_from_errno(-EINVAL);
 			}
 		}

drivers/net/ethernet/samsung/Kconfig+1−1

@@ -11,7 +11,7 @@ config NET_VENDOR_SAMSUNG · 10 unmodified lines
11	say Y.	11	say Y.
12		12
13	Note that the answer to this question does not directly affect	13	Note that the answer to this question does not directly affect
14	the kernel: saying N will just case the configurator to skip all	14	the kernel: saying N will just cause the configurator to skip all
15	the questions about Samsung chipsets. If you say Y, you will be asked	15	the questions about Samsung chipsets. If you say Y, you will be asked
16	for your specific chipset/driver in the following questions.	16	for your specific chipset/driver in the following questions.
17		17

drivers/net/ethernet/smsc/smc911x.c+1−0

@@ -712,6 +712,7 @@ static void smc911x_phy_detect(struct net_device *dev) · 711 unmodified lines
712	/* Found an external PHY */	712	/* Found an external PHY */
713	break;	713	break;
714	}	714	}
		715	/* Else, fall through */
715	default:	716	default:
716	/* Internal media only */	717	/* Internal media only */
717	SMC_GET_PHY_ID1(lp, 1, id1);	718	SMC_GET_PHY_ID1(lp, 1, id1);

drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c+4−0

 	u32 value;
 	base_register = (queue < 4) ? GMAC_RXQ_CTRL2 : GMAC_RXQ_CTRL3;
+	if (queue >= 4)
+		queue -= 4;
 	value = readl(ioaddr + base_register);
 	u32 value;
 	base_register = (queue < 4) ? GMAC_TXQ_PRTY_MAP0 : GMAC_TXQ_PRTY_MAP1;
+	if (queue >= 4)
+		queue -= 4;
 	value = readl(ioaddr + base_register);

drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h+5−2

 #define XGMAC_CORE_INIT_RX		0
 #define XGMAC_PACKET_FILTER		0x00000008
 #define XGMAC_FILTER_RA			BIT(31)
+#define XGMAC_FILTER_HPF		BIT(10)
 #define XGMAC_FILTER_PCF		BIT(7)
 #define XGMAC_FILTER_PM			BIT(4)
 #define XGMAC_FILTER_HMC		BIT(2)
 #define XGMAC_FILTER_PR			BIT(0)
 #define XGMAC_HASH_TABLE(x)		(0x00000010 + (x) * 4)
+#define XGMAC_MAX_HASH_TABLE		8
 #define XGMAC_RXQ_CTRL0			0x000000a0
 #define XGMAC_RXQEN(x)			GENMASK((x) * 2 + 1, (x) * 2)
 #define XGMAC_RXQEN_SHIFT(x)		((x) * 2)
 #define XGMAC_MDIO_ADDR			0x00000200
 #define XGMAC_MDIO_DATA			0x00000204
 #define XGMAC_MDIO_C22P			0x00000220
-#define XGMAC_ADDR0_HIGH		0x00000300
+#define XGMAC_ADDRx_HIGH(x)		(0x00000300 + (x) * 0x8)
+#define XGMAC_ADDR_MAX			32
 #define XGMAC_AE			BIT(31)
 #define XGMAC_DCS			GENMASK(19, 16)
 #define XGMAC_DCS_SHIFT			16
-#define XGMAC_ADDR0_LOW			0x00000304
+#define XGMAC_ADDRx_LOW(x)		(0x00000304 + (x) * 0x8)
 #define XGMAC_ARP_ADDR			0x00000c10
 #define XGMAC_TIMESTAMP_STATUS		0x00000d20
 #define XGMAC_TXTSC			BIT(15)

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c+78−9

@@ -4,6 +4,8 @@ · 3 unmodified lines
4	* stmmac XGMAC support.	4	* stmmac XGMAC support.
5	*/	5	*/
6		6
		7	#include <linux/bitrev.h>
		8	#include <linux/crc32.h>
7	#include "stmmac.h"	9	#include "stmmac.h"
8	#include "dwxgmac2.h"	10	#include "dwxgmac2.h"
9		11
@@ -106,6 +108,8 @@ static void dwxgmac2_rx_queue_prio(struct mac_device_info *hw, u32 prio, · 96 unmodified lines
106	u32 value, reg;	108	u32 value, reg;
107		109
108	reg = (queue < 4) ? XGMAC_RXQ_CTRL2 : XGMAC_RXQ_CTRL3;	110	reg = (queue < 4) ? XGMAC_RXQ_CTRL2 : XGMAC_RXQ_CTRL3;
		111	if (queue >= 4)
		112	queue -= 4;
109		113
110	value = readl(ioaddr + reg);	114	value = readl(ioaddr + reg);
111	value &= ~XGMAC_PSRQ(queue);	115	value &= ~XGMAC_PSRQ(queue);
@@ -169,6 +173,8 @@ static void dwxgmac2_map_mtl_to_dma(struct mac_device_info *hw, u32 queue, · 57 unmodified lines
169	u32 value, reg;	173	u32 value, reg;
170		174
171	reg = (queue < 4) ? XGMAC_MTL_RXQ_DMA_MAP0 : XGMAC_MTL_RXQ_DMA_MAP1;	175	reg = (queue < 4) ? XGMAC_MTL_RXQ_DMA_MAP0 : XGMAC_MTL_RXQ_DMA_MAP1;
		176	if (queue >= 4)
		177	queue -= 4;
172		178
173	value = readl(ioaddr + reg);	179	value = readl(ioaddr + reg);
174	value &= ~XGMAC_QxMDMACH(queue);	180	value &= ~XGMAC_QxMDMACH(queue);
@@ -278,10 +284,10 @@ static void dwxgmac2_set_umac_addr(struct mac_device_info *hw, · 103 unmodified lines
278	u32 value;	284	u32 value;
279		285
280	value = (addr[5] << 8) \| addr[4];	286	value = (addr[5] << 8) \| addr[4];
281	writel(value \| XGMAC_AE, ioaddr + XGMAC_ADDR0_HIGH);	287	writel(value \| XGMAC_AE, ioaddr + XGMAC_ADDRx_HIGH(reg_n));
282		288
283	value = (addr[3] << 24) \| (addr[2] << 16) \| (addr[1] << 8) \| addr[0];	289	value = (addr[3] << 24) \| (addr[2] << 16) \| (addr[1] << 8) \| addr[0];
284	writel(value, ioaddr + XGMAC_ADDR0_LOW);	290	writel(value, ioaddr + XGMAC_ADDRx_LOW(reg_n));
285	}	291	}
286		292
287	static void dwxgmac2_get_umac_addr(struct mac_device_info *hw,	293	static void dwxgmac2_get_umac_addr(struct mac_device_info *hw,
@@ -291,8 +297,8 @@ static void dwxgmac2_get_umac_addr(struct mac_device_info *hw, · 3 unmodified lines
291	u32 hi_addr, lo_addr;	297	u32 hi_addr, lo_addr;
292		298
293	/* Read the MAC address from the hardware */	299	/* Read the MAC address from the hardware */
294	hi_addr = readl(ioaddr + XGMAC_ADDR0_HIGH);	300	hi_addr = readl(ioaddr + XGMAC_ADDRx_HIGH(reg_n));
295	lo_addr = readl(ioaddr + XGMAC_ADDR0_LOW);	301	lo_addr = readl(ioaddr + XGMAC_ADDRx_LOW(reg_n));
296		302
297	/* Extract the MAC address from the high and low words */	303	/* Extract the MAC address from the high and low words */
298	addr[0] = lo_addr & 0xff;	304	addr[0] = lo_addr & 0xff;
@@ -303,19 +309,82 @@ static void dwxgmac2_get_umac_addr(struct mac_device_info *hw, · 4 unmodified lines
303	addr[5] = (hi_addr >> 8) & 0xff;	309	addr[5] = (hi_addr >> 8) & 0xff;
304	}	310	}
305		311
		312	static void dwxgmac2_set_mchash(void __iomem ioaddr, u32 mcfilterbits,
		313	int mcbitslog2)
		314	{
		315	int numhashregs, regs;
		316
		317	switch (mcbitslog2) {
		318	case 6:
		319	numhashregs = 2;
		320	break;
		321	case 7:
		322	numhashregs = 4;
		323	break;
		324	case 8:
		325	numhashregs = 8;
		326	break;
		327	default:
		328	return;
		329	}
		330
		331	for (regs = 0; regs < numhashregs; regs++)
		332	writel(mcfilterbits[regs], ioaddr + XGMAC_HASH_TABLE(regs));
		333	}
		334
306	static void dwxgmac2_set_filter(struct mac_device_info *hw,	335	static void dwxgmac2_set_filter(struct mac_device_info *hw,
307	struct net_device *dev)	336	struct net_device *dev)
308	{	337	{
309	void __iomem ioaddr = (void __iomem )dev->base_addr;	338	void __iomem ioaddr = (void __iomem )dev->base_addr;
310	u32 value = XGMAC_FILTER_RA;	339	u32 value = readl(ioaddr + XGMAC_PACKET_FILTER);
		340	int mcbitslog2 = hw->mcast_bits_log2;
		341	u32 mc_filter[8];
		342	int i;
		343
		344	value &= ~(XGMAC_FILTER_PR \| XGMAC_FILTER_HMC \| XGMAC_FILTER_PM);
		345	value \|= XGMAC_FILTER_HPF;
		346
		347	memset(mc_filter, 0, sizeof(mc_filter));
311		348
312	if (dev->flags & IFF_PROMISC) {	349	if (dev->flags & IFF_PROMISC) {
313	value \|= XGMAC_FILTER_PR \| XGMAC_FILTER_PCF;	350	value \|= XGMAC_FILTER_PR;
		351	value \|= XGMAC_FILTER_PCF;
314	} else if ((dev->flags & IFF_ALLMULTI) \|\|	352	} else if ((dev->flags & IFF_ALLMULTI) \|\|
315	(netdev_mc_count(dev) > HASH_TABLE_SIZE)) {	353	(netdev_mc_count(dev) > hw->multicast_filter_bins)) {
316	value \|= XGMAC_FILTER_PM;	354	value \|= XGMAC_FILTER_PM;
317	writel(~0x0, ioaddr + XGMAC_HASH_TABLE(0));	355
318	writel(~0x0, ioaddr + XGMAC_HASH_TABLE(1));	356	for (i = 0; i < XGMAC_MAX_HASH_TABLE; i++)
		357	writel(~0x0, ioaddr + XGMAC_HASH_TABLE(i));
		358	} else if (!netdev_mc_empty(dev)) {
		359	struct netdev_hw_addr *ha;
		360
		361	value \|= XGMAC_FILTER_HMC;
		362
		363	netdev_for_each_mc_addr(ha, dev) {
		364	int nr = (bitrev32(~crc32_le(~0, ha->addr, 6)) >>
		365	(32 - mcbitslog2));
		366	mc_filter[nr >> 5] \|= (1 << (nr & 0x1F));
		367	}
		368	}
		369
		370	dwxgmac2_set_mchash(ioaddr, mc_filter, mcbitslog2);
		371
		372	/* Handle multiple unicast addresses */
		373	if (netdev_uc_count(dev) > XGMAC_ADDR_MAX) {
		374	value \|= XGMAC_FILTER_PR;
		375	} else {
		376	struct netdev_hw_addr *ha;
		377	int reg = 1;
		378
		379	netdev_for_each_uc_addr(ha, dev) {
		380	dwxgmac2_set_umac_addr(hw, ha->addr, reg);
		381	reg++;
		382	}
		383
		384	for ( ; reg < XGMAC_ADDR_MAX; reg++) {
		385	writel(0, ioaddr + XGMAC_ADDRx_HIGH(reg));
		386	writel(0, ioaddr + XGMAC_ADDRx_LOW(reg));
		387	}
319	}	388	}
320		389
321	writel(value, ioaddr + XGMAC_PACKET_FILTER);	390	writel(value, ioaddr + XGMAC_PACKET_FILTER);

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+26−24

 	phylink_set(mac_supported, 10baseT_Full);
 	phylink_set(mac_supported, 100baseT_Half);
 	phylink_set(mac_supported, 100baseT_Full);
+	phylink_set(mac_supported, 1000baseT_Half);
+	phylink_set(mac_supported, 1000baseT_Full);
+	phylink_set(mac_supported, 1000baseKX_Full);
 	phylink_set(mac_supported, Autoneg);
 	phylink_set(mac_supported, Pause);
 	phylink_set(mac_supported, Asym_Pause);
 	phylink_set_port_modes(mac_supported);
-	if (priv->plat->has_gmac ||
-	    priv->plat->has_gmac4 ||
-	    priv->plat->has_xgmac) {
-		phylink_set(mac_supported, 1000baseT_Half);
-		phylink_set(mac_supported, 1000baseT_Full);
-		phylink_set(mac_supported, 1000baseKX_Full);
-	}
 	/* Cut down 1G if asked to */
 	if ((max_speed > 0) && (max_speed < 1000)) {
 		phylink_set(mask, 1000baseT_Full);
 			  "(%s) dma_rx_phy=0x%08x\n", __func__,
 			  (u32)rx_q->dma_rx_phy);
+		stmmac_clear_rx_descriptors(priv, queue);
 		for (i = 0; i < DMA_RX_SIZE; i++) {
 			struct dma_desc *p;
 		rx_q->cur_rx = 0;
 		rx_q->dirty_rx = (unsigned int)(i - DMA_RX_SIZE);
-		stmmac_clear_rx_descriptors(priv, queue);
 		/* Setup the chained descriptor addresses */
 		if (priv->mode == STMMAC_CHAIN_MODE) {
 			if (priv->extend_desc)
 			goto err_dma;
 		}
-		rx_q->buf_pool = kmalloc_array(DMA_RX_SIZE,
+		rx_q->buf_pool = kcalloc(DMA_RX_SIZE, sizeof(*rx_q->buf_pool),
-					       sizeof(*rx_q->buf_pool),
+					 GFP_KERNEL);
-					       GFP_KERNEL);
 		if (!rx_q->buf_pool)
 			goto err_dma;
 		tx_q->queue_index = queue;
 		tx_q->priv_data = priv;
-		tx_q->tx_skbuff_dma = kmalloc_array(DMA_TX_SIZE,
+		tx_q->tx_skbuff_dma = kcalloc(DMA_TX_SIZE,
-						    sizeof(*tx_q->tx_skbuff_dma),
+					      sizeof(*tx_q->tx_skbuff_dma),
-						    GFP_KERNEL);
+					      GFP_KERNEL);
 		if (!tx_q->tx_skbuff_dma)
 			goto err_dma;
-		tx_q->tx_skbuff = kmalloc_array(DMA_TX_SIZE,
+		tx_q->tx_skbuff = kcalloc(DMA_TX_SIZE,
-						sizeof(struct sk_buff *),
+					  sizeof(struct sk_buff *),
-						GFP_KERNEL);
+					  GFP_KERNEL);
 		if (!tx_q->tx_skbuff)
 			goto err_dma;
 static inline void stmmac_rx_refill(struct stmmac_priv *priv, u32 queue)
 {
 	struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue];
-	int dirty = stmmac_rx_dirty(priv, queue);
+	int len, dirty = stmmac_rx_dirty(priv, queue);
 	unsigned int entry = rx_q->dirty_rx;
+	len = DIV_ROUND_UP(priv->dma_buf_sz, PAGE_SIZE) * PAGE_SIZE;
 	while (dirty-- > 0) {
 		struct stmmac_rx_buffer *buf = &rx_q->buf_pool[entry];
 		struct dma_desc *p;
 		}
 		buf->addr = page_pool_get_dma_addr(buf->page);
+		/* Sync whole allocation to device. This will invalidate old
+		 * data.
+		 */
+		dma_sync_single_for_device(priv->device, buf->addr, len,
+					   DMA_FROM_DEVICE);
 		stmmac_set_desc_addr(priv, p, buf->addr);
 		stmmac_refill_desc3(priv, rx_q, p);
 			skb_copy_to_linear_data(skb, page_address(buf->page),
 						frame_len);
 			skb_put(skb, frame_len);
-			dma_sync_single_for_device(priv->device, buf->addr,
-						   frame_len, DMA_FROM_DEVICE);
 			if (netif_msg_pktdata(priv)) {
 				netdev_dbg(priv->dev, "frame received (%dbytes)",
 				       NAPI_POLL_WEIGHT);
 		}
 		if (queue < priv->plat->tx_queues_to_use) {
-			netif_napi_add(ndev, &ch->tx_napi, stmmac_napi_poll_tx,
+			netif_tx_napi_add(ndev, &ch->tx_napi,
-				       NAPI_POLL_WEIGHT);
+					  stmmac_napi_poll_tx,
+					  NAPI_POLL_WEIGHT);
 		}
 	}

drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c+7−0

@@ -370,6 +370,13 @@ stmmac_probe_config_dt(struct platform_device pdev, const char *mac) · 369 unmodified lines
370	return ERR_PTR(-ENOMEM);	370	return ERR_PTR(-ENOMEM);
371		371
372	*mac = of_get_mac_address(np);	372	*mac = of_get_mac_address(np);
		373	if (IS_ERR(*mac)) {
		374	if (PTR_ERR(*mac) == -EPROBE_DEFER)
		375	return ERR_CAST(*mac);
		376
		377	*mac = NULL;
		378	}
		379
373	plat->interface = of_get_phy_mode(np);	380	plat->interface = of_get_phy_mode(np);
374		381
375	/* Some wrapper drivers still rely on phy_node. Let's save it while	382	/* Some wrapper drivers still rely on phy_node. Let's save it while

drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c+1−1

@@ -37,7 +37,7 @@ static struct stmmac_tc_entry tc_find_entry(struct stmmac_priv priv, · 36 unmodified lines
37	entry = &priv->tc_entries[i];	37	entry = &priv->tc_entries[i];
38	if (!entry->in_use && !first && free)	38	if (!entry->in_use && !first && free)
39	first = entry;	39	first = entry;
40	if (entry->handle == loc && !free)	40	if ((entry->handle == loc) && !free && !entry->is_frag)
41	dup = entry;	41	dup = entry;
42	}	42	}
43		43

drivers/net/ethernet/toshiba/spider_net.c+1−0

@@ -788,6 +788,7 @@ spider_net_release_tx_chain(struct spider_net_card *card, int brutal) · 787 unmodified lines
788	/* fallthrough, if we release the descriptors	788	/* fallthrough, if we release the descriptors
789	* brutally (then we don't care about	789	* brutally (then we don't care about
790	* SPIDER_NET_DESCR_CARDOWNED) */	790	* SPIDER_NET_DESCR_CARDOWNED) */
		791	/* Fall through */
791		792
792	case SPIDER_NET_DESCR_RESPONSE_ERROR:	793	case SPIDER_NET_DESCR_RESPONSE_ERROR:
793	case SPIDER_NET_DESCR_PROTECTION_ERROR:	794	case SPIDER_NET_DESCR_PROTECTION_ERROR:

drivers/net/ethernet/xscale/Kconfig+1−1

@@ -13,7 +13,7 @@ config NET_VENDOR_XSCALE · 12 unmodified lines
13		13
14	Note that the answer to this question does not directly affect the	14	Note that the answer to this question does not directly affect the
15	kernel: saying N will just cause the configurator to skip all	15	kernel: saying N will just cause the configurator to skip all
16	the questions about XSacle IXP devices. If you say Y, you will be	16	the questions about XScale IXP devices. If you say Y, you will be
17	asked for your specific card in the following questions.	17	asked for your specific card in the following questions.
18		18
19	if NET_VENDOR_XSCALE	19	if NET_VENDOR_XSCALE

drivers/net/hamradio/baycom_epp.c+2−1

 				}
 				break;
 			}
+			/* fall through */
-		default:  /* fall through */
+		default:
 			if (bc->hdlctx.calibrate <= 0)
 				return 0;
 			i = min_t(int, cnt, bc->hdlctx.calibrate);

drivers/net/phy/fixed_phy.c+4−2

@@ -216,8 +216,10 @@ static struct gpio_desc fixed_phy_get_gpiod(struct device_node np) · 215 unmodified lines
216	if (IS_ERR(gpiod)) {	216	if (IS_ERR(gpiod)) {
217	if (PTR_ERR(gpiod) == -EPROBE_DEFER)	217	if (PTR_ERR(gpiod) == -EPROBE_DEFER)
218	return gpiod;	218	return gpiod;
219	pr_err("error getting GPIO for fixed link %pOF, proceed without\n",	219
220	fixed_link_node);	220	if (PTR_ERR(gpiod) != -ENOENT)
		221	pr_err("error getting GPIO for fixed link %pOF, proceed without\n",
		222	fixed_link_node);
221	gpiod = NULL;	223	gpiod = NULL;
222	}	224	}
223		225

drivers/net/phy/mscc.c+8−8

@@ -2226,8 +2226,8 @@ static int vsc8514_probe(struct phy_device *phydev) · 2225 unmodified lines
2226	vsc8531->supp_led_modes = VSC85XX_SUPP_LED_MODES;	2226	vsc8531->supp_led_modes = VSC85XX_SUPP_LED_MODES;
2227	vsc8531->hw_stats = vsc85xx_hw_stats;	2227	vsc8531->hw_stats = vsc85xx_hw_stats;
2228	vsc8531->nstats = ARRAY_SIZE(vsc85xx_hw_stats);	2228	vsc8531->nstats = ARRAY_SIZE(vsc85xx_hw_stats);
2229	vsc8531->stats = devm_kmalloc_array(&phydev->mdio.dev, vsc8531->nstats,	2229	vsc8531->stats = devm_kcalloc(&phydev->mdio.dev, vsc8531->nstats,
2230	sizeof(u64), GFP_KERNEL);	2230	sizeof(u64), GFP_KERNEL);
2231	if (!vsc8531->stats)	2231	if (!vsc8531->stats)
2232	return -ENOMEM;	2232	return -ENOMEM;
2233		2233
@@ -2251,8 +2251,8 @@ static int vsc8574_probe(struct phy_device *phydev) · 17 unmodified lines
2251	vsc8531->supp_led_modes = VSC8584_SUPP_LED_MODES;	2251	vsc8531->supp_led_modes = VSC8584_SUPP_LED_MODES;
2252	vsc8531->hw_stats = vsc8584_hw_stats;	2252	vsc8531->hw_stats = vsc8584_hw_stats;
2253	vsc8531->nstats = ARRAY_SIZE(vsc8584_hw_stats);	2253	vsc8531->nstats = ARRAY_SIZE(vsc8584_hw_stats);
2254	vsc8531->stats = devm_kmalloc_array(&phydev->mdio.dev, vsc8531->nstats,	2254	vsc8531->stats = devm_kcalloc(&phydev->mdio.dev, vsc8531->nstats,
2255	sizeof(u64), GFP_KERNEL);	2255	sizeof(u64), GFP_KERNEL);
2256	if (!vsc8531->stats)	2256	if (!vsc8531->stats)
2257	return -ENOMEM;	2257	return -ENOMEM;
2258		2258
@@ -2281,8 +2281,8 @@ static int vsc8584_probe(struct phy_device *phydev) · 22 unmodified lines
2281	vsc8531->supp_led_modes = VSC8584_SUPP_LED_MODES;	2281	vsc8531->supp_led_modes = VSC8584_SUPP_LED_MODES;
2282	vsc8531->hw_stats = vsc8584_hw_stats;	2282	vsc8531->hw_stats = vsc8584_hw_stats;
2283	vsc8531->nstats = ARRAY_SIZE(vsc8584_hw_stats);	2283	vsc8531->nstats = ARRAY_SIZE(vsc8584_hw_stats);
2284	vsc8531->stats = devm_kmalloc_array(&phydev->mdio.dev, vsc8531->nstats,	2284	vsc8531->stats = devm_kcalloc(&phydev->mdio.dev, vsc8531->nstats,
2285	sizeof(u64), GFP_KERNEL);	2285	sizeof(u64), GFP_KERNEL);
2286	if (!vsc8531->stats)	2286	if (!vsc8531->stats)
2287	return -ENOMEM;	2287	return -ENOMEM;
2288		2288
@@ -2311,8 +2311,8 @@ static int vsc85xx_probe(struct phy_device *phydev) · 22 unmodified lines
2311	vsc8531->supp_led_modes = VSC85XX_SUPP_LED_MODES;	2311	vsc8531->supp_led_modes = VSC85XX_SUPP_LED_MODES;
2312	vsc8531->hw_stats = vsc85xx_hw_stats;	2312	vsc8531->hw_stats = vsc85xx_hw_stats;
2313	vsc8531->nstats = ARRAY_SIZE(vsc85xx_hw_stats);	2313	vsc8531->nstats = ARRAY_SIZE(vsc85xx_hw_stats);
2314	vsc8531->stats = devm_kmalloc_array(&phydev->mdio.dev, vsc8531->nstats,	2314	vsc8531->stats = devm_kcalloc(&phydev->mdio.dev, vsc8531->nstats,
2315	sizeof(u64), GFP_KERNEL);	2315	sizeof(u64), GFP_KERNEL);
2316	if (!vsc8531->stats)	2316	if (!vsc8531->stats)
2317	return -ENOMEM;	2317	return -ENOMEM;
2318		2318

drivers/net/phy/phy_device.c+6−0

 	phydev->link = status & BMSR_LSTATUS ? 1 : 0;
 	phydev->autoneg_complete = status & BMSR_ANEGCOMPLETE ? 1 : 0;
+	/* Consider the case that autoneg was started and "aneg complete"
+	 * bit has been reset, but "link up" bit not yet.
+	 */
+	if (phydev->autoneg == AUTONEG_ENABLE && !phydev->autoneg_complete)
+		phydev->link = 0;
 	return 0;
 }
 EXPORT_SYMBOL(genphy_update_link);

drivers/net/phy/phy_led_triggers.c+2−1

 		if (!phy->last_triggered)
 			led_trigger_event(&phy->led_link_trigger->trigger,
 					  LED_FULL);
+		else
+			led_trigger_event(&phy->last_triggered->trigger, LED_OFF);
-		led_trigger_event(&phy->last_triggered->trigger, LED_OFF);
 		led_trigger_event(&plt->trigger, LED_FULL);
 		phy->last_triggered = plt;
 	}

drivers/net/phy/phylink.c+6−4

 			       pl->supported, true);
 	linkmode_zero(pl->supported);
 	phylink_set(pl->supported, MII);
+	phylink_set(pl->supported, Pause);
+	phylink_set(pl->supported, Asym_Pause);
 	if (s) {
 		__set_bit(s->bit, pl->supported);
 	} else {
 	}
 	if (pl->link_an_mode == MLO_AN_FIXED && pl->get_fixed_state)
 		mod_timer(&pl->link_poll, jiffies + HZ);
-	if (pl->sfp_bus)
-		sfp_upstream_start(pl->sfp_bus);
 	if (pl->phydev)
 		phy_start(pl->phydev);
+	if (pl->sfp_bus)
+		sfp_upstream_start(pl->sfp_bus);
 }
 EXPORT_SYMBOL_GPL(phylink_start);
 {
 	ASSERT_RTNL();
-	if (pl->phydev)
-		phy_stop(pl->phydev);
 	if (pl->sfp_bus)
 		sfp_upstream_stop(pl->sfp_bus);
+	if (pl->phydev)
+		phy_stop(pl->phydev);
 	del_timer_sync(&pl->link_poll);
 	if (pl->link_irq) {
 		free_irq(pl->link_irq, pl);

drivers/net/ppp/pppoe.c+3−0

 	.recvmsg	= pppoe_recvmsg,
 	.mmap		= sock_no_mmap,
 	.ioctl		= pppox_ioctl,
+#ifdef CONFIG_COMPAT
+	.compat_ioctl	= pppox_compat_ioctl,
+#endif
 };
 static const struct pppox_proto pppoe_proto = {

drivers/net/ppp/pppox.c+13−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	#include <linux/string.h>	17	#include <linux/string.h>
18	#include <linux/module.h>	18	#include <linux/module.h>
19	#include <linux/kernel.h>	19	#include <linux/kernel.h>
		20	#include <linux/compat.h>
20	#include <linux/errno.h>	21	#include <linux/errno.h>
21	#include <linux/netdevice.h>	22	#include <linux/netdevice.h>
22	#include <linux/net.h>	23	#include <linux/net.h>
@@ -98,6 +99,18 @@ int pppox_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg) · 75 unmodified lines
98		99
99	EXPORT_SYMBOL(pppox_ioctl);	100	EXPORT_SYMBOL(pppox_ioctl);
100		101
		102	#ifdef CONFIG_COMPAT
		103	int pppox_compat_ioctl(struct socket *sock, unsigned int cmd, unsigned long arg)
		104	{
		105	if (cmd == PPPOEIOCSFWD32)
		106	cmd = PPPOEIOCSFWD;
		107
		108	return pppox_ioctl(sock, cmd, (unsigned long)compat_ptr(arg));
		109	}
		110
		111	EXPORT_SYMBOL(pppox_compat_ioctl);
		112	#endif
		113
101	static int pppox_create(struct net net, struct socket sock, int protocol,	114	static int pppox_create(struct net net, struct socket sock, int protocol,
102	int kern)	115	int kern)
103	{	116	{

drivers/net/ppp/pptp.c+3−0

 	.recvmsg    = sock_no_recvmsg,
 	.mmap       = sock_no_mmap,
 	.ioctl      = pppox_ioctl,
+#ifdef CONFIG_COMPAT
+	.compat_ioctl = pppox_compat_ioctl,
+#endif
 };
 static const struct pppox_proto pppox_pptp_proto = {

drivers/net/tun.c+6−3

 	return true;
 }
-static struct sk_buff *__tun_build_skb(struct page_frag *alloc_frag, char *buf,
+static struct sk_buff *__tun_build_skb(struct tun_file *tfile,
+				       struct page_frag *alloc_frag, char *buf,
 				       int buflen, int len, int pad)
 {
 	struct sk_buff *skb = build_skb(buf, buflen);
 	skb_reserve(skb, pad);
 	skb_put(skb, len);
+	skb_set_owner_w(skb, tfile->socket.sk);
 	get_page(alloc_frag->page);
 	alloc_frag->offset += buflen;
 	 */
 	if (hdr->gso_type || !xdp_prog) {
 		*skb_xdp = 1;
-		return __tun_build_skb(alloc_frag, buf, buflen, len, pad);
+		return __tun_build_skb(tfile, alloc_frag, buf, buflen, len,
+				       pad);
 	}
 	*skb_xdp = 0;
 	rcu_read_unlock();
 	local_bh_enable();
-	return __tun_build_skb(alloc_frag, buf, buflen, len, pad);
+	return __tun_build_skb(tfile, alloc_frag, buf, buflen, len, pad);
 err_xdp:
 	put_page(alloc_frag->page);

drivers/net/usb/pegasus.c+1−1

@@ -282,7 +282,7 @@ static void mdio_write(struct net_device *dev, int phy_id, int loc, int val) · 281 unmodified lines
282	static int read_eprom_word(pegasus_t pegasus, __u8 index, __u16 retdata)	282	static int read_eprom_word(pegasus_t pegasus, __u8 index, __u16 retdata)
283	{	283	{
284	int i;	284	int i;
285	__u8 tmp;	285	__u8 tmp = 0;
286	__le16 retdatai;	286	__le16 retdatai;
287	int ret;	287	int ret;
288		288

drivers/net/usb/qmi_wwan.c+1−0

@@ -1295,6 +1295,7 @@ static const struct usb_device_id products[] = { · 1294 unmodified lines
1295	{QMI_FIXED_INTF(0x2001, 0x7e3d, 4)}, /* D-Link DWM-222 A2 */	1295	{QMI_FIXED_INTF(0x2001, 0x7e3d, 4)}, /* D-Link DWM-222 A2 */
1296	{QMI_FIXED_INTF(0x2020, 0x2031, 4)}, /* Olicard 600 */	1296	{QMI_FIXED_INTF(0x2020, 0x2031, 4)}, /* Olicard 600 */
1297	{QMI_FIXED_INTF(0x2020, 0x2033, 4)}, /* BroadMobi BM806U */	1297	{QMI_FIXED_INTF(0x2020, 0x2033, 4)}, /* BroadMobi BM806U */
		1298	{QMI_FIXED_INTF(0x2020, 0x2060, 4)}, /* BroadMobi BM818 */
1298	{QMI_FIXED_INTF(0x0f3d, 0x68a2, 8)}, /* Sierra Wireless MC7700 */	1299	{QMI_FIXED_INTF(0x0f3d, 0x68a2, 8)}, /* Sierra Wireless MC7700 */
1299	{QMI_FIXED_INTF(0x114f, 0x68a2, 8)}, /* Sierra Wireless MC7750 */	1300	{QMI_FIXED_INTF(0x114f, 0x68a2, 8)}, /* Sierra Wireless MC7750 */
1300	{QMI_FIXED_INTF(0x1199, 0x68a2, 8)}, /* Sierra Wireless MC7710 in QMI mode */	1301	{QMI_FIXED_INTF(0x1199, 0x68a2, 8)}, /* Sierra Wireless MC7710 in QMI mode */

drivers/net/usb/r8152.c+6−6

@@ -50,7 +50,7 @@ · 49 unmodified lines
50	#define PLA_TEREDO_WAKE_BASE 0xc0c4	50	#define PLA_TEREDO_WAKE_BASE 0xc0c4
51	#define PLA_MAR 0xcd00	51	#define PLA_MAR 0xcd00
52	#define PLA_BACKUP 0xd000	52	#define PLA_BACKUP 0xd000
53	#define PAL_BDC_CR 0xd1a0	53	#define PLA_BDC_CR 0xd1a0
54	#define PLA_TEREDO_TIMER 0xd2cc	54	#define PLA_TEREDO_TIMER 0xd2cc
55	#define PLA_REALWOW_TIMER 0xd2e8	55	#define PLA_REALWOW_TIMER 0xd2e8
56	#define PLA_SUSPEND_FLAG 0xd38a	56	#define PLA_SUSPEND_FLAG 0xd38a
@@ -274,7 +274,7 @@ · 217 unmodified lines
274	#define TEREDO_RS_EVENT_MASK 0x00fe	274	#define TEREDO_RS_EVENT_MASK 0x00fe
275	#define OOB_TEREDO_EN 0x0001	275	#define OOB_TEREDO_EN 0x0001
276		276
277	/* PAL_BDC_CR */	277	/* PLA_BDC_CR */
278	#define ALDPS_PROXY_MODE 0x0001	278	#define ALDPS_PROXY_MODE 0x0001
279		279
280	/* PLA_EFUSE_CMD */	280	/* PLA_EFUSE_CMD */
@@ -3191,9 +3191,9 @@ static void r8152b_enter_oob(struct r8152 *tp) · 2910 unmodified lines
3191		3191
3192	rtl_rx_vlan_en(tp, true);	3192	rtl_rx_vlan_en(tp, true);
3193		3193
3194	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);	3194	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
3195	ocp_data \|= ALDPS_PROXY_MODE;	3195	ocp_data \|= ALDPS_PROXY_MODE;
3196	ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);	3196	ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
3197		3197
3198	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);	3198	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3199	ocp_data \|= NOW_IS_OOB \| DIS_MCU_CLROOB;	3199	ocp_data \|= NOW_IS_OOB \| DIS_MCU_CLROOB;
@@ -3577,9 +3577,9 @@ static void r8153_enter_oob(struct r8152 *tp) · 377 unmodified lines
3577		3577
3578	rtl_rx_vlan_en(tp, true);	3578	rtl_rx_vlan_en(tp, true);
3579		3579
3580	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);	3580	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
3581	ocp_data \|= ALDPS_PROXY_MODE;	3581	ocp_data \|= ALDPS_PROXY_MODE;
3582	ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);	3582	ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
3583		3583
3584	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);	3584	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
3585	ocp_data \|= NOW_IS_OOB \| DIS_MCU_CLROOB;	3585	ocp_data \|= NOW_IS_OOB \| DIS_MCU_CLROOB;

drivers/net/wan/sdla.c+1−0

@@ -413,6 +413,7 @@ static void sdla_errors(struct net_device *dev, int cmd, int dlci, int ret, int · 412 unmodified lines
413	case SDLA_RET_NO_BUFS:	413	case SDLA_RET_NO_BUFS:
414	if (cmd == SDLA_INFORMATION_WRITE)	414	if (cmd == SDLA_INFORMATION_WRITE)
415	break;	415	break;
		416	/* Else, fall through */
416		417
417	default:	418	default:
418	netdev_dbg(dev, "Cmd 0x%02X generated return code 0x%02X\n",	419	netdev_dbg(dev, "Cmd 0x%02X generated return code 0x%02X\n",

drivers/net/wireless/intel/iwlwifi/fw/api/rx.h+2−1

 	u8 indirection_table[IWL_RSS_INDIRECTION_TABLE_SIZE];
 } __packed; /* RSS_CONFIG_CMD_API_S_VER_1 */
-#define IWL_MULTI_QUEUE_SYNC_MSG_MAX_SIZE 128
 #define IWL_MULTI_QUEUE_SYNC_SENDER_POS 0
 #define IWL_MULTI_QUEUE_SYNC_SENDER_MSK 0xf
  *
  * @IWL_MVM_RXQ_EMPTY: empty sync notification
  * @IWL_MVM_RXQ_NOTIF_DEL_BA: notify RSS queues of delBA
+ * @IWL_MVM_RXQ_NSSN_SYNC: notify all the RSS queues with the new NSSN
  */
 enum iwl_mvm_rxq_notif_type {
 	IWL_MVM_RXQ_EMPTY,
 	IWL_MVM_RXQ_NOTIF_DEL_BA,
+	IWL_MVM_RXQ_NSSN_SYNC,
 };
 /**

drivers/net/wireless/intel/iwlwifi/fw/dbg.c+12−10

 {
 	u32 img_name_len = le32_to_cpu(dbg_info->img_name_len);
 	u32 dbg_cfg_name_len = le32_to_cpu(dbg_info->dbg_cfg_name_len);
-	const char err_str[] =
-		"WRT: ext=%d. Invalid %s name length %d, expected %d\n";
 	if (img_name_len != IWL_FW_INI_MAX_IMG_NAME_LEN) {
-		IWL_WARN(fwrt, err_str, ext, "image", img_name_len,
+		IWL_WARN(fwrt,
+			 "WRT: ext=%d. Invalid image name length %d, expected %d\n",
+			 ext, img_name_len,
 			 IWL_FW_INI_MAX_IMG_NAME_LEN);
 		return;
 	}
 	if (dbg_cfg_name_len != IWL_FW_INI_MAX_DBG_CFG_NAME_LEN) {
-		IWL_WARN(fwrt, err_str, ext, "debug cfg", dbg_cfg_name_len,
+		IWL_WARN(fwrt,
+			 "WRT: ext=%d. Invalid debug cfg name length %d, expected %d\n",
+			 ext, dbg_cfg_name_len,
 			 IWL_FW_INI_MAX_DBG_CFG_NAME_LEN);
 		return;
 	}
 		struct iwl_ucode_tlv *tlv = iter;
 		void *ini_tlv = (void *)tlv->data;
 		u32 type = le32_to_cpu(tlv->type);
-		const char invalid_ap_str[] =
-			"WRT: ext=%d. Invalid apply point %d for %s\n";
 		switch (type) {
 		case IWL_UCODE_TLV_TYPE_DEBUG_INFO:
 			struct iwl_fw_ini_allocation_data *buf_alloc = ini_tlv;
 			if (pnt != IWL_FW_INI_APPLY_EARLY) {
-				IWL_ERR(fwrt, invalid_ap_str, ext, pnt,
+				IWL_ERR(fwrt,
-					"buffer allocation");
+					"WRT: ext=%d. Invalid apply point %d for buffer allocation\n",
+					ext, pnt);
 				goto next;
 			}
 		}
 		case IWL_UCODE_TLV_TYPE_HCMD:
 			if (pnt < IWL_FW_INI_APPLY_AFTER_ALIVE) {
-				IWL_ERR(fwrt, invalid_ap_str, ext, pnt,
+				IWL_ERR(fwrt,
-					"host command");
+					"WRT: ext=%d. Invalid apply point %d for host command\n",
+					ext, pnt);
 				goto next;
 			}
 			iwl_fw_dbg_send_hcmd(fwrt, tlv, ext);

drivers/net/wireless/intel/iwlwifi/iwl-drv.c+3−1

 	init_completion(&drv->request_firmware_complete);
 	INIT_LIST_HEAD(&drv->list);
+	iwl_load_fw_dbg_tlv(drv->trans->dev, drv->trans);
 #ifdef CONFIG_IWLWIFI_DEBUGFS
 	/* Create the device debugfs entries. */
 	drv->dbgfs_drv = debugfs_create_dir(dev_name(trans->dev),
 err_fw:
 #ifdef CONFIG_IWLWIFI_DEBUGFS
 	debugfs_remove_recursive(drv->dbgfs_drv);
-	iwl_fw_dbg_free(drv->trans);
 #endif
+	iwl_fw_dbg_free(drv->trans);
 	kfree(drv);
 err:
 	return ERR_PTR(ret);

drivers/net/wireless/intel/iwlwifi/mvm/fw.c+21−8

 	for (i = 0; i < n_profiles; i++) {
 		/* the tables start at element 3 */
-		static int pos = 3;
+		int pos = 3;
 		/* The EWRD profiles officially go from 2 to 4, but we
 		 * save them in sar_profiles[1-3] (because we don't
 	return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
 }
+static bool iwl_mvm_sar_geo_support(struct iwl_mvm *mvm)
+{
+	/*
+	 * The GEO_TX_POWER_LIMIT command is not supported on earlier
+	 * firmware versions.  Unfortunately, we don't have a TLV API
+	 * flag to rely on, so rely on the major version which is in
+	 * the first byte of ucode_ver.  This was implemented
+	 * initially on version 38 and then backported to 36, 29 and
+	 * 17.
+	 */
+	return IWL_UCODE_SERIAL(mvm->fw->ucode_ver) >= 38 ||
+	       IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 36 ||
+	       IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 29 ||
+	       IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 17;
+}
 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
 {
 	struct iwl_geo_tx_power_profiles_resp *resp;
 		.data = { data },
 	};
+	if (!iwl_mvm_sar_geo_support(mvm))
+		return -EOPNOTSUPP;
 	ret = iwl_mvm_send_cmd(mvm, &cmd);
 	if (ret) {
 		IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
 	int ret, i, j;
 	u16 cmd_wide_id =  WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
-	/*
+	if (!iwl_mvm_sar_geo_support(mvm))
-	 * This command is not supported on earlier firmware versions.
-	 * Unfortunately, we don't have a TLV API flag to rely on, so
-	 * rely on the major version which is in the first byte of
-	 * ucode_ver.
-	 */
-	if (IWL_UCODE_SERIAL(mvm->fw->ucode_ver) < 41)
 		return 0;
 	ret = iwl_mvm_sar_get_wgds_table(mvm);

drivers/net/wireless/intel/iwlwifi/mvm/mac80211.c+42−16

 	},
 };
-static int iwl_mvm_mac_set_key(struct ieee80211_hw *hw,
+static int __iwl_mvm_mac_set_key(struct ieee80211_hw *hw,
-			       enum set_key_cmd cmd,
+				 enum set_key_cmd cmd,
-			       struct ieee80211_vif *vif,
+				 struct ieee80211_vif *vif,
-			       struct ieee80211_sta *sta,
+				 struct ieee80211_sta *sta,
-			       struct ieee80211_key_conf *key);
+				 struct ieee80211_key_conf *key);
 void iwl_mvm_ref(struct iwl_mvm *mvm, enum iwl_mvm_ref_type ref_type)
 {
 	ieee80211_hw_set(hw, SUPPORTS_VHT_EXT_NSS_BW);
 	ieee80211_hw_set(hw, BUFF_MMPDU_TXQ);
 	ieee80211_hw_set(hw, STA_MMPDU_TXQ);
-	ieee80211_hw_set(hw, TX_AMSDU);
+	/*
+	 * On older devices, enabling TX A-MSDU occasionally leads to
+	 * something getting messed up, the command read from the FIFO
+	 * gets out of sync and isn't a TX command, so that we have an
+	 * assert EDC.
+	 *
+	 * It's not clear where the bug is, but since we didn't used to
+	 * support A-MSDU until moving the mac80211 iTXQs, just leave it
+	 * for older devices. We also don't see this issue on any newer
+	 * devices.
+	 */
+	if (mvm->cfg->device_family >= IWL_DEVICE_FAMILY_9000)
+		ieee80211_hw_set(hw, TX_AMSDU);
 	ieee80211_hw_set(hw, TX_FRAG_LIST);
 	if (iwl_mvm_has_tlc_offload(mvm)) {
 		mvmvif->ap_early_keys[i] = NULL;
-		ret = iwl_mvm_mac_set_key(hw, SET_KEY, vif, NULL, key);
+		ret = __iwl_mvm_mac_set_key(hw, SET_KEY, vif, NULL, key);
 		if (ret)
 			goto out_quota_failed;
 	}
 	return ret;
 }
-static int iwl_mvm_mac_set_key(struct ieee80211_hw *hw,
+static int __iwl_mvm_mac_set_key(struct ieee80211_hw *hw,
-			       enum set_key_cmd cmd,
+				 enum set_key_cmd cmd,
-			       struct ieee80211_vif *vif,
+				 struct ieee80211_vif *vif,
-			       struct ieee80211_sta *sta,
+				 struct ieee80211_sta *sta,
-			       struct ieee80211_key_conf *key)
+				 struct ieee80211_key_conf *key)
 {
 	struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
 	struct iwl_mvm *mvm = IWL_MAC80211_GET_MVM(hw);
 			return -EOPNOTSUPP;
 	}
-	mutex_lock(&mvm->mutex);
 	switch (cmd) {
 	case SET_KEY:
 		if ((vif->type == NL80211_IFTYPE_ADHOC ||
 		ret = -EINVAL;
 	}
+	return ret;
+}
+static int iwl_mvm_mac_set_key(struct ieee80211_hw *hw,
+			       enum set_key_cmd cmd,
+			       struct ieee80211_vif *vif,
+			       struct ieee80211_sta *sta,
+			       struct ieee80211_key_conf *key)
+{
+	struct iwl_mvm *mvm = IWL_MAC80211_GET_MVM(hw);
+	int ret;
+	mutex_lock(&mvm->mutex);
+	ret = __iwl_mvm_mac_set_key(hw, cmd, vif, sta, key);
 	mutex_unlock(&mvm->mutex);
 	return ret;
 }
 	u32 qmask = BIT(mvm->trans->num_rx_queues) - 1;
 	int ret;
-	lockdep_assert_held(&mvm->mutex);
 	if (!iwl_mvm_has_new_rx_api(mvm))
 		return;
 		atomic_set(&mvm->queue_sync_counter,
 			   mvm->trans->num_rx_queues);
-	ret = iwl_mvm_notify_rx_queue(mvm, qmask, (u8 *)notif, size);
+	ret = iwl_mvm_notify_rx_queue(mvm, qmask, (u8 *)notif,
+				      size, !notif->sync);
 	if (ret) {
 		IWL_ERR(mvm, "Failed to trigger RX queues sync (%d)\n", ret);
 		goto out;
 	}
 	if (notif->sync) {
+		lockdep_assert_held(&mvm->mutex);
 		ret = wait_event_timeout(mvm->rx_sync_waitq,
 					 atomic_read(&mvm->queue_sync_counter) == 0 ||
 					 iwl_mvm_is_radio_killed(mvm),

drivers/net/wireless/intel/iwlwifi/mvm/mvm.h+4−4

drivers/net/wireless/intel/iwlwifi/mvm/nvm.c+1−1

@@ -620,7 +620,7 @@ void iwl_mvm_rx_chub_update_mcc(struct iwl_mvm *mvm, · 619 unmodified lines
620	enum iwl_mcc_source src;	620	enum iwl_mcc_source src;
621	char mcc[3];	621	char mcc[3];
622	struct ieee80211_regdomain *regd;	622	struct ieee80211_regdomain *regd;
623	u32 wgds_tbl_idx;	623	int wgds_tbl_idx;
624		624
625	lockdep_assert_held(&mvm->mutex);	625	lockdep_assert_held(&mvm->mutex);
626		626

drivers/net/wireless/intel/iwlwifi/mvm/ops.c+2−2

drivers/net/wireless/intel/iwlwifi/mvm/rs.c+289−250

 	return tid;
 }
-void iwl_mvm_rs_tx_status(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
-			  int tid, struct ieee80211_tx_info *info, bool ndp)
-{
-	int legacy_success;
-	int retries;
-	int i;
-	struct iwl_lq_cmd *table;
-	u32 lq_hwrate;
-	struct rs_rate lq_rate, tx_resp_rate;
-	struct iwl_scale_tbl_info *curr_tbl, *other_tbl, *tmp_tbl;
-	u32 tlc_info = (uintptr_t)info->status.status_driver_data[0];
-	u8 reduced_txp = tlc_info & RS_DRV_DATA_TXP_MSK;
-	u8 lq_color = RS_DRV_DATA_LQ_COLOR_GET(tlc_info);
-	u32 tx_resp_hwrate = (uintptr_t)info->status.status_driver_data[1];
-	struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
-	struct iwl_lq_sta *lq_sta = &mvmsta->lq_sta.rs_drv;
-	/* Treat uninitialized rate scaling data same as non-existing. */
-	if (!lq_sta) {
-		IWL_DEBUG_RATE(mvm, "Station rate scaling not created yet.\n");
-		return;
-	} else if (!lq_sta->pers.drv) {
-		IWL_DEBUG_RATE(mvm, "Rate scaling not initialized yet.\n");
-		return;
-	}
-	/* This packet was aggregated but doesn't carry status info */
-	if ((info->flags & IEEE80211_TX_CTL_AMPDU) &&
-	    !(info->flags & IEEE80211_TX_STAT_AMPDU))
-		return;
-	if (rs_rate_from_ucode_rate(tx_resp_hwrate, info->band,
-				    &tx_resp_rate)) {
-		WARN_ON_ONCE(1);
-		return;
-	}
-#ifdef CONFIG_MAC80211_DEBUGFS
-	/* Disable last tx check if we are debugging with fixed rate but
-	 * update tx stats */
-	if (lq_sta->pers.dbg_fixed_rate) {
-		int index = tx_resp_rate.index;
-		enum rs_column column;
-		int attempts, success;
-		column = rs_get_column_from_rate(&tx_resp_rate);
-		if (WARN_ONCE(column == RS_COLUMN_INVALID,
-			      "Can't map rate 0x%x to column",
-			      tx_resp_hwrate))
-			return;
-		if (info->flags & IEEE80211_TX_STAT_AMPDU) {
-			attempts = info->status.ampdu_len;
-			success = info->status.ampdu_ack_len;
-		} else {
-			attempts = info->status.rates[0].count;
-			success = !!(info->flags & IEEE80211_TX_STAT_ACK);
-		}
-		lq_sta->pers.tx_stats[column][index].total += attempts;
-		lq_sta->pers.tx_stats[column][index].success += success;
-		IWL_DEBUG_RATE(mvm, "Fixed rate 0x%x success %d attempts %d\n",
-			       tx_resp_hwrate, success, attempts);
-		return;
-	}
-#endif
-	if (time_after(jiffies,
-		       (unsigned long)(lq_sta->last_tx +
-				       (IWL_MVM_RS_IDLE_TIMEOUT * HZ)))) {
-		IWL_DEBUG_RATE(mvm, "Tx idle for too long. reinit rs\n");
-		iwl_mvm_rs_rate_init(mvm, sta, info->band, true);
-		return;
-	}
-	lq_sta->last_tx = jiffies;
-	/* Ignore this Tx frame response if its initial rate doesn't match
-	 * that of latest Link Quality command.  There may be stragglers
-	 * from a previous Link Quality command, but we're no longer interested
-	 * in those; they're either from the "active" mode while we're trying
-	 * to check "search" mode, or a prior "search" mode after we've moved
-	 * to a new "search" mode (which might become the new "active" mode).
-	 */
-	table = &lq_sta->lq;
-	lq_hwrate = le32_to_cpu(table->rs_table[0]);
-	if (rs_rate_from_ucode_rate(lq_hwrate, info->band, &lq_rate)) {
-		WARN_ON_ONCE(1);
-		return;
-	}
-	/* Here we actually compare this rate to the latest LQ command */
-	if (lq_color != LQ_FLAG_COLOR_GET(table->flags)) {
-		IWL_DEBUG_RATE(mvm,
-			       "tx resp color 0x%x does not match 0x%x\n",
-			       lq_color, LQ_FLAG_COLOR_GET(table->flags));
-		/*
-		 * Since rates mis-match, the last LQ command may have failed.
-		 * After IWL_MISSED_RATE_MAX mis-matches, resync the uCode with
-		 * ... driver.
-		 */
-		lq_sta->missed_rate_counter++;
-		if (lq_sta->missed_rate_counter > IWL_MVM_RS_MISSED_RATE_MAX) {
-			lq_sta->missed_rate_counter = 0;
-			IWL_DEBUG_RATE(mvm,
-				       "Too many rates mismatch. Send sync LQ. rs_state %d\n",
-				       lq_sta->rs_state);
-			iwl_mvm_send_lq_cmd(mvm, &lq_sta->lq, false);
-		}
-		/* Regardless, ignore this status info for outdated rate */
-		return;
-	} else
-		/* Rate did match, so reset the missed_rate_counter */
-		lq_sta->missed_rate_counter = 0;
-	if (!lq_sta->search_better_tbl) {
-		curr_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]);
-		other_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]);
-	} else {
-		curr_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]);
-		other_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]);
-	}
-	if (WARN_ON_ONCE(!rs_rate_column_match(&lq_rate, &curr_tbl->rate))) {
-		IWL_DEBUG_RATE(mvm,
-			       "Neither active nor search matches tx rate\n");
-		tmp_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]);
-		rs_dump_rate(mvm, &tmp_tbl->rate, "ACTIVE");
-		tmp_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]);
-		rs_dump_rate(mvm, &tmp_tbl->rate, "SEARCH");
-		rs_dump_rate(mvm, &lq_rate, "ACTUAL");
-		/*
-		 * no matching table found, let's by-pass the data collection
-		 * and continue to perform rate scale to find the rate table
-		 */
-		rs_stay_in_table(lq_sta, true);
-		goto done;
-	}
-	/*
-	 * Updating the frame history depends on whether packets were
-	 * aggregated.
-	 *
-	 * For aggregation, all packets were transmitted at the same rate, the
-	 * first index into rate scale table.
-	 */
-	if (info->flags & IEEE80211_TX_STAT_AMPDU) {
-		rs_collect_tpc_data(mvm, lq_sta, curr_tbl, tx_resp_rate.index,
-				    info->status.ampdu_len,
-				    info->status.ampdu_ack_len,
-				    reduced_txp);
-		/* ampdu_ack_len = 0 marks no BA was received. For TLC, treat
-		 * it as a single frame loss as we don't want the success ratio
-		 * to dip too quickly because a BA wasn't received.
-		 * For TPC, there's no need for this optimisation since we want
-		 * to recover very quickly from a bad power reduction and,
-		 * therefore we'd like the success ratio to get an immediate hit
-		 * when failing to get a BA, so we'd switch back to a lower or
-		 * zero power reduction. When FW transmits agg with a rate
-		 * different from the initial rate, it will not use reduced txp
-		 * and will send BA notification twice (one empty with reduced
-		 * txp equal to the value from LQ and one with reduced txp 0).
-		 * We need to update counters for each txp level accordingly.
-		 */
-		if (info->status.ampdu_ack_len == 0)
-			info->status.ampdu_len = 1;
-		rs_collect_tlc_data(mvm, mvmsta, tid, curr_tbl, tx_resp_rate.index,
-				    info->status.ampdu_len,
-				    info->status.ampdu_ack_len);
-		/* Update success/fail counts if not searching for new mode */
-		if (lq_sta->rs_state == RS_STATE_STAY_IN_COLUMN) {
-			lq_sta->total_success += info->status.ampdu_ack_len;
-			lq_sta->total_failed += (info->status.ampdu_len -
-					info->status.ampdu_ack_len);
-		}
-	} else {
-		/* For legacy, update frame history with for each Tx retry. */
-		retries = info->status.rates[0].count - 1;
-		/* HW doesn't send more than 15 retries */
-		retries = min(retries, 15);
-		/* The last transmission may have been successful */
-		legacy_success = !!(info->flags & IEEE80211_TX_STAT_ACK);
-		/* Collect data for each rate used during failed TX attempts */
-		for (i = 0; i <= retries; ++i) {
-			lq_hwrate = le32_to_cpu(table->rs_table[i]);
-			if (rs_rate_from_ucode_rate(lq_hwrate, info->band,
-						    &lq_rate)) {
-				WARN_ON_ONCE(1);
-				return;
-			}
-			/*
-			 * Only collect stats if retried rate is in the same RS
-			 * table as active/search.
-			 */
-			if (rs_rate_column_match(&lq_rate, &curr_tbl->rate))
-				tmp_tbl = curr_tbl;
-			else if (rs_rate_column_match(&lq_rate,
-						      &other_tbl->rate))
-				tmp_tbl = other_tbl;
-			else
-				continue;
-			rs_collect_tpc_data(mvm, lq_sta, tmp_tbl,
-					    tx_resp_rate.index, 1,
-					    i < retries ? 0 : legacy_success,
-					    reduced_txp);
-			rs_collect_tlc_data(mvm, mvmsta, tid, tmp_tbl,
-					    tx_resp_rate.index, 1,
-					    i < retries ? 0 : legacy_success);
-		}
-		/* Update success/fail counts if not searching for new mode */
-		if (lq_sta->rs_state == RS_STATE_STAY_IN_COLUMN) {
-			lq_sta->total_success += legacy_success;
-			lq_sta->total_failed += retries + (1 - legacy_success);
-		}
-	}
-	/* The last TX rate is cached in lq_sta; it's set in if/else above */
-	lq_sta->last_rate_n_flags = lq_hwrate;
-	IWL_DEBUG_RATE(mvm, "reduced txpower: %d\n", reduced_txp);
-done:
-	/* See if there's a better rate or modulation mode to try. */
-	if (sta->supp_rates[info->band])
-		rs_rate_scale_perform(mvm, sta, lq_sta, tid, ndp);
-}
 /*
  * mac80211 sends us Tx status
  */
 	struct iwl_op_mode *op_mode = mvm_r;
 	struct iwl_mvm *mvm = IWL_OP_MODE_GET_MVM(op_mode);
 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+	struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
-	if (!iwl_mvm_sta_from_mac80211(sta)->vif)
+	if (!mvmsta->vif)
 		return;
 	if (!ieee80211_is_data(hdr->frame_control) ||
 	tbl->expected_tpt = rs_get_expected_tpt_table(lq_sta, column, rate->bw);
 }
+/* rs uses two tables, one is active and the second is for searching better
+ * configuration. This function, according to the index of the currently
+ * active table returns the search table, which is located at the
+ * index complementary to 1 according to the active table (active = 1,
+ * search = 0 or active = 0, search = 1).
+ * Since lq_info is an arary of size 2, make sure index cannot be out of bounds.
+ */
+static inline u8 rs_search_tbl(u8 active_tbl)
+{
+	return (active_tbl ^ 1) & 1;
+}
 static s32 rs_get_best_rate(struct iwl_mvm *mvm,
 			    struct iwl_lq_sta *lq_sta,
 			    struct iwl_scale_tbl_info *tbl,	/* "search" */
 			       struct iwl_scale_tbl_info *tbl)
 {
 	rs_fill_lq_cmd(mvm, sta, lq_sta, &tbl->rate);
-	iwl_mvm_send_lq_cmd(mvm, &lq_sta->lq, false);
+	iwl_mvm_send_lq_cmd(mvm, &lq_sta->lq);
 }
 static bool rs_tweak_rate_tbl(struct iwl_mvm *mvm,
 			       struct ieee80211_sta *sta,
 			       enum rs_column col_id)
 {
-	struct iwl_scale_tbl_info *tbl = &(lq_sta->lq_info[lq_sta->active_tbl]);
+	struct iwl_scale_tbl_info *tbl = &lq_sta->lq_info[lq_sta->active_tbl];
 	struct iwl_scale_tbl_info *search_tbl =
-				&(lq_sta->lq_info[(1 - lq_sta->active_tbl)]);
+		&lq_sta->lq_info[rs_search_tbl(lq_sta->active_tbl)];
 	struct rs_rate *rate = &search_tbl->rate;
 	const struct rs_tx_column *column = &rs_tx_columns[col_id];
 	const struct rs_tx_column *curr_column = &rs_tx_columns[tbl->column];
 	if (!lq_sta->search_better_tbl)
 		active_tbl = lq_sta->active_tbl;
 	else
-		active_tbl = 1 - lq_sta->active_tbl;
+		active_tbl = rs_search_tbl(lq_sta->active_tbl);
 	tbl = &(lq_sta->lq_info[active_tbl]);
 	rate = &tbl->rate;
 		/* If new "search" mode was selected, set up in uCode table */
 		if (lq_sta->search_better_tbl) {
 			/* Access the "search" table, clear its history. */
-			tbl = &(lq_sta->lq_info[(1 - lq_sta->active_tbl)]);
+			tbl = &lq_sta->lq_info[rs_search_tbl(lq_sta->active_tbl)];
 			rs_rate_scale_clear_tbl_windows(mvm, tbl);
 			/* Use new "search" start rate */
 static void rs_initialize_lq(struct iwl_mvm *mvm,
 			     struct ieee80211_sta *sta,
 			     struct iwl_lq_sta *lq_sta,
-			     enum nl80211_band band, bool update)
+			     enum nl80211_band band)
 {
 	struct iwl_scale_tbl_info *tbl;
 	struct rs_rate *rate;
 	if (!lq_sta->search_better_tbl)
 		active_tbl = lq_sta->active_tbl;
 	else
-		active_tbl = 1 - lq_sta->active_tbl;
+		active_tbl = rs_search_tbl(lq_sta->active_tbl);
 	tbl = &(lq_sta->lq_info[active_tbl]);
 	rate = &tbl->rate;
 	rs_set_expected_tpt_table(lq_sta, tbl);
 	rs_fill_lq_cmd(mvm, sta, lq_sta, rate);
 	/* TODO restore station should remember the lq cmd */
-	iwl_mvm_send_lq_cmd(mvm, &lq_sta->lq, !update);
+	iwl_mvm_send_lq_cmd(mvm, &lq_sta->lq);
 }
 static void rs_drv_get_rate(void *mvm_r, struct ieee80211_sta *sta,
  * Called after adding a new station to initialize rate scaling
  */
 static void rs_drv_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
-			     enum nl80211_band band, bool update)
+			     enum nl80211_band band)
 {
 	int i, j;
 	struct ieee80211_hw *hw = mvm->hw;
 	struct ieee80211_supported_band *sband;
 	unsigned long supp; /* must be unsigned long for for_each_set_bit */
+	lockdep_assert_held(&mvmsta->lq_sta.rs_drv.pers.lock);
 	/* clear all non-persistent lq data */
 	memset(lq_sta, 0, offsetof(typeof(*lq_sta), pers));
 #ifdef CONFIG_IWLWIFI_DEBUGFS
 	iwl_mvm_reset_frame_stats(mvm);
 #endif
-	rs_initialize_lq(mvm, sta, lq_sta, band, update);
+	rs_initialize_lq(mvm, sta, lq_sta, band);
 }
 static void rs_drv_rate_update(void *mvm_r,
 	iwl_mvm_rs_rate_init(mvm, sta, sband->band, true);
 }
+static void __iwl_mvm_rs_tx_status(struct iwl_mvm *mvm,
+				   struct ieee80211_sta *sta,
+				   int tid, struct ieee80211_tx_info *info,
+				   bool ndp)
+{
+	int legacy_success;
+	int retries;
+	int i;
+	struct iwl_lq_cmd *table;
+	u32 lq_hwrate;
+	struct rs_rate lq_rate, tx_resp_rate;
+	struct iwl_scale_tbl_info *curr_tbl, *other_tbl, *tmp_tbl;
+	u32 tlc_info = (uintptr_t)info->status.status_driver_data[0];
+	u8 reduced_txp = tlc_info & RS_DRV_DATA_TXP_MSK;
+	u8 lq_color = RS_DRV_DATA_LQ_COLOR_GET(tlc_info);
+	u32 tx_resp_hwrate = (uintptr_t)info->status.status_driver_data[1];
+	struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
+	struct iwl_lq_sta *lq_sta = &mvmsta->lq_sta.rs_drv;
+	/* Treat uninitialized rate scaling data same as non-existing. */
+	if (!lq_sta) {
+		IWL_DEBUG_RATE(mvm, "Station rate scaling not created yet.\n");
+		return;
+	} else if (!lq_sta->pers.drv) {
+		IWL_DEBUG_RATE(mvm, "Rate scaling not initialized yet.\n");
+		return;
+	}
+	/* This packet was aggregated but doesn't carry status info */
+	if ((info->flags & IEEE80211_TX_CTL_AMPDU) &&
+	    !(info->flags & IEEE80211_TX_STAT_AMPDU))
+		return;
+	if (rs_rate_from_ucode_rate(tx_resp_hwrate, info->band,
+				    &tx_resp_rate)) {
+		WARN_ON_ONCE(1);
+		return;
+	}
+#ifdef CONFIG_MAC80211_DEBUGFS
+	/* Disable last tx check if we are debugging with fixed rate but
+	 * update tx stats
+	 */
+	if (lq_sta->pers.dbg_fixed_rate) {
+		int index = tx_resp_rate.index;
+		enum rs_column column;
+		int attempts, success;
+		column = rs_get_column_from_rate(&tx_resp_rate);
+		if (WARN_ONCE(column == RS_COLUMN_INVALID,
+			      "Can't map rate 0x%x to column",
+			      tx_resp_hwrate))
+			return;
+		if (info->flags & IEEE80211_TX_STAT_AMPDU) {
+			attempts = info->status.ampdu_len;
+			success = info->status.ampdu_ack_len;
+		} else {
+			attempts = info->status.rates[0].count;
+			success = !!(info->flags & IEEE80211_TX_STAT_ACK);
+		}
+		lq_sta->pers.tx_stats[column][index].total += attempts;
+		lq_sta->pers.tx_stats[column][index].success += success;
+		IWL_DEBUG_RATE(mvm, "Fixed rate 0x%x success %d attempts %d\n",
+			       tx_resp_hwrate, success, attempts);
+		return;
+	}
+#endif
+	if (time_after(jiffies,
+		       (unsigned long)(lq_sta->last_tx +
+				       (IWL_MVM_RS_IDLE_TIMEOUT * HZ)))) {
+		IWL_DEBUG_RATE(mvm, "Tx idle for too long. reinit rs\n");
+		/* reach here only in case of driver RS, call directly
+		 * the unlocked version
+		 */
+		rs_drv_rate_init(mvm, sta, info->band);
+		return;
+	}
+	lq_sta->last_tx = jiffies;
+	/* Ignore this Tx frame response if its initial rate doesn't match
+	 * that of latest Link Quality command.  There may be stragglers
+	 * from a previous Link Quality command, but we're no longer interested
+	 * in those; they're either from the "active" mode while we're trying
+	 * to check "search" mode, or a prior "search" mode after we've moved
+	 * to a new "search" mode (which might become the new "active" mode).
+	 */
+	table = &lq_sta->lq;
+	lq_hwrate = le32_to_cpu(table->rs_table[0]);
+	if (rs_rate_from_ucode_rate(lq_hwrate, info->band, &lq_rate)) {
+		WARN_ON_ONCE(1);
+		return;
+	}
+	/* Here we actually compare this rate to the latest LQ command */
+	if (lq_color != LQ_FLAG_COLOR_GET(table->flags)) {
+		IWL_DEBUG_RATE(mvm,
+			       "tx resp color 0x%x does not match 0x%x\n",
+			       lq_color, LQ_FLAG_COLOR_GET(table->flags));
+		/* Since rates mis-match, the last LQ command may have failed.
+		 * After IWL_MISSED_RATE_MAX mis-matches, resync the uCode with
+		 * ... driver.
+		 */
+		lq_sta->missed_rate_counter++;
+		if (lq_sta->missed_rate_counter > IWL_MVM_RS_MISSED_RATE_MAX) {
+			lq_sta->missed_rate_counter = 0;
+			IWL_DEBUG_RATE(mvm,
+				       "Too many rates mismatch. Send sync LQ. rs_state %d\n",
+				       lq_sta->rs_state);
+			iwl_mvm_send_lq_cmd(mvm, &lq_sta->lq);
+		}
+		/* Regardless, ignore this status info for outdated rate */
+		return;
+	}
+	/* Rate did match, so reset the missed_rate_counter */
+	lq_sta->missed_rate_counter = 0;
+	if (!lq_sta->search_better_tbl) {
+		curr_tbl = &lq_sta->lq_info[lq_sta->active_tbl];
+		other_tbl = &lq_sta->lq_info[rs_search_tbl(lq_sta->active_tbl)];
+	} else {
+		curr_tbl = &lq_sta->lq_info[rs_search_tbl(lq_sta->active_tbl)];
+		other_tbl = &lq_sta->lq_info[lq_sta->active_tbl];
+	}
+	if (WARN_ON_ONCE(!rs_rate_column_match(&lq_rate, &curr_tbl->rate))) {
+		IWL_DEBUG_RATE(mvm,
+			       "Neither active nor search matches tx rate\n");
+		tmp_tbl = &lq_sta->lq_info[lq_sta->active_tbl];
+		rs_dump_rate(mvm, &tmp_tbl->rate, "ACTIVE");
+		tmp_tbl = &lq_sta->lq_info[rs_search_tbl(lq_sta->active_tbl)];
+		rs_dump_rate(mvm, &tmp_tbl->rate, "SEARCH");
+		rs_dump_rate(mvm, &lq_rate, "ACTUAL");
+		/* no matching table found, let's by-pass the data collection
+		 * and continue to perform rate scale to find the rate table
+		 */
+		rs_stay_in_table(lq_sta, true);
+		goto done;
+	}
+	/* Updating the frame history depends on whether packets were
+	 * aggregated.
+	 *
+	 * For aggregation, all packets were transmitted at the same rate, the
+	 * first index into rate scale table.
+	 */
+	if (info->flags & IEEE80211_TX_STAT_AMPDU) {
+		rs_collect_tpc_data(mvm, lq_sta, curr_tbl, tx_resp_rate.index,
+				    info->status.ampdu_len,
+				    info->status.ampdu_ack_len,
+				    reduced_txp);
+		/* ampdu_ack_len = 0 marks no BA was received. For TLC, treat
+		 * it as a single frame loss as we don't want the success ratio
+		 * to dip too quickly because a BA wasn't received.
+		 * For TPC, there's no need for this optimisation since we want
+		 * to recover very quickly from a bad power reduction and,
+		 * therefore we'd like the success ratio to get an immediate hit
+		 * when failing to get a BA, so we'd switch back to a lower or
+		 * zero power reduction. When FW transmits agg with a rate
+		 * different from the initial rate, it will not use reduced txp
+		 * and will send BA notification twice (one empty with reduced
+		 * txp equal to the value from LQ and one with reduced txp 0).
+		 * We need to update counters for each txp level accordingly.
+		 */
+		if (info->status.ampdu_ack_len == 0)
+			info->status.ampdu_len = 1;
+		rs_collect_tlc_data(mvm, mvmsta, tid, curr_tbl,
+				    tx_resp_rate.index,
+				    info->status.ampdu_len,
+				    info->status.ampdu_ack_len);
+		/* Update success/fail counts if not searching for new mode */
+		if (lq_sta->rs_state == RS_STATE_STAY_IN_COLUMN) {
+			lq_sta->total_success += info->status.ampdu_ack_len;
+			lq_sta->total_failed += (info->status.ampdu_len -
+					info->status.ampdu_ack_len);
+		}
+	} else {
+		/* For legacy, update frame history with for each Tx retry. */
+		retries = info->status.rates[0].count - 1;
+		/* HW doesn't send more than 15 retries */
+		retries = min(retries, 15);
+		/* The last transmission may have been successful */
+		legacy_success = !!(info->flags & IEEE80211_TX_STAT_ACK);
+		/* Collect data for each rate used during failed TX attempts */
+		for (i = 0; i <= retries; ++i) {
+			lq_hwrate = le32_to_cpu(table->rs_table[i]);
+			if (rs_rate_from_ucode_rate(lq_hwrate, info->band,
+						    &lq_rate)) {
+				WARN_ON_ONCE(1);
+				return;
+			}
+			/* Only collect stats if retried rate is in the same RS
+			 * table as active/search.
+			 */
+			if (rs_rate_column_match(&lq_rate, &curr_tbl->rate))
+				tmp_tbl = curr_tbl;
+			else if (rs_rate_column_match(&lq_rate,
+						      &other_tbl->rate))
+				tmp_tbl = other_tbl;
+			else
+				continue;
+			rs_collect_tpc_data(mvm, lq_sta, tmp_tbl,
+					    tx_resp_rate.index, 1,
+					    i < retries ? 0 : legacy_success,
+					    reduced_txp);
+			rs_collect_tlc_data(mvm, mvmsta, tid, tmp_tbl,
+					    tx_resp_rate.index, 1,
+					    i < retries ? 0 : legacy_success);
+		}
+		/* Update success/fail counts if not searching for new mode */
+		if (lq_sta->rs_state == RS_STATE_STAY_IN_COLUMN) {
+			lq_sta->total_success += legacy_success;
+			lq_sta->total_failed += retries + (1 - legacy_success);
+		}
+	}
+	/* The last TX rate is cached in lq_sta; it's set in if/else above */
+	lq_sta->last_rate_n_flags = lq_hwrate;
+	IWL_DEBUG_RATE(mvm, "reduced txpower: %d\n", reduced_txp);
+done:
+	/* See if there's a better rate or modulation mode to try. */
+	if (sta->supp_rates[info->band])
+		rs_rate_scale_perform(mvm, sta, lq_sta, tid, ndp);
+}
+void iwl_mvm_rs_tx_status(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
+			  int tid, struct ieee80211_tx_info *info, bool ndp)
+{
+	struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
+	/* If it's locked we are in middle of init flow
+	 * just wait for next tx status to update the lq_sta data
+	 */
+	if (!spin_trylock(&mvmsta->lq_sta.rs_drv.pers.lock))
+		return;
+	__iwl_mvm_rs_tx_status(mvm, sta, tid, info, ndp);
+	spin_unlock(&mvmsta->lq_sta.rs_drv.pers.lock);
+}
 #ifdef CONFIG_MAC80211_DEBUGFS
 static void rs_build_rates_table_from_fixed(struct iwl_mvm *mvm,
 					    struct iwl_lq_cmd *lq_cmd,
 		bfersta_ss_params &= ~LQ_SS_BFER_ALLOWED;
 		bfersta_lq_cmd->ss_params = cpu_to_le32(bfersta_ss_params);
-		iwl_mvm_send_lq_cmd(mvm, bfersta_lq_cmd, false);
+		iwl_mvm_send_lq_cmd(mvm, bfersta_lq_cmd);
 		ss_params |= LQ_SS_BFER_ALLOWED;
 		IWL_DEBUG_RATE(mvm,
 	if (lq_sta->pers.dbg_fixed_rate) {
 		rs_fill_lq_cmd(mvm, NULL, lq_sta, NULL);
-		iwl_mvm_send_lq_cmd(lq_sta->pers.drv, &lq_sta->lq, false);
+		iwl_mvm_send_lq_cmd(lq_sta->pers.drv, &lq_sta->lq);
 	}
 }
 void iwl_mvm_rs_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
 			  enum nl80211_band band, bool update)
 {
-	if (iwl_mvm_has_tlc_offload(mvm))
+	if (iwl_mvm_has_tlc_offload(mvm)) {
 		rs_fw_rate_init(mvm, sta, band, update);
-	else
+	} else {
-		rs_drv_rate_init(mvm, sta, band, update);
+		struct iwl_mvm_sta *mvmsta = iwl_mvm_sta_from_mac80211(sta);
+		spin_lock(&mvmsta->lq_sta.rs_drv.pers.lock);
+		rs_drv_rate_init(mvm, sta, band);
+		spin_unlock(&mvmsta->lq_sta.rs_drv.pers.lock);
+	}
 }
 int iwl_mvm_rate_control_register(void)
 			lq->flags &= ~LQ_FLAG_USE_RTS_MSK;
 	}
-	return iwl_mvm_send_lq_cmd(mvm, lq, false);
+	return iwl_mvm_send_lq_cmd(mvm, lq);
 }
 /**

drivers/net/wireless/intel/iwlwifi/mvm/rs.h+2−1

  * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved.
  * Copyright(c) 2015 Intel Mobile Communications GmbH
  * Copyright(c) 2017 Intel Deutschland GmbH
- * Copyright(c) 2018 Intel Corporation
+ * Copyright(c) 2018 - 2019 Intel Corporation
  *
  * Contact Information:
  *  Intel Linux Wireless <linuxwifi@intel.com>
 		s8 last_rssi;
 		struct rs_rate_stats tx_stats[RS_COLUMN_COUNT][IWL_RATE_COUNT];
 		struct iwl_mvm *drv;
+		spinlock_t lock; /* for races in reinit/update table */
 	} pers;
 };

drivers/net/wireless/intel/iwlwifi/mvm/rxmq.c+134−51

@@ -463,20 +463,22 @@ static bool iwl_mvm_is_dup(struct ieee80211_sta *sta, int queue, · 462 unmodified lines
463	}	463	}
464		464
465	int iwl_mvm_notify_rx_queue(struct iwl_mvm *mvm, u32 rxq_mask,	465	int iwl_mvm_notify_rx_queue(struct iwl_mvm *mvm, u32 rxq_mask,
466	const u8 *data, u32 count)	466	const u8 *data, u32 count, bool async)
467	{	467	{
468	struct iwl_rxq_sync_cmd *cmd;	468	u8 buf[sizeof(struct iwl_rxq_sync_cmd) +
		469	sizeof(struct iwl_mvm_rss_sync_notif)];
		470	struct iwl_rxq_sync_cmd cmd = (void )buf;
469	u32 data_size = sizeof(*cmd) + count;	471	u32 data_size = sizeof(*cmd) + count;
470	int ret;	472	int ret;
471		473
472	/* should be DWORD aligned */	474	/*
473	if (WARN_ON(count & 3 \|\| count > IWL_MULTI_QUEUE_SYNC_MSG_MAX_SIZE))	475	* size must be a multiple of DWORD
		476	* Ensure we don't overflow buf
		477	*/
		478	if (WARN_ON(count & 3 \|\|
		479	count > sizeof(struct iwl_mvm_rss_sync_notif)))
474	return -EINVAL;	480	return -EINVAL;
475		481
476	cmd = kzalloc(data_size, GFP_KERNEL);
477	if (!cmd)
478	return -ENOMEM;
479
480	cmd->rxq_mask = cpu_to_le32(rxq_mask);	482	cmd->rxq_mask = cpu_to_le32(rxq_mask);
481	cmd->count = cpu_to_le32(count);	483	cmd->count = cpu_to_le32(count);
482	cmd->flags = 0;	484	cmd->flags = 0;
@@ -485,9 +487,8 @@ int iwl_mvm_notify_rx_queue(struct iwl_mvm *mvm, u32 rxq_mask, · 2 unmodified lines
485	ret = iwl_mvm_send_cmd_pdu(mvm,	487	ret = iwl_mvm_send_cmd_pdu(mvm,
486	WIDE_ID(DATA_PATH_GROUP,	488	WIDE_ID(DATA_PATH_GROUP,
487	TRIGGER_RX_QUEUES_NOTIF_CMD),	489	TRIGGER_RX_QUEUES_NOTIF_CMD),
488	0, data_size, cmd);	490	async ? CMD_ASYNC : 0, data_size, cmd);
489		491
490	kfree(cmd);
491	return ret;	492	return ret;
492	}	493	}
493		494
@@ -503,14 +504,31 @@ static bool iwl_mvm_is_sn_less(u16 sn1, u16 sn2, u16 buffer_size) · 9 unmodified lines
503	!ieee80211_sn_less(sn1, sn2 - buffer_size);	504	!ieee80211_sn_less(sn1, sn2 - buffer_size);
504	}	505	}
505		506
		507	static void iwl_mvm_sync_nssn(struct iwl_mvm *mvm, u8 baid, u16 nssn)
		508	{
		509	struct iwl_mvm_rss_sync_notif notif = {
		510	.metadata.type = IWL_MVM_RXQ_NSSN_SYNC,
		511	.metadata.sync = 0,
		512	.nssn_sync.baid = baid,
		513	.nssn_sync.nssn = nssn,
		514	};
		515
		516	iwl_mvm_sync_rx_queues_internal(mvm, (void *)&notif, sizeof(notif));
		517	}
		518
506	#define RX_REORDER_BUF_TIMEOUT_MQ (HZ / 10)	519	#define RX_REORDER_BUF_TIMEOUT_MQ (HZ / 10)
507		520
		521	enum iwl_mvm_release_flags {
		522	IWL_MVM_RELEASE_SEND_RSS_SYNC = BIT(0),
		523	IWL_MVM_RELEASE_FROM_RSS_SYNC = BIT(1),
		524	};
		525
508	static void iwl_mvm_release_frames(struct iwl_mvm *mvm,	526	static void iwl_mvm_release_frames(struct iwl_mvm *mvm,
509	struct ieee80211_sta *sta,	527	struct ieee80211_sta *sta,
510	struct napi_struct *napi,	528	struct napi_struct *napi,
511	struct iwl_mvm_baid_data *baid_data,	529	struct iwl_mvm_baid_data *baid_data,
512	struct iwl_mvm_reorder_buffer *reorder_buf,	530	struct iwl_mvm_reorder_buffer *reorder_buf,
513	u16 nssn)	531	u16 nssn, u32 flags)
514	{	532	{
515	struct iwl_mvm_reorder_buf_entry *entries =	533	struct iwl_mvm_reorder_buf_entry *entries =
516	&baid_data->entries[reorder_buf->queue *	534	&baid_data->entries[reorder_buf->queue *
@@ -519,6 +537,18 @@ static void iwl_mvm_release_frames(struct iwl_mvm *mvm, · 2 unmodified lines
519		537
520	lockdep_assert_held(&reorder_buf->lock);	538	lockdep_assert_held(&reorder_buf->lock);
521		539
		540	/*
		541	* We keep the NSSN not too far behind, if we are sync'ing it and it
		542	* is more than 2048 ahead of us, it must be behind us. Discard it.
		543	* This can happen if the queue that hit the 0 / 2048 seqno was lagging
		544	* behind and this queue already processed packets. The next if
		545	* would have caught cases where this queue would have processed less
		546	* than 64 packets, but it may have processed more than 64 packets.
		547	*/
		548	if ((flags & IWL_MVM_RELEASE_FROM_RSS_SYNC) &&
		549	ieee80211_sn_less(nssn, ssn))
		550	goto set_timer;
		551
522	/* ignore nssn smaller than head sn - this can happen due to timeout */	552	/* ignore nssn smaller than head sn - this can happen due to timeout */
523	if (iwl_mvm_is_sn_less(nssn, ssn, reorder_buf->buf_size))	553	if (iwl_mvm_is_sn_less(nssn, ssn, reorder_buf->buf_size))
524	goto set_timer;	554	goto set_timer;
@@ -529,6 +559,9 @@ static void iwl_mvm_release_frames(struct iwl_mvm *mvm, · 4 unmodified lines
529	struct sk_buff *skb;	559	struct sk_buff *skb;
530		560
531	ssn = ieee80211_sn_inc(ssn);	561	ssn = ieee80211_sn_inc(ssn);
		562	if ((flags & IWL_MVM_RELEASE_SEND_RSS_SYNC) &&
		563	(ssn == 2048 \|\| ssn == 0))
		564	iwl_mvm_sync_nssn(mvm, baid_data->baid, ssn);
532		565
533	/*	566	/*
534	* Empty the list. Will have more than one frame for A-MSDU.	567	* Empty the list. Will have more than one frame for A-MSDU.
@@ -615,7 +648,8 @@ void iwl_mvm_reorder_timer_expired(struct timer_list *t) · 80 unmodified lines
615	sta_id, sn);	648	sta_id, sn);
616	iwl_mvm_event_frame_timeout_callback(buf->mvm, mvmsta->vif,	649	iwl_mvm_event_frame_timeout_callback(buf->mvm, mvmsta->vif,
617	sta, baid_data->tid);	650	sta, baid_data->tid);
618	iwl_mvm_release_frames(buf->mvm, sta, NULL, baid_data, buf, sn);	651	iwl_mvm_release_frames(buf->mvm, sta, NULL, baid_data,
		652	buf, sn, IWL_MVM_RELEASE_SEND_RSS_SYNC);
619	rcu_read_unlock();	653	rcu_read_unlock();
620	} else {	654	} else {
621	/*	655	/*
@@ -657,7 +691,8 @@ static void iwl_mvm_del_ba(struct iwl_mvm *mvm, int queue, · 35 unmodified lines
657	spin_lock_bh(&reorder_buf->lock);	691	spin_lock_bh(&reorder_buf->lock);
658	iwl_mvm_release_frames(mvm, sta, NULL, ba_data, reorder_buf,	692	iwl_mvm_release_frames(mvm, sta, NULL, ba_data, reorder_buf,
659	ieee80211_sn_add(reorder_buf->head_sn,	693	ieee80211_sn_add(reorder_buf->head_sn,
660	reorder_buf->buf_size));	694	reorder_buf->buf_size),
		695	0);
661	spin_unlock_bh(&reorder_buf->lock);	696	spin_unlock_bh(&reorder_buf->lock);
662	del_timer_sync(&reorder_buf->reorder_timer);	697	del_timer_sync(&reorder_buf->reorder_timer);
663		698
@@ -665,8 +700,54 @@ out: · 1 unmodified line
665	rcu_read_unlock();	700	rcu_read_unlock();
666	}	701	}
667		702
668	void iwl_mvm_rx_queue_notif(struct iwl_mvm mvm, struct iwl_rx_cmd_buffer rxb,	703	static void iwl_mvm_release_frames_from_notif(struct iwl_mvm *mvm,
669	int queue)	704	struct napi_struct *napi,
		705	u8 baid, u16 nssn, int queue,
		706	u32 flags)
		707	{
		708	struct ieee80211_sta *sta;
		709	struct iwl_mvm_reorder_buffer *reorder_buf;
		710	struct iwl_mvm_baid_data *ba_data;
		711
		712	IWL_DEBUG_HT(mvm, "Frame release notification for BAID %u, NSSN %d\n",
		713	baid, nssn);
		714
		715	if (WARN_ON_ONCE(baid == IWL_RX_REORDER_DATA_INVALID_BAID \|\|
		716	baid >= ARRAY_SIZE(mvm->baid_map)))
		717	return;
		718
		719	rcu_read_lock();
		720
		721	ba_data = rcu_dereference(mvm->baid_map[baid]);
		722	if (WARN_ON_ONCE(!ba_data))
		723	goto out;
		724
		725	sta = rcu_dereference(mvm->fw_id_to_mac_id[ba_data->sta_id]);
		726	if (WARN_ON_ONCE(IS_ERR_OR_NULL(sta)))
		727	goto out;
		728
		729	reorder_buf = &ba_data->reorder_buf[queue];
		730
		731	spin_lock_bh(&reorder_buf->lock);
		732	iwl_mvm_release_frames(mvm, sta, napi, ba_data,
		733	reorder_buf, nssn, flags);
		734	spin_unlock_bh(&reorder_buf->lock);
		735
		736	out:
		737	rcu_read_unlock();
		738	}
		739
		740	static void iwl_mvm_nssn_sync(struct iwl_mvm *mvm,
		741	struct napi_struct *napi, int queue,
		742	const struct iwl_mvm_nssn_sync_data *data)
		743	{
		744	iwl_mvm_release_frames_from_notif(mvm, napi, data->baid,
		745	data->nssn, queue,
		746	IWL_MVM_RELEASE_FROM_RSS_SYNC);
		747	}
		748
		749	void iwl_mvm_rx_queue_notif(struct iwl_mvm mvm, struct napi_struct napi,
		750	struct iwl_rx_cmd_buffer *rxb, int queue)
670	{	751	{
671	struct iwl_rx_packet *pkt = rxb_addr(rxb);	752	struct iwl_rx_packet *pkt = rxb_addr(rxb);
672	struct iwl_rxq_sync_notification *notif;	753	struct iwl_rxq_sync_notification *notif;
@@ -687,6 +768,10 @@ void iwl_mvm_rx_queue_notif(struct iwl_mvm mvm, struct iwl_rx_cmd_buffer rxb, · 14 unmodified lines
687	case IWL_MVM_RXQ_NOTIF_DEL_BA:	768	case IWL_MVM_RXQ_NOTIF_DEL_BA:
688	iwl_mvm_del_ba(mvm, queue, (void *)internal_notif->data);	769	iwl_mvm_del_ba(mvm, queue, (void *)internal_notif->data);
689	break;	770	break;
		771	case IWL_MVM_RXQ_NSSN_SYNC:
		772	iwl_mvm_nssn_sync(mvm, napi, queue,
		773	(void *)internal_notif->data);
		774	break;
690	default:	775	default:
691	WARN_ONCE(1, "Invalid identifier %d", internal_notif->type);	776	WARN_ONCE(1, "Invalid identifier %d", internal_notif->type);
692	}	777	}
@@ -785,7 +870,8 @@ static bool iwl_mvm_reorder(struct iwl_mvm *mvm, · 92 unmodified lines
785	}	870	}
786		871
787	if (ieee80211_is_back_req(hdr->frame_control)) {	872	if (ieee80211_is_back_req(hdr->frame_control)) {
788	iwl_mvm_release_frames(mvm, sta, napi, baid_data, buffer, nssn);	873	iwl_mvm_release_frames(mvm, sta, napi, baid_data,
		874	buffer, nssn, 0);
789	goto drop;	875	goto drop;
790	}	876	}
791		877
@@ -794,7 +880,10 @@ static bool iwl_mvm_reorder(struct iwl_mvm *mvm, · 2 unmodified lines
794	* If the SN is smaller than the NSSN it might need to first go into	880	* If the SN is smaller than the NSSN it might need to first go into
795	* the reorder buffer, in which case we just release up to it and the	881	* the reorder buffer, in which case we just release up to it and the
796	* rest of the function will take care of storing it and releasing up to	882	* rest of the function will take care of storing it and releasing up to
797	* the nssn	883	* the nssn.
		884	* This should not happen. This queue has been lagging and it should
		885	* have been updated by a IWL_MVM_RXQ_NSSN_SYNC notification. Be nice
		886	* and update the other queues.
798	*/	887	*/
799	if (!iwl_mvm_is_sn_less(nssn, buffer->head_sn + buffer->buf_size,	888	if (!iwl_mvm_is_sn_less(nssn, buffer->head_sn + buffer->buf_size,
800	buffer->buf_size) \|\|	889	buffer->buf_size) \|\|
@@ -802,7 +891,7 @@ static bool iwl_mvm_reorder(struct iwl_mvm *mvm, · 1 unmodified line
802	u16 min_sn = ieee80211_sn_less(sn, nssn) ? sn : nssn;	891	u16 min_sn = ieee80211_sn_less(sn, nssn) ? sn : nssn;
803		892
804	iwl_mvm_release_frames(mvm, sta, napi, baid_data, buffer,	893	iwl_mvm_release_frames(mvm, sta, napi, baid_data, buffer,
805	min_sn);	894	min_sn, IWL_MVM_RELEASE_SEND_RSS_SYNC);
806	}	895	}
807		896
808	/* drop any oudated packets */	897	/* drop any oudated packets */
@@ -813,8 +902,23 @@ static bool iwl_mvm_reorder(struct iwl_mvm *mvm, · 4 unmodified lines
813	if (!buffer->num_stored && ieee80211_sn_less(sn, nssn)) {	902	if (!buffer->num_stored && ieee80211_sn_less(sn, nssn)) {
814	if (iwl_mvm_is_sn_less(buffer->head_sn, nssn,	903	if (iwl_mvm_is_sn_less(buffer->head_sn, nssn,
815	buffer->buf_size) &&	904	buffer->buf_size) &&
816	(!amsdu \|\| last_subframe))	905	(!amsdu \|\| last_subframe)) {
		906	/*
		907	* If we crossed the 2048 or 0 SN, notify all the
		908	* queues. This is done in order to avoid having a
		909	* head_sn that lags behind for too long. When that
		910	* happens, we can get to a situation where the head_sn
		911	* is within the interval [nssn - buf_size : nssn]
		912	* which will make us think that the nssn is a packet
		913	* that we already freed because of the reordering
		914	* buffer and we will ignore it. So maintain the
		915	* head_sn somewhat updated across all the queues:
		916	* when it crosses 0 and 2048.
		917	*/
		918	if (sn == 2048 \|\| sn == 0)
		919	iwl_mvm_sync_nssn(mvm, baid, sn);
817	buffer->head_sn = nssn;	920	buffer->head_sn = nssn;
		921	}
818	/* No need to update AMSDU last SN - we are moving the head */	922	/* No need to update AMSDU last SN - we are moving the head */
819	spin_unlock_bh(&buffer->lock);	923	spin_unlock_bh(&buffer->lock);
820	return false;	924	return false;
@@ -829,8 +933,11 @@ static bool iwl_mvm_reorder(struct iwl_mvm *mvm, · 8 unmodified lines
829	* while technically there is no hole and we can move forward.	933	* while technically there is no hole and we can move forward.
830	*/	934	*/
831	if (!buffer->num_stored && sn == buffer->head_sn) {	935	if (!buffer->num_stored && sn == buffer->head_sn) {
832	if (!amsdu \|\| last_subframe)	936	if (!amsdu \|\| last_subframe) {
		937	if (sn == 2048 \|\| sn == 0)
		938	iwl_mvm_sync_nssn(mvm, baid, sn);
833	buffer->head_sn = ieee80211_sn_inc(buffer->head_sn);	939	buffer->head_sn = ieee80211_sn_inc(buffer->head_sn);
		940	}
834	/* No need to update AMSDU last SN - we are moving the head */	941	/* No need to update AMSDU last SN - we are moving the head */
835	spin_unlock_bh(&buffer->lock);	942	spin_unlock_bh(&buffer->lock);
836	return false;	943	return false;
@@ -875,7 +982,9 @@ static bool iwl_mvm_reorder(struct iwl_mvm *mvm, · 38 unmodified lines
875	* release notification with up to date NSSN.	982	* release notification with up to date NSSN.
876	*/	983	*/
877	if (!amsdu \|\| last_subframe)	984	if (!amsdu \|\| last_subframe)
878	iwl_mvm_release_frames(mvm, sta, napi, baid_data, buffer, nssn);	985	iwl_mvm_release_frames(mvm, sta, napi, baid_data,
		986	buffer, nssn,
		987	IWL_MVM_RELEASE_SEND_RSS_SYNC);
879		988
880	spin_unlock_bh(&buffer->lock);	989	spin_unlock_bh(&buffer->lock);
881	return true;	990	return true;
@@ -1840,40 +1949,14 @@ void iwl_mvm_rx_monitor_no_data(struct iwl_mvm mvm, struct napi_struct napi, · 958 unmodified lines
1840	out:	1949	out:
1841	rcu_read_unlock();	1950	rcu_read_unlock();
1842	}	1951	}
		1952
1843	void iwl_mvm_rx_frame_release(struct iwl_mvm mvm, struct napi_struct napi,	1953	void iwl_mvm_rx_frame_release(struct iwl_mvm mvm, struct napi_struct napi,
1844	struct iwl_rx_cmd_buffer *rxb, int queue)	1954	struct iwl_rx_cmd_buffer *rxb, int queue)
1845	{	1955	{
1846	struct iwl_rx_packet *pkt = rxb_addr(rxb);	1956	struct iwl_rx_packet *pkt = rxb_addr(rxb);
1847	struct iwl_frame_release release = (void )pkt->data;	1957	struct iwl_frame_release release = (void )pkt->data;
1848	struct ieee80211_sta *sta;
1849	struct iwl_mvm_reorder_buffer *reorder_buf;
1850	struct iwl_mvm_baid_data *ba_data;
1851
1852	int baid = release->baid;
1853
1854	IWL_DEBUG_HT(mvm, "Frame release notification for BAID %u, NSSN %d\n",
1855	release->baid, le16_to_cpu(release->nssn));
1856		1958
1857	if (WARN_ON_ONCE(baid == IWL_RX_REORDER_DATA_INVALID_BAID))	1959	iwl_mvm_release_frames_from_notif(mvm, napi, release->baid,
1858	return;	1960	le16_to_cpu(release->nssn),
1859		1961	queue, 0);
1860	rcu_read_lock();
1861
1862	ba_data = rcu_dereference(mvm->baid_map[baid]);
1863	if (WARN_ON_ONCE(!ba_data))
1864	goto out;
1865
1866	sta = rcu_dereference(mvm->fw_id_to_mac_id[ba_data->sta_id]);
1867	if (WARN_ON_ONCE(IS_ERR_OR_NULL(sta)))
1868	goto out;
1869
1870	reorder_buf = &ba_data->reorder_buf[queue];
1871
1872	spin_lock_bh(&reorder_buf->lock);
1873	iwl_mvm_release_frames(mvm, sta, napi, ba_data, reorder_buf,
1874	le16_to_cpu(release->nssn));
1875	spin_unlock_bh(&reorder_buf->lock);
1876
1877	out:
1878	rcu_read_unlock();
1879	}	1962	}

drivers/net/wireless/intel/iwlwifi/mvm/sta.c+4−2

 	 */
 	if (iwl_mvm_has_tlc_offload(mvm))
 		iwl_mvm_rs_add_sta(mvm, mvm_sta);
+	else
+		spin_lock_init(&mvm_sta->lq_sta.rs_drv.pers.lock);
 	iwl_mvm_toggle_tx_ant(mvm, &mvm_sta->tx_ant);
 static void iwl_mvm_sync_rxq_del_ba(struct iwl_mvm *mvm, u8 baid)
 {
-	struct iwl_mvm_delba_notif notif = {
+	struct iwl_mvm_rss_sync_notif notif = {
 		.metadata.type = IWL_MVM_RXQ_NOTIF_DEL_BA,
 		.metadata.sync = 1,
 		.delba.baid = baid,
 	IWL_DEBUG_HT(mvm, "Tx aggregation enabled on ra = %pM tid = %d\n",
 		     sta->addr, tid);
-	return iwl_mvm_send_lq_cmd(mvm, &mvmsta->lq_sta.rs_drv.lq, false);
+	return iwl_mvm_send_lq_cmd(mvm, &mvmsta->lq_sta.rs_drv.lq);
 }
 static void iwl_mvm_unreserve_agg_queue(struct iwl_mvm *mvm,

drivers/net/wireless/intel/iwlwifi/mvm/sta.h+10−2

 	u32 baid;
 } __packed;
-struct iwl_mvm_delba_notif {
+struct iwl_mvm_nssn_sync_data {
+	u32 baid;
+	u32 nssn;
+} __packed;
+struct iwl_mvm_rss_sync_notif {
 	struct iwl_mvm_internal_rxq_notif metadata;
-	struct iwl_mvm_delba_data delba;
+	union {
+		struct iwl_mvm_delba_data delba;
+		struct iwl_mvm_nssn_sync_data nssn_sync;
+	};
 } __packed;
 /**

drivers/net/wireless/intel/iwlwifi/mvm/tx.c+2−1

 	unsigned int tcp_payload_len;
 	unsigned int mss = skb_shinfo(skb)->gso_size;
 	bool ipv4 = (skb->protocol == htons(ETH_P_IP));
+	bool qos = ieee80211_is_data_qos(hdr->frame_control);
 	u16 ip_base_id = ipv4 ? ntohs(ip_hdr(skb)->id) : 0;
 	skb_shinfo(skb)->gso_size = num_subframes * mss;
 		if (tcp_payload_len > mss) {
 			skb_shinfo(tmp)->gso_size = mss;
 		} else {
-			if (ieee80211_is_data_qos(hdr->frame_control)) {
+			if (qos) {
 				u8 *qc;
 				if (ipv4)

drivers/net/wireless/intel/iwlwifi/mvm/utils.c+2−2

@@ -653,12 +653,12 @@ int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id, · 652 unmodified lines
653	* this case to clear the state indicating that station creation is in	653	* this case to clear the state indicating that station creation is in
654	* progress.	654	* progress.
655	*/	655	*/
656	int iwl_mvm_send_lq_cmd(struct iwl_mvm mvm, struct iwl_lq_cmd lq, bool sync)	656	int iwl_mvm_send_lq_cmd(struct iwl_mvm mvm, struct iwl_lq_cmd lq)
657	{	657	{
658	struct iwl_host_cmd cmd = {	658	struct iwl_host_cmd cmd = {
659	.id = LQ_CMD,	659	.id = LQ_CMD,
660	.len = { sizeof(struct iwl_lq_cmd), },	660	.len = { sizeof(struct iwl_lq_cmd), },
661	.flags = sync ? 0 : CMD_ASYNC,	661	.flags = CMD_ASYNC,
662	.data = { lq, },	662	.data = { lq, },
663	};	663	};
664		664

drivers/net/wireless/intel/iwlwifi/pcie/drv.c+3−0

 	{IWL_PCI_DEVICE(0x2526, 0x40A4, iwl9460_2ac_cfg)},
 	{IWL_PCI_DEVICE(0x2526, 0x4234, iwl9560_2ac_cfg_soc)},
 	{IWL_PCI_DEVICE(0x2526, 0x42A4, iwl9462_2ac_cfg_soc)},
+	{IWL_PCI_DEVICE(0x2526, 0x6010, iwl9260_2ac_160_cfg)},
 	{IWL_PCI_DEVICE(0x2526, 0x6014, iwl9260_2ac_160_cfg)},
 	{IWL_PCI_DEVICE(0x2526, 0x8014, iwl9260_2ac_160_cfg)},
 	{IWL_PCI_DEVICE(0x2526, 0x8010, iwl9260_2ac_160_cfg)},
 	{IWL_PCI_DEVICE(0x2526, 0xA014, iwl9260_2ac_160_cfg)},
+	{IWL_PCI_DEVICE(0x2526, 0xE010, iwl9260_2ac_160_cfg)},
+	{IWL_PCI_DEVICE(0x2526, 0xE014, iwl9260_2ac_160_cfg)},
 	{IWL_PCI_DEVICE(0x271B, 0x0010, iwl9160_2ac_cfg)},
 	{IWL_PCI_DEVICE(0x271B, 0x0014, iwl9160_2ac_cfg)},
 	{IWL_PCI_DEVICE(0x271B, 0x0210, iwl9160_2ac_cfg)},

drivers/net/wireless/intel/iwlwifi/pcie/tx.c+2−0

@@ -435,6 +435,8 @@ static void iwl_pcie_tfd_unmap(struct iwl_trans *trans, · 434 unmodified lines
435	DMA_TO_DEVICE);	435	DMA_TO_DEVICE);
436	}	436	}
437		437
		438	meta->tbs = 0;
		439
438	if (trans->cfg->use_tfh) {	440	if (trans->cfg->use_tfh) {
439	struct iwl_tfh_tfd tfd_fh = (void )tfd;	441	struct iwl_tfh_tfd tfd_fh = (void )tfd;
440		442

drivers/net/wireless/mac80211_hwsim.c+5−3

 		hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid,
 				  cb->nlh->nlmsg_seq, &hwsim_genl_family,
 				  NLM_F_MULTI, HWSIM_CMD_GET_RADIO);
-		if (!hdr)
+		if (hdr) {
+			genl_dump_check_consistent(cb, hdr);
+			genlmsg_end(skb, hdr);
+		} else {
 			res = -EMSGSIZE;
-		genl_dump_check_consistent(cb, hdr);
+		}
-		genlmsg_end(skb, hdr);
 	}
 done:

drivers/net/wireless/marvell/mwifiex/main.h+1−0

@@ -124,6 +124,7 @@ enum { · 123 unmodified lines
124		124
125	#define MWIFIEX_MAX_TOTAL_SCAN_TIME (MWIFIEX_TIMER_10S - MWIFIEX_TIMER_1S)	125	#define MWIFIEX_MAX_TOTAL_SCAN_TIME (MWIFIEX_TIMER_10S - MWIFIEX_TIMER_1S)
126		126
		127	#define WPA_GTK_OUI_OFFSET 2
127	#define RSN_GTK_OUI_OFFSET 2	128	#define RSN_GTK_OUI_OFFSET 2
128		129
129	#define MWIFIEX_OUI_NOT_PRESENT 0	130	#define MWIFIEX_OUI_NOT_PRESENT 0

drivers/net/wireless/marvell/mwifiex/scan.c+2−1

@@ -181,7 +181,8 @@ mwifiex_is_wpa_oui_present(struct mwifiex_bssdescriptor *bss_desc, u32 cipher) · 180 unmodified lines
181	u8 ret = MWIFIEX_OUI_NOT_PRESENT;	181	u8 ret = MWIFIEX_OUI_NOT_PRESENT;
182		182
183	if (has_vendor_hdr(bss_desc->bcn_wpa_ie, WLAN_EID_VENDOR_SPECIFIC)) {	183	if (has_vendor_hdr(bss_desc->bcn_wpa_ie, WLAN_EID_VENDOR_SPECIFIC)) {
184	iebody = (struct ie_body *) bss_desc->bcn_wpa_ie->data;	184	iebody = (struct ie_body )((u8 )bss_desc->bcn_wpa_ie->data +
		185	WPA_GTK_OUI_OFFSET);
185	oui = &mwifiex_wpa_oui[cipher][0];	186	oui = &mwifiex_wpa_oui[cipher][0];
186	ret = mwifiex_search_oui_in_ie(iebody, oui);	187	ret = mwifiex_search_oui_in_ie(iebody, oui);
187	if (ret)	188	if (ret)

drivers/nfc/nfcmrvl/main.c+2−2

@@ -244,7 +244,7 @@ void nfcmrvl_chip_reset(struct nfcmrvl_private *priv) · 243 unmodified lines
244	/* Reset possible fault of previous session */	244	/* Reset possible fault of previous session */
245	clear_bit(NFCMRVL_PHY_ERROR, &priv->flags);	245	clear_bit(NFCMRVL_PHY_ERROR, &priv->flags);
246		246
247	if (priv->config.reset_n_io) {	247	if (gpio_is_valid(priv->config.reset_n_io)) {
248	nfc_info(priv->dev, "reset the chip\n");	248	nfc_info(priv->dev, "reset the chip\n");
249	gpio_set_value(priv->config.reset_n_io, 0);	249	gpio_set_value(priv->config.reset_n_io, 0);
250	usleep_range(5000, 10000);	250	usleep_range(5000, 10000);
@@ -255,7 +255,7 @@ void nfcmrvl_chip_reset(struct nfcmrvl_private *priv) · 4 unmodified lines
255		255
256	void nfcmrvl_chip_halt(struct nfcmrvl_private *priv)	256	void nfcmrvl_chip_halt(struct nfcmrvl_private *priv)
257	{	257	{
258	if (priv->config.reset_n_io)	258	if (gpio_is_valid(priv->config.reset_n_io))
259	gpio_set_value(priv->config.reset_n_io, 0);	259	gpio_set_value(priv->config.reset_n_io, 0);
260	}	260	}
261		261

drivers/nfc/nfcmrvl/uart.c+2−2

@@ -26,7 +26,7 @@ · 25 unmodified lines
26	static unsigned int hci_muxed;	26	static unsigned int hci_muxed;
27	static unsigned int flow_control;	27	static unsigned int flow_control;
28	static unsigned int break_control;	28	static unsigned int break_control;
29	static unsigned int reset_n_io;	29	static int reset_n_io = -EINVAL;
30		30
31	/*	31	/*
32	** NFCMRVL NCI OPS	32	** NFCMRVL NCI OPS
@@ -231,5 +231,5 @@ MODULE_PARM_DESC(break_control, "Tell if UART driver must drive break signal."); · 198 unmodified lines
231	module_param(hci_muxed, uint, 0);	231	module_param(hci_muxed, uint, 0);
232	MODULE_PARM_DESC(hci_muxed, "Tell if transport is muxed in HCI one.");	232	MODULE_PARM_DESC(hci_muxed, "Tell if transport is muxed in HCI one.");
233		233
234	module_param(reset_n_io, uint, 0);	234	module_param(reset_n_io, int, 0);
235	MODULE_PARM_DESC(reset_n_io, "GPIO that is wired to RESET_N signal.");	235	MODULE_PARM_DESC(reset_n_io, "GPIO that is wired to RESET_N signal.");

drivers/nfc/nfcmrvl/usb.c+1−0

@@ -305,6 +305,7 @@ static int nfcmrvl_probe(struct usb_interface *intf, · 304 unmodified lines
305		305
306	/* No configuration for USB */	306	/* No configuration for USB */
307	memset(&config, 0, sizeof(config));	307	memset(&config, 0, sizeof(config));
		308	config.reset_n_io = -EINVAL;
308		309
309	nfc_info(&udev->dev, "intf %p id %p\n", intf, id);	310	nfc_info(&udev->dev, "intf %p id %p\n", intf, id);
310		311

drivers/nfc/st-nci/se.c+2−0

@@ -333,6 +333,8 @@ static int st_nci_hci_connectivity_event_received(struct nci_dev *ndev, · 332 unmodified lines
333		333
334	transaction = (struct nfc_evt_transaction *)devm_kzalloc(dev,	334	transaction = (struct nfc_evt_transaction *)devm_kzalloc(dev,
335	skb->len - 2, GFP_KERNEL);	335	skb->len - 2, GFP_KERNEL);
		336	if (!transaction)
		337	return -ENOMEM;
336		338
337	transaction->aid_len = skb->data[1];	339	transaction->aid_len = skb->data[1];
338	memcpy(transaction->aid, &skb->data[2], transaction->aid_len);	340	memcpy(transaction->aid, &skb->data[2], transaction->aid_len);

drivers/nfc/st21nfca/se.c+2−0

@@ -317,6 +317,8 @@ int st21nfca_connectivity_event_received(struct nfc_hci_dev *hdev, u8 host, · 316 unmodified lines
317		317
318	transaction = (struct nfc_evt_transaction *)devm_kzalloc(dev,	318	transaction = (struct nfc_evt_transaction *)devm_kzalloc(dev,
319	skb->len - 2, GFP_KERNEL);	319	skb->len - 2, GFP_KERNEL);
		320	if (!transaction)
		321	return -ENOMEM;
320		322
321	transaction->aid_len = skb->data[1];	323	transaction->aid_len = skb->data[1];
322	memcpy(transaction->aid, &skb->data[2],	324	memcpy(transaction->aid, &skb->data[2],

drivers/ntb/msi.c+0−5

 #include <linux/msi.h>
 #include <linux/pci.h>
-MODULE_LICENSE("Dual BSD/GPL");
-MODULE_VERSION("0.1");
-MODULE_AUTHOR("Logan Gunthorpe <logang@deltatee.com>");
-MODULE_DESCRIPTION("NTB MSI Interrupt Library");
 struct ntb_msi {
 	u64 base_addr;
 	u64 end_addr;

drivers/nvmem/nvmem-sysfs.c+11−4

 	if (!config->base_dev)
 		return -EINVAL;
-	if (nvmem->read_only)
+	if (nvmem->read_only) {
-		nvmem->eeprom = bin_attr_ro_root_nvmem;
+		if (config->root_only)
-	else
+			nvmem->eeprom = bin_attr_ro_root_nvmem;
-		nvmem->eeprom = bin_attr_rw_root_nvmem;
+		else
+			nvmem->eeprom = bin_attr_ro_nvmem;
+	} else {
+		if (config->root_only)
+			nvmem->eeprom = bin_attr_rw_root_nvmem;
+		else
+			nvmem->eeprom = bin_attr_rw_nvmem;
+	}
 	nvmem->eeprom.attr.name = "eeprom";
 	nvmem->eeprom.size = nvmem->size;
 #ifdef CONFIG_DEBUG_LOCK_ALLOC

drivers/pci/pci.c+10−19

 	if (state == PCI_D0) {
 		pci_platform_power_transition(dev, PCI_D0);
 		/*
-		 * Mandatory power management transition delays are
+		 * Mandatory power management transition delays, see
-		 * handled in the PCIe portdrv resume hooks.
+		 * PCI Express Base Specification Revision 2.0 Section
+		 * 6.6.1: Conventional Reset.  Do not delay for
+		 * devices powered on/off by corresponding bridge,
+		 * because have already delayed for the bridge.
 		 */
 		if (dev->runtime_d3cold) {
+			if (dev->d3cold_delay && !dev->imm_ready)
+				msleep(dev->d3cold_delay);
 			/*
 			 * When powering on a bridge from D3cold, the
 			 * whole hierarchy may be powered on into
 	return pci_dev_wait(dev, "PM D3->D0", PCIE_RESET_READY_POLL_MS);
 }
 /**
- * pcie_wait_for_link_delay - Wait until link is active or inactive
+ * pcie_wait_for_link - Wait until link is active or inactive
  * @pdev: Bridge device
  * @active: waiting for active or inactive?
- * @delay: Delay to wait after link has become active (in ms)
  *
  * Use this to wait till link becomes active or inactive.
  */
-bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active, int delay)
+bool pcie_wait_for_link(struct pci_dev *pdev, bool active)
 {
 	int timeout = 1000;
 	bool ret;
 		timeout -= 10;
 	}
 	if (active && ret)
-		msleep(delay);
+		msleep(100);
 	else if (ret != active)
 		pci_info(pdev, "Data Link Layer Link Active not %s in 1000 msec\n",
 			active ? "set" : "cleared");
 	return ret == active;
 }
-/**
- * pcie_wait_for_link - Wait until link is active or inactive
- * @pdev: Bridge device
- * @active: waiting for active or inactive?
- *
- * Use this to wait till link becomes active or inactive.
- */
-bool pcie_wait_for_link(struct pci_dev *pdev, bool active)
-{
-	return pcie_wait_for_link_delay(pdev, active, 100);
-}
 void pci_reset_secondary_bus(struct pci_dev *dev)
 {
 	u16 ctrl;

drivers/pci/pci.h+0−1

@@ -497,7 +497,6 @@ static inline int pci_dev_specific_disable_acs_redir(struct pci_dev *dev) · 496 unmodified lines
497	void pcie_do_recovery(struct pci_dev *dev, enum pci_channel_state state,	497	void pcie_do_recovery(struct pci_dev *dev, enum pci_channel_state state,
498	u32 service);	498	u32 service);
499		499
500	bool pcie_wait_for_link_delay(struct pci_dev *pdev, bool active, int delay);
501	bool pcie_wait_for_link(struct pci_dev *pdev, bool active);	500	bool pcie_wait_for_link(struct pci_dev *pdev, bool active);
502	#ifdef CONFIG_PCIEASPM	501	#ifdef CONFIG_PCIEASPM
503	void pcie_aspm_init_link_state(struct pci_dev *pdev);	502	void pcie_aspm_init_link_state(struct pci_dev *pdev);

drivers/pci/pcie/portdrv_core.c+0−66

@@ -9,7 +9,6 @@ · 8 unmodified lines
9	#include <linux/module.h>	9	#include <linux/module.h>
10	#include <linux/pci.h>	10	#include <linux/pci.h>
11	#include <linux/kernel.h>	11	#include <linux/kernel.h>
12	#include <linux/delay.h>
13	#include <linux/errno.h>	12	#include <linux/errno.h>
14	#include <linux/pm.h>	13	#include <linux/pm.h>
15	#include <linux/pm_runtime.h>	14	#include <linux/pm_runtime.h>
@@ -379,67 +378,6 @@ static int pm_iter(struct device dev, void data) · 363 unmodified lines
379	return 0;	378	return 0;
380	}	379	}
381		380
382	static int get_downstream_delay(struct pci_bus *bus)
383	{
384	struct pci_dev *pdev;
385	int min_delay = 100;
386	int max_delay = 0;
387
388	list_for_each_entry(pdev, &bus->devices, bus_list) {
389	if (!pdev->imm_ready)
390	min_delay = 0;
391	else if (pdev->d3cold_delay < min_delay)
392	min_delay = pdev->d3cold_delay;
393	if (pdev->d3cold_delay > max_delay)
394	max_delay = pdev->d3cold_delay;
395	}
396
397	return max(min_delay, max_delay);
398	}
399
400	/*
401	* wait_for_downstream_link - Wait for downstream link to establish
402	* @pdev: PCIe port whose downstream link is waited
403	*
404	* Handle delays according to PCIe 4.0 section 6.6.1 before configuration
405	* access to the downstream component is permitted.
406	*
407	* This blocks PCI core resume of the hierarchy below this port until the
408	* link is trained. Should be called before resuming port services to
409	* prevent pciehp from starting to tear-down the hierarchy too soon.
410	*/
411	static void wait_for_downstream_link(struct pci_dev *pdev)
412	{
413	int delay;
414
415	if (pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
416	pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM)
417	return;
418
419	if (pci_dev_is_disconnected(pdev))
420	return;
421
422	if (!pdev->subordinate \|\| list_empty(&pdev->subordinate->devices) \|\|
423	!pdev->bridge_d3)
424	return;
425
426	delay = get_downstream_delay(pdev->subordinate);
427	if (!delay)
428	return;
429
430	dev_dbg(&pdev->dev, "waiting downstream link for %d ms\n", delay);
431
432	/*
433	* If downstream port does not support speeds greater than 5 GT/s
434	* need to wait 100ms. For higher speeds (gen3) we need to wait
435	* first for the data link layer to become active.
436	*/
437	if (pcie_get_speed_cap(pdev) <= PCIE_SPEED_5_0GT)
438	msleep(delay);
439	else
440	pcie_wait_for_link_delay(pdev, true, delay);
441	}
442
443	/**	381	/**
444	* pcie_port_device_suspend - suspend port services associated with a PCIe port	382	* pcie_port_device_suspend - suspend port services associated with a PCIe port
445	* @dev: PCI Express port to handle	383	* @dev: PCI Express port to handle
@@ -453,8 +391,6 @@ int pcie_port_device_suspend(struct device *dev) · 7 unmodified lines
453	int pcie_port_device_resume_noirq(struct device *dev)	391	int pcie_port_device_resume_noirq(struct device *dev)
454	{	392	{
455	size_t off = offsetof(struct pcie_port_service_driver, resume_noirq);	393	size_t off = offsetof(struct pcie_port_service_driver, resume_noirq);
456
457	wait_for_downstream_link(to_pci_dev(dev));
458	return device_for_each_child(dev, &off, pm_iter);	394	return device_for_each_child(dev, &off, pm_iter);
459	}	395	}
460		396
@@ -485,8 +421,6 @@ int pcie_port_device_runtime_suspend(struct device *dev) · 24 unmodified lines
485	int pcie_port_device_runtime_resume(struct device *dev)	421	int pcie_port_device_runtime_resume(struct device *dev)
486	{	422	{
487	size_t off = offsetof(struct pcie_port_service_driver, runtime_resume);	423	size_t off = offsetof(struct pcie_port_service_driver, runtime_resume);
488
489	wait_for_downstream_link(to_pci_dev(dev));
490	return device_for_each_child(dev, &off, pm_iter);	424	return device_for_each_child(dev, &off, pm_iter);
491	}	425	}
492	#endif /* PM */	426	#endif /* PM */

drivers/pcmcia/db1xxx_ss.c+4−0

 	switch (state->Vcc) {
 	case 50:
 		++v;
+		/* fall through */
 	case 33:
 		++v;
+		/* fall through */
 	case 0:
 		break;
 	default:
 	switch (state->Vpp) {
 	case 12:
 		++p;
+		/* fall through */
 	case 33:
 	case 50:
 		++p;
+		/* fall through */
 	case 0:
 		break;
 	default:

drivers/perf/arm_pmu.c+1−1

 		cpu_pm_pmu_setup(armpmu, cmd);
 		break;
 	case CPU_PM_EXIT:
-		cpu_pm_pmu_setup(armpmu, cmd);
 	case CPU_PM_ENTER_FAILED:
+		cpu_pm_pmu_setup(armpmu, cmd);
 		armpmu->start(armpmu);
 		break;
 	default:

drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c+1−1

@@ -2412,7 +2412,7 @@ static const struct aspeed_pin_config aspeed_g4_configs[] = { · 2411 unmodified lines
2412	{ PIN_CONFIG_INPUT_DEBOUNCE, { C14, B14 }, SCUA8, 27 },	2412	{ PIN_CONFIG_INPUT_DEBOUNCE, { C14, B14 }, SCUA8, 27 },
2413	};	2413	};
2414		2414
2415	static int aspeed_g4_sig_expr_set(const struct aspeed_pinmux_data *ctx,	2415	static int aspeed_g4_sig_expr_set(struct aspeed_pinmux_data *ctx,
2416	const struct aspeed_sig_expr *expr,	2416	const struct aspeed_sig_expr *expr,
2417	bool enable)	2417	bool enable)
2418	{	2418	{

drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c+65−27

@@ -2507,6 +2507,61 @@ static struct aspeed_pin_config aspeed_g5_configs[] = { · 2506 unmodified lines
2507	{ PIN_CONFIG_INPUT_DEBOUNCE, { A20, B19 }, SCUA8, 27 },	2507	{ PIN_CONFIG_INPUT_DEBOUNCE, { A20, B19 }, SCUA8, 27 },
2508	};	2508	};
2509		2509
		2510	static struct regmap aspeed_g5_acquire_regmap(struct aspeed_pinmux_data ctx,
		2511	int ip)
		2512	{
		2513	if (ip == ASPEED_IP_SCU) {
		2514	WARN(!ctx->maps[ip], "Missing SCU syscon!");
		2515	return ctx->maps[ip];
		2516	}
		2517
		2518	if (ip >= ASPEED_NR_PINMUX_IPS)
		2519	return ERR_PTR(-EINVAL);
		2520
		2521	if (likely(ctx->maps[ip]))
		2522	return ctx->maps[ip];
		2523
		2524	if (ip == ASPEED_IP_GFX) {
		2525	struct device_node *node;
		2526	struct regmap *map;
		2527
		2528	node = of_parse_phandle(ctx->dev->of_node,
		2529	"aspeed,external-nodes", 0);
		2530	if (node) {
		2531	map = syscon_node_to_regmap(node);
		2532	of_node_put(node);
		2533	if (IS_ERR(map))
		2534	return map;
		2535	} else
		2536	return ERR_PTR(-ENODEV);
		2537
		2538	ctx->maps[ASPEED_IP_GFX] = map;
		2539	dev_dbg(ctx->dev, "Acquired GFX regmap");
		2540	return map;
		2541	}
		2542
		2543	if (ip == ASPEED_IP_LPC) {
		2544	struct device_node *node;
		2545	struct regmap *map;
		2546
		2547	node = of_parse_phandle(ctx->dev->of_node,
		2548	"aspeed,external-nodes", 1);
		2549	if (node) {
		2550	map = syscon_node_to_regmap(node->parent);
		2551	of_node_put(node);
		2552	if (IS_ERR(map))
		2553	return map;
		2554	} else
		2555	map = ERR_PTR(-ENODEV);
		2556
		2557	ctx->maps[ASPEED_IP_LPC] = map;
		2558	dev_dbg(ctx->dev, "Acquired LPC regmap");
		2559	return map;
		2560	}
		2561
		2562	return ERR_PTR(-EINVAL);
		2563	}
		2564
2510	/**	2565	/**
2511	* Configure a pin's signal by applying an expression's descriptor state for	2566	* Configure a pin's signal by applying an expression's descriptor state for
2512	* all descriptors in the expression.	2567	* all descriptors in the expression.
@@ -2520,7 +2575,7 @@ static struct aspeed_pin_config aspeed_g5_configs[] = { · 7 unmodified lines
2520	* Return: 0 if the expression is configured as requested and a negative error	2575	* Return: 0 if the expression is configured as requested and a negative error
2521	* code otherwise	2576	* code otherwise
2522	*/	2577	*/
2523	static int aspeed_g5_sig_expr_set(const struct aspeed_pinmux_data *ctx,	2578	static int aspeed_g5_sig_expr_set(struct aspeed_pinmux_data *ctx,
2524	const struct aspeed_sig_expr *expr,	2579	const struct aspeed_sig_expr *expr,
2525	bool enable)	2580	bool enable)
2526	{	2581	{
@@ -2531,9 +2586,15 @@ static int aspeed_g5_sig_expr_set(const struct aspeed_pinmux_data *ctx, · 4 unmodified lines
2531	const struct aspeed_sig_desc *desc = &expr->descs[i];	2586	const struct aspeed_sig_desc *desc = &expr->descs[i];
2532	u32 pattern = enable ? desc->enable : desc->disable;	2587	u32 pattern = enable ? desc->enable : desc->disable;
2533	u32 val = (pattern << __ffs(desc->mask));	2588	u32 val = (pattern << __ffs(desc->mask));
		2589	struct regmap *map;
2534		2590
2535	if (!ctx->maps[desc->ip])	2591	map = aspeed_g5_acquire_regmap(ctx, desc->ip);
2536	return -ENODEV;	2592	if (IS_ERR(map)) {
		2593	dev_err(ctx->dev,
		2594	"Failed to acquire regmap for IP block %d\n",
		2595	desc->ip);
		2596	return PTR_ERR(map);
		2597	}
2537		2598
2538	/*	2599	/*
2539	* Strap registers are configured in hardware or by early-boot	2600	* Strap registers are configured in hardware or by early-boot
@@ -2641,34 +2702,11 @@ static struct pinctrl_desc aspeed_g5_pinctrl_desc = { · 101 unmodified lines
2641	static int aspeed_g5_pinctrl_probe(struct platform_device *pdev)	2702	static int aspeed_g5_pinctrl_probe(struct platform_device *pdev)
2642	{	2703	{
2643	int i;	2704	int i;
2644	struct regmap *map;
2645	struct device_node *node;
2646		2705
2647	for (i = 0; i < ARRAY_SIZE(aspeed_g5_pins); i++)	2706	for (i = 0; i < ARRAY_SIZE(aspeed_g5_pins); i++)
2648	aspeed_g5_pins[i].number = i;	2707	aspeed_g5_pins[i].number = i;
2649		2708
2650	node = of_parse_phandle(pdev->dev.of_node, "aspeed,external-nodes", 0);	2709	aspeed_g5_pinctrl_data.pinmux.dev = &pdev->dev;
2651	map = syscon_node_to_regmap(node);
2652	of_node_put(node);
2653	if (IS_ERR(map)) {
2654	dev_warn(&pdev->dev, "No GFX phandle found, some mux configurations may fail\n");
2655	map = NULL;
2656	}
2657	aspeed_g5_pinctrl_data.pinmux.maps[ASPEED_IP_GFX] = map;
2658
2659	node = of_parse_phandle(pdev->dev.of_node, "aspeed,external-nodes", 1);
2660	if (node) {
2661	map = syscon_node_to_regmap(node->parent);
2662	if (IS_ERR(map)) {
2663	dev_warn(&pdev->dev, "LHC parent is not a syscon, some mux configurations may fail\n");
2664	map = NULL;
2665	}
2666	} else {
2667	dev_warn(&pdev->dev, "No LHC phandle found, some mux configurations may fail\n");
2668	map = NULL;
2669	}
2670	of_node_put(node);
2671	aspeed_g5_pinctrl_data.pinmux.maps[ASPEED_IP_LPC] = map;
2672		2710
2673	return aspeed_pinctrl_probe(pdev, &aspeed_g5_pinctrl_desc,	2711	return aspeed_pinctrl_probe(pdev, &aspeed_g5_pinctrl_desc,
2674	&aspeed_g5_pinctrl_data);	2712	&aspeed_g5_pinctrl_data);

drivers/pinctrl/aspeed/pinctrl-aspeed.c+5−7

 	return 0;
 }
-static int aspeed_sig_expr_enable(const struct aspeed_pinmux_data *ctx,
+static int aspeed_sig_expr_enable(struct aspeed_pinmux_data *ctx,
 				  const struct aspeed_sig_expr *expr)
 {
 	int ret;
 	return 0;
 }
-static int aspeed_sig_expr_disable(const struct aspeed_pinmux_data *ctx,
+static int aspeed_sig_expr_disable(struct aspeed_pinmux_data *ctx,
 				   const struct aspeed_sig_expr *expr)
 {
 	int ret;
  *
  * Return: 0 if all expressions are disabled, otherwise a negative error code
  */
-static int aspeed_disable_sig(const struct aspeed_pinmux_data *ctx,
+static int aspeed_disable_sig(struct aspeed_pinmux_data *ctx,
 			      const struct aspeed_sig_expr **exprs)
 {
 	int ret = 0;
 {
 	int i;
 	int ret;
-	const struct aspeed_pinctrl_data *pdata =
+	struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-		pinctrl_dev_get_drvdata(pctldev);
 	const struct aspeed_pin_group *pgroup = &pdata->pinmux.groups[group];
 	const struct aspeed_pin_function *pfunc =
 		&pdata->pinmux.functions[function];
 			       unsigned int offset)
 {
 	int ret;
-	const struct aspeed_pinctrl_data *pdata =
+	struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
-		pinctrl_dev_get_drvdata(pctldev);
 	const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data;
 	const struct aspeed_sig_expr ***prios, **funcs, *expr;

drivers/pinctrl/aspeed/pinmux-aspeed.c+1−1

@@ -5,7 +5,7 @@ · 4 unmodified lines
5		5
6	#include "pinmux-aspeed.h"	6	#include "pinmux-aspeed.h"
7		7
8	const char *const aspeed_pinmux_ips[] = {	8	static const char *const aspeed_pinmux_ips[] = {
9	[ASPEED_IP_SCU] = "SCU",	9	[ASPEED_IP_SCU] = "SCU",
10	[ASPEED_IP_GFX] = "GFX",	10	[ASPEED_IP_GFX] = "GFX",
11	[ASPEED_IP_LPC] = "LPC",	11	[ASPEED_IP_LPC] = "LPC",

drivers/pinctrl/aspeed/pinmux-aspeed.h+3−2

 struct aspeed_pinmux_data;
 struct aspeed_pinmux_ops {
-	int (*set)(const struct aspeed_pinmux_data *ctx,
+	int (*set)(struct aspeed_pinmux_data *ctx,
 		   const struct aspeed_sig_expr *expr, bool enabled);
 };
 struct aspeed_pinmux_data {
+	struct device *dev;
 	struct regmap *maps[ASPEED_NR_PINMUX_IPS];
 	const struct aspeed_pinmux_ops *ops;
 			 const struct aspeed_sig_expr *expr,
 			 bool enabled);
-static inline int aspeed_sig_expr_set(const struct aspeed_pinmux_data *ctx,
+static inline int aspeed_sig_expr_set(struct aspeed_pinmux_data *ctx,
 				      const struct aspeed_sig_expr *expr,
 				      bool enabled)
 {

drivers/platform/olpc/olpc-xo175-ec.c+6−0

 };
 MODULE_DEVICE_TABLE(of, olpc_xo175_ec_of_match);
+static const struct spi_device_id olpc_xo175_ec_id_table[] = {
+	{ "xo1.75-ec", 0 },
+	{}
+};
+MODULE_DEVICE_TABLE(spi, olpc_xo175_ec_id_table);
 static struct spi_driver olpc_xo175_ec_spi_driver = {
 	.driver = {
 		.name	= "olpc-xo175-ec",

drivers/platform/x86/intel_pmc_core.c+1−0

@@ -812,6 +812,7 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = { · 811 unmodified lines
812	INTEL_CPU_FAM6(KABYLAKE_DESKTOP, spt_reg_map),	812	INTEL_CPU_FAM6(KABYLAKE_DESKTOP, spt_reg_map),
813	INTEL_CPU_FAM6(CANNONLAKE_MOBILE, cnp_reg_map),	813	INTEL_CPU_FAM6(CANNONLAKE_MOBILE, cnp_reg_map),
814	INTEL_CPU_FAM6(ICELAKE_MOBILE, icl_reg_map),	814	INTEL_CPU_FAM6(ICELAKE_MOBILE, icl_reg_map),
		815	INTEL_CPU_FAM6(ICELAKE_NNPI, icl_reg_map),
815	{}	816	{}
816	};	817	};
817		818

drivers/platform/x86/pcengines-apuv2.c+2−4

 static struct gpio_keys_button apu2_keys_buttons[] = {
 	{
-		.code			= KEY_SETUP,
+		.code			= KEY_RESTART,
 		.active_low		= 1,
 		.desc			= "front button",
 		.type			= EV_KEY,
 MODULE_LICENSE("GPL");
 MODULE_DEVICE_TABLE(dmi, apu_gpio_dmi_table);
 MODULE_ALIAS("platform:pcengines-apuv2");
-MODULE_SOFTDEP("pre: platform:" AMD_FCH_GPIO_DRIVER_NAME);
+MODULE_SOFTDEP("pre: platform:" AMD_FCH_GPIO_DRIVER_NAME " platform:leds-gpio platform:gpio_keys_polled");
-MODULE_SOFTDEP("pre: platform:leds-gpio");
-MODULE_SOFTDEP("pre: platform:gpio_keys_polled");

drivers/pwm/core.c+5−2

 		return of_pwm_get(dev, dev->of_node, con_id);
 	/* then lookup via ACPI */
-	if (dev && is_acpi_node(dev->fwnode))
+	if (dev && is_acpi_node(dev->fwnode)) {
-		return acpi_pwm_get(dev->fwnode);
+		pwm = acpi_pwm_get(dev->fwnode);
+		if (!IS_ERR(pwm) || PTR_ERR(pwm) != -ENOENT)
+			return pwm;
+	}
 	/*
 	 * We look up the provider in the static table typically provided by

drivers/regulator/axp20x-regulator.c+5−5

drivers/regulator/lp87565-regulator.c+4−4

@@ -163,7 +163,7 @@ static int lp87565_regulator_probe(struct platform_device *pdev) · 162 unmodified lines
163	struct lp87565 *lp87565 = dev_get_drvdata(pdev->dev.parent);	163	struct lp87565 *lp87565 = dev_get_drvdata(pdev->dev.parent);
164	struct regulator_config config = { };	164	struct regulator_config config = { };
165	struct regulator_dev *rdev;	165	struct regulator_dev *rdev;
166	int i, min_idx = LP87565_BUCK_0, max_idx = LP87565_BUCK_3;	166	int i, min_idx, max_idx;
167		167
168	platform_set_drvdata(pdev, lp87565);	168	platform_set_drvdata(pdev, lp87565);
169		169
@@ -182,9 +182,9 @@ static int lp87565_regulator_probe(struct platform_device *pdev) · 12 unmodified lines
182	max_idx = LP87565_BUCK_3210;	182	max_idx = LP87565_BUCK_3210;
183	break;	183	break;
184	default:	184	default:
185	dev_err(lp87565->dev, "Invalid lp config %d\n",	185	min_idx = LP87565_BUCK_0;
186	lp87565->dev_type);	186	max_idx = LP87565_BUCK_3;
187	return -EINVAL;	187	break;
188	}	188	}
189		189
190	for (i = min_idx; i <= max_idx; i++) {	190	for (i = min_idx; i <= max_idx; i++) {

drivers/regulator/of_regulator.c+3−1

 		if (!name)
 			name = child->name;
-		if (!strcmp(desc->of_match, name))
+		if (!strcmp(desc->of_match, name)) {
+			of_node_put(search);
 			return of_node_get(child);
+		}
 	}
 	of_node_put(search);

drivers/s390/block/dasd_alias.c+16−6

 	char msg_format;
 	char msg_no;
+	/*
+	 * intrc values ENODEV, ENOLINK and EPERM
+	 * will be optained from sleep_on to indicate that no
+	 * IO operation can be started
+	 */
+	if (cqr->intrc == -ENODEV)
+		return 1;
+	if (cqr->intrc == -ENOLINK)
+		return 1;
+	if (cqr->intrc == -EPERM)
+		return 1;
 	sense = dasd_get_sense(&cqr->irb);
 	if (!sense)
 		return 0;
 	lcu->flags &= ~NEED_UAC_UPDATE;
 	spin_unlock_irqrestore(&lcu->lock, flags);
-	do {
+	rc = dasd_sleep_on(cqr);
-		rc = dasd_sleep_on(cqr);
+	if (rc && !suborder_not_supported(cqr)) {
-		if (rc && suborder_not_supported(cqr))
-			return -EOPNOTSUPP;
-	} while (rc && (cqr->retries > 0));
-	if (rc) {
 		spin_lock_irqsave(&lcu->lock, flags);
 		lcu->flags |= NEED_UAC_UPDATE;
 		spin_unlock_irqrestore(&lcu->lock, flags);

drivers/s390/char/con3215.c+1−0

@@ -398,6 +398,7 @@ static void raw3215_irq(struct ccw_device *cdev, unsigned long intparm, · 397 unmodified lines
398	}	398	}
399	if (dstat == 0x08)	399	if (dstat == 0x08)
400	break;	400	break;
		401	/* else, fall through */
401	case 0x04:	402	case 0x04:
402	/* Device end interrupt. */	403	/* Device end interrupt. */
403	if ((raw = req->info) == NULL)	404	if ((raw = req->info) == NULL)

drivers/s390/char/tape_core.c+3−0

 	switch (device->tape_state) {
 		case TS_INIT:
 			tape_state_set(device, TS_NOT_OPER);
+			/* fallthrough */
 		case TS_NOT_OPER:
 			/*
 			 * Nothing to do.
 				break;
 			if (device->tape_state == TS_UNUSED)
 				break;
+			/* fallthrough */
 		default:
 			if (device->tape_state == TS_BLKUSE)
 				break;
 			case -ETIMEDOUT:
 				DBF_LH(1, "(%08x): Request timed out\n",
 				       device->cdev_id);
+				/* fallthrough */
 			case -EIO:
 				__tape_end_request(device, request, -EIO);
 				break;

drivers/s390/cio/vfio_ccw_async.c+1−1

@@ -70,7 +70,7 @@ static void vfio_ccw_async_region_release(struct vfio_ccw_private *private, · 69 unmodified lines
70		70
71	}	71	}
72		72
73	const struct vfio_ccw_regops vfio_ccw_async_region_ops = {	73	static const struct vfio_ccw_regops vfio_ccw_async_region_ops = {
74	.read = vfio_ccw_async_region_read,	74	.read = vfio_ccw_async_region_read,
75	.write = vfio_ccw_async_region_write,	75	.write = vfio_ccw_async_region_write,
76	.release = vfio_ccw_async_region_release,	76	.release = vfio_ccw_async_region_release,

drivers/s390/crypto/ap_queue.c+1−0

@@ -152,6 +152,7 @@ static struct ap_queue_status ap_sm_recv(struct ap_queue *aq) · 151 unmodified lines
152	ap_msg->receive(aq, ap_msg, aq->reply);	152	ap_msg->receive(aq, ap_msg, aq->reply);
153	break;	153	break;
154	}	154	}
		155	/* fall through */
155	case AP_RESPONSE_NO_PENDING_REPLY:	156	case AP_RESPONSE_NO_PENDING_REPLY:
156	if (!status.queue_empty \|\| aq->queue_count <= 0)	157	if (!status.queue_empty \|\| aq->queue_count <= 0)
157	break;	158	break;

drivers/s390/crypto/zcrypt_msgtype6.c+4−13

 		if (msg->cprbx.cprb_ver_id == 0x02)
 			return convert_type86_ica(zq, reply,
 						  outputdata, outputdatalength);
-		/*
+		/* fall through - wrong cprb version is an unknown response */
-		 * Fall through, no break, incorrect cprb version is an unknown
-		 * response
-		 */
 	default: /* Unknown response type, this should NEVER EVER happen */
 		zq->online = 0;
 		pr_err("Cryptographic device %02x.%04x failed and was set offline\n",
 		}
 		if (msg->cprbx.cprb_ver_id == 0x02)
 			return convert_type86_xcrb(zq, reply, xcRB);
-		/*
+		/* fall through - wrong cprb version is an unknown response */
-		 * Fall through, no break, incorrect cprb version is an unknown
-		 * response
-		 */
 	default: /* Unknown response type, this should NEVER EVER happen */
 		xcRB->status = 0x0008044DL; /* HDD_InvalidParm */
 		zq->online = 0;
 			return convert_error(zq, reply);
 		if (msg->cprbx.cprb_ver_id == 0x04)
 			return convert_type86_ep11_xcrb(zq, reply, xcRB);
-	/* Fall through, no break, incorrect cprb version is an unknown resp.*/
+		/* fall through - wrong cprb version is an unknown resp */
 	default: /* Unknown response type, this should NEVER EVER happen */
 		zq->online = 0;
 		pr_err("Cryptographic device %02x.%04x failed and was set offline\n",
 			return -EINVAL;
 		if (msg->cprbx.cprb_ver_id == 0x02)
 			return convert_type86_rng(zq, reply, data);
-		/*
+		/* fall through - wrong cprb version is an unknown response */
-		 * Fall through, no break, incorrect cprb version is an unknown
-		 * response
-		 */
 	default: /* Unknown response type, this should NEVER EVER happen */
 		zq->online = 0;
 		pr_err("Cryptographic device %02x.%04x failed and was set offline\n",

drivers/s390/net/ctcm_fsms.c+1−0

@@ -1704,6 +1704,7 @@ static void ctcmpc_chx_attnbusy(fsm_instance fsm, int event, void arg) · 1703 unmodified lines
1704	grp->changed_side = 2;	1704	grp->changed_side = 2;
1705	break;	1705	break;
1706	}	1706	}
		1707	/* Else, fall through */
1707	case MPCG_STATE_XID0IOWAIX:	1708	case MPCG_STATE_XID0IOWAIX:
1708	case MPCG_STATE_XID7INITW:	1709	case MPCG_STATE_XID7INITW:
1709	case MPCG_STATE_XID7INITX:	1710	case MPCG_STATE_XID7INITX:

drivers/s390/net/ctcm_mpc.c+3−0

 		/*fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);*/
 		if (callback)
 			grp->send_qllc_disc = 1;
+		/* Else, fall through */
 	case MPCG_STATE_XID0IOWAIT:
 		fsm_deltimer(&grp->timer);
 		grp->outstanding_xid2 = 0;
 		if ((fsm_getstate(rch->fsm) == CH_XID0_PENDING) &&
 		   (fsm_getstate(wch->fsm) == CH_XID0_PENDING))
 			break;
+		/* Else, fall through */
 	default:
 		fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
 	}
 			grp->estconnfunc = NULL;
 			break;
 		}
+		/* Else, fall through */
 	case MPCG_STATE_FLOWC:
 	case MPCG_STATE_READY:
 		grp->send_qllc_disc = 2;

drivers/s390/net/qeth_l2_main.c+1−1

@@ -333,7 +333,7 @@ static int qeth_l2_process_inbound_buffer(struct qeth_card *card, · 332 unmodified lines
333	card->osn_info.data_cb(skb);	333	card->osn_info.data_cb(skb);
334	break;	334	break;
335	}	335	}
336	/* else unknown */	336	/* Else, fall through */
337	default:	337	default:
338	dev_kfree_skb_any(skb);	338	dev_kfree_skb_any(skb);
339	QETH_CARD_TEXT(card, 3, "inbunkno");	339	QETH_CARD_TEXT(card, 3, "inbunkno");

drivers/scsi/arm/fas216.c+8−0

 		msgqueue_flush(&info->scsi.msgs);
 		msgqueue_addmsg(&info->scsi.msgs, 1, MESSAGE_REJECT);
 		info->scsi.phase = PHASE_MSGOUT_EXPECT;
+		/* fall through */
 	case async:
 		dev->period = info->ifcfg.asyncperiod / 4;
 			fas216_done(info, DID_ABORT);
 			break;
 		}
+		/* else, fall through */
 	default:				/* huh?					*/
 		printk(KERN_ERR "scsi%d.%c: unexpected disconnect in phase %s\n",
 	case STATE(STAT_STATUS, PHASE_DATAOUT): /* Data Out     -> Status       */
 	case STATE(STAT_STATUS, PHASE_DATAIN):  /* Data In      -> Status       */
 		fas216_stoptransfer(info);
+		/* fall through */
 	case STATE(STAT_STATUS, PHASE_SELSTEPS):/* Sel w/ steps -> Status       */
 	case STATE(STAT_STATUS, PHASE_MSGOUT):  /* Message Out  -> Status       */
 	case STATE(STAT_STATUS, PHASE_COMMAND): /* Command      -> Status       */
 	case STATE(STAT_MESGIN, PHASE_DATAOUT): /* Data Out     -> Message In   */
 	case STATE(STAT_MESGIN, PHASE_DATAIN):  /* Data In      -> Message In   */
 		fas216_stoptransfer(info);
+		/* fall through */
 	case STATE(STAT_MESGIN, PHASE_COMMAND):	/* Command	-> Message In	*/
 	case STATE(STAT_MESGIN, PHASE_SELSTEPS):/* Sel w/ steps -> Message In   */
 	case STATE(STAT_MESGIN, PHASE_MSGOUT):  /* Message Out  -> Message In   */
 			fas216_message(info);
 			break;
 		}
+		/* else, fall through */
 	default:
 		fas216_log(info, 0, "internal phase %s for function done?"
 	switch (where_from) {
 	case TYPE_QUEUE:
 		fas216_allocate_tag(info, SCpnt);
+		/* fall through */
 	case TYPE_OTHER:
 		fas216_start_command(info, SCpnt);
 		break;

drivers/scsi/fcoe/fcoe_ctlr.c+65−73

  */
 static inline struct fcoe_rport *fcoe_ctlr_rport(struct fc_rport_priv *rdata)
 {
-	return (struct fcoe_rport *)(rdata + 1);
+	return container_of(rdata, struct fcoe_rport, rdata);
 }
 /**
  */
 static int fcoe_ctlr_vn_parse(struct fcoe_ctlr *fip,
 			      struct sk_buff *skb,
-			      struct fc_rport_priv *rdata)
+			      struct fcoe_rport *frport)
 {
 	struct fip_header *fiph;
 	struct fip_desc *desc = NULL;
 	struct fip_wwn_desc *wwn = NULL;
 	struct fip_vn_desc *vn = NULL;
 	struct fip_size_desc *size = NULL;
-	struct fcoe_rport *frport;
 	size_t rlen;
 	size_t dlen;
 	u32 desc_mask = 0;
 	u32 dtype;
 	u8 sub;
-	memset(rdata, 0, sizeof(*rdata) + sizeof(*frport));
-	frport = fcoe_ctlr_rport(rdata);
 	fiph = (struct fip_header *)skb->data;
 	frport->flags = ntohs(fiph->fip_flags);
 			if (dlen != sizeof(struct fip_wwn_desc))
 				goto len_err;
 			wwn = (struct fip_wwn_desc *)desc;
-			rdata->ids.node_name = get_unaligned_be64(&wwn->fd_wwn);
+			frport->rdata.ids.node_name =
+				get_unaligned_be64(&wwn->fd_wwn);
 			break;
 		case FIP_DT_VN_ID:
 			if (dlen != sizeof(struct fip_vn_desc))
 				goto len_err;
 			vn = (struct fip_vn_desc *)desc;
 			memcpy(frport->vn_mac, vn->fd_mac, ETH_ALEN);
-			rdata->ids.port_id = ntoh24(vn->fd_fc_id);
+			frport->rdata.ids.port_id = ntoh24(vn->fd_fc_id);
-			rdata->ids.port_name = get_unaligned_be64(&vn->fd_wwpn);
+			frport->rdata.ids.port_name =
+				get_unaligned_be64(&vn->fd_wwpn);
 			break;
 		case FIP_DT_FC4F:
 			if (dlen != sizeof(struct fip_fc4_feat))
 /**
  * fcoe_ctlr_vn_probe_req() - handle incoming VN2VN probe request.
  * @fip: The FCoE controller
- * @rdata: parsed remote port with frport from the probe request
+ * @frport: parsed FCoE rport from the probe request
  *
  * Called with ctlr_mutex held.
  */
 static void fcoe_ctlr_vn_probe_req(struct fcoe_ctlr *fip,
-				   struct fc_rport_priv *rdata)
+				   struct fcoe_rport *frport)
 {
-	struct fcoe_rport *frport = fcoe_ctlr_rport(rdata);
+	if (frport->rdata.ids.port_id != fip->port_id)
-	if (rdata->ids.port_id != fip->port_id)
 		return;
 	switch (fip->state) {
 		 * Probe's REC bit is not set.
 		 * If we don't reply, we will change our address.
 		 */
-		if (fip->lp->wwpn > rdata->ids.port_name &&
+		if (fip->lp->wwpn > frport->rdata.ids.port_name &&
 		    !(frport->flags & FIP_FL_REC_OR_P2P)) {
 			LIBFCOE_FIP_DBG(fip, "vn_probe_req: "
 					"port_id collision\n");
 /**
  * fcoe_ctlr_vn_probe_reply() - handle incoming VN2VN probe reply.
  * @fip: The FCoE controller
- * @rdata: parsed remote port with frport from the probe request
+ * @frport: parsed FCoE rport from the probe request
  *
  * Called with ctlr_mutex held.
  */
 static void fcoe_ctlr_vn_probe_reply(struct fcoe_ctlr *fip,
-				   struct fc_rport_priv *rdata)
+				     struct fcoe_rport *frport)
 {
-	if (rdata->ids.port_id != fip->port_id)
+	if (frport->rdata.ids.port_id != fip->port_id)
 		return;
 	switch (fip->state) {
 	case FIP_ST_VNMP_START:
 /**
  * fcoe_ctlr_vn_add() - Add a VN2VN entry to the list, based on a claim reply.
  * @fip: The FCoE controller
- * @new: newly-parsed remote port with frport as a template for new rdata
+ * @new: newly-parsed FCoE rport as a template for new rdata
  *
  * Called with ctlr_mutex held.
  */
-static void fcoe_ctlr_vn_add(struct fcoe_ctlr *fip, struct fc_rport_priv *new)
+static void fcoe_ctlr_vn_add(struct fcoe_ctlr *fip, struct fcoe_rport *new)
 {
 	struct fc_lport *lport = fip->lp;
 	struct fc_rport_priv *rdata;
 	struct fcoe_rport *frport;
 	u32 port_id;
-	port_id = new->ids.port_id;
+	port_id = new->rdata.ids.port_id;
 	if (port_id == fip->port_id)
 		return;
 	rdata->disc_id = lport->disc.disc_id;
 	ids = &rdata->ids;
-	if ((ids->port_name != -1 && ids->port_name != new->ids.port_name) ||
+	if ((ids->port_name != -1 &&
-	    (ids->node_name != -1 && ids->node_name != new->ids.node_name)) {
+	     ids->port_name != new->rdata.ids.port_name) ||
+	    (ids->node_name != -1 &&
+	     ids->node_name != new->rdata.ids.node_name)) {
 		mutex_unlock(&rdata->rp_mutex);
 		LIBFCOE_FIP_DBG(fip, "vn_add rport logoff %6.6x\n", port_id);
 		fc_rport_logoff(rdata);
 		mutex_lock(&rdata->rp_mutex);
 	}
-	ids->port_name = new->ids.port_name;
+	ids->port_name = new->rdata.ids.port_name;
-	ids->node_name = new->ids.node_name;
+	ids->node_name = new->rdata.ids.node_name;
 	mutex_unlock(&rdata->rp_mutex);
 	frport = fcoe_ctlr_rport(rdata);
 	LIBFCOE_FIP_DBG(fip, "vn_add rport %6.6x %s state %d\n",
 			port_id, frport->fcoe_len ? "old" : "new",
 			rdata->rp_state);
-	*frport = *fcoe_ctlr_rport(new);
+	frport->fcoe_len = new->fcoe_len;
+	frport->flags = new->flags;
+	frport->login_count = new->login_count;
+	memcpy(frport->enode_mac, new->enode_mac, ETH_ALEN);
+	memcpy(frport->vn_mac, new->vn_mac, ETH_ALEN);
 	frport->time = 0;
 }
 /**
  * fcoe_ctlr_vn_claim_notify() - handle received FIP VN2VN Claim Notification
  * @fip: The FCoE controller
- * @new: newly-parsed remote port with frport as a template for new rdata
+ * @new: newly-parsed FCoE rport as a template for new rdata
  *
  * Called with ctlr_mutex held.
  */
 static void fcoe_ctlr_vn_claim_notify(struct fcoe_ctlr *fip,
-				      struct fc_rport_priv *new)
+				      struct fcoe_rport *new)
 {
-	struct fcoe_rport *frport = fcoe_ctlr_rport(new);
+	if (new->flags & FIP_FL_REC_OR_P2P) {
-	if (frport->flags & FIP_FL_REC_OR_P2P) {
 		LIBFCOE_FIP_DBG(fip, "send probe req for P2P/REC\n");
 		fcoe_ctlr_vn_send(fip, FIP_SC_VN_PROBE_REQ, fcoe_all_vn2vn, 0);
 		return;
 	case FIP_ST_VNMP_START:
 	case FIP_ST_VNMP_PROBE1:
 	case FIP_ST_VNMP_PROBE2:
-		if (new->ids.port_id == fip->port_id) {
+		if (new->rdata.ids.port_id == fip->port_id) {
 			LIBFCOE_FIP_DBG(fip, "vn_claim_notify: "
 					"restart, state %d\n",
 					fip->state);
 		break;
 	case FIP_ST_VNMP_CLAIM:
 	case FIP_ST_VNMP_UP:
-		if (new->ids.port_id == fip->port_id) {
+		if (new->rdata.ids.port_id == fip->port_id) {
-			if (new->ids.port_name > fip->lp->wwpn) {
+			if (new->rdata.ids.port_name > fip->lp->wwpn) {
 				LIBFCOE_FIP_DBG(fip, "vn_claim_notify: "
 						"restart, port_id collision\n");
 				fcoe_ctlr_vn_restart(fip);
 			break;
 		}
 		LIBFCOE_FIP_DBG(fip, "vn_claim_notify: send reply to %x\n",
-				new->ids.port_id);
+				new->rdata.ids.port_id);
-		fcoe_ctlr_vn_send(fip, FIP_SC_VN_CLAIM_REP, frport->enode_mac,
+		fcoe_ctlr_vn_send(fip, FIP_SC_VN_CLAIM_REP, new->enode_mac,
-				  min((u32)frport->fcoe_len,
+				  min((u32)new->fcoe_len,
 				      fcoe_ctlr_fcoe_size(fip)));
 		fcoe_ctlr_vn_add(fip, new);
 		break;
 	default:
 		LIBFCOE_FIP_DBG(fip, "vn_claim_notify: "
-				"ignoring claim from %x\n", new->ids.port_id);
+				"ignoring claim from %x\n",
+				new->rdata.ids.port_id);
 		break;
 	}
 }
 /**
  * fcoe_ctlr_vn_claim_resp() - handle received Claim Response
  * @fip: The FCoE controller that received the frame
- * @new: newly-parsed remote port with frport from the Claim Response
+ * @new: newly-parsed FCoE rport from the Claim Response
  *
  * Called with ctlr_mutex held.
  */
 static void fcoe_ctlr_vn_claim_resp(struct fcoe_ctlr *fip,
-				    struct fc_rport_priv *new)
+				    struct fcoe_rport *new)
 {
 	LIBFCOE_FIP_DBG(fip, "claim resp from from rport %x - state %s\n",
-			new->ids.port_id, fcoe_ctlr_state(fip->state));
+			new->rdata.ids.port_id, fcoe_ctlr_state(fip->state));
 	if (fip->state == FIP_ST_VNMP_UP || fip->state == FIP_ST_VNMP_CLAIM)
 		fcoe_ctlr_vn_add(fip, new);
 }
 /**
  * fcoe_ctlr_vn_beacon() - handle received beacon.
  * @fip: The FCoE controller that received the frame
- * @new: newly-parsed remote port with frport from the Beacon
+ * @new: newly-parsed FCoE rport from the Beacon
  *
  * Called with ctlr_mutex held.
  */
 static void fcoe_ctlr_vn_beacon(struct fcoe_ctlr *fip,
-				struct fc_rport_priv *new)
+				struct fcoe_rport *new)
 {
 	struct fc_lport *lport = fip->lp;
 	struct fc_rport_priv *rdata;
 	struct fcoe_rport *frport;
-	frport = fcoe_ctlr_rport(new);
+	if (new->flags & FIP_FL_REC_OR_P2P) {
-	if (frport->flags & FIP_FL_REC_OR_P2P) {
 		LIBFCOE_FIP_DBG(fip, "p2p beacon while in vn2vn mode\n");
 		fcoe_ctlr_vn_send(fip, FIP_SC_VN_PROBE_REQ, fcoe_all_vn2vn, 0);
 		return;
 	}
-	rdata = fc_rport_lookup(lport, new->ids.port_id);
+	rdata = fc_rport_lookup(lport, new->rdata.ids.port_id);
 	if (rdata) {
-		if (rdata->ids.node_name == new->ids.node_name &&
+		if (rdata->ids.node_name == new->rdata.ids.node_name &&
-		    rdata->ids.port_name == new->ids.port_name) {
+		    rdata->ids.port_name == new->rdata.ids.port_name) {
 			frport = fcoe_ctlr_rport(rdata);
 			LIBFCOE_FIP_DBG(fip, "beacon from rport %x\n",
 					rdata->ids.port_id);
 			if (!frport->time && fip->state == FIP_ST_VNMP_UP) {
 	 * Don't add the neighbor yet.
 	 */
 	LIBFCOE_FIP_DBG(fip, "beacon from new rport %x. sending claim notify\n",
-			new->ids.port_id);
+			new->rdata.ids.port_id);
 	if (time_after(jiffies,
 		       fip->sol_time + msecs_to_jiffies(FIP_VN_ANN_WAIT)))
 		fcoe_ctlr_vn_send_claim(fip);
 {
 	struct fip_header *fiph;
 	enum fip_vn2vn_subcode sub;
-	struct {
+	struct fcoe_rport frport = { };
-		struct fc_rport_priv rdata;
-		struct fcoe_rport frport;
-	} buf;
 	int rc, vlan_id = 0;
 	fiph = (struct fip_header *)skb->data;
 		goto drop;
 	}
-	rc = fcoe_ctlr_vn_parse(fip, skb, &buf.rdata);
+	rc = fcoe_ctlr_vn_parse(fip, skb, &frport);
 	if (rc) {
 		LIBFCOE_FIP_DBG(fip, "vn_recv vn_parse error %d\n", rc);
 		goto drop;
 	mutex_lock(&fip->ctlr_mutex);
 	switch (sub) {
 	case FIP_SC_VN_PROBE_REQ:
-		fcoe_ctlr_vn_probe_req(fip, &buf.rdata);
+		fcoe_ctlr_vn_probe_req(fip, &frport);
 		break;
 	case FIP_SC_VN_PROBE_REP:
-		fcoe_ctlr_vn_probe_reply(fip, &buf.rdata);
+		fcoe_ctlr_vn_probe_reply(fip, &frport);
 		break;
 	case FIP_SC_VN_CLAIM_NOTIFY:
-		fcoe_ctlr_vn_claim_notify(fip, &buf.rdata);
+		fcoe_ctlr_vn_claim_notify(fip, &frport);
 		break;
 	case FIP_SC_VN_CLAIM_REP:
-		fcoe_ctlr_vn_claim_resp(fip, &buf.rdata);
+		fcoe_ctlr_vn_claim_resp(fip, &frport);
 		break;
 	case FIP_SC_VN_BEACON:
-		fcoe_ctlr_vn_beacon(fip, &buf.rdata);
+		fcoe_ctlr_vn_beacon(fip, &frport);
 		break;
 	default:
 		LIBFCOE_FIP_DBG(fip, "vn_recv unknown subcode %d\n", sub);
  */
 static int fcoe_ctlr_vlan_parse(struct fcoe_ctlr *fip,
 			      struct sk_buff *skb,
-			      struct fc_rport_priv *rdata)
+			      struct fcoe_rport *frport)
 {
 	struct fip_header *fiph;
 	struct fip_desc *desc = NULL;
 	struct fip_mac_desc *macd = NULL;
 	struct fip_wwn_desc *wwn = NULL;
-	struct fcoe_rport *frport;
 	size_t rlen;
 	size_t dlen;
 	u32 desc_mask = 0;
 	u32 dtype;
 	u8 sub;
-	memset(rdata, 0, sizeof(*rdata) + sizeof(*frport));
-	frport = fcoe_ctlr_rport(rdata);
 	fiph = (struct fip_header *)skb->data;
 	frport->flags = ntohs(fiph->fip_flags);
 			if (dlen != sizeof(struct fip_wwn_desc))
 				goto len_err;
 			wwn = (struct fip_wwn_desc *)desc;
-			rdata->ids.node_name = get_unaligned_be64(&wwn->fd_wwn);
+			frport->rdata.ids.node_name =
+				get_unaligned_be64(&wwn->fd_wwn);
 			break;
 		default:
 			LIBFCOE_FIP_DBG(fip, "unexpected descriptor type %x "
 /**
  * fcoe_ctlr_vlan_disk_reply() - send FIP VLAN Discovery Notification.
  * @fip: The FCoE controller
+ * @frport: The newly-parsed FCoE rport from the Discovery Request
  *
  * Called with ctlr_mutex held.
  */
 static void fcoe_ctlr_vlan_disc_reply(struct fcoe_ctlr *fip,
-				      struct fc_rport_priv *rdata)
+				      struct fcoe_rport *frport)
 {
-	struct fcoe_rport *frport = fcoe_ctlr_rport(rdata);
 	enum fip_vlan_subcode sub = FIP_SC_VL_NOTE;
 	if (fip->mode == FIP_MODE_VN2VN)
 {
 	struct fip_header *fiph;
 	enum fip_vlan_subcode sub;
-	struct {
+	struct fcoe_rport frport = { };
-		struct fc_rport_priv rdata;
-		struct fcoe_rport frport;
-	} buf;
 	int rc;
 	fiph = (struct fip_header *)skb->data;
 	sub = fiph->fip_subcode;
-	rc = fcoe_ctlr_vlan_parse(fip, skb, &buf.rdata);
+	rc = fcoe_ctlr_vlan_parse(fip, skb, &frport);
 	if (rc) {
 		LIBFCOE_FIP_DBG(fip, "vlan_recv vlan_parse error %d\n", rc);
 		goto drop;
 	}
 	mutex_lock(&fip->ctlr_mutex);
 	if (sub == FIP_SC_VL_REQ)
-		fcoe_ctlr_vlan_disc_reply(fip, &buf.rdata);
+		fcoe_ctlr_vlan_disc_reply(fip, &frport);
 	mutex_unlock(&fip->ctlr_mutex);
 drop:

drivers/scsi/hpsa.c+11−3

 	case IOACCEL2_SERV_RESPONSE_COMPLETE:
 		switch (c2->error_data.status) {
 		case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
+			if (cmd)
+				cmd->result = 0;
 			break;
 		case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
 			cmd->result |= SAM_STAT_CHECK_CONDITION;
 	/* check for good status */
 	if (likely(c2->error_data.serv_response == 0 &&
-			c2->error_data.status == 0))
+			c2->error_data.status == 0)) {
+		cmd->result = 0;
 		return hpsa_cmd_free_and_done(h, c, cmd);
+	}
 	/*
 	 * Any RAID offload error results in retry which will use
 	if (c == NULL)
 		return SCSI_MLQUEUE_DEVICE_BUSY;
+	/*
+	 * This is necessary because the SML doesn't zero out this field during
+	 * error recovery.
+	 */
+	cmd->result = 0;
 	/*
 	 * Call alternate submit routine for I/O accelerated commands.
 	 * Retries always go down the normal I/O path.
 		if (idx != h->last_collision_tag) { /* Print once per tag */
 			dev_warn(&h->pdev->dev,
 				"%s: tag collision (tag=%d)\n", __func__, idx);
-			if (c->scsi_cmd != NULL)
-				scsi_print_command(c->scsi_cmd);
 			if (scmd)
 				scsi_print_command(scmd);
 			h->last_collision_tag = idx;

drivers/scsi/libfc/fc_rport.c+4−1

 struct fc_rport_priv *fc_rport_create(struct fc_lport *lport, u32 port_id)
 {
 	struct fc_rport_priv *rdata;
+	size_t rport_priv_size = sizeof(*rdata);
 	lockdep_assert_held(&lport->disc.disc_mutex);
 	if (rdata)
 		return rdata;
-	rdata = kzalloc(sizeof(*rdata) + lport->rport_priv_size, GFP_KERNEL);
+	if (lport->rport_priv_size > 0)
+		rport_priv_size = lport->rport_priv_size;
+	rdata = kzalloc(rport_priv_size, GFP_KERNEL);
 	if (!rdata)
 		return NULL;

drivers/scsi/mpt3sas/mpt3sas_base.c+7−5

 {
 	u64 required_mask, coherent_mask;
 	struct sysinfo s;
+	/* Set 63 bit DMA mask for all SAS3 and SAS35 controllers */
+	int dma_mask = (ioc->hba_mpi_version_belonged > MPI2_VERSION) ? 63 : 64;
 	if (ioc->is_mcpu_endpoint)
 		goto try_32bit;
 		goto try_32bit;
 	if (ioc->dma_mask)
-		coherent_mask = DMA_BIT_MASK(64);
+		coherent_mask = DMA_BIT_MASK(dma_mask);
 	else
 		coherent_mask = DMA_BIT_MASK(32);
-	if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
+	if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(dma_mask)) ||
 	    dma_set_coherent_mask(&pdev->dev, coherent_mask))
 		goto try_32bit;
 	ioc->base_add_sg_single = &_base_add_sg_single_64;
 	ioc->sge_size = sizeof(Mpi2SGESimple64_t);
-	ioc->dma_mask = 64;
+	ioc->dma_mask = dma_mask;
 	goto out;
  try_32bit:
 _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER *ioc,
 				      struct pci_dev *pdev)
 {
-	if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
+	if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(ioc->dma_mask))) {
 		if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
 			return -ENODEV;
 	}
 		total_sz += sz;
 	} while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
-	if (ioc->dma_mask == 64) {
+	if (ioc->dma_mask > 32) {
 		if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
 			ioc_warn(ioc, "no suitable consistent DMA mask for %s\n",
 				 pci_name(ioc->pdev));

drivers/scsi/qla2xxx/qla_init.c+1−1

@@ -4877,7 +4877,7 @@ qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) · 4876 unmodified lines
4877	ql_log(ql_log_warn, vha, 0xd049,	4877	ql_log(ql_log_warn, vha, 0xd049,
4878	"Failed to allocate ct_sns request.\n");	4878	"Failed to allocate ct_sns request.\n");
4879	kfree(fcport);	4879	kfree(fcport);
4880	fcport = NULL;	4880	return NULL;
4881	}	4881	}
4882		4882
4883	INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);	4883	INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);

drivers/spi/spi-bcm2835.c+2−1

@@ -834,7 +834,8 @@ static int bcm2835_spi_transfer_one(struct spi_controller *ctlr, · 833 unmodified lines
834	bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);	834	bcm2835_wr(bs, BCM2835_SPI_CLK, cdiv);
835		835
836	/* handle all the 3-wire mode */	836	/* handle all the 3-wire mode */
837	if ((spi->mode & SPI_3WIRE) && (tfr->rx_buf))	837	if (spi->mode & SPI_3WIRE && tfr->rx_buf &&
		838	tfr->rx_buf != ctlr->dummy_rx)
838	cs \|= BCM2835_SPI_CS_REN;	839	cs \|= BCM2835_SPI_CS_REN;
839	else	840	else
840	cs &= ~BCM2835_SPI_CS_REN;	841	cs &= ~BCM2835_SPI_CS_REN;

drivers/spi/spi-fsl-qspi.c+1−1

@@ -206,7 +206,7 @@ static const struct fsl_qspi_devtype_data imx6sx_data = { · 205 unmodified lines
206	};	206	};
207		207
208	static const struct fsl_qspi_devtype_data imx7d_data = {	208	static const struct fsl_qspi_devtype_data imx7d_data = {
209	.rxfifo = SZ_512,	209	.rxfifo = SZ_128,
210	.txfifo = SZ_512,	210	.txfifo = SZ_512,
211	.ahb_buf_size = SZ_1K,	211	.ahb_buf_size = SZ_1K,
212	.quirks = QUADSPI_QUIRK_TKT253890 \| QUADSPI_QUIRK_4X_INT_CLK,	212	.quirks = QUADSPI_QUIRK_TKT253890 \| QUADSPI_QUIRK_4X_INT_CLK,

drivers/spi/spi-gpio.c+6−0

 	bb = &spi_gpio->bitbang;
 	bb->master = master;
+	/*
+	 * There is some additional business, apart from driving the CS GPIO
+	 * line, that we need to do on selection. This makes the local
+	 * callback for chipselect always get called.
+	 */
+	master->flags |= SPI_MASTER_GPIO_SS;
 	bb->chipselect = spi_gpio_chipselect;
 	bb->set_line_direction = spi_gpio_set_direction;

drivers/spi/spi-pxa2xx.c+12−2

 	{ PCI_VDEVICE(INTEL, 0x02aa), LPSS_CNL_SSP },
 	{ PCI_VDEVICE(INTEL, 0x02ab), LPSS_CNL_SSP },
 	{ PCI_VDEVICE(INTEL, 0x02fb), LPSS_CNL_SSP },
+	/* TGL-LP */
+	{ PCI_VDEVICE(INTEL, 0xa0aa), LPSS_CNL_SSP },
+	{ PCI_VDEVICE(INTEL, 0xa0ab), LPSS_CNL_SSP },
+	{ PCI_VDEVICE(INTEL, 0xa0de), LPSS_CNL_SSP },
+	{ PCI_VDEVICE(INTEL, 0xa0df), LPSS_CNL_SSP },
+	{ PCI_VDEVICE(INTEL, 0xa0fb), LPSS_CNL_SSP },
+	{ PCI_VDEVICE(INTEL, 0xa0fd), LPSS_CNL_SSP },
+	{ PCI_VDEVICE(INTEL, 0xa0fe), LPSS_CNL_SSP },
 	{ },
 };
 	status = devm_spi_register_controller(&pdev->dev, controller);
 	if (status != 0) {
 		dev_err(&pdev->dev, "problem registering spi controller\n");
-		goto out_error_clock_enabled;
+		goto out_error_pm_runtime_enabled;
 	}
 	return status;
-out_error_clock_enabled:
+out_error_pm_runtime_enabled:
 	pm_runtime_put_noidle(&pdev->dev);
 	pm_runtime_disable(&pdev->dev);
+out_error_clock_enabled:
 	clk_disable_unprepare(ssp->clk);
 out_error_dma_irq_alloc:

drivers/staging/android/ion/ion_page_pool.c+3−0

 #include <linux/list.h>
 #include <linux/slab.h>
 #include <linux/swap.h>
+#include <linux/sched/signal.h>
 #include "ion.h"
 static inline struct page *ion_page_pool_alloc_pages(struct ion_page_pool *pool)
 {
+	if (fatal_signal_pending(current))
+		return NULL;
 	return alloc_pages(pool->gfp_mask, pool->order);
 }

drivers/staging/fbtft/fb_bd663474.c+1−1

@@ -24,7 +24,7 @@ · 23 unmodified lines
24		24
25	static int init_display(struct fbtft_par *par)	25	static int init_display(struct fbtft_par *par)
26	{	26	{
27	if (!par->gpio.cs)	27	if (par->gpio.cs)
28	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */	28	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
29		29
30	par->fbtftops.reset(par);	30	par->fbtftops.reset(par);

drivers/staging/fbtft/fb_ili9163.c+1−1

@@ -77,7 +77,7 @@ static int init_display(struct fbtft_par *par) · 76 unmodified lines
77	{	77	{
78	par->fbtftops.reset(par);	78	par->fbtftops.reset(par);
79		79
80	if (!par->gpio.cs)	80	if (par->gpio.cs)
81	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */	81	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
82		82
83	write_reg(par, MIPI_DCS_SOFT_RESET); /* software reset */	83	write_reg(par, MIPI_DCS_SOFT_RESET); /* software reset */

drivers/staging/fbtft/fb_ili9325.c+1−1

@@ -85,7 +85,7 @@ static int init_display(struct fbtft_par *par) · 84 unmodified lines
85	{	85	{
86	par->fbtftops.reset(par);	86	par->fbtftops.reset(par);
87		87
88	if (!par->gpio.cs)	88	if (par->gpio.cs)
89	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */	89	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
90		90
91	bt &= 0x07;	91	bt &= 0x07;

drivers/staging/fbtft/fb_s6d1121.c+1−1

@@ -29,7 +29,7 @@ static int init_display(struct fbtft_par *par) · 28 unmodified lines
29	{	29	{
30	par->fbtftops.reset(par);	30	par->fbtftops.reset(par);
31		31
32	if (!par->gpio.cs)	32	if (par->gpio.cs)
33	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */	33	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
34		34
35	/* Initialization sequence from Lib_UTFT */	35	/* Initialization sequence from Lib_UTFT */

drivers/staging/fbtft/fb_ssd1289.c+1−1

@@ -28,7 +28,7 @@ static int init_display(struct fbtft_par *par) · 27 unmodified lines
28	{	28	{
29	par->fbtftops.reset(par);	29	par->fbtftops.reset(par);
30		30
31	if (!par->gpio.cs)	31	if (par->gpio.cs)
32	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */	32	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
33		33
34	write_reg(par, 0x00, 0x0001);	34	write_reg(par, 0x00, 0x0001);

drivers/staging/fbtft/fb_ssd1331.c+2−2

@@ -81,7 +81,7 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) · 80 unmodified lines
81	va_start(args, len);	81	va_start(args, len);
82		82
83	*buf = (u8)va_arg(args, unsigned int);	83	*buf = (u8)va_arg(args, unsigned int);
84	if (!par->gpio.dc)	84	if (par->gpio.dc)
85	gpiod_set_value(par->gpio.dc, 0);	85	gpiod_set_value(par->gpio.dc, 0);
86	ret = par->fbtftops.write(par, par->buf, sizeof(u8));	86	ret = par->fbtftops.write(par, par->buf, sizeof(u8));
87	if (ret < 0) {	87	if (ret < 0) {
@@ -104,7 +104,7 @@ static void write_reg8_bus8(struct fbtft_par *par, int len, ...) · 16 unmodified lines
104	return;	104	return;
105	}	105	}
106	}	106	}
107	if (!par->gpio.dc)	107	if (par->gpio.dc)
108	gpiod_set_value(par->gpio.dc, 1);	108	gpiod_set_value(par->gpio.dc, 1);
109	va_end(args);	109	va_end(args);
110	}	110	}

drivers/staging/fbtft/fb_upd161704.c+1−1

@@ -26,7 +26,7 @@ static int init_display(struct fbtft_par *par) · 25 unmodified lines
26	{	26	{
27	par->fbtftops.reset(par);	27	par->fbtftops.reset(par);
28		28
29	if (!par->gpio.cs)	29	if (par->gpio.cs)
30	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */	30	gpiod_set_value(par->gpio.cs, 0); /* Activate chip */
31		31
32	/* Initialization sequence from Lib_UTFT */	32	/* Initialization sequence from Lib_UTFT */

drivers/staging/fbtft/fbtft-bus.c+1−1

@@ -135,7 +135,7 @@ int fbtft_write_vmem16_bus8(struct fbtft_par *par, size_t offset, size_t len) · 134 unmodified lines
135	remain = len / 2;	135	remain = len / 2;
136	vmem16 = (u16 *)(par->info->screen_buffer + offset);	136	vmem16 = (u16 *)(par->info->screen_buffer + offset);
137		137
138	if (!par->gpio.dc)	138	if (par->gpio.dc)
139	gpiod_set_value(par->gpio.dc, 1);	139	gpiod_set_value(par->gpio.dc, 1);
140		140
141	/* non buffered write */	141	/* non buffered write */

drivers/staging/fbtft/fbtft-core.c+22−25

 				  struct gpio_desc **gpiop)
 {
 	struct device *dev = par->info->device;
-	struct device_node *node = dev->of_node;
 	int ret = 0;
-	if (of_find_property(node, name, NULL)) {
+	*gpiop = devm_gpiod_get_index_optional(dev, name, index,
-		*gpiop = devm_gpiod_get_index(dev, dev->driver->name, index,
+					       GPIOD_OUT_HIGH);
-					      GPIOD_OUT_HIGH);
+	if (IS_ERR(*gpiop)) {
-		if (IS_ERR(*gpiop)) {
+		ret = PTR_ERR(*gpiop);
-			ret = PTR_ERR(*gpiop);
+		dev_err(dev,
-			dev_err(dev,
+			"Failed to request %s GPIO: %d\n", name, ret);
-				"Failed to request %s GPIO:%d\n", name, ret);
+		return ret;
-			return ret;
-		}
-		fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' GPIO\n",
-			      __func__, name);
 	}
+	fbtft_par_dbg(DEBUG_REQUEST_GPIOS, par, "%s: '%s' GPIO\n",
+		      __func__, name);
 	return ret;
 }
 	if (!par->info->device->of_node)
 		return -EINVAL;
-	ret = fbtft_request_one_gpio(par, "reset-gpios", 0, &par->gpio.reset);
+	ret = fbtft_request_one_gpio(par, "reset", 0, &par->gpio.reset);
 	if (ret)
 		return ret;
-	ret = fbtft_request_one_gpio(par, "dc-gpios", 0, &par->gpio.dc);
+	ret = fbtft_request_one_gpio(par, "dc", 0, &par->gpio.dc);
 	if (ret)
 		return ret;
-	ret = fbtft_request_one_gpio(par, "rd-gpios", 0, &par->gpio.rd);
+	ret = fbtft_request_one_gpio(par, "rd", 0, &par->gpio.rd);
 	if (ret)
 		return ret;
-	ret = fbtft_request_one_gpio(par, "wr-gpios", 0, &par->gpio.wr);
+	ret = fbtft_request_one_gpio(par, "wr", 0, &par->gpio.wr);
 	if (ret)
 		return ret;
-	ret = fbtft_request_one_gpio(par, "cs-gpios", 0, &par->gpio.cs);
+	ret = fbtft_request_one_gpio(par, "cs", 0, &par->gpio.cs);
 	if (ret)
 		return ret;
-	ret = fbtft_request_one_gpio(par, "latch-gpios", 0, &par->gpio.latch);
+	ret = fbtft_request_one_gpio(par, "latch", 0, &par->gpio.latch);
 	if (ret)
 		return ret;
 	for (i = 0; i < 16; i++) {
-		ret = fbtft_request_one_gpio(par, "db-gpios", i,
+		ret = fbtft_request_one_gpio(par, "db", i,
 					     &par->gpio.db[i]);
 		if (ret)
 			return ret;
-		ret = fbtft_request_one_gpio(par, "led-gpios", i,
+		ret = fbtft_request_one_gpio(par, "led", i,
 					     &par->gpio.led[i]);
 		if (ret)
 			return ret;
-		ret = fbtft_request_one_gpio(par, "aux-gpios", i,
+		ret = fbtft_request_one_gpio(par, "aux", i,
 					     &par->gpio.aux[i]);
 		if (ret)
 			return ret;
 	if (!par->gpio.reset)
 		return;
 	fbtft_par_dbg(DEBUG_RESET, par, "%s()\n", __func__);
-	gpiod_set_value_cansleep(par->gpio.reset, 0);
-	usleep_range(20, 40);
 	gpiod_set_value_cansleep(par->gpio.reset, 1);
+	usleep_range(20, 40);
+	gpiod_set_value_cansleep(par->gpio.reset, 0);
 	msleep(120);
 }
 		return -EINVAL;
 	par->fbtftops.reset(par);
-	if (!par->gpio.cs)
+	if (par->gpio.cs)
 		gpiod_set_value(par->gpio.cs, 0);  /* Activate chip */
 	while (p) {
 	}
 	par->fbtftops.reset(par);
-	if (!par->gpio.cs)
+	if (par->gpio.cs)
 		gpiod_set_value(par->gpio.cs, 0);  /* Activate chip */
 	i = 0;

drivers/staging/gasket/apex_driver.c+1−1

@@ -532,7 +532,7 @@ static ssize_t sysfs_show(struct device device, struct device_attribute attr, · 531 unmodified lines
532	break;	532	break;
533	case ATTR_KERNEL_HIB_SIMPLE_PAGE_TABLE_SIZE:	533	case ATTR_KERNEL_HIB_SIMPLE_PAGE_TABLE_SIZE:
534	ret = scnprintf(buf, PAGE_SIZE, "%u\n",	534	ret = scnprintf(buf, PAGE_SIZE, "%u\n",
535	gasket_page_table_num_entries(	535	gasket_page_table_num_simple_entries(
536	gasket_dev->page_table[0]));	536	gasket_dev->page_table[0]));
537	break;	537	break;
538	case ATTR_KERNEL_HIB_NUM_ACTIVE_PAGES:	538	case ATTR_KERNEL_HIB_NUM_ACTIVE_PAGES:

drivers/staging/unisys/visornic/visornic_main.c+2−1

@@ -1750,7 +1750,8 @@ static int visornic_poll(struct napi_struct *napi, int budget) · 1749 unmodified lines
1750	}	1750	}
1751		1751
1752	/* poll_for_irq - checks the status of the response queue	1752	/* poll_for_irq - checks the status of the response queue
1753	* @v: Void pointer to the visronic devdata struct.	1753	* @t: pointer to the 'struct timer_list' from which we can retrieve the
		1754	* the visornic devdata struct.
1754	*	1755	*
1755	* Main function of the vnic_incoming thread. Periodically check the response	1756	* Main function of the vnic_incoming thread. Periodically check the response
1756	* queue and drain it if needed.	1757	* queue and drain it if needed.

drivers/staging/wilc1000/wilc_wfi_cfgoperations.c+1−0

@@ -1969,6 +1969,7 @@ void wilc_deinit_host_int(struct net_device *net) · 1968 unmodified lines
1969		1969
1970	priv->p2p_listen_state = false;	1970	priv->p2p_listen_state = false;
1971		1971
		1972	flush_workqueue(vif->wilc->hif_workqueue);
1972	mutex_destroy(&priv->scan_req_lock);	1973	mutex_destroy(&priv->scan_req_lock);
1973	ret = wilc_deinit(vif);	1974	ret = wilc_deinit(vif);
1974		1975

drivers/tty/serial/kgdboc.c+4−0

 	/* Increment the module count when the debugger is active */
 	if (!kgdb_connected)
 		try_module_get(THIS_MODULE);
+	atomic_inc(&ignore_console_lock_warning);
 }
 static void kgdboc_post_exp_handler(void)
 {
+	atomic_dec(&ignore_console_lock_warning);
 	/* decrement the module count when the debugger detaches */
 	if (!kgdb_connected)
 		module_put(THIS_MODULE);

drivers/usb/core/devio.c+0−2

@@ -1812,8 +1812,6 @@ static int proc_do_submiturb(struct usb_dev_state ps, struct usbdevfs_urb uurb · 1811 unmodified lines
1812	return 0;	1812	return 0;
1813		1813
1814	error:	1814	error:
1815	if (as && as->usbm)
1816	dec_usb_memory_use_count(as->usbm, &as->usbm->urb_use_count);
1817	kfree(isopkt);	1815	kfree(isopkt);
1818	kfree(dr);	1816	kfree(dr);
1819	if (as)	1817	if (as)

drivers/usb/core/hcd.c+0−123

@@ -103,11 +103,6 @@ static DEFINE_SPINLOCK(hcd_urb_unlink_lock); · 102 unmodified lines
103	/* wait queue for synchronous unlinks */	103	/* wait queue for synchronous unlinks */
104	DECLARE_WAIT_QUEUE_HEAD(usb_kill_urb_queue);	104	DECLARE_WAIT_QUEUE_HEAD(usb_kill_urb_queue);
105		105
106	static inline int is_root_hub(struct usb_device *udev)
107	{
108	return (udev->parent == NULL);
109	}
110
111	/-------------------------------------------------------------------------/	106	/-------------------------------------------------------------------------/
112		107
113	/*	108	/*
@@ -880,101 +875,6 @@ static int usb_rh_urb_dequeue(struct usb_hcd hcd, struct urb urb, int status) · 766 unmodified lines
880	}	875	}
881		876
882		877
883
884	/*
885	* Show & store the current value of authorized_default
886	*/
887	static ssize_t authorized_default_show(struct device *dev,
888	struct device_attribute attr, char buf)
889	{
890	struct usb_device *rh_usb_dev = to_usb_device(dev);
891	struct usb_bus *usb_bus = rh_usb_dev->bus;
892	struct usb_hcd *hcd;
893
894	hcd = bus_to_hcd(usb_bus);
895	return snprintf(buf, PAGE_SIZE, "%u\n", hcd->dev_policy);
896	}
897
898	static ssize_t authorized_default_store(struct device *dev,
899	struct device_attribute *attr,
900	const char *buf, size_t size)
901	{
902	ssize_t result;
903	unsigned val;
904	struct usb_device *rh_usb_dev = to_usb_device(dev);
905	struct usb_bus *usb_bus = rh_usb_dev->bus;
906	struct usb_hcd *hcd;
907
908	hcd = bus_to_hcd(usb_bus);
909	result = sscanf(buf, "%u\n", &val);
910	if (result == 1) {
911	hcd->dev_policy = val <= USB_DEVICE_AUTHORIZE_INTERNAL ?
912	val : USB_DEVICE_AUTHORIZE_ALL;
913	result = size;
914	} else {
915	result = -EINVAL;
916	}
917	return result;
918	}
919	static DEVICE_ATTR_RW(authorized_default);
920
921	/*
922	* interface_authorized_default_show - show default authorization status
923	* for USB interfaces
924	*
925	* note: interface_authorized_default is the default value
926	* for initializing the authorized attribute of interfaces
927	*/
928	static ssize_t interface_authorized_default_show(struct device *dev,
929	struct device_attribute attr, char buf)
930	{
931	struct usb_device *usb_dev = to_usb_device(dev);
932	struct usb_hcd *hcd = bus_to_hcd(usb_dev->bus);
933
934	return sprintf(buf, "%u\n", !!HCD_INTF_AUTHORIZED(hcd));
935	}
936
937	/*
938	* interface_authorized_default_store - store default authorization status
939	* for USB interfaces
940	*
941	* note: interface_authorized_default is the default value
942	* for initializing the authorized attribute of interfaces
943	*/
944	static ssize_t interface_authorized_default_store(struct device *dev,
945	struct device_attribute attr, const char buf, size_t count)
946	{
947	struct usb_device *usb_dev = to_usb_device(dev);
948	struct usb_hcd *hcd = bus_to_hcd(usb_dev->bus);
949	int rc = count;
950	bool val;
951
952	if (strtobool(buf, &val) != 0)
953	return -EINVAL;
954
955	if (val)
956	set_bit(HCD_FLAG_INTF_AUTHORIZED, &hcd->flags);
957	else
958	clear_bit(HCD_FLAG_INTF_AUTHORIZED, &hcd->flags);
959
960	return rc;
961	}
962	static DEVICE_ATTR_RW(interface_authorized_default);
963
964	/* Group all the USB bus attributes */
965	static struct attribute *usb_bus_attrs[] = {
966	&dev_attr_authorized_default.attr,
967	&dev_attr_interface_authorized_default.attr,
968	NULL,
969	};
970
971	static const struct attribute_group usb_bus_attr_group = {
972	.name = NULL, /* we want them in the same directory */
973	.attrs = usb_bus_attrs,
974	};
975
976
977
978	/-------------------------------------------------------------------------/	878	/-------------------------------------------------------------------------/
979		879
980	/**	880	/**
@@ -2894,32 +2794,11 @@ int usb_add_hcd(struct usb_hcd *hcd, · 1913 unmodified lines
2894	if (retval != 0)	2794	if (retval != 0)
2895	goto err_register_root_hub;	2795	goto err_register_root_hub;
2896		2796
2897	retval = sysfs_create_group(&rhdev->dev.kobj, &usb_bus_attr_group);
2898	if (retval < 0) {
2899	printk(KERN_ERR "Cannot register USB bus sysfs attributes: %d\n",
2900	retval);
2901	goto error_create_attr_group;
2902	}
2903	if (hcd->uses_new_polling && HCD_POLL_RH(hcd))	2797	if (hcd->uses_new_polling && HCD_POLL_RH(hcd))
2904	usb_hcd_poll_rh_status(hcd);	2798	usb_hcd_poll_rh_status(hcd);
2905		2799
2906	return retval;	2800	return retval;
2907		2801
2908	error_create_attr_group:
2909	clear_bit(HCD_FLAG_RH_RUNNING, &hcd->flags);
2910	if (HC_IS_RUNNING(hcd->state))
2911	hcd->state = HC_STATE_QUIESCING;
2912	spin_lock_irq(&hcd_root_hub_lock);
2913	hcd->rh_registered = 0;
2914	spin_unlock_irq(&hcd_root_hub_lock);
2915
2916	#ifdef CONFIG_PM
2917	cancel_work_sync(&hcd->wakeup_work);
2918	#endif
2919	cancel_work_sync(&hcd->died_work);
2920	mutex_lock(&usb_bus_idr_lock);
2921	usb_disconnect(&rhdev); /* Sets rhdev to NULL */
2922	mutex_unlock(&usb_bus_idr_lock);
2923	err_register_root_hub:	2802	err_register_root_hub:
2924	hcd->rh_pollable = 0;	2803	hcd->rh_pollable = 0;
2925	clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);	2804	clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
@@ -2963,8 +2842,6 @@ void usb_remove_hcd(struct usb_hcd *hcd) · 37 unmodified lines
2963	dev_info(hcd->self.controller, "remove, state %x\n", hcd->state);	2842	dev_info(hcd->self.controller, "remove, state %x\n", hcd->state);
2964		2843
2965	usb_get_dev(rhdev);	2844	usb_get_dev(rhdev);
2966	sysfs_remove_group(&rhdev->dev.kobj, &usb_bus_attr_group);
2967
2968	clear_bit(HCD_FLAG_RH_RUNNING, &hcd->flags);	2845	clear_bit(HCD_FLAG_RH_RUNNING, &hcd->flags);
2969	if (HC_IS_RUNNING (hcd->state))	2846	if (HC_IS_RUNNING (hcd->state))
2970	hcd->state = HC_STATE_QUIESCING;	2847	hcd->state = HC_STATE_QUIESCING;

drivers/usb/core/sysfs.c+121−0

@@ -15,6 +15,7 @@ · 14 unmodified lines
15	#include <linux/kernel.h>	15	#include <linux/kernel.h>
16	#include <linux/string.h>	16	#include <linux/string.h>
17	#include <linux/usb.h>	17	#include <linux/usb.h>
		18	#include <linux/usb/hcd.h>
18	#include <linux/usb/quirks.h>	19	#include <linux/usb/quirks.h>
19	#include <linux/of.h>	20	#include <linux/of.h>
20	#include "usb.h"	21	#include "usb.h"
@@ -922,6 +923,116 @@ static struct bin_attribute dev_bin_attr_descriptors = { · 901 unmodified lines
922	.size = 18 + 65535, /* dev descr + max-size raw descriptor */	923	.size = 18 + 65535, /* dev descr + max-size raw descriptor */
923	};	924	};
924		925
		926	/*
		927	* Show & store the current value of authorized_default
		928	*/
		929	static ssize_t authorized_default_show(struct device *dev,
		930	struct device_attribute attr, char buf)
		931	{
		932	struct usb_device *rh_usb_dev = to_usb_device(dev);
		933	struct usb_bus *usb_bus = rh_usb_dev->bus;
		934	struct usb_hcd *hcd;
		935
		936	hcd = bus_to_hcd(usb_bus);
		937	return snprintf(buf, PAGE_SIZE, "%u\n", hcd->dev_policy);
		938	}
		939
		940	static ssize_t authorized_default_store(struct device *dev,
		941	struct device_attribute *attr,
		942	const char *buf, size_t size)
		943	{
		944	ssize_t result;
		945	unsigned int val;
		946	struct usb_device *rh_usb_dev = to_usb_device(dev);
		947	struct usb_bus *usb_bus = rh_usb_dev->bus;
		948	struct usb_hcd *hcd;
		949
		950	hcd = bus_to_hcd(usb_bus);
		951	result = sscanf(buf, "%u\n", &val);
		952	if (result == 1) {
		953	hcd->dev_policy = val <= USB_DEVICE_AUTHORIZE_INTERNAL ?
		954	val : USB_DEVICE_AUTHORIZE_ALL;
		955	result = size;
		956	} else {
		957	result = -EINVAL;
		958	}
		959	return result;
		960	}
		961	static DEVICE_ATTR_RW(authorized_default);
		962
		963	/*
		964	* interface_authorized_default_show - show default authorization status
		965	* for USB interfaces
		966	*
		967	* note: interface_authorized_default is the default value
		968	* for initializing the authorized attribute of interfaces
		969	*/
		970	static ssize_t interface_authorized_default_show(struct device *dev,
		971	struct device_attribute attr, char buf)
		972	{
		973	struct usb_device *usb_dev = to_usb_device(dev);
		974	struct usb_hcd *hcd = bus_to_hcd(usb_dev->bus);
		975
		976	return sprintf(buf, "%u\n", !!HCD_INTF_AUTHORIZED(hcd));
		977	}
		978
		979	/*
		980	* interface_authorized_default_store - store default authorization status
		981	* for USB interfaces
		982	*
		983	* note: interface_authorized_default is the default value
		984	* for initializing the authorized attribute of interfaces
		985	*/
		986	static ssize_t interface_authorized_default_store(struct device *dev,
		987	struct device_attribute attr, const char buf, size_t count)
		988	{
		989	struct usb_device *usb_dev = to_usb_device(dev);
		990	struct usb_hcd *hcd = bus_to_hcd(usb_dev->bus);
		991	int rc = count;
		992	bool val;
		993
		994	if (strtobool(buf, &val) != 0)
		995	return -EINVAL;
		996
		997	if (val)
		998	set_bit(HCD_FLAG_INTF_AUTHORIZED, &hcd->flags);
		999	else
		1000	clear_bit(HCD_FLAG_INTF_AUTHORIZED, &hcd->flags);
		1001
		1002	return rc;
		1003	}
		1004	static DEVICE_ATTR_RW(interface_authorized_default);
		1005
		1006	/* Group all the USB bus attributes */
		1007	static struct attribute *usb_bus_attrs[] = {
		1008	&dev_attr_authorized_default.attr,
		1009	&dev_attr_interface_authorized_default.attr,
		1010	NULL,
		1011	};
		1012
		1013	static const struct attribute_group usb_bus_attr_group = {
		1014	.name = NULL, /* we want them in the same directory */
		1015	.attrs = usb_bus_attrs,
		1016	};
		1017
		1018
		1019	static int add_default_authorized_attributes(struct device *dev)
		1020	{
		1021	int rc = 0;
		1022
		1023	if (is_usb_device(dev))
		1024	rc = sysfs_create_group(&dev->kobj, &usb_bus_attr_group);
		1025
		1026	return rc;
		1027	}
		1028
		1029	static void remove_default_authorized_attributes(struct device *dev)
		1030	{
		1031	if (is_usb_device(dev)) {
		1032	sysfs_remove_group(&dev->kobj, &usb_bus_attr_group);
		1033	}
		1034	}
		1035
925	int usb_create_sysfs_dev_files(struct usb_device *udev)	1036	int usb_create_sysfs_dev_files(struct usb_device *udev)
926	{	1037	{
927	struct device *dev = &udev->dev;	1038	struct device *dev = &udev->dev;
@@ -938,7 +1049,14 @@ int usb_create_sysfs_dev_files(struct usb_device *udev) · 10 unmodified lines
938	retval = add_power_attributes(dev);	1049	retval = add_power_attributes(dev);
939	if (retval)	1050	if (retval)
940	goto error;	1051	goto error;
		1052
		1053	if (is_root_hub(udev)) {
		1054	retval = add_default_authorized_attributes(dev);
		1055	if (retval)
		1056	goto error;
		1057	}
941	return retval;	1058	return retval;
		1059
942	error:	1060	error:
943	usb_remove_sysfs_dev_files(udev);	1061	usb_remove_sysfs_dev_files(udev);
944	return retval;	1062	return retval;
@@ -948,6 +1066,9 @@ void usb_remove_sysfs_dev_files(struct usb_device *udev) · 3 unmodified lines
948	{	1066	{
949	struct device *dev = &udev->dev;	1067	struct device *dev = &udev->dev;
950		1068
		1069	if (is_root_hub(udev))
		1070	remove_default_authorized_attributes(dev);
		1071
951	remove_power_attributes(dev);	1072	remove_power_attributes(dev);
952	remove_persist_attributes(dev);	1073	remove_persist_attributes(dev);
953	device_remove_bin_file(dev, &dev_bin_attr_descriptors);	1074	device_remove_bin_file(dev, &dev_bin_attr_descriptors);

drivers/usb/core/usb.h+5−0

 	return dev->type == &usb_port_device_type;
 }
+static inline int is_root_hub(struct usb_device *udev)
+{
+	return (udev->parent == NULL);
+}
 /* Do the same for device drivers and interface drivers. */
 static inline int is_usb_device_driver(struct device_driver *drv)

drivers/usb/host/xhci-rcar.c+7−2

 	 * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
 	 * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
 	 * xhci_gen_setup().
+	 *
+	 * And, since the firmware/internal CPU control the USBSTS.STS_HALT
+	 * and the process speed is down when the roothub port enters U3,
+	 * long delay for the handshake of STS_HALT is neeed in xhci_suspend().
 	 */
 	if (xhci_rcar_is_gen2(hcd->self.controller) ||
-			xhci_rcar_is_gen3(hcd->self.controller))
+			xhci_rcar_is_gen3(hcd->self.controller)) {
-		xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
+		xhci->quirks |= XHCI_NO_64BIT_SUPPORT | XHCI_SLOW_SUSPEND;
+	}
 	if (!xhci_rcar_wait_for_pll_active(hcd))
 		return -ETIMEDOUT;

drivers/usb/host/xhci.c+10−0

@@ -3089,8 +3089,18 @@ static void xhci_endpoint_reset(struct usb_hcd *hcd, · 3088 unmodified lines
3089	return;	3089	return;
3090	udev = (struct usb_device *) host_ep->hcpriv;	3090	udev = (struct usb_device *) host_ep->hcpriv;
3091	vdev = xhci->devs[udev->slot_id];	3091	vdev = xhci->devs[udev->slot_id];
		3092
		3093	/*
		3094	* vdev may be lost due to xHC restore error and re-initialization
		3095	* during S3/S4 resume. A new vdev will be allocated later by
		3096	* xhci_discover_or_reset_device()
		3097	*/
		3098	if (!udev->slot_id \|\| !vdev)
		3099	return;
3092	ep_index = xhci_get_endpoint_index(&host_ep->desc);	3100	ep_index = xhci_get_endpoint_index(&host_ep->desc);
3093	ep = &vdev->eps[ep_index];	3101	ep = &vdev->eps[ep_index];
		3102	if (!ep)
		3103	return;
3094		3104
3095	/* Bail out if toggle is already being cleared by a endpoint reset */	3105	/* Bail out if toggle is already being cleared by a endpoint reset */
3096	if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) {	3106	if (ep->ep_state & EP_HARD_CLEAR_TOGGLE) {

drivers/usb/misc/iowarrior.c+4−3

 	dev = usb_get_intfdata(interface);
 	mutex_lock(&iowarrior_open_disc_lock);
 	usb_set_intfdata(interface, NULL);
+	/* prevent device read, write and ioctl */
+	dev->present = 0;
 	minor = dev->minor;
+	mutex_unlock(&iowarrior_open_disc_lock);
+	/* give back our minor - this will call close() locks need to be dropped at this point*/
-	/* give back our minor */
 	usb_deregister_dev(interface, &iowarrior_class);
 	mutex_lock(&dev->mutex);
 	/* prevent device read, write and ioctl */
-	dev->present = 0;
 	mutex_unlock(&dev->mutex);
-	mutex_unlock(&iowarrior_open_disc_lock);
 	if (dev->opened) {
 		/* There is a process that holds a filedescriptor to the device ,

drivers/usb/misc/rio500.c+27−16

         char *obuf, *ibuf;              /* transfer buffers */
         char bulk_in_ep, bulk_out_ep;   /* Endpoint assignments */
         wait_queue_head_t wait_q;       /* for timeouts */
+	struct mutex lock;          /* general race avoidance */
 };
 static DEFINE_MUTEX(rio500_mutex);
 	/* against disconnect() */
 	mutex_lock(&rio500_mutex);
+	mutex_lock(&(rio->lock));
 	if (rio->isopen || !rio->present) {
+		mutex_unlock(&(rio->lock));
 		mutex_unlock(&rio500_mutex);
 		return -EBUSY;
 	}
 	init_waitqueue_head(&rio->wait_q);
+	mutex_unlock(&(rio->lock));
 	dev_info(&rio->rio_dev->dev, "Rio opened.\n");
 	mutex_unlock(&rio500_mutex);
 	/* against disconnect() */
 	mutex_lock(&rio500_mutex);
+	mutex_lock(&(rio->lock));
 	rio->isopen = 0;
 	if (!rio->present) {
 	} else {
 		dev_info(&rio->rio_dev->dev, "Rio closed.\n");
 	}
+	mutex_unlock(&(rio->lock));
 	mutex_unlock(&rio500_mutex);
 	return 0;
 }
 	int retries;
 	int retval=0;
-	mutex_lock(&rio500_mutex);
+	mutex_lock(&(rio->lock));
         /* Sanity check to make sure rio is connected, powered, etc */
         if (rio->present == 0 || rio->rio_dev == NULL) {
 		retval = -ENODEV;
 err_out:
-	mutex_unlock(&rio500_mutex);
+	mutex_unlock(&(rio->lock));
 	return retval;
 }
 	int errn = 0;
 	int intr;
-	intr = mutex_lock_interruptible(&rio500_mutex);
+	intr = mutex_lock_interruptible(&(rio->lock));
 	if (intr)
 		return -EINTR;
         /* Sanity check to make sure rio is connected, powered, etc */
         if (rio->present == 0 || rio->rio_dev == NULL) {
-		mutex_unlock(&rio500_mutex);
+		mutex_unlock(&(rio->lock));
 		return -ENODEV;
 	}
 				goto error;
 			}
 			if (signal_pending(current)) {
-				mutex_unlock(&rio500_mutex);
+				mutex_unlock(&(rio->lock));
 				return bytes_written ? bytes_written : -EINTR;
 			}
 		buffer += copy_size;
 	} while (count > 0);
-	mutex_unlock(&rio500_mutex);
+	mutex_unlock(&(rio->lock));
 	return bytes_written ? bytes_written : -EIO;
 error:
-	mutex_unlock(&rio500_mutex);
+	mutex_unlock(&(rio->lock));
 	return errn;
 }
 	char *ibuf;
 	int intr;
-	intr = mutex_lock_interruptible(&rio500_mutex);
+	intr = mutex_lock_interruptible(&(rio->lock));
 	if (intr)
 		return -EINTR;
 	/* Sanity check to make sure rio is connected, powered, etc */
         if (rio->present == 0 || rio->rio_dev == NULL) {
-		mutex_unlock(&rio500_mutex);
+		mutex_unlock(&(rio->lock));
 		return -ENODEV;
 	}
 	while (count > 0) {
 		if (signal_pending(current)) {
-			mutex_unlock(&rio500_mutex);
+			mutex_unlock(&(rio->lock));
 			return read_count ? read_count : -EINTR;
 		}
 		if (!rio->rio_dev) {
-			mutex_unlock(&rio500_mutex);
+			mutex_unlock(&(rio->lock));
 			return -ENODEV;
 		}
 		this_read = (count >= IBUF_SIZE) ? IBUF_SIZE : count;
 			count = this_read = partial;
 		} else if (result == -ETIMEDOUT || result == 15) {	/* FIXME: 15 ??? */
 			if (!maxretry--) {
-				mutex_unlock(&rio500_mutex);
+				mutex_unlock(&(rio->lock));
 				dev_err(&rio->rio_dev->dev,
 					"read_rio: maxretry timeout\n");
 				return -ETIME;
 			finish_wait(&rio->wait_q, &wait);
 			continue;
 		} else if (result != -EREMOTEIO) {
-			mutex_unlock(&rio500_mutex);
+			mutex_unlock(&(rio->lock));
 			dev_err(&rio->rio_dev->dev,
 				"Read Whoops - result:%d partial:%u this_read:%u\n",
 				result, partial, this_read);
 			return -EIO;
 		} else {
-			mutex_unlock(&rio500_mutex);
+			mutex_unlock(&(rio->lock));
 			return (0);
 		}
 		if (this_read) {
 			if (copy_to_user(buffer, ibuf, this_read)) {
-				mutex_unlock(&rio500_mutex);
+				mutex_unlock(&(rio->lock));
 				return -EFAULT;
 			}
 			count -= this_read;
 			buffer += this_read;
 		}
 	}
-	mutex_unlock(&rio500_mutex);
+	mutex_unlock(&(rio->lock));
 	return read_count;
 }
 	}
 	dev_dbg(&intf->dev, "ibuf address:%p\n", rio->ibuf);
+	mutex_init(&(rio->lock));
 	usb_set_intfdata (intf, rio);
 	rio->present = 1;
 bail_out:
 	if (rio) {
 		usb_deregister_dev(intf, &usb_rio_class);
+		mutex_lock(&(rio->lock));
 		if (rio->isopen) {
 			rio->isopen = 0;
 			/* better let it finish - the release will do whats needed */
 			rio->rio_dev = NULL;
+			mutex_unlock(&(rio->lock));
 			mutex_unlock(&rio500_mutex);
 			return;
 		}
 		dev_info(&intf->dev, "USB Rio disconnected.\n");
 		rio->present = 0;
+		mutex_unlock(&(rio->lock));
 	}
 	mutex_unlock(&rio500_mutex);
 }

drivers/usb/misc/yurex.c+1−1

 	dev_dbg(&dev->interface->dev, "%s\n", __func__);
-	usb_put_dev(dev->udev);
 	if (dev->cntl_urb) {
 		usb_kill_urb(dev->cntl_urb);
 		kfree(dev->cntl_req);
 				dev->int_buffer, dev->urb->transfer_dma);
 		usb_free_urb(dev->urb);
 	}
+	usb_put_dev(dev->udev);
 	kfree(dev);
 }

drivers/usb/typec/tcpm/tcpm.c+41−17

@@ -379,7 +379,8 @@ static enum tcpm_state tcpm_default_state(struct tcpm_port *port) · 378 unmodified lines
379	return SNK_UNATTACHED;	379	return SNK_UNATTACHED;
380	else if (port->try_role == TYPEC_SOURCE)	380	else if (port->try_role == TYPEC_SOURCE)
381	return SRC_UNATTACHED;	381	return SRC_UNATTACHED;
382	else if (port->tcpc->config->default_role == TYPEC_SINK)	382	else if (port->tcpc->config &&
		383	port->tcpc->config->default_role == TYPEC_SINK)
383	return SNK_UNATTACHED;	384	return SNK_UNATTACHED;
384	/* Fall through to return SRC_UNATTACHED */	385	/* Fall through to return SRC_UNATTACHED */
385	} else if (port->port_type == TYPEC_PORT_SNK) {	386	} else if (port->port_type == TYPEC_PORT_SNK) {
@@ -586,7 +587,20 @@ static void tcpm_debugfs_init(struct tcpm_port *port) · 200 unmodified lines
586		587
587	static void tcpm_debugfs_exit(struct tcpm_port *port)	588	static void tcpm_debugfs_exit(struct tcpm_port *port)
588	{	589	{
		590	int i;
		591
		592	mutex_lock(&port->logbuffer_lock);
		593	for (i = 0; i < LOG_BUFFER_ENTRIES; i++) {
		594	kfree(port->logbuffer[i]);
		595	port->logbuffer[i] = NULL;
		596	}
		597	mutex_unlock(&port->logbuffer_lock);
		598
589	debugfs_remove(port->dentry);	599	debugfs_remove(port->dentry);
		600	if (list_empty(&rootdir->d_subdirs)) {
		601	debugfs_remove(rootdir);
		602	rootdir = NULL;
		603	}
590	}	604	}
591		605
592	#else	606	#else
@@ -1095,7 +1109,8 @@ static int tcpm_pd_svdm(struct tcpm_port port, const __le32 payload, int cnt, · 502 unmodified lines
1095	break;	1109	break;
1096	case CMD_ATTENTION:	1110	case CMD_ATTENTION:
1097	/* Attention command does not have response */	1111	/* Attention command does not have response */
1098	typec_altmode_attention(adev, p[1]);	1112	if (adev)
		1113	typec_altmode_attention(adev, p[1]);
1099	return 0;	1114	return 0;
1100	default:	1115	default:
1101	break;	1116	break;
@@ -1147,20 +1162,26 @@ static int tcpm_pd_svdm(struct tcpm_port port, const __le32 payload, int cnt, · 45 unmodified lines
1147	}	1162	}
1148	break;	1163	break;
1149	case CMD_ENTER_MODE:	1164	case CMD_ENTER_MODE:
1150	typec_altmode_update_active(pdev, true);	1165	if (adev && pdev) {
1151		1166	typec_altmode_update_active(pdev, true);
1152	if (typec_altmode_vdm(adev, p[0], &p[1], cnt)) {	1167
1153	response[0] = VDO(adev->svid, 1, CMD_EXIT_MODE);	1168	if (typec_altmode_vdm(adev, p[0], &p[1], cnt)) {
1154	response[0] \|= VDO_OPOS(adev->mode);	1169	response[0] = VDO(adev->svid, 1,
1155	return 1;	1170	CMD_EXIT_MODE);
		1171	response[0] \|= VDO_OPOS(adev->mode);
		1172	return 1;
		1173	}
1156	}	1174	}
1157	return 0;	1175	return 0;
1158	case CMD_EXIT_MODE:	1176	case CMD_EXIT_MODE:
1159	typec_altmode_update_active(pdev, false);	1177	if (adev && pdev) {
		1178	typec_altmode_update_active(pdev, false);
1160		1179
1161	/* Back to USB Operation */	1180	/* Back to USB Operation */
1162	WARN_ON(typec_altmode_notify(adev, TYPEC_STATE_USB,	1181	WARN_ON(typec_altmode_notify(adev,
1163	NULL));	1182	TYPEC_STATE_USB,
		1183	NULL));
		1184	}
1164	break;	1185	break;
1165	default:	1186	default:
1166	break;	1187	break;
@@ -1170,8 +1191,10 @@ static int tcpm_pd_svdm(struct tcpm_port port, const __le32 payload, int cnt, · 3 unmodified lines
1170	switch (cmd) {	1191	switch (cmd) {
1171	case CMD_ENTER_MODE:	1192	case CMD_ENTER_MODE:
1172	/* Back to USB Operation */	1193	/* Back to USB Operation */
1173	WARN_ON(typec_altmode_notify(adev, TYPEC_STATE_USB,	1194	if (adev)
1174	NULL));	1195	WARN_ON(typec_altmode_notify(adev,
		1196	TYPEC_STATE_USB,
		1197	NULL));
1175	break;	1198	break;
1176	default:	1199	default:
1177	break;	1200	break;
@@ -1182,7 +1205,8 @@ static int tcpm_pd_svdm(struct tcpm_port port, const __le32 payload, int cnt, · 4 unmodified lines
1182	}	1205	}
1183		1206
1184	/* Informing the alternate mode drivers about everything */	1207	/* Informing the alternate mode drivers about everything */
1185	typec_altmode_vdm(adev, p[0], &p[1], cnt);	1208	if (adev)
		1209	typec_altmode_vdm(adev, p[0], &p[1], cnt);
1186		1210
1187	return rlen;	1211	return rlen;
1188	}	1212	}
@@ -4114,7 +4138,7 @@ static int tcpm_try_role(const struct typec_capability *cap, int role) · 2925 unmodified lines
4114	mutex_lock(&port->lock);	4138	mutex_lock(&port->lock);
4115	if (tcpc->try_role)	4139	if (tcpc->try_role)
4116	ret = tcpc->try_role(tcpc, role);	4140	ret = tcpc->try_role(tcpc, role);
4117	if (!ret && !tcpc->config->try_role_hw)	4141	if (!ret && (!tcpc->config \|\| !tcpc->config->try_role_hw))
4118	port->try_role = role;	4142	port->try_role = role;
4119	port->try_src_count = 0;	4143	port->try_src_count = 0;
4120	port->try_snk_count = 0;	4144	port->try_snk_count = 0;
@@ -4701,7 +4725,7 @@ static int tcpm_copy_caps(struct tcpm_port *port, · 580 unmodified lines
4701	port->typec_caps.prefer_role = tcfg->default_role;	4725	port->typec_caps.prefer_role = tcfg->default_role;
4702	port->typec_caps.type = tcfg->type;	4726	port->typec_caps.type = tcfg->type;
4703	port->typec_caps.data = tcfg->data;	4727	port->typec_caps.data = tcfg->data;
4704	port->self_powered = port->tcpc->config->self_powered;	4728	port->self_powered = tcfg->self_powered;
4705		4729
4706	return 0;	4730	return 0;
4707	}	4731	}

drivers/usb/typec/ucsi/ucsi_ccg.c+1−1

@@ -1018,7 +1018,7 @@ release_fw: · 1017 unmodified lines
1018	******************************************************************************/	1018	******************************************************************************/
1019	static int ccg_fw_update(struct ucsi_ccg *uc, enum enum_flash_mode flash_mode)	1019	static int ccg_fw_update(struct ucsi_ccg *uc, enum enum_flash_mode flash_mode)
1020	{	1020	{
1021	int err;	1021	int err = 0;
1022		1022
1023	while (flash_mode != FLASH_NOT_NEEDED) {	1023	while (flash_mode != FLASH_NOT_NEEDED) {
1024	err = do_flash(uc, flash_mode);	1024	err = do_flash(uc, flash_mode);

drivers/vhost/vhost.h+1−1

@@ -96,7 +96,7 @@ struct vhost_uaddr { · 95 unmodified lines
96	};	96	};
97		97
98	#if defined(CONFIG_MMU_NOTIFIER) && ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE == 0	98	#if defined(CONFIG_MMU_NOTIFIER) && ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE == 0
99	#define VHOST_ARCH_CAN_ACCEL_UACCESS 1	99	#define VHOST_ARCH_CAN_ACCEL_UACCESS 0
100	#else	100	#else
101	#define VHOST_ARCH_CAN_ACCEL_UACCESS 0	101	#define VHOST_ARCH_CAN_ACCEL_UACCESS 0
102	#endif	102	#endif

drivers/video/fbdev/omap/omapfb_main.c+8−0

 		return 0;
 	case 12:
 		var->bits_per_pixel = 16;
+		/* fall through */
 	case 16:
 		if (plane->fbdev->panel->bpp == 12)
 			plane->color_mode = OMAPFB_COLOR_RGB444;
 	case OMAPFB_ACTIVE:
 		for (i = 0; i < fbdev->mem_desc.region_cnt; i++)
 			unregister_framebuffer(fbdev->fb_info[i]);
+		/* fall through */
 	case 7:
 		omapfb_unregister_sysfs(fbdev);
+		/* fall through */
 	case 6:
 		if (fbdev->panel->disable)
 			fbdev->panel->disable(fbdev->panel);
+		/* fall through */
 	case 5:
 		omapfb_set_update_mode(fbdev, OMAPFB_UPDATE_DISABLED);
+		/* fall through */
 	case 4:
 		planes_cleanup(fbdev);
+		/* fall through */
 	case 3:
 		ctrl_cleanup(fbdev);
+		/* fall through */
 	case 2:
 		if (fbdev->panel->cleanup)
 			fbdev->panel->cleanup(fbdev->panel);
+		/* fall through */
 	case 1:
 		dev_set_drvdata(fbdev->dev, NULL);
 		kfree(fbdev);

drivers/watchdog/ar7_wdt.c+1−0

@@ -235,6 +235,7 @@ static long ar7_wdt_ioctl(struct file *file, · 234 unmodified lines
235	ar7_wdt_update_margin(new_margin);	235	ar7_wdt_update_margin(new_margin);
236	ar7_wdt_kick(1);	236	ar7_wdt_kick(1);
237	spin_unlock(&wdt_lock);	237	spin_unlock(&wdt_lock);
		238	/* Fall through */
238		239
239	case WDIOC_GETTIMEOUT:	240	case WDIOC_GETTIMEOUT:
240	if (put_user(margin, (int *)arg))	241	if (put_user(margin, (int *)arg))

drivers/watchdog/pcwd.c+1−1

@@ -651,7 +651,7 @@ static long pcwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 650 unmodified lines
651	return -EINVAL;	651	return -EINVAL;
652		652
653	pcwd_keepalive();	653	pcwd_keepalive();
654	/* Fall */	654	/* Fall through */
655		655
656	case WDIOC_GETTIMEOUT:	656	case WDIOC_GETTIMEOUT:
657	return put_user(heartbeat, argp);	657	return put_user(heartbeat, argp);

drivers/watchdog/riowd.c+1−1

@@ -134,7 +134,7 @@ static long riowd_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) · 133 unmodified lines
134	return -EINVAL;	134	return -EINVAL;
135	riowd_timeout = (new_margin + 59) / 60;	135	riowd_timeout = (new_margin + 59) / 60;
136	riowd_writereg(p, riowd_timeout, WDTO_INDEX);	136	riowd_writereg(p, riowd_timeout, WDTO_INDEX);
137	/* Fall */	137	/* Fall through */
138		138
139	case WDIOC_GETTIMEOUT:	139	case WDIOC_GETTIMEOUT:
140	return put_user(riowd_timeout * 60, (int __user *)argp);	140	return put_user(riowd_timeout * 60, (int __user *)argp);

drivers/watchdog/sb_wdog.c+1−0

@@ -202,6 +202,7 @@ static long sbwdog_ioctl(struct file *file, unsigned int cmd, · 201 unmodified lines
202	timeout = time;	202	timeout = time;
203	sbwdog_set(user_dog, timeout);	203	sbwdog_set(user_dog, timeout);
204	sbwdog_pet(user_dog);	204	sbwdog_pet(user_dog);
		205	/* Fall through */
205		206
206	case WDIOC_GETTIMEOUT:	207	case WDIOC_GETTIMEOUT:
207	/*	208	/*

drivers/watchdog/scx200_wdt.c+1−0

@@ -186,6 +186,7 @@ static long scx200_wdt_ioctl(struct file *file, unsigned int cmd, · 185 unmodified lines
186	margin = new_margin;	186	margin = new_margin;
187	scx200_wdt_update_margin();	187	scx200_wdt_update_margin();
188	scx200_wdt_ping();	188	scx200_wdt_ping();
		189	/* Fall through */
189	case WDIOC_GETTIMEOUT:	190	case WDIOC_GETTIMEOUT:
190	if (put_user(margin, p))	191	if (put_user(margin, p))
191	return -EFAULT;	192	return -EFAULT;

drivers/watchdog/wdt.c+1−1

@@ -389,7 +389,7 @@ static long wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 388 unmodified lines
389	if (wdt_set_heartbeat(new_heartbeat))	389	if (wdt_set_heartbeat(new_heartbeat))
390	return -EINVAL;	390	return -EINVAL;
391	wdt_ping();	391	wdt_ping();
392	/* Fall */	392	/* Fall through */
393	case WDIOC_GETTIMEOUT:	393	case WDIOC_GETTIMEOUT:
394	return put_user(heartbeat, p);	394	return put_user(heartbeat, p);
395	default:	395	default:

drivers/watchdog/wdt977.c+1−1

@@ -398,7 +398,7 @@ static long wdt977_ioctl(struct file *file, unsigned int cmd, · 397 unmodified lines
398	return -EINVAL;	398	return -EINVAL;
399		399
400	wdt977_keepalive();	400	wdt977_keepalive();
401	/* Fall */	401	/* Fall through */
402		402
403	case WDIOC_GETTIMEOUT:	403	case WDIOC_GETTIMEOUT:
404	return put_user(timeout, uarg.i);	404	return put_user(timeout, uarg.i);

drivers/xen/gntdev.c+1−1

@@ -1143,7 +1143,7 @@ static int gntdev_mmap(struct file flip, struct vm_area_struct vma) · 1142 unmodified lines
1143	goto out_put_map;	1143	goto out_put_map;
1144		1144
1145	if (!use_ptemod) {	1145	if (!use_ptemod) {
1146	err = vm_map_pages(vma, map->pages, map->count);	1146	err = vm_map_pages_zero(vma, map->pages, map->count);
1147	if (err)	1147	if (err)
1148	goto out_put_map;	1148	goto out_put_map;
1149	} else {	1149	} else {

drivers/xen/privcmd.c+5−30

@@ -724,25 +724,6 @@ static long privcmd_ioctl_restrict(struct file file, void __user udata) · 723 unmodified lines
724	return 0;	724	return 0;
725	}	725	}
726		726
727	struct remap_pfn {
728	struct mm_struct *mm;
729	struct page **pages;
730	pgprot_t prot;
731	unsigned long i;
732	};
733
734	static int remap_pfn_fn(pte_t ptep, unsigned long addr, void data)
735	{
736	struct remap_pfn *r = data;
737	struct page *page = r->pages[r->i];
738	pte_t pte = pte_mkspecial(pfn_pte(page_to_pfn(page), r->prot));
739
740	set_pte_at(r->mm, addr, ptep, pte);
741	r->i++;
742
743	return 0;
744	}
745
746	static long privcmd_ioctl_mmap_resource(struct file file, void __user udata)	727	static long privcmd_ioctl_mmap_resource(struct file file, void __user udata)
747	{	728	{
748	struct privcmd_data *data = file->private_data;	729	struct privcmd_data *data = file->private_data;
@@ -774,7 +755,8 @@ static long privcmd_ioctl_mmap_resource(struct file file, void __user udata) · 25 unmodified lines
774	goto out;	755	goto out;
775	}	756	}
776		757
777	if (xen_feature(XENFEAT_auto_translated_physmap)) {	758	if (IS_ENABLED(CONFIG_XEN_AUTO_XLATE) &&
		759	xen_feature(XENFEAT_auto_translated_physmap)) {
778	unsigned int nr = DIV_ROUND_UP(kdata.num, XEN_PFN_PER_PAGE);	760	unsigned int nr = DIV_ROUND_UP(kdata.num, XEN_PFN_PER_PAGE);
779	struct page **pages;	761	struct page **pages;
780	unsigned int i;	762	unsigned int i;
@@ -808,16 +790,9 @@ static long privcmd_ioctl_mmap_resource(struct file file, void __user udata) · 27 unmodified lines
808	if (rc)	790	if (rc)
809	goto out;	791	goto out;
810		792
811	if (xen_feature(XENFEAT_auto_translated_physmap)) {	793	if (IS_ENABLED(CONFIG_XEN_AUTO_XLATE) &&
812	struct remap_pfn r = {	794	xen_feature(XENFEAT_auto_translated_physmap)) {
813	.mm = vma->vm_mm,	795	rc = xen_remap_vma_range(vma, kdata.addr, kdata.num << PAGE_SHIFT);
814	.pages = vma->vm_private_data,
815	.prot = vma->vm_page_prot,
816	};
817
818	rc = apply_to_page_range(r.mm, kdata.addr,
819	kdata.num << PAGE_SHIFT,
820	remap_pfn_fn, &r);
821	} else {	796	} else {
822	unsigned int domid =	797	unsigned int domid =
823	(xdata.flags & XENMEM_rsrc_acq_caller_owned) ?	798	(xdata.flags & XENMEM_rsrc_acq_caller_owned) ?

drivers/xen/swiotlb-xen.c+10−24

 	return xen_phys_to_bus(virt_to_phys(address));
 }
-static int check_pages_physically_contiguous(unsigned long xen_pfn,
+static inline int range_straddles_page_boundary(phys_addr_t p, size_t size)
-					     unsigned int offset,
-					     size_t length)
 {
-	unsigned long next_bfn;
+	unsigned long next_bfn, xen_pfn = XEN_PFN_DOWN(p);
-	int i;
+	unsigned int i, nr_pages = XEN_PFN_UP(xen_offset_in_page(p) + size);
-	int nr_pages;
 	next_bfn = pfn_to_bfn(xen_pfn);
-	nr_pages = (offset + length + XEN_PAGE_SIZE-1) >> XEN_PAGE_SHIFT;
-	for (i = 1; i < nr_pages; i++) {
+	for (i = 1; i < nr_pages; i++)
 		if (pfn_to_bfn(++xen_pfn) != ++next_bfn)
-			return 0;
+			return 1;
-	}
-	return 1;
-}
-static inline int range_straddles_page_boundary(phys_addr_t p, size_t size)
+	return 0;
-{
-	unsigned long xen_pfn = XEN_PFN_DOWN(p);
-	unsigned int offset = p & ~XEN_PAGE_MASK;
-	if (offset + size <= XEN_PAGE_SIZE)
-		return 0;
-	if (check_pages_physically_contiguous(xen_pfn, offset, size))
-		return 0;
-	return 1;
 }
 static int is_xen_swiotlb_buffer(dma_addr_t dma_addr)
 			xen_free_coherent_pages(hwdev, size, ret, (dma_addr_t)phys, attrs);
 			return NULL;
 		}
+		SetPageXenRemapped(virt_to_page(ret));
 	}
 	memset(ret, 0, size);
 	return ret;
 	/* Convert the size to actually allocated. */
 	size = 1UL << (order + XEN_PAGE_SHIFT);
-	if (((dev_addr + size - 1 <= dma_mask)) ||
+	if (!WARN_ON((dev_addr + size - 1 > dma_mask) ||
-	    range_straddles_page_boundary(phys, size))
+		     range_straddles_page_boundary(phys, size)) &&
+	    TestClearPageXenRemapped(virt_to_page(vaddr)))
 		xen_destroy_contiguous_region(phys, order);
 	xen_free_coherent_pages(hwdev, size, vaddr, (dma_addr_t)phys, attrs);

drivers/xen/xen-pciback/conf_space_capability.c+1−2

 {
 	int err;
 	u16 old_value;
-	pci_power_t new_state, old_state;
+	pci_power_t new_state;
 	err = pci_read_config_word(dev, offset, &old_value);
 	if (err)
 		goto out;
-	old_state = (pci_power_t)(old_value & PCI_PM_CTRL_STATE_MASK);
 	new_state = (pci_power_t)(new_value & PCI_PM_CTRL_STATE_MASK);
 	new_value &= PM_OK_BITS;

drivers/xen/xlate_mmu.c+32−0

@@ -262,3 +262,35 @@ int __init xen_xlate_map_ballooned_pages(xen_pfn_t gfns, void virt, · 261 unmodified lines
262	return 0;	262	return 0;
263	}	263	}
264	EXPORT_SYMBOL_GPL(xen_xlate_map_ballooned_pages);	264	EXPORT_SYMBOL_GPL(xen_xlate_map_ballooned_pages);
		265
		266	struct remap_pfn {
		267	struct mm_struct *mm;
		268	struct page **pages;
		269	pgprot_t prot;
		270	unsigned long i;
		271	};
		272
		273	static int remap_pfn_fn(pte_t ptep, unsigned long addr, void data)
		274	{
		275	struct remap_pfn *r = data;
		276	struct page *page = r->pages[r->i];
		277	pte_t pte = pte_mkspecial(pfn_pte(page_to_pfn(page), r->prot));
		278
		279	set_pte_at(r->mm, addr, ptep, pte);
		280	r->i++;
		281
		282	return 0;
		283	}
		284
		285	/* Used by the privcmd module, but has to be built-in on ARM */
		286	int xen_remap_vma_range(struct vm_area_struct *vma, unsigned long addr, unsigned long len)
		287	{
		288	struct remap_pfn r = {
		289	.mm = vma->vm_mm,
		290	.pages = vma->vm_private_data,
		291	.prot = vma->vm_page_prot,
		292	};
		293
		294	return apply_to_page_range(vma->vm_mm, addr, len, remap_pfn_fn, &r);
		295	}
		296	EXPORT_SYMBOL_GPL(xen_remap_vma_range);

fs/block_dev.c+73−40

@@ -349,7 +349,7 @@ __blkdev_direct_IO(struct kiocb iocb, struct iov_iter iter, int nr_pages) · 348 unmodified lines
349	loff_t pos = iocb->ki_pos;	349	loff_t pos = iocb->ki_pos;
350	blk_qc_t qc = BLK_QC_T_NONE;	350	blk_qc_t qc = BLK_QC_T_NONE;
351	gfp_t gfp;	351	gfp_t gfp;
352	ssize_t ret;	352	int ret;
353		353
354	if ((pos \| iov_iter_alignment(iter)) &	354	if ((pos \| iov_iter_alignment(iter)) &
355	(bdev_logical_block_size(bdev) - 1))	355	(bdev_logical_block_size(bdev) - 1))
@@ -386,8 +386,6 @@ __blkdev_direct_IO(struct kiocb iocb, struct iov_iter iter, int nr_pages) · 30 unmodified lines
386		386
387	ret = 0;	387	ret = 0;
388	for (;;) {	388	for (;;) {
389	int err;
390
391	bio_set_dev(bio, bdev);	389	bio_set_dev(bio, bdev);
392	bio->bi_iter.bi_sector = pos >> 9;	390	bio->bi_iter.bi_sector = pos >> 9;
393	bio->bi_write_hint = iocb->ki_hint;	391	bio->bi_write_hint = iocb->ki_hint;
@@ -395,10 +393,8 @@ __blkdev_direct_IO(struct kiocb iocb, struct iov_iter iter, int nr_pages) · 1 unmodified line
395	bio->bi_end_io = blkdev_bio_end_io;	393	bio->bi_end_io = blkdev_bio_end_io;
396	bio->bi_ioprio = iocb->ki_ioprio;	394	bio->bi_ioprio = iocb->ki_ioprio;
397		395
398	err = bio_iov_iter_get_pages(bio, iter);	396	ret = bio_iov_iter_get_pages(bio, iter);
399	if (unlikely(err)) {	397	if (unlikely(ret)) {
400	if (!ret)
401	ret = err;
402	bio->bi_status = BLK_STS_IOERR;	398	bio->bi_status = BLK_STS_IOERR;
403	bio_endio(bio);	399	bio_endio(bio);
404	break;	400	break;
@@ -421,7 +417,6 @@ __blkdev_direct_IO(struct kiocb iocb, struct iov_iter iter, int nr_pages) · 16 unmodified lines
421	if (nowait)	417	if (nowait)
422	bio->bi_opf \|= (REQ_NOWAIT \| REQ_NOWAIT_INLINE);	418	bio->bi_opf \|= (REQ_NOWAIT \| REQ_NOWAIT_INLINE);
423		419
424	dio->size += bio->bi_iter.bi_size;
425	pos += bio->bi_iter.bi_size;	420	pos += bio->bi_iter.bi_size;
426		421
427	nr_pages = iov_iter_npages(iter, BIO_MAX_PAGES);	422	nr_pages = iov_iter_npages(iter, BIO_MAX_PAGES);
@@ -433,10 +428,11 @@ __blkdev_direct_IO(struct kiocb iocb, struct iov_iter iter, int nr_pages) · 5 unmodified lines
433	polled = true;	428	polled = true;
434	}	429	}
435		430
		431	dio->size += bio->bi_iter.bi_size;
436	qc = submit_bio(bio);	432	qc = submit_bio(bio);
437	if (qc == BLK_QC_T_EAGAIN) {	433	if (qc == BLK_QC_T_EAGAIN) {
438	if (!ret)	434	dio->size -= bio->bi_iter.bi_size;
439	ret = -EAGAIN;	435	ret = -EAGAIN;
440	goto error;	436	goto error;
441	}	437	}
442		438
@@ -459,18 +455,17 @@ __blkdev_direct_IO(struct kiocb iocb, struct iov_iter iter, int nr_pages) · 16 unmodified lines
459	atomic_inc(&dio->ref);	455	atomic_inc(&dio->ref);
460	}	456	}
461		457
		458	dio->size += bio->bi_iter.bi_size;
462	qc = submit_bio(bio);	459	qc = submit_bio(bio);
463	if (qc == BLK_QC_T_EAGAIN) {	460	if (qc == BLK_QC_T_EAGAIN) {
464	if (!ret)	461	dio->size -= bio->bi_iter.bi_size;
465	ret = -EAGAIN;	462	ret = -EAGAIN;
466	goto error;	463	goto error;
467	}	464	}
468	ret += bio->bi_iter.bi_size;
469		465
470	bio = bio_alloc(gfp, nr_pages);	466	bio = bio_alloc(gfp, nr_pages);
471	if (!bio) {	467	if (!bio) {
472	if (!ret)	468	ret = -EAGAIN;
473	ret = -EAGAIN;
474	goto error;	469	goto error;
475	}	470	}
476	}	471	}
@@ -495,6 +490,8 @@ __blkdev_direct_IO(struct kiocb iocb, struct iov_iter iter, int nr_pages) · 18 unmodified lines
495	out:	490	out:
496	if (!ret)	491	if (!ret)
497	ret = blk_status_to_errno(dio->bio.bi_status);	492	ret = blk_status_to_errno(dio->bio.bi_status);
		493	if (likely(!ret))
		494	ret = dio->size;
498		495
499	bio_put(&dio->bio);	496	bio_put(&dio->bio);
500	return ret;	497	return ret;
@@ -1181,8 +1178,7 @@ static struct gendisk bdev_get_gendisk(struct block_device bdev, int *partno) · 680 unmodified lines
1181	* Pointer to the block device containing @bdev on success, ERR_PTR()	1178	* Pointer to the block device containing @bdev on success, ERR_PTR()
1182	* value on failure.	1179	* value on failure.
1183	*/	1180	*/
1184	static struct block_device bd_start_claiming(struct block_device bdev,	1181	struct block_device bd_start_claiming(struct block_device bdev, void *holder)
1185	void *holder)
1186	{	1182	{
1187	struct gendisk *disk;	1183	struct gendisk *disk;
1188	struct block_device *whole;	1184	struct block_device *whole;
@@ -1229,6 +1225,62 @@ static struct block_device bd_start_claiming(struct block_device bdev, · 40 unmodified lines
1229	return ERR_PTR(err);	1225	return ERR_PTR(err);
1230	}	1226	}
1231	}	1227	}
		1228	EXPORT_SYMBOL(bd_start_claiming);
		1229
		1230	static void bd_clear_claiming(struct block_device whole, void holder)
		1231	{
		1232	lockdep_assert_held(&bdev_lock);
		1233	/* tell others that we're done */
		1234	BUG_ON(whole->bd_claiming != holder);
		1235	whole->bd_claiming = NULL;
		1236	wake_up_bit(&whole->bd_claiming, 0);
		1237	}
		1238
		1239	/**
		1240	* bd_finish_claiming - finish claiming of a block device
		1241	* @bdev: block device of interest
		1242	* @whole: whole block device (returned from bd_start_claiming())
		1243	* @holder: holder that has claimed @bdev
		1244	*
		1245	* Finish exclusive open of a block device. Mark the device as exlusively
		1246	* open by the holder and wake up all waiters for exclusive open to finish.
		1247	*/
		1248	void bd_finish_claiming(struct block_device bdev, struct block_device whole,
		1249	void *holder)
		1250	{
		1251	spin_lock(&bdev_lock);
		1252	BUG_ON(!bd_may_claim(bdev, whole, holder));
		1253	/*
		1254	* Note that for a whole device bd_holders will be incremented twice,
		1255	* and bd_holder will be set to bd_may_claim before being set to holder
		1256	*/
		1257	whole->bd_holders++;
		1258	whole->bd_holder = bd_may_claim;
		1259	bdev->bd_holders++;
		1260	bdev->bd_holder = holder;
		1261	bd_clear_claiming(whole, holder);
		1262	spin_unlock(&bdev_lock);
		1263	}
		1264	EXPORT_SYMBOL(bd_finish_claiming);
		1265
		1266	/**
		1267	* bd_abort_claiming - abort claiming of a block device
		1268	* @bdev: block device of interest
		1269	* @whole: whole block device (returned from bd_start_claiming())
		1270	* @holder: holder that has claimed @bdev
		1271	*
		1272	* Abort claiming of a block device when the exclusive open failed. This can be
		1273	* also used when exclusive open is not actually desired and we just needed
		1274	* to block other exclusive openers for a while.
		1275	*/
		1276	void bd_abort_claiming(struct block_device bdev, struct block_device whole,
		1277	void *holder)
		1278	{
		1279	spin_lock(&bdev_lock);
		1280	bd_clear_claiming(whole, holder);
		1281	spin_unlock(&bdev_lock);
		1282	}
		1283	EXPORT_SYMBOL(bd_abort_claiming);
1232		1284
1233	#ifdef CONFIG_SYSFS	1285	#ifdef CONFIG_SYSFS
1234	struct bd_holder_disk {	1286	struct bd_holder_disk {
@@ -1698,29 +1750,10 @@ int blkdev_get(struct block_device bdev, fmode_t mode, void holder) · 463 unmodified lines
1698		1750
1699	/* finish claiming */	1751	/* finish claiming */
1700	mutex_lock(&bdev->bd_mutex);	1752	mutex_lock(&bdev->bd_mutex);
1701	spin_lock(&bdev_lock);	1753	if (!res)
1702		1754	bd_finish_claiming(bdev, whole, holder);
1703	if (!res) {	1755	else
1704	BUG_ON(!bd_may_claim(bdev, whole, holder));	1756	bd_abort_claiming(bdev, whole, holder);
1705	/*
1706	* Note that for a whole device bd_holders
1707	* will be incremented twice, and bd_holder
1708	* will be set to bd_may_claim before being
1709	* set to holder
1710	*/
1711	whole->bd_holders++;
1712	whole->bd_holder = bd_may_claim;
1713	bdev->bd_holders++;
1714	bdev->bd_holder = holder;
1715	}
1716
1717	/* tell others that we're done */
1718	BUG_ON(whole->bd_claiming != holder);
1719	whole->bd_claiming = NULL;
1720	wake_up_bit(&whole->bd_claiming, 0);
1721
1722	spin_unlock(&bdev_lock);
1723
1724	/*	1757	/*
1725	* Block event polling for write claims if requested. Any	1758	* Block event polling for write claims if requested. Any
1726	* write holder makes the write_holder state stick until	1759	* write holder makes the write_holder state stick until

fs/btrfs/backref.c+1−1

@@ -1483,7 +1483,7 @@ int btrfs_check_shared(struct btrfs_root *root, u64 inum, u64 bytenr, · 1482 unmodified lines
1483	ulist_init(roots);	1483	ulist_init(roots);
1484	ulist_init(tmp);	1484	ulist_init(tmp);
1485		1485
1486	trans = btrfs_attach_transaction(root);	1486	trans = btrfs_join_transaction_nostart(root);
1487	if (IS_ERR(trans)) {	1487	if (IS_ERR(trans)) {
1488	if (PTR_ERR(trans) != -ENOENT && PTR_ERR(trans) != -EROFS) {	1488	if (PTR_ERR(trans) != -ENOENT && PTR_ERR(trans) != -EROFS) {
1489	ret = PTR_ERR(trans);	1489	ret = PTR_ERR(trans);

fs/btrfs/send.c+15−62

@@ -6322,68 +6322,21 @@ static int changed_extent(struct send_ctx *sctx, · 6321 unmodified lines
6322	{	6322	{
6323	int ret = 0;	6323	int ret = 0;
6324		6324
6325	if (sctx->cur_ino != sctx->cmp_key->objectid) {	6325	/*
6326		6326	* We have found an extent item that changed without the inode item
6327	if (result == BTRFS_COMPARE_TREE_CHANGED) {	6327	* having changed. This can happen either after relocation (where the
6328	struct extent_buffer *leaf_l;	6328	* disk_bytenr of an extent item is replaced at
6329	struct extent_buffer *leaf_r;	6329	* relocation.c:replace_file_extents()) or after deduplication into a
6330	struct btrfs_file_extent_item *ei_l;	6330	* file in both the parent and send snapshots (where an extent item can
6331	struct btrfs_file_extent_item *ei_r;	6331	* get modified or replaced with a new one). Note that deduplication
6332		6332	* updates the inode item, but it only changes the iversion (sequence
6333	leaf_l = sctx->left_path->nodes[0];	6333	* field in the inode item) of the inode, so if a file is deduplicated
6334	leaf_r = sctx->right_path->nodes[0];	6334	* the same amount of times in both the parent and send snapshots, its
6335	ei_l = btrfs_item_ptr(leaf_l,	6335	* iversion becames the same in both snapshots, whence the inode item is
6336	sctx->left_path->slots[0],	6336	* the same on both snapshots.
6337	struct btrfs_file_extent_item);	6337	*/
6338	ei_r = btrfs_item_ptr(leaf_r,	6338	if (sctx->cur_ino != sctx->cmp_key->objectid)
6339	sctx->right_path->slots[0],	6339	return 0;
6340	struct btrfs_file_extent_item);
6341
6342	/*
6343	* We may have found an extent item that has changed
6344	* only its disk_bytenr field and the corresponding
6345	* inode item was not updated. This case happens due to
6346	* very specific timings during relocation when a leaf
6347	* that contains file extent items is COWed while
6348	* relocation is ongoing and its in the stage where it
6349	* updates data pointers. So when this happens we can
6350	* safely ignore it since we know it's the same extent,
6351	* but just at different logical and physical locations
6352	* (when an extent is fully replaced with a new one, we
6353	* know the generation number must have changed too,
6354	* since snapshot creation implies committing the current
6355	* transaction, and the inode item must have been updated
6356	* as well).
6357	* This replacement of the disk_bytenr happens at
6358	* relocation.c:replace_file_extents() through
6359	* relocation.c:btrfs_reloc_cow_block().
6360	*/
6361	if (btrfs_file_extent_generation(leaf_l, ei_l) ==
6362	btrfs_file_extent_generation(leaf_r, ei_r) &&
6363	btrfs_file_extent_ram_bytes(leaf_l, ei_l) ==
6364	btrfs_file_extent_ram_bytes(leaf_r, ei_r) &&
6365	btrfs_file_extent_compression(leaf_l, ei_l) ==
6366	btrfs_file_extent_compression(leaf_r, ei_r) &&
6367	btrfs_file_extent_encryption(leaf_l, ei_l) ==
6368	btrfs_file_extent_encryption(leaf_r, ei_r) &&
6369	btrfs_file_extent_other_encoding(leaf_l, ei_l) ==
6370	btrfs_file_extent_other_encoding(leaf_r, ei_r) &&
6371	btrfs_file_extent_type(leaf_l, ei_l) ==
6372	btrfs_file_extent_type(leaf_r, ei_r) &&
6373	btrfs_file_extent_disk_bytenr(leaf_l, ei_l) !=
6374	btrfs_file_extent_disk_bytenr(leaf_r, ei_r) &&
6375	btrfs_file_extent_disk_num_bytes(leaf_l, ei_l) ==
6376	btrfs_file_extent_disk_num_bytes(leaf_r, ei_r) &&
6377	btrfs_file_extent_offset(leaf_l, ei_l) ==
6378	btrfs_file_extent_offset(leaf_r, ei_r) &&
6379	btrfs_file_extent_num_bytes(leaf_l, ei_l) ==
6380	btrfs_file_extent_num_bytes(leaf_r, ei_r))
6381	return 0;
6382	}
6383
6384	inconsistent_snapshot_error(sctx, result, "extent");
6385	return -EIO;
6386	}
6387		6340
6388	if (!sctx->cur_inode_new_gen && !sctx->cur_inode_deleted) {	6341	if (!sctx->cur_inode_new_gen && !sctx->cur_inode_deleted) {
6389	if (result != BTRFS_COMPARE_TREE_DELETED)	6342	if (result != BTRFS_COMPARE_TREE_DELETED)

fs/btrfs/transaction.c+28−4

 	[TRANS_STATE_COMMIT_START]	= (__TRANS_START | __TRANS_ATTACH),
 	[TRANS_STATE_COMMIT_DOING]	= (__TRANS_START |
 					   __TRANS_ATTACH |
-					   __TRANS_JOIN),
+					   __TRANS_JOIN |
+					   __TRANS_JOIN_NOSTART),
 	[TRANS_STATE_UNBLOCKED]		= (__TRANS_START |
 					   __TRANS_ATTACH |
 					   __TRANS_JOIN |
-					   __TRANS_JOIN_NOLOCK),
+					   __TRANS_JOIN_NOLOCK |
+					   __TRANS_JOIN_NOSTART),
 	[TRANS_STATE_COMPLETED]		= (__TRANS_START |
 					   __TRANS_ATTACH |
 					   __TRANS_JOIN |
-					   __TRANS_JOIN_NOLOCK),
+					   __TRANS_JOIN_NOLOCK |
+					   __TRANS_JOIN_NOSTART),
 };
 void btrfs_put_transaction(struct btrfs_transaction *transaction)
 		ret = join_transaction(fs_info, type);
 		if (ret == -EBUSY) {
 			wait_current_trans(fs_info);
-			if (unlikely(type == TRANS_ATTACH))
+			if (unlikely(type == TRANS_ATTACH ||
+				     type == TRANS_JOIN_NOSTART))
 				ret = -ENOENT;
 		}
 	} while (ret == -EBUSY);
 				 BTRFS_RESERVE_NO_FLUSH, true);
 }
+/*
+ * Similar to regular join but it never starts a transaction when none is
+ * running or after waiting for the current one to finish.
+ */
+struct btrfs_trans_handle *btrfs_join_transaction_nostart(struct btrfs_root *root)
+{
+	return start_transaction(root, 0, TRANS_JOIN_NOSTART,
+				 BTRFS_RESERVE_NO_FLUSH, true);
+}
 /*
  * btrfs_attach_transaction() - catch the running transaction
  *
 		}
 	} else {
 		spin_unlock(&fs_info->trans_lock);
+		/*
+		 * The previous transaction was aborted and was already removed
+		 * from the list of transactions at fs_info->trans_list. So we
+		 * abort to prevent writing a new superblock that reflects a
+		 * corrupt state (pointing to trees with unwritten nodes/leafs).
+		 */
+		if (test_bit(BTRFS_FS_STATE_TRANS_ABORTED, &fs_info->fs_state)) {
+			ret = -EROFS;
+			goto cleanup_transaction;
+		}
 	}
 	extwriter_counter_dec(cur_trans, trans->type);

fs/btrfs/transaction.h+3−0

 #define __TRANS_JOIN		(1U << 11)
 #define __TRANS_JOIN_NOLOCK	(1U << 12)
 #define __TRANS_DUMMY		(1U << 13)
+#define __TRANS_JOIN_NOSTART	(1U << 14)
 #define TRANS_START		(__TRANS_START | __TRANS_FREEZABLE)
 #define TRANS_ATTACH		(__TRANS_ATTACH)
 #define TRANS_JOIN		(__TRANS_JOIN | __TRANS_FREEZABLE)
 #define TRANS_JOIN_NOLOCK	(__TRANS_JOIN_NOLOCK)
+#define TRANS_JOIN_NOSTART	(__TRANS_JOIN_NOSTART)
 #define TRANS_EXTWRITERS	(__TRANS_START | __TRANS_ATTACH)
 					int min_factor);
 struct btrfs_trans_handle *btrfs_join_transaction(struct btrfs_root *root);
 struct btrfs_trans_handle *btrfs_join_transaction_nolock(struct btrfs_root *root);
+struct btrfs_trans_handle *btrfs_join_transaction_nostart(struct btrfs_root *root);
 struct btrfs_trans_handle *btrfs_attach_transaction(struct btrfs_root *root);
 struct btrfs_trans_handle *btrfs_attach_transaction_barrier(
 					struct btrfs_root *root);

fs/cifs/connect.c+1−0

@@ -1113,6 +1113,7 @@ cifs_demultiplex_thread(void *p) · 1112 unmodified lines
1113	mempool_resize(cifs_req_poolp, length + cifs_min_rcv);	1113	mempool_resize(cifs_req_poolp, length + cifs_min_rcv);
1114		1114
1115	set_freezable();	1115	set_freezable();
		1116	allow_signal(SIGKILL);
1116	while (server->tcpStatus != CifsExiting) {	1117	while (server->tcpStatus != CifsExiting) {
1117	if (try_to_freeze())	1118	if (try_to_freeze())
1118	continue;	1119	continue;

fs/cifs/smb2ops.c+26−13

 static inline void smb2_sg_set_buf(struct scatterlist *sg, const void *buf,
 				   unsigned int buflen)
 {
-	sg_set_page(sg, virt_to_page(buf), buflen, offset_in_page(buf));
+	void *addr;
+	/*
+	 * VMAP_STACK (at least) puts stack into the vmalloc address space
+	 */
+	if (is_vmalloc_addr(buf))
+		addr = vmalloc_to_page(buf);
+	else
+		addr = virt_to_page(buf);
+	sg_set_page(sg, addr, buflen, offset_in_page(buf));
 }
 /* Assumes the first rqst has a transform header as the first iov.
 {
 	int ret, length;
 	char *buf = server->smallbuf;
-	char *tmpbuf;
 	struct smb2_sync_hdr *shdr;
 	unsigned int pdu_length = server->pdu_size;
 	unsigned int buf_size;
 		return length;
 	next_is_large = server->large_buf;
- one_more:
+one_more:
 	shdr = (struct smb2_sync_hdr *)buf;
 	if (shdr->NextCommand) {
-		if (next_is_large) {
+		if (next_is_large)
-			tmpbuf = server->bigbuf;
 			next_buffer = (char *)cifs_buf_get();
-		} else {
+		else
-			tmpbuf = server->smallbuf;
 			next_buffer = (char *)cifs_small_buf_get();
-		}
 		memcpy(next_buffer,
-		       tmpbuf + le32_to_cpu(shdr->NextCommand),
+		       buf + le32_to_cpu(shdr->NextCommand),
 		       pdu_length - le32_to_cpu(shdr->NextCommand));
 	}
 		pdu_length -= le32_to_cpu(shdr->NextCommand);
 		server->large_buf = next_is_large;
 		if (next_is_large)
-			server->bigbuf = next_buffer;
+			server->bigbuf = buf = next_buffer;
 		else
-			server->smallbuf = next_buffer;
+			server->smallbuf = buf = next_buffer;
-		buf += le32_to_cpu(shdr->NextCommand);
 		goto one_more;
+	} else if (ret != 0) {
+		/*
+		 * ret != 0 here means that we didn't get to handle_mid() thus
+		 * server->smallbuf and server->bigbuf are still valid. We need
+		 * to free next_buffer because it is not going to be used
+		 * anywhere.
+		 */
+		if (next_is_large)
+			free_rsp_buf(CIFS_LARGE_BUFFER, next_buffer);
+		else
+			free_rsp_buf(CIFS_SMALL_BUFFER, next_buffer);
 	}
 	return ret;

fs/cifs/smb2pdu.c+6−1

 	if (tcon == NULL)
 		return 0;
-	if (smb2_command == SMB2_TREE_CONNECT)
+	if (smb2_command == SMB2_TREE_CONNECT || smb2_command == SMB2_IOCTL)
 		return 0;
 	if (tcon->tidStatus == CifsExiting) {
 	else
 		req->SecurityMode = 0;
+#ifdef CONFIG_CIFS_DFS_UPCALL
+	req->Capabilities = cpu_to_le32(SMB2_GLOBAL_CAP_DFS);
+#else
 	req->Capabilities = 0;
+#endif /* DFS_UPCALL */
 	req->Channel = 0; /* MBZ */
 	sess_data->iov[0].iov_base = (char *)req;

fs/compat_ioctl.c+0−3

 COMPATIBLE_IOCTL(PPPIOCATTCHAN)
 COMPATIBLE_IOCTL(PPPIOCGCHAN)
 COMPATIBLE_IOCTL(PPPIOCGL2TPSTATS)
-/* PPPOX */
-COMPATIBLE_IOCTL(PPPOEIOCSFWD)
-COMPATIBLE_IOCTL(PPPOEIOCDFWD)
 /* Big A */
 /* sparc only */
 /* Big Q for sound/OSS */

fs/coredump.c+39−5

 #include <linux/stat.h>
 #include <linux/fcntl.h>
 #include <linux/swap.h>
+#include <linux/ctype.h>
 #include <linux/string.h>
 #include <linux/init.h>
 #include <linux/pagemap.h>
  * name into corename, which must have space for at least
  * CORENAME_MAX_SIZE bytes plus one byte for the zero terminator.
  */
-static int format_corename(struct core_name *cn, struct coredump_params *cprm)
+static int format_corename(struct core_name *cn, struct coredump_params *cprm,
+			   size_t **argv, int *argc)
 {
 	const struct cred *cred = current_cred();
 	const char *pat_ptr = core_pattern;
 	int ispipe = (*pat_ptr == '|');
+	bool was_space = false;
 	int pid_in_pattern = 0;
 	int err = 0;
 		return -ENOMEM;
 	cn->corename[0] = '\0';
-	if (ispipe)
+	if (ispipe) {
+		int argvs = sizeof(core_pattern) / 2;
+		(*argv) = kmalloc_array(argvs, sizeof(**argv), GFP_KERNEL);
+		if (!(*argv))
+			return -ENOMEM;
+		(*argv)[(*argc)++] = 0;
 		++pat_ptr;
+	}
 	/* Repeat as long as we have more pattern to process and more output
 	   space */
 	while (*pat_ptr) {
+		/*
+		 * Split on spaces before doing template expansion so that
+		 * %e and %E don't get split if they have spaces in them
+		 */
+		if (ispipe) {
+			if (isspace(*pat_ptr)) {
+				was_space = true;
+				pat_ptr++;
+				continue;
+			} else if (was_space) {
+				was_space = false;
+				err = cn_printf(cn, "%c", '\0');
+				if (err)
+					return err;
+				(*argv)[(*argc)++] = cn->used;
+			}
+		}
 		if (*pat_ptr != '%') {
 			err = cn_printf(cn, "%c", *pat_ptr++);
 		} else {
 	struct cred *cred;
 	int retval = 0;
 	int ispipe;
+	size_t *argv = NULL;
+	int argc = 0;
 	struct files_struct *displaced;
 	/* require nonrelative corefile path and be extra careful */
 	bool need_suid_safe = false;
 	old_cred = override_creds(cred);
-	ispipe = format_corename(&cn, &cprm);
+	ispipe = format_corename(&cn, &cprm, &argv, &argc);
 	if (ispipe) {
+		int argi;
 		int dump_count;
 		char **helper_argv;
 		struct subprocess_info *sub_info;
 			goto fail_dropcount;
 		}
-		helper_argv = argv_split(GFP_KERNEL, cn.corename, NULL);
+		helper_argv = kmalloc_array(argc + 1, sizeof(*helper_argv),
+					    GFP_KERNEL);
 		if (!helper_argv) {
 			printk(KERN_WARNING "%s failed to allocate memory\n",
 			       __func__);
 			goto fail_dropcount;
 		}
+		for (argi = 0; argi < argc; argi++)
+			helper_argv[argi] = cn.corename + argv[argi];
+		helper_argv[argi] = NULL;
 		retval = -ENOMEM;
 		sub_info = call_usermodehelper_setup(helper_argv[0],
 			retval = call_usermodehelper_exec(sub_info,
 							  UMH_WAIT_EXEC);
-		argv_free(helper_argv);
+		kfree(helper_argv);
 		if (retval) {
 			printk(KERN_INFO "Core dump to |%s pipe failed\n",
 			       cn.corename);
 	if (ispipe)
 		atomic_dec(&core_dump_count);
 fail_unlock:
+	kfree(argv);
 	kfree(cn.corename);
 	coredump_finish(mm, core_dumped);
 	revert_creds(old_cred);

fs/dax.c+2−2

@@ -266,7 +266,7 @@ static void wait_entry_unlocked(struct xa_state xas, void entry) · 265 unmodified lines
266	static void put_unlocked_entry(struct xa_state xas, void entry)	266	static void put_unlocked_entry(struct xa_state xas, void entry)
267	{	267	{
268	/* If we were the only waiter woken, wake the next one */	268	/* If we were the only waiter woken, wake the next one */
269	if (entry && dax_is_conflict(entry))	269	if (entry && !dax_is_conflict(entry))
270	dax_wake_entry(xas, entry, false);	270	dax_wake_entry(xas, entry, false);
271	}	271	}
272		272
@@ -600,7 +600,7 @@ struct page dax_layout_busy_page(struct address_space mapping) · 327 unmodified lines
600	* guaranteed to either see new references or prevent new	600	* guaranteed to either see new references or prevent new
601	* references from being established.	601	* references from being established.
602	*/	602	*/
603	unmap_mapping_range(mapping, 0, 0, 1);	603	unmap_mapping_range(mapping, 0, 0, 0);
604		604
605	xas_lock_irq(&xas);	605	xas_lock_irq(&xas);
606	xas_for_each(&xas, entry, ULONG_MAX) {	606	xas_for_each(&xas, entry, ULONG_MAX) {

fs/f2fs/file.c+23−40

@@ -1653,19 +1653,12 @@ static int f2fs_file_flush(struct file *file, fl_owner_t id) · 1652 unmodified lines
1653	static int f2fs_setflags_common(struct inode *inode, u32 iflags, u32 mask)	1653	static int f2fs_setflags_common(struct inode *inode, u32 iflags, u32 mask)
1654	{	1654	{
1655	struct f2fs_inode_info *fi = F2FS_I(inode);	1655	struct f2fs_inode_info *fi = F2FS_I(inode);
1656	u32 oldflags;
1657		1656
1658	/* Is it quota file? Do not allow user to mess with it */	1657	/* Is it quota file? Do not allow user to mess with it */
1659	if (IS_NOQUOTA(inode))	1658	if (IS_NOQUOTA(inode))
1660	return -EPERM;	1659	return -EPERM;
1661		1660
1662	oldflags = fi->i_flags;	1661	fi->i_flags = iflags \| (fi->i_flags & ~mask);
1663
1664	if ((iflags ^ oldflags) & (F2FS_APPEND_FL \| F2FS_IMMUTABLE_FL))
1665	if (!capable(CAP_LINUX_IMMUTABLE))
1666	return -EPERM;
1667
1668	fi->i_flags = iflags \| (oldflags & ~mask);
1669		1662
1670	if (fi->i_flags & F2FS_PROJINHERIT_FL)	1663	if (fi->i_flags & F2FS_PROJINHERIT_FL)
1671	set_inode_flag(inode, FI_PROJ_INHERIT);	1664	set_inode_flag(inode, FI_PROJ_INHERIT);
@@ -1770,7 +1763,8 @@ static int f2fs_ioc_getflags(struct file *filp, unsigned long arg) · 98 unmodified lines
1770	static int f2fs_ioc_setflags(struct file *filp, unsigned long arg)	1763	static int f2fs_ioc_setflags(struct file *filp, unsigned long arg)
1771	{	1764	{
1772	struct inode *inode = file_inode(filp);	1765	struct inode *inode = file_inode(filp);
1773	u32 fsflags;	1766	struct f2fs_inode_info *fi = F2FS_I(inode);
		1767	u32 fsflags, old_fsflags;
1774	u32 iflags;	1768	u32 iflags;
1775	int ret;	1769	int ret;
1776		1770
@@ -1794,8 +1788,14 @@ static int f2fs_ioc_setflags(struct file *filp, unsigned long arg) · 17 unmodified lines
1794		1788
1795	inode_lock(inode);	1789	inode_lock(inode);
1796		1790
		1791	old_fsflags = f2fs_iflags_to_fsflags(fi->i_flags);
		1792	ret = vfs_ioc_setflags_prepare(inode, old_fsflags, fsflags);
		1793	if (ret)
		1794	goto out;
		1795
1797	ret = f2fs_setflags_common(inode, iflags,	1796	ret = f2fs_setflags_common(inode, iflags,
1798	f2fs_fsflags_to_iflags(F2FS_SETTABLE_FS_FL));	1797	f2fs_fsflags_to_iflags(F2FS_SETTABLE_FS_FL));
		1798	out:
1799	inode_unlock(inode);	1799	inode_unlock(inode);
1800	mnt_drop_write_file(filp);	1800	mnt_drop_write_file(filp);
1801	return ret;	1801	return ret;
@@ -2855,52 +2855,32 @@ static inline u32 f2fs_xflags_to_iflags(u32 xflags) · 1053 unmodified lines
2855	return iflags;	2855	return iflags;
2856	}	2856	}
2857		2857
2858	static int f2fs_ioc_fsgetxattr(struct file *filp, unsigned long arg)	2858	static void f2fs_fill_fsxattr(struct inode inode, struct fsxattr fa)
2859	{	2859	{
2860	struct inode *inode = file_inode(filp);
2861	struct f2fs_inode_info *fi = F2FS_I(inode);	2860	struct f2fs_inode_info *fi = F2FS_I(inode);
2862	struct fsxattr fa;
2863		2861
2864	memset(&fa, 0, sizeof(struct fsxattr));	2862	simple_fill_fsxattr(fa, f2fs_iflags_to_xflags(fi->i_flags));
2865	fa.fsx_xflags = f2fs_iflags_to_xflags(fi->i_flags);
2866		2863
2867	if (f2fs_sb_has_project_quota(F2FS_I_SB(inode)))	2864	if (f2fs_sb_has_project_quota(F2FS_I_SB(inode)))
2868	fa.fsx_projid = (__u32)from_kprojid(&init_user_ns,	2865	fa->fsx_projid = from_kprojid(&init_user_ns, fi->i_projid);
2869	fi->i_projid);
2870
2871	if (copy_to_user((struct fsxattr __user *)arg, &fa, sizeof(fa)))
2872	return -EFAULT;
2873	return 0;
2874	}	2866	}
2875		2867
2876	static int f2fs_ioctl_check_project(struct inode inode, struct fsxattr fa)	2868	static int f2fs_ioc_fsgetxattr(struct file *filp, unsigned long arg)
2877	{	2869	{
2878	/*	2870	struct inode *inode = file_inode(filp);
2879	* Project Quota ID state is only allowed to change from within the init	2871	struct fsxattr fa;
2880	* namespace. Enforce that restriction only if we are trying to change
2881	* the quota ID state. Everything else is allowed in user namespaces.
2882	*/
2883	if (current_user_ns() == &init_user_ns)
2884	return 0;
2885		2872
2886	if (__kprojid_val(F2FS_I(inode)->i_projid) != fa->fsx_projid)	2873	f2fs_fill_fsxattr(inode, &fa);
2887	return -EINVAL;
2888
2889	if (F2FS_I(inode)->i_flags & F2FS_PROJINHERIT_FL) {
2890	if (!(fa->fsx_xflags & FS_XFLAG_PROJINHERIT))
2891	return -EINVAL;
2892	} else {
2893	if (fa->fsx_xflags & FS_XFLAG_PROJINHERIT)
2894	return -EINVAL;
2895	}
2896		2874
		2875	if (copy_to_user((struct fsxattr __user *)arg, &fa, sizeof(fa)))
		2876	return -EFAULT;
2897	return 0;	2877	return 0;
2898	}	2878	}
2899		2879
2900	static int f2fs_ioc_fssetxattr(struct file *filp, unsigned long arg)	2880	static int f2fs_ioc_fssetxattr(struct file *filp, unsigned long arg)
2901	{	2881	{
2902	struct inode *inode = file_inode(filp);	2882	struct inode *inode = file_inode(filp);
2903	struct fsxattr fa;	2883	struct fsxattr fa, old_fa;
2904	u32 iflags;	2884	u32 iflags;
2905	int err;	2885	int err;
2906		2886
@@ -2923,9 +2903,12 @@ static int f2fs_ioc_fssetxattr(struct file *filp, unsigned long arg) · 16 unmodified lines
2923	return err;	2903	return err;
2924		2904
2925	inode_lock(inode);	2905	inode_lock(inode);
2926	err = f2fs_ioctl_check_project(inode, &fa);	2906
		2907	f2fs_fill_fsxattr(inode, &old_fa);
		2908	err = vfs_ioc_fssetxattr_check(inode, &old_fa, &fa);
2927	if (err)	2909	if (err)
2928	goto out;	2910	goto out;
		2911
2929	err = f2fs_setflags_common(inode, iflags,	2912	err = f2fs_setflags_common(inode, iflags,
2930	f2fs_xflags_to_iflags(F2FS_SUPPORTED_XFLAGS));	2913	f2fs_xflags_to_iflags(F2FS_SUPPORTED_XFLAGS));
2931	if (err)	2914	if (err)

fs/f2fs/gc.c+34−36

 	if (lfs_mode)
 		down_write(&fio.sbi->io_order_lock);
+	mpage = f2fs_grab_cache_page(META_MAPPING(fio.sbi),
+					fio.old_blkaddr, false);
+	if (!mpage)
+		goto up_out;
+	fio.encrypted_page = mpage;
+	/* read source block in mpage */
+	if (!PageUptodate(mpage)) {
+		err = f2fs_submit_page_bio(&fio);
+		if (err) {
+			f2fs_put_page(mpage, 1);
+			goto up_out;
+		}
+		lock_page(mpage);
+		if (unlikely(mpage->mapping != META_MAPPING(fio.sbi) ||
+						!PageUptodate(mpage))) {
+			err = -EIO;
+			f2fs_put_page(mpage, 1);
+			goto up_out;
+		}
+	}
 	f2fs_allocate_data_block(fio.sbi, NULL, fio.old_blkaddr, &newaddr,
 					&sum, CURSEG_COLD_DATA, NULL, false);
 				newaddr, FGP_LOCK | FGP_CREAT, GFP_NOFS);
 	if (!fio.encrypted_page) {
 		err = -ENOMEM;
-		goto recover_block;
-	}
-	mpage = f2fs_pagecache_get_page(META_MAPPING(fio.sbi),
-					fio.old_blkaddr, FGP_LOCK, GFP_NOFS);
-	if (mpage) {
-		bool updated = false;
-		if (PageUptodate(mpage)) {
-			memcpy(page_address(fio.encrypted_page),
-					page_address(mpage), PAGE_SIZE);
-			updated = true;
-		}
 		f2fs_put_page(mpage, 1);
-		invalidate_mapping_pages(META_MAPPING(fio.sbi),
+		goto recover_block;
-					fio.old_blkaddr, fio.old_blkaddr);
-		if (updated)
-			goto write_page;
-	}
-	err = f2fs_submit_page_bio(&fio);
-	if (err)
-		goto put_page_out;
-	/* write page */
-	lock_page(fio.encrypted_page);
-	if (unlikely(fio.encrypted_page->mapping != META_MAPPING(fio.sbi))) {
-		err = -EIO;
-		goto put_page_out;
-	}
-	if (unlikely(!PageUptodate(fio.encrypted_page))) {
-		err = -EIO;
-		goto put_page_out;
 	}
-write_page:
+	/* write target block */
 	f2fs_wait_on_page_writeback(fio.encrypted_page, DATA, true, true);
+	memcpy(page_address(fio.encrypted_page),
+				page_address(mpage), PAGE_SIZE);
+	f2fs_put_page(mpage, 1);
+	invalidate_mapping_pages(META_MAPPING(fio.sbi),
+				fio.old_blkaddr, fio.old_blkaddr);
 	set_page_dirty(fio.encrypted_page);
 	if (clear_page_dirty_for_io(fio.encrypted_page))
 		dec_page_count(fio.sbi, F2FS_DIRTY_META);
 put_page_out:
 	f2fs_put_page(fio.encrypted_page, 1);
 recover_block:
-	if (lfs_mode)
-		up_write(&fio.sbi->io_order_lock);
 	if (err)
 		f2fs_do_replace_block(fio.sbi, &sum, newaddr, fio.old_blkaddr,
 								true, true);
+up_out:
+	if (lfs_mode)
+		up_write(&fio.sbi->io_order_lock);
 put_out:
 	f2fs_put_dnode(&dn);
 out:

fs/f2fs/super.c+24−24

 	size_t crc_offset = 0;
 	__u32 crc = 0;
+	if (le32_to_cpu(raw_super->magic) != F2FS_SUPER_MAGIC) {
+		f2fs_info(sbi, "Magic Mismatch, valid(0x%x) - read(0x%x)",
+			  F2FS_SUPER_MAGIC, le32_to_cpu(raw_super->magic));
+		return -EINVAL;
+	}
 	/* Check checksum_offset and crc in superblock */
 	if (__F2FS_HAS_FEATURE(raw_super, F2FS_FEATURE_SB_CHKSUM)) {
 		crc_offset = le32_to_cpu(raw_super->checksum_offset);
 			offsetof(struct f2fs_super_block, crc)) {
 			f2fs_info(sbi, "Invalid SB checksum offset: %zu",
 				  crc_offset);
-			return 1;
+			return -EFSCORRUPTED;
 		}
 		crc = le32_to_cpu(raw_super->crc);
 		if (!f2fs_crc_valid(sbi, crc, raw_super, crc_offset)) {
 			f2fs_info(sbi, "Invalid SB checksum value: %u", crc);
-			return 1;
+			return -EFSCORRUPTED;
 		}
 	}
-	if (F2FS_SUPER_MAGIC != le32_to_cpu(raw_super->magic)) {
-		f2fs_info(sbi, "Magic Mismatch, valid(0x%x) - read(0x%x)",
-			  F2FS_SUPER_MAGIC, le32_to_cpu(raw_super->magic));
-		return 1;
-	}
 	/* Currently, support only 4KB page cache size */
 	if (F2FS_BLKSIZE != PAGE_SIZE) {
 		f2fs_info(sbi, "Invalid page_cache_size (%lu), supports only 4KB",
 			  PAGE_SIZE);
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	/* Currently, support only 4KB block size */
 	if (blocksize != F2FS_BLKSIZE) {
 		f2fs_info(sbi, "Invalid blocksize (%u), supports only 4KB",
 			  blocksize);
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	/* check log blocks per segment */
 	if (le32_to_cpu(raw_super->log_blocks_per_seg) != 9) {
 		f2fs_info(sbi, "Invalid log blocks per segment (%u)",
 			  le32_to_cpu(raw_super->log_blocks_per_seg));
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	/* Currently, support 512/1024/2048/4096 bytes sector size */
 				F2FS_MIN_LOG_SECTOR_SIZE) {
 		f2fs_info(sbi, "Invalid log sectorsize (%u)",
 			  le32_to_cpu(raw_super->log_sectorsize));
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	if (le32_to_cpu(raw_super->log_sectors_per_block) +
 		le32_to_cpu(raw_super->log_sectorsize) !=
 		f2fs_info(sbi, "Invalid log sectors per block(%u) log sectorsize(%u)",
 			  le32_to_cpu(raw_super->log_sectors_per_block),
 			  le32_to_cpu(raw_super->log_sectorsize));
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	segment_count = le32_to_cpu(raw_super->segment_count);
 	if (segment_count > F2FS_MAX_SEGMENT ||
 				segment_count < F2FS_MIN_SEGMENTS) {
 		f2fs_info(sbi, "Invalid segment count (%u)", segment_count);
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	if (total_sections > segment_count ||
 			segs_per_sec > segment_count || !segs_per_sec) {
 		f2fs_info(sbi, "Invalid segment/section count (%u, %u x %u)",
 			  segment_count, total_sections, segs_per_sec);
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	if ((segment_count / segs_per_sec) < total_sections) {
 		f2fs_info(sbi, "Small segment_count (%u < %u * %u)",
 			  segment_count, segs_per_sec, total_sections);
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	if (segment_count > (le64_to_cpu(raw_super->block_count) >> 9)) {
 		f2fs_info(sbi, "Wrong segment_count / block_count (%u > %llu)",
 			  segment_count, le64_to_cpu(raw_super->block_count));
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	if (secs_per_zone > total_sections || !secs_per_zone) {
 		f2fs_info(sbi, "Wrong secs_per_zone / total_sections (%u, %u)",
 			  secs_per_zone, total_sections);
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	if (le32_to_cpu(raw_super->extension_count) > F2FS_MAX_EXTENSION ||
 			raw_super->hot_ext_count > F2FS_MAX_EXTENSION ||
 			  le32_to_cpu(raw_super->extension_count),
 			  raw_super->hot_ext_count,
 			  F2FS_MAX_EXTENSION);
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	if (le32_to_cpu(raw_super->cp_payload) >
 		f2fs_info(sbi, "Insane cp_payload (%u > %u)",
 			  le32_to_cpu(raw_super->cp_payload),
 			  blocks_per_seg - F2FS_CP_PACKS);
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	/* check reserved ino info */
 			  le32_to_cpu(raw_super->node_ino),
 			  le32_to_cpu(raw_super->meta_ino),
 			  le32_to_cpu(raw_super->root_ino));
-		return 1;
+		return -EFSCORRUPTED;
 	}
 	/* check CP/SIT/NAT/SSA/MAIN_AREA area boundary */
 	if (sanity_check_area_boundary(sbi, bh))
-		return 1;
+		return -EFSCORRUPTED;
 	return 0;
 }
 		}
 		/* sanity checking of raw super */
-		if (sanity_check_raw_super(sbi, bh)) {
+		err = sanity_check_raw_super(sbi, bh);
+		if (err) {
 			f2fs_err(sbi, "Can't find valid F2FS filesystem in %dth superblock",
 				 block + 1);
-			err = -EFSCORRUPTED;
 			brelse(bh);
 			continue;
 		}

fs/gfs2/bmap.c+113−66

@@ -390,6 +390,19 @@ static int fillup_metapath(struct gfs2_inode ip, struct metapath mp, int h) · 389 unmodified lines
390	return mp->mp_aheight - x - 1;	390	return mp->mp_aheight - x - 1;
391	}	391	}
392		392
		393	static sector_t metapath_to_block(struct gfs2_sbd sdp, struct metapath mp)
		394	{
		395	sector_t factor = 1, block = 0;
		396	int hgt;
		397
		398	for (hgt = mp->mp_fheight - 1; hgt >= 0; hgt--) {
		399	if (hgt < mp->mp_aheight)
		400	block += mp->mp_list[hgt] * factor;
		401	factor *= sdp->sd_inptrs;
		402	}
		403	return block;
		404	}
		405
393	static void release_metapath(struct metapath *mp)	406	static void release_metapath(struct metapath *mp)
394	{	407	{
395	int i;	408	int i;
@@ -430,60 +443,84 @@ static inline unsigned int gfs2_extent_length(struct buffer_head bh, __be64 pt · 34 unmodified lines
430	return ptr - first;	443	return ptr - first;
431	}	444	}
432		445
433	typedef const __be64 (gfs2_metadata_walker)(	446	enum walker_status { WALK_STOP, WALK_FOLLOW, WALK_CONTINUE };
434	struct metapath *mp,	447
435	const __be64 start, const __be64 end,	448	/*
436	u64 factor, void *data);	449	* gfs2_metadata_walker - walk an indirect block
		450	* @mp: Metapath to indirect block
		451	* @ptrs: Number of pointers to look at
		452	*
		453	* When returning WALK_FOLLOW, the walker must update @mp to point at the right
		454	* indirect block to follow.
		455	*/
		456	typedef enum walker_status (gfs2_metadata_walker)(struct metapath mp,
		457	unsigned int ptrs);
437		458
438	#define WALK_STOP ((__be64 *)0)	459	/*
439	#define WALK_NEXT ((__be64 *)1)	460	* gfs2_walk_metadata - walk a tree of indirect blocks
		461	* @inode: The inode
		462	* @mp: Starting point of walk
		463	* @max_len: Maximum number of blocks to walk
		464	* @walker: Called during the walk
		465	*
		466	* Returns 1 if the walk was stopped by @walker, 0 if we went past @max_len or
		467	* past the end of metadata, and a negative error code otherwise.
		468	*/
440		469
441	static int gfs2_walk_metadata(struct inode *inode, sector_t lblock,	470	static int gfs2_walk_metadata(struct inode inode, struct metapath mp,
442	u64 len, struct metapath *mp, gfs2_metadata_walker walker,	471	u64 max_len, gfs2_metadata_walker walker)
443	void *data)
444	{	472	{
445	struct metapath clone;
446	struct gfs2_inode *ip = GFS2_I(inode);	473	struct gfs2_inode *ip = GFS2_I(inode);
447	struct gfs2_sbd *sdp = GFS2_SB(inode);	474	struct gfs2_sbd *sdp = GFS2_SB(inode);
448	const __be64 start, end, *ptr;
449	u64 factor = 1;	475	u64 factor = 1;
450	unsigned int hgt;	476	unsigned int hgt;
451	int ret = 0;	477	int ret;
452		478
453	for (hgt = ip->i_height - 1; hgt >= mp->mp_aheight; hgt--)	479	/*
		480	* The walk starts in the lowest allocated indirect block, which may be
		481	* before the position indicated by @mp. Adjust @max_len accordingly
		482	* to avoid a short walk.
		483	*/
		484	for (hgt = mp->mp_fheight - 1; hgt >= mp->mp_aheight; hgt--) {
		485	max_len += mp->mp_list[hgt] * factor;
		486	mp->mp_list[hgt] = 0;
454	factor *= sdp->sd_inptrs;	487	factor *= sdp->sd_inptrs;
		488	}
455		489
456	for (;;) {	490	for (;;) {
457	u64 step;	491	u16 start = mp->mp_list[hgt];
		492	enum walker_status status;
		493	unsigned int ptrs;
		494	u64 len;
458		495
459	/* Walk indirect block. */	496	/* Walk indirect block. */
460	start = metapointer(hgt, mp);	497	ptrs = (hgt >= 1 ? sdp->sd_inptrs : sdp->sd_diptrs) - start;
461	end = metaend(hgt, mp);	498	len = ptrs * factor;
462		499	if (len > max_len)
463	step = (end - start) * factor;	500	ptrs = DIV_ROUND_UP_ULL(max_len, factor);
464	if (step > len)	501	status = walker(mp, ptrs);
465	end = start + DIV_ROUND_UP_ULL(len, factor);	502	switch (status) {
466		503	case WALK_STOP:
467	ptr = walker(mp, start, end, factor, data);	504	return 1;
468	if (ptr == WALK_STOP)	505	case WALK_FOLLOW:
		506	BUG_ON(mp->mp_aheight == mp->mp_fheight);
		507	ptrs = mp->mp_list[hgt] - start;
		508	len = ptrs * factor;
469	break;	509	break;
470	if (step >= len)	510	case WALK_CONTINUE:
471	break;	511	break;
472	len -= step;
473	if (ptr != WALK_NEXT) {
474	BUG_ON(!*ptr);
475	mp->mp_list[hgt] += ptr - start;
476	goto fill_up_metapath;
477	}	512	}
		513	if (len >= max_len)
		514	break;
		515	max_len -= len;
		516	if (status == WALK_FOLLOW)
		517	goto fill_up_metapath;
478		518
479	lower_metapath:	519	lower_metapath:
480	/* Decrease height of metapath. */	520	/* Decrease height of metapath. */
481	if (mp != &clone) {
482	clone_metapath(&clone, mp);
483	mp = &clone;
484	}
485	brelse(mp->mp_bh[hgt]);	521	brelse(mp->mp_bh[hgt]);
486	mp->mp_bh[hgt] = NULL;	522	mp->mp_bh[hgt] = NULL;
		523	mp->mp_list[hgt] = 0;
487	if (!hgt)	524	if (!hgt)
488	break;	525	break;
489	hgt--;	526	hgt--;
@@ -491,10 +528,7 @@ lower_metapath: · 1 unmodified line
491		528
492	/* Advance in metadata tree. */	529	/* Advance in metadata tree. */
493	(mp->mp_list[hgt])++;	530	(mp->mp_list[hgt])++;
494	start = metapointer(hgt, mp);	531	if (mp->mp_list[hgt] >= sdp->sd_inptrs) {
495	end = metaend(hgt, mp);
496	if (start >= end) {
497	mp->mp_list[hgt] = 0;
498	if (!hgt)	532	if (!hgt)
499	break;	533	break;
500	goto lower_metapath;	534	goto lower_metapath;
@@ -502,44 +536,36 @@ lower_metapath: · 1 unmodified line
502		536
503	fill_up_metapath:	537	fill_up_metapath:
504	/* Increase height of metapath. */	538	/* Increase height of metapath. */
505	if (mp != &clone) {
506	clone_metapath(&clone, mp);
507	mp = &clone;
508	}
509	ret = fillup_metapath(ip, mp, ip->i_height - 1);	539	ret = fillup_metapath(ip, mp, ip->i_height - 1);
510	if (ret < 0)	540	if (ret < 0)
511	break;	541	return ret;
512	hgt += ret;	542	hgt += ret;
513	for (; ret; ret--)	543	for (; ret; ret--)
514	do_div(factor, sdp->sd_inptrs);	544	do_div(factor, sdp->sd_inptrs);
515	mp->mp_aheight = hgt + 1;	545	mp->mp_aheight = hgt + 1;
516	}	546	}
517	if (mp == &clone)	547	return 0;
518	release_metapath(mp);
519	return ret;
520	}	548	}
521		549
522	struct gfs2_hole_walker_args {	550	static enum walker_status gfs2_hole_walker(struct metapath *mp,
523	u64 blocks;	551	unsigned int ptrs)
524	};
525
526	static const __be64 gfs2_hole_walker(struct metapath mp,
527	const __be64 start, const __be64 end,
528	u64 factor, void *data)
529	{	552	{
530	struct gfs2_hole_walker_args *args = data;	553	const __be64 start, ptr, *end;
531	const __be64 *ptr;	554	unsigned int hgt;
		555
		556	hgt = mp->mp_aheight - 1;
		557	start = metapointer(hgt, mp);
		558	end = start + ptrs;
532		559
533	for (ptr = start; ptr < end; ptr++) {	560	for (ptr = start; ptr < end; ptr++) {
534	if (*ptr) {	561	if (*ptr) {
535	args->blocks += (ptr - start) * factor;	562	mp->mp_list[hgt] += ptr - start;
536	if (mp->mp_aheight == mp->mp_fheight)	563	if (mp->mp_aheight == mp->mp_fheight)
537	return WALK_STOP;	564	return WALK_STOP;
538	return ptr; /* increase height */	565	return WALK_FOLLOW;
539	}	566	}
540	}	567	}
541	args->blocks += (end - start) * factor;	568	return WALK_CONTINUE;
542	return WALK_NEXT;
543	}	569	}
544		570
545	/**	571	/**
@@ -557,12 +583,24 @@ static const __be64 gfs2_hole_walker(struct metapath mp, · 11 unmodified lines
557	static int gfs2_hole_size(struct inode *inode, sector_t lblock, u64 len,	583	static int gfs2_hole_size(struct inode *inode, sector_t lblock, u64 len,
558	struct metapath mp, struct iomap iomap)	584	struct metapath mp, struct iomap iomap)
559	{	585	{
560	struct gfs2_hole_walker_args args = { };	586	struct metapath clone;
561	int ret = 0;	587	u64 hole_size;
		588	int ret;
562		589
563	ret = gfs2_walk_metadata(inode, lblock, len, mp, gfs2_hole_walker, &args);	590	clone_metapath(&clone, mp);
564	if (!ret)	591	ret = gfs2_walk_metadata(inode, &clone, len, gfs2_hole_walker);
565	iomap->length = args.blocks << inode->i_blkbits;	592	if (ret < 0)
		593	goto out;
		594
		595	if (ret == 1)
		596	hole_size = metapath_to_block(GFS2_SB(inode), &clone) - lblock;
		597	else
		598	hole_size = len;
		599	iomap->length = hole_size << inode->i_blkbits;
		600	ret = 0;
		601
		602	out:
		603	release_metapath(&clone);
566	return ret;	604	return ret;
567	}	605	}
568		606
@@ -1002,11 +1040,16 @@ static void gfs2_iomap_page_done(struct inode *inode, loff_t pos, · 433 unmodified lines
1002	unsigned copied, struct page *page,	1040	unsigned copied, struct page *page,
1003	struct iomap *iomap)	1041	struct iomap *iomap)
1004	{	1042	{
		1043	struct gfs2_trans *tr = current->journal_info;
1005	struct gfs2_inode *ip = GFS2_I(inode);	1044	struct gfs2_inode *ip = GFS2_I(inode);
1006	struct gfs2_sbd *sdp = GFS2_SB(inode);	1045	struct gfs2_sbd *sdp = GFS2_SB(inode);
1007		1046
1008	if (page && !gfs2_is_stuffed(ip))	1047	if (page && !gfs2_is_stuffed(ip))
1009	gfs2_page_add_databufs(ip, page, offset_in_page(pos), copied);	1048	gfs2_page_add_databufs(ip, page, offset_in_page(pos), copied);
		1049
		1050	if (tr->tr_num_buf_new)
		1051	__mark_inode_dirty(inode, I_DIRTY_DATASYNC);
		1052
1010	gfs2_trans_end(sdp);	1053	gfs2_trans_end(sdp);
1011	}	1054	}
1012		1055
@@ -1099,8 +1142,6 @@ static int gfs2_iomap_begin_write(struct inode *inode, loff_t pos, · 86 unmodified lines
1099	tr = current->journal_info;	1142	tr = current->journal_info;
1100	if (tr->tr_num_buf_new)	1143	if (tr->tr_num_buf_new)
1101	__mark_inode_dirty(inode, I_DIRTY_DATASYNC);	1144	__mark_inode_dirty(inode, I_DIRTY_DATASYNC);
1102	else
1103	gfs2_trans_add_meta(ip->i_gl, mp->mp_bh[0]);
1104		1145
1105	gfs2_trans_end(sdp);	1146	gfs2_trans_end(sdp);
1106	}	1147	}
@@ -1181,10 +1222,16 @@ static int gfs2_iomap_end(struct inode *inode, loff_t pos, loff_t length, · 74 unmodified lines
1181		1222
1182	if (ip->i_qadata && ip->i_qadata->qa_qd_num)	1223	if (ip->i_qadata && ip->i_qadata->qa_qd_num)
1183	gfs2_quota_unlock(ip);	1224	gfs2_quota_unlock(ip);
		1225
		1226	if (unlikely(!written))
		1227	goto out_unlock;
		1228
1184	if (iomap->flags & IOMAP_F_SIZE_CHANGED)	1229	if (iomap->flags & IOMAP_F_SIZE_CHANGED)
1185	mark_inode_dirty(inode);	1230	mark_inode_dirty(inode);
1186	gfs2_write_unlock(inode);	1231	set_bit(GLF_DIRTY, &ip->i_gl->gl_flags);
1187		1232
		1233	out_unlock:
		1234	gfs2_write_unlock(inode);
1188	out:	1235	out:
1189	return 0;	1236	return 0;
1190	}	1237	}

fs/io_uring.c+2−1

 	do {
 		struct sqe_submit *s = &req->submit;
 		const struct io_uring_sqe *sqe = s->sqe;
+		unsigned int flags = req->flags;
 		/* Ensure we clear previously set non-block flag */
 		req->rw.ki_flags &= ~IOCB_NOWAIT;
 		kfree(sqe);
 		/* req from defer and link list needn't decrease async cnt */
-		if (req->flags & (REQ_F_IO_DRAINED | REQ_F_LINK_DONE))
+		if (flags & (REQ_F_IO_DRAINED | REQ_F_LINK_DONE))
 			goto out;
 		if (!async_list)

fs/nfs/delegation.c+18−7

 		/* Block nfs4_proc_unlck */
 		mutex_lock(&sp->so_delegreturn_mutex);
 		seq = raw_seqcount_begin(&sp->so_reclaim_seqcount);
-		err = nfs4_open_delegation_recall(ctx, state, stateid, type);
+		err = nfs4_open_delegation_recall(ctx, state, stateid);
 		if (!err)
 			err = nfs_delegation_claim_locks(state, stateid);
 		if (!err && read_seqcount_retry(&sp->so_reclaim_seqcount, seq))
 	nfs4_schedule_state_manager(clp);
 }
+static void
+nfs_delegation_test_free_expired(struct inode *inode,
+		nfs4_stateid *stateid,
+		const struct cred *cred)
+{
+	struct nfs_server *server = NFS_SERVER(inode);
+	const struct nfs4_minor_version_ops *ops = server->nfs_client->cl_mvops;
+	int status;
+	if (!cred)
+		return;
+	status = ops->test_and_free_expired(server, stateid, cred);
+	if (status == -NFS4ERR_EXPIRED || status == -NFS4ERR_BAD_STATEID)
+		nfs_remove_bad_delegation(inode, stateid);
+}
 /**
  * nfs_reap_expired_delegations - reap expired delegations
  * @clp: nfs_client to process
  */
 void nfs_reap_expired_delegations(struct nfs_client *clp)
 {
-	const struct nfs4_minor_version_ops *ops = clp->cl_mvops;
 	struct nfs_delegation *delegation;
 	struct nfs_server *server;
 	struct inode *inode;
 			nfs4_stateid_copy(&stateid, &delegation->stateid);
 			clear_bit(NFS_DELEGATION_TEST_EXPIRED, &delegation->flags);
 			rcu_read_unlock();
-			if (cred != NULL &&
+			nfs_delegation_test_free_expired(inode, &stateid, cred);
-			    ops->test_and_free_expired(server, &stateid, cred) < 0) {
-				nfs_revoke_delegation(inode, &stateid);
-				nfs_inode_find_state_and_recover(inode, &stateid);
-			}
 			put_cred(cred);
 			if (nfs4_server_rebooted(clp)) {
 				nfs_inode_mark_test_expired_delegation(server,inode);

fs/nfs/delegation.h+1−1

@@ -63,7 +63,7 @@ void nfs_reap_expired_delegations(struct nfs_client *clp); · 62 unmodified lines
63		63
64	/* NFSv4 delegation-related procedures */	64	/* NFSv4 delegation-related procedures */
65	int nfs4_proc_delegreturn(struct inode inode, const struct cred cred, const nfs4_stateid *stateid, int issync);	65	int nfs4_proc_delegreturn(struct inode inode, const struct cred cred, const nfs4_stateid *stateid, int issync);
66	int nfs4_open_delegation_recall(struct nfs_open_context ctx, struct nfs4_state state, const nfs4_stateid *stateid, fmode_t type);	66	int nfs4_open_delegation_recall(struct nfs_open_context ctx, struct nfs4_state state, const nfs4_stateid *stateid);
67	int nfs4_lock_delegation_recall(struct file_lock fl, struct nfs4_state state, const nfs4_stateid *stateid);	67	int nfs4_lock_delegation_recall(struct file_lock fl, struct nfs4_state state, const nfs4_stateid *stateid);
68	bool nfs4_copy_delegation_stateid(struct inode inode, fmode_t flags, nfs4_stateid dst, const struct cred **cred);	68	bool nfs4_copy_delegation_stateid(struct inode inode, fmode_t flags, nfs4_stateid dst, const struct cred **cred);
69	bool nfs4_refresh_delegation_stateid(nfs4_stateid dst, struct inode inode);	69	bool nfs4_refresh_delegation_stateid(nfs4_stateid dst, struct inode inode);

fs/nfs/fscache.c+6−1

 	struct rb_node **p, *parent;
 	int diff;
+	nfss->fscache_key = NULL;
+	nfss->fscache = NULL;
+	if (!(nfss->options & NFS_OPTION_FSCACHE))
+		return;
 	if (!uniq) {
 		uniq = "";
 		ulen = 1;
 void nfs_fscache_init_inode(struct inode *inode)
 {
 	struct nfs_fscache_inode_auxdata auxdata;
+	struct nfs_server *nfss = NFS_SERVER(inode);
 	struct nfs_inode *nfsi = NFS_I(inode);
 	nfsi->fscache = NULL;
-	if (!S_ISREG(inode->i_mode))
+	if (!(nfss->fscache && S_ISREG(inode->i_mode)))
 		return;
 	memset(&auxdata, 0, sizeof(auxdata));

fs/nfs/fscache.h+1−1

@@ -182,7 +182,7 @@ static inline void nfs_fscache_wait_on_invalidate(struct inode *inode) · 181 unmodified lines
182	*/	182	*/
183	static inline const char nfs_server_fscache_state(struct nfs_server server)	183	static inline const char nfs_server_fscache_state(struct nfs_server server)
184	{	184	{
185	if (server->fscache && (server->options & NFS_OPTION_FSCACHE))	185	if (server->fscache)
186	return "yes";	186	return "yes";
187	return "no ";	187	return "no ";
188	}	188	}

fs/nfs/nfs4_fs.h+2−1

@@ -465,7 +465,8 @@ static inline void nfs4_schedule_session_recovery(struct nfs4_session *session, · 464 unmodified lines
465		465
466	extern struct nfs4_state_owner nfs4_get_state_owner(struct nfs_server , const struct cred *, gfp_t);	466	extern struct nfs4_state_owner nfs4_get_state_owner(struct nfs_server , const struct cred *, gfp_t);
467	extern void nfs4_put_state_owner(struct nfs4_state_owner *);	467	extern void nfs4_put_state_owner(struct nfs4_state_owner *);
468	extern void nfs4_purge_state_owners(struct nfs_server *);	468	extern void nfs4_purge_state_owners(struct nfs_server , struct list_head );
		469	extern void nfs4_free_state_owners(struct list_head *head);
469	extern struct nfs4_state * nfs4_get_open_state(struct inode , struct nfs4_state_owner );	470	extern struct nfs4_state * nfs4_get_open_state(struct inode , struct nfs4_state_owner );
470	extern void nfs4_put_open_state(struct nfs4_state *);	471	extern void nfs4_put_open_state(struct nfs4_state *);
471	extern void nfs4_close_state(struct nfs4_state *, fmode_t);	472	extern void nfs4_close_state(struct nfs4_state *, fmode_t);

fs/nfs/nfs4client.c+4−1

 static void nfs4_destroy_server(struct nfs_server *server)
 {
+	LIST_HEAD(freeme);
 	nfs_server_return_all_delegations(server);
 	unset_pnfs_layoutdriver(server);
-	nfs4_purge_state_owners(server);
+	nfs4_purge_state_owners(server, &freeme);
+	nfs4_free_state_owners(&freeme);
 }
 /*

fs/nfs/nfs4proc.c+62−47

 	write_sequnlock(&state->seqlock);
 }
+static void nfs_state_clear_open_state_flags(struct nfs4_state *state)
+{
+	clear_bit(NFS_O_RDWR_STATE, &state->flags);
+	clear_bit(NFS_O_WRONLY_STATE, &state->flags);
+	clear_bit(NFS_O_RDONLY_STATE, &state->flags);
+	clear_bit(NFS_OPEN_STATE, &state->flags);
+}
 static void nfs_state_set_delegation(struct nfs4_state *state,
 		const nfs4_stateid *deleg_stateid,
 		fmode_t fmode)
 	if (data->o_res.delegation_type != 0)
 		nfs4_opendata_check_deleg(data, state);
 update:
-	update_open_stateid(state, &data->o_res.stateid, NULL,
+	if (!update_open_stateid(state, &data->o_res.stateid,
-			    data->o_arg.fmode);
+				NULL, data->o_arg.fmode))
+		return ERR_PTR(-EAGAIN);
 	refcount_inc(&state->count);
 	return state;
 	if (data->o_res.delegation_type != 0)
 		nfs4_opendata_check_deleg(data, state);
-	update_open_stateid(state, &data->o_res.stateid, NULL,
+	if (!update_open_stateid(state, &data->o_res.stateid,
-			data->o_arg.fmode);
+				NULL, data->o_arg.fmode)) {
+		nfs4_put_open_state(state);
+		state = ERR_PTR(-EAGAIN);
+	}
 out:
 	nfs_release_seqid(data->o_arg.seqid);
 	return state;
 {
 	int ret;
-	/* Don't trigger recovery in nfs_test_and_clear_all_open_stateid */
-	clear_bit(NFS_O_RDWR_STATE, &state->flags);
-	clear_bit(NFS_O_WRONLY_STATE, &state->flags);
-	clear_bit(NFS_O_RDONLY_STATE, &state->flags);
 	/* memory barrier prior to reading state->n_* */
-	clear_bit(NFS_DELEGATED_STATE, &state->flags);
-	clear_bit(NFS_OPEN_STATE, &state->flags);
 	smp_rmb();
 	ret = nfs4_open_recover_helper(opendata, FMODE_READ|FMODE_WRITE);
 	if (ret != 0)
 	ctx = nfs4_state_find_open_context(state);
 	if (IS_ERR(ctx))
 		return -EAGAIN;
+	clear_bit(NFS_DELEGATED_STATE, &state->flags);
+	nfs_state_clear_open_state_flags(state);
 	ret = nfs4_do_open_reclaim(ctx, state);
 	put_nfs_open_context(ctx);
 	return ret;
 		case -ENOENT:
 		case -EAGAIN:
 		case -ESTALE:
+		case -ETIMEDOUT:
 			break;
 		case -NFS4ERR_BADSESSION:
 		case -NFS4ERR_BADSLOT:
 		case -NFS4ERR_BAD_HIGH_SLOT:
 		case -NFS4ERR_CONN_NOT_BOUND_TO_SESSION:
 		case -NFS4ERR_DEADSESSION:
-			set_bit(NFS_DELEGATED_STATE, &state->flags);
 			nfs4_schedule_session_recovery(server->nfs_client->cl_session, err);
 			return -EAGAIN;
 		case -NFS4ERR_STALE_CLIENTID:
 		case -NFS4ERR_STALE_STATEID:
-			set_bit(NFS_DELEGATED_STATE, &state->flags);
 			/* Don't recall a delegation if it was lost */
 			nfs4_schedule_lease_recovery(server->nfs_client);
 			return -EAGAIN;
 			return -EAGAIN;
 		case -NFS4ERR_DELAY:
 		case -NFS4ERR_GRACE:
-			set_bit(NFS_DELEGATED_STATE, &state->flags);
 			ssleep(1);
 			return -EAGAIN;
 		case -ENOMEM:
 }
 int nfs4_open_delegation_recall(struct nfs_open_context *ctx,
-		struct nfs4_state *state, const nfs4_stateid *stateid,
+		struct nfs4_state *state, const nfs4_stateid *stateid)
-		fmode_t type)
 {
 	struct nfs_server *server = NFS_SERVER(state->inode);
 	struct nfs4_opendata *opendata;
 	if (IS_ERR(opendata))
 		return PTR_ERR(opendata);
 	nfs4_stateid_copy(&opendata->o_arg.u.delegation, stateid);
-	nfs_state_clear_delegation(state);
+	if (!test_bit(NFS_O_RDWR_STATE, &state->flags)) {
-	switch (type & (FMODE_READ|FMODE_WRITE)) {
-	case FMODE_READ|FMODE_WRITE:
-	case FMODE_WRITE:
 		err = nfs4_open_recover_helper(opendata, FMODE_READ|FMODE_WRITE);
 		if (err)
-			break;
+			goto out;
+	}
+	if (!test_bit(NFS_O_WRONLY_STATE, &state->flags)) {
 		err = nfs4_open_recover_helper(opendata, FMODE_WRITE);
 		if (err)
-			break;
+			goto out;
-		/* Fall through */
+	}
-	case FMODE_READ:
+	if (!test_bit(NFS_O_RDONLY_STATE, &state->flags)) {
 		err = nfs4_open_recover_helper(opendata, FMODE_READ);
+		if (err)
+			goto out;
 	}
+	nfs_state_clear_delegation(state);
+out:
 	nfs4_opendata_put(opendata);
 	return nfs4_handle_delegation_recall_error(server, state, stateid, NULL, err);
 }
 	if (!ctx) {
 		nfs4_init_sequence(&o_arg->seq_args, &o_res->seq_res, 1, 1);
 		data->is_recover = true;
+		task_setup_data.flags |= RPC_TASK_TIMEOUT;
 	} else {
 		nfs4_init_sequence(&o_arg->seq_args, &o_res->seq_res, 1, 0);
 		pnfs_lgopen_prepare(data, ctx);
 {
 	/* NFSv4.0 doesn't allow for delegation recovery on open expire */
 	nfs40_clear_delegation_stateid(state);
+	nfs_state_clear_open_state_flags(state);
 	return nfs4_open_expired(sp, state);
 }
 	return -NFS4ERR_EXPIRED;
 }
-static void nfs41_check_delegation_stateid(struct nfs4_state *state)
+static int nfs41_check_delegation_stateid(struct nfs4_state *state)
 {
 	struct nfs_server *server = NFS_SERVER(state->inode);
 	nfs4_stateid stateid;
 	struct nfs_delegation *delegation;
 	const struct cred *cred = NULL;
-	int status;
+	int status, ret = NFS_OK;
 	/* Get the delegation credential for use by test/free_stateid */
 	rcu_read_lock();
 	if (delegation == NULL) {
 		rcu_read_unlock();
 		nfs_state_clear_delegation(state);
-		return;
+		return NFS_OK;
 	}
 	nfs4_stateid_copy(&stateid, &delegation->stateid);
-	if (test_bit(NFS_DELEGATION_REVOKED, &delegation->flags)) {
-		rcu_read_unlock();
-		nfs_state_clear_delegation(state);
-		return;
-	}
 	if (!test_and_clear_bit(NFS_DELEGATION_TEST_EXPIRED,
 				&delegation->flags)) {
 		rcu_read_unlock();
-		return;
+		return NFS_OK;
 	}
 	if (delegation->cred)
 	trace_nfs4_test_delegation_stateid(state, NULL, status);
 	if (status == -NFS4ERR_EXPIRED || status == -NFS4ERR_BAD_STATEID)
 		nfs_finish_clear_delegation_stateid(state, &stateid);
+	else

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@@ -882,23 +882,23 @@ EXPORT_SYMBOL_GPL(dm_table_set_type); · 881 unmodified lines
882		882
883	/* validate the dax capability of the target device span */	883	/* validate the dax capability of the target device span */
884	int device_supports_dax(struct dm_target ti, struct dm_dev dev,	884	int device_supports_dax(struct dm_target ti, struct dm_dev dev,
885	sector_t start, sector_t len, void *data)	885	sector_t start, sector_t len, void *data)
886	{	886	{
887	int blocksize = (int ) data;	887	int blocksize = (int ) data;
888		888
889	return generic_fsdax_supported(dev->dax_dev, dev->bdev, blocksize,	889	return generic_fsdax_supported(dev->dax_dev, dev->bdev, blocksize,
890	start, len);	890	start, len);
891	}	891	}
892		892
893	/* Check devices support synchronous DAX */	893	/* Check devices support synchronous DAX */
894	static int device_synchronous(struct dm_target ti, struct dm_dev dev,	894	static int device_dax_synchronous(struct dm_target ti, struct dm_dev dev,
895	sector_t start, sector_t len, void *data)	895	sector_t start, sector_t len, void *data)
896	{	896	{
897	return dax_synchronous(dev->dax_dev);	897	return dev->dax_dev && dax_synchronous(dev->dax_dev);
898	}	898	}
899		899
900	bool dm_table_supports_dax(struct dm_table *t,	900	bool dm_table_supports_dax(struct dm_table *t,
901	iterate_devices_callout_fn iterate_fn, int *blocksize)	901	iterate_devices_callout_fn iterate_fn, int *blocksize)
902	{	902	{
903	struct dm_target *ti;	903	struct dm_target *ti;
904	unsigned i;	904	unsigned i;
@@ -911,7 +911,7 @@ bool dm_table_supports_dax(struct dm_table *t, · 6 unmodified lines
911	return false;	911	return false;
912		912
913	if (!ti->type->iterate_devices \|\|	913	if (!ti->type->iterate_devices \|\|
914	!ti->type->iterate_devices(ti, iterate_fn, blocksize))	914	!ti->type->iterate_devices(ti, iterate_fn, blocksize))
915	return false;	915	return false;
916	}	916	}
917		917
@@ -1921,7 +1921,7 @@ void dm_table_set_restrictions(struct dm_table t, struct request_queue q, · 1003 unmodified lines
1921		1921
1922	if (dm_table_supports_dax(t, device_supports_dax, &page_size)) {	1922	if (dm_table_supports_dax(t, device_supports_dax, &page_size)) {
1923	blk_queue_flag_set(QUEUE_FLAG_DAX, q);	1923	blk_queue_flag_set(QUEUE_FLAG_DAX, q);
1924	if (dm_table_supports_dax(t, device_synchronous, NULL))	1924	if (dm_table_supports_dax(t, device_dax_synchronous, NULL))
1925	set_dax_synchronous(t->md->dax_dev);	1925	set_dax_synchronous(t->md->dax_dev);
1926	}	1926	}
1927	else	1927	else

@@ -1664,9 +1664,9 @@ void iwl_mvm_rx_monitor_no_data(struct iwl_mvm mvm, struct napi_struct napi, · 1663 unmodified lines
1664	void iwl_mvm_rx_frame_release(struct iwl_mvm mvm, struct napi_struct napi,	1664	void iwl_mvm_rx_frame_release(struct iwl_mvm mvm, struct napi_struct napi,
1665	struct iwl_rx_cmd_buffer *rxb, int queue);	1665	struct iwl_rx_cmd_buffer *rxb, int queue);
1666	int iwl_mvm_notify_rx_queue(struct iwl_mvm *mvm, u32 rxq_mask,	1666	int iwl_mvm_notify_rx_queue(struct iwl_mvm *mvm, u32 rxq_mask,
1667	const u8 *data, u32 count);	1667	const u8 *data, u32 count, bool async);
1668	void iwl_mvm_rx_queue_notif(struct iwl_mvm mvm, struct iwl_rx_cmd_buffer rxb,	1668	void iwl_mvm_rx_queue_notif(struct iwl_mvm mvm, struct napi_struct napi,
1669	int queue);	1669	struct iwl_rx_cmd_buffer *rxb, int queue);
1670	void iwl_mvm_rx_tx_cmd(struct iwl_mvm mvm, struct iwl_rx_cmd_buffer rxb);	1670	void iwl_mvm_rx_tx_cmd(struct iwl_mvm mvm, struct iwl_rx_cmd_buffer rxb);
1671	void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,	1671	void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
1672	struct iwl_rx_cmd_buffer *rxb);	1672	struct iwl_rx_cmd_buffer *rxb);
@@ -1813,7 +1813,7 @@ iwl_mvm_vif_dbgfs_clean(struct iwl_mvm mvm, struct ieee80211_vif vif) · 140 unmodified lines
1813	#endif /* CONFIG_IWLWIFI_DEBUGFS */	1813	#endif /* CONFIG_IWLWIFI_DEBUGFS */
1814		1814
1815	/* rate scaling */	1815	/* rate scaling */
1816	int iwl_mvm_send_lq_cmd(struct iwl_mvm mvm, struct iwl_lq_cmd lq, bool sync);	1816	int iwl_mvm_send_lq_cmd(struct iwl_mvm mvm, struct iwl_lq_cmd lq);
1817	void iwl_mvm_update_frame_stats(struct iwl_mvm *mvm, u32 rate, bool agg);	1817	void iwl_mvm_update_frame_stats(struct iwl_mvm *mvm, u32 rate, bool agg);
1818	int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate);	1818	int rs_pretty_print_rate(char *buf, int bufsz, const u32 rate);
1819	void rs_update_last_rssi(struct iwl_mvm *mvm,	1819	void rs_update_last_rssi(struct iwl_mvm *mvm,

@@ -1088,7 +1088,7 @@ static void iwl_mvm_rx_mq(struct iwl_op_mode *op_mode, · 1087 unmodified lines
1088	iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0);	1088	iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, 0);
1089	else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,	1089	else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
1090	RX_QUEUES_NOTIFICATION)))	1090	RX_QUEUES_NOTIFICATION)))
1091	iwl_mvm_rx_queue_notif(mvm, rxb, 0);	1091	iwl_mvm_rx_queue_notif(mvm, napi, rxb, 0);
1092	else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))	1092	else if (cmd == WIDE_ID(LEGACY_GROUP, FRAME_RELEASE))
1093	iwl_mvm_rx_frame_release(mvm, napi, rxb, 0);	1093	iwl_mvm_rx_frame_release(mvm, napi, rxb, 0);
1094	else if (cmd == WIDE_ID(DATA_PATH_GROUP, RX_NO_DATA_NOTIF))	1094	else if (cmd == WIDE_ID(DATA_PATH_GROUP, RX_NO_DATA_NOTIF))
@@ -1812,7 +1812,7 @@ static void iwl_mvm_rx_mq_rss(struct iwl_op_mode *op_mode, · 717 unmodified lines
1812	iwl_mvm_rx_frame_release(mvm, napi, rxb, queue);	1812	iwl_mvm_rx_frame_release(mvm, napi, rxb, queue);
1813	else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,	1813	else if (unlikely(cmd == WIDE_ID(DATA_PATH_GROUP,
1814	RX_QUEUES_NOTIFICATION)))	1814	RX_QUEUES_NOTIFICATION)))
1815	iwl_mvm_rx_queue_notif(mvm, rxb, queue);	1815	iwl_mvm_rx_queue_notif(mvm, napi, rxb, queue);
1816	else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))	1816	else if (likely(cmd == WIDE_ID(LEGACY_GROUP, REPLY_RX_MPDU_CMD)))
1817	iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue);	1817	iwl_mvm_rx_mpdu_mq(mvm, napi, rxb, queue);
1818	}	1818	}

@@ -174,14 +174,14 @@ · 173 unmodified lines
174	#define AXP803_DCDC5_1140mV_STEPS 35	174	#define AXP803_DCDC5_1140mV_STEPS 35
175	#define AXP803_DCDC5_1140mV_END \	175	#define AXP803_DCDC5_1140mV_END \
176	(AXP803_DCDC5_1140mV_START + AXP803_DCDC5_1140mV_STEPS)	176	(AXP803_DCDC5_1140mV_START + AXP803_DCDC5_1140mV_STEPS)
177	#define AXP803_DCDC5_NUM_VOLTAGES 68	177	#define AXP803_DCDC5_NUM_VOLTAGES 69
178		178
179	#define AXP803_DCDC6_600mV_START 0x00	179	#define AXP803_DCDC6_600mV_START 0x00
180	#define AXP803_DCDC6_600mV_STEPS 50	180	#define AXP803_DCDC6_600mV_STEPS 50
181	#define AXP803_DCDC6_600mV_END \	181	#define AXP803_DCDC6_600mV_END \
182	(AXP803_DCDC6_600mV_START + AXP803_DCDC6_600mV_STEPS)	182	(AXP803_DCDC6_600mV_START + AXP803_DCDC6_600mV_STEPS)
183	#define AXP803_DCDC6_1120mV_START 0x33	183	#define AXP803_DCDC6_1120mV_START 0x33
184	#define AXP803_DCDC6_1120mV_STEPS 14	184	#define AXP803_DCDC6_1120mV_STEPS 20
185	#define AXP803_DCDC6_1120mV_END \	185	#define AXP803_DCDC6_1120mV_END \
186	(AXP803_DCDC6_1120mV_START + AXP803_DCDC6_1120mV_STEPS)	186	(AXP803_DCDC6_1120mV_START + AXP803_DCDC6_1120mV_STEPS)
187	#define AXP803_DCDC6_NUM_VOLTAGES 72	187	#define AXP803_DCDC6_NUM_VOLTAGES 72
@@ -240,7 +240,7 @@ · 52 unmodified lines
240	#define AXP806_DCDCA_600mV_END \	240	#define AXP806_DCDCA_600mV_END \
241	(AXP806_DCDCA_600mV_START + AXP806_DCDCA_600mV_STEPS)	241	(AXP806_DCDCA_600mV_START + AXP806_DCDCA_600mV_STEPS)
242	#define AXP806_DCDCA_1120mV_START 0x33	242	#define AXP806_DCDCA_1120mV_START 0x33
243	#define AXP806_DCDCA_1120mV_STEPS 14	243	#define AXP806_DCDCA_1120mV_STEPS 20
244	#define AXP806_DCDCA_1120mV_END \	244	#define AXP806_DCDCA_1120mV_END \
245	(AXP806_DCDCA_1120mV_START + AXP806_DCDCA_1120mV_STEPS)	245	(AXP806_DCDCA_1120mV_START + AXP806_DCDCA_1120mV_STEPS)
246	#define AXP806_DCDCA_NUM_VOLTAGES 72	246	#define AXP806_DCDCA_NUM_VOLTAGES 72
@@ -774,8 +774,8 @@ static const struct regulator_linear_range axp806_dcdcd_ranges[] = { · 527 unmodified lines
774	AXP806_DCDCD_600mV_END,	774	AXP806_DCDCD_600mV_END,
775	20000),	775	20000),
776	REGULATOR_LINEAR_RANGE(1600000,	776	REGULATOR_LINEAR_RANGE(1600000,
777	AXP806_DCDCD_600mV_START,	777	AXP806_DCDCD_1600mV_START,
778	AXP806_DCDCD_600mV_END,	778	AXP806_DCDCD_1600mV_END,
779	100000),	779	100000),
780	};	780	};
781		781