Pull i2c fixes from Andi Shyti: "Fixes mainly for teardown and resource handling, runtime PM and hardware-specific controller issues: - fix debugfs use-after-free when removing the adapter - designware: apply interrupt mask quirk for HJMC3001 - imx-lpi2c: avoid target accesses on master-only controllers - mux: release channel node when adapter registration fails - qcom-cci: fix autosuspend and runtime PM cleanup on removal - qcom-geni: fix timing parameters for 32 MHz clock" * tag 'i2c-fixes-7.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux: i2c: core: fix debugfs UAF on adapter removal i2c: imx-lpi2c: avoid accessing target registers on master-only controllers i2c: qcom-cci: fix autosuspend cleanup i2c: designware: Enable interrupt mask workaround for HJMC3001 i2c: qcom-geni: update frequency table to fix timing parameters i2c: mux: Fix channel node leak on adapter add failure
Unified · Split
| @@ -272,7 +272,7 @@ static const struct acpi_device_id dw_i2c_acpi_match[] = { · 271 unmodified lines | ||
| 272 | 272 | { "HISI02A1", 0 }, |
| 273 | 273 | { "HISI02A2", 0 }, |
| 274 | 274 | { "HISI02A3", 0 }, |
| 275 | − { "HJMC3001", 0 }, | |
| 275 | + { "HJMC3001", ACCESS_INTR_MASK }, | |
| 276 | 276 | { "HYGO0010", ACCESS_INTR_MASK }, |
| 277 | 277 | { "INT33C2", 0 }, |
| 278 | 278 | { "INT33C3", 0 }, |
| @@ -29,6 +29,7 @@ · 28 unmodified lines | ||
| 29 | 29 | |
| 30 | 30 | #define DRIVER_NAME "imx-lpi2c" |
| 31 | 31 | |
| 32 | +#define LPI2C_VERID 0x00 /* i2c version ID */ | |
| 32 | 33 | #define LPI2C_PARAM 0x04 /* i2c RX/TX FIFO size */ |
| 33 | 34 | #define LPI2C_MCR 0x10 /* i2c contrl register */ |
| 34 | 35 | #define LPI2C_MSR 0x14 /* i2c status register */ |
| @@ -136,6 +137,9 @@ · 101 unmodified lines | ||
| 136 | 137 | #define I2C_PM_LONG_TIMEOUT_MS 1000 /* Avoid dead lock caused by big clock prepare lock */ |
| 137 | 138 | #define I2C_DMA_THRESHOLD 8 /* bytes */ |
| 138 | 139 | |
| 140 | +/* Bit 0 indicates the presence of the target feature */ | |
| 141 | +#define VERID_FEATURE_TARGET_PRESENT BIT(0) | |
| 142 | + | |
| 139 | 143 | enum lpi2c_imx_mode { |
| 140 | 144 | STANDARD, /* 100+Kbps */ |
| 141 | 145 | FAST, /* 400+Kbps */ |
| @@ -194,6 +198,7 @@ struct lpi2c_imx_struct { · 52 unmodified lines | ||
| 194 | 198 | bool can_use_dma; |
| 195 | 199 | struct lpi2c_imx_dma *dma; |
| 196 | 200 | struct i2c_client *target; |
| 201 | + bool target_supported; | |
| 197 | 202 | int irq; |
| 198 | 203 | const struct imx_lpi2c_hwdata *hwdata; |
| 199 | 204 | }; |
| @@ -1330,6 +1335,10 @@ static int lpi2c_imx_register_target(struct i2c_client *client) · 1130 unmodified lines | ||
| 1330 | 1335 | struct lpi2c_imx_struct *lpi2c_imx = i2c_get_adapdata(client->adapter); |
| 1331 | 1336 | int ret; |
| 1332 | 1337 | |
| 1338 | + /* Reject target-mode registration on controllers that don't support it. */ | |
| 1339 | + if (!lpi2c_imx->target_supported) | |
| 1340 | + return -EOPNOTSUPP; | |
| 1341 | + | |
| 1333 | 1342 | if (lpi2c_imx->target) |
| 1334 | 1343 | return -EBUSY; |
| 1335 | 1344 | |
| @@ -1546,13 +1555,23 @@ static int lpi2c_imx_probe(struct platform_device *pdev) · 210 unmodified lines | ||
| 1546 | 1555 | pm_runtime_enable(&pdev->dev); |
| 1547 | 1556 | |
| 1548 | 1557 | /* |
| 1549 | − * Reset all internal controller registers of both Master and Target | |
| 1550 | − * to avoid effects of previous status. | |
| 1558 | + * Reset all internal controller registers to avoid effects of any | |
| 1559 | + * state left over from a previous stage (e.g. the bootloader). | |
| 1560 | + * | |
| 1561 | + * The Master block (MCR) is present on every controller, so reset it | |
| 1562 | + * unconditionally. VERID shows whether the target feature is supported. | |
| 1563 | + * Do not touch the Target block (SCR) on a master-only controller to | |
| 1564 | + * avoid an asynchronous SError. | |
| 1551 | 1565 | */ |
| 1552 | 1566 | writel(MCR_RST, lpi2c_imx->base + LPI2C_MCR); |
| 1553 | − writel(SCR_RST, lpi2c_imx->base + LPI2C_SCR); | |
| 1554 | 1567 | writel(0, lpi2c_imx->base + LPI2C_MCR); |
| 1555 | − writel(0, lpi2c_imx->base + LPI2C_SCR); | |
| 1568 | + | |
| 1569 | + lpi2c_imx->target_supported = !!(readl(lpi2c_imx->base + LPI2C_VERID) & | |
| 1570 | + VERID_FEATURE_TARGET_PRESENT); | |
| 1571 | + if (lpi2c_imx->target_supported) { | |
| 1572 | + writel(SCR_RST, lpi2c_imx->base + LPI2C_SCR); | |
| 1573 | + writel(0, lpi2c_imx->base + LPI2C_SCR); | |
| 1574 | + } | |
| 1556 | 1575 | |
| 1557 | 1576 | ret = devm_request_irq(&pdev->dev, lpi2c_imx->irq, lpi2c_imx_isr, IRQF_NO_SUSPEND, |
| 1558 | 1577 | pdev->name, lpi2c_imx); |
| @@ -595,9 +595,11 @@ static int cci_probe(struct platform_device *pdev) · 594 unmodified lines | ||
| 595 | 595 | goto disable_clocks; |
| 596 | 596 | |
| 597 | 597 | pm_runtime_set_autosuspend_delay(dev, MSEC_PER_SEC); |
| 598 | + ret = devm_pm_runtime_set_active_enabled(dev); | |
| 599 | + if (ret) | |
| 600 | + goto disable_clocks; | |
| 601 | + | |
| 598 | 602 | pm_runtime_use_autosuspend(dev); |
| 599 | − pm_runtime_set_active(dev); | |
| 600 | − pm_runtime_enable(dev); | |
| 601 | 603 | |
| 602 | 604 | for (i = 0; i < cci->data->num_masters; i++) { |
| 603 | 605 | if (!cci->master[i].cci) |
| @@ -613,8 +615,6 @@ static int cci_probe(struct platform_device *pdev) · 9 unmodified lines | ||
| 613 | 615 | return 0; |
| 614 | 616 | |
| 615 | 617 | error_i2c: |
| 616 | − pm_runtime_disable(dev); | |
| 617 | − pm_runtime_dont_use_autosuspend(dev); | |
| 618 | 618 | |
| 619 | 619 | for (--i ; i >= 0; i--) { |
| 620 | 620 | if (cci->master[i].cci) { |
| @@ -640,9 +640,6 @@ static void cci_remove(struct platform_device *pdev) · 19 unmodified lines | ||
| 640 | 640 | cci_halt(cci, i); |
| 641 | 641 | } |
| 642 | 642 | } |
| 643 | − | |
| 644 | − pm_runtime_disable(&pdev->dev); | |
| 645 | − pm_runtime_set_suspended(&pdev->dev); | |
| 646 | 643 | } |
| 647 | 644 | |
| 648 | 645 | static const struct cci_data cci_v1_data = { |
| @@ -188,8 +188,8 @@ static const struct geni_i2c_clk_fld geni_i2c_clk_map_19p2mhz[] = { · 187 unmodified lines | ||
| 188 | 188 | |
| 189 | 189 | /* source_clock = 32 MHz */ |
| 190 | 190 | static const struct geni_i2c_clk_fld geni_i2c_clk_map_32mhz[] = { |
| 191 | − { I2C_MAX_STANDARD_MODE_FREQ, 8, 14, 18, 38 }, | |
| 192 | − { I2C_MAX_FAST_MODE_FREQ, 4, 3, 9, 19 }, | |
| 191 | + { I2C_MAX_STANDARD_MODE_FREQ, 12, 9, 10, 26 }, | |
| 192 | + { I2C_MAX_FAST_MODE_FREQ, 4, 3, 9, 19 }, | |
| 193 | 193 | { I2C_MAX_FAST_MODE_PLUS_FREQ, 2, 3, 5, 15 }, |
| 194 | 194 | {} |
| 195 | 195 | }; |
| @@ -1816,6 +1816,12 @@ void i2c_del_adapter(struct i2c_adapter *adap) · 1815 unmodified lines | ||
| 1816 | 1816 | return; |
| 1817 | 1817 | } |
| 1818 | 1818 | |
| 1819 | + /* | |
| 1820 | + * This drains any in-flight writers, so all | |
| 1821 | + * clients will be caught by i2c_deregister_clients(). | |
| 1822 | + */ | |
| 1823 | + device_remove_file(&adap->dev, &dev_attr_new_device); | |
| 1824 | + | |
| 1819 | 1825 | i2c_acpi_remove_space_handler(adap); |
| 1820 | 1826 | |
| 1821 | 1827 | i2c_deregister_clients(adap); |
| @@ -408,6 +408,7 @@ int i2c_mux_add_adapter(struct i2c_mux_core *muxc, · 407 unmodified lines | ||
| 408 | 408 | return 0; |
| 409 | 409 | |
| 410 | 410 | err_free_priv: |
| 411 | + of_node_put(priv->adap.dev.of_node); | |
| 411 | 412 | kfree(priv); |
| 412 | 413 | return ret; |
| 413 | 414 | } |