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b43: N-PHY: define registers names for 2056 radio

Rafał Miłecki committed 16 years ago

Commit 794830e1 parent 038aaa31 file · +522 −0Browse files

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drivers/net/wireless/b43/radio_2056.h+522−0
@@ -4,6 +4,9 @@ · 3 unmodified lines
44
55 Copyright (c) 2010 Rafał Miłecki <zajec5@gmail.com>
66
7+ Some parts of the code in this file are derived from the brcm80211
8+ driver Copyright (c) 2010 Broadcom Corporation
9+
710 This program is free software; you can redistribute it and/or modify
811 it under the terms of the GNU General Public License as published by
912 the Free Software Foundation; either version 2 of the License, or
@@ -28,6 +31,525 @@ · 18 unmodified lines
2831
2932 #include "tables_nphy.h"
3033
34+#define B2056_SYN (0x0 << 12)
35+#define B2056_TX0 (0x2 << 12)
36+#define B2056_TX1 (0x3 << 12)
37+#define B2056_RX0 (0x6 << 12)
38+#define B2056_RX1 (0x7 << 12)
39+#define B2056_ALLTX (0xE << 12)
40+#define B2056_ALLRX (0xF << 12)
41+
42+#define B2056_SYN_RESERVED_ADDR0 0x00
43+#define B2056_SYN_IDCODE 0x01
44+#define B2056_SYN_RESERVED_ADDR2 0x02
45+#define B2056_SYN_RESERVED_ADDR3 0x03
46+#define B2056_SYN_RESERVED_ADDR4 0x04
47+#define B2056_SYN_RESERVED_ADDR5 0x05
48+#define B2056_SYN_RESERVED_ADDR6 0x06
49+#define B2056_SYN_RESERVED_ADDR7 0x07
50+#define B2056_SYN_COM_CTRL 0x08
51+#define B2056_SYN_COM_PU 0x09
52+#define B2056_SYN_COM_OVR 0x0A
53+#define B2056_SYN_COM_RESET 0x0B
54+#define B2056_SYN_COM_RCAL 0x0C
55+#define B2056_SYN_COM_RC_RXLPF 0x0D
56+#define B2056_SYN_COM_RC_TXLPF 0x0E
57+#define B2056_SYN_COM_RC_RXHPF 0x0F
58+#define B2056_SYN_RESERVED_ADDR16 0x10
59+#define B2056_SYN_RESERVED_ADDR17 0x11
60+#define B2056_SYN_RESERVED_ADDR18 0x12
61+#define B2056_SYN_RESERVED_ADDR19 0x13
62+#define B2056_SYN_RESERVED_ADDR20 0x14
63+#define B2056_SYN_RESERVED_ADDR21 0x15
64+#define B2056_SYN_RESERVED_ADDR22 0x16
65+#define B2056_SYN_RESERVED_ADDR23 0x17
66+#define B2056_SYN_RESERVED_ADDR24 0x18
67+#define B2056_SYN_RESERVED_ADDR25 0x19
68+#define B2056_SYN_RESERVED_ADDR26 0x1A
69+#define B2056_SYN_RESERVED_ADDR27 0x1B
70+#define B2056_SYN_RESERVED_ADDR28 0x1C
71+#define B2056_SYN_RESERVED_ADDR29 0x1D
72+#define B2056_SYN_RESERVED_ADDR30 0x1E
73+#define B2056_SYN_RESERVED_ADDR31 0x1F
74+#define B2056_SYN_GPIO_MASTER1 0x20
75+#define B2056_SYN_GPIO_MASTER2 0x21
76+#define B2056_SYN_TOPBIAS_MASTER 0x22
77+#define B2056_SYN_TOPBIAS_RCAL 0x23
78+#define B2056_SYN_AFEREG 0x24
79+#define B2056_SYN_TEMPPROCSENSE 0x25
80+#define B2056_SYN_TEMPPROCSENSEIDAC 0x26
81+#define B2056_SYN_TEMPPROCSENSERCAL 0x27
82+#define B2056_SYN_LPO 0x28
83+#define B2056_SYN_VDDCAL_MASTER 0x29
84+#define B2056_SYN_VDDCAL_IDAC 0x2A
85+#define B2056_SYN_VDDCAL_STATUS 0x2B
86+#define B2056_SYN_RCAL_MASTER 0x2C
87+#define B2056_SYN_RCAL_CODE_OUT 0x2D
88+#define B2056_SYN_RCCAL_CTRL0 0x2E
89+#define B2056_SYN_RCCAL_CTRL1 0x2F
90+#define B2056_SYN_RCCAL_CTRL2 0x30
91+#define B2056_SYN_RCCAL_CTRL3 0x31
92+#define B2056_SYN_RCCAL_CTRL4 0x32
93+#define B2056_SYN_RCCAL_CTRL5 0x33
94+#define B2056_SYN_RCCAL_CTRL6 0x34
95+#define B2056_SYN_RCCAL_CTRL7 0x35
96+#define B2056_SYN_RCCAL_CTRL8 0x36
97+#define B2056_SYN_RCCAL_CTRL9 0x37
98+#define B2056_SYN_RCCAL_CTRL10 0x38
99+#define B2056_SYN_RCCAL_CTRL11 0x39
100+#define B2056_SYN_ZCAL_SPARE1 0x3A
101+#define B2056_SYN_ZCAL_SPARE2 0x3B
102+#define B2056_SYN_PLL_MAST1 0x3C
103+#define B2056_SYN_PLL_MAST2 0x3D
104+#define B2056_SYN_PLL_MAST3 0x3E
105+#define B2056_SYN_PLL_BIAS_RESET 0x3F
106+#define B2056_SYN_PLL_XTAL0 0x40
107+#define B2056_SYN_PLL_XTAL1 0x41
108+#define B2056_SYN_PLL_XTAL3 0x42
109+#define B2056_SYN_PLL_XTAL4 0x43
110+#define B2056_SYN_PLL_XTAL5 0x44
111+#define B2056_SYN_PLL_XTAL6 0x45
112+#define B2056_SYN_PLL_REFDIV 0x46
113+#define B2056_SYN_PLL_PFD 0x47
114+#define B2056_SYN_PLL_CP1 0x48
115+#define B2056_SYN_PLL_CP2 0x49
116+#define B2056_SYN_PLL_CP3 0x4A
117+#define B2056_SYN_PLL_LOOPFILTER1 0x4B
118+#define B2056_SYN_PLL_LOOPFILTER2 0x4C
119+#define B2056_SYN_PLL_LOOPFILTER3 0x4D
120+#define B2056_SYN_PLL_LOOPFILTER4 0x4E
121+#define B2056_SYN_PLL_LOOPFILTER5 0x4F
122+#define B2056_SYN_PLL_MMD1 0x50
123+#define B2056_SYN_PLL_MMD2 0x51
124+#define B2056_SYN_PLL_VCO1 0x52
125+#define B2056_SYN_PLL_VCO2 0x53
126+#define B2056_SYN_PLL_MONITOR1 0x54
127+#define B2056_SYN_PLL_MONITOR2 0x55
128+#define B2056_SYN_PLL_VCOCAL1 0x56
129+#define B2056_SYN_PLL_VCOCAL2 0x57
130+#define B2056_SYN_PLL_VCOCAL4 0x58
131+#define B2056_SYN_PLL_VCOCAL5 0x59
132+#define B2056_SYN_PLL_VCOCAL6 0x5A
133+#define B2056_SYN_PLL_VCOCAL7 0x5B
134+#define B2056_SYN_PLL_VCOCAL8 0x5C
135+#define B2056_SYN_PLL_VCOCAL9 0x5D
136+#define B2056_SYN_PLL_VCOCAL10 0x5E
137+#define B2056_SYN_PLL_VCOCAL11 0x5F
138+#define B2056_SYN_PLL_VCOCAL12 0x60
139+#define B2056_SYN_PLL_VCOCAL13 0x61
140+#define B2056_SYN_PLL_VREG 0x62
141+#define B2056_SYN_PLL_STATUS1 0x63
142+#define B2056_SYN_PLL_STATUS2 0x64
143+#define B2056_SYN_PLL_STATUS3 0x65
144+#define B2056_SYN_LOGEN_PU0 0x66
145+#define B2056_SYN_LOGEN_PU1 0x67
146+#define B2056_SYN_LOGEN_PU2 0x68
147+#define B2056_SYN_LOGEN_PU3 0x69
148+#define B2056_SYN_LOGEN_PU5 0x6A
149+#define B2056_SYN_LOGEN_PU6 0x6B
150+#define B2056_SYN_LOGEN_PU7 0x6C
151+#define B2056_SYN_LOGEN_PU8 0x6D
152+#define B2056_SYN_LOGEN_BIAS_RESET 0x6E
153+#define B2056_SYN_LOGEN_RCCR1 0x6F
154+#define B2056_SYN_LOGEN_VCOBUF1 0x70
155+#define B2056_SYN_LOGEN_MIXER1 0x71
156+#define B2056_SYN_LOGEN_MIXER2 0x72
157+#define B2056_SYN_LOGEN_BUF1 0x73
158+#define B2056_SYN_LOGENBUF2 0x74
159+#define B2056_SYN_LOGEN_BUF3 0x75
160+#define B2056_SYN_LOGEN_BUF4 0x76
161+#define B2056_SYN_LOGEN_DIV1 0x77
162+#define B2056_SYN_LOGEN_DIV2 0x78
163+#define B2056_SYN_LOGEN_DIV3 0x79
164+#define B2056_SYN_LOGEN_ACL1 0x7A
165+#define B2056_SYN_LOGEN_ACL2 0x7B
166+#define B2056_SYN_LOGEN_ACL3 0x7C
167+#define B2056_SYN_LOGEN_ACL4 0x7D
168+#define B2056_SYN_LOGEN_ACL5 0x7E
169+#define B2056_SYN_LOGEN_ACL6 0x7F
170+#define B2056_SYN_LOGEN_ACLOUT 0x80
171+#define B2056_SYN_LOGEN_ACLCAL1 0x81
172+#define B2056_SYN_LOGEN_ACLCAL2 0x82
173+#define B2056_SYN_LOGEN_ACLCAL3 0x83
174+#define B2056_SYN_CALEN 0x84
175+#define B2056_SYN_LOGEN_PEAKDET1 0x85
176+#define B2056_SYN_LOGEN_CORE_ACL_OVR 0x86
177+#define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87
178+#define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88
179+#define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89
180+#define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8A
181+#define B2056_SYN_LOGEN_VCOBUF2 0x8B
182+#define B2056_SYN_LOGEN_MIXER3 0x8C
183+#define B2056_SYN_LOGEN_BUF5 0x8D
184+#define B2056_SYN_LOGEN_BUF6 0x8E
185+#define B2056_SYN_LOGEN_CBUFRX1 0x8F
186+#define B2056_SYN_LOGEN_CBUFRX2 0x90
187+#define B2056_SYN_LOGEN_CBUFRX3 0x91
188+#define B2056_SYN_LOGEN_CBUFRX4 0x92
189+#define B2056_SYN_LOGEN_CBUFTX1 0x93
190+#define B2056_SYN_LOGEN_CBUFTX2 0x94
191+#define B2056_SYN_LOGEN_CBUFTX3 0x95
192+#define B2056_SYN_LOGEN_CBUFTX4 0x96
193+#define B2056_SYN_LOGEN_CMOSRX1 0x97
194+#define B2056_SYN_LOGEN_CMOSRX2 0x98
195+#define B2056_SYN_LOGEN_CMOSRX3 0x99
196+#define B2056_SYN_LOGEN_CMOSRX4 0x9A
197+#define B2056_SYN_LOGEN_CMOSTX1 0x9B
198+#define B2056_SYN_LOGEN_CMOSTX2 0x9C
199+#define B2056_SYN_LOGEN_CMOSTX3 0x9D
200+#define B2056_SYN_LOGEN_CMOSTX4 0x9E
201+#define B2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9F
202+#define B2056_SYN_LOGEN_MIXER3_OVRVAL 0xA0
203+#define B2056_SYN_LOGEN_BUF5_OVRVAL 0xA1
204+#define B2056_SYN_LOGEN_BUF6_OVRVAL 0xA2
205+#define B2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xA3
206+#define B2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xA4
207+#define B2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xA5
208+#define B2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xA6
209+#define B2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xA7
210+#define B2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xA8
211+#define B2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xA9
212+#define B2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xAA
213+#define B2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xAB
214+#define B2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xAC
215+#define B2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xAD
216+#define B2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xAE
217+#define B2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xAF
218+#define B2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xB0
219+#define B2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xB1
220+#define B2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xB2
221+#define B2056_SYN_LOGEN_ACL_WAITCNT 0xB3
222+#define B2056_SYN_LOGEN_CORE_CALVALID 0xB4
223+#define B2056_SYN_LOGEN_RX_CMOS_CALVALID 0xB5
224+#define B2056_SYN_LOGEN_TX_CMOS_VALID 0xB6
225+
226+#define B2056_TX_RESERVED_ADDR0 0x00
227+#define B2056_TX_IDCODE 0x01
228+#define B2056_TX_RESERVED_ADDR2 0x02
229+#define B2056_TX_RESERVED_ADDR3 0x03
230+#define B2056_TX_RESERVED_ADDR4 0x04
231+#define B2056_TX_RESERVED_ADDR5 0x05
232+#define B2056_TX_RESERVED_ADDR6 0x06
233+#define B2056_TX_RESERVED_ADDR7 0x07
234+#define B2056_TX_COM_CTRL 0x08
235+#define B2056_TX_COM_PU 0x09
236+#define B2056_TX_COM_OVR 0x0A
237+#define B2056_TX_COM_RESET 0x0B
238+#define B2056_TX_COM_RCAL 0x0C
239+#define B2056_TX_COM_RC_RXLPF 0x0D
240+#define B2056_TX_COM_RC_TXLPF 0x0E
241+#define B2056_TX_COM_RC_RXHPF 0x0F
242+#define B2056_TX_RESERVED_ADDR16 0x10
243+#define B2056_TX_RESERVED_ADDR17 0x11
244+#define B2056_TX_RESERVED_ADDR18 0x12
245+#define B2056_TX_RESERVED_ADDR19 0x13
246+#define B2056_TX_RESERVED_ADDR20 0x14
247+#define B2056_TX_RESERVED_ADDR21 0x15
248+#define B2056_TX_RESERVED_ADDR22 0x16
249+#define B2056_TX_RESERVED_ADDR23 0x17
250+#define B2056_TX_RESERVED_ADDR24 0x18
251+#define B2056_TX_RESERVED_ADDR25 0x19
252+#define B2056_TX_RESERVED_ADDR26 0x1A
253+#define B2056_TX_RESERVED_ADDR27 0x1B
254+#define B2056_TX_RESERVED_ADDR28 0x1C
255+#define B2056_TX_RESERVED_ADDR29 0x1D
256+#define B2056_TX_RESERVED_ADDR30 0x1E
257+#define B2056_TX_RESERVED_ADDR31 0x1F
258+#define B2056_TX_IQCAL_GAIN_BW 0x20
259+#define B2056_TX_LOFT_FINE_I 0x21
260+#define B2056_TX_LOFT_FINE_Q 0x22
261+#define B2056_TX_LOFT_COARSE_I 0x23
262+#define B2056_TX_LOFT_COARSE_Q 0x24
263+#define B2056_TX_TX_COM_MASTER1 0x25
264+#define B2056_TX_TX_COM_MASTER2 0x26
265+#define B2056_TX_RXIQCAL_TXMUX 0x27
266+#define B2056_TX_TX_SSI_MASTER 0x28
267+#define B2056_TX_IQCAL_VCM_HG 0x29
268+#define B2056_TX_IQCAL_IDAC 0x2A
269+#define B2056_TX_TSSI_VCM 0x2B
270+#define B2056_TX_TX_AMP_DET 0x2C
271+#define B2056_TX_TX_SSI_MUX 0x2D
272+#define B2056_TX_TSSIA 0x2E
273+#define B2056_TX_TSSIG 0x2F
274+#define B2056_TX_TSSI_MISC1 0x30
275+#define B2056_TX_TSSI_MISC2 0x31
276+#define B2056_TX_TSSI_MISC3 0x32
277+#define B2056_TX_PA_SPARE1 0x33
278+#define B2056_TX_PA_SPARE2 0x34
279+#define B2056_TX_INTPAA_MASTER 0x35
280+#define B2056_TX_INTPAA_GAIN 0x36
281+#define B2056_TX_INTPAA_BOOST_TUNE 0x37
282+#define B2056_TX_INTPAA_IAUX_STAT 0x38
283+#define B2056_TX_INTPAA_IAUX_DYN 0x39
284+#define B2056_TX_INTPAA_IMAIN_STAT 0x3A
285+#define B2056_TX_INTPAA_IMAIN_DYN 0x3B
286+#define B2056_TX_INTPAA_CASCBIAS 0x3C
287+#define B2056_TX_INTPAA_PASLOPE 0x3D
288+#define B2056_TX_INTPAA_PA_MISC 0x3E
289+#define B2056_TX_INTPAG_MASTER 0x3F
290+#define B2056_TX_INTPAG_GAIN 0x40
291+#define B2056_TX_INTPAG_BOOST_TUNE 0x41
292+#define B2056_TX_INTPAG_IAUX_STAT 0x42
293+#define B2056_TX_INTPAG_IAUX_DYN 0x43
294+#define B2056_TX_INTPAG_IMAIN_STAT 0x44
295+#define B2056_TX_INTPAG_IMAIN_DYN 0x45
296+#define B2056_TX_INTPAG_CASCBIAS 0x46
297+#define B2056_TX_INTPAG_PASLOPE 0x47
298+#define B2056_TX_INTPAG_PA_MISC 0x48
299+#define B2056_TX_PADA_MASTER 0x49
300+#define B2056_TX_PADA_IDAC 0x4A
301+#define B2056_TX_PADA_CASCBIAS 0x4B
302+#define B2056_TX_PADA_GAIN 0x4C
303+#define B2056_TX_PADA_BOOST_TUNE 0x4D
304+#define B2056_TX_PADA_SLOPE 0x4E
305+#define B2056_TX_PADG_MASTER 0x4F
306+#define B2056_TX_PADG_IDAC 0x50
307+#define B2056_TX_PADG_CASCBIAS 0x51
308+#define B2056_TX_PADG_GAIN 0x52
309+#define B2056_TX_PADG_BOOST_TUNE 0x53
310+#define B2056_TX_PADG_SLOPE 0x54
311+#define B2056_TX_PGAA_MASTER 0x55
312+#define B2056_TX_PGAA_IDAC 0x56
313+#define B2056_TX_PGAA_GAIN 0x57
314+#define B2056_TX_PGAA_BOOST_TUNE 0x58
315+#define B2056_TX_PGAA_SLOPE 0x59
316+#define B2056_TX_PGAA_MISC 0x5A
317+#define B2056_TX_PGAG_MASTER 0x5B
318+#define B2056_TX_PGAG_IDAC 0x5C
319+#define B2056_TX_PGAG_GAIN 0x5D
320+#define B2056_TX_PGAG_BOOST_TUNE 0x5E
321+#define B2056_TX_PGAG_SLOPE 0x5F
322+#define B2056_TX_PGAG_MISC 0x60
323+#define B2056_TX_MIXA_MASTER 0x61
324+#define B2056_TX_MIXA_BOOST_TUNE 0x62
325+#define B2056_TX_MIXG 0x63
326+#define B2056_TX_MIXG_BOOST_TUNE 0x64
327+#define B2056_TX_BB_GM_MASTER 0x65
328+#define B2056_TX_GMBB_GM 0x66
329+#define B2056_TX_GMBB_IDAC 0x67
330+#define B2056_TX_TXLPF_MASTER 0x68
331+#define B2056_TX_TXLPF_RCCAL 0x69
332+#define B2056_TX_TXLPF_RCCAL_OFF0 0x6A
333+#define B2056_TX_TXLPF_RCCAL_OFF1 0x6B
334+#define B2056_TX_TXLPF_RCCAL_OFF2 0x6C
335+#define B2056_TX_TXLPF_RCCAL_OFF3 0x6D
336+#define B2056_TX_TXLPF_RCCAL_OFF4 0x6E
337+#define B2056_TX_TXLPF_RCCAL_OFF5 0x6F
338+#define B2056_TX_TXLPF_RCCAL_OFF6 0x70
339+#define B2056_TX_TXLPF_BW 0x71
340+#define B2056_TX_TXLPF_GAIN 0x72
341+#define B2056_TX_TXLPF_IDAC 0x73
342+#define B2056_TX_TXLPF_IDAC_0 0x74
343+#define B2056_TX_TXLPF_IDAC_1 0x75
344+#define B2056_TX_TXLPF_IDAC_2 0x76
345+#define B2056_TX_TXLPF_IDAC_3 0x77
346+#define B2056_TX_TXLPF_IDAC_4 0x78
347+#define B2056_TX_TXLPF_IDAC_5 0x79
348+#define B2056_TX_TXLPF_IDAC_6 0x7A
349+#define B2056_TX_TXLPF_OPAMP_IDAC 0x7B
350+#define B2056_TX_TXLPF_MISC 0x7C
351+#define B2056_TX_TXSPARE1 0x7D
352+#define B2056_TX_TXSPARE2 0x7E
353+#define B2056_TX_TXSPARE3 0x7F
354+#define B2056_TX_TXSPARE4 0x80
355+#define B2056_TX_TXSPARE5 0x81
356+#define B2056_TX_TXSPARE6 0x82
357+#define B2056_TX_TXSPARE7 0x83
358+#define B2056_TX_TXSPARE8 0x84
359+#define B2056_TX_TXSPARE9 0x85
360+#define B2056_TX_TXSPARE10 0x86
361+#define B2056_TX_TXSPARE11 0x87
362+#define B2056_TX_TXSPARE12 0x88
363+#define B2056_TX_TXSPARE13 0x89
364+#define B2056_TX_TXSPARE14 0x8A
365+#define B2056_TX_TXSPARE15 0x8B
366+#define B2056_TX_TXSPARE16 0x8C
367+#define B2056_TX_STATUS_INTPA_GAIN 0x8D
368+#define B2056_TX_STATUS_PAD_GAIN 0x8E
369+#define B2056_TX_STATUS_PGA_GAIN 0x8F
370+#define B2056_TX_STATUS_GM_TXLPF_GAIN 0x90
371+#define B2056_TX_STATUS_TXLPF_BW 0x91
372+#define B2056_TX_STATUS_TXLPF_RC 0x92
373+#define B2056_TX_GMBB_IDAC0 0x93
374+#define B2056_TX_GMBB_IDAC1 0x94
375+#define B2056_TX_GMBB_IDAC2 0x95
376+#define B2056_TX_GMBB_IDAC3 0x96
377+#define B2056_TX_GMBB_IDAC4 0x97
378+#define B2056_TX_GMBB_IDAC5 0x98
379+#define B2056_TX_GMBB_IDAC6 0x99
380+#define B2056_TX_GMBB_IDAC7 0x9A
381+
382+#define B2056_RX_RESERVED_ADDR0 0x00
383+#define B2056_RX_IDCODE 0x01
384+#define B2056_RX_RESERVED_ADDR2 0x02
385+#define B2056_RX_RESERVED_ADDR3 0x03
386+#define B2056_RX_RESERVED_ADDR4 0x04
387+#define B2056_RX_RESERVED_ADDR5 0x05
388+#define B2056_RX_RESERVED_ADDR6 0x06
389+#define B2056_RX_RESERVED_ADDR7 0x07
390+#define B2056_RX_COM_CTRL 0x08
391+#define B2056_RX_COM_PU 0x09
392+#define B2056_RX_COM_OVR 0x0A
393+#define B2056_RX_COM_RESET 0x0B
394+#define B2056_RX_COM_RCAL 0x0C
395+#define B2056_RX_COM_RC_RXLPF 0x0D
396+#define B2056_RX_COM_RC_TXLPF 0x0E
397+#define B2056_RX_COM_RC_RXHPF 0x0F
398+#define B2056_RX_RESERVED_ADDR16 0x10
399+#define B2056_RX_RESERVED_ADDR17 0x11
400+#define B2056_RX_RESERVED_ADDR18 0x12
401+#define B2056_RX_RESERVED_ADDR19 0x13
402+#define B2056_RX_RESERVED_ADDR20 0x14
403+#define B2056_RX_RESERVED_ADDR21 0x15
404+#define B2056_RX_RESERVED_ADDR22 0x16
405+#define B2056_RX_RESERVED_ADDR23 0x17
406+#define B2056_RX_RESERVED_ADDR24 0x18
407+#define B2056_RX_RESERVED_ADDR25 0x19
408+#define B2056_RX_RESERVED_ADDR26 0x1A
409+#define B2056_RX_RESERVED_ADDR27 0x1B
410+#define B2056_RX_RESERVED_ADDR28 0x1C
411+#define B2056_RX_RESERVED_ADDR29 0x1D
412+#define B2056_RX_RESERVED_ADDR30 0x1E
413+#define B2056_RX_RESERVED_ADDR31 0x1F
414+#define B2056_RX_RXIQCAL_RXMUX 0x20
415+#define B2056_RX_RSSI_PU 0x21
416+#define B2056_RX_RSSI_SEL 0x22
417+#define B2056_RX_RSSI_GAIN 0x23
418+#define B2056_RX_RSSI_NB_IDAC 0x24
419+#define B2056_RX_RSSI_WB2I_IDAC_1 0x25
420+#define B2056_RX_RSSI_WB2I_IDAC_2 0x26
421+#define B2056_RX_RSSI_WB2Q_IDAC_1 0x27
422+#define B2056_RX_RSSI_WB2Q_IDAC_2 0x28
423+#define B2056_RX_RSSI_POLE 0x29
424+#define B2056_RX_RSSI_WB1_IDAC 0x2A
425+#define B2056_RX_RSSI_MISC 0x2B
426+#define B2056_RX_LNAA_MASTER 0x2C
427+#define B2056_RX_LNAA_TUNE 0x2D
428+#define B2056_RX_LNAA_GAIN 0x2E
429+#define B2056_RX_LNA_A_SLOPE 0x2F
430+#define B2056_RX_BIASPOLE_LNAA1_IDAC 0x30
431+#define B2056_RX_LNAA2_IDAC 0x31
432+#define B2056_RX_LNA1A_MISC 0x32
433+#define B2056_RX_LNAG_MASTER 0x33
434+#define B2056_RX_LNAG_TUNE 0x34
435+#define B2056_RX_LNAG_GAIN 0x35
436+#define B2056_RX_LNA_G_SLOPE 0x36
437+#define B2056_RX_BIASPOLE_LNAG1_IDAC 0x37
438+#define B2056_RX_LNAG2_IDAC 0x38
439+#define B2056_RX_LNA1G_MISC 0x39
440+#define B2056_RX_MIXA_MASTER 0x3A
441+#define B2056_RX_MIXA_VCM 0x3B
442+#define B2056_RX_MIXA_CTRLPTAT 0x3C
443+#define B2056_RX_MIXA_LOB_BIAS 0x3D
444+#define B2056_RX_MIXA_CORE_IDAC 0x3E
445+#define B2056_RX_MIXA_CMFB_IDAC 0x3F
446+#define B2056_RX_MIXA_BIAS_AUX 0x40
447+#define B2056_RX_MIXA_BIAS_MAIN 0x41
448+#define B2056_RX_MIXA_BIAS_MISC 0x42
449+#define B2056_RX_MIXA_MAST_BIAS 0x43
450+#define B2056_RX_MIXG_MASTER 0x44
451+#define B2056_RX_MIXG_VCM 0x45
452+#define B2056_RX_MIXG_CTRLPTAT 0x46
453+#define B2056_RX_MIXG_LOB_BIAS 0x47
454+#define B2056_RX_MIXG_CORE_IDAC 0x48
455+#define B2056_RX_MIXG_CMFB_IDAC 0x49
456+#define B2056_RX_MIXG_BIAS_AUX 0x4A
457+#define B2056_RX_MIXG_BIAS_MAIN 0x4B
458+#define B2056_RX_MIXG_BIAS_MISC 0x4C
459+#define B2056_RX_MIXG_MAST_BIAS 0x4D
460+#define B2056_RX_TIA_MASTER 0x4E
461+#define B2056_RX_TIA_IOPAMP 0x4F
462+#define B2056_RX_TIA_QOPAMP 0x50
463+#define B2056_RX_TIA_IMISC 0x51
464+#define B2056_RX_TIA_QMISC 0x52
465+#define B2056_RX_TIA_GAIN 0x53
466+#define B2056_RX_TIA_SPARE1 0x54
467+#define B2056_RX_TIA_SPARE2 0x55
468+#define B2056_RX_BB_LPF_MASTER 0x56
469+#define B2056_RX_AACI_MASTER 0x57
470+#define B2056_RX_RXLPF_IDAC 0x58
471+#define B2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59
472+#define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5A
473+#define B2056_RX_RXLPF_BIAS_DCCANCEL 0x5B
474+#define B2056_RX_RXLPF_OUTVCM 0x5C
475+#define B2056_RX_RXLPF_INVCM_BODY 0x5D
476+#define B2056_RX_RXLPF_CC_OP 0x5E
477+#define B2056_RX_RXLPF_GAIN 0x5F
478+#define B2056_RX_RXLPF_Q_BW 0x60
479+#define B2056_RX_RXLPF_HP_CORNER_BW 0x61
480+#define B2056_RX_RXLPF_RCCAL_HPC 0x62
481+#define B2056_RX_RXHPF_OFF0 0x63
482+#define B2056_RX_RXHPF_OFF1 0x64
483+#define B2056_RX_RXHPF_OFF2 0x65
484+#define B2056_RX_RXHPF_OFF3 0x66
485+#define B2056_RX_RXHPF_OFF4 0x67
486+#define B2056_RX_RXHPF_OFF5 0x68
487+#define B2056_RX_RXHPF_OFF6 0x69
488+#define B2056_RX_RXHPF_OFF7 0x6A
489+#define B2056_RX_RXLPF_RCCAL_LPC 0x6B
490+#define B2056_RX_RXLPF_OFF_0 0x6C
491+#define B2056_RX_RXLPF_OFF_1 0x6D
492+#define B2056_RX_RXLPF_OFF_2 0x6E
493+#define B2056_RX_RXLPF_OFF_3 0x6F
494+#define B2056_RX_RXLPF_OFF_4 0x70
495+#define B2056_RX_UNUSED 0x71
496+#define B2056_RX_VGA_MASTER 0x72
497+#define B2056_RX_VGA_BIAS 0x73
498+#define B2056_RX_VGA_BIAS_DCCANCEL 0x74
499+#define B2056_RX_VGA_GAIN 0x75
500+#define B2056_RX_VGA_HP_CORNER_BW 0x76
501+#define B2056_RX_VGABUF_BIAS 0x77
502+#define B2056_RX_VGABUF_GAIN_BW 0x78
503+#define B2056_RX_TXFBMIX_A 0x79
504+#define B2056_RX_TXFBMIX_G 0x7A
505+#define B2056_RX_RXSPARE1 0x7B
506+#define B2056_RX_RXSPARE2 0x7C
507+#define B2056_RX_RXSPARE3 0x7D
508+#define B2056_RX_RXSPARE4 0x7E
509+#define B2056_RX_RXSPARE5 0x7F
510+#define B2056_RX_RXSPARE6 0x80
511+#define B2056_RX_RXSPARE7 0x81
512+#define B2056_RX_RXSPARE8 0x82
513+#define B2056_RX_RXSPARE9 0x83
514+#define B2056_RX_RXSPARE10 0x84
515+#define B2056_RX_RXSPARE11 0x85
516+#define B2056_RX_RXSPARE12 0x86
517+#define B2056_RX_RXSPARE13 0x87
518+#define B2056_RX_RXSPARE14 0x88
519+#define B2056_RX_RXSPARE15 0x89
520+#define B2056_RX_RXSPARE16 0x8A
521+#define B2056_RX_STATUS_LNAA_GAIN 0x8B
522+#define B2056_RX_STATUS_LNAG_GAIN 0x8C
523+#define B2056_RX_STATUS_MIXTIA_GAIN 0x8D
524+#define B2056_RX_STATUS_RXLPF_GAIN 0x8E
525+#define B2056_RX_STATUS_VGA_BUF_GAIN 0x8F
526+#define B2056_RX_STATUS_RXLPF_Q 0x90
527+#define B2056_RX_STATUS_RXLPF_BUF_BW 0x91
528+#define B2056_RX_STATUS_RXLPF_VGA_HPC 0x92
529+#define B2056_RX_STATUS_RXLPF_RC 0x93
530+#define B2056_RX_STATUS_HPC_RC 0x94
531+
532+#define B2056_LNA1_A_PU 0x01
533+#define B2056_LNA2_A_PU 0x02
534+#define B2056_LNA1_G_PU 0x01
535+#define B2056_LNA2_G_PU 0x02
536+#define B2056_MIXA_PU_I 0x01
537+#define B2056_MIXA_PU_Q 0x02
538+#define B2056_MIXA_PU_GM 0x10
539+#define B2056_MIXG_PU_I 0x01
540+#define B2056_MIXG_PU_Q 0x02
541+#define B2056_MIXG_PU_GM 0x10
542+#define B2056_TIA_PU 0x01
543+#define B2056_BB_LPF_PU 0x20
544+#define B2056_W1_PU 0x02
545+#define B2056_W2_PU 0x04
546+#define B2056_NB_PU 0x08
547+#define B2056_RSSI_W1_SEL 0x02
548+#define B2056_RSSI_W2_SEL 0x04
549+#define B2056_RSSI_NB_SEL 0x08
550+#define B2056_VCM_MASK 0x1C
551+#define B2056_RSSI_VCM_SHIFT 0x02
552+
31553 struct b43_nphy_channeltab_entry_rev3 {
32554 /* The channel frequency in MHz */
33555 u16 freq;