Currently IRQs are requested one by one. To balance spreading IRQs among cpus using such scheme requires remembering cpu mask for the cpus used for a given device. This complicates the IRQ allocation scheme in subsequent patch. Hence, prepare the code for bulk IRQs allocation. This enables spreading IRQs among cpus in subsequent patch.
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| @@ -9,13 +9,13 @@ · 8 unmodified lines | ||
| 9 | 9 | #define MLX5_NUM_SPARE_EQE (0x80) |
| 10 | 10 | |
| 11 | 11 | struct mlx5_eq; |
| 12 | +struct mlx5_irq; | |
| 12 | 13 | struct mlx5_core_dev; |
| 13 | 14 | |
| 14 | 15 | struct mlx5_eq_param { |
| 15 | − u8 irq_index; | |
| 16 | 16 | int nent; |
| 17 | 17 | u64 mask[4]; |
| 18 | − cpumask_var_t affinity; | |
| 18 | + struct mlx5_irq *irq; | |
| 19 | 19 | }; |
| 20 | 20 | |
| 21 | 21 | struct mlx5_eq * |