History

drm/amdgpu: add new INFO ioctl query for the last GPU page fault

Add a interface to query the last GPU page fault for the process. Useful for debugging context lost errors. v2: split vmhub representation between kernel and userspace v3: add locking when fetching fault info in INFO IOCTL Mesa MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238 libdrm MR: https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23238

Alex Deucher committed 6 years ago

Commit 7a41ed81 parent 9cff0875 files · +63 −5Browse files

Unified · Split

5 files
  1. drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +2 −1
  2. drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +20 −0
  3. drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +15 −1
  4. drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h +10 −3
  5. include/uapi/drm/amdgpu_drm.h +16 −0
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+2−1
@@ -113,9 +113,10 @@ · 112 unmodified lines
113 * gl1c_cache_size, gl2c_cache_size, mall_size, enabled_rb_pipes_mask_hi113 * gl1c_cache_size, gl2c_cache_size, mall_size, enabled_rb_pipes_mask_hi
114 * 3.53.0 - Support for GFX11 CP GFX shadowing114 * 3.53.0 - Support for GFX11 CP GFX shadowing
115 * 3.54.0 - Add AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS support115 * 3.54.0 - Add AMDGPU_CTX_QUERY2_FLAGS_RESET_IN_PROGRESS support
116 * - 3.55.0 - Add AMDGPU_INFO_GPUVM_FAULT query
116 */117 */
117#define KMS_DRIVER_MAJOR 3118#define KMS_DRIVER_MAJOR 3
118#define KMS_DRIVER_MINOR 54119#define KMS_DRIVER_MINOR 55
119#define KMS_DRIVER_PATCHLEVEL 0120#define KMS_DRIVER_PATCHLEVEL 0
120 121
121/*122/*
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+20−0
@@ -1224,6 +1224,26 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) · 1223 unmodified lines
1224 return copy_to_user(out, max_ibs,1224 return copy_to_user(out, max_ibs,
1225 min((size_t)size, sizeof(max_ibs))) ? -EFAULT : 0;1225 min((size_t)size, sizeof(max_ibs))) ? -EFAULT : 0;
1226 }1226 }
1227 case AMDGPU_INFO_GPUVM_FAULT: {
1228 struct amdgpu_fpriv *fpriv = filp->driver_priv;
1229 struct amdgpu_vm *vm = &fpriv->vm;
1230 struct drm_amdgpu_info_gpuvm_fault gpuvm_fault;
1231 unsigned long flags;
1232
1233 if (!vm)
1234 return -EINVAL;
1235
1236 memset(&gpuvm_fault, 0, sizeof(gpuvm_fault));
1237
1238 xa_lock_irqsave(&adev->vm_manager.pasids, flags);
1239 gpuvm_fault.addr = vm->fault_info.addr;
1240 gpuvm_fault.status = vm->fault_info.status;
1241 gpuvm_fault.vmhub = vm->fault_info.vmhub;
1242 xa_unlock_irqrestore(&adev->vm_manager.pasids, flags);
1243
1244 return copy_to_user(out, &gpuvm_fault,
1245 min((size_t)size, sizeof(gpuvm_fault))) ? -EFAULT : 0;
1246 }
1227 default:1247 default:
1228 DRM_DEBUG_KMS("Invalid request %d\n", info->query);1248 DRM_DEBUG_KMS("Invalid request %d\n", info->query);
1229 return -EINVAL;1249 return -EINVAL;
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c+15−1
@@ -2756,7 +2756,21 @@ void amdgpu_vm_update_fault_cache(struct amdgpu_device *adev, · 2755 unmodified lines
2756 if (vm) {2756 if (vm) {
2757 vm->fault_info.addr = addr;2757 vm->fault_info.addr = addr;
2758 vm->fault_info.status = status;2758 vm->fault_info.status = status;
2759 vm->fault_info.vmhub = vmhub;2759 if (AMDGPU_IS_GFXHUB(vmhub)) {
2760 vm->fault_info.vmhub = AMDGPU_VMHUB_TYPE_GFX;
2761 vm->fault_info.vmhub |=
2762 (vmhub - AMDGPU_GFXHUB_START) << AMDGPU_VMHUB_IDX_SHIFT;
2763 } else if (AMDGPU_IS_MMHUB0(vmhub)) {
2764 vm->fault_info.vmhub = AMDGPU_VMHUB_TYPE_MM0;
2765 vm->fault_info.vmhub |=
2766 (vmhub - AMDGPU_MMHUB0_START) << AMDGPU_VMHUB_IDX_SHIFT;
2767 } else if (AMDGPU_IS_MMHUB1(vmhub)) {
2768 vm->fault_info.vmhub = AMDGPU_VMHUB_TYPE_MM1;
2769 vm->fault_info.vmhub |=
2770 (vmhub - AMDGPU_MMHUB1_START) << AMDGPU_VMHUB_IDX_SHIFT;
2771 } else {
2772 WARN_ONCE(1, "Invalid vmhub %u\n", vmhub);
2773 }
2760 }2774 }
2761 xa_unlock_irqrestore(&adev->vm_manager.pasids, flags);2775 xa_unlock_irqrestore(&adev->vm_manager.pasids, flags);
2762}2776}
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h+10−3
@@ -124,9 +124,16 @@ struct amdgpu_mem_stats; · 123 unmodified lines
124 * layout: max 8 GFXHUB + 4 MMHUB0 + 1 MMHUB1124 * layout: max 8 GFXHUB + 4 MMHUB0 + 1 MMHUB1
125 */125 */
126#define AMDGPU_MAX_VMHUBS 13126#define AMDGPU_MAX_VMHUBS 13
127#define AMDGPU_GFXHUB(x) (x)127#define AMDGPU_GFXHUB_START 0
128#define AMDGPU_MMHUB0(x) (8 + x)128#define AMDGPU_MMHUB0_START 8
129#define AMDGPU_MMHUB1(x) (8 + 4 + x)129#define AMDGPU_MMHUB1_START 12
130#define AMDGPU_GFXHUB(x) (AMDGPU_GFXHUB_START + (x))
131#define AMDGPU_MMHUB0(x) (AMDGPU_MMHUB0_START + (x))
132#define AMDGPU_MMHUB1(x) (AMDGPU_MMHUB1_START + (x))
133
134#define AMDGPU_IS_GFXHUB(x) ((x) >= AMDGPU_GFXHUB_START && (x) < AMDGPU_MMHUB0_START)
135#define AMDGPU_IS_MMHUB0(x) ((x) >= AMDGPU_MMHUB0_START && (x) < AMDGPU_MMHUB1_START)
136#define AMDGPU_IS_MMHUB1(x) ((x) >= AMDGPU_MMHUB1_START && (x) < AMDGPU_MAX_VMHUBS)
130 137
131/* Reserve 2MB at top/bottom of address space for kernel use */138/* Reserve 2MB at top/bottom of address space for kernel use */
132#define AMDGPU_VA_RESERVED_SIZE (2ULL << 20)139#define AMDGPU_VA_RESERVED_SIZE (2ULL << 20)
include/uapi/drm/amdgpu_drm.h+16−0
@@ -906,6 +906,8 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow { · 905 unmodified lines
906 #define AMDGPU_INFO_VIDEO_CAPS_ENCODE 1906 #define AMDGPU_INFO_VIDEO_CAPS_ENCODE 1
907/* Query the max number of IBs per gang per submission */907/* Query the max number of IBs per gang per submission */
908#define AMDGPU_INFO_MAX_IBS 0x22908#define AMDGPU_INFO_MAX_IBS 0x22
909/* query last page fault info */
910#define AMDGPU_INFO_GPUVM_FAULT 0x23
909 911
910#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0912#define AMDGPU_INFO_MMR_SE_INDEX_SHIFT 0
911#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff913#define AMDGPU_INFO_MMR_SE_INDEX_MASK 0xff
@@ -1231,6 +1233,20 @@ struct drm_amdgpu_info_video_caps { · 319 unmodified lines
1231 struct drm_amdgpu_info_video_codec_info codec_info[AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_COUNT];1233 struct drm_amdgpu_info_video_codec_info codec_info[AMDGPU_INFO_VIDEO_CAPS_CODEC_IDX_COUNT];
1232};1234};
1233 1235
1236#define AMDGPU_VMHUB_TYPE_MASK 0xff
1237#define AMDGPU_VMHUB_TYPE_SHIFT 0
1238#define AMDGPU_VMHUB_TYPE_GFX 0
1239#define AMDGPU_VMHUB_TYPE_MM0 1
1240#define AMDGPU_VMHUB_TYPE_MM1 2
1241#define AMDGPU_VMHUB_IDX_MASK 0xff00
1242#define AMDGPU_VMHUB_IDX_SHIFT 8
1243
1244struct drm_amdgpu_info_gpuvm_fault {
1245 __u64 addr;
1246 __u32 status;
1247 __u32 vmhub;
1248};
1249
1234/*1250/*
1235 * Supported GPU families1251 * Supported GPU families
1236 */1252 */

Keyboard shortcuts

General

Show keyboard shortcuts
?
Focus the current search
/

Issues and pull requests

Open filters
f

Issues, pull requests and Inbox

Select next item
j↓
Select previous item
k↑
Open selected item
Enter
Dismiss filters or clear selection
Esc

Repository code

Go to file
t