lael-labs/linux

.mailmap+1−0

@@ -70,6 +70,7 @@ Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@bootlin.com> · 69 unmodified lines
70	Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>	70	Boris Brezillon <bbrezillon@kernel.org> <boris.brezillon@free-electrons.com>
71	Brian Avery <b.avery@hp.com>	71	Brian Avery <b.avery@hp.com>
72	Brian King <brking@us.ibm.com>	72	Brian King <brking@us.ibm.com>
		73	Brian Silverman <bsilver16384@gmail.com> <brian.silverman@bluerivertech.com>
73	Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>	74	Changbin Du <changbin.du@intel.com> <changbin.du@gmail.com>
74	Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>	75	Changbin Du <changbin.du@intel.com> <changbin.du@intel.com>
75	Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>	76	Chao Yu <chao@kernel.org> <chao2.yu@samsung.com>

Documentation/accounting/psi.rst+2−1

@@ -92,7 +92,8 @@ Triggers can be set on more than one psi metric and more than one trigger · 91 unmodified lines
92	for the same psi metric can be specified. However for each trigger a separate	92	for the same psi metric can be specified. However for each trigger a separate
93	file descriptor is required to be able to poll it separately from others,	93	file descriptor is required to be able to poll it separately from others,
94	therefore for each trigger a separate open() syscall should be made even	94	therefore for each trigger a separate open() syscall should be made even
95	when opening the same psi interface file.	95	when opening the same psi interface file. Write operations to a file descriptor
		96	with an already existing psi trigger will fail with EBUSY.
96		97
97	Monitors activate only when system enters stall state for the monitored	98	Monitors activate only when system enters stall state for the monitored
98	psi metric and deactivates upon exit from the stall state. While system is	99	psi metric and deactivates upon exit from the stall state. While system is

Documentation/admin-guide/gpio/index.rst+1−0

@@ -10,6 +10,7 @@ gpio · 9 unmodified lines
10	gpio-aggregator	10	gpio-aggregator
11	sysfs	11	sysfs
12	gpio-mockup	12	gpio-mockup
		13	gpio-sim
13		14
14	.. only:: subproject and html	15	.. only:: subproject and html
15		16

Documentation/arm/marvell.rst+2−0

 -------------
   Flavors:
+       - 88F6500
        - 88F6510
        - 88F6530P
        - 88F6550
        - 88F6560
+       - 88F6601
   Homepage:
 	https://web.archive.org/web/20181005145041/http://www.marvell.com/broadband/

Documentation/arm64/silicon-errata.rst+12−0

 | Allwinner      | A64/R18         | UNKNOWN1        | SUN50I_ERRATUM_UNKNOWN1     |
 +----------------+-----------------+-----------------+-----------------------------+
 +----------------+-----------------+-----------------+-----------------------------+
+| ARM            | Cortex-A510     | #2064142        | ARM64_ERRATUM_2064142       |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM            | Cortex-A510     | #2038923        | ARM64_ERRATUM_2038923       |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM            | Cortex-A510     | #1902691        | ARM64_ERRATUM_1902691       |
++----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Cortex-A53      | #826319         | ARM64_ERRATUM_826319        |
 +----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Cortex-A53      | #827319         | ARM64_ERRATUM_827319        |
 +----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Cortex-A77      | #1508412        | ARM64_ERRATUM_1508412       |
 +----------------+-----------------+-----------------+-----------------------------+
+| ARM            | Cortex-A510     | #2051678        | ARM64_ERRATUM_2051678       |
++----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Cortex-A710     | #2119858        | ARM64_ERRATUM_2119858       |
 +----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Cortex-A710     | #2054223        | ARM64_ERRATUM_2054223       |
 +----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Cortex-A710     | #2224489        | ARM64_ERRATUM_2224489       |
 +----------------+-----------------+-----------------+-----------------------------+
+| ARM            | Cortex-X2       | #2119858        | ARM64_ERRATUM_2119858       |
++----------------+-----------------+-----------------+-----------------------------+
+| ARM            | Cortex-X2       | #2224489        | ARM64_ERRATUM_2224489       |
++----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Neoverse-N1     | #1188873,1418040| ARM64_ERRATUM_1418040       |
 +----------------+-----------------+-----------------+-----------------------------+
 | ARM            | Neoverse-N1     | #1349291        | N/A                         |

Documentation/devicetree/bindings/interrupt-controller/renesas,irqc.yaml+1−0

@@ -36,6 +36,7 @@ properties: · 35 unmodified lines
36	- renesas,intc-ex-r8a77980 # R-Car V3H	36	- renesas,intc-ex-r8a77980 # R-Car V3H
37	- renesas,intc-ex-r8a77990 # R-Car E3	37	- renesas,intc-ex-r8a77990 # R-Car E3
38	- renesas,intc-ex-r8a77995 # R-Car D3	38	- renesas,intc-ex-r8a77995 # R-Car D3
		39	- renesas,intc-ex-r8a779a0 # R-Car V3U
39	- const: renesas,irqc	40	- const: renesas,irqc
40		41
41	'#interrupt-cells':	42	'#interrupt-cells':

Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml+6−6

   interrupts-extended:
     minItems: 1
+    maxItems: 15872
     description:
       Specifies which contexts are connected to the PLIC, with "-1" specifying
       that a context is not present. Each node pointed to should be a
       #interrupt-cells = <1>;
       compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
       interrupt-controller;
-      interrupts-extended = <
+      interrupts-extended = <&cpu0_intc 11>,
-        &cpu0_intc 11
+                            <&cpu1_intc 11>, <&cpu1_intc 9>,
-        &cpu1_intc 11 &cpu1_intc 9
+                            <&cpu2_intc 11>, <&cpu2_intc 9>,
-        &cpu2_intc 11 &cpu2_intc 9
+                            <&cpu3_intc 11>, <&cpu3_intc 9>,
-        &cpu3_intc 11 &cpu3_intc 9
+                            <&cpu4_intc 11>, <&cpu4_intc 9>;
-        &cpu4_intc 11 &cpu4_intc 9>;
       reg = <0xc000000 0x4000000>;
       riscv,ndev = <10>;
     };

Documentation/devicetree/bindings/net/can/tcan4x5x.txt+1−1

@@ -31,7 +31,7 @@ tcan4x5x: tcan4x5x@0 { · 30 unmodified lines
31	#address-cells = <1>;	31	#address-cells = <1>;
32	#size-cells = <1>;	32	#size-cells = <1>;
33	spi-max-frequency = <10000000>;	33	spi-max-frequency = <10000000>;
34	bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;	34	bosch,mram-cfg = <0x0 0 0 16 0 0 1 1>;
35	interrupt-parent = <&gpio1>;	35	interrupt-parent = <&gpio1>;
36	interrupts = <14 IRQ_TYPE_LEVEL_LOW>;	36	interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
37	device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;	37	device-state-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;

Documentation/index.rst+1−0

@@ -166,6 +166,7 @@ to ReStructured Text format, or are simply too old. · 165 unmodified lines
166	.. toctree::	166	.. toctree::
167	:maxdepth: 2	167	:maxdepth: 2
168		168
		169	tools/index
169	staging/index	170	staging/index
170	watch_queue	171	watch_queue
171		172

Documentation/kernel-hacking/locking.rst+1−1

@@ -295,7 +295,7 @@ Pete Zaitcev gives the following summary: · 294 unmodified lines
295		295
296	- If you are in a process context (any syscall) and want to lock other	296	- If you are in a process context (any syscall) and want to lock other
297	process out, use a mutex. You can take a mutex and sleep	297	process out, use a mutex. You can take a mutex and sleep
298	(``copy_from_user*(`` or ``kmalloc(x,GFP_KERNEL)``).	298	(``copy_from_user()`` or ``kmalloc(x,GFP_KERNEL)``).
299		299
300	- Otherwise (== data can be touched in an interrupt), use	300	- Otherwise (== data can be touched in an interrupt), use
301	spin_lock_irqsave() and	301	spin_lock_irqsave() and

Documentation/tools/index.rst+20−0

@@ -0,0 +1,20 @@
	1	.. SPDX-License-Identifier: GPL-2.0
	2
	3	============
	4	Kernel tools
	5	============
	6
	7	This book covers user-space tools that are shipped with the kernel source;
	8	more additions are needed here:
	9
	10	.. toctree::
	11	:maxdepth: 1
	12
	13	rtla/index
	14
	15	.. only:: subproject and html
	16
	17	Indices
	18	=======
	19
	20	* :ref:`genindex`

Documentation/tools/rtla/index.rst+26−0

@@ -0,0 +1,26 @@
	1	.. SPDX-License-Identifier: GPL-2.0
	2
	3	================================
	4	The realtime Linux analysis tool
	5	================================
	6
	7	RTLA provides a set of tools for the analysis of the kernel's realtime
	8	behavior on specific hardware.
	9
	10	.. toctree::
	11	:maxdepth: 1
	12
	13	rtla
	14	rtla-osnoise
	15	rtla-osnoise-hist
	16	rtla-osnoise-top
	17	rtla-timerlat
	18	rtla-timerlat-hist
	19	rtla-timerlat-top
	20
	21	.. only:: subproject and html
	22
	23	Indices
	24	=======
	25
	26	* :ref:`genindex`

Documentation/virt/kvm/api.rst+3−1

 :Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device,
              KVM_CAP_VCPU_ATTRIBUTES for vcpu device
+             KVM_CAP_SYS_ATTRIBUTES for system (/dev/kvm) device (no set)
 :Type: device ioctl, vm ioctl, vcpu ioctl
 :Parameters: struct kvm_device_attr
 :Returns: 0 on success, -1 on error
 ------------------------
 :Capability: KVM_CAP_DEVICE_CTRL, KVM_CAP_VM_ATTRIBUTES for vm device,
-	     KVM_CAP_VCPU_ATTRIBUTES for vcpu device
+             KVM_CAP_VCPU_ATTRIBUTES for vcpu device
+             KVM_CAP_SYS_ATTRIBUTES for system (/dev/kvm) device
 :Type: device ioctl, vm ioctl, vcpu ioctl
 :Parameters: struct kvm_device_attr
 :Returns: 0 on success, -1 on error

Documentation/vm/page_table_check.rst+1−1

@@ -9,7 +9,7 @@ Page Table Check · 8 unmodified lines
9	Introduction	9	Introduction
10	============	10	============
11		11
12	Page table check allows to hardern the kernel by ensuring that some types of	12	Page table check allows to harden the kernel by ensuring that some types of
13	the memory corruptions are prevented.	13	the memory corruptions are prevented.
14		14
15	Page table check performs extra verifications at the time when new pages become	15	Page table check performs extra verifications at the time when new pages become

MAINTAINERS+19−13

@@ -190,8 +190,9 @@ M: Johannes Berg <johannes@sipsolutions.net> · 189 unmodified lines
190	L: linux-wireless@vger.kernel.org	190	L: linux-wireless@vger.kernel.org
191	S: Maintained	191	S: Maintained
192	W: https://wireless.wiki.kernel.org/	192	W: https://wireless.wiki.kernel.org/
193	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git	193	Q: https://patchwork.kernel.org/project/linux-wireless/list/
194	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git	194	T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless.git
		195	T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
195	F: Documentation/driver-api/80211/cfg80211.rst	196	F: Documentation/driver-api/80211/cfg80211.rst
196	F: Documentation/networking/regulatory.rst	197	F: Documentation/networking/regulatory.rst
197	F: include/linux/ieee80211.h	198	F: include/linux/ieee80211.h
@@ -7208,8 +7209,10 @@ F: drivers/net/mdio/of_mdio.c · 7010 unmodified lines
7208	F: drivers/net/pcs/	7209	F: drivers/net/pcs/
7209	F: drivers/net/phy/	7210	F: drivers/net/phy/
7210	F: include/dt-bindings/net/qca-ar803x.h	7211	F: include/dt-bindings/net/qca-ar803x.h
		7212	F: include/linux/linkmode.h
7211	F: include/linux/mdio.h	7213	F: include/linux/mdio.h
7212	F: include/linux/mdio/*.h	7214	F: include/linux/mdio/*.h
		7215	F: include/linux/mii.h
7213	F: include/linux/of_net.h	7216	F: include/linux/of_net.h
7214	F: include/linux/phy.h	7217	F: include/linux/phy.h
7215	F: include/linux/phy_fixed.h	7218	F: include/linux/phy_fixed.h
@@ -11366,8 +11369,9 @@ M: Johannes Berg <johannes@sipsolutions.net> · 4150 unmodified lines
11366	L: linux-wireless@vger.kernel.org	11369	L: linux-wireless@vger.kernel.org
11367	S: Maintained	11370	S: Maintained
11368	W: https://wireless.wiki.kernel.org/	11371	W: https://wireless.wiki.kernel.org/
11369	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git	11372	Q: https://patchwork.kernel.org/project/linux-wireless/list/
11370	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git	11373	T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless.git
		11374	T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
11371	F: Documentation/networking/mac80211-injection.rst	11375	F: Documentation/networking/mac80211-injection.rst
11372	F: Documentation/networking/mac80211_hwsim/mac80211_hwsim.rst	11376	F: Documentation/networking/mac80211_hwsim/mac80211_hwsim.rst
11373	F: drivers/net/wireless/mac80211_hwsim.[ch]	11377	F: drivers/net/wireless/mac80211_hwsim.[ch]
@@ -13374,9 +13378,10 @@ NETWORKING DRIVERS (WIRELESS) · 2000 unmodified lines
13374	M: Kalle Valo <kvalo@kernel.org>	13378	M: Kalle Valo <kvalo@kernel.org>
13375	L: linux-wireless@vger.kernel.org	13379	L: linux-wireless@vger.kernel.org
13376	S: Maintained	13380	S: Maintained
13377	Q: http://patchwork.kernel.org/project/linux-wireless/list/	13381	W: https://wireless.wiki.kernel.org/
13378	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers.git	13382	Q: https://patchwork.kernel.org/project/linux-wireless/list/
13379	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next.git	13383	T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless.git
		13384	T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
13380	F: Documentation/devicetree/bindings/net/wireless/	13385	F: Documentation/devicetree/bindings/net/wireless/
13381	F: drivers/net/wireless/	13386	F: drivers/net/wireless/
13382		13387
@@ -13449,7 +13454,11 @@ L: netdev@vger.kernel.org · 66 unmodified lines
13449	S: Maintained	13454	S: Maintained
13450	T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git	13455	T: git git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git
13451	F: arch/x86/net/*	13456	F: arch/x86/net/*
		13457	F: include/linux/ip.h
		13458	F: include/linux/ipv6*
		13459	F: include/net/fib*
13452	F: include/net/ip*	13460	F: include/net/ip*
		13461	F: include/net/route.h
13453	F: net/ipv4/	13462	F: net/ipv4/
13454	F: net/ipv6/	13463	F: net/ipv6/
13455		13464
@@ -13510,10 +13519,6 @@ F: include/net/tls.h · 54 unmodified lines
13510	F: include/uapi/linux/tls.h	13519	F: include/uapi/linux/tls.h
13511	F: net/tls/*	13520	F: net/tls/*
13512		13521
13513	NETWORKING [WIRELESS]
13514	L: linux-wireless@vger.kernel.org
13515	Q: http://patchwork.kernel.org/project/linux-wireless/list/
13516
13517	NETXEN (1/10) GbE SUPPORT	13522	NETXEN (1/10) GbE SUPPORT
13518	M: Manish Chopra <manishc@marvell.com>	13523	M: Manish Chopra <manishc@marvell.com>
13519	M: Rahul Verma <rahulv@marvell.com>	13524	M: Rahul Verma <rahulv@marvell.com>
@@ -16532,8 +16537,9 @@ M: Johannes Berg <johannes@sipsolutions.net> · 3012 unmodified lines
16532	L: linux-wireless@vger.kernel.org	16537	L: linux-wireless@vger.kernel.org
16533	S: Maintained	16538	S: Maintained
16534	W: https://wireless.wiki.kernel.org/	16539	W: https://wireless.wiki.kernel.org/
16535	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211.git	16540	Q: https://patchwork.kernel.org/project/linux-wireless/list/
16536	T: git git://git.kernel.org/pub/scm/linux/kernel/git/jberg/mac80211-next.git	16541	T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless.git
		16542	T: git git://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git
16537	F: Documentation/ABI/stable/sysfs-class-rfkill	16543	F: Documentation/ABI/stable/sysfs-class-rfkill
16538	F: Documentation/driver-api/rfkill.rst	16544	F: Documentation/driver-api/rfkill.rst
16539	F: include/linux/rfkill.h	16545	F: include/linux/rfkill.h

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	VERSION = 5	2	VERSION = 5
3	PATCHLEVEL = 17	3	PATCHLEVEL = 17
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc1	5	EXTRAVERSION = -rc2
6	NAME = Gobble Gobble	6	NAME = Gobble Gobble
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION

arch/arm/Kconfig+1−0

@@ -83,6 +83,7 @@ config ARM · 82 unmodified lines
83	select HAVE_EBPF_JIT if !CPU_ENDIAN_BE32	83	select HAVE_EBPF_JIT if !CPU_ENDIAN_BE32
84	select HAVE_CONTEXT_TRACKING	84	select HAVE_CONTEXT_TRACKING
85	select HAVE_C_RECORDMCOUNT	85	select HAVE_C_RECORDMCOUNT
		86	select HAVE_BUILDTIME_MCOUNT_SORT
86	select HAVE_DEBUG_KMEMLEAK if !XIP_KERNEL	87	select HAVE_DEBUG_KMEMLEAK if !XIP_KERNEL
87	select HAVE_DMA_CONTIGUOUS if MMU	88	select HAVE_DMA_CONTIGUOUS if MMU
88	select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU	89	select HAVE_DYNAMIC_FTRACE if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU

arch/arm/include/asm/assembler.h+2−0

  */
 #define ALT_UP(instr...)					\
 	.pushsection ".alt.smp.init", "a"			;\
+	.align	2						;\
 	.long	9998b - .					;\
 9997:	instr							;\
 	.if . - 9997b == 2					;\
 	.popsection
 #define ALT_UP_B(label)					\
 	.pushsection ".alt.smp.init", "a"			;\
+	.align	2						;\
 	.long	9998b - .					;\
 	W(b)	. + (label - 9998b)					;\
 	.popsection

arch/arm/include/asm/processor.h+1−0

@@ -96,6 +96,7 @@ unsigned long __get_wchan(struct task_struct *p); · 95 unmodified lines
96	#define __ALT_SMP_ASM(smp, up) \	96	#define __ALT_SMP_ASM(smp, up) \
97	"9998: " smp "\n" \	97	"9998: " smp "\n" \
98	" .pushsection \".alt.smp.init\", \"a\"\n" \	98	" .pushsection \".alt.smp.init\", \"a\"\n" \
		99	" .align 2\n" \
99	" .long 9998b - .\n" \	100	" .long 9998b - .\n" \
100	" " up "\n" \	101	" " up "\n" \
101	" .popsection\n"	102	" .popsection\n"

arch/arm/include/asm/uaccess.h+8−2

 #include <linux/string.h>
 #include <asm/memory.h>
 #include <asm/domain.h>
+#include <asm/unaligned.h>
 #include <asm/unified.h>
 #include <asm/compiler.h>
 	}								\
 	default: __err = __get_user_bad(); break;			\
 	}								\
-	*(type *)(dst) = __val;						\
+	if (IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS))		\
+		put_unaligned(__val, (type *)(dst));			\
+	else								\
+		*(type *)(dst) = __val; /* aligned by caller */		\
 	if (__err)							\
 		goto err_label;						\
 } while (0)
 	const type *__pk_ptr = (dst);					\
 	unsigned long __dst = (unsigned long)__pk_ptr;			\
 	int __err = 0;							\
-	type __val = *(type *)src;					\
+	type __val = IS_ENABLED(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS)	\
+		     ? get_unaligned((type *)(src))			\
+		     : *(type *)(src);	/* aligned by caller */		\
 	switch (sizeof(type)) {						\
 	case 1: __put_user_asm_byte(__val, __dst, __err, ""); break;	\
 	case 2:	__put_user_asm_half(__val, __dst, __err, ""); break;	\

arch/arm/probes/kprobes/Makefile+3−0

@@ -1,4 +1,7 @@
1	# SPDX-License-Identifier: GPL-2.0	1	# SPDX-License-Identifier: GPL-2.0
		2	KASAN_SANITIZE_actions-common.o := n
		3	KASAN_SANITIZE_actions-arm.o := n
		4	KASAN_SANITIZE_actions-thumb.o := n
2	obj-$(CONFIG_KPROBES) += core.o actions-common.o checkers-common.o	5	obj-$(CONFIG_KPROBES) += core.o actions-common.o checkers-common.o
3	obj-$(CONFIG_ARM_KPROBES_TEST) += test-kprobes.o	6	obj-$(CONFIG_ARM_KPROBES_TEST) += test-kprobes.o
4	test-kprobes-objs := test-core.o	7	test-kprobes-objs := test-core.o

arch/arm64/Kconfig+75−6

@@ -670,15 +670,25 @@ config ARM64_ERRATUM_1508412 · 669 unmodified lines
670	config ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE	670	config ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
671	bool	671	bool
672		672
		673	config ARM64_ERRATUM_2051678
		674	bool "Cortex-A510: 2051678: disable Hardware Update of the page table dirty bit"
		675	help
		676	This options adds the workaround for ARM Cortex-A510 erratum ARM64_ERRATUM_2051678.
		677	Affected Coretex-A510 might not respect the ordering rules for
		678	hardware update of the page table's dirty bit. The workaround
		679	is to not enable the feature on affected CPUs.
		680
		681	If unsure, say Y.
		682
673	config ARM64_ERRATUM_2119858	683	config ARM64_ERRATUM_2119858
674	bool "Cortex-A710: 2119858: workaround TRBE overwriting trace data in FILL mode"	684	bool "Cortex-A710/X2: 2119858: workaround TRBE overwriting trace data in FILL mode"
675	default y	685	default y
676	depends on CORESIGHT_TRBE	686	depends on CORESIGHT_TRBE
677	select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE	687	select ARM64_WORKAROUND_TRBE_OVERWRITE_FILL_MODE
678	help	688	help
679	This option adds the workaround for ARM Cortex-A710 erratum 2119858.	689	This option adds the workaround for ARM Cortex-A710/X2 erratum 2119858.
680		690
681	Affected Cortex-A710 cores could overwrite up to 3 cache lines of trace	691	Affected Cortex-A710/X2 cores could overwrite up to 3 cache lines of trace
682	data at the base of the buffer (pointed to by TRBASER_EL1) in FILL mode in	692	data at the base of the buffer (pointed to by TRBASER_EL1) in FILL mode in
683	the event of a WRAP event.	693	the event of a WRAP event.
684		694
@@ -761,14 +771,14 @@ config ARM64_ERRATUM_2253138 · 76 unmodified lines
761	If unsure, say Y.	771	If unsure, say Y.
762		772
763	config ARM64_ERRATUM_2224489	773	config ARM64_ERRATUM_2224489
764	bool "Cortex-A710: 2224489: workaround TRBE writing to address out-of-range"	774	bool "Cortex-A710/X2: 2224489: workaround TRBE writing to address out-of-range"
765	depends on CORESIGHT_TRBE	775	depends on CORESIGHT_TRBE
766	default y	776	default y
767	select ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE	777	select ARM64_WORKAROUND_TRBE_WRITE_OUT_OF_RANGE
768	help	778	help
769	This option adds the workaround for ARM Cortex-A710 erratum 2224489.	779	This option adds the workaround for ARM Cortex-A710/X2 erratum 2224489.
770		780
771	Affected Cortex-A710 cores might write to an out-of-range address, not reserved	781	Affected Cortex-A710/X2 cores might write to an out-of-range address, not reserved
772	for TRBE. Under some conditions, the TRBE might generate a write to the next	782	for TRBE. Under some conditions, the TRBE might generate a write to the next
773	virtually addressed page following the last page of the TRBE address space	783	virtually addressed page following the last page of the TRBE address space
774	(i.e., the TRBLIMITR_EL1.LIMIT), instead of wrapping around to the base.	784	(i.e., the TRBLIMITR_EL1.LIMIT), instead of wrapping around to the base.
@@ -778,6 +788,65 @@ config ARM64_ERRATUM_2224489 · 3 unmodified lines
778		788
779	If unsure, say Y.	789	If unsure, say Y.
780		790
		791	config ARM64_ERRATUM_2064142
		792	bool "Cortex-A510: 2064142: workaround TRBE register writes while disabled"
		793	depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
		794	default y
		795	help
		796	This option adds the workaround for ARM Cortex-A510 erratum 2064142.
		797
		798	Affected Cortex-A510 core might fail to write into system registers after the
		799	TRBE has been disabled. Under some conditions after the TRBE has been disabled
		800	writes into TRBE registers TRBLIMITR_EL1, TRBPTR_EL1, TRBBASER_EL1, TRBSR_EL1,
		801	and TRBTRG_EL1 will be ignored and will not be effected.
		802
		803	Work around this in the driver by executing TSB CSYNC and DSB after collection
		804	is stopped and before performing a system register write to one of the affected
		805	registers.
		806
		807	If unsure, say Y.
		808
		809	config ARM64_ERRATUM_2038923
		810	bool "Cortex-A510: 2038923: workaround TRBE corruption with enable"
		811	depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
		812	default y
		813	help
		814	This option adds the workaround for ARM Cortex-A510 erratum 2038923.
		815
		816	Affected Cortex-A510 core might cause an inconsistent view on whether trace is
		817	prohibited within the CPU. As a result, the trace buffer or trace buffer state
		818	might be corrupted. This happens after TRBE buffer has been enabled by setting
		819	TRBLIMITR_EL1.E, followed by just a single context synchronization event before
		820	execution changes from a context, in which trace is prohibited to one where it
		821	isn't, or vice versa. In these mentioned conditions, the view of whether trace
		822	is prohibited is inconsistent between parts of the CPU, and the trace buffer or
		823	the trace buffer state might be corrupted.
		824
		825	Work around this in the driver by preventing an inconsistent view of whether the
		826	trace is prohibited or not based on TRBLIMITR_EL1.E by immediately following a
		827	change to TRBLIMITR_EL1.E with at least one ISB instruction before an ERET, or
		828	two ISB instructions if no ERET is to take place.
		829
		830	If unsure, say Y.
		831
		832	config ARM64_ERRATUM_1902691
		833	bool "Cortex-A510: 1902691: workaround TRBE trace corruption"
		834	depends on COMPILE_TEST # Until the CoreSight TRBE driver changes are in
		835	default y
		836	help
		837	This option adds the workaround for ARM Cortex-A510 erratum 1902691.
		838
		839	Affected Cortex-A510 core might cause trace data corruption, when being written
		840	into the memory. Effectively TRBE is broken and hence cannot be used to capture
		841	trace data.
		842
		843	Work around this problem in the driver by just preventing TRBE initialization on
		844	affected cpus. The firmware must have disabled the access to TRBE for the kernel
		845	on such implementations. This will cover the kernel for any firmware that doesn't
		846	do this already.
		847
		848	If unsure, say Y.
		849
781	config CAVIUM_ERRATUM_22375	850	config CAVIUM_ERRATUM_22375
782	bool "Cavium erratum 22375, 24313"	851	bool "Cavium erratum 22375, 24313"
783	default y	852	default y

arch/arm64/include/asm/cputype.h+4−0

 #define ARM_CPU_PART_CORTEX_A76		0xD0B
 #define ARM_CPU_PART_NEOVERSE_N1	0xD0C
 #define ARM_CPU_PART_CORTEX_A77		0xD0D
+#define ARM_CPU_PART_CORTEX_A510	0xD46
 #define ARM_CPU_PART_CORTEX_A710	0xD47
+#define ARM_CPU_PART_CORTEX_X2		0xD48
 #define ARM_CPU_PART_NEOVERSE_N2	0xD49
 #define APM_CPU_PART_POTENZA		0x000
 #define MIDR_CORTEX_A76	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76)
 #define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1)
 #define MIDR_CORTEX_A77	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A77)
+#define MIDR_CORTEX_A510 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A510)
 #define MIDR_CORTEX_A710 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A710)
+#define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
 #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
 #define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
 #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)

arch/arm64/kernel/cpu_errata.c+29−0

@@ -347,6 +347,7 @@ static const struct midr_range trbe_overwrite_fill_mode_cpus[] = { · 346 unmodified lines
347	#endif	347	#endif
348	#ifdef CONFIG_ARM64_ERRATUM_2119858	348	#ifdef CONFIG_ARM64_ERRATUM_2119858
349	MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),	349	MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
		350	MIDR_RANGE(MIDR_CORTEX_X2, 0, 0, 2, 0),
350	#endif	351	#endif
351	{},	352	{},
352	};	353	};
@@ -371,6 +372,7 @@ static struct midr_range trbe_write_out_of_range_cpus[] = { · 18 unmodified lines
371	#endif	372	#endif
372	#ifdef CONFIG_ARM64_ERRATUM_2224489	373	#ifdef CONFIG_ARM64_ERRATUM_2224489
373	MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),	374	MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
		375	MIDR_RANGE(MIDR_CORTEX_X2, 0, 0, 2, 0),
374	#endif	376	#endif
375	{},	377	{},
376	};	378	};
@@ -597,6 +599,33 @@ const struct arm64_cpu_capabilities arm64_errata[] = { · 220 unmodified lines
597	.type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,	599	.type = ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE,
598	CAP_MIDR_RANGE_LIST(trbe_write_out_of_range_cpus),	600	CAP_MIDR_RANGE_LIST(trbe_write_out_of_range_cpus),
599	},	601	},
		602	#endif
		603	#ifdef CONFIG_ARM64_ERRATUM_2064142
		604	{
		605	.desc = "ARM erratum 2064142",
		606	.capability = ARM64_WORKAROUND_2064142,
		607
		608	/* Cortex-A510 r0p0 - r0p2 */
		609	ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2)
		610	},
		611	#endif
		612	#ifdef CONFIG_ARM64_ERRATUM_2038923
		613	{
		614	.desc = "ARM erratum 2038923",
		615	.capability = ARM64_WORKAROUND_2038923,
		616
		617	/* Cortex-A510 r0p0 - r0p2 */
		618	ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2)
		619	},
		620	#endif
		621	#ifdef CONFIG_ARM64_ERRATUM_1902691
		622	{
		623	.desc = "ARM erratum 1902691",
		624	.capability = ARM64_WORKAROUND_1902691,
		625
		626	/* Cortex-A510 r0p0 - r0p1 */
		627	ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 1)
		628	},
600	#endif	629	#endif
601	{	630	{
602	}	631	}

arch/arm64/kernel/cpufeature.c+3−0

 		MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
 		/* Kryo4xx Silver (rdpe => r1p0) */
 		MIDR_REV(MIDR_QCOM_KRYO_4XX_SILVER, 0xd, 0xe),
+#endif
+#ifdef CONFIG_ARM64_ERRATUM_2051678
+		MIDR_REV_RANGE(MIDR_CORTEX_A510, 0, 0, 2),
 #endif
 		{},
 	};

arch/arm64/kernel/stacktrace.c+3−2

  */
-static void start_backtrace(struct stackframe *frame, unsigned long fp,
+static notrace void start_backtrace(struct stackframe *frame, unsigned long fp,
-			    unsigned long pc)
+				    unsigned long pc)
 {
 	frame->fp = fp;
 	frame->pc = pc;
 	frame->prev_fp = 0;
 	frame->prev_type = STACK_TYPE_UNKNOWN;
 }
+NOKPROBE_SYMBOL(start_backtrace);
 /*
  * Unwind from one frame record (A) to the next frame record (B).

arch/arm64/kernel/vdso/Makefile+4−1

 ccflags-y := -fno-common -fno-builtin -fno-stack-protector -ffixed-x18
 ccflags-y += -DDISABLE_BRANCH_PROFILING -DBUILD_VDSO
+# -Wmissing-prototypes and -Wmissing-declarations are removed from
+# the CFLAGS of vgettimeofday.c to make possible to build the
+# kernel with CONFIG_WERROR enabled.
 CFLAGS_REMOVE_vgettimeofday.o = $(CC_FLAGS_FTRACE) -Os $(CC_FLAGS_SCS) $(GCC_PLUGINS_CFLAGS) \
-				$(CC_FLAGS_LTO)
+				$(CC_FLAGS_LTO) -Wmissing-prototypes -Wmissing-declarations
 KASAN_SANITIZE			:= n
 KCSAN_SANITIZE			:= n
 UBSAN_SANITIZE			:= n

arch/arm64/kvm/hyp/exception.c+4−1

 static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, u64 val)
 {
-	write_sysreg_el1(val, SYS_SPSR);
+	if (has_vhe())
+		write_sysreg_el1(val, SYS_SPSR);
+	else
+		__vcpu_sys_reg(vcpu, SPSR_EL1) = val;
 }
 static void __vcpu_write_spsr_abt(struct kvm_vcpu *vcpu, u64 val)

arch/arm64/kvm/hyp/pgtable.c+6−12

@@ -983,13 +983,9 @@ static int stage2_unmap_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, · 982 unmodified lines
983	*/	983	*/
984	stage2_put_pte(ptep, mmu, addr, level, mm_ops);	984	stage2_put_pte(ptep, mmu, addr, level, mm_ops);
985		985
986	if (need_flush) {	986	if (need_flush && mm_ops->dcache_clean_inval_poc)
987	kvm_pte_t *pte_follow = kvm_pte_follow(pte, mm_ops);	987	mm_ops->dcache_clean_inval_poc(kvm_pte_follow(pte, mm_ops),
988		988	kvm_granule_size(level));
989	dcache_clean_inval_poc((unsigned long)pte_follow,
990	(unsigned long)pte_follow +
991	kvm_granule_size(level));
992	}
993		989
994	if (childp)	990	if (childp)
995	mm_ops->put_page(childp);	991	mm_ops->put_page(childp);
@@ -1151,15 +1147,13 @@ static int stage2_flush_walker(u64 addr, u64 end, u32 level, kvm_pte_t *ptep, · 155 unmodified lines
1151	struct kvm_pgtable *pgt = arg;	1147	struct kvm_pgtable *pgt = arg;
1152	struct kvm_pgtable_mm_ops *mm_ops = pgt->mm_ops;	1148	struct kvm_pgtable_mm_ops *mm_ops = pgt->mm_ops;
1153	kvm_pte_t pte = *ptep;	1149	kvm_pte_t pte = *ptep;
1154	kvm_pte_t *pte_follow;
1155		1150
1156	if (!kvm_pte_valid(pte) \|\| !stage2_pte_cacheable(pgt, pte))	1151	if (!kvm_pte_valid(pte) \|\| !stage2_pte_cacheable(pgt, pte))
1157	return 0;	1152	return 0;
1158		1153
1159	pte_follow = kvm_pte_follow(pte, mm_ops);	1154	if (mm_ops->dcache_clean_inval_poc)
1160	dcache_clean_inval_poc((unsigned long)pte_follow,	1155	mm_ops->dcache_clean_inval_poc(kvm_pte_follow(pte, mm_ops),
1161	(unsigned long)pte_follow +	1156	kvm_granule_size(level));
1162	kvm_granule_size(level));
1163	return 0;	1157	return 0;
1164	}	1158	}
1165		1159

arch/arm64/kvm/hyp/vgic-v3-sr.c+3−0

 	val = ((vtr >> 29) & 7) << ICC_CTLR_EL1_PRI_BITS_SHIFT;
 	/* IDbits */
 	val |= ((vtr >> 23) & 7) << ICC_CTLR_EL1_ID_BITS_SHIFT;
+	/* SEIS */
+	if (kvm_vgic_global_state.ich_vtr_el2 & ICH_VTR_SEIS_MASK)
+		val |= BIT(ICC_CTLR_EL1_SEIS_SHIFT);
 	/* A3V */
 	val |= ((vtr >> 21) & 1) << ICC_CTLR_EL1_A3V_SHIFT;
 	/* EOImode */

arch/arm64/kvm/vgic/vgic-v3.c+15−2

 }
 early_param("kvm-arm.vgic_v4_enable", early_gicv4_enable);
+static const struct midr_range broken_seis[] = {
+	MIDR_ALL_VERSIONS(MIDR_APPLE_M1_ICESTORM),
+	MIDR_ALL_VERSIONS(MIDR_APPLE_M1_FIRESTORM),
+	{},
+};
+static bool vgic_v3_broken_seis(void)
+{
+	return ((kvm_vgic_global_state.ich_vtr_el2 & ICH_VTR_SEIS_MASK) &&
+		is_midr_in_range_list(read_cpuid_id(), broken_seis));
+}
 /**
  * vgic_v3_probe - probe for a VGICv3 compatible interrupt controller
  * @info:	pointer to the GIC description
 		group1_trap = true;
 	}
-	if (kvm_vgic_global_state.ich_vtr_el2 & ICH_VTR_SEIS_MASK) {
+	if (vgic_v3_broken_seis()) {
-		kvm_info("GICv3 with locally generated SEI\n");
+		kvm_info("GICv3 with broken locally generated SEI\n");
+		kvm_vgic_global_state.ich_vtr_el2 &= ~ICH_VTR_SEIS_MASK;
 		group0_trap = true;
 		group1_trap = true;
 		if (ich_vtr_el2 & ICH_VTR_TDS_MASK)

arch/arm64/mm/extable.c+2−2

@@ -40,8 +40,8 @@ static bool · 39 unmodified lines
40	ex_handler_load_unaligned_zeropad(const struct exception_table_entry *ex,	40	ex_handler_load_unaligned_zeropad(const struct exception_table_entry *ex,
41	struct pt_regs *regs)	41	struct pt_regs *regs)
42	{	42	{
43	int reg_data = FIELD_GET(EX_DATA_REG_DATA, ex->type);	43	int reg_data = FIELD_GET(EX_DATA_REG_DATA, ex->data);
44	int reg_addr = FIELD_GET(EX_DATA_REG_ADDR, ex->type);	44	int reg_addr = FIELD_GET(EX_DATA_REG_ADDR, ex->data);
45	unsigned long data, addr, offset;	45	unsigned long data, addr, offset;
46		46
47	addr = pt_regs_read_reg(regs, reg_addr);	47	addr = pt_regs_read_reg(regs, reg_addr);

arch/arm64/tools/cpucaps+3−0

 WORKAROUND_1463225
 WORKAROUND_1508412
 WORKAROUND_1542419
+WORKAROUND_2064142
+WORKAROUND_2038923
+WORKAROUND_1902691
 WORKAROUND_TRBE_OVERWRITE_FILL_MODE
 WORKAROUND_TSB_FLUSH_FAILURE
 WORKAROUND_TRBE_WRITE_OUT_OF_RANGE

arch/ia64/Kconfig+1−1

@@ -318,7 +318,7 @@ config ARCH_PROC_KCORE_TEXT · 317 unmodified lines
318	depends on PROC_KCORE	318	depends on PROC_KCORE
319		319
320	config IA64_MCA_RECOVERY	320	config IA64_MCA_RECOVERY
321	tristate "MCA recovery from errors other than TLB."	321	bool "MCA recovery from errors other than TLB."
322		322
323	config IA64_PALINFO	323	config IA64_PALINFO
324	tristate "/proc/pal support"	324	tristate "/proc/pal support"

arch/ia64/pci/fixup.c+2−2

@@ -76,5 +76,5 @@ static void pci_fixup_video(struct pci_dev *pdev) · 75 unmodified lines
76	}	76	}
77	}	77	}
78	}	78	}
79	DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,	79	DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_ANY_ID, PCI_ANY_ID,
80	PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);	80	PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);

arch/mips/include/asm/asm.h+2−2

@@ -285,7 +285,7 @@ symbol = value · 284 unmodified lines
285		285
286	#define PTR_SCALESHIFT 2	286	#define PTR_SCALESHIFT 2
287		287
288	#define PTR .word	288	#define PTR_WD .word
289	#define PTRSIZE 4	289	#define PTRSIZE 4
290	#define PTRLOG 2	290	#define PTRLOG 2
291	#endif	291	#endif
@@ -310,7 +310,7 @@ symbol = value · 18 unmodified lines
310		310
311	#define PTR_SCALESHIFT 3	311	#define PTR_SCALESHIFT 3
312		312
313	#define PTR .dword	313	#define PTR_WD .dword
314	#define PTRSIZE 8	314	#define PTRSIZE 8
315	#define PTRLOG 3	315	#define PTRLOG 3
316	#endif	316	#endif

arch/mips/include/asm/ftrace.h+2−2

@@ -32,7 +32,7 @@ do { \ · 31 unmodified lines
32	".previous\n" \	32	".previous\n" \
33	\	33	\
34	".section\t__ex_table,\"a\"\n\t" \	34	".section\t__ex_table,\"a\"\n\t" \
35	STR(PTR) "\t1b, 3b\n\t" \	35	STR(PTR_WD) "\t1b, 3b\n\t" \
36	".previous\n" \	36	".previous\n" \
37	\	37	\
38	: [tmp_dst] "=&r" (dst), [tmp_err] "=r" (error)\	38	: [tmp_dst] "=&r" (dst), [tmp_err] "=r" (error)\
@@ -54,7 +54,7 @@ do { \ · 15 unmodified lines
54	".previous\n" \	54	".previous\n" \
55	\	55	\
56	".section\t__ex_table,\"a\"\n\t"\	56	".section\t__ex_table,\"a\"\n\t"\
57	STR(PTR) "\t1b, 3b\n\t" \	57	STR(PTR_WD) "\t1b, 3b\n\t" \
58	".previous\n" \	58	".previous\n" \
59	\	59	\
60	: [tmp_err] "=r" (error) \	60	: [tmp_err] "=r" (error) \

arch/mips/include/asm/r4kcache.h+2−2

@@ -119,7 +119,7 @@ static inline void flush_scache_line(unsigned long addr) · 118 unmodified lines
119	" j 2b \n" \	119	" j 2b \n" \
120	" .previous \n" \	120	" .previous \n" \
121	" .section __ex_table,\"a\" \n" \	121	" .section __ex_table,\"a\" \n" \
122	" "STR(PTR)" 1b, 3b \n" \	122	" "STR(PTR_WD)" 1b, 3b \n" \
123	" .previous" \	123	" .previous" \
124	: "+r" (__err) \	124	: "+r" (__err) \
125	: "i" (op), "r" (addr), "i" (-EFAULT)); \	125	: "i" (op), "r" (addr), "i" (-EFAULT)); \
@@ -142,7 +142,7 @@ static inline void flush_scache_line(unsigned long addr) · 16 unmodified lines
142	" j 2b \n" \	142	" j 2b \n" \
143	" .previous \n" \	143	" .previous \n" \
144	" .section __ex_table,\"a\" \n" \	144	" .section __ex_table,\"a\" \n" \
145	" "STR(PTR)" 1b, 3b \n" \	145	" "STR(PTR_WD)" 1b, 3b \n" \
146	" .previous" \	146	" .previous" \
147	: "+r" (__err) \	147	: "+r" (__err) \
148	: "i" (op), "r" (addr), "i" (-EFAULT)); \	148	: "i" (op), "r" (addr), "i" (-EFAULT)); \

arch/mips/include/asm/unaligned-emul.h+88−88

@@ -20,8 +20,8 @@ do { \ · 19 unmodified lines
20	"j\t3b\n\t" \	20	"j\t3b\n\t" \
21	".previous\n\t" \	21	".previous\n\t" \
22	".section\t__ex_table,\"a\"\n\t" \	22	".section\t__ex_table,\"a\"\n\t" \
23	STR(PTR)"\t1b, 4b\n\t" \	23	STR(PTR_WD)"\t1b, 4b\n\t" \
24	STR(PTR)"\t2b, 4b\n\t" \	24	STR(PTR_WD)"\t2b, 4b\n\t" \
25	".previous" \	25	".previous" \
26	: "=&r" (value), "=r" (res) \	26	: "=&r" (value), "=r" (res) \
27	: "r" (addr), "i" (-EFAULT)); \	27	: "r" (addr), "i" (-EFAULT)); \
@@ -41,8 +41,8 @@ do { \ · 13 unmodified lines
41	"j\t3b\n\t" \	41	"j\t3b\n\t" \
42	".previous\n\t" \	42	".previous\n\t" \
43	".section\t__ex_table,\"a\"\n\t" \	43	".section\t__ex_table,\"a\"\n\t" \
44	STR(PTR)"\t1b, 4b\n\t" \	44	STR(PTR_WD)"\t1b, 4b\n\t" \
45	STR(PTR)"\t2b, 4b\n\t" \	45	STR(PTR_WD)"\t2b, 4b\n\t" \
46	".previous" \	46	".previous" \
47	: "=&r" (value), "=r" (res) \	47	: "=&r" (value), "=r" (res) \
48	: "r" (addr), "i" (-EFAULT)); \	48	: "r" (addr), "i" (-EFAULT)); \
@@ -74,10 +74,10 @@ do { \ · 25 unmodified lines
74	"j\t10b\n\t" \	74	"j\t10b\n\t" \
75	".previous\n\t" \	75	".previous\n\t" \
76	".section\t__ex_table,\"a\"\n\t" \	76	".section\t__ex_table,\"a\"\n\t" \
77	STR(PTR)"\t1b, 11b\n\t" \	77	STR(PTR_WD)"\t1b, 11b\n\t" \
78	STR(PTR)"\t2b, 11b\n\t" \	78	STR(PTR_WD)"\t2b, 11b\n\t" \
79	STR(PTR)"\t3b, 11b\n\t" \	79	STR(PTR_WD)"\t3b, 11b\n\t" \
80	STR(PTR)"\t4b, 11b\n\t" \	80	STR(PTR_WD)"\t4b, 11b\n\t" \
81	".previous" \	81	".previous" \
82	: "=&r" (value), "=r" (res) \	82	: "=&r" (value), "=r" (res) \
83	: "r" (addr), "i" (-EFAULT)); \	83	: "r" (addr), "i" (-EFAULT)); \
@@ -102,8 +102,8 @@ do { \ · 18 unmodified lines
102	"j\t3b\n\t" \	102	"j\t3b\n\t" \
103	".previous\n\t" \	103	".previous\n\t" \
104	".section\t__ex_table,\"a\"\n\t" \	104	".section\t__ex_table,\"a\"\n\t" \
105	STR(PTR)"\t1b, 4b\n\t" \	105	STR(PTR_WD)"\t1b, 4b\n\t" \
106	STR(PTR)"\t2b, 4b\n\t" \	106	STR(PTR_WD)"\t2b, 4b\n\t" \
107	".previous" \	107	".previous" \
108	: "=&r" (value), "=r" (res) \	108	: "=&r" (value), "=r" (res) \
109	: "r" (addr), "i" (-EFAULT)); \	109	: "r" (addr), "i" (-EFAULT)); \
@@ -125,8 +125,8 @@ do { \ · 15 unmodified lines
125	"j\t3b\n\t" \	125	"j\t3b\n\t" \
126	".previous\n\t" \	126	".previous\n\t" \
127	".section\t__ex_table,\"a\"\n\t" \	127	".section\t__ex_table,\"a\"\n\t" \
128	STR(PTR)"\t1b, 4b\n\t" \	128	STR(PTR_WD)"\t1b, 4b\n\t" \
129	STR(PTR)"\t2b, 4b\n\t" \	129	STR(PTR_WD)"\t2b, 4b\n\t" \
130	".previous" \	130	".previous" \
131	: "=&r" (value), "=r" (res) \	131	: "=&r" (value), "=r" (res) \
132	: "r" (addr), "i" (-EFAULT)); \	132	: "r" (addr), "i" (-EFAULT)); \
@@ -145,8 +145,8 @@ do { \ · 12 unmodified lines
145	"j\t3b\n\t" \	145	"j\t3b\n\t" \
146	".previous\n\t" \	146	".previous\n\t" \
147	".section\t__ex_table,\"a\"\n\t" \	147	".section\t__ex_table,\"a\"\n\t" \
148	STR(PTR)"\t1b, 4b\n\t" \	148	STR(PTR_WD)"\t1b, 4b\n\t" \
149	STR(PTR)"\t2b, 4b\n\t" \	149	STR(PTR_WD)"\t2b, 4b\n\t" \
150	".previous" \	150	".previous" \
151	: "=&r" (value), "=r" (res) \	151	: "=&r" (value), "=r" (res) \
152	: "r" (addr), "i" (-EFAULT)); \	152	: "r" (addr), "i" (-EFAULT)); \
@@ -178,10 +178,10 @@ do { \ · 25 unmodified lines
178	"j\t10b\n\t" \	178	"j\t10b\n\t" \
179	".previous\n\t" \	179	".previous\n\t" \
180	".section\t__ex_table,\"a\"\n\t" \	180	".section\t__ex_table,\"a\"\n\t" \
181	STR(PTR)"\t1b, 11b\n\t" \	181	STR(PTR_WD)"\t1b, 11b\n\t" \
182	STR(PTR)"\t2b, 11b\n\t" \	182	STR(PTR_WD)"\t2b, 11b\n\t" \
183	STR(PTR)"\t3b, 11b\n\t" \	183	STR(PTR_WD)"\t3b, 11b\n\t" \
184	STR(PTR)"\t4b, 11b\n\t" \	184	STR(PTR_WD)"\t4b, 11b\n\t" \
185	".previous" \	185	".previous" \
186	: "=&r" (value), "=r" (res) \	186	: "=&r" (value), "=r" (res) \
187	: "r" (addr), "i" (-EFAULT)); \	187	: "r" (addr), "i" (-EFAULT)); \
@@ -223,14 +223,14 @@ do { \ · 35 unmodified lines
223	"j\t10b\n\t" \	223	"j\t10b\n\t" \
224	".previous\n\t" \	224	".previous\n\t" \
225	".section\t__ex_table,\"a\"\n\t" \	225	".section\t__ex_table,\"a\"\n\t" \
226	STR(PTR)"\t1b, 11b\n\t" \	226	STR(PTR_WD)"\t1b, 11b\n\t" \
227	STR(PTR)"\t2b, 11b\n\t" \	227	STR(PTR_WD)"\t2b, 11b\n\t" \
228	STR(PTR)"\t3b, 11b\n\t" \	228	STR(PTR_WD)"\t3b, 11b\n\t" \
229	STR(PTR)"\t4b, 11b\n\t" \	229	STR(PTR_WD)"\t4b, 11b\n\t" \
230	STR(PTR)"\t5b, 11b\n\t" \	230	STR(PTR_WD)"\t5b, 11b\n\t" \
231	STR(PTR)"\t6b, 11b\n\t" \	231	STR(PTR_WD)"\t6b, 11b\n\t" \
232	STR(PTR)"\t7b, 11b\n\t" \	232	STR(PTR_WD)"\t7b, 11b\n\t" \
233	STR(PTR)"\t8b, 11b\n\t" \	233	STR(PTR_WD)"\t8b, 11b\n\t" \
234	".previous" \	234	".previous" \
235	: "=&r" (value), "=r" (res) \	235	: "=&r" (value), "=r" (res) \
236	: "r" (addr), "i" (-EFAULT)); \	236	: "r" (addr), "i" (-EFAULT)); \
@@ -255,8 +255,8 @@ do { \ · 18 unmodified lines
255	"j\t3b\n\t" \	255	"j\t3b\n\t" \
256	".previous\n\t" \	256	".previous\n\t" \
257	".section\t__ex_table,\"a\"\n\t" \	257	".section\t__ex_table,\"a\"\n\t" \
258	STR(PTR)"\t1b, 4b\n\t" \	258	STR(PTR_WD)"\t1b, 4b\n\t" \
259	STR(PTR)"\t2b, 4b\n\t" \	259	STR(PTR_WD)"\t2b, 4b\n\t" \
260	".previous" \	260	".previous" \
261	: "=r" (res) \	261	: "=r" (res) \
262	: "r" (value), "r" (addr), "i" (-EFAULT));\	262	: "r" (value), "r" (addr), "i" (-EFAULT));\
@@ -276,8 +276,8 @@ do { \ · 13 unmodified lines
276	"j\t3b\n\t" \	276	"j\t3b\n\t" \
277	".previous\n\t" \	277	".previous\n\t" \
278	".section\t__ex_table,\"a\"\n\t" \	278	".section\t__ex_table,\"a\"\n\t" \
279	STR(PTR)"\t1b, 4b\n\t" \	279	STR(PTR_WD)"\t1b, 4b\n\t" \
280	STR(PTR)"\t2b, 4b\n\t" \	280	STR(PTR_WD)"\t2b, 4b\n\t" \
281	".previous" \	281	".previous" \
282	: "=r" (res) \	282	: "=r" (res) \
283	: "r" (value), "r" (addr), "i" (-EFAULT)); \	283	: "r" (value), "r" (addr), "i" (-EFAULT)); \
@@ -296,8 +296,8 @@ do { \ · 12 unmodified lines
296	"j\t3b\n\t" \	296	"j\t3b\n\t" \
297	".previous\n\t" \	297	".previous\n\t" \
298	".section\t__ex_table,\"a\"\n\t" \	298	".section\t__ex_table,\"a\"\n\t" \
299	STR(PTR)"\t1b, 4b\n\t" \	299	STR(PTR_WD)"\t1b, 4b\n\t" \
300	STR(PTR)"\t2b, 4b\n\t" \	300	STR(PTR_WD)"\t2b, 4b\n\t" \
301	".previous" \	301	".previous" \
302	: "=r" (res) \	302	: "=r" (res) \
303	: "r" (value), "r" (addr), "i" (-EFAULT)); \	303	: "r" (value), "r" (addr), "i" (-EFAULT)); \
@@ -325,10 +325,10 @@ do { \ · 21 unmodified lines
325	"j\t10b\n\t" \	325	"j\t10b\n\t" \
326	".previous\n\t" \	326	".previous\n\t" \
327	".section\t__ex_table,\"a\"\n\t" \	327	".section\t__ex_table,\"a\"\n\t" \
328	STR(PTR)"\t1b, 11b\n\t" \	328	STR(PTR_WD)"\t1b, 11b\n\t" \
329	STR(PTR)"\t2b, 11b\n\t" \	329	STR(PTR_WD)"\t2b, 11b\n\t" \
330	STR(PTR)"\t3b, 11b\n\t" \	330	STR(PTR_WD)"\t3b, 11b\n\t" \
331	STR(PTR)"\t4b, 11b\n\t" \	331	STR(PTR_WD)"\t4b, 11b\n\t" \
332	".previous" \	332	".previous" \
333	: "=&r" (res) \	333	: "=&r" (res) \
334	: "r" (value), "r" (addr), "i" (-EFAULT) \	334	: "r" (value), "r" (addr), "i" (-EFAULT) \
@@ -365,14 +365,14 @@ do { \ · 30 unmodified lines
365	"j\t10b\n\t" \	365	"j\t10b\n\t" \
366	".previous\n\t" \	366	".previous\n\t" \
367	".section\t__ex_table,\"a\"\n\t" \	367	".section\t__ex_table,\"a\"\n\t" \
368	STR(PTR)"\t1b, 11b\n\t" \	368	STR(PTR_WD)"\t1b, 11b\n\t" \
369	STR(PTR)"\t2b, 11b\n\t" \	369	STR(PTR_WD)"\t2b, 11b\n\t" \
370	STR(PTR)"\t3b, 11b\n\t" \	370	STR(PTR_WD)"\t3b, 11b\n\t" \
371	STR(PTR)"\t4b, 11b\n\t" \	371	STR(PTR_WD)"\t4b, 11b\n\t" \
372	STR(PTR)"\t5b, 11b\n\t" \	372	STR(PTR_WD)"\t5b, 11b\n\t" \
373	STR(PTR)"\t6b, 11b\n\t" \	373	STR(PTR_WD)"\t6b, 11b\n\t" \
374	STR(PTR)"\t7b, 11b\n\t" \	374	STR(PTR_WD)"\t7b, 11b\n\t" \
375	STR(PTR)"\t8b, 11b\n\t" \	375	STR(PTR_WD)"\t8b, 11b\n\t" \
376	".previous" \	376	".previous" \
377	: "=&r" (res) \	377	: "=&r" (res) \
378	: "r" (value), "r" (addr), "i" (-EFAULT) \	378	: "r" (value), "r" (addr), "i" (-EFAULT) \
@@ -398,8 +398,8 @@ do { \ · 19 unmodified lines
398	"j\t3b\n\t" \	398	"j\t3b\n\t" \
399	".previous\n\t" \	399	".previous\n\t" \
400	".section\t__ex_table,\"a\"\n\t" \	400	".section\t__ex_table,\"a\"\n\t" \
401	STR(PTR)"\t1b, 4b\n\t" \	401	STR(PTR_WD)"\t1b, 4b\n\t" \
402	STR(PTR)"\t2b, 4b\n\t" \	402	STR(PTR_WD)"\t2b, 4b\n\t" \
403	".previous" \	403	".previous" \
404	: "=&r" (value), "=r" (res) \	404	: "=&r" (value), "=r" (res) \
405	: "r" (addr), "i" (-EFAULT)); \	405	: "r" (addr), "i" (-EFAULT)); \
@@ -419,8 +419,8 @@ do { \ · 13 unmodified lines
419	"j\t3b\n\t" \	419	"j\t3b\n\t" \
420	".previous\n\t" \	420	".previous\n\t" \
421	".section\t__ex_table,\"a\"\n\t" \	421	".section\t__ex_table,\"a\"\n\t" \
422	STR(PTR)"\t1b, 4b\n\t" \	422	STR(PTR_WD)"\t1b, 4b\n\t" \
423	STR(PTR)"\t2b, 4b\n\t" \	423	STR(PTR_WD)"\t2b, 4b\n\t" \
424	".previous" \	424	".previous" \
425	: "=&r" (value), "=r" (res) \	425	: "=&r" (value), "=r" (res) \
426	: "r" (addr), "i" (-EFAULT)); \	426	: "r" (addr), "i" (-EFAULT)); \
@@ -452,10 +452,10 @@ do { \ · 25 unmodified lines
452	"j\t10b\n\t" \	452	"j\t10b\n\t" \
453	".previous\n\t" \	453	".previous\n\t" \
454	".section\t__ex_table,\"a\"\n\t" \	454	".section\t__ex_table,\"a\"\n\t" \
455	STR(PTR)"\t1b, 11b\n\t" \	455	STR(PTR_WD)"\t1b, 11b\n\t" \
456	STR(PTR)"\t2b, 11b\n\t" \	456	STR(PTR_WD)"\t2b, 11b\n\t" \
457	STR(PTR)"\t3b, 11b\n\t" \	457	STR(PTR_WD)"\t3b, 11b\n\t" \
458	STR(PTR)"\t4b, 11b\n\t" \	458	STR(PTR_WD)"\t4b, 11b\n\t" \
459	".previous" \	459	".previous" \
460	: "=&r" (value), "=r" (res) \	460	: "=&r" (value), "=r" (res) \
461	: "r" (addr), "i" (-EFAULT)); \	461	: "r" (addr), "i" (-EFAULT)); \
@@ -481,8 +481,8 @@ do { \ · 19 unmodified lines
481	"j\t3b\n\t" \	481	"j\t3b\n\t" \
482	".previous\n\t" \	482	".previous\n\t" \
483	".section\t__ex_table,\"a\"\n\t" \	483	".section\t__ex_table,\"a\"\n\t" \
484	STR(PTR)"\t1b, 4b\n\t" \	484	STR(PTR_WD)"\t1b, 4b\n\t" \
485	STR(PTR)"\t2b, 4b\n\t" \	485	STR(PTR_WD)"\t2b, 4b\n\t" \
486	".previous" \	486	".previous" \
487	: "=&r" (value), "=r" (res) \	487	: "=&r" (value), "=r" (res) \
488	: "r" (addr), "i" (-EFAULT)); \	488	: "r" (addr), "i" (-EFAULT)); \
@@ -504,8 +504,8 @@ do { \ · 15 unmodified lines
504	"j\t3b\n\t" \	504	"j\t3b\n\t" \
505	".previous\n\t" \	505	".previous\n\t" \
506	".section\t__ex_table,\"a\"\n\t" \	506	".section\t__ex_table,\"a\"\n\t" \
507	STR(PTR)"\t1b, 4b\n\t" \	507	STR(PTR_WD)"\t1b, 4b\n\t" \
508	STR(PTR)"\t2b, 4b\n\t" \	508	STR(PTR_WD)"\t2b, 4b\n\t" \
509	".previous" \	509	".previous" \
510	: "=&r" (value), "=r" (res) \	510	: "=&r" (value), "=r" (res) \
511	: "r" (addr), "i" (-EFAULT)); \	511	: "r" (addr), "i" (-EFAULT)); \
@@ -524,8 +524,8 @@ do { \ · 12 unmodified lines
524	"j\t3b\n\t" \	524	"j\t3b\n\t" \
525	".previous\n\t" \	525	".previous\n\t" \
526	".section\t__ex_table,\"a\"\n\t" \	526	".section\t__ex_table,\"a\"\n\t" \
527	STR(PTR)"\t1b, 4b\n\t" \	527	STR(PTR_WD)"\t1b, 4b\n\t" \
528	STR(PTR)"\t2b, 4b\n\t" \	528	STR(PTR_WD)"\t2b, 4b\n\t" \
529	".previous" \	529	".previous" \
530	: "=&r" (value), "=r" (res) \	530	: "=&r" (value), "=r" (res) \
531	: "r" (addr), "i" (-EFAULT)); \	531	: "r" (addr), "i" (-EFAULT)); \
@@ -557,10 +557,10 @@ do { \ · 25 unmodified lines
557	"j\t10b\n\t" \	557	"j\t10b\n\t" \
558	".previous\n\t" \	558	".previous\n\t" \
559	".section\t__ex_table,\"a\"\n\t" \	559	".section\t__ex_table,\"a\"\n\t" \
560	STR(PTR)"\t1b, 11b\n\t" \	560	STR(PTR_WD)"\t1b, 11b\n\t" \
561	STR(PTR)"\t2b, 11b\n\t" \	561	STR(PTR_WD)"\t2b, 11b\n\t" \
562	STR(PTR)"\t3b, 11b\n\t" \	562	STR(PTR_WD)"\t3b, 11b\n\t" \
563	STR(PTR)"\t4b, 11b\n\t" \	563	STR(PTR_WD)"\t4b, 11b\n\t" \
564	".previous" \	564	".previous" \
565	: "=&r" (value), "=r" (res) \	565	: "=&r" (value), "=r" (res) \
566	: "r" (addr), "i" (-EFAULT)); \	566	: "r" (addr), "i" (-EFAULT)); \
@@ -602,14 +602,14 @@ do { \ · 35 unmodified lines
602	"j\t10b\n\t" \	602	"j\t10b\n\t" \
603	".previous\n\t" \	603	".previous\n\t" \
604	".section\t__ex_table,\"a\"\n\t" \	604	".section\t__ex_table,\"a\"\n\t" \
605	STR(PTR)"\t1b, 11b\n\t" \	605	STR(PTR_WD)"\t1b, 11b\n\t" \
606	STR(PTR)"\t2b, 11b\n\t" \	606	STR(PTR_WD)"\t2b, 11b\n\t" \
607	STR(PTR)"\t3b, 11b\n\t" \	607	STR(PTR_WD)"\t3b, 11b\n\t" \
608	STR(PTR)"\t4b, 11b\n\t" \	608	STR(PTR_WD)"\t4b, 11b\n\t" \
609	STR(PTR)"\t5b, 11b\n\t" \	609	STR(PTR_WD)"\t5b, 11b\n\t" \
610	STR(PTR)"\t6b, 11b\n\t" \	610	STR(PTR_WD)"\t6b, 11b\n\t" \
611	STR(PTR)"\t7b, 11b\n\t" \	611	STR(PTR_WD)"\t7b, 11b\n\t" \
612	STR(PTR)"\t8b, 11b\n\t" \	612	STR(PTR_WD)"\t8b, 11b\n\t" \
613	".previous" \	613	".previous" \
614	: "=&r" (value), "=r" (res) \	614	: "=&r" (value), "=r" (res) \
615	: "r" (addr), "i" (-EFAULT)); \	615	: "r" (addr), "i" (-EFAULT)); \
@@ -632,8 +632,8 @@ do { \ · 16 unmodified lines
632	"j\t3b\n\t" \	632	"j\t3b\n\t" \
633	".previous\n\t" \	633	".previous\n\t" \
634	".section\t__ex_table,\"a\"\n\t" \	634	".section\t__ex_table,\"a\"\n\t" \
635	STR(PTR)"\t1b, 4b\n\t" \	635	STR(PTR_WD)"\t1b, 4b\n\t" \
636	STR(PTR)"\t2b, 4b\n\t" \	636	STR(PTR_WD)"\t2b, 4b\n\t" \
637	".previous" \	637	".previous" \
638	: "=r" (res) \	638	: "=r" (res) \
639	: "r" (value), "r" (addr), "i" (-EFAULT));\	639	: "r" (value), "r" (addr), "i" (-EFAULT));\
@@ -653,8 +653,8 @@ do { \ · 13 unmodified lines
653	"j\t3b\n\t" \	653	"j\t3b\n\t" \
654	".previous\n\t" \	654	".previous\n\t" \
655	".section\t__ex_table,\"a\"\n\t" \	655	".section\t__ex_table,\"a\"\n\t" \
656	STR(PTR)"\t1b, 4b\n\t" \	656	STR(PTR_WD)"\t1b, 4b\n\t" \
657	STR(PTR)"\t2b, 4b\n\t" \	657	STR(PTR_WD)"\t2b, 4b\n\t" \
658	".previous" \	658	".previous" \
659	: "=r" (res) \	659	: "=r" (res) \
660	: "r" (value), "r" (addr), "i" (-EFAULT)); \	660	: "r" (value), "r" (addr), "i" (-EFAULT)); \
@@ -673,8 +673,8 @@ do { \ · 12 unmodified lines
673	"j\t3b\n\t" \	673	"j\t3b\n\t" \
674	".previous\n\t" \	674	".previous\n\t" \
675	".section\t__ex_table,\"a\"\n\t" \	675	".section\t__ex_table,\"a\"\n\t" \
676	STR(PTR)"\t1b, 4b\n\t" \	676	STR(PTR_WD)"\t1b, 4b\n\t" \
677	STR(PTR)"\t2b, 4b\n\t" \	677	STR(PTR_WD)"\t2b, 4b\n\t" \
678	".previous" \	678	".previous" \
679	: "=r" (res) \	679	: "=r" (res) \
680	: "r" (value), "r" (addr), "i" (-EFAULT)); \	680	: "r" (value), "r" (addr), "i" (-EFAULT)); \
@@ -703,10 +703,10 @@ do { \ · 22 unmodified lines
703	"j\t10b\n\t" \	703	"j\t10b\n\t" \
704	".previous\n\t" \	704	".previous\n\t" \
705	".section\t__ex_table,\"a\"\n\t" \	705	".section\t__ex_table,\"a\"\n\t" \
706	STR(PTR)"\t1b, 11b\n\t" \	706	STR(PTR_WD)"\t1b, 11b\n\t" \
707	STR(PTR)"\t2b, 11b\n\t" \	707	STR(PTR_WD)"\t2b, 11b\n\t" \
708	STR(PTR)"\t3b, 11b\n\t" \	708	STR(PTR_WD)"\t3b, 11b\n\t" \
709	STR(PTR)"\t4b, 11b\n\t" \	709	STR(PTR_WD)"\t4b, 11b\n\t" \
710	".previous" \	710	".previous" \
711	: "=&r" (res) \	711	: "=&r" (res) \
712	: "r" (value), "r" (addr), "i" (-EFAULT) \	712	: "r" (value), "r" (addr), "i" (-EFAULT) \
@@ -743,14 +743,14 @@ do { \ · 30 unmodified lines
743	"j\t10b\n\t" \	743	"j\t10b\n\t" \
744	".previous\n\t" \	744	".previous\n\t" \
745	".section\t__ex_table,\"a\"\n\t" \	745	".section\t__ex_table,\"a\"\n\t" \
746	STR(PTR)"\t1b, 11b\n\t" \	746	STR(PTR_WD)"\t1b, 11b\n\t" \
747	STR(PTR)"\t2b, 11b\n\t" \	747	STR(PTR_WD)"\t2b, 11b\n\t" \
748	STR(PTR)"\t3b, 11b\n\t" \	748	STR(PTR_WD)"\t3b, 11b\n\t" \
749	STR(PTR)"\t4b, 11b\n\t" \	749	STR(PTR_WD)"\t4b, 11b\n\t" \
750	STR(PTR)"\t5b, 11b\n\t" \	750	STR(PTR_WD)"\t5b, 11b\n\t" \
751	STR(PTR)"\t6b, 11b\n\t" \	751	STR(PTR_WD)"\t6b, 11b\n\t" \
752	STR(PTR)"\t7b, 11b\n\t" \	752	STR(PTR_WD)"\t7b, 11b\n\t" \
753	STR(PTR)"\t8b, 11b\n\t" \	753	STR(PTR_WD)"\t8b, 11b\n\t" \
754	".previous" \	754	".previous" \
755	: "=&r" (res) \	755	: "=&r" (res) \
756	: "r" (value), "r" (addr), "i" (-EFAULT) \	756	: "r" (value), "r" (addr), "i" (-EFAULT) \

arch/mips/kernel/mips-r2-to-r6-emul.c+52−52

@@ -1258,10 +1258,10 @@ fpu_emul: · 1257 unmodified lines
1258	" j 10b\n"	1258	" j 10b\n"
1259	" .previous\n"	1259	" .previous\n"
1260	" .section __ex_table,\"a\"\n"	1260	" .section __ex_table,\"a\"\n"
1261	STR(PTR) " 1b,8b\n"	1261	STR(PTR_WD) " 1b,8b\n"
1262	STR(PTR) " 2b,8b\n"	1262	STR(PTR_WD) " 2b,8b\n"
1263	STR(PTR) " 3b,8b\n"	1263	STR(PTR_WD) " 3b,8b\n"
1264	STR(PTR) " 4b,8b\n"	1264	STR(PTR_WD) " 4b,8b\n"
1265	" .previous\n"	1265	" .previous\n"
1266	" .set pop\n"	1266	" .set pop\n"
1267	: "+&r"(rt), "=&r"(rs),	1267	: "+&r"(rt), "=&r"(rs),
@@ -1333,10 +1333,10 @@ fpu_emul: · 65 unmodified lines
1333	" j 10b\n"	1333	" j 10b\n"
1334	" .previous\n"	1334	" .previous\n"
1335	" .section __ex_table,\"a\"\n"	1335	" .section __ex_table,\"a\"\n"
1336	STR(PTR) " 1b,8b\n"	1336	STR(PTR_WD) " 1b,8b\n"
1337	STR(PTR) " 2b,8b\n"	1337	STR(PTR_WD) " 2b,8b\n"
1338	STR(PTR) " 3b,8b\n"	1338	STR(PTR_WD) " 3b,8b\n"
1339	STR(PTR) " 4b,8b\n"	1339	STR(PTR_WD) " 4b,8b\n"
1340	" .previous\n"	1340	" .previous\n"
1341	" .set pop\n"	1341	" .set pop\n"
1342	: "+&r"(rt), "=&r"(rs),	1342	: "+&r"(rt), "=&r"(rs),
@@ -1404,10 +1404,10 @@ fpu_emul: · 61 unmodified lines
1404	" j 9b\n"	1404	" j 9b\n"
1405	" .previous\n"	1405	" .previous\n"
1406	" .section __ex_table,\"a\"\n"	1406	" .section __ex_table,\"a\"\n"
1407	STR(PTR) " 1b,8b\n"	1407	STR(PTR_WD) " 1b,8b\n"
1408	STR(PTR) " 2b,8b\n"	1408	STR(PTR_WD) " 2b,8b\n"
1409	STR(PTR) " 3b,8b\n"	1409	STR(PTR_WD) " 3b,8b\n"
1410	STR(PTR) " 4b,8b\n"	1410	STR(PTR_WD) " 4b,8b\n"
1411	" .previous\n"	1411	" .previous\n"
1412	" .set pop\n"	1412	" .set pop\n"
1413	: "+&r"(rt), "=&r"(rs),	1413	: "+&r"(rt), "=&r"(rs),
@@ -1474,10 +1474,10 @@ fpu_emul: · 60 unmodified lines
1474	" j 9b\n"	1474	" j 9b\n"
1475	" .previous\n"	1475	" .previous\n"
1476	" .section __ex_table,\"a\"\n"	1476	" .section __ex_table,\"a\"\n"
1477	STR(PTR) " 1b,8b\n"	1477	STR(PTR_WD) " 1b,8b\n"
1478	STR(PTR) " 2b,8b\n"	1478	STR(PTR_WD) " 2b,8b\n"
1479	STR(PTR) " 3b,8b\n"	1479	STR(PTR_WD) " 3b,8b\n"
1480	STR(PTR) " 4b,8b\n"	1480	STR(PTR_WD) " 4b,8b\n"
1481	" .previous\n"	1481	" .previous\n"
1482	" .set pop\n"	1482	" .set pop\n"
1483	: "+&r"(rt), "=&r"(rs),	1483	: "+&r"(rt), "=&r"(rs),
@@ -1589,14 +1589,14 @@ fpu_emul: · 105 unmodified lines
1589	" j 9b\n"	1589	" j 9b\n"
1590	" .previous\n"	1590	" .previous\n"
1591	" .section __ex_table,\"a\"\n"	1591	" .section __ex_table,\"a\"\n"
1592	STR(PTR) " 1b,8b\n"	1592	STR(PTR_WD) " 1b,8b\n"
1593	STR(PTR) " 2b,8b\n"	1593	STR(PTR_WD) " 2b,8b\n"
1594	STR(PTR) " 3b,8b\n"	1594	STR(PTR_WD) " 3b,8b\n"
1595	STR(PTR) " 4b,8b\n"	1595	STR(PTR_WD) " 4b,8b\n"
1596	STR(PTR) " 5b,8b\n"	1596	STR(PTR_WD) " 5b,8b\n"
1597	STR(PTR) " 6b,8b\n"	1597	STR(PTR_WD) " 6b,8b\n"
1598	STR(PTR) " 7b,8b\n"	1598	STR(PTR_WD) " 7b,8b\n"
1599	STR(PTR) " 0b,8b\n"	1599	STR(PTR_WD) " 0b,8b\n"
1600	" .previous\n"	1600	" .previous\n"
1601	" .set pop\n"	1601	" .set pop\n"
1602	: "+&r"(rt), "=&r"(rs),	1602	: "+&r"(rt), "=&r"(rs),
@@ -1708,14 +1708,14 @@ fpu_emul: · 105 unmodified lines
1708	" j 9b\n"	1708	" j 9b\n"
1709	" .previous\n"	1709	" .previous\n"
1710	" .section __ex_table,\"a\"\n"	1710	" .section __ex_table,\"a\"\n"
1711	STR(PTR) " 1b,8b\n"	1711	STR(PTR_WD) " 1b,8b\n"
1712	STR(PTR) " 2b,8b\n"	1712	STR(PTR_WD) " 2b,8b\n"
1713	STR(PTR) " 3b,8b\n"	1713	STR(PTR_WD) " 3b,8b\n"
1714	STR(PTR) " 4b,8b\n"	1714	STR(PTR_WD) " 4b,8b\n"
1715	STR(PTR) " 5b,8b\n"	1715	STR(PTR_WD) " 5b,8b\n"
1716	STR(PTR) " 6b,8b\n"	1716	STR(PTR_WD) " 6b,8b\n"
1717	STR(PTR) " 7b,8b\n"	1717	STR(PTR_WD) " 7b,8b\n"
1718	STR(PTR) " 0b,8b\n"	1718	STR(PTR_WD) " 0b,8b\n"
1719	" .previous\n"	1719	" .previous\n"
1720	" .set pop\n"	1720	" .set pop\n"
1721	: "+&r"(rt), "=&r"(rs),	1721	: "+&r"(rt), "=&r"(rs),
@@ -1827,14 +1827,14 @@ fpu_emul: · 105 unmodified lines
1827	" j 9b\n"	1827	" j 9b\n"
1828	" .previous\n"	1828	" .previous\n"
1829	" .section __ex_table,\"a\"\n"	1829	" .section __ex_table,\"a\"\n"
1830	STR(PTR) " 1b,8b\n"	1830	STR(PTR_WD) " 1b,8b\n"
1831	STR(PTR) " 2b,8b\n"	1831	STR(PTR_WD) " 2b,8b\n"
1832	STR(PTR) " 3b,8b\n"	1832	STR(PTR_WD) " 3b,8b\n"
1833	STR(PTR) " 4b,8b\n"	1833	STR(PTR_WD) " 4b,8b\n"
1834	STR(PTR) " 5b,8b\n"	1834	STR(PTR_WD) " 5b,8b\n"
1835	STR(PTR) " 6b,8b\n"	1835	STR(PTR_WD) " 6b,8b\n"
1836	STR(PTR) " 7b,8b\n"	1836	STR(PTR_WD) " 7b,8b\n"
1837	STR(PTR) " 0b,8b\n"	1837	STR(PTR_WD) " 0b,8b\n"
1838	" .previous\n"	1838	" .previous\n"
1839	" .set pop\n"	1839	" .set pop\n"
1840	: "+&r"(rt), "=&r"(rs),	1840	: "+&r"(rt), "=&r"(rs),
@@ -1945,14 +1945,14 @@ fpu_emul: · 104 unmodified lines
1945	" j 9b\n"	1945	" j 9b\n"
1946	" .previous\n"	1946	" .previous\n"
1947	" .section __ex_table,\"a\"\n"	1947	" .section __ex_table,\"a\"\n"
1948	STR(PTR) " 1b,8b\n"	1948	STR(PTR_WD) " 1b,8b\n"
1949	STR(PTR) " 2b,8b\n"	1949	STR(PTR_WD) " 2b,8b\n"
1950	STR(PTR) " 3b,8b\n"	1950	STR(PTR_WD) " 3b,8b\n"
1951	STR(PTR) " 4b,8b\n"	1951	STR(PTR_WD) " 4b,8b\n"
1952	STR(PTR) " 5b,8b\n"	1952	STR(PTR_WD) " 5b,8b\n"
1953	STR(PTR) " 6b,8b\n"	1953	STR(PTR_WD) " 6b,8b\n"
1954	STR(PTR) " 7b,8b\n"	1954	STR(PTR_WD) " 7b,8b\n"
1955	STR(PTR) " 0b,8b\n"	1955	STR(PTR_WD) " 0b,8b\n"
1956	" .previous\n"	1956	" .previous\n"
1957	" .set pop\n"	1957	" .set pop\n"
1958	: "+&r"(rt), "=&r"(rs),	1958	: "+&r"(rt), "=&r"(rs),
@@ -2007,7 +2007,7 @@ fpu_emul: · 48 unmodified lines
2007	"j 2b\n"	2007	"j 2b\n"
2008	".previous\n"	2008	".previous\n"
2009	".section __ex_table,\"a\"\n"	2009	".section __ex_table,\"a\"\n"
2010	STR(PTR) " 1b,3b\n"	2010	STR(PTR_WD) " 1b,3b\n"
2011	".previous\n"	2011	".previous\n"
2012	: "=&r"(res), "+&r"(err)	2012	: "=&r"(res), "+&r"(err)
2013	: "r"(vaddr), "i"(SIGSEGV)	2013	: "r"(vaddr), "i"(SIGSEGV)
@@ -2065,7 +2065,7 @@ fpu_emul: · 51 unmodified lines
2065	"j 2b\n"	2065	"j 2b\n"
2066	".previous\n"	2066	".previous\n"
2067	".section __ex_table,\"a\"\n"	2067	".section __ex_table,\"a\"\n"
2068	STR(PTR) " 1b,3b\n"	2068	STR(PTR_WD) " 1b,3b\n"
2069	".previous\n"	2069	".previous\n"
2070	: "+&r"(res), "+&r"(err)	2070	: "+&r"(res), "+&r"(err)
2071	: "r"(vaddr), "i"(SIGSEGV));	2071	: "r"(vaddr), "i"(SIGSEGV));
@@ -2126,7 +2126,7 @@ fpu_emul: · 54 unmodified lines
2126	"j 2b\n"	2126	"j 2b\n"
2127	".previous\n"	2127	".previous\n"
2128	".section __ex_table,\"a\"\n"	2128	".section __ex_table,\"a\"\n"
2129	STR(PTR) " 1b,3b\n"	2129	STR(PTR_WD) " 1b,3b\n"
2130	".previous\n"	2130	".previous\n"
2131	: "=&r"(res), "+&r"(err)	2131	: "=&r"(res), "+&r"(err)
2132	: "r"(vaddr), "i"(SIGSEGV)	2132	: "r"(vaddr), "i"(SIGSEGV)
@@ -2189,7 +2189,7 @@ fpu_emul: · 56 unmodified lines
2189	"j 2b\n"	2189	"j 2b\n"
2190	".previous\n"	2190	".previous\n"
2191	".section __ex_table,\"a\"\n"	2191	".section __ex_table,\"a\"\n"
2192	STR(PTR) " 1b,3b\n"	2192	STR(PTR_WD) " 1b,3b\n"
2193	".previous\n"	2193	".previous\n"
2194	: "+&r"(res), "+&r"(err)	2194	: "+&r"(res), "+&r"(err)
2195	: "r"(vaddr), "i"(SIGSEGV));	2195	: "r"(vaddr), "i"(SIGSEGV));

arch/mips/kernel/r2300_fpu.S+3−3

@@ -23,14 +23,14 @@ · 22 unmodified lines
23	#define EX(a,b) \	23	#define EX(a,b) \
24	9: a,##b; \	24	9: a,##b; \
25	.section __ex_table,"a"; \	25	.section __ex_table,"a"; \
26	PTR 9b,fault; \	26	PTR_WD 9b,fault; \
27	.previous	27	.previous
28		28
29	#define EX2(a,b) \	29	#define EX2(a,b) \
30	9: a,##b; \	30	9: a,##b; \
31	.section __ex_table,"a"; \	31	.section __ex_table,"a"; \
32	PTR 9b,fault; \	32	PTR_WD 9b,fault; \
33	PTR 9b+4,fault; \	33	PTR_WD 9b+4,fault; \
34	.previous	34	.previous
35		35
36	.set mips1	36	.set mips1

arch/mips/kernel/r4k_fpu.S+1−1

@@ -31,7 +31,7 @@ · 30 unmodified lines
31	.ex\@: \insn \reg, \src	31	.ex\@: \insn \reg, \src
32	.set pop	32	.set pop
33	.section __ex_table,"a"	33	.section __ex_table,"a"
34	PTR .ex\@, fault	34	PTR_WD .ex\@, fault
35	.previous	35	.previous
36	.endm	36	.endm
37		37

arch/mips/kernel/relocate_kernel.S+11−11

@@ -147,10 +147,10 @@ LEAF(kexec_smp_wait) · 146 unmodified lines
147		147
148	kexec_args:	148	kexec_args:
149	EXPORT(kexec_args)	149	EXPORT(kexec_args)
150	arg0: PTR 0x0	150	arg0: PTR_WD 0x0
151	arg1: PTR 0x0	151	arg1: PTR_WD 0x0
152	arg2: PTR 0x0	152	arg2: PTR_WD 0x0
153	arg3: PTR 0x0	153	arg3: PTR_WD 0x0
154	.size kexec_args,PTRSIZE*4	154	.size kexec_args,PTRSIZE*4
155		155
156	#ifdef CONFIG_SMP	156	#ifdef CONFIG_SMP
@@ -161,10 +161,10 @@ arg3: PTR 0x0 · 4 unmodified lines
161	*/	161	*/
162	secondary_kexec_args:	162	secondary_kexec_args:
163	EXPORT(secondary_kexec_args)	163	EXPORT(secondary_kexec_args)
164	s_arg0: PTR 0x0	164	s_arg0: PTR_WD 0x0
165	s_arg1: PTR 0x0	165	s_arg1: PTR_WD 0x0
166	s_arg2: PTR 0x0	166	s_arg2: PTR_WD 0x0
167	s_arg3: PTR 0x0	167	s_arg3: PTR_WD 0x0
168	.size secondary_kexec_args,PTRSIZE*4	168	.size secondary_kexec_args,PTRSIZE*4
169	kexec_flag:	169	kexec_flag:
170	LONG 0x1	170	LONG 0x1
@@ -173,17 +173,17 @@ kexec_flag: · 2 unmodified lines
173		173
174	kexec_start_address:	174	kexec_start_address:
175	EXPORT(kexec_start_address)	175	EXPORT(kexec_start_address)
176	PTR 0x0	176	PTR_WD 0x0
177	.size kexec_start_address, PTRSIZE	177	.size kexec_start_address, PTRSIZE
178		178
179	kexec_indirection_page:	179	kexec_indirection_page:
180	EXPORT(kexec_indirection_page)	180	EXPORT(kexec_indirection_page)
181	PTR 0	181	PTR_WD 0
182	.size kexec_indirection_page, PTRSIZE	182	.size kexec_indirection_page, PTRSIZE
183		183
184	relocate_new_kernel_end:	184	relocate_new_kernel_end:
185		185
186	relocate_new_kernel_size:	186	relocate_new_kernel_size:
187	EXPORT(relocate_new_kernel_size)	187	EXPORT(relocate_new_kernel_size)
188	PTR relocate_new_kernel_end - relocate_new_kernel	188	PTR_WD relocate_new_kernel_end - relocate_new_kernel
189	.size relocate_new_kernel_size, PTRSIZE	189	.size relocate_new_kernel_size, PTRSIZE

arch/mips/kernel/scall32-o32.S+5−5

@@ -72,10 +72,10 @@ loads_done: · 71 unmodified lines
72	.set pop	72	.set pop
73		73
74	.section __ex_table,"a"	74	.section __ex_table,"a"
75	PTR load_a4, bad_stack_a4	75	PTR_WD load_a4, bad_stack_a4
76	PTR load_a5, bad_stack_a5	76	PTR_WD load_a5, bad_stack_a5
77	PTR load_a6, bad_stack_a6	77	PTR_WD load_a6, bad_stack_a6
78	PTR load_a7, bad_stack_a7	78	PTR_WD load_a7, bad_stack_a7
79	.previous	79	.previous
80		80
81	lw t0, TI_FLAGS($28) # syscall tracing enabled?	81	lw t0, TI_FLAGS($28) # syscall tracing enabled?
@@ -216,7 +216,7 @@ einval: li v0, -ENOSYS · 134 unmodified lines
216	#endif /* CONFIG_MIPS_MT_FPAFF */	216	#endif /* CONFIG_MIPS_MT_FPAFF */
217		217
218	#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native)	218	#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, native)
219	#define __SYSCALL(nr, entry) PTR entry	219	#define __SYSCALL(nr, entry) PTR_WD entry
220	.align 2	220	.align 2
221	.type sys_call_table, @object	221	.type sys_call_table, @object
222	EXPORT(sys_call_table)	222	EXPORT(sys_call_table)

arch/mips/kernel/scall64-n32.S+1−1

@@ -101,7 +101,7 @@ not_n32_scall: · 100 unmodified lines
101		101
102	END(handle_sysn32)	102	END(handle_sysn32)
103		103
104	#define __SYSCALL(nr, entry) PTR entry	104	#define __SYSCALL(nr, entry) PTR_WD entry
105	.type sysn32_call_table, @object	105	.type sysn32_call_table, @object
106	EXPORT(sysn32_call_table)	106	EXPORT(sysn32_call_table)
107	#include <asm/syscall_table_n32.h>	107	#include <asm/syscall_table_n32.h>

arch/mips/kernel/scall64-n64.S+1−1

@@ -109,7 +109,7 @@ illegal_syscall: · 108 unmodified lines
109	j n64_syscall_exit	109	j n64_syscall_exit
110	END(handle_sys64)	110	END(handle_sys64)
111		111
112	#define __SYSCALL(nr, entry) PTR entry	112	#define __SYSCALL(nr, entry) PTR_WD entry
113	.align 3	113	.align 3
114	.type sys_call_table, @object	114	.type sys_call_table, @object
115	EXPORT(sys_call_table)	115	EXPORT(sys_call_table)

arch/mips/kernel/scall64-o32.S+5−5

@@ -73,10 +73,10 @@ load_a7: lw a7, 28(t0) # argument #8 from usp · 72 unmodified lines
73	loads_done:	73	loads_done:
74		74
75	.section __ex_table,"a"	75	.section __ex_table,"a"
76	PTR load_a4, bad_stack_a4	76	PTR_WD load_a4, bad_stack_a4
77	PTR load_a5, bad_stack_a5	77	PTR_WD load_a5, bad_stack_a5
78	PTR load_a6, bad_stack_a6	78	PTR_WD load_a6, bad_stack_a6
79	PTR load_a7, bad_stack_a7	79	PTR_WD load_a7, bad_stack_a7
80	.previous	80	.previous
81		81
82	li t1, _TIF_WORK_SYSCALL_ENTRY	82	li t1, _TIF_WORK_SYSCALL_ENTRY
@@ -214,7 +214,7 @@ einval: li v0, -ENOSYS · 131 unmodified lines
214	END(sys32_syscall)	214	END(sys32_syscall)
215		215
216	#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, compat)	216	#define __SYSCALL_WITH_COMPAT(nr, native, compat) __SYSCALL(nr, compat)
217	#define __SYSCALL(nr, entry) PTR entry	217	#define __SYSCALL(nr, entry) PTR_WD entry
218	.align 3	218	.align 3
219	.type sys32_call_table,@object	219	.type sys32_call_table,@object
220	EXPORT(sys32_call_table)	220	EXPORT(sys32_call_table)

arch/mips/kernel/syscall.c+4−4

@@ -122,8 +122,8 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) · 121 unmodified lines
122	" j 3b \n"	122	" j 3b \n"
123	" .previous \n"	123	" .previous \n"
124	" .section __ex_table,\"a\" \n"	124	" .section __ex_table,\"a\" \n"
125	" "STR(PTR)" 1b, 4b \n"	125	" "STR(PTR_WD)" 1b, 4b \n"
126	" "STR(PTR)" 2b, 4b \n"	126	" "STR(PTR_WD)" 2b, 4b \n"
127	" .previous \n"	127	" .previous \n"
128	" .set pop \n"	128	" .set pop \n"
129	: [old] "=&r" (old),	129	: [old] "=&r" (old),
@@ -152,8 +152,8 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) · 22 unmodified lines
152	" j 3b \n"	152	" j 3b \n"
153	" .previous \n"	153	" .previous \n"
154	" .section __ex_table,\"a\" \n"	154	" .section __ex_table,\"a\" \n"
155	" "STR(PTR)" 1b, 5b \n"	155	" "STR(PTR_WD)" 1b, 5b \n"
156	" "STR(PTR)" 2b, 5b \n"	156	" "STR(PTR_WD)" 2b, 5b \n"
157	" .previous \n"	157	" .previous \n"
158	" .set pop \n"	158	" .set pop \n"
159	: [old] "=&r" (old),	159	: [old] "=&r" (old),

arch/mips/lib/csum_partial.S+2−2

@@ -347,7 +347,7 @@ EXPORT_SYMBOL(csum_partial) · 346 unmodified lines
347	.if \mode == LEGACY_MODE; \	347	.if \mode == LEGACY_MODE; \
348	9: insn reg, addr; \	348	9: insn reg, addr; \
349	.section __ex_table,"a"; \	349	.section __ex_table,"a"; \
350	PTR 9b, .L_exc; \	350	PTR_WD 9b, .L_exc; \
351	.previous; \	351	.previous; \
352	/* This is enabled in EVA mode */ \	352	/* This is enabled in EVA mode */ \
353	.else; \	353	.else; \
@@ -356,7 +356,7 @@ EXPORT_SYMBOL(csum_partial) · 2 unmodified lines
356	((\to == USEROP) && (type == ST_INSN)); \	356	((\to == USEROP) && (type == ST_INSN)); \
357	9: __BUILD_EVA_INSN(insn##e, reg, addr); \	357	9: __BUILD_EVA_INSN(insn##e, reg, addr); \
358	.section __ex_table,"a"; \	358	.section __ex_table,"a"; \
359	PTR 9b, .L_exc; \	359	PTR_WD 9b, .L_exc; \
360	.previous; \	360	.previous; \
361	.else; \	361	.else; \
362	/* EVA without exception */ \	362	/* EVA without exception */ \

arch/mips/lib/memcpy.S+2−2

@@ -116,7 +116,7 @@ · 115 unmodified lines
116	.if \mode == LEGACY_MODE; \	116	.if \mode == LEGACY_MODE; \
117	9: insn reg, addr; \	117	9: insn reg, addr; \
118	.section __ex_table,"a"; \	118	.section __ex_table,"a"; \
119	PTR 9b, handler; \	119	PTR_WD 9b, handler; \
120	.previous; \	120	.previous; \
121	/* This is assembled in EVA mode */ \	121	/* This is assembled in EVA mode */ \
122	.else; \	122	.else; \
@@ -125,7 +125,7 @@ · 2 unmodified lines
125	((\to == USEROP) && (type == ST_INSN)); \	125	((\to == USEROP) && (type == ST_INSN)); \
126	9: __BUILD_EVA_INSN(insn##e, reg, addr); \	126	9: __BUILD_EVA_INSN(insn##e, reg, addr); \
127	.section __ex_table,"a"; \	127	.section __ex_table,"a"; \
128	PTR 9b, handler; \	128	PTR_WD 9b, handler; \
129	.previous; \	129	.previous; \
130	.else; \	130	.else; \
131	/* \	131	/* \

arch/mips/lib/memset.S+1−1

@@ -52,7 +52,7 @@ · 51 unmodified lines
52	9: ___BUILD_EVA_INSN(insn, reg, addr); \	52	9: ___BUILD_EVA_INSN(insn, reg, addr); \
53	.endif; \	53	.endif; \
54	.section __ex_table,"a"; \	54	.section __ex_table,"a"; \
55	PTR 9b, handler; \	55	PTR_WD 9b, handler; \
56	.previous	56	.previous
57		57
58	.macro f_fill64 dst, offset, val, fixup, mode	58	.macro f_fill64 dst, offset, val, fixup, mode

arch/mips/lib/strncpy_user.S+2−2

@@ -15,7 +15,7 @@ · 14 unmodified lines
15	#define EX(insn,reg,addr,handler) \	15	#define EX(insn,reg,addr,handler) \
16	9: insn reg, addr; \	16	9: insn reg, addr; \
17	.section __ex_table,"a"; \	17	.section __ex_table,"a"; \
18	PTR 9b, handler; \	18	PTR_WD 9b, handler; \
19	.previous	19	.previous
20		20
21	/*	21	/*
@@ -59,7 +59,7 @@ LEAF(__strncpy_from_user_asm) · 37 unmodified lines
59	jr ra	59	jr ra
60		60
61	.section __ex_table,"a"	61	.section __ex_table,"a"
62	PTR 1b, .Lfault	62	PTR_WD 1b, .Lfault
63	.previous	63	.previous
64		64
65	EXPORT_SYMBOL(__strncpy_from_user_asm)	65	EXPORT_SYMBOL(__strncpy_from_user_asm)

arch/mips/lib/strnlen_user.S+1−1

@@ -14,7 +14,7 @@ · 13 unmodified lines
14	#define EX(insn,reg,addr,handler) \	14	#define EX(insn,reg,addr,handler) \
15	9: insn reg, addr; \	15	9: insn reg, addr; \
16	.section __ex_table,"a"; \	16	.section __ex_table,"a"; \
17	PTR 9b, handler; \	17	PTR_WD 9b, handler; \
18	.previous	18	.previous
19		19
20	/*	20	/*

arch/mips/loongson64/vbios_quirk.c+4−5

 #include <linux/pci.h>
 #include <loongson.h>
-static void pci_fixup_radeon(struct pci_dev *pdev)
+static void pci_fixup_video(struct pci_dev *pdev)
 {
 	struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
 	res->flags = IORESOURCE_MEM | IORESOURCE_ROM_SHADOW |
 		     IORESOURCE_PCI_FIXED;
-	dev_info(&pdev->dev, "BAR %d: assigned %pR for Radeon ROM\n",
+	dev_info(&pdev->dev, "Video device with shadowed ROM at %pR\n", res);
-		 PCI_ROM_RESOURCE, res);
 }
-DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_ATI, 0x9615,
+DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_ATI, 0x9615,
-				PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_radeon);
+			       PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);

arch/powerpc/include/asm/book3s/32/mmu-hash.h+2−0

@@ -223,6 +223,8 @@ static __always_inline void update_user_segments(u32 val) · 222 unmodified lines
223	update_user_segment(15, val);	223	update_user_segment(15, val);
224	}	224	}
225		225
		226	int __init find_free_bat(void);
		227	unsigned int bat_block_size(unsigned long base, unsigned long top);
226	#endif /* !__ASSEMBLY__ */	228	#endif /* !__ASSEMBLY__ */
227		229
228	/* We happily ignore the smaller BATs on 601, we don't actually use	230	/* We happily ignore the smaller BATs on 601, we don't actually use

arch/powerpc/include/asm/book3s/32/pgtable.h+1−0

@@ -178,6 +178,7 @@ static inline bool pte_user(pte_t pte) · 177 unmodified lines
178	#ifndef __ASSEMBLY__	178	#ifndef __ASSEMBLY__
179		179
180	int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);	180	int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);
		181	void unmap_kernel_page(unsigned long va);
181		182
182	#endif /* !__ASSEMBLY__ */	183	#endif /* !__ASSEMBLY__ */
183		184

arch/powerpc/include/asm/book3s/64/pgtable.h+2−0

@@ -1082,6 +1082,8 @@ static inline int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t p · 1081 unmodified lines
1082	return hash__map_kernel_page(ea, pa, prot);	1082	return hash__map_kernel_page(ea, pa, prot);
1083	}	1083	}
1084		1084
		1085	void unmap_kernel_page(unsigned long va);
		1086
1085	static inline int __meminit vmemmap_create_mapping(unsigned long start,	1087	static inline int __meminit vmemmap_create_mapping(unsigned long start,
1086	unsigned long page_size,	1088	unsigned long page_size,
1087	unsigned long phys)	1089	unsigned long phys)

arch/powerpc/include/asm/fixmap.h+4−2

@@ -111,8 +111,10 @@ static inline void __set_fixmap(enum fixed_addresses idx, · 110 unmodified lines
111	BUILD_BUG_ON(idx >= __end_of_fixed_addresses);	111	BUILD_BUG_ON(idx >= __end_of_fixed_addresses);
112	else if (WARN_ON(idx >= __end_of_fixed_addresses))	112	else if (WARN_ON(idx >= __end_of_fixed_addresses))
113	return;	113	return;
114		114	if (pgprot_val(flags))
115	map_kernel_page(__fix_to_virt(idx), phys, flags);	115	map_kernel_page(__fix_to_virt(idx), phys, flags);
		116	else
		117	unmap_kernel_page(__fix_to_virt(idx));
116	}	118	}
117		119
118	#define __early_set_fixmap __set_fixmap	120	#define __early_set_fixmap __set_fixmap

arch/powerpc/include/asm/hw_irq.h+1−1

@@ -473,7 +473,7 @@ static inline bool arch_irq_disabled_regs(struct pt_regs *regs) · 472 unmodified lines
473	return !(regs->msr & MSR_EE);	473	return !(regs->msr & MSR_EE);
474	}	474	}
475		475
476	static inline bool should_hard_irq_enable(void)	476	static __always_inline bool should_hard_irq_enable(void)
477	{	477	{
478	return false;	478	return false;
479	}	479	}

arch/powerpc/include/asm/kvm_book3s_64.h+0−1

@@ -39,7 +39,6 @@ struct kvm_nested_guest { · 38 unmodified lines
39	pgd_t shadow_pgtable; / our page table for this guest */	39	pgd_t shadow_pgtable; / our page table for this guest */
40	u64 l1_gr_to_hr; /* L1's addr of part'n-scoped table */	40	u64 l1_gr_to_hr; /* L1's addr of part'n-scoped table */
41	u64 process_table; /* process table entry for this guest */	41	u64 process_table; /* process table entry for this guest */
42	u64 hfscr; /* HFSCR that the L1 requested for this nested guest */
43	long refcnt; /* number of pointers to this struct */	42	long refcnt; /* number of pointers to this struct */
44	struct mutex tlb_lock; /* serialize page faults and tlbies */	43	struct mutex tlb_lock; /* serialize page faults and tlbies */
45	struct kvm_nested_guest *next;	44	struct kvm_nested_guest *next;

arch/powerpc/include/asm/kvm_host.h+1−0

@@ -818,6 +818,7 @@ struct kvm_vcpu_arch { · 817 unmodified lines
818		818
819	/* For support of nested guests */	819	/* For support of nested guests */
820	struct kvm_nested_guest *nested;	820	struct kvm_nested_guest *nested;
		821	u64 nested_hfscr; /* HFSCR that the L1 requested for the nested guest */
821	u32 nested_vcpu_id;	822	u32 nested_vcpu_id;
822	gpa_t nested_io_gpr;	823	gpa_t nested_io_gpr;
823	#endif	824	#endif

arch/powerpc/include/asm/nohash/32/pgtable.h+1−0

@@ -64,6 +64,7 @@ extern int icache_44x_need_flush; · 63 unmodified lines
64	#ifndef __ASSEMBLY__	64	#ifndef __ASSEMBLY__
65		65
66	int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);	66	int map_kernel_page(unsigned long va, phys_addr_t pa, pgprot_t prot);
		67	void unmap_kernel_page(unsigned long va);
67		68
68	#endif /* !__ASSEMBLY__ */	69	#endif /* !__ASSEMBLY__ */
69		70

arch/powerpc/include/asm/nohash/64/pgtable.h+1−0

@@ -308,6 +308,7 @@ static inline void __ptep_set_access_flags(struct vm_area_struct *vma, · 307 unmodified lines
308	#define __swp_entry_to_pte(x) __pte((x).val)	308	#define __swp_entry_to_pte(x) __pte((x).val)
309		309
310	int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);	310	int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);
		311	void unmap_kernel_page(unsigned long va);
311	extern int __meminit vmemmap_create_mapping(unsigned long start,	312	extern int __meminit vmemmap_create_mapping(unsigned long start,
312	unsigned long page_size,	313	unsigned long page_size,
313	unsigned long phys);	314	unsigned long phys);

arch/powerpc/include/asm/ppc-opcode.h+1−0

@@ -500,6 +500,7 @@ · 499 unmodified lines
500	#define PPC_RAW_LDX(r, base, b) (0x7c00002a \| ___PPC_RT(r) \| ___PPC_RA(base) \| ___PPC_RB(b))	500	#define PPC_RAW_LDX(r, base, b) (0x7c00002a \| ___PPC_RT(r) \| ___PPC_RA(base) \| ___PPC_RB(b))
501	#define PPC_RAW_LHZ(r, base, i) (0xa0000000 \| ___PPC_RT(r) \| ___PPC_RA(base) \| IMM_L(i))	501	#define PPC_RAW_LHZ(r, base, i) (0xa0000000 \| ___PPC_RT(r) \| ___PPC_RA(base) \| IMM_L(i))
502	#define PPC_RAW_LHBRX(r, base, b) (0x7c00062c \| ___PPC_RT(r) \| ___PPC_RA(base) \| ___PPC_RB(b))	502	#define PPC_RAW_LHBRX(r, base, b) (0x7c00062c \| ___PPC_RT(r) \| ___PPC_RA(base) \| ___PPC_RB(b))
		503	#define PPC_RAW_LWBRX(r, base, b) (0x7c00042c \| ___PPC_RT(r) \| ___PPC_RA(base) \| ___PPC_RB(b))
503	#define PPC_RAW_LDBRX(r, base, b) (0x7c000428 \| ___PPC_RT(r) \| ___PPC_RA(base) \| ___PPC_RB(b))	504	#define PPC_RAW_LDBRX(r, base, b) (0x7c000428 \| ___PPC_RT(r) \| ___PPC_RA(base) \| ___PPC_RB(b))
504	#define PPC_RAW_STWCX(s, a, b) (0x7c00012d \| ___PPC_RS(s) \| ___PPC_RA(a) \| ___PPC_RB(b))	505	#define PPC_RAW_STWCX(s, a, b) (0x7c00012d \| ___PPC_RS(s) \| ___PPC_RA(a) \| ___PPC_RB(b))
505	#define PPC_RAW_CMPWI(a, i) (0x2c000000 \| ___PPC_RA(a) \| IMM_L(i))	506	#define PPC_RAW_CMPWI(a, i) (0x2c000000 \| ___PPC_RA(a) \| IMM_L(i))

arch/powerpc/include/asm/syscall.h+2−2

@@ -90,7 +90,7 @@ static inline void syscall_get_arguments(struct task_struct *task, · 89 unmodified lines
90	unsigned long val, mask = -1UL;	90	unsigned long val, mask = -1UL;
91	unsigned int n = 6;	91	unsigned int n = 6;
92		92
93	if (is_32bit_task())	93	if (is_tsk_32bit_task(task))
94	mask = 0xffffffff;	94	mask = 0xffffffff;
95		95
96	while (n--) {	96	while (n--) {
@@ -105,7 +105,7 @@ static inline void syscall_get_arguments(struct task_struct *task, · 8 unmodified lines
105		105
106	static inline int syscall_get_arch(struct task_struct *task)	106	static inline int syscall_get_arch(struct task_struct *task)
107	{	107	{
108	if (is_32bit_task())	108	if (is_tsk_32bit_task(task))
109	return AUDIT_ARCH_PPC;	109	return AUDIT_ARCH_PPC;
110	else if (IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))	110	else if (IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))
111	return AUDIT_ARCH_PPC64LE;	111	return AUDIT_ARCH_PPC64LE;

arch/powerpc/include/asm/thread_info.h+2−0

 #ifdef CONFIG_COMPAT
 #define is_32bit_task()	(test_thread_flag(TIF_32BIT))
+#define is_tsk_32bit_task(tsk)	(test_tsk_thread_flag(tsk, TIF_32BIT))
 #else
 #define is_32bit_task()	(IS_ENABLED(CONFIG_PPC32))
+#define is_tsk_32bit_task(tsk)	(IS_ENABLED(CONFIG_PPC32))
 #endif
 #if defined(CONFIG_PPC64)

arch/powerpc/kernel/interrupt_64.S+2−0

 	.ifc \srr,srr
 	mfspr	r11,SPRN_SRR0
 	ld	r12,_NIP(r1)
+	clrrdi  r11,r11,2
 	clrrdi  r12,r12,2
 100:	tdne	r11,r12
 	EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)
 	.else
 	mfspr	r11,SPRN_HSRR0
 	ld	r12,_NIP(r1)
+	clrrdi  r11,r11,2
 	clrrdi  r12,r12,2
 100:	tdne	r11,r12
 	EMIT_WARN_ENTRY 100b,__FILE__,__LINE__,(BUGFLAG_WARNING | BUGFLAG_ONCE)

arch/powerpc/kernel/time.c+3−2

 		__this_cpu_inc(irq_stat.timer_irqs_event);
 	} else {
 		now = *next_tb - now;
-		if (now <= decrementer_max)
+		if (now > decrementer_max)
-			set_dec_or_work(now);
+			now = decrementer_max;
+		set_dec_or_work(now);
 		__this_cpu_inc(irq_stat.timer_irqs_others);
 	}

arch/powerpc/kvm/book3s_hv.c+1−2

 static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu)
 {
-	struct kvm_nested_guest *nested = vcpu->arch.nested;
 	int r;
 	int srcu_idx;
 		 * it into a HEAI.
 		 */
 		if (!(vcpu->arch.hfscr_permitted & (1UL << cause)) ||
-					(nested->hfscr & (1UL << cause))) {
+				(vcpu->arch.nested_hfscr & (1UL << cause))) {
 			vcpu->arch.trap = BOOK3S_INTERRUPT_H_EMUL_ASSIST;
 			/*

arch/powerpc/kvm/book3s_hv_nested.c+1−1

@@ -363,7 +363,7 @@ long kvmhv_enter_nested_guest(struct kvm_vcpu *vcpu) · 362 unmodified lines
363	/* set L1 state to L2 state */	363	/* set L1 state to L2 state */
364	vcpu->arch.nested = l2;	364	vcpu->arch.nested = l2;
365	vcpu->arch.nested_vcpu_id = l2_hv.vcpu_token;	365	vcpu->arch.nested_vcpu_id = l2_hv.vcpu_token;
366	l2->hfscr = l2_hv.hfscr;	366	vcpu->arch.nested_hfscr = l2_hv.hfscr;
367	vcpu->arch.regs = l2_regs;	367	vcpu->arch.regs = l2_regs;
368		368
369	/* Guest must always run with ME enabled, HV disabled. */	369	/* Guest must always run with ME enabled, HV disabled. */

arch/powerpc/mm/book3s32/mmu.c+5−5

@@ -76,7 +76,7 @@ unsigned long p_block_mapped(phys_addr_t pa) · 75 unmodified lines
76	return 0;	76	return 0;
77	}	77	}
78		78
79	static int __init find_free_bat(void)	79	int __init find_free_bat(void)
80	{	80	{
81	int b;	81	int b;
82	int n = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4;	82	int n = mmu_has_feature(MMU_FTR_USE_HIGH_BATS) ? 8 : 4;
@@ -100,7 +100,7 @@ static int __init find_free_bat(void) · 17 unmodified lines
100	* - block size has to be a power of two. This is calculated by finding the	100	* - block size has to be a power of two. This is calculated by finding the
101	* highest bit set to 1.	101	* highest bit set to 1.
102	*/	102	*/
103	static unsigned int block_size(unsigned long base, unsigned long top)	103	unsigned int bat_block_size(unsigned long base, unsigned long top)
104	{	104	{
105	unsigned int max_size = SZ_256M;	105	unsigned int max_size = SZ_256M;
106	unsigned int base_shift = (ffs(base) - 1) & 31;	106	unsigned int base_shift = (ffs(base) - 1) & 31;
@@ -145,7 +145,7 @@ static unsigned long __init __mmu_mapin_ram(unsigned long base, unsigned long to · 38 unmodified lines
145	int idx;	145	int idx;
146		146
147	while ((idx = find_free_bat()) != -1 && base != top) {	147	while ((idx = find_free_bat()) != -1 && base != top) {
148	unsigned int size = block_size(base, top);	148	unsigned int size = bat_block_size(base, top);
149		149
150	if (size < 128 << 10)	150	if (size < 128 << 10)
151	break;	151	break;
@@ -201,12 +201,12 @@ void mmu_mark_initmem_nx(void) · 49 unmodified lines
201	unsigned long size;	201	unsigned long size;
202		202
203	for (i = 0; i < nb - 1 && base < top;) {	203	for (i = 0; i < nb - 1 && base < top;) {
204	size = block_size(base, top);	204	size = bat_block_size(base, top);
205	setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT);	205	setibat(i++, PAGE_OFFSET + base, base, size, PAGE_KERNEL_TEXT);
206	base += size;	206	base += size;
207	}	207	}
208	if (base < top) {	208	if (base < top) {
209	size = block_size(base, top);	209	size = bat_block_size(base, top);
210	if ((top - base) > size) {	210	if ((top - base) > size) {
211	size <<= 1;	211	size <<= 1;
212	if (strict_kernel_rwx_enabled() && base + size > border)	212	if (strict_kernel_rwx_enabled() && base + size > border)

arch/powerpc/mm/kasan/book3s_32.c+31−28

@@ -10,48 +10,51 @@ int __init kasan_init_region(void *start, size_t size) · 9 unmodified lines
10	{	10	{
11	unsigned long k_start = (unsigned long)kasan_mem_to_shadow(start);	11	unsigned long k_start = (unsigned long)kasan_mem_to_shadow(start);
12	unsigned long k_end = (unsigned long)kasan_mem_to_shadow(start + size);	12	unsigned long k_end = (unsigned long)kasan_mem_to_shadow(start + size);
13	unsigned long k_cur = k_start;	13	unsigned long k_nobat = k_start;
14	int k_size = k_end - k_start;	14	unsigned long k_cur;
15	int k_size_base = 1 << (ffs(k_size) - 1);	15	phys_addr_t phys;
16	int ret;	16	int ret;
17	void *block;
18		17
19	block = memblock_alloc(k_size, k_size_base);	18	while (k_nobat < k_end) {
20		19	unsigned int k_size = bat_block_size(k_nobat, k_end);
21	if (block && k_size_base >= SZ_128K && k_start == ALIGN(k_start, k_size_base)) {	20	int idx = find_free_bat();
22	int shift = ffs(k_size - k_size_base);	21
23	int k_size_more = shift ? 1 << (shift - 1) : 0;	22	if (idx == -1)
24		23	break;
25	setbat(-1, k_start, __pa(block), k_size_base, PAGE_KERNEL);	24	if (k_size < SZ_128K)
26	if (k_size_more >= SZ_128K)	25	break;
27	setbat(-1, k_start + k_size_base, __pa(block) + k_size_base,	26	phys = memblock_phys_alloc_range(k_size, k_size, 0,
28	k_size_more, PAGE_KERNEL);	27	MEMBLOCK_ALLOC_ANYWHERE);
29	if (v_block_mapped(k_start))	28	if (!phys)
30	k_cur = k_start + k_size_base;	29	break;
31	if (v_block_mapped(k_start + k_size_base))	30
32	k_cur = k_start + k_size_base + k_size_more;	31	setbat(idx, k_nobat, phys, k_size, PAGE_KERNEL);
33		32	k_nobat += k_size;
34	update_bats();
35	}	33	}
		34	if (k_nobat != k_start)
		35	update_bats();
36		36
37	if (!block)	37	if (k_nobat < k_end) {
38	block = memblock_alloc(k_size, PAGE_SIZE);	38	phys = memblock_phys_alloc_range(k_end - k_nobat, PAGE_SIZE, 0,
39	if (!block)	39	MEMBLOCK_ALLOC_ANYWHERE);
40	return -ENOMEM;	40	if (!phys)
		41	return -ENOMEM;
		42	}
41		43
42	ret = kasan_init_shadow_page_tables(k_start, k_end);	44	ret = kasan_init_shadow_page_tables(k_start, k_end);
43	if (ret)	45	if (ret)
44	return ret;	46	return ret;
45		47
46	kasan_update_early_region(k_start, k_cur, __pte(0));	48	kasan_update_early_region(k_start, k_nobat, __pte(0));
47		49
48	for (; k_cur < k_end; k_cur += PAGE_SIZE) {	50	for (k_cur = k_nobat; k_cur < k_end; k_cur += PAGE_SIZE) {
49	pmd_t *pmd = pmd_off_k(k_cur);	51	pmd_t *pmd = pmd_off_k(k_cur);
50	void *va = block + k_cur - k_start;	52	pte_t pte = pfn_pte(PHYS_PFN(phys + k_cur - k_nobat), PAGE_KERNEL);
51	pte_t pte = pfn_pte(PHYS_PFN(__pa(va)), PAGE_KERNEL);
52		53
53	__set_pte_at(&init_mm, k_cur, pte_offset_kernel(pmd, k_cur), pte, 0);	54	__set_pte_at(&init_mm, k_cur, pte_offset_kernel(pmd, k_cur), pte, 0);
54	}	55	}
55	flush_tlb_kernel_range(k_start, k_end);	56	flush_tlb_kernel_range(k_start, k_end);
		57	memset(kasan_mem_to_shadow(start), 0, k_end - k_start);
		58
56	return 0;	59	return 0;
57	}	60	}

arch/powerpc/mm/pgtable.c+9−0

@@ -206,6 +206,15 @@ void set_pte_at(struct mm_struct mm, unsigned long addr, pte_t ptep, · 205 unmodified lines
206	__set_pte_at(mm, addr, ptep, pte, 0);	206	__set_pte_at(mm, addr, ptep, pte, 0);
207	}	207	}
208		208
		209	void unmap_kernel_page(unsigned long va)
		210	{
		211	pmd_t *pmdp = pmd_off_k(va);
		212	pte_t *ptep = pte_offset_kernel(pmdp, va);
		213
		214	pte_clear(&init_mm, va, ptep);
		215	flush_tlb_kernel_range(va, va + PAGE_SIZE);
		216	}
		217
209	/*	218	/*
210	* This is called when relaxing access to a PTE. It's also called in the page	219	* This is called when relaxing access to a PTE. It's also called in the page
211	* fault path when we don't hit any of the major fault cases, ie, a minor	220	* fault path when we don't hit any of the major fault cases, ie, a minor

arch/powerpc/net/bpf_jit_comp.c+23−6

 	memset32(area, BREAKPOINT_INSTRUCTION, size / 4);
 }
-/* Fix the branch target addresses for subprog calls */
+/* Fix updated addresses (for subprog calls, ldimm64, et al) during extra pass */
-static int bpf_jit_fixup_subprog_calls(struct bpf_prog *fp, u32 *image,
+static int bpf_jit_fixup_addresses(struct bpf_prog *fp, u32 *image,
-				       struct codegen_context *ctx, u32 *addrs)
+				   struct codegen_context *ctx, u32 *addrs)
 {
 	const struct bpf_insn *insn = fp->insnsi;
 	bool func_addr_fixed;
 	u64 func_addr;
 	u32 tmp_idx;
-	int i, ret;
+	int i, j, ret;
 	for (i = 0; i < fp->len; i++) {
 		/*
 			 * of the JITed sequence remains unchanged.
 			 */
 			ctx->idx = tmp_idx;
+		} else if (insn[i].code == (BPF_LD | BPF_IMM | BPF_DW)) {
+			tmp_idx = ctx->idx;
+			ctx->idx = addrs[i] / 4;
+#ifdef CONFIG_PPC32
+			PPC_LI32(ctx->b2p[insn[i].dst_reg] - 1, (u32)insn[i + 1].imm);
+			PPC_LI32(ctx->b2p[insn[i].dst_reg], (u32)insn[i].imm);
+			for (j = ctx->idx - addrs[i] / 4; j < 4; j++)
+				EMIT(PPC_RAW_NOP());
+#else
+			func_addr = ((u64)(u32)insn[i].imm) | (((u64)(u32)insn[i + 1].imm) << 32);
+			PPC_LI64(b2p[insn[i].dst_reg], func_addr);
+			/* overwrite rest with nops */
+			for (j = ctx->idx - addrs[i] / 4; j < 5; j++)
+				EMIT(PPC_RAW_NOP());
+#endif
+			ctx->idx = tmp_idx;
+			i++;
 		}
 	}
 		/*
 		 * Do not touch the prologue and epilogue as they will remain
 		 * unchanged. Only fix the branch target address for subprog
-		 * calls in the body.
+		 * calls in the body, and ldimm64 instructions.
 		 *
 		 * This does not change the offsets and lengths of the subprog
 		 * call instruction sequences and hence, the size of the JITed
 		 * image as well.
 		 */
-		bpf_jit_fixup_subprog_calls(fp, code_base, &cgctx, addrs);
+		bpf_jit_fixup_addresses(fp, code_base, &cgctx, addrs);
 		/* There is no need to perform the usual passes. */
 		goto skip_codegen_passes;

arch/powerpc/net/bpf_jit_comp32.c+9−0

 	if (image && rel < 0x2000000 && rel >= -0x2000000) {
 		PPC_BL_ABS(func);
+		EMIT(PPC_RAW_NOP());
+		EMIT(PPC_RAW_NOP());
+		EMIT(PPC_RAW_NOP());
 	} else {
 		/* Load function address into r0 */
 		EMIT(PPC_RAW_LIS(_R0, IMM_H(func)));
 		bool func_addr_fixed;
 		u64 func_addr;
 		u32 true_cond;
+		u32 tmp_idx;
+		int j;
 		/*
 		 * addrs[] maps a BPF bytecode address into a real offset from
 		 * 16 byte instruction that uses two 'struct bpf_insn'
 		 */
 		case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
+			tmp_idx = ctx->idx;
 			PPC_LI32(dst_reg_h, (u32)insn[i + 1].imm);
 			PPC_LI32(dst_reg, (u32)insn[i].imm);
+			/* padding to allow full 4 instructions for later patching */
+			for (j = ctx->idx - tmp_idx; j < 4; j++)
+				EMIT(PPC_RAW_NOP());
 			/* Adjust for two bpf instructions */
 			addrs[++i] = ctx->idx * 4;
 			break;

arch/powerpc/net/bpf_jit_comp64.c+19−10

 		u64 imm64;
 		u32 true_cond;
 		u32 tmp_idx;
+		int j;
 		/*
 		 * addrs[] maps a BPF bytecode address into a real offset from
 				EMIT(PPC_RAW_MR(dst_reg, b2p[TMP_REG_1]));
 				break;
 			case 64:
-				/*
+				/* Store the value to stack and then use byte-reverse loads */
-				 * Way easier and faster(?) to store the value
-				 * into stack and then use ldbrx
-				 *
-				 * ctx->seen will be reliable in pass2, but
-				 * the instructions generated will remain the
-				 * same across all passes
-				 */
 				PPC_BPF_STL(dst_reg, 1, bpf_jit_stack_local(ctx));
 				EMIT(PPC_RAW_ADDI(b2p[TMP_REG_1], 1, bpf_jit_stack_local(ctx)));
-				EMIT(PPC_RAW_LDBRX(dst_reg, 0, b2p[TMP_REG_1]));
+				if (cpu_has_feature(CPU_FTR_ARCH_206)) {
+					EMIT(PPC_RAW_LDBRX(dst_reg, 0, b2p[TMP_REG_1]));
+				} else {
+					EMIT(PPC_RAW_LWBRX(dst_reg, 0, b2p[TMP_REG_1]));
+					if (IS_ENABLED(CONFIG_CPU_LITTLE_ENDIAN))
+						EMIT(PPC_RAW_SLDI(dst_reg, dst_reg, 32));
+					EMIT(PPC_RAW_LI(b2p[TMP_REG_2], 4));
+					EMIT(PPC_RAW_LWBRX(b2p[TMP_REG_2], b2p[TMP_REG_2], b2p[TMP_REG_1]));
+					if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
+						EMIT(PPC_RAW_SLDI(b2p[TMP_REG_2], b2p[TMP_REG_2], 32));
+					EMIT(PPC_RAW_OR(dst_reg, dst_reg, b2p[TMP_REG_2]));
+				}
 				break;
 			}
 			break;
 		case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
 			imm64 = ((u64)(u32) insn[i].imm) |
 				    (((u64)(u32) insn[i+1].imm) << 32);
+			tmp_idx = ctx->idx;
+			PPC_LI64(dst_reg, imm64);
+			/* padding to allow full 5 instructions for later patching */
+			for (j = ctx->idx - tmp_idx; j < 5; j++)
+				EMIT(PPC_RAW_NOP());
 			/* Adjust for two bpf instructions */
 			addrs[++i] = ctx->idx * 4;
-			PPC_LI64(dst_reg, imm64);
 			break;
 		/*

arch/powerpc/perf/core-book3s.c+42−33

 	mtspr(SPRN_PMC6, pmcs[5]);
 }
+/*
+ * If the perf subsystem wants performance monitor interrupts as soon as
+ * possible (e.g., to sample the instruction address and stack chain),
+ * this should return true. The IRQ masking code can then enable MSR[EE]
+ * in some places (e.g., interrupt handlers) that allows PMI interrupts
+ * through to improve accuracy of profiles, at the cost of some performance.
+ *
+ * The PMU counters can be enabled by other means (e.g., sysfs raw SPR
+ * access), but in that case there is no need for prompt PMI handling.
+ *
+ * This currently returns true if any perf counter is being used. It
+ * could possibly return false if only events are being counted rather than
+ * samples being taken, but for now this is good enough.
+ */
+bool power_pmu_wants_prompt_pmi(void)
+{
+	struct cpu_hw_events *cpuhw;
+	/*
+	 * This could simply test local_paca->pmcregs_in_use if that were not
+	 * under ifdef KVM.
+	 */
+	if (!ppmu)
+		return false;
+	cpuhw = this_cpu_ptr(&cpu_hw_events);
+	return cpuhw->n_events;
+}
 #endif /* CONFIG_PPC64 */
 static void perf_event_interrupt(struct pt_regs *regs);
 		 * Otherwise provide a warning if there is PMI pending, but
 		 * no counter is found overflown.
 		 */
-		if (any_pmc_overflown(cpuhw))
+		if (any_pmc_overflown(cpuhw)) {
-			clear_pmi_irq_pending();
+			/*
-		else
+			 * Since power_pmu_disable runs under local_irq_save, it
+			 * could happen that code hits a PMC overflow without PMI
+			 * pending in paca. Hence only clear PMI pending if it was
+			 * set.
+			 *
+			 * If a PMI is pending, then MSR[EE] must be disabled (because
+			 * the masked PMI handler disabling EE). So it is safe to
+			 * call clear_pmi_irq_pending().
+			 */
+			if (pmi_irq_pending())
+				clear_pmi_irq_pending();
+		} else
 			WARN_ON(pmi_irq_pending());
 		val = mmcra = cpuhw->mmcr.mmcra;
 	perf_sample_event_took(sched_clock() - start_clock);
 }
-/*
- * If the perf subsystem wants performance monitor interrupts as soon as
- * possible (e.g., to sample the instruction address and stack chain),
- * this should return true. The IRQ masking code can then enable MSR[EE]
- * in some places (e.g., interrupt handlers) that allows PMI interrupts
- * though to improve accuracy of profiles, at the cost of some performance.
- *
- * The PMU counters can be enabled by other means (e.g., sysfs raw SPR
- * access), but in that case there is no need for prompt PMI handling.
- *
- * This currently returns true if any perf counter is being used. It
- * could possibly return false if only events are being counted rather than
- * samples being taken, but for now this is good enough.
- */
-bool power_pmu_wants_prompt_pmi(void)
-{
-	struct cpu_hw_events *cpuhw;
-	/*
-	 * This could simply test local_paca->pmcregs_in_use if that were not
-	 * under ifdef KVM.
-	 */
-	if (!ppmu)
-		return false;
-	cpuhw = this_cpu_ptr(&cpu_hw_events);
-	return cpuhw->n_events;
-}
 static int power_pmu_prepare_cpu(unsigned int cpu)
 {
 	struct cpu_hw_events *cpuhw = &per_cpu(cpu_hw_events, cpu);

arch/s390/Kconfig+15−0

@@ -945,6 +945,9 @@ config S390_GUEST · 944 unmodified lines
945		945
946	endmenu	946	endmenu
947		947
		948	config S390_MODULES_SANITY_TEST_HELPERS
		949	def_bool n
		950
948	menu "Selftests"	951	menu "Selftests"
949		952
950	config S390_UNWIND_SELFTEST	953	config S390_UNWIND_SELFTEST
@@ -971,4 +974,16 @@ config S390_KPROBES_SANITY_TEST · 20 unmodified lines
971		974
972	Say N if you are unsure.	975	Say N if you are unsure.
973		976
		977	config S390_MODULES_SANITY_TEST
		978	def_tristate n
		979	depends on KUNIT
		980	default KUNIT_ALL_TESTS
		981	prompt "Enable s390 specific modules tests"
		982	select S390_MODULES_SANITY_TEST_HELPERS
		983	help
		984	This option enables an s390 specific modules test. This option is
		985	not useful for distributions or general kernels, but only for
		986	kernel developers working on architecture code.
		987
		988	Say N if you are unsure.
974	endmenu	989	endmenu

arch/s390/configs/debug_defconfig+10−10

 CONFIG_KVM=m
 CONFIG_S390_UNWIND_SELFTEST=m
 CONFIG_S390_KPROBES_SANITY_TEST=m
+CONFIG_S390_MODULES_SANITY_TEST=m
 CONFIG_KPROBES=y
 CONFIG_JUMP_LABEL=y
 CONFIG_STATIC_KEYS_SELFTEST=y
 CONFIG_MEMORY_HOTREMOVE=y
 CONFIG_KSM=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
-CONFIG_FRONTSWAP=y
 CONFIG_CMA_DEBUG=y
 CONFIG_CMA_DEBUGFS=y
 CONFIG_CMA_SYSFS=y
 CONFIG_IDLE_PAGE_TRACKING=y
 CONFIG_PERCPU_STATS=y
 CONFIG_GUP_TEST=y
+CONFIG_ANON_VMA_NAME=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_PACKET_DIAG=m
 CONFIG_UNIX_DIAG=m
 CONFIG_XFRM_USER=m
 CONFIG_NET_KEY=m
-CONFIG_NET_SWITCHDEV=y
 CONFIG_SMC=m
 CONFIG_SMC_DIAG=m
 CONFIG_INET=y
 CONFIG_NF_TABLES=m
 CONFIG_NF_TABLES_INET=y
 CONFIG_NFT_CT=m
-CONFIG_NFT_COUNTER=m
 CONFIG_NFT_LOG=m
 CONFIG_NFT_LIMIT=m
 CONFIG_NFT_NAT=m
 CONFIG_VSOCKETS=m
 CONFIG_VIRTIO_VSOCKETS=m
 CONFIG_NETLINK_DIAG=m
+CONFIG_NET_SWITCHDEV=y
 CONFIG_CGROUP_NET_PRIO=y
 CONFIG_NET_PKTGEN=m
 CONFIG_PCI=y
 CONFIG_HOTPLUG_PCI=y
 CONFIG_HOTPLUG_PCI_S390=y
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_SAFE=y
 CONFIG_CONNECTOR=y
 CONFIG_ZRAM=y
 CONFIG_BLK_DEV_LOOP=m
 # CONFIG_NET_VENDOR_DEC is not set
 # CONFIG_NET_VENDOR_DLINK is not set
 # CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_ENGLEDER is not set
 # CONFIG_NET_VENDOR_EZCHIP is not set
 # CONFIG_NET_VENDOR_GOOGLE is not set
 # CONFIG_NET_VENDOR_HUAWEI is not set
 CONFIG_MLX4_EN=m
 CONFIG_MLX5_CORE=m
 CONFIG_MLX5_CORE_EN=y
-CONFIG_MLX5_ESWITCH=y
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_MICROCHIP is not set
 # CONFIG_NET_VENDOR_MICROSEMI is not set
 # CONFIG_NET_VENDOR_SYNOPSYS is not set
 # CONFIG_NET_VENDOR_TEHUTI is not set
 # CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_VERTEXCOM is not set
 # CONFIG_NET_VENDOR_VIA is not set
 # CONFIG_NET_VENDOR_WIZNET is not set
 # CONFIG_NET_VENDOR_XILINX is not set
 CONFIG_VIRTIO_INPUT=y
 CONFIG_VHOST_NET=m
 CONFIG_VHOST_VSOCK=m
+# CONFIG_SURFACE_PLATFORMS is not set
 CONFIG_S390_CCW_IOMMU=y
 CONFIG_S390_AP_IOMMU=y
 CONFIG_EXT4_FS=y
 CONFIG_CRYPTO_USER_API_RNG=m
 CONFIG_CRYPTO_USER_API_AEAD=m
 CONFIG_CRYPTO_STATS=y
-CONFIG_CRYPTO_LIB_BLAKE2S=m
-CONFIG_CRYPTO_LIB_CURVE25519=m
-CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
 CONFIG_ZCRYPT=m
 CONFIG_PKEY=m
 CONFIG_CRYPTO_PAES_S390=m
 CONFIG_CRYPTO_CRC32_S390=y
 CONFIG_CRYPTO_DEV_VIRTIO=m
 CONFIG_CORDIC=m
+CONFIG_CRYPTO_LIB_CURVE25519=m
+CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
 CONFIG_CRC32_SELFTEST=y
 CONFIG_CRC4=m
 CONFIG_CRC7=m
 CONFIG_SLUB_STATS=y
 CONFIG_DEBUG_STACK_USAGE=y
 CONFIG_DEBUG_VM=y
-CONFIG_DEBUG_VM_VMACACHE=y
 CONFIG_DEBUG_VM_PGFLAGS=y
 CONFIG_DEBUG_MEMORY_INIT=y
 CONFIG_MEMORY_NOTIFIER_ERROR_INJECT=m
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_WQ_WATCHDOG=y
 CONFIG_TEST_LOCKUP=m
-CONFIG_DEBUG_TIMEKEEPING=y
 CONFIG_PROVE_LOCKING=y
 CONFIG_LOCK_STAT=y
-CONFIG_DEBUG_LOCKDEP=y
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 CONFIG_DEBUG_LOCKING_API_SELFTESTS=y
+CONFIG_DEBUG_IRQFLAGS=y
 CONFIG_DEBUG_SG=y
 CONFIG_DEBUG_NOTIFIERS=y
 CONFIG_BUG_ON_DATA_CORRUPTION=y

arch/s390/configs/defconfig+9−7

 CONFIG_KVM=m
 CONFIG_S390_UNWIND_SELFTEST=m
 CONFIG_S390_KPROBES_SANITY_TEST=m
+CONFIG_S390_MODULES_SANITY_TEST=m
 CONFIG_KPROBES=y
 CONFIG_JUMP_LABEL=y
 # CONFIG_GCC_PLUGINS is not set
 CONFIG_MEMORY_HOTREMOVE=y
 CONFIG_KSM=y
 CONFIG_TRANSPARENT_HUGEPAGE=y
-CONFIG_FRONTSWAP=y
 CONFIG_CMA_SYSFS=y
 CONFIG_CMA_AREAS=7
 CONFIG_MEM_SOFT_DIRTY=y
 CONFIG_DEFERRED_STRUCT_PAGE_INIT=y
 CONFIG_IDLE_PAGE_TRACKING=y
 CONFIG_PERCPU_STATS=y
+CONFIG_ANON_VMA_NAME=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_PACKET_DIAG=m
 CONFIG_UNIX_DIAG=m
 CONFIG_XFRM_USER=m
 CONFIG_NET_KEY=m
-CONFIG_NET_SWITCHDEV=y
 CONFIG_SMC=m
 CONFIG_SMC_DIAG=m
 CONFIG_INET=y
 CONFIG_NF_TABLES=m
 CONFIG_NF_TABLES_INET=y
 CONFIG_NFT_CT=m
-CONFIG_NFT_COUNTER=m
 CONFIG_NFT_LOG=m
 CONFIG_NFT_LIMIT=m
 CONFIG_NFT_NAT=m
 CONFIG_VSOCKETS=m
 CONFIG_VIRTIO_VSOCKETS=m
 CONFIG_NETLINK_DIAG=m
+CONFIG_NET_SWITCHDEV=y
 CONFIG_CGROUP_NET_PRIO=y
 CONFIG_NET_PKTGEN=m
 CONFIG_PCI=y
 CONFIG_HOTPLUG_PCI_S390=y
 CONFIG_UEVENT_HELPER=y
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_SAFE=y
 CONFIG_CONNECTOR=y
 CONFIG_ZRAM=y
 CONFIG_BLK_DEV_LOOP=m
 # CONFIG_NET_VENDOR_DEC is not set
 # CONFIG_NET_VENDOR_DLINK is not set
 # CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_ENGLEDER is not set
 # CONFIG_NET_VENDOR_EZCHIP is not set
 # CONFIG_NET_VENDOR_GOOGLE is not set
 # CONFIG_NET_VENDOR_HUAWEI is not set
 CONFIG_MLX4_EN=m
 CONFIG_MLX5_CORE=m
 CONFIG_MLX5_CORE_EN=y
-CONFIG_MLX5_ESWITCH=y
 # CONFIG_NET_VENDOR_MICREL is not set
 # CONFIG_NET_VENDOR_MICROCHIP is not set
 # CONFIG_NET_VENDOR_MICROSEMI is not set
 # CONFIG_NET_VENDOR_SYNOPSYS is not set
 # CONFIG_NET_VENDOR_TEHUTI is not set
 # CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_VERTEXCOM is not set
 # CONFIG_NET_VENDOR_VIA is not set
 # CONFIG_NET_VENDOR_WIZNET is not set
 # CONFIG_NET_VENDOR_XILINX is not set
 CONFIG_VIRTIO_INPUT=y
 CONFIG_VHOST_NET=m
 CONFIG_VHOST_VSOCK=m
+# CONFIG_SURFACE_PLATFORMS is not set
 CONFIG_S390_CCW_IOMMU=y
 CONFIG_S390_AP_IOMMU=y
 CONFIG_EXT4_FS=y
 CONFIG_CRYPTO_USER_API_RNG=m
 CONFIG_CRYPTO_USER_API_AEAD=m
 CONFIG_CRYPTO_STATS=y
-CONFIG_CRYPTO_LIB_BLAKE2S=m
-CONFIG_CRYPTO_LIB_CURVE25519=m
-CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
 CONFIG_ZCRYPT=m
 CONFIG_PKEY=m
 CONFIG_CRYPTO_PAES_S390=m
 CONFIG_CRYPTO_DEV_VIRTIO=m
 CONFIG_CORDIC=m
 CONFIG_PRIME_NUMBERS=m
+CONFIG_CRYPTO_LIB_CURVE25519=m
+CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m
 CONFIG_CRC4=m
 CONFIG_CRC7=m
 CONFIG_CRC8=m

arch/s390/configs/zfcpdump_defconfig+3−0

 # CONFIG_SWAP is not set
 CONFIG_NO_HZ_IDLE=y
 CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BPF_SYSCALL=y
 # CONFIG_CPU_ISOLATION is not set
 # CONFIG_UTS_NS is not set
 # CONFIG_TIME_NS is not set
 # CONFIG_PCPU_DEV_REFCNT is not set
 # CONFIG_ETHTOOL_NETLINK is not set
 CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_SAFE=y
 CONFIG_BLK_DEV_RAM=y
 # CONFIG_DCSSBLK is not set
 # CONFIG_DASD is not set
 # CONFIG_HID is not set
 # CONFIG_VIRTIO_MENU is not set
 # CONFIG_VHOST_MENU is not set
+# CONFIG_SURFACE_PLATFORMS is not set
 # CONFIG_IOMMU_SUPPORT is not set
 # CONFIG_DNOTIFY is not set
 # CONFIG_INOTIFY_USER is not set

arch/s390/hypfs/hypfs_vm.c+4−2

 static char local_guest[] = "        ";
 static char all_guests[] = "*       ";
+static char *all_groups = all_guests;
 static char *guest_query;
 struct diag2fc_data {
 	memcpy(parm_list.userid, query, NAME_LEN);
 	ASCEBC(parm_list.userid, NAME_LEN);
-	parm_list.addr = (unsigned long) addr ;
+	memcpy(parm_list.aci_grp, all_groups, NAME_LEN);
+	ASCEBC(parm_list.aci_grp, NAME_LEN);
+	parm_list.addr = (unsigned long)addr;
 	parm_list.size = size;
 	parm_list.fmt = 0x02;
-	memset(parm_list.aci_grp, 0x40, NAME_LEN);
 	rc = -1;
 	diag_stat_inc(DIAG_STAT_X2FC);

arch/s390/include/asm/uaccess.h+2−2

 int __put_user_bad(void) __attribute__((noreturn));
 int __get_user_bad(void) __attribute__((noreturn));
-#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
 union oac {
 	unsigned int val;
 	struct {
 	};
 };
+#ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
 #define __put_get_user_asm(to, from, size, oac_spec)			\
 ({									\
 	int __rc;							\

arch/s390/kernel/module.c+18−19

@@ -33,7 +33,7 @@ · 32 unmodified lines
33	#define DEBUGP(fmt , ...)	33	#define DEBUGP(fmt , ...)
34	#endif	34	#endif
35		35
36	#define PLT_ENTRY_SIZE 20	36	#define PLT_ENTRY_SIZE 22
37		37
38	void *module_alloc(unsigned long size)	38	void *module_alloc(unsigned long size)
39	{	39	{
@@ -341,27 +341,26 @@ static int apply_rela(Elf_Rela rela, Elf_Addr base, Elf_Sym symtab, · 301 unmodified lines
341	case R_390_PLTOFF32: /* 32 bit offset from GOT to PLT. */	341	case R_390_PLTOFF32: /* 32 bit offset from GOT to PLT. */
342	case R_390_PLTOFF64: /* 16 bit offset from GOT to PLT. */	342	case R_390_PLTOFF64: /* 16 bit offset from GOT to PLT. */
343	if (info->plt_initialized == 0) {	343	if (info->plt_initialized == 0) {
344	unsigned int insn[5];	344	unsigned char insn[PLT_ENTRY_SIZE];
345	unsigned int *ip = me->core_layout.base +	345	char *plt_base;
346	me->arch.plt_offset +	346	char *ip;
347	info->plt_offset;	347
348		348	plt_base = me->core_layout.base + me->arch.plt_offset;
349	insn[0] = 0x0d10e310; /* basr 1,0 */	349	ip = plt_base + info->plt_offset;
350	insn[1] = 0x100a0004; /* lg 1,10(1) */	350	(int )insn = 0x0d10e310; /* basr 1,0 */
		351	(int )&insn[4] = 0x100c0004; /* lg 1,12(1) */
351	if (IS_ENABLED(CONFIG_EXPOLINE) && !nospec_disable) {	352	if (IS_ENABLED(CONFIG_EXPOLINE) && !nospec_disable) {
352	unsigned int *ij;	353	char *jump_r1;
353	ij = me->core_layout.base +	354
354	me->arch.plt_offset +	355	jump_r1 = plt_base + me->arch.plt_size -
355	me->arch.plt_size - PLT_ENTRY_SIZE;	356	PLT_ENTRY_SIZE;
356	insn[2] = 0xa7f40000 + /* j __jump_r1 */	357	/* brcl 0xf,__jump_r1 */
357	(unsigned int)(u16)	358	(short )&insn[8] = 0xc0f4;
358	(((unsigned long) ij - 8 -	359	(int )&insn[10] = (jump_r1 - (ip + 8)) / 2;
359	(unsigned long) ip) / 2);
360	} else {	360	} else {
361	insn[2] = 0x07f10000; /* br %r1 */	361	(int )&insn[8] = 0x07f10000; /* br %r1 */
362	}	362	}
363	insn[3] = (unsigned int) (val >> 32);	363	(long )&insn[14] = val;
364	insn[4] = (unsigned int) val;
365		364
366	write(ip, insn, sizeof(insn));	365	write(ip, insn, sizeof(insn));
367	info->plt_initialized = 1;	366	info->plt_initialized = 1;

arch/s390/kernel/nmi.c+22−5

 		/* Validate vector registers */
 		union ctlreg0 cr0;
-		if (!mci.vr) {
+		/*
+		 * The vector validity must only be checked if not running a
+		 * KVM guest. For KVM guests the machine check is forwarded by
+		 * KVM and it is the responsibility of the guest to take
+		 * appropriate actions. The host vector or FPU values have been
+		 * saved by KVM and will be restored by KVM.
+		 */
+		if (!mci.vr && !test_cpu_flag(CIF_MCCK_GUEST)) {
 			/*
 			 * Vector registers can't be restored. If the kernel
 			 * currently uses vector registers the system is
 	if (cr2.gse) {
 		if (!mci.gs) {
 			/*
-			 * Guarded storage register can't be restored and
+			 * 2 cases:
-			 * the current processes uses guarded storage.
+			 * - machine check in kernel or userspace
-			 * It has to be terminated.
+			 * - machine check while running SIE (KVM guest)
+			 * For kernel or userspace the userspace values of
+			 * guarded storage control can not be recreated, the
+			 * process must be terminated.
+			 * For SIE the guest values of guarded storage can not
+			 * be recreated. This is either due to a bug or due to
+			 * GS being disabled in the guest. The guest will be
+			 * notified by KVM code and the guests machine check
+			 * handling must take care of this.  The host values
+			 * are saved by KVM and are not affected.
 			 */
-			kill_task = 1;
+			if (!test_cpu_flag(CIF_MCCK_GUEST))
+				kill_task = 1;
 		} else {
 			load_gs_cb((struct gs_cb *)mcesa->guarded_storage_save_area);
 		}

arch/s390/lib/Makefile+3−0

@@ -17,4 +17,7 @@ KASAN_SANITIZE_uaccess.o := n · 16 unmodified lines
17	obj-$(CONFIG_S390_UNWIND_SELFTEST) += test_unwind.o	17	obj-$(CONFIG_S390_UNWIND_SELFTEST) += test_unwind.o
18	CFLAGS_test_unwind.o += -fno-optimize-sibling-calls	18	CFLAGS_test_unwind.o += -fno-optimize-sibling-calls
19		19
		20	obj-$(CONFIG_S390_MODULES_SANITY_TEST) += test_modules.o
		21	obj-$(CONFIG_S390_MODULES_SANITY_TEST_HELPERS) += test_modules_helpers.o
		22
20	lib-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o	23	lib-$(CONFIG_FUNCTION_ERROR_INJECTION) += error-inject.o

arch/s390/lib/test_modules.c+35−0

@@ -0,0 +1,35 @@
	1	// SPDX-License-Identifier: GPL-2.0+
	2
	3	#include <kunit/test.h>
	4	#include <linux/module.h>
	5
	6	#include "test_modules.h"
	7
	8	#define DECLARE_RETURN(i) int test_modules_return_ ## i(void)
	9	REPEAT_10000(DECLARE_RETURN);
	10
	11	/*
	12	* Test that modules with many relocations are loaded properly.
	13	*/
	14	static void test_modules_many_vmlinux_relocs(struct kunit *test)
	15	{
	16	int result = 0;
	17
	18	#define CALL_RETURN(i) result += test_modules_return_ ## i()
	19	REPEAT_10000(CALL_RETURN);
	20	KUNIT_ASSERT_EQ(test, result, 49995000);
	21	}
	22
	23	static struct kunit_case modules_testcases[] = {
	24	KUNIT_CASE(test_modules_many_vmlinux_relocs),
	25	{}
	26	};
	27
	28	static struct kunit_suite modules_test_suite = {
	29	.name = "modules_test_s390",
	30	.test_cases = modules_testcases,
	31	};
	32
	33	kunit_test_suites(&modules_test_suite);
	34
	35	MODULE_LICENSE("GPL");

arch/s390/lib/test_modules.h+50−0

@@ -0,0 +1,50 @@
	1	/* SPDX-License-Identifier: GPL-2.0+ */
	2	#ifndef TEST_MODULES_H
	3	#define TEST_MODULES_H
	4
	5	#define __REPEAT_10000_3(f, x) \
	6	f(x ## 0); \
	7	f(x ## 1); \
	8	f(x ## 2); \
	9	f(x ## 3); \
	10	f(x ## 4); \
	11	f(x ## 5); \
	12	f(x ## 6); \
	13	f(x ## 7); \
	14	f(x ## 8); \
	15	f(x ## 9)
	16	#define __REPEAT_10000_2(f, x) \
	17	__REPEAT_10000_3(f, x ## 0); \
	18	__REPEAT_10000_3(f, x ## 1); \
	19	__REPEAT_10000_3(f, x ## 2); \
	20	__REPEAT_10000_3(f, x ## 3); \
	21	__REPEAT_10000_3(f, x ## 4); \
	22	__REPEAT_10000_3(f, x ## 5); \
	23	__REPEAT_10000_3(f, x ## 6); \
	24	__REPEAT_10000_3(f, x ## 7); \
	25	__REPEAT_10000_3(f, x ## 8); \
	26	__REPEAT_10000_3(f, x ## 9)
	27	#define __REPEAT_10000_1(f, x) \
	28	__REPEAT_10000_2(f, x ## 0); \
	29	__REPEAT_10000_2(f, x ## 1); \
	30	__REPEAT_10000_2(f, x ## 2); \
	31	__REPEAT_10000_2(f, x ## 3); \
	32	__REPEAT_10000_2(f, x ## 4); \
	33	__REPEAT_10000_2(f, x ## 5); \
	34	__REPEAT_10000_2(f, x ## 6); \
	35	__REPEAT_10000_2(f, x ## 7); \
	36	__REPEAT_10000_2(f, x ## 8); \
	37	__REPEAT_10000_2(f, x ## 9)
	38	#define REPEAT_10000(f) \
	39	__REPEAT_10000_1(f, 0); \
	40	__REPEAT_10000_1(f, 1); \
	41	__REPEAT_10000_1(f, 2); \
	42	__REPEAT_10000_1(f, 3); \
	43	__REPEAT_10000_1(f, 4); \
	44	__REPEAT_10000_1(f, 5); \
	45	__REPEAT_10000_1(f, 6); \
	46	__REPEAT_10000_1(f, 7); \
	47	__REPEAT_10000_1(f, 8); \
	48	__REPEAT_10000_1(f, 9)
	49
	50	#endif

arch/s390/lib/test_modules_helpers.c+13−0

@@ -0,0 +1,13 @@
	1	// SPDX-License-Identifier: GPL-2.0+
	2
	3	#include <linux/export.h>
	4
	5	#include "test_modules.h"
	6
	7	#define DEFINE_RETURN(i) \
	8	int test_modules_return_ ## i(void) \
	9	{ \
	10	return 1 ## i - 10000; \
	11	} \
	12	EXPORT_SYMBOL_GPL(test_modules_return_ ## i)
	13	REPEAT_10000(DEFINE_RETURN);

arch/x86/Kconfig+1−0

@@ -186,6 +186,7 @@ config X86 · 185 unmodified lines
186	select HAVE_CONTEXT_TRACKING_OFFSTACK if HAVE_CONTEXT_TRACKING	186	select HAVE_CONTEXT_TRACKING_OFFSTACK if HAVE_CONTEXT_TRACKING
187	select HAVE_C_RECORDMCOUNT	187	select HAVE_C_RECORDMCOUNT
188	select HAVE_OBJTOOL_MCOUNT if STACK_VALIDATION	188	select HAVE_OBJTOOL_MCOUNT if STACK_VALIDATION
		189	select HAVE_BUILDTIME_MCOUNT_SORT
189	select HAVE_DEBUG_KMEMLEAK	190	select HAVE_DEBUG_KMEMLEAK
190	select HAVE_DMA_CONTIGUOUS	191	select HAVE_DMA_CONTIGUOUS
191	select HAVE_DYNAMIC_FTRACE	192	select HAVE_DYNAMIC_FTRACE

arch/x86/events/intel/core.c+15−0

@@ -6236,6 +6236,19 @@ __init int intel_pmu_init(void) · 6235 unmodified lines
6236	pmu->num_counters = x86_pmu.num_counters;	6236	pmu->num_counters = x86_pmu.num_counters;
6237	pmu->num_counters_fixed = x86_pmu.num_counters_fixed;	6237	pmu->num_counters_fixed = x86_pmu.num_counters_fixed;
6238	}	6238	}
		6239
		6240	/*
		6241	* Quirk: For some Alder Lake machine, when all E-cores are disabled in
		6242	* a BIOS, the leaf 0xA will enumerate all counters of P-cores. However,
		6243	* the X86_FEATURE_HYBRID_CPU is still set. The above codes will
		6244	* mistakenly add extra counters for P-cores. Correct the number of
		6245	* counters here.
		6246	*/
		6247	if ((pmu->num_counters > 8) \|\| (pmu->num_counters_fixed > 4)) {
		6248	pmu->num_counters = x86_pmu.num_counters;
		6249	pmu->num_counters_fixed = x86_pmu.num_counters_fixed;
		6250	}
		6251
6239	pmu->max_pebs_events = min_t(unsigned, MAX_PEBS_EVENTS, pmu->num_counters);	6252	pmu->max_pebs_events = min_t(unsigned, MAX_PEBS_EVENTS, pmu->num_counters);
6240	pmu->unconstrained = (struct event_constraint)	6253	pmu->unconstrained = (struct event_constraint)
6241	__EVENT_CONSTRAINT(0, (1ULL << pmu->num_counters) - 1,	6254	__EVENT_CONSTRAINT(0, (1ULL << pmu->num_counters) - 1,
@@ -6340,6 +6353,8 @@ __init int intel_pmu_init(void) · 98 unmodified lines
6340	}	6353	}
6341		6354
6342	if (x86_pmu.lbr_nr) {	6355	if (x86_pmu.lbr_nr) {
		6356	intel_pmu_lbr_init();
		6357
6343	pr_cont("%d-deep LBR, ", x86_pmu.lbr_nr);	6358	pr_cont("%d-deep LBR, ", x86_pmu.lbr_nr);
6344		6359
6345	/* only support branch_stack snapshot for perfmon >= v2 */	6360	/* only support branch_stack snapshot for perfmon >= v2 */

arch/x86/events/intel/lbr.c+101−67

@@ -8,14 +8,6 @@ · 7 unmodified lines
8		8
9	#include "../perf_event.h"	9	#include "../perf_event.h"
10		10
11	static const enum {
12	LBR_EIP_FLAGS = 1,
13	LBR_TSX = 2,
14	} lbr_desc[LBR_FORMAT_MAX_KNOWN + 1] = {
15	[LBR_FORMAT_EIP_FLAGS] = LBR_EIP_FLAGS,
16	[LBR_FORMAT_EIP_FLAGS2] = LBR_EIP_FLAGS \| LBR_TSX,
17	};
18
19	/*	11	/*
20	* Intel LBR_SELECT bits	12	* Intel LBR_SELECT bits
21	* Intel Vol3a, April 2011, Section 16.7 Table 16-10	13	* Intel Vol3a, April 2011, Section 16.7 Table 16-10
@@ -243,7 +235,7 @@ void intel_pmu_lbr_reset_64(void) · 221 unmodified lines
243	for (i = 0; i < x86_pmu.lbr_nr; i++) {	235	for (i = 0; i < x86_pmu.lbr_nr; i++) {
244	wrmsrl(x86_pmu.lbr_from + i, 0);	236	wrmsrl(x86_pmu.lbr_from + i, 0);
245	wrmsrl(x86_pmu.lbr_to + i, 0);	237	wrmsrl(x86_pmu.lbr_to + i, 0);
246	if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)	238	if (x86_pmu.lbr_has_info)
247	wrmsrl(x86_pmu.lbr_info + i, 0);	239	wrmsrl(x86_pmu.lbr_info + i, 0);
248	}	240	}
249	}	241	}
@@ -305,11 +297,10 @@ enum { · 55 unmodified lines
305	*/	297	*/
306	static inline bool lbr_from_signext_quirk_needed(void)	298	static inline bool lbr_from_signext_quirk_needed(void)
307	{	299	{
308	int lbr_format = x86_pmu.intel_cap.lbr_format;
309	bool tsx_support = boot_cpu_has(X86_FEATURE_HLE) \|\|	300	bool tsx_support = boot_cpu_has(X86_FEATURE_HLE) \|\|
310	boot_cpu_has(X86_FEATURE_RTM);	301	boot_cpu_has(X86_FEATURE_RTM);
311		302
312	return !tsx_support && (lbr_desc[lbr_format] & LBR_TSX);	303	return !tsx_support && x86_pmu.lbr_has_tsx;
313	}	304	}
314		305
315	static DEFINE_STATIC_KEY_FALSE(lbr_from_quirk_key);	306	static DEFINE_STATIC_KEY_FALSE(lbr_from_quirk_key);
@@ -427,12 +418,12 @@ rdlbr_all(struct lbr_entry *lbr, unsigned int idx, bool need_info) · 111 unmodified lines
427		418
428	void intel_pmu_lbr_restore(void *ctx)	419	void intel_pmu_lbr_restore(void *ctx)
429	{	420	{
430	bool need_info = x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO;
431	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);	421	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
432	struct x86_perf_task_context *task_ctx = ctx;	422	struct x86_perf_task_context *task_ctx = ctx;
433	int i;	423	bool need_info = x86_pmu.lbr_has_info;
434	unsigned lbr_idx, mask;
435	u64 tos = task_ctx->tos;	424	u64 tos = task_ctx->tos;
		425	unsigned lbr_idx, mask;
		426	int i;
436		427
437	mask = x86_pmu.lbr_nr - 1;	428	mask = x86_pmu.lbr_nr - 1;
438	for (i = 0; i < task_ctx->valid_lbrs; i++) {	429	for (i = 0; i < task_ctx->valid_lbrs; i++) {
@@ -444,7 +435,7 @@ void intel_pmu_lbr_restore(void *ctx) · 5 unmodified lines
444	lbr_idx = (tos - i) & mask;	435	lbr_idx = (tos - i) & mask;
445	wrlbr_from(lbr_idx, 0);	436	wrlbr_from(lbr_idx, 0);
446	wrlbr_to(lbr_idx, 0);	437	wrlbr_to(lbr_idx, 0);
447	if (x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO)	438	if (need_info)
448	wrlbr_info(lbr_idx, 0);	439	wrlbr_info(lbr_idx, 0);
449	}	440	}
450		441
@@ -519,9 +510,9 @@ static void __intel_pmu_lbr_restore(void *ctx) · 68 unmodified lines
519		510
520	void intel_pmu_lbr_save(void *ctx)	511	void intel_pmu_lbr_save(void *ctx)
521	{	512	{
522	bool need_info = x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO;
523	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);	513	struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
524	struct x86_perf_task_context *task_ctx = ctx;	514	struct x86_perf_task_context *task_ctx = ctx;
		515	bool need_info = x86_pmu.lbr_has_info;
525	unsigned lbr_idx, mask;	516	unsigned lbr_idx, mask;
526	u64 tos;	517	u64 tos;
527	int i;	518	int i;
@@ -816,7 +807,6 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) · 288 unmodified lines
816	{	807	{
817	bool need_info = false, call_stack = false;	808	bool need_info = false, call_stack = false;
818	unsigned long mask = x86_pmu.lbr_nr - 1;	809	unsigned long mask = x86_pmu.lbr_nr - 1;
819	int lbr_format = x86_pmu.intel_cap.lbr_format;
820	u64 tos = intel_pmu_lbr_tos();	810	u64 tos = intel_pmu_lbr_tos();
821	int i;	811	int i;
822	int out = 0;	812	int out = 0;
@@ -831,9 +821,7 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) · 8 unmodified lines
831	for (i = 0; i < num; i++) {	821	for (i = 0; i < num; i++) {
832	unsigned long lbr_idx = (tos - i) & mask;	822	unsigned long lbr_idx = (tos - i) & mask;
833	u64 from, to, mis = 0, pred = 0, in_tx = 0, abort = 0;	823	u64 from, to, mis = 0, pred = 0, in_tx = 0, abort = 0;
834	int skip = 0;
835	u16 cycles = 0;	824	u16 cycles = 0;
836	int lbr_flags = lbr_desc[lbr_format];
837		825
838	from = rdlbr_from(lbr_idx, NULL);	826	from = rdlbr_from(lbr_idx, NULL);
839	to = rdlbr_to(lbr_idx, NULL);	827	to = rdlbr_to(lbr_idx, NULL);
@@ -845,37 +833,39 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) · 5 unmodified lines
845	if (call_stack && !from)	833	if (call_stack && !from)
846	break;	834	break;
847		835
848	if (lbr_format == LBR_FORMAT_INFO && need_info) {	836	if (x86_pmu.lbr_has_info) {
849	u64 info;	837	if (need_info) {
850		838	u64 info;
851	info = rdlbr_info(lbr_idx, NULL);	839
852	mis = !!(info & LBR_INFO_MISPRED);	840	info = rdlbr_info(lbr_idx, NULL);
853	pred = !mis;	841	mis = !!(info & LBR_INFO_MISPRED);
854	in_tx = !!(info & LBR_INFO_IN_TX);	842	pred = !mis;
855	abort = !!(info & LBR_INFO_ABORT);	843	cycles = (info & LBR_INFO_CYCLES);
856	cycles = (info & LBR_INFO_CYCLES);	844	if (x86_pmu.lbr_has_tsx) {
857	}	845	in_tx = !!(info & LBR_INFO_IN_TX);
858		846	abort = !!(info & LBR_INFO_ABORT);
859	if (lbr_format == LBR_FORMAT_TIME) {	847	}
860	mis = !!(from & LBR_FROM_FLAG_MISPRED);	848	}
861	pred = !mis;	849	} else {
862	skip = 1;	850	int skip = 0;
863	cycles = ((to >> 48) & LBR_INFO_CYCLES);	851
864		852	if (x86_pmu.lbr_from_flags) {
865	to = (u64)((((s64)to) << 16) >> 16);	853	mis = !!(from & LBR_FROM_FLAG_MISPRED);
866	}	854	pred = !mis;
867		855	skip = 1;
868	if (lbr_flags & LBR_EIP_FLAGS) {	856	}
869	mis = !!(from & LBR_FROM_FLAG_MISPRED);	857	if (x86_pmu.lbr_has_tsx) {
870	pred = !mis;	858	in_tx = !!(from & LBR_FROM_FLAG_IN_TX);
871	skip = 1;	859	abort = !!(from & LBR_FROM_FLAG_ABORT);
872	}	860	skip = 3;
873	if (lbr_flags & LBR_TSX) {	861	}
874	in_tx = !!(from & LBR_FROM_FLAG_IN_TX);	862	from = (u64)((((s64)from) << skip) >> skip);
875	abort = !!(from & LBR_FROM_FLAG_ABORT);	863
876	skip = 3;	864	if (x86_pmu.lbr_to_cycles) {
		865	cycles = ((to >> 48) & LBR_INFO_CYCLES);
		866	to = (u64)((((s64)to) << 16) >> 16);
		867	}
877	}	868	}
878	from = (u64)((((s64)from) << skip) >> skip);
879		869
880	/*	870	/*
881	* Some CPUs report duplicated abort records,	871	* Some CPUs report duplicated abort records,
@@ -903,37 +893,40 @@ void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc) · 21 unmodified lines
903	cpuc->lbr_stack.hw_idx = tos;	893	cpuc->lbr_stack.hw_idx = tos;
904	}	894	}
905		895
		896	static DEFINE_STATIC_KEY_FALSE(x86_lbr_mispred);
		897	static DEFINE_STATIC_KEY_FALSE(x86_lbr_cycles);
		898	static DEFINE_STATIC_KEY_FALSE(x86_lbr_type);
		899
906	static __always_inline int get_lbr_br_type(u64 info)	900	static __always_inline int get_lbr_br_type(u64 info)
907	{	901	{
908	if (!static_cpu_has(X86_FEATURE_ARCH_LBR) \|\| !x86_pmu.lbr_br_type)	902	int type = 0;
909	return 0;
910		903
911	return (info & LBR_INFO_BR_TYPE) >> LBR_INFO_BR_TYPE_OFFSET;	904	if (static_branch_likely(&x86_lbr_type))
		905	type = (info & LBR_INFO_BR_TYPE) >> LBR_INFO_BR_TYPE_OFFSET;
		906
		907	return type;
912	}	908	}
913		909
914	static __always_inline bool get_lbr_mispred(u64 info)	910	static __always_inline bool get_lbr_mispred(u64 info)
915	{	911	{
916	if (static_cpu_has(X86_FEATURE_ARCH_LBR) && !x86_pmu.lbr_mispred)	912	bool mispred = 0;
917	return 0;
918		913
919	return !!(info & LBR_INFO_MISPRED);	914	if (static_branch_likely(&x86_lbr_mispred))
920	}	915	mispred = !!(info & LBR_INFO_MISPRED);
921		916
922	static __always_inline bool get_lbr_predicted(u64 info)	917	return mispred;
923	{
924	if (static_cpu_has(X86_FEATURE_ARCH_LBR) && !x86_pmu.lbr_mispred)
925	return 0;
926
927	return !(info & LBR_INFO_MISPRED);
928	}	918	}
929		919
930	static __always_inline u16 get_lbr_cycles(u64 info)	920	static __always_inline u16 get_lbr_cycles(u64 info)
931	{	921	{
		922	u16 cycles = info & LBR_INFO_CYCLES;
		923
932	if (static_cpu_has(X86_FEATURE_ARCH_LBR) &&	924	if (static_cpu_has(X86_FEATURE_ARCH_LBR) &&
933	!(x86_pmu.lbr_timed_lbr && info & LBR_INFO_CYC_CNT_VALID))	925	(!static_branch_likely(&x86_lbr_cycles) \|\|
934	return 0;	926	!(info & LBR_INFO_CYC_CNT_VALID)))
		927	cycles = 0;
935		928
936	return info & LBR_INFO_CYCLES;	929	return cycles;
937	}	930	}
938		931
939	static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc,	932	static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc,
@@ -961,7 +954,7 @@ static void intel_pmu_store_lbr(struct cpu_hw_events *cpuc, · 21 unmodified lines
961	e->from = from;	954	e->from = from;
962	e->to = to;	955	e->to = to;
963	e->mispred = get_lbr_mispred(info);	956	e->mispred = get_lbr_mispred(info);
964	e->predicted = get_lbr_predicted(info);	957	e->predicted = !e->mispred;
965	e->in_tx = !!(info & LBR_INFO_IN_TX);	958	e->in_tx = !!(info & LBR_INFO_IN_TX);
966	e->abort = !!(info & LBR_INFO_ABORT);	959	e->abort = !!(info & LBR_INFO_ABORT);
967	e->cycles = get_lbr_cycles(info);	960	e->cycles = get_lbr_cycles(info);
@@ -1120,7 +1113,7 @@ static int intel_pmu_setup_hw_lbr_filter(struct perf_event *event) · 152 unmodified lines
1120		1113
1121	if ((br_type & PERF_SAMPLE_BRANCH_NO_CYCLES) &&	1114	if ((br_type & PERF_SAMPLE_BRANCH_NO_CYCLES) &&
1122	(br_type & PERF_SAMPLE_BRANCH_NO_FLAGS) &&	1115	(br_type & PERF_SAMPLE_BRANCH_NO_FLAGS) &&
1123	(x86_pmu.intel_cap.lbr_format == LBR_FORMAT_INFO))	1116	x86_pmu.lbr_has_info)
1124	reg->config \|= LBR_NO_INFO;	1117	reg->config \|= LBR_NO_INFO;
1125		1118
1126	return 0;	1119	return 0;
@@ -1706,6 +1699,38 @@ void intel_pmu_lbr_init_knl(void) · 579 unmodified lines
1706	x86_pmu.intel_cap.lbr_format = LBR_FORMAT_EIP_FLAGS;	1699	x86_pmu.intel_cap.lbr_format = LBR_FORMAT_EIP_FLAGS;
1707	}	1700	}
1708		1701
		1702	void intel_pmu_lbr_init(void)
		1703	{
		1704	switch (x86_pmu.intel_cap.lbr_format) {
		1705	case LBR_FORMAT_EIP_FLAGS2:
		1706	x86_pmu.lbr_has_tsx = 1;
		1707	fallthrough;
		1708	case LBR_FORMAT_EIP_FLAGS:
		1709	x86_pmu.lbr_from_flags = 1;
		1710	break;
		1711
		1712	case LBR_FORMAT_INFO:
		1713	x86_pmu.lbr_has_tsx = 1;
		1714	fallthrough;
		1715	case LBR_FORMAT_INFO2:
		1716	x86_pmu.lbr_has_info = 1;
		1717	break;
		1718
		1719	case LBR_FORMAT_TIME:
		1720	x86_pmu.lbr_from_flags = 1;
		1721	x86_pmu.lbr_to_cycles = 1;
		1722	break;
		1723	}
		1724
		1725	if (x86_pmu.lbr_has_info) {
		1726	/*
		1727	* Only used in combination with baseline pebs.
		1728	*/
		1729	static_branch_enable(&x86_lbr_mispred);
		1730	static_branch_enable(&x86_lbr_cycles);
		1731	}
		1732	}
		1733
1709	/*	1734	/*
1710	* LBR state size is variable based on the max number of registers.	1735	* LBR state size is variable based on the max number of registers.
1711	* This calculates the expected state size, which should match	1736	* This calculates the expected state size, which should match
@@ -1726,6 +1751,9 @@ static bool is_arch_lbr_xsave_available(void) · 14 unmodified lines
1726	* Check the LBR state with the corresponding software structure.	1751	* Check the LBR state with the corresponding software structure.
1727	* Disable LBR XSAVES support if the size doesn't match.	1752	* Disable LBR XSAVES support if the size doesn't match.
1728	*/	1753	*/
		1754	if (xfeature_size(XFEATURE_LBR) == 0)
		1755	return false;
		1756
1729	if (WARN_ON(xfeature_size(XFEATURE_LBR) != get_lbr_state_size()))	1757	if (WARN_ON(xfeature_size(XFEATURE_LBR) != get_lbr_state_size()))
1730	return false;	1758	return false;
1731		1759
@@ -1765,6 +1793,12 @@ void __init intel_pmu_arch_lbr_init(void) · 33 unmodified lines
1765	x86_pmu.lbr_br_type = ecx.split.lbr_br_type;	1793	x86_pmu.lbr_br_type = ecx.split.lbr_br_type;
1766	x86_pmu.lbr_nr = lbr_nr;	1794	x86_pmu.lbr_nr = lbr_nr;
1767		1795
		1796	if (x86_pmu.lbr_mispred)
		1797	static_branch_enable(&x86_lbr_mispred);
		1798	if (x86_pmu.lbr_timed_lbr)
		1799	static_branch_enable(&x86_lbr_cycles);
		1800	if (x86_pmu.lbr_br_type)
		1801	static_branch_enable(&x86_lbr_type);
1768		1802
1769	arch_lbr_xsave = is_arch_lbr_xsave_available();	1803	arch_lbr_xsave = is_arch_lbr_xsave_available();
1770	if (arch_lbr_xsave) {	1804	if (arch_lbr_xsave) {

arch/x86/events/intel/uncore.c+1−1

@@ -1762,7 +1762,7 @@ static const struct intel_uncore_init_fun rkl_uncore_init __initconst = { · 1761 unmodified lines
1762		1762
1763	static const struct intel_uncore_init_fun adl_uncore_init __initconst = {	1763	static const struct intel_uncore_init_fun adl_uncore_init __initconst = {
1764	.cpu_init = adl_uncore_cpu_init,	1764	.cpu_init = adl_uncore_cpu_init,
1765	.mmio_init = tgl_uncore_mmio_init,	1765	.mmio_init = adl_uncore_mmio_init,
1766	};	1766	};
1767		1767
1768	static const struct intel_uncore_init_fun icx_uncore_init __initconst = {	1768	static const struct intel_uncore_init_fun icx_uncore_init __initconst = {

arch/x86/events/intel/uncore.h+2−1

 void nhm_uncore_cpu_init(void);
 void skl_uncore_cpu_init(void);
 void icl_uncore_cpu_init(void);
-void adl_uncore_cpu_init(void);
 void tgl_uncore_cpu_init(void);
+void adl_uncore_cpu_init(void);
 void tgl_uncore_mmio_init(void);
 void tgl_l_uncore_mmio_init(void);
+void adl_uncore_mmio_init(void);
 int snb_pci2phy_map_init(int devid);
 /* uncore_snbep.c */

arch/x86/events/intel/uncore_discovery.c+2−2

@@ -494,8 +494,8 @@ void intel_generic_uncore_mmio_enable_box(struct intel_uncore_box *box) · 493 unmodified lines
494	writel(0, box->io_addr);	494	writel(0, box->io_addr);
495	}	495	}
496		496
497	static void intel_generic_uncore_mmio_enable_event(struct intel_uncore_box *box,	497	void intel_generic_uncore_mmio_enable_event(struct intel_uncore_box *box,
498	struct perf_event *event)	498	struct perf_event *event)
499	{	499	{
500	struct hw_perf_event *hwc = &event->hw;	500	struct hw_perf_event *hwc = &event->hw;
501		501

arch/x86/events/intel/uncore_discovery.h+2−0

@@ -139,6 +139,8 @@ void intel_generic_uncore_mmio_disable_box(struct intel_uncore_box *box); · 138 unmodified lines
139	void intel_generic_uncore_mmio_enable_box(struct intel_uncore_box *box);	139	void intel_generic_uncore_mmio_enable_box(struct intel_uncore_box *box);
140	void intel_generic_uncore_mmio_disable_event(struct intel_uncore_box *box,	140	void intel_generic_uncore_mmio_disable_event(struct intel_uncore_box *box,
141	struct perf_event *event);	141	struct perf_event *event);
		142	void intel_generic_uncore_mmio_enable_event(struct intel_uncore_box *box,
		143	struct perf_event *event);
142		144
143	void intel_generic_uncore_pci_init_box(struct intel_uncore_box *box);	145	void intel_generic_uncore_pci_init_box(struct intel_uncore_box *box);
144	void intel_generic_uncore_pci_disable_box(struct intel_uncore_box *box);	146	void intel_generic_uncore_pci_disable_box(struct intel_uncore_box *box);

arch/x86/events/intel/uncore_snb.c+213−1

@@ -1,6 +1,7 @@
1	// SPDX-License-Identifier: GPL-2.0	1	// SPDX-License-Identifier: GPL-2.0
2	/* Nehalem/SandBridge/Haswell/Broadwell/Skylake uncore support */	2	/* Nehalem/SandBridge/Haswell/Broadwell/Skylake uncore support */
3	#include "uncore.h"	3	#include "uncore.h"
		4	#include "uncore_discovery.h"
4		5
5	/* Uncore IMC PCI IDs */	6	/* Uncore IMC PCI IDs */
6	#define PCI_DEVICE_ID_INTEL_SNB_IMC 0x0100	7	#define PCI_DEVICE_ID_INTEL_SNB_IMC 0x0100
@@ -64,6 +65,20 @@ · 57 unmodified lines
64	#define PCI_DEVICE_ID_INTEL_RKL_2_IMC 0x4c53	65	#define PCI_DEVICE_ID_INTEL_RKL_2_IMC 0x4c53
65	#define PCI_DEVICE_ID_INTEL_ADL_1_IMC 0x4660	66	#define PCI_DEVICE_ID_INTEL_ADL_1_IMC 0x4660
66	#define PCI_DEVICE_ID_INTEL_ADL_2_IMC 0x4641	67	#define PCI_DEVICE_ID_INTEL_ADL_2_IMC 0x4641
		68	#define PCI_DEVICE_ID_INTEL_ADL_3_IMC 0x4601
		69	#define PCI_DEVICE_ID_INTEL_ADL_4_IMC 0x4602
		70	#define PCI_DEVICE_ID_INTEL_ADL_5_IMC 0x4609
		71	#define PCI_DEVICE_ID_INTEL_ADL_6_IMC 0x460a
		72	#define PCI_DEVICE_ID_INTEL_ADL_7_IMC 0x4621
		73	#define PCI_DEVICE_ID_INTEL_ADL_8_IMC 0x4623
		74	#define PCI_DEVICE_ID_INTEL_ADL_9_IMC 0x4629
		75	#define PCI_DEVICE_ID_INTEL_ADL_10_IMC 0x4637
		76	#define PCI_DEVICE_ID_INTEL_ADL_11_IMC 0x463b
		77	#define PCI_DEVICE_ID_INTEL_ADL_12_IMC 0x4648
		78	#define PCI_DEVICE_ID_INTEL_ADL_13_IMC 0x4649
		79	#define PCI_DEVICE_ID_INTEL_ADL_14_IMC 0x4650
		80	#define PCI_DEVICE_ID_INTEL_ADL_15_IMC 0x4668
		81	#define PCI_DEVICE_ID_INTEL_ADL_16_IMC 0x4670
67		82
68	/* SNB event control */	83	/* SNB event control */
69	#define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff	84	#define SNB_UNC_CTL_EV_SEL_MASK 0x000000ff
@@ -155,6 +170,7 @@ · 85 unmodified lines
155		170
156	DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");	171	DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");
157	DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");	172	DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");
		173	DEFINE_UNCORE_FORMAT_ATTR(chmask, chmask, "config:8-11");
158	DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");	174	DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");
159	DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");	175	DEFINE_UNCORE_FORMAT_ATTR(inv, inv, "config:23");
160	DEFINE_UNCORE_FORMAT_ATTR(cmask5, cmask, "config:24-28");	176	DEFINE_UNCORE_FORMAT_ATTR(cmask5, cmask, "config:24-28");
@@ -1334,6 +1350,62 @@ static const struct pci_device_id tgl_uncore_pci_ids[] = { · 1173 unmodified lines
1334	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_2_IMC),	1350	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_2_IMC),
1335	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),	1351	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
1336	},	1352	},
		1353	{ /* IMC */
		1354	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_3_IMC),
		1355	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1356	},
		1357	{ /* IMC */
		1358	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_4_IMC),
		1359	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1360	},
		1361	{ /* IMC */
		1362	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_5_IMC),
		1363	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1364	},
		1365	{ /* IMC */
		1366	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_6_IMC),
		1367	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1368	},
		1369	{ /* IMC */
		1370	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_7_IMC),
		1371	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1372	},
		1373	{ /* IMC */
		1374	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_8_IMC),
		1375	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1376	},
		1377	{ /* IMC */
		1378	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_9_IMC),
		1379	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1380	},
		1381	{ /* IMC */
		1382	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_10_IMC),
		1383	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1384	},
		1385	{ /* IMC */
		1386	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_11_IMC),
		1387	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1388	},
		1389	{ /* IMC */
		1390	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_12_IMC),
		1391	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1392	},
		1393	{ /* IMC */
		1394	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_13_IMC),
		1395	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1396	},
		1397	{ /* IMC */
		1398	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_14_IMC),
		1399	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1400	},
		1401	{ /* IMC */
		1402	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_15_IMC),
		1403	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1404	},
		1405	{ /* IMC */
		1406	PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ADL_16_IMC),
		1407	.driver_data = UNCORE_PCI_DEV_DATA(SNB_PCI_UNCORE_IMC, 0),
		1408	},
1337	{ /* end: all zeroes */ }	1409	{ /* end: all zeroes */ }
1338	};	1410	};
1339		1411
@@ -1390,7 +1462,8 @@ static struct pci_dev *tgl_uncore_get_mc_dev(void) · 50 unmodified lines
1390	#define TGL_UNCORE_MMIO_IMC_MEM_OFFSET 0x10000	1462	#define TGL_UNCORE_MMIO_IMC_MEM_OFFSET 0x10000
1391	#define TGL_UNCORE_PCI_IMC_MAP_SIZE 0xe000	1463	#define TGL_UNCORE_PCI_IMC_MAP_SIZE 0xe000
1392		1464
1393	static void tgl_uncore_imc_freerunning_init_box(struct intel_uncore_box *box)	1465	static void __uncore_imc_init_box(struct intel_uncore_box *box,
		1466	unsigned int base_offset)
1394	{	1467	{
1395	struct pci_dev *pdev = tgl_uncore_get_mc_dev();	1468	struct pci_dev *pdev = tgl_uncore_get_mc_dev();
1396	struct intel_uncore_pmu *pmu = box->pmu;	1469	struct intel_uncore_pmu *pmu = box->pmu;
@@ -1417,11 +1490,17 @@ static void tgl_uncore_imc_freerunning_init_box(struct intel_uncore_box *box) · 20 unmodified lines
1417	addr \|= ((resource_size_t)mch_bar << 32);	1490	addr \|= ((resource_size_t)mch_bar << 32);
1418	#endif	1491	#endif
1419		1492
		1493	addr += base_offset;
1420	box->io_addr = ioremap(addr, type->mmio_map_size);	1494	box->io_addr = ioremap(addr, type->mmio_map_size);
1421	if (!box->io_addr)	1495	if (!box->io_addr)
1422	pr_warn("perf uncore: Failed to ioremap for %s.\n", type->name);	1496	pr_warn("perf uncore: Failed to ioremap for %s.\n", type->name);
1423	}	1497	}
1424		1498
		1499	static void tgl_uncore_imc_freerunning_init_box(struct intel_uncore_box *box)
		1500	{
		1501	__uncore_imc_init_box(box, 0);
		1502	}
		1503
1425	static struct intel_uncore_ops tgl_uncore_imc_freerunning_ops = {	1504	static struct intel_uncore_ops tgl_uncore_imc_freerunning_ops = {
1426	.init_box = tgl_uncore_imc_freerunning_init_box,	1505	.init_box = tgl_uncore_imc_freerunning_init_box,
1427	.exit_box = uncore_mmio_exit_box,	1506	.exit_box = uncore_mmio_exit_box,
@@ -1469,3 +1548,136 @@ void tgl_uncore_mmio_init(void) · 41 unmodified lines
1469	}	1548	}
1470		1549
1471	/* end of Tiger Lake MMIO uncore support */	1550	/* end of Tiger Lake MMIO uncore support */
		1551
		1552	/* Alder Lake MMIO uncore support */
		1553	#define ADL_UNCORE_IMC_BASE 0xd900
		1554	#define ADL_UNCORE_IMC_MAP_SIZE 0x200
		1555	#define ADL_UNCORE_IMC_CTR 0xe8
		1556	#define ADL_UNCORE_IMC_CTRL 0xd0
		1557	#define ADL_UNCORE_IMC_GLOBAL_CTL 0xc0
		1558	#define ADL_UNCORE_IMC_BOX_CTL 0xc4
		1559	#define ADL_UNCORE_IMC_FREERUNNING_BASE 0xd800
		1560	#define ADL_UNCORE_IMC_FREERUNNING_MAP_SIZE 0x100
		1561
		1562	#define ADL_UNCORE_IMC_CTL_FRZ (1 << 0)
		1563	#define ADL_UNCORE_IMC_CTL_RST_CTRL (1 << 1)
		1564	#define ADL_UNCORE_IMC_CTL_RST_CTRS (1 << 2)
		1565	#define ADL_UNCORE_IMC_CTL_INT (ADL_UNCORE_IMC_CTL_RST_CTRL \| \
		1566	ADL_UNCORE_IMC_CTL_RST_CTRS)
		1567
		1568	static void adl_uncore_imc_init_box(struct intel_uncore_box *box)
		1569	{
		1570	__uncore_imc_init_box(box, ADL_UNCORE_IMC_BASE);
		1571
		1572	/* The global control in MC1 can control both MCs. */
		1573	if (box->io_addr && (box->pmu->pmu_idx == 1))
		1574	writel(ADL_UNCORE_IMC_CTL_INT, box->io_addr + ADL_UNCORE_IMC_GLOBAL_CTL);
		1575	}
		1576
		1577	static void adl_uncore_mmio_disable_box(struct intel_uncore_box *box)
		1578	{
		1579	if (!box->io_addr)
		1580	return;
		1581
		1582	writel(ADL_UNCORE_IMC_CTL_FRZ, box->io_addr + uncore_mmio_box_ctl(box));
		1583	}
		1584
		1585	static void adl_uncore_mmio_enable_box(struct intel_uncore_box *box)
		1586	{
		1587	if (!box->io_addr)
		1588	return;
		1589
		1590	writel(0, box->io_addr + uncore_mmio_box_ctl(box));
		1591	}
		1592
		1593	static struct intel_uncore_ops adl_uncore_mmio_ops = {
		1594	.init_box = adl_uncore_imc_init_box,
		1595	.exit_box = uncore_mmio_exit_box,
		1596	.disable_box = adl_uncore_mmio_disable_box,
		1597	.enable_box = adl_uncore_mmio_enable_box,
		1598	.disable_event = intel_generic_uncore_mmio_disable_event,
		1599	.enable_event = intel_generic_uncore_mmio_enable_event,
		1600	.read_counter = uncore_mmio_read_counter,
		1601	};
		1602
		1603	#define ADL_UNC_CTL_CHMASK_MASK 0x00000f00
		1604	#define ADL_UNC_IMC_EVENT_MASK (SNB_UNC_CTL_EV_SEL_MASK \| \
		1605	ADL_UNC_CTL_CHMASK_MASK \| \
		1606	SNB_UNC_CTL_EDGE_DET)
		1607
		1608	static struct attribute *adl_uncore_imc_formats_attr[] = {
		1609	&format_attr_event.attr,
		1610	&format_attr_chmask.attr,
		1611	&format_attr_edge.attr,
		1612	NULL,
		1613	};
		1614
		1615	static const struct attribute_group adl_uncore_imc_format_group = {
		1616	.name = "format",
		1617	.attrs = adl_uncore_imc_formats_attr,
		1618	};
		1619
		1620	static struct intel_uncore_type adl_uncore_imc = {
		1621	.name = "imc",
		1622	.num_counters = 5,
		1623	.num_boxes = 2,
		1624	.perf_ctr_bits = 64,
		1625	.perf_ctr = ADL_UNCORE_IMC_CTR,
		1626	.event_ctl = ADL_UNCORE_IMC_CTRL,
		1627	.event_mask = ADL_UNC_IMC_EVENT_MASK,
		1628	.box_ctl = ADL_UNCORE_IMC_BOX_CTL,
		1629	.mmio_offset = 0,
		1630	.mmio_map_size = ADL_UNCORE_IMC_MAP_SIZE,
		1631	.ops = &adl_uncore_mmio_ops,
		1632	.format_group = &adl_uncore_imc_format_group,
		1633	};
		1634
		1635	enum perf_adl_uncore_imc_freerunning_types {
		1636	ADL_MMIO_UNCORE_IMC_DATA_TOTAL,
		1637	ADL_MMIO_UNCORE_IMC_DATA_READ,
		1638	ADL_MMIO_UNCORE_IMC_DATA_WRITE,
		1639	ADL_MMIO_UNCORE_IMC_FREERUNNING_TYPE_MAX
		1640	};
		1641
		1642	static struct freerunning_counters adl_uncore_imc_freerunning[] = {
		1643	[ADL_MMIO_UNCORE_IMC_DATA_TOTAL] = { 0x40, 0x0, 0x0, 1, 64 },
		1644	[ADL_MMIO_UNCORE_IMC_DATA_READ] = { 0x58, 0x0, 0x0, 1, 64 },
		1645	[ADL_MMIO_UNCORE_IMC_DATA_WRITE] = { 0xA0, 0x0, 0x0, 1, 64 },
		1646	};
		1647
		1648	static void adl_uncore_imc_freerunning_init_box(struct intel_uncore_box *box)
		1649	{
		1650	__uncore_imc_init_box(box, ADL_UNCORE_IMC_FREERUNNING_BASE);
		1651	}
		1652
		1653	static struct intel_uncore_ops adl_uncore_imc_freerunning_ops = {
		1654	.init_box = adl_uncore_imc_freerunning_init_box,
		1655	.exit_box = uncore_mmio_exit_box,
		1656	.read_counter = uncore_mmio_read_counter,
		1657	.hw_config = uncore_freerunning_hw_config,
		1658	};
		1659
		1660	static struct intel_uncore_type adl_uncore_imc_free_running = {
		1661	.name = "imc_free_running",
		1662	.num_counters = 3,
		1663	.num_boxes = 2,
		1664	.num_freerunning_types = ADL_MMIO_UNCORE_IMC_FREERUNNING_TYPE_MAX,
		1665	.mmio_map_size = ADL_UNCORE_IMC_FREERUNNING_MAP_SIZE,
		1666	.freerunning = adl_uncore_imc_freerunning,
		1667	.ops = &adl_uncore_imc_freerunning_ops,
		1668	.event_descs = tgl_uncore_imc_events,
		1669	.format_group = &tgl_uncore_imc_format_group,
		1670	};
		1671
		1672	static struct intel_uncore_type *adl_mmio_uncores[] = {
		1673	&adl_uncore_imc,
		1674	&adl_uncore_imc_free_running,
		1675	NULL
		1676	};
		1677
		1678	void adl_uncore_mmio_init(void)
		1679	{
		1680	uncore_mmio_uncores = adl_mmio_uncores;
		1681	}
		1682
		1683	/* end of Alder Lake MMIO uncore support */

arch/x86/events/intel/uncore_snbep.c+1−1

@@ -5482,7 +5482,7 @@ static struct intel_uncore_type icx_uncore_imc = { · 5481 unmodified lines
5482	.fixed_ctr_bits = 48,	5482	.fixed_ctr_bits = 48,
5483	.fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR,	5483	.fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR,
5484	.fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL,	5484	.fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL,
5485	.event_descs = hswep_uncore_imc_events,	5485	.event_descs = snr_uncore_imc_events,
5486	.perf_ctr = SNR_IMC_MMIO_PMON_CTR0,	5486	.perf_ctr = SNR_IMC_MMIO_PMON_CTR0,
5487	.event_ctl = SNR_IMC_MMIO_PMON_CTL0,	5487	.event_ctl = SNR_IMC_MMIO_PMON_CTL0,
5488	.event_mask = SNBEP_PMON_RAW_EVENT_MASK,	5488	.event_mask = SNBEP_PMON_RAW_EVENT_MASK,

arch/x86/events/perf_event.h+9−1

 	LBR_FORMAT_EIP_FLAGS2	= 0x04,
 	LBR_FORMAT_INFO		= 0x05,
 	LBR_FORMAT_TIME		= 0x06,
-	LBR_FORMAT_MAX_KNOWN    = LBR_FORMAT_TIME,
+	LBR_FORMAT_INFO2	= 0x07,
+	LBR_FORMAT_MAX_KNOWN    = LBR_FORMAT_INFO2,
 };
 enum {
 	bool		lbr_double_abort;	   /* duplicated lbr aborts */
 	bool		lbr_pt_coexist;		   /* (LBR|BTS) may coexist with PT */
+	unsigned int	lbr_has_info:1;
+	unsigned int	lbr_has_tsx:1;
+	unsigned int	lbr_from_flags:1;
+	unsigned int	lbr_to_cycles:1;
 	/*
 	 * Intel Architectural LBR CPUID Enumeration
 	 */
 void intel_pmu_lbr_init_knl(void);
+void intel_pmu_lbr_init(void);
 void intel_pmu_arch_lbr_init(void);
 void intel_pmu_pebs_data_source_nhm(void);

arch/x86/events/rapl.c+6−3

  * - perf_msr_probe(PERF_RAPL_MAX)
  * - want to use same event codes across both architectures
  */
-static struct perf_msr amd_rapl_msrs[PERF_RAPL_MAX] = {
+static struct perf_msr amd_rapl_msrs[] = {
-	[PERF_RAPL_PKG]  = { MSR_AMD_PKG_ENERGY_STATUS,  &rapl_events_pkg_group,   test_msr },
+	[PERF_RAPL_PP0]  = { 0, &rapl_events_cores_group, 0, false, 0 },
+	[PERF_RAPL_PKG]  = { MSR_AMD_PKG_ENERGY_STATUS,  &rapl_events_pkg_group,   test_msr, false, RAPL_MSR_MASK },
+	[PERF_RAPL_RAM]  = { 0, &rapl_events_ram_group,   0, false, 0 },
+	[PERF_RAPL_PP1]  = { 0, &rapl_events_gpu_group,   0, false, 0 },
+	[PERF_RAPL_PSYS] = { 0, &rapl_events_psys_group,  0, false, 0 },
 };
 static int rapl_cpu_offline(unsigned int cpu)
 {
 	struct rapl_pmu *pmu = cpu_to_rapl_pmu(cpu);

arch/x86/include/asm/kvm_host.h+3−2

 	int (*get_msr_feature)(struct kvm_msr_entry *entry);
-	bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, void *insn, int insn_len);
+	bool (*can_emulate_instruction)(struct kvm_vcpu *vcpu, int emul_type,
+					void *insn, int insn_len);
 	bool (*apic_init_signal_blocked)(struct kvm_vcpu *vcpu);
 	int (*enable_direct_tlbflush)(struct kvm_vcpu *vcpu);
 };
 struct kvm_x86_nested_ops {
+	void (*leave_nested)(struct kvm_vcpu *vcpu);
 	int (*check_events)(struct kvm_vcpu *vcpu);
 	bool (*hv_timer_pending)(struct kvm_vcpu *vcpu);
 	void (*triple_fault)(struct kvm_vcpu *vcpu);
 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu);
 int kvm_cpu_get_interrupt(struct kvm_vcpu *v);
 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event);
-void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu);
 int kvm_pv_send_ipi(struct kvm *kvm, unsigned long ipi_bitmap_low,
 		    unsigned long ipi_bitmap_high, u32 min,

arch/x86/include/uapi/asm/kvm.h+3−0

@@ -452,6 +452,9 @@ struct kvm_sync_regs { · 451 unmodified lines
452		452
453	#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001	453	#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
454		454
		455	/* attributes for system fd (group 0) */
		456	#define KVM_X86_XCOMP_GUEST_SUPP 0
		457
455	struct kvm_vmx_nested_state_data {	458	struct kvm_vmx_nested_state_data {
456	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];	459	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
457	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];	460	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];

arch/x86/kernel/cpu/mce/amd.c+1−1

@@ -423,7 +423,7 @@ static void threshold_restart_bank(void *_tr) · 422 unmodified lines
423	u32 hi, lo;	423	u32 hi, lo;
424		424
425	/* sysfs write might race against an offline operation */	425	/* sysfs write might race against an offline operation */
426	if (this_cpu_read(threshold_banks))	426	if (!this_cpu_read(threshold_banks) && !tr->set_lvt_off)
427	return;	427	return;
428		428
429	rdmsr(tr->b->address, lo, hi);	429	rdmsr(tr->b->address, lo, hi);

arch/x86/kernel/cpu/mce/intel.c+1−0

@@ -486,6 +486,7 @@ static void intel_ppin_init(struct cpuinfo_x86 *c) · 485 unmodified lines
486	case INTEL_FAM6_BROADWELL_X:	486	case INTEL_FAM6_BROADWELL_X:
487	case INTEL_FAM6_SKYLAKE_X:	487	case INTEL_FAM6_SKYLAKE_X:
488	case INTEL_FAM6_ICELAKE_X:	488	case INTEL_FAM6_ICELAKE_X:
		489	case INTEL_FAM6_ICELAKE_D:
489	case INTEL_FAM6_SAPPHIRERAPIDS_X:	490	case INTEL_FAM6_SAPPHIRERAPIDS_X:
490	case INTEL_FAM6_XEON_PHI_KNL:	491	case INTEL_FAM6_XEON_PHI_KNL:
491	case INTEL_FAM6_XEON_PHI_KNM:	492	case INTEL_FAM6_XEON_PHI_KNM:

arch/x86/kvm/cpuid.c+55−35

 		orig = &vcpu->arch.cpuid_entries[i];
 		if (e2[i].function != orig->function ||
 		    e2[i].index != orig->index ||
+		    e2[i].flags != orig->flags ||
 		    e2[i].eax != orig->eax || e2[i].ebx != orig->ebx ||
 		    e2[i].ecx != orig->ecx || e2[i].edx != orig->edx)
 			return -EINVAL;
 		vcpu->arch.pv_cpuid.features = best->eax;
 }
+/*
+ * Calculate guest's supported XCR0 taking into account guest CPUID data and
+ * supported_xcr0 (comprised of host configuration and KVM_SUPPORTED_XCR0).
+ */
+static u64 cpuid_get_supported_xcr0(struct kvm_cpuid_entry2 *entries, int nent)
+{
+	struct kvm_cpuid_entry2 *best;
+	best = cpuid_entry2_find(entries, nent, 0xd, 0);
+	if (!best)
+		return 0;
+	return (best->eax | ((u64)best->edx << 32)) & supported_xcr0;
+}
 static void __kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu, struct kvm_cpuid_entry2 *entries,
 				       int nent)
 {
 	struct kvm_cpuid_entry2 *best;
+	u64 guest_supported_xcr0 = cpuid_get_supported_xcr0(entries, nent);
 	best = cpuid_entry2_find(entries, nent, 1, 0);
 	if (best) {
 					   vcpu->arch.ia32_misc_enable_msr &
 					   MSR_IA32_MISC_ENABLE_MWAIT);
 	}
+	/*
+	 * Bits 127:0 of the allowed SECS.ATTRIBUTES (CPUID.0x12.0x1) enumerate
+	 * the supported XSAVE Feature Request Mask (XFRM), i.e. the enclave's
+	 * requested XCR0 value.  The enclave's XFRM must be a subset of XCRO
+	 * at the time of EENTER, thus adjust the allowed XFRM by the guest's
+	 * supported XCR0.  Similar to XCR0 handling, FP and SSE are forced to
+	 * '1' even on CPUs that don't support XSAVE.
+	 */
+	best = cpuid_entry2_find(entries, nent, 0x12, 0x1);
+	if (best) {
+		best->ecx &= guest_supported_xcr0 & 0xffffffff;
+		best->edx &= guest_supported_xcr0 >> 32;
+		best->ecx |= XFEATURE_MASK_FPSSE;
+	}
 }
 void kvm_update_cpuid_runtime(struct kvm_vcpu *vcpu)
 		kvm_apic_set_version(vcpu);
 	}
-	best = kvm_find_cpuid_entry(vcpu, 0xD, 0);
+	vcpu->arch.guest_supported_xcr0 =
-	if (!best)
+		cpuid_get_supported_xcr0(vcpu->arch.cpuid_entries, vcpu->arch.cpuid_nent);
-		vcpu->arch.guest_supported_xcr0 = 0;
-	else
-		vcpu->arch.guest_supported_xcr0 =
-			(best->eax | ((u64)best->edx << 32)) & supported_xcr0;
-	/*
-	 * Bits 127:0 of the allowed SECS.ATTRIBUTES (CPUID.0x12.0x1) enumerate
-	 * the supported XSAVE Feature Request Mask (XFRM), i.e. the enclave's
-	 * requested XCR0 value.  The enclave's XFRM must be a subset of XCRO
-	 * at the time of EENTER, thus adjust the allowed XFRM by the guest's
-	 * supported XCR0.  Similar to XCR0 handling, FP and SSE are forced to
-	 * '1' even on CPUs that don't support XSAVE.
-	 */
-	best = kvm_find_cpuid_entry(vcpu, 0x12, 0x1);
-	if (best) {
-		best->ecx &= vcpu->arch.guest_supported_xcr0 & 0xffffffff;
-		best->edx &= vcpu->arch.guest_supported_xcr0 >> 32;
-		best->ecx |= XFEATURE_MASK_FPSSE;
-	}
 	kvm_update_pv_runtime(vcpu);
 	 * KVM_SET_CPUID{,2} again. To support this legacy behavior, check
 	 * whether the supplied CPUID data is equal to what's already set.
 	 */
-	if (vcpu->arch.last_vmentry_cpu != -1)
+	if (vcpu->arch.last_vmentry_cpu != -1) {
-		return kvm_cpuid_check_equal(vcpu, e2, nent);
+		r = kvm_cpuid_check_equal(vcpu, e2, nent);
+		if (r)
+			return r;
+		kvfree(e2);
+		return 0;
+	}
 	r = kvm_check_cpuid(vcpu, e2, nent);
 	if (r)
 		}
 		break;
 	case 0xd: {
-		u64 guest_perm = xstate_get_guest_group_perm();
+		u64 permitted_xcr0 = supported_xcr0 & xstate_get_guest_group_perm();
+		u64 permitted_xss = supported_xss;
-		entry->eax &= supported_xcr0 & guest_perm;
+		entry->eax &= permitted_xcr0;
-		entry->ebx = xstate_required_size(supported_xcr0, false);
+		entry->ebx = xstate_required_size(permitted_xcr0, false);
 		entry->ecx = entry->ebx;
-		entry->edx &= (supported_xcr0 & guest_perm) >> 32;
+		entry->edx &= permitted_xcr0 >> 32;
-		if (!supported_xcr0)
+		if (!permitted_xcr0)
 			break;
 		entry = do_host_cpuid(array, function, 1);
 		cpuid_entry_override(entry, CPUID_D_1_EAX);
 		if (entry->eax & (F(XSAVES)|F(XSAVEC)))
-			entry->ebx = xstate_required_size(supported_xcr0 | supported_xss,
+			entry->ebx = xstate_required_size(permitted_xcr0 | permitted_xss,
 							  true);
 		else {
-			WARN_ON_ONCE(supported_xss != 0);
+			WARN_ON_ONCE(permitted_xss != 0);
 			entry->ebx = 0;
 		}
-		entry->ecx &= supported_xss;
+		entry->ecx &= permitted_xss;
-		entry->edx &= supported_xss >> 32;
+		entry->edx &= permitted_xss >> 32;
 		for (i = 2; i < 64; ++i) {
 			bool s_state;
-			if (supported_xcr0 & BIT_ULL(i))
+			if (permitted_xcr0 & BIT_ULL(i))
 				s_state = false;
-			else if (supported_xss & BIT_ULL(i))
+			else if (permitted_xss & BIT_ULL(i))
 				s_state = true;
 			else
 				continue;
 			 * invalid sub-leafs.  Only valid sub-leafs should
 			 * reach this point, and they should have a non-zero
 			 * save state size.  Furthermore, check whether the
-			 * processor agrees with supported_xcr0/supported_xss
+			 * processor agrees with permitted_xcr0/permitted_xss
 			 * on whether this is an XCR0- or IA32_XSS-managed area.
 			 */
 			if (WARN_ON_ONCE(!entry->eax || (entry->ecx & 0x1) != s_state)) {

arch/x86/kvm/lapic.c+1−1

@@ -2629,7 +2629,7 @@ int kvm_apic_set_state(struct kvm_vcpu vcpu, struct kvm_lapic_state s) · 2628 unmodified lines
2629	kvm_apic_set_version(vcpu);	2629	kvm_apic_set_version(vcpu);
2630		2630
2631	apic_update_ppr(apic);	2631	apic_update_ppr(apic);
2632	hrtimer_cancel(&apic->lapic_timer.timer);	2632	cancel_apic_timer(apic);
2633	apic->lapic_timer.expired_tscdeadline = 0;	2633	apic->lapic_timer.expired_tscdeadline = 0;
2634	apic_update_lvtt(apic);	2634	apic_update_lvtt(apic);
2635	apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));	2635	apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));

arch/x86/kvm/svm/nested.c+5−4

 /*
  * Forcibly leave nested mode in order to be able to reset the VCPU later on.
  */
-void svm_leave_nested(struct vcpu_svm *svm)
+void svm_leave_nested(struct kvm_vcpu *vcpu)
 {
-	struct kvm_vcpu *vcpu = &svm->vcpu;
+	struct vcpu_svm *svm = to_svm(vcpu);
 	if (is_guest_mode(vcpu)) {
 		svm->nested.nested_run_pending = 0;
 		return -EINVAL;
 	if (!(kvm_state->flags & KVM_STATE_NESTED_GUEST_MODE)) {
-		svm_leave_nested(svm);
+		svm_leave_nested(vcpu);
 		svm_set_gif(svm, !!(kvm_state->flags & KVM_STATE_NESTED_GIF_SET));
 		return 0;
 	}
 	 */
 	if (is_guest_mode(vcpu))
-		svm_leave_nested(svm);
+		svm_leave_nested(vcpu);
 	else
 		svm->nested.vmcb02.ptr->save = svm->vmcb01.ptr->save;
 }
 struct kvm_x86_nested_ops svm_nested_ops = {
+	.leave_nested = svm_leave_nested,
 	.check_events = svm_check_nested_events,
 	.triple_fault = nested_svm_triple_fault,
 	.get_nested_state_pages = svm_get_nested_state_pages,

arch/x86/kvm/svm/sev.c+7−2

 	if (!sev_enabled || !npt_enabled)
 		goto out;
-	/* Does the CPU support SEV? */
+	/*
-	if (!boot_cpu_has(X86_FEATURE_SEV))
+	 * SEV must obviously be supported in hardware.  Sanity check that the
+	 * CPU supports decode assists, which is mandatory for SEV guests to
+	 * support instruction emulation.
+	 */
+	if (!boot_cpu_has(X86_FEATURE_SEV) ||
+	    WARN_ON_ONCE(!boot_cpu_has(X86_FEATURE_DECODEASSISTS)))
 		goto out;
 	/* Retrieve SEV CPUID information */

arch/x86/kvm/svm/svm.c+122−55

@@ -290,7 +290,7 @@ int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer) · 289 unmodified lines
290		290
291	if ((old_efer & EFER_SVME) != (efer & EFER_SVME)) {	291	if ((old_efer & EFER_SVME) != (efer & EFER_SVME)) {
292	if (!(efer & EFER_SVME)) {	292	if (!(efer & EFER_SVME)) {
293	svm_leave_nested(svm);	293	svm_leave_nested(vcpu);
294	svm_set_gif(svm, true);	294	svm_set_gif(svm, true);
295	/* #GP intercept is still needed for vmware backdoor */	295	/* #GP intercept is still needed for vmware backdoor */
296	if (!enable_vmware_backdoor)	296	if (!enable_vmware_backdoor)
@@ -312,7 +312,11 @@ int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer) · 15 unmodified lines
312	return ret;	312	return ret;
313	}	313	}
314		314
315	if (svm_gp_erratum_intercept)	315	/*
		316	* Never intercept #GP for SEV guests, KVM can't
		317	* decrypt guest memory to workaround the erratum.
		318	*/
		319	if (svm_gp_erratum_intercept && !sev_guest(vcpu->kvm))
316	set_exception_intercept(svm, GP_VECTOR);	320	set_exception_intercept(svm, GP_VECTOR);
317	}	321	}
318	}	322	}
@@ -1010,9 +1014,10 @@ static void init_vmcb(struct kvm_vcpu *vcpu) · 691 unmodified lines
1010	* Guest access to VMware backdoor ports could legitimately	1014	* Guest access to VMware backdoor ports could legitimately
1011	* trigger #GP because of TSS I/O permission bitmap.	1015	* trigger #GP because of TSS I/O permission bitmap.
1012	* We intercept those #GP and allow access to them anyway	1016	* We intercept those #GP and allow access to them anyway
1013	* as VMware does.	1017	* as VMware does. Don't intercept #GP for SEV guests as KVM can't
		1018	* decrypt guest memory to decode the faulting instruction.
1014	*/	1019	*/
1015	if (enable_vmware_backdoor)	1020	if (enable_vmware_backdoor && !sev_guest(vcpu->kvm))
1016	set_exception_intercept(svm, GP_VECTOR);	1021	set_exception_intercept(svm, GP_VECTOR);
1017		1022
1018	svm_set_intercept(svm, INTERCEPT_INTR);	1023	svm_set_intercept(svm, INTERCEPT_INTR);
@@ -2091,10 +2096,6 @@ static int gp_interception(struct kvm_vcpu *vcpu) · 1072 unmodified lines
2091	if (error_code)	2096	if (error_code)
2092	goto reinject;	2097	goto reinject;
2093		2098
2094	/* All SVM instructions expect page aligned RAX */
2095	if (svm->vmcb->save.rax & ~PAGE_MASK)
2096	goto reinject;
2097
2098	/* Decode the instruction for usage later */	2099	/* Decode the instruction for usage later */
2099	if (x86_decode_emulated_instruction(vcpu, 0, NULL, 0) != EMULATION_OK)	2100	if (x86_decode_emulated_instruction(vcpu, 0, NULL, 0) != EMULATION_OK)
2100	goto reinject;	2101	goto reinject;
@@ -2112,8 +2113,13 @@ static int gp_interception(struct kvm_vcpu *vcpu) · 11 unmodified lines
2112	if (!is_guest_mode(vcpu))	2113	if (!is_guest_mode(vcpu))
2113	return kvm_emulate_instruction(vcpu,	2114	return kvm_emulate_instruction(vcpu,
2114	EMULTYPE_VMWARE_GP \| EMULTYPE_NO_DECODE);	2115	EMULTYPE_VMWARE_GP \| EMULTYPE_NO_DECODE);
2115	} else	2116	} else {
		2117	/* All SVM instructions expect page aligned RAX */
		2118	if (svm->vmcb->save.rax & ~PAGE_MASK)
		2119	goto reinject;
		2120
2116	return emulate_svm_instr(vcpu, opcode);	2121	return emulate_svm_instr(vcpu, opcode);
		2122	}
2117		2123
2118	reinject:	2124	reinject:
2119	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);	2125	kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
@@ -4252,79 +4258,140 @@ static void svm_enable_smi_window(struct kvm_vcpu *vcpu) · 2132 unmodified lines
4252	}	4258	}
4253	}	4259	}
4254		4260
4255	static bool svm_can_emulate_instruction(struct kvm_vcpu vcpu, void insn, int insn_len)	4261	static bool svm_can_emulate_instruction(struct kvm_vcpu *vcpu, int emul_type,
		4262	void *insn, int insn_len)
4256	{	4263	{
4257	bool smep, smap, is_user;	4264	bool smep, smap, is_user;
4258	unsigned long cr4;	4265	unsigned long cr4;
		4266	u64 error_code;
		4267
		4268	/* Emulation is always possible when KVM has access to all guest state. */
		4269	if (!sev_guest(vcpu->kvm))
		4270	return true;
		4271
		4272	/* #UD and #GP should never be intercepted for SEV guests. */
		4273	WARN_ON_ONCE(emul_type & (EMULTYPE_TRAP_UD \|
		4274	EMULTYPE_TRAP_UD_FORCED \|
		4275	EMULTYPE_VMWARE_GP));
4259		4276
4260	/*	4277	/*
4261	* When the guest is an SEV-ES guest, emulation is not possible.	4278	* Emulation is impossible for SEV-ES guests as KVM doesn't have access
		4279	* to guest register state.
4262	*/	4280	*/
4263	if (sev_es_guest(vcpu->kvm))	4281	if (sev_es_guest(vcpu->kvm))
4264	return false;	4282	return false;
4265		4283
		4284	/*
		4285	* Emulation is possible if the instruction is already decoded, e.g.
		4286	* when completing I/O after returning from userspace.
		4287	*/
		4288	if (emul_type & EMULTYPE_NO_DECODE)
		4289	return true;
		4290
		4291	/*
		4292	* Emulation is possible for SEV guests if and only if a prefilled
		4293	* buffer containing the bytes of the intercepted instruction is
		4294	* available. SEV guest memory is encrypted with a guest specific key
		4295	* and cannot be decrypted by KVM, i.e. KVM would read cyphertext and
		4296	* decode garbage.
		4297	*
		4298	* Inject #UD if KVM reached this point without an instruction buffer.
		4299	* In practice, this path should never be hit by a well-behaved guest,
		4300	* e.g. KVM doesn't intercept #UD or #GP for SEV guests, but this path
		4301	* is still theoretically reachable, e.g. via unaccelerated fault-like
		4302	* AVIC access, and needs to be handled by KVM to avoid putting the
		4303	* guest into an infinite loop. Injecting #UD is somewhat arbitrary,
		4304	* but its the least awful option given lack of insight into the guest.
		4305	*/
		4306	if (unlikely(!insn)) {
		4307	kvm_queue_exception(vcpu, UD_VECTOR);
		4308	return false;
		4309	}
		4310
		4311	/*
		4312	* Emulate for SEV guests if the insn buffer is not empty. The buffer
		4313	* will be empty if the DecodeAssist microcode cannot fetch bytes for
		4314	* the faulting instruction because the code fetch itself faulted, e.g.
		4315	* the guest attempted to fetch from emulated MMIO or a guest page
		4316	* table used to translate CS:RIP resides in emulated MMIO.
		4317	*/
		4318	if (likely(insn_len))
		4319	return true;
		4320
4266	/*	4321	/*
4267	* Detect and workaround Errata 1096 Fam_17h_00_0Fh.	4322	* Detect and workaround Errata 1096 Fam_17h_00_0Fh.
4268	*	4323	*
4269	* Errata:	4324	* Errata:
4270	* When CPU raise #NPF on guest data access and vCPU CR4.SMAP=1, it is	4325	* When CPU raises #NPF on guest data access and vCPU CR4.SMAP=1, it is
4271	* possible that CPU microcode implementing DecodeAssist will fail	4326	* possible that CPU microcode implementing DecodeAssist will fail to
4272	* to read bytes of instruction which caused #NPF. In this case,	4327	* read guest memory at CS:RIP and vmcb.GuestIntrBytes will incorrectly
4273	* GuestIntrBytes field of the VMCB on a VMEXIT will incorrectly	4328	* be '0'. This happens because microcode reads CS:RIP using a _data_
4274	* return 0 instead of the correct guest instruction bytes.	4329	* loap uop with CPL=0 privileges. If the load hits a SMAP #PF, ucode
4275	*	4330	* gives up and does not fill the instruction bytes buffer.
4276	* This happens because CPU microcode reading instruction bytes
4277	* uses a special opcode which attempts to read data using CPL=0
4278	* privileges. The microcode reads CS:RIP and if it hits a SMAP
4279	* fault, it gives up and returns no instruction bytes.
4280	*	4331	*
4281	* Detection:	4332	* As above, KVM reaches this point iff the VM is an SEV guest, the CPU
4282	* We reach here in case CPU supports DecodeAssist, raised #NPF and	4333	* supports DecodeAssist, a #NPF was raised, KVM's page fault handler
4283	* returned 0 in GuestIntrBytes field of the VMCB.	4334	* triggered emulation (e.g. for MMIO), and the CPU returned 0 in the
4284	* First, errata can only be triggered in case vCPU CR4.SMAP=1.	4335	* GuestIntrBytes field of the VMCB.
4285	* Second, if vCPU CR4.SMEP=1, errata could only be triggered
4286	* in case vCPU CPL==3 (Because otherwise guest would have triggered
4287	* a SMEP fault instead of #NPF).
4288	* Otherwise, vCPU CR4.SMEP=0, errata could be triggered by any vCPU CPL.
4289	* As most guests enable SMAP if they have also enabled SMEP, use above
4290	* logic in order to attempt minimize false-positive of detecting errata
4291	* while still preserving all cases semantic correctness.
4292	*	4336	*
4293	* Workaround:	4337	* This does _not_ mean that the erratum has been encountered, as the
4294	* To determine what instruction the guest was executing, the hypervisor	4338	* DecodeAssist will also fail if the load for CS:RIP hits a legitimate
4295	* will have to decode the instruction at the instruction pointer.	4339	* #PF, e.g. if the guest attempt to execute from emulated MMIO and
		4340	* encountered a reserved/not-present #PF.
4296	*	4341	*
4297	* In non SEV guest, hypervisor will be able to read the guest	4342	* To hit the erratum, the following conditions must be true:
4298	* memory to decode the instruction pointer when insn_len is zero	4343	* 1. CR4.SMAP=1 (obviously).
4299	* so we return true to indicate that decoding is possible.	4344	* 2. CR4.SMEP=0 \|\| CPL=3. If SMEP=1 and CPL<3, the erratum cannot
		4345	* have been hit as the guest would have encountered a SMEP
		4346	* violation #PF, not a #NPF.
		4347	* 3. The #NPF is not due to a code fetch, in which case failure to
		4348	* retrieve the instruction bytes is legitimate (see abvoe).
4300	*	4349	*
4301	* But in the SEV guest, the guest memory is encrypted with the	4350	* In addition, don't apply the erratum workaround if the #NPF occurred
4302	* guest specific key and hypervisor will not be able to decode the	4351	* while translating guest page tables (see below).
4303	* instruction pointer so we will not able to workaround it. Lets
4304	* print the error and request to kill the guest.
4305	*/	4352	*/
4306	if (likely(!insn \|\| insn_len))	4353	error_code = to_svm(vcpu)->vmcb->control.exit_info_1;
4307	return true;	4354	if (error_code & (PFERR_GUEST_PAGE_MASK \| PFERR_FETCH_MASK))
4308		4355	goto resume_guest;
4309	/*
4310	* If RIP is invalid, go ahead with emulation which will cause an
4311	* internal error exit.
4312	*/
4313	if (!kvm_vcpu_gfn_to_memslot(vcpu, kvm_rip_read(vcpu) >> PAGE_SHIFT))
4314	return true;
4315		4356
4316	cr4 = kvm_read_cr4(vcpu);	4357	cr4 = kvm_read_cr4(vcpu);
4317	smep = cr4 & X86_CR4_SMEP;	4358	smep = cr4 & X86_CR4_SMEP;
4318	smap = cr4 & X86_CR4_SMAP;	4359	smap = cr4 & X86_CR4_SMAP;
4319	is_user = svm_get_cpl(vcpu) == 3;	4360	is_user = svm_get_cpl(vcpu) == 3;
4320	if (smap && (!smep \|\| is_user)) {	4361	if (smap && (!smep \|\| is_user)) {
4321	if (!sev_guest(vcpu->kvm))
4322	return true;
4323
4324	pr_err_ratelimited("KVM: SEV Guest triggered AMD Erratum 1096\n");	4362	pr_err_ratelimited("KVM: SEV Guest triggered AMD Erratum 1096\n");
4325	kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);	4363
		4364	/*
		4365	* If the fault occurred in userspace, arbitrarily inject #GP
		4366	* to avoid killing the guest and to hopefully avoid confusing
		4367	* the guest kernel too much, e.g. injecting #PF would not be
		4368	* coherent with respect to the guest's page tables. Request
		4369	* triple fault if the fault occurred in the kernel as there's
		4370	* no fault that KVM can inject without confusing the guest.
		4371	* In practice, the triple fault is moot as no sane SEV kernel
		4372	* will execute from user memory while also running with SMAP=1.
		4373	*/
		4374	if (is_user)
		4375	kvm_inject_gp(vcpu, 0);
		4376	else
		4377	kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
4326	}	4378	}
4327		4379
		4380	resume_guest:
		4381	/*
		4382	* If the erratum was not hit, simply resume the guest and let it fault
		4383	* again. While awful, e.g. the vCPU may get stuck in an infinite loop
		4384	* if the fault is at CPL=0, it's the lesser of all evils. Exiting to
		4385	* userspace will kill the guest, and letting the emulator read garbage
		4386	* will yield random behavior and potentially corrupt the guest.
		4387	*
		4388	* Simply resuming the guest is technically not a violation of the SEV
		4389	* architecture. AMD's APM states that all code fetches and page table
		4390	* accesses for SEV guest are encrypted, regardless of the C-Bit. The
		4391	* APM also states that encrypted accesses to MMIO are "ignored", but
		4392	* doesn't explicitly define "ignored", i.e. doing nothing and letting
		4393	* the guest spin is technically "ignoring" the access.
		4394	*/
4328	return false;	4395	return false;
4329	}	4396	}
4330		4397

arch/x86/kvm/svm/svm.h+1−6

 			       & ~VMCB_ALWAYS_DIRTY_MASK;
 }
-static inline bool vmcb_is_clean(struct vmcb *vmcb, int bit)
-{
-	return (vmcb->control.clean & (1 << bit));
-}
 static inline void vmcb_mark_dirty(struct vmcb *vmcb, int bit)
 {
 	vmcb->control.clean &= ~(1 << bit);
 int enter_svm_guest_mode(struct kvm_vcpu *vcpu,
 			 u64 vmcb_gpa, struct vmcb *vmcb12, bool from_vmrun);
-void svm_leave_nested(struct vcpu_svm *svm);
+void svm_leave_nested(struct kvm_vcpu *vcpu);
 void svm_free_nested(struct vcpu_svm *svm);
 int svm_allocate_nested(struct vcpu_svm *svm);
 int nested_svm_vmrun(struct kvm_vcpu *vcpu);

arch/x86/kvm/svm/svm_onhyperv.h+4−8

 	if (npt_enabled &&
 	    ms_hyperv.nested_features & HV_X64_NESTED_ENLIGHTENED_TLB)
 		hve->hv_enlightenments_control.enlightened_npt_tlb = 1;
+	if (ms_hyperv.nested_features & HV_X64_NESTED_MSR_BITMAP)
+		hve->hv_enlightenments_control.msr_bitmap = 1;
 }
 static inline void svm_hv_hardware_setup(void)
 	struct hv_enlightenments *hve =
 		(struct hv_enlightenments *)vmcb->control.reserved_sw;
-	/*
+	if (hve->hv_enlightenments_control.msr_bitmap)
-	 * vmcb can be NULL if called during early vcpu init.
-	 * And its okay not to mark vmcb dirty during vcpu init
-	 * as we mark it dirty unconditionally towards end of vcpu
-	 * init phase.
-	 */
-	if (vmcb_is_clean(vmcb, VMCB_HV_NESTED_ENLIGHTENMENTS) &&
-	    hve->hv_enlightenments_control.msr_bitmap)
 		vmcb_mark_dirty(vmcb, VMCB_HV_NESTED_ENLIGHTENMENTS);
 }

arch/x86/kvm/vmx/capabilities.h+0−1

@@ -54,7 +54,6 @@ struct nested_vmx_msrs { · 53 unmodified lines
54		54
55	struct vmcs_config {	55	struct vmcs_config {
56	int size;	56	int size;
57	int order;
58	u32 basic_cap;	57	u32 basic_cap;
59	u32 revision_id;	58	u32 revision_id;
60	u32 pin_based_exec_ctrl;	59	u32 pin_based_exec_ctrl;

arch/x86/kvm/vmx/evmcs.c+2−2

 DEFINE_STATIC_KEY_FALSE(enable_evmcs);
-#if IS_ENABLED(CONFIG_HYPERV)
 #define EVMCS1_OFFSET(x) offsetof(struct hv_enlightened_vmcs, x)
 #define EVMCS1_FIELD(number, name, clean_field)[ROL16(number, 6)] = \
 		{EVMCS1_OFFSET(name), clean_field}
 };
 const unsigned int nr_evmcs_1_fields = ARRAY_SIZE(vmcs_field_to_evmcs_1);
+#if IS_ENABLED(CONFIG_HYPERV)
 __init void evmcs_sanitize_exec_ctrls(struct vmcs_config *vmcs_conf)
 {
 	vmcs_conf->pin_based_exec_ctrl &= ~EVMCS1_UNSUPPORTED_PINCTRL;
 	case MSR_IA32_VMX_PROCBASED_CTLS2:
 		ctl_high &= ~EVMCS1_UNSUPPORTED_2NDEXEC;
 		break;
+	case MSR_IA32_VMX_TRUE_PINBASED_CTLS:
 	case MSR_IA32_VMX_PINBASED_CTLS:
 		ctl_high &= ~EVMCS1_UNSUPPORTED_PINCTRL;
 		break;

arch/x86/kvm/vmx/evmcs.h+39−9

 	 SECONDARY_EXEC_SHADOW_VMCS |					\
 	 SECONDARY_EXEC_TSC_SCALING |					\
 	 SECONDARY_EXEC_PAUSE_LOOP_EXITING)
-#define EVMCS1_UNSUPPORTED_VMEXIT_CTRL (VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL)
+#define EVMCS1_UNSUPPORTED_VMEXIT_CTRL					\
+	(VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL |				\
+	 VM_EXIT_SAVE_VMX_PREEMPTION_TIMER)
 #define EVMCS1_UNSUPPORTED_VMENTRY_CTRL (VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL)
 #define EVMCS1_UNSUPPORTED_VMFUNC (VMX_VMFUNC_EPTP_SWITCHING)
-#if IS_ENABLED(CONFIG_HYPERV)
 struct evmcs_field {
 	u16 offset;
 	u16 clean_field;
 extern const struct evmcs_field vmcs_field_to_evmcs_1[];
 extern const unsigned int nr_evmcs_1_fields;
-static __always_inline int get_evmcs_offset(unsigned long field,
+static __always_inline int evmcs_field_offset(unsigned long field,
-					    u16 *clean_field)
+					      u16 *clean_field)
 {
 	unsigned int index = ROL16(field, 6);
 	const struct evmcs_field *evmcs_field;
-	if (unlikely(index >= nr_evmcs_1_fields)) {
+	if (unlikely(index >= nr_evmcs_1_fields))
-		WARN_ONCE(1, "KVM: accessing unsupported EVMCS field %lx\n",
-			  field);
 		return -ENOENT;
-	}
 	evmcs_field = &vmcs_field_to_evmcs_1[index];
+	/*
+	 * Use offset=0 to detect holes in eVMCS. This offset belongs to
+	 * 'revision_id' but this field has no encoding and is supposed to
+	 * be accessed directly.
+	 */
+	if (unlikely(!evmcs_field->offset))
+		return -ENOENT;
 	if (clean_field)
 		*clean_field = evmcs_field->clean_field;
 	return evmcs_field->offset;
 }
+static inline u64 evmcs_read_any(struct hv_enlightened_vmcs *evmcs,
+				 unsigned long field, u16 offset)
+{
+	/*
+	 * vmcs12_read_any() doesn't care whether the supplied structure
+	 * is 'struct vmcs12' or 'struct hv_enlightened_vmcs' as it takes
+	 * the exact offset of the required field, use it for convenience
+	 * here.
+	 */
+	return vmcs12_read_any((void *)evmcs, field, offset);
+}
+#if IS_ENABLED(CONFIG_HYPERV)
+static __always_inline int get_evmcs_offset(unsigned long field,
+					    u16 *clean_field)
+{
+	int offset = evmcs_field_offset(field, clean_field);
+	WARN_ONCE(offset < 0, "KVM: accessing unsupported EVMCS field %lx\n",
+		  field);
+	return offset;
+}
 static __always_inline void evmcs_write64(unsigned long field, u64 value)
 {
 	u16 clean_field;

arch/x86/kvm/vmx/nested.c+54−28

 #include <asm/mmu_context.h>
 #include "cpuid.h"
+#include "evmcs.h"
 #include "hyperv.h"
 #include "mmu.h"
 #include "nested.h"
 	struct loaded_vmcs *loaded_vmcs = vmx->loaded_vmcs;
 	/*
-	 * We should allocate a shadow vmcs for vmcs01 only when L1
+	 * KVM allocates a shadow VMCS only when L1 executes VMXON and frees it
-	 * executes VMXON and free it when L1 executes VMXOFF.
+	 * when L1 executes VMXOFF or the vCPU is forced out of nested
-	 * As it is invalid to execute VMXON twice, we shouldn't reach
+	 * operation.  VMXON faults if the CPU is already post-VMXON, so it
-	 * here when vmcs01 already have an allocated shadow vmcs.
+	 * should be impossible to already have an allocated shadow VMCS.  KVM
+	 * doesn't support virtualization of VMCS shadowing, so vmcs01 should
+	 * always be the loaded VMCS.
 	 */
-	WARN_ON(loaded_vmcs == &vmx->vmcs01 && loaded_vmcs->shadow_vmcs);
+	if (WARN_ON(loaded_vmcs != &vmx->vmcs01 || loaded_vmcs->shadow_vmcs))
+		return loaded_vmcs->shadow_vmcs;
+	loaded_vmcs->shadow_vmcs = alloc_vmcs(true);
+	if (loaded_vmcs->shadow_vmcs)
+		vmcs_clear(loaded_vmcs->shadow_vmcs);
-	if (!loaded_vmcs->shadow_vmcs) {
-		loaded_vmcs->shadow_vmcs = alloc_vmcs(true);
-		if (loaded_vmcs->shadow_vmcs)
-			vmcs_clear(loaded_vmcs->shadow_vmcs);
-	}
 	return loaded_vmcs->shadow_vmcs;
 }
 	if (!nested_vmx_check_permission(vcpu))
 		return 1;
-	/*
-	 * In VMX non-root operation, when the VMCS-link pointer is INVALID_GPA,
-	 * any VMREAD sets the ALU flags for VMfailInvalid.
-	 */
-	if (vmx->nested.current_vmptr == INVALID_GPA ||
-	    (is_guest_mode(vcpu) &&
-	     get_vmcs12(vcpu)->vmcs_link_pointer == INVALID_GPA))
-		return nested_vmx_failInvalid(vcpu);
 	/* Decode instruction info and find the field to read */
 	field = kvm_register_read(vcpu, (((instr_info) >> 28) & 0xf));
-	offset = vmcs_field_to_offset(field);
+	if (!evmptr_is_valid(vmx->nested.hv_evmcs_vmptr)) {
-	if (offset < 0)
+		/*
-		return nested_vmx_fail(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
+		 * In VMX non-root operation, when the VMCS-link pointer is INVALID_GPA,
+		 * any VMREAD sets the ALU flags for VMfailInvalid.
+		 */
+		if (vmx->nested.current_vmptr == INVALID_GPA ||
+		    (is_guest_mode(vcpu) &&
+		     get_vmcs12(vcpu)->vmcs_link_pointer == INVALID_GPA))
+			return nested_vmx_failInvalid(vcpu);
-	if (!is_guest_mode(vcpu) && is_vmcs12_ext_field(field))
+		offset = get_vmcs12_field_offset(field);
-		copy_vmcs02_to_vmcs12_rare(vcpu, vmcs12);
+		if (offset < 0)
+			return nested_vmx_fail(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
+		if (!is_guest_mode(vcpu) && is_vmcs12_ext_field(field))
+			copy_vmcs02_to_vmcs12_rare(vcpu, vmcs12);
-	/* Read the field, zero-extended to a u64 value */
+		/* Read the field, zero-extended to a u64 value */
-	value = vmcs12_read_any(vmcs12, field, offset);
+		value = vmcs12_read_any(vmcs12, field, offset);
+	} else {
+		/*
+		 * Hyper-V TLFS (as of 6.0b) explicitly states, that while an
+		 * enlightened VMCS is active VMREAD/VMWRITE instructions are
+		 * unsupported. Unfortunately, certain versions of Windows 11
+		 * don't comply with this requirement which is not enforced in
+		 * genuine Hyper-V. Allow VMREAD from an enlightened VMCS as a
+		 * workaround, as misbehaving guests will panic on VM-Fail.
+		 * Note, enlightened VMCS is incompatible with shadow VMCS so
+		 * all VMREADs from L2 should go to L1.
+		 */
+		if (WARN_ON_ONCE(is_guest_mode(vcpu)))
+			return nested_vmx_failInvalid(vcpu);
+		offset = evmcs_field_offset(field, NULL);
+		if (offset < 0)
+			return nested_vmx_fail(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
+		/* Read the field, zero-extended to a u64 value */
+		value = evmcs_read_any(vmx->nested.hv_evmcs, field, offset);
+	}
 	/*
 	 * Now copy part of this value to register or memory, as requested.
 	field = kvm_register_read(vcpu, (((instr_info) >> 28) & 0xf));
-	offset = vmcs_field_to_offset(field);
+	offset = get_vmcs12_field_offset(field);
 	if (offset < 0)
 		return nested_vmx_fail(vcpu, VMXERR_UNSUPPORTED_VMCS_COMPONENT);
 	max_idx = 0;
 	for (i = 0; i < nr_vmcs12_fields; i++) {
 		/* The vmcs12 table is very, very sparsely populated. */
-		if (!vmcs_field_to_offset_table[i])
+		if (!vmcs12_field_offsets[i])
 			continue;
 		idx = vmcs_field_index(VMCS12_IDX_TO_ENC(i));
 }
 struct kvm_x86_nested_ops vmx_nested_ops = {
+	.leave_nested = vmx_leave_nested,
 	.check_events = vmx_check_nested_events,
 	.hv_timer_pending = nested_vmx_preemption_timer_pending,
 	.triple_fault = nested_vmx_triple_fault,

arch/x86/kvm/vmx/vmcs12.c+2−2

@@ -8,7 +8,7 @@ · 7 unmodified lines
8	FIELD(number, name), \	8	FIELD(number, name), \
9	[ROL16(number##_HIGH, 6)] = VMCS12_OFFSET(name) + sizeof(u32)	9	[ROL16(number##_HIGH, 6)] = VMCS12_OFFSET(name) + sizeof(u32)
10		10
11	const unsigned short vmcs_field_to_offset_table[] = {	11	const unsigned short vmcs12_field_offsets[] = {
12	FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id),	12	FIELD(VIRTUAL_PROCESSOR_ID, virtual_processor_id),
13	FIELD(POSTED_INTR_NV, posted_intr_nv),	13	FIELD(POSTED_INTR_NV, posted_intr_nv),
14	FIELD(GUEST_ES_SELECTOR, guest_es_selector),	14	FIELD(GUEST_ES_SELECTOR, guest_es_selector),
@@ -151,4 +151,4 @@ const unsigned short vmcs_field_to_offset_table[] = { · 136 unmodified lines
151	FIELD(HOST_RSP, host_rsp),	151	FIELD(HOST_RSP, host_rsp),
152	FIELD(HOST_RIP, host_rip),	152	FIELD(HOST_RIP, host_rip),
153	};	153	};
154	const unsigned int nr_vmcs12_fields = ARRAY_SIZE(vmcs_field_to_offset_table);	154	const unsigned int nr_vmcs12_fields = ARRAY_SIZE(vmcs12_field_offsets);

arch/x86/kvm/vmx/vmcs12.h+3−3

@@ -361,10 +361,10 @@ static inline void vmx_check_vmcs12_offsets(void) · 360 unmodified lines
361	CHECK_OFFSET(guest_pml_index, 996);	361	CHECK_OFFSET(guest_pml_index, 996);
362	}	362	}
363		363
364	extern const unsigned short vmcs_field_to_offset_table[];	364	extern const unsigned short vmcs12_field_offsets[];
365	extern const unsigned int nr_vmcs12_fields;	365	extern const unsigned int nr_vmcs12_fields;
366		366
367	static inline short vmcs_field_to_offset(unsigned long field)	367	static inline short get_vmcs12_field_offset(unsigned long field)
368	{	368	{
369	unsigned short offset;	369	unsigned short offset;
370	unsigned int index;	370	unsigned int index;
@@ -377,7 +377,7 @@ static inline short vmcs_field_to_offset(unsigned long field) · 6 unmodified lines
377	return -ENOENT;	377	return -ENOENT;
378		378
379	index = array_index_nospec(index, nr_vmcs12_fields);	379	index = array_index_nospec(index, nr_vmcs12_fields);
380	offset = vmcs_field_to_offset_table[index];	380	offset = vmcs12_field_offsets[index];
381	if (offset == 0)	381	if (offset == 0)
382	return -ENOENT;	382	return -ENOENT;
383	return offset;	383	return offset;

arch/x86/kvm/vmx/vmx.c+38−9

 	return 0;
 }
-static bool vmx_can_emulate_instruction(struct kvm_vcpu *vcpu, void *insn, int insn_len)
+static bool vmx_can_emulate_instruction(struct kvm_vcpu *vcpu, int emul_type,
+					void *insn, int insn_len)
 {
 	/*
 	 * Emulation of instructions in SGX enclaves is impossible as RIP does
-	 * not point  tthe failing instruction, and even if it did, the code
+	 * not point at the failing instruction, and even if it did, the code
 	 * stream is inaccessible.  Inject #UD instead of exiting to userspace
 	 * so that guest userspace can't DoS the guest simply by triggering
 	 * emulation (enclaves are CPL3 only).
 		return -EIO;
 	vmcs_conf->size = vmx_msr_high & 0x1fff;
-	vmcs_conf->order = get_order(vmcs_conf->size);
 	vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff;
 	vmcs_conf->revision_id = vmx_msr_low;
 	struct page *pages;
 	struct vmcs *vmcs;
-	pages = __alloc_pages_node(node, flags, vmcs_config.order);
+	pages = __alloc_pages_node(node, flags, 0);
 	if (!pages)
 		return NULL;
 	vmcs = page_address(pages);
 void free_vmcs(struct vmcs *vmcs)
 {
-	free_pages((unsigned long)vmcs, vmcs_config.order);
+	free_page((unsigned long)vmcs);
 }
 /*
 	vmcs_write32(HOST_IA32_SYSENTER_CS, low32);
 	/*
-	 * If 32-bit syscall is enabled, vmx_vcpu_load_vcms rewrites
+	 * SYSENTER is used for 32-bit system calls on either 32-bit or
-	 * HOST_IA32_SYSENTER_ESP.
+	 * 64-bit kernels.  It is always zero If neither is allowed, otherwise
+	 * vmx_vcpu_load_vmcs loads it with the per-CPU entry stack (and may
+	 * have already done so!).
 	 */
-	vmcs_writel(HOST_IA32_SYSENTER_ESP, 0);
+	if (!IS_ENABLED(CONFIG_IA32_EMULATION) && !IS_ENABLED(CONFIG_X86_32))
+		vmcs_writel(HOST_IA32_SYSENTER_ESP, 0);
 	rdmsrl(MSR_IA32_SYSENTER_EIP, tmpl);
 	vmcs_writel(HOST_IA32_SYSENTER_EIP, tmpl);   /* 22.2.3 */
 		dr6 = vmx_get_exit_qual(vcpu);
 		if (!(vcpu->guest_debug &
 		      (KVM_GUESTDBG_SINGLESTEP | KVM_GUESTDBG_USE_HW_BP))) {
+			/*
+			 * If the #DB was due to ICEBP, a.k.a. INT1, skip the
+			 * instruction.  ICEBP generates a trap-like #DB, but
+			 * despite its interception control being tied to #DB,
+			 * is an instruction intercept, i.e. the VM-Exit occurs
+			 * on the ICEBP itself.  Note, skipping ICEBP also
+			 * clears STI and MOVSS blocking.
+			 *
+			 * For all other #DBs, set vmcs.PENDING_DBG_EXCEPTIONS.BS
+			 * if single-step is enabled in RFLAGS and STI or MOVSS
+			 * blocking is active, as the CPU doesn't set the bit
+			 * on VM-Exit due to #DB interception.  VM-Entry has a
+			 * consistency check that a single-step #DB is pending
+			 * in this scenario as the previous instruction cannot
+			 * have toggled RFLAGS.TF 0=>1 (because STI and POP/MOV
+			 * don't modify RFLAGS), therefore the one instruction
+			 * delay when activating single-step breakpoints must
+			 * have already expired.  Note, the CPU sets/clears BS
+			 * as appropriate for all other VM-Exits types.
+			 */
 			if (is_icebp(intr_info))
 				WARN_ON(!skip_emulated_instruction(vcpu));
+			else if ((vmx_get_rflags(vcpu) & X86_EFLAGS_TF) &&
+				 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) &
+				  (GUEST_INTR_STATE_STI | GUEST_INTR_STATE_MOV_SS)))
+				vmcs_writel(GUEST_PENDING_DBG_EXCEPTIONS,
+					    vmcs_readl(GUEST_PENDING_DBG_EXCEPTIONS) | DR6_BS);
 			kvm_queue_exception_p(vcpu, DB_VECTOR, dr6);
 			return 1;
 {
 	gpa_t gpa;
-	if (!vmx_can_emulate_instruction(vcpu, NULL, 0))
+	if (!vmx_can_emulate_instruction(vcpu, EMULTYPE_PF, NULL, 0))
 		return 1;
 	/*

arch/x86/kvm/x86.c+81−13

 		if (data & ~supported_xss)
 			return 1;
 		vcpu->arch.ia32_xss = data;
+		kvm_update_cpuid_runtime(vcpu);
 		break;
 	case MSR_SMI_COUNT:
 		if (!msr_info->host_initiated)
 	case KVM_CAP_SREGS2:
 	case KVM_CAP_EXIT_ON_EMULATION_FAILURE:
 	case KVM_CAP_VCPU_ATTRIBUTES:
+	case KVM_CAP_SYS_ATTRIBUTES:
 		r = 1;
 		break;
 	case KVM_CAP_EXIT_HYPERCALL:
 		break;
 	}
 	return r;
+}
+static inline void __user *kvm_get_attr_addr(struct kvm_device_attr *attr)
+{
+	void __user *uaddr = (void __user*)(unsigned long)attr->addr;
+	if ((u64)(unsigned long)uaddr != attr->addr)
+		return ERR_PTR(-EFAULT);
+	return uaddr;
+}
+static int kvm_x86_dev_get_attr(struct kvm_device_attr *attr)
+{
+	u64 __user *uaddr = kvm_get_attr_addr(attr);
+	if (attr->group)
+		return -ENXIO;
+	if (IS_ERR(uaddr))
+		return PTR_ERR(uaddr);
+	switch (attr->attr) {
+	case KVM_X86_XCOMP_GUEST_SUPP:
+		if (put_user(supported_xcr0, uaddr))
+			return -EFAULT;
+		return 0;
+	default:
+		return -ENXIO;
+		break;
+	}
+}
+static int kvm_x86_dev_has_attr(struct kvm_device_attr *attr)
+{
+	if (attr->group)
+		return -ENXIO;
+	switch (attr->attr) {
+	case KVM_X86_XCOMP_GUEST_SUPP:
+		return 0;
+	default:
+		return -ENXIO;
+	}
 }
 long kvm_arch_dev_ioctl(struct file *filp,
 	case KVM_GET_SUPPORTED_HV_CPUID:
 		r = kvm_ioctl_get_supported_hv_cpuid(NULL, argp);
 		break;
+	case KVM_GET_DEVICE_ATTR: {
+		struct kvm_device_attr attr;
+		r = -EFAULT;
+		if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
+			break;
+		r = kvm_x86_dev_get_attr(&attr);
+		break;
+	}
+	case KVM_HAS_DEVICE_ATTR: {
+		struct kvm_device_attr attr;
+		r = -EFAULT;
+		if (copy_from_user(&attr, (void __user *)arg, sizeof(attr)))
+			break;
+		r = kvm_x86_dev_has_attr(&attr);
+		break;
+	}
 	default:
 		r = -EINVAL;
 		break;
 		vcpu->arch.apic->sipi_vector = events->sipi_vector;
 	if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
-		if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm)
+		if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
+			kvm_x86_ops.nested_ops->leave_nested(vcpu);
 			kvm_smm_changed(vcpu, events->smi.smm);
+		}
 		vcpu->arch.smi_pending = events->smi.pending;
 static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu,
 				 struct kvm_device_attr *attr)
 {
-	u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
+	u64 __user *uaddr = kvm_get_attr_addr(attr);
 	int r;
-	if ((u64)(unsigned long)uaddr != attr->addr)
+	if (IS_ERR(uaddr))
-		return -EFAULT;
+		return PTR_ERR(uaddr);
 	switch (attr->attr) {
 	case KVM_VCPU_TSC_OFFSET:
 static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu,
 				 struct kvm_device_attr *attr)
 {
-	u64 __user *uaddr = (u64 __user *)(unsigned long)attr->addr;
+	u64 __user *uaddr = kvm_get_attr_addr(attr);
 	struct kvm *kvm = vcpu->kvm;
 	int r;
-	if ((u64)(unsigned long)uaddr != attr->addr)
+	if (IS_ERR(uaddr))
-		return -EFAULT;
+		return PTR_ERR(uaddr);
 	switch (attr->attr) {
 	case KVM_VCPU_TSC_OFFSET: {
 }
 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
+static int kvm_can_emulate_insn(struct kvm_vcpu *vcpu, int emul_type,
+				void *insn, int insn_len)
+{
+	return static_call(kvm_x86_can_emulate_instruction)(vcpu, emul_type,
+							    insn, insn_len);
+}
 int handle_ud(struct kvm_vcpu *vcpu)
 {
 	static const char kvm_emulate_prefix[] = { __KVM_EMULATE_PREFIX };
 	char sig[5]; /* ud2; .ascii "kvm" */
 	struct x86_exception e;
-	if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, NULL, 0)))
+	if (unlikely(!kvm_can_emulate_insn(vcpu, emul_type, NULL, 0)))
 		return 1;
 	if (force_emulation_prefix &&
 	bool writeback = true;
 	bool write_fault_to_spt;
-	if (unlikely(!static_call(kvm_x86_can_emulate_instruction)(vcpu, insn, insn_len)))
+	if (unlikely(!kvm_can_emulate_insn(vcpu, emulation_type, insn, insn_len)))
 		return 1;
 	vcpu->arch.l1tf_flush_l1d = true;
 		kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
 }
-void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
+static void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
 {
 	if (!lapic_in_kernel(vcpu))
 		return;
 		vcpu->arch.msr_misc_features_enables = 0;
-		vcpu->arch.xcr0 = XFEATURE_MASK_FP;
+		__kvm_set_xcr(vcpu, 0, XFEATURE_MASK_FP);
+		__kvm_set_msr(vcpu, MSR_IA32_XSS, 0, true);
 	}
 	/* All GPRs except RDX (handled below) are zeroed on RESET/INIT. */
 	cpuid_0x1 = kvm_find_cpuid_entry(vcpu, 1, 0);
 	kvm_rdx_write(vcpu, cpuid_0x1 ? cpuid_0x1->eax : 0x600);
-	vcpu->arch.ia32_xss = 0;
 	static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
 	kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);

arch/x86/kvm/xen.c+2−8

 				     "\tnotq %0\n"
 				     "\t" LOCK_PREFIX "andq %0, %2\n"
 				     "2:\n"
-				     "\t.section .fixup,\"ax\"\n"
+				     _ASM_EXTABLE_UA(1b, 2b)
-				     "3:\tjmp\t2b\n"
-				     "\t.previous\n"
-				     _ASM_EXTABLE_UA(1b, 3b)
 				     : "=r" (evtchn_pending_sel),
 				       "+m" (vi->evtchn_pending_sel),
 				       "+m" (v->arch.xen.evtchn_pending_sel)
 				     "\tnotl %0\n"
 				     "\t" LOCK_PREFIX "andl %0, %2\n"
 				     "2:\n"
-				     "\t.section .fixup,\"ax\"\n"
+				     _ASM_EXTABLE_UA(1b, 2b)
-				     "3:\tjmp\t2b\n"
-				     "\t.previous\n"
-				     _ASM_EXTABLE_UA(1b, 3b)
 				     : "=r" (evtchn_pending_sel32),
 				       "+m" (vi->evtchn_pending_sel),
 				       "+m" (v->arch.xen.evtchn_pending_sel)

arch/x86/pci/fixup.c+2−2

@@ -353,8 +353,8 @@ static void pci_fixup_video(struct pci_dev *pdev) · 352 unmodified lines
353	}	353	}
354	}	354	}
355	}	355	}
356	DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_ANY_ID, PCI_ANY_ID,	356	DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_ANY_ID, PCI_ANY_ID,
357	PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);	357	PCI_CLASS_DISPLAY_VGA, 8, pci_fixup_video);
358		358
359		359
360	static const struct dmi_system_id msi_k8t_dmi_table[] = {	360	static const struct dmi_system_id msi_k8t_dmi_table[] = {

block/blk-core.c+19−6

 }
 static unsigned long __part_start_io_acct(struct block_device *part,
-					  unsigned int sectors, unsigned int op)
+					  unsigned int sectors, unsigned int op,
+					  unsigned long start_time)
 {
 	const int sgrp = op_stat_group(op);
-	unsigned long now = READ_ONCE(jiffies);
 	part_stat_lock();
-	update_io_ticks(part, now, false);
+	update_io_ticks(part, start_time, false);
 	part_stat_inc(part, ios[sgrp]);
 	part_stat_add(part, sectors[sgrp], sectors);
 	part_stat_local_inc(part, in_flight[op_is_write(op)]);
 	part_stat_unlock();
-	return now;
+	return start_time;
+}
+/**
+ * bio_start_io_acct_time - start I/O accounting for bio based drivers
+ * @bio:	bio to start account for
+ * @start_time:	start time that should be passed back to bio_end_io_acct().
+ */
+void bio_start_io_acct_time(struct bio *bio, unsigned long start_time)
+{
+	__part_start_io_acct(bio->bi_bdev, bio_sectors(bio),
+			     bio_op(bio), start_time);
 }
+EXPORT_SYMBOL_GPL(bio_start_io_acct_time);
 /**
  * bio_start_io_acct - start I/O accounting for bio based drivers
  */
 unsigned long bio_start_io_acct(struct bio *bio)
 {
-	return __part_start_io_acct(bio->bi_bdev, bio_sectors(bio), bio_op(bio));
+	return __part_start_io_acct(bio->bi_bdev, bio_sectors(bio),
+				    bio_op(bio), jiffies);
 }
 EXPORT_SYMBOL_GPL(bio_start_io_acct);
 unsigned long disk_start_io_acct(struct gendisk *disk, unsigned int sectors,
 				 unsigned int op)
 {
-	return __part_start_io_acct(disk->part0, sectors, op);
+	return __part_start_io_acct(disk->part0, sectors, op, jiffies);
 }
 EXPORT_SYMBOL(disk_start_io_acct);

block/blk-ia-ranges.c+1−1

@@ -144,7 +144,7 @@ int disk_register_independent_access_ranges(struct gendisk *disk, · 143 unmodified lines
144	&q->kobj, "%s", "independent_access_ranges");	144	&q->kobj, "%s", "independent_access_ranges");
145	if (ret) {	145	if (ret) {
146	q->ia_ranges = NULL;	146	q->ia_ranges = NULL;
147	kfree(iars);	147	kobject_put(&iars->kobj);
148	return ret;	148	return ret;
149	}	149	}
150		150

block/blk-mq.c+2−0

 	 */
 	blk_mq_run_dispatch_ops(rq->q,
 			ret = blk_mq_request_issue_directly(rq, true));
+	if (ret)
+		blk_account_io_done(rq, ktime_get_ns());
 	return ret;
 }
 EXPORT_SYMBOL_GPL(blk_insert_cloned_request);

drivers/ata/pata_platform.c+2−0

@@ -128,6 +128,8 @@ int __pata_platform_probe(struct device dev, struct resource io_res, · 127 unmodified lines
128	ap = host->ports[0];	128	ap = host->ports[0];
129		129
130	ap->ops = devm_kzalloc(dev, sizeof(*ap->ops), GFP_KERNEL);	130	ap->ops = devm_kzalloc(dev, sizeof(*ap->ops), GFP_KERNEL);
		131	if (!ap->ops)
		132	return -ENOMEM;
131	ap->ops->inherits = &ata_sff_port_ops;	133	ap->ops->inherits = &ata_sff_port_ops;
132	ap->ops->cable_detect = ata_cable_unknown;	134	ap->ops->cable_detect = ata_cable_unknown;
133	ap->ops->set_mode = pata_platform_set_mode;	135	ap->ops->set_mode = pata_platform_set_mode;

drivers/connector/cn_proc.c+1−1

@@ -358,7 +358,7 @@ static void cn_proc_mcast_ctl(struct cn_msg *msg, · 357 unmodified lines
358	* other namespaces.	358	* other namespaces.
359	*/	359	*/
360	if ((current_user_ns() != &init_user_ns) \|\|	360	if ((current_user_ns() != &init_user_ns) \|\|
361	(task_active_pid_ns(current) != &init_pid_ns))	361	!task_is_in_init_pid_ns(current))
362	return;	362	return;
363		363
364	/* Can only change if privileged. */	364	/* Can only change if privileged. */

drivers/counter/counter-core.c+6−9

 	int err;
 	ch = kzalloc(sizeof(*ch) + sizeof_priv, GFP_KERNEL);
-	if (!ch) {
+	if (!ch)
-		err = -ENOMEM;
+		return NULL;
-		goto err_alloc_ch;
-	}
 	counter = &ch->counter;
 	dev = &counter->dev;
 err_ida_alloc:
 	kfree(ch);
-err_alloc_ch:
-	return ERR_PTR(err);
+	return NULL;
 }
 EXPORT_SYMBOL_GPL(counter_alloc);
 	int err;
 	counter = counter_alloc(sizeof_priv);
-	if (IS_ERR(counter))
+	if (!counter)
-		return counter;
+		return NULL;
 	err = devm_add_action_or_reset(dev, devm_counter_put, counter);
 	if (err < 0)
-		return ERR_PTR(err);
+		return NULL;
 	return counter;
 }

drivers/firmware/efi/efi.c+7−0

@@ -722,6 +722,13 @@ void __init efi_systab_report_header(const efi_table_hdr_t *systab_hdr, · 721 unmodified lines
722	systab_hdr->revision >> 16,	722	systab_hdr->revision >> 16,
723	systab_hdr->revision & 0xffff,	723	systab_hdr->revision & 0xffff,
724	vendor);	724	vendor);
		725
		726	if (IS_ENABLED(CONFIG_X86_64) &&
		727	systab_hdr->revision > EFI_1_10_SYSTEM_TABLE_REVISION &&
		728	!strcmp(vendor, "Apple")) {
		729	pr_info("Apple Mac detected, using EFI v1.10 runtime services only\n");
		730	efi.runtime_version = EFI_1_10_SYSTEM_TABLE_REVISION;
		731	}
725	}	732	}
726		733
727	static __initdata char memory_type_name[][13] = {	734	static __initdata char memory_type_name[][13] = {

drivers/firmware/efi/libstub/arm64-stub.c+3−3

@@ -119,9 +119,9 @@ efi_status_t handle_kernel_image(unsigned long *image_addr, · 118 unmodified lines
119	if (image->image_base != _text)	119	if (image->image_base != _text)
120	efi_err("FIRMWARE BUG: efi_loaded_image_t::image_base has bogus value\n");	120	efi_err("FIRMWARE BUG: efi_loaded_image_t::image_base has bogus value\n");
121		121
122	if (!IS_ALIGNED((u64)_text, EFI_KIMG_ALIGN))	122	if (!IS_ALIGNED((u64)_text, SEGMENT_ALIGN))
123	efi_err("FIRMWARE BUG: kernel image not aligned on %ldk boundary\n",	123	efi_err("FIRMWARE BUG: kernel image not aligned on %dk boundary\n",
124	EFI_KIMG_ALIGN >> 10);	124	SEGMENT_ALIGN >> 10);
125		125
126	kernel_size = _edata - _text;	126	kernel_size = _edata - _text;
127	kernel_memsize = kernel_size + (_end - _edata);	127	kernel_memsize = kernel_size + (_end - _edata);

drivers/gpio/gpio-sim.c+1−1

@@ -816,7 +816,7 @@ gpio_sim_make_bank_swnode(struct gpio_sim_bank *bank, · 815 unmodified lines
816		816
817	properties[prop_idx++] = PROPERTY_ENTRY_U32("ngpios", bank->num_lines);	817	properties[prop_idx++] = PROPERTY_ENTRY_U32("ngpios", bank->num_lines);
818		818
819	if (bank->label)	819	if (bank->label && (strlen(bank->label) > 0))
820	properties[prop_idx++] = PROPERTY_ENTRY_STRING("gpio-sim,label",	820	properties[prop_idx++] = PROPERTY_ENTRY_STRING("gpio-sim,label",
821	bank->label);	821	bank->label);
822		822

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+81−0

@@ -1525,6 +1525,87 @@ static const u16 amdgpu_unsupported_pciidlist[] = { · 1524 unmodified lines
1525	0x99A0,	1525	0x99A0,
1526	0x99A2,	1526	0x99A2,
1527	0x99A4,	1527	0x99A4,
		1528	/* radeon secondary ids */
		1529	0x3171,
		1530	0x3e70,
		1531	0x4164,
		1532	0x4165,
		1533	0x4166,
		1534	0x4168,
		1535	0x4170,
		1536	0x4171,
		1537	0x4172,
		1538	0x4173,
		1539	0x496e,
		1540	0x4a69,
		1541	0x4a6a,
		1542	0x4a6b,
		1543	0x4a70,
		1544	0x4a74,
		1545	0x4b69,
		1546	0x4b6b,
		1547	0x4b6c,
		1548	0x4c6e,
		1549	0x4e64,
		1550	0x4e65,
		1551	0x4e66,
		1552	0x4e67,
		1553	0x4e68,
		1554	0x4e69,
		1555	0x4e6a,
		1556	0x4e71,
		1557	0x4f73,
		1558	0x5569,
		1559	0x556b,
		1560	0x556d,
		1561	0x556f,
		1562	0x5571,
		1563	0x5854,
		1564	0x5874,
		1565	0x5940,
		1566	0x5941,
		1567	0x5b72,
		1568	0x5b73,
		1569	0x5b74,
		1570	0x5b75,
		1571	0x5d44,
		1572	0x5d45,
		1573	0x5d6d,
		1574	0x5d6f,
		1575	0x5d72,
		1576	0x5d77,
		1577	0x5e6b,
		1578	0x5e6d,
		1579	0x7120,
		1580	0x7124,
		1581	0x7129,
		1582	0x712e,
		1583	0x712f,
		1584	0x7162,
		1585	0x7163,
		1586	0x7166,
		1587	0x7167,
		1588	0x7172,
		1589	0x7173,
		1590	0x71a0,
		1591	0x71a1,
		1592	0x71a3,
		1593	0x71a7,
		1594	0x71bb,
		1595	0x71e0,
		1596	0x71e1,
		1597	0x71e2,
		1598	0x71e6,
		1599	0x71e7,
		1600	0x71f2,
		1601	0x7269,
		1602	0x726b,
		1603	0x726e,
		1604	0x72a0,
		1605	0x72a8,
		1606	0x72b1,
		1607	0x72b3,
		1608	0x793f,
1528	};	1609	};
1529		1610
1530	static const struct pci_device_id pciidlist[] = {	1611	static const struct pci_device_id pciidlist[] = {

drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c+2−2

 	kfree(surface_type);
 free_tiling_mode:
 	kfree(tiling_mode);
-free_yclk:
-	kfree(yclk);
 free_sclk:
 	kfree(sclk);
+free_yclk:
+	kfree(yclk);
 }
 /*******************************************************************************

drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c+0−1

@@ -503,7 +503,6 @@ static void dcn_bw_calc_rq_dlg_ttu( · 502 unmodified lines
503	//input[in_idx].dout.output_standard;	503	//input[in_idx].dout.output_standard;
504		504
505	/todo: soc->sr_enter_plus_exit_time??/	505	/todo: soc->sr_enter_plus_exit_time??/
506	dlg_sys_param->t_srx_delay_us = dc->dcn_ip->dcfclk_cstate_latency / v->dcf_clk_deep_sleep;
507		506
508	dml1_rq_dlg_get_rq_params(dml, rq_param, &input->pipe.src);	507	dml1_rq_dlg_get_rq_params(dml, rq_param, &input->pipe.src);
509	dml1_extract_rq_regs(dml, rq_regs, rq_param);	508	dml1_extract_rq_regs(dml, rq_regs, rq_param);

drivers/gpu/drm/amd/display/dc/core/dc.c+27−13

 				status->timing_sync_info.master = false;
 		}
-		/* remove any other unblanked pipes as they have already been synced */
-		for (j = j + 1; j < group_size; j++) {
-			bool is_blanked;
-			if (pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked)
+		/* remove any other pipes that are already been synced */
-				is_blanked =
+		if (dc->config.use_pipe_ctx_sync_logic) {
-					pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked(pipe_set[j]->stream_res.opp);
+			/* check pipe's syncd to decide which pipe to be removed */
-			else
+			for (j = 1; j < group_size; j++) {
-				is_blanked =
+				if (pipe_set[j]->pipe_idx_syncd == pipe_set[0]->pipe_idx_syncd) {
-					pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg);
+					group_size--;
-			if (!is_blanked) {
+					pipe_set[j] = pipe_set[group_size];
-				group_size--;
+					j--;
-				pipe_set[j] = pipe_set[group_size];
+				} else
-				j--;
+					/* link slave pipe's syncd with master pipe */
+					pipe_set[j]->pipe_idx_syncd = pipe_set[0]->pipe_idx_syncd;
+			}
+		} else {
+			for (j = j + 1; j < group_size; j++) {
+				bool is_blanked;
+				if (pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked)
+					is_blanked =
+						pipe_set[j]->stream_res.opp->funcs->dpg_is_blanked(pipe_set[j]->stream_res.opp);
+				else
+					is_blanked =
+						pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg);
+				if (!is_blanked) {
+					group_size--;
+					pipe_set[j] = pipe_set[group_size];
+					j--;
+				}
 			}
 		}

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+3−3

@@ -202,7 +202,7 @@ void dp_wait_for_training_aux_rd_interval( · 201 unmodified lines
202	uint32_t wait_in_micro_secs)	202	uint32_t wait_in_micro_secs)
203	{	203	{
204	#if defined(CONFIG_DRM_AMD_DC_DCN)	204	#if defined(CONFIG_DRM_AMD_DC_DCN)
205	if (wait_in_micro_secs > 16000)	205	if (wait_in_micro_secs > 1000)
206	msleep(wait_in_micro_secs/1000);	206	msleep(wait_in_micro_secs/1000);
207	else	207	else
208	udelay(wait_in_micro_secs);	208	udelay(wait_in_micro_secs);
@@ -6935,7 +6935,7 @@ bool dpcd_write_128b_132b_sst_payload_allocation_table( · 6726 unmodified lines
6935	}	6935	}
6936	}	6936	}
6937	retries++;	6937	retries++;
6938	udelay(5000);	6938	msleep(5);
6939	}	6939	}
6940		6940
6941	if (!result && retries == max_retries) {	6941	if (!result && retries == max_retries) {
@@ -6987,7 +6987,7 @@ bool dpcd_poll_for_allocation_change_trigger(struct dc_link *link) · 45 unmodified lines
6987	break;	6987	break;
6988	}	6988	}
6989		6989
6990	udelay(5000);	6990	msleep(5);
6991	}	6991	}
6992		6992
6993	if (result == ACT_FAILED) {	6993	if (result == ACT_FAILED) {

drivers/gpu/drm/amd/display/dc/core/dc_resource.c+54−0

@@ -3217,6 +3217,60 @@ struct hpo_dp_link_encoder *resource_get_hpo_dp_link_enc_for_det_lt( · 3216 unmodified lines
3217	}	3217	}
3218	#endif	3218	#endif
3219		3219
		3220	void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
		3221	struct dc_state *context)
		3222	{
		3223	int i, j;
		3224	struct pipe_ctx pipe_ctx_old, pipe_ctx, *pipe_ctx_syncd;
		3225
		3226	/* If pipe backend is reset, need to reset pipe syncd status */
		3227	for (i = 0; i < dc->res_pool->pipe_count; i++) {
		3228	pipe_ctx_old = &dc->current_state->res_ctx.pipe_ctx[i];
		3229	pipe_ctx = &context->res_ctx.pipe_ctx[i];
		3230
		3231	if (!pipe_ctx_old->stream)
		3232	continue;
		3233
		3234	if (pipe_ctx_old->top_pipe \|\| pipe_ctx_old->prev_odm_pipe)
		3235	continue;
		3236
		3237	if (!pipe_ctx->stream \|\|
		3238	pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {
		3239
		3240	/* Reset all the syncd pipes from the disabled pipe */
		3241	for (j = 0; j < dc->res_pool->pipe_count; j++) {
		3242	pipe_ctx_syncd = &context->res_ctx.pipe_ctx[j];
		3243	if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx_syncd) == pipe_ctx_old->pipe_idx) \|\|
		3244	!IS_PIPE_SYNCD_VALID(pipe_ctx_syncd))
		3245	SET_PIPE_SYNCD_TO_PIPE(pipe_ctx_syncd, j);
		3246	}
		3247	}
		3248	}
		3249	}
		3250
		3251	void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
		3252	struct dc_state *context,
		3253	uint8_t disabled_master_pipe_idx)
		3254	{
		3255	int i;
		3256	struct pipe_ctx pipe_ctx, pipe_ctx_check;
		3257
		3258	pipe_ctx = &context->res_ctx.pipe_ctx[disabled_master_pipe_idx];
		3259	if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx) != disabled_master_pipe_idx) \|\|
		3260	!IS_PIPE_SYNCD_VALID(pipe_ctx))
		3261	SET_PIPE_SYNCD_TO_PIPE(pipe_ctx, disabled_master_pipe_idx);
		3262
		3263	/* for the pipe disabled, check if any slave pipe exists and assert */
		3264	for (i = 0; i < dc->res_pool->pipe_count; i++) {
		3265	pipe_ctx_check = &context->res_ctx.pipe_ctx[i];
		3266
		3267	if ((GET_PIPE_SYNCD_FROM_PIPE(pipe_ctx_check) == disabled_master_pipe_idx) &&
		3268	IS_PIPE_SYNCD_VALID(pipe_ctx_check) && (i != disabled_master_pipe_idx))
		3269	DC_ERR("DC: Failure: pipe_idx[%d] syncd with disabled master pipe_idx[%d]\n",
		3270	i, disabled_master_pipe_idx);
		3271	}
		3272	}
		3273
3220	uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter)	3274	uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter)
3221	{	3275	{
3222	/* TODO - get transmitter to phy idx mapping from DMUB */	3276	/* TODO - get transmitter to phy idx mapping from DMUB */

drivers/gpu/drm/amd/display/dc/dc.h+1−0

@@ -344,6 +344,7 @@ struct dc_config { · 343 unmodified lines
344	uint8_t vblank_alignment_max_frame_time_diff;	344	uint8_t vblank_alignment_max_frame_time_diff;
345	bool is_asymmetric_memory;	345	bool is_asymmetric_memory;
346	bool is_single_rank_dimm;	346	bool is_single_rank_dimm;
		347	bool use_pipe_ctx_sync_logic;
347	};	348	};
348		349
349	enum visual_confirm {	350	enum visual_confirm {

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c+9−1

 				&pipe_ctx->stream->audio_info);
 	}
+	/* make sure no pipes syncd to the pipe being enabled */
+	if (!pipe_ctx->stream->apply_seamless_boot_optimization && dc->config.use_pipe_ctx_sync_logic)
+		check_syncd_pipes_for_disabled_master_pipe(dc, context, pipe_ctx->pipe_idx);
 #if defined(CONFIG_DRM_AMD_DC_DCN)
 	/* DCN3.1 FPGA Workaround
 	 * Need to enable HPO DP Stream Encoder before setting OTG master enable.
 			pipe_ctx->stream_res.stream_enc,
 			pipe_ctx->stream_res.tg->inst);
-	if (dc_is_dp_signal(pipe_ctx->stream->signal) &&
+	if (dc_is_embedded_signal(pipe_ctx->stream->signal) &&
 		pipe_ctx->stream_res.stream_enc->funcs->reset_fifo)
 		pipe_ctx->stream_res.stream_enc->funcs->reset_fifo(
 			pipe_ctx->stream_res.stream_enc);
 	enum dc_status status;
 	int i;
+	/* reset syncd pipes from disabled pipes */
+	if (dc->config.use_pipe_ctx_sync_logic)
+		reset_syncd_pipes_from_disabled_pipes(dc, context);
 	/* Reset old context */
 	/* look up the targets that have been removed since last commit */
 	hws->funcs.reset_hw_ctx_wrap(dc, context);

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c+2−2

 	dc->res_pool->funcs->update_soc_for_wm_a(dc, context);
 	pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, fast_validate);
-	DC_FP_START();
 	if (!pipe_cnt) {
 		out = true;
 		goto validate_out;
 	out = false;
 validate_out:
-	DC_FP_END();
 	return out;
 }
 	BW_VAL_TRACE_COUNT();
+	DC_FP_START();
 	out = dcn30_internal_validate_bw(dc, context, pipes, &pipe_cnt, &vlevel, fast_validate);
+	DC_FP_END();
 	if (pipe_cnt == 0)
 		goto validate_out;

drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c+12−1

 	.disable_clock_gate = true,
 	.disable_pplib_clock_request = true,
 	.disable_pplib_wm_range = true,
-	.pipe_split_policy = MPC_SPLIT_DYNAMIC,
+	.pipe_split_policy = MPC_SPLIT_AVOID,
 	.force_single_disp_pipe_split = false,
 	.disable_dcc = DCC_ENABLE,
 	.vsr_support = true,
 	pp_smu->nv_funcs.set_wm_ranges(&pp_smu->nv_funcs.pp_smu, &ranges);
 }
+static void dcn301_calculate_wm_and_dlg(
+		struct dc *dc, struct dc_state *context,
+		display_e2e_pipe_params_st *pipes,
+		int pipe_cnt,
+		int vlevel)
+{
+	DC_FP_START();
+	dcn301_calculate_wm_and_dlg_fp(dc, context, pipes, pipe_cnt, vlevel);
+	DC_FP_END();
+}
 static struct resource_funcs dcn301_res_pool_funcs = {
 	.destroy = dcn301_destroy_resource_pool,
 	.link_enc_create = dcn301_link_encoder_create,

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c+3−0

@@ -2260,6 +2260,9 @@ static bool dcn31_resource_construct( · 2259 unmodified lines
2260	dc->caps.color.mpc.ogam_rom_caps.hlg = 0;	2260	dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
2261	dc->caps.color.mpc.ocsc = 1;	2261	dc->caps.color.mpc.ocsc = 1;
2262		2262
		2263	/* Use pipe context based otg sync logic */
		2264	dc->config.use_pipe_ctx_sync_logic = true;
		2265
2263	/* read VBIOS LTTPR caps */	2266	/* read VBIOS LTTPR caps */
2264	{	2267	{
2265	if (ctx->dc_bios->funcs->get_lttpr_caps) {	2268	if (ctx->dc_bios->funcs->get_lttpr_caps) {

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c+0−2

@@ -1576,8 +1576,6 @@ void dml20_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, · 1575 unmodified lines
1576	dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,	1576	dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
1577	e2e_pipe_param,	1577	e2e_pipe_param,
1578	num_pipes);	1578	num_pipes);
1579	dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
1580	/ dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
1581		1579
1582	print__dlg_sys_params_st(mode_lib, &dlg_sys_param);	1580	print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
1583		1581

drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c+0−2

@@ -1577,8 +1577,6 @@ void dml20v2_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, · 1576 unmodified lines
1577	dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,	1577	dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
1578	e2e_pipe_param,	1578	e2e_pipe_param,
1579	num_pipes);	1579	num_pipes);
1580	dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
1581	/ dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
1582		1580
1583	print__dlg_sys_params_st(mode_lib, &dlg_sys_param);	1581	print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
1584		1582

drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c+0−2

@@ -1688,8 +1688,6 @@ void dml21_rq_dlg_get_dlg_reg( · 1687 unmodified lines
1688	mode_lib,	1688	mode_lib,
1689	e2e_pipe_param,	1689	e2e_pipe_param,
1690	num_pipes);	1690	num_pipes);
1691	dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
1692	/ dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
1693		1691
1694	print__dlg_sys_params_st(mode_lib, &dlg_sys_param);	1692	print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
1695		1693

drivers/gpu/drm/amd/display/dc/dml/dcn30/display_rq_dlg_calc_30.c+0−2

@@ -1858,8 +1858,6 @@ void dml30_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, · 1857 unmodified lines
1858	dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,	1858	dlg_sys_param.total_flip_bytes = get_total_immediate_flip_bytes(mode_lib,
1859	e2e_pipe_param,	1859	e2e_pipe_param,
1860	num_pipes);	1860	num_pipes);
1861	dlg_sys_param.t_srx_delay_us = mode_lib->ip.dcfclk_cstate_latency
1862	/ dlg_sys_param.deepsleep_dcfclk_mhz; // TODO: Deprecated
1863		1861
1864	print__dlg_sys_params_st(mode_lib, &dlg_sys_param);	1862	print__dlg_sys_params_st(mode_lib, &dlg_sys_param);
1865		1863

drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.c+1−1

@@ -327,7 +327,7 @@ void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info) · 326 unmodified lines
327	dcn3_01_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10;	327	dcn3_01_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10;
328	}	328	}
329		329
330	void dcn301_calculate_wm_and_dlg(struct dc *dc,	330	void dcn301_calculate_wm_and_dlg_fp(struct dc *dc,
331	struct dc_state *context,	331	struct dc_state *context,
332	display_e2e_pipe_params_st *pipes,	332	display_e2e_pipe_params_st *pipes,
333	int pipe_cnt,	333	int pipe_cnt,

drivers/gpu/drm/amd/display/dc/dml/dcn301/dcn301_fpu.h+1−1

@@ -34,7 +34,7 @@ void dcn301_fpu_set_wm_ranges(int i, · 33 unmodified lines
34		34
35	void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info);	35	void dcn301_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info);
36		36
37	void dcn301_calculate_wm_and_dlg(struct dc *dc,	37	void dcn301_calculate_wm_and_dlg_fp(struct dc *dc,
38	struct dc_state *context,	38	struct dc_state *context,
39	display_e2e_pipe_params_st *pipes,	39	display_e2e_pipe_params_st *pipes,
40	int pipe_cnt,	40	int pipe_cnt,

drivers/gpu/drm/amd/display/dc/dml/display_mode_structs.h+0−1

@@ -546,7 +546,6 @@ struct _vcs_dpi_display_dlg_sys_params_st { · 545 unmodified lines
546	double t_sr_wm_us;	546	double t_sr_wm_us;
547	double t_extra_us;	547	double t_extra_us;
548	double mem_trip_us;	548	double mem_trip_us;
549	double t_srx_delay_us;
550	double deepsleep_dcfclk_mhz;	549	double deepsleep_dcfclk_mhz;
551	double total_flip_bw;	550	double total_flip_bw;
552	unsigned int total_flip_bytes;	551	unsigned int total_flip_bytes;

drivers/gpu/drm/amd/display/dc/dml/display_rq_dlg_helpers.c+0−3

 	dml_print("DML_RQ_DLG_CALC:    t_urg_wm_us          = %3.2f\n", dlg_sys_param->t_urg_wm_us);
 	dml_print("DML_RQ_DLG_CALC:    t_sr_wm_us           = %3.2f\n", dlg_sys_param->t_sr_wm_us);
 	dml_print("DML_RQ_DLG_CALC:    t_extra_us           = %3.2f\n", dlg_sys_param->t_extra_us);
-	dml_print(
-			"DML_RQ_DLG_CALC:    t_srx_delay_us       = %3.2f\n",
-			dlg_sys_param->t_srx_delay_us);
 	dml_print(
 			"DML_RQ_DLG_CALC:    deepsleep_dcfclk_mhz = %3.2f\n",
 			dlg_sys_param->deepsleep_dcfclk_mhz);

drivers/gpu/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c+0−4

 	if (dual_plane)
 		DTRACE("DLG: %s: swath_height_c     = %d", __func__, swath_height_c);
-	DTRACE(
-			"DLG: %s: t_srx_delay_us     = %3.2f",
-			__func__,
-			(double) dlg_sys_param->t_srx_delay_us);
 	DTRACE("DLG: %s: line_time_in_us    = %3.2f", __func__, (double) line_time_in_us);
 	DTRACE("DLG: %s: vupdate_offset     = %d", __func__, vupdate_offset);
 	DTRACE("DLG: %s: vupdate_width      = %d", __func__, vupdate_width);

drivers/gpu/drm/amd/display/dc/inc/core_types.h+1−0

@@ -382,6 +382,7 @@ struct pipe_ctx { · 381 unmodified lines
382	struct pll_settings pll_settings;	382	struct pll_settings pll_settings;
383		383
384	uint8_t pipe_idx;	384	uint8_t pipe_idx;
		385	uint8_t pipe_idx_syncd;
385		386
386	struct pipe_ctx *top_pipe;	387	struct pipe_ctx *top_pipe;
387	struct pipe_ctx *bottom_pipe;	388	struct pipe_ctx *bottom_pipe;

drivers/gpu/drm/amd/display/dc/inc/resource.h+11−0

 #define MEMORY_TYPE_HBM 2
+#define IS_PIPE_SYNCD_VALID(pipe) ((((pipe)->pipe_idx_syncd) & 0x80)?1:0)
+#define GET_PIPE_SYNCD_FROM_PIPE(pipe) ((pipe)->pipe_idx_syncd & 0x7F)
+#define SET_PIPE_SYNCD_TO_PIPE(pipe, pipe_syncd) ((pipe)->pipe_idx_syncd = (0x80 | pipe_syncd))
 enum dce_version resource_parse_asic_id(
 		struct hw_asic_id asic_id);
 		const struct dc_link *link);
 #endif
+void reset_syncd_pipes_from_disabled_pipes(struct dc *dc,
+	struct dc_state *context);
+void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc,
+	struct dc_state *context,
+	uint8_t disabled_master_pipe_idx);
 uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter);
 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */

drivers/gpu/drm/ast/ast_tables.h+0−2

@@ -282,8 +282,6 @@ static const struct ast_vbios_enhtable res_1360x768[] = { · 281 unmodified lines
282	};	282	};
283		283
284	static const struct ast_vbios_enhtable res_1600x900[] = {	284	static const struct ast_vbios_enhtable res_1600x900[] = {
285	{1800, 1600, 24, 80, 1000, 900, 1, 3, VCLK108, /* 60Hz */
286	(SyncPP \| Charx8Dot \| LineCompareOff \| WideScreenMode \| NewModeInfo), 60, 3, 0x3A },
287	{1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */	285	{1760, 1600, 48, 32, 926, 900, 3, 5, VCLK97_75, /* 60Hz CVT RB */
288	(SyncNP \| Charx8Dot \| LineCompareOff \| WideScreenMode \| NewModeInfo \|	286	(SyncNP \| Charx8Dot \| LineCompareOff \| WideScreenMode \| NewModeInfo \|
289	AST2500PreCatchCRT), 60, 1, 0x3A },	287	AST2500PreCatchCRT), 60, 1, 0x3A },

drivers/gpu/drm/drm_atomic.c+8−4

 	drm_dbg_atomic(dev, "checking %p\n", state);
-	for_each_new_crtc_in_state(state, crtc, new_crtc_state, i)
+	for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
-		requested_crtc |= drm_crtc_mask(crtc);
+		if (new_crtc_state->enable)
+			requested_crtc |= drm_crtc_mask(crtc);
+	}
 	for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {
 		ret = drm_atomic_plane_check(old_plane_state, new_plane_state);
 		}
 	}
-	for_each_new_crtc_in_state(state, crtc, new_crtc_state, i)
+	for_each_new_crtc_in_state(state, crtc, new_crtc_state, i) {
-		affected_crtc |= drm_crtc_mask(crtc);
+		if (new_crtc_state->enable)
+			affected_crtc |= drm_crtc_mask(crtc);
+	}
 	/*
 	 * For commits that allow modesets drivers can add other CRTCs to the

drivers/gpu/drm/drm_panel_orientation_quirks.c+12−0

 	.orientation = DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
 };
+static const struct drm_dmi_panel_orientation_data lcd1600x2560_leftside_up = {
+	.width = 1600,
+	.height = 2560,
+	.orientation = DRM_MODE_PANEL_ORIENTATION_LEFT_UP,
+};
 static const struct dmi_system_id orientation_data[] = {
 	{	/* Acer One 10 (S1003) */
 		.matches = {
 		  DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Default string"),
 		},
 		.driver_data = (void *)&onegx1_pro,
+	}, {	/* OneXPlayer */
+		.matches = {
+		  DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ONE-NETBOOK TECHNOLOGY CO., LTD."),
+		  DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "ONE XPLAYER"),
+		},
+		.driver_data = (void *)&lcd1600x2560_leftside_up,
 	}, {	/* Samsung GalaxyBook 10.6 */
 		.matches = {
 		  DMI_EXACT_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."),

drivers/gpu/drm/drm_privacy_screen_x86.c+3−0

@@ -33,6 +33,9 @@ static bool __init detect_thinkpad_privacy_screen(void) · 32 unmodified lines
33	unsigned long long output;	33	unsigned long long output;
34	acpi_status status;	34	acpi_status status;
35		35
		36	if (acpi_disabled)
		37	return false;
		38
36	/* Get embedded-controller handle */	39	/* Get embedded-controller handle */
37	status = acpi_get_devices("PNP0C09", acpi_set_handle, NULL, &ec_handle);	40	status = acpi_get_devices("PNP0C09", acpi_set_handle, NULL, &ec_handle);
38	if (ACPI_FAILURE(status) \|\| !ec_handle)	41	if (ACPI_FAILURE(status) \|\| !ec_handle)

drivers/gpu/drm/etnaviv/etnaviv_gem_submit.c+2−2

@@ -469,8 +469,8 @@ int etnaviv_ioctl_gem_submit(struct drm_device dev, void data, · 468 unmodified lines
469	return -EINVAL;	469	return -EINVAL;
470	}	470	}
471		471
472	if (args->stream_size > SZ_64K \|\| args->nr_relocs > SZ_64K \|\|	472	if (args->stream_size > SZ_128K \|\| args->nr_relocs > SZ_128K \|\|
473	args->nr_bos > SZ_64K \|\| args->nr_pmrs > 128) {	473	args->nr_bos > SZ_128K \|\| args->nr_pmrs > 128) {
474	DRM_ERROR("submit arguments out of size limits\n");	474	DRM_ERROR("submit arguments out of size limits\n");
475	return -EINVAL;	475	return -EINVAL;
476	}	476	}

drivers/gpu/drm/i915/gem/i915_gem_object_types.h+1−0

@@ -311,6 +311,7 @@ struct drm_i915_gem_object { · 310 unmodified lines
311	#define I915_BO_READONLY BIT(6)	311	#define I915_BO_READONLY BIT(6)
312	#define I915_TILING_QUIRK_BIT 7 /* unknown swizzling; do not release! */	312	#define I915_TILING_QUIRK_BIT 7 /* unknown swizzling; do not release! */
313	#define I915_BO_PROTECTED BIT(8)	313	#define I915_BO_PROTECTED BIT(8)
		314	#define I915_BO_WAS_BOUND_BIT 9
314	/**	315	/**
315	* @mem_flags - Mutable placement-related flags	316	* @mem_flags - Mutable placement-related flags
316	*	317	*

drivers/gpu/drm/i915/gem/i915_gem_pages.c+10−0

 #include "i915_gem_lmem.h"
 #include "i915_gem_mman.h"
+#include "gt/intel_gt.h"
 void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
 				 struct sg_table *pages,
 				 unsigned int sg_page_sizes)
 	__i915_gem_object_reset_page_iter(obj);
 	obj->mm.page_sizes.phys = obj->mm.page_sizes.sg = 0;
+	if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, &obj->flags)) {
+		struct drm_i915_private *i915 = to_i915(obj->base.dev);
+		intel_wakeref_t wakeref;
+		with_intel_runtime_pm_if_active(&i915->runtime_pm, wakeref)
+			intel_gt_invalidate_tlbs(to_gt(i915));
+	}
 	return pages;
 }

drivers/gpu/drm/i915/gt/intel_gt.c+108−0

@@ -29,6 +29,8 @@ void __intel_gt_init_early(struct intel_gt gt, struct drm_i915_private i915) · 28 unmodified lines
29	{	29	{
30	spin_lock_init(&gt->irq_lock);	30	spin_lock_init(&gt->irq_lock);
31		31
		32	mutex_init(&gt->tlb_invalidate_lock);
		33
32	INIT_LIST_HEAD(&gt->closed_vma);	34	INIT_LIST_HEAD(&gt->closed_vma);
33	spin_lock_init(&gt->closed_lock);	35	spin_lock_init(&gt->closed_lock);
34		36
@@ -912,3 +914,109 @@ void intel_gt_info_print(const struct intel_gt_info *info, · 877 unmodified lines
912		914
913	intel_sseu_dump(&info->sseu, p);	915	intel_sseu_dump(&info->sseu, p);
914	}	916	}
		917
		918	struct reg_and_bit {
		919	i915_reg_t reg;
		920	u32 bit;
		921	};
		922
		923	static struct reg_and_bit
		924	get_reg_and_bit(const struct intel_engine_cs *engine, const bool gen8,
		925	const i915_reg_t *regs, const unsigned int num)
		926	{
		927	const unsigned int class = engine->class;
		928	struct reg_and_bit rb = { };
		929
		930	if (drm_WARN_ON_ONCE(&engine->i915->drm,
		931	class >= num \|\| !regs[class].reg))
		932	return rb;
		933
		934	rb.reg = regs[class];
		935	if (gen8 && class == VIDEO_DECODE_CLASS)
		936	rb.reg.reg += 4 * engine->instance; /* GEN8_M2TCR */
		937	else
		938	rb.bit = engine->instance;
		939
		940	rb.bit = BIT(rb.bit);
		941
		942	return rb;
		943	}
		944
		945	void intel_gt_invalidate_tlbs(struct intel_gt *gt)
		946	{
		947	static const i915_reg_t gen8_regs[] = {
		948	[RENDER_CLASS] = GEN8_RTCR,
		949	[VIDEO_DECODE_CLASS] = GEN8_M1TCR, /* , GEN8_M2TCR */
		950	[VIDEO_ENHANCEMENT_CLASS] = GEN8_VTCR,
		951	[COPY_ENGINE_CLASS] = GEN8_BTCR,
		952	};
		953	static const i915_reg_t gen12_regs[] = {
		954	[RENDER_CLASS] = GEN12_GFX_TLB_INV_CR,
		955	[VIDEO_DECODE_CLASS] = GEN12_VD_TLB_INV_CR,
		956	[VIDEO_ENHANCEMENT_CLASS] = GEN12_VE_TLB_INV_CR,
		957	[COPY_ENGINE_CLASS] = GEN12_BLT_TLB_INV_CR,
		958	};
		959	struct drm_i915_private *i915 = gt->i915;
		960	struct intel_uncore *uncore = gt->uncore;
		961	struct intel_engine_cs *engine;
		962	enum intel_engine_id id;
		963	const i915_reg_t *regs;
		964	unsigned int num = 0;
		965
		966	if (I915_SELFTEST_ONLY(gt->awake == -ENODEV))
		967	return;
		968
		969	if (GRAPHICS_VER(i915) == 12) {
		970	regs = gen12_regs;
		971	num = ARRAY_SIZE(gen12_regs);
		972	} else if (GRAPHICS_VER(i915) >= 8 && GRAPHICS_VER(i915) <= 11) {
		973	regs = gen8_regs;
		974	num = ARRAY_SIZE(gen8_regs);
		975	} else if (GRAPHICS_VER(i915) < 8) {
		976	return;
		977	}
		978
		979	if (drm_WARN_ONCE(&i915->drm, !num,
		980	"Platform does not implement TLB invalidation!"))
		981	return;
		982
		983	GEM_TRACE("\n");
		984
		985	assert_rpm_wakelock_held(&i915->runtime_pm);
		986
		987	mutex_lock(&gt->tlb_invalidate_lock);
		988	intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
		989
		990	for_each_engine(engine, gt, id) {
		991	/*
		992	* HW architecture suggest typical invalidation time at 40us,
		993	* with pessimistic cases up to 100us and a recommendation to
		994	* cap at 1ms. We go a bit higher just in case.
		995	*/
		996	const unsigned int timeout_us = 100;
		997	const unsigned int timeout_ms = 4;
		998	struct reg_and_bit rb;
		999
		1000	rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num);
		1001	if (!i915_mmio_reg_offset(rb.reg))
		1002	continue;
		1003
		1004	intel_uncore_write_fw(uncore, rb.reg, rb.bit);
		1005	if (__intel_wait_for_register_fw(uncore,
		1006	rb.reg, rb.bit, 0,
		1007	timeout_us, timeout_ms,
		1008	NULL))
		1009	drm_err_ratelimited(&gt->i915->drm,
		1010	"%s TLB invalidation did not complete in %ums!\n",
		1011	engine->name, timeout_ms);
		1012	}
		1013
		1014	/*
		1015	* Use delayed put since a) we mostly expect a flurry of TLB
		1016	* invalidations so it is good to avoid paying the forcewake cost and
		1017	* b) it works around a bug in Icelake which cannot cope with too rapid
		1018	* transitions.
		1019	*/
		1020	intel_uncore_forcewake_put_delayed(uncore, FORCEWAKE_ALL);
		1021	mutex_unlock(&gt->tlb_invalidate_lock);
		1022	}

drivers/gpu/drm/i915/gt/intel_gt.h+2−0

@@ -91,4 +91,6 @@ void intel_gt_info_print(const struct intel_gt_info *info, · 90 unmodified lines
91		91
92	void intel_gt_watchdog_work(struct work_struct *work);	92	void intel_gt_watchdog_work(struct work_struct *work);
93		93
		94	void intel_gt_invalidate_tlbs(struct intel_gt *gt);
		95
94	#endif /* __INTEL_GT_H__ */	96	#endif /* __INTEL_GT_H__ */

drivers/gpu/drm/i915/gt/intel_gt_types.h+2−0

@@ -73,6 +73,8 @@ struct intel_gt { · 72 unmodified lines
73		73
74	struct intel_uc uc;	74	struct intel_uc uc;
75		75
		76	struct mutex tlb_invalidate_lock;
		77
76	struct i915_wa_list wa_list;	78	struct i915_wa_list wa_list;
77		79
78	struct intel_gt_timelines {	80	struct intel_gt_timelines {

drivers/gpu/drm/i915/i915_reg.h+11−0

 #define   GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING	(1 << 28)
 #define   GAMT_CHKN_DISABLE_I2M_CYCLE_ON_WR_PORT	(1 << 24)
+#define GEN8_RTCR	_MMIO(0x4260)
+#define GEN8_M1TCR	_MMIO(0x4264)
+#define GEN8_M2TCR	_MMIO(0x4268)
+#define GEN8_BTCR	_MMIO(0x426c)
+#define GEN8_VTCR	_MMIO(0x4270)
 #if 0
 #define PRB0_TAIL	_MMIO(0x2030)
 #define PRB0_HEAD	_MMIO(0x2034)
 #define   FAULT_VA_HIGH_BITS		(0xf << 0)
 #define   FAULT_GTT_SEL			(1 << 4)
+#define GEN12_GFX_TLB_INV_CR	_MMIO(0xced8)
+#define GEN12_VD_TLB_INV_CR	_MMIO(0xcedc)
+#define GEN12_VE_TLB_INV_CR	_MMIO(0xcee0)
+#define GEN12_BLT_TLB_INV_CR	_MMIO(0xcee4)
 #define GEN12_AUX_ERR_DBG		_MMIO(0x43f4)
 #define FPGA_DBG		_MMIO(0x42300)

drivers/gpu/drm/i915/i915_vma.c+3−0

@@ -457,6 +457,9 @@ int i915_vma_bind(struct i915_vma *vma, · 456 unmodified lines
457	vma->ops->bind_vma(vma->vm, NULL, vma, cache_level, bind_flags);	457	vma->ops->bind_vma(vma->vm, NULL, vma, cache_level, bind_flags);
458	}	458	}
459		459
		460	if (vma->obj)
		461	set_bit(I915_BO_WAS_BOUND_BIT, &vma->obj->flags);
		462
460	atomic_or(bind_flags, &vma->flags);	463	atomic_or(bind_flags, &vma->flags);
461	return 0;	464	return 0;
462	}	465	}

drivers/gpu/drm/i915/intel_uncore.c+22−4

 }
 static void __intel_uncore_forcewake_put(struct intel_uncore *uncore,
-					 enum forcewake_domains fw_domains)
+					 enum forcewake_domains fw_domains,
+					 bool delayed)
 {
 	struct intel_uncore_forcewake_domain *domain;
 	unsigned int tmp;
 			continue;
 		}
-		fw_domains_put(uncore, domain->mask);
+		if (delayed &&
+		    !(domain->uncore->fw_domains_timer & domain->mask))
+			fw_domain_arm_timer(domain);
+		else
+			fw_domains_put(uncore, domain->mask);
 	}
 }
 		return;
 	spin_lock_irqsave(&uncore->lock, irqflags);
-	__intel_uncore_forcewake_put(uncore, fw_domains);
+	__intel_uncore_forcewake_put(uncore, fw_domains, false);
+	spin_unlock_irqrestore(&uncore->lock, irqflags);
+}
+void intel_uncore_forcewake_put_delayed(struct intel_uncore *uncore,
+					enum forcewake_domains fw_domains)
+{
+	unsigned long irqflags;
+	if (!uncore->fw_get_funcs)
+		return;
+	spin_lock_irqsave(&uncore->lock, irqflags);
+	__intel_uncore_forcewake_put(uncore, fw_domains, true);
 	spin_unlock_irqrestore(&uncore->lock, irqflags);
 }
 	if (!uncore->fw_get_funcs)
 		return;
-	__intel_uncore_forcewake_put(uncore, fw_domains);
+	__intel_uncore_forcewake_put(uncore, fw_domains, false);
 }
 void assert_forcewakes_inactive(struct intel_uncore *uncore)

drivers/gpu/drm/i915/intel_uncore.h+2−0

@@ -246,6 +246,8 @@ void intel_uncore_forcewake_get(struct intel_uncore *uncore, · 245 unmodified lines
246	enum forcewake_domains domains);	246	enum forcewake_domains domains);
247	void intel_uncore_forcewake_put(struct intel_uncore *uncore,	247	void intel_uncore_forcewake_put(struct intel_uncore *uncore,
248	enum forcewake_domains domains);	248	enum forcewake_domains domains);
		249	void intel_uncore_forcewake_put_delayed(struct intel_uncore *uncore,
		250	enum forcewake_domains domains);
249	void intel_uncore_forcewake_flush(struct intel_uncore *uncore,	251	void intel_uncore_forcewake_flush(struct intel_uncore *uncore,
250	enum forcewake_domains fw_domains);	252	enum forcewake_domains fw_domains);
251		253

drivers/gpu/drm/msm/adreno/a6xx_gpu.c+2−0

@@ -1560,6 +1560,8 @@ static int a6xx_pm_suspend(struct msm_gpu *gpu) · 1559 unmodified lines
1560	for (i = 0; i < gpu->nr_rings; i++)	1560	for (i = 0; i < gpu->nr_rings; i++)
1561	a6xx_gpu->shadow[i] = 0;	1561	a6xx_gpu->shadow[i] = 0;
1562		1562
		1563	gpu->suspend_count++;
		1564
1563	return 0;	1565	return 0;
1564	}	1566	}
1565		1567

drivers/gpu/drm/msm/adreno/adreno_device.c+18−0

@@ -608,9 +608,27 @@ static int adreno_resume(struct device *dev) · 607 unmodified lines
608	return gpu->funcs->pm_resume(gpu);	608	return gpu->funcs->pm_resume(gpu);
609	}	609	}
610		610
		611	static int active_submits(struct msm_gpu *gpu)
		612	{
		613	int active_submits;
		614	mutex_lock(&gpu->active_lock);
		615	active_submits = gpu->active_submits;
		616	mutex_unlock(&gpu->active_lock);
		617	return active_submits;
		618	}
		619
611	static int adreno_suspend(struct device *dev)	620	static int adreno_suspend(struct device *dev)
612	{	621	{
613	struct msm_gpu *gpu = dev_to_gpu(dev);	622	struct msm_gpu *gpu = dev_to_gpu(dev);
		623	int remaining;
		624
		625	remaining = wait_event_timeout(gpu->retire_event,
		626	active_submits(gpu) == 0,
		627	msecs_to_jiffies(1000));
		628	if (remaining == 0) {
		629	dev_err(dev, "Timeout waiting for GPU to suspend\n");
		630	return -EBUSY;
		631	}
614		632
615	return gpu->funcs->pm_suspend(gpu);	633	return gpu->funcs->pm_suspend(gpu);
616	}	634	}

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c+9−2

 		struct dpu_hw_pcc_cfg *cfg)
 {
-	u32 base = ctx->cap->sblk->pcc.base;
+	u32 base;
-	if (!ctx || !base) {
+	if (!ctx) {
+		DRM_ERROR("invalid ctx %pK\n", ctx);
+		return;
+	}
+	base = ctx->cap->sblk->pcc.base;
+	if (!base) {
 		DRM_ERROR("invalid ctx %pK pcc base 0x%x\n", ctx, base);
 		return;
 	}

drivers/gpu/drm/msm/dsi/dsi.c+6−1

 	of_node_put(phy_node);
-	if (!phy_pdev || !msm_dsi->phy) {
+	if (!phy_pdev) {
+		DRM_DEV_ERROR(&pdev->dev, "%s: phy driver is not ready\n", __func__);
+		return -EPROBE_DEFER;
+	}
+	if (!msm_dsi->phy) {
+		put_device(&phy_pdev->dev);
 		DRM_DEV_ERROR(&pdev->dev, "%s: phy driver is not ready\n", __func__);
 		return -EPROBE_DEFER;
 	}

drivers/gpu/drm/msm/dsi/phy/dsi_phy.c+3−1

 			struct msm_dsi_phy_clk_request *clk_req,
 			struct msm_dsi_phy_shared_timings *shared_timings)
 {
-	struct device *dev = &phy->pdev->dev;
+	struct device *dev;
 	int ret;
 	if (!phy || !phy->cfg->ops.enable)
 		return -EINVAL;
+	dev = &phy->pdev->dev;
 	ret = dsi_phy_enable_resource(phy);
 	if (ret) {
 		DRM_DEV_ERROR(dev, "%s: resource enable failed, %d\n",

drivers/gpu/drm/msm/hdmi/hdmi.c+6−1

 	of_node_put(phy_node);
-	if (!phy_pdev || !hdmi->phy) {
+	if (!phy_pdev) {
 		DRM_DEV_ERROR(&pdev->dev, "phy driver is not ready\n");
 		return -EPROBE_DEFER;
 	}
+	if (!hdmi->phy) {
+		DRM_DEV_ERROR(&pdev->dev, "phy driver is not ready\n");
+		put_device(&phy_pdev->dev);
+		return -EPROBE_DEFER;
+	}
 	hdmi->phy_dev = get_device(&phy_pdev->dev);

drivers/gpu/drm/msm/msm_drv.c+1−4

 		of_node_put(node);
 		if (ret)
 			return ret;
-		size = r.end - r.start;
+		size = r.end - r.start + 1;
 		DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
 		/* if we have no IOMMU, then we need to use carveout allocator.
 	struct msm_drm_private *priv = dev_get_drvdata(dev);
 	struct drm_device *ddev;
 	struct msm_kms *kms;
-	struct msm_mdss *mdss;
 	int ret, i;
 	ddev = drm_dev_alloc(drv, dev);
 	ddev->dev_private = priv;
 	priv->dev = ddev;
-	mdss = priv->mdss;
 	priv->wq = alloc_ordered_workqueue("msm", 0);
 	priv->hangcheck_period = DRM_MSM_HANGCHECK_DEFAULT_PERIOD;

drivers/gpu/drm/msm/msm_gpu.c+3−0

 			}
 		}
 	}
+	wake_up_all(&gpu->retire_event);
 }
 static void retire_worker(struct kthread_work *work)
 	INIT_LIST_HEAD(&gpu->active_list);
 	mutex_init(&gpu->active_lock);
 	mutex_init(&gpu->lock);
+	init_waitqueue_head(&gpu->retire_event);
 	kthread_init_work(&gpu->retire_work, retire_worker);
 	kthread_init_work(&gpu->recover_work, recover_worker);
 	kthread_init_work(&gpu->fault_work, fault_worker);

drivers/gpu/drm/msm/msm_gpu.h+3−0

@@ -230,6 +230,9 @@ struct msm_gpu { · 229 unmodified lines
230	/* work for handling GPU recovery: */	230	/* work for handling GPU recovery: */
231	struct kthread_work recover_work;	231	struct kthread_work recover_work;
232		232
		233	/** retire_event: notified when submits are retired: */
		234	wait_queue_head_t retire_event;
		235
233	/* work for handling active-list retiring: */	236	/* work for handling active-list retiring: */
234	struct kthread_work retire_work;	237	struct kthread_work retire_work;
235		238

drivers/gpu/drm/msm/msm_gpu_devfreq.c+19−2

 			      CLOCK_MONOTONIC, HRTIMER_MODE_REL);
 }
+static void cancel_idle_work(struct msm_gpu_devfreq *df)
+{
+	hrtimer_cancel(&df->idle_work.timer);
+	kthread_cancel_work_sync(&df->idle_work.work);
+}
+static void cancel_boost_work(struct msm_gpu_devfreq *df)
+{
+	hrtimer_cancel(&df->boost_work.timer);
+	kthread_cancel_work_sync(&df->boost_work.work);
+}
 void msm_devfreq_cleanup(struct msm_gpu *gpu)
 {
 	struct msm_gpu_devfreq *df = &gpu->devfreq;
 void msm_devfreq_suspend(struct msm_gpu *gpu)
 {
-	devfreq_suspend_device(gpu->devfreq.devfreq);
+	struct msm_gpu_devfreq *df = &gpu->devfreq;
+	devfreq_suspend_device(df->devfreq);
+	cancel_idle_work(df);
+	cancel_boost_work(df);
 }
 static void msm_devfreq_boost_work(struct kthread_work *work)
 	/*
 	 * Cancel any pending transition to idle frequency:
 	 */
-	hrtimer_cancel(&df->idle_work.timer);
+	cancel_idle_work(df);
 	idle_time = ktime_to_ms(ktime_sub(ktime_get(), df->idle_time));

drivers/gpu/drm/vc4/vc4_dsi.c+4−10

 			       struct mipi_dsi_device *device)
 {
 	struct vc4_dsi *dsi = host_to_dsi(host);
-	int ret;
 	dsi->lanes = device->lanes;
 	dsi->channel = device->channel;
 		return 0;
 	}
-	ret = component_add(&dsi->pdev->dev, &vc4_dsi_ops);
+	return component_add(&dsi->pdev->dev, &vc4_dsi_ops);
-	if (ret) {
-		mipi_dsi_host_unregister(&dsi->dsi_host);
-		return ret;
-	}
-	return 0;
 }
 static int vc4_dsi_host_detach(struct mipi_dsi_host *host,
 			       struct mipi_dsi_device *device)
 {
+	struct vc4_dsi *dsi = host_to_dsi(host);
+	component_del(&dsi->pdev->dev, &vc4_dsi_ops);
 	return 0;
 }
 	struct device *dev = &pdev->dev;
 	struct vc4_dsi *dsi = dev_get_drvdata(dev);
-	component_del(&pdev->dev, &vc4_dsi_ops);
 	mipi_dsi_host_unregister(&dsi->dsi_host);
 	return 0;
 }

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h+2−3

 				      struct vmw_private *dev_priv,
 				      struct vmw_fence_obj **p_fence,
 				      uint32_t *p_handle);
-extern void vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
+extern int vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
 					struct vmw_fpriv *vmw_fp,
 					int ret,
 					struct drm_vmw_fence_rep __user
 					*user_fence_rep,
 					struct vmw_fence_obj *fence,
 					uint32_t fence_handle,
-					int32_t out_fence_fd,
+					int32_t out_fence_fd);
-					struct sync_file *sync_file);
 bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd);
 /**

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c+17−16

  * Also if copying fails, user-space will be unable to signal the fence object
  * so we wait for it immediately, and then unreference the user-space reference.
  */
-void
+int
 vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
 			    struct vmw_fpriv *vmw_fp, int ret,
 			    struct drm_vmw_fence_rep __user *user_fence_rep,
 			    struct vmw_fence_obj *fence, uint32_t fence_handle,
-			    int32_t out_fence_fd, struct sync_file *sync_file)
+			    int32_t out_fence_fd)
 {
 	struct drm_vmw_fence_rep fence_rep;
 	if (user_fence_rep == NULL)
-		return;
+		return 0;
 	memset(&fence_rep, 0, sizeof(fence_rep));
 	 * handle.
 	 */
 	if (unlikely(ret != 0) && (fence_rep.error == 0)) {
-		if (sync_file)
-			fput(sync_file->file);
-		if (fence_rep.fd != -1) {
-			put_unused_fd(fence_rep.fd);
-			fence_rep.fd = -1;
-		}
 		ttm_ref_object_base_unref(vmw_fp->tfile, fence_handle);
 		VMW_DEBUG_USER("Fence copy error. Syncing.\n");
 		(void) vmw_fence_obj_wait(fence, false, false,
 					  VMW_FENCE_WAIT_TIMEOUT);
 	}
+	return ret ? -EFAULT : 0;
 }
 /**
 			(void) vmw_fence_obj_wait(fence, false, false,
 						  VMW_FENCE_WAIT_TIMEOUT);
+		}
+	}
+	ret = vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
+				    user_fence_rep, fence, handle, out_fence_fd);
+	if (sync_file) {
+		if (ret) {
+			/* usercopy of fence failed, put the file object */
+			fput(sync_file->file);
+			put_unused_fd(out_fence_fd);
 		} else {
 			/* Link the fence with the FD created earlier */
 			fd_install(out_fence_fd, sync_file->file);
 		}
 	}
-	vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
-				    user_fence_rep, fence, handle, out_fence_fd,
-				    sync_file);
 	/* Don't unreference when handing fence out */
 	if (unlikely(out_fence != NULL)) {
 		*out_fence = fence;
 	 */
 	vmw_validation_unref_lists(&val_ctx);
-	return 0;
+	return ret;
 out_unlock_binding:
 	mutex_unlock(&dev_priv->binding_mutex);

drivers/gpu/drm/vmwgfx/vmwgfx_fence.c+1−1

@@ -1128,7 +1128,7 @@ int vmw_fence_event_ioctl(struct drm_device dev, void data, · 1127 unmodified lines
1128	}	1128	}
1129		1129
1130	vmw_execbuf_copy_fence_user(dev_priv, vmw_fp, 0, user_fence_rep, fence,	1130	vmw_execbuf_copy_fence_user(dev_priv, vmw_fp, 0, user_fence_rep, fence,
1131	handle, -1, NULL);	1131	handle, -1);
1132	vmw_fence_obj_unreference(&fence);	1132	vmw_fence_obj_unreference(&fence);
1133	return 0;	1133	return 0;
1134	out_no_create:	1134	out_no_create:

drivers/gpu/drm/vmwgfx/vmwgfx_kms.c+1−1

@@ -2501,7 +2501,7 @@ void vmw_kms_helper_validation_finish(struct vmw_private *dev_priv, · 2500 unmodified lines
2501	if (file_priv)	2501	if (file_priv)
2502	vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),	2502	vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
2503	ret, user_fence_rep, fence,	2503	ret, user_fence_rep, fence,
2504	handle, -1, NULL);	2504	handle, -1);
2505	if (out_fence)	2505	if (out_fence)
2506	*out_fence = fence;	2506	*out_fence = fence;
2507	else	2507	else

drivers/hv/hv_balloon.c+7−0

@@ -1660,6 +1660,13 @@ static int balloon_connect_vsp(struct hv_device *dev) · 1659 unmodified lines
1660	unsigned long t;	1660	unsigned long t;
1661	int ret;	1661	int ret;
1662		1662
		1663	/*
		1664	* max_pkt_size should be large enough for one vmbus packet header plus
		1665	* our receive buffer size. Hyper-V sends messages up to
		1666	* HV_HYP_PAGE_SIZE bytes long on balloon channel.
		1667	*/
		1668	dev->channel->max_pkt_size = HV_HYP_PAGE_SIZE * 2;
		1669
1663	ret = vmbus_open(dev->channel, dm_ring_size, dm_ring_size, NULL, 0,	1670	ret = vmbus_open(dev->channel, dm_ring_size, dm_ring_size, NULL, 0,
1664	balloon_onchannelcallback, dev);	1671	balloon_onchannelcallback, dev);
1665	if (ret)	1672	if (ret)

drivers/hwmon/adt7470.c+3−0

@@ -662,6 +662,9 @@ static int adt7470_fan_write(struct device *dev, u32 attr, int channel, long val · 661 unmodified lines
662	struct adt7470_data *data = dev_get_drvdata(dev);	662	struct adt7470_data *data = dev_get_drvdata(dev);
663	int err;	663	int err;
664		664
		665	if (val <= 0)
		666	return -EINVAL;
		667
665	val = FAN_RPM_TO_PERIOD(val);	668	val = FAN_RPM_TO_PERIOD(val);
666	val = clamp_val(val, 1, 65534);	669	val = clamp_val(val, 1, 65534);
667		670

drivers/hwmon/lm90.c+11−10

 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT,
 		.alert_alarms = 0x7c,
-		.max_convrate = 8,
+		.max_convrate = 7,
 	},
 	[lm86] = {
 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 		.max_convrate = 9,
 	},
 	[max6646] = {
-		.flags = LM90_HAVE_CRIT,
+		.flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT,
 		.alert_alarms = 0x7c,
 		.max_convrate = 6,
 		.reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
 	},
 	[max6654] = {
+		.flags = LM90_HAVE_BROKEN_ALERT,
 		.alert_alarms = 0x7c,
 		.max_convrate = 7,
 		.reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
 	},
 	[max6680] = {
 		.flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
-		  | LM90_HAVE_CRIT_ALRM_SWP,
+		  | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT,
 		.alert_alarms = 0x7c,
 		.max_convrate = 7,
 	},
 		 * Re-enable ALERT# output if it was originally enabled and
 		 * relevant alarms are all clear
 		 */
-		if (!(data->config_orig & 0x80) &&
+		if ((client->irq || !(data->config_orig & 0x80)) &&
 		    !(data->alarms & data->alert_alarms)) {
 			if (data->config & 0x80) {
 				dev_dbg(&client->dev, "Re-enabling ALERT#\n");
 	if (st & LM90_STATUS_LLOW)
 		hwmon_notify_event(data->hwmon_dev, hwmon_temp,
-				   hwmon_temp_min, 0);
+				   hwmon_temp_min_alarm, 0);
 	if (st & LM90_STATUS_RLOW)
 		hwmon_notify_event(data->hwmon_dev, hwmon_temp,
-				   hwmon_temp_min, 1);
+				   hwmon_temp_min_alarm, 1);
 	if (st2 & MAX6696_STATUS2_R2LOW)
 		hwmon_notify_event(data->hwmon_dev, hwmon_temp,
-				   hwmon_temp_min, 2);
+				   hwmon_temp_min_alarm, 2);
 	if (st & LM90_STATUS_LHIGH)
 		hwmon_notify_event(data->hwmon_dev, hwmon_temp,
-				   hwmon_temp_max, 0);
+				   hwmon_temp_max_alarm, 0);
 	if (st & LM90_STATUS_RHIGH)
 		hwmon_notify_event(data->hwmon_dev, hwmon_temp,
-				   hwmon_temp_max, 1);
+				   hwmon_temp_max_alarm, 1);
 	if (st2 & MAX6696_STATUS2_R2HIGH)
 		hwmon_notify_event(data->hwmon_dev, hwmon_temp,
-				   hwmon_temp_max, 2);
+				   hwmon_temp_max_alarm, 2);
 	return true;
 }

drivers/hwmon/nct6775.c+3−3

@@ -1175,7 +1175,7 @@ static inline u8 in_to_reg(u32 val, u8 nr) · 1174 unmodified lines
1175		1175
1176	struct nct6775_data {	1176	struct nct6775_data {
1177	int addr; /* IO base of hw monitor block */	1177	int addr; /* IO base of hw monitor block */
1178	int sioreg; /* SIO register address */	1178	struct nct6775_sio_data *sio_data;
1179	enum kinds kind;	1179	enum kinds kind;
1180	const char *name;	1180	const char *name;
1181		1181
@@ -3559,7 +3559,7 @@ clear_caseopen(struct device dev, struct device_attribute attr, · 2377 unmodified lines
3559	const char *buf, size_t count)	3559	const char *buf, size_t count)
3560	{	3560	{
3561	struct nct6775_data *data = dev_get_drvdata(dev);	3561	struct nct6775_data *data = dev_get_drvdata(dev);
3562	struct nct6775_sio_data *sio_data = dev_get_platdata(dev);	3562	struct nct6775_sio_data *sio_data = data->sio_data;
3563	int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;	3563	int nr = to_sensor_dev_attr(attr)->index - INTRUSION_ALARM_BASE;
3564	unsigned long val;	3564	unsigned long val;
3565	u8 reg;	3565	u8 reg;
@@ -3967,7 +3967,7 @@ static int nct6775_probe(struct platform_device *pdev) · 401 unmodified lines
3967	return -ENOMEM;	3967	return -ENOMEM;
3968		3968
3969	data->kind = sio_data->kind;	3969	data->kind = sio_data->kind;
3970	data->sioreg = sio_data->sioreg;	3970	data->sio_data = sio_data;
3971		3971
3972	if (sio_data->access == access_direct) {	3972	if (sio_data->access == access_direct) {
3973	data->addr = res->start;	3973	data->addr = res->start;

drivers/hwmon/pmbus/ir38064.c+1−1

@@ -62,7 +62,7 @@ static const struct i2c_device_id ir38064_id[] = { · 61 unmodified lines
62		62
63	MODULE_DEVICE_TABLE(i2c, ir38064_id);	63	MODULE_DEVICE_TABLE(i2c, ir38064_id);
64		64
65	static const struct of_device_id ir38064_of_match[] = {	65	static const struct of_device_id __maybe_unused ir38064_of_match[] = {
66	{ .compatible = "infineon,ir38060" },	66	{ .compatible = "infineon,ir38060" },
67	{ .compatible = "infineon,ir38064" },	67	{ .compatible = "infineon,ir38064" },
68	{ .compatible = "infineon,ir38164" },	68	{ .compatible = "infineon,ir38164" },

drivers/irqchip/irq-apple-aic.c+0−1

@@ -178,7 +178,6 @@ struct aic_irq_chip { · 177 unmodified lines
178	struct irq_domain *hw_domain;	178	struct irq_domain *hw_domain;
179	struct irq_domain *ipi_domain;	179	struct irq_domain *ipi_domain;
180	int nr_hw;	180	int nr_hw;
181	int ipi_hwirq;
182	};	181	};
183		182
184	static DEFINE_PER_CPU(uint32_t, aic_fiq_unmasked);	183	static DEFINE_PER_CPU(uint32_t, aic_fiq_unmasked);

drivers/irqchip/irq-gic-v3-its.c+101−22

@@ -4856,6 +4856,38 @@ static struct syscore_ops its_syscore_ops = { · 4855 unmodified lines
4856	.resume = its_restore_enable,	4856	.resume = its_restore_enable,
4857	};	4857	};
4858		4858
		4859	static void __init __iomem its_map_one(struct resource res, int *err)
		4860	{
		4861	void __iomem *its_base;
		4862	u32 val;
		4863
		4864	its_base = ioremap(res->start, SZ_64K);
		4865	if (!its_base) {
		4866	pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start);
		4867	*err = -ENOMEM;
		4868	return NULL;
		4869	}
		4870
		4871	val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK;
		4872	if (val != 0x30 && val != 0x40) {
		4873	pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start);
		4874	*err = -ENODEV;
		4875	goto out_unmap;
		4876	}
		4877
		4878	*err = its_force_quiescent(its_base);
		4879	if (*err) {
		4880	pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start);
		4881	goto out_unmap;
		4882	}
		4883
		4884	return its_base;
		4885
		4886	out_unmap:
		4887	iounmap(its_base);
		4888	return NULL;
		4889	}
		4890
4859	static int its_init_domain(struct fwnode_handle handle, struct its_node its)	4891	static int its_init_domain(struct fwnode_handle handle, struct its_node its)
4860	{	4892	{
4861	struct irq_domain *inner_domain;	4893	struct irq_domain *inner_domain;
@@ -4963,29 +4995,14 @@ static int __init its_probe_one(struct resource *res, · 101 unmodified lines
4963	{	4995	{
4964	struct its_node *its;	4996	struct its_node *its;
4965	void __iomem *its_base;	4997	void __iomem *its_base;
4966	u32 val, ctlr;
4967	u64 baser, tmp, typer;	4998	u64 baser, tmp, typer;
4968	struct page *page;	4999	struct page *page;
		5000	u32 ctlr;
4969	int err;	5001	int err;
4970		5002
4971	its_base = ioremap(res->start, SZ_64K);	5003	its_base = its_map_one(res, &err);
4972	if (!its_base) {	5004	if (!its_base)
4973	pr_warn("ITS@%pa: Unable to map ITS registers\n", &res->start);	5005	return err;
4974	return -ENOMEM;
4975	}
4976
4977	val = readl_relaxed(its_base + GITS_PIDR2) & GIC_PIDR2_ARCH_MASK;
4978	if (val != 0x30 && val != 0x40) {
4979	pr_warn("ITS@%pa: No ITS detected, giving up\n", &res->start);
4980	err = -ENODEV;
4981	goto out_unmap;
4982	}
4983
4984	err = its_force_quiescent(its_base);
4985	if (err) {
4986	pr_warn("ITS@%pa: Failed to quiesce, giving up\n", &res->start);
4987	goto out_unmap;
4988	}
4989		5006
4990	pr_info("ITS %pR\n", res);	5007	pr_info("ITS %pR\n", res);
4991		5008
@@ -5241,13 +5258,31 @@ static int its_cpu_memreserve_lpi(unsigned int cpu) · 249 unmodified lines
5241		5258
5242	out:	5259	out:
5243	/* Last CPU being brought up gets to issue the cleanup */	5260	/* Last CPU being brought up gets to issue the cleanup */
5244	if (cpumask_equal(&cpus_booted_once_mask, cpu_possible_mask))	5261	if (!IS_ENABLED(CONFIG_SMP) \|\|
		5262	cpumask_equal(&cpus_booted_once_mask, cpu_possible_mask))
5245	schedule_work(&rdist_memreserve_cpuhp_cleanup_work);	5263	schedule_work(&rdist_memreserve_cpuhp_cleanup_work);
5246		5264
5247	gic_data_rdist()->flags \|= RD_LOCAL_MEMRESERVE_DONE;	5265	gic_data_rdist()->flags \|= RD_LOCAL_MEMRESERVE_DONE;
5248	return ret;	5266	return ret;
5249	}	5267	}
5250		5268
		5269	/* Mark all the BASER registers as invalid before they get reprogrammed */
		5270	static int __init its_reset_one(struct resource *res)
		5271	{
		5272	void __iomem *its_base;
		5273	int err, i;
		5274
		5275	its_base = its_map_one(res, &err);
		5276	if (!its_base)
		5277	return err;
		5278
		5279	for (i = 0; i < GITS_BASER_NR_REGS; i++)
		5280	gits_write_baser(0, its_base + GITS_BASER + (i << 3));
		5281
		5282	iounmap(its_base);
		5283	return 0;
		5284	}
		5285
5251	static const struct of_device_id its_device_id[] = {	5286	static const struct of_device_id its_device_id[] = {
5252	{ .compatible = "arm,gic-v3-its", },	5287	{ .compatible = "arm,gic-v3-its", },
5253	{},	5288	{},
@@ -5258,6 +5293,26 @@ static int __init its_of_probe(struct device_node *node) · 4 unmodified lines
5258	struct device_node *np;	5293	struct device_node *np;
5259	struct resource res;	5294	struct resource res;
5260		5295
		5296	/*
		5297	* Make sure all the ITS are reset before we probe any, as
		5298	* they may be sharing memory. If any of the ITS fails to
		5299	* reset, don't even try to go any further, as this could
		5300	* result in something even worse.
		5301	*/
		5302	for (np = of_find_matching_node(node, its_device_id); np;
		5303	np = of_find_matching_node(np, its_device_id)) {
		5304	int err;
		5305
		5306	if (!of_device_is_available(np) \|\|
		5307	!of_property_read_bool(np, "msi-controller") \|\|
		5308	of_address_to_resource(np, 0, &res))
		5309	continue;
		5310
		5311	err = its_reset_one(&res);
		5312	if (err)
		5313	return err;
		5314	}
		5315
5261	for (np = of_find_matching_node(node, its_device_id); np;	5316	for (np = of_find_matching_node(node, its_device_id); np;
5262	np = of_find_matching_node(np, its_device_id)) {	5317	np = of_find_matching_node(np, its_device_id)) {
5263	if (!of_device_is_available(np))	5318	if (!of_device_is_available(np))
@@ -5420,11 +5475,35 @@ dom_err: · 156 unmodified lines
5420	return err;	5475	return err;
5421	}	5476	}
5422		5477
		5478	static int __init its_acpi_reset(union acpi_subtable_headers *header,
		5479	const unsigned long end)
		5480	{
		5481	struct acpi_madt_generic_translator *its_entry;
		5482	struct resource res;
		5483
		5484	its_entry = (struct acpi_madt_generic_translator *)header;
		5485	res = (struct resource) {
		5486	.start = its_entry->base_address,
		5487	.end = its_entry->base_address + ACPI_GICV3_ITS_MEM_SIZE - 1,
		5488	.flags = IORESOURCE_MEM,
		5489	};
		5490
		5491	return its_reset_one(&res);
		5492	}
		5493
5423	static void __init its_acpi_probe(void)	5494	static void __init its_acpi_probe(void)
5424	{	5495	{
5425	acpi_table_parse_srat_its();	5496	acpi_table_parse_srat_its();
5426	acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,	5497	/*
5427	gic_acpi_parse_madt_its, 0);	5498	* Make sure all the ITS are reset before we probe any, as
		5499	* they may be sharing memory. If any of the ITS fails to
		5500	* reset, don't even try to go any further, as this could
		5501	* result in something even worse.
		5502	*/
		5503	if (acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
		5504	its_acpi_reset, 0) > 0)
		5505	acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_TRANSLATOR,
		5506	gic_acpi_parse_madt_its, 0);
5428	acpi_its_srat_maps_free();	5507	acpi_its_srat_maps_free();
5429	}	5508	}
5430	#else	5509	#else

drivers/irqchip/irq-loongson-pch-msi.c+1−1

@@ -241,7 +241,7 @@ static int pch_msi_init(struct device_node *node, · 240 unmodified lines
241	return 0;	241	return 0;
242		242
243	err_map:	243	err_map:
244	kfree(priv->msi_map);	244	bitmap_free(priv->msi_map);
245	err_priv:	245	err_priv:
246	kfree(priv);	246	kfree(priv);
247	return ret;	247	return ret;

drivers/irqchip/irq-realtek-rtl.c+12−6

 static int intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
 {
-	irq_set_chip_and_handler(hw, &realtek_ictl_irq, handle_level_irq);
+	irq_set_chip_and_handler(irq, &realtek_ictl_irq, handle_level_irq);
 	return 0;
 }
 {
 	struct irq_chip *chip = irq_desc_get_chip(desc);
 	struct irq_domain *domain;
-	unsigned int pending;
+	unsigned long pending;
+	unsigned int soc_int;
 	chained_irq_enter(chip, desc);
 	pending = readl(REG(RTL_ICTL_GIMR)) & readl(REG(RTL_ICTL_GISR));
 	if (unlikely(!pending)) {
 		spurious_interrupt();
 		goto out;
 	}
 	domain = irq_desc_get_handler_data(desc);
-	generic_handle_domain_irq(domain, __ffs(pending));
+	for_each_set_bit(soc_int, &pending, 32)
+		generic_handle_domain_irq(domain, soc_int);
 out:
 	chained_irq_exit(chip, desc);
  * SoC interrupts are cascaded to MIPS CPU interrupts according to the
  * interrupt-map in the device tree. Each SoC interrupt gets 4 bits for
  * the CPU interrupt in an Interrupt Routing Register. Max 32 SoC interrupts
- * thus go into 4 IRRs.
+ * thus go into 4 IRRs. A routing value of '0' means the interrupt is left
+ * disconnected. Routing values {1..15} connect to output lines {0..14}.
  */
 static int __init map_interrupts(struct device_node *node, struct irq_domain *domain)
 {
 		of_node_put(cpu_ictl);
 		cpu_int = be32_to_cpup(imap + 2);
-		if (cpu_int > 7)
+		if (cpu_int > 7 || cpu_int < 2)
 			return -EINVAL;
 		if (!(mips_irqs_set & BIT(cpu_int))) {
 			mips_irqs_set |= BIT(cpu_int);
 		}
-		regs[(soc_int * 4) / 32] |= cpu_int << (soc_int * 4) % 32;
+		/* Use routing values (1..6) for CPU interrupts (2..7) */
+		regs[(soc_int * 4) / 32] |= (cpu_int - 1) << (soc_int * 4) % 32;
 		imap += 3;
 	}

drivers/md/dm.c+3−17

 	struct mapped_device *md = io->md;
 	struct bio *bio = io->orig_bio;
-	io->start_time = bio_start_io_acct(bio);
+	bio_start_io_acct_time(bio, io->start_time);
 	if (unlikely(dm_stats_used(&md->stats)))
 		dm_stats_account_io(&md->stats, bio_data_dir(bio),
 				    bio->bi_iter.bi_sector, bio_sectors(bio),
 	io->md = md;
 	spin_lock_init(&io->endio_lock);
-	start_io_acct(io);
+	io->start_time = jiffies;
 	return io;
 }
 	ci->sector = bio->bi_iter.bi_sector;
 }
-#define __dm_part_stat_sub(part, field, subnd)	\
-	(part_stat_get(part, field) -= (subnd))
 /*
  * Entry point to split a bio into clones and submit them to the targets.
  */
 						  GFP_NOIO, &md->queue->bio_split);
 			ci.io->orig_bio = b;
-			/*
-			 * Adjust IO stats for each split, otherwise upon queue
-			 * reentry there will be redundant IO accounting.
-			 * NOTE: this is a stop-gap fix, a proper fix involves
-			 * significant refactoring of DM core's bio splitting
-			 * (by eliminating DM's splitting and just using bio_split)
-			 */
-			part_stat_lock();
-			__dm_part_stat_sub(dm_disk(md)->part0,
-					   sectors[op_stat_group(bio_op(bio))], ci.sector_count);
-			part_stat_unlock();
 			bio_chain(b, bio);
 			trace_block_split(b, bio->bi_iter.bi_sector);
 			submit_bio_noacct(bio);
 		}
 	}
+	start_io_acct(ci.io);
 	/* drop the extra reference count */
 	dm_io_dec_pending(ci.io, errno_to_blk_status(error));

drivers/misc/eeprom/at25.c+4−0

 		return -ENXIO;
 	}
+	at25 = devm_kzalloc(&spi->dev, sizeof(*at25), GFP_KERNEL);
+	if (!at25)
+		return -ENOMEM;
 	mutex_init(&at25->lock);
 	at25->spi = spi;
 	spi_set_drvdata(spi, at25);

drivers/net/bonding/bond_main.c+0−4

 		fallthrough;
 	case SIOCGHWTSTAMP:
-		rcu_read_lock();
 		real_dev = bond_option_active_slave_get_rcu(bond);
-		rcu_read_unlock();
 		if (!real_dev)
 			return -EOPNOTSUPP;
 	struct net_device *real_dev;
 	struct phy_device *phydev;
-	rcu_read_lock();
 	real_dev = bond_option_active_slave_get_rcu(bond);
-	rcu_read_unlock();
 	if (real_dev) {
 		ops = real_dev->ethtool_ops;
 		phydev = real_dev->phydev;

drivers/net/can/flexcan/flexcan-core.c+1−0

@@ -296,6 +296,7 @@ static_assert(sizeof(struct flexcan_regs) == 0x4 * 18 + 0xfb8); · 295 unmodified lines
296	static const struct flexcan_devtype_data fsl_mcf5441x_devtype_data = {	296	static const struct flexcan_devtype_data fsl_mcf5441x_devtype_data = {
297	.quirks = FLEXCAN_QUIRK_BROKEN_PERR_STATE \|	297	.quirks = FLEXCAN_QUIRK_BROKEN_PERR_STATE \|
298	FLEXCAN_QUIRK_NR_IRQ_3 \| FLEXCAN_QUIRK_NR_MB_16 \|	298	FLEXCAN_QUIRK_NR_IRQ_3 \| FLEXCAN_QUIRK_NR_MB_16 \|
		299	FLEXCAN_QUIRK_SUPPPORT_RX_MAILBOX \|
299	FLEXCAN_QUIRK_SUPPPORT_RX_FIFO,	300	FLEXCAN_QUIRK_SUPPPORT_RX_FIFO,
300	};	301	};
301		302

drivers/net/can/flexcan/flexcan.h+1−1

@@ -21,7 +21,7 @@ · 20 unmodified lines
21	* Below is some version info we got:	21	* Below is some version info we got:
22	* SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB	22	* SOC Version IP-Version Glitch- [TR]WRN_INT IRQ Err Memory err RTR rece- FD Mode MB
23	* Filter? connected? Passive detection ption in MB Supported?	23	* Filter? connected? Passive detection ption in MB Supported?
24	* MCF5441X FlexCAN2 ? no yes no no yes no 16	24	* MCF5441X FlexCAN2 ? no yes no no no no 16
25	* MX25 FlexCAN2 03.00.00.00 no no no no no no 64	25	* MX25 FlexCAN2 03.00.00.00 no no no no no no 64
26	* MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64	26	* MX28 FlexCAN2 03.00.04.00 yes yes no no no no 64
27	* MX35 FlexCAN2 03.00.00.00 no no no no no no 64	27	* MX35 FlexCAN2 03.00.00.00 no no no no no no 64

drivers/net/can/m_can/m_can.c+6−0

 	u32 addr_offset = cdev->mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE +
 		offset;
+	if (val_count == 0)
+		return 0;
 	return cdev->ops->read_fifo(cdev, addr_offset, val, val_count);
 }
 	u32 addr_offset = cdev->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE +
 		offset;
+	if (val_count == 0)
+		return 0;
 	return cdev->ops->write_fifo(cdev, addr_offset, val, val_count);
 }

drivers/net/can/m_can/tcan4x5x-regmap.c+1−1

@@ -12,7 +12,7 @@ · 11 unmodified lines
12	#define TCAN4X5X_SPI_INSTRUCTION_WRITE (0x61 << 24)	12	#define TCAN4X5X_SPI_INSTRUCTION_WRITE (0x61 << 24)
13	#define TCAN4X5X_SPI_INSTRUCTION_READ (0x41 << 24)	13	#define TCAN4X5X_SPI_INSTRUCTION_READ (0x41 << 24)
14		14
15	#define TCAN4X5X_MAX_REGISTER 0x8ffc	15	#define TCAN4X5X_MAX_REGISTER 0x87fc
16		16
17	static int tcan4x5x_regmap_gather_write(void *context,	17	static int tcan4x5x_regmap_gather_write(void *context,
18	const void *reg, size_t reg_len,	18	const void *reg, size_t reg_len,

drivers/net/ethernet/3com/typhoon.c+4−2

 	struct net_device *dev;
 	struct typhoon *tp;
 	int card_id = (int) ent->driver_data;
+	u8 addr[ETH_ALEN] __aligned(4);
 	void __iomem *ioaddr;
 	void *shared;
 	dma_addr_t shared_dma;
 		goto error_out_reset;
 	}
-	*(__be16 *)&dev->dev_addr[0] = htons(le16_to_cpu(xp_resp[0].parm1));
+	*(__be16 *)&addr[0] = htons(le16_to_cpu(xp_resp[0].parm1));
-	*(__be32 *)&dev->dev_addr[2] = htonl(le32_to_cpu(xp_resp[0].parm2));
+	*(__be32 *)&addr[2] = htonl(le32_to_cpu(xp_resp[0].parm2));
+	eth_hw_addr_set(dev, addr);
 	if (!is_valid_ether_addr(dev->dev_addr)) {
 		err_msg = "Could not obtain valid ethernet address, aborting";

drivers/net/ethernet/8390/etherh.c+4−2

 	struct ei_device *ei_local;
 	struct net_device *dev;
 	struct etherh_priv *eh;
+	u8 addr[ETH_ALEN];
 	int ret;
 	ret = ecard_request_resources(ec);
 	spin_lock_init(&ei_local->page_lock);
 	if (ec->cid.product == PROD_ANT_ETHERM) {
-		etherm_addr(dev->dev_addr);
+		etherm_addr(addr);
 		ei_local->reg_offset = etherm_regoffsets;
 	} else {
-		etherh_addr(dev->dev_addr, ec);
+		etherh_addr(addr, ec);
 		ei_local->reg_offset = etherh_regoffsets;
 	}
+	eth_hw_addr_set(dev, addr);
 	ei_local->name          = dev->name;
 	ei_local->word16        = 1;

drivers/net/ethernet/amd/declance.c+3−1

 	int i, ret;
 	unsigned long esar_base;
 	unsigned char *esar;
+	u8 addr[ETH_ALEN];
 	const char *desc;
 	if (dec_lance_debug && version_printed++ == 0)
 		break;
 	}
 	for (i = 0; i < 6; i++)
-		dev->dev_addr[i] = esar[i * 4];
+		addr[i] = esar[i * 4];
+	eth_hw_addr_set(dev, addr);
 	printk("%s: %s, addr = %pM, irq = %d\n",
 	       name, desc, dev->dev_addr, dev->irq);

drivers/net/ethernet/aquantia/atlantic/aq_filters.c+2−4

 	struct aq_hw_s *aq_hw = aq_nic->aq_hw;
 	int hweight = 0;
 	int err = 0;
-	int i;
 	if (unlikely(!aq_hw_ops->hw_filter_vlan_set))
 		return -EOPNOTSUPP;
 			 aq_nic->aq_hw_rx_fltrs.fl2.aq_vlans);
 	if (aq_nic->ndev->features & NETIF_F_HW_VLAN_CTAG_FILTER) {
-		for (i = 0; i < BITS_TO_LONGS(VLAN_N_VID); i++)
+		hweight = bitmap_weight(aq_nic->active_vlans, VLAN_N_VID);
-			hweight += hweight_long(aq_nic->active_vlans[i]);
 		err = aq_hw_ops->hw_filter_vlan_ctrl(aq_hw, false);
 		if (err)
 	struct aq_hw_s *aq_hw = aq_nic->aq_hw;
 	int err = 0;
-	memset(aq_nic->active_vlans, 0, sizeof(aq_nic->active_vlans));
+	bitmap_zero(aq_nic->active_vlans, VLAN_N_VID);
 	aq_fvlan_rebuild(aq_nic, aq_nic->active_vlans,
 			 aq_nic->aq_hw_rx_fltrs.fl2.aq_vlans);

drivers/net/ethernet/broadcom/sb1250-mac.c+1−3

@@ -2183,9 +2183,7 @@ static int sbmac_init(struct platform_device *pldev, long long base) · 2182 unmodified lines
2183	ea_reg >>= 8;	2183	ea_reg >>= 8;
2184	}	2184	}
2185		2185
2186	for (i = 0; i < 6; i++) {	2186	eth_hw_addr_set(dev, eaddr);
2187	dev->dev_addr[i] = eaddr[i];
2188	}
2189		2187
2190	/*	2188	/*
2191	* Initialize context (get pointers to registers and stuff), then	2189	* Initialize context (get pointers to registers and stuff), then

drivers/net/ethernet/freescale/fec_mpc52xx.c+7−5

 	netif_wake_queue(dev);
 }
-static void mpc52xx_fec_set_paddr(struct net_device *dev, u8 *mac)
+static void mpc52xx_fec_set_paddr(struct net_device *dev, const u8 *mac)
 {
 	struct mpc52xx_fec_priv *priv = netdev_priv(dev);
 	struct mpc52xx_fec __iomem *fec = priv->fec;
-	out_be32(&fec->paddr1, *(u32 *)(&mac[0]));
+	out_be32(&fec->paddr1, *(const u32 *)(&mac[0]));
-	out_be32(&fec->paddr2, (*(u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE);
+	out_be32(&fec->paddr2, (*(const u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE);
 }
 static int mpc52xx_fec_set_mac_address(struct net_device *dev, void *addr)
 	rv = of_get_ethdev_address(np, ndev);
 	if (rv) {
 		struct mpc52xx_fec __iomem *fec = priv->fec;
+		u8 addr[ETH_ALEN] __aligned(4);
 		/*
 		 * If the MAC addresse is not provided via DT then read
 		 * it back from the controller regs
 		 */
-		*(u32 *)(&ndev->dev_addr[0]) = in_be32(&fec->paddr1);
+		*(u32 *)(&addr[0]) = in_be32(&fec->paddr1);
-		*(u16 *)(&ndev->dev_addr[4]) = in_be32(&fec->paddr2) >> 16;
+		*(u16 *)(&addr[4]) = in_be32(&fec->paddr2) >> 16;
+		eth_hw_addr_set(ndev, addr);
 	}
 	/*

drivers/net/ethernet/google/gve/gve.h+1−1

@@ -843,7 +843,7 @@ static inline bool gve_is_gqi(struct gve_priv *priv) · 842 unmodified lines
843	/* buffers */	843	/* buffers */
844	int gve_alloc_page(struct gve_priv priv, struct device dev,	844	int gve_alloc_page(struct gve_priv priv, struct device dev,
845	struct page *page, dma_addr_t dma,	845	struct page *page, dma_addr_t dma,
846	enum dma_data_direction);	846	enum dma_data_direction, gfp_t gfp_flags);
847	void gve_free_page(struct device dev, struct page page, dma_addr_t dma,	847	void gve_free_page(struct device dev, struct page page, dma_addr_t dma,
848	enum dma_data_direction);	848	enum dma_data_direction);
849	/* tx handling */	849	/* tx handling */

drivers/net/ethernet/google/gve/gve_main.c+3−3

@@ -766,9 +766,9 @@ static void gve_free_rings(struct gve_priv *priv) · 765 unmodified lines
766		766
767	int gve_alloc_page(struct gve_priv priv, struct device dev,	767	int gve_alloc_page(struct gve_priv priv, struct device dev,
768	struct page *page, dma_addr_t dma,	768	struct page *page, dma_addr_t dma,
769	enum dma_data_direction dir)	769	enum dma_data_direction dir, gfp_t gfp_flags)
770	{	770	{
771	*page = alloc_page(GFP_KERNEL);	771	*page = alloc_page(gfp_flags);
772	if (!*page) {	772	if (!*page) {
773	priv->page_alloc_fail++;	773	priv->page_alloc_fail++;
774	return -ENOMEM;	774	return -ENOMEM;
@@ -811,7 +811,7 @@ static int gve_alloc_queue_page_list(struct gve_priv *priv, u32 id, · 36 unmodified lines
811	for (i = 0; i < pages; i++) {	811	for (i = 0; i < pages; i++) {
812	err = gve_alloc_page(priv, &priv->pdev->dev, &qpl->pages[i],	812	err = gve_alloc_page(priv, &priv->pdev->dev, &qpl->pages[i],
813	&qpl->page_buses[i],	813	&qpl->page_buses[i],
814	gve_qpl_dma_dir(priv, id));	814	gve_qpl_dma_dir(priv, id), GFP_KERNEL);
815	/* caller handles clean up */	815	/* caller handles clean up */
816	if (err)	816	if (err)
817	return -ENOMEM;	817	return -ENOMEM;

drivers/net/ethernet/google/gve/gve_rx.c+2−1

@@ -86,7 +86,8 @@ static int gve_rx_alloc_buffer(struct gve_priv priv, struct device dev, · 85 unmodified lines
86	dma_addr_t dma;	86	dma_addr_t dma;
87	int err;	87	int err;
88		88
89	err = gve_alloc_page(priv, dev, &page, &dma, DMA_FROM_DEVICE);	89	err = gve_alloc_page(priv, dev, &page, &dma, DMA_FROM_DEVICE,
		90	GFP_ATOMIC);
90	if (err)	91	if (err)
91	return err;	92	return err;
92		93

drivers/net/ethernet/google/gve/gve_rx_dqo.c+1−1

@@ -157,7 +157,7 @@ static int gve_alloc_page_dqo(struct gve_priv *priv, · 156 unmodified lines
157	int err;	157	int err;
158		158
159	err = gve_alloc_page(priv, &priv->pdev->dev, &buf_state->page_info.page,	159	err = gve_alloc_page(priv, &priv->pdev->dev, &buf_state->page_info.page,
160	&buf_state->addr, DMA_FROM_DEVICE);	160	&buf_state->addr, DMA_FROM_DEVICE, GFP_KERNEL);
161	if (err)	161	if (err)
162	return err;	162	return err;
163		163

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c+1−2

@@ -2043,8 +2043,7 @@ static irqreturn_t hclgevf_misc_irq_handle(int irq, void *data) · 2042 unmodified lines
2043	break;	2043	break;
2044	}	2044	}
2045		2045
2046	if (event_cause != HCLGEVF_VECTOR0_EVENT_OTHER)	2046	hclgevf_enable_vector(&hdev->misc_vector, true);
2047	hclgevf_enable_vector(&hdev->misc_vector, true);
2048		2047
2049	return IRQ_HANDLED;	2048	return IRQ_HANDLED;
2050	}	2049	}

drivers/net/ethernet/i825xx/ether1.c+3−1

 ether1_probe(struct expansion_card *ec, const struct ecard_id *id)
 {
 	struct net_device *dev;
+	u8 addr[ETH_ALEN];
 	int i, ret = 0;
 	ether1_banner();
 	}
 	for (i = 0; i < 6; i++)
-		dev->dev_addr[i] = readb(IDPROM_ADDRESS + (i << 2));
+		addr[i] = readb(IDPROM_ADDRESS + (i << 2));
+	eth_hw_addr_set(dev, addr);
 	if (ether1_init_2(dev)) {
 		ret = -ENODEV;

drivers/net/ethernet/ibm/ibmvnic.c+100−67

@@ -2602,6 +2602,7 @@ static void __ibmvnic_reset(struct work_struct *work) · 2601 unmodified lines
2602	struct ibmvnic_rwi *rwi;	2602	struct ibmvnic_rwi *rwi;
2603	unsigned long flags;	2603	unsigned long flags;
2604	u32 reset_state;	2604	u32 reset_state;
		2605	int num_fails = 0;
2605	int rc = 0;	2606	int rc = 0;
2606		2607
2607	adapter = container_of(work, struct ibmvnic_adapter, ibmvnic_reset);	2608	adapter = container_of(work, struct ibmvnic_adapter, ibmvnic_reset);
@@ -2655,11 +2656,23 @@ static void __ibmvnic_reset(struct work_struct *work) · 47 unmodified lines
2655	rc = do_hard_reset(adapter, rwi, reset_state);	2656	rc = do_hard_reset(adapter, rwi, reset_state);
2656	rtnl_unlock();	2657	rtnl_unlock();
2657	}	2658	}
2658	if (rc) {	2659	if (rc)
2659	/* give backing device time to settle down */	2660	num_fails++;
		2661	else
		2662	num_fails = 0;
		2663
		2664	/* If auto-priority-failover is enabled we can get
		2665	* back to back failovers during resets, resulting
		2666	* in at least two failed resets (from high-priority
		2667	* backing device to low-priority one and then back)
		2668	* If resets continue to fail beyond that, give the
		2669	* adapter some time to settle down before retrying.
		2670	*/
		2671	if (num_fails >= 3) {
2660	netdev_dbg(adapter->netdev,	2672	netdev_dbg(adapter->netdev,
2661	"[S:%s] Hard reset failed, waiting 60 secs\n",	2673	"[S:%s] Hard reset failed %d times, waiting 60 secs\n",
2662	adapter_state_to_string(adapter->state));	2674	adapter_state_to_string(adapter->state),
		2675	num_fails);
2663	set_current_state(TASK_UNINTERRUPTIBLE);	2676	set_current_state(TASK_UNINTERRUPTIBLE);
2664	schedule_timeout(60 * HZ);	2677	schedule_timeout(60 * HZ);
2665	}	2678	}
@@ -3844,11 +3857,25 @@ static void send_request_cap(struct ibmvnic_adapter *adapter, int retry) · 1178 unmodified lines
3844	struct device *dev = &adapter->vdev->dev;	3857	struct device *dev = &adapter->vdev->dev;
3845	union ibmvnic_crq crq;	3858	union ibmvnic_crq crq;
3846	int max_entries;	3859	int max_entries;
		3860	int cap_reqs;
		3861
		3862	/* We send out 6 or 7 REQUEST_CAPABILITY CRQs below (depending on
		3863	* the PROMISC flag). Initialize this count upfront. When the tasklet
		3864	* receives a response to all of these, it will send the next protocol
		3865	* message (QUERY_IP_OFFLOAD).
		3866	*/
		3867	if (!(adapter->netdev->flags & IFF_PROMISC) \|\|
		3868	adapter->promisc_supported)
		3869	cap_reqs = 7;
		3870	else
		3871	cap_reqs = 6;
3847		3872
3848	if (!retry) {	3873	if (!retry) {
3849	/* Sub-CRQ entries are 32 byte long */	3874	/* Sub-CRQ entries are 32 byte long */
3850	int entries_page = 4 * PAGE_SIZE / (sizeof(u64) * 4);	3875	int entries_page = 4 * PAGE_SIZE / (sizeof(u64) * 4);
3851		3876
		3877	atomic_set(&adapter->running_cap_crqs, cap_reqs);
		3878
3852	if (adapter->min_tx_entries_per_subcrq > entries_page \|\|	3879	if (adapter->min_tx_entries_per_subcrq > entries_page \|\|
3853	adapter->min_rx_add_entries_per_subcrq > entries_page) {	3880	adapter->min_rx_add_entries_per_subcrq > entries_page) {
3854	dev_err(dev, "Fatal, invalid entries per sub-crq\n");	3881	dev_err(dev, "Fatal, invalid entries per sub-crq\n");
@@ -3909,44 +3936,45 @@ static void send_request_cap(struct ibmvnic_adapter *adapter, int retry) · 54 unmodified lines
3909	adapter->opt_rx_comp_queues;	3936	adapter->opt_rx_comp_queues;
3910		3937
3911	adapter->req_rx_add_queues = adapter->max_rx_add_queues;	3938	adapter->req_rx_add_queues = adapter->max_rx_add_queues;
		3939	} else {
		3940	atomic_add(cap_reqs, &adapter->running_cap_crqs);
3912	}	3941	}
3913
3914	memset(&crq, 0, sizeof(crq));	3942	memset(&crq, 0, sizeof(crq));
3915	crq.request_capability.first = IBMVNIC_CRQ_CMD;	3943	crq.request_capability.first = IBMVNIC_CRQ_CMD;
3916	crq.request_capability.cmd = REQUEST_CAPABILITY;	3944	crq.request_capability.cmd = REQUEST_CAPABILITY;
3917		3945
3918	crq.request_capability.capability = cpu_to_be16(REQ_TX_QUEUES);	3946	crq.request_capability.capability = cpu_to_be16(REQ_TX_QUEUES);
3919	crq.request_capability.number = cpu_to_be64(adapter->req_tx_queues);	3947	crq.request_capability.number = cpu_to_be64(adapter->req_tx_queues);
3920	atomic_inc(&adapter->running_cap_crqs);	3948	cap_reqs--;
3921	ibmvnic_send_crq(adapter, &crq);	3949	ibmvnic_send_crq(adapter, &crq);
3922		3950
3923	crq.request_capability.capability = cpu_to_be16(REQ_RX_QUEUES);	3951	crq.request_capability.capability = cpu_to_be16(REQ_RX_QUEUES);
3924	crq.request_capability.number = cpu_to_be64(adapter->req_rx_queues);	3952	crq.request_capability.number = cpu_to_be64(adapter->req_rx_queues);
3925	atomic_inc(&adapter->running_cap_crqs);	3953	cap_reqs--;
3926	ibmvnic_send_crq(adapter, &crq);	3954	ibmvnic_send_crq(adapter, &crq);
3927		3955
3928	crq.request_capability.capability = cpu_to_be16(REQ_RX_ADD_QUEUES);	3956	crq.request_capability.capability = cpu_to_be16(REQ_RX_ADD_QUEUES);
3929	crq.request_capability.number = cpu_to_be64(adapter->req_rx_add_queues);	3957	crq.request_capability.number = cpu_to_be64(adapter->req_rx_add_queues);
3930	atomic_inc(&adapter->running_cap_crqs);	3958	cap_reqs--;
3931	ibmvnic_send_crq(adapter, &crq);	3959	ibmvnic_send_crq(adapter, &crq);
3932		3960
3933	crq.request_capability.capability =	3961	crq.request_capability.capability =
3934	cpu_to_be16(REQ_TX_ENTRIES_PER_SUBCRQ);	3962	cpu_to_be16(REQ_TX_ENTRIES_PER_SUBCRQ);
3935	crq.request_capability.number =	3963	crq.request_capability.number =
3936	cpu_to_be64(adapter->req_tx_entries_per_subcrq);	3964	cpu_to_be64(adapter->req_tx_entries_per_subcrq);
3937	atomic_inc(&adapter->running_cap_crqs);	3965	cap_reqs--;
3938	ibmvnic_send_crq(adapter, &crq);	3966	ibmvnic_send_crq(adapter, &crq);
3939		3967
3940	crq.request_capability.capability =	3968	crq.request_capability.capability =
3941	cpu_to_be16(REQ_RX_ADD_ENTRIES_PER_SUBCRQ);	3969	cpu_to_be16(REQ_RX_ADD_ENTRIES_PER_SUBCRQ);
3942	crq.request_capability.number =	3970	crq.request_capability.number =
3943	cpu_to_be64(adapter->req_rx_add_entries_per_subcrq);	3971	cpu_to_be64(adapter->req_rx_add_entries_per_subcrq);
3944	atomic_inc(&adapter->running_cap_crqs);	3972	cap_reqs--;
3945	ibmvnic_send_crq(adapter, &crq);	3973	ibmvnic_send_crq(adapter, &crq);
3946		3974
3947	crq.request_capability.capability = cpu_to_be16(REQ_MTU);	3975	crq.request_capability.capability = cpu_to_be16(REQ_MTU);
3948	crq.request_capability.number = cpu_to_be64(adapter->req_mtu);	3976	crq.request_capability.number = cpu_to_be64(adapter->req_mtu);
3949	atomic_inc(&adapter->running_cap_crqs);	3977	cap_reqs--;
3950	ibmvnic_send_crq(adapter, &crq);	3978	ibmvnic_send_crq(adapter, &crq);
3951		3979
3952	if (adapter->netdev->flags & IFF_PROMISC) {	3980	if (adapter->netdev->flags & IFF_PROMISC) {
@@ -3954,16 +3982,21 @@ static void send_request_cap(struct ibmvnic_adapter *adapter, int retry) · 1 unmodified line
3954	crq.request_capability.capability =	3982	crq.request_capability.capability =
3955	cpu_to_be16(PROMISC_REQUESTED);	3983	cpu_to_be16(PROMISC_REQUESTED);
3956	crq.request_capability.number = cpu_to_be64(1);	3984	crq.request_capability.number = cpu_to_be64(1);
3957	atomic_inc(&adapter->running_cap_crqs);	3985	cap_reqs--;
3958	ibmvnic_send_crq(adapter, &crq);	3986	ibmvnic_send_crq(adapter, &crq);
3959	}	3987	}
3960	} else {	3988	} else {
3961	crq.request_capability.capability =	3989	crq.request_capability.capability =
3962	cpu_to_be16(PROMISC_REQUESTED);	3990	cpu_to_be16(PROMISC_REQUESTED);
3963	crq.request_capability.number = cpu_to_be64(0);	3991	crq.request_capability.number = cpu_to_be64(0);
3964	atomic_inc(&adapter->running_cap_crqs);	3992	cap_reqs--;
3965	ibmvnic_send_crq(adapter, &crq);	3993	ibmvnic_send_crq(adapter, &crq);
3966	}	3994	}
		3995
		3996	/* Keep at end to catch any discrepancy between expected and actual
		3997	* CRQs sent.
		3998	*/
		3999	WARN_ON(cap_reqs != 0);
3967	}	4000	}
3968		4001
3969	static int pending_scrq(struct ibmvnic_adapter *adapter,	4002	static int pending_scrq(struct ibmvnic_adapter *adapter,
@@ -4357,118 +4390,132 @@ static void send_query_map(struct ibmvnic_adapter *adapter) · 387 unmodified lines
4357	static void send_query_cap(struct ibmvnic_adapter *adapter)	4390	static void send_query_cap(struct ibmvnic_adapter *adapter)
4358	{	4391	{
4359	union ibmvnic_crq crq;	4392	union ibmvnic_crq crq;
		4393	int cap_reqs;
		4394
		4395	/* We send out 25 QUERY_CAPABILITY CRQs below. Initialize this count
		4396	* upfront. When the tasklet receives a response to all of these, it
		4397	* can send out the next protocol messaage (REQUEST_CAPABILITY).
		4398	*/
		4399	cap_reqs = 25;
		4400
		4401	atomic_set(&adapter->running_cap_crqs, cap_reqs);
4360		4402
4361	atomic_set(&adapter->running_cap_crqs, 0);
4362	memset(&crq, 0, sizeof(crq));	4403	memset(&crq, 0, sizeof(crq));
4363	crq.query_capability.first = IBMVNIC_CRQ_CMD;	4404	crq.query_capability.first = IBMVNIC_CRQ_CMD;
4364	crq.query_capability.cmd = QUERY_CAPABILITY;	4405	crq.query_capability.cmd = QUERY_CAPABILITY;
4365		4406
4366	crq.query_capability.capability = cpu_to_be16(MIN_TX_QUEUES);	4407	crq.query_capability.capability = cpu_to_be16(MIN_TX_QUEUES);
4367	atomic_inc(&adapter->running_cap_crqs);
4368	ibmvnic_send_crq(adapter, &crq);	4408	ibmvnic_send_crq(adapter, &crq);
		4409	cap_reqs--;
4369		4410
4370	crq.query_capability.capability = cpu_to_be16(MIN_RX_QUEUES);	4411	crq.query_capability.capability = cpu_to_be16(MIN_RX_QUEUES);
4371	atomic_inc(&adapter->running_cap_crqs);
4372	ibmvnic_send_crq(adapter, &crq);	4412	ibmvnic_send_crq(adapter, &crq);
		4413	cap_reqs--;
4373		4414
4374	crq.query_capability.capability = cpu_to_be16(MIN_RX_ADD_QUEUES);	4415	crq.query_capability.capability = cpu_to_be16(MIN_RX_ADD_QUEUES);
4375	atomic_inc(&adapter->running_cap_crqs);
4376	ibmvnic_send_crq(adapter, &crq);	4416	ibmvnic_send_crq(adapter, &crq);
		4417	cap_reqs--;
4377		4418
4378	crq.query_capability.capability = cpu_to_be16(MAX_TX_QUEUES);	4419	crq.query_capability.capability = cpu_to_be16(MAX_TX_QUEUES);
4379	atomic_inc(&adapter->running_cap_crqs);
4380	ibmvnic_send_crq(adapter, &crq);	4420	ibmvnic_send_crq(adapter, &crq);
		4421	cap_reqs--;
4381		4422
4382	crq.query_capability.capability = cpu_to_be16(MAX_RX_QUEUES);	4423	crq.query_capability.capability = cpu_to_be16(MAX_RX_QUEUES);
4383	atomic_inc(&adapter->running_cap_crqs);
4384	ibmvnic_send_crq(adapter, &crq);	4424	ibmvnic_send_crq(adapter, &crq);
		4425	cap_reqs--;
4385		4426
4386	crq.query_capability.capability = cpu_to_be16(MAX_RX_ADD_QUEUES);	4427	crq.query_capability.capability = cpu_to_be16(MAX_RX_ADD_QUEUES);
4387	atomic_inc(&adapter->running_cap_crqs);
4388	ibmvnic_send_crq(adapter, &crq);	4428	ibmvnic_send_crq(adapter, &crq);
		4429	cap_reqs--;
4389		4430
4390	crq.query_capability.capability =	4431	crq.query_capability.capability =
4391	cpu_to_be16(MIN_TX_ENTRIES_PER_SUBCRQ);	4432	cpu_to_be16(MIN_TX_ENTRIES_PER_SUBCRQ);
4392	atomic_inc(&adapter->running_cap_crqs);
4393	ibmvnic_send_crq(adapter, &crq);	4433	ibmvnic_send_crq(adapter, &crq);
		4434	cap_reqs--;
4394		4435
4395	crq.query_capability.capability =	4436	crq.query_capability.capability =
4396	cpu_to_be16(MIN_RX_ADD_ENTRIES_PER_SUBCRQ);	4437	cpu_to_be16(MIN_RX_ADD_ENTRIES_PER_SUBCRQ);
4397	atomic_inc(&adapter->running_cap_crqs);
4398	ibmvnic_send_crq(adapter, &crq);	4438	ibmvnic_send_crq(adapter, &crq);
		4439	cap_reqs--;
4399		4440
4400	crq.query_capability.capability =	4441	crq.query_capability.capability =
4401	cpu_to_be16(MAX_TX_ENTRIES_PER_SUBCRQ);	4442	cpu_to_be16(MAX_TX_ENTRIES_PER_SUBCRQ);
4402	atomic_inc(&adapter->running_cap_crqs);
4403	ibmvnic_send_crq(adapter, &crq);	4443	ibmvnic_send_crq(adapter, &crq);
		4444	cap_reqs--;
4404		4445
4405	crq.query_capability.capability =	4446	crq.query_capability.capability =
4406	cpu_to_be16(MAX_RX_ADD_ENTRIES_PER_SUBCRQ);	4447	cpu_to_be16(MAX_RX_ADD_ENTRIES_PER_SUBCRQ);
4407	atomic_inc(&adapter->running_cap_crqs);
4408	ibmvnic_send_crq(adapter, &crq);	4448	ibmvnic_send_crq(adapter, &crq);
		4449	cap_reqs--;
4409		4450
4410	crq.query_capability.capability = cpu_to_be16(TCP_IP_OFFLOAD);	4451	crq.query_capability.capability = cpu_to_be16(TCP_IP_OFFLOAD);
4411	atomic_inc(&adapter->running_cap_crqs);
4412	ibmvnic_send_crq(adapter, &crq);	4452	ibmvnic_send_crq(adapter, &crq);
		4453	cap_reqs--;
4413		4454
4414	crq.query_capability.capability = cpu_to_be16(PROMISC_SUPPORTED);	4455	crq.query_capability.capability = cpu_to_be16(PROMISC_SUPPORTED);
4415	atomic_inc(&adapter->running_cap_crqs);
4416	ibmvnic_send_crq(adapter, &crq);	4456	ibmvnic_send_crq(adapter, &crq);
		4457	cap_reqs--;
4417		4458
4418	crq.query_capability.capability = cpu_to_be16(MIN_MTU);	4459	crq.query_capability.capability = cpu_to_be16(MIN_MTU);
4419	atomic_inc(&adapter->running_cap_crqs);
4420	ibmvnic_send_crq(adapter, &crq);	4460	ibmvnic_send_crq(adapter, &crq);
		4461	cap_reqs--;
4421		4462
4422	crq.query_capability.capability = cpu_to_be16(MAX_MTU);	4463	crq.query_capability.capability = cpu_to_be16(MAX_MTU);
4423	atomic_inc(&adapter->running_cap_crqs);
4424	ibmvnic_send_crq(adapter, &crq);	4464	ibmvnic_send_crq(adapter, &crq);
		4465	cap_reqs--;
4425		4466
4426	crq.query_capability.capability = cpu_to_be16(MAX_MULTICAST_FILTERS);	4467	crq.query_capability.capability = cpu_to_be16(MAX_MULTICAST_FILTERS);
4427	atomic_inc(&adapter->running_cap_crqs);
4428	ibmvnic_send_crq(adapter, &crq);	4468	ibmvnic_send_crq(adapter, &crq);
		4469	cap_reqs--;
4429		4470
4430	crq.query_capability.capability = cpu_to_be16(VLAN_HEADER_INSERTION);	4471	crq.query_capability.capability = cpu_to_be16(VLAN_HEADER_INSERTION);
4431	atomic_inc(&adapter->running_cap_crqs);
4432	ibmvnic_send_crq(adapter, &crq);	4472	ibmvnic_send_crq(adapter, &crq);
		4473	cap_reqs--;
4433		4474
4434	crq.query_capability.capability = cpu_to_be16(RX_VLAN_HEADER_INSERTION);	4475	crq.query_capability.capability = cpu_to_be16(RX_VLAN_HEADER_INSERTION);
4435	atomic_inc(&adapter->running_cap_crqs);
4436	ibmvnic_send_crq(adapter, &crq);	4476	ibmvnic_send_crq(adapter, &crq);
		4477	cap_reqs--;
4437		4478
4438	crq.query_capability.capability = cpu_to_be16(MAX_TX_SG_ENTRIES);	4479	crq.query_capability.capability = cpu_to_be16(MAX_TX_SG_ENTRIES);
4439	atomic_inc(&adapter->running_cap_crqs);
4440	ibmvnic_send_crq(adapter, &crq);	4480	ibmvnic_send_crq(adapter, &crq);
		4481	cap_reqs--;
4441		4482
4442	crq.query_capability.capability = cpu_to_be16(RX_SG_SUPPORTED);	4483	crq.query_capability.capability = cpu_to_be16(RX_SG_SUPPORTED);
4443	atomic_inc(&adapter->running_cap_crqs);
4444	ibmvnic_send_crq(adapter, &crq);	4484	ibmvnic_send_crq(adapter, &crq);
		4485	cap_reqs--;
4445		4486
4446	crq.query_capability.capability = cpu_to_be16(OPT_TX_COMP_SUB_QUEUES);	4487	crq.query_capability.capability = cpu_to_be16(OPT_TX_COMP_SUB_QUEUES);
4447	atomic_inc(&adapter->running_cap_crqs);
4448	ibmvnic_send_crq(adapter, &crq);	4488	ibmvnic_send_crq(adapter, &crq);
		4489	cap_reqs--;
4449		4490
4450	crq.query_capability.capability = cpu_to_be16(OPT_RX_COMP_QUEUES);	4491	crq.query_capability.capability = cpu_to_be16(OPT_RX_COMP_QUEUES);
4451	atomic_inc(&adapter->running_cap_crqs);
4452	ibmvnic_send_crq(adapter, &crq);	4492	ibmvnic_send_crq(adapter, &crq);
		4493	cap_reqs--;
4453		4494
4454	crq.query_capability.capability =	4495	crq.query_capability.capability =
4455	cpu_to_be16(OPT_RX_BUFADD_Q_PER_RX_COMP_Q);	4496	cpu_to_be16(OPT_RX_BUFADD_Q_PER_RX_COMP_Q);
4456	atomic_inc(&adapter->running_cap_crqs);
4457	ibmvnic_send_crq(adapter, &crq);	4497	ibmvnic_send_crq(adapter, &crq);
		4498	cap_reqs--;
4458		4499
4459	crq.query_capability.capability =	4500	crq.query_capability.capability =
4460	cpu_to_be16(OPT_TX_ENTRIES_PER_SUBCRQ);	4501	cpu_to_be16(OPT_TX_ENTRIES_PER_SUBCRQ);
4461	atomic_inc(&adapter->running_cap_crqs);
4462	ibmvnic_send_crq(adapter, &crq);	4502	ibmvnic_send_crq(adapter, &crq);
		4503	cap_reqs--;
4463		4504
4464	crq.query_capability.capability =	4505	crq.query_capability.capability =
4465	cpu_to_be16(OPT_RXBA_ENTRIES_PER_SUBCRQ);	4506	cpu_to_be16(OPT_RXBA_ENTRIES_PER_SUBCRQ);
4466	atomic_inc(&adapter->running_cap_crqs);
4467	ibmvnic_send_crq(adapter, &crq);	4507	ibmvnic_send_crq(adapter, &crq);
		4508	cap_reqs--;
4468		4509
4469	crq.query_capability.capability = cpu_to_be16(TX_RX_DESC_REQ);	4510	crq.query_capability.capability = cpu_to_be16(TX_RX_DESC_REQ);
4470	atomic_inc(&adapter->running_cap_crqs);	4511
4471	ibmvnic_send_crq(adapter, &crq);	4512	ibmvnic_send_crq(adapter, &crq);
		4513	cap_reqs--;
		4514
		4515	/* Keep at end to catch any discrepancy between expected and actual
		4516	* CRQs sent.
		4517	*/
		4518	WARN_ON(cap_reqs != 0);
4472	}	4519	}
4473		4520
4474	static void send_query_ip_offload(struct ibmvnic_adapter *adapter)	4521	static void send_query_ip_offload(struct ibmvnic_adapter *adapter)
@@ -4772,6 +4819,8 @@ static void handle_request_cap_rsp(union ibmvnic_crq *crq, · 297 unmodified lines
4772	char *name;	4819	char *name;
4773		4820
4774	atomic_dec(&adapter->running_cap_crqs);	4821	atomic_dec(&adapter->running_cap_crqs);
		4822	netdev_dbg(adapter->netdev, "Outstanding request-caps: %d\n",
		4823	atomic_read(&adapter->running_cap_crqs));
4775	switch (be16_to_cpu(crq->request_capability_rsp.capability)) {	4824	switch (be16_to_cpu(crq->request_capability_rsp.capability)) {
4776	case REQ_TX_QUEUES:	4825	case REQ_TX_QUEUES:
4777	req_value = &adapter->req_tx_queues;	4826	req_value = &adapter->req_tx_queues;
@@ -4835,10 +4884,8 @@ static void handle_request_cap_rsp(union ibmvnic_crq *crq, · 57 unmodified lines
4835	}	4884	}
4836		4885
4837	/* Done receiving requested capabilities, query IP offload support */	4886	/* Done receiving requested capabilities, query IP offload support */
4838	if (atomic_read(&adapter->running_cap_crqs) == 0) {	4887	if (atomic_read(&adapter->running_cap_crqs) == 0)
4839	adapter->wait_capability = false;
4840	send_query_ip_offload(adapter);	4888	send_query_ip_offload(adapter);
4841	}
4842	}	4889	}
4843		4890
4844	static int handle_login_rsp(union ibmvnic_crq *login_rsp_crq,	4891	static int handle_login_rsp(union ibmvnic_crq *login_rsp_crq,
@@ -5136,10 +5183,8 @@ static void handle_query_cap_rsp(union ibmvnic_crq *crq, · 291 unmodified lines
5136	}	5183	}
5137		5184
5138	out:	5185	out:
5139	if (atomic_read(&adapter->running_cap_crqs) == 0) {	5186	if (atomic_read(&adapter->running_cap_crqs) == 0)
5140	adapter->wait_capability = false;
5141	send_request_cap(adapter, 0);	5187	send_request_cap(adapter, 0);
5142	}
5143	}	5188	}
5144		5189
5145	static int send_query_phys_parms(struct ibmvnic_adapter *adapter)	5190	static int send_query_phys_parms(struct ibmvnic_adapter *adapter)
@@ -5435,33 +5480,21 @@ static void ibmvnic_tasklet(struct tasklet_struct *t) · 289 unmodified lines
5435	struct ibmvnic_crq_queue *queue = &adapter->crq;	5480	struct ibmvnic_crq_queue *queue = &adapter->crq;
5436	union ibmvnic_crq *crq;	5481	union ibmvnic_crq *crq;
5437	unsigned long flags;	5482	unsigned long flags;
5438	bool done = false;
5439		5483
5440	spin_lock_irqsave(&queue->lock, flags);	5484	spin_lock_irqsave(&queue->lock, flags);
5441	while (!done) {
5442	/* Pull all the valid messages off the CRQ */
5443	while ((crq = ibmvnic_next_crq(adapter)) != NULL) {
5444	/* This barrier makes sure ibmvnic_next_crq()'s
5445	* crq->generic.first & IBMVNIC_CRQ_CMD_RSP is loaded
5446	* before ibmvnic_handle_crq()'s
5447	* switch(gen_crq->first) and switch(gen_crq->cmd).
5448	*/
5449	dma_rmb();
5450	ibmvnic_handle_crq(crq, adapter);
5451	crq->generic.first = 0;
5452	}
5453		5485
5454	/* remain in tasklet until all	5486	/* Pull all the valid messages off the CRQ */
5455	* capabilities responses are received	5487	while ((crq = ibmvnic_next_crq(adapter)) != NULL) {
		5488	/* This barrier makes sure ibmvnic_next_crq()'s
		5489	* crq->generic.first & IBMVNIC_CRQ_CMD_RSP is loaded
		5490	* before ibmvnic_handle_crq()'s
		5491	* switch(gen_crq->first) and switch(gen_crq->cmd).
5456	*/	5492	*/
5457	if (!adapter->wait_capability)	5493	dma_rmb();
5458	done = true;	5494	ibmvnic_handle_crq(crq, adapter);
		5495	crq->generic.first = 0;
5459	}	5496	}
5460	/* if capabilities CRQ's were sent in this tasklet, the following	5497
5461	* tasklet must wait until all responses are received
5462	*/
5463	if (atomic_read(&adapter->running_cap_crqs) != 0)
5464	adapter->wait_capability = true;
5465	spin_unlock_irqrestore(&queue->lock, flags);	5498	spin_unlock_irqrestore(&queue->lock, flags);
5466	}	5499	}
5467		5500

drivers/net/ethernet/ibm/ibmvnic.h+0−1

@@ -919,7 +919,6 @@ struct ibmvnic_adapter { · 918 unmodified lines
919	int login_rsp_buf_sz;	919	int login_rsp_buf_sz;
920		920
921	atomic_t running_cap_crqs;	921	atomic_t running_cap_crqs;
922	bool wait_capability;
923		922
924	struct ibmvnic_sub_crq_queue **tx_scrq ____cacheline_aligned;	923	struct ibmvnic_sub_crq_queue **tx_scrq ____cacheline_aligned;
925	struct ibmvnic_sub_crq_queue **rx_scrq ____cacheline_aligned;	924	struct ibmvnic_sub_crq_queue **rx_scrq ____cacheline_aligned;

drivers/net/ethernet/intel/i40e/i40e.h+4−5

 struct i40e_lump_tracking {
 	u16 num_entries;
-	u16 search_hint;
 	u16 list[0];
 #define I40E_PILE_VALID_BIT  0x8000
 #define I40E_IWARP_IRQ_PILE_ID  (I40E_PILE_VALID_BIT - 2)
 	struct rtnl_link_stats64 net_stats_offsets;
 	struct i40e_eth_stats eth_stats;
 	struct i40e_eth_stats eth_stats_offsets;
-	u32 tx_restart;
+	u64 tx_restart;
-	u32 tx_busy;
+	u64 tx_busy;
 	u64 tx_linearize;
 	u64 tx_force_wb;
-	u32 rx_buf_failed;
+	u64 rx_buf_failed;
-	u32 rx_page_failed;
+	u64 rx_page_failed;
 	/* These are containers of ring pointers, allocated at run-time */
 	struct i40e_ring **rx_rings;

drivers/net/ethernet/intel/i40e/i40e_debugfs.c+1−1

@@ -240,7 +240,7 @@ static void i40e_dbg_dump_vsi_seid(struct i40e_pf *pf, int seid) · 239 unmodified lines
240	(unsigned long int)vsi->net_stats_offsets.rx_compressed,	240	(unsigned long int)vsi->net_stats_offsets.rx_compressed,
241	(unsigned long int)vsi->net_stats_offsets.tx_compressed);	241	(unsigned long int)vsi->net_stats_offsets.tx_compressed);
242	dev_info(&pf->pdev->dev,	242	dev_info(&pf->pdev->dev,
243	" tx_restart = %d, tx_busy = %d, rx_buf_failed = %d, rx_page_failed = %d\n",	243	" tx_restart = %llu, tx_busy = %llu, rx_buf_failed = %llu, rx_page_failed = %llu\n",
244	vsi->tx_restart, vsi->tx_busy,	244	vsi->tx_restart, vsi->tx_busy,
245	vsi->rx_buf_failed, vsi->rx_page_failed);	245	vsi->rx_buf_failed, vsi->rx_page_failed);
246	rcu_read_lock();	246	rcu_read_lock();

drivers/net/ethernet/intel/i40e/i40e_main.c+21−23

  * @id: an owner id to stick on the items assigned
  *
  * Returns the base item index of the lump, or negative for error
- *
- * The search_hint trick and lack of advanced fit-finding only work
- * because we're highly likely to have all the same size lump requests.
- * Linear search time and any fragmentation should be minimal.
  **/
 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
 			 u16 needed, u16 id)
 		return -EINVAL;
 	}
-	/* start the linear search with an imperfect hint */
+	/* Allocate last queue in the pile for FDIR VSI queue
-	i = pile->search_hint;
+	 * so it doesn't fragment the qp_pile
+	 */
+	if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
+		if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
+			dev_err(&pf->pdev->dev,
+				"Cannot allocate queue %d for I40E_VSI_FDIR\n",
+				pile->num_entries - 1);
+			return -ENOMEM;
+		}
+		pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
+		return pile->num_entries - 1;
+	}
+	i = 0;
 	while (i < pile->num_entries) {
 		/* skip already allocated entries */
 		if (pile->list[i] & I40E_PILE_VALID_BIT) {
 			for (j = 0; j < needed; j++)
 				pile->list[i+j] = id | I40E_PILE_VALID_BIT;
 			ret = i;
-			pile->search_hint = i + j;
 			break;
 		}
 {
 	int valid_id = (id | I40E_PILE_VALID_BIT);
 	int count = 0;
-	int i;
+	u16 i;
 	if (!pile || index >= pile->num_entries)
 		return -EINVAL;
 		count++;
 	}
-	if (count && index < pile->search_hint)
-		pile->search_hint = index;
 	return count;
 }
 	struct rtnl_link_stats64 *ns;   /* netdev stats */
 	struct i40e_eth_stats *oes;
 	struct i40e_eth_stats *es;     /* device's eth stats */
-	u32 tx_restart, tx_busy;
+	u64 tx_restart, tx_busy;
 	struct i40e_ring *p;
-	u32 rx_page, rx_buf;
+	u64 rx_page, rx_buf;
 	u64 bytes, packets;
 	unsigned int start;
 	u64 tx_linearize;
 	}
 	i40e_get_oem_version(&pf->hw);
-	if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
+	if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
-	    ((hw->aq.fw_maj_ver == 4 && hw->aq.fw_min_ver <= 33) ||
+		/* The following delay is necessary for firmware update. */
-	     hw->aq.fw_maj_ver < 4) && hw->mac.type == I40E_MAC_XL710) {
+		mdelay(1000);
-		/* The following delay is necessary for 4.33 firmware and older
-		 * to recover after EMP reset. 200 ms should suffice but we
-		 * put here 300 ms to be sure that FW is ready to operate
-		 * after reset.
-		 */
-		mdelay(300);
 	}
 	/* re-verify the eeprom if we just had an EMP reset */
 		return -ENOMEM;
 	pf->irq_pile->num_entries = vectors;
-	pf->irq_pile->search_hint = 0;
 	/* track first vector for misc interrupts, ignore return */
 	(void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
 		goto sw_init_done;
 	}
 	pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
-	pf->qp_pile->search_hint = 0;
 	pf->tx_timeout_recovery_level = 1;

drivers/net/ethernet/intel/i40e/i40e_register.h+3−0

 #define I40E_VFINT_DYN_CTLN(_INTVF) (0x00024800 + ((_INTVF) * 4)) /* _i=0...511 */ /* Reset: VFR */
 #define I40E_VFINT_DYN_CTLN_CLEARPBA_SHIFT 1
 #define I40E_VFINT_DYN_CTLN_CLEARPBA_MASK I40E_MASK(0x1, I40E_VFINT_DYN_CTLN_CLEARPBA_SHIFT)
+#define I40E_VFINT_ICR0_ADMINQ_SHIFT 30
+#define I40E_VFINT_ICR0_ADMINQ_MASK I40E_MASK(0x1, I40E_VFINT_ICR0_ADMINQ_SHIFT)
+#define I40E_VFINT_ICR0_ENA(_VF) (0x0002C000 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: CORER */
 #define I40E_VPINT_AEQCTL(_VF) (0x0002B800 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: CORER */
 #define I40E_VPINT_AEQCTL_MSIX_INDX_SHIFT 0
 #define I40E_VPINT_AEQCTL_ITR_INDX_SHIFT 11

drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c+101−2

@@ -1376,6 +1376,32 @@ static i40e_status i40e_config_vf_promiscuous_mode(struct i40e_vf *vf, · 1375 unmodified lines
1376	return aq_ret;	1376	return aq_ret;
1377	}	1377	}
1378		1378
		1379	/**
		1380	* i40e_sync_vfr_reset
		1381	* @hw: pointer to hw struct
		1382	* @vf_id: VF identifier
		1383	*
		1384	* Before trigger hardware reset, we need to know if no other process has
		1385	* reserved the hardware for any reset operations. This check is done by
		1386	* examining the status of the RSTAT1 register used to signal the reset.
		1387	**/
		1388	static int i40e_sync_vfr_reset(struct i40e_hw *hw, int vf_id)
		1389	{
		1390	u32 reg;
		1391	int i;
		1392
		1393	for (i = 0; i < I40E_VFR_WAIT_COUNT; i++) {
		1394	reg = rd32(hw, I40E_VFINT_ICR0_ENA(vf_id)) &
		1395	I40E_VFINT_ICR0_ADMINQ_MASK;
		1396	if (reg)
		1397	return 0;
		1398
		1399	usleep_range(100, 200);
		1400	}
		1401
		1402	return -EAGAIN;
		1403	}
		1404
1379	/**	1405	/**
1380	* i40e_trigger_vf_reset	1406	* i40e_trigger_vf_reset
1381	* @vf: pointer to the VF structure	1407	* @vf: pointer to the VF structure
@@ -1390,9 +1416,11 @@ static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr) · 8 unmodified lines
1390	struct i40e_pf *pf = vf->pf;	1416	struct i40e_pf *pf = vf->pf;
1391	struct i40e_hw *hw = &pf->hw;	1417	struct i40e_hw *hw = &pf->hw;
1392	u32 reg, reg_idx, bit_idx;	1418	u32 reg, reg_idx, bit_idx;
		1419	bool vf_active;
		1420	u32 radq;
1393		1421
1394	/* warn the VF */	1422	/* warn the VF */
1395	clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);	1423	vf_active = test_and_clear_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
1396		1424
1397	/* Disable VF's configuration API during reset. The flag is re-enabled	1425	/* Disable VF's configuration API during reset. The flag is re-enabled
1398	* in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.	1426	* in i40e_alloc_vf_res(), when it's safe again to access VF's VSI.
@@ -1406,7 +1434,19 @@ static void i40e_trigger_vf_reset(struct i40e_vf *vf, bool flr) · 7 unmodified lines
1406	* just need to clean up, so don't hit the VFRTRIG register.	1434	* just need to clean up, so don't hit the VFRTRIG register.
1407	*/	1435	*/
1408	if (!flr) {	1436	if (!flr) {
1409	/* reset VF using VPGEN_VFRTRIG reg */	1437	/* Sync VFR reset before trigger next one */
		1438	radq = rd32(hw, I40E_VFINT_ICR0_ENA(vf->vf_id)) &
		1439	I40E_VFINT_ICR0_ADMINQ_MASK;
		1440	if (vf_active && !radq)
		1441	/* waiting for finish reset by virtual driver */
		1442	if (i40e_sync_vfr_reset(hw, vf->vf_id))
		1443	dev_info(&pf->pdev->dev,
		1444	"Reset VF %d never finished\n",
		1445	vf->vf_id);
		1446
		1447	/* Reset VF using VPGEN_VFRTRIG reg. It is also setting
		1448	* in progress state in rstat1 register.
		1449	*/
1410	reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));	1450	reg = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id));
1411	reg \|= I40E_VPGEN_VFRTRIG_VFSWR_MASK;	1451	reg \|= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
1412	wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);	1452	wr32(hw, I40E_VPGEN_VFRTRIG(vf->vf_id), reg);
@@ -2617,6 +2657,59 @@ error_param: · 1204 unmodified lines
2617	aq_ret);	2657	aq_ret);
2618	}	2658	}
2619		2659
		2660	/**
		2661	* i40e_check_enough_queue - find big enough queue number
		2662	* @vf: pointer to the VF info
		2663	* @needed: the number of items needed
		2664	*
		2665	* Returns the base item index of the queue, or negative for error
		2666	**/
		2667	static int i40e_check_enough_queue(struct i40e_vf *vf, u16 needed)
		2668	{
		2669	unsigned int i, cur_queues, more, pool_size;
		2670	struct i40e_lump_tracking *pile;
		2671	struct i40e_pf *pf = vf->pf;
		2672	struct i40e_vsi *vsi;
		2673
		2674	vsi = pf->vsi[vf->lan_vsi_idx];
		2675	cur_queues = vsi->alloc_queue_pairs;
		2676
		2677	/* if current allocated queues are enough for need */
		2678	if (cur_queues >= needed)
		2679	return vsi->base_queue;
		2680
		2681	pile = pf->qp_pile;
		2682	if (cur_queues > 0) {
		2683	/* if the allocated queues are not zero
		2684	* just check if there are enough queues for more
		2685	* behind the allocated queues.
		2686	*/
		2687	more = needed - cur_queues;
		2688	for (i = vsi->base_queue + cur_queues;
		2689	i < pile->num_entries; i++) {
		2690	if (pile->list[i] & I40E_PILE_VALID_BIT)
		2691	break;
		2692
		2693	if (more-- == 1)
		2694	/* there is enough */
		2695	return vsi->base_queue;
		2696	}
		2697	}
		2698
		2699	pool_size = 0;
		2700	for (i = 0; i < pile->num_entries; i++) {
		2701	if (pile->list[i] & I40E_PILE_VALID_BIT) {
		2702	pool_size = 0;
		2703	continue;
		2704	}
		2705	if (needed <= ++pool_size)
		2706	/* there is enough */
		2707	return i;
		2708	}
		2709
		2710	return -ENOMEM;
		2711	}
		2712
2620	/**	2713	/**
2621	* i40e_vc_request_queues_msg	2714	* i40e_vc_request_queues_msg
2622	* @vf: pointer to the VF info	2715	* @vf: pointer to the VF info
@@ -2651,6 +2744,12 @@ static int i40e_vc_request_queues_msg(struct i40e_vf vf, u8 msg) · 28 unmodified lines
2651	req_pairs - cur_pairs,	2744	req_pairs - cur_pairs,
2652	pf->queues_left);	2745	pf->queues_left);
2653	vfres->num_queue_pairs = pf->queues_left + cur_pairs;	2746	vfres->num_queue_pairs = pf->queues_left + cur_pairs;
		2747	} else if (i40e_check_enough_queue(vf, req_pairs) < 0) {
		2748	dev_warn(&pf->pdev->dev,
		2749	"VF %d requested %d more queues, but there is not enough for it.\n",
		2750	vf->vf_id,
		2751	req_pairs - cur_pairs);
		2752	vfres->num_queue_pairs = cur_pairs;
2654	} else {	2753	} else {
2655	/* successful request */	2754	/* successful request */
2656	vf->num_req_queues = req_pairs;	2755	vf->num_req_queues = req_pairs;

drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h+1−0

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	#define I40E_MAX_VF_PROMISC_FLAGS 3	19	#define I40E_MAX_VF_PROMISC_FLAGS 3
20		20
21	#define I40E_VF_STATE_WAIT_COUNT 20	21	#define I40E_VF_STATE_WAIT_COUNT 20
		22	#define I40E_VFR_WAIT_COUNT 100
22		23
23	/* Various queue ctrls */	24	/* Various queue ctrls */
24	enum i40e_queue_ctrl {	25	enum i40e_queue_ctrl {

drivers/net/ethernet/marvell/octeontx2/af/cgx.c+2−0

@@ -1570,6 +1570,8 @@ static struct mac_ops cgx_mac_ops = { · 1569 unmodified lines
1570	.mac_enadis_pause_frm = cgx_lmac_enadis_pause_frm,	1570	.mac_enadis_pause_frm = cgx_lmac_enadis_pause_frm,
1571	.mac_pause_frm_config = cgx_lmac_pause_frm_config,	1571	.mac_pause_frm_config = cgx_lmac_pause_frm_config,
1572	.mac_enadis_ptp_config = cgx_lmac_ptp_config,	1572	.mac_enadis_ptp_config = cgx_lmac_ptp_config,
		1573	.mac_rx_tx_enable = cgx_lmac_rx_tx_enable,
		1574	.mac_tx_enable = cgx_lmac_tx_enable,
1573	};	1575	};
1574		1576
1575	static int cgx_probe(struct pci_dev pdev, const struct pci_device_id id)	1577	static int cgx_probe(struct pci_dev pdev, const struct pci_device_id id)

drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h+3−0

@@ -107,6 +107,9 @@ struct mac_ops { · 106 unmodified lines
107	void (mac_enadis_ptp_config)(void cgxd,	107	void (mac_enadis_ptp_config)(void cgxd,
108	int lmac_id,	108	int lmac_id,
109	bool enable);	109	bool enable);
		110
		111	int (mac_rx_tx_enable)(void cgxd, int lmac_id, bool enable);
		112	int (mac_tx_enable)(void cgxd, int lmac_id, bool enable);
110	};	113	};
111		114
112	struct cgx {	115	struct cgx {

drivers/net/ethernet/marvell/octeontx2/af/mbox.h+1−0

@@ -732,6 +732,7 @@ enum nix_af_status { · 731 unmodified lines
732	NIX_AF_ERR_BANDPROF_INVAL_REQ = -428,	732	NIX_AF_ERR_BANDPROF_INVAL_REQ = -428,
733	NIX_AF_ERR_CQ_CTX_WRITE_ERR = -429,	733	NIX_AF_ERR_CQ_CTX_WRITE_ERR = -429,
734	NIX_AF_ERR_AQ_CTX_RETRY_WRITE = -430,	734	NIX_AF_ERR_AQ_CTX_RETRY_WRITE = -430,
		735	NIX_AF_ERR_LINK_CREDITS = -431,
735	};	736	};
736		737
737	/* For NIX RX vtag action */	738	/* For NIX RX vtag action */

drivers/net/ethernet/marvell/octeontx2/af/npc_profile.h+35−35

 	NPC_S_KPU2_QINQ,
 	NPC_S_KPU2_ETAG,
 	NPC_S_KPU2_EXDSA,
-	NPC_S_KPU2_NGIO,
 	NPC_S_KPU2_CPT_CTAG,
 	NPC_S_KPU2_CPT_QINQ,
 	NPC_S_KPU3_CTAG,
 	NPC_S_KPU5_NSH,
 	NPC_S_KPU5_CPT_IP,
 	NPC_S_KPU5_CPT_IP6,
+	NPC_S_KPU5_NGIO,
 	NPC_S_KPU6_IP6_EXT,
 	NPC_S_KPU6_IP6_HOP_DEST,
 	NPC_S_KPU6_IP6_ROUT,
 		0x0000,
 		0x0000,
 	},
-	{
-		NPC_S_KPU1_ETHER, 0xff,
-		NPC_ETYPE_CTAG,
-		0xffff,
-		NPC_ETYPE_NGIO,
-		0xffff,
-		0x0000,
-		0x0000,
-	},
 	{
 		NPC_S_KPU1_ETHER, 0xff,
 		NPC_ETYPE_CTAG,
 		0x0000,
 		0x0000,
 	},
+	{
+		NPC_S_KPU2_CTAG, 0xff,
+		NPC_ETYPE_NGIO,
+		0xffff,
+		0x0000,
+		0x0000,
+		0x0000,
+		0x0000,
+	},
 	{
 		NPC_S_KPU2_CTAG, 0xff,
 		NPC_ETYPE_PPPOE,
 		0x0000,
 		0x0000,
 	},
-	{
-		NPC_S_KPU2_NGIO, 0xff,
-		0x0000,
-		0x0000,
-		0x0000,
-		0x0000,
-		0x0000,
-		0x0000,
-	},
 	{
 		NPC_S_KPU2_CPT_CTAG, 0xff,
 		NPC_ETYPE_IP,
 		0x0000,
 		0x0000,
 	},
+	{
+		NPC_S_KPU5_NGIO, 0xff,
+		0x0000,
+		0x0000,
+		0x0000,
+		0x0000,
+		0x0000,
+		0x0000,
+	},
 	{
 		NPC_S_NA, 0X00,
 		0x0000,
 		0,
 		0, 0, 0, 0,
 	},
-	{
-		NPC_ERRLEV_RE, NPC_EC_NOERR,
-		8, 12, 0, 0, 0,
-		NPC_S_KPU2_NGIO, 12, 1,
-		NPC_LID_LA, NPC_LT_LA_ETHER,
-		0,
-		0, 0, 0, 0,
-	},
 	{
 		NPC_ERRLEV_RE, NPC_EC_NOERR,
 		8, 12, 0, 0, 0,
 		0,
 		0, 0, 0, 0,
 	},
+	{
+		NPC_ERRLEV_RE, NPC_EC_NOERR,
+		0, 0, 0, 2, 0,
+		NPC_S_KPU5_NGIO, 6, 1,
+		NPC_LID_LB, NPC_LT_LB_CTAG,
+		0,
+		0, 0, 0, 0,
+	},
 	{
 		NPC_ERRLEV_RE, NPC_EC_NOERR,
 		8, 0, 6, 2, 0,
 		NPC_F_LB_U_UNK_ETYPE | NPC_F_LB_L_EXDSA,
 		0, 0, 0, 0,
 	},
-	{
-		NPC_ERRLEV_RE, NPC_EC_NOERR,
-		0, 0, 0, 0, 1,
-		NPC_S_NA, 0, 1,
-		NPC_LID_LC, NPC_LT_LC_NGIO,
-		0,
-		0, 0, 0, 0,
-	},
 	{
 		NPC_ERRLEV_RE, NPC_EC_NOERR,
 		8, 0, 6, 2, 0,
 		0,
 		0, 0, 0, 0,
 	},
+	{
+		NPC_ERRLEV_RE, NPC_EC_NOERR,
+		0, 0, 0, 0, 1,
+		NPC_S_NA, 0, 1,
+		NPC_LID_LC, NPC_LT_LC_NGIO,
+		0,
+		0, 0, 0, 0,
+	},
 	{
 		NPC_ERRLEV_LC, NPC_EC_UNK,
 		0, 0, 0, 0, 1,

drivers/net/ethernet/marvell/octeontx2/af/rpm.c+51−15

@@ -30,6 +30,8 @@ static struct mac_ops rpm_mac_ops = { · 29 unmodified lines
30	.mac_enadis_pause_frm = rpm_lmac_enadis_pause_frm,	30	.mac_enadis_pause_frm = rpm_lmac_enadis_pause_frm,
31	.mac_pause_frm_config = rpm_lmac_pause_frm_config,	31	.mac_pause_frm_config = rpm_lmac_pause_frm_config,
32	.mac_enadis_ptp_config = rpm_lmac_ptp_config,	32	.mac_enadis_ptp_config = rpm_lmac_ptp_config,
		33	.mac_rx_tx_enable = rpm_lmac_rx_tx_enable,
		34	.mac_tx_enable = rpm_lmac_tx_enable,
33	};	35	};
34		36
35	struct mac_ops *rpm_get_mac_ops(void)	37	struct mac_ops *rpm_get_mac_ops(void)
@@ -54,6 +56,43 @@ int rpm_get_nr_lmacs(void *rpmd) · 18 unmodified lines
54	return hweight8(rpm_read(rpm, 0, CGXX_CMRX_RX_LMACS) & 0xFULL);	56	return hweight8(rpm_read(rpm, 0, CGXX_CMRX_RX_LMACS) & 0xFULL);
55	}	57	}
56		58
		59	int rpm_lmac_tx_enable(void *rpmd, int lmac_id, bool enable)
		60	{
		61	rpm_t *rpm = rpmd;
		62	u64 cfg, last;
		63
		64	if (!is_lmac_valid(rpm, lmac_id))
		65	return -ENODEV;
		66
		67	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
		68	last = cfg;
		69	if (enable)
		70	cfg \|= RPM_TX_EN;
		71	else
		72	cfg &= ~(RPM_TX_EN);
		73
		74	if (cfg != last)
		75	rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
		76	return !!(last & RPM_TX_EN);
		77	}
		78
		79	int rpm_lmac_rx_tx_enable(void *rpmd, int lmac_id, bool enable)
		80	{
		81	rpm_t *rpm = rpmd;
		82	u64 cfg;
		83
		84	if (!is_lmac_valid(rpm, lmac_id))
		85	return -ENODEV;
		86
		87	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
		88	if (enable)
		89	cfg \|= RPM_RX_EN \| RPM_TX_EN;
		90	else
		91	cfg &= ~(RPM_RX_EN \| RPM_TX_EN);
		92	rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
		93	return 0;
		94	}
		95
57	void rpm_lmac_enadis_rx_pause_fwding(void *rpmd, int lmac_id, bool enable)	96	void rpm_lmac_enadis_rx_pause_fwding(void *rpmd, int lmac_id, bool enable)
58	{	97	{
59	rpm_t *rpm = rpmd;	98	rpm_t *rpm = rpmd;
@@ -252,23 +291,20 @@ int rpm_lmac_internal_loopback(void *rpmd, int lmac_id, bool enable) · 192 unmodified lines
252	if (!rpm \|\| lmac_id >= rpm->lmac_count)	291	if (!rpm \|\| lmac_id >= rpm->lmac_count)
253	return -ENODEV;	292	return -ENODEV;
254	lmac_type = rpm->mac_ops->get_lmac_type(rpm, lmac_id);	293	lmac_type = rpm->mac_ops->get_lmac_type(rpm, lmac_id);
255	if (lmac_type == LMAC_MODE_100G_R) {	294
256	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1);	295	if (lmac_type == LMAC_MODE_QSGMII \|\| lmac_type == LMAC_MODE_SGMII) {
257		296	dev_err(&rpm->pdev->dev, "loopback not supported for LPC mode\n");
258	if (enable)	297	return 0;
259	cfg \|= RPMX_MTI_PCS_LBK;
260	else
261	cfg &= ~RPMX_MTI_PCS_LBK;
262	rpm_write(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1, cfg);
263	} else {
264	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_LPCSX_CONTROL1);
265	if (enable)
266	cfg \|= RPMX_MTI_PCS_LBK;
267	else
268	cfg &= ~RPMX_MTI_PCS_LBK;
269	rpm_write(rpm, lmac_id, RPMX_MTI_LPCSX_CONTROL1, cfg);
270	}	298	}
271		299
		300	cfg = rpm_read(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1);
		301
		302	if (enable)
		303	cfg \|= RPMX_MTI_PCS_LBK;
		304	else
		305	cfg &= ~RPMX_MTI_PCS_LBK;
		306	rpm_write(rpm, lmac_id, RPMX_MTI_PCS100X_CONTROL1, cfg);
		307
272	return 0;	308	return 0;
273	}	309	}
274		310

drivers/net/ethernet/marvell/octeontx2/af/rpm.h+4−0

 #define RPMX_MTI_STAT_DATA_HI_CDC            0x10038
 #define RPM_LMAC_FWI			0xa
+#define RPM_TX_EN			BIT_ULL(0)
+#define RPM_RX_EN			BIT_ULL(1)
 /* Function Declarations */
 int rpm_get_nr_lmacs(void *rpmd);
 int rpm_get_tx_stats(void *rpmd, int lmac_id, int idx, u64 *tx_stat);
 int rpm_get_rx_stats(void *rpmd, int lmac_id, int idx, u64 *rx_stat);
 void rpm_lmac_ptp_config(void *rpmd, int lmac_id, bool enable);
+int rpm_lmac_rx_tx_enable(void *rpmd, int lmac_id, bool enable);
+int rpm_lmac_tx_enable(void *rpmd, int lmac_id, bool enable);
 #endif /* RPM_H */

drivers/net/ethernet/marvell/octeontx2/af/rvu.c+5−2

 	rvu_write64(rvu, blkaddr, rst_reg, BIT_ULL(0));
 	err = rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true);
-	if (err)
+	if (err) {
-		dev_err(rvu->dev, "HW block:%d reset failed\n", blkaddr);
+		dev_err(rvu->dev, "HW block:%d reset timeout retrying again\n", blkaddr);
+		while (rvu_poll_reg(rvu, blkaddr, rst_reg, BIT_ULL(63), true) == -EBUSY)
+			;
+	}
 }
 static void rvu_reset_all_blocks(struct rvu *rvu)

drivers/net/ethernet/marvell/octeontx2/af/rvu.h+1−0

@@ -806,6 +806,7 @@ bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature); · 805 unmodified lines
806	u32 rvu_cgx_get_fifolen(struct rvu *rvu);	806	u32 rvu_cgx_get_fifolen(struct rvu *rvu);
807	void rvu_first_cgx_pdata(struct rvu rvu);	807	void rvu_first_cgx_pdata(struct rvu rvu);
808	int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id);	808	int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id);
		809	int rvu_cgx_config_tx(void *cgxd, int lmac_id, bool enable);
809		810
810	int npc_get_nixlf_mcam_index(struct npc_mcam *mcam, u16 pcifunc, int nixlf,	811	int npc_get_nixlf_mcam_index(struct npc_mcam *mcam, u16 pcifunc, int nixlf,
811	int type);	812	int type);

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c+12−2

 int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)
 {
 	int pf = rvu_get_pf(pcifunc);
+	struct mac_ops *mac_ops;
 	u8 cgx_id, lmac_id;
+	void *cgxd;
 	if (!is_cgx_config_permitted(rvu, pcifunc))
 		return LMAC_AF_ERR_PERM_DENIED;
 	rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
+	cgxd = rvu_cgx_pdata(cgx_id, rvu);
+	mac_ops = get_mac_ops(cgxd);
+	return mac_ops->mac_rx_tx_enable(cgxd, lmac_id, start);
+}
-	cgx_lmac_rx_tx_enable(rvu_cgx_pdata(cgx_id, rvu), lmac_id, start);
+int rvu_cgx_config_tx(void *cgxd, int lmac_id, bool enable)
+{
+	struct mac_ops *mac_ops;
-	return 0;
+	mac_ops = get_mac_ops(cgxd);
+	return mac_ops->mac_tx_enable(cgxd, lmac_id, enable);
 }
 void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc)

drivers/net/ethernet/marvell/octeontx2/af/rvu_debugfs.c+2−0

@@ -1224,6 +1224,8 @@ static void print_nix_cn10k_sq_ctx(struct seq_file *m, · 1223 unmodified lines
1224	seq_printf(m, "W3: head_offset\t\t\t%d\nW3: smenq_next_sqb_vld\t\t%d\n\n",	1224	seq_printf(m, "W3: head_offset\t\t\t%d\nW3: smenq_next_sqb_vld\t\t%d\n\n",
1225	sq_ctx->head_offset, sq_ctx->smenq_next_sqb_vld);	1225	sq_ctx->head_offset, sq_ctx->smenq_next_sqb_vld);
1226		1226
		1227	seq_printf(m, "W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d\n",
		1228	sq_ctx->smq_next_sq_vld, sq_ctx->smq_pend);
1227	seq_printf(m, "W4: next_sqb \t\t\t%llx\n\n", sq_ctx->next_sqb);	1229	seq_printf(m, "W4: next_sqb \t\t\t%llx\n\n", sq_ctx->next_sqb);
1228	seq_printf(m, "W5: tail_sqb \t\t\t%llx\n\n", sq_ctx->tail_sqb);	1230	seq_printf(m, "W5: tail_sqb \t\t\t%llx\n\n", sq_ctx->tail_sqb);
1229	seq_printf(m, "W6: smenq_sqb \t\t\t%llx\n\n", sq_ctx->smenq_sqb);	1231	seq_printf(m, "W6: smenq_sqb \t\t\t%llx\n\n", sq_ctx->smenq_sqb);

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c+10−10

 	cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST);
 	lmac_chan_cnt = cfg & 0xFF;
-	cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
-	sdp_chan_cnt = cfg & 0xFFF;
 	cgx_bpid_cnt = hw->cgx_links * lmac_chan_cnt;
 	lbk_bpid_cnt = hw->lbk_links * ((cfg >> 16) & 0xFF);
+	cfg = rvu_read64(rvu, blkaddr, NIX_AF_CONST1);
+	sdp_chan_cnt = cfg & 0xFFF;
 	sdp_bpid_cnt = hw->sdp_links * sdp_chan_cnt;
 	pfvf = rvu_get_pfvf(rvu, req->hdr.pcifunc);
 	/* enable cgx tx if disabled */
 	if (is_pf_cgxmapped(rvu, pf)) {
 		rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
-		restore_tx_en = !cgx_lmac_tx_enable(rvu_cgx_pdata(cgx_id, rvu),
+		restore_tx_en = !rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu),
-						    lmac_id, true);
+						   lmac_id, true);
 	}
 	cfg = rvu_read64(rvu, blkaddr, NIX_AF_SMQX_CFG(smq));
 	rvu_cgx_enadis_rx_bp(rvu, pf, true);
 	/* restore cgx tx state */
 	if (restore_tx_en)
-		cgx_lmac_tx_enable(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);
+		rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);
 	return err;
 }
 	/* Enable cgx tx if disabled for credits to be back */
 	if (is_pf_cgxmapped(rvu, pf)) {
 		rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
-		restore_tx_en = !cgx_lmac_tx_enable(rvu_cgx_pdata(cgx_id, rvu),
+		restore_tx_en = !rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu),
 						    lmac_id, true);
 	}
 			    NIX_AF_TL1X_SW_XOFF(schq), BIT_ULL(0));
 	}
-	rc = -EBUSY;
+	rc = NIX_AF_ERR_LINK_CREDITS;
-	poll_tmo = jiffies + usecs_to_jiffies(10000);
+	poll_tmo = jiffies + usecs_to_jiffies(200000);
 	/* Wait for credits to return */
 	do {
 		if (time_after(jiffies, poll_tmo))
 	/* Restore state of cgx tx */
 	if (restore_tx_en)
-		cgx_lmac_tx_enable(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);
+		rvu_cgx_config_tx(rvu_cgx_pdata(cgx_id, rvu), lmac_id, false);
 	mutex_unlock(&rvu->rsrc_lock);
 	return rc;

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c+19−3

 			      int blkaddr, int index, struct mcam_entry *entry,
 			      bool *enable)
 {
+	struct rvu_npc_mcam_rule *rule;
 	u16 owner, target_func;
 	struct rvu_pfvf *pfvf;
 	u64 rx_action;
 	      test_bit(NIXLF_INITIALIZED, &pfvf->flags)))
 		*enable = false;
+	/* fix up not needed for the rules added by user(ntuple filters) */
+	list_for_each_entry(rule, &mcam->mcam_rules, list) {
+		if (rule->entry == index)
+			return;
+	}
 	/* copy VF default entry action to the VF mcam entry */
 	rx_action = npc_get_default_entry_action(rvu, mcam, blkaddr,
 						 target_func);
 	}
 	/* PF installing VF rule */
-	if (intf == NIX_INTF_RX && actindex < mcam->bmap_entries)
+	if (is_npc_intf_rx(intf) && actindex < mcam->bmap_entries)
-		npc_fixup_vf_rule(rvu, mcam, blkaddr, index, entry, &enable);
+		npc_fixup_vf_rule(rvu, mcam, blkaddr, actindex, entry, &enable);
 	/* Set 'action' */
 	rvu_write64(rvu, blkaddr,
 				     int blkaddr, u16 pcifunc, u64 rx_action)
 {
 	int actindex, index, bank, entry;
-	bool enable;
+	struct rvu_npc_mcam_rule *rule;
+	bool enable, update;
 	if (!(pcifunc & RVU_PFVF_FUNC_MASK))
 		return;
 	mutex_lock(&mcam->lock);
 	for (index = 0; index < mcam->bmap_entries; index++) {
 		if (mcam->entry2target_pffunc[index] == pcifunc) {
+			update = true;
+			/* update not needed for the rules added via ntuple filters */
+			list_for_each_entry(rule, &mcam->mcam_rules, list) {
+				if (rule->entry == index)
+					update = false;
+			}
+			if (!update)
+				continue;
 			bank = npc_get_bank(mcam, index);
 			actindex = index;
 			entry = index & (mcam->banksize - 1);

drivers/net/ethernet/marvell/octeontx2/af/rvu_npc_fs.c+12−8

 		write_req.cntr = rule->cntr;
 	}
-	err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &write_req,
-						    &write_rsp);
-	if (err) {
-		rvu_mcam_remove_counter_from_rule(rvu, owner, rule);
-		if (new)
-			kfree(rule);
-		return err;
-	}
 	/* update rule */
 	memcpy(&rule->packet, &dummy.packet, sizeof(rule->packet));
 	memcpy(&rule->mask, &dummy.mask, sizeof(rule->mask));
 	if (req->default_rule)
 		pfvf->def_ucast_rule = rule;
+	/* write to mcam entry registers */
+	err = rvu_mbox_handler_npc_mcam_write_entry(rvu, &write_req,
+						    &write_rsp);
+	if (err) {
+		rvu_mcam_remove_counter_from_rule(rvu, owner, rule);
+		if (new) {
+			list_del(&rule->list);
+			kfree(rule);
+		}
+		return err;
+	}
 	/* VF's MAC address is being changed via PF  */
 	if (pf_set_vfs_mac) {
 		ether_addr_copy(pfvf->default_mac, req->packet.dmac);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h+1−0

@@ -603,6 +603,7 @@ static inline void __cn10k_aura_freeptr(struct otx2_nic *pfvf, u64 aura, · 602 unmodified lines
603	size++;	603	size++;
604	tar_addr \|= ((size - 1) & 0x7) << 4;	604	tar_addr \|= ((size - 1) & 0x7) << 4;
605	}	605	}
		606	dma_wmb();
606	memcpy((u64 )lmt_info->lmt_addr, ptrs, sizeof(u64) num_ptrs);	607	memcpy((u64 )lmt_info->lmt_addr, ptrs, sizeof(u64) num_ptrs);
607	/* Perform LMTST flush */	608	/* Perform LMTST flush */
608	cn10k_lmt_flush(val, tar_addr);	609	cn10k_lmt_flush(val, tar_addr);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c+6−1

 		dst_mdev->msg_size = mbox_hdr->msg_size;
 		dst_mdev->num_msgs = num_msgs;
 		err = otx2_sync_mbox_msg(dst_mbox);
-		if (err) {
+		/* Error code -EIO indicate there is a communication failure
+		 * to the AF. Rest of the error codes indicate that AF processed
+		 * VF messages and set the error codes in response messages
+		 * (if any) so simply forward responses to VF.
+		 */
+		if (err == -EIO) {
 			dev_warn(pf->dev,
 				 "AF not responding to VF%d messages\n", vf);
 			/* restore PF mbase and exit */

drivers/net/ethernet/microchip/lan966x/lan966x_mac.c+6−5

@@ -40,11 +40,12 @@ static int lan966x_mac_wait_for_completion(struct lan966x *lan966x) · 39 unmodified lines
40	{	40	{
41	u32 val;	41	u32 val;
42		42
43	return readx_poll_timeout(lan966x_mac_get_status,	43	return readx_poll_timeout_atomic(lan966x_mac_get_status,
44	lan966x, val,	44	lan966x, val,
45	(ANA_MACACCESS_MAC_TABLE_CMD_GET(val)) ==	45	(ANA_MACACCESS_MAC_TABLE_CMD_GET(val)) ==
46	MACACCESS_CMD_IDLE,	46	MACACCESS_CMD_IDLE,
47	TABLE_UPDATE_SLEEP_US, TABLE_UPDATE_TIMEOUT_US);	47	TABLE_UPDATE_SLEEP_US,
		48	TABLE_UPDATE_TIMEOUT_US);
48	}	49	}
49		50
50	static void lan966x_mac_select(struct lan966x *lan966x,	51	static void lan966x_mac_select(struct lan966x *lan966x,

drivers/net/ethernet/microchip/lan966x/lan966x_main.c+3−3

@@ -182,9 +182,9 @@ static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp) · 181 unmodified lines
182	{	182	{
183	u32 val;	183	u32 val;
184		184
185	return readx_poll_timeout(lan966x_port_inj_status, lan966x, val,	185	return readx_poll_timeout_atomic(lan966x_port_inj_status, lan966x, val,
186	QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp),	186	QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp),
187	READL_SLEEP_US, READL_TIMEOUT_US);	187	READL_SLEEP_US, READL_TIMEOUT_US);
188	}	188	}
189		189
190	static int lan966x_port_ifh_xmit(struct sk_buff *skb,	190	static int lan966x_port_ifh_xmit(struct sk_buff *skb,

drivers/net/ethernet/seeq/ether3.c+3−1

 	const struct ether3_data *data = id->data;
 	struct net_device *dev;
 	int bus_type, ret;
+	u8 addr[ETH_ALEN];
 	ether3_banner();
 	priv(dev)->seeq = priv(dev)->base + data->base_offset;
 	dev->irq = ec->irq;
-	ether3_addr(dev->dev_addr, ec);
+	ether3_addr(addr, ec);
+	eth_hw_addr_set(dev, addr);
 	priv(dev)->dev = dev;
 	timer_setup(&priv(dev)->timer, ether3_ledoff, 0);

drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c+1−1

@@ -756,7 +756,7 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv) · 755 unmodified lines
756		756
757	if (err) {	757	if (err) {
758	dev_err(priv->device, "EMAC reset timeout\n");	758	dev_err(priv->device, "EMAC reset timeout\n");
759	return -EFAULT;	759	return err;
760	}	760	}
761	return 0;	761	return 0;
762	}	762	}

drivers/net/ethernet/stmicro/stmmac/dwmac-visconti.c+26−16

 #define ETHER_CLK_SEL_RMII_CLK_EN BIT(2)
 #define ETHER_CLK_SEL_RMII_CLK_RST BIT(3)
 #define ETHER_CLK_SEL_DIV_SEL_2 BIT(4)
-#define ETHER_CLK_SEL_DIV_SEL_20 BIT(0)
+#define ETHER_CLK_SEL_DIV_SEL_20 0
 #define ETHER_CLK_SEL_FREQ_SEL_125M	(BIT(9) | BIT(8))
 #define ETHER_CLK_SEL_FREQ_SEL_50M	BIT(9)
 #define ETHER_CLK_SEL_FREQ_SEL_25M	BIT(8)
 #define ETHER_CLK_SEL_FREQ_SEL_2P5M	0
-#define ETHER_CLK_SEL_TX_CLK_EXT_SEL_IN BIT(0)
+#define ETHER_CLK_SEL_TX_CLK_EXT_SEL_IN 0
 #define ETHER_CLK_SEL_TX_CLK_EXT_SEL_TXC BIT(10)
 #define ETHER_CLK_SEL_TX_CLK_EXT_SEL_DIV BIT(11)
-#define ETHER_CLK_SEL_RX_CLK_EXT_SEL_IN  BIT(0)
+#define ETHER_CLK_SEL_RX_CLK_EXT_SEL_IN  0
 #define ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC BIT(12)
 #define ETHER_CLK_SEL_RX_CLK_EXT_SEL_DIV BIT(13)
-#define ETHER_CLK_SEL_TX_CLK_O_TX_I	 BIT(0)
+#define ETHER_CLK_SEL_TX_CLK_O_TX_I	 0
 #define ETHER_CLK_SEL_TX_CLK_O_RMII_I	 BIT(14)
 #define ETHER_CLK_SEL_TX_O_E_N_IN	 BIT(15)
-#define ETHER_CLK_SEL_RMII_CLK_SEL_IN	 BIT(0)
+#define ETHER_CLK_SEL_RMII_CLK_SEL_IN	 0
 #define ETHER_CLK_SEL_RMII_CLK_SEL_RX_C	 BIT(16)
 #define ETHER_CLK_SEL_RX_TX_CLK_EN (ETHER_CLK_SEL_RX_CLK_EN | ETHER_CLK_SEL_TX_CLK_EN)
 	val |= ETHER_CLK_SEL_TX_O_E_N_IN;
 	writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
+	/* Set Clock-Mux, Start clock, Set TX_O direction */
 	switch (dwmac->phy_intf_sel) {
 	case ETHER_CONFIG_INTF_RGMII:
 		val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC;
+		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
+		val |= ETHER_CLK_SEL_RX_TX_CLK_EN;
+		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
+		val &= ~ETHER_CLK_SEL_TX_O_E_N_IN;
+		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
 		break;
 	case ETHER_CONFIG_INTF_RMII:
 		val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_DIV |
-			ETHER_CLK_SEL_TX_CLK_EXT_SEL_TXC | ETHER_CLK_SEL_TX_O_E_N_IN |
+			ETHER_CLK_SEL_TX_CLK_EXT_SEL_DIV | ETHER_CLK_SEL_TX_O_E_N_IN |
 			ETHER_CLK_SEL_RMII_CLK_SEL_RX_C;
+		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
+		val |= ETHER_CLK_SEL_RMII_CLK_RST;
+		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
+		val |= ETHER_CLK_SEL_RMII_CLK_EN | ETHER_CLK_SEL_RX_TX_CLK_EN;
+		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
 		break;
 	case ETHER_CONFIG_INTF_MII:
 	default:
 		val = clk_sel_val | ETHER_CLK_SEL_RX_CLK_EXT_SEL_RXC |
-			ETHER_CLK_SEL_TX_CLK_EXT_SEL_DIV | ETHER_CLK_SEL_TX_O_E_N_IN |
+			ETHER_CLK_SEL_TX_CLK_EXT_SEL_TXC | ETHER_CLK_SEL_TX_O_E_N_IN;
-			ETHER_CLK_SEL_RMII_CLK_EN;
+		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
+		val |= ETHER_CLK_SEL_RX_TX_CLK_EN;
+		writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
 		break;
 	}
-	/* Start clock */
-	writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
-	val |= ETHER_CLK_SEL_RX_TX_CLK_EN;
-	writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
-	val &= ~ETHER_CLK_SEL_TX_O_E_N_IN;
-	writel(val, dwmac->reg + REG_ETHER_CLOCK_SEL);
 	spin_unlock_irqrestore(&dwmac->lock, flags);
 }

drivers/net/ethernet/stmicro/stmmac/stmmac.h+0−2

 	u32 tx_coal_timer[MTL_MAX_TX_QUEUES];
 	u32 rx_coal_frames[MTL_MAX_TX_QUEUES];
-	int tx_coalesce;
 	int hwts_tx_en;
 	bool tx_path_in_lpi_mode;
 	bool tso;
 	unsigned int flow_ctrl;
 	unsigned int pause;
 	struct mii_bus *mii;
-	int mii_irq[PHY_MAX_ADDR];
 	struct phylink_config phylink_config;
 	struct phylink *phylink;

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+19−17

  * Description: this function is to verify and enter in LPI mode in case of
  * EEE.
  */
-static void stmmac_enable_eee_mode(struct stmmac_priv *priv)
+static int stmmac_enable_eee_mode(struct stmmac_priv *priv)
 {
 	u32 tx_cnt = priv->plat->tx_queues_to_use;
 	u32 queue;
 		struct stmmac_tx_queue *tx_q = &priv->tx_queue[queue];
 		if (tx_q->dirty_tx != tx_q->cur_tx)
-			return; /* still unfinished work */
+			return -EBUSY; /* still unfinished work */
 	}
 	/* Check and enter in LPI mode */
 	if (!priv->tx_path_in_lpi_mode)
 		stmmac_set_eee_mode(priv, priv->hw,
 				priv->plat->en_tx_lpi_clockgating);
+	return 0;
 }
 /**
 {
 	struct stmmac_priv *priv = from_timer(priv, t, eee_ctrl_timer);
-	stmmac_enable_eee_mode(priv);
+	if (stmmac_enable_eee_mode(priv))
-	mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));
+		mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));
 }
 /**
 	bool xmac = priv->plat->has_gmac4 || priv->plat->has_xgmac;
 	int ret;
+	if (priv->plat->ptp_clk_freq_config)
+		priv->plat->ptp_clk_freq_config(priv);
 	ret = stmmac_init_tstamp_counter(priv, STMMAC_HWTS_ACTIVE);
 	if (ret)
 		return ret;
 	priv->hwts_tx_en = 0;
 	priv->hwts_rx_en = 0;
-	stmmac_ptp_register(priv);
 	return 0;
 }
 	if (priv->eee_enabled && !priv->tx_path_in_lpi_mode &&
 	    priv->eee_sw_timer_en) {
-		stmmac_enable_eee_mode(priv);
+		if (stmmac_enable_eee_mode(priv))
-		mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));
+			mod_timer(&priv->eee_ctrl_timer, STMMAC_LPI_T(priv->tx_lpi_timer));
 	}
 	/* We still have pending packets, let's call for a new scheduling */
 /**
  * stmmac_hw_setup - setup mac in a usable state.
  *  @dev : pointer to the device structure.
- *  @init_ptp: initialize PTP if set
+ *  @ptp_register: register PTP if set
  *  Description:
  *  this is the main function to setup the HW in a usable state because the
  *  dma engine is reset, the core registers are configured (e.g. AXI,
  *  0 on success and an appropriate (-)ve integer as defined in errno.h
  *  file on failure.
  */
-static int stmmac_hw_setup(struct net_device *dev, bool init_ptp)
+static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)
 {
 	struct stmmac_priv *priv = netdev_priv(dev);
 	u32 rx_cnt = priv->plat->rx_queues_to_use;
 	stmmac_mmc_setup(priv);
-	if (init_ptp) {
+	ret = stmmac_init_ptp(priv);
-		ret = stmmac_init_ptp(priv);
+	if (ret == -EOPNOTSUPP)
-		if (ret == -EOPNOTSUPP)
+		netdev_warn(priv->dev, "PTP not supported by HW\n");
-			netdev_warn(priv->dev, "PTP not supported by HW\n");
+	else if (ret)
-		else if (ret)
+		netdev_warn(priv->dev, "PTP init failed\n");
-			netdev_warn(priv->dev, "PTP init failed\n");
+	else if (ptp_register)
-	}
+		stmmac_ptp_register(priv);
 	priv->eee_tw_timer = STMMAC_DEFAULT_TWT_LS;

drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c+0−3

@@ -297,9 +297,6 @@ void stmmac_ptp_register(struct stmmac_priv *priv) · 296 unmodified lines
297	{	297	{
298	int i;	298	int i;
299		299
300	if (priv->plat->ptp_clk_freq_config)
301	priv->plat->ptp_clk_freq_config(priv);
302
303	for (i = 0; i < priv->dma_cap.pps_out_num; i++) {	300	for (i = 0; i < priv->dma_cap.pps_out_num; i++) {
304	if (i >= STMMAC_PPS_MAX)	301	if (i >= STMMAC_PPS_MAX)
305	break;	302	break;

drivers/net/ethernet/ti/cpsw_priv.c+1−1

@@ -1146,7 +1146,7 @@ int cpsw_fill_rx_channels(struct cpsw_priv *priv) · 1145 unmodified lines
1146	static struct page_pool cpsw_create_page_pool(struct cpsw_common cpsw,	1146	static struct page_pool cpsw_create_page_pool(struct cpsw_common cpsw,
1147	int size)	1147	int size)
1148	{	1148	{
1149	struct page_pool_params pp_params;	1149	struct page_pool_params pp_params = {};
1150	struct page_pool *pool;	1150	struct page_pool *pool;
1151		1151
1152	pp_params.order = 0;	1152	pp_params.order = 0;

drivers/net/ethernet/tundra/tsi108_eth.c+18−17

 	struct tsi108_prv_data *data = netdev_priv(dev);
 	u32 word1 = TSI_READ(TSI108_MAC_ADDR1);
 	u32 word2 = TSI_READ(TSI108_MAC_ADDR2);
+	u8 addr[ETH_ALEN];
 	/* Note that the octets are reversed from what the manual says,
 	 * producing an even weirder ordering...
 	 */
 	if (word2 == 0 && word1 == 0) {
-		dev->dev_addr[0] = 0x00;
+		addr[0] = 0x00;
-		dev->dev_addr[1] = 0x06;
+		addr[1] = 0x06;
-		dev->dev_addr[2] = 0xd2;
+		addr[2] = 0xd2;
-		dev->dev_addr[3] = 0x00;
+		addr[3] = 0x00;
-		dev->dev_addr[4] = 0x00;
+		addr[4] = 0x00;
 		if (0x8 == data->phy)
-			dev->dev_addr[5] = 0x01;
+			addr[5] = 0x01;
 		else
-			dev->dev_addr[5] = 0x02;
+			addr[5] = 0x02;
+		eth_hw_addr_set(dev, addr);
 		word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);
 		TSI_WRITE(TSI108_MAC_ADDR1, word1);
 		TSI_WRITE(TSI108_MAC_ADDR2, word2);
 	} else {
-		dev->dev_addr[0] = (word2 >> 16) & 0xff;
+		addr[0] = (word2 >> 16) & 0xff;
-		dev->dev_addr[1] = (word2 >> 24) & 0xff;
+		addr[1] = (word2 >> 24) & 0xff;
-		dev->dev_addr[2] = (word1 >> 0) & 0xff;
+		addr[2] = (word1 >> 0) & 0xff;
-		dev->dev_addr[3] = (word1 >> 8) & 0xff;
+		addr[3] = (word1 >> 8) & 0xff;
-		dev->dev_addr[4] = (word1 >> 16) & 0xff;
+		addr[4] = (word1 >> 16) & 0xff;
-		dev->dev_addr[5] = (word1 >> 24) & 0xff;
+		addr[5] = (word1 >> 24) & 0xff;
+		eth_hw_addr_set(dev, addr);
 	}
 	if (!is_valid_ether_addr(dev->dev_addr)) {
 {
 	struct tsi108_prv_data *data = netdev_priv(dev);
 	u32 word1, word2;
-	int i;
 	if (!is_valid_ether_addr(addr))
 		return -EADDRNOTAVAIL;
-	for (i = 0; i < 6; i++)
+	/* +2 is for the offset of the HW addr type */
-		/* +2 is for the offset of the HW addr type */
+	eth_hw_addr_set(dev, ((unsigned char *)addr) + 2);
-		dev->dev_addr[i] = ((unsigned char *)addr)[i + 2];
 	word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24);

drivers/net/hamradio/yam.c+1−3

 		ym = memdup_user(data, sizeof(struct yamdrv_ioctl_mcs));
 		if (IS_ERR(ym))
 			return PTR_ERR(ym);
-		if (ym->cmd != SIOCYAMSMCS)
+		if (ym->cmd != SIOCYAMSMCS || ym->bitrate > YAM_MAXBITRATE) {
-			return -EINVAL;
-		if (ym->bitrate > YAM_MAXBITRATE) {
 			kfree(ym);
 			return -EINVAL;
 		}

drivers/net/phy/broadcom.c+1−0

@@ -854,6 +854,7 @@ static struct phy_driver broadcom_drivers[] = { · 853 unmodified lines
854	.phy_id_mask = 0xfffffff0,	854	.phy_id_mask = 0xfffffff0,
855	.name = "Broadcom BCM54616S",	855	.name = "Broadcom BCM54616S",
856	/* PHY_GBIT_FEATURES */	856	/* PHY_GBIT_FEATURES */
		857	.soft_reset = genphy_soft_reset,
857	.config_init = bcm54xx_config_init,	858	.config_init = bcm54xx_config_init,
858	.config_aneg = bcm54616s_config_aneg,	859	.config_aneg = bcm54616s_config_aneg,
859	.config_intr = bcm_phy_config_intr,	860	.config_intr = bcm_phy_config_intr,

drivers/net/phy/phy_device.c+3−3

 	    phy_driver_is_genphy_10g(phydev))
 		device_release_driver(&phydev->mdio.dev);
+	/* Assert the reset signal */
+	phy_device_reset(phydev, 1);
 	/*
 	 * The phydev might go away on the put_device() below, so avoid
 	 * a use-after-free bug by reading the underlying bus first.
 		ndev_owner = dev->dev.parent->driver->owner;
 	if (ndev_owner != bus->owner)
 		module_put(bus->owner);
-	/* Assert the reset signal */
-	phy_device_reset(phydev, 1);
 }
 EXPORT_SYMBOL(phy_detach);

drivers/net/phy/sfp-bus.c+5−0

 	else if (ret < 0)
 		return ERR_PTR(ret);
+	if (!fwnode_device_is_available(ref.fwnode)) {
+		fwnode_handle_put(ref.fwnode);
+		return NULL;
+	}
 	bus = sfp_bus_get(ref.fwnode);
 	fwnode_handle_put(ref.fwnode);
 	if (!bus)

drivers/nvme/host/fabrics.c+1−2

 static int nvmf_dev_show(struct seq_file *seq_file, void *private)
 {
 	struct nvme_ctrl *ctrl;
-	int ret = 0;
 	mutex_lock(&nvmf_dev_mutex);
 	ctrl = seq_file->private;
 out_unlock:
 	mutex_unlock(&nvmf_dev_mutex);
-	return ret;
+	return 0;
 }
 static int nvmf_dev_open(struct inode *inode, struct file *file)

drivers/nvme/host/pci.c+2−1

 				NVME_QUIRK_DEALLOCATE_ZEROES, },
 	{ PCI_VDEVICE(INTEL, 0x0a54),	/* Intel P4500/P4600 */
 		.driver_data = NVME_QUIRK_STRIPE_SIZE |
-				NVME_QUIRK_DEALLOCATE_ZEROES, },
+				NVME_QUIRK_DEALLOCATE_ZEROES |
+				NVME_QUIRK_IGNORE_DEV_SUBNQN, },
 	{ PCI_VDEVICE(INTEL, 0x0a55),	/* Dell Express Flash P4600 */
 		.driver_data = NVME_QUIRK_STRIPE_SIZE |
 				NVME_QUIRK_DEALLOCATE_ZEROES, },

drivers/pci/controller/pcie-mt7621.c+1−10

 	writel_relaxed(val, pcie->base + reg);
 }
-static inline void pcie_rmw(struct mt7621_pcie *pcie, u32 reg, u32 clr, u32 set)
-{
-	u32 val = readl_relaxed(pcie->base + reg);
-	val &= ~clr;
-	val |= set;
-	writel_relaxed(val, pcie->base + reg);
-}
 static inline u32 pcie_port_read(struct mt7621_pcie_port *port, u32 reg)
 {
 	return readl_relaxed(port->base + reg);
 	.remove = mt7621_pcie_remove,
 	.driver = {
 		.name = "mt7621-pci",
-		.of_match_table = of_match_ptr(mt7621_pcie_ids),
+		.of_match_table = mt7621_pcie_ids,
 	},
 };
 builtin_platform_driver(mt7621_pcie_driver);

drivers/pci/msi/irqdomain.c+2−2

 		msi_domain_free_irqs_descs_locked(domain, &dev->dev);
 	else
 		pci_msi_legacy_teardown_msi_irqs(dev);
+	msi_free_msi_descs(&dev->dev);
 }
 /**
 	if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
 		pci_msi_domain_update_chip_ops(info);
-	info->flags |= MSI_FLAG_ACTIVATE_EARLY | MSI_FLAG_DEV_SYSFS |
+	info->flags |= MSI_FLAG_ACTIVATE_EARLY | MSI_FLAG_DEV_SYSFS;
-		       MSI_FLAG_FREE_MSI_DESCS;
 	if (IS_ENABLED(CONFIG_GENERIC_IRQ_RESERVATION_MODE))
 		info->flags |= MSI_FLAG_MUST_REACTIVATE;

drivers/pci/msi/legacy.c+0−1

@@ -77,5 +77,4 @@ void pci_msi_legacy_teardown_msi_irqs(struct pci_dev *dev) · 76 unmodified lines
77	{	77	{
78	msi_device_destroy_sysfs(&dev->dev);	78	msi_device_destroy_sysfs(&dev->dev);
79	arch_teardown_msi_irqs(dev);	79	arch_teardown_msi_irqs(dev);
80	msi_free_msi_descs(&dev->dev);
81	}	80	}

drivers/remoteproc/Kconfig+4−0

 	depends on RPMSG_QCOM_GLINK_SMEM || RPMSG_QCOM_GLINK_SMEM=n
 	depends on QCOM_SYSMON || QCOM_SYSMON=n
 	depends on RPMSG_QCOM_GLINK || RPMSG_QCOM_GLINK=n
+	depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n
 	select MFD_SYSCON
 	select QCOM_PIL_INFO
 	select QCOM_MDT_LOADER
 	depends on RPMSG_QCOM_GLINK_SMEM || RPMSG_QCOM_GLINK_SMEM=n
 	depends on QCOM_SYSMON || QCOM_SYSMON=n
 	depends on RPMSG_QCOM_GLINK || RPMSG_QCOM_GLINK=n
+	depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n
 	select MFD_SYSCON
 	select QCOM_MDT_LOADER
 	select QCOM_PIL_INFO
 	depends on RPMSG_QCOM_GLINK_SMEM || RPMSG_QCOM_GLINK_SMEM=n
 	depends on QCOM_SYSMON || QCOM_SYSMON=n
 	depends on RPMSG_QCOM_GLINK || RPMSG_QCOM_GLINK=n
+	depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n
 	select MFD_SYSCON
 	select QCOM_PIL_INFO
 	select QCOM_MDT_LOADER
 	depends on RPMSG_QCOM_GLINK_SMEM || RPMSG_QCOM_GLINK_SMEM=n
 	depends on QCOM_SYSMON || QCOM_SYSMON=n
 	depends on RPMSG_QCOM_GLINK || RPMSG_QCOM_GLINK=n
+	depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n
 	select MFD_SYSCON
 	select QCOM_MDT_LOADER
 	select QCOM_PIL_INFO

drivers/remoteproc/qcom_q6v5.c+1−0

@@ -10,6 +10,7 @@ · 9 unmodified lines
10	#include <linux/platform_device.h>	10	#include <linux/platform_device.h>
11	#include <linux/interrupt.h>	11	#include <linux/interrupt.h>
12	#include <linux/module.h>	12	#include <linux/module.h>
		13	#include <linux/soc/qcom/qcom_aoss.h>
13	#include <linux/soc/qcom/smem.h>	14	#include <linux/soc/qcom/smem.h>
14	#include <linux/soc/qcom/smem_state.h>	15	#include <linux/soc/qcom/smem_state.h>
15	#include <linux/remoteproc.h>	16	#include <linux/remoteproc.h>

drivers/rpmsg/rpmsg_char.c+4−18

 	/* wake up any blocked readers */
 	wake_up_interruptible(&eptdev->readq);
-	device_del(&eptdev->dev);
+	cdev_device_del(&eptdev->cdev, &eptdev->dev);
 	put_device(&eptdev->dev);
 	return 0;
 	ida_simple_remove(&rpmsg_ept_ida, dev->id);
 	ida_simple_remove(&rpmsg_minor_ida, MINOR(eptdev->dev.devt));
-	cdev_del(&eptdev->cdev);
 	kfree(eptdev);
 }
 	dev->id = ret;
 	dev_set_name(dev, "rpmsg%d", ret);
-	ret = cdev_add(&eptdev->cdev, dev->devt, 1);
+	ret = cdev_device_add(&eptdev->cdev, &eptdev->dev);
 	if (ret)
 		goto free_ept_ida;
 	/* We can now rely on the release function for cleanup */
 	dev->release = rpmsg_eptdev_release_device;
-	ret = device_add(dev);
-	if (ret) {
-		dev_err(dev, "device_add failed: %d\n", ret);
-		put_device(dev);
-	}
 	return ret;
 free_ept_ida:
 	ida_simple_remove(&rpmsg_ctrl_ida, dev->id);
 	ida_simple_remove(&rpmsg_minor_ida, MINOR(dev->devt));
-	cdev_del(&ctrldev->cdev);
 	kfree(ctrldev);
 }
 	dev->id = ret;
 	dev_set_name(&ctrldev->dev, "rpmsg_ctrl%d", ret);
-	ret = cdev_add(&ctrldev->cdev, dev->devt, 1);
+	ret = cdev_device_add(&ctrldev->cdev, &ctrldev->dev);
 	if (ret)
 		goto free_ctrl_ida;
 	/* We can now rely on the release function for cleanup */
 	dev->release = rpmsg_ctrldev_release_device;
-	ret = device_add(dev);
-	if (ret) {
-		dev_err(&rpdev->dev, "device_add failed: %d\n", ret);
-		put_device(dev);
-	}
 	dev_set_drvdata(&rpdev->dev, ctrldev);
 	return ret;
 	if (ret)
 		dev_warn(&rpdev->dev, "failed to nuke endpoints: %d\n", ret);
-	device_del(&ctrldev->dev);
+	cdev_device_del(&ctrldev->cdev, &ctrldev->dev);
 	put_device(&ctrldev->dev);
 }

drivers/s390/scsi/zfcp_fc.c+12−1

 		goto out;
 	}
+	/* re-init to undo drop from zfcp_fc_adisc() */
+	port->d_id = ntoh24(adisc_resp->adisc_port_id);
 	/* port is good, unblock rport without going through erp */
 	zfcp_scsi_schedule_rport_register(port);
  out:
 	struct zfcp_fc_req *fc_req;
 	struct zfcp_adapter *adapter = port->adapter;
 	struct Scsi_Host *shost = adapter->scsi_host;
+	u32 d_id;
 	int ret;
 	fc_req = kmem_cache_zalloc(zfcp_fc_req_cache, GFP_ATOMIC);
 	fc_req->u.adisc.req.adisc_cmd = ELS_ADISC;
 	hton24(fc_req->u.adisc.req.adisc_port_id, fc_host_port_id(shost));
-	ret = zfcp_fsf_send_els(adapter, port->d_id, &fc_req->ct_els,
+	d_id = port->d_id; /* remember as destination for send els below */
+	/*
+	 * Force fresh GID_PN lookup on next port recovery.
+	 * Must happen after request setup and before sending request,
+	 * to prevent race with port->d_id re-init in zfcp_fc_adisc_handler().
+	 */
+	port->d_id = 0;
+	ret = zfcp_fsf_send_els(adapter, d_id, &fc_req->ct_els,
 				ZFCP_FC_CTELS_TMO);
 	if (ret)
 		kmem_cache_free(zfcp_fc_req_cache, fc_req);

drivers/scsi/3w-sas.c+0−4

 	pci_try_set_mwi(pdev);
 	retval = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
-	if (retval)
-		retval = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
 	if (retval) {
 		TW_PRINTK(host, TW_DRIVER, 0x18, "Failed to set dma mask");
 		retval = -ENODEV;
 	pci_try_set_mwi(pdev);
 	retval = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
-	if (retval)
-		retval = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
 	if (retval) {
 		TW_PRINTK(host, TW_DRIVER, 0x25, "Failed to set dma mask during resume");
 		retval = -ENODEV;

drivers/scsi/53c700.c+0−1

@@ -1507,7 +1507,6 @@ NCR_700_intr(int irq, void *dev_id) · 1506 unmodified lines
1507	struct scsi_cmnd *SCp = hostdata->cmd;	1507	struct scsi_cmnd *SCp = hostdata->cmd;
1508		1508
1509	handled = 1;	1509	handled = 1;
1510	SCp = hostdata->cmd;
1511		1510
1512	if(istat & SCSI_INT_PENDING) {	1511	if(istat & SCSI_INT_PENDING) {
1513	udelay(10);	1512	udelay(10);

drivers/scsi/bfa/bfad.c+0−6

 	pci_set_master(pdev);
 	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
-	if (rc)
-		rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
 	if (rc) {
 		rc = -ENODEV;
 		printk(KERN_ERR "dma_set_mask_and_coherent fail %p\n", pdev);
 	pci_set_master(pdev);
 	rc = dma_set_mask_and_coherent(&bfad->pcidev->dev, DMA_BIT_MASK(64));
-	if (rc)
-		rc = dma_set_mask_and_coherent(&bfad->pcidev->dev,
-					       DMA_BIT_MASK(32));
 	if (rc)
 		goto out_disable_device;

drivers/scsi/bnx2fc/bnx2fc_fcoe.c+5−15

@@ -82,7 +82,7 @@ static int bnx2fc_bind_pcidev(struct bnx2fc_hba *hba); · 81 unmodified lines
82	static void bnx2fc_unbind_pcidev(struct bnx2fc_hba *hba);	82	static void bnx2fc_unbind_pcidev(struct bnx2fc_hba *hba);
83	static struct fc_lport bnx2fc_if_create(struct bnx2fc_interface interface,	83	static struct fc_lport bnx2fc_if_create(struct bnx2fc_interface interface,
84	struct device *parent, int npiv);	84	struct device *parent, int npiv);
85	static void bnx2fc_destroy_work(struct work_struct *work);	85	static void bnx2fc_port_destroy(struct fcoe_port *port);
86		86
87	static struct bnx2fc_hba bnx2fc_hba_lookup(struct net_device phys_dev);	87	static struct bnx2fc_hba bnx2fc_hba_lookup(struct net_device phys_dev);
88	static struct bnx2fc_interface *bnx2fc_interface_lookup(struct net_device	88	static struct bnx2fc_interface *bnx2fc_interface_lookup(struct net_device
@@ -907,9 +907,6 @@ static void bnx2fc_indicate_netevent(void *context, unsigned long event, · 818 unmodified lines
907	__bnx2fc_destroy(interface);	907	__bnx2fc_destroy(interface);
908	}	908	}
909	mutex_unlock(&bnx2fc_dev_lock);	909	mutex_unlock(&bnx2fc_dev_lock);
910
911	/* Ensure ALL destroy work has been completed before return */
912	flush_workqueue(bnx2fc_wq);
913	return;	910	return;
914		911
915	default:	912	default:
@@ -1215,8 +1212,8 @@ static int bnx2fc_vport_destroy(struct fc_vport *vport) · 299 unmodified lines
1215	mutex_unlock(&n_port->lp_mutex);	1212	mutex_unlock(&n_port->lp_mutex);
1216	bnx2fc_free_vport(interface->hba, port->lport);	1213	bnx2fc_free_vport(interface->hba, port->lport);
1217	bnx2fc_port_shutdown(port->lport);	1214	bnx2fc_port_shutdown(port->lport);
		1215	bnx2fc_port_destroy(port);
1218	bnx2fc_interface_put(interface);	1216	bnx2fc_interface_put(interface);
1219	queue_work(bnx2fc_wq, &port->destroy_work);
1220	return 0;	1217	return 0;
1221	}	1218	}
1222		1219
@@ -1525,7 +1522,6 @@ static struct fc_lport bnx2fc_if_create(struct bnx2fc_interface interface, · 302 unmodified lines
1525	port->lport = lport;	1522	port->lport = lport;
1526	port->priv = interface;	1523	port->priv = interface;
1527	port->get_netdev = bnx2fc_netdev;	1524	port->get_netdev = bnx2fc_netdev;
1528	INIT_WORK(&port->destroy_work, bnx2fc_destroy_work);
1529		1525
1530	/* Configure fcoe_port */	1526	/* Configure fcoe_port */
1531	rc = bnx2fc_lport_config(lport);	1527	rc = bnx2fc_lport_config(lport);
@@ -1653,8 +1649,8 @@ static void __bnx2fc_destroy(struct bnx2fc_interface *interface) · 121 unmodified lines
1653	bnx2fc_interface_cleanup(interface);	1649	bnx2fc_interface_cleanup(interface);
1654	bnx2fc_stop(interface);	1650	bnx2fc_stop(interface);
1655	list_del(&interface->list);	1651	list_del(&interface->list);
		1652	bnx2fc_port_destroy(port);
1656	bnx2fc_interface_put(interface);	1653	bnx2fc_interface_put(interface);
1657	queue_work(bnx2fc_wq, &port->destroy_work);
1658	}	1654	}
1659		1655
1660	/**	1656	/**
@@ -1694,15 +1690,12 @@ netdev_err: · 33 unmodified lines
1694	return rc;	1690	return rc;
1695	}	1691	}
1696		1692
1697	static void bnx2fc_destroy_work(struct work_struct *work)	1693	static void bnx2fc_port_destroy(struct fcoe_port *port)
1698	{	1694	{
1699	struct fcoe_port *port;
1700	struct fc_lport *lport;	1695	struct fc_lport *lport;
1701		1696
1702	port = container_of(work, struct fcoe_port, destroy_work);
1703	lport = port->lport;	1697	lport = port->lport;
1704		1698	BNX2FC_HBA_DBG(lport, "Entered %s, destroying lport %p\n", __func__, lport);
1705	BNX2FC_HBA_DBG(lport, "Entered bnx2fc_destroy_work\n");
1706		1699
1707	bnx2fc_if_destroy(lport);	1700	bnx2fc_if_destroy(lport);
1708	}	1701	}
@@ -2556,9 +2549,6 @@ static void bnx2fc_ulp_exit(struct cnic_dev *dev) · 847 unmodified lines
2556	__bnx2fc_destroy(interface);	2549	__bnx2fc_destroy(interface);
2557	mutex_unlock(&bnx2fc_dev_lock);	2550	mutex_unlock(&bnx2fc_dev_lock);
2558		2551
2559	/* Ensure ALL destroy work has been completed before return */
2560	flush_workqueue(bnx2fc_wq);
2561
2562	bnx2fc_ulp_stop(hba);	2552	bnx2fc_ulp_stop(hba);
2563	/* unregister cnic device */	2553	/* unregister cnic device */
2564	if (test_and_clear_bit(BNX2FC_CNIC_REGISTERED, &hba->reg_with_cnic))	2554	if (test_and_clear_bit(BNX2FC_CNIC_REGISTERED, &hba->reg_with_cnic))

drivers/scsi/elx/libefc/efc_els.c+2−6

 	efc = node->efc;
-	spin_lock_irqsave(&node->els_ios_lock, flags);
 	if (!node->els_io_enabled) {
 		efc_log_err(efc, "els io alloc disabled\n");
-		spin_unlock_irqrestore(&node->els_ios_lock, flags);
 		return NULL;
 	}
 	els = mempool_alloc(efc->els_io_pool, GFP_ATOMIC);
 	if (!els) {
 		atomic_add_return(1, &efc->els_io_alloc_failed_count);
-		spin_unlock_irqrestore(&node->els_ios_lock, flags);
 		return NULL;
 	}
 					      &els->io.req.phys, GFP_KERNEL);
 	if (!els->io.req.virt) {
 		mempool_free(els, efc->els_io_pool);
-		spin_unlock_irqrestore(&node->els_ios_lock, flags);
 		return NULL;
 	}
 		/* add els structure to ELS IO list */
 		INIT_LIST_HEAD(&els->list_entry);
+		spin_lock_irqsave(&node->els_ios_lock, flags);
 		list_add_tail(&els->list_entry, &node->els_ios_list);
+		spin_unlock_irqrestore(&node->els_ios_lock, flags);
 	}
-	spin_unlock_irqrestore(&node->els_ios_lock, flags);
 	return els;
 }

drivers/scsi/hisi_sas/hisi_sas_main.c+0−3

@@ -2666,9 +2666,6 @@ static struct Scsi_Host hisi_sas_shost_alloc(struct platform_device pdev, · 2665 unmodified lines
2666	goto err_out;	2666	goto err_out;
2667		2667
2668	error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));	2668	error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
2669	if (error)
2670	error = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
2671
2672	if (error) {	2669	if (error) {
2673	dev_err(dev, "No usable DMA addressing method\n");	2670	dev_err(dev, "No usable DMA addressing method\n");
2674	goto err_out;	2671	goto err_out;

drivers/scsi/hisi_sas/hisi_sas_v3_hw.c+0−2

@@ -4695,8 +4695,6 @@ hisi_sas_v3_probe(struct pci_dev pdev, const struct pci_device_id id) · 4694 unmodified lines
4695	goto err_out;	4695	goto err_out;
4696		4696
4697	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));	4697	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
4698	if (rc)
4699	rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
4700	if (rc) {	4698	if (rc) {
4701	dev_err(dev, "No usable DMA addressing method\n");	4699	dev_err(dev, "No usable DMA addressing method\n");
4702	rc = -ENODEV;	4700	rc = -ENODEV;

drivers/scsi/myrs.c+2−1

@@ -2267,7 +2267,8 @@ static void myrs_cleanup(struct myrs_hba *cs) · 2266 unmodified lines
2267	myrs_unmap(cs);	2267	myrs_unmap(cs);
2268		2268
2269	if (cs->mmio_base) {	2269	if (cs->mmio_base) {
2270	cs->disable_intr(cs);	2270	if (cs->disable_intr)
		2271	cs->disable_intr(cs);
2271	iounmap(cs->mmio_base);	2272	iounmap(cs->mmio_base);
2272	cs->mmio_base = NULL;	2273	cs->mmio_base = NULL;
2273	}	2274	}

drivers/scsi/pm8001/pm80xx_hwi.c+14−2

@@ -4151,10 +4151,22 @@ static int process_oq(struct pm8001_hba_info *pm8001_ha, u8 vec) · 4150 unmodified lines
4151	u32 ret = MPI_IO_STATUS_FAIL;	4151	u32 ret = MPI_IO_STATUS_FAIL;
4152	u32 regval;	4152	u32 regval;
4153		4153
		4154	/*
		4155	* Fatal errors are programmed to be signalled in irq vector
		4156	* pm8001_ha->max_q_num - 1 through pm8001_ha->main_cfg_tbl.pm80xx_tbl.
		4157	* fatal_err_interrupt
		4158	*/
4154	if (vec == (pm8001_ha->max_q_num - 1)) {	4159	if (vec == (pm8001_ha->max_q_num - 1)) {
		4160	u32 mipsall_ready;
		4161
		4162	if (pm8001_ha->chip_id == chip_8008 \|\|
		4163	pm8001_ha->chip_id == chip_8009)
		4164	mipsall_ready = SCRATCH_PAD_MIPSALL_READY_8PORT;
		4165	else
		4166	mipsall_ready = SCRATCH_PAD_MIPSALL_READY_16PORT;
		4167
4155	regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);	4168	regval = pm8001_cr32(pm8001_ha, 0, MSGU_SCRATCH_PAD_1);
4156	if ((regval & SCRATCH_PAD_MIPSALL_READY) !=	4169	if ((regval & mipsall_ready) != mipsall_ready) {
4157	SCRATCH_PAD_MIPSALL_READY) {
4158	pm8001_ha->controller_fatal_error = true;	4170	pm8001_ha->controller_fatal_error = true;
4159	pm8001_dbg(pm8001_ha, FAIL,	4171	pm8001_dbg(pm8001_ha, FAIL,
4160	"Firmware Fatal error! Regval:0x%x\n",	4172	"Firmware Fatal error! Regval:0x%x\n",

drivers/scsi/pm8001/pm80xx_hwi.h+5−1

 #define SCRATCH_PAD_BOOT_LOAD_SUCCESS	0x0
 #define SCRATCH_PAD_IOP0_READY		0xC00
 #define SCRATCH_PAD_IOP1_READY		0x3000
-#define SCRATCH_PAD_MIPSALL_READY	(SCRATCH_PAD_IOP1_READY | \
+#define SCRATCH_PAD_MIPSALL_READY_16PORT	(SCRATCH_PAD_IOP1_READY | \
 					SCRATCH_PAD_IOP0_READY | \
+					SCRATCH_PAD_ILA_READY | \
+					SCRATCH_PAD_RAAE_READY)
+#define SCRATCH_PAD_MIPSALL_READY_8PORT	(SCRATCH_PAD_IOP0_READY | \
+					SCRATCH_PAD_ILA_READY | \
 					SCRATCH_PAD_RAAE_READY)
 /* boot loader state */

drivers/scsi/qedf/qedf_io.c+1−0

@@ -2250,6 +2250,7 @@ process_els: · 2249 unmodified lines
2250	io_req->tm_flags == FCP_TMF_TGT_RESET) {	2250	io_req->tm_flags == FCP_TMF_TGT_RESET) {
2251	clear_bit(QEDF_CMD_OUTSTANDING, &io_req->flags);	2251	clear_bit(QEDF_CMD_OUTSTANDING, &io_req->flags);
2252	io_req->sc_cmd = NULL;	2252	io_req->sc_cmd = NULL;
		2253	kref_put(&io_req->refcount, qedf_release_cmd);
2253	complete(&io_req->tm_done);	2254	complete(&io_req->tm_done);
2254	}	2255	}
2255		2256

drivers/scsi/qedf/qedf_main.c+5−2

 	struct qed_link_output if_link;
 	if (lport->vport) {
-		QEDF_ERR(NULL, "Cannot issue host reset on NPIV port.\n");
+		printk_ratelimited("Cannot issue host reset on NPIV port.\n");
 		return;
 	}
 	vport_qedf->cmd_mgr = base_qedf->cmd_mgr;
 	init_completion(&vport_qedf->flogi_compl);
 	INIT_LIST_HEAD(&vport_qedf->fcports);
+	INIT_DELAYED_WORK(&vport_qedf->stag_work, qedf_stag_change_work);
 	rc = qedf_vport_libfc_config(vport, vn_port);
 	if (rc) {
 	struct qedf_ctx *qedf =
 	    container_of(work, struct qedf_ctx, stag_work.work);
-	QEDF_ERR(&qedf->dbg_ctx, "Performing software context reset.\n");
+	printk_ratelimited("[%s]:[%s:%d]:%d: Performing software context reset.",
+			dev_name(&qedf->pdev->dev), __func__, __LINE__,
+			qedf->dbg_ctx.host_no);
 	qedf_ctx_soft_reset(qedf->lport);
 }

drivers/scsi/ufs/ufshcd-pltfrm.c+7−0

 		clki->min_freq = clkfreq[i];
 		clki->max_freq = clkfreq[i+1];
 		clki->name = devm_kstrdup(dev, name, GFP_KERNEL);
+		if (!clki->name) {
+			ret = -ENOMEM;
+			goto out;
+		}
 		if (!strcmp(name, "ref_clk"))
 			clki->keep_link_active = true;
 		dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz",
 		return -ENOMEM;
 	vreg->name = devm_kstrdup(dev, name, GFP_KERNEL);
+	if (!vreg->name)
+		return -ENOMEM;
 	snprintf(prop_name, MAX_PROP_SIZE, "%s-max-microamp", name);
 	if (of_property_read_u32(np, prop_name, &vreg->max_uA)) {

drivers/scsi/ufs/ufshcd.c+6−3

  * @pwr_mode: device power mode to set
  *
  * Returns 0 if requested power mode is set successfully
- * Returns non-zero if failed to set the requested power mode
+ * Returns < 0 if failed to set the requested power mode
  */
 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
 				     enum ufs_dev_pwr_mode pwr_mode)
 		sdev_printk(KERN_WARNING, sdp,
 			    "START_STOP failed for power mode: %d, result %x\n",
 			    pwr_mode, ret);
-		if (ret > 0 && scsi_sense_valid(&sshdr))
+		if (ret > 0) {
-			scsi_print_sense_hdr(sdp, NULL, &sshdr);
+			if (scsi_sense_valid(&sshdr))
+				scsi_print_sense_hdr(sdp, NULL, &sshdr);
+			ret = -EIO;
+		}
 	}
 	if (!ret)

drivers/scsi/ufs/ufshci.h+2−1

@@ -142,7 +142,8 @@ static inline u32 ufshci_version(u32 major, u32 minor) · 141 unmodified lines
142	#define INT_FATAL_ERRORS (DEVICE_FATAL_ERROR \|\	142	#define INT_FATAL_ERRORS (DEVICE_FATAL_ERROR \|\
143	CONTROLLER_FATAL_ERROR \|\	143	CONTROLLER_FATAL_ERROR \|\
144	SYSTEM_BUS_FATAL_ERROR \|\	144	SYSTEM_BUS_FATAL_ERROR \|\
145	CRYPTO_ENGINE_FATAL_ERROR)	145	CRYPTO_ENGINE_FATAL_ERROR \|\
		146	UIC_LINK_LOST)
146		147
147	/* HCS - Host Controller Status 30h */	148	/* HCS - Host Controller Status 30h */
148	#define DEVICE_PRESENT 0x1	149	#define DEVICE_PRESENT 0x1

drivers/target/iscsi/iscsi_target_tpg.c+3−0

@@ -443,6 +443,9 @@ static bool iscsit_tpg_check_network_portal( · 442 unmodified lines
443	break;	443	break;
444	}	444	}
445	spin_unlock(&tpg->tpg_np_lock);	445	spin_unlock(&tpg->tpg_np_lock);
		446
		447	if (match)
		448	break;
446	}	449	}
447	spin_unlock(&tiqn->tiqn_tpg_lock);	450	spin_unlock(&tiqn->tiqn_tpg_lock);
448		451

drivers/tty/n_gsm.c+3−1

 #define GSM1_ESCAPE_BITS	0x20
 #define XON			0x11
 #define XOFF			0x13
+#define ISO_IEC_646_MASK	0x7F
 static const struct tty_port_operations gsm_port_ops;
 	int olen = 0;
 	while (len--) {
 		if (*input == GSM1_SOF || *input == GSM1_ESCAPE
-		    || *input == XON || *input == XOFF) {
+		    || (*input & ISO_IEC_646_MASK) == XON
+		    || (*input & ISO_IEC_646_MASK) == XOFF) {
 			*output++ = GSM1_ESCAPE;
 			*output++ = *input++ ^ GSM1_ESCAPE_BITS;
 			olen++;

drivers/tty/rpmsg_tty.c+26−14

 static int rpmsg_tty_install(struct tty_driver *driver, struct tty_struct *tty)
 {
 	struct rpmsg_tty_port *cport = idr_find(&tty_idr, tty->index);
+	struct tty_port *port;
 	tty->driver_data = cport;
-	return tty_port_install(&cport->port, driver, tty);
+	port = tty_port_get(&cport->port);
+	return tty_port_install(port, driver, tty);
+}
+static void rpmsg_tty_cleanup(struct tty_struct *tty)
+{
+	tty_port_put(tty->port);
 }
 static int rpmsg_tty_open(struct tty_struct *tty, struct file *filp)
 	return size;
 }
+static void rpmsg_tty_hangup(struct tty_struct *tty)
+{
+	tty_port_hangup(tty->port);
+}
 static const struct tty_operations rpmsg_tty_ops = {
 	.install	= rpmsg_tty_install,
 	.open		= rpmsg_tty_open,
 	.close		= rpmsg_tty_close,
 	.write		= rpmsg_tty_write,
 	.write_room	= rpmsg_tty_write_room,
+	.hangup		= rpmsg_tty_hangup,
+	.cleanup	= rpmsg_tty_cleanup,
 };
 static struct rpmsg_tty_port *rpmsg_tty_alloc_cport(void)
 	return cport;
 }
-static void rpmsg_tty_release_cport(struct rpmsg_tty_port *cport)
+static void rpmsg_tty_destruct_port(struct tty_port *port)
 {
+	struct rpmsg_tty_port *cport = container_of(port, struct rpmsg_tty_port, port);
 	mutex_lock(&idr_lock);
 	idr_remove(&tty_idr, cport->id);
 	mutex_unlock(&idr_lock);
 	kfree(cport);
 }
-static const struct tty_port_operations rpmsg_tty_port_ops = { };
+static const struct tty_port_operations rpmsg_tty_port_ops = {
+	.destruct = rpmsg_tty_destruct_port,
+};
 static int rpmsg_tty_probe(struct rpmsg_device *rpdev)
 {
 					   cport->id, dev);
 	if (IS_ERR(tty_dev)) {
 		ret = dev_err_probe(dev, PTR_ERR(tty_dev), "Failed to register tty port\n");
-		goto err_destroy;
+		tty_port_put(&cport->port);
+		return ret;
 	}
 	cport->rpdev = rpdev;
 		rpdev->src, rpdev->dst, cport->id);
 	return 0;
-err_destroy:
-	tty_port_destroy(&cport->port);
-	rpmsg_tty_release_cport(cport);
-	return ret;
 }
 static void rpmsg_tty_remove(struct rpmsg_device *rpdev)
 	dev_dbg(&rpdev->dev, "Removing rpmsg tty device %d\n", cport->id);
 	/* User hang up to release the tty */
-	if (tty_port_initialized(&cport->port))
+	tty_port_tty_hangup(&cport->port, false);
-		tty_port_tty_hangup(&cport->port, false);
 	tty_unregister_device(rpmsg_tty_driver, cport->id);
-	tty_port_destroy(&cport->port);
+	tty_port_put(&cport->port);
-	rpmsg_tty_release_cport(cport);
 }
 static struct rpmsg_device_id rpmsg_driver_tty_id_table[] = {

drivers/tty/serial/8250/8250_of.c+10−1

@@ -83,8 +83,17 @@ static int of_platform_serial_setup(struct platform_device *ofdev, · 82 unmodified lines
83	port->mapsize = resource_size(&resource);	83	port->mapsize = resource_size(&resource);
84		84
85	/* Check for shifted address mapping */	85	/* Check for shifted address mapping */
86	if (of_property_read_u32(np, "reg-offset", &prop) == 0)	86	if (of_property_read_u32(np, "reg-offset", &prop) == 0) {
		87	if (prop >= port->mapsize) {
		88	dev_warn(&ofdev->dev, "reg-offset %u exceeds region size %pa\n",
		89	prop, &port->mapsize);
		90	ret = -EINVAL;
		91	goto err_unprepare;
		92	}
		93
87	port->mapbase += prop;	94	port->mapbase += prop;
		95	port->mapsize -= prop;
		96	}
88		97
89	port->iotype = UPIO_MEM;	98	port->iotype = UPIO_MEM;
90	if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {	99	if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {

drivers/tty/serial/8250/8250_pci.c+98−2

@@ -4779,8 +4779,30 @@ static const struct pci_device_id serial_pci_tbl[] = { · 4778 unmodified lines
4779	{ PCI_VENDOR_ID_INTASHIELD, PCI_DEVICE_ID_INTASHIELD_IS400,	4779	{ PCI_VENDOR_ID_INTASHIELD, PCI_DEVICE_ID_INTASHIELD_IS400,
4780	PCI_ANY_ID, PCI_ANY_ID, 0, 0, /* 135a.0dc0 */	4780	PCI_ANY_ID, PCI_ANY_ID, 0, 0, /* 135a.0dc0 */
4781	pbn_b2_4_115200 },	4781	pbn_b2_4_115200 },
		4782	/* Brainboxes Devices */
4782	/*	4783	/*
4783	* BrainBoxes UC-260	4784	* Brainboxes UC-101
		4785	*/
		4786	{ PCI_VENDOR_ID_INTASHIELD, 0x0BA1,
		4787	PCI_ANY_ID, PCI_ANY_ID,
		4788	0, 0,
		4789	pbn_b2_2_115200 },
		4790	/*
		4791	* Brainboxes UC-235/246
		4792	*/
		4793	{ PCI_VENDOR_ID_INTASHIELD, 0x0AA1,
		4794	PCI_ANY_ID, PCI_ANY_ID,
		4795	0, 0,
		4796	pbn_b2_1_115200 },
		4797	/*
		4798	* Brainboxes UC-257
		4799	*/
		4800	{ PCI_VENDOR_ID_INTASHIELD, 0x0861,
		4801	PCI_ANY_ID, PCI_ANY_ID,
		4802	0, 0,
		4803	pbn_b2_2_115200 },
		4804	/*
		4805	* Brainboxes UC-260/271/701/756
4784	*/	4806	*/
4785	{ PCI_VENDOR_ID_INTASHIELD, 0x0D21,	4807	{ PCI_VENDOR_ID_INTASHIELD, 0x0D21,
4786	PCI_ANY_ID, PCI_ANY_ID,	4808	PCI_ANY_ID, PCI_ANY_ID,
@@ -4788,7 +4810,81 @@ static const struct pci_device_id serial_pci_tbl[] = { · 1 unmodified line
4788	pbn_b2_4_115200 },	4810	pbn_b2_4_115200 },
4789	{ PCI_VENDOR_ID_INTASHIELD, 0x0E34,	4811	{ PCI_VENDOR_ID_INTASHIELD, 0x0E34,
4790	PCI_ANY_ID, PCI_ANY_ID,	4812	PCI_ANY_ID, PCI_ANY_ID,
4791	PCI_CLASS_COMMUNICATION_MULTISERIAL << 8, 0xffff00,	4813	PCI_CLASS_COMMUNICATION_MULTISERIAL << 8, 0xffff00,
		4814	pbn_b2_4_115200 },
		4815	/*
		4816	* Brainboxes UC-268
		4817	*/
		4818	{ PCI_VENDOR_ID_INTASHIELD, 0x0841,
		4819	PCI_ANY_ID, PCI_ANY_ID,
		4820	0, 0,
		4821	pbn_b2_4_115200 },
		4822	/*
		4823	* Brainboxes UC-275/279
		4824	*/
		4825	{ PCI_VENDOR_ID_INTASHIELD, 0x0881,
		4826	PCI_ANY_ID, PCI_ANY_ID,
		4827	0, 0,
		4828	pbn_b2_8_115200 },
		4829	/*
		4830	* Brainboxes UC-302
		4831	*/
		4832	{ PCI_VENDOR_ID_INTASHIELD, 0x08E1,
		4833	PCI_ANY_ID, PCI_ANY_ID,
		4834	0, 0,
		4835	pbn_b2_2_115200 },
		4836	/*
		4837	* Brainboxes UC-310
		4838	*/
		4839	{ PCI_VENDOR_ID_INTASHIELD, 0x08C1,
		4840	PCI_ANY_ID, PCI_ANY_ID,
		4841	0, 0,
		4842	pbn_b2_2_115200 },
		4843	/*
		4844	* Brainboxes UC-313
		4845	*/
		4846	{ PCI_VENDOR_ID_INTASHIELD, 0x08A3,
		4847	PCI_ANY_ID, PCI_ANY_ID,
		4848	0, 0,
		4849	pbn_b2_2_115200 },
		4850	/*
		4851	* Brainboxes UC-320/324
		4852	*/
		4853	{ PCI_VENDOR_ID_INTASHIELD, 0x0A61,
		4854	PCI_ANY_ID, PCI_ANY_ID,
		4855	0, 0,
		4856	pbn_b2_1_115200 },
		4857	/*
		4858	* Brainboxes UC-346
		4859	*/
		4860	{ PCI_VENDOR_ID_INTASHIELD, 0x0B02,
		4861	PCI_ANY_ID, PCI_ANY_ID,
		4862	0, 0,
		4863	pbn_b2_4_115200 },
		4864	/*
		4865	* Brainboxes UC-357
		4866	*/
		4867	{ PCI_VENDOR_ID_INTASHIELD, 0x0A81,
		4868	PCI_ANY_ID, PCI_ANY_ID,
		4869	0, 0,
		4870	pbn_b2_2_115200 },
		4871	{ PCI_VENDOR_ID_INTASHIELD, 0x0A83,
		4872	PCI_ANY_ID, PCI_ANY_ID,
		4873	0, 0,
		4874	pbn_b2_2_115200 },
		4875	/*
		4876	* Brainboxes UC-368
		4877	*/
		4878	{ PCI_VENDOR_ID_INTASHIELD, 0x0C41,
		4879	PCI_ANY_ID, PCI_ANY_ID,
		4880	0, 0,
		4881	pbn_b2_4_115200 },
		4882	/*
		4883	* Brainboxes UC-420/431
		4884	*/
		4885	{ PCI_VENDOR_ID_INTASHIELD, 0x0921,
		4886	PCI_ANY_ID, PCI_ANY_ID,
		4887	0, 0,
4792	pbn_b2_4_115200 },	4888	pbn_b2_4_115200 },
4793	/*	4889	/*
4794	* Perle PCI-RAS cards	4890	* Perle PCI-RAS cards

drivers/tty/serial/8250/8250_port.c+6−55

@@ -2056,7 +2056,10 @@ static void serial8250_break_ctl(struct uart_port *port, int break_state) · 2055 unmodified lines
2056	serial8250_rpm_put(up);	2056	serial8250_rpm_put(up);
2057	}	2057	}
2058		2058
2059	static void wait_for_lsr(struct uart_8250_port *up, int bits)	2059	/*
		2060	* Wait for transmitter & holding register to empty
		2061	*/
		2062	static void wait_for_xmitr(struct uart_8250_port *up, int bits)
2060	{	2063	{
2061	unsigned int status, tmout = 10000;	2064	unsigned int status, tmout = 10000;
2062		2065
@@ -2073,16 +2076,6 @@ static void wait_for_lsr(struct uart_8250_port *up, int bits) · 10 unmodified lines
2073	udelay(1);	2076	udelay(1);
2074	touch_nmi_watchdog();	2077	touch_nmi_watchdog();
2075	}	2078	}
2076	}
2077
2078	/*
2079	* Wait for transmitter & holding register to empty
2080	*/
2081	static void wait_for_xmitr(struct uart_8250_port *up, int bits)
2082	{
2083	unsigned int tmout;
2084
2085	wait_for_lsr(up, bits);
2086		2079
2087	/* Wait up to 1s for flow control if necessary */	2080	/* Wait up to 1s for flow control if necessary */
2088	if (up->port.flags & UPF_CONS_FLOW) {	2081	if (up->port.flags & UPF_CONS_FLOW) {
@@ -3332,35 +3325,6 @@ static void serial8250_console_restore(struct uart_8250_port *up) · 1243 unmodified lines
3332	serial8250_out_MCR(up, UART_MCR_DTR \| UART_MCR_RTS);	3325	serial8250_out_MCR(up, UART_MCR_DTR \| UART_MCR_RTS);
3333	}	3326	}
3334		3327
3335	/*
3336	* Print a string to the serial port using the device FIFO
3337	*
3338	* It sends fifosize bytes and then waits for the fifo
3339	* to get empty.
3340	*/
3341	static void serial8250_console_fifo_write(struct uart_8250_port *up,
3342	const char *s, unsigned int count)
3343	{
3344	int i;
3345	const char *end = s + count;
3346	unsigned int fifosize = up->port.fifosize;
3347	bool cr_sent = false;
3348
3349	while (s != end) {
3350	wait_for_lsr(up, UART_LSR_THRE);
3351
3352	for (i = 0; i < fifosize && s != end; ++i) {
3353	if (*s == '\n' && !cr_sent) {
3354	serial_out(up, UART_TX, '\r');
3355	cr_sent = true;
3356	} else {
3357	serial_out(up, UART_TX, *s++);
3358	cr_sent = false;
3359	}
3360	}
3361	}
3362	}
3363
3364	/*	3328	/*
3365	* Print a string to the serial port trying not to disturb	3329	* Print a string to the serial port trying not to disturb
3366	* any possible real use of the port...	3330	* any possible real use of the port...
@@ -3376,7 +3340,7 @@ void serial8250_console_write(struct uart_8250_port up, const char s, · 9 unmodified lines
3376	struct uart_8250_em485 *em485 = up->em485;	3340	struct uart_8250_em485 *em485 = up->em485;
3377	struct uart_port *port = &up->port;	3341	struct uart_port *port = &up->port;
3378	unsigned long flags;	3342	unsigned long flags;
3379	unsigned int ier, use_fifo;	3343	unsigned int ier;
3380	int locked = 1;	3344	int locked = 1;
3381		3345
3382	touch_nmi_watchdog();	3346	touch_nmi_watchdog();
@@ -3408,20 +3372,7 @@ void serial8250_console_write(struct uart_8250_port up, const char s, · 25 unmodified lines
3408	mdelay(port->rs485.delay_rts_before_send);	3372	mdelay(port->rs485.delay_rts_before_send);
3409	}	3373	}
3410		3374
3411	use_fifo = (up->capabilities & UART_CAP_FIFO) &&	3375	uart_console_write(port, s, count, serial8250_console_putchar);
3412	port->fifosize > 1 &&
3413	(serial_port_in(port, UART_FCR) & UART_FCR_ENABLE_FIFO) &&
3414	/*
3415	* After we put a data in the fifo, the controller will send
3416	* it regardless of the CTS state. Therefore, only use fifo
3417	* if we don't use control flow.
3418	*/
3419	!(up->port.flags & UPF_CONS_FLOW);
3420
3421	if (likely(use_fifo))
3422	serial8250_console_fifo_write(up, s, count);
3423	else
3424	uart_console_write(port, s, count, serial8250_console_putchar);
3425		3376
3426	/*	3377	/*
3427	* Finally, wait for transmitter to become empty	3378	* Finally, wait for transmitter to become empty

drivers/tty/serial/amba-pl011.c+1−10

 	    container_of(port, struct uart_amba_port, port);
 	unsigned int cr;
-	if (port->rs485.flags & SER_RS485_ENABLED)
-		mctrl &= ~TIOCM_RTS;
 	cr = pl011_read(uap, REG_CR);
 #define	TIOCMBIT(tiocmbit, uartbit)		\
 	cr &= UART011_CR_RTS | UART011_CR_DTR;
 	cr |= UART01x_CR_UARTEN | UART011_CR_RXE;
-	if (port->rs485.flags & SER_RS485_ENABLED) {
+	if (!(port->rs485.flags & SER_RS485_ENABLED))
-		if (port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
-			cr &= ~UART011_CR_RTS;
-		else
-			cr |= UART011_CR_RTS;
-	} else {
 		cr |= UART011_CR_TXE;
-	}
 	pl011_write(cr, uap, REG_CR);

drivers/tty/serial/serial_core.c+12−22

@@ -144,6 +144,11 @@ uart_update_mctrl(struct uart_port *port, unsigned int set, unsigned int clear) · 143 unmodified lines
144	unsigned long flags;	144	unsigned long flags;
145	unsigned int old;	145	unsigned int old;
146		146
		147	if (port->rs485.flags & SER_RS485_ENABLED) {
		148	set &= ~TIOCM_RTS;
		149	clear &= ~TIOCM_RTS;
		150	}
		151
147	spin_lock_irqsave(&port->lock, flags);	152	spin_lock_irqsave(&port->lock, flags);
148	old = port->mctrl;	153	old = port->mctrl;
149	port->mctrl = (old & ~clear) \| set;	154	port->mctrl = (old & ~clear) \| set;
@@ -157,23 +162,10 @@ uart_update_mctrl(struct uart_port *port, unsigned int set, unsigned int clear) · 7 unmodified lines
157		162
158	static void uart_port_dtr_rts(struct uart_port *uport, int raise)	163	static void uart_port_dtr_rts(struct uart_port *uport, int raise)
159	{	164	{
160	int rs485_on = uport->rs485_config &&	165	if (raise)
161	(uport->rs485.flags & SER_RS485_ENABLED);	166	uart_set_mctrl(uport, TIOCM_DTR \| TIOCM_RTS);
162	int RTS_after_send = !!(uport->rs485.flags & SER_RS485_RTS_AFTER_SEND);	167	else
163		168	uart_clear_mctrl(uport, TIOCM_DTR \| TIOCM_RTS);
164	if (raise) {
165	if (rs485_on && RTS_after_send) {
166	uart_set_mctrl(uport, TIOCM_DTR);
167	uart_clear_mctrl(uport, TIOCM_RTS);
168	} else {
169	uart_set_mctrl(uport, TIOCM_DTR \| TIOCM_RTS);
170	}
171	} else {
172	unsigned int clear = TIOCM_DTR;
173
174	clear \|= (!rs485_on \|\| RTS_after_send) ? TIOCM_RTS : 0;
175	uart_clear_mctrl(uport, clear);
176	}
177	}	169	}
178		170
179	/*	171	/*
@@ -1075,11 +1067,6 @@ uart_tiocmset(struct tty_struct *tty, unsigned int set, unsigned int clear) · 895 unmodified lines
1075	goto out;	1067	goto out;
1076		1068
1077	if (!tty_io_error(tty)) {	1069	if (!tty_io_error(tty)) {
1078	if (uport->rs485.flags & SER_RS485_ENABLED) {
1079	set &= ~TIOCM_RTS;
1080	clear &= ~TIOCM_RTS;
1081	}
1082
1083	uart_update_mctrl(uport, set, clear);	1070	uart_update_mctrl(uport, set, clear);
1084	ret = 0;	1071	ret = 0;
1085	}	1072	}
@@ -2390,6 +2377,9 @@ uart_configure_port(struct uart_driver drv, struct uart_state state, · 1304 unmodified lines
2390	*/	2377	*/
2391	spin_lock_irqsave(&port->lock, flags);	2378	spin_lock_irqsave(&port->lock, flags);
2392	port->mctrl &= TIOCM_DTR;	2379	port->mctrl &= TIOCM_DTR;
		2380	if (port->rs485.flags & SER_RS485_ENABLED &&
		2381	!(port->rs485.flags & SER_RS485_RTS_AFTER_SEND))
		2382	port->mctrl \|= TIOCM_RTS;
2393	port->ops->set_mctrl(port, port->mctrl);	2383	port->ops->set_mctrl(port, port->mctrl);
2394	spin_unlock_irqrestore(&port->lock, flags);	2384	spin_unlock_irqrestore(&port->lock, flags);
2395		2385

drivers/tty/serial/stm32-usart.c+13−1

 	struct stm32_port *stm32_port = to_stm32_port(port);
 	const struct stm32_usart_offsets *ofs = &stm32_port->info->ofs;
 	struct circ_buf *xmit = &port->state->xmit;
+	u32 isr;
+	int ret;
 	if (port->x_char) {
 		if (stm32_usart_tx_dma_started(stm32_port) &&
 		    stm32_usart_tx_dma_enabled(stm32_port))
 			stm32_usart_clr_bits(port, ofs->cr3, USART_CR3_DMAT);
+		/* Check that TDR is empty before filling FIFO */
+		ret =
+		readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
+						  isr,
+						  (isr & USART_SR_TXE),
+						  10, 1000);
+		if (ret)
+			dev_warn(port->dev, "1 character may be erased\n");
 		writel_relaxed(port->x_char, port->membase + ofs->tdr);
 		port->x_char = 0;
 		port->icount.tx++;
 	struct serial_rs485 *rs485conf = &port->rs485;
 	struct circ_buf *xmit = &port->state->xmit;
-	if (uart_circ_empty(xmit))
+	if (uart_circ_empty(xmit) && !port->x_char)
 		return;
 	if (rs485conf->flags & SER_RS485_ENABLED) {

drivers/usb/cdns3/drd.c+3−3

@@ -483,11 +483,11 @@ int cdns_drd_exit(struct cdns *cdns) · 482 unmodified lines
483	/* Indicate the cdns3 core was power lost before */	483	/* Indicate the cdns3 core was power lost before */
484	bool cdns_power_is_lost(struct cdns *cdns)	484	bool cdns_power_is_lost(struct cdns *cdns)
485	{	485	{
486	if (cdns->version == CDNS3_CONTROLLER_V1) {	486	if (cdns->version == CDNS3_CONTROLLER_V0) {
487	if (!(readl(&cdns->otg_v1_regs->simulate) & BIT(0)))	487	if (!(readl(&cdns->otg_v0_regs->simulate) & BIT(0)))
488	return true;	488	return true;
489	} else {	489	} else {
490	if (!(readl(&cdns->otg_v0_regs->simulate) & BIT(0)))	490	if (!(readl(&cdns->otg_v1_regs->simulate) & BIT(0)))
491	return true;	491	return true;
492	}	492	}
493	return false;	493	return false;

drivers/usb/common/ulpi.c+5−2

 	struct ulpi *ulpi = to_ulpi_dev(dev);
 	const struct ulpi_device_id *id;
-	/* Some ULPI devices don't have a vendor id so rely on OF match */
+	/*
-	if (ulpi->id.vendor == 0)
+	 * Some ULPI devices don't have a vendor id
+	 * or provide an id_table so rely on OF match.
+	 */
+	if (ulpi->id.vendor == 0 || !drv->id_table)
 		return of_driver_match_device(dev, driver);
 	for (id = drv->id_table; id->vendor; id++)

drivers/usb/core/hcd.c+14−0

@@ -1563,6 +1563,13 @@ int usb_hcd_submit_urb (struct urb *urb, gfp_t mem_flags) · 1562 unmodified lines
1563	urb->hcpriv = NULL;	1563	urb->hcpriv = NULL;
1564	INIT_LIST_HEAD(&urb->urb_list);	1564	INIT_LIST_HEAD(&urb->urb_list);
1565	atomic_dec(&urb->use_count);	1565	atomic_dec(&urb->use_count);
		1566	/*
		1567	* Order the write of urb->use_count above before the read
		1568	* of urb->reject below. Pairs with the memory barriers in
		1569	* usb_kill_urb() and usb_poison_urb().
		1570	*/
		1571	smp_mb__after_atomic();
		1572
1566	atomic_dec(&urb->dev->urbnum);	1573	atomic_dec(&urb->dev->urbnum);
1567	if (atomic_read(&urb->reject))	1574	if (atomic_read(&urb->reject))
1568	wake_up(&usb_kill_urb_queue);	1575	wake_up(&usb_kill_urb_queue);
@@ -1665,6 +1672,13 @@ static void __usb_hcd_giveback_urb(struct urb *urb) · 96 unmodified lines
1665		1672
1666	usb_anchor_resume_wakeups(anchor);	1673	usb_anchor_resume_wakeups(anchor);
1667	atomic_dec(&urb->use_count);	1674	atomic_dec(&urb->use_count);
		1675	/*
		1676	* Order the write of urb->use_count above before the read
		1677	* of urb->reject below. Pairs with the memory barriers in
		1678	* usb_kill_urb() and usb_poison_urb().
		1679	*/
		1680	smp_mb__after_atomic();
		1681
1668	if (unlikely(atomic_read(&urb->reject)))	1682	if (unlikely(atomic_read(&urb->reject)))
1669	wake_up(&usb_kill_urb_queue);	1683	wake_up(&usb_kill_urb_queue);
1670	usb_put_urb(urb);	1684	usb_put_urb(urb);

drivers/usb/core/urb.c+12−0

 	if (!(urb && urb->dev && urb->ep))
 		return;
 	atomic_inc(&urb->reject);
+	/*
+	 * Order the write of urb->reject above before the read
+	 * of urb->use_count below.  Pairs with the barriers in
+	 * __usb_hcd_giveback_urb() and usb_hcd_submit_urb().
+	 */
+	smp_mb__after_atomic();
 	usb_hcd_unlink_urb(urb, -ENOENT);
 	wait_event(usb_kill_urb_queue, atomic_read(&urb->use_count) == 0);
 	if (!urb)
 		return;
 	atomic_inc(&urb->reject);
+	/*
+	 * Order the write of urb->reject above before the read
+	 * of urb->use_count below.  Pairs with the barriers in
+	 * __usb_hcd_giveback_urb() and usb_hcd_submit_urb().
+	 */
+	smp_mb__after_atomic();
 	if (!urb->dev || !urb->ep)
 		return;

drivers/usb/dwc2/gadget.c+1−1

@@ -5097,7 +5097,7 @@ int dwc2_hsotg_suspend(struct dwc2_hsotg *hsotg) · 5096 unmodified lines
5097	hsotg->gadget.speed = USB_SPEED_UNKNOWN;	5097	hsotg->gadget.speed = USB_SPEED_UNKNOWN;
5098	spin_unlock_irqrestore(&hsotg->lock, flags);	5098	spin_unlock_irqrestore(&hsotg->lock, flags);
5099		5099
5100	for (ep = 0; ep < hsotg->num_of_eps; ep++) {	5100	for (ep = 1; ep < hsotg->num_of_eps; ep++) {
5101	if (hsotg->eps_in[ep])	5101	if (hsotg->eps_in[ep])
5102	dwc2_hsotg_ep_disable_lock(&hsotg->eps_in[ep]->ep);	5102	dwc2_hsotg_ep_disable_lock(&hsotg->eps_in[ep]->ep);
5103	if (hsotg->eps_out[ep])	5103	if (hsotg->eps_out[ep])

drivers/usb/dwc3/dwc3-xilinx.c+18−5

 	int			ret;
 	u32			reg;
-	usb3_phy = devm_phy_get(dev, "usb3-phy");
+	usb3_phy = devm_phy_optional_get(dev, "usb3-phy");
-	if (PTR_ERR(usb3_phy) == -EPROBE_DEFER) {
+	if (IS_ERR(usb3_phy)) {
-		ret = -EPROBE_DEFER;
+		ret = PTR_ERR(usb3_phy);
+		dev_err_probe(dev, ret,
+			      "failed to get USB3 PHY\n");
 		goto err;
-	} else if (IS_ERR(usb3_phy)) {
-		usb3_phy = NULL;
 	}
+	/*
+	 * The following core resets are not required unless a USB3 PHY
+	 * is used, and the subsequent register settings are not required
+	 * unless a core reset is performed (they should be set properly
+	 * by the first-stage boot loader, but may be reverted by a core
+	 * reset). They may also break the configuration if USB3 is actually
+	 * in use but the usb3-phy entry is missing from the device tree.
+	 * Therefore, skip these operations in this case.
+	 */
+	if (!usb3_phy)
+		goto skip_usb3_phy;
 	crst = devm_reset_control_get_exclusive(dev, "usb_crst");
 	if (IS_ERR(crst)) {
 		ret = PTR_ERR(crst);
 		goto err;
 	}
+skip_usb3_phy:
 	/*
 	 * This routes the USB DMA traffic to go through FPD path instead
 	 * of reaching DDR directly. This traffic routing is needed to

drivers/usb/gadget/function/f_sourcesink.c+1−0

@@ -584,6 +584,7 @@ static int source_sink_start_ep(struct f_sourcesink *ss, bool is_in, · 583 unmodified lines
584		584
585	if (is_iso) {	585	if (is_iso) {
586	switch (speed) {	586	switch (speed) {
		587	case USB_SPEED_SUPER_PLUS:
587	case USB_SPEED_SUPER:	588	case USB_SPEED_SUPER:
588	size = ss->isoc_maxpacket *	589	size = ss->isoc_maxpacket *
589	(ss->isoc_mult + 1) *	590	(ss->isoc_mult + 1) *

drivers/usb/gadget/udc/at91_udc.c+1−1

@@ -1895,7 +1895,7 @@ static int at91udc_probe(struct platform_device *pdev) · 1894 unmodified lines
1895	at91_vbus_irq, 0, driver_name, udc);	1895	at91_vbus_irq, 0, driver_name, udc);
1896	if (retval) {	1896	if (retval) {
1897	DBG("request vbus irq %d failed\n",	1897	DBG("request vbus irq %d failed\n",
1898	udc->board.vbus_pin);	1898	desc_to_gpio(udc->board.vbus_pin));
1899	goto err_unprepare_iclk;	1899	goto err_unprepare_iclk;
1900	}	1900	}
1901	}	1901	}

drivers/usb/host/xhci-plat.c+3−0

@@ -437,6 +437,9 @@ static int __maybe_unused xhci_plat_suspend(struct device *dev) · 436 unmodified lines
437	struct xhci_hcd *xhci = hcd_to_xhci(hcd);	437	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
438	int ret;	438	int ret;
439		439
		440	if (pm_runtime_suspended(dev))
		441	pm_runtime_resume(dev);
		442
440	ret = xhci_priv_suspend_quirk(hcd);	443	ret = xhci_priv_suspend_quirk(hcd);
441	if (ret)	444	if (ret)
442	return ret;	445	return ret;

drivers/usb/storage/unusual_devs.h+10−0

@@ -2301,6 +2301,16 @@ UNUSUAL_DEV( 0x2027, 0xa001, 0x0000, 0x9999, · 2300 unmodified lines
2301	USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_euscsi_init,	2301	USB_SC_DEVICE, USB_PR_DEVICE, usb_stor_euscsi_init,
2302	US_FL_SCM_MULT_TARG ),	2302	US_FL_SCM_MULT_TARG ),
2303		2303
		2304	/*
		2305	* Reported by DocMAX <mail@vacharakis.de>
		2306	* and Thomas Weißschuh <linux@weissschuh.net>
		2307	*/
		2308	UNUSUAL_DEV( 0x2109, 0x0715, 0x9999, 0x9999,
		2309	"VIA Labs, Inc.",
		2310	"VL817 SATA Bridge",
		2311	USB_SC_DEVICE, USB_PR_DEVICE, NULL,
		2312	US_FL_IGNORE_UAS),
		2313
2304	UNUSUAL_DEV( 0x2116, 0x0320, 0x0001, 0x0001,	2314	UNUSUAL_DEV( 0x2116, 0x0320, 0x0001, 0x0001,
2305	"ST",	2315	"ST",
2306	"2A",	2316	"2A",

drivers/usb/typec/port-mapper.c+7−1

 {
 	struct each_port_arg arg = { .port = con, .match = NULL };
+	if (!has_acpi_companion(&con->dev))
+		return 0;
 	bus_for_each_dev(&acpi_bus_type, NULL, &arg, typec_port_match);
+	if (!arg.match)
+		return 0;
 	/*
 	 * REVISIT: Now each connector can have only a single component master.
 void typec_unlink_ports(struct typec_port *con)
 {
-	component_master_del(&con->dev, &typec_aggregate_ops);
+	if (has_acpi_companion(&con->dev))
+		component_master_del(&con->dev, &typec_aggregate_ops);
 }

drivers/usb/typec/tcpm/tcpci.c+26−0

@@ -75,9 +75,25 @@ static int tcpci_write16(struct tcpci *tcpci, unsigned int reg, u16 val) · 74 unmodified lines
75	static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)	75	static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc)
76	{	76	{
77	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);	77	struct tcpci *tcpci = tcpc_to_tcpci(tcpc);
		78	bool vconn_pres;
		79	enum typec_cc_polarity polarity = TYPEC_POLARITY_CC1;
78	unsigned int reg;	80	unsigned int reg;
79	int ret;	81	int ret;
80		82
		83	ret = regmap_read(tcpci->regmap, TCPC_POWER_STATUS, &reg);
		84	if (ret < 0)
		85	return ret;
		86
		87	vconn_pres = !!(reg & TCPC_POWER_STATUS_VCONN_PRES);
		88	if (vconn_pres) {
		89	ret = regmap_read(tcpci->regmap, TCPC_TCPC_CTRL, &reg);
		90	if (ret < 0)
		91	return ret;
		92
		93	if (reg & TCPC_TCPC_CTRL_ORIENTATION)
		94	polarity = TYPEC_POLARITY_CC2;
		95	}
		96
81	switch (cc) {	97	switch (cc) {
82	case TYPEC_CC_RA:	98	case TYPEC_CC_RA:
83	reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) \|	99	reg = (TCPC_ROLE_CTRL_CC_RA << TCPC_ROLE_CTRL_CC1_SHIFT) \|
@@ -112,6 +128,16 @@ static int tcpci_set_cc(struct tcpc_dev *tcpc, enum typec_cc_status cc) · 28 unmodified lines
112	break;	128	break;
113	}	129	}
114		130
		131	if (vconn_pres) {
		132	if (polarity == TYPEC_POLARITY_CC2) {
		133	reg &= ~(TCPC_ROLE_CTRL_CC1_MASK << TCPC_ROLE_CTRL_CC1_SHIFT);
		134	reg \|= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC1_SHIFT);
		135	} else {
		136	reg &= ~(TCPC_ROLE_CTRL_CC2_MASK << TCPC_ROLE_CTRL_CC2_SHIFT);
		137	reg \|= (TCPC_ROLE_CTRL_CC_OPEN << TCPC_ROLE_CTRL_CC2_SHIFT);
		138	}
		139	}
		140
115	ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);	141	ret = regmap_write(tcpci->regmap, TCPC_ROLE_CTRL, reg);
116	if (ret < 0)	142	if (ret < 0)
117	return ret;	143	return ret;

drivers/usb/typec/tcpm/tcpci.h+1−0

@@ -98,6 +98,7 @@ · 97 unmodified lines
98	#define TCPC_POWER_STATUS_SOURCING_VBUS BIT(4)	98	#define TCPC_POWER_STATUS_SOURCING_VBUS BIT(4)
99	#define TCPC_POWER_STATUS_VBUS_DET BIT(3)	99	#define TCPC_POWER_STATUS_VBUS_DET BIT(3)
100	#define TCPC_POWER_STATUS_VBUS_PRES BIT(2)	100	#define TCPC_POWER_STATUS_VBUS_PRES BIT(2)
		101	#define TCPC_POWER_STATUS_VCONN_PRES BIT(1)
101	#define TCPC_POWER_STATUS_SINKING_VBUS BIT(0)	102	#define TCPC_POWER_STATUS_SINKING_VBUS BIT(0)
102		103
103	#define TCPC_FAULT_STATUS 0x1f	104	#define TCPC_FAULT_STATUS 0x1f

drivers/usb/typec/tcpm/tcpm.c+6−1

 	case SNK_TRYWAIT_DEBOUNCE:
 		break;
 	case SNK_ATTACH_WAIT:
-		tcpm_set_state(port, SNK_UNATTACHED, 0);
+	case SNK_DEBOUNCED:
+		/* Do nothing, as TCPM is still waiting for vbus to reaach VSAFE5V to connect */
 		break;
 	case SNK_NEGOTIATE_CAPABILITIES:
 	case PR_SWAP_SNK_SRC_SOURCE_ON:
 		/* Do nothing, vsafe0v is expected during transition */
 		break;
+	case SNK_ATTACH_WAIT:
+	case SNK_DEBOUNCED:
+		/*Do nothing, still waiting for VSAFE5V for connect */
+		break;
 	default:
 		if (port->pwr_role == TYPEC_SINK && port->auto_vbus_discharge_enabled)
 			tcpm_set_state(port, SNK_UNATTACHED, 0);

drivers/usb/typec/ucsi/ucsi_ccg.c+1−1

@@ -325,7 +325,7 @@ static int ucsi_ccg_init(struct ucsi_ccg *uc) · 324 unmodified lines
325	if (status < 0)	325	if (status < 0)
326	return status;	326	return status;
327		327
328	if (!data)	328	if (!(data & DEV_INT))
329	return 0;	329	return 0;
330		330
331	status = ccg_write(uc, CCGX_RAB_INTR_REG, &data, sizeof(data));	331	status = ccg_write(uc, CCGX_RAB_INTR_REG, &data, sizeof(data));

drivers/video/fbdev/hyperv_fb.c+3−13

 static uint screen_width = HVFB_WIDTH;
 static uint screen_height = HVFB_HEIGHT;
-static uint screen_width_max = HVFB_WIDTH;
-static uint screen_height_max = HVFB_HEIGHT;
 static uint screen_depth;
 static uint screen_fb_size;
 static uint dio_fb_size; /* FB size for deferred IO */
 	int ret = 0;
 	unsigned long t;
 	u8 index;
-	int i;
 	memset(msg, 0, sizeof(struct synthvid_msg));
 	msg->vid_hdr.type = SYNTHVID_RESOLUTION_REQUEST;
 		goto out;
 	}
-	for (i = 0; i < msg->resolution_resp.resolution_count; i++) {
-		screen_width_max = max_t(unsigned int, screen_width_max,
-		    msg->resolution_resp.supported_resolution[i].width);
-		screen_height_max = max_t(unsigned int, screen_height_max,
-		    msg->resolution_resp.supported_resolution[i].height);
-	}
 	screen_width =
 		msg->resolution_resp.supported_resolution[index].width;
 	screen_height =
 	if (x < HVFB_WIDTH_MIN || y < HVFB_HEIGHT_MIN ||
 	    (synthvid_ver_ge(par->synthvid_version, SYNTHVID_VERSION_WIN10) &&
-	    (x > screen_width_max || y > screen_height_max)) ||
+	    (x * y * screen_depth / 8 > screen_fb_size)) ||
 	    (par->synthvid_version == SYNTHVID_VERSION_WIN8 &&
 	     x * y * screen_depth / 8 > SYNTHVID_FB_SIZE_WIN8) ||
 	    (par->synthvid_version == SYNTHVID_VERSION_WIN7 &&
 	}
 	hvfb_get_option(info);
-	pr_info("Screen resolution: %dx%d, Color depth: %d\n",
+	pr_info("Screen resolution: %dx%d, Color depth: %d, Frame buffer size: %d\n",
-		screen_width, screen_height, screen_depth);
+		screen_width, screen_height, screen_depth, screen_fb_size);
 	ret = hvfb_getmem(hdev, info);
 	if (ret) {

fs/binfmt_misc.c+4−4

 };
 MODULE_ALIAS_FS("binfmt_misc");
+static struct ctl_table_header *binfmt_misc_header;
 static int __init init_misc_binfmt(void)
 {
 	int err = register_filesystem(&bm_fs_type);
 	if (!err)
 		insert_binfmt(&misc_format);
-	if (!register_sysctl_mount_point("fs/binfmt_misc")) {
+	binfmt_misc_header = register_sysctl_mount_point("fs/binfmt_misc");
-		pr_warn("Failed to create fs/binfmt_misc sysctl mount point");
-		return -ENOMEM;
-	}
 	return 0;
 }
 static void __exit exit_misc_binfmt(void)
 {
+	unregister_sysctl_table(binfmt_misc_header);
 	unregister_binfmt(&misc_format);
 	unregister_filesystem(&bm_fs_type);
 }

fs/btrfs/ioctl.c+77−13

 		if (em->generation < newer_than)
 			goto next;
+		/*
+		 * Our start offset might be in the middle of an existing extent
+		 * map, so take that into account.
+		 */
+		range_len = em->len - (cur - em->start);
+		/*
+		 * If this range of the extent map is already flagged for delalloc,
+		 * skip it, because:
+		 *
+		 * 1) We could deadlock later, when trying to reserve space for
+		 *    delalloc, because in case we can't immediately reserve space
+		 *    the flusher can start delalloc and wait for the respective
+		 *    ordered extents to complete. The deadlock would happen
+		 *    because we do the space reservation while holding the range
+		 *    locked, and starting writeback, or finishing an ordered
+		 *    extent, requires locking the range;
+		 *
+		 * 2) If there's delalloc there, it means there's dirty pages for
+		 *    which writeback has not started yet (we clean the delalloc
+		 *    flag when starting writeback and after creating an ordered
+		 *    extent). If we mark pages in an adjacent range for defrag,
+		 *    then we will have a larger contiguous range for delalloc,
+		 *    very likely resulting in a larger extent after writeback is
+		 *    triggered (except in a case of free space fragmentation).
+		 */
+		if (test_range_bit(&inode->io_tree, cur, cur + range_len - 1,
+				   EXTENT_DELALLOC, 0, NULL))
+			goto next;
 		/*
 		 * For do_compress case, we want to compress all valid file
 		 * extents, thus no @extent_thresh or mergeable check.
 			goto add;
 		/* Skip too large extent */
-		if (em->len >= extent_thresh)
+		if (range_len >= extent_thresh)
 			goto next;
 		next_mergeable = defrag_check_next_extent(&inode->vfs_inode, em,
 	list_for_each_entry(entry, &target_list, list) {
 		u32 range_len = entry->len;
-		/* Reached the limit */
+		/* Reached or beyond the limit */
-		if (max_sectors && max_sectors == *sectors_defragged)
+		if (max_sectors && *sectors_defragged >= max_sectors) {
+			ret = 1;
 			break;
+		}
 		if (max_sectors)
 			range_len = min_t(u32, range_len,
 				       extent_thresh, newer_than, do_compress);
 		if (ret < 0)
 			break;
-		*sectors_defragged += range_len;
+		*sectors_defragged += range_len >>
+				      inode->root->fs_info->sectorsize_bits;
 	}
 out:
 	list_for_each_entry_safe(entry, tmp, &target_list, list) {
  * @newer_than:	   minimum transid to defrag
  * @max_to_defrag: max number of sectors to be defragged, if 0, the whole inode
  *		   will be defragged.
+ *
+ * Return <0 for error.
+ * Return >=0 for the number of sectors defragged, and range->start will be updated
+ * to indicate the file offset where next defrag should be started at.
+ * (Mostly for autodefrag, which sets @max_to_defrag thus we may exit early without
+ *  defragging all the range).
  */
 int btrfs_defrag_file(struct inode *inode, struct file_ra_state *ra,
 		      struct btrfs_ioctl_defrag_range_args *range,
 	int compress_type = BTRFS_COMPRESS_ZLIB;
 	int ret = 0;
 	u32 extent_thresh = range->extent_thresh;
+	pgoff_t start_index;
 	if (isize == 0)
 		return 0;
 	if (range->start + range->len > range->start) {
 		/* Got a specific range */
-		last_byte = min(isize, range->start + range->len) - 1;
+		last_byte = min(isize, range->start + range->len);
 	} else {
 		/* Defrag until file end */
-		last_byte = isize - 1;
+		last_byte = isize;
 	}
+	/* Align the range */
+	cur = round_down(range->start, fs_info->sectorsize);
+	last_byte = round_up(last_byte, fs_info->sectorsize) - 1;
 	/*
 	 * If we were not given a ra, allocate a readahead context. As
 	 * readahead is just an optimization, defrag will work without it so
 			file_ra_state_init(ra, inode->i_mapping);
 	}
-	/* Align the range */
+	/*
-	cur = round_down(range->start, fs_info->sectorsize);
+	 * Make writeback start from the beginning of the range, so that the
-	last_byte = round_up(last_byte, fs_info->sectorsize) - 1;
+	 * defrag range can be written sequentially.
+	 */
+	start_index = cur >> PAGE_SHIFT;
+	if (start_index < inode->i_mapping->writeback_index)
+		inode->i_mapping->writeback_index = start_index;
 	while (cur < last_byte) {
+		const unsigned long prev_sectors_defragged = sectors_defragged;
 		u64 cluster_end;
 		/* The cluster size 256K should always be page aligned */
 		BUILD_BUG_ON(!IS_ALIGNED(CLUSTER_SIZE, PAGE_SIZE));
+		if (btrfs_defrag_cancelled(fs_info)) {
+			ret = -EAGAIN;
+			break;
+		}
 		/* We want the cluster end at page boundary when possible */
 		cluster_end = (((cur >> PAGE_SHIFT) +
 			       (SZ_256K >> PAGE_SHIFT)) << PAGE_SHIFT) - 1;
 				cluster_end + 1 - cur, extent_thresh,
 				newer_than, do_compress,
 				&sectors_defragged, max_to_defrag);
+		if (sectors_defragged > prev_sectors_defragged)
+			balance_dirty_pages_ratelimited(inode->i_mapping);
 		btrfs_inode_unlock(inode, 0);
 		if (ret < 0)
 			break;
 		cur = cluster_end + 1;
+		if (ret > 0) {
+			ret = 0;
+			break;
+		}
 	}
 	if (ra_allocated)
 		kfree(ra);
+	/*
+	 * Update range.start for autodefrag, this will indicate where to start
+	 * in next run.
+	 */
+	range->start = cur;
 	if (sectors_defragged) {
 		/*
 		 * We have defragged some sectors, for compression case they
 	btrfs_inode_lock(inode, 0);
 	err = btrfs_delete_subvolume(dir, dentry);
 	btrfs_inode_unlock(inode, 0);
-	if (!err) {
+	if (!err)
-		fsnotify_rmdir(dir, dentry);
+		d_delete_notify(dir, dentry);
-		d_delete(dentry);
-	}
 out_dput:
 	dput(dentry);

fs/ceph/caps.c+37−18

 	struct ceph_mds_client *mdsc = ceph_sb_to_client(inode->i_sb)->mdsc;
 	struct ceph_inode_info *ci = ceph_inode(inode);
 	struct ceph_mds_request *req1 = NULL, *req2 = NULL;
+	unsigned int max_sessions;
 	int ret, err = 0;
 	spin_lock(&ci->i_unsafe_lock);
 	}
 	spin_unlock(&ci->i_unsafe_lock);
+	/*
+	 * The mdsc->max_sessions is unlikely to be changed
+	 * mostly, here we will retry it by reallocating the
+	 * sessions array memory to get rid of the mdsc->mutex
+	 * lock.
+	 */
+retry:
+	max_sessions = mdsc->max_sessions;
 	/*
 	 * Trigger to flush the journal logs in all the relevant MDSes
 	 * manually, or in the worst case we must wait at most 5 seconds
 	 * to wait the journal logs to be flushed by the MDSes periodically.
 	 */
-	if (req1 || req2) {
+	if ((req1 || req2) && likely(max_sessions)) {
 		struct ceph_mds_session **sessions = NULL;
 		struct ceph_mds_session *s;
 		struct ceph_mds_request *req;
-		unsigned int max;
 		int i;
-		/*
+		sessions = kzalloc(max_sessions * sizeof(s), GFP_KERNEL);
-		 * The mdsc->max_sessions is unlikely to be changed
+		if (!sessions) {
-		 * mostly, here we will retry it by reallocating the
+			err = -ENOMEM;
-		 * sessions arrary memory to get rid of the mdsc->mutex
+			goto out;
-		 * lock.
+		}
-		 */
-retry:
-		max = mdsc->max_sessions;
-		sessions = krealloc(sessions, max * sizeof(s), __GFP_ZERO);
-		if (!sessions)
-			return -ENOMEM;
 		spin_lock(&ci->i_unsafe_lock);
 		if (req1) {
 			list_for_each_entry(req, &ci->i_unsafe_dirops,
 					    r_unsafe_dir_item) {
 				s = req->r_session;
-				if (unlikely(s->s_mds >= max)) {
+				if (unlikely(s->s_mds >= max_sessions)) {
 					spin_unlock(&ci->i_unsafe_lock);
+					for (i = 0; i < max_sessions; i++) {
+						s = sessions[i];
+						if (s)
+							ceph_put_mds_session(s);
+					}
+					kfree(sessions);
 					goto retry;
 				}
 				if (!sessions[s->s_mds]) {
 			list_for_each_entry(req, &ci->i_unsafe_iops,
 					    r_unsafe_target_item) {
 				s = req->r_session;
-				if (unlikely(s->s_mds >= max)) {
+				if (unlikely(s->s_mds >= max_sessions)) {
 					spin_unlock(&ci->i_unsafe_lock);
+					for (i = 0; i < max_sessions; i++) {
+						s = sessions[i];
+						if (s)
+							ceph_put_mds_session(s);
+					}
+					kfree(sessions);
 					goto retry;
 				}
 				if (!sessions[s->s_mds]) {
 		spin_unlock(&ci->i_ceph_lock);
 		/* send flush mdlog request to MDSes */
-		for (i = 0; i < max; i++) {
+		for (i = 0; i < max_sessions; i++) {
 			s = sessions[i];
 			if (s) {
 				send_flush_mdlog(s);
 					ceph_timeout_jiffies(req1->r_timeout));
 		if (ret)
 			err = -EIO;
-		ceph_mdsc_put_request(req1);
 	}
 	if (req2) {
 		ret = !wait_for_completion_timeout(&req2->r_safe_completion,
 					ceph_timeout_jiffies(req2->r_timeout));
 		if (ret)
 			err = -EIO;
-		ceph_mdsc_put_request(req2);
 	}
+out:
+	if (req1)
+		ceph_mdsc_put_request(req1);
+	if (req2)
+		ceph_mdsc_put_request(req2);
 	return err;
 }

fs/ceph/file.c+9−0

 	struct ceph_inode_info *ci = ceph_inode(dir);
 	struct inode *inode;
 	struct timespec64 now;
+	struct ceph_string *pool_ns;
 	struct ceph_mds_client *mdsc = ceph_sb_to_mdsc(dir->i_sb);
 	struct ceph_vino vino = { .ino = req->r_deleg_ino,
 				  .snap = CEPH_NOSNAP };
 	in.max_size = cpu_to_le64(lo->stripe_unit);
 	ceph_file_layout_to_legacy(lo, &in.layout);
+	/* lo is private, so pool_ns can't change */
+	pool_ns = rcu_dereference_raw(lo->pool_ns);
+	if (pool_ns) {
+		iinfo.pool_ns_len = pool_ns->len;
+		iinfo.pool_ns_data = pool_ns->str;
+	}
 	down_read(&mdsc->snap_rwsem);
 	ret = ceph_fill_inode(inode, NULL, &iinfo, NULL, req->r_session,
 				restore_deleg_ino(dir, req->r_deleg_ino);
 				ceph_mdsc_put_request(req);
 				try_async = false;
+				ceph_put_string(rcu_dereference_raw(lo.pool_ns));
 				goto retry;
 			}
+			ceph_put_string(rcu_dereference_raw(lo.pool_ns));
 			goto out_req;
 		}
 	}

fs/configfs/dir.c+3−3

 	configfs_detach_group(&group->cg_item);
 	d_inode(dentry)->i_flags |= S_DEAD;
 	dont_mount(dentry);
+	d_drop(dentry);
 	fsnotify_rmdir(d_inode(parent), dentry);
-	d_delete(dentry);
 	inode_unlock(d_inode(parent));
 	dput(dentry);
 	configfs_detach_group(&group->cg_item);
 	d_inode(dentry)->i_flags |= S_DEAD;
 	dont_mount(dentry);
-	fsnotify_rmdir(d_inode(root), dentry);
 	inode_unlock(d_inode(dentry));
-	d_delete(dentry);
+	d_drop(dentry);
+	fsnotify_rmdir(d_inode(root), dentry);
 	inode_unlock(d_inode(root));

fs/devpts/inode.c+1−1

@@ -621,8 +621,8 @@ void devpts_pty_kill(struct dentry *dentry) · 620 unmodified lines
621		621
622	dentry->d_fsdata = NULL;	622	dentry->d_fsdata = NULL;
623	drop_nlink(dentry->d_inode);	623	drop_nlink(dentry->d_inode);
624	fsnotify_unlink(d_inode(dentry->d_parent), dentry);
625	d_drop(dentry);	624	d_drop(dentry);
		625	fsnotify_unlink(d_inode(dentry->d_parent), dentry);
626	dput(dentry); /* d_alloc_name() in devpts_pty_new() */	626	dput(dentry); /* d_alloc_name() in devpts_pty_new() */
627	}	627	}
628		628

fs/io_uring.c+8−3

 	struct io_ring_ctx *ctx = node->rsrc_data->ctx;
 	unsigned long flags;
 	bool first_add = false;
+	unsigned long delay = HZ;
 	spin_lock_irqsave(&ctx->rsrc_ref_lock, flags);
 	node->done = true;
+	/* if we are mid-quiesce then do not delay */
+	if (node->rsrc_data->quiesce)
+		delay = 0;
 	while (!list_empty(&ctx->rsrc_ref_list)) {
 		node = list_first_entry(&ctx->rsrc_ref_list,
 					    struct io_rsrc_node, node);
 	spin_unlock_irqrestore(&ctx->rsrc_ref_lock, flags);
 	if (first_add)
-		mod_delayed_work(system_wq, &ctx->rsrc_put_work, HZ);
+		mod_delayed_work(system_wq, &ctx->rsrc_put_work, delay);
 }
-static struct io_rsrc_node *io_rsrc_node_alloc(struct io_ring_ctx *ctx)
+static struct io_rsrc_node *io_rsrc_node_alloc(void)
 {
 	struct io_rsrc_node *ref_node;
 {
 	if (ctx->rsrc_backup_node)
 		return 0;
-	ctx->rsrc_backup_node = io_rsrc_node_alloc(ctx);
+	ctx->rsrc_backup_node = io_rsrc_node_alloc();
 	return ctx->rsrc_backup_node ? 0 : -ENOMEM;
 }

fs/jbd2/journal.c+2−0

 	jbd_unlock_bh_journal_head(bh);
 	return jh;
 }
+EXPORT_SYMBOL(jbd2_journal_grab_journal_head);
 static void __journal_remove_journal_head(struct buffer_head *bh)
 {
 		jbd_unlock_bh_journal_head(bh);
 	}
 }
+EXPORT_SYMBOL(jbd2_journal_put_journal_head);
 /*
  * Initialize jbd inode head

fs/namei.c+5−5

 	dentry->d_inode->i_flags |= S_DEAD;
 	dont_mount(dentry);
 	detach_mounts(dentry);
-	fsnotify_rmdir(dir, dentry);
 out:
 	inode_unlock(dentry->d_inode);
 	dput(dentry);
 	if (!error)
-		d_delete(dentry);
+		d_delete_notify(dir, dentry);
 	return error;
 }
 EXPORT_SYMBOL(vfs_rmdir);
 			if (!error) {
 				dont_mount(dentry);
 				detach_mounts(dentry);
-				fsnotify_unlink(dir, dentry);
 			}
 		}
 	}
 	inode_unlock(target);
 	/* We don't d_delete() NFS sillyrenamed files--they still exist. */
-	if (!error && !(dentry->d_flags & DCACHE_NFSFS_RENAMED)) {
+	if (!error && dentry->d_flags & DCACHE_NFSFS_RENAMED) {
+		fsnotify_unlink(dir, dentry);
+	} else if (!error) {
 		fsnotify_link_count(target);
-		d_delete(dentry);
+		d_delete_notify(dir, dentry);
 	}
 	return error;

fs/nfs/callback.h+1−1

@@ -170,7 +170,7 @@ struct cb_devicenotifyitem { · 169 unmodified lines
170	};	170	};
171		171
172	struct cb_devicenotifyargs {	172	struct cb_devicenotifyargs {
173	int ndevs;	173	uint32_t ndevs;
174	struct cb_devicenotifyitem *devs;	174	struct cb_devicenotifyitem *devs;
175	};	175	};
176		176

fs/nfs/callback_proc.c+1−1

@@ -358,7 +358,7 @@ __be32 nfs4_callback_devicenotify(void argp, void resp, · 357 unmodified lines
358	struct cb_process_state *cps)	358	struct cb_process_state *cps)
359	{	359	{
360	struct cb_devicenotifyargs *args = argp;	360	struct cb_devicenotifyargs *args = argp;
361	int i;	361	uint32_t i;
362	__be32 res = 0;	362	__be32 res = 0;
363	struct nfs_client *clp = cps->clp;	363	struct nfs_client *clp = cps->clp;
364	struct nfs_server *server = NULL;	364	struct nfs_server *server = NULL;

fs/nfs/callback_xdr.c+9−9

 				void *argp)
 {
 	struct cb_devicenotifyargs *args = argp;
+	uint32_t tmp, n, i;
 	__be32 *p;
 	__be32 status = 0;
-	u32 tmp;
-	int n, i;
-	args->ndevs = 0;
 	/* Num of device notifications */
 	p = xdr_inline_decode(xdr, sizeof(uint32_t));
 		goto out;
 	}
 	n = ntohl(*p++);
-	if (n <= 0)
+	if (n == 0)
 		goto out;
 	if (n > ULONG_MAX / sizeof(*args->devs)) {
 		status = htonl(NFS4ERR_BADXDR);
 			dev->cbd_immediate = 0;
 		}
-		args->ndevs++;
 		dprintk("%s: type %d layout 0x%x immediate %d\n",
 			__func__, dev->cbd_notify_type, dev->cbd_layout_type,
 			dev->cbd_immediate);
 	}
+	args->ndevs = n;
+	dprintk("%s: ndevs %d\n", __func__, args->ndevs);
+	return 0;
+err:
+	kfree(args->devs);
 out:
+	args->devs = NULL;
+	args->ndevs = 0;
 	dprintk("%s: status %d ndevs %d\n",
 		__func__, ntohl(status), args->ndevs);
 	return status;
-err:
-	kfree(args->devs);
-	goto out;
 }
 static __be32 decode_sessionid(struct xdr_stream *xdr,

fs/nfs/client.c+7−0

@@ -856,6 +856,13 @@ static int nfs_probe_fsinfo(struct nfs_server server, struct nfs_fh mntfh, str · 855 unmodified lines
856	server->namelen = pathinfo.max_namelen;	856	server->namelen = pathinfo.max_namelen;
857	}	857	}
858		858
		859	if (clp->rpc_ops->discover_trunking != NULL &&
		860	(server->caps & NFS_CAP_FS_LOCATIONS)) {
		861	error = clp->rpc_ops->discover_trunking(server, mntfh);
		862	if (error < 0)
		863	return error;
		864	}
		865
859	return 0;	866	return 0;
860	}	867	}
861		868

fs/nfs/dir.c+118−28

 EXPORT_SYMBOL_GPL(nfs_clear_verifier_delegated);
 #endif /* IS_ENABLED(CONFIG_NFS_V4) */
+static int nfs_dentry_verify_change(struct inode *dir, struct dentry *dentry)
+{
+	if (nfs_server_capable(dir, NFS_CAP_CASE_INSENSITIVE) &&
+	    d_really_is_negative(dentry))
+		return dentry->d_time == inode_peek_iversion_raw(dir);
+	return nfs_verify_change_attribute(dir, dentry->d_time);
+}
 /*
  * A check for whether or not the parent directory has changed.
  * In the case it has, we assume that the dentries are untrustworthy
 		return 1;
 	if (NFS_SERVER(dir)->flags & NFS_MOUNT_LOOKUP_CACHE_NONE)
 		return 0;
-	if (!nfs_verify_change_attribute(dir, dentry->d_time))
+	if (!nfs_dentry_verify_change(dir, dentry))
 		return 0;
 	/* Revalidate nfsi->cache_change_attribute before we declare a match */
 	if (nfs_mapping_need_revalidate_inode(dir)) {
 		if (__nfs_revalidate_inode(NFS_SERVER(dir), dir) < 0)
 			return 0;
 	}
-	if (!nfs_verify_change_attribute(dir, dentry->d_time))
+	if (!nfs_dentry_verify_change(dir, dentry))
 		return 0;
 	return 1;
 }
 		return 0;
 	if (NFS_SERVER(dir)->flags & NFS_MOUNT_LOOKUP_CACHE_NONEG)
 		return 1;
+	/* Case insensitive server? Revalidate negative dentries */
+	if (nfs_server_capable(dir, NFS_CAP_CASE_INSENSITIVE))
+		return 1;
 	return !nfs_check_verifier(dir, dentry, flags & LOOKUP_RCU);
 }
 	 * If the lookup failed despite the dentry change attribute being
 	 * a match, then we should revalidate the directory cache.
 	 */
-	if (!ret && nfs_verify_change_attribute(dir, dentry->d_time))
+	if (!ret && nfs_dentry_verify_change(dir, dentry))
 		nfs_mark_dir_for_revalidate(dir);
 	return nfs_lookup_revalidate_done(dir, dentry, inode, ret);
 }
 	dir_verifier = nfs_save_change_attribute(dir);
 	trace_nfs_lookup_enter(dir, dentry, flags);
 	error = NFS_PROTO(dir)->lookup(dir, dentry, fhandle, fattr);
-	if (error == -ENOENT)
+	if (error == -ENOENT) {
+		if (nfs_server_capable(dir, NFS_CAP_CASE_INSENSITIVE))
+			dir_verifier = inode_peek_iversion_raw(dir);
 		goto no_entry;
+	}
 	if (error < 0) {
 		res = ERR_PTR(error);
 		goto out;
 }
 EXPORT_SYMBOL_GPL(nfs_lookup);
+void nfs_d_prune_case_insensitive_aliases(struct inode *inode)
+{
+	/* Case insensitive server? Revalidate dentries */
+	if (inode && nfs_server_capable(inode, NFS_CAP_CASE_INSENSITIVE))
+		d_prune_aliases(inode);
+}
+EXPORT_SYMBOL_GPL(nfs_d_prune_case_insensitive_aliases);
 #if IS_ENABLED(CONFIG_NFS_V4)
 static int nfs4_lookup_revalidate(struct dentry *, unsigned int);
 	struct iattr attr = { .ia_valid = ATTR_OPEN };
 	struct inode *inode;
 	unsigned int lookup_flags = 0;
+	unsigned long dir_verifier;
 	bool switched = false;
 	int created = 0;
 	int err;
 		switch (err) {
 		case -ENOENT:
 			d_splice_alias(NULL, dentry);
-			nfs_set_verifier(dentry, nfs_save_change_attribute(dir));
+			if (nfs_server_capable(dir, NFS_CAP_CASE_INSENSITIVE))
+				dir_verifier = inode_peek_iversion_raw(dir);
+			else
+				dir_verifier = nfs_save_change_attribute(dir);
+			nfs_set_verifier(dentry, dir_verifier);
 			break;
 		case -EISDIR:
 		case -ENOTDIR:
 no_open:
 	res = nfs_lookup(dir, dentry, lookup_flags);
+	if (!res) {
+		inode = d_inode(dentry);
+		if ((lookup_flags & LOOKUP_DIRECTORY) && inode &&
+		    !S_ISDIR(inode->i_mode))
+			res = ERR_PTR(-ENOTDIR);
+		else if (inode && S_ISREG(inode->i_mode))
+			res = ERR_PTR(-EOPENSTALE);
+	} else if (!IS_ERR(res)) {
+		inode = d_inode(res);
+		if ((lookup_flags & LOOKUP_DIRECTORY) && inode &&
+		    !S_ISDIR(inode->i_mode)) {
+			dput(res);
+			res = ERR_PTR(-ENOTDIR);
+		} else if (inode && S_ISREG(inode->i_mode)) {
+			dput(res);
+			res = ERR_PTR(-EOPENSTALE);
+		}
+	}
 	if (switched) {
 		d_lookup_done(dentry);
 		if (!res)
 	switch (error) {
 	case -ENOENT:
 		d_delete(dentry);
-		fallthrough;
+		nfs_set_verifier(dentry, nfs_save_change_attribute(dir));
+		break;
 	case 0:
+		nfs_d_prune_case_insensitive_aliases(d_inode(dentry));
 		nfs_set_verifier(dentry, nfs_save_change_attribute(dir));
 	}
 }
 	trace_nfs_link_enter(inode, dir, dentry);
 	d_drop(dentry);
+	if (S_ISREG(inode->i_mode))
+		nfs_sync_inode(inode);
 	error = NFS_PROTO(dir)->link(inode, dir, &dentry->d_name);
 	if (error == 0) {
 		nfs_set_verifier(dentry, nfs_save_change_attribute(dir));
 		}
 	}
+	if (S_ISREG(old_inode->i_mode))
+		nfs_sync_inode(old_inode);
 	task = nfs_async_rename(old_dir, new_dir, old_dentry, new_dentry, NULL);
 	if (IS_ERR(task)) {
 		error = PTR_ERR(task);
 static void nfs_access_free_entry(struct nfs_access_entry *entry)
 {
-	put_cred(entry->cred);
+	put_group_info(entry->group_info);
 	kfree_rcu(entry, rcu_head);
 	smp_mb__before_atomic();
 	atomic_long_dec(&nfs_access_nr_entries);
 }
 EXPORT_SYMBOL_GPL(nfs_access_zap_cache);
+static int access_cmp(const struct cred *a, const struct nfs_access_entry *b)
+{
+	struct group_info *ga, *gb;
+	int g;
+	if (uid_lt(a->fsuid, b->fsuid))
+		return -1;
+	if (uid_gt(a->fsuid, b->fsuid))
+		return 1;
+	if (gid_lt(a->fsgid, b->fsgid))
+		return -1;
+	if (gid_gt(a->fsgid, b->fsgid))
+		return 1;
+	ga = a->group_info;
+	gb = b->group_info;
+	if (ga == gb)
+		return 0;
+	if (ga == NULL)
+		return -1;
+	if (gb == NULL)
+		return 1;
+	if (ga->ngroups < gb->ngroups)
+		return -1;
+	if (ga->ngroups > gb->ngroups)
+		return 1;
+	for (g = 0; g < ga->ngroups; g++) {
+		if (gid_lt(ga->gid[g], gb->gid[g]))
+			return -1;
+		if (gid_gt(ga->gid[g], gb->gid[g]))
+			return 1;
+	}
+	return 0;
+}
 static struct nfs_access_entry *nfs_access_search_rbtree(struct inode *inode, const struct cred *cred)
 {
 	struct rb_node *n = NFS_I(inode)->access_cache.rb_node;
 	while (n != NULL) {
 		struct nfs_access_entry *entry =
 			rb_entry(n, struct nfs_access_entry, rb_node);
-		int cmp = cred_fscmp(cred, entry->cred);
+		int cmp = access_cmp(cred, entry);
 		if (cmp < 0)
 			n = n->rb_left;
 	return NULL;
 }
-static int nfs_access_get_cached_locked(struct inode *inode, const struct cred *cred, struct nfs_access_entry *res, bool may_block)
+static int nfs_access_get_cached_locked(struct inode *inode, const struct cred *cred, u32 *mask, bool may_block)
 {
 	struct nfs_inode *nfsi = NFS_I(inode);
 	struct nfs_access_entry *cache;
 		spin_lock(&inode->i_lock);
 		retry = false;
 	}
-	res->cred = cache->cred;
+	*mask = cache->mask;
-	res->mask = cache->mask;
 	list_move_tail(&cache->lru, &nfsi->access_cache_entry_lru);
 	err = 0;
 out:
 	return -ENOENT;
 }
-static int nfs_access_get_cached_rcu(struct inode *inode, const struct cred *cred, struct nfs_access_entry *res)
+static int nfs_access_get_cached_rcu(struct inode *inode, const struct cred *cred, u32 *mask)
 {
 	/* Only check the most recently returned cache entry,
 	 * but do it without locking.
 	lh = rcu_dereference(list_tail_rcu(&nfsi->access_cache_entry_lru));
 	cache = list_entry(lh, struct nfs_access_entry, lru);
 	if (lh == &nfsi->access_cache_entry_lru ||
-	    cred_fscmp(cred, cache->cred) != 0)
+	    access_cmp(cred, cache) != 0)
 		cache = NULL;
 	if (cache == NULL)
 		goto out;
 	if (nfs_check_cache_invalid(inode, NFS_INO_INVALID_ACCESS))
 		goto out;
-	res->cred = cache->cred;
+	*mask = cache->mask;
-	res->mask = cache->mask;
 	err = 0;
 out:
 	rcu_read_unlock();
 	return err;
 }
-int nfs_access_get_cached(struct inode *inode, const struct cred *cred, struct
+int nfs_access_get_cached(struct inode *inode, const struct cred *cred,
-nfs_access_entry *res, bool may_block)
+			  u32 *mask, bool may_block)
 {
 	int status;
-	status = nfs_access_get_cached_rcu(inode, cred, res);
+	status = nfs_access_get_cached_rcu(inode, cred, mask);
 	if (status != 0)
-		status = nfs_access_get_cached_locked(inode, cred, res,
+		status = nfs_access_get_cached_locked(inode, cred, mask,
 		    may_block);
 	return status;
 }
 EXPORT_SYMBOL_GPL(nfs_access_get_cached);
-static void nfs_access_add_rbtree(struct inode *inode, struct nfs_access_entry *set)
+static void nfs_access_add_rbtree(struct inode *inode,
+				  struct nfs_access_entry *set,
+				  const struct cred *cred)
 {
 	struct nfs_inode *nfsi = NFS_I(inode);
 	struct rb_root *root_node = &nfsi->access_cache;
 	while (*p != NULL) {
 		parent = *p;
 		entry = rb_entry(parent, struct nfs_access_entry, rb_node);
-		cmp = cred_fscmp(set->cred, entry->cred);
+		cmp = access_cmp(cred, entry);
 		if (cmp < 0)
 			p = &parent->rb_left;
 	nfs_access_free_entry(entry);
 }
-void nfs_access_add_cache(struct inode *inode, struct nfs_access_entry *set)
+void nfs_access_add_cache(struct inode *inode, struct nfs_access_entry *set,
+			  const struct cred *cred)
 {
 	struct nfs_access_entry *cache = kmalloc(sizeof(*cache), GFP_KERNEL);
 	if (cache == NULL)
 		return;
 	RB_CLEAR_NODE(&cache->rb_node);
-	cache->cred = get_cred(set->cred);
+	cache->fsuid = cred->fsuid;
+	cache->fsgid = cred->fsgid;
+	cache->group_info = get_group_info(cred->group_info);
 	cache->mask = set->mask;
 	/* The above field assignments must be visible
 	 * use rcu_assign_pointer, so just force the memory barrier.
 	 */
 	smp_wmb();
-	nfs_access_add_rbtree(inode, cache);
+	nfs_access_add_rbtree(inode, cache, cred);
 	/* Update accounting */
 	smp_mb__before_atomic();
 	trace_nfs_access_enter(inode);
-	status = nfs_access_get_cached(inode, cred, &cache, may_block);
+	status = nfs_access_get_cached(inode, cred, &cache.mask, may_block);
 	if (status == 0)
 		goto out_cached;
 		cache.mask |= NFS_ACCESS_DELETE | NFS_ACCESS_LOOKUP;
 	else
 		cache.mask |= NFS_ACCESS_EXECUTE;
-	cache.cred = cred;
+	status = NFS_PROTO(inode)->access(inode, &cache, cred);
-	status = NFS_PROTO(inode)->access(inode, &cache);
 	if (status != 0) {
 		if (status == -ESTALE) {
 			if (!S_ISDIR(inode->i_mode))
 		}
 		goto out;
 	}
-	nfs_access_add_cache(inode, &cache);
+	nfs_access_add_cache(inode, &cache, cred);
 out_cached:
 	cache_mask = nfs_access_calc_mask(cache.mask, inode->i_mode);
 	if ((mask & ~cache_mask & (MAY_READ | MAY_WRITE | MAY_EXEC)) != 0)

fs/nfs/filelayout/filelayout.h+1−1

@@ -51,7 +51,7 @@ struct nfs4_file_layout_dsaddr { · 50 unmodified lines
51	u32 stripe_count;	51	u32 stripe_count;
52	u8 *stripe_indices;	52	u8 *stripe_indices;
53	u32 ds_num;	53	u32 ds_num;
54	struct nfs4_pnfs_ds *ds_list[1];	54	struct nfs4_pnfs_ds *ds_list[];
55	};	55	};
56		56
57	struct nfs4_filelayout_segment {	57	struct nfs4_filelayout_segment {

fs/nfs/filelayout/filelayoutdev.c+1−3

@@ -136,9 +136,7 @@ nfs4_fl_alloc_deviceid_node(struct nfs_server server, struct pnfs_device pdev, · 135 unmodified lines
136	goto out_err_free_stripe_indices;	136	goto out_err_free_stripe_indices;
137	}	137	}
138		138
139	dsaddr = kzalloc(sizeof(*dsaddr) +	139	dsaddr = kzalloc(struct_size(dsaddr, ds_list, num), gfp_flags);
140	(sizeof(struct nfs4_pnfs_ds ) (num - 1)),
141	gfp_flags);
142	if (!dsaddr)	140	if (!dsaddr)
143	goto out_err_free_stripe_indices;	141	goto out_err_free_stripe_indices;
144		142

fs/nfs/internal.h+1−0

@@ -373,6 +373,7 @@ extern unsigned long nfs_access_cache_count(struct shrinker *shrink, · 372 unmodified lines
373	extern unsigned long nfs_access_cache_scan(struct shrinker *shrink,	373	extern unsigned long nfs_access_cache_scan(struct shrinker *shrink,
374	struct shrink_control *sc);	374	struct shrink_control *sc);
375	struct dentry nfs_lookup(struct inode , struct dentry *, unsigned int);	375	struct dentry nfs_lookup(struct inode , struct dentry *, unsigned int);
		376	void nfs_d_prune_case_insensitive_aliases(struct inode *inode);
376	int nfs_create(struct user_namespace , struct inode , struct dentry *,	377	int nfs_create(struct user_namespace , struct inode , struct dentry *,
377	umode_t, bool);	378	umode_t, bool);
378	int nfs_mkdir(struct user_namespace , struct inode , struct dentry *,	379	int nfs_mkdir(struct user_namespace , struct inode , struct dentry *,

fs/nfs/nfs3proc.c+3−2

 				  task_flags);
 }
-static int nfs3_proc_access(struct inode *inode, struct nfs_access_entry *entry)
+static int nfs3_proc_access(struct inode *inode, struct nfs_access_entry *entry,
+			    const struct cred *cred)
 {
 	struct nfs3_accessargs	arg = {
 		.fh		= NFS_FH(inode),
 		.rpc_proc	= &nfs3_procedures[NFS3PROC_ACCESS],
 		.rpc_argp	= &arg,
 		.rpc_resp	= &res,
-		.rpc_cred	= entry->cred,
+		.rpc_cred	= cred,
 	};
 	int status = -ENOMEM;

fs/nfs/nfs42proc.c+8−5

 {
 	struct inode *inode = file_inode(filep);
 	struct nfs_server *server = NFS_SERVER(inode);
-	u32 bitmask[3];
+	u32 bitmask[NFS_BITMASK_SZ];
 	struct nfs42_falloc_args args = {
 		.falloc_fh	= NFS_FH(inode),
 		.falloc_offset	= offset,
 		return status;
 	}
-	memcpy(bitmask, server->cache_consistency_bitmask, sizeof(bitmask));
+	nfs4_bitmask_set(bitmask, server->cache_consistency_bitmask, inode,
-	if (server->attr_bitmask[1] & FATTR4_WORD1_SPACE_USED)
+			 NFS_INO_INVALID_BLOCKS);
-		bitmask[1] |= FATTR4_WORD1_SPACE_USED;
 	res.falloc_fattr = nfs_alloc_fattr();
 	if (!res.falloc_fattr)
 	struct inode *src_inode = file_inode(src_f);
 	struct inode *dst_inode = file_inode(dst_f);
 	struct nfs_server *server = NFS_SERVER(dst_inode);
+	__u32 dst_bitmask[NFS_BITMASK_SZ];
 	struct nfs42_clone_args args = {
 		.src_fh = NFS_FH(src_inode),
 		.dst_fh = NFS_FH(dst_inode),
 		.src_offset = src_offset,
 		.dst_offset = dst_offset,
 		.count = count,
-		.dst_bitmask = server->cache_consistency_bitmask,
+		.dst_bitmask = dst_bitmask,
 	};
 	struct nfs42_clone_res res = {
 		.server	= server,
 	if (!res.dst_fattr)
 		return -ENOMEM;
+	nfs4_bitmask_set(dst_bitmask, server->cache_consistency_bitmask,
+			 dst_inode, NFS_INO_INVALID_BLOCKS);
 	status = nfs4_call_sync(server->client, server, msg,
 				&args.seq_args, &res.seq_res, 0);
 	trace_nfs4_clone(src_inode, dst_inode, &args, status);

fs/nfs/nfs4_fs.h+9−5

@@ -260,8 +260,8 @@ struct nfs4_state_maintenance_ops { · 259 unmodified lines
260	};	260	};
261		261
262	struct nfs4_mig_recovery_ops {	262	struct nfs4_mig_recovery_ops {
263	int (get_locations)(struct inode , struct nfs4_fs_locations *,	263	int (get_locations)(struct nfs_server , struct nfs_fh *,
264	struct page , const struct cred );	264	struct nfs4_fs_locations , struct page , const struct cred *);
265	int (fsid_present)(struct inode , const struct cred *);	265	int (fsid_present)(struct inode , const struct cred *);
266	};	266	};
267		267
@@ -280,7 +280,8 @@ struct rpc_clnt nfs4_negotiate_security(struct rpc_clnt , struct inode *, · 12 unmodified lines
280	int nfs4_submount(struct fs_context , struct nfs_server );	280	int nfs4_submount(struct fs_context , struct nfs_server );
281	int nfs4_replace_transport(struct nfs_server *server,	281	int nfs4_replace_transport(struct nfs_server *server,
282	const struct nfs4_fs_locations *locations);	282	const struct nfs4_fs_locations *locations);
283		283	size_t nfs_parse_server_name(char string, size_t len, struct sockaddr sa,
		284	size_t salen, struct net *net, int port);
284	/* nfs4proc.c */	285	/* nfs4proc.c */
285	extern int nfs4_handle_exception(struct nfs_server , int, struct nfs4_exception );	286	extern int nfs4_handle_exception(struct nfs_server , int, struct nfs4_exception );
286	extern int nfs4_async_handle_error(struct rpc_task *task,	287	extern int nfs4_async_handle_error(struct rpc_task *task,
@@ -302,8 +303,9 @@ extern int nfs4_do_close(struct nfs4_state *state, gfp_t gfp_mask, int wait); · 15 unmodified lines
302	extern int nfs4_server_capabilities(struct nfs_server server, struct nfs_fh fhandle);	303	extern int nfs4_server_capabilities(struct nfs_server server, struct nfs_fh fhandle);
303	extern int nfs4_proc_fs_locations(struct rpc_clnt , struct inode , const struct qstr *,	304	extern int nfs4_proc_fs_locations(struct rpc_clnt , struct inode , const struct qstr *,
304	struct nfs4_fs_locations , struct page );	305	struct nfs4_fs_locations , struct page );
305	extern int nfs4_proc_get_locations(struct inode , struct nfs4_fs_locations ,	306	extern int nfs4_proc_get_locations(struct nfs_server , struct nfs_fh ,
306	struct page page, const struct cred );	307	struct nfs4_fs_locations *,
		308	struct page page, const struct cred );
307	extern int nfs4_proc_fsid_present(struct inode , const struct cred );	309	extern int nfs4_proc_fsid_present(struct inode , const struct cred );
308	extern struct rpc_clnt nfs4_proc_lookup_mountpoint(struct inode ,	310	extern struct rpc_clnt nfs4_proc_lookup_mountpoint(struct inode ,
309	struct dentry *,	311	struct dentry *,
@@ -315,6 +317,8 @@ extern int nfs4_set_rw_stateid(nfs4_stateid *stateid, · 5 unmodified lines
315	const struct nfs_open_context *ctx,	317	const struct nfs_open_context *ctx,
316	const struct nfs_lock_context *l_ctx,	318	const struct nfs_lock_context *l_ctx,
317	fmode_t fmode);	319	fmode_t fmode);
		320	extern void nfs4_bitmask_set(__u32 bitmask[], const __u32 src[],
		321	struct inode *inode, unsigned long cache_validity);
318	extern int nfs4_proc_getattr(struct nfs_server server, struct nfs_fh fhandle,	322	extern int nfs4_proc_getattr(struct nfs_server server, struct nfs_fh fhandle,
319	struct nfs_fattr fattr, struct inode inode);	323	struct nfs_fattr fattr, struct inode inode);
320	extern int update_open_stateid(struct nfs4_state *state,	324	extern int update_open_stateid(struct nfs4_state *state,

fs/nfs/nfs4client.c+4−1

 	}
 	nfs_put_client(clp);
-	if (server->nfs_client->cl_hostname == NULL)
+	if (server->nfs_client->cl_hostname == NULL) {
 		server->nfs_client->cl_hostname = kstrdup(hostname, GFP_KERNEL);
+		if (server->nfs_client->cl_hostname == NULL)
+			return -ENOMEM;
+	}
 	nfs_server_insert_lists(server);
 	return nfs_probe_server(server, NFS_FH(d_inode(server->super->s_root)));

fs/nfs/nfs4namespace.c+12−7

 	return 0;
 }
-static size_t nfs_parse_server_name(char *string, size_t len,
+size_t nfs_parse_server_name(char *string, size_t len, struct sockaddr *sa,
-		struct sockaddr *sa, size_t salen, struct net *net)
+			     size_t salen, struct net *net, int port)
 {
 	ssize_t ret;
 	ret = rpc_pton(net, string, len, sa, salen);
 	if (ret == 0) {
-		ret = nfs_dns_resolve_name(net, string, len, sa, salen);
+		ret = rpc_uaddr2sockaddr(net, string, len, sa, salen);
-		if (ret < 0)
+		if (ret == 0) {
-			ret = 0;
+			ret = nfs_dns_resolve_name(net, string, len, sa, salen);
+			if (ret < 0)
+				ret = 0;
+		}
+	} else if (port) {
+		rpc_set_port(sa, port);
 	}
 	return ret;
 }
 			nfs_parse_server_name(buf->data, buf->len,
 					      &ctx->nfs_server.address,
 					      sizeof(ctx->nfs_server._address),
-					      fc->net_ns);
+					      fc->net_ns, 0);
 		if (ctx->nfs_server.addrlen == 0)
 			continue;
 			continue;
 		salen = nfs_parse_server_name(buf->data, buf->len,
-						sap, addr_bufsize, net);
+						sap, addr_bufsize, net, 0);
 		if (salen == 0)
 			continue;
 		rpc_set_port(sap, NFS_PORT);

fs/nfs/nfs4proc.c+156−41

 static int nfs41_free_stateid(struct nfs_server *, const nfs4_stateid *,
 		const struct cred *, bool);
 #endif
-static void nfs4_bitmask_set(__u32 bitmask[NFS4_BITMASK_SZ],
-			     const __u32 *src, struct inode *inode,
-			     struct nfs_server *server,
-			     struct nfs4_label *label);
 #ifdef CONFIG_NFS_V4_SECURITY_LABEL
 static inline struct nfs4_label *
 	} else if ((fmode & FMODE_READ) && !opendata->file_created)
 		mask = NFS4_ACCESS_READ;
-	cache.cred = cred;
 	nfs_access_set_mask(&cache, opendata->o_res.access_result);
-	nfs_access_add_cache(state->inode, &cache);
+	nfs_access_add_cache(state->inode, &cache, cred);
 	flags = NFS4_ACCESS_READ | NFS4_ACCESS_EXECUTE | NFS4_ACCESS_LOOKUP;
 	if ((mask & ~cache.mask & flags) == 0)
 		if (!nfs4_have_delegation(inode, FMODE_READ)) {
 			nfs4_bitmask_set(calldata->arg.bitmask_store,
 					 server->cache_consistency_bitmask,
-					 inode, server, NULL);
+					 inode, 0);
 			calldata->arg.bitmask = calldata->arg.bitmask_store;
 		} else
 			calldata->arg.bitmask = NULL;
 		     FATTR4_WORD0_FH_EXPIRE_TYPE |
 		     FATTR4_WORD0_LINK_SUPPORT |
 		     FATTR4_WORD0_SYMLINK_SUPPORT |
-		     FATTR4_WORD0_ACLSUPPORT;
+		     FATTR4_WORD0_ACLSUPPORT |
+		     FATTR4_WORD0_CASE_INSENSITIVE |
+		     FATTR4_WORD0_CASE_PRESERVING;
 	if (minorversion)
 		bitmask[2] = FATTR4_WORD2_SUPPATTR_EXCLCREAT;
 			server->caps |= NFS_CAP_HARDLINKS;
 		if (res.has_symlinks != 0)
 			server->caps |= NFS_CAP_SYMLINKS;
+		if (res.case_insensitive)
+			server->caps |= NFS_CAP_CASE_INSENSITIVE;
+		if (res.case_preserving)
+			server->caps |= NFS_CAP_CASE_PRESERVING;
 #ifdef CONFIG_NFS_V4_SECURITY_LABEL
 		if (res.attr_bitmask[2] & FATTR4_WORD2_SECURITY_LABEL)
 			server->caps |= NFS_CAP_SECURITY_LABEL;
 #endif
+		if (res.attr_bitmask[0] & FATTR4_WORD0_FS_LOCATIONS)
+			server->caps |= NFS_CAP_FS_LOCATIONS;
 		if (!(res.attr_bitmask[0] & FATTR4_WORD0_FILEID))
 			server->fattr_valid &= ~NFS_ATTR_FATTR_FILEID;
 		if (!(res.attr_bitmask[1] & FATTR4_WORD1_MODE))
 	return err;
 }
+static void test_fs_location_for_trunking(struct nfs4_fs_location *location,
+					  struct nfs_client *clp,
+					  struct nfs_server *server)
+{
+	int i;
+	for (i = 0; i < location->nservers; i++) {
+		struct nfs4_string *srv_loc = &location->servers[i];
+		struct sockaddr addr;
+		size_t addrlen;
+		struct xprt_create xprt_args = {
+			.ident = 0,
+			.net = clp->cl_net,
+		};
+		struct nfs4_add_xprt_data xprtdata = {
+			.clp = clp,
+		};
+		struct rpc_add_xprt_test rpcdata = {
+			.add_xprt_test = clp->cl_mvops->session_trunk,
+			.data = &xprtdata,
+		};
+		char *servername = NULL;
+		if (!srv_loc->len)
+			continue;
+		addrlen = nfs_parse_server_name(srv_loc->data, srv_loc->len,
+						&addr, sizeof(addr),
+						clp->cl_net, server->port);
+		if (!addrlen)
+			return;
+		xprt_args.dstaddr = &addr;
+		xprt_args.addrlen = addrlen;
+		servername = kmalloc(srv_loc->len + 1, GFP_KERNEL);
+		if (!servername)
+			return;
+		memcpy(servername, srv_loc->data, srv_loc->len);
+		servername[srv_loc->len] = '\0';
+		xprt_args.servername = servername;
+		xprtdata.cred = nfs4_get_clid_cred(clp);
+		rpc_clnt_add_xprt(clp->cl_rpcclient, &xprt_args,
+				  rpc_clnt_setup_test_and_add_xprt,
+				  &rpcdata);
+		if (xprtdata.cred)
+			put_cred(xprtdata.cred);
+		kfree(servername);
+	}
+}
+static int _nfs4_discover_trunking(struct nfs_server *server,
+				   struct nfs_fh *fhandle)
+{
+	struct nfs4_fs_locations *locations = NULL;
+	struct page *page;
+	const struct cred *cred;
+	struct nfs_client *clp = server->nfs_client;
+	const struct nfs4_state_maintenance_ops *ops =
+		clp->cl_mvops->state_renewal_ops;
+	int status = -ENOMEM, i;
+	cred = ops->get_state_renewal_cred(clp);
+	if (cred == NULL) {
+		cred = nfs4_get_clid_cred(clp);
+		if (cred == NULL)
+			return -ENOKEY;
+	}
+	page = alloc_page(GFP_KERNEL);
+	locations = kmalloc(sizeof(struct nfs4_fs_locations), GFP_KERNEL);
+	if (page == NULL || locations == NULL)
+		goto out;
+	status = nfs4_proc_get_locations(server, fhandle, locations, page,
+					 cred);
+	if (status)
+		goto out;
+	for (i = 0; i < locations->nlocations; i++)
+		test_fs_location_for_trunking(&locations->locations[i], clp,
+					      server);
+out:
+	if (page)
+		__free_page(page);
+	kfree(locations);
+	return status;
+}
+static int nfs4_discover_trunking(struct nfs_server *server,
+				  struct nfs_fh *fhandle)
+{
+	struct nfs4_exception exception = {
+		.interruptible = true,
+	};
+	struct nfs_client *clp = server->nfs_client;
+	int err = 0;
+	if (!nfs4_has_session(clp))
+		goto out;
+	do {
+		err = nfs4_handle_exception(server,
+				_nfs4_discover_trunking(server, fhandle),
+				&exception);
+	} while (exception.retry);
+out:
+	return err;
+}
 static int _nfs4_lookup_root(struct nfs_server *server, struct nfs_fh *fhandle,
 		struct nfs_fsinfo *info)
 {
 	return err;
 }
-static int _nfs4_proc_access(struct inode *inode, struct nfs_access_entry *entry)
+static int _nfs4_proc_access(struct inode *inode, struct nfs_access_entry *entry,
+			     const struct cred *cred)
 {
 	struct nfs_server *server = NFS_SERVER(inode);
 	struct nfs4_accessargs args = {
 		.rpc_proc = &nfs4_procedures[NFSPROC4_CLNT_ACCESS],
 		.rpc_argp = &args,
 		.rpc_resp = &res,
-		.rpc_cred = entry->cred,
+		.rpc_cred = cred,
 	};
 	int status = 0;
 	return status;
 }
-static int nfs4_proc_access(struct inode *inode, struct nfs_access_entry *entry)
+static int nfs4_proc_access(struct inode *inode, struct nfs_access_entry *entry,
+			    const struct cred *cred)
 {
 	struct nfs4_exception exception = {
 		.interruptible = true,
 	};
 	int err;
 	do {
-		err = _nfs4_proc_access(inode, entry);
+		err = _nfs4_proc_access(inode, entry, cred);
 		trace_nfs4_access(inode, err);
 		err = nfs4_handle_exception(NFS_SERVER(inode), err,
 				&exception);
 	nfs_fattr_init(res->dir_attr);
-	if (inode)
+	if (inode) {
 		nfs4_inode_return_delegation(inode);
+		nfs_d_prune_case_insensitive_aliases(inode);
+	}
 }
 static void nfs4_proc_unlink_rpc_prepare(struct rpc_task *task, struct nfs_unlinkdata *data)
 		return 0;
 	if (task->tk_status == 0) {
+		nfs_d_prune_case_insensitive_aliases(d_inode(data->old_dentry));
 		if (new_dir != old_dir) {
 			/* Note: If we moved a directory, nlink will change */
 			nfs4_update_changeattr(old_dir, &res->old_cinfo,
 	return nfs4_have_delegation(hdr->inode, FMODE_READ) == 0;
 }
-static void nfs4_bitmask_set(__u32 bitmask[NFS4_BITMASK_SZ], const __u32 *src,
+void nfs4_bitmask_set(__u32 bitmask[], const __u32 src[],
-			     struct inode *inode, struct nfs_server *server,
+		      struct inode *inode, unsigned long cache_validity)
-			     struct nfs4_label *label)
 {
-	unsigned long cache_validity = READ_ONCE(NFS_I(inode)->cache_validity);
+	struct nfs_server *server = NFS_SERVER(inode);
 	unsigned int i;
 	memcpy(bitmask, src, sizeof(*bitmask) * NFS4_BITMASK_SZ);
+	cache_validity |= READ_ONCE(NFS_I(inode)->cache_validity);
 	if (cache_validity & NFS_INO_INVALID_CHANGE)
 		bitmask[0] |= FATTR4_WORD0_CHANGE;
 		bitmask[1] |= FATTR4_WORD1_OWNER | FATTR4_WORD1_OWNER_GROUP;
 	if (cache_validity & NFS_INO_INVALID_NLINK)
 		bitmask[1] |= FATTR4_WORD1_NUMLINKS;
-	if (label && label->len && cache_validity & NFS_INO_INVALID_LABEL)
-		bitmask[2] |= FATTR4_WORD2_SECURITY_LABEL;
 	if (cache_validity & NFS_INO_INVALID_CTIME)
 		bitmask[1] |= FATTR4_WORD1_TIME_METADATA;
 	if (cache_validity & NFS_INO_INVALID_MTIME)
 	} else {
 		nfs4_bitmask_set(hdr->args.bitmask_store,
 				 server->cache_consistency_bitmask,
-				 hdr->inode, server, NULL);
+				 hdr->inode, NFS_INO_INVALID_BLOCKS);
 		hdr->args.bitmask = hdr->args.bitmask_store;
 	}
 	data->args.fhandle = &data->fh;
 	data->args.stateid = &data->stateid;
 	nfs4_bitmask_set(data->args.bitmask_store,
-			 server->cache_consistency_bitmask, inode, server,
+			 server->cache_consistency_bitmask, inode, 0);
-			 NULL);
 	data->args.bitmask = data->args.bitmask_store;
 	nfs_copy_fh(&data->fh, NFS_FH(inode));
 	nfs4_stateid_copy(&data->stateid, stateid);
 				    const char *key, const void *buf,
 				    size_t buflen, int flags)
 {
-	struct nfs_access_entry cache;
+	u32 mask;
 	int ret;
 	if (!nfs_server_capable(inode, NFS_CAP_XATTR))
 	 * do a cached access check for the XA* flags to possibly avoid
 	 * doing an RPC and getting EACCES back.
 	 */
-	if (!nfs_access_get_cached(inode, current_cred(), &cache, true)) {
+	if (!nfs_access_get_cached(inode, current_cred(), &mask, true)) {
-		if (!(cache.mask & NFS_ACCESS_XAWRITE))
+		if (!(mask & NFS_ACCESS_XAWRITE))
 			return -EACCES;
 	}
 				    struct dentry *unused, struct inode *inode,
 				    const char *key, void *buf, size_t buflen)
 {
-	struct nfs_access_entry cache;
+	u32 mask;
 	ssize_t ret;
 	if (!nfs_server_capable(inode, NFS_CAP_XATTR))
 		return -EOPNOTSUPP;
-	if (!nfs_access_get_cached(inode, current_cred(), &cache, true)) {
+	if (!nfs_access_get_cached(inode, current_cred(), &mask, true)) {
-		if (!(cache.mask & NFS_ACCESS_XAREAD))
+		if (!(mask & NFS_ACCESS_XAREAD))
 			return -EACCES;
 	}
 	ssize_t ret, size;
 	char *buf;
 	size_t buflen;
-	struct nfs_access_entry cache;
+	u32 mask;
 	if (!nfs_server_capable(inode, NFS_CAP_XATTR))
 		return 0;
-	if (!nfs_access_get_cached(inode, current_cred(), &cache, true)) {
+	if (!nfs_access_get_cached(inode, current_cred(), &mask, true)) {
-		if (!(cache.mask & NFS_ACCESS_XALIST))
+		if (!(mask & NFS_ACCESS_XALIST))
 			return 0;
 	}
  * appended to this compound to identify the client ID which is
  * performing recovery.
  */
-static int _nfs40_proc_get_locations(struct inode *inode,
+static int _nfs40_proc_get_locations(struct nfs_server *server,
+				     struct nfs_fh *fhandle,
 				     struct nfs4_fs_locations *locations,
 				     struct page *page, const struct cred *cred)
 {
-	struct nfs_server *server = NFS_SERVER(inode);
 	struct rpc_clnt *clnt = server->client;
 	u32 bitmask[2] = {
 		[0] = FATTR4_WORD0_FSID | FATTR4_WORD0_FS_LOCATIONS,
 	};
 	struct nfs4_fs_locations_arg args = {
 		.clientid	= server->nfs_client->cl_clientid,
-		.fh		= NFS_FH(inode),
+		.fh		= fhandle,
 		.page		= page,
 		.bitmask	= bitmask,
 		.migration	= 1,		/* skip LOOKUP */
  * When the client supports GETATTR(fs_locations_info), it can
  * be plumbed in here.
  */
-static int _nfs41_proc_get_locations(struct inode *inode,
+static int _nfs41_proc_get_locations(struct nfs_server *server,
+				     struct nfs_fh *fhandle,
 				     struct nfs4_fs_locations *locations,
 				     struct page *page, const struct cred *cred)
 {
-	struct nfs_server *server = NFS_SERVER(inode);
 	struct rpc_clnt *clnt = server->client;
 	u32 bitmask[2] = {
 		[0] = FATTR4_WORD0_FSID | FATTR4_WORD0_FS_LOCATIONS,
 	};
 	struct nfs4_fs_locations_arg args = {
-		.fh		= NFS_FH(inode),
+		.fh		= fhandle,
 		.page		= page,
 		.bitmask	= bitmask,
 		.migration	= 1,		/* skip LOOKUP */
  * -NFS4ERR_LEASE_MOVED is returned if the server still has leases
  * from this client that require migration recovery.
  */
-int nfs4_proc_get_locations(struct inode *inode,
+int nfs4_proc_get_locations(struct nfs_server *server,
+			    struct nfs_fh *fhandle,
 			    struct nfs4_fs_locations *locations,
 			    struct page *page, const struct cred *cred)
 {
-	struct nfs_server *server = NFS_SERVER(inode);
 	struct nfs_client *clp = server->nfs_client;
 	const struct nfs4_mig_recovery_ops *ops =
 					clp->cl_mvops->mig_recovery_ops;
 		(unsigned long long)server->fsid.major,
 		(unsigned long long)server->fsid.minor,
 		clp->cl_hostname);
-	nfs_display_fhandle(NFS_FH(inode), __func__);
+	nfs_display_fhandle(fhandle, __func__);
 	do {
-		status = ops->get_locations(inode, locations, page, cred);
+		status = ops->get_locations(server, fhandle, locations, page,
+					    cred);
 		if (status != -NFS4ERR_DELAY)
 			break;
 		nfs4_handle_exception(server, status, &exception);
 	.free_client	= nfs4_free_client,
 	.create_server	= nfs4_create_server,
 	.clone_server	= nfs_clone_server,
+	.discover_trunking = nfs4_discover_trunking,
 };
 static const struct xattr_handler nfs4_xattr_nfs4_acl_handler = {

fs/nfs/nfs4state.c+5−1

 	}
 	inode = d_inode(server->super->s_root);
-	result = nfs4_proc_get_locations(inode, locations, page, cred);
+	result = nfs4_proc_get_locations(server, NFS_FH(inode), locations,
+					 page, cred);
 	if (result) {
 		dprintk("<-- %s: failed to retrieve fs_locations: %d\n",
 			__func__, result);
 	}
 	result = -NFS4ERR_NXIO;
+	if (!locations->nlocations)
+		goto out;
 	if (!(locations->fattr.valid & NFS_ATTR_FATTR_V4_LOCATIONS)) {
 		dprintk("<-- %s: No fs_locations data, migration skipped\n",
 			__func__);

fs/nfs/nfs4xdr.c+44−5

@@ -3533,6 +3533,42 @@ static int decode_attr_aclsupport(struct xdr_stream xdr, uint32_t bitmap, uint · 3532 unmodified lines
3533	return 0;	3533	return 0;
3534	}	3534	}
3535		3535
		3536	static int decode_attr_case_insensitive(struct xdr_stream xdr, uint32_t bitmap, uint32_t *res)
		3537	{
		3538	__be32 *p;
		3539
		3540	*res = 0;
		3541	if (unlikely(bitmap[0] & (FATTR4_WORD0_CASE_INSENSITIVE - 1U)))
		3542	return -EIO;
		3543	if (likely(bitmap[0] & FATTR4_WORD0_CASE_INSENSITIVE)) {
		3544	p = xdr_inline_decode(xdr, 4);
		3545	if (unlikely(!p))
		3546	return -EIO;
		3547	*res = be32_to_cpup(p);
		3548	bitmap[0] &= ~FATTR4_WORD0_CASE_INSENSITIVE;
		3549	}
		3550	dprintk("%s: case_insensitive=%s\n", __func__, *res == 0 ? "false" : "true");
		3551	return 0;
		3552	}
		3553
		3554	static int decode_attr_case_preserving(struct xdr_stream xdr, uint32_t bitmap, uint32_t *res)
		3555	{
		3556	__be32 *p;
		3557
		3558	*res = 0;
		3559	if (unlikely(bitmap[0] & (FATTR4_WORD0_CASE_PRESERVING - 1U)))
		3560	return -EIO;
		3561	if (likely(bitmap[0] & FATTR4_WORD0_CASE_PRESERVING)) {
		3562	p = xdr_inline_decode(xdr, 4);
		3563	if (unlikely(!p))
		3564	return -EIO;
		3565	*res = be32_to_cpup(p);
		3566	bitmap[0] &= ~FATTR4_WORD0_CASE_PRESERVING;
		3567	}
		3568	dprintk("%s: case_preserving=%s\n", __func__, *res == 0 ? "false" : "true");
		3569	return 0;
		3570	}
		3571
3536	static int decode_attr_fileid(struct xdr_stream xdr, uint32_t bitmap, uint64_t *fileid)	3572	static int decode_attr_fileid(struct xdr_stream xdr, uint32_t bitmap, uint64_t *fileid)
3537	{	3573	{
3538	__be32 *p;	3574	__be32 *p;
@@ -3696,8 +3732,6 @@ static int decode_attr_fs_locations(struct xdr_stream xdr, uint32_t bitmap, st · 157 unmodified lines
3696	if (unlikely(!p))	3732	if (unlikely(!p))
3697	goto out_eio;	3733	goto out_eio;
3698	n = be32_to_cpup(p);	3734	n = be32_to_cpup(p);
3699	if (n <= 0)
3700	goto out_eio;
3701	for (res->nlocations = 0; res->nlocations < n; res->nlocations++) {	3735	for (res->nlocations = 0; res->nlocations < n; res->nlocations++) {
3702	u32 m;	3736	u32 m;
3703	struct nfs4_fs_location *loc;	3737	struct nfs4_fs_location *loc;
@@ -4200,10 +4234,11 @@ static int decode_attr_security_label(struct xdr_stream xdr, uint32_t bitmap, · 496 unmodified lines
4200	} else	4234	} else
4201	printk(KERN_WARNING "%s: label too long (%u)!\n",	4235	printk(KERN_WARNING "%s: label too long (%u)!\n",
4202	__func__, len);	4236	__func__, len);
		4237	if (label && label->label)
		4238	dprintk("%s: label=%.*s, len=%d, PI=%d, LFS=%d\n",
		4239	__func__, label->len, (char *)label->label,
		4240	label->len, label->pi, label->lfs);
4203	}	4241	}
4204	if (label && label->label)
4205	dprintk("%s: label=%s, len=%d, PI=%d, LFS=%d\n", __func__,
4206	(char *)label->label, label->len, label->pi, label->lfs);
4207	return status;	4242	return status;
4208	}	4243	}
4209		4244
@@ -4412,6 +4447,10 @@ static int decode_server_caps(struct xdr_stream *xdr, struct nfs4_server_caps_re · 202 unmodified lines
4412	goto xdr_error;	4447	goto xdr_error;
4413	if ((status = decode_attr_aclsupport(xdr, bitmap, &res->acl_bitmask)) != 0)	4448	if ((status = decode_attr_aclsupport(xdr, bitmap, &res->acl_bitmask)) != 0)
4414	goto xdr_error;	4449	goto xdr_error;
		4450	if ((status = decode_attr_case_insensitive(xdr, bitmap, &res->case_insensitive)) != 0)
		4451	goto xdr_error;
		4452	if ((status = decode_attr_case_preserving(xdr, bitmap, &res->case_preserving)) != 0)
		4453	goto xdr_error;
4415	if ((status = decode_attr_exclcreat_supported(xdr, bitmap,	4454	if ((status = decode_attr_exclcreat_supported(xdr, bitmap,
4416	res->exclcreat_bitmask)) != 0)	4455	res->exclcreat_bitmask)) != 0)
4417	goto xdr_error;	4456	goto xdr_error;

fs/nfs/sysfs.c+2−1

 	&nfs_netns_client_id.attr,
 	NULL,
 };
+ATTRIBUTE_GROUPS(nfs_netns_client);
 static struct kobj_type nfs_netns_client_type = {
 	.release = nfs_netns_client_release,
-	.default_attrs = nfs_netns_client_attrs,
+	.default_groups = nfs_netns_client_groups,
 	.sysfs_ops = &kobj_sysfs_ops,
 	.namespace = nfs_netns_client_namespace,
 };

fs/nfsd/nfsctl.c+3−2

 	clear_ncl(d_inode(dentry));
 	dget(dentry);
 	ret = simple_unlink(dir, dentry);
-	d_delete(dentry);
+	d_drop(dentry);
+	fsnotify_unlink(dir, dentry);
 	dput(dentry);
 	WARN_ON_ONCE(ret);
 }
 	dget(dentry);
 	ret = simple_rmdir(dir, dentry);
 	WARN_ON_ONCE(ret);
+	d_drop(dentry);
 	fsnotify_rmdir(dir, dentry);
-	d_delete(dentry);
 	dput(dentry);
 	inode_unlock(dir);
 }

fs/notify/fanotify/fanotify_user.c+0−3

 				 struct fanotify_event *event)
 {
 	size_t event_len = FAN_EVENT_METADATA_LEN;
-	struct fanotify_info *info;
 	int fh_len;
 	int dot_len = 0;
 	if (fanotify_is_error_event(event->mask))
 		event_len += FANOTIFY_ERROR_INFO_LEN;
-	info = fanotify_event_info(event);
 	if (fanotify_event_has_any_dir_fh(event)) {
 		event_len += fanotify_dir_name_info_len(event);
 	} else if ((info_mode & FAN_REPORT_NAME) &&

fs/ocfs2/stackglue.c+1−12

 	{ }
 };
-static struct ctl_table ocfs2_mod_table[] = {
-	{
-		.procname	= "nm",
-		.data		= NULL,
-		.maxlen		= 0,
-		.mode		= 0555,
-		.child		= ocfs2_nm_table
-	},
-	{ }
-};
 static struct ctl_table_header *ocfs2_table_header;
 /*
 {
 	strcpy(cluster_stack_name, OCFS2_STACK_PLUGIN_O2CB);
-	ocfs2_table_header = register_sysctl("fs/ocfs2", ocfs2_mod_table);
+	ocfs2_table_header = register_sysctl("fs/ocfs2/nm", ocfs2_nm_table);
 	if (!ocfs2_table_header) {
 		printk(KERN_ERR
 		       "ocfs2 stack glue: unable to register sysctl\n");

fs/ocfs2/suballoc.c+11−14

@@ -1251,26 +1251,23 @@ static int ocfs2_test_bg_bit_allocatable(struct buffer_head *bg_bh, · 1250 unmodified lines
1251	{	1251	{
1252	struct ocfs2_group_desc bg = (struct ocfs2_group_desc ) bg_bh->b_data;	1252	struct ocfs2_group_desc bg = (struct ocfs2_group_desc ) bg_bh->b_data;
1253	struct journal_head *jh;	1253	struct journal_head *jh;
1254	int ret = 1;	1254	int ret;
1255		1255
1256	if (ocfs2_test_bit(nr, (unsigned long *)bg->bg_bitmap))	1256	if (ocfs2_test_bit(nr, (unsigned long *)bg->bg_bitmap))
1257	return 0;	1257	return 0;
1258		1258
1259	if (!buffer_jbd(bg_bh))	1259	jh = jbd2_journal_grab_journal_head(bg_bh);
		1260	if (!jh)
1260	return 1;	1261	return 1;
1261		1262
1262	jbd_lock_bh_journal_head(bg_bh);	1263	spin_lock(&jh->b_state_lock);
1263	if (buffer_jbd(bg_bh)) {	1264	bg = (struct ocfs2_group_desc *) jh->b_committed_data;
1264	jh = bh2jh(bg_bh);	1265	if (bg)
1265	spin_lock(&jh->b_state_lock);	1266	ret = !ocfs2_test_bit(nr, (unsigned long *)bg->bg_bitmap);
1266	bg = (struct ocfs2_group_desc *) jh->b_committed_data;	1267	else
1267	if (bg)	1268	ret = 1;
1268	ret = !ocfs2_test_bit(nr, (unsigned long *)bg->bg_bitmap);	1269	spin_unlock(&jh->b_state_lock);
1269	else	1270	jbd2_journal_put_journal_head(jh);
1270	ret = 1;
1271	spin_unlock(&jh->b_state_lock);
1272	}
1273	jbd_unlock_bh_journal_head(bg_bh);
1274		1271
1275	return ret;	1272	return ret;
1276	}	1273	}

fs/udf/inode.c+4−5

 	char *kaddr;
 	struct udf_inode_info *iinfo = UDF_I(inode);
 	int err;
-	struct writeback_control udf_wbc = {
-		.sync_mode = WB_SYNC_NONE,
-		.nr_to_write = 1,
-	};
 	WARN_ON_ONCE(!inode_is_locked(inode));
 	if (!iinfo->i_lenAlloc) {
 		iinfo->i_alloc_type = ICBTAG_FLAG_AD_LONG;
 	/* from now on we have normal address_space methods */
 	inode->i_data.a_ops = &udf_aops;
+	set_page_dirty(page);
+	unlock_page(page);
 	up_write(&iinfo->i_data_sem);
-	err = inode->i_data.a_ops->writepage(page, &udf_wbc);
+	err = filemap_fdatawrite(inode->i_mapping);
 	if (err) {
 		/* Restore everything back so that we don't lose data... */
 		lock_page(page);
 		unlock_page(page);
 		iinfo->i_alloc_type = ICBTAG_FLAG_AD_IN_ICB;
 		inode->i_data.a_ops = &udf_adinicb_aops;
+		iinfo->i_lenAlloc = inode->i_size;
 		up_write(&iinfo->i_data_sem);
 	}
 	put_page(page);

include/linux/blkdev.h+1−0

@@ -1258,6 +1258,7 @@ unsigned long disk_start_io_acct(struct gendisk *disk, unsigned int sectors, · 1257 unmodified lines
1258	void disk_end_io_acct(struct gendisk *disk, unsigned int op,	1258	void disk_end_io_acct(struct gendisk *disk, unsigned int op,
1259	unsigned long start_time);	1259	unsigned long start_time);
1260		1260
		1261	void bio_start_io_acct_time(struct bio *bio, unsigned long start_time);
1261	unsigned long bio_start_io_acct(struct bio *bio);	1262	unsigned long bio_start_io_acct(struct bio *bio);
1262	void bio_end_io_acct_remapped(struct bio *bio, unsigned long start_time,	1263	void bio_end_io_acct_remapped(struct bio *bio, unsigned long start_time,
1263	struct block_device *orig_bdev);	1264	struct block_device *orig_bdev);

include/linux/ethtool.h+1−1

@@ -111,7 +111,7 @@ struct ethtool_link_ext_state_info { · 110 unmodified lines
111	enum ethtool_link_ext_substate_bad_signal_integrity bad_signal_integrity;	111	enum ethtool_link_ext_substate_bad_signal_integrity bad_signal_integrity;
112	enum ethtool_link_ext_substate_cable_issue cable_issue;	112	enum ethtool_link_ext_substate_cable_issue cable_issue;
113	enum ethtool_link_ext_substate_module module;	113	enum ethtool_link_ext_substate_module module;
114	u8 __link_ext_substate;	114	u32 __link_ext_substate;
115	};	115	};
116	};	116	};
117		117

include/linux/fsnotify.h+43−6

@@ -224,6 +224,43 @@ static inline void fsnotify_link(struct inode dir, struct inode inode, · 223 unmodified lines
224	dir, &new_dentry->d_name, 0);	224	dir, &new_dentry->d_name, 0);
225	}	225	}
226		226
		227	/*
		228	* fsnotify_delete - @dentry was unlinked and unhashed
		229	*
		230	* Caller must make sure that dentry->d_name is stable.
		231	*
		232	* Note: unlike fsnotify_unlink(), we have to pass also the unlinked inode
		233	* as this may be called after d_delete() and old_dentry may be negative.
		234	*/
		235	static inline void fsnotify_delete(struct inode dir, struct inode inode,
		236	struct dentry *dentry)
		237	{
		238	__u32 mask = FS_DELETE;
		239
		240	if (S_ISDIR(inode->i_mode))
		241	mask \|= FS_ISDIR;
		242
		243	fsnotify_name(mask, inode, FSNOTIFY_EVENT_INODE, dir, &dentry->d_name,
		244	0);
		245	}
		246
		247	/**
		248	* d_delete_notify - delete a dentry and call fsnotify_delete()
		249	* @dentry: The dentry to delete
		250	*
		251	* This helper is used to guaranty that the unlinked inode cannot be found
		252	* by lookup of this name after fsnotify_delete() event has been delivered.
		253	*/
		254	static inline void d_delete_notify(struct inode dir, struct dentry dentry)
		255	{
		256	struct inode *inode = d_inode(dentry);
		257
		258	ihold(inode);
		259	d_delete(dentry);
		260	fsnotify_delete(dir, inode, dentry);
		261	iput(inode);
		262	}
		263
227	/*	264	/*
228	* fsnotify_unlink - 'name' was unlinked	265	* fsnotify_unlink - 'name' was unlinked
229	*	266	*
@@ -231,10 +268,10 @@ static inline void fsnotify_link(struct inode dir, struct inode inode, · 1 unmodified line
231	*/	268	*/
232	static inline void fsnotify_unlink(struct inode dir, struct dentry dentry)	269	static inline void fsnotify_unlink(struct inode dir, struct dentry dentry)
233	{	270	{
234	/* Expected to be called before d_delete() */	271	if (WARN_ON_ONCE(d_is_negative(dentry)))
235	WARN_ON_ONCE(d_is_negative(dentry));	272	return;
236		273
237	fsnotify_dirent(dir, dentry, FS_DELETE);	274	fsnotify_delete(dir, d_inode(dentry), dentry);
238	}	275	}
239		276
240	/*	277	/*
@@ -258,10 +295,10 @@ static inline void fsnotify_mkdir(struct inode dir, struct dentry dentry) · 17 unmodified lines
258	*/	295	*/
259	static inline void fsnotify_rmdir(struct inode dir, struct dentry dentry)	296	static inline void fsnotify_rmdir(struct inode dir, struct dentry dentry)
260	{	297	{
261	/* Expected to be called before d_delete() */	298	if (WARN_ON_ONCE(d_is_negative(dentry)))
262	WARN_ON_ONCE(d_is_negative(dentry));	299	return;
263		300
264	fsnotify_dirent(dir, dentry, FS_DELETE \| FS_ISDIR);	301	fsnotify_delete(dir, d_inode(dentry), dentry);
265	}	302	}
266		303
267	/*	304	/*

include/linux/lsm_hook_defs.h+1−1

@@ -80,7 +80,7 @@ LSM_HOOK(int, 0, sb_clone_mnt_opts, const struct super_block *oldsb, · 79 unmodified lines
80	unsigned long *set_kern_flags)	80	unsigned long *set_kern_flags)
81	LSM_HOOK(int, 0, move_mount, const struct path *from_path,	81	LSM_HOOK(int, 0, move_mount, const struct path *from_path,
82	const struct path *to_path)	82	const struct path *to_path)
83	LSM_HOOK(int, 0, dentry_init_security, struct dentry *dentry,	83	LSM_HOOK(int, -EOPNOTSUPP, dentry_init_security, struct dentry *dentry,
84	int mode, const struct qstr name, const char *xattr_name,	84	int mode, const struct qstr name, const char *xattr_name,
85	void *ctx, u32 ctxlen)	85	void *ctx, u32 ctxlen)
86	LSM_HOOK(int, 0, dentry_create_files_as, struct dentry *dentry, int mode,	86	LSM_HOOK(int, 0, dentry_create_files_as, struct dentry *dentry, int mode,

include/linux/mm.h+12−5

@@ -1506,11 +1506,18 @@ static inline u8 page_kasan_tag(const struct page *page) · 1505 unmodified lines
1506		1506
1507	static inline void page_kasan_tag_set(struct page *page, u8 tag)	1507	static inline void page_kasan_tag_set(struct page *page, u8 tag)
1508	{	1508	{
1509	if (kasan_enabled()) {	1509	unsigned long old_flags, flags;
1510	tag ^= 0xff;	1510
1511	page->flags &= ~(KASAN_TAG_MASK << KASAN_TAG_PGSHIFT);	1511	if (!kasan_enabled())
1512	page->flags \|= (tag & KASAN_TAG_MASK) << KASAN_TAG_PGSHIFT;	1512	return;
1513	}	1513
		1514	tag ^= 0xff;
		1515	old_flags = READ_ONCE(page->flags);
		1516	do {
		1517	flags = old_flags;
		1518	flags &= ~(KASAN_TAG_MASK << KASAN_TAG_PGSHIFT);
		1519	flags \|= (tag & KASAN_TAG_MASK) << KASAN_TAG_PGSHIFT;
		1520	} while (unlikely(!try_cmpxchg(&page->flags, &old_flags, flags)));
1514	}	1521	}
1515		1522
1516	static inline void page_kasan_tag_reset(struct page *page)	1523	static inline void page_kasan_tag_reset(struct page *page)

include/linux/mm_types.h+1−0

@@ -261,6 +261,7 @@ static_assert(sizeof(struct page) == sizeof(struct folio)); · 260 unmodified lines
261	static_assert(offsetof(struct page, pg) == offsetof(struct folio, fl))	261	static_assert(offsetof(struct page, pg) == offsetof(struct folio, fl))
262	FOLIO_MATCH(flags, flags);	262	FOLIO_MATCH(flags, flags);
263	FOLIO_MATCH(lru, lru);	263	FOLIO_MATCH(lru, lru);
		264	FOLIO_MATCH(mapping, mapping);
264	FOLIO_MATCH(compound_head, lru);	265	FOLIO_MATCH(compound_head, lru);
265	FOLIO_MATCH(index, index);	266	FOLIO_MATCH(index, index);
266	FOLIO_MATCH(private, private);	267	FOLIO_MATCH(private, private);

include/linux/netdevice.h+1−0

@@ -2548,6 +2548,7 @@ struct packet_type { · 2547 unmodified lines
2548	struct net_device *);	2548	struct net_device *);
2549	bool (id_match)(struct packet_type ptype,	2549	bool (id_match)(struct packet_type ptype,
2550	struct sock *sk);	2550	struct sock *sk);
		2551	struct net *af_packet_net;
2551	void *af_packet_priv;	2552	void *af_packet_priv;
2552	struct list_head list;	2553	struct list_head list;
2553	};	2554	};

include/linux/nfs_fs.h+6−4

 struct nfs_access_entry {
 	struct rb_node		rb_node;
 	struct list_head	lru;
-	const struct cred *	cred;
+	kuid_t			fsuid;
+	kgid_t			fsgid;
+	struct group_info	*group_info;
 	__u32			mask;
 	struct rcu_head		rcu_head;
 };
 extern int nfs_post_op_update_inode_force_wcc_locked(struct inode *inode, struct nfs_fattr *fattr);
 extern int nfs_getattr(struct user_namespace *, const struct path *,
 		       struct kstat *, u32, unsigned int);
-extern void nfs_access_add_cache(struct inode *, struct nfs_access_entry *);
+extern void nfs_access_add_cache(struct inode *, struct nfs_access_entry *, const struct cred *);
 extern void nfs_access_set_mask(struct nfs_access_entry *, u32);
 extern int nfs_permission(struct user_namespace *, struct inode *, int);
 extern int nfs_open(struct inode *, struct file *);
 			struct nfs_fattr *fattr);
 extern int nfs_may_open(struct inode *inode, const struct cred *cred, int openflags);
 extern void nfs_access_zap_cache(struct inode *inode);
-extern int nfs_access_get_cached(struct inode *inode, const struct cred *cred, struct nfs_access_entry *res,
+extern int nfs_access_get_cached(struct inode *inode, const struct cred *cred,
-				 bool may_block);
+				 u32 *mask, bool may_block);
 /*
  * linux/fs/nfs/symlink.c

include/linux/nfs_fs_sb.h+3−1

include/linux/nfs_xdr.h+4−1

 	u32				has_links;
 	u32				has_symlinks;
 	u32				fh_expire_type;
+	u32				case_insensitive;
+	u32				case_preserving;
 };
 #define NFS4_PATHNAME_MAXCOMPONENTS 512
 			    struct nfs_fh *, struct nfs_fattr *);
 	int	(*lookupp) (struct inode *, struct nfs_fh *,
 			    struct nfs_fattr *);
-	int	(*access)  (struct inode *, struct nfs_access_entry *);
+	int	(*access)  (struct inode *, struct nfs_access_entry *, const struct cred *);
 	int	(*readlink)(struct inode *, struct page *, unsigned int,
 			    unsigned int);
 	int	(*create)  (struct inode *, struct dentry *,
 	struct nfs_server *(*create_server)(struct fs_context *);
 	struct nfs_server *(*clone_server)(struct nfs_server *, struct nfs_fh *,
 					   struct nfs_fattr *, rpc_authflavor_t);
+	int	(*discover_trunking)(struct nfs_server *, struct nfs_fh *);
 };
 /*

include/linux/perf_event.h+3−12

 	u64				total_time_running;
 	u64				tstamp;
-	/*
-	 * timestamp shadows the actual context timing but it can
-	 * be safely used in NMI interrupt context. It reflects the
-	 * context time as it was when the event was last scheduled in,
-	 * or when ctx_sched_in failed to schedule the event because we
-	 * run out of PMC.
-	 *
-	 * ctx_time already accounts for ctx->timestamp. Therefore to
-	 * compute ctx_time for a sample, simply add perf_clock().
-	 */
-	u64				shadow_ctx_time;
 	struct perf_event_attr		attr;
 	u16				header_size;
 	u16				id_header_size;
 	 */
 	u64				time;
 	u64				timestamp;
+	u64				timeoffset;
 	/*
 	 * These fields let us detect when two contexts have both
 struct perf_cgroup_info {
 	u64				time;
 	u64				timestamp;
+	u64				timeoffset;
+	int				active;
 };
 struct perf_cgroup {

include/linux/pid_namespace.h+5−0

@@ -86,4 +86,9 @@ extern struct pid_namespace task_active_pid_ns(struct task_struct tsk); · 85 unmodified lines
86	void pidhash_init(void);	86	void pidhash_init(void);
87	void pid_idr_init(void);	87	void pid_idr_init(void);
88		88
		89	static inline bool task_is_in_init_pid_ns(struct task_struct *tsk)
		90	{
		91	return task_active_pid_ns(tsk) == &init_pid_ns;
		92	}
		93
89	#endif /* _LINUX_PID_NS_H */	94	#endif /* _LINUX_PID_NS_H */

include/linux/psi.h+6−7

 void psi_memstall_leave(unsigned long *flags);
 int psi_show(struct seq_file *s, struct psi_group *group, enum psi_res res);
-#ifdef CONFIG_CGROUPS
-int psi_cgroup_alloc(struct cgroup *cgrp);
-void psi_cgroup_free(struct cgroup *cgrp);
-void cgroup_move_task(struct task_struct *p, struct css_set *to);
 struct psi_trigger *psi_trigger_create(struct psi_group *group,
 			char *buf, size_t nbytes, enum psi_res res);
-void psi_trigger_replace(void **trigger_ptr, struct psi_trigger *t);
+void psi_trigger_destroy(struct psi_trigger *t);
 __poll_t psi_trigger_poll(void **trigger_ptr, struct file *file,
 			poll_table *wait);
+#ifdef CONFIG_CGROUPS
+int psi_cgroup_alloc(struct cgroup *cgrp);
+void psi_cgroup_free(struct cgroup *cgrp);
+void cgroup_move_task(struct task_struct *p, struct css_set *to);
 #endif
 #else /* CONFIG_PSI */

include/linux/psi_types.h+0−3

@@ -141,9 +141,6 @@ struct psi_trigger { · 140 unmodified lines
141	* events to one per window	141	* events to one per window
142	*/	142	*/
143	u64 last_event_time;	143	u64 last_event_time;
144
145	/* Refcounting to prevent premature destruction */
146	struct kref refcount;
147	};	144	};
148		145
149	struct psi_group {	146	struct psi_group {

include/linux/quota.h+1−1

@@ -91,7 +91,7 @@ extern bool qid_valid(struct kqid qid); · 90 unmodified lines
91	*	91	*
92	* When there is no mapping defined for the user-namespace, type,	92	* When there is no mapping defined for the user-namespace, type,
93	* qid tuple an invalid kqid is returned. Callers are expected to	93	* qid tuple an invalid kqid is returned. Callers are expected to
94	* test for and handle handle invalid kqids being returned.	94	* test for and handle invalid kqids being returned.
95	* Invalid kqids may be tested for using qid_valid().	95	* Invalid kqids may be tested for using qid_valid().
96	*/	96	*/
97	static inline struct kqid make_kqid(struct user_namespace *from,	97	static inline struct kqid make_kqid(struct user_namespace *from,

include/linux/sched.h+0−4

 	 * task has to wait for a replenishment to be performed at the
 	 * next firing of dl_timer.
 	 *
-	 * @dl_boosted tells if we are boosted due to DI. If so we are
-	 * outside bandwidth enforcement mechanism (but only until we
-	 * exit the critical section);
-	 *
 	 * @dl_yielded tells if task gave up the CPU before consuming
 	 * all its available runtime during the last job.
 	 *

include/linux/skbuff.h+1−1

@@ -318,7 +318,7 @@ enum skb_drop_reason { · 317 unmodified lines
318	SKB_DROP_REASON_NO_SOCKET,	318	SKB_DROP_REASON_NO_SOCKET,
319	SKB_DROP_REASON_PKT_TOO_SMALL,	319	SKB_DROP_REASON_PKT_TOO_SMALL,
320	SKB_DROP_REASON_TCP_CSUM,	320	SKB_DROP_REASON_TCP_CSUM,
321	SKB_DROP_REASON_TCP_FILTER,	321	SKB_DROP_REASON_SOCKET_FILTER,
322	SKB_DROP_REASON_UDP_CSUM,	322	SKB_DROP_REASON_UDP_CSUM,
323	SKB_DROP_REASON_MAX,	323	SKB_DROP_REASON_MAX,
324	};	324	};

include/linux/suspend.h+1−10

 #ifdef CONFIG_HIBERNATION
 /* kernel/power/snapshot.c */
-extern void __register_nosave_region(unsigned long b, unsigned long e, int km);
+extern void register_nosave_region(unsigned long b, unsigned long e);
-static inline void __init register_nosave_region(unsigned long b, unsigned long e)
-{
-	__register_nosave_region(b, e, 0);
-}
-static inline void __init register_nosave_region_late(unsigned long b, unsigned long e)
-{
-	__register_nosave_region(b, e, 1);
-}
 extern int swsusp_page_is_forbidden(struct page *);
 extern void swsusp_set_page_free(struct page *);
 extern void swsusp_unset_page_free(struct page *);
 int hibernate_quiet_exec(int (*func)(void *data), void *data);
 #else /* CONFIG_HIBERNATION */
 static inline void register_nosave_region(unsigned long b, unsigned long e) {}
-static inline void register_nosave_region_late(unsigned long b, unsigned long e) {}
 static inline int swsusp_page_is_forbidden(struct page *p) { return 0; }
 static inline void swsusp_set_page_free(struct page *p) {}
 static inline void swsusp_unset_page_free(struct page *p) {}

include/linux/sysctl.h+1−1

@@ -265,7 +265,7 @@ static inline struct ctl_table_header register_sysctl_table(struct ctl_table · 264 unmodified lines
265	return NULL;	265	return NULL;
266	}	266	}
267		267
268	static inline struct sysctl_header register_sysctl_mount_point(const char path)	268	static inline struct ctl_table_header register_sysctl_mount_point(const char path)
269	{	269	{
270	return NULL;	270	return NULL;
271	}	271	}

include/linux/usb/role.h+6−0

 static inline void usb_role_switch_put(struct usb_role_switch *sw) { }
+static inline struct usb_role_switch *
+usb_role_switch_find_by_fwnode(const struct fwnode_handle *fwnode)
+{
+	return NULL;
+}
 static inline struct usb_role_switch *
 usb_role_switch_register(struct device *parent,
 			 const struct usb_role_switch_desc *desc)

include/net/addrconf.h+2−0

@@ -6,6 +6,8 @@ · 5 unmodified lines
6	#define RTR_SOLICITATION_INTERVAL (4*HZ)	6	#define RTR_SOLICITATION_INTERVAL (4*HZ)
7	#define RTR_SOLICITATION_MAX_INTERVAL (3600HZ) / 1 hour */	7	#define RTR_SOLICITATION_MAX_INTERVAL (3600HZ) / 1 hour */
8		8
		9	#define MIN_VALID_LIFETIME (23600) / 2 hours */
		10
9	#define TEMP_VALID_LIFETIME (7*86400)	11	#define TEMP_VALID_LIFETIME (7*86400)
10	#define TEMP_PREFERRED_LIFETIME (86400)	12	#define TEMP_PREFERRED_LIFETIME (86400)
11	#define REGEN_MAX_RETRY (3)	13	#define REGEN_MAX_RETRY (3)

include/net/bonding.h+1−1

@@ -346,7 +346,7 @@ static inline bool bond_uses_primary(struct bonding *bond) · 345 unmodified lines
346		346
347	static inline struct net_device bond_option_active_slave_get_rcu(struct bonding bond)	347	static inline struct net_device bond_option_active_slave_get_rcu(struct bonding bond)
348	{	348	{
349	struct slave *slave = rcu_dereference(bond->curr_active_slave);	349	struct slave *slave = rcu_dereference_rtnl(bond->curr_active_slave);
350		350
351	return bond_uses_primary(bond) && slave ? slave->dev : NULL;	351	return bond_uses_primary(bond) && slave ? slave->dev : NULL;
352	}	352	}

include/net/ip.h+10−11

 {
 	struct iphdr *iph = ip_hdr(skb);
+	/* We had many attacks based on IPID, use the private
+	 * generator as much as we can.
+	 */
+	if (sk && inet_sk(sk)->inet_daddr) {
+		iph->id = htons(inet_sk(sk)->inet_id);
+		inet_sk(sk)->inet_id += segs;
+		return;
+	}
 	if ((iph->frag_off & htons(IP_DF)) && !skb->ignore_df) {
-		/* This is only to work around buggy Windows95/2000
+		iph->id = 0;
-		 * VJ compression implementations.  If the ID field
-		 * does not change, they drop every other packet in
-		 * a TCP stream using header compression.
-		 */
-		if (sk && inet_sk(sk)->inet_daddr) {
-			iph->id = htons(inet_sk(sk)->inet_id);
-			inet_sk(sk)->inet_id += segs;
-		} else {
-			iph->id = 0;
-		}
 	} else {
+		/* Unfortunately we need the big hammer to get a suitable IPID */
 		__ip_select_ident(net, iph, segs);
 	}
 }

include/net/ip6_fib.h+1−1

@@ -282,7 +282,7 @@ static inline bool fib6_get_cookie_safe(const struct fib6_info *f6i, · 281 unmodified lines
282	fn = rcu_dereference(f6i->fib6_node);	282	fn = rcu_dereference(f6i->fib6_node);
283		283
284	if (fn) {	284	if (fn) {
285	*cookie = fn->fn_sernum;	285	*cookie = READ_ONCE(fn->fn_sernum);
286	/* pairs with smp_wmb() in __fib6_update_sernum_upto_root() */	286	/* pairs with smp_wmb() in __fib6_update_sernum_upto_root() */
287	smp_rmb();	287	smp_rmb();
288	status = true;	288	status = true;

include/net/route.h+1−1

@@ -370,7 +370,7 @@ static inline struct neighbour ip_neigh_gw4(struct net_device dev, · 369 unmodified lines
370	{	370	{
371	struct neighbour *neigh;	371	struct neighbour *neigh;
372		372
373	neigh = __ipv4_neigh_lookup_noref(dev, daddr);	373	neigh = __ipv4_neigh_lookup_noref(dev, (__force u32)daddr);
374	if (unlikely(!neigh))	374	if (unlikely(!neigh))
375	neigh = __neigh_create(&arp_tbl, &daddr, dev, false);	375	neigh = __neigh_create(&arp_tbl, &daddr, dev, false);
376		376

include/net/tcp.h+4−0

 bool tcp_add_backlog(struct sock *sk, struct sk_buff *skb);
+#ifdef CONFIG_INET
 void __sk_defer_free_flush(struct sock *sk);
 static inline void sk_defer_free_flush(struct sock *sk)
 		return;
 	__sk_defer_free_flush(sk);
 }
+#else
+static inline void sk_defer_free_flush(struct sock *sk) {}
+#endif
 int tcp_filter(struct sock *sk, struct sk_buff *skb);
 void tcp_set_state(struct sock *sk, int state);

include/trace/events/skb.h+1−1

@@ -14,7 +14,7 @@ · 13 unmodified lines
14	EM(SKB_DROP_REASON_NO_SOCKET, NO_SOCKET) \	14	EM(SKB_DROP_REASON_NO_SOCKET, NO_SOCKET) \
15	EM(SKB_DROP_REASON_PKT_TOO_SMALL, PKT_TOO_SMALL) \	15	EM(SKB_DROP_REASON_PKT_TOO_SMALL, PKT_TOO_SMALL) \
16	EM(SKB_DROP_REASON_TCP_CSUM, TCP_CSUM) \	16	EM(SKB_DROP_REASON_TCP_CSUM, TCP_CSUM) \
17	EM(SKB_DROP_REASON_TCP_FILTER, TCP_FILTER) \	17	EM(SKB_DROP_REASON_SOCKET_FILTER, SOCKET_FILTER) \
18	EM(SKB_DROP_REASON_UDP_CSUM, UDP_CSUM) \	18	EM(SKB_DROP_REASON_UDP_CSUM, UDP_CSUM) \
19	EMe(SKB_DROP_REASON_MAX, MAX)	19	EMe(SKB_DROP_REASON_MAX, MAX)
20		20

include/trace/events/sunrpc.h+45−25

@@ -794,6 +794,9 @@ RPC_SHOW_SOCKET · 793 unmodified lines
794		794
795	RPC_SHOW_SOCK	795	RPC_SHOW_SOCK
796		796
		797
		798	#include <trace/events/net_probe_common.h>
		799
797	/*	800	/*
798	* Now redefine the EM() and EMe() macros to map the enums to the strings	801	* Now redefine the EM() and EMe() macros to map the enums to the strings
799	* that will be printed in the output.	802	* that will be printed in the output.
@@ -816,27 +819,32 @@ DECLARE_EVENT_CLASS(xs_socket_event, · 16 unmodified lines
816	__field(unsigned int, socket_state)	819	__field(unsigned int, socket_state)
817	__field(unsigned int, sock_state)	820	__field(unsigned int, sock_state)
818	__field(unsigned long long, ino)	821	__field(unsigned long long, ino)
819	__string(dstaddr,	822	__array(__u8, saddr, sizeof(struct sockaddr_in6))
820	xprt->address_strings[RPC_DISPLAY_ADDR])	823	__array(__u8, daddr, sizeof(struct sockaddr_in6))
821	__string(dstport,
822	xprt->address_strings[RPC_DISPLAY_PORT])
823	),	824	),
824		825
825	TP_fast_assign(	826	TP_fast_assign(
826	struct inode *inode = SOCK_INODE(socket);	827	struct inode *inode = SOCK_INODE(socket);
		828	const struct sock *sk = socket->sk;
		829	const struct inet_sock *inet = inet_sk(sk);
		830
		831	memset(__entry->saddr, 0, sizeof(struct sockaddr_in6));
		832	memset(__entry->daddr, 0, sizeof(struct sockaddr_in6));
		833
		834	TP_STORE_ADDR_PORTS(__entry, inet, sk);
		835
827	__entry->socket_state = socket->state;	836	__entry->socket_state = socket->state;
828	__entry->sock_state = socket->sk->sk_state;	837	__entry->sock_state = socket->sk->sk_state;
829	__entry->ino = (unsigned long long)inode->i_ino;	838	__entry->ino = (unsigned long long)inode->i_ino;
830	__assign_str(dstaddr,	839
831	xprt->address_strings[RPC_DISPLAY_ADDR]);
832	__assign_str(dstport,
833	xprt->address_strings[RPC_DISPLAY_PORT]);
834	),	840	),
835		841
836	TP_printk(	842	TP_printk(
837	"socket:[%llu] dstaddr=%s/%s "	843	"socket:[%llu] srcaddr=%pISpc dstaddr=%pISpc "
838	"state=%u (%s) sk_state=%u (%s)",	844	"state=%u (%s) sk_state=%u (%s)",
839	__entry->ino, __get_str(dstaddr), __get_str(dstport),	845	__entry->ino,
		846	__entry->saddr,
		847	__entry->daddr,
840	__entry->socket_state,	848	__entry->socket_state,
841	rpc_show_socket_state(__entry->socket_state),	849	rpc_show_socket_state(__entry->socket_state),
842	__entry->sock_state,	850	__entry->sock_state,
@@ -866,29 +874,33 @@ DECLARE_EVENT_CLASS(xs_socket_event_done, · 23 unmodified lines
866	__field(unsigned int, socket_state)	874	__field(unsigned int, socket_state)
867	__field(unsigned int, sock_state)	875	__field(unsigned int, sock_state)
868	__field(unsigned long long, ino)	876	__field(unsigned long long, ino)
869	__string(dstaddr,	877	__array(__u8, saddr, sizeof(struct sockaddr_in6))
870	xprt->address_strings[RPC_DISPLAY_ADDR])	878	__array(__u8, daddr, sizeof(struct sockaddr_in6))
871	__string(dstport,
872	xprt->address_strings[RPC_DISPLAY_PORT])
873	),	879	),
874		880
875	TP_fast_assign(	881	TP_fast_assign(
876	struct inode *inode = SOCK_INODE(socket);	882	struct inode *inode = SOCK_INODE(socket);
		883	const struct sock *sk = socket->sk;
		884	const struct inet_sock *inet = inet_sk(sk);
		885
		886	memset(__entry->saddr, 0, sizeof(struct sockaddr_in6));
		887	memset(__entry->daddr, 0, sizeof(struct sockaddr_in6));
		888
		889	TP_STORE_ADDR_PORTS(__entry, inet, sk);
		890
877	__entry->socket_state = socket->state;	891	__entry->socket_state = socket->state;
878	__entry->sock_state = socket->sk->sk_state;	892	__entry->sock_state = socket->sk->sk_state;
879	__entry->ino = (unsigned long long)inode->i_ino;	893	__entry->ino = (unsigned long long)inode->i_ino;
880	__entry->error = error;	894	__entry->error = error;
881	__assign_str(dstaddr,
882	xprt->address_strings[RPC_DISPLAY_ADDR]);
883	__assign_str(dstport,
884	xprt->address_strings[RPC_DISPLAY_PORT]);
885	),	895	),
886		896
887	TP_printk(	897	TP_printk(
888	"error=%d socket:[%llu] dstaddr=%s/%s "	898	"error=%d socket:[%llu] srcaddr=%pISpc dstaddr=%pISpc "
889	"state=%u (%s) sk_state=%u (%s)",	899	"state=%u (%s) sk_state=%u (%s)",
890	__entry->error,	900	__entry->error,
891	__entry->ino, __get_str(dstaddr), __get_str(dstport),	901	__entry->ino,
		902	__entry->saddr,
		903	__entry->daddr,
892	__entry->socket_state,	904	__entry->socket_state,
893	rpc_show_socket_state(__entry->socket_state),	905	rpc_show_socket_state(__entry->socket_state),
894	__entry->sock_state,	906	__entry->sock_state,
@@ -953,7 +965,8 @@ TRACE_EVENT(rpc_socket_nospace, · 58 unmodified lines
953	{ BIT(XPRT_REMOVE), "REMOVE" }, \	965	{ BIT(XPRT_REMOVE), "REMOVE" }, \
954	{ BIT(XPRT_CONGESTED), "CONGESTED" }, \	966	{ BIT(XPRT_CONGESTED), "CONGESTED" }, \
955	{ BIT(XPRT_CWND_WAIT), "CWND_WAIT" }, \	967	{ BIT(XPRT_CWND_WAIT), "CWND_WAIT" }, \
956	{ BIT(XPRT_WRITE_SPACE), "WRITE_SPACE" })	968	{ BIT(XPRT_WRITE_SPACE), "WRITE_SPACE" }, \
		969	{ BIT(XPRT_SND_IS_COOKIE), "SND_IS_COOKIE" })
957		970
958	DECLARE_EVENT_CLASS(rpc_xprt_lifetime_class,	971	DECLARE_EVENT_CLASS(rpc_xprt_lifetime_class,
959	TP_PROTO(	972	TP_PROTO(
@@ -1150,8 +1163,11 @@ DECLARE_EVENT_CLASS(xprt_writelock_event, · 190 unmodified lines
1150	__entry->task_id = -1;	1163	__entry->task_id = -1;
1151	__entry->client_id = -1;	1164	__entry->client_id = -1;
1152	}	1165	}
1153	__entry->snd_task_id = xprt->snd_task ?	1166	if (xprt->snd_task &&
1154	xprt->snd_task->tk_pid : -1;	1167	!test_bit(XPRT_SND_IS_COOKIE, &xprt->state))
		1168	__entry->snd_task_id = xprt->snd_task->tk_pid;
		1169	else
		1170	__entry->snd_task_id = -1;
1155	),	1171	),
1156		1172
1157	TP_printk(SUNRPC_TRACE_TASK_SPECIFIER	1173	TP_printk(SUNRPC_TRACE_TASK_SPECIFIER
@@ -1196,8 +1212,12 @@ DECLARE_EVENT_CLASS(xprt_cong_event, · 38 unmodified lines
1196	__entry->task_id = -1;	1212	__entry->task_id = -1;
1197	__entry->client_id = -1;	1213	__entry->client_id = -1;
1198	}	1214	}
1199	__entry->snd_task_id = xprt->snd_task ?	1215	if (xprt->snd_task &&
1200	xprt->snd_task->tk_pid : -1;	1216	!test_bit(XPRT_SND_IS_COOKIE, &xprt->state))
		1217	__entry->snd_task_id = xprt->snd_task->tk_pid;
		1218	else
		1219	__entry->snd_task_id = -1;
		1220
1201	__entry->cong = xprt->cong;	1221	__entry->cong = xprt->cong;
1202	__entry->cwnd = xprt->cwnd;	1222	__entry->cwnd = xprt->cwnd;
1203	__entry->wait = test_bit(XPRT_CWND_WAIT, &xprt->state);	1223	__entry->wait = test_bit(XPRT_CWND_WAIT, &xprt->state);

include/trace/perf.h+3−2

@@ -23,8 +23,9 @@ · 22 unmodified lines
23		23
24	#undef __get_rel_dynamic_array	24	#undef __get_rel_dynamic_array
25	#define __get_rel_dynamic_array(field) \	25	#define __get_rel_dynamic_array(field) \
26	((void *)(&__entry->__rel_loc_##field) + \	26	((void *)__entry + \
27	sizeof(__entry->__rel_loc_##field) + \	27	offsetof(typeof(*__entry), __rel_loc_##field) + \
		28	sizeof(__entry->__rel_loc_##field) + \
28	(__entry->__rel_loc_##field & 0xffff))	29	(__entry->__rel_loc_##field & 0xffff))
29		30
30	#undef __get_rel_dynamic_array_len	31	#undef __get_rel_dynamic_array_len

include/trace/trace_events.h+5−4

 	struct trace_event_raw_##name {					\
 		struct trace_entry	ent;				\
 		tstruct							\
-		char			__data[0];			\
+		char			__data[];			\
 	};								\
 									\
 	static struct trace_event_class event_class_##name;
 #define __get_str(field) ((char *)__get_dynamic_array(field))
 #undef __get_rel_dynamic_array
-#define __get_rel_dynamic_array(field)	\
+#define __get_rel_dynamic_array(field)					\
-		((void *)(&__entry->__rel_loc_##field) +	\
+		((void *)__entry + 					\
-		 sizeof(__entry->__rel_loc_##field) +		\
+		 offsetof(typeof(*__entry), __rel_loc_##field) +	\
+		 sizeof(__entry->__rel_loc_##field) +			\
 		 (__entry->__rel_loc_##field & 0xffff))
 #undef __get_rel_dynamic_array_len

include/uapi/linux/cyclades.h+35−0

@@ -0,0 +1,35 @@
	1	/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
	2
	3	#ifndef _UAPI_LINUX_CYCLADES_H
	4	#define _UAPI_LINUX_CYCLADES_H
	5
	6	#warning "Support for features provided by this header has been removed"
	7	#warning "Please consider updating your code"
	8
	9	struct cyclades_monitor {
	10	unsigned long int_count;
	11	unsigned long char_count;
	12	unsigned long char_max;
	13	unsigned long char_last;
	14	};
	15
	16	#define CYGETMON 0x435901
	17	#define CYGETTHRESH 0x435902
	18	#define CYSETTHRESH 0x435903
	19	#define CYGETDEFTHRESH 0x435904
	20	#define CYSETDEFTHRESH 0x435905
	21	#define CYGETTIMEOUT 0x435906
	22	#define CYSETTIMEOUT 0x435907
	23	#define CYGETDEFTIMEOUT 0x435908
	24	#define CYSETDEFTIMEOUT 0x435909
	25	#define CYSETRFLOW 0x43590a
	26	#define CYGETRFLOW 0x43590b
	27	#define CYSETRTSDTR_INV 0x43590c
	28	#define CYGETRTSDTR_INV 0x43590d
	29	#define CYZSETPOLLCYCLE 0x43590e
	30	#define CYZGETPOLLCYCLE 0x43590f
	31	#define CYGETCD1400VER 0x435910
	32	#define CYSETWAIT 0x435912
	33	#define CYGETWAIT 0x435913
	34
	35	#endif /* _UAPI_LINUX_CYCLADES_H */

include/uapi/linux/kvm.h+1−0

@@ -1133,6 +1133,7 @@ struct kvm_ppc_resize_hpt { · 1132 unmodified lines
1133	#define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206	1133	#define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206
1134	#define KVM_CAP_VM_GPA_BITS 207	1134	#define KVM_CAP_VM_GPA_BITS 207
1135	#define KVM_CAP_XSAVE2 208	1135	#define KVM_CAP_XSAVE2 208
		1136	#define KVM_CAP_SYS_ATTRIBUTES 209
1136		1137
1137	#ifdef KVM_CAP_IRQ_ROUTING	1138	#ifdef KVM_CAP_IRQ_ROUTING
1138		1139

kernel/bpf/stackmap.c+3−2

 	   u32, size, u64, flags)
 {
 	struct pt_regs *regs;
-	long res;
+	long res = -EINVAL;
 	if (!try_get_task_stack(task))
 		return -EFAULT;
 	regs = task_pt_regs(task);
-	res = __bpf_get_stack(regs, task, NULL, buf, size, flags);
+	if (regs)
+		res = __bpf_get_stack(regs, task, NULL, buf, size, flags);
 	put_task_stack(task);
 	return res;

kernel/cgroup/cgroup.c+8−3

 	cgroup_get(cgrp);
 	cgroup_kn_unlock(of->kn);
+	/* Allow only one trigger per file descriptor */
+	if (ctx->psi.trigger) {
+		cgroup_put(cgrp);
+		return -EBUSY;
+	}
 	psi = cgroup_ino(cgrp) == 1 ? &psi_system : &cgrp->psi;
 	new = psi_trigger_create(psi, buf, nbytes, res);
 	if (IS_ERR(new)) {
 		return PTR_ERR(new);
 	}
-	psi_trigger_replace(&ctx->psi.trigger, new);
+	smp_store_release(&ctx->psi.trigger, new);
 	cgroup_put(cgrp);
 	return nbytes;
 {
 	struct cgroup_file_ctx *ctx = of->priv;
-	psi_trigger_replace(&ctx->psi.trigger, NULL);
+	psi_trigger_destroy(ctx->psi.trigger);
 }
 bool cgroup_psi_enabled(void)

kernel/events/core.c+165−104

 	WRITE_ONCE(event->state, state);
 }
+/*
+ * UP store-release, load-acquire
+ */
+#define __store_release(ptr, val)					\
+do {									\
+	barrier();							\
+	WRITE_ONCE(*(ptr), (val));					\
+} while (0)
+#define __load_acquire(ptr)						\
+({									\
+	__unqual_scalar_typeof(*(ptr)) ___p = READ_ONCE(*(ptr));	\
+	barrier();							\
+	___p;								\
+})
 #ifdef CONFIG_CGROUP_PERF
 static inline bool
 	return t->time;
 }
-static inline void __update_cgrp_time(struct perf_cgroup *cgrp)
+static inline u64 perf_cgroup_event_time_now(struct perf_event *event, u64 now)
 {
-	struct perf_cgroup_info *info;
+	struct perf_cgroup_info *t;
-	u64 now;
-	now = perf_clock();
-	info = this_cpu_ptr(cgrp->info);
+	t = per_cpu_ptr(event->cgrp->info, event->cpu);
+	if (!__load_acquire(&t->active))
+		return t->time;
+	now += READ_ONCE(t->timeoffset);
+	return now;
+}
-	info->time += now - info->timestamp;
+static inline void __update_cgrp_time(struct perf_cgroup_info *info, u64 now, bool adv)
+{
+	if (adv)
+		info->time += now - info->timestamp;
 	info->timestamp = now;
+	/*
+	 * see update_context_time()
+	 */
+	WRITE_ONCE(info->timeoffset, info->time - info->timestamp);
 }
-static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx)
+static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx, bool final)
 {
 	struct perf_cgroup *cgrp = cpuctx->cgrp;
 	struct cgroup_subsys_state *css;
+	struct perf_cgroup_info *info;
 	if (cgrp) {
+		u64 now = perf_clock();
 		for (css = &cgrp->css; css; css = css->parent) {
 			cgrp = container_of(css, struct perf_cgroup, css);
-			__update_cgrp_time(cgrp);
+			info = this_cpu_ptr(cgrp->info);
+			__update_cgrp_time(info, now, true);
+			if (final)
+				__store_release(&info->active, 0);
 		}
 	}
 }
 static inline void update_cgrp_time_from_event(struct perf_event *event)
 {
+	struct perf_cgroup_info *info;
 	struct perf_cgroup *cgrp;
 	/*
 	/*
 	 * Do not update time when cgroup is not active
 	 */
-	if (cgroup_is_descendant(cgrp->css.cgroup, event->cgrp->css.cgroup))
+	if (cgroup_is_descendant(cgrp->css.cgroup, event->cgrp->css.cgroup)) {
-		__update_cgrp_time(event->cgrp);
+		info = this_cpu_ptr(event->cgrp->info);
+		__update_cgrp_time(info, perf_clock(), true);
+	}
 }
 static inline void
 	for (css = &cgrp->css; css; css = css->parent) {
 		cgrp = container_of(css, struct perf_cgroup, css);
 		info = this_cpu_ptr(cgrp->info);
-		info->timestamp = ctx->timestamp;
+		__update_cgrp_time(info, ctx->timestamp, false);
+		__store_release(&info->active, 1);
 	}
 }
 	return ret;
 }
-static inline void
-perf_cgroup_set_shadow_time(struct perf_event *event, u64 now)
-{
-	struct perf_cgroup_info *t;
-	t = per_cpu_ptr(event->cgrp->info, event->cpu);
-	event->shadow_ctx_time = now - t->timestamp;
-}
 static inline void
 perf_cgroup_event_enable(struct perf_event *event, struct perf_event_context *ctx)
 {
 {
 }
-static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx)
+static inline void update_cgrp_time_from_cpuctx(struct perf_cpu_context *cpuctx,
+						bool final)
 {
 }
 {
 }
-static inline void
+static inline u64 perf_cgroup_event_time(struct perf_event *event)
-perf_cgroup_set_shadow_time(struct perf_event *event, u64 now)
 {
+	return 0;
 }
-static inline u64 perf_cgroup_event_time(struct perf_event *event)
+static inline u64 perf_cgroup_event_time_now(struct perf_event *event, u64 now)
 {
 	return 0;
 }
 /*
  * Update the record of the current time in a context.
  */
-static void update_context_time(struct perf_event_context *ctx)
+static void __update_context_time(struct perf_event_context *ctx, bool adv)
 {
 	u64 now = perf_clock();
-	ctx->time += now - ctx->timestamp;
+	if (adv)
+		ctx->time += now - ctx->timestamp;
 	ctx->timestamp = now;
+	/*
+	 * The above: time' = time + (now - timestamp), can be re-arranged
+	 * into: time` = now + (time - timestamp), which gives a single value
+	 * offset to compute future time without locks on.
+	 *
+	 * See perf_event_time_now(), which can be used from NMI context where
+	 * it's (obviously) not possible to acquire ctx->lock in order to read
+	 * both the above values in a consistent manner.
+	 */
+	WRITE_ONCE(ctx->timeoffset, ctx->time - ctx->timestamp);
+}
+static void update_context_time(struct perf_event_context *ctx)
+{
+	__update_context_time(ctx, true);
 }
 static u64 perf_event_time(struct perf_event *event)
 {
 	struct perf_event_context *ctx = event->ctx;
+	if (unlikely(!ctx))
+		return 0;
 	if (is_cgroup_event(event))
 		return perf_cgroup_event_time(event);
-	return ctx ? ctx->time : 0;
+	return ctx->time;
+}
+static u64 perf_event_time_now(struct perf_event *event, u64 now)
+{
+	struct perf_event_context *ctx = event->ctx;
+	if (unlikely(!ctx))
+		return 0;
+	if (is_cgroup_event(event))
+		return perf_cgroup_event_time_now(event, now);
+	if (!(__load_acquire(&ctx->is_active) & EVENT_TIME))
+		return ctx->time;
+	now += READ_ONCE(ctx->timeoffset);
+	return now;
 }
 static enum event_type_t get_event_type(struct perf_event *event)
 	if (ctx->is_active & EVENT_TIME) {
 		update_context_time(ctx);
-		update_cgrp_time_from_cpuctx(cpuctx);
+		update_cgrp_time_from_cpuctx(cpuctx, false);
 	}
 	event_sched_out(event, cpuctx, ctx);
 	list_del_event(event, ctx);
 	if (!ctx->nr_events && ctx->is_active) {
+		if (ctx == &cpuctx->ctx)
+			update_cgrp_time_from_cpuctx(cpuctx, true);
 		ctx->is_active = 0;
 		ctx->rotate_necessary = 0;
 		if (ctx->task) {
 	 * event_function_call() user.
 	 */
 	raw_spin_lock_irq(&ctx->lock);
-	if (!ctx->is_active) {
+	/*
+	 * Cgroup events are per-cpu events, and must IPI because of
+	 * cgrp_cpuctx_list.
+	 */
+	if (!ctx->is_active && !is_cgroup_event(event)) {
 		__perf_remove_from_context(event, __get_cpu_context(ctx),
 					   ctx, (void *)flags);
 		raw_spin_unlock_irq(&ctx->lock);
 	irq_work_queue(&event->pending);
 }
-static void perf_set_shadow_time(struct perf_event *event,
-				 struct perf_event_context *ctx)
-{
-	/*
-	 * use the correct time source for the time snapshot
-	 *
-	 * We could get by without this by leveraging the
-	 * fact that to get to this function, the caller
-	 * has most likely already called update_context_time()
-	 * and update_cgrp_time_xx() and thus both timestamp
-	 * are identical (or very close). Given that tstamp is,
-	 * already adjusted for cgroup, we could say that:
-	 *    tstamp - ctx->timestamp
-	 * is equivalent to
-	 *    tstamp - cgrp->timestamp.
-	 *
-	 * Then, in perf_output_read(), the calculation would
-	 * work with no changes because:
-	 * - event is guaranteed scheduled in
-	 * - no scheduled out in between
-	 * - thus the timestamp would be the same
-	 *
-	 * But this is a bit hairy.
-	 *
-	 * So instead, we have an explicit cgroup call to remain
-	 * within the time source all along. We believe it
-	 * is cleaner and simpler to understand.
-	 */
-	if (is_cgroup_event(event))
-		perf_cgroup_set_shadow_time(event, event->tstamp);
-	else
-		event->shadow_ctx_time = event->tstamp - ctx->timestamp;
-}
 #define MAX_INTERRUPTS (~0ULL)
 static void perf_log_throttle(struct perf_event *event, int enable);
 	perf_pmu_disable(event->pmu);
-	perf_set_shadow_time(event, ctx);
 	perf_log_itrace_start(event);
 	if (event->pmu->add(event, PERF_EF_START)) {
 	 * perf_event_attr::disabled events will not run and can be initialized
 	 * without IPI. Except when this is the first event for the context, in
 	 * that case we need the magic of the IPI to set ctx->is_active.
+	 * Similarly, cgroup events for the context also needs the IPI to
+	 * manipulate the cgrp_cpuctx_list.
 	 *
 	 * The IOC_ENABLE that is sure to follow the creation of a disabled
 	 * event will issue the IPI and reprogram the hardware.
 	 */
-	if (__perf_effective_state(event) == PERF_EVENT_STATE_OFF && ctx->nr_events) {
+	if (__perf_effective_state(event) == PERF_EVENT_STATE_OFF &&
+	    ctx->nr_events && !is_cgroup_event(event)) {
 		raw_spin_lock_irq(&ctx->lock);
 		if (ctx->task == TASK_TOMBSTONE) {
 			raw_spin_unlock_irq(&ctx->lock);
 		return;
 	}
-	ctx->is_active &= ~event_type;
-	if (!(ctx->is_active & EVENT_ALL))
-		ctx->is_active = 0;
-	if (ctx->task) {
-		WARN_ON_ONCE(cpuctx->task_ctx != ctx);
-		if (!ctx->is_active)
-			cpuctx->task_ctx = NULL;
-	}
 	/*
 	 * Always update time if it was set; not only when it changes.
 	 * Otherwise we can 'forget' to update time for any but the last
 	if (is_active & EVENT_TIME) {
 		/* update (and stop) ctx time */
 		update_context_time(ctx);
-		update_cgrp_time_from_cpuctx(cpuctx);
+		update_cgrp_time_from_cpuctx(cpuctx, ctx == &cpuctx->ctx);
+		/*
+		 * CPU-release for the below ->is_active store,
+		 * see __load_acquire() in perf_event_time_now()
+		 */
+		barrier();
+	}
+	ctx->is_active &= ~event_type;
+	if (!(ctx->is_active & EVENT_ALL))
+		ctx->is_active = 0;
+	if (ctx->task) {
+		WARN_ON_ONCE(cpuctx->task_ctx != ctx);
+		if (!ctx->is_active)
+			cpuctx->task_ctx = NULL;
 	}
 	is_active ^= ctx->is_active; /* changed bits */
 	return 0;
 }
+/*
+ * Because the userpage is strictly per-event (there is no concept of context,
+ * so there cannot be a context indirection), every userpage must be updated
+ * when context time starts :-(
+ *
+ * IOW, we must not miss EVENT_TIME edges.
+ */
 static inline bool event_update_userpage(struct perf_event *event)
 {
 	if (likely(!atomic_read(&event->mmap_count)))
 		return false;
 	perf_event_update_time(event);
-	perf_set_shadow_time(event, event->ctx);
 	perf_event_update_userpage(event);
 	return true;
 	     struct task_struct *task)
 {
 	int is_active = ctx->is_active;
-	u64 now;
 	lockdep_assert_held(&ctx->lock);
 	if (likely(!ctx->nr_events))
 		return;
+	if (is_active ^ EVENT_TIME) {
+		/* start ctx time */
+		__update_context_time(ctx, false);
+		perf_cgroup_set_timestamp(task, ctx);
+		/*
+		 * CPU-release for the below ->is_active store,
+		 * see __load_acquire() in perf_event_time_now()
+		 */
+		barrier();
+	}
 	ctx->is_active |= (event_type | EVENT_TIME);
 	if (ctx->task) {
 		if (!is_active)
 	is_active ^= ctx->is_active; /* changed bits */
-	if (is_active & EVENT_TIME) {
-		/* start ctx time */
-		now = perf_clock();
-		ctx->timestamp = now;
-		perf_cgroup_set_timestamp(task, ctx);
-	}
 	/*
 	 * First go through the list and put on any pinned groups
 	 * in order to give them the best chance of going on.
 	return local64_read(&event->count) + atomic64_read(&event->child_count);
 }
+static void calc_timer_values(struct perf_event *event,
+				u64 *now,
+				u64 *enabled,
+				u64 *running)
+{
+	u64 ctx_time;
+	*now = perf_clock();
+	ctx_time = perf_event_time_now(event, *now);
+	__perf_update_times(event, ctx_time, enabled, running);
+}
 /*
  * NMI-safe method to read a local event, that is an event that
  * is:
 	*value = local64_read(&event->count);
 	if (enabled || running) {
-		u64 now = event->shadow_ctx_time + perf_clock();
+		u64 __enabled, __running, __now;;
-		u64 __enabled, __running;
-		__perf_update_times(event, now, &__enabled, &__running);
+		calc_timer_values(event, &__now, &__enabled, &__running);
 		if (enabled)
 			*enabled = __enabled;
 		if (running)
 	return event->pmu->event_idx(event);
 }
-static void calc_timer_values(struct perf_event *event,
-				u64 *now,
-				u64 *enabled,
-				u64 *running)
-{
-	u64 ctx_time;
-	*now = perf_clock();
-	ctx_time = event->shadow_ctx_time + *now;
-	__perf_update_times(event, ctx_time, enabled, running);
-}
 static void perf_event_init_userpage(struct perf_event *event)
 {
 	struct perf_event_mmap_page *userpg;
 	struct perf_buffer *old_rb = NULL;
 	unsigned long flags;
+	WARN_ON_ONCE(event->parent);
 	if (event->rb) {
 		/*
 		 * Should be impossible, we set this when removing
 {
 	struct perf_buffer *rb;
+	if (event->parent)
+		event = event->parent;
 	rcu_read_lock();
 	rb = rcu_dereference(event->rb);
 	if (rb) {
 {
 	struct perf_buffer *rb;
+	if (event->parent)
+		event = event->parent;
 	rcu_read_lock();
 	rb = rcu_dereference(event->rb);
 	if (rb) {
 		ring_buffer_attach(event, rb);
 		perf_event_update_time(event);
-		perf_set_shadow_time(event, event->ctx);
 		perf_event_init_userpage(event);
 		perf_event_update_userpage(event);
 	} else {
 	if (WARN_ON_ONCE(READ_ONCE(sampler->oncpu) != smp_processor_id()))
 		goto out;
-	rb = ring_buffer_get(sampler->parent ? sampler->parent : sampler);
+	rb = ring_buffer_get(sampler);
 	if (!rb)
 		goto out;
 	if (WARN_ON_ONCE(!sampler || !data->aux_size))
 		return;
-	rb = ring_buffer_get(sampler->parent ? sampler->parent : sampler);
+	rb = ring_buffer_get(sampler);
 	if (!rb)
 		return;

kernel/power/snapshot.c+7−14

  * Register a range of page frames the contents of which should not be saved
  * during hibernation (to be used in the early initialization code).
  */
-void __init __register_nosave_region(unsigned long start_pfn,
+void __init register_nosave_region(unsigned long start_pfn, unsigned long end_pfn)
-				     unsigned long end_pfn, int use_kmalloc)
 {
 	struct nosave_region *region;
 			goto Report;
 		}
 	}
-	if (use_kmalloc) {
+	/* This allocation cannot fail */
-		/* During init, this shouldn't fail */
+	region = memblock_alloc(sizeof(struct nosave_region),
-		region = kmalloc(sizeof(struct nosave_region), GFP_KERNEL);
+				SMP_CACHE_BYTES);
-		BUG_ON(!region);
+	if (!region)
-	} else {
+		panic("%s: Failed to allocate %zu bytes\n", __func__,
-		/* This allocation cannot fail */
+		      sizeof(struct nosave_region));
-		region = memblock_alloc(sizeof(struct nosave_region),
-					SMP_CACHE_BYTES);
-		if (!region)
-			panic("%s: Failed to allocate %zu bytes\n", __func__,
-			      sizeof(struct nosave_region));
-	}
 	region->start_pfn = start_pfn;
 	region->end_pfn = end_pfn;
 	list_add_tail(&region->list, &nosave_regions);

kernel/power/wakelock.c+4−7

 {
 	struct rb_node *node;
 	struct wakelock *wl;
-	char *str = buf;
+	int len = 0;
-	char *end = buf + PAGE_SIZE;
 	mutex_lock(&wakelocks_lock);
 	for (node = rb_first(&wakelocks_tree); node; node = rb_next(node)) {
 		wl = rb_entry(node, struct wakelock, node);
 		if (wl->ws->active == show_active)
-			str += scnprintf(str, end - str, "%s ", wl->name);
+			len += sysfs_emit_at(buf, len, "%s ", wl->name);
 	}
-	if (str > buf)
-		str--;
-	str += scnprintf(str, end - str, "\n");
+	len += sysfs_emit_at(buf, len, "\n");
 	mutex_unlock(&wakelocks_lock);
-	return (str - buf);
+	return len;
 }
 #if CONFIG_PM_WAKELOCKS_LIMIT > 0

kernel/rcu/tasks.h+8−4

 	.call_func = call,								\
 	.rtpcpu = &rt_name ## __percpu,							\
 	.name = n,									\
-	.percpu_enqueue_shift = ilog2(CONFIG_NR_CPUS),					\
+	.percpu_enqueue_shift = ilog2(CONFIG_NR_CPUS) + 1,				\
 	.percpu_enqueue_lim = 1,							\
 	.percpu_dequeue_lim = 1,							\
 	.barrier_q_mutex = __MUTEX_INITIALIZER(rt_name.barrier_q_mutex),		\
 	int cpu;
 	unsigned long flags;
 	int lim;
+	int shift;
 	raw_spin_lock_irqsave(&rtp->cbs_gbl_lock, flags);
 	if (rcu_task_enqueue_lim < 0) {
 	if (lim > nr_cpu_ids)
 		lim = nr_cpu_ids;
-	WRITE_ONCE(rtp->percpu_enqueue_shift, ilog2(nr_cpu_ids / lim));
+	shift = ilog2(nr_cpu_ids / lim);
+	if (((nr_cpu_ids - 1) >> shift) >= lim)
+		shift++;
+	WRITE_ONCE(rtp->percpu_enqueue_shift, shift);
 	WRITE_ONCE(rtp->percpu_dequeue_lim, lim);
 	smp_store_release(&rtp->percpu_enqueue_lim, lim);
 	for_each_possible_cpu(cpu) {
 	if (unlikely(needadjust)) {
 		raw_spin_lock_irqsave(&rtp->cbs_gbl_lock, flags);
 		if (rtp->percpu_enqueue_lim != nr_cpu_ids) {
-			WRITE_ONCE(rtp->percpu_enqueue_shift, ilog2(nr_cpu_ids));
+			WRITE_ONCE(rtp->percpu_enqueue_shift, ilog2(nr_cpu_ids) + 1);
 			WRITE_ONCE(rtp->percpu_dequeue_lim, nr_cpu_ids);
 			smp_store_release(&rtp->percpu_enqueue_lim, nr_cpu_ids);
 			pr_info("Switching %s to per-CPU callback queuing.\n", rtp->name);
 	if (rcu_task_cb_adjust && ncbs <= rcu_task_collapse_lim) {
 		raw_spin_lock_irqsave(&rtp->cbs_gbl_lock, flags);
 		if (rtp->percpu_enqueue_lim > 1) {
-			WRITE_ONCE(rtp->percpu_enqueue_shift, ilog2(nr_cpu_ids));
+			WRITE_ONCE(rtp->percpu_enqueue_shift, ilog2(nr_cpu_ids) + 1);
 			smp_store_release(&rtp->percpu_enqueue_lim, 1);
 			rtp->percpu_dequeue_gpseq = get_state_synchronize_rcu();
 			pr_info("Starting switch %s to CPU-0 callback queuing.\n", rtp->name);

kernel/sched/core.c+4−11

 	}
 	if (schedstat_enabled() && rq->core->core_forceidle_count) {
-		if (cookie)
+		rq->core->core_forceidle_start = rq_clock(rq->core);
-			rq->core->core_forceidle_start = rq_clock(rq->core);
 		rq->core->core_forceidle_occupation = occ;
 	}
 	if (spin_needbreak(lock) || resched) {
 		spin_unlock(lock);
-		if (resched)
+		if (!_cond_resched())
-			preempt_schedule_common();
-		else
 			cpu_relax();
 		ret = 1;
 		spin_lock(lock);
 	if (rwlock_needbreak(lock) || resched) {
 		read_unlock(lock);
-		if (resched)
+		if (!_cond_resched())
-			preempt_schedule_common();
-		else
 			cpu_relax();
 		ret = 1;
 		read_lock(lock);
 	if (rwlock_needbreak(lock) || resched) {
 		write_unlock(lock);
-		if (resched)
+		if (!_cond_resched())
-			preempt_schedule_common();
-		else
 			cpu_relax();
 		ret = 1;
 		write_lock(lock);

kernel/sched/core_sched.c+1−1

@@ -277,7 +277,7 @@ void __sched_core_account_forceidle(struct rq *rq) · 276 unmodified lines
277	rq_i = cpu_rq(i);	277	rq_i = cpu_rq(i);
278	p = rq_i->core_pick ?: rq_i->curr;	278	p = rq_i->core_pick ?: rq_i->curr;
279		279
280	if (!p->core_cookie)	280	if (p == rq_i->idle)
281	continue;	281	continue;
282		282
283	__schedstat_add(p->stats.core_forceidle_sum, delta);	283	__schedstat_add(p->stats.core_forceidle_sum, delta);

kernel/sched/fair.c+77−41

 static inline void
 dequeue_load_avg(struct cfs_rq *cfs_rq, struct sched_entity *se)
 {
-	u32 divider = get_pelt_divider(&se->avg);
 	sub_positive(&cfs_rq->avg.load_avg, se->avg.load_avg);
-	cfs_rq->avg.load_sum = cfs_rq->avg.load_avg * divider;
+	sub_positive(&cfs_rq->avg.load_sum, se_weight(se) * se->avg.load_sum);
+	/* See update_cfs_rq_load_avg() */
+	cfs_rq->avg.load_sum = max_t(u32, cfs_rq->avg.load_sum,
+					  cfs_rq->avg.load_avg * PELT_MIN_DIVIDER);
 }
 #else
 static inline void
 	se->avg.last_update_time = n_last_update_time;
 }
 /*
  * When on migration a sched_entity joins/leaves the PELT hierarchy, we need to
  * propagate its contribution. The key to this propagation is the invariant
  * XXX: only do this for the part of runnable > running ?
  *
  */
 static inline void
 update_tg_cfs_util(struct cfs_rq *cfs_rq, struct sched_entity *se, struct cfs_rq *gcfs_rq)
 {
-	long delta = gcfs_rq->avg.util_avg - se->avg.util_avg;
+	long delta_sum, delta_avg = gcfs_rq->avg.util_avg - se->avg.util_avg;
-	u32 divider;
+	u32 new_sum, divider;
 	/* Nothing to update */
-	if (!delta)
+	if (!delta_avg)
 		return;
 	/*
 	 */
 	divider = get_pelt_divider(&cfs_rq->avg);
 	/* Set new sched_entity's utilization */
 	se->avg.util_avg = gcfs_rq->avg.util_avg;
-	se->avg.util_sum = se->avg.util_avg * divider;
+	new_sum = se->avg.util_avg * divider;
+	delta_sum = (long)new_sum - (long)se->avg.util_sum;
+	se->avg.util_sum = new_sum;
 	/* Update parent cfs_rq utilization */
-	add_positive(&cfs_rq->avg.util_avg, delta);
+	add_positive(&cfs_rq->avg.util_avg, delta_avg);
-	cfs_rq->avg.util_sum = cfs_rq->avg.util_avg * divider;
+	add_positive(&cfs_rq->avg.util_sum, delta_sum);
+	/* See update_cfs_rq_load_avg() */
+	cfs_rq->avg.util_sum = max_t(u32, cfs_rq->avg.util_sum,
+					  cfs_rq->avg.util_avg * PELT_MIN_DIVIDER);
 }
 static inline void
 update_tg_cfs_runnable(struct cfs_rq *cfs_rq, struct sched_entity *se, struct cfs_rq *gcfs_rq)
 {
-	long delta = gcfs_rq->avg.runnable_avg - se->avg.runnable_avg;
+	long delta_sum, delta_avg = gcfs_rq->avg.runnable_avg - se->avg.runnable_avg;
-	u32 divider;
+	u32 new_sum, divider;
 	/* Nothing to update */
-	if (!delta)
+	if (!delta_avg)
 		return;
 	/*
 	/* Set new sched_entity's runnable */
 	se->avg.runnable_avg = gcfs_rq->avg.runnable_avg;
-	se->avg.runnable_sum = se->avg.runnable_avg * divider;
+	new_sum = se->avg.runnable_avg * divider;
+	delta_sum = (long)new_sum - (long)se->avg.runnable_sum;
+	se->avg.runnable_sum = new_sum;
 	/* Update parent cfs_rq runnable */
-	add_positive(&cfs_rq->avg.runnable_avg, delta);
+	add_positive(&cfs_rq->avg.runnable_avg, delta_avg);
-	cfs_rq->avg.runnable_sum = cfs_rq->avg.runnable_avg * divider;
+	add_positive(&cfs_rq->avg.runnable_sum, delta_sum);
+	/* See update_cfs_rq_load_avg() */
+	cfs_rq->avg.runnable_sum = max_t(u32, cfs_rq->avg.runnable_sum,
+					      cfs_rq->avg.runnable_avg * PELT_MIN_DIVIDER);
 }
 static inline void
 update_tg_cfs_load(struct cfs_rq *cfs_rq, struct sched_entity *se, struct cfs_rq *gcfs_rq)
 {
-	long delta, running_sum, runnable_sum = gcfs_rq->prop_runnable_sum;
+	long delta_avg, running_sum, runnable_sum = gcfs_rq->prop_runnable_sum;
 	unsigned long load_avg;
 	u64 load_sum = 0;
+	s64 delta_sum;
 	u32 divider;
 	if (!runnable_sum)
 		 * assuming all tasks are equally runnable.
 		 */
 		if (scale_load_down(gcfs_rq->load.weight)) {
-			load_sum = div_s64(gcfs_rq->avg.load_sum,
+			load_sum = div_u64(gcfs_rq->avg.load_sum,
 				scale_load_down(gcfs_rq->load.weight));
 		}
 	running_sum = se->avg.util_sum >> SCHED_CAPACITY_SHIFT;
 	runnable_sum = max(runnable_sum, running_sum);
-	load_sum = (s64)se_weight(se) * runnable_sum;
+	load_sum = se_weight(se) * runnable_sum;
-	load_avg = div_s64(load_sum, divider);
+	load_avg = div_u64(load_sum, divider);
-	se->avg.load_sum = runnable_sum;
-	delta = load_avg - se->avg.load_avg;
+	delta_avg = load_avg - se->avg.load_avg;
-	if (!delta)
+	if (!delta_avg)
 		return;
-	se->avg.load_avg = load_avg;
+	delta_sum = load_sum - (s64)se_weight(se) * se->avg.load_sum;
-	add_positive(&cfs_rq->avg.load_avg, delta);
+	se->avg.load_sum = runnable_sum;
-	cfs_rq->avg.load_sum = cfs_rq->avg.load_avg * divider;
+	se->avg.load_avg = load_avg;
+	add_positive(&cfs_rq->avg.load_avg, delta_avg);
+	add_positive(&cfs_rq->avg.load_sum, delta_sum);
+	/* See update_cfs_rq_load_avg() */
+	cfs_rq->avg.load_sum = max_t(u32, cfs_rq->avg.load_sum,
+					  cfs_rq->avg.load_avg * PELT_MIN_DIVIDER);
 }
 static inline void add_tg_cfs_propagate(struct cfs_rq *cfs_rq, long runnable_sum)
  *
  * cfs_rq->avg is used for task_h_load() and update_cfs_share() for example.
  *
- * Returns true if the load decayed or we removed load.
+ * Return: true if the load decayed or we removed load.
  *
  * Since both these conditions indicate a changed cfs_rq->avg.load we should
  * call update_tg_load_avg() when this function returns true.
 		r = removed_load;
 		sub_positive(&sa->load_avg, r);
-		sa->load_sum = sa->load_avg * divider;
+		sub_positive(&sa->load_sum, r * divider);
+		/* See sa->util_sum below */
+		sa->load_sum = max_t(u32, sa->load_sum, sa->load_avg * PELT_MIN_DIVIDER);
 		r = removed_util;
 		sub_positive(&sa->util_avg, r);
-		sa->util_sum = sa->util_avg * divider;
+		sub_positive(&sa->util_sum, r * divider);
+		/*
+		 * Because of rounding, se->util_sum might ends up being +1 more than
+		 * cfs->util_sum. Although this is not a problem by itself, detaching
+		 * a lot of tasks with the rounding problem between 2 updates of
+		 * util_avg (~1ms) can make cfs->util_sum becoming null whereas
+		 * cfs_util_avg is not.
+		 * Check that util_sum is still above its lower bound for the new
+		 * util_avg. Given that period_contrib might have moved since the last
+		 * sync, we are only sure that util_sum must be above or equal to
+		 *    util_avg * minimum possible divider
+		 */
+		sa->util_sum = max_t(u32, sa->util_sum, sa->util_avg * PELT_MIN_DIVIDER);
 		r = removed_runnable;
 		sub_positive(&sa->runnable_avg, r);
-		sa->runnable_sum = sa->runnable_avg * divider;
+		sub_positive(&sa->runnable_sum, r * divider);
+		/* See sa->util_sum above */
+		sa->runnable_sum = max_t(u32, sa->runnable_sum,
+					      sa->runnable_avg * PELT_MIN_DIVIDER);
 		/*
 		 * removed_runnable is the unweighted version of removed_load so we
  */
 static void detach_entity_load_avg(struct cfs_rq *cfs_rq, struct sched_entity *se)
 {
-	/*
-	 * cfs_rq->avg.period_contrib can be used for both cfs_rq and se.
-	 * See ___update_load_avg() for details.
-	 */
-	u32 divider = get_pelt_divider(&cfs_rq->avg);
 	dequeue_load_avg(cfs_rq, se);
 	sub_positive(&cfs_rq->avg.util_avg, se->avg.util_avg);
-	cfs_rq->avg.util_sum = cfs_rq->avg.util_avg * divider;
+	sub_positive(&cfs_rq->avg.util_sum, se->avg.util_sum);
+	/* See update_cfs_rq_load_avg() */
+	cfs_rq->avg.util_sum = max_t(u32, cfs_rq->avg.util_sum,
+					  cfs_rq->avg.util_avg * PELT_MIN_DIVIDER);
 	sub_positive(&cfs_rq->avg.runnable_avg, se->avg.runnable_avg);
-	cfs_rq->avg.runnable_sum = cfs_rq->avg.runnable_avg * divider;
+	sub_positive(&cfs_rq->avg.runnable_sum, se->avg.runnable_sum);
+	/* See update_cfs_rq_load_avg() */
+	cfs_rq->avg.runnable_sum = max_t(u32, cfs_rq->avg.runnable_sum,
+					      cfs_rq->avg.runnable_avg * PELT_MIN_DIVIDER);
 	add_tg_cfs_propagate(cfs_rq, -se->avg.load_sum);
  *
  * If @sg does not have SMT siblings, only pull tasks if all of the SMT siblings
  * of @dst_cpu are idle and @sg has lower priority.
+ *
+ * Return: true if @dst_cpu can pull tasks, false otherwise.
  */
 static bool asym_smt_can_pull_tasks(int dst_cpu, struct sd_lb_stats *sds,
 				    struct sg_lb_stats *sgs,
 /**
  * update_sg_lb_stats - Update sched_group's statistics for load balancing.
  * @env: The load balancing environment.
+ * @sds: Load-balancing data with statistics of the local group.
  * @group: sched_group whose statistics are to be updated.
  * @sgs: variable to hold the statistics for this group.
  * @sg_status: Holds flag indicating the status of the sched_group
 /**
  * find_busiest_group - Returns the busiest group within the sched_domain
  * if there is an imbalance.
+ * @env: The load balancing environment.
  *
  * Also calculates the amount of runnable load which should be moved
  * to restore balance.
  *
- * @env: The load balancing environment.
- *
  * Return:	- The busiest group if imbalance exists.
  */
 static struct sched_group *find_busiest_group(struct lb_env *env)

kernel/sched/membarrier.c+5−4

 #endif
 #ifdef CONFIG_RSEQ
-#define MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ_BITMASK		\
+#define MEMBARRIER_PRIVATE_EXPEDITED_RSEQ_BITMASK		\
 	(MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ			\
-	| MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_RSEQ_BITMASK)
+	| MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED_RSEQ)
 #else
-#define MEMBARRIER_CMD_PRIVATE_EXPEDITED_RSEQ_BITMASK	0
+#define MEMBARRIER_PRIVATE_EXPEDITED_RSEQ_BITMASK	0
 #endif
 #define MEMBARRIER_CMD_BITMASK						\
 	| MEMBARRIER_CMD_REGISTER_GLOBAL_EXPEDITED			\
 	| MEMBARRIER_CMD_PRIVATE_EXPEDITED				\
 	| MEMBARRIER_CMD_REGISTER_PRIVATE_EXPEDITED			\
-	| MEMBARRIER_PRIVATE_EXPEDITED_SYNC_CORE_BITMASK)
+	| MEMBARRIER_PRIVATE_EXPEDITED_SYNC_CORE_BITMASK		\
+	| MEMBARRIER_PRIVATE_EXPEDITED_RSEQ_BITMASK)
 static void ipi_mb(void *info)
 {

kernel/sched/pelt.h+3−1

 }
 #endif
+#define PELT_MIN_DIVIDER	(LOAD_AVG_MAX - 1024)
 static inline u32 get_pelt_divider(struct sched_avg *avg)
 {
-	return LOAD_AVG_MAX - 1024 + avg->period_contrib;
+	return PELT_MIN_DIVIDER + avg->period_contrib;
 }
 static inline void cfs_se_util_change(struct sched_avg *avg)

kernel/sched/psi.c+70−75

@@ -1082,44 +1082,6 @@ int psi_show(struct seq_file m, struct psi_group group, enum psi_res res) · 1081 unmodified lines
1082	return 0;	1082	return 0;
1083	}	1083	}
1084		1084
1085	static int psi_io_show(struct seq_file m, void v)
1086	{
1087	return psi_show(m, &psi_system, PSI_IO);
1088	}
1089
1090	static int psi_memory_show(struct seq_file m, void v)
1091	{
1092	return psi_show(m, &psi_system, PSI_MEM);
1093	}
1094
1095	static int psi_cpu_show(struct seq_file m, void v)
1096	{
1097	return psi_show(m, &psi_system, PSI_CPU);
1098	}
1099
1100	static int psi_open(struct file file, int (psi_show)(struct seq_file , void ))
1101	{
1102	if (file->f_mode & FMODE_WRITE && !capable(CAP_SYS_RESOURCE))
1103	return -EPERM;
1104
1105	return single_open(file, psi_show, NULL);
1106	}
1107
1108	static int psi_io_open(struct inode inode, struct file file)
1109	{
1110	return psi_open(file, psi_io_show);
1111	}
1112
1113	static int psi_memory_open(struct inode inode, struct file file)
1114	{
1115	return psi_open(file, psi_memory_show);
1116	}
1117
1118	static int psi_cpu_open(struct inode inode, struct file file)
1119	{
1120	return psi_open(file, psi_cpu_show);
1121	}
1122
1123	struct psi_trigger psi_trigger_create(struct psi_group group,	1085	struct psi_trigger psi_trigger_create(struct psi_group group,
1124	char *buf, size_t nbytes, enum psi_res res)	1086	char *buf, size_t nbytes, enum psi_res res)
1125	{	1087	{
@@ -1162,7 +1124,6 @@ struct psi_trigger psi_trigger_create(struct psi_group group, · 36 unmodified lines
1162	t->event = 0;	1124	t->event = 0;
1163	t->last_event_time = 0;	1125	t->last_event_time = 0;
1164	init_waitqueue_head(&t->event_wait);	1126	init_waitqueue_head(&t->event_wait);
1165	kref_init(&t->refcount);
1166		1127
1167	mutex_lock(&group->trigger_lock);	1128	mutex_lock(&group->trigger_lock);
1168		1129
@@ -1191,15 +1152,19 @@ struct psi_trigger psi_trigger_create(struct psi_group group, · 22 unmodified lines
1191	return t;	1152	return t;
1192	}	1153	}
1193		1154
1194	static void psi_trigger_destroy(struct kref *ref)	1155	void psi_trigger_destroy(struct psi_trigger *t)
1195	{	1156	{
1196	struct psi_trigger *t = container_of(ref, struct psi_trigger, refcount);	1157	struct psi_group *group;
1197	struct psi_group *group = t->group;
1198	struct task_struct *task_to_destroy = NULL;	1158	struct task_struct *task_to_destroy = NULL;
1199		1159
1200	if (static_branch_likely(&psi_disabled))	1160	/*
		1161	* We do not check psi_disabled since it might have been disabled after
		1162	* the trigger got created.
		1163	*/
		1164	if (!t)
1201	return;	1165	return;
1202		1166
		1167	group = t->group;
1203	/*	1168	/*
1204	* Wakeup waiters to stop polling. Can happen if cgroup is deleted	1169	* Wakeup waiters to stop polling. Can happen if cgroup is deleted
1205	* from under a polling process.	1170	* from under a polling process.
@@ -1235,9 +1200,9 @@ static void psi_trigger_destroy(struct kref *ref) · 29 unmodified lines
1235	mutex_unlock(&group->trigger_lock);	1200	mutex_unlock(&group->trigger_lock);
1236		1201
1237	/*	1202	/*
1238	* Wait for both *trigger_ptr from psi_trigger_replace and	1203	* Wait for psi_schedule_poll_work RCU to complete its read-side
1239	* poll_task RCUs to complete their read-side critical sections	1204	* critical section before destroying the trigger and optionally the
1240	* before destroying the trigger and optionally the poll_task	1205	* poll_task.
1241	*/	1206	*/
1242	synchronize_rcu();	1207	synchronize_rcu();
1243	/*	1208	/*
@@ -1254,18 +1219,6 @@ static void psi_trigger_destroy(struct kref *ref) · 10 unmodified lines
1254	kfree(t);	1219	kfree(t);
1255	}	1220	}
1256		1221
1257	void psi_trigger_replace(void *trigger_ptr, struct psi_trigger new)
1258	{
1259	struct psi_trigger old = trigger_ptr;
1260
1261	if (static_branch_likely(&psi_disabled))
1262	return;
1263
1264	rcu_assign_pointer(*trigger_ptr, new);
1265	if (old)
1266	kref_put(&old->refcount, psi_trigger_destroy);
1267	}
1268
1269	__poll_t psi_trigger_poll(void **trigger_ptr,	1222	__poll_t psi_trigger_poll(void **trigger_ptr,
1270	struct file file, poll_table wait)	1223	struct file file, poll_table wait)
1271	{	1224	{
@@ -1275,27 +1228,57 @@ __poll_t psi_trigger_poll(void **trigger_ptr, · 3 unmodified lines
1275	if (static_branch_likely(&psi_disabled))	1228	if (static_branch_likely(&psi_disabled))
1276	return DEFAULT_POLLMASK \| EPOLLERR \| EPOLLPRI;	1229	return DEFAULT_POLLMASK \| EPOLLERR \| EPOLLPRI;
1277		1230
1278	rcu_read_lock();	1231	t = smp_load_acquire(trigger_ptr);
1279		1232	if (!t)
1280	t = rcu_dereference((void __rcu __force *)trigger_ptr);
1281	if (!t) {
1282	rcu_read_unlock();
1283	return DEFAULT_POLLMASK \| EPOLLERR \| EPOLLPRI;	1233	return DEFAULT_POLLMASK \| EPOLLERR \| EPOLLPRI;
1284	}
1285	kref_get(&t->refcount);
1286
1287	rcu_read_unlock();
1288		1234
1289	poll_wait(file, &t->event_wait, wait);	1235	poll_wait(file, &t->event_wait, wait);
1290		1236
1291	if (cmpxchg(&t->event, 1, 0) == 1)	1237	if (cmpxchg(&t->event, 1, 0) == 1)
1292	ret \|= EPOLLPRI;	1238	ret \|= EPOLLPRI;
1293		1239
1294	kref_put(&t->refcount, psi_trigger_destroy);
1295
1296	return ret;	1240	return ret;
1297	}	1241	}
1298		1242
		1243	#ifdef CONFIG_PROC_FS
		1244	static int psi_io_show(struct seq_file m, void v)
		1245	{
		1246	return psi_show(m, &psi_system, PSI_IO);
		1247	}
		1248
		1249	static int psi_memory_show(struct seq_file m, void v)
		1250	{
		1251	return psi_show(m, &psi_system, PSI_MEM);
		1252	}
		1253
		1254	static int psi_cpu_show(struct seq_file m, void v)
		1255	{
		1256	return psi_show(m, &psi_system, PSI_CPU);
		1257	}
		1258
		1259	static int psi_open(struct file file, int (psi_show)(struct seq_file , void ))
		1260	{
		1261	if (file->f_mode & FMODE_WRITE && !capable(CAP_SYS_RESOURCE))
		1262	return -EPERM;
		1263
		1264	return single_open(file, psi_show, NULL);
		1265	}
		1266
		1267	static int psi_io_open(struct inode inode, struct file file)
		1268	{
		1269	return psi_open(file, psi_io_show);
		1270	}
		1271
		1272	static int psi_memory_open(struct inode inode, struct file file)
		1273	{
		1274	return psi_open(file, psi_memory_show);
		1275	}
		1276
		1277	static int psi_cpu_open(struct inode inode, struct file file)
		1278	{
		1279	return psi_open(file, psi_cpu_show);
		1280	}
		1281
1299	static ssize_t psi_write(struct file file, const char __user user_buf,	1282	static ssize_t psi_write(struct file file, const char __user user_buf,
1300	size_t nbytes, enum psi_res res)	1283	size_t nbytes, enum psi_res res)
1301	{	1284	{
@@ -1316,14 +1299,24 @@ static ssize_t psi_write(struct file file, const char __user user_buf, · 14 unmodified lines
1316		1299
1317	buf[buf_size - 1] = '\0';	1300	buf[buf_size - 1] = '\0';
1318		1301
1319	new = psi_trigger_create(&psi_system, buf, nbytes, res);
1320	if (IS_ERR(new))
1321	return PTR_ERR(new);
1322
1323	seq = file->private_data;	1302	seq = file->private_data;
		1303
1324	/* Take seq->lock to protect seq->private from concurrent writes */	1304	/* Take seq->lock to protect seq->private from concurrent writes */
1325	mutex_lock(&seq->lock);	1305	mutex_lock(&seq->lock);
1326	psi_trigger_replace(&seq->private, new);	1306
		1307	/* Allow only one trigger per file descriptor */
		1308	if (seq->private) {
		1309	mutex_unlock(&seq->lock);
		1310	return -EBUSY;
		1311	}
		1312
		1313	new = psi_trigger_create(&psi_system, buf, nbytes, res);
		1314	if (IS_ERR(new)) {
		1315	mutex_unlock(&seq->lock);
		1316	return PTR_ERR(new);
		1317	}
		1318
		1319	smp_store_release(&seq->private, new);
1327	mutex_unlock(&seq->lock);	1320	mutex_unlock(&seq->lock);
1328		1321
1329	return nbytes;	1322	return nbytes;
@@ -1358,7 +1351,7 @@ static int psi_fop_release(struct inode inode, struct file file) · 28 unmodified lines
1358	{	1351	{
1359	struct seq_file *seq = file->private_data;	1352	struct seq_file *seq = file->private_data;
1360		1353
1361	psi_trigger_replace(&seq->private, NULL);	1354	psi_trigger_destroy(seq->private);
1362	return single_release(inode, file);	1355	return single_release(inode, file);
1363	}	1356	}
1364		1357
@@ -1400,3 +1393,5 @@ static int __init psi_proc_init(void) · 35 unmodified lines
1400	return 0;	1393	return 0;
1401	}	1394	}
1402	module_init(psi_proc_init);	1395	module_init(psi_proc_init);
		1396
		1397	#endif /* CONFIG_PROC_FS */

kernel/trace/Kconfig+7−1

 	help
 	  C version of recordmcount available?
+config HAVE_BUILDTIME_MCOUNT_SORT
+       bool
+       help
+         An architecture selects this if it sorts the mcount_loc section
+	 at build time.
 config BUILDTIME_MCOUNT_SORT
        bool
        default y
-       depends on BUILDTIME_TABLE_SORT && !S390
+       depends on HAVE_BUILDTIME_MCOUNT_SORT && DYNAMIC_FTRACE
        help
          Sort the mcount_loc section at build time.

kernel/trace/trace.c+2−1

@@ -7740,7 +7740,8 @@ static struct tracing_log_err get_tracing_log_err(struct trace_array tr) · 7739 unmodified lines
7740	err = kzalloc(sizeof(*err), GFP_KERNEL);	7740	err = kzalloc(sizeof(*err), GFP_KERNEL);
7741	if (!err)	7741	if (!err)
7742	err = ERR_PTR(-ENOMEM);	7742	err = ERR_PTR(-ENOMEM);
7743	tr->n_err_log_entries++;	7743	else
		7744	tr->n_err_log_entries++;
7744		7745
7745	return err;	7746	return err;
7746	}	7747	}

kernel/trace/trace_events_hist.c+8−2

 		(HIST_FIELD_FL_TIMESTAMP | HIST_FIELD_FL_TIMESTAMP_USECS);
 	expr->fn = hist_field_unary_minus;
 	expr->operands[0] = operand1;
+	expr->size = operand1->size;
+	expr->is_signed = operand1->is_signed;
 	expr->operator = FIELD_OP_UNARY_MINUS;
 	expr->name = expr_str(expr, 0);
 	expr->type = kstrdup_const(operand1->type, GFP_KERNEL);
 		/* The operand sizes should be the same, so just pick one */
 		expr->size = operand1->size;
+		expr->is_signed = operand1->is_signed;
 		expr->operator = field_op;
 		expr->type = kstrdup_const(operand1->type, GFP_KERNEL);
 			var_ref_idx = find_var_ref_idx(hist_data, var_ref);
 			if (WARN_ON(var_ref_idx < 0)) {
+				kfree(p);
 				ret = var_ref_idx;
 				goto err;
 			}
 	lockdep_assert_held(&event_mutex);
-	if (glob && strlen(glob)) {
+	WARN_ON(!glob);
+	if (strlen(glob)) {
 		hist_err_clear();
 		last_cmd_set(file, param);
 	}
 			continue;
 		}
 		break;
-	} while (p);
+	} while (1);
 	if (!p)
 		param = NULL;

kernel/ucount.c+2−0

 			kfree(new);
 		} else {
 			hlist_add_head(&new->node, hashent);
+			get_user_ns(new->ns);
 			spin_unlock_irq(&ucounts_lock);
 			return new;
 		}
 	if (atomic_dec_and_lock_irqsave(&ucounts->count, &ucounts_lock, flags)) {
 		hlist_del_init(&ucounts->node);
 		spin_unlock_irqrestore(&ucounts_lock, flags);
+		put_user_ns(ucounts->ns);
 		kfree(ucounts);
 	}
 }

lib/sbitmap.c+6−2

@@ -488,9 +488,13 @@ void sbitmap_queue_recalculate_wake_batch(struct sbitmap_queue *sbq, · 487 unmodified lines
488	unsigned int users)	488	unsigned int users)
489	{	489	{
490	unsigned int wake_batch;	490	unsigned int wake_batch;
		491	unsigned int min_batch;
		492	unsigned int depth = (sbq->sb.depth + users - 1) / users;
491		493
492	wake_batch = clamp_val((sbq->sb.depth + users - 1) /	494	min_batch = sbq->sb.depth >= (4 * SBQ_WAIT_QUEUES) ? 4 : 1;
493	users, 4, SBQ_WAKE_BATCH);	495
		496	wake_batch = clamp_val(depth / SBQ_WAIT_QUEUES,
		497	min_batch, SBQ_WAKE_BATCH);
494	__sbitmap_queue_update_wake_batch(sbq, wake_batch);	498	__sbitmap_queue_update_wake_batch(sbq, wake_batch);
495	}	499	}
496	EXPORT_SYMBOL_GPL(sbitmap_queue_recalculate_wake_batch);	500	EXPORT_SYMBOL_GPL(sbitmap_queue_recalculate_wake_batch);

lib/test_kasan.c+5−0

 	ptr = kmalloc(size, GFP_KERNEL);
 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr);
+	OPTIMIZER_HIDE_VAR(ptr);
 	OPTIMIZER_HIDE_VAR(size);
 	KUNIT_EXPECT_KASAN_FAIL(test,
 				memset(ptr, 0, size + KASAN_GRANULE_SIZE));
 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr);
 	memset((char *)ptr, 0, 64);
+	OPTIMIZER_HIDE_VAR(ptr);
 	OPTIMIZER_HIDE_VAR(invalid_size);
 	KUNIT_EXPECT_KASAN_FAIL(test,
 		memmove((char *)ptr, (char *)ptr + 4, invalid_size));
 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr);
 	memset((char *)ptr, 0, 64);
+	OPTIMIZER_HIDE_VAR(ptr);
 	KUNIT_EXPECT_KASAN_FAIL(test,
 		memmove((char *)ptr, (char *)ptr + 4, invalid_size));
 	kfree(ptr);
 	ptr = kmalloc(size, GFP_KERNEL | __GFP_ZERO);
 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr);
+	OPTIMIZER_HIDE_VAR(ptr);
 	OPTIMIZER_HIDE_VAR(size);
 	KUNIT_EXPECT_KASAN_FAIL(test,
 		kasan_ptr_result = memchr(ptr, '1', size + 1));
 	KUNIT_ASSERT_NOT_ERR_OR_NULL(test, ptr);
 	memset(arr, 0, sizeof(arr));
+	OPTIMIZER_HIDE_VAR(ptr);
 	OPTIMIZER_HIDE_VAR(size);
 	KUNIT_EXPECT_KASAN_FAIL(test,
 		kasan_int_result = memcmp(ptr, arr, size+1));

mm/memory-failure.c+6−0

 		goto out;
 	}
+	/*
+	 * Pages instantiated by device-dax (not filesystem-dax)
+	 * may be compound pages.
+	 */
+	page = compound_head(page);
 	/*
 	 * Prevent the inode from being freed while we are interrogating
 	 * the address_space, typically this would be handled by

net/bridge/br_vlan.c+5−4

 		    !br_opt_get(br, BROPT_VLAN_STATS_ENABLED)) {
 			if (*state == BR_STATE_FORWARDING) {
 				*state = br_vlan_get_pvid_state(vg);
-				return br_vlan_state_allowed(*state, true);
+				if (!br_vlan_state_allowed(*state, true))
-			} else {
+					goto drop;
-				return true;
 			}
+			return true;
 		}
 	}
 	v = br_vlan_find(vg, *vid);
 			goto out_err;
 		}
 		err = br_vlan_dump_dev(dev, skb, cb, dump_flags);
-		if (err && err != -EMSGSIZE)
+		/* if the dump completed without an error we return 0 here */
+		if (err != -EMSGSIZE)
 			goto out_err;
 	} else {
 		for_each_netdev_rcu(net, dev) {

net/core/net-procfs.c+34−4

 	.show  = softnet_seq_show,
 };
-static void *ptype_get_idx(loff_t pos)
+static void *ptype_get_idx(struct seq_file *seq, loff_t pos)
 {
+	struct list_head *ptype_list = NULL;
 	struct packet_type *pt = NULL;
+	struct net_device *dev;
 	loff_t i = 0;
 	int t;
+	for_each_netdev_rcu(seq_file_net(seq), dev) {
+		ptype_list = &dev->ptype_all;
+		list_for_each_entry_rcu(pt, ptype_list, list) {
+			if (i == pos)
+				return pt;
+			++i;
+		}
+	}
 	list_for_each_entry_rcu(pt, &ptype_all, list) {
 		if (i == pos)
 			return pt;
 	__acquires(RCU)
 {
 	rcu_read_lock();
-	return *pos ? ptype_get_idx(*pos - 1) : SEQ_START_TOKEN;
+	return *pos ? ptype_get_idx(seq, *pos - 1) : SEQ_START_TOKEN;
 }
 static void *ptype_seq_next(struct seq_file *seq, void *v, loff_t *pos)
 {
+	struct net_device *dev;
 	struct packet_type *pt;
 	struct list_head *nxt;
 	int hash;
 	++*pos;
 	if (v == SEQ_START_TOKEN)
-		return ptype_get_idx(0);
+		return ptype_get_idx(seq, 0);
 	pt = v;
 	nxt = pt->list.next;
+	if (pt->dev) {
+		if (nxt != &pt->dev->ptype_all)
+			goto found;
+		dev = pt->dev;
+		for_each_netdev_continue_rcu(seq_file_net(seq), dev) {
+			if (!list_empty(&dev->ptype_all)) {
+				nxt = dev->ptype_all.next;
+				goto found;
+			}
+		}
+		nxt = ptype_all.next;
+		goto ptype_all;
+	}
 	if (pt->type == htons(ETH_P_ALL)) {
+ptype_all:
 		if (nxt != &ptype_all)
 			goto found;
 		hash = 0;
 	if (v == SEQ_START_TOKEN)
 		seq_puts(seq, "Type Device      Function\n");
-	else if (pt->dev == NULL || dev_net(pt->dev) == seq_file_net(seq)) {
+	else if ((!pt->af_packet_net || net_eq(pt->af_packet_net, seq_file_net(seq))) &&
+		 (!pt->dev || net_eq(dev_net(pt->dev), seq_file_net(seq)))) {
 		if (pt->type == htons(ETH_P_ALL))
 			seq_puts(seq, "ALL ");
 		else

net/ipv4/ip_output.c+21−5

 	iph->daddr    = (opt && opt->opt.srr ? opt->opt.faddr : daddr);
 	iph->saddr    = saddr;
 	iph->protocol = sk->sk_protocol;
-	if (ip_dont_fragment(sk, &rt->dst)) {
+	/* Do not bother generating IPID for small packets (eg SYNACK) */
+	if (skb->len <= IPV4_MIN_MTU || ip_dont_fragment(sk, &rt->dst)) {
 		iph->frag_off = htons(IP_DF);
 		iph->id = 0;
 	} else {
 		iph->frag_off = 0;
-		__ip_select_ident(net, iph, 1);
+		/* TCP packets here are SYNACK with fat IPv4/TCP options.
+		 * Avoid using the hashed IP ident generator.
+		 */
+		if (sk->sk_protocol == IPPROTO_TCP)
+			iph->id = (__force __be16)prandom_u32();
+		else
+			__ip_select_ident(net, iph, 1);
 	}
 	if (opt && opt->opt.optlen) {
 		/* Everything is OK. Generate! */
 		ip_fraglist_init(skb, iph, hlen, &iter);
-		if (iter.frag)
-			ip_options_fragment(iter.frag);
 		for (;;) {
 			/* Prepare header of the next frame,
 			 * before previous one went down. */
 			if (iter.frag) {
+				bool first_frag = (iter.offset == 0);
 				IPCB(iter.frag)->flags = IPCB(skb)->flags;
 				ip_fraglist_prepare(skb, &iter);
+				if (first_frag && IPCB(skb)->opt.optlen) {
+					/* ipcb->opt is not populated for frags
+					 * coming from __ip_make_skb(),
+					 * ip_options_fragment() needs optlen
+					 */
+					IPCB(iter.frag)->opt.optlen =
+						IPCB(skb)->opt.optlen;
+					ip_options_fragment(iter.frag);
+					ip_send_check(iter.iph);
+				}
 			}
 			skb->tstamp = tstamp;

net/ipv4/ping.c+2−1

@@ -220,7 +220,8 @@ static struct sock ping_lookup(struct net net, struct sk_buff *skb, u16 ident) · 219 unmodified lines
220	continue;	220	continue;
221	}	221	}
222		222
223	if (sk->sk_bound_dev_if && sk->sk_bound_dev_if != dif)	223	if (sk->sk_bound_dev_if && sk->sk_bound_dev_if != dif &&
		224	sk->sk_bound_dev_if != inet_sdif(skb))
224	continue;	225	continue;
225		226
226	sock_hold(sk);	227	sock_hold(sk);

net/ipv4/raw.c+4−1

 	int ret = -EINVAL;
 	int chk_addr_ret;
+	lock_sock(sk);
 	if (sk->sk_state != TCP_CLOSE || addr_len < sizeof(struct sockaddr_in))
 		goto out;
 		inet->inet_saddr = 0;  /* Use device */
 	sk_dst_reset(sk);
 	ret = 0;
-out:	return ret;
+out:
+	release_sock(sk);
+	return ret;
 }
 /*

net/ipv4/tcp.c+1−0

@@ -842,6 +842,7 @@ ssize_t tcp_splice_read(struct socket sock, loff_t ppos, · 841 unmodified lines
842	}	842	}
843		843
844	release_sock(sk);	844	release_sock(sk);
		845	sk_defer_free_flush(sk);
845		846
846	if (spliced)	847	if (spliced)
847	return spliced;	848	return spliced;

net/ipv4/tcp_ipv4.c+1−1

@@ -2095,7 +2095,7 @@ process: · 2094 unmodified lines
2095	nf_reset_ct(skb);	2095	nf_reset_ct(skb);
2096		2096
2097	if (tcp_filter(sk, skb)) {	2097	if (tcp_filter(sk, skb)) {
2098	drop_reason = SKB_DROP_REASON_TCP_FILTER;	2098	drop_reason = SKB_DROP_REASON_SOCKET_FILTER;
2099	goto discard_and_relse;	2099	goto discard_and_relse;
2100	}	2100	}
2101	th = (const struct tcphdr *)skb->data;	2101	th = (const struct tcphdr *)skb->data;

net/ipv6/addrconf.c+20−7

 				 __u32 valid_lft, u32 prefered_lft)
 {
 	struct inet6_ifaddr *ifp = ipv6_get_ifaddr(net, addr, dev, 1);
-	int create = 0;
+	int create = 0, update_lft = 0;
 	if (!ifp && valid_lft) {
 		int max_addresses = in6_dev->cnf.max_addresses;
 		unsigned long now;
 		u32 stored_lft;
-		/* Update lifetime (RFC4862 5.5.3 e)
+		/* update lifetime (RFC2462 5.5.3 e) */
-		 * We deviate from RFC4862 by honoring all Valid Lifetimes to
-		 * improve the reaction of SLAAC to renumbering events
-		 * (draft-gont-6man-slaac-renum-06, Section 4.2)
-		 */
 		spin_lock_bh(&ifp->lock);
 		now = jiffies;
 		if (ifp->valid_lft > (now - ifp->tstamp) / HZ)
 			stored_lft = ifp->valid_lft - (now - ifp->tstamp) / HZ;
 		else
 			stored_lft = 0;
 		if (!create && stored_lft) {
+			const u32 minimum_lft = min_t(u32,
+				stored_lft, MIN_VALID_LIFETIME);
+			valid_lft = max(valid_lft, minimum_lft);
+			/* RFC4862 Section 5.5.3e:
+			 * "Note that the preferred lifetime of the
+			 *  corresponding address is always reset to
+			 *  the Preferred Lifetime in the received
+			 *  Prefix Information option, regardless of
+			 *  whether the valid lifetime is also reset or
+			 *  ignored."
+			 *
+			 * So we should always update prefered_lft here.
+			 */
+			update_lft = 1;
+		}
+		if (update_lft) {
 			ifp->valid_lft = valid_lft;
 			ifp->prefered_lft = prefered_lft;
 			ifp->tstamp = now;

net/ipv6/ip6_fib.c+13−10

@@ -112,7 +112,7 @@ void fib6_update_sernum(struct net net, struct fib6_info f6i) · 111 unmodified lines
112	fn = rcu_dereference_protected(f6i->fib6_node,	112	fn = rcu_dereference_protected(f6i->fib6_node,
113	lockdep_is_held(&f6i->fib6_table->tb6_lock));	113	lockdep_is_held(&f6i->fib6_table->tb6_lock));
114	if (fn)	114	if (fn)
115	fn->fn_sernum = fib6_new_sernum(net);	115	WRITE_ONCE(fn->fn_sernum, fib6_new_sernum(net));
116	}	116	}
117		117
118	/*	118	/*
@@ -590,12 +590,13 @@ static int fib6_dump_table(struct fib6_table table, struct sk_buff skb, · 471 unmodified lines
590	spin_unlock_bh(&table->tb6_lock);	590	spin_unlock_bh(&table->tb6_lock);
591	if (res > 0) {	591	if (res > 0) {
592	cb->args[4] = 1;	592	cb->args[4] = 1;
593	cb->args[5] = w->root->fn_sernum;	593	cb->args[5] = READ_ONCE(w->root->fn_sernum);
594	}	594	}
595	} else {	595	} else {
596	if (cb->args[5] != w->root->fn_sernum) {	596	int sernum = READ_ONCE(w->root->fn_sernum);
		597	if (cb->args[5] != sernum) {
597	/* Begin at the root if the tree changed */	598	/* Begin at the root if the tree changed */
598	cb->args[5] = w->root->fn_sernum;	599	cb->args[5] = sernum;
599	w->state = FWS_INIT;	600	w->state = FWS_INIT;
600	w->node = w->root;	601	w->node = w->root;
601	w->skip = w->count;	602	w->skip = w->count;
@@ -1345,7 +1346,7 @@ static void __fib6_update_sernum_upto_root(struct fib6_info *rt, · 743 unmodified lines
1345	/* paired with smp_rmb() in fib6_get_cookie_safe() */	1346	/* paired with smp_rmb() in fib6_get_cookie_safe() */
1346	smp_wmb();	1347	smp_wmb();
1347	while (fn) {	1348	while (fn) {
1348	fn->fn_sernum = sernum;	1349	WRITE_ONCE(fn->fn_sernum, sernum);
1349	fn = rcu_dereference_protected(fn->parent,	1350	fn = rcu_dereference_protected(fn->parent,
1350	lockdep_is_held(&rt->fib6_table->tb6_lock));	1351	lockdep_is_held(&rt->fib6_table->tb6_lock));
1351	}	1352	}
@@ -2174,8 +2175,8 @@ static int fib6_clean_node(struct fib6_walker *w) · 822 unmodified lines
2174	};	2175	};
2175		2176
2176	if (c->sernum != FIB6_NO_SERNUM_CHANGE &&	2177	if (c->sernum != FIB6_NO_SERNUM_CHANGE &&
2177	w->node->fn_sernum != c->sernum)	2178	READ_ONCE(w->node->fn_sernum) != c->sernum)
2178	w->node->fn_sernum = c->sernum;	2179	WRITE_ONCE(w->node->fn_sernum, c->sernum);
2179		2180
2180	if (!c->func) {	2181	if (!c->func) {
2181	WARN_ON_ONCE(c->sernum == FIB6_NO_SERNUM_CHANGE);	2182	WARN_ON_ONCE(c->sernum == FIB6_NO_SERNUM_CHANGE);
@@ -2543,7 +2544,7 @@ static void ipv6_route_seq_setup_walk(struct ipv6_route_iter *iter, · 361 unmodified lines
2543	iter->w.state = FWS_INIT;	2544	iter->w.state = FWS_INIT;
2544	iter->w.node = iter->w.root;	2545	iter->w.node = iter->w.root;
2545	iter->w.args = iter;	2546	iter->w.args = iter;
2546	iter->sernum = iter->w.root->fn_sernum;	2547	iter->sernum = READ_ONCE(iter->w.root->fn_sernum);
2547	INIT_LIST_HEAD(&iter->w.lh);	2548	INIT_LIST_HEAD(&iter->w.lh);
2548	fib6_walker_link(net, &iter->w);	2549	fib6_walker_link(net, &iter->w);
2549	}	2550	}
@@ -2571,8 +2572,10 @@ static struct fib6_table ipv6_route_seq_next_table(struct fib6_table tbl, · 21 unmodified lines
2571		2572
2572	static void ipv6_route_check_sernum(struct ipv6_route_iter *iter)	2573	static void ipv6_route_check_sernum(struct ipv6_route_iter *iter)
2573	{	2574	{
2574	if (iter->sernum != iter->w.root->fn_sernum) {	2575	int sernum = READ_ONCE(iter->w.root->fn_sernum);
2575	iter->sernum = iter->w.root->fn_sernum;	2576
		2577	if (iter->sernum != sernum) {
		2578	iter->sernum = sernum;
2576	iter->w.state = FWS_INIT;	2579	iter->w.state = FWS_INIT;
2577	iter->w.node = iter->w.root;	2580	iter->w.node = iter->w.root;
2578	WARN_ON(iter->w.skip);	2581	WARN_ON(iter->w.skip);

net/ipv6/ip6_tunnel.c+4−4

@@ -1036,14 +1036,14 @@ int ip6_tnl_xmit_ctl(struct ip6_tnl *t, · 1035 unmodified lines
1036		1036
1037	if (unlikely(!ipv6_chk_addr_and_flags(net, laddr, ldev, false,	1037	if (unlikely(!ipv6_chk_addr_and_flags(net, laddr, ldev, false,
1038	0, IFA_F_TENTATIVE)))	1038	0, IFA_F_TENTATIVE)))
1039	pr_warn("%s xmit: Local address not yet configured!\n",	1039	pr_warn_ratelimited("%s xmit: Local address not yet configured!\n",
1040	p->name);	1040	p->name);
1041	else if (!(p->flags & IP6_TNL_F_ALLOW_LOCAL_REMOTE) &&	1041	else if (!(p->flags & IP6_TNL_F_ALLOW_LOCAL_REMOTE) &&
1042	!ipv6_addr_is_multicast(raddr) &&	1042	!ipv6_addr_is_multicast(raddr) &&
1043	unlikely(ipv6_chk_addr_and_flags(net, raddr, ldev,	1043	unlikely(ipv6_chk_addr_and_flags(net, raddr, ldev,
1044	true, 0, IFA_F_TENTATIVE)))	1044	true, 0, IFA_F_TENTATIVE)))
1045	pr_warn("%s xmit: Routing loop! Remote address found on this node!\n",	1045	pr_warn_ratelimited("%s xmit: Routing loop! Remote address found on this node!\n",
1046	p->name);	1046	p->name);
1047	else	1047	else
1048	ret = 1;	1048	ret = 1;
1049	rcu_read_unlock();	1049	rcu_read_unlock();

net/ipv6/route.c+1−1

@@ -2802,7 +2802,7 @@ static void ip6_link_failure(struct sk_buff *skb) · 2801 unmodified lines
2802	if (from) {	2802	if (from) {
2803	fn = rcu_dereference(from->fib6_node);	2803	fn = rcu_dereference(from->fib6_node);
2804	if (fn && (rt->rt6i_flags & RTF_DEFAULT))	2804	if (fn && (rt->rt6i_flags & RTF_DEFAULT))
2805	fn->fn_sernum = -1;	2805	WRITE_ONCE(fn->fn_sernum, -1);
2806	}	2806	}
2807	}	2807	}
2808	rcu_read_unlock();	2808	rcu_read_unlock();

net/mptcp/pm_netlink.c+28−11

@@ -478,6 +478,20 @@ __lookup_addr_by_id(struct pm_nl_pernet *pernet, unsigned int id) · 477 unmodified lines
478	return NULL;	478	return NULL;
479	}	479	}
480		480
		481	static struct mptcp_pm_addr_entry *
		482	__lookup_addr(struct pm_nl_pernet pernet, const struct mptcp_addr_info info,
		483	bool lookup_by_id)
		484	{
		485	struct mptcp_pm_addr_entry *entry;
		486
		487	list_for_each_entry(entry, &pernet->local_addr_list, list) {
		488	if ((!lookup_by_id && addresses_equal(&entry->addr, info, true)) \|\|
		489	(lookup_by_id && entry->addr.id == info->id))
		490	return entry;
		491	}
		492	return NULL;
		493	}
		494
481	static int	495	static int
482	lookup_id_by_addr(struct pm_nl_pernet pernet, const struct mptcp_addr_info addr)	496	lookup_id_by_addr(struct pm_nl_pernet pernet, const struct mptcp_addr_info addr)
483	{	497	{
@@ -777,7 +791,7 @@ static void mptcp_pm_nl_rm_addr_or_subflow(struct mptcp_sock *msk, · 293 unmodified lines
777	removed = true;	791	removed = true;
778	__MPTCP_INC_STATS(sock_net(sk), rm_type);	792	__MPTCP_INC_STATS(sock_net(sk), rm_type);
779	}	793	}
780	__set_bit(rm_list->ids[1], msk->pm.id_avail_bitmap);	794	__set_bit(rm_list->ids[i], msk->pm.id_avail_bitmap);
781	if (!removed)	795	if (!removed)
782	continue;	796	continue;
783		797
@@ -1763,18 +1777,21 @@ static int mptcp_nl_cmd_set_flags(struct sk_buff skb, struct genl_info info) · 979 unmodified lines
1763	return -EOPNOTSUPP;	1777	return -EOPNOTSUPP;
1764	}	1778	}
1765		1779
1766	list_for_each_entry(entry, &pernet->local_addr_list, list) {	1780	spin_lock_bh(&pernet->lock);
1767	if ((!lookup_by_id && addresses_equal(&entry->addr, &addr.addr, true)) \|\|	1781	entry = __lookup_addr(pernet, &addr.addr, lookup_by_id);
1768	(lookup_by_id && entry->addr.id == addr.addr.id)) {	1782	if (!entry) {
1769	mptcp_nl_addr_backup(net, &entry->addr, bkup);	1783	spin_unlock_bh(&pernet->lock);
1770		1784	return -EINVAL;
1771	if (bkup)
1772	entry->flags \|= MPTCP_PM_ADDR_FLAG_BACKUP;
1773	else
1774	entry->flags &= ~MPTCP_PM_ADDR_FLAG_BACKUP;
1775	}
1776	}	1785	}
1777		1786
		1787	if (bkup)
		1788	entry->flags \|= MPTCP_PM_ADDR_FLAG_BACKUP;
		1789	else
		1790	entry->flags &= ~MPTCP_PM_ADDR_FLAG_BACKUP;
		1791	addr = *entry;
		1792	spin_unlock_bh(&pernet->lock);
		1793
		1794	mptcp_nl_addr_backup(net, &addr.addr, bkup);
1778	return 0;	1795	return 0;
1779	}	1796	}
1780		1797

net/mptcp/protocol.h+3−3

@@ -408,7 +408,7 @@ DECLARE_PER_CPU(struct mptcp_delegated_action, mptcp_delegated_actions); · 407 unmodified lines
408	struct mptcp_subflow_context {	408	struct mptcp_subflow_context {
409	struct list_head node;/* conn_list of subflows */	409	struct list_head node;/* conn_list of subflows */
410		410
411	char reset_start[0];	411	struct_group(reset,
412		412
413	unsigned long avg_pacing_rate; /* protected by msk socket lock */	413	unsigned long avg_pacing_rate; /* protected by msk socket lock */
414	u64 local_key;	414	u64 local_key;
@@ -458,7 +458,7 @@ struct mptcp_subflow_context { · 43 unmodified lines
458		458
459	long delegated_status;	459	long delegated_status;
460		460
461	char reset_end[0];	461	);
462		462
463	struct list_head delegated_node; /* link into delegated_action, protected by local BH */	463	struct list_head delegated_node; /* link into delegated_action, protected by local BH */
464		464
@@ -494,7 +494,7 @@ mptcp_subflow_tcp_sock(const struct mptcp_subflow_context *subflow) · 29 unmodified lines
494	static inline void	494	static inline void
495	mptcp_subflow_ctx_reset(struct mptcp_subflow_context *subflow)	495	mptcp_subflow_ctx_reset(struct mptcp_subflow_context *subflow)
496	{	496	{
497	memset(subflow->reset_start, 0, subflow->reset_end - subflow->reset_start);	497	memset(&subflow->reset, 0, sizeof(subflow->reset));
498	subflow->request_mptcp = 1;	498	subflow->request_mptcp = 1;
499	}	499	}
500		500

net/netfilter/nf_conntrack_core.c+5−3

 		pr_debug("nf_conntrack_in: Can't track with proto module\n");
 		nf_ct_put(ct);
 		skb->_nfct = 0;
-		NF_CT_STAT_INC_ATOMIC(state->net, invalid);
-		if (ret == -NF_DROP)
-			NF_CT_STAT_INC_ATOMIC(state->net, drop);
 		/* Special case: TCP tracker reports an attempt to reopen a
 		 * closed/aborted connection. We have to go back and create a
 		 * fresh conntrack.
 		 */
 		if (ret == -NF_REPEAT)
 			goto repeat;
+		NF_CT_STAT_INC_ATOMIC(state->net, invalid);
+		if (ret == -NF_DROP)
+			NF_CT_STAT_INC_ATOMIC(state->net, drop);
 		ret = -ret;
 		goto out;
 	}

net/netfilter/nf_conntrack_netbios_ns.c+3−2

 #include <net/netfilter/nf_conntrack_helper.h>
 #include <net/netfilter/nf_conntrack_expect.h>
+#define HELPER_NAME	"netbios-ns"
 #define NMBD_PORT	137
 MODULE_AUTHOR("Patrick McHardy <kaber@trash.net>");
 MODULE_DESCRIPTION("NetBIOS name service broadcast connection tracking helper");
 MODULE_LICENSE("GPL");
 MODULE_ALIAS("ip_conntrack_netbios_ns");
-MODULE_ALIAS_NFCT_HELPER("netbios_ns");
+MODULE_ALIAS_NFCT_HELPER(HELPER_NAME);
 static unsigned int timeout __read_mostly = 3;
 module_param(timeout, uint, 0400);
 }
 static struct nf_conntrack_helper helper __read_mostly = {
-	.name			= "netbios-ns",
+	.name			= HELPER_NAME,
 	.tuple.src.l3num	= NFPROTO_IPV4,
 	.tuple.src.u.udp.port	= cpu_to_be16(NMBD_PORT),
 	.tuple.dst.protonum	= IPPROTO_UDP,

net/netfilter/nf_tables_api.c+1−3

 	void *data, *data_boundary;
 	struct nft_rule_dp *prule;
 	struct nft_rule *rule;
-	int i;
 	/* already handled or inactive chain? */
 	if (chain->blob_next || !nft_is_active_next(net, chain))
 		return 0;
 	rule = list_entry(&chain->rules, struct nft_rule, list);
-	i = 0;
 	data_size = 0;
 	list_for_each_entry_continue(rule, &chain->rules, list) {
 			return -ENOMEM;
 		size = 0;
-		track.last = last;
+		track.last = nft_expr_last(rule);
 		nft_rule_for_each_expr(expr, last, rule) {
 			track.cur = expr;

net/netfilter/nft_connlimit.c+10−1

 {
 	bool invert = false;
 	u32 flags, limit;
+	int err;
 	if (!tb[NFTA_CONNLIMIT_COUNT])
 		return -EINVAL;
 	priv->limit	= limit;
 	priv->invert	= invert;
-	return nf_ct_netns_get(ctx->net, ctx->family);
+	err = nf_ct_netns_get(ctx->net, ctx->family);
+	if (err < 0)
+		goto err_netns;
+	return 0;
+err_netns:
+	kfree(priv->list);
+	return err;
 }
 static void nft_connlimit_do_destroy(const struct nft_ctx *ctx,

net/packet/af_packet.c+2−0

 		match->prot_hook.dev = po->prot_hook.dev;
 		match->prot_hook.func = packet_rcv_fanout;
 		match->prot_hook.af_packet_priv = match;
+		match->prot_hook.af_packet_net = read_pnet(&match->net);
 		match->prot_hook.id_match = match_fanout_group;
 		match->max_num_members = args->max_num_members;
 		list_add(&match->list, &fanout_list);
 		po->prot_hook.func = packet_rcv_spkt;
 	po->prot_hook.af_packet_priv = sk;
+	po->prot_hook.af_packet_net = sock_net(sk);
 	if (proto) {
 		po->prot_hook.type = proto;

net/rxrpc/call_event.c+3−5

 static void rxrpc_resend(struct rxrpc_call *call, unsigned long now_j)
 {
 	struct sk_buff *skb;
-	unsigned long resend_at, rto_j;
+	unsigned long resend_at;
 	rxrpc_seq_t cursor, seq, top;
 	ktime_t now, max_age, oldest, ack_ts;
 	int ix;
 	_enter("{%d,%d}", call->tx_hard_ack, call->tx_top);
-	rto_j = call->peer->rto_j;
 	now = ktime_get_real();
-	max_age = ktime_sub(now, jiffies_to_usecs(rto_j));
+	max_age = ktime_sub(now, jiffies_to_usecs(call->peer->rto_j));
 	spin_lock_bh(&call->lock);
 	}
 	resend_at = nsecs_to_jiffies(ktime_to_ns(ktime_sub(now, oldest)));
-	resend_at += jiffies + rto_j;
+	resend_at += jiffies + rxrpc_get_rto_backoff(call->peer, retrans);
 	WRITE_ONCE(call->resend_at, resend_at);
 	if (unacked)

net/rxrpc/output.c+1−1

@@ -468,7 +468,7 @@ done: · 467 unmodified lines
468	if (call->peer->rtt_count > 1) {	468	if (call->peer->rtt_count > 1) {
469	unsigned long nowj = jiffies, ack_lost_at;	469	unsigned long nowj = jiffies, ack_lost_at;
470		470
471	ack_lost_at = rxrpc_get_rto_backoff(call->peer, retrans);	471	ack_lost_at = rxrpc_get_rto_backoff(call->peer, false);
472	ack_lost_at += nowj;	472	ack_lost_at += nowj;
473	WRITE_ONCE(call->ack_lost_at, ack_lost_at);	473	WRITE_ONCE(call->ack_lost_at, ack_lost_at);
474	rxrpc_reduce_call_timer(call, ack_lost_at, nowj,	474	rxrpc_reduce_call_timer(call, ack_lost_at, nowj,

net/sched/sch_api.c+1−1

@@ -1204,7 +1204,7 @@ static struct Qdisc qdisc_create(struct net_device dev, · 1203 unmodified lines
1204		1204
1205	err = -ENOENT;	1205	err = -ENOENT;
1206	if (!ops) {	1206	if (!ops) {
1207	NL_SET_ERR_MSG(extack, "Specified qdisc not found");	1207	NL_SET_ERR_MSG(extack, "Specified qdisc kind is unknown");
1208	goto err_out;	1208	goto err_out;
1209	}	1209	}
1210		1210

net/sched/sch_htb.c+20−0

@@ -1810,6 +1810,26 @@ static int htb_change_class(struct Qdisc *sch, u32 classid, · 1809 unmodified lines
1810	if (!hopt->rate.rate \|\| !hopt->ceil.rate)	1810	if (!hopt->rate.rate \|\| !hopt->ceil.rate)
1811	goto failure;	1811	goto failure;
1812		1812
		1813	if (q->offload) {
		1814	/* Options not supported by the offload. */
		1815	if (hopt->rate.overhead \|\| hopt->ceil.overhead) {
		1816	NL_SET_ERR_MSG(extack, "HTB offload doesn't support the overhead parameter");
		1817	goto failure;
		1818	}
		1819	if (hopt->rate.mpu \|\| hopt->ceil.mpu) {
		1820	NL_SET_ERR_MSG(extack, "HTB offload doesn't support the mpu parameter");
		1821	goto failure;
		1822	}
		1823	if (hopt->quantum) {
		1824	NL_SET_ERR_MSG(extack, "HTB offload doesn't support the quantum parameter");
		1825	goto failure;
		1826	}
		1827	if (hopt->prio) {
		1828	NL_SET_ERR_MSG(extack, "HTB offload doesn't support the prio parameter");
		1829	goto failure;
		1830	}
		1831	}
		1832
1813	/* Keeping backward compatible with rate_table based iproute2 tc */	1833	/* Keeping backward compatible with rate_table based iproute2 tc */
1814	if (hopt->rate.linklayer == TC_LINKLAYER_UNAWARE)	1834	if (hopt->rate.linklayer == TC_LINKLAYER_UNAWARE)
1815	qdisc_put_rtab(qdisc_get_rtab(&hopt->rate, tb[TCA_HTB_RTAB],	1835	qdisc_put_rtab(qdisc_get_rtab(&hopt->rate, tb[TCA_HTB_RTAB],

net/smc/af_smc.c+51−12

 	mutex_unlock(&net->smc.mutex_fback_rsn);
 }
-static void smc_switch_to_fallback(struct smc_sock *smc, int reason_code)
+static int smc_switch_to_fallback(struct smc_sock *smc, int reason_code)
 {
 	wait_queue_head_t *smc_wait = sk_sleep(&smc->sk);
-	wait_queue_head_t *clc_wait = sk_sleep(smc->clcsock->sk);
+	wait_queue_head_t *clc_wait;
 	unsigned long flags;
+	mutex_lock(&smc->clcsock_release_lock);
+	if (!smc->clcsock) {
+		mutex_unlock(&smc->clcsock_release_lock);
+		return -EBADF;
+	}
 	smc->use_fallback = true;
 	smc->fallback_rsn = reason_code;
 	smc_stat_fallback(smc);
 		 * smc socket->wq, which should be removed
 		 * to clcsocket->wq during the fallback.
 		 */
+		clc_wait = sk_sleep(smc->clcsock->sk);
 		spin_lock_irqsave(&smc_wait->lock, flags);
 		spin_lock_nested(&clc_wait->lock, SINGLE_DEPTH_NESTING);
 		list_splice_init(&smc_wait->head, &clc_wait->head);
 		spin_unlock(&clc_wait->lock);
 		spin_unlock_irqrestore(&smc_wait->lock, flags);
 	}
+	mutex_unlock(&smc->clcsock_release_lock);
+	return 0;
 }
 /* fall back during connect */
 static int smc_connect_fallback(struct smc_sock *smc, int reason_code)
 {
-	smc_switch_to_fallback(smc, reason_code);
+	struct net *net = sock_net(&smc->sk);
+	int rc = 0;
+	rc = smc_switch_to_fallback(smc, reason_code);
+	if (rc) { /* fallback fails */
+		this_cpu_inc(net->smc.smc_stats->clnt_hshake_err_cnt);
+		if (smc->sk.sk_state == SMC_INIT)
+			sock_put(&smc->sk); /* passive closing */
+		return rc;
+	}
 	smc_copy_sock_settings_to_clc(smc);
 	smc->connect_nonblock = 0;
 	if (smc->sk.sk_state == SMC_INIT)
 {
 	/* RDMA setup failed, switch back to TCP */
 	smc_conn_abort(new_smc, local_first);
-	if (reason_code < 0) { /* error, no fallback possible */
+	if (reason_code < 0 ||
+	    smc_switch_to_fallback(new_smc, reason_code)) {
+		/* error, no fallback possible */
 		smc_listen_out_err(new_smc);
 		return;
 	}
-	smc_switch_to_fallback(new_smc, reason_code);
 	if (reason_code && reason_code != SMC_CLC_DECL_PEERDECL) {
 		if (smc_clc_send_decline(new_smc, reason_code, version) < 0) {
 			smc_listen_out_err(new_smc);
 	/* check if peer is smc capable */
 	if (!tcp_sk(newclcsock->sk)->syn_smc) {
-		smc_switch_to_fallback(new_smc, SMC_CLC_DECL_PEERNOSMC);
+		rc = smc_switch_to_fallback(new_smc, SMC_CLC_DECL_PEERNOSMC);
-		smc_listen_out_connected(new_smc);
+		if (rc)
+			smc_listen_out_err(new_smc);
+		else
+			smc_listen_out_connected(new_smc);
 		return;
 	}
 	if (msg->msg_flags & MSG_FASTOPEN) {
 		if (sk->sk_state == SMC_INIT && !smc->connect_nonblock) {
-			smc_switch_to_fallback(smc, SMC_CLC_DECL_OPTUNSUPP);
+			rc = smc_switch_to_fallback(smc, SMC_CLC_DECL_OPTUNSUPP);
+			if (rc)
+				goto out;
 		} else {
 			rc = -EINVAL;
 			goto out;
 	/* generic setsockopts reaching us here always apply to the
 	 * CLC socket
 	 */
+	mutex_lock(&smc->clcsock_release_lock);
+	if (!smc->clcsock) {
+		mutex_unlock(&smc->clcsock_release_lock);
+		return -EBADF;
+	}
 	if (unlikely(!smc->clcsock->ops->setsockopt))
 		rc = -EOPNOTSUPP;
 	else
 		sk->sk_err = smc->clcsock->sk->sk_err;
 		sk_error_report(sk);
 	}
+	mutex_unlock(&smc->clcsock_release_lock);
 	if (optlen < sizeof(int))
 		return -EINVAL;
 	case TCP_FASTOPEN_NO_COOKIE:
 		/* option not supported by SMC */
 		if (sk->sk_state == SMC_INIT && !smc->connect_nonblock) {
-			smc_switch_to_fallback(smc, SMC_CLC_DECL_OPTUNSUPP);
+			rc = smc_switch_to_fallback(smc, SMC_CLC_DECL_OPTUNSUPP);
 		} else {
 			rc = -EINVAL;
 		}
 			  char __user *optval, int __user *optlen)
 {
 	struct smc_sock *smc;
+	int rc;
 	smc = smc_sk(sock->sk);
+	mutex_lock(&smc->clcsock_release_lock);
+	if (!smc->clcsock) {
+		mutex_unlock(&smc->clcsock_release_lock);
+		return -EBADF;
+	}
 	/* socket options apply to the CLC socket */
-	if (unlikely(!smc->clcsock->ops->getsockopt))
+	if (unlikely(!smc->clcsock->ops->getsockopt)) {
+		mutex_unlock(&smc->clcsock_release_lock);
 		return -EOPNOTSUPP;
-	return smc->clcsock->ops->getsockopt(smc->clcsock, level, optname,
+	}
-					     optval, optlen);
+	rc = smc->clcsock->ops->getsockopt(smc->clcsock, level, optname,
+					   optval, optlen);
+	mutex_unlock(&smc->clcsock_release_lock);
+	return rc;
 }
 static int smc_ioctl(struct socket *sock, unsigned int cmd,

net/sunrpc/auth_gss/gss_generic_token.c+2−4

 	if (ret)
 		return ret;
-	if (!ret) {
+	*buf_in = buf;
-		*buf_in = buf;
+	*body_size = toksize;
-		*body_size = toksize;
-	}
 	return ret;
 }

net/sunrpc/clnt.c+4−1

 	unsigned long connect_timeout;
 	unsigned long reconnect_timeout;
 	unsigned char resvport, reuseport;
-	int ret = 0;
+	int ret = 0, ident;
 	rcu_read_lock();
 	xps = xprt_switch_get(rcu_dereference(clnt->cl_xpi.xpi_xpswitch));
 	reuseport = xprt->reuseport;
 	connect_timeout = xprt->connect_timeout;
 	reconnect_timeout = xprt->max_reconnect_timeout;
+	ident = xprt->xprt_class->ident;
 	rcu_read_unlock();
+	if (!xprtargs->ident)
+		xprtargs->ident = ident;
 	xprt = xprt_create_transport(xprtargs);
 	if (IS_ERR(xprt)) {
 		ret = PTR_ERR(xprt);

net/sunrpc/rpc_pipe.c+2−2

 	dget(dentry);
 	ret = simple_rmdir(dir, dentry);
+	d_drop(dentry);
 	if (!ret)
 		fsnotify_rmdir(dir, dentry);
-	d_delete(dentry);
 	dput(dentry);
 	return ret;
 }
 	dget(dentry);
 	ret = simple_unlink(dir, dentry);
+	d_drop(dentry);
 	if (!ret)
 		fsnotify_unlink(dir, dentry);
-	d_delete(dentry);
 	dput(dentry);
 	return ret;
 }

net/sunrpc/sysfs.c+27−20

 		online = 1;
 	else if (!strncmp(buf, "remove", 6))
 		remove = 1;
-	else
+	else {
-		return -EINVAL;
+		count = -EINVAL;
+		goto out_put;
+	}
 	if (wait_on_bit_lock(&xprt->state, XPRT_LOCKED, TASK_KILLABLE)) {
 		count = -EINTR;
 		goto release_tasks;
 	}
 	if (offline) {
-		set_bit(XPRT_OFFLINE, &xprt->state);
+		if (!test_and_set_bit(XPRT_OFFLINE, &xprt->state)) {
-		spin_lock(&xps->xps_lock);
+			spin_lock(&xps->xps_lock);
-		xps->xps_nactive--;
+			xps->xps_nactive--;
-		spin_unlock(&xps->xps_lock);
+			spin_unlock(&xps->xps_lock);
+		}
 	} else if (online) {
-		clear_bit(XPRT_OFFLINE, &xprt->state);
+		if (test_and_clear_bit(XPRT_OFFLINE, &xprt->state)) {
-		spin_lock(&xps->xps_lock);
+			spin_lock(&xps->xps_lock);
-		xps->xps_nactive++;
+			xps->xps_nactive++;
-		spin_unlock(&xps->xps_lock);
+			spin_unlock(&xps->xps_lock);
+		}
 	} else if (remove) {
 		if (test_bit(XPRT_OFFLINE, &xprt->state)) {
-			set_bit(XPRT_REMOVE, &xprt->state);
+			if (!test_and_set_bit(XPRT_REMOVE, &xprt->state)) {
-			xprt_force_disconnect(xprt);
+				xprt_force_disconnect(xprt);
-			if (test_bit(XPRT_CONNECTED, &xprt->state)) {
+				if (test_bit(XPRT_CONNECTED, &xprt->state)) {
-				if (!xprt->sending.qlen &&
+					if (!xprt->sending.qlen &&
-				    !xprt->pending.qlen &&
+					    !xprt->pending.qlen &&
-				    !xprt->backlog.qlen &&
+					    !xprt->backlog.qlen &&
-				    !atomic_long_read(&xprt->queuelen))
+					    !atomic_long_read(&xprt->queuelen))
-					rpc_xprt_switch_remove_xprt(xps, xprt);
+						rpc_xprt_switch_remove_xprt(xps, xprt);
+				}
 			}
 		} else {
 			count = -EINVAL;
 	&rpc_sysfs_xprt_change_state.attr,
 	NULL,
 };
+ATTRIBUTE_GROUPS(rpc_sysfs_xprt);
 static struct kobj_attribute rpc_sysfs_xprt_switch_info =
 	__ATTR(xprt_switch_info, 0444, rpc_sysfs_xprt_switch_info_show, NULL);
 	&rpc_sysfs_xprt_switch_info.attr,
 	NULL,
 };
+ATTRIBUTE_GROUPS(rpc_sysfs_xprt_switch);
 static struct kobj_type rpc_sysfs_client_type = {
 	.release = rpc_sysfs_client_release,
 static struct kobj_type rpc_sysfs_xprt_switch_type = {
 	.release = rpc_sysfs_xprt_switch_release,
-	.default_attrs = rpc_sysfs_xprt_switch_attrs,
+	.default_groups = rpc_sysfs_xprt_switch_groups,
 	.sysfs_ops = &kobj_sysfs_ops,
 	.namespace = rpc_sysfs_xprt_switch_namespace,
 };
 static struct kobj_type rpc_sysfs_xprt_type = {
 	.release = rpc_sysfs_xprt_release,
-	.default_attrs = rpc_sysfs_xprt_attrs,
+	.default_groups = rpc_sysfs_xprt_groups,
 	.sysfs_ops = &kobj_sysfs_ops,
 	.namespace = rpc_sysfs_xprt_namespace,
 };

net/sunrpc/xprtrdma/backchannel.c+0−4

@@ -13,10 +13,6 @@ · 12 unmodified lines
13	#include "xprt_rdma.h"	13	#include "xprt_rdma.h"
14	#include <trace/events/rpcrdma.h>	14	#include <trace/events/rpcrdma.h>
15		15
16	#if IS_ENABLED(CONFIG_SUNRPC_DEBUG)
17	# define RPCDBG_FACILITY RPCDBG_TRANS
18	#endif
19
20	#undef RPCRDMA_BACKCHANNEL_DEBUG	16	#undef RPCRDMA_BACKCHANNEL_DEBUG
21		17
22	/**	18	/**

net/sunrpc/xprtrdma/frwr_ops.c+0−4

 #include "xprt_rdma.h"
 #include <trace/events/rpcrdma.h>
-#if IS_ENABLED(CONFIG_SUNRPC_DEBUG)
-# define RPCDBG_FACILITY	RPCDBG_TRANS
-#endif
 static void frwr_cid_init(struct rpcrdma_ep *ep,
 			  struct rpcrdma_mr *mr)
 {

net/sunrpc/xprtrdma/rpc_rdma.c+0−4

 #include "xprt_rdma.h"
 #include <trace/events/rpcrdma.h>
-#if IS_ENABLED(CONFIG_SUNRPC_DEBUG)
-# define RPCDBG_FACILITY	RPCDBG_TRANS
-#endif
 /* Returns size of largest RPC-over-RDMA header in a Call message
  *
  * The largest Call header contains a full-size Read list and a

net/sunrpc/xprtrdma/transport.c+0−4

 #include "xprt_rdma.h"
 #include <trace/events/rpcrdma.h>
-#if IS_ENABLED(CONFIG_SUNRPC_DEBUG)
-# define RPCDBG_FACILITY	RPCDBG_TRANS
-#endif
 /*
  * tunables
  */

net/sunrpc/xprtrdma/verbs.c+0−23

 #include "xprt_rdma.h"
 #include <trace/events/rpcrdma.h>
-/*
- * Globals/Macros
- */
-#if IS_ENABLED(CONFIG_SUNRPC_DEBUG)
-# define RPCDBG_FACILITY	RPCDBG_TRANS
-#endif
-/*
- * internal functions
- */
 static int rpcrdma_sendctxs_create(struct rpcrdma_xprt *r_xprt);
 static void rpcrdma_sendctxs_destroy(struct rpcrdma_xprt *r_xprt);
 static void rpcrdma_sendctx_put_locked(struct rpcrdma_xprt *r_xprt,
 		ep->re_connect_status = -ENETUNREACH;
 		goto wake_connect_worker;
 	case RDMA_CM_EVENT_REJECTED:
-		dprintk("rpcrdma: connection to %pISpc rejected: %s\n",
-			sap, rdma_reject_msg(id, event->status));
 		ep->re_connect_status = -ECONNREFUSED;
 		if (event->status == IB_CM_REJ_STALE_CONN)
 			ep->re_connect_status = -ENOTCONN;
 		break;
 	}
-	dprintk("RPC:       %s: %pISpc on %s/frwr: %s\n", __func__, sap,
-		ep->re_id->device->name, rdma_event_msg(event->event));
 	return 0;
 }
 	ep->re_attr.qp_type = IB_QPT_RC;
 	ep->re_attr.port_num = ~0;
-	dprintk("RPC:       %s: requested max: dtos: send %d recv %d; "
-		"iovs: send %d recv %d\n",
-		__func__,
-		ep->re_attr.cap.max_send_wr,
-		ep->re_attr.cap.max_recv_wr,
-		ep->re_attr.cap.max_send_sge,
-		ep->re_attr.cap.max_recv_sge);
 	ep->re_send_batch = ep->re_max_requests >> 3;
 	ep->re_send_count = ep->re_send_batch;
 	init_waitqueue_head(&ep->re_connect_wait);

net/sunrpc/xprtsock.c+1−1

@@ -1910,7 +1910,7 @@ static void xs_local_connect(struct rpc_xprt xprt, struct rpc_task task) · 1909 unmodified lines
1910	struct sock_xprt *transport = container_of(xprt, struct sock_xprt, xprt);	1910	struct sock_xprt *transport = container_of(xprt, struct sock_xprt, xprt);
1911	int ret;	1911	int ret;
1912		1912
1913	if (RPC_IS_ASYNC(task)) {	1913	if (RPC_IS_ASYNC(task)) {
1914	/*	1914	/*
1915	* We want the AF_LOCAL connect to be resolved in the	1915	* We want the AF_LOCAL connect to be resolved in the
1916	* filesystem namespace of the process making the rpc	1916	* filesystem namespace of the process making the rpc

scripts/Makefile+1−1

@@ -25,7 +25,7 @@ HOSTCFLAGS_sorttable.o += -I$(srctree)/tools/arch/x86/include · 24 unmodified lines
25	HOSTCFLAGS_sorttable.o += -DUNWINDER_ORC_ENABLED	25	HOSTCFLAGS_sorttable.o += -DUNWINDER_ORC_ENABLED
26	endif	26	endif
27		27
28	ifdef CONFIG_DYNAMIC_FTRACE	28	ifdef CONFIG_BUILDTIME_MCOUNT_SORT
29	HOSTCFLAGS_sorttable.o += -DMCOUNT_SORT_ENABLED	29	HOSTCFLAGS_sorttable.o += -DMCOUNT_SORT_ENABLED
30	endif	30	endif
31		31

security/security.c+13−2

@@ -1048,8 +1048,19 @@ int security_dentry_init_security(struct dentry *dentry, int mode, · 1047 unmodified lines
1048	const char xattr_name, void ctx,	1048	const char xattr_name, void ctx,
1049	u32 *ctxlen)	1049	u32 *ctxlen)
1050	{	1050	{
1051	return call_int_hook(dentry_init_security, -EOPNOTSUPP, dentry, mode,	1051	struct security_hook_list *hp;
1052	name, xattr_name, ctx, ctxlen);	1052	int rc;
		1053
		1054	/*
		1055	* Only one module will provide a security context.
		1056	*/
		1057	hlist_for_each_entry(hp, &security_hook_heads.dentry_init_security, list) {
		1058	rc = hp->hook.dentry_init_security(dentry, mode, name,
		1059	xattr_name, ctx, ctxlen);
		1060	if (rc != LSM_RET_DEFAULT(dentry_init_security))
		1061	return rc;
		1062	}
		1063	return LSM_RET_DEFAULT(dentry_init_security);
1053	}	1064	}
1054	EXPORT_SYMBOL(security_dentry_init_security);	1065	EXPORT_SYMBOL(security_dentry_init_security);
1055		1066

tools/arch/x86/include/uapi/asm/kvm.h+3−0

@@ -452,6 +452,9 @@ struct kvm_sync_regs { · 451 unmodified lines
452		452
453	#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001	453	#define KVM_STATE_VMX_PREEMPTION_TIMER_DEADLINE 0x00000001
454		454
		455	/* attributes for system fd (group 0) */
		456	#define KVM_X86_XCOMP_GUEST_SUPP 0
		457
455	struct kvm_vmx_nested_state_data {	458	struct kvm_vmx_nested_state_data {
456	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];	459	__u8 vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];
457	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];	460	__u8 shadow_vmcs12[KVM_STATE_NESTED_VMX_VMCS_SIZE];

tools/bpf/runqslower/runqslower.bpf.c+1−1

@@ -68,7 +68,7 @@ int handle__sched_switch(u64 *ctx) · 67 unmodified lines
68	*/	68	*/
69	struct task_struct prev = (struct task_struct )ctx[1];	69	struct task_struct prev = (struct task_struct )ctx[1];
70	struct task_struct next = (struct task_struct )ctx[2];	70	struct task_struct next = (struct task_struct )ctx[2];
71	struct event event = {};	71	struct runq_event event = {};
72	u64 *tsp, delta_us;	72	u64 *tsp, delta_us;
73	long state;	73	long state;
74	u32 pid;	74	u32 pid;

tools/bpf/runqslower/runqslower.c+1−1

@@ -100,7 +100,7 @@ static int bump_memlock_rlimit(void) · 99 unmodified lines
100		100
101	void handle_event(void ctx, int cpu, void data, __u32 data_sz)	101	void handle_event(void ctx, int cpu, void data, __u32 data_sz)
102	{	102	{
103	const struct event *e = data;	103	const struct runq_event *e = data;
104	struct tm *tm;	104	struct tm *tm;
105	char ts[32];	105	char ts[32];
106	time_t t;	106	time_t t;

tools/bpf/runqslower/runqslower.h+1−1

@@ -4,7 +4,7 @@ · 3 unmodified lines
4		4
5	#define TASK_COMM_LEN 16	5	#define TASK_COMM_LEN 16
6		6
7	struct event {	7	struct runq_event {
8	char task[TASK_COMM_LEN];	8	char task[TASK_COMM_LEN];
9	__u64 delta_us;	9	__u64 delta_us;
10	pid_t pid;	10	pid_t pid;

tools/include/uapi/linux/kvm.h+1−0

@@ -1133,6 +1133,7 @@ struct kvm_ppc_resize_hpt { · 1132 unmodified lines
1133	#define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206	1133	#define KVM_CAP_VM_MOVE_ENC_CONTEXT_FROM 206
1134	#define KVM_CAP_VM_GPA_BITS 207	1134	#define KVM_CAP_VM_GPA_BITS 207
1135	#define KVM_CAP_XSAVE2 208	1135	#define KVM_CAP_XSAVE2 208
		1136	#define KVM_CAP_SYS_ATTRIBUTES 209
1136		1137
1137	#ifdef KVM_CAP_IRQ_ROUTING	1138	#ifdef KVM_CAP_IRQ_ROUTING
1138		1139

tools/testing/scatterlist/linux/mm.h+2−1

 	      __UNIQUE_ID(min1_), __UNIQUE_ID(min2_),   \
 	      x, y)
-#define preemptible() (1)
+#define pagefault_disabled() (0)
 static inline void *kmap(struct page *page)
 {
 #define kmemleak_free(a)
 #define PageSlab(p) (0)
+#define flush_dcache_page(p)
 #define MAX_ERRNO	4095

tools/testing/selftests/arm64/fp/sve-ptrace.c+9−2

 	}
 	ksft_test_result((sve->flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD,
-			 "Set FPSIMD registers via %s\n", type->name);
+			 "Got FPSIMD registers via %s\n", type->name);
 	if ((sve->flags & SVE_PT_REGS_MASK) != SVE_PT_REGS_FPSIMD)
 		goto out;
 		}
 		/* prctl() flags */
-		ptrace_set_get_inherit(child, &vec_types[i]);
+		if (getauxval(vec_types[i].hwcap_type) & vec_types[i].hwcap) {
+			ptrace_set_get_inherit(child, &vec_types[i]);
+		} else {
+			ksft_test_result_skip("%s SVE_PT_VL_INHERIT set\n",
+					      vec_types[i].name);
+			ksft_test_result_skip("%s SVE_PT_VL_INHERIT cleared\n",
+					      vec_types[i].name);
+		}
 		/* Step through every possible VQ */
 		for (vq = SVE_VQ_MIN; vq <= SVE_VQ_MAX; vq++) {

tools/testing/selftests/kvm/Makefile+1−0

@@ -85,6 +85,7 @@ TEST_GEN_PROGS_x86_64 += x86_64/xen_vmcall_test · 84 unmodified lines
85	TEST_GEN_PROGS_x86_64 += x86_64/vmx_pi_mmio_test	85	TEST_GEN_PROGS_x86_64 += x86_64/vmx_pi_mmio_test
86	TEST_GEN_PROGS_x86_64 += x86_64/sev_migrate_tests	86	TEST_GEN_PROGS_x86_64 += x86_64/sev_migrate_tests
87	TEST_GEN_PROGS_x86_64 += x86_64/amx_test	87	TEST_GEN_PROGS_x86_64 += x86_64/amx_test
		88	TEST_GEN_PROGS_x86_64 += access_tracking_perf_test
88	TEST_GEN_PROGS_x86_64 += demand_paging_test	89	TEST_GEN_PROGS_x86_64 += demand_paging_test
89	TEST_GEN_PROGS_x86_64 += dirty_log_test	90	TEST_GEN_PROGS_x86_64 += dirty_log_test
90	TEST_GEN_PROGS_x86_64 += dirty_log_perf_test	91	TEST_GEN_PROGS_x86_64 += dirty_log_perf_test

tools/testing/selftests/kvm/include/kvm_util_base.h+0−1

@@ -345,7 +345,6 @@ struct kvm_vm *vm_create_with_vcpus(enum vm_guest_mode mode, uint32_t nr_vcpus, · 344 unmodified lines
345	* guest_code - The vCPU's entry point	345	* guest_code - The vCPU's entry point
346	*/	346	*/
347	void vm_vcpu_add_default(struct kvm_vm vm, uint32_t vcpuid, void guest_code);	347	void vm_vcpu_add_default(struct kvm_vm vm, uint32_t vcpuid, void guest_code);
348	void vm_xsave_req_perm(void);
349		348
350	bool vm_is_unrestricted_guest(struct kvm_vm *vm);	349	bool vm_is_unrestricted_guest(struct kvm_vm *vm);
351		350

tools/testing/selftests/kvm/include/x86_64/processor.h+1−0

@@ -458,6 +458,7 @@ uint64_t kvm_hypercall(uint64_t nr, uint64_t a0, uint64_t a1, uint64_t a2, · 457 unmodified lines
458	struct kvm_cpuid2 *kvm_get_supported_hv_cpuid(void);	458	struct kvm_cpuid2 *kvm_get_supported_hv_cpuid(void);
459	void vcpu_set_hv_cpuid(struct kvm_vm *vm, uint32_t vcpuid);	459	void vcpu_set_hv_cpuid(struct kvm_vm *vm, uint32_t vcpuid);
460	struct kvm_cpuid2 vcpu_get_supported_hv_cpuid(struct kvm_vm vm, uint32_t vcpuid);	460	struct kvm_cpuid2 vcpu_get_supported_hv_cpuid(struct kvm_vm vm, uint32_t vcpuid);
		461	void vm_xsave_req_perm(int bit);
461		462
462	enum x86_page_size {	463	enum x86_page_size {
463	X86_PAGE_SIZE_4K = 0,	464	X86_PAGE_SIZE_4K = 0,

tools/testing/selftests/kvm/lib/kvm_util.c+0−7

@@ -393,13 +393,6 @@ struct kvm_vm *vm_create_with_vcpus(enum vm_guest_mode mode, uint32_t nr_vcpus, · 392 unmodified lines
393	struct kvm_vm *vm;	393	struct kvm_vm *vm;
394	int i;	394	int i;
395		395
396	#ifdef __x86_64__
397	/*
398	* Permission needs to be requested before KVM_SET_CPUID2.
399	*/
400	vm_xsave_req_perm();
401	#endif
402
403	/* Force slot0 memory size not small than DEFAULT_GUEST_PHY_PAGES */	396	/* Force slot0 memory size not small than DEFAULT_GUEST_PHY_PAGES */
404	if (slot0_mem_pages < DEFAULT_GUEST_PHY_PAGES)	397	if (slot0_mem_pages < DEFAULT_GUEST_PHY_PAGES)
405	slot0_mem_pages = DEFAULT_GUEST_PHY_PAGES;	398	slot0_mem_pages = DEFAULT_GUEST_PHY_PAGES;

tools/testing/selftests/kvm/lib/x86_64/processor.c+21−6

 	return !!(eax & CPUID_XFD_BIT);
 }
-void vm_xsave_req_perm(void)
+void vm_xsave_req_perm(int bit)
 {
-	unsigned long bitmask;
+	int kvm_fd;
+	u64 bitmask;
 	long rc;
+	struct kvm_device_attr attr = {
+		.group = 0,
+		.attr = KVM_X86_XCOMP_GUEST_SUPP,
+		.addr = (unsigned long) &bitmask
+	};
+	kvm_fd = open_kvm_dev_path_or_exit();
+	rc = ioctl(kvm_fd, KVM_GET_DEVICE_ATTR, &attr);
+	close(kvm_fd);
+	if (rc == -1 && (errno == ENXIO || errno == EINVAL))
+		exit(KSFT_SKIP);
+	TEST_ASSERT(rc == 0, "KVM_GET_DEVICE_ATTR(0, KVM_X86_XCOMP_GUEST_SUPP) error: %ld", rc);
+	if (!(bitmask & (1ULL << bit)))
+		exit(KSFT_SKIP);
 	if (!is_xfd_supported())
-		return;
+		exit(KSFT_SKIP);
+	rc = syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_GUEST_PERM, bit);
-	rc = syscall(SYS_arch_prctl, ARCH_REQ_XCOMP_GUEST_PERM,
-		     XSTATE_XTILE_DATA_BIT);
 	/*
 	 * The older kernel version(<5.15) can't support
 	 * ARCH_REQ_XCOMP_GUEST_PERM and directly return.
 	rc = syscall(SYS_arch_prctl, ARCH_GET_XCOMP_GUEST_PERM, &bitmask);
 	TEST_ASSERT(rc == 0, "prctl(ARCH_GET_XCOMP_GUEST_PERM) error: %ld", rc);
-	TEST_ASSERT(bitmask & XFEATURE_XTILE_MASK,
+	TEST_ASSERT(bitmask & (1ULL << bit),
 		    "prctl(ARCH_REQ_XCOMP_GUEST_PERM) failure bitmask=0x%lx",
 		    bitmask);
 }

tools/testing/selftests/kvm/x86_64/amx_test.c+2−0

@@ -329,6 +329,8 @@ int main(int argc, char *argv[]) · 328 unmodified lines
329	u32 amx_offset;	329	u32 amx_offset;
330	int stage, ret;	330	int stage, ret;
331		331
		332	vm_xsave_req_perm(XSTATE_XTILE_DATA_BIT);
		333
332	/* Create VM */	334	/* Create VM */
333	vm = vm_create_default(VCPU_ID, 0, guest_code);	335	vm = vm_create_default(VCPU_ID, 0, guest_code);
334		336

tools/testing/selftests/kvm/x86_64/smm_test.c+0−1

@@ -105,7 +105,6 @@ static void guest_code(void *arg) · 104 unmodified lines
105		105
106	if (cpu_has_svm()) {	106	if (cpu_has_svm()) {
107	run_guest(svm->vmcb, svm->vmcb_gpa);	107	run_guest(svm->vmcb, svm->vmcb_gpa);
108	svm->vmcb->save.rip += 3;
109	run_guest(svm->vmcb, svm->vmcb_gpa);	108	run_guest(svm->vmcb, svm->vmcb_gpa);
110	} else {	109	} else {
111	vmlaunch();	110	vmlaunch();

tools/testing/selftests/net/ioam6_parser.c+1−4

 		*p += sizeof(__u32);
 	}
-	if (ioam6h->type.bit6) {
+	if (ioam6h->type.bit6)
-		if (__be32_to_cpu(*((__u32 *)*p)) != 0xffffffff)
-			return 1;
 		*p += sizeof(__u32);
-	}
 	if (ioam6h->type.bit7) {
 		if (__be32_to_cpu(*((__u32 *)*p)) != 0xffffffff)

tools/testing/selftests/net/mptcp/mptcp_join.sh+3−2

 		# let $ns2 reach any $ns1 address from any interface
 		ip -net "$ns2" route add default via 10.0.$i.1 dev ns2eth$i metric 10$i
+		ip -net "$ns2" route add default via dead:beef:$i::1 dev ns2eth$i metric 10$i
 	done
 }
 	reset
 	ip netns exec $ns1 ./pm_nl_ctl limits 0 1
 	ip netns exec $ns2 ./pm_nl_ctl limits 0 1
-	ip netns exec $ns2 ./pm_nl_ctl add dead:beef:3::2 flags subflow
+	ip netns exec $ns2 ./pm_nl_ctl add dead:beef:3::2 dev ns2eth3 flags subflow
 	run_tests $ns1 $ns2 dead:beef:1::1 0 0 0 slow
 	chk_join_nr "single subflow IPv6" 1 1 1
 	ip netns exec $ns1 ./pm_nl_ctl limits 0 2
 	ip netns exec $ns1 ./pm_nl_ctl add dead:beef:2::1 flags signal
 	ip netns exec $ns2 ./pm_nl_ctl limits 1 2
-	ip netns exec $ns2 ./pm_nl_ctl add dead:beef:3::2 flags subflow
+	ip netns exec $ns2 ./pm_nl_ctl add dead:beef:3::2 dev ns2eth3 flags subflow
 	run_tests $ns1 $ns2 dead:beef:1::1 0 -1 -1 slow
 	chk_join_nr "remove subflow and signal IPv6" 2 2 2
 	chk_add_nr 1 1

tools/tracing/Makefile+14−4

 # SPDX-License-Identifier: GPL-2.0
 include ../scripts/Makefile.include
-all: latency
+all: latency rtla
-clean: latency_clean
+clean: latency_clean rtla_clean
-install: latency_install
+install: latency_install rtla_install
 latency:
 	$(call descend,latency)
 latency_clean:
 	$(call descend,latency,clean)
-.PHONY: all install clean latency latency_install latency_clean
+rtla:
+	$(call descend,rtla)
+rtla_install:
+	$(call descend,rtla,install)
+rtla_clean:
+	$(call descend,rtla,clean)
+.PHONY: all install clean latency latency_install latency_clean \
+	rtla rtla_install rtla_clean

tools/tracing/rtla/Makefile+1−1

@@ -59,7 +59,7 @@ endif · 58 unmodified lines
59	.PHONY: all	59	.PHONY: all
60	all: rtla	60	all: rtla
61		61
62	rtla: $(OBJ) doc	62	rtla: $(OBJ)
63	$(CC) -o rtla $(LDFLAGS) $(OBJ) $(LIBS)	63	$(CC) -o rtla $(LDFLAGS) $(OBJ) $(LIBS)
64		64
65	static: $(OBJ)	65	static: $(OBJ)

usr/include/Makefile+1−0

@@ -28,6 +28,7 @@ no-header-test += linux/am437x-vpfe.h · 27 unmodified lines
28	no-header-test += linux/android/binder.h	28	no-header-test += linux/android/binder.h
29	no-header-test += linux/android/binderfs.h	29	no-header-test += linux/android/binderfs.h
30	no-header-test += linux/coda.h	30	no-header-test += linux/coda.h
		31	no-header-test += linux/cyclades.h
31	no-header-test += linux/errqueue.h	32	no-header-test += linux/errqueue.h
32	no-header-test += linux/fsmap.h	33	no-header-test += linux/fsmap.h
33	no-header-test += linux/hdlc/ioctl.h	34	no-header-test += linux/hdlc/ioctl.h

virt/kvm/eventfd.c+4−4

@@ -463,8 +463,8 @@ bool kvm_irq_has_notifier(struct kvm *kvm, unsigned irqchip, unsigned pin) · 462 unmodified lines
463	idx = srcu_read_lock(&kvm->irq_srcu);	463	idx = srcu_read_lock(&kvm->irq_srcu);
464	gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);	464	gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
465	if (gsi != -1)	465	if (gsi != -1)
466	hlist_for_each_entry_rcu(kian, &kvm->irq_ack_notifier_list,	466	hlist_for_each_entry_srcu(kian, &kvm->irq_ack_notifier_list,
467	link)	467	link, srcu_read_lock_held(&kvm->irq_srcu))
468	if (kian->gsi == gsi) {	468	if (kian->gsi == gsi) {
469	srcu_read_unlock(&kvm->irq_srcu, idx);	469	srcu_read_unlock(&kvm->irq_srcu, idx);
470	return true;	470	return true;
@@ -480,8 +480,8 @@ void kvm_notify_acked_gsi(struct kvm *kvm, int gsi) · 9 unmodified lines
480	{	480	{
481	struct kvm_irq_ack_notifier *kian;	481	struct kvm_irq_ack_notifier *kian;
482		482
483	hlist_for_each_entry_rcu(kian, &kvm->irq_ack_notifier_list,	483	hlist_for_each_entry_srcu(kian, &kvm->irq_ack_notifier_list,
484	link)	484	link, srcu_read_lock_held(&kvm->irq_srcu))
485	if (kian->gsi == gsi)	485	if (kian->gsi == gsi)
486	kian->irq_acked(kian);	486	kian->irq_acked(kian);
487	}	487	}

virt/kvm/kvm_main.c+3−5

 	return NULL;
 }
-EXPORT_SYMBOL_GPL(kvm_vcpu_gfn_to_memslot);
 bool kvm_is_visible_gfn(struct kvm *kvm, gfn_t gfn)
 {
 }
 static int hva_to_pfn_remapped(struct vm_area_struct *vma,
-			       unsigned long addr, bool *async,
+			       unsigned long addr, bool write_fault,
-			       bool write_fault, bool *writable,
+			       bool *writable, kvm_pfn_t *p_pfn)
-			       kvm_pfn_t *p_pfn)
 {
 	kvm_pfn_t pfn;
 	pte_t *ptep;
 	if (vma == NULL)
 		pfn = KVM_PFN_ERR_FAULT;
 	else if (vma->vm_flags & (VM_IO | VM_PFNMAP)) {
-		r = hva_to_pfn_remapped(vma, addr, async, write_fault, writable, &pfn);
+		r = hva_to_pfn_remapped(vma, addr, write_fault, writable, &pfn);
 		if (r == -EAGAIN)
 			goto retry;
 		if (r < 0)

Merge tag 'v5.17-rc2' into char-misc-next

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@@ -266,6 +266,8 @@ struct nfs_server { · 265 unmodified lines
266	#define NFS_CAP_ACLS (1U << 3)	266	#define NFS_CAP_ACLS (1U << 3)
267	#define NFS_CAP_ATOMIC_OPEN (1U << 4)	267	#define NFS_CAP_ATOMIC_OPEN (1U << 4)
268	#define NFS_CAP_LGOPEN (1U << 5)	268	#define NFS_CAP_LGOPEN (1U << 5)
		269	#define NFS_CAP_CASE_INSENSITIVE (1U << 6)
		270	#define NFS_CAP_CASE_PRESERVING (1U << 7)
269	#define NFS_CAP_POSIX_LOCK (1U << 14)	271	#define NFS_CAP_POSIX_LOCK (1U << 14)
270	#define NFS_CAP_UIDGID_NOMAP (1U << 15)	272	#define NFS_CAP_UIDGID_NOMAP (1U << 15)
271	#define NFS_CAP_STATEID_NFSV41 (1U << 16)	273	#define NFS_CAP_STATEID_NFSV41 (1U << 16)
@@ -282,5 +284,5 @@ struct nfs_server { · 10 unmodified lines
282	#define NFS_CAP_COPY_NOTIFY (1U << 27)	284	#define NFS_CAP_COPY_NOTIFY (1U << 27)
283	#define NFS_CAP_XATTR (1U << 28)	285	#define NFS_CAP_XATTR (1U << 28)
284	#define NFS_CAP_READ_PLUS (1U << 29)	286	#define NFS_CAP_READ_PLUS (1U << 29)
285		287	#define NFS_CAP_FS_LOCATIONS (1U << 30)
286	#endif	288	#endif