* kvm-arm64/psci-1.3: : PSCI v1.3 support, courtesy of David Woodhouse : : Bump KVM's PSCI implementation up to v1.3, with the added bonus of : implementing the SYSTEM_OFF2 call. Like other system-scoped PSCI calls, : this gets relayed to userspace for further processing with a new : KVM_SYSTEM_EVENT_SHUTDOWN flag. : : As an added bonus, implement client-side support for hibernation with : the SYSTEM_OFF2 call. arm64: Use SYSTEM_OFF2 PSCI call to power off for hibernate KVM: arm64: nvhe: Pass through PSCI v1.3 SYSTEM_OFF2 call KVM: selftests: Add test for PSCI SYSTEM_OFF2 KVM: arm64: Add support for PSCI v1.2 and v1.3 KVM: arm64: Add PSCI v1.3 SYSTEM_OFF2 function for hibernation firmware/psci: Add definitions for PSCI v1.3 specification
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| @@ -59,6 +59,7 @@ · 58 unmodified lines | |||
| 59 | #define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) | 59 | #define PSCI_1_1_FN_SYSTEM_RESET2 PSCI_0_2_FN(18) |
| 60 | #define PSCI_1_1_FN_MEM_PROTECT PSCI_0_2_FN(19) | 60 | #define PSCI_1_1_FN_MEM_PROTECT PSCI_0_2_FN(19) |
| 61 | #define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN(20) | 61 | #define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN(20) |
| 62 | #define PSCI_1_3_FN_SYSTEM_OFF2 PSCI_0_2_FN(21) | ||
| 62 | 63 | ||
| 63 | #define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND PSCI_0_2_FN64(12) | 64 | #define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND PSCI_0_2_FN64(12) |
| 64 | #define PSCI_1_0_FN64_NODE_HW_STATE PSCI_0_2_FN64(13) | 65 | #define PSCI_1_0_FN64_NODE_HW_STATE PSCI_0_2_FN64(13) |
| @@ -68,6 +69,7 @@ · 3 unmodified lines | |||
| 68 | 69 | ||
| 69 | #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) | 70 | #define PSCI_1_1_FN64_SYSTEM_RESET2 PSCI_0_2_FN64(18) |
| 70 | #define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN64(20) | 71 | #define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE PSCI_0_2_FN64(20) |
| 72 | #define PSCI_1_3_FN64_SYSTEM_OFF2 PSCI_0_2_FN64(21) | ||
| 71 | 73 | ||
| 72 | /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ | 74 | /* PSCI v0.2 power state encoding for CPU_SUSPEND function */ |
| 73 | #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff | 75 | #define PSCI_0_2_POWER_STATE_ID_MASK 0xffff |
| @@ -100,6 +102,9 @@ · 26 unmodified lines | |||
| 100 | #define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 0 | 102 | #define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 0 |
| 101 | #define PSCI_1_1_RESET_TYPE_VENDOR_START 0x80000000U | 103 | #define PSCI_1_1_RESET_TYPE_VENDOR_START 0x80000000U |
| 102 | 104 | ||
| 105 | /* PSCI v1.3 hibernate type for SYSTEM_OFF2 */ | ||
| 106 | #define PSCI_1_3_OFF_TYPE_HIBERNATE_OFF BIT(0) | ||
| 107 | |||
| 103 | /* PSCI version decoding (independent of PSCI version) */ | 108 | /* PSCI version decoding (independent of PSCI version) */ |
| 104 | #define PSCI_VERSION_MAJOR_SHIFT 16 | 109 | #define PSCI_VERSION_MAJOR_SHIFT 16 |
| 105 | #define PSCI_VERSION_MINOR_MASK \ | 110 | #define PSCI_VERSION_MINOR_MASK \ |