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Merge branches 'arm/allwinner', 'arm/mediatek', 'arm/renesas', 'arm/tegra', 'arm/qcom', 'arm/smmu', 'ppc/pamu', 'x86/amd', 'x86/vt-d' and 'core' into next

Joerg Roedel committed 6 years ago

Commit 7e3c38811 parents 549738f 03c7b78 3c21356 d714aaa 21d3c04 7aaf0b0 0dd4ce6 ce433d0 54ce12e c40aaaa 6278eec46 files · +2372 −939Browse files

Showing the changes to include/uapi/linux (1 of 46 files). Show all

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include/uapi/linux/iommu.h+13−5
@@ -139,6 +139,7 @@ enum iommu_page_response_code { · 138 unmodified lines
139139
140140 /**
141141 * struct iommu_page_response - Generic page response information
142+ * @argsz: User filled size of this data
142143 * @version: API version of this structure
143144 * @flags: encodes whether the corresponding fields are valid
144145 * (IOMMU_FAULT_PAGE_RESPONSE_* values)
@@ -147,6 +148,7 @@ enum iommu_page_response_code { · 2 unmodified lines
147148 * @code: response code from &enum iommu_page_response_code
148149 */
149150 struct iommu_page_response {
151+ __u32 argsz;
150152 #define IOMMU_PAGE_RESP_VERSION_1 1
151153 __u32 version;
152154 #define IOMMU_PAGE_RESP_PASID_VALID (1 << 0)
@@ -222,6 +224,7 @@ struct iommu_inv_pasid_info { · 69 unmodified lines
222224 /**
223225 * struct iommu_cache_invalidate_info - First level/stage invalidation
224226 * information
227+ * @argsz: User filled size of this data
225228 * @version: API version of this structure
226229 * @cache: bitfield that allows to select which caches to invalidate
227230 * @granularity: defines the lowest granularity used for the invalidation:
@@ -250,6 +253,7 @@ struct iommu_inv_pasid_info { · 22 unmodified lines
250253 * must support the used granularity.
251254 */
252255 struct iommu_cache_invalidate_info {
256+ __u32 argsz;
253257 #define IOMMU_CACHE_INVALIDATE_INFO_VERSION_1 1
254258 __u32 version;
255259 /* IOMMU paging structure cache */
@@ -259,11 +263,11 @@ struct iommu_cache_invalidate_info { · 3 unmodified lines
259263 #define IOMMU_CACHE_INV_TYPE_NR (3)
260264 __u8 cache;
261265 __u8 granularity;
262− __u8 padding[2];
266+ __u8 padding[6];
263267 union {
264268 struct iommu_inv_pasid_info pasid_info;
265269 struct iommu_inv_addr_info addr_info;
266− };
270+ } granu;
267271 };
268272
269273 /**
@@ -284,6 +288,7 @@ struct iommu_gpasid_bind_data_vtd { · 14 unmodified lines
284288 #define IOMMU_SVA_VTD_GPASID_PWT (1 << 3) /* page-level write through */
285289 #define IOMMU_SVA_VTD_GPASID_EMTE (1 << 4) /* extended mem type enable */
286290 #define IOMMU_SVA_VTD_GPASID_CD (1 << 5) /* PASID-level cache disable */
291+#define IOMMU_SVA_VTD_GPASID_LAST (1 << 6)
287292 __u64 flags;
288293 __u32 pat;
289294 __u32 emt;
@@ -296,6 +301,7 @@ struct iommu_gpasid_bind_data_vtd { · 6 unmodified lines
296301
297302 /**
298303 * struct iommu_gpasid_bind_data - Information about device and guest PASID binding
304+ * @argsz: User filled size of this data
299305 * @version: Version of this data structure
300306 * @format: PASID table entry format
301307 * @flags: Additional information on guest bind request
@@ -313,21 +319,23 @@ struct iommu_gpasid_bind_data_vtd { · 11 unmodified lines
313319 * PASID to host PASID based on this bind data.
314320 */
315321 struct iommu_gpasid_bind_data {
322+ __u32 argsz;
316323 #define IOMMU_GPASID_BIND_VERSION_1 1
317324 __u32 version;
318325 #define IOMMU_PASID_FORMAT_INTEL_VTD 1
326+#define IOMMU_PASID_FORMAT_LAST 2
319327 __u32 format;
328+ __u32 addr_width;
320329 #define IOMMU_SVA_GPASID_VAL (1 << 0) /* guest PASID valid */
321330 __u64 flags;
322331 __u64 gpgd;
323332 __u64 hpasid;
324333 __u64 gpasid;
325− __u32 addr_width;
326− __u8 padding[12];
334+ __u8 padding[8];
327335 /* Vendor specific data */
328336 union {
329337 struct iommu_gpasid_bind_data_vtd vtd;
330− };
338+ } vendor;
331339 };
332340
333341 #endif /* _UAPI_IOMMU_H */