HSW+ platforms are able to send out HDR Metadata SDP DIP packet as GMP. Hence, extending the support for HDR on DP encoders for the same. v2: Limited to non eDP ports on hsw/bdw and removed it for lspcon as it is done separately (suggested by Ville) v3: Added helper and limited eDP restriction to port A (Ville) v4: Dropped some redundant checks (Ville)
Unified · Split
| @@ -4887,6 +4887,25 @@ bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port) · 4886 unmodified lines | ||
| 4887 | 4887 | return intel_bios_is_port_edp(dev_priv, port); |
| 4888 | 4888 | } |
| 4889 | 4889 | |
| 4890 | +static bool | |
| 4891 | +has_gamut_metadata_dip(struct drm_i915_private *i915, enum port port) | |
| 4892 | +{ | |
| 4893 | + if (intel_bios_is_lspcon_present(i915, port)) | |
| 4894 | + return false; | |
| 4895 | + | |
| 4896 | + if (DISPLAY_VER(i915) >= 11) | |
| 4897 | + return true; | |
| 4898 | + | |
| 4899 | + if (port == PORT_A) | |
| 4900 | + return false; | |
| 4901 | + | |
| 4902 | + if (IS_HASWELL(i915) || IS_BROADWELL(i915) || | |
| 4903 | + DISPLAY_VER(i915) >= 9) | |
| 4904 | + return true; | |
| 4905 | + | |
| 4906 | + return false; | |
| 4907 | +} | |
| 4908 | + | |
| 4890 | 4909 | static void |
| 4891 | 4910 | intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector) |
| 4892 | 4911 | { |
| @@ -4913,7 +4932,7 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect · 20 unmodified lines | ||
| 4913 | 4932 | intel_attach_dp_colorspace_property(connector); |
| 4914 | 4933 | } |
| 4915 | 4934 | |
| 4916 | − if (IS_GEMINILAKE(dev_priv) || DISPLAY_VER(dev_priv) >= 11) | |
| 4935 | + if (has_gamut_metadata_dip(dev_priv, port)) | |
| 4917 | 4936 | drm_object_attach_property(&connector->base, |
| 4918 | 4937 | connector->dev->mode_config.hdr_output_metadata_property, |
| 4919 | 4938 | 0); |