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Merge tag 'amd-drm-fixes-6.19-2026-02-05' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes

amd-drm-fixes-6.19-2026-02-05: amdgpu: - MES 11 old firmware compatibility fix - ASPM fix - DC LUT fixes amdkfd: - Fix possible double deletion of validate list Signed-off-by: Dave Airlie <airlied@redhat.com>

Dave Airlie committed 9 months ago

Commit 7ef92d22 parents cb8455c 6b61a548 files · +62 −39Browse files

Unified · Split

8 files
  1. drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +7 −7
  2. drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c +0 −3
  3. drivers/gpu/drm/amd/amdgpu/mes_v11_0.c +1 −1
  4. drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c +29 −8
  5. drivers/gpu/drm/amd/display/dc/dwb/dcn30/dcn30_cm_common.h +1 −1
  6. drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c +5 −4
  7. drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c +10 −8
  8. drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c +9 −7
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c+7−7
@@ -1920,21 +1920,21 @@ int amdgpu_amdkfd_gpuvm_free_memory_of_gpu( · 1919 unmodified lines
19201920
19211921 /* Make sure restore workers don't access the BO any more */
19221922 mutex_lock(&process_info->lock);
1923− list_del(&mem->validate_list);
1923+ if (!list_empty(&mem->validate_list))
1924+ list_del_init(&mem->validate_list);
19241925 mutex_unlock(&process_info->lock);
19251926
1927+ ret = reserve_bo_and_cond_vms(mem, NULL, BO_VM_ALL, &ctx);
1928+ if (unlikely(ret))
1929+ return ret;
1930+
19261931 /* Cleanup user pages and MMU notifiers */
19271932 if (amdgpu_ttm_tt_get_usermm(mem->bo->tbo.ttm)) {
19281933 amdgpu_hmm_unregister(mem->bo);
1929− mutex_lock(&process_info->notifier_lock);
19301934 amdgpu_hmm_range_free(mem->range);
1931− mutex_unlock(&process_info->notifier_lock);
1935+ mem->range = NULL;
19321936 }
19331937
1934− ret = reserve_bo_and_cond_vms(mem, NULL, BO_VM_ALL, &ctx);
1935− if (unlikely(ret))
1936− return ret;
1937−
19381938 amdgpu_amdkfd_remove_eviction_fence(mem->bo,
19391939 process_info->eviction_fence);
19401940 pr_debug("Release VA 0x%llx - 0x%llx\n", mem->va,
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c+0−3
@@ -2405,9 +2405,6 @@ static int amdgpu_pci_probe(struct pci_dev *pdev, · 2404 unmodified lines
24052405 return -ENODEV;
24062406 }
24072407
2408− if (amdgpu_aspm == -1 && !pcie_aspm_enabled(pdev))
2409− amdgpu_aspm = 0;
2410−
24112408 if (amdgpu_virtual_display ||
24122409 amdgpu_device_asic_has_dc_support(pdev, flags & AMD_ASIC_MASK))
24132410 supports_atomic = true;
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c+1−1
@@ -1671,7 +1671,7 @@ static int mes_v11_0_hw_init(struct amdgpu_ip_block *ip_block) · 1670 unmodified lines
16711671 if (r)
16721672 goto failure;
16731673
1674− if ((adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x50) {
1674+ if ((adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x52) {
16751675 r = mes_v11_0_set_hw_resources_1(&adev->mes);
16761676 if (r) {
16771677 DRM_ERROR("failed mes_v11_0_set_hw_resources_1, r=%d\n", r);
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_cm_common.c+29−8
@@ -105,9 +105,12 @@ void cm_helper_program_gamcor_xfer_func( · 104 unmodified lines
105105 #define NUMBER_REGIONS 32
106106 #define NUMBER_SW_SEGMENTS 16
107107
108−bool cm3_helper_translate_curve_to_hw_format(
109− const struct dc_transfer_func *output_tf,
110− struct pwl_params *lut_params, bool fixpoint)
108+#define DC_LOGGER \
109+ ctx->logger
110+
111+bool cm3_helper_translate_curve_to_hw_format(struct dc_context *ctx,
112+ const struct dc_transfer_func *output_tf,
113+ struct pwl_params *lut_params, bool fixpoint)
111114 {
112115 struct curve_points3 *corner_points;
113116 struct pwl_result_data *rgb_resulted;
@@ -163,6 +166,11 @@ bool cm3_helper_translate_curve_to_hw_format( · 49 unmodified lines
163166 hw_points += (1 << seg_distr[k]);
164167 }
165168
169+ // DCN3+ have 257 pts in lieu of no separate slope registers
170+ // Prior HW had 256 base+slope pairs
171+ // Shaper LUT (i.e. fixpoint == true) is still 256 bases and 256 deltas
172+ hw_points = fixpoint ? (hw_points - 1) : hw_points;
173+
166174 j = 0;
167175 for (k = 0; k < (region_end - region_start); k++) {
168176 increment = NUMBER_SW_SEGMENTS / (1 << seg_distr[k]);
@@ -223,8 +231,6 @@ bool cm3_helper_translate_curve_to_hw_format( · 54 unmodified lines
223231 corner_points[1].green.slope = dc_fixpt_zero;
224232 corner_points[1].blue.slope = dc_fixpt_zero;
225233
226− // DCN3+ have 257 pts in lieu of no separate slope registers
227− // Prior HW had 256 base+slope pairs
228234 lut_params->hw_points_num = hw_points + 1;
229235
230236 k = 0;
@@ -248,6 +254,10 @@ bool cm3_helper_translate_curve_to_hw_format( · 17 unmodified lines
248254 if (fixpoint == true) {
249255 i = 1;
250256 while (i != hw_points + 2) {
257+ uint32_t red_clamp;
258+ uint32_t green_clamp;
259+ uint32_t blue_clamp;
260+
251261 if (i >= hw_points) {
252262 if (dc_fixpt_lt(rgb_plus_1->red, rgb->red))
253263 rgb_plus_1->red = dc_fixpt_add(rgb->red,
@@ -260,9 +270,20 @@ bool cm3_helper_translate_curve_to_hw_format( · 6 unmodified lines
260270 rgb_minus_1->delta_blue);
261271 }
262272
263− rgb->delta_red_reg = dc_fixpt_clamp_u0d10(rgb->delta_red);
264− rgb->delta_green_reg = dc_fixpt_clamp_u0d10(rgb->delta_green);
265− rgb->delta_blue_reg = dc_fixpt_clamp_u0d10(rgb->delta_blue);
273+ rgb->delta_red = dc_fixpt_sub(rgb_plus_1->red, rgb->red);
274+ rgb->delta_green = dc_fixpt_sub(rgb_plus_1->green, rgb->green);
275+ rgb->delta_blue = dc_fixpt_sub(rgb_plus_1->blue, rgb->blue);
276+
277+ red_clamp = dc_fixpt_clamp_u0d14(rgb->delta_red);
278+ green_clamp = dc_fixpt_clamp_u0d14(rgb->delta_green);
279+ blue_clamp = dc_fixpt_clamp_u0d14(rgb->delta_blue);
280+
281+ if (red_clamp >> 10 || green_clamp >> 10 || blue_clamp >> 10)
282+ DC_LOG_ERROR("Losing delta precision while programming shaper LUT.");
283+
284+ rgb->delta_red_reg = red_clamp & 0x3ff;
285+ rgb->delta_green_reg = green_clamp & 0x3ff;
286+ rgb->delta_blue_reg = blue_clamp & 0x3ff;
266287 rgb->red_reg = dc_fixpt_clamp_u0d14(rgb->red);
267288 rgb->green_reg = dc_fixpt_clamp_u0d14(rgb->green);
268289 rgb->blue_reg = dc_fixpt_clamp_u0d14(rgb->blue);
drivers/gpu/drm/amd/display/dc/dwb/dcn30/dcn30_cm_common.h+1−1
@@ -59,7 +59,7 @@ void cm_helper_program_gamcor_xfer_func( · 58 unmodified lines
5959 const struct pwl_params *params,
6060 const struct dcn3_xfer_func_reg *reg);
6161
62−bool cm3_helper_translate_curve_to_hw_format(
62+bool cm3_helper_translate_curve_to_hw_format(struct dc_context *ctx,
6363 const struct dc_transfer_func *output_tf,
6464 struct pwl_params *lut_params, bool fixpoint);
6565
drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_hwseq.c+5−4
@@ -239,7 +239,7 @@ bool dcn30_set_blend_lut( · 238 unmodified lines
239239 if (plane_state->blend_tf.type == TF_TYPE_HWPWL)
240240 blend_lut = &plane_state->blend_tf.pwl;
241241 else if (plane_state->blend_tf.type == TF_TYPE_DISTRIBUTED_POINTS) {
242− result = cm3_helper_translate_curve_to_hw_format(
242+ result = cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
243243 &plane_state->blend_tf, &dpp_base->regamma_params, false);
244244 if (!result)
245245 return result;
@@ -334,8 +334,9 @@ bool dcn30_set_input_transfer_func(struct dc *dc, · 88 unmodified lines
334334 if (plane_state->in_transfer_func.type == TF_TYPE_HWPWL)
335335 params = &plane_state->in_transfer_func.pwl;
336336 else if (plane_state->in_transfer_func.type == TF_TYPE_DISTRIBUTED_POINTS &&
337− cm3_helper_translate_curve_to_hw_format(&plane_state->in_transfer_func,
338− &dpp_base->degamma_params, false))
337+ cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
338+ &plane_state->in_transfer_func,
339+ &dpp_base->degamma_params, false))
339340 params = &dpp_base->degamma_params;
340341
341342 result = dpp_base->funcs->dpp_program_gamcor_lut(dpp_base, params);
@@ -406,7 +407,7 @@ bool dcn30_set_output_transfer_func(struct dc *dc, · 64 unmodified lines
406407 params = &stream->out_transfer_func.pwl;
407408 else if (pipe_ctx->stream->out_transfer_func.type ==
408409 TF_TYPE_DISTRIBUTED_POINTS &&
409− cm3_helper_translate_curve_to_hw_format(
410+ cm3_helper_translate_curve_to_hw_format(stream->ctx,
410411 &stream->out_transfer_func,
411412 &mpc->blender_params, false))
412413 params = &mpc->blender_params;
drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_hwseq.c+10−8
@@ -486,8 +486,9 @@ bool dcn32_set_mcm_luts( · 485 unmodified lines
486486 if (plane_state->blend_tf.type == TF_TYPE_HWPWL)
487487 lut_params = &plane_state->blend_tf.pwl;
488488 else if (plane_state->blend_tf.type == TF_TYPE_DISTRIBUTED_POINTS) {
489− result = cm3_helper_translate_curve_to_hw_format(&plane_state->blend_tf,
490− &dpp_base->regamma_params, false);
489+ result = cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
490+ &plane_state->blend_tf,
491+ &dpp_base->regamma_params, false);
491492 if (!result)
492493 return result;
493494
@@ -501,9 +502,9 @@ bool dcn32_set_mcm_luts( · 7 unmodified lines
501502 lut_params = &plane_state->in_shaper_func.pwl;
502503 else if (plane_state->in_shaper_func.type == TF_TYPE_DISTRIBUTED_POINTS) {
503504 // TODO: dpp_base replace
504− ASSERT(false);
505− cm3_helper_translate_curve_to_hw_format(&plane_state->in_shaper_func,
506− &dpp_base->shaper_params, true);
505+ cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
506+ &plane_state->in_shaper_func,
507+ &dpp_base->shaper_params, true);
507508 lut_params = &dpp_base->shaper_params;
508509 }
509510
@@ -543,8 +544,9 @@ bool dcn32_set_input_transfer_func(struct dc *dc, · 33 unmodified lines
543544 if (plane_state->in_transfer_func.type == TF_TYPE_HWPWL)
544545 params = &plane_state->in_transfer_func.pwl;
545546 else if (plane_state->in_transfer_func.type == TF_TYPE_DISTRIBUTED_POINTS &&
546− cm3_helper_translate_curve_to_hw_format(&plane_state->in_transfer_func,
547− &dpp_base->degamma_params, false))
547+ cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
548+ &plane_state->in_transfer_func,
549+ &dpp_base->degamma_params, false))
548550 params = &dpp_base->degamma_params;
549551
550552 dpp_base->funcs->dpp_program_gamcor_lut(dpp_base, params);
@@ -575,7 +577,7 @@ bool dcn32_set_output_transfer_func(struct dc *dc, · 24 unmodified lines
575577 params = &stream->out_transfer_func.pwl;
576578 else if (pipe_ctx->stream->out_transfer_func.type ==
577579 TF_TYPE_DISTRIBUTED_POINTS &&
578− cm3_helper_translate_curve_to_hw_format(
580+ cm3_helper_translate_curve_to_hw_format(stream->ctx,
579581 &stream->out_transfer_func,
580582 &mpc->blender_params, false))
581583 params = &mpc->blender_params;
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c+9−7
@@ -430,7 +430,7 @@ void dcn401_populate_mcm_luts(struct dc *dc, · 429 unmodified lines
430430 if (mcm_luts.lut1d_func->type == TF_TYPE_HWPWL)
431431 m_lut_params.pwl = &mcm_luts.lut1d_func->pwl;
432432 else if (mcm_luts.lut1d_func->type == TF_TYPE_DISTRIBUTED_POINTS) {
433− rval = cm3_helper_translate_curve_to_hw_format(
433+ rval = cm3_helper_translate_curve_to_hw_format(mpc->ctx,
434434 mcm_luts.lut1d_func,
435435 &dpp_base->regamma_params, false);
436436 m_lut_params.pwl = rval ? &dpp_base->regamma_params : NULL;
@@ -450,7 +450,7 @@ void dcn401_populate_mcm_luts(struct dc *dc, · 13 unmodified lines
450450 m_lut_params.pwl = &mcm_luts.shaper->pwl;
451451 else if (mcm_luts.shaper->type == TF_TYPE_DISTRIBUTED_POINTS) {
452452 ASSERT(false);
453− rval = cm3_helper_translate_curve_to_hw_format(
453+ rval = cm3_helper_translate_curve_to_hw_format(mpc->ctx,
454454 mcm_luts.shaper,
455455 &dpp_base->regamma_params, true);
456456 m_lut_params.pwl = rval ? &dpp_base->regamma_params : NULL;
@@ -627,8 +627,9 @@ bool dcn401_set_mcm_luts(struct pipe_ctx *pipe_ctx, · 170 unmodified lines
627627 if (plane_state->blend_tf.type == TF_TYPE_HWPWL)
628628 lut_params = &plane_state->blend_tf.pwl;
629629 else if (plane_state->blend_tf.type == TF_TYPE_DISTRIBUTED_POINTS) {
630− rval = cm3_helper_translate_curve_to_hw_format(&plane_state->blend_tf,
631− &dpp_base->regamma_params, false);
630+ rval = cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
631+ &plane_state->blend_tf,
632+ &dpp_base->regamma_params, false);
632633 lut_params = rval ? &dpp_base->regamma_params : NULL;
633634 }
634635 result = mpc->funcs->program_1dlut(mpc, lut_params, mpcc_id);
@@ -639,8 +640,9 @@ bool dcn401_set_mcm_luts(struct pipe_ctx *pipe_ctx, · 4 unmodified lines
639640 lut_params = &plane_state->in_shaper_func.pwl;
640641 else if (plane_state->in_shaper_func.type == TF_TYPE_DISTRIBUTED_POINTS) {
641642 // TODO: dpp_base replace
642− rval = cm3_helper_translate_curve_to_hw_format(&plane_state->in_shaper_func,
643− &dpp_base->shaper_params, true);
643+ rval = cm3_helper_translate_curve_to_hw_format(plane_state->ctx,
644+ &plane_state->in_shaper_func,
645+ &dpp_base->shaper_params, true);
644646 lut_params = rval ? &dpp_base->shaper_params : NULL;
645647 }
646648 result &= mpc->funcs->program_shaper(mpc, lut_params, mpcc_id);
@@ -674,7 +676,7 @@ bool dcn401_set_output_transfer_func(struct dc *dc, · 27 unmodified lines
674676 params = &stream->out_transfer_func.pwl;
675677 else if (pipe_ctx->stream->out_transfer_func.type ==
676678 TF_TYPE_DISTRIBUTED_POINTS &&
677− cm3_helper_translate_curve_to_hw_format(
679+ cm3_helper_translate_curve_to_hw_format(stream->ctx,
678680 &stream->out_transfer_func,
679681 &mpc->blender_params, false))
680682 params = &mpc->blender_params;