History

Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux

This series provides some low level updates for mlx5 driver needed for both rdma and netdev trees. 1) Termination flow steering table bits and hardware definitions. 2) Introduce the core dump HW access registers definitions. 3) Refactor and cleans-up VF representors functions handlers. 4) Renames host_params bits to function_changed bits and add the support for eswitch functions change event in the eswitch general case. (for both legacy and switchdev modes). 5) Potential error pointer dereference in error handling

Saeed Mahameed committed 7 years ago

Commit 7fe4d432 parents b4b12b0 869311519 files · +179 −126Browse files

Unified · Split

19 files
  1. drivers/infiniband/hw/mlx5/ib_rep.c +10 −9
  2. drivers/infiniband/hw/mlx5/ib_rep.h +1 −1
  3. drivers/net/ethernet/mellanox/mlx5/core/cmd.c +2 −2
  4. drivers/net/ethernet/mellanox/mlx5/core/ecpf.c +0 −27
  5. drivers/net/ethernet/mellanox/mlx5/core/ecpf.h +0 −4
  6. drivers/net/ethernet/mellanox/mlx5/core/en_rep.c +8 −7
  7. drivers/net/ethernet/mellanox/mlx5/core/en_rep.h +1 −1
  8. drivers/net/ethernet/mellanox/mlx5/core/eq.c +3 −2
  9. drivers/net/ethernet/mellanox/mlx5/core/eswitch.c +30 −2
  10. drivers/net/ethernet/mellanox/mlx5/core/eswitch.h +18 −2
  11. drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +59 −48
  12. drivers/net/ethernet/mellanox/mlx5/core/events.c +2 −2
  13. drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c +3 −0
  14. drivers/net/ethernet/mellanox/mlx5/core/rdma.c +2 −2
  15. include/linux/mlx5/device.h +1 −1
  16. include/linux/mlx5/driver.h +1 −0
  17. include/linux/mlx5/eswitch.h +11 −9
  18. include/linux/mlx5/fs.h +1 −0
  19. include/linux/mlx5/mlx5_ifc.h +26 −7
drivers/infiniband/hw/mlx5/ib_rep.c+10−9
@@ -60,7 +60,7 @@ mlx5_ib_vport_rep_load(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep) · 59 unmodified lines
60 if (!__mlx5_ib_add(ibdev, profile))60 if (!__mlx5_ib_add(ibdev, profile))
61 return -EINVAL;61 return -EINVAL;
62 62
63 rep->rep_if[REP_IB].priv = ibdev;63 rep->rep_data[REP_IB].priv = ibdev;
64 64
65 return 0;65 return 0;
66}66}
@@ -70,13 +70,13 @@ mlx5_ib_vport_rep_unload(struct mlx5_eswitch_rep *rep) · 3 unmodified lines
70{70{
71 struct mlx5_ib_dev *dev;71 struct mlx5_ib_dev *dev;
72 72
73 if (!rep->rep_if[REP_IB].priv ||73 if (!rep->rep_data[REP_IB].priv ||
74 rep->vport != MLX5_VPORT_UPLINK)74 rep->vport != MLX5_VPORT_UPLINK)
75 return;75 return;
76 76
77 dev = mlx5_ib_rep_to_dev(rep);77 dev = mlx5_ib_rep_to_dev(rep);
78 __mlx5_ib_remove(dev, dev->profile, MLX5_IB_STAGE_MAX);78 __mlx5_ib_remove(dev, dev->profile, MLX5_IB_STAGE_MAX);
79 rep->rep_if[REP_IB].priv = NULL;79 rep->rep_data[REP_IB].priv = NULL;
80}80}
81 81
82static void *mlx5_ib_vport_get_proto_dev(struct mlx5_eswitch_rep *rep)82static void *mlx5_ib_vport_get_proto_dev(struct mlx5_eswitch_rep *rep)
@@ -84,16 +84,17 @@ static void *mlx5_ib_vport_get_proto_dev(struct mlx5_eswitch_rep *rep) · 1 unmodified line
84 return mlx5_ib_rep_to_dev(rep);84 return mlx5_ib_rep_to_dev(rep);
85}85}
86 86
87static const struct mlx5_eswitch_rep_ops rep_ops = {
88 .load = mlx5_ib_vport_rep_load,
89 .unload = mlx5_ib_vport_rep_unload,
90 .get_proto_dev = mlx5_ib_vport_get_proto_dev,
91};
92
87void mlx5_ib_register_vport_reps(struct mlx5_core_dev *mdev)93void mlx5_ib_register_vport_reps(struct mlx5_core_dev *mdev)
88{94{
89 struct mlx5_eswitch *esw = mdev->priv.eswitch;95 struct mlx5_eswitch *esw = mdev->priv.eswitch;
90 struct mlx5_eswitch_rep_if rep_if = {};
91
92 rep_if.load = mlx5_ib_vport_rep_load;
93 rep_if.unload = mlx5_ib_vport_rep_unload;
94 rep_if.get_proto_dev = mlx5_ib_vport_get_proto_dev;
95 96
96 mlx5_eswitch_register_vport_reps(esw, &rep_if, REP_IB);97 mlx5_eswitch_register_vport_reps(esw, &rep_ops, REP_IB);
97}98}
98 99
99void mlx5_ib_unregister_vport_reps(struct mlx5_core_dev *mdev)100void mlx5_ib_unregister_vport_reps(struct mlx5_core_dev *mdev)
drivers/infiniband/hw/mlx5/ib_rep.h+1−1
@@ -72,6 +72,6 @@ struct net_device *mlx5_ib_get_rep_netdev(struct mlx5_eswitch *esw, · 71 unmodified lines
72static inline72static inline
73struct mlx5_ib_dev *mlx5_ib_rep_to_dev(struct mlx5_eswitch_rep *rep)73struct mlx5_ib_dev *mlx5_ib_rep_to_dev(struct mlx5_eswitch_rep *rep)
74{74{
75 return (struct mlx5_ib_dev *)rep->rep_if[REP_IB].priv;75 return rep->rep_data[REP_IB].priv;
76}76}
77#endif /* __MLX5_IB_REP_H__ */77#endif /* __MLX5_IB_REP_H__ */
drivers/net/ethernet/mellanox/mlx5/core/cmd.c+2−2
@@ -316,7 +316,7 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, · 315 unmodified lines
316 case MLX5_CMD_OP_DESTROY_GENERAL_OBJECT:316 case MLX5_CMD_OP_DESTROY_GENERAL_OBJECT:
317 case MLX5_CMD_OP_DEALLOC_MEMIC:317 case MLX5_CMD_OP_DEALLOC_MEMIC:
318 case MLX5_CMD_OP_PAGE_FAULT_RESUME:318 case MLX5_CMD_OP_PAGE_FAULT_RESUME:
319 case MLX5_CMD_OP_QUERY_HOST_PARAMS:319 case MLX5_CMD_OP_QUERY_ESW_FUNCTIONS:
320 return MLX5_CMD_STAT_OK;320 return MLX5_CMD_STAT_OK;
321 321
322 case MLX5_CMD_OP_QUERY_HCA_CAP:322 case MLX5_CMD_OP_QUERY_HCA_CAP:
@@ -628,7 +628,7 @@ const char *mlx5_command_str(int command) · 305 unmodified lines
628 MLX5_COMMAND_STR_CASE(QUERY_MODIFY_HEADER_CONTEXT);628 MLX5_COMMAND_STR_CASE(QUERY_MODIFY_HEADER_CONTEXT);
629 MLX5_COMMAND_STR_CASE(ALLOC_MEMIC);629 MLX5_COMMAND_STR_CASE(ALLOC_MEMIC);
630 MLX5_COMMAND_STR_CASE(DEALLOC_MEMIC);630 MLX5_COMMAND_STR_CASE(DEALLOC_MEMIC);
631 MLX5_COMMAND_STR_CASE(QUERY_HOST_PARAMS);631 MLX5_COMMAND_STR_CASE(QUERY_ESW_FUNCTIONS);
632 default: return "unknown command opcode";632 default: return "unknown command opcode";
633 }633 }
634}634}
drivers/net/ethernet/mellanox/mlx5/core/ecpf.c+0−27
@@ -83,30 +83,3 @@ void mlx5_ec_cleanup(struct mlx5_core_dev *dev) · 82 unmodified lines
83 83
84 mlx5_peer_pf_cleanup(dev);84 mlx5_peer_pf_cleanup(dev);
85}85}
86
87static int mlx5_query_host_params_context(struct mlx5_core_dev *dev,
88 u32 *out, int outlen)
89{
90 u32 in[MLX5_ST_SZ_DW(query_host_params_in)] = {};
91
92 MLX5_SET(query_host_params_in, in, opcode,
93 MLX5_CMD_OP_QUERY_HOST_PARAMS);
94
95 return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
96}
97
98int mlx5_query_host_params_num_vfs(struct mlx5_core_dev *dev, int *num_vf)
99{
100 u32 out[MLX5_ST_SZ_DW(query_host_params_out)] = {};
101 int err;
102
103 err = mlx5_query_host_params_context(dev, out, sizeof(out));
104 if (err)
105 return err;
106
107 *num_vf = MLX5_GET(query_host_params_out, out,
108 host_params_context.host_num_of_vfs);
109 mlx5_core_dbg(dev, "host_num_of_vfs %d\n", *num_vf);
110
111 return 0;
112}
drivers/net/ethernet/mellanox/mlx5/core/ecpf.h+0−4
@@ -16,7 +16,6 @@ enum { · 15 unmodified lines
16bool mlx5_read_embedded_cpu(struct mlx5_core_dev *dev);16bool mlx5_read_embedded_cpu(struct mlx5_core_dev *dev);
17int mlx5_ec_init(struct mlx5_core_dev *dev);17int mlx5_ec_init(struct mlx5_core_dev *dev);
18void mlx5_ec_cleanup(struct mlx5_core_dev *dev);18void mlx5_ec_cleanup(struct mlx5_core_dev *dev);
19int mlx5_query_host_params_num_vfs(struct mlx5_core_dev *dev, int *num_vf);
20 19
21#else /* CONFIG_MLX5_ESWITCH */20#else /* CONFIG_MLX5_ESWITCH */
22 21
@@ -24,9 +23,6 @@ static inline bool · 1 unmodified line
24mlx5_read_embedded_cpu(struct mlx5_core_dev *dev) { return false; }23mlx5_read_embedded_cpu(struct mlx5_core_dev *dev) { return false; }
25static inline int mlx5_ec_init(struct mlx5_core_dev *dev) { return 0; }24static inline int mlx5_ec_init(struct mlx5_core_dev *dev) { return 0; }
26static inline void mlx5_ec_cleanup(struct mlx5_core_dev *dev) {}25static inline void mlx5_ec_cleanup(struct mlx5_core_dev *dev) {}
27static inline int
28mlx5_query_host_params_num_vfs(struct mlx5_core_dev *dev, int *num_vf)
29{ return -EOPNOTSUPP; }
30 26
31#endif /* CONFIG_MLX5_ESWITCH */27#endif /* CONFIG_MLX5_ESWITCH */
32 28
drivers/net/ethernet/mellanox/mlx5/core/en_rep.c+8−7
@@ -1769,7 +1769,7 @@ mlx5e_vport_rep_load(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep) · 1768 unmodified lines
1769 }1769 }
1770 1770
1771 rpriv->netdev = netdev;1771 rpriv->netdev = netdev;
1772 rep->rep_if[REP_ETH].priv = rpriv;1772 rep->rep_data[REP_ETH].priv = rpriv;
1773 INIT_LIST_HEAD(&rpriv->vport_sqs_list);1773 INIT_LIST_HEAD(&rpriv->vport_sqs_list);
1774 1774
1775 if (rep->vport == MLX5_VPORT_UPLINK) {1775 if (rep->vport == MLX5_VPORT_UPLINK) {
@@ -1843,16 +1843,17 @@ static void *mlx5e_vport_rep_get_proto_dev(struct mlx5_eswitch_rep *rep) · 67 unmodified lines
1843 return rpriv->netdev;1843 return rpriv->netdev;
1844}1844}
1845 1845
1846static const struct mlx5_eswitch_rep_ops rep_ops = {
1847 .load = mlx5e_vport_rep_load,
1848 .unload = mlx5e_vport_rep_unload,
1849 .get_proto_dev = mlx5e_vport_rep_get_proto_dev
1850};
1851
1846void mlx5e_rep_register_vport_reps(struct mlx5_core_dev *mdev)1852void mlx5e_rep_register_vport_reps(struct mlx5_core_dev *mdev)
1847{1853{
1848 struct mlx5_eswitch *esw = mdev->priv.eswitch;1854 struct mlx5_eswitch *esw = mdev->priv.eswitch;
1849 struct mlx5_eswitch_rep_if rep_if = {};
1850
1851 rep_if.load = mlx5e_vport_rep_load;
1852 rep_if.unload = mlx5e_vport_rep_unload;
1853 rep_if.get_proto_dev = mlx5e_vport_rep_get_proto_dev;
1854 1855
1855 mlx5_eswitch_register_vport_reps(esw, &rep_if, REP_ETH);1856 mlx5_eswitch_register_vport_reps(esw, &rep_ops, REP_ETH);
1856}1857}
1857 1858
1858void mlx5e_rep_unregister_vport_reps(struct mlx5_core_dev *mdev)1859void mlx5e_rep_unregister_vport_reps(struct mlx5_core_dev *mdev)
drivers/net/ethernet/mellanox/mlx5/core/en_rep.h+1−1
@@ -91,7 +91,7 @@ struct mlx5e_rep_priv { · 90 unmodified lines
91static inline91static inline
92struct mlx5e_rep_priv *mlx5e_rep_to_rep_priv(struct mlx5_eswitch_rep *rep)92struct mlx5e_rep_priv *mlx5e_rep_to_rep_priv(struct mlx5_eswitch_rep *rep)
93{93{
94 return (struct mlx5e_rep_priv *)rep->rep_if[REP_ETH].priv;94 return rep->rep_data[REP_ETH].priv;
95}95}
96 96
97struct mlx5e_neigh {97struct mlx5e_neigh {
drivers/net/ethernet/mellanox/mlx5/core/eq.c+3−2
@@ -533,8 +533,9 @@ static u64 gather_async_events_mask(struct mlx5_core_dev *dev) · 532 unmodified lines
533 if (MLX5_CAP_GEN(dev, max_num_of_monitor_counters))533 if (MLX5_CAP_GEN(dev, max_num_of_monitor_counters))
534 async_event_mask |= (1ull << MLX5_EVENT_TYPE_MONITOR_COUNTER);534 async_event_mask |= (1ull << MLX5_EVENT_TYPE_MONITOR_COUNTER);
535 535
536 if (mlx5_core_is_ecpf_esw_manager(dev))536 if (mlx5_eswitch_is_funcs_handler(dev))
537 async_event_mask |= (1ull << MLX5_EVENT_TYPE_HOST_PARAMS_CHANGE);537 async_event_mask |=
538 (1ull << MLX5_EVENT_TYPE_ESW_FUNCTIONS_CHANGED);
538 539
539 return async_event_mask;540 return async_event_mask;
540}541}
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c+30−2
@@ -1686,13 +1686,41 @@ static int eswitch_vport_event(struct notifier_block *nb, · 1685 unmodified lines
1686 return NOTIFY_OK;1686 return NOTIFY_OK;
1687}1687}
1688 1688
1689static int query_esw_functions(struct mlx5_core_dev *dev,
1690 u32 *out, int outlen)
1691{
1692 u32 in[MLX5_ST_SZ_DW(query_esw_functions_in)] = {0};
1693
1694 MLX5_SET(query_esw_functions_in, in, opcode,
1695 MLX5_CMD_OP_QUERY_ESW_FUNCTIONS);
1696
1697 return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
1698}
1699
1700int mlx5_esw_query_functions(struct mlx5_core_dev *dev, u16 *num_vfs)
1701{
1702 u32 out[MLX5_ST_SZ_DW(query_esw_functions_out)] = {0};
1703 int err;
1704
1705 err = query_esw_functions(dev, out, sizeof(out));
1706 if (err)
1707 return err;
1708
1709 *num_vfs = MLX5_GET(query_esw_functions_out, out,
1710 host_params_context.host_num_of_vfs);
1711 esw_debug(dev, "host_num_of_vfs=%d\n", *num_vfs);
1712
1713 return 0;
1714}
1715
1689/* Public E-Switch API */1716/* Public E-Switch API */
1690#define ESW_ALLOWED(esw) ((esw) && MLX5_ESWITCH_MANAGER((esw)->dev))1717#define ESW_ALLOWED(esw) ((esw) && MLX5_ESWITCH_MANAGER((esw)->dev))
1691 1718
1692int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)1719int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode)
1693{1720{
1694 int vf_nvports = 0, total_nvports = 0;
1695 struct mlx5_vport *vport;1721 struct mlx5_vport *vport;
1722 int total_nvports = 0;
1723 u16 vf_nvports = 0;
1696 int err;1724 int err;
1697 int i, enabled_events;1725 int i, enabled_events;
1698 1726
@@ -1712,7 +1740,7 @@ int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode) · 13 unmodified lines
1712 1740
1713 if (mode == SRIOV_OFFLOADS) {1741 if (mode == SRIOV_OFFLOADS) {
1714 if (mlx5_core_is_ecpf_esw_manager(esw->dev)) {1742 if (mlx5_core_is_ecpf_esw_manager(esw->dev)) {
1715 err = mlx5_query_host_params_num_vfs(esw->dev, &vf_nvports);1743 err = mlx5_esw_query_functions(esw->dev, &vf_nvports);
1716 if (err)1744 if (err)
1717 return err;1745 return err;
1718 total_nvports = esw->total_vports;1746 total_nvports = esw->total_vports;
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h+18−2
@@ -173,6 +173,7 @@ struct mlx5_esw_offload { · 172 unmodified lines
173 struct mutex peer_mutex;173 struct mutex peer_mutex;
174 DECLARE_HASHTABLE(encap_tbl, 8);174 DECLARE_HASHTABLE(encap_tbl, 8);
175 DECLARE_HASHTABLE(mod_hdr_tbl, 8);175 DECLARE_HASHTABLE(mod_hdr_tbl, 8);
176 const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES];
176 u8 inline_mode;177 u8 inline_mode;
177 u64 num_flows;178 u64 num_flows;
178 u8 encap;179 u8 encap;
@@ -190,7 +191,7 @@ struct mlx5_host_work { · 11 unmodified lines
190 struct mlx5_eswitch *esw;191 struct mlx5_eswitch *esw;
191};192};
192 193
193struct mlx5_host_info {194struct mlx5_esw_functions {
194 struct mlx5_nb nb;195 struct mlx5_nb nb;
195 u16 num_vfs;196 u16 num_vfs;
196};197};
@@ -219,7 +220,7 @@ struct mlx5_eswitch { · 22 unmodified lines
219 int mode;220 int mode;
220 int nvports;221 int nvports;
221 u16 manager_vport;222 u16 manager_vport;
222 struct mlx5_host_info host_info;223 struct mlx5_esw_functions esw_funcs;
223};224};
224 225
225void esw_offloads_cleanup(struct mlx5_eswitch *esw);226void esw_offloads_cleanup(struct mlx5_eswitch *esw);
@@ -386,6 +387,8 @@ bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, · 160 unmodified lines
386bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,387bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
387 struct mlx5_core_dev *dev1);388 struct mlx5_core_dev *dev1);
388 389
390int mlx5_esw_query_functions(struct mlx5_core_dev *dev, u16 *num_vfs);
391
389#define MLX5_DEBUG_ESWITCH_MASK BIT(3)392#define MLX5_DEBUG_ESWITCH_MASK BIT(3)
390 393
391#define esw_info(__dev, format, ...) \394#define esw_info(__dev, format, ...) \
@@ -404,6 +407,18 @@ static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev) · 12 unmodified lines
404 MLX5_VPORT_ECPF : MLX5_VPORT_PF;407 MLX5_VPORT_ECPF : MLX5_VPORT_PF;
405}408}
406 409
410static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev)
411{
412 /* Ideally device should have the functions changed supported
413 * capability regardless of it being ECPF or PF wherever such
414 * event should be processed such as on eswitch manager device.
415 * However, some ECPF based device might not have this capability
416 * set. Hence OR for ECPF check to cover such device.
417 */
418 return MLX5_CAP_ESW(dev, esw_functions_changed) ||
419 mlx5_core_is_ecpf_esw_manager(dev);
420}
421
407static inline int mlx5_eswitch_uplink_idx(struct mlx5_eswitch *esw)422static inline int mlx5_eswitch_uplink_idx(struct mlx5_eswitch *esw)
408{423{
409 /* Uplink always locate at the last element of the array.*/424 /* Uplink always locate at the last element of the array.*/
@@ -498,6 +513,7 @@ static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {} · 88 unmodified lines
498static inline int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode) { return 0; }513static inline int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode) { return 0; }
499static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw) {}514static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw) {}
500static inline bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1) { return true; }515static inline bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1) { return true; }
516static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
501 517
502#define FDB_MAX_CHAIN 1518#define FDB_MAX_CHAIN 1
503#define FDB_SLOW_PATH_CHAIN (FDB_MAX_CHAIN + 1)519#define FDB_SLOW_PATH_CHAIN (FDB_MAX_CHAIN + 1)
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+59−48
@@ -41,7 +41,6 @@ · 40 unmodified lines
41#include "en.h"41#include "en.h"
42#include "fs_core.h"42#include "fs_core.h"
43#include "lib/devcom.h"43#include "lib/devcom.h"
44#include "ecpf.h"
45#include "lib/eq.h"44#include "lib/eq.h"
46 45
47/* There are two match-all miss flows, one for unicast dst mac and46/* There are two match-all miss flows, one for unicast dst mac and
@@ -333,7 +332,7 @@ static int esw_set_global_vlan_pop(struct mlx5_eswitch *esw, u8 val) · 285 unmodified lines
333 esw_debug(esw->dev, "%s applying global %s policy\n", __func__, val ? "pop" : "none");332 esw_debug(esw->dev, "%s applying global %s policy\n", __func__, val ? "pop" : "none");
334 for (vf_vport = 1; vf_vport < esw->enabled_vports; vf_vport++) {333 for (vf_vport = 1; vf_vport < esw->enabled_vports; vf_vport++) {
335 rep = &esw->offloads.vport_reps[vf_vport];334 rep = &esw->offloads.vport_reps[vf_vport];
336 if (atomic_read(&rep->rep_if[REP_ETH].state) != REP_LOADED)335 if (atomic_read(&rep->rep_data[REP_ETH].state) != REP_LOADED)
337 continue;336 continue;
338 337
339 err = __mlx5_eswitch_set_vport_vlan(esw, rep->vport, 0, 0, val);338 err = __mlx5_eswitch_set_vport_vlan(esw, rep->vport, 0, 0, val);
@@ -1278,7 +1277,7 @@ int esw_offloads_init_reps(struct mlx5_eswitch *esw) · 938 unmodified lines
1278 ether_addr_copy(rep->hw_id, hw_id);1277 ether_addr_copy(rep->hw_id, hw_id);
1279 1278
1280 for (rep_type = 0; rep_type < NUM_REP_TYPES; rep_type++)1279 for (rep_type = 0; rep_type < NUM_REP_TYPES; rep_type++)
1281 atomic_set(&rep->rep_if[rep_type].state,1280 atomic_set(&rep->rep_data[rep_type].state,
1282 REP_UNREGISTERED);1281 REP_UNREGISTERED);
1283 }1282 }
1284 1283
@@ -1288,9 +1287,9 @@ int esw_offloads_init_reps(struct mlx5_eswitch *esw) · 3 unmodified lines
1288static void __esw_offloads_unload_rep(struct mlx5_eswitch *esw,1287static void __esw_offloads_unload_rep(struct mlx5_eswitch *esw,
1289 struct mlx5_eswitch_rep *rep, u8 rep_type)1288 struct mlx5_eswitch_rep *rep, u8 rep_type)
1290{1289{
1291 if (atomic_cmpxchg(&rep->rep_if[rep_type].state,1290 if (atomic_cmpxchg(&rep->rep_data[rep_type].state,
1292 REP_LOADED, REP_REGISTERED) == REP_LOADED)1291 REP_LOADED, REP_REGISTERED) == REP_LOADED)
1293 rep->rep_if[rep_type].unload(rep);1292 esw->offloads.rep_ops[rep_type]->unload(rep);
1294}1293}
1295 1294
1296static void __unload_reps_special_vport(struct mlx5_eswitch *esw, u8 rep_type)1295static void __unload_reps_special_vport(struct mlx5_eswitch *esw, u8 rep_type)
@@ -1351,11 +1350,11 @@ static int __esw_offloads_load_rep(struct mlx5_eswitch *esw, · 54 unmodified lines
1351{1350{
1352 int err = 0;1351 int err = 0;
1353 1352
1354 if (atomic_cmpxchg(&rep->rep_if[rep_type].state,1353 if (atomic_cmpxchg(&rep->rep_data[rep_type].state,
1355 REP_REGISTERED, REP_LOADED) == REP_REGISTERED) {1354 REP_REGISTERED, REP_LOADED) == REP_REGISTERED) {
1356 err = rep->rep_if[rep_type].load(esw->dev, rep);1355 err = esw->offloads.rep_ops[rep_type]->load(esw->dev, rep);
1357 if (err)1356 if (err)
1358 atomic_set(&rep->rep_if[rep_type].state,1357 atomic_set(&rep->rep_data[rep_type].state,
1359 REP_REGISTERED);1358 REP_REGISTERED);
1360 }1359 }
1361 1360
@@ -1784,57 +1783,79 @@ static void esw_offloads_steering_cleanup(struct mlx5_eswitch *esw) · 422 unmodified lines
1784 esw_prio_tag_acls_cleanup(esw);1783 esw_prio_tag_acls_cleanup(esw);
1785}1784}
1786 1785
1787static void esw_host_params_event_handler(struct work_struct *work)1786static void esw_functions_changed_event_handler(struct work_struct *work)
1788{1787{
1789 struct mlx5_host_work *host_work;1788 struct mlx5_host_work *host_work;
1790 struct mlx5_eswitch *esw;1789 struct mlx5_eswitch *esw;
1791 int err, num_vf = 0;1790 u16 num_vfs = 0;
1791 int err;
1792 1792
1793 host_work = container_of(work, struct mlx5_host_work, work);1793 host_work = container_of(work, struct mlx5_host_work, work);
1794 esw = host_work->esw;1794 esw = host_work->esw;
1795 1795
1796 err = mlx5_query_host_params_num_vfs(esw->dev, &num_vf);1796 err = mlx5_esw_query_functions(esw->dev, &num_vfs);
1797 if (err || num_vf == esw->host_info.num_vfs)1797 if (err || num_vfs == esw->esw_funcs.num_vfs)
1798 goto out;1798 goto out;
1799 1799
1800 /* Number of VFs can only change from "0 to x" or "x to 0". */1800 /* Number of VFs can only change from "0 to x" or "x to 0". */
1801 if (esw->host_info.num_vfs > 0) {1801 if (esw->esw_funcs.num_vfs > 0) {
1802 esw_offloads_unload_vf_reps(esw, esw->host_info.num_vfs);1802 esw_offloads_unload_vf_reps(esw, esw->esw_funcs.num_vfs);
1803 } else {1803 } else {
1804 err = esw_offloads_load_vf_reps(esw, num_vf);1804 err = esw_offloads_load_vf_reps(esw, num_vfs);
1805 1805
1806 if (err)1806 if (err)
1807 goto out;1807 goto out;
1808 }1808 }
1809 1809
1810 esw->host_info.num_vfs = num_vf;1810 esw->esw_funcs.num_vfs = num_vfs;
1811 1811
1812out:1812out:
1813 kfree(host_work);1813 kfree(host_work);
1814}1814}
1815 1815
1816static int esw_host_params_event(struct notifier_block *nb,1816static int esw_functions_changed_event(struct notifier_block *nb,
1817 unsigned long type, void *data)1817 unsigned long type, void *data)
1818{1818{
1819 struct mlx5_esw_functions *esw_funcs;
1819 struct mlx5_host_work *host_work;1820 struct mlx5_host_work *host_work;
1820 struct mlx5_host_info *host_info;
1821 struct mlx5_eswitch *esw;1821 struct mlx5_eswitch *esw;
1822 1822
1823 host_work = kzalloc(sizeof(*host_work), GFP_ATOMIC);1823 host_work = kzalloc(sizeof(*host_work), GFP_ATOMIC);
1824 if (!host_work)1824 if (!host_work)
1825 return NOTIFY_DONE;1825 return NOTIFY_DONE;
1826 1826
1827 host_info = mlx5_nb_cof(nb, struct mlx5_host_info, nb);1827 esw_funcs = mlx5_nb_cof(nb, struct mlx5_esw_functions, nb);
1828 esw = container_of(host_info, struct mlx5_eswitch, host_info);1828 esw = container_of(esw_funcs, struct mlx5_eswitch, esw_funcs);
1829 1829
1830 host_work->esw = esw;1830 host_work->esw = esw;
1831 1831
1832 INIT_WORK(&host_work->work, esw_host_params_event_handler);1832 INIT_WORK(&host_work->work, esw_functions_changed_event_handler);
1833 queue_work(esw->work_queue, &host_work->work);1833 queue_work(esw->work_queue, &host_work->work);
1834 1834
1835 return NOTIFY_OK;1835 return NOTIFY_OK;
1836}1836}
1837 1837
1838static void esw_functions_changed_event_init(struct mlx5_eswitch *esw,
1839 u16 vf_nvports)
1840{
1841 if (!mlx5_eswitch_is_funcs_handler(esw->dev))
1842 return;
1843
1844 MLX5_NB_INIT(&esw->esw_funcs.nb, esw_functions_changed_event,
1845 ESW_FUNCTIONS_CHANGED);
1846 mlx5_eq_notifier_register(esw->dev, &esw->esw_funcs.nb);
1847 esw->esw_funcs.num_vfs = vf_nvports;
1848}
1849
1850static void esw_functions_changed_event_cleanup(struct mlx5_eswitch *esw)
1851{
1852 if (!mlx5_eswitch_is_funcs_handler(esw->dev))
1853 return;
1854
1855 mlx5_eq_notifier_unregister(esw->dev, &esw->esw_funcs.nb);
1856 flush_workqueue(esw->work_queue);
1857}
1858
1838int esw_offloads_init(struct mlx5_eswitch *esw, int vf_nvports,1859int esw_offloads_init(struct mlx5_eswitch *esw, int vf_nvports,
1839 int total_nvports)1860 int total_nvports)
1840{1861{
@@ -1850,12 +1871,7 @@ int esw_offloads_init(struct mlx5_eswitch *esw, int vf_nvports, · 9 unmodified lines
1850 1871
1851 esw_offloads_devcom_init(esw);1872 esw_offloads_devcom_init(esw);
1852 1873
1853 if (mlx5_core_is_ecpf_esw_manager(esw->dev)) {1874 esw_functions_changed_event_init(esw, vf_nvports);
1854 MLX5_NB_INIT(&esw->host_info.nb, esw_host_params_event,
1855 HOST_PARAMS_CHANGE);
1856 mlx5_eq_notifier_register(esw->dev, &esw->host_info.nb);
1857 esw->host_info.num_vfs = vf_nvports;
1858 }
1859 1875
1860 mlx5_rdma_enable_roce(esw->dev);1876 mlx5_rdma_enable_roce(esw->dev);
1861 1877
@@ -1889,13 +1905,12 @@ void esw_offloads_cleanup(struct mlx5_eswitch *esw) · 27 unmodified lines
1889{1905{
1890 u16 num_vfs;1906 u16 num_vfs;
1891 1907
1892 if (mlx5_core_is_ecpf_esw_manager(esw->dev)) {1908 esw_functions_changed_event_cleanup(esw);
1893 mlx5_eq_notifier_unregister(esw->dev, &esw->host_info.nb);1909
1894 flush_workqueue(esw->work_queue);1910 if (mlx5_eswitch_is_funcs_handler(esw->dev))
1895 num_vfs = esw->host_info.num_vfs;1911 num_vfs = esw->esw_funcs.num_vfs;
1896 } else {1912 else
1897 num_vfs = esw->dev->priv.sriov.num_vfs;1913 num_vfs = esw->dev->priv.sriov.num_vfs;
1898 }
1899 1914
1900 mlx5_rdma_disable_roce(esw->dev);1915 mlx5_rdma_disable_roce(esw->dev);
1901 esw_offloads_devcom_cleanup(esw);1916 esw_offloads_devcom_cleanup(esw);
@@ -2203,21 +2218,17 @@ int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink, u8 *encap) · 301 unmodified lines
2203}2218}
2204 2219
2205void mlx5_eswitch_register_vport_reps(struct mlx5_eswitch *esw,2220void mlx5_eswitch_register_vport_reps(struct mlx5_eswitch *esw,
2206 struct mlx5_eswitch_rep_if *__rep_if,2221 const struct mlx5_eswitch_rep_ops *ops,
2207 u8 rep_type)2222 u8 rep_type)
2208{2223{
2209 struct mlx5_eswitch_rep_if *rep_if;2224 struct mlx5_eswitch_rep_data *rep_data;
2210 struct mlx5_eswitch_rep *rep;2225 struct mlx5_eswitch_rep *rep;
2211 int i;2226 int i;
2212 2227
2228 esw->offloads.rep_ops[rep_type] = ops;
2213 mlx5_esw_for_all_reps(esw, i, rep) {2229 mlx5_esw_for_all_reps(esw, i, rep) {
2214 rep_if = &rep->rep_if[rep_type];2230 rep_data = &rep->rep_data[rep_type];
2215 rep_if->load = __rep_if->load;2231 atomic_set(&rep_data->state, REP_REGISTERED);
2216 rep_if->unload = __rep_if->unload;
2217 rep_if->get_proto_dev = __rep_if->get_proto_dev;
2218 rep_if->priv = __rep_if->priv;
2219
2220 atomic_set(&rep_if->state, REP_REGISTERED);
2221 }2232 }
2222}2233}
2223EXPORT_SYMBOL(mlx5_eswitch_register_vport_reps);2234EXPORT_SYMBOL(mlx5_eswitch_register_vport_reps);
@@ -2232,7 +2243,7 @@ void mlx5_eswitch_unregister_vport_reps(struct mlx5_eswitch *esw, u8 rep_type) · 8 unmodified lines
2232 __unload_reps_all_vport(esw, max_vf, rep_type);2243 __unload_reps_all_vport(esw, max_vf, rep_type);
2233 2244
2234 mlx5_esw_for_all_reps(esw, i, rep)2245 mlx5_esw_for_all_reps(esw, i, rep)
2235 atomic_set(&rep->rep_if[rep_type].state, REP_UNREGISTERED);2246 atomic_set(&rep->rep_data[rep_type].state, REP_UNREGISTERED);
2236}2247}
2237EXPORT_SYMBOL(mlx5_eswitch_unregister_vport_reps);2248EXPORT_SYMBOL(mlx5_eswitch_unregister_vport_reps);
2238 2249
@@ -2241,7 +2252,7 @@ void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type) · 2 unmodified lines
2241 struct mlx5_eswitch_rep *rep;2252 struct mlx5_eswitch_rep *rep;
2242 2253
2243 rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_UPLINK);2254 rep = mlx5_eswitch_get_rep(esw, MLX5_VPORT_UPLINK);
2244 return rep->rep_if[rep_type].priv;2255 return rep->rep_data[rep_type].priv;
2245}2256}
2246 2257
2247void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw,2258void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw,
@@ -2252,9 +2263,9 @@ void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw, · 4 unmodified lines
2252 2263
2253 rep = mlx5_eswitch_get_rep(esw, vport);2264 rep = mlx5_eswitch_get_rep(esw, vport);
2254 2265
2255 if (atomic_read(&rep->rep_if[rep_type].state) == REP_LOADED &&2266 if (atomic_read(&rep->rep_data[rep_type].state) == REP_LOADED &&
2256 rep->rep_if[rep_type].get_proto_dev)2267 esw->offloads.rep_ops[rep_type]->get_proto_dev)
2257 return rep->rep_if[rep_type].get_proto_dev(rep);2268 return esw->offloads.rep_ops[rep_type]->get_proto_dev(rep);
2258 return NULL;2269 return NULL;
2259}2270}
2260EXPORT_SYMBOL(mlx5_eswitch_get_proto_dev);2271EXPORT_SYMBOL(mlx5_eswitch_get_proto_dev);
drivers/net/ethernet/mellanox/mlx5/core/events.c+2−2
@@ -108,8 +108,8 @@ static const char *eqe_type_str(u8 type) · 107 unmodified lines
108 return "MLX5_EVENT_TYPE_STALL_EVENT";108 return "MLX5_EVENT_TYPE_STALL_EVENT";
109 case MLX5_EVENT_TYPE_CMD:109 case MLX5_EVENT_TYPE_CMD:
110 return "MLX5_EVENT_TYPE_CMD";110 return "MLX5_EVENT_TYPE_CMD";
111 case MLX5_EVENT_TYPE_HOST_PARAMS_CHANGE:111 case MLX5_EVENT_TYPE_ESW_FUNCTIONS_CHANGED:
112 return "MLX5_EVENT_TYPE_HOST_PARAMS_CHANGE";112 return "MLX5_EVENT_TYPE_ESW_FUNCTIONS_CHANGED";
113 case MLX5_EVENT_TYPE_PAGE_REQUEST:113 case MLX5_EVENT_TYPE_PAGE_REQUEST:
114 return "MLX5_EVENT_TYPE_PAGE_REQUEST";114 return "MLX5_EVENT_TYPE_PAGE_REQUEST";
115 case MLX5_EVENT_TYPE_PAGE_FAULT:115 case MLX5_EVENT_TYPE_PAGE_FAULT:
drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c+3−0
@@ -147,6 +147,7 @@ static int mlx5_cmd_create_flow_table(struct mlx5_flow_root_namespace *ns, · 146 unmodified lines
147{147{
148 int en_encap = !!(ft->flags & MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT);148 int en_encap = !!(ft->flags & MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT);
149 int en_decap = !!(ft->flags & MLX5_FLOW_TABLE_TUNNEL_EN_DECAP);149 int en_decap = !!(ft->flags & MLX5_FLOW_TABLE_TUNNEL_EN_DECAP);
150 int term = !!(ft->flags & MLX5_FLOW_TABLE_TERMINATION);
150 u32 out[MLX5_ST_SZ_DW(create_flow_table_out)] = {0};151 u32 out[MLX5_ST_SZ_DW(create_flow_table_out)] = {0};
151 u32 in[MLX5_ST_SZ_DW(create_flow_table_in)] = {0};152 u32 in[MLX5_ST_SZ_DW(create_flow_table_in)] = {0};
152 struct mlx5_core_dev *dev = ns->dev;153 struct mlx5_core_dev *dev = ns->dev;
@@ -167,6 +168,8 @@ static int mlx5_cmd_create_flow_table(struct mlx5_flow_root_namespace *ns, · 14 unmodified lines
167 en_decap);168 en_decap);
168 MLX5_SET(create_flow_table_in, in, flow_table_context.reformat_en,169 MLX5_SET(create_flow_table_in, in, flow_table_context.reformat_en,
169 en_encap);170 en_encap);
171 MLX5_SET(create_flow_table_in, in, flow_table_context.termination_table,
172 term);
170 173
171 switch (ft->op_mod) {174 switch (ft->op_mod) {
172 case FS_FT_OP_MOD_NORMAL:175 case FS_FT_OP_MOD_NORMAL:
drivers/net/ethernet/mellanox/mlx5/core/rdma.c+2−2
@@ -106,10 +106,10 @@ static int mlx5_rdma_enable_roce_steering(struct mlx5_core_dev *dev) · 105 unmodified lines
106 106
107 return 0;107 return 0;
108 108
109destroy_flow_table:
110 mlx5_destroy_flow_table(ft);
111destroy_flow_group:109destroy_flow_group:
112 mlx5_destroy_flow_group(fg);110 mlx5_destroy_flow_group(fg);
111destroy_flow_table:
112 mlx5_destroy_flow_table(ft);
113free:113free:
114 kvfree(spec);114 kvfree(spec);
115 kvfree(flow_group_in);115 kvfree(flow_group_in);
include/linux/mlx5/device.h+1−1
@@ -342,7 +342,7 @@ enum mlx5_event { · 341 unmodified lines
342 MLX5_EVENT_TYPE_PAGE_FAULT = 0xc,342 MLX5_EVENT_TYPE_PAGE_FAULT = 0xc,
343 MLX5_EVENT_TYPE_NIC_VPORT_CHANGE = 0xd,343 MLX5_EVENT_TYPE_NIC_VPORT_CHANGE = 0xd,
344 344
345 MLX5_EVENT_TYPE_HOST_PARAMS_CHANGE = 0xe,345 MLX5_EVENT_TYPE_ESW_FUNCTIONS_CHANGED = 0xe,
346 346
347 MLX5_EVENT_TYPE_DCT_DRAINED = 0x1c,347 MLX5_EVENT_TYPE_DCT_DRAINED = 0x1c,
348 348
include/linux/mlx5/driver.h+1−0
@@ -107,6 +107,7 @@ enum { · 106 unmodified lines
107 MLX5_REG_FPGA_CAP = 0x4022,107 MLX5_REG_FPGA_CAP = 0x4022,
108 MLX5_REG_FPGA_CTRL = 0x4023,108 MLX5_REG_FPGA_CTRL = 0x4023,
109 MLX5_REG_FPGA_ACCESS_REG = 0x4024,109 MLX5_REG_FPGA_ACCESS_REG = 0x4024,
110 MLX5_REG_CORE_DUMP = 0x402e,
110 MLX5_REG_PCAP = 0x5001,111 MLX5_REG_PCAP = 0x5001,
111 MLX5_REG_PMTU = 0x5003,112 MLX5_REG_PMTU = 0x5003,
112 MLX5_REG_PTYS = 0x5004,113 MLX5_REG_PTYS = 0x5004,
include/linux/mlx5/eswitch.h+11−9
@@ -29,17 +29,19 @@ enum { · 28 unmodified lines
29};29};
30 30
31struct mlx5_eswitch_rep;31struct mlx5_eswitch_rep;
32struct mlx5_eswitch_rep_if {32struct mlx5_eswitch_rep_ops {
33 int (*load)(struct mlx5_core_dev *dev,33 int (*load)(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep);
34 struct mlx5_eswitch_rep *rep);34 void (*unload)(struct mlx5_eswitch_rep *rep);
35 void (*unload)(struct mlx5_eswitch_rep *rep);35 void *(*get_proto_dev)(struct mlx5_eswitch_rep *rep);
36 void *(*get_proto_dev)(struct mlx5_eswitch_rep *rep);36};
37 void *priv;37
38 atomic_t state;38struct mlx5_eswitch_rep_data {
39 void *priv;
40 atomic_t state;
39};41};
40 42
41struct mlx5_eswitch_rep {43struct mlx5_eswitch_rep {
42 struct mlx5_eswitch_rep_if rep_if[NUM_REP_TYPES];44 struct mlx5_eswitch_rep_data rep_data[NUM_REP_TYPES];
43 u16 vport;45 u16 vport;
44 u8 hw_id[ETH_ALEN];46 u8 hw_id[ETH_ALEN];
45 u16 vlan;47 u16 vlan;
@@ -47,7 +49,7 @@ struct mlx5_eswitch_rep { · 1 unmodified line
47};49};
48 50
49void mlx5_eswitch_register_vport_reps(struct mlx5_eswitch *esw,51void mlx5_eswitch_register_vport_reps(struct mlx5_eswitch *esw,
50 struct mlx5_eswitch_rep_if *rep_if,52 const struct mlx5_eswitch_rep_ops *ops,
51 u8 rep_type);53 u8 rep_type);
52void mlx5_eswitch_unregister_vport_reps(struct mlx5_eswitch *esw, u8 rep_type);54void mlx5_eswitch_unregister_vport_reps(struct mlx5_eswitch *esw, u8 rep_type);
53void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw,55void *mlx5_eswitch_get_proto_dev(struct mlx5_eswitch *esw,
include/linux/mlx5/fs.h+1−0
@@ -47,6 +47,7 @@ enum { · 46 unmodified lines
47enum {47enum {
48 MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT = BIT(0),48 MLX5_FLOW_TABLE_TUNNEL_EN_REFORMAT = BIT(0),
49 MLX5_FLOW_TABLE_TUNNEL_EN_DECAP = BIT(1),49 MLX5_FLOW_TABLE_TUNNEL_EN_DECAP = BIT(1),
50 MLX5_FLOW_TABLE_TERMINATION = BIT(2),
50};51};
51 52
52#define LEFTOVERS_RULE_NUM 253#define LEFTOVERS_RULE_NUM 2
include/linux/mlx5/mlx5_ifc.h+26−7
@@ -155,7 +155,7 @@ enum { · 154 unmodified lines
155 MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY = 0x725,155 MLX5_CMD_OP_QUERY_XRQ_DC_PARAMS_ENTRY = 0x725,
156 MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY = 0x726,156 MLX5_CMD_OP_SET_XRQ_DC_PARAMS_ENTRY = 0x726,
157 MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS = 0x727,157 MLX5_CMD_OP_QUERY_XRQ_ERROR_PARAMS = 0x727,
158 MLX5_CMD_OP_QUERY_HOST_PARAMS = 0x740,158 MLX5_CMD_OP_QUERY_ESW_FUNCTIONS = 0x740,
159 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,159 MLX5_CMD_OP_QUERY_VPORT_STATE = 0x750,
160 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,160 MLX5_CMD_OP_MODIFY_VPORT_STATE = 0x751,
161 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,161 MLX5_CMD_OP_QUERY_ESW_VPORT_CONTEXT = 0x752,
@@ -382,7 +382,8 @@ struct mlx5_ifc_flow_table_prop_layout_bits { · 220 unmodified lines
382 u8 reformat_and_modify_action[0x1];382 u8 reformat_and_modify_action[0x1];
383 u8 reserved_at_15[0x2];383 u8 reserved_at_15[0x2];
384 u8 table_miss_action_domain[0x1];384 u8 table_miss_action_domain[0x1];
385 u8 reserved_at_18[0x8];385 u8 termination_table[0x1];
386 u8 reserved_at_19[0x7];
386 u8 reserved_at_20[0x2];387 u8 reserved_at_20[0x2];
387 u8 log_max_ft_size[0x6];388 u8 log_max_ft_size[0x6];
388 u8 log_max_modify_header_context[0x8];389 u8 log_max_modify_header_context[0x8];
@@ -664,7 +665,9 @@ struct mlx5_ifc_e_switch_cap_bits { · 275 unmodified lines
664 u8 vport_svlan_insert[0x1];665 u8 vport_svlan_insert[0x1];
665 u8 vport_cvlan_insert_if_not_exist[0x1];666 u8 vport_cvlan_insert_if_not_exist[0x1];
666 u8 vport_cvlan_insert_overwrite[0x1];667 u8 vport_cvlan_insert_overwrite[0x1];
667 u8 reserved_at_5[0x16];668 u8 reserved_at_5[0x14];
669 u8 esw_functions_changed[0x1];
670 u8 reserved_at_1a[0x1];
668 u8 ecpf_vport_exists[0x1];671 u8 ecpf_vport_exists[0x1];
669 u8 counter_eswitch_affinity[0x1];672 u8 counter_eswitch_affinity[0x1];
670 u8 merged_eswitch[0x1];673 u8 merged_eswitch[0x1];
@@ -715,7 +718,9 @@ struct mlx5_ifc_qos_cap_bits { · 44 unmodified lines
715};718};
716 719
717struct mlx5_ifc_debug_cap_bits {720struct mlx5_ifc_debug_cap_bits {
718 u8 reserved_at_0[0x20];721 u8 core_dump_general[0x1];
722 u8 core_dump_qp[0x1];
723 u8 reserved_at_2[0x1e];
719 724
720 u8 reserved_at_20[0x2];725 u8 reserved_at_20[0x2];
721 u8 stall_detect[0x1];726 u8 stall_detect[0x1];
@@ -2531,6 +2536,7 @@ union mlx5_ifc_hca_cap_union_bits { · 1809 unmodified lines
2531 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;2536 struct mlx5_ifc_e_switch_cap_bits e_switch_cap;
2532 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;2537 struct mlx5_ifc_vector_calc_cap_bits vector_calc_cap;
2533 struct mlx5_ifc_qos_cap_bits qos_cap;2538 struct mlx5_ifc_qos_cap_bits qos_cap;
2539 struct mlx5_ifc_debug_cap_bits debug_cap;
2534 struct mlx5_ifc_fpga_cap_bits fpga_cap;2540 struct mlx5_ifc_fpga_cap_bits fpga_cap;
2535 u8 reserved_at_0[0x8000];2541 u8 reserved_at_0[0x8000];
2536};2542};
@@ -7236,7 +7242,8 @@ struct mlx5_ifc_create_flow_table_out_bits { · 4699 unmodified lines
7236struct mlx5_ifc_flow_table_context_bits {7242struct mlx5_ifc_flow_table_context_bits {
7237 u8 reformat_en[0x1];7243 u8 reformat_en[0x1];
7238 u8 decap_en[0x1];7244 u8 decap_en[0x1];
7239 u8 reserved_at_2[0x2];7245 u8 reserved_at_2[0x1];
7246 u8 termination_table[0x1];
7240 u8 table_miss_action[0x4];7247 u8 table_miss_action[0x4];
7241 u8 level[0x8];7248 u8 level[0x8];
7242 u8 reserved_at_10[0x8];7249 u8 reserved_at_10[0x8];
@@ -8546,6 +8553,18 @@ struct mlx5_ifc_qcam_reg_bits { · 1303 unmodified lines
8546 u8 reserved_at_1c0[0x80];8553 u8 reserved_at_1c0[0x80];
8547};8554};
8548 8555
8556struct mlx5_ifc_core_dump_reg_bits {
8557 u8 reserved_at_0[0x18];
8558 u8 core_dump_type[0x8];
8559
8560 u8 reserved_at_20[0x30];
8561 u8 vhca_id[0x10];
8562
8563 u8 reserved_at_60[0x8];
8564 u8 qpn[0x18];
8565 u8 reserved_at_80[0x180];
8566};
8567
8549struct mlx5_ifc_pcap_reg_bits {8568struct mlx5_ifc_pcap_reg_bits {
8550 u8 reserved_at_0[0x8];8569 u8 reserved_at_0[0x8];
8551 u8 local_port[0x8];8570 u8 local_port[0x8];
@@ -9704,7 +9723,7 @@ struct mlx5_ifc_host_params_context_bits { · 1152 unmodified lines
9704 u8 reserved_at_80[0x180];9723 u8 reserved_at_80[0x180];
9705};9724};
9706 9725
9707struct mlx5_ifc_query_host_params_in_bits {9726struct mlx5_ifc_query_esw_functions_in_bits {
9708 u8 opcode[0x10];9727 u8 opcode[0x10];
9709 u8 reserved_at_10[0x10];9728 u8 reserved_at_10[0x10];
9710 9729
@@ -9714,7 +9733,7 @@ struct mlx5_ifc_query_host_params_in_bits { · 3 unmodified lines
9714 u8 reserved_at_40[0x40];9733 u8 reserved_at_40[0x40];
9715};9734};
9716 9735
9717struct mlx5_ifc_query_host_params_out_bits {9736struct mlx5_ifc_query_esw_functions_out_bits {
9718 u8 status[0x8];9737 u8 status[0x8];
9719 u8 reserved_at_8[0x18];9738 u8 reserved_at_8[0x18];
9720 9739

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