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iommu: Introduce guest PASID bind function

Guest shared virtual address (SVA) may require host to shadow guest PASID tables. Guest PASID can also be allocated from the host via enlightened interfaces. In this case, guest needs to bind the guest mm, i.e. cr3 in guest physical address to the actual PASID table in the host IOMMU. Nesting will be turned on such that guest virtual address can go through a two level translation: - 1st level translates GVA to GPA - 2nd level translates GPA to HPA This patch introduces APIs to bind guest PASID data to the assigned device entry in the physical IOMMU. See the diagram below for usage explanation. .-------------. .---------------------------. | vIOMMU | | Guest process mm, FL only | | | '---------------------------' .----------------/ | PASID Entry |--- PASID cache flush - '-------------' | | | V | | GP '-------------' Guest ------| Shadow |----------------------- GP->HP* --------- v v | Host v .-------------. .----------------------. | pIOMMU | | Bind FL for GVA-GPA | | | '----------------------' .----------------/ | | PASID Entry | V (Nested xlate) '----------------\.---------------------. | | |Set SL to GPA-HPA | | | '---------------------' '-------------' Where: - FL = First level/stage one page tables - SL = Second level/stage two page tables - GP = Guest PASID - HP = Host PASID * Conversion needed if non-identity GP-HP mapping option is chosen.

Jacob Pan committed 7 years ago

Commit 808be0a1 parent e5c0bd73 files · +101 −0Browse files

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include/uapi/linux/iommu.h+59−0
@@ -262,4 +262,63 @@ struct iommu_cache_invalidate_info { · 261 unmodified lines
262 };262 };
263};263};
264 264
265/**
266 * struct iommu_gpasid_bind_data_vtd - Intel VT-d specific data on device and guest
267 * SVA binding.
268 *
269 * @flags: VT-d PASID table entry attributes
270 * @pat: Page attribute table data to compute effective memory type
271 * @emt: Extended memory type
272 *
273 * Only guest vIOMMU selectable and effective options are passed down to
274 * the host IOMMU.
275 */
276struct iommu_gpasid_bind_data_vtd {
277#define IOMMU_SVA_VTD_GPASID_SRE (1 << 0) /* supervisor request */
278#define IOMMU_SVA_VTD_GPASID_EAFE (1 << 1) /* extended access enable */
279#define IOMMU_SVA_VTD_GPASID_PCD (1 << 2) /* page-level cache disable */
280#define IOMMU_SVA_VTD_GPASID_PWT (1 << 3) /* page-level write through */
281#define IOMMU_SVA_VTD_GPASID_EMTE (1 << 4) /* extended mem type enable */
282#define IOMMU_SVA_VTD_GPASID_CD (1 << 5) /* PASID-level cache disable */
283 __u64 flags;
284 __u32 pat;
285 __u32 emt;
286};
287
288/**
289 * struct iommu_gpasid_bind_data - Information about device and guest PASID binding
290 * @version: Version of this data structure
291 * @format: PASID table entry format
292 * @flags: Additional information on guest bind request
293 * @gpgd: Guest page directory base of the guest mm to bind
294 * @hpasid: Process address space ID used for the guest mm in host IOMMU
295 * @gpasid: Process address space ID used for the guest mm in guest IOMMU
296 * @addr_width: Guest virtual address width
297 * @padding: Reserved for future use (should be zero)
298 * @vtd: Intel VT-d specific data
299 *
300 * Guest to host PASID mapping can be an identity or non-identity, where guest
301 * has its own PASID space. For non-identify mapping, guest to host PASID lookup
302 * is needed when VM programs guest PASID into an assigned device. VMM may
303 * trap such PASID programming then request host IOMMU driver to convert guest
304 * PASID to host PASID based on this bind data.
305 */
306struct iommu_gpasid_bind_data {
307#define IOMMU_GPASID_BIND_VERSION_1 1
308 __u32 version;
309#define IOMMU_PASID_FORMAT_INTEL_VTD 1
310 __u32 format;
311#define IOMMU_SVA_GPASID_VAL (1 << 0) /* guest PASID valid */
312 __u64 flags;
313 __u64 gpgd;
314 __u64 hpasid;
315 __u64 gpasid;
316 __u32 addr_width;
317 __u8 padding[12];
318 /* Vendor specific data */
319 union {
320 struct iommu_gpasid_bind_data_vtd vtd;
321 };
322};
323
265#endif /* _UAPI_IOMMU_H */324#endif /* _UAPI_IOMMU_H */