I need to pick up the independent changes made to Documentation/core-api/memory-allocation.rst to be able to merge further work without creating a total mess.
Unified · Split
| @@ -1637,6 +1637,10 @@ S: Panoramastrasse 18 · 1636 unmodified lines | |||
| 1637 | S: D-69126 Heidelberg | 1637 | S: D-69126 Heidelberg |
| 1638 | S: Germany | 1638 | S: Germany |
| 1639 | 1639 | ||
| 1640 | N: Simon Horman | ||
| 1641 | M: horms@verge.net.au | ||
| 1642 | D: Renesas ARM/ARM64 SoC maintainer | ||
| 1643 | |||
| 1640 | N: Christopher Horn | 1644 | N: Christopher Horn |
| 1641 | E: chorn@warwick.net | 1645 | E: chorn@warwick.net |
| 1642 | D: Miscellaneous sysctl hacks | 1646 | D: Miscellaneous sysctl hacks |
| @@ -615,8 +615,8 @@ on an IO device and is an example of this type. · 614 unmodified lines | |||
| 615 | Protections | 615 | Protections |
| 616 | ----------- | 616 | ----------- |
| 617 | 617 | ||
| 618 | A cgroup is protected to be allocated upto the configured amount of | 618 | A cgroup is protected upto the configured amount of the resource |
| 619 | the resource if the usages of all its ancestors are under their | 619 | as long as the usages of all its ancestors are under their |
| 620 | protected levels. Protections can be hard guarantees or best effort | 620 | protected levels. Protections can be hard guarantees or best effort |
| 621 | soft boundaries. Protections can also be over-committed in which case | 621 | soft boundaries. Protections can also be over-committed in which case |
| 622 | only upto the amount available to the parent is protected among | 622 | only upto the amount available to the parent is protected among |
| @@ -1096,7 +1096,10 @@ PAGE_SIZE multiple when read back. · 473 unmodified lines | |||
| 1096 | is within its effective min boundary, the cgroup's memory | 1096 | is within its effective min boundary, the cgroup's memory |
| 1097 | won't be reclaimed under any conditions. If there is no | 1097 | won't be reclaimed under any conditions. If there is no |
| 1098 | unprotected reclaimable memory available, OOM killer | 1098 | unprotected reclaimable memory available, OOM killer |
| 1099 | is invoked. | 1099 | is invoked. Above the effective min boundary (or |
| 1100 | effective low boundary if it is higher), pages are reclaimed | ||
| 1101 | proportionally to the overage, reducing reclaim pressure for | ||
| 1102 | smaller overages. | ||
| 1100 | 1103 | ||
| 1101 | Effective min boundary is limited by memory.min values of | 1104 | Effective min boundary is limited by memory.min values of |
| 1102 | all ancestor cgroups. If there is memory.min overcommitment | 1105 | all ancestor cgroups. If there is memory.min overcommitment |
| @@ -1119,6 +1122,10 @@ PAGE_SIZE multiple when read back. · 16 unmodified lines | |||
| 1119 | cgroup is within its effective low boundary, the cgroup's | 1122 | cgroup is within its effective low boundary, the cgroup's |
| 1120 | memory won't be reclaimed unless there is no reclaimable | 1123 | memory won't be reclaimed unless there is no reclaimable |
| 1121 | memory available in unprotected cgroups. | 1124 | memory available in unprotected cgroups. |
| 1125 | Above the effective low boundary (or | ||
| 1126 | effective min boundary if it is higher), pages are reclaimed | ||
| 1127 | proportionally to the overage, reducing reclaim pressure for | ||
| 1128 | smaller overages. | ||
| 1122 | 1129 | ||
| 1123 | Effective low boundary is limited by memory.low values of | 1130 | Effective low boundary is limited by memory.low values of |
| 1124 | all ancestor cgroups. If there is memory.low overcommitment | 1131 | all ancestor cgroups. If there is memory.low overcommitment |
| @@ -2482,8 +2489,10 @@ system performance due to overreclaim, to the point where the feature · 1357 unmodified lines | |||
| 2482 | becomes self-defeating. | 2489 | becomes self-defeating. |
| 2483 | 2490 | ||
| 2484 | The memory.low boundary on the other hand is a top-down allocated | 2491 | The memory.low boundary on the other hand is a top-down allocated |
| 2485 | reserve. A cgroup enjoys reclaim protection when it's within its low, | 2492 | reserve. A cgroup enjoys reclaim protection when it's within its |
| 2486 | which makes delegation of subtrees possible. | 2493 | effective low, which makes delegation of subtrees possible. It also |
| 2494 | enjoys having reclaim pressure proportional to its overage when | ||
| 2495 | above its effective low. | ||
| 2487 | 2496 | ||
| 2488 | The original high boundary, the hard limit, is defined as a strict | 2497 | The original high boundary, the hard limit, is defined as a strict |
| 2489 | limit that can not budge, even if the OOM killer has to be called. | 2498 | limit that can not budge, even if the OOM killer has to be called. |
| @@ -5304,6 +5304,10 @@ · 5303 unmodified lines | |||
| 5304 | the unplug protocol | 5304 | the unplug protocol |
| 5305 | never -- do not unplug even if version check succeeds | 5305 | never -- do not unplug even if version check succeeds |
| 5306 | 5306 | ||
| 5307 | xen_legacy_crash [X86,XEN] | ||
| 5308 | Crash from Xen panic notifier, without executing late | ||
| 5309 | panic() code such as dumping handler. | ||
| 5310 | |||
| 5307 | xen_nopvspin [X86,XEN] | 5311 | xen_nopvspin [X86,XEN] |
| 5308 | Disables the ticketlock slowpath using Xen PV | 5312 | Disables the ticketlock slowpath using Xen PV |
| 5309 | optimizations. | 5313 | optimizations. |
| @@ -154,11 +154,18 @@ return virtual addresses to userspace from a 48-bit range. · 153 unmodified lines | |||
| 154 | 154 | ||
| 155 | Software can "opt-in" to receiving VAs from a 52-bit space by | 155 | Software can "opt-in" to receiving VAs from a 52-bit space by |
| 156 | specifying an mmap hint parameter that is larger than 48-bit. | 156 | specifying an mmap hint parameter that is larger than 48-bit. |
| 157 | |||
| 157 | For example: | 158 | For example: |
| 158 | maybe_high_address = mmap(~0UL, size, prot, flags,...); | 159 | |
| 160 | .. code-block:: c | ||
| 161 | |||
| 162 | maybe_high_address = mmap(~0UL, size, prot, flags,...); | ||
| 159 | 163 | ||
| 160 | It is also possible to build a debug kernel that returns addresses | 164 | It is also possible to build a debug kernel that returns addresses |
| 161 | from a 52-bit space by enabling the following kernel config options: | 165 | from a 52-bit space by enabling the following kernel config options: |
| 166 | |||
| 167 | .. code-block:: sh | ||
| 168 | |||
| 162 | CONFIG_EXPERT=y && CONFIG_ARM64_FORCE_52BIT=y | 169 | CONFIG_EXPERT=y && CONFIG_ARM64_FORCE_52BIT=y |
| 163 | 170 | ||
| 164 | Note that this option is only intended for debugging applications | 171 | Note that this option is only intended for debugging applications |
| @@ -107,6 +107,8 @@ stable kernels. · 106 unmodified lines | |||
| 107 | +----------------+-----------------+-----------------+-----------------------------+ | 107 | +----------------+-----------------+-----------------+-----------------------------+ |
| 108 | | Cavium | ThunderX2 SMMUv3| #126 | N/A | | 108 | | Cavium | ThunderX2 SMMUv3| #126 | N/A | |
| 109 | +----------------+-----------------+-----------------+-----------------------------+ | 109 | +----------------+-----------------+-----------------+-----------------------------+ |
| 110 | | Cavium | ThunderX2 Core | #219 | CAVIUM_TX2_ERRATUM_219 | | ||
| 111 | +----------------+-----------------+-----------------+-----------------------------+ | ||
| 110 | +----------------+-----------------+-----------------+-----------------------------+ | 112 | +----------------+-----------------+-----------------+-----------------------------+ |
| 111 | | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 | | 113 | | Freescale/NXP | LS2080A/LS1043A | A-008585 | FSL_ERRATUM_A008585 | |
| 112 | +----------------+-----------------+-----------------+-----------------------------+ | 114 | +----------------+-----------------+-----------------+-----------------------------+ |
| @@ -38,6 +38,7 @@ Core utilities · 37 unmodified lines | |||
| 38 | protection-keys | 38 | protection-keys |
| 39 | ../RCU/index | 39 | ../RCU/index |
| 40 | gcc-plugins | 40 | gcc-plugins |
| 41 | symbol-namespaces | ||
| 41 | 42 | ||
| 42 | 43 | ||
| 43 | Interfaces for kernel debugging | 44 | Interfaces for kernel debugging |
| @@ -98,6 +98,10 @@ limited. The actual limit depends on the hardware and the kernel · 97 unmodified lines | |||
| 98 | configuration, but it is a good practice to use `kmalloc` for objects | 98 | configuration, but it is a good practice to use `kmalloc` for objects |
| 99 | smaller than page size. | 99 | smaller than page size. |
| 100 | 100 | ||
| 101 | The address of a chunk allocated with `kmalloc` is aligned to at least | ||
| 102 | ARCH_KMALLOC_MINALIGN bytes. For sizes which are a power of two, the | ||
| 103 | alignment is also guaranteed to be at least the respective size. | ||
| 104 | |||
| 101 | For large allocations you can use :c:func:`vmalloc` and | 105 | For large allocations you can use :c:func:`vmalloc` and |
| 102 | :c:func:`vzalloc`, or directly request pages from the page | 106 | :c:func:`vzalloc`, or directly request pages from the page |
| 103 | allocator. The memory allocated by `vmalloc` and related functions is | 107 | allocator. The memory allocated by `vmalloc` and related functions is |
File renamed without changes.
| @@ -41,6 +41,9 @@ smaller binary while the latter is 1.1 - 2 times faster. · 40 unmodified lines | |||
| 41 | Both KASAN modes work with both SLUB and SLAB memory allocators. | 41 | Both KASAN modes work with both SLUB and SLAB memory allocators. |
| 42 | For better bug detection and nicer reporting, enable CONFIG_STACKTRACE. | 42 | For better bug detection and nicer reporting, enable CONFIG_STACKTRACE. |
| 43 | 43 | ||
| 44 | To augment reports with last allocation and freeing stack of the physical page, | ||
| 45 | it is recommended to enable also CONFIG_PAGE_OWNER and boot with page_owner=on. | ||
| 46 | |||
| 44 | To disable instrumentation for specific files or directories, add a line | 47 | To disable instrumentation for specific files or directories, add a line |
| 45 | similar to the following to the respective kernel Makefile: | 48 | similar to the following to the respective kernel Makefile: |
| 46 | 49 | ||
| @@ -89,6 +89,22 @@ To build, save output files in a separate directory with KBUILD_OUTPUT :: · 88 unmodified lines | |||
| 89 | 89 | ||
| 90 | $ export KBUILD_OUTPUT=/tmp/kselftest; make TARGETS="size timers" kselftest | 90 | $ export KBUILD_OUTPUT=/tmp/kselftest; make TARGETS="size timers" kselftest |
| 91 | 91 | ||
| 92 | Additionally you can use the "SKIP_TARGETS" variable on the make command | ||
| 93 | line to specify one or more targets to exclude from the TARGETS list. | ||
| 94 | |||
| 95 | To run all tests but a single subsystem:: | ||
| 96 | |||
| 97 | $ make -C tools/testing/selftests SKIP_TARGETS=ptrace run_tests | ||
| 98 | |||
| 99 | You can specify multiple tests to skip:: | ||
| 100 | |||
| 101 | $ make SKIP_TARGETS="size timers" kselftest | ||
| 102 | |||
| 103 | You can also specify a restricted list of tests to run together with a | ||
| 104 | dedicated skiplist:: | ||
| 105 | |||
| 106 | $ make TARGETS="bpf breakpoints size timers" SKIP_TARGETS=bpf kselftest | ||
| 107 | |||
| 92 | See the top-level tools/testing/selftests/Makefile for the list of all | 108 | See the top-level tools/testing/selftests/Makefile for the list of all |
| 93 | possible targets. | 109 | possible targets. |
| 94 | 110 | ||
| @@ -85,4 +85,5 @@ examples: · 84 unmodified lines | |||
| 85 | <&pd IMX_SC_R_DSP_RAM>; | 85 | <&pd IMX_SC_R_DSP_RAM>; |
| 86 | mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; | 86 | mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; |
| 87 | mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; | 87 | mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; |
| 88 | memory-region = <&dsp_reserved>; | ||
| 88 | }; | 89 | }; |
| @@ -43,13 +43,9 @@ properties: · 42 unmodified lines | |||
| 43 | 43 | ||
| 44 | dvdd-supply: | 44 | dvdd-supply: |
| 45 | description: DVdd voltage supply | 45 | description: DVdd voltage supply |
| 46 | items: | ||
| 47 | - const: dvdd | ||
| 48 | 46 | ||
| 49 | avdd-supply: | 47 | avdd-supply: |
| 50 | description: AVdd voltage supply | 48 | description: AVdd voltage supply |
| 51 | items: | ||
| 52 | - const: avdd | ||
| 53 | 49 | ||
| 54 | adi,rejection-60-Hz-enable: | 50 | adi,rejection-60-Hz-enable: |
| 55 | description: | | 51 | description: | |
| @@ -99,6 +95,9 @@ required: · 43 unmodified lines | |||
| 99 | examples: | 95 | examples: |
| 100 | - | | 96 | - | |
| 101 | spi0 { | 97 | spi0 { |
| 98 | #address-cells = <1>; | ||
| 99 | #size-cells = <0>; | ||
| 100 | |||
| 102 | adc@0 { | 101 | adc@0 { |
| 103 | compatible = "adi,ad7192"; | 102 | compatible = "adi,ad7192"; |
| 104 | reg = <0>; | 103 | reg = <0>; |
| @@ -1,8 +1,11 @@ | |||
| 1 | * Advanced Interrupt Controller (AIC) | 1 | * Advanced Interrupt Controller (AIC) |
| 2 | 2 | ||
| 3 | Required properties: | 3 | Required properties: |
| 4 | - compatible: Should be "atmel,<chip>-aic" | 4 | - compatible: Should be: |
| 5 | <chip> can be "at91rm9200", "sama5d2", "sama5d3" or "sama5d4" | 5 | - "atmel,<chip>-aic" where <chip> can be "at91rm9200", "sama5d2", |
| 6 | "sama5d3" or "sama5d4" | ||
| 7 | - "microchip,<chip>-aic" where <chip> can be "sam9x60" | ||
| 8 | |||
| 6 | - interrupt-controller: Identifies the node as an interrupt controller. | 9 | - interrupt-controller: Identifies the node as an interrupt controller. |
| 7 | - #interrupt-cells: The number of cells to define the interrupts. It should be 3. | 10 | - #interrupt-cells: The number of cells to define the interrupts. It should be 3. |
| 8 | The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). | 11 | The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). |
| @@ -73,7 +73,6 @@ properties: · 72 unmodified lines | |||
| 73 | - rc-genius-tvgo-a11mce | 73 | - rc-genius-tvgo-a11mce |
| 74 | - rc-gotview7135 | 74 | - rc-gotview7135 |
| 75 | - rc-hauppauge | 75 | - rc-hauppauge |
| 76 | - rc-hauppauge | ||
| 77 | - rc-hisi-poplar | 76 | - rc-hisi-poplar |
| 78 | - rc-hisi-tv-demo | 77 | - rc-hisi-tv-demo |
| 79 | - rc-imon-mce | 78 | - rc-imon-mce |
| @@ -37,7 +37,7 @@ properties: · 36 unmodified lines | |||
| 37 | - description: exclusive PHY reset line | 37 | - description: exclusive PHY reset line |
| 38 | - description: shared reset line between the PCIe PHY and PCIe controller | 38 | - description: shared reset line between the PCIe PHY and PCIe controller |
| 39 | 39 | ||
| 40 | resets-names: | 40 | reset-names: |
| 41 | items: | 41 | items: |
| 42 | - const: phy | 42 | - const: phy |
| 43 | - const: pcie | 43 | - const: pcie |
| @@ -26,6 +26,8 @@ Required properties: · 25 unmodified lines | |||
| 26 | - "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART. | 26 | - "renesas,hscif-r8a77470" for R8A77470 (RZ/G1C) HSCIF compatible UART. |
| 27 | - "renesas,scif-r8a774a1" for R8A774A1 (RZ/G2M) SCIF compatible UART. | 27 | - "renesas,scif-r8a774a1" for R8A774A1 (RZ/G2M) SCIF compatible UART. |
| 28 | - "renesas,hscif-r8a774a1" for R8A774A1 (RZ/G2M) HSCIF compatible UART. | 28 | - "renesas,hscif-r8a774a1" for R8A774A1 (RZ/G2M) HSCIF compatible UART. |
| 29 | - "renesas,scif-r8a774b1" for R8A774B1 (RZ/G2N) SCIF compatible UART. | ||
| 30 | - "renesas,hscif-r8a774b1" for R8A774B1 (RZ/G2N) HSCIF compatible UART. | ||
| 29 | - "renesas,scif-r8a774c0" for R8A774C0 (RZ/G2E) SCIF compatible UART. | 31 | - "renesas,scif-r8a774c0" for R8A774C0 (RZ/G2E) SCIF compatible UART. |
| 30 | - "renesas,hscif-r8a774c0" for R8A774C0 (RZ/G2E) HSCIF compatible UART. | 32 | - "renesas,hscif-r8a774c0" for R8A774C0 (RZ/G2E) HSCIF compatible UART. |
| 31 | - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART. | 33 | - "renesas,scif-r8a7778" for R8A7778 (R-Car M1) SCIF compatible UART. |
| @@ -63,7 +63,11 @@ properties: · 62 unmodified lines | |||
| 63 | description: | 63 | description: |
| 64 | Set this flag to force EHCI reset after resume. | 64 | Set this flag to force EHCI reset after resume. |
| 65 | 65 | ||
| 66 | phys: true | 66 | phys: |
| 67 | description: PHY specifier for the USB PHY | ||
| 68 | |||
| 69 | phy-names: | ||
| 70 | const: usb | ||
| 67 | 71 | ||
| 68 | required: | 72 | required: |
| 69 | - compatible | 73 | - compatible |
| @@ -89,6 +93,7 @@ examples: · 19 unmodified lines | |||
| 89 | interrupts = <39>; | 93 | interrupts = <39>; |
| 90 | clocks = <&ahb_gates 1>; | 94 | clocks = <&ahb_gates 1>; |
| 91 | phys = <&usbphy 1>; | 95 | phys = <&usbphy 1>; |
| 96 | phy-names = "usb"; | ||
| 92 | }; | 97 | }; |
| 93 | 98 | ||
| 94 | ... | 99 | ... |
| @@ -67,7 +67,11 @@ properties: · 66 unmodified lines | |||
| 67 | description: | 67 | description: |
| 68 | Overrides the detected port count | 68 | Overrides the detected port count |
| 69 | 69 | ||
| 70 | phys: true | 70 | phys: |
| 71 | description: PHY specifier for the USB PHY | ||
| 72 | |||
| 73 | phy-names: | ||
| 74 | const: usb | ||
| 71 | 75 | ||
| 72 | required: | 76 | required: |
| 73 | - compatible | 77 | - compatible |
| @@ -84,6 +88,7 @@ examples: · 10 unmodified lines | |||
| 84 | interrupts = <64>; | 88 | interrupts = <64>; |
| 85 | clocks = <&usb_clk 6>, <&ahb_gates 2>; | 89 | clocks = <&usb_clk 6>, <&ahb_gates 2>; |
| 86 | phys = <&usbphy 1>; | 90 | phys = <&usbphy 1>; |
| 91 | phy-names = "usb"; | ||
| 87 | }; | 92 | }; |
| 88 | 93 | ||
| 89 | ... | 94 | ... |
| @@ -33,7 +33,7 @@ Required properties: · 32 unmodified lines | |||
| 33 | "dma_ck": dma_bus clock for data transfer by DMA, | 33 | "dma_ck": dma_bus clock for data transfer by DMA, |
| 34 | "xhci_ck": controller clock | 34 | "xhci_ck": controller clock |
| 35 | 35 | ||
| 36 | - phys : see usb-hcd.txt in the current directory | 36 | - phys : see usb-hcd.yaml in the current directory |
| 37 | 37 | ||
| 38 | Optional properties: | 38 | Optional properties: |
| 39 | - wakeup-source : enable USB remote wakeup; | 39 | - wakeup-source : enable USB remote wakeup; |
| @@ -53,7 +53,7 @@ Optional properties: · 13 unmodified lines | |||
| 53 | See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt | 53 | See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt |
| 54 | - imod-interval-ns: default interrupt moderation interval is 5000ns | 54 | - imod-interval-ns: default interrupt moderation interval is 5000ns |
| 55 | 55 | ||
| 56 | additionally the properties from usb-hcd.txt (in the current directory) are | 56 | additionally the properties from usb-hcd.yaml (in the current directory) are |
| 57 | supported. | 57 | supported. |
| 58 | 58 | ||
| 59 | Example: | 59 | Example: |
| @@ -17,7 +17,7 @@ Required properties: · 16 unmodified lines | |||
| 17 | - clock-names : must contain "sys_ck" for clock of controller, | 17 | - clock-names : must contain "sys_ck" for clock of controller, |
| 18 | the following clocks are optional: | 18 | the following clocks are optional: |
| 19 | "ref_ck", "mcu_ck" and "dma_ck"; | 19 | "ref_ck", "mcu_ck" and "dma_ck"; |
| 20 | - phys : see usb-hcd.txt in the current directory | 20 | - phys : see usb-hcd.yaml in the current directory |
| 21 | - dr_mode : should be one of "host", "peripheral" or "otg", | 21 | - dr_mode : should be one of "host", "peripheral" or "otg", |
| 22 | refer to usb/generic.txt | 22 | refer to usb/generic.txt |
| 23 | 23 | ||
| @@ -60,7 +60,7 @@ Optional properties: · 36 unmodified lines | |||
| 60 | - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0, | 60 | - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0, |
| 61 | bit1 for u3port1, ... etc; | 61 | bit1 for u3port1, ... etc; |
| 62 | 62 | ||
| 63 | additionally the properties from usb-hcd.txt (in the current directory) are | 63 | additionally the properties from usb-hcd.yaml (in the current directory) are |
| 64 | supported. | 64 | supported. |
| 65 | 65 | ||
| 66 | Sub-nodes: | 66 | Sub-nodes: |
| @@ -18,8 +18,13 @@ properties: · 17 unmodified lines | |||
| 18 | description: | 18 | description: |
| 19 | List of all the USB PHYs on this HCD | 19 | List of all the USB PHYs on this HCD |
| 20 | 20 | ||
| 21 | phy-names: | ||
| 22 | description: | ||
| 23 | Name specifier for the USB PHY | ||
| 24 | |||
| 21 | examples: | 25 | examples: |
| 22 | - | | 26 | - | |
| 23 | usb { | 27 | usb { |
| 24 | phys = <&usb2_phy1>, <&usb3_phy1>; | 28 | phys = <&usb2_phy1>, <&usb3_phy1>; |
| 29 | phy-names = "usb"; | ||
| 25 | }; | 30 | }; |
| @@ -6,7 +6,7 @@ Required properties: · 5 unmodified lines | |||
| 6 | - reg : Should contain 1 register ranges(address and length) | 6 | - reg : Should contain 1 register ranges(address and length) |
| 7 | - interrupts : UHCI controller interrupt | 7 | - interrupts : UHCI controller interrupt |
| 8 | 8 | ||
| 9 | additionally the properties from usb-hcd.txt (in the current directory) are | 9 | additionally the properties from usb-hcd.yaml (in the current directory) are |
| 10 | supported. | 10 | supported. |
| 11 | 11 | ||
| 12 | Example: | 12 | Example: |
| @@ -41,9 +41,9 @@ Optional properties: · 40 unmodified lines | |||
| 41 | - usb3-lpm-capable: determines if platform is USB3 LPM capable | 41 | - usb3-lpm-capable: determines if platform is USB3 LPM capable |
| 42 | - quirk-broken-port-ped: set if the controller has broken port disable mechanism | 42 | - quirk-broken-port-ped: set if the controller has broken port disable mechanism |
| 43 | - imod-interval-ns: default interrupt moderation interval is 5000ns | 43 | - imod-interval-ns: default interrupt moderation interval is 5000ns |
| 44 | - phys : see usb-hcd.txt in the current directory | 44 | - phys : see usb-hcd.yaml in the current directory |
| 45 | 45 | ||
| 46 | additionally the properties from usb-hcd.txt (in the current directory) are | 46 | additionally the properties from usb-hcd.yaml (in the current directory) are |
| 47 | supported. | 47 | supported. |
| 48 | 48 | ||
| 49 | 49 | ||
| @@ -7,6 +7,7 @@ Linux Hardware Monitoring · 6 unmodified lines | |||
| 7 | 7 | ||
| 8 | hwmon-kernel-api | 8 | hwmon-kernel-api |
| 9 | pmbus-core | 9 | pmbus-core |
| 10 | inspur-ipsps1 | ||
| 10 | submitting-patches | 11 | submitting-patches |
| 11 | sysfs-interface | 12 | sysfs-interface |
| 12 | userspace-tools | 13 | userspace-tools |
| @@ -1,5 +1,5 @@ | |||
| 1 | Kernel driver inspur-ipsps1 | 1 | Kernel driver inspur-ipsps1 |
| 2 | ======================= | 2 | =========================== |
| 3 | 3 | ||
| 4 | Supported chips: | 4 | Supported chips: |
| 5 | 5 | ||
| @@ -21,10 +21,17 @@ Supported chips: · 20 unmodified lines | |||
| 21 | 21 | ||
| 22 | * AMD Family 14h processors: "Brazos" (C/E/G/Z-Series) | 22 | * AMD Family 14h processors: "Brazos" (C/E/G/Z-Series) |
| 23 | 23 | ||
| 24 | * AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity", "Kaveri", "Carrizo" | 24 | * AMD Family 15h processors: "Bulldozer" (FX-Series), "Trinity", "Kaveri", |
| 25 | "Carrizo", "Stoney Ridge", "Bristol Ridge" | ||
| 25 | 26 | ||
| 26 | * AMD Family 16h processors: "Kabini", "Mullins" | 27 | * AMD Family 16h processors: "Kabini", "Mullins" |
| 27 | 28 | ||
| 29 | * AMD Family 17h processors: "Zen", "Zen 2" | ||
| 30 | |||
| 31 | * AMD Family 18h processors: "Hygon Dhyana" | ||
| 32 | |||
| 33 | * AMD Family 19h processors: "Zen 3" | ||
| 34 | |||
| 28 | Prefix: 'k10temp' | 35 | Prefix: 'k10temp' |
| 29 | 36 | ||
| 30 | Addresses scanned: PCI space | 37 | Addresses scanned: PCI space |
| @@ -110,3 +117,12 @@ The maximum value for Tctl is available in the file temp1_max. · 79 unmodified lines | |||
| 110 | If the BIOS has enabled hardware temperature control, the threshold at | 117 | If the BIOS has enabled hardware temperature control, the threshold at |
| 111 | which the processor will throttle itself to avoid damage is available in | 118 | which the processor will throttle itself to avoid damage is available in |
| 112 | temp1_crit and temp1_crit_hyst. | 119 | temp1_crit and temp1_crit_hyst. |
| 120 | |||
| 121 | On some AMD CPUs, there is a difference between the die temperature (Tdie) and | ||
| 122 | the reported temperature (Tctl). Tdie is the real measured temperature, and | ||
| 123 | Tctl is used for fan control. While Tctl is always available as temp1_input, | ||
| 124 | the driver exports Tdie temperature as temp2_input for those CPUs which support | ||
| 125 | it. | ||
| 126 | |||
| 127 | Models from 17h family report relative temperature, the driver aims to | ||
| 128 | compensate and report the real temperature. | ||
| @@ -954,11 +954,6 @@ When kbuild executes, the following steps are followed (roughly): · 953 unmodified lines | |||
| 954 | 954 | ||
| 955 | From commandline LDFLAGS_MODULE shall be used (see kbuild.txt). | 955 | From commandline LDFLAGS_MODULE shall be used (see kbuild.txt). |
| 956 | 956 | ||
| 957 | KBUILD_ARFLAGS Options for $(AR) when creating archives | ||
| 958 | |||
| 959 | $(KBUILD_ARFLAGS) set by the top level Makefile to "D" (deterministic | ||
| 960 | mode) if this option is supported by $(AR). | ||
| 961 | |||
| 962 | KBUILD_LDS | 957 | KBUILD_LDS |
| 963 | 958 | ||
| 964 | The linker script with full path. Assigned by the top-level Makefile. | 959 | The linker script with full path. Assigned by the top-level Makefile. |
| @@ -498,10 +498,11 @@ build. · 497 unmodified lines | |||
| 498 | will be written containing all exported symbols that were not | 498 | will be written containing all exported symbols that were not |
| 499 | defined in the kernel. | 499 | defined in the kernel. |
| 500 | 500 | ||
| 501 | --- 6.3 Symbols From Another External Module | 501 | 6.3 Symbols From Another External Module |
| 502 | ---------------------------------------- | ||
| 502 | 503 | ||
| 503 | Sometimes, an external module uses exported symbols from | 504 | Sometimes, an external module uses exported symbols from |
| 504 | another external module. kbuild needs to have full knowledge of | 505 | another external module. Kbuild needs to have full knowledge of |
| 505 | all symbols to avoid spitting out warnings about undefined | 506 | all symbols to avoid spitting out warnings about undefined |
| 506 | symbols. Three solutions exist for this situation. | 507 | symbols. Three solutions exist for this situation. |
| 507 | 508 | ||
| @@ -521,7 +522,7 @@ build. · 13 unmodified lines | |||
| 521 | The top-level kbuild file would then look like:: | 522 | The top-level kbuild file would then look like:: |
| 522 | 523 | ||
| 523 | #./Kbuild (or ./Makefile): | 524 | #./Kbuild (or ./Makefile): |
| 524 | obj-y := foo/ bar/ | 525 | obj-m := foo/ bar/ |
| 525 | 526 | ||
| 526 | And executing:: | 527 | And executing:: |
| 527 | 528 | ||
| @@ -16,16 +16,21 @@ the kernel may be unreproducible, and how to avoid them. · 15 unmodified lines | |||
| 16 | Timestamps | 16 | Timestamps |
| 17 | ---------- | 17 | ---------- |
| 18 | 18 | ||
| 19 | The kernel embeds a timestamp in two places: | 19 | The kernel embeds timestamps in three places: |
| 20 | 20 | ||
| 21 | * The version string exposed by ``uname()`` and included in | 21 | * The version string exposed by ``uname()`` and included in |
| 22 | ``/proc/version`` | 22 | ``/proc/version`` |
| 23 | 23 | ||
| 24 | * File timestamps in the embedded initramfs | 24 | * File timestamps in the embedded initramfs |
| 25 | 25 | ||
| 26 | By default the timestamp is the current time. This must be overridden | 26 | * If enabled via ``CONFIG_IKHEADERS``, file timestamps of kernel |
| 27 | using the `KBUILD_BUILD_TIMESTAMP`_ variable. If you are building | 27 | headers embedded in the kernel or respective module, |
| 28 | from a git commit, you could use its commit date. | 28 | exposed via ``/sys/kernel/kheaders.tar.xz`` |
| 29 | |||
| 30 | By default the timestamp is the current time and in the case of | ||
| 31 | ``kheaders`` the various files' modification times. This must | ||
| 32 | be overridden using the `KBUILD_BUILD_TIMESTAMP`_ variable. | ||
| 33 | If you are building from a git commit, you could use its commit date. | ||
| 29 | 34 | ||
| 30 | The kernel does *not* use the ``__DATE__`` and ``__TIME__`` macros, | 35 | The kernel does *not* use the ``__DATE__`` and ``__TIME__`` macros, |
| 31 | and enables warnings if they are used. If you incorporate external | 36 | and enables warnings if they are used. If you incorporate external |
| @@ -23,6 +23,7 @@ Contents: · 22 unmodified lines | |||
| 23 | intel/ice | 23 | intel/ice |
| 24 | google/gve | 24 | google/gve |
| 25 | mellanox/mlx5 | 25 | mellanox/mlx5 |
| 26 | netronome/nfp | ||
| 26 | pensando/ionic | 27 | pensando/ionic |
| 27 | 28 | ||
| 28 | .. only:: subproject and html | 29 | .. only:: subproject and html |
| @@ -36,8 +36,10 @@ Support · 35 unmodified lines | |||
| 36 | ======= | 36 | ======= |
| 37 | For general Linux networking support, please use the netdev mailing | 37 | For general Linux networking support, please use the netdev mailing |
| 38 | list, which is monitored by Pensando personnel:: | 38 | list, which is monitored by Pensando personnel:: |
| 39 | |||
| 39 | netdev@vger.kernel.org | 40 | netdev@vger.kernel.org |
| 40 | 41 | ||
| 41 | For more specific support needs, please use the Pensando driver support | 42 | For more specific support needs, please use the Pensando driver support |
| 42 | email:: | 43 | email:: |
| 43 | drivers@pensando.io | 44 | |
| 45 | drivers@pensando.io | ||
| @@ -272,7 +272,7 @@ supported flags are: · 271 unmodified lines | |||
| 272 | * MSG_DONTWAIT, i.e. non-blocking operation. | 272 | * MSG_DONTWAIT, i.e. non-blocking operation. |
| 273 | 273 | ||
| 274 | recvmsg(2) | 274 | recvmsg(2) |
| 275 | ^^^^^^^^^ | 275 | ^^^^^^^^^^ |
| 276 | 276 | ||
| 277 | In most cases recvmsg(2) is needed if you want to extract more information than | 277 | In most cases recvmsg(2) is needed if you want to extract more information than |
| 278 | recvfrom(2) can provide. For example package priority and timestamp. The | 278 | recvfrom(2) can provide. For example package priority and timestamp. The |
| @@ -92,16 +92,16 @@ under some conditions. · 91 unmodified lines | |||
| 92 | Part III: Registering a Network Device to DIM | 92 | Part III: Registering a Network Device to DIM |
| 93 | ============================================== | 93 | ============================================== |
| 94 | 94 | ||
| 95 | Net DIM API exposes the main function net_dim(struct net_dim *dim, | 95 | Net DIM API exposes the main function net_dim(struct dim *dim, |
| 96 | struct net_dim_sample end_sample). This function is the entry point to the Net | 96 | struct dim_sample end_sample). This function is the entry point to the Net |
| 97 | DIM algorithm and has to be called every time the driver would like to check if | 97 | DIM algorithm and has to be called every time the driver would like to check if |
| 98 | it should change interrupt moderation parameters. The driver should provide two | 98 | it should change interrupt moderation parameters. The driver should provide two |
| 99 | data structures: struct net_dim and struct net_dim_sample. Struct net_dim | 99 | data structures: struct dim and struct dim_sample. Struct dim |
| 100 | describes the state of DIM for a specific object (RX queue, TX queue, | 100 | describes the state of DIM for a specific object (RX queue, TX queue, |
| 101 | other queues, etc.). This includes the current selected profile, previous data | 101 | other queues, etc.). This includes the current selected profile, previous data |
| 102 | samples, the callback function provided by the driver and more. | 102 | samples, the callback function provided by the driver and more. |
| 103 | Struct net_dim_sample describes a data sample, which will be compared to the | 103 | Struct dim_sample describes a data sample, which will be compared to the |
| 104 | data sample stored in struct net_dim in order to decide on the algorithm's next | 104 | data sample stored in struct dim in order to decide on the algorithm's next |
| 105 | step. The sample should include bytes, packets and interrupts, measured by | 105 | step. The sample should include bytes, packets and interrupts, measured by |
| 106 | the driver. | 106 | the driver. |
| 107 | 107 | ||
| @@ -110,9 +110,9 @@ main net_dim() function. The recommended method is to call net_dim() on each · 2 unmodified lines | |||
| 110 | interrupt. Since Net DIM has a built-in moderation and it might decide to skip | 110 | interrupt. Since Net DIM has a built-in moderation and it might decide to skip |
| 111 | iterations under certain conditions, there is no need to moderate the net_dim() | 111 | iterations under certain conditions, there is no need to moderate the net_dim() |
| 112 | calls as well. As mentioned above, the driver needs to provide an object of type | 112 | calls as well. As mentioned above, the driver needs to provide an object of type |
| 113 | struct net_dim to the net_dim() function call. It is advised for each entity | 113 | struct dim to the net_dim() function call. It is advised for each entity |
| 114 | using Net DIM to hold a struct net_dim as part of its data structure and use it | 114 | using Net DIM to hold a struct dim as part of its data structure and use it |
| 115 | as the main Net DIM API object. The struct net_dim_sample should hold the latest | 115 | as the main Net DIM API object. The struct dim_sample should hold the latest |
| 116 | bytes, packets and interrupts count. No need to perform any calculations, just | 116 | bytes, packets and interrupts count. No need to perform any calculations, just |
| 117 | include the raw data. | 117 | include the raw data. |
| 118 | 118 | ||
| @@ -132,19 +132,19 @@ usage is not complete but it should make the outline of the usage clear. · 13 unmodified lines | |||
| 132 | 132 | ||
| 133 | my_driver.c: | 133 | my_driver.c: |
| 134 | 134 | ||
| 135 | #include <linux/net_dim.h> | 135 | #include <linux/dim.h> |
| 136 | 136 | ||
| 137 | /* Callback for net DIM to schedule on a decision to change moderation */ | 137 | /* Callback for net DIM to schedule on a decision to change moderation */ |
| 138 | void my_driver_do_dim_work(struct work_struct *work) | 138 | void my_driver_do_dim_work(struct work_struct *work) |
| 139 | { | 139 | { |
| 140 | /* Get struct net_dim from struct work_struct */ | 140 | /* Get struct dim from struct work_struct */ |
| 141 | struct net_dim *dim = container_of(work, struct net_dim, | 141 | struct dim *dim = container_of(work, struct dim, |
| 142 | work); | 142 | work); |
| 143 | /* Do interrupt moderation related stuff */ | 143 | /* Do interrupt moderation related stuff */ |
| 144 | ... | 144 | ... |
| 145 | 145 | ||
| 146 | /* Signal net DIM work is done and it should move to next iteration */ | 146 | /* Signal net DIM work is done and it should move to next iteration */ |
| 147 | dim->state = NET_DIM_START_MEASURE; | 147 | dim->state = DIM_START_MEASURE; |
| 148 | } | 148 | } |
| 149 | 149 | ||
| 150 | /* My driver's interrupt handler */ | 150 | /* My driver's interrupt handler */ |
| @@ -152,13 +152,13 @@ int my_driver_handle_interrupt(struct my_driver_entity *my_entity, ...) · 1 unmodified line | |||
| 152 | { | 152 | { |
| 153 | ... | 153 | ... |
| 154 | /* A struct to hold current measured data */ | 154 | /* A struct to hold current measured data */ |
| 155 | struct net_dim_sample dim_sample; | 155 | struct dim_sample dim_sample; |
| 156 | ... | 156 | ... |
| 157 | /* Initiate data sample struct with current data */ | 157 | /* Initiate data sample struct with current data */ |
| 158 | net_dim_sample(my_entity->events, | 158 | dim_update_sample(my_entity->events, |
| 159 | my_entity->packets, | 159 | my_entity->packets, |
| 160 | my_entity->bytes, | 160 | my_entity->bytes, |
| 161 | &dim_sample); | 161 | &dim_sample); |
| 162 | /* Call net DIM */ | 162 | /* Call net DIM */ |
| 163 | net_dim(&my_entity->dim, dim_sample); | 163 | net_dim(&my_entity->dim, dim_sample); |
| 164 | ... | 164 | ... |
| @@ -56,7 +56,7 @@ instead of ``double-indenting`` the ``case`` labels. E.g.: · 55 unmodified lines | |||
| 56 | case 'K': | 56 | case 'K': |
| 57 | case 'k': | 57 | case 'k': |
| 58 | mem <<= 10; | 58 | mem <<= 10; |
| 59 | /* fall through */ | 59 | fallthrough; |
| 60 | default: | 60 | default: |
| 61 | break; | 61 | break; |
| 62 | } | 62 | } |
| @@ -122,14 +122,27 @@ memory adjacent to the stack (when built without `CONFIG_VMAP_STACK=y`) · 121 unmodified lines | |||
| 122 | 122 | ||
| 123 | Implicit switch case fall-through | 123 | Implicit switch case fall-through |
| 124 | --------------------------------- | 124 | --------------------------------- |
| 125 | The C language allows switch cases to "fall through" when | 125 | The C language allows switch cases to "fall-through" when a "break" statement |
| 126 | a "break" statement is missing at the end of a case. This, | 126 | is missing at the end of a case. This, however, introduces ambiguity in the |
| 127 | however, introduces ambiguity in the code, as it's not always | 127 | code, as it's not always clear if the missing break is intentional or a bug. |
| 128 | clear if the missing break is intentional or a bug. As there | 128 | |
| 129 | have been a long list of flaws `due to missing "break" statements | 129 | As there have been a long list of flaws `due to missing "break" statements |
| 130 | <https://cwe.mitre.org/data/definitions/484.html>`_, we no longer allow | 130 | <https://cwe.mitre.org/data/definitions/484.html>`_, we no longer allow |
| 131 | "implicit fall-through". In order to identify an intentional fall-through | 131 | "implicit fall-through". |
| 132 | case, we have adopted the marking used by static analyzers: a comment | 132 | |
| 133 | saying `/* Fall through */`. Once the C++17 `__attribute__((fallthrough))` | 133 | In order to identify intentional fall-through cases, we have adopted a |
| 134 | is more widely handled by C compilers, static analyzers, and IDEs, we can | 134 | pseudo-keyword macro 'fallthrough' which expands to gcc's extension |
| 135 | switch to using that instead. | 135 | __attribute__((__fallthrough__)). `Statement Attributes |
| 136 | <https://gcc.gnu.org/onlinedocs/gcc/Statement-Attributes.html>`_ | ||
| 137 | |||
| 138 | When the C17/C18 [[fallthrough]] syntax is more commonly supported by | ||
| 139 | C compilers, static analyzers, and IDEs, we can switch to using that syntax | ||
| 140 | for the macro pseudo-keyword. | ||
| 141 | |||
| 142 | All switch/case blocks must end in one of: | ||
| 143 | |||
| 144 | break; | ||
| 145 | fallthrough; | ||
| 146 | continue; | ||
| 147 | goto <label>; | ||
| 148 | return [expression]; | ||
| @@ -1,109 +0,0 @@ | |||
| 1 | ============ | ||
| 2 | Diamonds Rio | ||
| 3 | ============ | ||
| 4 | |||
| 5 | Copyright (C) 1999, 2000 Bruce Tenison | ||
| 6 | |||
| 7 | Portions Copyright (C) 1999, 2000 David Nelson | ||
| 8 | |||
| 9 | Thanks to David Nelson for guidance and the usage of the scanner.txt | ||
| 10 | and scanner.c files to model our driver and this informative file. | ||
| 11 | |||
| 12 | Mar. 2, 2000 | ||
| 13 | |||
| 14 | Changes | ||
| 15 | ======= | ||
| 16 | |||
| 17 | - Initial Revision | ||
| 18 | |||
| 19 | |||
| 20 | Overview | ||
| 21 | ======== | ||
| 22 | |||
| 23 | This README will address issues regarding how to configure the kernel | ||
| 24 | to access a RIO 500 mp3 player. | ||
| 25 | Before I explain how to use this to access the Rio500 please be warned: | ||
| 26 | |||
| 27 | .. warning:: | ||
| 28 | |||
| 29 | Please note that this software is still under development. The authors | ||
| 30 | are in no way responsible for any damage that may occur, no matter how | ||
| 31 | inconsequential. | ||
| 32 | |||
| 33 | It seems that the Rio has a problem when sending .mp3 with low batteries. | ||
| 34 | I suggest when the batteries are low and you want to transfer stuff that you | ||
| 35 | replace it with a fresh one. In my case, what happened is I lost two 16kb | ||
| 36 | blocks (they are no longer usable to store information to it). But I don't | ||
| 37 | know if that's normal or not; it could simply be a problem with the flash | ||
| 38 | memory. | ||
| 39 | |||
| 40 | In an extreme case, I left my Rio playing overnight and the batteries wore | ||
| 41 | down to nothing and appear to have corrupted the flash memory. My RIO | ||
| 42 | needed to be replaced as a result. Diamond tech support is aware of the | ||
| 43 | problem. Do NOT allow your batteries to wear down to nothing before | ||
| 44 | changing them. It appears RIO 500 firmware does not handle low battery | ||
| 45 | power well at all. | ||
| 46 | |||
| 47 | On systems with OHCI controllers, the kernel OHCI code appears to have | ||
| 48 | power on problems with some chipsets. If you are having problems | ||
| 49 | connecting to your RIO 500, try turning it on first and then plugging it | ||
| 50 | into the USB cable. | ||
| 51 | |||
| 52 | Contact Information | ||
| 53 | ------------------- | ||
| 54 | |||
| 55 | The main page for the project is hosted at sourceforge.net in the following | ||
| 56 | URL: <http://rio500.sourceforge.net>. You can also go to the project's | ||
| 57 | sourceforge home page at: <http://sourceforge.net/projects/rio500/>. | ||
| 58 | There is also a mailing list: rio500-users@lists.sourceforge.net | ||
| 59 | |||
| 60 | Authors | ||
| 61 | ------- | ||
| 62 | |||
| 63 | Most of the code was written by Cesar Miquel <miquel@df.uba.ar>. Keith | ||
| 64 | Clayton <kclayton@jps.net> is incharge of the PPC port and making sure | ||
| 65 | things work there. Bruce Tenison <btenison@dibbs.net> is adding support | ||
| 66 | for .fon files and also does testing. The program will mostly sure be | ||
| 67 | re-written and Pete Ikusz along with the rest will re-design it. I would | ||
| 68 | also like to thank Tri Nguyen <tmn_3022000@hotmail.com> who provided use | ||
| 69 | with some important information regarding the communication with the Rio. | ||
| 70 | |||
| 71 | Additional Information and userspace tools | ||
| 72 | |||
| 73 | http://rio500.sourceforge.net/ | ||
| 74 | |||
| 75 | |||
| 76 | Requirements | ||
| 77 | ============ | ||
| 78 | |||
| 79 | A host with a USB port running a Linux kernel with RIO 500 support enabled. | ||
| 80 | |||
| 81 | The driver is a module called rio500, which should be automatically loaded | ||
| 82 | as you plug in your device. If that fails you can manually load it with | ||
| 83 | |||
| 84 | modprobe rio500 | ||
| 85 | |||
| 86 | Udev should automatically create a device node as soon as plug in your device. | ||
| 87 | If that fails, you can manually add a device for the USB rio500:: | ||
| 88 | |||
| 89 | mknod /dev/usb/rio500 c 180 64 | ||
| 90 | |||
| 91 | In that case, set appropriate permissions for /dev/usb/rio500 (don't forget | ||
| 92 | about group and world permissions). Both read and write permissions are | ||
| 93 | required for proper operation. | ||
| 94 | |||
| 95 | That's it. The Rio500 Utils at: http://rio500.sourceforge.net should | ||
| 96 | be able to access the rio500. | ||
| 97 | |||
| 98 | Limits | ||
| 99 | ====== | ||
| 100 | |||
| 101 | You can use only a single rio500 device at a time with your computer. | ||
| 102 | |||
| 103 | Bugs | ||
| 104 | ==== | ||
| 105 | |||
| 106 | If you encounter any problems feel free to drop me an email. | ||
| 107 | |||
| 108 | Bruce Tenison | ||
| 109 | btenison@dibbs.net | ||
| @@ -2167,12 +2167,10 @@ F: arch/arm64/boot/dts/realtek/ · 2166 unmodified lines | |||
| 2167 | F: Documentation/devicetree/bindings/arm/realtek.yaml | 2167 | F: Documentation/devicetree/bindings/arm/realtek.yaml |
| 2168 | 2168 | ||
| 2169 | ARM/RENESAS ARM64 ARCHITECTURE | 2169 | ARM/RENESAS ARM64 ARCHITECTURE |
| 2170 | M: Simon Horman <horms@verge.net.au> | ||
| 2171 | M: Geert Uytterhoeven <geert+renesas@glider.be> | 2170 | M: Geert Uytterhoeven <geert+renesas@glider.be> |
| 2172 | M: Magnus Damm <magnus.damm@gmail.com> | 2171 | M: Magnus Damm <magnus.damm@gmail.com> |
| 2173 | L: linux-renesas-soc@vger.kernel.org | 2172 | L: linux-renesas-soc@vger.kernel.org |
| 2174 | Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ | 2173 | Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ |
| 2175 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next | ||
| 2176 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next | 2174 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next |
| 2177 | S: Supported | 2175 | S: Supported |
| 2178 | F: arch/arm64/boot/dts/renesas/ | 2176 | F: arch/arm64/boot/dts/renesas/ |
| @@ -2284,12 +2282,10 @@ S: Maintained · 105 unmodified lines | |||
| 2284 | F: drivers/media/platform/s5p-mfc/ | 2282 | F: drivers/media/platform/s5p-mfc/ |
| 2285 | 2283 | ||
| 2286 | ARM/SHMOBILE ARM ARCHITECTURE | 2284 | ARM/SHMOBILE ARM ARCHITECTURE |
| 2287 | M: Simon Horman <horms@verge.net.au> | ||
| 2288 | M: Geert Uytterhoeven <geert+renesas@glider.be> | 2285 | M: Geert Uytterhoeven <geert+renesas@glider.be> |
| 2289 | M: Magnus Damm <magnus.damm@gmail.com> | 2286 | M: Magnus Damm <magnus.damm@gmail.com> |
| 2290 | L: linux-renesas-soc@vger.kernel.org | 2287 | L: linux-renesas-soc@vger.kernel.org |
| 2291 | Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ | 2288 | Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/ |
| 2292 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next | ||
| 2293 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next | 2289 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git next |
| 2294 | S: Supported | 2290 | S: Supported |
| 2295 | F: arch/arm/boot/dts/emev2* | 2291 | F: arch/arm/boot/dts/emev2* |
| @@ -6114,7 +6110,10 @@ M: Gao Xiang <gaoxiang25@huawei.com> · 3818 unmodified lines | |||
| 6114 | M: Chao Yu <yuchao0@huawei.com> | 6110 | M: Chao Yu <yuchao0@huawei.com> |
| 6115 | L: linux-erofs@lists.ozlabs.org | 6111 | L: linux-erofs@lists.ozlabs.org |
| 6116 | S: Maintained | 6112 | S: Maintained |
| 6113 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs.git | ||
| 6114 | F: Documentation/filesystems/erofs.txt | ||
| 6117 | F: fs/erofs/ | 6115 | F: fs/erofs/ |
| 6116 | F: include/trace/events/erofs.h | ||
| 6118 | 6117 | ||
| 6119 | ERRSEQ ERROR TRACKING INFRASTRUCTURE | 6118 | ERRSEQ ERROR TRACKING INFRASTRUCTURE |
| 6120 | M: Jeff Layton <jlayton@kernel.org> | 6119 | M: Jeff Layton <jlayton@kernel.org> |
| @@ -9077,6 +9076,7 @@ F: security/keys/ · 2956 unmodified lines | |||
| 9077 | KGDB / KDB /debug_core | 9076 | KGDB / KDB /debug_core |
| 9078 | M: Jason Wessel <jason.wessel@windriver.com> | 9077 | M: Jason Wessel <jason.wessel@windriver.com> |
| 9079 | M: Daniel Thompson <daniel.thompson@linaro.org> | 9078 | M: Daniel Thompson <daniel.thompson@linaro.org> |
| 9079 | R: Douglas Anderson <dianders@chromium.org> | ||
| 9080 | W: http://kgdb.wiki.kernel.org/ | 9080 | W: http://kgdb.wiki.kernel.org/ |
| 9081 | L: kgdb-bugreport@lists.sourceforge.net | 9081 | L: kgdb-bugreport@lists.sourceforge.net |
| 9082 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/kgdb.git | 9082 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/jwessel/kgdb.git |
| @@ -9124,7 +9124,7 @@ F: drivers/auxdisplay/ks0108.c · 41 unmodified lines | |||
| 9124 | F: include/linux/ks0108.h | 9124 | F: include/linux/ks0108.h |
| 9125 | 9125 | ||
| 9126 | L3MDEV | 9126 | L3MDEV |
| 9127 | M: David Ahern <dsa@cumulusnetworks.com> | 9127 | M: David Ahern <dsahern@kernel.org> |
| 9128 | L: netdev@vger.kernel.org | 9128 | L: netdev@vger.kernel.org |
| 9129 | S: Maintained | 9129 | S: Maintained |
| 9130 | F: net/l3mdev | 9130 | F: net/l3mdev |
| @@ -9185,6 +9185,7 @@ M: Pavel Machek <pavel@ucw.cz> · 54 unmodified lines | |||
| 9185 | R: Dan Murphy <dmurphy@ti.com> | 9185 | R: Dan Murphy <dmurphy@ti.com> |
| 9186 | L: linux-leds@vger.kernel.org | 9186 | L: linux-leds@vger.kernel.org |
| 9187 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds.git | 9187 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds.git |
| 9188 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/pavel/linux-leds.git | ||
| 9188 | S: Maintained | 9189 | S: Maintained |
| 9189 | F: Documentation/devicetree/bindings/leds/ | 9190 | F: Documentation/devicetree/bindings/leds/ |
| 9190 | F: drivers/leds/ | 9191 | F: drivers/leds/ |
| @@ -10256,7 +10257,7 @@ MEDIATEK ETHERNET DRIVER · 1065 unmodified lines | |||
| 10256 | M: Felix Fietkau <nbd@openwrt.org> | 10257 | M: Felix Fietkau <nbd@openwrt.org> |
| 10257 | M: John Crispin <john@phrozen.org> | 10258 | M: John Crispin <john@phrozen.org> |
| 10258 | M: Sean Wang <sean.wang@mediatek.com> | 10259 | M: Sean Wang <sean.wang@mediatek.com> |
| 10259 | M: Nelson Chang <nelson.chang@mediatek.com> | 10260 | M: Mark Lee <Mark-MC.Lee@mediatek.com> |
| 10260 | L: netdev@vger.kernel.org | 10261 | L: netdev@vger.kernel.org |
| 10261 | S: Maintained | 10262 | S: Maintained |
| 10262 | F: drivers/net/ethernet/mediatek/ | 10263 | F: drivers/net/ethernet/mediatek/ |
| @@ -11545,6 +11546,7 @@ NSDEPS · 1282 unmodified lines | |||
| 11545 | M: Matthias Maennich <maennich@google.com> | 11546 | M: Matthias Maennich <maennich@google.com> |
| 11546 | S: Maintained | 11547 | S: Maintained |
| 11547 | F: scripts/nsdeps | 11548 | F: scripts/nsdeps |
| 11549 | F: Documentation/core-api/symbol-namespaces.rst | ||
| 11548 | 11550 | ||
| 11549 | NTB AMD DRIVER | 11551 | NTB AMD DRIVER |
| 11550 | M: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> | 11552 | M: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> |
| @@ -12312,12 +12314,15 @@ F: arch/parisc/ · 761 unmodified lines | |||
| 12312 | F: Documentation/parisc/ | 12314 | F: Documentation/parisc/ |
| 12313 | F: drivers/parisc/ | 12315 | F: drivers/parisc/ |
| 12314 | F: drivers/char/agp/parisc-agp.c | 12316 | F: drivers/char/agp/parisc-agp.c |
| 12317 | F: drivers/input/misc/hp_sdc_rtc.c | ||
| 12315 | F: drivers/input/serio/gscps2.c | 12318 | F: drivers/input/serio/gscps2.c |
| 12319 | F: drivers/input/serio/hp_sdc* | ||
| 12316 | F: drivers/parport/parport_gsc.* | 12320 | F: drivers/parport/parport_gsc.* |
| 12317 | F: drivers/tty/serial/8250/8250_gsc.c | 12321 | F: drivers/tty/serial/8250/8250_gsc.c |
| 12318 | F: drivers/video/fbdev/sti* | 12322 | F: drivers/video/fbdev/sti* |
| 12319 | F: drivers/video/console/sti* | 12323 | F: drivers/video/console/sti* |
| 12320 | F: drivers/video/logo/logo_parisc* | 12324 | F: drivers/video/logo/logo_parisc* |
| 12325 | F: include/linux/hp_sdc.h | ||
| 12321 | 12326 | ||
| 12322 | PARMAN | 12327 | PARMAN |
| 12323 | M: Jiri Pirko <jiri@mellanox.com> | 12328 | M: Jiri Pirko <jiri@mellanox.com> |
| @@ -13361,7 +13366,7 @@ S: Maintained · 1037 unmodified lines | |||
| 13361 | F: drivers/scsi/qla1280.[ch] | 13366 | F: drivers/scsi/qla1280.[ch] |
| 13362 | 13367 | ||
| 13363 | QLOGIC QLA2XXX FC-SCSI DRIVER | 13368 | QLOGIC QLA2XXX FC-SCSI DRIVER |
| 13364 | M: qla2xxx-upstream@qlogic.com | 13369 | M: hmadhani@marvell.com |
| 13365 | L: linux-scsi@vger.kernel.org | 13370 | L: linux-scsi@vger.kernel.org |
| 13366 | S: Supported | 13371 | S: Supported |
| 13367 | F: Documentation/scsi/LICENSE.qla2xxx | 13372 | F: Documentation/scsi/LICENSE.qla2xxx |
| @@ -16764,13 +16769,6 @@ W: http://www.linux-usb.org/usbnet · 3396 unmodified lines | |||
| 16764 | S: Maintained | 16769 | S: Maintained |
| 16765 | F: drivers/net/usb/dm9601.c | 16770 | F: drivers/net/usb/dm9601.c |
| 16766 | 16771 | ||
| 16767 | USB DIAMOND RIO500 DRIVER | ||
| 16768 | M: Cesar Miquel <miquel@df.uba.ar> | ||
| 16769 | L: rio500-users@lists.sourceforge.net | ||
| 16770 | W: http://rio500.sourceforge.net | ||
| 16771 | S: Maintained | ||
| 16772 | F: drivers/usb/misc/rio500* | ||
| 16773 | |||
| 16774 | USB EHCI DRIVER | 16772 | USB EHCI DRIVER |
| 16775 | M: Alan Stern <stern@rowland.harvard.edu> | 16773 | M: Alan Stern <stern@rowland.harvard.edu> |
| 16776 | L: linux-usb@vger.kernel.org | 16774 | L: linux-usb@vger.kernel.org |
| @@ -17437,7 +17435,7 @@ F: include/linux/regulator/ · 660 unmodified lines | |||
| 17437 | K: regulator_get_optional | 17435 | K: regulator_get_optional |
| 17438 | 17436 | ||
| 17439 | VRF | 17437 | VRF |
| 17440 | M: David Ahern <dsa@cumulusnetworks.com> | 17438 | M: David Ahern <dsahern@kernel.org> |
| 17441 | M: Shrijeet Mukherjee <shrijeet@gmail.com> | 17439 | M: Shrijeet Mukherjee <shrijeet@gmail.com> |
| 17442 | L: netdev@vger.kernel.org | 17440 | L: netdev@vger.kernel.org |
| 17443 | S: Maintained | 17441 | S: Maintained |
| @@ -2,8 +2,8 @@ · 1 unmodified line | |||
| 2 | VERSION = 5 | 2 | VERSION = 5 |
| 3 | PATCHLEVEL = 4 | 3 | PATCHLEVEL = 4 |
| 4 | SUBLEVEL = 0 | 4 | SUBLEVEL = 0 |
| 5 | EXTRAVERSION = -rc1 | 5 | EXTRAVERSION = -rc4 |
| 6 | NAME = Bobtail Squid | 6 | NAME = Nesting Opossum |
| 7 | 7 | ||
| 8 | # *DOCUMENTATION* | 8 | # *DOCUMENTATION* |
| 9 | # To see a list of typical targets execute "make help" | 9 | # To see a list of typical targets execute "make help" |
| @@ -206,24 +206,8 @@ ifndef KBUILD_CHECKSRC · 196 unmodified lines | |||
| 206 | KBUILD_CHECKSRC = 0 | 206 | KBUILD_CHECKSRC = 0 |
| 207 | endif | 207 | endif |
| 208 | 208 | ||
| 209 | # Use make M=dir to specify directory of external module to build | 209 | # Use make M=dir or set the environment variable KBUILD_EXTMOD to specify the |
| 210 | # Old syntax make ... SUBDIRS=$PWD is still supported | 210 | # directory of external module to build. Setting M= takes precedence. |
| 211 | # Setting the environment variable KBUILD_EXTMOD take precedence | ||
| 212 | ifdef SUBDIRS | ||
| 213 | $(warning ================= WARNING ================) | ||
| 214 | $(warning 'SUBDIRS' will be removed after Linux 5.3) | ||
| 215 | $(warning ) | ||
| 216 | $(warning If you are building an individual subdirectory) | ||
| 217 | $(warning in the kernel tree, you can do like this:) | ||
| 218 | $(warning $$ make path/to/dir/you/want/to/build/) | ||
| 219 | $(warning (Do not forget the trailing slash)) | ||
| 220 | $(warning ) | ||
| 221 | $(warning If you are building an external module,) | ||
| 222 | $(warning Please use 'M=' or 'KBUILD_EXTMOD' instead) | ||
| 223 | $(warning ==========================================) | ||
| 224 | KBUILD_EXTMOD ?= $(SUBDIRS) | ||
| 225 | endif | ||
| 226 | |||
| 227 | ifeq ("$(origin M)", "command line") | 211 | ifeq ("$(origin M)", "command line") |
| 228 | KBUILD_EXTMOD := $(M) | 212 | KBUILD_EXTMOD := $(M) |
| 229 | endif | 213 | endif |
| @@ -498,7 +482,6 @@ export CFLAGS_KASAN CFLAGS_KASAN_NOSANITIZE CFLAGS_UBSAN · 268 unmodified lines | |||
| 498 | export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE | 482 | export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE |
| 499 | export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE | 483 | export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE |
| 500 | export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL | 484 | export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL |
| 501 | export KBUILD_ARFLAGS | ||
| 502 | 485 | ||
| 503 | # Files to ignore in find ... statements | 486 | # Files to ignore in find ... statements |
| 504 | 487 | ||
| @@ -616,7 +599,7 @@ endif · 111 unmodified lines | |||
| 616 | # in addition to whatever we do anyway. | 599 | # in addition to whatever we do anyway. |
| 617 | # Just "make" or "make all" shall build modules as well | 600 | # Just "make" or "make all" shall build modules as well |
| 618 | 601 | ||
| 619 | ifneq ($(filter all _all modules,$(MAKECMDGOALS)),) | 602 | ifneq ($(filter all _all modules nsdeps,$(MAKECMDGOALS)),) |
| 620 | KBUILD_MODULES := 1 | 603 | KBUILD_MODULES := 1 |
| 621 | endif | 604 | endif |
| 622 | 605 | ||
| @@ -914,9 +897,6 @@ ifdef CONFIG_RETPOLINE · 291 unmodified lines | |||
| 914 | KBUILD_CFLAGS += $(call cc-option,-fcf-protection=none) | 897 | KBUILD_CFLAGS += $(call cc-option,-fcf-protection=none) |
| 915 | endif | 898 | endif |
| 916 | 899 | ||
| 917 | # use the deterministic mode of AR if available | ||
| 918 | KBUILD_ARFLAGS := $(call ar-option,D) | ||
| 919 | |||
| 920 | include scripts/Makefile.kasan | 900 | include scripts/Makefile.kasan |
| 921 | include scripts/Makefile.extrawarn | 901 | include scripts/Makefile.extrawarn |
| 922 | include scripts/Makefile.ubsan | 902 | include scripts/Makefile.ubsan |
| @@ -1057,7 +1037,7 @@ export KBUILD_VMLINUX_OBJS := $(head-y) $(init-y) $(core-y) $(libs-y2) \ · 134 unmodified lines | |||
| 1057 | export KBUILD_VMLINUX_LIBS := $(libs-y1) | 1037 | export KBUILD_VMLINUX_LIBS := $(libs-y1) |
| 1058 | export KBUILD_LDS := arch/$(SRCARCH)/kernel/vmlinux.lds | 1038 | export KBUILD_LDS := arch/$(SRCARCH)/kernel/vmlinux.lds |
| 1059 | export LDFLAGS_vmlinux | 1039 | export LDFLAGS_vmlinux |
| 1060 | # used by scripts/package/Makefile | 1040 | # used by scripts/Makefile.package |
| 1061 | export KBUILD_ALLDIRS := $(sort $(filter-out arch/%,$(vmlinux-alldirs)) LICENSES arch include scripts tools) | 1041 | export KBUILD_ALLDIRS := $(sort $(filter-out arch/%,$(vmlinux-alldirs)) LICENSES arch include scripts tools) |
| 1062 | 1042 | ||
| 1063 | vmlinux-deps := $(KBUILD_LDS) $(KBUILD_VMLINUX_OBJS) $(KBUILD_VMLINUX_LIBS) | 1043 | vmlinux-deps := $(KBUILD_LDS) $(KBUILD_VMLINUX_OBJS) $(KBUILD_VMLINUX_LIBS) |
| @@ -1237,9 +1217,8 @@ PHONY += kselftest · 173 unmodified lines | |||
| 1237 | kselftest: | 1217 | kselftest: |
| 1238 | $(Q)$(MAKE) -C $(srctree)/tools/testing/selftests run_tests | 1218 | $(Q)$(MAKE) -C $(srctree)/tools/testing/selftests run_tests |
| 1239 | 1219 | ||
| 1240 | PHONY += kselftest-clean | 1220 | kselftest-%: FORCE |
| 1241 | kselftest-clean: | 1221 | $(Q)$(MAKE) -C $(srctree)/tools/testing/selftests $* |
| 1242 | $(Q)$(MAKE) -C $(srctree)/tools/testing/selftests clean | ||
| 1243 | 1222 | ||
| 1244 | PHONY += kselftest-merge | 1223 | PHONY += kselftest-merge |
| 1245 | kselftest-merge: | 1224 | kselftest-merge: |
| @@ -432,7 +432,7 @@ · 431 unmodified lines | |||
| 432 | pinctrl-0 = <&mmc0_pins_default>; | 432 | pinctrl-0 = <&mmc0_pins_default>; |
| 433 | }; | 433 | }; |
| 434 | 434 | ||
| 435 | &gpio0 { | 435 | &gpio0_target { |
| 436 | /* Do not idle the GPIO used for holding the VTT regulator */ | 436 | /* Do not idle the GPIO used for holding the VTT regulator */ |
| 437 | ti,no-reset-on-init; | 437 | ti,no-reset-on-init; |
| 438 | ti,no-idle-on-init; | 438 | ti,no-idle-on-init; |
| @@ -127,7 +127,7 @@ · 126 unmodified lines | |||
| 127 | ranges = <0x0 0x5000 0x1000>; | 127 | ranges = <0x0 0x5000 0x1000>; |
| 128 | }; | 128 | }; |
| 129 | 129 | ||
| 130 | target-module@7000 { /* 0x44e07000, ap 14 20.0 */ | 130 | gpio0_target: target-module@7000 { /* 0x44e07000, ap 14 20.0 */ |
| 131 | compatible = "ti,sysc-omap2", "ti,sysc"; | 131 | compatible = "ti,sysc-omap2", "ti,sysc"; |
| 132 | ti,hwmods = "gpio1"; | 132 | ti,hwmods = "gpio1"; |
| 133 | reg = <0x7000 0x4>, | 133 | reg = <0x7000 0x4>, |
| @@ -2038,7 +2038,9 @@ · 1904 unmodified lines | |||
| 2038 | reg = <0xe000 0x4>, | 2038 | reg = <0xe000 0x4>, |
| 2039 | <0xe054 0x4>; | 2039 | <0xe054 0x4>; |
| 2040 | reg-names = "rev", "sysc"; | 2040 | reg-names = "rev", "sysc"; |
| 2041 | ti,sysc-midle ; | 2041 | ti,sysc-midle = <SYSC_IDLE_FORCE>, |
| 2042 | <SYSC_IDLE_NO>, | ||
| 2043 | <SYSC_IDLE_SMART>; | ||
| 2042 | ti,sysc-sidle = <SYSC_IDLE_FORCE>, | 2044 | ti,sysc-sidle = <SYSC_IDLE_FORCE>, |
| 2043 | <SYSC_IDLE_NO>, | 2045 | <SYSC_IDLE_NO>, |
| 2044 | <SYSC_IDLE_SMART>; | 2046 | <SYSC_IDLE_SMART>; |
| @@ -337,6 +337,8 @@ · 336 unmodified lines | |||
| 337 | ti,hwmods = "dss_dispc"; | 337 | ti,hwmods = "dss_dispc"; |
| 338 | clocks = <&disp_clk>; | 338 | clocks = <&disp_clk>; |
| 339 | clock-names = "fck"; | 339 | clock-names = "fck"; |
| 340 | |||
| 341 | max-memory-bandwidth = <230000000>; | ||
| 340 | }; | 342 | }; |
| 341 | 343 | ||
| 342 | rfbi: rfbi@4832a800 { | 344 | rfbi: rfbi@4832a800 { |
| @@ -2732,7 +2732,7 @@ · 2731 unmodified lines | |||
| 2732 | interrupt-names = "tx", "rx"; | 2732 | interrupt-names = "tx", "rx"; |
| 2733 | dmas = <&edma_xbar 129 1>, <&edma_xbar 128 1>; | 2733 | dmas = <&edma_xbar 129 1>, <&edma_xbar 128 1>; |
| 2734 | dma-names = "tx", "rx"; | 2734 | dma-names = "tx", "rx"; |
| 2735 | clocks = <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 22>, | 2735 | clocks = <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 0>, |
| 2736 | <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 24>, | 2736 | <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 24>, |
| 2737 | <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 28>; | 2737 | <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 28>; |
| 2738 | clock-names = "fck", "ahclkx", "ahclkr"; | 2738 | clock-names = "fck", "ahclkx", "ahclkr"; |
| @@ -2768,8 +2768,8 @@ · 29 unmodified lines | |||
| 2768 | interrupt-names = "tx", "rx"; | 2768 | interrupt-names = "tx", "rx"; |
| 2769 | dmas = <&edma_xbar 131 1>, <&edma_xbar 130 1>; | 2769 | dmas = <&edma_xbar 131 1>, <&edma_xbar 130 1>; |
| 2770 | dma-names = "tx", "rx"; | 2770 | dma-names = "tx", "rx"; |
| 2771 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 22>, | 2771 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 0>, |
| 2772 | <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 24>, | 2772 | <&ipu_clkctrl DRA7_IPU_MCASP1_CLKCTRL 24>, |
| 2773 | <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 28>; | 2773 | <&l4per2_clkctrl DRA7_L4PER2_MCASP2_CLKCTRL 28>; |
| 2774 | clock-names = "fck", "ahclkx", "ahclkr"; | 2774 | clock-names = "fck", "ahclkx", "ahclkr"; |
| 2775 | status = "disabled"; | 2775 | status = "disabled"; |
| @@ -2786,9 +2786,8 @@ · 10 unmodified lines | |||
| 2786 | <SYSC_IDLE_SMART>; | 2786 | <SYSC_IDLE_SMART>; |
| 2787 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ | 2787 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ |
| 2788 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 0>, | 2788 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 0>, |
| 2789 | <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>, | 2789 | <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>; |
| 2790 | <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 28>; | 2790 | clock-names = "fck", "ahclkx"; |
| 2791 | clock-names = "fck", "ahclkx", "ahclkr"; | ||
| 2792 | #address-cells = <1>; | 2791 | #address-cells = <1>; |
| 2793 | #size-cells = <1>; | 2792 | #size-cells = <1>; |
| 2794 | ranges = <0x0 0x68000 0x2000>, | 2793 | ranges = <0x0 0x68000 0x2000>, |
| @@ -2804,7 +2803,7 @@ · 9 unmodified lines | |||
| 2804 | interrupt-names = "tx", "rx"; | 2803 | interrupt-names = "tx", "rx"; |
| 2805 | dmas = <&edma_xbar 133 1>, <&edma_xbar 132 1>; | 2804 | dmas = <&edma_xbar 133 1>, <&edma_xbar 132 1>; |
| 2806 | dma-names = "tx", "rx"; | 2805 | dma-names = "tx", "rx"; |
| 2807 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 22>, | 2806 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 0>, |
| 2808 | <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>; | 2807 | <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>; |
| 2809 | clock-names = "fck", "ahclkx"; | 2808 | clock-names = "fck", "ahclkx"; |
| 2810 | status = "disabled"; | 2809 | status = "disabled"; |
| @@ -2821,9 +2820,8 @@ · 10 unmodified lines | |||
| 2821 | <SYSC_IDLE_SMART>; | 2820 | <SYSC_IDLE_SMART>; |
| 2822 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ | 2821 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ |
| 2823 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 0>, | 2822 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 0>, |
| 2824 | <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>, | 2823 | <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>; |
| 2825 | <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 28>; | 2824 | clock-names = "fck", "ahclkx"; |
| 2826 | clock-names = "fck", "ahclkx", "ahclkr"; | ||
| 2827 | #address-cells = <1>; | 2825 | #address-cells = <1>; |
| 2828 | #size-cells = <1>; | 2826 | #size-cells = <1>; |
| 2829 | ranges = <0x0 0x6c000 0x2000>, | 2827 | ranges = <0x0 0x6c000 0x2000>, |
| @@ -2839,7 +2837,7 @@ · 9 unmodified lines | |||
| 2839 | interrupt-names = "tx", "rx"; | 2837 | interrupt-names = "tx", "rx"; |
| 2840 | dmas = <&edma_xbar 135 1>, <&edma_xbar 134 1>; | 2838 | dmas = <&edma_xbar 135 1>, <&edma_xbar 134 1>; |
| 2841 | dma-names = "tx", "rx"; | 2839 | dma-names = "tx", "rx"; |
| 2842 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 22>, | 2840 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 0>, |
| 2843 | <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>; | 2841 | <&l4per2_clkctrl DRA7_L4PER2_MCASP4_CLKCTRL 24>; |
| 2844 | clock-names = "fck", "ahclkx"; | 2842 | clock-names = "fck", "ahclkx"; |
| 2845 | status = "disabled"; | 2843 | status = "disabled"; |
| @@ -2856,9 +2854,8 @@ · 10 unmodified lines | |||
| 2856 | <SYSC_IDLE_SMART>; | 2854 | <SYSC_IDLE_SMART>; |
| 2857 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ | 2855 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ |
| 2858 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 0>, | 2856 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 0>, |
| 2859 | <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>, | 2857 | <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>; |
| 2860 | <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 28>; | 2858 | clock-names = "fck", "ahclkx"; |
| 2861 | clock-names = "fck", "ahclkx", "ahclkr"; | ||
| 2862 | #address-cells = <1>; | 2859 | #address-cells = <1>; |
| 2863 | #size-cells = <1>; | 2860 | #size-cells = <1>; |
| 2864 | ranges = <0x0 0x70000 0x2000>, | 2861 | ranges = <0x0 0x70000 0x2000>, |
| @@ -2874,7 +2871,7 @@ · 9 unmodified lines | |||
| 2874 | interrupt-names = "tx", "rx"; | 2871 | interrupt-names = "tx", "rx"; |
| 2875 | dmas = <&edma_xbar 137 1>, <&edma_xbar 136 1>; | 2872 | dmas = <&edma_xbar 137 1>, <&edma_xbar 136 1>; |
| 2876 | dma-names = "tx", "rx"; | 2873 | dma-names = "tx", "rx"; |
| 2877 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 22>, | 2874 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 0>, |
| 2878 | <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>; | 2875 | <&l4per2_clkctrl DRA7_L4PER2_MCASP5_CLKCTRL 24>; |
| 2879 | clock-names = "fck", "ahclkx"; | 2876 | clock-names = "fck", "ahclkx"; |
| 2880 | status = "disabled"; | 2877 | status = "disabled"; |
| @@ -2891,9 +2888,8 @@ · 10 unmodified lines | |||
| 2891 | <SYSC_IDLE_SMART>; | 2888 | <SYSC_IDLE_SMART>; |
| 2892 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ | 2889 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ |
| 2893 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 0>, | 2890 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 0>, |
| 2894 | <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>, | 2891 | <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>; |
| 2895 | <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 28>; | 2892 | clock-names = "fck", "ahclkx"; |
| 2896 | clock-names = "fck", "ahclkx", "ahclkr"; | ||
| 2897 | #address-cells = <1>; | 2893 | #address-cells = <1>; |
| 2898 | #size-cells = <1>; | 2894 | #size-cells = <1>; |
| 2899 | ranges = <0x0 0x74000 0x2000>, | 2895 | ranges = <0x0 0x74000 0x2000>, |
| @@ -2909,7 +2905,7 @@ · 9 unmodified lines | |||
| 2909 | interrupt-names = "tx", "rx"; | 2905 | interrupt-names = "tx", "rx"; |
| 2910 | dmas = <&edma_xbar 139 1>, <&edma_xbar 138 1>; | 2906 | dmas = <&edma_xbar 139 1>, <&edma_xbar 138 1>; |
| 2911 | dma-names = "tx", "rx"; | 2907 | dma-names = "tx", "rx"; |
| 2912 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 22>, | 2908 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 0>, |
| 2913 | <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>; | 2909 | <&l4per2_clkctrl DRA7_L4PER2_MCASP6_CLKCTRL 24>; |
| 2914 | clock-names = "fck", "ahclkx"; | 2910 | clock-names = "fck", "ahclkx"; |
| 2915 | status = "disabled"; | 2911 | status = "disabled"; |
| @@ -2926,9 +2922,8 @@ · 10 unmodified lines | |||
| 2926 | <SYSC_IDLE_SMART>; | 2922 | <SYSC_IDLE_SMART>; |
| 2927 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ | 2923 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ |
| 2928 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 0>, | 2924 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 0>, |
| 2929 | <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>, | 2925 | <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>; |
| 2930 | <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 28>; | 2926 | clock-names = "fck", "ahclkx"; |
| 2931 | clock-names = "fck", "ahclkx", "ahclkr"; | ||
| 2932 | #address-cells = <1>; | 2927 | #address-cells = <1>; |
| 2933 | #size-cells = <1>; | 2928 | #size-cells = <1>; |
| 2934 | ranges = <0x0 0x78000 0x2000>, | 2929 | ranges = <0x0 0x78000 0x2000>, |
| @@ -2944,7 +2939,7 @@ · 9 unmodified lines | |||
| 2944 | interrupt-names = "tx", "rx"; | 2939 | interrupt-names = "tx", "rx"; |
| 2945 | dmas = <&edma_xbar 141 1>, <&edma_xbar 140 1>; | 2940 | dmas = <&edma_xbar 141 1>, <&edma_xbar 140 1>; |
| 2946 | dma-names = "tx", "rx"; | 2941 | dma-names = "tx", "rx"; |
| 2947 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 22>, | 2942 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 0>, |
| 2948 | <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>; | 2943 | <&l4per2_clkctrl DRA7_L4PER2_MCASP7_CLKCTRL 24>; |
| 2949 | clock-names = "fck", "ahclkx"; | 2944 | clock-names = "fck", "ahclkx"; |
| 2950 | status = "disabled"; | 2945 | status = "disabled"; |
| @@ -2961,9 +2956,8 @@ · 10 unmodified lines | |||
| 2961 | <SYSC_IDLE_SMART>; | 2956 | <SYSC_IDLE_SMART>; |
| 2962 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ | 2957 | /* Domains (P, C): l4per_pwrdm, l4per2_clkdm */ |
| 2963 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 0>, | 2958 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 0>, |
| 2964 | <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 24>, | 2959 | <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 24>; |
| 2965 | <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 28>; | 2960 | clock-names = "fck", "ahclkx"; |
| 2966 | clock-names = "fck", "ahclkx", "ahclkr"; | ||
| 2967 | #address-cells = <1>; | 2961 | #address-cells = <1>; |
| 2968 | #size-cells = <1>; | 2962 | #size-cells = <1>; |
| 2969 | ranges = <0x0 0x7c000 0x2000>, | 2963 | ranges = <0x0 0x7c000 0x2000>, |
| @@ -2979,7 +2973,7 @@ · 9 unmodified lines | |||
| 2979 | interrupt-names = "tx", "rx"; | 2973 | interrupt-names = "tx", "rx"; |
| 2980 | dmas = <&edma_xbar 143 1>, <&edma_xbar 142 1>; | 2974 | dmas = <&edma_xbar 143 1>, <&edma_xbar 142 1>; |
| 2981 | dma-names = "tx", "rx"; | 2975 | dma-names = "tx", "rx"; |
| 2982 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 22>, | 2976 | clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 0>, |
| 2983 | <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 24>; | 2977 | <&l4per2_clkctrl DRA7_L4PER2_MCASP8_CLKCTRL 24>; |
| 2984 | clock-names = "fck", "ahclkx"; | 2978 | clock-names = "fck", "ahclkx"; |
| 2985 | status = "disabled"; | 2979 | status = "disabled"; |
| @@ -66,9 +66,21 @@ · 65 unmodified lines | |||
| 66 | pinctrl-1 = <&ephy_leds_pins>; | 66 | pinctrl-1 = <&ephy_leds_pins>; |
| 67 | status = "okay"; | 67 | status = "okay"; |
| 68 | 68 | ||
| 69 | gmac0: mac@0 { | ||
| 70 | compatible = "mediatek,eth-mac"; | ||
| 71 | reg = <0>; | ||
| 72 | phy-mode = "2500base-x"; | ||
| 73 | fixed-link { | ||
| 74 | speed = <2500>; | ||
| 75 | full-duplex; | ||
| 76 | pause; | ||
| 77 | }; | ||
| 78 | }; | ||
| 79 | |||
| 69 | gmac1: mac@1 { | 80 | gmac1: mac@1 { |
| 70 | compatible = "mediatek,eth-mac"; | 81 | compatible = "mediatek,eth-mac"; |
| 71 | reg = <1>; | 82 | reg = <1>; |
| 83 | phy-mode = "gmii"; | ||
| 72 | phy-handle = <&phy0>; | 84 | phy-handle = <&phy0>; |
| 73 | }; | 85 | }; |
| 74 | 86 | ||
| @@ -78,7 +90,6 @@ · 3 unmodified lines | |||
| 78 | 90 | ||
| 79 | phy0: ethernet-phy@0 { | 91 | phy0: ethernet-phy@0 { |
| 80 | reg = <0>; | 92 | reg = <0>; |
| 81 | phy-mode = "gmii"; | ||
| 82 | }; | 93 | }; |
| 83 | }; | 94 | }; |
| 84 | }; | 95 | }; |
| @@ -468,14 +468,12 @@ · 467 unmodified lines | |||
| 468 | compatible = "mediatek,mt7629-sgmiisys", "syscon"; | 468 | compatible = "mediatek,mt7629-sgmiisys", "syscon"; |
| 469 | reg = <0x1b128000 0x3000>; | 469 | reg = <0x1b128000 0x3000>; |
| 470 | #clock-cells = <1>; | 470 | #clock-cells = <1>; |
| 471 | mediatek,physpeed = "2500"; | ||
| 472 | }; | 471 | }; |
| 473 | 472 | ||
| 474 | sgmiisys1: syscon@1b130000 { | 473 | sgmiisys1: syscon@1b130000 { |
| 475 | compatible = "mediatek,mt7629-sgmiisys", "syscon"; | 474 | compatible = "mediatek,mt7629-sgmiisys", "syscon"; |
| 476 | reg = <0x1b130000 0x3000>; | 475 | reg = <0x1b130000 0x3000>; |
| 477 | #clock-cells = <1>; | 476 | #clock-cells = <1>; |
| 478 | mediatek,physpeed = "2500"; | ||
| 479 | }; | 477 | }; |
| 480 | }; | 478 | }; |
| 481 | }; | 479 | }; |
| @@ -124,6 +124,7 @@ · 123 unmodified lines | |||
| 124 | spi-max-frequency = <100000>; | 124 | spi-max-frequency = <100000>; |
| 125 | spi-cpol; | 125 | spi-cpol; |
| 126 | spi-cpha; | 126 | spi-cpha; |
| 127 | spi-cs-high; | ||
| 127 | 128 | ||
| 128 | backlight= <&backlight>; | 129 | backlight= <&backlight>; |
| 129 | label = "lcd"; | 130 | label = "lcd"; |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | |||
| 8 | #include <dt-bindings/mfd/dbx500-prcmu.h> | 8 | #include <dt-bindings/mfd/dbx500-prcmu.h> |
| 9 | #include <dt-bindings/arm/ux500_pm_domains.h> | 9 | #include <dt-bindings/arm/ux500_pm_domains.h> |
| 10 | #include <dt-bindings/gpio/gpio.h> | 10 | #include <dt-bindings/gpio/gpio.h> |
| 11 | #include <dt-bindings/thermal/thermal.h> | ||
| 11 | 12 | ||
| 12 | / { | 13 | / { |
| 13 | #address-cells = <1>; | 14 | #address-cells = <1>; |
| @@ -59,8 +60,12 @@ · 45 unmodified lines | |||
| 59 | * cooling. | 60 | * cooling. |
| 60 | */ | 61 | */ |
| 61 | cpu_thermal: cpu-thermal { | 62 | cpu_thermal: cpu-thermal { |
| 62 | polling-delay-passive = <0>; | 63 | polling-delay-passive = <250>; |
| 63 | polling-delay = <1000>; | 64 | /* |
| 65 | * This sensor fires interrupts to update the thermal | ||
| 66 | * zone, so no polling is needed. | ||
| 67 | */ | ||
| 68 | polling-delay = <0>; | ||
| 64 | 69 | ||
| 65 | thermal-sensors = <&thermal>; | 70 | thermal-sensors = <&thermal>; |
| 66 | 71 | ||
| @@ -79,7 +84,7 @@ · 12 unmodified lines | |||
| 79 | 84 | ||
| 80 | cooling-maps { | 85 | cooling-maps { |
| 81 | trip = <&cpu_alert>; | 86 | trip = <&cpu_alert>; |
| 82 | cooling-device = <&CPU0 0 2>; | 87 | cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; |
| 83 | contribution = <100>; | 88 | contribution = <100>; |
| 84 | }; | 89 | }; |
| 85 | }; | 90 | }; |
| @@ -520,6 +520,7 @@ · 519 unmodified lines | |||
| 520 | interrupts = <39>; | 520 | interrupts = <39>; |
| 521 | clocks = <&ccu CLK_AHB_EHCI0>; | 521 | clocks = <&ccu CLK_AHB_EHCI0>; |
| 522 | phys = <&usbphy 1>; | 522 | phys = <&usbphy 1>; |
| 523 | phy-names = "usb"; | ||
| 523 | status = "disabled"; | 524 | status = "disabled"; |
| 524 | }; | 525 | }; |
| 525 | 526 | ||
| @@ -529,6 +530,7 @@ · 3 unmodified lines | |||
| 529 | interrupts = <64>; | 530 | interrupts = <64>; |
| 530 | clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>; | 531 | clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>; |
| 531 | phys = <&usbphy 1>; | 532 | phys = <&usbphy 1>; |
| 533 | phy-names = "usb"; | ||
| 532 | status = "disabled"; | 534 | status = "disabled"; |
| 533 | }; | 535 | }; |
| 534 | 536 | ||
| @@ -608,6 +610,7 @@ · 73 unmodified lines | |||
| 608 | interrupts = <40>; | 610 | interrupts = <40>; |
| 609 | clocks = <&ccu CLK_AHB_EHCI1>; | 611 | clocks = <&ccu CLK_AHB_EHCI1>; |
| 610 | phys = <&usbphy 2>; | 612 | phys = <&usbphy 2>; |
| 613 | phy-names = "usb"; | ||
| 611 | status = "disabled"; | 614 | status = "disabled"; |
| 612 | }; | 615 | }; |
| 613 | 616 | ||
| @@ -617,6 +620,7 @@ · 3 unmodified lines | |||
| 617 | interrupts = <65>; | 620 | interrupts = <65>; |
| 618 | clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>; | 621 | clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>; |
| 619 | phys = <&usbphy 2>; | 622 | phys = <&usbphy 2>; |
| 623 | phy-names = "usb"; | ||
| 620 | status = "disabled"; | 624 | status = "disabled"; |
| 621 | }; | 625 | }; |
| 622 | 626 | ||
| @@ -391,6 +391,7 @@ · 390 unmodified lines | |||
| 391 | interrupts = <39>; | 391 | interrupts = <39>; |
| 392 | clocks = <&ccu CLK_AHB_EHCI>; | 392 | clocks = <&ccu CLK_AHB_EHCI>; |
| 393 | phys = <&usbphy 1>; | 393 | phys = <&usbphy 1>; |
| 394 | phy-names = "usb"; | ||
| 394 | status = "disabled"; | 395 | status = "disabled"; |
| 395 | }; | 396 | }; |
| 396 | 397 | ||
| @@ -400,6 +401,7 @@ · 3 unmodified lines | |||
| 400 | interrupts = <40>; | 401 | interrupts = <40>; |
| 401 | clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>; | 402 | clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>; |
| 402 | phys = <&usbphy 1>; | 403 | phys = <&usbphy 1>; |
| 404 | phy-names = "usb"; | ||
| 403 | status = "disabled"; | 405 | status = "disabled"; |
| 404 | }; | 406 | }; |
| 405 | 407 | ||
| @@ -545,6 +545,7 @@ · 544 unmodified lines | |||
| 545 | clocks = <&ccu CLK_AHB1_EHCI0>; | 545 | clocks = <&ccu CLK_AHB1_EHCI0>; |
| 546 | resets = <&ccu RST_AHB1_EHCI0>; | 546 | resets = <&ccu RST_AHB1_EHCI0>; |
| 547 | phys = <&usbphy 1>; | 547 | phys = <&usbphy 1>; |
| 548 | phy-names = "usb"; | ||
| 548 | status = "disabled"; | 549 | status = "disabled"; |
| 549 | }; | 550 | }; |
| 550 | 551 | ||
| @@ -555,6 +556,7 @@ · 4 unmodified lines | |||
| 555 | clocks = <&ccu CLK_AHB1_OHCI0>, <&ccu CLK_USB_OHCI0>; | 556 | clocks = <&ccu CLK_AHB1_OHCI0>, <&ccu CLK_USB_OHCI0>; |
| 556 | resets = <&ccu RST_AHB1_OHCI0>; | 557 | resets = <&ccu RST_AHB1_OHCI0>; |
| 557 | phys = <&usbphy 1>; | 558 | phys = <&usbphy 1>; |
| 559 | phy-names = "usb"; | ||
| 558 | status = "disabled"; | 560 | status = "disabled"; |
| 559 | }; | 561 | }; |
| 560 | 562 | ||
| @@ -565,6 +567,7 @@ · 4 unmodified lines | |||
| 565 | clocks = <&ccu CLK_AHB1_EHCI1>; | 567 | clocks = <&ccu CLK_AHB1_EHCI1>; |
| 566 | resets = <&ccu RST_AHB1_EHCI1>; | 568 | resets = <&ccu RST_AHB1_EHCI1>; |
| 567 | phys = <&usbphy 2>; | 569 | phys = <&usbphy 2>; |
| 570 | phy-names = "usb"; | ||
| 568 | status = "disabled"; | 571 | status = "disabled"; |
| 569 | }; | 572 | }; |
| 570 | 573 | ||
| @@ -575,6 +578,7 @@ · 4 unmodified lines | |||
| 575 | clocks = <&ccu CLK_AHB1_OHCI1>, <&ccu CLK_USB_OHCI1>; | 578 | clocks = <&ccu CLK_AHB1_OHCI1>, <&ccu CLK_USB_OHCI1>; |
| 576 | resets = <&ccu RST_AHB1_OHCI1>; | 579 | resets = <&ccu RST_AHB1_OHCI1>; |
| 577 | phys = <&usbphy 2>; | 580 | phys = <&usbphy 2>; |
| 581 | phy-names = "usb"; | ||
| 578 | status = "disabled"; | 582 | status = "disabled"; |
| 579 | }; | 583 | }; |
| 580 | 584 | ||
| @@ -623,6 +623,7 @@ · 622 unmodified lines | |||
| 623 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; | 623 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; |
| 624 | clocks = <&ccu CLK_AHB_EHCI0>; | 624 | clocks = <&ccu CLK_AHB_EHCI0>; |
| 625 | phys = <&usbphy 1>; | 625 | phys = <&usbphy 1>; |
| 626 | phy-names = "usb"; | ||
| 626 | status = "disabled"; | 627 | status = "disabled"; |
| 627 | }; | 628 | }; |
| 628 | 629 | ||
| @@ -632,6 +633,7 @@ · 3 unmodified lines | |||
| 632 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; | 633 | interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; |
| 633 | clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>; | 634 | clocks = <&ccu CLK_USB_OHCI0>, <&ccu CLK_AHB_OHCI0>; |
| 634 | phys = <&usbphy 1>; | 635 | phys = <&usbphy 1>; |
| 636 | phy-names = "usb"; | ||
| 635 | status = "disabled"; | 637 | status = "disabled"; |
| 636 | }; | 638 | }; |
| 637 | 639 | ||
| @@ -714,6 +716,7 @@ · 76 unmodified lines | |||
| 714 | interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; | 716 | interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; |
| 715 | clocks = <&ccu CLK_AHB_EHCI1>; | 717 | clocks = <&ccu CLK_AHB_EHCI1>; |
| 716 | phys = <&usbphy 2>; | 718 | phys = <&usbphy 2>; |
| 719 | phy-names = "usb"; | ||
| 717 | status = "disabled"; | 720 | status = "disabled"; |
| 718 | }; | 721 | }; |
| 719 | 722 | ||
| @@ -723,6 +726,7 @@ · 3 unmodified lines | |||
| 723 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; | 726 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; |
| 724 | clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>; | 727 | clocks = <&ccu CLK_USB_OHCI1>, <&ccu CLK_AHB_OHCI1>; |
| 725 | phys = <&usbphy 2>; | 728 | phys = <&usbphy 2>; |
| 729 | phy-names = "usb"; | ||
| 726 | status = "disabled"; | 730 | status = "disabled"; |
| 727 | }; | 731 | }; |
| 728 | 732 | ||
| @@ -307,6 +307,7 @@ · 306 unmodified lines | |||
| 307 | clocks = <&ccu CLK_BUS_EHCI>; | 307 | clocks = <&ccu CLK_BUS_EHCI>; |
| 308 | resets = <&ccu RST_BUS_EHCI>; | 308 | resets = <&ccu RST_BUS_EHCI>; |
| 309 | phys = <&usbphy 1>; | 309 | phys = <&usbphy 1>; |
| 310 | phy-names = "usb"; | ||
| 310 | status = "disabled"; | 311 | status = "disabled"; |
| 311 | }; | 312 | }; |
| 312 | 313 | ||
| @@ -317,6 +318,7 @@ · 4 unmodified lines | |||
| 317 | clocks = <&ccu CLK_BUS_OHCI>, <&ccu CLK_USB_OHCI>; | 318 | clocks = <&ccu CLK_BUS_OHCI>, <&ccu CLK_USB_OHCI>; |
| 318 | resets = <&ccu RST_BUS_OHCI>; | 319 | resets = <&ccu RST_BUS_OHCI>; |
| 319 | phys = <&usbphy 1>; | 320 | phys = <&usbphy 1>; |
| 321 | phy-names = "usb"; | ||
| 320 | status = "disabled"; | 322 | status = "disabled"; |
| 321 | }; | 323 | }; |
| 322 | 324 | ||
| @@ -632,6 +632,7 @@ · 631 unmodified lines | |||
| 632 | clocks = <&ccu CLK_BUS_EHCI0>; | 632 | clocks = <&ccu CLK_BUS_EHCI0>; |
| 633 | resets = <&ccu RST_BUS_EHCI0>; | 633 | resets = <&ccu RST_BUS_EHCI0>; |
| 634 | phys = <&usbphy 1>; | 634 | phys = <&usbphy 1>; |
| 635 | phy-names = "usb"; | ||
| 635 | status = "disabled"; | 636 | status = "disabled"; |
| 636 | }; | 637 | }; |
| 637 | 638 | ||
| @@ -643,6 +644,7 @@ · 5 unmodified lines | |||
| 643 | clocks = <&ccu CLK_BUS_OHCI0>, <&ccu CLK_USB_OHCI0>; | 644 | clocks = <&ccu CLK_BUS_OHCI0>, <&ccu CLK_USB_OHCI0>; |
| 644 | resets = <&ccu RST_BUS_OHCI0>; | 645 | resets = <&ccu RST_BUS_OHCI0>; |
| 645 | phys = <&usbphy 1>; | 646 | phys = <&usbphy 1>; |
| 647 | phy-names = "usb"; | ||
| 646 | status = "disabled"; | 648 | status = "disabled"; |
| 647 | }; | 649 | }; |
| 648 | 650 | ||
| @@ -654,6 +656,7 @@ · 5 unmodified lines | |||
| 654 | clocks = <&ccu CLK_BUS_EHCI1>; | 656 | clocks = <&ccu CLK_BUS_EHCI1>; |
| 655 | resets = <&ccu RST_BUS_EHCI1>; | 657 | resets = <&ccu RST_BUS_EHCI1>; |
| 656 | phys = <&usbphy 2>; | 658 | phys = <&usbphy 2>; |
| 659 | phy-names = "usb"; | ||
| 657 | status = "disabled"; | 660 | status = "disabled"; |
| 658 | }; | 661 | }; |
| 659 | 662 | ||
| @@ -273,6 +273,7 @@ · 272 unmodified lines | |||
| 273 | clocks = <&ccu CLK_BUS_EHCI1>; | 273 | clocks = <&ccu CLK_BUS_EHCI1>; |
| 274 | resets = <&ccu RST_BUS_EHCI1>; | 274 | resets = <&ccu RST_BUS_EHCI1>; |
| 275 | phys = <&usbphy 1>; | 275 | phys = <&usbphy 1>; |
| 276 | phy-names = "usb"; | ||
| 276 | status = "disabled"; | 277 | status = "disabled"; |
| 277 | }; | 278 | }; |
| 278 | 279 | ||
| @@ -284,6 +285,7 @@ · 5 unmodified lines | |||
| 284 | <&ccu CLK_USB_OHCI1>; | 285 | <&ccu CLK_USB_OHCI1>; |
| 285 | resets = <&ccu RST_BUS_OHCI1>; | 286 | resets = <&ccu RST_BUS_OHCI1>; |
| 286 | phys = <&usbphy 1>; | 287 | phys = <&usbphy 1>; |
| 288 | phy-names = "usb"; | ||
| 287 | status = "disabled"; | 289 | status = "disabled"; |
| 288 | }; | 290 | }; |
| 289 | 291 | ||
| @@ -294,6 +296,7 @@ · 4 unmodified lines | |||
| 294 | clocks = <&ccu CLK_BUS_EHCI2>; | 296 | clocks = <&ccu CLK_BUS_EHCI2>; |
| 295 | resets = <&ccu RST_BUS_EHCI2>; | 297 | resets = <&ccu RST_BUS_EHCI2>; |
| 296 | phys = <&usbphy 2>; | 298 | phys = <&usbphy 2>; |
| 299 | phy-names = "usb"; | ||
| 297 | status = "disabled"; | 300 | status = "disabled"; |
| 298 | }; | 301 | }; |
| 299 | 302 | ||
| @@ -305,6 +308,7 @@ · 5 unmodified lines | |||
| 305 | <&ccu CLK_USB_OHCI2>; | 308 | <&ccu CLK_USB_OHCI2>; |
| 306 | resets = <&ccu RST_BUS_OHCI2>; | 309 | resets = <&ccu RST_BUS_OHCI2>; |
| 307 | phys = <&usbphy 2>; | 310 | phys = <&usbphy 2>; |
| 311 | phy-names = "usb"; | ||
| 308 | status = "disabled"; | 312 | status = "disabled"; |
| 309 | }; | 313 | }; |
| 310 | 314 | ||
| @@ -346,6 +346,7 @@ · 345 unmodified lines | |||
| 346 | clocks = <&usb_clocks CLK_BUS_HCI0>; | 346 | clocks = <&usb_clocks CLK_BUS_HCI0>; |
| 347 | resets = <&usb_clocks RST_USB0_HCI>; | 347 | resets = <&usb_clocks RST_USB0_HCI>; |
| 348 | phys = <&usbphy1>; | 348 | phys = <&usbphy1>; |
| 349 | phy-names = "usb"; | ||
| 349 | status = "disabled"; | 350 | status = "disabled"; |
| 350 | }; | 351 | }; |
| 351 | 352 | ||
| @@ -357,6 +358,7 @@ · 5 unmodified lines | |||
| 357 | <&usb_clocks CLK_USB_OHCI0>; | 358 | <&usb_clocks CLK_USB_OHCI0>; |
| 358 | resets = <&usb_clocks RST_USB0_HCI>; | 359 | resets = <&usb_clocks RST_USB0_HCI>; |
| 359 | phys = <&usbphy1>; | 360 | phys = <&usbphy1>; |
| 361 | phy-names = "usb"; | ||
| 360 | status = "disabled"; | 362 | status = "disabled"; |
| 361 | }; | 363 | }; |
| 362 | 364 | ||
| @@ -378,6 +380,7 @@ · 15 unmodified lines | |||
| 378 | clocks = <&usb_clocks CLK_BUS_HCI1>; | 380 | clocks = <&usb_clocks CLK_BUS_HCI1>; |
| 379 | resets = <&usb_clocks RST_USB1_HCI>; | 381 | resets = <&usb_clocks RST_USB1_HCI>; |
| 380 | phys = <&usbphy2>; | 382 | phys = <&usbphy2>; |
| 383 | phy-names = "usb"; | ||
| 381 | status = "disabled"; | 384 | status = "disabled"; |
| 382 | }; | 385 | }; |
| 383 | 386 | ||
| @@ -407,6 +410,7 @@ · 23 unmodified lines | |||
| 407 | clocks = <&usb_clocks CLK_BUS_HCI2>; | 410 | clocks = <&usb_clocks CLK_BUS_HCI2>; |
| 408 | resets = <&usb_clocks RST_USB2_HCI>; | 411 | resets = <&usb_clocks RST_USB2_HCI>; |
| 409 | phys = <&usbphy3>; | 412 | phys = <&usbphy3>; |
| 413 | phy-names = "usb"; | ||
| 410 | status = "disabled"; | 414 | status = "disabled"; |
| 411 | }; | 415 | }; |
| 412 | 416 | ||
| @@ -418,6 +422,7 @@ · 5 unmodified lines | |||
| 418 | <&usb_clocks CLK_USB_OHCI2>; | 422 | <&usb_clocks CLK_USB_OHCI2>; |
| 419 | resets = <&usb_clocks RST_USB2_HCI>; | 423 | resets = <&usb_clocks RST_USB2_HCI>; |
| 420 | phys = <&usbphy3>; | 424 | phys = <&usbphy3>; |
| 425 | phy-names = "usb"; | ||
| 421 | status = "disabled"; | 426 | status = "disabled"; |
| 422 | }; | 427 | }; |
| 423 | 428 | ||
| @@ -304,6 +304,7 @@ · 303 unmodified lines | |||
| 304 | clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; | 304 | clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; |
| 305 | resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; | 305 | resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; |
| 306 | phys = <&usbphy 1>; | 306 | phys = <&usbphy 1>; |
| 307 | phy-names = "usb"; | ||
| 307 | status = "disabled"; | 308 | status = "disabled"; |
| 308 | }; | 309 | }; |
| 309 | 310 | ||
| @@ -315,6 +316,7 @@ · 5 unmodified lines | |||
| 315 | <&ccu CLK_USB_OHCI1>; | 316 | <&ccu CLK_USB_OHCI1>; |
| 316 | resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; | 317 | resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; |
| 317 | phys = <&usbphy 1>; | 318 | phys = <&usbphy 1>; |
| 319 | phy-names = "usb"; | ||
| 318 | status = "disabled"; | 320 | status = "disabled"; |
| 319 | }; | 321 | }; |
| 320 | 322 | ||
| @@ -325,6 +327,7 @@ · 4 unmodified lines | |||
| 325 | clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; | 327 | clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; |
| 326 | resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; | 328 | resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; |
| 327 | phys = <&usbphy 2>; | 329 | phys = <&usbphy 2>; |
| 330 | phy-names = "usb"; | ||
| 328 | status = "disabled"; | 331 | status = "disabled"; |
| 329 | }; | 332 | }; |
| 330 | 333 | ||
| @@ -336,6 +339,7 @@ · 5 unmodified lines | |||
| 336 | <&ccu CLK_USB_OHCI2>; | 339 | <&ccu CLK_USB_OHCI2>; |
| 337 | resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; | 340 | resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; |
| 338 | phys = <&usbphy 2>; | 341 | phys = <&usbphy 2>; |
| 342 | phy-names = "usb"; | ||
| 339 | status = "disabled"; | 343 | status = "disabled"; |
| 340 | }; | 344 | }; |
| 341 | 345 | ||
| @@ -346,6 +350,7 @@ · 4 unmodified lines | |||
| 346 | clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; | 350 | clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; |
| 347 | resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; | 351 | resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; |
| 348 | phys = <&usbphy 3>; | 352 | phys = <&usbphy 3>; |
| 353 | phy-names = "usb"; | ||
| 349 | status = "disabled"; | 354 | status = "disabled"; |
| 350 | }; | 355 | }; |
| 351 | 356 | ||
| @@ -357,6 +362,7 @@ · 5 unmodified lines | |||
| 357 | <&ccu CLK_USB_OHCI3>; | 362 | <&ccu CLK_USB_OHCI3>; |
| 358 | resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; | 363 | resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; |
| 359 | phys = <&usbphy 3>; | 364 | phys = <&usbphy 3>; |
| 365 | phy-names = "usb"; | ||
| 360 | status = "disabled"; | 366 | status = "disabled"; |
| 361 | }; | 367 | }; |
| 362 | 368 | ||
| @@ -91,7 +91,6 @@ CONFIG_USB_SERIAL_PL2303=m · 90 unmodified lines | |||
| 91 | CONFIG_USB_SERIAL_CYBERJACK=m | 91 | CONFIG_USB_SERIAL_CYBERJACK=m |
| 92 | CONFIG_USB_SERIAL_XIRCOM=m | 92 | CONFIG_USB_SERIAL_XIRCOM=m |
| 93 | CONFIG_USB_SERIAL_OMNINET=m | 93 | CONFIG_USB_SERIAL_OMNINET=m |
| 94 | CONFIG_USB_RIO500=m | ||
| 95 | CONFIG_EXT2_FS=m | 94 | CONFIG_EXT2_FS=m |
| 96 | CONFIG_EXT3_FS=m | 95 | CONFIG_EXT3_FS=m |
| 97 | CONFIG_MSDOS_FS=y | 96 | CONFIG_MSDOS_FS=y |
| @@ -195,7 +195,6 @@ CONFIG_USB_SERIAL_XIRCOM=m · 194 unmodified lines | |||
| 195 | CONFIG_USB_SERIAL_OMNINET=m | 195 | CONFIG_USB_SERIAL_OMNINET=m |
| 196 | CONFIG_USB_EMI62=m | 196 | CONFIG_USB_EMI62=m |
| 197 | CONFIG_USB_EMI26=m | 197 | CONFIG_USB_EMI26=m |
| 198 | CONFIG_USB_RIO500=m | ||
| 199 | CONFIG_USB_LEGOTOWER=m | 198 | CONFIG_USB_LEGOTOWER=m |
| 200 | CONFIG_USB_LCD=m | 199 | CONFIG_USB_LCD=m |
| 201 | CONFIG_USB_CYTHERM=m | 200 | CONFIG_USB_CYTHERM=m |
| @@ -228,7 +228,7 @@ CONFIG_RTC_DRV_OMAP=m · 227 unmodified lines | |||
| 228 | CONFIG_DMADEVICES=y | 228 | CONFIG_DMADEVICES=y |
| 229 | CONFIG_TI_EDMA=y | 229 | CONFIG_TI_EDMA=y |
| 230 | CONFIG_COMMON_CLK_PWM=m | 230 | CONFIG_COMMON_CLK_PWM=m |
| 231 | CONFIG_REMOTEPROC=m | 231 | CONFIG_REMOTEPROC=y |
| 232 | CONFIG_DA8XX_REMOTEPROC=m | 232 | CONFIG_DA8XX_REMOTEPROC=m |
| 233 | CONFIG_MEMORY=y | 233 | CONFIG_MEMORY=y |
| 234 | CONFIG_TI_AEMIF=m | 234 | CONFIG_TI_AEMIF=m |
| @@ -415,7 +415,7 @@ CONFIG_SPI_SH_MSIOF=m · 414 unmodified lines | |||
| 415 | CONFIG_SPI_SH_HSPI=y | 415 | CONFIG_SPI_SH_HSPI=y |
| 416 | CONFIG_SPI_SIRF=y | 416 | CONFIG_SPI_SIRF=y |
| 417 | CONFIG_SPI_STM32=m | 417 | CONFIG_SPI_STM32=m |
| 418 | CONFIG_SPI_STM32_QSPI=m | 418 | CONFIG_SPI_STM32_QSPI=y |
| 419 | CONFIG_SPI_SUN4I=y | 419 | CONFIG_SPI_SUN4I=y |
| 420 | CONFIG_SPI_SUN6I=y | 420 | CONFIG_SPI_SUN6I=y |
| 421 | CONFIG_SPI_TEGRA114=y | 421 | CONFIG_SPI_TEGRA114=y |
| @@ -933,7 +933,7 @@ CONFIG_BCM2835_MBOX=y · 511 unmodified lines | |||
| 933 | CONFIG_ROCKCHIP_IOMMU=y | 933 | CONFIG_ROCKCHIP_IOMMU=y |
| 934 | CONFIG_TEGRA_IOMMU_GART=y | 934 | CONFIG_TEGRA_IOMMU_GART=y |
| 935 | CONFIG_TEGRA_IOMMU_SMMU=y | 935 | CONFIG_TEGRA_IOMMU_SMMU=y |
| 936 | CONFIG_REMOTEPROC=m | 936 | CONFIG_REMOTEPROC=y |
| 937 | CONFIG_ST_REMOTEPROC=m | 937 | CONFIG_ST_REMOTEPROC=m |
| 938 | CONFIG_RPMSG_VIRTIO=m | 938 | CONFIG_RPMSG_VIRTIO=m |
| 939 | CONFIG_ASPEED_LPC_CTRL=m | 939 | CONFIG_ASPEED_LPC_CTRL=m |
| @@ -364,6 +364,7 @@ CONFIG_DRM_OMAP_PANEL_TPO_TD043MTEA1=m · 363 unmodified lines | |||
| 364 | CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11=m | 364 | CONFIG_DRM_OMAP_PANEL_NEC_NL8048HL11=m |
| 365 | CONFIG_DRM_TILCDC=m | 365 | CONFIG_DRM_TILCDC=m |
| 366 | CONFIG_DRM_PANEL_SIMPLE=m | 366 | CONFIG_DRM_PANEL_SIMPLE=m |
| 367 | CONFIG_DRM_TI_TFP410=m | ||
| 367 | CONFIG_FB=y | 368 | CONFIG_FB=y |
| 368 | CONFIG_FIRMWARE_EDID=y | 369 | CONFIG_FIRMWARE_EDID=y |
| 369 | CONFIG_FB_MODE_HELPERS=y | 370 | CONFIG_FB_MODE_HELPERS=y |
| @@ -423,6 +424,7 @@ CONFIG_USB_SERIAL_GENERIC=y · 53 unmodified lines | |||
| 423 | CONFIG_USB_SERIAL_SIMPLE=m | 424 | CONFIG_USB_SERIAL_SIMPLE=m |
| 424 | CONFIG_USB_SERIAL_FTDI_SIO=m | 425 | CONFIG_USB_SERIAL_FTDI_SIO=m |
| 425 | CONFIG_USB_SERIAL_PL2303=m | 426 | CONFIG_USB_SERIAL_PL2303=m |
| 427 | CONFIG_USB_SERIAL_OPTION=m | ||
| 426 | CONFIG_USB_TEST=m | 428 | CONFIG_USB_TEST=m |
| 427 | CONFIG_NOP_USB_XCEIV=m | 429 | CONFIG_NOP_USB_XCEIV=m |
| 428 | CONFIG_AM335X_PHY_USB=m | 430 | CONFIG_AM335X_PHY_USB=m |
| @@ -460,6 +462,7 @@ CONFIG_MMC_SDHCI_OMAP=y · 31 unmodified lines | |||
| 460 | CONFIG_NEW_LEDS=y | 462 | CONFIG_NEW_LEDS=y |
| 461 | CONFIG_LEDS_CLASS=m | 463 | CONFIG_LEDS_CLASS=m |
| 462 | CONFIG_LEDS_CPCAP=m | 464 | CONFIG_LEDS_CPCAP=m |
| 465 | CONFIG_LEDS_LM3532=m | ||
| 463 | CONFIG_LEDS_GPIO=m | 466 | CONFIG_LEDS_GPIO=m |
| 464 | CONFIG_LEDS_PCA963X=m | 467 | CONFIG_LEDS_PCA963X=m |
| 465 | CONFIG_LEDS_PWM=m | 468 | CONFIG_LEDS_PWM=m |
| @@ -481,7 +484,7 @@ CONFIG_RTC_DRV_OMAP=m · 15 unmodified lines | |||
| 481 | CONFIG_RTC_DRV_CPCAP=m | 484 | CONFIG_RTC_DRV_CPCAP=m |
| 482 | CONFIG_DMADEVICES=y | 485 | CONFIG_DMADEVICES=y |
| 483 | CONFIG_OMAP_IOMMU=y | 486 | CONFIG_OMAP_IOMMU=y |
| 484 | CONFIG_REMOTEPROC=m | 487 | CONFIG_REMOTEPROC=y |
| 485 | CONFIG_OMAP_REMOTEPROC=m | 488 | CONFIG_OMAP_REMOTEPROC=m |
| 486 | CONFIG_WKUP_M3_RPROC=m | 489 | CONFIG_WKUP_M3_RPROC=m |
| 487 | CONFIG_SOC_TI=y | 490 | CONFIG_SOC_TI=y |
| @@ -581,7 +581,6 @@ CONFIG_USB_SERIAL_XIRCOM=m · 580 unmodified lines | |||
| 581 | CONFIG_USB_SERIAL_OMNINET=m | 581 | CONFIG_USB_SERIAL_OMNINET=m |
| 582 | CONFIG_USB_EMI62=m | 582 | CONFIG_USB_EMI62=m |
| 583 | CONFIG_USB_EMI26=m | 583 | CONFIG_USB_EMI26=m |
| 584 | CONFIG_USB_RIO500=m | ||
| 585 | CONFIG_USB_LEGOTOWER=m | 584 | CONFIG_USB_LEGOTOWER=m |
| 586 | CONFIG_USB_LCD=m | 585 | CONFIG_USB_LCD=m |
| 587 | CONFIG_USB_CYTHERM=m | 586 | CONFIG_USB_CYTHERM=m |
| @@ -327,7 +327,6 @@ CONFIG_USB_EMI62=m · 326 unmodified lines | |||
| 327 | CONFIG_USB_EMI26=m | 327 | CONFIG_USB_EMI26=m |
| 328 | CONFIG_USB_ADUTUX=m | 328 | CONFIG_USB_ADUTUX=m |
| 329 | CONFIG_USB_SEVSEG=m | 329 | CONFIG_USB_SEVSEG=m |
| 330 | CONFIG_USB_RIO500=m | ||
| 331 | CONFIG_USB_LEGOTOWER=m | 330 | CONFIG_USB_LEGOTOWER=m |
| 332 | CONFIG_USB_LCD=m | 331 | CONFIG_USB_LCD=m |
| 333 | CONFIG_USB_CYPRESS_CY7C63=m | 332 | CONFIG_USB_CYPRESS_CY7C63=m |
| @@ -189,7 +189,6 @@ CONFIG_USB_SERIAL_XIRCOM=m · 188 unmodified lines | |||
| 189 | CONFIG_USB_SERIAL_OMNINET=m | 189 | CONFIG_USB_SERIAL_OMNINET=m |
| 190 | CONFIG_USB_EMI62=m | 190 | CONFIG_USB_EMI62=m |
| 191 | CONFIG_USB_EMI26=m | 191 | CONFIG_USB_EMI26=m |
| 192 | CONFIG_USB_RIO500=m | ||
| 193 | CONFIG_USB_LEGOTOWER=m | 192 | CONFIG_USB_LEGOTOWER=m |
| 194 | CONFIG_USB_LCD=m | 193 | CONFIG_USB_LCD=m |
| 195 | CONFIG_USB_CYTHERM=m | 194 | CONFIG_USB_CYTHERM=m |
| @@ -98,6 +98,7 @@ config CRYPTO_AES_ARM_CE · 97 unmodified lines | |||
| 98 | tristate "Accelerated AES using ARMv8 Crypto Extensions" | 98 | tristate "Accelerated AES using ARMv8 Crypto Extensions" |
| 99 | depends on KERNEL_MODE_NEON | 99 | depends on KERNEL_MODE_NEON |
| 100 | select CRYPTO_BLKCIPHER | 100 | select CRYPTO_BLKCIPHER |
| 101 | select CRYPTO_LIB_AES | ||
| 101 | select CRYPTO_SIMD | 102 | select CRYPTO_SIMD |
| 102 | help | 103 | help |
| 103 | Use an implementation of AES in CBC, CTR and XTS modes that uses | 104 | Use an implementation of AES in CBC, CTR and XTS modes that uses |
| @@ -9,6 +9,7 @@ · 8 unmodified lines | |||
| 9 | #include <asm/assembler.h> | 9 | #include <asm/assembler.h> |
| 10 | 10 | ||
| 11 | .text | 11 | .text |
| 12 | .arch armv8-a | ||
| 12 | .fpu crypto-neon-fp-armv8 | 13 | .fpu crypto-neon-fp-armv8 |
| 13 | .align 3 | 14 | .align 3 |
| 14 | 15 | ||
| @@ -1,6 +0,0 @@ | |||
| 1 | #ifndef _ASM_XEN_OPS_H | ||
| 2 | #define _ASM_XEN_OPS_H | ||
| 3 | |||
| 4 | void xen_efi_runtime_setup(void); | ||
| 5 | |||
| 6 | #endif /* _ASM_XEN_OPS_H */ | ||
| @@ -763,7 +763,8 @@ static struct omap_hwmod_class_sysconfig am33xx_timer_sysc = { · 762 unmodified lines | |||
| 763 | .rev_offs = 0x0000, | 763 | .rev_offs = 0x0000, |
| 764 | .sysc_offs = 0x0010, | 764 | .sysc_offs = 0x0010, |
| 765 | .syss_offs = 0x0014, | 765 | .syss_offs = 0x0014, |
| 766 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), | 766 | .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | |
| 767 | SYSC_HAS_RESET_STATUS, | ||
| 767 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | 768 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | |
| 768 | SIDLE_SMART_WKUP), | 769 | SIDLE_SMART_WKUP), |
| 769 | .sysc_fields = &omap_hwmod_sysc_type2, | 770 | .sysc_fields = &omap_hwmod_sysc_type2, |
| @@ -231,8 +231,9 @@ static struct omap_hwmod am33xx_control_hwmod = { · 230 unmodified lines | |||
| 231 | static struct omap_hwmod_class_sysconfig lcdc_sysc = { | 231 | static struct omap_hwmod_class_sysconfig lcdc_sysc = { |
| 232 | .rev_offs = 0x0, | 232 | .rev_offs = 0x0, |
| 233 | .sysc_offs = 0x54, | 233 | .sysc_offs = 0x54, |
| 234 | .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE), | 234 | .sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE, |
| 235 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | 235 | .idlemodes = SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | |
| 236 | MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART, | ||
| 236 | .sysc_fields = &omap_hwmod_sysc_type2, | 237 | .sysc_fields = &omap_hwmod_sysc_type2, |
| 237 | }; | 238 | }; |
| 238 | 239 | ||
| @@ -74,83 +74,6 @@ int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused) · 73 unmodified lines | |||
| 74 | return 0; | 74 | return 0; |
| 75 | } | 75 | } |
| 76 | 76 | ||
| 77 | /* | ||
| 78 | * This API is to be called during init to set the various voltage | ||
| 79 | * domains to the voltage as per the opp table. Typically we boot up | ||
| 80 | * at the nominal voltage. So this function finds out the rate of | ||
| 81 | * the clock associated with the voltage domain, finds out the correct | ||
| 82 | * opp entry and sets the voltage domain to the voltage specified | ||
| 83 | * in the opp entry | ||
| 84 | */ | ||
| 85 | static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, | ||
| 86 | const char *oh_name) | ||
| 87 | { | ||
| 88 | struct voltagedomain *voltdm; | ||
| 89 | struct clk *clk; | ||
| 90 | struct dev_pm_opp *opp; | ||
| 91 | unsigned long freq, bootup_volt; | ||
| 92 | struct device *dev; | ||
| 93 | |||
| 94 | if (!vdd_name || !clk_name || !oh_name) { | ||
| 95 | pr_err("%s: invalid parameters\n", __func__); | ||
| 96 | goto exit; | ||
| 97 | } | ||
| 98 | |||
| 99 | if (!strncmp(oh_name, "mpu", 3)) | ||
| 100 | /* | ||
| 101 | * All current OMAPs share voltage rail and clock | ||
| 102 | * source, so CPU0 is used to represent the MPU-SS. | ||
| 103 | */ | ||
| 104 | dev = get_cpu_device(0); | ||
| 105 | else | ||
| 106 | dev = omap_device_get_by_hwmod_name(oh_name); | ||
| 107 | |||
| 108 | if (IS_ERR(dev)) { | ||
| 109 | pr_err("%s: Unable to get dev pointer for hwmod %s\n", | ||
| 110 | __func__, oh_name); | ||
| 111 | goto exit; | ||
| 112 | } | ||
| 113 | |||
| 114 | voltdm = voltdm_lookup(vdd_name); | ||
| 115 | if (!voltdm) { | ||
| 116 | pr_err("%s: unable to get vdd pointer for vdd_%s\n", | ||
| 117 | __func__, vdd_name); | ||
| 118 | goto exit; | ||
| 119 | } | ||
| 120 | |||
| 121 | clk = clk_get(NULL, clk_name); | ||
| 122 | if (IS_ERR(clk)) { | ||
| 123 | pr_err("%s: unable to get clk %s\n", __func__, clk_name); | ||
| 124 | goto exit; | ||
| 125 | } | ||
| 126 | |||
| 127 | freq = clk_get_rate(clk); | ||
| 128 | clk_put(clk); | ||
| 129 | |||
| 130 | opp = dev_pm_opp_find_freq_ceil(dev, &freq); | ||
| 131 | if (IS_ERR(opp)) { | ||
| 132 | pr_err("%s: unable to find boot up OPP for vdd_%s\n", | ||
| 133 | __func__, vdd_name); | ||
| 134 | goto exit; | ||
| 135 | } | ||
| 136 | |||
| 137 | bootup_volt = dev_pm_opp_get_voltage(opp); | ||
| 138 | dev_pm_opp_put(opp); | ||
| 139 | |||
| 140 | if (!bootup_volt) { | ||
| 141 | pr_err("%s: unable to find voltage corresponding to the bootup OPP for vdd_%s\n", | ||
| 142 | __func__, vdd_name); | ||
| 143 | goto exit; | ||
| 144 | } | ||
| 145 | |||
| 146 | voltdm_scale(voltdm, bootup_volt); | ||
| 147 | return 0; | ||
| 148 | |||
| 149 | exit: | ||
| 150 | pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name); | ||
| 151 | return -EINVAL; | ||
| 152 | } | ||
| 153 | |||
| 154 | #ifdef CONFIG_SUSPEND | 77 | #ifdef CONFIG_SUSPEND |
| 155 | static int omap_pm_enter(suspend_state_t suspend_state) | 78 | static int omap_pm_enter(suspend_state_t suspend_state) |
| 156 | { | 79 | { |
| @@ -208,25 +131,6 @@ void omap_common_suspend_init(void *pm_suspend) · 51 unmodified lines | |||
| 208 | } | 131 | } |
| 209 | #endif /* CONFIG_SUSPEND */ | 132 | #endif /* CONFIG_SUSPEND */ |
| 210 | 133 | ||
| 211 | static void __init omap3_init_voltages(void) | ||
| 212 | { | ||
| 213 | if (!soc_is_omap34xx()) | ||
| 214 | return; | ||
| 215 | |||
| 216 | omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu"); | ||
| 217 | omap2_set_init_voltage("core", "l3_ick", "l3_main"); | ||
| 218 | } | ||
| 219 | |||
| 220 | static void __init omap4_init_voltages(void) | ||
| 221 | { | ||
| 222 | if (!soc_is_omap44xx()) | ||
| 223 | return; | ||
| 224 | |||
| 225 | omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu"); | ||
| 226 | omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1"); | ||
| 227 | omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva"); | ||
| 228 | } | ||
| 229 | |||
| 230 | int __maybe_unused omap_pm_nop_init(void) | 134 | int __maybe_unused omap_pm_nop_init(void) |
| 231 | { | 135 | { |
| 232 | return 0; | 136 | return 0; |
| @@ -246,10 +150,6 @@ int __init omap2_common_pm_late_init(void) · 13 unmodified lines | |||
| 246 | omap4_twl_init(); | 150 | omap4_twl_init(); |
| 247 | omap_voltage_late_init(); | 151 | omap_voltage_late_init(); |
| 248 | 152 | ||
| 249 | /* Initialize the voltages */ | ||
| 250 | omap3_init_voltages(); | ||
| 251 | omap4_init_voltages(); | ||
| 252 | |||
| 253 | /* Smartreflex device init */ | 153 | /* Smartreflex device init */ |
| 254 | omap_devinit_smartreflex(); | 154 | omap_devinit_smartreflex(); |
| 255 | 155 | ||
| @@ -1,3 +1,2 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0-only | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | obj-y := enlighten.o hypercall.o grant-table.o p2m.o mm.o | 2 | obj-y := enlighten.o hypercall.o grant-table.o p2m.o mm.o |
| 3 | obj-$(CONFIG_XEN_EFI) += efi.o | ||
| @@ -1,28 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0-or-later | ||
| 2 | /* | ||
| 3 | * Copyright (c) 2015, Linaro Limited, Shannon Zhao | ||
| 4 | */ | ||
| 5 | |||
| 6 | #include <linux/efi.h> | ||
| 7 | #include <xen/xen-ops.h> | ||
| 8 | #include <asm/xen/xen-ops.h> | ||
| 9 | |||
| 10 | /* Set XEN EFI runtime services function pointers. Other fields of struct efi, | ||
| 11 | * e.g. efi.systab, will be set like normal EFI. | ||
| 12 | */ | ||
| 13 | void __init xen_efi_runtime_setup(void) | ||
| 14 | { | ||
| 15 | efi.get_time = xen_efi_get_time; | ||
| 16 | efi.set_time = xen_efi_set_time; | ||
| 17 | efi.get_wakeup_time = xen_efi_get_wakeup_time; | ||
| 18 | efi.set_wakeup_time = xen_efi_set_wakeup_time; | ||
| 19 | efi.get_variable = xen_efi_get_variable; | ||
| 20 | efi.get_next_variable = xen_efi_get_next_variable; | ||
| 21 | efi.set_variable = xen_efi_set_variable; | ||
| 22 | efi.query_variable_info = xen_efi_query_variable_info; | ||
| 23 | efi.update_capsule = xen_efi_update_capsule; | ||
| 24 | efi.query_capsule_caps = xen_efi_query_capsule_caps; | ||
| 25 | efi.get_next_high_mono_count = xen_efi_get_next_high_mono_count; | ||
| 26 | efi.reset_system = xen_efi_reset_system; | ||
| 27 | } | ||
| 28 | EXPORT_SYMBOL_GPL(xen_efi_runtime_setup); | ||
| @@ -15,7 +15,6 @@ · 14 unmodified lines | |||
| 15 | #include <xen/xen-ops.h> | 15 | #include <xen/xen-ops.h> |
| 16 | #include <asm/xen/hypervisor.h> | 16 | #include <asm/xen/hypervisor.h> |
| 17 | #include <asm/xen/hypercall.h> | 17 | #include <asm/xen/hypercall.h> |
| 18 | #include <asm/xen/xen-ops.h> | ||
| 19 | #include <asm/system_misc.h> | 18 | #include <asm/system_misc.h> |
| 20 | #include <asm/efi.h> | 19 | #include <asm/efi.h> |
| 21 | #include <linux/interrupt.h> | 20 | #include <linux/interrupt.h> |
| @@ -437,7 +436,7 @@ EXPORT_SYMBOL_GPL(HYPERVISOR_memory_op); · 415 unmodified lines | |||
| 437 | EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op); | 436 | EXPORT_SYMBOL_GPL(HYPERVISOR_physdev_op); |
| 438 | EXPORT_SYMBOL_GPL(HYPERVISOR_vcpu_op); | 437 | EXPORT_SYMBOL_GPL(HYPERVISOR_vcpu_op); |
| 439 | EXPORT_SYMBOL_GPL(HYPERVISOR_tmem_op); | 438 | EXPORT_SYMBOL_GPL(HYPERVISOR_tmem_op); |
| 440 | EXPORT_SYMBOL_GPL(HYPERVISOR_platform_op); | 439 | EXPORT_SYMBOL_GPL(HYPERVISOR_platform_op_raw); |
| 441 | EXPORT_SYMBOL_GPL(HYPERVISOR_multicall); | 440 | EXPORT_SYMBOL_GPL(HYPERVISOR_multicall); |
| 442 | EXPORT_SYMBOL_GPL(HYPERVISOR_vm_assist); | 441 | EXPORT_SYMBOL_GPL(HYPERVISOR_vm_assist); |
| 443 | EXPORT_SYMBOL_GPL(HYPERVISOR_dm_op); | 442 | EXPORT_SYMBOL_GPL(HYPERVISOR_dm_op); |
| @@ -28,7 +28,10 @@ unsigned long xen_get_swiotlb_free_pages(unsigned int order) · 27 unmodified lines | |||
| 28 | 28 | ||
| 29 | for_each_memblock(memory, reg) { | 29 | for_each_memblock(memory, reg) { |
| 30 | if (reg->base < (phys_addr_t)0xffffffff) { | 30 | if (reg->base < (phys_addr_t)0xffffffff) { |
| 31 | flags |= __GFP_DMA; | 31 | if (IS_ENABLED(CONFIG_ZONE_DMA32)) |
| 32 | flags |= __GFP_DMA32; | ||
| 33 | else | ||
| 34 | flags |= __GFP_DMA; | ||
| 32 | break; | 35 | break; |
| 33 | } | 36 | } |
| 34 | } | 37 | } |
| @@ -110,7 +110,6 @@ config ARM64 · 109 unmodified lines | |||
| 110 | select GENERIC_STRNLEN_USER | 110 | select GENERIC_STRNLEN_USER |
| 111 | select GENERIC_TIME_VSYSCALL | 111 | select GENERIC_TIME_VSYSCALL |
| 112 | select GENERIC_GETTIMEOFDAY | 112 | select GENERIC_GETTIMEOFDAY |
| 113 | select GENERIC_COMPAT_VDSO if (!CPU_BIG_ENDIAN && COMPAT) | ||
| 114 | select HANDLE_DOMAIN_IRQ | 113 | select HANDLE_DOMAIN_IRQ |
| 115 | select HARDIRQS_SW_RESEND | 114 | select HARDIRQS_SW_RESEND |
| 116 | select HAVE_PCI | 115 | select HAVE_PCI |
| @@ -617,6 +616,23 @@ config CAVIUM_ERRATUM_30115 · 500 unmodified lines | |||
| 617 | 616 | ||
| 618 | If unsure, say Y. | 617 | If unsure, say Y. |
| 619 | 618 | ||
| 619 | config CAVIUM_TX2_ERRATUM_219 | ||
| 620 | bool "Cavium ThunderX2 erratum 219: PRFM between TTBR change and ISB fails" | ||
| 621 | default y | ||
| 622 | help | ||
| 623 | On Cavium ThunderX2, a load, store or prefetch instruction between a | ||
| 624 | TTBR update and the corresponding context synchronizing operation can | ||
| 625 | cause a spurious Data Abort to be delivered to any hardware thread in | ||
| 626 | the CPU core. | ||
| 627 | |||
| 628 | Work around the issue by avoiding the problematic code sequence and | ||
| 629 | trapping KVM guest TTBRx_EL1 writes to EL2 when SMT is enabled. The | ||
| 630 | trap handler performs the corresponding register access, skips the | ||
| 631 | instruction and ensures context synchronization by virtue of the | ||
| 632 | exception return. | ||
| 633 | |||
| 634 | If unsure, say Y. | ||
| 635 | |||
| 620 | config QCOM_FALKOR_ERRATUM_1003 | 636 | config QCOM_FALKOR_ERRATUM_1003 |
| 621 | bool "Falkor E1003: Incorrect translation due to ASID change" | 637 | bool "Falkor E1003: Incorrect translation due to ASID change" |
| 622 | default y | 638 | default y |
| @@ -1159,7 +1175,7 @@ menuconfig COMPAT · 536 unmodified lines | |||
| 1159 | if COMPAT | 1175 | if COMPAT |
| 1160 | 1176 | ||
| 1161 | config KUSER_HELPERS | 1177 | config KUSER_HELPERS |
| 1162 | bool "Enable kuser helpers page for 32 bit applications" | 1178 | bool "Enable kuser helpers page for 32-bit applications" |
| 1163 | default y | 1179 | default y |
| 1164 | help | 1180 | help |
| 1165 | Warning: disabling this option may break 32-bit user programs. | 1181 | Warning: disabling this option may break 32-bit user programs. |
| @@ -1185,6 +1201,18 @@ config KUSER_HELPERS · 19 unmodified lines | |||
| 1185 | Say N here only if you are absolutely certain that you do not | 1201 | Say N here only if you are absolutely certain that you do not |
| 1186 | need these helpers; otherwise, the safe option is to say Y. | 1202 | need these helpers; otherwise, the safe option is to say Y. |
| 1187 | 1203 | ||
| 1204 | config COMPAT_VDSO | ||
| 1205 | bool "Enable vDSO for 32-bit applications" | ||
| 1206 | depends on !CPU_BIG_ENDIAN && "$(CROSS_COMPILE_COMPAT)" != "" | ||
| 1207 | select GENERIC_COMPAT_VDSO | ||
| 1208 | default y | ||
| 1209 | help | ||
| 1210 | Place in the process address space of 32-bit applications an | ||
| 1211 | ELF shared object providing fast implementations of gettimeofday | ||
| 1212 | and clock_gettime. | ||
| 1213 | |||
| 1214 | You must have a 32-bit build of glibc 2.22 or later for programs | ||
| 1215 | to seamlessly take advantage of this. | ||
| 1188 | 1216 | ||
| 1189 | menuconfig ARMV8_DEPRECATED | 1217 | menuconfig ARMV8_DEPRECATED |
| 1190 | bool "Emulate deprecated/obsolete ARMv8 instructions" | 1218 | bool "Emulate deprecated/obsolete ARMv8 instructions" |
| @@ -53,22 +53,6 @@ $(warning Detected assembler with broken .inst; disassembly will be unreliable) · 52 unmodified lines | |||
| 53 | endif | 53 | endif |
| 54 | endif | 54 | endif |
| 55 | 55 | ||
| 56 | ifeq ($(CONFIG_GENERIC_COMPAT_VDSO), y) | ||
| 57 | CROSS_COMPILE_COMPAT ?= $(CONFIG_CROSS_COMPILE_COMPAT_VDSO:"%"=%) | ||
| 58 | |||
| 59 | ifeq ($(CONFIG_CC_IS_CLANG), y) | ||
| 60 | $(warning CROSS_COMPILE_COMPAT is clang, the compat vDSO will not be built) | ||
| 61 | else ifeq ($(strip $(CROSS_COMPILE_COMPAT)),) | ||
| 62 | $(warning CROSS_COMPILE_COMPAT not defined or empty, the compat vDSO will not be built) | ||
| 63 | else ifeq ($(shell which $(CROSS_COMPILE_COMPAT)gcc 2> /dev/null),) | ||
| 64 | $(error $(CROSS_COMPILE_COMPAT)gcc not found, check CROSS_COMPILE_COMPAT) | ||
| 65 | else | ||
| 66 | export CROSS_COMPILE_COMPAT | ||
| 67 | export CONFIG_COMPAT_VDSO := y | ||
| 68 | compat_vdso := -DCONFIG_COMPAT_VDSO=1 | ||
| 69 | endif | ||
| 70 | endif | ||
| 71 | |||
| 72 | KBUILD_CFLAGS += -mgeneral-regs-only $(lseinstr) $(brokengasinst) \ | 56 | KBUILD_CFLAGS += -mgeneral-regs-only $(lseinstr) $(brokengasinst) \ |
| 73 | $(compat_vdso) $(cc_has_k_constraint) | 57 | $(compat_vdso) $(cc_has_k_constraint) |
| 74 | KBUILD_CFLAGS += -fno-asynchronous-unwind-tables | 58 | KBUILD_CFLAGS += -fno-asynchronous-unwind-tables |
| @@ -104,6 +104,7 @@ · 103 unmodified lines | |||
| 104 | 104 | ||
| 105 | &ehci0 { | 105 | &ehci0 { |
| 106 | phys = <&usbphy 0>; | 106 | phys = <&usbphy 0>; |
| 107 | phy-names = "usb"; | ||
| 107 | status = "okay"; | 108 | status = "okay"; |
| 108 | }; | 109 | }; |
| 109 | 110 | ||
| @@ -150,6 +151,7 @@ · 40 unmodified lines | |||
| 150 | 151 | ||
| 151 | &ohci0 { | 152 | &ohci0 { |
| 152 | phys = <&usbphy 0>; | 153 | phys = <&usbphy 0>; |
| 154 | phy-names = "usb"; | ||
| 153 | status = "okay"; | 155 | status = "okay"; |
| 154 | }; | 156 | }; |
| 155 | 157 | ||
| @@ -553,6 +553,7 @@ · 552 unmodified lines | |||
| 553 | resets = <&ccu RST_BUS_OHCI1>, | 553 | resets = <&ccu RST_BUS_OHCI1>, |
| 554 | <&ccu RST_BUS_EHCI1>; | 554 | <&ccu RST_BUS_EHCI1>; |
| 555 | phys = <&usbphy 1>; | 555 | phys = <&usbphy 1>; |
| 556 | phy-names = "usb"; | ||
| 556 | status = "disabled"; | 557 | status = "disabled"; |
| 557 | }; | 558 | }; |
| 558 | 559 | ||
| @@ -564,6 +565,7 @@ · 5 unmodified lines | |||
| 564 | <&ccu CLK_USB_OHCI1>; | 565 | <&ccu CLK_USB_OHCI1>; |
| 565 | resets = <&ccu RST_BUS_OHCI1>; | 566 | resets = <&ccu RST_BUS_OHCI1>; |
| 566 | phys = <&usbphy 1>; | 567 | phys = <&usbphy 1>; |
| 568 | phy-names = "usb"; | ||
| 567 | status = "disabled"; | 569 | status = "disabled"; |
| 568 | }; | 570 | }; |
| 569 | 571 | ||
| @@ -547,6 +547,7 @@ · 546 unmodified lines | |||
| 547 | resets = <&ccu RST_BUS_OHCI3>, | 547 | resets = <&ccu RST_BUS_OHCI3>, |
| 548 | <&ccu RST_BUS_EHCI3>; | 548 | <&ccu RST_BUS_EHCI3>; |
| 549 | phys = <&usb2phy 3>; | 549 | phys = <&usb2phy 3>; |
| 550 | phy-names = "usb"; | ||
| 550 | status = "disabled"; | 551 | status = "disabled"; |
| 551 | }; | 552 | }; |
| 552 | 553 | ||
| @@ -558,6 +559,7 @@ · 5 unmodified lines | |||
| 558 | <&ccu CLK_USB_OHCI3>; | 559 | <&ccu CLK_USB_OHCI3>; |
| 559 | resets = <&ccu RST_BUS_OHCI3>; | 560 | resets = <&ccu RST_BUS_OHCI3>; |
| 560 | phys = <&usb2phy 3>; | 561 | phys = <&usb2phy 3>; |
| 562 | phy-names = "usb"; | ||
| 561 | status = "disabled"; | 563 | status = "disabled"; |
| 562 | }; | 564 | }; |
| 563 | 565 | ||
| @@ -723,7 +723,7 @@ CONFIG_TEGRA_IOMMU_SMMU=y · 722 unmodified lines | |||
| 723 | CONFIG_ARM_SMMU=y | 723 | CONFIG_ARM_SMMU=y |
| 724 | CONFIG_ARM_SMMU_V3=y | 724 | CONFIG_ARM_SMMU_V3=y |
| 725 | CONFIG_QCOM_IOMMU=y | 725 | CONFIG_QCOM_IOMMU=y |
| 726 | CONFIG_REMOTEPROC=m | 726 | CONFIG_REMOTEPROC=y |
| 727 | CONFIG_QCOM_Q6V5_MSS=m | 727 | CONFIG_QCOM_Q6V5_MSS=m |
| 728 | CONFIG_QCOM_Q6V5_PAS=m | 728 | CONFIG_QCOM_Q6V5_PAS=m |
| 729 | CONFIG_QCOM_SYSMON=m | 729 | CONFIG_QCOM_SYSMON=m |
| @@ -78,10 +78,9 @@ alternative_else_nop_endif · 77 unmodified lines | |||
| 78 | /* | 78 | /* |
| 79 | * Remove the address tag from a virtual address, if present. | 79 | * Remove the address tag from a virtual address, if present. |
| 80 | */ | 80 | */ |
| 81 | .macro clear_address_tag, dst, addr | 81 | .macro untagged_addr, dst, addr |
| 82 | tst \addr, #(1 << 55) | 82 | sbfx \dst, \addr, #0, #56 |
| 83 | bic \dst, \addr, #(0xff << 56) | 83 | and \dst, \dst, \addr |
| 84 | csel \dst, \dst, \addr, eq | ||
| 85 | .endm | 84 | .endm |
| 86 | 85 | ||
| 87 | #endif | 86 | #endif |
| @@ -321,7 +321,8 @@ static inline s64 __lse_atomic64_dec_if_positive(atomic64_t *v) · 320 unmodified lines | |||
| 321 | } | 321 | } |
| 322 | 322 | ||
| 323 | #define __CMPXCHG_CASE(w, sfx, name, sz, mb, cl...) \ | 323 | #define __CMPXCHG_CASE(w, sfx, name, sz, mb, cl...) \ |
| 324 | static inline u##sz __lse__cmpxchg_case_##name##sz(volatile void *ptr, \ | 324 | static __always_inline u##sz \ |
| 325 | __lse__cmpxchg_case_##name##sz(volatile void *ptr, \ | ||
| 325 | u##sz old, \ | 326 | u##sz old, \ |
| 326 | u##sz new) \ | 327 | u##sz new) \ |
| 327 | { \ | 328 | { \ |
| @@ -362,7 +363,8 @@ __CMPXCHG_CASE(x, , mb_, 64, al, "memory") · 34 unmodified lines | |||
| 362 | #undef __CMPXCHG_CASE | 363 | #undef __CMPXCHG_CASE |
| 363 | 364 | ||
| 364 | #define __CMPXCHG_DBL(name, mb, cl...) \ | 365 | #define __CMPXCHG_DBL(name, mb, cl...) \ |
| 365 | static inline long __lse__cmpxchg_double##name(unsigned long old1, \ | 366 | static __always_inline long \ |
| 367 | __lse__cmpxchg_double##name(unsigned long old1, \ | ||
| 366 | unsigned long old2, \ | 368 | unsigned long old2, \ |
| 367 | unsigned long new1, \ | 369 | unsigned long new1, \ |
| 368 | unsigned long new2, \ | 370 | unsigned long new2, \ |
| @@ -52,7 +52,9 @@ · 51 unmodified lines | |||
| 52 | #define ARM64_HAS_IRQ_PRIO_MASKING 42 | 52 | #define ARM64_HAS_IRQ_PRIO_MASKING 42 |
| 53 | #define ARM64_HAS_DCPODP 43 | 53 | #define ARM64_HAS_DCPODP 43 |
| 54 | #define ARM64_WORKAROUND_1463225 44 | 54 | #define ARM64_WORKAROUND_1463225 44 |
| 55 | #define ARM64_WORKAROUND_CAVIUM_TX2_219_TVM 45 | ||
| 56 | #define ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM 46 | ||
| 55 | 57 | ||
| 56 | #define ARM64_NCAPS 45 | 58 | #define ARM64_NCAPS 47 |
| 57 | 59 | ||
| 58 | #endif /* __ASM_CPUCAPS_H */ | 60 | #endif /* __ASM_CPUCAPS_H */ |
| @@ -47,30 +47,6 @@ · 46 unmodified lines | |||
| 47 | #define read_sysreg_el2(r) read_sysreg_elx(r, _EL2, _EL1) | 47 | #define read_sysreg_el2(r) read_sysreg_elx(r, _EL2, _EL1) |
| 48 | #define write_sysreg_el2(v,r) write_sysreg_elx(v, r, _EL2, _EL1) | 48 | #define write_sysreg_el2(v,r) write_sysreg_elx(v, r, _EL2, _EL1) |
| 49 | 49 | ||
| 50 | /** | ||
| 51 | * hyp_alternate_select - Generates patchable code sequences that are | ||
| 52 | * used to switch between two implementations of a function, depending | ||
| 53 | * on the availability of a feature. | ||
| 54 | * | ||
| 55 | * @fname: a symbol name that will be defined as a function returning a | ||
| 56 | * function pointer whose type will match @orig and @alt | ||
| 57 | * @orig: A pointer to the default function, as returned by @fname when | ||
| 58 | * @cond doesn't hold | ||
| 59 | * @alt: A pointer to the alternate function, as returned by @fname | ||
| 60 | * when @cond holds | ||
| 61 | * @cond: a CPU feature (as described in asm/cpufeature.h) | ||
| 62 | */ | ||
| 63 | #define hyp_alternate_select(fname, orig, alt, cond) \ | ||
| 64 | typeof(orig) * __hyp_text fname(void) \ | ||
| 65 | { \ | ||
| 66 | typeof(alt) *val = orig; \ | ||
| 67 | asm volatile(ALTERNATIVE("nop \n", \ | ||
| 68 | "mov %0, %1 \n", \ | ||
| 69 | cond) \ | ||
| 70 | : "+r" (val) : "r" (alt)); \ | ||
| 71 | return val; \ | ||
| 72 | } | ||
| 73 | |||
| 74 | int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu); | 50 | int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu); |
| 75 | 51 | ||
| 76 | void __vgic_v3_save_state(struct kvm_vcpu *vcpu); | 52 | void __vgic_v3_save_state(struct kvm_vcpu *vcpu); |
| @@ -215,12 +215,18 @@ static inline unsigned long kaslr_offset(void) · 214 unmodified lines | |||
| 215 | * up with a tagged userland pointer. Clear the tag to get a sane pointer to | 215 | * up with a tagged userland pointer. Clear the tag to get a sane pointer to |
| 216 | * pass on to access_ok(), for instance. | 216 | * pass on to access_ok(), for instance. |
| 217 | */ | 217 | */ |
| 218 | #define untagged_addr(addr) \ | 218 | #define __untagged_addr(addr) \ |
| 219 | ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55)) | 219 | ((__force __typeof__(addr))sign_extend64((__force u64)(addr), 55)) |
| 220 | 220 | ||
| 221 | #define untagged_addr(addr) ({ \ | ||
| 222 | u64 __addr = (__force u64)addr; \ | ||
| 223 | __addr &= __untagged_addr(__addr); \ | ||
| 224 | (__force __typeof__(addr))__addr; \ | ||
| 225 | }) | ||
| 226 | |||
| 221 | #ifdef CONFIG_KASAN_SW_TAGS | 227 | #ifdef CONFIG_KASAN_SW_TAGS |
| 222 | #define __tag_shifted(tag) ((u64)(tag) << 56) | 228 | #define __tag_shifted(tag) ((u64)(tag) << 56) |
| 223 | #define __tag_reset(addr) untagged_addr(addr) | 229 | #define __tag_reset(addr) __untagged_addr(addr) |
| 224 | #define __tag_get(addr) (__u8)((u64)(addr) >> 56) | 230 | #define __tag_get(addr) (__u8)((u64)(addr) >> 56) |
| 225 | #else | 231 | #else |
| 226 | #define __tag_shifted(tag) 0UL | 232 | #define __tag_shifted(tag) 0UL |
| @@ -876,9 +876,6 @@ static inline void update_mmu_cache(struct vm_area_struct *vma, · 875 unmodified lines | |||
| 876 | 876 | ||
| 877 | #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0) | 877 | #define update_mmu_cache_pmd(vma, address, pmd) do { } while (0) |
| 878 | 878 | ||
| 879 | #define kc_vaddr_to_offset(v) ((v) & ~PAGE_END) | ||
| 880 | #define kc_offset_to_vaddr(o) ((o) | PAGE_END) | ||
| 881 | |||
| 882 | #ifdef CONFIG_ARM64_PA_BITS_52 | 879 | #ifdef CONFIG_ARM64_PA_BITS_52 |
| 883 | #define phys_to_ttbr(addr) (((addr) | ((addr) >> 46)) & TTBR_BADDR_MASK_52) | 880 | #define phys_to_ttbr(addr) (((addr) | ((addr) >> 46)) & TTBR_BADDR_MASK_52) |
| 884 | #else | 881 | #else |
| @@ -212,7 +212,7 @@ · 211 unmodified lines | |||
| 212 | #define SYS_FAR_EL1 sys_reg(3, 0, 6, 0, 0) | 212 | #define SYS_FAR_EL1 sys_reg(3, 0, 6, 0, 0) |
| 213 | #define SYS_PAR_EL1 sys_reg(3, 0, 7, 4, 0) | 213 | #define SYS_PAR_EL1 sys_reg(3, 0, 7, 4, 0) |
| 214 | 214 | ||
| 215 | #define SYS_PAR_EL1_F BIT(1) | 215 | #define SYS_PAR_EL1_F BIT(0) |
| 216 | #define SYS_PAR_EL1_FST GENMASK(6, 1) | 216 | #define SYS_PAR_EL1_FST GENMASK(6, 1) |
| 217 | 217 | ||
| 218 | /*** Statistical Profiling Extension ***/ | 218 | /*** Statistical Profiling Extension ***/ |
| @@ -20,7 +20,7 @@ · 19 unmodified lines | |||
| 20 | 20 | ||
| 21 | #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") | 21 | #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") |
| 22 | 22 | ||
| 23 | #if __LINUX_ARM_ARCH__ >= 8 | 23 | #if __LINUX_ARM_ARCH__ >= 8 && defined(CONFIG_AS_DMB_ISHLD) |
| 24 | #define aarch32_smp_mb() dmb(ish) | 24 | #define aarch32_smp_mb() dmb(ish) |
| 25 | #define aarch32_smp_rmb() dmb(ishld) | 25 | #define aarch32_smp_rmb() dmb(ishld) |
| 26 | #define aarch32_smp_wmb() dmb(ishst) | 26 | #define aarch32_smp_wmb() dmb(ishst) |
| @@ -1,33 +0,0 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ | ||
| 2 | /* | ||
| 3 | * Copyright (C) 2012 ARM Limited | ||
| 4 | */ | ||
| 5 | #ifndef __ASM_VDSO_DATAPAGE_H | ||
| 6 | #define __ASM_VDSO_DATAPAGE_H | ||
| 7 | |||
| 8 | #ifndef __ASSEMBLY__ | ||
| 9 | |||
| 10 | struct vdso_data { | ||
| 11 | __u64 cs_cycle_last; /* Timebase at clocksource init */ | ||
| 12 | __u64 raw_time_sec; /* Raw time */ | ||
| 13 | __u64 raw_time_nsec; | ||
| 14 | __u64 xtime_clock_sec; /* Kernel time */ | ||
| 15 | __u64 xtime_clock_nsec; | ||
| 16 | __u64 xtime_coarse_sec; /* Coarse time */ | ||
| 17 | __u64 xtime_coarse_nsec; | ||
| 18 | __u64 wtm_clock_sec; /* Wall to monotonic time */ | ||
| 19 | __u64 wtm_clock_nsec; | ||
| 20 | __u32 tb_seq_count; /* Timebase sequence counter */ | ||
| 21 | /* cs_* members must be adjacent and in this order (ldp accesses) */ | ||
| 22 | __u32 cs_mono_mult; /* NTP-adjusted clocksource multiplier */ | ||
| 23 | __u32 cs_shift; /* Clocksource shift (mono = raw) */ | ||
| 24 | __u32 cs_raw_mult; /* Raw clocksource multiplier */ | ||
| 25 | __u32 tz_minuteswest; /* Whacky timezone stuff */ | ||
| 26 | __u32 tz_dsttime; | ||
| 27 | __u32 use_syscall; | ||
| 28 | __u32 hrtimer_res; | ||
| 29 | }; | ||
| 30 | |||
| 31 | #endif /* !__ASSEMBLY__ */ | ||
| 32 | |||
| 33 | #endif /* __ASM_VDSO_DATAPAGE_H */ | ||
| @@ -1,7 +0,0 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | ||
| 2 | #ifndef _ASM_XEN_OPS_H | ||
| 3 | #define _ASM_XEN_OPS_H | ||
| 4 | |||
| 5 | void xen_efi_runtime_setup(void); | ||
| 6 | |||
| 7 | #endif /* _ASM_XEN_OPS_H */ | ||
| @@ -174,6 +174,9 @@ static void __init register_insn_emulation(struct insn_emulation_ops *ops) · 173 unmodified lines | |||
| 174 | struct insn_emulation *insn; | 174 | struct insn_emulation *insn; |
| 175 | 175 | ||
| 176 | insn = kzalloc(sizeof(*insn), GFP_KERNEL); | 176 | insn = kzalloc(sizeof(*insn), GFP_KERNEL); |
| 177 | if (!insn) | ||
| 178 | return; | ||
| 179 | |||
| 177 | insn->ops = ops; | 180 | insn->ops = ops; |
| 178 | insn->min = INSN_UNDEF; | 181 | insn->min = INSN_UNDEF; |
| 179 | 182 | ||
| @@ -233,6 +236,8 @@ static void __init register_insn_emulation_sysctl(void) · 53 unmodified lines | |||
| 233 | 236 | ||
| 234 | insns_sysctl = kcalloc(nr_insn_emulated + 1, sizeof(*sysctl), | 237 | insns_sysctl = kcalloc(nr_insn_emulated + 1, sizeof(*sysctl), |
| 235 | GFP_KERNEL); | 238 | GFP_KERNEL); |
| 239 | if (!insns_sysctl) | ||
| 240 | return; | ||
| 236 | 241 | ||
| 237 | raw_spin_lock_irqsave(&insn_emulation_lock, flags); | 242 | raw_spin_lock_irqsave(&insn_emulation_lock, flags); |
| 238 | list_for_each_entry(insn, &insn_emulation, node) { | 243 | list_for_each_entry(insn, &insn_emulation, node) { |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | |||
| 12 | #include <asm/cpu.h> | 12 | #include <asm/cpu.h> |
| 13 | #include <asm/cputype.h> | 13 | #include <asm/cputype.h> |
| 14 | #include <asm/cpufeature.h> | 14 | #include <asm/cpufeature.h> |
| 15 | #include <asm/smp_plat.h> | ||
| 15 | 16 | ||
| 16 | static bool __maybe_unused | 17 | static bool __maybe_unused |
| 17 | is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope) | 18 | is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope) |
| @@ -128,8 +129,8 @@ static void install_bp_hardening_cb(bp_hardening_cb_t fn, · 110 unmodified lines | |||
| 128 | int cpu, slot = -1; | 129 | int cpu, slot = -1; |
| 129 | 130 | ||
| 130 | /* | 131 | /* |
| 131 | * enable_smccc_arch_workaround_1() passes NULL for the hyp_vecs | 132 | * detect_harden_bp_fw() passes NULL for the hyp_vecs start/end if |
| 132 | * start/end if we're a guest. Skip the hyp-vectors work. | 133 | * we're a guest. Skip the hyp-vectors work. |
| 133 | */ | 134 | */ |
| 134 | if (!hyp_vecs_start) { | 135 | if (!hyp_vecs_start) { |
| 135 | __this_cpu_write(bp_hardening_data.fn, fn); | 136 | __this_cpu_write(bp_hardening_data.fn, fn); |
| @@ -623,6 +624,30 @@ check_branch_predictor(const struct arm64_cpu_capabilities *entry, int scope) · 487 unmodified lines | |||
| 623 | return (need_wa > 0); | 624 | return (need_wa > 0); |
| 624 | } | 625 | } |
| 625 | 626 | ||
| 627 | static const __maybe_unused struct midr_range tx2_family_cpus[] = { | ||
| 628 | MIDR_ALL_VERSIONS(MIDR_BRCM_VULCAN), | ||
| 629 | MIDR_ALL_VERSIONS(MIDR_CAVIUM_THUNDERX2), | ||
| 630 | {}, | ||
| 631 | }; | ||
| 632 | |||
| 633 | static bool __maybe_unused | ||
| 634 | needs_tx2_tvm_workaround(const struct arm64_cpu_capabilities *entry, | ||
| 635 | int scope) | ||
| 636 | { | ||
| 637 | int i; | ||
| 638 | |||
| 639 | if (!is_affected_midr_range_list(entry, scope) || | ||
| 640 | !is_hyp_mode_available()) | ||
| 641 | return false; | ||
| 642 | |||
| 643 | for_each_possible_cpu(i) { | ||
| 644 | if (MPIDR_AFFINITY_LEVEL(cpu_logical_map(i), 0) != 0) | ||
| 645 | return true; | ||
| 646 | } | ||
| 647 | |||
| 648 | return false; | ||
| 649 | } | ||
| 650 | |||
| 626 | #ifdef CONFIG_HARDEN_EL2_VECTORS | 651 | #ifdef CONFIG_HARDEN_EL2_VECTORS |
| 627 | 652 | ||
| 628 | static const struct midr_range arm64_harden_el2_vectors[] = { | 653 | static const struct midr_range arm64_harden_el2_vectors[] = { |
| @@ -851,6 +876,19 @@ const struct arm64_cpu_capabilities arm64_errata[] = { · 222 unmodified lines | |||
| 851 | .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, | 876 | .type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM, |
| 852 | .matches = has_cortex_a76_erratum_1463225, | 877 | .matches = has_cortex_a76_erratum_1463225, |
| 853 | }, | 878 | }, |
| 879 | #endif | ||
| 880 | #ifdef CONFIG_CAVIUM_TX2_ERRATUM_219 | ||
| 881 | { | ||
| 882 | .desc = "Cavium ThunderX2 erratum 219 (KVM guest sysreg trapping)", | ||
| 883 | .capability = ARM64_WORKAROUND_CAVIUM_TX2_219_TVM, | ||
| 884 | ERRATA_MIDR_RANGE_LIST(tx2_family_cpus), | ||
| 885 | .matches = needs_tx2_tvm_workaround, | ||
| 886 | }, | ||
| 887 | { | ||
| 888 | .desc = "Cavium ThunderX2 erratum 219 (PRFM removal)", | ||
| 889 | .capability = ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM, | ||
| 890 | ERRATA_MIDR_RANGE_LIST(tx2_family_cpus), | ||
| 891 | }, | ||
| 854 | #endif | 892 | #endif |
| 855 | { | 893 | { |
| 856 | } | 894 | } |
| @@ -136,6 +136,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar0[] = { · 135 unmodified lines | |||
| 136 | 136 | ||
| 137 | static const struct arm64_ftr_bits ftr_id_aa64isar1[] = { | 137 | static const struct arm64_ftr_bits ftr_id_aa64isar1[] = { |
| 138 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_SB_SHIFT, 4, 0), | 138 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_SB_SHIFT, 4, 0), |
| 139 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_FRINTTS_SHIFT, 4, 0), | ||
| 139 | ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH), | 140 | ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH), |
| 140 | FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_GPI_SHIFT, 4, 0), | 141 | FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_GPI_SHIFT, 4, 0), |
| 141 | ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH), | 142 | ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH), |
| @@ -175,11 +176,16 @@ static const struct arm64_ftr_bits ftr_id_aa64pfr1[] = { · 33 unmodified lines | |||
| 175 | }; | 176 | }; |
| 176 | 177 | ||
| 177 | static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = { | 178 | static const struct arm64_ftr_bits ftr_id_aa64zfr0[] = { |
| 178 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SM4_SHIFT, 4, 0), | 179 | ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE), |
| 179 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SHA3_SHIFT, 4, 0), | 180 | FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SM4_SHIFT, 4, 0), |
| 180 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_BITPERM_SHIFT, 4, 0), | 181 | ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE), |
| 181 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_AES_SHIFT, 4, 0), | 182 | FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SHA3_SHIFT, 4, 0), |
| 182 | ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SVEVER_SHIFT, 4, 0), | 183 | ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE), |
| 184 | FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_BITPERM_SHIFT, 4, 0), | ||
| 185 | ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE), | ||
| 186 | FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_AES_SHIFT, 4, 0), | ||
| 187 | ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_SVE), | ||
| 188 | FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ZFR0_SVEVER_SHIFT, 4, 0), | ||
| 183 | ARM64_FTR_END, | 189 | ARM64_FTR_END, |
| 184 | }; | 190 | }; |
| 185 | 191 | ||
| @@ -604,7 +604,7 @@ el1_da: · 603 unmodified lines | |||
| 604 | */ | 604 | */ |
| 605 | mrs x3, far_el1 | 605 | mrs x3, far_el1 |
| 606 | inherit_daif pstate=x23, tmp=x2 | 606 | inherit_daif pstate=x23, tmp=x2 |
| 607 | clear_address_tag x0, x3 | 607 | untagged_addr x0, x3 |
| 608 | mov x2, sp // struct pt_regs | 608 | mov x2, sp // struct pt_regs |
| 609 | bl do_mem_abort | 609 | bl do_mem_abort |
| 610 | 610 | ||
| @@ -680,7 +680,7 @@ alternative_if ARM64_HAS_IRQ_PRIO_MASKING · 69 unmodified lines | |||
| 680 | orr x24, x24, x0 | 680 | orr x24, x24, x0 |
| 681 | alternative_else_nop_endif | 681 | alternative_else_nop_endif |
| 682 | cbnz x24, 1f // preempt count != 0 || NMI return path | 682 | cbnz x24, 1f // preempt count != 0 || NMI return path |
| 683 | bl preempt_schedule_irq // irq en/disable is done inside | 683 | bl arm64_preempt_schedule_irq // irq en/disable is done inside |
| 684 | 1: | 684 | 1: |
| 685 | #endif | 685 | #endif |
| 686 | 686 | ||
| @@ -775,6 +775,7 @@ el0_sync_compat: · 88 unmodified lines | |||
| 775 | b.ge el0_dbg | 775 | b.ge el0_dbg |
| 776 | b el0_inv | 776 | b el0_inv |
| 777 | el0_svc_compat: | 777 | el0_svc_compat: |
| 778 | gic_prio_kentry_setup tmp=x1 | ||
| 778 | mov x0, sp | 779 | mov x0, sp |
| 779 | bl el0_svc_compat_handler | 780 | bl el0_svc_compat_handler |
| 780 | b ret_to_user | 781 | b ret_to_user |
| @@ -807,7 +808,7 @@ el0_da: · 26 unmodified lines | |||
| 807 | mrs x26, far_el1 | 808 | mrs x26, far_el1 |
| 808 | ct_user_exit_irqoff | 809 | ct_user_exit_irqoff |
| 809 | enable_daif | 810 | enable_daif |
| 810 | clear_address_tag x0, x26 | 811 | untagged_addr x0, x26 |
| 811 | mov x1, x25 | 812 | mov x1, x25 |
| 812 | mov x2, sp | 813 | mov x2, sp |
| 813 | bl do_mem_abort | 814 | bl do_mem_abort |
| @@ -1070,7 +1071,9 @@ alternative_insn isb, nop, ARM64_WORKAROUND_QCOM_FALKOR_E1003 · 256 unmodified lines | |||
| 1070 | #else | 1071 | #else |
| 1071 | ldr x30, =vectors | 1072 | ldr x30, =vectors |
| 1072 | #endif | 1073 | #endif |
| 1074 | alternative_if_not ARM64_WORKAROUND_CAVIUM_TX2_219_PRFM | ||
| 1073 | prfm plil1strm, [x30, #(1b - tramp_vectors)] | 1075 | prfm plil1strm, [x30, #(1b - tramp_vectors)] |
| 1076 | alternative_else_nop_endif | ||
| 1074 | msr vbar_el1, x30 | 1077 | msr vbar_el1, x30 |
| 1075 | add x30, x30, #(1b - tramp_vectors) | 1078 | add x30, x30, #(1b - tramp_vectors) |
| 1076 | isb | 1079 | isb |
| @@ -121,10 +121,16 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) · 120 unmodified lines | |||
| 121 | 121 | ||
| 122 | /* | 122 | /* |
| 123 | * Ensure updated trampoline is visible to instruction | 123 | * Ensure updated trampoline is visible to instruction |
| 124 | * fetch before we patch in the branch. | 124 | * fetch before we patch in the branch. Although the |
| 125 | * architecture doesn't require an IPI in this case, | ||
| 126 | * Neoverse-N1 erratum #1542419 does require one | ||
| 127 | * if the TLB maintenance in module_enable_ro() is | ||
| 128 | * skipped due to rodata_enabled. It doesn't seem worth | ||
| 129 | * it to make it conditional given that this is | ||
| 130 | * certainly not a fast-path. | ||
| 125 | */ | 131 | */ |
| 126 | __flush_icache_range((unsigned long)&dst[0], | 132 | flush_icache_range((unsigned long)&dst[0], |
| 127 | (unsigned long)&dst[1]); | 133 | (unsigned long)&dst[1]); |
| 128 | } | 134 | } |
| 129 | addr = (unsigned long)dst; | 135 | addr = (unsigned long)dst; |
| 130 | #else /* CONFIG_ARM64_MODULE_PLTS */ | 136 | #else /* CONFIG_ARM64_MODULE_PLTS */ |
| @@ -201,6 +201,7 @@ static int create_safe_exec_page(void *src_start, size_t length, · 200 unmodified lines | |||
| 201 | gfp_t mask) | 201 | gfp_t mask) |
| 202 | { | 202 | { |
| 203 | int rc = 0; | 203 | int rc = 0; |
| 204 | pgd_t *trans_pgd; | ||
| 204 | pgd_t *pgdp; | 205 | pgd_t *pgdp; |
| 205 | pud_t *pudp; | 206 | pud_t *pudp; |
| 206 | pmd_t *pmdp; | 207 | pmd_t *pmdp; |
| @@ -215,7 +216,13 @@ static int create_safe_exec_page(void *src_start, size_t length, · 8 unmodified lines | |||
| 215 | memcpy((void *)dst, src_start, length); | 216 | memcpy((void *)dst, src_start, length); |
| 216 | __flush_icache_range(dst, dst + length); | 217 | __flush_icache_range(dst, dst + length); |
| 217 | 218 | ||
| 218 | pgdp = pgd_offset_raw(allocator(mask), dst_addr); | 219 | trans_pgd = allocator(mask); |
| 220 | if (!trans_pgd) { | ||
| 221 | rc = -ENOMEM; | ||
| 222 | goto out; | ||
| 223 | } | ||
| 224 | |||
| 225 | pgdp = pgd_offset_raw(trans_pgd, dst_addr); | ||
| 219 | if (pgd_none(READ_ONCE(*pgdp))) { | 226 | if (pgd_none(READ_ONCE(*pgdp))) { |
| 220 | pudp = allocator(mask); | 227 | pudp = allocator(mask); |
| 221 | if (!pudp) { | 228 | if (!pudp) { |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | |||
| 17 | #include <linux/sched/task.h> | 17 | #include <linux/sched/task.h> |
| 18 | #include <linux/sched/task_stack.h> | 18 | #include <linux/sched/task_stack.h> |
| 19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
| 20 | #include <linux/lockdep.h> | ||
| 20 | #include <linux/mm.h> | 21 | #include <linux/mm.h> |
| 21 | #include <linux/stddef.h> | 22 | #include <linux/stddef.h> |
| 22 | #include <linux/sysctl.h> | 23 | #include <linux/sysctl.h> |
| @@ -44,6 +45,7 @@ · 21 unmodified lines | |||
| 44 | #include <asm/alternative.h> | 45 | #include <asm/alternative.h> |
| 45 | #include <asm/arch_gicv3.h> | 46 | #include <asm/arch_gicv3.h> |
| 46 | #include <asm/compat.h> | 47 | #include <asm/compat.h> |
| 48 | #include <asm/cpufeature.h> | ||
| 47 | #include <asm/cacheflush.h> | 49 | #include <asm/cacheflush.h> |
| 48 | #include <asm/exec.h> | 50 | #include <asm/exec.h> |
| 49 | #include <asm/fpsimd.h> | 51 | #include <asm/fpsimd.h> |
| @@ -332,22 +334,27 @@ void arch_release_task_struct(struct task_struct *tsk) · 282 unmodified lines | |||
| 332 | fpsimd_release_task(tsk); | 334 | fpsimd_release_task(tsk); |
| 333 | } | 335 | } |
| 334 | 336 | ||
| 335 | /* | ||
| 336 | * src and dst may temporarily have aliased sve_state after task_struct | ||
| 337 | * is copied. We cannot fix this properly here, because src may have | ||
| 338 | * live SVE state and dst's thread_info may not exist yet, so tweaking | ||
| 339 | * either src's or dst's TIF_SVE is not safe. | ||
| 340 | * | ||
| 341 | * The unaliasing is done in copy_thread() instead. This works because | ||
| 342 | * dst is not schedulable or traceable until both of these functions | ||
| 343 | * have been called. | ||
| 344 | */ | ||
| 345 | int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) | 337 | int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src) |
| 346 | { | 338 | { |
| 347 | if (current->mm) | 339 | if (current->mm) |
| 348 | fpsimd_preserve_current_state(); | 340 | fpsimd_preserve_current_state(); |
| 349 | *dst = *src; | 341 | *dst = *src; |
| 350 | 342 | ||
| 343 | /* We rely on the above assignment to initialize dst's thread_flags: */ | ||
| 344 | BUILD_BUG_ON(!IS_ENABLED(CONFIG_THREAD_INFO_IN_TASK)); | ||
| 345 | |||
| 346 | /* | ||
| 347 | * Detach src's sve_state (if any) from dst so that it does not | ||
| 348 | * get erroneously used or freed prematurely. dst's sve_state | ||
| 349 | * will be allocated on demand later on if dst uses SVE. | ||
| 350 | * For consistency, also clear TIF_SVE here: this could be done | ||
| 351 | * later in copy_process(), but to avoid tripping up future | ||
| 352 | * maintainers it is best not to leave TIF_SVE and sve_state in | ||
| 353 | * an inconsistent state, even temporarily. | ||
| 354 | */ | ||
| 355 | dst->thread.sve_state = NULL; | ||
| 356 | clear_tsk_thread_flag(dst, TIF_SVE); | ||
| 357 | |||
| 351 | return 0; | 358 | return 0; |
| 352 | } | 359 | } |
| 353 | 360 | ||
| @@ -360,13 +367,6 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start, · 6 unmodified lines | |||
| 360 | 367 | ||
| 361 | memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context)); | 368 | memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context)); |
| 362 | 369 | ||
| 363 | /* | ||
| 364 | * Unalias p->thread.sve_state (if any) from the parent task | ||
| 365 | * and disable discard SVE state for p: | ||
| 366 | */ | ||
| 367 | clear_tsk_thread_flag(p, TIF_SVE); | ||
| 368 | p->thread.sve_state = NULL; | ||
| 369 | |||
| 370 | /* | 370 | /* |
| 371 | * In case p was allocated the same task_struct pointer as some | 371 | * In case p was allocated the same task_struct pointer as some |
| 372 | * other recently-exited task, make sure p is disassociated from | 372 | * other recently-exited task, make sure p is disassociated from |
| @@ -633,3 +633,19 @@ static int __init tagged_addr_init(void) · 260 unmodified lines | |||
| 633 | 633 | ||
| 634 | core_initcall(tagged_addr_init); | 634 | core_initcall(tagged_addr_init); |
| 635 | #endif /* CONFIG_ARM64_TAGGED_ADDR_ABI */ | 635 | #endif /* CONFIG_ARM64_TAGGED_ADDR_ABI */ |
| 636 | |||
| 637 | asmlinkage void __sched arm64_preempt_schedule_irq(void) | ||
| 638 | { | ||
| 639 | lockdep_assert_irqs_disabled(); | ||
| 640 | |||
| 641 | /* | ||
| 642 | * Preempting a task from an IRQ means we leave copies of PSTATE | ||
| 643 | * on the stack. cpufeature's enable calls may modify PSTATE, but | ||
| 644 | * resuming one of these preempted tasks would undo those changes. | ||
| 645 | * | ||
| 646 | * Only allow a task to be preempted once cpufeatures have been | ||
| 647 | * enabled. | ||
| 648 | */ | ||
| 649 | if (static_branch_likely(&arm64_const_caps_ready)) | ||
| 650 | preempt_schedule_irq(); | ||
| 651 | } | ||
| @@ -8,15 +8,21 @@ · 7 unmodified lines | |||
| 8 | ARCH_REL_TYPE_ABS := R_ARM_JUMP_SLOT|R_ARM_GLOB_DAT|R_ARM_ABS32 | 8 | ARCH_REL_TYPE_ABS := R_ARM_JUMP_SLOT|R_ARM_GLOB_DAT|R_ARM_ABS32 |
| 9 | include $(srctree)/lib/vdso/Makefile | 9 | include $(srctree)/lib/vdso/Makefile |
| 10 | 10 | ||
| 11 | COMPATCC := $(CROSS_COMPILE_COMPAT)gcc | 11 | # Same as cc-*option, but using CC_COMPAT instead of CC |
| 12 | ifeq ($(CONFIG_CC_IS_CLANG), y) | ||
| 13 | CC_COMPAT ?= $(CC) | ||
| 14 | else | ||
| 15 | CC_COMPAT ?= $(CROSS_COMPILE_COMPAT)gcc | ||
| 16 | endif | ||
| 12 | 17 | ||
| 13 | # Same as cc-*option, but using COMPATCC instead of CC | ||
| 14 | cc32-option = $(call try-run,\ | 18 | cc32-option = $(call try-run,\ |
| 15 | $(COMPATCC) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2)) | 19 | $(CC_COMPAT) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2)) |
| 16 | cc32-disable-warning = $(call try-run,\ | 20 | cc32-disable-warning = $(call try-run,\ |
| 17 | $(COMPATCC) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1))) | 21 | $(CC_COMPAT) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1))) |
| 18 | cc32-ldoption = $(call try-run,\ | 22 | cc32-ldoption = $(call try-run,\ |
| 19 | $(COMPATCC) $(1) -nostdlib -x c /dev/null -o "$$TMP",$(1),$(2)) | 23 | $(CC_COMPAT) $(1) -nostdlib -x c /dev/null -o "$$TMP",$(1),$(2)) |
| 24 | cc32-as-instr = $(call try-run,\ | ||
| 25 | printf "%b\n" "$(1)" | $(CC_COMPAT) $(VDSO_AFLAGS) -c -x assembler -o "$$TMP" -,$(2),$(3)) | ||
| 20 | 26 | ||
| 21 | # We cannot use the global flags to compile the vDSO files, the main reason | 27 | # We cannot use the global flags to compile the vDSO files, the main reason |
| 22 | # being that the 32-bit compiler may be older than the main (64-bit) compiler | 28 | # being that the 32-bit compiler may be older than the main (64-bit) compiler |
| @@ -25,22 +31,21 @@ cc32-ldoption = $(call try-run,\ · 2 unmodified lines | |||
| 25 | # arm64 one. | 31 | # arm64 one. |
| 26 | # As a result we set our own flags here. | 32 | # As a result we set our own flags here. |
| 27 | 33 | ||
| 28 | # From top-level Makefile | 34 | # KBUILD_CPPFLAGS and NOSTDINC_FLAGS from top-level Makefile |
| 29 | # NOSTDINC_FLAGS | 35 | VDSO_CPPFLAGS := -D__KERNEL__ -nostdinc -isystem $(shell $(CC_COMPAT) -print-file-name=include) |
| 30 | VDSO_CPPFLAGS := -nostdinc -isystem $(shell $(COMPATCC) -print-file-name=include) | ||
| 31 | VDSO_CPPFLAGS += $(LINUXINCLUDE) | 36 | VDSO_CPPFLAGS += $(LINUXINCLUDE) |
| 32 | VDSO_CPPFLAGS += $(KBUILD_CPPFLAGS) | ||
| 33 | 37 | ||
| 34 | # Common C and assembly flags | 38 | # Common C and assembly flags |
| 35 | # From top-level Makefile | 39 | # From top-level Makefile |
| 36 | VDSO_CAFLAGS := $(VDSO_CPPFLAGS) | 40 | VDSO_CAFLAGS := $(VDSO_CPPFLAGS) |
| 41 | ifneq ($(shell $(CC_COMPAT) --version 2>&1 | head -n 1 | grep clang),) | ||
| 42 | VDSO_CAFLAGS += --target=$(notdir $(CROSS_COMPILE_COMPAT:%-=%)) | ||
| 43 | endif | ||
| 44 | |||
| 37 | VDSO_CAFLAGS += $(call cc32-option,-fno-PIE) | 45 | VDSO_CAFLAGS += $(call cc32-option,-fno-PIE) |
| 38 | ifdef CONFIG_DEBUG_INFO | 46 | ifdef CONFIG_DEBUG_INFO |
| 39 | VDSO_CAFLAGS += -g | 47 | VDSO_CAFLAGS += -g |
| 40 | endif | 48 | endif |
| 41 | ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(COMPATCC)), y) | ||
| 42 | VDSO_CAFLAGS += -DCC_HAVE_ASM_GOTO | ||
| 43 | endif | ||
| 44 | 49 | ||
| 45 | # From arm Makefile | 50 | # From arm Makefile |
| 46 | VDSO_CAFLAGS += $(call cc32-option,-fno-dwarf2-cfi-asm) | 51 | VDSO_CAFLAGS += $(call cc32-option,-fno-dwarf2-cfi-asm) |
| @@ -55,6 +60,7 @@ endif · 8 unmodified lines | |||
| 55 | VDSO_CAFLAGS += -fPIC -fno-builtin -fno-stack-protector | 60 | VDSO_CAFLAGS += -fPIC -fno-builtin -fno-stack-protector |
| 56 | VDSO_CAFLAGS += -DDISABLE_BRANCH_PROFILING | 61 | VDSO_CAFLAGS += -DDISABLE_BRANCH_PROFILING |
| 57 | 62 | ||
| 63 | |||
| 58 | # Try to compile for ARMv8. If the compiler is too old and doesn't support it, | 64 | # Try to compile for ARMv8. If the compiler is too old and doesn't support it, |
| 59 | # fall back to v7. There is no easy way to check for what architecture the code | 65 | # fall back to v7. There is no easy way to check for what architecture the code |
| 60 | # is being compiled, so define a macro specifying that (see arch/arm/Makefile). | 66 | # is being compiled, so define a macro specifying that (see arch/arm/Makefile). |
| @@ -91,6 +97,12 @@ VDSO_CFLAGS += -Wno-int-to-pointer-cast · 30 unmodified lines | |||
| 91 | VDSO_AFLAGS := $(VDSO_CAFLAGS) | 97 | VDSO_AFLAGS := $(VDSO_CAFLAGS) |
| 92 | VDSO_AFLAGS += -D__ASSEMBLY__ | 98 | VDSO_AFLAGS += -D__ASSEMBLY__ |
| 93 | 99 | ||
| 100 | # Check for binutils support for dmb ishld | ||
| 101 | dmbinstr := $(call cc32-as-instr,dmb ishld,-DCONFIG_AS_DMB_ISHLD=1) | ||
| 102 | |||
| 103 | VDSO_CFLAGS += $(dmbinstr) | ||
| 104 | VDSO_AFLAGS += $(dmbinstr) | ||
| 105 | |||
| 94 | VDSO_LDFLAGS := $(VDSO_CPPFLAGS) | 106 | VDSO_LDFLAGS := $(VDSO_CPPFLAGS) |
| 95 | # From arm vDSO Makefile | 107 | # From arm vDSO Makefile |
| 96 | VDSO_LDFLAGS += -Wl,-Bsymbolic -Wl,--no-undefined -Wl,-soname=linux-vdso.so.1 | 108 | VDSO_LDFLAGS += -Wl,-Bsymbolic -Wl,--no-undefined -Wl,-soname=linux-vdso.so.1 |
| @@ -159,14 +171,14 @@ quiet_cmd_vdsold_and_vdso_check = LD32 $@ · 62 unmodified lines | |||
| 159 | cmd_vdsold_and_vdso_check = $(cmd_vdsold); $(cmd_vdso_check) | 171 | cmd_vdsold_and_vdso_check = $(cmd_vdsold); $(cmd_vdso_check) |
| 160 | 172 | ||
| 161 | quiet_cmd_vdsold = LD32 $@ | 173 | quiet_cmd_vdsold = LD32 $@ |
| 162 | cmd_vdsold = $(COMPATCC) -Wp,-MD,$(depfile) $(VDSO_LDFLAGS) \ | 174 | cmd_vdsold = $(CC_COMPAT) -Wp,-MD,$(depfile) $(VDSO_LDFLAGS) \ |
| 163 | -Wl,-T $(filter %.lds,$^) $(filter %.o,$^) -o $@ | 175 | -Wl,-T $(filter %.lds,$^) $(filter %.o,$^) -o $@ |
| 164 | quiet_cmd_vdsocc = CC32 $@ | 176 | quiet_cmd_vdsocc = CC32 $@ |
| 165 | cmd_vdsocc = $(COMPATCC) -Wp,-MD,$(depfile) $(VDSO_CFLAGS) -c -o $@ $< | 177 | cmd_vdsocc = $(CC_COMPAT) -Wp,-MD,$(depfile) $(VDSO_CFLAGS) -c -o $@ $< |
| 166 | quiet_cmd_vdsocc_gettimeofday = CC32 $@ | 178 | quiet_cmd_vdsocc_gettimeofday = CC32 $@ |
| 167 | cmd_vdsocc_gettimeofday = $(COMPATCC) -Wp,-MD,$(depfile) $(VDSO_CFLAGS) $(VDSO_CFLAGS_gettimeofday_o) -c -o $@ $< | 179 | cmd_vdsocc_gettimeofday = $(CC_COMPAT) -Wp,-MD,$(depfile) $(VDSO_CFLAGS) $(VDSO_CFLAGS_gettimeofday_o) -c -o $@ $< |
| 168 | quiet_cmd_vdsoas = AS32 $@ | 180 | quiet_cmd_vdsoas = AS32 $@ |
| 169 | cmd_vdsoas = $(COMPATCC) -Wp,-MD,$(depfile) $(VDSO_AFLAGS) -c -o $@ $< | 181 | cmd_vdsoas = $(CC_COMPAT) -Wp,-MD,$(depfile) $(VDSO_AFLAGS) -c -o $@ $< |
| 170 | 182 | ||
| 171 | quiet_cmd_vdsomunge = MUNGE $@ | 183 | quiet_cmd_vdsomunge = MUNGE $@ |
| 172 | cmd_vdsomunge = $(obj)/$(munge) $< $@ | 184 | cmd_vdsomunge = $(obj)/$(munge) $< $@ |
| @@ -124,6 +124,9 @@ static void __hyp_text __activate_traps(struct kvm_vcpu *vcpu) · 123 unmodified lines | |||
| 124 | { | 124 | { |
| 125 | u64 hcr = vcpu->arch.hcr_el2; | 125 | u64 hcr = vcpu->arch.hcr_el2; |
| 126 | 126 | ||
| 127 | if (cpus_have_const_cap(ARM64_WORKAROUND_CAVIUM_TX2_219_TVM)) | ||
| 128 | hcr |= HCR_TVM; | ||
| 129 | |||
| 127 | write_sysreg(hcr, hcr_el2); | 130 | write_sysreg(hcr, hcr_el2); |
| 128 | 131 | ||
| 129 | if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE)) | 132 | if (cpus_have_const_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE)) |
| @@ -174,8 +177,10 @@ static void __hyp_text __deactivate_traps(struct kvm_vcpu *vcpu) · 44 unmodified lines | |||
| 174 | * the crucial bit is "On taking a vSError interrupt, | 177 | * the crucial bit is "On taking a vSError interrupt, |
| 175 | * HCR_EL2.VSE is cleared to 0." | 178 | * HCR_EL2.VSE is cleared to 0." |
| 176 | */ | 179 | */ |
| 177 | if (vcpu->arch.hcr_el2 & HCR_VSE) | 180 | if (vcpu->arch.hcr_el2 & HCR_VSE) { |
| 178 | vcpu->arch.hcr_el2 = read_sysreg(hcr_el2); | 181 | vcpu->arch.hcr_el2 &= ~HCR_VSE; |
| 182 | vcpu->arch.hcr_el2 |= read_sysreg(hcr_el2) & HCR_VSE; | ||
| 183 | } | ||
| 179 | 184 | ||
| 180 | if (has_vhe()) | 185 | if (has_vhe()) |
| 181 | deactivate_traps_vhe(); | 186 | deactivate_traps_vhe(); |
| @@ -229,20 +234,6 @@ static void __hyp_text __hyp_vgic_restore_state(struct kvm_vcpu *vcpu) · 47 unmodified lines | |||
| 229 | } | 234 | } |
| 230 | } | 235 | } |
| 231 | 236 | ||
| 232 | static bool __hyp_text __true_value(void) | ||
| 233 | { | ||
| 234 | return true; | ||
| 235 | } | ||
| 236 | |||
| 237 | static bool __hyp_text __false_value(void) | ||
| 238 | { | ||
| 239 | return false; | ||
| 240 | } | ||
| 241 | |||
| 242 | static hyp_alternate_select(__check_arm_834220, | ||
| 243 | __false_value, __true_value, | ||
| 244 | ARM64_WORKAROUND_834220); | ||
| 245 | |||
| 246 | static bool __hyp_text __translate_far_to_hpfar(u64 far, u64 *hpfar) | 237 | static bool __hyp_text __translate_far_to_hpfar(u64 far, u64 *hpfar) |
| 247 | { | 238 | { |
| 248 | u64 par, tmp; | 239 | u64 par, tmp; |
| @@ -298,7 +289,8 @@ static bool __hyp_text __populate_fault_info(struct kvm_vcpu *vcpu) · 49 unmodified lines | |||
| 298 | * resolve the IPA using the AT instruction. | 289 | * resolve the IPA using the AT instruction. |
| 299 | */ | 290 | */ |
| 300 | if (!(esr & ESR_ELx_S1PTW) && | 291 | if (!(esr & ESR_ELx_S1PTW) && |
| 301 | (__check_arm_834220()() || (esr & ESR_ELx_FSC_TYPE) == FSC_PERM)) { | 292 | (cpus_have_const_cap(ARM64_WORKAROUND_834220) || |
| 293 | (esr & ESR_ELx_FSC_TYPE) == FSC_PERM)) { | ||
| 302 | if (!__translate_far_to_hpfar(far, &hpfar)) | 294 | if (!__translate_far_to_hpfar(far, &hpfar)) |
| 303 | return false; | 295 | return false; |
| 304 | } else { | 296 | } else { |
| @@ -393,6 +385,61 @@ static bool __hyp_text __hyp_handle_fpsimd(struct kvm_vcpu *vcpu) · 88 unmodified lines | |||
| 393 | return true; | 385 | return true; |
| 394 | } | 386 | } |
| 395 | 387 | ||
| 388 | static bool __hyp_text handle_tx2_tvm(struct kvm_vcpu *vcpu) | ||
| 389 | { | ||
| 390 | u32 sysreg = esr_sys64_to_sysreg(kvm_vcpu_get_hsr(vcpu)); | ||
| 391 | int rt = kvm_vcpu_sys_get_rt(vcpu); | ||
| 392 | u64 val = vcpu_get_reg(vcpu, rt); | ||
| 393 | |||
| 394 | /* | ||
| 395 | * The normal sysreg handling code expects to see the traps, | ||
| 396 | * let's not do anything here. | ||
| 397 | */ | ||
| 398 | if (vcpu->arch.hcr_el2 & HCR_TVM) | ||
| 399 | return false; | ||
| 400 | |||
| 401 | switch (sysreg) { | ||
| 402 | case SYS_SCTLR_EL1: | ||
| 403 | write_sysreg_el1(val, SYS_SCTLR); | ||
| 404 | break; | ||
| 405 | case SYS_TTBR0_EL1: | ||
| 406 | write_sysreg_el1(val, SYS_TTBR0); | ||
| 407 | break; | ||
| 408 | case SYS_TTBR1_EL1: | ||
| 409 | write_sysreg_el1(val, SYS_TTBR1); | ||
| 410 | break; | ||
| 411 | case SYS_TCR_EL1: | ||
| 412 | write_sysreg_el1(val, SYS_TCR); | ||
| 413 | break; | ||
| 414 | case SYS_ESR_EL1: | ||
| 415 | write_sysreg_el1(val, SYS_ESR); | ||
| 416 | break; | ||
| 417 | case SYS_FAR_EL1: | ||
| 418 | write_sysreg_el1(val, SYS_FAR); | ||
| 419 | break; | ||
| 420 | case SYS_AFSR0_EL1: | ||
| 421 | write_sysreg_el1(val, SYS_AFSR0); | ||
| 422 | break; | ||
| 423 | case SYS_AFSR1_EL1: | ||
| 424 | write_sysreg_el1(val, SYS_AFSR1); | ||
| 425 | break; | ||
| 426 | case SYS_MAIR_EL1: | ||
| 427 | write_sysreg_el1(val, SYS_MAIR); | ||
| 428 | break; | ||
| 429 | case SYS_AMAIR_EL1: | ||
| 430 | write_sysreg_el1(val, SYS_AMAIR); | ||
| 431 | break; | ||
| 432 | case SYS_CONTEXTIDR_EL1: | ||
| 433 | write_sysreg_el1(val, SYS_CONTEXTIDR); | ||
| 434 | break; | ||
| 435 | default: | ||
| 436 | return false; | ||
| 437 | } | ||
| 438 | |||
| 439 | __kvm_skip_instr(vcpu); | ||
| 440 | return true; | ||
| 441 | } | ||
| 442 | |||
| 396 | /* | 443 | /* |
| 397 | * Return true when we were able to fixup the guest exit and should return to | 444 | * Return true when we were able to fixup the guest exit and should return to |
| 398 | * the guest, false when we should restore the host state and return to the | 445 | * the guest, false when we should restore the host state and return to the |
| @@ -412,6 +459,11 @@ static bool __hyp_text fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code) · 13 unmodified lines | |||
| 412 | if (*exit_code != ARM_EXCEPTION_TRAP) | 459 | if (*exit_code != ARM_EXCEPTION_TRAP) |
| 413 | goto exit; | 460 | goto exit; |
| 414 | 461 | ||
| 462 | if (cpus_have_const_cap(ARM64_WORKAROUND_CAVIUM_TX2_219_TVM) && | ||
| 463 | kvm_vcpu_trap_get_class(vcpu) == ESR_ELx_EC_SYS64 && | ||
| 464 | handle_tx2_tvm(vcpu)) | ||
| 465 | return true; | ||
| 466 | |||
| 415 | /* | 467 | /* |
| 416 | * We trap the first access to the FP/SIMD to save the host context | 468 | * We trap the first access to the FP/SIMD to save the host context |
| 417 | * and restore the guest context lazily. | 469 | * and restore the guest context lazily. |
| @@ -67,10 +67,14 @@ static void __hyp_text __tlb_switch_to_guest_nvhe(struct kvm *kvm, · 66 unmodified lines | |||
| 67 | isb(); | 67 | isb(); |
| 68 | } | 68 | } |
| 69 | 69 | ||
| 70 | static hyp_alternate_select(__tlb_switch_to_guest, | 70 | static void __hyp_text __tlb_switch_to_guest(struct kvm *kvm, |
| 71 | __tlb_switch_to_guest_nvhe, | 71 | struct tlb_inv_context *cxt) |
| 72 | __tlb_switch_to_guest_vhe, | 72 | { |
| 73 | ARM64_HAS_VIRT_HOST_EXTN); | 73 | if (has_vhe()) |
| 74 | __tlb_switch_to_guest_vhe(kvm, cxt); | ||
| 75 | else | ||
| 76 | __tlb_switch_to_guest_nvhe(kvm, cxt); | ||
| 77 | } | ||
| 74 | 78 | ||
| 75 | static void __hyp_text __tlb_switch_to_host_vhe(struct kvm *kvm, | 79 | static void __hyp_text __tlb_switch_to_host_vhe(struct kvm *kvm, |
| 76 | struct tlb_inv_context *cxt) | 80 | struct tlb_inv_context *cxt) |
| @@ -98,10 +102,14 @@ static void __hyp_text __tlb_switch_to_host_nvhe(struct kvm *kvm, · 21 unmodified lines | |||
| 98 | write_sysreg(0, vttbr_el2); | 102 | write_sysreg(0, vttbr_el2); |
| 99 | } | 103 | } |
| 100 | 104 | ||
| 101 | static hyp_alternate_select(__tlb_switch_to_host, | 105 | static void __hyp_text __tlb_switch_to_host(struct kvm *kvm, |
| 102 | __tlb_switch_to_host_nvhe, | 106 | struct tlb_inv_context *cxt) |
| 103 | __tlb_switch_to_host_vhe, | 107 | { |
| 104 | ARM64_HAS_VIRT_HOST_EXTN); | 108 | if (has_vhe()) |
| 109 | __tlb_switch_to_host_vhe(kvm, cxt); | ||
| 110 | else | ||
| 111 | __tlb_switch_to_host_nvhe(kvm, cxt); | ||
| 112 | } | ||
| 105 | 113 | ||
| 106 | void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) | 114 | void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) |
| 107 | { | 115 | { |
| @@ -111,7 +119,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) · 3 unmodified lines | |||
| 111 | 119 | ||
| 112 | /* Switch to requested VMID */ | 120 | /* Switch to requested VMID */ |
| 113 | kvm = kern_hyp_va(kvm); | 121 | kvm = kern_hyp_va(kvm); |
| 114 | __tlb_switch_to_guest()(kvm, &cxt); | 122 | __tlb_switch_to_guest(kvm, &cxt); |
| 115 | 123 | ||
| 116 | /* | 124 | /* |
| 117 | * We could do so much better if we had the VA as well. | 125 | * We could do so much better if we had the VA as well. |
| @@ -154,7 +162,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) · 36 unmodified lines | |||
| 154 | if (!has_vhe() && icache_is_vpipt()) | 162 | if (!has_vhe() && icache_is_vpipt()) |
| 155 | __flush_icache_all(); | 163 | __flush_icache_all(); |
| 156 | 164 | ||
| 157 | __tlb_switch_to_host()(kvm, &cxt); | 165 | __tlb_switch_to_host(kvm, &cxt); |
| 158 | } | 166 | } |
| 159 | 167 | ||
| 160 | void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm) | 168 | void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm) |
| @@ -165,13 +173,13 @@ void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm) · 4 unmodified lines | |||
| 165 | 173 | ||
| 166 | /* Switch to requested VMID */ | 174 | /* Switch to requested VMID */ |
| 167 | kvm = kern_hyp_va(kvm); | 175 | kvm = kern_hyp_va(kvm); |
| 168 | __tlb_switch_to_guest()(kvm, &cxt); | 176 | __tlb_switch_to_guest(kvm, &cxt); |
| 169 | 177 | ||
| 170 | __tlbi(vmalls12e1is); | 178 | __tlbi(vmalls12e1is); |
| 171 | dsb(ish); | 179 | dsb(ish); |
| 172 | isb(); | 180 | isb(); |
| 173 | 181 | ||
| 174 | __tlb_switch_to_host()(kvm, &cxt); | 182 | __tlb_switch_to_host(kvm, &cxt); |
| 175 | } | 183 | } |
| 176 | 184 | ||
| 177 | void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) | 185 | void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) |
| @@ -180,13 +188,13 @@ void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu) · 2 unmodified lines | |||
| 180 | struct tlb_inv_context cxt; | 188 | struct tlb_inv_context cxt; |
| 181 | 189 | ||
| 182 | /* Switch to requested VMID */ | 190 | /* Switch to requested VMID */ |
| 183 | __tlb_switch_to_guest()(kvm, &cxt); | 191 | __tlb_switch_to_guest(kvm, &cxt); |
| 184 | 192 | ||
| 185 | __tlbi(vmalle1); | 193 | __tlbi(vmalle1); |
| 186 | dsb(nsh); | 194 | dsb(nsh); |
| 187 | isb(); | 195 | isb(); |
| 188 | 196 | ||
| 189 | __tlb_switch_to_host()(kvm, &cxt); | 197 | __tlb_switch_to_host(kvm, &cxt); |
| 190 | } | 198 | } |
| 191 | 199 | ||
| 192 | void __hyp_text __kvm_flush_vm_context(void) | 200 | void __hyp_text __kvm_flush_vm_context(void) |
| @@ -113,6 +113,15 @@ static inline bool is_ttbr1_addr(unsigned long addr) · 112 unmodified lines | |||
| 113 | return arch_kasan_reset_tag(addr) >= PAGE_OFFSET; | 113 | return arch_kasan_reset_tag(addr) >= PAGE_OFFSET; |
| 114 | } | 114 | } |
| 115 | 115 | ||
| 116 | static inline unsigned long mm_to_pgd_phys(struct mm_struct *mm) | ||
| 117 | { | ||
| 118 | /* Either init_pg_dir or swapper_pg_dir */ | ||
| 119 | if (mm == &init_mm) | ||
| 120 | return __pa_symbol(mm->pgd); | ||
| 121 | |||
| 122 | return (unsigned long)virt_to_phys(mm->pgd); | ||
| 123 | } | ||
| 124 | |||
| 116 | /* | 125 | /* |
| 117 | * Dump out the page tables associated with 'addr' in the currently active mm. | 126 | * Dump out the page tables associated with 'addr' in the currently active mm. |
| 118 | */ | 127 | */ |
| @@ -141,7 +150,7 @@ static void show_pte(unsigned long addr) · 22 unmodified lines | |||
| 141 | 150 | ||
| 142 | pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n", | 151 | pr_alert("%s pgtable: %luk pages, %llu-bit VAs, pgdp=%016lx\n", |
| 143 | mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K, | 152 | mm == &init_mm ? "swapper" : "user", PAGE_SIZE / SZ_1K, |
| 144 | vabits_actual, (unsigned long)virt_to_phys(mm->pgd)); | 153 | vabits_actual, mm_to_pgd_phys(mm)); |
| 145 | pgdp = pgd_offset(mm, addr); | 154 | pgdp = pgd_offset(mm, addr); |
| 146 | pgd = READ_ONCE(*pgdp); | 155 | pgd = READ_ONCE(*pgdp); |
| 147 | pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd)); | 156 | pr_alert("[%016lx] pgd=%016llx", addr, pgd_val(pgd)); |
| @@ -259,14 +268,18 @@ static bool __kprobes is_spurious_el1_translation_fault(unsigned long addr, · 111 unmodified lines | |||
| 259 | par = read_sysreg(par_el1); | 268 | par = read_sysreg(par_el1); |
| 260 | local_irq_restore(flags); | 269 | local_irq_restore(flags); |
| 261 | 270 | ||
| 271 | /* | ||
| 272 | * If we now have a valid translation, treat the translation fault as | ||
| 273 | * spurious. | ||
| 274 | */ | ||
| 262 | if (!(par & SYS_PAR_EL1_F)) | 275 | if (!(par & SYS_PAR_EL1_F)) |
| 263 | return false; | 276 | return true; |
| 264 | 277 | ||
| 265 | /* | 278 | /* |
| 266 | * If we got a different type of fault from the AT instruction, | 279 | * If we got a different type of fault from the AT instruction, |
| 267 | * treat the translation fault as spurious. | 280 | * treat the translation fault as spurious. |
| 268 | */ | 281 | */ |
| 269 | dfsc = FIELD_PREP(SYS_PAR_EL1_FST, par); | 282 | dfsc = FIELD_GET(SYS_PAR_EL1_FST, par); |
| 270 | return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT; | 283 | return (dfsc & ESR_ELx_FSC_TYPE) != ESR_ELx_FSC_FAULT; |
| 271 | } | 284 | } |
| 272 | 285 | ||
| @@ -1,4 +1,3 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0-only | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | xen-arm-y += $(addprefix ../../arm/xen/, enlighten.o grant-table.o p2m.o mm.o) | 2 | xen-arm-y += $(addprefix ../../arm/xen/, enlighten.o grant-table.o p2m.o mm.o) |
| 3 | obj-y := xen-arm.o hypercall.o | 3 | obj-y := xen-arm.o hypercall.o |
| 4 | obj-$(CONFIG_XEN_EFI) += $(addprefix ../../arm/xen/, efi.o) | ||
| @@ -99,7 +99,7 @@ · 98 unmodified lines | |||
| 99 | 99 | ||
| 100 | miscintc: interrupt-controller@18060010 { | 100 | miscintc: interrupt-controller@18060010 { |
| 101 | compatible = "qca,ar7240-misc-intc"; | 101 | compatible = "qca,ar7240-misc-intc"; |
| 102 | reg = <0x18060010 0x4>; | 102 | reg = <0x18060010 0x8>; |
| 103 | 103 | ||
| 104 | interrupt-parent = <&cpuintc>; | 104 | interrupt-parent = <&cpuintc>; |
| 105 | interrupts = <6>; | 105 | interrupts = <6>; |
| @@ -571,7 +571,6 @@ CONFIG_USB_SERIAL_OMNINET=m · 570 unmodified lines | |||
| 571 | CONFIG_USB_EMI62=m | 571 | CONFIG_USB_EMI62=m |
| 572 | CONFIG_USB_EMI26=m | 572 | CONFIG_USB_EMI26=m |
| 573 | CONFIG_USB_ADUTUX=m | 573 | CONFIG_USB_ADUTUX=m |
| 574 | CONFIG_USB_RIO500=m | ||
| 575 | CONFIG_USB_LEGOTOWER=m | 574 | CONFIG_USB_LEGOTOWER=m |
| 576 | CONFIG_USB_LCD=m | 575 | CONFIG_USB_LCD=m |
| 577 | CONFIG_USB_CYPRESS_CY7C63=m | 576 | CONFIG_USB_CYPRESS_CY7C63=m |
| @@ -314,7 +314,6 @@ CONFIG_USB_SERIAL_SAFE_PADDED=y · 313 unmodified lines | |||
| 314 | CONFIG_USB_SERIAL_CYBERJACK=m | 314 | CONFIG_USB_SERIAL_CYBERJACK=m |
| 315 | CONFIG_USB_SERIAL_XIRCOM=m | 315 | CONFIG_USB_SERIAL_XIRCOM=m |
| 316 | CONFIG_USB_SERIAL_OMNINET=m | 316 | CONFIG_USB_SERIAL_OMNINET=m |
| 317 | CONFIG_USB_RIO500=m | ||
| 318 | CONFIG_USB_LEGOTOWER=m | 317 | CONFIG_USB_LEGOTOWER=m |
| 319 | CONFIG_USB_LCD=m | 318 | CONFIG_USB_LCD=m |
| 320 | CONFIG_USB_CYTHERM=m | 319 | CONFIG_USB_CYTHERM=m |
| @@ -160,7 +160,6 @@ void __init prom_meminit(void) · 159 unmodified lines | |||
| 160 | 160 | ||
| 161 | void __init prom_free_prom_memory(void) | 161 | void __init prom_free_prom_memory(void) |
| 162 | { | 162 | { |
| 163 | unsigned long addr; | ||
| 164 | int i; | 163 | int i; |
| 165 | 164 | ||
| 166 | if (prom_flags & PROM_FLAG_DONT_FREE_TEMP) | 165 | if (prom_flags & PROM_FLAG_DONT_FREE_TEMP) |
| @@ -43,7 +43,7 @@ · 42 unmodified lines | |||
| 43 | 43 | ||
| 44 | /* O32 stack has to be 8-byte aligned. */ | 44 | /* O32 stack has to be 8-byte aligned. */ |
| 45 | static u64 o32_stk[4096]; | 45 | static u64 o32_stk[4096]; |
| 46 | #define O32_STK &o32_stk[sizeof(o32_stk)] | 46 | #define O32_STK (&o32_stk[ARRAY_SIZE(o32_stk)]) |
| 47 | 47 | ||
| 48 | #define __PROM_O32(fun, arg) fun arg __asm__(#fun); \ | 48 | #define __PROM_O32(fun, arg) fun arg __asm__(#fun); \ |
| 49 | __asm__(#fun " = call_o32") | 49 | __asm__(#fun " = call_o32") |
| @@ -77,8 +77,8 @@ extern unsigned long __xchg_called_with_bad_pointer(void) · 76 unmodified lines | |||
| 77 | extern unsigned long __xchg_small(volatile void *ptr, unsigned long val, | 77 | extern unsigned long __xchg_small(volatile void *ptr, unsigned long val, |
| 78 | unsigned int size); | 78 | unsigned int size); |
| 79 | 79 | ||
| 80 | static inline unsigned long __xchg(volatile void *ptr, unsigned long x, | 80 | static __always_inline |
| 81 | int size) | 81 | unsigned long __xchg(volatile void *ptr, unsigned long x, int size) |
| 82 | { | 82 | { |
| 83 | switch (size) { | 83 | switch (size) { |
| 84 | case 1: | 84 | case 1: |
| @@ -153,8 +153,9 @@ static inline unsigned long __xchg(volatile void *ptr, unsigned long x, · 68 unmodified lines | |||
| 153 | extern unsigned long __cmpxchg_small(volatile void *ptr, unsigned long old, | 153 | extern unsigned long __cmpxchg_small(volatile void *ptr, unsigned long old, |
| 154 | unsigned long new, unsigned int size); | 154 | unsigned long new, unsigned int size); |
| 155 | 155 | ||
| 156 | static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, | 156 | static __always_inline |
| 157 | unsigned long new, unsigned int size) | 157 | unsigned long __cmpxchg(volatile void *ptr, unsigned long old, |
| 158 | unsigned long new, unsigned int size) | ||
| 158 | { | 159 | { |
| 159 | switch (size) { | 160 | switch (size) { |
| 160 | case 1: | 161 | case 1: |
| @@ -36,6 +36,7 @@ · 35 unmodified lines | |||
| 36 | #include <asm/octeon/octeon-feature.h> | 36 | #include <asm/octeon/octeon-feature.h> |
| 37 | 37 | ||
| 38 | #include <asm/octeon/cvmx-ipd-defs.h> | 38 | #include <asm/octeon/cvmx-ipd-defs.h> |
| 39 | #include <asm/octeon/cvmx-pip-defs.h> | ||
| 39 | 40 | ||
| 40 | enum cvmx_ipd_mode { | 41 | enum cvmx_ipd_mode { |
| 41 | CVMX_IPD_OPC_MODE_STT = 0LL, /* All blocks DRAM, not cached in L2 */ | 42 | CVMX_IPD_OPC_MODE_STT = 0LL, /* All blocks DRAM, not cached in L2 */ |
| @@ -52,6 +52,7 @@ · 51 unmodified lines | |||
| 52 | # endif | 52 | # endif |
| 53 | #define __ARCH_WANT_SYS_FORK | 53 | #define __ARCH_WANT_SYS_FORK |
| 54 | #define __ARCH_WANT_SYS_CLONE | 54 | #define __ARCH_WANT_SYS_CLONE |
| 55 | #define __ARCH_WANT_SYS_CLONE3 | ||
| 55 | 56 | ||
| 56 | /* whitelists for checksyscalls */ | 57 | /* whitelists for checksyscalls */ |
| 57 | #define __IGNORE_fadvise64_64 | 58 | #define __IGNORE_fadvise64_64 |
| @@ -6,5 +6,16 @@ · 5 unmodified lines | |||
| 6 | #define HWCAP_MIPS_R6 (1 << 0) | 6 | #define HWCAP_MIPS_R6 (1 << 0) |
| 7 | #define HWCAP_MIPS_MSA (1 << 1) | 7 | #define HWCAP_MIPS_MSA (1 << 1) |
| 8 | #define HWCAP_MIPS_CRC32 (1 << 2) | 8 | #define HWCAP_MIPS_CRC32 (1 << 2) |
| 9 | #define HWCAP_MIPS_MIPS16 (1 << 3) | ||
| 10 | #define HWCAP_MIPS_MDMX (1 << 4) | ||
| 11 | #define HWCAP_MIPS_MIPS3D (1 << 5) | ||
| 12 | #define HWCAP_MIPS_SMARTMIPS (1 << 6) | ||
| 13 | #define HWCAP_MIPS_DSP (1 << 7) | ||
| 14 | #define HWCAP_MIPS_DSP2 (1 << 8) | ||
| 15 | #define HWCAP_MIPS_DSP3 (1 << 9) | ||
| 16 | #define HWCAP_MIPS_MIPS16E2 (1 << 10) | ||
| 17 | #define HWCAP_LOONGSON_MMI (1 << 11) | ||
| 18 | #define HWCAP_LOONGSON_EXT (1 << 12) | ||
| 19 | #define HWCAP_LOONGSON_EXT2 (1 << 13) | ||
| 9 | 20 | ||
| 10 | #endif /* _UAPI_ASM_HWCAP_H */ | 21 | #endif /* _UAPI_ASM_HWCAP_H */ |
| @@ -24,7 +24,8 @@ static char r4kwar[] __initdata = · 23 unmodified lines | |||
| 24 | static char daddiwar[] __initdata = | 24 | static char daddiwar[] __initdata = |
| 25 | "Enable CPU_DADDI_WORKAROUNDS to rectify."; | 25 | "Enable CPU_DADDI_WORKAROUNDS to rectify."; |
| 26 | 26 | ||
| 27 | static inline void align_mod(const int align, const int mod) | 27 | static __always_inline __init |
| 28 | void align_mod(const int align, const int mod) | ||
| 28 | { | 29 | { |
| 29 | asm volatile( | 30 | asm volatile( |
| 30 | ".set push\n\t" | 31 | ".set push\n\t" |
| @@ -38,8 +39,9 @@ static inline void align_mod(const int align, const int mod) · 7 unmodified lines | |||
| 38 | : "n"(align), "n"(mod)); | 39 | : "n"(align), "n"(mod)); |
| 39 | } | 40 | } |
| 40 | 41 | ||
| 41 | static __always_inline void mult_sh_align_mod(long *v1, long *v2, long *w, | 42 | static __always_inline __init |
| 42 | const int align, const int mod) | 43 | void mult_sh_align_mod(long *v1, long *v2, long *w, |
| 44 | const int align, const int mod) | ||
| 43 | { | 45 | { |
| 44 | unsigned long flags; | 46 | unsigned long flags; |
| 45 | int m1, m2; | 47 | int m1, m2; |
| @@ -113,7 +115,7 @@ static __always_inline void mult_sh_align_mod(long *v1, long *v2, long *w, · 67 unmodified lines | |||
| 113 | *w = lw; | 115 | *w = lw; |
| 114 | } | 116 | } |
| 115 | 117 | ||
| 116 | static inline void check_mult_sh(void) | 118 | static __always_inline __init void check_mult_sh(void) |
| 117 | { | 119 | { |
| 118 | long v1[8], v2[8], w[8]; | 120 | long v1[8], v2[8], w[8]; |
| 119 | int bug, fix, i; | 121 | int bug, fix, i; |
| @@ -176,7 +178,7 @@ asmlinkage void __init do_daddi_ov(struct pt_regs *regs) · 56 unmodified lines | |||
| 176 | exception_exit(prev_state); | 178 | exception_exit(prev_state); |
| 177 | } | 179 | } |
| 178 | 180 | ||
| 179 | static inline void check_daddi(void) | 181 | static __init void check_daddi(void) |
| 180 | { | 182 | { |
| 181 | extern asmlinkage void handle_daddi_ov(void); | 183 | extern asmlinkage void handle_daddi_ov(void); |
| 182 | unsigned long flags; | 184 | unsigned long flags; |
| @@ -242,7 +244,7 @@ static inline void check_daddi(void) · 59 unmodified lines | |||
| 242 | 244 | ||
| 243 | int daddiu_bug = IS_ENABLED(CONFIG_CPU_MIPSR6) ? 0 : -1; | 245 | int daddiu_bug = IS_ENABLED(CONFIG_CPU_MIPSR6) ? 0 : -1; |
| 244 | 246 | ||
| 245 | static inline void check_daddiu(void) | 247 | static __init void check_daddiu(void) |
| 246 | { | 248 | { |
| 247 | long v, w, tmp; | 249 | long v, w, tmp; |
| 248 | 250 | ||
| @@ -2180,6 +2180,39 @@ void cpu_probe(void) · 2179 unmodified lines | |||
| 2180 | elf_hwcap |= HWCAP_MIPS_MSA; | 2180 | elf_hwcap |= HWCAP_MIPS_MSA; |
| 2181 | } | 2181 | } |
| 2182 | 2182 | ||
| 2183 | if (cpu_has_mips16) | ||
| 2184 | elf_hwcap |= HWCAP_MIPS_MIPS16; | ||
| 2185 | |||
| 2186 | if (cpu_has_mdmx) | ||
| 2187 | elf_hwcap |= HWCAP_MIPS_MDMX; | ||
| 2188 | |||
| 2189 | if (cpu_has_mips3d) | ||
| 2190 | elf_hwcap |= HWCAP_MIPS_MIPS3D; | ||
| 2191 | |||
| 2192 | if (cpu_has_smartmips) | ||
| 2193 | elf_hwcap |= HWCAP_MIPS_SMARTMIPS; | ||
| 2194 | |||
| 2195 | if (cpu_has_dsp) | ||
| 2196 | elf_hwcap |= HWCAP_MIPS_DSP; | ||
| 2197 | |||
| 2198 | if (cpu_has_dsp2) | ||
| 2199 | elf_hwcap |= HWCAP_MIPS_DSP2; | ||
| 2200 | |||
| 2201 | if (cpu_has_dsp3) | ||
| 2202 | elf_hwcap |= HWCAP_MIPS_DSP3; | ||
| 2203 | |||
| 2204 | if (cpu_has_mips16e2) | ||
| 2205 | elf_hwcap |= HWCAP_MIPS_MIPS16E2; | ||
| 2206 | |||
| 2207 | if (cpu_has_loongson_mmi) | ||
| 2208 | elf_hwcap |= HWCAP_LOONGSON_MMI; | ||
| 2209 | |||
| 2210 | if (cpu_has_loongson_ext) | ||
| 2211 | elf_hwcap |= HWCAP_LOONGSON_EXT; | ||
| 2212 | |||
| 2213 | if (cpu_has_loongson_ext2) | ||
| 2214 | elf_hwcap |= HWCAP_LOONGSON_EXT2; | ||
| 2215 | |||
| 2183 | if (cpu_has_vz) | 2216 | if (cpu_has_vz) |
| 2184 | cpu_probe_vz(c); | 2217 | cpu_probe_vz(c); |
| 2185 | 2218 | ||
| @@ -108,6 +108,9 @@ void __init add_memory_region(phys_addr_t start, phys_addr_t size, long type) · 107 unmodified lines | |||
| 108 | return; | 108 | return; |
| 109 | } | 109 | } |
| 110 | 110 | ||
| 111 | if (start < PHYS_OFFSET) | ||
| 112 | return; | ||
| 113 | |||
| 111 | memblock_add(start, size); | 114 | memblock_add(start, size); |
| 112 | /* Reserve any memory except the ordinary RAM ranges. */ | 115 | /* Reserve any memory except the ordinary RAM ranges. */ |
| 113 | switch (type) { | 116 | switch (type) { |
| @@ -321,7 +324,7 @@ static void __init bootmem_init(void) · 207 unmodified lines | |||
| 321 | * Reserve any memory between the start of RAM and PHYS_OFFSET | 324 | * Reserve any memory between the start of RAM and PHYS_OFFSET |
| 322 | */ | 325 | */ |
| 323 | if (ramstart > PHYS_OFFSET) | 326 | if (ramstart > PHYS_OFFSET) |
| 324 | memblock_reserve(PHYS_OFFSET, PFN_UP(ramstart) - PHYS_OFFSET); | 327 | memblock_reserve(PHYS_OFFSET, ramstart - PHYS_OFFSET); |
| 325 | 328 | ||
| 326 | if (PFN_UP(ramstart) > ARCH_PFN_OFFSET) { | 329 | if (PFN_UP(ramstart) > ARCH_PFN_OFFSET) { |
| 327 | pr_info("Wasting %lu bytes for tracking %lu unused pages\n", | 330 | pr_info("Wasting %lu bytes for tracking %lu unused pages\n", |
| @@ -80,6 +80,7 @@ SYSCALL_DEFINE6(mips_mmap2, unsigned long, addr, unsigned long, len, · 79 unmodified lines | |||
| 80 | 80 | ||
| 81 | save_static_function(sys_fork); | 81 | save_static_function(sys_fork); |
| 82 | save_static_function(sys_clone); | 82 | save_static_function(sys_clone); |
| 83 | save_static_function(sys_clone3); | ||
| 83 | 84 | ||
| 84 | SYSCALL_DEFINE1(set_thread_area, unsigned long, addr) | 85 | SYSCALL_DEFINE1(set_thread_area, unsigned long, addr) |
| 85 | { | 86 | { |
| @@ -373,4 +373,4 @@ · 372 unmodified lines | |||
| 373 | 432 n32 fsmount sys_fsmount | 373 | 432 n32 fsmount sys_fsmount |
| 374 | 433 n32 fspick sys_fspick | 374 | 433 n32 fspick sys_fspick |
| 375 | 434 n32 pidfd_open sys_pidfd_open | 375 | 434 n32 pidfd_open sys_pidfd_open |
| 376 | # 435 reserved for clone3 | 376 | 435 n32 clone3 __sys_clone3 |
| @@ -349,4 +349,4 @@ · 348 unmodified lines | |||
| 349 | 432 n64 fsmount sys_fsmount | 349 | 432 n64 fsmount sys_fsmount |
| 350 | 433 n64 fspick sys_fspick | 350 | 433 n64 fspick sys_fspick |
| 351 | 434 n64 pidfd_open sys_pidfd_open | 351 | 434 n64 pidfd_open sys_pidfd_open |
| 352 | # 435 reserved for clone3 | 352 | 435 n64 clone3 __sys_clone3 |
| @@ -422,4 +422,4 @@ · 421 unmodified lines | |||
| 422 | 432 o32 fsmount sys_fsmount | 422 | 432 o32 fsmount sys_fsmount |
| 423 | 433 o32 fspick sys_fspick | 423 | 433 o32 fspick sys_fspick |
| 424 | 434 o32 pidfd_open sys_pidfd_open | 424 | 434 o32 pidfd_open sys_pidfd_open |
| 425 | # 435 reserved for clone3 | 425 | 435 o32 clone3 __sys_clone3 |
| @@ -66,6 +66,10 @@ else · 65 unmodified lines | |||
| 66 | $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) | 66 | $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) |
| 67 | endif | 67 | endif |
| 68 | 68 | ||
| 69 | # Some -march= flags enable MMI instructions, and GCC complains about that | ||
| 70 | # support being enabled alongside -msoft-float. Thus explicitly disable MMI. | ||
| 71 | cflags-y += $(call cc-option,-mno-loongson-mmi) | ||
| 72 | |||
| 69 | # | 73 | # |
| 70 | # Loongson Machines' Support | 74 | # Loongson Machines' Support |
| 71 | # | 75 | # |
| @@ -3,6 +3,7 @@ · 2 unmodified lines | |||
| 3 | */ | 3 | */ |
| 4 | #include <linux/fs.h> | 4 | #include <linux/fs.h> |
| 5 | #include <linux/fcntl.h> | 5 | #include <linux/fcntl.h> |
| 6 | #include <linux/memblock.h> | ||
| 6 | #include <linux/mm.h> | 7 | #include <linux/mm.h> |
| 7 | 8 | ||
| 8 | #include <asm/bootinfo.h> | 9 | #include <asm/bootinfo.h> |
| @@ -64,24 +65,22 @@ void __init prom_init_memory(void) · 55 unmodified lines | |||
| 64 | node_id = loongson_memmap->map[i].node_id; | 65 | node_id = loongson_memmap->map[i].node_id; |
| 65 | mem_type = loongson_memmap->map[i].mem_type; | 66 | mem_type = loongson_memmap->map[i].mem_type; |
| 66 | 67 | ||
| 67 | if (node_id == 0) { | 68 | if (node_id != 0) |
| 68 | switch (mem_type) { | 69 | continue; |
| 69 | case SYSTEM_RAM_LOW: | 70 | |
| 70 | add_memory_region(loongson_memmap->map[i].mem_start, | 71 | switch (mem_type) { |
| 71 | (u64)loongson_memmap->map[i].mem_size << 20, | 72 | case SYSTEM_RAM_LOW: |
| 72 | BOOT_MEM_RAM); | 73 | memblock_add(loongson_memmap->map[i].mem_start, |
| 73 | break; | 74 | (u64)loongson_memmap->map[i].mem_size << 20); |
| 74 | case SYSTEM_RAM_HIGH: | 75 | break; |
| 75 | add_memory_region(loongson_memmap->map[i].mem_start, | 76 | case SYSTEM_RAM_HIGH: |
| 76 | (u64)loongson_memmap->map[i].mem_size << 20, | 77 | memblock_add(loongson_memmap->map[i].mem_start, |
| 77 | BOOT_MEM_RAM); | 78 | (u64)loongson_memmap->map[i].mem_size << 20); |
| 78 | break; | 79 | break; |
| 79 | case SYSTEM_RAM_RESERVED: | 80 | case SYSTEM_RAM_RESERVED: |
| 80 | add_memory_region(loongson_memmap->map[i].mem_start, | 81 | memblock_reserve(loongson_memmap->map[i].mem_start, |
| 81 | (u64)loongson_memmap->map[i].mem_size << 20, | 82 | (u64)loongson_memmap->map[i].mem_size << 20); |
| 82 | BOOT_MEM_RESERVED); | 83 | break; |
| 83 | break; | ||
| 84 | } | ||
| 85 | } | 84 | } |
| 86 | } | 85 | } |
| 87 | } | 86 | } |
| @@ -110,7 +110,7 @@ static int __init serial_init(void) · 109 unmodified lines | |||
| 110 | } | 110 | } |
| 111 | module_init(serial_init); | 111 | module_init(serial_init); |
| 112 | 112 | ||
| 113 | static void __init serial_exit(void) | 113 | static void __exit serial_exit(void) |
| 114 | { | 114 | { |
| 115 | platform_device_unregister(&uart8250_device); | 115 | platform_device_unregister(&uart8250_device); |
| 116 | } | 116 | } |
| @@ -142,8 +142,6 @@ static void __init szmem(unsigned int node) · 141 unmodified lines | |||
| 142 | (u32)node_id, mem_type, mem_start, mem_size); | 142 | (u32)node_id, mem_type, mem_start, mem_size); |
| 143 | pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n", | 143 | pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n", |
| 144 | start_pfn, end_pfn, num_physpages); | 144 | start_pfn, end_pfn, num_physpages); |
| 145 | add_memory_region((node_id << 44) + mem_start, | ||
| 146 | (u64)mem_size << 20, BOOT_MEM_RAM); | ||
| 147 | memblock_add_node(PFN_PHYS(start_pfn), | 145 | memblock_add_node(PFN_PHYS(start_pfn), |
| 148 | PFN_PHYS(end_pfn - start_pfn), node); | 146 | PFN_PHYS(end_pfn - start_pfn), node); |
| 149 | break; | 147 | break; |
| @@ -156,16 +154,12 @@ static void __init szmem(unsigned int node) · 6 unmodified lines | |||
| 156 | (u32)node_id, mem_type, mem_start, mem_size); | 154 | (u32)node_id, mem_type, mem_start, mem_size); |
| 157 | pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n", | 155 | pr_info(" start_pfn:0x%llx, end_pfn:0x%llx, num_physpages:0x%lx\n", |
| 158 | start_pfn, end_pfn, num_physpages); | 156 | start_pfn, end_pfn, num_physpages); |
| 159 | add_memory_region((node_id << 44) + mem_start, | ||
| 160 | (u64)mem_size << 20, BOOT_MEM_RAM); | ||
| 161 | memblock_add_node(PFN_PHYS(start_pfn), | 157 | memblock_add_node(PFN_PHYS(start_pfn), |
| 162 | PFN_PHYS(end_pfn - start_pfn), node); | 158 | PFN_PHYS(end_pfn - start_pfn), node); |
| 163 | break; | 159 | break; |
| 164 | case SYSTEM_RAM_RESERVED: | 160 | case SYSTEM_RAM_RESERVED: |
| 165 | pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n", | 161 | pr_info("Node%d: mem_type:%d, mem_start:0x%llx, mem_size:0x%llx MB\n", |
| 166 | (u32)node_id, mem_type, mem_start, mem_size); | 162 | (u32)node_id, mem_type, mem_start, mem_size); |
| 167 | add_memory_region((node_id << 44) + mem_start, | ||
| 168 | (u64)mem_size << 20, BOOT_MEM_RESERVED); | ||
| 169 | memblock_reserve(((node_id << 44) + mem_start), | 163 | memblock_reserve(((node_id << 44) + mem_start), |
| 170 | mem_size << 20); | 164 | mem_size << 20); |
| 171 | break; | 165 | break; |
| @@ -191,8 +185,6 @@ static void __init node_mem_init(unsigned int node) · 19 unmodified lines | |||
| 191 | NODE_DATA(node)->node_start_pfn = start_pfn; | 185 | NODE_DATA(node)->node_start_pfn = start_pfn; |
| 192 | NODE_DATA(node)->node_spanned_pages = end_pfn - start_pfn; | 186 | NODE_DATA(node)->node_spanned_pages = end_pfn - start_pfn; |
| 193 | 187 | ||
| 194 | free_bootmem_with_active_regions(node, end_pfn); | ||
| 195 | |||
| 196 | if (node == 0) { | 188 | if (node == 0) { |
| 197 | /* kernel end address */ | 189 | /* kernel end address */ |
| 198 | unsigned long kernel_end_pfn = PFN_UP(__pa_symbol(&_end)); | 190 | unsigned long kernel_end_pfn = PFN_UP(__pa_symbol(&_end)); |
| @@ -209,8 +201,6 @@ static void __init node_mem_init(unsigned int node) · 10 unmodified lines | |||
| 209 | memblock_reserve((node_addrspace_offset | 0xfe000000), | 201 | memblock_reserve((node_addrspace_offset | 0xfe000000), |
| 210 | 32 << 20); | 202 | 32 << 20); |
| 211 | } | 203 | } |
| 212 | |||
| 213 | sparse_memory_present_with_active_regions(node); | ||
| 214 | } | 204 | } |
| 215 | 205 | ||
| 216 | static __init void prom_meminit(void) | 206 | static __init void prom_meminit(void) |
| @@ -227,6 +217,7 @@ static __init void prom_meminit(void) · 10 unmodified lines | |||
| 227 | cpumask_clear(&__node_data[(node)]->cpumask); | 217 | cpumask_clear(&__node_data[(node)]->cpumask); |
| 228 | } | 218 | } |
| 229 | } | 219 | } |
| 220 | memblocks_present(); | ||
| 230 | max_low_pfn = PHYS_PFN(memblock_end_of_DRAM()); | 221 | max_low_pfn = PHYS_PFN(memblock_end_of_DRAM()); |
| 231 | 222 | ||
| 232 | for (cpu = 0; cpu < loongson_sysconf.nr_cpus; cpu++) { | 223 | for (cpu = 0; cpu < loongson_sysconf.nr_cpus; cpu++) { |
| @@ -61,6 +61,7 @@ int init_debug = 1; · 60 unmodified lines | |||
| 61 | /* memory blocks */ | 61 | /* memory blocks */ |
| 62 | struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS]; | 62 | struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS]; |
| 63 | 63 | ||
| 64 | #define MAX_PROM_MEM 5 | ||
| 64 | static phys_addr_t prom_mem_base[MAX_PROM_MEM] __initdata; | 65 | static phys_addr_t prom_mem_base[MAX_PROM_MEM] __initdata; |
| 65 | static phys_addr_t prom_mem_size[MAX_PROM_MEM] __initdata; | 66 | static phys_addr_t prom_mem_size[MAX_PROM_MEM] __initdata; |
| 66 | static unsigned int nr_prom_mem __initdata; | 67 | static unsigned int nr_prom_mem __initdata; |
| @@ -358,7 +359,7 @@ void __init prom_meminit(void) · 291 unmodified lines | |||
| 358 | p++; | 359 | p++; |
| 359 | 360 | ||
| 360 | if (type == BOOT_MEM_ROM_DATA) { | 361 | if (type == BOOT_MEM_ROM_DATA) { |
| 361 | if (nr_prom_mem >= 5) { | 362 | if (nr_prom_mem >= MAX_PROM_MEM) { |
| 362 | pr_err("Too many ROM DATA regions"); | 363 | pr_err("Too many ROM DATA regions"); |
| 363 | continue; | 364 | continue; |
| 364 | } | 365 | } |
| @@ -377,7 +378,6 @@ void __init prom_free_prom_memory(void) · 12 unmodified lines | |||
| 377 | char *ptr; | 378 | char *ptr; |
| 378 | int len = 0; | 379 | int len = 0; |
| 379 | int i; | 380 | int i; |
| 380 | unsigned long addr; | ||
| 381 | 381 | ||
| 382 | /* | 382 | /* |
| 383 | * preserve environment variables and command line from pmon/bbload | 383 | * preserve environment variables and command line from pmon/bbload |
| @@ -15,6 +15,7 @@ ccflags-vdso := \ · 14 unmodified lines | |||
| 15 | $(filter -mmicromips,$(KBUILD_CFLAGS)) \ | 15 | $(filter -mmicromips,$(KBUILD_CFLAGS)) \ |
| 16 | $(filter -march=%,$(KBUILD_CFLAGS)) \ | 16 | $(filter -march=%,$(KBUILD_CFLAGS)) \ |
| 17 | $(filter -m%-float,$(KBUILD_CFLAGS)) \ | 17 | $(filter -m%-float,$(KBUILD_CFLAGS)) \ |
| 18 | $(filter -mno-loongson-%,$(KBUILD_CFLAGS)) \ | ||
| 18 | -D__VDSO__ | 19 | -D__VDSO__ |
| 19 | 20 | ||
| 20 | ifdef CONFIG_CC_IS_CLANG | 21 | ifdef CONFIG_CC_IS_CLANG |
| @@ -59,7 +60,7 @@ CFLAGS_REMOVE_vgettimeofday.o = -pg · 38 unmodified lines | |||
| 59 | ifndef CONFIG_CPU_MIPSR6 | 60 | ifndef CONFIG_CPU_MIPSR6 |
| 60 | ifeq ($(call ld-ifversion, -lt, 225000000, y),y) | 61 | ifeq ($(call ld-ifversion, -lt, 225000000, y),y) |
| 61 | $(warning MIPS VDSO requires binutils >= 2.25) | 62 | $(warning MIPS VDSO requires binutils >= 2.25) |
| 62 | obj-vdso-y := $(filter-out gettimeofday.o, $(obj-vdso-y)) | 63 | obj-vdso-y := $(filter-out vgettimeofday.o, $(obj-vdso-y)) |
| 63 | ccflags-vdso += -DDISABLE_MIPS_VDSO | 64 | ccflags-vdso += -DDISABLE_MIPS_VDSO |
| 64 | endif | 65 | endif |
| 65 | endif | 66 | endif |
| @@ -1,269 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0-or-later | ||
| 2 | /* | ||
| 3 | * Copyright (C) 2015 Imagination Technologies | ||
| 4 | * Author: Alex Smith <alex.smith@imgtec.com> | ||
| 5 | */ | ||
| 6 | |||
| 7 | #include "vdso.h" | ||
| 8 | |||
| 9 | #include <linux/compiler.h> | ||
| 10 | #include <linux/time.h> | ||
| 11 | |||
| 12 | #include <asm/clocksource.h> | ||
| 13 | #include <asm/io.h> | ||
| 14 | #include <asm/unistd.h> | ||
| 15 | #include <asm/vdso.h> | ||
| 16 | |||
| 17 | #ifdef CONFIG_MIPS_CLOCK_VSYSCALL | ||
| 18 | |||
| 19 | static __always_inline long gettimeofday_fallback(struct timeval *_tv, | ||
| 20 | struct timezone *_tz) | ||
| 21 | { | ||
| 22 | register struct timezone *tz asm("a1") = _tz; | ||
| 23 | register struct timeval *tv asm("a0") = _tv; | ||
| 24 | register long ret asm("v0"); | ||
| 25 | register long nr asm("v0") = __NR_gettimeofday; | ||
| 26 | register long error asm("a3"); | ||
| 27 | |||
| 28 | asm volatile( | ||
| 29 | " syscall\n" | ||
| 30 | : "=r" (ret), "=r" (error) | ||
| 31 | : "r" (tv), "r" (tz), "r" (nr) | ||
| 32 | : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", | ||
| 33 | "$14", "$15", "$24", "$25", "hi", "lo", "memory"); | ||
| 34 | |||
| 35 | return error ? -ret : ret; | ||
| 36 | } | ||
| 37 | |||
| 38 | #endif | ||
| 39 | |||
| 40 | static __always_inline long clock_gettime_fallback(clockid_t _clkid, | ||
| 41 | struct timespec *_ts) | ||
| 42 | { | ||
| 43 | register struct timespec *ts asm("a1") = _ts; | ||
| 44 | register clockid_t clkid asm("a0") = _clkid; | ||
| 45 | register long ret asm("v0"); | ||
| 46 | register long nr asm("v0") = __NR_clock_gettime; | ||
| 47 | register long error asm("a3"); | ||
| 48 | |||
| 49 | asm volatile( | ||
| 50 | " syscall\n" | ||
| 51 | : "=r" (ret), "=r" (error) | ||
| 52 | : "r" (clkid), "r" (ts), "r" (nr) | ||
| 53 | : "$1", "$3", "$8", "$9", "$10", "$11", "$12", "$13", | ||
| 54 | "$14", "$15", "$24", "$25", "hi", "lo", "memory"); | ||
| 55 | |||
| 56 | return error ? -ret : ret; | ||
| 57 | } | ||
| 58 | |||
| 59 | static __always_inline int do_realtime_coarse(struct timespec *ts, | ||
| 60 | const union mips_vdso_data *data) | ||
| 61 | { | ||
| 62 | u32 start_seq; | ||
| 63 | |||
| 64 | do { | ||
| 65 | start_seq = vdso_data_read_begin(data); | ||
| 66 | |||
| 67 | ts->tv_sec = data->xtime_sec; | ||
| 68 | ts->tv_nsec = data->xtime_nsec >> data->cs_shift; | ||
| 69 | } while (vdso_data_read_retry(data, start_seq)); | ||
| 70 | |||
| 71 | return 0; | ||
| 72 | } | ||
| 73 | |||
| 74 | static __always_inline int do_monotonic_coarse(struct timespec *ts, | ||
| 75 | const union mips_vdso_data *data) | ||
| 76 | { | ||
| 77 | u32 start_seq; | ||
| 78 | u64 to_mono_sec; | ||
| 79 | u64 to_mono_nsec; | ||
| 80 | |||
| 81 | do { | ||
| 82 | start_seq = vdso_data_read_begin(data); | ||
| 83 | |||
| 84 | ts->tv_sec = data->xtime_sec; | ||
| 85 | ts->tv_nsec = data->xtime_nsec >> data->cs_shift; | ||
| 86 | |||
| 87 | to_mono_sec = data->wall_to_mono_sec; | ||
| 88 | to_mono_nsec = data->wall_to_mono_nsec; | ||
| 89 | } while (vdso_data_read_retry(data, start_seq)); | ||
| 90 | |||
| 91 | ts->tv_sec += to_mono_sec; | ||
| 92 | timespec_add_ns(ts, to_mono_nsec); | ||
| 93 | |||
| 94 | return 0; | ||
| 95 | } | ||
| 96 | |||
| 97 | #ifdef CONFIG_CSRC_R4K | ||
| 98 | |||
| 99 | static __always_inline u64 read_r4k_count(void) | ||
| 100 | { | ||
| 101 | unsigned int count; | ||
| 102 | |||
| 103 | __asm__ __volatile__( | ||
| 104 | " .set push\n" | ||
| 105 | " .set mips32r2\n" | ||
| 106 | " rdhwr %0, $2\n" | ||
| 107 | " .set pop\n" | ||
| 108 | : "=r" (count)); | ||
| 109 | |||
| 110 | return count; | ||
| 111 | } | ||
| 112 | |||
| 113 | #endif | ||
| 114 | |||
| 115 | #ifdef CONFIG_CLKSRC_MIPS_GIC | ||
| 116 | |||
| 117 | static __always_inline u64 read_gic_count(const union mips_vdso_data *data) | ||
| 118 | { | ||
| 119 | void __iomem *gic = get_gic(data); | ||
| 120 | u32 hi, hi2, lo; | ||
| 121 | |||
| 122 | do { | ||
| 123 | hi = __raw_readl(gic + sizeof(lo)); | ||
| 124 | lo = __raw_readl(gic); | ||
| 125 | hi2 = __raw_readl(gic + sizeof(lo)); | ||
| 126 | } while (hi2 != hi); | ||
| 127 | |||
| 128 | return (((u64)hi) << 32) + lo; | ||
| 129 | } | ||
| 130 | |||
| 131 | #endif | ||
| 132 | |||
| 133 | static __always_inline u64 get_ns(const union mips_vdso_data *data) | ||
| 134 | { | ||
| 135 | u64 cycle_now, delta, nsec; | ||
| 136 | |||
| 137 | switch (data->clock_mode) { | ||
| 138 | #ifdef CONFIG_CSRC_R4K | ||
| 139 | case VDSO_CLOCK_R4K: | ||
| 140 | cycle_now = read_r4k_count(); | ||
| 141 | break; | ||
| 142 | #endif | ||
| 143 | #ifdef CONFIG_CLKSRC_MIPS_GIC | ||
| 144 | case VDSO_CLOCK_GIC: | ||
| 145 | cycle_now = read_gic_count(data); | ||
| 146 | break; | ||
| 147 | #endif | ||
| 148 | default: | ||
| 149 | return 0; | ||
| 150 | } | ||
| 151 | |||
| 152 | delta = (cycle_now - data->cs_cycle_last) & data->cs_mask; | ||
| 153 | |||
| 154 | nsec = (delta * data->cs_mult) + data->xtime_nsec; | ||
| 155 | nsec >>= data->cs_shift; | ||
| 156 | |||
| 157 | return nsec; | ||
| 158 | } | ||
| 159 | |||
| 160 | static __always_inline int do_realtime(struct timespec *ts, | ||
| 161 | const union mips_vdso_data *data) | ||
| 162 | { | ||
| 163 | u32 start_seq; | ||
| 164 | u64 ns; | ||
| 165 | |||
| 166 | do { | ||
| 167 | start_seq = vdso_data_read_begin(data); | ||
| 168 | |||
| 169 | if (data->clock_mode == VDSO_CLOCK_NONE) | ||
| 170 | return -ENOSYS; | ||
| 171 | |||
| 172 | ts->tv_sec = data->xtime_sec; | ||
| 173 | ns = get_ns(data); | ||
| 174 | } while (vdso_data_read_retry(data, start_seq)); | ||
| 175 | |||
| 176 | ts->tv_nsec = 0; | ||
| 177 | timespec_add_ns(ts, ns); | ||
| 178 | |||
| 179 | return 0; | ||
| 180 | } | ||
| 181 | |||
| 182 | static __always_inline int do_monotonic(struct timespec *ts, | ||
| 183 | const union mips_vdso_data *data) | ||
| 184 | { | ||
| 185 | u32 start_seq; | ||
| 186 | u64 ns; | ||
| 187 | u64 to_mono_sec; | ||
| 188 | u64 to_mono_nsec; | ||
| 189 | |||
| 190 | do { | ||
| 191 | start_seq = vdso_data_read_begin(data); | ||
| 192 | |||
| 193 | if (data->clock_mode == VDSO_CLOCK_NONE) | ||
| 194 | return -ENOSYS; | ||
| 195 | |||
| 196 | ts->tv_sec = data->xtime_sec; | ||
| 197 | ns = get_ns(data); | ||
| 198 | |||
| 199 | to_mono_sec = data->wall_to_mono_sec; | ||
| 200 | to_mono_nsec = data->wall_to_mono_nsec; | ||
| 201 | } while (vdso_data_read_retry(data, start_seq)); | ||
| 202 | |||
| 203 | ts->tv_sec += to_mono_sec; | ||
| 204 | ts->tv_nsec = 0; | ||
| 205 | timespec_add_ns(ts, ns + to_mono_nsec); | ||
| 206 | |||
| 207 | return 0; | ||
| 208 | } | ||
| 209 | |||
| 210 | #ifdef CONFIG_MIPS_CLOCK_VSYSCALL | ||
| 211 | |||
| 212 | /* | ||
| 213 | * This is behind the ifdef so that we don't provide the symbol when there's no | ||
| 214 | * possibility of there being a usable clocksource, because there's nothing we | ||
| 215 | * can do without it. When libc fails the symbol lookup it should fall back on | ||
| 216 | * the standard syscall path. | ||
| 217 | */ | ||
| 218 | int __vdso_gettimeofday(struct timeval *tv, struct timezone *tz) | ||
| 219 | { | ||
| 220 | const union mips_vdso_data *data = get_vdso_data(); | ||
| 221 | struct timespec ts; | ||
| 222 | int ret; | ||
| 223 | |||
| 224 | ret = do_realtime(&ts, data); | ||
| 225 | if (ret) | ||
| 226 | return gettimeofday_fallback(tv, tz); | ||
| 227 | |||
| 228 | if (tv) { | ||
| 229 | tv->tv_sec = ts.tv_sec; | ||
| 230 | tv->tv_usec = ts.tv_nsec / 1000; | ||
| 231 | } | ||
| 232 | |||
| 233 | if (tz) { | ||
| 234 | tz->tz_minuteswest = data->tz_minuteswest; | ||
| 235 | tz->tz_dsttime = data->tz_dsttime; | ||
| 236 | } | ||
| 237 | |||
| 238 | return 0; | ||
| 239 | } | ||
| 240 | |||
| 241 | #endif /* CONFIG_MIPS_CLOCK_VSYSCALL */ | ||
| 242 | |||
| 243 | int __vdso_clock_gettime(clockid_t clkid, struct timespec *ts) | ||
| 244 | { | ||
| 245 | const union mips_vdso_data *data = get_vdso_data(); | ||
| 246 | int ret = -1; | ||
| 247 | |||
| 248 | switch (clkid) { | ||
| 249 | case CLOCK_REALTIME_COARSE: | ||
| 250 | ret = do_realtime_coarse(ts, data); | ||
| 251 | break; | ||
| 252 | case CLOCK_MONOTONIC_COARSE: | ||
| 253 | ret = do_monotonic_coarse(ts, data); | ||
| 254 | break; | ||
| 255 | case CLOCK_REALTIME: | ||
| 256 | ret = do_realtime(ts, data); | ||
| 257 | break; | ||
| 258 | case CLOCK_MONOTONIC: | ||
| 259 | ret = do_monotonic(ts, data); | ||
| 260 | break; | ||
| 261 | default: | ||
| 262 | break; | ||
| 263 | } | ||
| 264 | |||
| 265 | if (ret) | ||
| 266 | ret = clock_gettime_fallback(clkid, ts); | ||
| 267 | |||
| 268 | return ret; | ||
| 269 | } | ||
| @@ -22,7 +22,7 @@ · 21 unmodified lines | |||
| 22 | 22 | ||
| 23 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES | 23 | #define ARCH_DMA_MINALIGN L1_CACHE_BYTES |
| 24 | 24 | ||
| 25 | #define __read_mostly __attribute__((__section__(".data..read_mostly"))) | 25 | #define __read_mostly __section(.data..read_mostly) |
| 26 | 26 | ||
| 27 | void parisc_cache_init(void); /* initializes cache-flushing */ | 27 | void parisc_cache_init(void); /* initializes cache-flushing */ |
| 28 | void disable_sr_hashing_asm(int); /* low level support for above */ | 28 | void disable_sr_hashing_asm(int); /* low level support for above */ |
| @@ -52,7 +52,7 @@ · 51 unmodified lines | |||
| 52 | }) | 52 | }) |
| 53 | 53 | ||
| 54 | #ifdef CONFIG_SMP | 54 | #ifdef CONFIG_SMP |
| 55 | # define __lock_aligned __attribute__((__section__(".data..lock_aligned"))) | 55 | # define __lock_aligned __section(.data..lock_aligned) |
| 56 | #endif | 56 | #endif |
| 57 | 57 | ||
| 58 | #endif /* __PARISC_LDCW_H */ | 58 | #endif /* __PARISC_LDCW_H */ |
| @@ -3,7 +3,7 @@ · 2 unmodified lines | |||
| 3 | * arch/parisc/mm/ioremap.c | 3 | * arch/parisc/mm/ioremap.c |
| 4 | * | 4 | * |
| 5 | * (C) Copyright 1995 1996 Linus Torvalds | 5 | * (C) Copyright 1995 1996 Linus Torvalds |
| 6 | * (C) Copyright 2001-2006 Helge Deller <deller@gmx.de> | 6 | * (C) Copyright 2001-2019 Helge Deller <deller@gmx.de> |
| 7 | * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org> | 7 | * (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org> |
| 8 | */ | 8 | */ |
| 9 | 9 | ||
| @@ -84,7 +84,7 @@ void __iomem * __ioremap(unsigned long phys_addr, unsigned long size, unsigned l · 74 unmodified lines | |||
| 84 | addr = (void __iomem *) area->addr; | 84 | addr = (void __iomem *) area->addr; |
| 85 | if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size, | 85 | if (ioremap_page_range((unsigned long)addr, (unsigned long)addr + size, |
| 86 | phys_addr, pgprot)) { | 86 | phys_addr, pgprot)) { |
| 87 | vfree(addr); | 87 | vunmap(addr); |
| 88 | return NULL; | 88 | return NULL; |
| 89 | } | 89 | } |
| 90 | 90 | ||
| @@ -92,9 +92,11 @@ void __iomem * __ioremap(unsigned long phys_addr, unsigned long size, unsigned l · 1 unmodified line | |||
| 92 | } | 92 | } |
| 93 | EXPORT_SYMBOL(__ioremap); | 93 | EXPORT_SYMBOL(__ioremap); |
| 94 | 94 | ||
| 95 | void iounmap(const volatile void __iomem *addr) | 95 | void iounmap(const volatile void __iomem *io_addr) |
| 96 | { | 96 | { |
| 97 | if (addr > high_memory) | 97 | unsigned long addr = (unsigned long)io_addr & PAGE_MASK; |
| 98 | return vfree((void *) (PAGE_MASK & (unsigned long __force) addr)); | 98 | |
| 99 | if (is_vmalloc_addr((void *)addr)) | ||
| 100 | vunmap((void *)addr); | ||
| 99 | } | 101 | } |
| 100 | EXPORT_SYMBOL(iounmap); | 102 | EXPORT_SYMBOL(iounmap); |
| @@ -50,7 +50,7 @@ endif · 49 unmodified lines | |||
| 50 | 50 | ||
| 51 | BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -nostdinc | 51 | BOOTAFLAGS := -D__ASSEMBLY__ $(BOOTCFLAGS) -nostdinc |
| 52 | 52 | ||
| 53 | BOOTARFLAGS := -cr$(KBUILD_ARFLAGS) | 53 | BOOTARFLAGS := -crD |
| 54 | 54 | ||
| 55 | ifdef CONFIG_CC_IS_CLANG | 55 | ifdef CONFIG_CC_IS_CLANG |
| 56 | BOOTCFLAGS += $(CLANG_FLAGS) | 56 | BOOTCFLAGS += $(CLANG_FLAGS) |
| @@ -35,6 +35,10 @@ static inline void radix__flush_all_lpid(unsigned int lpid) · 34 unmodified lines | |||
| 35 | { | 35 | { |
| 36 | WARN_ON(1); | 36 | WARN_ON(1); |
| 37 | } | 37 | } |
| 38 | static inline void radix__flush_all_lpid_guest(unsigned int lpid) | ||
| 39 | { | ||
| 40 | WARN_ON(1); | ||
| 41 | } | ||
| 38 | #endif | 42 | #endif |
| 39 | 43 | ||
| 40 | extern void radix__flush_hugetlb_tlb_range(struct vm_area_struct *vma, | 44 | extern void radix__flush_hugetlb_tlb_range(struct vm_area_struct *vma, |
| @@ -36,8 +36,8 @@ · 35 unmodified lines | |||
| 36 | #include "book3s.h" | 36 | #include "book3s.h" |
| 37 | #include "trace.h" | 37 | #include "trace.h" |
| 38 | 38 | ||
| 39 | #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM | 39 | #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__ |
| 40 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU | 40 | #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__ |
| 41 | 41 | ||
| 42 | /* #define EXIT_DEBUG */ | 42 | /* #define EXIT_DEBUG */ |
| 43 | 43 | ||
| @@ -69,8 +69,8 @@ struct kvm_stats_debugfs_item debugfs_entries[] = { · 25 unmodified lines | |||
| 69 | { "pthru_all", VCPU_STAT(pthru_all) }, | 69 | { "pthru_all", VCPU_STAT(pthru_all) }, |
| 70 | { "pthru_host", VCPU_STAT(pthru_host) }, | 70 | { "pthru_host", VCPU_STAT(pthru_host) }, |
| 71 | { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) }, | 71 | { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) }, |
| 72 | { "largepages_2M", VM_STAT(num_2M_pages) }, | 72 | { "largepages_2M", VM_STAT(num_2M_pages, .mode = 0444) }, |
| 73 | { "largepages_1G", VM_STAT(num_1G_pages) }, | 73 | { "largepages_1G", VM_STAT(num_1G_pages, .mode = 0444) }, |
| 74 | { NULL } | 74 | { NULL } |
| 75 | }; | 75 | }; |
| 76 | 76 | ||
| @@ -1921,6 +1921,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) · 1920 unmodified lines | |||
| 1921 | mtspr SPRN_PCR, r6 | 1921 | mtspr SPRN_PCR, r6 |
| 1922 | 18: | 1922 | 18: |
| 1923 | /* Signal secondary CPUs to continue */ | 1923 | /* Signal secondary CPUs to continue */ |
| 1924 | li r0, 0 | ||
| 1924 | stb r0,VCORE_IN_GUEST(r5) | 1925 | stb r0,VCORE_IN_GUEST(r5) |
| 1925 | 19: lis r8,0x7fff /* MAX_INT@h */ | 1926 | 19: lis r8,0x7fff /* MAX_INT@h */ |
| 1926 | mtspr SPRN_HDEC,r8 | 1927 | mtspr SPRN_HDEC,r8 |
| @@ -761,6 +761,7 @@ static int spufs_init_fs_context(struct fs_context *fc) · 760 unmodified lines | |||
| 761 | ctx->gid = current_gid(); | 761 | ctx->gid = current_gid(); |
| 762 | ctx->mode = 0755; | 762 | ctx->mode = 0755; |
| 763 | 763 | ||
| 764 | fc->fs_private = ctx; | ||
| 764 | fc->s_fs_info = sbi; | 765 | fc->s_fs_info = sbi; |
| 765 | fc->ops = &spufs_context_ops; | 766 | fc->ops = &spufs_context_ops; |
| 766 | return 0; | 767 | return 0; |
| @@ -1419,6 +1419,9 @@ void __init pseries_lpar_read_hblkrm_characteristics(void) · 1418 unmodified lines | |||
| 1419 | unsigned char local_buffer[SPLPAR_TLB_BIC_MAXLENGTH]; | 1419 | unsigned char local_buffer[SPLPAR_TLB_BIC_MAXLENGTH]; |
| 1420 | int call_status, len, idx, bpsize; | 1420 | int call_status, len, idx, bpsize; |
| 1421 | 1421 | ||
| 1422 | if (!firmware_has_feature(FW_FEATURE_BLOCK_REMOVE)) | ||
| 1423 | return; | ||
| 1424 | |||
| 1422 | spin_lock(&rtas_data_buf_lock); | 1425 | spin_lock(&rtas_data_buf_lock); |
| 1423 | memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); | 1426 | memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE); |
| 1424 | call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, | 1427 | call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1, |
| @@ -13,6 +13,7 @@ · 12 unmodified lines | |||
| 13 | compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000"; | 13 | compatible = "sifive,hifive-unleashed-a00", "sifive,fu540-c000"; |
| 14 | 14 | ||
| 15 | chosen { | 15 | chosen { |
| 16 | stdout-path = "serial0"; | ||
| 16 | }; | 17 | }; |
| 17 | 18 | ||
| 18 | cpus { | 19 | cpus { |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | |||
| 22 | 22 | ||
| 23 | #define REG_L __REG_SEL(ld, lw) | 23 | #define REG_L __REG_SEL(ld, lw) |
| 24 | #define REG_S __REG_SEL(sd, sw) | 24 | #define REG_S __REG_SEL(sd, sw) |
| 25 | #define REG_SC __REG_SEL(sc.d, sc.w) | ||
| 25 | #define SZREG __REG_SEL(8, 4) | 26 | #define SZREG __REG_SEL(8, 4) |
| 26 | #define LGREG __REG_SEL(3, 2) | 27 | #define LGREG __REG_SEL(3, 2) |
| 27 | 28 | ||
| @@ -87,14 +87,6 @@ extern pgd_t swapper_pg_dir[]; · 86 unmodified lines | |||
| 87 | #define VMALLOC_END (PAGE_OFFSET - 1) | 87 | #define VMALLOC_END (PAGE_OFFSET - 1) |
| 88 | #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) | 88 | #define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE) |
| 89 | 89 | ||
| 90 | #define FIXADDR_TOP VMALLOC_START | ||
| 91 | #ifdef CONFIG_64BIT | ||
| 92 | #define FIXADDR_SIZE PMD_SIZE | ||
| 93 | #else | ||
| 94 | #define FIXADDR_SIZE PGDIR_SIZE | ||
| 95 | #endif | ||
| 96 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | ||
| 97 | |||
| 98 | /* | 90 | /* |
| 99 | * Roughly size the vmemmap space to be large enough to fit enough | 91 | * Roughly size the vmemmap space to be large enough to fit enough |
| 100 | * struct pages to map half the virtual address space. Then | 92 | * struct pages to map half the virtual address space. Then |
| @@ -108,6 +100,14 @@ extern pgd_t swapper_pg_dir[]; · 7 unmodified lines | |||
| 108 | 100 | ||
| 109 | #define vmemmap ((struct page *)VMEMMAP_START) | 101 | #define vmemmap ((struct page *)VMEMMAP_START) |
| 110 | 102 | ||
| 103 | #define FIXADDR_TOP (VMEMMAP_START) | ||
| 104 | #ifdef CONFIG_64BIT | ||
| 105 | #define FIXADDR_SIZE PMD_SIZE | ||
| 106 | #else | ||
| 107 | #define FIXADDR_SIZE PGDIR_SIZE | ||
| 108 | #endif | ||
| 109 | #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) | ||
| 110 | |||
| 111 | /* | 111 | /* |
| 112 | * ZERO_PAGE is a global shared page that is always zero, | 112 | * ZERO_PAGE is a global shared page that is always zero, |
| 113 | * used for zero-mapped memory areas, etc. | 113 | * used for zero-mapped memory areas, etc. |
| @@ -10,10 +10,6 @@ · 9 unmodified lines | |||
| 10 | #include <linux/mm_types.h> | 10 | #include <linux/mm_types.h> |
| 11 | #include <asm/smp.h> | 11 | #include <asm/smp.h> |
| 12 | 12 | ||
| 13 | /* | ||
| 14 | * Flush entire local TLB. 'sfence.vma' implicitly fences with the instruction | ||
| 15 | * cache as well, so a 'fence.i' is not necessary. | ||
| 16 | */ | ||
| 17 | static inline void local_flush_tlb_all(void) | 13 | static inline void local_flush_tlb_all(void) |
| 18 | { | 14 | { |
| 19 | __asm__ __volatile__ ("sfence.vma" : : : "memory"); | 15 | __asm__ __volatile__ ("sfence.vma" : : : "memory"); |
| @@ -98,7 +98,26 @@ _save_context: · 97 unmodified lines | |||
| 98 | */ | 98 | */ |
| 99 | .macro RESTORE_ALL | 99 | .macro RESTORE_ALL |
| 100 | REG_L a0, PT_SSTATUS(sp) | 100 | REG_L a0, PT_SSTATUS(sp) |
| 101 | REG_L a2, PT_SEPC(sp) | 101 | /* |
| 102 | * The current load reservation is effectively part of the processor's | ||
| 103 | * state, in the sense that load reservations cannot be shared between | ||
| 104 | * different hart contexts. We can't actually save and restore a load | ||
| 105 | * reservation, so instead here we clear any existing reservation -- | ||
| 106 | * it's always legal for implementations to clear load reservations at | ||
| 107 | * any point (as long as the forward progress guarantee is kept, but | ||
| 108 | * we'll ignore that here). | ||
| 109 | * | ||
| 110 | * Dangling load reservations can be the result of taking a trap in the | ||
| 111 | * middle of an LR/SC sequence, but can also be the result of a taken | ||
| 112 | * forward branch around an SC -- which is how we implement CAS. As a | ||
| 113 | * result we need to clear reservations between the last CAS and the | ||
| 114 | * jump back to the new context. While it is unlikely the store | ||
| 115 | * completes, implementations are allowed to expand reservations to be | ||
| 116 | * arbitrarily large. | ||
| 117 | */ | ||
| 118 | REG_L a2, PT_SEPC(sp) | ||
| 119 | REG_SC x0, a2, PT_SEPC(sp) | ||
| 120 | |||
| 102 | csrw CSR_SSTATUS, a0 | 121 | csrw CSR_SSTATUS, a0 |
| 103 | csrw CSR_SEPC, a2 | 122 | csrw CSR_SEPC, a2 |
| 104 | 123 | ||
| @@ -254,12 +273,11 @@ restore_all: · 149 unmodified lines | |||
| 254 | resume_kernel: | 273 | resume_kernel: |
| 255 | REG_L s0, TASK_TI_PREEMPT_COUNT(tp) | 274 | REG_L s0, TASK_TI_PREEMPT_COUNT(tp) |
| 256 | bnez s0, restore_all | 275 | bnez s0, restore_all |
| 257 | need_resched: | ||
| 258 | REG_L s0, TASK_TI_FLAGS(tp) | 276 | REG_L s0, TASK_TI_FLAGS(tp) |
| 259 | andi s0, s0, _TIF_NEED_RESCHED | 277 | andi s0, s0, _TIF_NEED_RESCHED |
| 260 | beqz s0, restore_all | 278 | beqz s0, restore_all |
| 261 | call preempt_schedule_irq | 279 | call preempt_schedule_irq |
| 262 | j need_resched | 280 | j restore_all |
| 263 | #endif | 281 | #endif |
| 264 | 282 | ||
| 265 | work_pending: | 283 | work_pending: |
| @@ -124,24 +124,24 @@ static inline unsigned long get_break_insn_length(unsigned long pc) · 123 unmodified lines | |||
| 124 | 124 | ||
| 125 | asmlinkage void do_trap_break(struct pt_regs *regs) | 125 | asmlinkage void do_trap_break(struct pt_regs *regs) |
| 126 | { | 126 | { |
| 127 | if (user_mode(regs)) { | ||
| 128 | force_sig_fault(SIGTRAP, TRAP_BRKPT, | ||
| 129 | (void __user *)(regs->sepc)); | ||
| 130 | return; | ||
| 131 | } | ||
| 127 | #ifdef CONFIG_GENERIC_BUG | 132 | #ifdef CONFIG_GENERIC_BUG |
| 128 | if (!user_mode(regs)) { | 133 | { |
| 129 | enum bug_trap_type type; | 134 | enum bug_trap_type type; |
| 130 | 135 | ||
| 131 | type = report_bug(regs->sepc, regs); | 136 | type = report_bug(regs->sepc, regs); |
| 132 | switch (type) { | 137 | if (type == BUG_TRAP_TYPE_WARN) { |
| 133 | case BUG_TRAP_TYPE_NONE: | ||
| 134 | break; | ||
| 135 | case BUG_TRAP_TYPE_WARN: | ||
| 136 | regs->sepc += get_break_insn_length(regs->sepc); | 138 | regs->sepc += get_break_insn_length(regs->sepc); |
| 137 | break; | 139 | return; |
| 138 | case BUG_TRAP_TYPE_BUG: | ||
| 139 | die(regs, "Kernel BUG"); | ||
| 140 | } | 140 | } |
| 141 | } | 141 | } |
| 142 | #endif /* CONFIG_GENERIC_BUG */ | 142 | #endif /* CONFIG_GENERIC_BUG */ |
| 143 | 143 | ||
| 144 | force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)(regs->sepc)); | 144 | die(regs, "Kernel BUG"); |
| 145 | } | 145 | } |
| 146 | 146 | ||
| 147 | #ifdef CONFIG_GENERIC_BUG | 147 | #ifdef CONFIG_GENERIC_BUG |
| @@ -11,6 +11,7 @@ · 10 unmodified lines | |||
| 11 | #include <linux/swap.h> | 11 | #include <linux/swap.h> |
| 12 | #include <linux/sizes.h> | 12 | #include <linux/sizes.h> |
| 13 | #include <linux/of_fdt.h> | 13 | #include <linux/of_fdt.h> |
| 14 | #include <linux/libfdt.h> | ||
| 14 | 15 | ||
| 15 | #include <asm/fixmap.h> | 16 | #include <asm/fixmap.h> |
| 16 | #include <asm/tlbflush.h> | 17 | #include <asm/tlbflush.h> |
| @@ -82,6 +83,8 @@ disable: · 65 unmodified lines | |||
| 82 | } | 83 | } |
| 83 | #endif /* CONFIG_BLK_DEV_INITRD */ | 84 | #endif /* CONFIG_BLK_DEV_INITRD */ |
| 84 | 85 | ||
| 86 | static phys_addr_t dtb_early_pa __initdata; | ||
| 87 | |||
| 85 | void __init setup_bootmem(void) | 88 | void __init setup_bootmem(void) |
| 86 | { | 89 | { |
| 87 | struct memblock_region *reg; | 90 | struct memblock_region *reg; |
| @@ -117,7 +120,12 @@ void __init setup_bootmem(void) · 29 unmodified lines | |||
| 117 | setup_initrd(); | 120 | setup_initrd(); |
| 118 | #endif /* CONFIG_BLK_DEV_INITRD */ | 121 | #endif /* CONFIG_BLK_DEV_INITRD */ |
| 119 | 122 | ||
| 120 | early_init_fdt_reserve_self(); | 123 | /* |
| 124 | * Avoid using early_init_fdt_reserve_self() since __pa() does | ||
| 125 | * not work for DTB pointers that are fixmap addresses | ||
| 126 | */ | ||
| 127 | memblock_reserve(dtb_early_pa, fdt_totalsize(dtb_early_va)); | ||
| 128 | |||
| 121 | early_init_fdt_scan_reserved_mem(); | 129 | early_init_fdt_scan_reserved_mem(); |
| 122 | memblock_allow_resize(); | 130 | memblock_allow_resize(); |
| 123 | memblock_dump_all(); | 131 | memblock_dump_all(); |
| @@ -393,6 +401,8 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) · 269 unmodified lines | |||
| 393 | 401 | ||
| 394 | /* Save pointer to DTB for early FDT parsing */ | 402 | /* Save pointer to DTB for early FDT parsing */ |
| 395 | dtb_early_va = (void *)fix_to_virt(FIX_FDT) + (dtb_pa & ~PAGE_MASK); | 403 | dtb_early_va = (void *)fix_to_virt(FIX_FDT) + (dtb_pa & ~PAGE_MASK); |
| 404 | /* Save physical address for memblock reservation */ | ||
| 405 | dtb_early_pa = dtb_pa; | ||
| 396 | } | 406 | } |
| 397 | 407 | ||
| 398 | static void __init setup_vm_final(void) | 408 | static void __init setup_vm_final(void) |
| @@ -44,6 +44,7 @@ CONFIG_NR_CPUS=512 · 43 unmodified lines | |||
| 44 | CONFIG_NUMA=y | 44 | CONFIG_NUMA=y |
| 45 | CONFIG_HZ_100=y | 45 | CONFIG_HZ_100=y |
| 46 | CONFIG_KEXEC_FILE=y | 46 | CONFIG_KEXEC_FILE=y |
| 47 | CONFIG_KEXEC_SIG=y | ||
| 47 | CONFIG_EXPOLINE=y | 48 | CONFIG_EXPOLINE=y |
| 48 | CONFIG_EXPOLINE_AUTO=y | 49 | CONFIG_EXPOLINE_AUTO=y |
| 49 | CONFIG_CHSC_SCH=y | 50 | CONFIG_CHSC_SCH=y |
| @@ -69,12 +70,13 @@ CONFIG_MODULE_UNLOAD=y · 19 unmodified lines | |||
| 69 | CONFIG_MODULE_FORCE_UNLOAD=y | 70 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 70 | CONFIG_MODVERSIONS=y | 71 | CONFIG_MODVERSIONS=y |
| 71 | CONFIG_MODULE_SRCVERSION_ALL=y | 72 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 72 | CONFIG_MODULE_SIG=y | ||
| 73 | CONFIG_MODULE_SIG_SHA256=y | 73 | CONFIG_MODULE_SIG_SHA256=y |
| 74 | CONFIG_UNUSED_SYMBOLS=y | ||
| 74 | CONFIG_BLK_DEV_INTEGRITY=y | 75 | CONFIG_BLK_DEV_INTEGRITY=y |
| 75 | CONFIG_BLK_DEV_THROTTLING=y | 76 | CONFIG_BLK_DEV_THROTTLING=y |
| 76 | CONFIG_BLK_WBT=y | 77 | CONFIG_BLK_WBT=y |
| 77 | CONFIG_BLK_CGROUP_IOLATENCY=y | 78 | CONFIG_BLK_CGROUP_IOLATENCY=y |
| 79 | CONFIG_BLK_CGROUP_IOCOST=y | ||
| 78 | CONFIG_PARTITION_ADVANCED=y | 80 | CONFIG_PARTITION_ADVANCED=y |
| 79 | CONFIG_IBM_PARTITION=y | 81 | CONFIG_IBM_PARTITION=y |
| 80 | CONFIG_BSD_DISKLABEL=y | 82 | CONFIG_BSD_DISKLABEL=y |
| @@ -370,6 +372,7 @@ CONFIG_NETLINK_DIAG=m · 289 unmodified lines | |||
| 370 | CONFIG_CGROUP_NET_PRIO=y | 372 | CONFIG_CGROUP_NET_PRIO=y |
| 371 | CONFIG_BPF_JIT=y | 373 | CONFIG_BPF_JIT=y |
| 372 | CONFIG_NET_PKTGEN=m | 374 | CONFIG_NET_PKTGEN=m |
| 375 | # CONFIG_NET_DROP_MONITOR is not set | ||
| 373 | CONFIG_PCI=y | 376 | CONFIG_PCI=y |
| 374 | CONFIG_PCI_DEBUG=y | 377 | CONFIG_PCI_DEBUG=y |
| 375 | CONFIG_HOTPLUG_PCI=y | 378 | CONFIG_HOTPLUG_PCI=y |
| @@ -424,6 +427,7 @@ CONFIG_DM_CRYPT=m · 48 unmodified lines | |||
| 424 | CONFIG_DM_SNAPSHOT=m | 427 | CONFIG_DM_SNAPSHOT=m |
| 425 | CONFIG_DM_THIN_PROVISIONING=m | 428 | CONFIG_DM_THIN_PROVISIONING=m |
| 426 | CONFIG_DM_WRITECACHE=m | 429 | CONFIG_DM_WRITECACHE=m |
| 430 | CONFIG_DM_CLONE=m | ||
| 427 | CONFIG_DM_MIRROR=m | 431 | CONFIG_DM_MIRROR=m |
| 428 | CONFIG_DM_LOG_USERSPACE=m | 432 | CONFIG_DM_LOG_USERSPACE=m |
| 429 | CONFIG_DM_RAID=m | 433 | CONFIG_DM_RAID=m |
| @@ -435,6 +439,7 @@ CONFIG_DM_DELAY=m · 5 unmodified lines | |||
| 435 | CONFIG_DM_UEVENT=y | 439 | CONFIG_DM_UEVENT=y |
| 436 | CONFIG_DM_FLAKEY=m | 440 | CONFIG_DM_FLAKEY=m |
| 437 | CONFIG_DM_VERITY=m | 441 | CONFIG_DM_VERITY=m |
| 442 | CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG=y | ||
| 438 | CONFIG_DM_SWITCH=m | 443 | CONFIG_DM_SWITCH=m |
| 439 | CONFIG_NETDEVICES=y | 444 | CONFIG_NETDEVICES=y |
| 440 | CONFIG_BONDING=m | 445 | CONFIG_BONDING=m |
| @@ -489,6 +494,7 @@ CONFIG_MLX5_CORE_EN=y · 48 unmodified lines | |||
| 489 | # CONFIG_NET_VENDOR_NVIDIA is not set | 494 | # CONFIG_NET_VENDOR_NVIDIA is not set |
| 490 | # CONFIG_NET_VENDOR_OKI is not set | 495 | # CONFIG_NET_VENDOR_OKI is not set |
| 491 | # CONFIG_NET_VENDOR_PACKET_ENGINES is not set | 496 | # CONFIG_NET_VENDOR_PACKET_ENGINES is not set |
| 497 | # CONFIG_NET_VENDOR_PENSANDO is not set | ||
| 492 | # CONFIG_NET_VENDOR_QLOGIC is not set | 498 | # CONFIG_NET_VENDOR_QLOGIC is not set |
| 493 | # CONFIG_NET_VENDOR_QUALCOMM is not set | 499 | # CONFIG_NET_VENDOR_QUALCOMM is not set |
| 494 | # CONFIG_NET_VENDOR_RDC is not set | 500 | # CONFIG_NET_VENDOR_RDC is not set |
| @@ -538,15 +544,16 @@ CONFIG_WATCHDOG=y · 43 unmodified lines | |||
| 538 | CONFIG_WATCHDOG_NOWAYOUT=y | 544 | CONFIG_WATCHDOG_NOWAYOUT=y |
| 539 | CONFIG_SOFT_WATCHDOG=m | 545 | CONFIG_SOFT_WATCHDOG=m |
| 540 | CONFIG_DIAG288_WATCHDOG=m | 546 | CONFIG_DIAG288_WATCHDOG=m |
| 541 | CONFIG_DRM=y | 547 | CONFIG_FB=y |
| 542 | CONFIG_DRM_VIRTIO_GPU=y | ||
| 543 | CONFIG_FRAMEBUFFER_CONSOLE=y | 548 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 549 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | ||
| 544 | # CONFIG_HID is not set | 550 | # CONFIG_HID is not set |
| 545 | # CONFIG_USB_SUPPORT is not set | 551 | # CONFIG_USB_SUPPORT is not set |
| 546 | CONFIG_INFINIBAND=m | 552 | CONFIG_INFINIBAND=m |
| 547 | CONFIG_INFINIBAND_USER_ACCESS=m | 553 | CONFIG_INFINIBAND_USER_ACCESS=m |
| 548 | CONFIG_MLX4_INFINIBAND=m | 554 | CONFIG_MLX4_INFINIBAND=m |
| 549 | CONFIG_MLX5_INFINIBAND=m | 555 | CONFIG_MLX5_INFINIBAND=m |
| 556 | CONFIG_SYNC_FILE=y | ||
| 550 | CONFIG_VFIO=m | 557 | CONFIG_VFIO=m |
| 551 | CONFIG_VFIO_PCI=m | 558 | CONFIG_VFIO_PCI=m |
| 552 | CONFIG_VFIO_MDEV=m | 559 | CONFIG_VFIO_MDEV=m |
| @@ -580,6 +587,8 @@ CONFIG_NILFS2_FS=m · 27 unmodified lines | |||
| 580 | CONFIG_FS_DAX=y | 587 | CONFIG_FS_DAX=y |
| 581 | CONFIG_EXPORTFS_BLOCK_OPS=y | 588 | CONFIG_EXPORTFS_BLOCK_OPS=y |
| 582 | CONFIG_FS_ENCRYPTION=y | 589 | CONFIG_FS_ENCRYPTION=y |
| 590 | CONFIG_FS_VERITY=y | ||
| 591 | CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y | ||
| 583 | CONFIG_FANOTIFY=y | 592 | CONFIG_FANOTIFY=y |
| 584 | CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y | 593 | CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y |
| 585 | CONFIG_QUOTA_NETLINK_INTERFACE=y | 594 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
| @@ -589,6 +598,7 @@ CONFIG_QFMT_V2=m · 3 unmodified lines | |||
| 589 | CONFIG_AUTOFS4_FS=m | 598 | CONFIG_AUTOFS4_FS=m |
| 590 | CONFIG_FUSE_FS=y | 599 | CONFIG_FUSE_FS=y |
| 591 | CONFIG_CUSE=m | 600 | CONFIG_CUSE=m |
| 601 | CONFIG_VIRTIO_FS=m | ||
| 592 | CONFIG_OVERLAY_FS=m | 602 | CONFIG_OVERLAY_FS=m |
| 593 | CONFIG_FSCACHE=m | 603 | CONFIG_FSCACHE=m |
| 594 | CONFIG_CACHEFILES=m | 604 | CONFIG_CACHEFILES=m |
| @@ -648,12 +658,15 @@ CONFIG_FORTIFY_SOURCE=y · 53 unmodified lines | |||
| 648 | CONFIG_SECURITY_SELINUX=y | 658 | CONFIG_SECURITY_SELINUX=y |
| 649 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y | 659 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y |
| 650 | CONFIG_SECURITY_SELINUX_DISABLE=y | 660 | CONFIG_SECURITY_SELINUX_DISABLE=y |
| 661 | CONFIG_SECURITY_LOCKDOWN_LSM=y | ||
| 662 | CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y | ||
| 651 | CONFIG_INTEGRITY_SIGNATURE=y | 663 | CONFIG_INTEGRITY_SIGNATURE=y |
| 652 | CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y | 664 | CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y |
| 653 | CONFIG_IMA=y | 665 | CONFIG_IMA=y |
| 654 | CONFIG_IMA_DEFAULT_HASH_SHA256=y | 666 | CONFIG_IMA_DEFAULT_HASH_SHA256=y |
| 655 | CONFIG_IMA_WRITE_POLICY=y | 667 | CONFIG_IMA_WRITE_POLICY=y |
| 656 | CONFIG_IMA_APPRAISE=y | 668 | CONFIG_IMA_APPRAISE=y |
| 669 | CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" | ||
| 657 | CONFIG_CRYPTO_USER=m | 670 | CONFIG_CRYPTO_USER=m |
| 658 | # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set | 671 | # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set |
| 659 | CONFIG_CRYPTO_PCRYPT=m | 672 | CONFIG_CRYPTO_PCRYPT=m |
| @@ -664,10 +677,6 @@ CONFIG_CRYPTO_ECDH=m · 4 unmodified lines | |||
| 664 | CONFIG_CRYPTO_ECRDSA=m | 677 | CONFIG_CRYPTO_ECRDSA=m |
| 665 | CONFIG_CRYPTO_CHACHA20POLY1305=m | 678 | CONFIG_CRYPTO_CHACHA20POLY1305=m |
| 666 | CONFIG_CRYPTO_AEGIS128=m | 679 | CONFIG_CRYPTO_AEGIS128=m |
| 667 | CONFIG_CRYPTO_AEGIS128L=m | ||
| 668 | CONFIG_CRYPTO_AEGIS256=m | ||
| 669 | CONFIG_CRYPTO_MORUS640=m | ||
| 670 | CONFIG_CRYPTO_MORUS1280=m | ||
| 671 | CONFIG_CRYPTO_CFB=m | 680 | CONFIG_CRYPTO_CFB=m |
| 672 | CONFIG_CRYPTO_LRW=m | 681 | CONFIG_CRYPTO_LRW=m |
| 673 | CONFIG_CRYPTO_PCBC=m | 682 | CONFIG_CRYPTO_PCBC=m |
| @@ -739,7 +748,6 @@ CONFIG_DEBUG_INFO=y · 65 unmodified lines | |||
| 739 | CONFIG_DEBUG_INFO_DWARF4=y | 748 | CONFIG_DEBUG_INFO_DWARF4=y |
| 740 | CONFIG_GDB_SCRIPTS=y | 749 | CONFIG_GDB_SCRIPTS=y |
| 741 | CONFIG_FRAME_WARN=1024 | 750 | CONFIG_FRAME_WARN=1024 |
| 742 | CONFIG_UNUSED_SYMBOLS=y | ||
| 743 | CONFIG_HEADERS_INSTALL=y | 751 | CONFIG_HEADERS_INSTALL=y |
| 744 | CONFIG_HEADERS_CHECK=y | 752 | CONFIG_HEADERS_CHECK=y |
| 745 | CONFIG_DEBUG_SECTION_MISMATCH=y | 753 | CONFIG_DEBUG_SECTION_MISMATCH=y |
| @@ -44,6 +44,7 @@ CONFIG_NUMA=y · 43 unmodified lines | |||
| 44 | # CONFIG_NUMA_EMU is not set | 44 | # CONFIG_NUMA_EMU is not set |
| 45 | CONFIG_HZ_100=y | 45 | CONFIG_HZ_100=y |
| 46 | CONFIG_KEXEC_FILE=y | 46 | CONFIG_KEXEC_FILE=y |
| 47 | CONFIG_KEXEC_SIG=y | ||
| 47 | CONFIG_EXPOLINE=y | 48 | CONFIG_EXPOLINE=y |
| 48 | CONFIG_EXPOLINE_AUTO=y | 49 | CONFIG_EXPOLINE_AUTO=y |
| 49 | CONFIG_CHSC_SCH=y | 50 | CONFIG_CHSC_SCH=y |
| @@ -66,11 +67,12 @@ CONFIG_MODULE_UNLOAD=y · 16 unmodified lines | |||
| 66 | CONFIG_MODULE_FORCE_UNLOAD=y | 67 | CONFIG_MODULE_FORCE_UNLOAD=y |
| 67 | CONFIG_MODVERSIONS=y | 68 | CONFIG_MODVERSIONS=y |
| 68 | CONFIG_MODULE_SRCVERSION_ALL=y | 69 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 69 | CONFIG_MODULE_SIG=y | ||
| 70 | CONFIG_MODULE_SIG_SHA256=y | 70 | CONFIG_MODULE_SIG_SHA256=y |
| 71 | CONFIG_UNUSED_SYMBOLS=y | ||
| 71 | CONFIG_BLK_DEV_THROTTLING=y | 72 | CONFIG_BLK_DEV_THROTTLING=y |
| 72 | CONFIG_BLK_WBT=y | 73 | CONFIG_BLK_WBT=y |
| 73 | CONFIG_BLK_CGROUP_IOLATENCY=y | 74 | CONFIG_BLK_CGROUP_IOLATENCY=y |
| 75 | CONFIG_BLK_CGROUP_IOCOST=y | ||
| 74 | CONFIG_PARTITION_ADVANCED=y | 76 | CONFIG_PARTITION_ADVANCED=y |
| 75 | CONFIG_IBM_PARTITION=y | 77 | CONFIG_IBM_PARTITION=y |
| 76 | CONFIG_BSD_DISKLABEL=y | 78 | CONFIG_BSD_DISKLABEL=y |
| @@ -363,6 +365,7 @@ CONFIG_NETLINK_DIAG=m · 286 unmodified lines | |||
| 363 | CONFIG_CGROUP_NET_PRIO=y | 365 | CONFIG_CGROUP_NET_PRIO=y |
| 364 | CONFIG_BPF_JIT=y | 366 | CONFIG_BPF_JIT=y |
| 365 | CONFIG_NET_PKTGEN=m | 367 | CONFIG_NET_PKTGEN=m |
| 368 | # CONFIG_NET_DROP_MONITOR is not set | ||
| 366 | CONFIG_PCI=y | 369 | CONFIG_PCI=y |
| 367 | CONFIG_HOTPLUG_PCI=y | 370 | CONFIG_HOTPLUG_PCI=y |
| 368 | CONFIG_HOTPLUG_PCI_S390=y | 371 | CONFIG_HOTPLUG_PCI_S390=y |
| @@ -418,6 +421,7 @@ CONFIG_DM_CRYPT=m · 49 unmodified lines | |||
| 418 | CONFIG_DM_SNAPSHOT=m | 421 | CONFIG_DM_SNAPSHOT=m |
| 419 | CONFIG_DM_THIN_PROVISIONING=m | 422 | CONFIG_DM_THIN_PROVISIONING=m |
| 420 | CONFIG_DM_WRITECACHE=m | 423 | CONFIG_DM_WRITECACHE=m |
| 424 | CONFIG_DM_CLONE=m | ||
| 421 | CONFIG_DM_MIRROR=m | 425 | CONFIG_DM_MIRROR=m |
| 422 | CONFIG_DM_LOG_USERSPACE=m | 426 | CONFIG_DM_LOG_USERSPACE=m |
| 423 | CONFIG_DM_RAID=m | 427 | CONFIG_DM_RAID=m |
| @@ -429,6 +433,7 @@ CONFIG_DM_DELAY=m · 5 unmodified lines | |||
| 429 | CONFIG_DM_UEVENT=y | 433 | CONFIG_DM_UEVENT=y |
| 430 | CONFIG_DM_FLAKEY=m | 434 | CONFIG_DM_FLAKEY=m |
| 431 | CONFIG_DM_VERITY=m | 435 | CONFIG_DM_VERITY=m |
| 436 | CONFIG_DM_VERITY_VERIFY_ROOTHASH_SIG=y | ||
| 432 | CONFIG_DM_SWITCH=m | 437 | CONFIG_DM_SWITCH=m |
| 433 | CONFIG_DM_INTEGRITY=m | 438 | CONFIG_DM_INTEGRITY=m |
| 434 | CONFIG_NETDEVICES=y | 439 | CONFIG_NETDEVICES=y |
| @@ -484,6 +489,7 @@ CONFIG_MLX5_CORE_EN=y · 49 unmodified lines | |||
| 484 | # CONFIG_NET_VENDOR_NVIDIA is not set | 489 | # CONFIG_NET_VENDOR_NVIDIA is not set |
| 485 | # CONFIG_NET_VENDOR_OKI is not set | 490 | # CONFIG_NET_VENDOR_OKI is not set |
| 486 | # CONFIG_NET_VENDOR_PACKET_ENGINES is not set | 491 | # CONFIG_NET_VENDOR_PACKET_ENGINES is not set |
| 492 | # CONFIG_NET_VENDOR_PENSANDO is not set | ||
| 487 | # CONFIG_NET_VENDOR_QLOGIC is not set | 493 | # CONFIG_NET_VENDOR_QLOGIC is not set |
| 488 | # CONFIG_NET_VENDOR_QUALCOMM is not set | 494 | # CONFIG_NET_VENDOR_QUALCOMM is not set |
| 489 | # CONFIG_NET_VENDOR_RDC is not set | 495 | # CONFIG_NET_VENDOR_RDC is not set |
| @@ -533,16 +539,16 @@ CONFIG_WATCHDOG_CORE=y · 43 unmodified lines | |||
| 533 | CONFIG_WATCHDOG_NOWAYOUT=y | 539 | CONFIG_WATCHDOG_NOWAYOUT=y |
| 534 | CONFIG_SOFT_WATCHDOG=m | 540 | CONFIG_SOFT_WATCHDOG=m |
| 535 | CONFIG_DIAG288_WATCHDOG=m | 541 | CONFIG_DIAG288_WATCHDOG=m |
| 536 | CONFIG_DRM=y | 542 | CONFIG_FB=y |
| 537 | CONFIG_DRM_VIRTIO_GPU=y | ||
| 538 | # CONFIG_BACKLIGHT_CLASS_DEVICE is not set | ||
| 539 | CONFIG_FRAMEBUFFER_CONSOLE=y | 543 | CONFIG_FRAMEBUFFER_CONSOLE=y |
| 544 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | ||
| 540 | # CONFIG_HID is not set | 545 | # CONFIG_HID is not set |
| 541 | # CONFIG_USB_SUPPORT is not set | 546 | # CONFIG_USB_SUPPORT is not set |
| 542 | CONFIG_INFINIBAND=m | 547 | CONFIG_INFINIBAND=m |
| 543 | CONFIG_INFINIBAND_USER_ACCESS=m | 548 | CONFIG_INFINIBAND_USER_ACCESS=m |
| 544 | CONFIG_MLX4_INFINIBAND=m | 549 | CONFIG_MLX4_INFINIBAND=m |
| 545 | CONFIG_MLX5_INFINIBAND=m | 550 | CONFIG_MLX5_INFINIBAND=m |
| 551 | CONFIG_SYNC_FILE=y | ||
| 546 | CONFIG_VFIO=m | 552 | CONFIG_VFIO=m |
| 547 | CONFIG_VFIO_PCI=m | 553 | CONFIG_VFIO_PCI=m |
| 548 | CONFIG_VFIO_MDEV=m | 554 | CONFIG_VFIO_MDEV=m |
| @@ -573,6 +579,8 @@ CONFIG_NILFS2_FS=m · 24 unmodified lines | |||
| 573 | CONFIG_FS_DAX=y | 579 | CONFIG_FS_DAX=y |
| 574 | CONFIG_EXPORTFS_BLOCK_OPS=y | 580 | CONFIG_EXPORTFS_BLOCK_OPS=y |
| 575 | CONFIG_FS_ENCRYPTION=y | 581 | CONFIG_FS_ENCRYPTION=y |
| 582 | CONFIG_FS_VERITY=y | ||
| 583 | CONFIG_FS_VERITY_BUILTIN_SIGNATURES=y | ||
| 576 | CONFIG_FANOTIFY=y | 584 | CONFIG_FANOTIFY=y |
| 577 | CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y | 585 | CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y |
| 578 | CONFIG_QUOTA_NETLINK_INTERFACE=y | 586 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
| @@ -581,6 +589,7 @@ CONFIG_QFMT_V2=m · 2 unmodified lines | |||
| 581 | CONFIG_AUTOFS4_FS=m | 589 | CONFIG_AUTOFS4_FS=m |
| 582 | CONFIG_FUSE_FS=y | 590 | CONFIG_FUSE_FS=y |
| 583 | CONFIG_CUSE=m | 591 | CONFIG_CUSE=m |
| 592 | CONFIG_VIRTIO_FS=m | ||
| 584 | CONFIG_OVERLAY_FS=m | 593 | CONFIG_OVERLAY_FS=m |
| 585 | CONFIG_FSCACHE=m | 594 | CONFIG_FSCACHE=m |
| 586 | CONFIG_CACHEFILES=m | 595 | CONFIG_CACHEFILES=m |
| @@ -639,12 +648,15 @@ CONFIG_SECURITY_NETWORK=y · 52 unmodified lines | |||
| 639 | CONFIG_SECURITY_SELINUX=y | 648 | CONFIG_SECURITY_SELINUX=y |
| 640 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y | 649 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y |
| 641 | CONFIG_SECURITY_SELINUX_DISABLE=y | 650 | CONFIG_SECURITY_SELINUX_DISABLE=y |
| 651 | CONFIG_SECURITY_LOCKDOWN_LSM=y | ||
| 652 | CONFIG_SECURITY_LOCKDOWN_LSM_EARLY=y | ||
| 642 | CONFIG_INTEGRITY_SIGNATURE=y | 653 | CONFIG_INTEGRITY_SIGNATURE=y |
| 643 | CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y | 654 | CONFIG_INTEGRITY_ASYMMETRIC_KEYS=y |
| 644 | CONFIG_IMA=y | 655 | CONFIG_IMA=y |
| 645 | CONFIG_IMA_DEFAULT_HASH_SHA256=y | 656 | CONFIG_IMA_DEFAULT_HASH_SHA256=y |
| 646 | CONFIG_IMA_WRITE_POLICY=y | 657 | CONFIG_IMA_WRITE_POLICY=y |
| 647 | CONFIG_IMA_APPRAISE=y | 658 | CONFIG_IMA_APPRAISE=y |
| 659 | CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor" | ||
| 648 | CONFIG_CRYPTO_FIPS=y | 660 | CONFIG_CRYPTO_FIPS=y |
| 649 | CONFIG_CRYPTO_USER=m | 661 | CONFIG_CRYPTO_USER=m |
| 650 | # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set | 662 | # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set |
| @@ -656,10 +668,6 @@ CONFIG_CRYPTO_ECDH=m · 5 unmodified lines | |||
| 656 | CONFIG_CRYPTO_ECRDSA=m | 668 | CONFIG_CRYPTO_ECRDSA=m |
| 657 | CONFIG_CRYPTO_CHACHA20POLY1305=m | 669 | CONFIG_CRYPTO_CHACHA20POLY1305=m |
| 658 | CONFIG_CRYPTO_AEGIS128=m | 670 | CONFIG_CRYPTO_AEGIS128=m |
| 659 | CONFIG_CRYPTO_AEGIS128L=m | ||
| 660 | CONFIG_CRYPTO_AEGIS256=m | ||
| 661 | CONFIG_CRYPTO_MORUS640=m | ||
| 662 | CONFIG_CRYPTO_MORUS1280=m | ||
| 663 | CONFIG_CRYPTO_CFB=m | 671 | CONFIG_CRYPTO_CFB=m |
| 664 | CONFIG_CRYPTO_LRW=m | 672 | CONFIG_CRYPTO_LRW=m |
| 665 | CONFIG_CRYPTO_OFB=m | 673 | CONFIG_CRYPTO_OFB=m |
| @@ -727,7 +735,6 @@ CONFIG_DEBUG_INFO=y · 61 unmodified lines | |||
| 727 | CONFIG_DEBUG_INFO_DWARF4=y | 735 | CONFIG_DEBUG_INFO_DWARF4=y |
| 728 | CONFIG_GDB_SCRIPTS=y | 736 | CONFIG_GDB_SCRIPTS=y |
| 729 | CONFIG_FRAME_WARN=1024 | 737 | CONFIG_FRAME_WARN=1024 |
| 730 | CONFIG_UNUSED_SYMBOLS=y | ||
| 731 | CONFIG_DEBUG_SECTION_MISMATCH=y | 738 | CONFIG_DEBUG_SECTION_MISMATCH=y |
| 732 | CONFIG_MAGIC_SYSRQ=y | 739 | CONFIG_MAGIC_SYSRQ=y |
| 733 | CONFIG_DEBUG_MEMORY_INIT=y | 740 | CONFIG_DEBUG_MEMORY_INIT=y |
| @@ -61,7 +61,7 @@ CONFIG_RAW_DRIVER=y · 60 unmodified lines | |||
| 61 | CONFIG_CONFIGFS_FS=y | 61 | CONFIG_CONFIGFS_FS=y |
| 62 | # CONFIG_MISC_FILESYSTEMS is not set | 62 | # CONFIG_MISC_FILESYSTEMS is not set |
| 63 | # CONFIG_NETWORK_FILESYSTEMS is not set | 63 | # CONFIG_NETWORK_FILESYSTEMS is not set |
| 64 | # CONFIG_DIMLIB is not set | 64 | CONFIG_LSM="yama,loadpin,safesetid,integrity" |
| 65 | CONFIG_PRINTK_TIME=y | 65 | CONFIG_PRINTK_TIME=y |
| 66 | CONFIG_DEBUG_INFO=y | 66 | CONFIG_DEBUG_INFO=y |
| 67 | CONFIG_DEBUG_FS=y | 67 | CONFIG_DEBUG_FS=y |
| @@ -41,7 +41,7 @@ __ATOMIC_OPS(__atomic64_xor, long, "laxg") · 40 unmodified lines | |||
| 41 | #undef __ATOMIC_OP | 41 | #undef __ATOMIC_OP |
| 42 | 42 | ||
| 43 | #define __ATOMIC_CONST_OP(op_name, op_type, op_string, op_barrier) \ | 43 | #define __ATOMIC_CONST_OP(op_name, op_type, op_string, op_barrier) \ |
| 44 | static inline void op_name(op_type val, op_type *ptr) \ | 44 | static __always_inline void op_name(op_type val, op_type *ptr) \ |
| 45 | { \ | 45 | { \ |
| 46 | asm volatile( \ | 46 | asm volatile( \ |
| 47 | op_string " %[ptr],%[val]\n" \ | 47 | op_string " %[ptr],%[val]\n" \ |
| @@ -56,7 +56,7 @@ __bitops_byte(unsigned long nr, volatile unsigned long *ptr) · 55 unmodified lines | |||
| 56 | return ((unsigned char *)ptr) + ((nr ^ (BITS_PER_LONG - 8)) >> 3); | 56 | return ((unsigned char *)ptr) + ((nr ^ (BITS_PER_LONG - 8)) >> 3); |
| 57 | } | 57 | } |
| 58 | 58 | ||
| 59 | static inline void arch_set_bit(unsigned long nr, volatile unsigned long *ptr) | 59 | static __always_inline void arch_set_bit(unsigned long nr, volatile unsigned long *ptr) |
| 60 | { | 60 | { |
| 61 | unsigned long *addr = __bitops_word(nr, ptr); | 61 | unsigned long *addr = __bitops_word(nr, ptr); |
| 62 | unsigned long mask; | 62 | unsigned long mask; |
| @@ -77,7 +77,7 @@ static inline void arch_set_bit(unsigned long nr, volatile unsigned long *ptr) · 14 unmodified lines | |||
| 77 | __atomic64_or(mask, (long *)addr); | 77 | __atomic64_or(mask, (long *)addr); |
| 78 | } | 78 | } |
| 79 | 79 | ||
| 80 | static inline void arch_clear_bit(unsigned long nr, volatile unsigned long *ptr) | 80 | static __always_inline void arch_clear_bit(unsigned long nr, volatile unsigned long *ptr) |
| 81 | { | 81 | { |
| 82 | unsigned long *addr = __bitops_word(nr, ptr); | 82 | unsigned long *addr = __bitops_word(nr, ptr); |
| 83 | unsigned long mask; | 83 | unsigned long mask; |
| @@ -98,8 +98,8 @@ static inline void arch_clear_bit(unsigned long nr, volatile unsigned long *ptr) · 14 unmodified lines | |||
| 98 | __atomic64_and(mask, (long *)addr); | 98 | __atomic64_and(mask, (long *)addr); |
| 99 | } | 99 | } |
| 100 | 100 | ||
| 101 | static inline void arch_change_bit(unsigned long nr, | 101 | static __always_inline void arch_change_bit(unsigned long nr, |
| 102 | volatile unsigned long *ptr) | 102 | volatile unsigned long *ptr) |
| 103 | { | 103 | { |
| 104 | unsigned long *addr = __bitops_word(nr, ptr); | 104 | unsigned long *addr = __bitops_word(nr, ptr); |
| 105 | unsigned long mask; | 105 | unsigned long mask; |
| @@ -171,7 +171,7 @@ typedef struct { unsigned char bytes[16]; } cpacf_mask_t; · 170 unmodified lines | |||
| 171 | * | 171 | * |
| 172 | * Returns 1 if @func is available for @opcode, 0 otherwise | 172 | * Returns 1 if @func is available for @opcode, 0 otherwise |
| 173 | */ | 173 | */ |
| 174 | static inline void __cpacf_query(unsigned int opcode, cpacf_mask_t *mask) | 174 | static __always_inline void __cpacf_query(unsigned int opcode, cpacf_mask_t *mask) |
| 175 | { | 175 | { |
| 176 | register unsigned long r0 asm("0") = 0; /* query function */ | 176 | register unsigned long r0 asm("0") = 0; /* query function */ |
| 177 | register unsigned long r1 asm("1") = (unsigned long) mask; | 177 | register unsigned long r1 asm("1") = (unsigned long) mask; |
| @@ -28,6 +28,8 @@ asm(".include \"asm/cpu_mf-insn.h\"\n"); · 27 unmodified lines | |||
| 28 | CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \ | 28 | CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \ |
| 29 | CPU_MF_INT_SF_LSDA) | 29 | CPU_MF_INT_SF_LSDA) |
| 30 | 30 | ||
| 31 | #define CPU_MF_SF_RIBM_NOTAV 0x1 /* Sampling unavailable */ | ||
| 32 | |||
| 31 | /* CPU measurement facility support */ | 33 | /* CPU measurement facility support */ |
| 32 | static inline int cpum_cf_avail(void) | 34 | static inline int cpum_cf_avail(void) |
| 33 | { | 35 | { |
| @@ -69,7 +71,8 @@ struct hws_qsi_info_block { /* Bit(s) */ · 35 unmodified lines | |||
| 69 | unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/ | 71 | unsigned long max_sampl_rate; /* 16-23: maximum sampling interval*/ |
| 70 | unsigned long tear; /* 24-31: TEAR contents */ | 72 | unsigned long tear; /* 24-31: TEAR contents */ |
| 71 | unsigned long dear; /* 32-39: DEAR contents */ | 73 | unsigned long dear; /* 32-39: DEAR contents */ |
| 72 | unsigned int rsvrd0; /* 40-43: reserved */ | 74 | unsigned int rsvrd0:24; /* 40-42: reserved */ |
| 75 | unsigned int ribm:8; /* 43: Reserved by IBM */ | ||
| 73 | unsigned int cpu_speed; /* 44-47: CPU speed */ | 76 | unsigned int cpu_speed; /* 44-47: CPU speed */ |
| 74 | unsigned long long rsvrd1; /* 48-55: reserved */ | 77 | unsigned long long rsvrd1; /* 48-55: reserved */ |
| 75 | unsigned long long rsvrd2; /* 56-63: reserved */ | 78 | unsigned long long rsvrd2; /* 56-63: reserved */ |
| @@ -220,7 +223,8 @@ enum stcctm_ctr_set { · 144 unmodified lines | |||
| 220 | MT_DIAG = 5, | 223 | MT_DIAG = 5, |
| 221 | MT_DIAG_CLEARING = 9, /* clears loss-of-MT-ctr-data alert */ | 224 | MT_DIAG_CLEARING = 9, /* clears loss-of-MT-ctr-data alert */ |
| 222 | }; | 225 | }; |
| 223 | static inline int stcctm(enum stcctm_ctr_set set, u64 range, u64 *dest) | 226 | |
| 227 | static __always_inline int stcctm(enum stcctm_ctr_set set, u64 range, u64 *dest) | ||
| 224 | { | 228 | { |
| 225 | int cc; | 229 | int cc; |
| 226 | 230 | ||
| @@ -12,8 +12,6 @@ · 11 unmodified lines | |||
| 12 | #include <asm/page.h> | 12 | #include <asm/page.h> |
| 13 | #include <asm/pgtable.h> | 13 | #include <asm/pgtable.h> |
| 14 | 14 | ||
| 15 | |||
| 16 | #define is_hugepage_only_range(mm, addr, len) 0 | ||
| 17 | #define hugetlb_free_pgd_range free_pgd_range | 15 | #define hugetlb_free_pgd_range free_pgd_range |
| 18 | #define hugepages_supported() (MACHINE_HAS_EDAT1) | 16 | #define hugepages_supported() (MACHINE_HAS_EDAT1) |
| 19 | 17 | ||
| @@ -23,6 +21,13 @@ pte_t huge_ptep_get(pte_t *ptep); · 3 unmodified lines | |||
| 23 | pte_t huge_ptep_get_and_clear(struct mm_struct *mm, | 21 | pte_t huge_ptep_get_and_clear(struct mm_struct *mm, |
| 24 | unsigned long addr, pte_t *ptep); | 22 | unsigned long addr, pte_t *ptep); |
| 25 | 23 | ||
| 24 | static inline bool is_hugepage_only_range(struct mm_struct *mm, | ||
| 25 | unsigned long addr, | ||
| 26 | unsigned long len) | ||
| 27 | { | ||
| 28 | return false; | ||
| 29 | } | ||
| 30 | |||
| 26 | /* | 31 | /* |
| 27 | * If the arch doesn't supply something else, assume that hugepage | 32 | * If the arch doesn't supply something else, assume that hugepage |
| 28 | * size aligned regions are ok without further preparation. | 33 | * size aligned regions are ok without further preparation. |
| @@ -20,7 +20,7 @@ · 19 unmodified lines | |||
| 20 | * We use a brcl 0,2 instruction for jump labels at compile time so it | 20 | * We use a brcl 0,2 instruction for jump labels at compile time so it |
| 21 | * can be easily distinguished from a hotpatch generated instruction. | 21 | * can be easily distinguished from a hotpatch generated instruction. |
| 22 | */ | 22 | */ |
| 23 | static inline bool arch_static_branch(struct static_key *key, bool branch) | 23 | static __always_inline bool arch_static_branch(struct static_key *key, bool branch) |
| 24 | { | 24 | { |
| 25 | asm_volatile_goto("0: brcl 0,"__stringify(JUMP_LABEL_NOP_OFFSET)"\n" | 25 | asm_volatile_goto("0: brcl 0,"__stringify(JUMP_LABEL_NOP_OFFSET)"\n" |
| 26 | ".pushsection __jump_table,\"aw\"\n" | 26 | ".pushsection __jump_table,\"aw\"\n" |
| @@ -34,7 +34,7 @@ label: · 7 unmodified lines | |||
| 34 | return true; | 34 | return true; |
| 35 | } | 35 | } |
| 36 | 36 | ||
| 37 | static inline bool arch_static_branch_jump(struct static_key *key, bool branch) | 37 | static __always_inline bool arch_static_branch_jump(struct static_key *key, bool branch) |
| 38 | { | 38 | { |
| 39 | asm_volatile_goto("0: brcl 15,%l[label]\n" | 39 | asm_volatile_goto("0: brcl 15,%l[label]\n" |
| 40 | ".pushsection __jump_table,\"aw\"\n" | 40 | ".pushsection __jump_table,\"aw\"\n" |
| @@ -997,9 +997,9 @@ static inline pte_t pte_mkhuge(pte_t pte) · 996 unmodified lines | |||
| 997 | #define IPTE_NODAT 0x400 | 997 | #define IPTE_NODAT 0x400 |
| 998 | #define IPTE_GUEST_ASCE 0x800 | 998 | #define IPTE_GUEST_ASCE 0x800 |
| 999 | 999 | ||
| 1000 | static inline void __ptep_ipte(unsigned long address, pte_t *ptep, | 1000 | static __always_inline void __ptep_ipte(unsigned long address, pte_t *ptep, |
| 1001 | unsigned long opt, unsigned long asce, | 1001 | unsigned long opt, unsigned long asce, |
| 1002 | int local) | 1002 | int local) |
| 1003 | { | 1003 | { |
| 1004 | unsigned long pto = (unsigned long) ptep; | 1004 | unsigned long pto = (unsigned long) ptep; |
| 1005 | 1005 | ||
| @@ -1020,8 +1020,8 @@ static inline void __ptep_ipte(unsigned long address, pte_t *ptep, · 14 unmodified lines | |||
| 1020 | : [r1] "a" (pto), [m4] "i" (local) : "memory"); | 1020 | : [r1] "a" (pto), [m4] "i" (local) : "memory"); |
| 1021 | } | 1021 | } |
| 1022 | 1022 | ||
| 1023 | static inline void __ptep_ipte_range(unsigned long address, int nr, | 1023 | static __always_inline void __ptep_ipte_range(unsigned long address, int nr, |
| 1024 | pte_t *ptep, int local) | 1024 | pte_t *ptep, int local) |
| 1025 | { | 1025 | { |
| 1026 | unsigned long pto = (unsigned long) ptep; | 1026 | unsigned long pto = (unsigned long) ptep; |
| 1027 | 1027 | ||
| @@ -1269,7 +1269,8 @@ static inline pte_t *pte_offset(pmd_t *pmd, unsigned long address) · 241 unmodified lines | |||
| 1269 | 1269 | ||
| 1270 | #define pte_offset_kernel(pmd, address) pte_offset(pmd, address) | 1270 | #define pte_offset_kernel(pmd, address) pte_offset(pmd, address) |
| 1271 | #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address) | 1271 | #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address) |
| 1272 | #define pte_unmap(pte) do { } while (0) | 1272 | |
| 1273 | static inline void pte_unmap(pte_t *pte) { } | ||
| 1273 | 1274 | ||
| 1274 | static inline bool gup_fast_permitted(unsigned long start, unsigned long end) | 1275 | static inline bool gup_fast_permitted(unsigned long start, unsigned long end) |
| 1275 | { | 1276 | { |
| @@ -1435,9 +1436,9 @@ static inline void __pmdp_csp(pmd_t *pmdp) · 159 unmodified lines | |||
| 1435 | #define IDTE_NODAT 0x1000 | 1436 | #define IDTE_NODAT 0x1000 |
| 1436 | #define IDTE_GUEST_ASCE 0x2000 | 1437 | #define IDTE_GUEST_ASCE 0x2000 |
| 1437 | 1438 | ||
| 1438 | static inline void __pmdp_idte(unsigned long addr, pmd_t *pmdp, | 1439 | static __always_inline void __pmdp_idte(unsigned long addr, pmd_t *pmdp, |
| 1439 | unsigned long opt, unsigned long asce, | 1440 | unsigned long opt, unsigned long asce, |
| 1440 | int local) | 1441 | int local) |
| 1441 | { | 1442 | { |
| 1442 | unsigned long sto; | 1443 | unsigned long sto; |
| 1443 | 1444 | ||
| @@ -1461,9 +1462,9 @@ static inline void __pmdp_idte(unsigned long addr, pmd_t *pmdp, · 17 unmodified lines | |||
| 1461 | } | 1462 | } |
| 1462 | } | 1463 | } |
| 1463 | 1464 | ||
| 1464 | static inline void __pudp_idte(unsigned long addr, pud_t *pudp, | 1465 | static __always_inline void __pudp_idte(unsigned long addr, pud_t *pudp, |
| 1465 | unsigned long opt, unsigned long asce, | 1466 | unsigned long opt, unsigned long asce, |
| 1466 | int local) | 1467 | int local) |
| 1467 | { | 1468 | { |
| 1468 | unsigned long r3o; | 1469 | unsigned long r3o; |
| 1469 | 1470 | ||
| @@ -111,7 +111,7 @@ struct qib { · 110 unmodified lines | |||
| 111 | /* private: */ | 111 | /* private: */ |
| 112 | u8 res[88]; | 112 | u8 res[88]; |
| 113 | /* public: */ | 113 | /* public: */ |
| 114 | u8 parm[QDIO_MAX_BUFFERS_PER_Q]; | 114 | u8 parm[128]; |
| 115 | } __attribute__ ((packed, aligned(256))); | 115 | } __attribute__ ((packed, aligned(256))); |
| 116 | 116 | ||
| 117 | /** | 117 | /** |
| @@ -83,7 +83,7 @@ raw_copy_to_user(void __user *to, const void *from, unsigned long n); · 82 unmodified lines | |||
| 83 | __rc; \ | 83 | __rc; \ |
| 84 | }) | 84 | }) |
| 85 | 85 | ||
| 86 | static inline int __put_user_fn(void *x, void __user *ptr, unsigned long size) | 86 | static __always_inline int __put_user_fn(void *x, void __user *ptr, unsigned long size) |
| 87 | { | 87 | { |
| 88 | unsigned long spec = 0x010000UL; | 88 | unsigned long spec = 0x010000UL; |
| 89 | int rc; | 89 | int rc; |
| @@ -113,7 +113,7 @@ static inline int __put_user_fn(void *x, void __user *ptr, unsigned long size) · 23 unmodified lines | |||
| 113 | return rc; | 113 | return rc; |
| 114 | } | 114 | } |
| 115 | 115 | ||
| 116 | static inline int __get_user_fn(void *x, const void __user *ptr, unsigned long size) | 116 | static __always_inline int __get_user_fn(void *x, const void __user *ptr, unsigned long size) |
| 117 | { | 117 | { |
| 118 | unsigned long spec = 0x01UL; | 118 | unsigned long spec = 0x01UL; |
| 119 | int rc; | 119 | int rc; |
| @@ -390,7 +390,7 @@ static size_t cf_diag_getctrset(struct cf_ctrset_entry *ctrdata, int ctrset, · 389 unmodified lines | |||
| 390 | 390 | ||
| 391 | debug_sprintf_event(cf_diag_dbg, 6, | 391 | debug_sprintf_event(cf_diag_dbg, 6, |
| 392 | "%s ctrset %d ctrset_size %zu cfvn %d csvn %d" | 392 | "%s ctrset %d ctrset_size %zu cfvn %d csvn %d" |
| 393 | " need %zd rc:%d\n", | 393 | " need %zd rc %d\n", |
| 394 | __func__, ctrset, ctrset_size, cpuhw->info.cfvn, | 394 | __func__, ctrset, ctrset_size, cpuhw->info.cfvn, |
| 395 | cpuhw->info.csvn, need, rc); | 395 | cpuhw->info.csvn, need, rc); |
| 396 | return need; | 396 | return need; |
| @@ -567,7 +567,7 @@ static int cf_diag_add(struct perf_event *event, int flags) · 170 unmodified lines | |||
| 567 | int err = 0; | 567 | int err = 0; |
| 568 | 568 | ||
| 569 | debug_sprintf_event(cf_diag_dbg, 5, | 569 | debug_sprintf_event(cf_diag_dbg, 5, |
| 570 | "%s event %p cpu %d flags %#x cpuhw:%p\n", | 570 | "%s event %p cpu %d flags %#x cpuhw %p\n", |
| 571 | __func__, event, event->cpu, flags, cpuhw); | 571 | __func__, event, event->cpu, flags, cpuhw); |
| 572 | 572 | ||
| 573 | if (cpuhw->flags & PMU_F_IN_USE) { | 573 | if (cpuhw->flags & PMU_F_IN_USE) { |
| @@ -803,6 +803,12 @@ static int __hw_perf_event_init(struct perf_event *event) · 802 unmodified lines | |||
| 803 | goto out; | 803 | goto out; |
| 804 | } | 804 | } |
| 805 | 805 | ||
| 806 | if (si.ribm & CPU_MF_SF_RIBM_NOTAV) { | ||
| 807 | pr_warn("CPU Measurement Facility sampling is temporarily not available\n"); | ||
| 808 | err = -EBUSY; | ||
| 809 | goto out; | ||
| 810 | } | ||
| 811 | |||
| 806 | /* Always enable basic sampling */ | 812 | /* Always enable basic sampling */ |
| 807 | SAMPL_FLAGS(hwc) = PERF_CPUM_SF_BASIC_MODE; | 813 | SAMPL_FLAGS(hwc) = PERF_CPUM_SF_BASIC_MODE; |
| 808 | 814 | ||
| @@ -895,7 +901,7 @@ static int cpumsf_pmu_event_init(struct perf_event *event) · 86 unmodified lines | |||
| 895 | 901 | ||
| 896 | /* Check online status of the CPU to which the event is pinned */ | 902 | /* Check online status of the CPU to which the event is pinned */ |
| 897 | if (event->cpu >= 0 && !cpu_online(event->cpu)) | 903 | if (event->cpu >= 0 && !cpu_online(event->cpu)) |
| 898 | return -ENODEV; | 904 | return -ENODEV; |
| 899 | 905 | ||
| 900 | /* Force reset of idle/hv excludes regardless of what the | 906 | /* Force reset of idle/hv excludes regardless of what the |
| 901 | * user requested. | 907 | * user requested. |
| @@ -332,7 +332,7 @@ static inline int plo_test_bit(unsigned char nr) · 331 unmodified lines | |||
| 332 | return cc == 0; | 332 | return cc == 0; |
| 333 | } | 333 | } |
| 334 | 334 | ||
| 335 | static inline void __insn32_query(unsigned int opcode, u8 query[32]) | 335 | static __always_inline void __insn32_query(unsigned int opcode, u8 *query) |
| 336 | { | 336 | { |
| 337 | register unsigned long r0 asm("0") = 0; /* query function */ | 337 | register unsigned long r0 asm("0") = 0; /* query function */ |
| 338 | register unsigned long r1 asm("1") = (unsigned long) query; | 338 | register unsigned long r1 asm("1") = (unsigned long) query; |
| @@ -340,9 +340,9 @@ static inline void __insn32_query(unsigned int opcode, u8 query[32]) · 1 unmodified line | |||
| 340 | asm volatile( | 340 | asm volatile( |
| 341 | /* Parameter regs are ignored */ | 341 | /* Parameter regs are ignored */ |
| 342 | " .insn rrf,%[opc] << 16,2,4,6,0\n" | 342 | " .insn rrf,%[opc] << 16,2,4,6,0\n" |
| 343 | : "=m" (*query) | 343 | : |
| 344 | : "d" (r0), "a" (r1), [opc] "i" (opcode) | 344 | : "d" (r0), "a" (r1), [opc] "i" (opcode) |
| 345 | : "cc"); | 345 | : "cc", "memory"); |
| 346 | } | 346 | } |
| 347 | 347 | ||
| 348 | #define INSN_SORTL 0xb938 | 348 | #define INSN_SORTL 0xb938 |
| @@ -66,7 +66,7 @@ static inline int clp_get_ilp(unsigned long *ilp) · 65 unmodified lines | |||
| 66 | /* | 66 | /* |
| 67 | * Call Logical Processor with c=0, the give constant lps and an lpcb request. | 67 | * Call Logical Processor with c=0, the give constant lps and an lpcb request. |
| 68 | */ | 68 | */ |
| 69 | static inline int clp_req(void *data, unsigned int lps) | 69 | static __always_inline int clp_req(void *data, unsigned int lps) |
| 70 | { | 70 | { |
| 71 | struct { u8 _[CLP_BLK_SIZE]; } *req = data; | 71 | struct { u8 _[CLP_BLK_SIZE]; } *req = data; |
| 72 | u64 ignored; | 72 | u64 ignored; |
| @@ -29,7 +29,6 @@ config SPARC · 28 unmodified lines | |||
| 29 | select RTC_DRV_M48T59 | 29 | select RTC_DRV_M48T59 |
| 30 | select RTC_SYSTOHC | 30 | select RTC_SYSTOHC |
| 31 | select HAVE_ARCH_JUMP_LABEL if SPARC64 | 31 | select HAVE_ARCH_JUMP_LABEL if SPARC64 |
| 32 | select HAVE_FAST_GUP if SPARC64 | ||
| 33 | select GENERIC_IRQ_SHOW | 32 | select GENERIC_IRQ_SHOW |
| 34 | select ARCH_WANT_IPC_PARSE_VERSION | 33 | select ARCH_WANT_IPC_PARSE_VERSION |
| 35 | select GENERIC_PCI_IOMAP | 34 | select GENERIC_PCI_IOMAP |
| @@ -20,30 +20,6 @@ · 19 unmodified lines | |||
| 20 | */ | 20 | */ |
| 21 | struct mem_vector immovable_mem[MAX_NUMNODES*2]; | 21 | struct mem_vector immovable_mem[MAX_NUMNODES*2]; |
| 22 | 22 | ||
| 23 | /* | ||
| 24 | * Max length of 64-bit hex address string is 19, prefix "0x" + 16 hex | ||
| 25 | * digits, and '\0' for termination. | ||
| 26 | */ | ||
| 27 | #define MAX_ADDR_LEN 19 | ||
| 28 | |||
| 29 | static acpi_physical_address get_cmdline_acpi_rsdp(void) | ||
| 30 | { | ||
| 31 | acpi_physical_address addr = 0; | ||
| 32 | |||
| 33 | #ifdef CONFIG_KEXEC | ||
| 34 | char val[MAX_ADDR_LEN] = { }; | ||
| 35 | int ret; | ||
| 36 | |||
| 37 | ret = cmdline_find_option("acpi_rsdp", val, MAX_ADDR_LEN); | ||
| 38 | if (ret < 0) | ||
| 39 | return 0; | ||
| 40 | |||
| 41 | if (kstrtoull(val, 16, &addr)) | ||
| 42 | return 0; | ||
| 43 | #endif | ||
| 44 | return addr; | ||
| 45 | } | ||
| 46 | |||
| 47 | /* | 23 | /* |
| 48 | * Search EFI system tables for RSDP. If both ACPI_20_TABLE_GUID and | 24 | * Search EFI system tables for RSDP. If both ACPI_20_TABLE_GUID and |
| 49 | * ACPI_TABLE_GUID are found, take the former, which has more features. | 25 | * ACPI_TABLE_GUID are found, take the former, which has more features. |
| @@ -298,6 +274,30 @@ acpi_physical_address get_rsdp_addr(void) · 248 unmodified lines | |||
| 298 | } | 274 | } |
| 299 | 275 | ||
| 300 | #if defined(CONFIG_RANDOMIZE_BASE) && defined(CONFIG_MEMORY_HOTREMOVE) | 276 | #if defined(CONFIG_RANDOMIZE_BASE) && defined(CONFIG_MEMORY_HOTREMOVE) |
| 277 | /* | ||
| 278 | * Max length of 64-bit hex address string is 19, prefix "0x" + 16 hex | ||
| 279 | * digits, and '\0' for termination. | ||
| 280 | */ | ||
| 281 | #define MAX_ADDR_LEN 19 | ||
| 282 | |||
| 283 | static acpi_physical_address get_cmdline_acpi_rsdp(void) | ||
| 284 | { | ||
| 285 | acpi_physical_address addr = 0; | ||
| 286 | |||
| 287 | #ifdef CONFIG_KEXEC | ||
| 288 | char val[MAX_ADDR_LEN] = { }; | ||
| 289 | int ret; | ||
| 290 | |||
| 291 | ret = cmdline_find_option("acpi_rsdp", val, MAX_ADDR_LEN); | ||
| 292 | if (ret < 0) | ||
| 293 | return 0; | ||
| 294 | |||
| 295 | if (kstrtoull(val, 16, &addr)) | ||
| 296 | return 0; | ||
| 297 | #endif | ||
| 298 | return addr; | ||
| 299 | } | ||
| 300 | |||
| 301 | /* Compute SRAT address from RSDP. */ | 301 | /* Compute SRAT address from RSDP. */ |
| 302 | static unsigned long get_acpi_srat_table(void) | 302 | static unsigned long get_acpi_srat_table(void) |
| 303 | { | 303 | { |
| @@ -345,6 +345,7 @@ asmlinkage __visible void *extract_kernel(void *rmode, memptr heap, · 344 unmodified lines | |||
| 345 | { | 345 | { |
| 346 | const unsigned long kernel_total_size = VO__end - VO__text; | 346 | const unsigned long kernel_total_size = VO__end - VO__text; |
| 347 | unsigned long virt_addr = LOAD_PHYSICAL_ADDR; | 347 | unsigned long virt_addr = LOAD_PHYSICAL_ADDR; |
| 348 | unsigned long needed_size; | ||
| 348 | 349 | ||
| 349 | /* Retain x86 boot parameters pointer passed from startup_32/64. */ | 350 | /* Retain x86 boot parameters pointer passed from startup_32/64. */ |
| 350 | boot_params = rmode; | 351 | boot_params = rmode; |
| @@ -379,26 +380,38 @@ asmlinkage __visible void *extract_kernel(void *rmode, memptr heap, · 28 unmodified lines | |||
| 379 | free_mem_ptr = heap; /* Heap */ | 380 | free_mem_ptr = heap; /* Heap */ |
| 380 | free_mem_end_ptr = heap + BOOT_HEAP_SIZE; | 381 | free_mem_end_ptr = heap + BOOT_HEAP_SIZE; |
| 381 | 382 | ||
| 383 | /* | ||
| 384 | * The memory hole needed for the kernel is the larger of either | ||
| 385 | * the entire decompressed kernel plus relocation table, or the | ||
| 386 | * entire decompressed kernel plus .bss and .brk sections. | ||
| 387 | * | ||
| 388 | * On X86_64, the memory is mapped with PMD pages. Round the | ||
| 389 | * size up so that the full extent of PMD pages mapped is | ||
| 390 | * included in the check against the valid memory table | ||
| 391 | * entries. This ensures the full mapped area is usable RAM | ||
| 392 | * and doesn't include any reserved areas. | ||
| 393 | */ | ||
| 394 | needed_size = max(output_len, kernel_total_size); | ||
| 395 | #ifdef CONFIG_X86_64 | ||
| 396 | needed_size = ALIGN(needed_size, MIN_KERNEL_ALIGN); | ||
| 397 | #endif | ||
| 398 | |||
| 382 | /* Report initial kernel position details. */ | 399 | /* Report initial kernel position details. */ |
| 383 | debug_putaddr(input_data); | 400 | debug_putaddr(input_data); |
| 384 | debug_putaddr(input_len); | 401 | debug_putaddr(input_len); |
| 385 | debug_putaddr(output); | 402 | debug_putaddr(output); |
| 386 | debug_putaddr(output_len); | 403 | debug_putaddr(output_len); |
| 387 | debug_putaddr(kernel_total_size); | 404 | debug_putaddr(kernel_total_size); |
| 405 | debug_putaddr(needed_size); | ||
| 388 | 406 | ||
| 389 | #ifdef CONFIG_X86_64 | 407 | #ifdef CONFIG_X86_64 |
| 390 | /* Report address of 32-bit trampoline */ | 408 | /* Report address of 32-bit trampoline */ |
| 391 | debug_putaddr(trampoline_32bit); | 409 | debug_putaddr(trampoline_32bit); |
| 392 | #endif | 410 | #endif |
| 393 | 411 | ||
| 394 | /* | ||
| 395 | * The memory hole needed for the kernel is the larger of either | ||
| 396 | * the entire decompressed kernel plus relocation table, or the | ||
| 397 | * entire decompressed kernel plus .bss and .brk sections. | ||
| 398 | */ | ||
| 399 | choose_random_location((unsigned long)input_data, input_len, | 412 | choose_random_location((unsigned long)input_data, input_len, |
| 400 | (unsigned long *)&output, | 413 | (unsigned long *)&output, |
| 401 | max(output_len, kernel_total_size), | 414 | needed_size, |
| 402 | &virt_addr); | 415 | &virt_addr); |
| 403 | 416 | ||
| 404 | /* Validate memory location choices. */ | 417 | /* Validate memory location choices. */ |
| @@ -5,12 +5,14 @@ · 4 unmodified lines | |||
| 5 | #include <linux/init.h> | 5 | #include <linux/init.h> |
| 6 | #include <linux/slab.h> | 6 | #include <linux/slab.h> |
| 7 | #include <linux/delay.h> | 7 | #include <linux/delay.h> |
| 8 | #include <linux/jiffies.h> | ||
| 8 | #include <asm/apicdef.h> | 9 | #include <asm/apicdef.h> |
| 9 | #include <asm/nmi.h> | 10 | #include <asm/nmi.h> |
| 10 | 11 | ||
| 11 | #include "../perf_event.h" | 12 | #include "../perf_event.h" |
| 12 | 13 | ||
| 13 | static DEFINE_PER_CPU(unsigned int, perf_nmi_counter); | 14 | static DEFINE_PER_CPU(unsigned long, perf_nmi_tstamp); |
| 15 | static unsigned long perf_nmi_window; | ||
| 14 | 16 | ||
| 15 | static __initconst const u64 amd_hw_cache_event_ids | 17 | static __initconst const u64 amd_hw_cache_event_ids |
| 16 | [PERF_COUNT_HW_CACHE_MAX] | 18 | [PERF_COUNT_HW_CACHE_MAX] |
| @@ -641,11 +643,12 @@ static void amd_pmu_disable_event(struct perf_event *event) · 624 unmodified lines | |||
| 641 | * handler when multiple PMCs are active or PMC overflow while handling some | 643 | * handler when multiple PMCs are active or PMC overflow while handling some |
| 642 | * other source of an NMI. | 644 | * other source of an NMI. |
| 643 | * | 645 | * |
| 644 | * Attempt to mitigate this by using the number of active PMCs to determine | 646 | * Attempt to mitigate this by creating an NMI window in which un-handled NMIs |
| 645 | * whether to return NMI_HANDLED if the perf NMI handler did not handle/reset | 647 | * received during this window will be claimed. This prevents extending the |
| 646 | * any PMCs. The per-CPU perf_nmi_counter variable is set to a minimum of the | 648 | * window past when it is possible that latent NMIs should be received. The |
| 647 | * number of active PMCs or 2. The value of 2 is used in case an NMI does not | 649 | * per-CPU perf_nmi_tstamp will be set to the window end time whenever perf has |
| 648 | * arrive at the LAPIC in time to be collapsed into an already pending NMI. | 650 | * handled a counter. When an un-handled NMI is received, it will be claimed |
| 651 | * only if arriving within that window. | ||
| 649 | */ | 652 | */ |
| 650 | static int amd_pmu_handle_irq(struct pt_regs *regs) | 653 | static int amd_pmu_handle_irq(struct pt_regs *regs) |
| 651 | { | 654 | { |
| @@ -663,21 +666,19 @@ static int amd_pmu_handle_irq(struct pt_regs *regs) · 11 unmodified lines | |||
| 663 | handled = x86_pmu_handle_irq(regs); | 666 | handled = x86_pmu_handle_irq(regs); |
| 664 | 667 | ||
| 665 | /* | 668 | /* |
| 666 | * If a counter was handled, record the number of possible remaining | 669 | * If a counter was handled, record a timestamp such that un-handled |
| 667 | * NMIs that can occur. | 670 | * NMIs will be claimed if arriving within that window. |
| 668 | */ | 671 | */ |
| 669 | if (handled) { | 672 | if (handled) { |
| 670 | this_cpu_write(perf_nmi_counter, | 673 | this_cpu_write(perf_nmi_tstamp, |
| 671 | min_t(unsigned int, 2, active)); | 674 | jiffies + perf_nmi_window); |
| 672 | 675 | ||
| 673 | return handled; | 676 | return handled; |
| 674 | } | 677 | } |
| 675 | 678 | ||
| 676 | if (!this_cpu_read(perf_nmi_counter)) | 679 | if (time_after(jiffies, this_cpu_read(perf_nmi_tstamp))) |
| 677 | return NMI_DONE; | 680 | return NMI_DONE; |
| 678 | 681 | ||
| 679 | this_cpu_dec(perf_nmi_counter); | ||
| 680 | |||
| 681 | return NMI_HANDLED; | 682 | return NMI_HANDLED; |
| 682 | } | 683 | } |
| 683 | 684 | ||
| @@ -909,6 +910,9 @@ static int __init amd_core_pmu_init(void) · 225 unmodified lines | |||
| 909 | if (!boot_cpu_has(X86_FEATURE_PERFCTR_CORE)) | 910 | if (!boot_cpu_has(X86_FEATURE_PERFCTR_CORE)) |
| 910 | return 0; | 911 | return 0; |
| 911 | 912 | ||
| 913 | /* Avoid calulating the value each time in the NMI handler */ | ||
| 914 | perf_nmi_window = msecs_to_jiffies(100); | ||
| 915 | |||
| 912 | switch (boot_cpu_data.x86) { | 916 | switch (boot_cpu_data.x86) { |
| 913 | case 0x15: | 917 | case 0x15: |
| 914 | pr_cont("Fam15h "); | 918 | pr_cont("Fam15h "); |
| @@ -4983,6 +4983,8 @@ __init int intel_pmu_init(void) · 4982 unmodified lines | |||
| 4983 | case INTEL_FAM6_SKYLAKE: | 4983 | case INTEL_FAM6_SKYLAKE: |
| 4984 | case INTEL_FAM6_KABYLAKE_L: | 4984 | case INTEL_FAM6_KABYLAKE_L: |
| 4985 | case INTEL_FAM6_KABYLAKE: | 4985 | case INTEL_FAM6_KABYLAKE: |
| 4986 | case INTEL_FAM6_COMETLAKE_L: | ||
| 4987 | case INTEL_FAM6_COMETLAKE: | ||
| 4986 | x86_add_quirk(intel_pebs_isolation_quirk); | 4988 | x86_add_quirk(intel_pebs_isolation_quirk); |
| 4987 | x86_pmu.late_ack = true; | 4989 | x86_pmu.late_ack = true; |
| 4988 | memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids)); | 4990 | memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids)); |
| @@ -5031,6 +5033,8 @@ __init int intel_pmu_init(void) · 42 unmodified lines | |||
| 5031 | /* fall through */ | 5033 | /* fall through */ |
| 5032 | case INTEL_FAM6_ICELAKE_L: | 5034 | case INTEL_FAM6_ICELAKE_L: |
| 5033 | case INTEL_FAM6_ICELAKE: | 5035 | case INTEL_FAM6_ICELAKE: |
| 5036 | case INTEL_FAM6_TIGERLAKE_L: | ||
| 5037 | case INTEL_FAM6_TIGERLAKE: | ||
| 5034 | x86_pmu.late_ack = true; | 5038 | x86_pmu.late_ack = true; |
| 5035 | memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids)); | 5039 | memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids)); |
| 5036 | memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs)); | 5040 | memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs)); |
| @@ -45,46 +45,49 @@ · 44 unmodified lines | |||
| 45 | * MSR_CORE_C3_RESIDENCY: CORE C3 Residency Counter | 45 | * MSR_CORE_C3_RESIDENCY: CORE C3 Residency Counter |
| 46 | * perf code: 0x01 | 46 | * perf code: 0x01 |
| 47 | * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,GLM, | 47 | * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,GLM, |
| 48 | CNL | 48 | * CNL,KBL,CML |
| 49 | * Scope: Core | 49 | * Scope: Core |
| 50 | * MSR_CORE_C6_RESIDENCY: CORE C6 Residency Counter | 50 | * MSR_CORE_C6_RESIDENCY: CORE C6 Residency Counter |
| 51 | * perf code: 0x02 | 51 | * perf code: 0x02 |
| 52 | * Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW, | 52 | * Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW, |
| 53 | * SKL,KNL,GLM,CNL | 53 | * SKL,KNL,GLM,CNL,KBL,CML,ICL,TGL |
| 54 | * Scope: Core | 54 | * Scope: Core |
| 55 | * MSR_CORE_C7_RESIDENCY: CORE C7 Residency Counter | 55 | * MSR_CORE_C7_RESIDENCY: CORE C7 Residency Counter |
| 56 | * perf code: 0x03 | 56 | * perf code: 0x03 |
| 57 | * Available model: SNB,IVB,HSW,BDW,SKL,CNL | 57 | * Available model: SNB,IVB,HSW,BDW,SKL,CNL,KBL,CML, |
| 58 | * ICL,TGL | ||
| 58 | * Scope: Core | 59 | * Scope: Core |
| 59 | * MSR_PKG_C2_RESIDENCY: Package C2 Residency Counter. | 60 | * MSR_PKG_C2_RESIDENCY: Package C2 Residency Counter. |
| 60 | * perf code: 0x00 | 61 | * perf code: 0x00 |
| 61 | * Available model: SNB,IVB,HSW,BDW,SKL,KNL,GLM,CNL | 62 | * Available model: SNB,IVB,HSW,BDW,SKL,KNL,GLM,CNL, |
| 63 | * KBL,CML,ICL,TGL | ||
| 62 | * Scope: Package (physical package) | 64 | * Scope: Package (physical package) |
| 63 | * MSR_PKG_C3_RESIDENCY: Package C3 Residency Counter. | 65 | * MSR_PKG_C3_RESIDENCY: Package C3 Residency Counter. |
| 64 | * perf code: 0x01 | 66 | * perf code: 0x01 |
| 65 | * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,KNL, | 67 | * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,KNL, |
| 66 | * GLM,CNL | 68 | * GLM,CNL,KBL,CML,ICL,TGL |
| 67 | * Scope: Package (physical package) | 69 | * Scope: Package (physical package) |
| 68 | * MSR_PKG_C6_RESIDENCY: Package C6 Residency Counter. | 70 | * MSR_PKG_C6_RESIDENCY: Package C6 Residency Counter. |
| 69 | * perf code: 0x02 | 71 | * perf code: 0x02 |
| 70 | * Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW | 72 | * Available model: SLM,AMT,NHM,WSM,SNB,IVB,HSW,BDW |
| 71 | * SKL,KNL,GLM,CNL | 73 | * SKL,KNL,GLM,CNL,KBL,CML,ICL,TGL |
| 72 | * Scope: Package (physical package) | 74 | * Scope: Package (physical package) |
| 73 | * MSR_PKG_C7_RESIDENCY: Package C7 Residency Counter. | 75 | * MSR_PKG_C7_RESIDENCY: Package C7 Residency Counter. |
| 74 | * perf code: 0x03 | 76 | * perf code: 0x03 |
| 75 | * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,CNL | 77 | * Available model: NHM,WSM,SNB,IVB,HSW,BDW,SKL,CNL, |
| 78 | * KBL,CML,ICL,TGL | ||
| 76 | * Scope: Package (physical package) | 79 | * Scope: Package (physical package) |
| 77 | * MSR_PKG_C8_RESIDENCY: Package C8 Residency Counter. | 80 | * MSR_PKG_C8_RESIDENCY: Package C8 Residency Counter. |
| 78 | * perf code: 0x04 | 81 | * perf code: 0x04 |
| 79 | * Available model: HSW ULT,KBL,CNL | 82 | * Available model: HSW ULT,KBL,CNL,CML,ICL,TGL |
| 80 | * Scope: Package (physical package) | 83 | * Scope: Package (physical package) |
| 81 | * MSR_PKG_C9_RESIDENCY: Package C9 Residency Counter. | 84 | * MSR_PKG_C9_RESIDENCY: Package C9 Residency Counter. |
| 82 | * perf code: 0x05 | 85 | * perf code: 0x05 |
| 83 | * Available model: HSW ULT,KBL,CNL | 86 | * Available model: HSW ULT,KBL,CNL,CML,ICL,TGL |
| 84 | * Scope: Package (physical package) | 87 | * Scope: Package (physical package) |
| 85 | * MSR_PKG_C10_RESIDENCY: Package C10 Residency Counter. | 88 | * MSR_PKG_C10_RESIDENCY: Package C10 Residency Counter. |
| 86 | * perf code: 0x06 | 89 | * perf code: 0x06 |
| 87 | * Available model: HSW ULT,KBL,GLM,CNL | 90 | * Available model: HSW ULT,KBL,GLM,CNL,CML,ICL,TGL |
| 88 | * Scope: Package (physical package) | 91 | * Scope: Package (physical package) |
| 89 | * | 92 | * |
| 90 | */ | 93 | */ |
| @@ -544,6 +547,19 @@ static const struct cstate_model cnl_cstates __initconst = { · 453 unmodified lines | |||
| 544 | BIT(PERF_CSTATE_PKG_C10_RES), | 547 | BIT(PERF_CSTATE_PKG_C10_RES), |
| 545 | }; | 548 | }; |
| 546 | 549 | ||
| 550 | static const struct cstate_model icl_cstates __initconst = { | ||
| 551 | .core_events = BIT(PERF_CSTATE_CORE_C6_RES) | | ||
| 552 | BIT(PERF_CSTATE_CORE_C7_RES), | ||
| 553 | |||
| 554 | .pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) | | ||
| 555 | BIT(PERF_CSTATE_PKG_C3_RES) | | ||
| 556 | BIT(PERF_CSTATE_PKG_C6_RES) | | ||
| 557 | BIT(PERF_CSTATE_PKG_C7_RES) | | ||
| 558 | BIT(PERF_CSTATE_PKG_C8_RES) | | ||
| 559 | BIT(PERF_CSTATE_PKG_C9_RES) | | ||
| 560 | BIT(PERF_CSTATE_PKG_C10_RES), | ||
| 561 | }; | ||
| 562 | |||
| 547 | static const struct cstate_model slm_cstates __initconst = { | 563 | static const struct cstate_model slm_cstates __initconst = { |
| 548 | .core_events = BIT(PERF_CSTATE_CORE_C1_RES) | | 564 | .core_events = BIT(PERF_CSTATE_CORE_C1_RES) | |
| 549 | BIT(PERF_CSTATE_CORE_C6_RES), | 565 | BIT(PERF_CSTATE_CORE_C6_RES), |
| @@ -614,6 +630,8 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { · 64 unmodified lines | |||
| 614 | 630 | ||
| 615 | X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_L, hswult_cstates), | 631 | X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE_L, hswult_cstates), |
| 616 | X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE, hswult_cstates), | 632 | X86_CSTATES_MODEL(INTEL_FAM6_KABYLAKE, hswult_cstates), |
| 633 | X86_CSTATES_MODEL(INTEL_FAM6_COMETLAKE_L, hswult_cstates), | ||
| 634 | X86_CSTATES_MODEL(INTEL_FAM6_COMETLAKE, hswult_cstates), | ||
| 617 | 635 | ||
| 618 | X86_CSTATES_MODEL(INTEL_FAM6_CANNONLAKE_L, cnl_cstates), | 636 | X86_CSTATES_MODEL(INTEL_FAM6_CANNONLAKE_L, cnl_cstates), |
| 619 | 637 | ||
| @@ -625,8 +643,10 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = { · 5 unmodified lines | |||
| 625 | 643 | ||
| 626 | X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_PLUS, glm_cstates), | 644 | X86_CSTATES_MODEL(INTEL_FAM6_ATOM_GOLDMONT_PLUS, glm_cstates), |
| 627 | 645 | ||
| 628 | X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_L, snb_cstates), | 646 | X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE_L, icl_cstates), |
| 629 | X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE, snb_cstates), | 647 | X86_CSTATES_MODEL(INTEL_FAM6_ICELAKE, icl_cstates), |
| 648 | X86_CSTATES_MODEL(INTEL_FAM6_TIGERLAKE_L, icl_cstates), | ||
| 649 | X86_CSTATES_MODEL(INTEL_FAM6_TIGERLAKE, icl_cstates), | ||
| 630 | { }, | 650 | { }, |
| 631 | }; | 651 | }; |
| 632 | MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match); | 652 | MODULE_DEVICE_TABLE(x86cpu, intel_cstates_match); |
| @@ -89,7 +89,14 @@ static bool test_intel(int idx, void *data) · 88 unmodified lines | |||
| 89 | case INTEL_FAM6_SKYLAKE_X: | 89 | case INTEL_FAM6_SKYLAKE_X: |
| 90 | case INTEL_FAM6_KABYLAKE_L: | 90 | case INTEL_FAM6_KABYLAKE_L: |
| 91 | case INTEL_FAM6_KABYLAKE: | 91 | case INTEL_FAM6_KABYLAKE: |
| 92 | case INTEL_FAM6_COMETLAKE_L: | ||
| 93 | case INTEL_FAM6_COMETLAKE: | ||
| 92 | case INTEL_FAM6_ICELAKE_L: | 94 | case INTEL_FAM6_ICELAKE_L: |
| 95 | case INTEL_FAM6_ICELAKE: | ||
| 96 | case INTEL_FAM6_ICELAKE_X: | ||
| 97 | case INTEL_FAM6_ICELAKE_D: | ||
| 98 | case INTEL_FAM6_TIGERLAKE_L: | ||
| 99 | case INTEL_FAM6_TIGERLAKE: | ||
| 93 | if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF) | 100 | if (idx == PERF_MSR_SMI || idx == PERF_MSR_PPERF) |
| 94 | return true; | 101 | return true; |
| 95 | break; | 102 | break; |
| @@ -260,11 +260,21 @@ void __init hv_apic_init(void) · 259 unmodified lines | |||
| 260 | } | 260 | } |
| 261 | 261 | ||
| 262 | if (ms_hyperv.hints & HV_X64_APIC_ACCESS_RECOMMENDED) { | 262 | if (ms_hyperv.hints & HV_X64_APIC_ACCESS_RECOMMENDED) { |
| 263 | pr_info("Hyper-V: Using MSR based APIC access\n"); | 263 | pr_info("Hyper-V: Using enlightened APIC (%s mode)", |
| 264 | x2apic_enabled() ? "x2apic" : "xapic"); | ||
| 265 | /* | ||
| 266 | * With x2apic, architectural x2apic MSRs are equivalent to the | ||
| 267 | * respective synthetic MSRs, so there's no need to override | ||
| 268 | * the apic accessors. The only exception is | ||
| 269 | * hv_apic_eoi_write, because it benefits from lazy EOI when | ||
| 270 | * available, but it works for both xapic and x2apic modes. | ||
| 271 | */ | ||
| 264 | apic_set_eoi_write(hv_apic_eoi_write); | 272 | apic_set_eoi_write(hv_apic_eoi_write); |
| 265 | apic->read = hv_apic_read; | 273 | if (!x2apic_enabled()) { |
| 266 | apic->write = hv_apic_write; | 274 | apic->read = hv_apic_read; |
| 267 | apic->icr_write = hv_apic_icr_write; | 275 | apic->write = hv_apic_write; |
| 268 | apic->icr_read = hv_apic_icr_read; | 276 | apic->icr_write = hv_apic_icr_write; |
| 277 | apic->icr_read = hv_apic_icr_read; | ||
| 278 | } | ||
| 269 | } | 279 | } |
| 270 | } | 280 | } |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | 2 | ||
| 3 | #ifndef _ASM_X86_CPU_ENTRY_AREA_H | 3 | #ifndef _ASM_X86_CPU_ENTRY_AREA_H |
| 4 | #define _ASM_X86_CPU_ENTRY_AREA_H | 4 | #define _ASM_X86_CPU_ENTRY_AREA_H |
| @@ -83,6 +83,9 @@ · 82 unmodified lines | |||
| 83 | #define INTEL_FAM6_TIGERLAKE_L 0x8C | 83 | #define INTEL_FAM6_TIGERLAKE_L 0x8C |
| 84 | #define INTEL_FAM6_TIGERLAKE 0x8D | 84 | #define INTEL_FAM6_TIGERLAKE 0x8D |
| 85 | 85 | ||
| 86 | #define INTEL_FAM6_COMETLAKE 0xA5 | ||
| 87 | #define INTEL_FAM6_COMETLAKE_L 0xA6 | ||
| 88 | |||
| 86 | /* "Small Core" Processors (Atom) */ | 89 | /* "Small Core" Processors (Atom) */ |
| 87 | 90 | ||
| 88 | #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ | 91 | #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */ |
| @@ -219,13 +219,6 @@ enum { · 218 unmodified lines | |||
| 219 | PFERR_WRITE_MASK | \ | 219 | PFERR_WRITE_MASK | \ |
| 220 | PFERR_PRESENT_MASK) | 220 | PFERR_PRESENT_MASK) |
| 221 | 221 | ||
| 222 | /* | ||
| 223 | * The mask used to denote special SPTEs, which can be either MMIO SPTEs or | ||
| 224 | * Access Tracking SPTEs. We use bit 62 instead of bit 63 to avoid conflicting | ||
| 225 | * with the SVE bit in EPT PTEs. | ||
| 226 | */ | ||
| 227 | #define SPTE_SPECIAL_MASK (1ULL << 62) | ||
| 228 | |||
| 229 | /* apic attention bits */ | 222 | /* apic attention bits */ |
| 230 | #define KVM_APIC_CHECK_VAPIC 0 | 223 | #define KVM_APIC_CHECK_VAPIC 0 |
| 231 | /* | 224 | /* |
| @@ -21,7 +21,7 @@ · 20 unmodified lines | |||
| 21 | #define MWAIT_ECX_INTERRUPT_BREAK 0x1 | 21 | #define MWAIT_ECX_INTERRUPT_BREAK 0x1 |
| 22 | #define MWAITX_ECX_TIMER_ENABLE BIT(1) | 22 | #define MWAITX_ECX_TIMER_ENABLE BIT(1) |
| 23 | #define MWAITX_MAX_LOOPS ((u32)-1) | 23 | #define MWAITX_MAX_LOOPS ((u32)-1) |
| 24 | #define MWAITX_DISABLE_CSTATES 0xf | 24 | #define MWAITX_DISABLE_CSTATES 0xf0 |
| 25 | 25 | ||
| 26 | static inline void __monitor(const void *eax, unsigned long ecx, | 26 | static inline void __monitor(const void *eax, unsigned long ecx, |
| 27 | unsigned long edx) | 27 | unsigned long edx) |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef _ASM_X86_PTI_H | 2 | #ifndef _ASM_X86_PTI_H |
| 3 | #define _ASM_X86_PTI_H | 3 | #define _ASM_X86_PTI_H |
| 4 | #ifndef __ASSEMBLY__ | 4 | #ifndef __ASSEMBLY__ |
| @@ -734,5 +734,28 @@ do { \ · 733 unmodified lines | |||
| 734 | if (unlikely(__gu_err)) goto err_label; \ | 734 | if (unlikely(__gu_err)) goto err_label; \ |
| 735 | } while (0) | 735 | } while (0) |
| 736 | 736 | ||
| 737 | /* | ||
| 738 | * We want the unsafe accessors to always be inlined and use | ||
| 739 | * the error labels - thus the macro games. | ||
| 740 | */ | ||
| 741 | #define unsafe_copy_loop(dst, src, len, type, label) \ | ||
| 742 | while (len >= sizeof(type)) { \ | ||
| 743 | unsafe_put_user(*(type *)src,(type __user *)dst,label); \ | ||
| 744 | dst += sizeof(type); \ | ||
| 745 | src += sizeof(type); \ | ||
| 746 | len -= sizeof(type); \ | ||
| 747 | } | ||
| 748 | |||
| 749 | #define unsafe_copy_to_user(_dst,_src,_len,label) \ | ||
| 750 | do { \ | ||
| 751 | char __user *__ucu_dst = (_dst); \ | ||
| 752 | const char *__ucu_src = (_src); \ | ||
| 753 | size_t __ucu_len = (_len); \ | ||
| 754 | unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u64, label); \ | ||
| 755 | unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u32, label); \ | ||
| 756 | unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u16, label); \ | ||
| 757 | unsafe_copy_loop(__ucu_dst, __ucu_src, __ucu_len, u8, label); \ | ||
| 758 | } while (0) | ||
| 759 | |||
| 737 | #endif /* _ASM_X86_UACCESS_H */ | 760 | #endif /* _ASM_X86_UACCESS_H */ |
| 738 | 761 | ||
| @@ -156,7 +156,8 @@ static int x2apic_dead_cpu(unsigned int dead_cpu) · 155 unmodified lines | |||
| 156 | { | 156 | { |
| 157 | struct cluster_mask *cmsk = per_cpu(cluster_masks, dead_cpu); | 157 | struct cluster_mask *cmsk = per_cpu(cluster_masks, dead_cpu); |
| 158 | 158 | ||
| 159 | cpumask_clear_cpu(dead_cpu, &cmsk->mask); | 159 | if (cmsk) |
| 160 | cpumask_clear_cpu(dead_cpu, &cmsk->mask); | ||
| 160 | free_cpumask_var(per_cpu(ipi_mask, dead_cpu)); | 161 | free_cpumask_var(per_cpu(ipi_mask, dead_cpu)); |
| 161 | return 0; | 162 | return 0; |
| 162 | } | 163 | } |
| @@ -216,6 +216,10 @@ static void __init ms_hyperv_init_platform(void) · 215 unmodified lines | |||
| 216 | int hv_host_info_ecx; | 216 | int hv_host_info_ecx; |
| 217 | int hv_host_info_edx; | 217 | int hv_host_info_edx; |
| 218 | 218 | ||
| 219 | #ifdef CONFIG_PARAVIRT | ||
| 220 | pv_info.name = "Hyper-V"; | ||
| 221 | #endif | ||
| 222 | |||
| 219 | /* | 223 | /* |
| 220 | * Extract the features and hints | 224 | * Extract the features and hints |
| 221 | */ | 225 | */ |
| @@ -49,7 +49,7 @@ · 48 unmodified lines | |||
| 49 | #define VMWARE_CMD_VCPU_RESERVED 31 | 49 | #define VMWARE_CMD_VCPU_RESERVED 31 |
| 50 | 50 | ||
| 51 | #define VMWARE_PORT(cmd, eax, ebx, ecx, edx) \ | 51 | #define VMWARE_PORT(cmd, eax, ebx, ecx, edx) \ |
| 52 | __asm__("inl (%%dx)" : \ | 52 | __asm__("inl (%%dx), %%eax" : \ |
| 53 | "=a"(eax), "=c"(ecx), "=d"(edx), "=b"(ebx) : \ | 53 | "=a"(eax), "=c"(ecx), "=d"(edx), "=b"(ebx) : \ |
| 54 | "a"(VMWARE_HYPERVISOR_MAGIC), \ | 54 | "a"(VMWARE_HYPERVISOR_MAGIC), \ |
| 55 | "c"(VMWARE_CMD_##cmd), \ | 55 | "c"(VMWARE_CMD_##cmd), \ |
| @@ -222,13 +222,31 @@ unsigned long __head __startup_64(unsigned long physaddr, · 221 unmodified lines | |||
| 222 | * we might write invalid pmds, when the kernel is relocated | 222 | * we might write invalid pmds, when the kernel is relocated |
| 223 | * cleanup_highmap() fixes this up along with the mappings | 223 | * cleanup_highmap() fixes this up along with the mappings |
| 224 | * beyond _end. | 224 | * beyond _end. |
| 225 | * | ||
| 226 | * Only the region occupied by the kernel image has so far | ||
| 227 | * been checked against the table of usable memory regions | ||
| 228 | * provided by the firmware, so invalidate pages outside that | ||
| 229 | * region. A page table entry that maps to a reserved area of | ||
| 230 | * memory would allow processor speculation into that area, | ||
| 231 | * and on some hardware (particularly the UV platform) even | ||
| 232 | * speculative access to some reserved areas is caught as an | ||
| 233 | * error, causing the BIOS to halt the system. | ||
| 225 | */ | 234 | */ |
| 226 | 235 | ||
| 227 | pmd = fixup_pointer(level2_kernel_pgt, physaddr); | 236 | pmd = fixup_pointer(level2_kernel_pgt, physaddr); |
| 228 | for (i = 0; i < PTRS_PER_PMD; i++) { | 237 | |
| 238 | /* invalidate pages before the kernel image */ | ||
| 239 | for (i = 0; i < pmd_index((unsigned long)_text); i++) | ||
| 240 | pmd[i] &= ~_PAGE_PRESENT; | ||
| 241 | |||
| 242 | /* fixup pages that are part of the kernel image */ | ||
| 243 | for (; i <= pmd_index((unsigned long)_end); i++) | ||
| 229 | if (pmd[i] & _PAGE_PRESENT) | 244 | if (pmd[i] & _PAGE_PRESENT) |
| 230 | pmd[i] += load_delta; | 245 | pmd[i] += load_delta; |
| 231 | } | 246 | |
| 247 | /* invalidate pages after the kernel image */ | ||
| 248 | for (; i < PTRS_PER_PMD; i++) | ||
| 249 | pmd[i] &= ~_PAGE_PRESENT; | ||
| 232 | 250 | ||
| 233 | /* | 251 | /* |
| 234 | * Fixup phys_base - remove the memory encryption mask to obtain | 252 | * Fixup phys_base - remove the memory encryption mask to obtain |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | // | 2 | // |
| 3 | // Code shared between 32 and 64 bit | 3 | // Code shared between 32 and 64 bit |
| 4 | 4 | ||
| @@ -485,6 +485,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function, · 484 unmodified lines | |||
| 485 | 485 | ||
| 486 | /* cpuid 0x80000008.ebx */ | 486 | /* cpuid 0x80000008.ebx */ |
| 487 | const u32 kvm_cpuid_8000_0008_ebx_x86_features = | 487 | const u32 kvm_cpuid_8000_0008_ebx_x86_features = |
| 488 | F(CLZERO) | F(XSAVEERPTR) | | ||
| 488 | F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) | | 489 | F(WBNOINVD) | F(AMD_IBPB) | F(AMD_IBRS) | F(AMD_SSBD) | F(VIRT_SSBD) | |
| 489 | F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON); | 490 | F(AMD_SSB_NO) | F(AMD_STIBP) | F(AMD_STIBP_ALWAYS_ON); |
| 490 | 491 | ||
| @@ -618,16 +619,20 @@ static inline int __do_cpuid_func(struct kvm_cpuid_entry2 *entry, u32 function, · 127 unmodified lines | |||
| 618 | */ | 619 | */ |
| 619 | case 0x1f: | 620 | case 0x1f: |
| 620 | case 0xb: { | 621 | case 0xb: { |
| 621 | int i, level_type; | 622 | int i; |
| 622 | 623 | ||
| 623 | /* read more entries until level_type is zero */ | 624 | /* |
| 624 | for (i = 1; ; ++i) { | 625 | * We filled in entry[0] for CPUID(EAX=<function>, |
| 626 | * ECX=00H) above. If its level type (ECX[15:8]) is | ||
| 627 | * zero, then the leaf is unimplemented, and we're | ||
| 628 | * done. Otherwise, continue to populate entries | ||
| 629 | * until the level type (ECX[15:8]) of the previously | ||
| 630 | * added entry is zero. | ||
| 631 | */ | ||
| 632 | for (i = 1; entry[i - 1].ecx & 0xff00; ++i) { | ||
| 625 | if (*nent >= maxnent) | 633 | if (*nent >= maxnent) |
| 626 | goto out; | 634 | goto out; |
| 627 | 635 | ||
| 628 | level_type = entry[i - 1].ecx & 0xff00; | ||
| 629 | if (!level_type) | ||
| 630 | break; | ||
| 631 | do_host_cpuid(&entry[i], function, i); | 636 | do_host_cpuid(&entry[i], function, i); |
| 632 | ++*nent; | 637 | ++*nent; |
| 633 | } | 638 | } |
| @@ -969,53 +974,66 @@ struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu, · 335 unmodified lines | |||
| 969 | EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry); | 974 | EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry); |
| 970 | 975 | ||
| 971 | /* | 976 | /* |
| 972 | * If no match is found, check whether we exceed the vCPU's limit | 977 | * If the basic or extended CPUID leaf requested is higher than the |
| 973 | * and return the content of the highest valid _standard_ leaf instead. | 978 | * maximum supported basic or extended leaf, respectively, then it is |
| 974 | * This is to satisfy the CPUID specification. | 979 | * out of range. |
| 975 | */ | 980 | */ |
| 976 | static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu, | 981 | static bool cpuid_function_in_range(struct kvm_vcpu *vcpu, u32 function) |
| 977 | u32 function, u32 index) | ||
| 978 | { | 982 | { |
| 979 | struct kvm_cpuid_entry2 *maxlevel; | 983 | struct kvm_cpuid_entry2 *max; |
| 980 | 984 | ||
| 981 | maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0); | 985 | max = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0); |
| 982 | if (!maxlevel || maxlevel->eax >= function) | 986 | return max && function <= max->eax; |
| 983 | return NULL; | ||
| 984 | if (function & 0x80000000) { | ||
| 985 | maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0); | ||
| 986 | if (!maxlevel) | ||
| 987 | return NULL; | ||
| 988 | } | ||
| 989 | return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index); | ||
| 990 | } | 987 | } |
| 991 | 988 | ||
| 992 | bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, | 989 | bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, |
| 993 | u32 *ecx, u32 *edx, bool check_limit) | 990 | u32 *ecx, u32 *edx, bool check_limit) |
| 994 | { | 991 | { |
| 995 | u32 function = *eax, index = *ecx; | 992 | u32 function = *eax, index = *ecx; |
| 996 | struct kvm_cpuid_entry2 *best; | 993 | struct kvm_cpuid_entry2 *entry; |
| 997 | bool entry_found = true; | 994 | struct kvm_cpuid_entry2 *max; |
| 998 | 995 | bool found; | |
| 999 | best = kvm_find_cpuid_entry(vcpu, function, index); | ||
| 1000 | |||
| 1001 | if (!best) { | ||
| 1002 | entry_found = false; | ||
| 1003 | if (!check_limit) | ||
| 1004 | goto out; | ||
| 1005 | 996 | ||
| 1006 | best = check_cpuid_limit(vcpu, function, index); | 997 | entry = kvm_find_cpuid_entry(vcpu, function, index); |
| 998 | found = entry; | ||
| 999 | /* | ||
| 1000 | * Intel CPUID semantics treats any query for an out-of-range | ||
| 1001 | * leaf as if the highest basic leaf (i.e. CPUID.0H:EAX) were | ||
| 1002 | * requested. AMD CPUID semantics returns all zeroes for any | ||
| 1003 | * undefined leaf, whether or not the leaf is in range. | ||
| 1004 | */ | ||
| 1005 | if (!entry && check_limit && !guest_cpuid_is_amd(vcpu) && | ||
| 1006 | !cpuid_function_in_range(vcpu, function)) { | ||
| 1007 | max = kvm_find_cpuid_entry(vcpu, 0, 0); | ||
| 1008 | if (max) { | ||
| 1009 | function = max->eax; | ||
| 1010 | entry = kvm_find_cpuid_entry(vcpu, function, index); | ||
| 1011 | } | ||
| 1007 | } | 1012 | } |
| 1008 | 1013 | if (entry) { | |
| 1009 | out: | 1014 | *eax = entry->eax; |
| 1010 | if (best) { | 1015 | *ebx = entry->ebx; |
| 1011 | *eax = best->eax; | 1016 | *ecx = entry->ecx; |
| 1012 | *ebx = best->ebx; | 1017 | *edx = entry->edx; |
| 1013 | *ecx = best->ecx; | 1018 | } else { |
| 1014 | *edx = best->edx; | ||
| 1015 | } else | ||
| 1016 | *eax = *ebx = *ecx = *edx = 0; | 1019 | *eax = *ebx = *ecx = *edx = 0; |
| 1017 | trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, entry_found); | 1020 | /* |
| 1018 | return entry_found; | 1021 | * When leaf 0BH or 1FH is defined, CL is pass-through |
| 1022 | * and EDX is always the x2APIC ID, even for undefined | ||
| 1023 | * subleaves. Index 1 will exist iff the leaf is | ||
| 1024 | * implemented, so we pass through CL iff leaf 1 | ||
| 1025 | * exists. EDX can be copied from any existing index. | ||
| 1026 | */ | ||
| 1027 | if (function == 0xb || function == 0x1f) { | ||
| 1028 | entry = kvm_find_cpuid_entry(vcpu, function, 1); | ||
| 1029 | if (entry) { | ||
| 1030 | *ecx = index & 0xff; | ||
| 1031 | *edx = entry->edx; | ||
| 1032 | } | ||
| 1033 | } | ||
| 1034 | } | ||
| 1035 | trace_kvm_cpuid(function, *eax, *ebx, *ecx, *edx, found); | ||
| 1036 | return found; | ||
| 1019 | } | 1037 | } |
| 1020 | EXPORT_SYMBOL_GPL(kvm_cpuid); | 1038 | EXPORT_SYMBOL_GPL(kvm_cpuid); |
| 1021 | 1039 | ||
| @@ -66,9 +66,10 @@ · 65 unmodified lines | |||
| 66 | #define X2APIC_BROADCAST 0xFFFFFFFFul | 66 | #define X2APIC_BROADCAST 0xFFFFFFFFul |
| 67 | 67 | ||
| 68 | static bool lapic_timer_advance_dynamic __read_mostly; | 68 | static bool lapic_timer_advance_dynamic __read_mostly; |
| 69 | #define LAPIC_TIMER_ADVANCE_ADJUST_MIN 100 | 69 | #define LAPIC_TIMER_ADVANCE_ADJUST_MIN 100 /* clock cycles */ |
| 70 | #define LAPIC_TIMER_ADVANCE_ADJUST_MAX 5000 | 70 | #define LAPIC_TIMER_ADVANCE_ADJUST_MAX 10000 /* clock cycles */ |
| 71 | #define LAPIC_TIMER_ADVANCE_ADJUST_INIT 1000 | 71 | #define LAPIC_TIMER_ADVANCE_NS_INIT 1000 |
| 72 | #define LAPIC_TIMER_ADVANCE_NS_MAX 5000 | ||
| 72 | /* step-by-step approximation to mitigate fluctuation */ | 73 | /* step-by-step approximation to mitigate fluctuation */ |
| 73 | #define LAPIC_TIMER_ADVANCE_ADJUST_STEP 8 | 74 | #define LAPIC_TIMER_ADVANCE_ADJUST_STEP 8 |
| 74 | 75 | ||
| @@ -1504,8 +1505,8 @@ static inline void adjust_lapic_timer_advance(struct kvm_vcpu *vcpu, · 1429 unmodified lines | |||
| 1504 | timer_advance_ns += ns/LAPIC_TIMER_ADVANCE_ADJUST_STEP; | 1505 | timer_advance_ns += ns/LAPIC_TIMER_ADVANCE_ADJUST_STEP; |
| 1505 | } | 1506 | } |
| 1506 | 1507 | ||
| 1507 | if (unlikely(timer_advance_ns > LAPIC_TIMER_ADVANCE_ADJUST_MAX)) | 1508 | if (unlikely(timer_advance_ns > LAPIC_TIMER_ADVANCE_NS_MAX)) |
| 1508 | timer_advance_ns = LAPIC_TIMER_ADVANCE_ADJUST_INIT; | 1509 | timer_advance_ns = LAPIC_TIMER_ADVANCE_NS_INIT; |
| 1509 | apic->lapic_timer.timer_advance_ns = timer_advance_ns; | 1510 | apic->lapic_timer.timer_advance_ns = timer_advance_ns; |
| 1510 | } | 1511 | } |
| 1511 | 1512 | ||
| @@ -2302,7 +2303,7 @@ int kvm_create_lapic(struct kvm_vcpu *vcpu, int timer_advance_ns) · 790 unmodified lines | |||
| 2302 | HRTIMER_MODE_ABS_HARD); | 2303 | HRTIMER_MODE_ABS_HARD); |
| 2303 | apic->lapic_timer.timer.function = apic_timer_fn; | 2304 | apic->lapic_timer.timer.function = apic_timer_fn; |
| 2304 | if (timer_advance_ns == -1) { | 2305 | if (timer_advance_ns == -1) { |
| 2305 | apic->lapic_timer.timer_advance_ns = LAPIC_TIMER_ADVANCE_ADJUST_INIT; | 2306 | apic->lapic_timer.timer_advance_ns = LAPIC_TIMER_ADVANCE_NS_INIT; |
| 2306 | lapic_timer_advance_dynamic = true; | 2307 | lapic_timer_advance_dynamic = true; |
| 2307 | } else { | 2308 | } else { |
| 2308 | apic->lapic_timer.timer_advance_ns = timer_advance_ns; | 2309 | apic->lapic_timer.timer_advance_ns = timer_advance_ns; |
| @@ -83,7 +83,17 @@ module_param(dbg, bool, 0644); · 82 unmodified lines | |||
| 83 | #define PTE_PREFETCH_NUM 8 | 83 | #define PTE_PREFETCH_NUM 8 |
| 84 | 84 | ||
| 85 | #define PT_FIRST_AVAIL_BITS_SHIFT 10 | 85 | #define PT_FIRST_AVAIL_BITS_SHIFT 10 |
| 86 | #define PT64_SECOND_AVAIL_BITS_SHIFT 52 | 86 | #define PT64_SECOND_AVAIL_BITS_SHIFT 54 |
| 87 | |||
| 88 | /* | ||
| 89 | * The mask used to denote special SPTEs, which can be either MMIO SPTEs or | ||
| 90 | * Access Tracking SPTEs. | ||
| 91 | */ | ||
| 92 | #define SPTE_SPECIAL_MASK (3ULL << 52) | ||
| 93 | #define SPTE_AD_ENABLED_MASK (0ULL << 52) | ||
| 94 | #define SPTE_AD_DISABLED_MASK (1ULL << 52) | ||
| 95 | #define SPTE_AD_WRPROT_ONLY_MASK (2ULL << 52) | ||
| 96 | #define SPTE_MMIO_MASK (3ULL << 52) | ||
| 87 | 97 | ||
| 88 | #define PT64_LEVEL_BITS 9 | 98 | #define PT64_LEVEL_BITS 9 |
| 89 | 99 | ||
| @@ -219,12 +229,11 @@ static u64 __read_mostly shadow_present_mask; · 129 unmodified lines | |||
| 219 | static u64 __read_mostly shadow_me_mask; | 229 | static u64 __read_mostly shadow_me_mask; |
| 220 | 230 | ||
| 221 | /* | 231 | /* |
| 222 | * SPTEs used by MMUs without A/D bits are marked with shadow_acc_track_value. | 232 | * SPTEs used by MMUs without A/D bits are marked with SPTE_AD_DISABLED_MASK; |
| 223 | * Non-present SPTEs with shadow_acc_track_value set are in place for access | 233 | * shadow_acc_track_mask is the set of bits to be cleared in non-accessed |
| 224 | * tracking. | 234 | * pages. |
| 225 | */ | 235 | */ |
| 226 | static u64 __read_mostly shadow_acc_track_mask; | 236 | static u64 __read_mostly shadow_acc_track_mask; |
| 227 | static const u64 shadow_acc_track_value = SPTE_SPECIAL_MASK; | ||
| 228 | 237 | ||
| 229 | /* | 238 | /* |
| 230 | * The mask/shift to use for saving the original R/X bits when marking the PTE | 239 | * The mask/shift to use for saving the original R/X bits when marking the PTE |
| @@ -304,7 +313,7 @@ void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask, u64 mmio_value, u64 access_mask) · 73 unmodified lines | |||
| 304 | { | 313 | { |
| 305 | BUG_ON((u64)(unsigned)access_mask != access_mask); | 314 | BUG_ON((u64)(unsigned)access_mask != access_mask); |
| 306 | BUG_ON((mmio_mask & mmio_value) != mmio_value); | 315 | BUG_ON((mmio_mask & mmio_value) != mmio_value); |
| 307 | shadow_mmio_value = mmio_value | SPTE_SPECIAL_MASK; | 316 | shadow_mmio_value = mmio_value | SPTE_MMIO_MASK; |
| 308 | shadow_mmio_mask = mmio_mask | SPTE_SPECIAL_MASK; | 317 | shadow_mmio_mask = mmio_mask | SPTE_SPECIAL_MASK; |
| 309 | shadow_mmio_access_mask = access_mask; | 318 | shadow_mmio_access_mask = access_mask; |
| 310 | } | 319 | } |
| @@ -320,10 +329,27 @@ static inline bool sp_ad_disabled(struct kvm_mmu_page *sp) · 9 unmodified lines | |||
| 320 | return sp->role.ad_disabled; | 329 | return sp->role.ad_disabled; |
| 321 | } | 330 | } |
| 322 | 331 | ||
| 332 | static inline bool kvm_vcpu_ad_need_write_protect(struct kvm_vcpu *vcpu) | ||
| 333 | { | ||
| 334 | /* | ||
| 335 | * When using the EPT page-modification log, the GPAs in the log | ||
| 336 | * would come from L2 rather than L1. Therefore, we need to rely | ||
| 337 | * on write protection to record dirty pages. This also bypasses | ||
| 338 | * PML, since writes now result in a vmexit. | ||
| 339 | */ | ||
| 340 | return vcpu->arch.mmu == &vcpu->arch.guest_mmu; | ||
| 341 | } | ||
| 342 | |||
| 323 | static inline bool spte_ad_enabled(u64 spte) | 343 | static inline bool spte_ad_enabled(u64 spte) |
| 324 | { | 344 | { |
| 325 | MMU_WARN_ON(is_mmio_spte(spte)); | 345 | MMU_WARN_ON(is_mmio_spte(spte)); |
| 326 | return !(spte & shadow_acc_track_value); | 346 | return (spte & SPTE_SPECIAL_MASK) != SPTE_AD_DISABLED_MASK; |
| 347 | } | ||
| 348 | |||
| 349 | static inline bool spte_ad_need_write_protect(u64 spte) | ||
| 350 | { | ||
| 351 | MMU_WARN_ON(is_mmio_spte(spte)); | ||
| 352 | return (spte & SPTE_SPECIAL_MASK) != SPTE_AD_ENABLED_MASK; | ||
| 327 | } | 353 | } |
| 328 | 354 | ||
| 329 | static inline u64 spte_shadow_accessed_mask(u64 spte) | 355 | static inline u64 spte_shadow_accessed_mask(u64 spte) |
| @@ -461,7 +487,7 @@ void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask, · 131 unmodified lines | |||
| 461 | { | 487 | { |
| 462 | BUG_ON(!dirty_mask != !accessed_mask); | 488 | BUG_ON(!dirty_mask != !accessed_mask); |
| 463 | BUG_ON(!accessed_mask && !acc_track_mask); | 489 | BUG_ON(!accessed_mask && !acc_track_mask); |
| 464 | BUG_ON(acc_track_mask & shadow_acc_track_value); | 490 | BUG_ON(acc_track_mask & SPTE_SPECIAL_MASK); |
| 465 | 491 | ||
| 466 | shadow_user_mask = user_mask; | 492 | shadow_user_mask = user_mask; |
| 467 | shadow_accessed_mask = accessed_mask; | 493 | shadow_accessed_mask = accessed_mask; |
| @@ -1589,16 +1615,16 @@ static bool spte_clear_dirty(u64 *sptep) · 1121 unmodified lines | |||
| 1589 | 1615 | ||
| 1590 | rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep); | 1616 | rmap_printk("rmap_clear_dirty: spte %p %llx\n", sptep, *sptep); |
| 1591 | 1617 | ||
| 1618 | MMU_WARN_ON(!spte_ad_enabled(spte)); | ||
| 1592 | spte &= ~shadow_dirty_mask; | 1619 | spte &= ~shadow_dirty_mask; |
| 1593 | |||
| 1594 | return mmu_spte_update(sptep, spte); | 1620 | return mmu_spte_update(sptep, spte); |
| 1595 | } | 1621 | } |
| 1596 | 1622 | ||
| 1597 | static bool wrprot_ad_disabled_spte(u64 *sptep) | 1623 | static bool spte_wrprot_for_clear_dirty(u64 *sptep) |
| 1598 | { | 1624 | { |
| 1599 | bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, | 1625 | bool was_writable = test_and_clear_bit(PT_WRITABLE_SHIFT, |
| 1600 | (unsigned long *)sptep); | 1626 | (unsigned long *)sptep); |
| 1601 | if (was_writable) | 1627 | if (was_writable && !spte_ad_enabled(*sptep)) |
| 1602 | kvm_set_pfn_dirty(spte_to_pfn(*sptep)); | 1628 | kvm_set_pfn_dirty(spte_to_pfn(*sptep)); |
| 1603 | 1629 | ||
| 1604 | return was_writable; | 1630 | return was_writable; |
| @@ -1617,10 +1643,10 @@ static bool __rmap_clear_dirty(struct kvm *kvm, struct kvm_rmap_head *rmap_head) · 12 unmodified lines | |||
| 1617 | bool flush = false; | 1643 | bool flush = false; |
| 1618 | 1644 | ||
| 1619 | for_each_rmap_spte(rmap_head, &iter, sptep) | 1645 | for_each_rmap_spte(rmap_head, &iter, sptep) |
| 1620 | if (spte_ad_enabled(*sptep)) | 1646 | if (spte_ad_need_write_protect(*sptep)) |
| 1621 | flush |= spte_clear_dirty(sptep); | 1647 | flush |= spte_wrprot_for_clear_dirty(sptep); |
| 1622 | else | 1648 | else |
| 1623 | flush |= wrprot_ad_disabled_spte(sptep); | 1649 | flush |= spte_clear_dirty(sptep); |
| 1624 | 1650 | ||
| 1625 | return flush; | 1651 | return flush; |
| 1626 | } | 1652 | } |
| @@ -1631,6 +1657,11 @@ static bool spte_set_dirty(u64 *sptep) · 4 unmodified lines | |||
| 1631 | 1657 | ||
| 1632 | rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep, *sptep); | 1658 | rmap_printk("rmap_set_dirty: spte %p %llx\n", sptep, *sptep); |
| 1633 | 1659 | ||
| 1660 | /* | ||
| 1661 | * Similar to the !kvm_x86_ops->slot_disable_log_dirty case, | ||
| 1662 | * do not bother adding back write access to pages marked | ||
| 1663 | * SPTE_AD_WRPROT_ONLY_MASK. | ||
| 1664 | */ | ||
| 1634 | spte |= shadow_dirty_mask; | 1665 | spte |= shadow_dirty_mask; |
| 1635 | 1666 | ||
| 1636 | return mmu_spte_update(sptep, spte); | 1667 | return mmu_spte_update(sptep, spte); |
| @@ -2622,7 +2653,7 @@ static void link_shadow_page(struct kvm_vcpu *vcpu, u64 *sptep, · 985 unmodified lines | |||
| 2622 | shadow_user_mask | shadow_x_mask | shadow_me_mask; | 2653 | shadow_user_mask | shadow_x_mask | shadow_me_mask; |
| 2623 | 2654 | ||
| 2624 | if (sp_ad_disabled(sp)) | 2655 | if (sp_ad_disabled(sp)) |
| 2625 | spte |= shadow_acc_track_value; | 2656 | spte |= SPTE_AD_DISABLED_MASK; |
| 2626 | else | 2657 | else |
| 2627 | spte |= shadow_accessed_mask; | 2658 | spte |= shadow_accessed_mask; |
| 2628 | 2659 | ||
| @@ -2968,7 +2999,9 @@ static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep, · 339 unmodified lines | |||
| 2968 | 2999 | ||
| 2969 | sp = page_header(__pa(sptep)); | 3000 | sp = page_header(__pa(sptep)); |
| 2970 | if (sp_ad_disabled(sp)) | 3001 | if (sp_ad_disabled(sp)) |
| 2971 | spte |= shadow_acc_track_value; | 3002 | spte |= SPTE_AD_DISABLED_MASK; |
| 3003 | else if (kvm_vcpu_ad_need_write_protect(vcpu)) | ||
| 3004 | spte |= SPTE_AD_WRPROT_ONLY_MASK; | ||
| 2972 | 3005 | ||
| 2973 | /* | 3006 | /* |
| 2974 | * For the EPT case, shadow_present_mask is 0 if hardware | 3007 | * For the EPT case, shadow_present_mask is 0 if hardware |
| @@ -2610,7 +2610,7 @@ static int nested_check_vm_entry_controls(struct kvm_vcpu *vcpu, · 2609 unmodified lines | |||
| 2610 | 2610 | ||
| 2611 | /* VM-entry exception error code */ | 2611 | /* VM-entry exception error code */ |
| 2612 | if (CC(has_error_code && | 2612 | if (CC(has_error_code && |
| 2613 | vmcs12->vm_entry_exception_error_code & GENMASK(31, 15))) | 2613 | vmcs12->vm_entry_exception_error_code & GENMASK(31, 16))) |
| 2614 | return -EINVAL; | 2614 | return -EINVAL; |
| 2615 | 2615 | ||
| 2616 | /* VM-entry interruption-info field: reserved bits */ | 2616 | /* VM-entry interruption-info field: reserved bits */ |
| @@ -262,6 +262,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 261 unmodified lines | |||
| 262 | static void intel_pmu_refresh(struct kvm_vcpu *vcpu) | 262 | static void intel_pmu_refresh(struct kvm_vcpu *vcpu) |
| 263 | { | 263 | { |
| 264 | struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); | 264 | struct kvm_pmu *pmu = vcpu_to_pmu(vcpu); |
| 265 | struct x86_pmu_capability x86_pmu; | ||
| 265 | struct kvm_cpuid_entry2 *entry; | 266 | struct kvm_cpuid_entry2 *entry; |
| 266 | union cpuid10_eax eax; | 267 | union cpuid10_eax eax; |
| 267 | union cpuid10_edx edx; | 268 | union cpuid10_edx edx; |
| @@ -283,8 +284,10 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) · 15 unmodified lines | |||
| 283 | if (!pmu->version) | 284 | if (!pmu->version) |
| 284 | return; | 285 | return; |
| 285 | 286 | ||
| 287 | perf_get_x86_pmu_capability(&x86_pmu); | ||
| 288 | |||
| 286 | pmu->nr_arch_gp_counters = min_t(int, eax.split.num_counters, | 289 | pmu->nr_arch_gp_counters = min_t(int, eax.split.num_counters, |
| 287 | INTEL_PMC_MAX_GENERIC); | 290 | x86_pmu.num_counters_gp); |
| 288 | pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << eax.split.bit_width) - 1; | 291 | pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << eax.split.bit_width) - 1; |
| 289 | pmu->available_event_types = ~entry->ebx & | 292 | pmu->available_event_types = ~entry->ebx & |
| 290 | ((1ull << eax.split.mask_length) - 1); | 293 | ((1ull << eax.split.mask_length) - 1); |
| @@ -294,7 +297,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu) · 3 unmodified lines | |||
| 294 | } else { | 297 | } else { |
| 295 | pmu->nr_arch_fixed_counters = | 298 | pmu->nr_arch_fixed_counters = |
| 296 | min_t(int, edx.split.num_counters_fixed, | 299 | min_t(int, edx.split.num_counters_fixed, |
| 297 | INTEL_PMC_MAX_FIXED); | 300 | x86_pmu.num_counters_fixed); |
| 298 | pmu->counter_bitmask[KVM_PMC_FIXED] = | 301 | pmu->counter_bitmask[KVM_PMC_FIXED] = |
| 299 | ((u64)1 << edx.split.bit_width_fixed) - 1; | 302 | ((u64)1 << edx.split.bit_width_fixed) - 1; |
| 300 | } | 303 | } |
| @@ -209,6 +209,11 @@ static int vmx_setup_l1d_flush(enum vmx_l1d_flush_state l1tf) · 208 unmodified lines | |||
| 209 | struct page *page; | 209 | struct page *page; |
| 210 | unsigned int i; | 210 | unsigned int i; |
| 211 | 211 | ||
| 212 | if (!boot_cpu_has_bug(X86_BUG_L1TF)) { | ||
| 213 | l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_NOT_REQUIRED; | ||
| 214 | return 0; | ||
| 215 | } | ||
| 216 | |||
| 212 | if (!enable_ept) { | 217 | if (!enable_ept) { |
| 213 | l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_EPT_DISABLED; | 218 | l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_EPT_DISABLED; |
| 214 | return 0; | 219 | return 0; |
| @@ -7995,12 +8000,10 @@ static int __init vmx_init(void) · 7780 unmodified lines | |||
| 7995 | * contain 'auto' which will be turned into the default 'cond' | 8000 | * contain 'auto' which will be turned into the default 'cond' |
| 7996 | * mitigation mode. | 8001 | * mitigation mode. |
| 7997 | */ | 8002 | */ |
| 7998 | if (boot_cpu_has(X86_BUG_L1TF)) { | 8003 | r = vmx_setup_l1d_flush(vmentry_l1d_flush_param); |
| 7999 | r = vmx_setup_l1d_flush(vmentry_l1d_flush_param); | 8004 | if (r) { |
| 8000 | if (r) { | 8005 | vmx_exit(); |
| 8001 | vmx_exit(); | 8006 | return r; |
| 8002 | return r; | ||
| 8003 | } | ||
| 8004 | } | 8007 | } |
| 8005 | 8008 | ||
| 8006 | #ifdef CONFIG_KEXEC_CORE | 8009 | #ifdef CONFIG_KEXEC_CORE |
| @@ -92,8 +92,8 @@ u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA)); · 91 unmodified lines | |||
| 92 | static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE); | 92 | static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE); |
| 93 | #endif | 93 | #endif |
| 94 | 94 | ||
| 95 | #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM | 95 | #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__ |
| 96 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU | 96 | #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__ |
| 97 | 97 | ||
| 98 | #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \ | 98 | #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \ |
| 99 | KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK) | 99 | KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK) |
| @@ -212,7 +212,7 @@ struct kvm_stats_debugfs_item debugfs_entries[] = { · 112 unmodified lines | |||
| 212 | { "mmu_cache_miss", VM_STAT(mmu_cache_miss) }, | 212 | { "mmu_cache_miss", VM_STAT(mmu_cache_miss) }, |
| 213 | { "mmu_unsync", VM_STAT(mmu_unsync) }, | 213 | { "mmu_unsync", VM_STAT(mmu_unsync) }, |
| 214 | { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, | 214 | { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, |
| 215 | { "largepages", VM_STAT(lpages) }, | 215 | { "largepages", VM_STAT(lpages, .mode = 0444) }, |
| 216 | { "max_mmu_page_hash_collisions", | 216 | { "max_mmu_page_hash_collisions", |
| 217 | VM_STAT(max_mmu_page_hash_collisions) }, | 217 | VM_STAT(max_mmu_page_hash_collisions) }, |
| 218 | { NULL } | 218 | { NULL } |
| @@ -885,34 +885,42 @@ int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr) · 666 unmodified lines | |||
| 885 | } | 885 | } |
| 886 | EXPORT_SYMBOL_GPL(kvm_set_xcr); | 886 | EXPORT_SYMBOL_GPL(kvm_set_xcr); |
| 887 | 887 | ||
| 888 | int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) | 888 | static int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) |
| 889 | { | 889 | { |
| 890 | unsigned long old_cr4 = kvm_read_cr4(vcpu); | ||
| 891 | unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | | ||
| 892 | X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE; | ||
| 893 | |||
| 894 | if (cr4 & CR4_RESERVED_BITS) | 890 | if (cr4 & CR4_RESERVED_BITS) |
| 895 | return 1; | 891 | return -EINVAL; |
| 896 | 892 | ||
| 897 | if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE)) | 893 | if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE)) |
| 898 | return 1; | 894 | return -EINVAL; |
| 899 | 895 | ||
| 900 | if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP)) | 896 | if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP)) |
| 901 | return 1; | 897 | return -EINVAL; |
| 902 | 898 | ||
| 903 | if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP)) | 899 | if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP)) |
| 904 | return 1; | 900 | return -EINVAL; |
| 905 | 901 | ||
| 906 | if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE)) | 902 | if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE)) |
| 907 | return 1; | 903 | return -EINVAL; |
| 908 | 904 | ||
| 909 | if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE)) | 905 | if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE)) |
| 910 | return 1; | 906 | return -EINVAL; |
| 911 | 907 | ||
| 912 | if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57)) | 908 | if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57)) |
| 913 | return 1; | 909 | return -EINVAL; |
| 914 | 910 | ||
| 915 | if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP)) | 911 | if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP)) |
| 912 | return -EINVAL; | ||
| 913 | |||
| 914 | return 0; | ||
| 915 | } | ||
| 916 | |||
| 917 | int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) | ||
| 918 | { | ||
| 919 | unsigned long old_cr4 = kvm_read_cr4(vcpu); | ||
| 920 | unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE | | ||
| 921 | X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE; | ||
| 922 | |||
| 923 | if (kvm_valid_cr4(vcpu, cr4)) | ||
| 916 | return 1; | 924 | return 1; |
| 917 | 925 | ||
| 918 | if (is_long_mode(vcpu)) { | 926 | if (is_long_mode(vcpu)) { |
| @@ -1161,13 +1169,6 @@ static u32 msrs_to_save[] = { · 242 unmodified lines | |||
| 1161 | MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13, | 1169 | MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13, |
| 1162 | MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15, | 1170 | MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15, |
| 1163 | MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17, | 1171 | MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17, |
| 1164 | MSR_ARCH_PERFMON_PERFCTR0 + 18, MSR_ARCH_PERFMON_PERFCTR0 + 19, | ||
| 1165 | MSR_ARCH_PERFMON_PERFCTR0 + 20, MSR_ARCH_PERFMON_PERFCTR0 + 21, | ||
| 1166 | MSR_ARCH_PERFMON_PERFCTR0 + 22, MSR_ARCH_PERFMON_PERFCTR0 + 23, | ||
| 1167 | MSR_ARCH_PERFMON_PERFCTR0 + 24, MSR_ARCH_PERFMON_PERFCTR0 + 25, | ||
| 1168 | MSR_ARCH_PERFMON_PERFCTR0 + 26, MSR_ARCH_PERFMON_PERFCTR0 + 27, | ||
| 1169 | MSR_ARCH_PERFMON_PERFCTR0 + 28, MSR_ARCH_PERFMON_PERFCTR0 + 29, | ||
| 1170 | MSR_ARCH_PERFMON_PERFCTR0 + 30, MSR_ARCH_PERFMON_PERFCTR0 + 31, | ||
| 1171 | MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1, | 1172 | MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1, |
| 1172 | MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3, | 1173 | MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3, |
| 1173 | MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5, | 1174 | MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5, |
| @@ -1177,13 +1178,6 @@ static u32 msrs_to_save[] = { · 3 unmodified lines | |||
| 1177 | MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13, | 1178 | MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13, |
| 1178 | MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15, | 1179 | MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15, |
| 1179 | MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17, | 1180 | MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17, |
| 1180 | MSR_ARCH_PERFMON_EVENTSEL0 + 18, MSR_ARCH_PERFMON_EVENTSEL0 + 19, | ||
| 1181 | MSR_ARCH_PERFMON_EVENTSEL0 + 20, MSR_ARCH_PERFMON_EVENTSEL0 + 21, | ||
| 1182 | MSR_ARCH_PERFMON_EVENTSEL0 + 22, MSR_ARCH_PERFMON_EVENTSEL0 + 23, | ||
| 1183 | MSR_ARCH_PERFMON_EVENTSEL0 + 24, MSR_ARCH_PERFMON_EVENTSEL0 + 25, | ||
| 1184 | MSR_ARCH_PERFMON_EVENTSEL0 + 26, MSR_ARCH_PERFMON_EVENTSEL0 + 27, | ||
| 1185 | MSR_ARCH_PERFMON_EVENTSEL0 + 28, MSR_ARCH_PERFMON_EVENTSEL0 + 29, | ||
| 1186 | MSR_ARCH_PERFMON_EVENTSEL0 + 30, MSR_ARCH_PERFMON_EVENTSEL0 + 31, | ||
| 1187 | }; | 1181 | }; |
| 1188 | 1182 | ||
| 1189 | static unsigned num_msrs_to_save; | 1183 | static unsigned num_msrs_to_save; |
| @@ -5097,13 +5091,14 @@ out: · 3907 unmodified lines | |||
| 5097 | 5091 | ||
| 5098 | static void kvm_init_msr_list(void) | 5092 | static void kvm_init_msr_list(void) |
| 5099 | { | 5093 | { |
| 5094 | struct x86_pmu_capability x86_pmu; | ||
| 5100 | u32 dummy[2]; | 5095 | u32 dummy[2]; |
| 5101 | unsigned i, j; | 5096 | unsigned i, j; |
| 5102 | 5097 | ||
| 5103 | BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4, | 5098 | BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4, |
| 5104 | "Please update the fixed PMCs in msrs_to_save[]"); | 5099 | "Please update the fixed PMCs in msrs_to_save[]"); |
| 5105 | BUILD_BUG_ON_MSG(INTEL_PMC_MAX_GENERIC != 32, | 5100 | |
| 5106 | "Please update the generic perfctr/eventsel MSRs in msrs_to_save[]"); | 5101 | perf_get_x86_pmu_capability(&x86_pmu); |
| 5107 | 5102 | ||
| 5108 | for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) { | 5103 | for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) { |
| 5109 | if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0) | 5104 | if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0) |
| @@ -5145,6 +5140,15 @@ static void kvm_init_msr_list(void) · 35 unmodified lines | |||
| 5145 | intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2) | 5140 | intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2) |
| 5146 | continue; | 5141 | continue; |
| 5147 | break; | 5142 | break; |
| 5143 | case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17: | ||
| 5144 | if (msrs_to_save[i] - MSR_ARCH_PERFMON_PERFCTR0 >= | ||
| 5145 | min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp)) | ||
| 5146 | continue; | ||
| 5147 | break; | ||
| 5148 | case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17: | ||
| 5149 | if (msrs_to_save[i] - MSR_ARCH_PERFMON_EVENTSEL0 >= | ||
| 5150 | min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp)) | ||
| 5151 | continue; | ||
| 5148 | } | 5152 | } |
| 5149 | default: | 5153 | default: |
| 5150 | break; | 5154 | break; |
| @@ -8714,10 +8718,6 @@ EXPORT_SYMBOL_GPL(kvm_task_switch); · 3563 unmodified lines | |||
| 8714 | 8718 | ||
| 8715 | static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) | 8719 | static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) |
| 8716 | { | 8720 | { |
| 8717 | if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && | ||
| 8718 | (sregs->cr4 & X86_CR4_OSXSAVE)) | ||
| 8719 | return -EINVAL; | ||
| 8720 | |||
| 8721 | if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) { | 8721 | if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) { |
| 8722 | /* | 8722 | /* |
| 8723 | * When EFER.LME and CR0.PG are set, the processor is in | 8723 | * When EFER.LME and CR0.PG are set, the processor is in |
| @@ -8736,7 +8736,7 @@ static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) · 12 unmodified lines | |||
| 8736 | return -EINVAL; | 8736 | return -EINVAL; |
| 8737 | } | 8737 | } |
| 8738 | 8738 | ||
| 8739 | return 0; | 8739 | return kvm_valid_cr4(vcpu, sregs->cr4); |
| 8740 | } | 8740 | } |
| 8741 | 8741 | ||
| 8742 | static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) | 8742 | static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) |
| @@ -113,8 +113,8 @@ static void delay_mwaitx(unsigned long __loops) · 112 unmodified lines | |||
| 113 | __monitorx(raw_cpu_ptr(&cpu_tss_rw), 0, 0); | 113 | __monitorx(raw_cpu_ptr(&cpu_tss_rw), 0, 0); |
| 114 | 114 | ||
| 115 | /* | 115 | /* |
| 116 | * AMD, like Intel, supports the EAX hint and EAX=0xf | 116 | * AMD, like Intel's MWAIT version, supports the EAX hint and |
| 117 | * means, do not enter any deep C-state and we use it | 117 | * EAX=0xf0 means, do not enter any deep C-state and we use it |
| 118 | * here in delay() to minimize wakeup latency. | 118 | * here in delay() to minimize wakeup latency. |
| 119 | */ | 119 | */ |
| 120 | __mwaitx(MWAITX_DISABLE_CSTATES, delay, MWAITX_ECX_TIMER_ENABLE); | 120 | __mwaitx(MWAITX_DISABLE_CSTATES, delay, MWAITX_ECX_TIMER_ENABLE); |
| @@ -917,9 +917,6 @@ static void __init kexec_enter_virtual_mode(void) · 916 unmodified lines | |||
| 917 | 917 | ||
| 918 | if (efi_enabled(EFI_OLD_MEMMAP) && (__supported_pte_mask & _PAGE_NX)) | 918 | if (efi_enabled(EFI_OLD_MEMMAP) && (__supported_pte_mask & _PAGE_NX)) |
| 919 | runtime_code_page_mkexec(); | 919 | runtime_code_page_mkexec(); |
| 920 | |||
| 921 | /* clean DUMMY object */ | ||
| 922 | efi_delete_dummy_variable(); | ||
| 923 | #endif | 920 | #endif |
| 924 | } | 921 | } |
| 925 | 922 | ||
| @@ -57,19 +57,7 @@ static efi_system_table_t __init *xen_efi_probe(void) · 56 unmodified lines | |||
| 57 | return NULL; | 57 | return NULL; |
| 58 | 58 | ||
| 59 | /* Here we know that Xen runs on EFI platform. */ | 59 | /* Here we know that Xen runs on EFI platform. */ |
| 60 | 60 | xen_efi_runtime_setup(); | |
| 61 | efi.get_time = xen_efi_get_time; | ||
| 62 | efi.set_time = xen_efi_set_time; | ||
| 63 | efi.get_wakeup_time = xen_efi_get_wakeup_time; | ||
| 64 | efi.set_wakeup_time = xen_efi_set_wakeup_time; | ||
| 65 | efi.get_variable = xen_efi_get_variable; | ||
| 66 | efi.get_next_variable = xen_efi_get_next_variable; | ||
| 67 | efi.set_variable = xen_efi_set_variable; | ||
| 68 | efi.query_variable_info = xen_efi_query_variable_info; | ||
| 69 | efi.update_capsule = xen_efi_update_capsule; | ||
| 70 | efi.query_capsule_caps = xen_efi_query_capsule_caps; | ||
| 71 | efi.get_next_high_mono_count = xen_efi_get_next_high_mono_count; | ||
| 72 | efi.reset_system = xen_efi_reset_system; | ||
| 73 | 61 | ||
| 74 | efi_systab_xen.tables = info->cfg.addr; | 62 | efi_systab_xen.tables = info->cfg.addr; |
| 75 | efi_systab_xen.nr_tables = info->cfg.nent; | 63 | efi_systab_xen.nr_tables = info->cfg.nent; |
| @@ -269,19 +269,41 @@ void xen_reboot(int reason) · 268 unmodified lines | |||
| 269 | BUG(); | 269 | BUG(); |
| 270 | } | 270 | } |
| 271 | 271 | ||
| 272 | static int reboot_reason = SHUTDOWN_reboot; | ||
| 273 | static bool xen_legacy_crash; | ||
| 272 | void xen_emergency_restart(void) | 274 | void xen_emergency_restart(void) |
| 273 | { | 275 | { |
| 274 | xen_reboot(SHUTDOWN_reboot); | 276 | xen_reboot(reboot_reason); |
| 275 | } | 277 | } |
| 276 | 278 | ||
| 277 | static int | 279 | static int |
| 278 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) | 280 | xen_panic_event(struct notifier_block *this, unsigned long event, void *ptr) |
| 279 | { | 281 | { |
| 280 | if (!kexec_crash_loaded()) | 282 | if (!kexec_crash_loaded()) { |
| 281 | xen_reboot(SHUTDOWN_crash); | 283 | if (xen_legacy_crash) |
| 284 | xen_reboot(SHUTDOWN_crash); | ||
| 285 | |||
| 286 | reboot_reason = SHUTDOWN_crash; | ||
| 287 | |||
| 288 | /* | ||
| 289 | * If panic_timeout==0 then we are supposed to wait forever. | ||
| 290 | * However, to preserve original dom0 behavior we have to drop | ||
| 291 | * into hypervisor. (domU behavior is controlled by its | ||
| 292 | * config file) | ||
| 293 | */ | ||
| 294 | if (panic_timeout == 0) | ||
| 295 | panic_timeout = -1; | ||
| 296 | } | ||
| 282 | return NOTIFY_DONE; | 297 | return NOTIFY_DONE; |
| 283 | } | 298 | } |
| 284 | 299 | ||
| 300 | static int __init parse_xen_legacy_crash(char *arg) | ||
| 301 | { | ||
| 302 | xen_legacy_crash = true; | ||
| 303 | return 0; | ||
| 304 | } | ||
| 305 | early_param("xen_legacy_crash", parse_xen_legacy_crash); | ||
| 306 | |||
| 285 | static struct notifier_block xen_panic_block = { | 307 | static struct notifier_block xen_panic_block = { |
| 286 | .notifier_call = xen_panic_event, | 308 | .notifier_call = xen_panic_event, |
| 287 | .priority = INT_MIN | 309 | .priority = INT_MIN |
| @@ -56,7 +56,7 @@ · 55 unmodified lines | |||
| 56 | reg = <0xf0100000 0x03f00000>; | 56 | reg = <0xf0100000 0x03f00000>; |
| 57 | 57 | ||
| 58 | // BUS_ADDRESS(3) CPU_PHYSICAL(1) SIZE(2) | 58 | // BUS_ADDRESS(3) CPU_PHYSICAL(1) SIZE(2) |
| 59 | ranges = <0x01000000 0x0 0xf0000000 0xf0000000 0x0 0x00010000>, | 59 | ranges = <0x01000000 0x0 0x00000000 0xf0000000 0x0 0x00010000>, |
| 60 | <0x02000000 0x0 0xf4000000 0xf4000000 0x0 0x08000000>; | 60 | <0x02000000 0x0 0xf4000000 0xf4000000 0x0 0x08000000>; |
| 61 | 61 | ||
| 62 | // PCI_DEVICE(3) INT#(1) CONTROLLER(PHANDLE) CONTROLLER_DATA(2) | 62 | // PCI_DEVICE(3) INT#(1) CONTROLLER(PHANDLE) CONTROLLER_DATA(2) |
| @@ -148,7 +148,7 @@ static inline void change_bit(unsigned int bit, volatile unsigned long *p) · 147 unmodified lines | |||
| 148 | " getex %0\n" | 148 | " getex %0\n" |
| 149 | " beqz %0, 1b\n" | 149 | " beqz %0, 1b\n" |
| 150 | : "=&a" (tmp) | 150 | : "=&a" (tmp) |
| 151 | : "a" (~mask), "a" (p) | 151 | : "a" (mask), "a" (p) |
| 152 | : "memory"); | 152 | : "memory"); |
| 153 | } | 153 | } |
| 154 | 154 | ||
| @@ -100,7 +100,7 @@ do { \ · 99 unmodified lines | |||
| 100 | case 4: __put_user_asm(x, ptr, retval, 4, "s32i", __cb); break; \ | 100 | case 4: __put_user_asm(x, ptr, retval, 4, "s32i", __cb); break; \ |
| 101 | case 8: { \ | 101 | case 8: { \ |
| 102 | __typeof__(*ptr) __v64 = x; \ | 102 | __typeof__(*ptr) __v64 = x; \ |
| 103 | retval = __copy_to_user(ptr, &__v64, 8); \ | 103 | retval = __copy_to_user(ptr, &__v64, 8) ? -EFAULT : 0; \ |
| 104 | break; \ | 104 | break; \ |
| 105 | } \ | 105 | } \ |
| 106 | default: __put_user_bad(); \ | 106 | default: __put_user_bad(); \ |
| @@ -132,14 +132,14 @@ do { \ · 25 unmodified lines | |||
| 132 | #define __check_align_1 "" | 132 | #define __check_align_1 "" |
| 133 | 133 | ||
| 134 | #define __check_align_2 \ | 134 | #define __check_align_2 \ |
| 135 | " _bbci.l %3, 0, 1f \n" \ | 135 | " _bbci.l %[addr], 0, 1f \n" \ |
| 136 | " movi %0, %4 \n" \ | 136 | " movi %[err], %[efault] \n" \ |
| 137 | " _j 2f \n" | 137 | " _j 2f \n" |
| 138 | 138 | ||
| 139 | #define __check_align_4 \ | 139 | #define __check_align_4 \ |
| 140 | " _bbsi.l %3, 0, 0f \n" \ | 140 | " _bbsi.l %[addr], 0, 0f \n" \ |
| 141 | " _bbci.l %3, 1, 1f \n" \ | 141 | " _bbci.l %[addr], 1, 1f \n" \ |
| 142 | "0: movi %0, %4 \n" \ | 142 | "0: movi %[err], %[efault] \n" \ |
| 143 | " _j 2f \n" | 143 | " _j 2f \n" |
| 144 | 144 | ||
| 145 | 145 | ||
| @@ -151,40 +151,40 @@ do { \ · 5 unmodified lines | |||
| 151 | * WARNING: If you modify this macro at all, verify that the | 151 | * WARNING: If you modify this macro at all, verify that the |
| 152 | * __check_align_* macros still work. | 152 | * __check_align_* macros still work. |
| 153 | */ | 153 | */ |
| 154 | #define __put_user_asm(x, addr, err, align, insn, cb) \ | 154 | #define __put_user_asm(x_, addr_, err_, align, insn, cb)\ |
| 155 | __asm__ __volatile__( \ | 155 | __asm__ __volatile__( \ |
| 156 | __check_align_##align \ | 156 | __check_align_##align \ |
| 157 | "1: "insn" %2, %3, 0 \n" \ | 157 | "1: "insn" %[x], %[addr], 0 \n" \ |
| 158 | "2: \n" \ | 158 | "2: \n" \ |
| 159 | " .section .fixup,\"ax\" \n" \ | 159 | " .section .fixup,\"ax\" \n" \ |
| 160 | " .align 4 \n" \ | 160 | " .align 4 \n" \ |
| 161 | " .literal_position \n" \ | 161 | " .literal_position \n" \ |
| 162 | "5: \n" \ | 162 | "5: \n" \ |
| 163 | " movi %1, 2b \n" \ | 163 | " movi %[tmp], 2b \n" \ |
| 164 | " movi %0, %4 \n" \ | 164 | " movi %[err], %[efault] \n" \ |
| 165 | " jx %1 \n" \ | 165 | " jx %[tmp] \n" \ |
| 166 | " .previous \n" \ | 166 | " .previous \n" \ |
| 167 | " .section __ex_table,\"a\" \n" \ | 167 | " .section __ex_table,\"a\" \n" \ |
| 168 | " .long 1b, 5b \n" \ | 168 | " .long 1b, 5b \n" \ |
| 169 | " .previous" \ | 169 | " .previous" \ |
| 170 | :"=r" (err), "=r" (cb) \ | 170 | :[err] "+r"(err_), [tmp] "=r"(cb) \ |
| 171 | :"r" ((int)(x)), "r" (addr), "i" (-EFAULT), "0" (err)) | 171 | :[x] "r"(x_), [addr] "r"(addr_), [efault] "i"(-EFAULT)) |
| 172 | 172 | ||
| 173 | #define __get_user_nocheck(x, ptr, size) \ | 173 | #define __get_user_nocheck(x, ptr, size) \ |
| 174 | ({ \ | 174 | ({ \ |
| 175 | long __gu_err, __gu_val; \ | 175 | long __gu_err; \ |
| 176 | __get_user_size(__gu_val, (ptr), (size), __gu_err); \ | 176 | __get_user_size((x), (ptr), (size), __gu_err); \ |
| 177 | (x) = (__force __typeof__(*(ptr)))__gu_val; \ | ||
| 178 | __gu_err; \ | 177 | __gu_err; \ |
| 179 | }) | 178 | }) |
| 180 | 179 | ||
| 181 | #define __get_user_check(x, ptr, size) \ | 180 | #define __get_user_check(x, ptr, size) \ |
| 182 | ({ \ | 181 | ({ \ |
| 183 | long __gu_err = -EFAULT, __gu_val = 0; \ | 182 | long __gu_err = -EFAULT; \ |
| 184 | const __typeof__(*(ptr)) *__gu_addr = (ptr); \ | 183 | const __typeof__(*(ptr)) *__gu_addr = (ptr); \ |
| 185 | if (access_ok(__gu_addr, size)) \ | 184 | if (access_ok(__gu_addr, size)) \ |
| 186 | __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \ | 185 | __get_user_size((x), __gu_addr, (size), __gu_err); \ |
| 187 | (x) = (__force __typeof__(*(ptr)))__gu_val; \ | 186 | else \ |
| 187 | (x) = 0; \ | ||
| 188 | __gu_err; \ | 188 | __gu_err; \ |
| 189 | }) | 189 | }) |
| 190 | 190 | ||
| @@ -198,8 +198,17 @@ do { \ · 7 unmodified lines | |||
| 198 | case 1: __get_user_asm(x, ptr, retval, 1, "l8ui", __cb); break;\ | 198 | case 1: __get_user_asm(x, ptr, retval, 1, "l8ui", __cb); break;\ |
| 199 | case 2: __get_user_asm(x, ptr, retval, 2, "l16ui", __cb); break;\ | 199 | case 2: __get_user_asm(x, ptr, retval, 2, "l16ui", __cb); break;\ |
| 200 | case 4: __get_user_asm(x, ptr, retval, 4, "l32i", __cb); break;\ | 200 | case 4: __get_user_asm(x, ptr, retval, 4, "l32i", __cb); break;\ |
| 201 | case 8: retval = __copy_from_user(&x, ptr, 8); break; \ | 201 | case 8: { \ |
| 202 | default: (x) = __get_user_bad(); \ | 202 | u64 __x; \ |
| 203 | if (unlikely(__copy_from_user(&__x, ptr, 8))) { \ | ||
| 204 | retval = -EFAULT; \ | ||
| 205 | (x) = 0; \ | ||
| 206 | } else { \ | ||
| 207 | (x) = *(__force __typeof__((ptr)))&__x; \ | ||
| 208 | } \ | ||
| 209 | break; \ | ||
| 210 | } \ | ||
| 211 | default: (x) = 0; __get_user_bad(); \ | ||
| 203 | } \ | 212 | } \ |
| 204 | } while (0) | 213 | } while (0) |
| 205 | 214 | ||
| @@ -208,25 +217,28 @@ do { \ · 2 unmodified lines | |||
| 208 | * WARNING: If you modify this macro at all, verify that the | 217 | * WARNING: If you modify this macro at all, verify that the |
| 209 | * __check_align_* macros still work. | 218 | * __check_align_* macros still work. |
| 210 | */ | 219 | */ |
| 211 | #define __get_user_asm(x, addr, err, align, insn, cb) \ | 220 | #define __get_user_asm(x_, addr_, err_, align, insn, cb) \ |
| 212 | __asm__ __volatile__( \ | 221 | do { \ |
| 213 | __check_align_##align \ | 222 | u32 __x = 0; \ |
| 214 | "1: "insn" %2, %3, 0 \n" \ | 223 | __asm__ __volatile__( \ |
| 215 | "2: \n" \ | 224 | __check_align_##align \ |
| 216 | " .section .fixup,\"ax\" \n" \ | 225 | "1: "insn" %[x], %[addr], 0 \n" \ |
| 217 | " .align 4 \n" \ | 226 | "2: \n" \ |
| 218 | " .literal_position \n" \ | 227 | " .section .fixup,\"ax\" \n" \ |
| 219 | "5: \n" \ | 228 | " .align 4 \n" \ |
| 220 | " movi %1, 2b \n" \ | 229 | " .literal_position \n" \ |
| 221 | " movi %2, 0 \n" \ | 230 | "5: \n" \ |
| 222 | " movi %0, %4 \n" \ | 231 | " movi %[tmp], 2b \n" \ |
| 223 | " jx %1 \n" \ | 232 | " movi %[err], %[efault] \n" \ |
| 224 | " .previous \n" \ | 233 | " jx %[tmp] \n" \ |
| 225 | " .section __ex_table,\"a\" \n" \ | 234 | " .previous \n" \ |
| 226 | " .long 1b, 5b \n" \ | 235 | " .section __ex_table,\"a\" \n" \ |
| 227 | " .previous" \ | 236 | " .long 1b, 5b \n" \ |
| 228 | :"=r" (err), "=r" (cb), "=r" (x) \ | 237 | " .previous" \ |
| 229 | :"r" (addr), "i" (-EFAULT), "0" (err)) | 238 | :[err] "+r"(err_), [tmp] "=r"(cb), [x] "+r"(__x) \ |
| 239 | :[addr] "r"(addr_), [efault] "i"(-EFAULT)); \ | ||
| 240 | (x_) = (__force __typeof__(*(addr_)))__x; \ | ||
| 241 | } while (0) | ||
| 230 | 242 | ||
| 231 | 243 | ||
| 232 | /* | 244 | /* |
| @@ -119,13 +119,6 @@ EXPORT_SYMBOL(__invalidate_icache_range); · 118 unmodified lines | |||
| 119 | // FIXME EXPORT_SYMBOL(screen_info); | 119 | // FIXME EXPORT_SYMBOL(screen_info); |
| 120 | #endif | 120 | #endif |
| 121 | 121 | ||
| 122 | EXPORT_SYMBOL(outsb); | ||
| 123 | EXPORT_SYMBOL(outsw); | ||
| 124 | EXPORT_SYMBOL(outsl); | ||
| 125 | EXPORT_SYMBOL(insb); | ||
| 126 | EXPORT_SYMBOL(insw); | ||
| 127 | EXPORT_SYMBOL(insl); | ||
| 128 | |||
| 129 | extern long common_exception_return; | 122 | extern long common_exception_return; |
| 130 | EXPORT_SYMBOL(common_exception_return); | 123 | EXPORT_SYMBOL(common_exception_return); |
| 131 | 124 | ||
| @@ -1362,7 +1362,7 @@ int blkcg_activate_policy(struct request_queue *q, · 1361 unmodified lines | |||
| 1362 | const struct blkcg_policy *pol) | 1362 | const struct blkcg_policy *pol) |
| 1363 | { | 1363 | { |
| 1364 | struct blkg_policy_data *pd_prealloc = NULL; | 1364 | struct blkg_policy_data *pd_prealloc = NULL; |
| 1365 | struct blkcg_gq *blkg; | 1365 | struct blkcg_gq *blkg, *pinned_blkg = NULL; |
| 1366 | int ret; | 1366 | int ret; |
| 1367 | 1367 | ||
| 1368 | if (blkcg_policy_enabled(q, pol)) | 1368 | if (blkcg_policy_enabled(q, pol)) |
| @@ -1370,49 +1370,82 @@ int blkcg_activate_policy(struct request_queue *q, · 1 unmodified line | |||
| 1370 | 1370 | ||
| 1371 | if (queue_is_mq(q)) | 1371 | if (queue_is_mq(q)) |
| 1372 | blk_mq_freeze_queue(q); | 1372 | blk_mq_freeze_queue(q); |
| 1373 | pd_prealloc: | 1373 | retry: |
| 1374 | if (!pd_prealloc) { | ||
| 1375 | pd_prealloc = pol->pd_alloc_fn(GFP_KERNEL, q, &blkcg_root); | ||
| 1376 | if (!pd_prealloc) { | ||
| 1377 | ret = -ENOMEM; | ||
| 1378 | goto out_bypass_end; | ||
| 1379 | } | ||
| 1380 | } | ||
| 1381 | |||
| 1382 | spin_lock_irq(&q->queue_lock); | 1374 | spin_lock_irq(&q->queue_lock); |
| 1383 | 1375 | ||
| 1384 | /* blkg_list is pushed at the head, reverse walk to init parents first */ | 1376 | /* blkg_list is pushed at the head, reverse walk to allocate parents first */ |
| 1385 | list_for_each_entry_reverse(blkg, &q->blkg_list, q_node) { | 1377 | list_for_each_entry_reverse(blkg, &q->blkg_list, q_node) { |
| 1386 | struct blkg_policy_data *pd; | 1378 | struct blkg_policy_data *pd; |
| 1387 | 1379 | ||
| 1388 | if (blkg->pd[pol->plid]) | 1380 | if (blkg->pd[pol->plid]) |
| 1389 | continue; | 1381 | continue; |
| 1390 | 1382 | ||
| 1391 | pd = pol->pd_alloc_fn(GFP_NOWAIT | __GFP_NOWARN, q, &blkcg_root); | 1383 | /* If prealloc matches, use it; otherwise try GFP_NOWAIT */ |
| 1392 | if (!pd) | 1384 | if (blkg == pinned_blkg) { |
| 1393 | swap(pd, pd_prealloc); | 1385 | pd = pd_prealloc; |
| 1386 | pd_prealloc = NULL; | ||
| 1387 | } else { | ||
| 1388 | pd = pol->pd_alloc_fn(GFP_NOWAIT | __GFP_NOWARN, q, | ||
| 1389 | blkg->blkcg); | ||
| 1390 | } | ||
| 1391 | |||
| 1394 | if (!pd) { | 1392 | if (!pd) { |
| 1393 | /* | ||
| 1394 | * GFP_NOWAIT failed. Free the existing one and | ||
| 1395 | * prealloc for @blkg w/ GFP_KERNEL. | ||
| 1396 | */ | ||
| 1397 | if (pinned_blkg) | ||
| 1398 | blkg_put(pinned_blkg); | ||
| 1399 | blkg_get(blkg); | ||
| 1400 | pinned_blkg = blkg; | ||
| 1401 | |||
| 1395 | spin_unlock_irq(&q->queue_lock); | 1402 | spin_unlock_irq(&q->queue_lock); |
| 1396 | goto pd_prealloc; | 1403 | |
| 1404 | if (pd_prealloc) | ||
| 1405 | pol->pd_free_fn(pd_prealloc); | ||
| 1406 | pd_prealloc = pol->pd_alloc_fn(GFP_KERNEL, q, | ||
| 1407 | blkg->blkcg); | ||
| 1408 | if (pd_prealloc) | ||
| 1409 | goto retry; | ||
| 1410 | else | ||
| 1411 | goto enomem; | ||
| 1397 | } | 1412 | } |
| 1398 | 1413 | ||
| 1399 | blkg->pd[pol->plid] = pd; | 1414 | blkg->pd[pol->plid] = pd; |
| 1400 | pd->blkg = blkg; | 1415 | pd->blkg = blkg; |
| 1401 | pd->plid = pol->plid; | 1416 | pd->plid = pol->plid; |
| 1402 | if (pol->pd_init_fn) | ||
| 1403 | pol->pd_init_fn(pd); | ||
| 1404 | } | 1417 | } |
| 1405 | 1418 | ||
| 1419 | /* all allocated, init in the same order */ | ||
| 1420 | if (pol->pd_init_fn) | ||
| 1421 | list_for_each_entry_reverse(blkg, &q->blkg_list, q_node) | ||
| 1422 | pol->pd_init_fn(blkg->pd[pol->plid]); | ||
| 1423 | |||
| 1406 | __set_bit(pol->plid, q->blkcg_pols); | 1424 | __set_bit(pol->plid, q->blkcg_pols); |
| 1407 | ret = 0; | 1425 | ret = 0; |
| 1408 | 1426 | ||
| 1409 | spin_unlock_irq(&q->queue_lock); | 1427 | spin_unlock_irq(&q->queue_lock); |
| 1410 | out_bypass_end: | 1428 | out: |
| 1411 | if (queue_is_mq(q)) | 1429 | if (queue_is_mq(q)) |
| 1412 | blk_mq_unfreeze_queue(q); | 1430 | blk_mq_unfreeze_queue(q); |
| 1431 | if (pinned_blkg) | ||
| 1432 | blkg_put(pinned_blkg); | ||
| 1413 | if (pd_prealloc) | 1433 | if (pd_prealloc) |
| 1414 | pol->pd_free_fn(pd_prealloc); | 1434 | pol->pd_free_fn(pd_prealloc); |
| 1415 | return ret; | 1435 | return ret; |
| 1436 | |||
| 1437 | enomem: | ||
| 1438 | /* alloc failed, nothing's initialized yet, free everything */ | ||
| 1439 | spin_lock_irq(&q->queue_lock); | ||
| 1440 | list_for_each_entry(blkg, &q->blkg_list, q_node) { | ||
| 1441 | if (blkg->pd[pol->plid]) { | ||
| 1442 | pol->pd_free_fn(blkg->pd[pol->plid]); | ||
| 1443 | blkg->pd[pol->plid] = NULL; | ||
| 1444 | } | ||
| 1445 | } | ||
| 1446 | spin_unlock_irq(&q->queue_lock); | ||
| 1447 | ret = -ENOMEM; | ||
| 1448 | goto out; | ||
| 1416 | } | 1449 | } |
| 1417 | EXPORT_SYMBOL_GPL(blkcg_activate_policy); | 1450 | EXPORT_SYMBOL_GPL(blkcg_activate_policy); |
| 1418 | 1451 | ||
| @@ -1992,10 +1992,14 @@ static blk_qc_t blk_mq_make_request(struct request_queue *q, struct bio *bio) · 1991 unmodified lines | |||
| 1992 | /* bypass scheduler for flush rq */ | 1992 | /* bypass scheduler for flush rq */ |
| 1993 | blk_insert_flush(rq); | 1993 | blk_insert_flush(rq); |
| 1994 | blk_mq_run_hw_queue(data.hctx, true); | 1994 | blk_mq_run_hw_queue(data.hctx, true); |
| 1995 | } else if (plug && (q->nr_hw_queues == 1 || q->mq_ops->commit_rqs)) { | 1995 | } else if (plug && (q->nr_hw_queues == 1 || q->mq_ops->commit_rqs || |
| 1996 | !blk_queue_nonrot(q))) { | ||
| 1996 | /* | 1997 | /* |
| 1997 | * Use plugging if we have a ->commit_rqs() hook as well, as | 1998 | * Use plugging if we have a ->commit_rqs() hook as well, as |
| 1998 | * we know the driver uses bd->last in a smart fashion. | 1999 | * we know the driver uses bd->last in a smart fashion. |
| 2000 | * | ||
| 2001 | * Use normal plugging if this disk is slow HDD, as sequential | ||
| 2002 | * IO may benefit a lot from plug merging. | ||
| 1999 | */ | 2003 | */ |
| 2000 | unsigned int request_count = plug->rq_count; | 2004 | unsigned int request_count = plug->rq_count; |
| 2001 | struct request *last = NULL; | 2005 | struct request *last = NULL; |
| @@ -2012,6 +2016,8 @@ static blk_qc_t blk_mq_make_request(struct request_queue *q, struct bio *bio) · 10 unmodified lines | |||
| 2012 | } | 2016 | } |
| 2013 | 2017 | ||
| 2014 | blk_add_rq_to_plug(plug, rq); | 2018 | blk_add_rq_to_plug(plug, rq); |
| 2019 | } else if (q->elevator) { | ||
| 2020 | blk_mq_sched_insert_request(rq, false, true, true); | ||
| 2015 | } else if (plug && !blk_queue_nomerges(q)) { | 2021 | } else if (plug && !blk_queue_nomerges(q)) { |
| 2016 | /* | 2022 | /* |
| 2017 | * We do limited plugging. If the bio can be merged, do that. | 2023 | * We do limited plugging. If the bio can be merged, do that. |
| @@ -2035,8 +2041,8 @@ static blk_qc_t blk_mq_make_request(struct request_queue *q, struct bio *bio) · 17 unmodified lines | |||
| 2035 | blk_mq_try_issue_directly(data.hctx, same_queue_rq, | 2041 | blk_mq_try_issue_directly(data.hctx, same_queue_rq, |
| 2036 | &cookie); | 2042 | &cookie); |
| 2037 | } | 2043 | } |
| 2038 | } else if ((q->nr_hw_queues > 1 && is_sync) || (!q->elevator && | 2044 | } else if ((q->nr_hw_queues > 1 && is_sync) || |
| 2039 | !data.hctx->dispatch_busy)) { | 2045 | !data.hctx->dispatch_busy) { |
| 2040 | blk_mq_try_issue_directly(data.hctx, rq, &cookie); | 2046 | blk_mq_try_issue_directly(data.hctx, rq, &cookie); |
| 2041 | } else { | 2047 | } else { |
| 2042 | blk_mq_sched_insert_request(rq, false, true, true); | 2048 | blk_mq_sched_insert_request(rq, false, true, true); |
| @@ -160,24 +160,27 @@ bool rq_depth_calc_max_depth(struct rq_depth *rqd) · 159 unmodified lines | |||
| 160 | return ret; | 160 | return ret; |
| 161 | } | 161 | } |
| 162 | 162 | ||
| 163 | void rq_depth_scale_up(struct rq_depth *rqd) | 163 | /* Returns true on success and false if scaling up wasn't possible */ |
| 164 | bool rq_depth_scale_up(struct rq_depth *rqd) | ||
| 164 | { | 165 | { |
| 165 | /* | 166 | /* |
| 166 | * Hit max in previous round, stop here | 167 | * Hit max in previous round, stop here |
| 167 | */ | 168 | */ |
| 168 | if (rqd->scaled_max) | 169 | if (rqd->scaled_max) |
| 169 | return; | 170 | return false; |
| 170 | 171 | ||
| 171 | rqd->scale_step--; | 172 | rqd->scale_step--; |
| 172 | 173 | ||
| 173 | rqd->scaled_max = rq_depth_calc_max_depth(rqd); | 174 | rqd->scaled_max = rq_depth_calc_max_depth(rqd); |
| 175 | return true; | ||
| 174 | } | 176 | } |
| 175 | 177 | ||
| 176 | /* | 178 | /* |
| 177 | * Scale rwb down. If 'hard_throttle' is set, do it quicker, since we | 179 | * Scale rwb down. If 'hard_throttle' is set, do it quicker, since we |
| 178 | * had a latency violation. | 180 | * had a latency violation. Returns true on success and returns false if |
| 181 | * scaling down wasn't possible. | ||
| 179 | */ | 182 | */ |
| 180 | void rq_depth_scale_down(struct rq_depth *rqd, bool hard_throttle) | 183 | bool rq_depth_scale_down(struct rq_depth *rqd, bool hard_throttle) |
| 181 | { | 184 | { |
| 182 | /* | 185 | /* |
| 183 | * Stop scaling down when we've hit the limit. This also prevents | 186 | * Stop scaling down when we've hit the limit. This also prevents |
| @@ -185,7 +188,7 @@ void rq_depth_scale_down(struct rq_depth *rqd, bool hard_throttle) · 1 unmodified line | |||
| 185 | * keep up. | 188 | * keep up. |
| 186 | */ | 189 | */ |
| 187 | if (rqd->max_depth == 1) | 190 | if (rqd->max_depth == 1) |
| 188 | return; | 191 | return false; |
| 189 | 192 | ||
| 190 | if (rqd->scale_step < 0 && hard_throttle) | 193 | if (rqd->scale_step < 0 && hard_throttle) |
| 191 | rqd->scale_step = 0; | 194 | rqd->scale_step = 0; |
| @@ -194,6 +197,7 @@ void rq_depth_scale_down(struct rq_depth *rqd, bool hard_throttle) · 2 unmodified lines | |||
| 194 | 197 | ||
| 195 | rqd->scaled_max = false; | 198 | rqd->scaled_max = false; |
| 196 | rq_depth_calc_max_depth(rqd); | 199 | rq_depth_calc_max_depth(rqd); |
| 200 | return true; | ||
| 197 | } | 201 | } |
| 198 | 202 | ||
| 199 | struct rq_qos_wait_data { | 203 | struct rq_qos_wait_data { |
| @@ -108,16 +108,13 @@ static inline void rq_qos_add(struct request_queue *q, struct rq_qos *rqos) · 107 unmodified lines | |||
| 108 | 108 | ||
| 109 | static inline void rq_qos_del(struct request_queue *q, struct rq_qos *rqos) | 109 | static inline void rq_qos_del(struct request_queue *q, struct rq_qos *rqos) |
| 110 | { | 110 | { |
| 111 | struct rq_qos *cur, *prev = NULL; | 111 | struct rq_qos **cur; |
| 112 | for (cur = q->rq_qos; cur; cur = cur->next) { | 112 | |
| 113 | if (cur == rqos) { | 113 | for (cur = &q->rq_qos; *cur; cur = &(*cur)->next) { |
| 114 | if (prev) | 114 | if (*cur == rqos) { |
| 115 | prev->next = rqos->next; | 115 | *cur = rqos->next; |
| 116 | else | ||
| 117 | q->rq_qos = cur; | ||
| 118 | break; | 116 | break; |
| 119 | } | 117 | } |
| 120 | prev = cur; | ||
| 121 | } | 118 | } |
| 122 | 119 | ||
| 123 | blk_mq_debugfs_unregister_rqos(rqos); | 120 | blk_mq_debugfs_unregister_rqos(rqos); |
| @@ -130,8 +127,8 @@ void rq_qos_wait(struct rq_wait *rqw, void *private_data, · 6 unmodified lines | |||
| 130 | acquire_inflight_cb_t *acquire_inflight_cb, | 127 | acquire_inflight_cb_t *acquire_inflight_cb, |
| 131 | cleanup_cb_t *cleanup_cb); | 128 | cleanup_cb_t *cleanup_cb); |
| 132 | bool rq_wait_inc_below(struct rq_wait *rq_wait, unsigned int limit); | 129 | bool rq_wait_inc_below(struct rq_wait *rq_wait, unsigned int limit); |
| 133 | void rq_depth_scale_up(struct rq_depth *rqd); | 130 | bool rq_depth_scale_up(struct rq_depth *rqd); |
| 134 | void rq_depth_scale_down(struct rq_depth *rqd, bool hard_throttle); | 131 | bool rq_depth_scale_down(struct rq_depth *rqd, bool hard_throttle); |
| 135 | bool rq_depth_calc_max_depth(struct rq_depth *rqd); | 132 | bool rq_depth_calc_max_depth(struct rq_depth *rqd); |
| 136 | 133 | ||
| 137 | void __rq_qos_cleanup(struct rq_qos *rqos, struct bio *bio); | 134 | void __rq_qos_cleanup(struct rq_qos *rqos, struct bio *bio); |
| @@ -308,7 +308,8 @@ static void calc_wb_limits(struct rq_wb *rwb) · 307 unmodified lines | |||
| 308 | 308 | ||
| 309 | static void scale_up(struct rq_wb *rwb) | 309 | static void scale_up(struct rq_wb *rwb) |
| 310 | { | 310 | { |
| 311 | rq_depth_scale_up(&rwb->rq_depth); | 311 | if (!rq_depth_scale_up(&rwb->rq_depth)) |
| 312 | return; | ||
| 312 | calc_wb_limits(rwb); | 313 | calc_wb_limits(rwb); |
| 313 | rwb->unknown_cnt = 0; | 314 | rwb->unknown_cnt = 0; |
| 314 | rwb_wake_all(rwb); | 315 | rwb_wake_all(rwb); |
| @@ -317,7 +318,8 @@ static void scale_up(struct rq_wb *rwb) · 2 unmodified lines | |||
| 317 | 318 | ||
| 318 | static void scale_down(struct rq_wb *rwb, bool hard_throttle) | 319 | static void scale_down(struct rq_wb *rwb, bool hard_throttle) |
| 319 | { | 320 | { |
| 320 | rq_depth_scale_down(&rwb->rq_depth, hard_throttle); | 321 | if (!rq_depth_scale_down(&rwb->rq_depth, hard_throttle)) |
| 322 | return; | ||
| 321 | calc_wb_limits(rwb); | 323 | calc_wb_limits(rwb); |
| 322 | rwb->unknown_cnt = 0; | 324 | rwb->unknown_cnt = 0; |
| 323 | rwb_trace_step(rwb, "scale down"); | 325 | rwb_trace_step(rwb, "scale down"); |
| @@ -616,7 +616,8 @@ out: · 615 unmodified lines | |||
| 616 | 616 | ||
| 617 | static inline bool elv_support_iosched(struct request_queue *q) | 617 | static inline bool elv_support_iosched(struct request_queue *q) |
| 618 | { | 618 | { |
| 619 | if (q->tag_set && (q->tag_set->flags & BLK_MQ_F_NO_SCHED)) | 619 | if (!q->mq_ops || |
| 620 | (q->tag_set && (q->tag_set->flags & BLK_MQ_F_NO_SCHED))) | ||
| 620 | return false; | 621 | return false; |
| 621 | return true; | 622 | return true; |
| 622 | } | 623 | } |
| @@ -129,7 +129,7 @@ static const u8 opaluid[][OPAL_UID_LENGTH] = { · 128 unmodified lines | |||
| 129 | { 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x84, 0x01 }, | 129 | { 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x84, 0x01 }, |
| 130 | 130 | ||
| 131 | /* tables */ | 131 | /* tables */ |
| 132 | [OPAL_TABLE_TABLE] | 132 | [OPAL_TABLE_TABLE] = |
| 133 | { 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01 }, | 133 | { 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01 }, |
| 134 | [OPAL_LOCKINGRANGE_GLOBAL] = | 134 | [OPAL_LOCKINGRANGE_GLOBAL] = |
| 135 | { 0x00, 0x00, 0x08, 0x02, 0x00, 0x00, 0x00, 0x01 }, | 135 | { 0x00, 0x00, 0x08, 0x02, 0x00, 0x00, 0x00, 0x01 }, |
| @@ -372,8 +372,8 @@ static void check_geometry(struct opal_dev *dev, const void *data) · 236 unmodified lines | |||
| 372 | { | 372 | { |
| 373 | const struct d0_geometry_features *geo = data; | 373 | const struct d0_geometry_features *geo = data; |
| 374 | 374 | ||
| 375 | dev->align = geo->alignment_granularity; | 375 | dev->align = be64_to_cpu(geo->alignment_granularity); |
| 376 | dev->lowest_lba = geo->lowest_aligned_lba; | 376 | dev->lowest_lba = be64_to_cpu(geo->lowest_aligned_lba); |
| 377 | } | 377 | } |
| 378 | 378 | ||
| 379 | static int execute_step(struct opal_dev *dev, | 379 | static int execute_step(struct opal_dev *dev, |
| @@ -905,8 +905,8 @@ void acpi_cppc_processor_exit(struct acpi_processor *pr) · 904 unmodified lines | |||
| 905 | pcc_data[pcc_ss_id]->refcount--; | 905 | pcc_data[pcc_ss_id]->refcount--; |
| 906 | if (!pcc_data[pcc_ss_id]->refcount) { | 906 | if (!pcc_data[pcc_ss_id]->refcount) { |
| 907 | pcc_mbox_free_channel(pcc_data[pcc_ss_id]->pcc_channel); | 907 | pcc_mbox_free_channel(pcc_data[pcc_ss_id]->pcc_channel); |
| 908 | pcc_data[pcc_ss_id]->pcc_channel_acquired = 0; | ||
| 909 | kfree(pcc_data[pcc_ss_id]); | 908 | kfree(pcc_data[pcc_ss_id]); |
| 909 | pcc_data[pcc_ss_id] = NULL; | ||
| 910 | } | 910 | } |
| 911 | } | 911 | } |
| 912 | } | 912 | } |
| @@ -403,7 +403,7 @@ static int __init hmat_parse_proximity_domain(union acpi_subtable_headers *heade · 402 unmodified lines | |||
| 403 | pr_info("HMAT: Memory Flags:%04x Processor Domain:%d Memory Domain:%d\n", | 403 | pr_info("HMAT: Memory Flags:%04x Processor Domain:%d Memory Domain:%d\n", |
| 404 | p->flags, p->processor_PD, p->memory_PD); | 404 | p->flags, p->processor_PD, p->memory_PD); |
| 405 | 405 | ||
| 406 | if (p->flags & ACPI_HMAT_MEMORY_PD_VALID) { | 406 | if (p->flags & ACPI_HMAT_MEMORY_PD_VALID && hmat_revision == 1) { |
| 407 | target = find_mem_target(p->memory_PD); | 407 | target = find_mem_target(p->memory_PD); |
| 408 | if (!target) { | 408 | if (!target) { |
| 409 | pr_debug("HMAT: Memory Domain missing from SRAT\n"); | 409 | pr_debug("HMAT: Memory Domain missing from SRAT\n"); |
| @@ -162,21 +162,23 @@ void acpi_processor_ppc_init(int cpu) · 161 unmodified lines | |||
| 162 | struct acpi_processor *pr = per_cpu(processors, cpu); | 162 | struct acpi_processor *pr = per_cpu(processors, cpu); |
| 163 | int ret; | 163 | int ret; |
| 164 | 164 | ||
| 165 | if (!pr) | ||
| 166 | return; | ||
| 167 | |||
| 165 | ret = dev_pm_qos_add_request(get_cpu_device(cpu), | 168 | ret = dev_pm_qos_add_request(get_cpu_device(cpu), |
| 166 | &pr->perflib_req, DEV_PM_QOS_MAX_FREQUENCY, | 169 | &pr->perflib_req, DEV_PM_QOS_MAX_FREQUENCY, |
| 167 | INT_MAX); | 170 | INT_MAX); |
| 168 | if (ret < 0) { | 171 | if (ret < 0) |
| 169 | pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu, | 172 | pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu, |
| 170 | ret); | 173 | ret); |
| 171 | return; | ||
| 172 | } | ||
| 173 | } | 174 | } |
| 174 | 175 | ||
| 175 | void acpi_processor_ppc_exit(int cpu) | 176 | void acpi_processor_ppc_exit(int cpu) |
| 176 | { | 177 | { |
| 177 | struct acpi_processor *pr = per_cpu(processors, cpu); | 178 | struct acpi_processor *pr = per_cpu(processors, cpu); |
| 178 | 179 | ||
| 179 | dev_pm_qos_remove_request(&pr->perflib_req); | 180 | if (pr) |
| 181 | dev_pm_qos_remove_request(&pr->perflib_req); | ||
| 180 | } | 182 | } |
| 181 | 183 | ||
| 182 | static int acpi_processor_get_performance_control(struct acpi_processor *pr) | 184 | static int acpi_processor_get_performance_control(struct acpi_processor *pr) |
| @@ -130,21 +130,23 @@ void acpi_thermal_cpufreq_init(int cpu) · 129 unmodified lines | |||
| 130 | struct acpi_processor *pr = per_cpu(processors, cpu); | 130 | struct acpi_processor *pr = per_cpu(processors, cpu); |
| 131 | int ret; | 131 | int ret; |
| 132 | 132 | ||
| 133 | if (!pr) | ||
| 134 | return; | ||
| 135 | |||
| 133 | ret = dev_pm_qos_add_request(get_cpu_device(cpu), | 136 | ret = dev_pm_qos_add_request(get_cpu_device(cpu), |
| 134 | &pr->thermal_req, DEV_PM_QOS_MAX_FREQUENCY, | 137 | &pr->thermal_req, DEV_PM_QOS_MAX_FREQUENCY, |
| 135 | INT_MAX); | 138 | INT_MAX); |
| 136 | if (ret < 0) { | 139 | if (ret < 0) |
| 137 | pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu, | 140 | pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu, |
| 138 | ret); | 141 | ret); |
| 139 | return; | ||
| 140 | } | ||
| 141 | } | 142 | } |
| 142 | 143 | ||
| 143 | void acpi_thermal_cpufreq_exit(int cpu) | 144 | void acpi_thermal_cpufreq_exit(int cpu) |
| 144 | { | 145 | { |
| 145 | struct acpi_processor *pr = per_cpu(processors, cpu); | 146 | struct acpi_processor *pr = per_cpu(processors, cpu); |
| 146 | 147 | ||
| 147 | dev_pm_qos_remove_request(&pr->thermal_req); | 148 | if (pr) |
| 149 | dev_pm_qos_remove_request(&pr->thermal_req); | ||
| 148 | } | 150 | } |
| 149 | #else /* ! CONFIG_CPU_FREQ */ | 151 | #else /* ! CONFIG_CPU_FREQ */ |
| 150 | static int cpufreq_get_max_state(unsigned int cpu) | 152 | static int cpufreq_get_max_state(unsigned int cpu) |
| @@ -361,19 +361,6 @@ static const struct dmi_system_id acpisleep_dmi_table[] __initconst = { · 360 unmodified lines | |||
| 361 | DMI_MATCH(DMI_PRODUCT_NAME, "80E3"), | 361 | DMI_MATCH(DMI_PRODUCT_NAME, "80E3"), |
| 362 | }, | 362 | }, |
| 363 | }, | 363 | }, |
| 364 | /* | ||
| 365 | * https://bugzilla.kernel.org/show_bug.cgi?id=196907 | ||
| 366 | * Some Dell XPS13 9360 cannot do suspend-to-idle using the Low Power | ||
| 367 | * S0 Idle firmware interface. | ||
| 368 | */ | ||
| 369 | { | ||
| 370 | .callback = init_default_s3, | ||
| 371 | .ident = "Dell XPS13 9360", | ||
| 372 | .matches = { | ||
| 373 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | ||
| 374 | DMI_MATCH(DMI_PRODUCT_NAME, "XPS 13 9360"), | ||
| 375 | }, | ||
| 376 | }, | ||
| 377 | /* | 364 | /* |
| 378 | * ThinkPad X1 Tablet(2016) cannot do suspend-to-idle using | 365 | * ThinkPad X1 Tablet(2016) cannot do suspend-to-idle using |
| 379 | * the Low Power S0 Idle firmware interface (see | 366 | * the Low Power S0 Idle firmware interface (see |
| @@ -57,6 +57,7 @@ · 56 unmodified lines | |||
| 57 | #include <linux/sched/signal.h> | 57 | #include <linux/sched/signal.h> |
| 58 | #include <linux/sched/mm.h> | 58 | #include <linux/sched/mm.h> |
| 59 | #include <linux/seq_file.h> | 59 | #include <linux/seq_file.h> |
| 60 | #include <linux/string.h> | ||
| 60 | #include <linux/uaccess.h> | 61 | #include <linux/uaccess.h> |
| 61 | #include <linux/pid_namespace.h> | 62 | #include <linux/pid_namespace.h> |
| 62 | #include <linux/security.h> | 63 | #include <linux/security.h> |
| @@ -66,6 +67,7 @@ · 3 unmodified lines | |||
| 66 | #include <linux/task_work.h> | 67 | #include <linux/task_work.h> |
| 67 | 68 | ||
| 68 | #include <uapi/linux/android/binder.h> | 69 | #include <uapi/linux/android/binder.h> |
| 70 | #include <uapi/linux/android/binderfs.h> | ||
| 69 | 71 | ||
| 70 | #include <asm/cacheflush.h> | 72 | #include <asm/cacheflush.h> |
| 71 | 73 | ||
| @@ -2876,7 +2878,7 @@ static void binder_transaction(struct binder_proc *proc, · 2804 unmodified lines | |||
| 2876 | e->target_handle = tr->target.handle; | 2878 | e->target_handle = tr->target.handle; |
| 2877 | e->data_size = tr->data_size; | 2879 | e->data_size = tr->data_size; |
| 2878 | e->offsets_size = tr->offsets_size; | 2880 | e->offsets_size = tr->offsets_size; |
| 2879 | e->context_name = proc->context->name; | 2881 | strscpy(e->context_name, proc->context->name, BINDERFS_MAX_NAME); |
| 2880 | 2882 | ||
| 2881 | if (reply) { | 2883 | if (reply) { |
| 2882 | binder_inner_proc_lock(proc); | 2884 | binder_inner_proc_lock(proc); |
| @@ -156,7 +156,7 @@ static struct binder_buffer *binder_alloc_prepare_to_free_locked( · 155 unmodified lines | |||
| 156 | } | 156 | } |
| 157 | 157 | ||
| 158 | /** | 158 | /** |
| 159 | * binder_alloc_buffer_lookup() - get buffer given user ptr | 159 | * binder_alloc_prepare_to_free() - get buffer given user ptr |
| 160 | * @alloc: binder_alloc for this proc | 160 | * @alloc: binder_alloc for this proc |
| 161 | * @user_ptr: User pointer to buffer data | 161 | * @user_ptr: User pointer to buffer data |
| 162 | * | 162 | * |
| @@ -130,7 +130,7 @@ struct binder_transaction_log_entry { · 129 unmodified lines | |||
| 130 | int return_error_line; | 130 | int return_error_line; |
| 131 | uint32_t return_error; | 131 | uint32_t return_error; |
| 132 | uint32_t return_error_param; | 132 | uint32_t return_error_param; |
| 133 | const char *context_name; | 133 | char context_name[BINDERFS_MAX_NAME + 1]; |
| 134 | }; | 134 | }; |
| 135 | 135 | ||
| 136 | struct binder_transaction_log { | 136 | struct binder_transaction_log { |
| @@ -1600,7 +1600,9 @@ static void ahci_intel_pcs_quirk(struct pci_dev *pdev, struct ahci_host_priv *hp · 1599 unmodified lines | |||
| 1600 | */ | 1600 | */ |
| 1601 | if (!id || id->vendor != PCI_VENDOR_ID_INTEL) | 1601 | if (!id || id->vendor != PCI_VENDOR_ID_INTEL) |
| 1602 | return; | 1602 | return; |
| 1603 | if (((enum board_ids) id->driver_data) < board_ahci_pcs7) | 1603 | |
| 1604 | /* Skip applying the quirk on Denverton and beyond */ | ||
| 1605 | if (((enum board_ids) id->driver_data) >= board_ahci_pcs7) | ||
| 1604 | return; | 1606 | return; |
| 1605 | 1607 | ||
| 1606 | /* | 1608 | /* |
| @@ -4791,27 +4791,6 @@ void ata_scsi_hotplug(struct work_struct *work) · 4790 unmodified lines | |||
| 4791 | return; | 4791 | return; |
| 4792 | } | 4792 | } |
| 4793 | 4793 | ||
| 4794 | /* | ||
| 4795 | * XXX - UGLY HACK | ||
| 4796 | * | ||
| 4797 | * The block layer suspend/resume path is fundamentally broken due | ||
| 4798 | * to freezable kthreads and workqueue and may deadlock if a block | ||
| 4799 | * device gets removed while resume is in progress. I don't know | ||
| 4800 | * what the solution is short of removing freezable kthreads and | ||
| 4801 | * workqueues altogether. | ||
| 4802 | * | ||
| 4803 | * The following is an ugly hack to avoid kicking off device | ||
| 4804 | * removal while freezer is active. This is a joke but does avoid | ||
| 4805 | * this particular deadlock scenario. | ||
| 4806 | * | ||
| 4807 | * https://bugzilla.kernel.org/show_bug.cgi?id=62801 | ||
| 4808 | * http://marc.info/?l=linux-kernel&m=138695698516487 | ||
| 4809 | */ | ||
| 4810 | #ifdef CONFIG_FREEZER | ||
| 4811 | while (pm_freezing) | ||
| 4812 | msleep(10); | ||
| 4813 | #endif | ||
| 4814 | |||
| 4815 | DPRINTK("ENTER\n"); | 4794 | DPRINTK("ENTER\n"); |
| 4816 | mutex_lock(&ap->scsi_scan_mutex); | 4795 | mutex_lock(&ap->scsi_scan_mutex); |
| 4817 | 4796 | ||
| @@ -9,6 +9,7 @@ · 8 unmodified lines | |||
| 9 | */ | 9 | */ |
| 10 | 10 | ||
| 11 | #include <linux/acpi.h> | 11 | #include <linux/acpi.h> |
| 12 | #include <linux/cpufreq.h> | ||
| 12 | #include <linux/device.h> | 13 | #include <linux/device.h> |
| 13 | #include <linux/err.h> | 14 | #include <linux/err.h> |
| 14 | #include <linux/fwnode.h> | 15 | #include <linux/fwnode.h> |
| @@ -3179,6 +3180,8 @@ void device_shutdown(void) · 3164 unmodified lines | |||
| 3179 | wait_for_device_probe(); | 3180 | wait_for_device_probe(); |
| 3180 | device_block_probing(); | 3181 | device_block_probing(); |
| 3181 | 3182 | ||
| 3183 | cpufreq_suspend(); | ||
| 3184 | |||
| 3182 | spin_lock(&devices_kset->list_lock); | 3185 | spin_lock(&devices_kset->list_lock); |
| 3183 | /* | 3186 | /* |
| 3184 | * Walk the devices list backward, shutting down each in turn. | 3187 | * Walk the devices list backward, shutting down each in turn. |
| @@ -540,6 +540,9 @@ static ssize_t soft_offline_page_store(struct device *dev, · 539 unmodified lines | |||
| 540 | pfn >>= PAGE_SHIFT; | 540 | pfn >>= PAGE_SHIFT; |
| 541 | if (!pfn_valid(pfn)) | 541 | if (!pfn_valid(pfn)) |
| 542 | return -ENXIO; | 542 | return -ENXIO; |
| 543 | /* Only online pages can be soft-offlined (esp., not ZONE_DEVICE). */ | ||
| 544 | if (!pfn_to_online_page(pfn)) | ||
| 545 | return -EIO; | ||
| 543 | ret = soft_offline_page(pfn_to_page(pfn), 0); | 546 | ret = soft_offline_page(pfn_to_page(pfn), 0); |
| 544 | return ret == 0 ? count : ret; | 547 | return ret == 0 ? count : ret; |
| 545 | } | 548 | } |
| @@ -241,12 +241,8 @@ struct resource *platform_get_resource_byname(struct platform_device *dev, · 240 unmodified lines | |||
| 241 | } | 241 | } |
| 242 | EXPORT_SYMBOL_GPL(platform_get_resource_byname); | 242 | EXPORT_SYMBOL_GPL(platform_get_resource_byname); |
| 243 | 243 | ||
| 244 | /** | 244 | static int __platform_get_irq_byname(struct platform_device *dev, |
| 245 | * platform_get_irq_byname - get an IRQ for a device by name | 245 | const char *name) |
| 246 | * @dev: platform device | ||
| 247 | * @name: IRQ name | ||
| 248 | */ | ||
| 249 | int platform_get_irq_byname(struct platform_device *dev, const char *name) | ||
| 250 | { | 246 | { |
| 251 | struct resource *r; | 247 | struct resource *r; |
| 252 | 248 | ||
| @@ -262,11 +258,47 @@ int platform_get_irq_byname(struct platform_device *dev, const char *name) · 9 unmodified lines | |||
| 262 | if (r) | 258 | if (r) |
| 263 | return r->start; | 259 | return r->start; |
| 264 | 260 | ||
| 265 | dev_err(&dev->dev, "IRQ %s not found\n", name); | ||
| 266 | return -ENXIO; | 261 | return -ENXIO; |
| 267 | } | 262 | } |
| 263 | |||
| 264 | /** | ||
| 265 | * platform_get_irq_byname - get an IRQ for a device by name | ||
| 266 | * @dev: platform device | ||
| 267 | * @name: IRQ name | ||
| 268 | * | ||
| 269 | * Get an IRQ like platform_get_irq(), but then by name rather then by index. | ||
| 270 | * | ||
| 271 | * Return: IRQ number on success, negative error number on failure. | ||
| 272 | */ | ||
| 273 | int platform_get_irq_byname(struct platform_device *dev, const char *name) | ||
| 274 | { | ||
| 275 | int ret; | ||
| 276 | |||
| 277 | ret = __platform_get_irq_byname(dev, name); | ||
| 278 | if (ret < 0 && ret != -EPROBE_DEFER) | ||
| 279 | dev_err(&dev->dev, "IRQ %s not found\n", name); | ||
| 280 | |||
| 281 | return ret; | ||
| 282 | } | ||
| 268 | EXPORT_SYMBOL_GPL(platform_get_irq_byname); | 283 | EXPORT_SYMBOL_GPL(platform_get_irq_byname); |
| 269 | 284 | ||
| 285 | /** | ||
| 286 | * platform_get_irq_byname_optional - get an optional IRQ for a device by name | ||
| 287 | * @dev: platform device | ||
| 288 | * @name: IRQ name | ||
| 289 | * | ||
| 290 | * Get an optional IRQ by name like platform_get_irq_byname(). Except that it | ||
| 291 | * does not print an error message if an IRQ can not be obtained. | ||
| 292 | * | ||
| 293 | * Return: IRQ number on success, negative error number on failure. | ||
| 294 | */ | ||
| 295 | int platform_get_irq_byname_optional(struct platform_device *dev, | ||
| 296 | const char *name) | ||
| 297 | { | ||
| 298 | return __platform_get_irq_byname(dev, name); | ||
| 299 | } | ||
| 300 | EXPORT_SYMBOL_GPL(platform_get_irq_byname_optional); | ||
| 301 | |||
| 270 | /** | 302 | /** |
| 271 | * platform_add_devices - add a numbers of platform devices | 303 | * platform_add_devices - add a numbers of platform devices |
| 272 | * @devs: array of platform devices to add | 304 | * @devs: array of platform devices to add |
| @@ -994,6 +994,16 @@ static int loop_set_fd(struct loop_device *lo, fmode_t mode, · 993 unmodified lines | |||
| 994 | if (!(lo_flags & LO_FLAGS_READ_ONLY) && file->f_op->fsync) | 994 | if (!(lo_flags & LO_FLAGS_READ_ONLY) && file->f_op->fsync) |
| 995 | blk_queue_write_cache(lo->lo_queue, true, false); | 995 | blk_queue_write_cache(lo->lo_queue, true, false); |
| 996 | 996 | ||
| 997 | if (io_is_direct(lo->lo_backing_file) && inode->i_sb->s_bdev) { | ||
| 998 | /* In case of direct I/O, match underlying block size */ | ||
| 999 | unsigned short bsize = bdev_logical_block_size( | ||
| 1000 | inode->i_sb->s_bdev); | ||
| 1001 | |||
| 1002 | blk_queue_logical_block_size(lo->lo_queue, bsize); | ||
| 1003 | blk_queue_physical_block_size(lo->lo_queue, bsize); | ||
| 1004 | blk_queue_io_min(lo->lo_queue, bsize); | ||
| 1005 | } | ||
| 1006 | |||
| 997 | loop_update_rotational(lo); | 1007 | loop_update_rotational(lo); |
| 998 | loop_update_dio(lo); | 1008 | loop_update_dio(lo); |
| 999 | set_capacity(lo->lo_disk, size); | 1009 | set_capacity(lo->lo_disk, size); |
| @@ -248,8 +248,8 @@ static void nbd_put(struct nbd_device *nbd) · 247 unmodified lines | |||
| 248 | if (refcount_dec_and_mutex_lock(&nbd->refs, | 248 | if (refcount_dec_and_mutex_lock(&nbd->refs, |
| 249 | &nbd_index_mutex)) { | 249 | &nbd_index_mutex)) { |
| 250 | idr_remove(&nbd_index_idr, nbd->index); | 250 | idr_remove(&nbd_index_idr, nbd->index); |
| 251 | mutex_unlock(&nbd_index_mutex); | ||
| 252 | nbd_dev_remove(nbd); | 251 | nbd_dev_remove(nbd); |
| 252 | mutex_unlock(&nbd_index_mutex); | ||
| 253 | } | 253 | } |
| 254 | } | 254 | } |
| 255 | 255 | ||
| @@ -142,8 +142,7 @@ static blk_status_t null_zone_reset(struct nullb_cmd *cmd, sector_t sector) · 141 unmodified lines | |||
| 142 | zone->wp = zone->start; | 142 | zone->wp = zone->start; |
| 143 | break; | 143 | break; |
| 144 | default: | 144 | default: |
| 145 | cmd->error = BLK_STS_NOTSUPP; | 145 | return BLK_STS_NOTSUPP; |
| 146 | break; | ||
| 147 | } | 146 | } |
| 148 | return BLK_STS_OK; | 147 | return BLK_STS_OK; |
| 149 | } | 148 | } |
| @@ -6639,10 +6639,13 @@ static int rbd_add_acquire_lock(struct rbd_device *rbd_dev) · 6638 unmodified lines | |||
| 6639 | queue_delayed_work(rbd_dev->task_wq, &rbd_dev->lock_dwork, 0); | 6639 | queue_delayed_work(rbd_dev->task_wq, &rbd_dev->lock_dwork, 0); |
| 6640 | ret = wait_for_completion_killable_timeout(&rbd_dev->acquire_wait, | 6640 | ret = wait_for_completion_killable_timeout(&rbd_dev->acquire_wait, |
| 6641 | ceph_timeout_jiffies(rbd_dev->opts->lock_timeout)); | 6641 | ceph_timeout_jiffies(rbd_dev->opts->lock_timeout)); |
| 6642 | if (ret > 0) | 6642 | if (ret > 0) { |
| 6643 | ret = rbd_dev->acquire_err; | 6643 | ret = rbd_dev->acquire_err; |
| 6644 | else if (!ret) | 6644 | } else { |
| 6645 | ret = -ETIMEDOUT; | 6645 | cancel_delayed_work_sync(&rbd_dev->lock_dwork); |
| 6646 | if (!ret) | ||
| 6647 | ret = -ETIMEDOUT; | ||
| 6648 | } | ||
| 6646 | 6649 | ||
| 6647 | if (ret) { | 6650 | if (ret) { |
| 6648 | rbd_warn(rbd_dev, "failed to acquire exclusive lock: %ld", ret); | 6651 | rbd_warn(rbd_dev, "failed to acquire exclusive lock: %ld", ret); |
| @@ -413,13 +413,14 @@ static void reset_bdev(struct zram *zram) · 412 unmodified lines | |||
| 413 | static ssize_t backing_dev_show(struct device *dev, | 413 | static ssize_t backing_dev_show(struct device *dev, |
| 414 | struct device_attribute *attr, char *buf) | 414 | struct device_attribute *attr, char *buf) |
| 415 | { | 415 | { |
| 416 | struct file *file; | ||
| 416 | struct zram *zram = dev_to_zram(dev); | 417 | struct zram *zram = dev_to_zram(dev); |
| 417 | struct file *file = zram->backing_dev; | ||
| 418 | char *p; | 418 | char *p; |
| 419 | ssize_t ret; | 419 | ssize_t ret; |
| 420 | 420 | ||
| 421 | down_read(&zram->init_lock); | 421 | down_read(&zram->init_lock); |
| 422 | if (!zram->backing_dev) { | 422 | file = zram->backing_dev; |
| 423 | if (!file) { | ||
| 423 | memcpy(buf, "none\n", 5); | 424 | memcpy(buf, "none\n", 5); |
| 424 | up_read(&zram->init_lock); | 425 | up_read(&zram->init_lock); |
| 425 | return 5; | 426 | return 5; |
| @@ -2520,4 +2520,4 @@ void add_bootloader_randomness(const void *buf, unsigned int size) · 2519 unmodified lines | |||
| 2520 | else | 2520 | else |
| 2521 | add_device_randomness(buf, size); | 2521 | add_device_randomness(buf, size); |
| 2522 | } | 2522 | } |
| 2523 | EXPORT_SYMBOL_GPL(add_bootloader_randomness); | 2523 | EXPORT_SYMBOL_GPL(add_bootloader_randomness); |
| @@ -683,7 +683,7 @@ static const struct omap_clkctrl_reg_data dra7_l4per2_clkctrl_regs[] __initconst · 682 unmodified lines | |||
| 683 | { DRA7_L4PER2_MCASP2_CLKCTRL, dra7_mcasp2_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:0154:22" }, | 683 | { DRA7_L4PER2_MCASP2_CLKCTRL, dra7_mcasp2_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:0154:22" }, |
| 684 | { DRA7_L4PER2_MCASP3_CLKCTRL, dra7_mcasp3_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:015c:22" }, | 684 | { DRA7_L4PER2_MCASP3_CLKCTRL, dra7_mcasp3_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:015c:22" }, |
| 685 | { DRA7_L4PER2_MCASP5_CLKCTRL, dra7_mcasp5_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:016c:22" }, | 685 | { DRA7_L4PER2_MCASP5_CLKCTRL, dra7_mcasp5_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:016c:22" }, |
| 686 | { DRA7_L4PER2_MCASP8_CLKCTRL, dra7_mcasp8_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:0184:24" }, | 686 | { DRA7_L4PER2_MCASP8_CLKCTRL, dra7_mcasp8_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:0184:22" }, |
| 687 | { DRA7_L4PER2_MCASP4_CLKCTRL, dra7_mcasp4_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:018c:22" }, | 687 | { DRA7_L4PER2_MCASP4_CLKCTRL, dra7_mcasp4_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:018c:22" }, |
| 688 | { DRA7_L4PER2_UART7_CLKCTRL, dra7_uart7_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:01c4:24" }, | 688 | { DRA7_L4PER2_UART7_CLKCTRL, dra7_uart7_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:01c4:24" }, |
| 689 | { DRA7_L4PER2_UART8_CLKCTRL, dra7_uart8_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:01d4:24" }, | 689 | { DRA7_L4PER2_UART8_CLKCTRL, dra7_uart8_bit_data, CLKF_SW_SUP, "l4per2-clkctrl:01d4:24" }, |
| @@ -828,8 +828,8 @@ static struct ti_dt_clk dra7xx_clks[] = { · 138 unmodified lines | |||
| 828 | DT_CLK(NULL, "mcasp6_aux_gfclk_mux", "l4per2-clkctrl:01f8:22"), | 828 | DT_CLK(NULL, "mcasp6_aux_gfclk_mux", "l4per2-clkctrl:01f8:22"), |
| 829 | DT_CLK(NULL, "mcasp7_ahclkx_mux", "l4per2-clkctrl:01fc:24"), | 829 | DT_CLK(NULL, "mcasp7_ahclkx_mux", "l4per2-clkctrl:01fc:24"), |
| 830 | DT_CLK(NULL, "mcasp7_aux_gfclk_mux", "l4per2-clkctrl:01fc:22"), | 830 | DT_CLK(NULL, "mcasp7_aux_gfclk_mux", "l4per2-clkctrl:01fc:22"), |
| 831 | DT_CLK(NULL, "mcasp8_ahclkx_mux", "l4per2-clkctrl:0184:22"), | 831 | DT_CLK(NULL, "mcasp8_ahclkx_mux", "l4per2-clkctrl:0184:24"), |
| 832 | DT_CLK(NULL, "mcasp8_aux_gfclk_mux", "l4per2-clkctrl:0184:24"), | 832 | DT_CLK(NULL, "mcasp8_aux_gfclk_mux", "l4per2-clkctrl:0184:22"), |
| 833 | DT_CLK(NULL, "mmc1_clk32k", "l3init-clkctrl:0008:8"), | 833 | DT_CLK(NULL, "mmc1_clk32k", "l3init-clkctrl:0008:8"), |
| 834 | DT_CLK(NULL, "mmc1_fclk_div", "l3init-clkctrl:0008:25"), | 834 | DT_CLK(NULL, "mmc1_fclk_div", "l3init-clkctrl:0008:25"), |
| 835 | DT_CLK(NULL, "mmc1_fclk_mux", "l3init-clkctrl:0008:24"), | 835 | DT_CLK(NULL, "mmc1_fclk_mux", "l3init-clkctrl:0008:24"), |
| @@ -25,7 +25,9 @@ static __init void timer_of_irq_exit(struct of_timer_irq *of_irq) · 24 unmodified lines | |||
| 25 | 25 | ||
| 26 | struct clock_event_device *clkevt = &to->clkevt; | 26 | struct clock_event_device *clkevt = &to->clkevt; |
| 27 | 27 | ||
| 28 | of_irq->percpu ? free_percpu_irq(of_irq->irq, clkevt) : | 28 | if (of_irq->percpu) |
| 29 | free_percpu_irq(of_irq->irq, clkevt); | ||
| 30 | else | ||
| 29 | free_irq(of_irq->irq, clkevt); | 31 | free_irq(of_irq->irq, clkevt); |
| 30 | } | 32 | } |
| 31 | 33 | ||
| @@ -2737,14 +2737,6 @@ int cpufreq_unregister_driver(struct cpufreq_driver *driver) · 2736 unmodified lines | |||
| 2737 | } | 2737 | } |
| 2738 | EXPORT_SYMBOL_GPL(cpufreq_unregister_driver); | 2738 | EXPORT_SYMBOL_GPL(cpufreq_unregister_driver); |
| 2739 | 2739 | ||
| 2740 | /* | ||
| 2741 | * Stop cpufreq at shutdown to make sure it isn't holding any locks | ||
| 2742 | * or mutexes when secondary CPUs are halted. | ||
| 2743 | */ | ||
| 2744 | static struct syscore_ops cpufreq_syscore_ops = { | ||
| 2745 | .shutdown = cpufreq_suspend, | ||
| 2746 | }; | ||
| 2747 | |||
| 2748 | struct kobject *cpufreq_global_kobject; | 2740 | struct kobject *cpufreq_global_kobject; |
| 2749 | EXPORT_SYMBOL(cpufreq_global_kobject); | 2741 | EXPORT_SYMBOL(cpufreq_global_kobject); |
| 2750 | 2742 | ||
| @@ -2756,8 +2748,6 @@ static int __init cpufreq_core_init(void) · 5 unmodified lines | |||
| 2756 | cpufreq_global_kobject = kobject_create_and_add("cpufreq", &cpu_subsys.dev_root->kobj); | 2748 | cpufreq_global_kobject = kobject_create_and_add("cpufreq", &cpu_subsys.dev_root->kobj); |
| 2757 | BUG_ON(!cpufreq_global_kobject); | 2749 | BUG_ON(!cpufreq_global_kobject); |
| 2758 | 2750 | ||
| 2759 | register_syscore_ops(&cpufreq_syscore_ops); | ||
| 2760 | |||
| 2761 | return 0; | 2751 | return 0; |
| 2762 | } | 2752 | } |
| 2763 | module_param(off, int, 0444); | 2753 | module_param(off, int, 0444); |
| @@ -471,7 +471,7 @@ unlock: · 470 unmodified lines | |||
| 471 | if (pfence_excl) | 471 | if (pfence_excl) |
| 472 | *pfence_excl = fence_excl; | 472 | *pfence_excl = fence_excl; |
| 473 | else if (fence_excl) | 473 | else if (fence_excl) |
| 474 | shared[++shared_count] = fence_excl; | 474 | shared[shared_count++] = fence_excl; |
| 475 | 475 | ||
| 476 | if (!shared_count) { | 476 | if (!shared_count) { |
| 477 | kfree(shared); | 477 | kfree(shared); |
| @@ -408,7 +408,7 @@ static void __init save_mem_devices(const struct dmi_header *dm, void *v) · 407 unmodified lines | |||
| 408 | bytes = ~0ull; | 408 | bytes = ~0ull; |
| 409 | else if (size & 0x8000) | 409 | else if (size & 0x8000) |
| 410 | bytes = (u64)(size & 0x7fff) << 10; | 410 | bytes = (u64)(size & 0x7fff) << 10; |
| 411 | else if (size != 0x7fff) | 411 | else if (size != 0x7fff || dm->length < 0x20) |
| 412 | bytes = (u64)size << 20; | 412 | bytes = (u64)size << 20; |
| 413 | else | 413 | else |
| 414 | bytes = (u64)get_unaligned((u32 *)&d[0x1C]) << 20; | 414 | bytes = (u64)get_unaligned((u32 *)&d[0x1C]) << 20; |
| @@ -381,7 +381,7 @@ static void cper_print_pcie(const char *pfx, const struct cper_sec_pcie *pcie, · 380 unmodified lines | |||
| 381 | printk("%s""vendor_id: 0x%04x, device_id: 0x%04x\n", pfx, | 381 | printk("%s""vendor_id: 0x%04x, device_id: 0x%04x\n", pfx, |
| 382 | pcie->device_id.vendor_id, pcie->device_id.device_id); | 382 | pcie->device_id.vendor_id, pcie->device_id.device_id); |
| 383 | p = pcie->device_id.class_code; | 383 | p = pcie->device_id.class_code; |
| 384 | printk("%s""class_code: %02x%02x%02x\n", pfx, p[0], p[1], p[2]); | 384 | printk("%s""class_code: %02x%02x%02x\n", pfx, p[2], p[1], p[0]); |
| 385 | } | 385 | } |
| 386 | if (pcie->validation_bits & CPER_PCIE_VALID_SERIAL_NUMBER) | 386 | if (pcie->validation_bits & CPER_PCIE_VALID_SERIAL_NUMBER) |
| 387 | printk("%s""serial number: 0x%04x, 0x%04x\n", pfx, | 387 | printk("%s""serial number: 0x%04x, 0x%04x\n", pfx, |
| @@ -267,6 +267,9 @@ static __init int efivar_ssdt_load(void) · 266 unmodified lines | |||
| 267 | void *data; | 267 | void *data; |
| 268 | int ret; | 268 | int ret; |
| 269 | 269 | ||
| 270 | if (!efivar_ssdt[0]) | ||
| 271 | return 0; | ||
| 272 | |||
| 270 | ret = efivar_init(efivar_ssdt_iter, &entries, true, &entries); | 273 | ret = efivar_init(efivar_ssdt_iter, &entries, true, &entries); |
| 271 | 274 | ||
| 272 | list_for_each_entry_safe(entry, aux, &entries, list) { | 275 | list_for_each_entry_safe(entry, aux, &entries, list) { |
| @@ -76,7 +76,7 @@ static u16 checksum(void) · 75 unmodified lines | |||
| 76 | return chksum; | 76 | return chksum; |
| 77 | } | 77 | } |
| 78 | 78 | ||
| 79 | int __init efi_rci2_sysfs_init(void) | 79 | static int __init efi_rci2_sysfs_init(void) |
| 80 | { | 80 | { |
| 81 | struct kobject *tables_kobj; | 81 | struct kobject *tables_kobj; |
| 82 | int ret = -ENOMEM; | 82 | int ret = -ENOMEM; |
| @@ -40,7 +40,7 @@ int __init efi_tpm_eventlog_init(void) · 39 unmodified lines | |||
| 40 | { | 40 | { |
| 41 | struct linux_efi_tpm_eventlog *log_tbl; | 41 | struct linux_efi_tpm_eventlog *log_tbl; |
| 42 | struct efi_tcg2_final_events_table *final_tbl; | 42 | struct efi_tcg2_final_events_table *final_tbl; |
| 43 | unsigned int tbl_size; | 43 | int tbl_size; |
| 44 | int ret = 0; | 44 | int ret = 0; |
| 45 | 45 | ||
| 46 | if (efi.tpm_log == EFI_INVALID_TABLE_ADDR) { | 46 | if (efi.tpm_log == EFI_INVALID_TABLE_ADDR) { |
| @@ -75,16 +75,28 @@ int __init efi_tpm_eventlog_init(void) · 28 unmodified lines | |||
| 75 | goto out; | 75 | goto out; |
| 76 | } | 76 | } |
| 77 | 77 | ||
| 78 | tbl_size = tpm2_calc_event_log_size((void *)efi.tpm_final_log | 78 | tbl_size = 0; |
| 79 | + sizeof(final_tbl->version) | 79 | if (final_tbl->nr_events != 0) { |
| 80 | + sizeof(final_tbl->nr_events), | 80 | void *events = (void *)efi.tpm_final_log |
| 81 | final_tbl->nr_events, | 81 | + sizeof(final_tbl->version) |
| 82 | log_tbl->log); | 82 | + sizeof(final_tbl->nr_events); |
| 83 | |||
| 84 | tbl_size = tpm2_calc_event_log_size(events, | ||
| 85 | final_tbl->nr_events, | ||
| 86 | log_tbl->log); | ||
| 87 | } | ||
| 88 | |||
| 89 | if (tbl_size < 0) { | ||
| 90 | pr_err(FW_BUG "Failed to parse event in TPM Final Events Log\n"); | ||
| 91 | goto out_calc; | ||
| 92 | } | ||
| 93 | |||
| 83 | memblock_reserve((unsigned long)final_tbl, | 94 | memblock_reserve((unsigned long)final_tbl, |
| 84 | tbl_size + sizeof(*final_tbl)); | 95 | tbl_size + sizeof(*final_tbl)); |
| 85 | early_memunmap(final_tbl, sizeof(*final_tbl)); | ||
| 86 | efi_tpm_final_log_size = tbl_size; | 96 | efi_tpm_final_log_size = tbl_size; |
| 87 | 97 | ||
| 98 | out_calc: | ||
| 99 | early_memunmap(final_tbl, sizeof(*final_tbl)); | ||
| 88 | out: | 100 | out: |
| 89 | early_memunmap(log_tbl, sizeof(*log_tbl)); | 101 | early_memunmap(log_tbl, sizeof(*log_tbl)); |
| 90 | return ret; | 102 | return ret; |
| @@ -52,7 +52,7 @@ static int vpd_decode_entry(const u32 max_len, const u8 *input_buf, · 51 unmodified lines | |||
| 52 | if (max_len - consumed < *entry_len) | 52 | if (max_len - consumed < *entry_len) |
| 53 | return VPD_FAIL; | 53 | return VPD_FAIL; |
| 54 | 54 | ||
| 55 | consumed += decoded_len; | 55 | consumed += *entry_len; |
| 56 | *_consumed = consumed; | 56 | *_consumed = consumed; |
| 57 | return VPD_OK; | 57 | return VPD_OK; |
| 58 | } | 58 | } |
| @@ -530,11 +530,12 @@ static void sprd_eic_handle_one_type(struct gpio_chip *chip) · 529 unmodified lines | |||
| 530 | } | 530 | } |
| 531 | 531 | ||
| 532 | for_each_set_bit(n, ®, SPRD_EIC_PER_BANK_NR) { | 532 | for_each_set_bit(n, ®, SPRD_EIC_PER_BANK_NR) { |
| 533 | girq = irq_find_mapping(chip->irq.domain, | 533 | u32 offset = bank * SPRD_EIC_PER_BANK_NR + n; |
| 534 | bank * SPRD_EIC_PER_BANK_NR + n); | 534 | |
| 535 | girq = irq_find_mapping(chip->irq.domain, offset); | ||
| 535 | 536 | ||
| 536 | generic_handle_irq(girq); | 537 | generic_handle_irq(girq); |
| 537 | sprd_eic_toggle_trigger(chip, girq, n); | 538 | sprd_eic_toggle_trigger(chip, girq, offset); |
| 538 | } | 539 | } |
| 539 | } | 540 | } |
| 540 | } | 541 | } |
| @@ -293,8 +293,9 @@ static void intel_mid_irq_handler(struct irq_desc *desc) · 292 unmodified lines | |||
| 293 | chip->irq_eoi(data); | 293 | chip->irq_eoi(data); |
| 294 | } | 294 | } |
| 295 | 295 | ||
| 296 | static void intel_mid_irq_init_hw(struct intel_mid_gpio *priv) | 296 | static int intel_mid_irq_init_hw(struct gpio_chip *chip) |
| 297 | { | 297 | { |
| 298 | struct intel_mid_gpio *priv = gpiochip_get_data(chip); | ||
| 298 | void __iomem *reg; | 299 | void __iomem *reg; |
| 299 | unsigned base; | 300 | unsigned base; |
| 300 | 301 | ||
| @@ -309,6 +310,8 @@ static void intel_mid_irq_init_hw(struct intel_mid_gpio *priv) · 8 unmodified lines | |||
| 309 | reg = gpio_reg(&priv->chip, base, GEDR); | 310 | reg = gpio_reg(&priv->chip, base, GEDR); |
| 310 | writel(~0, reg); | 311 | writel(~0, reg); |
| 311 | } | 312 | } |
| 313 | |||
| 314 | return 0; | ||
| 312 | } | 315 | } |
| 313 | 316 | ||
| 314 | static int __maybe_unused intel_gpio_runtime_idle(struct device *dev) | 317 | static int __maybe_unused intel_gpio_runtime_idle(struct device *dev) |
| @@ -372,6 +375,7 @@ static int intel_gpio_probe(struct pci_dev *pdev, · 57 unmodified lines | |||
| 372 | 375 | ||
| 373 | girq = &priv->chip.irq; | 376 | girq = &priv->chip.irq; |
| 374 | girq->chip = &intel_mid_irqchip; | 377 | girq->chip = &intel_mid_irqchip; |
| 378 | girq->init_hw = intel_mid_irq_init_hw; | ||
| 375 | girq->parent_handler = intel_mid_irq_handler; | 379 | girq->parent_handler = intel_mid_irq_handler; |
| 376 | girq->num_parents = 1; | 380 | girq->num_parents = 1; |
| 377 | girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents, | 381 | girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents, |
| @@ -384,9 +388,8 @@ static int intel_gpio_probe(struct pci_dev *pdev, · 6 unmodified lines | |||
| 384 | girq->default_type = IRQ_TYPE_NONE; | 388 | girq->default_type = IRQ_TYPE_NONE; |
| 385 | girq->handler = handle_simple_irq; | 389 | girq->handler = handle_simple_irq; |
| 386 | 390 | ||
| 387 | intel_mid_irq_init_hw(priv); | ||
| 388 | |||
| 389 | pci_set_drvdata(pdev, priv); | 391 | pci_set_drvdata(pdev, priv); |
| 392 | |||
| 390 | retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv); | 393 | retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv); |
| 391 | if (retval) { | 394 | if (retval) { |
| 392 | dev_err(&pdev->dev, "gpiochip_add error %d\n", retval); | 395 | dev_err(&pdev->dev, "gpiochip_add error %d\n", retval); |
| @@ -294,8 +294,9 @@ static struct irq_chip lp_irqchip = { · 293 unmodified lines | |||
| 294 | .flags = IRQCHIP_SKIP_SET_WAKE, | 294 | .flags = IRQCHIP_SKIP_SET_WAKE, |
| 295 | }; | 295 | }; |
| 296 | 296 | ||
| 297 | static void lp_gpio_irq_init_hw(struct lp_gpio *lg) | 297 | static int lp_gpio_irq_init_hw(struct gpio_chip *chip) |
| 298 | { | 298 | { |
| 299 | struct lp_gpio *lg = gpiochip_get_data(chip); | ||
| 299 | unsigned long reg; | 300 | unsigned long reg; |
| 300 | unsigned base; | 301 | unsigned base; |
| 301 | 302 | ||
| @@ -307,6 +308,8 @@ static void lp_gpio_irq_init_hw(struct lp_gpio *lg) · 5 unmodified lines | |||
| 307 | reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT); | 308 | reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT); |
| 308 | outl(0xffffffff, reg); | 309 | outl(0xffffffff, reg); |
| 309 | } | 310 | } |
| 311 | |||
| 312 | return 0; | ||
| 310 | } | 313 | } |
| 311 | 314 | ||
| 312 | static int lp_gpio_probe(struct platform_device *pdev) | 315 | static int lp_gpio_probe(struct platform_device *pdev) |
| @@ -364,6 +367,7 @@ static int lp_gpio_probe(struct platform_device *pdev) · 51 unmodified lines | |||
| 364 | 367 | ||
| 365 | girq = &gc->irq; | 368 | girq = &gc->irq; |
| 366 | girq->chip = &lp_irqchip; | 369 | girq->chip = &lp_irqchip; |
| 370 | girq->init_hw = lp_gpio_irq_init_hw; | ||
| 367 | girq->parent_handler = lp_gpio_irq_handler; | 371 | girq->parent_handler = lp_gpio_irq_handler; |
| 368 | girq->num_parents = 1; | 372 | girq->num_parents = 1; |
| 369 | girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents, | 373 | girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents, |
| @@ -373,9 +377,7 @@ static int lp_gpio_probe(struct platform_device *pdev) · 3 unmodified lines | |||
| 373 | return -ENOMEM; | 377 | return -ENOMEM; |
| 374 | girq->parents[0] = (unsigned)irq_rc->start; | 378 | girq->parents[0] = (unsigned)irq_rc->start; |
| 375 | girq->default_type = IRQ_TYPE_NONE; | 379 | girq->default_type = IRQ_TYPE_NONE; |
| 376 | girq->handler = handle_simple_irq; | 380 | girq->handler = handle_bad_irq; |
| 377 | |||
| 378 | lp_gpio_irq_init_hw(lg); | ||
| 379 | } | 381 | } |
| 380 | 382 | ||
| 381 | ret = devm_gpiochip_add_data(dev, gc, lg); | 383 | ret = devm_gpiochip_add_data(dev, gc, lg); |
| @@ -192,13 +192,13 @@ static int max77620_gpio_set_debounce(struct max77620_gpio *mgpio, · 191 unmodified lines | |||
| 192 | case 0: | 192 | case 0: |
| 193 | val = MAX77620_CNFG_GPIO_DBNC_None; | 193 | val = MAX77620_CNFG_GPIO_DBNC_None; |
| 194 | break; | 194 | break; |
| 195 | case 1 ... 8: | 195 | case 1000 ... 8000: |
| 196 | val = MAX77620_CNFG_GPIO_DBNC_8ms; | 196 | val = MAX77620_CNFG_GPIO_DBNC_8ms; |
| 197 | break; | 197 | break; |
| 198 | case 9 ... 16: | 198 | case 9000 ... 16000: |
| 199 | val = MAX77620_CNFG_GPIO_DBNC_16ms; | 199 | val = MAX77620_CNFG_GPIO_DBNC_16ms; |
| 200 | break; | 200 | break; |
| 201 | case 17 ... 32: | 201 | case 17000 ... 32000: |
| 202 | val = MAX77620_CNFG_GPIO_DBNC_32ms; | 202 | val = MAX77620_CNFG_GPIO_DBNC_32ms; |
| 203 | break; | 203 | break; |
| 204 | default: | 204 | default: |
| @@ -362,8 +362,9 @@ static void mrfld_irq_handler(struct irq_desc *desc) · 361 unmodified lines | |||
| 362 | chained_irq_exit(irqchip, desc); | 362 | chained_irq_exit(irqchip, desc); |
| 363 | } | 363 | } |
| 364 | 364 | ||
| 365 | static void mrfld_irq_init_hw(struct mrfld_gpio *priv) | 365 | static int mrfld_irq_init_hw(struct gpio_chip *chip) |
| 366 | { | 366 | { |
| 367 | struct mrfld_gpio *priv = gpiochip_get_data(chip); | ||
| 367 | void __iomem *reg; | 368 | void __iomem *reg; |
| 368 | unsigned int base; | 369 | unsigned int base; |
| 369 | 370 | ||
| @@ -375,6 +376,8 @@ static void mrfld_irq_init_hw(struct mrfld_gpio *priv) · 5 unmodified lines | |||
| 375 | reg = gpio_reg(&priv->chip, base, GFER); | 376 | reg = gpio_reg(&priv->chip, base, GFER); |
| 376 | writel(0, reg); | 377 | writel(0, reg); |
| 377 | } | 378 | } |
| 379 | |||
| 380 | return 0; | ||
| 378 | } | 381 | } |
| 379 | 382 | ||
| 380 | static const char *mrfld_gpio_get_pinctrl_dev_name(struct mrfld_gpio *priv) | 383 | static const char *mrfld_gpio_get_pinctrl_dev_name(struct mrfld_gpio *priv) |
| @@ -447,6 +450,7 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id · 66 unmodified lines | |||
| 447 | 450 | ||
| 448 | girq = &priv->chip.irq; | 451 | girq = &priv->chip.irq; |
| 449 | girq->chip = &mrfld_irqchip; | 452 | girq->chip = &mrfld_irqchip; |
| 453 | girq->init_hw = mrfld_irq_init_hw; | ||
| 450 | girq->parent_handler = mrfld_irq_handler; | 454 | girq->parent_handler = mrfld_irq_handler; |
| 451 | girq->num_parents = 1; | 455 | girq->num_parents = 1; |
| 452 | girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents, | 456 | girq->parents = devm_kcalloc(&pdev->dev, girq->num_parents, |
| @@ -455,11 +459,10 @@ static int mrfld_gpio_probe(struct pci_dev *pdev, const struct pci_device_id *id · 2 unmodified lines | |||
| 455 | if (!girq->parents) | 459 | if (!girq->parents) |
| 456 | return -ENOMEM; | 460 | return -ENOMEM; |
| 457 | girq->parents[0] = pdev->irq; | 461 | girq->parents[0] = pdev->irq; |
| 462 | girq->first = irq_base; | ||
| 458 | girq->default_type = IRQ_TYPE_NONE; | 463 | girq->default_type = IRQ_TYPE_NONE; |
| 459 | girq->handler = handle_bad_irq; | 464 | girq->handler = handle_bad_irq; |
| 460 | 465 | ||
| 461 | mrfld_irq_init_hw(priv); | ||
| 462 | |||
| 463 | pci_set_drvdata(pdev, priv); | 466 | pci_set_drvdata(pdev, priv); |
| 464 | retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv); | 467 | retval = devm_gpiochip_add_data(&pdev->dev, &priv->chip, priv); |
| 465 | if (retval) { | 468 | if (retval) { |
| @@ -317,7 +317,7 @@ struct gpio_desc *gpiod_get_from_of_node(struct device_node *node, · 316 unmodified lines | |||
| 317 | transitory = flags & OF_GPIO_TRANSITORY; | 317 | transitory = flags & OF_GPIO_TRANSITORY; |
| 318 | 318 | ||
| 319 | ret = gpiod_request(desc, label); | 319 | ret = gpiod_request(desc, label); |
| 320 | if (ret == -EBUSY && (flags & GPIOD_FLAGS_BIT_NONEXCLUSIVE)) | 320 | if (ret == -EBUSY && (dflags & GPIOD_FLAGS_BIT_NONEXCLUSIVE)) |
| 321 | return desc; | 321 | return desc; |
| 322 | if (ret) | 322 | if (ret) |
| 323 | return ERR_PTR(ret); | 323 | return ERR_PTR(ret); |
| @@ -86,6 +86,7 @@ static int gpiochip_add_irqchip(struct gpio_chip *gpiochip, · 85 unmodified lines | |||
| 86 | struct lock_class_key *lock_key, | 86 | struct lock_class_key *lock_key, |
| 87 | struct lock_class_key *request_key); | 87 | struct lock_class_key *request_key); |
| 88 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip); | 88 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip); |
| 89 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip); | ||
| 89 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip); | 90 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip); |
| 90 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip); | 91 | static void gpiochip_irqchip_free_valid_mask(struct gpio_chip *gpiochip); |
| 91 | 92 | ||
| @@ -1406,6 +1407,10 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, · 1314 unmodified lines | |||
| 1406 | 1407 | ||
| 1407 | machine_gpiochip_add(chip); | 1408 | machine_gpiochip_add(chip); |
| 1408 | 1409 | ||
| 1410 | ret = gpiochip_irqchip_init_hw(chip); | ||
| 1411 | if (ret) | ||
| 1412 | goto err_remove_acpi_chip; | ||
| 1413 | |||
| 1409 | ret = gpiochip_irqchip_init_valid_mask(chip); | 1414 | ret = gpiochip_irqchip_init_valid_mask(chip); |
| 1410 | if (ret) | 1415 | if (ret) |
| 1411 | goto err_remove_acpi_chip; | 1416 | goto err_remove_acpi_chip; |
| @@ -1622,6 +1627,16 @@ static struct gpio_chip *find_chip_by_name(const char *name) · 210 unmodified lines | |||
| 1622 | * The following is irqchip helper code for gpiochips. | 1627 | * The following is irqchip helper code for gpiochips. |
| 1623 | */ | 1628 | */ |
| 1624 | 1629 | ||
| 1630 | static int gpiochip_irqchip_init_hw(struct gpio_chip *gc) | ||
| 1631 | { | ||
| 1632 | struct gpio_irq_chip *girq = &gc->irq; | ||
| 1633 | |||
| 1634 | if (!girq->init_hw) | ||
| 1635 | return 0; | ||
| 1636 | |||
| 1637 | return girq->init_hw(gc); | ||
| 1638 | } | ||
| 1639 | |||
| 1625 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) | 1640 | static int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gc) |
| 1626 | { | 1641 | { |
| 1627 | struct gpio_irq_chip *girq = &gc->irq; | 1642 | struct gpio_irq_chip *girq = &gc->irq; |
| @@ -2446,8 +2461,13 @@ static inline int gpiochip_add_irqchip(struct gpio_chip *gpiochip, · 818 unmodified lines | |||
| 2446 | { | 2461 | { |
| 2447 | return 0; | 2462 | return 0; |
| 2448 | } | 2463 | } |
| 2449 | |||
| 2450 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {} | 2464 | static void gpiochip_irqchip_remove(struct gpio_chip *gpiochip) {} |
| 2465 | |||
| 2466 | static inline int gpiochip_irqchip_init_hw(struct gpio_chip *gpiochip) | ||
| 2467 | { | ||
| 2468 | return 0; | ||
| 2469 | } | ||
| 2470 | |||
| 2451 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip) | 2471 | static inline int gpiochip_irqchip_init_valid_mask(struct gpio_chip *gpiochip) |
| 2452 | { | 2472 | { |
| 2453 | return 0; | 2473 | return 0; |
| @@ -3070,8 +3090,10 @@ int gpiod_direction_output(struct gpio_desc *desc, int value) · 616 unmodified lines | |||
| 3070 | if (!ret) | 3090 | if (!ret) |
| 3071 | goto set_output_value; | 3091 | goto set_output_value; |
| 3072 | /* Emulate open drain by not actively driving the line high */ | 3092 | /* Emulate open drain by not actively driving the line high */ |
| 3073 | if (value) | 3093 | if (value) { |
| 3074 | return gpiod_direction_input(desc); | 3094 | ret = gpiod_direction_input(desc); |
| 3095 | goto set_output_flag; | ||
| 3096 | } | ||
| 3075 | } | 3097 | } |
| 3076 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { | 3098 | else if (test_bit(FLAG_OPEN_SOURCE, &desc->flags)) { |
| 3077 | ret = gpio_set_config(gc, gpio_chip_hwgpio(desc), | 3099 | ret = gpio_set_config(gc, gpio_chip_hwgpio(desc), |
| @@ -3079,8 +3101,10 @@ int gpiod_direction_output(struct gpio_desc *desc, int value) · 1 unmodified line | |||
| 3079 | if (!ret) | 3101 | if (!ret) |
| 3080 | goto set_output_value; | 3102 | goto set_output_value; |
| 3081 | /* Emulate open source by not actively driving the line low */ | 3103 | /* Emulate open source by not actively driving the line low */ |
| 3082 | if (!value) | 3104 | if (!value) { |
| 3083 | return gpiod_direction_input(desc); | 3105 | ret = gpiod_direction_input(desc); |
| 3106 | goto set_output_flag; | ||
| 3107 | } | ||
| 3084 | } else { | 3108 | } else { |
| 3085 | gpio_set_config(gc, gpio_chip_hwgpio(desc), | 3109 | gpio_set_config(gc, gpio_chip_hwgpio(desc), |
| 3086 | PIN_CONFIG_DRIVE_PUSH_PULL); | 3110 | PIN_CONFIG_DRIVE_PUSH_PULL); |
| @@ -3088,6 +3112,17 @@ int gpiod_direction_output(struct gpio_desc *desc, int value) · 1 unmodified line | |||
| 3088 | 3112 | ||
| 3089 | set_output_value: | 3113 | set_output_value: |
| 3090 | return gpiod_direction_output_raw_commit(desc, value); | 3114 | return gpiod_direction_output_raw_commit(desc, value); |
| 3115 | |||
| 3116 | set_output_flag: | ||
| 3117 | /* | ||
| 3118 | * When emulating open-source or open-drain functionalities by not | ||
| 3119 | * actively driving the line (setting mode to input) we still need to | ||
| 3120 | * set the IS_OUT flag or otherwise we won't be able to set the line | ||
| 3121 | * value anymore. | ||
| 3122 | */ | ||
| 3123 | if (ret == 0) | ||
| 3124 | set_bit(FLAG_IS_OUT, &desc->flags); | ||
| 3125 | return ret; | ||
| 3091 | } | 3126 | } |
| 3092 | EXPORT_SYMBOL_GPL(gpiod_direction_output); | 3127 | EXPORT_SYMBOL_GPL(gpiod_direction_output); |
| 3093 | 3128 | ||
| @@ -3448,8 +3483,6 @@ static void gpio_set_open_drain_value_commit(struct gpio_desc *desc, bool value) · 354 unmodified lines | |||
| 3448 | 3483 | ||
| 3449 | if (value) { | 3484 | if (value) { |
| 3450 | ret = chip->direction_input(chip, offset); | 3485 | ret = chip->direction_input(chip, offset); |
| 3451 | if (!ret) | ||
| 3452 | clear_bit(FLAG_IS_OUT, &desc->flags); | ||
| 3453 | } else { | 3486 | } else { |
| 3454 | ret = chip->direction_output(chip, offset, 0); | 3487 | ret = chip->direction_output(chip, offset, 0); |
| 3455 | if (!ret) | 3488 | if (!ret) |
| @@ -3479,8 +3512,6 @@ static void gpio_set_open_source_value_commit(struct gpio_desc *desc, bool value · 23 unmodified lines | |||
| 3479 | set_bit(FLAG_IS_OUT, &desc->flags); | 3512 | set_bit(FLAG_IS_OUT, &desc->flags); |
| 3480 | } else { | 3513 | } else { |
| 3481 | ret = chip->direction_input(chip, offset); | 3514 | ret = chip->direction_input(chip, offset); |
| 3482 | if (!ret) | ||
| 3483 | clear_bit(FLAG_IS_OUT, &desc->flags); | ||
| 3484 | } | 3515 | } |
| 3485 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); | 3516 | trace_gpio_direction(desc_to_gpio(desc), !value, ret); |
| 3486 | if (ret < 0) | 3517 | if (ret < 0) |
| @@ -54,7 +54,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \ · 53 unmodified lines | |||
| 54 | amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \ | 54 | amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \ |
| 55 | amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \ | 55 | amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \ |
| 56 | amdgpu_gmc.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \ | 56 | amdgpu_gmc.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \ |
| 57 | amdgpu_vm_sdma.o amdgpu_pmu.o amdgpu_discovery.o amdgpu_ras_eeprom.o smu_v11_0_i2c.o | 57 | amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o smu_v11_0_i2c.o |
| 58 | 58 | ||
| 59 | amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o | 59 | amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o |
| 60 | 60 | ||
| @@ -189,7 +189,7 @@ static int acp_hw_init(void *handle) · 188 unmodified lines | |||
| 189 | u32 val = 0; | 189 | u32 val = 0; |
| 190 | u32 count = 0; | 190 | u32 count = 0; |
| 191 | struct device *dev; | 191 | struct device *dev; |
| 192 | struct i2s_platform_data *i2s_pdata; | 192 | struct i2s_platform_data *i2s_pdata = NULL; |
| 193 | 193 | ||
| 194 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; | 194 | struct amdgpu_device *adev = (struct amdgpu_device *)handle; |
| 195 | 195 | ||
| @@ -231,20 +231,21 @@ static int acp_hw_init(void *handle) · 35 unmodified lines | |||
| 231 | adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell), | 231 | adev->acp.acp_cell = kcalloc(ACP_DEVS, sizeof(struct mfd_cell), |
| 232 | GFP_KERNEL); | 232 | GFP_KERNEL); |
| 233 | 233 | ||
| 234 | if (adev->acp.acp_cell == NULL) | 234 | if (adev->acp.acp_cell == NULL) { |
| 235 | return -ENOMEM; | 235 | r = -ENOMEM; |
| 236 | goto failure; | ||
| 237 | } | ||
| 236 | 238 | ||
| 237 | adev->acp.acp_res = kcalloc(5, sizeof(struct resource), GFP_KERNEL); | 239 | adev->acp.acp_res = kcalloc(5, sizeof(struct resource), GFP_KERNEL); |
| 238 | if (adev->acp.acp_res == NULL) { | 240 | if (adev->acp.acp_res == NULL) { |
| 239 | kfree(adev->acp.acp_cell); | 241 | r = -ENOMEM; |
| 240 | return -ENOMEM; | 242 | goto failure; |
| 241 | } | 243 | } |
| 242 | 244 | ||
| 243 | i2s_pdata = kcalloc(3, sizeof(struct i2s_platform_data), GFP_KERNEL); | 245 | i2s_pdata = kcalloc(3, sizeof(struct i2s_platform_data), GFP_KERNEL); |
| 244 | if (i2s_pdata == NULL) { | 246 | if (i2s_pdata == NULL) { |
| 245 | kfree(adev->acp.acp_res); | 247 | r = -ENOMEM; |
| 246 | kfree(adev->acp.acp_cell); | 248 | goto failure; |
| 247 | return -ENOMEM; | ||
| 248 | } | 249 | } |
| 249 | 250 | ||
| 250 | switch (adev->asic_type) { | 251 | switch (adev->asic_type) { |
| @@ -341,14 +342,14 @@ static int acp_hw_init(void *handle) · 90 unmodified lines | |||
| 341 | r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell, | 342 | r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell, |
| 342 | ACP_DEVS); | 343 | ACP_DEVS); |
| 343 | if (r) | 344 | if (r) |
| 344 | return r; | 345 | goto failure; |
| 345 | 346 | ||
| 346 | for (i = 0; i < ACP_DEVS ; i++) { | 347 | for (i = 0; i < ACP_DEVS ; i++) { |
| 347 | dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i); | 348 | dev = get_mfd_cell_dev(adev->acp.acp_cell[i].name, i); |
| 348 | r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev); | 349 | r = pm_genpd_add_device(&adev->acp.acp_genpd->gpd, dev); |
| 349 | if (r) { | 350 | if (r) { |
| 350 | dev_err(dev, "Failed to add dev to genpd\n"); | 351 | dev_err(dev, "Failed to add dev to genpd\n"); |
| 351 | return r; | 352 | goto failure; |
| 352 | } | 353 | } |
| 353 | } | 354 | } |
| 354 | 355 | ||
| @@ -367,7 +368,8 @@ static int acp_hw_init(void *handle) · 12 unmodified lines | |||
| 367 | break; | 368 | break; |
| 368 | if (--count == 0) { | 369 | if (--count == 0) { |
| 369 | dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); | 370 | dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); |
| 370 | return -ETIMEDOUT; | 371 | r = -ETIMEDOUT; |
| 372 | goto failure; | ||
| 371 | } | 373 | } |
| 372 | udelay(100); | 374 | udelay(100); |
| 373 | } | 375 | } |
| @@ -384,7 +386,8 @@ static int acp_hw_init(void *handle) · 10 unmodified lines | |||
| 384 | break; | 386 | break; |
| 385 | if (--count == 0) { | 387 | if (--count == 0) { |
| 386 | dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); | 388 | dev_err(&adev->pdev->dev, "Failed to reset ACP\n"); |
| 387 | return -ETIMEDOUT; | 389 | r = -ETIMEDOUT; |
| 390 | goto failure; | ||
| 388 | } | 391 | } |
| 389 | udelay(100); | 392 | udelay(100); |
| 390 | } | 393 | } |
| @@ -393,6 +396,13 @@ static int acp_hw_init(void *handle) · 2 unmodified lines | |||
| 393 | val &= ~ACP_SOFT_RESET__SoftResetAud_MASK; | 396 | val &= ~ACP_SOFT_RESET__SoftResetAud_MASK; |
| 394 | cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); | 397 | cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); |
| 395 | return 0; | 398 | return 0; |
| 399 | |||
| 400 | failure: | ||
| 401 | kfree(i2s_pdata); | ||
| 402 | kfree(adev->acp.acp_res); | ||
| 403 | kfree(adev->acp.acp_cell); | ||
| 404 | kfree(adev->acp.acp_genpd); | ||
| 405 | return r; | ||
| 396 | } | 406 | } |
| 397 | 407 | ||
| 398 | /** | 408 | /** |
| @@ -270,7 +270,7 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, · 269 unmodified lines | |||
| 270 | 270 | ||
| 271 | r = amdgpu_bo_create_list_entry_array(&args->in, &info); | 271 | r = amdgpu_bo_create_list_entry_array(&args->in, &info); |
| 272 | if (r) | 272 | if (r) |
| 273 | goto error_free; | 273 | return r; |
| 274 | 274 | ||
| 275 | switch (args->in.operation) { | 275 | switch (args->in.operation) { |
| 276 | case AMDGPU_BO_LIST_OP_CREATE: | 276 | case AMDGPU_BO_LIST_OP_CREATE: |
| @@ -283,8 +283,7 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, · 6 unmodified lines | |||
| 283 | r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL); | 283 | r = idr_alloc(&fpriv->bo_list_handles, list, 1, 0, GFP_KERNEL); |
| 284 | mutex_unlock(&fpriv->bo_list_lock); | 284 | mutex_unlock(&fpriv->bo_list_lock); |
| 285 | if (r < 0) { | 285 | if (r < 0) { |
| 286 | amdgpu_bo_list_put(list); | 286 | goto error_put_list; |
| 287 | return r; | ||
| 288 | } | 287 | } |
| 289 | 288 | ||
| 290 | handle = r; | 289 | handle = r; |
| @@ -306,9 +305,8 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, · 15 unmodified lines | |||
| 306 | mutex_unlock(&fpriv->bo_list_lock); | 305 | mutex_unlock(&fpriv->bo_list_lock); |
| 307 | 306 | ||
| 308 | if (IS_ERR(old)) { | 307 | if (IS_ERR(old)) { |
| 309 | amdgpu_bo_list_put(list); | ||
| 310 | r = PTR_ERR(old); | 308 | r = PTR_ERR(old); |
| 311 | goto error_free; | 309 | goto error_put_list; |
| 312 | } | 310 | } |
| 313 | 311 | ||
| 314 | amdgpu_bo_list_put(old); | 312 | amdgpu_bo_list_put(old); |
| @@ -325,8 +323,10 @@ int amdgpu_bo_list_ioctl(struct drm_device *dev, void *data, · 10 unmodified lines | |||
| 325 | 323 | ||
| 326 | return 0; | 324 | return 0; |
| 327 | 325 | ||
| 326 | error_put_list: | ||
| 327 | amdgpu_bo_list_put(list); | ||
| 328 | |||
| 328 | error_free: | 329 | error_free: |
| 329 | if (info) | 330 | kvfree(info); |
| 330 | kvfree(info); | ||
| 331 | return r; | 331 | return r; |
| 332 | } | 332 | } |
| @@ -81,9 +81,10 @@ · 80 unmodified lines | |||
| 81 | * - 3.32.0 - Add syncobj timeline support to AMDGPU_CS. | 81 | * - 3.32.0 - Add syncobj timeline support to AMDGPU_CS. |
| 82 | * - 3.33.0 - Fixes for GDS ENOMEM failures in AMDGPU_CS. | 82 | * - 3.33.0 - Fixes for GDS ENOMEM failures in AMDGPU_CS. |
| 83 | * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches | 83 | * - 3.34.0 - Non-DC can flip correctly between buffers with different pitches |
| 84 | * - 3.35.0 - Add drm_amdgpu_info_device::tcc_disabled_mask | ||
| 84 | */ | 85 | */ |
| 85 | #define KMS_DRIVER_MAJOR 3 | 86 | #define KMS_DRIVER_MAJOR 3 |
| 86 | #define KMS_DRIVER_MINOR 34 | 87 | #define KMS_DRIVER_MINOR 35 |
| 87 | #define KMS_DRIVER_PATCHLEVEL 0 | 88 | #define KMS_DRIVER_PATCHLEVEL 0 |
| 88 | 89 | ||
| 89 | #define AMDGPU_MAX_TIMEOUT_PARAM_LENTH 256 | 90 | #define AMDGPU_MAX_TIMEOUT_PARAM_LENTH 256 |
| @@ -1047,6 +1048,41 @@ static int amdgpu_pci_probe(struct pci_dev *pdev, · 957 unmodified lines | |||
| 1047 | return -ENODEV; | 1048 | return -ENODEV; |
| 1048 | } | 1049 | } |
| 1049 | 1050 | ||
| 1051 | #ifdef CONFIG_DRM_AMDGPU_SI | ||
| 1052 | if (!amdgpu_si_support) { | ||
| 1053 | switch (flags & AMD_ASIC_MASK) { | ||
| 1054 | case CHIP_TAHITI: | ||
| 1055 | case CHIP_PITCAIRN: | ||
| 1056 | case CHIP_VERDE: | ||
| 1057 | case CHIP_OLAND: | ||
| 1058 | case CHIP_HAINAN: | ||
| 1059 | dev_info(&pdev->dev, | ||
| 1060 | "SI support provided by radeon.\n"); | ||
| 1061 | dev_info(&pdev->dev, | ||
| 1062 | "Use radeon.si_support=0 amdgpu.si_support=1 to override.\n" | ||
| 1063 | ); | ||
| 1064 | return -ENODEV; | ||
| 1065 | } | ||
| 1066 | } | ||
| 1067 | #endif | ||
| 1068 | #ifdef CONFIG_DRM_AMDGPU_CIK | ||
| 1069 | if (!amdgpu_cik_support) { | ||
| 1070 | switch (flags & AMD_ASIC_MASK) { | ||
| 1071 | case CHIP_KAVERI: | ||
| 1072 | case CHIP_BONAIRE: | ||
| 1073 | case CHIP_HAWAII: | ||
| 1074 | case CHIP_KABINI: | ||
| 1075 | case CHIP_MULLINS: | ||
| 1076 | dev_info(&pdev->dev, | ||
| 1077 | "CIK support provided by radeon.\n"); | ||
| 1078 | dev_info(&pdev->dev, | ||
| 1079 | "Use radeon.cik_support=0 amdgpu.cik_support=1 to override.\n" | ||
| 1080 | ); | ||
| 1081 | return -ENODEV; | ||
| 1082 | } | ||
| 1083 | } | ||
| 1084 | #endif | ||
| 1085 | |||
| 1050 | /* Get rid of things like offb */ | 1086 | /* Get rid of things like offb */ |
| 1051 | ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, "amdgpudrmfb"); | 1087 | ret = drm_fb_helper_remove_conflicting_pci_framebuffers(pdev, 0, "amdgpudrmfb"); |
| 1052 | if (ret) | 1088 | if (ret) |
| @@ -165,6 +165,7 @@ struct amdgpu_gfx_config { · 164 unmodified lines | |||
| 165 | uint32_t num_sc_per_sh; | 165 | uint32_t num_sc_per_sh; |
| 166 | uint32_t num_packer_per_sc; | 166 | uint32_t num_packer_per_sc; |
| 167 | uint32_t pa_sc_tile_steering_override; | 167 | uint32_t pa_sc_tile_steering_override; |
| 168 | uint64_t tcc_disabled_mask; | ||
| 168 | }; | 169 | }; |
| 169 | 170 | ||
| 170 | struct amdgpu_cu_info { | 171 | struct amdgpu_cu_info { |
| @@ -144,41 +144,6 @@ int amdgpu_driver_load_kms(struct drm_device *dev, unsigned long flags) · 143 unmodified lines | |||
| 144 | struct amdgpu_device *adev; | 144 | struct amdgpu_device *adev; |
| 145 | int r, acpi_status; | 145 | int r, acpi_status; |
| 146 | 146 | ||
| 147 | #ifdef CONFIG_DRM_AMDGPU_SI | ||
| 148 | if (!amdgpu_si_support) { | ||
| 149 | switch (flags & AMD_ASIC_MASK) { | ||
| 150 | case CHIP_TAHITI: | ||
| 151 | case CHIP_PITCAIRN: | ||
| 152 | case CHIP_VERDE: | ||
| 153 | case CHIP_OLAND: | ||
| 154 | case CHIP_HAINAN: | ||
| 155 | dev_info(dev->dev, | ||
| 156 | "SI support provided by radeon.\n"); | ||
| 157 | dev_info(dev->dev, | ||
| 158 | "Use radeon.si_support=0 amdgpu.si_support=1 to override.\n" | ||
| 159 | ); | ||
| 160 | return -ENODEV; | ||
| 161 | } | ||
| 162 | } | ||
| 163 | #endif | ||
| 164 | #ifdef CONFIG_DRM_AMDGPU_CIK | ||
| 165 | if (!amdgpu_cik_support) { | ||
| 166 | switch (flags & AMD_ASIC_MASK) { | ||
| 167 | case CHIP_KAVERI: | ||
| 168 | case CHIP_BONAIRE: | ||
| 169 | case CHIP_HAWAII: | ||
| 170 | case CHIP_KABINI: | ||
| 171 | case CHIP_MULLINS: | ||
| 172 | dev_info(dev->dev, | ||
| 173 | "CIK support provided by radeon.\n"); | ||
| 174 | dev_info(dev->dev, | ||
| 175 | "Use radeon.cik_support=0 amdgpu.cik_support=1 to override.\n" | ||
| 176 | ); | ||
| 177 | return -ENODEV; | ||
| 178 | } | ||
| 179 | } | ||
| 180 | #endif | ||
| 181 | |||
| 182 | adev = kzalloc(sizeof(struct amdgpu_device), GFP_KERNEL); | 147 | adev = kzalloc(sizeof(struct amdgpu_device), GFP_KERNEL); |
| 183 | if (adev == NULL) { | 148 | if (adev == NULL) { |
| 184 | return -ENOMEM; | 149 | return -ENOMEM; |
| @@ -787,6 +752,8 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file · 602 unmodified lines | |||
| 787 | dev_info.pa_sc_tile_steering_override = | 752 | dev_info.pa_sc_tile_steering_override = |
| 788 | adev->gfx.config.pa_sc_tile_steering_override; | 753 | adev->gfx.config.pa_sc_tile_steering_override; |
| 789 | 754 | ||
| 755 | dev_info.tcc_disabled_mask = adev->gfx.config.tcc_disabled_mask; | ||
| 756 | |||
| 790 | return copy_to_user(out, &dev_info, | 757 | return copy_to_user(out, &dev_info, |
| 791 | min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0; | 758 | min((size_t)size, sizeof(dev_info))) ? -EFAULT : 0; |
| 792 | } | 759 | } |
| @@ -603,14 +603,12 @@ void amdgpu_vm_move_to_lru_tail(struct amdgpu_device *adev, · 602 unmodified lines | |||
| 603 | struct ttm_bo_global *glob = adev->mman.bdev.glob; | 603 | struct ttm_bo_global *glob = adev->mman.bdev.glob; |
| 604 | struct amdgpu_vm_bo_base *bo_base; | 604 | struct amdgpu_vm_bo_base *bo_base; |
| 605 | 605 | ||
| 606 | #if 0 | ||
| 607 | if (vm->bulk_moveable) { | 606 | if (vm->bulk_moveable) { |
| 608 | spin_lock(&glob->lru_lock); | 607 | spin_lock(&glob->lru_lock); |
| 609 | ttm_bo_bulk_move_lru_tail(&vm->lru_bulk_move); | 608 | ttm_bo_bulk_move_lru_tail(&vm->lru_bulk_move); |
| 610 | spin_unlock(&glob->lru_lock); | 609 | spin_unlock(&glob->lru_lock); |
| 611 | return; | 610 | return; |
| 612 | } | 611 | } |
| 613 | #endif | ||
| 614 | 612 | ||
| 615 | memset(&vm->lru_bulk_move, 0, sizeof(vm->lru_bulk_move)); | 613 | memset(&vm->lru_bulk_move, 0, sizeof(vm->lru_bulk_move)); |
| 616 | 614 | ||
| @@ -1691,6 +1691,17 @@ static void gfx_v10_0_tcp_harvest(struct amdgpu_device *adev) · 1690 unmodified lines | |||
| 1691 | } | 1691 | } |
| 1692 | } | 1692 | } |
| 1693 | 1693 | ||
| 1694 | static void gfx_v10_0_get_tcc_info(struct amdgpu_device *adev) | ||
| 1695 | { | ||
| 1696 | /* TCCs are global (not instanced). */ | ||
| 1697 | uint32_t tcc_disable = RREG32_SOC15(GC, 0, mmCGTS_TCC_DISABLE) | | ||
| 1698 | RREG32_SOC15(GC, 0, mmCGTS_USER_TCC_DISABLE); | ||
| 1699 | |||
| 1700 | adev->gfx.config.tcc_disabled_mask = | ||
| 1701 | REG_GET_FIELD(tcc_disable, CGTS_TCC_DISABLE, TCC_DISABLE) | | ||
| 1702 | (REG_GET_FIELD(tcc_disable, CGTS_TCC_DISABLE, HI_TCC_DISABLE) << 16); | ||
| 1703 | } | ||
| 1704 | |||
| 1694 | static void gfx_v10_0_constants_init(struct amdgpu_device *adev) | 1705 | static void gfx_v10_0_constants_init(struct amdgpu_device *adev) |
| 1695 | { | 1706 | { |
| 1696 | u32 tmp; | 1707 | u32 tmp; |
| @@ -1702,6 +1713,7 @@ static void gfx_v10_0_constants_init(struct amdgpu_device *adev) · 5 unmodified lines | |||
| 1702 | 1713 | ||
| 1703 | gfx_v10_0_setup_rb(adev); | 1714 | gfx_v10_0_setup_rb(adev); |
| 1704 | gfx_v10_0_get_cu_info(adev, &adev->gfx.cu_info); | 1715 | gfx_v10_0_get_cu_info(adev, &adev->gfx.cu_info); |
| 1716 | gfx_v10_0_get_tcc_info(adev); | ||
| 1705 | adev->gfx.config.pa_sc_tile_steering_override = | 1717 | adev->gfx.config.pa_sc_tile_steering_override = |
| 1706 | gfx_v10_0_init_pa_sc_tile_steering_override(adev); | 1718 | gfx_v10_0_init_pa_sc_tile_steering_override(adev); |
| 1707 | 1719 | ||
| @@ -317,10 +317,12 @@ static int nv_asic_reset(struct amdgpu_device *adev) · 316 unmodified lines | |||
| 317 | struct smu_context *smu = &adev->smu; | 317 | struct smu_context *smu = &adev->smu; |
| 318 | 318 | ||
| 319 | if (nv_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) { | 319 | if (nv_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) { |
| 320 | amdgpu_inc_vram_lost(adev); | 320 | if (!adev->in_suspend) |
| 321 | amdgpu_inc_vram_lost(adev); | ||
| 321 | ret = smu_baco_reset(smu); | 322 | ret = smu_baco_reset(smu); |
| 322 | } else { | 323 | } else { |
| 323 | amdgpu_inc_vram_lost(adev); | 324 | if (!adev->in_suspend) |
| 325 | amdgpu_inc_vram_lost(adev); | ||
| 324 | ret = nv_asic_mode1_reset(adev); | 326 | ret = nv_asic_mode1_reset(adev); |
| 325 | } | 327 | } |
| 326 | 328 | ||
| @@ -1129,7 +1129,7 @@ static void sdma_v5_0_ring_emit_pipeline_sync(struct amdgpu_ring *ring) · 1128 unmodified lines | |||
| 1129 | amdgpu_ring_write(ring, addr & 0xfffffffc); | 1129 | amdgpu_ring_write(ring, addr & 0xfffffffc); |
| 1130 | amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); | 1130 | amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff); |
| 1131 | amdgpu_ring_write(ring, seq); /* reference */ | 1131 | amdgpu_ring_write(ring, seq); /* reference */ |
| 1132 | amdgpu_ring_write(ring, 0xfffffff); /* mask */ | 1132 | amdgpu_ring_write(ring, 0xffffffff); /* mask */ |
| 1133 | amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | | 1133 | amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) | |
| 1134 | SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */ | 1134 | SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count, poll interval */ |
| 1135 | } | 1135 | } |
| @@ -558,12 +558,14 @@ static int soc15_asic_reset(struct amdgpu_device *adev) · 557 unmodified lines | |||
| 558 | { | 558 | { |
| 559 | switch (soc15_asic_reset_method(adev)) { | 559 | switch (soc15_asic_reset_method(adev)) { |
| 560 | case AMD_RESET_METHOD_BACO: | 560 | case AMD_RESET_METHOD_BACO: |
| 561 | amdgpu_inc_vram_lost(adev); | 561 | if (!adev->in_suspend) |
| 562 | amdgpu_inc_vram_lost(adev); | ||
| 562 | return soc15_asic_baco_reset(adev); | 563 | return soc15_asic_baco_reset(adev); |
| 563 | case AMD_RESET_METHOD_MODE2: | 564 | case AMD_RESET_METHOD_MODE2: |
| 564 | return soc15_mode2_reset(adev); | 565 | return soc15_mode2_reset(adev); |
| 565 | default: | 566 | default: |
| 566 | amdgpu_inc_vram_lost(adev); | 567 | if (!adev->in_suspend) |
| 568 | amdgpu_inc_vram_lost(adev); | ||
| 567 | return soc15_asic_mode1_reset(adev); | 569 | return soc15_asic_mode1_reset(adev); |
| 568 | } | 570 | } |
| 569 | } | 571 | } |
| @@ -771,8 +773,6 @@ int soc15_set_ip_blocks(struct amdgpu_device *adev) · 201 unmodified lines | |||
| 771 | #if defined(CONFIG_DRM_AMD_DC) | 773 | #if defined(CONFIG_DRM_AMD_DC) |
| 772 | else if (amdgpu_device_has_dc_support(adev)) | 774 | else if (amdgpu_device_has_dc_support(adev)) |
| 773 | amdgpu_device_ip_block_add(adev, &dm_ip_block); | 775 | amdgpu_device_ip_block_add(adev, &dm_ip_block); |
| 774 | #else | ||
| 775 | # warning "Enable CONFIG_DRM_AMD_DC for display support on SOC15." | ||
| 776 | #endif | 776 | #endif |
| 777 | amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); | 777 | amdgpu_device_ip_block_add(adev, &vcn_v2_0_ip_block); |
| 778 | break; | 778 | break; |
| @@ -2385,8 +2385,6 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) · 2384 unmodified lines | |||
| 2385 | 2385 | ||
| 2386 | if (adev->asic_type != CHIP_CARRIZO && adev->asic_type != CHIP_STONEY) | 2386 | if (adev->asic_type != CHIP_CARRIZO && adev->asic_type != CHIP_STONEY) |
| 2387 | dm->dc->debug.disable_stutter = amdgpu_pp_feature_mask & PP_STUTTER_MODE ? false : true; | 2387 | dm->dc->debug.disable_stutter = amdgpu_pp_feature_mask & PP_STUTTER_MODE ? false : true; |
| 2388 | if (adev->asic_type == CHIP_RENOIR) | ||
| 2389 | dm->dc->debug.disable_stutter = true; | ||
| 2390 | 2388 | ||
| 2391 | return 0; | 2389 | return 0; |
| 2392 | fail: | 2390 | fail: |
| @@ -6019,7 +6017,9 @@ static void amdgpu_dm_enable_crtc_interrupts(struct drm_device *dev, · 3626 unmodified lines | |||
| 6019 | struct drm_crtc *crtc; | 6017 | struct drm_crtc *crtc; |
| 6020 | struct drm_crtc_state *old_crtc_state, *new_crtc_state; | 6018 | struct drm_crtc_state *old_crtc_state, *new_crtc_state; |
| 6021 | int i; | 6019 | int i; |
| 6020 | #ifdef CONFIG_DEBUG_FS | ||
| 6022 | enum amdgpu_dm_pipe_crc_source source; | 6021 | enum amdgpu_dm_pipe_crc_source source; |
| 6022 | #endif | ||
| 6023 | 6023 | ||
| 6024 | for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, | 6024 | for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, |
| 6025 | new_crtc_state, i) { | 6025 | new_crtc_state, i) { |
| @@ -668,6 +668,7 @@ struct clock_source *dce100_clock_source_create( · 667 unmodified lines | |||
| 668 | return &clk_src->base; | 668 | return &clk_src->base; |
| 669 | } | 669 | } |
| 670 | 670 | ||
| 671 | kfree(clk_src); | ||
| 671 | BREAK_TO_DEBUGGER(); | 672 | BREAK_TO_DEBUGGER(); |
| 672 | return NULL; | 673 | return NULL; |
| 673 | } | 674 | } |
| @@ -714,6 +714,7 @@ struct clock_source *dce110_clock_source_create( · 713 unmodified lines | |||
| 714 | return &clk_src->base; | 714 | return &clk_src->base; |
| 715 | } | 715 | } |
| 716 | 716 | ||
| 717 | kfree(clk_src); | ||
| 717 | BREAK_TO_DEBUGGER(); | 718 | BREAK_TO_DEBUGGER(); |
| 718 | return NULL; | 719 | return NULL; |
| 719 | } | 720 | } |
| @@ -687,6 +687,7 @@ struct clock_source *dce112_clock_source_create( · 686 unmodified lines | |||
| 687 | return &clk_src->base; | 687 | return &clk_src->base; |
| 688 | } | 688 | } |
| 689 | 689 | ||
| 690 | kfree(clk_src); | ||
| 690 | BREAK_TO_DEBUGGER(); | 691 | BREAK_TO_DEBUGGER(); |
| 691 | return NULL; | 692 | return NULL; |
| 692 | } | 693 | } |
| @@ -500,6 +500,7 @@ static struct clock_source *dce120_clock_source_create( · 499 unmodified lines | |||
| 500 | return &clk_src->base; | 500 | return &clk_src->base; |
| 501 | } | 501 | } |
| 502 | 502 | ||
| 503 | kfree(clk_src); | ||
| 503 | BREAK_TO_DEBUGGER(); | 504 | BREAK_TO_DEBUGGER(); |
| 504 | return NULL; | 505 | return NULL; |
| 505 | } | 506 | } |
| @@ -701,6 +701,7 @@ struct clock_source *dce80_clock_source_create( · 700 unmodified lines | |||
| 701 | return &clk_src->base; | 701 | return &clk_src->base; |
| 702 | } | 702 | } |
| 703 | 703 | ||
| 704 | kfree(clk_src); | ||
| 704 | BREAK_TO_DEBUGGER(); | 705 | BREAK_TO_DEBUGGER(); |
| 705 | return NULL; | 706 | return NULL; |
| 706 | } | 707 | } |
| @@ -786,6 +786,7 @@ struct clock_source *dcn10_clock_source_create( · 785 unmodified lines | |||
| 786 | return &clk_src->base; | 786 | return &clk_src->base; |
| 787 | } | 787 | } |
| 788 | 788 | ||
| 789 | kfree(clk_src); | ||
| 789 | BREAK_TO_DEBUGGER(); | 790 | BREAK_TO_DEBUGGER(); |
| 790 | return NULL; | 791 | return NULL; |
| 791 | } | 792 | } |
| @@ -1077,6 +1077,7 @@ struct clock_source *dcn20_clock_source_create( · 1076 unmodified lines | |||
| 1077 | return &clk_src->base; | 1077 | return &clk_src->base; |
| 1078 | } | 1078 | } |
| 1079 | 1079 | ||
| 1080 | kfree(clk_src); | ||
| 1080 | BREAK_TO_DEBUGGER(); | 1081 | BREAK_TO_DEBUGGER(); |
| 1081 | return NULL; | 1082 | return NULL; |
| 1082 | } | 1083 | } |
| @@ -3,7 +3,17 @@ · 2 unmodified lines | |||
| 3 | 3 | ||
| 4 | DCN21 = dcn21_hubp.o dcn21_hubbub.o dcn21_resource.o | 4 | DCN21 = dcn21_hubp.o dcn21_hubbub.o dcn21_resource.o |
| 5 | 5 | ||
| 6 | CFLAGS_$(AMDDALPATH)/dc/dcn21/dcn21_resource.o := -mhard-float -msse -mpreferred-stack-boundary=4 | 6 | ifneq ($(call cc-option, -mpreferred-stack-boundary=4),) |
| 7 | cc_stack_align := -mpreferred-stack-boundary=4 | ||
| 8 | else ifneq ($(call cc-option, -mstack-alignment=16),) | ||
| 9 | cc_stack_align := -mstack-alignment=16 | ||
| 10 | endif | ||
| 11 | |||
| 12 | CFLAGS_$(AMDDALPATH)/dc/dcn21/dcn21_resource.o := -mhard-float -msse $(cc_stack_align) | ||
| 13 | |||
| 14 | ifdef CONFIG_CC_IS_CLANG | ||
| 15 | CFLAGS_$(AMDDALPATH)/dc/dcn21/dcn21_resource.o += -msse2 | ||
| 16 | endif | ||
| 7 | 17 | ||
| 8 | AMD_DAL_DCN21 = $(addprefix $(AMDDALPATH)/dc/dcn21/,$(DCN21)) | 18 | AMD_DAL_DCN21 = $(addprefix $(AMDDALPATH)/dc/dcn21/,$(DCN21)) |
| 9 | 19 | ||
| @@ -39,9 +39,6 @@ · 38 unmodified lines | |||
| 39 | * ways. Unless there is something clearly wrong with it the code should | 39 | * ways. Unless there is something clearly wrong with it the code should |
| 40 | * remain as-is as it provides us with a guarantee from HW that it is correct. | 40 | * remain as-is as it provides us with a guarantee from HW that it is correct. |
| 41 | */ | 41 | */ |
| 42 | |||
| 43 | typedef unsigned int uint; | ||
| 44 | |||
| 45 | typedef struct { | 42 | typedef struct { |
| 46 | double DPPCLK; | 43 | double DPPCLK; |
| 47 | double DISPCLK; | 44 | double DISPCLK; |
| @@ -4774,7 +4771,7 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l · 4726 unmodified lines | |||
| 4774 | mode_lib->vba.MaximumReadBandwidthWithoutPrefetch = 0.0; | 4771 | mode_lib->vba.MaximumReadBandwidthWithoutPrefetch = 0.0; |
| 4775 | mode_lib->vba.MaximumReadBandwidthWithPrefetch = 0.0; | 4772 | mode_lib->vba.MaximumReadBandwidthWithPrefetch = 0.0; |
| 4776 | for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { | 4773 | for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) { |
| 4777 | uint m; | 4774 | unsigned int m; |
| 4778 | 4775 | ||
| 4779 | locals->cursor_bw[k] = 0; | 4776 | locals->cursor_bw[k] = 0; |
| 4780 | locals->cursor_bw_pre[k] = 0; | 4777 | locals->cursor_bw_pre[k] = 0; |
| @@ -5285,7 +5282,7 @@ static void CalculateWatermarksAndDRAMSpeedChangeSupport( · 504 unmodified lines | |||
| 5285 | double SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank; | 5282 | double SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank; |
| 5286 | double FullDETBufferingTimeYStutterCriticalPlane = 0; | 5283 | double FullDETBufferingTimeYStutterCriticalPlane = 0; |
| 5287 | double TimeToFinishSwathTransferStutterCriticalPlane = 0; | 5284 | double TimeToFinishSwathTransferStutterCriticalPlane = 0; |
| 5288 | uint k, j; | 5285 | unsigned int k, j; |
| 5289 | 5286 | ||
| 5290 | mode_lib->vba.TotalActiveDPP = 0; | 5287 | mode_lib->vba.TotalActiveDPP = 0; |
| 5291 | mode_lib->vba.TotalDCCActiveDPP = 0; | 5288 | mode_lib->vba.TotalDCCActiveDPP = 0; |
| @@ -5507,7 +5504,7 @@ static void CalculateDCFCLKDeepSleep( · 215 unmodified lines | |||
| 5507 | double DPPCLK[], | 5504 | double DPPCLK[], |
| 5508 | double *DCFCLKDeepSleep) | 5505 | double *DCFCLKDeepSleep) |
| 5509 | { | 5506 | { |
| 5510 | uint k; | 5507 | unsigned int k; |
| 5511 | double DisplayPipeLineDeliveryTimeLuma; | 5508 | double DisplayPipeLineDeliveryTimeLuma; |
| 5512 | double DisplayPipeLineDeliveryTimeChroma; | 5509 | double DisplayPipeLineDeliveryTimeChroma; |
| 5513 | //double DCFCLKDeepSleepPerPlane[DC__NUM_DPP__MAX]; | 5510 | //double DCFCLKDeepSleepPerPlane[DC__NUM_DPP__MAX]; |
| @@ -5727,7 +5724,7 @@ static void CalculatePixelDeliveryTimes( · 213 unmodified lines | |||
| 5727 | double DisplayPipeRequestDeliveryTimeChromaPrefetch[]) | 5724 | double DisplayPipeRequestDeliveryTimeChromaPrefetch[]) |
| 5728 | { | 5725 | { |
| 5729 | double req_per_swath_ub; | 5726 | double req_per_swath_ub; |
| 5730 | uint k; | 5727 | unsigned int k; |
| 5731 | 5728 | ||
| 5732 | for (k = 0; k < NumberOfActivePlanes; ++k) { | 5729 | for (k = 0; k < NumberOfActivePlanes; ++k) { |
| 5733 | if (VRatio[k] <= 1) { | 5730 | if (VRatio[k] <= 1) { |
| @@ -5869,7 +5866,7 @@ static void CalculateMetaAndPTETimes( · 135 unmodified lines | |||
| 5869 | unsigned int dpte_groups_per_row_chroma_ub; | 5866 | unsigned int dpte_groups_per_row_chroma_ub; |
| 5870 | unsigned int num_group_per_lower_vm_stage; | 5867 | unsigned int num_group_per_lower_vm_stage; |
| 5871 | unsigned int num_req_per_lower_vm_stage; | 5868 | unsigned int num_req_per_lower_vm_stage; |
| 5872 | uint k; | 5869 | unsigned int k; |
| 5873 | 5870 | ||
| 5874 | for (k = 0; k < NumberOfActivePlanes; ++k) { | 5871 | for (k = 0; k < NumberOfActivePlanes; ++k) { |
| 5875 | if (GPUVMEnable == true) { | 5872 | if (GPUVMEnable == true) { |
| @@ -843,6 +843,8 @@ static int smu_sw_init(void *handle) · 842 unmodified lines | |||
| 843 | smu->smu_baco.state = SMU_BACO_STATE_EXIT; | 843 | smu->smu_baco.state = SMU_BACO_STATE_EXIT; |
| 844 | smu->smu_baco.platform_support = false; | 844 | smu->smu_baco.platform_support = false; |
| 845 | 845 | ||
| 846 | mutex_init(&smu->sensor_lock); | ||
| 847 | |||
| 846 | smu->watermarks_bitmap = 0; | 848 | smu->watermarks_bitmap = 0; |
| 847 | smu->power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; | 849 | smu->power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; |
| 848 | smu->default_power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; | 850 | smu->default_power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT; |
| @@ -1018,6 +1018,7 @@ static int arcturus_read_sensor(struct smu_context *smu, · 1017 unmodified lines | |||
| 1018 | if (!data || !size) | 1018 | if (!data || !size) |
| 1019 | return -EINVAL; | 1019 | return -EINVAL; |
| 1020 | 1020 | ||
| 1021 | mutex_lock(&smu->sensor_lock); | ||
| 1021 | switch (sensor) { | 1022 | switch (sensor) { |
| 1022 | case AMDGPU_PP_SENSOR_MAX_FAN_RPM: | 1023 | case AMDGPU_PP_SENSOR_MAX_FAN_RPM: |
| 1023 | *(uint32_t *)data = pptable->FanMaximumRpm; | 1024 | *(uint32_t *)data = pptable->FanMaximumRpm; |
| @@ -1044,6 +1045,7 @@ static int arcturus_read_sensor(struct smu_context *smu, · 20 unmodified lines | |||
| 1044 | default: | 1045 | default: |
| 1045 | ret = smu_smc_read_sensor(smu, sensor, data, size); | 1046 | ret = smu_smc_read_sensor(smu, sensor, data, size); |
| 1046 | } | 1047 | } |
| 1048 | mutex_unlock(&smu->sensor_lock); | ||
| 1047 | 1049 | ||
| 1048 | return ret; | 1050 | return ret; |
| 1049 | } | 1051 | } |
| @@ -344,6 +344,7 @@ struct smu_context · 343 unmodified lines | |||
| 344 | const struct smu_funcs *funcs; | 344 | const struct smu_funcs *funcs; |
| 345 | const struct pptable_funcs *ppt_funcs; | 345 | const struct pptable_funcs *ppt_funcs; |
| 346 | struct mutex mutex; | 346 | struct mutex mutex; |
| 347 | struct mutex sensor_lock; | ||
| 347 | uint64_t pool_size; | 348 | uint64_t pool_size; |
| 348 | 349 | ||
| 349 | struct smu_table_context smu_table; | 350 | struct smu_table_context smu_table; |
| @@ -547,7 +547,7 @@ static int navi10_get_metrics_table(struct smu_context *smu, · 546 unmodified lines | |||
| 547 | struct smu_table_context *smu_table= &smu->smu_table; | 547 | struct smu_table_context *smu_table= &smu->smu_table; |
| 548 | int ret = 0; | 548 | int ret = 0; |
| 549 | 549 | ||
| 550 | if (!smu_table->metrics_time || time_after(jiffies, smu_table->metrics_time + HZ / 1000)) { | 550 | if (!smu_table->metrics_time || time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(100))) { |
| 551 | ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0, | 551 | ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0, |
| 552 | (void *)smu_table->metrics_table, false); | 552 | (void *)smu_table->metrics_table, false); |
| 553 | if (ret) { | 553 | if (ret) { |
| @@ -1386,6 +1386,7 @@ static int navi10_read_sensor(struct smu_context *smu, · 832 unmodified lines | |||
| 1386 | if(!data || !size) | 1386 | if(!data || !size) |
| 1387 | return -EINVAL; | 1387 | return -EINVAL; |
| 1388 | 1388 | ||
| 1389 | mutex_lock(&smu->sensor_lock); | ||
| 1389 | switch (sensor) { | 1390 | switch (sensor) { |
| 1390 | case AMDGPU_PP_SENSOR_MAX_FAN_RPM: | 1391 | case AMDGPU_PP_SENSOR_MAX_FAN_RPM: |
| 1391 | *(uint32_t *)data = pptable->FanMaximumRpm; | 1392 | *(uint32_t *)data = pptable->FanMaximumRpm; |
| @@ -1409,6 +1410,7 @@ static int navi10_read_sensor(struct smu_context *smu, · 17 unmodified lines | |||
| 1409 | default: | 1410 | default: |
| 1410 | ret = smu_smc_read_sensor(smu, sensor, data, size); | 1411 | ret = smu_smc_read_sensor(smu, sensor, data, size); |
| 1411 | } | 1412 | } |
| 1413 | mutex_unlock(&smu->sensor_lock); | ||
| 1412 | 1414 | ||
| 1413 | return ret; | 1415 | return ret; |
| 1414 | } | 1416 | } |
| @@ -655,7 +655,7 @@ static int polaris10_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr, · 654 unmodified lines | |||
| 655 | count = SMU_MAX_SMIO_LEVELS; | 655 | count = SMU_MAX_SMIO_LEVELS; |
| 656 | for (level = 0; level < count; level++) { | 656 | for (level = 0; level < count; level++) { |
| 657 | table->SmioTable2.Pattern[level].Voltage = | 657 | table->SmioTable2.Pattern[level].Voltage = |
| 658 | PP_HOST_TO_SMC_US(data->mvdd_voltage_table.entries[count].value * VOLTAGE_SCALE); | 658 | PP_HOST_TO_SMC_US(data->mvdd_voltage_table.entries[level].value * VOLTAGE_SCALE); |
| 659 | /* Index into DpmTable.Smio. Drive bits from Smio entry to get this voltage level.*/ | 659 | /* Index into DpmTable.Smio. Drive bits from Smio entry to get this voltage level.*/ |
| 660 | table->SmioTable2.Pattern[level].Smio = | 660 | table->SmioTable2.Pattern[level].Smio = |
| 661 | (uint8_t) level; | 661 | (uint8_t) level; |
| @@ -456,7 +456,7 @@ static int vegam_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr, · 455 unmodified lines | |||
| 456 | count = SMU_MAX_SMIO_LEVELS; | 456 | count = SMU_MAX_SMIO_LEVELS; |
| 457 | for (level = 0; level < count; level++) { | 457 | for (level = 0; level < count; level++) { |
| 458 | table->SmioTable2.Pattern[level].Voltage = PP_HOST_TO_SMC_US( | 458 | table->SmioTable2.Pattern[level].Voltage = PP_HOST_TO_SMC_US( |
| 459 | data->mvdd_voltage_table.entries[count].value * VOLTAGE_SCALE); | 459 | data->mvdd_voltage_table.entries[level].value * VOLTAGE_SCALE); |
| 460 | /* Index into DpmTable.Smio. Drive bits from Smio entry to get this voltage level.*/ | 460 | /* Index into DpmTable.Smio. Drive bits from Smio entry to get this voltage level.*/ |
| 461 | table->SmioTable2.Pattern[level].Smio = | 461 | table->SmioTable2.Pattern[level].Smio = |
| 462 | (uint8_t) level; | 462 | (uint8_t) level; |
| @@ -3023,6 +3023,7 @@ static int vega20_read_sensor(struct smu_context *smu, · 3022 unmodified lines | |||
| 3023 | if(!data || !size) | 3023 | if(!data || !size) |
| 3024 | return -EINVAL; | 3024 | return -EINVAL; |
| 3025 | 3025 | ||
| 3026 | mutex_lock(&smu->sensor_lock); | ||
| 3026 | switch (sensor) { | 3027 | switch (sensor) { |
| 3027 | case AMDGPU_PP_SENSOR_MAX_FAN_RPM: | 3028 | case AMDGPU_PP_SENSOR_MAX_FAN_RPM: |
| 3028 | *(uint32_t *)data = pptable->FanMaximumRpm; | 3029 | *(uint32_t *)data = pptable->FanMaximumRpm; |
| @@ -3048,6 +3049,7 @@ static int vega20_read_sensor(struct smu_context *smu, · 19 unmodified lines | |||
| 3048 | default: | 3049 | default: |
| 3049 | ret = smu_smc_read_sensor(smu, sensor, data, size); | 3050 | ret = smu_smc_read_sensor(smu, sensor, data, size); |
| 3050 | } | 3051 | } |
| 3052 | mutex_unlock(&smu->sensor_lock); | ||
| 3051 | 3053 | ||
| 3052 | return ret; | 3054 | return ret; |
| 3053 | } | 3055 | } |
| @@ -43,9 +43,8 @@ komeda_wb_encoder_atomic_check(struct drm_encoder *encoder, · 42 unmodified lines | |||
| 43 | struct komeda_data_flow_cfg dflow; | 43 | struct komeda_data_flow_cfg dflow; |
| 44 | int err; | 44 | int err; |
| 45 | 45 | ||
| 46 | if (!writeback_job || !writeback_job->fb) { | 46 | if (!writeback_job) |
| 47 | return 0; | 47 | return 0; |
| 48 | } | ||
| 49 | 48 | ||
| 50 | if (!crtc_st->active) { | 49 | if (!crtc_st->active) { |
| 51 | DRM_DEBUG_ATOMIC("Cannot write the composition result out on a inactive CRTC.\n"); | 50 | DRM_DEBUG_ATOMIC("Cannot write the composition result out on a inactive CRTC.\n"); |
| @@ -166,8 +165,10 @@ static int komeda_wb_connector_add(struct komeda_kms_dev *kms, · 114 unmodified lines | |||
| 166 | &komeda_wb_encoder_helper_funcs, | 165 | &komeda_wb_encoder_helper_funcs, |
| 167 | formats, n_formats); | 166 | formats, n_formats); |
| 168 | komeda_put_fourcc_list(formats); | 167 | komeda_put_fourcc_list(formats); |
| 169 | if (err) | 168 | if (err) { |
| 169 | kfree(kwb_conn); | ||
| 170 | return err; | 170 | return err; |
| 171 | } | ||
| 171 | 172 | ||
| 172 | drm_connector_helper_add(&wb_conn->base, &komeda_wb_conn_helper_funcs); | 173 | drm_connector_helper_add(&wb_conn->base, &komeda_wb_conn_helper_funcs); |
| 173 | 174 | ||
| @@ -131,7 +131,7 @@ malidp_mw_encoder_atomic_check(struct drm_encoder *encoder, · 130 unmodified lines | |||
| 131 | struct drm_framebuffer *fb; | 131 | struct drm_framebuffer *fb; |
| 132 | int i, n_planes; | 132 | int i, n_planes; |
| 133 | 133 | ||
| 134 | if (!conn_state->writeback_job || !conn_state->writeback_job->fb) | 134 | if (!conn_state->writeback_job) |
| 135 | return 0; | 135 | return 0; |
| 136 | 136 | ||
| 137 | fb = conn_state->writeback_job->fb; | 137 | fb = conn_state->writeback_job->fb; |
| @@ -248,7 +248,7 @@ void malidp_mw_atomic_commit(struct drm_device *drm, · 110 unmodified lines | |||
| 248 | 248 | ||
| 249 | mw_state = to_mw_state(conn_state); | 249 | mw_state = to_mw_state(conn_state); |
| 250 | 250 | ||
| 251 | if (conn_state->writeback_job && conn_state->writeback_job->fb) { | 251 | if (conn_state->writeback_job) { |
| 252 | struct drm_framebuffer *fb = conn_state->writeback_job->fb; | 252 | struct drm_framebuffer *fb = conn_state->writeback_job->fb; |
| 253 | 253 | ||
| 254 | DRM_DEV_DEBUG_DRIVER(drm->dev, | 254 | DRM_DEV_DEBUG_DRIVER(drm->dev, |
| @@ -728,6 +728,8 @@ static int tc_set_video_mode(struct tc_data *tc, · 727 unmodified lines | |||
| 728 | int lower_margin = mode->vsync_start - mode->vdisplay; | 728 | int lower_margin = mode->vsync_start - mode->vdisplay; |
| 729 | int vsync_len = mode->vsync_end - mode->vsync_start; | 729 | int vsync_len = mode->vsync_end - mode->vsync_start; |
| 730 | u32 dp0_syncval; | 730 | u32 dp0_syncval; |
| 731 | u32 bits_per_pixel = 24; | ||
| 732 | u32 in_bw, out_bw; | ||
| 731 | 733 | ||
| 732 | /* | 734 | /* |
| 733 | * Recommended maximum number of symbols transferred in a transfer unit: | 735 | * Recommended maximum number of symbols transferred in a transfer unit: |
| @@ -735,7 +737,10 @@ static int tc_set_video_mode(struct tc_data *tc, · 1 unmodified line | |||
| 735 | * (output active video bandwidth in bytes)) | 737 | * (output active video bandwidth in bytes)) |
| 736 | * Must be less than tu_size. | 738 | * Must be less than tu_size. |
| 737 | */ | 739 | */ |
| 738 | max_tu_symbol = TU_SIZE_RECOMMENDED - 1; | 740 | |
| 741 | in_bw = mode->clock * bits_per_pixel / 8; | ||
| 742 | out_bw = tc->link.base.num_lanes * tc->link.base.rate; | ||
| 743 | max_tu_symbol = DIV_ROUND_UP(in_bw * TU_SIZE_RECOMMENDED, out_bw); | ||
| 739 | 744 | ||
| 740 | dev_dbg(tc->dev, "set mode %dx%d\n", | 745 | dev_dbg(tc->dev, "set mode %dx%d\n", |
| 741 | mode->hdisplay, mode->vdisplay); | 746 | mode->hdisplay, mode->vdisplay); |
| @@ -430,10 +430,15 @@ static int drm_atomic_connector_check(struct drm_connector *connector, · 429 unmodified lines | |||
| 430 | return -EINVAL; | 430 | return -EINVAL; |
| 431 | } | 431 | } |
| 432 | 432 | ||
| 433 | if (writeback_job->out_fence && !writeback_job->fb) { | 433 | if (!writeback_job->fb) { |
| 434 | DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] requesting out-fence without framebuffer\n", | 434 | if (writeback_job->out_fence) { |
| 435 | connector->base.id, connector->name); | 435 | DRM_DEBUG_ATOMIC("[CONNECTOR:%d:%s] requesting out-fence without framebuffer\n", |
| 436 | return -EINVAL; | 436 | connector->base.id, connector->name); |
| 437 | return -EINVAL; | ||
| 438 | } | ||
| 439 | |||
| 440 | drm_writeback_cleanup_job(writeback_job); | ||
| 441 | state->writeback_job = NULL; | ||
| 437 | } | 442 | } |
| 438 | 443 | ||
| 439 | return 0; | 444 | return 0; |
| @@ -159,6 +159,9 @@ static const struct edid_quirk { · 158 unmodified lines | |||
| 159 | /* Medion MD 30217 PG */ | 159 | /* Medion MD 30217 PG */ |
| 160 | { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 }, | 160 | { "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 }, |
| 161 | 161 | ||
| 162 | /* Lenovo G50 */ | ||
| 163 | { "SDC", 18514, EDID_QUIRK_FORCE_6BPC }, | ||
| 164 | |||
| 162 | /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */ | 165 | /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */ |
| 163 | { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC }, | 166 | { "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC }, |
| 164 | 167 | ||
| @@ -324,6 +324,9 @@ void drm_writeback_cleanup_job(struct drm_writeback_job *job) · 323 unmodified lines | |||
| 324 | if (job->fb) | 324 | if (job->fb) |
| 325 | drm_framebuffer_put(job->fb); | 325 | drm_framebuffer_put(job->fb); |
| 326 | 326 | ||
| 327 | if (job->out_fence) | ||
| 328 | dma_fence_put(job->out_fence); | ||
| 329 | |||
| 327 | kfree(job); | 330 | kfree(job); |
| 328 | } | 331 | } |
| 329 | EXPORT_SYMBOL(drm_writeback_cleanup_job); | 332 | EXPORT_SYMBOL(drm_writeback_cleanup_job); |
| @@ -366,25 +369,29 @@ drm_writeback_signal_completion(struct drm_writeback_connector *wb_connector, · 36 unmodified lines | |||
| 366 | { | 369 | { |
| 367 | unsigned long flags; | 370 | unsigned long flags; |
| 368 | struct drm_writeback_job *job; | 371 | struct drm_writeback_job *job; |
| 372 | struct dma_fence *out_fence; | ||
| 369 | 373 | ||
| 370 | spin_lock_irqsave(&wb_connector->job_lock, flags); | 374 | spin_lock_irqsave(&wb_connector->job_lock, flags); |
| 371 | job = list_first_entry_or_null(&wb_connector->job_queue, | 375 | job = list_first_entry_or_null(&wb_connector->job_queue, |
| 372 | struct drm_writeback_job, | 376 | struct drm_writeback_job, |
| 373 | list_entry); | 377 | list_entry); |
| 374 | if (job) { | 378 | if (job) |
| 375 | list_del(&job->list_entry); | 379 | list_del(&job->list_entry); |
| 376 | if (job->out_fence) { | 380 | |
| 377 | if (status) | ||
| 378 | dma_fence_set_error(job->out_fence, status); | ||
| 379 | dma_fence_signal(job->out_fence); | ||
| 380 | dma_fence_put(job->out_fence); | ||
| 381 | } | ||
| 382 | } | ||
| 383 | spin_unlock_irqrestore(&wb_connector->job_lock, flags); | 381 | spin_unlock_irqrestore(&wb_connector->job_lock, flags); |
| 384 | 382 | ||
| 385 | if (WARN_ON(!job)) | 383 | if (WARN_ON(!job)) |
| 386 | return; | 384 | return; |
| 387 | 385 | ||
| 386 | out_fence = job->out_fence; | ||
| 387 | if (out_fence) { | ||
| 388 | if (status) | ||
| 389 | dma_fence_set_error(out_fence, status); | ||
| 390 | dma_fence_signal(out_fence); | ||
| 391 | dma_fence_put(out_fence); | ||
| 392 | job->out_fence = NULL; | ||
| 393 | } | ||
| 394 | |||
| 388 | INIT_WORK(&job->cleanup_work, cleanup_work); | 395 | INIT_WORK(&job->cleanup_work, cleanup_work); |
| 389 | queue_work(system_long_wq, &job->cleanup_work); | 396 | queue_work(system_long_wq, &job->cleanup_work); |
| 390 | } | 397 | } |
| @@ -1270,7 +1270,7 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, · 1269 unmodified lines | |||
| 1270 | DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, " | 1270 | DRM_DEBUG_KMS("port %c trying to use the same DDC pin (0x%x) as port %c, " |
| 1271 | "disabling port %c DVI/HDMI support\n", | 1271 | "disabling port %c DVI/HDMI support\n", |
| 1272 | port_name(port), info->alternate_ddc_pin, | 1272 | port_name(port), info->alternate_ddc_pin, |
| 1273 | port_name(p), port_name(port)); | 1273 | port_name(p), port_name(p)); |
| 1274 | 1274 | ||
| 1275 | /* | 1275 | /* |
| 1276 | * If we have multiple ports supposedly sharing the | 1276 | * If we have multiple ports supposedly sharing the |
| @@ -1278,9 +1278,14 @@ static void sanitize_ddc_pin(struct drm_i915_private *dev_priv, · 1 unmodified line | |||
| 1278 | * port. Otherwise they share the same ddc bin and | 1278 | * port. Otherwise they share the same ddc bin and |
| 1279 | * system couldn't communicate with them separately. | 1279 | * system couldn't communicate with them separately. |
| 1280 | * | 1280 | * |
| 1281 | * Give child device order the priority, first come first | 1281 | * Give inverse child device order the priority, |
| 1282 | * served. | 1282 | * last one wins. Yes, there are real machines |
| 1283 | * (eg. Asrock B250M-HDV) where VBT has both | ||
| 1284 | * port A and port E with the same AUX ch and | ||
| 1285 | * we must pick port E :( | ||
| 1283 | */ | 1286 | */ |
| 1287 | info = &dev_priv->vbt.ddi_port_info[p]; | ||
| 1288 | |||
| 1284 | info->supports_dvi = false; | 1289 | info->supports_dvi = false; |
| 1285 | info->supports_hdmi = false; | 1290 | info->supports_hdmi = false; |
| 1286 | info->alternate_ddc_pin = 0; | 1291 | info->alternate_ddc_pin = 0; |
| @@ -1316,7 +1321,7 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv, · 29 unmodified lines | |||
| 1316 | DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, " | 1321 | DRM_DEBUG_KMS("port %c trying to use the same AUX CH (0x%x) as port %c, " |
| 1317 | "disabling port %c DP support\n", | 1322 | "disabling port %c DP support\n", |
| 1318 | port_name(port), info->alternate_aux_channel, | 1323 | port_name(port), info->alternate_aux_channel, |
| 1319 | port_name(p), port_name(port)); | 1324 | port_name(p), port_name(p)); |
| 1320 | 1325 | ||
| 1321 | /* | 1326 | /* |
| 1322 | * If we have multiple ports supposedlt sharing the | 1327 | * If we have multiple ports supposedlt sharing the |
| @@ -1324,9 +1329,14 @@ static void sanitize_aux_ch(struct drm_i915_private *dev_priv, · 1 unmodified line | |||
| 1324 | * port. Otherwise they share the same aux channel | 1329 | * port. Otherwise they share the same aux channel |
| 1325 | * and system couldn't communicate with them separately. | 1330 | * and system couldn't communicate with them separately. |
| 1326 | * | 1331 | * |
| 1327 | * Give child device order the priority, first come first | 1332 | * Give inverse child device order the priority, |
| 1328 | * served. | 1333 | * last one wins. Yes, there are real machines |
| 1334 | * (eg. Asrock B250M-HDV) where VBT has both | ||
| 1335 | * port A and port E with the same AUX ch and | ||
| 1336 | * we must pick port E :( | ||
| 1329 | */ | 1337 | */ |
| 1338 | info = &dev_priv->vbt.ddi_port_info[p]; | ||
| 1339 | |||
| 1330 | info->supports_dp = false; | 1340 | info->supports_dp = false; |
| 1331 | info->alternate_aux_channel = 0; | 1341 | info->alternate_aux_channel = 0; |
| 1332 | } | 1342 | } |
| @@ -3280,7 +3280,20 @@ static int skl_max_plane_width(const struct drm_framebuffer *fb, · 3279 unmodified lines | |||
| 3280 | switch (fb->modifier) { | 3280 | switch (fb->modifier) { |
| 3281 | case DRM_FORMAT_MOD_LINEAR: | 3281 | case DRM_FORMAT_MOD_LINEAR: |
| 3282 | case I915_FORMAT_MOD_X_TILED: | 3282 | case I915_FORMAT_MOD_X_TILED: |
| 3283 | return 4096; | 3283 | /* |
| 3284 | * Validated limit is 4k, but has 5k should | ||
| 3285 | * work apart from the following features: | ||
| 3286 | * - Ytile (already limited to 4k) | ||
| 3287 | * - FP16 (already limited to 4k) | ||
| 3288 | * - render compression (already limited to 4k) | ||
| 3289 | * - KVMR sprite and cursor (don't care) | ||
| 3290 | * - horizontal panning (TODO verify this) | ||
| 3291 | * - pipe and plane scaling (TODO verify this) | ||
| 3292 | */ | ||
| 3293 | if (cpp == 8) | ||
| 3294 | return 4096; | ||
| 3295 | else | ||
| 3296 | return 5120; | ||
| 3284 | case I915_FORMAT_MOD_Y_TILED_CCS: | 3297 | case I915_FORMAT_MOD_Y_TILED_CCS: |
| 3285 | case I915_FORMAT_MOD_Yf_TILED_CCS: | 3298 | case I915_FORMAT_MOD_Yf_TILED_CCS: |
| 3286 | /* FIXME AUX plane? */ | 3299 | /* FIXME AUX plane? */ |
| @@ -7261,7 +7274,7 @@ retry: · 3974 unmodified lines | |||
| 7261 | pipe_config->fdi_lanes = lane; | 7274 | pipe_config->fdi_lanes = lane; |
| 7262 | 7275 | ||
| 7263 | intel_link_compute_m_n(pipe_config->pipe_bpp, lane, fdi_dotclock, | 7276 | intel_link_compute_m_n(pipe_config->pipe_bpp, lane, fdi_dotclock, |
| 7264 | link_bw, &pipe_config->fdi_m_n, false); | 7277 | link_bw, &pipe_config->fdi_m_n, false, false); |
| 7265 | 7278 | ||
| 7266 | ret = ironlake_check_fdi_lanes(dev, intel_crtc->pipe, pipe_config); | 7279 | ret = ironlake_check_fdi_lanes(dev, intel_crtc->pipe, pipe_config); |
| 7267 | if (ret == -EDEADLK) | 7280 | if (ret == -EDEADLK) |
| @@ -7508,11 +7521,15 @@ void · 240 unmodified lines | |||
| 7508 | intel_link_compute_m_n(u16 bits_per_pixel, int nlanes, | 7521 | intel_link_compute_m_n(u16 bits_per_pixel, int nlanes, |
| 7509 | int pixel_clock, int link_clock, | 7522 | int pixel_clock, int link_clock, |
| 7510 | struct intel_link_m_n *m_n, | 7523 | struct intel_link_m_n *m_n, |
| 7511 | bool constant_n) | 7524 | bool constant_n, bool fec_enable) |
| 7512 | { | 7525 | { |
| 7513 | m_n->tu = 64; | 7526 | u32 data_clock = bits_per_pixel * pixel_clock; |
| 7514 | 7527 | ||
| 7515 | compute_m_n(bits_per_pixel * pixel_clock, | 7528 | if (fec_enable) |
| 7529 | data_clock = intel_dp_mode_to_fec_clock(data_clock); | ||
| 7530 | |||
| 7531 | m_n->tu = 64; | ||
| 7532 | compute_m_n(data_clock, | ||
| 7516 | link_clock * nlanes * 8, | 7533 | link_clock * nlanes * 8, |
| 7517 | &m_n->gmch_m, &m_n->gmch_n, | 7534 | &m_n->gmch_m, &m_n->gmch_n, |
| 7518 | constant_n); | 7535 | constant_n); |
| @@ -414,7 +414,7 @@ enum phy_fia { · 413 unmodified lines | |||
| 414 | void intel_link_compute_m_n(u16 bpp, int nlanes, | 414 | void intel_link_compute_m_n(u16 bpp, int nlanes, |
| 415 | int pixel_clock, int link_clock, | 415 | int pixel_clock, int link_clock, |
| 416 | struct intel_link_m_n *m_n, | 416 | struct intel_link_m_n *m_n, |
| 417 | bool constant_n); | 417 | bool constant_n, bool fec_enable); |
| 418 | bool is_ccs_modifier(u64 modifier); | 418 | bool is_ccs_modifier(u64 modifier); |
| 419 | void lpt_disable_clkout_dp(struct drm_i915_private *dev_priv); | 419 | void lpt_disable_clkout_dp(struct drm_i915_private *dev_priv); |
| 420 | u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv, | 420 | u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv, |
| @@ -78,8 +78,8 @@ · 77 unmodified lines | |||
| 78 | #define DP_DSC_MAX_ENC_THROUGHPUT_0 340000 | 78 | #define DP_DSC_MAX_ENC_THROUGHPUT_0 340000 |
| 79 | #define DP_DSC_MAX_ENC_THROUGHPUT_1 400000 | 79 | #define DP_DSC_MAX_ENC_THROUGHPUT_1 400000 |
| 80 | 80 | ||
| 81 | /* DP DSC FEC Overhead factor = (100 - 2.4)/100 */ | 81 | /* DP DSC FEC Overhead factor = 1/(0.972261) */ |
| 82 | #define DP_DSC_FEC_OVERHEAD_FACTOR 976 | 82 | #define DP_DSC_FEC_OVERHEAD_FACTOR 972261 |
| 83 | 83 | ||
| 84 | /* Compliance test status bits */ | 84 | /* Compliance test status bits */ |
| 85 | #define INTEL_DP_RESOLUTION_SHIFT_MASK 0 | 85 | #define INTEL_DP_RESOLUTION_SHIFT_MASK 0 |
| @@ -494,6 +494,97 @@ int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, · 408 unmodified lines | |||
| 494 | return 0; | 494 | return 0; |
| 495 | } | 495 | } |
| 496 | 496 | ||
| 497 | u32 intel_dp_mode_to_fec_clock(u32 mode_clock) | ||
| 498 | { | ||
| 499 | return div_u64(mul_u32_u32(mode_clock, 1000000U), | ||
| 500 | DP_DSC_FEC_OVERHEAD_FACTOR); | ||
| 501 | } | ||
| 502 | |||
| 503 | static u16 intel_dp_dsc_get_output_bpp(u32 link_clock, u32 lane_count, | ||
| 504 | u32 mode_clock, u32 mode_hdisplay) | ||
| 505 | { | ||
| 506 | u32 bits_per_pixel, max_bpp_small_joiner_ram; | ||
| 507 | int i; | ||
| 508 | |||
| 509 | /* | ||
| 510 | * Available Link Bandwidth(Kbits/sec) = (NumberOfLanes)* | ||
| 511 | * (LinkSymbolClock)* 8 * (TimeSlotsPerMTP) | ||
| 512 | * for SST -> TimeSlotsPerMTP is 1, | ||
| 513 | * for MST -> TimeSlotsPerMTP has to be calculated | ||
| 514 | */ | ||
| 515 | bits_per_pixel = (link_clock * lane_count * 8) / | ||
| 516 | intel_dp_mode_to_fec_clock(mode_clock); | ||
| 517 | DRM_DEBUG_KMS("Max link bpp: %u\n", bits_per_pixel); | ||
| 518 | |||
| 519 | /* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz. width */ | ||
| 520 | max_bpp_small_joiner_ram = DP_DSC_MAX_SMALL_JOINER_RAM_BUFFER / mode_hdisplay; | ||
| 521 | DRM_DEBUG_KMS("Max small joiner bpp: %u\n", max_bpp_small_joiner_ram); | ||
| 522 | |||
| 523 | /* | ||
| 524 | * Greatest allowed DSC BPP = MIN (output BPP from available Link BW | ||
| 525 | * check, output bpp from small joiner RAM check) | ||
| 526 | */ | ||
| 527 | bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram); | ||
| 528 | |||
| 529 | /* Error out if the max bpp is less than smallest allowed valid bpp */ | ||
| 530 | if (bits_per_pixel < valid_dsc_bpp[0]) { | ||
| 531 | DRM_DEBUG_KMS("Unsupported BPP %u, min %u\n", | ||
| 532 | bits_per_pixel, valid_dsc_bpp[0]); | ||
| 533 | return 0; | ||
| 534 | } | ||
| 535 | |||
| 536 | /* Find the nearest match in the array of known BPPs from VESA */ | ||
| 537 | for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp) - 1; i++) { | ||
| 538 | if (bits_per_pixel < valid_dsc_bpp[i + 1]) | ||
| 539 | break; | ||
| 540 | } | ||
| 541 | bits_per_pixel = valid_dsc_bpp[i]; | ||
| 542 | |||
| 543 | /* | ||
| 544 | * Compressed BPP in U6.4 format so multiply by 16, for Gen 11, | ||
| 545 | * fractional part is 0 | ||
| 546 | */ | ||
| 547 | return bits_per_pixel << 4; | ||
| 548 | } | ||
| 549 | |||
| 550 | static u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp, | ||
| 551 | int mode_clock, int mode_hdisplay) | ||
| 552 | { | ||
| 553 | u8 min_slice_count, i; | ||
| 554 | int max_slice_width; | ||
| 555 | |||
| 556 | if (mode_clock <= DP_DSC_PEAK_PIXEL_RATE) | ||
| 557 | min_slice_count = DIV_ROUND_UP(mode_clock, | ||
| 558 | DP_DSC_MAX_ENC_THROUGHPUT_0); | ||
| 559 | else | ||
| 560 | min_slice_count = DIV_ROUND_UP(mode_clock, | ||
| 561 | DP_DSC_MAX_ENC_THROUGHPUT_1); | ||
| 562 | |||
| 563 | max_slice_width = drm_dp_dsc_sink_max_slice_width(intel_dp->dsc_dpcd); | ||
| 564 | if (max_slice_width < DP_DSC_MIN_SLICE_WIDTH_VALUE) { | ||
| 565 | DRM_DEBUG_KMS("Unsupported slice width %d by DP DSC Sink device\n", | ||
| 566 | max_slice_width); | ||
| 567 | return 0; | ||
| 568 | } | ||
| 569 | /* Also take into account max slice width */ | ||
| 570 | min_slice_count = min_t(u8, min_slice_count, | ||
| 571 | DIV_ROUND_UP(mode_hdisplay, | ||
| 572 | max_slice_width)); | ||
| 573 | |||
| 574 | /* Find the closest match to the valid slice count values */ | ||
| 575 | for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) { | ||
| 576 | if (valid_dsc_slicecount[i] > | ||
| 577 | drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd, | ||
| 578 | false)) | ||
| 579 | break; | ||
| 580 | if (min_slice_count <= valid_dsc_slicecount[i]) | ||
| 581 | return valid_dsc_slicecount[i]; | ||
| 582 | } | ||
| 583 | |||
| 584 | DRM_DEBUG_KMS("Unsupported Slice Count %d\n", min_slice_count); | ||
| 585 | return 0; | ||
| 586 | } | ||
| 587 | |||
| 497 | static enum drm_mode_status | 588 | static enum drm_mode_status |
| 498 | intel_dp_mode_valid(struct drm_connector *connector, | 589 | intel_dp_mode_valid(struct drm_connector *connector, |
| 499 | struct drm_display_mode *mode) | 590 | struct drm_display_mode *mode) |
| @@ -2226,7 +2317,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, · 1726 unmodified lines | |||
| 2226 | adjusted_mode->crtc_clock, | 2317 | adjusted_mode->crtc_clock, |
| 2227 | pipe_config->port_clock, | 2318 | pipe_config->port_clock, |
| 2228 | &pipe_config->dp_m_n, | 2319 | &pipe_config->dp_m_n, |
| 2229 | constant_n); | 2320 | constant_n, pipe_config->fec_enable); |
| 2230 | 2321 | ||
| 2231 | if (intel_connector->panel.downclock_mode != NULL && | 2322 | if (intel_connector->panel.downclock_mode != NULL && |
| 2232 | dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) { | 2323 | dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) { |
| @@ -2236,7 +2327,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, · 3 unmodified lines | |||
| 2236 | intel_connector->panel.downclock_mode->clock, | 2327 | intel_connector->panel.downclock_mode->clock, |
| 2237 | pipe_config->port_clock, | 2328 | pipe_config->port_clock, |
| 2238 | &pipe_config->dp_m2_n2, | 2329 | &pipe_config->dp_m2_n2, |
| 2239 | constant_n); | 2330 | constant_n, pipe_config->fec_enable); |
| 2240 | } | 2331 | } |
| 2241 | 2332 | ||
| 2242 | if (!HAS_DDI(dev_priv)) | 2333 | if (!HAS_DDI(dev_priv)) |
| @@ -4323,91 +4414,6 @@ intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *sink_irq_vector) · 2080 unmodified lines | |||
| 4323 | DP_DPRX_ESI_LEN; | 4414 | DP_DPRX_ESI_LEN; |
| 4324 | } | 4415 | } |
| 4325 | 4416 | ||
| 4326 | u16 intel_dp_dsc_get_output_bpp(int link_clock, u8 lane_count, | ||
| 4327 | int mode_clock, int mode_hdisplay) | ||
| 4328 | { | ||
| 4329 | u16 bits_per_pixel, max_bpp_small_joiner_ram; | ||
| 4330 | int i; | ||
| 4331 | |||
| 4332 | /* | ||
| 4333 | * Available Link Bandwidth(Kbits/sec) = (NumberOfLanes)* | ||
| 4334 | * (LinkSymbolClock)* 8 * ((100-FECOverhead)/100)*(TimeSlotsPerMTP) | ||
| 4335 | * FECOverhead = 2.4%, for SST -> TimeSlotsPerMTP is 1, | ||
| 4336 | * for MST -> TimeSlotsPerMTP has to be calculated | ||
| 4337 | */ | ||
| 4338 | bits_per_pixel = (link_clock * lane_count * 8 * | ||
| 4339 | DP_DSC_FEC_OVERHEAD_FACTOR) / | ||
| 4340 | mode_clock; | ||
| 4341 | |||
| 4342 | /* Small Joiner Check: output bpp <= joiner RAM (bits) / Horiz. width */ | ||
| 4343 | max_bpp_small_joiner_ram = DP_DSC_MAX_SMALL_JOINER_RAM_BUFFER / | ||
| 4344 | mode_hdisplay; | ||
| 4345 | |||
| 4346 | /* | ||
| 4347 | * Greatest allowed DSC BPP = MIN (output BPP from avaialble Link BW | ||
| 4348 | * check, output bpp from small joiner RAM check) | ||
| 4349 | */ | ||
| 4350 | bits_per_pixel = min(bits_per_pixel, max_bpp_small_joiner_ram); | ||
| 4351 | |||
| 4352 | /* Error out if the max bpp is less than smallest allowed valid bpp */ | ||
| 4353 | if (bits_per_pixel < valid_dsc_bpp[0]) { | ||
| 4354 | DRM_DEBUG_KMS("Unsupported BPP %d\n", bits_per_pixel); | ||
| 4355 | return 0; | ||
| 4356 | } | ||
| 4357 | |||
| 4358 | /* Find the nearest match in the array of known BPPs from VESA */ | ||
| 4359 | for (i = 0; i < ARRAY_SIZE(valid_dsc_bpp) - 1; i++) { | ||
| 4360 | if (bits_per_pixel < valid_dsc_bpp[i + 1]) | ||
| 4361 | break; | ||
| 4362 | } | ||
| 4363 | bits_per_pixel = valid_dsc_bpp[i]; | ||
| 4364 | |||
| 4365 | /* | ||
| 4366 | * Compressed BPP in U6.4 format so multiply by 16, for Gen 11, | ||
| 4367 | * fractional part is 0 | ||
| 4368 | */ | ||
| 4369 | return bits_per_pixel << 4; | ||
| 4370 | } | ||
| 4371 | |||
| 4372 | u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp, | ||
| 4373 | int mode_clock, | ||
| 4374 | int mode_hdisplay) | ||
| 4375 | { | ||
| 4376 | u8 min_slice_count, i; | ||
| 4377 | int max_slice_width; | ||
| 4378 | |||
| 4379 | if (mode_clock <= DP_DSC_PEAK_PIXEL_RATE) | ||
| 4380 | min_slice_count = DIV_ROUND_UP(mode_clock, | ||
| 4381 | DP_DSC_MAX_ENC_THROUGHPUT_0); | ||
| 4382 | else | ||
| 4383 | min_slice_count = DIV_ROUND_UP(mode_clock, | ||
| 4384 | DP_DSC_MAX_ENC_THROUGHPUT_1); | ||
| 4385 | |||
| 4386 | max_slice_width = drm_dp_dsc_sink_max_slice_width(intel_dp->dsc_dpcd); | ||
| 4387 | if (max_slice_width < DP_DSC_MIN_SLICE_WIDTH_VALUE) { | ||
| 4388 | DRM_DEBUG_KMS("Unsupported slice width %d by DP DSC Sink device\n", | ||
| 4389 | max_slice_width); | ||
| 4390 | return 0; | ||
| 4391 | } | ||
| 4392 | /* Also take into account max slice width */ | ||
| 4393 | min_slice_count = min_t(u8, min_slice_count, | ||
| 4394 | DIV_ROUND_UP(mode_hdisplay, | ||
| 4395 | max_slice_width)); | ||
| 4396 | |||
| 4397 | /* Find the closest match to the valid slice count values */ | ||
| 4398 | for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) { | ||
| 4399 | if (valid_dsc_slicecount[i] > | ||
| 4400 | drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd, | ||
| 4401 | false)) | ||
| 4402 | break; | ||
| 4403 | if (min_slice_count <= valid_dsc_slicecount[i]) | ||
| 4404 | return valid_dsc_slicecount[i]; | ||
| 4405 | } | ||
| 4406 | |||
| 4407 | DRM_DEBUG_KMS("Unsupported Slice Count %d\n", min_slice_count); | ||
| 4408 | return 0; | ||
| 4409 | } | ||
| 4410 | |||
| 4411 | static void | 4417 | static void |
| 4412 | intel_pixel_encoding_setup_vsc(struct intel_dp *intel_dp, | 4418 | intel_pixel_encoding_setup_vsc(struct intel_dp *intel_dp, |
| 4413 | const struct intel_crtc_state *crtc_state) | 4419 | const struct intel_crtc_state *crtc_state) |
| @@ -102,10 +102,6 @@ bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); · 101 unmodified lines | |||
| 102 | bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp); | 102 | bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp); |
| 103 | bool | 103 | bool |
| 104 | intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status); | 104 | intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status); |
| 105 | u16 intel_dp_dsc_get_output_bpp(int link_clock, u8 lane_count, | ||
| 106 | int mode_clock, int mode_hdisplay); | ||
| 107 | u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp, int mode_clock, | ||
| 108 | int mode_hdisplay); | ||
| 109 | 105 | ||
| 110 | bool intel_dp_read_dpcd(struct intel_dp *intel_dp); | 106 | bool intel_dp_read_dpcd(struct intel_dp *intel_dp); |
| 111 | bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp); | 107 | bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp); |
| @@ -118,4 +114,6 @@ static inline unsigned int intel_dp_unused_lane_mask(int lane_count) · 6 unmodified lines | |||
| 118 | return ~((1 << lane_count) - 1) & 0xf; | 114 | return ~((1 << lane_count) - 1) & 0xf; |
| 119 | } | 115 | } |
| 120 | 116 | ||
| 117 | u32 intel_dp_mode_to_fec_clock(u32 mode_clock); | ||
| 118 | |||
| 121 | #endif /* __INTEL_DP_H__ */ | 119 | #endif /* __INTEL_DP_H__ */ |
| @@ -81,7 +81,7 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, · 80 unmodified lines | |||
| 81 | adjusted_mode->crtc_clock, | 81 | adjusted_mode->crtc_clock, |
| 82 | crtc_state->port_clock, | 82 | crtc_state->port_clock, |
| 83 | &crtc_state->dp_m_n, | 83 | &crtc_state->dp_m_n, |
| 84 | constant_n); | 84 | constant_n, crtc_state->fec_enable); |
| 85 | crtc_state->dp_m_n.tu = slots; | 85 | crtc_state->dp_m_n.tu = slots; |
| 86 | 86 | ||
| 87 | return 0; | 87 | return 0; |
| @@ -615,7 +615,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum · 527 unmodified lines | |||
| 615 | intel_encoder->type = INTEL_OUTPUT_DP_MST; | 615 | intel_encoder->type = INTEL_OUTPUT_DP_MST; |
| 616 | intel_encoder->power_domain = intel_dig_port->base.power_domain; | 616 | intel_encoder->power_domain = intel_dig_port->base.power_domain; |
| 617 | intel_encoder->port = intel_dig_port->base.port; | 617 | intel_encoder->port = intel_dig_port->base.port; |
| 618 | intel_encoder->crtc_mask = BIT(pipe); | 618 | intel_encoder->crtc_mask = 0x7; |
| 619 | intel_encoder->cloneable = 0; | 619 | intel_encoder->cloneable = 0; |
| 620 | 620 | ||
| 621 | intel_encoder->compute_config = intel_dp_mst_compute_config; | 621 | intel_encoder->compute_config = intel_dp_mst_compute_config; |
| @@ -1528,6 +1528,7 @@ g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state, · 1527 unmodified lines | |||
| 1528 | int src_x, src_w, src_h, crtc_w, crtc_h; | 1528 | int src_x, src_w, src_h, crtc_w, crtc_h; |
| 1529 | const struct drm_display_mode *adjusted_mode = | 1529 | const struct drm_display_mode *adjusted_mode = |
| 1530 | &crtc_state->base.adjusted_mode; | 1530 | &crtc_state->base.adjusted_mode; |
| 1531 | unsigned int stride = plane_state->color_plane[0].stride; | ||
| 1531 | unsigned int cpp = fb->format->cpp[0]; | 1532 | unsigned int cpp = fb->format->cpp[0]; |
| 1532 | unsigned int width_bytes; | 1533 | unsigned int width_bytes; |
| 1533 | int min_width, min_height; | 1534 | int min_width, min_height; |
| @@ -1569,9 +1570,9 @@ g4x_sprite_check_scaling(struct intel_crtc_state *crtc_state, · 35 unmodified lines | |||
| 1569 | return -EINVAL; | 1570 | return -EINVAL; |
| 1570 | } | 1571 | } |
| 1571 | 1572 | ||
| 1572 | if (width_bytes > 4096 || fb->pitches[0] > 4096) { | 1573 | if (stride > 4096) { |
| 1573 | DRM_DEBUG_KMS("Stride (%u) exceeds hardware max with scaling (%u)\n", | 1574 | DRM_DEBUG_KMS("Stride (%u) exceeds hardware max with scaling (%u)\n", |
| 1574 | fb->pitches[0], 4096); | 1575 | stride, 4096); |
| 1575 | return -EINVAL; | 1576 | return -EINVAL; |
| 1576 | } | 1577 | } |
| 1577 | 1578 | ||
| @@ -245,11 +245,9 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf) · 244 unmodified lines | |||
| 245 | 245 | ||
| 246 | wakeref = intel_runtime_pm_get(rpm); | 246 | wakeref = intel_runtime_pm_get(rpm); |
| 247 | 247 | ||
| 248 | srcu = intel_gt_reset_trylock(ggtt->vm.gt); | 248 | ret = intel_gt_reset_trylock(ggtt->vm.gt, &srcu); |
| 249 | if (srcu < 0) { | 249 | if (ret) |
| 250 | ret = srcu; | ||
| 251 | goto err_rpm; | 250 | goto err_rpm; |
| 252 | } | ||
| 253 | 251 | ||
| 254 | ret = i915_mutex_lock_interruptible(dev); | 252 | ret = i915_mutex_lock_interruptible(dev); |
| 255 | if (ret) | 253 | if (ret) |
| @@ -318,7 +316,11 @@ vm_fault_t i915_gem_fault(struct vm_fault *vmf) · 62 unmodified lines | |||
| 318 | intel_wakeref_auto(&i915->ggtt.userfault_wakeref, | 316 | intel_wakeref_auto(&i915->ggtt.userfault_wakeref, |
| 319 | msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)); | 317 | msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND)); |
| 320 | 318 | ||
| 321 | i915_vma_set_ggtt_write(vma); | 319 | if (write) { |
| 320 | GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj)); | ||
| 321 | i915_vma_set_ggtt_write(vma); | ||
| 322 | obj->mm.dirty = true; | ||
| 323 | } | ||
| 322 | 324 | ||
| 323 | err_fence: | 325 | err_fence: |
| 324 | i915_vma_unpin_fence(vma); | 326 | i915_vma_unpin_fence(vma); |
| @@ -362,6 +364,7 @@ err: · 37 unmodified lines | |||
| 362 | return VM_FAULT_OOM; | 364 | return VM_FAULT_OOM; |
| 363 | case -ENOSPC: | 365 | case -ENOSPC: |
| 364 | case -EFAULT: | 366 | case -EFAULT: |
| 367 | case -ENODEV: /* bad object, how did you get here! */ | ||
| 365 | return VM_FAULT_SIGBUS; | 368 | return VM_FAULT_SIGBUS; |
| 366 | default: | 369 | default: |
| 367 | WARN_ONCE(ret, "unhandled error in %s: %i\n", __func__, ret); | 370 | WARN_ONCE(ret, "unhandled error in %s: %i\n", __func__, ret); |
| @@ -473,10 +476,16 @@ i915_gem_mmap_gtt(struct drm_file *file, · 105 unmodified lines | |||
| 473 | if (!obj) | 476 | if (!obj) |
| 474 | return -ENOENT; | 477 | return -ENOENT; |
| 475 | 478 | ||
| 479 | if (i915_gem_object_never_bind_ggtt(obj)) { | ||
| 480 | ret = -ENODEV; | ||
| 481 | goto out; | ||
| 482 | } | ||
| 483 | |||
| 476 | ret = create_mmap_offset(obj); | 484 | ret = create_mmap_offset(obj); |
| 477 | if (ret == 0) | 485 | if (ret == 0) |
| 478 | *offset = drm_vma_node_offset_addr(&obj->base.vma_node); | 486 | *offset = drm_vma_node_offset_addr(&obj->base.vma_node); |
| 479 | 487 | ||
| 488 | out: | ||
| 480 | i915_gem_object_put(obj); | 489 | i915_gem_object_put(obj); |
| 481 | return ret; | 490 | return ret; |
| 482 | } | 491 | } |
| @@ -152,6 +152,12 @@ i915_gem_object_is_proxy(const struct drm_i915_gem_object *obj) · 151 unmodified lines | |||
| 152 | return obj->ops->flags & I915_GEM_OBJECT_IS_PROXY; | 152 | return obj->ops->flags & I915_GEM_OBJECT_IS_PROXY; |
| 153 | } | 153 | } |
| 154 | 154 | ||
| 155 | static inline bool | ||
| 156 | i915_gem_object_never_bind_ggtt(const struct drm_i915_gem_object *obj) | ||
| 157 | { | ||
| 158 | return obj->ops->flags & I915_GEM_OBJECT_NO_GGTT; | ||
| 159 | } | ||
| 160 | |||
| 155 | static inline bool | 161 | static inline bool |
| 156 | i915_gem_object_needs_async_cancel(const struct drm_i915_gem_object *obj) | 162 | i915_gem_object_needs_async_cancel(const struct drm_i915_gem_object *obj) |
| 157 | { | 163 | { |
| @@ -32,7 +32,8 @@ struct drm_i915_gem_object_ops { · 31 unmodified lines | |||
| 32 | #define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0) | 32 | #define I915_GEM_OBJECT_HAS_STRUCT_PAGE BIT(0) |
| 33 | #define I915_GEM_OBJECT_IS_SHRINKABLE BIT(1) | 33 | #define I915_GEM_OBJECT_IS_SHRINKABLE BIT(1) |
| 34 | #define I915_GEM_OBJECT_IS_PROXY BIT(2) | 34 | #define I915_GEM_OBJECT_IS_PROXY BIT(2) |
| 35 | #define I915_GEM_OBJECT_ASYNC_CANCEL BIT(3) | 35 | #define I915_GEM_OBJECT_NO_GGTT BIT(3) |
| 36 | #define I915_GEM_OBJECT_ASYNC_CANCEL BIT(4) | ||
| 36 | 37 | ||
| 37 | /* Interface between the GEM object and its backing storage. | 38 | /* Interface between the GEM object and its backing storage. |
| 38 | * get_pages() is called once prior to the use of the associated set | 39 | * get_pages() is called once prior to the use of the associated set |
| @@ -241,9 +241,6 @@ void i915_gem_resume(struct drm_i915_private *i915) · 240 unmodified lines | |||
| 241 | mutex_lock(&i915->drm.struct_mutex); | 241 | mutex_lock(&i915->drm.struct_mutex); |
| 242 | intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL); | 242 | intel_uncore_forcewake_get(&i915->uncore, FORCEWAKE_ALL); |
| 243 | 243 | ||
| 244 | i915_gem_restore_gtt_mappings(i915); | ||
| 245 | i915_gem_restore_fences(i915); | ||
| 246 | |||
| 247 | if (i915_gem_init_hw(i915)) | 244 | if (i915_gem_init_hw(i915)) |
| 248 | goto err_wedged; | 245 | goto err_wedged; |
| 249 | 246 | ||
| @@ -702,6 +702,7 @@ i915_gem_userptr_dmabuf_export(struct drm_i915_gem_object *obj) · 701 unmodified lines | |||
| 702 | static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = { | 702 | static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = { |
| 703 | .flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE | | 703 | .flags = I915_GEM_OBJECT_HAS_STRUCT_PAGE | |
| 704 | I915_GEM_OBJECT_IS_SHRINKABLE | | 704 | I915_GEM_OBJECT_IS_SHRINKABLE | |
| 705 | I915_GEM_OBJECT_NO_GGTT | | ||
| 705 | I915_GEM_OBJECT_ASYNC_CANCEL, | 706 | I915_GEM_OBJECT_ASYNC_CANCEL, |
| 706 | .get_pages = i915_gem_userptr_get_pages, | 707 | .get_pages = i915_gem_userptr_get_pages, |
| 707 | .put_pages = i915_gem_userptr_put_pages, | 708 | .put_pages = i915_gem_userptr_put_pages, |
| @@ -136,6 +136,20 @@ execlists_active(const struct intel_engine_execlists *execlists) · 135 unmodified lines | |||
| 136 | return READ_ONCE(*execlists->active); | 136 | return READ_ONCE(*execlists->active); |
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | static inline void | ||
| 140 | execlists_active_lock_bh(struct intel_engine_execlists *execlists) | ||
| 141 | { | ||
| 142 | local_bh_disable(); /* prevent local softirq and lock recursion */ | ||
| 143 | tasklet_lock(&execlists->tasklet); | ||
| 144 | } | ||
| 145 | |||
| 146 | static inline void | ||
| 147 | execlists_active_unlock_bh(struct intel_engine_execlists *execlists) | ||
| 148 | { | ||
| 149 | tasklet_unlock(&execlists->tasklet); | ||
| 150 | local_bh_enable(); /* restore softirq, and kick ksoftirqd! */ | ||
| 151 | } | ||
| 152 | |||
| 139 | struct i915_request * | 153 | struct i915_request * |
| 140 | execlists_unwind_incomplete_requests(struct intel_engine_execlists *execlists); | 154 | execlists_unwind_incomplete_requests(struct intel_engine_execlists *execlists); |
| 141 | 155 | ||
| @@ -1197,9 +1197,7 @@ static void intel_engine_print_registers(struct intel_engine_cs *engine, · 1196 unmodified lines | |||
| 1197 | struct drm_printer *m) | 1197 | struct drm_printer *m) |
| 1198 | { | 1198 | { |
| 1199 | struct drm_i915_private *dev_priv = engine->i915; | 1199 | struct drm_i915_private *dev_priv = engine->i915; |
| 1200 | const struct intel_engine_execlists * const execlists = | 1200 | struct intel_engine_execlists * const execlists = &engine->execlists; |
| 1201 | &engine->execlists; | ||
| 1202 | unsigned long flags; | ||
| 1203 | u64 addr; | 1201 | u64 addr; |
| 1204 | 1202 | ||
| 1205 | if (engine->id == RENDER_CLASS && IS_GEN_RANGE(dev_priv, 4, 7)) | 1203 | if (engine->id == RENDER_CLASS && IS_GEN_RANGE(dev_priv, 4, 7)) |
| @@ -1281,7 +1279,7 @@ static void intel_engine_print_registers(struct intel_engine_cs *engine, · 75 unmodified lines | |||
| 1281 | idx, hws[idx * 2], hws[idx * 2 + 1]); | 1279 | idx, hws[idx * 2], hws[idx * 2 + 1]); |
| 1282 | } | 1280 | } |
| 1283 | 1281 | ||
| 1284 | spin_lock_irqsave(&engine->active.lock, flags); | 1282 | execlists_active_lock_bh(execlists); |
| 1285 | for (port = execlists->active; (rq = *port); port++) { | 1283 | for (port = execlists->active; (rq = *port); port++) { |
| 1286 | char hdr[80]; | 1284 | char hdr[80]; |
| 1287 | int len; | 1285 | int len; |
| @@ -1309,7 +1307,7 @@ static void intel_engine_print_registers(struct intel_engine_cs *engine, · 21 unmodified lines | |||
| 1309 | hwsp_seqno(rq)); | 1307 | hwsp_seqno(rq)); |
| 1310 | print_request(m, rq, hdr); | 1308 | print_request(m, rq, hdr); |
| 1311 | } | 1309 | } |
| 1312 | spin_unlock_irqrestore(&engine->active.lock, flags); | 1310 | execlists_active_unlock_bh(execlists); |
| 1313 | } else if (INTEL_GEN(dev_priv) > 6) { | 1311 | } else if (INTEL_GEN(dev_priv) > 6) { |
| 1314 | drm_printf(m, "\tPP_DIR_BASE: 0x%08x\n", | 1312 | drm_printf(m, "\tPP_DIR_BASE: 0x%08x\n", |
| 1315 | ENGINE_READ(engine, RING_PP_DIR_BASE)); | 1313 | ENGINE_READ(engine, RING_PP_DIR_BASE)); |
| @@ -1440,8 +1438,8 @@ int intel_enable_engine_stats(struct intel_engine_cs *engine) · 124 unmodified lines | |||
| 1440 | if (!intel_engine_supports_stats(engine)) | 1438 | if (!intel_engine_supports_stats(engine)) |
| 1441 | return -ENODEV; | 1439 | return -ENODEV; |
| 1442 | 1440 | ||
| 1443 | spin_lock_irqsave(&engine->active.lock, flags); | 1441 | execlists_active_lock_bh(execlists); |
| 1444 | write_seqlock(&engine->stats.lock); | 1442 | write_seqlock_irqsave(&engine->stats.lock, flags); |
| 1445 | 1443 | ||
| 1446 | if (unlikely(engine->stats.enabled == ~0)) { | 1444 | if (unlikely(engine->stats.enabled == ~0)) { |
| 1447 | err = -EBUSY; | 1445 | err = -EBUSY; |
| @@ -1469,8 +1467,8 @@ int intel_enable_engine_stats(struct intel_engine_cs *engine) · 21 unmodified lines | |||
| 1469 | } | 1467 | } |
| 1470 | 1468 | ||
| 1471 | unlock: | 1469 | unlock: |
| 1472 | write_sequnlock(&engine->stats.lock); | 1470 | write_sequnlock_irqrestore(&engine->stats.lock, flags); |
| 1473 | spin_unlock_irqrestore(&engine->active.lock, flags); | 1471 | execlists_active_unlock_bh(execlists); |
| 1474 | 1472 | ||
| 1475 | return err; | 1473 | return err; |
| 1476 | } | 1474 | } |
| @@ -234,6 +234,13 @@ static void execlists_init_reg_state(u32 *reg_state, · 233 unmodified lines | |||
| 234 | struct intel_engine_cs *engine, | 234 | struct intel_engine_cs *engine, |
| 235 | struct intel_ring *ring); | 235 | struct intel_ring *ring); |
| 236 | 236 | ||
| 237 | static void mark_eio(struct i915_request *rq) | ||
| 238 | { | ||
| 239 | if (!i915_request_signaled(rq)) | ||
| 240 | dma_fence_set_error(&rq->fence, -EIO); | ||
| 241 | i915_request_mark_complete(rq); | ||
| 242 | } | ||
| 243 | |||
| 237 | static inline u32 intel_hws_preempt_address(struct intel_engine_cs *engine) | 244 | static inline u32 intel_hws_preempt_address(struct intel_engine_cs *engine) |
| 238 | { | 245 | { |
| 239 | return (i915_ggtt_offset(engine->status_page.vma) + | 246 | return (i915_ggtt_offset(engine->status_page.vma) + |
| @@ -631,7 +638,6 @@ execlists_schedule_out(struct i915_request *rq) · 391 unmodified lines | |||
| 631 | struct intel_engine_cs *cur, *old; | 638 | struct intel_engine_cs *cur, *old; |
| 632 | 639 | ||
| 633 | trace_i915_request_out(rq); | 640 | trace_i915_request_out(rq); |
| 634 | GEM_BUG_ON(intel_context_inflight(ce) != rq->engine); | ||
| 635 | 641 | ||
| 636 | old = READ_ONCE(ce->inflight); | 642 | old = READ_ONCE(ce->inflight); |
| 637 | do | 643 | do |
| @@ -797,6 +803,17 @@ static bool can_merge_rq(const struct i915_request *prev, · 159 unmodified lines | |||
| 797 | GEM_BUG_ON(prev == next); | 803 | GEM_BUG_ON(prev == next); |
| 798 | GEM_BUG_ON(!assert_priority_queue(prev, next)); | 804 | GEM_BUG_ON(!assert_priority_queue(prev, next)); |
| 799 | 805 | ||
| 806 | /* | ||
| 807 | * We do not submit known completed requests. Therefore if the next | ||
| 808 | * request is already completed, we can pretend to merge it in | ||
| 809 | * with the previous context (and we will skip updating the ELSP | ||
| 810 | * and tracking). Thus hopefully keeping the ELSP full with active | ||
| 811 | * contexts, despite the best efforts of preempt-to-busy to confuse | ||
| 812 | * us. | ||
| 813 | */ | ||
| 814 | if (i915_request_completed(next)) | ||
| 815 | return true; | ||
| 816 | |||
| 800 | if (!can_merge_ctx(prev->hw_context, next->hw_context)) | 817 | if (!can_merge_ctx(prev->hw_context, next->hw_context)) |
| 801 | return false; | 818 | return false; |
| 802 | 819 | ||
| @@ -893,7 +910,7 @@ static void virtual_xfer_breadcrumbs(struct virtual_engine *ve, · 90 unmodified lines | |||
| 893 | static struct i915_request * | 910 | static struct i915_request * |
| 894 | last_active(const struct intel_engine_execlists *execlists) | 911 | last_active(const struct intel_engine_execlists *execlists) |
| 895 | { | 912 | { |
| 896 | struct i915_request * const *last = execlists->active; | 913 | struct i915_request * const *last = READ_ONCE(execlists->active); |
| 897 | 914 | ||
| 898 | while (*last && i915_request_completed(*last)) | 915 | while (*last && i915_request_completed(*last)) |
| 899 | last++; | 916 | last++; |
| @@ -1172,21 +1189,6 @@ static void execlists_dequeue(struct intel_engine_cs *engine) · 272 unmodified lines | |||
| 1172 | continue; | 1189 | continue; |
| 1173 | } | 1190 | } |
| 1174 | 1191 | ||
| 1175 | if (i915_request_completed(rq)) { | ||
| 1176 | ve->request = NULL; | ||
| 1177 | ve->base.execlists.queue_priority_hint = INT_MIN; | ||
| 1178 | rb_erase_cached(rb, &execlists->virtual); | ||
| 1179 | RB_CLEAR_NODE(rb); | ||
| 1180 | |||
| 1181 | rq->engine = engine; | ||
| 1182 | __i915_request_submit(rq); | ||
| 1183 | |||
| 1184 | spin_unlock(&ve->base.active.lock); | ||
| 1185 | |||
| 1186 | rb = rb_first_cached(&execlists->virtual); | ||
| 1187 | continue; | ||
| 1188 | } | ||
| 1189 | |||
| 1190 | if (last && !can_merge_rq(last, rq)) { | 1192 | if (last && !can_merge_rq(last, rq)) { |
| 1191 | spin_unlock(&ve->base.active.lock); | 1193 | spin_unlock(&ve->base.active.lock); |
| 1192 | return; /* leave this for another */ | 1194 | return; /* leave this for another */ |
| @@ -1237,11 +1239,24 @@ static void execlists_dequeue(struct intel_engine_cs *engine) · 44 unmodified lines | |||
| 1237 | GEM_BUG_ON(ve->siblings[0] != engine); | 1239 | GEM_BUG_ON(ve->siblings[0] != engine); |
| 1238 | } | 1240 | } |
| 1239 | 1241 | ||
| 1240 | __i915_request_submit(rq); | 1242 | if (__i915_request_submit(rq)) { |
| 1241 | if (!i915_request_completed(rq)) { | ||
| 1242 | submit = true; | 1243 | submit = true; |
| 1243 | last = rq; | 1244 | last = rq; |
| 1244 | } | 1245 | } |
| 1246 | i915_request_put(rq); | ||
| 1247 | |||
| 1248 | /* | ||
| 1249 | * Hmm, we have a bunch of virtual engine requests, | ||
| 1250 | * but the first one was already completed (thanks | ||
| 1251 | * preempt-to-busy!). Keep looking at the veng queue | ||
| 1252 | * until we have no more relevant requests (i.e. | ||
| 1253 | * the normal submit queue has higher priority). | ||
| 1254 | */ | ||
| 1255 | if (!submit) { | ||
| 1256 | spin_unlock(&ve->base.active.lock); | ||
| 1257 | rb = rb_first_cached(&execlists->virtual); | ||
| 1258 | continue; | ||
| 1259 | } | ||
| 1245 | } | 1260 | } |
| 1246 | 1261 | ||
| 1247 | spin_unlock(&ve->base.active.lock); | 1262 | spin_unlock(&ve->base.active.lock); |
| @@ -1254,8 +1269,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) · 6 unmodified lines | |||
| 1254 | int i; | 1269 | int i; |
| 1255 | 1270 | ||
| 1256 | priolist_for_each_request_consume(rq, rn, p, i) { | 1271 | priolist_for_each_request_consume(rq, rn, p, i) { |
| 1257 | if (i915_request_completed(rq)) | 1272 | bool merge = true; |
| 1258 | goto skip; | ||
| 1259 | 1273 | ||
| 1260 | /* | 1274 | /* |
| 1261 | * Can we combine this request with the current port? | 1275 | * Can we combine this request with the current port? |
| @@ -1296,14 +1310,23 @@ static void execlists_dequeue(struct intel_engine_cs *engine) · 34 unmodified lines | |||
| 1296 | ctx_single_port_submission(rq->hw_context)) | 1310 | ctx_single_port_submission(rq->hw_context)) |
| 1297 | goto done; | 1311 | goto done; |
| 1298 | 1312 | ||
| 1299 | *port = execlists_schedule_in(last, port - execlists->pending); | 1313 | merge = false; |
| 1300 | port++; | ||
| 1301 | } | 1314 | } |
| 1302 | 1315 | ||
| 1303 | last = rq; | 1316 | if (__i915_request_submit(rq)) { |
| 1304 | submit = true; | 1317 | if (!merge) { |
| 1305 | skip: | 1318 | *port = execlists_schedule_in(last, port - execlists->pending); |
| 1306 | __i915_request_submit(rq); | 1319 | port++; |
| 1320 | last = NULL; | ||
| 1321 | } | ||
| 1322 | |||
| 1323 | GEM_BUG_ON(last && | ||
| 1324 | !can_merge_ctx(last->hw_context, | ||
| 1325 | rq->hw_context)); | ||
| 1326 | |||
| 1327 | submit = true; | ||
| 1328 | last = rq; | ||
| 1329 | } | ||
| 1307 | } | 1330 | } |
| 1308 | 1331 | ||
| 1309 | rb_erase_cached(&p->node, &execlists->queue); | 1332 | rb_erase_cached(&p->node, &execlists->queue); |
| @@ -1593,8 +1616,11 @@ static void process_csb(struct intel_engine_cs *engine) · 283 unmodified lines | |||
| 1593 | static void __execlists_submission_tasklet(struct intel_engine_cs *const engine) | 1616 | static void __execlists_submission_tasklet(struct intel_engine_cs *const engine) |
| 1594 | { | 1617 | { |
| 1595 | lockdep_assert_held(&engine->active.lock); | 1618 | lockdep_assert_held(&engine->active.lock); |
| 1596 | if (!engine->execlists.pending[0]) | 1619 | if (!engine->execlists.pending[0]) { |
| 1620 | rcu_read_lock(); /* protect peeking at execlists->active */ | ||
| 1597 | execlists_dequeue(engine); | 1621 | execlists_dequeue(engine); |
| 1622 | rcu_read_unlock(); | ||
| 1623 | } | ||
| 1598 | } | 1624 | } |
| 1599 | 1625 | ||
| 1600 | /* | 1626 | /* |
| @@ -2399,10 +2425,14 @@ static void reset_csb_pointers(struct intel_engine_cs *engine) · 798 unmodified lines | |||
| 2399 | 2425 | ||
| 2400 | static struct i915_request *active_request(struct i915_request *rq) | 2426 | static struct i915_request *active_request(struct i915_request *rq) |
| 2401 | { | 2427 | { |
| 2402 | const struct list_head * const list = &rq->timeline->requests; | ||
| 2403 | const struct intel_context * const ce = rq->hw_context; | 2428 | const struct intel_context * const ce = rq->hw_context; |
| 2404 | struct i915_request *active = NULL; | 2429 | struct i915_request *active = NULL; |
| 2430 | struct list_head *list; | ||
| 2405 | 2431 | ||
| 2432 | if (!i915_request_is_active(rq)) /* unwound, but incomplete! */ | ||
| 2433 | return rq; | ||
| 2434 | |||
| 2435 | list = &rq->timeline->requests; | ||
| 2406 | list_for_each_entry_from_reverse(rq, list, link) { | 2436 | list_for_each_entry_from_reverse(rq, list, link) { |
| 2407 | if (i915_request_completed(rq)) | 2437 | if (i915_request_completed(rq)) |
| 2408 | break; | 2438 | break; |
| @@ -2552,12 +2582,8 @@ static void execlists_cancel_requests(struct intel_engine_cs *engine) · 143 unmodified lines | |||
| 2552 | __execlists_reset(engine, true); | 2582 | __execlists_reset(engine, true); |
| 2553 | 2583 | ||
| 2554 | /* Mark all executing requests as skipped. */ | 2584 | /* Mark all executing requests as skipped. */ |
| 2555 | list_for_each_entry(rq, &engine->active.requests, sched.link) { | 2585 | list_for_each_entry(rq, &engine->active.requests, sched.link) |
| 2556 | if (!i915_request_signaled(rq)) | 2586 | mark_eio(rq); |
| 2557 | dma_fence_set_error(&rq->fence, -EIO); | ||
| 2558 | |||
| 2559 | i915_request_mark_complete(rq); | ||
| 2560 | } | ||
| 2561 | 2587 | ||
| 2562 | /* Flush the queued requests to the timeline list (for retiring). */ | 2588 | /* Flush the queued requests to the timeline list (for retiring). */ |
| 2563 | while ((rb = rb_first_cached(&execlists->queue))) { | 2589 | while ((rb = rb_first_cached(&execlists->queue))) { |
| @@ -2565,10 +2591,8 @@ static void execlists_cancel_requests(struct intel_engine_cs *engine) · 1 unmodified line | |||
| 2565 | int i; | 2591 | int i; |
| 2566 | 2592 | ||
| 2567 | priolist_for_each_request_consume(rq, rn, p, i) { | 2593 | priolist_for_each_request_consume(rq, rn, p, i) { |
| 2568 | list_del_init(&rq->sched.link); | 2594 | mark_eio(rq); |
| 2569 | __i915_request_submit(rq); | 2595 | __i915_request_submit(rq); |
| 2570 | dma_fence_set_error(&rq->fence, -EIO); | ||
| 2571 | i915_request_mark_complete(rq); | ||
| 2572 | } | 2596 | } |
| 2573 | 2597 | ||
| 2574 | rb_erase_cached(&p->node, &execlists->queue); | 2598 | rb_erase_cached(&p->node, &execlists->queue); |
| @@ -2584,13 +2608,15 @@ static void execlists_cancel_requests(struct intel_engine_cs *engine) · 9 unmodified lines | |||
| 2584 | RB_CLEAR_NODE(rb); | 2608 | RB_CLEAR_NODE(rb); |
| 2585 | 2609 | ||
| 2586 | spin_lock(&ve->base.active.lock); | 2610 | spin_lock(&ve->base.active.lock); |
| 2587 | if (ve->request) { | 2611 | rq = fetch_and_zero(&ve->request); |
| 2588 | ve->request->engine = engine; | 2612 | if (rq) { |
| 2589 | __i915_request_submit(ve->request); | 2613 | mark_eio(rq); |
| 2590 | dma_fence_set_error(&ve->request->fence, -EIO); | 2614 | |
| 2591 | i915_request_mark_complete(ve->request); | 2615 | rq->engine = engine; |
| 2616 | __i915_request_submit(rq); | ||
| 2617 | i915_request_put(rq); | ||
| 2618 | |||
| 2592 | ve->base.execlists.queue_priority_hint = INT_MIN; | 2619 | ve->base.execlists.queue_priority_hint = INT_MIN; |
| 2593 | ve->request = NULL; | ||
| 2594 | } | 2620 | } |
| 2595 | spin_unlock(&ve->base.active.lock); | 2621 | spin_unlock(&ve->base.active.lock); |
| 2596 | } | 2622 | } |
| @@ -3594,6 +3620,8 @@ submit_engine: · 997 unmodified lines | |||
| 3594 | static void virtual_submit_request(struct i915_request *rq) | 3620 | static void virtual_submit_request(struct i915_request *rq) |
| 3595 | { | 3621 | { |
| 3596 | struct virtual_engine *ve = to_virtual_engine(rq->engine); | 3622 | struct virtual_engine *ve = to_virtual_engine(rq->engine); |
| 3623 | struct i915_request *old; | ||
| 3624 | unsigned long flags; | ||
| 3597 | 3625 | ||
| 3598 | GEM_TRACE("%s: rq=%llx:%lld\n", | 3626 | GEM_TRACE("%s: rq=%llx:%lld\n", |
| 3599 | ve->base.name, | 3627 | ve->base.name, |
| @@ -3602,15 +3630,31 @@ static void virtual_submit_request(struct i915_request *rq) · 2 unmodified lines | |||
| 3602 | 3630 | ||
| 3603 | GEM_BUG_ON(ve->base.submit_request != virtual_submit_request); | 3631 | GEM_BUG_ON(ve->base.submit_request != virtual_submit_request); |
| 3604 | 3632 | ||
| 3605 | GEM_BUG_ON(ve->request); | 3633 | spin_lock_irqsave(&ve->base.active.lock, flags); |
| 3606 | GEM_BUG_ON(!list_empty(virtual_queue(ve))); | 3634 | |
| 3635 | old = ve->request; | ||
| 3636 | if (old) { /* background completion event from preempt-to-busy */ | ||
| 3637 | GEM_BUG_ON(!i915_request_completed(old)); | ||
| 3638 | __i915_request_submit(old); | ||
| 3639 | i915_request_put(old); | ||
| 3640 | } | ||
| 3641 | |||
| 3642 | if (i915_request_completed(rq)) { | ||
| 3643 | __i915_request_submit(rq); | ||
| 3644 | |||
| 3645 | ve->base.execlists.queue_priority_hint = INT_MIN; | ||
| 3646 | ve->request = NULL; | ||
| 3647 | } else { | ||
| 3648 | ve->base.execlists.queue_priority_hint = rq_prio(rq); | ||
| 3649 | ve->request = i915_request_get(rq); | ||
| 3607 | 3650 | ||
| 3608 | ve->base.execlists.queue_priority_hint = rq_prio(rq); | 3651 | GEM_BUG_ON(!list_empty(virtual_queue(ve))); |
| 3609 | WRITE_ONCE(ve->request, rq); | 3652 | list_move_tail(&rq->sched.link, virtual_queue(ve)); |
| 3610 | 3653 | ||
| 3611 | list_move_tail(&rq->sched.link, virtual_queue(ve)); | 3654 | tasklet_schedule(&ve->base.execlists.tasklet); |
| 3655 | } | ||
| 3612 | 3656 | ||
| 3613 | tasklet_schedule(&ve->base.execlists.tasklet); | 3657 | spin_unlock_irqrestore(&ve->base.active.lock, flags); |
| 3614 | } | 3658 | } |
| 3615 | 3659 | ||
| 3616 | static struct ve_bond * | 3660 | static struct ve_bond * |
| @@ -3631,18 +3675,22 @@ static void · 14 unmodified lines | |||
| 3631 | virtual_bond_execute(struct i915_request *rq, struct dma_fence *signal) | 3675 | virtual_bond_execute(struct i915_request *rq, struct dma_fence *signal) |
| 3632 | { | 3676 | { |
| 3633 | struct virtual_engine *ve = to_virtual_engine(rq->engine); | 3677 | struct virtual_engine *ve = to_virtual_engine(rq->engine); |
| 3678 | intel_engine_mask_t allowed, exec; | ||
| 3634 | struct ve_bond *bond; | 3679 | struct ve_bond *bond; |
| 3635 | 3680 | ||
| 3681 | allowed = ~to_request(signal)->engine->mask; | ||
| 3682 | |||
| 3636 | bond = virtual_find_bond(ve, to_request(signal)->engine); | 3683 | bond = virtual_find_bond(ve, to_request(signal)->engine); |
| 3637 | if (bond) { | 3684 | if (bond) |
| 3638 | intel_engine_mask_t old, new, cmp; | 3685 | allowed &= bond->sibling_mask; |
| 3639 | 3686 | ||
| 3640 | cmp = READ_ONCE(rq->execution_mask); | 3687 | /* Restrict the bonded request to run on only the available engines */ |
| 3641 | do { | 3688 | exec = READ_ONCE(rq->execution_mask); |
| 3642 | old = cmp; | 3689 | while (!try_cmpxchg(&rq->execution_mask, &exec, exec & allowed)) |
| 3643 | new = cmp & bond->sibling_mask; | 3690 | ; |
| 3644 | } while ((cmp = cmpxchg(&rq->execution_mask, old, new)) != old); | 3691 | |
| 3645 | } | 3692 | /* Prevent the master from being re-run on the bonded engines */ |
| 3693 | to_request(signal)->execution_mask &= ~allowed; | ||
| 3646 | } | 3694 | } |
| 3647 | 3695 | ||
| 3648 | struct intel_context * | 3696 | struct intel_context * |
| @@ -42,11 +42,10 @@ static void engine_skip_context(struct i915_request *rq) · 41 unmodified lines | |||
| 42 | struct intel_engine_cs *engine = rq->engine; | 42 | struct intel_engine_cs *engine = rq->engine; |
| 43 | struct i915_gem_context *hung_ctx = rq->gem_context; | 43 | struct i915_gem_context *hung_ctx = rq->gem_context; |
| 44 | 44 | ||
| 45 | lockdep_assert_held(&engine->active.lock); | ||
| 46 | |||
| 47 | if (!i915_request_is_active(rq)) | 45 | if (!i915_request_is_active(rq)) |
| 48 | return; | 46 | return; |
| 49 | 47 | ||
| 48 | lockdep_assert_held(&engine->active.lock); | ||
| 50 | list_for_each_entry_continue(rq, &engine->active.requests, sched.link) | 49 | list_for_each_entry_continue(rq, &engine->active.requests, sched.link) |
| 51 | if (rq->gem_context == hung_ctx) | 50 | if (rq->gem_context == hung_ctx) |
| 52 | i915_request_skip(rq, -EIO); | 51 | i915_request_skip(rq, -EIO); |
| @@ -123,7 +122,6 @@ void __i915_request_reset(struct i915_request *rq, bool guilty) · 70 unmodified lines | |||
| 123 | rq->fence.seqno, | 122 | rq->fence.seqno, |
| 124 | yesno(guilty)); | 123 | yesno(guilty)); |
| 125 | 124 | ||
| 126 | lockdep_assert_held(&rq->engine->active.lock); | ||
| 127 | GEM_BUG_ON(i915_request_completed(rq)); | 125 | GEM_BUG_ON(i915_request_completed(rq)); |
| 128 | 126 | ||
| 129 | if (guilty) { | 127 | if (guilty) { |
| @@ -1214,10 +1212,8 @@ out: · 1084 unmodified lines | |||
| 1214 | intel_runtime_pm_put(>->i915->runtime_pm, wakeref); | 1212 | intel_runtime_pm_put(>->i915->runtime_pm, wakeref); |
| 1215 | } | 1213 | } |
| 1216 | 1214 | ||
| 1217 | int intel_gt_reset_trylock(struct intel_gt *gt) | 1215 | int intel_gt_reset_trylock(struct intel_gt *gt, int *srcu) |
| 1218 | { | 1216 | { |
| 1219 | int srcu; | ||
| 1220 | |||
| 1221 | might_lock(>->reset.backoff_srcu); | 1217 | might_lock(>->reset.backoff_srcu); |
| 1222 | might_sleep(); | 1218 | might_sleep(); |
| 1223 | 1219 | ||
| @@ -1232,10 +1228,10 @@ int intel_gt_reset_trylock(struct intel_gt *gt) · 8 unmodified lines | |||
| 1232 | 1228 | ||
| 1233 | rcu_read_lock(); | 1229 | rcu_read_lock(); |
| 1234 | } | 1230 | } |
| 1235 | srcu = srcu_read_lock(>->reset.backoff_srcu); | 1231 | *srcu = srcu_read_lock(>->reset.backoff_srcu); |
| 1236 | rcu_read_unlock(); | 1232 | rcu_read_unlock(); |
| 1237 | 1233 | ||
| 1238 | return srcu; | 1234 | return 0; |
| 1239 | } | 1235 | } |
| 1240 | 1236 | ||
| 1241 | void intel_gt_reset_unlock(struct intel_gt *gt, int tag) | 1237 | void intel_gt_reset_unlock(struct intel_gt *gt, int tag) |
| @@ -38,7 +38,7 @@ int intel_engine_reset(struct intel_engine_cs *engine, · 37 unmodified lines | |||
| 38 | 38 | ||
| 39 | void __i915_request_reset(struct i915_request *rq, bool guilty); | 39 | void __i915_request_reset(struct i915_request *rq, bool guilty); |
| 40 | 40 | ||
| 41 | int __must_check intel_gt_reset_trylock(struct intel_gt *gt); | 41 | int __must_check intel_gt_reset_trylock(struct intel_gt *gt, int *srcu); |
| 42 | void intel_gt_reset_unlock(struct intel_gt *gt, int tag); | 42 | void intel_gt_reset_unlock(struct intel_gt *gt, int tag); |
| 43 | 43 | ||
| 44 | void intel_gt_set_wedged(struct intel_gt *gt); | 44 | void intel_gt_set_wedged(struct intel_gt *gt); |
| @@ -1573,7 +1573,7 @@ static inline int mi_set_context(struct i915_request *rq, u32 flags) · 1572 unmodified lines | |||
| 1573 | struct intel_engine_cs *engine = rq->engine; | 1573 | struct intel_engine_cs *engine = rq->engine; |
| 1574 | enum intel_engine_id id; | 1574 | enum intel_engine_id id; |
| 1575 | const int num_engines = | 1575 | const int num_engines = |
| 1576 | IS_HSW_GT1(i915) ? RUNTIME_INFO(i915)->num_engines - 1 : 0; | 1576 | IS_HASWELL(i915) ? RUNTIME_INFO(i915)->num_engines - 1 : 0; |
| 1577 | bool force_restore = false; | 1577 | bool force_restore = false; |
| 1578 | int len; | 1578 | int len; |
| 1579 | u32 *cs; | 1579 | u32 *cs; |
| @@ -1063,6 +1063,9 @@ static void gen9_whitelist_build(struct i915_wa_list *w) · 1062 unmodified lines | |||
| 1063 | 1063 | ||
| 1064 | /* WaAllowUMDToModifyHDCChicken1:skl,bxt,kbl,glk,cfl */ | 1064 | /* WaAllowUMDToModifyHDCChicken1:skl,bxt,kbl,glk,cfl */ |
| 1065 | whitelist_reg(w, GEN8_HDC_CHICKEN1); | 1065 | whitelist_reg(w, GEN8_HDC_CHICKEN1); |
| 1066 | |||
| 1067 | /* WaSendPushConstantsFromMMIO:skl,bxt */ | ||
| 1068 | whitelist_reg(w, COMMON_SLICE_CHICKEN2); | ||
| 1066 | } | 1069 | } |
| 1067 | 1070 | ||
| 1068 | static void skl_whitelist_build(struct intel_engine_cs *engine) | 1071 | static void skl_whitelist_build(struct intel_engine_cs *engine) |
| @@ -1924,6 +1924,11 @@ static int i915_drm_resume(struct drm_device *dev) · 1923 unmodified lines | |||
| 1924 | if (ret) | 1924 | if (ret) |
| 1925 | DRM_ERROR("failed to re-enable GGTT\n"); | 1925 | DRM_ERROR("failed to re-enable GGTT\n"); |
| 1926 | 1926 | ||
| 1927 | mutex_lock(&dev_priv->drm.struct_mutex); | ||
| 1928 | i915_gem_restore_gtt_mappings(dev_priv); | ||
| 1929 | i915_gem_restore_fences(dev_priv); | ||
| 1930 | mutex_unlock(&dev_priv->drm.struct_mutex); | ||
| 1931 | |||
| 1927 | intel_csr_ucode_resume(dev_priv); | 1932 | intel_csr_ucode_resume(dev_priv); |
| 1928 | 1933 | ||
| 1929 | i915_restore_state(dev_priv); | 1934 | i915_restore_state(dev_priv); |
| @@ -969,6 +969,9 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj, · 968 unmodified lines | |||
| 969 | 969 | ||
| 970 | lockdep_assert_held(&obj->base.dev->struct_mutex); | 970 | lockdep_assert_held(&obj->base.dev->struct_mutex); |
| 971 | 971 | ||
| 972 | if (i915_gem_object_never_bind_ggtt(obj)) | ||
| 973 | return ERR_PTR(-ENODEV); | ||
| 974 | |||
| 972 | if (flags & PIN_MAPPABLE && | 975 | if (flags & PIN_MAPPABLE && |
| 973 | (!view || view->type == I915_GGTT_VIEW_NORMAL)) { | 976 | (!view || view->type == I915_GGTT_VIEW_NORMAL)) { |
| 974 | /* If the required space is larger than the available | 977 | /* If the required space is larger than the available |
| @@ -77,6 +77,12 @@ struct drm_i915_private; · 76 unmodified lines | |||
| 77 | 77 | ||
| 78 | #define I915_GEM_IDLE_TIMEOUT (HZ / 5) | 78 | #define I915_GEM_IDLE_TIMEOUT (HZ / 5) |
| 79 | 79 | ||
| 80 | static inline void tasklet_lock(struct tasklet_struct *t) | ||
| 81 | { | ||
| 82 | while (!tasklet_trylock(t)) | ||
| 83 | cpu_relax(); | ||
| 84 | } | ||
| 85 | |||
| 80 | static inline void __tasklet_disable_sync_once(struct tasklet_struct *t) | 86 | static inline void __tasklet_disable_sync_once(struct tasklet_struct *t) |
| 81 | { | 87 | { |
| 82 | if (!atomic_fetch_inc(&t->count)) | 88 | if (!atomic_fetch_inc(&t->count)) |
| @@ -194,6 +194,27 @@ static void free_capture_list(struct i915_request *request) · 193 unmodified lines | |||
| 194 | } | 194 | } |
| 195 | } | 195 | } |
| 196 | 196 | ||
| 197 | static void remove_from_engine(struct i915_request *rq) | ||
| 198 | { | ||
| 199 | struct intel_engine_cs *engine, *locked; | ||
| 200 | |||
| 201 | /* | ||
| 202 | * Virtual engines complicate acquiring the engine timeline lock, | ||
| 203 | * as their rq->engine pointer is not stable until under that | ||
| 204 | * engine lock. The simple ploy we use is to take the lock then | ||
| 205 | * check that the rq still belongs to the newly locked engine. | ||
| 206 | */ | ||
| 207 | locked = READ_ONCE(rq->engine); | ||
| 208 | spin_lock(&locked->active.lock); | ||
| 209 | while (unlikely(locked != (engine = READ_ONCE(rq->engine)))) { | ||
| 210 | spin_unlock(&locked->active.lock); | ||
| 211 | spin_lock(&engine->active.lock); | ||
| 212 | locked = engine; | ||
| 213 | } | ||
| 214 | list_del(&rq->sched.link); | ||
| 215 | spin_unlock(&locked->active.lock); | ||
| 216 | } | ||
| 217 | |||
| 197 | static bool i915_request_retire(struct i915_request *rq) | 218 | static bool i915_request_retire(struct i915_request *rq) |
| 198 | { | 219 | { |
| 199 | struct i915_active_request *active, *next; | 220 | struct i915_active_request *active, *next; |
| @@ -259,9 +280,7 @@ static bool i915_request_retire(struct i915_request *rq) · 59 unmodified lines | |||
| 259 | * request that we have removed from the HW and put back on a run | 280 | * request that we have removed from the HW and put back on a run |
| 260 | * queue. | 281 | * queue. |
| 261 | */ | 282 | */ |
| 262 | spin_lock(&rq->engine->active.lock); | 283 | remove_from_engine(rq); |
| 263 | list_del(&rq->sched.link); | ||
| 264 | spin_unlock(&rq->engine->active.lock); | ||
| 265 | 284 | ||
| 266 | spin_lock(&rq->lock); | 285 | spin_lock(&rq->lock); |
| 267 | i915_request_mark_complete(rq); | 286 | i915_request_mark_complete(rq); |
| @@ -358,9 +377,10 @@ __i915_request_await_execution(struct i915_request *rq, · 90 unmodified lines | |||
| 358 | return 0; | 377 | return 0; |
| 359 | } | 378 | } |
| 360 | 379 | ||
| 361 | void __i915_request_submit(struct i915_request *request) | 380 | bool __i915_request_submit(struct i915_request *request) |
| 362 | { | 381 | { |
| 363 | struct intel_engine_cs *engine = request->engine; | 382 | struct intel_engine_cs *engine = request->engine; |
| 383 | bool result = false; | ||
| 364 | 384 | ||
| 365 | GEM_TRACE("%s fence %llx:%lld, current %d\n", | 385 | GEM_TRACE("%s fence %llx:%lld, current %d\n", |
| 366 | engine->name, | 386 | engine->name, |
| @@ -370,6 +390,25 @@ void __i915_request_submit(struct i915_request *request) · 3 unmodified lines | |||
| 370 | GEM_BUG_ON(!irqs_disabled()); | 390 | GEM_BUG_ON(!irqs_disabled()); |
| 371 | lockdep_assert_held(&engine->active.lock); | 391 | lockdep_assert_held(&engine->active.lock); |
| 372 | 392 | ||
| 393 | /* | ||
| 394 | * With the advent of preempt-to-busy, we frequently encounter | ||
| 395 | * requests that we have unsubmitted from HW, but left running | ||
| 396 | * until the next ack and so have completed in the meantime. On | ||
| 397 | * resubmission of that completed request, we can skip | ||
| 398 | * updating the payload, and execlists can even skip submitting | ||
| 399 | * the request. | ||
| 400 | * | ||
| 401 | * We must remove the request from the caller's priority queue, | ||
| 402 | * and the caller must only call us when the request is in their | ||
| 403 | * priority queue, under the active.lock. This ensures that the | ||
| 404 | * request has *not* yet been retired and we can safely move | ||
| 405 | * the request into the engine->active.list where it will be | ||
| 406 | * dropped upon retiring. (Otherwise if resubmit a *retired* | ||
| 407 | * request, this would be a horrible use-after-free.) | ||
| 408 | */ | ||
| 409 | if (i915_request_completed(request)) | ||
| 410 | goto xfer; | ||
| 411 | |||
| 373 | if (i915_gem_context_is_banned(request->gem_context)) | 412 | if (i915_gem_context_is_banned(request->gem_context)) |
| 374 | i915_request_skip(request, -EIO); | 413 | i915_request_skip(request, -EIO); |
| 375 | 414 | ||
| @@ -393,13 +432,18 @@ void __i915_request_submit(struct i915_request *request) · 17 unmodified lines | |||
| 393 | i915_sw_fence_signaled(&request->semaphore)) | 432 | i915_sw_fence_signaled(&request->semaphore)) |
| 394 | engine->saturated |= request->sched.semaphores; | 433 | engine->saturated |= request->sched.semaphores; |
| 395 | 434 | ||
| 396 | /* We may be recursing from the signal callback of another i915 fence */ | 435 | engine->emit_fini_breadcrumb(request, |
| 397 | spin_lock_nested(&request->lock, SINGLE_DEPTH_NESTING); | 436 | request->ring->vaddr + request->postfix); |
| 398 | 437 | ||
| 399 | list_move_tail(&request->sched.link, &engine->active.requests); | 438 | trace_i915_request_execute(request); |
| 439 | engine->serial++; | ||
| 440 | result = true; | ||
| 441 | |||
| 442 | xfer: /* We may be recursing from the signal callback of another i915 fence */ | ||
| 443 | spin_lock_nested(&request->lock, SINGLE_DEPTH_NESTING); | ||
| 400 | 444 | ||
| 401 | GEM_BUG_ON(test_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags)); | 445 | if (!test_and_set_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags)) |
| 402 | set_bit(I915_FENCE_FLAG_ACTIVE, &request->fence.flags); | 446 | list_move_tail(&request->sched.link, &engine->active.requests); |
| 403 | 447 | ||
| 404 | if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &request->fence.flags) && | 448 | if (test_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT, &request->fence.flags) && |
| 405 | !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &request->fence.flags) && | 449 | !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &request->fence.flags) && |
| @@ -410,12 +454,7 @@ void __i915_request_submit(struct i915_request *request) · 4 unmodified lines | |||
| 410 | 454 | ||
| 411 | spin_unlock(&request->lock); | 455 | spin_unlock(&request->lock); |
| 412 | 456 | ||
| 413 | engine->emit_fini_breadcrumb(request, | 457 | return result; |
| 414 | request->ring->vaddr + request->postfix); | ||
| 415 | |||
| 416 | engine->serial++; | ||
| 417 | |||
| 418 | trace_i915_request_execute(request); | ||
| 419 | } | 458 | } |
| 420 | 459 | ||
| 421 | void i915_request_submit(struct i915_request *request) | 460 | void i915_request_submit(struct i915_request *request) |
| @@ -292,7 +292,7 @@ int i915_request_await_execution(struct i915_request *rq, · 291 unmodified lines | |||
| 292 | 292 | ||
| 293 | void i915_request_add(struct i915_request *rq); | 293 | void i915_request_add(struct i915_request *rq); |
| 294 | 294 | ||
| 295 | void __i915_request_submit(struct i915_request *request); | 295 | bool __i915_request_submit(struct i915_request *request); |
| 296 | void i915_request_submit(struct i915_request *request); | 296 | void i915_request_submit(struct i915_request *request); |
| 297 | 297 | ||
| 298 | void i915_request_skip(struct i915_request *request, int error); | 298 | void i915_request_skip(struct i915_request *request, int error); |
| @@ -69,6 +69,7 @@ intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id) · 68 unmodified lines | |||
| 69 | WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); | 69 | WARN_ON(!IS_CANNONLAKE(dev_priv) && !IS_COFFEELAKE(dev_priv)); |
| 70 | return PCH_CNP; | 70 | return PCH_CNP; |
| 71 | case INTEL_PCH_CMP_DEVICE_ID_TYPE: | 71 | case INTEL_PCH_CMP_DEVICE_ID_TYPE: |
| 72 | case INTEL_PCH_CMP2_DEVICE_ID_TYPE: | ||
| 72 | DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n"); | 73 | DRM_DEBUG_KMS("Found Comet Lake PCH (CMP)\n"); |
| 73 | WARN_ON(!IS_COFFEELAKE(dev_priv)); | 74 | WARN_ON(!IS_COFFEELAKE(dev_priv)); |
| 74 | /* CometPoint is CNP Compatible */ | 75 | /* CometPoint is CNP Compatible */ |
| @@ -41,6 +41,7 @@ enum intel_pch { · 40 unmodified lines | |||
| 41 | #define INTEL_PCH_CNP_DEVICE_ID_TYPE 0xA300 | 41 | #define INTEL_PCH_CNP_DEVICE_ID_TYPE 0xA300 |
| 42 | #define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE 0x9D80 | 42 | #define INTEL_PCH_CNP_LP_DEVICE_ID_TYPE 0x9D80 |
| 43 | #define INTEL_PCH_CMP_DEVICE_ID_TYPE 0x0280 | 43 | #define INTEL_PCH_CMP_DEVICE_ID_TYPE 0x0280 |
| 44 | #define INTEL_PCH_CMP2_DEVICE_ID_TYPE 0x0680 | ||
| 44 | #define INTEL_PCH_ICP_DEVICE_ID_TYPE 0x3480 | 45 | #define INTEL_PCH_ICP_DEVICE_ID_TYPE 0x3480 |
| 45 | #define INTEL_PCH_MCC_DEVICE_ID_TYPE 0x4B00 | 46 | #define INTEL_PCH_MCC_DEVICE_ID_TYPE 0x4B00 |
| 46 | #define INTEL_PCH_MCC2_DEVICE_ID_TYPE 0x3880 | 47 | #define INTEL_PCH_MCC2_DEVICE_ID_TYPE 0x3880 |
| @@ -118,6 +118,12 @@ static void pm_resume(struct drm_i915_private *i915) · 117 unmodified lines | |||
| 118 | with_intel_runtime_pm(&i915->runtime_pm, wakeref) { | 118 | with_intel_runtime_pm(&i915->runtime_pm, wakeref) { |
| 119 | intel_gt_sanitize(&i915->gt, false); | 119 | intel_gt_sanitize(&i915->gt, false); |
| 120 | i915_gem_sanitize(i915); | 120 | i915_gem_sanitize(i915); |
| 121 | |||
| 122 | mutex_lock(&i915->drm.struct_mutex); | ||
| 123 | i915_gem_restore_gtt_mappings(i915); | ||
| 124 | i915_gem_restore_fences(i915); | ||
| 125 | mutex_unlock(&i915->drm.struct_mutex); | ||
| 126 | |||
| 121 | i915_gem_resume(i915); | 127 | i915_gem_resume(i915); |
| 122 | } | 128 | } |
| 123 | } | 129 | } |
| @@ -26,6 +26,8 @@ · 25 unmodified lines | |||
| 26 | #include "dsi_cfg.h" | 26 | #include "dsi_cfg.h" |
| 27 | #include "msm_kms.h" | 27 | #include "msm_kms.h" |
| 28 | 28 | ||
| 29 | #define DSI_RESET_TOGGLE_DELAY_MS 20 | ||
| 30 | |||
| 29 | static int dsi_get_version(const void __iomem *base, u32 *major, u32 *minor) | 31 | static int dsi_get_version(const void __iomem *base, u32 *major, u32 *minor) |
| 30 | { | 32 | { |
| 31 | u32 ver; | 33 | u32 ver; |
| @@ -986,7 +988,7 @@ static void dsi_sw_reset(struct msm_dsi_host *msm_host) · 954 unmodified lines | |||
| 986 | wmb(); /* clocks need to be enabled before reset */ | 988 | wmb(); /* clocks need to be enabled before reset */ |
| 987 | 989 | ||
| 988 | dsi_write(msm_host, REG_DSI_RESET, 1); | 990 | dsi_write(msm_host, REG_DSI_RESET, 1); |
| 989 | wmb(); /* make sure reset happen */ | 991 | msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ |
| 990 | dsi_write(msm_host, REG_DSI_RESET, 0); | 992 | dsi_write(msm_host, REG_DSI_RESET, 0); |
| 991 | } | 993 | } |
| 992 | 994 | ||
| @@ -1396,7 +1398,7 @@ static void dsi_sw_reset_restore(struct msm_dsi_host *msm_host) · 403 unmodified lines | |||
| 1396 | 1398 | ||
| 1397 | /* dsi controller can only be reset while clocks are running */ | 1399 | /* dsi controller can only be reset while clocks are running */ |
| 1398 | dsi_write(msm_host, REG_DSI_RESET, 1); | 1400 | dsi_write(msm_host, REG_DSI_RESET, 1); |
| 1399 | wmb(); /* make sure reset happen */ | 1401 | msleep(DSI_RESET_TOGGLE_DELAY_MS); /* make sure reset happen */ |
| 1400 | dsi_write(msm_host, REG_DSI_RESET, 0); | 1402 | dsi_write(msm_host, REG_DSI_RESET, 0); |
| 1401 | wmb(); /* controller out of reset */ | 1403 | wmb(); /* controller out of reset */ |
| 1402 | dsi_write(msm_host, REG_DSI_CTRL, data0); | 1404 | dsi_write(msm_host, REG_DSI_CTRL, data0); |
| @@ -1083,7 +1083,7 @@ static const struct dss_features omap34xx_dss_feats = { · 1082 unmodified lines | |||
| 1083 | 1083 | ||
| 1084 | static const struct dss_features omap3630_dss_feats = { | 1084 | static const struct dss_features omap3630_dss_feats = { |
| 1085 | .model = DSS_MODEL_OMAP3, | 1085 | .model = DSS_MODEL_OMAP3, |
| 1086 | .fck_div_max = 32, | 1086 | .fck_div_max = 31, |
| 1087 | .fck_freq_max = 173000000, | 1087 | .fck_freq_max = 173000000, |
| 1088 | .dss_fck_multiplier = 1, | 1088 | .dss_fck_multiplier = 1, |
| 1089 | .parent_clk_name = "dpll4_ck", | 1089 | .parent_clk_name = "dpll4_ck", |
| @@ -220,9 +220,17 @@ static const struct of_device_id lb035q02_of_match[] = { · 219 unmodified lines | |||
| 220 | 220 | ||
| 221 | MODULE_DEVICE_TABLE(of, lb035q02_of_match); | 221 | MODULE_DEVICE_TABLE(of, lb035q02_of_match); |
| 222 | 222 | ||
| 223 | static const struct spi_device_id lb035q02_ids[] = { | ||
| 224 | { "lb035q02", 0 }, | ||
| 225 | { /* sentinel */ } | ||
| 226 | }; | ||
| 227 | |||
| 228 | MODULE_DEVICE_TABLE(spi, lb035q02_ids); | ||
| 229 | |||
| 223 | static struct spi_driver lb035q02_driver = { | 230 | static struct spi_driver lb035q02_driver = { |
| 224 | .probe = lb035q02_probe, | 231 | .probe = lb035q02_probe, |
| 225 | .remove = lb035q02_remove, | 232 | .remove = lb035q02_remove, |
| 233 | .id_table = lb035q02_ids, | ||
| 226 | .driver = { | 234 | .driver = { |
| 227 | .name = "panel-lg-lb035q02", | 235 | .name = "panel-lg-lb035q02", |
| 228 | .of_match_table = lb035q02_of_match, | 236 | .of_match_table = lb035q02_of_match, |
| @@ -231,7 +239,6 @@ static struct spi_driver lb035q02_driver = { · 2 unmodified lines | |||
| 231 | 239 | ||
| 232 | module_spi_driver(lb035q02_driver); | 240 | module_spi_driver(lb035q02_driver); |
| 233 | 241 | ||
| 234 | MODULE_ALIAS("spi:lgphilips,lb035q02"); | ||
| 235 | MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>"); | 242 | MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>"); |
| 236 | MODULE_DESCRIPTION("LG.Philips LB035Q02 LCD Panel driver"); | 243 | MODULE_DESCRIPTION("LG.Philips LB035Q02 LCD Panel driver"); |
| 237 | MODULE_LICENSE("GPL"); | 244 | MODULE_LICENSE("GPL"); |
| @@ -230,9 +230,17 @@ static const struct of_device_id nl8048_of_match[] = { · 229 unmodified lines | |||
| 230 | 230 | ||
| 231 | MODULE_DEVICE_TABLE(of, nl8048_of_match); | 231 | MODULE_DEVICE_TABLE(of, nl8048_of_match); |
| 232 | 232 | ||
| 233 | static const struct spi_device_id nl8048_ids[] = { | ||
| 234 | { "nl8048hl11", 0 }, | ||
| 235 | { /* sentinel */ } | ||
| 236 | }; | ||
| 237 | |||
| 238 | MODULE_DEVICE_TABLE(spi, nl8048_ids); | ||
| 239 | |||
| 233 | static struct spi_driver nl8048_driver = { | 240 | static struct spi_driver nl8048_driver = { |
| 234 | .probe = nl8048_probe, | 241 | .probe = nl8048_probe, |
| 235 | .remove = nl8048_remove, | 242 | .remove = nl8048_remove, |
| 243 | .id_table = nl8048_ids, | ||
| 236 | .driver = { | 244 | .driver = { |
| 237 | .name = "panel-nec-nl8048hl11", | 245 | .name = "panel-nec-nl8048hl11", |
| 238 | .pm = &nl8048_pm_ops, | 246 | .pm = &nl8048_pm_ops, |
| @@ -242,7 +250,6 @@ static struct spi_driver nl8048_driver = { · 3 unmodified lines | |||
| 242 | 250 | ||
| 243 | module_spi_driver(nl8048_driver); | 251 | module_spi_driver(nl8048_driver); |
| 244 | 252 | ||
| 245 | MODULE_ALIAS("spi:nec,nl8048hl11"); | ||
| 246 | MODULE_AUTHOR("Erik Gilling <konkers@android.com>"); | 253 | MODULE_AUTHOR("Erik Gilling <konkers@android.com>"); |
| 247 | MODULE_DESCRIPTION("NEC-NL8048HL11 Driver"); | 254 | MODULE_DESCRIPTION("NEC-NL8048HL11 Driver"); |
| 248 | MODULE_LICENSE("GPL"); | 255 | MODULE_LICENSE("GPL"); |
| @@ -684,9 +684,17 @@ static const struct of_device_id acx565akm_of_match[] = { · 683 unmodified lines | |||
| 684 | 684 | ||
| 685 | MODULE_DEVICE_TABLE(of, acx565akm_of_match); | 685 | MODULE_DEVICE_TABLE(of, acx565akm_of_match); |
| 686 | 686 | ||
| 687 | static const struct spi_device_id acx565akm_ids[] = { | ||
| 688 | { "acx565akm", 0 }, | ||
| 689 | { /* sentinel */ } | ||
| 690 | }; | ||
| 691 | |||
| 692 | MODULE_DEVICE_TABLE(spi, acx565akm_ids); | ||
| 693 | |||
| 687 | static struct spi_driver acx565akm_driver = { | 694 | static struct spi_driver acx565akm_driver = { |
| 688 | .probe = acx565akm_probe, | 695 | .probe = acx565akm_probe, |
| 689 | .remove = acx565akm_remove, | 696 | .remove = acx565akm_remove, |
| 697 | .id_table = acx565akm_ids, | ||
| 690 | .driver = { | 698 | .driver = { |
| 691 | .name = "panel-sony-acx565akm", | 699 | .name = "panel-sony-acx565akm", |
| 692 | .of_match_table = acx565akm_of_match, | 700 | .of_match_table = acx565akm_of_match, |
| @@ -695,7 +703,6 @@ static struct spi_driver acx565akm_driver = { · 2 unmodified lines | |||
| 695 | 703 | ||
| 696 | module_spi_driver(acx565akm_driver); | 704 | module_spi_driver(acx565akm_driver); |
| 697 | 705 | ||
| 698 | MODULE_ALIAS("spi:sony,acx565akm"); | ||
| 699 | MODULE_AUTHOR("Nokia Corporation"); | 706 | MODULE_AUTHOR("Nokia Corporation"); |
| 700 | MODULE_DESCRIPTION("Sony ACX565AKM LCD Panel Driver"); | 707 | MODULE_DESCRIPTION("Sony ACX565AKM LCD Panel Driver"); |
| 701 | MODULE_LICENSE("GPL"); | 708 | MODULE_LICENSE("GPL"); |
| @@ -375,8 +375,7 @@ static const struct of_device_id td028ttec1_of_match[] = { · 374 unmodified lines | |||
| 375 | MODULE_DEVICE_TABLE(of, td028ttec1_of_match); | 375 | MODULE_DEVICE_TABLE(of, td028ttec1_of_match); |
| 376 | 376 | ||
| 377 | static const struct spi_device_id td028ttec1_ids[] = { | 377 | static const struct spi_device_id td028ttec1_ids[] = { |
| 378 | { "tpo,td028ttec1", 0}, | 378 | { "td028ttec1", 0 }, |
| 379 | { "toppoly,td028ttec1", 0 }, | ||
| 380 | { /* sentinel */ } | 379 | { /* sentinel */ } |
| 381 | }; | 380 | }; |
| 382 | 381 | ||
| @@ -491,9 +491,17 @@ static const struct of_device_id td043mtea1_of_match[] = { · 490 unmodified lines | |||
| 491 | 491 | ||
| 492 | MODULE_DEVICE_TABLE(of, td043mtea1_of_match); | 492 | MODULE_DEVICE_TABLE(of, td043mtea1_of_match); |
| 493 | 493 | ||
| 494 | static const struct spi_device_id td043mtea1_ids[] = { | ||
| 495 | { "td043mtea1", 0 }, | ||
| 496 | { /* sentinel */ } | ||
| 497 | }; | ||
| 498 | |||
| 499 | MODULE_DEVICE_TABLE(spi, td043mtea1_ids); | ||
| 500 | |||
| 494 | static struct spi_driver td043mtea1_driver = { | 501 | static struct spi_driver td043mtea1_driver = { |
| 495 | .probe = td043mtea1_probe, | 502 | .probe = td043mtea1_probe, |
| 496 | .remove = td043mtea1_remove, | 503 | .remove = td043mtea1_remove, |
| 504 | .id_table = td043mtea1_ids, | ||
| 497 | .driver = { | 505 | .driver = { |
| 498 | .name = "panel-tpo-td043mtea1", | 506 | .name = "panel-tpo-td043mtea1", |
| 499 | .pm = &td043mtea1_pm_ops, | 507 | .pm = &td043mtea1_pm_ops, |
| @@ -503,7 +511,6 @@ static struct spi_driver td043mtea1_driver = { · 3 unmodified lines | |||
| 503 | 511 | ||
| 504 | module_spi_driver(td043mtea1_driver); | 512 | module_spi_driver(td043mtea1_driver); |
| 505 | 513 | ||
| 506 | MODULE_ALIAS("spi:tpo,td043mtea1"); | ||
| 507 | MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>"); | 514 | MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>"); |
| 508 | MODULE_DESCRIPTION("TPO TD043MTEA1 Panel Driver"); | 515 | MODULE_DESCRIPTION("TPO TD043MTEA1 Panel Driver"); |
| 509 | MODULE_LICENSE("GPL"); | 516 | MODULE_LICENSE("GPL"); |
| @@ -208,6 +208,9 @@ static void panfrost_gpu_init_features(struct panfrost_device *pfdev) · 207 unmodified lines | |||
| 208 | pfdev->features.mem_features = gpu_read(pfdev, GPU_MEM_FEATURES); | 208 | pfdev->features.mem_features = gpu_read(pfdev, GPU_MEM_FEATURES); |
| 209 | pfdev->features.mmu_features = gpu_read(pfdev, GPU_MMU_FEATURES); | 209 | pfdev->features.mmu_features = gpu_read(pfdev, GPU_MMU_FEATURES); |
| 210 | pfdev->features.thread_features = gpu_read(pfdev, GPU_THREAD_FEATURES); | 210 | pfdev->features.thread_features = gpu_read(pfdev, GPU_THREAD_FEATURES); |
| 211 | pfdev->features.max_threads = gpu_read(pfdev, GPU_THREAD_MAX_THREADS); | ||
| 212 | pfdev->features.thread_max_workgroup_sz = gpu_read(pfdev, GPU_THREAD_MAX_WORKGROUP_SIZE); | ||
| 213 | pfdev->features.thread_max_barrier_sz = gpu_read(pfdev, GPU_THREAD_MAX_BARRIER_SIZE); | ||
| 211 | pfdev->features.coherency_features = gpu_read(pfdev, GPU_COHERENCY_FEATURES); | 214 | pfdev->features.coherency_features = gpu_read(pfdev, GPU_COHERENCY_FEATURES); |
| 212 | for (i = 0; i < 4; i++) | 215 | for (i = 0; i < 4; i++) |
| 213 | pfdev->features.texture_features[i] = gpu_read(pfdev, GPU_TEXTURE_FEATURES(i)); | 216 | pfdev->features.texture_features[i] = gpu_read(pfdev, GPU_TEXTURE_FEATURES(i)); |
| @@ -381,13 +381,19 @@ static void panfrost_job_timedout(struct drm_sched_job *sched_job) · 380 unmodified lines | |||
| 381 | job_read(pfdev, JS_TAIL_LO(js)), | 381 | job_read(pfdev, JS_TAIL_LO(js)), |
| 382 | sched_job); | 382 | sched_job); |
| 383 | 383 | ||
| 384 | mutex_lock(&pfdev->reset_lock); | 384 | if (!mutex_trylock(&pfdev->reset_lock)) |
| 385 | return; | ||
| 385 | 386 | ||
| 386 | for (i = 0; i < NUM_JOB_SLOTS; i++) | 387 | for (i = 0; i < NUM_JOB_SLOTS; i++) { |
| 387 | drm_sched_stop(&pfdev->js->queue[i].sched, sched_job); | 388 | struct drm_gpu_scheduler *sched = &pfdev->js->queue[i].sched; |
| 389 | |||
| 390 | drm_sched_stop(sched, sched_job); | ||
| 391 | if (js != i) | ||
| 392 | /* Ensure any timeouts on other slots have finished */ | ||
| 393 | cancel_delayed_work_sync(&sched->work_tdr); | ||
| 394 | } | ||
| 388 | 395 | ||
| 389 | if (sched_job) | 396 | drm_sched_increase_karma(sched_job); |
| 390 | drm_sched_increase_karma(sched_job); | ||
| 391 | 397 | ||
| 392 | spin_lock_irqsave(&pfdev->js->job_lock, flags); | 398 | spin_lock_irqsave(&pfdev->js->job_lock, flags); |
| 393 | for (i = 0; i < NUM_JOB_SLOTS; i++) { | 399 | for (i = 0; i < NUM_JOB_SLOTS; i++) { |
| @@ -379,19 +379,11 @@ radeon_pci_remove(struct pci_dev *pdev) · 378 unmodified lines | |||
| 379 | static void | 379 | static void |
| 380 | radeon_pci_shutdown(struct pci_dev *pdev) | 380 | radeon_pci_shutdown(struct pci_dev *pdev) |
| 381 | { | 381 | { |
| 382 | struct drm_device *ddev = pci_get_drvdata(pdev); | ||
| 383 | |||
| 384 | /* if we are running in a VM, make sure the device | 382 | /* if we are running in a VM, make sure the device |
| 385 | * torn down properly on reboot/shutdown | 383 | * torn down properly on reboot/shutdown |
| 386 | */ | 384 | */ |
| 387 | if (radeon_device_is_virtual()) | 385 | if (radeon_device_is_virtual()) |
| 388 | radeon_pci_remove(pdev); | 386 | radeon_pci_remove(pdev); |
| 389 | |||
| 390 | /* Some adapters need to be suspended before a | ||
| 391 | * shutdown occurs in order to prevent an error | ||
| 392 | * during kexec. | ||
| 393 | */ | ||
| 394 | radeon_suspend_kms(ddev, true, true, false); | ||
| 395 | } | 387 | } |
| 396 | 388 | ||
| 397 | static int radeon_pmops_suspend(struct device *dev) | 389 | static int radeon_pmops_suspend(struct device *dev) |
| @@ -147,7 +147,7 @@ static int rcar_du_wb_enc_atomic_check(struct drm_encoder *encoder, · 146 unmodified lines | |||
| 147 | struct drm_device *dev = encoder->dev; | 147 | struct drm_device *dev = encoder->dev; |
| 148 | struct drm_framebuffer *fb; | 148 | struct drm_framebuffer *fb; |
| 149 | 149 | ||
| 150 | if (!conn_state->writeback_job || !conn_state->writeback_job->fb) | 150 | if (!conn_state->writeback_job) |
| 151 | return 0; | 151 | return 0; |
| 152 | 152 | ||
| 153 | fb = conn_state->writeback_job->fb; | 153 | fb = conn_state->writeback_job->fb; |
| @@ -221,7 +221,7 @@ void rcar_du_writeback_setup(struct rcar_du_crtc *rcrtc, · 67 unmodified lines | |||
| 221 | unsigned int i; | 221 | unsigned int i; |
| 222 | 222 | ||
| 223 | state = rcrtc->writeback.base.state; | 223 | state = rcrtc->writeback.base.state; |
| 224 | if (!state || !state->writeback_job || !state->writeback_job->fb) | 224 | if (!state || !state->writeback_job) |
| 225 | return; | 225 | return; |
| 226 | 226 | ||
| 227 | fb = state->writeback_job->fb; | 227 | fb = state->writeback_job->fb; |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | |||
| 7 | #include <linux/gpio.h> | 7 | #include <linux/gpio.h> |
| 8 | #include <linux/mod_devicetable.h> | 8 | #include <linux/mod_devicetable.h> |
| 9 | #include <linux/of_gpio.h> | 9 | #include <linux/of_gpio.h> |
| 10 | #include <linux/pinctrl/consumer.h> | ||
| 10 | #include <linux/platform_device.h> | 11 | #include <linux/platform_device.h> |
| 11 | 12 | ||
| 12 | #include <drm/drm_atomic_helper.h> | 13 | #include <drm/drm_atomic_helper.h> |
| @@ -63,7 +63,6 @@ config TINYDRM_REPAPER · 62 unmodified lines | |||
| 63 | depends on DRM && SPI | 63 | depends on DRM && SPI |
| 64 | select DRM_KMS_HELPER | 64 | select DRM_KMS_HELPER |
| 65 | select DRM_KMS_CMA_HELPER | 65 | select DRM_KMS_CMA_HELPER |
| 66 | depends on THERMAL || !THERMAL | ||
| 67 | help | 66 | help |
| 68 | DRM driver for the following Pervasive Displays panels: | 67 | DRM driver for the following Pervasive Displays panels: |
| 69 | 1.44" TFT EPD Panel (E1144CS021) | 68 | 1.44" TFT EPD Panel (E1144CS021) |
| @@ -185,8 +185,9 @@ static void ttm_bo_add_mem_to_lru(struct ttm_buffer_object *bo, · 184 unmodified lines | |||
| 185 | list_add_tail(&bo->lru, &man->lru[bo->priority]); | 185 | list_add_tail(&bo->lru, &man->lru[bo->priority]); |
| 186 | kref_get(&bo->list_kref); | 186 | kref_get(&bo->list_kref); |
| 187 | 187 | ||
| 188 | if (bo->ttm && !(bo->ttm->page_flags & | 188 | if (!(man->flags & TTM_MEMTYPE_FLAG_FIXED) && bo->ttm && |
| 189 | (TTM_PAGE_FLAG_SG | TTM_PAGE_FLAG_SWAPPED))) { | 189 | !(bo->ttm->page_flags & (TTM_PAGE_FLAG_SG | |
| 190 | TTM_PAGE_FLAG_SWAPPED))) { | ||
| 190 | list_add_tail(&bo->swap, &bdev->glob->swap_lru[bo->priority]); | 191 | list_add_tail(&bo->swap, &bdev->glob->swap_lru[bo->priority]); |
| 191 | kref_get(&bo->list_kref); | 192 | kref_get(&bo->list_kref); |
| 192 | } | 193 | } |
| @@ -878,11 +879,11 @@ static int ttm_mem_evict_first(struct ttm_bo_device *bdev, · 685 unmodified lines | |||
| 878 | 879 | ||
| 879 | if (!bo) { | 880 | if (!bo) { |
| 880 | if (busy_bo) | 881 | if (busy_bo) |
| 881 | ttm_bo_get(busy_bo); | 882 | kref_get(&busy_bo->list_kref); |
| 882 | spin_unlock(&glob->lru_lock); | 883 | spin_unlock(&glob->lru_lock); |
| 883 | ret = ttm_mem_evict_wait_busy(busy_bo, ctx, ticket); | 884 | ret = ttm_mem_evict_wait_busy(busy_bo, ctx, ticket); |
| 884 | if (busy_bo) | 885 | if (busy_bo) |
| 885 | ttm_bo_put(busy_bo); | 886 | kref_put(&busy_bo->list_kref, ttm_bo_release_list); |
| 886 | return ret; | 887 | return ret; |
| 887 | } | 888 | } |
| 888 | 889 | ||
| @@ -278,15 +278,13 @@ static vm_fault_t ttm_bo_vm_fault(struct vm_fault *vmf) · 277 unmodified lines | |||
| 278 | else | 278 | else |
| 279 | ret = vmf_insert_pfn(&cvma, address, pfn); | 279 | ret = vmf_insert_pfn(&cvma, address, pfn); |
| 280 | 280 | ||
| 281 | /* | 281 | /* Never error on prefaulted PTEs */ |
| 282 | * Somebody beat us to this PTE or prefaulting to | 282 | if (unlikely((ret & VM_FAULT_ERROR))) { |
| 283 | * an already populated PTE, or prefaulting error. | 283 | if (i == 0) |
| 284 | */ | 284 | goto out_io_unlock; |
| 285 | 285 | else | |
| 286 | if (unlikely((ret == VM_FAULT_NOPAGE && i > 0))) | 286 | break; |
| 287 | break; | 287 | } |
| 288 | else if (unlikely(ret & VM_FAULT_ERROR)) | ||
| 289 | goto out_io_unlock; | ||
| 290 | 288 | ||
| 291 | address += PAGE_SIZE; | 289 | address += PAGE_SIZE; |
| 292 | if (unlikely(++page_offset >= page_last)) | 290 | if (unlikely(++page_offset >= page_last)) |
| @@ -231,7 +231,7 @@ static int vc4_txp_connector_atomic_check(struct drm_connector *conn, · 230 unmodified lines | |||
| 231 | int i; | 231 | int i; |
| 232 | 232 | ||
| 233 | conn_state = drm_atomic_get_new_connector_state(state, conn); | 233 | conn_state = drm_atomic_get_new_connector_state(state, conn); |
| 234 | if (!conn_state->writeback_job || !conn_state->writeback_job->fb) | 234 | if (!conn_state->writeback_job) |
| 235 | return 0; | 235 | return 0; |
| 236 | 236 | ||
| 237 | crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); | 237 | crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); |
| @@ -271,8 +271,7 @@ static void vc4_txp_connector_atomic_commit(struct drm_connector *conn, · 33 unmodified lines | |||
| 271 | u32 ctrl; | 271 | u32 ctrl; |
| 272 | int i; | 272 | int i; |
| 273 | 273 | ||
| 274 | if (WARN_ON(!conn_state->writeback_job || | 274 | if (WARN_ON(!conn_state->writeback_job)) |
| 275 | !conn_state->writeback_job->fb)) | ||
| 276 | return; | 275 | return; |
| 277 | 276 | ||
| 278 | mode = &conn_state->crtc->state->adjusted_mode; | 277 | mode = &conn_state->crtc->state->adjusted_mode; |
| @@ -718,17 +718,9 @@ static int xen_drv_probe(struct xenbus_device *xb_dev, · 717 unmodified lines | |||
| 718 | struct device *dev = &xb_dev->dev; | 718 | struct device *dev = &xb_dev->dev; |
| 719 | int ret; | 719 | int ret; |
| 720 | 720 | ||
| 721 | /* | 721 | ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64)); |
| 722 | * The device is not spawn from a device tree, so arch_setup_dma_ops | ||
| 723 | * is not called, thus leaving the device with dummy DMA ops. | ||
| 724 | * This makes the device return error on PRIME buffer import, which | ||
| 725 | * is not correct: to fix this call of_dma_configure() with a NULL | ||
| 726 | * node to set default DMA ops. | ||
| 727 | */ | ||
| 728 | dev->coherent_dma_mask = DMA_BIT_MASK(32); | ||
| 729 | ret = of_dma_configure(dev, NULL, true); | ||
| 730 | if (ret < 0) { | 722 | if (ret < 0) { |
| 731 | DRM_ERROR("Cannot setup DMA ops, ret %d", ret); | 723 | DRM_ERROR("Cannot setup DMA mask, ret %d", ret); |
| 732 | return ret; | 724 | return ret; |
| 733 | } | 725 | } |
| 734 | 726 | ||
| @@ -314,60 +314,24 @@ static void mousevsc_on_receive(struct hv_device *device, · 313 unmodified lines | |||
| 314 | 314 | ||
| 315 | static void mousevsc_on_channel_callback(void *context) | 315 | static void mousevsc_on_channel_callback(void *context) |
| 316 | { | 316 | { |
| 317 | const int packet_size = 0x100; | ||
| 318 | int ret; | ||
| 319 | struct hv_device *device = context; | 317 | struct hv_device *device = context; |
| 320 | u32 bytes_recvd; | ||
| 321 | u64 req_id; | ||
| 322 | struct vmpacket_descriptor *desc; | 318 | struct vmpacket_descriptor *desc; |
| 323 | unsigned char *buffer; | ||
| 324 | int bufferlen = packet_size; | ||
| 325 | |||
| 326 | buffer = kmalloc(bufferlen, GFP_ATOMIC); | ||
| 327 | if (!buffer) | ||
| 328 | return; | ||
| 329 | |||
| 330 | do { | ||
| 331 | ret = vmbus_recvpacket_raw(device->channel, buffer, | ||
| 332 | bufferlen, &bytes_recvd, &req_id); | ||
| 333 | |||
| 334 | switch (ret) { | ||
| 335 | case 0: | ||
| 336 | if (bytes_recvd <= 0) { | ||
| 337 | kfree(buffer); | ||
| 338 | return; | ||
| 339 | } | ||
| 340 | desc = (struct vmpacket_descriptor *)buffer; | ||
| 341 | |||
| 342 | switch (desc->type) { | ||
| 343 | case VM_PKT_COMP: | ||
| 344 | break; | ||
| 345 | |||
| 346 | case VM_PKT_DATA_INBAND: | ||
| 347 | mousevsc_on_receive(device, desc); | ||
| 348 | break; | ||
| 349 | |||
| 350 | default: | ||
| 351 | pr_err("unhandled packet type %d, tid %llx len %d\n", | ||
| 352 | desc->type, req_id, bytes_recvd); | ||
| 353 | break; | ||
| 354 | } | ||
| 355 | 319 | ||
| 320 | foreach_vmbus_pkt(desc, device->channel) { | ||
| 321 | switch (desc->type) { | ||
| 322 | case VM_PKT_COMP: | ||
| 356 | break; | 323 | break; |
| 357 | 324 | ||
| 358 | case -ENOBUFS: | 325 | case VM_PKT_DATA_INBAND: |
| 359 | kfree(buffer); | 326 | mousevsc_on_receive(device, desc); |
| 360 | /* Handle large packet */ | 327 | break; |
| 361 | bufferlen = bytes_recvd; | ||
| 362 | buffer = kmalloc(bytes_recvd, GFP_ATOMIC); | ||
| 363 | |||
| 364 | if (!buffer) | ||
| 365 | return; | ||
| 366 | 328 | ||
| 329 | default: | ||
| 330 | pr_err("Unhandled packet type %d, tid %llx len %d\n", | ||
| 331 | desc->type, desc->trans_id, desc->len8 * 8); | ||
| 367 | break; | 332 | break; |
| 368 | } | 333 | } |
| 369 | } while (1); | 334 | } |
| 370 | |||
| 371 | } | 335 | } |
| 372 | 336 | ||
| 373 | static int mousevsc_connect_to_vsp(struct hv_device *device) | 337 | static int mousevsc_connect_to_vsp(struct hv_device *device) |
| @@ -912,6 +912,7 @@ static void vmbus_shutdown(struct device *child_device) · 911 unmodified lines | |||
| 912 | drv->shutdown(dev); | 912 | drv->shutdown(dev); |
| 913 | } | 913 | } |
| 914 | 914 | ||
| 915 | #ifdef CONFIG_PM_SLEEP | ||
| 915 | /* | 916 | /* |
| 916 | * vmbus_suspend - Suspend a vmbus device | 917 | * vmbus_suspend - Suspend a vmbus device |
| 917 | */ | 918 | */ |
| @@ -949,6 +950,7 @@ static int vmbus_resume(struct device *child_device) · 31 unmodified lines | |||
| 949 | 950 | ||
| 950 | return drv->resume(dev); | 951 | return drv->resume(dev); |
| 951 | } | 952 | } |
| 953 | #endif /* CONFIG_PM_SLEEP */ | ||
| 952 | 954 | ||
| 953 | /* | 955 | /* |
| 954 | * vmbus_device_release - Final callback release of the vmbus child device | 956 | * vmbus_device_release - Final callback release of the vmbus child device |
| @@ -1070,6 +1072,7 @@ msg_handled: · 115 unmodified lines | |||
| 1070 | vmbus_signal_eom(msg, message_type); | 1072 | vmbus_signal_eom(msg, message_type); |
| 1071 | } | 1073 | } |
| 1072 | 1074 | ||
| 1075 | #ifdef CONFIG_PM_SLEEP | ||
| 1073 | /* | 1076 | /* |
| 1074 | * Fake RESCIND_CHANNEL messages to clean up hv_sock channels by force for | 1077 | * Fake RESCIND_CHANNEL messages to clean up hv_sock channels by force for |
| 1075 | * hibernation, because hv_sock connections can not persist across hibernation. | 1078 | * hibernation, because hv_sock connections can not persist across hibernation. |
| @@ -1105,6 +1108,7 @@ static void vmbus_force_channel_rescinded(struct vmbus_channel *channel) · 29 unmodified lines | |||
| 1105 | vmbus_connection.work_queue, | 1108 | vmbus_connection.work_queue, |
| 1106 | &ctx->work); | 1109 | &ctx->work); |
| 1107 | } | 1110 | } |
| 1111 | #endif /* CONFIG_PM_SLEEP */ | ||
| 1108 | 1112 | ||
| 1109 | /* | 1113 | /* |
| 1110 | * Direct callback for channels using other deferred processing | 1114 | * Direct callback for channels using other deferred processing |
| @@ -2125,6 +2129,7 @@ acpi_walk_err: · 1014 unmodified lines | |||
| 2125 | return ret_val; | 2129 | return ret_val; |
| 2126 | } | 2130 | } |
| 2127 | 2131 | ||
| 2132 | #ifdef CONFIG_PM_SLEEP | ||
| 2128 | static int vmbus_bus_suspend(struct device *dev) | 2133 | static int vmbus_bus_suspend(struct device *dev) |
| 2129 | { | 2134 | { |
| 2130 | struct vmbus_channel *channel, *sc; | 2135 | struct vmbus_channel *channel, *sc; |
| @@ -2247,6 +2252,7 @@ static int vmbus_bus_resume(struct device *dev) · 116 unmodified lines | |||
| 2247 | 2252 | ||
| 2248 | return 0; | 2253 | return 0; |
| 2249 | } | 2254 | } |
| 2255 | #endif /* CONFIG_PM_SLEEP */ | ||
| 2250 | 2256 | ||
| 2251 | static const struct acpi_device_id vmbus_acpi_device_ids[] = { | 2257 | static const struct acpi_device_id vmbus_acpi_device_ids[] = { |
| 2252 | {"VMBUS", 0}, | 2258 | {"VMBUS", 0}, |
| @@ -99,6 +99,8 @@ struct nct7904_data { · 98 unmodified lines | |||
| 99 | u8 enable_dts; | 99 | u8 enable_dts; |
| 100 | u8 has_dts; | 100 | u8 has_dts; |
| 101 | u8 temp_mode; /* 0: TR mode, 1: TD mode */ | 101 | u8 temp_mode; /* 0: TR mode, 1: TD mode */ |
| 102 | u8 fan_alarm[2]; | ||
| 103 | u8 vsen_alarm[3]; | ||
| 102 | }; | 104 | }; |
| 103 | 105 | ||
| 104 | /* Access functions */ | 106 | /* Access functions */ |
| @@ -214,7 +216,15 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel, · 109 unmodified lines | |||
| 214 | SMI_STS5_REG + (channel >> 3)); | 216 | SMI_STS5_REG + (channel >> 3)); |
| 215 | if (ret < 0) | 217 | if (ret < 0) |
| 216 | return ret; | 218 | return ret; |
| 217 | *val = (ret >> (channel & 0x07)) & 1; | 219 | if (!data->fan_alarm[channel >> 3]) |
| 220 | data->fan_alarm[channel >> 3] = ret & 0xff; | ||
| 221 | else | ||
| 222 | /* If there is new alarm showing up */ | ||
| 223 | data->fan_alarm[channel >> 3] |= (ret & 0xff); | ||
| 224 | *val = (data->fan_alarm[channel >> 3] >> (channel & 0x07)) & 1; | ||
| 225 | /* Needs to clean the alarm if alarm existing */ | ||
| 226 | if (*val) | ||
| 227 | data->fan_alarm[channel >> 3] ^= 1 << (channel & 0x07); | ||
| 218 | return 0; | 228 | return 0; |
| 219 | default: | 229 | default: |
| 220 | return -EOPNOTSUPP; | 230 | return -EOPNOTSUPP; |
| @@ -298,7 +308,15 @@ static int nct7904_read_in(struct device *dev, u32 attr, int channel, · 77 unmodified lines | |||
| 298 | SMI_STS1_REG + (index >> 3)); | 308 | SMI_STS1_REG + (index >> 3)); |
| 299 | if (ret < 0) | 309 | if (ret < 0) |
| 300 | return ret; | 310 | return ret; |
| 301 | *val = (ret >> (index & 0x07)) & 1; | 311 | if (!data->vsen_alarm[index >> 3]) |
| 312 | data->vsen_alarm[index >> 3] = ret & 0xff; | ||
| 313 | else | ||
| 314 | /* If there is new alarm showing up */ | ||
| 315 | data->vsen_alarm[index >> 3] |= (ret & 0xff); | ||
| 316 | *val = (data->vsen_alarm[index >> 3] >> (index & 0x07)) & 1; | ||
| 317 | /* Needs to clean the alarm if alarm existing */ | ||
| 318 | if (*val) | ||
| 319 | data->vsen_alarm[index >> 3] ^= 1 << (index & 0x07); | ||
| 302 | return 0; | 320 | return 0; |
| 303 | default: | 321 | default: |
| 304 | return -EOPNOTSUPP; | 322 | return -EOPNOTSUPP; |
| @@ -915,12 +933,15 @@ static int nct7904_probe(struct i2c_client *client, · 610 unmodified lines | |||
| 915 | 933 | ||
| 916 | data->temp_mode = 0; | 934 | data->temp_mode = 0; |
| 917 | for (i = 0; i < 4; i++) { | 935 | for (i = 0; i < 4; i++) { |
| 918 | val = (ret & (0x03 << i)) >> (i * 2); | 936 | val = (ret >> (i * 2)) & 0x03; |
| 919 | bit = (1 << i); | 937 | bit = (1 << i); |
| 920 | if (val == 0) | 938 | if (val == 0) { |
| 921 | data->tcpu_mask &= ~bit; | 939 | data->tcpu_mask &= ~bit; |
| 922 | else if (val == 0x1 || val == 0x2) | 940 | } else { |
| 923 | data->temp_mode |= bit; | 941 | if (val == 0x1 || val == 0x2) |
| 942 | data->temp_mode |= bit; | ||
| 943 | data->vsen_mask &= ~(0x06 << (i * 2)); | ||
| 944 | } | ||
| 924 | } | 945 | } |
| 925 | 946 | ||
| 926 | /* PECI */ | 947 | /* PECI */ |
| @@ -474,12 +474,17 @@ static int adxl372_configure_fifo(struct adxl372_state *st) · 473 unmodified lines | |||
| 474 | if (ret < 0) | 474 | if (ret < 0) |
| 475 | return ret; | 475 | return ret; |
| 476 | 476 | ||
| 477 | fifo_samples = st->watermark & 0xFF; | 477 | /* |
| 478 | * watermark stores the number of sets; we need to write the FIFO | ||
| 479 | * registers with the number of samples | ||
| 480 | */ | ||
| 481 | fifo_samples = (st->watermark * st->fifo_set_size); | ||
| 478 | fifo_ctl = ADXL372_FIFO_CTL_FORMAT_MODE(st->fifo_format) | | 482 | fifo_ctl = ADXL372_FIFO_CTL_FORMAT_MODE(st->fifo_format) | |
| 479 | ADXL372_FIFO_CTL_MODE_MODE(st->fifo_mode) | | 483 | ADXL372_FIFO_CTL_MODE_MODE(st->fifo_mode) | |
| 480 | ADXL372_FIFO_CTL_SAMPLES_MODE(st->watermark); | 484 | ADXL372_FIFO_CTL_SAMPLES_MODE(fifo_samples); |
| 481 | 485 | ||
| 482 | ret = regmap_write(st->regmap, ADXL372_FIFO_SAMPLES, fifo_samples); | 486 | ret = regmap_write(st->regmap, |
| 487 | ADXL372_FIFO_SAMPLES, fifo_samples & 0xFF); | ||
| 483 | if (ret < 0) | 488 | if (ret < 0) |
| 484 | return ret; | 489 | return ret; |
| 485 | 490 | ||
| @@ -548,8 +553,7 @@ static irqreturn_t adxl372_trigger_handler(int irq, void *p) · 62 unmodified lines | |||
| 548 | goto err; | 553 | goto err; |
| 549 | 554 | ||
| 550 | /* Each sample is 2 bytes */ | 555 | /* Each sample is 2 bytes */ |
| 551 | for (i = 0; i < fifo_entries * sizeof(u16); | 556 | for (i = 0; i < fifo_entries; i += st->fifo_set_size) |
| 552 | i += st->fifo_set_size * sizeof(u16)) | ||
| 553 | iio_push_to_buffers(indio_dev, &st->fifo_buf[i]); | 557 | iio_push_to_buffers(indio_dev, &st->fifo_buf[i]); |
| 554 | } | 558 | } |
| 555 | err: | 559 | err: |
| @@ -571,6 +575,14 @@ static int adxl372_setup(struct adxl372_state *st) · 15 unmodified lines | |||
| 571 | return -ENODEV; | 575 | return -ENODEV; |
| 572 | } | 576 | } |
| 573 | 577 | ||
| 578 | /* | ||
| 579 | * Perform a software reset to make sure the device is in a consistent | ||
| 580 | * state after start up. | ||
| 581 | */ | ||
| 582 | ret = regmap_write(st->regmap, ADXL372_RESET, ADXL372_RESET_CODE); | ||
| 583 | if (ret < 0) | ||
| 584 | return ret; | ||
| 585 | |||
| 574 | ret = adxl372_set_op_mode(st, ADXL372_STANDBY); | 586 | ret = adxl372_set_op_mode(st, ADXL372_STANDBY); |
| 575 | if (ret < 0) | 587 | if (ret < 0) |
| 576 | return ret; | 588 | return ret; |
| @@ -117,7 +117,7 @@ · 116 unmodified lines | |||
| 117 | #define BMC150_ACCEL_SLEEP_1_SEC 0x0F | 117 | #define BMC150_ACCEL_SLEEP_1_SEC 0x0F |
| 118 | 118 | ||
| 119 | #define BMC150_ACCEL_REG_TEMP 0x08 | 119 | #define BMC150_ACCEL_REG_TEMP 0x08 |
| 120 | #define BMC150_ACCEL_TEMP_CENTER_VAL 24 | 120 | #define BMC150_ACCEL_TEMP_CENTER_VAL 23 |
| 121 | 121 | ||
| 122 | #define BMC150_ACCEL_AXIS_TO_REG(axis) (BMC150_ACCEL_REG_XOUT_L + (axis * 2)) | 122 | #define BMC150_ACCEL_AXIS_TO_REG(axis) (BMC150_ACCEL_REG_XOUT_L + (axis * 2)) |
| 123 | #define BMC150_AUTO_SUSPEND_DELAY_MS 2000 | 123 | #define BMC150_AUTO_SUSPEND_DELAY_MS 2000 |
| @@ -810,10 +810,10 @@ static int ad799x_probe(struct i2c_client *client, · 809 unmodified lines | |||
| 810 | 810 | ||
| 811 | ret = ad799x_write_config(st, st->chip_config->default_config); | 811 | ret = ad799x_write_config(st, st->chip_config->default_config); |
| 812 | if (ret < 0) | 812 | if (ret < 0) |
| 813 | goto error_disable_reg; | 813 | goto error_disable_vref; |
| 814 | ret = ad799x_read_config(st); | 814 | ret = ad799x_read_config(st); |
| 815 | if (ret < 0) | 815 | if (ret < 0) |
| 816 | goto error_disable_reg; | 816 | goto error_disable_vref; |
| 817 | st->config = ret; | 817 | st->config = ret; |
| 818 | 818 | ||
| 819 | ret = iio_triggered_buffer_setup(indio_dev, NULL, | 819 | ret = iio_triggered_buffer_setup(indio_dev, NULL, |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | |||
| 7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | 7 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 8 | */ | 8 | */ |
| 9 | 9 | ||
| 10 | #include <linux/dmi.h> | ||
| 10 | #include <linux/module.h> | 11 | #include <linux/module.h> |
| 11 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
| 12 | #include <linux/device.h> | 13 | #include <linux/device.h> |
| @@ -25,6 +26,11 @@ · 12 unmodified lines | |||
| 25 | #define AXP288_ADC_EN_MASK 0xF0 | 26 | #define AXP288_ADC_EN_MASK 0xF0 |
| 26 | #define AXP288_ADC_TS_ENABLE 0x01 | 27 | #define AXP288_ADC_TS_ENABLE 0x01 |
| 27 | 28 | ||
| 29 | #define AXP288_ADC_TS_BIAS_MASK GENMASK(5, 4) | ||
| 30 | #define AXP288_ADC_TS_BIAS_20UA (0 << 4) | ||
| 31 | #define AXP288_ADC_TS_BIAS_40UA (1 << 4) | ||
| 32 | #define AXP288_ADC_TS_BIAS_60UA (2 << 4) | ||
| 33 | #define AXP288_ADC_TS_BIAS_80UA (3 << 4) | ||
| 28 | #define AXP288_ADC_TS_CURRENT_ON_OFF_MASK GENMASK(1, 0) | 34 | #define AXP288_ADC_TS_CURRENT_ON_OFF_MASK GENMASK(1, 0) |
| 29 | #define AXP288_ADC_TS_CURRENT_OFF (0 << 0) | 35 | #define AXP288_ADC_TS_CURRENT_OFF (0 << 0) |
| 30 | #define AXP288_ADC_TS_CURRENT_ON_WHEN_CHARGING (1 << 0) | 36 | #define AXP288_ADC_TS_CURRENT_ON_WHEN_CHARGING (1 << 0) |
| @@ -177,10 +183,36 @@ static int axp288_adc_read_raw(struct iio_dev *indio_dev, · 146 unmodified lines | |||
| 177 | return ret; | 183 | return ret; |
| 178 | } | 184 | } |
| 179 | 185 | ||
| 186 | /* | ||
| 187 | * We rely on the machine's firmware to correctly setup the TS pin bias current | ||
| 188 | * at boot. This lists systems with broken fw where we need to set it ourselves. | ||
| 189 | */ | ||
| 190 | static const struct dmi_system_id axp288_adc_ts_bias_override[] = { | ||
| 191 | { | ||
| 192 | /* Lenovo Ideapad 100S (11 inch) */ | ||
| 193 | .matches = { | ||
| 194 | DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | ||
| 195 | DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo ideapad 100S-11IBY"), | ||
| 196 | }, | ||
| 197 | .driver_data = (void *)(uintptr_t)AXP288_ADC_TS_BIAS_80UA, | ||
| 198 | }, | ||
| 199 | {} | ||
| 200 | }; | ||
| 201 | |||
| 180 | static int axp288_adc_initialize(struct axp288_adc_info *info) | 202 | static int axp288_adc_initialize(struct axp288_adc_info *info) |
| 181 | { | 203 | { |
| 204 | const struct dmi_system_id *bias_override; | ||
| 182 | int ret, adc_enable_val; | 205 | int ret, adc_enable_val; |
| 183 | 206 | ||
| 207 | bias_override = dmi_first_match(axp288_adc_ts_bias_override); | ||
| 208 | if (bias_override) { | ||
| 209 | ret = regmap_update_bits(info->regmap, AXP288_ADC_TS_PIN_CTRL, | ||
| 210 | AXP288_ADC_TS_BIAS_MASK, | ||
| 211 | (uintptr_t)bias_override->driver_data); | ||
| 212 | if (ret) | ||
| 213 | return ret; | ||
| 214 | } | ||
| 215 | |||
| 184 | /* | 216 | /* |
| 185 | * Determine if the TS pin is enabled and set the TS current-source | 217 | * Determine if the TS pin is enabled and set the TS current-source |
| 186 | * accordingly. | 218 | * accordingly. |
| @@ -100,14 +100,14 @@ struct hx711_data { · 99 unmodified lines | |||
| 100 | 100 | ||
| 101 | static int hx711_cycle(struct hx711_data *hx711_data) | 101 | static int hx711_cycle(struct hx711_data *hx711_data) |
| 102 | { | 102 | { |
| 103 | int val; | 103 | unsigned long flags; |
| 104 | 104 | ||
| 105 | /* | 105 | /* |
| 106 | * if preempted for more then 60us while PD_SCK is high: | 106 | * if preempted for more then 60us while PD_SCK is high: |
| 107 | * hx711 is going in reset | 107 | * hx711 is going in reset |
| 108 | * ==> measuring is false | 108 | * ==> measuring is false |
| 109 | */ | 109 | */ |
| 110 | preempt_disable(); | 110 | local_irq_save(flags); |
| 111 | gpiod_set_value(hx711_data->gpiod_pd_sck, 1); | 111 | gpiod_set_value(hx711_data->gpiod_pd_sck, 1); |
| 112 | 112 | ||
| 113 | /* | 113 | /* |
| @@ -117,7 +117,6 @@ static int hx711_cycle(struct hx711_data *hx711_data) · 3 unmodified lines | |||
| 117 | */ | 117 | */ |
| 118 | ndelay(hx711_data->data_ready_delay_ns); | 118 | ndelay(hx711_data->data_ready_delay_ns); |
| 119 | 119 | ||
| 120 | val = gpiod_get_value(hx711_data->gpiod_dout); | ||
| 121 | /* | 120 | /* |
| 122 | * here we are not waiting for 0.2 us as suggested by the datasheet, | 121 | * here we are not waiting for 0.2 us as suggested by the datasheet, |
| 123 | * because the oscilloscope showed in a test scenario | 122 | * because the oscilloscope showed in a test scenario |
| @@ -125,7 +124,7 @@ static int hx711_cycle(struct hx711_data *hx711_data) · 1 unmodified line | |||
| 125 | * and 0.56 us for PD_SCK low on TI Sitara with 800 MHz | 124 | * and 0.56 us for PD_SCK low on TI Sitara with 800 MHz |
| 126 | */ | 125 | */ |
| 127 | gpiod_set_value(hx711_data->gpiod_pd_sck, 0); | 126 | gpiod_set_value(hx711_data->gpiod_pd_sck, 0); |
| 128 | preempt_enable(); | 127 | local_irq_restore(flags); |
| 129 | 128 | ||
| 130 | /* | 129 | /* |
| 131 | * make it a square wave for addressing cases with capacitance on | 130 | * make it a square wave for addressing cases with capacitance on |
| @@ -133,7 +132,8 @@ static int hx711_cycle(struct hx711_data *hx711_data) · 1 unmodified line | |||
| 133 | */ | 132 | */ |
| 134 | ndelay(hx711_data->data_ready_delay_ns); | 133 | ndelay(hx711_data->data_ready_delay_ns); |
| 135 | 134 | ||
| 136 | return val; | 135 | /* sample as late as possible */ |
| 136 | return gpiod_get_value(hx711_data->gpiod_dout); | ||
| 137 | } | 137 | } |
| 138 | 138 | ||
| 139 | static int hx711_read(struct hx711_data *hx711_data) | 139 | static int hx711_read(struct hx711_data *hx711_data) |
| @@ -1219,6 +1219,11 @@ static int meson_sar_adc_probe(struct platform_device *pdev) · 1218 unmodified lines | |||
| 1219 | if (IS_ERR(base)) | 1219 | if (IS_ERR(base)) |
| 1220 | return PTR_ERR(base); | 1220 | return PTR_ERR(base); |
| 1221 | 1221 | ||
| 1222 | priv->regmap = devm_regmap_init_mmio(&pdev->dev, base, | ||
| 1223 | priv->param->regmap_config); | ||
| 1224 | if (IS_ERR(priv->regmap)) | ||
| 1225 | return PTR_ERR(priv->regmap); | ||
| 1226 | |||
| 1222 | irq = irq_of_parse_and_map(pdev->dev.of_node, 0); | 1227 | irq = irq_of_parse_and_map(pdev->dev.of_node, 0); |
| 1223 | if (!irq) | 1228 | if (!irq) |
| 1224 | return -EINVAL; | 1229 | return -EINVAL; |
| @@ -1228,11 +1233,6 @@ static int meson_sar_adc_probe(struct platform_device *pdev) · 3 unmodified lines | |||
| 1228 | if (ret) | 1233 | if (ret) |
| 1229 | return ret; | 1234 | return ret; |
| 1230 | 1235 | ||
| 1231 | priv->regmap = devm_regmap_init_mmio(&pdev->dev, base, | ||
| 1232 | priv->param->regmap_config); | ||
| 1233 | if (IS_ERR(priv->regmap)) | ||
| 1234 | return PTR_ERR(priv->regmap); | ||
| 1235 | |||
| 1236 | priv->clkin = devm_clk_get(&pdev->dev, "clkin"); | 1236 | priv->clkin = devm_clk_get(&pdev->dev, "clkin"); |
| 1237 | if (IS_ERR(priv->clkin)) { | 1237 | if (IS_ERR(priv->clkin)) { |
| 1238 | dev_err(&pdev->dev, "failed to get clkin\n"); | 1238 | dev_err(&pdev->dev, "failed to get clkin\n"); |
| @@ -24,33 +24,6 @@ · 23 unmodified lines | |||
| 24 | 24 | ||
| 25 | #include "stm32-adc-core.h" | 25 | #include "stm32-adc-core.h" |
| 26 | 26 | ||
| 27 | /* STM32F4 - common registers for all ADC instances: 1, 2 & 3 */ | ||
| 28 | #define STM32F4_ADC_CSR (STM32_ADCX_COMN_OFFSET + 0x00) | ||
| 29 | #define STM32F4_ADC_CCR (STM32_ADCX_COMN_OFFSET + 0x04) | ||
| 30 | |||
| 31 | /* STM32F4_ADC_CSR - bit fields */ | ||
| 32 | #define STM32F4_EOC3 BIT(17) | ||
| 33 | #define STM32F4_EOC2 BIT(9) | ||
| 34 | #define STM32F4_EOC1 BIT(1) | ||
| 35 | |||
| 36 | /* STM32F4_ADC_CCR - bit fields */ | ||
| 37 | #define STM32F4_ADC_ADCPRE_SHIFT 16 | ||
| 38 | #define STM32F4_ADC_ADCPRE_MASK GENMASK(17, 16) | ||
| 39 | |||
| 40 | /* STM32H7 - common registers for all ADC instances */ | ||
| 41 | #define STM32H7_ADC_CSR (STM32_ADCX_COMN_OFFSET + 0x00) | ||
| 42 | #define STM32H7_ADC_CCR (STM32_ADCX_COMN_OFFSET + 0x08) | ||
| 43 | |||
| 44 | /* STM32H7_ADC_CSR - bit fields */ | ||
| 45 | #define STM32H7_EOC_SLV BIT(18) | ||
| 46 | #define STM32H7_EOC_MST BIT(2) | ||
| 47 | |||
| 48 | /* STM32H7_ADC_CCR - bit fields */ | ||
| 49 | #define STM32H7_PRESC_SHIFT 18 | ||
| 50 | #define STM32H7_PRESC_MASK GENMASK(21, 18) | ||
| 51 | #define STM32H7_CKMODE_SHIFT 16 | ||
| 52 | #define STM32H7_CKMODE_MASK GENMASK(17, 16) | ||
| 53 | |||
| 54 | #define STM32_ADC_CORE_SLEEP_DELAY_MS 2000 | 27 | #define STM32_ADC_CORE_SLEEP_DELAY_MS 2000 |
| 55 | 28 | ||
| 56 | /* SYSCFG registers */ | 29 | /* SYSCFG registers */ |
| @@ -71,6 +44,8 @@ · 14 unmodified lines | |||
| 71 | * @eoc1: adc1 end of conversion flag in @csr | 44 | * @eoc1: adc1 end of conversion flag in @csr |
| 72 | * @eoc2: adc2 end of conversion flag in @csr | 45 | * @eoc2: adc2 end of conversion flag in @csr |
| 73 | * @eoc3: adc3 end of conversion flag in @csr | 46 | * @eoc3: adc3 end of conversion flag in @csr |
| 47 | * @ier: interrupt enable register offset for each adc | ||
| 48 | * @eocie_msk: end of conversion interrupt enable mask in @ier | ||
| 74 | */ | 49 | */ |
| 75 | struct stm32_adc_common_regs { | 50 | struct stm32_adc_common_regs { |
| 76 | u32 csr; | 51 | u32 csr; |
| @@ -78,6 +53,8 @@ struct stm32_adc_common_regs { · 1 unmodified line | |||
| 78 | u32 eoc1_msk; | 53 | u32 eoc1_msk; |
| 79 | u32 eoc2_msk; | 54 | u32 eoc2_msk; |
| 80 | u32 eoc3_msk; | 55 | u32 eoc3_msk; |
| 56 | u32 ier; | ||
| 57 | u32 eocie_msk; | ||
| 81 | }; | 58 | }; |
| 82 | 59 | ||
| 83 | struct stm32_adc_priv; | 60 | struct stm32_adc_priv; |
| @@ -303,6 +280,8 @@ static const struct stm32_adc_common_regs stm32f4_adc_common_regs = { · 219 unmodified lines | |||
| 303 | .eoc1_msk = STM32F4_EOC1, | 280 | .eoc1_msk = STM32F4_EOC1, |
| 304 | .eoc2_msk = STM32F4_EOC2, | 281 | .eoc2_msk = STM32F4_EOC2, |
| 305 | .eoc3_msk = STM32F4_EOC3, | 282 | .eoc3_msk = STM32F4_EOC3, |
| 283 | .ier = STM32F4_ADC_CR1, | ||
| 284 | .eocie_msk = STM32F4_EOCIE, | ||
| 306 | }; | 285 | }; |
| 307 | 286 | ||
| 308 | /* STM32H7 common registers definitions */ | 287 | /* STM32H7 common registers definitions */ |
| @@ -311,8 +290,24 @@ static const struct stm32_adc_common_regs stm32h7_adc_common_regs = { · 2 unmodified lines | |||
| 311 | .ccr = STM32H7_ADC_CCR, | 290 | .ccr = STM32H7_ADC_CCR, |
| 312 | .eoc1_msk = STM32H7_EOC_MST, | 291 | .eoc1_msk = STM32H7_EOC_MST, |
| 313 | .eoc2_msk = STM32H7_EOC_SLV, | 292 | .eoc2_msk = STM32H7_EOC_SLV, |
| 293 | .ier = STM32H7_ADC_IER, | ||
| 294 | .eocie_msk = STM32H7_EOCIE, | ||
| 295 | }; | ||
| 296 | |||
| 297 | static const unsigned int stm32_adc_offset[STM32_ADC_MAX_ADCS] = { | ||
| 298 | 0, STM32_ADC_OFFSET, STM32_ADC_OFFSET * 2, | ||
| 314 | }; | 299 | }; |
| 315 | 300 | ||
| 301 | static unsigned int stm32_adc_eoc_enabled(struct stm32_adc_priv *priv, | ||
| 302 | unsigned int adc) | ||
| 303 | { | ||
| 304 | u32 ier, offset = stm32_adc_offset[adc]; | ||
| 305 | |||
| 306 | ier = readl_relaxed(priv->common.base + offset + priv->cfg->regs->ier); | ||
| 307 | |||
| 308 | return ier & priv->cfg->regs->eocie_msk; | ||
| 309 | } | ||
| 310 | |||
| 316 | /* ADC common interrupt for all instances */ | 311 | /* ADC common interrupt for all instances */ |
| 317 | static void stm32_adc_irq_handler(struct irq_desc *desc) | 312 | static void stm32_adc_irq_handler(struct irq_desc *desc) |
| 318 | { | 313 | { |
| @@ -323,13 +318,28 @@ static void stm32_adc_irq_handler(struct irq_desc *desc) · 4 unmodified lines | |||
| 323 | chained_irq_enter(chip, desc); | 318 | chained_irq_enter(chip, desc); |
| 324 | status = readl_relaxed(priv->common.base + priv->cfg->regs->csr); | 319 | status = readl_relaxed(priv->common.base + priv->cfg->regs->csr); |
| 325 | 320 | ||
| 326 | if (status & priv->cfg->regs->eoc1_msk) | 321 | /* |
| 322 | * End of conversion may be handled by using IRQ or DMA. There may be a | ||
| 323 | * race here when two conversions complete at the same time on several | ||
| 324 | * ADCs. EOC may be read 'set' for several ADCs, with: | ||
| 325 | * - an ADC configured to use DMA (EOC triggers the DMA request, and | ||
| 326 | * is then automatically cleared by DR read in hardware) | ||
| 327 | * - an ADC configured to use IRQs (EOCIE bit is set. The handler must | ||
| 328 | * be called in this case) | ||
| 329 | * So both EOC status bit in CSR and EOCIE control bit must be checked | ||
| 330 | * before invoking the interrupt handler (e.g. call ISR only for | ||
| 331 | * IRQ-enabled ADCs). | ||
| 332 | */ | ||
| 333 | if (status & priv->cfg->regs->eoc1_msk && | ||
| 334 | stm32_adc_eoc_enabled(priv, 0)) | ||
| 327 | generic_handle_irq(irq_find_mapping(priv->domain, 0)); | 335 | generic_handle_irq(irq_find_mapping(priv->domain, 0)); |
| 328 | 336 | ||
| 329 | if (status & priv->cfg->regs->eoc2_msk) | 337 | if (status & priv->cfg->regs->eoc2_msk && |
| 338 | stm32_adc_eoc_enabled(priv, 1)) | ||
| 330 | generic_handle_irq(irq_find_mapping(priv->domain, 1)); | 339 | generic_handle_irq(irq_find_mapping(priv->domain, 1)); |
| 331 | 340 | ||
| 332 | if (status & priv->cfg->regs->eoc3_msk) | 341 | if (status & priv->cfg->regs->eoc3_msk && |
| 342 | stm32_adc_eoc_enabled(priv, 2)) | ||
| 333 | generic_handle_irq(irq_find_mapping(priv->domain, 2)); | 343 | generic_handle_irq(irq_find_mapping(priv->domain, 2)); |
| 334 | 344 | ||
| 335 | chained_irq_exit(chip, desc); | 345 | chained_irq_exit(chip, desc); |
| @@ -25,8 +25,145 @@ · 24 unmodified lines | |||
| 25 | * -------------------------------------------------------- | 25 | * -------------------------------------------------------- |
| 26 | */ | 26 | */ |
| 27 | #define STM32_ADC_MAX_ADCS 3 | 27 | #define STM32_ADC_MAX_ADCS 3 |
| 28 | #define STM32_ADC_OFFSET 0x100 | ||
| 28 | #define STM32_ADCX_COMN_OFFSET 0x300 | 29 | #define STM32_ADCX_COMN_OFFSET 0x300 |
| 29 | 30 | ||
| 31 | /* STM32F4 - Registers for each ADC instance */ | ||
| 32 | #define STM32F4_ADC_SR 0x00 | ||
| 33 | #define STM32F4_ADC_CR1 0x04 | ||
| 34 | #define STM32F4_ADC_CR2 0x08 | ||
| 35 | #define STM32F4_ADC_SMPR1 0x0C | ||
| 36 | #define STM32F4_ADC_SMPR2 0x10 | ||
| 37 | #define STM32F4_ADC_HTR 0x24 | ||
| 38 | #define STM32F4_ADC_LTR 0x28 | ||
| 39 | #define STM32F4_ADC_SQR1 0x2C | ||
| 40 | #define STM32F4_ADC_SQR2 0x30 | ||
| 41 | #define STM32F4_ADC_SQR3 0x34 | ||
| 42 | #define STM32F4_ADC_JSQR 0x38 | ||
| 43 | #define STM32F4_ADC_JDR1 0x3C | ||
| 44 | #define STM32F4_ADC_JDR2 0x40 | ||
| 45 | #define STM32F4_ADC_JDR3 0x44 | ||
| 46 | #define STM32F4_ADC_JDR4 0x48 | ||
| 47 | #define STM32F4_ADC_DR 0x4C | ||
| 48 | |||
| 49 | /* STM32F4 - common registers for all ADC instances: 1, 2 & 3 */ | ||
| 50 | #define STM32F4_ADC_CSR (STM32_ADCX_COMN_OFFSET + 0x00) | ||
| 51 | #define STM32F4_ADC_CCR (STM32_ADCX_COMN_OFFSET + 0x04) | ||
| 52 | |||
| 53 | /* STM32F4_ADC_SR - bit fields */ | ||
| 54 | #define STM32F4_STRT BIT(4) | ||
| 55 | #define STM32F4_EOC BIT(1) | ||
| 56 | |||
| 57 | /* STM32F4_ADC_CR1 - bit fields */ | ||
| 58 | #define STM32F4_RES_SHIFT 24 | ||
| 59 | #define STM32F4_RES_MASK GENMASK(25, 24) | ||
| 60 | #define STM32F4_SCAN BIT(8) | ||
| 61 | #define STM32F4_EOCIE BIT(5) | ||
| 62 | |||
| 63 | /* STM32F4_ADC_CR2 - bit fields */ | ||
| 64 | #define STM32F4_SWSTART BIT(30) | ||
| 65 | #define STM32F4_EXTEN_SHIFT 28 | ||
| 66 | #define STM32F4_EXTEN_MASK GENMASK(29, 28) | ||
| 67 | #define STM32F4_EXTSEL_SHIFT 24 | ||
| 68 | #define STM32F4_EXTSEL_MASK GENMASK(27, 24) | ||
| 69 | #define STM32F4_EOCS BIT(10) | ||
| 70 | #define STM32F4_DDS BIT(9) | ||
| 71 | #define STM32F4_DMA BIT(8) | ||
| 72 | #define STM32F4_ADON BIT(0) | ||
| 73 | |||
| 74 | /* STM32F4_ADC_CSR - bit fields */ | ||
| 75 | #define STM32F4_EOC3 BIT(17) | ||
| 76 | #define STM32F4_EOC2 BIT(9) | ||
| 77 | #define STM32F4_EOC1 BIT(1) | ||
| 78 | |||
| 79 | /* STM32F4_ADC_CCR - bit fields */ | ||
| 80 | #define STM32F4_ADC_ADCPRE_SHIFT 16 | ||
| 81 | #define STM32F4_ADC_ADCPRE_MASK GENMASK(17, 16) | ||
| 82 | |||
| 83 | /* STM32H7 - Registers for each ADC instance */ | ||
| 84 | #define STM32H7_ADC_ISR 0x00 | ||
| 85 | #define STM32H7_ADC_IER 0x04 | ||
| 86 | #define STM32H7_ADC_CR 0x08 | ||
| 87 | #define STM32H7_ADC_CFGR 0x0C | ||
| 88 | #define STM32H7_ADC_SMPR1 0x14 | ||
| 89 | #define STM32H7_ADC_SMPR2 0x18 | ||
| 90 | #define STM32H7_ADC_PCSEL 0x1C | ||
| 91 | #define STM32H7_ADC_SQR1 0x30 | ||
| 92 | #define STM32H7_ADC_SQR2 0x34 | ||
| 93 | #define STM32H7_ADC_SQR3 0x38 | ||
| 94 | #define STM32H7_ADC_SQR4 0x3C | ||
| 95 | #define STM32H7_ADC_DR 0x40 | ||
| 96 | #define STM32H7_ADC_DIFSEL 0xC0 | ||
| 97 | #define STM32H7_ADC_CALFACT 0xC4 | ||
| 98 | #define STM32H7_ADC_CALFACT2 0xC8 | ||
| 99 | |||
| 100 | /* STM32H7 - common registers for all ADC instances */ | ||
| 101 | #define STM32H7_ADC_CSR (STM32_ADCX_COMN_OFFSET + 0x00) | ||
| 102 | #define STM32H7_ADC_CCR (STM32_ADCX_COMN_OFFSET + 0x08) | ||
| 103 | |||
| 104 | /* STM32H7_ADC_ISR - bit fields */ | ||
| 105 | #define STM32MP1_VREGREADY BIT(12) | ||
| 106 | #define STM32H7_EOC BIT(2) | ||
| 107 | #define STM32H7_ADRDY BIT(0) | ||
| 108 | |||
| 109 | /* STM32H7_ADC_IER - bit fields */ | ||
| 110 | #define STM32H7_EOCIE STM32H7_EOC | ||
| 111 | |||
| 112 | /* STM32H7_ADC_CR - bit fields */ | ||
| 113 | #define STM32H7_ADCAL BIT(31) | ||
| 114 | #define STM32H7_ADCALDIF BIT(30) | ||
| 115 | #define STM32H7_DEEPPWD BIT(29) | ||
| 116 | #define STM32H7_ADVREGEN BIT(28) | ||
| 117 | #define STM32H7_LINCALRDYW6 BIT(27) | ||
| 118 | #define STM32H7_LINCALRDYW5 BIT(26) | ||
| 119 | #define STM32H7_LINCALRDYW4 BIT(25) | ||
| 120 | #define STM32H7_LINCALRDYW3 BIT(24) | ||
| 121 | #define STM32H7_LINCALRDYW2 BIT(23) | ||
| 122 | #define STM32H7_LINCALRDYW1 BIT(22) | ||
| 123 | #define STM32H7_ADCALLIN BIT(16) | ||
| 124 | #define STM32H7_BOOST BIT(8) | ||
| 125 | #define STM32H7_ADSTP BIT(4) | ||
| 126 | #define STM32H7_ADSTART BIT(2) | ||
| 127 | #define STM32H7_ADDIS BIT(1) | ||
| 128 | #define STM32H7_ADEN BIT(0) | ||
| 129 | |||
| 130 | /* STM32H7_ADC_CFGR bit fields */ | ||
| 131 | #define STM32H7_EXTEN_SHIFT 10 | ||
| 132 | #define STM32H7_EXTEN_MASK GENMASK(11, 10) | ||
| 133 | #define STM32H7_EXTSEL_SHIFT 5 | ||
| 134 | #define STM32H7_EXTSEL_MASK GENMASK(9, 5) | ||
| 135 | #define STM32H7_RES_SHIFT 2 | ||
| 136 | #define STM32H7_RES_MASK GENMASK(4, 2) | ||
| 137 | #define STM32H7_DMNGT_SHIFT 0 | ||
| 138 | #define STM32H7_DMNGT_MASK GENMASK(1, 0) | ||
| 139 | |||
| 140 | enum stm32h7_adc_dmngt { | ||
| 141 | STM32H7_DMNGT_DR_ONLY, /* Regular data in DR only */ | ||
| 142 | STM32H7_DMNGT_DMA_ONESHOT, /* DMA one shot mode */ | ||
| 143 | STM32H7_DMNGT_DFSDM, /* DFSDM mode */ | ||
| 144 | STM32H7_DMNGT_DMA_CIRC, /* DMA circular mode */ | ||
| 145 | }; | ||
| 146 | |||
| 147 | /* STM32H7_ADC_CALFACT - bit fields */ | ||
| 148 | #define STM32H7_CALFACT_D_SHIFT 16 | ||
| 149 | #define STM32H7_CALFACT_D_MASK GENMASK(26, 16) | ||
| 150 | #define STM32H7_CALFACT_S_SHIFT 0 | ||
| 151 | #define STM32H7_CALFACT_S_MASK GENMASK(10, 0) | ||
| 152 | |||
| 153 | /* STM32H7_ADC_CALFACT2 - bit fields */ | ||
| 154 | #define STM32H7_LINCALFACT_SHIFT 0 | ||
| 155 | #define STM32H7_LINCALFACT_MASK GENMASK(29, 0) | ||
| 156 | |||
| 157 | /* STM32H7_ADC_CSR - bit fields */ | ||
| 158 | #define STM32H7_EOC_SLV BIT(18) | ||
| 159 | #define STM32H7_EOC_MST BIT(2) | ||
| 160 | |||
| 161 | /* STM32H7_ADC_CCR - bit fields */ | ||
| 162 | #define STM32H7_PRESC_SHIFT 18 | ||
| 163 | #define STM32H7_PRESC_MASK GENMASK(21, 18) | ||
| 164 | #define STM32H7_CKMODE_SHIFT 16 | ||
| 165 | #define STM32H7_CKMODE_MASK GENMASK(17, 16) | ||
| 166 | |||
| 30 | /** | 167 | /** |
| 31 | * struct stm32_adc_common - stm32 ADC driver common data (for all instances) | 168 | * struct stm32_adc_common - stm32 ADC driver common data (for all instances) |
| 32 | * @base: control registers base cpu addr | 169 | * @base: control registers base cpu addr |
| @@ -28,115 +28,6 @@ · 27 unmodified lines | |||
| 28 | 28 | ||
| 29 | #include "stm32-adc-core.h" | 29 | #include "stm32-adc-core.h" |
| 30 | 30 | ||
| 31 | /* STM32F4 - Registers for each ADC instance */ | ||
| 32 | #define STM32F4_ADC_SR 0x00 | ||
| 33 | #define STM32F4_ADC_CR1 0x04 | ||
| 34 | #define STM32F4_ADC_CR2 0x08 | ||
| 35 | #define STM32F4_ADC_SMPR1 0x0C | ||
| 36 | #define STM32F4_ADC_SMPR2 0x10 | ||
| 37 | #define STM32F4_ADC_HTR 0x24 | ||
| 38 | #define STM32F4_ADC_LTR 0x28 | ||
| 39 | #define STM32F4_ADC_SQR1 0x2C | ||
| 40 | #define STM32F4_ADC_SQR2 0x30 | ||
| 41 | #define STM32F4_ADC_SQR3 0x34 | ||
| 42 | #define STM32F4_ADC_JSQR 0x38 | ||
| 43 | #define STM32F4_ADC_JDR1 0x3C | ||
| 44 | #define STM32F4_ADC_JDR2 0x40 | ||
| 45 | #define STM32F4_ADC_JDR3 0x44 | ||
| 46 | #define STM32F4_ADC_JDR4 0x48 | ||
| 47 | #define STM32F4_ADC_DR 0x4C | ||
| 48 | |||
| 49 | /* STM32F4_ADC_SR - bit fields */ | ||
| 50 | #define STM32F4_STRT BIT(4) | ||
| 51 | #define STM32F4_EOC BIT(1) | ||
| 52 | |||
| 53 | /* STM32F4_ADC_CR1 - bit fields */ | ||
| 54 | #define STM32F4_RES_SHIFT 24 | ||
| 55 | #define STM32F4_RES_MASK GENMASK(25, 24) | ||
| 56 | #define STM32F4_SCAN BIT(8) | ||
| 57 | #define STM32F4_EOCIE BIT(5) | ||
| 58 | |||
| 59 | /* STM32F4_ADC_CR2 - bit fields */ | ||
| 60 | #define STM32F4_SWSTART BIT(30) | ||
| 61 | #define STM32F4_EXTEN_SHIFT 28 | ||
| 62 | #define STM32F4_EXTEN_MASK GENMASK(29, 28) | ||
| 63 | #define STM32F4_EXTSEL_SHIFT 24 | ||
| 64 | #define STM32F4_EXTSEL_MASK GENMASK(27, 24) | ||
| 65 | #define STM32F4_EOCS BIT(10) | ||
| 66 | #define STM32F4_DDS BIT(9) | ||
| 67 | #define STM32F4_DMA BIT(8) | ||
| 68 | #define STM32F4_ADON BIT(0) | ||
| 69 | |||
| 70 | /* STM32H7 - Registers for each ADC instance */ | ||
| 71 | #define STM32H7_ADC_ISR 0x00 | ||
| 72 | #define STM32H7_ADC_IER 0x04 | ||
| 73 | #define STM32H7_ADC_CR 0x08 | ||
| 74 | #define STM32H7_ADC_CFGR 0x0C | ||
| 75 | #define STM32H7_ADC_SMPR1 0x14 | ||
| 76 | #define STM32H7_ADC_SMPR2 0x18 | ||
| 77 | #define STM32H7_ADC_PCSEL 0x1C | ||
| 78 | #define STM32H7_ADC_SQR1 0x30 | ||
| 79 | #define STM32H7_ADC_SQR2 0x34 | ||
| 80 | #define STM32H7_ADC_SQR3 0x38 | ||
| 81 | #define STM32H7_ADC_SQR4 0x3C | ||
| 82 | #define STM32H7_ADC_DR 0x40 | ||
| 83 | #define STM32H7_ADC_DIFSEL 0xC0 | ||
| 84 | #define STM32H7_ADC_CALFACT 0xC4 | ||
| 85 | #define STM32H7_ADC_CALFACT2 0xC8 | ||
| 86 | |||
| 87 | /* STM32H7_ADC_ISR - bit fields */ | ||
| 88 | #define STM32MP1_VREGREADY BIT(12) | ||
| 89 | #define STM32H7_EOC BIT(2) | ||
| 90 | #define STM32H7_ADRDY BIT(0) | ||
| 91 | |||
| 92 | /* STM32H7_ADC_IER - bit fields */ | ||
| 93 | #define STM32H7_EOCIE STM32H7_EOC | ||
| 94 | |||
| 95 | /* STM32H7_ADC_CR - bit fields */ | ||
| 96 | #define STM32H7_ADCAL BIT(31) | ||
| 97 | #define STM32H7_ADCALDIF BIT(30) | ||
| 98 | #define STM32H7_DEEPPWD BIT(29) | ||
| 99 | #define STM32H7_ADVREGEN BIT(28) | ||
| 100 | #define STM32H7_LINCALRDYW6 BIT(27) | ||
| 101 | #define STM32H7_LINCALRDYW5 BIT(26) | ||
| 102 | #define STM32H7_LINCALRDYW4 BIT(25) | ||
| 103 | #define STM32H7_LINCALRDYW3 BIT(24) | ||
| 104 | #define STM32H7_LINCALRDYW2 BIT(23) | ||
| 105 | #define STM32H7_LINCALRDYW1 BIT(22) | ||
| 106 | #define STM32H7_ADCALLIN BIT(16) | ||
| 107 | #define STM32H7_BOOST BIT(8) | ||
| 108 | #define STM32H7_ADSTP BIT(4) | ||
| 109 | #define STM32H7_ADSTART BIT(2) | ||
| 110 | #define STM32H7_ADDIS BIT(1) | ||
| 111 | #define STM32H7_ADEN BIT(0) | ||
| 112 | |||
| 113 | /* STM32H7_ADC_CFGR bit fields */ | ||
| 114 | #define STM32H7_EXTEN_SHIFT 10 | ||
| 115 | #define STM32H7_EXTEN_MASK GENMASK(11, 10) | ||
| 116 | #define STM32H7_EXTSEL_SHIFT 5 | ||
| 117 | #define STM32H7_EXTSEL_MASK GENMASK(9, 5) | ||
| 118 | #define STM32H7_RES_SHIFT 2 | ||
| 119 | #define STM32H7_RES_MASK GENMASK(4, 2) | ||
| 120 | #define STM32H7_DMNGT_SHIFT 0 | ||
| 121 | #define STM32H7_DMNGT_MASK GENMASK(1, 0) | ||
| 122 | |||
| 123 | enum stm32h7_adc_dmngt { | ||
| 124 | STM32H7_DMNGT_DR_ONLY, /* Regular data in DR only */ | ||
| 125 | STM32H7_DMNGT_DMA_ONESHOT, /* DMA one shot mode */ | ||
| 126 | STM32H7_DMNGT_DFSDM, /* DFSDM mode */ | ||
| 127 | STM32H7_DMNGT_DMA_CIRC, /* DMA circular mode */ | ||
| 128 | }; | ||
| 129 | |||
| 130 | /* STM32H7_ADC_CALFACT - bit fields */ | ||
| 131 | #define STM32H7_CALFACT_D_SHIFT 16 | ||
| 132 | #define STM32H7_CALFACT_D_MASK GENMASK(26, 16) | ||
| 133 | #define STM32H7_CALFACT_S_SHIFT 0 | ||
| 134 | #define STM32H7_CALFACT_S_MASK GENMASK(10, 0) | ||
| 135 | |||
| 136 | /* STM32H7_ADC_CALFACT2 - bit fields */ | ||
| 137 | #define STM32H7_LINCALFACT_SHIFT 0 | ||
| 138 | #define STM32H7_LINCALFACT_MASK GENMASK(29, 0) | ||
| 139 | |||
| 140 | /* Number of linear calibration shadow registers / LINCALRDYW control bits */ | 31 | /* Number of linear calibration shadow registers / LINCALRDYW control bits */ |
| 141 | #define STM32H7_LINCALFACT_NUM 6 | 32 | #define STM32H7_LINCALFACT_NUM 6 |
| 142 | 33 | ||
| @@ -35,8 +35,11 @@ static int adis_update_scan_mode_burst(struct iio_dev *indio_dev, · 34 unmodified lines | |||
| 35 | return -ENOMEM; | 35 | return -ENOMEM; |
| 36 | 36 | ||
| 37 | adis->buffer = kzalloc(burst_length + sizeof(u16), GFP_KERNEL); | 37 | adis->buffer = kzalloc(burst_length + sizeof(u16), GFP_KERNEL); |
| 38 | if (!adis->buffer) | 38 | if (!adis->buffer) { |
| 39 | kfree(adis->xfer); | ||
| 40 | adis->xfer = NULL; | ||
| 39 | return -ENOMEM; | 41 | return -ENOMEM; |
| 42 | } | ||
| 40 | 43 | ||
| 41 | tx = adis->buffer + burst_length; | 44 | tx = adis->buffer + burst_length; |
| 42 | tx[0] = ADIS_READ_REG(adis->burst->reg_cmd); | 45 | tx[0] = ADIS_READ_REG(adis->burst->reg_cmd); |
| @@ -78,8 +81,11 @@ int adis_update_scan_mode(struct iio_dev *indio_dev, · 35 unmodified lines | |||
| 78 | return -ENOMEM; | 81 | return -ENOMEM; |
| 79 | 82 | ||
| 80 | adis->buffer = kcalloc(indio_dev->scan_bytes, 2, GFP_KERNEL); | 83 | adis->buffer = kcalloc(indio_dev->scan_bytes, 2, GFP_KERNEL); |
| 81 | if (!adis->buffer) | 84 | if (!adis->buffer) { |
| 85 | kfree(adis->xfer); | ||
| 86 | adis->xfer = NULL; | ||
| 82 | return -ENOMEM; | 87 | return -ENOMEM; |
| 88 | } | ||
| 83 | 89 | ||
| 84 | rx = adis->buffer; | 90 | rx = adis->buffer; |
| 85 | tx = rx + scan_count; | 91 | tx = rx + scan_count; |
| @@ -99,7 +99,9 @@ struct st_lsm6dsx_fs { · 98 unmodified lines | |||
| 99 | #define ST_LSM6DSX_FS_LIST_SIZE 4 | 99 | #define ST_LSM6DSX_FS_LIST_SIZE 4 |
| 100 | struct st_lsm6dsx_fs_table_entry { | 100 | struct st_lsm6dsx_fs_table_entry { |
| 101 | struct st_lsm6dsx_reg reg; | 101 | struct st_lsm6dsx_reg reg; |
| 102 | |||
| 102 | struct st_lsm6dsx_fs fs_avl[ST_LSM6DSX_FS_LIST_SIZE]; | 103 | struct st_lsm6dsx_fs fs_avl[ST_LSM6DSX_FS_LIST_SIZE]; |
| 104 | int fs_len; | ||
| 103 | }; | 105 | }; |
| 104 | 106 | ||
| 105 | /** | 107 | /** |
| @@ -145,6 +145,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 144 unmodified lines | |||
| 145 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, | 145 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, |
| 146 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, | 146 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, |
| 147 | .fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 }, | 147 | .fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 }, |
| 148 | .fs_len = 4, | ||
| 148 | }, | 149 | }, |
| 149 | [ST_LSM6DSX_ID_GYRO] = { | 150 | [ST_LSM6DSX_ID_GYRO] = { |
| 150 | .reg = { | 151 | .reg = { |
| @@ -154,6 +155,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 3 unmodified lines | |||
| 154 | .fs_avl[0] = { IIO_DEGREE_TO_RAD(245), 0x0 }, | 155 | .fs_avl[0] = { IIO_DEGREE_TO_RAD(245), 0x0 }, |
| 155 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(500), 0x1 }, | 156 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(500), 0x1 }, |
| 156 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(2000), 0x3 }, | 157 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(2000), 0x3 }, |
| 158 | .fs_len = 3, | ||
| 157 | }, | 159 | }, |
| 158 | }, | 160 | }, |
| 159 | }, | 161 | }, |
| @@ -215,6 +217,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 55 unmodified lines | |||
| 215 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, | 217 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, |
| 216 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, | 218 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, |
| 217 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, | 219 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, |
| 220 | .fs_len = 4, | ||
| 218 | }, | 221 | }, |
| 219 | [ST_LSM6DSX_ID_GYRO] = { | 222 | [ST_LSM6DSX_ID_GYRO] = { |
| 220 | .reg = { | 223 | .reg = { |
| @@ -225,6 +228,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 4 unmodified lines | |||
| 225 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, | 228 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, |
| 226 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, | 229 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, |
| 227 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, | 230 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, |
| 231 | .fs_len = 4, | ||
| 228 | }, | 232 | }, |
| 229 | }, | 233 | }, |
| 230 | .decimator = { | 234 | .decimator = { |
| @@ -327,6 +331,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 96 unmodified lines | |||
| 327 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, | 331 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, |
| 328 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, | 332 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, |
| 329 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, | 333 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, |
| 334 | .fs_len = 4, | ||
| 330 | }, | 335 | }, |
| 331 | [ST_LSM6DSX_ID_GYRO] = { | 336 | [ST_LSM6DSX_ID_GYRO] = { |
| 332 | .reg = { | 337 | .reg = { |
| @@ -337,6 +342,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 4 unmodified lines | |||
| 337 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, | 342 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, |
| 338 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, | 343 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, |
| 339 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, | 344 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, |
| 345 | .fs_len = 4, | ||
| 340 | }, | 346 | }, |
| 341 | }, | 347 | }, |
| 342 | .decimator = { | 348 | .decimator = { |
| @@ -448,6 +454,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 105 unmodified lines | |||
| 448 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, | 454 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, |
| 449 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, | 455 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, |
| 450 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, | 456 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, |
| 457 | .fs_len = 4, | ||
| 451 | }, | 458 | }, |
| 452 | [ST_LSM6DSX_ID_GYRO] = { | 459 | [ST_LSM6DSX_ID_GYRO] = { |
| 453 | .reg = { | 460 | .reg = { |
| @@ -458,6 +465,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 4 unmodified lines | |||
| 458 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, | 465 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, |
| 459 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, | 466 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, |
| 460 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, | 467 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, |
| 468 | .fs_len = 4, | ||
| 461 | }, | 469 | }, |
| 462 | }, | 470 | }, |
| 463 | .decimator = { | 471 | .decimator = { |
| @@ -563,6 +571,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 99 unmodified lines | |||
| 563 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, | 571 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, |
| 564 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, | 572 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, |
| 565 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, | 573 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, |
| 574 | .fs_len = 4, | ||
| 566 | }, | 575 | }, |
| 567 | [ST_LSM6DSX_ID_GYRO] = { | 576 | [ST_LSM6DSX_ID_GYRO] = { |
| 568 | .reg = { | 577 | .reg = { |
| @@ -573,6 +582,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 4 unmodified lines | |||
| 573 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, | 582 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, |
| 574 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, | 583 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, |
| 575 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, | 584 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, |
| 585 | .fs_len = 4, | ||
| 576 | }, | 586 | }, |
| 577 | }, | 587 | }, |
| 578 | .batch = { | 588 | .batch = { |
| @@ -693,6 +703,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 114 unmodified lines | |||
| 693 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, | 703 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, |
| 694 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, | 704 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, |
| 695 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, | 705 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, |
| 706 | .fs_len = 4, | ||
| 696 | }, | 707 | }, |
| 697 | [ST_LSM6DSX_ID_GYRO] = { | 708 | [ST_LSM6DSX_ID_GYRO] = { |
| 698 | .reg = { | 709 | .reg = { |
| @@ -703,6 +714,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 4 unmodified lines | |||
| 703 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, | 714 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, |
| 704 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, | 715 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, |
| 705 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, | 716 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, |
| 717 | .fs_len = 4, | ||
| 706 | }, | 718 | }, |
| 707 | }, | 719 | }, |
| 708 | .batch = { | 720 | .batch = { |
| @@ -800,6 +812,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 91 unmodified lines | |||
| 800 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, | 812 | .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, |
| 801 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, | 813 | .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, |
| 802 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, | 814 | .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, |
| 815 | .fs_len = 4, | ||
| 803 | }, | 816 | }, |
| 804 | [ST_LSM6DSX_ID_GYRO] = { | 817 | [ST_LSM6DSX_ID_GYRO] = { |
| 805 | .reg = { | 818 | .reg = { |
| @@ -810,6 +823,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { · 4 unmodified lines | |||
| 810 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, | 823 | .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, |
| 811 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, | 824 | .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, |
| 812 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, | 825 | .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, |
| 826 | .fs_len = 4, | ||
| 813 | }, | 827 | }, |
| 814 | }, | 828 | }, |
| 815 | .batch = { | 829 | .batch = { |
| @@ -933,11 +947,12 @@ static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, · 117 unmodified lines | |||
| 933 | int i, err; | 947 | int i, err; |
| 934 | 948 | ||
| 935 | fs_table = &sensor->hw->settings->fs_table[sensor->id]; | 949 | fs_table = &sensor->hw->settings->fs_table[sensor->id]; |
| 936 | for (i = 0; i < ST_LSM6DSX_FS_LIST_SIZE; i++) | 950 | for (i = 0; i < fs_table->fs_len; i++) { |
| 937 | if (fs_table->fs_avl[i].gain == gain) | 951 | if (fs_table->fs_avl[i].gain == gain) |
| 938 | break; | 952 | break; |
| 953 | } | ||
| 939 | 954 | ||
| 940 | if (i == ST_LSM6DSX_FS_LIST_SIZE) | 955 | if (i == fs_table->fs_len) |
| 941 | return -EINVAL; | 956 | return -EINVAL; |
| 942 | 957 | ||
| 943 | data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val, | 958 | data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val, |
| @@ -1196,18 +1211,13 @@ static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev, · 252 unmodified lines | |||
| 1196 | { | 1211 | { |
| 1197 | struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); | 1212 | struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); |
| 1198 | const struct st_lsm6dsx_fs_table_entry *fs_table; | 1213 | const struct st_lsm6dsx_fs_table_entry *fs_table; |
| 1199 | enum st_lsm6dsx_sensor_id id = sensor->id; | ||
| 1200 | struct st_lsm6dsx_hw *hw = sensor->hw; | 1214 | struct st_lsm6dsx_hw *hw = sensor->hw; |
| 1201 | int i, len = 0; | 1215 | int i, len = 0; |
| 1202 | 1216 | ||
| 1203 | fs_table = &hw->settings->fs_table[id]; | 1217 | fs_table = &hw->settings->fs_table[sensor->id]; |
| 1204 | for (i = 0; i < ST_LSM6DSX_FS_LIST_SIZE; i++) { | 1218 | for (i = 0; i < fs_table->fs_len; i++) |
| 1205 | if (!fs_table->fs_avl[i].gain) | ||
| 1206 | break; | ||
| 1207 | |||
| 1208 | len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ", | 1219 | len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ", |
| 1209 | fs_table->fs_avl[i].gain); | 1220 | fs_table->fs_avl[i].gain); |
| 1210 | } | ||
| 1211 | buf[len - 1] = '\n'; | 1221 | buf[len - 1] = '\n'; |
| 1212 | 1222 | ||
| 1213 | return len; | 1223 | return len; |
| @@ -61,6 +61,7 @@ static const struct st_lsm6dsx_ext_dev_settings st_lsm6dsx_ext_dev_table[] = { · 60 unmodified lines | |||
| 61 | .gain = 1500, | 61 | .gain = 1500, |
| 62 | .val = 0x0, | 62 | .val = 0x0, |
| 63 | }, /* 1500 uG/LSB */ | 63 | }, /* 1500 uG/LSB */ |
| 64 | .fs_len = 1, | ||
| 64 | }, | 65 | }, |
| 65 | .temp_comp = { | 66 | .temp_comp = { |
| 66 | .addr = 0x60, | 67 | .addr = 0x60, |
| @@ -92,9 +93,11 @@ static const struct st_lsm6dsx_ext_dev_settings st_lsm6dsx_ext_dev_table[] = { · 25 unmodified lines | |||
| 92 | static void st_lsm6dsx_shub_wait_complete(struct st_lsm6dsx_hw *hw) | 93 | static void st_lsm6dsx_shub_wait_complete(struct st_lsm6dsx_hw *hw) |
| 93 | { | 94 | { |
| 94 | struct st_lsm6dsx_sensor *sensor; | 95 | struct st_lsm6dsx_sensor *sensor; |
| 96 | u16 odr; | ||
| 95 | 97 | ||
| 96 | sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); | 98 | sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); |
| 97 | msleep((2000U / sensor->odr) + 1); | 99 | odr = (hw->enable_mask & BIT(ST_LSM6DSX_ID_ACC)) ? sensor->odr : 13; |
| 100 | msleep((2000U / odr) + 1); | ||
| 98 | } | 101 | } |
| 99 | 102 | ||
| 100 | /** | 103 | /** |
| @@ -555,13 +558,9 @@ static ssize_t st_lsm6dsx_shub_scale_avail(struct device *dev, · 454 unmodified lines | |||
| 555 | int i, len = 0; | 558 | int i, len = 0; |
| 556 | 559 | ||
| 557 | settings = sensor->ext_info.settings; | 560 | settings = sensor->ext_info.settings; |
| 558 | for (i = 0; i < ST_LSM6DSX_FS_LIST_SIZE; i++) { | 561 | for (i = 0; i < settings->fs_table.fs_len; i++) |
| 559 | u16 val = settings->fs_table.fs_avl[i].gain; | 562 | len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ", |
| 560 | 563 | settings->fs_table.fs_avl[i].gain); | |
| 561 | if (val > 0) | ||
| 562 | len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ", | ||
| 563 | val); | ||
| 564 | } | ||
| 565 | buf[len - 1] = '\n'; | 564 | buf[len - 1] = '\n'; |
| 566 | 565 | ||
| 567 | return len; | 566 | return len; |
| @@ -314,6 +314,7 @@ config MAX44009 · 313 unmodified lines | |||
| 314 | config NOA1305 | 314 | config NOA1305 |
| 315 | tristate "ON Semiconductor NOA1305 ambient light sensor" | 315 | tristate "ON Semiconductor NOA1305 ambient light sensor" |
| 316 | depends on I2C | 316 | depends on I2C |
| 317 | select REGMAP_I2C | ||
| 317 | help | 318 | help |
| 318 | Say Y here if you want to build support for the ON Semiconductor | 319 | Say Y here if you want to build support for the ON Semiconductor |
| 319 | NOA1305 ambient light sensor. | 320 | NOA1305 ambient light sensor. |
| @@ -686,6 +686,7 @@ static irqreturn_t opt3001_irq(int irq, void *_iio) · 685 unmodified lines | |||
| 686 | struct iio_dev *iio = _iio; | 686 | struct iio_dev *iio = _iio; |
| 687 | struct opt3001 *opt = iio_priv(iio); | 687 | struct opt3001 *opt = iio_priv(iio); |
| 688 | int ret; | 688 | int ret; |
| 689 | bool wake_result_ready_queue = false; | ||
| 689 | 690 | ||
| 690 | if (!opt->ok_to_ignore_lock) | 691 | if (!opt->ok_to_ignore_lock) |
| 691 | mutex_lock(&opt->lock); | 692 | mutex_lock(&opt->lock); |
| @@ -720,13 +721,16 @@ static irqreturn_t opt3001_irq(int irq, void *_iio) · 28 unmodified lines | |||
| 720 | } | 721 | } |
| 721 | opt->result = ret; | 722 | opt->result = ret; |
| 722 | opt->result_ready = true; | 723 | opt->result_ready = true; |
| 723 | wake_up(&opt->result_ready_queue); | 724 | wake_result_ready_queue = true; |
| 724 | } | 725 | } |
| 725 | 726 | ||
| 726 | out: | 727 | out: |
| 727 | if (!opt->ok_to_ignore_lock) | 728 | if (!opt->ok_to_ignore_lock) |
| 728 | mutex_unlock(&opt->lock); | 729 | mutex_unlock(&opt->lock); |
| 729 | 730 | ||
| 731 | if (wake_result_ready_queue) | ||
| 732 | wake_up(&opt->result_ready_queue); | ||
| 733 | |||
| 730 | return IRQ_HANDLED; | 734 | return IRQ_HANDLED; |
| 731 | } | 735 | } |
| 732 | 736 | ||
| @@ -398,19 +398,23 @@ static int vcnl4000_probe(struct i2c_client *client, · 397 unmodified lines | |||
| 398 | static const struct of_device_id vcnl_4000_of_match[] = { | 398 | static const struct of_device_id vcnl_4000_of_match[] = { |
| 399 | { | 399 | { |
| 400 | .compatible = "vishay,vcnl4000", | 400 | .compatible = "vishay,vcnl4000", |
| 401 | .data = "VCNL4000", | 401 | .data = (void *)VCNL4000, |
| 402 | }, | 402 | }, |
| 403 | { | 403 | { |
| 404 | .compatible = "vishay,vcnl4010", | 404 | .compatible = "vishay,vcnl4010", |
| 405 | .data = "VCNL4010", | 405 | .data = (void *)VCNL4010, |
| 406 | }, | 406 | }, |
| 407 | { | 407 | { |
| 408 | .compatible = "vishay,vcnl4010", | 408 | .compatible = "vishay,vcnl4020", |
| 409 | .data = "VCNL4020", | 409 | .data = (void *)VCNL4010, |
| 410 | }, | ||
| 411 | { | ||
| 412 | .compatible = "vishay,vcnl4040", | ||
| 413 | .data = (void *)VCNL4040, | ||
| 410 | }, | 414 | }, |
| 411 | { | 415 | { |
| 412 | .compatible = "vishay,vcnl4200", | 416 | .compatible = "vishay,vcnl4200", |
| 413 | .data = "VCNL4200", | 417 | .data = (void *)VCNL4200, |
| 414 | }, | 418 | }, |
| 415 | {}, | 419 | {}, |
| 416 | }; | 420 | }; |
| @@ -4399,6 +4399,7 @@ error2: · 4398 unmodified lines | |||
| 4399 | error1: | 4399 | error1: |
| 4400 | port_modify.set_port_cap_mask = 0; | 4400 | port_modify.set_port_cap_mask = 0; |
| 4401 | port_modify.clr_port_cap_mask = IB_PORT_CM_SUP; | 4401 | port_modify.clr_port_cap_mask = IB_PORT_CM_SUP; |
| 4402 | kfree(port); | ||
| 4402 | while (--i) { | 4403 | while (--i) { |
| 4403 | if (!rdma_cap_ib_cm(ib_device, i)) | 4404 | if (!rdma_cap_ib_cm(ib_device, i)) |
| 4404 | continue; | 4405 | continue; |
| @@ -4407,6 +4408,7 @@ error1: · 2 unmodified lines | |||
| 4407 | ib_modify_port(ib_device, port->port_num, 0, &port_modify); | 4408 | ib_modify_port(ib_device, port->port_num, 0, &port_modify); |
| 4408 | ib_unregister_mad_agent(port->mad_agent); | 4409 | ib_unregister_mad_agent(port->mad_agent); |
| 4409 | cm_remove_port_fs(port); | 4410 | cm_remove_port_fs(port); |
| 4411 | kfree(port); | ||
| 4410 | } | 4412 | } |
| 4411 | free: | 4413 | free: |
| 4412 | kfree(cm_dev); | 4414 | kfree(cm_dev); |
| @@ -4460,6 +4462,7 @@ static void cm_remove_one(struct ib_device *ib_device, void *client_data) · 47 unmodified lines | |||
| 4460 | spin_unlock_irq(&cm.state_lock); | 4462 | spin_unlock_irq(&cm.state_lock); |
| 4461 | ib_unregister_mad_agent(cur_mad_agent); | 4463 | ib_unregister_mad_agent(cur_mad_agent); |
| 4462 | cm_remove_port_fs(port); | 4464 | cm_remove_port_fs(port); |
| 4465 | kfree(port); | ||
| 4463 | } | 4466 | } |
| 4464 | 4467 | ||
| 4465 | kfree(cm_dev); | 4468 | kfree(cm_dev); |
| @@ -2396,9 +2396,10 @@ static int iw_conn_req_handler(struct iw_cm_id *cm_id, · 2395 unmodified lines | |||
| 2396 | conn_id->cm_id.iw = NULL; | 2396 | conn_id->cm_id.iw = NULL; |
| 2397 | cma_exch(conn_id, RDMA_CM_DESTROYING); | 2397 | cma_exch(conn_id, RDMA_CM_DESTROYING); |
| 2398 | mutex_unlock(&conn_id->handler_mutex); | 2398 | mutex_unlock(&conn_id->handler_mutex); |
| 2399 | mutex_unlock(&listen_id->handler_mutex); | ||
| 2399 | cma_deref_id(conn_id); | 2400 | cma_deref_id(conn_id); |
| 2400 | rdma_destroy_id(&conn_id->id); | 2401 | rdma_destroy_id(&conn_id->id); |
| 2401 | goto out; | 2402 | return ret; |
| 2402 | } | 2403 | } |
| 2403 | 2404 | ||
| 2404 | mutex_unlock(&conn_id->handler_mutex); | 2405 | mutex_unlock(&conn_id->handler_mutex); |
| @@ -1987,8 +1987,6 @@ static int iw_query_port(struct ib_device *device, · 1986 unmodified lines | |||
| 1987 | if (!netdev) | 1987 | if (!netdev) |
| 1988 | return -ENODEV; | 1988 | return -ENODEV; |
| 1989 | 1989 | ||
| 1990 | dev_put(netdev); | ||
| 1991 | |||
| 1992 | port_attr->max_mtu = IB_MTU_4096; | 1990 | port_attr->max_mtu = IB_MTU_4096; |
| 1993 | port_attr->active_mtu = ib_mtu_int_to_enum(netdev->mtu); | 1991 | port_attr->active_mtu = ib_mtu_int_to_enum(netdev->mtu); |
| 1994 | 1992 | ||
| @@ -1996,19 +1994,22 @@ static int iw_query_port(struct ib_device *device, · 1 unmodified line | |||
| 1996 | port_attr->state = IB_PORT_DOWN; | 1994 | port_attr->state = IB_PORT_DOWN; |
| 1997 | port_attr->phys_state = IB_PORT_PHYS_STATE_DISABLED; | 1995 | port_attr->phys_state = IB_PORT_PHYS_STATE_DISABLED; |
| 1998 | } else { | 1996 | } else { |
| 1999 | inetdev = in_dev_get(netdev); | 1997 | rcu_read_lock(); |
| 1998 | inetdev = __in_dev_get_rcu(netdev); | ||
| 2000 | 1999 | ||
| 2001 | if (inetdev && inetdev->ifa_list) { | 2000 | if (inetdev && inetdev->ifa_list) { |
| 2002 | port_attr->state = IB_PORT_ACTIVE; | 2001 | port_attr->state = IB_PORT_ACTIVE; |
| 2003 | port_attr->phys_state = IB_PORT_PHYS_STATE_LINK_UP; | 2002 | port_attr->phys_state = IB_PORT_PHYS_STATE_LINK_UP; |
| 2004 | in_dev_put(inetdev); | ||
| 2005 | } else { | 2003 | } else { |
| 2006 | port_attr->state = IB_PORT_INIT; | 2004 | port_attr->state = IB_PORT_INIT; |
| 2007 | port_attr->phys_state = | 2005 | port_attr->phys_state = |
| 2008 | IB_PORT_PHYS_STATE_PORT_CONFIGURATION_TRAINING; | 2006 | IB_PORT_PHYS_STATE_PORT_CONFIGURATION_TRAINING; |
| 2009 | } | 2007 | } |
| 2008 | |||
| 2009 | rcu_read_unlock(); | ||
| 2010 | } | 2010 | } |
| 2011 | 2011 | ||
| 2012 | dev_put(netdev); | ||
| 2012 | err = device->ops.query_port(device, port_num, port_attr); | 2013 | err = device->ops.query_port(device, port_num, port_attr); |
| 2013 | if (err) | 2014 | if (err) |
| 2014 | return err; | 2015 | return err; |
| @@ -1230,7 +1230,7 @@ static int res_get_common_doit(struct sk_buff *skb, struct nlmsghdr *nlh, · 1229 unmodified lines | |||
| 1230 | msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); | 1230 | msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL); |
| 1231 | if (!msg) { | 1231 | if (!msg) { |
| 1232 | ret = -ENOMEM; | 1232 | ret = -ENOMEM; |
| 1233 | goto err; | 1233 | goto err_get; |
| 1234 | } | 1234 | } |
| 1235 | 1235 | ||
| 1236 | nlh = nlmsg_put(msg, NETLINK_CB(skb).portid, nlh->nlmsg_seq, | 1236 | nlh = nlmsg_put(msg, NETLINK_CB(skb).portid, nlh->nlmsg_seq, |
| @@ -1787,10 +1787,6 @@ static int nldev_stat_del_doit(struct sk_buff *skb, struct nlmsghdr *nlh, · 550 unmodified lines | |||
| 1787 | 1787 | ||
| 1788 | cntn = nla_get_u32(tb[RDMA_NLDEV_ATTR_STAT_COUNTER_ID]); | 1788 | cntn = nla_get_u32(tb[RDMA_NLDEV_ATTR_STAT_COUNTER_ID]); |
| 1789 | qpn = nla_get_u32(tb[RDMA_NLDEV_ATTR_RES_LQPN]); | 1789 | qpn = nla_get_u32(tb[RDMA_NLDEV_ATTR_RES_LQPN]); |
| 1790 | ret = rdma_counter_unbind_qpn(device, port, qpn, cntn); | ||
| 1791 | if (ret) | ||
| 1792 | goto err_unbind; | ||
| 1793 | |||
| 1794 | if (fill_nldev_handle(msg, device) || | 1790 | if (fill_nldev_handle(msg, device) || |
| 1795 | nla_put_u32(msg, RDMA_NLDEV_ATTR_PORT_INDEX, port) || | 1791 | nla_put_u32(msg, RDMA_NLDEV_ATTR_PORT_INDEX, port) || |
| 1796 | nla_put_u32(msg, RDMA_NLDEV_ATTR_STAT_COUNTER_ID, cntn) || | 1792 | nla_put_u32(msg, RDMA_NLDEV_ATTR_STAT_COUNTER_ID, cntn) || |
| @@ -1799,13 +1795,15 @@ static int nldev_stat_del_doit(struct sk_buff *skb, struct nlmsghdr *nlh, · 2 unmodified lines | |||
| 1799 | goto err_fill; | 1795 | goto err_fill; |
| 1800 | } | 1796 | } |
| 1801 | 1797 | ||
| 1798 | ret = rdma_counter_unbind_qpn(device, port, qpn, cntn); | ||
| 1799 | if (ret) | ||
| 1800 | goto err_fill; | ||
| 1801 | |||
| 1802 | nlmsg_end(msg, nlh); | 1802 | nlmsg_end(msg, nlh); |
| 1803 | ib_device_put(device); | 1803 | ib_device_put(device); |
| 1804 | return rdma_nl_unicast(sock_net(skb->sk), msg, NETLINK_CB(skb).portid); | 1804 | return rdma_nl_unicast(sock_net(skb->sk), msg, NETLINK_CB(skb).portid); |
| 1805 | 1805 | ||
| 1806 | err_fill: | 1806 | err_fill: |
| 1807 | rdma_counter_bind_qpn(device, port, qpn, cntn); | ||
| 1808 | err_unbind: | ||
| 1809 | nlmsg_free(msg); | 1807 | nlmsg_free(msg); |
| 1810 | err: | 1808 | err: |
| 1811 | ib_device_put(device); | 1809 | ib_device_put(device); |
| @@ -426,7 +426,7 @@ int ib_create_qp_security(struct ib_qp *qp, struct ib_device *dev) · 425 unmodified lines | |||
| 426 | int ret; | 426 | int ret; |
| 427 | 427 | ||
| 428 | rdma_for_each_port (dev, i) { | 428 | rdma_for_each_port (dev, i) { |
| 429 | is_ib = rdma_protocol_ib(dev, i++); | 429 | is_ib = rdma_protocol_ib(dev, i); |
| 430 | if (is_ib) | 430 | if (is_ib) |
| 431 | break; | 431 | break; |
| 432 | } | 432 | } |
| @@ -451,8 +451,10 @@ void ib_umem_odp_release(struct ib_umem_odp *umem_odp) · 450 unmodified lines | |||
| 451 | * that the hardware will not attempt to access the MR any more. | 451 | * that the hardware will not attempt to access the MR any more. |
| 452 | */ | 452 | */ |
| 453 | if (!umem_odp->is_implicit_odp) { | 453 | if (!umem_odp->is_implicit_odp) { |
| 454 | mutex_lock(&umem_odp->umem_mutex); | ||
| 454 | ib_umem_odp_unmap_dma_pages(umem_odp, ib_umem_start(umem_odp), | 455 | ib_umem_odp_unmap_dma_pages(umem_odp, ib_umem_start(umem_odp), |
| 455 | ib_umem_end(umem_odp)); | 456 | ib_umem_end(umem_odp)); |
| 457 | mutex_unlock(&umem_odp->umem_mutex); | ||
| 456 | kvfree(umem_odp->dma_list); | 458 | kvfree(umem_odp->dma_list); |
| 457 | kvfree(umem_odp->page_list); | 459 | kvfree(umem_odp->page_list); |
| 458 | } | 460 | } |
| @@ -719,6 +721,8 @@ void ib_umem_odp_unmap_dma_pages(struct ib_umem_odp *umem_odp, u64 virt, · 260 unmodified lines | |||
| 719 | u64 addr; | 721 | u64 addr; |
| 720 | struct ib_device *dev = umem_odp->umem.ibdev; | 722 | struct ib_device *dev = umem_odp->umem.ibdev; |
| 721 | 723 | ||
| 724 | lockdep_assert_held(&umem_odp->umem_mutex); | ||
| 725 | |||
| 722 | virt = max_t(u64, virt, ib_umem_start(umem_odp)); | 726 | virt = max_t(u64, virt, ib_umem_start(umem_odp)); |
| 723 | bound = min_t(u64, bound, ib_umem_end(umem_odp)); | 727 | bound = min_t(u64, bound, ib_umem_end(umem_odp)); |
| 724 | /* Note that during the run of this function, the | 728 | /* Note that during the run of this function, the |
| @@ -726,7 +730,6 @@ void ib_umem_odp_unmap_dma_pages(struct ib_umem_odp *umem_odp, u64 virt, · 1 unmodified line | |||
| 726 | * faults from completion. We might be racing with other | 730 | * faults from completion. We might be racing with other |
| 727 | * invalidations, so we must make sure we free each page only | 731 | * invalidations, so we must make sure we free each page only |
| 728 | * once. */ | 732 | * once. */ |
| 729 | mutex_lock(&umem_odp->umem_mutex); | ||
| 730 | for (addr = virt; addr < bound; addr += BIT(umem_odp->page_shift)) { | 733 | for (addr = virt; addr < bound; addr += BIT(umem_odp->page_shift)) { |
| 731 | idx = (addr - ib_umem_start(umem_odp)) >> umem_odp->page_shift; | 734 | idx = (addr - ib_umem_start(umem_odp)) >> umem_odp->page_shift; |
| 732 | if (umem_odp->page_list[idx]) { | 735 | if (umem_odp->page_list[idx]) { |
| @@ -757,7 +760,6 @@ void ib_umem_odp_unmap_dma_pages(struct ib_umem_odp *umem_odp, u64 virt, · 24 unmodified lines | |||
| 757 | umem_odp->npages--; | 760 | umem_odp->npages--; |
| 758 | } | 761 | } |
| 759 | } | 762 | } |
| 760 | mutex_unlock(&umem_odp->umem_mutex); | ||
| 761 | } | 763 | } |
| 762 | EXPORT_SYMBOL(ib_umem_odp_unmap_dma_pages); | 764 | EXPORT_SYMBOL(ib_umem_odp_unmap_dma_pages); |
| 763 | 765 | ||
| @@ -242,10 +242,13 @@ static void set_ep_sin6_addrs(struct c4iw_ep *ep, · 241 unmodified lines | |||
| 242 | } | 242 | } |
| 243 | } | 243 | } |
| 244 | 244 | ||
| 245 | static int dump_qp(struct c4iw_qp *qp, struct c4iw_debugfs_data *qpd) | 245 | static int dump_qp(unsigned long id, struct c4iw_qp *qp, |
| 246 | struct c4iw_debugfs_data *qpd) | ||
| 246 | { | 247 | { |
| 247 | int space; | 248 | int space; |
| 248 | int cc; | 249 | int cc; |
| 250 | if (id != qp->wq.sq.qid) | ||
| 251 | return 0; | ||
| 249 | 252 | ||
| 250 | space = qpd->bufsize - qpd->pos - 1; | 253 | space = qpd->bufsize - qpd->pos - 1; |
| 251 | if (space == 0) | 254 | if (space == 0) |
| @@ -350,7 +353,7 @@ static int qp_open(struct inode *inode, struct file *file) · 98 unmodified lines | |||
| 350 | 353 | ||
| 351 | xa_lock_irq(&qpd->devp->qps); | 354 | xa_lock_irq(&qpd->devp->qps); |
| 352 | xa_for_each(&qpd->devp->qps, index, qp) | 355 | xa_for_each(&qpd->devp->qps, index, qp) |
| 353 | dump_qp(qp, qpd); | 356 | dump_qp(index, qp, qpd); |
| 354 | xa_unlock_irq(&qpd->devp->qps); | 357 | xa_unlock_irq(&qpd->devp->qps); |
| 355 | 358 | ||
| 356 | qpd->buf[qpd->pos++] = 0; | 359 | qpd->buf[qpd->pos++] = 0; |
| @@ -275,13 +275,17 @@ static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry, · 274 unmodified lines | |||
| 275 | struct sk_buff *skb, struct c4iw_wr_wait *wr_waitp) | 275 | struct sk_buff *skb, struct c4iw_wr_wait *wr_waitp) |
| 276 | { | 276 | { |
| 277 | int err; | 277 | int err; |
| 278 | struct fw_ri_tpte tpt; | 278 | struct fw_ri_tpte *tpt; |
| 279 | u32 stag_idx; | 279 | u32 stag_idx; |
| 280 | static atomic_t key; | 280 | static atomic_t key; |
| 281 | 281 | ||
| 282 | if (c4iw_fatal_error(rdev)) | 282 | if (c4iw_fatal_error(rdev)) |
| 283 | return -EIO; | 283 | return -EIO; |
| 284 | 284 | ||
| 285 | tpt = kmalloc(sizeof(*tpt), GFP_KERNEL); | ||
| 286 | if (!tpt) | ||
| 287 | return -ENOMEM; | ||
| 288 | |||
| 285 | stag_state = stag_state > 0; | 289 | stag_state = stag_state > 0; |
| 286 | stag_idx = (*stag) >> 8; | 290 | stag_idx = (*stag) >> 8; |
| 287 | 291 | ||
| @@ -291,6 +295,7 @@ static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry, · 3 unmodified lines | |||
| 291 | mutex_lock(&rdev->stats.lock); | 295 | mutex_lock(&rdev->stats.lock); |
| 292 | rdev->stats.stag.fail++; | 296 | rdev->stats.stag.fail++; |
| 293 | mutex_unlock(&rdev->stats.lock); | 297 | mutex_unlock(&rdev->stats.lock); |
| 298 | kfree(tpt); | ||
| 294 | return -ENOMEM; | 299 | return -ENOMEM; |
| 295 | } | 300 | } |
| 296 | mutex_lock(&rdev->stats.lock); | 301 | mutex_lock(&rdev->stats.lock); |
| @@ -305,28 +310,28 @@ static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry, · 8 unmodified lines | |||
| 305 | 310 | ||
| 306 | /* write TPT entry */ | 311 | /* write TPT entry */ |
| 307 | if (reset_tpt_entry) | 312 | if (reset_tpt_entry) |
| 308 | memset(&tpt, 0, sizeof(tpt)); | 313 | memset(tpt, 0, sizeof(*tpt)); |
| 309 | else { | 314 | else { |
| 310 | tpt.valid_to_pdid = cpu_to_be32(FW_RI_TPTE_VALID_F | | 315 | tpt->valid_to_pdid = cpu_to_be32(FW_RI_TPTE_VALID_F | |
| 311 | FW_RI_TPTE_STAGKEY_V((*stag & FW_RI_TPTE_STAGKEY_M)) | | 316 | FW_RI_TPTE_STAGKEY_V((*stag & FW_RI_TPTE_STAGKEY_M)) | |
| 312 | FW_RI_TPTE_STAGSTATE_V(stag_state) | | 317 | FW_RI_TPTE_STAGSTATE_V(stag_state) | |
| 313 | FW_RI_TPTE_STAGTYPE_V(type) | FW_RI_TPTE_PDID_V(pdid)); | 318 | FW_RI_TPTE_STAGTYPE_V(type) | FW_RI_TPTE_PDID_V(pdid)); |
| 314 | tpt.locread_to_qpid = cpu_to_be32(FW_RI_TPTE_PERM_V(perm) | | 319 | tpt->locread_to_qpid = cpu_to_be32(FW_RI_TPTE_PERM_V(perm) | |
| 315 | (bind_enabled ? FW_RI_TPTE_MWBINDEN_F : 0) | | 320 | (bind_enabled ? FW_RI_TPTE_MWBINDEN_F : 0) | |
| 316 | FW_RI_TPTE_ADDRTYPE_V((zbva ? FW_RI_ZERO_BASED_TO : | 321 | FW_RI_TPTE_ADDRTYPE_V((zbva ? FW_RI_ZERO_BASED_TO : |
| 317 | FW_RI_VA_BASED_TO))| | 322 | FW_RI_VA_BASED_TO))| |
| 318 | FW_RI_TPTE_PS_V(page_size)); | 323 | FW_RI_TPTE_PS_V(page_size)); |
| 319 | tpt.nosnoop_pbladdr = !pbl_size ? 0 : cpu_to_be32( | 324 | tpt->nosnoop_pbladdr = !pbl_size ? 0 : cpu_to_be32( |
| 320 | FW_RI_TPTE_PBLADDR_V(PBL_OFF(rdev, pbl_addr)>>3)); | 325 | FW_RI_TPTE_PBLADDR_V(PBL_OFF(rdev, pbl_addr)>>3)); |
| 321 | tpt.len_lo = cpu_to_be32((u32)(len & 0xffffffffUL)); | 326 | tpt->len_lo = cpu_to_be32((u32)(len & 0xffffffffUL)); |
| 322 | tpt.va_hi = cpu_to_be32((u32)(to >> 32)); | 327 | tpt->va_hi = cpu_to_be32((u32)(to >> 32)); |
| 323 | tpt.va_lo_fbo = cpu_to_be32((u32)(to & 0xffffffffUL)); | 328 | tpt->va_lo_fbo = cpu_to_be32((u32)(to & 0xffffffffUL)); |
| 324 | tpt.dca_mwbcnt_pstag = cpu_to_be32(0); | 329 | tpt->dca_mwbcnt_pstag = cpu_to_be32(0); |
| 325 | tpt.len_hi = cpu_to_be32((u32)(len >> 32)); | 330 | tpt->len_hi = cpu_to_be32((u32)(len >> 32)); |
| 326 | } | 331 | } |
| 327 | err = write_adapter_mem(rdev, stag_idx + | 332 | err = write_adapter_mem(rdev, stag_idx + |
| 328 | (rdev->lldi.vr->stag.start >> 5), | 333 | (rdev->lldi.vr->stag.start >> 5), |
| 329 | sizeof(tpt), &tpt, skb, wr_waitp); | 334 | sizeof(*tpt), tpt, skb, wr_waitp); |
| 330 | 335 | ||
| 331 | if (reset_tpt_entry) { | 336 | if (reset_tpt_entry) { |
| 332 | c4iw_put_resource(&rdev->resource.tpt_table, stag_idx); | 337 | c4iw_put_resource(&rdev->resource.tpt_table, stag_idx); |
| @@ -334,6 +339,7 @@ static int write_tpt_entry(struct c4iw_rdev *rdev, u32 reset_tpt_entry, · 1 unmodified line | |||
| 334 | rdev->stats.stag.cur -= 32; | 339 | rdev->stats.stag.cur -= 32; |
| 335 | mutex_unlock(&rdev->stats.lock); | 340 | mutex_unlock(&rdev->stats.lock); |
| 336 | } | 341 | } |
| 342 | kfree(tpt); | ||
| 337 | return err; | 343 | return err; |
| 338 | } | 344 | } |
| 339 | 345 | ||
| @@ -2737,15 +2737,11 @@ int c4iw_create_srq(struct ib_srq *ib_srq, struct ib_srq_init_attr *attrs, · 2736 unmodified lines | |||
| 2737 | if (CHELSIO_CHIP_VERSION(rhp->rdev.lldi.adapter_type) > CHELSIO_T6) | 2737 | if (CHELSIO_CHIP_VERSION(rhp->rdev.lldi.adapter_type) > CHELSIO_T6) |
| 2738 | srq->flags = T4_SRQ_LIMIT_SUPPORT; | 2738 | srq->flags = T4_SRQ_LIMIT_SUPPORT; |
| 2739 | 2739 | ||
| 2740 | ret = xa_insert_irq(&rhp->qps, srq->wq.qid, srq, GFP_KERNEL); | ||
| 2741 | if (ret) | ||
| 2742 | goto err_free_queue; | ||
| 2743 | |||
| 2744 | if (udata) { | 2740 | if (udata) { |
| 2745 | srq_key_mm = kmalloc(sizeof(*srq_key_mm), GFP_KERNEL); | 2741 | srq_key_mm = kmalloc(sizeof(*srq_key_mm), GFP_KERNEL); |
| 2746 | if (!srq_key_mm) { | 2742 | if (!srq_key_mm) { |
| 2747 | ret = -ENOMEM; | 2743 | ret = -ENOMEM; |
| 2748 | goto err_remove_handle; | 2744 | goto err_free_queue; |
| 2749 | } | 2745 | } |
| 2750 | srq_db_key_mm = kmalloc(sizeof(*srq_db_key_mm), GFP_KERNEL); | 2746 | srq_db_key_mm = kmalloc(sizeof(*srq_db_key_mm), GFP_KERNEL); |
| 2751 | if (!srq_db_key_mm) { | 2747 | if (!srq_db_key_mm) { |
| @@ -2789,8 +2785,6 @@ err_free_srq_db_key_mm: · 37 unmodified lines | |||
| 2789 | kfree(srq_db_key_mm); | 2785 | kfree(srq_db_key_mm); |
| 2790 | err_free_srq_key_mm: | 2786 | err_free_srq_key_mm: |
| 2791 | kfree(srq_key_mm); | 2787 | kfree(srq_key_mm); |
| 2792 | err_remove_handle: | ||
| 2793 | xa_erase_irq(&rhp->qps, srq->wq.qid); | ||
| 2794 | err_free_queue: | 2788 | err_free_queue: |
| 2795 | free_srq_queue(srq, ucontext ? &ucontext->uctx : &rhp->rdev.uctx, | 2789 | free_srq_queue(srq, ucontext ? &ucontext->uctx : &rhp->rdev.uctx, |
| 2796 | srq->wr_waitp); | 2790 | srq->wr_waitp); |
| @@ -2813,8 +2807,6 @@ void c4iw_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata) · 16 unmodified lines | |||
| 2813 | rhp = srq->rhp; | 2807 | rhp = srq->rhp; |
| 2814 | 2808 | ||
| 2815 | pr_debug("%s id %d\n", __func__, srq->wq.qid); | 2809 | pr_debug("%s id %d\n", __func__, srq->wq.qid); |
| 2816 | |||
| 2817 | xa_erase_irq(&rhp->qps, srq->wq.qid); | ||
| 2818 | ucontext = rdma_udata_to_drv_context(udata, struct c4iw_ucontext, | 2810 | ucontext = rdma_udata_to_drv_context(udata, struct c4iw_ucontext, |
| 2819 | ibucontext); | 2811 | ibucontext); |
| 2820 | free_srq_queue(srq, ucontext ? &ucontext->uctx : &rhp->rdev.uctx, | 2812 | free_srq_queue(srq, ucontext ? &ucontext->uctx : &rhp->rdev.uctx, |
| @@ -1526,8 +1526,11 @@ int sdma_init(struct hfi1_devdata *dd, u8 port) · 1525 unmodified lines | |||
| 1526 | } | 1526 | } |
| 1527 | 1527 | ||
| 1528 | ret = rhashtable_init(tmp_sdma_rht, &sdma_rht_params); | 1528 | ret = rhashtable_init(tmp_sdma_rht, &sdma_rht_params); |
| 1529 | if (ret < 0) | 1529 | if (ret < 0) { |
| 1530 | kfree(tmp_sdma_rht); | ||
| 1530 | goto bail; | 1531 | goto bail; |
| 1532 | } | ||
| 1533 | |||
| 1531 | dd->sdma_rht = tmp_sdma_rht; | 1534 | dd->sdma_rht = tmp_sdma_rht; |
| 1532 | 1535 | ||
| 1533 | dd_dev_info(dd, "SDMA num_sdma: %u\n", dd->num_sdma); | 1536 | dd_dev_info(dd, "SDMA num_sdma: %u\n", dd->num_sdma); |
| @@ -2773,6 +2773,10 @@ int i40iw_register_rdma_device(struct i40iw_device *iwdev) · 2772 unmodified lines | |||
| 2773 | return -ENOMEM; | 2773 | return -ENOMEM; |
| 2774 | iwibdev = iwdev->iwibdev; | 2774 | iwibdev = iwdev->iwibdev; |
| 2775 | rdma_set_device_sysfs_group(&iwibdev->ibdev, &i40iw_attr_group); | 2775 | rdma_set_device_sysfs_group(&iwibdev->ibdev, &i40iw_attr_group); |
| 2776 | ret = ib_device_set_netdev(&iwibdev->ibdev, iwdev->netdev, 1); | ||
| 2777 | if (ret) | ||
| 2778 | goto error; | ||
| 2779 | |||
| 2776 | ret = ib_register_device(&iwibdev->ibdev, "i40iw%d"); | 2780 | ret = ib_register_device(&iwibdev->ibdev, "i40iw%d"); |
| 2777 | if (ret) | 2781 | if (ret) |
| 2778 | goto error; | 2782 | goto error; |
| @@ -1298,29 +1298,6 @@ static int devx_handle_mkey_create(struct mlx5_ib_dev *dev, · 1297 unmodified lines | |||
| 1298 | return 0; | 1298 | return 0; |
| 1299 | } | 1299 | } |
| 1300 | 1300 | ||
| 1301 | static void devx_free_indirect_mkey(struct rcu_head *rcu) | ||
| 1302 | { | ||
| 1303 | kfree(container_of(rcu, struct devx_obj, devx_mr.rcu)); | ||
| 1304 | } | ||
| 1305 | |||
| 1306 | /* This function to delete from the radix tree needs to be called before | ||
| 1307 | * destroying the underlying mkey. Otherwise a race might occur in case that | ||
| 1308 | * other thread will get the same mkey before this one will be deleted, | ||
| 1309 | * in that case it will fail via inserting to the tree its own data. | ||
| 1310 | * | ||
| 1311 | * Note: | ||
| 1312 | * An error in the destroy is not expected unless there is some other indirect | ||
| 1313 | * mkey which points to this one. In a kernel cleanup flow it will be just | ||
| 1314 | * destroyed in the iterative destruction call. In a user flow, in case | ||
| 1315 | * the application didn't close in the expected order it's its own problem, | ||
| 1316 | * the mkey won't be part of the tree, in both cases the kernel is safe. | ||
| 1317 | */ | ||
| 1318 | static void devx_cleanup_mkey(struct devx_obj *obj) | ||
| 1319 | { | ||
| 1320 | xa_erase(&obj->ib_dev->mdev->priv.mkey_table, | ||
| 1321 | mlx5_base_mkey(obj->devx_mr.mmkey.key)); | ||
| 1322 | } | ||
| 1323 | |||
| 1324 | static void devx_cleanup_subscription(struct mlx5_ib_dev *dev, | 1301 | static void devx_cleanup_subscription(struct mlx5_ib_dev *dev, |
| 1325 | struct devx_event_subscription *sub) | 1302 | struct devx_event_subscription *sub) |
| 1326 | { | 1303 | { |
| @@ -1362,8 +1339,16 @@ static int devx_obj_cleanup(struct ib_uobject *uobject, · 35 unmodified lines | |||
| 1362 | int ret; | 1339 | int ret; |
| 1363 | 1340 | ||
| 1364 | dev = mlx5_udata_to_mdev(&attrs->driver_udata); | 1341 | dev = mlx5_udata_to_mdev(&attrs->driver_udata); |
| 1365 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) | 1342 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) { |
| 1366 | devx_cleanup_mkey(obj); | 1343 | /* |
| 1344 | * The pagefault_single_data_segment() does commands against | ||
| 1345 | * the mmkey, we must wait for that to stop before freeing the | ||
| 1346 | * mkey, as another allocation could get the same mkey #. | ||
| 1347 | */ | ||
| 1348 | xa_erase(&obj->ib_dev->mdev->priv.mkey_table, | ||
| 1349 | mlx5_base_mkey(obj->devx_mr.mmkey.key)); | ||
| 1350 | synchronize_srcu(&dev->mr_srcu); | ||
| 1351 | } | ||
| 1367 | 1352 | ||
| 1368 | if (obj->flags & DEVX_OBJ_FLAGS_DCT) | 1353 | if (obj->flags & DEVX_OBJ_FLAGS_DCT) |
| 1369 | ret = mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct); | 1354 | ret = mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct); |
| @@ -1382,12 +1367,6 @@ static int devx_obj_cleanup(struct ib_uobject *uobject, · 12 unmodified lines | |||
| 1382 | devx_cleanup_subscription(dev, sub_entry); | 1367 | devx_cleanup_subscription(dev, sub_entry); |
| 1383 | mutex_unlock(&devx_event_table->event_xa_lock); | 1368 | mutex_unlock(&devx_event_table->event_xa_lock); |
| 1384 | 1369 | ||
| 1385 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) { | ||
| 1386 | call_srcu(&dev->mr_srcu, &obj->devx_mr.rcu, | ||
| 1387 | devx_free_indirect_mkey); | ||
| 1388 | return ret; | ||
| 1389 | } | ||
| 1390 | |||
| 1391 | kfree(obj); | 1370 | kfree(obj); |
| 1392 | return ret; | 1371 | return ret; |
| 1393 | } | 1372 | } |
| @@ -1491,26 +1470,21 @@ static int UVERBS_HANDLER(MLX5_IB_METHOD_DEVX_OBJ_CREATE)( · 97 unmodified lines | |||
| 1491 | &obj_id); | 1470 | &obj_id); |
| 1492 | WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32)); | 1471 | WARN_ON(obj->dinlen > MLX5_MAX_DESTROY_INBOX_SIZE_DW * sizeof(u32)); |
| 1493 | 1472 | ||
| 1494 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) { | ||
| 1495 | err = devx_handle_mkey_indirect(obj, dev, cmd_in, cmd_out); | ||
| 1496 | if (err) | ||
| 1497 | goto obj_destroy; | ||
| 1498 | } | ||
| 1499 | |||
| 1500 | err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len); | 1473 | err = uverbs_copy_to(attrs, MLX5_IB_ATTR_DEVX_OBJ_CREATE_CMD_OUT, cmd_out, cmd_out_len); |
| 1501 | if (err) | 1474 | if (err) |
| 1502 | goto err_copy; | 1475 | goto obj_destroy; |
| 1503 | 1476 | ||
| 1504 | if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJECT) | 1477 | if (opcode == MLX5_CMD_OP_CREATE_GENERAL_OBJECT) |
| 1505 | obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type); | 1478 | obj_type = MLX5_GET(general_obj_in_cmd_hdr, cmd_in, obj_type); |
| 1506 | |||
| 1507 | obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id); | 1479 | obj->obj_id = get_enc_obj_id(opcode | obj_type << 16, obj_id); |
| 1508 | 1480 | ||
| 1481 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) { | ||
| 1482 | err = devx_handle_mkey_indirect(obj, dev, cmd_in, cmd_out); | ||
| 1483 | if (err) | ||
| 1484 | goto obj_destroy; | ||
| 1485 | } | ||
| 1509 | return 0; | 1486 | return 0; |
| 1510 | 1487 | ||
| 1511 | err_copy: | ||
| 1512 | if (obj->flags & DEVX_OBJ_FLAGS_INDIRECT_MKEY) | ||
| 1513 | devx_cleanup_mkey(obj); | ||
| 1514 | obj_destroy: | 1488 | obj_destroy: |
| 1515 | if (obj->flags & DEVX_OBJ_FLAGS_DCT) | 1489 | if (obj->flags & DEVX_OBJ_FLAGS_DCT) |
| 1516 | mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct); | 1490 | mlx5_core_destroy_dct(obj->ib_dev->mdev, &obj->core_dct); |
| @@ -606,7 +606,7 @@ struct mlx5_ib_mr { · 605 unmodified lines | |||
| 606 | struct mlx5_ib_dev *dev; | 606 | struct mlx5_ib_dev *dev; |
| 607 | u32 out[MLX5_ST_SZ_DW(create_mkey_out)]; | 607 | u32 out[MLX5_ST_SZ_DW(create_mkey_out)]; |
| 608 | struct mlx5_core_sig_ctx *sig; | 608 | struct mlx5_core_sig_ctx *sig; |
| 609 | int live; | 609 | unsigned int live; |
| 610 | void *descs_alloc; | 610 | void *descs_alloc; |
| 611 | int access_flags; /* Needed for rereg MR */ | 611 | int access_flags; /* Needed for rereg MR */ |
| 612 | 612 | ||
| @@ -639,7 +639,6 @@ struct mlx5_ib_mw { · 26 unmodified lines | |||
| 639 | struct mlx5_ib_devx_mr { | 639 | struct mlx5_ib_devx_mr { |
| 640 | struct mlx5_core_mkey mmkey; | 640 | struct mlx5_core_mkey mmkey; |
| 641 | int ndescs; | 641 | int ndescs; |
| 642 | struct rcu_head rcu; | ||
| 643 | }; | 642 | }; |
| 644 | 643 | ||
| 645 | struct mlx5_ib_umr_context { | 644 | struct mlx5_ib_umr_context { |
| @@ -84,32 +84,6 @@ static bool use_umr_mtt_update(struct mlx5_ib_mr *mr, u64 start, u64 length) · 83 unmodified lines | |||
| 84 | length + (start & (MLX5_ADAPTER_PAGE_SIZE - 1)); | 84 | length + (start & (MLX5_ADAPTER_PAGE_SIZE - 1)); |
| 85 | } | 85 | } |
| 86 | 86 | ||
| 87 | static void update_odp_mr(struct mlx5_ib_mr *mr) | ||
| 88 | { | ||
| 89 | if (is_odp_mr(mr)) { | ||
| 90 | /* | ||
| 91 | * This barrier prevents the compiler from moving the | ||
| 92 | * setting of umem->odp_data->private to point to our | ||
| 93 | * MR, before reg_umr finished, to ensure that the MR | ||
| 94 | * initialization have finished before starting to | ||
| 95 | * handle invalidations. | ||
| 96 | */ | ||
| 97 | smp_wmb(); | ||
| 98 | to_ib_umem_odp(mr->umem)->private = mr; | ||
| 99 | /* | ||
| 100 | * Make sure we will see the new | ||
| 101 | * umem->odp_data->private value in the invalidation | ||
| 102 | * routines, before we can get page faults on the | ||
| 103 | * MR. Page faults can happen once we put the MR in | ||
| 104 | * the tree, below this line. Without the barrier, | ||
| 105 | * there can be a fault handling and an invalidation | ||
| 106 | * before umem->odp_data->private == mr is visible to | ||
| 107 | * the invalidation handler. | ||
| 108 | */ | ||
| 109 | smp_wmb(); | ||
| 110 | } | ||
| 111 | } | ||
| 112 | |||
| 113 | static void reg_mr_callback(int status, struct mlx5_async_work *context) | 87 | static void reg_mr_callback(int status, struct mlx5_async_work *context) |
| 114 | { | 88 | { |
| 115 | struct mlx5_ib_mr *mr = | 89 | struct mlx5_ib_mr *mr = |
| @@ -1346,8 +1320,6 @@ struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, · 1230 unmodified lines | |||
| 1346 | mr->umem = umem; | 1320 | mr->umem = umem; |
| 1347 | set_mr_fields(dev, mr, npages, length, access_flags); | 1321 | set_mr_fields(dev, mr, npages, length, access_flags); |
| 1348 | 1322 | ||
| 1349 | update_odp_mr(mr); | ||
| 1350 | |||
| 1351 | if (use_umr) { | 1323 | if (use_umr) { |
| 1352 | int update_xlt_flags = MLX5_IB_UPD_XLT_ENABLE; | 1324 | int update_xlt_flags = MLX5_IB_UPD_XLT_ENABLE; |
| 1353 | 1325 | ||
| @@ -1363,10 +1335,12 @@ struct ib_mr *mlx5_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, · 9 unmodified lines | |||
| 1363 | } | 1335 | } |
| 1364 | } | 1336 | } |
| 1365 | 1337 | ||
| 1366 | if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING)) { | 1338 | if (is_odp_mr(mr)) { |
| 1367 | mr->live = 1; | 1339 | to_ib_umem_odp(mr->umem)->private = mr; |
| 1368 | atomic_set(&mr->num_pending_prefetch, 0); | 1340 | atomic_set(&mr->num_pending_prefetch, 0); |
| 1369 | } | 1341 | } |
| 1342 | if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING)) | ||
| 1343 | smp_store_release(&mr->live, 1); | ||
| 1370 | 1344 | ||
| 1371 | return &mr->ibmr; | 1345 | return &mr->ibmr; |
| 1372 | error: | 1346 | error: |
| @@ -1441,6 +1415,9 @@ int mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start, · 68 unmodified lines | |||
| 1441 | if (!mr->umem) | 1415 | if (!mr->umem) |
| 1442 | return -EINVAL; | 1416 | return -EINVAL; |
| 1443 | 1417 | ||
| 1418 | if (is_odp_mr(mr)) | ||
| 1419 | return -EOPNOTSUPP; | ||
| 1420 | |||
| 1444 | if (flags & IB_MR_REREG_TRANS) { | 1421 | if (flags & IB_MR_REREG_TRANS) { |
| 1445 | addr = virt_addr; | 1422 | addr = virt_addr; |
| 1446 | len = length; | 1423 | len = length; |
| @@ -1486,8 +1463,6 @@ int mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start, · 39 unmodified lines | |||
| 1486 | } | 1463 | } |
| 1487 | 1464 | ||
| 1488 | mr->allocated_from_cache = 0; | 1465 | mr->allocated_from_cache = 0; |
| 1489 | if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING)) | ||
| 1490 | mr->live = 1; | ||
| 1491 | } else { | 1466 | } else { |
| 1492 | /* | 1467 | /* |
| 1493 | * Send a UMR WQE | 1468 | * Send a UMR WQE |
| @@ -1516,7 +1491,6 @@ int mlx5_ib_rereg_user_mr(struct ib_mr *ib_mr, int flags, u64 start, · 22 unmodified lines | |||
| 1516 | 1491 | ||
| 1517 | set_mr_fields(dev, mr, npages, len, access_flags); | 1492 | set_mr_fields(dev, mr, npages, len, access_flags); |
| 1518 | 1493 | ||
| 1519 | update_odp_mr(mr); | ||
| 1520 | return 0; | 1494 | return 0; |
| 1521 | 1495 | ||
| 1522 | err: | 1496 | err: |
| @@ -1607,15 +1581,16 @@ static void dereg_mr(struct mlx5_ib_dev *dev, struct mlx5_ib_mr *mr) · 84 unmodified lines | |||
| 1607 | /* Prevent new page faults and | 1581 | /* Prevent new page faults and |
| 1608 | * prefetch requests from succeeding | 1582 | * prefetch requests from succeeding |
| 1609 | */ | 1583 | */ |
| 1610 | mr->live = 0; | 1584 | WRITE_ONCE(mr->live, 0); |
| 1585 | |||
| 1586 | /* Wait for all running page-fault handlers to finish. */ | ||
| 1587 | synchronize_srcu(&dev->mr_srcu); | ||
| 1611 | 1588 | ||
| 1612 | /* dequeue pending prefetch requests for the mr */ | 1589 | /* dequeue pending prefetch requests for the mr */ |
| 1613 | if (atomic_read(&mr->num_pending_prefetch)) | 1590 | if (atomic_read(&mr->num_pending_prefetch)) |
| 1614 | flush_workqueue(system_unbound_wq); | 1591 | flush_workqueue(system_unbound_wq); |
| 1615 | WARN_ON(atomic_read(&mr->num_pending_prefetch)); | 1592 | WARN_ON(atomic_read(&mr->num_pending_prefetch)); |
| 1616 | 1593 | ||
| 1617 | /* Wait for all running page-fault handlers to finish. */ | ||
| 1618 | synchronize_srcu(&dev->mr_srcu); | ||
| 1619 | /* Destroy all page mappings */ | 1594 | /* Destroy all page mappings */ |
| 1620 | if (!umem_odp->is_implicit_odp) | 1595 | if (!umem_odp->is_implicit_odp) |
| 1621 | mlx5_ib_invalidate_range(umem_odp, | 1596 | mlx5_ib_invalidate_range(umem_odp, |
| @@ -1987,14 +1962,25 @@ free: · 365 unmodified lines | |||
| 1987 | 1962 | ||
| 1988 | int mlx5_ib_dealloc_mw(struct ib_mw *mw) | 1963 | int mlx5_ib_dealloc_mw(struct ib_mw *mw) |
| 1989 | { | 1964 | { |
| 1965 | struct mlx5_ib_dev *dev = to_mdev(mw->device); | ||
| 1990 | struct mlx5_ib_mw *mmw = to_mmw(mw); | 1966 | struct mlx5_ib_mw *mmw = to_mmw(mw); |
| 1991 | int err; | 1967 | int err; |
| 1992 | 1968 | ||
| 1993 | err = mlx5_core_destroy_mkey((to_mdev(mw->device))->mdev, | 1969 | if (IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING)) { |
| 1994 | &mmw->mmkey); | 1970 | xa_erase(&dev->mdev->priv.mkey_table, |
| 1995 | if (!err) | 1971 | mlx5_base_mkey(mmw->mmkey.key)); |
| 1996 | kfree(mmw); | 1972 | /* |
| 1997 | return err; | 1973 | * pagefault_single_data_segment() may be accessing mmw under |
| 1974 | * SRCU if the user bound an ODP MR to this MW. | ||
| 1975 | */ | ||
| 1976 | synchronize_srcu(&dev->mr_srcu); | ||
| 1977 | } | ||
| 1978 | |||
| 1979 | err = mlx5_core_destroy_mkey(dev->mdev, &mmw->mmkey); | ||
| 1980 | if (err) | ||
| 1981 | return err; | ||
| 1982 | kfree(mmw); | ||
| 1983 | return 0; | ||
| 1998 | } | 1984 | } |
| 1999 | 1985 | ||
| 2000 | int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask, | 1986 | int mlx5_ib_check_mr_status(struct ib_mr *ibmr, u32 check_mask, |
| @@ -178,6 +178,29 @@ void mlx5_odp_populate_klm(struct mlx5_klm *pklm, size_t offset, · 177 unmodified lines | |||
| 178 | return; | 178 | return; |
| 179 | } | 179 | } |
| 180 | 180 | ||
| 181 | /* | ||
| 182 | * The locking here is pretty subtle. Ideally the implicit children | ||
| 183 | * list would be protected by the umem_mutex, however that is not | ||
| 184 | * possible. Instead this uses a weaker update-then-lock pattern: | ||
| 185 | * | ||
| 186 | * srcu_read_lock() | ||
| 187 | * <change children list> | ||
| 188 | * mutex_lock(umem_mutex) | ||
| 189 | * mlx5_ib_update_xlt() | ||
| 190 | * mutex_unlock(umem_mutex) | ||
| 191 | * destroy lkey | ||
| 192 | * | ||
| 193 | * ie any change the children list must be followed by the locked | ||
| 194 | * update_xlt before destroying. | ||
| 195 | * | ||
| 196 | * The umem_mutex provides the acquire/release semantic needed to make | ||
| 197 | * the children list visible to a racing thread. While SRCU is not | ||
| 198 | * technically required, using it gives consistent use of the SRCU | ||
| 199 | * locking around the children list. | ||
| 200 | */ | ||
| 201 | lockdep_assert_held(&to_ib_umem_odp(mr->umem)->umem_mutex); | ||
| 202 | lockdep_assert_held(&mr->dev->mr_srcu); | ||
| 203 | |||
| 181 | odp = odp_lookup(offset * MLX5_IMR_MTT_SIZE, | 204 | odp = odp_lookup(offset * MLX5_IMR_MTT_SIZE, |
| 182 | nentries * MLX5_IMR_MTT_SIZE, mr); | 205 | nentries * MLX5_IMR_MTT_SIZE, mr); |
| 183 | 206 | ||
| @@ -202,15 +225,22 @@ static void mr_leaf_free_action(struct work_struct *work) · 18 unmodified lines | |||
| 202 | struct ib_umem_odp *odp = container_of(work, struct ib_umem_odp, work); | 225 | struct ib_umem_odp *odp = container_of(work, struct ib_umem_odp, work); |
| 203 | int idx = ib_umem_start(odp) >> MLX5_IMR_MTT_SHIFT; | 226 | int idx = ib_umem_start(odp) >> MLX5_IMR_MTT_SHIFT; |
| 204 | struct mlx5_ib_mr *mr = odp->private, *imr = mr->parent; | 227 | struct mlx5_ib_mr *mr = odp->private, *imr = mr->parent; |
| 228 | struct ib_umem_odp *odp_imr = to_ib_umem_odp(imr->umem); | ||
| 229 | int srcu_key; | ||
| 205 | 230 | ||
| 206 | mr->parent = NULL; | 231 | mr->parent = NULL; |
| 207 | synchronize_srcu(&mr->dev->mr_srcu); | 232 | synchronize_srcu(&mr->dev->mr_srcu); |
| 208 | 233 | ||
| 209 | ib_umem_odp_release(odp); | 234 | if (smp_load_acquire(&imr->live)) { |
| 210 | if (imr->live) | 235 | srcu_key = srcu_read_lock(&mr->dev->mr_srcu); |
| 236 | mutex_lock(&odp_imr->umem_mutex); | ||
| 211 | mlx5_ib_update_xlt(imr, idx, 1, 0, | 237 | mlx5_ib_update_xlt(imr, idx, 1, 0, |
| 212 | MLX5_IB_UPD_XLT_INDIRECT | | 238 | MLX5_IB_UPD_XLT_INDIRECT | |
| 213 | MLX5_IB_UPD_XLT_ATOMIC); | 239 | MLX5_IB_UPD_XLT_ATOMIC); |
| 240 | mutex_unlock(&odp_imr->umem_mutex); | ||
| 241 | srcu_read_unlock(&mr->dev->mr_srcu, srcu_key); | ||
| 242 | } | ||
| 243 | ib_umem_odp_release(odp); | ||
| 214 | mlx5_mr_cache_free(mr->dev, mr); | 244 | mlx5_mr_cache_free(mr->dev, mr); |
| 215 | 245 | ||
| 216 | if (atomic_dec_and_test(&imr->num_leaf_free)) | 246 | if (atomic_dec_and_test(&imr->num_leaf_free)) |
| @@ -278,7 +308,6 @@ void mlx5_ib_invalidate_range(struct ib_umem_odp *umem_odp, unsigned long start, · 61 unmodified lines | |||
| 278 | idx - blk_start_idx + 1, 0, | 308 | idx - blk_start_idx + 1, 0, |
| 279 | MLX5_IB_UPD_XLT_ZAP | | 309 | MLX5_IB_UPD_XLT_ZAP | |
| 280 | MLX5_IB_UPD_XLT_ATOMIC); | 310 | MLX5_IB_UPD_XLT_ATOMIC); |
| 281 | mutex_unlock(&umem_odp->umem_mutex); | ||
| 282 | /* | 311 | /* |
| 283 | * We are now sure that the device will not access the | 312 | * We are now sure that the device will not access the |
| 284 | * memory. We can safely unmap it, and mark it as dirty if | 313 | * memory. We can safely unmap it, and mark it as dirty if |
| @@ -289,10 +318,12 @@ void mlx5_ib_invalidate_range(struct ib_umem_odp *umem_odp, unsigned long start, · 4 unmodified lines | |||
| 289 | 318 | ||
| 290 | if (unlikely(!umem_odp->npages && mr->parent && | 319 | if (unlikely(!umem_odp->npages && mr->parent && |
| 291 | !umem_odp->dying)) { | 320 | !umem_odp->dying)) { |
| 292 | WRITE_ONCE(umem_odp->dying, 1); | 321 | WRITE_ONCE(mr->live, 0); |
| 322 | umem_odp->dying = 1; | ||
| 293 | atomic_inc(&mr->parent->num_leaf_free); | 323 | atomic_inc(&mr->parent->num_leaf_free); |
| 294 | schedule_work(&umem_odp->work); | 324 | schedule_work(&umem_odp->work); |
| 295 | } | 325 | } |
| 326 | mutex_unlock(&umem_odp->umem_mutex); | ||
| 296 | } | 327 | } |
| 297 | 328 | ||
| 298 | void mlx5_ib_internal_fill_odp_caps(struct mlx5_ib_dev *dev) | 329 | void mlx5_ib_internal_fill_odp_caps(struct mlx5_ib_dev *dev) |
| @@ -429,8 +460,6 @@ static struct mlx5_ib_mr *implicit_mr_alloc(struct ib_pd *pd, · 130 unmodified lines | |||
| 429 | mr->ibmr.lkey = mr->mmkey.key; | 460 | mr->ibmr.lkey = mr->mmkey.key; |
| 430 | mr->ibmr.rkey = mr->mmkey.key; | 461 | mr->ibmr.rkey = mr->mmkey.key; |
| 431 | 462 | ||
| 432 | mr->live = 1; | ||
| 433 | |||
| 434 | mlx5_ib_dbg(dev, "key %x dev %p mr %p\n", | 463 | mlx5_ib_dbg(dev, "key %x dev %p mr %p\n", |
| 435 | mr->mmkey.key, dev->mdev, mr); | 464 | mr->mmkey.key, dev->mdev, mr); |
| 436 | 465 | ||
| @@ -484,6 +513,8 @@ next_mr: · 47 unmodified lines | |||
| 484 | mtt->parent = mr; | 513 | mtt->parent = mr; |
| 485 | INIT_WORK(&odp->work, mr_leaf_free_action); | 514 | INIT_WORK(&odp->work, mr_leaf_free_action); |
| 486 | 515 | ||
| 516 | smp_store_release(&mtt->live, 1); | ||
| 517 | |||
| 487 | if (!nentries) | 518 | if (!nentries) |
| 488 | start_idx = addr >> MLX5_IMR_MTT_SHIFT; | 519 | start_idx = addr >> MLX5_IMR_MTT_SHIFT; |
| 489 | nentries++; | 520 | nentries++; |
| @@ -536,6 +567,7 @@ struct mlx5_ib_mr *mlx5_ib_alloc_implicit_mr(struct mlx5_ib_pd *pd, · 46 unmodified lines | |||
| 536 | init_waitqueue_head(&imr->q_leaf_free); | 567 | init_waitqueue_head(&imr->q_leaf_free); |
| 537 | atomic_set(&imr->num_leaf_free, 0); | 568 | atomic_set(&imr->num_leaf_free, 0); |
| 538 | atomic_set(&imr->num_pending_prefetch, 0); | 569 | atomic_set(&imr->num_pending_prefetch, 0); |
| 570 | smp_store_release(&imr->live, 1); | ||
| 539 | 571 | ||
| 540 | return imr; | 572 | return imr; |
| 541 | } | 573 | } |
| @@ -555,15 +587,19 @@ void mlx5_ib_free_implicit_mr(struct mlx5_ib_mr *imr) · 13 unmodified lines | |||
| 555 | if (mr->parent != imr) | 587 | if (mr->parent != imr) |
| 556 | continue; | 588 | continue; |
| 557 | 589 | ||
| 590 | mutex_lock(&umem_odp->umem_mutex); | ||
| 558 | ib_umem_odp_unmap_dma_pages(umem_odp, ib_umem_start(umem_odp), | 591 | ib_umem_odp_unmap_dma_pages(umem_odp, ib_umem_start(umem_odp), |
| 559 | ib_umem_end(umem_odp)); | 592 | ib_umem_end(umem_odp)); |
| 560 | 593 | ||
| 561 | if (umem_odp->dying) | 594 | if (umem_odp->dying) { |
| 595 | mutex_unlock(&umem_odp->umem_mutex); | ||
| 562 | continue; | 596 | continue; |
| 597 | } | ||
| 563 | 598 | ||
| 564 | WRITE_ONCE(umem_odp->dying, 1); | 599 | umem_odp->dying = 1; |
| 565 | atomic_inc(&imr->num_leaf_free); | 600 | atomic_inc(&imr->num_leaf_free); |
| 566 | schedule_work(&umem_odp->work); | 601 | schedule_work(&umem_odp->work); |
| 602 | mutex_unlock(&umem_odp->umem_mutex); | ||
| 567 | } | 603 | } |
| 568 | up_read(&per_mm->umem_rwsem); | 604 | up_read(&per_mm->umem_rwsem); |
| 569 | 605 | ||
| @@ -773,7 +809,7 @@ next_mr: · 203 unmodified lines | |||
| 773 | switch (mmkey->type) { | 809 | switch (mmkey->type) { |
| 774 | case MLX5_MKEY_MR: | 810 | case MLX5_MKEY_MR: |
| 775 | mr = container_of(mmkey, struct mlx5_ib_mr, mmkey); | 811 | mr = container_of(mmkey, struct mlx5_ib_mr, mmkey); |
| 776 | if (!mr->live || !mr->ibmr.pd) { | 812 | if (!smp_load_acquire(&mr->live) || !mr->ibmr.pd) { |
| 777 | mlx5_ib_dbg(dev, "got dead MR\n"); | 813 | mlx5_ib_dbg(dev, "got dead MR\n"); |
| 778 | ret = -EFAULT; | 814 | ret = -EFAULT; |
| 779 | goto srcu_unlock; | 815 | goto srcu_unlock; |
| @@ -1641,12 +1677,12 @@ static bool num_pending_prefetch_inc(struct ib_pd *pd, · 861 unmodified lines | |||
| 1641 | 1677 | ||
| 1642 | mr = container_of(mmkey, struct mlx5_ib_mr, mmkey); | 1678 | mr = container_of(mmkey, struct mlx5_ib_mr, mmkey); |
| 1643 | 1679 | ||
| 1644 | if (mr->ibmr.pd != pd) { | 1680 | if (!smp_load_acquire(&mr->live)) { |
| 1645 | ret = false; | 1681 | ret = false; |
| 1646 | break; | 1682 | break; |
| 1647 | } | 1683 | } |
| 1648 | 1684 | ||
| 1649 | if (!mr->live) { | 1685 | if (mr->ibmr.pd != pd) { |
| 1650 | ret = false; | 1686 | ret = false; |
| 1651 | break; | 1687 | break; |
| 1652 | } | 1688 | } |
| @@ -230,8 +230,6 @@ static void pvrdma_free_srq(struct pvrdma_dev *dev, struct pvrdma_srq *srq) · 229 unmodified lines | |||
| 230 | 230 | ||
| 231 | pvrdma_page_dir_cleanup(dev, &srq->pdir); | 231 | pvrdma_page_dir_cleanup(dev, &srq->pdir); |
| 232 | 232 | ||
| 233 | kfree(srq); | ||
| 234 | |||
| 235 | atomic_dec(&dev->num_srqs); | 233 | atomic_dec(&dev->num_srqs); |
| 236 | } | 234 | } |
| 237 | 235 | ||
| @@ -182,12 +182,19 @@ void siw_qp_llp_close(struct siw_qp *qp) · 181 unmodified lines | |||
| 182 | */ | 182 | */ |
| 183 | void siw_qp_llp_write_space(struct sock *sk) | 183 | void siw_qp_llp_write_space(struct sock *sk) |
| 184 | { | 184 | { |
| 185 | struct siw_cep *cep = sk_to_cep(sk); | 185 | struct siw_cep *cep; |
| 186 | 186 | ||
| 187 | cep->sk_write_space(sk); | 187 | read_lock(&sk->sk_callback_lock); |
| 188 | |||
| 189 | cep = sk_to_cep(sk); | ||
| 190 | if (cep) { | ||
| 191 | cep->sk_write_space(sk); | ||
| 188 | 192 | ||
| 189 | if (!test_bit(SOCK_NOSPACE, &sk->sk_socket->flags)) | 193 | if (!test_bit(SOCK_NOSPACE, &sk->sk_socket->flags)) |
| 190 | (void)siw_sq_start(cep->qp); | 194 | (void)siw_sq_start(cep->qp); |
| 195 | } | ||
| 196 | |||
| 197 | read_unlock(&sk->sk_callback_lock); | ||
| 191 | } | 198 | } |
| 192 | 199 | ||
| 193 | static int siw_qp_readq_init(struct siw_qp *qp, int irq_size, int orq_size) | 200 | static int siw_qp_readq_init(struct siw_qp *qp, int irq_size, int orq_size) |
| @@ -232,10 +232,7 @@ static int da9063_onkey_probe(struct platform_device *pdev) · 231 unmodified lines | |||
| 232 | onkey->input->phys = onkey->phys; | 232 | onkey->input->phys = onkey->phys; |
| 233 | onkey->input->dev.parent = &pdev->dev; | 233 | onkey->input->dev.parent = &pdev->dev; |
| 234 | 234 | ||
| 235 | if (onkey->key_power) | 235 | input_set_capability(onkey->input, EV_KEY, KEY_POWER); |
| 236 | input_set_capability(onkey->input, EV_KEY, KEY_POWER); | ||
| 237 | |||
| 238 | input_set_capability(onkey->input, EV_KEY, KEY_SLEEP); | ||
| 239 | 236 | ||
| 240 | INIT_DELAYED_WORK(&onkey->work, da9063_poll_on); | 237 | INIT_DELAYED_WORK(&onkey->work, da9063_poll_on); |
| 241 | 238 | ||
| @@ -92,11 +92,18 @@ soc_button_device_create(struct platform_device *pdev, · 91 unmodified lines | |||
| 92 | continue; | 92 | continue; |
| 93 | 93 | ||
| 94 | gpio = soc_button_lookup_gpio(&pdev->dev, info->acpi_index); | 94 | gpio = soc_button_lookup_gpio(&pdev->dev, info->acpi_index); |
| 95 | if (gpio < 0 && gpio != -ENOENT) { | 95 | if (!gpio_is_valid(gpio)) { |
| 96 | error = gpio; | 96 | /* |
| 97 | goto err_free_mem; | 97 | * Skip GPIO if not present. Note we deliberately |
| 98 | } else if (!gpio_is_valid(gpio)) { | 98 | * ignore -EPROBE_DEFER errors here. On some devices |
| 99 | /* Skip GPIO if not present */ | 99 | * Intel is using so called virtual GPIOs which are not |
| 100 | * GPIOs at all but some way for AML code to check some | ||
| 101 | * random status bits without need a custom opregion. | ||
| 102 | * In some cases the resources table we parse points to | ||
| 103 | * such a virtual GPIO, since these are not real GPIOs | ||
| 104 | * we do not have a driver for these so they will never | ||
| 105 | * show up, therefore we ignore -EPROBE_DEFER. | ||
| 106 | */ | ||
| 100 | continue; | 107 | continue; |
| 101 | } | 108 | } |
| 102 | 109 | ||
| @@ -1827,31 +1827,6 @@ static int elantech_create_smbus(struct psmouse *psmouse, · 1826 unmodified lines | |||
| 1827 | leave_breadcrumbs); | 1827 | leave_breadcrumbs); |
| 1828 | } | 1828 | } |
| 1829 | 1829 | ||
| 1830 | static bool elantech_use_host_notify(struct psmouse *psmouse, | ||
| 1831 | struct elantech_device_info *info) | ||
| 1832 | { | ||
| 1833 | if (ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version)) | ||
| 1834 | return true; | ||
| 1835 | |||
| 1836 | switch (info->bus) { | ||
| 1837 | case ETP_BUS_PS2_ONLY: | ||
| 1838 | /* expected case */ | ||
| 1839 | break; | ||
| 1840 | case ETP_BUS_SMB_HST_NTFY_ONLY: | ||
| 1841 | case ETP_BUS_PS2_SMB_HST_NTFY: | ||
| 1842 | /* SMbus implementation is stable since 2018 */ | ||
| 1843 | if (dmi_get_bios_year() >= 2018) | ||
| 1844 | return true; | ||
| 1845 | /* fall through */ | ||
| 1846 | default: | ||
| 1847 | psmouse_dbg(psmouse, | ||
| 1848 | "Ignoring SMBus bus provider %d\n", info->bus); | ||
| 1849 | break; | ||
| 1850 | } | ||
| 1851 | |||
| 1852 | return false; | ||
| 1853 | } | ||
| 1854 | |||
| 1855 | /** | 1830 | /** |
| 1856 | * elantech_setup_smbus - called once the PS/2 devices are enumerated | 1831 | * elantech_setup_smbus - called once the PS/2 devices are enumerated |
| 1857 | * and decides to instantiate a SMBus InterTouch device. | 1832 | * and decides to instantiate a SMBus InterTouch device. |
| @@ -1871,7 +1846,7 @@ static int elantech_setup_smbus(struct psmouse *psmouse, · 13 unmodified lines | |||
| 1871 | * i2c_blacklist_pnp_ids. | 1846 | * i2c_blacklist_pnp_ids. |
| 1872 | * Old ICs are up to the user to decide. | 1847 | * Old ICs are up to the user to decide. |
| 1873 | */ | 1848 | */ |
| 1874 | if (!elantech_use_host_notify(psmouse, info) || | 1849 | if (!ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version) || |
| 1875 | psmouse_matches_pnp_id(psmouse, i2c_blacklist_pnp_ids)) | 1850 | psmouse_matches_pnp_id(psmouse, i2c_blacklist_pnp_ids)) |
| 1876 | return -ENXIO; | 1851 | return -ENXIO; |
| 1877 | } | 1852 | } |
| @@ -1891,6 +1866,34 @@ static int elantech_setup_smbus(struct psmouse *psmouse, · 13 unmodified lines | |||
| 1891 | return 0; | 1866 | return 0; |
| 1892 | } | 1867 | } |
| 1893 | 1868 | ||
| 1869 | static bool elantech_use_host_notify(struct psmouse *psmouse, | ||
| 1870 | struct elantech_device_info *info) | ||
| 1871 | { | ||
| 1872 | if (ETP_NEW_IC_SMBUS_HOST_NOTIFY(info->fw_version)) | ||
| 1873 | return true; | ||
| 1874 | |||
| 1875 | switch (info->bus) { | ||
| 1876 | case ETP_BUS_PS2_ONLY: | ||
| 1877 | /* expected case */ | ||
| 1878 | break; | ||
| 1879 | case ETP_BUS_SMB_ALERT_ONLY: | ||
| 1880 | /* fall-through */ | ||
| 1881 | case ETP_BUS_PS2_SMB_ALERT: | ||
| 1882 | psmouse_dbg(psmouse, "Ignoring SMBus provider through alert protocol.\n"); | ||
| 1883 | break; | ||
| 1884 | case ETP_BUS_SMB_HST_NTFY_ONLY: | ||
| 1885 | /* fall-through */ | ||
| 1886 | case ETP_BUS_PS2_SMB_HST_NTFY: | ||
| 1887 | return true; | ||
| 1888 | default: | ||
| 1889 | psmouse_dbg(psmouse, | ||
| 1890 | "Ignoring SMBus bus provider %d.\n", | ||
| 1891 | info->bus); | ||
| 1892 | } | ||
| 1893 | |||
| 1894 | return false; | ||
| 1895 | } | ||
| 1896 | |||
| 1894 | int elantech_init_smbus(struct psmouse *psmouse) | 1897 | int elantech_init_smbus(struct psmouse *psmouse) |
| 1895 | { | 1898 | { |
| 1896 | struct elantech_device_info info; | 1899 | struct elantech_device_info info; |
| @@ -146,7 +146,7 @@ static int rmi_process_interrupt_requests(struct rmi_device *rmi_dev) · 145 unmodified lines | |||
| 146 | } | 146 | } |
| 147 | 147 | ||
| 148 | mutex_lock(&data->irq_mutex); | 148 | mutex_lock(&data->irq_mutex); |
| 149 | bitmap_and(data->irq_status, data->irq_status, data->current_irq_mask, | 149 | bitmap_and(data->irq_status, data->irq_status, data->fn_irq_bits, |
| 150 | data->irq_count); | 150 | data->irq_count); |
| 151 | /* | 151 | /* |
| 152 | * At this point, irq_status has all bits that are set in the | 152 | * At this point, irq_status has all bits that are set in the |
| @@ -385,6 +385,8 @@ static int rmi_driver_set_irq_bits(struct rmi_device *rmi_dev, · 232 unmodified lines | |||
| 385 | bitmap_copy(data->current_irq_mask, data->new_irq_mask, | 385 | bitmap_copy(data->current_irq_mask, data->new_irq_mask, |
| 386 | data->num_of_irq_regs); | 386 | data->num_of_irq_regs); |
| 387 | 387 | ||
| 388 | bitmap_or(data->fn_irq_bits, data->fn_irq_bits, mask, data->irq_count); | ||
| 389 | |||
| 388 | error_unlock: | 390 | error_unlock: |
| 389 | mutex_unlock(&data->irq_mutex); | 391 | mutex_unlock(&data->irq_mutex); |
| 390 | return error; | 392 | return error; |
| @@ -398,6 +400,8 @@ static int rmi_driver_clear_irq_bits(struct rmi_device *rmi_dev, · 7 unmodified lines | |||
| 398 | struct device *dev = &rmi_dev->dev; | 400 | struct device *dev = &rmi_dev->dev; |
| 399 | 401 | ||
| 400 | mutex_lock(&data->irq_mutex); | 402 | mutex_lock(&data->irq_mutex); |
| 403 | bitmap_andnot(data->fn_irq_bits, | ||
| 404 | data->fn_irq_bits, mask, data->irq_count); | ||
| 401 | bitmap_andnot(data->new_irq_mask, | 405 | bitmap_andnot(data->new_irq_mask, |
| 402 | data->current_irq_mask, mask, data->irq_count); | 406 | data->current_irq_mask, mask, data->irq_count); |
| 403 | 407 | ||
| @@ -53,6 +53,7 @@ struct goodix_ts_data { · 52 unmodified lines | |||
| 53 | const char *cfg_name; | 53 | const char *cfg_name; |
| 54 | struct completion firmware_loading_complete; | 54 | struct completion firmware_loading_complete; |
| 55 | unsigned long irq_flags; | 55 | unsigned long irq_flags; |
| 56 | unsigned int contact_size; | ||
| 56 | }; | 57 | }; |
| 57 | 58 | ||
| 58 | #define GOODIX_GPIO_INT_NAME "irq" | 59 | #define GOODIX_GPIO_INT_NAME "irq" |
| @@ -62,6 +63,7 @@ struct goodix_ts_data { · 3 unmodified lines | |||
| 62 | #define GOODIX_MAX_WIDTH 4096 | 63 | #define GOODIX_MAX_WIDTH 4096 |
| 63 | #define GOODIX_INT_TRIGGER 1 | 64 | #define GOODIX_INT_TRIGGER 1 |
| 64 | #define GOODIX_CONTACT_SIZE 8 | 65 | #define GOODIX_CONTACT_SIZE 8 |
| 66 | #define GOODIX_MAX_CONTACT_SIZE 9 | ||
| 65 | #define GOODIX_MAX_CONTACTS 10 | 67 | #define GOODIX_MAX_CONTACTS 10 |
| 66 | 68 | ||
| 67 | #define GOODIX_CONFIG_MAX_LENGTH 240 | 69 | #define GOODIX_CONFIG_MAX_LENGTH 240 |
| @@ -144,6 +146,19 @@ static const struct dmi_system_id rotated_screen[] = { · 76 unmodified lines | |||
| 144 | {} | 146 | {} |
| 145 | }; | 147 | }; |
| 146 | 148 | ||
| 149 | static const struct dmi_system_id nine_bytes_report[] = { | ||
| 150 | #if defined(CONFIG_DMI) && defined(CONFIG_X86) | ||
| 151 | { | ||
| 152 | .ident = "Lenovo YogaBook", | ||
| 153 | /* YB1-X91L/F and YB1-X90L/F */ | ||
| 154 | .matches = { | ||
| 155 | DMI_MATCH(DMI_PRODUCT_NAME, "Lenovo YB1-X9") | ||
| 156 | } | ||
| 157 | }, | ||
| 158 | #endif | ||
| 159 | {} | ||
| 160 | }; | ||
| 161 | |||
| 147 | /** | 162 | /** |
| 148 | * goodix_i2c_read - read data from a register of the i2c slave device. | 163 | * goodix_i2c_read - read data from a register of the i2c slave device. |
| 149 | * | 164 | * |
| @@ -249,7 +264,7 @@ static int goodix_ts_read_input_report(struct goodix_ts_data *ts, u8 *data) · 99 unmodified lines | |||
| 249 | max_timeout = jiffies + msecs_to_jiffies(GOODIX_BUFFER_STATUS_TIMEOUT); | 264 | max_timeout = jiffies + msecs_to_jiffies(GOODIX_BUFFER_STATUS_TIMEOUT); |
| 250 | do { | 265 | do { |
| 251 | error = goodix_i2c_read(ts->client, GOODIX_READ_COOR_ADDR, | 266 | error = goodix_i2c_read(ts->client, GOODIX_READ_COOR_ADDR, |
| 252 | data, GOODIX_CONTACT_SIZE + 1); | 267 | data, ts->contact_size + 1); |
| 253 | if (error) { | 268 | if (error) { |
| 254 | dev_err(&ts->client->dev, "I2C transfer error: %d\n", | 269 | dev_err(&ts->client->dev, "I2C transfer error: %d\n", |
| 255 | error); | 270 | error); |
| @@ -262,12 +277,12 @@ static int goodix_ts_read_input_report(struct goodix_ts_data *ts, u8 *data) · 6 unmodified lines | |||
| 262 | return -EPROTO; | 277 | return -EPROTO; |
| 263 | 278 | ||
| 264 | if (touch_num > 1) { | 279 | if (touch_num > 1) { |
| 265 | data += 1 + GOODIX_CONTACT_SIZE; | 280 | data += 1 + ts->contact_size; |
| 266 | error = goodix_i2c_read(ts->client, | 281 | error = goodix_i2c_read(ts->client, |
| 267 | GOODIX_READ_COOR_ADDR + | 282 | GOODIX_READ_COOR_ADDR + |
| 268 | 1 + GOODIX_CONTACT_SIZE, | 283 | 1 + ts->contact_size, |
| 269 | data, | 284 | data, |
| 270 | GOODIX_CONTACT_SIZE * | 285 | ts->contact_size * |
| 271 | (touch_num - 1)); | 286 | (touch_num - 1)); |
| 272 | if (error) | 287 | if (error) |
| 273 | return error; | 288 | return error; |
| @@ -286,7 +301,7 @@ static int goodix_ts_read_input_report(struct goodix_ts_data *ts, u8 *data) · 12 unmodified lines | |||
| 286 | return 0; | 301 | return 0; |
| 287 | } | 302 | } |
| 288 | 303 | ||
| 289 | static void goodix_ts_report_touch(struct goodix_ts_data *ts, u8 *coor_data) | 304 | static void goodix_ts_report_touch_8b(struct goodix_ts_data *ts, u8 *coor_data) |
| 290 | { | 305 | { |
| 291 | int id = coor_data[0] & 0x0F; | 306 | int id = coor_data[0] & 0x0F; |
| 292 | int input_x = get_unaligned_le16(&coor_data[1]); | 307 | int input_x = get_unaligned_le16(&coor_data[1]); |
| @@ -301,6 +316,21 @@ static void goodix_ts_report_touch(struct goodix_ts_data *ts, u8 *coor_data) · 8 unmodified lines | |||
| 301 | input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, input_w); | 316 | input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, input_w); |
| 302 | } | 317 | } |
| 303 | 318 | ||
| 319 | static void goodix_ts_report_touch_9b(struct goodix_ts_data *ts, u8 *coor_data) | ||
| 320 | { | ||
| 321 | int id = coor_data[1] & 0x0F; | ||
| 322 | int input_x = get_unaligned_le16(&coor_data[3]); | ||
| 323 | int input_y = get_unaligned_le16(&coor_data[5]); | ||
| 324 | int input_w = get_unaligned_le16(&coor_data[7]); | ||
| 325 | |||
| 326 | input_mt_slot(ts->input_dev, id); | ||
| 327 | input_mt_report_slot_state(ts->input_dev, MT_TOOL_FINGER, true); | ||
| 328 | touchscreen_report_pos(ts->input_dev, &ts->prop, | ||
| 329 | input_x, input_y, true); | ||
| 330 | input_report_abs(ts->input_dev, ABS_MT_TOUCH_MAJOR, input_w); | ||
| 331 | input_report_abs(ts->input_dev, ABS_MT_WIDTH_MAJOR, input_w); | ||
| 332 | } | ||
| 333 | |||
| 304 | /** | 334 | /** |
| 305 | * goodix_process_events - Process incoming events | 335 | * goodix_process_events - Process incoming events |
| 306 | * | 336 | * |
| @@ -311,7 +341,7 @@ static void goodix_ts_report_touch(struct goodix_ts_data *ts, u8 *coor_data) · 4 unmodified lines | |||
| 311 | */ | 341 | */ |
| 312 | static void goodix_process_events(struct goodix_ts_data *ts) | 342 | static void goodix_process_events(struct goodix_ts_data *ts) |
| 313 | { | 343 | { |
| 314 | u8 point_data[1 + GOODIX_CONTACT_SIZE * GOODIX_MAX_CONTACTS]; | 344 | u8 point_data[1 + GOODIX_MAX_CONTACT_SIZE * GOODIX_MAX_CONTACTS]; |
| 315 | int touch_num; | 345 | int touch_num; |
| 316 | int i; | 346 | int i; |
| 317 | 347 | ||
| @@ -326,8 +356,12 @@ static void goodix_process_events(struct goodix_ts_data *ts) · 8 unmodified lines | |||
| 326 | input_report_key(ts->input_dev, KEY_LEFTMETA, point_data[0] & BIT(4)); | 356 | input_report_key(ts->input_dev, KEY_LEFTMETA, point_data[0] & BIT(4)); |
| 327 | 357 | ||
| 328 | for (i = 0; i < touch_num; i++) | 358 | for (i = 0; i < touch_num; i++) |
| 329 | goodix_ts_report_touch(ts, | 359 | if (ts->contact_size == 9) |
| 330 | &point_data[1 + GOODIX_CONTACT_SIZE * i]); | 360 | goodix_ts_report_touch_9b(ts, |
| 361 | &point_data[1 + ts->contact_size * i]); | ||
| 362 | else | ||
| 363 | goodix_ts_report_touch_8b(ts, | ||
| 364 | &point_data[1 + ts->contact_size * i]); | ||
| 331 | 365 | ||
| 332 | input_mt_sync_frame(ts->input_dev); | 366 | input_mt_sync_frame(ts->input_dev); |
| 333 | input_sync(ts->input_dev); | 367 | input_sync(ts->input_dev); |
| @@ -730,6 +764,13 @@ static int goodix_configure_dev(struct goodix_ts_data *ts) · 396 unmodified lines | |||
| 730 | "Applying '180 degrees rotated screen' quirk\n"); | 764 | "Applying '180 degrees rotated screen' quirk\n"); |
| 731 | } | 765 | } |
| 732 | 766 | ||
| 767 | if (dmi_check_system(nine_bytes_report)) { | ||
| 768 | ts->contact_size = 9; | ||
| 769 | |||
| 770 | dev_dbg(&ts->client->dev, | ||
| 771 | "Non-standard 9-bytes report format quirk\n"); | ||
| 772 | } | ||
| 773 | |||
| 733 | error = input_mt_init_slots(ts->input_dev, ts->max_touch_num, | 774 | error = input_mt_init_slots(ts->input_dev, ts->max_touch_num, |
| 734 | INPUT_MT_DIRECT | INPUT_MT_DROP_UNUSED); | 775 | INPUT_MT_DIRECT | INPUT_MT_DROP_UNUSED); |
| 735 | if (error) { | 776 | if (error) { |
| @@ -810,6 +851,7 @@ static int goodix_ts_probe(struct i2c_client *client, · 74 unmodified lines | |||
| 810 | ts->client = client; | 851 | ts->client = client; |
| 811 | i2c_set_clientdata(client, ts); | 852 | i2c_set_clientdata(client, ts); |
| 812 | init_completion(&ts->firmware_loading_complete); | 853 | init_completion(&ts->firmware_loading_complete); |
| 854 | ts->contact_size = GOODIX_CONTACT_SIZE; | ||
| 813 | 855 | ||
| 814 | error = goodix_get_gpio_config(ts); | 856 | error = goodix_get_gpio_config(ts); |
| 815 | if (error) | 857 | if (error) |
| @@ -583,7 +583,8 @@ static void iommu_print_event(struct amd_iommu *iommu, void *__evt) · 582 unmodified lines | |||
| 583 | retry: | 583 | retry: |
| 584 | type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; | 584 | type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; |
| 585 | devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; | 585 | devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; |
| 586 | pasid = PPR_PASID(*(u64 *)&event[0]); | 586 | pasid = (event[0] & EVENT_DOMID_MASK_HI) | |
| 587 | (event[1] & EVENT_DOMID_MASK_LO); | ||
| 587 | flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; | 588 | flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; |
| 588 | address = (u64)(((u64)event[3]) << 32) | event[2]; | 589 | address = (u64)(((u64)event[3]) << 32) | event[2]; |
| 589 | 590 | ||
| @@ -616,7 +617,7 @@ retry: · 26 unmodified lines | |||
| 616 | address, flags); | 617 | address, flags); |
| 617 | break; | 618 | break; |
| 618 | case EVENT_TYPE_PAGE_TAB_ERR: | 619 | case EVENT_TYPE_PAGE_TAB_ERR: |
| 619 | dev_err(dev, "Event logged [PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x domain=0x%04x address=0x%llx flags=0x%04x]\n", | 620 | dev_err(dev, "Event logged [PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x pasid=0x%04x address=0x%llx flags=0x%04x]\n", |
| 620 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), | 621 | PCI_BUS_NUM(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 621 | pasid, address, flags); | 622 | pasid, address, flags); |
| 622 | break; | 623 | break; |
| @@ -1463,6 +1464,7 @@ static void free_pagetable(struct protection_domain *domain) · 840 unmodified lines | |||
| 1463 | * to 64 bits. | 1464 | * to 64 bits. |
| 1464 | */ | 1465 | */ |
| 1465 | static bool increase_address_space(struct protection_domain *domain, | 1466 | static bool increase_address_space(struct protection_domain *domain, |
| 1467 | unsigned long address, | ||
| 1466 | gfp_t gfp) | 1468 | gfp_t gfp) |
| 1467 | { | 1469 | { |
| 1468 | unsigned long flags; | 1470 | unsigned long flags; |
| @@ -1471,8 +1473,8 @@ static bool increase_address_space(struct protection_domain *domain, · 2 unmodified lines | |||
| 1471 | 1473 | ||
| 1472 | spin_lock_irqsave(&domain->lock, flags); | 1474 | spin_lock_irqsave(&domain->lock, flags); |
| 1473 | 1475 | ||
| 1474 | if (WARN_ON_ONCE(domain->mode == PAGE_MODE_6_LEVEL)) | 1476 | if (address <= PM_LEVEL_SIZE(domain->mode) || |
| 1475 | /* address space already 64 bit large */ | 1477 | WARN_ON_ONCE(domain->mode == PAGE_MODE_6_LEVEL)) |
| 1476 | goto out; | 1478 | goto out; |
| 1477 | 1479 | ||
| 1478 | pte = (void *)get_zeroed_page(gfp); | 1480 | pte = (void *)get_zeroed_page(gfp); |
| @@ -1505,7 +1507,7 @@ static u64 *alloc_pte(struct protection_domain *domain, · 26 unmodified lines | |||
| 1505 | BUG_ON(!is_power_of_2(page_size)); | 1507 | BUG_ON(!is_power_of_2(page_size)); |
| 1506 | 1508 | ||
| 1507 | while (address > PM_LEVEL_SIZE(domain->mode)) | 1509 | while (address > PM_LEVEL_SIZE(domain->mode)) |
| 1508 | *updated = increase_address_space(domain, gfp) || *updated; | 1510 | *updated = increase_address_space(domain, address, gfp) || *updated; |
| 1509 | 1511 | ||
| 1510 | level = domain->mode - 1; | 1512 | level = domain->mode - 1; |
| 1511 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; | 1513 | pte = &domain->pt_root[PM_LEVEL_INDEX(level, address)]; |
| @@ -130,8 +130,8 @@ · 129 unmodified lines | |||
| 130 | #define EVENT_TYPE_INV_PPR_REQ 0x9 | 130 | #define EVENT_TYPE_INV_PPR_REQ 0x9 |
| 131 | #define EVENT_DEVID_MASK 0xffff | 131 | #define EVENT_DEVID_MASK 0xffff |
| 132 | #define EVENT_DEVID_SHIFT 0 | 132 | #define EVENT_DEVID_SHIFT 0 |
| 133 | #define EVENT_DOMID_MASK 0xffff | 133 | #define EVENT_DOMID_MASK_LO 0xffff |
| 134 | #define EVENT_DOMID_SHIFT 0 | 134 | #define EVENT_DOMID_MASK_HI 0xf0000 |
| 135 | #define EVENT_FLAGS_MASK 0xfff | 135 | #define EVENT_FLAGS_MASK 0xfff |
| 136 | #define EVENT_FLAGS_SHIFT 0x10 | 136 | #define EVENT_FLAGS_SHIFT 0x10 |
| 137 | 137 | ||
| @@ -812,6 +812,7 @@ static int arm_smmu_init_domain_context(struct iommu_domain *domain, · 811 unmodified lines | |||
| 812 | return 0; | 812 | return 0; |
| 813 | 813 | ||
| 814 | out_clear_smmu: | 814 | out_clear_smmu: |
| 815 | __arm_smmu_free_bitmap(smmu->context_map, cfg->cbndx); | ||
| 815 | smmu_domain->smmu = NULL; | 816 | smmu_domain->smmu = NULL; |
| 816 | out_unlock: | 817 | out_unlock: |
| 817 | mutex_unlock(&smmu_domain->init_mutex); | 818 | mutex_unlock(&smmu_domain->init_mutex); |
| @@ -166,6 +166,9 @@ · 165 unmodified lines | |||
| 166 | #define ARM_MALI_LPAE_TTBR_READ_INNER BIT(2) | 166 | #define ARM_MALI_LPAE_TTBR_READ_INNER BIT(2) |
| 167 | #define ARM_MALI_LPAE_TTBR_SHARE_OUTER BIT(4) | 167 | #define ARM_MALI_LPAE_TTBR_SHARE_OUTER BIT(4) |
| 168 | 168 | ||
| 169 | #define ARM_MALI_LPAE_MEMATTR_IMP_DEF 0x88ULL | ||
| 170 | #define ARM_MALI_LPAE_MEMATTR_WRITE_ALLOC 0x8DULL | ||
| 171 | |||
| 169 | /* IOPTE accessors */ | 172 | /* IOPTE accessors */ |
| 170 | #define iopte_deref(pte,d) __va(iopte_to_paddr(pte, d)) | 173 | #define iopte_deref(pte,d) __va(iopte_to_paddr(pte, d)) |
| 171 | 174 | ||
| @@ -1015,27 +1018,56 @@ arm_32_lpae_alloc_pgtable_s2(struct io_pgtable_cfg *cfg, void *cookie) · 843 unmodified lines | |||
| 1015 | static struct io_pgtable * | 1018 | static struct io_pgtable * |
| 1016 | arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) | 1019 | arm_mali_lpae_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie) |
| 1017 | { | 1020 | { |
| 1018 | struct io_pgtable *iop; | 1021 | struct arm_lpae_io_pgtable *data; |
| 1019 | 1022 | ||
| 1020 | if (cfg->ias != 48 || cfg->oas > 40) | 1023 | /* No quirks for Mali (hopefully) */ |
| 1024 | if (cfg->quirks) | ||
| 1025 | return NULL; | ||
| 1026 | |||
| 1027 | if (cfg->ias > 48 || cfg->oas > 40) | ||
| 1021 | return NULL; | 1028 | return NULL; |
| 1022 | 1029 | ||
| 1023 | cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G); | 1030 | cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G); |
| 1024 | iop = arm_64_lpae_alloc_pgtable_s1(cfg, cookie); | ||
| 1025 | if (iop) { | ||
| 1026 | u64 mair, ttbr; | ||
| 1027 | 1031 | ||
| 1028 | /* Copy values as union fields overlap */ | 1032 | data = arm_lpae_alloc_pgtable(cfg); |
| 1029 | mair = cfg->arm_lpae_s1_cfg.mair[0]; | 1033 | if (!data) |
| 1030 | ttbr = cfg->arm_lpae_s1_cfg.ttbr[0]; | 1034 | return NULL; |
| 1031 | 1035 | ||
| 1032 | cfg->arm_mali_lpae_cfg.memattr = mair; | 1036 | /* Mali seems to need a full 4-level table regardless of IAS */ |
| 1033 | cfg->arm_mali_lpae_cfg.transtab = ttbr | | 1037 | if (data->levels < ARM_LPAE_MAX_LEVELS) { |
| 1034 | ARM_MALI_LPAE_TTBR_READ_INNER | | 1038 | data->levels = ARM_LPAE_MAX_LEVELS; |
| 1035 | ARM_MALI_LPAE_TTBR_ADRMODE_TABLE; | 1039 | data->pgd_size = sizeof(arm_lpae_iopte); |
| 1036 | } | 1040 | } |
| 1041 | /* | ||
| 1042 | * MEMATTR: Mali has no actual notion of a non-cacheable type, so the | ||
| 1043 | * best we can do is mimic the out-of-tree driver and hope that the | ||
| 1044 | * "implementation-defined caching policy" is good enough. Similarly, | ||
| 1045 | * we'll use it for the sake of a valid attribute for our 'device' | ||
| 1046 | * index, although callers should never request that in practice. | ||
| 1047 | */ | ||
| 1048 | cfg->arm_mali_lpae_cfg.memattr = | ||
| 1049 | (ARM_MALI_LPAE_MEMATTR_IMP_DEF | ||
| 1050 | << ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_NC)) | | ||
| 1051 | (ARM_MALI_LPAE_MEMATTR_WRITE_ALLOC | ||
| 1052 | << ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_CACHE)) | | ||
| 1053 | (ARM_MALI_LPAE_MEMATTR_IMP_DEF | ||
| 1054 | << ARM_LPAE_MAIR_ATTR_SHIFT(ARM_LPAE_MAIR_ATTR_IDX_DEV)); | ||
| 1037 | 1055 | ||
| 1038 | return iop; | 1056 | data->pgd = __arm_lpae_alloc_pages(data->pgd_size, GFP_KERNEL, cfg); |
| 1057 | if (!data->pgd) | ||
| 1058 | goto out_free_data; | ||
| 1059 | |||
| 1060 | /* Ensure the empty pgd is visible before TRANSTAB can be written */ | ||
| 1061 | wmb(); | ||
| 1062 | |||
| 1063 | cfg->arm_mali_lpae_cfg.transtab = virt_to_phys(data->pgd) | | ||
| 1064 | ARM_MALI_LPAE_TTBR_READ_INNER | | ||
| 1065 | ARM_MALI_LPAE_TTBR_ADRMODE_TABLE; | ||
| 1066 | return &data->iop; | ||
| 1067 | |||
| 1068 | out_free_data: | ||
| 1069 | kfree(data); | ||
| 1070 | return NULL; | ||
| 1039 | } | 1071 | } |
| 1040 | 1072 | ||
| 1041 | struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns = { | 1073 | struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns = { |
| @@ -1086,8 +1086,6 @@ static int ipmmu_probe(struct platform_device *pdev) · 1085 unmodified lines | |||
| 1086 | 1086 | ||
| 1087 | mmu->num_ctx = min(IPMMU_CTX_MAX, mmu->features->number_of_contexts); | 1087 | mmu->num_ctx = min(IPMMU_CTX_MAX, mmu->features->number_of_contexts); |
| 1088 | 1088 | ||
| 1089 | irq = platform_get_irq(pdev, 0); | ||
| 1090 | |||
| 1091 | /* | 1089 | /* |
| 1092 | * Determine if this IPMMU instance is a root device by checking for | 1090 | * Determine if this IPMMU instance is a root device by checking for |
| 1093 | * the lack of has_cache_leaf_nodes flag or renesas,ipmmu-main property. | 1091 | * the lack of has_cache_leaf_nodes flag or renesas,ipmmu-main property. |
| @@ -1106,6 +1104,7 @@ static int ipmmu_probe(struct platform_device *pdev) · 12 unmodified lines | |||
| 1106 | 1104 | ||
| 1107 | /* Root devices have mandatory IRQs */ | 1105 | /* Root devices have mandatory IRQs */ |
| 1108 | if (ipmmu_is_root(mmu)) { | 1106 | if (ipmmu_is_root(mmu)) { |
| 1107 | irq = platform_get_irq(pdev, 0); | ||
| 1109 | if (irq < 0) { | 1108 | if (irq < 0) { |
| 1110 | dev_err(&pdev->dev, "no IRQ found\n"); | 1109 | dev_err(&pdev->dev, "no IRQ found\n"); |
| 1111 | return irq; | 1110 | return irq; |
| @@ -100,6 +100,7 @@ struct rk_iommu { · 99 unmodified lines | |||
| 100 | struct device *dev; | 100 | struct device *dev; |
| 101 | void __iomem **bases; | 101 | void __iomem **bases; |
| 102 | int num_mmu; | 102 | int num_mmu; |
| 103 | int num_irq; | ||
| 103 | struct clk_bulk_data *clocks; | 104 | struct clk_bulk_data *clocks; |
| 104 | int num_clocks; | 105 | int num_clocks; |
| 105 | bool reset_disabled; | 106 | bool reset_disabled; |
| @@ -1136,7 +1137,7 @@ static int rk_iommu_probe(struct platform_device *pdev) · 1030 unmodified lines | |||
| 1136 | struct rk_iommu *iommu; | 1137 | struct rk_iommu *iommu; |
| 1137 | struct resource *res; | 1138 | struct resource *res; |
| 1138 | int num_res = pdev->num_resources; | 1139 | int num_res = pdev->num_resources; |
| 1139 | int err, i, irq; | 1140 | int err, i; |
| 1140 | 1141 | ||
| 1141 | iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL); | 1142 | iommu = devm_kzalloc(dev, sizeof(*iommu), GFP_KERNEL); |
| 1142 | if (!iommu) | 1143 | if (!iommu) |
| @@ -1163,6 +1164,10 @@ static int rk_iommu_probe(struct platform_device *pdev) · 20 unmodified lines | |||
| 1163 | if (iommu->num_mmu == 0) | 1164 | if (iommu->num_mmu == 0) |
| 1164 | return PTR_ERR(iommu->bases[0]); | 1165 | return PTR_ERR(iommu->bases[0]); |
| 1165 | 1166 | ||
| 1167 | iommu->num_irq = platform_irq_count(pdev); | ||
| 1168 | if (iommu->num_irq < 0) | ||
| 1169 | return iommu->num_irq; | ||
| 1170 | |||
| 1166 | iommu->reset_disabled = device_property_read_bool(dev, | 1171 | iommu->reset_disabled = device_property_read_bool(dev, |
| 1167 | "rockchip,disable-mmu-reset"); | 1172 | "rockchip,disable-mmu-reset"); |
| 1168 | 1173 | ||
| @@ -1219,8 +1224,9 @@ static int rk_iommu_probe(struct platform_device *pdev) · 50 unmodified lines | |||
| 1219 | 1224 | ||
| 1220 | pm_runtime_enable(dev); | 1225 | pm_runtime_enable(dev); |
| 1221 | 1226 | ||
| 1222 | i = 0; | 1227 | for (i = 0; i < iommu->num_irq; i++) { |
| 1223 | while ((irq = platform_get_irq(pdev, i++)) != -ENXIO) { | 1228 | int irq = platform_get_irq(pdev, i); |
| 1229 | |||
| 1224 | if (irq < 0) | 1230 | if (irq < 0) |
| 1225 | return irq; | 1231 | return irq; |
| 1226 | 1232 | ||
| @@ -1245,10 +1251,13 @@ err_unprepare_clocks: · 18 unmodified lines | |||
| 1245 | static void rk_iommu_shutdown(struct platform_device *pdev) | 1251 | static void rk_iommu_shutdown(struct platform_device *pdev) |
| 1246 | { | 1252 | { |
| 1247 | struct rk_iommu *iommu = platform_get_drvdata(pdev); | 1253 | struct rk_iommu *iommu = platform_get_drvdata(pdev); |
| 1248 | int i = 0, irq; | 1254 | int i; |
| 1255 | |||
| 1256 | for (i = 0; i < iommu->num_irq; i++) { | ||
| 1257 | int irq = platform_get_irq(pdev, i); | ||
| 1249 | 1258 | ||
| 1250 | while ((irq = platform_get_irq(pdev, i++)) != -ENXIO) | ||
| 1251 | devm_free_irq(iommu->dev, irq, iommu); | 1259 | devm_free_irq(iommu->dev, irq, iommu); |
| 1260 | } | ||
| 1252 | 1261 | ||
| 1253 | pm_runtime_force_suspend(&pdev->dev); | 1262 | pm_runtime_force_suspend(&pdev->dev); |
| 1254 | } | 1263 | } |
| @@ -15,6 +15,7 @@ · 14 unmodified lines | |||
| 15 | 15 | ||
| 16 | /* FIC Registers */ | 16 | /* FIC Registers */ |
| 17 | #define AL_FIC_CAUSE 0x00 | 17 | #define AL_FIC_CAUSE 0x00 |
| 18 | #define AL_FIC_SET_CAUSE 0x08 | ||
| 18 | #define AL_FIC_MASK 0x10 | 19 | #define AL_FIC_MASK 0x10 |
| 19 | #define AL_FIC_CONTROL 0x28 | 20 | #define AL_FIC_CONTROL 0x28 |
| 20 | 21 | ||
| @@ -126,6 +127,16 @@ static void al_fic_irq_handler(struct irq_desc *desc) · 105 unmodified lines | |||
| 126 | chained_irq_exit(irqchip, desc); | 127 | chained_irq_exit(irqchip, desc); |
| 127 | } | 128 | } |
| 128 | 129 | ||
| 130 | static int al_fic_irq_retrigger(struct irq_data *data) | ||
| 131 | { | ||
| 132 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(data); | ||
| 133 | struct al_fic *fic = gc->private; | ||
| 134 | |||
| 135 | writel_relaxed(BIT(data->hwirq), fic->base + AL_FIC_SET_CAUSE); | ||
| 136 | |||
| 137 | return 1; | ||
| 138 | } | ||
| 139 | |||
| 129 | static int al_fic_register(struct device_node *node, | 140 | static int al_fic_register(struct device_node *node, |
| 130 | struct al_fic *fic) | 141 | struct al_fic *fic) |
| 131 | { | 142 | { |
| @@ -159,6 +170,7 @@ static int al_fic_register(struct device_node *node, · 27 unmodified lines | |||
| 159 | gc->chip_types->chip.irq_unmask = irq_gc_mask_clr_bit; | 170 | gc->chip_types->chip.irq_unmask = irq_gc_mask_clr_bit; |
| 160 | gc->chip_types->chip.irq_ack = irq_gc_ack_clr_bit; | 171 | gc->chip_types->chip.irq_ack = irq_gc_ack_clr_bit; |
| 161 | gc->chip_types->chip.irq_set_type = al_fic_irq_set_type; | 172 | gc->chip_types->chip.irq_set_type = al_fic_irq_set_type; |
| 173 | gc->chip_types->chip.irq_retrigger = al_fic_irq_retrigger; | ||
| 162 | gc->chip_types->chip.flags = IRQCHIP_SKIP_SET_WAKE; | 174 | gc->chip_types->chip.flags = IRQCHIP_SKIP_SET_WAKE; |
| 163 | gc->private = fic; | 175 | gc->private = fic; |
| 164 | 176 | ||
| @@ -313,6 +313,7 @@ static void __init sama5d3_aic_irq_fixup(void) · 312 unmodified lines | |||
| 313 | static const struct of_device_id aic5_irq_fixups[] __initconst = { | 313 | static const struct of_device_id aic5_irq_fixups[] __initconst = { |
| 314 | { .compatible = "atmel,sama5d3", .data = sama5d3_aic_irq_fixup }, | 314 | { .compatible = "atmel,sama5d3", .data = sama5d3_aic_irq_fixup }, |
| 315 | { .compatible = "atmel,sama5d4", .data = sama5d3_aic_irq_fixup }, | 315 | { .compatible = "atmel,sama5d4", .data = sama5d3_aic_irq_fixup }, |
| 316 | { .compatible = "microchip,sam9x60", .data = sama5d3_aic_irq_fixup }, | ||
| 316 | { /* sentinel */ }, | 317 | { /* sentinel */ }, |
| 317 | }; | 318 | }; |
| 318 | 319 | ||
| @@ -390,3 +391,12 @@ static int __init sama5d4_aic5_of_init(struct device_node *node, · 71 unmodified lines | |||
| 390 | return aic5_of_init(node, parent, NR_SAMA5D4_IRQS); | 391 | return aic5_of_init(node, parent, NR_SAMA5D4_IRQS); |
| 391 | } | 392 | } |
| 392 | IRQCHIP_DECLARE(sama5d4_aic5, "atmel,sama5d4-aic", sama5d4_aic5_of_init); | 393 | IRQCHIP_DECLARE(sama5d4_aic5, "atmel,sama5d4-aic", sama5d4_aic5_of_init); |
| 394 | |||
| 395 | #define NR_SAM9X60_IRQS 50 | ||
| 396 | |||
| 397 | static int __init sam9x60_aic5_of_init(struct device_node *node, | ||
| 398 | struct device_node *parent) | ||
| 399 | { | ||
| 400 | return aic5_of_init(node, parent, NR_SAM9X60_IRQS); | ||
| 401 | } | ||
| 402 | IRQCHIP_DECLARE(sam9x60_aic5, "microchip,sam9x60-aic", sam9x60_aic5_of_init); | ||
| @@ -59,7 +59,7 @@ static struct gic_chip_data gic_data __read_mostly; · 58 unmodified lines | |||
| 59 | static DEFINE_STATIC_KEY_TRUE(supports_deactivate_key); | 59 | static DEFINE_STATIC_KEY_TRUE(supports_deactivate_key); |
| 60 | 60 | ||
| 61 | #define GIC_ID_NR (1U << GICD_TYPER_ID_BITS(gic_data.rdists.gicd_typer)) | 61 | #define GIC_ID_NR (1U << GICD_TYPER_ID_BITS(gic_data.rdists.gicd_typer)) |
| 62 | #define GIC_LINE_NR max(GICD_TYPER_SPIS(gic_data.rdists.gicd_typer), 1020U) | 62 | #define GIC_LINE_NR min(GICD_TYPER_SPIS(gic_data.rdists.gicd_typer), 1020U) |
| 63 | #define GIC_ESPI_NR GICD_TYPER_ESPIS(gic_data.rdists.gicd_typer) | 63 | #define GIC_ESPI_NR GICD_TYPER_ESPIS(gic_data.rdists.gicd_typer) |
| 64 | 64 | ||
| 65 | /* | 65 | /* |
| @@ -97,7 +97,7 @@ static inline void plic_irq_toggle(const struct cpumask *mask, · 96 unmodified lines | |||
| 97 | } | 97 | } |
| 98 | } | 98 | } |
| 99 | 99 | ||
| 100 | static void plic_irq_enable(struct irq_data *d) | 100 | static void plic_irq_unmask(struct irq_data *d) |
| 101 | { | 101 | { |
| 102 | unsigned int cpu = cpumask_any_and(irq_data_get_affinity_mask(d), | 102 | unsigned int cpu = cpumask_any_and(irq_data_get_affinity_mask(d), |
| 103 | cpu_online_mask); | 103 | cpu_online_mask); |
| @@ -106,7 +106,7 @@ static void plic_irq_enable(struct irq_data *d) · 2 unmodified lines | |||
| 106 | plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1); | 106 | plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1); |
| 107 | } | 107 | } |
| 108 | 108 | ||
| 109 | static void plic_irq_disable(struct irq_data *d) | 109 | static void plic_irq_mask(struct irq_data *d) |
| 110 | { | 110 | { |
| 111 | plic_irq_toggle(cpu_possible_mask, d->hwirq, 0); | 111 | plic_irq_toggle(cpu_possible_mask, d->hwirq, 0); |
| 112 | } | 112 | } |
| @@ -125,10 +125,8 @@ static int plic_set_affinity(struct irq_data *d, · 12 unmodified lines | |||
| 125 | if (cpu >= nr_cpu_ids) | 125 | if (cpu >= nr_cpu_ids) |
| 126 | return -EINVAL; | 126 | return -EINVAL; |
| 127 | 127 | ||
| 128 | if (!irqd_irq_disabled(d)) { | 128 | plic_irq_toggle(cpu_possible_mask, d->hwirq, 0); |
| 129 | plic_irq_toggle(cpu_possible_mask, d->hwirq, 0); | 129 | plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1); |
| 130 | plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1); | ||
| 131 | } | ||
| 132 | 130 | ||
| 133 | irq_data_update_effective_affinity(d, cpumask_of(cpu)); | 131 | irq_data_update_effective_affinity(d, cpumask_of(cpu)); |
| 134 | 132 | ||
| @@ -136,14 +134,18 @@ static int plic_set_affinity(struct irq_data *d, · 1 unmodified line | |||
| 136 | } | 134 | } |
| 137 | #endif | 135 | #endif |
| 138 | 136 | ||
| 137 | static void plic_irq_eoi(struct irq_data *d) | ||
| 138 | { | ||
| 139 | struct plic_handler *handler = this_cpu_ptr(&plic_handlers); | ||
| 140 | |||
| 141 | writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM); | ||
| 142 | } | ||
| 143 | |||
| 139 | static struct irq_chip plic_chip = { | 144 | static struct irq_chip plic_chip = { |
| 140 | .name = "SiFive PLIC", | 145 | .name = "SiFive PLIC", |
| 141 | /* | 146 | .irq_mask = plic_irq_mask, |
| 142 | * There is no need to mask/unmask PLIC interrupts. They are "masked" | 147 | .irq_unmask = plic_irq_unmask, |
| 143 | * by reading claim and "unmasked" when writing it back. | 148 | .irq_eoi = plic_irq_eoi, |
| 144 | */ | ||
| 145 | .irq_enable = plic_irq_enable, | ||
| 146 | .irq_disable = plic_irq_disable, | ||
| 147 | #ifdef CONFIG_SMP | 149 | #ifdef CONFIG_SMP |
| 148 | .irq_set_affinity = plic_set_affinity, | 150 | .irq_set_affinity = plic_set_affinity, |
| 149 | #endif | 151 | #endif |
| @@ -152,7 +154,7 @@ static struct irq_chip plic_chip = { · 2 unmodified lines | |||
| 152 | static int plic_irqdomain_map(struct irq_domain *d, unsigned int irq, | 154 | static int plic_irqdomain_map(struct irq_domain *d, unsigned int irq, |
| 153 | irq_hw_number_t hwirq) | 155 | irq_hw_number_t hwirq) |
| 154 | { | 156 | { |
| 155 | irq_set_chip_and_handler(irq, &plic_chip, handle_simple_irq); | 157 | irq_set_chip_and_handler(irq, &plic_chip, handle_fasteoi_irq); |
| 156 | irq_set_chip_data(irq, NULL); | 158 | irq_set_chip_data(irq, NULL); |
| 157 | irq_set_noprobe(irq); | 159 | irq_set_noprobe(irq); |
| 158 | return 0; | 160 | return 0; |
| @@ -188,7 +190,6 @@ static void plic_handle_irq(struct pt_regs *regs) · 29 unmodified lines | |||
| 188 | hwirq); | 190 | hwirq); |
| 189 | else | 191 | else |
| 190 | generic_handle_irq(irq); | 192 | generic_handle_irq(irq); |
| 191 | writel(hwirq, claim); | ||
| 192 | } | 193 | } |
| 193 | csr_set(sie, SIE_SEIE); | 194 | csr_set(sie, SIE_SEIE); |
| 194 | } | 195 | } |
| @@ -542,7 +542,7 @@ static void wake_migration_worker(struct cache *cache) · 541 unmodified lines | |||
| 542 | 542 | ||
| 543 | static struct dm_bio_prison_cell_v2 *alloc_prison_cell(struct cache *cache) | 543 | static struct dm_bio_prison_cell_v2 *alloc_prison_cell(struct cache *cache) |
| 544 | { | 544 | { |
| 545 | return dm_bio_prison_alloc_cell_v2(cache->prison, GFP_NOWAIT); | 545 | return dm_bio_prison_alloc_cell_v2(cache->prison, GFP_NOIO); |
| 546 | } | 546 | } |
| 547 | 547 | ||
| 548 | static void free_prison_cell(struct cache *cache, struct dm_bio_prison_cell_v2 *cell) | 548 | static void free_prison_cell(struct cache *cache, struct dm_bio_prison_cell_v2 *cell) |
| @@ -554,9 +554,7 @@ static struct dm_cache_migration *alloc_migration(struct cache *cache) · 5 unmodified lines | |||
| 554 | { | 554 | { |
| 555 | struct dm_cache_migration *mg; | 555 | struct dm_cache_migration *mg; |
| 556 | 556 | ||
| 557 | mg = mempool_alloc(&cache->migration_pool, GFP_NOWAIT); | 557 | mg = mempool_alloc(&cache->migration_pool, GFP_NOIO); |
| 558 | if (!mg) | ||
| 559 | return NULL; | ||
| 560 | 558 | ||
| 561 | memset(mg, 0, sizeof(*mg)); | 559 | memset(mg, 0, sizeof(*mg)); |
| 562 | 560 | ||
| @@ -664,10 +662,6 @@ static bool bio_detain_shared(struct cache *cache, dm_oblock_t oblock, struct bi · 101 unmodified lines | |||
| 664 | struct dm_bio_prison_cell_v2 *cell_prealloc, *cell; | 662 | struct dm_bio_prison_cell_v2 *cell_prealloc, *cell; |
| 665 | 663 | ||
| 666 | cell_prealloc = alloc_prison_cell(cache); /* FIXME: allow wait if calling from worker */ | 664 | cell_prealloc = alloc_prison_cell(cache); /* FIXME: allow wait if calling from worker */ |
| 667 | if (!cell_prealloc) { | ||
| 668 | defer_bio(cache, bio); | ||
| 669 | return false; | ||
| 670 | } | ||
| 671 | 665 | ||
| 672 | build_key(oblock, end, &key); | 666 | build_key(oblock, end, &key); |
| 673 | r = dm_cell_get_v2(cache->prison, &key, lock_level(bio), bio, cell_prealloc, &cell); | 667 | r = dm_cell_get_v2(cache->prison, &key, lock_level(bio), bio, cell_prealloc, &cell); |
| @@ -1493,11 +1487,6 @@ static int mg_lock_writes(struct dm_cache_migration *mg) · 819 unmodified lines | |||
| 1493 | struct dm_bio_prison_cell_v2 *prealloc; | 1487 | struct dm_bio_prison_cell_v2 *prealloc; |
| 1494 | 1488 | ||
| 1495 | prealloc = alloc_prison_cell(cache); | 1489 | prealloc = alloc_prison_cell(cache); |
| 1496 | if (!prealloc) { | ||
| 1497 | DMERR_LIMIT("%s: alloc_prison_cell failed", cache_device_name(cache)); | ||
| 1498 | mg_complete(mg, false); | ||
| 1499 | return -ENOMEM; | ||
| 1500 | } | ||
| 1501 | 1490 | ||
| 1502 | /* | 1491 | /* |
| 1503 | * Prevent writes to the block, but allow reads to continue. | 1492 | * Prevent writes to the block, but allow reads to continue. |
| @@ -1535,11 +1524,6 @@ static int mg_start(struct cache *cache, struct policy_work *op, struct bio *bio · 31 unmodified lines | |||
| 1535 | } | 1524 | } |
| 1536 | 1525 | ||
| 1537 | mg = alloc_migration(cache); | 1526 | mg = alloc_migration(cache); |
| 1538 | if (!mg) { | ||
| 1539 | policy_complete_background_work(cache->policy, op, false); | ||
| 1540 | background_work_end(cache); | ||
| 1541 | return -ENOMEM; | ||
| 1542 | } | ||
| 1543 | 1527 | ||
| 1544 | mg->op = op; | 1528 | mg->op = op; |
| 1545 | mg->overwrite_bio = bio; | 1529 | mg->overwrite_bio = bio; |
| @@ -1628,10 +1612,6 @@ static int invalidate_lock(struct dm_cache_migration *mg) · 82 unmodified lines | |||
| 1628 | struct dm_bio_prison_cell_v2 *prealloc; | 1612 | struct dm_bio_prison_cell_v2 *prealloc; |
| 1629 | 1613 | ||
| 1630 | prealloc = alloc_prison_cell(cache); | 1614 | prealloc = alloc_prison_cell(cache); |
| 1631 | if (!prealloc) { | ||
| 1632 | invalidate_complete(mg, false); | ||
| 1633 | return -ENOMEM; | ||
| 1634 | } | ||
| 1635 | 1615 | ||
| 1636 | build_key(mg->invalidate_oblock, oblock_succ(mg->invalidate_oblock), &key); | 1616 | build_key(mg->invalidate_oblock, oblock_succ(mg->invalidate_oblock), &key); |
| 1637 | r = dm_cell_lock_v2(cache->prison, &key, | 1617 | r = dm_cell_lock_v2(cache->prison, &key, |
| @@ -1669,10 +1649,6 @@ static int invalidate_start(struct cache *cache, dm_cblock_t cblock, · 31 unmodified lines | |||
| 1669 | return -EPERM; | 1649 | return -EPERM; |
| 1670 | 1650 | ||
| 1671 | mg = alloc_migration(cache); | 1651 | mg = alloc_migration(cache); |
| 1672 | if (!mg) { | ||
| 1673 | background_work_end(cache); | ||
| 1674 | return -ENOMEM; | ||
| 1675 | } | ||
| 1676 | 1652 | ||
| 1677 | mg->overwrite_bio = bio; | 1653 | mg->overwrite_bio = bio; |
| 1678 | mg->invalidate_cblock = cblock; | 1654 | mg->invalidate_cblock = cblock; |
| @@ -591,8 +591,8 @@ static struct hash_table_bucket *get_hash_table_bucket(struct clone *clone, · 590 unmodified lines | |||
| 591 | * | 591 | * |
| 592 | * NOTE: Must be called with the bucket lock held | 592 | * NOTE: Must be called with the bucket lock held |
| 593 | */ | 593 | */ |
| 594 | struct dm_clone_region_hydration *__hash_find(struct hash_table_bucket *bucket, | 594 | static struct dm_clone_region_hydration *__hash_find(struct hash_table_bucket *bucket, |
| 595 | unsigned long region_nr) | 595 | unsigned long region_nr) |
| 596 | { | 596 | { |
| 597 | struct dm_clone_region_hydration *hd; | 597 | struct dm_clone_region_hydration *hd; |
| 598 | 598 | ||
| @@ -18,7 +18,6 @@ · 17 unmodified lines | |||
| 18 | #include <linux/vmalloc.h> | 18 | #include <linux/vmalloc.h> |
| 19 | #include <linux/log2.h> | 19 | #include <linux/log2.h> |
| 20 | #include <linux/dm-kcopyd.h> | 20 | #include <linux/dm-kcopyd.h> |
| 21 | #include <linux/semaphore.h> | ||
| 22 | 21 | ||
| 23 | #include "dm.h" | 22 | #include "dm.h" |
| 24 | 23 | ||
| @@ -107,8 +106,8 @@ struct dm_snapshot { · 82 unmodified lines | |||
| 107 | /* The on disk metadata handler */ | 106 | /* The on disk metadata handler */ |
| 108 | struct dm_exception_store *store; | 107 | struct dm_exception_store *store; |
| 109 | 108 | ||
| 110 | /* Maximum number of in-flight COW jobs. */ | 109 | unsigned in_progress; |
| 111 | struct semaphore cow_count; | 110 | struct wait_queue_head in_progress_wait; |
| 112 | 111 | ||
| 113 | struct dm_kcopyd_client *kcopyd_client; | 112 | struct dm_kcopyd_client *kcopyd_client; |
| 114 | 113 | ||
| @@ -162,8 +161,8 @@ struct dm_snapshot { · 47 unmodified lines | |||
| 162 | */ | 161 | */ |
| 163 | #define DEFAULT_COW_THRESHOLD 2048 | 162 | #define DEFAULT_COW_THRESHOLD 2048 |
| 164 | 163 | ||
| 165 | static int cow_threshold = DEFAULT_COW_THRESHOLD; | 164 | static unsigned cow_threshold = DEFAULT_COW_THRESHOLD; |
| 166 | module_param_named(snapshot_cow_threshold, cow_threshold, int, 0644); | 165 | module_param_named(snapshot_cow_threshold, cow_threshold, uint, 0644); |
| 167 | MODULE_PARM_DESC(snapshot_cow_threshold, "Maximum number of chunks being copied on write"); | 166 | MODULE_PARM_DESC(snapshot_cow_threshold, "Maximum number of chunks being copied on write"); |
| 168 | 167 | ||
| 169 | DECLARE_DM_KCOPYD_THROTTLE_WITH_MODULE_PARM(snapshot_copy_throttle, | 168 | DECLARE_DM_KCOPYD_THROTTLE_WITH_MODULE_PARM(snapshot_copy_throttle, |
| @@ -1327,7 +1326,7 @@ static int snapshot_ctr(struct dm_target *ti, unsigned int argc, char **argv) · 1157 unmodified lines | |||
| 1327 | goto bad_hash_tables; | 1326 | goto bad_hash_tables; |
| 1328 | } | 1327 | } |
| 1329 | 1328 | ||
| 1330 | sema_init(&s->cow_count, (cow_threshold > 0) ? cow_threshold : INT_MAX); | 1329 | init_waitqueue_head(&s->in_progress_wait); |
| 1331 | 1330 | ||
| 1332 | s->kcopyd_client = dm_kcopyd_client_create(&dm_kcopyd_throttle); | 1331 | s->kcopyd_client = dm_kcopyd_client_create(&dm_kcopyd_throttle); |
| 1333 | if (IS_ERR(s->kcopyd_client)) { | 1332 | if (IS_ERR(s->kcopyd_client)) { |
| @@ -1509,9 +1508,56 @@ static void snapshot_dtr(struct dm_target *ti) · 175 unmodified lines | |||
| 1509 | 1508 | ||
| 1510 | dm_put_device(ti, s->origin); | 1509 | dm_put_device(ti, s->origin); |
| 1511 | 1510 | ||
| 1511 | WARN_ON(s->in_progress); | ||
| 1512 | |||
| 1512 | kfree(s); | 1513 | kfree(s); |
| 1513 | } | 1514 | } |
| 1514 | 1515 | ||
| 1516 | static void account_start_copy(struct dm_snapshot *s) | ||
| 1517 | { | ||
| 1518 | spin_lock(&s->in_progress_wait.lock); | ||
| 1519 | s->in_progress++; | ||
| 1520 | spin_unlock(&s->in_progress_wait.lock); | ||
| 1521 | } | ||
| 1522 | |||
| 1523 | static void account_end_copy(struct dm_snapshot *s) | ||
| 1524 | { | ||
| 1525 | spin_lock(&s->in_progress_wait.lock); | ||
| 1526 | BUG_ON(!s->in_progress); | ||
| 1527 | s->in_progress--; | ||
| 1528 | if (likely(s->in_progress <= cow_threshold) && | ||
| 1529 | unlikely(waitqueue_active(&s->in_progress_wait))) | ||
| 1530 | wake_up_locked(&s->in_progress_wait); | ||
| 1531 | spin_unlock(&s->in_progress_wait.lock); | ||
| 1532 | } | ||
| 1533 | |||
| 1534 | static bool wait_for_in_progress(struct dm_snapshot *s, bool unlock_origins) | ||
| 1535 | { | ||
| 1536 | if (unlikely(s->in_progress > cow_threshold)) { | ||
| 1537 | spin_lock(&s->in_progress_wait.lock); | ||
| 1538 | if (likely(s->in_progress > cow_threshold)) { | ||
| 1539 | /* | ||
| 1540 | * NOTE: this throttle doesn't account for whether | ||
| 1541 | * the caller is servicing an IO that will trigger a COW | ||
| 1542 | * so excess throttling may result for chunks not required | ||
| 1543 | * to be COW'd. But if cow_threshold was reached, extra | ||
| 1544 | * throttling is unlikely to negatively impact performance. | ||
| 1545 | */ | ||
| 1546 | DECLARE_WAITQUEUE(wait, current); | ||
| 1547 | __add_wait_queue(&s->in_progress_wait, &wait); | ||
| 1548 | __set_current_state(TASK_UNINTERRUPTIBLE); | ||
| 1549 | spin_unlock(&s->in_progress_wait.lock); | ||
| 1550 | if (unlock_origins) | ||
| 1551 | up_read(&_origins_lock); | ||
| 1552 | io_schedule(); | ||
| 1553 | remove_wait_queue(&s->in_progress_wait, &wait); | ||
| 1554 | return false; | ||
| 1555 | } | ||
| 1556 | spin_unlock(&s->in_progress_wait.lock); | ||
| 1557 | } | ||
| 1558 | return true; | ||
| 1559 | } | ||
| 1560 | |||
| 1515 | /* | 1561 | /* |
| 1516 | * Flush a list of buffers. | 1562 | * Flush a list of buffers. |
| 1517 | */ | 1563 | */ |
| @@ -1527,7 +1573,7 @@ static void flush_bios(struct bio *bio) · 9 unmodified lines | |||
| 1527 | } | 1573 | } |
| 1528 | } | 1574 | } |
| 1529 | 1575 | ||
| 1530 | static int do_origin(struct dm_dev *origin, struct bio *bio); | 1576 | static int do_origin(struct dm_dev *origin, struct bio *bio, bool limit); |
| 1531 | 1577 | ||
| 1532 | /* | 1578 | /* |
| 1533 | * Flush a list of buffers. | 1579 | * Flush a list of buffers. |
| @@ -1540,7 +1586,7 @@ static void retry_origin_bios(struct dm_snapshot *s, struct bio *bio) · 6 unmodified lines | |||
| 1540 | while (bio) { | 1586 | while (bio) { |
| 1541 | n = bio->bi_next; | 1587 | n = bio->bi_next; |
| 1542 | bio->bi_next = NULL; | 1588 | bio->bi_next = NULL; |
| 1543 | r = do_origin(s->origin, bio); | 1589 | r = do_origin(s->origin, bio, false); |
| 1544 | if (r == DM_MAPIO_REMAPPED) | 1590 | if (r == DM_MAPIO_REMAPPED) |
| 1545 | generic_make_request(bio); | 1591 | generic_make_request(bio); |
| 1546 | bio = n; | 1592 | bio = n; |
| @@ -1732,7 +1778,7 @@ static void copy_callback(int read_err, unsigned long write_err, void *context) · 185 unmodified lines | |||
| 1732 | rb_link_node(&pe->out_of_order_node, parent, p); | 1778 | rb_link_node(&pe->out_of_order_node, parent, p); |
| 1733 | rb_insert_color(&pe->out_of_order_node, &s->out_of_order_tree); | 1779 | rb_insert_color(&pe->out_of_order_node, &s->out_of_order_tree); |
| 1734 | } | 1780 | } |
| 1735 | up(&s->cow_count); | 1781 | account_end_copy(s); |
| 1736 | } | 1782 | } |
| 1737 | 1783 | ||
| 1738 | /* | 1784 | /* |
| @@ -1756,7 +1802,7 @@ static void start_copy(struct dm_snap_pending_exception *pe) · 17 unmodified lines | |||
| 1756 | dest.count = src.count; | 1802 | dest.count = src.count; |
| 1757 | 1803 | ||
| 1758 | /* Hand over to kcopyd */ | 1804 | /* Hand over to kcopyd */ |
| 1759 | down(&s->cow_count); | 1805 | account_start_copy(s); |
| 1760 | dm_kcopyd_copy(s->kcopyd_client, &src, 1, &dest, 0, copy_callback, pe); | 1806 | dm_kcopyd_copy(s->kcopyd_client, &src, 1, &dest, 0, copy_callback, pe); |
| 1761 | } | 1807 | } |
| 1762 | 1808 | ||
| @@ -1776,7 +1822,7 @@ static void start_full_bio(struct dm_snap_pending_exception *pe, · 13 unmodified lines | |||
| 1776 | pe->full_bio = bio; | 1822 | pe->full_bio = bio; |
| 1777 | pe->full_bio_end_io = bio->bi_end_io; | 1823 | pe->full_bio_end_io = bio->bi_end_io; |
| 1778 | 1824 | ||
| 1779 | down(&s->cow_count); | 1825 | account_start_copy(s); |
| 1780 | callback_data = dm_kcopyd_prepare_callback(s->kcopyd_client, | 1826 | callback_data = dm_kcopyd_prepare_callback(s->kcopyd_client, |
| 1781 | copy_callback, pe); | 1827 | copy_callback, pe); |
| 1782 | 1828 | ||
| @@ -1866,7 +1912,7 @@ static void zero_callback(int read_err, unsigned long write_err, void *context) · 83 unmodified lines | |||
| 1866 | struct bio *bio = context; | 1912 | struct bio *bio = context; |
| 1867 | struct dm_snapshot *s = bio->bi_private; | 1913 | struct dm_snapshot *s = bio->bi_private; |
| 1868 | 1914 | ||
| 1869 | up(&s->cow_count); | 1915 | account_end_copy(s); |
| 1870 | bio->bi_status = write_err ? BLK_STS_IOERR : 0; | 1916 | bio->bi_status = write_err ? BLK_STS_IOERR : 0; |
| 1871 | bio_endio(bio); | 1917 | bio_endio(bio); |
| 1872 | } | 1918 | } |
| @@ -1880,7 +1926,7 @@ static void zero_exception(struct dm_snapshot *s, struct dm_exception *e, · 7 unmodified lines | |||
| 1880 | dest.sector = bio->bi_iter.bi_sector; | 1926 | dest.sector = bio->bi_iter.bi_sector; |
| 1881 | dest.count = s->store->chunk_size; | 1927 | dest.count = s->store->chunk_size; |
| 1882 | 1928 | ||
| 1883 | down(&s->cow_count); | 1929 | account_start_copy(s); |
| 1884 | WARN_ON_ONCE(bio->bi_private); | 1930 | WARN_ON_ONCE(bio->bi_private); |
| 1885 | bio->bi_private = s; | 1931 | bio->bi_private = s; |
| 1886 | dm_kcopyd_zero(s->kcopyd_client, 1, &dest, 0, zero_callback, bio); | 1932 | dm_kcopyd_zero(s->kcopyd_client, 1, &dest, 0, zero_callback, bio); |
| @@ -1916,6 +1962,11 @@ static int snapshot_map(struct dm_target *ti, struct bio *bio) · 29 unmodified lines | |||
| 1916 | if (!s->valid) | 1962 | if (!s->valid) |
| 1917 | return DM_MAPIO_KILL; | 1963 | return DM_MAPIO_KILL; |
| 1918 | 1964 | ||
| 1965 | if (bio_data_dir(bio) == WRITE) { | ||
| 1966 | while (unlikely(!wait_for_in_progress(s, false))) | ||
| 1967 | ; /* wait_for_in_progress() has slept */ | ||
| 1968 | } | ||
| 1969 | |||
| 1919 | down_read(&s->lock); | 1970 | down_read(&s->lock); |
| 1920 | dm_exception_table_lock(&lock); | 1971 | dm_exception_table_lock(&lock); |
| 1921 | 1972 | ||
| @@ -2112,7 +2163,7 @@ redirect_to_origin: · 190 unmodified lines | |||
| 2112 | 2163 | ||
| 2113 | if (bio_data_dir(bio) == WRITE) { | 2164 | if (bio_data_dir(bio) == WRITE) { |
| 2114 | up_write(&s->lock); | 2165 | up_write(&s->lock); |
| 2115 | return do_origin(s->origin, bio); | 2166 | return do_origin(s->origin, bio, false); |
| 2116 | } | 2167 | } |
| 2117 | 2168 | ||
| 2118 | out_unlock: | 2169 | out_unlock: |
| @@ -2487,15 +2538,24 @@ next_snapshot: · 368 unmodified lines | |||
| 2487 | /* | 2538 | /* |
| 2488 | * Called on a write from the origin driver. | 2539 | * Called on a write from the origin driver. |
| 2489 | */ | 2540 | */ |
| 2490 | static int do_origin(struct dm_dev *origin, struct bio *bio) | 2541 | static int do_origin(struct dm_dev *origin, struct bio *bio, bool limit) |
| 2491 | { | 2542 | { |
| 2492 | struct origin *o; | 2543 | struct origin *o; |
| 2493 | int r = DM_MAPIO_REMAPPED; | 2544 | int r = DM_MAPIO_REMAPPED; |
| 2494 | 2545 | ||
| 2546 | again: | ||
| 2495 | down_read(&_origins_lock); | 2547 | down_read(&_origins_lock); |
| 2496 | o = __lookup_origin(origin->bdev); | 2548 | o = __lookup_origin(origin->bdev); |
| 2497 | if (o) | 2549 | if (o) { |
| 2550 | if (limit) { | ||
| 2551 | struct dm_snapshot *s; | ||
| 2552 | list_for_each_entry(s, &o->snapshots, list) | ||
| 2553 | if (unlikely(!wait_for_in_progress(s, true))) | ||
| 2554 | goto again; | ||
| 2555 | } | ||
| 2556 | |||
| 2498 | r = __origin_write(&o->snapshots, bio->bi_iter.bi_sector, bio); | 2557 | r = __origin_write(&o->snapshots, bio->bi_iter.bi_sector, bio); |
| 2558 | } | ||
| 2499 | up_read(&_origins_lock); | 2559 | up_read(&_origins_lock); |
| 2500 | 2560 | ||
| 2501 | return r; | 2561 | return r; |
| @@ -2608,7 +2668,7 @@ static int origin_map(struct dm_target *ti, struct bio *bio) · 106 unmodified lines | |||
| 2608 | dm_accept_partial_bio(bio, available_sectors); | 2668 | dm_accept_partial_bio(bio, available_sectors); |
| 2609 | 2669 | ||
| 2610 | /* Only tell snapshots if this is a write */ | 2670 | /* Only tell snapshots if this is a write */ |
| 2611 | return do_origin(o->dev, bio); | 2671 | return do_origin(o->dev, bio, true); |
| 2612 | } | 2672 | } |
| 2613 | 2673 | ||
| 2614 | /* | 2674 | /* |
| @@ -154,7 +154,7 @@ static int create_strip_zones(struct mddev *mddev, struct r0conf **private_conf) · 153 unmodified lines | |||
| 154 | } else { | 154 | } else { |
| 155 | pr_err("md/raid0:%s: cannot assemble multi-zone RAID0 with default_layout setting\n", | 155 | pr_err("md/raid0:%s: cannot assemble multi-zone RAID0 with default_layout setting\n", |
| 156 | mdname(mddev)); | 156 | mdname(mddev)); |
| 157 | pr_err("md/raid0: please set raid.default_layout to 1 or 2\n"); | 157 | pr_err("md/raid0: please set raid0.default_layout to 1 or 2\n"); |
| 158 | err = -ENOTSUPP; | 158 | err = -ENOTSUPP; |
| 159 | goto abort; | 159 | goto abort; |
| 160 | } | 160 | } |
| @@ -643,8 +643,7 @@ static int v4l_stk_release(struct file *fp) · 642 unmodified lines | |||
| 643 | dev->owner = NULL; | 643 | dev->owner = NULL; |
| 644 | } | 644 | } |
| 645 | 645 | ||
| 646 | if (is_present(dev)) | 646 | usb_autopm_put_interface(dev->interface); |
| 647 | usb_autopm_put_interface(dev->interface); | ||
| 648 | mutex_unlock(&dev->lock); | 647 | mutex_unlock(&dev->lock); |
| 649 | return v4l2_fh_release(fp); | 648 | return v4l2_fh_release(fp); |
| 650 | } | 649 | } |
| @@ -941,7 +941,7 @@ static int jmb38x_ms_probe(struct pci_dev *pdev, · 940 unmodified lines | |||
| 941 | if (!cnt) { | 941 | if (!cnt) { |
| 942 | rc = -ENODEV; | 942 | rc = -ENODEV; |
| 943 | pci_dev_busy = 1; | 943 | pci_dev_busy = 1; |
| 944 | goto err_out; | 944 | goto err_out_int; |
| 945 | } | 945 | } |
| 946 | 946 | ||
| 947 | jm = kzalloc(sizeof(struct jmb38x_ms) | 947 | jm = kzalloc(sizeof(struct jmb38x_ms) |
| @@ -527,6 +527,7 @@ static int fastrpc_dma_buf_attach(struct dma_buf *dmabuf, · 526 unmodified lines | |||
| 527 | FASTRPC_PHYS(buffer->phys), buffer->size); | 527 | FASTRPC_PHYS(buffer->phys), buffer->size); |
| 528 | if (ret < 0) { | 528 | if (ret < 0) { |
| 529 | dev_err(buffer->dev, "failed to get scatterlist from DMA API\n"); | 529 | dev_err(buffer->dev, "failed to get scatterlist from DMA API\n"); |
| 530 | kfree(a); | ||
| 530 | return -EINVAL; | 531 | return -EINVAL; |
| 531 | } | 532 | } |
| 532 | 533 | ||
| @@ -218,13 +218,21 @@ static void mei_mkhi_fix(struct mei_cl_device *cldev) · 217 unmodified lines | |||
| 218 | { | 218 | { |
| 219 | int ret; | 219 | int ret; |
| 220 | 220 | ||
| 221 | /* No need to enable the client if nothing is needed from it */ | ||
| 222 | if (!cldev->bus->fw_f_fw_ver_supported && | ||
| 223 | !cldev->bus->hbm_f_os_supported) | ||
| 224 | return; | ||
| 225 | |||
| 221 | ret = mei_cldev_enable(cldev); | 226 | ret = mei_cldev_enable(cldev); |
| 222 | if (ret) | 227 | if (ret) |
| 223 | return; | 228 | return; |
| 224 | 229 | ||
| 225 | ret = mei_fwver(cldev); | 230 | if (cldev->bus->fw_f_fw_ver_supported) { |
| 226 | if (ret < 0) | 231 | ret = mei_fwver(cldev); |
| 227 | dev_err(&cldev->dev, "FW version command failed %d\n", ret); | 232 | if (ret < 0) |
| 233 | dev_err(&cldev->dev, "FW version command failed %d\n", | ||
| 234 | ret); | ||
| 235 | } | ||
| 228 | 236 | ||
| 229 | if (cldev->bus->hbm_f_os_supported) { | 237 | if (cldev->bus->hbm_f_os_supported) { |
| 230 | ret = mei_osver(cldev); | 238 | ret = mei_osver(cldev); |
| @@ -79,6 +79,9 @@ · 78 unmodified lines | |||
| 79 | #define MEI_DEV_ID_CNP_H 0xA360 /* Cannon Point H */ | 79 | #define MEI_DEV_ID_CNP_H 0xA360 /* Cannon Point H */ |
| 80 | #define MEI_DEV_ID_CNP_H_4 0xA364 /* Cannon Point H 4 (iTouch) */ | 80 | #define MEI_DEV_ID_CNP_H_4 0xA364 /* Cannon Point H 4 (iTouch) */ |
| 81 | 81 | ||
| 82 | #define MEI_DEV_ID_CMP_LP 0x02e0 /* Comet Point LP */ | ||
| 83 | #define MEI_DEV_ID_CMP_LP_3 0x02e4 /* Comet Point LP 3 (iTouch) */ | ||
| 84 | |||
| 82 | #define MEI_DEV_ID_ICP_LP 0x34E0 /* Ice Lake Point LP */ | 85 | #define MEI_DEV_ID_ICP_LP 0x34E0 /* Ice Lake Point LP */ |
| 83 | 86 | ||
| 84 | #define MEI_DEV_ID_TGP_LP 0xA0E0 /* Tiger Lake Point LP */ | 87 | #define MEI_DEV_ID_TGP_LP 0xA0E0 /* Tiger Lake Point LP */ |
| @@ -1355,6 +1355,8 @@ static bool mei_me_fw_type_sps(struct pci_dev *pdev) · 1354 unmodified lines | |||
| 1355 | #define MEI_CFG_FW_SPS \ | 1355 | #define MEI_CFG_FW_SPS \ |
| 1356 | .quirk_probe = mei_me_fw_type_sps | 1356 | .quirk_probe = mei_me_fw_type_sps |
| 1357 | 1357 | ||
| 1358 | #define MEI_CFG_FW_VER_SUPP \ | ||
| 1359 | .fw_ver_supported = 1 | ||
| 1358 | 1360 | ||
| 1359 | #define MEI_CFG_ICH_HFS \ | 1361 | #define MEI_CFG_ICH_HFS \ |
| 1360 | .fw_status.count = 0 | 1362 | .fw_status.count = 0 |
| @@ -1392,31 +1394,41 @@ static const struct mei_cfg mei_me_ich10_cfg = { · 31 unmodified lines | |||
| 1392 | MEI_CFG_ICH10_HFS, | 1394 | MEI_CFG_ICH10_HFS, |
| 1393 | }; | 1395 | }; |
| 1394 | 1396 | ||
| 1395 | /* PCH devices */ | 1397 | /* PCH6 devices */ |
| 1396 | static const struct mei_cfg mei_me_pch_cfg = { | 1398 | static const struct mei_cfg mei_me_pch6_cfg = { |
| 1397 | MEI_CFG_PCH_HFS, | 1399 | MEI_CFG_PCH_HFS, |
| 1398 | }; | 1400 | }; |
| 1399 | 1401 | ||
| 1402 | /* PCH7 devices */ | ||
| 1403 | static const struct mei_cfg mei_me_pch7_cfg = { | ||
| 1404 | MEI_CFG_PCH_HFS, | ||
| 1405 | MEI_CFG_FW_VER_SUPP, | ||
| 1406 | }; | ||
| 1407 | |||
| 1400 | /* PCH Cougar Point and Patsburg with quirk for Node Manager exclusion */ | 1408 | /* PCH Cougar Point and Patsburg with quirk for Node Manager exclusion */ |
| 1401 | static const struct mei_cfg mei_me_pch_cpt_pbg_cfg = { | 1409 | static const struct mei_cfg mei_me_pch_cpt_pbg_cfg = { |
| 1402 | MEI_CFG_PCH_HFS, | 1410 | MEI_CFG_PCH_HFS, |
| 1411 | MEI_CFG_FW_VER_SUPP, | ||
| 1403 | MEI_CFG_FW_NM, | 1412 | MEI_CFG_FW_NM, |
| 1404 | }; | 1413 | }; |
| 1405 | 1414 | ||
| 1406 | /* PCH8 Lynx Point and newer devices */ | 1415 | /* PCH8 Lynx Point and newer devices */ |
| 1407 | static const struct mei_cfg mei_me_pch8_cfg = { | 1416 | static const struct mei_cfg mei_me_pch8_cfg = { |
| 1408 | MEI_CFG_PCH8_HFS, | 1417 | MEI_CFG_PCH8_HFS, |
| 1418 | MEI_CFG_FW_VER_SUPP, | ||
| 1409 | }; | 1419 | }; |
| 1410 | 1420 | ||
| 1411 | /* PCH8 Lynx Point with quirk for SPS Firmware exclusion */ | 1421 | /* PCH8 Lynx Point with quirk for SPS Firmware exclusion */ |
| 1412 | static const struct mei_cfg mei_me_pch8_sps_cfg = { | 1422 | static const struct mei_cfg mei_me_pch8_sps_cfg = { |
| 1413 | MEI_CFG_PCH8_HFS, | 1423 | MEI_CFG_PCH8_HFS, |
| 1424 | MEI_CFG_FW_VER_SUPP, | ||
| 1414 | MEI_CFG_FW_SPS, | 1425 | MEI_CFG_FW_SPS, |
| 1415 | }; | 1426 | }; |
| 1416 | 1427 | ||
| 1417 | /* Cannon Lake and newer devices */ | 1428 | /* Cannon Lake and newer devices */ |
| 1418 | static const struct mei_cfg mei_me_pch12_cfg = { | 1429 | static const struct mei_cfg mei_me_pch12_cfg = { |
| 1419 | MEI_CFG_PCH8_HFS, | 1430 | MEI_CFG_PCH8_HFS, |
| 1431 | MEI_CFG_FW_VER_SUPP, | ||
| 1420 | MEI_CFG_DMA_128, | 1432 | MEI_CFG_DMA_128, |
| 1421 | }; | 1433 | }; |
| 1422 | 1434 | ||
| @@ -1428,7 +1440,8 @@ static const struct mei_cfg *const mei_cfg_list[] = { · 5 unmodified lines | |||
| 1428 | [MEI_ME_UNDEF_CFG] = NULL, | 1440 | [MEI_ME_UNDEF_CFG] = NULL, |
| 1429 | [MEI_ME_ICH_CFG] = &mei_me_ich_cfg, | 1441 | [MEI_ME_ICH_CFG] = &mei_me_ich_cfg, |
| 1430 | [MEI_ME_ICH10_CFG] = &mei_me_ich10_cfg, | 1442 | [MEI_ME_ICH10_CFG] = &mei_me_ich10_cfg, |
| 1431 | [MEI_ME_PCH_CFG] = &mei_me_pch_cfg, | 1443 | [MEI_ME_PCH6_CFG] = &mei_me_pch6_cfg, |
| 1444 | [MEI_ME_PCH7_CFG] = &mei_me_pch7_cfg, | ||
| 1432 | [MEI_ME_PCH_CPT_PBG_CFG] = &mei_me_pch_cpt_pbg_cfg, | 1445 | [MEI_ME_PCH_CPT_PBG_CFG] = &mei_me_pch_cpt_pbg_cfg, |
| 1433 | [MEI_ME_PCH8_CFG] = &mei_me_pch8_cfg, | 1446 | [MEI_ME_PCH8_CFG] = &mei_me_pch8_cfg, |
| 1434 | [MEI_ME_PCH8_SPS_CFG] = &mei_me_pch8_sps_cfg, | 1447 | [MEI_ME_PCH8_SPS_CFG] = &mei_me_pch8_sps_cfg, |
| @@ -1473,6 +1486,8 @@ struct mei_device *mei_me_dev_init(struct pci_dev *pdev, · 38 unmodified lines | |||
| 1473 | mei_device_init(dev, &pdev->dev, &mei_me_hw_ops); | 1486 | mei_device_init(dev, &pdev->dev, &mei_me_hw_ops); |
| 1474 | hw->cfg = cfg; | 1487 | hw->cfg = cfg; |
| 1475 | 1488 | ||
| 1489 | dev->fw_f_fw_ver_supported = cfg->fw_ver_supported; | ||
| 1490 | |||
| 1476 | return dev; | 1491 | return dev; |
| 1477 | } | 1492 | } |
| 1478 | 1493 | ||
| @@ -20,11 +20,13 @@ · 19 unmodified lines | |||
| 20 | * @fw_status: FW status | 20 | * @fw_status: FW status |
| 21 | * @quirk_probe: device exclusion quirk | 21 | * @quirk_probe: device exclusion quirk |
| 22 | * @dma_size: device DMA buffers size | 22 | * @dma_size: device DMA buffers size |
| 23 | * @fw_ver_supported: is fw version retrievable from FW | ||
| 23 | */ | 24 | */ |
| 24 | struct mei_cfg { | 25 | struct mei_cfg { |
| 25 | const struct mei_fw_status fw_status; | 26 | const struct mei_fw_status fw_status; |
| 26 | bool (*quirk_probe)(struct pci_dev *pdev); | 27 | bool (*quirk_probe)(struct pci_dev *pdev); |
| 27 | size_t dma_size[DMA_DSCR_NUM]; | 28 | size_t dma_size[DMA_DSCR_NUM]; |
| 29 | u32 fw_ver_supported:1; | ||
| 28 | }; | 30 | }; |
| 29 | 31 | ||
| 30 | 32 | ||
| @@ -62,7 +64,8 @@ struct mei_me_hw { · 31 unmodified lines | |||
| 62 | * @MEI_ME_UNDEF_CFG: Lower sentinel. | 64 | * @MEI_ME_UNDEF_CFG: Lower sentinel. |
| 63 | * @MEI_ME_ICH_CFG: I/O Controller Hub legacy devices. | 65 | * @MEI_ME_ICH_CFG: I/O Controller Hub legacy devices. |
| 64 | * @MEI_ME_ICH10_CFG: I/O Controller Hub platforms Gen10 | 66 | * @MEI_ME_ICH10_CFG: I/O Controller Hub platforms Gen10 |
| 65 | * @MEI_ME_PCH_CFG: Platform Controller Hub platforms (Up to Gen8). | 67 | * @MEI_ME_PCH6_CFG: Platform Controller Hub platforms (Gen6). |
| 68 | * @MEI_ME_PCH7_CFG: Platform Controller Hub platforms (Gen7). | ||
| 66 | * @MEI_ME_PCH_CPT_PBG_CFG:Platform Controller Hub workstations | 69 | * @MEI_ME_PCH_CPT_PBG_CFG:Platform Controller Hub workstations |
| 67 | * with quirk for Node Manager exclusion. | 70 | * with quirk for Node Manager exclusion. |
| 68 | * @MEI_ME_PCH8_CFG: Platform Controller Hub Gen8 and newer | 71 | * @MEI_ME_PCH8_CFG: Platform Controller Hub Gen8 and newer |
| @@ -77,7 +80,8 @@ enum mei_cfg_idx { · 8 unmodified lines | |||
| 77 | MEI_ME_UNDEF_CFG, | 80 | MEI_ME_UNDEF_CFG, |
| 78 | MEI_ME_ICH_CFG, | 81 | MEI_ME_ICH_CFG, |
| 79 | MEI_ME_ICH10_CFG, | 82 | MEI_ME_ICH10_CFG, |
| 80 | MEI_ME_PCH_CFG, | 83 | MEI_ME_PCH6_CFG, |
| 84 | MEI_ME_PCH7_CFG, | ||
| 81 | MEI_ME_PCH_CPT_PBG_CFG, | 85 | MEI_ME_PCH_CPT_PBG_CFG, |
| 82 | MEI_ME_PCH8_CFG, | 86 | MEI_ME_PCH8_CFG, |
| 83 | MEI_ME_PCH8_SPS_CFG, | 87 | MEI_ME_PCH8_SPS_CFG, |
| @@ -426,6 +426,8 @@ struct mei_fw_version { · 425 unmodified lines | |||
| 426 | * | 426 | * |
| 427 | * @fw_ver : FW versions | 427 | * @fw_ver : FW versions |
| 428 | * | 428 | * |
| 429 | * @fw_f_fw_ver_supported : fw feature: fw version supported | ||
| 430 | * | ||
| 429 | * @me_clients_rwsem: rw lock over me_clients list | 431 | * @me_clients_rwsem: rw lock over me_clients list |
| 430 | * @me_clients : list of FW clients | 432 | * @me_clients : list of FW clients |
| 431 | * @me_clients_map : FW clients bit map | 433 | * @me_clients_map : FW clients bit map |
| @@ -506,6 +508,8 @@ struct mei_device { · 74 unmodified lines | |||
| 506 | 508 | ||
| 507 | struct mei_fw_version fw_ver[MEI_MAX_FW_VER_BLOCKS]; | 509 | struct mei_fw_version fw_ver[MEI_MAX_FW_VER_BLOCKS]; |
| 508 | 510 | ||
| 511 | unsigned int fw_f_fw_ver_supported:1; | ||
| 512 | |||
| 509 | struct rw_semaphore me_clients_rwsem; | 513 | struct rw_semaphore me_clients_rwsem; |
| 510 | struct list_head me_clients; | 514 | struct list_head me_clients; |
| 511 | DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX); | 515 | DECLARE_BITMAP(me_clients_map, MEI_CLIENTS_MAX); |
| @@ -61,13 +61,13 @@ static const struct pci_device_id mei_me_pci_tbl[] = { · 60 unmodified lines | |||
| 61 | {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, MEI_ME_ICH10_CFG)}, | 61 | {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, MEI_ME_ICH10_CFG)}, |
| 62 | {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, MEI_ME_ICH10_CFG)}, | 62 | {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, MEI_ME_ICH10_CFG)}, |
| 63 | 63 | ||
| 64 | {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, MEI_ME_PCH_CFG)}, | 64 | {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, MEI_ME_PCH6_CFG)}, |
| 65 | {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, MEI_ME_PCH_CFG)}, | 65 | {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, MEI_ME_PCH6_CFG)}, |
| 66 | {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, MEI_ME_PCH_CPT_PBG_CFG)}, | 66 | {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, MEI_ME_PCH_CPT_PBG_CFG)}, |
| 67 | {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, MEI_ME_PCH_CPT_PBG_CFG)}, | 67 | {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, MEI_ME_PCH_CPT_PBG_CFG)}, |
| 68 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH_CFG)}, | 68 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH7_CFG)}, |
| 69 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH_CFG)}, | 69 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH7_CFG)}, |
| 70 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH_CFG)}, | 70 | {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH7_CFG)}, |
| 71 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_CFG)}, | 71 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_CFG)}, |
| 72 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_CFG)}, | 72 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_CFG)}, |
| 73 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)}, | 73 | {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)}, |
| @@ -96,6 +96,9 @@ static const struct pci_device_id mei_me_pci_tbl[] = { · 22 unmodified lines | |||
| 96 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH12_CFG)}, | 96 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH12_CFG)}, |
| 97 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_4, MEI_ME_PCH8_CFG)}, | 97 | {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_4, MEI_ME_PCH8_CFG)}, |
| 98 | 98 | ||
| 99 | {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP, MEI_ME_PCH12_CFG)}, | ||
| 100 | {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP_3, MEI_ME_PCH8_CFG)}, | ||
| 101 | |||
| 99 | {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, | 102 | {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, |
| 100 | 103 | ||
| 101 | {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH12_CFG)}, | 104 | {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH12_CFG)}, |
| @@ -646,8 +646,8 @@ int renesas_sdhi_probe(struct platform_device *pdev, · 645 unmodified lines | |||
| 646 | struct tmio_mmc_dma *dma_priv; | 646 | struct tmio_mmc_dma *dma_priv; |
| 647 | struct tmio_mmc_host *host; | 647 | struct tmio_mmc_host *host; |
| 648 | struct renesas_sdhi *priv; | 648 | struct renesas_sdhi *priv; |
| 649 | int num_irqs, irq, ret, i; | ||
| 649 | struct resource *res; | 650 | struct resource *res; |
| 650 | int irq, ret, i; | ||
| 651 | u16 ver; | 651 | u16 ver; |
| 652 | 652 | ||
| 653 | of_data = of_device_get_match_data(&pdev->dev); | 653 | of_data = of_device_get_match_data(&pdev->dev); |
| @@ -825,24 +825,31 @@ int renesas_sdhi_probe(struct platform_device *pdev, · 171 unmodified lines | |||
| 825 | host->hs400_complete = renesas_sdhi_hs400_complete; | 825 | host->hs400_complete = renesas_sdhi_hs400_complete; |
| 826 | } | 826 | } |
| 827 | 827 | ||
| 828 | i = 0; | 828 | num_irqs = platform_irq_count(pdev); |
| 829 | while (1) { | 829 | if (num_irqs < 0) { |
| 830 | ret = num_irqs; | ||
| 831 | goto eirq; | ||
| 832 | } | ||
| 833 | |||
| 834 | /* There must be at least one IRQ source */ | ||
| 835 | if (!num_irqs) { | ||
| 836 | ret = -ENXIO; | ||
| 837 | goto eirq; | ||
| 838 | } | ||
| 839 | |||
| 840 | for (i = 0; i < num_irqs; i++) { | ||
| 830 | irq = platform_get_irq(pdev, i); | 841 | irq = platform_get_irq(pdev, i); |
| 831 | if (irq < 0) | 842 | if (irq < 0) { |
| 832 | break; | 843 | ret = irq; |
| 833 | i++; | 844 | goto eirq; |
| 845 | } | ||
| 846 | |||
| 834 | ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0, | 847 | ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0, |
| 835 | dev_name(&pdev->dev), host); | 848 | dev_name(&pdev->dev), host); |
| 836 | if (ret) | 849 | if (ret) |
| 837 | goto eirq; | 850 | goto eirq; |
| 838 | } | 851 | } |
| 839 | 852 | ||
| 840 | /* There must be at least one IRQ source */ | ||
| 841 | if (!i) { | ||
| 842 | ret = irq; | ||
| 843 | goto eirq; | ||
| 844 | } | ||
| 845 | |||
| 846 | dev_info(&pdev->dev, "%s base at 0x%08lx max clock rate %u MHz\n", | 853 | dev_info(&pdev->dev, "%s base at 0x%08lx max clock rate %u MHz\n", |
| 847 | mmc_hostname(host->mmc), (unsigned long) | 854 | mmc_hostname(host->mmc), (unsigned long) |
| 848 | (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start), | 855 | (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start), |
| @@ -262,6 +262,7 @@ static const struct sdhci_iproc_data bcm2835_data = { · 261 unmodified lines | |||
| 262 | }; | 262 | }; |
| 263 | 263 | ||
| 264 | static const struct sdhci_pltfm_data sdhci_bcm2711_pltfm_data = { | 264 | static const struct sdhci_pltfm_data sdhci_bcm2711_pltfm_data = { |
| 265 | .quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12, | ||
| 265 | .ops = &sdhci_iproc_32only_ops, | 266 | .ops = &sdhci_iproc_32only_ops, |
| 266 | }; | 267 | }; |
| 267 | 268 | ||
| @@ -1393,11 +1393,9 @@ static int sh_mmcif_probe(struct platform_device *pdev) · 1392 unmodified lines | |||
| 1393 | const char *name; | 1393 | const char *name; |
| 1394 | 1394 | ||
| 1395 | irq[0] = platform_get_irq(pdev, 0); | 1395 | irq[0] = platform_get_irq(pdev, 0); |
| 1396 | irq[1] = platform_get_irq(pdev, 1); | 1396 | irq[1] = platform_get_irq_optional(pdev, 1); |
| 1397 | if (irq[0] < 0) { | 1397 | if (irq[0] < 0) |
| 1398 | dev_err(dev, "Get irq error\n"); | ||
| 1399 | return -ENXIO; | 1398 | return -ENXIO; |
| 1400 | } | ||
| 1401 | 1399 | ||
| 1402 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1400 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1403 | reg = devm_ioremap_resource(dev, res); | 1401 | reg = devm_ioremap_resource(dev, res); |
| @@ -134,16 +134,15 @@ static void au_write_buf16(struct nand_chip *this, const u_char *buf, int len) · 133 unmodified lines | |||
| 134 | 134 | ||
| 135 | /** | 135 | /** |
| 136 | * au_read_buf16 - read chip data into buffer | 136 | * au_read_buf16 - read chip data into buffer |
| 137 | * @mtd: MTD device structure | 137 | * @this: NAND chip object |
| 138 | * @buf: buffer to store date | 138 | * @buf: buffer to store date |
| 139 | * @len: number of bytes to read | 139 | * @len: number of bytes to read |
| 140 | * | 140 | * |
| 141 | * read function for 16bit buswidth | 141 | * read function for 16bit buswidth |
| 142 | */ | 142 | */ |
| 143 | static void au_read_buf16(struct mtd_info *mtd, u_char *buf, int len) | 143 | static void au_read_buf16(struct nand_chip *this, u_char *buf, int len) |
| 144 | { | 144 | { |
| 145 | int i; | 145 | int i; |
| 146 | struct nand_chip *this = mtd_to_nand(mtd); | ||
| 147 | u16 *p = (u16 *) buf; | 146 | u16 *p = (u16 *) buf; |
| 148 | len >>= 1; | 147 | len >>= 1; |
| 149 | 148 | ||
| @@ -487,7 +487,7 @@ static int write_sr(struct spi_nor *nor, u8 val) · 486 unmodified lines | |||
| 487 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 1), | 487 | SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 1), |
| 488 | SPI_MEM_OP_NO_ADDR, | 488 | SPI_MEM_OP_NO_ADDR, |
| 489 | SPI_MEM_OP_NO_DUMMY, | 489 | SPI_MEM_OP_NO_DUMMY, |
| 490 | SPI_MEM_OP_DATA_IN(1, nor->bouncebuf, 1)); | 490 | SPI_MEM_OP_DATA_OUT(1, nor->bouncebuf, 1)); |
| 491 | 491 | ||
| 492 | return spi_mem_exec_op(nor->spimem, &op); | 492 | return spi_mem_exec_op(nor->spimem, &op); |
| 493 | } | 493 | } |
| @@ -4039,7 +4039,7 @@ out: · 4038 unmodified lines | |||
| 4039 | * this to-be-skipped slave to send a packet out. | 4039 | * this to-be-skipped slave to send a packet out. |
| 4040 | */ | 4040 | */ |
| 4041 | old_arr = rtnl_dereference(bond->slave_arr); | 4041 | old_arr = rtnl_dereference(bond->slave_arr); |
| 4042 | for (idx = 0; idx < old_arr->count; idx++) { | 4042 | for (idx = 0; old_arr != NULL && idx < old_arr->count; idx++) { |
| 4043 | if (skipslave == old_arr->arr[idx]) { | 4043 | if (skipslave == old_arr->arr[idx]) { |
| 4044 | old_arr->arr[idx] = | 4044 | old_arr->arr[idx] = |
| 4045 | old_arr->arr[old_arr->count-1]; | 4045 | old_arr->arr[old_arr->count-1]; |
| @@ -1845,7 +1845,6 @@ int b53_mirror_add(struct dsa_switch *ds, int port, · 1844 unmodified lines | |||
| 1845 | loc = B53_EG_MIR_CTL; | 1845 | loc = B53_EG_MIR_CTL; |
| 1846 | 1846 | ||
| 1847 | b53_read16(dev, B53_MGMT_PAGE, loc, ®); | 1847 | b53_read16(dev, B53_MGMT_PAGE, loc, ®); |
| 1848 | reg &= ~MIRROR_MASK; | ||
| 1849 | reg |= BIT(port); | 1848 | reg |= BIT(port); |
| 1850 | b53_write16(dev, B53_MGMT_PAGE, loc, reg); | 1849 | b53_write16(dev, B53_MGMT_PAGE, loc, reg); |
| 1851 | 1850 | ||
| @@ -1224,10 +1224,6 @@ static int ksz8795_switch_init(struct ksz_device *dev) · 1223 unmodified lines | |||
| 1224 | { | 1224 | { |
| 1225 | int i; | 1225 | int i; |
| 1226 | 1226 | ||
| 1227 | mutex_init(&dev->stats_mutex); | ||
| 1228 | mutex_init(&dev->alu_mutex); | ||
| 1229 | mutex_init(&dev->vlan_mutex); | ||
| 1230 | |||
| 1231 | dev->ds->ops = &ksz8795_switch_ops; | 1227 | dev->ds->ops = &ksz8795_switch_ops; |
| 1232 | 1228 | ||
| 1233 | for (i = 0; i < ARRAY_SIZE(ksz8795_switch_chips); i++) { | 1229 | for (i = 0; i < ARRAY_SIZE(ksz8795_switch_chips); i++) { |
| @@ -25,6 +25,7 @@ KSZ_REGMAP_TABLE(ksz8795, 16, SPI_ADDR_SHIFT, · 24 unmodified lines | |||
| 25 | 25 | ||
| 26 | static int ksz8795_spi_probe(struct spi_device *spi) | 26 | static int ksz8795_spi_probe(struct spi_device *spi) |
| 27 | { | 27 | { |
| 28 | struct regmap_config rc; | ||
| 28 | struct ksz_device *dev; | 29 | struct ksz_device *dev; |
| 29 | int i, ret; | 30 | int i, ret; |
| 30 | 31 | ||
| @@ -33,9 +34,9 @@ static int ksz8795_spi_probe(struct spi_device *spi) · 2 unmodified lines | |||
| 33 | return -ENOMEM; | 34 | return -ENOMEM; |
| 34 | 35 | ||
| 35 | for (i = 0; i < ARRAY_SIZE(ksz8795_regmap_config); i++) { | 36 | for (i = 0; i < ARRAY_SIZE(ksz8795_regmap_config); i++) { |
| 36 | dev->regmap[i] = devm_regmap_init_spi(spi, | 37 | rc = ksz8795_regmap_config[i]; |
| 37 | &ksz8795_regmap_config | 38 | rc.lock_arg = &dev->regmap_mutex; |
| 38 | [i]); | 39 | dev->regmap[i] = devm_regmap_init_spi(spi, &rc); |
| 39 | if (IS_ERR(dev->regmap[i])) { | 40 | if (IS_ERR(dev->regmap[i])) { |
| 40 | ret = PTR_ERR(dev->regmap[i]); | 41 | ret = PTR_ERR(dev->regmap[i]); |
| 41 | dev_err(&spi->dev, | 42 | dev_err(&spi->dev, |
| @@ -17,6 +17,7 @@ KSZ_REGMAP_TABLE(ksz9477, not_used, 16, 0, 0); · 16 unmodified lines | |||
| 17 | static int ksz9477_i2c_probe(struct i2c_client *i2c, | 17 | static int ksz9477_i2c_probe(struct i2c_client *i2c, |
| 18 | const struct i2c_device_id *i2c_id) | 18 | const struct i2c_device_id *i2c_id) |
| 19 | { | 19 | { |
| 20 | struct regmap_config rc; | ||
| 20 | struct ksz_device *dev; | 21 | struct ksz_device *dev; |
| 21 | int i, ret; | 22 | int i, ret; |
| 22 | 23 | ||
| @@ -25,8 +26,9 @@ static int ksz9477_i2c_probe(struct i2c_client *i2c, · 2 unmodified lines | |||
| 25 | return -ENOMEM; | 26 | return -ENOMEM; |
| 26 | 27 | ||
| 27 | for (i = 0; i < ARRAY_SIZE(ksz9477_regmap_config); i++) { | 28 | for (i = 0; i < ARRAY_SIZE(ksz9477_regmap_config); i++) { |
| 28 | dev->regmap[i] = devm_regmap_init_i2c(i2c, | 29 | rc = ksz9477_regmap_config[i]; |
| 29 | &ksz9477_regmap_config[i]); | 30 | rc.lock_arg = &dev->regmap_mutex; |
| 31 | dev->regmap[i] = devm_regmap_init_i2c(i2c, &rc); | ||
| 30 | if (IS_ERR(dev->regmap[i])) { | 32 | if (IS_ERR(dev->regmap[i])) { |
| 31 | ret = PTR_ERR(dev->regmap[i]); | 33 | ret = PTR_ERR(dev->regmap[i]); |
| 32 | dev_err(&i2c->dev, | 34 | dev_err(&i2c->dev, |
| @@ -1,5 +1,5 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | * | 2 | /* |
| 3 | * Microchip KSZ9477 register definitions | 3 | * Microchip KSZ9477 register definitions |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2017-2018 Microchip Technology Inc. | 5 | * Copyright (C) 2017-2018 Microchip Technology Inc. |
| @@ -24,6 +24,7 @@ KSZ_REGMAP_TABLE(ksz9477, 32, SPI_ADDR_SHIFT, · 23 unmodified lines | |||
| 24 | 24 | ||
| 25 | static int ksz9477_spi_probe(struct spi_device *spi) | 25 | static int ksz9477_spi_probe(struct spi_device *spi) |
| 26 | { | 26 | { |
| 27 | struct regmap_config rc; | ||
| 27 | struct ksz_device *dev; | 28 | struct ksz_device *dev; |
| 28 | int i, ret; | 29 | int i, ret; |
| 29 | 30 | ||
| @@ -32,8 +33,9 @@ static int ksz9477_spi_probe(struct spi_device *spi) · 2 unmodified lines | |||
| 32 | return -ENOMEM; | 33 | return -ENOMEM; |
| 33 | 34 | ||
| 34 | for (i = 0; i < ARRAY_SIZE(ksz9477_regmap_config); i++) { | 35 | for (i = 0; i < ARRAY_SIZE(ksz9477_regmap_config); i++) { |
| 35 | dev->regmap[i] = devm_regmap_init_spi(spi, | 36 | rc = ksz9477_regmap_config[i]; |
| 36 | &ksz9477_regmap_config[i]); | 37 | rc.lock_arg = &dev->regmap_mutex; |
| 38 | dev->regmap[i] = devm_regmap_init_spi(spi, &rc); | ||
| 37 | if (IS_ERR(dev->regmap[i])) { | 39 | if (IS_ERR(dev->regmap[i])) { |
| 38 | ret = PTR_ERR(dev->regmap[i]); | 40 | ret = PTR_ERR(dev->regmap[i]); |
| 39 | dev_err(&spi->dev, | 41 | dev_err(&spi->dev, |
| @@ -436,7 +436,7 @@ int ksz_switch_register(struct ksz_device *dev, · 435 unmodified lines | |||
| 436 | } | 436 | } |
| 437 | 437 | ||
| 438 | mutex_init(&dev->dev_mutex); | 438 | mutex_init(&dev->dev_mutex); |
| 439 | mutex_init(&dev->stats_mutex); | 439 | mutex_init(&dev->regmap_mutex); |
| 440 | mutex_init(&dev->alu_mutex); | 440 | mutex_init(&dev->alu_mutex); |
| 441 | mutex_init(&dev->vlan_mutex); | 441 | mutex_init(&dev->vlan_mutex); |
| 442 | 442 | ||
| @@ -1,5 +1,5 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | * Microchip switch driver common header | 2 | /* Microchip switch driver common header |
| 3 | * | 3 | * |
| 4 | * Copyright (C) 2017-2019 Microchip Technology Inc. | 4 | * Copyright (C) 2017-2019 Microchip Technology Inc. |
| 5 | */ | 5 | */ |
| @@ -47,7 +47,7 @@ struct ksz_device { · 41 unmodified lines | |||
| 47 | const char *name; | 47 | const char *name; |
| 48 | 48 | ||
| 49 | struct mutex dev_mutex; /* device access */ | 49 | struct mutex dev_mutex; /* device access */ |
| 50 | struct mutex stats_mutex; /* status access */ | 50 | struct mutex regmap_mutex; /* regmap access */ |
| 51 | struct mutex alu_mutex; /* ALU access */ | 51 | struct mutex alu_mutex; /* ALU access */ |
| 52 | struct mutex vlan_mutex; /* vlan access */ | 52 | struct mutex vlan_mutex; /* vlan access */ |
| 53 | const struct ksz_dev_ops *dev_ops; | 53 | const struct ksz_dev_ops *dev_ops; |
| @@ -290,6 +290,18 @@ static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, · 236 unmodified lines | |||
| 290 | ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); | 290 | ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data); |
| 291 | } | 291 | } |
| 292 | 292 | ||
| 293 | static inline void ksz_regmap_lock(void *__mtx) | ||
| 294 | { | ||
| 295 | struct mutex *mtx = __mtx; | ||
| 296 | mutex_lock(mtx); | ||
| 297 | } | ||
| 298 | |||
| 299 | static inline void ksz_regmap_unlock(void *__mtx) | ||
| 300 | { | ||
| 301 | struct mutex *mtx = __mtx; | ||
| 302 | mutex_unlock(mtx); | ||
| 303 | } | ||
| 304 | |||
| 293 | /* Regmap tables generation */ | 305 | /* Regmap tables generation */ |
| 294 | #define KSZ_SPI_OP_RD 3 | 306 | #define KSZ_SPI_OP_RD 3 |
| 295 | #define KSZ_SPI_OP_WR 2 | 307 | #define KSZ_SPI_OP_WR 2 |
| @@ -314,6 +326,8 @@ static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset, · 18 unmodified lines | |||
| 314 | .write_flag_mask = \ | 326 | .write_flag_mask = \ |
| 315 | KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ | 327 | KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \ |
| 316 | regbits, regpad), \ | 328 | regbits, regpad), \ |
| 329 | .lock = ksz_regmap_lock, \ | ||
| 330 | .unlock = ksz_regmap_unlock, \ | ||
| 317 | .reg_format_endian = REGMAP_ENDIAN_BIG, \ | 331 | .reg_format_endian = REGMAP_ENDIAN_BIG, \ |
| 318 | .val_format_endian = REGMAP_ENDIAN_BIG \ | 332 | .val_format_endian = REGMAP_ENDIAN_BIG \ |
| 319 | } | 333 | } |
| @@ -705,7 +705,7 @@ qca8k_setup(struct dsa_switch *ds) · 704 unmodified lines | |||
| 705 | BIT(0) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S); | 705 | BIT(0) << QCA8K_GLOBAL_FW_CTRL1_UC_DP_S); |
| 706 | 706 | ||
| 707 | /* Setup connection between CPU port & user ports */ | 707 | /* Setup connection between CPU port & user ports */ |
| 708 | for (i = 0; i < DSA_MAX_PORTS; i++) { | 708 | for (i = 0; i < QCA8K_NUM_PORTS; i++) { |
| 709 | /* CPU port gets connected to all user ports of the switch */ | 709 | /* CPU port gets connected to all user ports of the switch */ |
| 710 | if (dsa_is_cpu_port(ds, i)) { | 710 | if (dsa_is_cpu_port(ds, i)) { |
| 711 | qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT), | 711 | qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(QCA8K_CPU_PORT), |
| @@ -1077,7 +1077,7 @@ qca8k_sw_probe(struct mdio_device *mdiodev) · 365 unmodified lines | |||
| 1077 | if (id != QCA8K_ID_QCA8337) | 1077 | if (id != QCA8K_ID_QCA8337) |
| 1078 | return -ENODEV; | 1078 | return -ENODEV; |
| 1079 | 1079 | ||
| 1080 | priv->ds = dsa_switch_alloc(&mdiodev->dev, DSA_MAX_PORTS); | 1080 | priv->ds = dsa_switch_alloc(&mdiodev->dev, QCA8K_NUM_PORTS); |
| 1081 | if (!priv->ds) | 1081 | if (!priv->ds) |
| 1082 | return -ENOMEM; | 1082 | return -ENOMEM; |
| 1083 | 1083 | ||
| @@ -339,10 +339,12 @@ int rtl8366_vlan_prepare(struct dsa_switch *ds, int port, · 338 unmodified lines | |||
| 339 | const struct switchdev_obj_port_vlan *vlan) | 339 | const struct switchdev_obj_port_vlan *vlan) |
| 340 | { | 340 | { |
| 341 | struct realtek_smi *smi = ds->priv; | 341 | struct realtek_smi *smi = ds->priv; |
| 342 | u16 vid; | ||
| 342 | int ret; | 343 | int ret; |
| 343 | 344 | ||
| 344 | if (!smi->ops->is_vlan_valid(smi, port)) | 345 | for (vid = vlan->vid_begin; vid < vlan->vid_end; vid++) |
| 345 | return -EINVAL; | 346 | if (!smi->ops->is_vlan_valid(smi, vid)) |
| 347 | return -EINVAL; | ||
| 346 | 348 | ||
| 347 | dev_info(smi->dev, "prepare VLANs %04x..%04x\n", | 349 | dev_info(smi->dev, "prepare VLANs %04x..%04x\n", |
| 348 | vlan->vid_begin, vlan->vid_end); | 350 | vlan->vid_begin, vlan->vid_end); |
| @@ -370,8 +372,9 @@ void rtl8366_vlan_add(struct dsa_switch *ds, int port, · 21 unmodified lines | |||
| 370 | u16 vid; | 372 | u16 vid; |
| 371 | int ret; | 373 | int ret; |
| 372 | 374 | ||
| 373 | if (!smi->ops->is_vlan_valid(smi, port)) | 375 | for (vid = vlan->vid_begin; vid < vlan->vid_end; vid++) |
| 374 | return; | 376 | if (!smi->ops->is_vlan_valid(smi, vid)) |
| 377 | return; | ||
| 375 | 378 | ||
| 376 | dev_info(smi->dev, "add VLAN on port %d, %s, %s\n", | 379 | dev_info(smi->dev, "add VLAN on port %d, %s, %s\n", |
| 377 | port, | 380 | port, |
| @@ -507,7 +507,8 @@ static int rtl8366rb_setup_cascaded_irq(struct realtek_smi *smi) · 506 unmodified lines | |||
| 507 | irq = of_irq_get(intc, 0); | 507 | irq = of_irq_get(intc, 0); |
| 508 | if (irq <= 0) { | 508 | if (irq <= 0) { |
| 509 | dev_err(smi->dev, "failed to get parent IRQ\n"); | 509 | dev_err(smi->dev, "failed to get parent IRQ\n"); |
| 510 | return irq ? irq : -EINVAL; | 510 | ret = irq ? irq : -EINVAL; |
| 511 | goto out_put_node; | ||
| 511 | } | 512 | } |
| 512 | 513 | ||
| 513 | /* This clears the IRQ status register */ | 514 | /* This clears the IRQ status register */ |
| @@ -515,7 +516,7 @@ static int rtl8366rb_setup_cascaded_irq(struct realtek_smi *smi) · 1 unmodified line | |||
| 515 | &val); | 516 | &val); |
| 516 | if (ret) { | 517 | if (ret) { |
| 517 | dev_err(smi->dev, "can't read interrupt status\n"); | 518 | dev_err(smi->dev, "can't read interrupt status\n"); |
| 518 | return ret; | 519 | goto out_put_node; |
| 519 | } | 520 | } |
| 520 | 521 | ||
| 521 | /* Fetch IRQ edge information from the descriptor */ | 522 | /* Fetch IRQ edge information from the descriptor */ |
| @@ -537,7 +538,7 @@ static int rtl8366rb_setup_cascaded_irq(struct realtek_smi *smi) · 15 unmodified lines | |||
| 537 | val); | 538 | val); |
| 538 | if (ret) { | 539 | if (ret) { |
| 539 | dev_err(smi->dev, "could not configure IRQ polarity\n"); | 540 | dev_err(smi->dev, "could not configure IRQ polarity\n"); |
| 540 | return ret; | 541 | goto out_put_node; |
| 541 | } | 542 | } |
| 542 | 543 | ||
| 543 | ret = devm_request_threaded_irq(smi->dev, irq, NULL, | 544 | ret = devm_request_threaded_irq(smi->dev, irq, NULL, |
| @@ -545,7 +546,7 @@ static int rtl8366rb_setup_cascaded_irq(struct realtek_smi *smi) · 1 unmodified line | |||
| 545 | "RTL8366RB", smi); | 546 | "RTL8366RB", smi); |
| 546 | if (ret) { | 547 | if (ret) { |
| 547 | dev_err(smi->dev, "unable to request irq: %d\n", ret); | 548 | dev_err(smi->dev, "unable to request irq: %d\n", ret); |
| 548 | return ret; | 549 | goto out_put_node; |
| 549 | } | 550 | } |
| 550 | smi->irqdomain = irq_domain_add_linear(intc, | 551 | smi->irqdomain = irq_domain_add_linear(intc, |
| 551 | RTL8366RB_NUM_INTERRUPT, | 552 | RTL8366RB_NUM_INTERRUPT, |
| @@ -553,12 +554,15 @@ static int rtl8366rb_setup_cascaded_irq(struct realtek_smi *smi) · 1 unmodified line | |||
| 553 | smi); | 554 | smi); |
| 554 | if (!smi->irqdomain) { | 555 | if (!smi->irqdomain) { |
| 555 | dev_err(smi->dev, "failed to create IRQ domain\n"); | 556 | dev_err(smi->dev, "failed to create IRQ domain\n"); |
| 556 | return -EINVAL; | 557 | ret = -EINVAL; |
| 558 | goto out_put_node; | ||
| 557 | } | 559 | } |
| 558 | for (i = 0; i < smi->num_ports; i++) | 560 | for (i = 0; i < smi->num_ports; i++) |
| 559 | irq_set_parent(irq_create_mapping(smi->irqdomain, i), irq); | 561 | irq_set_parent(irq_create_mapping(smi->irqdomain, i), irq); |
| 560 | 562 | ||
| 561 | return 0; | 563 | out_put_node: |
| 564 | of_node_put(intc); | ||
| 565 | return ret; | ||
| 562 | } | 566 | } |
| 563 | 567 | ||
| 564 | static int rtl8366rb_set_addr(struct realtek_smi *smi) | 568 | static int rtl8366rb_set_addr(struct realtek_smi *smi) |
| @@ -1,5 +1,5 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | * Copyright (c) 2018, Sensor-Technik Wiedemann GmbH | 2 | /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH |
| 3 | * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> | 3 | * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> |
| 4 | */ | 4 | */ |
| 5 | #ifndef _SJA1105_H | 5 | #ifndef _SJA1105_H |
| @@ -1,5 +1,5 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | * Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> | 2 | /* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> |
| 3 | */ | 3 | */ |
| 4 | #ifndef _SJA1105_DYNAMIC_CONFIG_H | 4 | #ifndef _SJA1105_DYNAMIC_CONFIG_H |
| 5 | #define _SJA1105_DYNAMIC_CONFIG_H | 5 | #define _SJA1105_DYNAMIC_CONFIG_H |
| @@ -1897,7 +1897,9 @@ static int sja1105_set_ageing_time(struct dsa_switch *ds, · 1896 unmodified lines | |||
| 1897 | return sja1105_static_config_reload(priv); | 1897 | return sja1105_static_config_reload(priv); |
| 1898 | } | 1898 | } |
| 1899 | 1899 | ||
| 1900 | /* Caller must hold priv->tagger_data.meta_lock */ | 1900 | /* Must be called only with priv->tagger_data.state bit |
| 1901 | * SJA1105_HWTS_RX_EN cleared | ||
| 1902 | */ | ||
| 1901 | static int sja1105_change_rxtstamping(struct sja1105_private *priv, | 1903 | static int sja1105_change_rxtstamping(struct sja1105_private *priv, |
| 1902 | bool on) | 1904 | bool on) |
| 1903 | { | 1905 | { |
| @@ -1954,16 +1956,17 @@ static int sja1105_hwtstamp_set(struct dsa_switch *ds, int port, · 50 unmodified lines | |||
| 1954 | break; | 1956 | break; |
| 1955 | } | 1957 | } |
| 1956 | 1958 | ||
| 1957 | if (rx_on != priv->tagger_data.hwts_rx_en) { | 1959 | if (rx_on != test_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state)) { |
| 1958 | spin_lock(&priv->tagger_data.meta_lock); | 1960 | clear_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state); |
| 1961 | |||
| 1959 | rc = sja1105_change_rxtstamping(priv, rx_on); | 1962 | rc = sja1105_change_rxtstamping(priv, rx_on); |
| 1960 | spin_unlock(&priv->tagger_data.meta_lock); | ||
| 1961 | if (rc < 0) { | 1963 | if (rc < 0) { |
| 1962 | dev_err(ds->dev, | 1964 | dev_err(ds->dev, |
| 1963 | "Failed to change RX timestamping: %d\n", rc); | 1965 | "Failed to change RX timestamping: %d\n", rc); |
| 1964 | return -EFAULT; | 1966 | return rc; |
| 1965 | } | 1967 | } |
| 1966 | priv->tagger_data.hwts_rx_en = rx_on; | 1968 | if (rx_on) |
| 1969 | set_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state); | ||
| 1967 | } | 1970 | } |
| 1968 | 1971 | ||
| 1969 | if (copy_to_user(ifr->ifr_data, &config, sizeof(config))) | 1972 | if (copy_to_user(ifr->ifr_data, &config, sizeof(config))) |
| @@ -1982,7 +1985,7 @@ static int sja1105_hwtstamp_get(struct dsa_switch *ds, int port, · 12 unmodified lines | |||
| 1982 | config.tx_type = HWTSTAMP_TX_ON; | 1985 | config.tx_type = HWTSTAMP_TX_ON; |
| 1983 | else | 1986 | else |
| 1984 | config.tx_type = HWTSTAMP_TX_OFF; | 1987 | config.tx_type = HWTSTAMP_TX_OFF; |
| 1985 | if (priv->tagger_data.hwts_rx_en) | 1988 | if (test_bit(SJA1105_HWTS_RX_EN, &priv->tagger_data.state)) |
| 1986 | config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT; | 1989 | config.rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT; |
| 1987 | else | 1990 | else |
| 1988 | config.rx_filter = HWTSTAMP_FILTER_NONE; | 1991 | config.rx_filter = HWTSTAMP_FILTER_NONE; |
| @@ -2005,12 +2008,12 @@ static void sja1105_rxtstamp_work(struct work_struct *work) · 16 unmodified lines | |||
| 2005 | 2008 | ||
| 2006 | mutex_lock(&priv->ptp_lock); | 2009 | mutex_lock(&priv->ptp_lock); |
| 2007 | 2010 | ||
| 2008 | now = priv->tstamp_cc.read(&priv->tstamp_cc); | ||
| 2009 | |||
| 2010 | while ((skb = skb_dequeue(&data->skb_rxtstamp_queue)) != NULL) { | 2011 | while ((skb = skb_dequeue(&data->skb_rxtstamp_queue)) != NULL) { |
| 2011 | struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb); | 2012 | struct skb_shared_hwtstamps *shwt = skb_hwtstamps(skb); |
| 2012 | u64 ts; | 2013 | u64 ts; |
| 2013 | 2014 | ||
| 2015 | now = priv->tstamp_cc.read(&priv->tstamp_cc); | ||
| 2016 | |||
| 2014 | *shwt = (struct skb_shared_hwtstamps) {0}; | 2017 | *shwt = (struct skb_shared_hwtstamps) {0}; |
| 2015 | 2018 | ||
| 2016 | ts = SJA1105_SKB_CB(skb)->meta_tstamp; | 2019 | ts = SJA1105_SKB_CB(skb)->meta_tstamp; |
| @@ -2031,7 +2034,7 @@ static bool sja1105_port_rxtstamp(struct dsa_switch *ds, int port, · 14 unmodified lines | |||
| 2031 | struct sja1105_private *priv = ds->priv; | 2034 | struct sja1105_private *priv = ds->priv; |
| 2032 | struct sja1105_tagger_data *data = &priv->tagger_data; | 2035 | struct sja1105_tagger_data *data = &priv->tagger_data; |
| 2033 | 2036 | ||
| 2034 | if (!data->hwts_rx_en) | 2037 | if (!test_bit(SJA1105_HWTS_RX_EN, &data->state)) |
| 2035 | return false; | 2038 | return false; |
| 2036 | 2039 | ||
| 2037 | /* We need to read the full PTP clock to reconstruct the Rx | 2040 | /* We need to read the full PTP clock to reconstruct the Rx |
| @@ -2201,6 +2204,7 @@ static int sja1105_probe(struct spi_device *spi) · 163 unmodified lines | |||
| 2201 | tagger_data = &priv->tagger_data; | 2204 | tagger_data = &priv->tagger_data; |
| 2202 | skb_queue_head_init(&tagger_data->skb_rxtstamp_queue); | 2205 | skb_queue_head_init(&tagger_data->skb_rxtstamp_queue); |
| 2203 | INIT_WORK(&tagger_data->rxtstamp_work, sja1105_rxtstamp_work); | 2206 | INIT_WORK(&tagger_data->rxtstamp_work, sja1105_rxtstamp_work); |
| 2207 | spin_lock_init(&tagger_data->meta_lock); | ||
| 2204 | 2208 | ||
| 2205 | /* Connections between dsa_port and sja1105_port */ | 2209 | /* Connections between dsa_port and sja1105_port */ |
| 2206 | for (i = 0; i < SJA1105_NUM_PORTS; i++) { | 2210 | for (i = 0; i < SJA1105_NUM_PORTS; i++) { |
| @@ -1,5 +1,5 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | * Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> | 2 | /* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> |
| 3 | */ | 3 | */ |
| 4 | #ifndef _SJA1105_PTP_H | 4 | #ifndef _SJA1105_PTP_H |
| 5 | #define _SJA1105_PTP_H | 5 | #define _SJA1105_PTP_H |
| @@ -409,7 +409,8 @@ int sja1105_static_config_upload(struct sja1105_private *priv) · 408 unmodified lines | |||
| 409 | rc = static_config_buf_prepare_for_upload(priv, config_buf, buf_len); | 409 | rc = static_config_buf_prepare_for_upload(priv, config_buf, buf_len); |
| 410 | if (rc < 0) { | 410 | if (rc < 0) { |
| 411 | dev_err(dev, "Invalid config, cannot upload\n"); | 411 | dev_err(dev, "Invalid config, cannot upload\n"); |
| 412 | return -EINVAL; | 412 | rc = -EINVAL; |
| 413 | goto out; | ||
| 413 | } | 414 | } |
| 414 | /* Prevent PHY jabbering during switch reset by inhibiting | 415 | /* Prevent PHY jabbering during switch reset by inhibiting |
| 415 | * Tx on all ports and waiting for current packet to drain. | 416 | * Tx on all ports and waiting for current packet to drain. |
| @@ -418,7 +419,8 @@ int sja1105_static_config_upload(struct sja1105_private *priv) · 2 unmodified lines | |||
| 418 | rc = sja1105_inhibit_tx(priv, port_bitmap, true); | 419 | rc = sja1105_inhibit_tx(priv, port_bitmap, true); |
| 419 | if (rc < 0) { | 420 | if (rc < 0) { |
| 420 | dev_err(dev, "Failed to inhibit Tx on ports\n"); | 421 | dev_err(dev, "Failed to inhibit Tx on ports\n"); |
| 421 | return -ENXIO; | 422 | rc = -ENXIO; |
| 423 | goto out; | ||
| 422 | } | 424 | } |
| 423 | /* Wait for an eventual egress packet to finish transmission | 425 | /* Wait for an eventual egress packet to finish transmission |
| 424 | * (reach IFG). It is guaranteed that a second one will not | 426 | * (reach IFG). It is guaranteed that a second one will not |
| @@ -1,5 +1,5 @@ | |||
| 1 | /* SPDX-License-Identifier: BSD-3-Clause | 1 | /* SPDX-License-Identifier: BSD-3-Clause */ |
| 2 | * Copyright (c) 2016-2018, NXP Semiconductors | 2 | /* Copyright (c) 2016-2018, NXP Semiconductors |
| 3 | * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> | 3 | * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com> |
| 4 | */ | 4 | */ |
| 5 | #ifndef _SJA1105_STATIC_CONFIG_H | 5 | #ifndef _SJA1105_STATIC_CONFIG_H |
| @@ -1,5 +1,5 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | * Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> | 2 | /* Copyright (c) 2019, Vladimir Oltean <olteanv@gmail.com> |
| 3 | */ | 3 | */ |
| 4 | #ifndef _SJA1105_TAS_H | 4 | #ifndef _SJA1105_TAS_H |
| 5 | #define _SJA1105_TAS_H | 5 | #define _SJA1105_TAS_H |
| @@ -194,9 +194,7 @@ static void aq_ndev_set_multicast_settings(struct net_device *ndev) · 193 unmodified lines | |||
| 194 | { | 194 | { |
| 195 | struct aq_nic_s *aq_nic = netdev_priv(ndev); | 195 | struct aq_nic_s *aq_nic = netdev_priv(ndev); |
| 196 | 196 | ||
| 197 | aq_nic_set_packet_filter(aq_nic, ndev->flags); | 197 | (void)aq_nic_set_multicast_list(aq_nic, ndev); |
| 198 | |||
| 199 | aq_nic_set_multicast_list(aq_nic, ndev); | ||
| 200 | } | 198 | } |
| 201 | 199 | ||
| 202 | static int aq_ndo_vlan_rx_add_vid(struct net_device *ndev, __be16 proto, | 200 | static int aq_ndo_vlan_rx_add_vid(struct net_device *ndev, __be16 proto, |
| @@ -631,9 +631,12 @@ err_exit: · 630 unmodified lines | |||
| 631 | 631 | ||
| 632 | int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev) | 632 | int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev) |
| 633 | { | 633 | { |
| 634 | unsigned int packet_filter = self->packet_filter; | 634 | const struct aq_hw_ops *hw_ops = self->aq_hw_ops; |
| 635 | struct aq_nic_cfg_s *cfg = &self->aq_nic_cfg; | ||
| 636 | unsigned int packet_filter = ndev->flags; | ||
| 635 | struct netdev_hw_addr *ha = NULL; | 637 | struct netdev_hw_addr *ha = NULL; |
| 636 | unsigned int i = 0U; | 638 | unsigned int i = 0U; |
| 639 | int err = 0; | ||
| 637 | 640 | ||
| 638 | self->mc_list.count = 0; | 641 | self->mc_list.count = 0; |
| 639 | if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { | 642 | if (netdev_uc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { |
| @@ -641,29 +644,28 @@ int aq_nic_set_multicast_list(struct aq_nic_s *self, struct net_device *ndev) · 1 unmodified line | |||
| 641 | } else { | 644 | } else { |
| 642 | netdev_for_each_uc_addr(ha, ndev) { | 645 | netdev_for_each_uc_addr(ha, ndev) { |
| 643 | ether_addr_copy(self->mc_list.ar[i++], ha->addr); | 646 | ether_addr_copy(self->mc_list.ar[i++], ha->addr); |
| 644 | |||
| 645 | if (i >= AQ_HW_MULTICAST_ADDRESS_MAX) | ||
| 646 | break; | ||
| 647 | } | 647 | } |
| 648 | } | 648 | } |
| 649 | 649 | ||
| 650 | if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { | 650 | cfg->is_mc_list_enabled = !!(packet_filter & IFF_MULTICAST); |
| 651 | packet_filter |= IFF_ALLMULTI; | 651 | if (cfg->is_mc_list_enabled) { |
| 652 | } else { | 652 | if (i + netdev_mc_count(ndev) > AQ_HW_MULTICAST_ADDRESS_MAX) { |
| 653 | netdev_for_each_mc_addr(ha, ndev) { | 653 | packet_filter |= IFF_ALLMULTI; |
| 654 | ether_addr_copy(self->mc_list.ar[i++], ha->addr); | 654 | } else { |
| 655 | 655 | netdev_for_each_mc_addr(ha, ndev) { | |
| 656 | if (i >= AQ_HW_MULTICAST_ADDRESS_MAX) | 656 | ether_addr_copy(self->mc_list.ar[i++], |
| 657 | break; | 657 | ha->addr); |
| 658 | } | ||
| 658 | } | 659 | } |
| 659 | } | 660 | } |
| 660 | 661 | ||
| 661 | if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) { | 662 | if (i > 0 && i <= AQ_HW_MULTICAST_ADDRESS_MAX) { |
| 662 | packet_filter |= IFF_MULTICAST; | ||
| 663 | self->mc_list.count = i; | 663 | self->mc_list.count = i; |
| 664 | self->aq_hw_ops->hw_multicast_list_set(self->aq_hw, | 664 | err = hw_ops->hw_multicast_list_set(self->aq_hw, |
| 665 | self->mc_list.ar, | 665 | self->mc_list.ar, |
| 666 | self->mc_list.count); | 666 | self->mc_list.count); |
| 667 | if (err < 0) | ||
| 668 | return err; | ||
| 667 | } | 669 | } |
| 668 | return aq_nic_set_packet_filter(self, packet_filter); | 670 | return aq_nic_set_packet_filter(self, packet_filter); |
| 669 | } | 671 | } |
| @@ -313,6 +313,7 @@ int aq_ring_rx_clean(struct aq_ring_s *self, · 312 unmodified lines | |||
| 313 | break; | 313 | break; |
| 314 | 314 | ||
| 315 | buff->is_error |= buff_->is_error; | 315 | buff->is_error |= buff_->is_error; |
| 316 | buff->is_cso_err |= buff_->is_cso_err; | ||
| 316 | 317 | ||
| 317 | } while (!buff_->is_eop); | 318 | } while (!buff_->is_eop); |
| 318 | 319 | ||
| @@ -320,7 +321,7 @@ int aq_ring_rx_clean(struct aq_ring_s *self, · 1 unmodified line | |||
| 320 | err = 0; | 321 | err = 0; |
| 321 | goto err_exit; | 322 | goto err_exit; |
| 322 | } | 323 | } |
| 323 | if (buff->is_error) { | 324 | if (buff->is_error || buff->is_cso_err) { |
| 324 | buff_ = buff; | 325 | buff_ = buff; |
| 325 | do { | 326 | do { |
| 326 | next_ = buff_->next, | 327 | next_ = buff_->next, |
| @@ -818,14 +818,15 @@ static int hw_atl_b0_hw_packet_filter_set(struct aq_hw_s *self, · 817 unmodified lines | |||
| 818 | cfg->is_vlan_force_promisc); | 818 | cfg->is_vlan_force_promisc); |
| 819 | 819 | ||
| 820 | hw_atl_rpfl2multicast_flr_en_set(self, | 820 | hw_atl_rpfl2multicast_flr_en_set(self, |
| 821 | IS_FILTER_ENABLED(IFF_ALLMULTI), 0); | 821 | IS_FILTER_ENABLED(IFF_ALLMULTI) && |
| 822 | IS_FILTER_ENABLED(IFF_MULTICAST), 0); | ||
| 822 | 823 | ||
| 823 | hw_atl_rpfl2_accept_all_mc_packets_set(self, | 824 | hw_atl_rpfl2_accept_all_mc_packets_set(self, |
| 824 | IS_FILTER_ENABLED(IFF_ALLMULTI)); | 825 | IS_FILTER_ENABLED(IFF_ALLMULTI) && |
| 826 | IS_FILTER_ENABLED(IFF_MULTICAST)); | ||
| 825 | 827 | ||
| 826 | hw_atl_rpfl2broadcast_en_set(self, IS_FILTER_ENABLED(IFF_BROADCAST)); | 828 | hw_atl_rpfl2broadcast_en_set(self, IS_FILTER_ENABLED(IFF_BROADCAST)); |
| 827 | 829 | ||
| 828 | cfg->is_mc_list_enabled = IS_FILTER_ENABLED(IFF_MULTICAST); | ||
| 829 | 830 | ||
| 830 | for (i = HW_ATL_B0_MAC_MIN; i < HW_ATL_B0_MAC_MAX; ++i) | 831 | for (i = HW_ATL_B0_MAC_MIN; i < HW_ATL_B0_MAC_MAX; ++i) |
| 831 | hw_atl_rpfl2_uc_flr_en_set(self, | 832 | hw_atl_rpfl2_uc_flr_en_set(self, |
| @@ -968,14 +969,26 @@ static int hw_atl_b0_hw_interrupt_moderation_set(struct aq_hw_s *self) · 136 unmodified lines | |||
| 968 | 969 | ||
| 969 | static int hw_atl_b0_hw_stop(struct aq_hw_s *self) | 970 | static int hw_atl_b0_hw_stop(struct aq_hw_s *self) |
| 970 | { | 971 | { |
| 972 | int err; | ||
| 973 | u32 val; | ||
| 974 | |||
| 971 | hw_atl_b0_hw_irq_disable(self, HW_ATL_B0_INT_MASK); | 975 | hw_atl_b0_hw_irq_disable(self, HW_ATL_B0_INT_MASK); |
| 972 | 976 | ||
| 973 | /* Invalidate Descriptor Cache to prevent writing to the cached | 977 | /* Invalidate Descriptor Cache to prevent writing to the cached |
| 974 | * descriptors and to the data pointer of those descriptors | 978 | * descriptors and to the data pointer of those descriptors |
| 975 | */ | 979 | */ |
| 976 | hw_atl_rdm_rx_dma_desc_cache_init_set(self, 1); | 980 | hw_atl_rdm_rx_dma_desc_cache_init_tgl(self); |
| 977 | 981 | ||
| 978 | return aq_hw_err_from_flags(self); | 982 | err = aq_hw_err_from_flags(self); |
| 983 | |||
| 984 | if (err) | ||
| 985 | goto err_exit; | ||
| 986 | |||
| 987 | readx_poll_timeout_atomic(hw_atl_rdm_rx_dma_desc_cache_init_done_get, | ||
| 988 | self, val, val == 1, 1000U, 10000U); | ||
| 989 | |||
| 990 | err_exit: | ||
| 991 | return err; | ||
| 979 | } | 992 | } |
| 980 | 993 | ||
| 981 | static int hw_atl_b0_hw_ring_tx_stop(struct aq_hw_s *self, | 994 | static int hw_atl_b0_hw_ring_tx_stop(struct aq_hw_s *self, |
| @@ -606,12 +606,25 @@ void hw_atl_rpb_rx_flow_ctl_mode_set(struct aq_hw_s *aq_hw, u32 rx_flow_ctl_mode · 605 unmodified lines | |||
| 606 | HW_ATL_RPB_RX_FC_MODE_SHIFT, rx_flow_ctl_mode); | 606 | HW_ATL_RPB_RX_FC_MODE_SHIFT, rx_flow_ctl_mode); |
| 607 | } | 607 | } |
| 608 | 608 | ||
| 609 | void hw_atl_rdm_rx_dma_desc_cache_init_set(struct aq_hw_s *aq_hw, u32 init) | 609 | void hw_atl_rdm_rx_dma_desc_cache_init_tgl(struct aq_hw_s *aq_hw) |
| 610 | { | 610 | { |
| 611 | u32 val; | ||
| 612 | |||
| 613 | val = aq_hw_read_reg_bit(aq_hw, HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_ADR, | ||
| 614 | HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSK, | ||
| 615 | HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_SHIFT); | ||
| 616 | |||
| 611 | aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_ADR, | 617 | aq_hw_write_reg_bit(aq_hw, HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_ADR, |
| 612 | HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSK, | 618 | HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_MSK, |
| 613 | HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_SHIFT, | 619 | HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_SHIFT, |
| 614 | init); | 620 | val ^ 1); |
| 621 | } | ||
| 622 | |||
| 623 | u32 hw_atl_rdm_rx_dma_desc_cache_init_done_get(struct aq_hw_s *aq_hw) | ||
| 624 | { | ||
| 625 | return aq_hw_read_reg_bit(aq_hw, RDM_RX_DMA_DESC_CACHE_INIT_DONE_ADR, | ||
| 626 | RDM_RX_DMA_DESC_CACHE_INIT_DONE_MSK, | ||
| 627 | RDM_RX_DMA_DESC_CACHE_INIT_DONE_SHIFT); | ||
| 615 | } | 628 | } |
| 616 | 629 | ||
| 617 | void hw_atl_rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw_s *aq_hw, | 630 | void hw_atl_rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw_s *aq_hw, |
| @@ -313,8 +313,11 @@ void hw_atl_rpb_rx_pkt_buff_size_per_tc_set(struct aq_hw_s *aq_hw, · 312 unmodified lines | |||
| 313 | u32 rx_pkt_buff_size_per_tc, | 313 | u32 rx_pkt_buff_size_per_tc, |
| 314 | u32 buffer); | 314 | u32 buffer); |
| 315 | 315 | ||
| 316 | /* set rdm rx dma descriptor cache init */ | 316 | /* toggle rdm rx dma descriptor cache init */ |
| 317 | void hw_atl_rdm_rx_dma_desc_cache_init_set(struct aq_hw_s *aq_hw, u32 init); | 317 | void hw_atl_rdm_rx_dma_desc_cache_init_tgl(struct aq_hw_s *aq_hw); |
| 318 | |||
| 319 | /* get rdm rx dma descriptor cache init done */ | ||
| 320 | u32 hw_atl_rdm_rx_dma_desc_cache_init_done_get(struct aq_hw_s *aq_hw); | ||
| 318 | 321 | ||
| 319 | /* set rx xoff enable (per tc) */ | 322 | /* set rx xoff enable (per tc) */ |
| 320 | void hw_atl_rpb_rx_xoff_en_per_tc_set(struct aq_hw_s *aq_hw, u32 rx_xoff_en_per_tc, | 323 | void hw_atl_rpb_rx_xoff_en_per_tc_set(struct aq_hw_s *aq_hw, u32 rx_xoff_en_per_tc, |
| @@ -318,6 +318,25 @@ · 317 unmodified lines | |||
| 318 | /* default value of bitfield rdm_desc_init_i */ | 318 | /* default value of bitfield rdm_desc_init_i */ |
| 319 | #define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_DEFAULT 0x0 | 319 | #define HW_ATL_RDM_RX_DMA_DESC_CACHE_INIT_DEFAULT 0x0 |
| 320 | 320 | ||
| 321 | /* rdm_desc_init_done_i bitfield definitions | ||
| 322 | * preprocessor definitions for the bitfield rdm_desc_init_done_i. | ||
| 323 | * port="pif_rdm_desc_init_done_i" | ||
| 324 | */ | ||
| 325 | |||
| 326 | /* register address for bitfield rdm_desc_init_done_i */ | ||
| 327 | #define RDM_RX_DMA_DESC_CACHE_INIT_DONE_ADR 0x00005a10 | ||
| 328 | /* bitmask for bitfield rdm_desc_init_done_i */ | ||
| 329 | #define RDM_RX_DMA_DESC_CACHE_INIT_DONE_MSK 0x00000001U | ||
| 330 | /* inverted bitmask for bitfield rdm_desc_init_done_i */ | ||
| 331 | #define RDM_RX_DMA_DESC_CACHE_INIT_DONE_MSKN 0xfffffffe | ||
| 332 | /* lower bit position of bitfield rdm_desc_init_done_i */ | ||
| 333 | #define RDM_RX_DMA_DESC_CACHE_INIT_DONE_SHIFT 0U | ||
| 334 | /* width of bitfield rdm_desc_init_done_i */ | ||
| 335 | #define RDM_RX_DMA_DESC_CACHE_INIT_DONE_WIDTH 1 | ||
| 336 | /* default value of bitfield rdm_desc_init_done_i */ | ||
| 337 | #define RDM_RX_DMA_DESC_CACHE_INIT_DONE_DEFAULT 0x0 | ||
| 338 | |||
| 339 | |||
| 321 | /* rx int_desc_wrb_en bitfield definitions | 340 | /* rx int_desc_wrb_en bitfield definitions |
| 322 | * preprocessor definitions for the bitfield "int_desc_wrb_en". | 341 | * preprocessor definitions for the bitfield "int_desc_wrb_en". |
| 323 | * port="pif_rdm_int_desc_wrb_en_i" | 342 | * port="pif_rdm_int_desc_wrb_en_i" |
| @@ -337,7 +337,7 @@ static int aq_fw2x_get_phy_temp(struct aq_hw_s *self, int *temp) · 336 unmodified lines | |||
| 337 | /* Convert PHY temperature from 1/256 degree Celsius | 337 | /* Convert PHY temperature from 1/256 degree Celsius |
| 338 | * to 1/1000 degree Celsius. | 338 | * to 1/1000 degree Celsius. |
| 339 | */ | 339 | */ |
| 340 | *temp = temp_res * 1000 / 256; | 340 | *temp = (temp_res & 0xFFFF) * 1000 / 256; |
| 341 | 341 | ||
| 342 | return 0; | 342 | return 0; |
| 343 | } | 343 | } |
| @@ -526,7 +526,7 @@ static int ag71xx_mdio_probe(struct ag71xx *ag) · 525 unmodified lines | |||
| 526 | struct device *dev = &ag->pdev->dev; | 526 | struct device *dev = &ag->pdev->dev; |
| 527 | struct net_device *ndev = ag->ndev; | 527 | struct net_device *ndev = ag->ndev; |
| 528 | static struct mii_bus *mii_bus; | 528 | static struct mii_bus *mii_bus; |
| 529 | struct device_node *np; | 529 | struct device_node *np, *mnp; |
| 530 | int err; | 530 | int err; |
| 531 | 531 | ||
| 532 | np = dev->of_node; | 532 | np = dev->of_node; |
| @@ -571,7 +571,9 @@ static int ag71xx_mdio_probe(struct ag71xx *ag) · 38 unmodified lines | |||
| 571 | msleep(200); | 571 | msleep(200); |
| 572 | } | 572 | } |
| 573 | 573 | ||
| 574 | err = of_mdiobus_register(mii_bus, np); | 574 | mnp = of_get_child_by_name(np, "mdio"); |
| 575 | err = of_mdiobus_register(mii_bus, mnp); | ||
| 576 | of_node_put(mnp); | ||
| 575 | if (err) | 577 | if (err) |
| 576 | goto mdio_err_put_clk; | 578 | goto mdio_err_put_clk; |
| 577 | 579 | ||
| @@ -8,7 +8,6 @@ config NET_VENDOR_BROADCOM · 7 unmodified lines | |||
| 8 | default y | 8 | default y |
| 9 | depends on (SSB_POSSIBLE && HAS_DMA) || PCI || BCM63XX || \ | 9 | depends on (SSB_POSSIBLE && HAS_DMA) || PCI || BCM63XX || \ |
| 10 | SIBYTE_SB1xxx_SOC | 10 | SIBYTE_SB1xxx_SOC |
| 11 | select DIMLIB | ||
| 12 | ---help--- | 11 | ---help--- |
| 13 | If you have a network (Ethernet) chipset belonging to this class, | 12 | If you have a network (Ethernet) chipset belonging to this class, |
| 14 | say Y. | 13 | say Y. |
| @@ -69,6 +68,7 @@ config BCMGENET · 54 unmodified lines | |||
| 69 | select FIXED_PHY | 68 | select FIXED_PHY |
| 70 | select BCM7XXX_PHY | 69 | select BCM7XXX_PHY |
| 71 | select MDIO_BCM_UNIMAC | 70 | select MDIO_BCM_UNIMAC |
| 71 | select DIMLIB | ||
| 72 | help | 72 | help |
| 73 | This driver supports the built-in Ethernet MACs found in the | 73 | This driver supports the built-in Ethernet MACs found in the |
| 74 | Broadcom BCM7xxx Set Top Box family chipset. | 74 | Broadcom BCM7xxx Set Top Box family chipset. |
| @@ -188,6 +188,7 @@ config SYSTEMPORT · 113 unmodified lines | |||
| 188 | select MII | 188 | select MII |
| 189 | select PHYLIB | 189 | select PHYLIB |
| 190 | select FIXED_PHY | 190 | select FIXED_PHY |
| 191 | select DIMLIB | ||
| 191 | help | 192 | help |
| 192 | This driver supports the built-in Ethernet MACs found in the | 193 | This driver supports the built-in Ethernet MACs found in the |
| 193 | Broadcom BCM7xxx Set Top Box family chipset using an internal | 194 | Broadcom BCM7xxx Set Top Box family chipset using an internal |
| @@ -200,6 +201,7 @@ config BNXT · 6 unmodified lines | |||
| 200 | select LIBCRC32C | 201 | select LIBCRC32C |
| 201 | select NET_DEVLINK | 202 | select NET_DEVLINK |
| 202 | select PAGE_POOL | 203 | select PAGE_POOL |
| 204 | select DIMLIB | ||
| 203 | ---help--- | 205 | ---help--- |
| 204 | This driver supports Broadcom NetXtreme-C/E 10/25/40/50 gigabit | 206 | This driver supports Broadcom NetXtreme-C/E 10/25/40/50 gigabit |
| 205 | Ethernet cards. To compile this driver as a module, choose M here: | 207 | Ethernet cards. To compile this driver as a module, choose M here: |
| @@ -2018,6 +2018,8 @@ static void bcmgenet_link_intr_enable(struct bcmgenet_priv *priv) · 2017 unmodified lines | |||
| 2018 | */ | 2018 | */ |
| 2019 | if (priv->internal_phy) { | 2019 | if (priv->internal_phy) { |
| 2020 | int0_enable |= UMAC_IRQ_LINK_EVENT; | 2020 | int0_enable |= UMAC_IRQ_LINK_EVENT; |
| 2021 | if (GENET_IS_V1(priv) || GENET_IS_V2(priv) || GENET_IS_V3(priv)) | ||
| 2022 | int0_enable |= UMAC_IRQ_PHY_DET_R; | ||
| 2021 | } else if (priv->ext_phy) { | 2023 | } else if (priv->ext_phy) { |
| 2022 | int0_enable |= UMAC_IRQ_LINK_EVENT; | 2024 | int0_enable |= UMAC_IRQ_LINK_EVENT; |
| 2023 | } else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) { | 2025 | } else if (priv->phy_interface == PHY_INTERFACE_MODE_MOCA) { |
| @@ -2611,11 +2613,14 @@ static void bcmgenet_irq_task(struct work_struct *work) · 587 unmodified lines | |||
| 2611 | priv->irq0_stat = 0; | 2613 | priv->irq0_stat = 0; |
| 2612 | spin_unlock_irq(&priv->lock); | 2614 | spin_unlock_irq(&priv->lock); |
| 2613 | 2615 | ||
| 2616 | if (status & UMAC_IRQ_PHY_DET_R && | ||
| 2617 | priv->dev->phydev->autoneg != AUTONEG_ENABLE) | ||
| 2618 | phy_init_hw(priv->dev->phydev); | ||
| 2619 | |||
| 2614 | /* Link UP/DOWN event */ | 2620 | /* Link UP/DOWN event */ |
| 2615 | if (status & UMAC_IRQ_LINK_EVENT) { | 2621 | if (status & UMAC_IRQ_LINK_EVENT) |
| 2616 | priv->dev->phydev->link = !!(status & UMAC_IRQ_LINK_UP); | ||
| 2617 | phy_mac_interrupt(priv->dev->phydev); | 2622 | phy_mac_interrupt(priv->dev->phydev); |
| 2618 | } | 2623 | |
| 2619 | } | 2624 | } |
| 2620 | 2625 | ||
| 2621 | /* bcmgenet_isr1: handle Rx and Tx priority queues */ | 2626 | /* bcmgenet_isr1: handle Rx and Tx priority queues */ |
| @@ -2710,7 +2715,7 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id) · 88 unmodified lines | |||
| 2710 | } | 2715 | } |
| 2711 | 2716 | ||
| 2712 | /* all other interested interrupts handled in bottom half */ | 2717 | /* all other interested interrupts handled in bottom half */ |
| 2713 | status &= UMAC_IRQ_LINK_EVENT; | 2718 | status &= (UMAC_IRQ_LINK_EVENT | UMAC_IRQ_PHY_DET_R); |
| 2714 | if (status) { | 2719 | if (status) { |
| 2715 | /* Save irq status for bottom-half processing. */ | 2720 | /* Save irq status for bottom-half processing. */ |
| 2716 | spin_lock_irqsave(&priv->lock, flags); | 2721 | spin_lock_irqsave(&priv->lock, flags); |
| @@ -2874,6 +2879,12 @@ static int bcmgenet_open(struct net_device *dev) · 157 unmodified lines | |||
| 2874 | if (priv->internal_phy) | 2879 | if (priv->internal_phy) |
| 2875 | bcmgenet_power_up(priv, GENET_POWER_PASSIVE); | 2880 | bcmgenet_power_up(priv, GENET_POWER_PASSIVE); |
| 2876 | 2881 | ||
| 2882 | ret = bcmgenet_mii_connect(dev); | ||
| 2883 | if (ret) { | ||
| 2884 | netdev_err(dev, "failed to connect to PHY\n"); | ||
| 2885 | goto err_clk_disable; | ||
| 2886 | } | ||
| 2887 | |||
| 2877 | /* take MAC out of reset */ | 2888 | /* take MAC out of reset */ |
| 2878 | bcmgenet_umac_reset(priv); | 2889 | bcmgenet_umac_reset(priv); |
| 2879 | 2890 | ||
| @@ -2883,6 +2894,12 @@ static int bcmgenet_open(struct net_device *dev) · 3 unmodified lines | |||
| 2883 | reg = bcmgenet_umac_readl(priv, UMAC_CMD); | 2894 | reg = bcmgenet_umac_readl(priv, UMAC_CMD); |
| 2884 | priv->crc_fwd_en = !!(reg & CMD_CRC_FWD); | 2895 | priv->crc_fwd_en = !!(reg & CMD_CRC_FWD); |
| 2885 | 2896 | ||
| 2897 | ret = bcmgenet_mii_config(dev, true); | ||
| 2898 | if (ret) { | ||
| 2899 | netdev_err(dev, "unsupported PHY\n"); | ||
| 2900 | goto err_disconnect_phy; | ||
| 2901 | } | ||
| 2902 | |||
| 2886 | bcmgenet_set_hw_addr(priv, dev->dev_addr); | 2903 | bcmgenet_set_hw_addr(priv, dev->dev_addr); |
| 2887 | 2904 | ||
| 2888 | if (priv->internal_phy) { | 2905 | if (priv->internal_phy) { |
| @@ -2898,7 +2915,7 @@ static int bcmgenet_open(struct net_device *dev) · 9 unmodified lines | |||
| 2898 | ret = bcmgenet_init_dma(priv); | 2915 | ret = bcmgenet_init_dma(priv); |
| 2899 | if (ret) { | 2916 | if (ret) { |
| 2900 | netdev_err(dev, "failed to initialize DMA\n"); | 2917 | netdev_err(dev, "failed to initialize DMA\n"); |
| 2901 | goto err_clk_disable; | 2918 | goto err_disconnect_phy; |
| 2902 | } | 2919 | } |
| 2903 | 2920 | ||
| 2904 | /* Always enable ring 16 - descriptor ring */ | 2921 | /* Always enable ring 16 - descriptor ring */ |
| @@ -2921,25 +2938,19 @@ static int bcmgenet_open(struct net_device *dev) · 16 unmodified lines | |||
| 2921 | goto err_irq0; | 2938 | goto err_irq0; |
| 2922 | } | 2939 | } |
| 2923 | 2940 | ||
| 2924 | ret = bcmgenet_mii_probe(dev); | ||
| 2925 | if (ret) { | ||
| 2926 | netdev_err(dev, "failed to connect to PHY\n"); | ||
| 2927 | goto err_irq1; | ||
| 2928 | } | ||
| 2929 | |||
| 2930 | bcmgenet_netif_start(dev); | 2941 | bcmgenet_netif_start(dev); |
| 2931 | 2942 | ||
| 2932 | netif_tx_start_all_queues(dev); | 2943 | netif_tx_start_all_queues(dev); |
| 2933 | 2944 | ||
| 2934 | return 0; | 2945 | return 0; |
| 2935 | 2946 | ||
| 2936 | err_irq1: | ||
| 2937 | free_irq(priv->irq1, priv); | ||
| 2938 | err_irq0: | 2947 | err_irq0: |
| 2939 | free_irq(priv->irq0, priv); | 2948 | free_irq(priv->irq0, priv); |
| 2940 | err_fini_dma: | 2949 | err_fini_dma: |
| 2941 | bcmgenet_dma_teardown(priv); | 2950 | bcmgenet_dma_teardown(priv); |
| 2942 | bcmgenet_fini_dma(priv); | 2951 | bcmgenet_fini_dma(priv); |
| 2952 | err_disconnect_phy: | ||
| 2953 | phy_disconnect(dev->phydev); | ||
| 2943 | err_clk_disable: | 2954 | err_clk_disable: |
| 2944 | if (priv->internal_phy) | 2955 | if (priv->internal_phy) |
| 2945 | bcmgenet_power_down(priv, GENET_POWER_PASSIVE); | 2956 | bcmgenet_power_down(priv, GENET_POWER_PASSIVE); |
| @@ -3620,6 +3631,8 @@ static int bcmgenet_resume(struct device *d) · 674 unmodified lines | |||
| 3620 | if (priv->internal_phy) | 3631 | if (priv->internal_phy) |
| 3621 | bcmgenet_power_up(priv, GENET_POWER_PASSIVE); | 3632 | bcmgenet_power_up(priv, GENET_POWER_PASSIVE); |
| 3622 | 3633 | ||
| 3634 | phy_init_hw(dev->phydev); | ||
| 3635 | |||
| 3623 | bcmgenet_umac_reset(priv); | 3636 | bcmgenet_umac_reset(priv); |
| 3624 | 3637 | ||
| 3625 | init_umac(priv); | 3638 | init_umac(priv); |
| @@ -3628,8 +3641,6 @@ static int bcmgenet_resume(struct device *d) · 2 unmodified lines | |||
| 3628 | if (priv->wolopts) | 3641 | if (priv->wolopts) |
| 3629 | clk_disable_unprepare(priv->clk_wol); | 3642 | clk_disable_unprepare(priv->clk_wol); |
| 3630 | 3643 | ||
| 3631 | phy_init_hw(dev->phydev); | ||
| 3632 | |||
| 3633 | /* Speed settings must be restored */ | 3644 | /* Speed settings must be restored */ |
| 3634 | bcmgenet_mii_config(priv->dev, false); | 3645 | bcmgenet_mii_config(priv->dev, false); |
| 3635 | 3646 | ||
| @@ -366,6 +366,7 @@ struct bcmgenet_mib_counters { · 365 unmodified lines | |||
| 366 | #define EXT_PWR_DOWN_PHY_EN (1 << 20) | 366 | #define EXT_PWR_DOWN_PHY_EN (1 << 20) |
| 367 | 367 | ||
| 368 | #define EXT_RGMII_OOB_CTRL 0x0C | 368 | #define EXT_RGMII_OOB_CTRL 0x0C |
| 369 | #define RGMII_MODE_EN_V123 (1 << 0) | ||
| 369 | #define RGMII_LINK (1 << 4) | 370 | #define RGMII_LINK (1 << 4) |
| 370 | #define OOB_DISABLE (1 << 5) | 371 | #define OOB_DISABLE (1 << 5) |
| 371 | #define RGMII_MODE_EN (1 << 6) | 372 | #define RGMII_MODE_EN (1 << 6) |
| @@ -719,8 +720,8 @@ GENET_IO_MACRO(rbuf, GENET_RBUF_OFF); · 347 unmodified lines | |||
| 719 | 720 | ||
| 720 | /* MDIO routines */ | 721 | /* MDIO routines */ |
| 721 | int bcmgenet_mii_init(struct net_device *dev); | 722 | int bcmgenet_mii_init(struct net_device *dev); |
| 723 | int bcmgenet_mii_connect(struct net_device *dev); | ||
| 722 | int bcmgenet_mii_config(struct net_device *dev, bool init); | 724 | int bcmgenet_mii_config(struct net_device *dev, bool init); |
| 723 | int bcmgenet_mii_probe(struct net_device *dev); | ||
| 724 | void bcmgenet_mii_exit(struct net_device *dev); | 725 | void bcmgenet_mii_exit(struct net_device *dev); |
| 725 | void bcmgenet_phy_power_set(struct net_device *dev, bool enable); | 726 | void bcmgenet_phy_power_set(struct net_device *dev, bool enable); |
| 726 | void bcmgenet_mii_setup(struct net_device *dev); | 727 | void bcmgenet_mii_setup(struct net_device *dev); |
| @@ -173,6 +173,46 @@ static void bcmgenet_moca_phy_setup(struct bcmgenet_priv *priv) · 172 unmodified lines | |||
| 173 | bcmgenet_fixed_phy_link_update); | 173 | bcmgenet_fixed_phy_link_update); |
| 174 | } | 174 | } |
| 175 | 175 | ||
| 176 | int bcmgenet_mii_connect(struct net_device *dev) | ||
| 177 | { | ||
| 178 | struct bcmgenet_priv *priv = netdev_priv(dev); | ||
| 179 | struct device_node *dn = priv->pdev->dev.of_node; | ||
| 180 | struct phy_device *phydev; | ||
| 181 | u32 phy_flags = 0; | ||
| 182 | int ret; | ||
| 183 | |||
| 184 | /* Communicate the integrated PHY revision */ | ||
| 185 | if (priv->internal_phy) | ||
| 186 | phy_flags = priv->gphy_rev; | ||
| 187 | |||
| 188 | /* Initialize link state variables that bcmgenet_mii_setup() uses */ | ||
| 189 | priv->old_link = -1; | ||
| 190 | priv->old_speed = -1; | ||
| 191 | priv->old_duplex = -1; | ||
| 192 | priv->old_pause = -1; | ||
| 193 | |||
| 194 | if (dn) { | ||
| 195 | phydev = of_phy_connect(dev, priv->phy_dn, bcmgenet_mii_setup, | ||
| 196 | phy_flags, priv->phy_interface); | ||
| 197 | if (!phydev) { | ||
| 198 | pr_err("could not attach to PHY\n"); | ||
| 199 | return -ENODEV; | ||
| 200 | } | ||
| 201 | } else { | ||
| 202 | phydev = dev->phydev; | ||
| 203 | phydev->dev_flags = phy_flags; | ||
| 204 | |||
| 205 | ret = phy_connect_direct(dev, phydev, bcmgenet_mii_setup, | ||
| 206 | priv->phy_interface); | ||
| 207 | if (ret) { | ||
| 208 | pr_err("could not attach to PHY\n"); | ||
| 209 | return -ENODEV; | ||
| 210 | } | ||
| 211 | } | ||
| 212 | |||
| 213 | return 0; | ||
| 214 | } | ||
| 215 | |||
| 176 | int bcmgenet_mii_config(struct net_device *dev, bool init) | 216 | int bcmgenet_mii_config(struct net_device *dev, bool init) |
| 177 | { | 217 | { |
| 178 | struct bcmgenet_priv *priv = netdev_priv(dev); | 218 | struct bcmgenet_priv *priv = netdev_priv(dev); |
| @@ -258,74 +298,29 @@ int bcmgenet_mii_config(struct net_device *dev, bool init) · 79 unmodified lines | |||
| 258 | */ | 298 | */ |
| 259 | if (priv->ext_phy) { | 299 | if (priv->ext_phy) { |
| 260 | reg = bcmgenet_ext_readl(priv, EXT_RGMII_OOB_CTRL); | 300 | reg = bcmgenet_ext_readl(priv, EXT_RGMII_OOB_CTRL); |
| 261 | reg |= RGMII_MODE_EN | id_mode_dis; | 301 | reg |= id_mode_dis; |
| 302 | if (GENET_IS_V1(priv) || GENET_IS_V2(priv) || GENET_IS_V3(priv)) | ||
| 303 | reg |= RGMII_MODE_EN_V123; | ||
| 304 | else | ||
| 305 | reg |= RGMII_MODE_EN; | ||
| 262 | bcmgenet_ext_writel(priv, reg, EXT_RGMII_OOB_CTRL); | 306 | bcmgenet_ext_writel(priv, reg, EXT_RGMII_OOB_CTRL); |
| 263 | } | 307 | } |
| 264 | 308 | ||
| 265 | if (init) | 309 | if (init) { |
| 266 | dev_info(kdev, "configuring instance for %s\n", phy_name); | 310 | linkmode_copy(phydev->advertising, phydev->supported); |
| 267 | |||
| 268 | return 0; | ||
| 269 | } | ||
| 270 | |||
| 271 | int bcmgenet_mii_probe(struct net_device *dev) | ||
| 272 | { | ||
| 273 | struct bcmgenet_priv *priv = netdev_priv(dev); | ||
| 274 | struct device_node *dn = priv->pdev->dev.of_node; | ||
| 275 | struct phy_device *phydev; | ||
| 276 | u32 phy_flags; | ||
| 277 | int ret; | ||
| 278 | |||
| 279 | /* Communicate the integrated PHY revision */ | ||
| 280 | phy_flags = priv->gphy_rev; | ||
| 281 | |||
| 282 | /* Initialize link state variables that bcmgenet_mii_setup() uses */ | ||
| 283 | priv->old_link = -1; | ||
| 284 | priv->old_speed = -1; | ||
| 285 | priv->old_duplex = -1; | ||
| 286 | priv->old_pause = -1; | ||
| 287 | |||
| 288 | if (dn) { | ||
| 289 | phydev = of_phy_connect(dev, priv->phy_dn, bcmgenet_mii_setup, | ||
| 290 | phy_flags, priv->phy_interface); | ||
| 291 | if (!phydev) { | ||
| 292 | pr_err("could not attach to PHY\n"); | ||
| 293 | return -ENODEV; | ||
| 294 | } | ||
| 295 | } else { | ||
| 296 | phydev = dev->phydev; | ||
| 297 | phydev->dev_flags = phy_flags; | ||
| 298 | 311 | ||
| 299 | ret = phy_connect_direct(dev, phydev, bcmgenet_mii_setup, | 312 | /* The internal PHY has its link interrupts routed to the |
| 300 | priv->phy_interface); | 313 | * Ethernet MAC ISRs. On GENETv5 there is a hardware issue |
| 301 | if (ret) { | 314 | * that prevents the signaling of link UP interrupts when |
| 302 | pr_err("could not attach to PHY\n"); | 315 | * the link operates at 10Mbps, so fallback to polling for |
| 303 | return -ENODEV; | 316 | * those versions of GENET. |
| 304 | } | 317 | */ |
| 305 | } | 318 | if (priv->internal_phy && !GENET_IS_V5(priv)) |
| 319 | phydev->irq = PHY_IGNORE_INTERRUPT; | ||
| 306 | 320 | ||
| 307 | /* Configure port multiplexer based on what the probed PHY device since | 321 | dev_info(kdev, "configuring instance for %s\n", phy_name); |
| 308 | * reading the 'max-speed' property determines the maximum supported | ||
| 309 | * PHY speed which is needed for bcmgenet_mii_config() to configure | ||
| 310 | * things appropriately. | ||
| 311 | */ | ||
| 312 | ret = bcmgenet_mii_config(dev, true); | ||
| 313 | if (ret) { | ||
| 314 | phy_disconnect(dev->phydev); | ||
| 315 | return ret; | ||
| 316 | } | 322 | } |
| 317 | 323 | ||
| 318 | linkmode_copy(phydev->advertising, phydev->supported); | ||
| 319 | |||
| 320 | /* The internal PHY has its link interrupts routed to the | ||
| 321 | * Ethernet MAC ISRs. On GENETv5 there is a hardware issue | ||
| 322 | * that prevents the signaling of link UP interrupts when | ||
| 323 | * the link operates at 10Mbps, so fallback to polling for | ||
| 324 | * those versions of GENET. | ||
| 325 | */ | ||
| 326 | if (priv->internal_phy && !GENET_IS_V5(priv)) | ||
| 327 | dev->phydev->irq = PHY_IGNORE_INTERRUPT; | ||
| 328 | |||
| 329 | return 0; | 324 | return 0; |
| 330 | } | 325 | } |
| 331 | 326 | ||
| @@ -3405,17 +3405,17 @@ static int macb_clk_init(struct platform_device *pdev, struct clk **pclk, · 3404 unmodified lines | |||
| 3405 | return err; | 3405 | return err; |
| 3406 | } | 3406 | } |
| 3407 | 3407 | ||
| 3408 | *tx_clk = devm_clk_get(&pdev->dev, "tx_clk"); | 3408 | *tx_clk = devm_clk_get_optional(&pdev->dev, "tx_clk"); |
| 3409 | if (IS_ERR(*tx_clk)) | 3409 | if (IS_ERR(*tx_clk)) |
| 3410 | *tx_clk = NULL; | 3410 | return PTR_ERR(*tx_clk); |
| 3411 | 3411 | ||
| 3412 | *rx_clk = devm_clk_get(&pdev->dev, "rx_clk"); | 3412 | *rx_clk = devm_clk_get_optional(&pdev->dev, "rx_clk"); |
| 3413 | if (IS_ERR(*rx_clk)) | 3413 | if (IS_ERR(*rx_clk)) |
| 3414 | *rx_clk = NULL; | 3414 | return PTR_ERR(*rx_clk); |
| 3415 | 3415 | ||
| 3416 | *tsu_clk = devm_clk_get(&pdev->dev, "tsu_clk"); | 3416 | *tsu_clk = devm_clk_get_optional(&pdev->dev, "tsu_clk"); |
| 3417 | if (IS_ERR(*tsu_clk)) | 3417 | if (IS_ERR(*tsu_clk)) |
| 3418 | *tsu_clk = NULL; | 3418 | return PTR_ERR(*tsu_clk); |
| 3419 | 3419 | ||
| 3420 | err = clk_prepare_enable(*pclk); | 3420 | err = clk_prepare_enable(*pclk); |
| 3421 | if (err) { | 3421 | if (err) { |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* cavium_ptp.h - PTP 1588 clock on Cavium hardware | 2 | /* cavium_ptp.h - PTP 1588 clock on Cavium hardware |
| 3 | * Copyright (c) 2003-2015, 2017 Cavium, Inc. | 3 | * Copyright (c) 2003-2015, 2017 Cavium, Inc. |
| 4 | */ | 4 | */ |
| @@ -137,13 +137,12 @@ static int uldrx_handler(struct sge_rspq *q, const __be64 *rsp, · 136 unmodified lines | |||
| 137 | static int alloc_uld_rxqs(struct adapter *adap, | 137 | static int alloc_uld_rxqs(struct adapter *adap, |
| 138 | struct sge_uld_rxq_info *rxq_info, bool lro) | 138 | struct sge_uld_rxq_info *rxq_info, bool lro) |
| 139 | { | 139 | { |
| 140 | struct sge *s = &adap->sge; | ||
| 141 | unsigned int nq = rxq_info->nrxq + rxq_info->nciq; | 140 | unsigned int nq = rxq_info->nrxq + rxq_info->nciq; |
| 141 | int i, err, msi_idx, que_idx = 0, bmap_idx = 0; | ||
| 142 | struct sge_ofld_rxq *q = rxq_info->uldrxq; | 142 | struct sge_ofld_rxq *q = rxq_info->uldrxq; |
| 143 | unsigned short *ids = rxq_info->rspq_id; | 143 | unsigned short *ids = rxq_info->rspq_id; |
| 144 | unsigned int bmap_idx = 0; | 144 | struct sge *s = &adap->sge; |
| 145 | unsigned int per_chan; | 145 | unsigned int per_chan; |
| 146 | int i, err, msi_idx, que_idx = 0; | ||
| 147 | 146 | ||
| 148 | per_chan = rxq_info->nrxq / adap->params.nports; | 147 | per_chan = rxq_info->nrxq / adap->params.nports; |
| 149 | 148 | ||
| @@ -161,6 +160,10 @@ static int alloc_uld_rxqs(struct adapter *adap, · 11 unmodified lines | |||
| 161 | 160 | ||
| 162 | if (msi_idx >= 0) { | 161 | if (msi_idx >= 0) { |
| 163 | bmap_idx = get_msix_idx_from_bmap(adap); | 162 | bmap_idx = get_msix_idx_from_bmap(adap); |
| 163 | if (bmap_idx < 0) { | ||
| 164 | err = -ENOSPC; | ||
| 165 | goto freeout; | ||
| 166 | } | ||
| 164 | msi_idx = adap->msix_info_ulds[bmap_idx].idx; | 167 | msi_idx = adap->msix_info_ulds[bmap_idx].idx; |
| 165 | } | 168 | } |
| 166 | err = t4_sge_alloc_rxq(adap, &q->rspq, false, | 169 | err = t4_sge_alloc_rxq(adap, &q->rspq, false, |
| @@ -1235,6 +1235,8 @@ static void dpaa2_eth_set_rx_taildrop(struct dpaa2_eth_priv *priv, bool enable) · 1234 unmodified lines | |||
| 1235 | priv->rx_td_enabled = enable; | 1235 | priv->rx_td_enabled = enable; |
| 1236 | } | 1236 | } |
| 1237 | 1237 | ||
| 1238 | static void update_tx_fqids(struct dpaa2_eth_priv *priv); | ||
| 1239 | |||
| 1238 | static int link_state_update(struct dpaa2_eth_priv *priv) | 1240 | static int link_state_update(struct dpaa2_eth_priv *priv) |
| 1239 | { | 1241 | { |
| 1240 | struct dpni_link_state state = {0}; | 1242 | struct dpni_link_state state = {0}; |
| @@ -1261,6 +1263,7 @@ static int link_state_update(struct dpaa2_eth_priv *priv) · 20 unmodified lines | |||
| 1261 | goto out; | 1263 | goto out; |
| 1262 | 1264 | ||
| 1263 | if (state.up) { | 1265 | if (state.up) { |
| 1266 | update_tx_fqids(priv); | ||
| 1264 | netif_carrier_on(priv->net_dev); | 1267 | netif_carrier_on(priv->net_dev); |
| 1265 | netif_tx_start_all_queues(priv->net_dev); | 1268 | netif_tx_start_all_queues(priv->net_dev); |
| 1266 | } else { | 1269 | } else { |
| @@ -2533,6 +2536,47 @@ static int set_pause(struct dpaa2_eth_priv *priv) · 1266 unmodified lines | |||
| 2533 | return 0; | 2536 | return 0; |
| 2534 | } | 2537 | } |
| 2535 | 2538 | ||
| 2539 | static void update_tx_fqids(struct dpaa2_eth_priv *priv) | ||
| 2540 | { | ||
| 2541 | struct dpni_queue_id qid = {0}; | ||
| 2542 | struct dpaa2_eth_fq *fq; | ||
| 2543 | struct dpni_queue queue; | ||
| 2544 | int i, j, err; | ||
| 2545 | |||
| 2546 | /* We only use Tx FQIDs for FQID-based enqueue, so check | ||
| 2547 | * if DPNI version supports it before updating FQIDs | ||
| 2548 | */ | ||
| 2549 | if (dpaa2_eth_cmp_dpni_ver(priv, DPNI_ENQUEUE_FQID_VER_MAJOR, | ||
| 2550 | DPNI_ENQUEUE_FQID_VER_MINOR) < 0) | ||
| 2551 | return; | ||
| 2552 | |||
| 2553 | for (i = 0; i < priv->num_fqs; i++) { | ||
| 2554 | fq = &priv->fq[i]; | ||
| 2555 | if (fq->type != DPAA2_TX_CONF_FQ) | ||
| 2556 | continue; | ||
| 2557 | for (j = 0; j < dpaa2_eth_tc_count(priv); j++) { | ||
| 2558 | err = dpni_get_queue(priv->mc_io, 0, priv->mc_token, | ||
| 2559 | DPNI_QUEUE_TX, j, fq->flowid, | ||
| 2560 | &queue, &qid); | ||
| 2561 | if (err) | ||
| 2562 | goto out_err; | ||
| 2563 | |||
| 2564 | fq->tx_fqid[j] = qid.fqid; | ||
| 2565 | if (fq->tx_fqid[j] == 0) | ||
| 2566 | goto out_err; | ||
| 2567 | } | ||
| 2568 | } | ||
| 2569 | |||
| 2570 | priv->enqueue = dpaa2_eth_enqueue_fq; | ||
| 2571 | |||
| 2572 | return; | ||
| 2573 | |||
| 2574 | out_err: | ||
| 2575 | netdev_info(priv->net_dev, | ||
| 2576 | "Error reading Tx FQID, fallback to QDID-based enqueue\n"); | ||
| 2577 | priv->enqueue = dpaa2_eth_enqueue_qd; | ||
| 2578 | } | ||
| 2579 | |||
| 2536 | /* Configure the DPNI object this interface is associated with */ | 2580 | /* Configure the DPNI object this interface is associated with */ |
| 2537 | static int setup_dpni(struct fsl_mc_device *ls_dev) | 2581 | static int setup_dpni(struct fsl_mc_device *ls_dev) |
| 2538 | { | 2582 | { |
| @@ -3306,6 +3350,9 @@ static irqreturn_t dpni_irq0_handler_thread(int irq_num, void *arg) · 767 unmodified lines | |||
| 3306 | if (status & DPNI_IRQ_EVENT_LINK_CHANGED) | 3350 | if (status & DPNI_IRQ_EVENT_LINK_CHANGED) |
| 3307 | link_state_update(netdev_priv(net_dev)); | 3351 | link_state_update(netdev_priv(net_dev)); |
| 3308 | 3352 | ||
| 3353 | if (status & DPNI_IRQ_EVENT_ENDPOINT_CHANGED) | ||
| 3354 | set_mac_addr(netdev_priv(net_dev)); | ||
| 3355 | |||
| 3309 | return IRQ_HANDLED; | 3356 | return IRQ_HANDLED; |
| 3310 | } | 3357 | } |
| 3311 | 3358 | ||
| @@ -3331,7 +3378,8 @@ static int setup_irqs(struct fsl_mc_device *ls_dev) · 19 unmodified lines | |||
| 3331 | } | 3378 | } |
| 3332 | 3379 | ||
| 3333 | err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle, | 3380 | err = dpni_set_irq_mask(ls_dev->mc_io, 0, ls_dev->mc_handle, |
| 3334 | DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED); | 3381 | DPNI_IRQ_INDEX, DPNI_IRQ_EVENT_LINK_CHANGED | |
| 3382 | DPNI_IRQ_EVENT_ENDPOINT_CHANGED); | ||
| 3335 | if (err < 0) { | 3383 | if (err < 0) { |
| 3336 | dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d\n", err); | 3384 | dev_err(&ls_dev->dev, "dpni_set_irq_mask(): %d\n", err); |
| 3337 | goto free_irq; | 3385 | goto free_irq; |
| @@ -133,9 +133,12 @@ int dpni_reset(struct fsl_mc_io *mc_io, · 132 unmodified lines | |||
| 133 | */ | 133 | */ |
| 134 | #define DPNI_IRQ_INDEX 0 | 134 | #define DPNI_IRQ_INDEX 0 |
| 135 | /** | 135 | /** |
| 136 | * IRQ event - indicates a change in link state | 136 | * IRQ events: |
| 137 | * indicates a change in link state | ||
| 138 | * indicates a change in endpoint | ||
| 137 | */ | 139 | */ |
| 138 | #define DPNI_IRQ_EVENT_LINK_CHANGED 0x00000001 | 140 | #define DPNI_IRQ_EVENT_LINK_CHANGED 0x00000001 |
| 141 | #define DPNI_IRQ_EVENT_ENDPOINT_CHANGED 0x00000002 | ||
| 139 | 142 | ||
| 140 | int dpni_set_irq_enable(struct fsl_mc_io *mc_io, | 143 | int dpni_set_irq_enable(struct fsl_mc_io *mc_io, |
| 141 | u32 cmd_flags, | 144 | u32 cmd_flags, |
| @@ -32,6 +32,8 @@ · 31 unmodified lines | |||
| 32 | 32 | ||
| 33 | #define HNAE3_MOD_VERSION "1.0" | 33 | #define HNAE3_MOD_VERSION "1.0" |
| 34 | 34 | ||
| 35 | #define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */ | ||
| 36 | |||
| 35 | /* Device IDs */ | 37 | /* Device IDs */ |
| 36 | #define HNAE3_DEV_ID_GE 0xA220 | 38 | #define HNAE3_DEV_ID_GE 0xA220 |
| 37 | #define HNAE3_DEV_ID_25GE 0xA221 | 39 | #define HNAE3_DEV_ID_25GE 0xA221 |
| @@ -906,6 +906,9 @@ static int hclge_query_pf_resource(struct hclge_dev *hdev) · 905 unmodified lines | |||
| 906 | hnae3_get_field(__le16_to_cpu(req->pf_intr_vector_number), | 906 | hnae3_get_field(__le16_to_cpu(req->pf_intr_vector_number), |
| 907 | HCLGE_PF_VEC_NUM_M, HCLGE_PF_VEC_NUM_S); | 907 | HCLGE_PF_VEC_NUM_M, HCLGE_PF_VEC_NUM_S); |
| 908 | 908 | ||
| 909 | /* nic's msix numbers is always equals to the roce's. */ | ||
| 910 | hdev->num_nic_msi = hdev->num_roce_msi; | ||
| 911 | |||
| 909 | /* PF should have NIC vectors and Roce vectors, | 912 | /* PF should have NIC vectors and Roce vectors, |
| 910 | * NIC vectors are queued before Roce vectors. | 913 | * NIC vectors are queued before Roce vectors. |
| 911 | */ | 914 | */ |
| @@ -915,6 +918,15 @@ static int hclge_query_pf_resource(struct hclge_dev *hdev) · 3 unmodified lines | |||
| 915 | hdev->num_msi = | 918 | hdev->num_msi = |
| 916 | hnae3_get_field(__le16_to_cpu(req->pf_intr_vector_number), | 919 | hnae3_get_field(__le16_to_cpu(req->pf_intr_vector_number), |
| 917 | HCLGE_PF_VEC_NUM_M, HCLGE_PF_VEC_NUM_S); | 920 | HCLGE_PF_VEC_NUM_M, HCLGE_PF_VEC_NUM_S); |
| 921 | |||
| 922 | hdev->num_nic_msi = hdev->num_msi; | ||
| 923 | } | ||
| 924 | |||
| 925 | if (hdev->num_nic_msi < HNAE3_MIN_VECTOR_NUM) { | ||
| 926 | dev_err(&hdev->pdev->dev, | ||
| 927 | "Just %u msi resources, not enough for pf(min:2).\n", | ||
| 928 | hdev->num_nic_msi); | ||
| 929 | return -EINVAL; | ||
| 918 | } | 930 | } |
| 919 | 931 | ||
| 920 | return 0; | 932 | return 0; |
| @@ -1507,6 +1519,10 @@ static int hclge_assign_tqp(struct hclge_vport *vport, u16 num_tqps) · 586 unmodified lines | |||
| 1507 | kinfo->rss_size = min_t(u16, hdev->rss_size_max, | 1519 | kinfo->rss_size = min_t(u16, hdev->rss_size_max, |
| 1508 | vport->alloc_tqps / hdev->tm_info.num_tc); | 1520 | vport->alloc_tqps / hdev->tm_info.num_tc); |
| 1509 | 1521 | ||
| 1522 | /* ensure one to one mapping between irq and queue at default */ | ||
| 1523 | kinfo->rss_size = min_t(u16, kinfo->rss_size, | ||
| 1524 | (hdev->num_nic_msi - 1) / hdev->tm_info.num_tc); | ||
| 1525 | |||
| 1510 | return 0; | 1526 | return 0; |
| 1511 | } | 1527 | } |
| 1512 | 1528 | ||
| @@ -2285,7 +2301,8 @@ static int hclge_init_msi(struct hclge_dev *hdev) · 772 unmodified lines | |||
| 2285 | int vectors; | 2301 | int vectors; |
| 2286 | int i; | 2302 | int i; |
| 2287 | 2303 | ||
| 2288 | vectors = pci_alloc_irq_vectors(pdev, 1, hdev->num_msi, | 2304 | vectors = pci_alloc_irq_vectors(pdev, HNAE3_MIN_VECTOR_NUM, |
| 2305 | hdev->num_msi, | ||
| 2289 | PCI_IRQ_MSI | PCI_IRQ_MSIX); | 2306 | PCI_IRQ_MSI | PCI_IRQ_MSIX); |
| 2290 | if (vectors < 0) { | 2307 | if (vectors < 0) { |
| 2291 | dev_err(&pdev->dev, | 2308 | dev_err(&pdev->dev, |
| @@ -2300,6 +2317,7 @@ static int hclge_init_msi(struct hclge_dev *hdev) · 8 unmodified lines | |||
| 2300 | 2317 | ||
| 2301 | hdev->num_msi = vectors; | 2318 | hdev->num_msi = vectors; |
| 2302 | hdev->num_msi_left = vectors; | 2319 | hdev->num_msi_left = vectors; |
| 2320 | |||
| 2303 | hdev->base_msi_vector = pdev->irq; | 2321 | hdev->base_msi_vector = pdev->irq; |
| 2304 | hdev->roce_base_vector = hdev->base_msi_vector + | 2322 | hdev->roce_base_vector = hdev->base_msi_vector + |
| 2305 | hdev->roce_base_msix_offset; | 2323 | hdev->roce_base_msix_offset; |
| @@ -3903,6 +3921,7 @@ static int hclge_get_vector(struct hnae3_handle *handle, u16 vector_num, · 1597 unmodified lines | |||
| 3903 | int alloc = 0; | 3921 | int alloc = 0; |
| 3904 | int i, j; | 3922 | int i, j; |
| 3905 | 3923 | ||
| 3924 | vector_num = min_t(u16, hdev->num_nic_msi - 1, vector_num); | ||
| 3906 | vector_num = min(hdev->num_msi_left, vector_num); | 3925 | vector_num = min(hdev->num_msi_left, vector_num); |
| 3907 | 3926 | ||
| 3908 | for (j = 0; j < vector_num; j++) { | 3927 | for (j = 0; j < vector_num; j++) { |
| @@ -763,6 +763,7 @@ struct hclge_dev { · 762 unmodified lines | |||
| 763 | u32 base_msi_vector; | 763 | u32 base_msi_vector; |
| 764 | u16 *vector_status; | 764 | u16 *vector_status; |
| 765 | int *vector_irq; | 765 | int *vector_irq; |
| 766 | u16 num_nic_msi; /* Num of nic vectors for this PF */ | ||
| 766 | u16 num_roce_msi; /* Num of roce vectors for this PF */ | 767 | u16 num_roce_msi; /* Num of roce vectors for this PF */ |
| 767 | int roce_base_vector; | 768 | int roce_base_vector; |
| 768 | 769 | ||
| @@ -537,9 +537,16 @@ static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport) · 536 unmodified lines | |||
| 537 | kinfo->rss_size = kinfo->req_rss_size; | 537 | kinfo->rss_size = kinfo->req_rss_size; |
| 538 | } else if (kinfo->rss_size > max_rss_size || | 538 | } else if (kinfo->rss_size > max_rss_size || |
| 539 | (!kinfo->req_rss_size && kinfo->rss_size < max_rss_size)) { | 539 | (!kinfo->req_rss_size && kinfo->rss_size < max_rss_size)) { |
| 540 | /* if user not set rss, the rss_size should compare with the | ||
| 541 | * valid msi numbers to ensure one to one map between tqp and | ||
| 542 | * irq as default. | ||
| 543 | */ | ||
| 544 | if (!kinfo->req_rss_size) | ||
| 545 | max_rss_size = min_t(u16, max_rss_size, | ||
| 546 | (hdev->num_nic_msi - 1) / | ||
| 547 | kinfo->num_tc); | ||
| 548 | |||
| 540 | /* Set to the maximum specification value (max_rss_size). */ | 549 | /* Set to the maximum specification value (max_rss_size). */ |
| 541 | dev_info(&hdev->pdev->dev, "rss changes from %d to %d\n", | ||
| 542 | kinfo->rss_size, max_rss_size); | ||
| 543 | kinfo->rss_size = max_rss_size; | 550 | kinfo->rss_size = max_rss_size; |
| 544 | } | 551 | } |
| 545 | 552 | ||
| @@ -411,6 +411,13 @@ static int hclgevf_knic_setup(struct hclgevf_dev *hdev) · 410 unmodified lines | |||
| 411 | kinfo->tqp[i] = &hdev->htqp[i].q; | 411 | kinfo->tqp[i] = &hdev->htqp[i].q; |
| 412 | } | 412 | } |
| 413 | 413 | ||
| 414 | /* after init the max rss_size and tqps, adjust the default tqp numbers | ||
| 415 | * and rss size with the actual vector numbers | ||
| 416 | */ | ||
| 417 | kinfo->num_tqps = min_t(u16, hdev->num_nic_msix - 1, kinfo->num_tqps); | ||
| 418 | kinfo->rss_size = min_t(u16, kinfo->num_tqps / kinfo->num_tc, | ||
| 419 | kinfo->rss_size); | ||
| 420 | |||
| 414 | return 0; | 421 | return 0; |
| 415 | } | 422 | } |
| 416 | 423 | ||
| @@ -502,6 +509,7 @@ static int hclgevf_get_vector(struct hnae3_handle *handle, u16 vector_num, · 85 unmodified lines | |||
| 502 | int alloc = 0; | 509 | int alloc = 0; |
| 503 | int i, j; | 510 | int i, j; |
| 504 | 511 | ||
| 512 | vector_num = min_t(u16, hdev->num_nic_msix - 1, vector_num); | ||
| 505 | vector_num = min(hdev->num_msi_left, vector_num); | 513 | vector_num = min(hdev->num_msi_left, vector_num); |
| 506 | 514 | ||
| 507 | for (j = 0; j < vector_num; j++) { | 515 | for (j = 0; j < vector_num; j++) { |
| @@ -2246,13 +2254,14 @@ static int hclgevf_init_msi(struct hclgevf_dev *hdev) · 1738 unmodified lines | |||
| 2246 | int vectors; | 2254 | int vectors; |
| 2247 | int i; | 2255 | int i; |
| 2248 | 2256 | ||
| 2249 | if (hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)) | 2257 | if (hnae3_dev_roce_supported(hdev)) |
| 2250 | vectors = pci_alloc_irq_vectors(pdev, | 2258 | vectors = pci_alloc_irq_vectors(pdev, |
| 2251 | hdev->roce_base_msix_offset + 1, | 2259 | hdev->roce_base_msix_offset + 1, |
| 2252 | hdev->num_msi, | 2260 | hdev->num_msi, |
| 2253 | PCI_IRQ_MSIX); | 2261 | PCI_IRQ_MSIX); |
| 2254 | else | 2262 | else |
| 2255 | vectors = pci_alloc_irq_vectors(pdev, 1, hdev->num_msi, | 2263 | vectors = pci_alloc_irq_vectors(pdev, HNAE3_MIN_VECTOR_NUM, |
| 2264 | hdev->num_msi, | ||
| 2256 | PCI_IRQ_MSI | PCI_IRQ_MSIX); | 2265 | PCI_IRQ_MSI | PCI_IRQ_MSIX); |
| 2257 | 2266 | ||
| 2258 | if (vectors < 0) { | 2267 | if (vectors < 0) { |
| @@ -2268,6 +2277,7 @@ static int hclgevf_init_msi(struct hclgevf_dev *hdev) · 9 unmodified lines | |||
| 2268 | 2277 | ||
| 2269 | hdev->num_msi = vectors; | 2278 | hdev->num_msi = vectors; |
| 2270 | hdev->num_msi_left = vectors; | 2279 | hdev->num_msi_left = vectors; |
| 2280 | |||
| 2271 | hdev->base_msi_vector = pdev->irq; | 2281 | hdev->base_msi_vector = pdev->irq; |
| 2272 | hdev->roce_base_vector = pdev->irq + hdev->roce_base_msix_offset; | 2282 | hdev->roce_base_vector = pdev->irq + hdev->roce_base_msix_offset; |
| 2273 | 2283 | ||
| @@ -2533,7 +2543,7 @@ static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) · 259 unmodified lines | |||
| 2533 | 2543 | ||
| 2534 | req = (struct hclgevf_query_res_cmd *)desc.data; | 2544 | req = (struct hclgevf_query_res_cmd *)desc.data; |
| 2535 | 2545 | ||
| 2536 | if (hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)) { | 2546 | if (hnae3_dev_roce_supported(hdev)) { |
| 2537 | hdev->roce_base_msix_offset = | 2547 | hdev->roce_base_msix_offset = |
| 2538 | hnae3_get_field(__le16_to_cpu(req->msixcap_localid_ba_rocee), | 2548 | hnae3_get_field(__le16_to_cpu(req->msixcap_localid_ba_rocee), |
| 2539 | HCLGEVF_MSIX_OFT_ROCEE_M, | 2549 | HCLGEVF_MSIX_OFT_ROCEE_M, |
| @@ -2542,6 +2552,9 @@ static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) · 2 unmodified lines | |||
| 2542 | hnae3_get_field(__le16_to_cpu(req->vf_intr_vector_number), | 2552 | hnae3_get_field(__le16_to_cpu(req->vf_intr_vector_number), |
| 2543 | HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); | 2553 | HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); |
| 2544 | 2554 | ||
| 2555 | /* nic's msix numbers is always equals to the roce's. */ | ||
| 2556 | hdev->num_nic_msix = hdev->num_roce_msix; | ||
| 2557 | |||
| 2545 | /* VF should have NIC vectors and Roce vectors, NIC vectors | 2558 | /* VF should have NIC vectors and Roce vectors, NIC vectors |
| 2546 | * are queued before Roce vectors. The offset is fixed to 64. | 2559 | * are queued before Roce vectors. The offset is fixed to 64. |
| 2547 | */ | 2560 | */ |
| @@ -2551,6 +2564,15 @@ static int hclgevf_query_vf_resource(struct hclgevf_dev *hdev) · 3 unmodified lines | |||
| 2551 | hdev->num_msi = | 2564 | hdev->num_msi = |
| 2552 | hnae3_get_field(__le16_to_cpu(req->vf_intr_vector_number), | 2565 | hnae3_get_field(__le16_to_cpu(req->vf_intr_vector_number), |
| 2553 | HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); | 2566 | HCLGEVF_VEC_NUM_M, HCLGEVF_VEC_NUM_S); |
| 2567 | |||
| 2568 | hdev->num_nic_msix = hdev->num_msi; | ||
| 2569 | } | ||
| 2570 | |||
| 2571 | if (hdev->num_nic_msix < HNAE3_MIN_VECTOR_NUM) { | ||
| 2572 | dev_err(&hdev->pdev->dev, | ||
| 2573 | "Just %u msi resources, not enough for vf(min:2).\n", | ||
| 2574 | hdev->num_nic_msix); | ||
| 2575 | return -EINVAL; | ||
| 2554 | } | 2576 | } |
| 2555 | 2577 | ||
| 2556 | return 0; | 2578 | return 0; |
| @@ -270,6 +270,7 @@ struct hclgevf_dev { · 269 unmodified lines | |||
| 270 | u16 num_msi; | 270 | u16 num_msi; |
| 271 | u16 num_msi_left; | 271 | u16 num_msi_left; |
| 272 | u16 num_msi_used; | 272 | u16 num_msi_used; |
| 273 | u16 num_nic_msix; /* Num of nic vectors for this VF */ | ||
| 273 | u16 num_roce_msix; /* Num of roce vectors for this VF */ | 274 | u16 num_roce_msix; /* Num of roce vectors for this VF */ |
| 274 | u16 roce_base_msix_offset; | 275 | u16 roce_base_msix_offset; |
| 275 | int roce_base_vector; | 276 | int roce_base_vector; |
| @@ -148,11 +148,15 @@ static int mdio_sc_cfg_reg_write(struct hns_mdio_device *mdio_dev, · 147 unmodified lines | |||
| 148 | { | 148 | { |
| 149 | u32 time_cnt; | 149 | u32 time_cnt; |
| 150 | u32 reg_value; | 150 | u32 reg_value; |
| 151 | int ret; | ||
| 151 | 152 | ||
| 152 | regmap_write(mdio_dev->subctrl_vbase, cfg_reg, set_val); | 153 | regmap_write(mdio_dev->subctrl_vbase, cfg_reg, set_val); |
| 153 | 154 | ||
| 154 | for (time_cnt = MDIO_TIMEOUT; time_cnt; time_cnt--) { | 155 | for (time_cnt = MDIO_TIMEOUT; time_cnt; time_cnt--) { |
| 155 | regmap_read(mdio_dev->subctrl_vbase, st_reg, ®_value); | 156 | ret = regmap_read(mdio_dev->subctrl_vbase, st_reg, ®_value); |
| 157 | if (ret) | ||
| 158 | return ret; | ||
| 159 | |||
| 156 | reg_value &= st_msk; | 160 | reg_value &= st_msk; |
| 157 | if ((!!check_st) == (!!reg_value)) | 161 | if ((!!check_st) == (!!reg_value)) |
| 158 | break; | 162 | break; |
| @@ -96,6 +96,8 @@ · 95 unmodified lines | |||
| 96 | 96 | ||
| 97 | #define OPT_SWAP_PORT 0x0001 /* Need to wordswp on the MPU port */ | 97 | #define OPT_SWAP_PORT 0x0001 /* Need to wordswp on the MPU port */ |
| 98 | 98 | ||
| 99 | #define LIB82596_DMA_ATTR DMA_ATTR_NON_CONSISTENT | ||
| 100 | |||
| 99 | #define DMA_WBACK(ndev, addr, len) \ | 101 | #define DMA_WBACK(ndev, addr, len) \ |
| 100 | do { dma_cache_sync((ndev)->dev.parent, (void *)addr, len, DMA_TO_DEVICE); } while (0) | 102 | do { dma_cache_sync((ndev)->dev.parent, (void *)addr, len, DMA_TO_DEVICE); } while (0) |
| 101 | 103 | ||
| @@ -200,7 +202,7 @@ static int __exit lan_remove_chip(struct parisc_device *pdev) · 98 unmodified lines | |||
| 200 | 202 | ||
| 201 | unregister_netdev (dev); | 203 | unregister_netdev (dev); |
| 202 | dma_free_attrs(&pdev->dev, sizeof(struct i596_private), lp->dma, | 204 | dma_free_attrs(&pdev->dev, sizeof(struct i596_private), lp->dma, |
| 203 | lp->dma_addr, DMA_ATTR_NON_CONSISTENT); | 205 | lp->dma_addr, LIB82596_DMA_ATTR); |
| 204 | free_netdev (dev); | 206 | free_netdev (dev); |
| 205 | return 0; | 207 | return 0; |
| 206 | } | 208 | } |
| @@ -1065,7 +1065,7 @@ static int i82596_probe(struct net_device *dev) · 1064 unmodified lines | |||
| 1065 | 1065 | ||
| 1066 | dma = dma_alloc_attrs(dev->dev.parent, sizeof(struct i596_dma), | 1066 | dma = dma_alloc_attrs(dev->dev.parent, sizeof(struct i596_dma), |
| 1067 | &lp->dma_addr, GFP_KERNEL, | 1067 | &lp->dma_addr, GFP_KERNEL, |
| 1068 | DMA_ATTR_NON_CONSISTENT); | 1068 | LIB82596_DMA_ATTR); |
| 1069 | if (!dma) { | 1069 | if (!dma) { |
| 1070 | printk(KERN_ERR "%s: Couldn't get shared memory\n", __FILE__); | 1070 | printk(KERN_ERR "%s: Couldn't get shared memory\n", __FILE__); |
| 1071 | return -ENOMEM; | 1071 | return -ENOMEM; |
| @@ -1087,7 +1087,7 @@ static int i82596_probe(struct net_device *dev) · 15 unmodified lines | |||
| 1087 | i = register_netdev(dev); | 1087 | i = register_netdev(dev); |
| 1088 | if (i) { | 1088 | if (i) { |
| 1089 | dma_free_attrs(dev->dev.parent, sizeof(struct i596_dma), | 1089 | dma_free_attrs(dev->dev.parent, sizeof(struct i596_dma), |
| 1090 | dma, lp->dma_addr, DMA_ATTR_NON_CONSISTENT); | 1090 | dma, lp->dma_addr, LIB82596_DMA_ATTR); |
| 1091 | return i; | 1091 | return i; |
| 1092 | } | 1092 | } |
| 1093 | 1093 | ||
| @@ -24,6 +24,8 @@ · 23 unmodified lines | |||
| 24 | 24 | ||
| 25 | static const char sni_82596_string[] = "snirm_82596"; | 25 | static const char sni_82596_string[] = "snirm_82596"; |
| 26 | 26 | ||
| 27 | #define LIB82596_DMA_ATTR 0 | ||
| 28 | |||
| 27 | #define DMA_WBACK(priv, addr, len) do { } while (0) | 29 | #define DMA_WBACK(priv, addr, len) do { } while (0) |
| 28 | #define DMA_INV(priv, addr, len) do { } while (0) | 30 | #define DMA_INV(priv, addr, len) do { } while (0) |
| 29 | #define DMA_WBACK_INV(priv, addr, len) do { } while (0) | 31 | #define DMA_WBACK_INV(priv, addr, len) do { } while (0) |
| @@ -152,7 +154,7 @@ static int sni_82596_driver_remove(struct platform_device *pdev) · 122 unmodified lines | |||
| 152 | 154 | ||
| 153 | unregister_netdev(dev); | 155 | unregister_netdev(dev); |
| 154 | dma_free_attrs(dev->dev.parent, sizeof(struct i596_private), lp->dma, | 156 | dma_free_attrs(dev->dev.parent, sizeof(struct i596_private), lp->dma, |
| 155 | lp->dma_addr, DMA_ATTR_NON_CONSISTENT); | 157 | lp->dma_addr, LIB82596_DMA_ATTR); |
| 156 | iounmap(lp->ca); | 158 | iounmap(lp->ca); |
| 157 | iounmap(lp->mpu_port); | 159 | iounmap(lp->mpu_port); |
| 158 | free_netdev (dev); | 160 | free_netdev (dev); |
| @@ -2878,12 +2878,10 @@ static int enable_scrq_irq(struct ibmvnic_adapter *adapter, · 2877 unmodified lines | |||
| 2878 | 2878 | ||
| 2879 | if (test_bit(0, &adapter->resetting) && | 2879 | if (test_bit(0, &adapter->resetting) && |
| 2880 | adapter->reset_reason == VNIC_RESET_MOBILITY) { | 2880 | adapter->reset_reason == VNIC_RESET_MOBILITY) { |
| 2881 | u64 val = (0xff000000) | scrq->hw_irq; | 2881 | struct irq_desc *desc = irq_to_desc(scrq->irq); |
| 2882 | struct irq_chip *chip = irq_desc_get_chip(desc); | ||
| 2882 | 2883 | ||
| 2883 | rc = plpar_hcall_norets(H_EOI, val); | 2884 | chip->irq_eoi(&desc->irq_data); |
| 2884 | if (rc) | ||
| 2885 | dev_err(dev, "H_EOI FAILED irq 0x%llx. rc=%ld\n", | ||
| 2886 | val, rc); | ||
| 2887 | } | 2885 | } |
| 2888 | 2886 | ||
| 2889 | rc = plpar_hcall_norets(H_VIOCTL, adapter->vdev->unit_address, | 2887 | rc = plpar_hcall_norets(H_VIOCTL, adapter->vdev->unit_address, |
| @@ -261,6 +261,7 @@ static void mtk_mac_config(struct phylink_config *config, unsigned int mode, · 260 unmodified lines | |||
| 261 | ge_mode = 0; | 261 | ge_mode = 0; |
| 262 | switch (state->interface) { | 262 | switch (state->interface) { |
| 263 | case PHY_INTERFACE_MODE_MII: | 263 | case PHY_INTERFACE_MODE_MII: |
| 264 | case PHY_INTERFACE_MODE_GMII: | ||
| 264 | ge_mode = 1; | 265 | ge_mode = 1; |
| 265 | break; | 266 | break; |
| 266 | case PHY_INTERFACE_MODE_REVMII: | 267 | case PHY_INTERFACE_MODE_REVMII: |
| @@ -112,17 +112,11 @@ int mlx5_core_destroy_mkey(struct mlx5_core_dev *dev, · 111 unmodified lines | |||
| 112 | u32 out[MLX5_ST_SZ_DW(destroy_mkey_out)] = {0}; | 112 | u32 out[MLX5_ST_SZ_DW(destroy_mkey_out)] = {0}; |
| 113 | u32 in[MLX5_ST_SZ_DW(destroy_mkey_in)] = {0}; | 113 | u32 in[MLX5_ST_SZ_DW(destroy_mkey_in)] = {0}; |
| 114 | struct xarray *mkeys = &dev->priv.mkey_table; | 114 | struct xarray *mkeys = &dev->priv.mkey_table; |
| 115 | struct mlx5_core_mkey *deleted_mkey; | ||
| 116 | unsigned long flags; | 115 | unsigned long flags; |
| 117 | 116 | ||
| 118 | xa_lock_irqsave(mkeys, flags); | 117 | xa_lock_irqsave(mkeys, flags); |
| 119 | deleted_mkey = __xa_erase(mkeys, mlx5_base_mkey(mkey->key)); | 118 | __xa_erase(mkeys, mlx5_base_mkey(mkey->key)); |
| 120 | xa_unlock_irqrestore(mkeys, flags); | 119 | xa_unlock_irqrestore(mkeys, flags); |
| 121 | if (!deleted_mkey) { | ||
| 122 | mlx5_core_dbg(dev, "failed xarray delete of mkey 0x%x\n", | ||
| 123 | mlx5_base_mkey(mkey->key)); | ||
| 124 | return -ENOENT; | ||
| 125 | } | ||
| 126 | 120 | ||
| 127 | MLX5_SET(destroy_mkey_in, in, opcode, MLX5_CMD_OP_DESTROY_MKEY); | 121 | MLX5_SET(destroy_mkey_in, in, opcode, MLX5_CMD_OP_DESTROY_MKEY); |
| 128 | MLX5_SET(destroy_mkey_in, in, mkey_index, mlx5_mkey_to_idx(mkey->key)); | 122 | MLX5_SET(destroy_mkey_in, in, mkey_index, mlx5_mkey_to_idx(mkey->key)); |
| @@ -137,7 +137,8 @@ dr_icm_pool_mr_create(struct mlx5dr_icm_pool *pool, · 136 unmodified lines | |||
| 137 | 137 | ||
| 138 | icm_mr->icm_start_addr = icm_mr->dm.addr; | 138 | icm_mr->icm_start_addr = icm_mr->dm.addr; |
| 139 | 139 | ||
| 140 | align_diff = icm_mr->icm_start_addr % align_base; | 140 | /* align_base is always a power of 2 */ |
| 141 | align_diff = icm_mr->icm_start_addr & (align_base - 1); | ||
| 141 | if (align_diff) | 142 | if (align_diff) |
| 142 | icm_mr->used_length = align_base - align_diff; | 143 | icm_mr->used_length = align_base - align_diff; |
| 143 | 144 | ||
| @@ -788,12 +788,10 @@ again: · 787 unmodified lines | |||
| 788 | * it means that all the previous stes are the same, | 788 | * it means that all the previous stes are the same, |
| 789 | * if so, this rule is duplicated. | 789 | * if so, this rule is duplicated. |
| 790 | */ | 790 | */ |
| 791 | if (mlx5dr_ste_is_last_in_rule(nic_matcher, | 791 | if (!mlx5dr_ste_is_last_in_rule(nic_matcher, ste_location)) |
| 792 | matched_ste->ste_chain_location)) { | 792 | return matched_ste; |
| 793 | mlx5dr_info(dmn, "Duplicate rule inserted, aborting!!\n"); | 793 | |
| 794 | return NULL; | 794 | mlx5dr_dbg(dmn, "Duplicate rule inserted\n"); |
| 795 | } | ||
| 796 | return matched_ste; | ||
| 797 | } | 795 | } |
| 798 | 796 | ||
| 799 | if (!skip_rehash && dr_rule_need_enlarge_hash(cur_htbl, dmn, nic_dmn)) { | 797 | if (!skip_rehash && dr_rule_need_enlarge_hash(cur_htbl, dmn, nic_dmn)) { |
| @@ -99,6 +99,7 @@ static void mlxsw_sp_rx_drop_listener(struct sk_buff *skb, u8 local_port, · 98 unmodified lines | |||
| 99 | devlink = priv_to_devlink(mlxsw_sp->core); | 99 | devlink = priv_to_devlink(mlxsw_sp->core); |
| 100 | in_devlink_port = mlxsw_core_port_devlink_port_get(mlxsw_sp->core, | 100 | in_devlink_port = mlxsw_core_port_devlink_port_get(mlxsw_sp->core, |
| 101 | local_port); | 101 | local_port); |
| 102 | skb_push(skb, ETH_HLEN); | ||
| 102 | devlink_trap_report(devlink, skb, trap_ctx, in_devlink_port); | 103 | devlink_trap_report(devlink, skb, trap_ctx, in_devlink_port); |
| 103 | consume_skb(skb); | 104 | consume_skb(skb); |
| 104 | } | 105 | } |
| @@ -388,13 +388,14 @@ static int mscc_ocelot_probe(struct platform_device *pdev) · 387 unmodified lines | |||
| 388 | continue; | 388 | continue; |
| 389 | 389 | ||
| 390 | phy = of_phy_find_device(phy_node); | 390 | phy = of_phy_find_device(phy_node); |
| 391 | of_node_put(phy_node); | ||
| 391 | if (!phy) | 392 | if (!phy) |
| 392 | continue; | 393 | continue; |
| 393 | 394 | ||
| 394 | err = ocelot_probe_port(ocelot, port, regs, phy); | 395 | err = ocelot_probe_port(ocelot, port, regs, phy); |
| 395 | if (err) { | 396 | if (err) { |
| 396 | of_node_put(portnp); | 397 | of_node_put(portnp); |
| 397 | return err; | 398 | goto out_put_ports; |
| 398 | } | 399 | } |
| 399 | 400 | ||
| 400 | phy_mode = of_get_phy_mode(portnp); | 401 | phy_mode = of_get_phy_mode(portnp); |
| @@ -422,7 +423,8 @@ static int mscc_ocelot_probe(struct platform_device *pdev) · 21 unmodified lines | |||
| 422 | "invalid phy mode for port%d, (Q)SGMII only\n", | 423 | "invalid phy mode for port%d, (Q)SGMII only\n", |
| 423 | port); | 424 | port); |
| 424 | of_node_put(portnp); | 425 | of_node_put(portnp); |
| 425 | return -EINVAL; | 426 | err = -EINVAL; |
| 427 | goto out_put_ports; | ||
| 426 | } | 428 | } |
| 427 | 429 | ||
| 428 | serdes = devm_of_phy_get(ocelot->dev, portnp, NULL); | 430 | serdes = devm_of_phy_get(ocelot->dev, portnp, NULL); |
| @@ -435,7 +437,8 @@ static int mscc_ocelot_probe(struct platform_device *pdev) · 6 unmodified lines | |||
| 435 | "missing SerDes phys for port%d\n", | 437 | "missing SerDes phys for port%d\n", |
| 436 | port); | 438 | port); |
| 437 | 439 | ||
| 438 | goto err_probe_ports; | 440 | of_node_put(portnp); |
| 441 | goto out_put_ports; | ||
| 439 | } | 442 | } |
| 440 | 443 | ||
| 441 | ocelot->ports[port]->serdes = serdes; | 444 | ocelot->ports[port]->serdes = serdes; |
| @@ -447,9 +450,8 @@ static int mscc_ocelot_probe(struct platform_device *pdev) · 5 unmodified lines | |||
| 447 | 450 | ||
| 448 | dev_info(&pdev->dev, "Ocelot switch probed\n"); | 451 | dev_info(&pdev->dev, "Ocelot switch probed\n"); |
| 449 | 452 | ||
| 450 | return 0; | 453 | out_put_ports: |
| 451 | 454 | of_node_put(ports); | |
| 452 | err_probe_ports: | ||
| 453 | return err; | 455 | return err; |
| 454 | } | 456 | } |
| 455 | 457 | ||
| @@ -1356,9 +1356,6 @@ static int lpc_eth_drv_probe(struct platform_device *pdev) · 1355 unmodified lines | |||
| 1356 | if (!is_valid_ether_addr(ndev->dev_addr)) | 1356 | if (!is_valid_ether_addr(ndev->dev_addr)) |
| 1357 | eth_hw_addr_random(ndev); | 1357 | eth_hw_addr_random(ndev); |
| 1358 | 1358 | ||
| 1359 | /* Reset the ethernet controller */ | ||
| 1360 | __lpc_eth_reset(pldat); | ||
| 1361 | |||
| 1362 | /* then shut everything down to save power */ | 1359 | /* then shut everything down to save power */ |
| 1363 | __lpc_eth_shutdown(pldat); | 1360 | __lpc_eth_shutdown(pldat); |
| 1364 | 1361 | ||
| @@ -20,6 +20,7 @@ if NET_VENDOR_PENSANDO · 19 unmodified lines | |||
| 20 | config IONIC | 20 | config IONIC |
| 21 | tristate "Pensando Ethernet IONIC Support" | 21 | tristate "Pensando Ethernet IONIC Support" |
| 22 | depends on 64BIT && PCI | 22 | depends on 64BIT && PCI |
| 23 | select NET_DEVLINK | ||
| 23 | help | 24 | help |
| 24 | This enables the support for the Pensando family of Ethernet | 25 | This enables the support for the Pensando family of Ethernet |
| 25 | adapters. More specific information on this driver can be | 26 | adapters. More specific information on this driver can be |
| @@ -182,6 +182,8 @@ struct ionic_lif { · 181 unmodified lines | |||
| 182 | 182 | ||
| 183 | #define lif_to_txqcq(lif, i) ((lif)->txqcqs[i].qcq) | 183 | #define lif_to_txqcq(lif, i) ((lif)->txqcqs[i].qcq) |
| 184 | #define lif_to_rxqcq(lif, i) ((lif)->rxqcqs[i].qcq) | 184 | #define lif_to_rxqcq(lif, i) ((lif)->rxqcqs[i].qcq) |
| 185 | #define lif_to_txstats(lif, i) ((lif)->txqcqs[i].stats->tx) | ||
| 186 | #define lif_to_rxstats(lif, i) ((lif)->rxqcqs[i].stats->rx) | ||
| 185 | #define lif_to_txq(lif, i) (&lif_to_txqcq((lif), i)->q) | 187 | #define lif_to_txq(lif, i) (&lif_to_txqcq((lif), i)->q) |
| 186 | #define lif_to_rxq(lif, i) (&lif_to_txqcq((lif), i)->q) | 188 | #define lif_to_rxq(lif, i) (&lif_to_txqcq((lif), i)->q) |
| 187 | 189 | ||
| @@ -117,7 +117,8 @@ static u64 ionic_sw_stats_get_count(struct ionic_lif *lif) · 116 unmodified lines | |||
| 117 | /* rx stats */ | 117 | /* rx stats */ |
| 118 | total += MAX_Q(lif) * IONIC_NUM_RX_STATS; | 118 | total += MAX_Q(lif) * IONIC_NUM_RX_STATS; |
| 119 | 119 | ||
| 120 | if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | 120 | if (test_bit(IONIC_LIF_UP, lif->state) && |
| 121 | test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | ||
| 121 | /* tx debug stats */ | 122 | /* tx debug stats */ |
| 122 | total += MAX_Q(lif) * (IONIC_NUM_DBG_CQ_STATS + | 123 | total += MAX_Q(lif) * (IONIC_NUM_DBG_CQ_STATS + |
| 123 | IONIC_NUM_TX_Q_STATS + | 124 | IONIC_NUM_TX_Q_STATS + |
| @@ -149,7 +150,8 @@ static void ionic_sw_stats_get_strings(struct ionic_lif *lif, u8 **buf) · 25 unmodified lines | |||
| 149 | *buf += ETH_GSTRING_LEN; | 150 | *buf += ETH_GSTRING_LEN; |
| 150 | } | 151 | } |
| 151 | 152 | ||
| 152 | if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | 153 | if (test_bit(IONIC_LIF_UP, lif->state) && |
| 154 | test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | ||
| 153 | for (i = 0; i < IONIC_NUM_TX_Q_STATS; i++) { | 155 | for (i = 0; i < IONIC_NUM_TX_Q_STATS; i++) { |
| 154 | snprintf(*buf, ETH_GSTRING_LEN, | 156 | snprintf(*buf, ETH_GSTRING_LEN, |
| 155 | "txq_%d_%s", | 157 | "txq_%d_%s", |
| @@ -187,7 +189,8 @@ static void ionic_sw_stats_get_strings(struct ionic_lif *lif, u8 **buf) · 31 unmodified lines | |||
| 187 | *buf += ETH_GSTRING_LEN; | 189 | *buf += ETH_GSTRING_LEN; |
| 188 | } | 190 | } |
| 189 | 191 | ||
| 190 | if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | 192 | if (test_bit(IONIC_LIF_UP, lif->state) && |
| 193 | test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | ||
| 191 | for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++) { | 194 | for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++) { |
| 192 | snprintf(*buf, ETH_GSTRING_LEN, | 195 | snprintf(*buf, ETH_GSTRING_LEN, |
| 193 | "rxq_%d_cq_%s", | 196 | "rxq_%d_cq_%s", |
| @@ -223,6 +226,8 @@ static void ionic_sw_stats_get_values(struct ionic_lif *lif, u64 **buf) · 29 unmodified lines | |||
| 223 | { | 226 | { |
| 224 | struct ionic_lif_sw_stats lif_stats; | 227 | struct ionic_lif_sw_stats lif_stats; |
| 225 | struct ionic_qcq *txqcq, *rxqcq; | 228 | struct ionic_qcq *txqcq, *rxqcq; |
| 229 | struct ionic_tx_stats *txstats; | ||
| 230 | struct ionic_rx_stats *rxstats; | ||
| 226 | int i, q_num; | 231 | int i, q_num; |
| 227 | 232 | ||
| 228 | ionic_get_lif_stats(lif, &lif_stats); | 233 | ionic_get_lif_stats(lif, &lif_stats); |
| @@ -233,15 +238,17 @@ static void ionic_sw_stats_get_values(struct ionic_lif *lif, u64 **buf) · 4 unmodified lines | |||
| 233 | } | 238 | } |
| 234 | 239 | ||
| 235 | for (q_num = 0; q_num < MAX_Q(lif); q_num++) { | 240 | for (q_num = 0; q_num < MAX_Q(lif); q_num++) { |
| 236 | txqcq = lif_to_txqcq(lif, q_num); | 241 | txstats = &lif_to_txstats(lif, q_num); |
| 237 | 242 | ||
| 238 | for (i = 0; i < IONIC_NUM_TX_STATS; i++) { | 243 | for (i = 0; i < IONIC_NUM_TX_STATS; i++) { |
| 239 | **buf = IONIC_READ_STAT64(&txqcq->stats->tx, | 244 | **buf = IONIC_READ_STAT64(txstats, |
| 240 | &ionic_tx_stats_desc[i]); | 245 | &ionic_tx_stats_desc[i]); |
| 241 | (*buf)++; | 246 | (*buf)++; |
| 242 | } | 247 | } |
| 243 | 248 | ||
| 244 | if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | 249 | if (test_bit(IONIC_LIF_UP, lif->state) && |
| 250 | test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | ||
| 251 | txqcq = lif_to_txqcq(lif, q_num); | ||
| 245 | for (i = 0; i < IONIC_NUM_TX_Q_STATS; i++) { | 252 | for (i = 0; i < IONIC_NUM_TX_Q_STATS; i++) { |
| 246 | **buf = IONIC_READ_STAT64(&txqcq->q, | 253 | **buf = IONIC_READ_STAT64(&txqcq->q, |
| 247 | &ionic_txq_stats_desc[i]); | 254 | &ionic_txq_stats_desc[i]); |
| @@ -258,22 +265,24 @@ static void ionic_sw_stats_get_values(struct ionic_lif *lif, u64 **buf) · 10 unmodified lines | |||
| 258 | (*buf)++; | 265 | (*buf)++; |
| 259 | } | 266 | } |
| 260 | for (i = 0; i < IONIC_MAX_NUM_SG_CNTR; i++) { | 267 | for (i = 0; i < IONIC_MAX_NUM_SG_CNTR; i++) { |
| 261 | **buf = txqcq->stats->tx.sg_cntr[i]; | 268 | **buf = txstats->sg_cntr[i]; |
| 262 | (*buf)++; | 269 | (*buf)++; |
| 263 | } | 270 | } |
| 264 | } | 271 | } |
| 265 | } | 272 | } |
| 266 | 273 | ||
| 267 | for (q_num = 0; q_num < MAX_Q(lif); q_num++) { | 274 | for (q_num = 0; q_num < MAX_Q(lif); q_num++) { |
| 268 | rxqcq = lif_to_rxqcq(lif, q_num); | 275 | rxstats = &lif_to_rxstats(lif, q_num); |
| 269 | 276 | ||
| 270 | for (i = 0; i < IONIC_NUM_RX_STATS; i++) { | 277 | for (i = 0; i < IONIC_NUM_RX_STATS; i++) { |
| 271 | **buf = IONIC_READ_STAT64(&rxqcq->stats->rx, | 278 | **buf = IONIC_READ_STAT64(rxstats, |
| 272 | &ionic_rx_stats_desc[i]); | 279 | &ionic_rx_stats_desc[i]); |
| 273 | (*buf)++; | 280 | (*buf)++; |
| 274 | } | 281 | } |
| 275 | 282 | ||
| 276 | if (test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | 283 | if (test_bit(IONIC_LIF_UP, lif->state) && |
| 284 | test_bit(IONIC_LIF_SW_DEBUG_STATS, lif->state)) { | ||
| 285 | rxqcq = lif_to_rxqcq(lif, q_num); | ||
| 277 | for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++) { | 286 | for (i = 0; i < IONIC_NUM_DBG_CQ_STATS; i++) { |
| 278 | **buf = IONIC_READ_STAT64(&rxqcq->cq, | 287 | **buf = IONIC_READ_STAT64(&rxqcq->cq, |
| 279 | &ionic_dbg_cq_stats_desc[i]); | 288 | &ionic_dbg_cq_stats_desc[i]); |
| @@ -2787,6 +2787,7 @@ static int ql_alloc_large_buffers(struct ql3_adapter *qdev) · 2786 unmodified lines | |||
| 2787 | netdev_err(qdev->ndev, | 2787 | netdev_err(qdev->ndev, |
| 2788 | "PCI mapping failed with error: %d\n", | 2788 | "PCI mapping failed with error: %d\n", |
| 2789 | err); | 2789 | err); |
| 2790 | dev_kfree_skb_irq(skb); | ||
| 2790 | ql_free_large_buffers(qdev); | 2791 | ql_free_large_buffers(qdev); |
| 2791 | return -ENOMEM; | 2792 | return -ENOMEM; |
| 2792 | } | 2793 | } |
| @@ -4146,6 +4146,14 @@ static void rtl_hw_jumbo_disable(struct rtl8169_private *tp) · 4145 unmodified lines | |||
| 4146 | rtl_lock_config_regs(tp); | 4146 | rtl_lock_config_regs(tp); |
| 4147 | } | 4147 | } |
| 4148 | 4148 | ||
| 4149 | static void rtl_jumbo_config(struct rtl8169_private *tp, int mtu) | ||
| 4150 | { | ||
| 4151 | if (mtu > ETH_DATA_LEN) | ||
| 4152 | rtl_hw_jumbo_enable(tp); | ||
| 4153 | else | ||
| 4154 | rtl_hw_jumbo_disable(tp); | ||
| 4155 | } | ||
| 4156 | |||
| 4149 | DECLARE_RTL_COND(rtl_chipcmd_cond) | 4157 | DECLARE_RTL_COND(rtl_chipcmd_cond) |
| 4150 | { | 4158 | { |
| 4151 | return RTL_R8(tp, ChipCmd) & CmdReset; | 4159 | return RTL_R8(tp, ChipCmd) & CmdReset; |
| @@ -4442,11 +4450,6 @@ static void rtl8168g_set_pause_thresholds(struct rtl8169_private *tp, · 290 unmodified lines | |||
| 4442 | static void rtl_hw_start_8168bb(struct rtl8169_private *tp) | 4450 | static void rtl_hw_start_8168bb(struct rtl8169_private *tp) |
| 4443 | { | 4451 | { |
| 4444 | RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); | 4452 | RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); |
| 4445 | |||
| 4446 | if (tp->dev->mtu <= ETH_DATA_LEN) { | ||
| 4447 | rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B | | ||
| 4448 | PCI_EXP_DEVCTL_NOSNOOP_EN); | ||
| 4449 | } | ||
| 4450 | } | 4453 | } |
| 4451 | 4454 | ||
| 4452 | static void rtl_hw_start_8168bef(struct rtl8169_private *tp) | 4455 | static void rtl_hw_start_8168bef(struct rtl8169_private *tp) |
| @@ -4462,9 +4465,6 @@ static void __rtl_hw_start_8168cp(struct rtl8169_private *tp) · 9 unmodified lines | |||
| 4462 | 4465 | ||
| 4463 | RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); | 4466 | RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); |
| 4464 | 4467 | ||
| 4465 | if (tp->dev->mtu <= ETH_DATA_LEN) | ||
| 4466 | rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); | ||
| 4467 | |||
| 4468 | rtl_disable_clock_request(tp); | 4468 | rtl_disable_clock_request(tp); |
| 4469 | } | 4469 | } |
| 4470 | 4470 | ||
| @@ -4490,9 +4490,6 @@ static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp) · 19 unmodified lines | |||
| 4490 | rtl_set_def_aspm_entry_latency(tp); | 4490 | rtl_set_def_aspm_entry_latency(tp); |
| 4491 | 4491 | ||
| 4492 | RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); | 4492 | RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en); |
| 4493 | |||
| 4494 | if (tp->dev->mtu <= ETH_DATA_LEN) | ||
| 4495 | rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); | ||
| 4496 | } | 4493 | } |
| 4497 | 4494 | ||
| 4498 | static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp) | 4495 | static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp) |
| @@ -4503,9 +4500,6 @@ static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp) · 4 unmodified lines | |||
| 4503 | 4500 | ||
| 4504 | /* Magic. */ | 4501 | /* Magic. */ |
| 4505 | RTL_W8(tp, DBG_REG, 0x20); | 4502 | RTL_W8(tp, DBG_REG, 0x20); |
| 4506 | |||
| 4507 | if (tp->dev->mtu <= ETH_DATA_LEN) | ||
| 4508 | rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); | ||
| 4509 | } | 4503 | } |
| 4510 | 4504 | ||
| 4511 | static void rtl_hw_start_8168c_1(struct rtl8169_private *tp) | 4505 | static void rtl_hw_start_8168c_1(struct rtl8169_private *tp) |
| @@ -4611,9 +4605,6 @@ static void rtl_hw_start_8168e_1(struct rtl8169_private *tp) · 99 unmodified lines | |||
| 4611 | 4605 | ||
| 4612 | rtl_ephy_init(tp, e_info_8168e_1); | 4606 | rtl_ephy_init(tp, e_info_8168e_1); |
| 4613 | 4607 | ||
| 4614 | if (tp->dev->mtu <= ETH_DATA_LEN) | ||
| 4615 | rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); | ||
| 4616 | |||
| 4617 | rtl_disable_clock_request(tp); | 4608 | rtl_disable_clock_request(tp); |
| 4618 | 4609 | ||
| 4619 | /* Reset tx FIFO pointer */ | 4610 | /* Reset tx FIFO pointer */ |
| @@ -4636,9 +4627,6 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp) · 16 unmodified lines | |||
| 4636 | 4627 | ||
| 4637 | rtl_ephy_init(tp, e_info_8168e_2); | 4628 | rtl_ephy_init(tp, e_info_8168e_2); |
| 4638 | 4629 | ||
| 4639 | if (tp->dev->mtu <= ETH_DATA_LEN) | ||
| 4640 | rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B); | ||
| 4641 | |||
| 4642 | rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000); | 4630 | rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000); |
| 4643 | rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000); | 4631 | rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000); |
| 4644 | rtl_set_fifo_size(tp, 0x10, 0x10, 0x02, 0x06); | 4632 | rtl_set_fifo_size(tp, 0x10, 0x10, 0x02, 0x06); |
| @@ -5485,6 +5473,8 @@ static void rtl_hw_start(struct rtl8169_private *tp) · 840 unmodified lines | |||
| 5485 | rtl_set_rx_tx_desc_registers(tp); | 5473 | rtl_set_rx_tx_desc_registers(tp); |
| 5486 | rtl_lock_config_regs(tp); | 5474 | rtl_lock_config_regs(tp); |
| 5487 | 5475 | ||
| 5476 | rtl_jumbo_config(tp, tp->dev->mtu); | ||
| 5477 | |||
| 5488 | /* Initially a 10 us delay. Turned it into a PCI commit. - FR */ | 5478 | /* Initially a 10 us delay. Turned it into a PCI commit. - FR */ |
| 5489 | RTL_R16(tp, CPlusCmd); | 5479 | RTL_R16(tp, CPlusCmd); |
| 5490 | RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb); | 5480 | RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb); |
| @@ -5498,10 +5488,7 @@ static int rtl8169_change_mtu(struct net_device *dev, int new_mtu) · 7 unmodified lines | |||
| 5498 | { | 5488 | { |
| 5499 | struct rtl8169_private *tp = netdev_priv(dev); | 5489 | struct rtl8169_private *tp = netdev_priv(dev); |
| 5500 | 5490 | ||
| 5501 | if (new_mtu > ETH_DATA_LEN) | 5491 | rtl_jumbo_config(tp, new_mtu); |
| 5502 | rtl_hw_jumbo_enable(tp); | ||
| 5503 | else | ||
| 5504 | rtl_hw_jumbo_disable(tp); | ||
| 5505 | 5492 | ||
| 5506 | dev->mtu = new_mtu; | 5493 | dev->mtu = new_mtu; |
| 5507 | netdev_update_features(dev); | 5494 | netdev_update_features(dev); |
| @@ -282,7 +282,6 @@ struct netsec_desc_ring { · 281 unmodified lines | |||
| 282 | void *vaddr; | 282 | void *vaddr; |
| 283 | u16 head, tail; | 283 | u16 head, tail; |
| 284 | u16 xdp_xmit; /* netsec_xdp_xmit packets */ | 284 | u16 xdp_xmit; /* netsec_xdp_xmit packets */ |
| 285 | bool is_xdp; | ||
| 286 | struct page_pool *page_pool; | 285 | struct page_pool *page_pool; |
| 287 | struct xdp_rxq_info xdp_rxq; | 286 | struct xdp_rxq_info xdp_rxq; |
| 288 | spinlock_t lock; /* XDP tx queue locking */ | 287 | spinlock_t lock; /* XDP tx queue locking */ |
| @@ -634,8 +633,7 @@ static bool netsec_clean_tx_dring(struct netsec_priv *priv) · 345 unmodified lines | |||
| 634 | unsigned int bytes; | 633 | unsigned int bytes; |
| 635 | int cnt = 0; | 634 | int cnt = 0; |
| 636 | 635 | ||
| 637 | if (dring->is_xdp) | 636 | spin_lock(&dring->lock); |
| 638 | spin_lock(&dring->lock); | ||
| 639 | 637 | ||
| 640 | bytes = 0; | 638 | bytes = 0; |
| 641 | entry = dring->vaddr + DESC_SZ * tail; | 639 | entry = dring->vaddr + DESC_SZ * tail; |
| @@ -682,8 +680,8 @@ next: · 40 unmodified lines | |||
| 682 | entry = dring->vaddr + DESC_SZ * tail; | 680 | entry = dring->vaddr + DESC_SZ * tail; |
| 683 | cnt++; | 681 | cnt++; |
| 684 | } | 682 | } |
| 685 | if (dring->is_xdp) | 683 | |
| 686 | spin_unlock(&dring->lock); | 684 | spin_unlock(&dring->lock); |
| 687 | 685 | ||
| 688 | if (!cnt) | 686 | if (!cnt) |
| 689 | return false; | 687 | return false; |
| @@ -799,9 +797,6 @@ static void netsec_set_tx_de(struct netsec_priv *priv, · 109 unmodified lines | |||
| 799 | de->data_buf_addr_lw = lower_32_bits(desc->dma_addr); | 797 | de->data_buf_addr_lw = lower_32_bits(desc->dma_addr); |
| 800 | de->buf_len_info = (tx_ctrl->tcp_seg_len << 16) | desc->len; | 798 | de->buf_len_info = (tx_ctrl->tcp_seg_len << 16) | desc->len; |
| 801 | de->attr = attr; | 799 | de->attr = attr; |
| 802 | /* under spin_lock if using XDP */ | ||
| 803 | if (!dring->is_xdp) | ||
| 804 | dma_wmb(); | ||
| 805 | 800 | ||
| 806 | dring->desc[idx] = *desc; | 801 | dring->desc[idx] = *desc; |
| 807 | if (desc->buf_type == TYPE_NETSEC_SKB) | 802 | if (desc->buf_type == TYPE_NETSEC_SKB) |
| @@ -1123,12 +1118,10 @@ static netdev_tx_t netsec_netdev_start_xmit(struct sk_buff *skb, · 315 unmodified lines | |||
| 1123 | u16 tso_seg_len = 0; | 1118 | u16 tso_seg_len = 0; |
| 1124 | int filled; | 1119 | int filled; |
| 1125 | 1120 | ||
| 1126 | if (dring->is_xdp) | 1121 | spin_lock_bh(&dring->lock); |
| 1127 | spin_lock_bh(&dring->lock); | ||
| 1128 | filled = netsec_desc_used(dring); | 1122 | filled = netsec_desc_used(dring); |
| 1129 | if (netsec_check_stop_tx(priv, filled)) { | 1123 | if (netsec_check_stop_tx(priv, filled)) { |
| 1130 | if (dring->is_xdp) | 1124 | spin_unlock_bh(&dring->lock); |
| 1131 | spin_unlock_bh(&dring->lock); | ||
| 1132 | net_warn_ratelimited("%s %s Tx queue full\n", | 1125 | net_warn_ratelimited("%s %s Tx queue full\n", |
| 1133 | dev_name(priv->dev), ndev->name); | 1126 | dev_name(priv->dev), ndev->name); |
| 1134 | return NETDEV_TX_BUSY; | 1127 | return NETDEV_TX_BUSY; |
| @@ -1161,8 +1154,7 @@ static netdev_tx_t netsec_netdev_start_xmit(struct sk_buff *skb, · 26 unmodified lines | |||
| 1161 | tx_desc.dma_addr = dma_map_single(priv->dev, skb->data, | 1154 | tx_desc.dma_addr = dma_map_single(priv->dev, skb->data, |
| 1162 | skb_headlen(skb), DMA_TO_DEVICE); | 1155 | skb_headlen(skb), DMA_TO_DEVICE); |
| 1163 | if (dma_mapping_error(priv->dev, tx_desc.dma_addr)) { | 1156 | if (dma_mapping_error(priv->dev, tx_desc.dma_addr)) { |
| 1164 | if (dring->is_xdp) | 1157 | spin_unlock_bh(&dring->lock); |
| 1165 | spin_unlock_bh(&dring->lock); | ||
| 1166 | netif_err(priv, drv, priv->ndev, | 1158 | netif_err(priv, drv, priv->ndev, |
| 1167 | "%s: DMA mapping failed\n", __func__); | 1159 | "%s: DMA mapping failed\n", __func__); |
| 1168 | ndev->stats.tx_dropped++; | 1160 | ndev->stats.tx_dropped++; |
| @@ -1177,8 +1169,7 @@ static netdev_tx_t netsec_netdev_start_xmit(struct sk_buff *skb, · 8 unmodified lines | |||
| 1177 | netdev_sent_queue(priv->ndev, skb->len); | 1169 | netdev_sent_queue(priv->ndev, skb->len); |
| 1178 | 1170 | ||
| 1179 | netsec_set_tx_de(priv, dring, &tx_ctrl, &tx_desc, skb); | 1171 | netsec_set_tx_de(priv, dring, &tx_ctrl, &tx_desc, skb); |
| 1180 | if (dring->is_xdp) | 1172 | spin_unlock_bh(&dring->lock); |
| 1181 | spin_unlock_bh(&dring->lock); | ||
| 1182 | netsec_write(priv, NETSEC_REG_NRM_TX_PKTCNT, 1); /* submit another tx */ | 1173 | netsec_write(priv, NETSEC_REG_NRM_TX_PKTCNT, 1); /* submit another tx */ |
| 1183 | 1174 | ||
| 1184 | return NETDEV_TX_OK; | 1175 | return NETDEV_TX_OK; |
| @@ -1262,7 +1253,6 @@ err: · 77 unmodified lines | |||
| 1262 | static void netsec_setup_tx_dring(struct netsec_priv *priv) | 1253 | static void netsec_setup_tx_dring(struct netsec_priv *priv) |
| 1263 | { | 1254 | { |
| 1264 | struct netsec_desc_ring *dring = &priv->desc_ring[NETSEC_RING_TX]; | 1255 | struct netsec_desc_ring *dring = &priv->desc_ring[NETSEC_RING_TX]; |
| 1265 | struct bpf_prog *xdp_prog = READ_ONCE(priv->xdp_prog); | ||
| 1266 | int i; | 1256 | int i; |
| 1267 | 1257 | ||
| 1268 | for (i = 0; i < DESC_NUM; i++) { | 1258 | for (i = 0; i < DESC_NUM; i++) { |
| @@ -1275,12 +1265,6 @@ static void netsec_setup_tx_dring(struct netsec_priv *priv) · 6 unmodified lines | |||
| 1275 | */ | 1265 | */ |
| 1276 | de->attr = 1U << NETSEC_TX_SHIFT_OWN_FIELD; | 1266 | de->attr = 1U << NETSEC_TX_SHIFT_OWN_FIELD; |
| 1277 | } | 1267 | } |
| 1278 | |||
| 1279 | if (xdp_prog) | ||
| 1280 | dring->is_xdp = true; | ||
| 1281 | else | ||
| 1282 | dring->is_xdp = false; | ||
| 1283 | |||
| 1284 | } | 1268 | } |
| 1285 | 1269 | ||
| 1286 | static int netsec_setup_rx_dring(struct netsec_priv *priv) | 1270 | static int netsec_setup_rx_dring(struct netsec_priv *priv) |
| @@ -651,7 +651,8 @@ static void sun8i_dwmac_set_filter(struct mac_device_info *hw, · 650 unmodified lines | |||
| 651 | } | 651 | } |
| 652 | } | 652 | } |
| 653 | } else { | 653 | } else { |
| 654 | netdev_info(dev, "Too many address, switching to promiscuous\n"); | 654 | if (!(readl(ioaddr + EMAC_RX_FRM_FLT) & EMAC_FRM_FLT_RXALL)) |
| 655 | netdev_info(dev, "Too many address, switching to promiscuous\n"); | ||
| 655 | v = EMAC_FRM_FLT_RXALL; | 656 | v = EMAC_FRM_FLT_RXALL; |
| 656 | } | 657 | } |
| 657 | 658 | ||
| @@ -401,8 +401,11 @@ static void dwmac4_set_filter(struct mac_device_info *hw, · 400 unmodified lines | |||
| 401 | int numhashregs = (hw->multicast_filter_bins >> 5); | 401 | int numhashregs = (hw->multicast_filter_bins >> 5); |
| 402 | int mcbitslog2 = hw->mcast_bits_log2; | 402 | int mcbitslog2 = hw->mcast_bits_log2; |
| 403 | unsigned int value; | 403 | unsigned int value; |
| 404 | u32 mc_filter[8]; | ||
| 404 | int i; | 405 | int i; |
| 405 | 406 | ||
| 407 | memset(mc_filter, 0, sizeof(mc_filter)); | ||
| 408 | |||
| 406 | value = readl(ioaddr + GMAC_PACKET_FILTER); | 409 | value = readl(ioaddr + GMAC_PACKET_FILTER); |
| 407 | value &= ~GMAC_PACKET_FILTER_HMC; | 410 | value &= ~GMAC_PACKET_FILTER_HMC; |
| 408 | value &= ~GMAC_PACKET_FILTER_HPF; | 411 | value &= ~GMAC_PACKET_FILTER_HPF; |
| @@ -416,16 +419,13 @@ static void dwmac4_set_filter(struct mac_device_info *hw, · 7 unmodified lines | |||
| 416 | /* Pass all multi */ | 419 | /* Pass all multi */ |
| 417 | value |= GMAC_PACKET_FILTER_PM; | 420 | value |= GMAC_PACKET_FILTER_PM; |
| 418 | /* Set all the bits of the HASH tab */ | 421 | /* Set all the bits of the HASH tab */ |
| 419 | for (i = 0; i < numhashregs; i++) | 422 | memset(mc_filter, 0xff, sizeof(mc_filter)); |
| 420 | writel(0xffffffff, ioaddr + GMAC_HASH_TAB(i)); | ||
| 421 | } else if (!netdev_mc_empty(dev)) { | 423 | } else if (!netdev_mc_empty(dev)) { |
| 422 | struct netdev_hw_addr *ha; | 424 | struct netdev_hw_addr *ha; |
| 423 | u32 mc_filter[8]; | ||
| 424 | 425 | ||
| 425 | /* Hash filter for multicast */ | 426 | /* Hash filter for multicast */ |
| 426 | value |= GMAC_PACKET_FILTER_HMC; | 427 | value |= GMAC_PACKET_FILTER_HMC; |
| 427 | 428 | ||
| 428 | memset(mc_filter, 0, sizeof(mc_filter)); | ||
| 429 | netdev_for_each_mc_addr(ha, dev) { | 429 | netdev_for_each_mc_addr(ha, dev) { |
| 430 | /* The upper n bits of the calculated CRC are used to | 430 | /* The upper n bits of the calculated CRC are used to |
| 431 | * index the contents of the hash table. The number of | 431 | * index the contents of the hash table. The number of |
| @@ -440,14 +440,15 @@ static void dwmac4_set_filter(struct mac_device_info *hw, · 8 unmodified lines | |||
| 440 | */ | 440 | */ |
| 441 | mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1f)); | 441 | mc_filter[bit_nr >> 5] |= (1 << (bit_nr & 0x1f)); |
| 442 | } | 442 | } |
| 443 | for (i = 0; i < numhashregs; i++) | ||
| 444 | writel(mc_filter[i], ioaddr + GMAC_HASH_TAB(i)); | ||
| 445 | } | 443 | } |
| 446 | 444 | ||
| 445 | for (i = 0; i < numhashregs; i++) | ||
| 446 | writel(mc_filter[i], ioaddr + GMAC_HASH_TAB(i)); | ||
| 447 | |||
| 447 | value |= GMAC_PACKET_FILTER_HPF; | 448 | value |= GMAC_PACKET_FILTER_HPF; |
| 448 | 449 | ||
| 449 | /* Handle multiple unicast addresses */ | 450 | /* Handle multiple unicast addresses */ |
| 450 | if (netdev_uc_count(dev) > GMAC_MAX_PERFECT_ADDRESSES) { | 451 | if (netdev_uc_count(dev) > hw->unicast_filter_entries) { |
| 451 | /* Switch to promiscuous mode if more than 128 addrs | 452 | /* Switch to promiscuous mode if more than 128 addrs |
| 452 | * are required | 453 | * are required |
| 453 | */ | 454 | */ |
| @@ -515,6 +515,7 @@ int dwmac5_flex_pps_config(void __iomem *ioaddr, int index, · 514 unmodified lines | |||
| 515 | 515 | ||
| 516 | if (!enable) { | 516 | if (!enable) { |
| 517 | val |= PPSCMDx(index, 0x5); | 517 | val |= PPSCMDx(index, 0x5); |
| 518 | val |= PPSEN0; | ||
| 518 | writel(val, ioaddr + MAC_PPS_CONTROL); | 519 | writel(val, ioaddr + MAC_PPS_CONTROL); |
| 519 | return 0; | 520 | return 0; |
| 520 | } | 521 | } |
| @@ -84,7 +84,7 @@ · 83 unmodified lines | |||
| 84 | #define XGMAC_TSIE BIT(12) | 84 | #define XGMAC_TSIE BIT(12) |
| 85 | #define XGMAC_LPIIE BIT(5) | 85 | #define XGMAC_LPIIE BIT(5) |
| 86 | #define XGMAC_PMTIE BIT(4) | 86 | #define XGMAC_PMTIE BIT(4) |
| 87 | #define XGMAC_INT_DEFAULT_EN (XGMAC_LPIIE | XGMAC_PMTIE | XGMAC_TSIE) | 87 | #define XGMAC_INT_DEFAULT_EN (XGMAC_LPIIE | XGMAC_PMTIE) |
| 88 | #define XGMAC_Qx_TX_FLOW_CTRL(x) (0x00000070 + (x) * 4) | 88 | #define XGMAC_Qx_TX_FLOW_CTRL(x) (0x00000070 + (x) * 4) |
| 89 | #define XGMAC_PT GENMASK(31, 16) | 89 | #define XGMAC_PT GENMASK(31, 16) |
| 90 | #define XGMAC_PT_SHIFT 16 | 90 | #define XGMAC_PT_SHIFT 16 |
| @@ -122,6 +122,7 @@ · 31 unmodified lines | |||
| 122 | #define XGMAC_HWFEAT_GMIISEL BIT(1) | 122 | #define XGMAC_HWFEAT_GMIISEL BIT(1) |
| 123 | #define XGMAC_HW_FEATURE1 0x00000120 | 123 | #define XGMAC_HW_FEATURE1 0x00000120 |
| 124 | #define XGMAC_HWFEAT_L3L4FNUM GENMASK(30, 27) | 124 | #define XGMAC_HWFEAT_L3L4FNUM GENMASK(30, 27) |
| 125 | #define XGMAC_HWFEAT_HASHTBLSZ GENMASK(25, 24) | ||
| 125 | #define XGMAC_HWFEAT_RSSEN BIT(20) | 126 | #define XGMAC_HWFEAT_RSSEN BIT(20) |
| 126 | #define XGMAC_HWFEAT_TSOEN BIT(18) | 127 | #define XGMAC_HWFEAT_TSOEN BIT(18) |
| 127 | #define XGMAC_HWFEAT_SPHEN BIT(17) | 128 | #define XGMAC_HWFEAT_SPHEN BIT(17) |
| @@ -472,7 +472,7 @@ static void dwxgmac2_set_filter(struct mac_device_info *hw, · 471 unmodified lines | |||
| 472 | dwxgmac2_set_mchash(ioaddr, mc_filter, mcbitslog2); | 472 | dwxgmac2_set_mchash(ioaddr, mc_filter, mcbitslog2); |
| 473 | 473 | ||
| 474 | /* Handle multiple unicast addresses */ | 474 | /* Handle multiple unicast addresses */ |
| 475 | if (netdev_uc_count(dev) > XGMAC_ADDR_MAX) { | 475 | if (netdev_uc_count(dev) > hw->unicast_filter_entries) { |
| 476 | value |= XGMAC_FILTER_PR; | 476 | value |= XGMAC_FILTER_PR; |
| 477 | } else { | 477 | } else { |
| 478 | struct netdev_hw_addr *ha; | 478 | struct netdev_hw_addr *ha; |
| @@ -523,8 +523,8 @@ static int dwxgmac2_rss_configure(struct mac_device_info *hw, · 44 unmodified lines | |||
| 523 | struct stmmac_rss *cfg, u32 num_rxq) | 523 | struct stmmac_rss *cfg, u32 num_rxq) |
| 524 | { | 524 | { |
| 525 | void __iomem *ioaddr = hw->pcsr; | 525 | void __iomem *ioaddr = hw->pcsr; |
| 526 | u32 value, *key; | ||
| 526 | int i, ret; | 527 | int i, ret; |
| 527 | u32 value; | ||
| 528 | 528 | ||
| 529 | value = readl(ioaddr + XGMAC_RSS_CTRL); | 529 | value = readl(ioaddr + XGMAC_RSS_CTRL); |
| 530 | if (!cfg || !cfg->enable) { | 530 | if (!cfg || !cfg->enable) { |
| @@ -533,8 +533,9 @@ static int dwxgmac2_rss_configure(struct mac_device_info *hw, · 2 unmodified lines | |||
| 533 | return 0; | 533 | return 0; |
| 534 | } | 534 | } |
| 535 | 535 | ||
| 536 | for (i = 0; i < (sizeof(cfg->key) / sizeof(u32)); i++) { | 536 | key = (u32 *)cfg->key; |
| 537 | ret = dwxgmac2_rss_write_reg(ioaddr, true, i, cfg->key[i]); | 537 | for (i = 0; i < (ARRAY_SIZE(cfg->key) / sizeof(u32)); i++) { |
| 538 | ret = dwxgmac2_rss_write_reg(ioaddr, true, i, key[i]); | ||
| 538 | if (ret) | 539 | if (ret) |
| 539 | return ret; | 540 | return ret; |
| 540 | } | 541 | } |
| @@ -380,6 +380,7 @@ static void dwxgmac2_get_hw_feature(void __iomem *ioaddr, · 379 unmodified lines | |||
| 380 | /* MAC HW feature 1 */ | 380 | /* MAC HW feature 1 */ |
| 381 | hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1); | 381 | hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1); |
| 382 | dma_cap->l3l4fnum = (hw_cap & XGMAC_HWFEAT_L3L4FNUM) >> 27; | 382 | dma_cap->l3l4fnum = (hw_cap & XGMAC_HWFEAT_L3L4FNUM) >> 27; |
| 383 | dma_cap->hash_tb_sz = (hw_cap & XGMAC_HWFEAT_HASHTBLSZ) >> 24; | ||
| 383 | dma_cap->rssen = (hw_cap & XGMAC_HWFEAT_RSSEN) >> 20; | 384 | dma_cap->rssen = (hw_cap & XGMAC_HWFEAT_RSSEN) >> 20; |
| 384 | dma_cap->tsoen = (hw_cap & XGMAC_HWFEAT_TSOEN) >> 18; | 385 | dma_cap->tsoen = (hw_cap & XGMAC_HWFEAT_TSOEN) >> 18; |
| 385 | dma_cap->sphen = (hw_cap & XGMAC_HWFEAT_SPHEN) >> 17; | 386 | dma_cap->sphen = (hw_cap & XGMAC_HWFEAT_SPHEN) >> 17; |
| @@ -629,6 +629,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr) · 628 unmodified lines | |||
| 629 | config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; | 629 | config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; |
| 630 | ptp_v2 = PTP_TCR_TSVER2ENA; | 630 | ptp_v2 = PTP_TCR_TSVER2ENA; |
| 631 | snap_type_sel = PTP_TCR_SNAPTYPSEL_1; | 631 | snap_type_sel = PTP_TCR_SNAPTYPSEL_1; |
| 632 | ts_event_en = PTP_TCR_TSEVNTENA; | ||
| 632 | ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA; | 633 | ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA; |
| 633 | ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; | 634 | ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA; |
| 634 | ptp_over_ethernet = PTP_TCR_TSIPENA; | 635 | ptp_over_ethernet = PTP_TCR_TSIPENA; |
| @@ -2609,7 +2610,7 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp) · 1974 unmodified lines | |||
| 2609 | } | 2610 | } |
| 2610 | 2611 | ||
| 2611 | if (priv->hw->pcs) | 2612 | if (priv->hw->pcs) |
| 2612 | stmmac_pcs_ctrl_ane(priv, priv->hw, 1, priv->hw->ps, 0); | 2613 | stmmac_pcs_ctrl_ane(priv, priv->ioaddr, 1, priv->hw->ps, 0); |
| 2613 | 2614 | ||
| 2614 | /* set TX and RX rings length */ | 2615 | /* set TX and RX rings length */ |
| 2615 | stmmac_set_rings_length(priv); | 2616 | stmmac_set_rings_length(priv); |
| @@ -4715,11 +4716,9 @@ int stmmac_suspend(struct device *dev) · 2099 unmodified lines | |||
| 4715 | if (!ndev || !netif_running(ndev)) | 4716 | if (!ndev || !netif_running(ndev)) |
| 4716 | return 0; | 4717 | return 0; |
| 4717 | 4718 | ||
| 4718 | mutex_lock(&priv->lock); | 4719 | phylink_mac_change(priv->phylink, false); |
| 4719 | 4720 | ||
| 4720 | rtnl_lock(); | 4721 | mutex_lock(&priv->lock); |
| 4721 | phylink_stop(priv->phylink); | ||
| 4722 | rtnl_unlock(); | ||
| 4723 | 4722 | ||
| 4724 | netif_device_detach(ndev); | 4723 | netif_device_detach(ndev); |
| 4725 | stmmac_stop_all_queues(priv); | 4724 | stmmac_stop_all_queues(priv); |
| @@ -4734,11 +4733,19 @@ int stmmac_suspend(struct device *dev) · 8 unmodified lines | |||
| 4734 | stmmac_pmt(priv, priv->hw, priv->wolopts); | 4733 | stmmac_pmt(priv, priv->hw, priv->wolopts); |
| 4735 | priv->irq_wake = 1; | 4734 | priv->irq_wake = 1; |
| 4736 | } else { | 4735 | } else { |
| 4736 | mutex_unlock(&priv->lock); | ||
| 4737 | rtnl_lock(); | ||
| 4738 | phylink_stop(priv->phylink); | ||
| 4739 | rtnl_unlock(); | ||
| 4740 | mutex_lock(&priv->lock); | ||
| 4741 | |||
| 4737 | stmmac_mac_set(priv, priv->ioaddr, false); | 4742 | stmmac_mac_set(priv, priv->ioaddr, false); |
| 4738 | pinctrl_pm_select_sleep_state(priv->device); | 4743 | pinctrl_pm_select_sleep_state(priv->device); |
| 4739 | /* Disable clock in case of PWM is off */ | 4744 | /* Disable clock in case of PWM is off */ |
| 4740 | clk_disable(priv->plat->pclk); | 4745 | if (priv->plat->clk_ptp_ref) |
| 4741 | clk_disable(priv->plat->stmmac_clk); | 4746 | clk_disable_unprepare(priv->plat->clk_ptp_ref); |
| 4747 | clk_disable_unprepare(priv->plat->pclk); | ||
| 4748 | clk_disable_unprepare(priv->plat->stmmac_clk); | ||
| 4742 | } | 4749 | } |
| 4743 | mutex_unlock(&priv->lock); | 4750 | mutex_unlock(&priv->lock); |
| 4744 | 4751 | ||
| @@ -4801,8 +4808,10 @@ int stmmac_resume(struct device *dev) · 56 unmodified lines | |||
| 4801 | } else { | 4808 | } else { |
| 4802 | pinctrl_pm_select_default_state(priv->device); | 4809 | pinctrl_pm_select_default_state(priv->device); |
| 4803 | /* enable the clk previously disabled */ | 4810 | /* enable the clk previously disabled */ |
| 4804 | clk_enable(priv->plat->stmmac_clk); | 4811 | clk_prepare_enable(priv->plat->stmmac_clk); |
| 4805 | clk_enable(priv->plat->pclk); | 4812 | clk_prepare_enable(priv->plat->pclk); |
| 4813 | if (priv->plat->clk_ptp_ref) | ||
| 4814 | clk_prepare_enable(priv->plat->clk_ptp_ref); | ||
| 4806 | /* reset the phy so that it's ready */ | 4815 | /* reset the phy so that it's ready */ |
| 4807 | if (priv->mii) | 4816 | if (priv->mii) |
| 4808 | stmmac_mdio_reset(priv->mii); | 4817 | stmmac_mdio_reset(priv->mii); |
| @@ -4824,12 +4833,16 @@ int stmmac_resume(struct device *dev) · 15 unmodified lines | |||
| 4824 | 4833 | ||
| 4825 | stmmac_start_all_queues(priv); | 4834 | stmmac_start_all_queues(priv); |
| 4826 | 4835 | ||
| 4827 | rtnl_lock(); | ||
| 4828 | phylink_start(priv->phylink); | ||
| 4829 | rtnl_unlock(); | ||
| 4830 | |||
| 4831 | mutex_unlock(&priv->lock); | 4836 | mutex_unlock(&priv->lock); |
| 4832 | 4837 | ||
| 4838 | if (!device_may_wakeup(priv->device)) { | ||
| 4839 | rtnl_lock(); | ||
| 4840 | phylink_start(priv->phylink); | ||
| 4841 | rtnl_unlock(); | ||
| 4842 | } | ||
| 4843 | |||
| 4844 | phylink_mac_change(priv->phylink, true); | ||
| 4845 | |||
| 4833 | return 0; | 4846 | return 0; |
| 4834 | } | 4847 | } |
| 4835 | EXPORT_SYMBOL_GPL(stmmac_resume); | 4848 | EXPORT_SYMBOL_GPL(stmmac_resume); |
| @@ -164,7 +164,7 @@ static int stmmac_enable(struct ptp_clock_info *ptp, · 163 unmodified lines | |||
| 164 | /* structure describing a PTP hardware clock */ | 164 | /* structure describing a PTP hardware clock */ |
| 165 | static struct ptp_clock_info stmmac_ptp_clock_ops = { | 165 | static struct ptp_clock_info stmmac_ptp_clock_ops = { |
| 166 | .owner = THIS_MODULE, | 166 | .owner = THIS_MODULE, |
| 167 | .name = "stmmac_ptp_clock", | 167 | .name = "stmmac ptp", |
| 168 | .max_adj = 62500000, | 168 | .max_adj = 62500000, |
| 169 | .n_alarm = 0, | 169 | .n_alarm = 0, |
| 170 | .n_ext_ts = 0, | 170 | .n_ext_ts = 0, |
| @@ -487,8 +487,8 @@ static int stmmac_filter_check(struct stmmac_priv *priv) · 486 unmodified lines | |||
| 487 | 487 | ||
| 488 | static int stmmac_test_hfilt(struct stmmac_priv *priv) | 488 | static int stmmac_test_hfilt(struct stmmac_priv *priv) |
| 489 | { | 489 | { |
| 490 | unsigned char gd_addr[ETH_ALEN] = {0x01, 0x00, 0xcc, 0xcc, 0xdd, 0xdd}; | 490 | unsigned char gd_addr[ETH_ALEN] = {0x01, 0xee, 0xdd, 0xcc, 0xbb, 0xaa}; |
| 491 | unsigned char bd_addr[ETH_ALEN] = {0x09, 0x00, 0xaa, 0xaa, 0xbb, 0xbb}; | 491 | unsigned char bd_addr[ETH_ALEN] = {0x01, 0x01, 0x02, 0x03, 0x04, 0x05}; |
| 492 | struct stmmac_packet_attrs attr = { }; | 492 | struct stmmac_packet_attrs attr = { }; |
| 493 | int ret; | 493 | int ret; |
| 494 | 494 | ||
| @@ -496,6 +496,9 @@ static int stmmac_test_hfilt(struct stmmac_priv *priv) · 1 unmodified line | |||
| 496 | if (ret) | 496 | if (ret) |
| 497 | return ret; | 497 | return ret; |
| 498 | 498 | ||
| 499 | if (netdev_mc_count(priv->dev) >= priv->hw->multicast_filter_bins) | ||
| 500 | return -EOPNOTSUPP; | ||
| 501 | |||
| 499 | ret = dev_mc_add(priv->dev, gd_addr); | 502 | ret = dev_mc_add(priv->dev, gd_addr); |
| 500 | if (ret) | 503 | if (ret) |
| 501 | return ret; | 504 | return ret; |
| @@ -573,6 +576,8 @@ static int stmmac_test_mcfilt(struct stmmac_priv *priv) · 71 unmodified lines | |||
| 573 | 576 | ||
| 574 | if (stmmac_filter_check(priv)) | 577 | if (stmmac_filter_check(priv)) |
| 575 | return -EOPNOTSUPP; | 578 | return -EOPNOTSUPP; |
| 579 | if (!priv->hw->multicast_filter_bins) | ||
| 580 | return -EOPNOTSUPP; | ||
| 576 | 581 | ||
| 577 | /* Remove all MC addresses */ | 582 | /* Remove all MC addresses */ |
| 578 | __dev_mc_unsync(priv->dev, NULL); | 583 | __dev_mc_unsync(priv->dev, NULL); |
| @@ -611,6 +616,8 @@ static int stmmac_test_ucfilt(struct stmmac_priv *priv) · 32 unmodified lines | |||
| 611 | 616 | ||
| 612 | if (stmmac_filter_check(priv)) | 617 | if (stmmac_filter_check(priv)) |
| 613 | return -EOPNOTSUPP; | 618 | return -EOPNOTSUPP; |
| 619 | if (!priv->hw->multicast_filter_bins) | ||
| 620 | return -EOPNOTSUPP; | ||
| 614 | 621 | ||
| 615 | /* Remove all UC addresses */ | 622 | /* Remove all UC addresses */ |
| 616 | __dev_uc_unsync(priv->dev, NULL); | 623 | __dev_uc_unsync(priv->dev, NULL); |
| @@ -1564,10 +1571,6 @@ static int __stmmac_test_jumbo(struct stmmac_priv *priv, u16 queue) · 947 unmodified lines | |||
| 1564 | struct stmmac_packet_attrs attr = { }; | 1571 | struct stmmac_packet_attrs attr = { }; |
| 1565 | int size = priv->dma_buf_sz; | 1572 | int size = priv->dma_buf_sz; |
| 1566 | 1573 | ||
| 1567 | /* Only XGMAC has SW support for multiple RX descs in same packet */ | ||
| 1568 | if (priv->plat->has_xgmac) | ||
| 1569 | size = priv->dev->max_mtu; | ||
| 1570 | |||
| 1571 | attr.dst = priv->dev->dev_addr; | 1574 | attr.dst = priv->dev->dev_addr; |
| 1572 | attr.max_size = size - ETH_FCS_LEN; | 1575 | attr.max_size = size - ETH_FCS_LEN; |
| 1573 | attr.queue_mapping = queue; | 1576 | attr.queue_mapping = queue; |
| @@ -510,7 +510,7 @@ static struct stmmac_flow_entry *tc_find_flow(struct stmmac_priv *priv, · 509 unmodified lines | |||
| 510 | return NULL; | 510 | return NULL; |
| 511 | } | 511 | } |
| 512 | 512 | ||
| 513 | struct { | 513 | static struct { |
| 514 | int (*fn)(struct stmmac_priv *priv, struct flow_cls_offload *cls, | 514 | int (*fn)(struct stmmac_priv *priv, struct flow_cls_offload *cls, |
| 515 | struct stmmac_flow_entry *entry); | 515 | struct stmmac_flow_entry *entry); |
| 516 | } tc_flow_parsers[] = { | 516 | } tc_flow_parsers[] = { |
| @@ -722,7 +722,7 @@ static void cpdma_chan_set_descs(struct cpdma_ctlr *ctlr, · 721 unmodified lines | |||
| 722 | * cpdma_chan_split_pool - Splits ctrl pool between all channels. | 722 | * cpdma_chan_split_pool - Splits ctrl pool between all channels. |
| 723 | * Has to be called under ctlr lock | 723 | * Has to be called under ctlr lock |
| 724 | */ | 724 | */ |
| 725 | int cpdma_chan_split_pool(struct cpdma_ctlr *ctlr) | 725 | static int cpdma_chan_split_pool(struct cpdma_ctlr *ctlr) |
| 726 | { | 726 | { |
| 727 | int tx_per_ch_desc = 0, rx_per_ch_desc = 0; | 727 | int tx_per_ch_desc = 0, rx_per_ch_desc = 0; |
| 728 | int free_rx_num = 0, free_tx_num = 0; | 728 | int free_rx_num = 0, free_tx_num = 0; |
| @@ -1137,10 +1137,11 @@ static void atusb_disconnect(struct usb_interface *interface) · 1136 unmodified lines | |||
| 1137 | 1137 | ||
| 1138 | ieee802154_unregister_hw(atusb->hw); | 1138 | ieee802154_unregister_hw(atusb->hw); |
| 1139 | 1139 | ||
| 1140 | usb_put_dev(atusb->usb_dev); | ||
| 1141 | |||
| 1140 | ieee802154_free_hw(atusb->hw); | 1142 | ieee802154_free_hw(atusb->hw); |
| 1141 | 1143 | ||
| 1142 | usb_set_intfdata(interface, NULL); | 1144 | usb_set_intfdata(interface, NULL); |
| 1143 | usb_put_dev(atusb->usb_dev); | ||
| 1144 | 1145 | ||
| 1145 | pr_debug("%s done\n", __func__); | 1146 | pr_debug("%s done\n", __func__); |
| 1146 | } | 1147 | } |
| @@ -3145,12 +3145,12 @@ static int ca8210_probe(struct spi_device *spi_device) · 3144 unmodified lines | |||
| 3145 | goto error; | 3145 | goto error; |
| 3146 | } | 3146 | } |
| 3147 | 3147 | ||
| 3148 | priv->spi->dev.platform_data = pdata; | ||
| 3148 | ret = ca8210_get_platform_data(priv->spi, pdata); | 3149 | ret = ca8210_get_platform_data(priv->spi, pdata); |
| 3149 | if (ret) { | 3150 | if (ret) { |
| 3150 | dev_crit(&spi_device->dev, "ca8210_get_platform_data failed\n"); | 3151 | dev_crit(&spi_device->dev, "ca8210_get_platform_data failed\n"); |
| 3151 | goto error; | 3152 | goto error; |
| 3152 | } | 3153 | } |
| 3153 | priv->spi->dev.platform_data = pdata; | ||
| 3154 | 3154 | ||
| 3155 | ret = ca8210_dev_com_init(priv); | 3155 | ret = ca8210_dev_com_init(priv); |
| 3156 | if (ret) { | 3156 | if (ret) { |
| @@ -800,7 +800,7 @@ mcr20a_handle_rx_read_buf_complete(void *context) · 799 unmodified lines | |||
| 800 | if (!skb) | 800 | if (!skb) |
| 801 | return; | 801 | return; |
| 802 | 802 | ||
| 803 | memcpy(skb_put(skb, len), lp->rx_buf, len); | 803 | __skb_put_data(skb, lp->rx_buf, len); |
| 804 | ieee802154_rx_irqsafe(lp->hw, skb, lp->rx_lqi[0]); | 804 | ieee802154_rx_irqsafe(lp->hw, skb, lp->rx_lqi[0]); |
| 805 | 805 | ||
| 806 | print_hex_dump_debug("mcr20a rx: ", DUMP_PREFIX_OFFSET, 16, 1, | 806 | print_hex_dump_debug("mcr20a rx: ", DUMP_PREFIX_OFFSET, 16, 1, |
| @@ -241,8 +241,8 @@ static struct pernet_operations nsim_fib_net_ops = { · 240 unmodified lines | |||
| 241 | 241 | ||
| 242 | void nsim_fib_exit(void) | 242 | void nsim_fib_exit(void) |
| 243 | { | 243 | { |
| 244 | unregister_pernet_subsys(&nsim_fib_net_ops); | ||
| 245 | unregister_fib_notifier(&nsim_fib_nb); | 244 | unregister_fib_notifier(&nsim_fib_nb); |
| 245 | unregister_pernet_subsys(&nsim_fib_net_ops); | ||
| 246 | } | 246 | } |
| 247 | 247 | ||
| 248 | int nsim_fib_init(void) | 248 | int nsim_fib_init(void) |
| @@ -258,6 +258,7 @@ int nsim_fib_init(void) · 9 unmodified lines | |||
| 258 | err = register_fib_notifier(&nsim_fib_nb, nsim_fib_dump_inconsistent); | 258 | err = register_fib_notifier(&nsim_fib_nb, nsim_fib_dump_inconsistent); |
| 259 | if (err < 0) { | 259 | if (err < 0) { |
| 260 | pr_err("Failed to register fib notifier\n"); | 260 | pr_err("Failed to register fib notifier\n"); |
| 261 | unregister_pernet_subsys(&nsim_fib_net_ops); | ||
| 261 | goto err_out; | 262 | goto err_out; |
| 262 | } | 263 | } |
| 263 | 264 | ||
| @@ -15,6 +15,15 @@ · 14 unmodified lines | |||
| 15 | #include <linux/of_gpio.h> | 15 | #include <linux/of_gpio.h> |
| 16 | #include <linux/gpio/consumer.h> | 16 | #include <linux/gpio/consumer.h> |
| 17 | 17 | ||
| 18 | #define AT803X_SPECIFIC_STATUS 0x11 | ||
| 19 | #define AT803X_SS_SPEED_MASK (3 << 14) | ||
| 20 | #define AT803X_SS_SPEED_1000 (2 << 14) | ||
| 21 | #define AT803X_SS_SPEED_100 (1 << 14) | ||
| 22 | #define AT803X_SS_SPEED_10 (0 << 14) | ||
| 23 | #define AT803X_SS_DUPLEX BIT(13) | ||
| 24 | #define AT803X_SS_SPEED_DUPLEX_RESOLVED BIT(11) | ||
| 25 | #define AT803X_SS_MDIX BIT(6) | ||
| 26 | |||
| 18 | #define AT803X_INTR_ENABLE 0x12 | 27 | #define AT803X_INTR_ENABLE 0x12 |
| 19 | #define AT803X_INTR_ENABLE_AUTONEG_ERR BIT(15) | 28 | #define AT803X_INTR_ENABLE_AUTONEG_ERR BIT(15) |
| 20 | #define AT803X_INTR_ENABLE_SPEED_CHANGED BIT(14) | 29 | #define AT803X_INTR_ENABLE_SPEED_CHANGED BIT(14) |
| @@ -357,6 +366,64 @@ static int at803x_aneg_done(struct phy_device *phydev) · 336 unmodified lines | |||
| 357 | return aneg_done; | 366 | return aneg_done; |
| 358 | } | 367 | } |
| 359 | 368 | ||
| 369 | static int at803x_read_status(struct phy_device *phydev) | ||
| 370 | { | ||
| 371 | int ss, err, old_link = phydev->link; | ||
| 372 | |||
| 373 | /* Update the link, but return if there was an error */ | ||
| 374 | err = genphy_update_link(phydev); | ||
| 375 | if (err) | ||
| 376 | return err; | ||
| 377 | |||
| 378 | /* why bother the PHY if nothing can have changed */ | ||
| 379 | if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link) | ||
| 380 | return 0; | ||
| 381 | |||
| 382 | phydev->speed = SPEED_UNKNOWN; | ||
| 383 | phydev->duplex = DUPLEX_UNKNOWN; | ||
| 384 | phydev->pause = 0; | ||
| 385 | phydev->asym_pause = 0; | ||
| 386 | |||
| 387 | err = genphy_read_lpa(phydev); | ||
| 388 | if (err < 0) | ||
| 389 | return err; | ||
| 390 | |||
| 391 | /* Read the AT8035 PHY-Specific Status register, which indicates the | ||
| 392 | * speed and duplex that the PHY is actually using, irrespective of | ||
| 393 | * whether we are in autoneg mode or not. | ||
| 394 | */ | ||
| 395 | ss = phy_read(phydev, AT803X_SPECIFIC_STATUS); | ||
| 396 | if (ss < 0) | ||
| 397 | return ss; | ||
| 398 | |||
| 399 | if (ss & AT803X_SS_SPEED_DUPLEX_RESOLVED) { | ||
| 400 | switch (ss & AT803X_SS_SPEED_MASK) { | ||
| 401 | case AT803X_SS_SPEED_10: | ||
| 402 | phydev->speed = SPEED_10; | ||
| 403 | break; | ||
| 404 | case AT803X_SS_SPEED_100: | ||
| 405 | phydev->speed = SPEED_100; | ||
| 406 | break; | ||
| 407 | case AT803X_SS_SPEED_1000: | ||
| 408 | phydev->speed = SPEED_1000; | ||
| 409 | break; | ||
| 410 | } | ||
| 411 | if (ss & AT803X_SS_DUPLEX) | ||
| 412 | phydev->duplex = DUPLEX_FULL; | ||
| 413 | else | ||
| 414 | phydev->duplex = DUPLEX_HALF; | ||
| 415 | if (ss & AT803X_SS_MDIX) | ||
| 416 | phydev->mdix = ETH_TP_MDI_X; | ||
| 417 | else | ||
| 418 | phydev->mdix = ETH_TP_MDI; | ||
| 419 | } | ||
| 420 | |||
| 421 | if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) | ||
| 422 | phy_resolve_aneg_pause(phydev); | ||
| 423 | |||
| 424 | return 0; | ||
| 425 | } | ||
| 426 | |||
| 360 | static struct phy_driver at803x_driver[] = { | 427 | static struct phy_driver at803x_driver[] = { |
| 361 | { | 428 | { |
| 362 | /* ATHEROS 8035 */ | 429 | /* ATHEROS 8035 */ |
| @@ -370,6 +437,7 @@ static struct phy_driver at803x_driver[] = { · 7 unmodified lines | |||
| 370 | .suspend = at803x_suspend, | 437 | .suspend = at803x_suspend, |
| 371 | .resume = at803x_resume, | 438 | .resume = at803x_resume, |
| 372 | /* PHY_GBIT_FEATURES */ | 439 | /* PHY_GBIT_FEATURES */ |
| 440 | .read_status = at803x_read_status, | ||
| 373 | .ack_interrupt = at803x_ack_interrupt, | 441 | .ack_interrupt = at803x_ack_interrupt, |
| 374 | .config_intr = at803x_config_intr, | 442 | .config_intr = at803x_config_intr, |
| 375 | }, { | 443 | }, { |
| @@ -399,6 +467,7 @@ static struct phy_driver at803x_driver[] = { · 23 unmodified lines | |||
| 399 | .suspend = at803x_suspend, | 467 | .suspend = at803x_suspend, |
| 400 | .resume = at803x_resume, | 468 | .resume = at803x_resume, |
| 401 | /* PHY_GBIT_FEATURES */ | 469 | /* PHY_GBIT_FEATURES */ |
| 470 | .read_status = at803x_read_status, | ||
| 402 | .aneg_done = at803x_aneg_done, | 471 | .aneg_done = at803x_aneg_done, |
| 403 | .ack_interrupt = &at803x_ack_interrupt, | 472 | .ack_interrupt = &at803x_ack_interrupt, |
| 404 | .config_intr = &at803x_config_intr, | 473 | .config_intr = &at803x_config_intr, |
| @@ -572,6 +572,7 @@ static int bcm7xxx_28nm_probe(struct phy_device *phydev) · 571 unmodified lines | |||
| 572 | .name = _name, \ | 572 | .name = _name, \ |
| 573 | /* PHY_BASIC_FEATURES */ \ | 573 | /* PHY_BASIC_FEATURES */ \ |
| 574 | .flags = PHY_IS_INTERNAL, \ | 574 | .flags = PHY_IS_INTERNAL, \ |
| 575 | .soft_reset = genphy_soft_reset, \ | ||
| 575 | .config_init = bcm7xxx_config_init, \ | 576 | .config_init = bcm7xxx_config_init, \ |
| 576 | .suspend = bcm7xxx_suspend, \ | 577 | .suspend = bcm7xxx_suspend, \ |
| 577 | .resume = bcm7xxx_config_init, \ | 578 | .resume = bcm7xxx_config_init, \ |
| @@ -121,7 +121,7 @@ void mdio_device_reset(struct mdio_device *mdiodev, int value) · 120 unmodified lines | |||
| 121 | return; | 121 | return; |
| 122 | 122 | ||
| 123 | if (mdiodev->reset_gpio) | 123 | if (mdiodev->reset_gpio) |
| 124 | gpiod_set_value(mdiodev->reset_gpio, value); | 124 | gpiod_set_value_cansleep(mdiodev->reset_gpio, value); |
| 125 | 125 | ||
| 126 | if (mdiodev->reset_ctrl) { | 126 | if (mdiodev->reset_ctrl) { |
| 127 | if (value) | 127 | if (value) |
| @@ -341,6 +341,35 @@ static int ksz8041_config_aneg(struct phy_device *phydev) · 340 unmodified lines | |||
| 341 | return genphy_config_aneg(phydev); | 341 | return genphy_config_aneg(phydev); |
| 342 | } | 342 | } |
| 343 | 343 | ||
| 344 | static int ksz8051_ksz8795_match_phy_device(struct phy_device *phydev, | ||
| 345 | const u32 ksz_phy_id) | ||
| 346 | { | ||
| 347 | int ret; | ||
| 348 | |||
| 349 | if ((phydev->phy_id & MICREL_PHY_ID_MASK) != ksz_phy_id) | ||
| 350 | return 0; | ||
| 351 | |||
| 352 | ret = phy_read(phydev, MII_BMSR); | ||
| 353 | if (ret < 0) | ||
| 354 | return ret; | ||
| 355 | |||
| 356 | /* KSZ8051 PHY and KSZ8794/KSZ8795/KSZ8765 switch share the same | ||
| 357 | * exact PHY ID. However, they can be told apart by the extended | ||
| 358 | * capability registers presence. The KSZ8051 PHY has them while | ||
| 359 | * the switch does not. | ||
| 360 | */ | ||
| 361 | ret &= BMSR_ERCAP; | ||
| 362 | if (ksz_phy_id == PHY_ID_KSZ8051) | ||
| 363 | return ret; | ||
| 364 | else | ||
| 365 | return !ret; | ||
| 366 | } | ||
| 367 | |||
| 368 | static int ksz8051_match_phy_device(struct phy_device *phydev) | ||
| 369 | { | ||
| 370 | return ksz8051_ksz8795_match_phy_device(phydev, PHY_ID_KSZ8051); | ||
| 371 | } | ||
| 372 | |||
| 344 | static int ksz8081_config_init(struct phy_device *phydev) | 373 | static int ksz8081_config_init(struct phy_device *phydev) |
| 345 | { | 374 | { |
| 346 | /* KSZPHY_OMSO_FACTORY_TEST is set at de-assertion of the reset line | 375 | /* KSZPHY_OMSO_FACTORY_TEST is set at de-assertion of the reset line |
| @@ -364,6 +393,11 @@ static int ksz8061_config_init(struct phy_device *phydev) · 17 unmodified lines | |||
| 364 | return kszphy_config_init(phydev); | 393 | return kszphy_config_init(phydev); |
| 365 | } | 394 | } |
| 366 | 395 | ||
| 396 | static int ksz8795_match_phy_device(struct phy_device *phydev) | ||
| 397 | { | ||
| 398 | return ksz8051_ksz8795_match_phy_device(phydev, PHY_ID_KSZ87XX); | ||
| 399 | } | ||
| 400 | |||
| 367 | static int ksz9021_load_values_from_of(struct phy_device *phydev, | 401 | static int ksz9021_load_values_from_of(struct phy_device *phydev, |
| 368 | const struct device_node *of_node, | 402 | const struct device_node *of_node, |
| 369 | u16 reg, | 403 | u16 reg, |
| @@ -1017,8 +1051,6 @@ static struct phy_driver ksphy_driver[] = { · 647 unmodified lines | |||
| 1017 | .suspend = genphy_suspend, | 1051 | .suspend = genphy_suspend, |
| 1018 | .resume = genphy_resume, | 1052 | .resume = genphy_resume, |
| 1019 | }, { | 1053 | }, { |
| 1020 | .phy_id = PHY_ID_KSZ8051, | ||
| 1021 | .phy_id_mask = MICREL_PHY_ID_MASK, | ||
| 1022 | .name = "Micrel KSZ8051", | 1054 | .name = "Micrel KSZ8051", |
| 1023 | /* PHY_BASIC_FEATURES */ | 1055 | /* PHY_BASIC_FEATURES */ |
| 1024 | .driver_data = &ksz8051_type, | 1056 | .driver_data = &ksz8051_type, |
| @@ -1029,6 +1061,7 @@ static struct phy_driver ksphy_driver[] = { · 4 unmodified lines | |||
| 1029 | .get_sset_count = kszphy_get_sset_count, | 1061 | .get_sset_count = kszphy_get_sset_count, |
| 1030 | .get_strings = kszphy_get_strings, | 1062 | .get_strings = kszphy_get_strings, |
| 1031 | .get_stats = kszphy_get_stats, | 1063 | .get_stats = kszphy_get_stats, |
| 1064 | .match_phy_device = ksz8051_match_phy_device, | ||
| 1032 | .suspend = genphy_suspend, | 1065 | .suspend = genphy_suspend, |
| 1033 | .resume = genphy_resume, | 1066 | .resume = genphy_resume, |
| 1034 | }, { | 1067 | }, { |
| @@ -1141,13 +1174,12 @@ static struct phy_driver ksphy_driver[] = { · 106 unmodified lines | |||
| 1141 | .suspend = genphy_suspend, | 1174 | .suspend = genphy_suspend, |
| 1142 | .resume = genphy_resume, | 1175 | .resume = genphy_resume, |
| 1143 | }, { | 1176 | }, { |
| 1144 | .phy_id = PHY_ID_KSZ8795, | 1177 | .name = "Micrel KSZ87XX Switch", |
| 1145 | .phy_id_mask = MICREL_PHY_ID_MASK, | ||
| 1146 | .name = "Micrel KSZ8795", | ||
| 1147 | /* PHY_BASIC_FEATURES */ | 1178 | /* PHY_BASIC_FEATURES */ |
| 1148 | .config_init = kszphy_config_init, | 1179 | .config_init = kszphy_config_init, |
| 1149 | .config_aneg = ksz8873mll_config_aneg, | 1180 | .config_aneg = ksz8873mll_config_aneg, |
| 1150 | .read_status = ksz8873mll_read_status, | 1181 | .read_status = ksz8873mll_read_status, |
| 1182 | .match_phy_device = ksz8795_match_phy_device, | ||
| 1151 | .suspend = genphy_suspend, | 1183 | .suspend = genphy_suspend, |
| 1152 | .resume = genphy_resume, | 1184 | .resume = genphy_resume, |
| 1153 | }, { | 1185 | }, { |
| @@ -323,6 +323,8 @@ int genphy_c45_read_pma(struct phy_device *phydev) · 322 unmodified lines | |||
| 323 | { | 323 | { |
| 324 | int val; | 324 | int val; |
| 325 | 325 | ||
| 326 | linkmode_zero(phydev->lp_advertising); | ||
| 327 | |||
| 326 | val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); | 328 | val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); |
| 327 | if (val < 0) | 329 | if (val < 0) |
| 328 | return val; | 330 | return val; |
| @@ -283,6 +283,18 @@ void of_set_phy_eee_broken(struct phy_device *phydev) · 282 unmodified lines | |||
| 283 | phydev->eee_broken_modes = broken; | 283 | phydev->eee_broken_modes = broken; |
| 284 | } | 284 | } |
| 285 | 285 | ||
| 286 | void phy_resolve_aneg_pause(struct phy_device *phydev) | ||
| 287 | { | ||
| 288 | if (phydev->duplex == DUPLEX_FULL) { | ||
| 289 | phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, | ||
| 290 | phydev->lp_advertising); | ||
| 291 | phydev->asym_pause = linkmode_test_bit( | ||
| 292 | ETHTOOL_LINK_MODE_Asym_Pause_BIT, | ||
| 293 | phydev->lp_advertising); | ||
| 294 | } | ||
| 295 | } | ||
| 296 | EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause); | ||
| 297 | |||
| 286 | /** | 298 | /** |
| 287 | * phy_resolve_aneg_linkmode - resolve the advertisements into phy settings | 299 | * phy_resolve_aneg_linkmode - resolve the advertisements into phy settings |
| 288 | * @phydev: The phy_device struct | 300 | * @phydev: The phy_device struct |
| @@ -305,13 +317,7 @@ void phy_resolve_aneg_linkmode(struct phy_device *phydev) · 16 unmodified lines | |||
| 305 | break; | 317 | break; |
| 306 | } | 318 | } |
| 307 | 319 | ||
| 308 | if (phydev->duplex == DUPLEX_FULL) { | 320 | phy_resolve_aneg_pause(phydev); |
| 309 | phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, | ||
| 310 | phydev->lp_advertising); | ||
| 311 | phydev->asym_pause = linkmode_test_bit( | ||
| 312 | ETHTOOL_LINK_MODE_Asym_Pause_BIT, | ||
| 313 | phydev->lp_advertising); | ||
| 314 | } | ||
| 315 | } | 321 | } |
| 316 | EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode); | 322 | EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode); |
| 317 | 323 | ||
| @@ -457,6 +457,11 @@ int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd) · 456 unmodified lines | |||
| 457 | val); | 457 | val); |
| 458 | change_autoneg = true; | 458 | change_autoneg = true; |
| 459 | break; | 459 | break; |
| 460 | case MII_CTRL1000: | ||
| 461 | mii_ctrl1000_mod_linkmode_adv_t(phydev->advertising, | ||
| 462 | val); | ||
| 463 | change_autoneg = true; | ||
| 464 | break; | ||
| 460 | default: | 465 | default: |
| 461 | /* do nothing */ | 466 | /* do nothing */ |
| 462 | break; | 467 | break; |
| @@ -567,9 +572,6 @@ int phy_start_aneg(struct phy_device *phydev) · 104 unmodified lines | |||
| 567 | if (AUTONEG_DISABLE == phydev->autoneg) | 572 | if (AUTONEG_DISABLE == phydev->autoneg) |
| 568 | phy_sanitize_settings(phydev); | 573 | phy_sanitize_settings(phydev); |
| 569 | 574 | ||
| 570 | /* Invalidate LP advertising flags */ | ||
| 571 | linkmode_zero(phydev->lp_advertising); | ||
| 572 | |||
| 573 | err = phy_config_aneg(phydev); | 575 | err = phy_config_aneg(phydev); |
| 574 | if (err < 0) | 576 | if (err < 0) |
| 575 | goto out_unlock; | 577 | goto out_unlock; |
| @@ -1783,34 +1783,18 @@ done: · 1782 unmodified lines | |||
| 1783 | } | 1783 | } |
| 1784 | EXPORT_SYMBOL(genphy_update_link); | 1784 | EXPORT_SYMBOL(genphy_update_link); |
| 1785 | 1785 | ||
| 1786 | /** | 1786 | int genphy_read_lpa(struct phy_device *phydev) |
| 1787 | * genphy_read_status - check the link status and update current link state | ||
| 1788 | * @phydev: target phy_device struct | ||
| 1789 | * | ||
| 1790 | * Description: Check the link, then figure out the current state | ||
| 1791 | * by comparing what we advertise with what the link partner | ||
| 1792 | * advertises. Start by checking the gigabit possibilities, | ||
| 1793 | * then move on to 10/100. | ||
| 1794 | */ | ||
| 1795 | int genphy_read_status(struct phy_device *phydev) | ||
| 1796 | { | 1787 | { |
| 1797 | int lpa, lpagb, err, old_link = phydev->link; | 1788 | int lpa, lpagb; |
| 1798 | |||
| 1799 | /* Update the link, but return if there was an error */ | ||
| 1800 | err = genphy_update_link(phydev); | ||
| 1801 | if (err) | ||
| 1802 | return err; | ||
| 1803 | |||
| 1804 | /* why bother the PHY if nothing can have changed */ | ||
| 1805 | if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link) | ||
| 1806 | return 0; | ||
| 1807 | 1789 | ||
| 1808 | phydev->speed = SPEED_UNKNOWN; | 1790 | if (phydev->autoneg == AUTONEG_ENABLE) { |
| 1809 | phydev->duplex = DUPLEX_UNKNOWN; | 1791 | if (!phydev->autoneg_complete) { |
| 1810 | phydev->pause = 0; | 1792 | mii_stat1000_mod_linkmode_lpa_t(phydev->lp_advertising, |
| 1811 | phydev->asym_pause = 0; | 1793 | 0); |
| 1794 | mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, 0); | ||
| 1795 | return 0; | ||
| 1796 | } | ||
| 1812 | 1797 | ||
| 1813 | if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) { | ||
| 1814 | if (phydev->is_gigabit_capable) { | 1798 | if (phydev->is_gigabit_capable) { |
| 1815 | lpagb = phy_read(phydev, MII_STAT1000); | 1799 | lpagb = phy_read(phydev, MII_STAT1000); |
| 1816 | if (lpagb < 0) | 1800 | if (lpagb < 0) |
| @@ -1838,6 +1822,46 @@ int genphy_read_status(struct phy_device *phydev) · 21 unmodified lines | |||
| 1838 | return lpa; | 1822 | return lpa; |
| 1839 | 1823 | ||
| 1840 | mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); | 1824 | mii_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa); |
| 1825 | } else { | ||
| 1826 | linkmode_zero(phydev->lp_advertising); | ||
| 1827 | } | ||
| 1828 | |||
| 1829 | return 0; | ||
| 1830 | } | ||
| 1831 | EXPORT_SYMBOL(genphy_read_lpa); | ||
| 1832 | |||
| 1833 | /** | ||
| 1834 | * genphy_read_status - check the link status and update current link state | ||
| 1835 | * @phydev: target phy_device struct | ||
| 1836 | * | ||
| 1837 | * Description: Check the link, then figure out the current state | ||
| 1838 | * by comparing what we advertise with what the link partner | ||
| 1839 | * advertises. Start by checking the gigabit possibilities, | ||
| 1840 | * then move on to 10/100. | ||
| 1841 | */ | ||
| 1842 | int genphy_read_status(struct phy_device *phydev) | ||
| 1843 | { | ||
| 1844 | int err, old_link = phydev->link; | ||
| 1845 | |||
| 1846 | /* Update the link, but return if there was an error */ | ||
| 1847 | err = genphy_update_link(phydev); | ||
| 1848 | if (err) | ||
| 1849 | return err; | ||
| 1850 | |||
| 1851 | /* why bother the PHY if nothing can have changed */ | ||
| 1852 | if (phydev->autoneg == AUTONEG_ENABLE && old_link && phydev->link) | ||
| 1853 | return 0; | ||
| 1854 | |||
| 1855 | phydev->speed = SPEED_UNKNOWN; | ||
| 1856 | phydev->duplex = DUPLEX_UNKNOWN; | ||
| 1857 | phydev->pause = 0; | ||
| 1858 | phydev->asym_pause = 0; | ||
| 1859 | |||
| 1860 | err = genphy_read_lpa(phydev); | ||
| 1861 | if (err < 0) | ||
| 1862 | return err; | ||
| 1863 | |||
| 1864 | if (phydev->autoneg == AUTONEG_ENABLE && phydev->autoneg_complete) { | ||
| 1841 | phy_resolve_aneg_linkmode(phydev); | 1865 | phy_resolve_aneg_linkmode(phydev); |
| 1842 | } else if (phydev->autoneg == AUTONEG_DISABLE) { | 1866 | } else if (phydev->autoneg == AUTONEG_DISABLE) { |
| 1843 | int bmcr = phy_read(phydev, MII_BMCR); | 1867 | int bmcr = phy_read(phydev, MII_BMCR); |
| @@ -576,7 +576,7 @@ static int phylink_register_sfp(struct phylink *pl, · 575 unmodified lines | |||
| 576 | 576 | ||
| 577 | /** | 577 | /** |
| 578 | * phylink_create() - create a phylink instance | 578 | * phylink_create() - create a phylink instance |
| 579 | * @ndev: a pointer to the &struct net_device | 579 | * @config: a pointer to the target &struct phylink_config |
| 580 | * @fwnode: a pointer to a &struct fwnode_handle describing the network | 580 | * @fwnode: a pointer to a &struct fwnode_handle describing the network |
| 581 | * interface | 581 | * interface |
| 582 | * @iface: the desired link mode defined by &typedef phy_interface_t | 582 | * @iface: the desired link mode defined by &typedef phy_interface_t |
| @@ -238,7 +238,7 @@ static int pptp_xmit(struct ppp_channel *chan, struct sk_buff *skb) · 237 unmodified lines | |||
| 238 | skb_dst_drop(skb); | 238 | skb_dst_drop(skb); |
| 239 | skb_dst_set(skb, &rt->dst); | 239 | skb_dst_set(skb, &rt->dst); |
| 240 | 240 | ||
| 241 | nf_reset(skb); | 241 | nf_reset_ct(skb); |
| 242 | 242 | ||
| 243 | skb->ip_summed = CHECKSUM_NONE; | 243 | skb->ip_summed = CHECKSUM_NONE; |
| 244 | ip_select_ident(net, skb, NULL); | 244 | ip_select_ident(net, skb, NULL); |
| @@ -358,7 +358,7 @@ static int pptp_rcv(struct sk_buff *skb) · 113 unmodified lines | |||
| 358 | po = lookup_chan(htons(header->call_id), iph->saddr); | 358 | po = lookup_chan(htons(header->call_id), iph->saddr); |
| 359 | if (po) { | 359 | if (po) { |
| 360 | skb_dst_drop(skb); | 360 | skb_dst_drop(skb); |
| 361 | nf_reset(skb); | 361 | nf_reset_ct(skb); |
| 362 | return sk_receive_skb(sk_pppox(po), skb, 0); | 362 | return sk_receive_skb(sk_pppox(po), skb, 0); |
| 363 | } | 363 | } |
| 364 | drop: | 364 | drop: |
| @@ -526,8 +526,8 @@ static void tun_flow_update(struct tun_struct *tun, u32 rxhash, · 525 unmodified lines | |||
| 526 | e = tun_flow_find(head, rxhash); | 526 | e = tun_flow_find(head, rxhash); |
| 527 | if (likely(e)) { | 527 | if (likely(e)) { |
| 528 | /* TODO: keep queueing to old queue until it's empty? */ | 528 | /* TODO: keep queueing to old queue until it's empty? */ |
| 529 | if (e->queue_index != queue_index) | 529 | if (READ_ONCE(e->queue_index) != queue_index) |
| 530 | e->queue_index = queue_index; | 530 | WRITE_ONCE(e->queue_index, queue_index); |
| 531 | if (e->updated != jiffies) | 531 | if (e->updated != jiffies) |
| 532 | e->updated = jiffies; | 532 | e->updated = jiffies; |
| 533 | sock_rps_record_flow_hash(e->rps_rxhash); | 533 | sock_rps_record_flow_hash(e->rps_rxhash); |
| @@ -1104,7 +1104,7 @@ static netdev_tx_t tun_net_xmit(struct sk_buff *skb, struct net_device *dev) · 570 unmodified lines | |||
| 1104 | */ | 1104 | */ |
| 1105 | skb_orphan(skb); | 1105 | skb_orphan(skb); |
| 1106 | 1106 | ||
| 1107 | nf_reset(skb); | 1107 | nf_reset_ct(skb); |
| 1108 | 1108 | ||
| 1109 | if (ptr_ring_produce(&tfile->tx_ring, skb)) | 1109 | if (ptr_ring_produce(&tfile->tx_ring, skb)) |
| 1110 | goto drop; | 1110 | goto drop; |
| @@ -186,7 +186,7 @@ struct hso_tiocmget { · 185 unmodified lines | |||
| 186 | int intr_completed; | 186 | int intr_completed; |
| 187 | struct usb_endpoint_descriptor *endp; | 187 | struct usb_endpoint_descriptor *endp; |
| 188 | struct urb *urb; | 188 | struct urb *urb; |
| 189 | struct hso_serial_state_notification serial_state_notification; | 189 | struct hso_serial_state_notification *serial_state_notification; |
| 190 | u16 prev_UART_state_bitmap; | 190 | u16 prev_UART_state_bitmap; |
| 191 | struct uart_icount icount; | 191 | struct uart_icount icount; |
| 192 | }; | 192 | }; |
| @@ -1432,7 +1432,7 @@ static int tiocmget_submit_urb(struct hso_serial *serial, · 1239 unmodified lines | |||
| 1432 | usb_rcvintpipe(usb, | 1432 | usb_rcvintpipe(usb, |
| 1433 | tiocmget->endp-> | 1433 | tiocmget->endp-> |
| 1434 | bEndpointAddress & 0x7F), | 1434 | bEndpointAddress & 0x7F), |
| 1435 | &tiocmget->serial_state_notification, | 1435 | tiocmget->serial_state_notification, |
| 1436 | sizeof(struct hso_serial_state_notification), | 1436 | sizeof(struct hso_serial_state_notification), |
| 1437 | tiocmget_intr_callback, serial, | 1437 | tiocmget_intr_callback, serial, |
| 1438 | tiocmget->endp->bInterval); | 1438 | tiocmget->endp->bInterval); |
| @@ -1479,7 +1479,7 @@ static void tiocmget_intr_callback(struct urb *urb) · 40 unmodified lines | |||
| 1479 | /* wIndex should be the USB interface number of the port to which the | 1479 | /* wIndex should be the USB interface number of the port to which the |
| 1480 | * notification applies, which should always be the Modem port. | 1480 | * notification applies, which should always be the Modem port. |
| 1481 | */ | 1481 | */ |
| 1482 | serial_state_notification = &tiocmget->serial_state_notification; | 1482 | serial_state_notification = tiocmget->serial_state_notification; |
| 1483 | if (serial_state_notification->bmRequestType != BM_REQUEST_TYPE || | 1483 | if (serial_state_notification->bmRequestType != BM_REQUEST_TYPE || |
| 1484 | serial_state_notification->bNotification != B_NOTIFICATION || | 1484 | serial_state_notification->bNotification != B_NOTIFICATION || |
| 1485 | le16_to_cpu(serial_state_notification->wValue) != W_VALUE || | 1485 | le16_to_cpu(serial_state_notification->wValue) != W_VALUE || |
| @@ -2565,6 +2565,8 @@ static void hso_free_tiomget(struct hso_serial *serial) · 1079 unmodified lines | |||
| 2565 | usb_free_urb(tiocmget->urb); | 2565 | usb_free_urb(tiocmget->urb); |
| 2566 | tiocmget->urb = NULL; | 2566 | tiocmget->urb = NULL; |
| 2567 | serial->tiocmget = NULL; | 2567 | serial->tiocmget = NULL; |
| 2568 | kfree(tiocmget->serial_state_notification); | ||
| 2569 | tiocmget->serial_state_notification = NULL; | ||
| 2568 | kfree(tiocmget); | 2570 | kfree(tiocmget); |
| 2569 | } | 2571 | } |
| 2570 | } | 2572 | } |
| @@ -2615,19 +2617,26 @@ static struct hso_device *hso_create_bulk_serial_device( · 44 unmodified lines | |||
| 2615 | num_urbs = 2; | 2617 | num_urbs = 2; |
| 2616 | serial->tiocmget = kzalloc(sizeof(struct hso_tiocmget), | 2618 | serial->tiocmget = kzalloc(sizeof(struct hso_tiocmget), |
| 2617 | GFP_KERNEL); | 2619 | GFP_KERNEL); |
| 2620 | serial->tiocmget->serial_state_notification | ||
| 2621 | = kzalloc(sizeof(struct hso_serial_state_notification), | ||
| 2622 | GFP_KERNEL); | ||
| 2618 | /* it isn't going to break our heart if serial->tiocmget | 2623 | /* it isn't going to break our heart if serial->tiocmget |
| 2619 | * allocation fails don't bother checking this. | 2624 | * allocation fails don't bother checking this. |
| 2620 | */ | 2625 | */ |
| 2621 | if (serial->tiocmget) { | 2626 | if (serial->tiocmget && serial->tiocmget->serial_state_notification) { |
| 2622 | tiocmget = serial->tiocmget; | 2627 | tiocmget = serial->tiocmget; |
| 2628 | tiocmget->endp = hso_get_ep(interface, | ||
| 2629 | USB_ENDPOINT_XFER_INT, | ||
| 2630 | USB_DIR_IN); | ||
| 2631 | if (!tiocmget->endp) { | ||
| 2632 | dev_err(&interface->dev, "Failed to find INT IN ep\n"); | ||
| 2633 | goto exit; | ||
| 2634 | } | ||
| 2635 | |||
| 2623 | tiocmget->urb = usb_alloc_urb(0, GFP_KERNEL); | 2636 | tiocmget->urb = usb_alloc_urb(0, GFP_KERNEL); |
| 2624 | if (tiocmget->urb) { | 2637 | if (tiocmget->urb) { |
| 2625 | mutex_init(&tiocmget->mutex); | 2638 | mutex_init(&tiocmget->mutex); |
| 2626 | init_waitqueue_head(&tiocmget->waitq); | 2639 | init_waitqueue_head(&tiocmget->waitq); |
| 2627 | tiocmget->endp = hso_get_ep( | ||
| 2628 | interface, | ||
| 2629 | USB_ENDPOINT_XFER_INT, | ||
| 2630 | USB_DIR_IN); | ||
| 2631 | } else | 2640 | } else |
| 2632 | hso_free_tiomget(serial); | 2641 | hso_free_tiomget(serial); |
| 2633 | } | 2642 | } |
| @@ -3782,10 +3782,14 @@ static int lan78xx_probe(struct usb_interface *intf, · 3781 unmodified lines | |||
| 3782 | /* driver requires remote-wakeup capability during autosuspend. */ | 3782 | /* driver requires remote-wakeup capability during autosuspend. */ |
| 3783 | intf->needs_remote_wakeup = 1; | 3783 | intf->needs_remote_wakeup = 1; |
| 3784 | 3784 | ||
| 3785 | ret = lan78xx_phy_init(dev); | ||
| 3786 | if (ret < 0) | ||
| 3787 | goto out4; | ||
| 3788 | |||
| 3785 | ret = register_netdev(netdev); | 3789 | ret = register_netdev(netdev); |
| 3786 | if (ret != 0) { | 3790 | if (ret != 0) { |
| 3787 | netif_err(dev, probe, netdev, "couldn't register the device\n"); | 3791 | netif_err(dev, probe, netdev, "couldn't register the device\n"); |
| 3788 | goto out4; | 3792 | goto out5; |
| 3789 | } | 3793 | } |
| 3790 | 3794 | ||
| 3791 | usb_set_intfdata(intf, dev); | 3795 | usb_set_intfdata(intf, dev); |
| @@ -3798,14 +3802,10 @@ static int lan78xx_probe(struct usb_interface *intf, · 6 unmodified lines | |||
| 3798 | pm_runtime_set_autosuspend_delay(&udev->dev, | 3802 | pm_runtime_set_autosuspend_delay(&udev->dev, |
| 3799 | DEFAULT_AUTOSUSPEND_DELAY); | 3803 | DEFAULT_AUTOSUSPEND_DELAY); |
| 3800 | 3804 | ||
| 3801 | ret = lan78xx_phy_init(dev); | ||
| 3802 | if (ret < 0) | ||
| 3803 | goto out5; | ||
| 3804 | |||
| 3805 | return 0; | 3805 | return 0; |
| 3806 | 3806 | ||
| 3807 | out5: | 3807 | out5: |
| 3808 | unregister_netdev(netdev); | 3808 | phy_disconnect(netdev->phydev); |
| 3809 | out4: | 3809 | out4: |
| 3810 | usb_free_urb(dev->urb_intr); | 3810 | usb_free_urb(dev->urb_intr); |
| 3811 | out3: | 3811 | out3: |
| @@ -1327,6 +1327,7 @@ static const struct usb_device_id products[] = { · 1326 unmodified lines | |||
| 1327 | {QMI_FIXED_INTF(0x2357, 0x0201, 4)}, /* TP-LINK HSUPA Modem MA180 */ | 1327 | {QMI_FIXED_INTF(0x2357, 0x0201, 4)}, /* TP-LINK HSUPA Modem MA180 */ |
| 1328 | {QMI_FIXED_INTF(0x2357, 0x9000, 4)}, /* TP-LINK MA260 */ | 1328 | {QMI_FIXED_INTF(0x2357, 0x9000, 4)}, /* TP-LINK MA260 */ |
| 1329 | {QMI_QUIRK_SET_DTR(0x1bc7, 0x1040, 2)}, /* Telit LE922A */ | 1329 | {QMI_QUIRK_SET_DTR(0x1bc7, 0x1040, 2)}, /* Telit LE922A */ |
| 1330 | {QMI_QUIRK_SET_DTR(0x1bc7, 0x1050, 2)}, /* Telit FN980 */ | ||
| 1330 | {QMI_FIXED_INTF(0x1bc7, 0x1100, 3)}, /* Telit ME910 */ | 1331 | {QMI_FIXED_INTF(0x1bc7, 0x1100, 3)}, /* Telit ME910 */ |
| 1331 | {QMI_FIXED_INTF(0x1bc7, 0x1101, 3)}, /* Telit ME910 dual modem */ | 1332 | {QMI_FIXED_INTF(0x1bc7, 0x1101, 3)}, /* Telit ME910 dual modem */ |
| 1332 | {QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */ | 1333 | {QMI_FIXED_INTF(0x1bc7, 0x1200, 5)}, /* Telit LE920 */ |
| @@ -1350,6 +1351,7 @@ static const struct usb_device_id products[] = { · 17 unmodified lines | |||
| 1350 | {QMI_FIXED_INTF(0x1e2d, 0x0082, 4)}, /* Cinterion PHxx,PXxx (2 RmNet) */ | 1351 | {QMI_FIXED_INTF(0x1e2d, 0x0082, 4)}, /* Cinterion PHxx,PXxx (2 RmNet) */ |
| 1351 | {QMI_FIXED_INTF(0x1e2d, 0x0082, 5)}, /* Cinterion PHxx,PXxx (2 RmNet) */ | 1352 | {QMI_FIXED_INTF(0x1e2d, 0x0082, 5)}, /* Cinterion PHxx,PXxx (2 RmNet) */ |
| 1352 | {QMI_FIXED_INTF(0x1e2d, 0x0083, 4)}, /* Cinterion PHxx,PXxx (1 RmNet + USB Audio)*/ | 1353 | {QMI_FIXED_INTF(0x1e2d, 0x0083, 4)}, /* Cinterion PHxx,PXxx (1 RmNet + USB Audio)*/ |
| 1354 | {QMI_QUIRK_SET_DTR(0x1e2d, 0x00b0, 4)}, /* Cinterion CLS8 */ | ||
| 1353 | {QMI_FIXED_INTF(0x413c, 0x81a2, 8)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card */ | 1355 | {QMI_FIXED_INTF(0x413c, 0x81a2, 8)}, /* Dell Wireless 5806 Gobi(TM) 4G LTE Mobile Broadband Card */ |
| 1354 | {QMI_FIXED_INTF(0x413c, 0x81a3, 8)}, /* Dell Wireless 5570 HSPA+ (42Mbps) Mobile Broadband Card */ | 1356 | {QMI_FIXED_INTF(0x413c, 0x81a3, 8)}, /* Dell Wireless 5570 HSPA+ (42Mbps) Mobile Broadband Card */ |
| 1355 | {QMI_FIXED_INTF(0x413c, 0x81a4, 8)}, /* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card */ | 1357 | {QMI_FIXED_INTF(0x413c, 0x81a4, 8)}, /* Dell Wireless 5570e HSPA+ (42Mbps) Mobile Broadband Card */ |
| @@ -4799,10 +4799,9 @@ static int rtl8152_reset_resume(struct usb_interface *intf) · 4798 unmodified lines | |||
| 4799 | struct r8152 *tp = usb_get_intfdata(intf); | 4799 | struct r8152 *tp = usb_get_intfdata(intf); |
| 4800 | 4800 | ||
| 4801 | clear_bit(SELECTIVE_SUSPEND, &tp->flags); | 4801 | clear_bit(SELECTIVE_SUSPEND, &tp->flags); |
| 4802 | mutex_lock(&tp->control); | ||
| 4803 | tp->rtl_ops.init(tp); | 4802 | tp->rtl_ops.init(tp); |
| 4804 | queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0); | 4803 | queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0); |
| 4805 | mutex_unlock(&tp->control); | 4804 | set_ethernet_addr(tp); |
| 4806 | return rtl8152_resume(intf); | 4805 | return rtl8152_resume(intf); |
| 4807 | } | 4806 | } |
| 4808 | 4807 | ||
| @@ -335,7 +335,7 @@ static void sr_set_multicast(struct net_device *net) · 334 unmodified lines | |||
| 335 | static int sr_mdio_read(struct net_device *net, int phy_id, int loc) | 335 | static int sr_mdio_read(struct net_device *net, int phy_id, int loc) |
| 336 | { | 336 | { |
| 337 | struct usbnet *dev = netdev_priv(net); | 337 | struct usbnet *dev = netdev_priv(net); |
| 338 | __le16 res; | 338 | __le16 res = 0; |
| 339 | 339 | ||
| 340 | mutex_lock(&dev->phy_mutex); | 340 | mutex_lock(&dev->phy_mutex); |
| 341 | sr_set_sw_mii(dev); | 341 | sr_set_sw_mii(dev); |
| @@ -1585,7 +1585,7 @@ static netdev_tx_t start_xmit(struct sk_buff *skb, struct net_device *dev) · 1584 unmodified lines | |||
| 1585 | /* Don't wait up for transmitted skbs to be freed. */ | 1585 | /* Don't wait up for transmitted skbs to be freed. */ |
| 1586 | if (!use_napi) { | 1586 | if (!use_napi) { |
| 1587 | skb_orphan(skb); | 1587 | skb_orphan(skb); |
| 1588 | nf_reset(skb); | 1588 | nf_reset_ct(skb); |
| 1589 | } | 1589 | } |
| 1590 | 1590 | ||
| 1591 | /* If running out of space, stop queue to avoid getting packets that we | 1591 | /* If running out of space, stop queue to avoid getting packets that we |
| @@ -366,7 +366,7 @@ static int vrf_finish_output6(struct net *net, struct sock *sk, · 365 unmodified lines | |||
| 366 | struct neighbour *neigh; | 366 | struct neighbour *neigh; |
| 367 | int ret; | 367 | int ret; |
| 368 | 368 | ||
| 369 | nf_reset(skb); | 369 | nf_reset_ct(skb); |
| 370 | 370 | ||
| 371 | skb->protocol = htons(ETH_P_IPV6); | 371 | skb->protocol = htons(ETH_P_IPV6); |
| 372 | skb->dev = dev; | 372 | skb->dev = dev; |
| @@ -459,7 +459,7 @@ static struct sk_buff *vrf_ip6_out_direct(struct net_device *vrf_dev, · 86 unmodified lines | |||
| 459 | 459 | ||
| 460 | /* reset skb device */ | 460 | /* reset skb device */ |
| 461 | if (likely(err == 1)) | 461 | if (likely(err == 1)) |
| 462 | nf_reset(skb); | 462 | nf_reset_ct(skb); |
| 463 | else | 463 | else |
| 464 | skb = NULL; | 464 | skb = NULL; |
| 465 | 465 | ||
| @@ -560,7 +560,7 @@ static int vrf_finish_output(struct net *net, struct sock *sk, struct sk_buff *s · 94 unmodified lines | |||
| 560 | bool is_v6gw = false; | 560 | bool is_v6gw = false; |
| 561 | int ret = -EINVAL; | 561 | int ret = -EINVAL; |
| 562 | 562 | ||
| 563 | nf_reset(skb); | 563 | nf_reset_ct(skb); |
| 564 | 564 | ||
| 565 | /* Be paranoid, rather than too clever. */ | 565 | /* Be paranoid, rather than too clever. */ |
| 566 | if (unlikely(skb_headroom(skb) < hh_len && dev->header_ops)) { | 566 | if (unlikely(skb_headroom(skb) < hh_len && dev->header_ops)) { |
| @@ -670,7 +670,7 @@ static struct sk_buff *vrf_ip_out_direct(struct net_device *vrf_dev, · 103 unmodified lines | |||
| 670 | 670 | ||
| 671 | /* reset skb device */ | 671 | /* reset skb device */ |
| 672 | if (likely(err == 1)) | 672 | if (likely(err == 1)) |
| 673 | nf_reset(skb); | 673 | nf_reset_ct(skb); |
| 674 | else | 674 | else |
| 675 | skb = NULL; | 675 | skb = NULL; |
| 676 | 676 | ||
| @@ -2118,12 +2118,15 @@ static int ath10k_init_uart(struct ath10k *ar) · 2117 unmodified lines | |||
| 2118 | return ret; | 2118 | return ret; |
| 2119 | } | 2119 | } |
| 2120 | 2120 | ||
| 2121 | if (!uart_print && ar->hw_params.uart_pin_workaround) { | 2121 | if (!uart_print) { |
| 2122 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, | 2122 | if (ar->hw_params.uart_pin_workaround) { |
| 2123 | ar->hw_params.uart_pin); | 2123 | ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, |
| 2124 | if (ret) { | 2124 | ar->hw_params.uart_pin); |
| 2125 | ath10k_warn(ar, "failed to set UART TX pin: %d", ret); | 2125 | if (ret) { |
| 2126 | return ret; | 2126 | ath10k_warn(ar, "failed to set UART TX pin: %d", |
| 2127 | ret); | ||
| 2128 | return ret; | ||
| 2129 | } | ||
| 2127 | } | 2130 | } |
| 2128 | 2131 | ||
| 2129 | return 0; | 2132 | return 0; |
| @@ -162,12 +162,13 @@ int iwl_acpi_get_mcc(struct device *dev, char *mcc) · 161 unmodified lines | |||
| 162 | 162 | ||
| 163 | wifi_pkg = iwl_acpi_get_wifi_pkg(dev, data, ACPI_WRDD_WIFI_DATA_SIZE, | 163 | wifi_pkg = iwl_acpi_get_wifi_pkg(dev, data, ACPI_WRDD_WIFI_DATA_SIZE, |
| 164 | &tbl_rev); | 164 | &tbl_rev); |
| 165 | if (IS_ERR(wifi_pkg) || tbl_rev != 0) { | 165 | if (IS_ERR(wifi_pkg)) { |
| 166 | ret = PTR_ERR(wifi_pkg); | 166 | ret = PTR_ERR(wifi_pkg); |
| 167 | goto out_free; | 167 | goto out_free; |
| 168 | } | 168 | } |
| 169 | 169 | ||
| 170 | if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) { | 170 | if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER || |
| 171 | tbl_rev != 0) { | ||
| 171 | ret = -EINVAL; | 172 | ret = -EINVAL; |
| 172 | goto out_free; | 173 | goto out_free; |
| 173 | } | 174 | } |
| @@ -224,12 +225,13 @@ int iwl_acpi_get_eckv(struct device *dev, u32 *extl_clk) · 50 unmodified lines | |||
| 224 | 225 | ||
| 225 | wifi_pkg = iwl_acpi_get_wifi_pkg(dev, data, ACPI_ECKV_WIFI_DATA_SIZE, | 226 | wifi_pkg = iwl_acpi_get_wifi_pkg(dev, data, ACPI_ECKV_WIFI_DATA_SIZE, |
| 226 | &tbl_rev); | 227 | &tbl_rev); |
| 227 | if (IS_ERR(wifi_pkg) || tbl_rev != 0) { | 228 | if (IS_ERR(wifi_pkg)) { |
| 228 | ret = PTR_ERR(wifi_pkg); | 229 | ret = PTR_ERR(wifi_pkg); |
| 229 | goto out_free; | 230 | goto out_free; |
| 230 | } | 231 | } |
| 231 | 232 | ||
| 232 | if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) { | 233 | if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER || |
| 234 | tbl_rev != 0) { | ||
| 233 | ret = -EINVAL; | 235 | ret = -EINVAL; |
| 234 | goto out_free; | 236 | goto out_free; |
| 235 | } | 237 | } |
| @@ -646,6 +646,7 @@ static struct scatterlist *alloc_sgtable(int size) · 645 unmodified lines | |||
| 646 | if (new_page) | 646 | if (new_page) |
| 647 | __free_page(new_page); | 647 | __free_page(new_page); |
| 648 | } | 648 | } |
| 649 | kfree(table); | ||
| 649 | return NULL; | 650 | return NULL; |
| 650 | } | 651 | } |
| 651 | alloc_size = min_t(int, size, PAGE_SIZE); | 652 | alloc_size = min_t(int, size, PAGE_SIZE); |
| @@ -112,38 +112,38 @@ int iwl_dump_fh(struct iwl_trans *trans, char **buf); · 111 unmodified lines | |||
| 112 | */ | 112 | */ |
| 113 | static inline u32 iwl_umac_prph(struct iwl_trans *trans, u32 ofs) | 113 | static inline u32 iwl_umac_prph(struct iwl_trans *trans, u32 ofs) |
| 114 | { | 114 | { |
| 115 | return ofs + trans->cfg->trans.umac_prph_offset; | 115 | return ofs + trans->trans_cfg->umac_prph_offset; |
| 116 | } | 116 | } |
| 117 | 117 | ||
| 118 | static inline u32 iwl_read_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs) | 118 | static inline u32 iwl_read_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs) |
| 119 | { | 119 | { |
| 120 | return iwl_read_prph_no_grab(trans, ofs + | 120 | return iwl_read_prph_no_grab(trans, ofs + |
| 121 | trans->cfg->trans.umac_prph_offset); | 121 | trans->trans_cfg->umac_prph_offset); |
| 122 | } | 122 | } |
| 123 | 123 | ||
| 124 | static inline u32 iwl_read_umac_prph(struct iwl_trans *trans, u32 ofs) | 124 | static inline u32 iwl_read_umac_prph(struct iwl_trans *trans, u32 ofs) |
| 125 | { | 125 | { |
| 126 | return iwl_read_prph(trans, ofs + trans->cfg->trans.umac_prph_offset); | 126 | return iwl_read_prph(trans, ofs + trans->trans_cfg->umac_prph_offset); |
| 127 | } | 127 | } |
| 128 | 128 | ||
| 129 | static inline void iwl_write_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs, | 129 | static inline void iwl_write_umac_prph_no_grab(struct iwl_trans *trans, u32 ofs, |
| 130 | u32 val) | 130 | u32 val) |
| 131 | { | 131 | { |
| 132 | iwl_write_prph_no_grab(trans, ofs + trans->cfg->trans.umac_prph_offset, | 132 | iwl_write_prph_no_grab(trans, ofs + trans->trans_cfg->umac_prph_offset, |
| 133 | val); | 133 | val); |
| 134 | } | 134 | } |
| 135 | 135 | ||
| 136 | static inline void iwl_write_umac_prph(struct iwl_trans *trans, u32 ofs, | 136 | static inline void iwl_write_umac_prph(struct iwl_trans *trans, u32 ofs, |
| 137 | u32 val) | 137 | u32 val) |
| 138 | { | 138 | { |
| 139 | iwl_write_prph(trans, ofs + trans->cfg->trans.umac_prph_offset, val); | 139 | iwl_write_prph(trans, ofs + trans->trans_cfg->umac_prph_offset, val); |
| 140 | } | 140 | } |
| 141 | 141 | ||
| 142 | static inline int iwl_poll_umac_prph_bit(struct iwl_trans *trans, u32 addr, | 142 | static inline int iwl_poll_umac_prph_bit(struct iwl_trans *trans, u32 addr, |
| 143 | u32 bits, u32 mask, int timeout) | 143 | u32 bits, u32 mask, int timeout) |
| 144 | { | 144 | { |
| 145 | return iwl_poll_prph_bit(trans, addr + | 145 | return iwl_poll_prph_bit(trans, addr + |
| 146 | trans->cfg->trans.umac_prph_offset, | 146 | trans->trans_cfg->umac_prph_offset, |
| 147 | bits, mask, timeout); | 147 | bits, mask, timeout); |
| 148 | } | 148 | } |
| 149 | 149 | ||
| @@ -420,6 +420,9 @@ static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm) · 419 unmodified lines | |||
| 420 | }; | 420 | }; |
| 421 | int ret; | 421 | int ret; |
| 422 | 422 | ||
| 423 | if (mvm->trans->cfg->tx_with_siso_diversity) | ||
| 424 | init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY)); | ||
| 425 | |||
| 423 | lockdep_assert_held(&mvm->mutex); | 426 | lockdep_assert_held(&mvm->mutex); |
| 424 | 427 | ||
| 425 | mvm->rfkill_safe_init_done = false; | 428 | mvm->rfkill_safe_init_done = false; |
| @@ -694,12 +697,13 @@ static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm) · 268 unmodified lines | |||
| 694 | 697 | ||
| 695 | wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, | 698 | wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, |
| 696 | ACPI_WRDS_WIFI_DATA_SIZE, &tbl_rev); | 699 | ACPI_WRDS_WIFI_DATA_SIZE, &tbl_rev); |
| 697 | if (IS_ERR(wifi_pkg) || tbl_rev != 0) { | 700 | if (IS_ERR(wifi_pkg)) { |
| 698 | ret = PTR_ERR(wifi_pkg); | 701 | ret = PTR_ERR(wifi_pkg); |
| 699 | goto out_free; | 702 | goto out_free; |
| 700 | } | 703 | } |
| 701 | 704 | ||
| 702 | if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) { | 705 | if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER || |
| 706 | tbl_rev != 0) { | ||
| 703 | ret = -EINVAL; | 707 | ret = -EINVAL; |
| 704 | goto out_free; | 708 | goto out_free; |
| 705 | } | 709 | } |
| @@ -731,13 +735,14 @@ static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm) · 25 unmodified lines | |||
| 731 | 735 | ||
| 732 | wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, | 736 | wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, |
| 733 | ACPI_EWRD_WIFI_DATA_SIZE, &tbl_rev); | 737 | ACPI_EWRD_WIFI_DATA_SIZE, &tbl_rev); |
| 734 | if (IS_ERR(wifi_pkg) || tbl_rev != 0) { | 738 | if (IS_ERR(wifi_pkg)) { |
| 735 | ret = PTR_ERR(wifi_pkg); | 739 | ret = PTR_ERR(wifi_pkg); |
| 736 | goto out_free; | 740 | goto out_free; |
| 737 | } | 741 | } |
| 738 | 742 | ||
| 739 | if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) || | 743 | if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) || |
| 740 | (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) { | 744 | (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER) || |
| 745 | tbl_rev != 0) { | ||
| 741 | ret = -EINVAL; | 746 | ret = -EINVAL; |
| 742 | goto out_free; | 747 | goto out_free; |
| 743 | } | 748 | } |
| @@ -791,11 +796,16 @@ static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm) · 47 unmodified lines | |||
| 791 | 796 | ||
| 792 | wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, | 797 | wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, |
| 793 | ACPI_WGDS_WIFI_DATA_SIZE, &tbl_rev); | 798 | ACPI_WGDS_WIFI_DATA_SIZE, &tbl_rev); |
| 794 | if (IS_ERR(wifi_pkg) || tbl_rev > 1) { | 799 | if (IS_ERR(wifi_pkg)) { |
| 795 | ret = PTR_ERR(wifi_pkg); | 800 | ret = PTR_ERR(wifi_pkg); |
| 796 | goto out_free; | 801 | goto out_free; |
| 797 | } | 802 | } |
| 798 | 803 | ||
| 804 | if (tbl_rev != 0) { | ||
| 805 | ret = -EINVAL; | ||
| 806 | goto out_free; | ||
| 807 | } | ||
| 808 | |||
| 799 | mvm->geo_rev = tbl_rev; | 809 | mvm->geo_rev = tbl_rev; |
| 800 | for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) { | 810 | for (i = 0; i < ACPI_NUM_GEO_PROFILES; i++) { |
| 801 | for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) { | 811 | for (j = 0; j < ACPI_GEO_TABLE_SIZE; j++) { |
| @@ -889,15 +899,17 @@ static bool iwl_mvm_sar_geo_support(struct iwl_mvm *mvm) · 87 unmodified lines | |||
| 889 | * firmware versions. Unfortunately, we don't have a TLV API | 899 | * firmware versions. Unfortunately, we don't have a TLV API |
| 890 | * flag to rely on, so rely on the major version which is in | 900 | * flag to rely on, so rely on the major version which is in |
| 891 | * the first byte of ucode_ver. This was implemented | 901 | * the first byte of ucode_ver. This was implemented |
| 892 | * initially on version 38 and then backported to29 and 17. | 902 | * initially on version 38 and then backported to 17. It was |
| 893 | * The intention was to have it in 36 as well, but not all | 903 | * also backported to 29, but only for 7265D devices. The |
| 894 | * 8000 family got this feature enabled. The 8000 family is | 904 | * intention was to have it in 36 as well, but not all 8000 |
| 895 | * the only one using version 36, so skip this version | 905 | * family got this feature enabled. The 8000 family is the |
| 896 | * entirely. | 906 | * only one using version 36, so skip this version entirely. |
| 897 | */ | 907 | */ |
| 898 | return IWL_UCODE_SERIAL(mvm->fw->ucode_ver) >= 38 || | 908 | return IWL_UCODE_SERIAL(mvm->fw->ucode_ver) >= 38 || |
| 899 | IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 29 || | 909 | IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 17 || |
| 900 | IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 17; | 910 | (IWL_UCODE_SERIAL(mvm->fw->ucode_ver) == 29 && |
| 911 | ((mvm->trans->hw_rev & CSR_HW_REV_TYPE_MSK) == | ||
| 912 | CSR_HW_REV_TYPE_7265D)); | ||
| 901 | } | 913 | } |
| 902 | 914 | ||
| 903 | int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) | 915 | int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm) |
| @@ -1020,11 +1032,16 @@ static int iwl_mvm_get_ppag_table(struct iwl_mvm *mvm) · 116 unmodified lines | |||
| 1020 | wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, | 1032 | wifi_pkg = iwl_acpi_get_wifi_pkg(mvm->dev, data, |
| 1021 | ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev); | 1033 | ACPI_PPAG_WIFI_DATA_SIZE, &tbl_rev); |
| 1022 | 1034 | ||
| 1023 | if (IS_ERR(wifi_pkg) || tbl_rev != 0) { | 1035 | if (IS_ERR(wifi_pkg)) { |
| 1024 | ret = PTR_ERR(wifi_pkg); | 1036 | ret = PTR_ERR(wifi_pkg); |
| 1025 | goto out_free; | 1037 | goto out_free; |
| 1026 | } | 1038 | } |
| 1027 | 1039 | ||
| 1040 | if (tbl_rev != 0) { | ||
| 1041 | ret = -EINVAL; | ||
| 1042 | goto out_free; | ||
| 1043 | } | ||
| 1044 | |||
| 1028 | enabled = &wifi_pkg->package.elements[1]; | 1045 | enabled = &wifi_pkg->package.elements[1]; |
| 1029 | if (enabled->type != ACPI_TYPE_INTEGER || | 1046 | if (enabled->type != ACPI_TYPE_INTEGER || |
| 1030 | (enabled->integer.value != 0 && enabled->integer.value != 1)) { | 1047 | (enabled->integer.value != 0 && enabled->integer.value != 1)) { |
| @@ -4881,11 +4881,11 @@ void iwl_mvm_sync_rx_queues_internal(struct iwl_mvm *mvm, · 4880 unmodified lines | |||
| 4881 | if (!iwl_mvm_has_new_rx_api(mvm)) | 4881 | if (!iwl_mvm_has_new_rx_api(mvm)) |
| 4882 | return; | 4882 | return; |
| 4883 | 4883 | ||
| 4884 | notif->cookie = mvm->queue_sync_cookie; | 4884 | if (notif->sync) { |
| 4885 | 4885 | notif->cookie = mvm->queue_sync_cookie; | |
| 4886 | if (notif->sync) | ||
| 4887 | atomic_set(&mvm->queue_sync_counter, | 4886 | atomic_set(&mvm->queue_sync_counter, |
| 4888 | mvm->trans->num_rx_queues); | 4887 | mvm->trans->num_rx_queues); |
| 4888 | } | ||
| 4889 | 4889 | ||
| 4890 | ret = iwl_mvm_notify_rx_queue(mvm, qmask, (u8 *)notif, | 4890 | ret = iwl_mvm_notify_rx_queue(mvm, qmask, (u8 *)notif, |
| 4891 | size, !notif->sync); | 4891 | size, !notif->sync); |
| @@ -4905,7 +4905,8 @@ void iwl_mvm_sync_rx_queues_internal(struct iwl_mvm *mvm, · 13 unmodified lines | |||
| 4905 | 4905 | ||
| 4906 | out: | 4906 | out: |
| 4907 | atomic_set(&mvm->queue_sync_counter, 0); | 4907 | atomic_set(&mvm->queue_sync_counter, 0); |
| 4908 | mvm->queue_sync_cookie++; | 4908 | if (notif->sync) |
| 4909 | mvm->queue_sync_cookie++; | ||
| 4909 | } | 4910 | } |
| 4910 | 4911 | ||
| 4911 | static void iwl_mvm_sync_rx_queues(struct ieee80211_hw *hw) | 4912 | static void iwl_mvm_sync_rx_queues(struct ieee80211_hw *hw) |
| @@ -107,13 +107,9 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, · 106 unmodified lines | |||
| 107 | 107 | ||
| 108 | /* allocate ucode sections in dram and set addresses */ | 108 | /* allocate ucode sections in dram and set addresses */ |
| 109 | ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram); | 109 | ret = iwl_pcie_init_fw_sec(trans, fw, &prph_scratch->dram); |
| 110 | if (ret) { | 110 | if (ret) |
| 111 | dma_free_coherent(trans->dev, | 111 | goto err_free_prph_scratch; |
| 112 | sizeof(*prph_scratch), | 112 | |
| 113 | prph_scratch, | ||
| 114 | trans_pcie->prph_scratch_dma_addr); | ||
| 115 | return ret; | ||
| 116 | } | ||
| 117 | 113 | ||
| 118 | /* Allocate prph information | 114 | /* Allocate prph information |
| 119 | * currently we don't assign to the prph info anything, but it would get | 115 | * currently we don't assign to the prph info anything, but it would get |
| @@ -121,16 +117,20 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, · 1 unmodified line | |||
| 121 | prph_info = dma_alloc_coherent(trans->dev, sizeof(*prph_info), | 117 | prph_info = dma_alloc_coherent(trans->dev, sizeof(*prph_info), |
| 122 | &trans_pcie->prph_info_dma_addr, | 118 | &trans_pcie->prph_info_dma_addr, |
| 123 | GFP_KERNEL); | 119 | GFP_KERNEL); |
| 124 | if (!prph_info) | 120 | if (!prph_info) { |
| 125 | return -ENOMEM; | 121 | ret = -ENOMEM; |
| 122 | goto err_free_prph_scratch; | ||
| 123 | } | ||
| 126 | 124 | ||
| 127 | /* Allocate context info */ | 125 | /* Allocate context info */ |
| 128 | ctxt_info_gen3 = dma_alloc_coherent(trans->dev, | 126 | ctxt_info_gen3 = dma_alloc_coherent(trans->dev, |
| 129 | sizeof(*ctxt_info_gen3), | 127 | sizeof(*ctxt_info_gen3), |
| 130 | &trans_pcie->ctxt_info_dma_addr, | 128 | &trans_pcie->ctxt_info_dma_addr, |
| 131 | GFP_KERNEL); | 129 | GFP_KERNEL); |
| 132 | if (!ctxt_info_gen3) | 130 | if (!ctxt_info_gen3) { |
| 133 | return -ENOMEM; | 131 | ret = -ENOMEM; |
| 132 | goto err_free_prph_info; | ||
| 133 | } | ||
| 134 | 134 | ||
| 135 | ctxt_info_gen3->prph_info_base_addr = | 135 | ctxt_info_gen3->prph_info_base_addr = |
| 136 | cpu_to_le64(trans_pcie->prph_info_dma_addr); | 136 | cpu_to_le64(trans_pcie->prph_info_dma_addr); |
| @@ -186,6 +186,20 @@ int iwl_pcie_ctxt_info_gen3_init(struct iwl_trans *trans, · 49 unmodified lines | |||
| 186 | iwl_set_bit(trans, CSR_GP_CNTRL, CSR_AUTO_FUNC_INIT); | 186 | iwl_set_bit(trans, CSR_GP_CNTRL, CSR_AUTO_FUNC_INIT); |
| 187 | 187 | ||
| 188 | return 0; | 188 | return 0; |
| 189 | |||
| 190 | err_free_prph_info: | ||
| 191 | dma_free_coherent(trans->dev, | ||
| 192 | sizeof(*prph_info), | ||
| 193 | prph_info, | ||
| 194 | trans_pcie->prph_info_dma_addr); | ||
| 195 | |||
| 196 | err_free_prph_scratch: | ||
| 197 | dma_free_coherent(trans->dev, | ||
| 198 | sizeof(*prph_scratch), | ||
| 199 | prph_scratch, | ||
| 200 | trans_pcie->prph_scratch_dma_addr); | ||
| 201 | return ret; | ||
| 202 | |||
| 189 | } | 203 | } |
| 190 | 204 | ||
| 191 | void iwl_pcie_ctxt_info_gen3_free(struct iwl_trans *trans) | 205 | void iwl_pcie_ctxt_info_gen3_free(struct iwl_trans *trans) |
| @@ -513,31 +513,33 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 512 unmodified lines | |||
| 513 | {IWL_PCI_DEVICE(0x24FD, 0x9074, iwl8265_2ac_cfg)}, | 513 | {IWL_PCI_DEVICE(0x24FD, 0x9074, iwl8265_2ac_cfg)}, |
| 514 | 514 | ||
| 515 | /* 9000 Series */ | 515 | /* 9000 Series */ |
| 516 | {IWL_PCI_DEVICE(0x02F0, 0x0030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, | 516 | {IWL_PCI_DEVICE(0x02F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 517 | {IWL_PCI_DEVICE(0x02F0, 0x0034, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)}, | 517 | {IWL_PCI_DEVICE(0x02F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 518 | {IWL_PCI_DEVICE(0x02F0, 0x0038, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, | 518 | {IWL_PCI_DEVICE(0x02F0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 519 | {IWL_PCI_DEVICE(0x02F0, 0x003C, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, | 519 | {IWL_PCI_DEVICE(0x02F0, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 520 | {IWL_PCI_DEVICE(0x02F0, 0x0060, iwl9461_2ac_cfg_quz_a0_jf_b0_soc)}, | 520 | {IWL_PCI_DEVICE(0x02F0, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 521 | {IWL_PCI_DEVICE(0x02F0, 0x0064, iwl9461_2ac_cfg_quz_a0_jf_b0_soc)}, | 521 | {IWL_PCI_DEVICE(0x02F0, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 522 | {IWL_PCI_DEVICE(0x02F0, 0x00A0, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)}, | 522 | {IWL_PCI_DEVICE(0x02F0, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 523 | {IWL_PCI_DEVICE(0x02F0, 0x00A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)}, | 523 | {IWL_PCI_DEVICE(0x02F0, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 524 | {IWL_PCI_DEVICE(0x02F0, 0x0230, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)}, | 524 | {IWL_PCI_DEVICE(0x02F0, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 525 | {IWL_PCI_DEVICE(0x02F0, 0x0234, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)}, | 525 | {IWL_PCI_DEVICE(0x02F0, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 526 | {IWL_PCI_DEVICE(0x02F0, 0x0238, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)}, | 526 | {IWL_PCI_DEVICE(0x02F0, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 527 | {IWL_PCI_DEVICE(0x02F0, 0x023C, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)}, | 527 | {IWL_PCI_DEVICE(0x02F0, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 528 | {IWL_PCI_DEVICE(0x02F0, 0x0260, iwl9461_2ac_cfg_quz_a0_jf_b0_soc)}, | 528 | {IWL_PCI_DEVICE(0x02F0, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 529 | {IWL_PCI_DEVICE(0x02F0, 0x0264, iwl9461_2ac_cfg_quz_a0_jf_b0_soc)}, | 529 | {IWL_PCI_DEVICE(0x02F0, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 530 | {IWL_PCI_DEVICE(0x02F0, 0x02A0, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)}, | 530 | {IWL_PCI_DEVICE(0x02F0, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 531 | {IWL_PCI_DEVICE(0x02F0, 0x02A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)}, | 531 | {IWL_PCI_DEVICE(0x02F0, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 532 | {IWL_PCI_DEVICE(0x02F0, 0x1551, iwl9560_killer_s_2ac_cfg_quz_a0_jf_b0_soc)}, | 532 | {IWL_PCI_DEVICE(0x02F0, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 533 | {IWL_PCI_DEVICE(0x02F0, 0x1552, iwl9560_killer_i_2ac_cfg_quz_a0_jf_b0_soc)}, | 533 | {IWL_PCI_DEVICE(0x02F0, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)}, |
| 534 | {IWL_PCI_DEVICE(0x02F0, 0x2030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, | 534 | {IWL_PCI_DEVICE(0x02F0, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)}, |
| 535 | {IWL_PCI_DEVICE(0x02F0, 0x2034, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, | 535 | {IWL_PCI_DEVICE(0x02F0, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 536 | {IWL_PCI_DEVICE(0x02F0, 0x4030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, | 536 | {IWL_PCI_DEVICE(0x02F0, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 537 | {IWL_PCI_DEVICE(0x02F0, 0x4034, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, | 537 | {IWL_PCI_DEVICE(0x02F0, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 538 | {IWL_PCI_DEVICE(0x02F0, 0x40A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)}, | 538 | {IWL_PCI_DEVICE(0x02F0, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 539 | {IWL_PCI_DEVICE(0x02F0, 0x4234, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)}, | 539 | {IWL_PCI_DEVICE(0x02F0, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 540 | {IWL_PCI_DEVICE(0x02F0, 0x42A4, iwl9462_2ac_cfg_quz_a0_jf_b0_soc)}, | 540 | {IWL_PCI_DEVICE(0x02F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 541 | {IWL_PCI_DEVICE(0x02F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, | ||
| 542 | |||
| 541 | {IWL_PCI_DEVICE(0x06F0, 0x0030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, | 543 | {IWL_PCI_DEVICE(0x06F0, 0x0030, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, |
| 542 | {IWL_PCI_DEVICE(0x06F0, 0x0034, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)}, | 544 | {IWL_PCI_DEVICE(0x06F0, 0x0034, iwl9560_2ac_cfg_quz_a0_jf_b0_soc)}, |
| 543 | {IWL_PCI_DEVICE(0x06F0, 0x0038, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, | 545 | {IWL_PCI_DEVICE(0x06F0, 0x0038, iwl9560_2ac_160_cfg_quz_a0_jf_b0_soc)}, |
| @@ -643,34 +645,34 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 99 unmodified lines | |||
| 643 | {IWL_PCI_DEVICE(0x2720, 0x40A4, iwl9462_2ac_cfg_soc)}, | 645 | {IWL_PCI_DEVICE(0x2720, 0x40A4, iwl9462_2ac_cfg_soc)}, |
| 644 | {IWL_PCI_DEVICE(0x2720, 0x4234, iwl9560_2ac_cfg_soc)}, | 646 | {IWL_PCI_DEVICE(0x2720, 0x4234, iwl9560_2ac_cfg_soc)}, |
| 645 | {IWL_PCI_DEVICE(0x2720, 0x42A4, iwl9462_2ac_cfg_soc)}, | 647 | {IWL_PCI_DEVICE(0x2720, 0x42A4, iwl9462_2ac_cfg_soc)}, |
| 646 | {IWL_PCI_DEVICE(0x30DC, 0x0030, iwl9560_2ac_160_cfg_soc)}, | 648 | |
| 647 | {IWL_PCI_DEVICE(0x30DC, 0x0034, iwl9560_2ac_cfg_soc)}, | 649 | {IWL_PCI_DEVICE(0x30DC, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 648 | {IWL_PCI_DEVICE(0x30DC, 0x0038, iwl9560_2ac_160_cfg_soc)}, | 650 | {IWL_PCI_DEVICE(0x30DC, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 649 | {IWL_PCI_DEVICE(0x30DC, 0x003C, iwl9560_2ac_160_cfg_soc)}, | 651 | {IWL_PCI_DEVICE(0x30DC, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 650 | {IWL_PCI_DEVICE(0x30DC, 0x0060, iwl9460_2ac_cfg_soc)}, | 652 | {IWL_PCI_DEVICE(0x30DC, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 651 | {IWL_PCI_DEVICE(0x30DC, 0x0064, iwl9461_2ac_cfg_soc)}, | 653 | {IWL_PCI_DEVICE(0x30DC, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 652 | {IWL_PCI_DEVICE(0x30DC, 0x00A0, iwl9462_2ac_cfg_soc)}, | 654 | {IWL_PCI_DEVICE(0x30DC, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 653 | {IWL_PCI_DEVICE(0x30DC, 0x00A4, iwl9462_2ac_cfg_soc)}, | 655 | {IWL_PCI_DEVICE(0x30DC, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 654 | {IWL_PCI_DEVICE(0x30DC, 0x0230, iwl9560_2ac_cfg_soc)}, | 656 | {IWL_PCI_DEVICE(0x30DC, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 655 | {IWL_PCI_DEVICE(0x30DC, 0x0234, iwl9560_2ac_cfg_soc)}, | 657 | {IWL_PCI_DEVICE(0x30DC, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 656 | {IWL_PCI_DEVICE(0x30DC, 0x0238, iwl9560_2ac_cfg_soc)}, | 658 | {IWL_PCI_DEVICE(0x30DC, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 657 | {IWL_PCI_DEVICE(0x30DC, 0x023C, iwl9560_2ac_cfg_soc)}, | 659 | {IWL_PCI_DEVICE(0x30DC, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 658 | {IWL_PCI_DEVICE(0x30DC, 0x0260, iwl9461_2ac_cfg_soc)}, | 660 | {IWL_PCI_DEVICE(0x30DC, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 659 | {IWL_PCI_DEVICE(0x30DC, 0x0264, iwl9461_2ac_cfg_soc)}, | 661 | {IWL_PCI_DEVICE(0x30DC, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 660 | {IWL_PCI_DEVICE(0x30DC, 0x02A0, iwl9462_2ac_cfg_soc)}, | 662 | {IWL_PCI_DEVICE(0x30DC, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 661 | {IWL_PCI_DEVICE(0x30DC, 0x02A4, iwl9462_2ac_cfg_soc)}, | 663 | {IWL_PCI_DEVICE(0x30DC, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 662 | {IWL_PCI_DEVICE(0x30DC, 0x1010, iwl9260_2ac_cfg)}, | 664 | {IWL_PCI_DEVICE(0x30DC, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 663 | {IWL_PCI_DEVICE(0x30DC, 0x1030, iwl9560_2ac_cfg_soc)}, | 665 | {IWL_PCI_DEVICE(0x30DC, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 664 | {IWL_PCI_DEVICE(0x30DC, 0x1210, iwl9260_2ac_cfg)}, | 666 | {IWL_PCI_DEVICE(0x30DC, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)}, |
| 665 | {IWL_PCI_DEVICE(0x30DC, 0x1551, iwl9560_killer_s_2ac_cfg_soc)}, | 667 | {IWL_PCI_DEVICE(0x30DC, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)}, |
| 666 | {IWL_PCI_DEVICE(0x30DC, 0x1552, iwl9560_killer_2ac_cfg_soc)}, | 668 | {IWL_PCI_DEVICE(0x30DC, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 667 | {IWL_PCI_DEVICE(0x30DC, 0x2030, iwl9560_2ac_160_cfg_soc)}, | 669 | {IWL_PCI_DEVICE(0x30DC, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 668 | {IWL_PCI_DEVICE(0x30DC, 0x2034, iwl9560_2ac_160_cfg_soc)}, | 670 | {IWL_PCI_DEVICE(0x30DC, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 669 | {IWL_PCI_DEVICE(0x30DC, 0x4030, iwl9560_2ac_160_cfg_soc)}, | 671 | {IWL_PCI_DEVICE(0x30DC, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 670 | {IWL_PCI_DEVICE(0x30DC, 0x4034, iwl9560_2ac_160_cfg_soc)}, | 672 | {IWL_PCI_DEVICE(0x30DC, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 671 | {IWL_PCI_DEVICE(0x30DC, 0x40A4, iwl9462_2ac_cfg_soc)}, | 673 | {IWL_PCI_DEVICE(0x30DC, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 672 | {IWL_PCI_DEVICE(0x30DC, 0x4234, iwl9560_2ac_cfg_soc)}, | 674 | {IWL_PCI_DEVICE(0x30DC, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 673 | {IWL_PCI_DEVICE(0x30DC, 0x42A4, iwl9462_2ac_cfg_soc)}, | 675 | |
| 674 | {IWL_PCI_DEVICE(0x31DC, 0x0030, iwl9560_2ac_160_cfg_shared_clk)}, | 676 | {IWL_PCI_DEVICE(0x31DC, 0x0030, iwl9560_2ac_160_cfg_shared_clk)}, |
| 675 | {IWL_PCI_DEVICE(0x31DC, 0x0034, iwl9560_2ac_cfg_shared_clk)}, | 677 | {IWL_PCI_DEVICE(0x31DC, 0x0034, iwl9560_2ac_cfg_shared_clk)}, |
| 676 | {IWL_PCI_DEVICE(0x31DC, 0x0038, iwl9560_2ac_160_cfg_shared_clk)}, | 678 | {IWL_PCI_DEVICE(0x31DC, 0x0038, iwl9560_2ac_160_cfg_shared_clk)}, |
| @@ -726,62 +728,60 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 49 unmodified lines | |||
| 726 | {IWL_PCI_DEVICE(0x34F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, | 728 | {IWL_PCI_DEVICE(0x34F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 727 | {IWL_PCI_DEVICE(0x34F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, | 729 | {IWL_PCI_DEVICE(0x34F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 728 | 730 | ||
| 729 | {IWL_PCI_DEVICE(0x3DF0, 0x0030, iwl9560_2ac_160_cfg_soc)}, | 731 | {IWL_PCI_DEVICE(0x3DF0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 730 | {IWL_PCI_DEVICE(0x3DF0, 0x0034, iwl9560_2ac_cfg_soc)}, | 732 | {IWL_PCI_DEVICE(0x3DF0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 731 | {IWL_PCI_DEVICE(0x3DF0, 0x0038, iwl9560_2ac_160_cfg_soc)}, | 733 | {IWL_PCI_DEVICE(0x3DF0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 732 | {IWL_PCI_DEVICE(0x3DF0, 0x003C, iwl9560_2ac_160_cfg_soc)}, | 734 | {IWL_PCI_DEVICE(0x3DF0, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 733 | {IWL_PCI_DEVICE(0x3DF0, 0x0060, iwl9461_2ac_cfg_soc)}, | 735 | {IWL_PCI_DEVICE(0x3DF0, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 734 | {IWL_PCI_DEVICE(0x3DF0, 0x0064, iwl9461_2ac_cfg_soc)}, | 736 | {IWL_PCI_DEVICE(0x3DF0, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 735 | {IWL_PCI_DEVICE(0x3DF0, 0x00A0, iwl9462_2ac_cfg_soc)}, | 737 | {IWL_PCI_DEVICE(0x3DF0, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 736 | {IWL_PCI_DEVICE(0x3DF0, 0x00A4, iwl9462_2ac_cfg_soc)}, | 738 | {IWL_PCI_DEVICE(0x3DF0, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 737 | {IWL_PCI_DEVICE(0x3DF0, 0x0230, iwl9560_2ac_cfg_soc)}, | 739 | {IWL_PCI_DEVICE(0x3DF0, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 738 | {IWL_PCI_DEVICE(0x3DF0, 0x0234, iwl9560_2ac_cfg_soc)}, | 740 | {IWL_PCI_DEVICE(0x3DF0, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 739 | {IWL_PCI_DEVICE(0x3DF0, 0x0238, iwl9560_2ac_cfg_soc)}, | 741 | {IWL_PCI_DEVICE(0x3DF0, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 740 | {IWL_PCI_DEVICE(0x3DF0, 0x023C, iwl9560_2ac_cfg_soc)}, | 742 | {IWL_PCI_DEVICE(0x3DF0, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 741 | {IWL_PCI_DEVICE(0x3DF0, 0x0260, iwl9461_2ac_cfg_soc)}, | 743 | {IWL_PCI_DEVICE(0x3DF0, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 742 | {IWL_PCI_DEVICE(0x3DF0, 0x0264, iwl9461_2ac_cfg_soc)}, | 744 | {IWL_PCI_DEVICE(0x3DF0, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 743 | {IWL_PCI_DEVICE(0x3DF0, 0x02A0, iwl9462_2ac_cfg_soc)}, | 745 | {IWL_PCI_DEVICE(0x3DF0, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 744 | {IWL_PCI_DEVICE(0x3DF0, 0x02A4, iwl9462_2ac_cfg_soc)}, | 746 | {IWL_PCI_DEVICE(0x3DF0, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 745 | {IWL_PCI_DEVICE(0x3DF0, 0x1010, iwl9260_2ac_cfg)}, | 747 | {IWL_PCI_DEVICE(0x3DF0, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 746 | {IWL_PCI_DEVICE(0x3DF0, 0x1030, iwl9560_2ac_cfg_soc)}, | 748 | {IWL_PCI_DEVICE(0x3DF0, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)}, |
| 747 | {IWL_PCI_DEVICE(0x3DF0, 0x1210, iwl9260_2ac_cfg)}, | 749 | {IWL_PCI_DEVICE(0x3DF0, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)}, |
| 748 | {IWL_PCI_DEVICE(0x3DF0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)}, | 750 | {IWL_PCI_DEVICE(0x3DF0, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 749 | {IWL_PCI_DEVICE(0x3DF0, 0x1552, iwl9560_killer_2ac_cfg_soc)}, | 751 | {IWL_PCI_DEVICE(0x3DF0, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 750 | {IWL_PCI_DEVICE(0x3DF0, 0x2030, iwl9560_2ac_160_cfg_soc)}, | 752 | {IWL_PCI_DEVICE(0x3DF0, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 751 | {IWL_PCI_DEVICE(0x3DF0, 0x2034, iwl9560_2ac_160_cfg_soc)}, | 753 | {IWL_PCI_DEVICE(0x3DF0, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 752 | {IWL_PCI_DEVICE(0x3DF0, 0x4030, iwl9560_2ac_160_cfg_soc)}, | 754 | {IWL_PCI_DEVICE(0x3DF0, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 753 | {IWL_PCI_DEVICE(0x3DF0, 0x4034, iwl9560_2ac_160_cfg_soc)}, | 755 | {IWL_PCI_DEVICE(0x3DF0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 754 | {IWL_PCI_DEVICE(0x3DF0, 0x40A4, iwl9462_2ac_cfg_soc)}, | 756 | {IWL_PCI_DEVICE(0x3DF0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 755 | {IWL_PCI_DEVICE(0x3DF0, 0x4234, iwl9560_2ac_cfg_soc)}, | 757 | |
| 756 | {IWL_PCI_DEVICE(0x3DF0, 0x42A4, iwl9462_2ac_cfg_soc)}, | 758 | {IWL_PCI_DEVICE(0x43F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 757 | {IWL_PCI_DEVICE(0x43F0, 0x0030, iwl9560_2ac_160_cfg_soc)}, | 759 | {IWL_PCI_DEVICE(0x43F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 758 | {IWL_PCI_DEVICE(0x43F0, 0x0034, iwl9560_2ac_cfg_soc)}, | 760 | {IWL_PCI_DEVICE(0x43F0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 759 | {IWL_PCI_DEVICE(0x43F0, 0x0038, iwl9560_2ac_160_cfg_soc)}, | 761 | {IWL_PCI_DEVICE(0x43F0, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 760 | {IWL_PCI_DEVICE(0x43F0, 0x003C, iwl9560_2ac_160_cfg_soc)}, | 762 | {IWL_PCI_DEVICE(0x43F0, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 761 | {IWL_PCI_DEVICE(0x43F0, 0x0060, iwl9461_2ac_cfg_soc)}, | 763 | {IWL_PCI_DEVICE(0x43F0, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 762 | {IWL_PCI_DEVICE(0x43F0, 0x0064, iwl9461_2ac_cfg_soc)}, | 764 | {IWL_PCI_DEVICE(0x43F0, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 763 | {IWL_PCI_DEVICE(0x43F0, 0x00A0, iwl9462_2ac_cfg_soc)}, | 765 | {IWL_PCI_DEVICE(0x43F0, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 764 | {IWL_PCI_DEVICE(0x43F0, 0x00A4, iwl9462_2ac_cfg_soc)}, | 766 | {IWL_PCI_DEVICE(0x43F0, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 765 | {IWL_PCI_DEVICE(0x43F0, 0x0230, iwl9560_2ac_cfg_soc)}, | 767 | {IWL_PCI_DEVICE(0x43F0, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 766 | {IWL_PCI_DEVICE(0x43F0, 0x0234, iwl9560_2ac_cfg_soc)}, | 768 | {IWL_PCI_DEVICE(0x43F0, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 767 | {IWL_PCI_DEVICE(0x43F0, 0x0238, iwl9560_2ac_cfg_soc)}, | 769 | {IWL_PCI_DEVICE(0x43F0, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 768 | {IWL_PCI_DEVICE(0x43F0, 0x023C, iwl9560_2ac_cfg_soc)}, | 770 | {IWL_PCI_DEVICE(0x43F0, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 769 | {IWL_PCI_DEVICE(0x43F0, 0x0260, iwl9461_2ac_cfg_soc)}, | 771 | {IWL_PCI_DEVICE(0x43F0, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 770 | {IWL_PCI_DEVICE(0x43F0, 0x0264, iwl9461_2ac_cfg_soc)}, | 772 | {IWL_PCI_DEVICE(0x43F0, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 771 | {IWL_PCI_DEVICE(0x43F0, 0x02A0, iwl9462_2ac_cfg_soc)}, | 773 | {IWL_PCI_DEVICE(0x43F0, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 772 | {IWL_PCI_DEVICE(0x43F0, 0x02A4, iwl9462_2ac_cfg_soc)}, | 774 | {IWL_PCI_DEVICE(0x43F0, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 773 | {IWL_PCI_DEVICE(0x43F0, 0x1010, iwl9260_2ac_cfg)}, | 775 | {IWL_PCI_DEVICE(0x43F0, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)}, |
| 774 | {IWL_PCI_DEVICE(0x43F0, 0x1030, iwl9560_2ac_cfg_soc)}, | 776 | {IWL_PCI_DEVICE(0x43F0, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)}, |
| 775 | {IWL_PCI_DEVICE(0x43F0, 0x1210, iwl9260_2ac_cfg)}, | 777 | {IWL_PCI_DEVICE(0x43F0, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 776 | {IWL_PCI_DEVICE(0x43F0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)}, | 778 | {IWL_PCI_DEVICE(0x43F0, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 777 | {IWL_PCI_DEVICE(0x43F0, 0x1552, iwl9560_killer_2ac_cfg_soc)}, | 779 | {IWL_PCI_DEVICE(0x43F0, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 778 | {IWL_PCI_DEVICE(0x43F0, 0x2030, iwl9560_2ac_160_cfg_soc)}, | 780 | {IWL_PCI_DEVICE(0x43F0, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 779 | {IWL_PCI_DEVICE(0x43F0, 0x2034, iwl9560_2ac_160_cfg_soc)}, | 781 | {IWL_PCI_DEVICE(0x43F0, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 780 | {IWL_PCI_DEVICE(0x43F0, 0x4030, iwl9560_2ac_160_cfg_soc)}, | 782 | {IWL_PCI_DEVICE(0x43F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 781 | {IWL_PCI_DEVICE(0x43F0, 0x4034, iwl9560_2ac_160_cfg_soc)}, | 783 | {IWL_PCI_DEVICE(0x43F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 782 | {IWL_PCI_DEVICE(0x43F0, 0x40A4, iwl9462_2ac_cfg_soc)}, | 784 | |
| 783 | {IWL_PCI_DEVICE(0x43F0, 0x4234, iwl9560_2ac_cfg_soc)}, | ||
| 784 | {IWL_PCI_DEVICE(0x43F0, 0x42A4, iwl9462_2ac_cfg_soc)}, | ||
| 785 | {IWL_PCI_DEVICE(0x9DF0, 0x0000, iwl9460_2ac_cfg_soc)}, | 785 | {IWL_PCI_DEVICE(0x9DF0, 0x0000, iwl9460_2ac_cfg_soc)}, |
| 786 | {IWL_PCI_DEVICE(0x9DF0, 0x0010, iwl9460_2ac_cfg_soc)}, | 786 | {IWL_PCI_DEVICE(0x9DF0, 0x0010, iwl9460_2ac_cfg_soc)}, |
| 787 | {IWL_PCI_DEVICE(0x9DF0, 0x0030, iwl9560_2ac_160_cfg_soc)}, | 787 | {IWL_PCI_DEVICE(0x9DF0, 0x0030, iwl9560_2ac_160_cfg_soc)}, |
| @@ -821,34 +821,34 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 33 unmodified lines | |||
| 821 | {IWL_PCI_DEVICE(0x9DF0, 0x40A4, iwl9462_2ac_cfg_soc)}, | 821 | {IWL_PCI_DEVICE(0x9DF0, 0x40A4, iwl9462_2ac_cfg_soc)}, |
| 822 | {IWL_PCI_DEVICE(0x9DF0, 0x4234, iwl9560_2ac_cfg_soc)}, | 822 | {IWL_PCI_DEVICE(0x9DF0, 0x4234, iwl9560_2ac_cfg_soc)}, |
| 823 | {IWL_PCI_DEVICE(0x9DF0, 0x42A4, iwl9462_2ac_cfg_soc)}, | 823 | {IWL_PCI_DEVICE(0x9DF0, 0x42A4, iwl9462_2ac_cfg_soc)}, |
| 824 | {IWL_PCI_DEVICE(0xA0F0, 0x0030, iwl9560_2ac_160_cfg_soc)}, | 824 | |
| 825 | {IWL_PCI_DEVICE(0xA0F0, 0x0034, iwl9560_2ac_cfg_soc)}, | 825 | {IWL_PCI_DEVICE(0xA0F0, 0x0030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 826 | {IWL_PCI_DEVICE(0xA0F0, 0x0038, iwl9560_2ac_160_cfg_soc)}, | 826 | {IWL_PCI_DEVICE(0xA0F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 827 | {IWL_PCI_DEVICE(0xA0F0, 0x003C, iwl9560_2ac_160_cfg_soc)}, | 827 | {IWL_PCI_DEVICE(0xA0F0, 0x0038, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 828 | {IWL_PCI_DEVICE(0xA0F0, 0x0060, iwl9461_2ac_cfg_soc)}, | 828 | {IWL_PCI_DEVICE(0xA0F0, 0x003C, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 829 | {IWL_PCI_DEVICE(0xA0F0, 0x0064, iwl9461_2ac_cfg_soc)}, | 829 | {IWL_PCI_DEVICE(0xA0F0, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 830 | {IWL_PCI_DEVICE(0xA0F0, 0x00A0, iwl9462_2ac_cfg_soc)}, | 830 | {IWL_PCI_DEVICE(0xA0F0, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 831 | {IWL_PCI_DEVICE(0xA0F0, 0x00A4, iwl9462_2ac_cfg_soc)}, | 831 | {IWL_PCI_DEVICE(0xA0F0, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 832 | {IWL_PCI_DEVICE(0xA0F0, 0x0230, iwl9560_2ac_cfg_soc)}, | 832 | {IWL_PCI_DEVICE(0xA0F0, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 833 | {IWL_PCI_DEVICE(0xA0F0, 0x0234, iwl9560_2ac_cfg_soc)}, | 833 | {IWL_PCI_DEVICE(0xA0F0, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 834 | {IWL_PCI_DEVICE(0xA0F0, 0x0238, iwl9560_2ac_cfg_soc)}, | 834 | {IWL_PCI_DEVICE(0xA0F0, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 835 | {IWL_PCI_DEVICE(0xA0F0, 0x023C, iwl9560_2ac_cfg_soc)}, | 835 | {IWL_PCI_DEVICE(0xA0F0, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 836 | {IWL_PCI_DEVICE(0xA0F0, 0x0260, iwl9461_2ac_cfg_soc)}, | 836 | {IWL_PCI_DEVICE(0xA0F0, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 837 | {IWL_PCI_DEVICE(0xA0F0, 0x0264, iwl9461_2ac_cfg_soc)}, | 837 | {IWL_PCI_DEVICE(0xA0F0, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 838 | {IWL_PCI_DEVICE(0xA0F0, 0x02A0, iwl9462_2ac_cfg_soc)}, | 838 | {IWL_PCI_DEVICE(0xA0F0, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)}, |
| 839 | {IWL_PCI_DEVICE(0xA0F0, 0x02A4, iwl9462_2ac_cfg_soc)}, | 839 | {IWL_PCI_DEVICE(0xA0F0, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 840 | {IWL_PCI_DEVICE(0xA0F0, 0x1010, iwl9260_2ac_cfg)}, | 840 | {IWL_PCI_DEVICE(0xA0F0, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 841 | {IWL_PCI_DEVICE(0xA0F0, 0x1030, iwl9560_2ac_cfg_soc)}, | 841 | {IWL_PCI_DEVICE(0xA0F0, 0x1030, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 842 | {IWL_PCI_DEVICE(0xA0F0, 0x1210, iwl9260_2ac_cfg)}, | 842 | {IWL_PCI_DEVICE(0xA0F0, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)}, |
| 843 | {IWL_PCI_DEVICE(0xA0F0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)}, | 843 | {IWL_PCI_DEVICE(0xA0F0, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)}, |
| 844 | {IWL_PCI_DEVICE(0xA0F0, 0x1552, iwl9560_killer_2ac_cfg_soc)}, | 844 | {IWL_PCI_DEVICE(0xA0F0, 0x2030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 845 | {IWL_PCI_DEVICE(0xA0F0, 0x2030, iwl9560_2ac_160_cfg_soc)}, | 845 | {IWL_PCI_DEVICE(0xA0F0, 0x2034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 846 | {IWL_PCI_DEVICE(0xA0F0, 0x2034, iwl9560_2ac_160_cfg_soc)}, | 846 | {IWL_PCI_DEVICE(0xA0F0, 0x4030, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 847 | {IWL_PCI_DEVICE(0xA0F0, 0x4030, iwl9560_2ac_160_cfg_soc)}, | 847 | {IWL_PCI_DEVICE(0xA0F0, 0x4034, iwl9560_2ac_160_cfg_qu_b0_jf_b0)}, |
| 848 | {IWL_PCI_DEVICE(0xA0F0, 0x4034, iwl9560_2ac_160_cfg_soc)}, | 848 | {IWL_PCI_DEVICE(0xA0F0, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 849 | {IWL_PCI_DEVICE(0xA0F0, 0x40A4, iwl9462_2ac_cfg_soc)}, | 849 | {IWL_PCI_DEVICE(0xA0F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)}, |
| 850 | {IWL_PCI_DEVICE(0xA0F0, 0x4234, iwl9560_2ac_cfg_soc)}, | 850 | {IWL_PCI_DEVICE(0xA0F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)}, |
| 851 | {IWL_PCI_DEVICE(0xA0F0, 0x42A4, iwl9462_2ac_cfg_soc)}, | 851 | |
| 852 | {IWL_PCI_DEVICE(0xA370, 0x0030, iwl9560_2ac_160_cfg_soc)}, | 852 | {IWL_PCI_DEVICE(0xA370, 0x0030, iwl9560_2ac_160_cfg_soc)}, |
| 853 | {IWL_PCI_DEVICE(0xA370, 0x0034, iwl9560_2ac_cfg_soc)}, | 853 | {IWL_PCI_DEVICE(0xA370, 0x0034, iwl9560_2ac_cfg_soc)}, |
| 854 | {IWL_PCI_DEVICE(0xA370, 0x0038, iwl9560_2ac_160_cfg_soc)}, | 854 | {IWL_PCI_DEVICE(0xA370, 0x0038, iwl9560_2ac_160_cfg_soc)}, |
| @@ -3272,11 +3272,17 @@ static struct iwl_trans_dump_data · 3271 unmodified lines | |||
| 3272 | ptr = cmdq->write_ptr; | 3272 | ptr = cmdq->write_ptr; |
| 3273 | for (i = 0; i < cmdq->n_window; i++) { | 3273 | for (i = 0; i < cmdq->n_window; i++) { |
| 3274 | u8 idx = iwl_pcie_get_cmd_index(cmdq, ptr); | 3274 | u8 idx = iwl_pcie_get_cmd_index(cmdq, ptr); |
| 3275 | u8 tfdidx; | ||
| 3275 | u32 caplen, cmdlen; | 3276 | u32 caplen, cmdlen; |
| 3276 | 3277 | ||
| 3278 | if (trans->trans_cfg->use_tfh) | ||
| 3279 | tfdidx = idx; | ||
| 3280 | else | ||
| 3281 | tfdidx = ptr; | ||
| 3282 | |||
| 3277 | cmdlen = iwl_trans_pcie_get_cmdlen(trans, | 3283 | cmdlen = iwl_trans_pcie_get_cmdlen(trans, |
| 3278 | cmdq->tfds + | 3284 | (u8 *)cmdq->tfds + |
| 3279 | tfd_size * ptr); | 3285 | tfd_size * tfdidx); |
| 3280 | caplen = min_t(u32, TFD_MAX_PAYLOAD_SIZE, cmdlen); | 3286 | caplen = min_t(u32, TFD_MAX_PAYLOAD_SIZE, cmdlen); |
| 3281 | 3287 | ||
| 3282 | if (cmdlen) { | 3288 | if (cmdlen) { |
| @@ -3450,6 +3456,15 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 167 unmodified lines | |||
| 3450 | spin_lock_init(&trans_pcie->reg_lock); | 3456 | spin_lock_init(&trans_pcie->reg_lock); |
| 3451 | mutex_init(&trans_pcie->mutex); | 3457 | mutex_init(&trans_pcie->mutex); |
| 3452 | init_waitqueue_head(&trans_pcie->ucode_write_waitq); | 3458 | init_waitqueue_head(&trans_pcie->ucode_write_waitq); |
| 3459 | |||
| 3460 | trans_pcie->rba.alloc_wq = alloc_workqueue("rb_allocator", | ||
| 3461 | WQ_HIGHPRI | WQ_UNBOUND, 1); | ||
| 3462 | if (!trans_pcie->rba.alloc_wq) { | ||
| 3463 | ret = -ENOMEM; | ||
| 3464 | goto out_free_trans; | ||
| 3465 | } | ||
| 3466 | INIT_WORK(&trans_pcie->rba.rx_alloc, iwl_pcie_rx_allocator_work); | ||
| 3467 | |||
| 3453 | trans_pcie->tso_hdr_page = alloc_percpu(struct iwl_tso_hdr_page); | 3468 | trans_pcie->tso_hdr_page = alloc_percpu(struct iwl_tso_hdr_page); |
| 3454 | if (!trans_pcie->tso_hdr_page) { | 3469 | if (!trans_pcie->tso_hdr_page) { |
| 3455 | ret = -ENOMEM; | 3470 | ret = -ENOMEM; |
| @@ -3584,10 +3599,6 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 128 unmodified lines | |||
| 3584 | trans_pcie->inta_mask = CSR_INI_SET_MASK; | 3599 | trans_pcie->inta_mask = CSR_INI_SET_MASK; |
| 3585 | } | 3600 | } |
| 3586 | 3601 | ||
| 3587 | trans_pcie->rba.alloc_wq = alloc_workqueue("rb_allocator", | ||
| 3588 | WQ_HIGHPRI | WQ_UNBOUND, 1); | ||
| 3589 | INIT_WORK(&trans_pcie->rba.rx_alloc, iwl_pcie_rx_allocator_work); | ||
| 3590 | |||
| 3591 | #ifdef CONFIG_IWLWIFI_DEBUGFS | 3602 | #ifdef CONFIG_IWLWIFI_DEBUGFS |
| 3592 | trans_pcie->fw_mon_data.state = IWL_FW_MON_DBGFS_STATE_CLOSED; | 3603 | trans_pcie->fw_mon_data.state = IWL_FW_MON_DBGFS_STATE_CLOSED; |
| 3593 | mutex_init(&trans_pcie->fw_mon_data.mutex); | 3604 | mutex_init(&trans_pcie->fw_mon_data.mutex); |
| @@ -3599,6 +3610,8 @@ out_free_ict: · 5 unmodified lines | |||
| 3599 | iwl_pcie_free_ict(trans); | 3610 | iwl_pcie_free_ict(trans); |
| 3600 | out_no_pci: | 3611 | out_no_pci: |
| 3601 | free_percpu(trans_pcie->tso_hdr_page); | 3612 | free_percpu(trans_pcie->tso_hdr_page); |
| 3613 | destroy_workqueue(trans_pcie->rba.alloc_wq); | ||
| 3614 | out_free_trans: | ||
| 3602 | iwl_trans_free(trans); | 3615 | iwl_trans_free(trans); |
| 3603 | return ERR_PTR(ret); | 3616 | return ERR_PTR(ret); |
| 3604 | } | 3617 | } |
| @@ -1261,8 +1261,8 @@ static bool mac80211_hwsim_tx_frame_no_nl(struct ieee80211_hw *hw, · 1260 unmodified lines | |||
| 1261 | skb_orphan(skb); | 1261 | skb_orphan(skb); |
| 1262 | skb_dst_drop(skb); | 1262 | skb_dst_drop(skb); |
| 1263 | skb->mark = 0; | 1263 | skb->mark = 0; |
| 1264 | secpath_reset(skb); | 1264 | skb_ext_reset(skb); |
| 1265 | nf_reset(skb); | 1265 | nf_reset_ct(skb); |
| 1266 | 1266 | ||
| 1267 | /* | 1267 | /* |
| 1268 | * Get absolute mactime here so all HWs RX at the "same time", and | 1268 | * Get absolute mactime here so all HWs RX at the "same time", and |
| @@ -4026,7 +4026,7 @@ static int __init init_mac80211_hwsim(void) · 2757 unmodified lines | |||
| 4026 | err = dev_alloc_name(hwsim_mon, hwsim_mon->name); | 4026 | err = dev_alloc_name(hwsim_mon, hwsim_mon->name); |
| 4027 | if (err < 0) { | 4027 | if (err < 0) { |
| 4028 | rtnl_unlock(); | 4028 | rtnl_unlock(); |
| 4029 | goto out_free_radios; | 4029 | goto out_free_mon; |
| 4030 | } | 4030 | } |
| 4031 | 4031 | ||
| 4032 | err = register_netdevice(hwsim_mon); | 4032 | err = register_netdevice(hwsim_mon); |
| @@ -23,7 +23,6 @@ · 22 unmodified lines | |||
| 23 | #include <linux/leds.h> | 23 | #include <linux/leds.h> |
| 24 | #include <linux/mutex.h> | 24 | #include <linux/mutex.h> |
| 25 | #include <linux/etherdevice.h> | 25 | #include <linux/etherdevice.h> |
| 26 | #include <linux/input-polldev.h> | ||
| 27 | #include <linux/kfifo.h> | 26 | #include <linux/kfifo.h> |
| 28 | #include <linux/hrtimer.h> | 27 | #include <linux/hrtimer.h> |
| 29 | #include <linux/average.h> | 28 | #include <linux/average.h> |
| @@ -555,7 +555,7 @@ static ssize_t rt2x00debug_write_restart_hw(struct file *file, · 554 unmodified lines | |||
| 555 | { | 555 | { |
| 556 | struct rt2x00debug_intf *intf = file->private_data; | 556 | struct rt2x00debug_intf *intf = file->private_data; |
| 557 | struct rt2x00_dev *rt2x00dev = intf->rt2x00dev; | 557 | struct rt2x00_dev *rt2x00dev = intf->rt2x00dev; |
| 558 | static unsigned long last_reset; | 558 | static unsigned long last_reset = INITIAL_JIFFIES; |
| 559 | 559 | ||
| 560 | if (!rt2x00_has_cap_restart_hw(rt2x00dev)) | 560 | if (!rt2x00_has_cap_restart_hw(rt2x00dev)) |
| 561 | return -EOPNOTSUPP; | 561 | return -EOPNOTSUPP; |
| @@ -719,7 +719,6 @@ err_unmap: · 718 unmodified lines | |||
| 719 | xenvif_unmap_frontend_data_rings(queue); | 719 | xenvif_unmap_frontend_data_rings(queue); |
| 720 | netif_napi_del(&queue->napi); | 720 | netif_napi_del(&queue->napi); |
| 721 | err: | 721 | err: |
| 722 | module_put(THIS_MODULE); | ||
| 723 | return err; | 722 | return err; |
| 724 | } | 723 | } |
| 725 | 724 | ||
| @@ -887,9 +887,9 @@ static int xennet_set_skb_gso(struct sk_buff *skb, · 886 unmodified lines | |||
| 887 | return 0; | 887 | return 0; |
| 888 | } | 888 | } |
| 889 | 889 | ||
| 890 | static RING_IDX xennet_fill_frags(struct netfront_queue *queue, | 890 | static int xennet_fill_frags(struct netfront_queue *queue, |
| 891 | struct sk_buff *skb, | 891 | struct sk_buff *skb, |
| 892 | struct sk_buff_head *list) | 892 | struct sk_buff_head *list) |
| 893 | { | 893 | { |
| 894 | RING_IDX cons = queue->rx.rsp_cons; | 894 | RING_IDX cons = queue->rx.rsp_cons; |
| 895 | struct sk_buff *nskb; | 895 | struct sk_buff *nskb; |
| @@ -908,7 +908,7 @@ static RING_IDX xennet_fill_frags(struct netfront_queue *queue, · 12 unmodified lines | |||
| 908 | if (unlikely(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS)) { | 908 | if (unlikely(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS)) { |
| 909 | queue->rx.rsp_cons = ++cons + skb_queue_len(list); | 909 | queue->rx.rsp_cons = ++cons + skb_queue_len(list); |
| 910 | kfree_skb(nskb); | 910 | kfree_skb(nskb); |
| 911 | return ~0U; | 911 | return -ENOENT; |
| 912 | } | 912 | } |
| 913 | 913 | ||
| 914 | skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, | 914 | skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, |
| @@ -919,7 +919,9 @@ static RING_IDX xennet_fill_frags(struct netfront_queue *queue, · 4 unmodified lines | |||
| 919 | kfree_skb(nskb); | 919 | kfree_skb(nskb); |
| 920 | } | 920 | } |
| 921 | 921 | ||
| 922 | return cons; | 922 | queue->rx.rsp_cons = cons; |
| 923 | |||
| 924 | return 0; | ||
| 923 | } | 925 | } |
| 924 | 926 | ||
| 925 | static int checksum_setup(struct net_device *dev, struct sk_buff *skb) | 927 | static int checksum_setup(struct net_device *dev, struct sk_buff *skb) |
| @@ -1045,8 +1047,7 @@ err: · 119 unmodified lines | |||
| 1045 | skb->data_len = rx->status; | 1047 | skb->data_len = rx->status; |
| 1046 | skb->len += rx->status; | 1048 | skb->len += rx->status; |
| 1047 | 1049 | ||
| 1048 | i = xennet_fill_frags(queue, skb, &tmpq); | 1050 | if (unlikely(xennet_fill_frags(queue, skb, &tmpq))) |
| 1049 | if (unlikely(i == ~0U)) | ||
| 1050 | goto err; | 1051 | goto err; |
| 1051 | 1052 | ||
| 1052 | if (rx->flags & XEN_NETRXF_csum_blank) | 1053 | if (rx->flags & XEN_NETRXF_csum_blank) |
| @@ -1056,7 +1057,7 @@ err: · 3 unmodified lines | |||
| 1056 | 1057 | ||
| 1057 | __skb_queue_tail(&rxq, skb); | 1058 | __skb_queue_tail(&rxq, skb); |
| 1058 | 1059 | ||
| 1059 | queue->rx.rsp_cons = ++i; | 1060 | i = ++queue->rx.rsp_cons; |
| 1060 | work_done++; | 1061 | work_done++; |
| 1061 | } | 1062 | } |
| 1062 | 1063 | ||
| @@ -547,18 +547,25 @@ static int pn533_usb_probe(struct usb_interface *interface, · 546 unmodified lines | |||
| 547 | 547 | ||
| 548 | rc = pn533_finalize_setup(priv); | 548 | rc = pn533_finalize_setup(priv); |
| 549 | if (rc) | 549 | if (rc) |
| 550 | goto error; | 550 | goto err_deregister; |
| 551 | 551 | ||
| 552 | usb_set_intfdata(interface, phy); | 552 | usb_set_intfdata(interface, phy); |
| 553 | 553 | ||
| 554 | return 0; | 554 | return 0; |
| 555 | 555 | ||
| 556 | err_deregister: | ||
| 557 | pn533_unregister_device(phy->priv); | ||
| 556 | error: | 558 | error: |
| 559 | usb_kill_urb(phy->in_urb); | ||
| 560 | usb_kill_urb(phy->out_urb); | ||
| 561 | usb_kill_urb(phy->ack_urb); | ||
| 562 | |||
| 557 | usb_free_urb(phy->in_urb); | 563 | usb_free_urb(phy->in_urb); |
| 558 | usb_free_urb(phy->out_urb); | 564 | usb_free_urb(phy->out_urb); |
| 559 | usb_free_urb(phy->ack_urb); | 565 | usb_free_urb(phy->ack_urb); |
| 560 | usb_put_dev(phy->udev); | 566 | usb_put_dev(phy->udev); |
| 561 | kfree(in_buf); | 567 | kfree(in_buf); |
| 568 | kfree(phy->ack_buffer); | ||
| 562 | 569 | ||
| 563 | return rc; | 570 | return rc; |
| 564 | } | 571 | } |
| @@ -102,10 +102,13 @@ static void nvme_set_queue_dying(struct nvme_ns *ns) · 101 unmodified lines | |||
| 102 | */ | 102 | */ |
| 103 | if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags)) | 103 | if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags)) |
| 104 | return; | 104 | return; |
| 105 | revalidate_disk(ns->disk); | ||
| 106 | blk_set_queue_dying(ns->queue); | 105 | blk_set_queue_dying(ns->queue); |
| 107 | /* Forcibly unquiesce queues to avoid blocking dispatch */ | 106 | /* Forcibly unquiesce queues to avoid blocking dispatch */ |
| 108 | blk_mq_unquiesce_queue(ns->queue); | 107 | blk_mq_unquiesce_queue(ns->queue); |
| 108 | /* | ||
| 109 | * Revalidate after unblocking dispatchers that may be holding bd_butex | ||
| 110 | */ | ||
| 111 | revalidate_disk(ns->disk); | ||
| 109 | } | 112 | } |
| 110 | 113 | ||
| 111 | static void nvme_queue_scan(struct nvme_ctrl *ctrl) | 114 | static void nvme_queue_scan(struct nvme_ctrl *ctrl) |
| @@ -113,10 +116,26 @@ static void nvme_queue_scan(struct nvme_ctrl *ctrl) · 1 unmodified line | |||
| 113 | /* | 116 | /* |
| 114 | * Only new queue scan work when admin and IO queues are both alive | 117 | * Only new queue scan work when admin and IO queues are both alive |
| 115 | */ | 118 | */ |
| 116 | if (ctrl->state == NVME_CTRL_LIVE) | 119 | if (ctrl->state == NVME_CTRL_LIVE && ctrl->tagset) |
| 117 | queue_work(nvme_wq, &ctrl->scan_work); | 120 | queue_work(nvme_wq, &ctrl->scan_work); |
| 118 | } | 121 | } |
| 119 | 122 | ||
| 123 | /* | ||
| 124 | * Use this function to proceed with scheduling reset_work for a controller | ||
| 125 | * that had previously been set to the resetting state. This is intended for | ||
| 126 | * code paths that can't be interrupted by other reset attempts. A hot removal | ||
| 127 | * may prevent this from succeeding. | ||
| 128 | */ | ||
| 129 | int nvme_try_sched_reset(struct nvme_ctrl *ctrl) | ||
| 130 | { | ||
| 131 | if (ctrl->state != NVME_CTRL_RESETTING) | ||
| 132 | return -EBUSY; | ||
| 133 | if (!queue_work(nvme_reset_wq, &ctrl->reset_work)) | ||
| 134 | return -EBUSY; | ||
| 135 | return 0; | ||
| 136 | } | ||
| 137 | EXPORT_SYMBOL_GPL(nvme_try_sched_reset); | ||
| 138 | |||
| 120 | int nvme_reset_ctrl(struct nvme_ctrl *ctrl) | 139 | int nvme_reset_ctrl(struct nvme_ctrl *ctrl) |
| 121 | { | 140 | { |
| 122 | if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) | 141 | if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) |
| @@ -134,8 +153,7 @@ int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl) · 11 unmodified lines | |||
| 134 | ret = nvme_reset_ctrl(ctrl); | 153 | ret = nvme_reset_ctrl(ctrl); |
| 135 | if (!ret) { | 154 | if (!ret) { |
| 136 | flush_work(&ctrl->reset_work); | 155 | flush_work(&ctrl->reset_work); |
| 137 | if (ctrl->state != NVME_CTRL_LIVE && | 156 | if (ctrl->state != NVME_CTRL_LIVE) |
| 138 | ctrl->state != NVME_CTRL_ADMIN_ONLY) | ||
| 139 | ret = -ENETRESET; | 157 | ret = -ENETRESET; |
| 140 | } | 158 | } |
| 141 | 159 | ||
| @@ -312,15 +330,6 @@ bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, · 170 unmodified lines | |||
| 312 | 330 | ||
| 313 | old_state = ctrl->state; | 331 | old_state = ctrl->state; |
| 314 | switch (new_state) { | 332 | switch (new_state) { |
| 315 | case NVME_CTRL_ADMIN_ONLY: | ||
| 316 | switch (old_state) { | ||
| 317 | case NVME_CTRL_CONNECTING: | ||
| 318 | changed = true; | ||
| 319 | /* FALLTHRU */ | ||
| 320 | default: | ||
| 321 | break; | ||
| 322 | } | ||
| 323 | break; | ||
| 324 | case NVME_CTRL_LIVE: | 333 | case NVME_CTRL_LIVE: |
| 325 | switch (old_state) { | 334 | switch (old_state) { |
| 326 | case NVME_CTRL_NEW: | 335 | case NVME_CTRL_NEW: |
| @@ -336,7 +345,6 @@ bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, · 9 unmodified lines | |||
| 336 | switch (old_state) { | 345 | switch (old_state) { |
| 337 | case NVME_CTRL_NEW: | 346 | case NVME_CTRL_NEW: |
| 338 | case NVME_CTRL_LIVE: | 347 | case NVME_CTRL_LIVE: |
| 339 | case NVME_CTRL_ADMIN_ONLY: | ||
| 340 | changed = true; | 348 | changed = true; |
| 341 | /* FALLTHRU */ | 349 | /* FALLTHRU */ |
| 342 | default: | 350 | default: |
| @@ -356,7 +364,6 @@ bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, · 13 unmodified lines | |||
| 356 | case NVME_CTRL_DELETING: | 364 | case NVME_CTRL_DELETING: |
| 357 | switch (old_state) { | 365 | switch (old_state) { |
| 358 | case NVME_CTRL_LIVE: | 366 | case NVME_CTRL_LIVE: |
| 359 | case NVME_CTRL_ADMIN_ONLY: | ||
| 360 | case NVME_CTRL_RESETTING: | 367 | case NVME_CTRL_RESETTING: |
| 361 | case NVME_CTRL_CONNECTING: | 368 | case NVME_CTRL_CONNECTING: |
| 362 | changed = true; | 369 | changed = true; |
| @@ -378,8 +385,10 @@ bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, · 15 unmodified lines | |||
| 378 | break; | 385 | break; |
| 379 | } | 386 | } |
| 380 | 387 | ||
| 381 | if (changed) | 388 | if (changed) { |
| 382 | ctrl->state = new_state; | 389 | ctrl->state = new_state; |
| 390 | wake_up_all(&ctrl->state_wq); | ||
| 391 | } | ||
| 383 | 392 | ||
| 384 | spin_unlock_irqrestore(&ctrl->lock, flags); | 393 | spin_unlock_irqrestore(&ctrl->lock, flags); |
| 385 | if (changed && ctrl->state == NVME_CTRL_LIVE) | 394 | if (changed && ctrl->state == NVME_CTRL_LIVE) |
| @@ -388,6 +397,39 @@ bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, · 2 unmodified lines | |||
| 388 | } | 397 | } |
| 389 | EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); | 398 | EXPORT_SYMBOL_GPL(nvme_change_ctrl_state); |
| 390 | 399 | ||
| 400 | /* | ||
| 401 | * Returns true for sink states that can't ever transition back to live. | ||
| 402 | */ | ||
| 403 | static bool nvme_state_terminal(struct nvme_ctrl *ctrl) | ||
| 404 | { | ||
| 405 | switch (ctrl->state) { | ||
| 406 | case NVME_CTRL_NEW: | ||
| 407 | case NVME_CTRL_LIVE: | ||
| 408 | case NVME_CTRL_RESETTING: | ||
| 409 | case NVME_CTRL_CONNECTING: | ||
| 410 | return false; | ||
| 411 | case NVME_CTRL_DELETING: | ||
| 412 | case NVME_CTRL_DEAD: | ||
| 413 | return true; | ||
| 414 | default: | ||
| 415 | WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state); | ||
| 416 | return true; | ||
| 417 | } | ||
| 418 | } | ||
| 419 | |||
| 420 | /* | ||
| 421 | * Waits for the controller state to be resetting, or returns false if it is | ||
| 422 | * not possible to ever transition to that state. | ||
| 423 | */ | ||
| 424 | bool nvme_wait_reset(struct nvme_ctrl *ctrl) | ||
| 425 | { | ||
| 426 | wait_event(ctrl->state_wq, | ||
| 427 | nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) || | ||
| 428 | nvme_state_terminal(ctrl)); | ||
| 429 | return ctrl->state == NVME_CTRL_RESETTING; | ||
| 430 | } | ||
| 431 | EXPORT_SYMBOL_GPL(nvme_wait_reset); | ||
| 432 | |||
| 391 | static void nvme_free_ns_head(struct kref *ref) | 433 | static void nvme_free_ns_head(struct kref *ref) |
| 392 | { | 434 | { |
| 393 | struct nvme_ns_head *head = | 435 | struct nvme_ns_head *head = |
| @@ -847,7 +889,7 @@ out: · 453 unmodified lines | |||
| 847 | static int nvme_submit_user_cmd(struct request_queue *q, | 889 | static int nvme_submit_user_cmd(struct request_queue *q, |
| 848 | struct nvme_command *cmd, void __user *ubuffer, | 890 | struct nvme_command *cmd, void __user *ubuffer, |
| 849 | unsigned bufflen, void __user *meta_buffer, unsigned meta_len, | 891 | unsigned bufflen, void __user *meta_buffer, unsigned meta_len, |
| 850 | u32 meta_seed, u32 *result, unsigned timeout) | 892 | u32 meta_seed, u64 *result, unsigned timeout) |
| 851 | { | 893 | { |
| 852 | bool write = nvme_is_write(cmd); | 894 | bool write = nvme_is_write(cmd); |
| 853 | struct nvme_ns *ns = q->queuedata; | 895 | struct nvme_ns *ns = q->queuedata; |
| @@ -888,7 +930,7 @@ static int nvme_submit_user_cmd(struct request_queue *q, · 34 unmodified lines | |||
| 888 | else | 930 | else |
| 889 | ret = nvme_req(req)->status; | 931 | ret = nvme_req(req)->status; |
| 890 | if (result) | 932 | if (result) |
| 891 | *result = le32_to_cpu(nvme_req(req)->result.u32); | 933 | *result = le64_to_cpu(nvme_req(req)->result.u64); |
| 892 | if (meta && !ret && !write) { | 934 | if (meta && !ret && !write) { |
| 893 | if (copy_to_user(meta_buffer, meta, meta_len)) | 935 | if (copy_to_user(meta_buffer, meta, meta_len)) |
| 894 | ret = -EFAULT; | 936 | ret = -EFAULT; |
| @@ -1303,8 +1345,6 @@ static void nvme_update_formats(struct nvme_ctrl *ctrl) · 408 unmodified lines | |||
| 1303 | if (ns->disk && nvme_revalidate_disk(ns->disk)) | 1345 | if (ns->disk && nvme_revalidate_disk(ns->disk)) |
| 1304 | nvme_set_queue_dying(ns); | 1346 | nvme_set_queue_dying(ns); |
| 1305 | up_read(&ctrl->namespaces_rwsem); | 1347 | up_read(&ctrl->namespaces_rwsem); |
| 1306 | |||
| 1307 | nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL); | ||
| 1308 | } | 1348 | } |
| 1309 | 1349 | ||
| 1310 | static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects) | 1350 | static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects) |
| @@ -1320,6 +1360,7 @@ static void nvme_passthru_end(struct nvme_ctrl *ctrl, u32 effects) · 9 unmodified lines | |||
| 1320 | nvme_unfreeze(ctrl); | 1360 | nvme_unfreeze(ctrl); |
| 1321 | nvme_mpath_unfreeze(ctrl->subsys); | 1361 | nvme_mpath_unfreeze(ctrl->subsys); |
| 1322 | mutex_unlock(&ctrl->subsys->lock); | 1362 | mutex_unlock(&ctrl->subsys->lock); |
| 1363 | nvme_remove_invalid_namespaces(ctrl, NVME_NSID_ALL); | ||
| 1323 | mutex_unlock(&ctrl->scan_lock); | 1364 | mutex_unlock(&ctrl->scan_lock); |
| 1324 | } | 1365 | } |
| 1325 | if (effects & NVME_CMD_EFFECTS_CCC) | 1366 | if (effects & NVME_CMD_EFFECTS_CCC) |
| @@ -1335,6 +1376,54 @@ static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns, · 9 unmodified lines | |||
| 1335 | struct nvme_command c; | 1376 | struct nvme_command c; |
| 1336 | unsigned timeout = 0; | 1377 | unsigned timeout = 0; |
| 1337 | u32 effects; | 1378 | u32 effects; |
| 1379 | u64 result; | ||
| 1380 | int status; | ||
| 1381 | |||
| 1382 | if (!capable(CAP_SYS_ADMIN)) | ||
| 1383 | return -EACCES; | ||
| 1384 | if (copy_from_user(&cmd, ucmd, sizeof(cmd))) | ||
| 1385 | return -EFAULT; | ||
| 1386 | if (cmd.flags) | ||
| 1387 | return -EINVAL; | ||
| 1388 | |||
| 1389 | memset(&c, 0, sizeof(c)); | ||
| 1390 | c.common.opcode = cmd.opcode; | ||
| 1391 | c.common.flags = cmd.flags; | ||
| 1392 | c.common.nsid = cpu_to_le32(cmd.nsid); | ||
| 1393 | c.common.cdw2[0] = cpu_to_le32(cmd.cdw2); | ||
| 1394 | c.common.cdw2[1] = cpu_to_le32(cmd.cdw3); | ||
| 1395 | c.common.cdw10 = cpu_to_le32(cmd.cdw10); | ||
| 1396 | c.common.cdw11 = cpu_to_le32(cmd.cdw11); | ||
| 1397 | c.common.cdw12 = cpu_to_le32(cmd.cdw12); | ||
| 1398 | c.common.cdw13 = cpu_to_le32(cmd.cdw13); | ||
| 1399 | c.common.cdw14 = cpu_to_le32(cmd.cdw14); | ||
| 1400 | c.common.cdw15 = cpu_to_le32(cmd.cdw15); | ||
| 1401 | |||
| 1402 | if (cmd.timeout_ms) | ||
| 1403 | timeout = msecs_to_jiffies(cmd.timeout_ms); | ||
| 1404 | |||
| 1405 | effects = nvme_passthru_start(ctrl, ns, cmd.opcode); | ||
| 1406 | status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c, | ||
| 1407 | (void __user *)(uintptr_t)cmd.addr, cmd.data_len, | ||
| 1408 | (void __user *)(uintptr_t)cmd.metadata, | ||
| 1409 | cmd.metadata_len, 0, &result, timeout); | ||
| 1410 | nvme_passthru_end(ctrl, effects); | ||
| 1411 | |||
| 1412 | if (status >= 0) { | ||
| 1413 | if (put_user(result, &ucmd->result)) | ||
| 1414 | return -EFAULT; | ||
| 1415 | } | ||
| 1416 | |||
| 1417 | return status; | ||
| 1418 | } | ||
| 1419 | |||
| 1420 | static int nvme_user_cmd64(struct nvme_ctrl *ctrl, struct nvme_ns *ns, | ||
| 1421 | struct nvme_passthru_cmd64 __user *ucmd) | ||
| 1422 | { | ||
| 1423 | struct nvme_passthru_cmd64 cmd; | ||
| 1424 | struct nvme_command c; | ||
| 1425 | unsigned timeout = 0; | ||
| 1426 | u32 effects; | ||
| 1338 | int status; | 1427 | int status; |
| 1339 | 1428 | ||
| 1340 | if (!capable(CAP_SYS_ADMIN)) | 1429 | if (!capable(CAP_SYS_ADMIN)) |
| @@ -1405,6 +1494,41 @@ static void nvme_put_ns_from_disk(struct nvme_ns_head *head, int idx) · 64 unmodified lines | |||
| 1405 | srcu_read_unlock(&head->srcu, idx); | 1494 | srcu_read_unlock(&head->srcu, idx); |
| 1406 | } | 1495 | } |
| 1407 | 1496 | ||
| 1497 | static bool is_ctrl_ioctl(unsigned int cmd) | ||
| 1498 | { | ||
| 1499 | if (cmd == NVME_IOCTL_ADMIN_CMD || cmd == NVME_IOCTL_ADMIN64_CMD) | ||
| 1500 | return true; | ||
| 1501 | if (is_sed_ioctl(cmd)) | ||
| 1502 | return true; | ||
| 1503 | return false; | ||
| 1504 | } | ||
| 1505 | |||
| 1506 | static int nvme_handle_ctrl_ioctl(struct nvme_ns *ns, unsigned int cmd, | ||
| 1507 | void __user *argp, | ||
| 1508 | struct nvme_ns_head *head, | ||
| 1509 | int srcu_idx) | ||
| 1510 | { | ||
| 1511 | struct nvme_ctrl *ctrl = ns->ctrl; | ||
| 1512 | int ret; | ||
| 1513 | |||
| 1514 | nvme_get_ctrl(ns->ctrl); | ||
| 1515 | nvme_put_ns_from_disk(head, srcu_idx); | ||
| 1516 | |||
| 1517 | switch (cmd) { | ||
| 1518 | case NVME_IOCTL_ADMIN_CMD: | ||
| 1519 | ret = nvme_user_cmd(ctrl, NULL, argp); | ||
| 1520 | break; | ||
| 1521 | case NVME_IOCTL_ADMIN64_CMD: | ||
| 1522 | ret = nvme_user_cmd64(ctrl, NULL, argp); | ||
| 1523 | break; | ||
| 1524 | default: | ||
| 1525 | ret = sed_ioctl(ctrl->opal_dev, cmd, argp); | ||
| 1526 | break; | ||
| 1527 | } | ||
| 1528 | nvme_put_ctrl(ctrl); | ||
| 1529 | return ret; | ||
| 1530 | } | ||
| 1531 | |||
| 1408 | static int nvme_ioctl(struct block_device *bdev, fmode_t mode, | 1532 | static int nvme_ioctl(struct block_device *bdev, fmode_t mode, |
| 1409 | unsigned int cmd, unsigned long arg) | 1533 | unsigned int cmd, unsigned long arg) |
| 1410 | { | 1534 | { |
| @@ -1422,20 +1546,8 @@ static int nvme_ioctl(struct block_device *bdev, fmode_t mode, · 11 unmodified lines | |||
| 1422 | * seperately and drop the ns SRCU reference early. This avoids a | 1546 | * seperately and drop the ns SRCU reference early. This avoids a |
| 1423 | * deadlock when deleting namespaces using the passthrough interface. | 1547 | * deadlock when deleting namespaces using the passthrough interface. |
| 1424 | */ | 1548 | */ |
| 1425 | if (cmd == NVME_IOCTL_ADMIN_CMD || is_sed_ioctl(cmd)) { | 1549 | if (is_ctrl_ioctl(cmd)) |
| 1426 | struct nvme_ctrl *ctrl = ns->ctrl; | 1550 | return nvme_handle_ctrl_ioctl(ns, cmd, argp, head, srcu_idx); |
| 1427 | |||
| 1428 | nvme_get_ctrl(ns->ctrl); | ||
| 1429 | nvme_put_ns_from_disk(head, srcu_idx); | ||
| 1430 | |||
| 1431 | if (cmd == NVME_IOCTL_ADMIN_CMD) | ||
| 1432 | ret = nvme_user_cmd(ctrl, NULL, argp); | ||
| 1433 | else | ||
| 1434 | ret = sed_ioctl(ctrl->opal_dev, cmd, argp); | ||
| 1435 | |||
| 1436 | nvme_put_ctrl(ctrl); | ||
| 1437 | return ret; | ||
| 1438 | } | ||
| 1439 | 1551 | ||
| 1440 | switch (cmd) { | 1552 | switch (cmd) { |
| 1441 | case NVME_IOCTL_ID: | 1553 | case NVME_IOCTL_ID: |
| @@ -1448,6 +1560,9 @@ static int nvme_ioctl(struct block_device *bdev, fmode_t mode, · 6 unmodified lines | |||
| 1448 | case NVME_IOCTL_SUBMIT_IO: | 1560 | case NVME_IOCTL_SUBMIT_IO: |
| 1449 | ret = nvme_submit_io(ns, argp); | 1561 | ret = nvme_submit_io(ns, argp); |
| 1450 | break; | 1562 | break; |
| 1563 | case NVME_IOCTL_IO64_CMD: | ||
| 1564 | ret = nvme_user_cmd64(ns->ctrl, ns, argp); | ||
| 1565 | break; | ||
| 1451 | default: | 1566 | default: |
| 1452 | if (ns->ndev) | 1567 | if (ns->ndev) |
| 1453 | ret = nvme_nvm_ioctl(ns, cmd, arg); | 1568 | ret = nvme_nvm_ioctl(ns, cmd, arg); |
| @@ -2289,6 +2404,16 @@ static const struct nvme_core_quirk_entry core_quirks[] = { · 835 unmodified lines | |||
| 2289 | .vid = 0x14a4, | 2404 | .vid = 0x14a4, |
| 2290 | .fr = "22301111", | 2405 | .fr = "22301111", |
| 2291 | .quirks = NVME_QUIRK_SIMPLE_SUSPEND, | 2406 | .quirks = NVME_QUIRK_SIMPLE_SUSPEND, |
| 2407 | }, | ||
| 2408 | { | ||
| 2409 | /* | ||
| 2410 | * This Kingston E8FK11.T firmware version has no interrupt | ||
| 2411 | * after resume with actions related to suspend to idle | ||
| 2412 | * https://bugzilla.kernel.org/show_bug.cgi?id=204887 | ||
| 2413 | */ | ||
| 2414 | .vid = 0x2646, | ||
| 2415 | .fr = "E8FK11.T", | ||
| 2416 | .quirks = NVME_QUIRK_SIMPLE_SUSPEND, | ||
| 2292 | } | 2417 | } |
| 2293 | }; | 2418 | }; |
| 2294 | 2419 | ||
| @@ -2540,8 +2665,9 @@ static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id) · 245 unmodified lines | |||
| 2540 | list_add_tail(&subsys->entry, &nvme_subsystems); | 2665 | list_add_tail(&subsys->entry, &nvme_subsystems); |
| 2541 | } | 2666 | } |
| 2542 | 2667 | ||
| 2543 | if (sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, | 2668 | ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj, |
| 2544 | dev_name(ctrl->device))) { | 2669 | dev_name(ctrl->device)); |
| 2670 | if (ret) { | ||
| 2545 | dev_err(ctrl->device, | 2671 | dev_err(ctrl->device, |
| 2546 | "failed to create sysfs link from subsystem.\n"); | 2672 | "failed to create sysfs link from subsystem.\n"); |
| 2547 | goto out_put_subsystem; | 2673 | goto out_put_subsystem; |
| @@ -2786,7 +2912,6 @@ static int nvme_dev_open(struct inode *inode, struct file *file) · 238 unmodified lines | |||
| 2786 | 2912 | ||
| 2787 | switch (ctrl->state) { | 2913 | switch (ctrl->state) { |
| 2788 | case NVME_CTRL_LIVE: | 2914 | case NVME_CTRL_LIVE: |
| 2789 | case NVME_CTRL_ADMIN_ONLY: | ||
| 2790 | break; | 2915 | break; |
| 2791 | default: | 2916 | default: |
| 2792 | return -EWOULDBLOCK; | 2917 | return -EWOULDBLOCK; |
| @@ -2838,6 +2963,8 @@ static long nvme_dev_ioctl(struct file *file, unsigned int cmd, · 45 unmodified lines | |||
| 2838 | switch (cmd) { | 2963 | switch (cmd) { |
| 2839 | case NVME_IOCTL_ADMIN_CMD: | 2964 | case NVME_IOCTL_ADMIN_CMD: |
| 2840 | return nvme_user_cmd(ctrl, NULL, argp); | 2965 | return nvme_user_cmd(ctrl, NULL, argp); |
| 2966 | case NVME_IOCTL_ADMIN64_CMD: | ||
| 2967 | return nvme_user_cmd64(ctrl, NULL, argp); | ||
| 2841 | case NVME_IOCTL_IO_CMD: | 2968 | case NVME_IOCTL_IO_CMD: |
| 2842 | return nvme_dev_user_cmd(ctrl, argp); | 2969 | return nvme_dev_user_cmd(ctrl, argp); |
| 2843 | case NVME_IOCTL_RESET: | 2970 | case NVME_IOCTL_RESET: |
| @@ -3045,6 +3172,8 @@ static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL); · 201 unmodified lines | |||
| 3045 | 3172 | ||
| 3046 | nvme_show_int_function(cntlid); | 3173 | nvme_show_int_function(cntlid); |
| 3047 | nvme_show_int_function(numa_node); | 3174 | nvme_show_int_function(numa_node); |
| 3175 | nvme_show_int_function(queue_count); | ||
| 3176 | nvme_show_int_function(sqsize); | ||
| 3048 | 3177 | ||
| 3049 | static ssize_t nvme_sysfs_delete(struct device *dev, | 3178 | static ssize_t nvme_sysfs_delete(struct device *dev, |
| 3050 | struct device_attribute *attr, const char *buf, | 3179 | struct device_attribute *attr, const char *buf, |
| @@ -3076,7 +3205,6 @@ static ssize_t nvme_sysfs_show_state(struct device *dev, · 25 unmodified lines | |||
| 3076 | static const char *const state_name[] = { | 3205 | static const char *const state_name[] = { |
| 3077 | [NVME_CTRL_NEW] = "new", | 3206 | [NVME_CTRL_NEW] = "new", |
| 3078 | [NVME_CTRL_LIVE] = "live", | 3207 | [NVME_CTRL_LIVE] = "live", |
| 3079 | [NVME_CTRL_ADMIN_ONLY] = "only-admin", | ||
| 3080 | [NVME_CTRL_RESETTING] = "resetting", | 3208 | [NVME_CTRL_RESETTING] = "resetting", |
| 3081 | [NVME_CTRL_CONNECTING] = "connecting", | 3209 | [NVME_CTRL_CONNECTING] = "connecting", |
| 3082 | [NVME_CTRL_DELETING] = "deleting", | 3210 | [NVME_CTRL_DELETING] = "deleting", |
| @@ -3125,6 +3253,8 @@ static struct attribute *nvme_dev_attrs[] = { · 42 unmodified lines | |||
| 3125 | &dev_attr_address.attr, | 3253 | &dev_attr_address.attr, |
| 3126 | &dev_attr_state.attr, | 3254 | &dev_attr_state.attr, |
| 3127 | &dev_attr_numa_node.attr, | 3255 | &dev_attr_numa_node.attr, |
| 3256 | &dev_attr_queue_count.attr, | ||
| 3257 | &dev_attr_sqsize.attr, | ||
| 3128 | NULL | 3258 | NULL |
| 3129 | }; | 3259 | }; |
| 3130 | 3260 | ||
| @@ -3585,11 +3715,10 @@ static void nvme_scan_work(struct work_struct *work) · 454 unmodified lines | |||
| 3585 | struct nvme_id_ctrl *id; | 3715 | struct nvme_id_ctrl *id; |
| 3586 | unsigned nn; | 3716 | unsigned nn; |
| 3587 | 3717 | ||
| 3588 | if (ctrl->state != NVME_CTRL_LIVE) | 3718 | /* No tagset on a live ctrl means IO queues could not created */ |
| 3719 | if (ctrl->state != NVME_CTRL_LIVE || !ctrl->tagset) | ||
| 3589 | return; | 3720 | return; |
| 3590 | 3721 | ||
| 3591 | WARN_ON_ONCE(!ctrl->tagset); | ||
| 3592 | |||
| 3593 | if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { | 3722 | if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) { |
| 3594 | dev_info(ctrl->device, "rescanning namespaces.\n"); | 3723 | dev_info(ctrl->device, "rescanning namespaces.\n"); |
| 3595 | nvme_clear_changed_ns_log(ctrl); | 3724 | nvme_clear_changed_ns_log(ctrl); |
| @@ -3750,13 +3879,13 @@ static void nvme_fw_act_work(struct work_struct *work) · 154 unmodified lines | |||
| 3750 | if (time_after(jiffies, fw_act_timeout)) { | 3879 | if (time_after(jiffies, fw_act_timeout)) { |
| 3751 | dev_warn(ctrl->device, | 3880 | dev_warn(ctrl->device, |
| 3752 | "Fw activation timeout, reset controller\n"); | 3881 | "Fw activation timeout, reset controller\n"); |
| 3753 | nvme_reset_ctrl(ctrl); | 3882 | nvme_try_sched_reset(ctrl); |
| 3754 | break; | 3883 | return; |
| 3755 | } | 3884 | } |
| 3756 | msleep(100); | 3885 | msleep(100); |
| 3757 | } | 3886 | } |
| 3758 | 3887 | ||
| 3759 | if (ctrl->state != NVME_CTRL_LIVE) | 3888 | if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE)) |
| 3760 | return; | 3889 | return; |
| 3761 | 3890 | ||
| 3762 | nvme_start_queues(ctrl); | 3891 | nvme_start_queues(ctrl); |
| @@ -3776,7 +3905,13 @@ static void nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result) · 13 unmodified lines | |||
| 3776 | nvme_queue_scan(ctrl); | 3905 | nvme_queue_scan(ctrl); |
| 3777 | break; | 3906 | break; |
| 3778 | case NVME_AER_NOTICE_FW_ACT_STARTING: | 3907 | case NVME_AER_NOTICE_FW_ACT_STARTING: |
| 3779 | queue_work(nvme_wq, &ctrl->fw_act_work); | 3908 | /* |
| 3909 | * We are (ab)using the RESETTING state to prevent subsequent | ||
| 3910 | * recovery actions from interfering with the controller's | ||
| 3911 | * firmware activation. | ||
| 3912 | */ | ||
| 3913 | if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) | ||
| 3914 | queue_work(nvme_wq, &ctrl->fw_act_work); | ||
| 3780 | break; | 3915 | break; |
| 3781 | #ifdef CONFIG_NVME_MULTIPATH | 3916 | #ifdef CONFIG_NVME_MULTIPATH |
| 3782 | case NVME_AER_NOTICE_ANA: | 3917 | case NVME_AER_NOTICE_ANA: |
| @@ -3899,6 +4034,7 @@ int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, · 116 unmodified lines | |||
| 3899 | INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); | 4034 | INIT_WORK(&ctrl->async_event_work, nvme_async_event_work); |
| 3900 | INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); | 4035 | INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work); |
| 3901 | INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); | 4036 | INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work); |
| 4037 | init_waitqueue_head(&ctrl->state_wq); | ||
| 3902 | 4038 | ||
| 3903 | INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); | 4039 | INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work); |
| 3904 | memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); | 4040 | memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd)); |
| @@ -182,8 +182,7 @@ bool nvmf_ip_options_match(struct nvme_ctrl *ctrl, · 181 unmodified lines | |||
| 182 | static inline bool nvmf_check_ready(struct nvme_ctrl *ctrl, struct request *rq, | 182 | static inline bool nvmf_check_ready(struct nvme_ctrl *ctrl, struct request *rq, |
| 183 | bool queue_live) | 183 | bool queue_live) |
| 184 | { | 184 | { |
| 185 | if (likely(ctrl->state == NVME_CTRL_LIVE || | 185 | if (likely(ctrl->state == NVME_CTRL_LIVE)) |
| 186 | ctrl->state == NVME_CTRL_ADMIN_ONLY)) | ||
| 187 | return true; | 186 | return true; |
| 188 | return __nvmf_check_ready(ctrl, rq, queue_live); | 187 | return __nvmf_check_ready(ctrl, rq, queue_live); |
| 189 | } | 188 | } |
| @@ -15,6 +15,7 @@ · 14 unmodified lines | |||
| 15 | #include <linux/sed-opal.h> | 15 | #include <linux/sed-opal.h> |
| 16 | #include <linux/fault-inject.h> | 16 | #include <linux/fault-inject.h> |
| 17 | #include <linux/rcupdate.h> | 17 | #include <linux/rcupdate.h> |
| 18 | #include <linux/wait.h> | ||
| 18 | 19 | ||
| 19 | #include <trace/events/block.h> | 20 | #include <trace/events/block.h> |
| 20 | 21 | ||
| @@ -161,7 +162,6 @@ static inline u16 nvme_req_qid(struct request *req) · 140 unmodified lines | |||
| 161 | enum nvme_ctrl_state { | 162 | enum nvme_ctrl_state { |
| 162 | NVME_CTRL_NEW, | 163 | NVME_CTRL_NEW, |
| 163 | NVME_CTRL_LIVE, | 164 | NVME_CTRL_LIVE, |
| 164 | NVME_CTRL_ADMIN_ONLY, /* Only admin queue live */ | ||
| 165 | NVME_CTRL_RESETTING, | 165 | NVME_CTRL_RESETTING, |
| 166 | NVME_CTRL_CONNECTING, | 166 | NVME_CTRL_CONNECTING, |
| 167 | NVME_CTRL_DELETING, | 167 | NVME_CTRL_DELETING, |
| @@ -199,6 +199,7 @@ struct nvme_ctrl { · 31 unmodified lines | |||
| 199 | struct cdev cdev; | 199 | struct cdev cdev; |
| 200 | struct work_struct reset_work; | 200 | struct work_struct reset_work; |
| 201 | struct work_struct delete_work; | 201 | struct work_struct delete_work; |
| 202 | wait_queue_head_t state_wq; | ||
| 202 | 203 | ||
| 203 | struct nvme_subsystem *subsys; | 204 | struct nvme_subsystem *subsys; |
| 204 | struct list_head subsys_entry; | 205 | struct list_head subsys_entry; |
| @@ -221,6 +222,7 @@ struct nvme_ctrl { · 16 unmodified lines | |||
| 221 | u16 oacs; | 222 | u16 oacs; |
| 222 | u16 nssa; | 223 | u16 nssa; |
| 223 | u16 nr_streams; | 224 | u16 nr_streams; |
| 225 | u16 sqsize; | ||
| 224 | u32 max_namespaces; | 226 | u32 max_namespaces; |
| 225 | atomic_t abort_limit; | 227 | atomic_t abort_limit; |
| 226 | u8 vwc; | 228 | u8 vwc; |
| @@ -269,7 +271,6 @@ struct nvme_ctrl { · 42 unmodified lines | |||
| 269 | u16 hmmaxd; | 271 | u16 hmmaxd; |
| 270 | 272 | ||
| 271 | /* Fabrics only */ | 273 | /* Fabrics only */ |
| 272 | u16 sqsize; | ||
| 273 | u32 ioccsz; | 274 | u32 ioccsz; |
| 274 | u32 iorcsz; | 275 | u32 iorcsz; |
| 275 | u16 icdoff; | 276 | u16 icdoff; |
| @@ -449,6 +450,7 @@ void nvme_complete_rq(struct request *req); · 173 unmodified lines | |||
| 449 | bool nvme_cancel_request(struct request *req, void *data, bool reserved); | 450 | bool nvme_cancel_request(struct request *req, void *data, bool reserved); |
| 450 | bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, | 451 | bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, |
| 451 | enum nvme_ctrl_state new_state); | 452 | enum nvme_ctrl_state new_state); |
| 453 | bool nvme_wait_reset(struct nvme_ctrl *ctrl); | ||
| 452 | int nvme_disable_ctrl(struct nvme_ctrl *ctrl); | 454 | int nvme_disable_ctrl(struct nvme_ctrl *ctrl); |
| 453 | int nvme_enable_ctrl(struct nvme_ctrl *ctrl); | 455 | int nvme_enable_ctrl(struct nvme_ctrl *ctrl); |
| 454 | int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); | 456 | int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); |
| @@ -499,6 +501,7 @@ int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); · 44 unmodified lines | |||
| 499 | void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); | 501 | void nvme_stop_keep_alive(struct nvme_ctrl *ctrl); |
| 500 | int nvme_reset_ctrl(struct nvme_ctrl *ctrl); | 502 | int nvme_reset_ctrl(struct nvme_ctrl *ctrl); |
| 501 | int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); | 503 | int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl); |
| 504 | int nvme_try_sched_reset(struct nvme_ctrl *ctrl); | ||
| 502 | int nvme_delete_ctrl(struct nvme_ctrl *ctrl); | 505 | int nvme_delete_ctrl(struct nvme_ctrl *ctrl); |
| 503 | 506 | ||
| 504 | int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, | 507 | int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, |
| @@ -773,7 +773,8 @@ static blk_status_t nvme_setup_prp_simple(struct nvme_dev *dev, · 772 unmodified lines | |||
| 773 | struct bio_vec *bv) | 773 | struct bio_vec *bv) |
| 774 | { | 774 | { |
| 775 | struct nvme_iod *iod = blk_mq_rq_to_pdu(req); | 775 | struct nvme_iod *iod = blk_mq_rq_to_pdu(req); |
| 776 | unsigned int first_prp_len = dev->ctrl.page_size - bv->bv_offset; | 776 | unsigned int offset = bv->bv_offset & (dev->ctrl.page_size - 1); |
| 777 | unsigned int first_prp_len = dev->ctrl.page_size - offset; | ||
| 777 | 778 | ||
| 778 | iod->first_dma = dma_map_bvec(dev->dev, bv, rq_dma_dir(req), 0); | 779 | iod->first_dma = dma_map_bvec(dev->dev, bv, rq_dma_dir(req), 0); |
| 779 | if (dma_mapping_error(dev->dev, iod->first_dma)) | 780 | if (dma_mapping_error(dev->dev, iod->first_dma)) |
| @@ -2263,10 +2264,7 @@ static bool __nvme_disable_io_queues(struct nvme_dev *dev, u8 opcode) · 1483 unmodified lines | |||
| 2263 | return true; | 2264 | return true; |
| 2264 | } | 2265 | } |
| 2265 | 2266 | ||
| 2266 | /* | 2267 | static void nvme_dev_add(struct nvme_dev *dev) |
| 2267 | * return error value only when tagset allocation failed | ||
| 2268 | */ | ||
| 2269 | static int nvme_dev_add(struct nvme_dev *dev) | ||
| 2270 | { | 2268 | { |
| 2271 | int ret; | 2269 | int ret; |
| 2272 | 2270 | ||
| @@ -2296,7 +2294,7 @@ static int nvme_dev_add(struct nvme_dev *dev) · 23 unmodified lines | |||
| 2296 | if (ret) { | 2294 | if (ret) { |
| 2297 | dev_warn(dev->ctrl.device, | 2295 | dev_warn(dev->ctrl.device, |
| 2298 | "IO queues tagset allocation failed %d\n", ret); | 2296 | "IO queues tagset allocation failed %d\n", ret); |
| 2299 | return ret; | 2297 | return; |
| 2300 | } | 2298 | } |
| 2301 | dev->ctrl.tagset = &dev->tagset; | 2299 | dev->ctrl.tagset = &dev->tagset; |
| 2302 | } else { | 2300 | } else { |
| @@ -2307,7 +2305,6 @@ static int nvme_dev_add(struct nvme_dev *dev) · 4 unmodified lines | |||
| 2307 | } | 2305 | } |
| 2308 | 2306 | ||
| 2309 | nvme_dbbuf_set(dev); | 2307 | nvme_dbbuf_set(dev); |
| 2310 | return 0; | ||
| 2311 | } | 2308 | } |
| 2312 | 2309 | ||
| 2313 | static int nvme_pci_enable(struct nvme_dev *dev) | 2310 | static int nvme_pci_enable(struct nvme_dev *dev) |
| @@ -2467,6 +2464,14 @@ static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) · 153 unmodified lines | |||
| 2467 | mutex_unlock(&dev->shutdown_lock); | 2464 | mutex_unlock(&dev->shutdown_lock); |
| 2468 | } | 2465 | } |
| 2469 | 2466 | ||
| 2467 | static int nvme_disable_prepare_reset(struct nvme_dev *dev, bool shutdown) | ||
| 2468 | { | ||
| 2469 | if (!nvme_wait_reset(&dev->ctrl)) | ||
| 2470 | return -EBUSY; | ||
| 2471 | nvme_dev_disable(dev, shutdown); | ||
| 2472 | return 0; | ||
| 2473 | } | ||
| 2474 | |||
| 2470 | static int nvme_setup_prp_pools(struct nvme_dev *dev) | 2475 | static int nvme_setup_prp_pools(struct nvme_dev *dev) |
| 2471 | { | 2476 | { |
| 2472 | dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, | 2477 | dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, |
| @@ -2490,14 +2495,20 @@ static void nvme_release_prp_pools(struct nvme_dev *dev) · 17 unmodified lines | |||
| 2490 | dma_pool_destroy(dev->prp_small_pool); | 2495 | dma_pool_destroy(dev->prp_small_pool); |
| 2491 | } | 2496 | } |
| 2492 | 2497 | ||
| 2498 | static void nvme_free_tagset(struct nvme_dev *dev) | ||
| 2499 | { | ||
| 2500 | if (dev->tagset.tags) | ||
| 2501 | blk_mq_free_tag_set(&dev->tagset); | ||
| 2502 | dev->ctrl.tagset = NULL; | ||
| 2503 | } | ||
| 2504 | |||
| 2493 | static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) | 2505 | static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) |
| 2494 | { | 2506 | { |
| 2495 | struct nvme_dev *dev = to_nvme_dev(ctrl); | 2507 | struct nvme_dev *dev = to_nvme_dev(ctrl); |
| 2496 | 2508 | ||
| 2497 | nvme_dbbuf_dma_free(dev); | 2509 | nvme_dbbuf_dma_free(dev); |
| 2498 | put_device(dev->dev); | 2510 | put_device(dev->dev); |
| 2499 | if (dev->tagset.tags) | 2511 | nvme_free_tagset(dev); |
| 2500 | blk_mq_free_tag_set(&dev->tagset); | ||
| 2501 | if (dev->ctrl.admin_q) | 2512 | if (dev->ctrl.admin_q) |
| 2502 | blk_put_queue(dev->ctrl.admin_q); | 2513 | blk_put_queue(dev->ctrl.admin_q); |
| 2503 | kfree(dev->queues); | 2514 | kfree(dev->queues); |
| @@ -2508,6 +2519,11 @@ static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) · 4 unmodified lines | |||
| 2508 | 2519 | ||
| 2509 | static void nvme_remove_dead_ctrl(struct nvme_dev *dev) | 2520 | static void nvme_remove_dead_ctrl(struct nvme_dev *dev) |
| 2510 | { | 2521 | { |
| 2522 | /* | ||
| 2523 | * Set state to deleting now to avoid blocking nvme_wait_reset(), which | ||
| 2524 | * may be holding this pci_dev's device lock. | ||
| 2525 | */ | ||
| 2526 | nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); | ||
| 2511 | nvme_get_ctrl(&dev->ctrl); | 2527 | nvme_get_ctrl(&dev->ctrl); |
| 2512 | nvme_dev_disable(dev, false); | 2528 | nvme_dev_disable(dev, false); |
| 2513 | nvme_kill_queues(&dev->ctrl); | 2529 | nvme_kill_queues(&dev->ctrl); |
| @@ -2521,7 +2537,6 @@ static void nvme_reset_work(struct work_struct *work) · 7 unmodified lines | |||
| 2521 | container_of(work, struct nvme_dev, ctrl.reset_work); | 2537 | container_of(work, struct nvme_dev, ctrl.reset_work); |
| 2522 | bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); | 2538 | bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); |
| 2523 | int result; | 2539 | int result; |
| 2524 | enum nvme_ctrl_state new_state = NVME_CTRL_LIVE; | ||
| 2525 | 2540 | ||
| 2526 | if (WARN_ON(dev->ctrl.state != NVME_CTRL_RESETTING)) { | 2541 | if (WARN_ON(dev->ctrl.state != NVME_CTRL_RESETTING)) { |
| 2527 | result = -ENODEV; | 2542 | result = -ENODEV; |
| @@ -2615,13 +2630,11 @@ static void nvme_reset_work(struct work_struct *work) · 87 unmodified lines | |||
| 2615 | dev_warn(dev->ctrl.device, "IO queues not created\n"); | 2630 | dev_warn(dev->ctrl.device, "IO queues not created\n"); |
| 2616 | nvme_kill_queues(&dev->ctrl); | 2631 | nvme_kill_queues(&dev->ctrl); |
| 2617 | nvme_remove_namespaces(&dev->ctrl); | 2632 | nvme_remove_namespaces(&dev->ctrl); |
| 2618 | new_state = NVME_CTRL_ADMIN_ONLY; | 2633 | nvme_free_tagset(dev); |
| 2619 | } else { | 2634 | } else { |
| 2620 | nvme_start_queues(&dev->ctrl); | 2635 | nvme_start_queues(&dev->ctrl); |
| 2621 | nvme_wait_freeze(&dev->ctrl); | 2636 | nvme_wait_freeze(&dev->ctrl); |
| 2622 | /* hit this only when allocate tagset fails */ | 2637 | nvme_dev_add(dev); |
| 2623 | if (nvme_dev_add(dev)) | ||
| 2624 | new_state = NVME_CTRL_ADMIN_ONLY; | ||
| 2625 | nvme_unfreeze(&dev->ctrl); | 2638 | nvme_unfreeze(&dev->ctrl); |
| 2626 | } | 2639 | } |
| 2627 | 2640 | ||
| @@ -2629,9 +2642,9 @@ static void nvme_reset_work(struct work_struct *work) · 1 unmodified line | |||
| 2629 | * If only admin queue live, keep it to do further investigation or | 2642 | * If only admin queue live, keep it to do further investigation or |
| 2630 | * recovery. | 2643 | * recovery. |
| 2631 | */ | 2644 | */ |
| 2632 | if (!nvme_change_ctrl_state(&dev->ctrl, new_state)) { | 2645 | if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) { |
| 2633 | dev_warn(dev->ctrl.device, | 2646 | dev_warn(dev->ctrl.device, |
| 2634 | "failed to mark controller state %d\n", new_state); | 2647 | "failed to mark controller live state\n"); |
| 2635 | result = -ENODEV; | 2648 | result = -ENODEV; |
| 2636 | goto out; | 2649 | goto out; |
| 2637 | } | 2650 | } |
| @@ -2672,7 +2685,7 @@ static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) · 34 unmodified lines | |||
| 2672 | 2685 | ||
| 2673 | static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) | 2686 | static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) |
| 2674 | { | 2687 | { |
| 2675 | *val = readq(to_nvme_dev(ctrl)->bar + off); | 2688 | *val = lo_hi_readq(to_nvme_dev(ctrl)->bar + off); |
| 2676 | return 0; | 2689 | return 0; |
| 2677 | } | 2690 | } |
| 2678 | 2691 | ||
| @@ -2836,19 +2849,28 @@ static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) · 157 unmodified lines | |||
| 2836 | static void nvme_reset_prepare(struct pci_dev *pdev) | 2849 | static void nvme_reset_prepare(struct pci_dev *pdev) |
| 2837 | { | 2850 | { |
| 2838 | struct nvme_dev *dev = pci_get_drvdata(pdev); | 2851 | struct nvme_dev *dev = pci_get_drvdata(pdev); |
| 2839 | nvme_dev_disable(dev, false); | 2852 | |
| 2853 | /* | ||
| 2854 | * We don't need to check the return value from waiting for the reset | ||
| 2855 | * state as pci_dev device lock is held, making it impossible to race | ||
| 2856 | * with ->remove(). | ||
| 2857 | */ | ||
| 2858 | nvme_disable_prepare_reset(dev, false); | ||
| 2859 | nvme_sync_queues(&dev->ctrl); | ||
| 2840 | } | 2860 | } |
| 2841 | 2861 | ||
| 2842 | static void nvme_reset_done(struct pci_dev *pdev) | 2862 | static void nvme_reset_done(struct pci_dev *pdev) |
| 2843 | { | 2863 | { |
| 2844 | struct nvme_dev *dev = pci_get_drvdata(pdev); | 2864 | struct nvme_dev *dev = pci_get_drvdata(pdev); |
| 2845 | nvme_reset_ctrl_sync(&dev->ctrl); | 2865 | |
| 2866 | if (!nvme_try_sched_reset(&dev->ctrl)) | ||
| 2867 | flush_work(&dev->ctrl.reset_work); | ||
| 2846 | } | 2868 | } |
| 2847 | 2869 | ||
| 2848 | static void nvme_shutdown(struct pci_dev *pdev) | 2870 | static void nvme_shutdown(struct pci_dev *pdev) |
| 2849 | { | 2871 | { |
| 2850 | struct nvme_dev *dev = pci_get_drvdata(pdev); | 2872 | struct nvme_dev *dev = pci_get_drvdata(pdev); |
| 2851 | nvme_dev_disable(dev, true); | 2873 | nvme_disable_prepare_reset(dev, true); |
| 2852 | } | 2874 | } |
| 2853 | 2875 | ||
| 2854 | /* | 2876 | /* |
| @@ -2901,7 +2923,7 @@ static int nvme_resume(struct device *dev) · 46 unmodified lines | |||
| 2901 | 2923 | ||
| 2902 | if (ndev->last_ps == U32_MAX || | 2924 | if (ndev->last_ps == U32_MAX || |
| 2903 | nvme_set_power_state(ctrl, ndev->last_ps) != 0) | 2925 | nvme_set_power_state(ctrl, ndev->last_ps) != 0) |
| 2904 | nvme_reset_ctrl(ctrl); | 2926 | return nvme_try_sched_reset(&ndev->ctrl); |
| 2905 | return 0; | 2927 | return 0; |
| 2906 | } | 2928 | } |
| 2907 | 2929 | ||
| @@ -2929,43 +2951,42 @@ static int nvme_suspend(struct device *dev) · 21 unmodified lines | |||
| 2929 | */ | 2951 | */ |
| 2930 | if (pm_suspend_via_firmware() || !ctrl->npss || | 2952 | if (pm_suspend_via_firmware() || !ctrl->npss || |
| 2931 | !pcie_aspm_enabled(pdev) || | 2953 | !pcie_aspm_enabled(pdev) || |
| 2932 | (ndev->ctrl.quirks & NVME_QUIRK_SIMPLE_SUSPEND)) { | 2954 | (ndev->ctrl.quirks & NVME_QUIRK_SIMPLE_SUSPEND)) |
| 2933 | nvme_dev_disable(ndev, true); | 2955 | return nvme_disable_prepare_reset(ndev, true); |
| 2934 | return 0; | ||
| 2935 | } | ||
| 2936 | 2956 | ||
| 2937 | nvme_start_freeze(ctrl); | 2957 | nvme_start_freeze(ctrl); |
| 2938 | nvme_wait_freeze(ctrl); | 2958 | nvme_wait_freeze(ctrl); |
| 2939 | nvme_sync_queues(ctrl); | 2959 | nvme_sync_queues(ctrl); |
| 2940 | 2960 | ||
| 2941 | if (ctrl->state != NVME_CTRL_LIVE && | 2961 | if (ctrl->state != NVME_CTRL_LIVE) |
| 2942 | ctrl->state != NVME_CTRL_ADMIN_ONLY) | ||
| 2943 | goto unfreeze; | 2962 | goto unfreeze; |
| 2944 | 2963 | ||
| 2945 | ret = nvme_get_power_state(ctrl, &ndev->last_ps); | 2964 | ret = nvme_get_power_state(ctrl, &ndev->last_ps); |
| 2946 | if (ret < 0) | 2965 | if (ret < 0) |
| 2947 | goto unfreeze; | 2966 | goto unfreeze; |
| 2948 | 2967 | ||
| 2968 | /* | ||
| 2969 | * A saved state prevents pci pm from generically controlling the | ||
| 2970 | * device's power. If we're using protocol specific settings, we don't | ||
| 2971 | * want pci interfering. | ||
| 2972 | */ | ||
| 2973 | pci_save_state(pdev); | ||
| 2974 | |||
| 2949 | ret = nvme_set_power_state(ctrl, ctrl->npss); | 2975 | ret = nvme_set_power_state(ctrl, ctrl->npss); |
| 2950 | if (ret < 0) | 2976 | if (ret < 0) |
| 2951 | goto unfreeze; | 2977 | goto unfreeze; |
| 2952 | 2978 | ||
| 2953 | if (ret) { | 2979 | if (ret) { |
| 2980 | /* discard the saved state */ | ||
| 2981 | pci_load_saved_state(pdev, NULL); | ||
| 2982 | |||
| 2954 | /* | 2983 | /* |
| 2955 | * Clearing npss forces a controller reset on resume. The | 2984 | * Clearing npss forces a controller reset on resume. The |
| 2956 | * correct value will be resdicovered then. | 2985 | * correct value will be resdicovered then. |
| 2957 | */ | 2986 | */ |
| 2958 | nvme_dev_disable(ndev, true); | 2987 | ret = nvme_disable_prepare_reset(ndev, true); |
| 2959 | ctrl->npss = 0; | 2988 | ctrl->npss = 0; |
| 2960 | ret = 0; | ||
| 2961 | goto unfreeze; | ||
| 2962 | } | 2989 | } |
| 2963 | /* | ||
| 2964 | * A saved state prevents pci pm from generically controlling the | ||
| 2965 | * device's power. If we're using protocol specific settings, we don't | ||
| 2966 | * want pci interfering. | ||
| 2967 | */ | ||
| 2968 | pci_save_state(pdev); | ||
| 2969 | unfreeze: | 2990 | unfreeze: |
| 2970 | nvme_unfreeze(ctrl); | 2991 | nvme_unfreeze(ctrl); |
| 2971 | return ret; | 2992 | return ret; |
| @@ -2974,9 +2995,7 @@ unfreeze: · 2 unmodified lines | |||
| 2974 | static int nvme_simple_suspend(struct device *dev) | 2995 | static int nvme_simple_suspend(struct device *dev) |
| 2975 | { | 2996 | { |
| 2976 | struct nvme_dev *ndev = pci_get_drvdata(to_pci_dev(dev)); | 2997 | struct nvme_dev *ndev = pci_get_drvdata(to_pci_dev(dev)); |
| 2977 | 2998 | return nvme_disable_prepare_reset(ndev, true); | |
| 2978 | nvme_dev_disable(ndev, true); | ||
| 2979 | return 0; | ||
| 2980 | } | 2999 | } |
| 2981 | 3000 | ||
| 2982 | static int nvme_simple_resume(struct device *dev) | 3001 | static int nvme_simple_resume(struct device *dev) |
| @@ -2984,8 +3003,7 @@ static int nvme_simple_resume(struct device *dev) · 1 unmodified line | |||
| 2984 | struct pci_dev *pdev = to_pci_dev(dev); | 3003 | struct pci_dev *pdev = to_pci_dev(dev); |
| 2985 | struct nvme_dev *ndev = pci_get_drvdata(pdev); | 3004 | struct nvme_dev *ndev = pci_get_drvdata(pdev); |
| 2986 | 3005 | ||
| 2987 | nvme_reset_ctrl(&ndev->ctrl); | 3006 | return nvme_try_sched_reset(&ndev->ctrl); |
| 2988 | return 0; | ||
| 2989 | } | 3007 | } |
| 2990 | 3008 | ||
| 2991 | static const struct dev_pm_ops nvme_dev_pm_ops = { | 3009 | static const struct dev_pm_ops nvme_dev_pm_ops = { |
| @@ -3090,6 +3108,9 @@ static const struct pci_device_id nvme_id_table[] = { · 98 unmodified lines | |||
| 3090 | .driver_data = NVME_QUIRK_LIGHTNVM, }, | 3108 | .driver_data = NVME_QUIRK_LIGHTNVM, }, |
| 3091 | { PCI_DEVICE(0x10ec, 0x5762), /* ADATA SX6000LNP */ | 3109 | { PCI_DEVICE(0x10ec, 0x5762), /* ADATA SX6000LNP */ |
| 3092 | .driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN, }, | 3110 | .driver_data = NVME_QUIRK_IGNORE_DEV_SUBNQN, }, |
| 3111 | { PCI_DEVICE(0x1cc1, 0x8201), /* ADATA SX8200PNP 512GB */ | ||
| 3112 | .driver_data = NVME_QUIRK_NO_DEEPEST_PS | | ||
| 3113 | NVME_QUIRK_IGNORE_DEV_SUBNQN, }, | ||
| 3093 | { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, | 3114 | { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, |
| 3094 | { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) }, | 3115 | { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) }, |
| 3095 | { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) }, | 3116 | { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2003) }, |
| @@ -427,7 +427,7 @@ static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) · 426 unmodified lines | |||
| 427 | static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev) | 427 | static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev) |
| 428 | { | 428 | { |
| 429 | return min_t(u32, NVME_RDMA_MAX_SEGMENTS, | 429 | return min_t(u32, NVME_RDMA_MAX_SEGMENTS, |
| 430 | ibdev->attrs.max_fast_reg_page_list_len); | 430 | ibdev->attrs.max_fast_reg_page_list_len - 1); |
| 431 | } | 431 | } |
| 432 | 432 | ||
| 433 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) | 433 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
| @@ -437,7 +437,7 @@ static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) · 3 unmodified lines | |||
| 437 | const int cq_factor = send_wr_factor + 1; /* + RECV */ | 437 | const int cq_factor = send_wr_factor + 1; /* + RECV */ |
| 438 | int comp_vector, idx = nvme_rdma_queue_idx(queue); | 438 | int comp_vector, idx = nvme_rdma_queue_idx(queue); |
| 439 | enum ib_poll_context poll_ctx; | 439 | enum ib_poll_context poll_ctx; |
| 440 | int ret; | 440 | int ret, pages_per_mr; |
| 441 | 441 | ||
| 442 | queue->device = nvme_rdma_find_get_device(queue->cm_id); | 442 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
| 443 | if (!queue->device) { | 443 | if (!queue->device) { |
| @@ -479,10 +479,16 @@ static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) · 35 unmodified lines | |||
| 479 | goto out_destroy_qp; | 479 | goto out_destroy_qp; |
| 480 | } | 480 | } |
| 481 | 481 | ||
| 482 | /* | ||
| 483 | * Currently we don't use SG_GAPS MR's so if the first entry is | ||
| 484 | * misaligned we'll end up using two entries for a single data page, | ||
| 485 | * so one additional entry is required. | ||
| 486 | */ | ||
| 487 | pages_per_mr = nvme_rdma_get_max_fr_pages(ibdev) + 1; | ||
| 482 | ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, | 488 | ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, |
| 483 | queue->queue_size, | 489 | queue->queue_size, |
| 484 | IB_MR_TYPE_MEM_REG, | 490 | IB_MR_TYPE_MEM_REG, |
| 485 | nvme_rdma_get_max_fr_pages(ibdev), 0); | 491 | pages_per_mr, 0); |
| 486 | if (ret) { | 492 | if (ret) { |
| 487 | dev_err(queue->ctrl->ctrl.device, | 493 | dev_err(queue->ctrl->ctrl.device, |
| 488 | "failed to initialize MR pool sized %d for QID %d\n", | 494 | "failed to initialize MR pool sized %d for QID %d\n", |
| @@ -614,7 +620,8 @@ static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) · 125 unmodified lines | |||
| 614 | if (!ret) { | 620 | if (!ret) { |
| 615 | set_bit(NVME_RDMA_Q_LIVE, &queue->flags); | 621 | set_bit(NVME_RDMA_Q_LIVE, &queue->flags); |
| 616 | } else { | 622 | } else { |
| 617 | __nvme_rdma_stop_queue(queue); | 623 | if (test_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) |
| 624 | __nvme_rdma_stop_queue(queue); | ||
| 618 | dev_info(ctrl->ctrl.device, | 625 | dev_info(ctrl->ctrl.device, |
| 619 | "failed to connect queue: %d ret=%d\n", idx, ret); | 626 | "failed to connect queue: %d ret=%d\n", idx, ret); |
| 620 | } | 627 | } |
| @@ -820,8 +827,8 @@ static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, · 199 unmodified lines | |||
| 820 | if (error) | 827 | if (error) |
| 821 | goto out_stop_queue; | 828 | goto out_stop_queue; |
| 822 | 829 | ||
| 823 | ctrl->ctrl.max_hw_sectors = | 830 | ctrl->ctrl.max_segments = ctrl->max_fr_pages; |
| 824 | (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9); | 831 | ctrl->ctrl.max_hw_sectors = ctrl->max_fr_pages << (ilog2(SZ_4K) - 9); |
| 825 | 832 | ||
| 826 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); | 833 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
| 827 | 834 | ||
| @@ -1694,6 +1701,14 @@ nvme_rdma_timeout(struct request *rq, bool reserved) · 866 unmodified lines | |||
| 1694 | dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", | 1701 | dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", |
| 1695 | rq->tag, nvme_rdma_queue_idx(queue)); | 1702 | rq->tag, nvme_rdma_queue_idx(queue)); |
| 1696 | 1703 | ||
| 1704 | /* | ||
| 1705 | * Restart the timer if a controller reset is already scheduled. Any | ||
| 1706 | * timed out commands would be handled before entering the connecting | ||
| 1707 | * state. | ||
| 1708 | */ | ||
| 1709 | if (ctrl->ctrl.state == NVME_CTRL_RESETTING) | ||
| 1710 | return BLK_EH_RESET_TIMER; | ||
| 1711 | |||
| 1697 | if (ctrl->ctrl.state != NVME_CTRL_LIVE) { | 1712 | if (ctrl->ctrl.state != NVME_CTRL_LIVE) { |
| 1698 | /* | 1713 | /* |
| 1699 | * Teardown immediately if controller times out while starting | 1714 | * Teardown immediately if controller times out while starting |
| @@ -1042,7 +1042,7 @@ static void nvme_tcp_io_work(struct work_struct *w) · 1041 unmodified lines | |||
| 1042 | { | 1042 | { |
| 1043 | struct nvme_tcp_queue *queue = | 1043 | struct nvme_tcp_queue *queue = |
| 1044 | container_of(w, struct nvme_tcp_queue, io_work); | 1044 | container_of(w, struct nvme_tcp_queue, io_work); |
| 1045 | unsigned long start = jiffies + msecs_to_jiffies(1); | 1045 | unsigned long deadline = jiffies + msecs_to_jiffies(1); |
| 1046 | 1046 | ||
| 1047 | do { | 1047 | do { |
| 1048 | bool pending = false; | 1048 | bool pending = false; |
| @@ -1067,7 +1067,7 @@ static void nvme_tcp_io_work(struct work_struct *w) · 18 unmodified lines | |||
| 1067 | if (!pending) | 1067 | if (!pending) |
| 1068 | return; | 1068 | return; |
| 1069 | 1069 | ||
| 1070 | } while (time_after(jiffies, start)); /* quota is exhausted */ | 1070 | } while (!time_after(jiffies, deadline)); /* quota is exhausted */ |
| 1071 | 1071 | ||
| 1072 | queue_work_on(queue->io_cpu, nvme_tcp_wq, &queue->io_work); | 1072 | queue_work_on(queue->io_cpu, nvme_tcp_wq, &queue->io_work); |
| 1073 | } | 1073 | } |
| @@ -1386,7 +1386,9 @@ static int nvme_tcp_alloc_queue(struct nvme_ctrl *nctrl, · 312 unmodified lines | |||
| 1386 | queue->sock->sk->sk_data_ready = nvme_tcp_data_ready; | 1386 | queue->sock->sk->sk_data_ready = nvme_tcp_data_ready; |
| 1387 | queue->sock->sk->sk_state_change = nvme_tcp_state_change; | 1387 | queue->sock->sk->sk_state_change = nvme_tcp_state_change; |
| 1388 | queue->sock->sk->sk_write_space = nvme_tcp_write_space; | 1388 | queue->sock->sk->sk_write_space = nvme_tcp_write_space; |
| 1389 | #ifdef CONFIG_NET_RX_BUSY_POLL | ||
| 1389 | queue->sock->sk->sk_ll_usec = 1; | 1390 | queue->sock->sk->sk_ll_usec = 1; |
| 1391 | #endif | ||
| 1390 | write_unlock_bh(&queue->sock->sk->sk_callback_lock); | 1392 | write_unlock_bh(&queue->sock->sk->sk_callback_lock); |
| 1391 | 1393 | ||
| 1392 | return 0; | 1394 | return 0; |
| @@ -2044,6 +2046,14 @@ nvme_tcp_timeout(struct request *rq, bool reserved) · 651 unmodified lines | |||
| 2044 | struct nvme_tcp_ctrl *ctrl = req->queue->ctrl; | 2046 | struct nvme_tcp_ctrl *ctrl = req->queue->ctrl; |
| 2045 | struct nvme_tcp_cmd_pdu *pdu = req->pdu; | 2047 | struct nvme_tcp_cmd_pdu *pdu = req->pdu; |
| 2046 | 2048 | ||
| 2049 | /* | ||
| 2050 | * Restart the timer if a controller reset is already scheduled. Any | ||
| 2051 | * timed out commands would be handled before entering the connecting | ||
| 2052 | * state. | ||
| 2053 | */ | ||
| 2054 | if (ctrl->ctrl.state == NVME_CTRL_RESETTING) | ||
| 2055 | return BLK_EH_RESET_TIMER; | ||
| 2056 | |||
| 2047 | dev_warn(ctrl->ctrl.device, | 2057 | dev_warn(ctrl->ctrl.device, |
| 2048 | "queue %d: timeout request %#x type %d\n", | 2058 | "queue %d: timeout request %#x type %d\n", |
| 2049 | nvme_tcp_queue_id(req->queue), rq->tag, pdu->hdr.type); | 2059 | nvme_tcp_queue_id(req->queue), rq->tag, pdu->hdr.type); |
| @@ -2126,6 +2136,7 @@ static blk_status_t nvme_tcp_setup_cmd_pdu(struct nvme_ns *ns, · 76 unmodified lines | |||
| 2126 | 2136 | ||
| 2127 | ret = nvme_tcp_map_data(queue, rq); | 2137 | ret = nvme_tcp_map_data(queue, rq); |
| 2128 | if (unlikely(ret)) { | 2138 | if (unlikely(ret)) { |
| 2139 | nvme_cleanup_cmd(rq); | ||
| 2129 | dev_err(queue->ctrl->ctrl.device, | 2140 | dev_err(queue->ctrl->ctrl.device, |
| 2130 | "Failed to map data (%d)\n", ret); | 2141 | "Failed to map data (%d)\n", ret); |
| 2131 | return ret; | 2142 | return ret; |
| @@ -11,10 +11,10 @@ · 10 unmodified lines | |||
| 11 | void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id) | 11 | void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id) |
| 12 | { | 12 | { |
| 13 | const struct queue_limits *ql = &bdev_get_queue(bdev)->limits; | 13 | const struct queue_limits *ql = &bdev_get_queue(bdev)->limits; |
| 14 | /* Number of physical blocks per logical block. */ | 14 | /* Number of logical blocks per physical block. */ |
| 15 | const u32 ppl = ql->physical_block_size / ql->logical_block_size; | 15 | const u32 lpp = ql->physical_block_size / ql->logical_block_size; |
| 16 | /* Physical blocks per logical block, 0's based. */ | 16 | /* Logical blocks per physical block, 0's based. */ |
| 17 | const __le16 ppl0b = to0based(ppl); | 17 | const __le16 lpp0b = to0based(lpp); |
| 18 | 18 | ||
| 19 | /* | 19 | /* |
| 20 | * For NVMe 1.2 and later, bit 1 indicates that the fields NAWUN, | 20 | * For NVMe 1.2 and later, bit 1 indicates that the fields NAWUN, |
| @@ -25,9 +25,9 @@ void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id) · 4 unmodified lines | |||
| 25 | * field from the identify controller data structure should be used. | 25 | * field from the identify controller data structure should be used. |
| 26 | */ | 26 | */ |
| 27 | id->nsfeat |= 1 << 1; | 27 | id->nsfeat |= 1 << 1; |
| 28 | id->nawun = ppl0b; | 28 | id->nawun = lpp0b; |
| 29 | id->nawupf = ppl0b; | 29 | id->nawupf = lpp0b; |
| 30 | id->nacwu = ppl0b; | 30 | id->nacwu = lpp0b; |
| 31 | 31 | ||
| 32 | /* | 32 | /* |
| 33 | * Bit 4 indicates that the fields NPWG, NPWA, NPDG, NPDA, and | 33 | * Bit 4 indicates that the fields NPWG, NPWA, NPDG, NPDA, and |
| @@ -36,7 +36,7 @@ void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id) · 2 unmodified lines | |||
| 36 | */ | 36 | */ |
| 37 | id->nsfeat |= 1 << 4; | 37 | id->nsfeat |= 1 << 4; |
| 38 | /* NPWG = Namespace Preferred Write Granularity. 0's based */ | 38 | /* NPWG = Namespace Preferred Write Granularity. 0's based */ |
| 39 | id->npwg = ppl0b; | 39 | id->npwg = lpp0b; |
| 40 | /* NPWA = Namespace Preferred Write Alignment. 0's based */ | 40 | /* NPWA = Namespace Preferred Write Alignment. 0's based */ |
| 41 | id->npwa = id->npwg; | 41 | id->npwa = id->npwg; |
| 42 | /* NPDG = Namespace Preferred Deallocate Granularity. 0's based */ | 42 | /* NPDG = Namespace Preferred Deallocate Granularity. 0's based */ |
| @@ -157,8 +157,10 @@ static blk_status_t nvme_loop_queue_rq(struct blk_mq_hw_ctx *hctx, · 156 unmodified lines | |||
| 157 | iod->sg_table.sgl = iod->first_sgl; | 157 | iod->sg_table.sgl = iod->first_sgl; |
| 158 | if (sg_alloc_table_chained(&iod->sg_table, | 158 | if (sg_alloc_table_chained(&iod->sg_table, |
| 159 | blk_rq_nr_phys_segments(req), | 159 | blk_rq_nr_phys_segments(req), |
| 160 | iod->sg_table.sgl, SG_CHUNK_SIZE)) | 160 | iod->sg_table.sgl, SG_CHUNK_SIZE)) { |
| 161 | nvme_cleanup_cmd(req); | ||
| 161 | return BLK_STS_RESOURCE; | 162 | return BLK_STS_RESOURCE; |
| 163 | } | ||
| 162 | 164 | ||
| 163 | iod->req.sg = iod->sg_table.sgl; | 165 | iod->req.sg = iod->sg_table.sgl; |
| 164 | iod->req.sg_cnt = blk_rq_map_sg(req->q, req, iod->sg_table.sgl); | 166 | iod->req.sg_cnt = blk_rq_map_sg(req->q, req, iod->sg_table.sgl); |
| @@ -348,8 +348,7 @@ static int nvmet_tcp_map_data(struct nvmet_tcp_cmd *cmd) · 347 unmodified lines | |||
| 348 | 348 | ||
| 349 | return 0; | 349 | return 0; |
| 350 | err: | 350 | err: |
| 351 | if (cmd->req.sg_cnt) | 351 | sgl_free(cmd->req.sg); |
| 352 | sgl_free(cmd->req.sg); | ||
| 353 | return NVME_SC_INTERNAL; | 352 | return NVME_SC_INTERNAL; |
| 354 | } | 353 | } |
| 355 | 354 | ||
| @@ -554,8 +553,7 @@ static int nvmet_try_send_data(struct nvmet_tcp_cmd *cmd) · 198 unmodified lines | |||
| 554 | 553 | ||
| 555 | if (queue->nvme_sq.sqhd_disabled) { | 554 | if (queue->nvme_sq.sqhd_disabled) { |
| 556 | kfree(cmd->iov); | 555 | kfree(cmd->iov); |
| 557 | if (cmd->req.sg_cnt) | 556 | sgl_free(cmd->req.sg); |
| 558 | sgl_free(cmd->req.sg); | ||
| 559 | } | 557 | } |
| 560 | 558 | ||
| 561 | return 1; | 559 | return 1; |
| @@ -586,8 +584,7 @@ static int nvmet_try_send_response(struct nvmet_tcp_cmd *cmd, · 24 unmodified lines | |||
| 586 | return -EAGAIN; | 584 | return -EAGAIN; |
| 587 | 585 | ||
| 588 | kfree(cmd->iov); | 586 | kfree(cmd->iov); |
| 589 | if (cmd->req.sg_cnt) | 587 | sgl_free(cmd->req.sg); |
| 590 | sgl_free(cmd->req.sg); | ||
| 591 | cmd->queue->snd_cmd = NULL; | 588 | cmd->queue->snd_cmd = NULL; |
| 592 | nvmet_tcp_put_cmd(cmd); | 589 | nvmet_tcp_put_cmd(cmd); |
| 593 | return 1; | 590 | return 1; |
| @@ -1310,8 +1307,7 @@ static void nvmet_tcp_finish_cmd(struct nvmet_tcp_cmd *cmd) · 716 unmodified lines | |||
| 1310 | nvmet_req_uninit(&cmd->req); | 1307 | nvmet_req_uninit(&cmd->req); |
| 1311 | nvmet_tcp_unmap_pdu_iovec(cmd); | 1308 | nvmet_tcp_unmap_pdu_iovec(cmd); |
| 1312 | kfree(cmd->iov); | 1309 | kfree(cmd->iov); |
| 1313 | if (cmd->req.sg_cnt) | 1310 | sgl_free(cmd->req.sg); |
| 1314 | sgl_free(cmd->req.sg); | ||
| 1315 | } | 1311 | } |
| 1316 | 1312 | ||
| 1317 | static void nvmet_tcp_uninit_data_in_cmds(struct nvmet_tcp_queue *queue) | 1313 | static void nvmet_tcp_uninit_data_in_cmds(struct nvmet_tcp_queue *queue) |
| @@ -678,14 +678,6 @@ static int sba_dma_supported( struct device *dev, u64 mask) · 677 unmodified lines | |||
| 678 | return(0); | 678 | return(0); |
| 679 | } | 679 | } |
| 680 | 680 | ||
| 681 | /* Documentation/DMA-API-HOWTO.txt tells drivers to try 64-bit | ||
| 682 | * first, then fall back to 32-bit if that fails. | ||
| 683 | * We are just "encouraging" 32-bit DMA masks here since we can | ||
| 684 | * never allow IOMMU bypass unless we add special support for ZX1. | ||
| 685 | */ | ||
| 686 | if (mask > ~0U) | ||
| 687 | return 0; | ||
| 688 | |||
| 689 | ioc = GET_IOC(dev); | 681 | ioc = GET_IOC(dev); |
| 690 | if (!ioc) | 682 | if (!ioc) |
| 691 | return 0; | 683 | return 0; |
| @@ -958,19 +958,6 @@ void pci_refresh_power_state(struct pci_dev *dev) · 957 unmodified lines | |||
| 958 | pci_update_current_state(dev, dev->current_state); | 958 | pci_update_current_state(dev, dev->current_state); |
| 959 | } | 959 | } |
| 960 | 960 | ||
| 961 | /** | ||
| 962 | * pci_power_up - Put the given device into D0 forcibly | ||
| 963 | * @dev: PCI device to power up | ||
| 964 | */ | ||
| 965 | void pci_power_up(struct pci_dev *dev) | ||
| 966 | { | ||
| 967 | if (platform_pci_power_manageable(dev)) | ||
| 968 | platform_pci_set_power_state(dev, PCI_D0); | ||
| 969 | |||
| 970 | pci_raw_set_power_state(dev, PCI_D0); | ||
| 971 | pci_update_current_state(dev, PCI_D0); | ||
| 972 | } | ||
| 973 | |||
| 974 | /** | 961 | /** |
| 975 | * pci_platform_power_transition - Use platform to change device power state | 962 | * pci_platform_power_transition - Use platform to change device power state |
| 976 | * @dev: PCI device to handle. | 963 | * @dev: PCI device to handle. |
| @@ -1153,6 +1140,17 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state) · 176 unmodified lines | |||
| 1153 | } | 1140 | } |
| 1154 | EXPORT_SYMBOL(pci_set_power_state); | 1141 | EXPORT_SYMBOL(pci_set_power_state); |
| 1155 | 1142 | ||
| 1143 | /** | ||
| 1144 | * pci_power_up - Put the given device into D0 forcibly | ||
| 1145 | * @dev: PCI device to power up | ||
| 1146 | */ | ||
| 1147 | void pci_power_up(struct pci_dev *dev) | ||
| 1148 | { | ||
| 1149 | __pci_start_power_transition(dev, PCI_D0); | ||
| 1150 | pci_raw_set_power_state(dev, PCI_D0); | ||
| 1151 | pci_update_current_state(dev, PCI_D0); | ||
| 1152 | } | ||
| 1153 | |||
| 1156 | /** | 1154 | /** |
| 1157 | * pci_choose_state - Choose the power state of a PCI device | 1155 | * pci_choose_state - Choose the power state of a PCI device |
| 1158 | * @dev: PCI device to be suspended | 1156 | * @dev: PCI device to be suspended |
| @@ -420,12 +420,6 @@ failed_sensitivity: · 419 unmodified lines | |||
| 420 | 420 | ||
| 421 | static int cmpc_accel_remove_v4(struct acpi_device *acpi) | 421 | static int cmpc_accel_remove_v4(struct acpi_device *acpi) |
| 422 | { | 422 | { |
| 423 | struct input_dev *inputdev; | ||
| 424 | struct cmpc_accel *accel; | ||
| 425 | |||
| 426 | inputdev = dev_get_drvdata(&acpi->dev); | ||
| 427 | accel = dev_get_drvdata(&inputdev->dev); | ||
| 428 | |||
| 429 | device_remove_file(&acpi->dev, &cmpc_accel_sensitivity_attr_v4); | 423 | device_remove_file(&acpi->dev, &cmpc_accel_sensitivity_attr_v4); |
| 430 | device_remove_file(&acpi->dev, &cmpc_accel_g_select_attr_v4); | 424 | device_remove_file(&acpi->dev, &cmpc_accel_g_select_attr_v4); |
| 431 | return cmpc_remove_acpi_notify_device(acpi); | 425 | return cmpc_remove_acpi_notify_device(acpi); |
| @@ -656,12 +650,6 @@ failed_file: · 224 unmodified lines | |||
| 656 | 650 | ||
| 657 | static int cmpc_accel_remove(struct acpi_device *acpi) | 651 | static int cmpc_accel_remove(struct acpi_device *acpi) |
| 658 | { | 652 | { |
| 659 | struct input_dev *inputdev; | ||
| 660 | struct cmpc_accel *accel; | ||
| 661 | |||
| 662 | inputdev = dev_get_drvdata(&acpi->dev); | ||
| 663 | accel = dev_get_drvdata(&inputdev->dev); | ||
| 664 | |||
| 665 | device_remove_file(&acpi->dev, &cmpc_accel_sensitivity_attr); | 653 | device_remove_file(&acpi->dev, &cmpc_accel_sensitivity_attr); |
| 666 | return cmpc_remove_acpi_notify_device(acpi); | 654 | return cmpc_remove_acpi_notify_device(acpi); |
| 667 | } | 655 | } |
| @@ -108,6 +108,7 @@ static int i2c_multi_inst_probe(struct platform_device *pdev) · 107 unmodified lines | |||
| 108 | if (ret < 0) { | 108 | if (ret < 0) { |
| 109 | dev_dbg(dev, "Error requesting irq at index %d: %d\n", | 109 | dev_dbg(dev, "Error requesting irq at index %d: %d\n", |
| 110 | inst_data[i].irq_idx, ret); | 110 | inst_data[i].irq_idx, ret); |
| 111 | goto error; | ||
| 111 | } | 112 | } |
| 112 | board_info.irq = ret; | 113 | board_info.irq = ret; |
| 113 | break; | 114 | break; |
| @@ -293,9 +293,8 @@ static int intel_punit_ipc_probe(struct platform_device *pdev) · 292 unmodified lines | |||
| 293 | 293 | ||
| 294 | platform_set_drvdata(pdev, punit_ipcdev); | 294 | platform_set_drvdata(pdev, punit_ipcdev); |
| 295 | 295 | ||
| 296 | irq = platform_get_irq(pdev, 0); | 296 | irq = platform_get_irq_optional(pdev, 0); |
| 297 | if (irq < 0) { | 297 | if (irq < 0) { |
| 298 | punit_ipcdev->irq = 0; | ||
| 299 | dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n"); | 298 | dev_warn(&pdev->dev, "Invalid IRQ, using polling mode\n"); |
| 300 | } else { | 299 | } else { |
| 301 | ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc, | 300 | ret = devm_request_irq(&pdev->dev, irq, intel_punit_ioc, |
| @@ -97,8 +97,8 @@ config PTP_1588_CLOCK_PCH · 96 unmodified lines | |||
| 97 | help | 97 | help |
| 98 | This driver adds support for using the PCH EG20T as a PTP | 98 | This driver adds support for using the PCH EG20T as a PTP |
| 99 | clock. The hardware supports time stamping of PTP packets | 99 | clock. The hardware supports time stamping of PTP packets |
| 100 | when using the end-to-end delay (E2E) mechansim. The peer | 100 | when using the end-to-end delay (E2E) mechanism. The peer |
| 101 | delay mechansim (P2P) is not supported. | 101 | delay mechanism (P2P) is not supported. |
| 102 | 102 | ||
| 103 | This clock is only useful if your PTP programs are getting | 103 | This clock is only useful if your PTP programs are getting |
| 104 | hardware time stamps on the PTP Ethernet packets using the | 104 | hardware time stamps on the PTP Ethernet packets using the |
| @@ -507,6 +507,8 @@ int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base, · 506 unmodified lines | |||
| 507 | ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET; | 507 | ptp_qoriq->regs.etts_regs = base + ETTS_REGS_OFFSET; |
| 508 | } | 508 | } |
| 509 | 509 | ||
| 510 | spin_lock_init(&ptp_qoriq->lock); | ||
| 511 | |||
| 510 | ktime_get_real_ts64(&now); | 512 | ktime_get_real_ts64(&now); |
| 511 | ptp_qoriq_settime(&ptp_qoriq->caps, &now); | 513 | ptp_qoriq_settime(&ptp_qoriq->caps, &now); |
| 512 | 514 | ||
| @@ -514,7 +516,6 @@ int ptp_qoriq_init(struct ptp_qoriq *ptp_qoriq, void __iomem *base, · 1 unmodified line | |||
| 514 | (ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT | | 516 | (ptp_qoriq->tclk_period & TCLK_PERIOD_MASK) << TCLK_PERIOD_SHIFT | |
| 515 | (ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT; | 517 | (ptp_qoriq->cksel & CKSEL_MASK) << CKSEL_SHIFT; |
| 516 | 518 | ||
| 517 | spin_lock_init(&ptp_qoriq->lock); | ||
| 518 | spin_lock_irqsave(&ptp_qoriq->lock, flags); | 519 | spin_lock_irqsave(&ptp_qoriq->lock, flags); |
| 519 | 520 | ||
| 520 | regs = &ptp_qoriq->regs; | 521 | regs = &ptp_qoriq->regs; |
| @@ -1553,8 +1553,8 @@ static int dasd_eckd_read_vol_info(struct dasd_device *device) · 1552 unmodified lines | |||
| 1553 | if (rc == 0) { | 1553 | if (rc == 0) { |
| 1554 | memcpy(&private->vsq, vsq, sizeof(*vsq)); | 1554 | memcpy(&private->vsq, vsq, sizeof(*vsq)); |
| 1555 | } else { | 1555 | } else { |
| 1556 | dev_warn(&device->cdev->dev, | 1556 | DBF_EVENT_DEVID(DBF_WARNING, device->cdev, |
| 1557 | "Reading the volume storage information failed with rc=%d\n", rc); | 1557 | "Reading the volume storage information failed with rc=%d", rc); |
| 1558 | } | 1558 | } |
| 1559 | 1559 | ||
| 1560 | if (useglobal) | 1560 | if (useglobal) |
| @@ -1737,8 +1737,8 @@ static int dasd_eckd_read_ext_pool_info(struct dasd_device *device) · 176 unmodified lines | |||
| 1737 | if (rc == 0) { | 1737 | if (rc == 0) { |
| 1738 | dasd_eckd_cpy_ext_pool_data(device, lcq); | 1738 | dasd_eckd_cpy_ext_pool_data(device, lcq); |
| 1739 | } else { | 1739 | } else { |
| 1740 | dev_warn(&device->cdev->dev, | 1740 | DBF_EVENT_DEVID(DBF_WARNING, device->cdev, |
| 1741 | "Reading the logical configuration failed with rc=%d\n", rc); | 1741 | "Reading the logical configuration failed with rc=%d", rc); |
| 1742 | } | 1742 | } |
| 1743 | 1743 | ||
| 1744 | dasd_sfree_request(cqr, cqr->memdev); | 1744 | dasd_sfree_request(cqr, cqr->memdev); |
| @@ -2020,14 +2020,10 @@ dasd_eckd_check_characteristics(struct dasd_device *device) · 275 unmodified lines | |||
| 2020 | dasd_eckd_read_features(device); | 2020 | dasd_eckd_read_features(device); |
| 2021 | 2021 | ||
| 2022 | /* Read Volume Information */ | 2022 | /* Read Volume Information */ |
| 2023 | rc = dasd_eckd_read_vol_info(device); | 2023 | dasd_eckd_read_vol_info(device); |
| 2024 | if (rc) | ||
| 2025 | goto out_err3; | ||
| 2026 | 2024 | ||
| 2027 | /* Read Extent Pool Information */ | 2025 | /* Read Extent Pool Information */ |
| 2028 | rc = dasd_eckd_read_ext_pool_info(device); | 2026 | dasd_eckd_read_ext_pool_info(device); |
| 2029 | if (rc) | ||
| 2030 | goto out_err3; | ||
| 2031 | 2027 | ||
| 2032 | /* Read Device Characteristics */ | 2028 | /* Read Device Characteristics */ |
| 2033 | rc = dasd_generic_read_dev_chars(device, DASD_ECKD_MAGIC, | 2029 | rc = dasd_generic_read_dev_chars(device, DASD_ECKD_MAGIC, |
| @@ -2059,9 +2055,6 @@ dasd_eckd_check_characteristics(struct dasd_device *device) · 25 unmodified lines | |||
| 2059 | if (readonly) | 2055 | if (readonly) |
| 2060 | set_bit(DASD_FLAG_DEVICE_RO, &device->flags); | 2056 | set_bit(DASD_FLAG_DEVICE_RO, &device->flags); |
| 2061 | 2057 | ||
| 2062 | if (dasd_eckd_is_ese(device)) | ||
| 2063 | dasd_set_feature(device->cdev, DASD_FEATURE_DISCARD, 1); | ||
| 2064 | |||
| 2065 | dev_info(&device->cdev->dev, "New DASD %04X/%02X (CU %04X/%02X) " | 2058 | dev_info(&device->cdev->dev, "New DASD %04X/%02X (CU %04X/%02X) " |
| 2066 | "with %d cylinders, %d heads, %d sectors%s\n", | 2059 | "with %d cylinders, %d heads, %d sectors%s\n", |
| 2067 | private->rdc_data.dev_type, | 2060 | private->rdc_data.dev_type, |
| @@ -3695,14 +3688,6 @@ static int dasd_eckd_release_space(struct dasd_device *device, · 1627 unmodified lines | |||
| 3695 | return -EINVAL; | 3688 | return -EINVAL; |
| 3696 | } | 3689 | } |
| 3697 | 3690 | ||
| 3698 | static struct dasd_ccw_req * | ||
| 3699 | dasd_eckd_build_cp_discard(struct dasd_device *device, struct dasd_block *block, | ||
| 3700 | struct request *req, sector_t first_trk, | ||
| 3701 | sector_t last_trk) | ||
| 3702 | { | ||
| 3703 | return dasd_eckd_dso_ras(device, block, req, first_trk, last_trk, 1); | ||
| 3704 | } | ||
| 3705 | |||
| 3706 | static struct dasd_ccw_req *dasd_eckd_build_cp_cmd_single( | 3691 | static struct dasd_ccw_req *dasd_eckd_build_cp_cmd_single( |
| 3707 | struct dasd_device *startdev, | 3692 | struct dasd_device *startdev, |
| 3708 | struct dasd_block *block, | 3693 | struct dasd_block *block, |
| @@ -4447,10 +4432,6 @@ static struct dasd_ccw_req *dasd_eckd_build_cp(struct dasd_device *startdev, · 738 unmodified lines | |||
| 4447 | cmdwtd = private->features.feature[12] & 0x40; | 4432 | cmdwtd = private->features.feature[12] & 0x40; |
| 4448 | use_prefix = private->features.feature[8] & 0x01; | 4433 | use_prefix = private->features.feature[8] & 0x01; |
| 4449 | 4434 | ||
| 4450 | if (req_op(req) == REQ_OP_DISCARD) | ||
| 4451 | return dasd_eckd_build_cp_discard(startdev, block, req, | ||
| 4452 | first_trk, last_trk); | ||
| 4453 | |||
| 4454 | cqr = NULL; | 4435 | cqr = NULL; |
| 4455 | if (cdlspecial || dasd_page_cache) { | 4436 | if (cdlspecial || dasd_page_cache) { |
| 4456 | /* do nothing, just fall through to the cmd mode single case */ | 4437 | /* do nothing, just fall through to the cmd mode single case */ |
| @@ -4729,14 +4710,12 @@ static struct dasd_ccw_req *dasd_eckd_build_alias_cp(struct dasd_device *base, · 272 unmodified lines | |||
| 4729 | struct dasd_block *block, | 4710 | struct dasd_block *block, |
| 4730 | struct request *req) | 4711 | struct request *req) |
| 4731 | { | 4712 | { |
| 4732 | struct dasd_device *startdev = NULL; | ||
| 4733 | struct dasd_eckd_private *private; | 4713 | struct dasd_eckd_private *private; |
| 4734 | struct dasd_ccw_req *cqr; | 4714 | struct dasd_device *startdev; |
| 4735 | unsigned long flags; | 4715 | unsigned long flags; |
| 4716 | struct dasd_ccw_req *cqr; | ||
| 4736 | 4717 | ||
| 4737 | /* Discard requests can only be processed on base devices */ | 4718 | startdev = dasd_alias_get_start_dev(base); |
| 4738 | if (req_op(req) != REQ_OP_DISCARD) | ||
| 4739 | startdev = dasd_alias_get_start_dev(base); | ||
| 4740 | if (!startdev) | 4719 | if (!startdev) |
| 4741 | startdev = base; | 4720 | startdev = base; |
| 4742 | private = startdev->private; | 4721 | private = startdev->private; |
| @@ -5663,14 +5642,10 @@ static int dasd_eckd_restore_device(struct dasd_device *device) · 920 unmodified lines | |||
| 5663 | dasd_eckd_read_features(device); | 5642 | dasd_eckd_read_features(device); |
| 5664 | 5643 | ||
| 5665 | /* Read Volume Information */ | 5644 | /* Read Volume Information */ |
| 5666 | rc = dasd_eckd_read_vol_info(device); | 5645 | dasd_eckd_read_vol_info(device); |
| 5667 | if (rc) | ||
| 5668 | goto out_err2; | ||
| 5669 | 5646 | ||
| 5670 | /* Read Extent Pool Information */ | 5647 | /* Read Extent Pool Information */ |
| 5671 | rc = dasd_eckd_read_ext_pool_info(device); | 5648 | dasd_eckd_read_ext_pool_info(device); |
| 5672 | if (rc) | ||
| 5673 | goto out_err2; | ||
| 5674 | 5649 | ||
| 5675 | /* Read Device Characteristics */ | 5650 | /* Read Device Characteristics */ |
| 5676 | rc = dasd_generic_read_dev_chars(device, DASD_ECKD_MAGIC, | 5651 | rc = dasd_generic_read_dev_chars(device, DASD_ECKD_MAGIC, |
| @@ -6521,20 +6496,8 @@ static void dasd_eckd_setup_blk_queue(struct dasd_block *block) · 844 unmodified lines | |||
| 6521 | unsigned int logical_block_size = block->bp_block; | 6496 | unsigned int logical_block_size = block->bp_block; |
| 6522 | struct request_queue *q = block->request_queue; | 6497 | struct request_queue *q = block->request_queue; |
| 6523 | struct dasd_device *device = block->base; | 6498 | struct dasd_device *device = block->base; |
| 6524 | struct dasd_eckd_private *private; | ||
| 6525 | unsigned int max_discard_sectors; | ||
| 6526 | unsigned int max_bytes; | ||
| 6527 | unsigned int ext_bytes; /* Extent Size in Bytes */ | ||
| 6528 | int recs_per_trk; | ||
| 6529 | int trks_per_cyl; | ||
| 6530 | int ext_limit; | ||
| 6531 | int ext_size; /* Extent Size in Cylinders */ | ||
| 6532 | int max; | 6499 | int max; |
| 6533 | 6500 | ||
| 6534 | private = device->private; | ||
| 6535 | trks_per_cyl = private->rdc_data.trk_per_cyl; | ||
| 6536 | recs_per_trk = recs_per_track(&private->rdc_data, 0, logical_block_size); | ||
| 6537 | |||
| 6538 | if (device->features & DASD_FEATURE_USERAW) { | 6501 | if (device->features & DASD_FEATURE_USERAW) { |
| 6539 | /* | 6502 | /* |
| 6540 | * the max_blocks value for raw_track access is 256 | 6503 | * the max_blocks value for raw_track access is 256 |
| @@ -6555,28 +6518,6 @@ static void dasd_eckd_setup_blk_queue(struct dasd_block *block) · 14 unmodified lines | |||
| 6555 | /* With page sized segments each segment can be translated into one idaw/tidaw */ | 6518 | /* With page sized segments each segment can be translated into one idaw/tidaw */ |
| 6556 | blk_queue_max_segment_size(q, PAGE_SIZE); | 6519 | blk_queue_max_segment_size(q, PAGE_SIZE); |
| 6557 | blk_queue_segment_boundary(q, PAGE_SIZE - 1); | 6520 | blk_queue_segment_boundary(q, PAGE_SIZE - 1); |
| 6558 | |||
| 6559 | if (dasd_eckd_is_ese(device)) { | ||
| 6560 | /* | ||
| 6561 | * Depending on the extent size, up to UINT_MAX bytes can be | ||
| 6562 | * accepted. However, neither DASD_ECKD_RAS_EXTS_MAX nor the | ||
| 6563 | * device limits should be exceeded. | ||
| 6564 | */ | ||
| 6565 | ext_size = dasd_eckd_ext_size(device); | ||
| 6566 | ext_limit = min(private->real_cyl / ext_size, DASD_ECKD_RAS_EXTS_MAX); | ||
| 6567 | ext_bytes = ext_size * trks_per_cyl * recs_per_trk * | ||
| 6568 | logical_block_size; | ||
| 6569 | max_bytes = UINT_MAX - (UINT_MAX % ext_bytes); | ||
| 6570 | if (max_bytes / ext_bytes > ext_limit) | ||
| 6571 | max_bytes = ext_bytes * ext_limit; | ||
| 6572 | |||
| 6573 | max_discard_sectors = max_bytes / 512; | ||
| 6574 | |||
| 6575 | blk_queue_max_discard_sectors(q, max_discard_sectors); | ||
| 6576 | blk_queue_flag_set(QUEUE_FLAG_DISCARD, q); | ||
| 6577 | q->limits.discard_granularity = ext_bytes; | ||
| 6578 | q->limits.discard_alignment = ext_bytes; | ||
| 6579 | } | ||
| 6580 | } | 6521 | } |
| 6581 | 6522 | ||
| 6582 | static struct ccw_driver dasd_eckd_driver = { | 6523 | static struct ccw_driver dasd_eckd_driver = { |
| @@ -113,6 +113,7 @@ struct subchannel { · 112 unmodified lines | |||
| 113 | enum sch_todo todo; | 113 | enum sch_todo todo; |
| 114 | struct work_struct todo_work; | 114 | struct work_struct todo_work; |
| 115 | struct schib_config config; | 115 | struct schib_config config; |
| 116 | u64 dma_mask; | ||
| 116 | char *driver_override; /* Driver name to force a match */ | 117 | char *driver_override; /* Driver name to force a match */ |
| 117 | } __attribute__ ((aligned(8))); | 118 | } __attribute__ ((aligned(8))); |
| 118 | 119 | ||
| @@ -232,7 +232,12 @@ struct subchannel *css_alloc_subchannel(struct subchannel_id schid, · 231 unmodified lines | |||
| 232 | * belong to a subchannel need to fit 31 bit width (e.g. ccw). | 232 | * belong to a subchannel need to fit 31 bit width (e.g. ccw). |
| 233 | */ | 233 | */ |
| 234 | sch->dev.coherent_dma_mask = DMA_BIT_MASK(31); | 234 | sch->dev.coherent_dma_mask = DMA_BIT_MASK(31); |
| 235 | sch->dev.dma_mask = &sch->dev.coherent_dma_mask; | 235 | /* |
| 236 | * But we don't have such restrictions imposed on the stuff that | ||
| 237 | * is handled by the streaming API. | ||
| 238 | */ | ||
| 239 | sch->dma_mask = DMA_BIT_MASK(64); | ||
| 240 | sch->dev.dma_mask = &sch->dma_mask; | ||
| 236 | return sch; | 241 | return sch; |
| 237 | 242 | ||
| 238 | err: | 243 | err: |
| @@ -710,7 +710,7 @@ static struct ccw_device * io_subchannel_allocate_dev(struct subchannel *sch) · 709 unmodified lines | |||
| 710 | if (!cdev->private) | 710 | if (!cdev->private) |
| 711 | goto err_priv; | 711 | goto err_priv; |
| 712 | cdev->dev.coherent_dma_mask = sch->dev.coherent_dma_mask; | 712 | cdev->dev.coherent_dma_mask = sch->dev.coherent_dma_mask; |
| 713 | cdev->dev.dma_mask = &cdev->dev.coherent_dma_mask; | 713 | cdev->dev.dma_mask = sch->dev.dma_mask; |
| 714 | dma_pool = cio_gp_dma_create(&cdev->dev, 1); | 714 | dma_pool = cio_gp_dma_create(&cdev->dev, 1); |
| 715 | if (!dma_pool) | 715 | if (!dma_pool) |
| 716 | goto err_dma_pool; | 716 | goto err_dma_pool; |
| @@ -113,7 +113,7 @@ static void set_impl_params(struct qdio_irq *irq_ptr, · 112 unmodified lines | |||
| 113 | irq_ptr->qib.pfmt = qib_param_field_format; | 113 | irq_ptr->qib.pfmt = qib_param_field_format; |
| 114 | if (qib_param_field) | 114 | if (qib_param_field) |
| 115 | memcpy(irq_ptr->qib.parm, qib_param_field, | 115 | memcpy(irq_ptr->qib.parm, qib_param_field, |
| 116 | QDIO_MAX_BUFFERS_PER_Q); | 116 | sizeof(irq_ptr->qib.parm)); |
| 117 | 117 | ||
| 118 | if (!input_slib_elements) | 118 | if (!input_slib_elements) |
| 119 | goto output; | 119 | goto output; |
| @@ -4715,8 +4715,7 @@ static int qeth_qdio_establish(struct qeth_card *card) · 4714 unmodified lines | |||
| 4715 | 4715 | ||
| 4716 | QETH_CARD_TEXT(card, 2, "qdioest"); | 4716 | QETH_CARD_TEXT(card, 2, "qdioest"); |
| 4717 | 4717 | ||
| 4718 | qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q, | 4718 | qib_param_field = kzalloc(FIELD_SIZEOF(struct qib, parm), GFP_KERNEL); |
| 4719 | GFP_KERNEL); | ||
| 4720 | if (!qib_param_field) { | 4719 | if (!qib_param_field) { |
| 4721 | rc = -ENOMEM; | 4720 | rc = -ENOMEM; |
| 4722 | goto out_free_nothing; | 4721 | goto out_free_nothing; |
| @@ -2021,10 +2021,10 @@ static bool qeth_l2_vnicc_recover_char(struct qeth_card *card, u32 vnicc, · 2020 unmodified lines | |||
| 2021 | static void qeth_l2_vnicc_init(struct qeth_card *card) | 2021 | static void qeth_l2_vnicc_init(struct qeth_card *card) |
| 2022 | { | 2022 | { |
| 2023 | u32 *timeout = &card->options.vnicc.learning_timeout; | 2023 | u32 *timeout = &card->options.vnicc.learning_timeout; |
| 2024 | bool enable, error = false; | ||
| 2024 | unsigned int chars_len, i; | 2025 | unsigned int chars_len, i; |
| 2025 | unsigned long chars_tmp; | 2026 | unsigned long chars_tmp; |
| 2026 | u32 sup_cmds, vnicc; | 2027 | u32 sup_cmds, vnicc; |
| 2027 | bool enable, error; | ||
| 2028 | 2028 | ||
| 2029 | QETH_CARD_TEXT(card, 2, "vniccini"); | 2029 | QETH_CARD_TEXT(card, 2, "vniccini"); |
| 2030 | /* reset rx_bcast */ | 2030 | /* reset rx_bcast */ |
| @@ -2045,17 +2045,24 @@ static void qeth_l2_vnicc_init(struct qeth_card *card) · 14 unmodified lines | |||
| 2045 | chars_len = sizeof(card->options.vnicc.sup_chars) * BITS_PER_BYTE; | 2045 | chars_len = sizeof(card->options.vnicc.sup_chars) * BITS_PER_BYTE; |
| 2046 | for_each_set_bit(i, &chars_tmp, chars_len) { | 2046 | for_each_set_bit(i, &chars_tmp, chars_len) { |
| 2047 | vnicc = BIT(i); | 2047 | vnicc = BIT(i); |
| 2048 | qeth_l2_vnicc_query_cmds(card, vnicc, &sup_cmds); | 2048 | if (qeth_l2_vnicc_query_cmds(card, vnicc, &sup_cmds)) { |
| 2049 | if (!(sup_cmds & IPA_VNICC_SET_TIMEOUT) || | 2049 | sup_cmds = 0; |
| 2050 | !(sup_cmds & IPA_VNICC_GET_TIMEOUT)) | 2050 | error = true; |
| 2051 | } | ||
| 2052 | if ((sup_cmds & IPA_VNICC_SET_TIMEOUT) && | ||
| 2053 | (sup_cmds & IPA_VNICC_GET_TIMEOUT)) | ||
| 2054 | card->options.vnicc.getset_timeout_sup |= vnicc; | ||
| 2055 | else | ||
| 2051 | card->options.vnicc.getset_timeout_sup &= ~vnicc; | 2056 | card->options.vnicc.getset_timeout_sup &= ~vnicc; |
| 2052 | if (!(sup_cmds & IPA_VNICC_ENABLE) || | 2057 | if ((sup_cmds & IPA_VNICC_ENABLE) && |
| 2053 | !(sup_cmds & IPA_VNICC_DISABLE)) | 2058 | (sup_cmds & IPA_VNICC_DISABLE)) |
| 2059 | card->options.vnicc.set_char_sup |= vnicc; | ||
| 2060 | else | ||
| 2054 | card->options.vnicc.set_char_sup &= ~vnicc; | 2061 | card->options.vnicc.set_char_sup &= ~vnicc; |
| 2055 | } | 2062 | } |
| 2056 | /* enforce assumed default values and recover settings, if changed */ | 2063 | /* enforce assumed default values and recover settings, if changed */ |
| 2057 | error = qeth_l2_vnicc_recover_timeout(card, QETH_VNICC_LEARNING, | 2064 | error |= qeth_l2_vnicc_recover_timeout(card, QETH_VNICC_LEARNING, |
| 2058 | timeout); | 2065 | timeout); |
| 2059 | chars_tmp = card->options.vnicc.wanted_chars ^ QETH_VNICC_DEFAULT; | 2066 | chars_tmp = card->options.vnicc.wanted_chars ^ QETH_VNICC_DEFAULT; |
| 2060 | chars_tmp |= QETH_VNICC_BRIDGE_INVISIBLE; | 2067 | chars_tmp |= QETH_VNICC_BRIDGE_INVISIBLE; |
| 2061 | chars_len = sizeof(card->options.vnicc.wanted_chars) * BITS_PER_BYTE; | 2068 | chars_len = sizeof(card->options.vnicc.wanted_chars) * BITS_PER_BYTE; |
| @@ -27,6 +27,11 @@ · 26 unmodified lines | |||
| 27 | 27 | ||
| 28 | struct kmem_cache *zfcp_fsf_qtcb_cache; | 28 | struct kmem_cache *zfcp_fsf_qtcb_cache; |
| 29 | 29 | ||
| 30 | static bool ber_stop = true; | ||
| 31 | module_param(ber_stop, bool, 0600); | ||
| 32 | MODULE_PARM_DESC(ber_stop, | ||
| 33 | "Shuts down FCP devices for FCP channels that report a bit-error count in excess of its threshold (default on)"); | ||
| 34 | |||
| 30 | static void zfcp_fsf_request_timeout_handler(struct timer_list *t) | 35 | static void zfcp_fsf_request_timeout_handler(struct timer_list *t) |
| 31 | { | 36 | { |
| 32 | struct zfcp_fsf_req *fsf_req = from_timer(fsf_req, t, timer); | 37 | struct zfcp_fsf_req *fsf_req = from_timer(fsf_req, t, timer); |
| @@ -236,10 +241,15 @@ static void zfcp_fsf_status_read_handler(struct zfcp_fsf_req *req) · 203 unmodified lines | |||
| 236 | case FSF_STATUS_READ_SENSE_DATA_AVAIL: | 241 | case FSF_STATUS_READ_SENSE_DATA_AVAIL: |
| 237 | break; | 242 | break; |
| 238 | case FSF_STATUS_READ_BIT_ERROR_THRESHOLD: | 243 | case FSF_STATUS_READ_BIT_ERROR_THRESHOLD: |
| 239 | dev_warn(&adapter->ccw_device->dev, | ||
| 240 | "The error threshold for checksum statistics " | ||
| 241 | "has been exceeded\n"); | ||
| 242 | zfcp_dbf_hba_bit_err("fssrh_3", req); | 244 | zfcp_dbf_hba_bit_err("fssrh_3", req); |
| 245 | if (ber_stop) { | ||
| 246 | dev_warn(&adapter->ccw_device->dev, | ||
| 247 | "All paths over this FCP device are disused because of excessive bit errors\n"); | ||
| 248 | zfcp_erp_adapter_shutdown(adapter, 0, "fssrh_b"); | ||
| 249 | } else { | ||
| 250 | dev_warn(&adapter->ccw_device->dev, | ||
| 251 | "The error threshold for checksum statistics has been exceeded\n"); | ||
| 252 | } | ||
| 243 | break; | 253 | break; |
| 244 | case FSF_STATUS_READ_LINK_DOWN: | 254 | case FSF_STATUS_READ_LINK_DOWN: |
| 245 | zfcp_fsf_status_read_link_down(req); | 255 | zfcp_fsf_status_read_link_down(req); |
| @@ -1923,6 +1923,7 @@ void bnx2fc_process_scsi_cmd_compl(struct bnx2fc_cmd *io_req, · 1922 unmodified lines | |||
| 1923 | struct fcoe_fcp_rsp_payload *fcp_rsp; | 1923 | struct fcoe_fcp_rsp_payload *fcp_rsp; |
| 1924 | struct bnx2fc_rport *tgt = io_req->tgt; | 1924 | struct bnx2fc_rport *tgt = io_req->tgt; |
| 1925 | struct scsi_cmnd *sc_cmd; | 1925 | struct scsi_cmnd *sc_cmd; |
| 1926 | u16 scope = 0, qualifier = 0; | ||
| 1926 | 1927 | ||
| 1927 | /* scsi_cmd_cmpl is called with tgt lock held */ | 1928 | /* scsi_cmd_cmpl is called with tgt lock held */ |
| 1928 | 1929 | ||
| @@ -1990,12 +1991,30 @@ void bnx2fc_process_scsi_cmd_compl(struct bnx2fc_cmd *io_req, · 61 unmodified lines | |||
| 1990 | 1991 | ||
| 1991 | if (io_req->cdb_status == SAM_STAT_TASK_SET_FULL || | 1992 | if (io_req->cdb_status == SAM_STAT_TASK_SET_FULL || |
| 1992 | io_req->cdb_status == SAM_STAT_BUSY) { | 1993 | io_req->cdb_status == SAM_STAT_BUSY) { |
| 1993 | /* Set the jiffies + retry_delay_timer * 100ms | 1994 | /* Newer array firmware with BUSY or |
| 1994 | for the rport/tgt */ | 1995 | * TASK_SET_FULL may return a status that needs |
| 1995 | tgt->retry_delay_timestamp = jiffies + | 1996 | * the scope bits masked. |
| 1996 | fcp_rsp->retry_delay_timer * HZ / 10; | 1997 | * Or a huge delay timestamp up to 27 minutes |
| 1998 | * can result. | ||
| 1999 | */ | ||
| 2000 | if (fcp_rsp->retry_delay_timer) { | ||
| 2001 | /* Upper 2 bits */ | ||
| 2002 | scope = fcp_rsp->retry_delay_timer | ||
| 2003 | & 0xC000; | ||
| 2004 | /* Lower 14 bits */ | ||
| 2005 | qualifier = fcp_rsp->retry_delay_timer | ||
| 2006 | & 0x3FFF; | ||
| 2007 | } | ||
| 2008 | if (scope > 0 && qualifier > 0 && | ||
| 2009 | qualifier <= 0x3FEF) { | ||
| 2010 | /* Set the jiffies + | ||
| 2011 | * retry_delay_timer * 100ms | ||
| 2012 | * for the rport/tgt | ||
| 2013 | */ | ||
| 2014 | tgt->retry_delay_timestamp = jiffies + | ||
| 2015 | (qualifier * HZ / 10); | ||
| 2016 | } | ||
| 1997 | } | 2017 | } |
| 1998 | |||
| 1999 | } | 2018 | } |
| 2000 | if (io_req->fcp_resid) | 2019 | if (io_req->fcp_resid) |
| 2001 | scsi_set_resid(sc_cmd, io_req->fcp_resid); | 2020 | scsi_set_resid(sc_cmd, io_req->fcp_resid); |
| @@ -3683,7 +3683,7 @@ void hisi_sas_debugfs_work_handler(struct work_struct *work) · 3682 unmodified lines | |||
| 3683 | } | 3683 | } |
| 3684 | EXPORT_SYMBOL_GPL(hisi_sas_debugfs_work_handler); | 3684 | EXPORT_SYMBOL_GPL(hisi_sas_debugfs_work_handler); |
| 3685 | 3685 | ||
| 3686 | void hisi_sas_debugfs_release(struct hisi_hba *hisi_hba) | 3686 | static void hisi_sas_debugfs_release(struct hisi_hba *hisi_hba) |
| 3687 | { | 3687 | { |
| 3688 | struct device *dev = hisi_hba->dev; | 3688 | struct device *dev = hisi_hba->dev; |
| 3689 | int i; | 3689 | int i; |
| @@ -3705,7 +3705,7 @@ void hisi_sas_debugfs_release(struct hisi_hba *hisi_hba) · 15 unmodified lines | |||
| 3705 | devm_kfree(dev, hisi_hba->debugfs_port_reg[i]); | 3705 | devm_kfree(dev, hisi_hba->debugfs_port_reg[i]); |
| 3706 | } | 3706 | } |
| 3707 | 3707 | ||
| 3708 | int hisi_sas_debugfs_alloc(struct hisi_hba *hisi_hba) | 3708 | static int hisi_sas_debugfs_alloc(struct hisi_hba *hisi_hba) |
| 3709 | { | 3709 | { |
| 3710 | const struct hisi_sas_hw *hw = hisi_hba->hw; | 3710 | const struct hisi_sas_hw *hw = hisi_hba->hw; |
| 3711 | struct device *dev = hisi_hba->dev; | 3711 | struct device *dev = hisi_hba->dev; |
| @@ -3796,7 +3796,7 @@ fail: · 84 unmodified lines | |||
| 3796 | return -ENOMEM; | 3796 | return -ENOMEM; |
| 3797 | } | 3797 | } |
| 3798 | 3798 | ||
| 3799 | void hisi_sas_debugfs_bist_init(struct hisi_hba *hisi_hba) | 3799 | static void hisi_sas_debugfs_bist_init(struct hisi_hba *hisi_hba) |
| 3800 | { | 3800 | { |
| 3801 | hisi_hba->debugfs_bist_dentry = | 3801 | hisi_hba->debugfs_bist_dentry = |
| 3802 | debugfs_create_dir("bist", hisi_hba->debugfs_dir); | 3802 | debugfs_create_dir("bist", hisi_hba->debugfs_dir); |
| @@ -4183,11 +4183,11 @@ megaraid_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) · 4182 unmodified lines | |||
| 4183 | */ | 4183 | */ |
| 4184 | if (pdev->subsystem_vendor == PCI_VENDOR_ID_COMPAQ && | 4184 | if (pdev->subsystem_vendor == PCI_VENDOR_ID_COMPAQ && |
| 4185 | pdev->subsystem_device == 0xC000) | 4185 | pdev->subsystem_device == 0xC000) |
| 4186 | return -ENODEV; | 4186 | goto out_disable_device; |
| 4187 | /* Now check the magic signature byte */ | 4187 | /* Now check the magic signature byte */ |
| 4188 | pci_read_config_word(pdev, PCI_CONF_AMISIG, &magic); | 4188 | pci_read_config_word(pdev, PCI_CONF_AMISIG, &magic); |
| 4189 | if (magic != HBA_SIGNATURE_471 && magic != HBA_SIGNATURE) | 4189 | if (magic != HBA_SIGNATURE_471 && magic != HBA_SIGNATURE) |
| 4190 | return -ENODEV; | 4190 | goto out_disable_device; |
| 4191 | /* Ok it is probably a megaraid */ | 4191 | /* Ok it is probably a megaraid */ |
| 4192 | } | 4192 | } |
| 4193 | 4193 | ||
| @@ -596,7 +596,7 @@ static void qedf_dcbx_handler(void *dev, struct qed_dcbx_get *get, u32 mib_type) · 595 unmodified lines | |||
| 596 | tmp_prio = get->operational.app_prio.fcoe; | 596 | tmp_prio = get->operational.app_prio.fcoe; |
| 597 | if (qedf_default_prio > -1) | 597 | if (qedf_default_prio > -1) |
| 598 | qedf->prio = qedf_default_prio; | 598 | qedf->prio = qedf_default_prio; |
| 599 | else if (tmp_prio < 0 || tmp_prio > 7) { | 599 | else if (tmp_prio > 7) { |
| 600 | QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_DISC, | 600 | QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_DISC, |
| 601 | "FIP/FCoE prio %d out of range, setting to %d.\n", | 601 | "FIP/FCoE prio %d out of range, setting to %d.\n", |
| 602 | tmp_prio, QEDF_DEFAULT_PRIO); | 602 | tmp_prio, QEDF_DEFAULT_PRIO); |
| @@ -2920,6 +2920,8 @@ qla24xx_vport_delete(struct fc_vport *fc_vport) · 2919 unmodified lines | |||
| 2920 | struct qla_hw_data *ha = vha->hw; | 2920 | struct qla_hw_data *ha = vha->hw; |
| 2921 | uint16_t id = vha->vp_idx; | 2921 | uint16_t id = vha->vp_idx; |
| 2922 | 2922 | ||
| 2923 | set_bit(VPORT_DELETE, &vha->dpc_flags); | ||
| 2924 | |||
| 2923 | while (test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags) || | 2925 | while (test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags) || |
| 2924 | test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags)) | 2926 | test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags)) |
| 2925 | msleep(1000); | 2927 | msleep(1000); |
| @@ -2396,6 +2396,7 @@ typedef struct fc_port { · 2395 unmodified lines | |||
| 2396 | unsigned int query:1; | 2396 | unsigned int query:1; |
| 2397 | unsigned int id_changed:1; | 2397 | unsigned int id_changed:1; |
| 2398 | unsigned int scan_needed:1; | 2398 | unsigned int scan_needed:1; |
| 2399 | unsigned int n2n_flag:1; | ||
| 2399 | 2400 | ||
| 2400 | struct completion nvme_del_done; | 2401 | struct completion nvme_del_done; |
| 2401 | uint32_t nvme_prli_service_param; | 2402 | uint32_t nvme_prli_service_param; |
| @@ -2446,7 +2447,6 @@ typedef struct fc_port { · 44 unmodified lines | |||
| 2446 | uint8_t fc4_type; | 2447 | uint8_t fc4_type; |
| 2447 | uint8_t fc4f_nvme; | 2448 | uint8_t fc4f_nvme; |
| 2448 | uint8_t scan_state; | 2449 | uint8_t scan_state; |
| 2449 | uint8_t n2n_flag; | ||
| 2450 | 2450 | ||
| 2451 | unsigned long last_queue_full; | 2451 | unsigned long last_queue_full; |
| 2452 | unsigned long last_ramp_up; | 2452 | unsigned long last_ramp_up; |
| @@ -3036,6 +3036,7 @@ enum scan_flags_t { · 583 unmodified lines | |||
| 3036 | enum fc4type_t { | 3036 | enum fc4type_t { |
| 3037 | FS_FC4TYPE_FCP = BIT_0, | 3037 | FS_FC4TYPE_FCP = BIT_0, |
| 3038 | FS_FC4TYPE_NVME = BIT_1, | 3038 | FS_FC4TYPE_NVME = BIT_1, |
| 3039 | FS_FCP_IS_N2N = BIT_7, | ||
| 3039 | }; | 3040 | }; |
| 3040 | 3041 | ||
| 3041 | struct fab_scan_rp { | 3042 | struct fab_scan_rp { |
| @@ -4394,6 +4395,7 @@ typedef struct scsi_qla_host { · 1352 unmodified lines | |||
| 4394 | #define IOCB_WORK_ACTIVE 31 | 4395 | #define IOCB_WORK_ACTIVE 31 |
| 4395 | #define SET_ZIO_THRESHOLD_NEEDED 32 | 4396 | #define SET_ZIO_THRESHOLD_NEEDED 32 |
| 4396 | #define ISP_ABORT_TO_ROM 33 | 4397 | #define ISP_ABORT_TO_ROM 33 |
| 4398 | #define VPORT_DELETE 34 | ||
| 4397 | 4399 | ||
| 4398 | unsigned long pci_flags; | 4400 | unsigned long pci_flags; |
| 4399 | #define PFLG_DISCONNECTED 0 /* PCI device removed */ | 4401 | #define PFLG_DISCONNECTED 0 /* PCI device removed */ |
| @@ -3102,7 +3102,8 @@ int qla24xx_post_gpnid_work(struct scsi_qla_host *vha, port_id_t *id) · 3101 unmodified lines | |||
| 3102 | { | 3102 | { |
| 3103 | struct qla_work_evt *e; | 3103 | struct qla_work_evt *e; |
| 3104 | 3104 | ||
| 3105 | if (test_bit(UNLOADING, &vha->dpc_flags)) | 3105 | if (test_bit(UNLOADING, &vha->dpc_flags) || |
| 3106 | (vha->vp_idx && test_bit(VPORT_DELETE, &vha->dpc_flags))) | ||
| 3106 | return 0; | 3107 | return 0; |
| 3107 | 3108 | ||
| 3108 | e = qla2x00_alloc_work(vha, QLA_EVT_GPNID); | 3109 | e = qla2x00_alloc_work(vha, QLA_EVT_GPNID); |
| @@ -746,12 +746,15 @@ static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, · 745 unmodified lines | |||
| 746 | break; | 746 | break; |
| 747 | default: | 747 | default: |
| 748 | if ((id.b24 != fcport->d_id.b24 && | 748 | if ((id.b24 != fcport->d_id.b24 && |
| 749 | fcport->d_id.b24) || | 749 | fcport->d_id.b24 && |
| 750 | fcport->loop_id != FC_NO_LOOP_ID) || | ||
| 750 | (fcport->loop_id != FC_NO_LOOP_ID && | 751 | (fcport->loop_id != FC_NO_LOOP_ID && |
| 751 | fcport->loop_id != loop_id)) { | 752 | fcport->loop_id != loop_id)) { |
| 752 | ql_dbg(ql_dbg_disc, vha, 0x20e3, | 753 | ql_dbg(ql_dbg_disc, vha, 0x20e3, |
| 753 | "%s %d %8phC post del sess\n", | 754 | "%s %d %8phC post del sess\n", |
| 754 | __func__, __LINE__, fcport->port_name); | 755 | __func__, __LINE__, fcport->port_name); |
| 756 | if (fcport->n2n_flag) | ||
| 757 | fcport->d_id.b24 = 0; | ||
| 755 | qlt_schedule_sess_for_deletion(fcport); | 758 | qlt_schedule_sess_for_deletion(fcport); |
| 756 | return; | 759 | return; |
| 757 | } | 760 | } |
| @@ -759,6 +762,8 @@ static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, · 1 unmodified line | |||
| 759 | } | 762 | } |
| 760 | 763 | ||
| 761 | fcport->loop_id = loop_id; | 764 | fcport->loop_id = loop_id; |
| 765 | if (fcport->n2n_flag) | ||
| 766 | fcport->d_id.b24 = id.b24; | ||
| 762 | 767 | ||
| 763 | wwn = wwn_to_u64(fcport->port_name); | 768 | wwn = wwn_to_u64(fcport->port_name); |
| 764 | qlt_find_sess_invalidate_other(vha, wwn, | 769 | qlt_find_sess_invalidate_other(vha, wwn, |
| @@ -972,7 +977,7 @@ static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) · 207 unmodified lines | |||
| 972 | wwn = wwn_to_u64(e->port_name); | 977 | wwn = wwn_to_u64(e->port_name); |
| 973 | 978 | ||
| 974 | ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, | 979 | ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, |
| 975 | "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", | 980 | "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", |
| 976 | __func__, (void *)&wwn, e->port_id[2], e->port_id[1], | 981 | __func__, (void *)&wwn, e->port_id[2], e->port_id[1], |
| 977 | e->port_id[0], e->current_login_state, e->last_login_state, | 982 | e->port_id[0], e->current_login_state, e->last_login_state, |
| 978 | (loop_id & 0x7fff)); | 983 | (loop_id & 0x7fff)); |
| @@ -1499,7 +1504,8 @@ int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) · 520 unmodified lines | |||
| 1499 | (fcport->fw_login_state == DSC_LS_PRLI_PEND))) | 1504 | (fcport->fw_login_state == DSC_LS_PRLI_PEND))) |
| 1500 | return 0; | 1505 | return 0; |
| 1501 | 1506 | ||
| 1502 | if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { | 1507 | if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && |
| 1508 | !N2N_TOPO(vha->hw)) { | ||
| 1503 | if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { | 1509 | if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { |
| 1504 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | 1510 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); |
| 1505 | return 0; | 1511 | return 0; |
| @@ -1570,8 +1576,9 @@ int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) · 64 unmodified lines | |||
| 1570 | qla24xx_post_gpdb_work(vha, fcport, 0); | 1576 | qla24xx_post_gpdb_work(vha, fcport, 0); |
| 1571 | } else { | 1577 | } else { |
| 1572 | ql_dbg(ql_dbg_disc, vha, 0x2118, | 1578 | ql_dbg(ql_dbg_disc, vha, 0x2118, |
| 1573 | "%s %d %8phC post NVMe PRLI\n", | 1579 | "%s %d %8phC post %s PRLI\n", |
| 1574 | __func__, __LINE__, fcport->port_name); | 1580 | __func__, __LINE__, fcport->port_name, |
| 1581 | fcport->fc4f_nvme ? "NVME" : "FC"); | ||
| 1575 | qla24xx_post_prli_work(vha, fcport); | 1582 | qla24xx_post_prli_work(vha, fcport); |
| 1576 | } | 1583 | } |
| 1577 | break; | 1584 | break; |
| @@ -1853,17 +1860,38 @@ qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) · 275 unmodified lines | |||
| 1853 | break; | 1860 | break; |
| 1854 | } | 1861 | } |
| 1855 | 1862 | ||
| 1856 | if (ea->fcport->n2n_flag) { | 1863 | if (ea->fcport->fc4f_nvme) { |
| 1857 | ql_dbg(ql_dbg_disc, vha, 0x2118, | 1864 | ql_dbg(ql_dbg_disc, vha, 0x2118, |
| 1858 | "%s %d %8phC post fc4 prli\n", | 1865 | "%s %d %8phC post fc4 prli\n", |
| 1859 | __func__, __LINE__, ea->fcport->port_name); | 1866 | __func__, __LINE__, ea->fcport->port_name); |
| 1860 | ea->fcport->fc4f_nvme = 0; | 1867 | ea->fcport->fc4f_nvme = 0; |
| 1861 | ea->fcport->n2n_flag = 0; | ||
| 1862 | qla24xx_post_prli_work(vha, ea->fcport); | 1868 | qla24xx_post_prli_work(vha, ea->fcport); |
| 1869 | return; | ||
| 1870 | } | ||
| 1871 | |||
| 1872 | /* at this point both PRLI NVME & PRLI FCP failed */ | ||
| 1873 | if (N2N_TOPO(vha->hw)) { | ||
| 1874 | if (ea->fcport->n2n_link_reset_cnt < 3) { | ||
| 1875 | ea->fcport->n2n_link_reset_cnt++; | ||
| 1876 | /* | ||
| 1877 | * remote port is not sending Plogi. Reset | ||
| 1878 | * link to kick start his state machine | ||
| 1879 | */ | ||
| 1880 | set_bit(N2N_LINK_RESET, &vha->dpc_flags); | ||
| 1881 | } else { | ||
| 1882 | ql_log(ql_log_warn, vha, 0x2119, | ||
| 1883 | "%s %d %8phC Unable to reconnect\n", | ||
| 1884 | __func__, __LINE__, ea->fcport->port_name); | ||
| 1885 | } | ||
| 1886 | } else { | ||
| 1887 | /* | ||
| 1888 | * switch connect. login failed. Take connection | ||
| 1889 | * down and allow relogin to retrigger | ||
| 1890 | */ | ||
| 1891 | ea->fcport->flags &= ~FCF_ASYNC_SENT; | ||
| 1892 | ea->fcport->keep_nport_handle = 0; | ||
| 1893 | qlt_schedule_sess_for_deletion(ea->fcport); | ||
| 1863 | } | 1894 | } |
| 1864 | ql_dbg(ql_dbg_disc, vha, 0x2119, | ||
| 1865 | "%s %d %8phC unhandle event of %x\n", | ||
| 1866 | __func__, __LINE__, ea->fcport->port_name, ea->data[0]); | ||
| 1867 | break; | 1895 | break; |
| 1868 | } | 1896 | } |
| 1869 | } | 1897 | } |
| @@ -3190,7 +3218,7 @@ qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) · 1320 unmodified lines | |||
| 3190 | 3218 | ||
| 3191 | for (j = 0; j < 2; j++, fwdt++) { | 3219 | for (j = 0; j < 2; j++, fwdt++) { |
| 3192 | if (!fwdt->template) { | 3220 | if (!fwdt->template) { |
| 3193 | ql_log(ql_log_warn, vha, 0x00ba, | 3221 | ql_dbg(ql_dbg_init, vha, 0x00ba, |
| 3194 | "-> fwdt%u no template\n", j); | 3222 | "-> fwdt%u no template\n", j); |
| 3195 | continue; | 3223 | continue; |
| 3196 | } | 3224 | } |
| @@ -4986,28 +5014,47 @@ qla2x00_configure_local_loop(scsi_qla_host_t *vha) · 1789 unmodified lines | |||
| 4986 | unsigned long flags; | 5014 | unsigned long flags; |
| 4987 | 5015 | ||
| 4988 | /* Inititae N2N login. */ | 5016 | /* Inititae N2N login. */ |
| 4989 | if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { | 5017 | if (N2N_TOPO(ha)) { |
| 4990 | /* borrowing */ | 5018 | if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { |
| 4991 | u32 *bp, i, sz; | 5019 | /* borrowing */ |
| 4992 | 5020 | u32 *bp, i, sz; | |
| 4993 | memset(ha->init_cb, 0, ha->init_cb_size); | 5021 | |
| 4994 | sz = min_t(int, sizeof(struct els_plogi_payload), | 5022 | memset(ha->init_cb, 0, ha->init_cb_size); |
| 4995 | ha->init_cb_size); | 5023 | sz = min_t(int, sizeof(struct els_plogi_payload), |
| 4996 | rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, | 5024 | ha->init_cb_size); |
| 4997 | (void *)ha->init_cb, sz); | 5025 | rval = qla24xx_get_port_login_templ(vha, |
| 4998 | if (rval == QLA_SUCCESS) { | 5026 | ha->init_cb_dma, (void *)ha->init_cb, sz); |
| 4999 | bp = (uint32_t *)ha->init_cb; | 5027 | if (rval == QLA_SUCCESS) { |
| 5000 | for (i = 0; i < sz/4 ; i++, bp++) | 5028 | bp = (uint32_t *)ha->init_cb; |
| 5001 | *bp = cpu_to_be32(*bp); | 5029 | for (i = 0; i < sz/4 ; i++, bp++) |
| 5030 | *bp = cpu_to_be32(*bp); | ||
| 5002 | 5031 | ||
| 5003 | memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb, | 5032 | memcpy(&ha->plogi_els_payld.data, |
| 5004 | sizeof(ha->plogi_els_payld.data)); | 5033 | (void *)ha->init_cb, |
| 5005 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); | 5034 | sizeof(ha->plogi_els_payld.data)); |
| 5006 | } else { | 5035 | set_bit(RELOGIN_NEEDED, &vha->dpc_flags); |
| 5007 | ql_dbg(ql_dbg_init, vha, 0x00d1, | 5036 | } else { |
| 5008 | "PLOGI ELS param read fail.\n"); | 5037 | ql_dbg(ql_dbg_init, vha, 0x00d1, |
| 5038 | "PLOGI ELS param read fail.\n"); | ||
| 5039 | goto skip_login; | ||
| 5040 | } | ||
| 5041 | } | ||
| 5042 | |||
| 5043 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | ||
| 5044 | if (fcport->n2n_flag) { | ||
| 5045 | qla24xx_fcport_handle_login(vha, fcport); | ||
| 5046 | return QLA_SUCCESS; | ||
| 5047 | } | ||
| 5048 | } | ||
| 5049 | skip_login: | ||
| 5050 | spin_lock_irqsave(&vha->work_lock, flags); | ||
| 5051 | vha->scan.scan_retry++; | ||
| 5052 | spin_unlock_irqrestore(&vha->work_lock, flags); | ||
| 5053 | |||
| 5054 | if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { | ||
| 5055 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | ||
| 5056 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | ||
| 5009 | } | 5057 | } |
| 5010 | return QLA_SUCCESS; | ||
| 5011 | } | 5058 | } |
| 5012 | 5059 | ||
| 5013 | found_devs = 0; | 5060 | found_devs = 0; |
| @@ -2656,9 +2656,10 @@ qla24xx_els_logo_iocb(srb_t *sp, struct els_entry_24xx *els_iocb) · 2655 unmodified lines | |||
| 2656 | els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa; | 2656 | els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa; |
| 2657 | els_iocb->port_id[1] = sp->fcport->d_id.b.area; | 2657 | els_iocb->port_id[1] = sp->fcport->d_id.b.area; |
| 2658 | els_iocb->port_id[2] = sp->fcport->d_id.b.domain; | 2658 | els_iocb->port_id[2] = sp->fcport->d_id.b.domain; |
| 2659 | els_iocb->s_id[0] = vha->d_id.b.al_pa; | 2659 | /* For SID the byte order is different than DID */ |
| 2660 | els_iocb->s_id[1] = vha->d_id.b.area; | 2660 | els_iocb->s_id[1] = vha->d_id.b.al_pa; |
| 2661 | els_iocb->s_id[2] = vha->d_id.b.domain; | 2661 | els_iocb->s_id[2] = vha->d_id.b.area; |
| 2662 | els_iocb->s_id[0] = vha->d_id.b.domain; | ||
| 2662 | 2663 | ||
| 2663 | if (elsio->u.els_logo.els_cmd == ELS_DCMD_PLOGI) { | 2664 | if (elsio->u.els_logo.els_cmd == ELS_DCMD_PLOGI) { |
| 2664 | els_iocb->control_flags = 0; | 2665 | els_iocb->control_flags = 0; |
| @@ -2837,8 +2837,6 @@ qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) · 2836 unmodified lines | |||
| 2837 | if (sense_len == 0) { | 2837 | if (sense_len == 0) { |
| 2838 | rsp->status_srb = NULL; | 2838 | rsp->status_srb = NULL; |
| 2839 | sp->done(sp, cp->result); | 2839 | sp->done(sp, cp->result); |
| 2840 | } else { | ||
| 2841 | WARN_ON_ONCE(true); | ||
| 2842 | } | 2840 | } |
| 2843 | } | 2841 | } |
| 2844 | 2842 | ||
| @@ -2249,7 +2249,7 @@ qla2x00_lip_reset(scsi_qla_host_t *vha) · 2248 unmodified lines | |||
| 2249 | mbx_cmd_t mc; | 2249 | mbx_cmd_t mc; |
| 2250 | mbx_cmd_t *mcp = &mc; | 2250 | mbx_cmd_t *mcp = &mc; |
| 2251 | 2251 | ||
| 2252 | ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a, | 2252 | ql_dbg(ql_dbg_disc, vha, 0x105a, |
| 2253 | "Entered %s.\n", __func__); | 2253 | "Entered %s.\n", __func__); |
| 2254 | 2254 | ||
| 2255 | if (IS_CNA_CAPABLE(vha->hw)) { | 2255 | if (IS_CNA_CAPABLE(vha->hw)) { |
| @@ -3883,14 +3883,24 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha, · 1627 unmodified lines | |||
| 3883 | case TOPO_N2N: | 3883 | case TOPO_N2N: |
| 3884 | ha->current_topology = ISP_CFG_N; | 3884 | ha->current_topology = ISP_CFG_N; |
| 3885 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); | 3885 | spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); |
| 3886 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | ||
| 3887 | fcport->scan_state = QLA_FCPORT_SCAN; | ||
| 3888 | fcport->n2n_flag = 0; | ||
| 3889 | } | ||
| 3890 | |||
| 3886 | fcport = qla2x00_find_fcport_by_wwpn(vha, | 3891 | fcport = qla2x00_find_fcport_by_wwpn(vha, |
| 3887 | rptid_entry->u.f1.port_name, 1); | 3892 | rptid_entry->u.f1.port_name, 1); |
| 3888 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); | 3893 | spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); |
| 3889 | 3894 | ||
| 3890 | if (fcport) { | 3895 | if (fcport) { |
| 3891 | fcport->plogi_nack_done_deadline = jiffies + HZ; | 3896 | fcport->plogi_nack_done_deadline = jiffies + HZ; |
| 3892 | fcport->dm_login_expire = jiffies + 3*HZ; | 3897 | fcport->dm_login_expire = jiffies + 2*HZ; |
| 3893 | fcport->scan_state = QLA_FCPORT_FOUND; | 3898 | fcport->scan_state = QLA_FCPORT_FOUND; |
| 3899 | fcport->n2n_flag = 1; | ||
| 3900 | fcport->keep_nport_handle = 1; | ||
| 3901 | if (vha->flags.nvme_enabled) | ||
| 3902 | fcport->fc4f_nvme = 1; | ||
| 3903 | |||
| 3894 | switch (fcport->disc_state) { | 3904 | switch (fcport->disc_state) { |
| 3895 | case DSC_DELETED: | 3905 | case DSC_DELETED: |
| 3896 | set_bit(RELOGIN_NEEDED, | 3906 | set_bit(RELOGIN_NEEDED, |
| @@ -3924,7 +3934,7 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha, · 27 unmodified lines | |||
| 3924 | rptid_entry->u.f1.port_name, | 3934 | rptid_entry->u.f1.port_name, |
| 3925 | rptid_entry->u.f1.node_name, | 3935 | rptid_entry->u.f1.node_name, |
| 3926 | NULL, | 3936 | NULL, |
| 3927 | FC4_TYPE_UNKNOWN); | 3937 | FS_FCP_IS_N2N); |
| 3928 | } | 3938 | } |
| 3929 | 3939 | ||
| 3930 | /* if our portname is higher then initiate N2N login */ | 3940 | /* if our portname is higher then initiate N2N login */ |
| @@ -4023,6 +4033,7 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha, · 92 unmodified lines | |||
| 4023 | 4033 | ||
| 4024 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | 4034 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
| 4025 | fcport->scan_state = QLA_FCPORT_SCAN; | 4035 | fcport->scan_state = QLA_FCPORT_SCAN; |
| 4036 | fcport->n2n_flag = 0; | ||
| 4026 | } | 4037 | } |
| 4027 | 4038 | ||
| 4028 | fcport = qla2x00_find_fcport_by_wwpn(vha, | 4039 | fcport = qla2x00_find_fcport_by_wwpn(vha, |
| @@ -4032,6 +4043,14 @@ qla24xx_report_id_acquisition(scsi_qla_host_t *vha, · 3 unmodified lines | |||
| 4032 | fcport->login_retry = vha->hw->login_retry_count; | 4043 | fcport->login_retry = vha->hw->login_retry_count; |
| 4033 | fcport->plogi_nack_done_deadline = jiffies + HZ; | 4044 | fcport->plogi_nack_done_deadline = jiffies + HZ; |
| 4034 | fcport->scan_state = QLA_FCPORT_FOUND; | 4045 | fcport->scan_state = QLA_FCPORT_FOUND; |
| 4046 | fcport->keep_nport_handle = 1; | ||
| 4047 | fcport->n2n_flag = 1; | ||
| 4048 | fcport->d_id.b.domain = | ||
| 4049 | rptid_entry->u.f2.remote_nport_id[2]; | ||
| 4050 | fcport->d_id.b.area = | ||
| 4051 | rptid_entry->u.f2.remote_nport_id[1]; | ||
| 4052 | fcport->d_id.b.al_pa = | ||
| 4053 | rptid_entry->u.f2.remote_nport_id[0]; | ||
| 4035 | } | 4054 | } |
| 4036 | } | 4055 | } |
| 4037 | } | 4056 | } |
| @@ -66,6 +66,7 @@ qla24xx_deallocate_vp_id(scsi_qla_host_t *vha) · 65 unmodified lines | |||
| 66 | uint16_t vp_id; | 66 | uint16_t vp_id; |
| 67 | struct qla_hw_data *ha = vha->hw; | 67 | struct qla_hw_data *ha = vha->hw; |
| 68 | unsigned long flags = 0; | 68 | unsigned long flags = 0; |
| 69 | u8 i; | ||
| 69 | 70 | ||
| 70 | mutex_lock(&ha->vport_lock); | 71 | mutex_lock(&ha->vport_lock); |
| 71 | /* | 72 | /* |
| @@ -75,8 +76,9 @@ qla24xx_deallocate_vp_id(scsi_qla_host_t *vha) · 3 unmodified lines | |||
| 75 | * ensures no active vp_list traversal while the vport is removed | 76 | * ensures no active vp_list traversal while the vport is removed |
| 76 | * from the queue) | 77 | * from the queue) |
| 77 | */ | 78 | */ |
| 78 | wait_event_timeout(vha->vref_waitq, !atomic_read(&vha->vref_count), | 79 | for (i = 0; i < 10 && atomic_read(&vha->vref_count); i++) |
| 79 | 10*HZ); | 80 | wait_event_timeout(vha->vref_waitq, |
| 81 | atomic_read(&vha->vref_count), HZ); | ||
| 80 | 82 | ||
| 81 | spin_lock_irqsave(&ha->vport_slock, flags); | 83 | spin_lock_irqsave(&ha->vport_slock, flags); |
| 82 | if (atomic_read(&vha->vref_count)) { | 84 | if (atomic_read(&vha->vref_count)) { |
| @@ -262,6 +264,9 @@ qla2x00_alert_all_vps(struct rsp_que *rsp, uint16_t *mb) · 179 unmodified lines | |||
| 262 | spin_lock_irqsave(&ha->vport_slock, flags); | 264 | spin_lock_irqsave(&ha->vport_slock, flags); |
| 263 | list_for_each_entry(vha, &ha->vp_list, list) { | 265 | list_for_each_entry(vha, &ha->vp_list, list) { |
| 264 | if (vha->vp_idx) { | 266 | if (vha->vp_idx) { |
| 267 | if (test_bit(VPORT_DELETE, &vha->dpc_flags)) | ||
| 268 | continue; | ||
| 269 | |||
| 265 | atomic_inc(&vha->vref_count); | 270 | atomic_inc(&vha->vref_count); |
| 266 | spin_unlock_irqrestore(&ha->vport_slock, flags); | 271 | spin_unlock_irqrestore(&ha->vport_slock, flags); |
| 267 | 272 | ||
| @@ -300,6 +305,20 @@ qla2x00_alert_all_vps(struct rsp_que *rsp, uint16_t *mb) · 32 unmodified lines | |||
| 300 | int | 305 | int |
| 301 | qla2x00_vp_abort_isp(scsi_qla_host_t *vha) | 306 | qla2x00_vp_abort_isp(scsi_qla_host_t *vha) |
| 302 | { | 307 | { |
| 308 | fc_port_t *fcport; | ||
| 309 | |||
| 310 | /* | ||
| 311 | * To exclusively reset vport, we need to log it out first. | ||
| 312 | * Note: This control_vp can fail if ISP reset is already | ||
| 313 | * issued, this is expected, as the vp would be already | ||
| 314 | * logged out due to ISP reset. | ||
| 315 | */ | ||
| 316 | if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { | ||
| 317 | qla24xx_control_vp(vha, VCE_COMMAND_DISABLE_VPS_LOGO_ALL); | ||
| 318 | list_for_each_entry(fcport, &vha->vp_fcports, list) | ||
| 319 | fcport->logout_on_delete = 0; | ||
| 320 | } | ||
| 321 | |||
| 303 | /* | 322 | /* |
| 304 | * Physical port will do most of the abort and recovery work. We can | 323 | * Physical port will do most of the abort and recovery work. We can |
| 305 | * just treat it as a loop down | 324 | * just treat it as a loop down |
| @@ -312,16 +331,9 @@ qla2x00_vp_abort_isp(scsi_qla_host_t *vha) · 6 unmodified lines | |||
| 312 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | 331 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); |
| 313 | } | 332 | } |
| 314 | 333 | ||
| 315 | /* | ||
| 316 | * To exclusively reset vport, we need to log it out first. Note: this | ||
| 317 | * control_vp can fail if ISP reset is already issued, this is | ||
| 318 | * expected, as the vp would be already logged out due to ISP reset. | ||
| 319 | */ | ||
| 320 | if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) | ||
| 321 | qla24xx_control_vp(vha, VCE_COMMAND_DISABLE_VPS_LOGO_ALL); | ||
| 322 | |||
| 323 | ql_dbg(ql_dbg_taskm, vha, 0x801d, | 334 | ql_dbg(ql_dbg_taskm, vha, 0x801d, |
| 324 | "Scheduling enable of Vport %d.\n", vha->vp_idx); | 335 | "Scheduling enable of Vport %d.\n", vha->vp_idx); |
| 336 | |||
| 325 | return qla24xx_enable_vp(vha); | 337 | return qla24xx_enable_vp(vha); |
| 326 | } | 338 | } |
| 327 | 339 | ||
| @@ -1115,9 +1115,15 @@ static inline int test_fcport_count(scsi_qla_host_t *vha) · 1114 unmodified lines | |||
| 1115 | void | 1115 | void |
| 1116 | qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha) | 1116 | qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha) |
| 1117 | { | 1117 | { |
| 1118 | u8 i; | ||
| 1119 | |||
| 1118 | qla2x00_mark_all_devices_lost(vha, 0); | 1120 | qla2x00_mark_all_devices_lost(vha, 0); |
| 1119 | 1121 | ||
| 1120 | wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ); | 1122 | for (i = 0; i < 10; i++) |
| 1123 | wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), | ||
| 1124 | HZ); | ||
| 1125 | |||
| 1126 | flush_workqueue(vha->hw->wq); | ||
| 1121 | } | 1127 | } |
| 1122 | 1128 | ||
| 1123 | /* | 1129 | /* |
| @@ -5036,6 +5042,10 @@ void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e) · 3912 unmodified lines | |||
| 5036 | 5042 | ||
| 5037 | memcpy(fcport->port_name, e->u.new_sess.port_name, | 5043 | memcpy(fcport->port_name, e->u.new_sess.port_name, |
| 5038 | WWN_SIZE); | 5044 | WWN_SIZE); |
| 5045 | |||
| 5046 | if (e->u.new_sess.fc4_type & FS_FCP_IS_N2N) | ||
| 5047 | fcport->n2n_flag = 1; | ||
| 5048 | |||
| 5039 | } else { | 5049 | } else { |
| 5040 | ql_dbg(ql_dbg_disc, vha, 0xffff, | 5050 | ql_dbg(ql_dbg_disc, vha, 0xffff, |
| 5041 | "%s %8phC mem alloc fail.\n", | 5051 | "%s %8phC mem alloc fail.\n", |
| @@ -5134,11 +5144,9 @@ void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e) · 92 unmodified lines | |||
| 5134 | if (dfcp) | 5144 | if (dfcp) |
| 5135 | qlt_schedule_sess_for_deletion(tfcp); | 5145 | qlt_schedule_sess_for_deletion(tfcp); |
| 5136 | 5146 | ||
| 5137 | |||
| 5138 | if (N2N_TOPO(vha->hw)) | ||
| 5139 | fcport->flags &= ~FCF_FABRIC_DEVICE; | ||
| 5140 | |||
| 5141 | if (N2N_TOPO(vha->hw)) { | 5147 | if (N2N_TOPO(vha->hw)) { |
| 5148 | fcport->flags &= ~FCF_FABRIC_DEVICE; | ||
| 5149 | fcport->keep_nport_handle = 1; | ||
| 5142 | if (vha->flags.nvme_enabled) { | 5150 | if (vha->flags.nvme_enabled) { |
| 5143 | fcport->fc4f_nvme = 1; | 5151 | fcport->fc4f_nvme = 1; |
| 5144 | fcport->n2n_flag = 1; | 5152 | fcport->n2n_flag = 1; |
| @@ -953,7 +953,7 @@ void qlt_free_session_done(struct work_struct *work) · 952 unmodified lines | |||
| 953 | struct qla_hw_data *ha = vha->hw; | 953 | struct qla_hw_data *ha = vha->hw; |
| 954 | unsigned long flags; | 954 | unsigned long flags; |
| 955 | bool logout_started = false; | 955 | bool logout_started = false; |
| 956 | scsi_qla_host_t *base_vha; | 956 | scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); |
| 957 | struct qlt_plogi_ack_t *own = | 957 | struct qlt_plogi_ack_t *own = |
| 958 | sess->plogi_link[QLT_PLOGI_LINK_SAME_WWN]; | 958 | sess->plogi_link[QLT_PLOGI_LINK_SAME_WWN]; |
| 959 | 959 | ||
| @@ -1020,6 +1020,7 @@ void qlt_free_session_done(struct work_struct *work) · 60 unmodified lines | |||
| 1020 | 1020 | ||
| 1021 | if (logout_started) { | 1021 | if (logout_started) { |
| 1022 | bool traced = false; | 1022 | bool traced = false; |
| 1023 | u16 cnt = 0; | ||
| 1023 | 1024 | ||
| 1024 | while (!READ_ONCE(sess->logout_completed)) { | 1025 | while (!READ_ONCE(sess->logout_completed)) { |
| 1025 | if (!traced) { | 1026 | if (!traced) { |
| @@ -1029,6 +1030,9 @@ void qlt_free_session_done(struct work_struct *work) · 3 unmodified lines | |||
| 1029 | traced = true; | 1030 | traced = true; |
| 1030 | } | 1031 | } |
| 1031 | msleep(100); | 1032 | msleep(100); |
| 1033 | cnt++; | ||
| 1034 | if (cnt > 200) | ||
| 1035 | break; | ||
| 1032 | } | 1036 | } |
| 1033 | 1037 | ||
| 1034 | ql_dbg(ql_dbg_disc, vha, 0xf087, | 1038 | ql_dbg(ql_dbg_disc, vha, 0xf087, |
| @@ -1101,6 +1105,7 @@ void qlt_free_session_done(struct work_struct *work) · 66 unmodified lines | |||
| 1101 | } | 1105 | } |
| 1102 | 1106 | ||
| 1103 | spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); | 1107 | spin_unlock_irqrestore(&ha->tgt.sess_lock, flags); |
| 1108 | sess->free_pending = 0; | ||
| 1104 | 1109 | ||
| 1105 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf001, | 1110 | ql_dbg(ql_dbg_tgt_mgt, vha, 0xf001, |
| 1106 | "Unregistration of sess %p %8phC finished fcp_cnt %d\n", | 1111 | "Unregistration of sess %p %8phC finished fcp_cnt %d\n", |
| @@ -1109,17 +1114,9 @@ void qlt_free_session_done(struct work_struct *work) · 2 unmodified lines | |||
| 1109 | if (tgt && (tgt->sess_count == 0)) | 1114 | if (tgt && (tgt->sess_count == 0)) |
| 1110 | wake_up_all(&tgt->waitQ); | 1115 | wake_up_all(&tgt->waitQ); |
| 1111 | 1116 | ||
| 1112 | if (vha->fcport_count == 0) | 1117 | if (!test_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags) && |
| 1113 | wake_up_all(&vha->fcport_waitQ); | 1118 | !(vha->vp_idx && test_bit(VPORT_DELETE, &vha->dpc_flags)) && |
| 1114 | 1119 | (!tgt || !tgt->tgt_stop) && !LOOP_TRANSITION(vha)) { | |
| 1115 | base_vha = pci_get_drvdata(ha->pdev); | ||
| 1116 | |||
| 1117 | sess->free_pending = 0; | ||
| 1118 | |||
| 1119 | if (test_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags)) | ||
| 1120 | return; | ||
| 1121 | |||
| 1122 | if ((!tgt || !tgt->tgt_stop) && !LOOP_TRANSITION(vha)) { | ||
| 1123 | switch (vha->host->active_mode) { | 1120 | switch (vha->host->active_mode) { |
| 1124 | case MODE_INITIATOR: | 1121 | case MODE_INITIATOR: |
| 1125 | case MODE_DUAL: | 1122 | case MODE_DUAL: |
| @@ -1132,6 +1129,9 @@ void qlt_free_session_done(struct work_struct *work) · 6 unmodified lines | |||
| 1132 | break; | 1129 | break; |
| 1133 | } | 1130 | } |
| 1134 | } | 1131 | } |
| 1132 | |||
| 1133 | if (vha->fcport_count == 0) | ||
| 1134 | wake_up_all(&vha->fcport_waitQ); | ||
| 1135 | } | 1135 | } |
| 1136 | 1136 | ||
| 1137 | /* ha->tgt.sess_lock supposed to be held on entry */ | 1137 | /* ha->tgt.sess_lock supposed to be held on entry */ |
| @@ -1161,7 +1161,7 @@ void qlt_unreg_sess(struct fc_port *sess) · 23 unmodified lines | |||
| 1161 | sess->last_login_gen = sess->login_gen; | 1161 | sess->last_login_gen = sess->login_gen; |
| 1162 | 1162 | ||
| 1163 | INIT_WORK(&sess->free_work, qlt_free_session_done); | 1163 | INIT_WORK(&sess->free_work, qlt_free_session_done); |
| 1164 | schedule_work(&sess->free_work); | 1164 | queue_work(sess->vha->hw->wq, &sess->free_work); |
| 1165 | } | 1165 | } |
| 1166 | EXPORT_SYMBOL(qlt_unreg_sess); | 1166 | EXPORT_SYMBOL(qlt_unreg_sess); |
| 1167 | 1167 | ||
| @@ -967,6 +967,7 @@ void scsi_eh_prep_cmnd(struct scsi_cmnd *scmd, struct scsi_eh_save *ses, · 966 unmodified lines | |||
| 967 | ses->data_direction = scmd->sc_data_direction; | 967 | ses->data_direction = scmd->sc_data_direction; |
| 968 | ses->sdb = scmd->sdb; | 968 | ses->sdb = scmd->sdb; |
| 969 | ses->result = scmd->result; | 969 | ses->result = scmd->result; |
| 970 | ses->resid_len = scmd->req.resid_len; | ||
| 970 | ses->underflow = scmd->underflow; | 971 | ses->underflow = scmd->underflow; |
| 971 | ses->prot_op = scmd->prot_op; | 972 | ses->prot_op = scmd->prot_op; |
| 972 | ses->eh_eflags = scmd->eh_eflags; | 973 | ses->eh_eflags = scmd->eh_eflags; |
| @@ -977,6 +978,7 @@ void scsi_eh_prep_cmnd(struct scsi_cmnd *scmd, struct scsi_eh_save *ses, · 4 unmodified lines | |||
| 977 | memset(scmd->cmnd, 0, BLK_MAX_CDB); | 978 | memset(scmd->cmnd, 0, BLK_MAX_CDB); |
| 978 | memset(&scmd->sdb, 0, sizeof(scmd->sdb)); | 979 | memset(&scmd->sdb, 0, sizeof(scmd->sdb)); |
| 979 | scmd->result = 0; | 980 | scmd->result = 0; |
| 981 | scmd->req.resid_len = 0; | ||
| 980 | 982 | ||
| 981 | if (sense_bytes) { | 983 | if (sense_bytes) { |
| 982 | scmd->sdb.length = min_t(unsigned, SCSI_SENSE_BUFFERSIZE, | 984 | scmd->sdb.length = min_t(unsigned, SCSI_SENSE_BUFFERSIZE, |
| @@ -1029,6 +1031,7 @@ void scsi_eh_restore_cmnd(struct scsi_cmnd* scmd, struct scsi_eh_save *ses) · 46 unmodified lines | |||
| 1029 | scmd->sc_data_direction = ses->data_direction; | 1031 | scmd->sc_data_direction = ses->data_direction; |
| 1030 | scmd->sdb = ses->sdb; | 1032 | scmd->sdb = ses->sdb; |
| 1031 | scmd->result = ses->result; | 1033 | scmd->result = ses->result; |
| 1034 | scmd->req.resid_len = ses->resid_len; | ||
| 1032 | scmd->underflow = ses->underflow; | 1035 | scmd->underflow = ses->underflow; |
| 1033 | scmd->prot_op = ses->prot_op; | 1036 | scmd->prot_op = ses->prot_op; |
| 1034 | scmd->eh_eflags = ses->eh_eflags; | 1037 | scmd->eh_eflags = ses->eh_eflags; |
| @@ -1834,6 +1834,7 @@ static const struct blk_mq_ops scsi_mq_ops_no_commit = { · 1833 unmodified lines | |||
| 1834 | .init_request = scsi_mq_init_request, | 1834 | .init_request = scsi_mq_init_request, |
| 1835 | .exit_request = scsi_mq_exit_request, | 1835 | .exit_request = scsi_mq_exit_request, |
| 1836 | .initialize_rq_fn = scsi_initialize_rq, | 1836 | .initialize_rq_fn = scsi_initialize_rq, |
| 1837 | .cleanup_rq = scsi_cleanup_rq, | ||
| 1837 | .busy = scsi_mq_lld_busy, | 1838 | .busy = scsi_mq_lld_busy, |
| 1838 | .map_queues = scsi_map_queues, | 1839 | .map_queues = scsi_map_queues, |
| 1839 | }; | 1840 | }; |
| @@ -1921,7 +1922,8 @@ struct scsi_device *scsi_device_from_queue(struct request_queue *q) · 81 unmodified lines | |||
| 1921 | { | 1922 | { |
| 1922 | struct scsi_device *sdev = NULL; | 1923 | struct scsi_device *sdev = NULL; |
| 1923 | 1924 | ||
| 1924 | if (q->mq_ops == &scsi_mq_ops) | 1925 | if (q->mq_ops == &scsi_mq_ops_no_commit || |
| 1926 | q->mq_ops == &scsi_mq_ops) | ||
| 1925 | sdev = q->queuedata; | 1927 | sdev = q->queuedata; |
| 1926 | if (!sdev || !get_device(&sdev->sdev_gendev)) | 1928 | if (!sdev || !get_device(&sdev->sdev_gendev)) |
| 1927 | sdev = NULL; | 1929 | sdev = NULL; |
| @@ -1654,7 +1654,8 @@ static int sd_sync_cache(struct scsi_disk *sdkp, struct scsi_sense_hdr *sshdr) · 1653 unmodified lines | |||
| 1654 | /* we need to evaluate the error return */ | 1654 | /* we need to evaluate the error return */ |
| 1655 | if (scsi_sense_valid(sshdr) && | 1655 | if (scsi_sense_valid(sshdr) && |
| 1656 | (sshdr->asc == 0x3a || /* medium not present */ | 1656 | (sshdr->asc == 0x3a || /* medium not present */ |
| 1657 | sshdr->asc == 0x20)) /* invalid command */ | 1657 | sshdr->asc == 0x20 || /* invalid command */ |
| 1658 | (sshdr->asc == 0x74 && sshdr->ascq == 0x71))) /* drive is password locked */ | ||
| 1658 | /* this is no error here */ | 1659 | /* this is no error here */ |
| 1659 | return 0; | 1660 | return 0; |
| 1660 | 1661 | ||
| @@ -1837,8 +1837,7 @@ static int storvsc_probe(struct hv_device *device, · 1836 unmodified lines | |||
| 1837 | /* | 1837 | /* |
| 1838 | * Set the number of HW queues we are supporting. | 1838 | * Set the number of HW queues we are supporting. |
| 1839 | */ | 1839 | */ |
| 1840 | if (stor_device->num_sc != 0) | 1840 | host->nr_hw_queues = num_present_cpus(); |
| 1841 | host->nr_hw_queues = stor_device->num_sc + 1; | ||
| 1842 | 1841 | ||
| 1843 | /* | 1842 | /* |
| 1844 | * Set the error handler work queue. | 1843 | * Set the error handler work queue. |
| @@ -8143,6 +8143,9 @@ int ufshcd_shutdown(struct ufs_hba *hba) · 8142 unmodified lines | |||
| 8143 | { | 8143 | { |
| 8144 | int ret = 0; | 8144 | int ret = 0; |
| 8145 | 8145 | ||
| 8146 | if (!hba->is_powered) | ||
| 8147 | goto out; | ||
| 8148 | |||
| 8146 | if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba)) | 8149 | if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba)) |
| 8147 | goto out; | 8150 | goto out; |
| 8148 | 8151 | ||
| @@ -1,3 +1,4 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | ||
| 1 | config EXFAT_FS | 2 | config EXFAT_FS |
| 2 | tristate "exFAT fs support" | 3 | tristate "exFAT fs support" |
| 3 | depends on BLOCK | 4 | depends on BLOCK |
| @@ -6,7 +7,7 @@ config EXFAT_FS · 2 unmodified lines | |||
| 6 | This adds support for the exFAT file system. | 7 | This adds support for the exFAT file system. |
| 7 | 8 | ||
| 8 | config EXFAT_DONT_MOUNT_VFAT | 9 | config EXFAT_DONT_MOUNT_VFAT |
| 9 | bool "Prohibit mounting of fat/vfat filesysems by exFAT" | 10 | bool "Prohibit mounting of fat/vfat filesystems by exFAT" |
| 10 | depends on EXFAT_FS | 11 | depends on EXFAT_FS |
| 11 | default y | 12 | default y |
| 12 | help | 13 | help |
| @@ -1,4 +1,4 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | 1 | # SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | 2 | ||
| 3 | obj-$(CONFIG_EXFAT_FS) += exfat.o | 3 | obj-$(CONFIG_EXFAT_FS) += exfat.o |
| 4 | 4 | ||
| @@ -1,4 +1,4 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 */ | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
| 2 | /* | 2 | /* |
| 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. | 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. |
| 4 | */ | 4 | */ |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* | 2 | /* |
| 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. | 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. |
| 4 | */ | 4 | */ |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* | 2 | /* |
| 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. | 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. |
| 4 | */ | 4 | */ |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* | 2 | /* |
| 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. | 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. |
| 4 | */ | 4 | */ |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* | 2 | /* |
| 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. | 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. |
| 4 | */ | 4 | */ |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* | 2 | /* |
| 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. | 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. |
| 4 | */ | 4 | */ |
| @@ -7,6 +7,7 @@ · 2 unmodified lines | |||
| 7 | #include <linux/init.h> | 7 | #include <linux/init.h> |
| 8 | #include <linux/time.h> | 8 | #include <linux/time.h> |
| 9 | #include <linux/slab.h> | 9 | #include <linux/slab.h> |
| 10 | #include <linux/mm.h> | ||
| 10 | #include <linux/seq_file.h> | 11 | #include <linux/seq_file.h> |
| 11 | #include <linux/pagemap.h> | 12 | #include <linux/pagemap.h> |
| 12 | #include <linux/mpage.h> | 13 | #include <linux/mpage.h> |
| @@ -3450,7 +3451,7 @@ static void exfat_free_super(struct exfat_sb_info *sbi) · 3437 unmodified lines | |||
| 3450 | kfree(sbi->options.iocharset); | 3451 | kfree(sbi->options.iocharset); |
| 3451 | /* mutex_init is in exfat_fill_super function. only for 3.7+ */ | 3452 | /* mutex_init is in exfat_fill_super function. only for 3.7+ */ |
| 3452 | mutex_destroy(&sbi->s_lock); | 3453 | mutex_destroy(&sbi->s_lock); |
| 3453 | kfree(sbi); | 3454 | kvfree(sbi); |
| 3454 | } | 3455 | } |
| 3455 | 3456 | ||
| 3456 | static void exfat_put_super(struct super_block *sb) | 3457 | static void exfat_put_super(struct super_block *sb) |
| @@ -3845,7 +3846,7 @@ static int exfat_fill_super(struct super_block *sb, void *data, int silent) · 388 unmodified lines | |||
| 3845 | * the filesystem, since we're only just about to mount | 3846 | * the filesystem, since we're only just about to mount |
| 3846 | * it and have no inodes etc active! | 3847 | * it and have no inodes etc active! |
| 3847 | */ | 3848 | */ |
| 3848 | sbi = kzalloc(sizeof(struct exfat_sb_info), GFP_KERNEL); | 3849 | sbi = kvzalloc(sizeof(*sbi), GFP_KERNEL); |
| 3849 | if (!sbi) | 3850 | if (!sbi) |
| 3850 | return -ENOMEM; | 3851 | return -ENOMEM; |
| 3851 | mutex_init(&sbi->s_lock); | 3852 | mutex_init(&sbi->s_lock); |
| @@ -1,4 +1,4 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| 2 | /* | 2 | /* |
| 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. | 3 | * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd. |
| 4 | */ | 4 | */ |
| @@ -1,7 +1,7 @@ | |||
| 1 | # SPDX-License-Identifier: GPL-2.0 | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | menuconfig FB_TFT | 2 | menuconfig FB_TFT |
| 3 | tristate "Support for small TFT LCD display modules" | 3 | tristate "Support for small TFT LCD display modules" |
| 4 | depends on FB && SPI | 4 | depends on FB && SPI && OF |
| 5 | depends on GPIOLIB || COMPILE_TEST | 5 | depends on GPIOLIB || COMPILE_TEST |
| 6 | select FB_SYS_FILLRECT | 6 | select FB_SYS_FILLRECT |
| 7 | select FB_SYS_COPYAREA | 7 | select FB_SYS_COPYAREA |
| @@ -199,13 +199,3 @@ config FB_TFT_WATTEROTT · 191 unmodified lines | |||
| 199 | depends on FB_TFT | 199 | depends on FB_TFT |
| 200 | help | 200 | help |
| 201 | Generic Framebuffer support for WATTEROTT | 201 | Generic Framebuffer support for WATTEROTT |
| 202 | |||
| 203 | config FB_FLEX | ||
| 204 | tristate "Generic FB driver for TFT LCD displays" | ||
| 205 | depends on FB_TFT | ||
| 206 | help | ||
| 207 | Generic Framebuffer support for TFT LCD displays. | ||
| 208 | |||
| 209 | config FB_TFT_FBTFT_DEVICE | ||
| 210 | tristate "Module to for adding FBTFT devices" | ||
| 211 | depends on FB_TFT | ||
| @@ -36,7 +36,3 @@ obj-$(CONFIG_FB_TFT_UC1611) += fb_uc1611.o · 35 unmodified lines | |||
| 36 | obj-$(CONFIG_FB_TFT_UC1701) += fb_uc1701.o | 36 | obj-$(CONFIG_FB_TFT_UC1701) += fb_uc1701.o |
| 37 | obj-$(CONFIG_FB_TFT_UPD161704) += fb_upd161704.o | 37 | obj-$(CONFIG_FB_TFT_UPD161704) += fb_upd161704.o |
| 38 | obj-$(CONFIG_FB_TFT_WATTEROTT) += fb_watterott.o | 38 | obj-$(CONFIG_FB_TFT_WATTEROTT) += fb_watterott.o |
| 39 | obj-$(CONFIG_FB_FLEX) += flexfb.o | ||
| 40 | |||
| 41 | # Device modules | ||
| 42 | obj-$(CONFIG_FB_TFT_FBTFT_DEVICE) += fbtft_device.o | ||
| @@ -714,7 +714,7 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display, · 713 unmodified lines | |||
| 714 | if (par->gamma.curves && gamma) { | 714 | if (par->gamma.curves && gamma) { |
| 715 | if (fbtft_gamma_parse_str(par, par->gamma.curves, gamma, | 715 | if (fbtft_gamma_parse_str(par, par->gamma.curves, gamma, |
| 716 | strlen(gamma))) | 716 | strlen(gamma))) |
| 717 | goto alloc_fail; | 717 | goto release_framebuf; |
| 718 | } | 718 | } |
| 719 | 719 | ||
| 720 | /* Transmit buffer */ | 720 | /* Transmit buffer */ |
| @@ -731,7 +731,7 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display, · 10 unmodified lines | |||
| 731 | if (txbuflen > 0) { | 731 | if (txbuflen > 0) { |
| 732 | txbuf = devm_kzalloc(par->info->device, txbuflen, GFP_KERNEL); | 732 | txbuf = devm_kzalloc(par->info->device, txbuflen, GFP_KERNEL); |
| 733 | if (!txbuf) | 733 | if (!txbuf) |
| 734 | goto alloc_fail; | 734 | goto release_framebuf; |
| 735 | par->txbuf.buf = txbuf; | 735 | par->txbuf.buf = txbuf; |
| 736 | par->txbuf.len = txbuflen; | 736 | par->txbuf.len = txbuflen; |
| 737 | } | 737 | } |
| @@ -753,6 +753,9 @@ struct fb_info *fbtft_framebuffer_alloc(struct fbtft_display *display, · 15 unmodified lines | |||
| 753 | 753 | ||
| 754 | return info; | 754 | return info; |
| 755 | 755 | ||
| 756 | release_framebuf: | ||
| 757 | framebuffer_release(info); | ||
| 758 | |||
| 756 | alloc_fail: | 759 | alloc_fail: |
| 757 | vfree(vmem); | 760 | vfree(vmem); |
| 758 | 761 | ||
| @@ -1,1261 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0+ | ||
| 2 | /* | ||
| 3 | * | ||
| 4 | * Copyright (C) 2013, Noralf Tronnes | ||
| 5 | */ | ||
| 6 | |||
| 7 | #define pr_fmt(fmt) "fbtft_device: " fmt | ||
| 8 | #include <linux/module.h> | ||
| 9 | #include <linux/kernel.h> | ||
| 10 | #include <linux/init.h> | ||
| 11 | #include <linux/gpio/consumer.h> | ||
| 12 | #include <linux/spi/spi.h> | ||
| 13 | #include <video/mipi_display.h> | ||
| 14 | |||
| 15 | #include "fbtft.h" | ||
| 16 | |||
| 17 | #define MAX_GPIOS 32 | ||
| 18 | |||
| 19 | static struct spi_device *spi_device; | ||
| 20 | static struct platform_device *p_device; | ||
| 21 | |||
| 22 | static char *name; | ||
| 23 | module_param(name, charp, 0000); | ||
| 24 | MODULE_PARM_DESC(name, | ||
| 25 | "Devicename (required). name=list => list all supported devices."); | ||
| 26 | |||
| 27 | static unsigned int rotate; | ||
| 28 | module_param(rotate, uint, 0000); | ||
| 29 | MODULE_PARM_DESC(rotate, | ||
| 30 | "Angle to rotate display counter clockwise: 0, 90, 180, 270"); | ||
| 31 | |||
| 32 | static unsigned int busnum; | ||
| 33 | module_param(busnum, uint, 0000); | ||
| 34 | MODULE_PARM_DESC(busnum, "SPI bus number (default=0)"); | ||
| 35 | |||
| 36 | static unsigned int cs; | ||
| 37 | module_param(cs, uint, 0000); | ||
| 38 | MODULE_PARM_DESC(cs, "SPI chip select (default=0)"); | ||
| 39 | |||
| 40 | static unsigned int speed; | ||
| 41 | module_param(speed, uint, 0000); | ||
| 42 | MODULE_PARM_DESC(speed, "SPI speed (override device default)"); | ||
| 43 | |||
| 44 | static int mode = -1; | ||
| 45 | module_param(mode, int, 0000); | ||
| 46 | MODULE_PARM_DESC(mode, "SPI mode (override device default)"); | ||
| 47 | |||
| 48 | static unsigned int fps; | ||
| 49 | module_param(fps, uint, 0000); | ||
| 50 | MODULE_PARM_DESC(fps, "Frames per second (override driver default)"); | ||
| 51 | |||
| 52 | static char *gamma; | ||
| 53 | module_param(gamma, charp, 0000); | ||
| 54 | MODULE_PARM_DESC(gamma, | ||
| 55 | "String representation of Gamma Curve(s). Driver specific."); | ||
| 56 | |||
| 57 | static int txbuflen; | ||
| 58 | module_param(txbuflen, int, 0000); | ||
| 59 | MODULE_PARM_DESC(txbuflen, "txbuflen (override driver default)"); | ||
| 60 | |||
| 61 | static int bgr = -1; | ||
| 62 | module_param(bgr, int, 0000); | ||
| 63 | MODULE_PARM_DESC(bgr, | ||
| 64 | "BGR bit (supported by some drivers)."); | ||
| 65 | |||
| 66 | static unsigned int startbyte; | ||
| 67 | module_param(startbyte, uint, 0000); | ||
| 68 | MODULE_PARM_DESC(startbyte, "Sets the Start byte used by some SPI displays."); | ||
| 69 | |||
| 70 | static bool custom; | ||
| 71 | module_param(custom, bool, 0000); | ||
| 72 | MODULE_PARM_DESC(custom, "Add a custom display device. Use speed= argument to make it a SPI device, else platform_device"); | ||
| 73 | |||
| 74 | static unsigned int width; | ||
| 75 | module_param(width, uint, 0000); | ||
| 76 | MODULE_PARM_DESC(width, "Display width, used with the custom argument"); | ||
| 77 | |||
| 78 | static unsigned int height; | ||
| 79 | module_param(height, uint, 0000); | ||
| 80 | MODULE_PARM_DESC(height, "Display height, used with the custom argument"); | ||
| 81 | |||
| 82 | static unsigned int buswidth = 8; | ||
| 83 | module_param(buswidth, uint, 0000); | ||
| 84 | MODULE_PARM_DESC(buswidth, "Display bus width, used with the custom argument"); | ||
| 85 | |||
| 86 | static s16 init[FBTFT_MAX_INIT_SEQUENCE]; | ||
| 87 | static int init_num; | ||
| 88 | module_param_array(init, short, &init_num, 0000); | ||
| 89 | MODULE_PARM_DESC(init, "Init sequence, used with the custom argument"); | ||
| 90 | |||
| 91 | static unsigned long debug; | ||
| 92 | module_param(debug, ulong, 0000); | ||
| 93 | MODULE_PARM_DESC(debug, | ||
| 94 | "level: 0-7 (the remaining 29 bits is for advanced usage)"); | ||
| 95 | |||
| 96 | static unsigned int verbose = 3; | ||
| 97 | module_param(verbose, uint, 0000); | ||
| 98 | MODULE_PARM_DESC(verbose, | ||
| 99 | "0 silent, >1 show devices, >2 show devices before (default=3)"); | ||
| 100 | |||
| 101 | struct fbtft_device_display { | ||
| 102 | char *name; | ||
| 103 | struct spi_board_info *spi; | ||
| 104 | struct platform_device *pdev; | ||
| 105 | }; | ||
| 106 | |||
| 107 | static void fbtft_device_pdev_release(struct device *dev); | ||
| 108 | |||
| 109 | static int write_gpio16_wr_slow(struct fbtft_par *par, void *buf, size_t len); | ||
| 110 | static void adafruit18_green_tab_set_addr_win(struct fbtft_par *par, | ||
| 111 | int xs, int ys, int xe, int ye); | ||
| 112 | |||
| 113 | #define ADAFRUIT18_GAMMA \ | ||
| 114 | "02 1c 07 12 37 32 29 2d 29 25 2B 39 00 01 03 10\n" \ | ||
| 115 | "03 1d 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10" | ||
| 116 | |||
| 117 | #define CBERRY28_GAMMA \ | ||
| 118 | "D0 00 14 15 13 2C 42 43 4E 09 16 14 18 21\n" \ | ||
| 119 | "D0 00 14 15 13 0B 43 55 53 0C 17 14 23 20" | ||
| 120 | |||
| 121 | static const s16 cberry28_init_sequence[] = { | ||
| 122 | /* turn off sleep mode */ | ||
| 123 | -1, MIPI_DCS_EXIT_SLEEP_MODE, | ||
| 124 | -2, 120, | ||
| 125 | |||
| 126 | /* set pixel format to RGB-565 */ | ||
| 127 | -1, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT, | ||
| 128 | |||
| 129 | -1, 0xB2, 0x0C, 0x0C, 0x00, 0x33, 0x33, | ||
| 130 | |||
| 131 | /* | ||
| 132 | * VGH = 13.26V | ||
| 133 | * VGL = -10.43V | ||
| 134 | */ | ||
| 135 | -1, 0xB7, 0x35, | ||
| 136 | |||
| 137 | /* | ||
| 138 | * VDV and VRH register values come from command write | ||
| 139 | * (instead of NVM) | ||
| 140 | */ | ||
| 141 | -1, 0xC2, 0x01, 0xFF, | ||
| 142 | |||
| 143 | /* | ||
| 144 | * VAP = 4.7V + (VCOM + VCOM offset + 0.5 * VDV) | ||
| 145 | * VAN = -4.7V + (VCOM + VCOM offset + 0.5 * VDV) | ||
| 146 | */ | ||
| 147 | -1, 0xC3, 0x17, | ||
| 148 | |||
| 149 | /* VDV = 0V */ | ||
| 150 | -1, 0xC4, 0x20, | ||
| 151 | |||
| 152 | /* VCOM = 0.675V */ | ||
| 153 | -1, 0xBB, 0x17, | ||
| 154 | |||
| 155 | /* VCOM offset = 0V */ | ||
| 156 | -1, 0xC5, 0x20, | ||
| 157 | |||
| 158 | /* | ||
| 159 | * AVDD = 6.8V | ||
| 160 | * AVCL = -4.8V | ||
| 161 | * VDS = 2.3V | ||
| 162 | */ | ||
| 163 | -1, 0xD0, 0xA4, 0xA1, | ||
| 164 | |||
| 165 | -1, MIPI_DCS_SET_DISPLAY_ON, | ||
| 166 | |||
| 167 | -3, | ||
| 168 | }; | ||
| 169 | |||
| 170 | static const s16 hy28b_init_sequence[] = { | ||
| 171 | -1, 0x00e7, 0x0010, -1, 0x0000, 0x0001, | ||
| 172 | -1, 0x0001, 0x0100, -1, 0x0002, 0x0700, | ||
| 173 | -1, 0x0003, 0x1030, -1, 0x0004, 0x0000, | ||
| 174 | -1, 0x0008, 0x0207, -1, 0x0009, 0x0000, | ||
| 175 | -1, 0x000a, 0x0000, -1, 0x000c, 0x0001, | ||
| 176 | -1, 0x000d, 0x0000, -1, 0x000f, 0x0000, | ||
| 177 | -1, 0x0010, 0x0000, -1, 0x0011, 0x0007, | ||
| 178 | -1, 0x0012, 0x0000, -1, 0x0013, 0x0000, | ||
| 179 | -2, 50, -1, 0x0010, 0x1590, -1, 0x0011, | ||
| 180 | 0x0227, -2, 50, -1, 0x0012, 0x009c, -2, 50, | ||
| 181 | -1, 0x0013, 0x1900, -1, 0x0029, 0x0023, | ||
| 182 | -1, 0x002b, 0x000e, -2, 50, | ||
| 183 | -1, 0x0020, 0x0000, -1, 0x0021, 0x0000, | ||
| 184 | -2, 50, -1, 0x0050, 0x0000, | ||
| 185 | -1, 0x0051, 0x00ef, -1, 0x0052, 0x0000, | ||
| 186 | -1, 0x0053, 0x013f, -1, 0x0060, 0xa700, | ||
| 187 | -1, 0x0061, 0x0001, -1, 0x006a, 0x0000, | ||
| 188 | -1, 0x0080, 0x0000, -1, 0x0081, 0x0000, | ||
| 189 | -1, 0x0082, 0x0000, -1, 0x0083, 0x0000, | ||
| 190 | -1, 0x0084, 0x0000, -1, 0x0085, 0x0000, | ||
| 191 | -1, 0x0090, 0x0010, -1, 0x0092, 0x0000, | ||
| 192 | -1, 0x0093, 0x0003, -1, 0x0095, 0x0110, | ||
| 193 | -1, 0x0097, 0x0000, -1, 0x0098, 0x0000, | ||
| 194 | -1, 0x0007, 0x0133, -1, 0x0020, 0x0000, | ||
| 195 | -1, 0x0021, 0x0000, -2, 100, -3 }; | ||
| 196 | |||
| 197 | #define HY28B_GAMMA \ | ||
| 198 | "04 1F 4 7 7 0 7 7 6 0\n" \ | ||
| 199 | "0F 00 1 7 4 0 0 0 6 7" | ||
| 200 | |||
| 201 | static const s16 pitft_init_sequence[] = { | ||
| 202 | -1, MIPI_DCS_SOFT_RESET, | ||
| 203 | -2, 5, | ||
| 204 | -1, MIPI_DCS_SET_DISPLAY_OFF, | ||
| 205 | -1, 0xEF, 0x03, 0x80, 0x02, | ||
| 206 | -1, 0xCF, 0x00, 0xC1, 0x30, | ||
| 207 | -1, 0xED, 0x64, 0x03, 0x12, 0x81, | ||
| 208 | -1, 0xE8, 0x85, 0x00, 0x78, | ||
| 209 | -1, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02, | ||
| 210 | -1, 0xF7, 0x20, | ||
| 211 | -1, 0xEA, 0x00, 0x00, | ||
| 212 | -1, 0xC0, 0x23, | ||
| 213 | -1, 0xC1, 0x10, | ||
| 214 | -1, 0xC5, 0x3E, 0x28, | ||
| 215 | -1, 0xC7, 0x86, | ||
| 216 | -1, MIPI_DCS_SET_PIXEL_FORMAT, 0x55, | ||
| 217 | -1, 0xB1, 0x00, 0x18, | ||
| 218 | -1, 0xB6, 0x08, 0x82, 0x27, | ||
| 219 | -1, 0xF2, 0x00, | ||
| 220 | -1, MIPI_DCS_SET_GAMMA_CURVE, 0x01, | ||
| 221 | -1, 0xE0, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E, | ||
| 222 | 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00, | ||
| 223 | -1, 0xE1, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31, | ||
| 224 | 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, | ||
| 225 | -1, MIPI_DCS_EXIT_SLEEP_MODE, | ||
| 226 | -2, 100, | ||
| 227 | -1, MIPI_DCS_SET_DISPLAY_ON, | ||
| 228 | -2, 20, | ||
| 229 | -3 | ||
| 230 | }; | ||
| 231 | |||
| 232 | static const s16 waveshare32b_init_sequence[] = { | ||
| 233 | -1, 0xCB, 0x39, 0x2C, 0x00, 0x34, 0x02, | ||
| 234 | -1, 0xCF, 0x00, 0xC1, 0x30, | ||
| 235 | -1, 0xE8, 0x85, 0x00, 0x78, | ||
| 236 | -1, 0xEA, 0x00, 0x00, | ||
| 237 | -1, 0xED, 0x64, 0x03, 0x12, 0x81, | ||
| 238 | -1, 0xF7, 0x20, | ||
| 239 | -1, 0xC0, 0x23, | ||
| 240 | -1, 0xC1, 0x10, | ||
| 241 | -1, 0xC5, 0x3E, 0x28, | ||
| 242 | -1, 0xC7, 0x86, | ||
| 243 | -1, MIPI_DCS_SET_ADDRESS_MODE, 0x28, | ||
| 244 | -1, MIPI_DCS_SET_PIXEL_FORMAT, 0x55, | ||
| 245 | -1, 0xB1, 0x00, 0x18, | ||
| 246 | -1, 0xB6, 0x08, 0x82, 0x27, | ||
| 247 | -1, 0xF2, 0x00, | ||
| 248 | -1, MIPI_DCS_SET_GAMMA_CURVE, 0x01, | ||
| 249 | -1, 0xE0, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, 0x4E, | ||
| 250 | 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00, | ||
| 251 | -1, 0xE1, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, 0x31, | ||
| 252 | 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, | ||
| 253 | -1, MIPI_DCS_EXIT_SLEEP_MODE, | ||
| 254 | -2, 120, | ||
| 255 | -1, MIPI_DCS_SET_DISPLAY_ON, | ||
| 256 | -1, MIPI_DCS_WRITE_MEMORY_START, | ||
| 257 | -3 | ||
| 258 | }; | ||
| 259 | |||
| 260 | #define PIOLED_GAMMA "0 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 " \ | ||
| 261 | "2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 " \ | ||
| 262 | "3 3 3 4 4 4 4 4 4 4 4 4 4 4 4" | ||
| 263 | |||
| 264 | /* Supported displays in alphabetical order */ | ||
| 265 | static struct fbtft_device_display displays[] = { | ||
| 266 | { | ||
| 267 | .name = "adafruit18", | ||
| 268 | .spi = &(struct spi_board_info) { | ||
| 269 | .modalias = "fb_st7735r", | ||
| 270 | .max_speed_hz = 32000000, | ||
| 271 | .mode = SPI_MODE_0, | ||
| 272 | .platform_data = &(struct fbtft_platform_data) { | ||
| 273 | .display = { | ||
| 274 | .buswidth = 8, | ||
| 275 | .backlight = 1, | ||
| 276 | }, | ||
| 277 | .gamma = ADAFRUIT18_GAMMA, | ||
| 278 | } | ||
| 279 | } | ||
| 280 | }, { | ||
| 281 | .name = "adafruit18_green", | ||
| 282 | .spi = &(struct spi_board_info) { | ||
| 283 | .modalias = "fb_st7735r", | ||
| 284 | .max_speed_hz = 4000000, | ||
| 285 | .mode = SPI_MODE_0, | ||
| 286 | .platform_data = &(struct fbtft_platform_data) { | ||
| 287 | .display = { | ||
| 288 | .buswidth = 8, | ||
| 289 | .backlight = 1, | ||
| 290 | .fbtftops.set_addr_win = | ||
| 291 | adafruit18_green_tab_set_addr_win, | ||
| 292 | }, | ||
| 293 | .bgr = true, | ||
| 294 | .gamma = ADAFRUIT18_GAMMA, | ||
| 295 | } | ||
| 296 | } | ||
| 297 | }, { | ||
| 298 | .name = "adafruit22", | ||
| 299 | .spi = &(struct spi_board_info) { | ||
| 300 | .modalias = "fb_hx8340bn", | ||
| 301 | .max_speed_hz = 32000000, | ||
| 302 | .mode = SPI_MODE_0, | ||
| 303 | .platform_data = &(struct fbtft_platform_data) { | ||
| 304 | .display = { | ||
| 305 | .buswidth = 9, | ||
| 306 | .backlight = 1, | ||
| 307 | }, | ||
| 308 | .bgr = true, | ||
| 309 | } | ||
| 310 | } | ||
| 311 | }, { | ||
| 312 | .name = "adafruit22a", | ||
| 313 | .spi = &(struct spi_board_info) { | ||
| 314 | .modalias = "fb_ili9340", | ||
| 315 | .max_speed_hz = 32000000, | ||
| 316 | .mode = SPI_MODE_0, | ||
| 317 | .platform_data = &(struct fbtft_platform_data) { | ||
| 318 | .display = { | ||
| 319 | .buswidth = 8, | ||
| 320 | .backlight = 1, | ||
| 321 | }, | ||
| 322 | .bgr = true, | ||
| 323 | } | ||
| 324 | } | ||
| 325 | }, { | ||
| 326 | .name = "adafruit28", | ||
| 327 | .spi = &(struct spi_board_info) { | ||
| 328 | .modalias = "fb_ili9341", | ||
| 329 | .max_speed_hz = 32000000, | ||
| 330 | .mode = SPI_MODE_0, | ||
| 331 | .platform_data = &(struct fbtft_platform_data) { | ||
| 332 | .display = { | ||
| 333 | .buswidth = 8, | ||
| 334 | .backlight = 1, | ||
| 335 | }, | ||
| 336 | .bgr = true, | ||
| 337 | } | ||
| 338 | } | ||
| 339 | }, { | ||
| 340 | .name = "adafruit13m", | ||
| 341 | .spi = &(struct spi_board_info) { | ||
| 342 | .modalias = "fb_ssd1306", | ||
| 343 | .max_speed_hz = 16000000, | ||
| 344 | .mode = SPI_MODE_0, | ||
| 345 | .platform_data = &(struct fbtft_platform_data) { | ||
| 346 | .display = { | ||
| 347 | .buswidth = 8, | ||
| 348 | }, | ||
| 349 | } | ||
| 350 | } | ||
| 351 | }, { | ||
| 352 | .name = "admatec_c-berry28", | ||
| 353 | .spi = &(struct spi_board_info) { | ||
| 354 | .modalias = "fb_st7789v", | ||
| 355 | .max_speed_hz = 48000000, | ||
| 356 | .mode = SPI_MODE_0, | ||
| 357 | .platform_data = &(struct fbtft_platform_data) { | ||
| 358 | .display = { | ||
| 359 | .buswidth = 8, | ||
| 360 | .backlight = 1, | ||
| 361 | .init_sequence = cberry28_init_sequence, | ||
| 362 | }, | ||
| 363 | .gamma = CBERRY28_GAMMA, | ||
| 364 | } | ||
| 365 | } | ||
| 366 | }, { | ||
| 367 | .name = "agm1264k-fl", | ||
| 368 | .pdev = &(struct platform_device) { | ||
| 369 | .name = "fb_agm1264k-fl", | ||
| 370 | .id = 0, | ||
| 371 | .dev = { | ||
| 372 | .release = fbtft_device_pdev_release, | ||
| 373 | .platform_data = &(struct fbtft_platform_data) { | ||
| 374 | .display = { | ||
| 375 | .buswidth = 8, | ||
| 376 | .backlight = FBTFT_ONBOARD_BACKLIGHT, | ||
| 377 | }, | ||
| 378 | }, | ||
| 379 | } | ||
| 380 | } | ||
| 381 | }, { | ||
| 382 | .name = "dogs102", | ||
| 383 | .spi = &(struct spi_board_info) { | ||
| 384 | .modalias = "fb_uc1701", | ||
| 385 | .max_speed_hz = 8000000, | ||
| 386 | .mode = SPI_MODE_0, | ||
| 387 | .platform_data = &(struct fbtft_platform_data) { | ||
| 388 | .display = { | ||
| 389 | .buswidth = 8, | ||
| 390 | }, | ||
| 391 | .bgr = true, | ||
| 392 | } | ||
| 393 | } | ||
| 394 | }, { | ||
| 395 | .name = "er_tftm050_2", | ||
| 396 | .spi = &(struct spi_board_info) { | ||
| 397 | .modalias = "fb_ra8875", | ||
| 398 | .max_speed_hz = 5000000, | ||
| 399 | .mode = SPI_MODE_3, | ||
| 400 | .platform_data = &(struct fbtft_platform_data) { | ||
| 401 | .display = { | ||
| 402 | .buswidth = 8, | ||
| 403 | .backlight = 1, | ||
| 404 | .width = 480, | ||
| 405 | .height = 272, | ||
| 406 | }, | ||
| 407 | .bgr = true, | ||
| 408 | } | ||
| 409 | } | ||
| 410 | }, { | ||
| 411 | .name = "er_tftm070_5", | ||
| 412 | .spi = &(struct spi_board_info) { | ||
| 413 | .modalias = "fb_ra8875", | ||
| 414 | .max_speed_hz = 5000000, | ||
| 415 | .mode = SPI_MODE_3, | ||
| 416 | .platform_data = &(struct fbtft_platform_data) { | ||
| 417 | .display = { | ||
| 418 | .buswidth = 8, | ||
| 419 | .backlight = 1, | ||
| 420 | .width = 800, | ||
| 421 | .height = 480, | ||
| 422 | }, | ||
| 423 | .bgr = true, | ||
| 424 | } | ||
| 425 | } | ||
| 426 | }, { | ||
| 427 | .name = "ew24ha0", | ||
| 428 | .spi = &(struct spi_board_info) { | ||
| 429 | .modalias = "fb_uc1611", | ||
| 430 | .max_speed_hz = 32000000, | ||
| 431 | .mode = SPI_MODE_3, | ||
| 432 | .platform_data = &(struct fbtft_platform_data) { | ||
| 433 | .display = { | ||
| 434 | .buswidth = 8, | ||
| 435 | }, | ||
| 436 | } | ||
| 437 | } | ||
| 438 | }, { | ||
| 439 | .name = "ew24ha0_9bit", | ||
| 440 | .spi = &(struct spi_board_info) { | ||
| 441 | .modalias = "fb_uc1611", | ||
| 442 | .max_speed_hz = 32000000, | ||
| 443 | .mode = SPI_MODE_3, | ||
| 444 | .platform_data = &(struct fbtft_platform_data) { | ||
| 445 | .display = { | ||
| 446 | .buswidth = 9, | ||
| 447 | }, | ||
| 448 | } | ||
| 449 | } | ||
| 450 | }, { | ||
| 451 | .name = "flexfb", | ||
| 452 | .spi = &(struct spi_board_info) { | ||
| 453 | .modalias = "flexfb", | ||
| 454 | .max_speed_hz = 32000000, | ||
| 455 | .mode = SPI_MODE_0, | ||
| 456 | } | ||
| 457 | }, { | ||
| 458 | .name = "flexpfb", | ||
| 459 | .pdev = &(struct platform_device) { | ||
| 460 | .name = "flexpfb", | ||
| 461 | .id = 0, | ||
| 462 | .dev = { | ||
| 463 | .release = fbtft_device_pdev_release, | ||
| 464 | } | ||
| 465 | } | ||
| 466 | }, { | ||
| 467 | .name = "freetronicsoled128", | ||
| 468 | .spi = &(struct spi_board_info) { | ||
| 469 | .modalias = "fb_ssd1351", | ||
| 470 | .max_speed_hz = 20000000, | ||
| 471 | .mode = SPI_MODE_0, | ||
| 472 | .platform_data = &(struct fbtft_platform_data) { | ||
| 473 | .display = { | ||
| 474 | .buswidth = 8, | ||
| 475 | .backlight = FBTFT_ONBOARD_BACKLIGHT, | ||
| 476 | }, | ||
| 477 | .bgr = true, | ||
| 478 | } | ||
| 479 | } | ||
| 480 | }, { | ||
| 481 | .name = "hx8353d", | ||
| 482 | .spi = &(struct spi_board_info) { | ||
| 483 | .modalias = "fb_hx8353d", | ||
| 484 | .max_speed_hz = 16000000, | ||
| 485 | .mode = SPI_MODE_0, | ||
| 486 | .platform_data = &(struct fbtft_platform_data) { | ||
| 487 | .display = { | ||
| 488 | .buswidth = 8, | ||
| 489 | .backlight = 1, | ||
| 490 | }, | ||
| 491 | } | ||
| 492 | } | ||
| 493 | }, { | ||
| 494 | .name = "hy28a", | ||
| 495 | .spi = &(struct spi_board_info) { | ||
| 496 | .modalias = "fb_ili9320", | ||
| 497 | .max_speed_hz = 32000000, | ||
| 498 | .mode = SPI_MODE_3, | ||
| 499 | .platform_data = &(struct fbtft_platform_data) { | ||
| 500 | .display = { | ||
| 501 | .buswidth = 8, | ||
| 502 | .backlight = 1, | ||
| 503 | }, | ||
| 504 | .startbyte = 0x70, | ||
| 505 | .bgr = true, | ||
| 506 | } | ||
| 507 | } | ||
| 508 | }, { | ||
| 509 | .name = "hy28b", | ||
| 510 | .spi = &(struct spi_board_info) { | ||
| 511 | .modalias = "fb_ili9325", | ||
| 512 | .max_speed_hz = 48000000, | ||
| 513 | .mode = SPI_MODE_3, | ||
| 514 | .platform_data = &(struct fbtft_platform_data) { | ||
| 515 | .display = { | ||
| 516 | .buswidth = 8, | ||
| 517 | .backlight = 1, | ||
| 518 | .init_sequence = hy28b_init_sequence, | ||
| 519 | }, | ||
| 520 | .startbyte = 0x70, | ||
| 521 | .bgr = true, | ||
| 522 | .fps = 50, | ||
| 523 | .gamma = HY28B_GAMMA, | ||
| 524 | } | ||
| 525 | } | ||
| 526 | }, { | ||
| 527 | .name = "ili9481", | ||
| 528 | .spi = &(struct spi_board_info) { | ||
| 529 | .modalias = "fb_ili9481", | ||
| 530 | .max_speed_hz = 32000000, | ||
| 531 | .mode = SPI_MODE_0, | ||
| 532 | .platform_data = &(struct fbtft_platform_data) { | ||
| 533 | .display = { | ||
| 534 | .regwidth = 16, | ||
| 535 | .buswidth = 8, | ||
| 536 | .backlight = 1, | ||
| 537 | }, | ||
| 538 | .bgr = true, | ||
| 539 | } | ||
| 540 | } | ||
| 541 | }, { | ||
| 542 | .name = "itdb24", | ||
| 543 | .pdev = &(struct platform_device) { | ||
| 544 | .name = "fb_s6d1121", | ||
| 545 | .id = 0, | ||
| 546 | .dev = { | ||
| 547 | .release = fbtft_device_pdev_release, | ||
| 548 | .platform_data = &(struct fbtft_platform_data) { | ||
| 549 | .display = { | ||
| 550 | .buswidth = 8, | ||
| 551 | .backlight = 1, | ||
| 552 | }, | ||
| 553 | .bgr = false, | ||
| 554 | }, | ||
| 555 | } | ||
| 556 | } | ||
| 557 | }, { | ||
| 558 | .name = "itdb28", | ||
| 559 | .pdev = &(struct platform_device) { | ||
| 560 | .name = "fb_ili9325", | ||
| 561 | .id = 0, | ||
| 562 | .dev = { | ||
| 563 | .release = fbtft_device_pdev_release, | ||
| 564 | .platform_data = &(struct fbtft_platform_data) { | ||
| 565 | .display = { | ||
| 566 | .buswidth = 8, | ||
| 567 | .backlight = 1, | ||
| 568 | }, | ||
| 569 | .bgr = true, | ||
| 570 | }, | ||
| 571 | } | ||
| 572 | } | ||
| 573 | }, { | ||
| 574 | .name = "itdb28_spi", | ||
| 575 | .spi = &(struct spi_board_info) { | ||
| 576 | .modalias = "fb_ili9325", | ||
| 577 | .max_speed_hz = 32000000, | ||
| 578 | .mode = SPI_MODE_0, | ||
| 579 | .platform_data = &(struct fbtft_platform_data) { | ||
| 580 | .display = { | ||
| 581 | .buswidth = 8, | ||
| 582 | .backlight = 1, | ||
| 583 | }, | ||
| 584 | .bgr = true, | ||
| 585 | } | ||
| 586 | } | ||
| 587 | }, { | ||
| 588 | .name = "mi0283qt-2", | ||
| 589 | .spi = &(struct spi_board_info) { | ||
| 590 | .modalias = "fb_hx8347d", | ||
| 591 | .max_speed_hz = 32000000, | ||
| 592 | .mode = SPI_MODE_0, | ||
| 593 | .platform_data = &(struct fbtft_platform_data) { | ||
| 594 | .display = { | ||
| 595 | .buswidth = 8, | ||
| 596 | .backlight = 1, | ||
| 597 | }, | ||
| 598 | .startbyte = 0x70, | ||
| 599 | .bgr = true, | ||
| 600 | } | ||
| 601 | } | ||
| 602 | }, { | ||
| 603 | .name = "mi0283qt-9a", | ||
| 604 | .spi = &(struct spi_board_info) { | ||
| 605 | .modalias = "fb_ili9341", | ||
| 606 | .max_speed_hz = 32000000, | ||
| 607 | .mode = SPI_MODE_0, | ||
| 608 | .platform_data = &(struct fbtft_platform_data) { | ||
| 609 | .display = { | ||
| 610 | .buswidth = 9, | ||
| 611 | .backlight = 1, | ||
| 612 | }, | ||
| 613 | .bgr = true, | ||
| 614 | } | ||
| 615 | } | ||
| 616 | }, { | ||
| 617 | .name = "mi0283qt-v2", | ||
| 618 | .spi = &(struct spi_board_info) { | ||
| 619 | .modalias = "fb_watterott", | ||
| 620 | .max_speed_hz = 4000000, | ||
| 621 | .mode = SPI_MODE_3, | ||
| 622 | .platform_data = &(struct fbtft_platform_data) { | ||
| 623 | } | ||
| 624 | } | ||
| 625 | }, { | ||
| 626 | .name = "nokia3310", | ||
| 627 | .spi = &(struct spi_board_info) { | ||
| 628 | .modalias = "fb_pcd8544", | ||
| 629 | .max_speed_hz = 400000, | ||
| 630 | .mode = SPI_MODE_0, | ||
| 631 | .platform_data = &(struct fbtft_platform_data) { | ||
| 632 | .display = { | ||
| 633 | .buswidth = 8, | ||
| 634 | }, | ||
| 635 | } | ||
| 636 | } | ||
| 637 | }, { | ||
| 638 | .name = "nokia3310a", | ||
| 639 | .spi = &(struct spi_board_info) { | ||
| 640 | .modalias = "fb_tls8204", | ||
| 641 | .max_speed_hz = 1000000, | ||
| 642 | .mode = SPI_MODE_0, | ||
| 643 | .platform_data = &(struct fbtft_platform_data) { | ||
| 644 | .display = { | ||
| 645 | .buswidth = 8, | ||
| 646 | }, | ||
| 647 | } | ||
| 648 | } | ||
| 649 | }, { | ||
| 650 | .name = "nokia5110", | ||
| 651 | .spi = &(struct spi_board_info) { | ||
| 652 | .modalias = "fb_ili9163", | ||
| 653 | .max_speed_hz = 12000000, | ||
| 654 | .mode = SPI_MODE_0, | ||
| 655 | .platform_data = &(struct fbtft_platform_data) { | ||
| 656 | .display = { | ||
| 657 | .buswidth = 8, | ||
| 658 | .backlight = 1, | ||
| 659 | }, | ||
| 660 | .bgr = true, | ||
| 661 | } | ||
| 662 | } | ||
| 663 | }, { | ||
| 664 | .name = "piscreen", | ||
| 665 | .spi = &(struct spi_board_info) { | ||
| 666 | .modalias = "fb_ili9486", | ||
| 667 | .max_speed_hz = 32000000, | ||
| 668 | .mode = SPI_MODE_0, | ||
| 669 | .platform_data = &(struct fbtft_platform_data) { | ||
| 670 | .display = { | ||
| 671 | .regwidth = 16, | ||
| 672 | .buswidth = 8, | ||
| 673 | .backlight = 1, | ||
| 674 | }, | ||
| 675 | .bgr = true, | ||
| 676 | } | ||
| 677 | } | ||
| 678 | }, { | ||
| 679 | .name = "pitft", | ||
| 680 | .spi = &(struct spi_board_info) { | ||
| 681 | .modalias = "fb_ili9340", | ||
| 682 | .max_speed_hz = 32000000, | ||
| 683 | .mode = SPI_MODE_0, | ||
| 684 | .chip_select = 0, | ||
| 685 | .platform_data = &(struct fbtft_platform_data) { | ||
| 686 | .display = { | ||
| 687 | .buswidth = 8, | ||
| 688 | .backlight = 1, | ||
| 689 | .init_sequence = pitft_init_sequence, | ||
| 690 | }, | ||
| 691 | .bgr = true, | ||
| 692 | } | ||
| 693 | } | ||
| 694 | }, { | ||
| 695 | .name = "pioled", | ||
| 696 | .spi = &(struct spi_board_info) { | ||
| 697 | .modalias = "fb_ssd1351", | ||
| 698 | .max_speed_hz = 20000000, | ||
| 699 | .mode = SPI_MODE_0, | ||
| 700 | .platform_data = &(struct fbtft_platform_data) { | ||
| 701 | .display = { | ||
| 702 | .buswidth = 8, | ||
| 703 | }, | ||
| 704 | .bgr = true, | ||
| 705 | .gamma = PIOLED_GAMMA | ||
| 706 | } | ||
| 707 | } | ||
| 708 | }, { | ||
| 709 | .name = "rpi-display", | ||
| 710 | .spi = &(struct spi_board_info) { | ||
| 711 | .modalias = "fb_ili9341", | ||
| 712 | .max_speed_hz = 32000000, | ||
| 713 | .mode = SPI_MODE_0, | ||
| 714 | .platform_data = &(struct fbtft_platform_data) { | ||
| 715 | .display = { | ||
| 716 | .buswidth = 8, | ||
| 717 | .backlight = 1, | ||
| 718 | }, | ||
| 719 | .bgr = true, | ||
| 720 | } | ||
| 721 | } | ||
| 722 | }, { | ||
| 723 | .name = "s6d02a1", | ||
| 724 | .spi = &(struct spi_board_info) { | ||
| 725 | .modalias = "fb_s6d02a1", | ||
| 726 | .max_speed_hz = 32000000, | ||
| 727 | .mode = SPI_MODE_0, | ||
| 728 | .platform_data = &(struct fbtft_platform_data) { | ||
| 729 | .display = { | ||
| 730 | .buswidth = 8, | ||
| 731 | .backlight = 1, | ||
| 732 | }, | ||
| 733 | .bgr = true, | ||
| 734 | } | ||
| 735 | } | ||
| 736 | }, { | ||
| 737 | .name = "sainsmart18", | ||
| 738 | .spi = &(struct spi_board_info) { | ||
| 739 | .modalias = "fb_st7735r", | ||
| 740 | .max_speed_hz = 32000000, | ||
| 741 | .mode = SPI_MODE_0, | ||
| 742 | .platform_data = &(struct fbtft_platform_data) { | ||
| 743 | .display = { | ||
| 744 | .buswidth = 8, | ||
| 745 | }, | ||
| 746 | } | ||
| 747 | } | ||
| 748 | }, { | ||
| 749 | .name = "sainsmart32", | ||
| 750 | .pdev = &(struct platform_device) { | ||
| 751 | .name = "fb_ssd1289", | ||
| 752 | .id = 0, | ||
| 753 | .dev = { | ||
| 754 | .release = fbtft_device_pdev_release, | ||
| 755 | .platform_data = &(struct fbtft_platform_data) { | ||
| 756 | .display = { | ||
| 757 | .buswidth = 16, | ||
| 758 | .txbuflen = -2, /* disable buffer */ | ||
| 759 | .backlight = 1, | ||
| 760 | .fbtftops.write = write_gpio16_wr_slow, | ||
| 761 | }, | ||
| 762 | .bgr = true, | ||
| 763 | }, | ||
| 764 | }, | ||
| 765 | } | ||
| 766 | }, { | ||
| 767 | .name = "sainsmart32_fast", | ||
| 768 | .pdev = &(struct platform_device) { | ||
| 769 | .name = "fb_ssd1289", | ||
| 770 | .id = 0, | ||
| 771 | .dev = { | ||
| 772 | .release = fbtft_device_pdev_release, | ||
| 773 | .platform_data = &(struct fbtft_platform_data) { | ||
| 774 | .display = { | ||
| 775 | .buswidth = 16, | ||
| 776 | .txbuflen = -2, /* disable buffer */ | ||
| 777 | .backlight = 1, | ||
| 778 | }, | ||
| 779 | .bgr = true, | ||
| 780 | }, | ||
| 781 | }, | ||
| 782 | } | ||
| 783 | }, { | ||
| 784 | .name = "sainsmart32_latched", | ||
| 785 | .pdev = &(struct platform_device) { | ||
| 786 | .name = "fb_ssd1289", | ||
| 787 | .id = 0, | ||
| 788 | .dev = { | ||
| 789 | .release = fbtft_device_pdev_release, | ||
| 790 | .platform_data = &(struct fbtft_platform_data) { | ||
| 791 | .display = { | ||
| 792 | .buswidth = 16, | ||
| 793 | .txbuflen = -2, /* disable buffer */ | ||
| 794 | .backlight = 1, | ||
| 795 | .fbtftops.write = | ||
| 796 | fbtft_write_gpio16_wr_latched, | ||
| 797 | }, | ||
| 798 | .bgr = true, | ||
| 799 | }, | ||
| 800 | }, | ||
| 801 | } | ||
| 802 | }, { | ||
| 803 | .name = "sainsmart32_spi", | ||
| 804 | .spi = &(struct spi_board_info) { | ||
| 805 | .modalias = "fb_ssd1289", | ||
| 806 | .max_speed_hz = 16000000, | ||
| 807 | .mode = SPI_MODE_0, | ||
| 808 | .platform_data = &(struct fbtft_platform_data) { | ||
| 809 | .display = { | ||
| 810 | .buswidth = 8, | ||
| 811 | .backlight = 1, | ||
| 812 | }, | ||
| 813 | .bgr = true, | ||
| 814 | } | ||
| 815 | } | ||
| 816 | }, { | ||
| 817 | .name = "spidev", | ||
| 818 | .spi = &(struct spi_board_info) { | ||
| 819 | .modalias = "spidev", | ||
| 820 | .max_speed_hz = 500000, | ||
| 821 | .bus_num = 0, | ||
| 822 | .chip_select = 0, | ||
| 823 | .mode = SPI_MODE_0, | ||
| 824 | .platform_data = &(struct fbtft_platform_data) { | ||
| 825 | } | ||
| 826 | } | ||
| 827 | }, { | ||
| 828 | .name = "ssd1331", | ||
| 829 | .spi = &(struct spi_board_info) { | ||
| 830 | .modalias = "fb_ssd1331", | ||
| 831 | .max_speed_hz = 20000000, | ||
| 832 | .mode = SPI_MODE_3, | ||
| 833 | .platform_data = &(struct fbtft_platform_data) { | ||
| 834 | .display = { | ||
| 835 | .buswidth = 8, | ||
| 836 | }, | ||
| 837 | } | ||
| 838 | } | ||
| 839 | }, { | ||
| 840 | .name = "tinylcd35", | ||
| 841 | .spi = &(struct spi_board_info) { | ||
| 842 | .modalias = "fb_tinylcd", | ||
| 843 | .max_speed_hz = 32000000, | ||
| 844 | .mode = SPI_MODE_0, | ||
| 845 | .platform_data = &(struct fbtft_platform_data) { | ||
| 846 | .display = { | ||
| 847 | .buswidth = 8, | ||
| 848 | .backlight = 1, | ||
| 849 | }, | ||
| 850 | .bgr = true, | ||
| 851 | } | ||
| 852 | } | ||
| 853 | }, { | ||
| 854 | .name = "tm022hdh26", | ||
| 855 | .spi = &(struct spi_board_info) { | ||
| 856 | .modalias = "fb_ili9341", | ||
| 857 | .max_speed_hz = 32000000, | ||
| 858 | .mode = SPI_MODE_0, | ||
| 859 | .platform_data = &(struct fbtft_platform_data) { | ||
| 860 | .display = { | ||
| 861 | .buswidth = 8, | ||
| 862 | .backlight = 1, | ||
| 863 | }, | ||
| 864 | .bgr = true, | ||
| 865 | } | ||
| 866 | } | ||
| 867 | }, { | ||
| 868 | .name = "tontec35_9481", /* boards before 02 July 2014 */ | ||
| 869 | .spi = &(struct spi_board_info) { | ||
| 870 | .modalias = "fb_ili9481", | ||
| 871 | .max_speed_hz = 128000000, | ||
| 872 | .mode = SPI_MODE_3, | ||
| 873 | .platform_data = &(struct fbtft_platform_data) { | ||
| 874 | .display = { | ||
| 875 | .buswidth = 8, | ||
| 876 | .backlight = 1, | ||
| 877 | }, | ||
| 878 | .bgr = true, | ||
| 879 | } | ||
| 880 | } | ||
| 881 | }, { | ||
| 882 | .name = "tontec35_9486", /* boards after 02 July 2014 */ | ||
| 883 | .spi = &(struct spi_board_info) { | ||
| 884 | .modalias = "fb_ili9486", | ||
| 885 | .max_speed_hz = 128000000, | ||
| 886 | .mode = SPI_MODE_3, | ||
| 887 | .platform_data = &(struct fbtft_platform_data) { | ||
| 888 | .display = { | ||
| 889 | .buswidth = 8, | ||
| 890 | .backlight = 1, | ||
| 891 | }, | ||
| 892 | .bgr = true, | ||
| 893 | } | ||
| 894 | } | ||
| 895 | }, { | ||
| 896 | .name = "upd161704", | ||
| 897 | .spi = &(struct spi_board_info) { | ||
| 898 | .modalias = "fb_upd161704", | ||
| 899 | .max_speed_hz = 32000000, | ||
| 900 | .mode = SPI_MODE_0, | ||
| 901 | .platform_data = &(struct fbtft_platform_data) { | ||
| 902 | .display = { | ||
| 903 | .buswidth = 8, | ||
| 904 | }, | ||
| 905 | } | ||
| 906 | } | ||
| 907 | }, { | ||
| 908 | .name = "waveshare32b", | ||
| 909 | .spi = &(struct spi_board_info) { | ||
| 910 | .modalias = "fb_ili9340", | ||
| 911 | .max_speed_hz = 48000000, | ||
| 912 | .mode = SPI_MODE_0, | ||
| 913 | .platform_data = &(struct fbtft_platform_data) { | ||
| 914 | .display = { | ||
| 915 | .buswidth = 8, | ||
| 916 | .backlight = 1, | ||
| 917 | .init_sequence = | ||
| 918 | waveshare32b_init_sequence, | ||
| 919 | }, | ||
| 920 | .bgr = true, | ||
| 921 | } | ||
| 922 | } | ||
| 923 | }, { | ||
| 924 | .name = "waveshare22", | ||
| 925 | .spi = &(struct spi_board_info) { | ||
| 926 | .modalias = "fb_bd663474", | ||
| 927 | .max_speed_hz = 32000000, | ||
| 928 | .mode = SPI_MODE_3, | ||
| 929 | .platform_data = &(struct fbtft_platform_data) { | ||
| 930 | .display = { | ||
| 931 | .buswidth = 8, | ||
| 932 | }, | ||
| 933 | } | ||
| 934 | } | ||
| 935 | }, { | ||
| 936 | /* This should be the last item. | ||
| 937 | * Used with the custom argument | ||
| 938 | */ | ||
| 939 | .name = "", | ||
| 940 | .spi = &(struct spi_board_info) { | ||
| 941 | .modalias = "", | ||
| 942 | .max_speed_hz = 0, | ||
| 943 | .mode = SPI_MODE_0, | ||
| 944 | .platform_data = &(struct fbtft_platform_data) { | ||
| 945 | } | ||
| 946 | }, | ||
| 947 | .pdev = &(struct platform_device) { | ||
| 948 | .name = "", | ||
| 949 | .id = 0, | ||
| 950 | .dev = { | ||
| 951 | .release = fbtft_device_pdev_release, | ||
| 952 | .platform_data = &(struct fbtft_platform_data) { | ||
| 953 | }, | ||
| 954 | }, | ||
| 955 | }, | ||
| 956 | } | ||
| 957 | }; | ||
| 958 | |||
| 959 | static int write_gpio16_wr_slow(struct fbtft_par *par, void *buf, size_t len) | ||
| 960 | { | ||
| 961 | u16 data; | ||
| 962 | int i; | ||
| 963 | #ifndef DO_NOT_OPTIMIZE_FBTFT_WRITE_GPIO | ||
| 964 | static u16 prev_data; | ||
| 965 | #endif | ||
| 966 | |||
| 967 | fbtft_par_dbg_hex(DEBUG_WRITE, par, par->info->device, u8, buf, len, | ||
| 968 | "%s(len=%zu): ", __func__, len); | ||
| 969 | |||
| 970 | while (len) { | ||
| 971 | data = *(u16 *)buf; | ||
| 972 | |||
| 973 | /* Start writing by pulling down /WR */ | ||
| 974 | gpiod_set_value(par->gpio.wr, 0); | ||
| 975 | |||
| 976 | /* Set data */ | ||
| 977 | #ifndef DO_NOT_OPTIMIZE_FBTFT_WRITE_GPIO | ||
| 978 | if (data == prev_data) { | ||
| 979 | gpiod_set_value(par->gpio.wr, 0); /* used as delay */ | ||
| 980 | } else { | ||
| 981 | for (i = 0; i < 16; i++) { | ||
| 982 | if ((data & 1) != (prev_data & 1)) | ||
| 983 | gpiod_set_value(par->gpio.db[i], | ||
| 984 | data & 1); | ||
| 985 | data >>= 1; | ||
| 986 | prev_data >>= 1; | ||
| 987 | } | ||
| 988 | } | ||
| 989 | #else | ||
| 990 | for (i = 0; i < 16; i++) { | ||
| 991 | gpiod_set_value(par->gpio.db[i], data & 1); | ||
| 992 | data >>= 1; | ||
| 993 | } | ||
| 994 | #endif | ||
| 995 | |||
| 996 | /* Pullup /WR */ | ||
| 997 | gpiod_set_value(par->gpio.wr, 1); | ||
| 998 | |||
| 999 | #ifndef DO_NOT_OPTIMIZE_FBTFT_WRITE_GPIO | ||
| 1000 | prev_data = *(u16 *)buf; | ||
| 1001 | #endif | ||
| 1002 | buf += 2; | ||
| 1003 | len -= 2; | ||
| 1004 | } | ||
| 1005 | |||
| 1006 | return 0; | ||
| 1007 | } | ||
| 1008 | |||
| 1009 | static void adafruit18_green_tab_set_addr_win(struct fbtft_par *par, | ||
| 1010 | int xs, int ys, int xe, int ye) | ||
| 1011 | { | ||
| 1012 | write_reg(par, 0x2A, 0, xs + 2, 0, xe + 2); | ||
| 1013 | write_reg(par, 0x2B, 0, ys + 1, 0, ye + 1); | ||
| 1014 | write_reg(par, 0x2C); | ||
| 1015 | } | ||
| 1016 | |||
| 1017 | static void fbtft_device_pdev_release(struct device *dev) | ||
| 1018 | { | ||
| 1019 | /* Needed to silence this message: | ||
| 1020 | * Device 'xxx' does not have a release() function, | ||
| 1021 | * it is broken and must be fixed | ||
| 1022 | */ | ||
| 1023 | } | ||
| 1024 | |||
| 1025 | static int spi_device_found(struct device *dev, void *data) | ||
| 1026 | { | ||
| 1027 | struct spi_device *spi = to_spi_device(dev); | ||
| 1028 | |||
| 1029 | dev_info(dev, "%s %s %dkHz %d bits mode=0x%02X\n", spi->modalias, | ||
| 1030 | dev_name(dev), spi->max_speed_hz / 1000, spi->bits_per_word, | ||
| 1031 | spi->mode); | ||
| 1032 | |||
| 1033 | return 0; | ||
| 1034 | } | ||
| 1035 | |||
| 1036 | static void pr_spi_devices(void) | ||
| 1037 | { | ||
| 1038 | pr_debug("SPI devices registered:\n"); | ||
| 1039 | bus_for_each_dev(&spi_bus_type, NULL, NULL, spi_device_found); | ||
| 1040 | } | ||
| 1041 | |||
| 1042 | static int p_device_found(struct device *dev, void *data) | ||
| 1043 | { | ||
| 1044 | struct platform_device | ||
| 1045 | *pdev = to_platform_device(dev); | ||
| 1046 | |||
| 1047 | if (strstr(pdev->name, "fb")) | ||
| 1048 | dev_info(dev, "%s id=%d pdata? %s\n", pdev->name, pdev->id, | ||
| 1049 | pdev->dev.platform_data ? "yes" : "no"); | ||
| 1050 | |||
| 1051 | return 0; | ||
| 1052 | } | ||
| 1053 | |||
| 1054 | static void pr_p_devices(void) | ||
| 1055 | { | ||
| 1056 | pr_debug("'fb' Platform devices registered:\n"); | ||
| 1057 | bus_for_each_dev(&platform_bus_type, NULL, NULL, p_device_found); | ||
| 1058 | } | ||
| 1059 | |||
| 1060 | #ifdef MODULE | ||
| 1061 | static void fbtft_device_spi_delete(struct spi_master *master, unsigned int cs) | ||
| 1062 | { | ||
| 1063 | struct device *dev; | ||
| 1064 | char str[32]; | ||
| 1065 | |||
| 1066 | snprintf(str, sizeof(str), "%s.%u", dev_name(&master->dev), cs); | ||
| 1067 | |||
| 1068 | dev = bus_find_device_by_name(&spi_bus_type, NULL, str); | ||
| 1069 | if (dev) { | ||
| 1070 | if (verbose) | ||
| 1071 | dev_info(dev, "Deleting %s\n", str); | ||
| 1072 | device_del(dev); | ||
| 1073 | } | ||
| 1074 | } | ||
| 1075 | |||
| 1076 | static int fbtft_device_spi_device_register(struct spi_board_info *spi) | ||
| 1077 | { | ||
| 1078 | struct spi_master *master; | ||
| 1079 | |||
| 1080 | master = spi_busnum_to_master(spi->bus_num); | ||
| 1081 | if (!master) { | ||
| 1082 | pr_err("spi_busnum_to_master(%d) returned NULL\n", | ||
| 1083 | spi->bus_num); | ||
| 1084 | return -EINVAL; | ||
| 1085 | } | ||
| 1086 | /* make sure it's available */ | ||
| 1087 | fbtft_device_spi_delete(master, spi->chip_select); | ||
| 1088 | spi_device = spi_new_device(master, spi); | ||
| 1089 | put_device(&master->dev); | ||
| 1090 | if (!spi_device) { | ||
| 1091 | dev_err(&master->dev, "spi_new_device() returned NULL\n"); | ||
| 1092 | return -EPERM; | ||
| 1093 | } | ||
| 1094 | return 0; | ||
| 1095 | } | ||
| 1096 | #else | ||
| 1097 | static int fbtft_device_spi_device_register(struct spi_board_info *spi) | ||
| 1098 | { | ||
| 1099 | return spi_register_board_info(spi, 1); | ||
| 1100 | } | ||
| 1101 | #endif | ||
| 1102 | |||
| 1103 | static int __init fbtft_device_init(void) | ||
| 1104 | { | ||
| 1105 | struct spi_board_info *spi = NULL; | ||
| 1106 | struct fbtft_platform_data *pdata; | ||
| 1107 | bool found = false; | ||
| 1108 | int i = 0; | ||
| 1109 | int ret = 0; | ||
| 1110 | |||
| 1111 | if (!name) { | ||
| 1112 | #ifdef MODULE | ||
| 1113 | pr_err("missing module parameter: 'name'\n"); | ||
| 1114 | return -EINVAL; | ||
| 1115 | #else | ||
| 1116 | return 0; | ||
| 1117 | #endif | ||
| 1118 | } | ||
| 1119 | |||
| 1120 | if (init_num > FBTFT_MAX_INIT_SEQUENCE) { | ||
| 1121 | pr_err("init parameter: exceeded max array size: %d\n", | ||
| 1122 | FBTFT_MAX_INIT_SEQUENCE); | ||
| 1123 | return -EINVAL; | ||
| 1124 | } | ||
| 1125 | |||
| 1126 | if (verbose > 2) { | ||
| 1127 | pr_spi_devices(); /* print list of registered SPI devices */ | ||
| 1128 | pr_p_devices(); /* print list of 'fb' platform devices */ | ||
| 1129 | } | ||
| 1130 | |||
| 1131 | pr_debug("name='%s', busnum=%d, cs=%d\n", name, busnum, cs); | ||
| 1132 | |||
| 1133 | if (rotate > 0 && rotate < 4) { | ||
| 1134 | rotate = (4 - rotate) * 90; | ||
| 1135 | pr_warn("argument 'rotate' should be an angle. Values 1-3 is deprecated. Setting it to %d.\n", | ||
| 1136 | rotate); | ||
| 1137 | } | ||
| 1138 | if (rotate != 0 && rotate != 90 && rotate != 180 && rotate != 270) { | ||
| 1139 | pr_warn("argument 'rotate' illegal value: %d. Setting it to 0.\n", | ||
| 1140 | rotate); | ||
| 1141 | rotate = 0; | ||
| 1142 | } | ||
| 1143 | |||
| 1144 | /* name=list lists all supported displays */ | ||
| 1145 | if (strcmp(name, "list") == 0) { | ||
| 1146 | pr_info("Supported displays:\n"); | ||
| 1147 | |||
| 1148 | for (i = 0; i < ARRAY_SIZE(displays); i++) | ||
| 1149 | pr_info("%s\n", displays[i].name); | ||
| 1150 | return -ECANCELED; | ||
| 1151 | } | ||
| 1152 | |||
| 1153 | if (custom) { | ||
| 1154 | i = ARRAY_SIZE(displays) - 1; | ||
| 1155 | displays[i].name = name; | ||
| 1156 | if (speed == 0) { | ||
| 1157 | displays[i].pdev->name = name; | ||
| 1158 | displays[i].spi = NULL; | ||
| 1159 | } else { | ||
| 1160 | size_t len; | ||
| 1161 | |||
| 1162 | len = strlcpy(displays[i].spi->modalias, name, | ||
| 1163 | SPI_NAME_SIZE); | ||
| 1164 | if (len >= SPI_NAME_SIZE) | ||
| 1165 | pr_warn("modalias (name) truncated to: %s\n", | ||
| 1166 | displays[i].spi->modalias); | ||
| 1167 | displays[i].pdev = NULL; | ||
| 1168 | } | ||
| 1169 | } | ||
| 1170 | |||
| 1171 | for (i = 0; i < ARRAY_SIZE(displays); i++) { | ||
| 1172 | if (strncmp(name, displays[i].name, SPI_NAME_SIZE) == 0) { | ||
| 1173 | if (displays[i].spi) { | ||
| 1174 | spi = displays[i].spi; | ||
| 1175 | spi->chip_select = cs; | ||
| 1176 | spi->bus_num = busnum; | ||
| 1177 | if (speed) | ||
| 1178 | spi->max_speed_hz = speed; | ||
| 1179 | if (mode != -1) | ||
| 1180 | spi->mode = mode; | ||
| 1181 | pdata = (void *)spi->platform_data; | ||
| 1182 | } else if (displays[i].pdev) { | ||
| 1183 | p_device = displays[i].pdev; | ||
| 1184 | pdata = p_device->dev.platform_data; | ||
| 1185 | } else { | ||
| 1186 | pr_err("broken displays array\n"); | ||
| 1187 | return -EINVAL; | ||
| 1188 | } | ||
| 1189 | |||
| 1190 | pdata->rotate = rotate; | ||
| 1191 | if (bgr == 0) | ||
| 1192 | pdata->bgr = false; | ||
| 1193 | else if (bgr == 1) | ||
| 1194 | pdata->bgr = true; | ||
| 1195 | if (startbyte) | ||
| 1196 | pdata->startbyte = startbyte; | ||
| 1197 | if (gamma) | ||
| 1198 | pdata->gamma = gamma; | ||
| 1199 | pdata->display.debug = debug; | ||
| 1200 | if (fps) | ||
| 1201 | pdata->fps = fps; | ||
| 1202 | if (txbuflen) | ||
| 1203 | pdata->txbuflen = txbuflen; | ||
| 1204 | if (init_num) | ||
| 1205 | pdata->display.init_sequence = init; | ||
| 1206 | if (custom) { | ||
| 1207 | pdata->display.width = width; | ||
| 1208 | pdata->display.height = height; | ||
| 1209 | pdata->display.buswidth = buswidth; | ||
| 1210 | pdata->display.backlight = 1; | ||
| 1211 | } | ||
| 1212 | |||
| 1213 | if (displays[i].spi) { | ||
| 1214 | ret = fbtft_device_spi_device_register(spi); | ||
| 1215 | if (ret) { | ||
| 1216 | pr_err("failed to register SPI device\n"); | ||
| 1217 | return ret; | ||
| 1218 | } | ||
| 1219 | } else { | ||
| 1220 | ret = platform_device_register(p_device); | ||
| 1221 | if (ret < 0) { | ||
| 1222 | pr_err("platform_device_register() returned %d\n", | ||
| 1223 | ret); | ||
| 1224 | return ret; | ||
| 1225 | } | ||
| 1226 | } | ||
| 1227 | found = true; | ||
| 1228 | break; | ||
| 1229 | } | ||
| 1230 | } | ||
| 1231 | |||
| 1232 | if (!found) { | ||
| 1233 | pr_err("display not supported: '%s'\n", name); | ||
| 1234 | return -EINVAL; | ||
| 1235 | } | ||
| 1236 | |||
| 1237 | if (spi_device && (verbose > 1)) | ||
| 1238 | pr_spi_devices(); | ||
| 1239 | if (p_device && (verbose > 1)) | ||
| 1240 | pr_p_devices(); | ||
| 1241 | |||
| 1242 | return 0; | ||
| 1243 | } | ||
| 1244 | |||
| 1245 | static void __exit fbtft_device_exit(void) | ||
| 1246 | { | ||
| 1247 | if (spi_device) { | ||
| 1248 | device_del(&spi_device->dev); | ||
| 1249 | kfree(spi_device); | ||
| 1250 | } | ||
| 1251 | |||
| 1252 | if (p_device) | ||
| 1253 | platform_device_unregister(p_device); | ||
| 1254 | } | ||
| 1255 | |||
| 1256 | arch_initcall(fbtft_device_init); | ||
| 1257 | module_exit(fbtft_device_exit); | ||
| 1258 | |||
| 1259 | MODULE_DESCRIPTION("Add a FBTFT device."); | ||
| 1260 | MODULE_AUTHOR("Noralf Tronnes"); | ||
| 1261 | MODULE_LICENSE("GPL"); | ||
| @@ -1,851 +0,0 @@ | |||
| 1 | // SPDX-License-Identifier: GPL-2.0+ | ||
| 2 | /* | ||
| 3 | * Generic FB driver for TFT LCD displays | ||
| 4 | * | ||
| 5 | * Copyright (C) 2013 Noralf Tronnes | ||
| 6 | */ | ||
| 7 | |||
| 8 | #include <linux/module.h> | ||
| 9 | #include <linux/kernel.h> | ||
| 10 | #include <linux/init.h> | ||
| 11 | #include <linux/vmalloc.h> | ||
| 12 | #include <linux/gpio/consumer.h> | ||
| 13 | #include <linux/spi/spi.h> | ||
| 14 | #include <linux/delay.h> | ||
| 15 | |||
| 16 | #include "fbtft.h" | ||
| 17 | |||
| 18 | #define DRVNAME "flexfb" | ||
| 19 | |||
| 20 | static char *chip; | ||
| 21 | module_param(chip, charp, 0000); | ||
| 22 | MODULE_PARM_DESC(chip, "LCD controller"); | ||
| 23 | |||
| 24 | static unsigned int width; | ||
| 25 | module_param(width, uint, 0000); | ||
| 26 | MODULE_PARM_DESC(width, "Display width"); | ||
| 27 | |||
| 28 | static unsigned int height; | ||
| 29 | module_param(height, uint, 0000); | ||
| 30 | MODULE_PARM_DESC(height, "Display height"); | ||
| 31 | |||
| 32 | static s16 init[512]; | ||
| 33 | static int init_num; | ||
| 34 | module_param_array(init, short, &init_num, 0000); | ||
| 35 | MODULE_PARM_DESC(init, "Init sequence"); | ||
| 36 | |||
| 37 | static unsigned int setaddrwin; | ||
| 38 | module_param(setaddrwin, uint, 0000); | ||
| 39 | MODULE_PARM_DESC(setaddrwin, "Which set_addr_win() implementation to use"); | ||
| 40 | |||
| 41 | static unsigned int buswidth = 8; | ||
| 42 | module_param(buswidth, uint, 0000); | ||
| 43 | MODULE_PARM_DESC(buswidth, "Width of databus (default: 8)"); | ||
| 44 | |||
| 45 | static unsigned int regwidth = 8; | ||
| 46 | module_param(regwidth, uint, 0000); | ||
| 47 | MODULE_PARM_DESC(regwidth, "Width of controller register (default: 8)"); | ||
| 48 | |||
| 49 | static bool nobacklight; | ||
| 50 | module_param(nobacklight, bool, 0000); | ||
| 51 | MODULE_PARM_DESC(nobacklight, "Turn off backlight functionality."); | ||
| 52 | |||
| 53 | static bool latched; | ||
| 54 | module_param(latched, bool, 0000); | ||
| 55 | MODULE_PARM_DESC(latched, "Use with latched 16-bit databus"); | ||
| 56 | |||
| 57 | static const s16 *initp; | ||
| 58 | static int initp_num; | ||
| 59 | |||
| 60 | /* default init sequences */ | ||
| 61 | static const s16 st7735r_init[] = { | ||
| 62 | -1, 0x01, | ||
| 63 | -2, 150, | ||
| 64 | -1, 0x11, | ||
| 65 | -2, 500, | ||
| 66 | -1, 0xB1, 0x01, 0x2C, 0x2D, | ||
| 67 | -1, 0xB2, 0x01, 0x2C, 0x2D, | ||
| 68 | -1, 0xB3, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D, | ||
| 69 | -1, 0xB4, 0x07, | ||
| 70 | -1, 0xC0, 0xA2, 0x02, 0x84, | ||
| 71 | -1, 0xC1, 0xC5, | ||
| 72 | -1, 0xC2, 0x0A, 0x00, | ||
| 73 | -1, 0xC3, 0x8A, 0x2A, | ||
| 74 | -1, 0xC4, 0x8A, 0xEE, | ||
| 75 | -1, 0xC5, 0x0E, | ||
| 76 | -1, 0x20, | ||
| 77 | -1, 0x36, 0xC0, | ||
| 78 | -1, 0x3A, 0x05, | ||
| 79 | -1, 0xE0, 0x0f, 0x1a, 0x0f, 0x18, 0x2f, 0x28, 0x20, 0x22, | ||
| 80 | 0x1f, 0x1b, 0x23, 0x37, 0x00, 0x07, 0x02, 0x10, | ||
| 81 | -1, 0xE1, 0x0f, 0x1b, 0x0f, 0x17, 0x33, 0x2c, 0x29, 0x2e, | ||
| 82 | 0x30, 0x30, 0x39, 0x3f, 0x00, 0x07, 0x03, 0x10, | ||
| 83 | -1, 0x29, | ||
| 84 | -2, 100, | ||
| 85 | -1, 0x13, | ||
| 86 | -2, 10, | ||
| 87 | -3 | ||
| 88 | }; | ||
| 89 | |||
| 90 | static const s16 ssd1289_init[] = { | ||
| 91 | -1, 0x00, 0x0001, | ||
| 92 | -1, 0x03, 0xA8A4, | ||
| 93 | -1, 0x0C, 0x0000, | ||
| 94 | -1, 0x0D, 0x080C, | ||
| 95 | -1, 0x0E, 0x2B00, | ||
| 96 | -1, 0x1E, 0x00B7, | ||
| 97 | -1, 0x01, 0x2B3F, | ||
| 98 | -1, 0x02, 0x0600, | ||
| 99 | -1, 0x10, 0x0000, | ||
| 100 | -1, 0x11, 0x6070, | ||
| 101 | -1, 0x05, 0x0000, | ||
| 102 | -1, 0x06, 0x0000, | ||
| 103 | -1, 0x16, 0xEF1C, | ||
| 104 | -1, 0x17, 0x0003, | ||
| 105 | -1, 0x07, 0x0233, | ||
| 106 | -1, 0x0B, 0x0000, | ||
| 107 | -1, 0x0F, 0x0000, | ||
| 108 | -1, 0x41, 0x0000, | ||
| 109 | -1, 0x42, 0x0000, | ||
| 110 | -1, 0x48, 0x0000, | ||
| 111 | -1, 0x49, 0x013F, | ||
| 112 | -1, 0x4A, 0x0000, | ||
| 113 | -1, 0x4B, 0x0000, | ||
| 114 | -1, 0x44, 0xEF00, | ||
| 115 | -1, 0x45, 0x0000, | ||
| 116 | -1, 0x46, 0x013F, | ||
| 117 | -1, 0x30, 0x0707, | ||
| 118 | -1, 0x31, 0x0204, | ||
| 119 | -1, 0x32, 0x0204, | ||
| 120 | -1, 0x33, 0x0502, | ||
| 121 | -1, 0x34, 0x0507, | ||
| 122 | -1, 0x35, 0x0204, | ||
| 123 | -1, 0x36, 0x0204, | ||
| 124 | -1, 0x37, 0x0502, | ||
| 125 | -1, 0x3A, 0x0302, | ||
| 126 | -1, 0x3B, 0x0302, | ||
| 127 | -1, 0x23, 0x0000, | ||
| 128 | -1, 0x24, 0x0000, | ||
| 129 | -1, 0x25, 0x8000, | ||
| 130 | -1, 0x4f, 0x0000, | ||
| 131 | -1, 0x4e, 0x0000, | ||
| 132 | -1, 0x22, | ||
| 133 | -3 | ||
| 134 | }; | ||
| 135 | |||
| 136 | static const s16 hx8340bn_init[] = { | ||
| 137 | -1, 0xC1, 0xFF, 0x83, 0x40, | ||
| 138 | -1, 0x11, | ||
| 139 | -2, 150, | ||
| 140 | -1, 0xCA, 0x70, 0x00, 0xD9, | ||
| 141 | -1, 0xB0, 0x01, 0x11, | ||
| 142 | -1, 0xC9, 0x90, 0x49, 0x10, 0x28, 0x28, 0x10, 0x00, 0x06, | ||
| 143 | -2, 20, | ||
| 144 | -1, 0xC2, 0x60, 0x71, 0x01, 0x0E, 0x05, 0x02, 0x09, 0x31, 0x0A, | ||
| 145 | -1, 0xC3, 0x67, 0x30, 0x61, 0x17, 0x48, 0x07, 0x05, 0x33, | ||
| 146 | -2, 10, | ||
| 147 | -1, 0xB5, 0x35, 0x20, 0x45, | ||
| 148 | -1, 0xB4, 0x33, 0x25, 0x4C, | ||
| 149 | -2, 10, | ||
| 150 | -1, 0x3A, 0x05, | ||
| 151 | -1, 0x29, | ||
| 152 | -2, 10, | ||
| 153 | -3 | ||
| 154 | }; | ||
| 155 | |||
| 156 | static const s16 ili9225_init[] = { | ||
| 157 | -1, 0x0001, 0x011C, | ||
| 158 | -1, 0x0002, 0x0100, | ||
| 159 | -1, 0x0003, 0x1030, | ||
| 160 | -1, 0x0008, 0x0808, | ||
| 161 | -1, 0x000C, 0x0000, | ||
| 162 | -1, 0x000F, 0x0A01, | ||
| 163 | -1, 0x0020, 0x0000, | ||
| 164 | -1, 0x0021, 0x0000, | ||
| 165 | -2, 50, | ||
| 166 | -1, 0x0010, 0x0A00, | ||
| 167 | -1, 0x0011, 0x1038, | ||
| 168 | -2, 50, | ||
| 169 | -1, 0x0012, 0x1121, | ||
| 170 | -1, 0x0013, 0x004E, | ||
| 171 | -1, 0x0014, 0x676F, | ||
| 172 | -1, 0x0030, 0x0000, | ||
| 173 | -1, 0x0031, 0x00DB, | ||
| 174 | -1, 0x0032, 0x0000, | ||
| 175 | -1, 0x0033, 0x0000, | ||
| 176 | -1, 0x0034, 0x00DB, | ||
| 177 | -1, 0x0035, 0x0000, | ||
| 178 | -1, 0x0036, 0x00AF, | ||
| 179 | -1, 0x0037, 0x0000, | ||
| 180 | -1, 0x0038, 0x00DB, | ||
| 181 | -1, 0x0039, 0x0000, | ||
| 182 | -1, 0x0050, 0x0000, | ||
| 183 | -1, 0x0051, 0x060A, | ||
| 184 | -1, 0x0052, 0x0D0A, | ||
| 185 | -1, 0x0053, 0x0303, | ||
| 186 | -1, 0x0054, 0x0A0D, | ||
| 187 | -1, 0x0055, 0x0A06, | ||
| 188 | -1, 0x0056, 0x0000, | ||
| 189 | -1, 0x0057, 0x0303, | ||
| 190 | -1, 0x0058, 0x0000, | ||
| 191 | -1, 0x0059, 0x0000, | ||
| 192 | -2, 50, | ||
| 193 | -1, 0x0007, 0x1017, | ||
| 194 | -2, 50, | ||
| 195 | -3 | ||
| 196 | }; | ||
| 197 | |||
| 198 | static const s16 ili9320_init[] = { | ||
| 199 | -1, 0x00E5, 0x8000, | ||
| 200 | -1, 0x0000, 0x0001, | ||
| 201 | -1, 0x0001, 0x0100, | ||
| 202 | -1, 0x0002, 0x0700, | ||
| 203 | -1, 0x0003, 0x1030, | ||
| 204 | -1, 0x0004, 0x0000, | ||
| 205 | -1, 0x0008, 0x0202, | ||
| 206 | -1, 0x0009, 0x0000, | ||
| 207 | -1, 0x000A, 0x0000, | ||
| 208 | -1, 0x000C, 0x0000, | ||
| 209 | -1, 0x000D, 0x0000, | ||
| 210 | -1, 0x000F, 0x0000, | ||
| 211 | -1, 0x0010, 0x0000, | ||
| 212 | -1, 0x0011, 0x0007, | ||
| 213 | -1, 0x0012, 0x0000, | ||
| 214 | -1, 0x0013, 0x0000, | ||
| 215 | -2, 200, | ||
| 216 | -1, 0x0010, 0x17B0, | ||
| 217 | -1, 0x0011, 0x0031, | ||
| 218 | -2, 50, | ||
| 219 | -1, 0x0012, 0x0138, | ||
| 220 | -2, 50, | ||
| 221 | -1, 0x0013, 0x1800, | ||
| 222 | -1, 0x0029, 0x0008, | ||
| 223 | -2, 50, | ||
| 224 | -1, 0x0020, 0x0000, | ||
| 225 | -1, 0x0021, 0x0000, | ||
| 226 | -1, 0x0030, 0x0000, | ||
| 227 | -1, 0x0031, 0x0505, | ||
| 228 | -1, 0x0032, 0x0004, | ||
| 229 | -1, 0x0035, 0x0006, | ||
| 230 | -1, 0x0036, 0x0707, | ||
| 231 | -1, 0x0037, 0x0105, | ||
| 232 | -1, 0x0038, 0x0002, | ||
| 233 | -1, 0x0039, 0x0707, | ||
| 234 | -1, 0x003C, 0x0704, | ||
| 235 | -1, 0x003D, 0x0807, | ||
| 236 | -1, 0x0050, 0x0000, | ||
| 237 | -1, 0x0051, 0x00EF, | ||
| 238 | -1, 0x0052, 0x0000, | ||
| 239 | -1, 0x0053, 0x013F, | ||
| 240 | -1, 0x0060, 0x2700, | ||
| 241 | -1, 0x0061, 0x0001, | ||
| 242 | -1, 0x006A, 0x0000, | ||
| 243 | -1, 0x0080, 0x0000, | ||
| 244 | -1, 0x0081, 0x0000, | ||
| 245 | -1, 0x0082, 0x0000, | ||
| 246 | -1, 0x0083, 0x0000, | ||
| 247 | -1, 0x0084, 0x0000, | ||
| 248 | -1, 0x0085, 0x0000, | ||
| 249 | -1, 0x0090, 0x0010, | ||
| 250 | -1, 0x0092, 0x0000, | ||
| 251 | -1, 0x0093, 0x0003, | ||
| 252 | -1, 0x0095, 0x0110, | ||
| 253 | -1, 0x0097, 0x0000, | ||
| 254 | -1, 0x0098, 0x0000, | ||
| 255 | -1, 0x0007, 0x0173, | ||
| 256 | -3 | ||
| 257 | }; | ||
| 258 | |||
| 259 | static const s16 ili9325_init[] = { | ||
| 260 | -1, 0x00E3, 0x3008, | ||
| 261 | -1, 0x00E7, 0x0012, | ||
| 262 | -1, 0x00EF, 0x1231, | ||
| 263 | -1, 0x0001, 0x0100, | ||
| 264 | -1, 0x0002, 0x0700, | ||
| 265 | -1, 0x0003, 0x1030, | ||
| 266 | -1, 0x0004, 0x0000, | ||
| 267 | -1, 0x0008, 0x0207, | ||
| 268 | -1, 0x0009, 0x0000, | ||
| 269 | -1, 0x000A, 0x0000, | ||
| 270 | -1, 0x000C, 0x0000, | ||
| 271 | -1, 0x000D, 0x0000, | ||
| 272 | -1, 0x000F, 0x0000, | ||
| 273 | -1, 0x0010, 0x0000, | ||
| 274 | -1, 0x0011, 0x0007, | ||
| 275 | -1, 0x0012, 0x0000, | ||
| 276 | -1, 0x0013, 0x0000, | ||
| 277 | -2, 200, | ||
| 278 | -1, 0x0010, 0x1690, | ||
| 279 | -1, 0x0011, 0x0223, | ||
| 280 | -2, 50, | ||
| 281 | -1, 0x0012, 0x000D, | ||
| 282 | -2, 50, | ||
| 283 | -1, 0x0013, 0x1200, | ||
| 284 | -1, 0x0029, 0x000A, | ||
| 285 | -1, 0x002B, 0x000C, | ||
| 286 | -2, 50, | ||
| 287 | -1, 0x0020, 0x0000, | ||
| 288 | -1, 0x0021, 0x0000, | ||
| 289 | -1, 0x0030, 0x0000, | ||
| 290 | -1, 0x0031, 0x0506, | ||
| 291 | -1, 0x0032, 0x0104, | ||
| 292 | -1, 0x0035, 0x0207, | ||
| 293 | -1, 0x0036, 0x000F, | ||
| 294 | -1, 0x0037, 0x0306, | ||
| 295 | -1, 0x0038, 0x0102, | ||
| 296 | -1, 0x0039, 0x0707, | ||
| 297 | -1, 0x003C, 0x0702, | ||
| 298 | -1, 0x003D, 0x1604, | ||
| 299 | -1, 0x0050, 0x0000, | ||
| 300 | -1, 0x0051, 0x00EF, | ||
| 301 | -1, 0x0052, 0x0000, | ||
| 302 | -1, 0x0053, 0x013F, | ||
| 303 | -1, 0x0060, 0xA700, | ||
| 304 | -1, 0x0061, 0x0001, | ||
| 305 | -1, 0x006A, 0x0000, | ||
| 306 | -1, 0x0080, 0x0000, | ||
| 307 | -1, 0x0081, 0x0000, | ||
| 308 | -1, 0x0082, 0x0000, | ||
| 309 | -1, 0x0083, 0x0000, | ||
| 310 | -1, 0x0084, 0x0000, | ||
| 311 | -1, 0x0085, 0x0000, | ||
| 312 | -1, 0x0090, 0x0010, | ||
| 313 | -1, 0x0092, 0x0600, | ||
| 314 | -1, 0x0007, 0x0133, | ||
| 315 | -3 | ||
| 316 | }; | ||
| 317 | |||
| 318 | static const s16 ili9341_init[] = { | ||
| 319 | -1, 0x28, | ||
| 320 | -2, 20, | ||
| 321 | -1, 0xCF, 0x00, 0x83, 0x30, | ||
| 322 | -1, 0xED, 0x64, 0x03, 0x12, 0x81, | ||
| 323 | -1, 0xE8, 0x85, 0x01, 0x79, | ||
| 324 | -1, 0xCB, 0x39, 0x2c, 0x00, 0x34, 0x02, | ||
| 325 | -1, 0xF7, 0x20, | ||
| 326 | -1, 0xEA, 0x00, 0x00, | ||
| 327 | -1, 0xC0, 0x26, | ||
| 328 | -1, 0xC1, 0x11, | ||
| 329 | -1, 0xC5, 0x35, 0x3E, | ||
| 330 | -1, 0xC7, 0xBE, | ||
| 331 | -1, 0xB1, 0x00, 0x1B, | ||
| 332 | -1, 0xB6, 0x0a, 0x82, 0x27, 0x00, | ||
| 333 | -1, 0xB7, 0x07, | ||
| 334 | -1, 0x3A, 0x55, | ||
| 335 | -1, 0x36, 0x48, | ||
| 336 | -1, 0x11, | ||
| 337 | -2, 120, | ||
| 338 | -1, 0x29, | ||
| 339 | -2, 20, | ||
| 340 | -3 | ||
| 341 | }; | ||
| 342 | |||
| 343 | static const s16 ssd1351_init[] = { | ||
| 344 | -1, 0xfd, 0x12, | ||
| 345 | -1, 0xfd, 0xb1, | ||
| 346 | -1, 0xae, | ||
| 347 | -1, 0xb3, 0xf1, | ||
| 348 | -1, 0xca, 0x7f, | ||
| 349 | -1, 0xa0, 0x74, | ||
| 350 | -1, 0x15, 0x00, 0x7f, | ||
| 351 | -1, 0x75, 0x00, 0x7f, | ||
| 352 | -1, 0xa1, 0x00, | ||
| 353 | -1, 0xa2, 0x00, | ||
| 354 | -1, 0xb5, 0x00, | ||
| 355 | -1, 0xab, 0x01, | ||
| 356 | -1, 0xb1, 0x32, | ||
| 357 | -1, 0xb4, 0xa0, 0xb5, 0x55, | ||
| 358 | -1, 0xbb, 0x17, | ||
| 359 | -1, 0xbe, 0x05, | ||
| 360 | -1, 0xc1, 0xc8, 0x80, 0xc8, | ||
| 361 | -1, 0xc7, 0x0f, | ||
| 362 | -1, 0xb6, 0x01, | ||
| 363 | -1, 0xa6, | ||
| 364 | -1, 0xaf, | ||
| 365 | -3 | ||
| 366 | }; | ||
| 367 | |||
| 368 | /** | ||
| 369 | * struct flexfb_lcd_controller - Describes the LCD controller properties | ||
| 370 | * @name: Model name of the chip | ||
| 371 | * @width: Width of display in pixels | ||
| 372 | * @height: Height of display in pixels | ||
| 373 | * @setaddrwin: Which set_addr_win() implementation to use | ||
| 374 | * @regwidth: LCD Controller Register width in bits | ||
| 375 | * @init_seq: LCD initialization sequence | ||
| 376 | * @init_seq_sz: Size of LCD initialization sequence | ||
| 377 | */ | ||
| 378 | struct flexfb_lcd_controller { | ||
| 379 | const char *name; | ||
| 380 | unsigned int width; | ||
| 381 | unsigned int height; | ||
| 382 | unsigned int setaddrwin; | ||
| 383 | unsigned int regwidth; | ||
| 384 | const s16 *init_seq; | ||
| 385 | int init_seq_sz; | ||
| 386 | }; | ||
| 387 | |||
| 388 | static const struct flexfb_lcd_controller flexfb_chip_table[] = { | ||
| 389 | { | ||
| 390 | .name = "st7735r", | ||
| 391 | .width = 120, | ||
| 392 | .height = 160, | ||
| 393 | .init_seq = st7735r_init, | ||
| 394 | .init_seq_sz = ARRAY_SIZE(st7735r_init), | ||
| 395 | }, | ||
| 396 | { | ||
| 397 | .name = "hx8340bn", | ||
| 398 | .width = 176, | ||
| 399 | .height = 220, | ||
| 400 | .init_seq = hx8340bn_init, | ||
| 401 | .init_seq_sz = ARRAY_SIZE(hx8340bn_init), | ||
| 402 | }, | ||
| 403 | { | ||
| 404 | .name = "ili9225", | ||
| 405 | .width = 176, | ||
| 406 | .height = 220, | ||
| 407 | .regwidth = 16, | ||
| 408 | .init_seq = ili9225_init, | ||
| 409 | .init_seq_sz = ARRAY_SIZE(ili9225_init), | ||
| 410 | }, | ||
| 411 | { | ||
| 412 | .name = "ili9320", | ||
| 413 | .width = 240, | ||
| 414 | .height = 320, | ||
| 415 | .setaddrwin = 1, | ||
| 416 | .regwidth = 16, | ||
| 417 | .init_seq = ili9320_init, | ||
| 418 | .init_seq_sz = ARRAY_SIZE(ili9320_init), | ||
| 419 | }, | ||
| 420 | { | ||
| 421 | .name = "ili9325", | ||
| 422 | .width = 240, | ||
| 423 | .height = 320, | ||
| 424 | .setaddrwin = 1, | ||
| 425 | .regwidth = 16, | ||
| 426 | .init_seq = ili9325_init, | ||
| 427 | .init_seq_sz = ARRAY_SIZE(ili9325_init), | ||
| 428 | }, | ||
| 429 | { | ||
| 430 | .name = "ili9341", | ||
| 431 | .width = 240, | ||
| 432 | .height = 320, | ||
| 433 | .init_seq = ili9341_init, | ||
| 434 | .init_seq_sz = ARRAY_SIZE(ili9341_init), | ||
| 435 | }, | ||
| 436 | { | ||
| 437 | .name = "ssd1289", | ||
| 438 | .width = 240, | ||
| 439 | .height = 320, | ||
| 440 | .setaddrwin = 2, | ||
| 441 | .regwidth = 16, | ||
| 442 | .init_seq = ssd1289_init, | ||
| 443 | .init_seq_sz = ARRAY_SIZE(ssd1289_init), | ||
| 444 | }, | ||
| 445 | { | ||
| 446 | .name = "ssd1351", | ||
| 447 | .width = 128, | ||
| 448 | .height = 128, | ||
| 449 | .setaddrwin = 3, | ||
| 450 | .init_seq = ssd1351_init, | ||
| 451 | .init_seq_sz = ARRAY_SIZE(ssd1351_init), | ||
| 452 | }, | ||
| 453 | }; | ||
| 454 | |||
| 455 | /* ili9320, ili9325 */ | ||
| 456 | static void flexfb_set_addr_win_1(struct fbtft_par *par, | ||
| 457 | int xs, int ys, int xe, int ye) | ||
| 458 | { | ||
| 459 | switch (par->info->var.rotate) { | ||
| 460 | /* R20h = Horizontal GRAM Start Address */ | ||
| 461 | /* R21h = Vertical GRAM Start Address */ | ||
| 462 | case 0: | ||
| 463 | write_reg(par, 0x0020, xs); | ||
| 464 | write_reg(par, 0x0021, ys); | ||
| 465 | break; | ||
| 466 | case 180: | ||
| 467 | write_reg(par, 0x0020, width - 1 - xs); | ||
| 468 | write_reg(par, 0x0021, height - 1 - ys); | ||
| 469 | break; | ||
| 470 | case 270: | ||
| 471 | write_reg(par, 0x0020, width - 1 - ys); | ||
| 472 | write_reg(par, 0x0021, xs); | ||
| 473 | break; | ||
| 474 | case 90: | ||
| 475 | write_reg(par, 0x0020, ys); | ||
| 476 | write_reg(par, 0x0021, height - 1 - xs); | ||
| 477 | break; | ||
| 478 | } | ||
| 479 | write_reg(par, 0x0022); /* Write Data to GRAM */ | ||
| 480 | } | ||
| 481 | |||
| 482 | /* ssd1289 */ | ||
| 483 | static void flexfb_set_addr_win_2(struct fbtft_par *par, | ||
| 484 | int xs, int ys, int xe, int ye) | ||
| 485 | { | ||
| 486 | switch (par->info->var.rotate) { | ||
| 487 | /* R4Eh - Set GDDRAM X address counter */ | ||
| 488 | /* R4Fh - Set GDDRAM Y address counter */ | ||
| 489 | case 0: | ||
| 490 | write_reg(par, 0x4e, xs); | ||
| 491 | write_reg(par, 0x4f, ys); | ||
| 492 | break; | ||
| 493 | case 180: | ||
| 494 | write_reg(par, 0x4e, par->info->var.xres - 1 - xs); | ||
| 495 | write_reg(par, 0x4f, par->info->var.yres - 1 - ys); | ||
| 496 | break; | ||
| 497 | case 270: | ||
| 498 | write_reg(par, 0x4e, par->info->var.yres - 1 - ys); | ||
| 499 | write_reg(par, 0x4f, xs); | ||
| 500 | break; | ||
| 501 | case 90: | ||
| 502 | write_reg(par, 0x4e, ys); | ||
| 503 | write_reg(par, 0x4f, par->info->var.xres - 1 - xs); | ||
| 504 | break; | ||
| 505 | } | ||
| 506 | |||
| 507 | /* R22h - RAM data write */ | ||
| 508 | write_reg(par, 0x22, 0); | ||
| 509 | } | ||
| 510 | |||
| 511 | /* ssd1351 */ | ||
| 512 | static void set_addr_win_3(struct fbtft_par *par, | ||
| 513 | int xs, int ys, int xe, int ye) | ||
| 514 | { | ||
| 515 | write_reg(par, 0x15, xs, xe); | ||
| 516 | write_reg(par, 0x75, ys, ye); | ||
| 517 | write_reg(par, 0x5C); | ||
| 518 | } | ||
| 519 | |||
| 520 | static int flexfb_verify_gpios_dc(struct fbtft_par *par) | ||
| 521 | { | ||
| 522 | fbtft_par_dbg(DEBUG_VERIFY_GPIOS, par, "%s()\n", __func__); | ||
| 523 | |||
| 524 | if (!par->gpio.dc) { | ||
| 525 | dev_err(par->info->device, | ||
| 526 | "Missing info about 'dc' gpio. Aborting.\n"); | ||
| 527 | return -EINVAL; | ||
| 528 | } | ||
| 529 | |||
| 530 | return 0; | ||
| 531 | } | ||
| 532 | |||
| 533 | static int flexfb_verify_gpios_db(struct fbtft_par *par) | ||
| 534 | { | ||
| 535 | int i; | ||
| 536 | int num_db = buswidth; | ||
| 537 | |||
| 538 | fbtft_par_dbg(DEBUG_VERIFY_GPIOS, par, "%s()\n", __func__); | ||
| 539 | |||
| 540 | if (!par->gpio.dc) { | ||
| 541 | dev_err(par->info->device, "Missing info about 'dc' gpio. Aborting.\n"); | ||
| 542 | return -EINVAL; | ||
| 543 | } | ||
| 544 | if (!par->gpio.wr) { | ||
| 545 | dev_err(par->info->device, "Missing info about 'wr' gpio. Aborting.\n"); | ||
| 546 | return -EINVAL; | ||
| 547 | } | ||
| 548 | if (latched && !par->gpio.latch) { | ||
| 549 | dev_err(par->info->device, "Missing info about 'latch' gpio. Aborting.\n"); | ||
| 550 | return -EINVAL; | ||
| 551 | } | ||
| 552 | if (latched) | ||
| 553 | num_db = buswidth / 2; | ||
| 554 | for (i = 0; i < num_db; i++) { | ||
| 555 | if (!par->gpio.db[i]) { | ||
| 556 | dev_err(par->info->device, | ||
| 557 | "Missing info about 'db%02d' gpio. Aborting.\n", | ||
| 558 | i); | ||
| 559 | return -EINVAL; | ||
| 560 | } | ||
| 561 | } | ||
| 562 | |||
| 563 | return 0; | ||
| 564 | } | ||
| 565 | |||
| 566 | static void flexfb_chip_load_param(const struct flexfb_lcd_controller *chip) | ||
| 567 | { | ||
| 568 | if (!width) | ||
| 569 | width = chip->width; | ||
| 570 | if (!height) | ||
| 571 | height = chip->height; | ||
| 572 | setaddrwin = chip->setaddrwin; | ||
| 573 | if (chip->regwidth) | ||
| 574 | regwidth = chip->regwidth; | ||
| 575 | if (!init_num) { | ||
| 576 | initp = chip->init_seq; | ||
| 577 | initp_num = chip->init_seq_sz; | ||
| 578 | } | ||
| 579 | } | ||
| 580 | |||
| 581 | static struct fbtft_display flex_display = { }; | ||
| 582 | |||
| 583 | static int flexfb_chip_init(const struct device *dev) | ||
| 584 | { | ||
| 585 | int i; | ||
| 586 | |||
| 587 | for (i = 0; i < ARRAY_SIZE(flexfb_chip_table); i++) | ||
| 588 | if (!strcmp(chip, flexfb_chip_table[i].name)) { | ||
| 589 | flexfb_chip_load_param(&flexfb_chip_table[i]); | ||
| 590 | return 0; | ||
| 591 | } | ||
| 592 | |||
| 593 | dev_err(dev, "chip=%s is not supported\n", chip); | ||
| 594 | |||
| 595 | return -EINVAL; | ||
| 596 | } | ||
| 597 | |||
| 598 | static int flexfb_probe_common(struct spi_device *sdev, | ||
| 599 | struct platform_device *pdev) | ||
| 600 | { | ||
| 601 | struct device *dev; | ||
| 602 | struct fb_info *info; | ||
| 603 | struct fbtft_par *par; | ||
| 604 | int ret; | ||
| 605 | |||
| 606 | initp = init; | ||
| 607 | initp_num = init_num; | ||
| 608 | |||
| 609 | if (sdev) | ||
| 610 | dev = &sdev->dev; | ||
| 611 | else | ||
| 612 | dev = &pdev->dev; | ||
| 613 | |||
| 614 | fbtft_init_dbg(dev, "%s(%s)\n", __func__, | ||
| 615 | sdev ? "'SPI device'" : "'Platform device'"); | ||
| 616 | |||
| 617 | if (chip) { | ||
| 618 | ret = flexfb_chip_init(dev); | ||
| 619 | if (ret) | ||
| 620 | return ret; | ||
| 621 | } | ||
| 622 | |||
| 623 | if (width == 0 || height == 0) { | ||
| 624 | dev_err(dev, "argument(s) missing: width and height has to be set.\n"); | ||
| 625 | return -EINVAL; | ||
| 626 | } | ||
| 627 | flex_display.width = width; | ||
| 628 | flex_display.height = height; | ||
| 629 | fbtft_init_dbg(dev, "Display resolution: %dx%d\n", width, height); | ||
| 630 | fbtft_init_dbg(dev, "chip = %s\n", chip ? chip : "not set"); | ||
| 631 | fbtft_init_dbg(dev, "setaddrwin = %d\n", setaddrwin); | ||
| 632 | fbtft_init_dbg(dev, "regwidth = %d\n", regwidth); | ||
| 633 | fbtft_init_dbg(dev, "buswidth = %d\n", buswidth); | ||
| 634 | |||
| 635 | info = fbtft_framebuffer_alloc(&flex_display, dev, dev->platform_data); | ||
| 636 | if (!info) | ||
| 637 | return -ENOMEM; | ||
| 638 | |||
| 639 | par = info->par; | ||
| 640 | if (sdev) | ||
| 641 | par->spi = sdev; | ||
| 642 | else | ||
| 643 | par->pdev = pdev; | ||
| 644 | if (!par->init_sequence) | ||
| 645 | par->init_sequence = initp; | ||
| 646 | par->fbtftops.init_display = fbtft_init_display; | ||
| 647 | |||
| 648 | /* registerwrite functions */ | ||
| 649 | switch (regwidth) { | ||
| 650 | case 8: | ||
| 651 | par->fbtftops.write_register = fbtft_write_reg8_bus8; | ||
| 652 | break; | ||
| 653 | case 16: | ||
| 654 | par->fbtftops.write_register = fbtft_write_reg16_bus8; | ||
| 655 | break; | ||
| 656 | default: | ||
| 657 | dev_err(dev, | ||
| 658 | "argument 'regwidth': %d is not supported.\n", | ||
| 659 | regwidth); | ||
| 660 | return -EINVAL; | ||
| 661 | } | ||
| 662 | |||
| 663 | /* bus functions */ | ||
| 664 | if (sdev) { | ||
| 665 | par->fbtftops.write = fbtft_write_spi; | ||
| 666 | switch (buswidth) { | ||
| 667 | case 8: | ||
| 668 | par->fbtftops.write_vmem = fbtft_write_vmem16_bus8; | ||
| 669 | if (!par->startbyte) | ||
| 670 | par->fbtftops.verify_gpios = flexfb_verify_gpios_dc; | ||
| 671 | break; | ||
| 672 | case 9: | ||
| 673 | if (regwidth == 16) { | ||
| 674 | dev_err(dev, "argument 'regwidth': %d is not supported with buswidth=%d and SPI.\n", | ||
| 675 | regwidth, buswidth); | ||
| 676 | return -EINVAL; | ||
| 677 | } | ||
| 678 | par->fbtftops.write_register = fbtft_write_reg8_bus9; | ||
| 679 | par->fbtftops.write_vmem = fbtft_write_vmem16_bus9; | ||
| 680 | if (par->spi->master->bits_per_word_mask | ||
| 681 | & SPI_BPW_MASK(9)) { | ||
| 682 | par->spi->bits_per_word = 9; | ||
| 683 | break; | ||
| 684 | } | ||
| 685 | |||
| 686 | dev_warn(dev, | ||
| 687 | "9-bit SPI not available, emulating using 8-bit.\n"); | ||
| 688 | /* allocate buffer with room for dc bits */ | ||
| 689 | par->extra = devm_kzalloc(par->info->device, | ||
| 690 | par->txbuf.len | ||
| 691 | + (par->txbuf.len / 8) + 8, | ||
| 692 | GFP_KERNEL); | ||
| 693 | if (!par->extra) { | ||
| 694 | ret = -ENOMEM; | ||
| 695 | goto out_release; | ||
| 696 | } | ||
| 697 | par->fbtftops.write = fbtft_write_spi_emulate_9; | ||
| 698 | |||
| 699 | break; | ||
| 700 | default: | ||
| 701 | dev_err(dev, | ||
| 702 | "argument 'buswidth': %d is not supported with SPI.\n", | ||
| 703 | buswidth); | ||
| 704 | return -EINVAL; | ||
| 705 | } | ||
| 706 | } else { | ||
| 707 | par->fbtftops.verify_gpios = flexfb_verify_gpios_db; | ||
| 708 | switch (buswidth) { | ||
| 709 | case 8: | ||
| 710 | par->fbtftops.write = fbtft_write_gpio8_wr; | ||
| 711 | par->fbtftops.write_vmem = fbtft_write_vmem16_bus8; | ||
| 712 | break; | ||
| 713 | case 16: | ||
| 714 | par->fbtftops.write_register = fbtft_write_reg16_bus16; | ||
| 715 | if (latched) | ||
| 716 | par->fbtftops.write = fbtft_write_gpio16_wr_latched; | ||
| 717 | else | ||
| 718 | par->fbtftops.write = fbtft_write_gpio16_wr; | ||
| 719 | par->fbtftops.write_vmem = fbtft_write_vmem16_bus16; | ||
| 720 | break; | ||
| 721 | default: | ||
| 722 | dev_err(dev, | ||
| 723 | "argument 'buswidth': %d is not supported with parallel.\n", | ||
| 724 | buswidth); | ||
| 725 | return -EINVAL; | ||
| 726 | } | ||
| 727 | } | ||
| 728 | |||
| 729 | /* set_addr_win function */ | ||
| 730 | switch (setaddrwin) { | ||
| 731 | case 0: | ||
| 732 | /* use default */ | ||
| 733 | break; | ||
| 734 | case 1: | ||
| 735 | par->fbtftops.set_addr_win = flexfb_set_addr_win_1; | ||
| 736 | break; | ||
| 737 | case 2: | ||
| 738 | par->fbtftops.set_addr_win = flexfb_set_addr_win_2; | ||
| 739 | break; | ||
| 740 | case 3: | ||
| 741 | par->fbtftops.set_addr_win = set_addr_win_3; | ||
| 742 | break; | ||
| 743 | default: | ||
| 744 | dev_err(dev, "argument 'setaddrwin': unknown value %d.\n", | ||
| 745 | setaddrwin); | ||
| 746 | return -EINVAL; | ||
| 747 | } | ||
| 748 | |||
| 749 | if (!nobacklight) | ||
| 750 | par->fbtftops.register_backlight = fbtft_register_backlight; | ||
| 751 | |||
| 752 | ret = fbtft_register_framebuffer(info); | ||
| 753 | if (ret < 0) | ||
| 754 | goto out_release; | ||
| 755 | |||
| 756 | return 0; | ||
| 757 | |||
| 758 | out_release: | ||
| 759 | fbtft_framebuffer_release(info); | ||
| 760 | |||
| 761 | return ret; | ||
| 762 | } | ||
| 763 | |||
| 764 | static int flexfb_remove_common(struct device *dev, struct fb_info *info) | ||
| 765 | { | ||
| 766 | struct fbtft_par *par; | ||
| 767 | |||
| 768 | if (!info) | ||
| 769 | return -EINVAL; | ||
| 770 | par = info->par; | ||
| 771 | if (par) | ||
| 772 | fbtft_par_dbg(DEBUG_DRIVER_INIT_FUNCTIONS, par, "%s()\n", | ||
| 773 | __func__); | ||
| 774 | fbtft_unregister_framebuffer(info); | ||
| 775 | fbtft_framebuffer_release(info); | ||
| 776 | |||
| 777 | return 0; | ||
| 778 | } | ||
| 779 | |||
| 780 | static int flexfb_probe_spi(struct spi_device *spi) | ||
| 781 | { | ||
| 782 | return flexfb_probe_common(spi, NULL); | ||
| 783 | } | ||
| 784 | |||
| 785 | static int flexfb_remove_spi(struct spi_device *spi) | ||
| 786 | { | ||
| 787 | struct fb_info *info = spi_get_drvdata(spi); | ||
| 788 | |||
| 789 | return flexfb_remove_common(&spi->dev, info); | ||
| 790 | } | ||
| 791 | |||
| 792 | static int flexfb_probe_pdev(struct platform_device *pdev) | ||
| 793 | { | ||
| 794 | return flexfb_probe_common(NULL, pdev); | ||
| 795 | } | ||
| 796 | |||
| 797 | static int flexfb_remove_pdev(struct platform_device *pdev) | ||
| 798 | { | ||
| 799 | struct fb_info *info = platform_get_drvdata(pdev); | ||
| 800 | |||
| 801 | return flexfb_remove_common(&pdev->dev, info); | ||
| 802 | } | ||
| 803 | |||
| 804 | static struct spi_driver flexfb_spi_driver = { | ||
| 805 | .driver = { | ||
| 806 | .name = DRVNAME, | ||
| 807 | }, | ||
| 808 | .probe = flexfb_probe_spi, | ||
| 809 | .remove = flexfb_remove_spi, | ||
| 810 | }; | ||
| 811 | |||
| 812 | static const struct platform_device_id flexfb_platform_ids[] = { | ||
| 813 | { "flexpfb", 0 }, | ||
| 814 | { }, | ||
| 815 | }; | ||
| 816 | MODULE_DEVICE_TABLE(platform, flexfb_platform_ids); | ||
| 817 | |||
| 818 | static struct platform_driver flexfb_platform_driver = { | ||
| 819 | .driver = { | ||
| 820 | .name = DRVNAME, | ||
| 821 | }, | ||
| 822 | .id_table = flexfb_platform_ids, | ||
| 823 | .probe = flexfb_probe_pdev, | ||
| 824 | .remove = flexfb_remove_pdev, | ||
| 825 | }; | ||
| 826 | |||
| 827 | static int __init flexfb_init(void) | ||
| 828 | { | ||
| 829 | int ret, ret2; | ||
| 830 | |||
| 831 | ret = spi_register_driver(&flexfb_spi_driver); | ||
| 832 | ret2 = platform_driver_register(&flexfb_platform_driver); | ||
| 833 | if (ret < 0) | ||
| 834 | return ret; | ||
| 835 | return ret2; | ||
| 836 | } | ||
| 837 | |||
| 838 | static void __exit flexfb_exit(void) | ||
| 839 | { | ||
| 840 | spi_unregister_driver(&flexfb_spi_driver); | ||
| 841 | platform_driver_unregister(&flexfb_platform_driver); | ||
| 842 | } | ||
| 843 | |||
| 844 | /* ------------------------------------------------------------------------- */ | ||
| 845 | |||
| 846 | module_init(flexfb_init); | ||
| 847 | module_exit(flexfb_exit); | ||
| 848 | |||
| 849 | MODULE_DESCRIPTION("Generic FB driver for TFT LCD displays"); | ||
| 850 | MODULE_AUTHOR("Noralf Tronnes"); | ||
| 851 | MODULE_LICENSE("GPL"); | ||
| @@ -261,11 +261,11 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) · 260 unmodified lines | |||
| 261 | /* Build the PKO buffer pointer */ | 261 | /* Build the PKO buffer pointer */ |
| 262 | hw_buffer.u64 = 0; | 262 | hw_buffer.u64 = 0; |
| 263 | if (skb_shinfo(skb)->nr_frags == 0) { | 263 | if (skb_shinfo(skb)->nr_frags == 0) { |
| 264 | hw_buffer.s.addr = XKPHYS_TO_PHYS((u64)skb->data); | 264 | hw_buffer.s.addr = XKPHYS_TO_PHYS((uintptr_t)skb->data); |
| 265 | hw_buffer.s.pool = 0; | 265 | hw_buffer.s.pool = 0; |
| 266 | hw_buffer.s.size = skb->len; | 266 | hw_buffer.s.size = skb->len; |
| 267 | } else { | 267 | } else { |
| 268 | hw_buffer.s.addr = XKPHYS_TO_PHYS((u64)skb->data); | 268 | hw_buffer.s.addr = XKPHYS_TO_PHYS((uintptr_t)skb->data); |
| 269 | hw_buffer.s.pool = 0; | 269 | hw_buffer.s.pool = 0; |
| 270 | hw_buffer.s.size = skb_headlen(skb); | 270 | hw_buffer.s.size = skb_headlen(skb); |
| 271 | CVM_OCT_SKB_CB(skb)[0] = hw_buffer.u64; | 271 | CVM_OCT_SKB_CB(skb)[0] = hw_buffer.u64; |
| @@ -273,11 +273,12 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) · 1 unmodified line | |||
| 273 | skb_frag_t *fs = skb_shinfo(skb)->frags + i; | 273 | skb_frag_t *fs = skb_shinfo(skb)->frags + i; |
| 274 | 274 | ||
| 275 | hw_buffer.s.addr = | 275 | hw_buffer.s.addr = |
| 276 | XKPHYS_TO_PHYS((u64)skb_frag_address(fs)); | 276 | XKPHYS_TO_PHYS((uintptr_t)skb_frag_address(fs)); |
| 277 | hw_buffer.s.size = skb_frag_size(fs); | 277 | hw_buffer.s.size = skb_frag_size(fs); |
| 278 | CVM_OCT_SKB_CB(skb)[i + 1] = hw_buffer.u64; | 278 | CVM_OCT_SKB_CB(skb)[i + 1] = hw_buffer.u64; |
| 279 | } | 279 | } |
| 280 | hw_buffer.s.addr = XKPHYS_TO_PHYS((u64)CVM_OCT_SKB_CB(skb)); | 280 | hw_buffer.s.addr = |
| 281 | XKPHYS_TO_PHYS((uintptr_t)CVM_OCT_SKB_CB(skb)); | ||
| 281 | hw_buffer.s.size = skb_shinfo(skb)->nr_frags + 1; | 282 | hw_buffer.s.size = skb_shinfo(skb)->nr_frags + 1; |
| 282 | pko_command.s.segs = skb_shinfo(skb)->nr_frags + 1; | 283 | pko_command.s.segs = skb_shinfo(skb)->nr_frags + 1; |
| 283 | pko_command.s.gather = 1; | 284 | pko_command.s.gather = 1; |
| @@ -349,10 +350,8 @@ int cvm_oct_xmit(struct sk_buff *skb, struct net_device *dev) · 65 unmodified lines | |||
| 349 | */ | 350 | */ |
| 350 | dst_release(skb_dst(skb)); | 351 | dst_release(skb_dst(skb)); |
| 351 | skb_dst_set(skb, NULL); | 352 | skb_dst_set(skb, NULL); |
| 352 | #ifdef CONFIG_XFRM | 353 | skb_ext_reset(skb); |
| 353 | secpath_reset(skb); | 354 | nf_reset_ct(skb); |
| 354 | #endif | ||
| 355 | nf_reset(skb); | ||
| 356 | 355 | ||
| 357 | #ifdef CONFIG_NET_SCHED | 356 | #ifdef CONFIG_NET_SCHED |
| 358 | skb->tc_index = 0; | 357 | skb->tc_index = 0; |
| @@ -1202,7 +1202,7 @@ static inline int cvmx_wqe_get_grp(cvmx_wqe_t *work) · 1201 unmodified lines | |||
| 1202 | 1202 | ||
| 1203 | static inline void *cvmx_phys_to_ptr(uint64_t physical_address) | 1203 | static inline void *cvmx_phys_to_ptr(uint64_t physical_address) |
| 1204 | { | 1204 | { |
| 1205 | return (void *)(physical_address); | 1205 | return (void *)(uintptr_t)(physical_address); |
| 1206 | } | 1206 | } |
| 1207 | 1207 | ||
| 1208 | static inline uint64_t cvmx_ptr_to_phys(void *ptr) | 1208 | static inline uint64_t cvmx_ptr_to_phys(void *ptr) |
| @@ -409,7 +409,7 @@ static int odm_ARFBRefresh_8188E(struct odm_dm_struct *dm_odm, struct odm_ra_inf · 408 unmodified lines | |||
| 409 | pRaInfo->PTModeSS = 3; | 409 | pRaInfo->PTModeSS = 3; |
| 410 | else if (pRaInfo->HighestRate > 0x0b) | 410 | else if (pRaInfo->HighestRate > 0x0b) |
| 411 | pRaInfo->PTModeSS = 2; | 411 | pRaInfo->PTModeSS = 2; |
| 412 | else if (pRaInfo->HighestRate > 0x0b) | 412 | else if (pRaInfo->HighestRate > 0x03) |
| 413 | pRaInfo->PTModeSS = 1; | 413 | pRaInfo->PTModeSS = 1; |
| 414 | else | 414 | else |
| 415 | pRaInfo->PTModeSS = 0; | 415 | pRaInfo->PTModeSS = 0; |
| @@ -348,8 +348,10 @@ static struct adapter *rtw_usb_if1_init(struct dvobj_priv *dvobj, · 347 unmodified lines | |||
| 348 | } | 348 | } |
| 349 | 349 | ||
| 350 | padapter->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL); | 350 | padapter->HalData = kzalloc(sizeof(struct hal_data_8188e), GFP_KERNEL); |
| 351 | if (!padapter->HalData) | 351 | if (!padapter->HalData) { |
| 352 | DBG_88E("cant not alloc memory for HAL DATA\n"); | 352 | DBG_88E("Failed to allocate memory for HAL data\n"); |
| 353 | goto free_adapter; | ||
| 354 | } | ||
| 353 | 355 | ||
| 354 | /* step read_chip_version */ | 356 | /* step read_chip_version */ |
| 355 | rtw_hal_read_chip_version(padapter); | 357 | rtw_hal_read_chip_version(padapter); |
| @@ -0,0 +1,369 @@ | |||
| 1 | What: /sys/accessibility/speakup/attrib_bleep | ||
| 2 | KernelVersion: 2.6 | ||
| 3 | Contact: speakup@linux-speakup.org | ||
| 4 | Description: Beeps the PC speaker when there is an attribute change such as | ||
| 5 | foreground or background color when using speakup review | ||
| 6 | commands. One = on, zero = off. | ||
| 7 | |||
| 8 | What: /sys/accessibility/speakup/bell_pos | ||
| 9 | KernelVersion: 2.6 | ||
| 10 | Contact: speakup@linux-speakup.org | ||
| 11 | Description: This works much like a typewriter bell. If for example 72 is | ||
| 12 | echoed to bell_pos, it will beep the PC speaker when typing on | ||
| 13 | a line past character 72. | ||
| 14 | |||
| 15 | What: /sys/accessibility/speakup/bleeps | ||
| 16 | KernelVersion: 2.6 | ||
| 17 | Contact: speakup@linux-speakup.org | ||
| 18 | Description: This controls whether one hears beeps through the PC speaker | ||
| 19 | when using speakup's review commands. | ||
| 20 | TODO: what values does it accept? | ||
| 21 | |||
| 22 | What: /sys/accessibility/speakup/bleep_time | ||
| 23 | KernelVersion: 2.6 | ||
| 24 | Contact: speakup@linux-speakup.org | ||
| 25 | Description: This controls the duration of the PC speaker beeps speakup | ||
| 26 | produces. | ||
| 27 | TODO: What are the units? Jiffies? | ||
| 28 | |||
| 29 | What: /sys/accessibility/speakup/cursor_time | ||
| 30 | KernelVersion: 2.6 | ||
| 31 | Contact: speakup@linux-speakup.org | ||
| 32 | Description: This controls cursor delay when using arrow keys. When a | ||
| 33 | connection is very slow, with the default setting, when moving | ||
| 34 | with the arrows, or backspacing etc. speakup says the incorrect | ||
| 35 | characters. Set this to a higher value to adjust for the delay | ||
| 36 | and better synchronisation between cursor position and speech. | ||
| 37 | |||
| 38 | What: /sys/accessibility/speakup/delimiters | ||
| 39 | KernelVersion: 2.6 | ||
| 40 | Contact: speakup@linux-speakup.org | ||
| 41 | Description: Delimit a word from speakup. | ||
| 42 | TODO: add more info | ||
| 43 | |||
| 44 | What: /sys/accessibility/speakup/ex_num | ||
| 45 | KernelVersion: 2.6 | ||
| 46 | Contact: speakup@linux-speakup.org | ||
| 47 | Description: TODO: | ||
| 48 | |||
| 49 | What: /sys/accessibility/speakup/key_echo | ||
| 50 | KernelVersion: 2.6 | ||
| 51 | Contact: speakup@linux-speakup.org | ||
| 52 | Description: Controls if speakup speaks keys when they are typed. One = on, | ||
| 53 | zero = off or don't echo keys. | ||
| 54 | |||
| 55 | What: /sys/accessibility/speakup/keymap | ||
| 56 | KernelVersion: 2.6 | ||
| 57 | Contact: speakup@linux-speakup.org | ||
| 58 | Description: Speakup keymap remaps keys to Speakup functions. | ||
| 59 | It uses a binary | ||
| 60 | format. A special program called genmap is needed to compile a | ||
| 61 | textual keymap into the binary format which is then loaded into | ||
| 62 | /sys/accessibility/speakup/keymap. | ||
| 63 | |||
| 64 | What: /sys/accessibility/speakup/no_interrupt | ||
| 65 | KernelVersion: 2.6 | ||
| 66 | Contact: speakup@linux-speakup.org | ||
| 67 | Description: Controls if typing interrupts output from speakup. With | ||
| 68 | no_interrupt set to zero, typing on the keyboard will interrupt | ||
| 69 | speakup if for example | ||
| 70 | the say screen command is used before the | ||
| 71 | entire screen is read. | ||
| 72 | With no_interrupt set to one, if the say | ||
| 73 | screen command is used, and one then types on the keyboard, | ||
| 74 | speakup will continue to say the whole screen regardless until | ||
| 75 | it finishes. | ||
| 76 | |||
| 77 | What: /sys/accessibility/speakup/punc_all | ||
| 78 | KernelVersion: 2.6 | ||
| 79 | Contact: speakup@linux-speakup.org | ||
| 80 | Description: This is a list of all the punctuation speakup should speak when | ||
| 81 | punc_level is set to four. | ||
| 82 | |||
| 83 | What: /sys/accessibility/speakup/punc_level | ||
| 84 | KernelVersion: 2.6 | ||
| 85 | Contact: speakup@linux-speakup.org | ||
| 86 | Description: Controls the level of punctuation spoken as the screen is | ||
| 87 | displayed, not reviewed. Levels range from zero no punctuation, | ||
| 88 | to four, all punctuation. One corresponds to punc_some, two | ||
| 89 | corresponds to punc_most, and three as well as four both | ||
| 90 | correspond to punc_all. Some hardware synthesizers may have | ||
| 91 | different levels each corresponding to three and four for | ||
| 92 | punc_level. Also note that if punc_level is set to zero, and | ||
| 93 | key_echo is set to one, typed punctuation is still spoken as it | ||
| 94 | is typed. | ||
| 95 | |||
| 96 | What: /sys/accessibility/speakup/punc_most | ||
| 97 | KernelVersion: 2.6 | ||
| 98 | Contact: speakup@linux-speakup.org | ||
| 99 | Description: This is a list of all the punctuation speakup should speak when | ||
| 100 | punc_level is set to two. | ||
| 101 | |||
| 102 | What: /sys/accessibility/speakup/punc_some | ||
| 103 | KernelVersion: 2.6 | ||
| 104 | Contact: speakup@linux-speakup.org | ||
| 105 | Description: This is a list of all the punctuation speakup should speak when | ||
| 106 | punc_level is set to one. | ||
| 107 | |||
| 108 | What: /sys/accessibility/speakup/reading_punc | ||
| 109 | KernelVersion: 2.6 | ||
| 110 | Contact: speakup@linux-speakup.org | ||
| 111 | Description: Almost the same as punc_level, the differences being that | ||
| 112 | reading_punc controls the level of punctuation when reviewing | ||
| 113 | the screen with speakup's screen review commands. The other | ||
| 114 | difference is that reading_punc set to three speaks punc_all, | ||
| 115 | and reading_punc set to four speaks all punctuation, including | ||
| 116 | spaces. | ||
| 117 | |||
| 118 | What: /sys/accessibility/speakup/repeats | ||
| 119 | KernelVersion: 2.6 | ||
| 120 | Contact: speakup@linux-speakup.org | ||
| 121 | Description: A list of characters speakup repeats. Normally, when there are | ||
| 122 | more than three characters in a row, speakup | ||
| 123 | just reads three of | ||
| 124 | those characters. For example, "......" would be read as dot, | ||
| 125 | dot, dot. If a . is added to the list of characters in repeats, | ||
| 126 | "......" would be read as dot, dot, dot, times six. | ||
| 127 | |||
| 128 | What: /sys/accessibility/speakup/say_control | ||
| 129 | KernelVersion: 2.6 | ||
| 130 | Contact: speakup@linux-speakup.org | ||
| 131 | Description: If set to one, speakup speaks shift, alt and control when those | ||
| 132 | keys are pressed. If say_control is set to zero, shift, ctrl, | ||
| 133 | and alt are not spoken when they are pressed. | ||
| 134 | |||
| 135 | What: /sys/accessibility/speakup/say_word_ctl | ||
| 136 | KernelVersion: 2.6 | ||
| 137 | Contact: speakup@linux-speakup.org | ||
| 138 | Description: TODO: | ||
| 139 | |||
| 140 | What: /sys/accessibility/speakup/silent | ||
| 141 | KernelVersion: 2.6 | ||
| 142 | Contact: speakup@linux-speakup.org | ||
| 143 | Description: TODO: | ||
| 144 | |||
| 145 | What: /sys/accessibility/speakup/spell_delay | ||
| 146 | KernelVersion: 2.6 | ||
| 147 | Contact: speakup@linux-speakup.org | ||
| 148 | Description: This controls how fast a word is spelled | ||
| 149 | when speakup's say word | ||
| 150 | review command is pressed twice quickly to speak the current | ||
| 151 | word being reviewed. Zero just speaks the letters one after | ||
| 152 | another, while values one through four | ||
| 153 | seem to introduce more of | ||
| 154 | a pause between the spelling of each letter by speakup. | ||
| 155 | |||
| 156 | What: /sys/accessibility/speakup/synth | ||
| 157 | KernelVersion: 2.6 | ||
| 158 | Contact: speakup@linux-speakup.org | ||
| 159 | Description: Gets or sets the synthesizer driver currently in use. Reading | ||
| 160 | synth returns the synthesizer driver currently in use. Writing | ||
| 161 | synth switches to the given synthesizer driver, provided it is | ||
| 162 | either built into the kernel, or already loaded as a module. | ||
| 163 | |||
| 164 | What: /sys/accessibility/speakup/synth_direct | ||
| 165 | KernelVersion: 2.6 | ||
| 166 | Contact: speakup@linux-speakup.org | ||
| 167 | Description: Sends whatever is written to synth_direct | ||
| 168 | directly to the speech synthesizer in use, bypassing speakup. | ||
| 169 | This could be used to make the synthesizer speak | ||
| 170 | a string, or to | ||
| 171 | send control sequences to the synthesizer to change how the | ||
| 172 | synthesizer behaves. | ||
| 173 | |||
| 174 | What: /sys/accessibility/speakup/version | ||
| 175 | KernelVersion: 2.6 | ||
| 176 | Contact: speakup@linux-speakup.org | ||
| 177 | Description: Reading version returns the version of speakup, and the version | ||
| 178 | of the synthesizer driver currently in use. | ||
| 179 | |||
| 180 | What: /sys/accessibility/speakup/i18n/announcements | ||
| 181 | KernelVersion: 2.6 | ||
| 182 | Contact: speakup@linux-speakup.org | ||
| 183 | Description: This file contains various general announcements, most of which | ||
| 184 | cannot be categorized. You will find messages such as "You | ||
| 185 | killed Speakup", "I'm alive", "leaving help", "parked", | ||
| 186 | "unparked", and others. You will also find the names of the | ||
| 187 | screen edges and cursor tracking modes here. | ||
| 188 | |||
| 189 | What: /sys/accessibility/speakup/i18n/chartab | ||
| 190 | KernelVersion: 2.6 | ||
| 191 | Contact: speakup@linux-speakup.org | ||
| 192 | Description: TODO | ||
| 193 | |||
| 194 | What: /sys/accessibility/speakup/i18n/ctl_keys | ||
| 195 | KernelVersion: 2.6 | ||
| 196 | Contact: speakup@linux-speakup.org | ||
| 197 | Description: Here, you will find names of control keys. These are used with | ||
| 198 | Speakup's say_control feature. | ||
| 199 | |||
| 200 | What: /sys/accessibility/speakup/i18n/function_names | ||
| 201 | KernelVersion: 2.6 | ||
| 202 | Contact: speakup@linux-speakup.org | ||
| 203 | Description: Here, you will find a list of names for Speakup functions. | ||
| 204 | These are used by the help system. For example, suppose that | ||
| 205 | you have activated help mode, and you pressed | ||
| 206 | keypad 3. Speakup | ||
| 207 | says: "keypad 3 is character, say next." | ||
| 208 | The message "character, say next" names a Speakup function, and | ||
| 209 | it comes from this function_names file. | ||
| 210 | |||
| 211 | What: /sys/accessibility/speakup/i18n/states | ||
| 212 | KernelVersion: 2.6 | ||
| 213 | Contact: speakup@linux-speakup.org | ||
| 214 | Description: This file contains names for key states. | ||
| 215 | Again, these are part of the help system. For instance, if you | ||
| 216 | had pressed speakup + keypad 3, you would hear: | ||
| 217 | "speakup keypad 3 is go to bottom edge." | ||
| 218 | The speakup key is depressed, so the name of the key state is | ||
| 219 | speakup. | ||
| 220 | This part of the message comes from the states collection. | ||
| 221 | |||
| 222 | What: /sys/accessibility/speakup/i18n/characters | ||
| 223 | KernelVersion: 2.6 | ||
| 224 | Contact: speakup@linux-speakup.org | ||
| 225 | Description: Through this sys entry, Speakup gives you the ability to change | ||
| 226 | how Speakup pronounces a given character. You could, for | ||
| 227 | example, change how some punctuation characters are spoken. You | ||
| 228 | can even change how Speakup will pronounce certain letters. For | ||
| 229 | further details see '12. Changing the Pronunciation of | ||
| 230 | Characters' in Speakup User's Guide (file spkguide.txt in | ||
| 231 | source). | ||
| 232 | |||
| 233 | What: /sys/accessibility/speakup/i18n/colors | ||
| 234 | KernelVersion: 2.6 | ||
| 235 | Contact: speakup@linux-speakup.org | ||
| 236 | Description: When you use the "say attributes" function, Speakup says the | ||
| 237 | name of the foreground and background colors. These names come | ||
| 238 | from the i18n/colors file. | ||
| 239 | |||
| 240 | What: /sys/accessibility/speakup/i18n/formatted | ||
| 241 | KernelVersion: 2.6 | ||
| 242 | Contact: speakup@linux-speakup.org | ||
| 243 | Description: This group of messages contains embedded formatting codes, to | ||
| 244 | specify the type and width of displayed data. If you change | ||
| 245 | these, you must preserve all of the formatting codes, and they | ||
| 246 | must appear in the order used by the default messages. | ||
| 247 | |||
| 248 | What: /sys/accessibility/speakup/i18n/key_names | ||
| 249 | KernelVersion: 2.6 | ||
| 250 | Contact: speakup@linux-speakup.org | ||
| 251 | Description: Again, key_names is used by Speakup's help system. In the | ||
| 252 | previous example, Speakup said that you pressed "keypad 3." | ||
| 253 | This name came from the key_names file. | ||
| 254 | |||
| 255 | What: /sys/accessibility/speakup/<synth-name>/ | ||
| 256 | KernelVersion: 2.6 | ||
| 257 | Contact: speakup@linux-speakup.org | ||
| 258 | Description: In `/sys/accessibility/speakup` is a directory corresponding to | ||
| 259 | the synthesizer driver currently in use (E.G) `soft` for the | ||
| 260 | soft driver. This directory contains files which control the | ||
| 261 | speech synthesizer itself, | ||
| 262 | as opposed to controlling the speakup | ||
| 263 | screen reader. The parameters in this directory have the same | ||
| 264 | names and functions across all | ||
| 265 | supported synthesizers. The range | ||
| 266 | of values for freq, pitch, rate, and vol is the same for all | ||
| 267 | supported synthesizers, with the given range being internally | ||
| 268 | mapped by the driver to more or less fit the range of values | ||
| 269 | supported for a given parameter by the individual synthesizer. | ||
| 270 | Below is a description of values and parameters for soft | ||
| 271 | synthesizer, which is currently the most commonly used. | ||
| 272 | |||
| 273 | What: /sys/accessibility/speakup/soft/caps_start | ||
| 274 | KernelVersion: 2.6 | ||
| 275 | Contact: speakup@linux-speakup.org | ||
| 276 | Description: This is the string that is sent to the synthesizer to cause it | ||
| 277 | to start speaking uppercase letters. For the soft synthesizer | ||
| 278 | and most others, this causes the pitch of the voice to rise | ||
| 279 | above the currently set pitch. | ||
| 280 | |||
| 281 | What: /sys/accessibility/speakup/soft/caps_stop | ||
| 282 | KernelVersion: 2.6 | ||
| 283 | Contact: speakup@linux-speakup.org | ||
| 284 | Description: This is the string sent to the synthesizer to cause it to stop | ||
| 285 | speaking uppercase letters. In the case of the soft synthesizer | ||
| 286 | and most others, this returns the pitch of the voice | ||
| 287 | down to the | ||
| 288 | currently set pitch. | ||
| 289 | |||
| 290 | What: /sys/accessibility/speakup/soft/delay_time | ||
| 291 | KernelVersion: 2.6 | ||
| 292 | Contact: speakup@linux-speakup.org | ||
| 293 | Description: TODO: | ||
| 294 | |||
| 295 | What: /sys/accessibility/speakup/soft/direct | ||
| 296 | KernelVersion: 2.6 | ||
| 297 | Contact: speakup@linux-speakup.org | ||
| 298 | Description: Controls if punctuation is spoken by speakup, or by the | ||
| 299 | synthesizer. | ||
| 300 | For example, speakup speaks ">" as "greater", while | ||
| 301 | the espeak synthesizer used by the soft driver speaks "greater | ||
| 302 | than". Zero lets speakup speak the punctuation. One lets the | ||
| 303 | synthesizer itself speak punctuation. | ||
| 304 | |||
| 305 | What: /sys/accessibility/speakup/soft/freq | ||
| 306 | KernelVersion: 2.6 | ||
| 307 | Contact: speakup@linux-speakup.org | ||
| 308 | Description: Gets or sets the frequency of the speech synthesizer. Range is | ||
| 309 | 0-9. | ||
| 310 | |||
| 311 | What: /sys/accessibility/speakup/soft/full_time | ||
| 312 | KernelVersion: 2.6 | ||
| 313 | Contact: speakup@linux-speakup.org | ||
| 314 | Description: TODO: | ||
| 315 | |||
| 316 | What: /sys/accessibility/speakup/soft/jiffy_delta | ||
| 317 | KernelVersion: 2.6 | ||
| 318 | Contact: speakup@linux-speakup.org | ||
| 319 | Description: This controls how many jiffys the kernel gives to the | ||
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File renamed without changes.
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