There is no reason to wait for clock stabilization here, as the clock framework guarantees that PLL clock sources are stable before clk_enable returns.
Unified · Split
| @@ -444,9 +444,6 @@ static int etnaviv_hw_reset(struct etnaviv_gpu *gpu) · 443 unmodified lines | |||
| 444 | control = VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(fscale); | 444 | control = VIVS_HI_CLOCK_CONTROL_FSCALE_VAL(fscale); |
| 445 | etnaviv_gpu_load_clock(gpu, control); | 445 | etnaviv_gpu_load_clock(gpu, control); |
| 446 | 446 | ||
| 447 | /* Wait for stable clock. Vivante's code waited for 1ms */ | ||
| 448 | usleep_range(1000, 10000); | ||
| 449 | |||
| 450 | /* isolate the GPU. */ | 447 | /* isolate the GPU. */ |
| 451 | control |= VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU; | 448 | control |= VIVS_HI_CLOCK_CONTROL_ISOLATE_GPU; |
| 452 | gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); | 449 | gpu_write(gpu, VIVS_HI_CLOCK_CONTROL, control); |