Pull MFD updates from Lee Jones: "New Drivers: - Add support for Maxim MAX77714 PMIC Removed Drivers: - Remove support for ST-Ericsson AB8500 DebugFS New Device Support: - Add support for Silergy SY7636A to Simple MFD I2C - Add support for MediaTek MT6366 PMIC to MT6358 IRQ - Add support for Charger to Intel PMIC CRC - Add support for Raptor Lake to Intel LPSS PCI New Functionality: - Add support for Reboot to Rockchip RK808 Fix-ups: - Device Tree changes (includcing YAML conversion) for silergy,sy7636a, maxim,max77843, google,cros-ec, maxim,max14577, maxim,max77802, maxim,max77714, qcom,tcsr, qcom,spmi-pmic, stericsson,ab8500, stericsson,db8500-prcmu, samsung,exynos5433-lpass, mt6397, syscon, brcm,cru - Visible to menuconfig; simple-mfd-i2c - Clean-up or clarify code; max77686, intel_soc_pmic_crc - Improve error handling; mc13xxx-core, stmfx, asic3 - Pass device information to child devices; iqs62x, intel-lpss-acpi - Individually identify IRQ domains; intel_soc_pmic_core - Remove superfluous code; dbx500-prcmu, exynos-lpass - Staticify and constify; arizona-i2c - Mark sometimes used data as __maybe_unused; atmel-flexcom - Account for different ACPI tables on AOSP/Windows platforms; arizona-spi - Use provided (platform) APIs; ab8500-core - Trivial (whitespace, spelling); rohm-bd9576" * tag 'mfd-next-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (50 commits) dt-bindings: mfd: syscon: Add microchip,lan966x-cpu-syscon compatible mfd: bd9576: fix typos in comments mfd: Use platform_get_irq() to get the interrupt mfd: db8500-prcmu: Remove unused inline function mfd: arizona-spi: Add Android board ACPI table handling mfd: arizona-spi: Split Windows ACPI init code into its own function mfd: asic3: Add missing iounmap() on error asic3_mfd_probe MAINTAINERS: Rectify entry for ROHM MULTIFUNCTION BD9571MWV-M PMIC DEVICE DRIVERS mfd: intel-lpss: Provide an SSP type to the driver dt-bindings: mfd: brcm,cru: Rename pinctrl node dt-bindings: Add compatibles for undocumented trivial syscons mfd: atmel-flexcom: Fix compilation warning dt-bindings: mfd: Add compatible for the MediaTek MT6366 PMIC dt-bindings: mfd: samsung,exynos5433-lpass: Convert to dtschema mfd: exynos-lpass: Drop unneeded syscon.h include mfd: intel-lpss: Add Intel Raptor Lake PCH-S PCI IDs mfd: ab8500: Drop debugfs module mfd: sta2x11: Use GFP_KERNEL instead of GFP_ATOMIC mfd: ab8500: Rewrite bindings in YAML mfd: qcom-spmi-pmic: Add pm8953 compatible ...
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| @@ -556,31 +556,11 @@ static inline void prcmu_clear(unsigned int reg, u32 bits) · 555 unmodified lines | ||
| 556 | 556 | #define PRCMU_QOS_ARM_OPP 3 |
| 557 | 557 | #define PRCMU_QOS_DEFAULT_VALUE -1 |
| 558 | 558 | |
| 559 | −#ifdef CONFIG_DBX500_PRCMU_QOS_POWER | |
| 560 | − | |
| 561 | −unsigned long prcmu_qos_get_cpufreq_opp_delay(void); | |
| 562 | −void prcmu_qos_set_cpufreq_opp_delay(unsigned long); | |
| 563 | −void prcmu_qos_force_opp(int, s32); | |
| 564 | −int prcmu_qos_requirement(int pm_qos_class); | |
| 565 | −int prcmu_qos_add_requirement(int pm_qos_class, char *name, s32 value); | |
| 566 | −int prcmu_qos_update_requirement(int pm_qos_class, char *name, s32 new_value); | |
| 567 | −void prcmu_qos_remove_requirement(int pm_qos_class, char *name); | |
| 568 | −int prcmu_qos_add_notifier(int prcmu_qos_class, | |
| 569 | − struct notifier_block *notifier); | |
| 570 | −int prcmu_qos_remove_notifier(int prcmu_qos_class, | |
| 571 | − struct notifier_block *notifier); | |
| 572 | − | |
| 573 | −#else | |
| 574 | − | |
| 575 | 559 | static inline unsigned long prcmu_qos_get_cpufreq_opp_delay(void) |
| 576 | 560 | { |
| 577 | 561 | return 0; |
| 578 | 562 | } |
| 579 | 563 | |
| 580 | −static inline void prcmu_qos_set_cpufreq_opp_delay(unsigned long n) {} | |
| 581 | − | |
| 582 | −static inline void prcmu_qos_force_opp(int prcmu_qos_class, s32 i) {} | |
| 583 | − | |
| 584 | 564 | static inline int prcmu_qos_requirement(int prcmu_qos_class) |
| 585 | 565 | { |
| 586 | 566 | return 0; |
| @@ -613,6 +593,4 @@ static inline int prcmu_qos_remove_notifier(int prcmu_qos_class, · 26 unmodified lines | ||
| 613 | 593 | return 0; |
| 614 | 594 | } |
| 615 | 595 | |
| 616 | −#endif | |
| 617 | − | |
| 618 | 596 | #endif /* __MACH_PRCMU_H */ |
| @@ -14,6 +14,11 @@ · 13 unmodified lines | ||
| 14 | 14 | #define IQS624_PROD_NUM 0x43 |
| 15 | 15 | #define IQS625_PROD_NUM 0x4E |
| 16 | 16 | |
| 17 | +#define IQS620_HW_NUM_V0 0x82 | |
| 18 | +#define IQS620_HW_NUM_V1 IQS620_HW_NUM_V0 | |
| 19 | +#define IQS620_HW_NUM_V2 IQS620_HW_NUM_V0 | |
| 20 | +#define IQS620_HW_NUM_V3 0x92 | |
| 21 | + | |
| 17 | 22 | #define IQS621_ALS_FLAGS 0x16 |
| 18 | 23 | #define IQS622_ALS_FLAGS 0x14 |
| 19 | 24 | |
| @@ -129,6 +134,8 @@ struct iqs62x_core { · 109 unmodified lines | ||
| 129 | 134 | struct completion fw_done; |
| 130 | 135 | enum iqs62x_ui_sel ui_sel; |
| 131 | 136 | unsigned long event_cache; |
| 137 | + u8 sw_num; | |
| 138 | + u8 hw_num; | |
| 132 | 139 | }; |
| 133 | 140 | |
| 134 | 141 | extern const struct iqs62x_event_desc iqs62x_events[IQS62X_NUM_EVENTS]; |
| @@ -152,7 +152,7 @@ enum max77686_rtc_reg { · 151 unmodified lines | ||
| 152 | 152 | MAX77686_RTC_WEEKDAY = 0x0A, |
| 153 | 153 | MAX77686_RTC_MONTH = 0x0B, |
| 154 | 154 | MAX77686_RTC_YEAR = 0x0C, |
| 155 | − MAX77686_RTC_DATE = 0x0D, | |
| 155 | + MAX77686_RTC_MONTHDAY = 0x0D, | |
| 156 | 156 | MAX77686_ALARM1_SEC = 0x0E, |
| 157 | 157 | MAX77686_ALARM1_MIN = 0x0F, |
| 158 | 158 | MAX77686_ALARM1_HOUR = 0x10, |
| @@ -352,7 +352,7 @@ enum max77802_rtc_reg { · 193 unmodified lines | ||
| 352 | 352 | MAX77802_RTC_WEEKDAY = 0xCA, |
| 353 | 353 | MAX77802_RTC_MONTH = 0xCB, |
| 354 | 354 | MAX77802_RTC_YEAR = 0xCC, |
| 355 | − MAX77802_RTC_DATE = 0xCD, | |
| 355 | + MAX77802_RTC_MONTHDAY = 0xCD, | |
| 356 | 356 | MAX77802_RTC_AE1 = 0xCE, |
| 357 | 357 | MAX77802_ALARM1_SEC = 0xCF, |
| 358 | 358 | MAX77802_ALARM1_MIN = 0xD0, |
| @@ -0,0 +1,60 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | +/* | |
| 3 | + * Maxim MAX77714 Register and data structures definition. | |
| 4 | + * | |
| 5 | + * Copyright (C) 2022 Luca Ceresoli | |
| 6 | + * Author: Luca Ceresoli <luca@lucaceresoli.net> | |
| 7 | + */ | |
| 8 | + | |
| 9 | +#ifndef __LINUX_MFD_MAX77714_H_ | |
| 10 | +#define __LINUX_MFD_MAX77714_H_ | |
| 11 | + | |
| 12 | +#include <linux/bits.h> | |
| 13 | + | |
| 14 | +#define MAX77714_INT_TOP 0x00 | |
| 15 | +#define MAX77714_INT_TOPM 0x07 /* Datasheet says "read only", but it is RW */ | |
| 16 | + | |
| 17 | +#define MAX77714_INT_TOP_ONOFF BIT(1) | |
| 18 | +#define MAX77714_INT_TOP_RTC BIT(3) | |
| 19 | +#define MAX77714_INT_TOP_GPIO BIT(4) | |
| 20 | +#define MAX77714_INT_TOP_LDO BIT(5) | |
| 21 | +#define MAX77714_INT_TOP_SD BIT(6) | |
| 22 | +#define MAX77714_INT_TOP_GLBL BIT(7) | |
| 23 | + | |
| 24 | +#define MAX77714_32K_STATUS 0x30 | |
| 25 | +#define MAX77714_32K_STATUS_SIOSCOK BIT(5) | |
| 26 | +#define MAX77714_32K_STATUS_XOSCOK BIT(4) | |
| 27 | +#define MAX77714_32K_STATUS_32KSOURCE BIT(3) | |
| 28 | +#define MAX77714_32K_STATUS_32KLOAD_MSK 0x3 | |
| 29 | +#define MAX77714_32K_STATUS_32KLOAD_SHF 1 | |
| 30 | +#define MAX77714_32K_STATUS_CRYSTAL_CFG BIT(0) | |
| 31 | + | |
| 32 | +#define MAX77714_32K_CONFIG 0x31 | |
| 33 | +#define MAX77714_32K_CONFIG_XOSC_RETRY BIT(4) | |
| 34 | + | |
| 35 | +#define MAX77714_CNFG_GLBL2 0x91 | |
| 36 | +#define MAX77714_WDTEN BIT(2) | |
| 37 | +#define MAX77714_WDTSLPC BIT(3) | |
| 38 | +#define MAX77714_TWD_MASK 0x3 | |
| 39 | +#define MAX77714_TWD_2s 0x0 | |
| 40 | +#define MAX77714_TWD_16s 0x1 | |
| 41 | +#define MAX77714_TWD_64s 0x2 | |
| 42 | +#define MAX77714_TWD_128s 0x3 | |
| 43 | + | |
| 44 | +#define MAX77714_CNFG_GLBL3 0x92 | |
| 45 | +#define MAX77714_WDTC BIT(0) | |
| 46 | + | |
| 47 | +#define MAX77714_CNFG2_ONOFF 0x94 | |
| 48 | +#define MAX77714_WD_RST_WK BIT(5) | |
| 49 | + | |
| 50 | +/* Interrupts */ | |
| 51 | +enum { | |
| 52 | + MAX77714_IRQ_TOP_ONOFF, | |
| 53 | + MAX77714_IRQ_TOP_RTC, /* Real-time clock */ | |
| 54 | + MAX77714_IRQ_TOP_GPIO, /* GPIOs */ | |
| 55 | + MAX77714_IRQ_TOP_LDO, /* Low-dropout regulators */ | |
| 56 | + MAX77714_IRQ_TOP_SD, /* Step-down regulators */ | |
| 57 | + MAX77714_IRQ_TOP_GLBL, /* "Global resources": Low-Battery, overtemp... */ | |
| 58 | +}; | |
| 59 | + | |
| 60 | +#endif /* __LINUX_MFD_MAX77714_H_ */ | |
| @@ -94,6 +94,10 @@ · 93 unmodified lines | ||
| 94 | 94 | #define MT6358_BUCK_VCORE_CON0 0x1488 |
| 95 | 95 | #define MT6358_BUCK_VCORE_DBG0 0x149e |
| 96 | 96 | #define MT6358_BUCK_VCORE_DBG1 0x14a0 |
| 97 | +#define MT6358_BUCK_VCORE_SSHUB_CON0 0x14a4 | |
| 98 | +#define MT6358_BUCK_VCORE_SSHUB_CON1 0x14a6 | |
| 99 | +#define MT6358_BUCK_VCORE_SSHUB_ELR0 MT6358_BUCK_VCORE_SSHUB_CON1 | |
| 100 | +#define MT6358_BUCK_VCORE_SSHUB_DBG1 MT6358_BUCK_VCORE_DBG1 | |
| 97 | 101 | #define MT6358_BUCK_VCORE_ELR0 0x14aa |
| 98 | 102 | #define MT6358_BUCK_VGPU_CON0 0x1508 |
| 99 | 103 | #define MT6358_BUCK_VGPU_DBG0 0x151e |
| @@ -169,6 +173,9 @@ · 69 unmodified lines | ||
| 169 | 173 | #define MT6358_LDO_VSRAM_OTHERS_CON0 0x1ba6 |
| 170 | 174 | #define MT6358_LDO_VSRAM_OTHERS_DBG0 0x1bc0 |
| 171 | 175 | #define MT6358_LDO_VSRAM_OTHERS_DBG1 0x1bc2 |
| 176 | +#define MT6358_LDO_VSRAM_OTHERS_SSHUB_CON0 0x1bc4 | |
| 177 | +#define MT6358_LDO_VSRAM_OTHERS_SSHUB_CON1 0x1bc6 | |
| 178 | +#define MT6358_LDO_VSRAM_OTHERS_SSHUB_DBG1 MT6358_LDO_VSRAM_OTHERS_DBG1 | |
| 172 | 179 | #define MT6358_LDO_VSRAM_GPU_CON0 0x1bc8 |
| 173 | 180 | #define MT6358_LDO_VSRAM_GPU_DBG0 0x1be2 |
| 174 | 181 | #define MT6358_LDO_VSRAM_GPU_DBG1 0x1be4 |
| @@ -14,6 +14,7 @@ enum chip_id { · 13 unmodified lines | ||
| 14 | 14 | MT6323_CHIP_ID = 0x23, |
| 15 | 15 | MT6358_CHIP_ID = 0x58, |
| 16 | 16 | MT6359_CHIP_ID = 0x59, |
| 17 | + MT6366_CHIP_ID = 0x66, | |
| 17 | 18 | MT6391_CHIP_ID = 0x91, |
| 18 | 19 | MT6397_CHIP_ID = 0x97, |
| 19 | 20 | }; |
| @@ -373,6 +373,7 @@ enum rk805_reg { · 372 unmodified lines | ||
| 373 | 373 | #define SWITCH2_EN BIT(6) |
| 374 | 374 | #define SWITCH1_EN BIT(5) |
| 375 | 375 | #define DEV_OFF_RST BIT(3) |
| 376 | +#define DEV_RST BIT(2) | |
| 376 | 377 | #define DEV_OFF BIT(0) |
| 377 | 378 | #define RTC_STOP BIT(0) |
| 378 | 379 | |
| @@ -0,0 +1,34 @@ | ||
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ | |
| 2 | +/* | |
| 3 | + * Functions to access SY3686A power management chip. | |
| 4 | + * | |
| 5 | + * Copyright (C) 2021 reMarkable AS - http://www.remarkable.com/ | |
| 6 | + */ | |
| 7 | + | |
| 8 | +#ifndef __MFD_SY7636A_H | |
| 9 | +#define __MFD_SY7636A_H | |
| 10 | + | |
| 11 | +#define SY7636A_REG_OPERATION_MODE_CRL 0x00 | |
| 12 | +/* It is set if a gpio is used to control the regulator */ | |
| 13 | +#define SY7636A_OPERATION_MODE_CRL_VCOMCTL BIT(6) | |
| 14 | +#define SY7636A_OPERATION_MODE_CRL_ONOFF BIT(7) | |
| 15 | +#define SY7636A_REG_VCOM_ADJUST_CTRL_L 0x01 | |
| 16 | +#define SY7636A_REG_VCOM_ADJUST_CTRL_H 0x02 | |
| 17 | +#define SY7636A_REG_VCOM_ADJUST_CTRL_MASK 0x01ff | |
| 18 | +#define SY7636A_REG_VLDO_VOLTAGE_ADJULST_CTRL 0x03 | |
| 19 | +#define SY7636A_REG_POWER_ON_DELAY_TIME 0x06 | |
| 20 | +#define SY7636A_REG_FAULT_FLAG 0x07 | |
| 21 | +#define SY7636A_FAULT_FLAG_PG BIT(0) | |
| 22 | +#define SY7636A_REG_TERMISTOR_READOUT 0x08 | |
| 23 | + | |
| 24 | +#define SY7636A_REG_MAX 0x08 | |
| 25 | + | |
| 26 | +#define VCOM_ADJUST_CTRL_MASK 0x1ff | |
| 27 | +// Used to shift the high byte | |
| 28 | +#define VCOM_ADJUST_CTRL_SHIFT 8 | |
| 29 | +// Used to scale from VCOM_ADJUST_CTRL to mv | |
| 30 | +#define VCOM_ADJUST_CTRL_SCAL 10000 | |
| 31 | + | |
| 32 | +#define FAULT_FLAG_SHIFT 1 | |
| 33 | + | |
| 34 | +#endif /* __LINUX_MFD_SY7636A_H */ | |