This allows mesa to set the tiling format for a BO and have that tiling format be respected by mesa on the other side of an import/export (and by vc4 scanout in the kernel), without defining a protocol to pass the tiling through userspace.
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| @@ -38,6 +38,8 @@ extern "C" { · 37 unmodified lines | |||
| 38 | #define DRM_VC4_CREATE_SHADER_BO 0x05 | 38 | #define DRM_VC4_CREATE_SHADER_BO 0x05 |
| 39 | #define DRM_VC4_GET_HANG_STATE 0x06 | 39 | #define DRM_VC4_GET_HANG_STATE 0x06 |
| 40 | #define DRM_VC4_GET_PARAM 0x07 | 40 | #define DRM_VC4_GET_PARAM 0x07 |
| 41 | #define DRM_VC4_SET_TILING 0x08 | ||
| 42 | #define DRM_VC4_GET_TILING 0x09 | ||
| 41 | 43 | ||
| 42 | #define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl) | 44 | #define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl) |
| 43 | #define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno) | 45 | #define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno) |
| @@ -47,6 +49,8 @@ extern "C" { · 3 unmodified lines | |||
| 47 | #define DRM_IOCTL_VC4_CREATE_SHADER_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_SHADER_BO, struct drm_vc4_create_shader_bo) | 49 | #define DRM_IOCTL_VC4_CREATE_SHADER_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_CREATE_SHADER_BO, struct drm_vc4_create_shader_bo) |
| 48 | #define DRM_IOCTL_VC4_GET_HANG_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_HANG_STATE, struct drm_vc4_get_hang_state) | 50 | #define DRM_IOCTL_VC4_GET_HANG_STATE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_HANG_STATE, struct drm_vc4_get_hang_state) |
| 49 | #define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param) | 51 | #define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param) |
| 52 | #define DRM_IOCTL_VC4_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SET_TILING, struct drm_vc4_set_tiling) | ||
| 53 | #define DRM_IOCTL_VC4_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_TILING, struct drm_vc4_get_tiling) | ||
| 50 | 54 | ||
| 51 | struct drm_vc4_submit_rcl_surface { | 55 | struct drm_vc4_submit_rcl_surface { |
| 52 | __u32 hindex; /* Handle index, or ~0 if not present. */ | 56 | __u32 hindex; /* Handle index, or ~0 if not present. */ |
| @@ -295,6 +299,18 @@ struct drm_vc4_get_param { · 242 unmodified lines | |||
| 295 | __u64 value; | 299 | __u64 value; |
| 296 | }; | 300 | }; |
| 297 | 301 | ||
| 302 | struct drm_vc4_get_tiling { | ||
| 303 | __u32 handle; | ||
| 304 | __u32 flags; | ||
| 305 | __u64 modifier; | ||
| 306 | }; | ||
| 307 | |||
| 308 | struct drm_vc4_set_tiling { | ||
| 309 | __u32 handle; | ||
| 310 | __u32 flags; | ||
| 311 | __u64 modifier; | ||
| 312 | }; | ||
| 313 | |||
| 298 | #if defined(__cplusplus) | 314 | #if defined(__cplusplus) |
| 299 | } | 315 | } |
| 300 | #endif | 316 | #endif |