Set the default Quad Enable method for ISSI flashes. Used for ISSI flashes (IS25WP256D-JMLE) that do not support SFDP tables and can not determine the Quad Enable method by parsing BFPT. Based on code originally written by Wesley Terpstra <wesley@sifive.com> and/or Palmer Dabbelt <palmer@sifive.com> https://github.com/riscv/riscv-linux/commit/c94e267766d62bc9a669611c3d0c8ed5ea26569b
Unified · Split
| @@ -4577,6 +4577,11 @@ static void intel_set_default_init(struct spi_nor *nor) · 4576 unmodified lines | |||
| 4577 | nor->flags |= SNOR_F_HAS_LOCK; | 4577 | nor->flags |= SNOR_F_HAS_LOCK; |
| 4578 | } | 4578 | } |
| 4579 | 4579 | ||
| 4580 | static void issi_set_default_init(struct spi_nor *nor) | ||
| 4581 | { | ||
| 4582 | nor->params.quad_enable = spi_nor_sr1_bit6_quad_enable; | ||
| 4583 | } | ||
| 4584 | |||
| 4580 | static void macronix_set_default_init(struct spi_nor *nor) | 4585 | static void macronix_set_default_init(struct spi_nor *nor) |
| 4581 | { | 4586 | { |
| 4582 | nor->params.quad_enable = spi_nor_sr1_bit6_quad_enable; | 4587 | nor->params.quad_enable = spi_nor_sr1_bit6_quad_enable; |
| @@ -4617,6 +4622,10 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor) · 34 unmodified lines | |||
| 4617 | intel_set_default_init(nor); | 4622 | intel_set_default_init(nor); |
| 4618 | break; | 4623 | break; |
| 4619 | 4624 | ||
| 4625 | case SNOR_MFR_ISSI: | ||
| 4626 | issi_set_default_init(nor); | ||
| 4627 | break; | ||
| 4628 | |||
| 4620 | case SNOR_MFR_MACRONIX: | 4629 | case SNOR_MFR_MACRONIX: |
| 4621 | macronix_set_default_init(nor); | 4630 | macronix_set_default_init(nor); |
| 4622 | break; | 4631 | break; |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | |||
| 22 | #define SNOR_MFR_INTEL CFI_MFR_INTEL | 22 | #define SNOR_MFR_INTEL CFI_MFR_INTEL |
| 23 | #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */ | 23 | #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro */ |
| 24 | #define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */ | 24 | #define SNOR_MFR_MICRON CFI_MFR_MICRON /* Micron */ |
| 25 | #define SNOR_MFR_ISSI CFI_MFR_PMC | ||
| 25 | #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX | 26 | #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX |
| 26 | #define SNOR_MFR_SPANSION CFI_MFR_AMD | 27 | #define SNOR_MFR_SPANSION CFI_MFR_AMD |
| 27 | #define SNOR_MFR_SST CFI_MFR_SST | 28 | #define SNOR_MFR_SST CFI_MFR_SST |