Enable user-space to issue vector I/O commands through ioctls. To issue a vector I/O, the ppa list with addresses is also required and must be mapped for the controller to access. For each ioctl, the result and status bits are returned as well, such that user-space can retrieve the open-channel SSD completion bits. The implementation covers the traditional use-cases of bad block management, and vectored read/write/erase.
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| @@ -122,6 +122,44 @@ struct nvm_ioctl_dev_factory { · 121 unmodified lines | |||
| 122 | __u32 flags; | 122 | __u32 flags; |
| 123 | }; | 123 | }; |
| 124 | 124 | ||
| 125 | struct nvm_user_vio { | ||
| 126 | __u8 opcode; | ||
| 127 | __u8 flags; | ||
| 128 | __u16 control; | ||
| 129 | __u16 nppas; | ||
| 130 | __u16 rsvd; | ||
| 131 | __u64 metadata; | ||
| 132 | __u64 addr; | ||
| 133 | __u64 ppa_list; | ||
| 134 | __u32 metadata_len; | ||
| 135 | __u32 data_len; | ||
| 136 | __u64 status; | ||
| 137 | __u32 result; | ||
| 138 | __u32 rsvd3[3]; | ||
| 139 | }; | ||
| 140 | |||
| 141 | struct nvm_passthru_vio { | ||
| 142 | __u8 opcode; | ||
| 143 | __u8 flags; | ||
| 144 | __u8 rsvd[2]; | ||
| 145 | __u32 nsid; | ||
| 146 | __u32 cdw2; | ||
| 147 | __u32 cdw3; | ||
| 148 | __u64 metadata; | ||
| 149 | __u64 addr; | ||
| 150 | __u32 metadata_len; | ||
| 151 | __u32 data_len; | ||
| 152 | __u64 ppa_list; | ||
| 153 | __u16 nppas; | ||
| 154 | __u16 control; | ||
| 155 | __u32 cdw13; | ||
| 156 | __u32 cdw14; | ||
| 157 | __u32 cdw15; | ||
| 158 | __u64 status; | ||
| 159 | __u32 result; | ||
| 160 | __u32 timeout_ms; | ||
| 161 | }; | ||
| 162 | |||
| 125 | /* The ioctl type, 'L', 0x20 - 0x2F documented in ioctl-number.txt */ | 163 | /* The ioctl type, 'L', 0x20 - 0x2F documented in ioctl-number.txt */ |
| 126 | enum { | 164 | enum { |
| 127 | /* top level cmds */ | 165 | /* top level cmds */ |
| @@ -137,6 +175,11 @@ enum { · 9 unmodified lines | |||
| 137 | 175 | ||
| 138 | /* Factory reset device */ | 176 | /* Factory reset device */ |
| 139 | NVM_DEV_FACTORY_CMD, | 177 | NVM_DEV_FACTORY_CMD, |
| 178 | |||
| 179 | /* Vector user I/O */ | ||
| 180 | NVM_DEV_VIO_ADMIN_CMD = 0x41, | ||
| 181 | NVM_DEV_VIO_CMD = 0x42, | ||
| 182 | NVM_DEV_VIO_USER_CMD = 0x43, | ||
| 140 | }; | 183 | }; |
| 141 | 184 | ||
| 142 | #define NVM_IOCTL 'L' /* 0x4c */ | 185 | #define NVM_IOCTL 'L' /* 0x4c */ |
| @@ -154,6 +197,13 @@ enum { · 11 unmodified lines | |||
| 154 | #define NVM_DEV_FACTORY _IOW(NVM_IOCTL, NVM_DEV_FACTORY_CMD, \ | 197 | #define NVM_DEV_FACTORY _IOW(NVM_IOCTL, NVM_DEV_FACTORY_CMD, \ |
| 155 | struct nvm_ioctl_dev_factory) | 198 | struct nvm_ioctl_dev_factory) |
| 156 | 199 | ||
| 200 | #define NVME_NVM_IOCTL_IO_VIO _IOWR(NVM_IOCTL, NVM_DEV_VIO_USER_CMD, \ | ||
| 201 | struct nvm_passthru_vio) | ||
| 202 | #define NVME_NVM_IOCTL_ADMIN_VIO _IOWR(NVM_IOCTL, NVM_DEV_VIO_ADMIN_CMD,\ | ||
| 203 | struct nvm_passthru_vio) | ||
| 204 | #define NVME_NVM_IOCTL_SUBMIT_VIO _IOWR(NVM_IOCTL, NVM_DEV_VIO_CMD,\ | ||
| 205 | struct nvm_user_vio) | ||
| 206 | |||
| 157 | #define NVM_VERSION_MAJOR 1 | 207 | #define NVM_VERSION_MAJOR 1 |
| 158 | #define NVM_VERSION_MINOR 0 | 208 | #define NVM_VERSION_MINOR 0 |
| 159 | #define NVM_VERSION_PATCHLEVEL 0 | 209 | #define NVM_VERSION_PATCHLEVEL 0 |