History

Merge tag 'pci-v4.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas: - add framework for supporting PCIe devices in Endpoint mode (Kishon Vijay Abraham I) - use non-postable PCI config space mappings when possible (Lorenzo Pieralisi) - clean up and unify mmap of PCI BARs (David Woodhouse) - export and unify Function Level Reset support (Christoph Hellwig) - avoid FLR for Intel 82579 NICs (Sasha Neftin) - add pci_request_irq() and pci_free_irq() helpers (Christoph Hellwig) - short-circuit config access failures for disconnected devices (Keith Busch) - remove D3 sleep delay when possible (Adrian Hunter) - freeze PME scan before suspending devices (Lukas Wunner) - stop disabling MSI/MSI-X in pci_device_shutdown() (Prarit Bhargava) - disable boot interrupt quirk for ASUS M2N-LR (Stefan Assmann) - add arch-specific alignment control to improve device passthrough by avoiding multiple BARs in a page (Yongji Xie) - add sysfs sriov_drivers_autoprobe to control VF driver binding (Bodong Wang) - allow slots below PCI-to-PCIe "reverse bridges" (Bjorn Helgaas) - fix crashes when unbinding host controllers that don't support removal (Brian Norris) - add driver for MicroSemi Switchtec management interface (Logan Gunthorpe) - add driver for Faraday Technology FTPCI100 host bridge (Linus Walleij) - add i.MX7D support (Andrey Smirnov) - use generic MSI support for Aardvark (Thomas Petazzoni) - make Rockchip driver modular (Brian Norris) - advertise 128-byte Read Completion Boundary support for Rockchip (Shawn Lin) - advertise PCI_EXP_LNKSTA_SLC for Rockchip root port (Shawn Lin) - convert atomic_t to refcount_t in HV driver (Elena Reshetova) - add CPU IRQ affinity in HV driver (K. Y. Srinivasan) - fix PCI bus removal in HV driver (Long Li) - add support for ThunderX2 DMA alias topology (Jayachandran C) - add ThunderX pass2.x 2nd node MCFG quirk (Tomasz Nowicki) - add ITE 8893 bridge DMA alias quirk (Jarod Wilson) - restrict Cavium ACS quirk only to CN81xx/CN83xx/CN88xx devices (Manish Jaggi) * tag 'pci-v4.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (146 commits) PCI: Don't allow unbinding host controllers that aren't prepared ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP MAINTAINERS: Add PCI Endpoint maintainer Documentation: PCI: Add userguide for PCI endpoint test function tools: PCI: Add sample test script to invoke pcitest tools: PCI: Add a userspace tool to test PCI endpoint Documentation: misc-devices: Add Documentation for pci-endpoint-test driver misc: Add host side PCI driver for PCI test function device PCI: Add device IDs for DRA74x and DRA72x dt-bindings: PCI: dra7xx: Add DT bindings to enable unaligned access PCI: dwc: dra7xx: Workaround for errata id i870 dt-bindings: PCI: dra7xx: Add DT bindings for PCI dra7xx EP mode PCI: dwc: dra7xx: Add EP mode support PCI: dwc: dra7xx: Facilitate wrapper and MSI interrupts to be enabled independently dt-bindings: PCI: Add DT bindings for PCI designware EP mode PCI: dwc: designware: Add EP mode support Documentation: PCI: Add binding documentation for pci-test endpoint function ixgbe: Use pcie_flr() instead of duplicating it IB/hfi1: Use pcie_flr() instead of duplicating it PCI: imx6: Fix spelling mistake: "contol" -> "control" ...

Linus Torvalds committed 9 years ago

Commit 857f8642 parents 8f3207c 3146c8f148 files · +8937 −1004Browse files

Showing the changes to include/uapi/linux (4 of 148 files). Show all

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4 files
  1. include/uapi/linux/Kbuild +1 −0
  2. include/uapi/linux/pci_regs.h +1 −1
  3. include/uapi/linux/pcitest.h +19 −0
  4. include/uapi/linux/switchtec_ioctl.h +132 −0
include/uapi/linux/Kbuild+1−0
@@ -333,6 +333,7 @@ header-y += parport.h · 332 unmodified lines
333333 header-y += patchkey.h
334334 header-y += pci.h
335335 header-y += pci_regs.h
336+header-y += pcitest.h
336337 header-y += perf_event.h
337338 header-y += personality.h
338339 header-y += pfkeyv2.h
include/uapi/linux/pci_regs.h+1−1
@@ -114,7 +114,7 @@ · 113 unmodified lines
114114 #define PCI_SUBSYSTEM_ID 0x2e
115115 #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */
116116 #define PCI_ROM_ADDRESS_ENABLE 0x01
117−#define PCI_ROM_ADDRESS_MASK (~0x7ffUL)
117+#define PCI_ROM_ADDRESS_MASK (~0x7ffU)
118118
119119 #define PCI_CAPABILITY_LIST 0x34 /* Offset of first capability list entry */
120120
include/uapi/linux/pcitest.h+19−0
@@ -0,0 +1,19 @@
1+/**
2+ * pcitest.h - PCI test uapi defines
3+ *
4+ * Copyright (C) 2017 Texas Instruments
5+ * Author: Kishon Vijay Abraham I <kishon@ti.com>
6+ *
7+ */
8+
9+#ifndef __UAPI_LINUX_PCITEST_H
10+#define __UAPI_LINUX_PCITEST_H
11+
12+#define PCITEST_BAR _IO('P', 0x1)
13+#define PCITEST_LEGACY_IRQ _IO('P', 0x2)
14+#define PCITEST_MSI _IOW('P', 0x3, int)
15+#define PCITEST_WRITE _IOW('P', 0x4, unsigned long)
16+#define PCITEST_READ _IOW('P', 0x5, unsigned long)
17+#define PCITEST_COPY _IOW('P', 0x6, unsigned long)
18+
19+#endif /* __UAPI_LINUX_PCITEST_H */
include/uapi/linux/switchtec_ioctl.h+132−0
@@ -0,0 +1,132 @@
1+/*
2+ * Microsemi Switchtec PCIe Driver
3+ * Copyright (c) 2017, Microsemi Corporation
4+ *
5+ * This program is free software; you can redistribute it and/or modify it
6+ * under the terms and conditions of the GNU General Public License,
7+ * version 2, as published by the Free Software Foundation.
8+ *
9+ * This program is distributed in the hope it will be useful, but WITHOUT
10+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12+ * more details.
13+ *
14+ */
15+
16+#ifndef _UAPI_LINUX_SWITCHTEC_IOCTL_H
17+#define _UAPI_LINUX_SWITCHTEC_IOCTL_H
18+
19+#include <linux/types.h>
20+
21+#define SWITCHTEC_IOCTL_PART_CFG0 0
22+#define SWITCHTEC_IOCTL_PART_CFG1 1
23+#define SWITCHTEC_IOCTL_PART_IMG0 2
24+#define SWITCHTEC_IOCTL_PART_IMG1 3
25+#define SWITCHTEC_IOCTL_PART_NVLOG 4
26+#define SWITCHTEC_IOCTL_PART_VENDOR0 5
27+#define SWITCHTEC_IOCTL_PART_VENDOR1 6
28+#define SWITCHTEC_IOCTL_PART_VENDOR2 7
29+#define SWITCHTEC_IOCTL_PART_VENDOR3 8
30+#define SWITCHTEC_IOCTL_PART_VENDOR4 9
31+#define SWITCHTEC_IOCTL_PART_VENDOR5 10
32+#define SWITCHTEC_IOCTL_PART_VENDOR6 11
33+#define SWITCHTEC_IOCTL_PART_VENDOR7 12
34+#define SWITCHTEC_IOCTL_NUM_PARTITIONS 13
35+
36+struct switchtec_ioctl_flash_info {
37+ __u64 flash_length;
38+ __u32 num_partitions;
39+ __u32 padding;
40+};
41+
42+struct switchtec_ioctl_flash_part_info {
43+ __u32 flash_partition;
44+ __u32 address;
45+ __u32 length;
46+ __u32 active;
47+};
48+
49+struct switchtec_ioctl_event_summary {
50+ __u64 global;
51+ __u64 part_bitmap;
52+ __u32 local_part;
53+ __u32 padding;
54+ __u32 part[48];
55+ __u32 pff[48];
56+};
57+
58+#define SWITCHTEC_IOCTL_EVENT_STACK_ERROR 0
59+#define SWITCHTEC_IOCTL_EVENT_PPU_ERROR 1
60+#define SWITCHTEC_IOCTL_EVENT_ISP_ERROR 2
61+#define SWITCHTEC_IOCTL_EVENT_SYS_RESET 3
62+#define SWITCHTEC_IOCTL_EVENT_FW_EXC 4
63+#define SWITCHTEC_IOCTL_EVENT_FW_NMI 5
64+#define SWITCHTEC_IOCTL_EVENT_FW_NON_FATAL 6
65+#define SWITCHTEC_IOCTL_EVENT_FW_FATAL 7
66+#define SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP 8
67+#define SWITCHTEC_IOCTL_EVENT_TWI_MRPC_COMP_ASYNC 9
68+#define SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP 10
69+#define SWITCHTEC_IOCTL_EVENT_CLI_MRPC_COMP_ASYNC 11
70+#define SWITCHTEC_IOCTL_EVENT_GPIO_INT 12
71+#define SWITCHTEC_IOCTL_EVENT_PART_RESET 13
72+#define SWITCHTEC_IOCTL_EVENT_MRPC_COMP 14
73+#define SWITCHTEC_IOCTL_EVENT_MRPC_COMP_ASYNC 15
74+#define SWITCHTEC_IOCTL_EVENT_DYN_PART_BIND_COMP 16
75+#define SWITCHTEC_IOCTL_EVENT_AER_IN_P2P 17
76+#define SWITCHTEC_IOCTL_EVENT_AER_IN_VEP 18
77+#define SWITCHTEC_IOCTL_EVENT_DPC 19
78+#define SWITCHTEC_IOCTL_EVENT_CTS 20
79+#define SWITCHTEC_IOCTL_EVENT_HOTPLUG 21
80+#define SWITCHTEC_IOCTL_EVENT_IER 22
81+#define SWITCHTEC_IOCTL_EVENT_THRESH 23
82+#define SWITCHTEC_IOCTL_EVENT_POWER_MGMT 24
83+#define SWITCHTEC_IOCTL_EVENT_TLP_THROTTLING 25
84+#define SWITCHTEC_IOCTL_EVENT_FORCE_SPEED 26
85+#define SWITCHTEC_IOCTL_EVENT_CREDIT_TIMEOUT 27
86+#define SWITCHTEC_IOCTL_EVENT_LINK_STATE 28
87+#define SWITCHTEC_IOCTL_MAX_EVENTS 29
88+
89+#define SWITCHTEC_IOCTL_EVENT_LOCAL_PART_IDX -1
90+#define SWITCHTEC_IOCTL_EVENT_IDX_ALL -2
91+
92+#define SWITCHTEC_IOCTL_EVENT_FLAG_CLEAR (1 << 0)
93+#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_POLL (1 << 1)
94+#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_LOG (1 << 2)
95+#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_CLI (1 << 3)
96+#define SWITCHTEC_IOCTL_EVENT_FLAG_EN_FATAL (1 << 4)
97+#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_POLL (1 << 5)
98+#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_LOG (1 << 6)
99+#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_CLI (1 << 7)
100+#define SWITCHTEC_IOCTL_EVENT_FLAG_DIS_FATAL (1 << 8)
101+#define SWITCHTEC_IOCTL_EVENT_FLAG_UNUSED (~0x1ff)
102+
103+struct switchtec_ioctl_event_ctl {
104+ __u32 event_id;
105+ __s32 index;
106+ __u32 flags;
107+ __u32 occurred;
108+ __u32 count;
109+ __u32 data[5];
110+};
111+
112+#define SWITCHTEC_IOCTL_PFF_VEP 100
113+struct switchtec_ioctl_pff_port {
114+ __u32 pff;
115+ __u32 partition;
116+ __u32 port;
117+};
118+
119+#define SWITCHTEC_IOCTL_FLASH_INFO \
120+ _IOR('W', 0x40, struct switchtec_ioctl_flash_info)
121+#define SWITCHTEC_IOCTL_FLASH_PART_INFO \
122+ _IOWR('W', 0x41, struct switchtec_ioctl_flash_part_info)
123+#define SWITCHTEC_IOCTL_EVENT_SUMMARY \
124+ _IOR('W', 0x42, struct switchtec_ioctl_event_summary)
125+#define SWITCHTEC_IOCTL_EVENT_CTL \
126+ _IOWR('W', 0x43, struct switchtec_ioctl_event_ctl)
127+#define SWITCHTEC_IOCTL_PFF_TO_PORT \
128+ _IOWR('W', 0x44, struct switchtec_ioctl_pff_port)
129+#define SWITCHTEC_IOCTL_PORT_TO_PFF \
130+ _IOWR('W', 0x45, struct switchtec_ioctl_pff_port)
131+
132+#endif