Pull rdma fixes from Jason Gunthorpe: "Several regression fixes from work that landed in the merge window, particularly in the mlx5 driver: - Various static checker and warning fixes - General bug fixes in rvt, qedr, hns, mlx5 and hfi1 - Several regression fixes related to the ECE and QP changes in last cycle - Fixes for a few long standing crashers in CMA, uverbs ioctl, and xrc" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: (25 commits) IB/hfi1: Add atomic triggered sleep/wakeup IB/hfi1: Correct -EBUSY handling in tx code IB/hfi1: Fix module use count flaw due to leftover module put calls IB/hfi1: Restore kfree in dummy_netdev cleanup IB/mad: Fix use after free when destroying MAD agent RDMA/mlx5: Protect from kernel crash if XRC_TGT doesn't have udata RDMA/counter: Query a counter before release RDMA/mad: Fix possible memory leak in ib_mad_post_receive_mads() RDMA/mlx5: Fix integrity enabled QP creation RDMA/mlx5: Remove ECE limitation from the RAW_PACKET QPs RDMA/mlx5: Fix remote gid value in query QP RDMA/mlx5: Don't access ib_qp fields in internal destroy QP path RDMA/core: Check that type_attrs is not NULL prior access RDMA/hns: Fix an cmd queue issue when resetting RDMA/hns: Fix a calltrace when registering MR from userspace RDMA/mlx5: Add missed RST2INIT and INIT2INIT steps during ECE handshake RDMA/cma: Protect bind_list and listen_list while finding matching cm id RDMA/qedr: Fix KASAN: use-after-free in ucma_event_handler+0x532 RDMA/efa: Set maximum pkeys device attribute RDMA/rvt: Fix potential memory leak caused by rvt_alloc_rq ...
Unified · Split
| @@ -918,6 +918,7 @@ static void cm_free_work(struct cm_work *work) · 917 unmodified lines | ||
| 918 | 918 | |
| 919 | 919 | static void cm_queue_work_unlock(struct cm_id_private *cm_id_priv, |
| 920 | 920 | struct cm_work *work) |
| 921 | + __releases(&cm_id_priv->lock) | |
| 921 | 922 | { |
| 922 | 923 | bool immediate; |
| 923 | 924 | |
| @@ -1624,6 +1624,8 @@ static struct rdma_id_private *cma_find_listener( · 1623 unmodified lines | ||
| 1624 | 1624 | { |
| 1625 | 1625 | struct rdma_id_private *id_priv, *id_priv_dev; |
| 1626 | 1626 | |
| 1627 | + lockdep_assert_held(&lock); | |
| 1628 | + | |
| 1627 | 1629 | if (!bind_list) |
| 1628 | 1630 | return ERR_PTR(-EINVAL); |
| 1629 | 1631 | |
| @@ -1670,6 +1672,7 @@ cma_ib_id_from_event(struct ib_cm_id *cm_id, · 40 unmodified lines | ||
| 1670 | 1672 | } |
| 1671 | 1673 | } |
| 1672 | 1674 | |
| 1675 | + mutex_lock(&lock); | |
| 1673 | 1676 | /* |
| 1674 | 1677 | * Net namespace might be getting deleted while route lookup, |
| 1675 | 1678 | * cm_id lookup is in progress. Therefore, perform netdevice |
| @@ -1711,6 +1714,7 @@ cma_ib_id_from_event(struct ib_cm_id *cm_id, · 35 unmodified lines | ||
| 1711 | 1714 | id_priv = cma_find_listener(bind_list, cm_id, ib_event, req, *net_dev); |
| 1712 | 1715 | err: |
| 1713 | 1716 | rcu_read_unlock(); |
| 1717 | + mutex_unlock(&lock); | |
| 1714 | 1718 | if (IS_ERR(id_priv) && *net_dev) { |
| 1715 | 1719 | dev_put(*net_dev); |
| 1716 | 1720 | *net_dev = NULL; |
| @@ -2492,6 +2496,8 @@ static void cma_listen_on_dev(struct rdma_id_private *id_priv, · 775 unmodified lines | ||
| 2492 | 2496 | struct net *net = id_priv->id.route.addr.dev_addr.net; |
| 2493 | 2497 | int ret; |
| 2494 | 2498 | |
| 2499 | + lockdep_assert_held(&lock); | |
| 2500 | + | |
| 2495 | 2501 | if (cma_family(id_priv) == AF_IB && !rdma_cap_ib_cm(cma_dev->device, 1)) |
| 2496 | 2502 | return; |
| 2497 | 2503 | |
| @@ -3342,6 +3348,8 @@ static void cma_bind_port(struct rdma_bind_list *bind_list, · 844 unmodified lines | ||
| 3342 | 3348 | u64 sid, mask; |
| 3343 | 3349 | __be16 port; |
| 3344 | 3350 | |
| 3351 | + lockdep_assert_held(&lock); | |
| 3352 | + | |
| 3345 | 3353 | addr = cma_src_addr(id_priv); |
| 3346 | 3354 | port = htons(bind_list->port); |
| 3347 | 3355 | |
| @@ -3370,6 +3378,8 @@ static int cma_alloc_port(enum rdma_ucm_port_space ps, · 22 unmodified lines | ||
| 3370 | 3378 | struct rdma_bind_list *bind_list; |
| 3371 | 3379 | int ret; |
| 3372 | 3380 | |
| 3381 | + lockdep_assert_held(&lock); | |
| 3382 | + | |
| 3373 | 3383 | bind_list = kzalloc(sizeof *bind_list, GFP_KERNEL); |
| 3374 | 3384 | if (!bind_list) |
| 3375 | 3385 | return -ENOMEM; |
| @@ -3396,6 +3406,8 @@ static int cma_port_is_unique(struct rdma_bind_list *bind_list, · 20 unmodified lines | ||
| 3396 | 3406 | struct sockaddr *saddr = cma_src_addr(id_priv); |
| 3397 | 3407 | __be16 dport = cma_port(daddr); |
| 3398 | 3408 | |
| 3409 | + lockdep_assert_held(&lock); | |
| 3410 | + | |
| 3399 | 3411 | hlist_for_each_entry(cur_id, &bind_list->owners, node) { |
| 3400 | 3412 | struct sockaddr *cur_daddr = cma_dst_addr(cur_id); |
| 3401 | 3413 | struct sockaddr *cur_saddr = cma_src_addr(cur_id); |
| @@ -3435,6 +3447,8 @@ static int cma_alloc_any_port(enum rdma_ucm_port_space ps, · 33 unmodified lines | ||
| 3435 | 3447 | unsigned int rover; |
| 3436 | 3448 | struct net *net = id_priv->id.route.addr.dev_addr.net; |
| 3437 | 3449 | |
| 3450 | + lockdep_assert_held(&lock); | |
| 3451 | + | |
| 3438 | 3452 | inet_get_local_port_range(net, &low, &high); |
| 3439 | 3453 | remaining = (high - low) + 1; |
| 3440 | 3454 | rover = prandom_u32() % remaining + low; |
| @@ -3482,6 +3496,8 @@ static int cma_check_port(struct rdma_bind_list *bind_list, · 41 unmodified lines | ||
| 3482 | 3496 | struct rdma_id_private *cur_id; |
| 3483 | 3497 | struct sockaddr *addr, *cur_addr; |
| 3484 | 3498 | |
| 3499 | + lockdep_assert_held(&lock); | |
| 3500 | + | |
| 3485 | 3501 | addr = cma_src_addr(id_priv); |
| 3486 | 3502 | hlist_for_each_entry(cur_id, &bind_list->owners, node) { |
| 3487 | 3503 | if (id_priv == cur_id) |
| @@ -3512,6 +3528,8 @@ static int cma_use_port(enum rdma_ucm_port_space ps, · 24 unmodified lines | ||
| 3512 | 3528 | unsigned short snum; |
| 3513 | 3529 | int ret; |
| 3514 | 3530 | |
| 3531 | + lockdep_assert_held(&lock); | |
| 3532 | + | |
| 3515 | 3533 | snum = ntohs(cma_port(cma_src_addr(id_priv))); |
| 3516 | 3534 | if (snum < PROT_SOCK && !capable(CAP_NET_BIND_SERVICE)) |
| 3517 | 3535 | return -EACCES; |
| @@ -202,7 +202,7 @@ static int __rdma_counter_unbind_qp(struct ib_qp *qp) · 201 unmodified lines | ||
| 202 | 202 | return ret; |
| 203 | 203 | } |
| 204 | 204 | |
| 205 | −static void counter_history_stat_update(const struct rdma_counter *counter) | |
| 205 | +static void counter_history_stat_update(struct rdma_counter *counter) | |
| 206 | 206 | { |
| 207 | 207 | struct ib_device *dev = counter->device; |
| 208 | 208 | struct rdma_port_counter *port_counter; |
| @@ -212,6 +212,8 @@ static void counter_history_stat_update(const struct rdma_counter *counter) · 3 unmodified lines | ||
| 212 | 212 | if (!port_counter->hstats) |
| 213 | 213 | return; |
| 214 | 214 | |
| 215 | + rdma_counter_query_stats(counter); | |
| 216 | + | |
| 215 | 217 | for (i = 0; i < counter->stats->num_counters; i++) |
| 216 | 218 | port_counter->hstats->value[i] += counter->stats->value[i]; |
| 217 | 219 | } |
| @@ -509,10 +509,10 @@ static void unregister_mad_agent(struct ib_mad_agent_private *mad_agent_priv) · 508 unmodified lines | ||
| 509 | 509 | xa_erase(&ib_mad_clients, mad_agent_priv->agent.hi_tid); |
| 510 | 510 | |
| 511 | 511 | flush_workqueue(port_priv->wq); |
| 512 | − ib_cancel_rmpp_recvs(mad_agent_priv); | |
| 513 | 512 | |
| 514 | 513 | deref_mad_agent(mad_agent_priv); |
| 515 | 514 | wait_for_completion(&mad_agent_priv->comp); |
| 515 | + ib_cancel_rmpp_recvs(mad_agent_priv); | |
| 516 | 516 | |
| 517 | 517 | ib_mad_agent_security_cleanup(&mad_agent_priv->agent); |
| 518 | 518 | |
| @@ -2718,6 +2718,7 @@ static int ib_mad_post_receive_mads(struct ib_mad_qp_info *qp_info, · 2199 unmodified lines | ||
| 2718 | 2718 | DMA_FROM_DEVICE); |
| 2719 | 2719 | if (unlikely(ib_dma_mapping_error(qp_info->port_priv->device, |
| 2720 | 2720 | sg_list.addr))) { |
| 2721 | + kfree(mad_priv); | |
| 2721 | 2722 | ret = -ENOMEM; |
| 2722 | 2723 | break; |
| 2723 | 2724 | } |
| @@ -470,40 +470,46 @@ static struct ib_uobject * · 469 unmodified lines | ||
| 470 | 470 | alloc_begin_fd_uobject(const struct uverbs_api_object *obj, |
| 471 | 471 | struct uverbs_attr_bundle *attrs) |
| 472 | 472 | { |
| 473 | − const struct uverbs_obj_fd_type *fd_type = | |
| 474 | − container_of(obj->type_attrs, struct uverbs_obj_fd_type, type); | |
| 473 | + const struct uverbs_obj_fd_type *fd_type; | |
| 475 | 474 | int new_fd; |
| 476 | − struct ib_uobject *uobj; | |
| 475 | + struct ib_uobject *uobj, *ret; | |
| 477 | 476 | struct file *filp; |
| 478 | 477 | |
| 478 | + uobj = alloc_uobj(attrs, obj); | |
| 479 | + if (IS_ERR(uobj)) | |
| 480 | + return uobj; | |
| 481 | + | |
| 482 | + fd_type = | |
| 483 | + container_of(obj->type_attrs, struct uverbs_obj_fd_type, type); | |
| 479 | 484 | if (WARN_ON(fd_type->fops->release != &uverbs_uobject_fd_release && |
| 480 | − fd_type->fops->release != &uverbs_async_event_release)) | |
| 481 | − return ERR_PTR(-EINVAL); | |
| 485 | + fd_type->fops->release != &uverbs_async_event_release)) { | |
| 486 | + ret = ERR_PTR(-EINVAL); | |
| 487 | + goto err_fd; | |
| 488 | + } | |
| 482 | 489 | |
| 483 | 490 | new_fd = get_unused_fd_flags(O_CLOEXEC); |
| 484 | − if (new_fd < 0) | |
| 485 | − return ERR_PTR(new_fd); | |
| 486 | − | |
| 487 | − uobj = alloc_uobj(attrs, obj); | |
| 488 | − if (IS_ERR(uobj)) | |
| 491 | + if (new_fd < 0) { | |
| 492 | + ret = ERR_PTR(new_fd); | |
| 489 | 493 | goto err_fd; |
| 494 | + } | |
| 490 | 495 | |
| 491 | 496 | /* Note that uverbs_uobject_fd_release() is called during abort */ |
| 492 | 497 | filp = anon_inode_getfile(fd_type->name, fd_type->fops, NULL, |
| 493 | 498 | fd_type->flags); |
| 494 | 499 | if (IS_ERR(filp)) { |
| 495 | − uverbs_uobject_put(uobj); | |
| 496 | − uobj = ERR_CAST(filp); | |
| 497 | − goto err_fd; | |
| 500 | + ret = ERR_CAST(filp); | |
| 501 | + goto err_getfile; | |
| 498 | 502 | } |
| 499 | 503 | uobj->object = filp; |
| 500 | 504 | |
| 501 | 505 | uobj->id = new_fd; |
| 502 | 506 | return uobj; |
| 503 | 507 | |
| 504 | −err_fd: | |
| 508 | +err_getfile: | |
| 505 | 509 | put_unused_fd(new_fd); |
| 506 | − return uobj; | |
| 510 | +err_fd: | |
| 511 | + uverbs_uobject_put(uobj); | |
| 512 | + return ret; | |
| 507 | 513 | } |
| 508 | 514 | |
| 509 | 515 | struct ib_uobject *rdma_alloc_begin_uobject(const struct uverbs_api_object *obj, |
| @@ -212,6 +212,7 @@ int efa_query_device(struct ib_device *ibdev, · 211 unmodified lines | ||
| 212 | 212 | props->max_send_sge = dev_attr->max_sq_sge; |
| 213 | 213 | props->max_recv_sge = dev_attr->max_rq_sge; |
| 214 | 214 | props->max_sge_rd = dev_attr->max_wr_rdma_sge; |
| 215 | + props->max_pkeys = 1; | |
| 215 | 216 | |
| 216 | 217 | if (udata && udata->outlen) { |
| 217 | 218 | resp.max_sq_sge = dev_attr->max_sq_sge; |
| @@ -985,15 +985,10 @@ static ssize_t qsfp2_debugfs_read(struct file *file, char __user *buf, · 984 unmodified lines | ||
| 985 | 985 | static int __i2c_debugfs_open(struct inode *in, struct file *fp, u32 target) |
| 986 | 986 | { |
| 987 | 987 | struct hfi1_pportdata *ppd; |
| 988 | − int ret; | |
| 989 | 988 | |
| 990 | 989 | ppd = private2ppd(fp); |
| 991 | 990 | |
| 992 | − ret = acquire_chip_resource(ppd->dd, i2c_target(target), 0); | |
| 993 | − if (ret) /* failed - release the module */ | |
| 994 | − module_put(THIS_MODULE); | |
| 995 | − | |
| 996 | − return ret; | |
| 991 | + return acquire_chip_resource(ppd->dd, i2c_target(target), 0); | |
| 997 | 992 | } |
| 998 | 993 | |
| 999 | 994 | static int i2c1_debugfs_open(struct inode *in, struct file *fp) |
| @@ -1013,7 +1008,6 @@ static int __i2c_debugfs_release(struct inode *in, struct file *fp, u32 target) · 13 unmodified lines | ||
| 1013 | 1008 | ppd = private2ppd(fp); |
| 1014 | 1009 | |
| 1015 | 1010 | release_chip_resource(ppd->dd, i2c_target(target)); |
| 1016 | − module_put(THIS_MODULE); | |
| 1017 | 1011 | |
| 1018 | 1012 | return 0; |
| 1019 | 1013 | } |
| @@ -1031,18 +1025,10 @@ static int i2c2_debugfs_release(struct inode *in, struct file *fp) · 11 unmodified lines | ||
| 1031 | 1025 | static int __qsfp_debugfs_open(struct inode *in, struct file *fp, u32 target) |
| 1032 | 1026 | { |
| 1033 | 1027 | struct hfi1_pportdata *ppd; |
| 1034 | − int ret; | |
| 1035 | − | |
| 1036 | − if (!try_module_get(THIS_MODULE)) | |
| 1037 | − return -ENODEV; | |
| 1038 | 1028 | |
| 1039 | 1029 | ppd = private2ppd(fp); |
| 1040 | 1030 | |
| 1041 | − ret = acquire_chip_resource(ppd->dd, i2c_target(target), 0); | |
| 1042 | − if (ret) /* failed - release the module */ | |
| 1043 | − module_put(THIS_MODULE); | |
| 1044 | − | |
| 1045 | − return ret; | |
| 1031 | + return acquire_chip_resource(ppd->dd, i2c_target(target), 0); | |
| 1046 | 1032 | } |
| 1047 | 1033 | |
| 1048 | 1034 | static int qsfp1_debugfs_open(struct inode *in, struct file *fp) |
| @@ -1062,7 +1048,6 @@ static int __qsfp_debugfs_release(struct inode *in, struct file *fp, u32 target) · 13 unmodified lines | ||
| 1062 | 1048 | ppd = private2ppd(fp); |
| 1063 | 1049 | |
| 1064 | 1050 | release_chip_resource(ppd->dd, i2c_target(target)); |
| 1065 | − module_put(THIS_MODULE); | |
| 1066 | 1051 | |
| 1067 | 1052 | return 0; |
| 1068 | 1053 | } |
| @@ -399,7 +399,7 @@ static inline void iowait_get_priority(struct iowait *w) · 398 unmodified lines | ||
| 399 | 399 | * @wait_head: the wait queue |
| 400 | 400 | * |
| 401 | 401 | * This function is called to insert an iowait struct into a |
| 402 | − * wait queue after a resource (eg, sdma decriptor or pio | |
| 402 | + * wait queue after a resource (eg, sdma descriptor or pio | |
| 403 | 403 | * buffer) is run out. |
| 404 | 404 | */ |
| 405 | 405 | static inline void iowait_queue(bool pkts_sent, struct iowait *w, |
| @@ -67,6 +67,9 @@ struct hfi1_ipoib_circ_buf { · 66 unmodified lines | ||
| 67 | 67 | * @sde: sdma engine |
| 68 | 68 | * @tx_list: tx request list |
| 69 | 69 | * @sent_txreqs: count of txreqs posted to sdma |
| 70 | + * @stops: count of stops of queue | |
| 71 | + * @ring_full: ring has been filled | |
| 72 | + * @no_desc: descriptor shortage seen | |
| 70 | 73 | * @flow: tracks when list needs to be flushed for a flow change |
| 71 | 74 | * @q_idx: ipoib Tx queue index |
| 72 | 75 | * @pkts_sent: indicator packets have been sent from this queue |
| @@ -80,6 +83,9 @@ struct hfi1_ipoib_txq { · 7 unmodified lines | ||
| 80 | 83 | struct sdma_engine *sde; |
| 81 | 84 | struct list_head tx_list; |
| 82 | 85 | u64 sent_txreqs; |
| 86 | + atomic_t stops; | |
| 87 | + atomic_t ring_full; | |
| 88 | + atomic_t no_desc; | |
| 83 | 89 | union hfi1_ipoib_flow flow; |
| 84 | 90 | u8 q_idx; |
| 85 | 91 | bool pkts_sent; |
| @@ -55,23 +55,48 @@ static u64 hfi1_ipoib_txreqs(const u64 sent, const u64 completed) · 54 unmodified lines | ||
| 55 | 55 | return sent - completed; |
| 56 | 56 | } |
| 57 | 57 | |
| 58 | −static void hfi1_ipoib_check_queue_depth(struct hfi1_ipoib_txq *txq) | |
| 58 | +static u64 hfi1_ipoib_used(struct hfi1_ipoib_txq *txq) | |
| 59 | 59 | { |
| 60 | − if (unlikely(hfi1_ipoib_txreqs(++txq->sent_txreqs, | |
| 61 | − atomic64_read(&txq->complete_txreqs)) >= | |
| 62 | − min_t(unsigned int, txq->priv->netdev->tx_queue_len, | |
| 63 | − txq->tx_ring.max_items - 1))) | |
| 60 | + return hfi1_ipoib_txreqs(txq->sent_txreqs, | |
| 61 | + atomic64_read(&txq->complete_txreqs)); | |
| 62 | +} | |
| 63 | + | |
| 64 | +static void hfi1_ipoib_stop_txq(struct hfi1_ipoib_txq *txq) | |
| 65 | +{ | |
| 66 | + if (atomic_inc_return(&txq->stops) == 1) | |
| 64 | 67 | netif_stop_subqueue(txq->priv->netdev, txq->q_idx); |
| 65 | 68 | } |
| 66 | 69 | |
| 70 | +static void hfi1_ipoib_wake_txq(struct hfi1_ipoib_txq *txq) | |
| 71 | +{ | |
| 72 | + if (atomic_dec_and_test(&txq->stops)) | |
| 73 | + netif_wake_subqueue(txq->priv->netdev, txq->q_idx); | |
| 74 | +} | |
| 75 | + | |
| 76 | +static uint hfi1_ipoib_ring_hwat(struct hfi1_ipoib_txq *txq) | |
| 77 | +{ | |
| 78 | + return min_t(uint, txq->priv->netdev->tx_queue_len, | |
| 79 | + txq->tx_ring.max_items - 1); | |
| 80 | +} | |
| 81 | + | |
| 82 | +static uint hfi1_ipoib_ring_lwat(struct hfi1_ipoib_txq *txq) | |
| 83 | +{ | |
| 84 | + return min_t(uint, txq->priv->netdev->tx_queue_len, | |
| 85 | + txq->tx_ring.max_items) >> 1; | |
| 86 | +} | |
| 87 | + | |
| 88 | +static void hfi1_ipoib_check_queue_depth(struct hfi1_ipoib_txq *txq) | |
| 89 | +{ | |
| 90 | + ++txq->sent_txreqs; | |
| 91 | + if (hfi1_ipoib_used(txq) >= hfi1_ipoib_ring_hwat(txq) && | |
| 92 | + !atomic_xchg(&txq->ring_full, 1)) | |
| 93 | + hfi1_ipoib_stop_txq(txq); | |
| 94 | +} | |
| 95 | + | |
| 67 | 96 | static void hfi1_ipoib_check_queue_stopped(struct hfi1_ipoib_txq *txq) |
| 68 | 97 | { |
| 69 | 98 | struct net_device *dev = txq->priv->netdev; |
| 70 | 99 | |
| 71 | − /* If the queue is already running just return */ | |
| 72 | − if (likely(!__netif_subqueue_stopped(dev, txq->q_idx))) | |
| 73 | − return; | |
| 74 | − | |
| 75 | 100 | /* If shutting down just return as queue state is irrelevant */ |
| 76 | 101 | if (unlikely(dev->reg_state != NETREG_REGISTERED)) |
| 77 | 102 | return; |
| @@ -86,11 +111,9 @@ static void hfi1_ipoib_check_queue_stopped(struct hfi1_ipoib_txq *txq) · 8 unmodified lines | ||
| 86 | 111 | * Use the minimum of the current tx_queue_len or the rings max txreqs |
| 87 | 112 | * to protect against ring overflow. |
| 88 | 113 | */ |
| 89 | − if (hfi1_ipoib_txreqs(txq->sent_txreqs, | |
| 90 | − atomic64_read(&txq->complete_txreqs)) | |
| 91 | − < min_t(unsigned int, dev->tx_queue_len, | |
| 92 | − txq->tx_ring.max_items) >> 1) | |
| 93 | − netif_wake_subqueue(dev, txq->q_idx); | |
| 114 | + if (hfi1_ipoib_used(txq) < hfi1_ipoib_ring_lwat(txq) && | |
| 115 | + atomic_xchg(&txq->ring_full, 0)) | |
| 116 | + hfi1_ipoib_wake_txq(txq); | |
| 94 | 117 | } |
| 95 | 118 | |
| 96 | 119 | static void hfi1_ipoib_free_tx(struct ipoib_txreq *tx, int budget) |
| @@ -364,11 +387,12 @@ static struct ipoib_txreq *hfi1_ipoib_send_dma_common(struct net_device *dev, · 267 unmodified lines | ||
| 364 | 387 | if (unlikely(!tx)) |
| 365 | 388 | return ERR_PTR(-ENOMEM); |
| 366 | 389 | |
| 367 | − /* so that we can test if the sdma decriptors are there */ | |
| 390 | + /* so that we can test if the sdma descriptors are there */ | |
| 368 | 391 | tx->txreq.num_desc = 0; |
| 369 | 392 | tx->priv = priv; |
| 370 | 393 | tx->txq = txp->txq; |
| 371 | 394 | tx->skb = skb; |
| 395 | + INIT_LIST_HEAD(&tx->txreq.list); | |
| 372 | 396 | |
| 373 | 397 | hfi1_ipoib_build_ib_tx_headers(tx, txp); |
| 374 | 398 | |
| @@ -469,6 +493,7 @@ static int hfi1_ipoib_send_dma_single(struct net_device *dev, · 94 unmodified lines | ||
| 469 | 493 | |
| 470 | 494 | ret = hfi1_ipoib_submit_tx(txq, tx); |
| 471 | 495 | if (likely(!ret)) { |
| 496 | +tx_ok: | |
| 472 | 497 | trace_sdma_output_ibhdr(tx->priv->dd, |
| 473 | 498 | &tx->sdma_hdr.hdr, |
| 474 | 499 | ib_is_sc5(txp->flow.sc5)); |
| @@ -478,20 +503,8 @@ static int hfi1_ipoib_send_dma_single(struct net_device *dev, · 3 unmodified lines | ||
| 478 | 503 | |
| 479 | 504 | txq->pkts_sent = false; |
| 480 | 505 | |
| 481 | − if (ret == -EBUSY) { | |
| 482 | − list_add_tail(&tx->txreq.list, &txq->tx_list); | |
| 483 | − | |
| 484 | − trace_sdma_output_ibhdr(tx->priv->dd, | |
| 485 | − &tx->sdma_hdr.hdr, | |
| 486 | − ib_is_sc5(txp->flow.sc5)); | |
| 487 | − hfi1_ipoib_check_queue_depth(txq); | |
| 488 | − return NETDEV_TX_OK; | |
| 489 | − } | |
| 490 | − | |
| 491 | − if (ret == -ECOMM) { | |
| 492 | − hfi1_ipoib_check_queue_depth(txq); | |
| 493 | − return NETDEV_TX_OK; | |
| 494 | − } | |
| 506 | + if (ret == -EBUSY || ret == -ECOMM) | |
| 507 | + goto tx_ok; | |
| 495 | 508 | |
| 496 | 509 | sdma_txclean(priv->dd, &tx->txreq); |
| 497 | 510 | dev_kfree_skb_any(skb); |
| @@ -509,9 +522,17 @@ static int hfi1_ipoib_send_dma_list(struct net_device *dev, · 11 unmodified lines | ||
| 509 | 522 | struct ipoib_txreq *tx; |
| 510 | 523 | |
| 511 | 524 | /* Has the flow change ? */ |
| 512 | − if (txq->flow.as_int != txp->flow.as_int) | |
| 513 | − (void)hfi1_ipoib_flush_tx_list(dev, txq); | |
| 514 | − | |
| 525 | + if (txq->flow.as_int != txp->flow.as_int) { | |
| 526 | + int ret; | |
| 527 | + | |
| 528 | + ret = hfi1_ipoib_flush_tx_list(dev, txq); | |
| 529 | + if (unlikely(ret)) { | |
| 530 | + if (ret == -EBUSY) | |
| 531 | + ++dev->stats.tx_dropped; | |
| 532 | + dev_kfree_skb_any(skb); | |
| 533 | + return NETDEV_TX_OK; | |
| 534 | + } | |
| 535 | + } | |
| 515 | 536 | tx = hfi1_ipoib_send_dma_common(dev, skb, txp); |
| 516 | 537 | if (IS_ERR(tx)) { |
| 517 | 538 | int ret = PTR_ERR(tx); |
| @@ -610,10 +631,14 @@ static int hfi1_ipoib_sdma_sleep(struct sdma_engine *sde, · 92 unmodified lines | ||
| 610 | 631 | return -EAGAIN; |
| 611 | 632 | } |
| 612 | 633 | |
| 613 | − netif_stop_subqueue(txq->priv->netdev, txq->q_idx); | |
| 614 | − | |
| 615 | − if (list_empty(&txq->wait.list)) | |
| 634 | + if (list_empty(&txreq->list)) | |
| 635 | + /* came from non-list submit */ | |
| 636 | + list_add_tail(&txreq->list, &txq->tx_list); | |
| 637 | + if (list_empty(&txq->wait.list)) { | |
| 638 | + if (!atomic_xchg(&txq->no_desc, 1)) | |
| 639 | + hfi1_ipoib_stop_txq(txq); | |
| 616 | 640 | iowait_queue(pkts_sent, wait->iow, &sde->dmawait); |
| 641 | + } | |
| 617 | 642 | |
| 618 | 643 | write_sequnlock(&sde->waitlock); |
| 619 | 644 | return -EBUSY; |
| @@ -648,9 +673,9 @@ static void hfi1_ipoib_flush_txq(struct work_struct *work) · 28 unmodified lines | ||
| 648 | 673 | struct net_device *dev = txq->priv->netdev; |
| 649 | 674 | |
| 650 | 675 | if (likely(dev->reg_state == NETREG_REGISTERED) && |
| 651 | − likely(__netif_subqueue_stopped(dev, txq->q_idx)) && | |
| 652 | 676 | likely(!hfi1_ipoib_flush_tx_list(dev, txq))) |
| 653 | − netif_wake_subqueue(dev, txq->q_idx); | |
| 677 | + if (atomic_xchg(&txq->no_desc, 0)) | |
| 678 | + hfi1_ipoib_wake_txq(txq); | |
| 654 | 679 | } |
| 655 | 680 | |
| 656 | 681 | int hfi1_ipoib_txreq_init(struct hfi1_ipoib_dev_priv *priv) |
| @@ -704,6 +729,9 @@ int hfi1_ipoib_txreq_init(struct hfi1_ipoib_dev_priv *priv) · 47 unmodified lines | ||
| 704 | 729 | txq->sde = NULL; |
| 705 | 730 | INIT_LIST_HEAD(&txq->tx_list); |
| 706 | 731 | atomic64_set(&txq->complete_txreqs, 0); |
| 732 | + atomic_set(&txq->stops, 0); | |
| 733 | + atomic_set(&txq->ring_full, 0); | |
| 734 | + atomic_set(&txq->no_desc, 0); | |
| 707 | 735 | txq->q_idx = i; |
| 708 | 736 | txq->flow.tx_queue = 0xff; |
| 709 | 737 | txq->flow.sc5 = 0xff; |
| @@ -769,7 +797,7 @@ static void hfi1_ipoib_drain_tx_list(struct hfi1_ipoib_txq *txq) · 59 unmodified lines | ||
| 769 | 797 | atomic64_inc(complete_txreqs); |
| 770 | 798 | } |
| 771 | 799 | |
| 772 | − if (hfi1_ipoib_txreqs(txq->sent_txreqs, atomic64_read(complete_txreqs))) | |
| 800 | + if (hfi1_ipoib_used(txq)) | |
| 773 | 801 | dd_dev_warn(txq->priv->dd, |
| 774 | 802 | "txq %d not empty found %llu requests\n", |
| 775 | 803 | txq->q_idx, |
| @@ -373,7 +373,7 @@ void hfi1_netdev_free(struct hfi1_devdata *dd) · 372 unmodified lines | ||
| 373 | 373 | { |
| 374 | 374 | if (dd->dummy_netdev) { |
| 375 | 375 | dd_dev_info(dd, "hfi1 netdev freed\n"); |
| 376 | − free_netdev(dd->dummy_netdev); | |
| 376 | + kfree(dd->dummy_netdev); | |
| 377 | 377 | dd->dummy_netdev = NULL; |
| 378 | 378 | } |
| 379 | 379 | } |
| @@ -91,7 +91,7 @@ static inline struct verbs_txreq *get_txreq(struct hfi1_ibdev *dev, · 90 unmodified lines | ||
| 91 | 91 | tx->mr = NULL; |
| 92 | 92 | tx->sde = priv->s_sde; |
| 93 | 93 | tx->psc = priv->s_sendcontext; |
| 94 | − /* so that we can test if the sdma decriptors are there */ | |
| 94 | + /* so that we can test if the sdma descriptors are there */ | |
| 95 | 95 | tx->txreq.num_desc = 0; |
| 96 | 96 | /* Set the header type */ |
| 97 | 97 | tx->phdr.hdr.hdr_type = priv->hdr_type; |
| @@ -898,13 +898,14 @@ struct hns_roce_hw { · 897 unmodified lines | ||
| 898 | 898 | int (*set_mac)(struct hns_roce_dev *hr_dev, u8 phy_port, u8 *addr); |
| 899 | 899 | void (*set_mtu)(struct hns_roce_dev *hr_dev, u8 phy_port, |
| 900 | 900 | enum ib_mtu mtu); |
| 901 | − int (*write_mtpt)(void *mb_buf, struct hns_roce_mr *mr, | |
| 902 | − unsigned long mtpt_idx); | |
| 901 | + int (*write_mtpt)(struct hns_roce_dev *hr_dev, void *mb_buf, | |
| 902 | + struct hns_roce_mr *mr, unsigned long mtpt_idx); | |
| 903 | 903 | int (*rereg_write_mtpt)(struct hns_roce_dev *hr_dev, |
| 904 | 904 | struct hns_roce_mr *mr, int flags, u32 pdn, |
| 905 | 905 | int mr_access_flags, u64 iova, u64 size, |
| 906 | 906 | void *mb_buf); |
| 907 | − int (*frmr_write_mtpt)(void *mb_buf, struct hns_roce_mr *mr); | |
| 907 | + int (*frmr_write_mtpt)(struct hns_roce_dev *hr_dev, void *mb_buf, | |
| 908 | + struct hns_roce_mr *mr); | |
| 908 | 909 | int (*mw_write_mtpt)(void *mb_buf, struct hns_roce_mw *mw); |
| 909 | 910 | void (*write_cqc)(struct hns_roce_dev *hr_dev, |
| 910 | 911 | struct hns_roce_cq *hr_cq, void *mb_buf, u64 *mtts, |
| @@ -1756,10 +1756,10 @@ static void hns_roce_v1_set_mtu(struct hns_roce_dev *hr_dev, u8 phy_port, · 1755 unmodified lines | ||
| 1756 | 1756 | val); |
| 1757 | 1757 | } |
| 1758 | 1758 | |
| 1759 | −static int hns_roce_v1_write_mtpt(void *mb_buf, struct hns_roce_mr *mr, | |
| 1759 | +static int hns_roce_v1_write_mtpt(struct hns_roce_dev *hr_dev, void *mb_buf, | |
| 1760 | + struct hns_roce_mr *mr, | |
| 1760 | 1761 | unsigned long mtpt_idx) |
| 1761 | 1762 | { |
| 1762 | − struct hns_roce_dev *hr_dev = to_hr_dev(mr->ibmr.device); | |
| 1763 | 1763 | u64 pages[HNS_ROCE_MAX_INNER_MTPT_NUM] = { 0 }; |
| 1764 | 1764 | struct ib_device *ibdev = &hr_dev->ib_dev; |
| 1765 | 1765 | struct hns_roce_v1_mpt_entry *mpt_entry; |
| @@ -910,7 +910,7 @@ static int hns_roce_v2_rst_process_cmd(struct hns_roce_dev *hr_dev) · 909 unmodified lines | ||
| 910 | 910 | instance_stage = handle->rinfo.instance_state; |
| 911 | 911 | reset_stage = handle->rinfo.reset_state; |
| 912 | 912 | reset_cnt = ops->ae_dev_reset_cnt(handle); |
| 913 | − hw_resetting = ops->get_hw_reset_stat(handle); | |
| 913 | + hw_resetting = ops->get_cmdq_stat(handle); | |
| 914 | 914 | sw_resetting = ops->ae_dev_resetting(handle); |
| 915 | 915 | |
| 916 | 916 | if (reset_cnt != hr_dev->reset_cnt) |
| @@ -2529,10 +2529,10 @@ static int hns_roce_v2_set_mac(struct hns_roce_dev *hr_dev, u8 phy_port, · 1612 unmodified lines | ||
| 2529 | 2529 | return hns_roce_cmq_send(hr_dev, &desc, 1); |
| 2530 | 2530 | } |
| 2531 | 2531 | |
| 2532 | −static int set_mtpt_pbl(struct hns_roce_v2_mpt_entry *mpt_entry, | |
| 2532 | +static int set_mtpt_pbl(struct hns_roce_dev *hr_dev, | |
| 2533 | + struct hns_roce_v2_mpt_entry *mpt_entry, | |
| 2533 | 2534 | struct hns_roce_mr *mr) |
| 2534 | 2535 | { |
| 2535 | − struct hns_roce_dev *hr_dev = to_hr_dev(mr->ibmr.device); | |
| 2536 | 2536 | u64 pages[HNS_ROCE_V2_MAX_INNER_MTPT_NUM] = { 0 }; |
| 2537 | 2537 | struct ib_device *ibdev = &hr_dev->ib_dev; |
| 2538 | 2538 | dma_addr_t pbl_ba; |
| @@ -2571,7 +2571,8 @@ static int set_mtpt_pbl(struct hns_roce_v2_mpt_entry *mpt_entry, · 32 unmodified lines | ||
| 2571 | 2571 | return 0; |
| 2572 | 2572 | } |
| 2573 | 2573 | |
| 2574 | −static int hns_roce_v2_write_mtpt(void *mb_buf, struct hns_roce_mr *mr, | |
| 2574 | +static int hns_roce_v2_write_mtpt(struct hns_roce_dev *hr_dev, | |
| 2575 | + void *mb_buf, struct hns_roce_mr *mr, | |
| 2575 | 2576 | unsigned long mtpt_idx) |
| 2576 | 2577 | { |
| 2577 | 2578 | struct hns_roce_v2_mpt_entry *mpt_entry; |
| @@ -2620,7 +2621,7 @@ static int hns_roce_v2_write_mtpt(void *mb_buf, struct hns_roce_mr *mr, · 42 unmodified lines | ||
| 2620 | 2621 | if (mr->type == MR_TYPE_DMA) |
| 2621 | 2622 | return 0; |
| 2622 | 2623 | |
| 2623 | − ret = set_mtpt_pbl(mpt_entry, mr); | |
| 2624 | + ret = set_mtpt_pbl(hr_dev, mpt_entry, mr); | |
| 2624 | 2625 | |
| 2625 | 2626 | return ret; |
| 2626 | 2627 | } |
| @@ -2666,15 +2667,15 @@ static int hns_roce_v2_rereg_write_mtpt(struct hns_roce_dev *hr_dev, · 39 unmodified lines | ||
| 2666 | 2667 | mr->iova = iova; |
| 2667 | 2668 | mr->size = size; |
| 2668 | 2669 | |
| 2669 | − ret = set_mtpt_pbl(mpt_entry, mr); | |
| 2670 | + ret = set_mtpt_pbl(hr_dev, mpt_entry, mr); | |
| 2670 | 2671 | } |
| 2671 | 2672 | |
| 2672 | 2673 | return ret; |
| 2673 | 2674 | } |
| 2674 | 2675 | |
| 2675 | −static int hns_roce_v2_frmr_write_mtpt(void *mb_buf, struct hns_roce_mr *mr) | |
| 2676 | +static int hns_roce_v2_frmr_write_mtpt(struct hns_roce_dev *hr_dev, | |
| 2677 | + void *mb_buf, struct hns_roce_mr *mr) | |
| 2676 | 2678 | { |
| 2677 | − struct hns_roce_dev *hr_dev = to_hr_dev(mr->ibmr.device); | |
| 2678 | 2679 | struct ib_device *ibdev = &hr_dev->ib_dev; |
| 2679 | 2680 | struct hns_roce_v2_mpt_entry *mpt_entry; |
| 2680 | 2681 | dma_addr_t pbl_ba = 0; |
| @@ -180,9 +180,10 @@ static int hns_roce_mr_enable(struct hns_roce_dev *hr_dev, · 179 unmodified lines | ||
| 180 | 180 | } |
| 181 | 181 | |
| 182 | 182 | if (mr->type != MR_TYPE_FRMR) |
| 183 | − ret = hr_dev->hw->write_mtpt(mailbox->buf, mr, mtpt_idx); | |
| 183 | + ret = hr_dev->hw->write_mtpt(hr_dev, mailbox->buf, mr, | |
| 184 | + mtpt_idx); | |
| 184 | 185 | else |
| 185 | − ret = hr_dev->hw->frmr_write_mtpt(mailbox->buf, mr); | |
| 186 | + ret = hr_dev->hw->frmr_write_mtpt(hr_dev, mailbox->buf, mr); | |
| 186 | 187 | if (ret) { |
| 187 | 188 | dev_err(dev, "Write mtpt fail!\n"); |
| 188 | 189 | goto err_page; |
| @@ -1862,7 +1862,7 @@ static int create_xrc_tgt_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 1861 unmodified lines | ||
| 1862 | 1862 | if (!in) |
| 1863 | 1863 | return -ENOMEM; |
| 1864 | 1864 | |
| 1865 | − if (MLX5_CAP_GEN(mdev, ece_support)) | |
| 1865 | + if (MLX5_CAP_GEN(mdev, ece_support) && ucmd) | |
| 1866 | 1866 | MLX5_SET(create_qp_in, in, ece, ucmd->ece_options); |
| 1867 | 1867 | qpc = MLX5_ADDR_OF(create_qp_in, in, qpc); |
| 1868 | 1868 | |
| @@ -2341,18 +2341,18 @@ static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 472 unmodified lines | ||
| 2341 | 2341 | unsigned long flags; |
| 2342 | 2342 | int err; |
| 2343 | 2343 | |
| 2344 | − if (qp->ibqp.rwq_ind_tbl) { | |
| 2344 | + if (qp->is_rss) { | |
| 2345 | 2345 | destroy_rss_raw_qp_tir(dev, qp); |
| 2346 | 2346 | return; |
| 2347 | 2347 | } |
| 2348 | 2348 | |
| 2349 | − base = (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || | |
| 2349 | + base = (qp->type == IB_QPT_RAW_PACKET || | |
| 2350 | 2350 | qp->flags & IB_QP_CREATE_SOURCE_QPN) ? |
| 2351 | − &qp->raw_packet_qp.rq.base : | |
| 2352 | − &qp->trans_qp.base; | |
| 2351 | + &qp->raw_packet_qp.rq.base : | |
| 2352 | + &qp->trans_qp.base; | |
| 2353 | 2353 | |
| 2354 | 2354 | if (qp->state != IB_QPS_RESET) { |
| 2355 | − if (qp->ibqp.qp_type != IB_QPT_RAW_PACKET && | |
| 2355 | + if (qp->type != IB_QPT_RAW_PACKET && | |
| 2356 | 2356 | !(qp->flags & IB_QP_CREATE_SOURCE_QPN)) { |
| 2357 | 2357 | err = mlx5_core_qp_modify(dev, MLX5_CMD_OP_2RST_QP, 0, |
| 2358 | 2358 | NULL, &base->mqp, NULL); |
| @@ -2368,8 +2368,8 @@ static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 9 unmodified lines | ||
| 2368 | 2368 | base->mqp.qpn); |
| 2369 | 2369 | } |
| 2370 | 2370 | |
| 2371 | − get_cqs(qp->ibqp.qp_type, qp->ibqp.send_cq, qp->ibqp.recv_cq, | |
| 2372 | − &send_cq, &recv_cq); | |
| 2371 | + get_cqs(qp->type, qp->ibqp.send_cq, qp->ibqp.recv_cq, &send_cq, | |
| 2372 | + &recv_cq); | |
| 2373 | 2373 | |
| 2374 | 2374 | spin_lock_irqsave(&dev->reset_flow_resource_lock, flags); |
| 2375 | 2375 | mlx5_ib_lock_cqs(send_cq, recv_cq); |
| @@ -2391,7 +2391,7 @@ static void destroy_qp_common(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 15 unmodified lines | ||
| 2391 | 2391 | mlx5_ib_unlock_cqs(send_cq, recv_cq); |
| 2392 | 2392 | spin_unlock_irqrestore(&dev->reset_flow_resource_lock, flags); |
| 2393 | 2393 | |
| 2394 | − if (qp->ibqp.qp_type == IB_QPT_RAW_PACKET || | |
| 2394 | + if (qp->type == IB_QPT_RAW_PACKET || | |
| 2395 | 2395 | qp->flags & IB_QP_CREATE_SOURCE_QPN) { |
| 2396 | 2396 | destroy_raw_packet_qp(dev, qp); |
| 2397 | 2397 | } else { |
| @@ -2668,6 +2668,9 @@ static int process_create_flags(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, · 270 unmodified lines | ||
| 2668 | 2668 | if (qp_type == IB_QPT_RAW_PACKET && attr->rwq_ind_tbl) |
| 2669 | 2669 | return (create_flags) ? -EINVAL : 0; |
| 2670 | 2670 | |
| 2671 | + process_create_flag(dev, &create_flags, | |
| 2672 | + IB_QP_CREATE_INTEGRITY_EN, | |
| 2673 | + MLX5_CAP_GEN(mdev, sho), qp); | |
| 2671 | 2674 | process_create_flag(dev, &create_flags, |
| 2672 | 2675 | IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK, |
| 2673 | 2676 | MLX5_CAP_GEN(mdev, block_lb_mc), qp); |
| @@ -2873,7 +2876,6 @@ static int mlx5_ib_destroy_dct(struct mlx5_ib_qp *mqp) · 199 unmodified lines | ||
| 2873 | 2876 | static int check_ucmd_data(struct mlx5_ib_dev *dev, |
| 2874 | 2877 | struct mlx5_create_qp_params *params) |
| 2875 | 2878 | { |
| 2876 | − struct ib_qp_init_attr *attr = params->attr; | |
| 2877 | 2879 | struct ib_udata *udata = params->udata; |
| 2878 | 2880 | size_t size, last; |
| 2879 | 2881 | int ret; |
| @@ -2885,14 +2887,7 @@ static int check_ucmd_data(struct mlx5_ib_dev *dev, · 5 unmodified lines | ||
| 2885 | 2887 | */ |
| 2886 | 2888 | last = sizeof(struct mlx5_ib_create_qp_rss); |
| 2887 | 2889 | else |
| 2888 | − /* IB_QPT_RAW_PACKET doesn't have ECE data */ | |
| 2889 | − switch (attr->qp_type) { | |
| 2890 | − case IB_QPT_RAW_PACKET: | |
| 2891 | − last = offsetof(struct mlx5_ib_create_qp, ece_options); | |
| 2892 | − break; | |
| 2893 | − default: | |
| 2894 | − last = offsetof(struct mlx5_ib_create_qp, reserved); | |
| 2895 | − } | |
| 2890 | + last = offsetof(struct mlx5_ib_create_qp, reserved); | |
| 2896 | 2891 | |
| 2897 | 2892 | if (udata->inlen <= last) |
| 2898 | 2893 | return 0; |
| @@ -2907,7 +2902,7 @@ static int check_ucmd_data(struct mlx5_ib_dev *dev, · 8 unmodified lines | ||
| 2907 | 2902 | if (!ret) |
| 2908 | 2903 | mlx5_ib_dbg( |
| 2909 | 2904 | dev, |
| 2910 | − "udata is not cleared, inlen = %lu, ucmd = %lu, last = %lu, size = %lu\n", | |
| 2905 | + "udata is not cleared, inlen = %zu, ucmd = %zu, last = %zu, size = %zu\n", | |
| 2911 | 2906 | udata->inlen, params->ucmd_size, last, size); |
| 2912 | 2907 | return ret ? 0 : -EINVAL; |
| 2913 | 2908 | } |
| @@ -3002,10 +2997,18 @@ struct ib_qp *mlx5_ib_create_qp(struct ib_pd *pd, struct ib_qp_init_attr *attr, · 88 unmodified lines | ||
| 3002 | 2997 | return &qp->ibqp; |
| 3003 | 2998 | |
| 3004 | 2999 | destroy_qp: |
| 3005 | − if (qp->type == MLX5_IB_QPT_DCT) | |
| 3000 | + if (qp->type == MLX5_IB_QPT_DCT) { | |
| 3006 | 3001 | mlx5_ib_destroy_dct(qp); |
| 3007 | − else | |
| 3002 | + } else { | |
| 3003 | + /* | |
| 3004 | + * The two lines below are temp solution till QP allocation | |
| 3005 | + * will be moved to be under IB/core responsiblity. | |
| 3006 | + */ | |
| 3007 | + qp->ibqp.send_cq = attr->send_cq; | |
| 3008 | + qp->ibqp.recv_cq = attr->recv_cq; | |
| 3008 | 3009 | destroy_qp_common(dev, qp, udata); |
| 3010 | + } | |
| 3011 | + | |
| 3009 | 3012 | qp = NULL; |
| 3010 | 3013 | free_qp: |
| 3011 | 3014 | kfree(qp); |
| @@ -4162,8 +4165,6 @@ static int mlx5_ib_modify_dct(struct ib_qp *ibqp, struct ib_qp_attr *attr, · 1150 unmodified lines | ||
| 4162 | 4165 | |
| 4163 | 4166 | if (udata->outlen < min_resp_len) |
| 4164 | 4167 | return -EINVAL; |
| 4165 | − resp.response_length = min_resp_len; | |
| 4166 | − | |
| 4167 | 4168 | /* |
| 4168 | 4169 | * If we don't have enough space for the ECE options, |
| 4169 | 4170 | * simply indicate it with resp.response_length. |
| @@ -4384,8 +4385,7 @@ static void to_rdma_ah_attr(struct mlx5_ib_dev *ibdev, · 214 unmodified lines | ||
| 4384 | 4385 | MLX5_GET(ads, path, src_addr_index), |
| 4385 | 4386 | MLX5_GET(ads, path, hop_limit), |
| 4386 | 4387 | MLX5_GET(ads, path, tclass)); |
| 4387 | − memcpy(ah_attr, MLX5_ADDR_OF(ads, path, rgid_rip), | |
| 4388 | − MLX5_FLD_SZ_BYTES(ads, rgid_rip)); | |
| 4388 | + rdma_ah_set_dgid_raw(ah_attr, MLX5_ADDR_OF(ads, path, rgid_rip)); | |
| 4389 | 4389 | } |
| 4390 | 4390 | } |
| 4391 | 4391 | |
| @@ -346,6 +346,9 @@ static int get_ece_from_mbox(void *out, u16 opcode) · 345 unmodified lines | ||
| 346 | 346 | int ece = 0; |
| 347 | 347 | |
| 348 | 348 | switch (opcode) { |
| 349 | + case MLX5_CMD_OP_INIT2INIT_QP: | |
| 350 | + ece = MLX5_GET(init2init_qp_out, out, ece); | |
| 351 | + break; | |
| 349 | 352 | case MLX5_CMD_OP_INIT2RTR_QP: |
| 350 | 353 | ece = MLX5_GET(init2rtr_qp_out, out, ece); |
| 351 | 354 | break; |
| @@ -355,6 +358,9 @@ static int get_ece_from_mbox(void *out, u16 opcode) · 3 unmodified lines | ||
| 355 | 358 | case MLX5_CMD_OP_RTS2RTS_QP: |
| 356 | 359 | ece = MLX5_GET(rts2rts_qp_out, out, ece); |
| 357 | 360 | break; |
| 361 | + case MLX5_CMD_OP_RST2INIT_QP: | |
| 362 | + ece = MLX5_GET(rst2init_qp_out, out, ece); | |
| 363 | + break; | |
| 358 | 364 | default: |
| 359 | 365 | break; |
| 360 | 366 | } |
| @@ -406,6 +412,7 @@ static int modify_qp_mbox_alloc(struct mlx5_core_dev *dev, u16 opcode, int qpn, · 45 unmodified lines | ||
| 406 | 412 | return -ENOMEM; |
| 407 | 413 | MOD_QP_IN_SET_QPC(rst2init_qp, mbox->in, opcode, qpn, |
| 408 | 414 | opt_param_mask, qpc, uid); |
| 415 | + MLX5_SET(rst2init_qp_in, mbox->in, ece, ece); | |
| 409 | 416 | break; |
| 410 | 417 | case MLX5_CMD_OP_INIT2RTR_QP: |
| 411 | 418 | if (MBOX_ALLOC(mbox, init2rtr_qp)) |
| @@ -439,6 +446,7 @@ static int modify_qp_mbox_alloc(struct mlx5_core_dev *dev, u16 opcode, int qpn, · 27 unmodified lines | ||
| 439 | 446 | return -ENOMEM; |
| 440 | 447 | MOD_QP_IN_SET_QPC(init2init_qp, mbox->in, opcode, qpn, |
| 441 | 448 | opt_param_mask, qpc, uid); |
| 449 | + MLX5_SET(init2init_qp_in, mbox->in, ece, ece); | |
| 442 | 450 | break; |
| 443 | 451 | default: |
| 444 | 452 | return -EINVAL; |
| @@ -150,8 +150,17 @@ qedr_iw_issue_event(void *context, · 149 unmodified lines | ||
| 150 | 150 | if (params->cm_info) { |
| 151 | 151 | event.ird = params->cm_info->ird; |
| 152 | 152 | event.ord = params->cm_info->ord; |
| 153 | − event.private_data_len = params->cm_info->private_data_len; | |
| 154 | − event.private_data = (void *)params->cm_info->private_data; | |
| 153 | + /* Only connect_request and reply have valid private data | |
| 154 | + * the rest of the events this may be left overs from | |
| 155 | + * connection establishment. CONNECT_REQUEST is issued via | |
| 156 | + * qedr_iw_mpa_request | |
| 157 | + */ | |
| 158 | + if (event_type == IW_CM_EVENT_CONNECT_REPLY) { | |
| 159 | + event.private_data_len = | |
| 160 | + params->cm_info->private_data_len; | |
| 161 | + event.private_data = | |
| 162 | + (void *)params->cm_info->private_data; | |
| 163 | + } | |
| 155 | 164 | } |
| 156 | 165 | |
| 157 | 166 | if (ep->cm_id) |
| @@ -1204,7 +1204,7 @@ struct ib_qp *rvt_create_qp(struct ib_pd *ibpd, · 1203 unmodified lines | ||
| 1204 | 1204 | err = alloc_ud_wq_attr(qp, rdi->dparms.node); |
| 1205 | 1205 | if (err) { |
| 1206 | 1206 | ret = (ERR_PTR(err)); |
| 1207 | − goto bail_driver_priv; | |
| 1207 | + goto bail_rq_rvt; | |
| 1208 | 1208 | } |
| 1209 | 1209 | |
| 1210 | 1210 | if (init_attr->create_flags & IB_QP_CREATE_NETDEV_USE) |
| @@ -1314,9 +1314,11 @@ bail_qpn: · 103 unmodified lines | ||
| 1314 | 1314 | rvt_free_qpn(&rdi->qp_dev->qpn_table, qp->ibqp.qp_num); |
| 1315 | 1315 | |
| 1316 | 1316 | bail_rq_wq: |
| 1317 | − rvt_free_rq(&qp->r_rq); | |
| 1318 | 1317 | free_ud_wq_attr(qp); |
| 1319 | 1318 | |
| 1319 | +bail_rq_rvt: | |
| 1320 | + rvt_free_rq(&qp->r_rq); | |
| 1321 | + | |
| 1320 | 1322 | bail_driver_priv: |
| 1321 | 1323 | rdi->driver_f.qp_priv_free(rdi, qp); |
| 1322 | 1324 | |
| @@ -139,7 +139,8 @@ static int siw_rx_pbl(struct siw_rx_stream *srx, int *pbl_idx, · 138 unmodified lines | ||
| 139 | 139 | break; |
| 140 | 140 | |
| 141 | 141 | bytes = min(bytes, len); |
| 142 | − if (siw_rx_kva(srx, (void *)buf_addr, bytes) == bytes) { | |
| 142 | + if (siw_rx_kva(srx, (void *)(uintptr_t)buf_addr, bytes) == | |
| 143 | + bytes) { | |
| 143 | 144 | copied += bytes; |
| 144 | 145 | offset += bytes; |
| 145 | 146 | len -= bytes; |
| @@ -4283,7 +4283,8 @@ struct mlx5_ifc_rst2init_qp_out_bits { · 4282 unmodified lines | ||
| 4283 | 4283 | |
| 4284 | 4284 | u8 syndrome[0x20]; |
| 4285 | 4285 | |
| 4286 | − u8 reserved_at_40[0x40]; | |
| 4286 | + u8 reserved_at_40[0x20]; | |
| 4287 | + u8 ece[0x20]; | |
| 4287 | 4288 | }; |
| 4288 | 4289 | |
| 4289 | 4290 | struct mlx5_ifc_rst2init_qp_in_bits { |
| @@ -4300,7 +4301,7 @@ struct mlx5_ifc_rst2init_qp_in_bits { · 10 unmodified lines | ||
| 4300 | 4301 | |
| 4301 | 4302 | u8 opt_param_mask[0x20]; |
| 4302 | 4303 | |
| 4303 | − u8 reserved_at_a0[0x20]; | |
| 4304 | + u8 ece[0x20]; | |
| 4304 | 4305 | |
| 4305 | 4306 | struct mlx5_ifc_qpc_bits qpc; |
| 4306 | 4307 | |
| @@ -6619,7 +6620,8 @@ struct mlx5_ifc_init2init_qp_out_bits { · 2312 unmodified lines | ||
| 6619 | 6620 | |
| 6620 | 6621 | u8 syndrome[0x20]; |
| 6621 | 6622 | |
| 6622 | − u8 reserved_at_40[0x40]; | |
| 6623 | + u8 reserved_at_40[0x20]; | |
| 6624 | + u8 ece[0x20]; | |
| 6623 | 6625 | }; |
| 6624 | 6626 | |
| 6625 | 6627 | struct mlx5_ifc_init2init_qp_in_bits { |
| @@ -6636,7 +6638,7 @@ struct mlx5_ifc_init2init_qp_in_bits { · 10 unmodified lines | ||
| 6636 | 6638 | |
| 6637 | 6639 | u8 opt_param_mask[0x20]; |
| 6638 | 6640 | |
| 6639 | − u8 reserved_at_a0[0x20]; | |
| 6641 | + u8 ece[0x20]; | |
| 6640 | 6642 | |
| 6641 | 6643 | struct mlx5_ifc_qpc_bits qpc; |
| 6642 | 6644 | |