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drm/amdgpu: Remap hdp coherency registers

Remap HDP_MEM_COHERENCY_FLUSH_CNTL and HDP_REG_COHERENCY_FLUSH_CNTL to an empty page in mmio space. We will later map this page to process space so application can flush hdp. This can't be done properly at those registers' original location because it will expose more than desired registers to process space. v2: Use explicit register hole location v3: Moved remapped hdp registers into adev struct v4: Use more generic name for remapped page Expose register offset in kfd_ioctl.h v5: Move hdp register remap function to nbio ip function v6: Fixed operator precedence issue and other bugs

Oak Zeng committed 7 years ago

Commit 88807dc1 parent 4fde03a5 files · +49 −6Browse files

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include/uapi/linux/kfd_ioctl.h+7−0
@@ -426,6 +426,13 @@ struct kfd_ioctl_import_dmabuf_args { · 425 unmodified lines
426426 __u32 dmabuf_fd; /* to KFD */
427427 };
428428
429+/* Register offset inside the remapped mmio page
430+ */
431+enum kfd_mmio_remap {
432+ KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL = 0,
433+ KFD_MMIO_REMAP_HDP_REG_FLUSH_CNTL = 4,
434+};
435+
429436 #define AMDKFD_IOCTL_BASE 'K'
430437 #define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
431438 #define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)