Merge tag 'v4.18' into rdma.git for-next

Resolve merge conflicts from the -rc cycle against the rdma.git tree: Conflicts: drivers/infiniband/core/uverbs_cmd.c - New ifs added to ib_uverbs_ex_create_flow in -rc and for-next - Merge removal of file->ucontext in for-next with new code in -rc drivers/infiniband/core/uverbs_main.c - for-next removed code from ib_uverbs_write() that was modified in for-rc

Jason Gunthorpe committed 8 years ago

Commit 89982f72 parents a1ceeca 94710ca1684 files · +18047 −9534Browse files

Unified · Split

1684 files

Documentation/admin-guide/kernel-parameters.txt +5 −0
Documentation/admin-guide/pm/intel_pstate.rst +13 −3
Documentation/core-api/kernel-api.rst +1 −1
Documentation/device-mapper/writecache.txt +2 −0
Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt +1 −1
Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt +1 −1
Documentation/devicetree/bindings/gpio/nintendo,hollywood-gpio.txt +1 −1
Documentation/devicetree/bindings/input/sprd,sc27xx-vibra.txt +23 −0
Documentation/devicetree/bindings/input/touchscreen/hideep.txt +1 −1
Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.txt +1 −1
Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt +1 −1
Documentation/devicetree/bindings/mips/brcm/soc.txt +1 −1
Documentation/devicetree/bindings/net/fsl-fman.txt +1 −1
Documentation/devicetree/bindings/power/power_domain.txt +1 −1
Documentation/devicetree/bindings/regulator/tps65090.txt +1 −1
Documentation/devicetree/bindings/reset/st,sti-softreset.txt +1 −1
Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt +1 −1
Documentation/devicetree/bindings/sound/qcom,apq8016-sbc.txt +1 −1
Documentation/devicetree/bindings/sound/qcom,apq8096.txt +1 −1
Documentation/devicetree/bindings/usb/rockchip,dwc3.txt +2 −1
Documentation/devicetree/bindings/w1/w1-gpio.txt +1 −1
Documentation/driver-api/infrastructure.rst +2 −2
Documentation/filesystems/Locking +1 −6
Documentation/filesystems/cifs/AUTHORS +4 −3
Documentation/filesystems/cifs/CHANGES +3 −0
Documentation/filesystems/cifs/TODO +9 −8
Documentation/filesystems/vfs.txt +0 −13
Documentation/kbuild/kbuild.txt +7 −10
Documentation/kbuild/kconfig-language.txt +6 −0
Documentation/kbuild/kconfig.txt +43 −8
Documentation/networking/bonding.txt +1 −1
Documentation/networking/dpaa2/overview.rst +1 −0
Documentation/networking/e100.rst +70 −61
Documentation/networking/e1000.rst +94 −55
Documentation/networking/strparser.txt +1 −1
Documentation/trace/histogram.txt +12 −11
Documentation/usb/gadget_configfs.txt +1 −1
Documentation/virtual/kvm/api.txt +1 −1
MAINTAINERS +51 −25
Makefile +5 −10
arch/alpha/Kconfig +0 −5
arch/alpha/kernel/osf_sys.c +1 −4
arch/alpha/lib/Makefile +0 −2
arch/alpha/lib/dec_and_lock.c +0 −44
arch/arc/Kconfig +4 −1
arch/arc/Makefile +1 −14
arch/arc/configs/axs101_defconfig +0 −1
arch/arc/configs/axs103_defconfig +0 −1
arch/arc/configs/axs103_smp_defconfig +0 −1
arch/arc/configs/haps_hs_defconfig +0 −1
arch/arc/configs/haps_hs_smp_defconfig +0 −1
arch/arc/configs/hsdk_defconfig +0 −1
arch/arc/configs/nsim_700_defconfig +0 −1
arch/arc/configs/nsim_hs_defconfig +0 −1
arch/arc/configs/nsim_hs_smp_defconfig +0 −1
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arch/arc/configs/nsimosci_hs_defconfig +0 −1
arch/arc/configs/nsimosci_hs_smp_defconfig +0 −1
arch/arc/configs/tb10x_defconfig +0 −1
arch/arc/include/asm/cache.h +3 −1
arch/arc/include/asm/delay.h +3 −0
arch/arc/include/asm/entry-compact.h +6 −0
arch/arc/include/asm/entry.h +0 −3
arch/arc/include/asm/mach_desc.h +0 −2
arch/arc/include/asm/page.h +1 −1
arch/arc/include/asm/pgtable.h +1 −1
arch/arc/kernel/irq.c +1 −1
arch/arc/kernel/process.c +36 −11
arch/arc/mm/cache.c +14 −3
arch/arc/mm/dma.c +47 −2
arch/arc/plat-eznps/include/plat/ctop.h +10 −0
arch/arc/plat-eznps/mtm.c +4 −2
arch/arc/plat-hsdk/Kconfig +3 −0
arch/arc/plat-hsdk/platform.c +62 −0
arch/arm/Kconfig +7 −1
arch/arm/boot/dts/am335x-bone-common.dtsi +0 −1
arch/arm/boot/dts/am3517.dtsi +9 −0
arch/arm/boot/dts/am437x-sk-evm.dts +2 −0
arch/arm/boot/dts/armada-385-synology-ds116.dts +1 −1
arch/arm/boot/dts/armada-38x.dtsi +1 −1
arch/arm/boot/dts/bcm-cygnus.dtsi +12 −12
arch/arm/boot/dts/bcm-hr2.dtsi +12 −12
arch/arm/boot/dts/bcm-nsp.dtsi +16 −16
arch/arm/boot/dts/bcm5301x.dtsi +1 −1
arch/arm/boot/dts/da850.dtsi +1 −5
arch/arm/boot/dts/dra7.dtsi +1 −1
arch/arm/boot/dts/imx51-zii-rdu1.dts +1 −1
arch/arm/boot/dts/imx6q.dtsi +1 −1
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi +1 −1
arch/arm/boot/dts/imx6sx.dtsi +1 −1
arch/arm/boot/dts/omap4-droid4-xt894.dts +3 −6
arch/arm/boot/dts/socfpga.dtsi +2 −2
arch/arm/boot/dts/socfpga_arria10.dtsi +2 −3
arch/arm/common/Makefile +1 −1
arch/arm/configs/imx_v4_v5_defconfig +2 −0
arch/arm/configs/imx_v6_v7_defconfig +2 −0
arch/arm/configs/multi_v7_defconfig +155 −223
arch/arm/crypto/speck-neon-core.S +4 −2
arch/arm/firmware/Makefile +3 −0
arch/arm/kernel/entry-common.S +3 −1
arch/arm/kernel/head-nommu.S +1 −1
arch/arm/kernel/process.c +1 −0
arch/arm/kernel/signal.c +2 −2
arch/arm/mach-bcm/Kconfig +1 −0
arch/arm/mach-davinci/board-da850-evm.c +1 −1
arch/arm/mach-omap2/omap-smp.c +41 −0
arch/arm/mach-pxa/irq.c +2 −2
arch/arm/mach-rpc/ecard.c +1 −4
arch/arm/mach-socfpga/Kconfig +1 −0
arch/arm/mm/init.c +9 −0
arch/arm/net/bpf_jit_32.c +1 −1
arch/arm/xen/enlighten.c +4 −3
arch/arm64/Makefile +5 −5
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +2 −4
arch/arm64/boot/dts/amlogic/meson-axg-s400.dts +14 −1
arch/arm64/boot/dts/amlogic/meson-axg.dtsi +2 −2
arch/arm64/boot/dts/amlogic/meson-gx.dtsi +9 −3
arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi +1 −1
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts +0 −3
arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi +7 −0
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +0 −8
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +4 −4
arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts +4 −0
arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts +4 −0
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi +2 −2
arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +2 −0
arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts +2 −0
arch/arm64/boot/dts/marvell/armada-cp110.dtsi +1 −1
arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi +1 −1
arch/arm64/boot/dts/qcom/msm8916.dtsi +2 −2
arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts +1 −1
arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts +1 −1
arch/arm64/configs/defconfig +39 −63
arch/arm64/crypto/aes-ce-ccm-core.S +55 −95
arch/arm64/crypto/aes-glue.c +1 −1
arch/arm64/crypto/ghash-ce-core.S +25 −51
arch/arm64/crypto/ghash-ce-glue.c +6 −2
arch/arm64/include/asm/alternative.h +6 −1
arch/arm64/include/asm/kvm_host.h +1 −0
arch/arm64/include/asm/pgtable.h +1 −5
arch/arm64/include/asm/simd.h +7 −12
arch/arm64/include/asm/sysreg.h +11 −0
arch/arm64/include/asm/tlb.h +1 −1
arch/arm64/kernel/alternative.c +44 −7
arch/arm64/kernel/cpufeature.c +3 −3
arch/arm64/kernel/module.c +2 −3
arch/arm64/kernel/smp.c +1 −1
arch/arm64/kvm/fpsimd.c +27 −9
arch/arm64/mm/dma-mapping.c +5 −4
arch/arm64/mm/hugetlbpage.c +4 −3
arch/arm64/mm/init.c +3 −1
arch/arm64/mm/proc.S +3 −2
arch/ia64/include/asm/tlb.h +3 −4
arch/ia64/kernel/perfmon.c +2 −4
arch/ia64/mm/init.c +7 −9
arch/m68k/include/asm/mcf_pgalloc.h +3 −1
arch/microblaze/Kconfig.debug +0 −7
arch/microblaze/include/asm/setup.h +0 −5
arch/microblaze/include/asm/unistd.h +1 −1
arch/microblaze/include/uapi/asm/unistd.h +2 −0
arch/microblaze/kernel/Makefile +1 −3
arch/microblaze/kernel/heartbeat.c +0 −72
arch/microblaze/kernel/platform.c +0 −29
arch/microblaze/kernel/reset.c +6 −5
arch/microblaze/kernel/syscall_table.S +2 −0
arch/microblaze/kernel/timer.c +0 −7
arch/mips/Kconfig +1 −0
arch/mips/ath79/common.c +1 −1
arch/mips/ath79/mach-pb44.c +1 −1
arch/mips/include/asm/io.h +2 −0
arch/mips/include/uapi/asm/unistd.h +12 −6
arch/mips/kernel/entry.S +8 −0
arch/mips/kernel/mcount.S +12 −15
arch/mips/kernel/process.c +29 −14
arch/mips/kernel/scall32-o32.S +2 −0
arch/mips/kernel/scall64-64.S +2 −0
arch/mips/kernel/scall64-n32.S +2 −0
arch/mips/kernel/scall64-o32.S +2 −0
arch/mips/kernel/signal.c +3 −0
arch/mips/kernel/traps.c +1 −0
arch/mips/mm/ioremap.c +25 −12
arch/mips/pci/pci.c +1 −1
arch/nds32/Kconfig +6 −6
arch/nds32/Makefile +2 −0
arch/nds32/include/asm/cacheflush.h +7 −2
arch/nds32/include/asm/futex.h +1 −1
arch/nds32/kernel/setup.c +2 −1
arch/nds32/mm/cacheflush.c +40 −60
arch/openrisc/include/asm/pgalloc.h +5 −1
arch/openrisc/kernel/entry.S +1 −7
arch/openrisc/kernel/head.S +6 −3
arch/openrisc/kernel/traps.c +1 −1
arch/parisc/Kconfig +4 −5
arch/parisc/Makefile +0 −4
arch/parisc/include/asm/barrier.h +32 −0
arch/parisc/include/asm/signal.h +0 −8
arch/parisc/include/uapi/asm/unistd.h +2 −1
arch/parisc/kernel/drivers.c +9 −16
arch/parisc/kernel/entry.S +2 −0
arch/parisc/kernel/pacache.S +1 −0
arch/parisc/kernel/syscall.S +4 −0
arch/parisc/kernel/syscall_table.S +1 −0
arch/parisc/kernel/unwind.c +2 −2
arch/powerpc/Makefile +2 −0
arch/powerpc/include/asm/book3s/32/pgalloc.h +1 −1
arch/powerpc/include/asm/book3s/64/pgtable-4k.h +21 −0
arch/powerpc/include/asm/book3s/64/pgtable-64k.h +9 −0
arch/powerpc/include/asm/book3s/64/pgtable.h +5 −0
arch/powerpc/include/asm/mmu_context.h +23 −14
arch/powerpc/include/asm/nmi.h +1 −1
arch/powerpc/include/asm/nohash/32/pgalloc.h +1 −1
arch/powerpc/include/asm/nohash/64/pgalloc.h +1 −0
arch/powerpc/include/asm/systbl.h +1 −0
arch/powerpc/include/asm/unistd.h +1 −1
arch/powerpc/include/uapi/asm/unistd.h +1 −0
arch/powerpc/kernel/dt_cpu_ftrs.c +2 −1
arch/powerpc/kernel/idle_book3s.S +2 −0
arch/powerpc/kernel/pci-common.c +3 −1
arch/powerpc/kernel/pci_32.c +0 −4
arch/powerpc/kernel/pci_64.c +0 −4
arch/powerpc/kernel/rtas.c +0 −4
arch/powerpc/kernel/setup-common.c +10 −2
arch/powerpc/kernel/setup_64.c +8 −0
arch/powerpc/kernel/signal.c +2 −2
arch/powerpc/kernel/signal_32.c +0 −8
arch/powerpc/kernel/signal_64.c +0 −4
arch/powerpc/kernel/smp.c +0 −6
arch/powerpc/kernel/stacktrace.c +2 −2
arch/powerpc/kernel/syscalls.c +0 −4
arch/powerpc/kvm/book3s_64_vio.c +1 −1
arch/powerpc/kvm/book3s_64_vio_hv.c +4 −2
arch/powerpc/mm/hugetlbpage.c +2 −1
arch/powerpc/mm/mmu_context_iommu.c +35 −2
arch/powerpc/mm/pgtable-book3s64.c +12 −0
arch/powerpc/mm/subpage-prot.c +0 −4
arch/powerpc/mm/tlb-radix.c +77 −21
arch/powerpc/net/bpf_jit_comp64.c +5 −24
arch/powerpc/platforms/powermac/time.c +20 −9
arch/powerpc/platforms/powernv/pci-ioda.c +2 −1
arch/powerpc/platforms/pseries/setup.c +2 −1
arch/powerpc/xmon/xmon.c +2 −2
arch/riscv/Kconfig +1 −0
arch/riscv/include/uapi/asm/elf.h +7 −2
arch/riscv/kernel/irq.c +0 −4
arch/riscv/kernel/module.c +13 −13
arch/riscv/kernel/ptrace.c +1 −1
arch/riscv/kernel/setup.c +0 −5
arch/riscv/mm/init.c +2 −0
arch/s390/Kconfig +2 −2
arch/s390/include/asm/css_chars.h +32 −30
arch/s390/kernel/compat_wrapper.c +1 −0
arch/s390/kernel/entry.S +6 −2
arch/s390/kernel/signal.c +2 −1
arch/s390/kernel/syscalls/syscall.tbl +2 −0
arch/s390/mm/pgalloc.c +4 −0
arch/s390/net/bpf_jit_comp.c +1 −0
arch/sparc/include/asm/Kbuild +1 −0
arch/sparc/include/asm/msi.h +0 −32
arch/sparc/kernel/time_64.c +1 −1
arch/sparc/mm/srmmu.c +19 −1
arch/x86/Kconfig +1 −1
arch/x86/Makefile +0 −6
arch/x86/boot/compressed/Makefile +6 −2
arch/x86/boot/compressed/eboot.c +3 −9
arch/x86/boot/compressed/pgtable_64.c +55 −18
arch/x86/crypto/aegis128-aesni-asm.S +1 −0
arch/x86/crypto/aegis128-aesni-glue.c +4 −8
arch/x86/crypto/aegis128l-aesni-asm.S +1 −0
arch/x86/crypto/aegis128l-aesni-glue.c +4 −8
arch/x86/crypto/aegis256-aesni-asm.S +1 −0
arch/x86/crypto/aegis256-aesni-glue.c +4 −8
arch/x86/crypto/morus1280-avx2-asm.S +1 −0
arch/x86/crypto/morus1280-avx2-glue.c +3 −7
arch/x86/crypto/morus1280-sse2-asm.S +1 −0
arch/x86/crypto/morus1280-sse2-glue.c +3 −7
arch/x86/crypto/morus640-sse2-asm.S +1 −0
arch/x86/crypto/morus640-sse2-glue.c +3 −7
arch/x86/entry/common.c +1 −1
arch/x86/entry/entry_32.S +1 −1
arch/x86/entry/entry_64.S +4 −14
arch/x86/entry/entry_64_compat.S +8 −8
arch/x86/events/amd/ibs.c +5 −1
arch/x86/events/intel/core.c +3 −0
arch/x86/events/intel/ds.c +16 −17
arch/x86/events/intel/uncore.h +1 −1
arch/x86/events/intel/uncore_snbep.c +7 −3
arch/x86/hyperv/hv_apic.c +5 −0
arch/x86/hyperv/hv_init.c +4 −1
arch/x86/include/asm/apm.h +0 −6
arch/x86/include/asm/asm.h +59 −0
arch/x86/include/asm/barrier.h +1 −1
arch/x86/include/asm/irqflags.h +1 −1
arch/x86/include/asm/mshyperv.h +4 −1
arch/x86/include/asm/pgalloc.h +3 −0
arch/x86/include/asm/pgtable.h +1 −1
arch/x86/include/asm/pgtable_64.h +2 −2
arch/x86/include/asm/qspinlock_paravirt.h +1 −1
arch/x86/include/asm/uaccess_64.h +6 −1
arch/x86/include/asm/vmx.h +3 −0
arch/x86/kernel/Makefile +1 −0
arch/x86/kernel/apic/apic.c +3 −0
arch/x86/kernel/apic/x2apic_uv_x.c +57 −3
arch/x86/kernel/apm_32.c +5 −0
arch/x86/kernel/cpu/amd.c +3 −1
arch/x86/kernel/cpu/bugs.c +9 −3
arch/x86/kernel/cpu/cacheinfo.c +1 −1
arch/x86/kernel/cpu/common.c +3 −0
arch/x86/kernel/cpu/mcheck/mce-severity.c +5 −0
arch/x86/kernel/cpu/mcheck/mce.c +28 −19
arch/x86/kernel/cpu/microcode/intel.c +4 −1
arch/x86/kernel/cpu/mtrr/if.c +2 −1
arch/x86/kernel/e820.c +12 −3
arch/x86/kernel/head64.c +1 −1
arch/x86/kernel/irqflags.S +26 −0
arch/x86/kernel/kvmclock.c +6 −6
arch/x86/kernel/quirks.c +9 −2
arch/x86/kernel/signal.c +1 −1
arch/x86/kernel/smpboot.c +5 −0
arch/x86/kernel/traps.c +8 −6
arch/x86/kernel/uprobes.c +1 −1
arch/x86/kvm/Kconfig +1 −1
arch/x86/kvm/mmu.c +1 −1
arch/x86/kvm/vmx.c +119 −31
arch/x86/kvm/x86.c +3 −1
arch/x86/kvm/x86.h +9 −0
arch/x86/mm/fault.c +7 −14
arch/x86/mm/init_64.c +16 −4
arch/x86/net/bpf_jit_comp32.c +4 −4
arch/x86/platform/efi/efi_64.c +3 −3
arch/x86/purgatory/Makefile +1 −1
arch/x86/um/mem_32.c +1 −1
arch/x86/xen/enlighten.c +7 −0
arch/x86/xen/enlighten_pv.c +13 −13
arch/x86/xen/enlighten_pvh.c +1 −0
arch/x86/xen/irq.c +1 −3
arch/x86/xen/smp_pv.c +5 −0
block/bio.c +41 −16
block/blk-core.c +8 −9
block/blk-mq-debugfs.c +1 −1
block/blk-mq-tag.c +1 −1
block/blk-mq.c +13 −4
block/blk-softirq.c +1 −0
block/blk-timeout.c +1 −0
block/bsg.c +0 −2
block/sed-opal.c +2 −2
certs/blacklist.h +1 −1
crypto/af_alg.c +13 −4
crypto/algif_aead.c +2 −2
crypto/algif_skcipher.c +2 −2
crypto/asymmetric_keys/x509_cert_parser.c +9 −0
crypto/morus640.c +2 −1
crypto/sha3_generic.c +1 −1
drivers/acpi/acpi_lpss.c +13 −1
drivers/acpi/acpica/hwsleep.c +11 −4
drivers/acpi/acpica/psloop.c +31 −0
drivers/acpi/acpica/uterror.c +3 −3
drivers/acpi/battery.c +5 −4
drivers/acpi/ec.c +20 −0
drivers/acpi/nfit/core.c +37 −11
drivers/acpi/nfit/nfit.h +1 −0
drivers/acpi/osl.c +72 −0
drivers/acpi/pptt.c +8 −2
drivers/ata/Kconfig +0 −2
drivers/ata/ahci.c +60 −0
drivers/ata/ahci_mvebu.c +1 −1
drivers/ata/libahci.c +5 −2
drivers/ata/libata-core.c +3 −0
drivers/ata/libata-eh.c +16 −25
drivers/ata/libata-scsi.c +12 −6
drivers/ata/sata_fsl.c +1 −8
drivers/ata/sata_nv.c +0 −3
drivers/atm/iphase.c +1 −1
drivers/atm/zatm.c +2 −0
drivers/base/Makefile +0 −3
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drivers/base/dd.c +0 −8
drivers/base/power/domain.c +12 −11
drivers/block/drbd/drbd_req.c +2 −2
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drivers/block/zram/zram_drv.c +14 −1
drivers/bluetooth/hci_nokia.c +1 −1
drivers/bus/ti-sysc.c +4 −4
drivers/char/agp/alpha-agp.c +1 −1
drivers/char/agp/amd64-agp.c +2 −2
drivers/char/hw_random/core.c +9 −2
drivers/char/ipmi/ipmi_si_intf.c +4 −2
drivers/char/ipmi/kcs_bmc.c +10 −21
drivers/char/mem.c +1 −0
drivers/char/random.c +22 −17
drivers/clk/Makefile +1 −1
drivers/clk/clk-aspeed.c +44 −15
drivers/clk/clk.c +1 −2
drivers/clk/davinci/da8xx-cfgchip.c +1 −1
drivers/clk/davinci/psc.h +1 −1
drivers/clk/meson/clk-audio-divider.c +1 −1
drivers/clk/meson/gxbb.c +1 −0
drivers/clk/mvebu/armada-37xx-periph.c +38 −0
drivers/clk/qcom/gcc-msm8996.c +1 −0
drivers/clk/qcom/mmcc-msm8996.c +1 −0
drivers/clk/sunxi-ng/Makefile +15 −24
drivers/clocksource/arm_arch_timer.c +1 −1
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tools/testing/selftests/static_keys/test_static_keys.sh +13 −0
tools/testing/selftests/sync/config +4 −0
tools/testing/selftests/sysctl/sysctl.sh +13 −7
tools/testing/selftests/user/test_user_copy.sh +7 −0
tools/testing/selftests/vm/compaction_test.c +3 −1
tools/testing/selftests/vm/mlock2-tests.c +7 −5
tools/testing/selftests/vm/run_vmtests +4 −1
tools/testing/selftests/vm/userfaultfd.c +3 −1
tools/testing/selftests/x86/sigreturn.c +36 −23
tools/testing/selftests/zram/zram.sh +4 −1
tools/testing/selftests/zram/zram_lib.sh +4 −1
tools/usb/ffs-test.c +16 −3
tools/virtio/asm/barrier.h +2 −2
tools/virtio/linux/kernel.h +5 −0
tools/virtio/linux/scatterlist.h +0 −18
virt/kvm/Kconfig +1 −1
virt/kvm/arm/mmu.c +2 −0
virt/kvm/arm/vgic/vgic-v3.c +0 −5
virt/kvm/eventfd.c +11 −6
virt/kvm/kvm_main.c +9 −10

Documentation/admin-guide/kernel-parameters.txt+5−0

@@ -4846,3 +4846,8 @@ · 4845 unmodified lines
4846	4846	xirc2ps_cs= [NET,PCMCIA]
4847	4847	Format:
4848	4848	<irq>,<irq_mask>,<io>,<full_duplex>,<do_sound>,<lockup_hack>[,<irq2>[,<irq3>[,<irq4>]]]
	4849	+
	4850	+ xhci-hcd.quirks [USB,KNL]
	4851	+ A hex value specifying bitmask with supplemental xhci
	4852	+ host controller quirks. Meaning of each bit can be
	4853	+ consulted in header drivers/usb/host/xhci.h.

Documentation/admin-guide/pm/intel_pstate.rst+13−3

@@ -324,8 +324,7 @@ Global Attributes · 323 unmodified lines
324	324
325	325	``intel_pstate`` exposes several global attributes (files) in ``sysfs`` to
326	326	control its functionality at the system level. They are located in the
327		−``/sys/devices/system/cpu/cpufreq/intel_pstate/`` directory and affect all
328		−CPUs.
	327	+``/sys/devices/system/cpu/intel_pstate/`` directory and affect all CPUs.
329	328
330	329	Some of them are not present if the ``intel_pstate=per_cpu_perf_limits``
331	330	argument is passed to the kernel in the command line.
@@ -379,6 +378,17 @@ argument is passed to the kernel in the command line. · 47 unmodified lines
379	378	but it affects the maximum possible value of per-policy P-state limits
380	379	(see `Interpretation of Policy Attributes`_ below for details).
381	380
	381	+``hwp_dynamic_boost``
	382	+ This attribute is only present if ``intel_pstate`` works in the
	383	+ `active mode with the HWP feature enabled <Active Mode With HWP_>`_ in
	384	+ the processor. If set (equal to 1), it causes the minimum P-state limit
	385	+ to be increased dynamically for a short time whenever a task previously
	386	+ waiting on I/O is selected to run on a given logical CPU (the purpose
	387	+ of this mechanism is to improve performance).
	388	+
	389	+ This setting has no effect on logical CPUs whose minimum P-state limit
	390	+ is directly set to the highest non-turbo P-state or above it.
	391	+
382	392	.. _status_attr:
383	393
384	394	``status``
@@ -410,7 +420,7 @@ argument is passed to the kernel in the command line. · 25 unmodified lines
410	420	That only is supported in some configurations, though (for example, if
411	421	the `HWP feature is enabled in the processor <Active Mode With HWP_>`_,
412	422	the operation mode of the driver cannot be changed), and if it is not
413		− supported in the current configuration, writes to this attribute with
	423	+ supported in the current configuration, writes to this attribute will
414	424	fail with an appropriate error.
415	425
416	426	Interpretation of Policy Attributes

Documentation/core-api/kernel-api.rst+1−1

@@ -284,7 +284,7 @@ Resources Management · 283 unmodified lines
284	284	MTRR Handling
285	285	-------------
286	286
287		−.. kernel-doc:: arch/x86/kernel/cpu/mtrr/main.c
	287	+.. kernel-doc:: arch/x86/kernel/cpu/mtrr/mtrr.c
288	288	:export:
289	289
290	290	Security Framework

Documentation/device-mapper/writecache.txt+2−0

@@ -15,6 +15,8 @@ Constructor parameters: · 14 unmodified lines
15	15	size)
16	16	5. the number of optional parameters (the parameters with an argument
17	17	count as two)
	18	+ start_sector n (default: 0)
	19	+ offset from the start of cache device in 512-byte sectors
18	20	high_watermark n (default: 50)
19	21	start writeback when the number of used blocks reach this
20	22	watermark

Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt+1−1

@@ -66,7 +66,7 @@ Required root node properties: · 65 unmodified lines
66	66	- "insignal,arndale-octa" - for Exynos5420-based Insignal Arndale
67	67	Octa board.
68	68	- "insignal,origen" - for Exynos4210-based Insignal Origen board.
69		− - "insignal,origen4412 - for Exynos4412-based Insignal Origen board.
	69	+ - "insignal,origen4412" - for Exynos4412-based Insignal Origen board.
70	70
71	71
72	72	Optional nodes:

Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt+1−1

@@ -36,7 +36,7 @@ Optional nodes: · 35 unmodified lines
36	36
37	37	- port/ports: to describe a connection to an external encoder. The
38	38	binding follows Documentation/devicetree/bindings/graph.txt and
39		− suppors a single port with a single endpoint.
	39	+ supports a single port with a single endpoint.
40	40
41	41	- See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and
42	42	Documentation/devicetree/bindings/display/tilcdc/tfp410.txt for connecting

Documentation/devicetree/bindings/gpio/nintendo,hollywood-gpio.txt+1−1

@@ -1,7 +1,7 @@
1	1	Nintendo Wii (Hollywood) GPIO controller
2	2
3	3	Required properties:
4		−- compatible: "nintendo,hollywood-gpio
	4	+- compatible: "nintendo,hollywood-gpio"
5	5	- reg: Physical base address and length of the controller's registers.
6	6	- gpio-controller: Marks the device node as a GPIO controller.
7	7	- #gpio-cells: Should be <2>. The first cell is the pin number and the

Documentation/devicetree/bindings/input/sprd,sc27xx-vibra.txt+23−0

@@ -0,0 +1,23 @@
	1	+Spreadtrum SC27xx PMIC Vibrator
	2	+
	3	+Required properties:
	4	+- compatible: should be "sprd,sc2731-vibrator".
	5	+- reg: address of vibrator control register.
	6	+
	7	+Example :
	8	+
	9	+ sc2731_pmic: pmic@0 {
	10	+ compatible = "sprd,sc2731";
	11	+ reg = <0>;
	12	+ spi-max-frequency = <26000000>;
	13	+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
	14	+ interrupt-controller;
	15	+ #interrupt-cells = <2>;
	16	+ #address-cells = <1>;
	17	+ #size-cells = <0>;
	18	+
	19	+ vibrator@eb4 {
	20	+ compatible = "sprd,sc2731-vibrator";
	21	+ reg = <0xeb4>;
	22	+ };
	23	+ };

Documentation/devicetree/bindings/input/touchscreen/hideep.txt+1−1

@@ -32,7 +32,7 @@ i2c@00000000 { · 31 unmodified lines
32	32	reg = <0x6c>;
33	33	interrupt-parent = <&gpx1>;
34	34	interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
35		− vdd-supply = <&ldo15_reg>";
	35	+ vdd-supply = <&ldo15_reg>;
36	36	vid-supply = <&ldo18_reg>;
37	37	reset-gpios = <&gpx1 5 0>;
38	38	touchscreen-size-x = <1080>;

Documentation/devicetree/bindings/interrupt-controller/nvidia,tegra20-ictlr.txt+1−1

@@ -15,7 +15,7 @@ Required properties: · 14 unmodified lines
15	15	include "nvidia,tegra30-ictlr".
16	16	- reg : Specifies base physical address and size of the registers.
17	17	Each controller must be described separately (Tegra20 has 4 of them,
18		− whereas Tegra30 and later have 5"
	18	+ whereas Tegra30 and later have 5).
19	19	- interrupt-controller : Identifies the node as an interrupt controller.
20	20	- #interrupt-cells : Specifies the number of cells needed to encode an
21	21	interrupt source. The value must be 3.

Documentation/devicetree/bindings/interrupt-controller/st,stm32-exti.txt+1−1

@@ -12,7 +12,7 @@ Required properties: · 11 unmodified lines
12	12	specifier, shall be 2
13	13	- interrupts: interrupts references to primary interrupt controller
14	14	(only needed for exti controller with multiple exti under
15		− same parent interrupt: st,stm32-exti and st,stm32h7-exti")
	15	+ same parent interrupt: st,stm32-exti and st,stm32h7-exti)
16	16
17	17	Example:
18	18

Documentation/devicetree/bindings/mips/brcm/soc.txt+1−1

@@ -152,7 +152,7 @@ Required properties: · 151 unmodified lines
152	152	- compatible : should contain one of:
153	153	"brcm,bcm7425-timers"
154	154	"brcm,bcm7429-timers"
155		− "brcm,bcm7435-timers and
	155	+ "brcm,bcm7435-timers" and
156	156	"brcm,brcmstb-timers"
157	157	- reg : the timers register range
158	158	- interrupts : the interrupt line for this timer block

Documentation/devicetree/bindings/net/fsl-fman.txt+1−1

@@ -238,7 +238,7 @@ PROPERTIES · 237 unmodified lines
238	238	Must include one of the following:
239	239	- "fsl,fman-dtsec" for dTSEC MAC
240	240	- "fsl,fman-xgec" for XGEC MAC
241		− - "fsl,fman-memac for mEMAC MAC
	241	+ - "fsl,fman-memac" for mEMAC MAC
242	242
243	243	- cell-index
244	244	Usage: required

Documentation/devicetree/bindings/power/power_domain.txt+1−1

@@ -133,7 +133,7 @@ located inside a PM domain with index 0 of a power controller represented by a · 132 unmodified lines
133	133	node with the label "power".
134	134	In the second example the consumer device are partitioned across two PM domains,
135	135	the first with index 0 and the second with index 1, of a power controller that
136		−is represented by a node with the label "power.
	136	+is represented by a node with the label "power".
137	137
138	138	Optional properties:
139	139	- required-opps: This contains phandle to an OPP node in another device's OPP

Documentation/devicetree/bindings/regulator/tps65090.txt+1−1

@@ -16,7 +16,7 @@ Required properties: · 15 unmodified lines
16	16	Optional properties:
17	17	- ti,enable-ext-control: This is applicable for DCDC1, DCDC2 and DCDC3.
18	18	If DCDCs are externally controlled then this property should be there.
19		−- "dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3.
	19	+- dcdc-ext-control-gpios: This is applicable for DCDC1, DCDC2 and DCDC3.
20	20	If DCDCs are externally controlled and if it is from GPIO then GPIO
21	21	number should be provided. If it is externally controlled and no GPIO
22	22	entry then driver will just configure this rails as external control

Documentation/devicetree/bindings/reset/st,sti-softreset.txt+1−1

@@ -15,7 +15,7 @@ Please refer to reset.txt in this directory for common reset · 14 unmodified lines
15	15	controller binding usage.
16	16
17	17	Required properties:
18		−- compatible: Should be st,stih407-softreset";
	18	+- compatible: Should be "st,stih407-softreset";
19	19	- #reset-cells: 1, see below
20	20
21	21	example:

Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt+1−1

@@ -39,7 +39,7 @@ Required properties: · 38 unmodified lines
39	39
40	40	Optional property:
41	41	- clock-frequency: Desired I2C bus clock frequency in Hz.
42		− When missing default to 400000Hz.
	42	+ When missing default to 100000Hz.
43	43
44	44	Child nodes should conform to I2C bus binding as described in i2c.txt.
45	45

Documentation/devicetree/bindings/sound/qcom,apq8016-sbc.txt+1−1

@@ -30,7 +30,7 @@ Required properties: · 29 unmodified lines
30	30
31	31	Board connectors:
32	32	* Headset Mic
33		− * Secondary Mic",
	33	+ * Secondary Mic
34	34	* DMIC
35	35	* Ext Spk
36	36

Documentation/devicetree/bindings/sound/qcom,apq8096.txt+1−1

@@ -35,7 +35,7 @@ This binding describes the APQ8096 sound card, which uses qdsp for audio. · 34 unmodified lines
35	35	"Digital Mic3"
36	36
37	37	Audio pins and MicBias on WCD9335 Codec:
38		− "MIC_BIAS1
	38	+ "MIC_BIAS1"
39	39	"MIC_BIAS2"
40	40	"MIC_BIAS3"
41	41	"MIC_BIAS4"

Documentation/devicetree/bindings/usb/rockchip,dwc3.txt+2−1

@@ -16,7 +16,8 @@ A child node must exist to represent the core DWC3 IP block. The name of · 15 unmodified lines
16	16	the node is not important. The content of the node is defined in dwc3.txt.
17	17
18	18	Phy documentation is provided in the following places:
19		−Documentation/devicetree/bindings/phy/qcom-dwc3-usb-phy.txt
	19	+Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.txt - USB2.0 PHY
	20	+Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt - Type-C PHY
20	21
21	22	Example device nodes:
22	23

Documentation/devicetree/bindings/w1/w1-gpio.txt+1−1

@@ -15,7 +15,7 @@ Optional properties: · 14 unmodified lines
15	15
16	16	Examples:
17	17
18		− onewire@0 {
	18	+ onewire {
19	19	compatible = "w1-gpio";
20	20	gpios = <&gpio 126 0>, <&gpio 105 0>;
21	21	};

Documentation/driver-api/infrastructure.rst+2−2

@@ -49,10 +49,10 @@ Device Drivers Base · 48 unmodified lines
49	49	Device Drivers DMA Management
50	50	-----------------------------
51	51
52		−.. kernel-doc:: drivers/base/dma-coherent.c
	52	+.. kernel-doc:: kernel/dma/coherent.c
53	53	:export:
54	54
55		−.. kernel-doc:: drivers/base/dma-mapping.c
	55	+.. kernel-doc:: kernel/dma/mapping.c
56	56	:export:
57	57
58	58	Device drivers PnP support

Documentation/filesystems/Locking+1−6

@@ -441,8 +441,6 @@ prototypes: · 440 unmodified lines
441	441	int (iterate) (struct file , struct dir_context *);
442	442	int (iterate_shared) (struct file , struct dir_context *);
443	443	__poll_t (poll) (struct file , struct poll_table_struct *);
444		− struct wait_queue_head * (get_poll_head)(struct file , __poll_t);
445		− __poll_t (poll_mask) (struct file , __poll_t);
446	444	long (unlocked_ioctl) (struct file , unsigned int, unsigned long);
447	445	long (compat_ioctl) (struct file , unsigned int, unsigned long);
448	446	int (mmap) (struct file , struct vm_area_struct *);
@@ -473,7 +471,7 @@ prototypes: · 24 unmodified lines
473	471	};
474	472
475	473	locking rules:
476		− All except for ->poll_mask may block.
	474	+ All may block.
477	475
478	476	->llseek() locking has moved from llseek to the individual llseek
479	477	implementations. If your fs is not using generic_file_llseek, you
@@ -505,9 +503,6 @@ in sys_read() and friends. · 25 unmodified lines
505	503	the lease within the individual filesystem to record the result of the
506	504	operation
507	505
508		−->poll_mask can be called with or without the waitqueue lock for the waitqueue
509		−returned from ->get_poll_head.
510		−
511	506	--------------------------- dquot_operations -------------------------------
512	507	prototypes:
513	508	int (write_dquot) (struct dquot );

Documentation/filesystems/cifs/AUTHORS+4−3

@@ -42,9 +42,11 @@ Jeff Layton (many, many fixes, as well as great work on the cifs Kerberos code) · 41 unmodified lines
42	42	Scott Lovenberg
43	43	Pavel Shilovsky (for great work adding SMB2 support, and various SMB3 features)
44	44	Aurelien Aptel (for DFS SMB3 work and some key bug fixes)
45		−Ronnie Sahlberg (for SMB3 xattr work and bug fixes)
	45	+Ronnie Sahlberg (for SMB3 xattr work, bug fixes, and lots of great work on compounding)
46	46	Shirish Pargaonkar (for many ACL patches over the years)
47	47	Sachin Prabhu (many bug fixes, including for reconnect, copy offload and security)
	48	+Paulo Alcantara
	49	+Long Li (some great work on RDMA, SMB Direct)
48	50
49	51
50	52	Test case and Bug Report contributors
@@ -58,5 +60,4 @@ mention to the Stanford Checker (SWAT) which pointed out many minor · 7 unmodified lines
58	60	bugs in error paths. Valuable suggestions also have come from Al Viro
59	61	and Dave Miller.
60	62
61		−And thanks to the IBM LTC and Power test teams and SuSE testers for
62		−finding multiple bugs during excellent stress test runs.
	63	+And thanks to the IBM LTC and Power test teams and SuSE and Citrix and RedHat testers for finding multiple bugs during excellent stress test runs.

Documentation/filesystems/cifs/CHANGES+3−0

@@ -1,3 +1,6 @@
	1	+See https://wiki.samba.org/index.php/LinuxCIFSKernel for
	2	+more current information.
	3	+
1	4	Version 1.62
2	5	------------
3	6	Add sockopt=TCP_NODELAY mount option. EA (xattr) routines hardened

Documentation/filesystems/cifs/TODO+9−8

@@ -9,14 +9,14 @@ is a partial list of the known problems and missing features: · 8 unmodified lines
9	9
10	10	a) SMB3 (and SMB3.02) missing optional features:
11	11	- multichannel (started), integration with RDMA
12		− - directory leases (improved metadata caching)
13		− - T10 copy offload (copy chunk, and "Duplicate Extents" ioctl
	12	+ - directory leases (improved metadata caching), started (root dir only)
	13	+ - T10 copy offload ie "ODX" (copy chunk, and "Duplicate Extents" ioctl
14	14	currently the only two server side copy mechanisms supported)
15	15
16	16	b) improved sparse file support
17	17
18	18	c) Directory entry caching relies on a 1 second timer, rather than
19		−using Directory Leases
	19	+using Directory Leases, currently only the root file handle is cached longer
20	20
21	21	d) quota support (needs minor kernel change since quota calls
22	22	to make it to network filesystems or deviceless filesystems)
@@ -42,6 +42,8 @@ mount or a per server basis to client UIDs or nobody if no mapping · 19 unmodified lines
42	42	exists. Also better integration with winbind for resolving SID owners
43	43
44	44	k) Add tools to take advantage of more smb3 specific ioctls and features
	45	+(passthrough ioctl/fsctl for sending various SMB3 fsctls to the server
	46	+is in progress)
45	47
46	48	l) encrypted file support
47	49
@@ -71,9 +73,8 @@ t) split cifs and smb3 support into separate modules so legacy (and less · 23 unmodified lines
71	73	secure) CIFS dialect can be disabled in environments that don't need it
72	74	and simplify the code.
73	75
74		−u) Finish up SMB3.1.1 dialect support
75		−
76		−v) POSIX Extensions for SMB3.1.1
	76	+v) POSIX Extensions for SMB3.1.1 (started, create and mkdir support added
	77	+so far).
77	78
78	79	KNOWN BUGS
79	80	====================================
@@ -92,8 +93,8 @@ Misc testing to do · 12 unmodified lines
92	93	1) check out max path names and max path name components against various server
93	94	types. Try nested symlinks (8 deep). Return max path name in stat -f information
94	95
95		−2) Improve xfstest's cifs enablement and adapt xfstests where needed to test
96		−cifs better
	96	+2) Improve xfstest's cifs/smb3 enablement and adapt xfstests where needed to test
	97	+cifs/smb3 better
97	98
98	99	3) Additional performance testing and optimization using iozone and similar -
99	100	there are some easy changes that can be done to parallelize sequential writes,

Documentation/filesystems/vfs.txt+0−13

@@ -857,8 +857,6 @@ struct file_operations { · 856 unmodified lines
857	857	ssize_t (write_iter) (struct kiocb , struct iov_iter *);
858	858	int (iterate) (struct file , struct dir_context *);
859	859	__poll_t (poll) (struct file , struct poll_table_struct *);
860		− struct wait_queue_head * (get_poll_head)(struct file , __poll_t);
861		− __poll_t (poll_mask) (struct file , __poll_t);
862	860	long (unlocked_ioctl) (struct file , unsigned int, unsigned long);
863	861	long (compat_ioctl) (struct file , unsigned int, unsigned long);
864	862	int (mmap) (struct file , struct vm_area_struct *);
@@ -903,17 +901,6 @@ otherwise noted. · 38 unmodified lines
903	901	activity on this file and (optionally) go to sleep until there
904	902	is activity. Called by the select(2) and poll(2) system calls
905	903
906		− get_poll_head: Returns the struct wait_queue_head that callers can
907		− wait on. Callers need to check the returned events using ->poll_mask
908		− once woken. Can return NULL to indicate polling is not supported,
909		− or any error code using the ERR_PTR convention to indicate that a
910		− grave error occured and ->poll_mask shall not be called.
911		−
912		− poll_mask: return the mask of EPOLL* values describing the file descriptor
913		− state. Called either before going to sleep on the waitqueue returned by
914		− get_poll_head, or after it has been woken. If ->get_poll_head and
915		− ->poll_mask are implemented ->poll does not need to be implement.
916		−
917	904	unlocked_ioctl: called by the ioctl(2) system call.
918	905
919	906	compat_ioctl: called by the ioctl(2) system call when 32 bit system calls

Documentation/kbuild/kbuild.txt+7−10

@@ -50,6 +50,11 @@ LDFLAGS_MODULE · 49 unmodified lines
50	50	--------------------------------------------------
51	51	Additional options used for $(LD) when linking modules.
52	52
	53	+KBUILD_KCONFIG
	54	+--------------------------------------------------
	55	+Set the top-level Kconfig file to the value of this environment
	56	+variable. The default name is "Kconfig".
	57	+
53	58	KBUILD_VERBOSE
54	59	--------------------------------------------------
55	60	Set the kbuild verbosity. Can be assigned same values as "V=...".
@@ -88,7 +93,8 @@ In most cases the name of the architecture is the same as the · 32 unmodified lines
88	93	directory name found in the arch/ directory.
89	94	But some architectures such as x86 and sparc have aliases.
90	95	x86: i386 for 32 bit, x86_64 for 64 bit
91		−sparc: sparc for 32 bit, sparc64 for 64 bit
	96	+sh: sh for 32 bit, sh64 for 64 bit
	97	+sparc: sparc32 for 32 bit, sparc64 for 64 bit
92	98
93	99	CROSS_COMPILE
94	100	--------------------------------------------------
@@ -148,15 +154,6 @@ stripped after they are installed. If INSTALL_MOD_STRIP is '1', then · 53 unmodified lines
148	154	the default option --strip-debug will be used. Otherwise,
149	155	INSTALL_MOD_STRIP value will be used as the options to the strip command.
150	156
151		−INSTALL_FW_PATH
152		−--------------------------------------------------
153		−INSTALL_FW_PATH specifies where to install the firmware blobs.
154		−The default value is:
155		−
156		− $(INSTALL_MOD_PATH)/lib/firmware
157		−
158		−The value can be overridden in which case the default value is ignored.
159		−
160	157	INSTALL_HDR_PATH
161	158	--------------------------------------------------
162	159	INSTALL_HDR_PATH specifies where to install user space headers when

Documentation/kbuild/kconfig-language.txt+6−0

@@ -430,6 +430,12 @@ This sets the config program's title bar if the config program chooses · 429 unmodified lines
430	430	to use it. It should be placed at the top of the configuration, before any
431	431	other statement.
432	432
	433	+'#' Kconfig source file comment:
	434	+
	435	+An unquoted '#' character anywhere in a source file line indicates
	436	+the beginning of a source file comment. The remainder of that line
	437	+is a comment.
	438	+
433	439
434	440	Kconfig hints
435	441	-------------

Documentation/kbuild/kconfig.txt+43−8

@@ -2,9 +2,9 @@ This file contains some assistance for using "make *config". · 1 unmodified line
2	2
3	3	Use "make help" to list all of the possible configuration targets.
4	4
5		−The xconfig ('qconf') and menuconfig ('mconf') programs also
6		−have embedded help text. Be sure to check it for navigation,
7		−search, and other general help text.
	5	+The xconfig ('qconf'), menuconfig ('mconf'), and nconfig ('nconf')
	6	+programs also have embedded help text. Be sure to check that for
	7	+navigation, search, and other general help text.
8	8
9	9	======================================================================
10	10	General
@@ -17,13 +17,16 @@ this happens, using a previously working .config file and running · 6 unmodified lines
17	17	for you, so you may find that you need to see what NEW kernel
18	18	symbols have been introduced.
19	19
20		−To see a list of new config symbols when using "make oldconfig", use
	20	+To see a list of new config symbols, use
21	21
22	22	cp user/some/old.config .config
23	23	make listnewconfig
24	24
25	25	and the config program will list any new symbols, one per line.
26	26
	27	+Alternatively, you can use the brute force method:
	28	+
	29	+ make oldconfig
27	30	scripts/diffconfig .config.old .config \| less
28	31
29	32	______________________________________________________________________
@@ -160,7 +163,7 @@ Searching in menuconfig: · 130 unmodified lines
160	163	This lists all config symbols that contain "hotplug",
161	164	e.g., HOTPLUG_CPU, MEMORY_HOTPLUG.
162	165
163		− For search help, enter / followed TAB-TAB-TAB (to highlight
	166	+ For search help, enter / followed by TAB-TAB (to highlight
164	167	<Help>) and Enter. This will tell you that you can also use
165	168	regular expressions (regexes) in the search string, so if you
166	169	are not interested in MEMORY_HOTPLUG, you could try
@@ -202,6 +205,39 @@ Example: · 35 unmodified lines
202	205	make MENUCONFIG_MODE=single_menu menuconfig
203	206
204	207
	208	+======================================================================
	209	+nconfig
	210	+--------------------------------------------------
	211	+
	212	+nconfig is an alternate text-based configurator. It lists function
	213	+keys across the bottom of the terminal (window) that execute commands.
	214	+You can also just use the corresponding numeric key to execute the
	215	+commands unless you are in a data entry window. E.g., instead of F6
	216	+for Save, you can just press 6.
	217	+
	218	+Use F1 for Global help or F3 for the Short help menu.
	219	+
	220	+Searching in nconfig:
	221	+
	222	+ You can search either in the menu entry "prompt" strings
	223	+ or in the configuration symbols.
	224	+
	225	+ Use / to begin a search through the menu entries. This does
	226	+ not support regular expressions. Use <Down> or <Up> for
	227	+ Next hit and Previous hit, respectively. Use <Esc> to
	228	+ terminate the search mode.
	229	+
	230	+ F8 (SymSearch) searches the configuration symbols for the
	231	+ given string or regular expression (regex).
	232	+
	233	+NCONFIG_MODE
	234	+--------------------------------------------------
	235	+This mode shows all sub-menus in one large tree.
	236	+
	237	+Example:
	238	+ make NCONFIG_MODE=single_menu nconfig
	239	+
	240	+
205	241	======================================================================
206	242	xconfig
207	243	--------------------------------------------------
@@ -230,8 +266,7 @@ gconfig · 22 unmodified lines
230	266
231	267	Searching in gconfig:
232	268
233		− None (gconfig isn't maintained as well as xconfig or menuconfig);
234		− however, gconfig does have a few more viewing choices than
235		− xconfig does.
	269	+ There is no search command in gconfig. However, gconfig does
	270	+ have several different viewing choices, modes, and options.
236	271
237	272	###

Documentation/networking/bonding.txt+1−1

@@ -1490,7 +1490,7 @@ To remove an ARP target: · 1489 unmodified lines
1490	1490
1491	1491	To configure the interval between learning packet transmits:
1492	1492	# echo 12 > /sys/class/net/bond0/bonding/lp_interval
1493		− NOTE: the lp_inteval is the number of seconds between instances where
	1493	+ NOTE: the lp_interval is the number of seconds between instances where
1494	1494	the bonding driver sends learning packets to each slaves peer switch. The
1495	1495	default interval is 1 second.
1496	1496

Documentation/networking/dpaa2/overview.rst+1−0

@@ -1,5 +1,6 @@
1	1	.. include:: <isonum.txt>
2	2
	3	+=========================================================
3	4	DPAA2 (Data Path Acceleration Architecture Gen2) Overview
4	5	=========================================================
5	6

Documentation/networking/e100.rst+70−61

@@ -1,3 +1,4 @@
	1	+==============================================================
1	2	Linux* Base Driver for the Intel(R) PRO/100 Family of Adapters
2	3	==============================================================
3	4
@@ -46,123 +47,131 @@ Driver Configuration Parameters · 42 unmodified lines
46	47	The default value for each parameter is generally the recommended setting,
47	48	unless otherwise noted.
48	49
49		−Rx Descriptors: Number of receive descriptors. A receive descriptor is a data
	50	+Rx Descriptors:
	51	+ Number of receive descriptors. A receive descriptor is a data
50	52	structure that describes a receive buffer and its attributes to the network
51	53	controller. The data in the descriptor is used by the controller to write
52	54	data from the controller to host memory. In the 3.x.x driver the valid range
53	55	for this parameter is 64-256. The default value is 256. This parameter can be
54	56	changed using the command::
55	57
56		− ethtool -G eth? rx n
	58	+ ethtool -G eth? rx n
57	59
58	60	Where n is the number of desired Rx descriptors.
59	61
60		−Tx Descriptors: Number of transmit descriptors. A transmit descriptor is a data
	62	+Tx Descriptors:
	63	+ Number of transmit descriptors. A transmit descriptor is a data
61	64	structure that describes a transmit buffer and its attributes to the network
62	65	controller. The data in the descriptor is used by the controller to read
63	66	data from the host memory to the controller. In the 3.x.x driver the valid
64	67	range for this parameter is 64-256. The default value is 128. This parameter
65	68	can be changed using the command::
66	69
67		− ethtool -G eth? tx n
	70	+ ethtool -G eth? tx n
68	71
69	72	Where n is the number of desired Tx descriptors.
70	73
71		−Speed/Duplex: The driver auto-negotiates the link speed and duplex settings by
	74	+Speed/Duplex:
	75	+ The driver auto-negotiates the link speed and duplex settings by
72	76	default. The ethtool utility can be used as follows to force speed/duplex.::
73	77
74		− ethtool -s eth? autoneg off speed {10\|100} duplex {full\|half}
	78	+ ethtool -s eth? autoneg off speed {10\|100} duplex {full\|half}
75	79
76	80	NOTE: setting the speed/duplex to incorrect values will cause the link to
77	81	fail.
78	82
79		−Event Log Message Level: The driver uses the message level flag to log events
	83	+Event Log Message Level:
	84	+ The driver uses the message level flag to log events
80	85	to syslog. The message level can be set at driver load time. It can also be
81	86	set using the command::
82	87
83		− ethtool -s eth? msglvl n
	88	+ ethtool -s eth? msglvl n
84	89
85	90
86	91	Additional Configurations
87	92	=========================
88	93
89		− Configuring the Driver on Different Distributions
90		− -------------------------------------------------
	94	+Configuring the Driver on Different Distributions
	95	+-------------------------------------------------
91	96
92		− Configuring a network driver to load properly when the system is started is
93		− distribution dependent. Typically, the configuration process involves adding
94		− an alias line to /etc/modprobe.d/*.conf as well as editing other system
95		− startup scripts and/or configuration files. Many popular Linux
96		− distributions ship with tools to make these changes for you. To learn the
97		− proper way to configure a network device for your system, refer to your
98		− distribution documentation. If during this process you are asked for the
99		− driver or module name, the name for the Linux Base Driver for the Intel
100		− PRO/100 Family of Adapters is e100.
	97	+Configuring a network driver to load properly when the system is started
	98	+is distribution dependent. Typically, the configuration process involves
	99	+adding an alias line to `/etc/modprobe.d/*.conf` as well as editing other
	100	+system startup scripts and/or configuration files. Many popular Linux
	101	+distributions ship with tools to make these changes for you. To learn
	102	+the proper way to configure a network device for your system, refer to
	103	+your distribution documentation. If during this process you are asked
	104	+for the driver or module name, the name for the Linux Base Driver for
	105	+the Intel PRO/100 Family of Adapters is e100.
101	106
102		− As an example, if you install the e100 driver for two PRO/100 adapters
103		− (eth0 and eth1), add the following to a configuration file in /etc/modprobe.d/
	107	+As an example, if you install the e100 driver for two PRO/100 adapters
	108	+(eth0 and eth1), add the following to a configuration file in
	109	+/etc/modprobe.d/::
104	110
105	111	alias eth0 e100
106	112	alias eth1 e100
107	113
108		− Viewing Link Messages
109		− ---------------------
110		− In order to see link messages and other Intel driver information on your
111		− console, you must set the dmesg level up to six. This can be done by
112		− entering the following on the command line before loading the e100 driver::
	114	+Viewing Link Messages
	115	+---------------------
	116	+
	117	+In order to see link messages and other Intel driver information on your
	118	+console, you must set the dmesg level up to six. This can be done by
	119	+entering the following on the command line before loading the e100
	120	+driver::
113	121
114	122	dmesg -n 6
115	123
116		− If you wish to see all messages issued by the driver, including debug
117		− messages, set the dmesg level to eight.
	124	+If you wish to see all messages issued by the driver, including debug
	125	+messages, set the dmesg level to eight.
118	126
119		− NOTE: This setting is not saved across reboots.
	127	+NOTE: This setting is not saved across reboots.
120	128
	129	+ethtool
	130	+-------
121	131
122		− ethtool
123		− -------
	132	+The driver utilizes the ethtool interface for driver configuration and
	133	+diagnostics, as well as displaying statistical information. The ethtool
	134	+version 1.6 or later is required for this functionality.
124	135
125		− The driver utilizes the ethtool interface for driver configuration and
126		− diagnostics, as well as displaying statistical information. The ethtool
127		− version 1.6 or later is required for this functionality.
	136	+The latest release of ethtool can be found from
	137	+https://www.kernel.org/pub/software/network/ethtool/
128	138
129		− The latest release of ethtool can be found from
130		− https://www.kernel.org/pub/software/network/ethtool/
	139	+Enabling Wake on LAN* (WoL)
	140	+---------------------------
	141	+WoL is provided through the ethtool* utility. For instructions on
	142	+enabling WoL with ethtool, refer to the ethtool man page. WoL will be
	143	+enabled on the system during the next shut down or reboot. For this
	144	+driver version, in order to enable WoL, the e100 driver must be loaded
	145	+when shutting down or rebooting the system.
131	146
132		− Enabling Wake on LAN* (WoL)
133		− ---------------------------
134		− WoL is provided through the ethtool* utility. For instructions on enabling
135		− WoL with ethtool, refer to the ethtool man page.
	147	+NAPI
	148	+----
136	149
137		− WoL will be enabled on the system during the next shut down or reboot. For
138		− this driver version, in order to enable WoL, the e100 driver must be
139		− loaded when shutting down or rebooting the system.
	150	+NAPI (Rx polling mode) is supported in the e100 driver.
140	151
141		− NAPI
142		− ----
	152	+See https://wiki.linuxfoundation.org/networking/napi for more
	153	+information on NAPI.
143	154
144		− NAPI (Rx polling mode) is supported in the e100 driver.
	155	+Multiple Interfaces on Same Ethernet Broadcast Network
	156	+------------------------------------------------------
145	157
146		− See https://wiki.linuxfoundation.org/networking/napi for more information
147		− on NAPI.
	158	+Due to the default ARP behavior on Linux, it is not possible to have one
	159	+system on two IP networks in the same Ethernet broadcast domain
	160	+(non-partitioned switch) behave as expected. All Ethernet interfaces
	161	+will respond to IP traffic for any IP address assigned to the system.
	162	+This results in unbalanced receive traffic.
148	163
149		− Multiple Interfaces on Same Ethernet Broadcast Network
150		− ------------------------------------------------------
	164	+If you have multiple interfaces in a server, either turn on ARP
	165	+filtering by
151	166
152		− Due to the default ARP behavior on Linux, it is not possible to have
153		− one system on two IP networks in the same Ethernet broadcast domain
154		− (non-partitioned switch) behave as expected. All Ethernet interfaces
155		− will respond to IP traffic for any IP address assigned to the system.
156		− This results in unbalanced receive traffic.
	167	+(1) entering::
157	168
158		− If you have multiple interfaces in a server, either turn on ARP
159		− filtering by
	169	+ echo 1 > /proc/sys/net/ipv4/conf/all/arp_filter
160	170
161		− (1) entering:: echo 1 > /proc/sys/net/ipv4/conf/all/arp_filter
162		− (this only works if your kernel's version is higher than 2.4.5), or
	171	+ (this only works if your kernel's version is higher than 2.4.5), or
163	172
164		− (2) installing the interfaces in separate broadcast domains (either
165		− in different switches or in a switch partitioned to VLANs).
	173	+(2) installing the interfaces in separate broadcast domains (either
	174	+ in different switches or in a switch partitioned to VLANs).
166	175
167	176
168	177	Support

Documentation/networking/e1000.rst+94−55

@@ -1,3 +1,4 @@
	1	+===========================================================
1	2	Linux* Base Driver for Intel(R) Ethernet Network Connection
2	3	===========================================================
3	4
@@ -33,7 +34,8 @@ Command Line Parameters · 29 unmodified lines
33	34	The default value for each parameter is generally the recommended setting,
34	35	unless otherwise noted.
35	36
36		−NOTES: For more information about the AutoNeg, Duplex, and Speed
	37	+NOTES:
	38	+ For more information about the AutoNeg, Duplex, and Speed
37	39	parameters, see the "Speed and Duplex Configuration" section in
38	40	this document.
39	41
@@ -44,22 +46,27 @@ NOTES: For more information about the AutoNeg, Duplex, and Speed · 4 unmodified lines
44	46
45	47	AutoNeg
46	48	-------
	49	+
47	50	(Supported only on adapters with copper connections)
48		−Valid Range: 0x01-0x0F, 0x20-0x2F
49		−Default Value: 0x2F
	51	+
	52	+:Valid Range: 0x01-0x0F, 0x20-0x2F
	53	+:Default Value: 0x2F
50	54
51	55	This parameter is a bit-mask that specifies the speed and duplex settings
52	56	advertised by the adapter. When this parameter is used, the Speed and
53	57	Duplex parameters must not be specified.
54	58
55		−NOTE: Refer to the Speed and Duplex section of this readme for more
	59	+NOTE:
	60	+ Refer to the Speed and Duplex section of this readme for more
56	61	information on the AutoNeg parameter.
57	62
58	63	Duplex
59	64	------
	65	+
60	66	(Supported only on adapters with copper connections)
61		−Valid Range: 0-2 (0=auto-negotiate, 1=half, 2=full)
62		−Default Value: 0
	67	+
	68	+:Valid Range: 0-2 (0=auto-negotiate, 1=half, 2=full)
	69	+:Default Value: 0
63	70
64	71	This defines the direction in which data is allowed to flow. Can be
65	72	either one or two-directional. If both Duplex and the link partner are
@@ -69,18 +76,22 @@ duplex. · 3 unmodified lines
69	76
70	77	FlowControl
71	78	-----------
72		−Valid Range: 0-3 (0=none, 1=Rx only, 2=Tx only, 3=Rx&Tx)
73		−Default Value: Reads flow control settings from the EEPROM
	79	+
	80	+:Valid Range: 0-3 (0=none, 1=Rx only, 2=Tx only, 3=Rx&Tx)
	81	+:Default Value: Reads flow control settings from the EEPROM
74	82
75	83	This parameter controls the automatic generation(Tx) and response(Rx)
76	84	to Ethernet PAUSE frames.
77	85
78	86	InterruptThrottleRate
79	87	---------------------
	88	+
80	89	(not supported on Intel(R) 82542, 82543 or 82544-based adapters)
81		−Valid Range: 0,1,3,4,100-100000 (0=off, 1=dynamic, 3=dynamic conservative,
82		− 4=simplified balancing)
83		−Default Value: 3
	90	+
	91	+:Valid Range:
	92	+ 0,1,3,4,100-100000 (0=off, 1=dynamic, 3=dynamic conservative,
	93	+ 4=simplified balancing)
	94	+:Default Value: 3
84	95
85	96	The driver can limit the amount of interrupts per second that the adapter
86	97	will generate for incoming packets. It does this by writing a value to the
@@ -134,13 +145,15 @@ Setting InterruptThrottleRate to 0 turns off any interrupt moderation · 47 unmodified lines
134	145	and may improve small packet latency, but is generally not suitable
135	146	for bulk throughput traffic.
136	147
137		−NOTE: InterruptThrottleRate takes precedence over the TxAbsIntDelay and
	148	+NOTE:
	149	+ InterruptThrottleRate takes precedence over the TxAbsIntDelay and
138	150	RxAbsIntDelay parameters. In other words, minimizing the receive
139	151	and/or transmit absolute delays does not force the controller to
140	152	generate more interrupts than what the Interrupt Throttle Rate
141	153	allows.
142	154
143		−CAUTION: If you are using the Intel(R) PRO/1000 CT Network Connection
	155	+CAUTION:
	156	+ If you are using the Intel(R) PRO/1000 CT Network Connection
144	157	(controller 82547), setting InterruptThrottleRate to a value
145	158	greater than 75,000, may hang (stop transmitting) adapters
146	159	under certain network conditions. If this occurs a NETDEV
@@ -150,7 +163,8 @@ CAUTION: If you are using the Intel(R) PRO/1000 CT Network Connection · 3 unmodified lines
150	163	hang, ensure that InterruptThrottleRate is set no greater
151	164	than 75,000 and is not set to 0.
152	165
153		−NOTE: When e1000 is loaded with default settings and multiple adapters
	166	+NOTE:
	167	+ When e1000 is loaded with default settings and multiple adapters
154	168	are in use simultaneously, the CPU utilization may increase non-
155	169	linearly. In order to limit the CPU utilization without impacting
156	170	the overall throughput, we recommend that you load the driver as
@@ -167,9 +181,11 @@ NOTE: When e1000 is loaded with default settings and multiple adapters · 10 unmodified lines
167	181
168	182	RxDescriptors
169	183	-------------
170		−Valid Range: 48-256 for 82542 and 82543-based adapters
171		− 48-4096 for all other supported adapters
172		−Default Value: 256
	184	+
	185	+:Valid Range:
	186	+ - 48-256 for 82542 and 82543-based adapters
	187	+ - 48-4096 for all other supported adapters
	188	+:Default Value: 256
173	189
174	190	This value specifies the number of receive buffer descriptors allocated
175	191	by the driver. Increasing this value allows the driver to buffer more
@@ -179,15 +195,17 @@ Each descriptor is 16 bytes. A receive buffer is also allocated for each · 3 unmodified lines
179	195	descriptor and can be either 2048, 4096, 8192, or 16384 bytes, depending
180	196	on the MTU setting. The maximum MTU size is 16110.
181	197
182		−NOTE: MTU designates the frame size. It only needs to be set for Jumbo
	198	+NOTE:
	199	+ MTU designates the frame size. It only needs to be set for Jumbo
183	200	Frames. Depending on the available system resources, the request
184	201	for a higher number of receive descriptors may be denied. In this
185	202	case, use a lower number.
186	203
187	204	RxIntDelay
188	205	----------
189		−Valid Range: 0-65535 (0=off)
190		−Default Value: 0
	206	+
	207	+:Valid Range: 0-65535 (0=off)
	208	+:Default Value: 0
191	209
192	210	This value delays the generation of receive interrupts in units of 1.024
193	211	microseconds. Receive interrupt reduction can improve CPU efficiency if
@@ -197,7 +215,8 @@ of TCP traffic. If the system is reporting dropped receives, this value · 3 unmodified lines
197	215	may be set too high, causing the driver to run out of available receive
198	216	descriptors.
199	217
200		−CAUTION: When setting RxIntDelay to a value other than 0, adapters may
	218	+CAUTION:
	219	+ When setting RxIntDelay to a value other than 0, adapters may
201	220	hang (stop transmitting) under certain network conditions. If
202	221	this occurs a NETDEV WATCHDOG message is logged in the system
203	222	event log. In addition, the controller is automatically reset,
@@ -206,9 +225,11 @@ CAUTION: When setting RxIntDelay to a value other than 0, adapters may · 2 unmodified lines
206	225
207	226	RxAbsIntDelay
208	227	-------------
	228	+
209	229	(This parameter is supported only on 82540, 82545 and later adapters.)
210		−Valid Range: 0-65535 (0=off)
211		−Default Value: 128
	230	+
	231	+:Valid Range: 0-65535 (0=off)
	232	+:Default Value: 128
212	233
213	234	This value, in units of 1.024 microseconds, limits the delay in which a
214	235	receive interrupt is generated. Useful only if RxIntDelay is non-zero,
@@ -219,9 +240,11 @@ conditions. · 4 unmodified lines
219	240
220	241	Speed
221	242	-----
	243	+
222	244	(This parameter is supported only on adapters with copper connections.)
223		−Valid Settings: 0, 10, 100, 1000
224		−Default Value: 0 (auto-negotiate at all supported speeds)
	245	+
	246	+:Valid Settings: 0, 10, 100, 1000
	247	+:Default Value: 0 (auto-negotiate at all supported speeds)
225	248
226	249	Speed forces the line speed to the specified value in megabits per second
227	250	(Mbps). If this parameter is not specified or is set to 0 and the link
@@ -230,22 +253,26 @@ speed. Duplex should also be set when Speed is set to either 10 or 100. · 2 unmodified lines
230	253
231	254	TxDescriptors
232	255	-------------
233		−Valid Range: 48-256 for 82542 and 82543-based adapters
234		− 48-4096 for all other supported adapters
235		−Default Value: 256
	256	+
	257	+:Valid Range:
	258	+ - 48-256 for 82542 and 82543-based adapters
	259	+ - 48-4096 for all other supported adapters
	260	+:Default Value: 256
236	261
237	262	This value is the number of transmit descriptors allocated by the driver.
238	263	Increasing this value allows the driver to queue more transmits. Each
239	264	descriptor is 16 bytes.
240	265
241		−NOTE: Depending on the available system resources, the request for a
	266	+NOTE:
	267	+ Depending on the available system resources, the request for a
242	268	higher number of transmit descriptors may be denied. In this case,
243	269	use a lower number.
244	270
245	271	TxIntDelay
246	272	----------
247		−Valid Range: 0-65535 (0=off)
248		−Default Value: 8
	273	+
	274	+:Valid Range: 0-65535 (0=off)
	275	+:Default Value: 8
249	276
250	277	This value delays the generation of transmit interrupts in units of
251	278	1.024 microseconds. Transmit interrupt reduction can improve CPU
@@ -255,9 +282,11 @@ causing the driver to run out of available transmit descriptors. · 3 unmodified lines
255	282
256	283	TxAbsIntDelay
257	284	-------------
	285	+
258	286	(This parameter is supported only on 82540, 82545 and later adapters.)
259		−Valid Range: 0-65535 (0=off)
260		−Default Value: 32
	287	+
	288	+:Valid Range: 0-65535 (0=off)
	289	+:Default Value: 32
261	290
262	291	This value, in units of 1.024 microseconds, limits the delay in which a
263	292	transmit interrupt is generated. Useful only if TxIntDelay is non-zero,
@@ -268,18 +297,21 @@ network conditions. · 4 unmodified lines
268	297
269	298	XsumRX
270	299	------
	300	+
271	301	(This parameter is NOT supported on the 82542-based adapter.)
272		−Valid Range: 0-1
273		−Default Value: 1
	302	+
	303	+:Valid Range: 0-1
	304	+:Default Value: 1
274	305
275	306	A value of '1' indicates that the driver should enable IP checksum
276	307	offload for received packets (both UDP and TCP) to the adapter hardware.
277	308
278	309	Copybreak
279	310	---------
280		−Valid Range: 0-xxxxxxx (0=off)
281		−Default Value: 256
282		−Usage: modprobe e1000.ko copybreak=128
	311	+
	312	+:Valid Range: 0-xxxxxxx (0=off)
	313	+:Default Value: 256
	314	+:Usage: modprobe e1000.ko copybreak=128
283	315
284	316	Driver copies all packets below or equaling this size to a fresh RX
285	317	buffer before handing it up the stack.
@@ -291,8 +323,9 @@ it is also available during runtime at · 5 unmodified lines
291	323
292	324	SmartPowerDownEnable
293	325	--------------------
294		−Valid Range: 0-1
295		−Default Value: 0 (disabled)
	326	+
	327	+:Valid Range: 0-1
	328	+:Default Value: 0 (disabled)
296	329
297	330	Allows PHY to turn off in lower power states. The user can turn off
298	331	this parameter in supported chipsets.
@@ -308,14 +341,14 @@ fiber interface board only links at 1000 Mbps full-duplex. · 9 unmodified lines
308	341
309	342	For copper-based boards, the keywords interact as follows:
310	343
311		− The default operation is auto-negotiate. The board advertises all
	344	+- The default operation is auto-negotiate. The board advertises all
312	345	supported speed and duplex combinations, and it links at the highest
313	346	common speed and duplex mode IF the link partner is set to auto-negotiate.
314	347
315		− If Speed = 1000, limited auto-negotiation is enabled and only 1000 Mbps
	348	+- If Speed = 1000, limited auto-negotiation is enabled and only 1000 Mbps
316	349	is advertised (The 1000BaseT spec requires auto-negotiation.)
317	350
318		− If Speed = 10 or 100, then both Speed and Duplex should be set. Auto-
	351	+- If Speed = 10 or 100, then both Speed and Duplex should be set. Auto-
319	352	negotiation is disabled, and the AutoNeg parameter is ignored. Partner
320	353	SHOULD also be forced.
321	354
@@ -327,13 +360,15 @@ process. · 5 unmodified lines
327	360	The parameter may be specified as either a decimal or hexadecimal value as
328	361	determined by the bitmap below.
329	362
	363	+============== ====== ====== ======= ======= ====== ====== ======= ======
330	364	Bit position 7 6 5 4 3 2 1 0
331	365	Decimal Value 128 64 32 16 8 4 2 1
332	366	Hex value 80 40 20 10 8 4 2 1
333	367	Speed (Mbps) N/A N/A 1000 N/A 100 100 10 10
334	368	Duplex Full Full Half Full Half
	369	+============== ====== ====== ======= ======= ====== ====== ======= ======
335	370
336		−Some examples of using AutoNeg:
	371	+Some examples of using AutoNeg::
337	372
338	373	modprobe e1000 AutoNeg=0x01 (Restricts autonegotiation to 10 Half)
339	374	modprobe e1000 AutoNeg=1 (Same as above)
@@ -354,8 +389,9 @@ previously mentioned to force the adapter to the same speed and duplex. · 14 unmodified lines
354	389	Additional Configurations
355	390	=========================
356	391
357		− Jumbo Frames
358		− ------------
	392	+Jumbo Frames
	393	+------------
	394	+
359	395	Jumbo Frames support is enabled by changing the MTU to a value larger than
360	396	the default of 1500. Use the ifconfig command to increase the MTU size.
361	397	For example::
@@ -367,11 +403,11 @@ Additional Configurations · 5 unmodified lines
367	403
368	404	MTU=9000
369	405
370		− to the file /etc/sysconfig/network-scripts/ifcfg-eth<x>. This example
371		− applies to the Red Hat distributions; other distributions may store this
372		− setting in a different location.
	406	+ to the file /etc/sysconfig/network-scripts/ifcfg-eth<x>. This example
	407	+ applies to the Red Hat distributions; other distributions may store this
	408	+ setting in a different location.
373	409
374		− Notes:
	410	+Notes:
375	411	Degradation in throughput performance may be observed in some Jumbo frames
376	412	environments. If this is observed, increasing the application's socket buffer
377	413	size and/or increasing the /proc/sys/net/ipv4/tcp_*mem entry values may help.
@@ -385,12 +421,14 @@ Additional Configurations · 7 unmodified lines
385	421	poor performance or loss of link.
386	422
387	423	- Adapters based on the Intel(R) 82542 and 82573V/E controller do not
388		− support Jumbo Frames. These correspond to the following product names:
	424	+ support Jumbo Frames. These correspond to the following product names::
	425	+
389	426	Intel(R) PRO/1000 Gigabit Server Adapter
390	427	Intel(R) PRO/1000 PM Network Connection
391	428
392		− ethtool
393		− -------
	429	+ethtool
	430	+-------
	431	+
394	432	The driver utilizes the ethtool interface for driver configuration and
395	433	diagnostics, as well as displaying statistical information. The ethtool
396	434	version 1.6 or later is required for this functionality.
@@ -398,8 +436,9 @@ Additional Configurations · 1 unmodified line
398	436	The latest release of ethtool can be found from
399	437	https://www.kernel.org/pub/software/network/ethtool/
400	438
401		− Enabling Wake on LAN* (WoL)
402		− ---------------------------
	439	+Enabling Wake on LAN* (WoL)
	440	+---------------------------
	441	+
403	442	WoL is configured through the ethtool* utility.
404	443
405	444	WoL will be enabled on the system during the next shut down or reboot.

Documentation/networking/strparser.txt+1−1

@@ -48,7 +48,7 @@ void strp_pause(struct strparser *strp) · 47 unmodified lines
48	48	Temporarily pause a stream parser. Message parsing is suspended
49	49	and no new messages are delivered to the upper layer.
50	50
51		−void strp_pause(struct strparser *strp)
	51	+void strp_unpause(struct strparser *strp)
52	52
53	53	Unpause a paused stream parser.
54	54

Documentation/trace/histogram.txt+12−11

@@ -1729,35 +1729,35 @@ If a variable isn't a key variable or prefixed with 'vals=', the · 1728 unmodified lines
1729	1729	associated event field will be saved in a variable but won't be summed
1730	1730	as a value:
1731	1731
1732		− # echo 'hist:keys=next_pid:ts1=common_timestamp ... >> event/trigger
	1732	+ # echo 'hist:keys=next_pid:ts1=common_timestamp ...' >> event/trigger
1733	1733
1734	1734	Multiple variables can be assigned at the same time. The below would
1735	1735	result in both ts0 and b being created as variables, with both
1736	1736	common_timestamp and field1 additionally being summed as values:
1737	1737
1738		− # echo 'hist:keys=pid:vals=$ts0,$b:ts0=common_timestamp,b=field1 ... >> \
	1738	+ # echo 'hist:keys=pid:vals=$ts0,$b:ts0=common_timestamp,b=field1 ...' >> \
1739	1739	event/trigger
1740	1740
1741	1741	Note that variable assignments can appear either preceding or
1742	1742	following their use. The command below behaves identically to the
1743	1743	command above:
1744	1744
1745		− # echo 'hist:keys=pid:ts0=common_timestamp,b=field1:vals=$ts0,$b ... >> \
	1745	+ # echo 'hist:keys=pid:ts0=common_timestamp,b=field1:vals=$ts0,$b ...' >> \
1746	1746	event/trigger
1747	1747
1748	1748	Any number of variables not bound to a 'vals=' prefix can also be
1749	1749	assigned by simply separating them with colons. Below is the same
1750	1750	thing but without the values being summed in the histogram:
1751	1751
1752		− # echo 'hist:keys=pid:ts0=common_timestamp:b=field1 ... >> event/trigger
	1752	+ # echo 'hist:keys=pid:ts0=common_timestamp:b=field1 ...' >> event/trigger
1753	1753
1754	1754	Variables set as above can be referenced and used in expressions on
1755	1755	another event.
1756	1756
1757	1757	For example, here's how a latency can be calculated:
1758	1758
1759		− # echo 'hist:keys=pid,prio:ts0=common_timestamp ... >> event1/trigger
1760		− # echo 'hist:keys=next_pid:wakeup_lat=common_timestamp-$ts0 ... >> event2/trigger
	1759	+ # echo 'hist:keys=pid,prio:ts0=common_timestamp ...' >> event1/trigger
	1760	+ # echo 'hist:keys=next_pid:wakeup_lat=common_timestamp-$ts0 ...' >> event2/trigger
1761	1761
1762	1762	In the first line above, the event's timetamp is saved into the
1763	1763	variable ts0. In the next line, ts0 is subtracted from the second
@@ -1766,7 +1766,7 @@ yet another variable, 'wakeup_lat'. The hist trigger below in turn · 2 unmodified lines
1766	1766	makes use of the wakeup_lat variable to compute a combined latency
1767	1767	using the same key and variable from yet another event:
1768	1768
1769		− # echo 'hist:key=pid:wakeupswitch_lat=$wakeup_lat+$switchtime_lat ... >> event3/trigger
	1769	+ # echo 'hist:key=pid:wakeupswitch_lat=$wakeup_lat+$switchtime_lat ...' >> event3/trigger
1770	1770
1771	1771	2.2.2 Synthetic Events
1772	1772	----------------------
@@ -1807,10 +1807,11 @@ the command that defined it with a '!': · 34 unmodified lines
1807	1807	At this point, there isn't yet an actual 'wakeup_latency' event
1808	1808	instantiated in the event subsytem - for this to happen, a 'hist
1809	1809	trigger action' needs to be instantiated and bound to actual fields
1810		−and variables defined on other events (see Section 6.3.3 below).
	1810	+and variables defined on other events (see Section 2.2.3 below on
	1811	+how that is done using hist trigger 'onmatch' action). Once that is
	1812	+done, the 'wakeup_latency' synthetic event instance is created.
1811	1813
1812		−Once that is done, an event instance is created, and a histogram can
1813		−be defined using it:
	1814	+A histogram can now be defined for the new synthetic event:
1814	1815
1815	1816	# echo 'hist:keys=pid,prio,lat.log2:sort=pid,lat' >> \
1816	1817	/sys/kernel/debug/tracing/events/synthetic/wakeup_latency/trigger
@@ -1960,7 +1961,7 @@ hist trigger specification. · 143 unmodified lines
1960	1961	back to that pid, the timestamp difference is calculated. If the
1961	1962	resulting latency, stored in wakeup_lat, exceeds the current
1962	1963	maximum latency, the values specified in the save() fields are
1963		− recoreded:
	1964	+ recorded:
1964	1965
1965	1966	# echo 'hist:keys=pid:ts0=common_timestamp.usecs \
1966	1967	if comm=="cyclictest"' >> \

Documentation/usb/gadget_configfs.txt+1−1

@@ -226,7 +226,7 @@ $ rm configs/<config name>.<number>/<function> · 225 unmodified lines
226	226	where <config name>.<number> specify the configuration and <function> is
227	227	a symlink to a function being removed from the configuration, e.g.:
228	228
229		−$ rm configfs/c.1/ncm.usb0
	229	+$ rm configs/c.1/ncm.usb0
230	230
231	231	...
232	232	...

Documentation/virtual/kvm/api.txt+1−1

@@ -4610,7 +4610,7 @@ This capability indicates that kvm will implement the interfaces to handle · 4609 unmodified lines
4610	4610	reset, migration and nested KVM for branch prediction blocking. The stfle
4611	4611	facility 82 should not be provided to the guest without this capability.
4612	4612
4613		−8.14 KVM_CAP_HYPERV_TLBFLUSH
	4613	+8.18 KVM_CAP_HYPERV_TLBFLUSH
4614	4614
4615	4615	Architectures: x86
4616	4616

MAINTAINERS+51−25

@@ -581,7 +581,7 @@ W: https://www.infradead.org/~dhowells/kafs/ · 580 unmodified lines
581	581
582	582	AGPGART DRIVER
583	583	M: David Airlie <airlied@linux.ie>
584		−T: git git://people.freedesktop.org/~airlied/linux (part of drm maint)
	584	+T: git git://anongit.freedesktop.org/drm/drm
585	585	S: Maintained
586	586	F: drivers/char/agp/
587	587	F: include/linux/agp*
@@ -2523,7 +2523,7 @@ S: Supported · 1935 unmodified lines
2523	2523	F: drivers/scsi/esas2r
2524	2524
2525	2525	ATUSB IEEE 802.15.4 RADIO DRIVER
2526		−M: Stefan Schmidt <stefan@osg.samsung.com>
	2526	+M: Stefan Schmidt <stefan@datenfreihafen.org>
2527	2527	L: linux-wpan@vger.kernel.org
2528	2528	S: Maintained
2529	2529	F: drivers/net/ieee802154/atusb.c
@@ -2971,9 +2971,13 @@ N: bcm585* · 441 unmodified lines
2971	2971	N: bcm586*
2972	2972	N: bcm88312
2973	2973	N: hr2
2974		−F: arch/arm64/boot/dts/broadcom/ns2*
	2974	+N: stingray
	2975	+F: arch/arm64/boot/dts/broadcom/northstar2/*
	2976	+F: arch/arm64/boot/dts/broadcom/stingray/*
2975	2977	F: drivers/clk/bcm/clk-ns*
	2978	+F: drivers/clk/bcm/clk-sr*
2976	2979	F: drivers/pinctrl/bcm/pinctrl-ns*
	2980	+F: include/dt-bindings/clock/bcm-sr*
2977	2981
2978	2982	BROADCOM KONA GPIO DRIVER
2979	2983	M: Ray Jui <rjui@broadcom.com>
@@ -4359,12 +4363,7 @@ L: iommu@lists.linux-foundation.org · 1379 unmodified lines
4359	4363	T: git git://git.infradead.org/users/hch/dma-mapping.git
4360	4364	W: http://git.infradead.org/users/hch/dma-mapping.git
4361	4365	S: Supported
4362		−F: lib/dma-debug.c
4363		−F: lib/dma-direct.c
4364		−F: lib/dma-noncoherent.c
4365		−F: lib/dma-virt.c
4366		−F: drivers/base/dma-mapping.c
4367		−F: drivers/base/dma-coherent.c
	4366	+F: kernel/dma/
4368	4367	F: include/asm-generic/dma-mapping.h
4369	4368	F: include/linux/dma-direct.h
4370	4369	F: include/linux/dma-mapping.h
@@ -4460,6 +4459,7 @@ F: Documentation/blockdev/drbd/ · 89 unmodified lines
4460	4459
4461	4460	DRIVER CORE, KOBJECTS, DEBUGFS AND SYSFS
4462	4461	M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
	4462	+R: "Rafael J. Wysocki" <rafael@kernel.org>
4463	4463	T: git git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git
4464	4464	S: Supported
4465	4465	F: Documentation/kobject.txt
@@ -4630,7 +4630,7 @@ F: include/uapi/drm/vmwgfx_drm.h · 164 unmodified lines
4630	4630	DRM DRIVERS
4631	4631	M: David Airlie <airlied@linux.ie>
4632	4632	L: dri-devel@lists.freedesktop.org
4633		−T: git git://people.freedesktop.org/~airlied/linux
	4633	+T: git git://anongit.freedesktop.org/drm/drm
4634	4634	B: https://bugs.freedesktop.org/
4635	4635	C: irc://chat.freenode.net/dri-devel
4636	4636	S: Maintained
@@ -5443,6 +5443,7 @@ F: drivers/iommu/exynos-iommu.c · 806 unmodified lines
5443	5443
5444	5444	EZchip NPS platform support
5445	5445	M: Vineet Gupta <vgupta@synopsys.com>
	5446	+M: Ofer Levi <oferle@mellanox.com>
5446	5447	S: Supported
5447	5448	F: arch/arc/plat-eznps
5448	5449	F: arch/arc/boot/dts/eznps.dts
@@ -5673,7 +5674,7 @@ F: drivers/crypto/caam/ · 224 unmodified lines
5673	5674	F: Documentation/devicetree/bindings/crypto/fsl-sec4.txt
5674	5675
5675	5676	FREESCALE DIU FRAMEBUFFER DRIVER
5676		−M: Timur Tabi <timur@tabi.org>
	5677	+M: Timur Tabi <timur@kernel.org>
5677	5678	L: linux-fbdev@vger.kernel.org
5678	5679	S: Maintained
5679	5680	F: drivers/video/fbdev/fsl-diu-fb.*
@@ -5773,7 +5774,7 @@ S: Maintained · 93 unmodified lines
5773	5774	F: drivers/net/wan/fsl_ucc_hdlc*
5774	5775
5775	5776	FREESCALE QUICC ENGINE UCC UART DRIVER
5776		−M: Timur Tabi <timur@tabi.org>
	5777	+M: Timur Tabi <timur@kernel.org>
5777	5778	L: linuxppc-dev@lists.ozlabs.org
5778	5779	S: Maintained
5779	5780	F: drivers/tty/serial/ucc_uart.c
@@ -5789,7 +5790,6 @@ F: include/linux/fsl/ · 9 unmodified lines
5789	5790
5790	5791	FREESCALE SOC FS_ENET DRIVER
5791	5792	M: Pantelis Antoniou <pantelis.antoniou@gmail.com>
5792		−M: Vitaly Bordug <vbordug@ru.mvista.com>
5793	5793	L: linuxppc-dev@lists.ozlabs.org
5794	5794	L: netdev@vger.kernel.org
5795	5795	S: Maintained
@@ -5797,7 +5797,7 @@ F: drivers/net/ethernet/freescale/fs_enet/ · 1 unmodified line
5797	5797	F: include/linux/fs_enet_pd.h
5798	5798
5799	5799	FREESCALE SOC SOUND DRIVERS
5800		−M: Timur Tabi <timur@tabi.org>
	5800	+M: Timur Tabi <timur@kernel.org>
5801	5801	M: Nicolin Chen <nicoleotsuka@gmail.com>
5802	5802	M: Xiubo Li <Xiubo.Lee@gmail.com>
5803	5803	R: Fabio Estevam <fabio.estevam@nxp.com>
@@ -5929,7 +5929,7 @@ F: Documentation/dev-tools/gcov.rst · 125 unmodified lines
5929	5929
5930	5930	GDB KERNEL DEBUGGING HELPER SCRIPTS
5931	5931	M: Jan Kiszka <jan.kiszka@siemens.com>
5932		−M: Kieran Bingham <kieran@bingham.xyz>
	5932	+M: Kieran Bingham <kbingham@kernel.org>
5933	5933	S: Supported
5934	5934	F: scripts/gdb/
5935	5935
@@ -6908,7 +6908,7 @@ F: drivers/clk/clk-versaclock5.c · 972 unmodified lines
6908	6908
6909	6909	IEEE 802.15.4 SUBSYSTEM
6910	6910	M: Alexander Aring <alex.aring@gmail.com>
6911		−M: Stefan Schmidt <stefan@osg.samsung.com>
	6911	+M: Stefan Schmidt <stefan@datenfreihafen.org>
6912	6912	L: linux-wpan@vger.kernel.org
6913	6913	W: http://wpan.cakelab.org/
6914	6914	T: git git://git.kernel.org/pub/scm/linux/kernel/git/sschmidt/wpan.git
@@ -7095,6 +7095,7 @@ F: include/uapi/linux/input.h · 180 unmodified lines
7095	7095	F: include/uapi/linux/input-event-codes.h
7096	7096	F: include/linux/input/
7097	7097	F: Documentation/devicetree/bindings/input/
	7098	+F: Documentation/devicetree/bindings/serio/
7098	7099	F: Documentation/input/
7099	7100
7100	7101	INPUT MULTITOUCH (MT) PROTOCOL
@@ -7983,7 +7984,7 @@ F: lib/test_kmod.c · 882 unmodified lines
7983	7984	F: tools/testing/selftests/kmod/
7984	7985
7985	7986	KPROBES
7986		−M: Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
	7987	+M: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
7987	7988	M: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
7988	7989	M: "David S. Miller" <davem@davemloft.net>
7989	7990	M: Masami Hiramatsu <mhiramat@kernel.org>
@@ -8627,7 +8628,7 @@ MARVELL MWIFIEX WIRELESS DRIVER · 637 unmodified lines
8627	8628	M: Amitkumar Karwar <amitkarwar@gmail.com>
8628	8629	M: Nishant Sarmukadam <nishants@marvell.com>
8629	8630	M: Ganapathi Bhat <gbhat@marvell.com>
8630		−M: Xinming Hu <huxm@marvell.com>
	8631	+M: Xinming Hu <huxinming820@gmail.com>
8631	8632	L: linux-wireless@vger.kernel.org
8632	8633	S: Maintained
8633	8634	F: drivers/net/wireless/marvell/mwifiex/
@@ -9073,7 +9074,7 @@ S: Maintained · 439 unmodified lines
9073	9074	F: drivers/usb/mtu3/
9074	9075
9075	9076	MEGACHIPS STDPXXXX-GE-B850V3-FW LVDS/DP++ BRIDGES
9076		−M: Peter Senna Tschudin <peter.senna@collabora.com>
	9077	+M: Peter Senna Tschudin <peter.senna@gmail.com>
9077	9078	M: Martin Donnelly <martin.donnelly@ge.com>
9078	9079	M: Martyn Welch <martyn.welch@collabora.co.uk>
9079	9080	S: Maintained
@@ -9754,6 +9755,11 @@ L: linux-scsi@vger.kernel.org · 674 unmodified lines
9754	9755	S: Maintained
9755	9756	F: drivers/scsi/NCR_D700.*
9756	9757
	9758	+NCSI LIBRARY:
	9759	+M: Samuel Mendoza-Jonas <sam@mendozajonas.com>
	9760	+S: Maintained
	9761	+F: net/ncsi/
	9762	+
9757	9763	NCT6775 HARDWARE MONITOR DRIVER
9758	9764	M: Guenter Roeck <linux@roeck-us.net>
9759	9765	L: linux-hwmon@vger.kernel.org
@@ -9880,6 +9886,7 @@ M: Andrew Lunn <andrew@lunn.ch> · 120 unmodified lines
9880	9886	M: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
9881	9887	M: Florian Fainelli <f.fainelli@gmail.com>
9882	9888	S: Maintained
	9889	+F: Documentation/devicetree/bindings/net/dsa/
9883	9890	F: net/dsa/
9884	9891	F: include/net/dsa.h
9885	9892	F: include/linux/dsa/
@@ -10206,11 +10213,13 @@ F: sound/soc/codecs/sgtl5000* · 320 unmodified lines
10206	10213
10207	10214	NXP TDA998X DRM DRIVER
10208	10215	M: Russell King <linux@armlinux.org.uk>
10209		−S: Supported
	10216	+S: Maintained
10210	10217	T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-tda998x-devel
10211	10218	T: git git://git.armlinux.org.uk/~rmk/linux-arm.git drm-tda998x-fixes
10212	10219	F: drivers/gpu/drm/i2c/tda998x_drv.c
10213	10220	F: include/drm/i2c/tda998x.h
	10221	+F: include/dt-bindings/display/tda998x.h
	10222	+K: "nxp,tda998x"
10214	10223
10215	10224	NXP TFA9879 DRIVER
10216	10225	M: Peter Rosin <peda@axentia.se>
@@ -11474,6 +11483,15 @@ W: http://wireless.kernel.org/en/users/Drivers/p54 · 1257 unmodified lines
11474	11483	S: Obsolete
11475	11484	F: drivers/net/wireless/intersil/prism54/
11476	11485
	11486	+PROC FILESYSTEM
	11487	+R: Alexey Dobriyan <adobriyan@gmail.com>
	11488	+L: linux-kernel@vger.kernel.org
	11489	+L: linux-fsdevel@vger.kernel.org
	11490	+S: Maintained
	11491	+F: fs/proc/
	11492	+F: include/linux/proc_fs.h
	11493	+F: tools/testing/selftests/proc/
	11494	+
11477	11495	PROC SYSCTL
11478	11496	M: "Luis R. Rodriguez" <mcgrof@kernel.org>
11479	11497	M: Kees Cook <keescook@chromium.org>
@@ -11806,9 +11824,9 @@ F: Documentation/devicetree/bindings/opp/kryo-cpufreq.txt · 326 unmodified lines
11806	11824	F: drivers/cpufreq/qcom-cpufreq-kryo.c
11807	11825
11808	11826	QUALCOMM EMAC GIGABIT ETHERNET DRIVER
11809		−M: Timur Tabi <timur@codeaurora.org>
	11827	+M: Timur Tabi <timur@kernel.org>
11810	11828	L: netdev@vger.kernel.org
11811		−S: Supported
	11829	+S: Maintained
11812	11830	F: drivers/net/ethernet/qualcomm/emac/
11813	11831
11814	11832	QUALCOMM HEXAGON ARCHITECTURE
@@ -11819,7 +11837,7 @@ S: Supported · 4 unmodified lines
11819	11837	F: arch/hexagon/
11820	11838
11821	11839	QUALCOMM HIDMA DRIVER
11822		−M: Sinan Kaya <okaya@codeaurora.org>
	11840	+M: Sinan Kaya <okaya@kernel.org>
11823	11841	L: linux-arm-kernel@lists.infradead.org
11824	11842	L: linux-arm-msm@vger.kernel.org
11825	11843	L: dmaengine@vger.kernel.org
@@ -13652,7 +13670,7 @@ M: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> · 1826 unmodified lines
13652	13670	L: iommu@lists.linux-foundation.org
13653	13671	T: git git://git.kernel.org/pub/scm/linux/kernel/git/konrad/swiotlb.git
13654	13672	S: Supported
13655		−F: lib/swiotlb.c
	13673	+F: kernel/dma/swiotlb.c
13656	13674	F: arch/*/kernel/pci-swiotlb.c
13657	13675	F: include/linux/swiotlb.h
13658	13676
@@ -15576,9 +15594,17 @@ M: x86@kernel.org · 1917 unmodified lines
15576	15594	L: linux-kernel@vger.kernel.org
15577	15595	T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core
15578	15596	S: Maintained
	15597	+F: Documentation/devicetree/bindings/x86/
15579	15598	F: Documentation/x86/
15580	15599	F: arch/x86/
15581	15600
	15601	+X86 ENTRY CODE
	15602	+M: Andy Lutomirski <luto@kernel.org>
	15603	+L: linux-kernel@vger.kernel.org
	15604	+T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/asm
	15605	+S: Maintained
	15606	+F: arch/x86/entry/
	15607	+
15582	15608	X86 MCE INFRASTRUCTURE
15583	15609	M: Tony Luck <tony.luck@intel.com>
15584	15610	M: Borislav Petkov <bp@alien8.de>
@@ -15601,7 +15627,7 @@ F: drivers/platform/x86/ · 16 unmodified lines
15601	15627	F: drivers/platform/olpc/
15602	15628
15603	15629	X86 VDSO
15604		−M: Andy Lutomirski <luto@amacapital.net>
	15630	+M: Andy Lutomirski <luto@kernel.org>
15605	15631	L: linux-kernel@vger.kernel.org
15606	15632	T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/vdso
15607	15633	S: Maintained

Makefile+5−10

@@ -2,7 +2,7 @@ · 1 unmodified line
2	2	VERSION = 4
3	3	PATCHLEVEL = 18
4	4	SUBLEVEL = 0
5		−EXTRAVERSION = -rc1
	5	+EXTRAVERSION =
6	6	NAME = Merciless Moray
7	7
8	8	# DOCUMENTATION
@@ -353,9 +353,9 @@ CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \ · 344 unmodified lines
353	353	else if [ -x /bin/bash ]; then echo /bin/bash; \
354	354	else echo sh; fi ; fi)
355	355
356		−HOST_LFS_CFLAGS := $(shell getconf LFS_CFLAGS)
357		−HOST_LFS_LDFLAGS := $(shell getconf LFS_LDFLAGS)
358		−HOST_LFS_LIBS := $(shell getconf LFS_LIBS)
	356	+HOST_LFS_CFLAGS := $(shell getconf LFS_CFLAGS 2>/dev/null)
	357	+HOST_LFS_LDFLAGS := $(shell getconf LFS_LDFLAGS 2>/dev/null)
	358	+HOST_LFS_LIBS := $(shell getconf LFS_LIBS 2>/dev/null)
359	359
360	360	HOSTCC = gcc
361	361	HOSTCXX = g++
@@ -507,11 +507,6 @@ ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-goto.sh $(CC) $(KBUILD_CFLA · 145 unmodified lines
507	507	KBUILD_AFLAGS += -DCC_HAVE_ASM_GOTO
508	508	endif
509	509
510		−ifeq ($(shell $(CONFIG_SHELL) $(srctree)/scripts/cc-can-link.sh $(CC)), y)
511		− CC_CAN_LINK := y
512		− export CC_CAN_LINK
513		−endif
514		−
515	510	# The expansion should be delayed until arch/$(SRCARCH)/Makefile is included.
516	511	# Some architectures define CROSS_COMPILE in arch/$(SRCARCH)/Makefile.
517	512	# CC_VERSION_TEXT is referenced from Kconfig (so it needs export),
@@ -1717,6 +1712,6 @@ endif # skip-makefile · 1199 unmodified lines
1717	1712	PHONY += FORCE
1718	1713	FORCE:
1719	1714
1720		−# Declare the contents of the .PHONY variable as phony. We keep that
	1715	+# Declare the contents of the PHONY variable as phony. We keep that
1721	1716	# information in a variable so we can use it in if_changed and friends.
1722	1717	.PHONY: $(PHONY)

arch/alpha/Kconfig+0−5

@@ -555,11 +555,6 @@ config SMP · 554 unmodified lines
555	555
556	556	If you don't know what to do here, say N.
557	557
558		−config HAVE_DEC_LOCK
559		− bool
560		− depends on SMP
561		− default y
562		−
563	558	config NR_CPUS
564	559	int "Maximum number of CPUs (2-32)"
565	560	range 2 32

arch/alpha/kernel/osf_sys.c+1−4

@@ -1180,13 +1180,10 @@ SYSCALL_DEFINE2(osf_getrusage, int, who, struct rusage32 __user *, ru) · 1179 unmodified lines
1180	1180	SYSCALL_DEFINE4(osf_wait4, pid_t, pid, int __user *, ustatus, int, options,
1181	1181	struct rusage32 __user *, ur)
1182	1182	{
1183		− unsigned int status = 0;
1184	1183	struct rusage r;
1185		− long err = kernel_wait4(pid, &status, options, &r);
	1184	+ long err = kernel_wait4(pid, ustatus, options, &r);
1186	1185	if (err <= 0)
1187	1186	return err;
1188		− if (put_user(status, ustatus))
1189		− return -EFAULT;
1190	1187	if (!ur)
1191	1188	return err;
1192	1189	if (put_tv_to_tv32(&ur->ru_utime, &r.ru_utime))

arch/alpha/lib/Makefile+0−2

@@ -35,8 +35,6 @@ lib-y = __divqu.o __remqu.o __divlu.o __remlu.o \ · 34 unmodified lines
35	35	callback_srm.o srm_puts.o srm_printk.o \
36	36	fls.o
37	37
38		−lib-$(CONFIG_SMP) += dec_and_lock.o
39		−
40	38	# The division routines are built from single source, with different defines.
41	39	AFLAGS___divqu.o = -DDIV
42	40	AFLAGS___remqu.o = -DREM

arch/alpha/lib/dec_and_lock.c+0−44

@@ -1,44 +0,0 @@
1		−// SPDX-License-Identifier: GPL-2.0
2		−/*
3		− * arch/alpha/lib/dec_and_lock.c
4		− *
5		− * ll/sc version of atomic_dec_and_lock()
6		− *
7		− */
8		−
9		−#include <linux/spinlock.h>
10		−#include <linux/atomic.h>
11		−#include <linux/export.h>
12		−
13		− asm (".text \n\
14		− .global _atomic_dec_and_lock \n\
15		− .ent _atomic_dec_and_lock \n\
16		− .align 4 \n\
17		−_atomic_dec_and_lock: \n\
18		− .prologue 0 \n\
19		−1: ldl_l $1, 0($16) \n\
20		− subl $1, 1, $1 \n\
21		− beq $1, 2f \n\
22		− stl_c $1, 0($16) \n\
23		− beq $1, 4f \n\
24		− mb \n\
25		− clr $0 \n\
26		− ret \n\
27		−2: br $29, 3f \n\
28		−3: ldgp $29, 0($29) \n\
29		− br $atomic_dec_and_lock_1..ng \n\
30		− .subsection 2 \n\
31		−4: br 1b \n\
32		− .previous \n\
33		− .end _atomic_dec_and_lock");
34		−
35		−static int __used atomic_dec_and_lock_1(atomic_t atomic, spinlock_t lock)
36		−{
37		− /* Slow path */
38		− spin_lock(lock);
39		− if (atomic_dec_and_test(atomic))
40		− return 1;
41		− spin_unlock(lock);
42		− return 0;
43		−}
44		−EXPORT_SYMBOL(_atomic_dec_and_lock);

arch/arc/Kconfig+4−1

@@ -50,6 +50,9 @@ config ARC · 49 unmodified lines
50	50	select HAVE_KERNEL_LZMA
51	51	select ARCH_HAS_PTE_SPECIAL
52	52
	53	+config ARCH_HAS_CACHE_LINE_SIZE
	54	+ def_bool y
	55	+
53	56	config MIGHT_HAVE_PCI
54	57	bool
55	58
@@ -413,7 +416,7 @@ config ARC_HAS_DIV_REM · 357 unmodified lines
413	416
414	417	config ARC_HAS_ACCL_REGS
415	418	bool "Reg Pair ACCL:ACCH (FPU and/or MPY > 6)"
416		− default n
	419	+ default y
417	420	help
418	421	Depending on the configuration, CPU can contain accumulator reg-pair
419	422	(also referred to as r58:r59). These can also be used by gcc as GPR so

arch/arc/Makefile+1−14

@@ -16,7 +16,7 @@ endif · 15 unmodified lines
16	16
17	17	KBUILD_DEFCONFIG := nsim_700_defconfig
18	18
19		−cflags-y += -fno-common -pipe -fno-builtin -D__linux__
	19	+cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
20	20	cflags-$(CONFIG_ISA_ARCOMPACT) += -mA7
21	21	cflags-$(CONFIG_ISA_ARCV2) += -mcpu=archs
22	22
@@ -140,16 +140,3 @@ dtbs: scripts · 117 unmodified lines
140	140
141	141	archclean:
142	142	$(Q)$(MAKE) $(clean)=$(boot)
143		−
144		−# Hacks to enable final link due to absence of link-time branch relexation
145		−# and gcc choosing optimal(shorter) branches at -O3
146		−#
147		−# vineetg Feb 2010: -mlong-calls switched off for overall kernel build
148		−# However lib/decompress_inflate.o (.init.text) calls
149		−# zlib_inflate_workspacesize (.text) causing relocation errors.
150		−# Thus forcing all exten calls in this file to be long calls
151		−export CFLAGS_decompress_inflate.o = -mmedium-calls
152		−export CFLAGS_initramfs.o = -mmedium-calls
153		−ifdef CONFIG_SMP
154		−export CFLAGS_core.o = -mmedium-calls
155		−endif

arch/arc/configs/axs101_defconfig+0−1

@@ -11,7 +11,6 @@ CONFIG_NAMESPACES=y · 10 unmodified lines
11	11	# CONFIG_UTS_NS is not set
12	12	# CONFIG_PID_NS is not set
13	13	CONFIG_BLK_DEV_INITRD=y
14		−CONFIG_INITRAMFS_SOURCE="../arc_initramfs/"
15	14	CONFIG_EMBEDDED=y
16	15	CONFIG_PERF_EVENTS=y
17	16	# CONFIG_VM_EVENT_COUNTERS is not set

arch/arc/configs/axs103_defconfig+0−1

@@ -11,7 +11,6 @@ CONFIG_NAMESPACES=y · 10 unmodified lines
11	11	# CONFIG_UTS_NS is not set
12	12	# CONFIG_PID_NS is not set
13	13	CONFIG_BLK_DEV_INITRD=y
14		−CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
15	14	CONFIG_EMBEDDED=y
16	15	CONFIG_PERF_EVENTS=y
17	16	# CONFIG_VM_EVENT_COUNTERS is not set

arch/arc/configs/axs103_smp_defconfig+0−1

@@ -11,7 +11,6 @@ CONFIG_NAMESPACES=y · 10 unmodified lines
11	11	# CONFIG_UTS_NS is not set
12	12	# CONFIG_PID_NS is not set
13	13	CONFIG_BLK_DEV_INITRD=y
14		−CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
15	14	CONFIG_EMBEDDED=y
16	15	CONFIG_PERF_EVENTS=y
17	16	# CONFIG_VM_EVENT_COUNTERS is not set

arch/arc/configs/haps_hs_defconfig+0−1

@@ -11,7 +11,6 @@ CONFIG_NAMESPACES=y · 10 unmodified lines
11	11	# CONFIG_UTS_NS is not set
12	12	# CONFIG_PID_NS is not set
13	13	CONFIG_BLK_DEV_INITRD=y
14		−CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
15	14	CONFIG_EXPERT=y
16	15	CONFIG_PERF_EVENTS=y
17	16	# CONFIG_COMPAT_BRK is not set

arch/arc/configs/haps_hs_smp_defconfig+0−1

@@ -11,7 +11,6 @@ CONFIG_NAMESPACES=y · 10 unmodified lines
11	11	# CONFIG_UTS_NS is not set
12	12	# CONFIG_PID_NS is not set
13	13	CONFIG_BLK_DEV_INITRD=y
14		−CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
15	14	CONFIG_EMBEDDED=y
16	15	CONFIG_PERF_EVENTS=y
17	16	# CONFIG_VM_EVENT_COUNTERS is not set

arch/arc/configs/hsdk_defconfig+0−1

@@ -9,7 +9,6 @@ CONFIG_NAMESPACES=y · 8 unmodified lines
9	9	# CONFIG_UTS_NS is not set
10	10	# CONFIG_PID_NS is not set
11	11	CONFIG_BLK_DEV_INITRD=y
12		−CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
13	12	CONFIG_EMBEDDED=y
14	13	CONFIG_PERF_EVENTS=y
15	14	# CONFIG_VM_EVENT_COUNTERS is not set

arch/arc/configs/nsim_700_defconfig+0−1

@@ -11,7 +11,6 @@ CONFIG_NAMESPACES=y · 10 unmodified lines
11	11	# CONFIG_UTS_NS is not set
12	12	# CONFIG_PID_NS is not set
13	13	CONFIG_BLK_DEV_INITRD=y
14		−CONFIG_INITRAMFS_SOURCE="../arc_initramfs/"
15	14	CONFIG_KALLSYMS_ALL=y
16	15	CONFIG_EMBEDDED=y
17	16	CONFIG_PERF_EVENTS=y

arch/arc/configs/nsim_hs_defconfig+0−1

@@ -11,7 +11,6 @@ CONFIG_NAMESPACES=y · 10 unmodified lines
11	11	# CONFIG_UTS_NS is not set
12	12	# CONFIG_PID_NS is not set
13	13	CONFIG_BLK_DEV_INITRD=y
14		−CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/"
15	14	CONFIG_KALLSYMS_ALL=y
16	15	CONFIG_EMBEDDED=y
17	16	CONFIG_PERF_EVENTS=y

arch/arc/configs/nsim_hs_smp_defconfig+0−1

@@ -9,7 +9,6 @@ CONFIG_NAMESPACES=y · 8 unmodified lines
9	9	# CONFIG_UTS_NS is not set
10	10	# CONFIG_PID_NS is not set
11	11	CONFIG_BLK_DEV_INITRD=y
12		−CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/"
13	12	CONFIG_KALLSYMS_ALL=y
14	13	CONFIG_EMBEDDED=y
15	14	CONFIG_PERF_EVENTS=y

arch/arc/configs/nsimosci_defconfig+0−1

@@ -11,7 +11,6 @@ CONFIG_NAMESPACES=y · 10 unmodified lines
11	11	# CONFIG_UTS_NS is not set
12	12	# CONFIG_PID_NS is not set
13	13	CONFIG_BLK_DEV_INITRD=y
14		−CONFIG_INITRAMFS_SOURCE="../arc_initramfs/"
15	14	CONFIG_KALLSYMS_ALL=y
16	15	CONFIG_EMBEDDED=y
17	16	CONFIG_PERF_EVENTS=y

arch/arc/configs/nsimosci_hs_defconfig+0−1

@@ -11,7 +11,6 @@ CONFIG_NAMESPACES=y · 10 unmodified lines
11	11	# CONFIG_UTS_NS is not set
12	12	# CONFIG_PID_NS is not set
13	13	CONFIG_BLK_DEV_INITRD=y
14		−CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/"
15	14	CONFIG_KALLSYMS_ALL=y
16	15	CONFIG_EMBEDDED=y
17	16	CONFIG_PERF_EVENTS=y

arch/arc/configs/nsimosci_hs_smp_defconfig+0−1

@@ -9,7 +9,6 @@ CONFIG_IKCONFIG_PROC=y · 8 unmodified lines
9	9	# CONFIG_UTS_NS is not set
10	10	# CONFIG_PID_NS is not set
11	11	CONFIG_BLK_DEV_INITRD=y
12		−CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/"
13	12	CONFIG_PERF_EVENTS=y
14	13	# CONFIG_COMPAT_BRK is not set
15	14	CONFIG_KPROBES=y

arch/arc/configs/tb10x_defconfig+0−1

@@ -56,7 +56,6 @@ CONFIG_STMMAC_ETH=y · 55 unmodified lines
56	56	# CONFIG_INPUT is not set
57	57	# CONFIG_SERIO is not set
58	58	# CONFIG_VT is not set
59		−CONFIG_DEVPTS_MULTIPLE_INSTANCES=y
60	59	# CONFIG_LEGACY_PTYS is not set
61	60	# CONFIG_DEVKMEM is not set
62	61	CONFIG_SERIAL_8250=y

arch/arc/include/asm/cache.h+3−1

@@ -48,7 +48,9 @@ · 47 unmodified lines
48	48	})
49	49
50	50	/* Largest line length for either L1 or L2 is 128 bytes */
51		−#define ARCH_DMA_MINALIGN 128
	51	+#define SMP_CACHE_BYTES 128
	52	+#define cache_line_size() SMP_CACHE_BYTES
	53	+#define ARCH_DMA_MINALIGN SMP_CACHE_BYTES
52	54
53	55	extern void arc_cache_init(void);
54	56	extern char arc_cache_mumbojumbo(int cpu_id, char buf, int len);

arch/arc/include/asm/delay.h+3−0

@@ -17,8 +17,11 @@ · 16 unmodified lines
17	17	#ifndef __ASM_ARC_UDELAY_H
18	18	#define __ASM_ARC_UDELAY_H
19	19
	20	+#include <asm-generic/types.h>
20	21	#include <asm/param.h> /* HZ */
21	22
	23	+extern unsigned long loops_per_jiffy;
	24	+
22	25	static inline void __delay(unsigned long loops)
23	26	{
24	27	__asm__ __volatile__(

arch/arc/include/asm/entry-compact.h+6−0

@@ -234,6 +234,9 @@ · 233 unmodified lines
234	234	POP gp
235	235	RESTORE_R12_TO_R0
236	236
	237	+#ifdef CONFIG_ARC_CURR_IN_REG
	238	+ ld r25, [sp, 12]
	239	+#endif
237	240	ld sp, [sp] /* restore original sp */
238	241	/* orig_r0, ECR, user_r25 skipped automatically */
239	242	.endm
@@ -315,6 +318,9 @@ · 75 unmodified lines
315	318	POP gp
316	319	RESTORE_R12_TO_R0
317	320
	321	+#ifdef CONFIG_ARC_CURR_IN_REG
	322	+ ld r25, [sp, 12]
	323	+#endif
318	324	ld sp, [sp] /* restore original sp */
319	325	/* orig_r0, ECR, user_r25 skipped automatically */
320	326	.endm

arch/arc/include/asm/entry.h+0−3

@@ -86,9 +86,6 @@ · 85 unmodified lines
86	86	POP r1
87	87	POP r0
88	88
89		−#ifdef CONFIG_ARC_CURR_IN_REG
90		− ld r25, [sp, 12]
91		−#endif
92	89	.endm
93	90
94	91	/*--------------------------------------------------------------

arch/arc/include/asm/mach_desc.h+0−2

@@ -34,9 +34,7 @@ struct machine_desc { · 33 unmodified lines
34	34	const char *name;
35	35	const char **dt_compat;
36	36	void (*init_early)(void);
37		−#ifdef CONFIG_SMP
38	37	void (*init_per_cpu)(unsigned int);
39		−#endif
40	38	void (*init_machine)(void);
41	39	void (*init_late)(void);
42	40

arch/arc/include/asm/page.h+1−1

@@ -105,7 +105,7 @@ typedef pte_t * pgtable_t; · 104 unmodified lines
105	105	#define virt_addr_valid(kaddr) pfn_valid(virt_to_pfn(kaddr))
106	106
107	107	/* Default Permissions for stack/heaps pages (Non Executable) */
108		−#define VM_DATA_DEFAULT_FLAGS (VM_READ \| VM_WRITE \| VM_MAYREAD \| VM_MAYWRITE)
	108	+#define VM_DATA_DEFAULT_FLAGS (VM_READ \| VM_WRITE \| VM_MAYREAD \| VM_MAYWRITE \| VM_MAYEXEC)
109	109
110	110	#define WANT_PAGE_VIRTUAL 1
111	111

arch/arc/include/asm/pgtable.h+1−1

@@ -377,7 +377,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, · 376 unmodified lines
377	377
378	378	/* Decode a PTE containing swap "identifier "into constituents */
379	379	#define __swp_type(pte_lookalike) (((pte_lookalike).val) & 0x1f)
380		−#define __swp_offset(pte_lookalike) ((pte_lookalike).val << 13)
	380	+#define __swp_offset(pte_lookalike) ((pte_lookalike).val >> 13)
381	381
382	382	/* NOPs, to keep generic kernel happy */
383	383	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })

arch/arc/kernel/irq.c+1−1

@@ -31,10 +31,10 @@ void __init init_IRQ(void) · 30 unmodified lines
31	31	/* a SMP H/w block could do IPI IRQ request here */
32	32	if (plat_smp_ops.init_per_cpu)
33	33	plat_smp_ops.init_per_cpu(smp_processor_id());
	34	+#endif
34	35
35	36	if (machine_desc->init_per_cpu)
36	37	machine_desc->init_per_cpu(smp_processor_id());
37		−#endif
38	38	}
39	39
40	40	/*

arch/arc/kernel/process.c+36−11

@@ -47,7 +47,8 @@ SYSCALL_DEFINE0(arc_gettls) · 46 unmodified lines
47	47	SYSCALL_DEFINE3(arc_usr_cmpxchg, int *, uaddr, int, expected, int, new)
48	48	{
49	49	struct pt_regs *regs = current_pt_regs();
50		− int uval = -EFAULT;
	50	+ u32 uval;
	51	+ int ret;
51	52
52	53	/*
53	54	* This is only for old cores lacking LLOCK/SCOND, which by defintion
@@ -60,23 +61,47 @@ SYSCALL_DEFINE3(arc_usr_cmpxchg, int *, uaddr, int, expected, int, new) · 6 unmodified lines
60	61	/* Z indicates to userspace if operation succeded */
61	62	regs->status32 &= ~STATUS_Z_MASK;
62	63
63		− if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
64		− return -EFAULT;
	64	+ ret = access_ok(VERIFY_WRITE, uaddr, sizeof(*uaddr));
	65	+ if (!ret)
	66	+ goto fail;
65	67
	68	+again:
66	69	preempt_disable();
67	70
68		− if (__get_user(uval, uaddr))
69		− goto done;
	71	+ ret = __get_user(uval, uaddr);
	72	+ if (ret)
	73	+ goto fault;
70	74
71		− if (uval == expected) {
72		− if (!__put_user(new, uaddr))
73		− regs->status32 \|= STATUS_Z_MASK;
74		− }
	75	+ if (uval != expected)
	76	+ goto out;
75	77
76		−done:
77		− preempt_enable();
	78	+ ret = __put_user(new, uaddr);
	79	+ if (ret)
	80	+ goto fault;
	81	+
	82	+ regs->status32 \|= STATUS_Z_MASK;
78	83
	84	+out:
	85	+ preempt_enable();
79	86	return uval;
	87	+
	88	+fault:
	89	+ preempt_enable();
	90	+
	91	+ if (unlikely(ret != -EFAULT))
	92	+ goto fail;
	93	+
	94	+ down_read(&current->mm->mmap_sem);
	95	+ ret = fixup_user_fault(current, current->mm, (unsigned long) uaddr,
	96	+ FAULT_FLAG_WRITE, NULL);
	97	+ up_read(&current->mm->mmap_sem);
	98	+
	99	+ if (likely(!ret))
	100	+ goto again;
	101	+
	102	+fail:
	103	+ force_sig(SIGSEGV, current);
	104	+ return ret;
80	105	}
81	106
82	107	#ifdef CONFIG_ISA_ARCV2

arch/arc/mm/cache.c+14−3

@@ -1038,7 +1038,7 @@ void flush_cache_mm(struct mm_struct *mm) · 1037 unmodified lines
1038	1038	void flush_cache_page(struct vm_area_struct *vma, unsigned long u_vaddr,
1039	1039	unsigned long pfn)
1040	1040	{
1041		− unsigned int paddr = pfn << PAGE_SHIFT;
	1041	+ phys_addr_t paddr = pfn << PAGE_SHIFT;
1042	1042
1043	1043	u_vaddr &= PAGE_MASK;
1044	1044
@@ -1058,8 +1058,9 @@ void flush_anon_page(struct vm_area_struct vma, struct page page, · 13 unmodified lines
1058	1058	unsigned long u_vaddr)
1059	1059	{
1060	1060	/* TBD: do we really need to clear the kernel mapping */
1061		− __flush_dcache_page(page_address(page), u_vaddr);
1062		− __flush_dcache_page(page_address(page), page_address(page));
	1061	+ __flush_dcache_page((phys_addr_t)page_address(page), u_vaddr);
	1062	+ __flush_dcache_page((phys_addr_t)page_address(page),
	1063	+ (phys_addr_t)page_address(page));
1063	1064
1064	1065	}
1065	1066
@@ -1246,6 +1247,16 @@ void __init arc_cache_init_master(void) · 180 unmodified lines
1246	1247	}
1247	1248	}
1248	1249
	1250	+ /*
	1251	+ * Check that SMP_CACHE_BYTES (and hence ARCH_DMA_MINALIGN) is larger
	1252	+ * or equal to any cache line length.
	1253	+ */
	1254	+ BUILD_BUG_ON_MSG(L1_CACHE_BYTES > SMP_CACHE_BYTES,
	1255	+ "SMP_CACHE_BYTES must be >= any cache line length");
	1256	+ if (is_isa_arcv2() && (l2_line_sz > SMP_CACHE_BYTES))
	1257	+ panic("L2 Cache line [%d] > kernel Config [%d]\n",
	1258	+ l2_line_sz, SMP_CACHE_BYTES);
	1259	+
1249	1260	/* Note that SLC disable not formally supported till HS 3.0 */
1250	1261	if (is_isa_arcv2() && l2_line_sz && !slc_enable)
1251	1262	arc_slc_disable();

arch/arc/mm/dma.c+47−2

@@ -129,14 +129,59 @@ int arch_dma_mmap(struct device dev, struct vm_area_struct vma, · 128 unmodified lines
129	129	return ret;
130	130	}
131	131
	132	+/*
	133	+ * Cache operations depending on function and direction argument, inspired by
	134	+ * https://lkml.org/lkml/2018/5/18/979
	135	+ * "dma_sync_*_for_cpu and direction=TO_DEVICE (was Re: [PATCH 02/20]
	136	+ * dma-mapping: provide a generic dma-noncoherent implementation)"
	137	+ *
	138	+ * \| map == for_device \| unmap == for_cpu
	139	+ * \|----------------------------------------------------------------
	140	+ * TO_DEV \| writeback writeback \| none none
	141	+ * FROM_DEV \| invalidate invalidate \| invalidate* invalidate*
	142	+ * BIDIR \| writeback+inv writeback+inv \| invalidate invalidate
	143	+ *
	144	+ * [*] needed for CPU speculative prefetches
	145	+ *
	146	+ * NOTE: we don't check the validity of direction argument as it is done in
	147	+ * upper layer functions (in include/linux/dma-mapping.h)
	148	+ */
	149	+
132	150	void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
133	151	size_t size, enum dma_data_direction dir)
134	152	{
135		− dma_cache_wback(paddr, size);
	153	+ switch (dir) {
	154	+ case DMA_TO_DEVICE:
	155	+ dma_cache_wback(paddr, size);
	156	+ break;
	157	+
	158	+ case DMA_FROM_DEVICE:
	159	+ dma_cache_inv(paddr, size);
	160	+ break;
	161	+
	162	+ case DMA_BIDIRECTIONAL:
	163	+ dma_cache_wback_inv(paddr, size);
	164	+ break;
	165	+
	166	+ default:
	167	+ break;
	168	+ }
136	169	}
137	170
138	171	void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
139	172	size_t size, enum dma_data_direction dir)
140	173	{
141		− dma_cache_inv(paddr, size);
	174	+ switch (dir) {
	175	+ case DMA_TO_DEVICE:
	176	+ break;
	177	+
	178	+ /* FROM_DEVICE invalidate needed if speculative CPU prefetch only */
	179	+ case DMA_FROM_DEVICE:
	180	+ case DMA_BIDIRECTIONAL:
	181	+ dma_cache_inv(paddr, size);
	182	+ break;
	183	+
	184	+ default:
	185	+ break;
	186	+ }
142	187	}

arch/arc/plat-eznps/include/plat/ctop.h+10−0

@@ -21,6 +21,7 @@ · 20 unmodified lines
21	21	#error "Incorrect ctop.h include"
22	22	#endif
23	23
	24	+#include <linux/types.h>
24	25	#include <soc/nps/common.h>
25	26
26	27	/* core auxiliary registers */
@@ -143,6 +144,15 @@ struct nps_host_reg_gim_p_int_dst { · 116 unmodified lines
143	144	};
144	145
145	146	/* AUX registers definition */
	147	+struct nps_host_reg_aux_dpc {
	148	+ union {
	149	+ struct {
	150	+ u32 ien:1, men:1, hen:1, reserved:29;
	151	+ };
	152	+ u32 value;
	153	+ };
	154	+};
	155	+
146	156	struct nps_host_reg_aux_udmc {
147	157	union {
148	158	struct {

arch/arc/plat-eznps/mtm.c+4−2

@@ -15,6 +15,8 @@ · 14 unmodified lines
15	15	*/
16	16
17	17	#include <linux/smp.h>
	18	+#include <linux/init.h>
	19	+#include <linux/kernel.h>
18	20	#include <linux/io.h>
19	21	#include <linux/log2.h>
20	22	#include <asm/arcregs.h>
@@ -157,10 +159,10 @@ void mtm_enable_core(unsigned int cpu) · 136 unmodified lines
157	159	/* Verify and set the value of the mtm hs counter */
158	160	static int __init set_mtm_hs_ctr(char *ctr_str)
159	161	{
160		− long hs_ctr;
	162	+ int hs_ctr;
161	163	int ret;
162	164
163		− ret = kstrtol(ctr_str, 0, &hs_ctr);
	165	+ ret = kstrtoint(ctr_str, 0, &hs_ctr);
164	166
165	167	if (ret \|\| hs_ctr > MT_HS_CNT_MAX \|\| hs_ctr < MT_HS_CNT_MIN) {
166	168	pr_err("** Invalid @nps_mtm_hs_ctr [%d] needs to be [%d:%d] (incl)\n",

arch/arc/plat-hsdk/Kconfig+3−0

@@ -7,5 +7,8 @@ · 6 unmodified lines
7	7
8	8	menuconfig ARC_SOC_HSDK
9	9	bool "ARC HS Development Kit SOC"
	10	+ depends on ISA_ARCV2
	11	+ select ARC_HAS_ACCL_REGS
10	12	select CLK_HSDK
11	13	select RESET_HSDK
	14	+ select MIGHT_HAVE_PCI

arch/arc/plat-hsdk/platform.c+62−0

@@ -42,6 +42,66 @@ static void __init hsdk_init_per_cpu(unsigned int cpu) · 41 unmodified lines
42	42	#define SDIO_UHS_REG_EXT (SDIO_BASE + 0x108)
43	43	#define SDIO_UHS_REG_EXT_DIV_2 (2 << 30)
44	44
	45	+#define HSDK_GPIO_INTC (ARC_PERIPHERAL_BASE + 0x3000)
	46	+
	47	+static void __init hsdk_enable_gpio_intc_wire(void)
	48	+{
	49	+ /*
	50	+ * Peripherals on CPU Card are wired to cpu intc via intermediate
	51	+ * DW APB GPIO blocks (mainly for debouncing)
	52	+ *
	53	+ * ---------------------
	54	+ * \| snps,archs-intc \|
	55	+ * ---------------------
	56	+ * \|
	57	+ * ----------------------
	58	+ * \| snps,archs-idu-intc \|
	59	+ * ----------------------
	60	+ * \| \| \| \| \|
	61	+ * \| [eth] [USB] [... other peripherals]
	62	+ * \|
	63	+ * -------------------
	64	+ * \| snps,dw-apb-intc \|
	65	+ * -------------------
	66	+ * \| \| \| \|
	67	+ * [Bt] [HAPS] [... other peripherals]
	68	+ *
	69	+ * Current implementation of "irq-dw-apb-ictl" driver doesn't work well
	70	+ * with stacked INTCs. In particular problem happens if its master INTC
	71	+ * not yet instantiated. See discussion here -
	72	+ * https://lkml.org/lkml/2015/3/4/755
	73	+ *
	74	+ * So setup the first gpio block as a passive pass thru and hide it from
	75	+ * DT hardware topology - connect intc directly to cpu intc
	76	+ * The GPIO "wire" needs to be init nevertheless (here)
	77	+ *
	78	+ * One side adv is that peripheral interrupt handling avoids one nested
	79	+ * intc ISR hop
	80	+ *
	81	+ * According to HSDK User's Manual [1], "Table 2 Interrupt Mapping"
	82	+ * we have the following GPIO input lines used as sources of interrupt:
	83	+ * - GPIO[0] - Bluetooth interrupt of RS9113 module
	84	+ * - GPIO[2] - HAPS interrupt (on HapsTrak 3 connector)
	85	+ * - GPIO[3] - Audio codec (MAX9880A) interrupt
	86	+ * - GPIO[8-23] - Available on Arduino and PMOD_x headers
	87	+ * For now there's no use of Arduino and PMOD_x headers in Linux
	88	+ * use-case so we only enable lines 0, 2 and 3.
	89	+ *
	90	+ * [1] https://github.com/foss-for-synopsys-dwc-arc-processors/ARC-Development-Systems-Forum/wiki/docs/ARC_HSDK_User_Guide.pdf
	91	+ */
	92	+#define GPIO_INTEN (HSDK_GPIO_INTC + 0x30)
	93	+#define GPIO_INTMASK (HSDK_GPIO_INTC + 0x34)
	94	+#define GPIO_INTTYPE_LEVEL (HSDK_GPIO_INTC + 0x38)
	95	+#define GPIO_INT_POLARITY (HSDK_GPIO_INTC + 0x3c)
	96	+#define GPIO_INT_CONNECTED_MASK 0x0d
	97	+
	98	+ iowrite32(0xffffffff, (void __iomem *) GPIO_INTMASK);
	99	+ iowrite32(~GPIO_INT_CONNECTED_MASK, (void __iomem *) GPIO_INTMASK);
	100	+ iowrite32(0x00000000, (void __iomem *) GPIO_INTTYPE_LEVEL);
	101	+ iowrite32(0xffffffff, (void __iomem *) GPIO_INT_POLARITY);
	102	+ iowrite32(GPIO_INT_CONNECTED_MASK, (void __iomem *) GPIO_INTEN);
	103	+}
	104	+
45	105	static void __init hsdk_init_early(void)
46	106	{
47	107	/*
@@ -62,6 +122,8 @@ static void __init hsdk_init_early(void) · 14 unmodified lines
62	122	* minimum possible div-by-2.
63	123	*/
64	124	iowrite32(SDIO_UHS_REG_EXT_DIV_2, (void __iomem *) SDIO_UHS_REG_EXT);
	125	+
	126	+ hsdk_enable_gpio_intc_wire();
65	127	}
66	128
67	129	static const char *hsdk_compat[] __initconst = {

arch/arm/Kconfig+7−1

@@ -1245,8 +1245,14 @@ config PCI · 1244 unmodified lines
1245	1245	VESA. If you have PCI, say Y, otherwise N.
1246	1246
1247	1247	config PCI_DOMAINS
1248		− bool
	1248	+ bool "Support for multiple PCI domains"
1249	1249	depends on PCI
	1250	+ help
	1251	+ Enable PCI domains kernel management. Say Y if your machine
	1252	+ has a PCI bus hierarchy that requires more than one PCI
	1253	+ domain (aka segment) to be correctly managed. Say N otherwise.
	1254	+
	1255	+ If you don't know what to do here, say N.
1250	1256
1251	1257	config PCI_DOMAINS_GENERIC
1252	1258	def_bool PCI_DOMAINS

arch/arm/boot/dts/am335x-bone-common.dtsi+0−1

@@ -168,7 +168,6 @@ · 167 unmodified lines
168	168	AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP \| MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
169	169	AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP \| MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
170	170	AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP \| MUX_MODE0) /* mmc0_clk.mmc0_clk */
171		− AM33XX_IOPAD(0x9a0, PIN_INPUT \| MUX_MODE4) /* mcasp0_aclkr.mmc0_sdwp */
172	171	>;
173	172	};
174	173

arch/arm/boot/dts/am3517.dtsi+9−0

@@ -39,6 +39,8 @@ · 38 unmodified lines
39	39	ti,davinci-ctrl-ram-size = <0x2000>;
40	40	ti,davinci-rmii-en = /bits/ 8 <1>;
41	41	local-mac-address = [ 00 00 00 00 00 00 ];
	42	+ clocks = <&emac_ick>;
	43	+ clock-names = "ick";
42	44	};
43	45
44	46	davinci_mdio: ethernet@5c030000 {
@@ -49,6 +51,8 @@ · 4 unmodified lines
49	51	bus_freq = <1000000>;
50	52	#address-cells = <1>;
51	53	#size-cells = <0>;
	54	+ clocks = <&emac_fck>;
	55	+ clock-names = "fck";
52	56	};
53	57
54	58	uart4: serial@4809e000 {
@@ -87,6 +91,11 @@ · 32 unmodified lines
87	91	};
88	92	};
89	93
	94	+/* Table Table 5-79 of the TRM shows 480ab000 is reserved */
	95	+&usb_otg_hs {
	96	+ status = "disabled";
	97	+};
	98	+
90	99	&iva {
91	100	status = "disabled";
92	101	};

arch/arm/boot/dts/am437x-sk-evm.dts+2−0

@@ -610,6 +610,8 @@ · 609 unmodified lines
610	610
611	611	touchscreen-size-x = <480>;
612	612	touchscreen-size-y = <272>;
	613	+
	614	+ wakeup-source;
613	615	};
614	616
615	617	tlv320aic3106: tlv320aic3106@1b {

arch/arm/boot/dts/armada-385-synology-ds116.dts+1−1

@@ -139,7 +139,7 @@ · 138 unmodified lines
139	139	3700 5
140	140	3900 6
141	141	4000 7>;
142		− cooling-cells = <2>;
	142	+ #cooling-cells = <2>;
143	143	};
144	144
145	145	gpio-leds {

arch/arm/boot/dts/armada-38x.dtsi+1−1

@@ -547,7 +547,7 @@ · 546 unmodified lines
547	547
548	548	thermal: thermal@e8078 {
549	549	compatible = "marvell,armada380-thermal";
550		− reg = <0xe4078 0x4>, <0xe4074 0x4>;
	550	+ reg = <0xe4078 0x4>, <0xe4070 0x8>;
551	551	status = "okay";
552	552	};
553	553

arch/arm/boot/dts/bcm-cygnus.dtsi+12−12

@@ -216,7 +216,7 @@ · 215 unmodified lines
216	216	reg = <0x18008000 0x100>;
217	217	#address-cells = <1>;
218	218	#size-cells = <0>;
219		− interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
	219	+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
220	220	clock-frequency = <100000>;
221	221	status = "disabled";
222	222	};
@@ -245,7 +245,7 @@ · 22 unmodified lines
245	245	reg = <0x1800b000 0x100>;
246	246	#address-cells = <1>;
247	247	#size-cells = <0>;
248		− interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
	248	+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
249	249	clock-frequency = <100000>;
250	250	status = "disabled";
251	251	};
@@ -256,7 +256,7 @@ · 4 unmodified lines
256	256
257	257	#interrupt-cells = <1>;
258	258	interrupt-map-mask = <0 0 0 0>;
259		− interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
	259	+ interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
260	260
261	261	linux,pci-domain = <0>;
262	262
@@ -278,10 +278,10 @@ · 15 unmodified lines
278	278	compatible = "brcm,iproc-msi";
279	279	msi-controller;
280	280	interrupt-parent = <&gic>;
281		− interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
282		− <GIC_SPI 97 IRQ_TYPE_NONE>,
283		− <GIC_SPI 98 IRQ_TYPE_NONE>,
284		− <GIC_SPI 99 IRQ_TYPE_NONE>;
	281	+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
	282	+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
	283	+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
	284	+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
285	285	};
286	286	};
287	287
@@ -291,7 +291,7 @@ · 3 unmodified lines
291	291
292	292	#interrupt-cells = <1>;
293	293	interrupt-map-mask = <0 0 0 0>;
294		− interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
	294	+ interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
295	295
296	296	linux,pci-domain = <1>;
297	297
@@ -313,10 +313,10 @@ · 15 unmodified lines
313	313	compatible = "brcm,iproc-msi";
314	314	msi-controller;
315	315	interrupt-parent = <&gic>;
316		− interrupts = <GIC_SPI 102 IRQ_TYPE_NONE>,
317		− <GIC_SPI 103 IRQ_TYPE_NONE>,
318		− <GIC_SPI 104 IRQ_TYPE_NONE>,
319		− <GIC_SPI 105 IRQ_TYPE_NONE>;
	316	+ interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
	317	+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
	318	+ <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
	319	+ <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
320	320	};
321	321	};
322	322

arch/arm/boot/dts/bcm-hr2.dtsi+12−12

@@ -264,7 +264,7 @@ · 263 unmodified lines
264	264	reg = <0x38000 0x50>;
265	265	#address-cells = <1>;
266	266	#size-cells = <0>;
267		− interrupts = <GIC_SPI 95 IRQ_TYPE_NONE>;
	267	+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
268	268	clock-frequency = <100000>;
269	269	};
270	270
@@ -279,7 +279,7 @@ · 8 unmodified lines
279	279	reg = <0x3b000 0x50>;
280	280	#address-cells = <1>;
281	281	#size-cells = <0>;
282		− interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>;
	282	+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
283	283	clock-frequency = <100000>;
284	284	};
285	285	};
@@ -300,7 +300,7 @@ · 14 unmodified lines
300	300
301	301	#interrupt-cells = <1>;
302	302	interrupt-map-mask = <0 0 0 0>;
303		− interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_NONE>;
	303	+ interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
304	304
305	305	linux,pci-domain = <0>;
306	306
@@ -322,10 +322,10 @@ · 15 unmodified lines
322	322	compatible = "brcm,iproc-msi";
323	323	msi-controller;
324	324	interrupt-parent = <&gic>;
325		− interrupts = <GIC_SPI 182 IRQ_TYPE_NONE>,
326		− <GIC_SPI 183 IRQ_TYPE_NONE>,
327		− <GIC_SPI 184 IRQ_TYPE_NONE>,
328		− <GIC_SPI 185 IRQ_TYPE_NONE>;
	325	+ interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
	326	+ <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
	327	+ <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
	328	+ <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
329	329	brcm,pcie-msi-inten;
330	330	};
331	331	};
@@ -336,7 +336,7 @@ · 4 unmodified lines
336	336
337	337	#interrupt-cells = <1>;
338	338	interrupt-map-mask = <0 0 0 0>;
339		− interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_NONE>;
	339	+ interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
340	340
341	341	linux,pci-domain = <1>;
342	342
@@ -358,10 +358,10 @@ · 15 unmodified lines
358	358	compatible = "brcm,iproc-msi";
359	359	msi-controller;
360	360	interrupt-parent = <&gic>;
361		− interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>,
362		− <GIC_SPI 189 IRQ_TYPE_NONE>,
363		− <GIC_SPI 190 IRQ_TYPE_NONE>,
364		− <GIC_SPI 191 IRQ_TYPE_NONE>;
	361	+ interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
	362	+ <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
	363	+ <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
	364	+ <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
365	365	brcm,pcie-msi-inten;
366	366	};
367	367	};

arch/arm/boot/dts/bcm-nsp.dtsi+16−16

@@ -391,7 +391,7 @@ · 390 unmodified lines
391	391	reg = <0x38000 0x50>;
392	392	#address-cells = <1>;
393	393	#size-cells = <0>;
394		− interrupts = <GIC_SPI 89 IRQ_TYPE_NONE>;
	394	+ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
395	395	clock-frequency = <100000>;
396	396	dma-coherent;
397	397	status = "disabled";
@@ -496,7 +496,7 @@ · 98 unmodified lines
496	496
497	497	#interrupt-cells = <1>;
498	498	interrupt-map-mask = <0 0 0 0>;
499		− interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_NONE>;
	499	+ interrupt-map = <0 0 0 0 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
500	500
501	501	linux,pci-domain = <0>;
502	502
@@ -519,10 +519,10 @@ · 16 unmodified lines
519	519	compatible = "brcm,iproc-msi";
520	520	msi-controller;
521	521	interrupt-parent = <&gic>;
522		− interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>,
523		− <GIC_SPI 128 IRQ_TYPE_NONE>,
524		− <GIC_SPI 129 IRQ_TYPE_NONE>,
525		− <GIC_SPI 130 IRQ_TYPE_NONE>;
	522	+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
	523	+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
	524	+ <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
	525	+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
526	526	brcm,pcie-msi-inten;
527	527	};
528	528	};
@@ -533,7 +533,7 @@ · 4 unmodified lines
533	533
534	534	#interrupt-cells = <1>;
535	535	interrupt-map-mask = <0 0 0 0>;
536		− interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_NONE>;
	536	+ interrupt-map = <0 0 0 0 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
537	537
538	538	linux,pci-domain = <1>;
539	539
@@ -556,10 +556,10 @@ · 16 unmodified lines
556	556	compatible = "brcm,iproc-msi";
557	557	msi-controller;
558	558	interrupt-parent = <&gic>;
559		− interrupts = <GIC_SPI 133 IRQ_TYPE_NONE>,
560		− <GIC_SPI 134 IRQ_TYPE_NONE>,
561		− <GIC_SPI 135 IRQ_TYPE_NONE>,
562		− <GIC_SPI 136 IRQ_TYPE_NONE>;
	559	+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
	560	+ <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
	561	+ <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
	562	+ <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
563	563	brcm,pcie-msi-inten;
564	564	};
565	565	};
@@ -570,7 +570,7 @@ · 4 unmodified lines
570	570
571	571	#interrupt-cells = <1>;
572	572	interrupt-map-mask = <0 0 0 0>;
573		− interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_NONE>;
	573	+ interrupt-map = <0 0 0 0 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
574	574
575	575	linux,pci-domain = <2>;
576	576
@@ -593,10 +593,10 @@ · 16 unmodified lines
593	593	compatible = "brcm,iproc-msi";
594	594	msi-controller;
595	595	interrupt-parent = <&gic>;
596		− interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>,
597		− <GIC_SPI 140 IRQ_TYPE_NONE>,
598		− <GIC_SPI 141 IRQ_TYPE_NONE>,
599		− <GIC_SPI 142 IRQ_TYPE_NONE>;
	596	+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
	597	+ <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
	598	+ <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
	599	+ <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
600	600	brcm,pcie-msi-inten;
601	601	};
602	602	};

arch/arm/boot/dts/bcm5301x.dtsi+1−1

@@ -365,7 +365,7 @@ · 364 unmodified lines
365	365	i2c0: i2c@18009000 {
366	366	compatible = "brcm,iproc-i2c";
367	367	reg = <0x18009000 0x50>;
368		− interrupts = <GIC_SPI 121 IRQ_TYPE_NONE>;
	368	+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
369	369	#address-cells = <1>;
370	370	#size-cells = <0>;
371	371	clock-frequency = <100000>;

arch/arm/boot/dts/da850.dtsi+1−5

@@ -549,11 +549,7 @@ · 548 unmodified lines
549	549	gpio-controller;
550	550	#gpio-cells = <2>;
551	551	reg = <0x226000 0x1000>;
552		− interrupts = <42 IRQ_TYPE_EDGE_BOTH
553		− 43 IRQ_TYPE_EDGE_BOTH 44 IRQ_TYPE_EDGE_BOTH
554		− 45 IRQ_TYPE_EDGE_BOTH 46 IRQ_TYPE_EDGE_BOTH
555		− 47 IRQ_TYPE_EDGE_BOTH 48 IRQ_TYPE_EDGE_BOTH
556		− 49 IRQ_TYPE_EDGE_BOTH 50 IRQ_TYPE_EDGE_BOTH>;
	552	+ interrupts = <42 43 44 45 46 47 48 49 50>;
557	553	ti,ngpio = <144>;
558	554	ti,davinci-gpio-unbanked = <0>;
559	555	status = "disabled";

arch/arm/boot/dts/dra7.dtsi+1−1

@@ -1580,7 +1580,6 @@ · 1579 unmodified lines
1580	1580	dr_mode = "otg";
1581	1581	snps,dis_u3_susphy_quirk;
1582	1582	snps,dis_u2_susphy_quirk;
1583		− snps,dis_metastability_quirk;
1584	1583	};
1585	1584	};
1586	1585
@@ -1608,6 +1607,7 @@ · 21 unmodified lines
1608	1607	dr_mode = "otg";
1609	1608	snps,dis_u3_susphy_quirk;
1610	1609	snps,dis_u2_susphy_quirk;
	1610	+ snps,dis_metastability_quirk;
1611	1611	};
1612	1612	};
1613	1613

arch/arm/boot/dts/imx51-zii-rdu1.dts+1−1

@@ -770,7 +770,7 @@ · 769 unmodified lines
770	770
771	771	pinctrl_ts: tsgrp {
772	772	fsl,pins = <
773		− MX51_PAD_CSI1_D8__GPIO3_12 0x85
	773	+ MX51_PAD_CSI1_D8__GPIO3_12 0x04
774	774	MX51_PAD_CSI1_D9__GPIO3_13 0x85
775	775	>;
776	776	};

arch/arm/boot/dts/imx6q.dtsi+1−1

@@ -90,7 +90,7 @@ · 89 unmodified lines
90	90	clocks = <&clks IMX6Q_CLK_ECSPI5>,
91	91	<&clks IMX6Q_CLK_ECSPI5>;
92	92	clock-names = "ipg", "per";
93		− dmas = <&sdma 11 7 1>, <&sdma 12 7 2>;
	93	+ dmas = <&sdma 11 8 1>, <&sdma 12 8 2>;
94	94	dma-names = "rx", "tx";
95	95	status = "disabled";
96	96	};

arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi+1−1

@@ -692,7 +692,7 @@ · 691 unmodified lines
692	692	dsa,member = <0 0>;
693	693	eeprom-length = <512>;
694	694	interrupt-parent = <&gpio6>;
695		− interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
	695	+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
696	696	interrupt-controller;
697	697	#interrupt-cells = <2>;
698	698

arch/arm/boot/dts/imx6sx.dtsi+1−1

@@ -1344,7 +1344,7 @@ · 1343 unmodified lines
1344	1344	ranges = <0x81000000 0 0 0x08f80000 0 0x00010000 /* downstream I/O */
1345	1345	0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; /* non-prefetchable memory */
1346	1346	num-lanes = <1>;
1347		− interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
	1347	+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1348	1348	interrupt-names = "msi";
1349	1349	#interrupt-cells = <1>;
1350	1350	interrupt-map-mask = <0 0 0 0x7>;

arch/arm/boot/dts/omap4-droid4-xt894.dts+3−6

@@ -159,13 +159,7 @@ · 158 unmodified lines
159	159
160	160	dais = <&mcbsp2_port>, <&mcbsp3_port>;
161	161	};
162		−};
163		−
164		−&dss {
165		− status = "okay";
166		−};
167	162
168		−&gpio6 {
169	163	pwm8: dmtimer-pwm-8 {
170	164	pinctrl-names = "default";
171	165	pinctrl-0 = <&vibrator_direction_pin>;
@@ -192,7 +186,10 @@ · 20 unmodified lines
192	186	pwm-names = "enable", "direction";
193	187	direction-duty-cycle-ns = <10000000>;
194	188	};
	189	+};
195	190
	191	+&dss {
	192	+ status = "okay";
196	193	};
197	194
198	195	&dsi1 {

arch/arm/boot/dts/socfpga.dtsi+2−2

@@ -748,13 +748,13 @@ · 747 unmodified lines
748	748	nand0: nand@ff900000 {
749	749	#address-cells = <0x1>;
750	750	#size-cells = <0x1>;
751		− compatible = "denali,denali-nand-dt";
	751	+ compatible = "altr,socfpga-denali-nand";
752	752	reg = <0xff900000 0x100000>,
753	753	<0xffb80000 0x10000>;
754	754	reg-names = "nand_data", "denali_reg";
755	755	interrupts = <0x0 0x90 0x4>;
756	756	dma-mask = <0xffffffff>;
757		− clocks = <&nand_clk>;
	757	+ clocks = <&nand_x_clk>;
758	758	status = "disabled";
759	759	};
760	760

arch/arm/boot/dts/socfpga_arria10.dtsi+2−3

@@ -593,8 +593,7 @@ · 592 unmodified lines
593	593	#size-cells = <0>;
594	594	reg = <0xffda5000 0x100>;
595	595	interrupts = <0 102 4>;
596		− num-chipselect = <4>;
597		− bus-num = <0>;
	596	+ num-cs = <4>;
598	597	/32bit_access;/
599	598	tx-dma-channel = <&pdma 16>;
600	599	rx-dma-channel = <&pdma 17>;
@@ -633,7 +632,7 @@ · 32 unmodified lines
633	632	nand: nand@ffb90000 {
634	633	#address-cells = <1>;
635	634	#size-cells = <1>;
636		− compatible = "denali,denali-nand-dt", "altr,socfpga-denali-nand";
	635	+ compatible = "altr,socfpga-denali-nand";
637	636	reg = <0xffb90000 0x72000>,
638	637	<0xffb80000 0x10000>;
639	638	reg-names = "nand_data", "denali_reg";

arch/arm/common/Makefile+1−1

@@ -10,7 +10,7 @@ obj-$(CONFIG_DMABOUNCE) += dmabounce.o · 9 unmodified lines
10	10	obj-$(CONFIG_SHARP_LOCOMO) += locomo.o
11	11	obj-$(CONFIG_SHARP_PARAM) += sharpsl_param.o
12	12	obj-$(CONFIG_SHARP_SCOOP) += scoop.o
13		−obj-$(CONFIG_SMP) += secure_cntvoff.o
	13	+obj-$(CONFIG_CPU_V7) += secure_cntvoff.o
14	14	obj-$(CONFIG_PCI_HOST_ITE8152) += it8152.o
15	15	obj-$(CONFIG_MCPM) += mcpm_head.o mcpm_entry.o mcpm_platsmp.o vlock.o
16	16	CFLAGS_REMOVE_mcpm_entry.o = -pg

arch/arm/configs/imx_v4_v5_defconfig+2−0

@@ -141,9 +141,11 @@ CONFIG_USB_STORAGE=y · 140 unmodified lines
141	141	CONFIG_USB_CHIPIDEA=y
142	142	CONFIG_USB_CHIPIDEA_UDC=y
143	143	CONFIG_USB_CHIPIDEA_HOST=y
	144	+CONFIG_USB_CHIPIDEA_ULPI=y
144	145	CONFIG_NOP_USB_XCEIV=y
145	146	CONFIG_USB_GADGET=y
146	147	CONFIG_USB_ETH=m
	148	+CONFIG_USB_ULPI_BUS=y
147	149	CONFIG_MMC=y
148	150	CONFIG_MMC_SDHCI=y
149	151	CONFIG_MMC_SDHCI_PLTFM=y

arch/arm/configs/imx_v6_v7_defconfig+2−0

@@ -302,6 +302,7 @@ CONFIG_USB_STORAGE=y · 301 unmodified lines
302	302	CONFIG_USB_CHIPIDEA=y
303	303	CONFIG_USB_CHIPIDEA_UDC=y
304	304	CONFIG_USB_CHIPIDEA_HOST=y
	305	+CONFIG_USB_CHIPIDEA_ULPI=y
305	306	CONFIG_USB_SERIAL=m
306	307	CONFIG_USB_SERIAL_GENERIC=y
307	308	CONFIG_USB_SERIAL_FTDI_SIO=m
@@ -338,6 +339,7 @@ CONFIG_USB_GADGETFS=m · 30 unmodified lines
338	339	CONFIG_USB_FUNCTIONFS=m
339	340	CONFIG_USB_MASS_STORAGE=m
340	341	CONFIG_USB_G_SERIAL=m
	342	+CONFIG_USB_ULPI_BUS=y
341	343	CONFIG_MMC=y
342	344	CONFIG_MMC_SDHCI=y
343	345	CONFIG_MMC_SDHCI_PLTFM=y

arch/arm/configs/multi_v7_defconfig+155−223

@@ -1,5 +1,4 @@
1	1	CONFIG_SYSVIPC=y
2		−CONFIG_FHANDLE=y
3	2	CONFIG_NO_HZ=y
4	3	CONFIG_HIGH_RES_TIMERS=y
5	4	CONFIG_CGROUPS=y
@@ -10,20 +9,10 @@ CONFIG_MODULES=y · 4 unmodified lines
10	9	CONFIG_MODULE_UNLOAD=y
11	10	CONFIG_PARTITION_ADVANCED=y
12	11	CONFIG_CMDLINE_PARTITION=y
13		−CONFIG_ARCH_MULTI_V7=y
14		−# CONFIG_ARCH_MULTI_V5 is not set
15		−# CONFIG_ARCH_MULTI_V4 is not set
16	12	CONFIG_ARCH_VIRT=y
17	13	CONFIG_ARCH_ALPINE=y
18	14	CONFIG_ARCH_ARTPEC=y
19	15	CONFIG_MACH_ARTPEC6=y
20		−CONFIG_ARCH_MVEBU=y
21		−CONFIG_MACH_ARMADA_370=y
22		−CONFIG_MACH_ARMADA_375=y
23		−CONFIG_MACH_ARMADA_38X=y
24		−CONFIG_MACH_ARMADA_39X=y
25		−CONFIG_MACH_ARMADA_XP=y
26		−CONFIG_MACH_DOVE=y
27	16	CONFIG_ARCH_AT91=y
28	17	CONFIG_SOC_SAMA5D2=y
29	18	CONFIG_SOC_SAMA5D3=y
@@ -32,9 +21,9 @@ CONFIG_ARCH_BCM=y · 2 unmodified lines
32	21	CONFIG_ARCH_BCM_CYGNUS=y
33	22	CONFIG_ARCH_BCM_HR2=y
34	23	CONFIG_ARCH_BCM_NSP=y
35		−CONFIG_ARCH_BCM_21664=y
36		−CONFIG_ARCH_BCM_281XX=y
37	24	CONFIG_ARCH_BCM_5301X=y
	25	+CONFIG_ARCH_BCM_281XX=y
	26	+CONFIG_ARCH_BCM_21664=y
38	27	CONFIG_ARCH_BCM2835=y
39	28	CONFIG_ARCH_BCM_63XX=y
40	29	CONFIG_ARCH_BRCMSTB=y
@@ -43,14 +32,14 @@ CONFIG_MACH_BERLIN_BG2=y · 2 unmodified lines
43	32	CONFIG_MACH_BERLIN_BG2CD=y
44	33	CONFIG_MACH_BERLIN_BG2Q=y
45	34	CONFIG_ARCH_DIGICOLOR=y
	35	+CONFIG_ARCH_EXYNOS=y
	36	+CONFIG_EXYNOS5420_MCPM=y
46	37	CONFIG_ARCH_HIGHBANK=y
47	38	CONFIG_ARCH_HISI=y
48	39	CONFIG_ARCH_HI3xxx=y
49		−CONFIG_ARCH_HIX5HD2=y
50	40	CONFIG_ARCH_HIP01=y
51	41	CONFIG_ARCH_HIP04=y
52		−CONFIG_ARCH_KEYSTONE=y
53		−CONFIG_ARCH_MESON=y
	42	+CONFIG_ARCH_HIX5HD2=y
54	43	CONFIG_ARCH_MXC=y
55	44	CONFIG_SOC_IMX50=y
56	45	CONFIG_SOC_IMX51=y
@@ -60,29 +49,30 @@ CONFIG_SOC_IMX6SL=y · 3 unmodified lines
60	49	CONFIG_SOC_IMX6SX=y
61	50	CONFIG_SOC_IMX6UL=y
62	51	CONFIG_SOC_IMX7D=y
63		−CONFIG_SOC_VF610=y
64	52	CONFIG_SOC_LS1021A=y
	53	+CONFIG_SOC_VF610=y
	54	+CONFIG_ARCH_KEYSTONE=y
	55	+CONFIG_ARCH_MEDIATEK=y
	56	+CONFIG_ARCH_MESON=y
	57	+CONFIG_ARCH_MVEBU=y
	58	+CONFIG_MACH_ARMADA_370=y
	59	+CONFIG_MACH_ARMADA_375=y
	60	+CONFIG_MACH_ARMADA_38X=y
	61	+CONFIG_MACH_ARMADA_39X=y
	62	+CONFIG_MACH_ARMADA_XP=y
	63	+CONFIG_MACH_DOVE=y
65	64	CONFIG_ARCH_OMAP3=y
66	65	CONFIG_ARCH_OMAP4=y
67	66	CONFIG_SOC_OMAP5=y
68	67	CONFIG_SOC_AM33XX=y
69	68	CONFIG_SOC_AM43XX=y
70	69	CONFIG_SOC_DRA7XX=y
	70	+CONFIG_ARCH_SIRF=y
71	71	CONFIG_ARCH_QCOM=y
72		−CONFIG_ARCH_MEDIATEK=y
73	72	CONFIG_ARCH_MSM8X60=y
74	73	CONFIG_ARCH_MSM8960=y
75	74	CONFIG_ARCH_MSM8974=y
76	75	CONFIG_ARCH_ROCKCHIP=y
77		−CONFIG_ARCH_SOCFPGA=y
78		−CONFIG_PLAT_SPEAR=y
79		−CONFIG_ARCH_SPEAR13XX=y
80		−CONFIG_MACH_SPEAR1310=y
81		−CONFIG_MACH_SPEAR1340=y
82		−CONFIG_ARCH_STI=y
83		−CONFIG_ARCH_STM32=y
84		−CONFIG_ARCH_EXYNOS=y
85		−CONFIG_EXYNOS5420_MCPM=y
86	76	CONFIG_ARCH_RENESAS=y
87	77	CONFIG_ARCH_EMEV2=y
88	78	CONFIG_ARCH_R7S72100=y
@@ -99,40 +89,33 @@ CONFIG_ARCH_R8A7792=y · 10 unmodified lines
99	89	CONFIG_ARCH_R8A7793=y
100	90	CONFIG_ARCH_R8A7794=y
101	91	CONFIG_ARCH_SH73A0=y
	92	+CONFIG_ARCH_SOCFPGA=y
	93	+CONFIG_PLAT_SPEAR=y
	94	+CONFIG_ARCH_SPEAR13XX=y
	95	+CONFIG_MACH_SPEAR1310=y
	96	+CONFIG_MACH_SPEAR1340=y
	97	+CONFIG_ARCH_STI=y
	98	+CONFIG_ARCH_STM32=y
102	99	CONFIG_ARCH_SUNXI=y
103		−CONFIG_ARCH_SIRF=y
104	100	CONFIG_ARCH_TEGRA=y
105		−CONFIG_ARCH_TEGRA_2x_SOC=y
106		−CONFIG_ARCH_TEGRA_3x_SOC=y
107		−CONFIG_ARCH_TEGRA_114_SOC=y
108		−CONFIG_ARCH_TEGRA_124_SOC=y
109	101	CONFIG_ARCH_UNIPHIER=y
110	102	CONFIG_ARCH_U8500=y
111		−CONFIG_MACH_HREFV60=y
112		−CONFIG_MACH_SNOWBALL=y
113	103	CONFIG_ARCH_VEXPRESS=y
114	104	CONFIG_ARCH_VEXPRESS_TC2_PM=y
115	105	CONFIG_ARCH_WM8850=y
116	106	CONFIG_ARCH_ZYNQ=y
117		−CONFIG_TRUSTED_FOUNDATIONS=y
118		−CONFIG_PCI=y
119		−CONFIG_PCI_HOST_GENERIC=y
120		−CONFIG_PCI_DRA7XX=y
121		−CONFIG_PCI_DRA7XX_EP=y
122		−CONFIG_PCI_KEYSTONE=y
123		−CONFIG_PCI_MSI=y
	107	+CONFIG_PCIEPORTBUS=y
124	108	CONFIG_PCI_MVEBU=y
125	109	CONFIG_PCI_TEGRA=y
126	110	CONFIG_PCI_RCAR_GEN2=y
127	111	CONFIG_PCIE_RCAR=y
128		−CONFIG_PCIEPORTBUS=y
	112	+CONFIG_PCI_DRA7XX_EP=y
	113	+CONFIG_PCI_KEYSTONE=y
129	114	CONFIG_PCI_ENDPOINT=y
130	115	CONFIG_PCI_ENDPOINT_CONFIGFS=y
131	116	CONFIG_PCI_EPF_TEST=m
132	117	CONFIG_SMP=y
133	118	CONFIG_NR_CPUS=16
134		−CONFIG_HIGHPTE=y
135		−CONFIG_CMA=y
136	119	CONFIG_SECCOMP=y
137	120	CONFIG_ARM_APPENDED_DTB=y
138	121	CONFIG_ARM_ATAG_DTB_COMPAT=y
@@ -145,14 +128,14 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=m · 6 unmodified lines
145	128	CONFIG_CPU_FREQ_GOV_USERSPACE=m
146	129	CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
147	130	CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
	131	+CONFIG_CPUFREQ_DT=y
148	132	CONFIG_ARM_IMX6Q_CPUFREQ=y
149	133	CONFIG_QORIQ_CPUFREQ=y
150	134	CONFIG_CPU_IDLE=y
151	135	CONFIG_ARM_CPUIDLE=y
152		−CONFIG_NEON=y
153		−CONFIG_KERNEL_MODE_NEON=y
154	136	CONFIG_ARM_ZYNQ_CPUIDLE=y
155	137	CONFIG_ARM_EXYNOS_CPUIDLE=y
	138	+CONFIG_KERNEL_MODE_NEON=y
156	139	CONFIG_NET=y
157	140	CONFIG_PACKET=y
158	141	CONFIG_UNIX=y
@@ -170,23 +153,13 @@ CONFIG_IPV6_MIP6=m · 11 unmodified lines
170	153	CONFIG_IPV6_TUNNEL=m
171	154	CONFIG_IPV6_MULTIPLE_TABLES=y
172	155	CONFIG_NET_DSA=m
173		−CONFIG_NET_SWITCHDEV=y
174	156	CONFIG_CAN=y
175		−CONFIG_CAN_RAW=y
176		−CONFIG_CAN_BCM=y
177		−CONFIG_CAN_DEV=y
178	157	CONFIG_CAN_AT91=m
179	158	CONFIG_CAN_FLEXCAN=m
180		−CONFIG_CAN_RCAR=m
	159	+CONFIG_CAN_SUN4I=y
181	160	CONFIG_CAN_XILINXCAN=y
	161	+CONFIG_CAN_RCAR=m
182	162	CONFIG_CAN_MCP251X=y
183		−CONFIG_NET_DSA_BCM_SF2=m
184		−CONFIG_B53=m
185		−CONFIG_B53_SPI_DRIVER=m
186		−CONFIG_B53_MDIO_DRIVER=m
187		−CONFIG_B53_MMAP_DRIVER=m
188		−CONFIG_B53_SRAB_DRIVER=m
189		−CONFIG_CAN_SUN4I=y
190	163	CONFIG_BT=m
191	164	CONFIG_BT_HCIUART=m
192	165	CONFIG_BT_HCIUART_BCM=y
@@ -199,11 +172,9 @@ CONFIG_RFKILL_INPUT=y · 6 unmodified lines
199	172	CONFIG_RFKILL_GPIO=y
200	173	CONFIG_DEVTMPFS=y
201	174	CONFIG_DEVTMPFS_MOUNT=y
202		−CONFIG_DMA_CMA=y
203	175	CONFIG_CMA_SIZE_MBYTES=64
204	176	CONFIG_OMAP_OCP2SCP=y
205	177	CONFIG_SIMPLE_PM_BUS=y
206		−CONFIG_SUNXI_RSB=y
207	178	CONFIG_MTD=y
208	179	CONFIG_MTD_CMDLINE_PARTS=y
209	180	CONFIG_MTD_BLOCK=y
@@ -236,7 +207,6 @@ CONFIG_PCI_ENDPOINT_TEST=m · 26 unmodified lines
236	207	CONFIG_EEPROM_AT24=y
237	208	CONFIG_BLK_DEV_SD=y
238	209	CONFIG_BLK_DEV_SR=y
239		−CONFIG_SCSI_MULTI_LUN=y
240	210	CONFIG_ATA=y
241	211	CONFIG_SATA_AHCI=y
242	212	CONFIG_SATA_AHCI_PLATFORM=y
@@ -251,14 +221,20 @@ CONFIG_SATA_MV=y · 8 unmodified lines
251	221	CONFIG_SATA_RCAR=y
252	222	CONFIG_NETDEVICES=y
253	223	CONFIG_VIRTIO_NET=y
254		−CONFIG_HIX5HD2_GMAC=y
	224	+CONFIG_B53_SPI_DRIVER=m
	225	+CONFIG_B53_MDIO_DRIVER=m
	226	+CONFIG_B53_MMAP_DRIVER=m
	227	+CONFIG_B53_SRAB_DRIVER=m
	228	+CONFIG_NET_DSA_BCM_SF2=m
255	229	CONFIG_SUN4I_EMAC=y
256		−CONFIG_MACB=y
257	230	CONFIG_BCMGENET=m
258	231	CONFIG_BGMAC_BCMA=y
259	232	CONFIG_SYSTEMPORT=m
	233	+CONFIG_MACB=y
260	234	CONFIG_NET_CALXEDA_XGMAC=y
261	235	CONFIG_GIANFAR=y
	236	+CONFIG_HIX5HD2_GMAC=y
	237	+CONFIG_E1000E=y
262	238	CONFIG_IGB=y
263	239	CONFIG_MV643XX_ETH=y
264	240	CONFIG_MVNETA=y
@@ -268,19 +244,17 @@ CONFIG_R8169=y · 3 unmodified lines
268	244	CONFIG_SH_ETH=y
269	245	CONFIG_SMSC911X=y
270	246	CONFIG_STMMAC_ETH=y
271		−CONFIG_STMMAC_PLATFORM=y
272	247	CONFIG_DWMAC_DWC_QOS_ETH=y
273	248	CONFIG_TI_CPSW=y
274	249	CONFIG_XILINX_EMACLITE=y
275	250	CONFIG_AT803X_PHY=y
276		−CONFIG_MARVELL_PHY=y
277		−CONFIG_SMSC_PHY=y
278	251	CONFIG_BROADCOM_PHY=y
279	252	CONFIG_ICPLUS_PHY=y
280		−CONFIG_REALTEK_PHY=y
	253	+CONFIG_MARVELL_PHY=y
281	254	CONFIG_MICREL_PHY=y
282		−CONFIG_FIXED_PHY=y
	255	+CONFIG_REALTEK_PHY=y
283	256	CONFIG_ROCKCHIP_PHY=y
	257	+CONFIG_SMSC_PHY=y
284	258	CONFIG_USB_PEGASUS=y
285	259	CONFIG_USB_RTL8152=m
286	260	CONFIG_USB_LAN78XX=m
@@ -288,29 +262,29 @@ CONFIG_USB_USBNET=y · 1 unmodified line
288	262	CONFIG_USB_NET_SMSC75XX=y
289	263	CONFIG_USB_NET_SMSC95XX=y
290	264	CONFIG_BRCMFMAC=m
291		−CONFIG_RT2X00=m
292		−CONFIG_RT2800USB=m
293	265	CONFIG_MWIFIEX=m
294	266	CONFIG_MWIFIEX_SDIO=m
	267	+CONFIG_RT2X00=m
	268	+CONFIG_RT2800USB=m
295	269	CONFIG_INPUT_JOYDEV=y
296	270	CONFIG_INPUT_EVDEV=y
297	271	CONFIG_KEYBOARD_QT1070=m
298	272	CONFIG_KEYBOARD_GPIO=y
299	273	CONFIG_KEYBOARD_TEGRA=y
300		−CONFIG_KEYBOARD_SPEAR=y
	274	+CONFIG_KEYBOARD_SAMSUNG=m
301	275	CONFIG_KEYBOARD_ST_KEYSCAN=y
	276	+CONFIG_KEYBOARD_SPEAR=y
302	277	CONFIG_KEYBOARD_CROS_EC=m
303		−CONFIG_KEYBOARD_SAMSUNG=m
304	278	CONFIG_MOUSE_PS2_ELANTECH=y
305	279	CONFIG_MOUSE_CYAPA=m
306	280	CONFIG_MOUSE_ELAN_I2C=y
307	281	CONFIG_INPUT_TOUCHSCREEN=y
308	282	CONFIG_TOUCHSCREEN_ATMEL_MXT=m
309	283	CONFIG_TOUCHSCREEN_MMS114=m
	284	+CONFIG_TOUCHSCREEN_WM97XX=m
310	285	CONFIG_TOUCHSCREEN_ST1232=m
311	286	CONFIG_TOUCHSCREEN_STMPE=y
312	287	CONFIG_TOUCHSCREEN_SUN4I=y
313		−CONFIG_TOUCHSCREEN_WM97XX=m
314	288	CONFIG_INPUT_MISC=y
315	289	CONFIG_INPUT_MAX77693_HAPTIC=m
316	290	CONFIG_INPUT_MAX8997_HAPTIC=m
@@ -327,13 +301,12 @@ CONFIG_SERIAL_8250_DW=y · 10 unmodified lines
327	301	CONFIG_SERIAL_8250_EM=y
328	302	CONFIG_SERIAL_8250_MT6577=y
329	303	CONFIG_SERIAL_8250_UNIPHIER=y
	304	+CONFIG_SERIAL_OF_PLATFORM=y
330	305	CONFIG_SERIAL_AMBA_PL011=y
331	306	CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
332	307	CONFIG_SERIAL_ATMEL=y
333	308	CONFIG_SERIAL_ATMEL_CONSOLE=y
334	309	CONFIG_SERIAL_ATMEL_TTYAT=y
335		−CONFIG_SERIAL_BCM63XX=y
336		−CONFIG_SERIAL_BCM63XX_CONSOLE=y
337	310	CONFIG_SERIAL_MESON=y
338	311	CONFIG_SERIAL_MESON_CONSOLE=y
339	312	CONFIG_SERIAL_SAMSUNG=y
@@ -345,15 +318,14 @@ CONFIG_SERIAL_IMX=y · 5 unmodified lines
345	318	CONFIG_SERIAL_IMX_CONSOLE=y
346	319	CONFIG_SERIAL_SH_SCI=y
347	320	CONFIG_SERIAL_SH_SCI_NR_UARTS=20
348		−CONFIG_SERIAL_SH_SCI_CONSOLE=y
349		−CONFIG_SERIAL_SH_SCI_DMA=y
350	321	CONFIG_SERIAL_MSM=y
351	322	CONFIG_SERIAL_MSM_CONSOLE=y
352	323	CONFIG_SERIAL_VT8500=y
353	324	CONFIG_SERIAL_VT8500_CONSOLE=y
354		−CONFIG_SERIAL_OF_PLATFORM=y
355	325	CONFIG_SERIAL_OMAP=y
356	326	CONFIG_SERIAL_OMAP_CONSOLE=y
	327	+CONFIG_SERIAL_BCM63XX=y
	328	+CONFIG_SERIAL_BCM63XX_CONSOLE=y
357	329	CONFIG_SERIAL_XILINX_PS_UART=y
358	330	CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
359	331	CONFIG_SERIAL_FSL_LPUART=y
@@ -365,12 +337,10 @@ CONFIG_SERIAL_ST_ASC_CONSOLE=y · 5 unmodified lines
365	337	CONFIG_SERIAL_STM32=y
366	338	CONFIG_SERIAL_STM32_CONSOLE=y
367	339	CONFIG_SERIAL_DEV_BUS=y
368		−CONFIG_HVC_DRIVER=y
369	340	CONFIG_VIRTIO_CONSOLE=y
	341	+CONFIG_HW_RANDOM=y
	342	+CONFIG_HW_RANDOM_ST=y
370	343	CONFIG_I2C_CHARDEV=y
371		−CONFIG_I2C_DAVINCI=y
372		−CONFIG_I2C_MESON=y
373		−CONFIG_I2C_MUX=y
374	344	CONFIG_I2C_ARB_GPIO_CHALLENGE=m
375	345	CONFIG_I2C_MUX_PCA954x=y
376	346	CONFIG_I2C_MUX_PINCTRL=y
@@ -378,12 +348,13 @@ CONFIG_I2C_DEMUX_PINCTRL=y · 1 unmodified line
378	348	CONFIG_I2C_AT91=m
379	349	CONFIG_I2C_BCM2835=y
380	350	CONFIG_I2C_CADENCE=y
	351	+CONFIG_I2C_DAVINCI=y
381	352	CONFIG_I2C_DESIGNWARE_PLATFORM=y
382	353	CONFIG_I2C_DIGICOLOR=m
383	354	CONFIG_I2C_EMEV2=m
384	355	CONFIG_I2C_GPIO=m
385		−CONFIG_I2C_EXYNOS5=y
386	356	CONFIG_I2C_IMX=y
	357	+CONFIG_I2C_MESON=y
387	358	CONFIG_I2C_MV64XXX=y
388	359	CONFIG_I2C_RIIC=y
389	360	CONFIG_I2C_RK3X=y
@@ -427,7 +398,6 @@ CONFIG_SPI_SPIDEV=y · 37 unmodified lines
427	398	CONFIG_SPMI=y
428	399	CONFIG_PINCTRL_AS3722=y
429	400	CONFIG_PINCTRL_PALMAS=y
430		−CONFIG_PINCTRL_BCM2835=y
431	401	CONFIG_PINCTRL_APQ8064=y
432	402	CONFIG_PINCTRL_APQ8084=y
433	403	CONFIG_PINCTRL_IPQ8064=y
@@ -437,25 +407,33 @@ CONFIG_PINCTRL_MSM8X74=y · 3 unmodified lines
437	407	CONFIG_PINCTRL_MSM8916=y
438	408	CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
439	409	CONFIG_PINCTRL_QCOM_SSBI_PMIC=y
440		−CONFIG_GPIO_GENERIC_PLATFORM=y
441	410	CONFIG_GPIO_DAVINCI=y
442	411	CONFIG_GPIO_DWAPB=y
443	412	CONFIG_GPIO_EM=y
444	413	CONFIG_GPIO_RCAR=y
	414	+CONFIG_GPIO_SYSCON=y
445	415	CONFIG_GPIO_UNIPHIER=y
446	416	CONFIG_GPIO_XILINX=y
447	417	CONFIG_GPIO_ZYNQ=y
448	418	CONFIG_GPIO_PCA953X=y
449	419	CONFIG_GPIO_PCA953X_IRQ=y
450	420	CONFIG_GPIO_PCF857X=y
451		−CONFIG_GPIO_TWL4030=y
452	421	CONFIG_GPIO_PALMAS=y
453		−CONFIG_GPIO_SYSCON=y
454	422	CONFIG_GPIO_TPS6586X=y
455	423	CONFIG_GPIO_TPS65910=y
	424	+CONFIG_GPIO_TWL4030=y
	425	+CONFIG_POWER_AVS=y
	426	+CONFIG_ROCKCHIP_IODOMAIN=y
	427	+CONFIG_POWER_RESET_AS3722=y
	428	+CONFIG_POWER_RESET_GPIO=y
	429	+CONFIG_POWER_RESET_GPIO_RESTART=y
	430	+CONFIG_POWER_RESET_ST=y
	431	+CONFIG_POWER_RESET_KEYSTONE=y
	432	+CONFIG_POWER_RESET_RMOBILE=y
456	433	CONFIG_BATTERY_ACT8945A=y
457	434	CONFIG_BATTERY_CPCAP=m
458	435	CONFIG_BATTERY_SBS=y
	436	+CONFIG_AXP20X_POWER=m
459	437	CONFIG_BATTERY_MAX17040=m
460	438	CONFIG_BATTERY_MAX17042=m
461	439	CONFIG_CHARGER_CPCAP=m
@@ -464,15 +442,6 @@ CONFIG_CHARGER_MAX77693=m · 2 unmodified lines
464	442	CONFIG_CHARGER_MAX8997=m
465	443	CONFIG_CHARGER_MAX8998=m
466	444	CONFIG_CHARGER_TPS65090=y
467		−CONFIG_AXP20X_POWER=m
468		−CONFIG_POWER_RESET_AS3722=y
469		−CONFIG_POWER_RESET_GPIO=y
470		−CONFIG_POWER_RESET_GPIO_RESTART=y
471		−CONFIG_POWER_RESET_KEYSTONE=y
472		−CONFIG_POWER_RESET_RMOBILE=y
473		−CONFIG_POWER_RESET_ST=y
474		−CONFIG_POWER_AVS=y
475		−CONFIG_ROCKCHIP_IODOMAIN=y
476	445	CONFIG_SENSORS_IIO_HWMON=y
477	446	CONFIG_SENSORS_LM90=y
478	447	CONFIG_SENSORS_LM95245=y
@@ -480,14 +449,12 @@ CONFIG_SENSORS_NTC_THERMISTOR=m · 1 unmodified line
480	449	CONFIG_SENSORS_PWM_FAN=m
481	450	CONFIG_SENSORS_INA2XX=m
482	451	CONFIG_CPU_THERMAL=y
483		−CONFIG_BCM2835_THERMAL=m
484		−CONFIG_BRCMSTB_THERMAL=m
485	452	CONFIG_IMX_THERMAL=y
486	453	CONFIG_ROCKCHIP_THERMAL=y
487	454	CONFIG_RCAR_THERMAL=y
488	455	CONFIG_ARMADA_THERMAL=y
489		−CONFIG_DAVINCI_WATCHDOG=m
490		−CONFIG_EXYNOS_THERMAL=m
	456	+CONFIG_BCM2835_THERMAL=m
	457	+CONFIG_BRCMSTB_THERMAL=m
491	458	CONFIG_ST_THERMAL_MEMMAP=y
492	459	CONFIG_WATCHDOG=y
493	460	CONFIG_DA9063_WATCHDOG=m
@@ -495,20 +462,24 @@ CONFIG_XILINX_WATCHDOG=y · 1 unmodified line
495	462	CONFIG_ARM_SP805_WATCHDOG=y
496	463	CONFIG_AT91SAM9X_WATCHDOG=y
497	464	CONFIG_SAMA5D4_WATCHDOG=y
	465	+CONFIG_DW_WATCHDOG=y
	466	+CONFIG_DAVINCI_WATCHDOG=m
498	467	CONFIG_ORION_WATCHDOG=y
499	468	CONFIG_RN5T618_WATCHDOG=y
500		−CONFIG_ST_LPC_WATCHDOG=y
501	469	CONFIG_SUNXI_WATCHDOG=y
502	470	CONFIG_IMX2_WDT=y
	471	+CONFIG_ST_LPC_WATCHDOG=y
503	472	CONFIG_TEGRA_WATCHDOG=m
504	473	CONFIG_MESON_WATCHDOG=y
505		−CONFIG_DW_WATCHDOG=y
506	474	CONFIG_DIGICOLOR_WATCHDOG=y
507	475	CONFIG_RENESAS_WDT=m
508		−CONFIG_BCM2835_WDT=y
509	476	CONFIG_BCM47XX_WDT=y
510		−CONFIG_BCM7038_WDT=m
	477	+CONFIG_BCM2835_WDT=y
511	478	CONFIG_BCM_KONA_WDT=y
	479	+CONFIG_BCM7038_WDT=m
	480	+CONFIG_BCMA_HOST_SOC=y
	481	+CONFIG_BCMA_DRIVER_GMAC_CMN=y
	482	+CONFIG_BCMA_DRIVER_GPIO=y
512	483	CONFIG_MFD_ACT8945A=y
513	484	CONFIG_MFD_AS3711=y
514	485	CONFIG_MFD_AS3722=y
@@ -516,7 +487,6 @@ CONFIG_MFD_ATMEL_FLEXCOM=y · 1 unmodified line
516	487	CONFIG_MFD_ATMEL_HLCDC=m
517	488	CONFIG_MFD_BCM590XX=y
518	489	CONFIG_MFD_AC100=y
519		−CONFIG_MFD_AXP20X=y
520	490	CONFIG_MFD_AXP20X_I2C=y
521	491	CONFIG_MFD_AXP20X_RSB=y
522	492	CONFIG_MFD_CROS_EC=m
@@ -529,11 +499,11 @@ CONFIG_MFD_MAX77693=m · 6 unmodified lines
529	499	CONFIG_MFD_MAX8907=y
530	500	CONFIG_MFD_MAX8997=y
531	501	CONFIG_MFD_MAX8998=y
532		−CONFIG_MFD_RK808=y
533	502	CONFIG_MFD_CPCAP=y
534	503	CONFIG_MFD_PM8XXX=y
535	504	CONFIG_MFD_QCOM_RPM=y
536	505	CONFIG_MFD_SPMI_PMIC=y
	506	+CONFIG_MFD_RK808=y
537	507	CONFIG_MFD_RN5T618=y
538	508	CONFIG_MFD_SEC_CORE=y
539	509	CONFIG_MFD_STMPE=y
@@ -543,10 +513,10 @@ CONFIG_MFD_TPS65217=y · 3 unmodified lines
543	513	CONFIG_MFD_TPS65218=y
544	514	CONFIG_MFD_TPS6586X=y
545	515	CONFIG_MFD_TPS65910=y
546		−CONFIG_REGULATOR_ACT8945A=y
547		−CONFIG_REGULATOR_AB8500=y
548	516	CONFIG_REGULATOR_ACT8865=y
	517	+CONFIG_REGULATOR_ACT8945A=y
549	518	CONFIG_REGULATOR_ANATOP=y
	519	+CONFIG_REGULATOR_AB8500=y
550	520	CONFIG_REGULATOR_AS3711=y
551	521	CONFIG_REGULATOR_AS3722=y
552	522	CONFIG_REGULATOR_AXP20X=y
@@ -554,10 +524,7 @@ CONFIG_REGULATOR_BCM590XX=y · 1 unmodified line
554	524	CONFIG_REGULATOR_CPCAP=y
555	525	CONFIG_REGULATOR_DA9210=y
556	526	CONFIG_REGULATOR_FAN53555=y
557		−CONFIG_REGULATOR_RK808=y
558	527	CONFIG_REGULATOR_GPIO=y
559		−CONFIG_MFD_SYSCON=y
560		−CONFIG_POWER_RESET_SYSCON=y
561	528	CONFIG_REGULATOR_LP872X=y
562	529	CONFIG_REGULATOR_MAX14577=m
563	530	CONFIG_REGULATOR_MAX8907=y
@@ -571,7 +538,8 @@ CONFIG_REGULATOR_PALMAS=y · 7 unmodified lines
571	538	CONFIG_REGULATOR_PBIAS=y
572	539	CONFIG_REGULATOR_PWM=y
573	540	CONFIG_REGULATOR_QCOM_RPM=y
574		−CONFIG_REGULATOR_QCOM_SMD_RPM=y
	541	+CONFIG_REGULATOR_QCOM_SMD_RPM=m
	542	+CONFIG_REGULATOR_RK808=y
575	543	CONFIG_REGULATOR_RN5T618=y
576	544	CONFIG_REGULATOR_S2MPS11=y
577	545	CONFIG_REGULATOR_S5M8767=y
@@ -592,18 +560,17 @@ CONFIG_MEDIA_CEC_SUPPORT=y · 14 unmodified lines
592	560	CONFIG_MEDIA_CONTROLLER=y
593	561	CONFIG_VIDEO_V4L2_SUBDEV_API=y
594	562	CONFIG_MEDIA_USB_SUPPORT=y
595		−CONFIG_USB_VIDEO_CLASS=y
596		−CONFIG_USB_GSPCA=y
	563	+CONFIG_USB_VIDEO_CLASS=m
597	564	CONFIG_V4L_PLATFORM_DRIVERS=y
598	565	CONFIG_SOC_CAMERA=m
599	566	CONFIG_SOC_CAMERA_PLATFORM=m
600		−CONFIG_VIDEO_RCAR_VIN=m
601		−CONFIG_VIDEO_ATMEL_ISI=m
602	567	CONFIG_VIDEO_SAMSUNG_EXYNOS4_IS=m
603	568	CONFIG_VIDEO_S5P_FIMC=m
604	569	CONFIG_VIDEO_S5P_MIPI_CSIS=m
605	570	CONFIG_VIDEO_EXYNOS_FIMC_LITE=m
606	571	CONFIG_VIDEO_EXYNOS4_FIMC_IS=m
	572	+CONFIG_VIDEO_RCAR_VIN=m
	573	+CONFIG_VIDEO_ATMEL_ISI=m
607	574	CONFIG_V4L_MEM2MEM_DRIVERS=y
608	575	CONFIG_VIDEO_SAMSUNG_S5P_JPEG=m
609	576	CONFIG_VIDEO_SAMSUNG_S5P_MFC=m
@@ -614,19 +581,15 @@ CONFIG_VIDEO_STI_DELTA=m · 4 unmodified lines
614	581	CONFIG_VIDEO_RENESAS_JPU=m
615	582	CONFIG_VIDEO_RENESAS_VSP1=m
616	583	CONFIG_V4L_TEST_DRIVERS=y
	584	+CONFIG_VIDEO_VIVID=m
617	585	CONFIG_CEC_PLATFORM_DRIVERS=y
618	586	CONFIG_VIDEO_SAMSUNG_S5P_CEC=m
619	587	# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
620	588	CONFIG_VIDEO_ADV7180=m
621	589	CONFIG_VIDEO_ML86V7667=m
622	590	CONFIG_DRM=y
623		−CONFIG_DRM_I2C_ADV7511=m
624		−CONFIG_DRM_I2C_ADV7511_AUDIO=y
625	591	# CONFIG_DRM_I2C_CH7006 is not set
626	592	# CONFIG_DRM_I2C_SIL164 is not set
627		−CONFIG_DRM_DUMB_VGA_DAC=m
628		−CONFIG_DRM_NXP_PTN3460=m
629		−CONFIG_DRM_PARADE_PS8622=m
630	593	CONFIG_DRM_NOUVEAU=m
631	594	CONFIG_DRM_EXYNOS=m
632	595	CONFIG_DRM_EXYNOS_FIMD=y
@@ -645,13 +608,18 @@ CONFIG_DRM_RCAR_LVDS=y · 12 unmodified lines
645	608	CONFIG_DRM_SUN4I=m
646	609	CONFIG_DRM_FSL_DCU=m
647	610	CONFIG_DRM_TEGRA=y
	611	+CONFIG_DRM_PANEL_SIMPLE=y
648	612	CONFIG_DRM_PANEL_SAMSUNG_LD9040=m
649	613	CONFIG_DRM_PANEL_SAMSUNG_S6E63J0X03=m
650	614	CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=m
651		−CONFIG_DRM_PANEL_SIMPLE=y
	615	+CONFIG_DRM_DUMB_VGA_DAC=m
	616	+CONFIG_DRM_NXP_PTN3460=m
	617	+CONFIG_DRM_PARADE_PS8622=m
652	618	CONFIG_DRM_SII9234=m
	619	+CONFIG_DRM_I2C_ADV7511=m
	620	+CONFIG_DRM_I2C_ADV7511_AUDIO=y
653	621	CONFIG_DRM_STI=m
654		−CONFIG_DRM_VC4=y
	622	+CONFIG_DRM_VC4=m
655	623	CONFIG_DRM_ETNAVIV=m
656	624	CONFIG_DRM_MXSFB=m
657	625	CONFIG_FB_ARMCLCD=y
@@ -659,8 +627,6 @@ CONFIG_FB_EFI=y · 1 unmodified line
659	627	CONFIG_FB_WM8505=y
660	628	CONFIG_FB_SH_MOBILE_LCDC=y
661	629	CONFIG_FB_SIMPLE=y
662		−CONFIG_BACKLIGHT_LCD_SUPPORT=y
663		−CONFIG_BACKLIGHT_CLASS_DEVICE=y
664	630	CONFIG_LCD_PLATFORM=m
665	631	CONFIG_BACKLIGHT_PWM=y
666	632	CONFIG_BACKLIGHT_AS3711=y
@@ -668,7 +634,6 @@ CONFIG_FRAMEBUFFER_CONSOLE=y · 1 unmodified line
668	634	CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
669	635	CONFIG_SOUND=m
670	636	CONFIG_SND=m
671		−CONFIG_SND_DYNAMIC_MINORS=y
672	637	CONFIG_SND_HDA_TEGRA=m
673	638	CONFIG_SND_HDA_INPUT_BEEP=y
674	639	CONFIG_SND_HDA_PATCH_LOADER=y
@@ -692,7 +657,7 @@ CONFIG_SND_SOC_SNOW=m · 17 unmodified lines
692	657	CONFIG_SND_SOC_ODROID=m
693	658	CONFIG_SND_SOC_SH4_FSI=m
694	659	CONFIG_SND_SOC_RCAR=m
695		−CONFIG_SND_SIMPLE_SCU_CARD=m
	660	+CONFIG_SND_SOC_STI=m
696	661	CONFIG_SND_SUN4I_CODEC=m
697	662	CONFIG_SND_SOC_TEGRA=m
698	663	CONFIG_SND_SOC_TEGRA20_I2S=m
@@ -703,31 +668,25 @@ CONFIG_SND_SOC_TEGRA_WM8903=m · 4 unmodified lines
703	668	CONFIG_SND_SOC_TEGRA_WM9712=m
704	669	CONFIG_SND_SOC_TEGRA_TRIMSLICE=m
705	670	CONFIG_SND_SOC_TEGRA_ALC5632=m
706		−CONFIG_SND_SOC_CPCAP=m
707	671	CONFIG_SND_SOC_TEGRA_MAX98090=m
708	672	CONFIG_SND_SOC_AK4642=m
	673	+CONFIG_SND_SOC_CPCAP=m
709	674	CONFIG_SND_SOC_SGTL5000=m
710	675	CONFIG_SND_SOC_SPDIF=m
711		−CONFIG_SND_SOC_WM8978=m
712		−CONFIG_SND_SOC_STI=m
713	676	CONFIG_SND_SOC_STI_SAS=m
714		−CONFIG_SND_SIMPLE_CARD=m
	677	+CONFIG_SND_SOC_WM8978=m
	678	+CONFIG_SND_SIMPLE_SCU_CARD=m
715	679	CONFIG_USB=y
716	680	CONFIG_USB_OTG=y
717	681	CONFIG_USB_XHCI_HCD=y
718	682	CONFIG_USB_XHCI_MVEBU=y
719		−CONFIG_USB_XHCI_RCAR=m
720	683	CONFIG_USB_XHCI_TEGRA=m
721	684	CONFIG_USB_EHCI_HCD=y
722		−CONFIG_USB_EHCI_MSM=m
723		−CONFIG_USB_EHCI_EXYNOS=y
724		−CONFIG_USB_EHCI_TEGRA=y
725	685	CONFIG_USB_EHCI_HCD_STI=y
726		−CONFIG_USB_EHCI_HCD_PLATFORM=y
727		−CONFIG_USB_ISP1760=y
	686	+CONFIG_USB_EHCI_TEGRA=y
	687	+CONFIG_USB_EHCI_EXYNOS=y
728	688	CONFIG_USB_OHCI_HCD=y
729	689	CONFIG_USB_OHCI_HCD_STI=y
730		−CONFIG_USB_OHCI_HCD_PLATFORM=y
731	690	CONFIG_USB_OHCI_EXYNOS=m
732	691	CONFIG_USB_R8A66597_HCD=m
733	692	CONFIG_USB_RENESAS_USBHS=m
@@ -746,18 +705,18 @@ CONFIG_USB_TI_CPPI41_DMA=y · 12 unmodified lines
746	705	CONFIG_USB_TUSB_OMAP_DMA=y
747	706	CONFIG_USB_DWC3=y
748	707	CONFIG_USB_DWC2=y
749		−CONFIG_USB_HSIC_USB3503=y
750	708	CONFIG_USB_CHIPIDEA=y
751	709	CONFIG_USB_CHIPIDEA_UDC=y
752	710	CONFIG_USB_CHIPIDEA_HOST=y
	711	+CONFIG_USB_ISP1760=y
	712	+CONFIG_USB_HSIC_USB3503=y
753	713	CONFIG_AB8500_USB=y
754		−CONFIG_KEYSTONE_USB_PHY=y
	714	+CONFIG_KEYSTONE_USB_PHY=m
755	715	CONFIG_NOP_USB_XCEIV=m
756	716	CONFIG_AM335X_PHY_USB=m
757	717	CONFIG_TWL6030_USB=m
758	718	CONFIG_USB_GPIO_VBUS=y
759	719	CONFIG_USB_ISP1301=y
760		−CONFIG_USB_MSM_OTG=m
761	720	CONFIG_USB_MXS_PHY=y
762	721	CONFIG_USB_GADGET=y
763	722	CONFIG_USB_FSL_USB2=y
@@ -793,21 +752,20 @@ CONFIG_MMC_SDHCI_OF_ESDHC=y · 29 unmodified lines
793	752	CONFIG_MMC_SDHCI_ESDHC_IMX=y
794	753	CONFIG_MMC_SDHCI_DOVE=y
795	754	CONFIG_MMC_SDHCI_TEGRA=y
	755	+CONFIG_MMC_SDHCI_S3C=y
796	756	CONFIG_MMC_SDHCI_PXAV3=y
797	757	CONFIG_MMC_SDHCI_SPEAR=y
798		−CONFIG_MMC_SDHCI_S3C=y
799	758	CONFIG_MMC_SDHCI_S3C_DMA=y
800	759	CONFIG_MMC_SDHCI_BCM_KONA=y
	760	+CONFIG_MMC_MESON_MX_SDIO=y
801	761	CONFIG_MMC_SDHCI_ST=y
802	762	CONFIG_MMC_OMAP=y
803	763	CONFIG_MMC_OMAP_HS=y
804	764	CONFIG_MMC_ATMELMCI=y
805	765	CONFIG_MMC_SDHCI_MSM=y
806		−CONFIG_MMC_MESON_MX_SDIO=y
807	766	CONFIG_MMC_MVSDIO=y
808	767	CONFIG_MMC_SDHI=y
809	768	CONFIG_MMC_DW=y
810		−CONFIG_MMC_DW_PLTFM=y
811	769	CONFIG_MMC_DW_EXYNOS=y
812	770	CONFIG_MMC_DW_ROCKCHIP=y
813	771	CONFIG_MMC_SH_MMCIF=y
@@ -847,94 +805,85 @@ CONFIG_RTC_DRV_MAX77686=y · 33 unmodified lines
847	805	CONFIG_RTC_DRV_RK808=m
848	806	CONFIG_RTC_DRV_RS5C372=m
849	807	CONFIG_RTC_DRV_BQ32K=m
850		−CONFIG_RTC_DRV_PALMAS=y
851		−CONFIG_RTC_DRV_ST_LPC=y
852	808	CONFIG_RTC_DRV_TWL4030=y
	809	+CONFIG_RTC_DRV_PALMAS=y
853	810	CONFIG_RTC_DRV_TPS6586X=y
854	811	CONFIG_RTC_DRV_TPS65910=y
855	812	CONFIG_RTC_DRV_S35390A=m
856	813	CONFIG_RTC_DRV_RX8581=m
857	814	CONFIG_RTC_DRV_EM3027=y
	815	+CONFIG_RTC_DRV_S5M=m
858	816	CONFIG_RTC_DRV_DA9063=m
859	817	CONFIG_RTC_DRV_EFI=m
860	818	CONFIG_RTC_DRV_DIGICOLOR=m
861		−CONFIG_RTC_DRV_S5M=m
862	819	CONFIG_RTC_DRV_S3C=m
863	820	CONFIG_RTC_DRV_PL031=y
864	821	CONFIG_RTC_DRV_AT91RM9200=m
865	822	CONFIG_RTC_DRV_AT91SAM9=m
866	823	CONFIG_RTC_DRV_VT8500=y
867		−CONFIG_RTC_DRV_SUN6I=y
868	824	CONFIG_RTC_DRV_SUNXI=y
869	825	CONFIG_RTC_DRV_MV=y
870	826	CONFIG_RTC_DRV_TEGRA=y
	827	+CONFIG_RTC_DRV_ST_LPC=y
871	828	CONFIG_RTC_DRV_CPCAP=m
872	829	CONFIG_DMADEVICES=y
873		−CONFIG_DW_DMAC=y
874	830	CONFIG_AT_HDMAC=y
875	831	CONFIG_AT_XDMAC=y
	832	+CONFIG_DMA_BCM2835=y
	833	+CONFIG_DMA_SUN6I=y
876	834	CONFIG_FSL_EDMA=y
	835	+CONFIG_IMX_DMA=y
	836	+CONFIG_IMX_SDMA=y
877	837	CONFIG_MV_XOR=y
	838	+CONFIG_MXS_DMA=y
	839	+CONFIG_PL330_DMA=y
	840	+CONFIG_SIRF_DMA=y
	841	+CONFIG_STE_DMA40=y
	842	+CONFIG_ST_FDMA=m
878	843	CONFIG_TEGRA20_APB_DMA=y
	844	+CONFIG_XILINX_DMA=y
	845	+CONFIG_QCOM_BAM_DMA=y
	846	+CONFIG_DW_DMAC=y
879	847	CONFIG_SH_DMAE=y
880	848	CONFIG_RCAR_DMAC=y
881	849	CONFIG_RENESAS_USB_DMAC=m
882		−CONFIG_STE_DMA40=y
883		−CONFIG_SIRF_DMA=y
884		−CONFIG_TI_EDMA=y
885		−CONFIG_PL330_DMA=y
886		−CONFIG_IMX_SDMA=y
887		−CONFIG_IMX_DMA=y
888		−CONFIG_MXS_DMA=y
889		−CONFIG_DMA_BCM2835=y
890		−CONFIG_DMA_OMAP=y
891		−CONFIG_QCOM_BAM_DMA=y
892		−CONFIG_XILINX_DMA=y
893		−CONFIG_DMA_SUN6I=y
894		−CONFIG_ST_FDMA=m
	850	+CONFIG_VIRTIO_PCI=y
	851	+CONFIG_VIRTIO_MMIO=y
895	852	CONFIG_STAGING=y
896		−CONFIG_SENSORS_ISL29018=y
897		−CONFIG_SENSORS_ISL29028=y
898	853	CONFIG_MFD_NVEC=y
899	854	CONFIG_KEYBOARD_NVEC=y
900	855	CONFIG_SERIO_NVEC_PS2=y
901	856	CONFIG_NVEC_POWER=y
902	857	CONFIG_NVEC_PAZ00=y
903		−CONFIG_BCMA=y
904		−CONFIG_BCMA_HOST_SOC=y
905		−CONFIG_BCMA_DRIVER_GMAC_CMN=y
906		−CONFIG_BCMA_DRIVER_GPIO=y
907		−CONFIG_QCOM_GSBI=y
908		−CONFIG_QCOM_PM=y
909		−CONFIG_QCOM_SMEM=y
910		−CONFIG_QCOM_SMD_RPM=y
911		−CONFIG_QCOM_SMP2P=y
912		−CONFIG_QCOM_SMSM=y
913		−CONFIG_QCOM_WCNSS_CTRL=m
914		−CONFIG_ROCKCHIP_PM_DOMAINS=y
915		−CONFIG_COMMON_CLK_QCOM=y
916		−CONFIG_QCOM_CLK_RPM=y
917		−CONFIG_CHROME_PLATFORMS=y
918	858	CONFIG_STAGING_BOARD=y
919		−CONFIG_CROS_EC_CHARDEV=m
920	859	CONFIG_COMMON_CLK_MAX77686=y
921	860	CONFIG_COMMON_CLK_RK808=m
922	861	CONFIG_COMMON_CLK_S2MPS11=m
	862	+CONFIG_COMMON_CLK_QCOM=y
	863	+CONFIG_QCOM_CLK_RPM=y
923	864	CONFIG_APQ_MMCC_8084=y
924	865	CONFIG_MSM_GCC_8660=y
925	866	CONFIG_MSM_MMCC_8960=y
926	867	CONFIG_MSM_MMCC_8974=y
927		−CONFIG_HWSPINLOCK_QCOM=y
	868	+CONFIG_BCM2835_MBOX=y
928	869	CONFIG_ROCKCHIP_IOMMU=y
929	870	CONFIG_TEGRA_IOMMU_GART=y
930	871	CONFIG_TEGRA_IOMMU_SMMU=y
931	872	CONFIG_REMOTEPROC=m
932	873	CONFIG_ST_REMOTEPROC=m
933	874	CONFIG_RPMSG_VIRTIO=m
	875	+CONFIG_RASPBERRYPI_POWER=y
	876	+CONFIG_QCOM_GSBI=y
	877	+CONFIG_QCOM_PM=y
	878	+CONFIG_QCOM_SMD_RPM=m
	879	+CONFIG_QCOM_WCNSS_CTRL=m
	880	+CONFIG_ROCKCHIP_PM_DOMAINS=y
	881	+CONFIG_ARCH_TEGRA_2x_SOC=y
	882	+CONFIG_ARCH_TEGRA_3x_SOC=y
	883	+CONFIG_ARCH_TEGRA_114_SOC=y
	884	+CONFIG_ARCH_TEGRA_124_SOC=y
934	885	CONFIG_PM_DEVFREQ=y
935	886	CONFIG_ARM_TEGRA_DEVFREQ=m
936		−CONFIG_MEMORY=y
937		−CONFIG_EXTCON=y
938	887	CONFIG_TI_AEMIF=y
939	888	CONFIG_IIO=y
940	889	CONFIG_IIO_SW_TRIGGER=y
@@ -947,56 +896,54 @@ CONFIG_VF610_ADC=m · 6 unmodified lines
947	896	CONFIG_XILINX_XADC=y
948	897	CONFIG_MPU3050_I2C=y
949	898	CONFIG_CM36651=m
	899	+CONFIG_SENSORS_ISL29018=y
	900	+CONFIG_SENSORS_ISL29028=y
950	901	CONFIG_AK8975=y
951		−CONFIG_RASPBERRYPI_POWER=y
952	902	CONFIG_IIO_HRTIMER_TRIGGER=y
953	903	CONFIG_PWM=y
954	904	CONFIG_PWM_ATMEL=m
955	905	CONFIG_PWM_ATMEL_HLCDC_PWM=m
956	906	CONFIG_PWM_ATMEL_TCB=m
	907	+CONFIG_PWM_BCM2835=y
	908	+CONFIG_PWM_BRCMSTB=m
957	909	CONFIG_PWM_FSL_FTM=m
958	910	CONFIG_PWM_MESON=m
959	911	CONFIG_PWM_RCAR=m
960	912	CONFIG_PWM_RENESAS_TPU=y
961	913	CONFIG_PWM_ROCKCHIP=m
962	914	CONFIG_PWM_SAMSUNG=m
	915	+CONFIG_PWM_STI=y
963	916	CONFIG_PWM_SUN4I=y
964	917	CONFIG_PWM_TEGRA=y
965	918	CONFIG_PWM_VT8500=y
	919	+CONFIG_KEYSTONE_IRQ=y
	920	+CONFIG_PHY_SUN4I_USB=y
	921	+CONFIG_PHY_SUN9I_USB=y
966	922	CONFIG_PHY_HIX5HD2_SATA=y
967		−CONFIG_E1000E=y
968		−CONFIG_PWM_STI=y
969		−CONFIG_PWM_BCM2835=y
970		−CONFIG_PWM_BRCMSTB=m
971		−CONFIG_PHY_DM816X_USB=m
972		−CONFIG_OMAP_USB2=y
973		−CONFIG_TI_PIPE3=y
974		−CONFIG_TWL4030_USB=m
	923	+CONFIG_PHY_BERLIN_SATA=y
975	924	CONFIG_PHY_BERLIN_USB=y
976	925	CONFIG_PHY_CPCAP_USB=m
977		−CONFIG_PHY_BERLIN_SATA=y
	926	+CONFIG_PHY_QCOM_APQ8064_SATA=m
	927	+CONFIG_PHY_RCAR_GEN2=m
978	928	CONFIG_PHY_ROCKCHIP_DP=m
979	929	CONFIG_PHY_ROCKCHIP_USB=y
980		−CONFIG_PHY_QCOM_APQ8064_SATA=m
	930	+CONFIG_PHY_SAMSUNG_USB2=m
981	931	CONFIG_PHY_MIPHY28LP=y
982		−CONFIG_PHY_RCAR_GEN2=m
983	932	CONFIG_PHY_STIH407_USB=y
984	933	CONFIG_PHY_STM32_USBPHYC=y
985		−CONFIG_PHY_SUN4I_USB=y
986		−CONFIG_PHY_SUN9I_USB=y
987		−CONFIG_PHY_SAMSUNG_USB2=m
988	934	CONFIG_PHY_TEGRA_XUSB=y
989		−CONFIG_PHY_BRCM_SATA=y
990		−CONFIG_NVMEM=y
	935	+CONFIG_PHY_DM816X_USB=m
	936	+CONFIG_OMAP_USB2=y
	937	+CONFIG_TI_PIPE3=y
	938	+CONFIG_TWL4030_USB=m
991	939	CONFIG_NVMEM_IMX_OCOTP=y
992	940	CONFIG_NVMEM_SUNXI_SID=y
993	941	CONFIG_NVMEM_VF610_OCOTP=y
994		−CONFIG_BCM2835_MBOX=y
995	942	CONFIG_RASPBERRYPI_FIRMWARE=y
996		−CONFIG_EFI_VARS=m
997		−CONFIG_EFI_CAPSULE_LOADER=m
998	943	CONFIG_BCM47XX_NVRAM=y
999	944	CONFIG_BCM47XX_SPROM=y
	945	+CONFIG_EFI_VARS=m
	946	+CONFIG_EFI_CAPSULE_LOADER=m
1000	947	CONFIG_EXT4_FS=y
1001	948	CONFIG_AUTOFS4_FS=y
1002	949	CONFIG_MSDOS_FS=y
@@ -1004,7 +951,6 @@ CONFIG_VFAT_FS=y · 1 unmodified line
1004	951	CONFIG_NTFS_FS=y
1005	952	CONFIG_TMPFS_POSIX_ACL=y
1006	953	CONFIG_UBIFS_FS=y
1007		−CONFIG_TMPFS=y
1008	954	CONFIG_SQUASHFS=y
1009	955	CONFIG_SQUASHFS_LZO=y
1010	956	CONFIG_SQUASHFS_XZ=y
@@ -1020,13 +966,7 @@ CONFIG_NLS_CODEPAGE_437=y · 9 unmodified lines
1020	966	CONFIG_NLS_ISO8859_1=y
1021	967	CONFIG_NLS_UTF8=y
1022	968	CONFIG_PRINTK_TIME=y
1023		−CONFIG_DEBUG_FS=y
1024	969	CONFIG_MAGIC_SYSRQ=y
1025		−CONFIG_LOCKUP_DETECTOR=y
1026		−CONFIG_CPUFREQ_DT=y
1027		−CONFIG_KEYSTONE_IRQ=y
1028		−CONFIG_HW_RANDOM=y
1029		−CONFIG_HW_RANDOM_ST=y
1030	970	CONFIG_CRYPTO_USER=m
1031	971	CONFIG_CRYPTO_USER_API_HASH=m
1032	972	CONFIG_CRYPTO_USER_API_SKCIPHER=m
@@ -1035,27 +975,19 @@ CONFIG_CRYPTO_USER_API_AEAD=m · 2 unmodified lines
1035	975	CONFIG_CRYPTO_DEV_MARVELL_CESA=m
1036	976	CONFIG_CRYPTO_DEV_EXYNOS_RNG=m
1037	977	CONFIG_CRYPTO_DEV_S5P=m
	978	+CONFIG_CRYPTO_DEV_ATMEL_AES=m
	979	+CONFIG_CRYPTO_DEV_ATMEL_TDES=m
	980	+CONFIG_CRYPTO_DEV_ATMEL_SHA=m
1038	981	CONFIG_CRYPTO_DEV_SUN4I_SS=m
1039	982	CONFIG_CRYPTO_DEV_ROCKCHIP=m
1040	983	CONFIG_ARM_CRYPTO=y
1041		−CONFIG_CRYPTO_SHA1_ARM=m
1042	984	CONFIG_CRYPTO_SHA1_ARM_NEON=m
1043	985	CONFIG_CRYPTO_SHA1_ARM_CE=m
1044	986	CONFIG_CRYPTO_SHA2_ARM_CE=m
1045		−CONFIG_CRYPTO_SHA256_ARM=m
1046	987	CONFIG_CRYPTO_SHA512_ARM=m
1047	988	CONFIG_CRYPTO_AES_ARM=m
1048	989	CONFIG_CRYPTO_AES_ARM_BS=m
1049	990	CONFIG_CRYPTO_AES_ARM_CE=m
1050		−CONFIG_CRYPTO_CHACHA20_NEON=m
1051		−CONFIG_CRYPTO_CRC32_ARM_CE=m
1052		−CONFIG_CRYPTO_CRCT10DIF_ARM_CE=m
1053	991	CONFIG_CRYPTO_GHASH_ARM_CE=m
1054		−CONFIG_CRYPTO_DEV_ATMEL_AES=m
1055		−CONFIG_CRYPTO_DEV_ATMEL_TDES=m
1056		−CONFIG_CRYPTO_DEV_ATMEL_SHA=m
1057		−CONFIG_VIDEO_VIVID=m
1058		−CONFIG_VIRTIO=y
1059		−CONFIG_VIRTIO_PCI=y
1060		−CONFIG_VIRTIO_PCI_LEGACY=y
1061		−CONFIG_VIRTIO_MMIO=y
	992	+CONFIG_CRYPTO_CRC32_ARM_CE=m
	993	+CONFIG_CRYPTO_CHACHA20_NEON=m

arch/arm/crypto/speck-neon-core.S+4−2

@@ -272,9 +272,11 @@ · 271 unmodified lines
272	272	* Allocate stack space to store 128 bytes worth of tweaks. For
273	273	* performance, this space is aligned to a 16-byte boundary so that we
274	274	* can use the load/store instructions that declare 16-byte alignment.
	275	+ * For Thumb2 compatibility, don't do the 'bic' directly on 'sp'.
275	276	*/
276		− sub sp, #128
277		− bic sp, #0xf
	277	+ sub r12, sp, #128
	278	+ bic r12, #0xf
	279	+ mov sp, r12
278	280
279	281	.if \n == 64
280	282	// Load first tweak

arch/arm/firmware/Makefile+3−0

@@ -1 +1,4 @@
1	1	obj-$(CONFIG_TRUSTED_FOUNDATIONS) += trusted_foundations.o
	2	+
	3	+# tf_generic_smc() fails to build with -fsanitize-coverage=trace-pc
	4	+KCOV_INSTRUMENT := n

arch/arm/kernel/entry-common.S+3−1

@@ -48,6 +48,7 @@ saved_pc .req lr · 47 unmodified lines
48	48	* from those features make this path too inefficient.
49	49	*/
50	50	ret_fast_syscall:
	51	+__ret_fast_syscall:
51	52	UNWIND(.fnstart )
52	53	UNWIND(.cantunwind )
53	54	disable_irq_notrace @ disable interrupts
@@ -78,6 +79,7 @@ fast_work_pending: · 24 unmodified lines
78	79	* call.
79	80	*/
80	81	ret_fast_syscall:
	82	+__ret_fast_syscall:
81	83	UNWIND(.fnstart )
82	84	UNWIND(.cantunwind )
83	85	str r0, [sp, #S_R0 + S_OFF]! @ save returned r0
@@ -255,7 +257,7 @@ local_restart: · 171 unmodified lines
255	257	tst r10, #_TIF_SYSCALL_WORK @ are we tracing syscalls?
256	258	bne __sys_trace
257	259
258		− invoke_syscall tbl, scno, r10, ret_fast_syscall
	260	+ invoke_syscall tbl, scno, r10, __ret_fast_syscall
259	261
260	262	add r1, sp, #S_OFF
261	263	2: cmp scno, #(__ARM_NR_BASE - __NR_SYSCALL_BASE)

arch/arm/kernel/head-nommu.S+1−1

@@ -177,7 +177,7 @@ M_CLASS(streq r3, [r12, #PMSAv8_MAIR1]) · 176 unmodified lines
177	177	bic r0, r0, #CR_I
178	178	#endif
179	179	mcr p15, 0, r0, c1, c0, 0 @ write control reg
180		− isb
	180	+ instr_sync
181	181	#elif defined (CONFIG_CPU_V7M)
182	182	#ifdef CONFIG_ARM_MPU
183	183	ldreq r3, [r12, MPU_CTRL]

arch/arm/kernel/process.c+1−0

@@ -338,6 +338,7 @@ static struct vm_area_struct gate_vma = { · 337 unmodified lines
338	338
339	339	static int __init gate_vma_init(void)
340	340	{
	341	+ vma_init(&gate_vma, NULL);
341	342	gate_vma.vm_page_prot = PAGE_READONLY_EXEC;
342	343	return 0;
343	344	}

arch/arm/kernel/signal.c+2−2

@@ -544,7 +544,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 543 unmodified lines
544	544	* Increment event counter and perform fixup for the pre-signal
545	545	* frame.
546	546	*/
547		− rseq_signal_deliver(regs);
	547	+ rseq_signal_deliver(ksig, regs);
548	548
549	549	/*
550	550	* Set up the stack frame
@@ -666,7 +666,7 @@ do_work_pending(struct pt_regs *regs, unsigned int thread_flags, int syscall) · 115 unmodified lines
666	666	} else {
667	667	clear_thread_flag(TIF_NOTIFY_RESUME);
668	668	tracehook_notify_resume(regs);
669		− rseq_handle_notify_resume(regs);
	669	+ rseq_handle_notify_resume(NULL, regs);
670	670	}
671	671	}
672	672	local_irq_disable();

arch/arm/mach-bcm/Kconfig+1−0

@@ -20,6 +20,7 @@ config ARCH_BCM_IPROC · 19 unmodified lines
20	20	select GPIOLIB
21	21	select ARM_AMBA
22	22	select PINCTRL
	23	+ select PCI_DOMAINS if PCI
23	24	help
24	25	This enables support for systems based on Broadcom IPROC architected SoCs.
25	26	The IPROC complex contains one or more ARM CPUs along with common

arch/arm/mach-davinci/board-da850-evm.c+1−1

@@ -774,7 +774,7 @@ static struct gpiod_lookup_table mmc_gpios_table = { · 773 unmodified lines
774	774	GPIO_LOOKUP("davinci_gpio.0", DA850_MMCSD_CD_PIN, "cd",
775	775	GPIO_ACTIVE_LOW),
776	776	GPIO_LOOKUP("davinci_gpio.0", DA850_MMCSD_WP_PIN, "wp",
777		− GPIO_ACTIVE_LOW),
	777	+ GPIO_ACTIVE_HIGH),
778	778	},
779	779	};
780	780

arch/arm/mach-omap2/omap-smp.c+41−0

@@ -109,6 +109,45 @@ void omap5_erratum_workaround_801819(void) · 108 unmodified lines
109	109	static inline void omap5_erratum_workaround_801819(void) { }
110	110	#endif
111	111
	112	+#ifdef CONFIG_HARDEN_BRANCH_PREDICTOR
	113	+/*
	114	+ * Configure ACR and enable ACTLR[0] (Enable invalidates of BTB with
	115	+ * ICIALLU) to activate the workaround for secondary Core.
	116	+ * NOTE: it is assumed that the primary core's configuration is done
	117	+ * by the boot loader (kernel will detect a misconfiguration and complain
	118	+ * if this is not done).
	119	+ *
	120	+ * In General Purpose(GP) devices, ACR bit settings can only be done
	121	+ * by ROM code in "secure world" using the smc call and there is no
	122	+ * option to update the "firmware" on such devices. This also works for
	123	+ * High security(HS) devices, as a backup option in case the
	124	+ * "update" is not done in the "security firmware".
	125	+ */
	126	+static void omap5_secondary_harden_predictor(void)
	127	+{
	128	+ u32 acr, acr_mask;
	129	+
	130	+ asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
	131	+
	132	+ /*
	133	+ * ACTLR[0] (Enable invalidates of BTB with ICIALLU)
	134	+ */
	135	+ acr_mask = BIT(0);
	136	+
	137	+ /* Do we already have it done.. if yes, skip expensive smc */
	138	+ if ((acr & acr_mask) == acr_mask)
	139	+ return;
	140	+
	141	+ acr \|= acr_mask;
	142	+ omap_smc1(OMAP5_DRA7_MON_SET_ACR_INDEX, acr);
	143	+
	144	+ pr_debug("%s: ARM ACR setup for CVE_2017_5715 applied on CPU%d\n",
	145	+ __func__, smp_processor_id());
	146	+}
	147	+#else
	148	+static inline void omap5_secondary_harden_predictor(void) { }
	149	+#endif
	150	+
112	151	static void omap4_secondary_init(unsigned int cpu)
113	152	{
114	153	/*
@@ -131,6 +170,8 @@ static void omap4_secondary_init(unsigned int cpu) · 16 unmodified lines
131	170	set_cntfreq();
132	171	/* Configure ACR to disable streaming WA for 801819 */
133	172	omap5_erratum_workaround_801819();
	173	+ /* Enable ACR to allow for ICUALLU workaround */
	174	+ omap5_secondary_harden_predictor();
134	175	}
135	176
136	177	/*

arch/arm/mach-pxa/irq.c+2−2

@@ -185,7 +185,7 @@ static int pxa_irq_suspend(void) · 184 unmodified lines
185	185	{
186	186	int i;
187	187
188		− for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
	188	+ for (i = 0; i < DIV_ROUND_UP(pxa_internal_irq_nr, 32); i++) {
189	189	void __iomem *base = irq_base(i);
190	190
191	191	saved_icmr[i] = __raw_readl(base + ICMR);
@@ -204,7 +204,7 @@ static void pxa_irq_resume(void) · 12 unmodified lines
204	204	{
205	205	int i;
206	206
207		− for (i = 0; i < pxa_internal_irq_nr / 32; i++) {
	207	+ for (i = 0; i < DIV_ROUND_UP(pxa_internal_irq_nr, 32); i++) {
208	208	void __iomem *base = irq_base(i);
209	209
210	210	__raw_writel(saved_icmr[i], base + ICMR);

arch/arm/mach-rpc/ecard.c+1−4

@@ -212,7 +212,7 @@ static DEFINE_MUTEX(ecard_mutex); · 211 unmodified lines
212	212	*/
213	213	static void ecard_init_pgtables(struct mm_struct *mm)
214	214	{
215		− struct vm_area_struct vma;
	215	+ struct vm_area_struct vma = TLB_FLUSH_VMA(mm, VM_EXEC);
216	216
217	217	/* We want to set up the page tables for the following mapping:
218	218	* Virtual Physical
@@ -237,9 +237,6 @@ static void ecard_init_pgtables(struct mm_struct *mm) · 18 unmodified lines
237	237
238	238	memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
239	239
240		− vma.vm_flags = VM_EXEC;
241		− vma.vm_mm = mm;
242		−
243	240	flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
244	241	flush_tlb_range(&vma, EASI_START, EASI_START + EASI_SIZE);
245	242	}

arch/arm/mach-socfpga/Kconfig+1−0

@@ -10,6 +10,7 @@ menuconfig ARCH_SOCFPGA · 9 unmodified lines
10	10	select HAVE_ARM_SCU
11	11	select HAVE_ARM_TWD if SMP
12	12	select MFD_SYSCON
	13	+ select PCI_DOMAINS if PCI
13	14
14	15	if ARCH_SOCFPGA
15	16	config SOCFPGA_SUSPEND

arch/arm/mm/init.c+9−0

@@ -736,20 +736,29 @@ static int __mark_rodata_ro(void *unused) · 735 unmodified lines
736	736	return 0;
737	737	}
738	738
	739	+static int kernel_set_to_readonly __read_mostly;
	740	+
739	741	void mark_rodata_ro(void)
740	742	{
	743	+ kernel_set_to_readonly = 1;
741	744	stop_machine(__mark_rodata_ro, NULL, NULL);
742	745	debug_checkwx();
743	746	}
744	747
745	748	void set_kernel_text_rw(void)
746	749	{
	750	+ if (!kernel_set_to_readonly)
	751	+ return;
	752	+
747	753	set_section_perms(ro_perms, ARRAY_SIZE(ro_perms), false,
748	754	current->active_mm);
749	755	}
750	756
751	757	void set_kernel_text_ro(void)
752	758	{
	759	+ if (!kernel_set_to_readonly)
	760	+ return;
	761	+
753	762	set_section_perms(ro_perms, ARRAY_SIZE(ro_perms), true,
754	763	current->active_mm);
755	764	}

arch/arm/net/bpf_jit_32.c+1−1

@@ -1844,7 +1844,7 @@ struct bpf_prog bpf_int_jit_compile(struct bpf_prog prog) · 1843 unmodified lines
1844	1844	/* there are 2 passes here */
1845	1845	bpf_jit_dump(prog->len, image_size, 2, ctx.target);
1846	1846
1847		− set_memory_ro((unsigned long)header, header->pages);
	1847	+ bpf_jit_binary_lock_ro(header);
1848	1848	prog->bpf_func = (void *)ctx.target;
1849	1849	prog->jited = 1;
1850	1850	prog->jited_len = image_size;

arch/arm/xen/enlighten.c+4−3

@@ -59,6 +59,9 @@ struct xen_memory_region xen_extra_mem[XEN_EXTRA_MEM_MAX_REGIONS] __initdata; · 58 unmodified lines
59	59
60	60	static __read_mostly unsigned int xen_events_irq;
61	61
	62	+uint32_t xen_start_flags;
	63	+EXPORT_SYMBOL(xen_start_flags);
	64	+
62	65	int xen_remap_domain_gfn_array(struct vm_area_struct *vma,
63	66	unsigned long addr,
64	67	xen_pfn_t *gfn, int nr,
@@ -293,9 +296,7 @@ void __init xen_early_init(void) · 228 unmodified lines
293	296	xen_setup_features();
294	297
295	298	if (xen_feature(XENFEAT_dom0))
296		− xen_start_info->flags \|= SIF_INITDOMAIN\|SIF_PRIVILEGED;
297		− else
298		− xen_start_info->flags &= ~(SIF_INITDOMAIN\|SIF_PRIVILEGED);
	299	+ xen_start_flags \|= SIF_INITDOMAIN\|SIF_PRIVILEGED;
299	300
300	301	if (!console_set_on_cmdline && !xen_initial_domain())
301	302	add_preferred_console("hvc", 0, NULL);

arch/arm64/Makefile+5−5

@@ -10,7 +10,7 @@ · 9 unmodified lines
10	10	#
11	11	# Copyright (C) 1995-2001 by Russell King
12	12
13		−LDFLAGS_vmlinux :=-p --no-undefined -X
	13	+LDFLAGS_vmlinux :=--no-undefined -X
14	14	CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
15	15	GZFLAGS :=-9
16	16
@@ -60,15 +60,15 @@ ifeq ($(CONFIG_CPU_BIG_ENDIAN), y) · 43 unmodified lines
60	60	KBUILD_CPPFLAGS += -mbig-endian
61	61	CHECKFLAGS += -D__AARCH64EB__
62	62	AS += -EB
63		−LD += -EB
64		−LDFLAGS += -maarch64linuxb
	63	+# We must use the linux target here, since distributions don't tend to package
	64	+# the ELF linker scripts with binutils, and this results in a build failure.
	65	+LDFLAGS += -EB -maarch64linuxb
65	66	UTS_MACHINE := aarch64_be
66	67	else
67	68	KBUILD_CPPFLAGS += -mlittle-endian
68	69	CHECKFLAGS += -D__AARCH64EL__
69	70	AS += -EL
70		−LD += -EL
71		−LDFLAGS += -maarch64linux
	71	+LDFLAGS += -EL -maarch64linux # See comment above
72	72	UTS_MACHINE := aarch64
73	73	endif
74	74

arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi+2−4

@@ -309,8 +309,7 @@ · 308 unmodified lines
309	309	interrupts = <0 99 4>;
310	310	resets = <&rst SPIM0_RESET>;
311	311	reg-io-width = <4>;
312		− num-chipselect = <4>;
313		− bus-num = <0>;
	312	+ num-cs = <4>;
314	313	status = "disabled";
315	314	};
316	315
@@ -322,8 +321,7 @@ · 5 unmodified lines
322	321	interrupts = <0 100 4>;
323	322	resets = <&rst SPIM1_RESET>;
324	323	reg-io-width = <4>;
325		− num-chipselect = <4>;
326		− bus-num = <0>;
	324	+ num-cs = <4>;
327	325	status = "disabled";
328	326	};
329	327

arch/arm64/boot/dts/amlogic/meson-axg-s400.dts+14−1

@@ -66,9 +66,22 @@ · 65 unmodified lines
66	66
67	67	&ethmac {
68	68	status = "okay";
69		− phy-mode = "rgmii";
70	69	pinctrl-0 = <&eth_rgmii_y_pins>;
71	70	pinctrl-names = "default";
	71	+ phy-handle = <&eth_phy0>;
	72	+ phy-mode = "rgmii";
	73	+
	74	+ mdio {
	75	+ compatible = "snps,dwmac-mdio";
	76	+ #address-cells = <1>;
	77	+ #size-cells = <0>;
	78	+
	79	+ eth_phy0: ethernet-phy@0 {
	80	+ /* Realtek RTL8211F (0x001cc916) */
	81	+ reg = <0>;
	82	+ eee-broken-1000t;
	83	+ };
	84	+ };
72	85	};
73	86
74	87	&uart_A {

arch/arm64/boot/dts/amlogic/meson-axg.dtsi+2−2

@@ -132,7 +132,7 @@ · 131 unmodified lines
132	132
133	133	sd_emmc_b: sd@5000 {
134	134	compatible = "amlogic,meson-axg-mmc";
135		− reg = <0x0 0x5000 0x0 0x2000>;
	135	+ reg = <0x0 0x5000 0x0 0x800>;
136	136	interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
137	137	status = "disabled";
138	138	clocks = <&clkc CLKID_SD_EMMC_B>,
@@ -144,7 +144,7 @@ · 5 unmodified lines
144	144
145	145	sd_emmc_c: mmc@7000 {
146	146	compatible = "amlogic,meson-axg-mmc";
147		− reg = <0x0 0x7000 0x0 0x2000>;
	147	+ reg = <0x0 0x7000 0x0 0x800>;
148	148	interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
149	149	status = "disabled";
150	150	clocks = <&clkc CLKID_SD_EMMC_C>,

arch/arm64/boot/dts/amlogic/meson-gx.dtsi+9−3

@@ -35,6 +35,12 @@ · 34 unmodified lines
35	35	no-map;
36	36	};
37	37
	38	+ /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
	39	+ secmon_reserved_alt: secmon@5000000 {
	40	+ reg = <0x0 0x05000000 0x0 0x300000>;
	41	+ no-map;
	42	+ };
	43	+
38	44	linux,cma {
39	45	compatible = "shared-dma-pool";
40	46	reusable;
@@ -457,21 +463,21 @@ · 416 unmodified lines
457	463
458	464	sd_emmc_a: mmc@70000 {
459	465	compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
460		− reg = <0x0 0x70000 0x0 0x2000>;
	466	+ reg = <0x0 0x70000 0x0 0x800>;
461	467	interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
462	468	status = "disabled";
463	469	};
464	470
465	471	sd_emmc_b: mmc@72000 {
466	472	compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
467		− reg = <0x0 0x72000 0x0 0x2000>;
	473	+ reg = <0x0 0x72000 0x0 0x800>;
468	474	interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
469	475	status = "disabled";
470	476	};
471	477
472	478	sd_emmc_c: mmc@74000 {
473	479	compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
474		− reg = <0x0 0x74000 0x0 0x2000>;
	480	+ reg = <0x0 0x74000 0x0 0x800>;
475	481	interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
476	482	status = "disabled";
477	483	};

arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi+1−1

@@ -6,7 +6,7 @@ · 5 unmodified lines
6	6
7	7	&apb {
8	8	mali: gpu@c0000 {
9		− compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
	9	+ compatible = "amlogic,meson-gxl-mali", "arm,mali-450";
10	10	reg = <0x0 0xc0000 0x0 0x40000>;
11	11	interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
12	12	<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,

arch/arm64/boot/dts/amlogic/meson-gxl-s905x-libretech-cc.dts+0−3

@@ -234,9 +234,6 @@ · 233 unmodified lines
234	234
235	235	bus-width = <4>;
236	236	cap-sd-highspeed;
237		− sd-uhs-sdr12;
238		− sd-uhs-sdr25;
239		− sd-uhs-sdr50;
240	237	max-frequency = <100000000>;
241	238	disable-wp;
242	239

arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi+7−0

@@ -189,3 +189,10 @@ · 188 unmodified lines
189	189	&usb0 {
190	190	status = "okay";
191	191	};
	192	+
	193	+&usb2_phy0 {
	194	+ /*
	195	+ * HDMI_5V is also used as supply for the USB VBUS.
	196	+ */
	197	+ phy-supply = <&hdmi_5v>;
	198	+};

arch/arm64/boot/dts/amlogic/meson-gxl.dtsi+0−8

@@ -13,14 +13,6 @@ · 12 unmodified lines
13	13	/ {
14	14	compatible = "amlogic,meson-gxl";
15	15
16		− reserved-memory {
17		− /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
18		− secmon_reserved_alt: secmon@5000000 {
19		− reg = <0x0 0x05000000 0x0 0x300000>;
20		− no-map;
21		− };
22		− };
23		−
24	16	soc {
25	17	usb0: usb@c9000000 {
26	18	status = "disabled";

arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi+4−4

@@ -118,7 +118,7 @@ · 117 unmodified lines
118	118
119	119	#interrupt-cells = <1>;
120	120	interrupt-map-mask = <0 0 0 0>;
121		− interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_NONE>;
	121	+ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>;
122	122
123	123	linux,pci-domain = <0>;
124	124
@@ -149,7 +149,7 @@ · 24 unmodified lines
149	149
150	150	#interrupt-cells = <1>;
151	151	interrupt-map-mask = <0 0 0 0>;
152		− interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_NONE>;
	152	+ interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
153	153
154	154	linux,pci-domain = <4>;
155	155
@@ -566,7 +566,7 @@ · 410 unmodified lines
566	566	reg = <0x66080000 0x100>;
567	567	#address-cells = <1>;
568	568	#size-cells = <0>;
569		− interrupts = <GIC_SPI 394 IRQ_TYPE_NONE>;
	569	+ interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>;
570	570	clock-frequency = <100000>;
571	571	status = "disabled";
572	572	};
@@ -594,7 +594,7 @@ · 21 unmodified lines
594	594	reg = <0x660b0000 0x100>;
595	595	#address-cells = <1>;
596	596	#size-cells = <0>;
597		− interrupts = <GIC_SPI 395 IRQ_TYPE_NONE>;
	597	+ interrupts = <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>;
598	598	clock-frequency = <100000>;
599	599	status = "disabled";
600	600	};

arch/arm64/boot/dts/broadcom/stingray/bcm958742k.dts+4−0

@@ -43,6 +43,10 @@ · 42 unmodified lines
43	43	enet-phy-lane-swap;
44	44	};
45	45
	46	+&sdio0 {
	47	+ mmc-ddr-1_8v;
	48	+};
	49	+
46	50	&uart2 {
47	51	status = "okay";
48	52	};

arch/arm64/boot/dts/broadcom/stingray/bcm958742t.dts+4−0

@@ -42,3 +42,7 @@ · 41 unmodified lines
42	42	&gphy0 {
43	43	enet-phy-lane-swap;
44	44	};
	45	+
	46	+&sdio0 {
	47	+ mmc-ddr-1_8v;
	48	+};

arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi+2−2

@@ -409,7 +409,7 @@ · 408 unmodified lines
409	409	reg = <0x000b0000 0x100>;
410	410	#address-cells = <1>;
411	411	#size-cells = <0>;
412		− interrupts = <GIC_SPI 177 IRQ_TYPE_NONE>;
	412	+ interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
413	413	clock-frequency = <100000>;
414	414	status = "disabled";
415	415	};
@@ -453,7 +453,7 @@ · 37 unmodified lines
453	453	reg = <0x000e0000 0x100>;
454	454	#address-cells = <1>;
455	455	#size-cells = <0>;
456		− interrupts = <GIC_SPI 178 IRQ_TYPE_NONE>;
	456	+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
457	457	clock-frequency = <100000>;
458	458	status = "disabled";
459	459	};

arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts+2−0

@@ -585,6 +585,8 @@ · 584 unmodified lines
585	585	vmmc-supply = <&wlan_en>;
586	586	ti,non-removable;
587	587	non-removable;
	588	+ cap-power-off-card;
	589	+ keep-power-in-suspend;
588	590	#address-cells = <0x1>;
589	591	#size-cells = <0x0>;
590	592	status = "ok";

arch/arm64/boot/dts/hisilicon/hi6220-hikey.dts+2−0

@@ -322,6 +322,8 @@ · 321 unmodified lines
322	322	dwmmc_2: dwmmc2@f723f000 {
323	323	bus-width = <0x4>;
324	324	non-removable;
	325	+ cap-power-off-card;
	326	+ keep-power-in-suspend;
325	327	vmmc-supply = <&reg_vdd_3v3>;
326	328	mmc-pwrseq = <&wl1835_pwrseq>;
327	329

arch/arm64/boot/dts/marvell/armada-cp110.dtsi+1−1

@@ -149,7 +149,7 @@ · 148 unmodified lines
149	149
150	150	CP110_LABEL(icu): interrupt-controller@1e0000 {
151	151	compatible = "marvell,cp110-icu";
152		− reg = <0x1e0000 0x10>;
	152	+ reg = <0x1e0000 0x440>;
153	153	#interrupt-cells = <3>;
154	154	interrupt-controller;
155	155	msi-parent = <&gicp>;

arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi+1−1

@@ -75,7 +75,7 @@ · 74 unmodified lines
75	75
76	76	serial@75b1000 {
77	77	label = "LS-UART0";
78		− status = "okay";
	78	+ status = "disabled";
79	79	pinctrl-names = "default", "sleep";
80	80	pinctrl-0 = <&blsp2_uart2_4pins_default>;
81	81	pinctrl-1 = <&blsp2_uart2_4pins_sleep>;

arch/arm64/boot/dts/qcom/msm8916.dtsi+2−2

@@ -1191,14 +1191,14 @@ · 1190 unmodified lines
1191	1191
1192	1192	port@0 {
1193	1193	reg = <0>;
1194		− etf_out: endpoint {
	1194	+ etf_in: endpoint {
1195	1195	slave-mode;
1196	1196	remote-endpoint = <&funnel0_out>;
1197	1197	};
1198	1198	};
1199	1199	port@1 {
1200	1200	reg = <0>;
1201		− etf_in: endpoint {
	1201	+ etf_out: endpoint {
1202	1202	remote-endpoint = <&replicator_in>;
1203	1203	};
1204	1204	};

arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts+1−1

@@ -54,7 +54,7 @@ · 53 unmodified lines
54	54	sound {
55	55	compatible = "audio-graph-card";
56	56	label = "UniPhier LD11";
57		− widgets = "Headphone", "Headphone Jack";
	57	+ widgets = "Headphone", "Headphones";
58	58	dais = <&i2s_port2
59	59	&i2s_port3
60	60	&i2s_port4

arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts+1−1

@@ -54,7 +54,7 @@ · 53 unmodified lines
54	54	sound {
55	55	compatible = "audio-graph-card";
56	56	label = "UniPhier LD20";
57		− widgets = "Headphone", "Headphone Jack";
	57	+ widgets = "Headphone", "Headphones";
58	58	dais = <&i2s_port2
59	59	&i2s_port3
60	60	&i2s_port4

arch/arm64/configs/defconfig+39−63

@@ -47,6 +47,7 @@ CONFIG_ARCH_MVEBU=y · 46 unmodified lines
47	47	CONFIG_ARCH_QCOM=y
48	48	CONFIG_ARCH_ROCKCHIP=y
49	49	CONFIG_ARCH_SEATTLE=y
	50	+CONFIG_ARCH_SYNQUACER=y
50	51	CONFIG_ARCH_RENESAS=y
51	52	CONFIG_ARCH_R8A7795=y
52	53	CONFIG_ARCH_R8A7796=y
@@ -58,7 +59,6 @@ CONFIG_ARCH_R8A77995=y · 5 unmodified lines
58	59	CONFIG_ARCH_STRATIX10=y
59	60	CONFIG_ARCH_TEGRA=y
60	61	CONFIG_ARCH_SPRD=y
61		−CONFIG_ARCH_SYNQUACER=y
62	62	CONFIG_ARCH_THUNDER=y
63	63	CONFIG_ARCH_THUNDER2=y
64	64	CONFIG_ARCH_UNIPHIER=y
@@ -67,25 +67,23 @@ CONFIG_ARCH_XGENE=y · 2 unmodified lines
67	67	CONFIG_ARCH_ZX=y
68	68	CONFIG_ARCH_ZYNQMP=y
69	69	CONFIG_PCI=y
70		−CONFIG_HOTPLUG_PCI_PCIE=y
71	70	CONFIG_PCI_IOV=y
72	71	CONFIG_HOTPLUG_PCI=y
73	72	CONFIG_HOTPLUG_PCI_ACPI=y
74		−CONFIG_PCI_LAYERSCAPE=y
75		−CONFIG_PCI_HISI=y
76		−CONFIG_PCIE_QCOM=y
77		−CONFIG_PCIE_KIRIN=y
78		−CONFIG_PCIE_ARMADA_8K=y
79		−CONFIG_PCIE_HISI_STB=y
80	73	CONFIG_PCI_AARDVARK=y
81	74	CONFIG_PCI_TEGRA=y
82	75	CONFIG_PCIE_RCAR=y
83		−CONFIG_PCIE_ROCKCHIP=y
84		−CONFIG_PCIE_ROCKCHIP_HOST=m
85	76	CONFIG_PCI_HOST_GENERIC=y
86	77	CONFIG_PCI_XGENE=y
87	78	CONFIG_PCI_HOST_THUNDER_PEM=y
88	79	CONFIG_PCI_HOST_THUNDER_ECAM=y
	80	+CONFIG_PCIE_ROCKCHIP_HOST=m
	81	+CONFIG_PCI_LAYERSCAPE=y
	82	+CONFIG_PCI_HISI=y
	83	+CONFIG_PCIE_QCOM=y
	84	+CONFIG_PCIE_ARMADA_8K=y
	85	+CONFIG_PCIE_KIRIN=y
	86	+CONFIG_PCIE_HISI_STB=y
89	87	CONFIG_ARM64_VA_BITS_48=y
90	88	CONFIG_SCHED_MC=y
91	89	CONFIG_NUMA=y
@@ -104,8 +102,6 @@ CONFIG_HIBERNATION=y · 12 unmodified lines
104	102	CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y
105	103	CONFIG_ARM_CPUIDLE=y
106	104	CONFIG_CPU_FREQ=y
107		−CONFIG_CPU_FREQ_GOV_ATTR_SET=y
108		−CONFIG_CPU_FREQ_GOV_COMMON=y
109	105	CONFIG_CPU_FREQ_STAT=y
110	106	CONFIG_CPU_FREQ_GOV_POWERSAVE=m
111	107	CONFIG_CPU_FREQ_GOV_USERSPACE=y
@@ -113,11 +109,11 @@ CONFIG_CPU_FREQ_GOV_ONDEMAND=y · 1 unmodified line
113	109	CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
114	110	CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
115	111	CONFIG_CPUFREQ_DT=y
	112	+CONFIG_ACPI_CPPC_CPUFREQ=m
116	113	CONFIG_ARM_ARMADA_37XX_CPUFREQ=y
117	114	CONFIG_ARM_BIG_LITTLE_CPUFREQ=y
118	115	CONFIG_ARM_SCPI_CPUFREQ=y
119	116	CONFIG_ARM_TEGRA186_CPUFREQ=y
120		−CONFIG_ACPI_CPPC_CPUFREQ=m
121	117	CONFIG_NET=y
122	118	CONFIG_PACKET=y
123	119	CONFIG_UNIX=y
@@ -236,11 +232,6 @@ CONFIG_SMSC911X=y · 112 unmodified lines
236	232	CONFIG_SNI_AVE=y
237	233	CONFIG_SNI_NETSEC=y
238	234	CONFIG_STMMAC_ETH=m
239		−CONFIG_DWMAC_IPQ806X=m
240		−CONFIG_DWMAC_MESON=m
241		−CONFIG_DWMAC_ROCKCHIP=m
242		−CONFIG_DWMAC_SUNXI=m
243		−CONFIG_DWMAC_SUN8I=m
244	235	CONFIG_MDIO_BUS_MUX_MMIOREG=y
245	236	CONFIG_AT803X_PHY=m
246	237	CONFIG_MARVELL_PHY=m
@@ -269,8 +260,8 @@ CONFIG_WL18XX=m · 22 unmodified lines
269	260	CONFIG_WLCORE_SDIO=m
270	261	CONFIG_INPUT_EVDEV=y
271	262	CONFIG_KEYBOARD_ADC=m
272		−CONFIG_KEYBOARD_CROS_EC=y
273	263	CONFIG_KEYBOARD_GPIO=y
	264	+CONFIG_KEYBOARD_CROS_EC=y
274	265	CONFIG_INPUT_TOUCHSCREEN=y
275	266	CONFIG_TOUCHSCREEN_ATMEL_MXT=m
276	267	CONFIG_INPUT_MISC=y
@@ -296,17 +287,13 @@ CONFIG_SERIAL_SAMSUNG=y · 19 unmodified lines
296	287	CONFIG_SERIAL_SAMSUNG_CONSOLE=y
297	288	CONFIG_SERIAL_TEGRA=y
298	289	CONFIG_SERIAL_SH_SCI=y
299		−CONFIG_SERIAL_SH_SCI_NR_UARTS=11
300		−CONFIG_SERIAL_SH_SCI_CONSOLE=y
301	290	CONFIG_SERIAL_MSM=y
302	291	CONFIG_SERIAL_MSM_CONSOLE=y
303	292	CONFIG_SERIAL_XILINX_PS_UART=y
304	293	CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
305	294	CONFIG_SERIAL_MVEBU_UART=y
306	295	CONFIG_SERIAL_DEV_BUS=y
307		−CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
308	296	CONFIG_VIRTIO_CONSOLE=y
309		−CONFIG_I2C_HID=m
310	297	CONFIG_I2C_CHARDEV=y
311	298	CONFIG_I2C_MUX=y
312	299	CONFIG_I2C_MUX_PCA954x=y
@@ -325,26 +312,26 @@ CONFIG_I2C_RCAR=y · 12 unmodified lines
325	312	CONFIG_I2C_CROS_EC_TUNNEL=y
326	313	CONFIG_SPI=y
327	314	CONFIG_SPI_ARMADA_3700=y
328		−CONFIG_SPI_MESON_SPICC=m
329		−CONFIG_SPI_MESON_SPIFC=m
330	315	CONFIG_SPI_BCM2835=m
331	316	CONFIG_SPI_BCM2835AUX=m
	317	+CONFIG_SPI_MESON_SPICC=m
	318	+CONFIG_SPI_MESON_SPIFC=m
332	319	CONFIG_SPI_ORION=y
333	320	CONFIG_SPI_PL022=y
334		−CONFIG_SPI_QUP=y
335	321	CONFIG_SPI_ROCKCHIP=y
	322	+CONFIG_SPI_QUP=y
336	323	CONFIG_SPI_S3C64XX=y
337	324	CONFIG_SPI_SPIDEV=m
338	325	CONFIG_SPMI=y
339		−CONFIG_PINCTRL_IPQ8074=y
340	326	CONFIG_PINCTRL_SINGLE=y
341	327	CONFIG_PINCTRL_MAX77620=y
	328	+CONFIG_PINCTRL_IPQ8074=y
342	329	CONFIG_PINCTRL_MSM8916=y
343	330	CONFIG_PINCTRL_MSM8994=y
344	331	CONFIG_PINCTRL_MSM8996=y
345		−CONFIG_PINCTRL_MT7622=y
346	332	CONFIG_PINCTRL_QDF2XXX=y
347	333	CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
	334	+CONFIG_PINCTRL_MT7622=y
348	335	CONFIG_GPIO_DWAPB=y
349	336	CONFIG_GPIO_MB86S7X=y
350	337	CONFIG_GPIO_PL061=y
@@ -368,13 +355,13 @@ CONFIG_SENSORS_INA2XX=m · 17 unmodified lines
368	355	CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
369	356	CONFIG_CPU_THERMAL=y
370	357	CONFIG_THERMAL_EMULATION=y
	358	+CONFIG_ROCKCHIP_THERMAL=m
	359	+CONFIG_RCAR_GEN3_THERMAL=y
371	360	CONFIG_ARMADA_THERMAL=y
372	361	CONFIG_BRCMSTB_THERMAL=m
373	362	CONFIG_EXYNOS_THERMAL=y
374		−CONFIG_RCAR_GEN3_THERMAL=y
375		−CONFIG_QCOM_TSENS=y
376		−CONFIG_ROCKCHIP_THERMAL=m
377	363	CONFIG_TEGRA_BPMP_THERMAL=m
	364	+CONFIG_QCOM_TSENS=y
378	365	CONFIG_UNIPHIER_THERMAL=y
379	366	CONFIG_WATCHDOG=y
380	367	CONFIG_S3C2410_WATCHDOG=y
@@ -395,9 +382,9 @@ CONFIG_MFD_MAX77620=y · 14 unmodified lines
395	382	CONFIG_MFD_SPMI_PMIC=y
396	383	CONFIG_MFD_RK808=y
397	384	CONFIG_MFD_SEC_CORE=y
	385	+CONFIG_REGULATOR_FIXED_VOLTAGE=y
398	386	CONFIG_REGULATOR_AXP20X=y
399	387	CONFIG_REGULATOR_FAN53555=y
400		−CONFIG_REGULATOR_FIXED_VOLTAGE=y
401	388	CONFIG_REGULATOR_GPIO=y
402	389	CONFIG_REGULATOR_HI6421V530=y
403	390	CONFIG_REGULATOR_HI655X=y
@@ -407,16 +394,15 @@ CONFIG_REGULATOR_QCOM_SMD_RPM=y · 3 unmodified lines
407	394	CONFIG_REGULATOR_QCOM_SPMI=y
408	395	CONFIG_REGULATOR_RK808=y
409	396	CONFIG_REGULATOR_S2MPS11=y
	397	+CONFIG_RC_CORE=m
	398	+CONFIG_RC_DECODERS=y
	399	+CONFIG_RC_DEVICES=y
	400	+CONFIG_IR_MESON=m
410	401	CONFIG_MEDIA_SUPPORT=m
411	402	CONFIG_MEDIA_CAMERA_SUPPORT=y
412	403	CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
413	404	CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y
414	405	CONFIG_MEDIA_CONTROLLER=y
415		−CONFIG_MEDIA_RC_SUPPORT=y
416		−CONFIG_RC_CORE=m
417		−CONFIG_RC_DEVICES=y
418		−CONFIG_RC_DECODERS=y
419		−CONFIG_IR_MESON=m
420	406	CONFIG_VIDEO_V4L2_SUBDEV_API=y
421	407	# CONFIG_DVB_NET is not set
422	408	CONFIG_V4L_MEM2MEM_DRIVERS=y
@@ -441,8 +427,7 @@ CONFIG_ROCKCHIP_DW_HDMI=y · 18 unmodified lines
441	427	CONFIG_ROCKCHIP_DW_MIPI_DSI=y
442	428	CONFIG_ROCKCHIP_INNO_HDMI=y
443	429	CONFIG_DRM_RCAR_DU=m
444		−CONFIG_DRM_RCAR_LVDS=y
445		−CONFIG_DRM_RCAR_VSP=y
	430	+CONFIG_DRM_RCAR_LVDS=m
446	431	CONFIG_DRM_TEGRA=m
447	432	CONFIG_DRM_PANEL_SIMPLE=m
448	433	CONFIG_DRM_I2C_ADV7511=m
@@ -455,7 +440,6 @@ CONFIG_FB_ARMCLCD=y · 6 unmodified lines
455	440	CONFIG_BACKLIGHT_GENERIC=m
456	441	CONFIG_BACKLIGHT_PWM=m
457	442	CONFIG_BACKLIGHT_LP855X=m
458		−CONFIG_FRAMEBUFFER_CONSOLE=y
459	443	CONFIG_LOGO=y
460	444	# CONFIG_LOGO_LINUX_MONO is not set
461	445	# CONFIG_LOGO_LINUX_VGA16 is not set
@@ -468,6 +452,7 @@ CONFIG_SND_SOC_RCAR=m · 6 unmodified lines
468	452	CONFIG_SND_SOC_AK4613=m
469	453	CONFIG_SND_SIMPLE_CARD=m
470	454	CONFIG_SND_AUDIO_GRAPH_CARD=m
	455	+CONFIG_I2C_HID=m
471	456	CONFIG_USB=y
472	457	CONFIG_USB_OTG=y
473	458	CONFIG_USB_XHCI_HCD=y
@@ -501,12 +486,12 @@ CONFIG_MMC_BLOCK_MINORS=32 · 27 unmodified lines
501	486	CONFIG_MMC_ARMMMCI=y
502	487	CONFIG_MMC_SDHCI=y
503	488	CONFIG_MMC_SDHCI_ACPI=y
504		−CONFIG_MMC_SDHCI_F_SDH30=y
505	489	CONFIG_MMC_SDHCI_PLTFM=y
506	490	CONFIG_MMC_SDHCI_OF_ARASAN=y
507	491	CONFIG_MMC_SDHCI_OF_ESDHC=y
508	492	CONFIG_MMC_SDHCI_CADENCE=y
509	493	CONFIG_MMC_SDHCI_TEGRA=y
	494	+CONFIG_MMC_SDHCI_F_SDH30=y
510	495	CONFIG_MMC_MESON_GX=y
511	496	CONFIG_MMC_SDHCI_MSM=y
512	497	CONFIG_MMC_SPI=y
@@ -524,11 +509,11 @@ CONFIG_LEDS_CLASS=y · 11 unmodified lines
524	509	CONFIG_LEDS_GPIO=y
525	510	CONFIG_LEDS_PWM=y
526	511	CONFIG_LEDS_SYSCON=y
	512	+CONFIG_LEDS_TRIGGER_DISK=y
527	513	CONFIG_LEDS_TRIGGER_HEARTBEAT=y
528	514	CONFIG_LEDS_TRIGGER_CPU=y
529	515	CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
530	516	CONFIG_LEDS_TRIGGER_PANIC=y
531		−CONFIG_LEDS_TRIGGER_DISK=y
532	517	CONFIG_EDAC=y
533	518	CONFIG_EDAC_GHES=y
534	519	CONFIG_RTC_CLASS=y
@@ -537,13 +522,13 @@ CONFIG_RTC_DRV_RK808=m · 2 unmodified lines
537	522	CONFIG_RTC_DRV_S5M=y
538	523	CONFIG_RTC_DRV_DS3232=y
539	524	CONFIG_RTC_DRV_EFI=y
	525	+CONFIG_RTC_DRV_CROS_EC=y
540	526	CONFIG_RTC_DRV_S3C=y
541	527	CONFIG_RTC_DRV_PL031=y
542	528	CONFIG_RTC_DRV_SUN6I=y
543	529	CONFIG_RTC_DRV_ARMADA38X=y
544	530	CONFIG_RTC_DRV_TEGRA=y
545	531	CONFIG_RTC_DRV_XGENE=y
546		−CONFIG_RTC_DRV_CROS_EC=y
547	532	CONFIG_DMADEVICES=y
548	533	CONFIG_DMA_BCM2835=m
549	534	CONFIG_K3_DMA=y
@@ -579,7 +564,6 @@ CONFIG_HWSPINLOCK_QCOM=y · 29 unmodified lines
579	564	CONFIG_ARM_MHU=y
580	565	CONFIG_PLATFORM_MHU=y
581	566	CONFIG_BCM2835_MBOX=y
582		−CONFIG_HI6220_MBOX=y
583	567	CONFIG_QCOM_APCS_IPC=y
584	568	CONFIG_ROCKCHIP_IOMMU=y
585	569	CONFIG_TEGRA_IOMMU_SMMU=y
@@ -602,7 +586,6 @@ CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y · 16 unmodified lines
602	586	CONFIG_EXTCON_USB_GPIO=y
603	587	CONFIG_EXTCON_USBC_CROS_EC=y
604	588	CONFIG_MEMORY=y
605		−CONFIG_TEGRA_MC=y
606	589	CONFIG_IIO=y
607	590	CONFIG_EXYNOS_ADC=y
608	591	CONFIG_ROCKCHIP_SARADC=m
@@ -618,27 +601,27 @@ CONFIG_PWM_RCAR=m · 9 unmodified lines
618	601	CONFIG_PWM_ROCKCHIP=y
619	602	CONFIG_PWM_SAMSUNG=y
620	603	CONFIG_PWM_TEGRA=m
	604	+CONFIG_PHY_XGENE=y
	605	+CONFIG_PHY_SUN4I_USB=y
	606	+CONFIG_PHY_HI6220_USB=y
621	607	CONFIG_PHY_HISTB_COMBPHY=y
622	608	CONFIG_PHY_HISI_INNO_USB2=y
623		−CONFIG_PHY_RCAR_GEN3_USB2=y
624		−CONFIG_PHY_RCAR_GEN3_USB3=m
625		−CONFIG_PHY_HI6220_USB=y
626		−CONFIG_PHY_QCOM_USB_HS=y
627		−CONFIG_PHY_SUN4I_USB=y
628	609	CONFIG_PHY_MVEBU_CP110_COMPHY=y
629	610	CONFIG_PHY_QCOM_QMP=m
630		−CONFIG_PHY_ROCKCHIP_INNO_USB2=y
	611	+CONFIG_PHY_QCOM_USB_HS=y
	612	+CONFIG_PHY_RCAR_GEN3_USB2=y
	613	+CONFIG_PHY_RCAR_GEN3_USB3=m
631	614	CONFIG_PHY_ROCKCHIP_EMMC=y
	615	+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
632	616	CONFIG_PHY_ROCKCHIP_PCIE=m
633	617	CONFIG_PHY_ROCKCHIP_TYPEC=y
634		−CONFIG_PHY_XGENE=y
635	618	CONFIG_PHY_TEGRA_XUSB=y
636	619	CONFIG_QCOM_L2_PMU=y
637	620	CONFIG_QCOM_L3_PMU=y
638		−CONFIG_MESON_EFUSE=m
639	621	CONFIG_QCOM_QFPROM=y
640	622	CONFIG_ROCKCHIP_EFUSE=y
641	623	CONFIG_UNIPHIER_EFUSE=y
	624	+CONFIG_MESON_EFUSE=m
642	625	CONFIG_TEE=y
643	626	CONFIG_OPTEE=y
644	627	CONFIG_ARM_SCPI_PROTOCOL=y
@@ -647,7 +630,6 @@ CONFIG_EFI_CAPSULE_LOADER=y · 2 unmodified lines
647	630	CONFIG_ACPI=y
648	631	CONFIG_ACPI_APEI=y
649	632	CONFIG_ACPI_APEI_GHES=y
650		−CONFIG_ACPI_APEI_PCIEAER=y
651	633	CONFIG_ACPI_APEI_MEMORY_FAILURE=y
652	634	CONFIG_ACPI_APEI_EINJ=y
653	635	CONFIG_EXT2_FS=y
@@ -682,7 +664,6 @@ CONFIG_DEBUG_INFO=y · 28 unmodified lines
682	664	CONFIG_DEBUG_FS=y
683	665	CONFIG_MAGIC_SYSRQ=y
684	666	CONFIG_DEBUG_KERNEL=y
685		−CONFIG_LOCKUP_DETECTOR=y
686	667	# CONFIG_SCHED_DEBUG is not set
687	668	# CONFIG_DEBUG_PREEMPT is not set
688	669	# CONFIG_FTRACE is not set
@@ -691,20 +672,15 @@ CONFIG_SECURITY=y · 2 unmodified lines
691	672	CONFIG_CRYPTO_ECHAINIV=y
692	673	CONFIG_CRYPTO_ANSI_CPRNG=y
693	674	CONFIG_ARM64_CRYPTO=y
694		−CONFIG_CRYPTO_SHA256_ARM64=m
695		−CONFIG_CRYPTO_SHA512_ARM64=m
696	675	CONFIG_CRYPTO_SHA1_ARM64_CE=y
697	676	CONFIG_CRYPTO_SHA2_ARM64_CE=y
	677	+CONFIG_CRYPTO_SHA512_ARM64_CE=m
	678	+CONFIG_CRYPTO_SHA3_ARM64=m
	679	+CONFIG_CRYPTO_SM3_ARM64_CE=m
698	680	CONFIG_CRYPTO_GHASH_ARM64_CE=y
699	681	CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=m
700	682	CONFIG_CRYPTO_CRC32_ARM64_CE=m
701		−CONFIG_CRYPTO_AES_ARM64=m
702		−CONFIG_CRYPTO_AES_ARM64_CE=m
703	683	CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
704	684	CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
705		−CONFIG_CRYPTO_AES_ARM64_NEON_BLK=m
706	685	CONFIG_CRYPTO_CHACHA20_NEON=m
707	686	CONFIG_CRYPTO_AES_ARM64_BS=m
708		−CONFIG_CRYPTO_SHA512_ARM64_CE=m
709		−CONFIG_CRYPTO_SHA3_ARM64=m
710		−CONFIG_CRYPTO_SM3_ARM64_CE=m

arch/arm64/crypto/aes-ce-ccm-core.S+55−95

@@ -19,33 +19,24 @@ · 18 unmodified lines
19	19	* u32 *macp, u8 const rk[], u32 rounds);
20	20	*/
21	21	ENTRY(ce_aes_ccm_auth_data)
22		− frame_push 7
23		−
24		− mov x19, x0
25		− mov x20, x1
26		− mov x21, x2
27		− mov x22, x3
28		− mov x23, x4
29		− mov x24, x5
30		−
31		− ldr w25, [x22] /* leftover from prev round? */
	22	+ ldr w8, [x3] /* leftover from prev round? */
32	23	ld1 {v0.16b}, [x0] /* load mac */
33		− cbz w25, 1f
34		− sub w25, w25, #16
	24	+ cbz w8, 1f
	25	+ sub w8, w8, #16
35	26	eor v1.16b, v1.16b, v1.16b
36		−0: ldrb w7, [x20], #1 /* get 1 byte of input */
37		− subs w21, w21, #1
38		− add w25, w25, #1
	27	+0: ldrb w7, [x1], #1 /* get 1 byte of input */
	28	+ subs w2, w2, #1
	29	+ add w8, w8, #1
39	30	ins v1.b[0], w7
40	31	ext v1.16b, v1.16b, v1.16b, #1 /* rotate in the input bytes */
41	32	beq 8f /* out of input? */
42		− cbnz w25, 0b
	33	+ cbnz w8, 0b
43	34	eor v0.16b, v0.16b, v1.16b
44		−1: ld1 {v3.4s}, [x23] /* load first round key */
45		− prfm pldl1strm, [x20]
46		− cmp w24, #12 /* which key size? */
47		− add x6, x23, #16
48		− sub w7, w24, #2 /* modified # of rounds */
	35	+1: ld1 {v3.4s}, [x4] /* load first round key */
	36	+ prfm pldl1strm, [x1]
	37	+ cmp w5, #12 /* which key size? */
	38	+ add x6, x4, #16
	39	+ sub w7, w5, #2 /* modified # of rounds */
49	40	bmi 2f
50	41	bne 5f
51	42	mov v5.16b, v3.16b
@@ -64,43 +55,33 @@ ENTRY(ce_aes_ccm_auth_data) · 12 unmodified lines
64	55	ld1 {v5.4s}, [x6], #16 /* load next round key */
65	56	bpl 3b
66	57	aese v0.16b, v4.16b
67		− subs w21, w21, #16 /* last data? */
	58	+ subs w2, w2, #16 /* last data? */
68	59	eor v0.16b, v0.16b, v5.16b /* final round */
69	60	bmi 6f
70		− ld1 {v1.16b}, [x20], #16 /* load next input block */
	61	+ ld1 {v1.16b}, [x1], #16 /* load next input block */
71	62	eor v0.16b, v0.16b, v1.16b /* xor with mac */
72		− beq 6f
73		−
74		− if_will_cond_yield_neon
75		− st1 {v0.16b}, [x19] /* store mac */
76		− do_cond_yield_neon
77		− ld1 {v0.16b}, [x19] /* reload mac */
78		− endif_yield_neon
79		−
80		− b 1b
81		−6: st1 {v0.16b}, [x19] /* store mac */
	63	+ bne 1b
	64	+6: st1 {v0.16b}, [x0] /* store mac */
82	65	beq 10f
83		− adds w21, w21, #16
	66	+ adds w2, w2, #16
84	67	beq 10f
85		− mov w25, w21
86		−7: ldrb w7, [x20], #1
	68	+ mov w8, w2
	69	+7: ldrb w7, [x1], #1
87	70	umov w6, v0.b[0]
88	71	eor w6, w6, w7
89		− strb w6, [x19], #1
90		− subs w21, w21, #1
	72	+ strb w6, [x0], #1
	73	+ subs w2, w2, #1
91	74	beq 10f
92	75	ext v0.16b, v0.16b, v0.16b, #1 /* rotate out the mac bytes */
93	76	b 7b
94		−8: mov w7, w25
95		− add w25, w25, #16
	77	+8: mov w7, w8
	78	+ add w8, w8, #16
96	79	9: ext v1.16b, v1.16b, v1.16b, #1
97	80	adds w7, w7, #1
98	81	bne 9b
99	82	eor v0.16b, v0.16b, v1.16b
100		− st1 {v0.16b}, [x19]
101		−10: str w25, [x22]
102		−
103		− frame_pop
	83	+ st1 {v0.16b}, [x0]
	84	+10: str w8, [x3]
104	85	ret
105	86	ENDPROC(ce_aes_ccm_auth_data)
106	87
@@ -145,29 +126,19 @@ ENTRY(ce_aes_ccm_final) · 38 unmodified lines
145	126	ENDPROC(ce_aes_ccm_final)
146	127
147	128	.macro aes_ccm_do_crypt,enc
148		− frame_push 8
149		−
150		− mov x19, x0
151		− mov x20, x1
152		− mov x21, x2
153		− mov x22, x3
154		− mov x23, x4
155		− mov x24, x5
156		− mov x25, x6
157		−
158		− ldr x26, [x25, #8] /* load lower ctr */
159		− ld1 {v0.16b}, [x24] /* load mac */
160		−CPU_LE( rev x26, x26 ) /* keep swabbed ctr in reg */
	129	+ ldr x8, [x6, #8] /* load lower ctr */
	130	+ ld1 {v0.16b}, [x5] /* load mac */
	131	+CPU_LE( rev x8, x8 ) /* keep swabbed ctr in reg */
161	132	0: /* outer loop */
162		− ld1 {v1.8b}, [x25] /* load upper ctr */
163		− prfm pldl1strm, [x20]
164		− add x26, x26, #1
165		− rev x9, x26
166		− cmp w23, #12 /* which key size? */
167		− sub w7, w23, #2 /* get modified # of rounds */
	133	+ ld1 {v1.8b}, [x6] /* load upper ctr */
	134	+ prfm pldl1strm, [x1]
	135	+ add x8, x8, #1
	136	+ rev x9, x8
	137	+ cmp w4, #12 /* which key size? */
	138	+ sub w7, w4, #2 /* get modified # of rounds */
168	139	ins v1.d[1], x9 /* no carry in lower ctr */
169		− ld1 {v3.4s}, [x22] /* load first round key */
170		− add x10, x22, #16
	140	+ ld1 {v3.4s}, [x3] /* load first round key */
	141	+ add x10, x3, #16
171	142	bmi 1f
172	143	bne 4f
173	144	mov v5.16b, v3.16b
@@ -194,9 +165,9 @@ CPU_LE( rev x26, x26 ) /* keep swabbed ctr in reg */ · 20 unmodified lines
194	165	bpl 2b
195	166	aese v0.16b, v4.16b
196	167	aese v1.16b, v4.16b
197		− subs w21, w21, #16
198		− bmi 7f /* partial block? */
199		− ld1 {v2.16b}, [x20], #16 /* load next input block */
	168	+ subs w2, w2, #16
	169	+ bmi 6f /* partial block? */
	170	+ ld1 {v2.16b}, [x1], #16 /* load next input block */
200	171	.if \enc == 1
201	172	eor v2.16b, v2.16b, v5.16b /* final round enc+mac */
202	173	eor v1.16b, v1.16b, v2.16b /* xor with crypted ctr */
@@ -205,29 +176,18 @@ CPU_LE( rev x26, x26 ) /* keep swabbed ctr in reg */ · 2 unmodified lines
205	176	eor v1.16b, v2.16b, v5.16b /* final round enc */
206	177	.endif
207	178	eor v0.16b, v0.16b, v2.16b /* xor mac with pt ^ rk[last] */
208		− st1 {v1.16b}, [x19], #16 /* write output block */
209		− beq 5f
210		−
211		− if_will_cond_yield_neon
212		− st1 {v0.16b}, [x24] /* store mac */
213		− do_cond_yield_neon
214		− ld1 {v0.16b}, [x24] /* reload mac */
215		− endif_yield_neon
216		−
217		− b 0b
218		−5:
219		−CPU_LE( rev x26, x26 )
220		− st1 {v0.16b}, [x24] /* store mac */
221		− str x26, [x25, #8] /* store lsb end of ctr (BE) */
222		−
223		−6: frame_pop
224		− ret
225		−
226		−7: eor v0.16b, v0.16b, v5.16b /* final round mac */
	179	+ st1 {v1.16b}, [x0], #16 /* write output block */
	180	+ bne 0b
	181	+CPU_LE( rev x8, x8 )
	182	+ st1 {v0.16b}, [x5] /* store mac */
	183	+ str x8, [x6, #8] /* store lsb end of ctr (BE) */
	184	+5: ret
	185	+
	186	+6: eor v0.16b, v0.16b, v5.16b /* final round mac */
227	187	eor v1.16b, v1.16b, v5.16b /* final round enc */
228		− st1 {v0.16b}, [x24] /* store mac */
229		− add w21, w21, #16 /* process partial tail block */
230		−8: ldrb w9, [x20], #1 /* get 1 byte of input */
	188	+ st1 {v0.16b}, [x5] /* store mac */
	189	+ add w2, w2, #16 /* process partial tail block */
	190	+7: ldrb w9, [x1], #1 /* get 1 byte of input */
231	191	umov w6, v1.b[0] /* get top crypted ctr byte */
232	192	umov w7, v0.b[0] /* get top mac byte */
233	193	.if \enc == 1
@@ -237,13 +197,13 @@ CPU_LE( rev x26, x26 ) · 3 unmodified lines
237	197	eor w9, w9, w6
238	198	eor w7, w7, w9
239	199	.endif
240		− strb w9, [x19], #1 /* store out byte */
241		− strb w7, [x24], #1 /* store mac byte */
242		− subs w21, w21, #1
243		− beq 6b
	200	+ strb w9, [x0], #1 /* store out byte */
	201	+ strb w7, [x5], #1 /* store mac byte */
	202	+ subs w2, w2, #1
	203	+ beq 5b
244	204	ext v0.16b, v0.16b, v0.16b, #1 /* shift out mac byte */
245	205	ext v1.16b, v1.16b, v1.16b, #1 /* shift out ctr byte */
246		− b 8b
	206	+ b 7b
247	207	.endm
248	208
249	209	/*

arch/arm64/crypto/aes-glue.c+1−1

@@ -223,8 +223,8 @@ static int ctr_encrypt(struct skcipher_request *req) · 222 unmodified lines
223	223	kernel_neon_begin();
224	224	aes_ctr_encrypt(walk.dst.virt.addr, walk.src.virt.addr,
225	225	(u8 *)ctx->key_enc, rounds, blocks, walk.iv);
226		− err = skcipher_walk_done(&walk, walk.nbytes % AES_BLOCK_SIZE);
227	226	kernel_neon_end();
	227	+ err = skcipher_walk_done(&walk, walk.nbytes % AES_BLOCK_SIZE);
228	228	}
229	229	if (walk.nbytes) {
230	230	u8 __aligned(8) tail[AES_BLOCK_SIZE];

arch/arm64/crypto/ghash-ce-core.S+25−51

@@ -322,55 +322,41 @@ ENDPROC(pmull_ghash_update_p8) · 321 unmodified lines
322	322	.endm
323	323
324	324	.macro pmull_gcm_do_crypt, enc
325		− frame_push 10
	325	+ ld1 {SHASH.2d}, [x4]
	326	+ ld1 {XL.2d}, [x1]
	327	+ ldr x8, [x5, #8] // load lower counter
326	328
327		− mov x19, x0
328		− mov x20, x1
329		− mov x21, x2
330		− mov x22, x3
331		− mov x23, x4
332		− mov x24, x5
333		− mov x25, x6
334		− mov x26, x7
335		− .if \enc == 1
336		− ldr x27, [sp, #96] // first stacked arg
337		− .endif
338		−
339		− ldr x28, [x24, #8] // load lower counter
340		−CPU_LE( rev x28, x28 )
341		−
342		−0: mov x0, x25
343		− load_round_keys w26, x0
344		− ld1 {SHASH.2d}, [x23]
345		− ld1 {XL.2d}, [x20]
	329	+ load_round_keys w7, x6
346	330
347	331	movi MASK.16b, #0xe1
348	332	ext SHASH2.16b, SHASH.16b, SHASH.16b, #8
	333	+CPU_LE( rev x8, x8 )
349	334	shl MASK.2d, MASK.2d, #57
350	335	eor SHASH2.16b, SHASH2.16b, SHASH.16b
351	336
352	337	.if \enc == 1
353		− ld1 {KS.16b}, [x27]
	338	+ ldr x10, [sp]
	339	+ ld1 {KS.16b}, [x10]
354	340	.endif
355	341
356		−1: ld1 {CTR.8b}, [x24] // load upper counter
357		− ld1 {INP.16b}, [x22], #16
358		− rev x9, x28
359		− add x28, x28, #1
360		− sub w19, w19, #1
	342	+0: ld1 {CTR.8b}, [x5] // load upper counter
	343	+ ld1 {INP.16b}, [x3], #16
	344	+ rev x9, x8
	345	+ add x8, x8, #1
	346	+ sub w0, w0, #1
361	347	ins CTR.d[1], x9 // set lower counter
362	348
363	349	.if \enc == 1
364	350	eor INP.16b, INP.16b, KS.16b // encrypt input
365		− st1 {INP.16b}, [x21], #16
	351	+ st1 {INP.16b}, [x2], #16
366	352	.endif
367	353
368	354	rev64 T1.16b, INP.16b
369	355
370		− cmp w26, #12
371		− b.ge 4f // AES-192/256?
	356	+ cmp w7, #12
	357	+ b.ge 2f // AES-192/256?
372	358
373		−2: enc_round CTR, v21
	359	+1: enc_round CTR, v21
374	360
375	361	ext T2.16b, XL.16b, XL.16b, #8
376	362	ext IN1.16b, T1.16b, T1.16b, #8
@@ -425,39 +411,27 @@ CPU_LE( rev x28, x28 ) · 48 unmodified lines
425	411
426	412	.if \enc == 0
427	413	eor INP.16b, INP.16b, KS.16b
428		− st1 {INP.16b}, [x21], #16
	414	+ st1 {INP.16b}, [x2], #16
429	415	.endif
430	416
431		− cbz w19, 3f
	417	+ cbnz w0, 0b
432	418
433		− if_will_cond_yield_neon
434		− st1 {XL.2d}, [x20]
435		− .if \enc == 1
436		− st1 {KS.16b}, [x27]
437		− .endif
438		− do_cond_yield_neon
439		− b 0b
440		− endif_yield_neon
	419	+CPU_LE( rev x8, x8 )
	420	+ st1 {XL.2d}, [x1]
	421	+ str x8, [x5, #8] // store lower counter
441	422
442		− b 1b
443		−
444		−3: st1 {XL.2d}, [x20]
445	423	.if \enc == 1
446		− st1 {KS.16b}, [x27]
	424	+ st1 {KS.16b}, [x10]
447	425	.endif
448	426
449		−CPU_LE( rev x28, x28 )
450		− str x28, [x24, #8] // store lower counter
451		−
452		− frame_pop
453	427	ret
454	428
455		−4: b.eq 5f // AES-192?
	429	+2: b.eq 3f // AES-192?
456	430	enc_round CTR, v17
457	431	enc_round CTR, v18
458		−5: enc_round CTR, v19
	432	+3: enc_round CTR, v19
459	433	enc_round CTR, v20
460		− b 2b
	434	+ b 1b
461	435	.endm
462	436
463	437	/*

arch/arm64/crypto/ghash-ce-glue.c+6−2

@@ -488,9 +488,13 @@ static int gcm_decrypt(struct aead_request *req) · 487 unmodified lines
488	488	err = skcipher_walk_done(&walk,
489	489	walk.nbytes % AES_BLOCK_SIZE);
490	490	}
491		− if (walk.nbytes)
492		− pmull_gcm_encrypt_block(iv, iv, NULL,
	491	+ if (walk.nbytes) {
	492	+ kernel_neon_begin();
	493	+ pmull_gcm_encrypt_block(iv, iv, ctx->aes_key.key_enc,
493	494	num_rounds(&ctx->aes_key));
	495	+ kernel_neon_end();
	496	+ }
	497	+
494	498	} else {
495	499	__aes_arm64_encrypt(ctx->aes_key.key_enc, tag, iv,
496	500	num_rounds(&ctx->aes_key));

arch/arm64/include/asm/alternative.h+6−1

@@ -28,7 +28,12 @@ typedef void (alternative_cb_t)(struct alt_instr alt, · 27 unmodified lines
28	28	__le32 origptr, __le32 updptr, int nr_inst);
29	29
30	30	void __init apply_alternatives_all(void);
31		−void apply_alternatives(void *start, size_t length);
	31	+
	32	+#ifdef CONFIG_MODULES
	33	+void apply_alternatives_module(void *start, size_t length);
	34	+#else
	35	+static inline void apply_alternatives_module(void *start, size_t length) { }
	36	+#endif
32	37
33	38	#define ALTINSTR_ENTRY(feature,cb) \
34	39	" .word 661b - .\n" /* label */ \

arch/arm64/include/asm/kvm_host.h+1−0

@@ -306,6 +306,7 @@ struct kvm_vcpu_arch { · 305 unmodified lines
306	306	#define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */
307	307	#define KVM_ARM64_FP_HOST (1 << 2) /* host FP regs loaded */
308	308	#define KVM_ARM64_HOST_SVE_IN_USE (1 << 3) /* backup for host TIF_SVE */
	309	+#define KVM_ARM64_HOST_SVE_ENABLED (1 << 4) /* SVE enabled for EL0 */
309	310
310	311	#define vcpu_gp_regs(v) (&(v)->arch.ctxt.gp_regs)
311	312

arch/arm64/include/asm/pgtable.h+1−5

@@ -224,10 +224,8 @@ static inline void set_pte(pte_t *ptep, pte_t pte) · 223 unmodified lines
224	224	* Only if the new pte is valid and kernel, otherwise TLB maintenance
225	225	* or update_mmu_cache() have the necessary barriers.
226	226	*/
227		− if (pte_valid_not_user(pte)) {
	227	+ if (pte_valid_not_user(pte))
228	228	dsb(ishst);
229		− isb();
230		− }
231	229	}
232	230
233	231	extern void __sync_icache_dcache(pte_t pteval);
@@ -434,7 +432,6 @@ static inline void set_pmd(pmd_t *pmdp, pmd_t pmd) · 200 unmodified lines
434	432	{
435	433	WRITE_ONCE(*pmdp, pmd);
436	434	dsb(ishst);
437		− isb();
438	435	}
439	436
440	437	static inline void pmd_clear(pmd_t *pmdp)
@@ -485,7 +482,6 @@ static inline void set_pud(pud_t *pudp, pud_t pud) · 44 unmodified lines
485	482	{
486	483	WRITE_ONCE(*pudp, pud);
487	484	dsb(ishst);
488		− isb();
489	485	}
490	486
491	487	static inline void pud_clear(pud_t *pudp)

arch/arm64/include/asm/simd.h+7−12

@@ -29,20 +29,15 @@ DECLARE_PER_CPU(bool, kernel_neon_busy); · 28 unmodified lines
29	29	static __must_check inline bool may_use_simd(void)
30	30	{
31	31	/*
32		− * The raw_cpu_read() is racy if called with preemption enabled.
33		− * This is not a bug: kernel_neon_busy is only set when
34		− * preemption is disabled, so we cannot migrate to another CPU
35		− * while it is set, nor can we migrate to a CPU where it is set.
36		− * So, if we find it clear on some CPU then we're guaranteed to
37		− * find it clear on any CPU we could migrate to.
38		− *
39		− * If we are in between kernel_neon_begin()...kernel_neon_end(),
40		− * the flag will be set, but preemption is also disabled, so we
41		− * can't migrate to another CPU and spuriously see it become
42		− * false.
	32	+ * kernel_neon_busy is only set while preemption is disabled,
	33	+ * and is clear whenever preemption is enabled. Since
	34	+ * this_cpu_read() is atomic w.r.t. preemption, kernel_neon_busy
	35	+ * cannot change under our feet -- if it's set we cannot be
	36	+ * migrated, and if it's clear we cannot be migrated to a CPU
	37	+ * where it is set.
43	38	*/
44	39	return !in_irq() && !irqs_disabled() && !in_nmi() &&
45		− !raw_cpu_read(kernel_neon_busy);
	40	+ !this_cpu_read(kernel_neon_busy);
46	41	}
47	42
48	43	#else /* ! CONFIG_KERNEL_MODE_NEON */

arch/arm64/include/asm/sysreg.h+11−0

@@ -728,6 +728,17 @@ asm( · 727 unmodified lines
728	728	asm volatile("msr_s " __stringify(r) ", %x0" : : "rZ" (__val)); \
729	729	} while (0)
730	730
	731	+/*
	732	+ * Modify bits in a sysreg. Bits in the clear mask are zeroed, then bits in the
	733	+ * set mask are set. Other bits are left as-is.
	734	+ */
	735	+#define sysreg_clear_set(sysreg, clear, set) do { \
	736	+ u64 __scs_val = read_sysreg(sysreg); \
	737	+ u64 __scs_new = (__scs_val & ~(u64)(clear)) \| (set); \
	738	+ if (__scs_new != __scs_val) \
	739	+ write_sysreg(__scs_new, sysreg); \
	740	+} while (0)
	741	+
731	742	static inline void config_sctlr_el1(u32 clear, u32 set)
732	743	{
733	744	u32 val;

arch/arm64/include/asm/tlb.h+1−1

@@ -37,7 +37,7 @@ static inline void __tlb_remove_table(void *_table) · 36 unmodified lines
37	37
38	38	static inline void tlb_flush(struct mmu_gather *tlb)
39	39	{
40		− struct vm_area_struct vma = { .vm_mm = tlb->mm, };
	40	+ struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0);
41	41
42	42	/*
43	43	* The ASID allocator will either invalidate the ASID or mark

arch/arm64/kernel/alternative.c+44−7

@@ -122,7 +122,30 @@ static void patch_alternative(struct alt_instr *alt, · 121 unmodified lines
122	122	}
123	123	}
124	124
125		−static void __apply_alternatives(void *alt_region, bool use_linear_alias)
	125	+/*
	126	+ * We provide our own, private D-cache cleaning function so that we don't
	127	+ * accidentally call into the cache.S code, which is patched by us at
	128	+ * runtime.
	129	+ */
	130	+static void clean_dcache_range_nopatch(u64 start, u64 end)
	131	+{
	132	+ u64 cur, d_size, ctr_el0;
	133	+
	134	+ ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0);
	135	+ d_size = 4 << cpuid_feature_extract_unsigned_field(ctr_el0,
	136	+ CTR_DMINLINE_SHIFT);
	137	+ cur = start & ~(d_size - 1);
	138	+ do {
	139	+ /*
	140	+ * We must clean+invalidate to the PoC in order to avoid
	141	+ * Cortex-A53 errata 826319, 827319, 824069 and 819472
	142	+ * (this corresponds to ARM64_WORKAROUND_CLEAN_CACHE)
	143	+ */
	144	+ asm volatile("dc civac, %0" : : "r" (cur) : "memory");
	145	+ } while (cur += d_size, cur < end);
	146	+}
	147	+
	148	+static void __apply_alternatives(void *alt_region, bool is_module)
126	149	{
127	150	struct alt_instr *alt;
128	151	struct alt_region *region = alt_region;
@@ -145,7 +168,7 @@ static void __apply_alternatives(void *alt_region, bool use_linear_alias) · 16 unmodified lines
145	168	pr_info_once("patching kernel code\n");
146	169
147	170	origptr = ALT_ORIG_PTR(alt);
148		− updptr = use_linear_alias ? lm_alias(origptr) : origptr;
	171	+ updptr = is_module ? origptr : lm_alias(origptr);
149	172	nr_inst = alt->orig_len / AARCH64_INSN_SIZE;
150	173
151	174	if (alt->cpufeature < ARM64_CB_PATCH)
@@ -155,8 +178,20 @@ static void __apply_alternatives(void *alt_region, bool use_linear_alias) · 3 unmodified lines
155	178
156	179	alt_cb(alt, origptr, updptr, nr_inst);
157	180
158		− flush_icache_range((uintptr_t)origptr,
159		− (uintptr_t)(origptr + nr_inst));
	181	+ if (!is_module) {
	182	+ clean_dcache_range_nopatch((u64)origptr,
	183	+ (u64)(origptr + nr_inst));
	184	+ }
	185	+ }
	186	+
	187	+ /*
	188	+ * The core module code takes care of cache maintenance in
	189	+ * flush_module_icache().
	190	+ */
	191	+ if (!is_module) {
	192	+ dsb(ish);
	193	+ __flush_icache_all();
	194	+ isb();
160	195	}
161	196	}
162	197
@@ -178,7 +213,7 @@ static int __apply_alternatives_multi_stop(void *unused) · 15 unmodified lines
178	213	isb();
179	214	} else {
180	215	BUG_ON(alternatives_applied);
181		− __apply_alternatives(&region, true);
	216	+ __apply_alternatives(&region, false);
182	217	/* Barriers provided by the cache flushing */
183	218	WRITE_ONCE(alternatives_applied, 1);
184	219	}
@@ -192,12 +227,14 @@ void __init apply_alternatives_all(void) · 7 unmodified lines
192	227	stop_machine(__apply_alternatives_multi_stop, NULL, cpu_online_mask);
193	228	}
194	229
195		−void apply_alternatives(void *start, size_t length)
	230	+#ifdef CONFIG_MODULES
	231	+void apply_alternatives_module(void *start, size_t length)
196	232	{
197	233	struct alt_region region = {
198	234	.begin = start,
199	235	.end = start + length,
200	236	};
201	237
202		− __apply_alternatives(&region, false);
	238	+ __apply_alternatives(&region, true);
203	239	}
	240	+#endif

arch/arm64/kernel/cpufeature.c+3−3

@@ -937,7 +937,7 @@ static int __init parse_kpti(char *str) · 936 unmodified lines
937	937	__kpti_forced = enabled ? 1 : -1;
938	938	return 0;
939	939	}
940		−__setup("kpti=", parse_kpti);
	940	+early_param("kpti", parse_kpti);
941	941	#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
942	942
943	943	#ifdef CONFIG_ARM64_HW_AFDBM
@@ -1351,9 +1351,9 @@ static void __update_cpu_capabilities(const struct arm64_cpu_capabilities *caps, · 407 unmodified lines
1351	1351
1352	1352	static void update_cpu_capabilities(u16 scope_mask)
1353	1353	{
1354		− __update_cpu_capabilities(arm64_features, scope_mask, "detected:");
1355	1354	__update_cpu_capabilities(arm64_errata, scope_mask,
1356	1355	"enabling workaround for");
	1356	+ __update_cpu_capabilities(arm64_features, scope_mask, "detected:");
1357	1357	}
1358	1358
1359	1359	static int __enable_cpu_capability(void *arg)
@@ -1408,8 +1408,8 @@ __enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps, · 48 unmodified lines
1408	1408
1409	1409	static void __init enable_cpu_capabilities(u16 scope_mask)
1410	1410	{
1411		− __enable_cpu_capabilities(arm64_features, scope_mask);
1412	1411	__enable_cpu_capabilities(arm64_errata, scope_mask);
	1412	+ __enable_cpu_capabilities(arm64_features, scope_mask);
1413	1413	}
1414	1414
1415	1415	/*

arch/arm64/kernel/module.c+2−3

@@ -448,9 +448,8 @@ int module_finalize(const Elf_Ehdr *hdr, · 447 unmodified lines
448	448	const char secstrs = (void )hdr + sechdrs[hdr->e_shstrndx].sh_offset;
449	449
450	450	for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++) {
451		− if (strcmp(".altinstructions", secstrs + s->sh_name) == 0) {
452		− apply_alternatives((void *)s->sh_addr, s->sh_size);
453		− }
	451	+ if (strcmp(".altinstructions", secstrs + s->sh_name) == 0)
	452	+ apply_alternatives_module((void *)s->sh_addr, s->sh_size);
454	453	#ifdef CONFIG_ARM64_MODULE_PLTS
455	454	if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE) &&
456	455	!strcmp(".text.ftrace_trampoline", secstrs + s->sh_name))

arch/arm64/kernel/smp.c+1−1

@@ -179,7 +179,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle) · 178 unmodified lines
179	179	* This is the secondary CPU boot entry. We're using this CPUs
180	180	* idle thread stack, but a set of temporary page tables.
181	181	*/
182		−asmlinkage void secondary_start_kernel(void)
	182	+asmlinkage notrace void secondary_start_kernel(void)
183	183	{
184	184	u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
185	185	struct mm_struct *mm = &init_mm;

arch/arm64/kvm/fpsimd.c+27−9

@@ -5,13 +5,14 @@ · 4 unmodified lines
5	5	* Copyright 2018 Arm Limited
6	6	* Author: Dave Martin <Dave.Martin@arm.com>
7	7	*/
8		−#include <linux/bottom_half.h>
	8	+#include <linux/irqflags.h>
9	9	#include <linux/sched.h>
10	10	#include <linux/thread_info.h>
11	11	#include <linux/kvm_host.h>
12	12	#include <asm/kvm_asm.h>
13	13	#include <asm/kvm_host.h>
14	14	#include <asm/kvm_mmu.h>
	15	+#include <asm/sysreg.h>
15	16
16	17	/*
17	18	* Called on entry to KVM_RUN unless this vcpu previously ran at least
@@ -61,10 +62,16 @@ void kvm_arch_vcpu_load_fp(struct kvm_vcpu *vcpu) · 43 unmodified lines
61	62	{
62	63	BUG_ON(!current->mm);
63	64
64		− vcpu->arch.flags &= ~(KVM_ARM64_FP_ENABLED \| KVM_ARM64_HOST_SVE_IN_USE);
	65	+ vcpu->arch.flags &= ~(KVM_ARM64_FP_ENABLED \|
	66	+ KVM_ARM64_HOST_SVE_IN_USE \|
	67	+ KVM_ARM64_HOST_SVE_ENABLED);
65	68	vcpu->arch.flags \|= KVM_ARM64_FP_HOST;
	69	+
66	70	if (test_thread_flag(TIF_SVE))
67	71	vcpu->arch.flags \|= KVM_ARM64_HOST_SVE_IN_USE;
	72	+
	73	+ if (read_sysreg(cpacr_el1) & CPACR_EL1_ZEN_EL0EN)
	74	+ vcpu->arch.flags \|= KVM_ARM64_HOST_SVE_ENABLED;
68	75	}
69	76
70	77	/*
@@ -92,19 +99,30 @@ void kvm_arch_vcpu_ctxsync_fp(struct kvm_vcpu *vcpu) · 21 unmodified lines
92	99	*/
93	100	void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu)
94	101	{
95		− local_bh_disable();
	102	+ unsigned long flags;
96	103
97		− update_thread_flag(TIF_SVE,
98		− vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE);
	104	+ local_irq_save(flags);
99	105
100	106	if (vcpu->arch.flags & KVM_ARM64_FP_ENABLED) {
101	107	/* Clean guest FP state to memory and invalidate cpu view */
102	108	fpsimd_save();
103	109	fpsimd_flush_cpu_state();
104		− } else if (!test_thread_flag(TIF_FOREIGN_FPSTATE)) {
105		− /* Ensure user trap controls are correctly restored */
106		− fpsimd_bind_task_to_cpu();
	110	+ } else if (system_supports_sve()) {
	111	+ /*
	112	+ * The FPSIMD/SVE state in the CPU has not been touched, and we
	113	+ * have SVE (and VHE): CPACR_EL1 (alias CPTR_EL2) has been
	114	+ * reset to CPACR_EL1_DEFAULT by the Hyp code, disabling SVE
	115	+ * for EL0. To avoid spurious traps, restore the trap state
	116	+ * seen by kvm_arch_vcpu_load_fp():
	117	+ */
	118	+ if (vcpu->arch.flags & KVM_ARM64_HOST_SVE_ENABLED)
	119	+ sysreg_clear_set(CPACR_EL1, 0, CPACR_EL1_ZEN_EL0EN);
	120	+ else
	121	+ sysreg_clear_set(CPACR_EL1, CPACR_EL1_ZEN_EL0EN, 0);
107	122	}
108	123
109		− local_bh_enable();
	124	+ update_thread_flag(TIF_SVE,
	125	+ vcpu->arch.flags & KVM_ARM64_HOST_SVE_IN_USE);
	126	+
	127	+ local_irq_restore(flags);
110	128	}

arch/arm64/mm/dma-mapping.c+5−4

@@ -583,13 +583,14 @@ static void __iommu_alloc_attrs(struct device dev, size_t size, · 582 unmodified lines
583	583	size >> PAGE_SHIFT);
584	584	return NULL;
585	585	}
586		− if (!coherent)
587		− __dma_flush_area(page_to_virt(page), iosize);
588		−
589	586	addr = dma_common_contiguous_remap(page, size, VM_USERMAP,
590	587	prot,
591	588	__builtin_return_address(0));
592		− if (!addr) {
	589	+ if (addr) {
	590	+ memset(addr, 0, size);
	591	+ if (!coherent)
	592	+ __dma_flush_area(page_to_virt(page), iosize);
	593	+ } else {
593	594	iommu_dma_unmap_page(dev, *handle, iosize, 0, attrs);
594	595	dma_release_from_contiguous(dev, page,
595	596	size >> PAGE_SHIFT);

arch/arm64/mm/hugetlbpage.c+4−3

@@ -108,7 +108,6 @@ static pte_t get_clear_flush(struct mm_struct *mm, · 107 unmodified lines
108	108	unsigned long pgsize,
109	109	unsigned long ncontig)
110	110	{
111		− struct vm_area_struct vma = { .vm_mm = mm };
112	111	pte_t orig_pte = huge_ptep_get(ptep);
113	112	bool valid = pte_valid(orig_pte);
114	113	unsigned long i, saddr = addr;
@@ -125,8 +124,10 @@ static pte_t get_clear_flush(struct mm_struct *mm, · 10 unmodified lines
125	124	orig_pte = pte_mkdirty(orig_pte);
126	125	}
127	126
128		− if (valid)
	127	+ if (valid) {
	128	+ struct vm_area_struct vma = TLB_FLUSH_VMA(mm, 0);
129	129	flush_tlb_range(&vma, saddr, addr);
	130	+ }
130	131	return orig_pte;
131	132	}
132	133
@@ -145,7 +146,7 @@ static void clear_flush(struct mm_struct *mm, · 12 unmodified lines
145	146	unsigned long pgsize,
146	147	unsigned long ncontig)
147	148	{
148		− struct vm_area_struct vma = { .vm_mm = mm };
	149	+ struct vm_area_struct vma = TLB_FLUSH_VMA(mm, 0);
149	150	unsigned long i, saddr = addr;
150	151
151	152	for (i = 0; i < ncontig; i++, addr += pgsize, ptep++)

arch/arm64/mm/init.c+3−1

@@ -611,11 +611,13 @@ void __init mem_init(void) · 610 unmodified lines
611	611	BUILD_BUG_ON(TASK_SIZE_32 > TASK_SIZE_64);
612	612	#endif
613	613
	614	+#ifdef CONFIG_SPARSEMEM_VMEMMAP
614	615	/*
615	616	* Make sure we chose the upper bound of sizeof(struct page)
616		− * correctly.
	617	+ * correctly when sizing the VMEMMAP array.
617	618	*/
618	619	BUILD_BUG_ON(sizeof(struct page) > (1 << STRUCT_PAGE_MAX_SHIFT));
	620	+#endif
619	621
620	622	if (PAGE_SIZE >= 16384 && get_num_physpages() <= 128) {
621	623	extern int sysctl_overcommit_memory;

arch/arm64/mm/proc.S+3−2

@@ -217,8 +217,9 @@ ENDPROC(idmap_cpu_replace_ttbr1) · 216 unmodified lines
217	217
218	218	.macro __idmap_kpti_put_pgtable_ent_ng, type
219	219	orr \type, \type, #PTE_NG // Same bit for blocks and pages
220		− str \type, [cur_\()\type\()p] // Update the entry and ensure it
221		− dc civac, cur_\()\type\()p // is visible to all CPUs.
	220	+ str \type, [cur_\()\type\()p] // Update the entry and ensure
	221	+ dmb sy // that it is visible to all
	222	+ dc civac, cur_\()\type\()p // CPUs.
222	223	.endm
223	224
224	225	/*

arch/ia64/include/asm/tlb.h+3−4

@@ -115,12 +115,11 @@ ia64_tlb_flush_mmu_tlbonly(struct mmu_gather *tlb, unsigned long start, unsigned · 114 unmodified lines
115	115	flush_tlb_all();
116	116	} else {
117	117	/*
118		− * XXX fix me: flush_tlb_range() should take an mm pointer instead of a
119		− * vma pointer.
	118	+ * flush_tlb_range() takes a vma instead of a mm pointer because
	119	+ * some architectures want the vm_flags for ITLB/DTLB flush.
120	120	*/
121		− struct vm_area_struct vma;
	121	+ struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0);
122	122
123		− vma.vm_mm = tlb->mm;
124	123	/* flush the address range from the tlb: */
125	124	flush_tlb_range(&vma, start, end);
126	125	/* now flush the virt. page-table area mapping the address range: */

arch/ia64/kernel/perfmon.c+2−4

@@ -2278,17 +2278,15 @@ pfm_smpl_buffer_alloc(struct task_struct task, struct file filp, pfm_context_t · 2277 unmodified lines
2278	2278	DPRINT(("smpl_buf @%p\n", smpl_buf));
2279	2279
2280	2280	/* allocate vma */
2281		− vma = kmem_cache_zalloc(vm_area_cachep, GFP_KERNEL);
	2281	+ vma = vm_area_alloc(mm);
2282	2282	if (!vma) {
2283	2283	DPRINT(("Cannot allocate vma\n"));
2284	2284	goto error_kmem;
2285	2285	}
2286		− INIT_LIST_HEAD(&vma->anon_vma_chain);
2287	2286
2288	2287	/*
2289	2288	* partially initialize the vma for the sampling buffer
2290	2289	*/
2291		− vma->vm_mm = mm;
2292	2290	vma->vm_file = get_file(filp);
2293	2291	vma->vm_flags = VM_READ\|VM_MAYREAD\|VM_DONTEXPAND\|VM_DONTDUMP;
2294	2292	vma->vm_page_prot = PAGE_READONLY; /* XXX may need to change */
@@ -2346,7 +2344,7 @@ pfm_smpl_buffer_alloc(struct task_struct task, struct file filp, pfm_context_t · 51 unmodified lines
2346	2344	return 0;
2347	2345
2348	2346	error:
2349		− kmem_cache_free(vm_area_cachep, vma);
	2347	+ vm_area_free(vma);
2350	2348	error_kmem:
2351	2349	pfm_rvfree(smpl_buf, size);
2352	2350

arch/ia64/mm/init.c+7−9

@@ -114,10 +114,9 @@ ia64_init_addr_space (void) · 113 unmodified lines
114	114	* the problem. When the process attempts to write to the register backing store
115	115	* for the first time, it will get a SEGFAULT in this case.
116	116	*/
117		− vma = kmem_cache_zalloc(vm_area_cachep, GFP_KERNEL);
	117	+ vma = vm_area_alloc(current->mm);
118	118	if (vma) {
119		− INIT_LIST_HEAD(&vma->anon_vma_chain);
120		− vma->vm_mm = current->mm;
	119	+ vma_set_anonymous(vma);
121	120	vma->vm_start = current->thread.rbs_bot & PAGE_MASK;
122	121	vma->vm_end = vma->vm_start + PAGE_SIZE;
123	122	vma->vm_flags = VM_DATA_DEFAULT_FLAGS\|VM_GROWSUP\|VM_ACCOUNT;
@@ -125,7 +124,7 @@ ia64_init_addr_space (void) · 1 unmodified line
125	124	down_write(&current->mm->mmap_sem);
126	125	if (insert_vm_struct(current->mm, vma)) {
127	126	up_write(&current->mm->mmap_sem);
128		− kmem_cache_free(vm_area_cachep, vma);
	127	+ vm_area_free(vma);
129	128	return;
130	129	}
131	130	up_write(&current->mm->mmap_sem);
@@ -133,10 +132,9 @@ ia64_init_addr_space (void) · 1 unmodified line
133	132
134	133	/* map NaT-page at address zero to speed up speculative dereferencing of NULL: */
135	134	if (!(current->personality & MMAP_PAGE_ZERO)) {
136		− vma = kmem_cache_zalloc(vm_area_cachep, GFP_KERNEL);
	135	+ vma = vm_area_alloc(current->mm);
137	136	if (vma) {
138		− INIT_LIST_HEAD(&vma->anon_vma_chain);
139		− vma->vm_mm = current->mm;
	137	+ vma_set_anonymous(vma);
140	138	vma->vm_end = PAGE_SIZE;
141	139	vma->vm_page_prot = __pgprot(pgprot_val(PAGE_READONLY) \| _PAGE_MA_NAT);
142	140	vma->vm_flags = VM_READ \| VM_MAYREAD \| VM_IO \|
@@ -144,7 +142,7 @@ ia64_init_addr_space (void) · 1 unmodified line
144	142	down_write(&current->mm->mmap_sem);
145	143	if (insert_vm_struct(current->mm, vma)) {
146	144	up_write(&current->mm->mmap_sem);
147		− kmem_cache_free(vm_area_cachep, vma);
	145	+ vm_area_free(vma);
148	146	return;
149	147	}
150	148	up_write(&current->mm->mmap_sem);
@@ -277,7 +275,7 @@ static struct vm_area_struct gate_vma; · 126 unmodified lines
277	275
278	276	static int __init gate_vma_init(void)
279	277	{
280		− gate_vma.vm_mm = NULL;
	278	+ vma_init(&gate_vma, NULL);
281	279	gate_vma.vm_start = FIXADDR_USER_START;
282	280	gate_vma.vm_end = FIXADDR_USER_END;
283	281	gate_vma.vm_flags = VM_READ \| VM_MAYREAD \| VM_EXEC \| VM_MAYEXEC;

arch/m68k/include/asm/mcf_pgalloc.h+3−1

@@ -44,6 +44,7 @@ extern inline pmd_t pmd_alloc_kernel(pgd_t pgd, unsigned long address) · 43 unmodified lines
44	44	static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t page,
45	45	unsigned long address)
46	46	{
	47	+ pgtable_page_dtor(page);
47	48	__free_page(page);
48	49	}
49	50
@@ -74,8 +75,9 @@ static inline struct page pte_alloc_one(struct mm_struct mm, · 24 unmodified lines
74	75	return page;
75	76	}
76	77
77		−extern inline void pte_free(struct mm_struct mm, struct page page)
	78	+static inline void pte_free(struct mm_struct mm, struct page page)
78	79	{
	80	+ pgtable_page_dtor(page);
79	81	__free_page(page);
80	82	}
81	83

arch/microblaze/Kconfig.debug+0−7

@@ -8,11 +8,4 @@ config TRACE_IRQFLAGS_SUPPORT · 7 unmodified lines
8	8
9	9	source "lib/Kconfig.debug"
10	10
11		−config HEART_BEAT
12		− bool "Heart beat function for kernel"
13		− default n
14		− help
15		− This option turns on/off heart beat kernel functionality.
16		− First GPIO node is taken.
17		−
18	11	endmenu

arch/microblaze/include/asm/setup.h+0−5

@@ -19,15 +19,10 @@ extern char cmd_line[COMMAND_LINE_SIZE]; · 18 unmodified lines
19	19
20	20	extern char *klimit;
21	21
22		−void microblaze_heartbeat(void);
23		−void microblaze_setup_heartbeat(void);
24		−
25	22	# ifdef CONFIG_MMU
26	23	extern void mmu_reset(void);
27	24	# endif /* CONFIG_MMU */
28	25
29		−extern void of_platform_reset_gpio_probe(void);
30		−
31	26	void time_init(void);
32	27	void init_IRQ(void);
33	28	void machine_early_init(const char *cmdline, unsigned int ram,

arch/microblaze/include/asm/unistd.h+1−1

@@ -38,6 +38,6 @@ · 37 unmodified lines
38	38
39	39	#endif /* __ASSEMBLY__ */
40	40
41		−#define __NR_syscalls 399
	41	+#define __NR_syscalls 401
42	42
43	43	#endif /* _ASM_MICROBLAZE_UNISTD_H */

arch/microblaze/include/uapi/asm/unistd.h+2−0

@@ -415,5 +415,7 @@ · 414 unmodified lines
415	415	#define __NR_pkey_alloc 396
416	416	#define __NR_pkey_free 397
417	417	#define __NR_statx 398
	418	+#define __NR_io_pgetevents 399
	419	+#define __NR_rseq 400
418	420
419	421	#endif /* _UAPI_ASM_MICROBLAZE_UNISTD_H */

arch/microblaze/kernel/Makefile+1−3

@@ -8,7 +8,6 @@ ifdef CONFIG_FUNCTION_TRACER · 7 unmodified lines
8	8	CFLAGS_REMOVE_timer.o = -pg
9	9	CFLAGS_REMOVE_intc.o = -pg
10	10	CFLAGS_REMOVE_early_printk.o = -pg
11		−CFLAGS_REMOVE_heartbeat.o = -pg
12	11	CFLAGS_REMOVE_ftrace.o = -pg
13	12	CFLAGS_REMOVE_process.o = -pg
14	13	endif
@@ -17,12 +16,11 @@ extra-y := head.o vmlinux.lds · 2 unmodified lines
17	16
18	17	obj-y += dma.o exceptions.o \
19	18	hw_exception_handler.o irq.o \
20		− platform.o process.o prom.o ptrace.o \
	19	+ process.o prom.o ptrace.o \
21	20	reset.o setup.o signal.o sys_microblaze.o timer.o traps.o unwind.o
22	21
23	22	obj-y += cpu/
24	23
25		−obj-$(CONFIG_HEART_BEAT) += heartbeat.o
26	24	obj-$(CONFIG_MODULES) += microblaze_ksyms.o module.o
27	25	obj-$(CONFIG_MMU) += misc.o
28	26	obj-$(CONFIG_STACKTRACE) += stacktrace.o

arch/microblaze/kernel/heartbeat.c+0−72

@@ -1,72 +0,0 @@
1		−/*
2		− * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3		− * Copyright (C) 2007-2009 PetaLogix
4		− * Copyright (C) 2006 Atmark Techno, Inc.
5		− *
6		− * This file is subject to the terms and conditions of the GNU General Public
7		− * License. See the file "COPYING" in the main directory of this archive
8		− * for more details.
9		− */
10		−
11		−#include <linux/sched.h>
12		−#include <linux/sched/loadavg.h>
13		−#include <linux/io.h>
14		−
15		−#include <asm/setup.h>
16		−#include <asm/page.h>
17		−#include <asm/prom.h>
18		−
19		−static unsigned int base_addr;
20		−
21		−void microblaze_heartbeat(void)
22		−{
23		− static unsigned int cnt, period, dist;
24		−
25		− if (base_addr) {
26		− if (cnt == 0 \|\| cnt == dist)
27		− out_be32(base_addr, 1);
28		− else if (cnt == 7 \|\| cnt == dist + 7)
29		− out_be32(base_addr, 0);
30		−
31		− if (++cnt > period) {
32		− cnt = 0;
33		− /*
34		− * The hyperbolic function below modifies the heartbeat
35		− * period length in dependency of the current (5min)
36		− * load. It goes through the points f(0)=126, f(1)=86,
37		− * f(5)=51, f(inf)->30.
38		− */
39		− period = ((672 << FSHIFT) / (5 * avenrun[0] +
40		− (7 << FSHIFT))) + 30;
41		− dist = period / 4;
42		− }
43		− }
44		−}
45		−
46		−void microblaze_setup_heartbeat(void)
47		−{
48		− struct device_node *gpio = NULL;
49		− int *prop;
50		− int j;
51		− const char * const gpio_list[] = {
52		− "xlnx,xps-gpio-1.00.a",
53		− NULL
54		− };
55		−
56		− for (j = 0; gpio_list[j] != NULL; j++) {
57		− gpio = of_find_compatible_node(NULL, NULL, gpio_list[j]);
58		− if (gpio)
59		− break;
60		− }
61		−
62		− if (gpio) {
63		− base_addr = be32_to_cpup(of_get_property(gpio, "reg", NULL));
64		− base_addr = (unsigned long) ioremap(base_addr, PAGE_SIZE);
65		− pr_notice("Heartbeat GPIO at 0x%x\n", base_addr);
66		−
67		− /* GPIO is configured as output */
68		− prop = (int *) of_get_property(gpio, "xlnx,is-bidir", NULL);
69		− if (prop)
70		− out_be32(base_addr + 4, 0);
71		− }
72		−}

arch/microblaze/kernel/platform.c+0−29

@@ -1,29 +0,0 @@
1		−/*
2		− * Copyright 2008 Michal Simek <monstr@monstr.eu>
3		− *
4		− * based on virtex.c file
5		− *
6		− * Copyright 2007 Secret Lab Technologies Ltd.
7		− *
8		− * This file is licensed under the terms of the GNU General Public License
9		− * version 2. This program is licensed "as is" without any warranty of any
10		− * kind, whether express or implied.
11		− */
12		−
13		−#include <linux/init.h>
14		−#include <linux/of_platform.h>
15		−#include <asm/setup.h>
16		−
17		−static struct of_device_id xilinx_of_bus_ids[] __initdata = {
18		− { .compatible = "simple-bus", },
19		− { .compatible = "xlnx,compound", },
20		− {}
21		−};
22		−
23		−static int __init microblaze_device_probe(void)
24		−{
25		− of_platform_bus_probe(NULL, xilinx_of_bus_ids, NULL);
26		− of_platform_reset_gpio_probe();
27		− return 0;
28		−}
29		−device_initcall(microblaze_device_probe);

arch/microblaze/kernel/reset.c+6−5

@@ -18,7 +18,7 @@ · 17 unmodified lines
18	18	static int handle; /* reset pin handle */
19	19	static unsigned int reset_val;
20	20
21		−void of_platform_reset_gpio_probe(void)
	21	+static int of_platform_reset_gpio_probe(void)
22	22	{
23	23	int ret;
24	24	handle = of_get_named_gpio(of_find_node_by_path("/"),
@@ -27,13 +27,13 @@ void of_platform_reset_gpio_probe(void) · 2 unmodified lines
27	27	if (!gpio_is_valid(handle)) {
28	28	pr_info("Skipping unavailable RESET gpio %d (%s)\n",
29	29	handle, "reset");
30		− return;
	30	+ return -ENODEV;
31	31	}
32	32
33	33	ret = gpio_request(handle, "reset");
34	34	if (ret < 0) {
35	35	pr_info("GPIO pin is already allocated\n");
36		− return;
	36	+ return ret;
37	37	}
38	38
39	39	/* get current setup value */
@@ -51,11 +51,12 @@ void of_platform_reset_gpio_probe(void) · 11 unmodified lines
51	51
52	52	pr_info("RESET: Registered gpio device: %d, current val: %d\n",
53	53	handle, reset_val);
54		− return;
	54	+ return 0;
55	55	err:
56	56	gpio_free(handle);
57		− return;
	57	+ return ret;
58	58	}
	59	+device_initcall(of_platform_reset_gpio_probe);
59	60
60	61
61	62	static void gpio_system_reset(void)

arch/microblaze/kernel/syscall_table.S+2−0

@@ -400,3 +400,5 @@ ENTRY(sys_call_table) · 399 unmodified lines
400	400	.long sys_pkey_alloc
401	401	.long sys_pkey_free
402	402	.long sys_statx
	403	+ .long sys_io_pgetevents
	404	+ .long sys_rseq

arch/microblaze/kernel/timer.c+0−7

@@ -156,9 +156,6 @@ static inline void timer_ack(void) · 155 unmodified lines
156	156	static irqreturn_t timer_interrupt(int irq, void *dev_id)
157	157	{
158	158	struct clock_event_device *evt = &clockevent_xilinx_timer;
159		−#ifdef CONFIG_HEART_BEAT
160		− microblaze_heartbeat();
161		−#endif
162	159	timer_ack();
163	160	evt->event_handler(evt);
164	161	return IRQ_HANDLED;
@@ -318,10 +315,6 @@ static int __init xilinx_timer_init(struct device_node *timer) · 153 unmodified lines
318	315	return ret;
319	316	}
320	317
321		−#ifdef CONFIG_HEART_BEAT
322		− microblaze_setup_heartbeat();
323		−#endif
324		−
325	318	ret = xilinx_clocksource_init();
326	319	if (ret)
327	320	return ret;

arch/mips/Kconfig+1−0

@@ -65,6 +65,7 @@ config MIPS · 64 unmodified lines
65	65	select HAVE_OPROFILE
66	66	select HAVE_PERF_EVENTS
67	67	select HAVE_REGS_AND_STACK_ACCESS_API
	68	+ select HAVE_RSEQ
68	69	select HAVE_STACKPROTECTOR
69	70	select HAVE_SYSCALL_TRACEPOINTS
70	71	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT \|\| !SMP

arch/mips/ath79/common.c+1−1

@@ -58,7 +58,7 @@ EXPORT_SYMBOL_GPL(ath79_ddr_ctrl_init); · 57 unmodified lines
58	58
59	59	void ath79_ddr_wb_flush(u32 reg)
60	60	{
61		− void __iomem *flush_reg = ath79_ddr_wb_flush_base + reg;
	61	+ void __iomem flush_reg = ath79_ddr_wb_flush_base + (reg 4);
62	62
63	63	/* Flush the DDR write buffer. */
64	64	__raw_writel(0x1, flush_reg);

arch/mips/ath79/mach-pb44.c+1−1

@@ -34,7 +34,7 @@ · 33 unmodified lines
34	34	#define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL)
35	35
36	36	static struct gpiod_lookup_table pb44_i2c_gpiod_table = {
37		− .dev_id = "i2c-gpio",
	37	+ .dev_id = "i2c-gpio.0",
38	38	.table = {
39	39	GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SDA,
40	40	NULL, 0, GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN),

arch/mips/include/asm/io.h+2−0

@@ -414,6 +414,8 @@ static inline type pfx##in##bwlq##p(unsigned long port) \ · 413 unmodified lines
414	414	__val = *__addr; \
415	415	slow; \
416	416	\
	417	+ /* prevent prefetching of coherent DMA data prematurely */ \
	418	+ rmb(); \
417	419	return pfx##ioswab##bwlq(__addr, __val); \
418	420	}
419	421

arch/mips/include/uapi/asm/unistd.h+12−6

@@ -388,17 +388,19 @@ · 387 unmodified lines
388	388	#define __NR_pkey_alloc (__NR_Linux + 364)
389	389	#define __NR_pkey_free (__NR_Linux + 365)
390	390	#define __NR_statx (__NR_Linux + 366)
	391	+#define __NR_rseq (__NR_Linux + 367)
	392	+#define __NR_io_pgetevents (__NR_Linux + 368)
391	393
392	394
393	395	/*
394	396	* Offset of the last Linux o32 flavoured syscall
395	397	*/
396		−#define __NR_Linux_syscalls 366
	398	+#define __NR_Linux_syscalls 368
397	399
398	400	#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
399	401
400	402	#define __NR_O32_Linux 4000
401		−#define __NR_O32_Linux_syscalls 366
	403	+#define __NR_O32_Linux_syscalls 368
402	404
403	405	#if _MIPS_SIM == _MIPS_SIM_ABI64
404	406
@@ -733,16 +735,18 @@ · 328 unmodified lines
733	735	#define __NR_pkey_alloc (__NR_Linux + 324)
734	736	#define __NR_pkey_free (__NR_Linux + 325)
735	737	#define __NR_statx (__NR_Linux + 326)
	738	+#define __NR_rseq (__NR_Linux + 327)
	739	+#define __NR_io_pgetevents (__NR_Linux + 328)
736	740
737	741	/*
738	742	* Offset of the last Linux 64-bit flavoured syscall
739	743	*/
740		−#define __NR_Linux_syscalls 326
	744	+#define __NR_Linux_syscalls 328
741	745
742	746	#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
743	747
744	748	#define __NR_64_Linux 5000
745		−#define __NR_64_Linux_syscalls 326
	749	+#define __NR_64_Linux_syscalls 328
746	750
747	751	#if _MIPS_SIM == _MIPS_SIM_NABI32
748	752
@@ -1081,15 +1085,17 @@ · 332 unmodified lines
1081	1085	#define __NR_pkey_alloc (__NR_Linux + 328)
1082	1086	#define __NR_pkey_free (__NR_Linux + 329)
1083	1087	#define __NR_statx (__NR_Linux + 330)
	1088	+#define __NR_rseq (__NR_Linux + 331)
	1089	+#define __NR_io_pgetevents (__NR_Linux + 332)
1084	1090
1085	1091	/*
1086	1092	* Offset of the last N32 flavoured syscall
1087	1093	*/
1088		−#define __NR_Linux_syscalls 330
	1094	+#define __NR_Linux_syscalls 332
1089	1095
1090	1096	#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
1091	1097
1092	1098	#define __NR_N32_Linux 6000
1093		−#define __NR_N32_Linux_syscalls 330
	1099	+#define __NR_N32_Linux_syscalls 332
1094	1100
1095	1101	#endif /* _UAPI_ASM_UNISTD_H */

arch/mips/kernel/entry.S+8−0

@@ -79,6 +79,10 @@ FEXPORT(ret_from_fork) · 78 unmodified lines
79	79	jal schedule_tail # a0 = struct task_struct *prev
80	80
81	81	FEXPORT(syscall_exit)
	82	+#ifdef CONFIG_DEBUG_RSEQ
	83	+ move a0, sp
	84	+ jal rseq_syscall
	85	+#endif
82	86	local_irq_disable # make sure need_resched and
83	87	# signals dont change between
84	88	# sampling and return
@@ -141,6 +145,10 @@ work_notifysig: # deal with pending signals and · 56 unmodified lines
141	145	j resume_userspace_check
142	146
143	147	FEXPORT(syscall_exit_partial)
	148	+#ifdef CONFIG_DEBUG_RSEQ
	149	+ move a0, sp
	150	+ jal rseq_syscall
	151	+#endif
144	152	local_irq_disable # make sure need_resched doesn't
145	153	# change between and return
146	154	LONG_L a2, TI_FLAGS($28) # current->work

arch/mips/kernel/mcount.S+12−15

@@ -119,10 +119,20 @@ NESTED(_mcount, PT_SIZE, ra) · 118 unmodified lines
119	119	EXPORT_SYMBOL(_mcount)
120	120	PTR_LA t1, ftrace_stub
121	121	PTR_L t2, ftrace_trace_function /* Prepare t2 for (1) */
122		− bne t1, t2, static_trace
	122	+ beq t1, t2, fgraph_trace
123	123	nop
124	124
	125	+ MCOUNT_SAVE_REGS
	126	+
	127	+ move a0, ra /* arg1: self return address */
	128	+ jalr t2 /* (1) call ftrace_trace_function /
	129	+ move a1, AT /* arg2: parent's return address */
	130	+
	131	+ MCOUNT_RESTORE_REGS
	132	+
	133	+fgraph_trace:
125	134	#ifdef CONFIG_FUNCTION_GRAPH_TRACER
	135	+ PTR_LA t1, ftrace_stub
126	136	PTR_L t3, ftrace_graph_return
127	137	bne t1, t3, ftrace_graph_caller
128	138	nop
@@ -131,24 +141,11 @@ EXPORT_SYMBOL(_mcount) · 2 unmodified lines
131	141	bne t1, t3, ftrace_graph_caller
132	142	nop
133	143	#endif
134		− b ftrace_stub
135		−#ifdef CONFIG_32BIT
136		− addiu sp, sp, 8
137		−#else
138		− nop
139		−#endif
140	144
141		−static_trace:
142		− MCOUNT_SAVE_REGS
143		−
144		− move a0, ra /* arg1: self return address */
145		− jalr t2 /* (1) call ftrace_trace_function /
146		− move a1, AT /* arg2: parent's return address */
147		−
148		− MCOUNT_RESTORE_REGS
149	145	#ifdef CONFIG_32BIT
150	146	addiu sp, sp, 8
151	147	#endif
	148	+
152	149	.globl ftrace_stub
153	150	ftrace_stub:
154	151	RETURN_BACK

arch/mips/kernel/process.c+29−14

@@ -29,6 +29,7 @@ · 28 unmodified lines
29	29	#include <linux/kallsyms.h>
30	30	#include <linux/random.h>
31	31	#include <linux/prctl.h>
	32	+#include <linux/nmi.h>
32	33
33	34	#include <asm/asm.h>
34	35	#include <asm/bootinfo.h>
@@ -655,28 +656,42 @@ unsigned long arch_align_stack(unsigned long sp) · 620 unmodified lines
655	656	return sp & ALMASK;
656	657	}
657	658
658		−static void arch_dump_stack(void *info)
	659	+static DEFINE_PER_CPU(call_single_data_t, backtrace_csd);
	660	+static struct cpumask backtrace_csd_busy;
	661	+
	662	+static void handle_backtrace(void *info)
659	663	{
660		− struct pt_regs *regs;
	664	+ nmi_cpu_backtrace(get_irq_regs());
	665	+ cpumask_clear_cpu(smp_processor_id(), &backtrace_csd_busy);
	666	+}
661	667
662		− regs = get_irq_regs();
	668	+static void raise_backtrace(cpumask_t *mask)
	669	+{
	670	+ call_single_data_t *csd;
	671	+ int cpu;
663	672
664		− if (regs)
665		− show_regs(regs);
	673	+ for_each_cpu(cpu, mask) {
	674	+ /*
	675	+ * If we previously sent an IPI to the target CPU & it hasn't
	676	+ * cleared its bit in the busy cpumask then it didn't handle
	677	+ * our previous IPI & it's not safe for us to reuse the
	678	+ * call_single_data_t.
	679	+ */
	680	+ if (cpumask_test_and_set_cpu(cpu, &backtrace_csd_busy)) {
	681	+ pr_warn("Unable to send backtrace IPI to CPU%u - perhaps it hung?\n",
	682	+ cpu);
	683	+ continue;
	684	+ }
666	685
667		− dump_stack();
	686	+ csd = &per_cpu(backtrace_csd, cpu);
	687	+ csd->func = handle_backtrace;
	688	+ smp_call_function_single_async(cpu, csd);
	689	+ }
668	690	}
669	691
670	692	void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
671	693	{
672		− long this_cpu = get_cpu();
673		−
674		− if (cpumask_test_cpu(this_cpu, mask) && !exclude_self)
675		− dump_stack();
676		−
677		− smp_call_function_many(mask, arch_dump_stack, NULL, 1);
678		−
679		− put_cpu();
	694	+ nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace);
680	695	}
681	696
682	697	int mips_get_process_fp_mode(struct task_struct *task)

arch/mips/kernel/scall32-o32.S+2−0

@@ -590,3 +590,5 @@ EXPORT(sys_call_table) · 589 unmodified lines
590	590	PTR sys_pkey_alloc
591	591	PTR sys_pkey_free /* 4365 */
592	592	PTR sys_statx
	593	+ PTR sys_rseq
	594	+ PTR sys_io_pgetevents

arch/mips/kernel/scall64-64.S+2−0

@@ -439,4 +439,6 @@ EXPORT(sys_call_table) · 438 unmodified lines
439	439	PTR sys_pkey_alloc
440	440	PTR sys_pkey_free /* 5325 */
441	441	PTR sys_statx
	442	+ PTR sys_rseq
	443	+ PTR sys_io_pgetevents
442	444	.size sys_call_table,.-sys_call_table

arch/mips/kernel/scall64-n32.S+2−0

@@ -434,4 +434,6 @@ EXPORT(sysn32_call_table) · 433 unmodified lines
434	434	PTR sys_pkey_alloc
435	435	PTR sys_pkey_free
436	436	PTR sys_statx /* 6330 */
	437	+ PTR sys_rseq
	438	+ PTR compat_sys_io_pgetevents
437	439	.size sysn32_call_table,.-sysn32_call_table

arch/mips/kernel/scall64-o32.S+2−0

@@ -583,4 +583,6 @@ EXPORT(sys32_call_table) · 582 unmodified lines
583	583	PTR sys_pkey_alloc
584	584	PTR sys_pkey_free /* 4365 */
585	585	PTR sys_statx
	586	+ PTR sys_rseq
	587	+ PTR compat_sys_io_pgetevents
586	588	.size sys32_call_table,.-sys32_call_table

arch/mips/kernel/signal.c+3−0

@@ -801,6 +801,8 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 800 unmodified lines
801	801	regs->regs[0] = 0; /* Don't deal with this again. */
802	802	}
803	803
	804	+ rseq_signal_deliver(ksig, regs);
	805	+
804	806	if (sig_uses_siginfo(&ksig->ka, abi))
805	807	ret = abi->setup_rt_frame(vdso + abi->vdso->off_rt_sigreturn,
806	808	ksig, regs, oldset);
@@ -868,6 +870,7 @@ asmlinkage void do_notify_resume(struct pt_regs regs, void unused, · 61 unmodified lines
868	870	if (thread_info_flags & _TIF_NOTIFY_RESUME) {
869	871	clear_thread_flag(TIF_NOTIFY_RESUME);
870	872	tracehook_notify_resume(regs);
	873	+ rseq_handle_notify_resume(NULL, regs);
871	874	}
872	875
873	876	user_enter();

arch/mips/kernel/traps.c+1−0

@@ -351,6 +351,7 @@ static void __show_regs(const struct pt_regs *regs) · 350 unmodified lines
351	351	void show_regs(struct pt_regs *regs)
352	352	{
353	353	__show_regs((struct pt_regs *)regs);
	354	+ dump_stack();
354	355	}
355	356
356	357	void show_registers(struct pt_regs *regs)

arch/mips/mm/ioremap.c+25−12

@@ -9,6 +9,7 @@ · 8 unmodified lines
9	9	#include <linux/export.h>
10	10	#include <asm/addrspace.h>
11	11	#include <asm/byteorder.h>
	12	+#include <linux/ioport.h>
12	13	#include <linux/sched.h>
13	14	#include <linux/slab.h>
14	15	#include <linux/vmalloc.h>
@@ -98,6 +99,20 @@ static int remap_area_pages(unsigned long address, phys_addr_t phys_addr, · 83 unmodified lines
98	99	return error;
99	100	}
100	101
	102	+static int __ioremap_check_ram(unsigned long start_pfn, unsigned long nr_pages,
	103	+ void *arg)
	104	+{
	105	+ unsigned long i;
	106	+
	107	+ for (i = 0; i < nr_pages; i++) {
	108	+ if (pfn_valid(start_pfn + i) &&
	109	+ !PageReserved(pfn_to_page(start_pfn + i)))
	110	+ return 1;
	111	+ }
	112	+
	113	+ return 0;
	114	+}
	115	+
101	116	/*
102	117	* Generic mapping function (not visible outside):
103	118	*/
@@ -116,8 +131,8 @@ static int remap_area_pages(unsigned long address, phys_addr_t phys_addr, · 12 unmodified lines
116	131
117	132	void __iomem * __ioremap(phys_addr_t phys_addr, phys_addr_t size, unsigned long flags)
118	133	{
	134	+ unsigned long offset, pfn, last_pfn;
119	135	struct vm_struct * area;
120		− unsigned long offset;
121	136	phys_addr_t last_addr;
122	137	void * addr;
123	138
@@ -137,18 +152,16 @@ void __iomem * __ioremap(phys_addr_t phys_addr, phys_addr_t size, unsigned long · 13 unmodified lines
137	152	return (void __iomem *) CKSEG1ADDR(phys_addr);
138	153
139	154	/*
140		− * Don't allow anybody to remap normal RAM that we're using..
	155	+ * Don't allow anybody to remap RAM that may be allocated by the page
	156	+ * allocator, since that could lead to races & data clobbering.
141	157	*/
142		− if (phys_addr < virt_to_phys(high_memory)) {
143		− char t_addr, t_end;
144		− struct page *page;
145		−
146		− t_addr = __va(phys_addr);
147		− t_end = t_addr + (size - 1);
148		−
149		− for(page = virt_to_page(t_addr); page <= virt_to_page(t_end); page++)
150		− if(!PageReserved(page))
151		− return NULL;
	158	+ pfn = PFN_DOWN(phys_addr);
	159	+ last_pfn = PFN_DOWN(last_addr);
	160	+ if (walk_system_ram_range(pfn, last_pfn - pfn + 1, NULL,
	161	+ __ioremap_check_ram) == 1) {
	162	+ WARN_ONCE(1, "ioremap on RAM at %pa - %pa\n",
	163	+ &phys_addr, &last_addr);
	164	+ return NULL;
152	165	}
153	166
154	167	/*

arch/mips/pci/pci.c+1−1

@@ -54,5 +54,5 @@ void pci_resource_to_user(const struct pci_dev *dev, int bar, · 53 unmodified lines
54	54	phys_addr_t size = resource_size(rsrc);
55	55
56	56	*start = fixup_bigphys_addr(rsrc->start, size);
57		− *end = rsrc->start + size;
	57	+ *end = rsrc->start + size - 1;
58	58	}

arch/nds32/Kconfig+6−6

@@ -12,17 +12,17 @@ config NDS32 · 11 unmodified lines
12	12	select CLONE_BACKWARDS
13	13	select COMMON_CLK
14	14	select DMA_NONCOHERENT_OPS
15		− select GENERIC_ASHLDI3
16		− select GENERIC_ASHRDI3
17		− select GENERIC_LSHRDI3
18		− select GENERIC_CMPDI2
19		− select GENERIC_MULDI3
20		− select GENERIC_UCMPDI2
21	15	select GENERIC_ATOMIC64
22	16	select GENERIC_CPU_DEVICES
23	17	select GENERIC_CLOCKEVENTS
24	18	select GENERIC_IRQ_CHIP
25	19	select GENERIC_IRQ_SHOW
	20	+ select GENERIC_LIB_ASHLDI3
	21	+ select GENERIC_LIB_ASHRDI3
	22	+ select GENERIC_LIB_CMPDI2
	23	+ select GENERIC_LIB_LSHRDI3
	24	+ select GENERIC_LIB_MULDI3
	25	+ select GENERIC_LIB_UCMPDI2
26	26	select GENERIC_STRNCPY_FROM_USER
27	27	select GENERIC_STRNLEN_USER
28	28	select GENERIC_TIME_VSYSCALL

arch/nds32/Makefile+2−0

@@ -34,10 +34,12 @@ ifdef CONFIG_CPU_LITTLE_ENDIAN · 33 unmodified lines
34	34	KBUILD_CFLAGS += $(call cc-option, -EL)
35	35	KBUILD_AFLAGS += $(call cc-option, -EL)
36	36	LDFLAGS += $(call cc-option, -EL)
	37	+CHECKFLAGS += -D__NDS32_EL__
37	38	else
38	39	KBUILD_CFLAGS += $(call cc-option, -EB)
39	40	KBUILD_AFLAGS += $(call cc-option, -EB)
40	41	LDFLAGS += $(call cc-option, -EB)
	42	+CHECKFLAGS += -D__NDS32_EB__
41	43	endif
42	44
43	45	boot := arch/nds32/boot

arch/nds32/include/asm/cacheflush.h+7−2

@@ -8,6 +8,8 @@ · 7 unmodified lines
8	8
9	9	#define PG_dcache_dirty PG_arch_1
10	10
	11	+void flush_icache_range(unsigned long start, unsigned long end);
	12	+void flush_icache_page(struct vm_area_struct vma, struct page page);
11	13	#ifdef CONFIG_CPU_CACHE_ALIASING
12	14	void flush_cache_mm(struct mm_struct *mm);
13	15	void flush_cache_dup_mm(struct mm_struct *mm);
@@ -34,13 +36,16 @@ void flush_anon_page(struct vm_area_struct *vma, · 20 unmodified lines
34	36	void flush_kernel_dcache_page(struct page *page);
35	37	void flush_kernel_vmap_range(void *addr, int size);
36	38	void invalidate_kernel_vmap_range(void *addr, int size);
37		−void flush_icache_range(unsigned long start, unsigned long end);
38		−void flush_icache_page(struct vm_area_struct vma, struct page page);
39	39	#define flush_dcache_mmap_lock(mapping) xa_lock_irq(&(mapping)->i_pages)
40	40	#define flush_dcache_mmap_unlock(mapping) xa_unlock_irq(&(mapping)->i_pages)
41	41
42	42	#else
43	43	#include <asm-generic/cacheflush.h>
	44	+#undef flush_icache_range
	45	+#undef flush_icache_page
	46	+#undef flush_icache_user_range
	47	+void flush_icache_user_range(struct vm_area_struct vma, struct page page,
	48	+ unsigned long addr, int len);
44	49	#endif
45	50
46	51	#endif /* __NDS32_CACHEFLUSH_H__ */

arch/nds32/include/asm/futex.h+1−1

@@ -16,7 +16,7 @@ · 15 unmodified lines
16	16	" .popsection\n" \
17	17	" .pushsection .fixup,\"ax\"\n" \
18	18	"4: move %0, " err_reg "\n" \
19		− " j 3b\n" \
	19	+ " b 3b\n" \
20	20	" .popsection"
21	21
22	22	#define __futex_atomic_op(insn, ret, oldval, tmp, uaddr, oparg) \

arch/nds32/kernel/setup.c+2−1

@@ -278,7 +278,8 @@ static void __init setup_memory(void) · 277 unmodified lines
278	278
279	279	void __init setup_arch(char **cmdline_p)
280	280	{
281		− early_init_devtree( __dtb_start);
	281	+ early_init_devtree(__atags_pointer ? \
	282	+ phys_to_virt(__atags_pointer) : __dtb_start);
282	283
283	284	setup_cpuinfo();
284	285

arch/nds32/mm/cacheflush.c+40−60

@@ -13,7 +13,39 @@ · 12 unmodified lines
13	13
14	14	extern struct cache_info L1_cache_info[2];
15	15
16		−#ifndef CONFIG_CPU_CACHE_ALIASING
	16	+void flush_icache_range(unsigned long start, unsigned long end)
	17	+{
	18	+ unsigned long line_size, flags;
	19	+ line_size = L1_cache_info[DCACHE].line_size;
	20	+ start = start & ~(line_size - 1);
	21	+ end = (end + line_size - 1) & ~(line_size - 1);
	22	+ local_irq_save(flags);
	23	+ cpu_cache_wbinval_range(start, end, 1);
	24	+ local_irq_restore(flags);
	25	+}
	26	+EXPORT_SYMBOL(flush_icache_range);
	27	+
	28	+void flush_icache_page(struct vm_area_struct vma, struct page page)
	29	+{
	30	+ unsigned long flags;
	31	+ unsigned long kaddr;
	32	+ local_irq_save(flags);
	33	+ kaddr = (unsigned long)kmap_atomic(page);
	34	+ cpu_cache_wbinval_page(kaddr, vma->vm_flags & VM_EXEC);
	35	+ kunmap_atomic((void *)kaddr);
	36	+ local_irq_restore(flags);
	37	+}
	38	+EXPORT_SYMBOL(flush_icache_page);
	39	+
	40	+void flush_icache_user_range(struct vm_area_struct vma, struct page page,
	41	+ unsigned long addr, int len)
	42	+{
	43	+ unsigned long kaddr;
	44	+ kaddr = (unsigned long)kmap_atomic(page) + (addr & ~PAGE_MASK);
	45	+ flush_icache_range(kaddr, kaddr + len);
	46	+ kunmap_atomic((void *)kaddr);
	47	+}
	48	+
17	49	void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
18	50	pte_t * pte)
19	51	{
@@ -35,19 +67,15 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, · 15 unmodified lines
35	67
36	68	if ((test_and_clear_bit(PG_dcache_dirty, &page->flags)) \|\|
37	69	(vma->vm_flags & VM_EXEC)) {
38		−
39		− if (!PageHighMem(page)) {
40		− cpu_cache_wbinval_page((unsigned long)
41		− page_address(page),
42		− vma->vm_flags & VM_EXEC);
43		− } else {
44		− unsigned long kaddr = (unsigned long)kmap_atomic(page);
45		− cpu_cache_wbinval_page(kaddr, vma->vm_flags & VM_EXEC);
46		− kunmap_atomic((void *)kaddr);
47		− }
	70	+ unsigned long kaddr;
	71	+ local_irq_save(flags);
	72	+ kaddr = (unsigned long)kmap_atomic(page);
	73	+ cpu_cache_wbinval_page(kaddr, vma->vm_flags & VM_EXEC);
	74	+ kunmap_atomic((void *)kaddr);
	75	+ local_irq_restore(flags);
48	76	}
49	77	}
50		−#else
	78	+#ifdef CONFIG_CPU_CACHE_ALIASING
51	79	extern pte_t va_present(struct mm_struct *mm, unsigned long addr);
52	80
53	81	static inline unsigned long aliasing(unsigned long addr, unsigned long page)
@@ -317,52 +345,4 @@ void invalidate_kernel_vmap_range(void *addr, int size) · 263 unmodified lines
317	345	local_irq_restore(flags);
318	346	}
319	347	EXPORT_SYMBOL(invalidate_kernel_vmap_range);
320		−
321		−void flush_icache_range(unsigned long start, unsigned long end)
322		−{
323		− unsigned long line_size, flags;
324		− line_size = L1_cache_info[DCACHE].line_size;
325		− start = start & ~(line_size - 1);
326		− end = (end + line_size - 1) & ~(line_size - 1);
327		− local_irq_save(flags);
328		− cpu_cache_wbinval_range(start, end, 1);
329		− local_irq_restore(flags);
330		−}
331		−EXPORT_SYMBOL(flush_icache_range);
332		−
333		−void flush_icache_page(struct vm_area_struct vma, struct page page)
334		−{
335		− unsigned long flags;
336		− local_irq_save(flags);
337		− cpu_cache_wbinval_page((unsigned long)page_address(page),
338		− vma->vm_flags & VM_EXEC);
339		− local_irq_restore(flags);
340		−}
341		−
342		−void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
343		− pte_t * pte)
344		−{
345		− struct page *page;
346		− unsigned long flags;
347		− unsigned long pfn = pte_pfn(*pte);
348		−
349		− if (!pfn_valid(pfn))
350		− return;
351		−
352		− if (vma->vm_mm == current->active_mm) {
353		− local_irq_save(flags);
354		− __nds32__mtsr_dsb(addr, NDS32_SR_TLB_VPN);
355		− __nds32__tlbop_rwr(*pte);
356		− __nds32__isb();
357		− local_irq_restore(flags);
358		− }
359		−
360		− page = pfn_to_page(pfn);
361		− if (test_and_clear_bit(PG_dcache_dirty, &page->flags) \|\|
362		− (vma->vm_flags & VM_EXEC)) {
363		− local_irq_save(flags);
364		− cpu_dcache_wbinval_page((unsigned long)page_address(page));
365		− local_irq_restore(flags);
366		− }
367		−}
368	348	#endif

arch/openrisc/include/asm/pgalloc.h+5−1

@@ -98,8 +98,12 @@ static inline void pte_free(struct mm_struct mm, struct page pte) · 97 unmodified lines
98	98	__free_page(pte);
99	99	}
100	100
	101	+#define __pte_free_tlb(tlb, pte, addr) \
	102	+do { \
	103	+ pgtable_page_dtor(pte); \
	104	+ tlb_remove_page((tlb), (pte)); \
	105	+} while (0)
101	106
102		−#define __pte_free_tlb(tlb, pte, addr) tlb_remove_page((tlb), (pte))
103	107	#define pmd_pgtable(pmd) pmd_page(pmd)
104	108
105	109	#define check_pgt_cache() do { } while (0)

arch/openrisc/kernel/entry.S+1−7

@@ -277,12 +277,6 @@ EXCEPTION_ENTRY(_data_page_fault_handler) · 276 unmodified lines
277	277	l.addi r3,r1,0 // pt_regs
278	278	/* r4 set be EXCEPTION_HANDLE */ // effective address of fault
279	279
280		− /*
281		− * __PHX__: TODO
282		− *
283		− * all this can be written much simpler. look at
284		− * DTLB miss handler in the CONFIG_GUARD_PROTECTED_CORE part
285		− */
286	280	#ifdef CONFIG_OPENRISC_NO_SPR_SR_DSX
287	281	l.lwz r6,PT_PC(r3) // address of an offending insn
288	282	l.lwz r6,0(r6) // instruction that caused pf
@@ -314,7 +308,7 @@ EXCEPTION_ENTRY(_data_page_fault_handler) · 25 unmodified lines
314	308
315	309	#else
316	310
317		− l.lwz r6,PT_SR(r3) // SR
	311	+ l.mfspr r6,r0,SPR_SR // SR
318	312	l.andi r6,r6,SPR_SR_DSX // check for delay slot exception
319	313	l.sfne r6,r0 // exception happened in delay slot
320	314	l.bnf 7f

arch/openrisc/kernel/head.S+6−3

@@ -210,8 +210,7 @@ · 209 unmodified lines
210	210	* r4 - EEAR exception EA
211	211	* r10 - current pointing to current_thread_info struct
212	212	* r12 - syscall 0, since we didn't come from syscall
213		− * r13 - temp it actually contains new SR, not needed anymore
214		− * r31 - handler address of the handler we'll jump to
	213	+ * r30 - handler address of the handler we'll jump to
215	214	*
216	215	* handler has to save remaining registers to the exception
217	216	* ksp frame before tainting them!
@@ -244,6 +243,7 @@ · 26 unmodified lines
244	243	/* r1 is KSP, r30 is __pa(KSP) */ ;\
245	244	tophys (r30,r1) ;\
246	245	l.sw PT_GPR12(r30),r12 ;\
	246	+ /* r4 use for tmp before EA */ ;\
247	247	l.mfspr r12,r0,SPR_EPCR_BASE ;\
248	248	l.sw PT_PC(r30),r12 ;\
249	249	l.mfspr r12,r0,SPR_ESR_BASE ;\
@@ -263,7 +263,10 @@ · 13 unmodified lines
263	263	/* r12 == 1 if we come from syscall */ ;\
264	264	CLEAR_GPR(r12) ;\
265	265	/* ----- turn on MMU ----- */ ;\
266		− l.ori r30,r0,(EXCEPTION_SR) ;\
	266	+ /* Carry DSX into exception SR */ ;\
	267	+ l.mfspr r30,r0,SPR_SR ;\
	268	+ l.andi r30,r30,SPR_SR_DSX ;\
	269	+ l.ori r30,r30,(EXCEPTION_SR) ;\
267	270	l.mtspr r0,r30,SPR_ESR_BASE ;\
268	271	/* r30: EA address of handler */ ;\
269	272	LOAD_SYMBOL_2_GPR(r30,handler) ;\

arch/openrisc/kernel/traps.c+1−1

@@ -300,7 +300,7 @@ static inline int in_delay_slot(struct pt_regs *regs) · 299 unmodified lines
300	300	return 0;
301	301	}
302	302	#else
303		− return regs->sr & SPR_SR_DSX;
	303	+ return mfspr(SPR_SR) & SPR_SR_DSX;
304	304	#endif
305	305	}
306	306

arch/parisc/Kconfig+4−5

@@ -11,7 +11,6 @@ config PARISC · 10 unmodified lines
11	11	select ARCH_HAS_ELF_RANDOMIZE
12	12	select ARCH_HAS_STRICT_KERNEL_RWX
13	13	select ARCH_HAS_UBSAN_SANITIZE_ALL
14		− select ARCH_WANTS_UBSAN_NO_NULL
15	14	select ARCH_SUPPORTS_MEMORY_FAILURE
16	15	select RTC_CLASS
17	16	select RTC_DRV_GENERIC
@@ -195,7 +194,7 @@ config PREFETCH · 177 unmodified lines
195	194
196	195	config MLONGCALLS
197	196	bool "Enable the -mlong-calls compiler option for big kernels"
198		− def_bool y if (!MODULES)
	197	+ default y
199	198	depends on PA8X00
200	199	help
201	200	If you configure the kernel to include many drivers built-in instead
@@ -244,11 +243,11 @@ config PARISC_PAGE_SIZE_4KB · 42 unmodified lines
244	243
245	244	config PARISC_PAGE_SIZE_16KB
246	245	bool "16KB"
247		− depends on PA8X00
	246	+ depends on PA8X00 && BROKEN
248	247
249	248	config PARISC_PAGE_SIZE_64KB
250	249	bool "64KB"
251		− depends on PA8X00
	250	+ depends on PA8X00 && BROKEN
252	251
253	252	endchoice
254	253
@@ -347,7 +346,7 @@ config NR_CPUS · 92 unmodified lines
347	346	int "Maximum number of CPUs (2-32)"
348	347	range 2 32
349	348	depends on SMP
350		− default "32"
	349	+ default "4"
351	350
352	351	endmenu
353	352

arch/parisc/Makefile+0−4

@@ -65,10 +65,6 @@ endif · 64 unmodified lines
65	65	# kernel.
66	66	cflags-y += -mdisable-fpregs
67	67
68		−# Without this, "ld -r" results in .text sections that are too big
69		−# (> 0x40000) for branches to reach stubs.
70		−cflags-y += -ffunction-sections
71		−
72	68	# Use long jumps instead of long branches (needed if your linker fails to
73	69	# link a too big vmlinux executable). Not enabled for building modules.
74	70	ifdef CONFIG_MLONGCALLS

arch/parisc/include/asm/barrier.h+32−0

@@ -0,0 +1,32 @@
	1	+/* SPDX-License-Identifier: GPL-2.0 */
	2	+#ifndef __ASM_BARRIER_H
	3	+#define __ASM_BARRIER_H
	4	+
	5	+#ifndef __ASSEMBLY__
	6	+
	7	+/* The synchronize caches instruction executes as a nop on systems in
	8	+ which all memory references are performed in order. */
	9	+#define synchronize_caches() __asm__ __volatile__ ("sync" : : : "memory")
	10	+
	11	+#if defined(CONFIG_SMP)
	12	+#define mb() do { synchronize_caches(); } while (0)
	13	+#define rmb() mb()
	14	+#define wmb() mb()
	15	+#define dma_rmb() mb()
	16	+#define dma_wmb() mb()
	17	+#else
	18	+#define mb() barrier()
	19	+#define rmb() barrier()
	20	+#define wmb() barrier()
	21	+#define dma_rmb() barrier()
	22	+#define dma_wmb() barrier()
	23	+#endif
	24	+
	25	+#define __smp_mb() mb()
	26	+#define __smp_rmb() mb()
	27	+#define __smp_wmb() mb()
	28	+
	29	+#include <asm-generic/barrier.h>
	30	+
	31	+#endif /* !__ASSEMBLY__ */
	32	+#endif /* __ASM_BARRIER_H */

arch/parisc/include/asm/signal.h+0−8

@@ -21,14 +21,6 @@ typedef struct { · 20 unmodified lines
21	21	unsigned long sig[_NSIG_WORDS];
22	22	} sigset_t;
23	23
24		−#ifndef __KERNEL__
25		−struct sigaction {
26		− __sighandler_t sa_handler;
27		− unsigned long sa_flags;
28		− sigset_t sa_mask; /* mask last for extensibility */
29		−};
30		−#endif
31		−
32	24	#include <asm/sigcontext.h>
33	25
34	26	#endif /* !__ASSEMBLY */

arch/parisc/include/uapi/asm/unistd.h+2−1

@@ -364,8 +364,9 @@ · 363 unmodified lines
364	364	#define __NR_preadv2 (__NR_Linux + 347)
365	365	#define __NR_pwritev2 (__NR_Linux + 348)
366	366	#define __NR_statx (__NR_Linux + 349)
	367	+#define __NR_io_pgetevents (__NR_Linux + 350)
367	368
368		−#define __NR_Linux_syscalls (__NR_statx + 1)
	369	+#define __NR_Linux_syscalls (__NR_io_pgetevents + 1)
369	370
370	371
371	372	#define __IGNORE_select /* newselect */

arch/parisc/kernel/drivers.c+9−16

@@ -154,17 +154,14 @@ int register_parisc_driver(struct parisc_driver *driver) · 153 unmodified lines
154	154	{
155	155	/* FIXME: we need this because apparently the sti
156	156	* driver can be registered twice */
157		− if(driver->drv.name) {
158		− printk(KERN_WARNING
159		− "BUG: skipping previously registered driver %s\n",
160		− driver->name);
	157	+ if (driver->drv.name) {
	158	+ pr_warn("BUG: skipping previously registered driver %s\n",
	159	+ driver->name);
161	160	return 1;
162	161	}
163	162
164	163	if (!driver->probe) {
165		− printk(KERN_WARNING
166		− "BUG: driver %s has no probe routine\n",
167		− driver->name);
	164	+ pr_warn("BUG: driver %s has no probe routine\n", driver->name);
168	165	return 1;
169	166	}
170	167
@@ -491,12 +488,9 @@ alloc_pa_dev(unsigned long hpa, struct hardware_path *mod_path) · 320 unmodified lines
491	488
492	489	dev = create_parisc_device(mod_path);
493	490	if (dev->id.hw_type != HPHW_FAULTY) {
494		− printk(KERN_ERR "Two devices have hardware path [%s]. "
495		− "IODC data for second device: "
496		− "%02x%02x%02x%02x%02x%02x\n"
497		− "Rearranging GSC cards sometimes helps\n",
498		− parisc_pathname(dev), iodc_data[0], iodc_data[1],
499		− iodc_data[3], iodc_data[4], iodc_data[5], iodc_data[6]);
	491	+ pr_err("Two devices have hardware path [%s]. IODC data for second device: %7phN\n"
	492	+ "Rearranging GSC cards sometimes helps\n",
	493	+ parisc_pathname(dev), iodc_data);
500	494	return NULL;
501	495	}
502	496
@@ -528,8 +522,7 @@ alloc_pa_dev(unsigned long hpa, struct hardware_path *mod_path) · 25 unmodified lines
528	522	* the keyboard controller
529	523	*/
530	524	if ((hpa & 0xfff) == 0 && insert_resource(&iomem_resource, &dev->hpa))
531		− printk("Unable to claim HPA %lx for device %s\n",
532		− hpa, name);
	525	+ pr_warn("Unable to claim HPA %lx for device %s\n", hpa, name);
533	526
534	527	return dev;
535	528	}
@@ -875,7 +868,7 @@ static void print_parisc_device(struct parisc_device *dev) · 339 unmodified lines
875	868	static int count;
876	869
877	870	print_pa_hwpath(dev, hw_path);
878		− printk(KERN_INFO "%d. %s at 0x%px [%s] { %d, 0x%x, 0x%.3x, 0x%.5x }",
	871	+ pr_info("%d. %s at 0x%px [%s] { %d, 0x%x, 0x%.3x, 0x%.5x }",
879	872	++count, dev->name, (void*) dev->hpa.start, hw_path, dev->id.hw_type,
880	873	dev->id.hversion_rev, dev->id.hversion, dev->id.sversion);
881	874

arch/parisc/kernel/entry.S+2−0

@@ -481,6 +481,8 @@ · 480 unmodified lines
481	481	/* Release pa_tlb_lock lock without reloading lock address. */
482	482	.macro tlb_unlock0 spc,tmp
483	483	#ifdef CONFIG_SMP
	484	+ or,COND(=) %r0,\spc,%r0
	485	+ sync
484	486	or,COND(=) %r0,\spc,%r0
485	487	stw \spc,0(\tmp)
486	488	#endif

arch/parisc/kernel/pacache.S+1−0

@@ -353,6 +353,7 @@ ENDPROC_CFI(flush_data_cache_local) · 352 unmodified lines
353	353	.macro tlb_unlock la,flags,tmp
354	354	#ifdef CONFIG_SMP
355	355	ldi 1,\tmp
	356	+ sync
356	357	stw \tmp,0(\la)
357	358	mtsm \flags
358	359	#endif

arch/parisc/kernel/syscall.S+4−0

@@ -633,6 +633,7 @@ cas_action: · 632 unmodified lines
633	633	sub,<> %r28, %r25, %r0
634	634	2: stw,ma %r24, 0(%r26)
635	635	/* Free lock */
	636	+ sync
636	637	stw,ma %r20, 0(%sr2,%r20)
637	638	#if ENABLE_LWS_DEBUG
638	639	/* Clear thread register indicator */
@@ -647,6 +648,7 @@ cas_action: · 8 unmodified lines
647	648	3:
648	649	/* Error occurred on load or store */
649	650	/* Free lock */
	651	+ sync
650	652	stw %r20, 0(%sr2,%r20)
651	653	#if ENABLE_LWS_DEBUG
652	654	stw %r0, 4(%sr2,%r20)
@@ -848,6 +850,7 @@ cas2_action: · 195 unmodified lines
848	850
849	851	cas2_end:
850	852	/* Free lock */
	853	+ sync
851	854	stw,ma %r20, 0(%sr2,%r20)
852	855	/* Enable interrupts */
853	856	ssm PSW_SM_I, %r0
@@ -858,6 +861,7 @@ cas2_end: · 4 unmodified lines
858	861	22:
859	862	/* Error occurred on load or store */
860	863	/* Free lock */
	864	+ sync
861	865	stw %r20, 0(%sr2,%r20)
862	866	ssm PSW_SM_I, %r0
863	867	ldo 1(%r0),%r28

arch/parisc/kernel/syscall_table.S+1−0

@@ -445,6 +445,7 @@ · 444 unmodified lines
445	445	ENTRY_COMP(preadv2)
446	446	ENTRY_COMP(pwritev2)
447	447	ENTRY_SAME(statx)
	448	+ ENTRY_COMP(io_pgetevents) /* 350 */
448	449
449	450
450	451	.ifne (. - 90b) - (__NR_Linux_syscalls * (91b - 90b))

arch/parisc/kernel/unwind.c+2−2

@@ -25,7 +25,7 @@ · 24 unmodified lines
25	25
26	26	/* #define DEBUG 1 */
27	27	#ifdef DEBUG
28		−#define dbg(x...) printk(x)
	28	+#define dbg(x...) pr_debug(x)
29	29	#else
30	30	#define dbg(x...)
31	31	#endif
@@ -182,7 +182,7 @@ int __init unwind_init(void) · 150 unmodified lines
182	182	start = (long)&__start___unwind[0];
183	183	stop = (long)&__stop___unwind[0];
184	184
185		− printk("unwind_init: start = 0x%lx, end = 0x%lx, entries = %lu\n",
	185	+ dbg("unwind_init: start = 0x%lx, end = 0x%lx, entries = %lu\n",
186	186	start, stop,
187	187	(stop - start) / sizeof(struct unwind_table_entry));
188	188

arch/powerpc/Makefile+2−0

@@ -243,7 +243,9 @@ endif · 242 unmodified lines
243	243	cpu-as-$(CONFIG_4xx) += -Wa,-m405
244	244	cpu-as-$(CONFIG_ALTIVEC) += $(call as-option,-Wa$(comma)-maltivec)
245	245	cpu-as-$(CONFIG_E200) += -Wa,-me200
	246	+cpu-as-$(CONFIG_E500) += -Wa,-me500
246	247	cpu-as-$(CONFIG_PPC_BOOK3S_64) += -Wa,-mpower4
	248	+cpu-as-$(CONFIG_PPC_E500MC) += $(call as-option,-Wa$(comma)-me500mc)
247	249
248	250	KBUILD_AFLAGS += $(cpu-as-y)
249	251	KBUILD_CFLAGS += $(cpu-as-y)

arch/powerpc/include/asm/book3s/32/pgalloc.h+1−1

@@ -108,6 +108,7 @@ static inline void pgtable_free(void *table, unsigned index_size) · 107 unmodified lines
108	108	}
109	109
110	110	#define check_pgt_cache() do { } while (0)
	111	+#define get_hugepd_cache_index(x) (x)
111	112
112	113	#ifdef CONFIG_SMP
113	114	static inline void pgtable_free_tlb(struct mmu_gather *tlb,
@@ -137,7 +138,6 @@ static inline void pgtable_free_tlb(struct mmu_gather *tlb, · 23 unmodified lines
137	138	static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table,
138	139	unsigned long address)
139	140	{
140		− pgtable_page_dtor(table);
141	141	pgtable_free_tlb(tlb, page_address(table), 0);
142	142	}
143	143	#endif /* _ASM_POWERPC_BOOK3S_32_PGALLOC_H */

arch/powerpc/include/asm/book3s/64/pgtable-4k.h+21−0

@@ -49,6 +49,27 @@ static inline int hugepd_ok(hugepd_t hpd) · 48 unmodified lines
49	49	}
50	50	#define is_hugepd(hpd) (hugepd_ok(hpd))
51	51
	52	+/*
	53	+ * 16M and 16G huge page directory tables are allocated from slab cache
	54	+ *
	55	+ */
	56	+#define H_16M_CACHE_INDEX (PAGE_SHIFT + H_PTE_INDEX_SIZE + H_PMD_INDEX_SIZE - 24)
	57	+#define H_16G_CACHE_INDEX \
	58	+ (PAGE_SHIFT + H_PTE_INDEX_SIZE + H_PMD_INDEX_SIZE + H_PUD_INDEX_SIZE - 34)
	59	+
	60	+static inline int get_hugepd_cache_index(int index)
	61	+{
	62	+ switch (index) {
	63	+ case H_16M_CACHE_INDEX:
	64	+ return HTLB_16M_INDEX;
	65	+ case H_16G_CACHE_INDEX:
	66	+ return HTLB_16G_INDEX;
	67	+ default:
	68	+ BUG();
	69	+ }
	70	+ /* should not reach */
	71	+}
	72	+
52	73	#else /* !CONFIG_HUGETLB_PAGE */
53	74	static inline int pmd_huge(pmd_t pmd) { return 0; }
54	75	static inline int pud_huge(pud_t pud) { return 0; }

arch/powerpc/include/asm/book3s/64/pgtable-64k.h+9−0

@@ -45,8 +45,17 @@ static inline int hugepd_ok(hugepd_t hpd) · 44 unmodified lines
45	45	{
46	46	return 0;
47	47	}
	48	+
48	49	#define is_hugepd(pdep) 0
49	50
	51	+/*
	52	+ * This should never get called
	53	+ */
	54	+static inline int get_hugepd_cache_index(int index)
	55	+{
	56	+ BUG();
	57	+}
	58	+
50	59	#else /* !CONFIG_HUGETLB_PAGE */
51	60	static inline int pmd_huge(pmd_t pmd) { return 0; }
52	61	static inline int pud_huge(pud_t pud) { return 0; }

arch/powerpc/include/asm/book3s/64/pgtable.h+5−0

@@ -287,6 +287,11 @@ enum pgtable_index { · 286 unmodified lines
287	287	PMD_INDEX,
288	288	PUD_INDEX,
289	289	PGD_INDEX,
	290	+ /*
	291	+ * Below are used with 4k page size and hugetlb
	292	+ */
	293	+ HTLB_16M_INDEX,
	294	+ HTLB_16G_INDEX,
290	295	};
291	296
292	297	extern unsigned long __vmalloc_start;

arch/powerpc/include/asm/mmu_context.h+23−14

@@ -35,9 +35,9 @@ extern struct mm_iommu_table_group_mem_t *mm_iommu_lookup_rm( · 34 unmodified lines
35	35	extern struct mm_iommu_table_group_mem_t mm_iommu_find(struct mm_struct mm,
36	36	unsigned long ua, unsigned long entries);
37	37	extern long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
38		− unsigned long ua, unsigned long *hpa);
	38	+ unsigned long ua, unsigned int pageshift, unsigned long *hpa);
39	39	extern long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
40		− unsigned long ua, unsigned long *hpa);
	40	+ unsigned long ua, unsigned int pageshift, unsigned long *hpa);
41	41	extern long mm_iommu_mapped_inc(struct mm_iommu_table_group_mem_t *mem);
42	42	extern void mm_iommu_mapped_dec(struct mm_iommu_table_group_mem_t *mem);
43	43	#endif
@@ -143,24 +143,33 @@ static inline void mm_context_remove_copro(struct mm_struct *mm) · 99 unmodified lines
143	143	{
144	144	int c;
145	145
146		− c = atomic_dec_if_positive(&mm->context.copros);
147		−
148		− /* Detect imbalance between add and remove */
149		− WARN_ON(c < 0);
150		−
151	146	/*
152		− * Need to broadcast a global flush of the full mm before
153		− * decrementing active_cpus count, as the next TLBI may be
154		− * local and the nMMU and/or PSL need to be cleaned up.
155		− * Should be rare enough so that it's acceptable.
	147	+ * When removing the last copro, we need to broadcast a global
	148	+ * flush of the full mm, as the next TLBI may be local and the
	149	+ * nMMU and/or PSL need to be cleaned up.
	150	+ *
	151	+ * Both the 'copros' and 'active_cpus' counts are looked at in
	152	+ * flush_all_mm() to determine the scope (local/global) of the
	153	+ * TLBIs, so we need to flush first before decrementing
	154	+ * 'copros'. If this API is used by several callers for the
	155	+ * same context, it can lead to over-flushing. It's hopefully
	156	+ * not common enough to be a problem.
156	157	*
157	158	* Skip on hash, as we don't know how to do the proper flush
158	159	* for the time being. Invalidations will remain global if
159		− * used on hash.
	160	+ * used on hash. Note that we can't drop 'copros' either, as
	161	+ * it could make some invalidations local with no flush
	162	+ * in-between.
160	163	*/
161		− if (c == 0 && radix_enabled()) {
	164	+ if (radix_enabled()) {
162	165	flush_all_mm(mm);
163		− dec_mm_active_cpus(mm);
	166	+
	167	+ c = atomic_dec_if_positive(&mm->context.copros);
	168	+ /* Detect imbalance between add and remove */
	169	+ WARN_ON(c < 0);
	170	+
	171	+ if (c == 0)
	172	+ dec_mm_active_cpus(mm);
164	173	}
165	174	}
166	175	#else

arch/powerpc/include/asm/nmi.h+1−1

@@ -8,7 +8,7 @@ extern void arch_touch_nmi_watchdog(void); · 7 unmodified lines
8	8	static inline void arch_touch_nmi_watchdog(void) {}
9	9	#endif
10	10
11		−#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_STACKTRACE)
	11	+#if defined(CONFIG_NMI_IPI) && defined(CONFIG_STACKTRACE)
12	12	extern void arch_trigger_cpumask_backtrace(const cpumask_t *mask,
13	13	bool exclude_self);
14	14	#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace

arch/powerpc/include/asm/nohash/32/pgalloc.h+1−1

@@ -109,6 +109,7 @@ static inline void pgtable_free(void *table, unsigned index_size) · 108 unmodified lines
109	109	}
110	110
111	111	#define check_pgt_cache() do { } while (0)
	112	+#define get_hugepd_cache_index(x) (x)
112	113
113	114	#ifdef CONFIG_SMP
114	115	static inline void pgtable_free_tlb(struct mmu_gather *tlb,
@@ -139,7 +140,6 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t table, · 24 unmodified lines
139	140	unsigned long address)
140	141	{
141	142	tlb_flush_pgtable(tlb, address);
142		− pgtable_page_dtor(table);
143	143	pgtable_free_tlb(tlb, page_address(table), 0);
144	144	}
145	145	#endif /* _ASM_POWERPC_PGALLOC_32_H */

arch/powerpc/include/asm/nohash/64/pgalloc.h+1−0

@@ -141,6 +141,7 @@ static inline void pgtable_free(void *table, int shift) · 140 unmodified lines
141	141	}
142	142	}
143	143
	144	+#define get_hugepd_cache_index(x) (x)
144	145	#ifdef CONFIG_SMP
145	146	static inline void pgtable_free_tlb(struct mmu_gather tlb, void table, int shift)
146	147	{

arch/powerpc/include/asm/systbl.h+1−0

@@ -393,3 +393,4 @@ SYSCALL(pkey_alloc) · 392 unmodified lines
393	393	SYSCALL(pkey_free)
394	394	SYSCALL(pkey_mprotect)
395	395	SYSCALL(rseq)
	396	+COMPAT_SYS(io_pgetevents)

arch/powerpc/include/asm/unistd.h+1−1

@@ -12,7 +12,7 @@ · 11 unmodified lines
12	12	#include <uapi/asm/unistd.h>
13	13
14	14
15		−#define NR_syscalls 388
	15	+#define NR_syscalls 389
16	16
17	17	#define __NR__exit __NR_exit
18	18

arch/powerpc/include/uapi/asm/unistd.h+1−0

@@ -399,5 +399,6 @@ · 398 unmodified lines
399	399	#define __NR_pkey_free 385
400	400	#define __NR_pkey_mprotect 386
401	401	#define __NR_rseq 387
	402	+#define __NR_io_pgetevents 388
402	403
403	404	#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */

arch/powerpc/kernel/dt_cpu_ftrs.c+2−1

@@ -711,7 +711,8 @@ static __init void cpufeatures_cpu_quirks(void) · 710 unmodified lines
711	711	cur_cpu_spec->cpu_features \|= CPU_FTR_P9_TM_HV_ASSIST;
712	712	cur_cpu_spec->cpu_features \|= CPU_FTR_P9_TM_XER_SO_BUG;
713	713	cur_cpu_spec->cpu_features \|= CPU_FTR_POWER9_DD2_1;
714		− } else /* DD2.1 and up have DD2_1 */
	714	+ } else if ((version & 0xffff0000) == 0x004e0000)
	715	+ /* DD2.1 and up have DD2_1 */
715	716	cur_cpu_spec->cpu_features \|= CPU_FTR_POWER9_DD2_1;
716	717
717	718	if ((version & 0xffff0000) == 0x004e0000) {

arch/powerpc/kernel/idle_book3s.S+2−0

@@ -144,7 +144,9 @@ power9_restore_additional_sprs: · 143 unmodified lines
144	144	mtspr SPRN_MMCR1, r4
145	145
146	146	ld r3, STOP_MMCR2(r13)
	147	+ ld r4, PACA_SPRG_VDSO(r13)
147	148	mtspr SPRN_MMCR2, r3
	149	+ mtspr SPRN_SPRG3, r4
148	150	blr
149	151
150	152	/*

arch/powerpc/kernel/pci-common.c+3−1

@@ -42,6 +42,8 @@ · 41 unmodified lines
42	42	#include <asm/ppc-pci.h>
43	43	#include <asm/eeh.h>
44	44
	45	+#include "../../../drivers/pci/pci.h"
	46	+
45	47	/* hose_spinlock protects accesses to the the phb_bitmap. */
46	48	static DEFINE_SPINLOCK(hose_spinlock);
47	49	LIST_HEAD(hose_list);
@@ -1014,7 +1016,7 @@ void pcibios_setup_bus_devices(struct pci_bus *bus) · 966 unmodified lines
1014	1016	/* Cardbus can call us to add new devices to a bus, so ignore
1015	1017	* those who are already fully discovered
1016	1018	*/
1017		− if (dev->is_added)
	1019	+ if (pci_dev_is_added(dev))
1018	1020	continue;
1019	1021
1020	1022	pcibios_setup_device(dev);

arch/powerpc/kernel/pci_32.c+0−4

@@ -285,9 +285,6 @@ pci_bus_to_hose(int bus) · 284 unmodified lines
285	285	* Note that the returned IO or memory base is a physical address
286	286	*/
287	287
288		−#pragma GCC diagnostic push
289		−#pragma GCC diagnostic ignored "-Wpragmas"
290		−#pragma GCC diagnostic ignored "-Wattribute-alias"
291	288	SYSCALL_DEFINE3(pciconfig_iobase, long, which,
292	289	unsigned long, bus, unsigned long, devfn)
293	290	{
@@ -313,4 +310,3 @@ SYSCALL_DEFINE3(pciconfig_iobase, long, which, · 19 unmodified lines
313	310
314	311	return result;
315	312	}
316		−#pragma GCC diagnostic pop

arch/powerpc/kernel/pci_64.c+0−4

@@ -203,9 +203,6 @@ void pcibios_setup_phb_io_space(struct pci_controller *hose) · 202 unmodified lines
203	203	#define IOBASE_ISA_IO 3
204	204	#define IOBASE_ISA_MEM 4
205	205
206		−#pragma GCC diagnostic push
207		−#pragma GCC diagnostic ignored "-Wpragmas"
208		−#pragma GCC diagnostic ignored "-Wattribute-alias"
209	206	SYSCALL_DEFINE3(pciconfig_iobase, long, which, unsigned long, in_bus,
210	207	unsigned long, in_devfn)
211	208	{
@@ -259,7 +256,6 @@ SYSCALL_DEFINE3(pciconfig_iobase, long, which, unsigned long, in_bus, · 47 unmodified lines
259	256
260	257	return -EOPNOTSUPP;
261	258	}
262		−#pragma GCC diagnostic pop
263	259
264	260	#ifdef CONFIG_NUMA
265	261	int pcibus_to_node(struct pci_bus *bus)

arch/powerpc/kernel/rtas.c+0−4

@@ -1051,9 +1051,6 @@ struct pseries_errorlog get_pseries_errorlog(struct rtas_error_log log, · 1050 unmodified lines
1051	1051	}
1052	1052
1053	1053	/* We assume to be passed big endian arguments */
1054		−#pragma GCC diagnostic push
1055		−#pragma GCC diagnostic ignored "-Wpragmas"
1056		−#pragma GCC diagnostic ignored "-Wattribute-alias"
1057	1054	SYSCALL_DEFINE1(rtas, struct rtas_args __user *, uargs)
1058	1055	{
1059	1056	struct rtas_args args;
@@ -1140,7 +1137,6 @@ SYSCALL_DEFINE1(rtas, struct rtas_args __user *, uargs) · 80 unmodified lines
1140	1137
1141	1138	return 0;
1142	1139	}
1143		−#pragma GCC diagnostic pop
1144	1140
1145	1141	/*
1146	1142	* Call early during boot, before mem init, to retrieve the RTAS

arch/powerpc/kernel/setup-common.c+10−2

@@ -700,12 +700,19 @@ EXPORT_SYMBOL(check_legacy_ioport); · 699 unmodified lines
700	700	static int ppc_panic_event(struct notifier_block *this,
701	701	unsigned long event, void *ptr)
702	702	{
	703	+ /*
	704	+ * panic does a local_irq_disable, but we really
	705	+ * want interrupts to be hard disabled.
	706	+ */
	707	+ hard_irq_disable();
	708	+
703	709	/*
704	710	* If firmware-assisted dump has been registered then trigger
705	711	* firmware-assisted dump and let firmware handle everything else.
706	712	*/
707	713	crash_fadump(NULL, ptr);
708		− ppc_md.panic(ptr); /* May not return */
	714	+ if (ppc_md.panic)
	715	+ ppc_md.panic(ptr); /* May not return */
709	716	return NOTIFY_DONE;
710	717	}
711	718
@@ -716,7 +723,8 @@ static struct notifier_block ppc_panic_block = { · 4 unmodified lines
716	723
717	724	void __init setup_panic(void)
718	725	{
719		− if (!ppc_md.panic)
	726	+ /* PPC64 always does a hard irq disable in its panic handler */
	727	+ if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
720	728	return;
721	729	atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
722	730	}

arch/powerpc/kernel/setup_64.c+8−0

@@ -387,6 +387,14 @@ void early_setup_secondary(void) · 386 unmodified lines
387	387
388	388	#endif /* CONFIG_SMP */
389	389
	390	+void panic_smp_self_stop(void)
	391	+{
	392	+ hard_irq_disable();
	393	+ spin_begin();
	394	+ while (1)
	395	+ spin_cpu_relax();
	396	+}
	397	+
390	398	#if defined(CONFIG_SMP) \|\| defined(CONFIG_KEXEC_CORE)
391	399	static bool use_spinloop(void)
392	400	{

arch/powerpc/kernel/signal.c+2−2

@@ -134,7 +134,7 @@ static void do_signal(struct task_struct *tsk) · 133 unmodified lines
134	134	/* Re-enable the breakpoints for the signal stack */
135	135	thread_change_pc(tsk, tsk->thread.regs);
136	136
137		− rseq_signal_deliver(tsk->thread.regs);
	137	+ rseq_signal_deliver(&ksig, tsk->thread.regs);
138	138
139	139	if (is32) {
140	140	if (ksig.ka.sa.sa_flags & SA_SIGINFO)
@@ -170,7 +170,7 @@ void do_notify_resume(struct pt_regs *regs, unsigned long thread_info_flags) · 29 unmodified lines
170	170	if (thread_info_flags & _TIF_NOTIFY_RESUME) {
171	171	clear_thread_flag(TIF_NOTIFY_RESUME);
172	172	tracehook_notify_resume(regs);
173		− rseq_handle_notify_resume(regs);
	173	+ rseq_handle_notify_resume(NULL, regs);
174	174	}
175	175
176	176	user_enter();

arch/powerpc/kernel/signal_32.c+0−8

@@ -1038,9 +1038,6 @@ static int do_setcontext_tm(struct ucontext __user *ucp, · 1037 unmodified lines
1038	1038	}
1039	1039	#endif
1040	1040
1041		−#pragma GCC diagnostic push
1042		−#pragma GCC diagnostic ignored "-Wpragmas"
1043		−#pragma GCC diagnostic ignored "-Wattribute-alias"
1044	1041	#ifdef CONFIG_PPC64
1045	1042	COMPAT_SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx,
1046	1043	struct ucontext __user *, new_ctx, int, ctx_size)
@@ -1134,7 +1131,6 @@ SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx, · 87 unmodified lines
1134	1131	set_thread_flag(TIF_RESTOREALL);
1135	1132	return 0;
1136	1133	}
1137		−#pragma GCC diagnostic pop
1138	1134
1139	1135	#ifdef CONFIG_PPC64
1140	1136	COMPAT_SYSCALL_DEFINE0(rt_sigreturn)
@@ -1231,9 +1227,6 @@ SYSCALL_DEFINE0(rt_sigreturn) · 90 unmodified lines
1231	1227	return 0;
1232	1228	}
1233	1229
1234		−#pragma GCC diagnostic push
1235		−#pragma GCC diagnostic ignored "-Wpragmas"
1236		−#pragma GCC diagnostic ignored "-Wattribute-alias"
1237	1230	#ifdef CONFIG_PPC32
1238	1231	SYSCALL_DEFINE3(debug_setcontext, struct ucontext __user *, ctx,
1239	1232	int, ndbg, struct sig_dbg_op __user *, dbg)
@@ -1337,7 +1330,6 @@ SYSCALL_DEFINE3(debug_setcontext, struct ucontext __user *, ctx, · 97 unmodified lines
1337	1330	return 0;
1338	1331	}
1339	1332	#endif
1340		−#pragma GCC diagnostic pop
1341	1333
1342	1334	/*
1343	1335	* OK, we're invoking a handler

arch/powerpc/kernel/signal_64.c+0−4

@@ -625,9 +625,6 @@ static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp) · 624 unmodified lines
625	625	/*
626	626	* Handle {get,set,swap}_context operations
627	627	*/
628		−#pragma GCC diagnostic push
629		−#pragma GCC diagnostic ignored "-Wpragmas"
630		−#pragma GCC diagnostic ignored "-Wattribute-alias"
631	628	SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx,
632	629	struct ucontext __user *, new_ctx, long, ctx_size)
633	630	{
@@ -693,7 +690,6 @@ SYSCALL_DEFINE3(swapcontext, struct ucontext __user *, old_ctx, · 59 unmodified lines
693	690	set_thread_flag(TIF_RESTOREALL);
694	691	return 0;
695	692	}
696		−#pragma GCC diagnostic pop
697	693
698	694
699	695	/*

arch/powerpc/kernel/smp.c+0−6

@@ -600,9 +600,6 @@ static void nmi_stop_this_cpu(struct pt_regs *regs) · 599 unmodified lines
600	600	nmi_ipi_busy_count--;
601	601	nmi_ipi_unlock();
602	602
603		− /* Remove this CPU */
604		− set_cpu_online(smp_processor_id(), false);
605		−
606	603	spin_begin();
607	604	while (1)
608	605	spin_cpu_relax();
@@ -617,9 +614,6 @@ void smp_send_stop(void) · 8 unmodified lines
617	614
618	615	static void stop_this_cpu(void *dummy)
619	616	{
620		− /* Remove this CPU */
621		− set_cpu_online(smp_processor_id(), false);
622		−
623	617	hard_irq_disable();
624	618	spin_begin();
625	619	while (1)

arch/powerpc/kernel/stacktrace.c+2−2

@@ -196,7 +196,7 @@ save_stack_trace_tsk_reliable(struct task_struct *tsk, · 195 unmodified lines
196	196	EXPORT_SYMBOL_GPL(save_stack_trace_tsk_reliable);
197	197	#endif /* CONFIG_HAVE_RELIABLE_STACKTRACE */
198	198
199		−#ifdef CONFIG_PPC_BOOK3S_64
	199	+#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_NMI_IPI)
200	200	static void handle_backtrace_ipi(struct pt_regs *regs)
201	201	{
202	202	nmi_cpu_backtrace(regs);
@@ -242,4 +242,4 @@ void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self) · 39 unmodified lines
242	242	{
243	243	nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_backtrace_ipi);
244	244	}
245		−#endif /* CONFIG_PPC64 */
	245	+#endif /* defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_NMI_IPI) */

arch/powerpc/kernel/syscalls.c+0−4

@@ -62,9 +62,6 @@ out: · 61 unmodified lines
62	62	return ret;
63	63	}
64	64
65		−#pragma GCC diagnostic push
66		−#pragma GCC diagnostic ignored "-Wpragmas"
67		−#pragma GCC diagnostic ignored "-Wattribute-alias"
68	65	SYSCALL_DEFINE6(mmap2, unsigned long, addr, size_t, len,
69	66	unsigned long, prot, unsigned long, flags,
70	67	unsigned long, fd, unsigned long, pgoff)
@@ -78,7 +75,6 @@ SYSCALL_DEFINE6(mmap, unsigned long, addr, size_t, len, · 7 unmodified lines
78	75	{
79	76	return do_mmap2(addr, len, prot, flags, fd, offset, PAGE_SHIFT);
80	77	}
81		−#pragma GCC diagnostic pop
82	78
83	79	#ifdef CONFIG_PPC32
84	80	/*

arch/powerpc/kvm/book3s_64_vio.c+1−1

@@ -449,7 +449,7 @@ long kvmppc_tce_iommu_do_map(struct kvm kvm, struct iommu_table tbl, · 448 unmodified lines
449	449	/* This only handles v2 IOMMU type, v1 is handled via ioctl() */
450	450	return H_TOO_HARD;
451	451
452		− if (WARN_ON_ONCE(mm_iommu_ua_to_hpa(mem, ua, &hpa)))
	452	+ if (WARN_ON_ONCE(mm_iommu_ua_to_hpa(mem, ua, tbl->it_page_shift, &hpa)))
453	453	return H_HARDWARE;
454	454
455	455	if (mm_iommu_mapped_inc(mem))

arch/powerpc/kvm/book3s_64_vio_hv.c+4−2

@@ -279,7 +279,8 @@ static long kvmppc_rm_tce_iommu_do_map(struct kvm kvm, struct iommu_table tbl, · 278 unmodified lines
279	279	if (!mem)
280	280	return H_TOO_HARD;
281	281
282		− if (WARN_ON_ONCE_RM(mm_iommu_ua_to_hpa_rm(mem, ua, &hpa)))
	282	+ if (WARN_ON_ONCE_RM(mm_iommu_ua_to_hpa_rm(mem, ua, tbl->it_page_shift,
	283	+ &hpa)))
283	284	return H_HARDWARE;
284	285
285	286	pua = (void *) vmalloc_to_phys(pua);
@@ -469,7 +470,8 @@ long kvmppc_rm_h_put_tce_indirect(struct kvm_vcpu *vcpu, · 183 unmodified lines
469	470
470	471	mem = mm_iommu_lookup_rm(vcpu->kvm->mm, ua, IOMMU_PAGE_SIZE_4K);
471	472	if (mem)
472		− prereg = mm_iommu_ua_to_hpa_rm(mem, ua, &tces) == 0;
	473	+ prereg = mm_iommu_ua_to_hpa_rm(mem, ua,
	474	+ IOMMU_PAGE_SHIFT_4K, &tces) == 0;
473	475	}
474	476
475	477	if (!prereg) {

arch/powerpc/mm/hugetlbpage.c+2−1

@@ -337,7 +337,8 @@ static void free_hugepd_range(struct mmu_gather tlb, hugepd_t hpdp, int pdshif · 336 unmodified lines
337	337	if (shift >= pdshift)
338	338	hugepd_free(tlb, hugepte);
339	339	else
340		− pgtable_free_tlb(tlb, hugepte, pdshift - shift);
	340	+ pgtable_free_tlb(tlb, hugepte,
	341	+ get_hugepd_cache_index(pdshift - shift));
341	342	}
342	343
343	344	static void hugetlb_free_pmd_range(struct mmu_gather tlb, pud_t pud,

arch/powerpc/mm/mmu_context_iommu.c+35−2

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	19	#include <linux/hugetlb.h>
20	20	#include <linux/swap.h>
21	21	#include <asm/mmu_context.h>
	22	+#include <asm/pte-walk.h>
22	23
23	24	static DEFINE_MUTEX(mem_list_mutex);
24	25
@@ -27,6 +28,7 @@ struct mm_iommu_table_group_mem_t { · 2 unmodified lines
27	28	struct rcu_head rcu;
28	29	unsigned long used;
29	30	atomic64_t mapped;
	31	+ unsigned int pageshift;
30	32	u64 ua; /* userspace address */
31	33	u64 entries; /* number of entries in hpas[] */
32	34	u64 hpas; / vmalloc'ed */
@@ -125,6 +127,8 @@ long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries, · 92 unmodified lines
125	127	{
126	128	struct mm_iommu_table_group_mem_t *mem;
127	129	long i, j, ret = 0, locked_entries = 0;
	130	+ unsigned int pageshift;
	131	+ unsigned long flags;
128	132	struct page *page = NULL;
129	133
130	134	mutex_lock(&mem_list_mutex);
@@ -159,6 +163,12 @@ long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries, · 28 unmodified lines
159	163	goto unlock_exit;
160	164	}
161	165
	166	+ /*
	167	+ * For a starting point for a maximum page size calculation
	168	+ * we use @ua and @entries natural alignment to allow IOMMU pages
	169	+ * smaller than huge pages but still bigger than PAGE_SIZE.
	170	+ */
	171	+ mem->pageshift = __ffs(ua \| (entries << PAGE_SHIFT));
162	172	mem->hpas = vzalloc(array_size(entries, sizeof(mem->hpas[0])));
163	173	if (!mem->hpas) {
164	174	kfree(mem);
@@ -199,6 +209,23 @@ long mm_iommu_get(struct mm_struct *mm, unsigned long ua, unsigned long entries, · 34 unmodified lines
199	209	}
200	210	}
201	211	populate:
	212	+ pageshift = PAGE_SHIFT;
	213	+ if (PageCompound(page)) {
	214	+ pte_t *pte;
	215	+ struct page *head = compound_head(page);
	216	+ unsigned int compshift = compound_order(head);
	217	+
	218	+ local_irq_save(flags); /* disables as well */
	219	+ pte = find_linux_pte(mm->pgd, ua, NULL, &pageshift);
	220	+ local_irq_restore(flags);
	221	+
	222	+ /* Double check it is still the same pinned page */
	223	+ if (pte && pte_page(*pte) == head &&
	224	+ pageshift == compshift)
	225	+ pageshift = max_t(unsigned int, pageshift,
	226	+ PAGE_SHIFT);
	227	+ }
	228	+ mem->pageshift = min(mem->pageshift, pageshift);
202	229	mem->hpas[i] = page_to_pfn(page) << PAGE_SHIFT;
203	230	}
204	231
@@ -349,7 +376,7 @@ struct mm_iommu_table_group_mem_t mm_iommu_find(struct mm_struct mm, · 144 unmodified lines
349	376	EXPORT_SYMBOL_GPL(mm_iommu_find);
350	377
351	378	long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
352		− unsigned long ua, unsigned long *hpa)
	379	+ unsigned long ua, unsigned int pageshift, unsigned long *hpa)
353	380	{
354	381	const long entry = (ua - mem->ua) >> PAGE_SHIFT;
355	382	u64 *va = &mem->hpas[entry];
@@ -357,6 +384,9 @@ long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem, · 1 unmodified line
357	384	if (entry >= mem->entries)
358	385	return -EFAULT;
359	386
	387	+ if (pageshift > mem->pageshift)
	388	+ return -EFAULT;
	389	+
360	390	hpa = va \| (ua & ~PAGE_MASK);
361	391
362	392	return 0;
@@ -364,7 +394,7 @@ long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem, · 1 unmodified line
364	394	EXPORT_SYMBOL_GPL(mm_iommu_ua_to_hpa);
365	395
366	396	long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem,
367		− unsigned long ua, unsigned long *hpa)
	397	+ unsigned long ua, unsigned int pageshift, unsigned long *hpa)
368	398	{
369	399	const long entry = (ua - mem->ua) >> PAGE_SHIFT;
370	400	void *va = &mem->hpas[entry];
@@ -373,6 +403,9 @@ long mm_iommu_ua_to_hpa_rm(struct mm_iommu_table_group_mem_t *mem, · 2 unmodified lines
373	403	if (entry >= mem->entries)
374	404	return -EFAULT;
375	405
	406	+ if (pageshift > mem->pageshift)
	407	+ return -EFAULT;
	408	+
376	409	pa = (void *) vmalloc_to_phys(va);
377	410	if (!pa)
378	411	return -EFAULT;

arch/powerpc/mm/pgtable-book3s64.c+12−0

@@ -409,6 +409,18 @@ static inline void pgtable_free(void *table, int index) · 408 unmodified lines
409	409	case PUD_INDEX:
410	410	kmem_cache_free(PGT_CACHE(PUD_CACHE_INDEX), table);
411	411	break;
	412	+#if defined(CONFIG_PPC_4K_PAGES) && defined(CONFIG_HUGETLB_PAGE)
	413	+ /* 16M hugepd directory at pud level */
	414	+ case HTLB_16M_INDEX:
	415	+ BUILD_BUG_ON(H_16M_CACHE_INDEX <= 0);
	416	+ kmem_cache_free(PGT_CACHE(H_16M_CACHE_INDEX), table);
	417	+ break;
	418	+ /* 16G hugepd directory at the pgd level */
	419	+ case HTLB_16G_INDEX:
	420	+ BUILD_BUG_ON(H_16G_CACHE_INDEX <= 0);
	421	+ kmem_cache_free(PGT_CACHE(H_16G_CACHE_INDEX), table);
	422	+ break;
	423	+#endif
412	424	/* We don't free pgd table via RCU callback */
413	425	default:
414	426	BUG();

arch/powerpc/mm/subpage-prot.c+0−4

@@ -186,9 +186,6 @@ static void subpage_mark_vma_nohuge(struct mm_struct *mm, unsigned long addr, · 185 unmodified lines
186	186	* in a 2-bit field won't allow writes to a page that is otherwise
187	187	* write-protected.
188	188	*/
189		−#pragma GCC diagnostic push
190		−#pragma GCC diagnostic ignored "-Wpragmas"
191		−#pragma GCC diagnostic ignored "-Wattribute-alias"
192	189	SYSCALL_DEFINE3(subpage_prot, unsigned long, addr,
193	190	unsigned long, len, u32 __user *, map)
194	191	{
@@ -272,4 +269,3 @@ SYSCALL_DEFINE3(subpage_prot, unsigned long, addr, · 77 unmodified lines
272	269	up_write(&mm->mmap_sem);
273	270	return err;
274	271	}
275		−#pragma GCC diagnostic pop

arch/powerpc/mm/tlb-radix.c+77−21

@@ -689,22 +689,17 @@ EXPORT_SYMBOL(radix__flush_tlb_kernel_range); · 688 unmodified lines
689	689	static unsigned long tlb_single_page_flush_ceiling __read_mostly = 33;
690	690	static unsigned long tlb_local_single_page_flush_ceiling __read_mostly = POWER9_TLB_SETS_RADIX * 2;
691	691
692		−void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
693		− unsigned long end)
	692	+static inline void __radix__flush_tlb_range(struct mm_struct *mm,
	693	+ unsigned long start, unsigned long end,
	694	+ bool flush_all_sizes)
694	695
695	696	{
696		− struct mm_struct *mm = vma->vm_mm;
697	697	unsigned long pid;
698	698	unsigned int page_shift = mmu_psize_defs[mmu_virtual_psize].shift;
699	699	unsigned long page_size = 1UL << page_shift;
700	700	unsigned long nr_pages = (end - start) >> page_shift;
701	701	bool local, full;
702	702
703		−#ifdef CONFIG_HUGETLB_PAGE
704		− if (is_vm_hugetlb_page(vma))
705		− return radix__flush_hugetlb_tlb_range(vma, start, end);
706		−#endif
707		−
708	703	pid = mm->context.id;
709	704	if (unlikely(pid == MMU_NO_CONTEXT))
710	705	return;
@@ -738,37 +733,64 @@ is_local: · 27 unmodified lines
738	733	_tlbie_pid(pid, RIC_FLUSH_TLB);
739	734	}
740	735	} else {
741		− bool hflush = false;
	736	+ bool hflush = flush_all_sizes;
	737	+ bool gflush = flush_all_sizes;
742	738	unsigned long hstart, hend;
	739	+ unsigned long gstart, gend;
743	740
744		−#ifdef CONFIG_TRANSPARENT_HUGEPAGE
745		− hstart = (start + HPAGE_PMD_SIZE - 1) >> HPAGE_PMD_SHIFT;
746		− hend = end >> HPAGE_PMD_SHIFT;
747		− if (hstart < hend) {
748		− hstart <<= HPAGE_PMD_SHIFT;
749		− hend <<= HPAGE_PMD_SHIFT;
	741	+ if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE))
750	742	hflush = true;
	743	+
	744	+ if (hflush) {
	745	+ hstart = (start + PMD_SIZE - 1) & PMD_MASK;
	746	+ hend = end & PMD_MASK;
	747	+ if (hstart == hend)
	748	+ hflush = false;
	749	+ }
	750	+
	751	+ if (gflush) {
	752	+ gstart = (start + PUD_SIZE - 1) & PUD_MASK;
	753	+ gend = end & PUD_MASK;
	754	+ if (gstart == gend)
	755	+ gflush = false;
751	756	}
752		−#endif
753	757
754	758	asm volatile("ptesync": : :"memory");
755	759	if (local) {
756	760	__tlbiel_va_range(start, end, pid, page_size, mmu_virtual_psize);
757	761	if (hflush)
758	762	__tlbiel_va_range(hstart, hend, pid,
759		− HPAGE_PMD_SIZE, MMU_PAGE_2M);
	763	+ PMD_SIZE, MMU_PAGE_2M);
	764	+ if (gflush)
	765	+ __tlbiel_va_range(gstart, gend, pid,
	766	+ PUD_SIZE, MMU_PAGE_1G);
760	767	asm volatile("ptesync": : :"memory");
761	768	} else {
762	769	__tlbie_va_range(start, end, pid, page_size, mmu_virtual_psize);
763	770	if (hflush)
764	771	__tlbie_va_range(hstart, hend, pid,
765		− HPAGE_PMD_SIZE, MMU_PAGE_2M);
	772	+ PMD_SIZE, MMU_PAGE_2M);
	773	+ if (gflush)
	774	+ __tlbie_va_range(gstart, gend, pid,
	775	+ PUD_SIZE, MMU_PAGE_1G);
766	776	fixup_tlbie();
767	777	asm volatile("eieio; tlbsync; ptesync": : :"memory");
768	778	}
769	779	}
770	780	preempt_enable();
771	781	}
	782	+
	783	+void radix__flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
	784	+ unsigned long end)
	785	+
	786	+{
	787	+#ifdef CONFIG_HUGETLB_PAGE
	788	+ if (is_vm_hugetlb_page(vma))
	789	+ return radix__flush_hugetlb_tlb_range(vma, start, end);
	790	+#endif
	791	+
	792	+ __radix__flush_tlb_range(vma->vm_mm, start, end, false);
	793	+}
772	794	EXPORT_SYMBOL(radix__flush_tlb_range);
773	795
774	796	static int radix_get_mmu_psize(int page_size)
@@ -837,6 +859,8 @@ void radix__tlb_flush(struct mmu_gather *tlb) · 62 unmodified lines
837	859	int psize = 0;
838	860	struct mm_struct *mm = tlb->mm;
839	861	int page_size = tlb->page_size;
	862	+ unsigned long start = tlb->start;
	863	+ unsigned long end = tlb->end;
840	864
841	865	/*
842	866	* if page size is not something we understand, do a full mm flush
@@ -847,15 +871,45 @@ void radix__tlb_flush(struct mmu_gather *tlb) · 4 unmodified lines
847	871	*/
848	872	if (tlb->fullmm) {
849	873	__flush_all_mm(mm, true);
	874	+#if defined(CONFIG_TRANSPARENT_HUGEPAGE) \|\| defined(CONFIG_HUGETLB_PAGE)
	875	+ } else if (mm_tlb_flush_nested(mm)) {
	876	+ /*
	877	+ * If there is a concurrent invalidation that is clearing ptes,
	878	+ * then it's possible this invalidation will miss one of those
	879	+ * cleared ptes and miss flushing the TLB. If this invalidate
	880	+ * returns before the other one flushes TLBs, that can result
	881	+ * in it returning while there are still valid TLBs inside the
	882	+ * range to be invalidated.
	883	+ *
	884	+ * See mm/memory.c:tlb_finish_mmu() for more details.
	885	+ *
	886	+ * The solution to this is ensure the entire range is always
	887	+ * flushed here. The problem for powerpc is that the flushes
	888	+ * are page size specific, so this "forced flush" would not
	889	+ * do the right thing if there are a mix of page sizes in
	890	+ * the range to be invalidated. So use __flush_tlb_range
	891	+ * which invalidates all possible page sizes in the range.
	892	+ *
	893	+ * PWC flush probably is not be required because the core code
	894	+ * shouldn't free page tables in this path, but accounting
	895	+ * for the possibility makes us a bit more robust.
	896	+ *
	897	+ * need_flush_all is an uncommon case because page table
	898	+ * teardown should be done with exclusive locks held (but
	899	+ * after locks are dropped another invalidate could come
	900	+ * in), it could be optimized further if necessary.
	901	+ */
	902	+ if (!tlb->need_flush_all)
	903	+ __radix__flush_tlb_range(mm, start, end, true);
	904	+ else
	905	+ radix__flush_all_mm(mm);
	906	+#endif
850	907	} else if ( (psize = radix_get_mmu_psize(page_size)) == -1) {
851	908	if (!tlb->need_flush_all)
852	909	radix__flush_tlb_mm(mm);
853	910	else
854	911	radix__flush_all_mm(mm);
855	912	} else {
856		− unsigned long start = tlb->start;
857		− unsigned long end = tlb->end;
858		−
859	913	if (!tlb->need_flush_all)
860	914	radix__flush_tlb_range_psize(mm, start, end, psize);
861	915	else
@@ -1043,6 +1097,8 @@ extern void radix_kvm_prefetch_workaround(struct mm_struct *mm) · 181 unmodified lines
1043	1097	for (; sib <= cpu_last_thread_sibling(cpu) && !flush; sib++) {
1044	1098	if (sib == cpu)
1045	1099	continue;
	1100	+ if (!cpu_possible(sib))
	1101	+ continue;
1046	1102	if (paca_ptrs[sib]->kvm_hstate.kvm_vcpu)
1047	1103	flush = true;
1048	1104	}

arch/powerpc/net/bpf_jit_comp64.c+5−24

@@ -286,6 +286,7 @@ static int bpf_jit_build_body(struct bpf_prog fp, u32 image, · 285 unmodified lines
286	286	u64 imm64;
287	287	u8 *func;
288	288	u32 true_cond;
	289	+ u32 tmp_idx;
289	290
290	291	/*
291	292	* addrs[] maps a BPF bytecode address into a real offset from
@@ -637,11 +638,7 @@ emit_clear: · 345 unmodified lines
637	638	case BPF_STX \| BPF_XADD \| BPF_W:
638	639	/* Get EA into TMP_REG_1 */
639	640	PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);
640		− /* error if EA is not word-aligned */
641		− PPC_ANDI(b2p[TMP_REG_2], b2p[TMP_REG_1], 0x03);
642		− PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + 12);
643		− PPC_LI(b2p[BPF_REG_0], 0);
644		− PPC_JMP(exit_addr);
	641	+ tmp_idx = ctx->idx * 4;
645	642	/* load value from memory into TMP_REG_2 */
646	643	PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
647	644	/* add value from src_reg into this */
@@ -649,32 +646,16 @@ emit_clear: · 1 unmodified line
649	646	/* store result back */
650	647	PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
651	648	/* we're done if this succeeded */
652		− PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (7*4));
653		− /* otherwise, let's try once more */
654		− PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
655		− PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
656		− PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
657		− /* exit if the store was not successful */
658		− PPC_LI(b2p[BPF_REG_0], 0);
659		− PPC_BCC(COND_NE, exit_addr);
	649	+ PPC_BCC_SHORT(COND_NE, tmp_idx);
660	650	break;
661	651	/* (u64 )(dst + off) += src */
662	652	case BPF_STX \| BPF_XADD \| BPF_DW:
663	653	PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);
664		− /* error if EA is not doubleword-aligned */
665		− PPC_ANDI(b2p[TMP_REG_2], b2p[TMP_REG_1], 0x07);
666		− PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (3*4));
667		− PPC_LI(b2p[BPF_REG_0], 0);
668		− PPC_JMP(exit_addr);
669		− PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
670		− PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
671		− PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
672		− PPC_BCC_SHORT(COND_EQ, (ctx->idx * 4) + (7*4));
	654	+ tmp_idx = ctx->idx * 4;
673	655	PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
674	656	PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
675	657	PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
676		− PPC_LI(b2p[BPF_REG_0], 0);
677		− PPC_BCC(COND_NE, exit_addr);
	658	+ PPC_BCC_SHORT(COND_NE, tmp_idx);
678	659	break;
679	660
680	661	/*

arch/powerpc/platforms/powermac/time.c+20−9

@@ -42,7 +42,11 @@ · 41 unmodified lines
42	42	#define DBG(x...)
43	43	#endif
44	44
45		−/* Apparently the RTC stores seconds since 1 Jan 1904 */
	45	+/*
	46	+ * Offset between Unix time (1970-based) and Mac time (1904-based). Cuda and PMU
	47	+ * times wrap in 2040. If we need to handle later times, the read_time functions
	48	+ * need to be changed to interpret wrapped times as post-2040.
	49	+ */
46	50	#define RTC_OFFSET 2082844800
47	51
48	52	/*
@@ -97,8 +101,11 @@ static time64_t cuda_get_time(void) · 48 unmodified lines
97	101	if (req.reply_len != 7)
98	102	printk(KERN_ERR "cuda_get_time: got %d byte reply\n",
99	103	req.reply_len);
100		− now = (req.reply[3] << 24) + (req.reply[4] << 16)
101		− + (req.reply[5] << 8) + req.reply[6];
	104	+ now = (u32)((req.reply[3] << 24) + (req.reply[4] << 16) +
	105	+ (req.reply[5] << 8) + req.reply[6]);
	106	+ /* it's either after year 2040, or the RTC has gone backwards */
	107	+ WARN_ON(now < RTC_OFFSET);
	108	+
102	109	return now - RTC_OFFSET;
103	110	}
104	111
@@ -106,10 +113,10 @@ static time64_t cuda_get_time(void) · 1 unmodified line
106	113
107	114	static int cuda_set_rtc_time(struct rtc_time *tm)
108	115	{
109		− time64_t nowtime;
	116	+ u32 nowtime;
110	117	struct adb_request req;
111	118
112		− nowtime = rtc_tm_to_time64(tm) + RTC_OFFSET;
	119	+ nowtime = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
113	120	if (cuda_request(&req, NULL, 6, CUDA_PACKET, CUDA_SET_TIME,
114	121	nowtime >> 24, nowtime >> 16, nowtime >> 8,
115	122	nowtime) < 0)
@@ -140,8 +147,12 @@ static time64_t pmu_get_time(void) · 24 unmodified lines
140	147	if (req.reply_len != 4)
141	148	printk(KERN_ERR "pmu_get_time: got %d byte reply from PMU\n",
142	149	req.reply_len);
143		− now = (req.reply[0] << 24) + (req.reply[1] << 16)
144		− + (req.reply[2] << 8) + req.reply[3];
	150	+ now = (u32)((req.reply[0] << 24) + (req.reply[1] << 16) +
	151	+ (req.reply[2] << 8) + req.reply[3]);
	152	+
	153	+ /* it's either after year 2040, or the RTC has gone backwards */
	154	+ WARN_ON(now < RTC_OFFSET);
	155	+
145	156	return now - RTC_OFFSET;
146	157	}
147	158
@@ -149,10 +160,10 @@ static time64_t pmu_get_time(void) · 1 unmodified line
149	160
150	161	static int pmu_set_rtc_time(struct rtc_time *tm)
151	162	{
152		− time64_t nowtime;
	163	+ u32 nowtime;
153	164	struct adb_request req;
154	165
155		− nowtime = rtc_tm_to_time64(tm) + RTC_OFFSET;
	166	+ nowtime = lower_32_bits(rtc_tm_to_time64(tm) + RTC_OFFSET);
156	167	if (pmu_request(&req, NULL, 5, PMU_SET_RTC, nowtime >> 24,
157	168	nowtime >> 16, nowtime >> 8, nowtime) < 0)
158	169	return -ENXIO;

arch/powerpc/platforms/powernv/pci-ioda.c+2−1

@@ -46,6 +46,7 @@ · 45 unmodified lines
46	46
47	47	#include "powernv.h"
48	48	#include "pci.h"
	49	+#include "../../../../drivers/pci/pci.h"
49	50
50	51	#define PNV_IODA1_M64_NUM 16 /* Number of M64 BARs */
51	52	#define PNV_IODA1_M64_SEGS 8 /* Segments per M64 BAR */
@@ -3138,7 +3139,7 @@ static void pnv_pci_ioda_fixup_iov_resources(struct pci_dev *pdev) · 3086 unmodified lines
3138	3139	struct pci_dn *pdn;
3139	3140	int mul, total_vfs;
3140	3141
3141		− if (!pdev->is_physfn \|\| pdev->is_added)
	3142	+ if (!pdev->is_physfn \|\| pci_dev_is_added(pdev))
3142	3143	return;
3143	3144
3144	3145	pdn = pci_get_pdn(pdev);

arch/powerpc/platforms/pseries/setup.c+2−1

@@ -71,6 +71,7 @@ · 70 unmodified lines
71	71	#include <asm/security_features.h>
72	72
73	73	#include "pseries.h"
	74	+#include "../../../../drivers/pci/pci.h"
74	75
75	76	int CMO_PrPSP = -1;
76	77	int CMO_SecPSP = -1;
@@ -664,7 +665,7 @@ static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev) · 587 unmodified lines
664	665	const int *indexes;
665	666	struct device_node *dn = pci_device_to_OF_node(pdev);
666	667
667		− if (!pdev->is_physfn \|\| pdev->is_added)
	668	+ if (!pdev->is_physfn \|\| pci_dev_is_added(pdev))
668	669	return;
669	670	/Firmware must support open sriov otherwise dont configure/
670	671	indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);

arch/powerpc/xmon/xmon.c+2−2

@@ -2734,7 +2734,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr, · 2733 unmodified lines
2734	2734	{
2735	2735	int nr, dotted;
2736	2736	unsigned long first_adr;
2737		− unsigned long inst, last_inst = 0;
	2737	+ unsigned int inst, last_inst = 0;
2738	2738	unsigned char val[4];
2739	2739
2740	2740	dotted = 0;
@@ -2758,7 +2758,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr, · 17 unmodified lines
2758	2758	dotted = 0;
2759	2759	last_inst = inst;
2760	2760	if (praddr)
2761		− printf(REG" %.8lx", adr, inst);
	2761	+ printf(REG" %.8x", adr, inst);
2762	2762	printf("\t");
2763	2763	dump_func(inst, adr);
2764	2764	printf("\n");

arch/riscv/Kconfig+1−0

@@ -107,6 +107,7 @@ config ARCH_RV32I · 106 unmodified lines
107	107	select GENERIC_LIB_ASHLDI3
108	108	select GENERIC_LIB_ASHRDI3
109	109	select GENERIC_LIB_LSHRDI3
	110	+ select GENERIC_LIB_UCMPDI2
110	111
111	112	config ARCH_RV64I
112	113	bool "RV64I"

arch/riscv/include/uapi/asm/elf.h+7−2

@@ -21,8 +21,13 @@ typedef struct user_regs_struct elf_gregset_t; · 20 unmodified lines
21	21
22	22	typedef union __riscv_fp_state elf_fpregset_t;
23	23
24		−#define ELF_RISCV_R_SYM(r_info) ((r_info) >> 32)
25		−#define ELF_RISCV_R_TYPE(r_info) ((r_info) & 0xffffffff)
	24	+#if __riscv_xlen == 64
	25	+#define ELF_RISCV_R_SYM(r_info) ELF64_R_SYM(r_info)
	26	+#define ELF_RISCV_R_TYPE(r_info) ELF64_R_TYPE(r_info)
	27	+#else
	28	+#define ELF_RISCV_R_SYM(r_info) ELF32_R_SYM(r_info)
	29	+#define ELF_RISCV_R_TYPE(r_info) ELF32_R_TYPE(r_info)
	30	+#endif
26	31
27	32	/*
28	33	* RISC-V relocation types

arch/riscv/kernel/irq.c+0−4

@@ -16,10 +16,6 @@ · 15 unmodified lines
16	16	#include <linux/irqchip.h>
17	17	#include <linux/irqdomain.h>
18	18
19		−#ifdef CONFIG_RISCV_INTC
20		−#include <linux/irqchip/irq-riscv-intc.h>
21		−#endif
22		−
23	19	void __init init_IRQ(void)
24	20	{
25	21	irqchip_init();

arch/riscv/kernel/module.c+13−13

@@ -37,7 +37,7 @@ static int apply_r_riscv_64_rela(struct module me, u32 location, Elf_Addr v) · 36 unmodified lines
37	37	static int apply_r_riscv_branch_rela(struct module me, u32 location,
38	38	Elf_Addr v)
39	39	{
40		− s64 offset = (void )v - (void )location;
	40	+ ptrdiff_t offset = (void )v - (void )location;
41	41	u32 imm12 = (offset & 0x1000) << (31 - 12);
42	42	u32 imm11 = (offset & 0x800) >> (11 - 7);
43	43	u32 imm10_5 = (offset & 0x7e0) << (30 - 10);
@@ -50,7 +50,7 @@ static int apply_r_riscv_branch_rela(struct module me, u32 location, · 6 unmodified lines
50	50	static int apply_r_riscv_jal_rela(struct module me, u32 location,
51	51	Elf_Addr v)
52	52	{
53		− s64 offset = (void )v - (void )location;
	53	+ ptrdiff_t offset = (void )v - (void )location;
54	54	u32 imm20 = (offset & 0x100000) << (31 - 20);
55	55	u32 imm19_12 = (offset & 0xff000);
56	56	u32 imm11 = (offset & 0x800) << (20 - 11);
@@ -63,7 +63,7 @@ static int apply_r_riscv_jal_rela(struct module me, u32 location, · 6 unmodified lines
63	63	static int apply_r_riscv_rcv_branch_rela(struct module me, u32 location,
64	64	Elf_Addr v)
65	65	{
66		− s64 offset = (void )v - (void )location;
	66	+ ptrdiff_t offset = (void )v - (void )location;
67	67	u16 imm8 = (offset & 0x100) << (12 - 8);
68	68	u16 imm7_6 = (offset & 0xc0) >> (6 - 5);
69	69	u16 imm5 = (offset & 0x20) >> (5 - 2);
@@ -78,7 +78,7 @@ static int apply_r_riscv_rcv_branch_rela(struct module me, u32 location, · 8 unmodified lines
78	78	static int apply_r_riscv_rvc_jump_rela(struct module me, u32 location,
79	79	Elf_Addr v)
80	80	{
81		− s64 offset = (void )v - (void )location;
	81	+ ptrdiff_t offset = (void )v - (void )location;
82	82	u16 imm11 = (offset & 0x800) << (12 - 11);
83	83	u16 imm10 = (offset & 0x400) >> (10 - 8);
84	84	u16 imm9_8 = (offset & 0x300) << (12 - 11);
@@ -96,7 +96,7 @@ static int apply_r_riscv_rvc_jump_rela(struct module me, u32 location, · 11 unmodified lines
96	96	static int apply_r_riscv_pcrel_hi20_rela(struct module me, u32 location,
97	97	Elf_Addr v)
98	98	{
99		− s64 offset = (void )v - (void )location;
	99	+ ptrdiff_t offset = (void )v - (void )location;
100	100	s32 hi20;
101	101
102	102	if (offset != (s32)offset) {
@@ -178,7 +178,7 @@ static int apply_r_riscv_lo12_s_rela(struct module me, u32 location, · 75 unmodified lines
178	178	static int apply_r_riscv_got_hi20_rela(struct module me, u32 location,
179	179	Elf_Addr v)
180	180	{
181		− s64 offset = (void )v - (void )location;
	181	+ ptrdiff_t offset = (void )v - (void )location;
182	182	s32 hi20;
183	183
184	184	/* Always emit the got entry */
@@ -200,7 +200,7 @@ static int apply_r_riscv_got_hi20_rela(struct module me, u32 location, · 15 unmodified lines
200	200	static int apply_r_riscv_call_plt_rela(struct module me, u32 location,
201	201	Elf_Addr v)
202	202	{
203		− s64 offset = (void )v - (void )location;
	203	+ ptrdiff_t offset = (void )v - (void )location;
204	204	s32 fill_v = offset;
205	205	u32 hi20, lo12;
206	206
@@ -227,7 +227,7 @@ static int apply_r_riscv_call_plt_rela(struct module me, u32 location, · 20 unmodified lines
227	227	static int apply_r_riscv_call_rela(struct module me, u32 location,
228	228	Elf_Addr v)
229	229	{
230		− s64 offset = (void )v - (void )location;
	230	+ ptrdiff_t offset = (void )v - (void )location;
231	231	s32 fill_v = offset;
232	232	u32 hi20, lo12;
233	233
@@ -263,14 +263,14 @@ static int apply_r_riscv_align_rela(struct module me, u32 location, · 29 unmodified lines
263	263	static int apply_r_riscv_add32_rela(struct module me, u32 location,
264	264	Elf_Addr v)
265	265	{
266		− (u32 )location += ((u32 )v);
	266	+ (u32 )location += (u32)v;
267	267	return 0;
268	268	}
269	269
270	270	static int apply_r_riscv_sub32_rela(struct module me, u32 location,
271	271	Elf_Addr v)
272	272	{
273		− (u32 )location -= ((u32 )v);
	273	+ (u32 )location -= (u32)v;
274	274	return 0;
275	275	}
276	276
@@ -347,7 +347,7 @@ int apply_relocate_add(Elf_Shdr sechdrs, const char strtab, · 70 unmodified lines
347	347	unsigned int j;
348	348
349	349	for (j = 0; j < sechdrs[relsec].sh_size / sizeof(*rel); j++) {
350		− u64 hi20_loc =
	350	+ unsigned long hi20_loc =
351	351	sechdrs[sechdrs[relsec].sh_info].sh_addr
352	352	+ rel[j].r_offset;
353	353	u32 hi20_type = ELF_RISCV_R_TYPE(rel[j].r_info);
@@ -360,12 +360,12 @@ int apply_relocate_add(Elf_Shdr sechdrs, const char strtab, · 6 unmodified lines
360	360	Elf_Sym *hi20_sym =
361	361	(Elf_Sym *)sechdrs[symindex].sh_addr
362	362	+ ELF_RISCV_R_SYM(rel[j].r_info);
363		− u64 hi20_sym_val =
	363	+ unsigned long hi20_sym_val =
364	364	hi20_sym->st_value
365	365	+ rel[j].r_addend;
366	366
367	367	/* Calculate lo12 */
368		− u64 offset = hi20_sym_val - hi20_loc;
	368	+ size_t offset = hi20_sym_val - hi20_loc;
369	369	if (IS_ENABLED(CONFIG_MODULE_SECTIONS)
370	370	&& hi20_type == R_RISCV_GOT_HI20) {
371	371	offset = module_emit_got_entry(

arch/riscv/kernel/ptrace.c+1−1

@@ -50,7 +50,7 @@ static int riscv_gpr_set(struct task_struct *target, · 49 unmodified lines
50	50	struct pt_regs *regs;
51	51
52	52	regs = task_pt_regs(target);
53		− ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &regs, 0, -1);
	53	+ ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, regs, 0, -1);
54	54	return ret;
55	55	}
56	56

arch/riscv/kernel/setup.c+0−5

@@ -220,8 +220,3 @@ void __init setup_arch(char **cmdline_p) · 219 unmodified lines
220	220	riscv_fill_hwcap();
221	221	}
222	222
223		−static int __init riscv_device_init(void)
224		−{
225		− return of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
226		−}
227		−subsys_initcall_sync(riscv_device_init);

arch/riscv/mm/init.c+2−0

@@ -28,7 +28,9 @@ static void __init zone_sizes_init(void) · 27 unmodified lines
28	28	{
29	29	unsigned long max_zone_pfns[MAX_NR_ZONES] = { 0, };
30	30
	31	+#ifdef CONFIG_ZONE_DMA32
31	32	max_zone_pfns[ZONE_DMA32] = PFN_DOWN(min(4UL * SZ_1G, max_low_pfn));
	33	+#endif
32	34	max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
33	35
34	36	free_area_init_nodes(max_zone_pfns);

arch/s390/Kconfig+2−2

@@ -106,7 +106,6 @@ config S390 · 105 unmodified lines
106	106	select ARCH_USE_BUILTIN_BSWAP
107	107	select ARCH_USE_CMPXCHG_LOCKREF
108	108	select ARCH_WANTS_DYNAMIC_TASK_STRUCT
109		− select ARCH_WANTS_UBSAN_NO_NULL
110	109	select ARCH_WANT_IPC_PARSE_VERSION
111	110	select BUILDTIME_EXTABLE_SORT
112	111	select CLONE_BACKWARDS2
@@ -140,7 +139,7 @@ config S390 · 27 unmodified lines
140	139	select HAVE_FUNCTION_GRAPH_TRACER
141	140	select HAVE_FUNCTION_TRACER
142	141	select HAVE_FUTEX_CMPXCHG if FUTEX
143		− select HAVE_GCC_PLUGINS
	142	+ select HAVE_GCC_PLUGINS if BROKEN
144	143	select HAVE_KERNEL_BZIP2
145	144	select HAVE_KERNEL_GZIP
146	145	select HAVE_KERNEL_LZ4
@@ -160,6 +159,7 @@ config S390 · 13 unmodified lines
160	159	select HAVE_OPROFILE
161	160	select HAVE_PERF_EVENTS
162	161	select HAVE_REGS_AND_STACK_ACCESS_API
	162	+ select HAVE_RSEQ
163	163	select HAVE_SYSCALL_TRACEPOINTS
164	164	select HAVE_VIRT_CPU_ACCOUNTING
165	165	select MODULES_USE_ELF_RELA

arch/s390/include/asm/css_chars.h+32−30

@@ -6,36 +6,38 @@ · 5 unmodified lines
6	6
7	7	struct css_general_char {
8	8	u64 : 12;
9		− u32 dynio : 1; /* bit 12 */
10		− u32 : 4;
11		− u32 eadm : 1; /* bit 17 */
12		− u32 : 23;
13		− u32 aif : 1; /* bit 41 */
14		− u32 : 3;
15		− u32 mcss : 1; /* bit 45 */
16		− u32 fcs : 1; /* bit 46 */
17		− u32 : 1;
18		− u32 ext_mb : 1; /* bit 48 */
19		− u32 : 7;
20		− u32 aif_tdd : 1; /* bit 56 */
21		− u32 : 1;
22		− u32 qebsm : 1; /* bit 58 */
23		− u32 : 2;
24		− u32 aiv : 1; /* bit 61 */
25		− u32 : 5;
26		− u32 aif_osa : 1; /* bit 67 */
27		− u32 : 12;
28		− u32 eadm_rf : 1; /* bit 80 */
29		− u32 : 1;
30		− u32 cib : 1; /* bit 82 */
31		− u32 : 5;
32		− u32 fcx : 1; /* bit 88 */
33		− u32 : 19;
34		− u32 alt_ssi : 1; /* bit 108 */
35		− u32 : 1;
36		− u32 narf : 1; /* bit 110 */
37		− u32 : 12;
38		− u32 util_str : 1;/* bit 123 */
	9	+ u64 dynio : 1; /* bit 12 */
	10	+ u64 : 4;
	11	+ u64 eadm : 1; /* bit 17 */
	12	+ u64 : 23;
	13	+ u64 aif : 1; /* bit 41 */
	14	+ u64 : 3;
	15	+ u64 mcss : 1; /* bit 45 */
	16	+ u64 fcs : 1; /* bit 46 */
	17	+ u64 : 1;
	18	+ u64 ext_mb : 1; /* bit 48 */
	19	+ u64 : 7;
	20	+ u64 aif_tdd : 1; /* bit 56 */
	21	+ u64 : 1;
	22	+ u64 qebsm : 1; /* bit 58 */
	23	+ u64 : 2;
	24	+ u64 aiv : 1; /* bit 61 */
	25	+ u64 : 2;
	26	+
	27	+ u64 : 3;
	28	+ u64 aif_osa : 1; /* bit 67 */
	29	+ u64 : 12;
	30	+ u64 eadm_rf : 1; /* bit 80 */
	31	+ u64 : 1;
	32	+ u64 cib : 1; /* bit 82 */
	33	+ u64 : 5;
	34	+ u64 fcx : 1; /* bit 88 */
	35	+ u64 : 19;
	36	+ u64 alt_ssi : 1; /* bit 108 */
	37	+ u64 : 1;
	38	+ u64 narf : 1; /* bit 110 */
	39	+ u64 : 12;
	40	+ u64 util_str : 1;/* bit 123 */
39	41	} __packed;
40	42
41	43	extern struct css_general_char css_general_characteristics;

arch/s390/kernel/compat_wrapper.c+1−0

@@ -183,3 +183,4 @@ COMPAT_SYSCALL_WRAP2(s390_guarded_storage, int, command, struct gs_cb *, gs_cb); · 182 unmodified lines
183	183	COMPAT_SYSCALL_WRAP5(statx, int, dfd, const char __user , path, unsigned, flags, unsigned, mask, struct statx __user , buffer);
184	184	COMPAT_SYSCALL_WRAP4(s390_sthyi, unsigned long, code, void __user , info, u64 __user , rc, unsigned long, flags);
185	185	COMPAT_SYSCALL_WRAP5(kexec_file_load, int, kernel_fd, int, initrd_fd, unsigned long, cmdline_len, const char __user *, cmdline_ptr, unsigned long, flags)
	186	+COMPAT_SYSCALL_WRAP4(rseq, struct rseq __user *, rseq, u32, rseq_len, int, flags, u32, sig)

arch/s390/kernel/entry.S+6−2

@@ -357,6 +357,10 @@ ENTRY(system_call) · 356 unmodified lines
357	357	stg %r2,__PT_R2(%r11) # store return value
358	358
359	359	.Lsysc_return:
	360	+#ifdef CONFIG_DEBUG_RSEQ
	361	+ lgr %r2,%r11
	362	+ brasl %r14,rseq_syscall
	363	+#endif
360	364	LOCKDEP_SYS_EXIT
361	365	.Lsysc_tif:
362	366	TSTMSK __PT_FLAGS(%r11),_PIF_WORK
@@ -1265,7 +1269,7 @@ cleanup_critical: · 902 unmodified lines
1265	1269	jl 0f
1266	1270	clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end
1267	1271	jl .Lcleanup_load_fpu_regs
1268		−0: BR_EX %r14
	1272	+0: BR_EX %r14,%r11
1269	1273
1270	1274	.align 8
1271	1275	.Lcleanup_table:
@@ -1301,7 +1305,7 @@ cleanup_critical: · 29 unmodified lines
1301	1305	ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
1302	1306	lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1303	1307	larl %r9,sie_exit # skip forward to sie_exit
1304		− BR_EX %r14
	1308	+ BR_EX %r14,%r11
1305	1309	#endif
1306	1310
1307	1311	.Lcleanup_system_call:

arch/s390/kernel/signal.c+2−1

@@ -498,7 +498,7 @@ void do_signal(struct pt_regs *regs) · 497 unmodified lines
498	498	}
499	499	/* No longer in a system call */
500	500	clear_pt_regs_flag(regs, PIF_SYSCALL);
501		−
	501	+ rseq_signal_deliver(&ksig, regs);
502	502	if (is_compat_task())
503	503	handle_signal32(&ksig, oldset, regs);
504	504	else
@@ -537,4 +537,5 @@ void do_notify_resume(struct pt_regs *regs) · 32 unmodified lines
537	537	{
538	538	clear_thread_flag(TIF_NOTIFY_RESUME);
539	539	tracehook_notify_resume(regs);
	540	+ rseq_handle_notify_resume(NULL, regs);
540	541	}

arch/s390/kernel/syscalls/syscall.tbl+2−0

@@ -389,3 +389,5 @@ · 388 unmodified lines
389	389	379 common statx sys_statx compat_sys_statx
390	390	380 common s390_sthyi sys_s390_sthyi compat_sys_s390_sthyi
391	391	381 common kexec_file_load sys_kexec_file_load compat_sys_kexec_file_load
	392	+382 common io_pgetevents sys_io_pgetevents compat_sys_io_pgetevents
	393	+383 common rseq sys_rseq compat_sys_rseq

arch/s390/mm/pgalloc.c+4−0

@@ -252,6 +252,8 @@ void page_table_free(struct mm_struct mm, unsigned long table) · 251 unmodified lines
252	252	spin_unlock_bh(&mm->context.lock);
253	253	if (mask != 0)
254	254	return;
	255	+ } else {
	256	+ atomic_xor_bits(&page->_refcount, 3U << 24);
255	257	}
256	258
257	259	pgtable_page_dtor(page);
@@ -304,6 +306,8 @@ static void __tlb_remove_table(void *_table) · 46 unmodified lines
304	306	break;
305	307	/* fallthrough */
306	308	case 3: /* 4K page table with pgstes */
	309	+ if (mask & 3)
	310	+ atomic_xor_bits(&page->_refcount, 3 << 24);
307	311	pgtable_page_dtor(page);
308	312	__free_page(page);
309	313	break;

arch/s390/net/bpf_jit_comp.c+1−0

@@ -1286,6 +1286,7 @@ struct bpf_prog bpf_int_jit_compile(struct bpf_prog fp) · 1285 unmodified lines
1286	1286	goto free_addrs;
1287	1287	}
1288	1288	if (bpf_jit_prog(&jit, fp)) {
	1289	+ bpf_jit_binary_free(header);
1289	1290	fp = orig_fp;
1290	1291	goto free_addrs;
1291	1292	}

arch/sparc/include/asm/Kbuild+1−0

@@ -13,6 +13,7 @@ generic-y += local64.h · 12 unmodified lines
13	13	generic-y += mcs_spinlock.h
14	14	generic-y += mm-arch-hooks.h
15	15	generic-y += module.h
	16	+generic-y += msi.h
16	17	generic-y += preempt.h
17	18	generic-y += rwsem.h
18	19	generic-y += serial.h

arch/sparc/include/asm/msi.h+0−32

@@ -1,32 +0,0 @@
1		−/* SPDX-License-Identifier: GPL-2.0 */
2		−/*
3		− * msi.h: Defines specific to the MBus - Sbus - Interface.
4		− *
5		− * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
6		− * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
7		− */
8		−
9		−#ifndef _SPARC_MSI_H
10		−#define _SPARC_MSI_H
11		−
12		−/*
13		− * Locations of MSI Registers.
14		− */
15		−#define MSI_MBUS_ARBEN 0xe0001008 /* MBus Arbiter Enable register */
16		−
17		−/*
18		− * Useful bits in the MSI Registers.
19		− */
20		−#define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */
21		−
22		−
23		−static inline void msi_set_sync(void)
24		−{
25		− __asm__ __volatile__ ("lda [%0] %1, %%g3\n\t"
26		− "andn %%g3, %2, %%g3\n\t"
27		− "sta %%g3, [%0] %1\n\t" : :
28		− "r" (MSI_MBUS_ARBEN),
29		− "i" (ASI_M_CTL), "r" (MSI_ASYNC_MODE) : "g3");
30		−}
31		−
32		−#endif /* !(_SPARC_MSI_H) */

arch/sparc/kernel/time_64.c+1−1

@@ -814,7 +814,7 @@ static void __init get_tick_patch(void) · 813 unmodified lines
814	814	}
815	815	}
816	816
817		−static void init_tick_ops(struct sparc64_tick_ops *ops)
	817	+static void __init init_tick_ops(struct sparc64_tick_ops *ops)
818	818	{
819	819	unsigned long freq, quotient, tick;
820	820

arch/sparc/mm/srmmu.c+19−1

@@ -37,7 +37,6 @@ · 36 unmodified lines
37	37	#include <asm/mbus.h>
38	38	#include <asm/page.h>
39	39	#include <asm/asi.h>
40		−#include <asm/msi.h>
41	40	#include <asm/smp.h>
42	41	#include <asm/io.h>
43	42
@@ -116,6 +115,25 @@ static inline void srmmu_ctxd_set(ctxd_t ctxp, pgd_t pgdp) · 72 unmodified lines
116	115	set_pte((pte_t *)ctxp, pte);
117	116	}
118	117
	118	+/*
	119	+ * Locations of MSI Registers.
	120	+ */
	121	+#define MSI_MBUS_ARBEN 0xe0001008 /* MBus Arbiter Enable register */
	122	+
	123	+/*
	124	+ * Useful bits in the MSI Registers.
	125	+ */
	126	+#define MSI_ASYNC_MODE 0x80000000 /* Operate the MSI asynchronously */
	127	+
	128	+static void msi_set_sync(void)
	129	+{
	130	+ __asm__ __volatile__ ("lda [%0] %1, %%g3\n\t"
	131	+ "andn %%g3, %2, %%g3\n\t"
	132	+ "sta %%g3, [%0] %1\n\t" : :
	133	+ "r" (MSI_MBUS_ARBEN),
	134	+ "i" (ASI_M_CTL), "r" (MSI_ASYNC_MODE) : "g3");
	135	+}
	136	+
119	137	void pmd_set(pmd_t pmdp, pte_t ptep)
120	138	{
121	139	unsigned long ptp; /* Physical address, shifted right by 4 */

arch/x86/Kconfig+1−1

@@ -63,7 +63,7 @@ config X86 · 62 unmodified lines
63	63	select ARCH_HAS_PTE_SPECIAL
64	64	select ARCH_HAS_REFCOUNT
65	65	select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64
66		− select ARCH_HAS_UACCESS_MCSAFE if X86_64
	66	+ select ARCH_HAS_UACCESS_MCSAFE if X86_64 && X86_MCE
67	67	select ARCH_HAS_SET_MEMORY
68	68	select ARCH_HAS_SG_CHAIN
69	69	select ARCH_HAS_STRICT_KERNEL_RWX

arch/x86/Makefile+0−6

@@ -258,11 +258,6 @@ archscripts: scripts_basic · 257 unmodified lines
258	258	archheaders:
259	259	$(Q)$(MAKE) $(build)=arch/x86/entry/syscalls all
260	260
261		−archprepare:
262		−ifeq ($(CONFIG_KEXEC_FILE),y)
263		− $(Q)$(MAKE) $(build)=arch/x86/purgatory arch/x86/purgatory/kexec-purgatory.c
264		−endif
265		−
266	261	###
267	262	# Kernel objects
268	263
@@ -327,7 +322,6 @@ archclean: · 58 unmodified lines
327	322	$(Q)rm -rf $(objtree)/arch/x86_64
328	323	$(Q)$(MAKE) $(clean)=$(boot)
329	324	$(Q)$(MAKE) $(clean)=arch/x86/tools
330		− $(Q)$(MAKE) $(clean)=arch/x86/purgatory
331	325
332	326	define archhelp
333	327	echo '* bzImage - Compressed kernel image (arch/x86/boot/bzImage)'

arch/x86/boot/compressed/Makefile+6−2

@@ -106,9 +106,13 @@ define cmd_check_data_rel · 105 unmodified lines
106	106	done
107	107	endef
108	108
	109	+# We need to run two commands under "if_changed", so merge them into a
	110	+# single invocation.
	111	+quiet_cmd_check-and-link-vmlinux = LD $@
	112	+ cmd_check-and-link-vmlinux = $(cmd_check_data_rel); $(cmd_ld)
	113	+
109	114	$(obj)/vmlinux: $(vmlinux-objs-y) FORCE
110		− $(call if_changed,check_data_rel)
111		− $(call if_changed,ld)
	115	+ $(call if_changed,check-and-link-vmlinux)
112	116
113	117	OBJCOPYFLAGS_vmlinux.bin := -R .comment -S
114	118	$(obj)/vmlinux.bin: vmlinux FORCE

arch/x86/boot/compressed/eboot.c+3−9

@@ -114,18 +114,12 @@ __setup_efi_pci(efi_pci_io_protocol_t pci, struct pci_setup_rom *__rom) · 113 unmodified lines
114	114	struct pci_setup_rom *rom = NULL;
115	115	efi_status_t status;
116	116	unsigned long size;
117		− uint64_t attributes, romsize;
	117	+ uint64_t romsize;
118	118	void *romimage;
119	119
120		− status = efi_call_proto(efi_pci_io_protocol, attributes, pci,
121		− EfiPciIoAttributeOperationGet, 0, 0,
122		− &attributes);
123		− if (status != EFI_SUCCESS)
124		− return status;
125		−
126	120	/*
127		− * Some firmware images contain EFI function pointers at the place where the
128		− * romimage and romsize fields are supposed to be. Typically the EFI
	121	+ * Some firmware images contain EFI function pointers at the place where
	122	+ * the romimage and romsize fields are supposed to be. Typically the EFI
129	123	* code is mapped at high addresses, translating to an unrealistically
130	124	* large romsize. The UEFI spec limits the size of option ROMs to 16
131	125	* MiB so we reject any ROMs over 16 MiB in size to catch this.

arch/x86/boot/compressed/pgtable_64.c+55−18

@@ -1,3 +1,4 @@
	1	+#include <asm/e820/types.h>
1	2	#include <asm/processor.h>
2	3	#include "pgtable.h"
3	4	#include "../string.h"
@@ -34,10 +35,62 @@ unsigned long *trampoline_32bit __section(.data); · 30 unmodified lines
34	35	extern struct boot_params *boot_params;
35	36	int cmdline_find_option_bool(const char *option);
36	37
	38	+static unsigned long find_trampoline_placement(void)
	39	+{
	40	+ unsigned long bios_start, ebda_start;
	41	+ unsigned long trampoline_start;
	42	+ struct boot_e820_entry *entry;
	43	+ int i;
	44	+
	45	+ /*
	46	+ * Find a suitable spot for the trampoline.
	47	+ * This code is based on reserve_bios_regions().
	48	+ */
	49	+
	50	+ ebda_start = (unsigned short )0x40e << 4;
	51	+ bios_start = (unsigned short )0x413 << 10;
	52	+
	53	+ if (bios_start < BIOS_START_MIN \|\| bios_start > BIOS_START_MAX)
	54	+ bios_start = BIOS_START_MAX;
	55	+
	56	+ if (ebda_start > BIOS_START_MIN && ebda_start < bios_start)
	57	+ bios_start = ebda_start;
	58	+
	59	+ bios_start = round_down(bios_start, PAGE_SIZE);
	60	+
	61	+ /* Find the first usable memory region under bios_start. */
	62	+ for (i = boot_params->e820_entries - 1; i >= 0; i--) {
	63	+ entry = &boot_params->e820_table[i];
	64	+
	65	+ /* Skip all entries above bios_start. */
	66	+ if (bios_start <= entry->addr)
	67	+ continue;
	68	+
	69	+ /* Skip non-RAM entries. */
	70	+ if (entry->type != E820_TYPE_RAM)
	71	+ continue;
	72	+
	73	+ /* Adjust bios_start to the end of the entry if needed. */
	74	+ if (bios_start > entry->addr + entry->size)
	75	+ bios_start = entry->addr + entry->size;
	76	+
	77	+ /* Keep bios_start page-aligned. */
	78	+ bios_start = round_down(bios_start, PAGE_SIZE);
	79	+
	80	+ /* Skip the entry if it's too small. */
	81	+ if (bios_start - TRAMPOLINE_32BIT_SIZE < entry->addr)
	82	+ continue;
	83	+
	84	+ break;
	85	+ }
	86	+
	87	+ /* Place the trampoline just below the end of low memory */
	88	+ return bios_start - TRAMPOLINE_32BIT_SIZE;
	89	+}
	90	+
37	91	struct paging_config paging_prepare(void *rmode)
38	92	{
39	93	struct paging_config paging_config = {};
40		− unsigned long bios_start, ebda_start;
41	94
42	95	/* Initialize boot_params. Required for cmdline_find_option_bool(). */
43	96	boot_params = rmode;
@@ -61,23 +114,7 @@ struct paging_config paging_prepare(void *rmode) · 17 unmodified lines
61	114	paging_config.l5_required = 1;
62	115	}
63	116
64		− /*
65		− * Find a suitable spot for the trampoline.
66		− * This code is based on reserve_bios_regions().
67		− */
68		−
69		− ebda_start = (unsigned short )0x40e << 4;
70		− bios_start = (unsigned short )0x413 << 10;
71		−
72		− if (bios_start < BIOS_START_MIN \|\| bios_start > BIOS_START_MAX)
73		− bios_start = BIOS_START_MAX;
74		−
75		− if (ebda_start > BIOS_START_MIN && ebda_start < bios_start)
76		− bios_start = ebda_start;
77		−
78		− /* Place the trampoline just below the end of low memory, aligned to 4k */
79		− paging_config.trampoline_start = bios_start - TRAMPOLINE_32BIT_SIZE;
80		− paging_config.trampoline_start = round_down(paging_config.trampoline_start, PAGE_SIZE);
	117	+ paging_config.trampoline_start = find_trampoline_placement();
81	118
82	119	trampoline_32bit = (unsigned long *)paging_config.trampoline_start;
83	120

arch/x86/crypto/aegis128-aesni-asm.S+1−0

@@ -535,6 +535,7 @@ ENTRY(crypto_aegis128_aesni_enc_tail) · 534 unmodified lines
535	535	movdqu STATE3, 0x40(STATEP)
536	536
537	537	FRAME_END
	538	+ ret
538	539	ENDPROC(crypto_aegis128_aesni_enc_tail)
539	540
540	541	.macro decrypt_block a s0 s1 s2 s3 s4 i

arch/x86/crypto/aegis128-aesni-glue.c+4−8

@@ -375,16 +375,12 @@ static struct aead_alg crypto_aegis128_aesni_alg[] = { · 374 unmodified lines
375	375	}
376	376	};
377	377
378		−static const struct x86_cpu_id aesni_cpu_id[] = {
379		− X86_FEATURE_MATCH(X86_FEATURE_AES),
380		− X86_FEATURE_MATCH(X86_FEATURE_XMM2),
381		− {}
382		−};
383		−MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
384		−
385	378	static int __init crypto_aegis128_aesni_module_init(void)
386	379	{
387		− if (!x86_match_cpu(aesni_cpu_id))
	380	+ if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
	381	+ !boot_cpu_has(X86_FEATURE_AES) \|\|
	382	+ !boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
	383	+ !cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
388	384	return -ENODEV;
389	385
390	386	return crypto_register_aeads(crypto_aegis128_aesni_alg,

arch/x86/crypto/aegis128l-aesni-asm.S+1−0

@@ -645,6 +645,7 @@ ENTRY(crypto_aegis128l_aesni_enc_tail) · 644 unmodified lines
645	645	state_store0
646	646
647	647	FRAME_END
	648	+ ret
648	649	ENDPROC(crypto_aegis128l_aesni_enc_tail)
649	650
650	651	/*

arch/x86/crypto/aegis128l-aesni-glue.c+4−8

@@ -375,16 +375,12 @@ static struct aead_alg crypto_aegis128l_aesni_alg[] = { · 374 unmodified lines
375	375	}
376	376	};
377	377
378		−static const struct x86_cpu_id aesni_cpu_id[] = {
379		− X86_FEATURE_MATCH(X86_FEATURE_AES),
380		− X86_FEATURE_MATCH(X86_FEATURE_XMM2),
381		− {}
382		−};
383		−MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
384		−
385	378	static int __init crypto_aegis128l_aesni_module_init(void)
386	379	{
387		− if (!x86_match_cpu(aesni_cpu_id))
	380	+ if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
	381	+ !boot_cpu_has(X86_FEATURE_AES) \|\|
	382	+ !boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
	383	+ !cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
388	384	return -ENODEV;
389	385
390	386	return crypto_register_aeads(crypto_aegis128l_aesni_alg,

arch/x86/crypto/aegis256-aesni-asm.S+1−0

@@ -543,6 +543,7 @@ ENTRY(crypto_aegis256_aesni_enc_tail) · 542 unmodified lines
543	543	state_store0
544	544
545	545	FRAME_END
	546	+ ret
546	547	ENDPROC(crypto_aegis256_aesni_enc_tail)
547	548
548	549	/*

arch/x86/crypto/aegis256-aesni-glue.c+4−8

@@ -375,16 +375,12 @@ static struct aead_alg crypto_aegis256_aesni_alg[] = { · 374 unmodified lines
375	375	}
376	376	};
377	377
378		−static const struct x86_cpu_id aesni_cpu_id[] = {
379		− X86_FEATURE_MATCH(X86_FEATURE_AES),
380		− X86_FEATURE_MATCH(X86_FEATURE_XMM2),
381		− {}
382		−};
383		−MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
384		−
385	378	static int __init crypto_aegis256_aesni_module_init(void)
386	379	{
387		− if (!x86_match_cpu(aesni_cpu_id))
	380	+ if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
	381	+ !boot_cpu_has(X86_FEATURE_AES) \|\|
	382	+ !boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
	383	+ !cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
388	384	return -ENODEV;
389	385
390	386	return crypto_register_aeads(crypto_aegis256_aesni_alg,

arch/x86/crypto/morus1280-avx2-asm.S+1−0

@@ -453,6 +453,7 @@ ENTRY(crypto_morus1280_avx2_enc_tail) · 452 unmodified lines
453	453	vmovdqu STATE4, (4 * 32)(%rdi)
454	454
455	455	FRAME_END
	456	+ ret
456	457	ENDPROC(crypto_morus1280_avx2_enc_tail)
457	458
458	459	/*

arch/x86/crypto/morus1280-avx2-glue.c+3−7

@@ -37,15 +37,11 @@ asmlinkage void crypto_morus1280_avx2_final(void state, void tag_xor, · 36 unmodified lines
37	37
38	38	MORUS1280_DECLARE_ALGS(avx2, "morus1280-avx2", 400);
39	39
40		−static const struct x86_cpu_id avx2_cpu_id[] = {
41		− X86_FEATURE_MATCH(X86_FEATURE_AVX2),
42		− {}
43		−};
44		−MODULE_DEVICE_TABLE(x86cpu, avx2_cpu_id);
45		−
46	40	static int __init crypto_morus1280_avx2_module_init(void)
47	41	{
48		− if (!x86_match_cpu(avx2_cpu_id))
	42	+ if (!boot_cpu_has(X86_FEATURE_AVX2) \|\|
	43	+ !boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
	44	+ !cpu_has_xfeatures(XFEATURE_MASK_SSE \| XFEATURE_MASK_YMM, NULL))
49	45	return -ENODEV;
50	46
51	47	return crypto_register_aeads(crypto_morus1280_avx2_algs,

arch/x86/crypto/morus1280-sse2-asm.S+1−0

@@ -652,6 +652,7 @@ ENTRY(crypto_morus1280_sse2_enc_tail) · 651 unmodified lines
652	652	movdqu STATE4_HI, (9 * 16)(%rdi)
653	653
654	654	FRAME_END
	655	+ ret
655	656	ENDPROC(crypto_morus1280_sse2_enc_tail)
656	657
657	658	/*

arch/x86/crypto/morus1280-sse2-glue.c+3−7

@@ -37,15 +37,11 @@ asmlinkage void crypto_morus1280_sse2_final(void state, void tag_xor, · 36 unmodified lines
37	37
38	38	MORUS1280_DECLARE_ALGS(sse2, "morus1280-sse2", 350);
39	39
40		−static const struct x86_cpu_id sse2_cpu_id[] = {
41		− X86_FEATURE_MATCH(X86_FEATURE_XMM2),
42		− {}
43		−};
44		−MODULE_DEVICE_TABLE(x86cpu, sse2_cpu_id);
45		−
46	40	static int __init crypto_morus1280_sse2_module_init(void)
47	41	{
48		− if (!x86_match_cpu(sse2_cpu_id))
	42	+ if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
	43	+ !boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
	44	+ !cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
49	45	return -ENODEV;
50	46
51	47	return crypto_register_aeads(crypto_morus1280_sse2_algs,

arch/x86/crypto/morus640-sse2-asm.S+1−0

@@ -437,6 +437,7 @@ ENTRY(crypto_morus640_sse2_enc_tail) · 436 unmodified lines
437	437	movdqu STATE4, (4 * 16)(%rdi)
438	438
439	439	FRAME_END
	440	+ ret
440	441	ENDPROC(crypto_morus640_sse2_enc_tail)
441	442
442	443	/*

arch/x86/crypto/morus640-sse2-glue.c+3−7

@@ -37,15 +37,11 @@ asmlinkage void crypto_morus640_sse2_final(void state, void tag_xor, · 36 unmodified lines
37	37
38	38	MORUS640_DECLARE_ALGS(sse2, "morus640-sse2", 400);
39	39
40		−static const struct x86_cpu_id sse2_cpu_id[] = {
41		− X86_FEATURE_MATCH(X86_FEATURE_XMM2),
42		− {}
43		−};
44		−MODULE_DEVICE_TABLE(x86cpu, sse2_cpu_id);
45		−
46	40	static int __init crypto_morus640_sse2_module_init(void)
47	41	{
48		− if (!x86_match_cpu(sse2_cpu_id))
	42	+ if (!boot_cpu_has(X86_FEATURE_XMM2) \|\|
	43	+ !boot_cpu_has(X86_FEATURE_OSXSAVE) \|\|
	44	+ !cpu_has_xfeatures(XFEATURE_MASK_SSE, NULL))
49	45	return -ENODEV;
50	46
51	47	return crypto_register_aeads(crypto_morus640_sse2_algs,

arch/x86/entry/common.c+1−1

@@ -164,7 +164,7 @@ static void exit_to_usermode_loop(struct pt_regs *regs, u32 cached_flags) · 163 unmodified lines
164	164	if (cached_flags & _TIF_NOTIFY_RESUME) {
165	165	clear_thread_flag(TIF_NOTIFY_RESUME);
166	166	tracehook_notify_resume(regs);
167		− rseq_handle_notify_resume(regs);
	167	+ rseq_handle_notify_resume(NULL, regs);
168	168	}
169	169
170	170	if (cached_flags & _TIF_USER_RETURN_NOTIFY)

arch/x86/entry/entry_32.S+1−1

@@ -477,7 +477,7 @@ ENTRY(entry_SYSENTER_32) · 476 unmodified lines
477	477	* whereas POPF does not.)
478	478	*/
479	479	addl $PT_EFLAGS-PT_DS, %esp /* point esp at pt_regs->flags */
480		− btr $X86_EFLAGS_IF_BIT, (%esp)
	480	+ btrl $X86_EFLAGS_IF_BIT, (%esp)
481	481	popfl
482	482
483	483	/*

arch/x86/entry/entry_64.S+4−14

@@ -981,7 +981,7 @@ ENTRY(\sym) · 980 unmodified lines
981	981
982	982	call \do_sym
983	983
984		− jmp error_exit /* %ebx: no swapgs flag */
	984	+ jmp error_exit
985	985	.endif
986	986	END(\sym)
987	987	.endm
@@ -1222,7 +1222,6 @@ END(paranoid_exit) · 234 unmodified lines
1222	1222
1223	1223	/*
1224	1224	* Save all registers in pt_regs, and switch GS if needed.
1225		− * Return: EBX=0: came from user mode; EBX=1: otherwise
1226	1225	*/
1227	1226	ENTRY(error_entry)
1228	1227	UNWIND_HINT_FUNC
@@ -1269,7 +1268,6 @@ ENTRY(error_entry) · 40 unmodified lines
1269	1268	* for these here too.
1270	1269	*/
1271	1270	.Lerror_kernelspace:
1272		− incl %ebx
1273	1271	leaq native_irq_return_iret(%rip), %rcx
1274	1272	cmpq %rcx, RIP+8(%rsp)
1275	1273	je .Lerror_bad_iret
@@ -1303,28 +1301,20 @@ ENTRY(error_entry) · 27 unmodified lines
1303	1301
1304	1302	/*
1305	1303	* Pretend that the exception came from user mode: set up pt_regs
1306		− * as if we faulted immediately after IRET and clear EBX so that
1307		− * error_exit knows that we will be returning to user mode.
	1304	+ * as if we faulted immediately after IRET.
1308	1305	*/
1309	1306	mov %rsp, %rdi
1310	1307	call fixup_bad_iret
1311	1308	mov %rax, %rsp
1312		− decl %ebx
1313	1309	jmp .Lerror_entry_from_usermode_after_swapgs
1314	1310	END(error_entry)
1315	1311
1316		−
1317		−/*
1318		− * On entry, EBX is a "return to kernel mode" flag:
1319		− * 1: already in kernel mode, don't need SWAPGS
1320		− * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1321		− */
1322	1312	ENTRY(error_exit)
1323	1313	UNWIND_HINT_REGS
1324	1314	DISABLE_INTERRUPTS(CLBR_ANY)
1325	1315	TRACE_IRQS_OFF
1326		− testl %ebx, %ebx
1327		− jnz retint_kernel
	1316	+ testb $3, CS(%rsp)
	1317	+ jz retint_kernel
1328	1318	jmp retint_user
1329	1319	END(error_exit)
1330	1320

arch/x86/entry/entry_64_compat.S+8−8

@@ -84,13 +84,13 @@ ENTRY(entry_SYSENTER_compat) · 83 unmodified lines
84	84	pushq %rdx /* pt_regs->dx */
85	85	pushq %rcx /* pt_regs->cx */
86	86	pushq $-ENOSYS /* pt_regs->ax */
87		− pushq %r8 /* pt_regs->r8 */
	87	+ pushq $0 /* pt_regs->r8 = 0 */
88	88	xorl %r8d, %r8d /* nospec r8 */
89		− pushq %r9 /* pt_regs->r9 */
	89	+ pushq $0 /* pt_regs->r9 = 0 */
90	90	xorl %r9d, %r9d /* nospec r9 */
91		− pushq %r10 /* pt_regs->r10 */
	91	+ pushq $0 /* pt_regs->r10 = 0 */
92	92	xorl %r10d, %r10d /* nospec r10 */
93		− pushq %r11 /* pt_regs->r11 */
	93	+ pushq $0 /* pt_regs->r11 = 0 */
94	94	xorl %r11d, %r11d /* nospec r11 */
95	95	pushq %rbx /* pt_regs->rbx */
96	96	xorl %ebx, %ebx /* nospec rbx */
@@ -374,13 +374,13 @@ ENTRY(entry_INT80_compat) · 277 unmodified lines
374	374	pushq %rcx /* pt_regs->cx */
375	375	xorl %ecx, %ecx /* nospec cx */
376	376	pushq $-ENOSYS /* pt_regs->ax */
377		− pushq $0 /* pt_regs->r8 = 0 */
	377	+ pushq %r8 /* pt_regs->r8 */
378	378	xorl %r8d, %r8d /* nospec r8 */
379		− pushq $0 /* pt_regs->r9 = 0 */
	379	+ pushq %r9 /* pt_regs->r9 */
380	380	xorl %r9d, %r9d /* nospec r9 */
381		− pushq $0 /* pt_regs->r10 = 0 */
	381	+ pushq %r10 /* pt_regs->r10*/
382	382	xorl %r10d, %r10d /* nospec r10 */
383		− pushq $0 /* pt_regs->r11 = 0 */
	383	+ pushq %r11 /* pt_regs->r11 */
384	384	xorl %r11d, %r11d /* nospec r11 */
385	385	pushq %rbx /* pt_regs->rbx */
386	386	xorl %ebx, %ebx /* nospec rbx */

arch/x86/events/amd/ibs.c+5−1

@@ -579,7 +579,7 @@ static int perf_ibs_handle_irq(struct perf_ibs perf_ibs, struct pt_regs iregs) · 578 unmodified lines
579	579	{
580	580	struct cpu_perf_ibs *pcpu = this_cpu_ptr(perf_ibs->pcpu);
581	581	struct perf_event *event = pcpu->event;
582		− struct hw_perf_event *hwc = &event->hw;
	582	+ struct hw_perf_event *hwc;
583	583	struct perf_sample_data data;
584	584	struct perf_raw_record raw;
585	585	struct pt_regs regs;
@@ -602,6 +602,10 @@ fail: · 16 unmodified lines
602	602	return 0;
603	603	}
604	604
	605	+ if (WARN_ON_ONCE(!event))
	606	+ goto fail;
	607	+
	608	+ hwc = &event->hw;
605	609	msr = hwc->config_base;
606	610	buf = ibs_data.regs;
607	611	rdmsrl(msr, *buf);

arch/x86/events/intel/core.c+3−0

@@ -2997,6 +2997,9 @@ static int intel_pmu_hw_config(struct perf_event *event) · 2996 unmodified lines
2997	2997	}
2998	2998	if (x86_pmu.pebs_aliases)
2999	2999	x86_pmu.pebs_aliases(event);
	3000	+
	3001	+ if (event->attr.sample_type & PERF_SAMPLE_CALLCHAIN)
	3002	+ event->attr.sample_type \|= __PERF_SAMPLE_CALLCHAIN_EARLY;
3000	3003	}
3001	3004
3002	3005	if (needs_branch_stack(event)) {

arch/x86/events/intel/ds.c+16−17

@@ -408,9 +408,11 @@ static int alloc_bts_buffer(int cpu) · 407 unmodified lines
408	408	ds->bts_buffer_base = (unsigned long) cea;
409	409	ds_update_cea(cea, buffer, BTS_BUFFER_SIZE, PAGE_KERNEL);
410	410	ds->bts_index = ds->bts_buffer_base;
411		− max = BTS_RECORD_SIZE * (BTS_BUFFER_SIZE / BTS_RECORD_SIZE);
412		− ds->bts_absolute_maximum = ds->bts_buffer_base + max;
413		− ds->bts_interrupt_threshold = ds->bts_absolute_maximum - (max / 16);
	411	+ max = BTS_BUFFER_SIZE / BTS_RECORD_SIZE;
	412	+ ds->bts_absolute_maximum = ds->bts_buffer_base +
	413	+ max * BTS_RECORD_SIZE;
	414	+ ds->bts_interrupt_threshold = ds->bts_absolute_maximum -
	415	+ (max / 16) * BTS_RECORD_SIZE;
414	416	return 0;
415	417	}
416	418
@@ -1183,17 +1185,21 @@ static void setup_pebs_sample_data(struct perf_event *event, · 766 unmodified lines
1183	1185	data->data_src.val = val;
1184	1186	}
1185	1187
	1188	+ /*
	1189	+ * We must however always use iregs for the unwinder to stay sane; the
	1190	+ * record BP,SP,IP can point into thin air when the record is from a
	1191	+ * previous PMI context or an (I)RET happend between the record and
	1192	+ * PMI.
	1193	+ */
	1194	+ if (sample_type & PERF_SAMPLE_CALLCHAIN)
	1195	+ data->callchain = perf_callchain(event, iregs);
	1196	+
1186	1197	/*
1187	1198	* We use the interrupt regs as a base because the PEBS record does not
1188	1199	* contain a full regs set, specifically it seems to lack segment
1189	1200	* descriptors, which get used by things like user_mode().
1190	1201	*
1191	1202	* In the simple case fix up only the IP for PERF_SAMPLE_IP.
1192		− *
1193		− * We must however always use BP,SP from iregs for the unwinder to stay
1194		− * sane; the record BP,SP can point into thin air when the record is
1195		− * from a previous PMI context or an (I)RET happend between the record
1196		− * and PMI.
1197	1203	*/
1198	1204	regs = iregs;
1199	1205
@@ -1212,15 +1218,8 @@ static void setup_pebs_sample_data(struct perf_event *event, · 12 unmodified lines
1212	1218	regs->si = pebs->si;
1213	1219	regs->di = pebs->di;
1214	1220
1215		− /*
1216		− * Per the above; only set BP,SP if we don't need callchains.
1217		− *
1218		− * XXX: does this make sense?
1219		− */
1220		− if (!(sample_type & PERF_SAMPLE_CALLCHAIN)) {
1221		− regs->bp = pebs->bp;
1222		− regs->sp = pebs->sp;
1223		− }
	1221	+ regs->bp = pebs->bp;
	1222	+ regs->sp = pebs->sp;
1224	1223
1225	1224	#ifndef CONFIG_X86_32
1226	1225	regs->r8 = pebs->r8;

arch/x86/events/intel/uncore.h+1−1

@@ -28,7 +28,7 @@ · 27 unmodified lines
28	28	#define UNCORE_PCI_DEV_TYPE(data) ((data >> 8) & 0xff)
29	29	#define UNCORE_PCI_DEV_IDX(data) (data & 0xff)
30	30	#define UNCORE_EXTRA_PCI_DEV 0xff
31		−#define UNCORE_EXTRA_PCI_DEV_MAX 3
	31	+#define UNCORE_EXTRA_PCI_DEV_MAX 4
32	32
33	33	#define UNCORE_EVENT_CONSTRAINT(c, n) EVENT_CONSTRAINT(c, n, 0xff)
34	34

arch/x86/events/intel/uncore_snbep.c+7−3

@@ -1029,6 +1029,7 @@ void snbep_uncore_cpu_init(void) · 1028 unmodified lines
1029	1029	enum {
1030	1030	SNBEP_PCI_QPI_PORT0_FILTER,
1031	1031	SNBEP_PCI_QPI_PORT1_FILTER,
	1032	+ BDX_PCI_QPI_PORT2_FILTER,
1032	1033	HSWEP_PCI_PCU_3,
1033	1034	};
1034	1035
@@ -3286,15 +3287,18 @@ static const struct pci_device_id bdx_uncore_pci_ids[] = { · 2251 unmodified lines
3286	3287	},
3287	3288	{ /* QPI Port 0 filter */
3288	3289	PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6f86),
3289		− .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV, 0),
	3290	+ .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
	3291	+ SNBEP_PCI_QPI_PORT0_FILTER),
3290	3292	},
3291	3293	{ /* QPI Port 1 filter */
3292	3294	PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6f96),
3293		− .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV, 1),
	3295	+ .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
	3296	+ SNBEP_PCI_QPI_PORT1_FILTER),
3294	3297	},
3295	3298	{ /* QPI Port 2 filter */
3296	3299	PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6f46),
3297		− .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV, 2),
	3300	+ .driver_data = UNCORE_PCI_DEV_DATA(UNCORE_EXTRA_PCI_DEV,
	3301	+ BDX_PCI_QPI_PORT2_FILTER),
3298	3302	},
3299	3303	{ /* PCU.3 (for Capability registers) */
3300	3304	PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x6fc0),

arch/x86/hyperv/hv_apic.c+5−0

@@ -114,6 +114,8 @@ static bool __send_ipi_mask_ex(const struct cpumask *mask, int vector) · 113 unmodified lines
114	114	ipi_arg->vp_set.format = HV_GENERIC_SET_SPARSE_4K;
115	115	nr_bank = cpumask_to_vpset(&(ipi_arg->vp_set), mask);
116	116	}
	117	+ if (nr_bank < 0)
	118	+ goto ipi_mask_ex_done;
117	119	if (!nr_bank)
118	120	ipi_arg->vp_set.format = HV_GENERIC_SET_ALL;
119	121
@@ -158,6 +160,9 @@ static bool __send_ipi_mask(const struct cpumask *mask, int vector) · 38 unmodified lines
158	160
159	161	for_each_cpu(cur_cpu, mask) {
160	162	vcpu = hv_cpu_number_to_vp_number(cur_cpu);
	163	+ if (vcpu == VP_INVAL)
	164	+ goto ipi_mask_done;
	165	+
161	166	/*
162	167	* This particular version of the IPI hypercall can
163	168	* only target upto 64 CPUs.

arch/x86/hyperv/hv_init.c+4−1

@@ -265,7 +265,7 @@ void __init hyperv_init(void) · 264 unmodified lines
265	265	{
266	266	u64 guest_id, required_msrs;
267	267	union hv_x64_msr_hypercall_contents hypercall_msr;
268		− int cpuhp;
	268	+ int cpuhp, i;
269	269
270	270	if (x86_hyper_type != X86_HYPER_MS_HYPERV)
271	271	return;
@@ -293,6 +293,9 @@ void __init hyperv_init(void) · 21 unmodified lines
293	293	if (!hv_vp_index)
294	294	return;
295	295
	296	+ for (i = 0; i < num_possible_cpus(); i++)
	297	+ hv_vp_index[i] = VP_INVAL;
	298	+
296	299	hv_vp_assist_page = kcalloc(num_possible_cpus(),
297	300	sizeof(*hv_vp_assist_page), GFP_KERNEL);
298	301	if (!hv_vp_assist_page) {

arch/x86/include/asm/apm.h+0−6

@@ -7,8 +7,6 @@ · 6 unmodified lines
7	7	#ifndef _ASM_X86_MACH_DEFAULT_APM_H
8	8	#define _ASM_X86_MACH_DEFAULT_APM_H
9	9
10		−#include <asm/nospec-branch.h>
11		−
12	10	#ifdef APM_ZERO_SEGS
13	11	# define APM_DO_ZERO_SEGS \
14	12	"pushl %%ds\n\t" \
@@ -34,7 +32,6 @@ static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in, · 19 unmodified lines
34	32	* N.B. We do NOT need a cld after the BIOS call
35	33	* because we always save and restore the flags.
36	34	*/
37		− firmware_restrict_branch_speculation_start();
38	35	__asm__ __volatile__(APM_DO_ZERO_SEGS
39	36	"pushl %%edi\n\t"
40	37	"pushl %%ebp\n\t"
@@ -47,7 +44,6 @@ static inline void apm_bios_call_asm(u32 func, u32 ebx_in, u32 ecx_in, · 6 unmodified lines
47	44	"=S" (*esi)
48	45	: "a" (func), "b" (ebx_in), "c" (ecx_in)
49	46	: "memory", "cc");
50		− firmware_restrict_branch_speculation_end();
51	47	}
52	48
53	49	static inline bool apm_bios_call_simple_asm(u32 func, u32 ebx_in,
@@ -60,7 +56,6 @@ static inline bool apm_bios_call_simple_asm(u32 func, u32 ebx_in, · 6 unmodified lines
60	56	* N.B. We do NOT need a cld after the BIOS call
61	57	* because we always save and restore the flags.
62	58	*/
63		− firmware_restrict_branch_speculation_start();
64	59	__asm__ __volatile__(APM_DO_ZERO_SEGS
65	60	"pushl %%edi\n\t"
66	61	"pushl %%ebp\n\t"
@@ -73,7 +68,6 @@ static inline bool apm_bios_call_simple_asm(u32 func, u32 ebx_in, · 6 unmodified lines
73	68	"=S" (si)
74	69	: "a" (func), "b" (ebx_in), "c" (ecx_in)
75	70	: "memory", "cc");
76		− firmware_restrict_branch_speculation_end();
77	71	return error;
78	72	}
79	73

arch/x86/include/asm/asm.h+59−0

@@ -46,6 +46,65 @@ · 45 unmodified lines
46	46	#define _ASM_SI __ASM_REG(si)
47	47	#define _ASM_DI __ASM_REG(di)
48	48
	49	+#ifndef __x86_64__
	50	+/* 32 bit */
	51	+
	52	+#define _ASM_ARG1 _ASM_AX
	53	+#define _ASM_ARG2 _ASM_DX
	54	+#define _ASM_ARG3 _ASM_CX
	55	+
	56	+#define _ASM_ARG1L eax
	57	+#define _ASM_ARG2L edx
	58	+#define _ASM_ARG3L ecx
	59	+
	60	+#define _ASM_ARG1W ax
	61	+#define _ASM_ARG2W dx
	62	+#define _ASM_ARG3W cx
	63	+
	64	+#define _ASM_ARG1B al
	65	+#define _ASM_ARG2B dl
	66	+#define _ASM_ARG3B cl
	67	+
	68	+#else
	69	+/* 64 bit */
	70	+
	71	+#define _ASM_ARG1 _ASM_DI
	72	+#define _ASM_ARG2 _ASM_SI
	73	+#define _ASM_ARG3 _ASM_DX
	74	+#define _ASM_ARG4 _ASM_CX
	75	+#define _ASM_ARG5 r8
	76	+#define _ASM_ARG6 r9
	77	+
	78	+#define _ASM_ARG1Q rdi
	79	+#define _ASM_ARG2Q rsi
	80	+#define _ASM_ARG3Q rdx
	81	+#define _ASM_ARG4Q rcx
	82	+#define _ASM_ARG5Q r8
	83	+#define _ASM_ARG6Q r9
	84	+
	85	+#define _ASM_ARG1L edi
	86	+#define _ASM_ARG2L esi
	87	+#define _ASM_ARG3L edx
	88	+#define _ASM_ARG4L ecx
	89	+#define _ASM_ARG5L r8d
	90	+#define _ASM_ARG6L r9d
	91	+
	92	+#define _ASM_ARG1W di
	93	+#define _ASM_ARG2W si
	94	+#define _ASM_ARG3W dx
	95	+#define _ASM_ARG4W cx
	96	+#define _ASM_ARG5W r8w
	97	+#define _ASM_ARG6W r9w
	98	+
	99	+#define _ASM_ARG1B dil
	100	+#define _ASM_ARG2B sil
	101	+#define _ASM_ARG3B dl
	102	+#define _ASM_ARG4B cl
	103	+#define _ASM_ARG5B r8b
	104	+#define _ASM_ARG6B r9b
	105	+
	106	+#endif
	107	+
49	108	/*
50	109	* Macros to generate condition code outputs from inline assembly,
51	110	* The output operand must be type "bool".

arch/x86/include/asm/barrier.h+1−1

@@ -38,7 +38,7 @@ static inline unsigned long array_index_mask_nospec(unsigned long index, · 37 unmodified lines
38	38	{
39	39	unsigned long mask;
40	40
41		− asm ("cmp %1,%2; sbb %0,%0;"
	41	+ asm volatile ("cmp %1,%2; sbb %0,%0;"
42	42	:"=r" (mask)
43	43	:"g"(size),"r" (index)
44	44	:"cc");

arch/x86/include/asm/irqflags.h+1−1

@@ -13,7 +13,7 @@ · 12 unmodified lines
13	13	* Interrupt control:
14	14	*/
15	15
16		−static inline unsigned long native_save_fl(void)
	16	+extern inline unsigned long native_save_fl(void)
17	17	{
18	18	unsigned long flags;
19	19

arch/x86/include/asm/mshyperv.h+4−1

@@ -9,6 +9,8 @@ · 8 unmodified lines
9	9	#include <asm/hyperv-tlfs.h>
10	10	#include <asm/nospec-branch.h>
11	11
	12	+#define VP_INVAL U32_MAX
	13	+
12	14	struct ms_hyperv_info {
13	15	u32 features;
14	16	u32 misc_features;
@@ -20,7 +22,6 @@ struct ms_hyperv_info { · 5 unmodified lines
20	22
21	23	extern struct ms_hyperv_info ms_hyperv;
22	24
23		−
24	25	/*
25	26	* Generate the guest ID.
26	27	*/
@@ -281,6 +282,8 @@ static inline int cpumask_to_vpset(struct hv_vpset *vpset, · 254 unmodified lines
281	282	*/
282	283	for_each_cpu(cpu, cpus) {
283	284	vcpu = hv_cpu_number_to_vp_number(cpu);
	285	+ if (vcpu == VP_INVAL)
	286	+ return -1;
284	287	vcpu_bank = vcpu / 64;
285	288	vcpu_offset = vcpu % 64;
286	289	__set_bit(vcpu_offset, (unsigned long *)

arch/x86/include/asm/pgalloc.h+3−0

@@ -184,6 +184,9 @@ static inline p4d_t p4d_alloc_one(struct mm_struct mm, unsigned long addr) · 183 unmodified lines
184	184
185	185	static inline void p4d_free(struct mm_struct mm, p4d_t p4d)
186	186	{
	187	+ if (!pgtable_l5_enabled())
	188	+ return;
	189	+
187	190	BUG_ON((unsigned long)p4d & (PAGE_SIZE-1));
188	191	free_page((unsigned long)p4d);
189	192	}

arch/x86/include/asm/pgtable.h+1−1

@@ -898,7 +898,7 @@ static inline unsigned long pgd_page_vaddr(pgd_t pgd) · 897 unmodified lines
898	898	#define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd))
899	899
900	900	/* to find an entry in a page-table-directory. */
901		−static __always_inline p4d_t p4d_offset(pgd_t pgd, unsigned long address)
	901	+static inline p4d_t p4d_offset(pgd_t pgd, unsigned long address)
902	902	{
903	903	if (!pgtable_l5_enabled())
904	904	return (p4d_t *)pgd;

arch/x86/include/asm/pgtable_64.h+2−2

@@ -216,7 +216,7 @@ static inline pgd_t pti_set_user_pgd(pgd_t *pgdp, pgd_t pgd) · 215 unmodified lines
216	216	}
217	217	#endif
218	218
219		−static __always_inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d)
	219	+static inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d)
220	220	{
221	221	pgd_t pgd;
222	222
@@ -230,7 +230,7 @@ static __always_inline void native_set_p4d(p4d_t *p4dp, p4d_t p4d) · 7 unmodified lines
230	230	*p4dp = native_make_p4d(native_pgd_val(pgd));
231	231	}
232	232
233		−static __always_inline void native_p4d_clear(p4d_t *p4d)
	233	+static inline void native_p4d_clear(p4d_t *p4d)
234	234	{
235	235	native_set_p4d(p4d, native_make_p4d(0));
236	236	}

arch/x86/include/asm/qspinlock_paravirt.h+1−1

@@ -43,7 +43,7 @@ asm (".pushsection .text;" · 42 unmodified lines
43	43	"push %rdx;"
44	44	"mov $0x1,%eax;"
45	45	"xor %edx,%edx;"
46		− "lock cmpxchg %dl,(%rdi);"
	46	+ LOCK_PREFIX "cmpxchg %dl,(%rdi);"
47	47	"cmp $0x1,%al;"
48	48	"jne .slowpath;"
49	49	"pop %rdx;"

arch/x86/include/asm/uaccess_64.h+6−1

@@ -52,7 +52,12 @@ copy_to_user_mcsafe(void to, const void from, unsigned len) · 51 unmodified lines
52	52	unsigned long ret;
53	53
54	54	__uaccess_begin();
55		− ret = memcpy_mcsafe(to, from, len);
	55	+ /*
	56	+ * Note, __memcpy_mcsafe() is explicitly used since it can
	57	+ * handle exceptions / faults. memcpy_mcsafe() may fall back to
	58	+ * memcpy() which lacks this handling.
	59	+ */
	60	+ ret = __memcpy_mcsafe(to, from, len);
56	61	__uaccess_end();
57	62	return ret;
58	63	}

arch/x86/include/asm/vmx.h+3−0

@@ -114,6 +114,7 @@ · 113 unmodified lines
114	114	#define VMX_MISC_PREEMPTION_TIMER_RATE_MASK 0x0000001f
115	115	#define VMX_MISC_SAVE_EFER_LMA 0x00000020
116	116	#define VMX_MISC_ACTIVITY_HLT 0x00000040
	117	+#define VMX_MISC_ZERO_LEN_INS 0x40000000
117	118
118	119	/* VMFUNC functions */
119	120	#define VMX_VMFUNC_EPTP_SWITCHING 0x00000001
@@ -351,11 +352,13 @@ enum vmcs_field { · 231 unmodified lines
351	352	#define VECTORING_INFO_VALID_MASK INTR_INFO_VALID_MASK
352	353
353	354	#define INTR_TYPE_EXT_INTR (0 << 8) /* external interrupt */
	355	+#define INTR_TYPE_RESERVED (1 << 8) /* reserved */
354	356	#define INTR_TYPE_NMI_INTR (2 << 8) /* NMI */
355	357	#define INTR_TYPE_HARD_EXCEPTION (3 << 8) /* processor exception */
356	358	#define INTR_TYPE_SOFT_INTR (4 << 8) /* software interrupt */
357	359	#define INTR_TYPE_PRIV_SW_EXCEPTION (5 << 8) /* ICE breakpoint - undocumented */
358	360	#define INTR_TYPE_SOFT_EXCEPTION (6 << 8) /* software exception */
	361	+#define INTR_TYPE_OTHER_EVENT (7 << 8) /* other event */
359	362
360	363	/* GUEST_INTERRUPTIBILITY_INFO flags. */
361	364	#define GUEST_INTR_STATE_STI 0x00000001

arch/x86/kernel/Makefile+1−0

@@ -61,6 +61,7 @@ obj-y += alternative.o i8253.o hw_breakpoint.o · 60 unmodified lines
61	61	obj-y += tsc.o tsc_msr.o io_delay.o rtc.o
62	62	obj-y += pci-iommu_table.o
63	63	obj-y += resource.o
	64	+obj-y += irqflags.o
64	65
65	66	obj-y += process.o
66	67	obj-y += fpu/

arch/x86/kernel/apic/apic.c+3−0

@@ -573,6 +573,9 @@ static u32 skx_deadline_rev(void) · 572 unmodified lines
573	573	case 0x04: return 0x02000014;
574	574	}
575	575
	576	+ if (boot_cpu_data.x86_stepping > 4)
	577	+ return 0;
	578	+
576	579	return ~0U;
577	580	}
578	581

arch/x86/kernel/apic/x2apic_uv_x.c+57−3

@@ -26,6 +26,7 @@ · 25 unmodified lines
26	26	#include <linux/delay.h>
27	27	#include <linux/crash_dump.h>
28	28	#include <linux/reboot.h>
	29	+#include <linux/memory.h>
29	30
30	31	#include <asm/uv/uv_mmrs.h>
31	32	#include <asm/uv/uv_hub.h>
@@ -392,6 +393,51 @@ extern int uv_hub_info_version(void) · 360 unmodified lines
392	393	}
393	394	EXPORT_SYMBOL(uv_hub_info_version);
394	395
	396	+/* Default UV memory block size is 2GB */
	397	+static unsigned long mem_block_size = (2UL << 30);
	398	+
	399	+/* Kernel parameter to specify UV mem block size */
	400	+static int parse_mem_block_size(char *ptr)
	401	+{
	402	+ unsigned long size = memparse(ptr, NULL);
	403	+
	404	+ /* Size will be rounded down by set_block_size() below */
	405	+ mem_block_size = size;
	406	+ return 0;
	407	+}
	408	+early_param("uv_memblksize", parse_mem_block_size);
	409	+
	410	+static __init int adj_blksize(u32 lgre)
	411	+{
	412	+ unsigned long base = (unsigned long)lgre << UV_GAM_RANGE_SHFT;
	413	+ unsigned long size;
	414	+
	415	+ for (size = mem_block_size; size > MIN_MEMORY_BLOCK_SIZE; size >>= 1)
	416	+ if (IS_ALIGNED(base, size))
	417	+ break;
	418	+
	419	+ if (size >= mem_block_size)
	420	+ return 0;
	421	+
	422	+ mem_block_size = size;
	423	+ return 1;
	424	+}
	425	+
	426	+static __init void set_block_size(void)
	427	+{
	428	+ unsigned int order = ffs(mem_block_size);
	429	+
	430	+ if (order) {
	431	+ /* adjust for ffs return of 1..64 */
	432	+ set_memory_block_size_order(order - 1);
	433	+ pr_info("UV: mem_block_size set to 0x%lx\n", mem_block_size);
	434	+ } else {
	435	+ /* bad or zero value, default to 1UL << 31 (2GB) */
	436	+ pr_err("UV: mem_block_size error with 0x%lx\n", mem_block_size);
	437	+ set_memory_block_size_order(31);
	438	+ }
	439	+}
	440	+
395	441	/* Build GAM range lookup table: */
396	442	static __init void build_uv_gr_table(void)
397	443	{
@@ -1180,23 +1226,30 @@ static void __init decode_gam_rng_tbl(unsigned long ptr) · 782 unmodified lines
1180	1226	<< UV_GAM_RANGE_SHFT);
1181	1227	int order = 0;
1182	1228	char suffix[] = " KMGTPE";
	1229	+ int flag = ' ';
1183	1230
1184	1231	while (size > 9999 && order < sizeof(suffix)) {
1185	1232	size /= 1024;
1186	1233	order++;
1187	1234	}
1188	1235
	1236	+ /* adjust max block size to current range start */
	1237	+ if (gre->type == 1 \|\| gre->type == 2)
	1238	+ if (adj_blksize(lgre))
	1239	+ flag = '*';
	1240	+
1189	1241	if (!index) {
1190	1242	pr_info("UV: GAM Range Table...\n");
1191		− pr_info("UV: # %20s %14s %5s %4s %5s %3s %2s\n", "Range", "", "Size", "Type", "NASID", "SID", "PN");
	1243	+ pr_info("UV: # %20s %14s %6s %4s %5s %3s %2s\n", "Range", "", "Size", "Type", "NASID", "SID", "PN");
1192	1244	}
1193		− pr_info("UV: %2d: 0x%014lx-0x%014lx %5lu%c %3d %04x %02x %02x\n",
	1245	+ pr_info("UV: %2d: 0x%014lx-0x%014lx%c %5lu%c %3d %04x %02x %02x\n",
1194	1246	index++,
1195	1247	(unsigned long)lgre << UV_GAM_RANGE_SHFT,
1196	1248	(unsigned long)gre->limit << UV_GAM_RANGE_SHFT,
1197		− size, suffix[order],
	1249	+ flag, size, suffix[order],
1198	1250	gre->type, gre->nasid, gre->sockid, gre->pnode);
1199	1251
	1252	+ /* update to next range start */
1200	1253	lgre = gre->limit;
1201	1254	if (sock_min > gre->sockid)
1202	1255	sock_min = gre->sockid;
@@ -1427,6 +1480,7 @@ static void __init uv_system_init_hub(void) · 224 unmodified lines
1427	1480
1428	1481	build_socket_tables();
1429	1482	build_uv_gr_table();
	1483	+ set_block_size();
1430	1484	uv_init_hub_info(&hub_info);
1431	1485	uv_possible_blades = num_possible_nodes();
1432	1486	if (!_node_to_pnode)

arch/x86/kernel/apm_32.c+5−0

@@ -240,6 +240,7 @@ · 239 unmodified lines
240	240	#include <asm/olpc.h>
241	241	#include <asm/paravirt.h>
242	242	#include <asm/reboot.h>
	243	+#include <asm/nospec-branch.h>
243	244
244	245	#if defined(CONFIG_APM_DISPLAY_BLANK) && defined(CONFIG_VT)
245	246	extern int (*console_blank_hook)(int);
@@ -614,11 +615,13 @@ static long __apm_bios_call(void *_call) · 368 unmodified lines
614	615	gdt[0x40 / 8] = bad_bios_desc;
615	616
616	617	apm_irq_save(flags);
	618	+ firmware_restrict_branch_speculation_start();
617	619	APM_DO_SAVE_SEGS;
618	620	apm_bios_call_asm(call->func, call->ebx, call->ecx,
619	621	&call->eax, &call->ebx, &call->ecx, &call->edx,
620	622	&call->esi);
621	623	APM_DO_RESTORE_SEGS;
	624	+ firmware_restrict_branch_speculation_end();
622	625	apm_irq_restore(flags);
623	626	gdt[0x40 / 8] = save_desc_40;
624	627	put_cpu();
@@ -690,10 +693,12 @@ static long __apm_bios_call_simple(void *_call) · 65 unmodified lines
690	693	gdt[0x40 / 8] = bad_bios_desc;
691	694
692	695	apm_irq_save(flags);
	696	+ firmware_restrict_branch_speculation_start();
693	697	APM_DO_SAVE_SEGS;
694	698	error = apm_bios_call_simple_asm(call->func, call->ebx, call->ecx,
695	699	&call->eax);
696	700	APM_DO_RESTORE_SEGS;
	701	+ firmware_restrict_branch_speculation_end();
697	702	apm_irq_restore(flags);
698	703	gdt[0x40 / 8] = save_desc_40;
699	704	put_cpu();

arch/x86/kernel/cpu/amd.c+3−1

@@ -543,7 +543,9 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) · 542 unmodified lines
543	543	nodes_per_socket = ((value >> 3) & 7) + 1;
544	544	}
545	545
546		− if (c->x86 >= 0x15 && c->x86 <= 0x17) {
	546	+ if (!boot_cpu_has(X86_FEATURE_AMD_SSBD) &&
	547	+ !boot_cpu_has(X86_FEATURE_VIRT_SSBD) &&
	548	+ c->x86 >= 0x15 && c->x86 <= 0x17) {
547	549	unsigned int bit;
548	550
549	551	switch (c->x86) {

arch/x86/kernel/cpu/bugs.c+9−3

@@ -27,6 +27,7 @@ · 26 unmodified lines
27	27	#include <asm/pgtable.h>
28	28	#include <asm/set_memory.h>
29	29	#include <asm/intel-family.h>
	30	+#include <asm/hypervisor.h>
30	31
31	32	static void __init spectre_v2_select_mitigation(void);
32	33	static void __init ssb_select_mitigation(void);
@@ -154,7 +155,8 @@ x86_virt_spec_ctrl(u64 guest_spec_ctrl, u64 guest_virt_spec_ctrl, bool setguest) · 121 unmodified lines
154	155	guestval \|= guest_spec_ctrl & x86_spec_ctrl_mask;
155	156
156	157	/* SSBD controlled in MSR_SPEC_CTRL */
157		− if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD))
	158	+ if (static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) \|\|
	159	+ static_cpu_has(X86_FEATURE_AMD_SSBD))
158	160	hostval \|= ssbd_tif_to_spec_ctrl(ti->flags);
159	161
160	162	if (hostval != guestval) {
@@ -532,9 +534,10 @@ static enum ssb_mitigation __init __ssb_select_mitigation(void) · 371 unmodified lines
532	534	* Intel uses the SPEC CTRL MSR Bit(2) for this, while AMD may
533	535	* use a completely different MSR and bit dependent on family.
534	536	*/
535		− if (!static_cpu_has(X86_FEATURE_MSR_SPEC_CTRL))
	537	+ if (!static_cpu_has(X86_FEATURE_SPEC_CTRL_SSBD) &&
	538	+ !static_cpu_has(X86_FEATURE_AMD_SSBD)) {
536	539	x86_amd_ssb_disable();
537		− else {
	540	+ } else {
538	541	x86_spec_ctrl_base \|= SPEC_CTRL_SSBD;
539	542	x86_spec_ctrl_mask \|= SPEC_CTRL_SSBD;
540	543	wrmsrl(MSR_IA32_SPEC_CTRL, x86_spec_ctrl_base);
@@ -664,6 +667,9 @@ static ssize_t cpu_show_common(struct device dev, struct device_attribute attr · 123 unmodified lines
664	667	if (boot_cpu_has(X86_FEATURE_PTI))
665	668	return sprintf(buf, "Mitigation: PTI\n");
666	669
	670	+ if (hypervisor_is_type(X86_HYPER_XEN_PV))
	671	+ return sprintf(buf, "Unknown (XEN PV detected, hypervisor mitigation required)\n");
	672	+
667	673	break;
668	674
669	675	case X86_BUG_SPECTRE_V1:

arch/x86/kernel/cpu/cacheinfo.c+1−1

@@ -671,7 +671,7 @@ void cacheinfo_amd_init_llc_id(struct cpuinfo_x86 *c, int cpu, u8 node_id) · 670 unmodified lines
671	671	num_sharing_cache = ((eax >> 14) & 0xfff) + 1;
672	672
673	673	if (num_sharing_cache) {
674		− int bits = get_count_order(num_sharing_cache) - 1;
	674	+ int bits = get_count_order(num_sharing_cache);
675	675
676	676	per_cpu(cpu_llc_id, cpu) = c->apicid >> bits;
677	677	}

arch/x86/kernel/cpu/common.c+3−0

@@ -1,3 +1,6 @@
	1	+/* cpu_feature_enabled() cannot be used this early */
	2	+#define USE_EARLY_PGTABLE_L5
	3	+
1	4	#include <linux/bootmem.h>
2	5	#include <linux/linkage.h>
3	6	#include <linux/bitops.h>

arch/x86/kernel/cpu/mcheck/mce-severity.c+5−0

@@ -160,6 +160,11 @@ static struct severity { · 159 unmodified lines
160	160	SER, MASK(MCI_STATUS_OVER\|MCI_UC_SAR\|MCI_ADDR\|MCACOD, MCI_UC_SAR\|MCI_ADDR\|MCACOD_INSTR),
161	161	USER
162	162	),
	163	+ MCESEV(
	164	+ PANIC, "Data load in unrecoverable area of kernel",
	165	+ SER, MASK(MCI_STATUS_OVER\|MCI_UC_SAR\|MCI_ADDR\|MCACOD, MCI_UC_SAR\|MCI_ADDR\|MCACOD_DATA),
	166	+ KERNEL
	167	+ ),
163	168	#endif
164	169	MCESEV(
165	170	PANIC, "Action required: unknown MCACOD",

arch/x86/kernel/cpu/mcheck/mce.c+28−19

@@ -772,23 +772,25 @@ EXPORT_SYMBOL_GPL(machine_check_poll); · 771 unmodified lines
772	772	static int mce_no_way_out(struct mce m, char msg, unsigned long validp,
773	773	struct pt_regs *regs)
774	774	{
775		− int i, ret = 0;
776	775	char *tmp;
	776	+ int i;
777	777
778	778	for (i = 0; i < mca_cfg.banks; i++) {
779	779	m->status = mce_rdmsrl(msr_ops.status(i));
780		− if (m->status & MCI_STATUS_VAL) {
781		− __set_bit(i, validp);
782		− if (quirk_no_way_out)
783		− quirk_no_way_out(i, m, regs);
784		− }
	780	+ if (!(m->status & MCI_STATUS_VAL))
	781	+ continue;
	782	+
	783	+ __set_bit(i, validp);
	784	+ if (quirk_no_way_out)
	785	+ quirk_no_way_out(i, m, regs);
785	786
786	787	if (mce_severity(m, mca_cfg.tolerant, &tmp, true) >= MCE_PANIC_SEVERITY) {
	788	+ mce_read_aux(m, i);
787	789	*msg = tmp;
788		− ret = 1;
	790	+ return 1;
789	791	}
790	792	}
791		− return ret;
	793	+ return 0;
792	794	}
793	795
794	796	/*
@@ -1205,13 +1207,18 @@ void do_machine_check(struct pt_regs *regs, long error_code) · 410 unmodified lines
1205	1207	lmce = m.mcgstatus & MCG_STATUS_LMCES;
1206	1208
1207	1209	/*
	1210	+ * Local machine check may already know that we have to panic.
	1211	+ * Broadcast machine check begins rendezvous in mce_start()
1208	1212	* Go through all banks in exclusion of the other CPUs. This way we
1209	1213	* don't report duplicated events on shared banks because the first one
1210		− * to see it will clear it. If this is a Local MCE, then no need to
1211		− * perform rendezvous.
	1214	+ * to see it will clear it.
1212	1215	*/
1213		− if (!lmce)
	1216	+ if (lmce) {
	1217	+ if (no_way_out)
	1218	+ mce_panic("Fatal local machine check", &m, msg);
	1219	+ } else {
1214	1220	order = mce_start(&no_way_out);
	1221	+ }
1215	1222
1216	1223	for (i = 0; i < cfg->banks; i++) {
1217	1224	__clear_bit(i, toclear);
@@ -1287,12 +1294,17 @@ void do_machine_check(struct pt_regs *regs, long error_code) · 69 unmodified lines
1287	1294	no_way_out = worst >= MCE_PANIC_SEVERITY;
1288	1295	} else {
1289	1296	/*
1290		− * Local MCE skipped calling mce_reign()
1291		− * If we found a fatal error, we need to panic here.
	1297	+ * If there was a fatal machine check we should have
	1298	+ * already called mce_panic earlier in this function.
	1299	+ * Since we re-read the banks, we might have found
	1300	+ * something new. Check again to see if we found a
	1301	+ * fatal error. We call "mce_severity()" again to
	1302	+ * make sure we have the right "msg".
1292	1303	*/
1293		− if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3)
1294		− mce_panic("Machine check from unknown source",
1295		− NULL, NULL);
	1304	+ if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3) {
	1305	+ mce_severity(&m, cfg->tolerant, &msg, true);
	1306	+ mce_panic("Local fatal machine check!", &m, msg);
	1307	+ }
1296	1308	}
1297	1309
1298	1310	/*
@@ -2153,9 +2165,6 @@ static ssize_t store_int_with_restart(struct device *s, · 854 unmodified lines
2153	2165	if (check_interval == old_check_interval)
2154	2166	return ret;
2155	2167
2156		− if (check_interval < 1)
2157		− check_interval = 1;
2158		−
2159	2168	mutex_lock(&mce_sysfs_mutex);
2160	2169	mce_restart();
2161	2170	mutex_unlock(&mce_sysfs_mutex);

arch/x86/kernel/cpu/microcode/intel.c+4−1

@@ -190,8 +190,11 @@ static void save_microcode_patch(void *data, unsigned int size) · 189 unmodified lines
190	190	p = memdup_patch(data, size);
191	191	if (!p)
192	192	pr_err("Error allocating buffer %p\n", data);
193		− else
	193	+ else {
194	194	list_replace(&iter->plist, &p->plist);
	195	+ kfree(iter->data);
	196	+ kfree(iter);
	197	+ }
195	198	}
196	199	}
197	200

arch/x86/kernel/cpu/mtrr/if.c+2−1

@@ -106,7 +106,8 @@ mtrr_write(struct file file, const char __user buf, size_t len, loff_t * ppos) · 105 unmodified lines
106	106
107	107	memset(line, 0, LINE_SIZE);
108	108
109		− length = strncpy_from_user(line, buf, LINE_SIZE - 1);
	109	+ len = min_t(size_t, len, LINE_SIZE - 1);
	110	+ length = strncpy_from_user(line, buf, len);
110	111	if (length < 0)
111	112	return length;
112	113

arch/x86/kernel/e820.c+12−3

@@ -1248,6 +1248,7 @@ void __init e820__memblock_setup(void) · 1247 unmodified lines
1248	1248	{
1249	1249	int i;
1250	1250	u64 end;
	1251	+ u64 addr = 0;
1251	1252
1252	1253	/*
1253	1254	* The bootstrap memblock region count maximum is 128 entries
@@ -1264,13 +1265,21 @@ void __init e820__memblock_setup(void) · 10 unmodified lines
1264	1265	struct e820_entry *entry = &e820_table->entries[i];
1265	1266
1266	1267	end = entry->addr + entry->size;
	1268	+ if (addr < entry->addr)
	1269	+ memblock_reserve(addr, entry->addr - addr);
	1270	+ addr = end;
1267	1271	if (end != (resource_size_t)end)
1268	1272	continue;
1269	1273
	1274	+ /*
	1275	+ * all !E820_TYPE_RAM ranges (including gap ranges) are put
	1276	+ * into memblock.reserved to make sure that struct pages in
	1277	+ * such regions are not left uninitialized after bootup.
	1278	+ */
1270	1279	if (entry->type != E820_TYPE_RAM && entry->type != E820_TYPE_RESERVED_KERN)
1271		− continue;
1272		−
1273		− memblock_add(entry->addr, entry->size);
	1280	+ memblock_reserve(entry->addr, entry->size);
	1281	+ else
	1282	+ memblock_add(entry->addr, entry->size);
1274	1283	}
1275	1284
1276	1285	/* Throw away partial pages: */

arch/x86/kernel/head64.c+1−1

@@ -44,7 +44,7 @@ static unsigned int __initdata next_early_pgt; · 43 unmodified lines
44	44	pmdval_t early_pmd_flags = __PAGE_KERNEL_LARGE & ~(_PAGE_GLOBAL \| _PAGE_NX);
45	45
46	46	#ifdef CONFIG_X86_5LEVEL
47		−unsigned int __pgtable_l5_enabled __initdata;
	47	+unsigned int __pgtable_l5_enabled __ro_after_init;
48	48	unsigned int pgdir_shift __ro_after_init = 39;
49	49	EXPORT_SYMBOL(pgdir_shift);
50	50	unsigned int ptrs_per_p4d __ro_after_init = 1;

arch/x86/kernel/irqflags.S+26−0

@@ -0,0 +1,26 @@
	1	+/* SPDX-License-Identifier: GPL-2.0 */
	2	+
	3	+#include <asm/asm.h>
	4	+#include <asm/export.h>
	5	+#include <linux/linkage.h>
	6	+
	7	+/*
	8	+ * unsigned long native_save_fl(void)
	9	+ */
	10	+ENTRY(native_save_fl)
	11	+ pushf
	12	+ pop %_ASM_AX
	13	+ ret
	14	+ENDPROC(native_save_fl)
	15	+EXPORT_SYMBOL(native_save_fl)
	16	+
	17	+/*
	18	+ * void native_restore_fl(unsigned long flags)
	19	+ * %eax/%rdi: flags
	20	+ */
	21	+ENTRY(native_restore_fl)
	22	+ push %_ASM_ARG1
	23	+ popf
	24	+ ret
	25	+ENDPROC(native_restore_fl)
	26	+EXPORT_SYMBOL(native_restore_fl)

arch/x86/kernel/kvmclock.c+6−6

@@ -138,6 +138,7 @@ static unsigned long kvm_get_tsc_khz(void) · 137 unmodified lines
138	138	src = &hv_clock[cpu].pvti;
139	139	tsc_khz = pvclock_tsc_khz(src);
140	140	put_cpu();
	141	+ setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ);
141	142	return tsc_khz;
142	143	}
143	144
@@ -319,6 +320,8 @@ void __init kvmclock_init(void) · 175 unmodified lines
319	320	printk(KERN_INFO "kvm-clock: Using msrs %x and %x",
320	321	msr_kvm_system_time, msr_kvm_wall_clock);
321	322
	323	+ pvclock_set_pvti_cpu0_va(hv_clock);
	324	+
322	325	if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT))
323	326	pvclock_set_flags(PVCLOCK_TSC_STABLE_BIT);
324	327
@@ -366,14 +369,11 @@ int __init kvm_setup_vsyscall_timeinfo(void) · 41 unmodified lines
366	369	vcpu_time = &hv_clock[cpu].pvti;
367	370	flags = pvclock_read_flags(vcpu_time);
368	371
369		− if (!(flags & PVCLOCK_TSC_STABLE_BIT)) {
370		− put_cpu();
371		− return 1;
372		− }
373		−
374		− pvclock_set_pvti_cpu0_va(hv_clock);
375	372	put_cpu();
376	373
	374	+ if (!(flags & PVCLOCK_TSC_STABLE_BIT))
	375	+ return 1;
	376	+
377	377	kvm_clock.archdata.vclock_mode = VCLOCK_PVCLOCK;
378	378	#endif
379	379	return 0;

arch/x86/kernel/quirks.c+9−2

@@ -645,12 +645,19 @@ static void quirk_intel_brickland_xeon_ras_cap(struct pci_dev *pdev) · 644 unmodified lines
645	645	/* Skylake */
646	646	static void quirk_intel_purley_xeon_ras_cap(struct pci_dev *pdev)
647	647	{
648		− u32 capid0;
	648	+ u32 capid0, capid5;
649	649
650	650	pci_read_config_dword(pdev, 0x84, &capid0);
	651	+ pci_read_config_dword(pdev, 0x98, &capid5);
651	652
652		− if ((capid0 & 0xc0) == 0xc0)
	653	+ /*
	654	+ * CAPID0{7:6} indicate whether this is an advanced RAS SKU
	655	+ * CAPID5{8:5} indicate that various NVDIMM usage modes are
	656	+ * enabled, so memory machine check recovery is also enabled.
	657	+ */
	658	+ if ((capid0 & 0xc0) == 0xc0 \|\| (capid5 & 0x1e0))
653	659	static_branch_inc(&mcsafe_key);
	660	+
654	661	}
655	662	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x0ec3, quirk_intel_brickland_xeon_ras_cap);
656	663	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2fc0, quirk_intel_brickland_xeon_ras_cap);

arch/x86/kernel/signal.c+1−1

@@ -692,7 +692,7 @@ setup_rt_frame(struct ksignal ksig, struct pt_regs regs) · 691 unmodified lines
692	692	* Increment event counter and perform fixup for the pre-signal
693	693	* frame.
694	694	*/
695		− rseq_signal_deliver(regs);
	695	+ rseq_signal_deliver(ksig, regs);
696	696
697	697	/* Set up the stack frame */
698	698	if (is_ia32_frame(ksig)) {

arch/x86/kernel/smpboot.c+5−0

@@ -221,6 +221,11 @@ static void notrace start_secondary(void *unused) · 220 unmodified lines
221	221	#ifdef CONFIG_X86_32
222	222	/* switch away from the initial page table */
223	223	load_cr3(swapper_pg_dir);
	224	+ /*
	225	+ * Initialize the CR4 shadow before doing anything that could
	226	+ * try to read it.
	227	+ */
	228	+ cr4_init_shadow();
224	229	__flush_tlb_all();
225	230	#endif
226	231	load_current_idt();

arch/x86/kernel/traps.c+8−6

@@ -835,16 +835,18 @@ static void math_error(struct pt_regs *regs, int error_code, int trapnr) · 834 unmodified lines
835	835	char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
836	836	"simd exception";
837	837
838		− if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
839		− return;
840	838	cond_local_irq_enable(regs);
841	839
842	840	if (!user_mode(regs)) {
843		− if (!fixup_exception(regs, trapnr)) {
844		− task->thread.error_code = error_code;
845		− task->thread.trap_nr = trapnr;
	841	+ if (fixup_exception(regs, trapnr))
	842	+ return;
	843	+
	844	+ task->thread.error_code = error_code;
	845	+ task->thread.trap_nr = trapnr;
	846	+
	847	+ if (notify_die(DIE_TRAP, str, regs, error_code,
	848	+ trapnr, SIGFPE) != NOTIFY_STOP)
846	849	die(str, regs, error_code);
847		− }
848	850	return;
849	851	}
850	852

arch/x86/kernel/uprobes.c+1−1

@@ -293,7 +293,7 @@ static int uprobe_init_insn(struct arch_uprobe auprobe, struct insn insn, bool · 292 unmodified lines
293	293	insn_init(insn, auprobe->insn, sizeof(auprobe->insn), x86_64);
294	294	/* has the side-effect of processing the entire instruction */
295	295	insn_get_length(insn);
296		− if (WARN_ON_ONCE(!insn_complete(insn)))
	296	+ if (!insn_complete(insn))
297	297	return -ENOEXEC;
298	298
299	299	if (is_prefix_bad(insn))

arch/x86/kvm/Kconfig+1−1

@@ -85,7 +85,7 @@ config KVM_AMD_SEV · 84 unmodified lines
85	85	def_bool y
86	86	bool "AMD Secure Encrypted Virtualization (SEV) support"
87	87	depends on KVM_AMD && X86_64
88		− depends on CRYPTO_DEV_CCP && CRYPTO_DEV_CCP_DD && CRYPTO_DEV_SP_PSP
	88	+ depends on CRYPTO_DEV_SP_PSP && !(KVM_AMD=y && CRYPTO_DEV_CCP_DD=m)
89	89	---help---
90	90	Provides support for launching Encrypted VMs on AMD processors.
91	91

arch/x86/kvm/mmu.c+1−1

@@ -890,7 +890,7 @@ static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache, · 889 unmodified lines
890	890	if (cache->nobjs >= min)
891	891	return 0;
892	892	while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
893		− page = (void *)__get_free_page(GFP_KERNEL);
	893	+ page = (void *)__get_free_page(GFP_KERNEL_ACCOUNT);
894	894	if (!page)
895	895	return -ENOMEM;
896	896	cache->objects[cache->nobjs++] = page;

arch/x86/kvm/vmx.c+119−31

@@ -1705,6 +1705,17 @@ static inline bool nested_cpu_has_vmwrite_any_field(struct kvm_vcpu *vcpu) · 1704 unmodified lines
1705	1705	MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS;
1706	1706	}
1707	1707
	1708	+static inline bool nested_cpu_has_zero_length_injection(struct kvm_vcpu *vcpu)
	1709	+{
	1710	+ return to_vmx(vcpu)->nested.msrs.misc_low & VMX_MISC_ZERO_LEN_INS;
	1711	+}
	1712	+
	1713	+static inline bool nested_cpu_supports_monitor_trap_flag(struct kvm_vcpu *vcpu)
	1714	+{
	1715	+ return to_vmx(vcpu)->nested.msrs.procbased_ctls_high &
	1716	+ CPU_BASED_MONITOR_TRAP_FLAG;
	1717	+}
	1718	+
1708	1719	static inline bool nested_cpu_has(struct vmcs12 *vmcs12, u32 bit)
1709	1720	{
1710	1721	return vmcs12->cpu_based_vm_exec_control & bit;
@@ -2560,6 +2571,7 @@ static void vmx_save_host_state(struct kvm_vcpu *vcpu) · 849 unmodified lines
2560	2571	struct vcpu_vmx *vmx = to_vmx(vcpu);
2561	2572	#ifdef CONFIG_X86_64
2562	2573	int cpu = raw_smp_processor_id();
	2574	+ unsigned long fs_base, kernel_gs_base;
2563	2575	#endif
2564	2576	int i;
2565	2577
@@ -2575,12 +2587,20 @@ static void vmx_save_host_state(struct kvm_vcpu *vcpu) · 9 unmodified lines
2575	2587	vmx->host_state.gs_ldt_reload_needed = vmx->host_state.ldt_sel;
2576	2588
2577	2589	#ifdef CONFIG_X86_64
2578		− save_fsgs_for_kvm();
2579		− vmx->host_state.fs_sel = current->thread.fsindex;
2580		− vmx->host_state.gs_sel = current->thread.gsindex;
2581		−#else
2582		− savesegment(fs, vmx->host_state.fs_sel);
2583		− savesegment(gs, vmx->host_state.gs_sel);
	2590	+ if (likely(is_64bit_mm(current->mm))) {
	2591	+ save_fsgs_for_kvm();
	2592	+ vmx->host_state.fs_sel = current->thread.fsindex;
	2593	+ vmx->host_state.gs_sel = current->thread.gsindex;
	2594	+ fs_base = current->thread.fsbase;
	2595	+ kernel_gs_base = current->thread.gsbase;
	2596	+ } else {
	2597	+#endif
	2598	+ savesegment(fs, vmx->host_state.fs_sel);
	2599	+ savesegment(gs, vmx->host_state.gs_sel);
	2600	+#ifdef CONFIG_X86_64
	2601	+ fs_base = read_msr(MSR_FS_BASE);
	2602	+ kernel_gs_base = read_msr(MSR_KERNEL_GS_BASE);
	2603	+ }
2584	2604	#endif
2585	2605	if (!(vmx->host_state.fs_sel & 7)) {
2586	2606	vmcs_write16(HOST_FS_SELECTOR, vmx->host_state.fs_sel);
@@ -2600,10 +2620,10 @@ static void vmx_save_host_state(struct kvm_vcpu *vcpu) · 13 unmodified lines
2600	2620	savesegment(ds, vmx->host_state.ds_sel);
2601	2621	savesegment(es, vmx->host_state.es_sel);
2602	2622
2603		− vmcs_writel(HOST_FS_BASE, current->thread.fsbase);
	2623	+ vmcs_writel(HOST_FS_BASE, fs_base);
2604	2624	vmcs_writel(HOST_GS_BASE, cpu_kernelmode_gs_base(cpu));
2605	2625
2606		− vmx->msr_host_kernel_gs_base = current->thread.gsbase;
	2626	+ vmx->msr_host_kernel_gs_base = kernel_gs_base;
2607	2627	if (is_long_mode(&vmx->vcpu))
2608	2628	wrmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base);
2609	2629	#else
@@ -4311,11 +4331,7 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf) · 1701 unmodified lines
4311	4331	vmcs_conf->order = get_order(vmcs_conf->size);
4312	4332	vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff;
4313	4333
4314		− /* KVM supports Enlightened VMCS v1 only */
4315		− if (static_branch_unlikely(&enable_evmcs))
4316		− vmcs_conf->revision_id = KVM_EVMCS_VERSION;
4317		− else
4318		− vmcs_conf->revision_id = vmx_msr_low;
	4334	+ vmcs_conf->revision_id = vmx_msr_low;
4319	4335
4320	4336	vmcs_conf->pin_based_exec_ctrl = _pin_based_exec_control;
4321	4337	vmcs_conf->cpu_based_exec_ctrl = _cpu_based_exec_control;
@@ -4385,7 +4401,13 @@ static struct vmcs *alloc_vmcs_cpu(int cpu) · 63 unmodified lines
4385	4401	return NULL;
4386	4402	vmcs = page_address(pages);
4387	4403	memset(vmcs, 0, vmcs_config.size);
4388		− vmcs->revision_id = vmcs_config.revision_id; /* vmcs revision id */
	4404	+
	4405	+ /* KVM supports Enlightened VMCS v1 only */
	4406	+ if (static_branch_unlikely(&enable_evmcs))
	4407	+ vmcs->revision_id = KVM_EVMCS_VERSION;
	4408	+ else
	4409	+ vmcs->revision_id = vmcs_config.revision_id;
	4410	+
4389	4411	return vmcs;
4390	4412	}
4391	4413
@@ -4553,6 +4575,19 @@ static __init int alloc_kvm_area(void) · 161 unmodified lines
4553	4575	return -ENOMEM;
4554	4576	}
4555	4577
	4578	+ /*
	4579	+ * When eVMCS is enabled, alloc_vmcs_cpu() sets
	4580	+ * vmcs->revision_id to KVM_EVMCS_VERSION instead of
	4581	+ * revision_id reported by MSR_IA32_VMX_BASIC.
	4582	+ *
	4583	+ * However, even though not explictly documented by
	4584	+ * TLFS, VMXArea passed as VMXON argument should
	4585	+ * still be marked with revision_id reported by
	4586	+ * physical CPU.
	4587	+ */
	4588	+ if (static_branch_unlikely(&enable_evmcs))
	4589	+ vmcs->revision_id = vmcs_config.revision_id;
	4590	+
4556	4591	per_cpu(vmxarea, cpu) = vmcs;
4557	4592	}
4558	4593	return 0;
@@ -7858,6 +7893,8 @@ static int enter_vmx_operation(struct kvm_vcpu *vcpu) · 3299 unmodified lines
7858	7893	HRTIMER_MODE_REL_PINNED);
7859	7894	vmx->nested.preemption_timer.function = vmx_preemption_timer_fn;
7860	7895
	7896	+ vmx->nested.vpid02 = allocate_vpid();
	7897	+
7861	7898	vmx->nested.vmxon = true;
7862	7899	return 0;
7863	7900
@@ -8445,21 +8482,20 @@ static int handle_vmptrld(struct kvm_vcpu *vcpu) · 581 unmodified lines
8445	8482	/* Emulate the VMPTRST instruction */
8446	8483	static int handle_vmptrst(struct kvm_vcpu *vcpu)
8447	8484	{
8448		− unsigned long exit_qualification = vmcs_readl(EXIT_QUALIFICATION);
8449		− u32 vmx_instruction_info = vmcs_read32(VMX_INSTRUCTION_INFO);
8450		− gva_t vmcs_gva;
	8485	+ unsigned long exit_qual = vmcs_readl(EXIT_QUALIFICATION);
	8486	+ u32 instr_info = vmcs_read32(VMX_INSTRUCTION_INFO);
	8487	+ gpa_t current_vmptr = to_vmx(vcpu)->nested.current_vmptr;
8451	8488	struct x86_exception e;
	8489	+ gva_t gva;
8452	8490
8453	8491	if (!nested_vmx_check_permission(vcpu))
8454	8492	return 1;
8455	8493
8456		− if (get_vmx_mem_address(vcpu, exit_qualification,
8457		− vmx_instruction_info, true, &vmcs_gva))
	8494	+ if (get_vmx_mem_address(vcpu, exit_qual, instr_info, true, &gva))
8458	8495	return 1;
8459	8496	/* _system ok, nested_vmx_check_permission has verified cpl=0 /
8460		− if (kvm_write_guest_virt_system(vcpu, vmcs_gva,
8461		− (void *)&to_vmx(vcpu)->nested.current_vmptr,
8462		− sizeof(u64), &e)) {
	8497	+ if (kvm_write_guest_virt_system(vcpu, gva, (void *)&current_vmptr,
	8498	+ sizeof(gpa_t), &e)) {
8463	8499	kvm_inject_page_fault(vcpu, &e);
8464	8500	return 1;
8465	8501	}
@@ -10335,11 +10371,9 @@ static struct kvm_vcpu vmx_create_vcpu(struct kvm kvm, unsigned int id) · 1869 unmodified lines
10335	10371	goto free_vmcs;
10336	10372	}
10337	10373
10338		− if (nested) {
	10374	+ if (nested)
10339	10375	nested_vmx_setup_ctls_msrs(&vmx->nested.msrs,
10340	10376	kvm_vcpu_apicv_active(&vmx->vcpu));
10341		− vmx->nested.vpid02 = allocate_vpid();
10342		− }
10343	10377
10344	10378	vmx->nested.posted_intr_nv = -1;
10345	10379	vmx->nested.current_vmptr = -1ull;
@@ -10356,7 +10390,6 @@ static struct kvm_vcpu vmx_create_vcpu(struct kvm kvm, unsigned int id) · 10 unmodified lines
10356	10390	return &vmx->vcpu;
10357	10391
10358	10392	free_vmcs:
10359		− free_vpid(vmx->nested.vpid02);
10360	10393	free_loaded_vmcs(vmx->loaded_vmcs);
10361	10394	free_msrs:
10362	10395	kfree(vmx->guest_msrs);
@@ -11620,6 +11653,62 @@ static int check_vmentry_prereqs(struct kvm_vcpu vcpu, struct vmcs12 vmcs12) · 1257 unmodified lines
11620	11653	!nested_cr3_valid(vcpu, vmcs12->host_cr3))
11621	11654	return VMXERR_ENTRY_INVALID_HOST_STATE_FIELD;
11622	11655
	11656	+ /*
	11657	+ * From the Intel SDM, volume 3:
	11658	+ * Fields relevant to VM-entry event injection must be set properly.
	11659	+ * These fields are the VM-entry interruption-information field, the
	11660	+ * VM-entry exception error code, and the VM-entry instruction length.
	11661	+ */
	11662	+ if (vmcs12->vm_entry_intr_info_field & INTR_INFO_VALID_MASK) {
	11663	+ u32 intr_info = vmcs12->vm_entry_intr_info_field;
	11664	+ u8 vector = intr_info & INTR_INFO_VECTOR_MASK;
	11665	+ u32 intr_type = intr_info & INTR_INFO_INTR_TYPE_MASK;
	11666	+ bool has_error_code = intr_info & INTR_INFO_DELIVER_CODE_MASK;
	11667	+ bool should_have_error_code;
	11668	+ bool urg = nested_cpu_has2(vmcs12,
	11669	+ SECONDARY_EXEC_UNRESTRICTED_GUEST);
	11670	+ bool prot_mode = !urg \|\| vmcs12->guest_cr0 & X86_CR0_PE;
	11671	+
	11672	+ /* VM-entry interruption-info field: interruption type */
	11673	+ if (intr_type == INTR_TYPE_RESERVED \|\|
	11674	+ (intr_type == INTR_TYPE_OTHER_EVENT &&
	11675	+ !nested_cpu_supports_monitor_trap_flag(vcpu)))
	11676	+ return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
	11677	+
	11678	+ /* VM-entry interruption-info field: vector */
	11679	+ if ((intr_type == INTR_TYPE_NMI_INTR && vector != NMI_VECTOR) \|\|
	11680	+ (intr_type == INTR_TYPE_HARD_EXCEPTION && vector > 31) \|\|
	11681	+ (intr_type == INTR_TYPE_OTHER_EVENT && vector != 0))
	11682	+ return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
	11683	+
	11684	+ /* VM-entry interruption-info field: deliver error code */
	11685	+ should_have_error_code =
	11686	+ intr_type == INTR_TYPE_HARD_EXCEPTION && prot_mode &&
	11687	+ x86_exception_has_error_code(vector);
	11688	+ if (has_error_code != should_have_error_code)
	11689	+ return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
	11690	+
	11691	+ /* VM-entry exception error code */
	11692	+ if (has_error_code &&
	11693	+ vmcs12->vm_entry_exception_error_code & GENMASK(31, 15))
	11694	+ return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
	11695	+
	11696	+ /* VM-entry interruption-info field: reserved bits */
	11697	+ if (intr_info & INTR_INFO_RESVD_BITS_MASK)
	11698	+ return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
	11699	+
	11700	+ /* VM-entry instruction length */
	11701	+ switch (intr_type) {
	11702	+ case INTR_TYPE_SOFT_EXCEPTION:
	11703	+ case INTR_TYPE_SOFT_INTR:
	11704	+ case INTR_TYPE_PRIV_SW_EXCEPTION:
	11705	+ if ((vmcs12->vm_entry_instruction_len > 15) \|\|
	11706	+ (vmcs12->vm_entry_instruction_len == 0 &&
	11707	+ !nested_cpu_has_zero_length_injection(vcpu)))
	11708	+ return VMXERR_ENTRY_INVALID_CONTROL_FIELD;
	11709	+ }
	11710	+ }
	11711	+
11623	11712	return 0;
11624	11713	}
11625	11714
@@ -11686,7 +11775,6 @@ static int enter_vmx_non_root_mode(struct kvm_vcpu *vcpu) · 60 unmodified lines
11686	11775	{
11687	11776	struct vcpu_vmx *vmx = to_vmx(vcpu);
11688	11777	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
11689		− u32 msr_entry_idx;
11690	11778	u32 exit_qual;
11691	11779	int r;
11692	11780
@@ -11708,10 +11796,10 @@ static int enter_vmx_non_root_mode(struct kvm_vcpu *vcpu) · 15 unmodified lines
11708	11796	nested_get_vmcs12_pages(vcpu, vmcs12);
11709	11797
11710	11798	r = EXIT_REASON_MSR_LOAD_FAIL;
11711		− msr_entry_idx = nested_vmx_load_msr(vcpu,
11712		− vmcs12->vm_entry_msr_load_addr,
11713		− vmcs12->vm_entry_msr_load_count);
11714		− if (msr_entry_idx)
	11799	+ exit_qual = nested_vmx_load_msr(vcpu,
	11800	+ vmcs12->vm_entry_msr_load_addr,
	11801	+ vmcs12->vm_entry_msr_load_count);
	11802	+ if (exit_qual)
11715	11803	goto fail;
11716	11804
11717	11805	/*

arch/x86/kvm/x86.c+3−1

@@ -1097,6 +1097,7 @@ static u32 msr_based_features[] = { · 1096 unmodified lines
1097	1097
1098	1098	MSR_F10H_DECFG,
1099	1099	MSR_IA32_UCODE_REV,
	1100	+ MSR_IA32_ARCH_CAPABILITIES,
1100	1101	};
1101	1102
1102	1103	static unsigned int num_msr_based_features;
@@ -1105,7 +1106,8 @@ static int kvm_get_msr_feature(struct kvm_msr_entry *msr) · 2 unmodified lines
1105	1106	{
1106	1107	switch (msr->index) {
1107	1108	case MSR_IA32_UCODE_REV:
1108		− rdmsrl(msr->index, msr->data);
	1109	+ case MSR_IA32_ARCH_CAPABILITIES:
	1110	+ rdmsrl_safe(msr->index, &msr->data);
1109	1111	break;
1110	1112	default:
1111	1113	if (kvm_x86_ops->get_msr_feature(msr))

arch/x86/kvm/x86.h+9−0

@@ -110,6 +110,15 @@ static inline bool is_la57_mode(struct kvm_vcpu *vcpu) · 109 unmodified lines
110	110	#endif
111	111	}
112	112
	113	+static inline bool x86_exception_has_error_code(unsigned int vector)
	114	+{
	115	+ static u32 exception_has_error_code = BIT(DF_VECTOR) \| BIT(TS_VECTOR) \|
	116	+ BIT(NP_VECTOR) \| BIT(SS_VECTOR) \| BIT(GP_VECTOR) \|
	117	+ BIT(PF_VECTOR) \| BIT(AC_VECTOR);
	118	+
	119	+ return (1U << vector) & exception_has_error_code;
	120	+}
	121	+
113	122	static inline bool mmu_is_nested(struct kvm_vcpu *vcpu)
114	123	{
115	124	return vcpu->arch.walk_mmu == &vcpu->arch.nested_mmu;

arch/x86/mm/fault.c+7−14

@@ -641,11 +641,6 @@ static int is_f00f_bug(struct pt_regs *regs, unsigned long address) · 640 unmodified lines
641	641	return 0;
642	642	}
643	643
644		−static const char nx_warning[] = KERN_CRIT
645		−"kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n";
646		−static const char smep_warning[] = KERN_CRIT
647		−"unable to execute userspace code (SMEP?) (uid: %d)\n";
648		−
649	644	static void
650	645	show_fault_oops(struct pt_regs *regs, unsigned long error_code,
651	646	unsigned long address)
@@ -664,20 +659,18 @@ show_fault_oops(struct pt_regs *regs, unsigned long error_code, · 12 unmodified lines
664	659	pte = lookup_address_in_pgd(pgd, address, &level);
665	660
666	661	if (pte && pte_present(pte) && !pte_exec(pte))
667		− printk(nx_warning, from_kuid(&init_user_ns, current_uid()));
	662	+ pr_crit("kernel tried to execute NX-protected page - exploit attempt? (uid: %d)\n",
	663	+ from_kuid(&init_user_ns, current_uid()));
668	664	if (pte && pte_present(pte) && pte_exec(pte) &&
669	665	(pgd_flags(*pgd) & _PAGE_USER) &&
670	666	(__read_cr4() & X86_CR4_SMEP))
671		− printk(smep_warning, from_kuid(&init_user_ns, current_uid()));
	667	+ pr_crit("unable to execute userspace code (SMEP?) (uid: %d)\n",
	668	+ from_kuid(&init_user_ns, current_uid()));
672	669	}
673	670
674		− printk(KERN_ALERT "BUG: unable to handle kernel ");
675		− if (address < PAGE_SIZE)
676		− printk(KERN_CONT "NULL pointer dereference");
677		− else
678		− printk(KERN_CONT "paging request");
679		−
680		− printk(KERN_CONT " at %px\n", (void *) address);
	671	+ pr_alert("BUG: unable to handle kernel %s at %px\n",
	672	+ address < PAGE_SIZE ? "NULL pointer dereference" : "paging request",
	673	+ (void *)address);
681	674
682	675	dump_pagetable(address);
683	676	}

arch/x86/mm/init_64.c+16−4

@@ -1350,16 +1350,28 @@ int kern_addr_valid(unsigned long addr) · 1349 unmodified lines
1350	1350	/* Amount of ram needed to start using large blocks */
1351	1351	#define MEM_SIZE_FOR_LARGE_BLOCK (64UL << 30)
1352	1352
	1353	+/* Adjustable memory block size */
	1354	+static unsigned long set_memory_block_size;
	1355	+int __init set_memory_block_size_order(unsigned int order)
	1356	+{
	1357	+ unsigned long size = 1UL << order;
	1358	+
	1359	+ if (size > MEM_SIZE_FOR_LARGE_BLOCK \|\| size < MIN_MEMORY_BLOCK_SIZE)
	1360	+ return -EINVAL;
	1361	+
	1362	+ set_memory_block_size = size;
	1363	+ return 0;
	1364	+}
	1365	+
1353	1366	static unsigned long probe_memory_block_size(void)
1354	1367	{
1355	1368	unsigned long boot_mem_end = max_pfn << PAGE_SHIFT;
1356	1369	unsigned long bz;
1357	1370
1358		− /* If this is UV system, always set 2G block size */
1359		− if (is_uv_system()) {
1360		− bz = MAX_BLOCK_SIZE;
	1371	+ /* If memory block size has been set, then use it */
	1372	+ bz = set_memory_block_size;
	1373	+ if (bz)
1361	1374	goto done;
1362		− }
1363	1375
1364	1376	/* Use regular block if RAM is smaller than MEM_SIZE_FOR_LARGE_BLOCK */
1365	1377	if (boot_mem_end < MEM_SIZE_FOR_LARGE_BLOCK) {

arch/x86/net/bpf_jit_comp32.c+4−4

@@ -1441,8 +1441,8 @@ static void emit_prologue(u8 **pprog, u32 stack_depth) · 1440 unmodified lines
1441	1441
1442	1442	/* sub esp,STACK_SIZE */
1443	1443	EMIT2_off32(0x81, 0xEC, STACK_SIZE);
1444		− /* sub ebp,SCRATCH_SIZE+4+12*/
1445		− EMIT3(0x83, add_1reg(0xE8, IA32_EBP), SCRATCH_SIZE + 16);
	1444	+ /* sub ebp,SCRATCH_SIZE+12*/
	1445	+ EMIT3(0x83, add_1reg(0xE8, IA32_EBP), SCRATCH_SIZE + 12);
1446	1446	/* xor ebx,ebx */
1447	1447	EMIT2(0x31, add_2reg(0xC0, IA32_EBX, IA32_EBX));
1448	1448
@@ -1475,8 +1475,8 @@ static void emit_epilogue(u8 **pprog, u32 stack_depth) · 26 unmodified lines
1475	1475	/* mov edx,dword ptr [ebp+off]*/
1476	1476	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r0[1]));
1477	1477
1478		− /* add ebp,SCRATCH_SIZE+4+12*/
1479		− EMIT3(0x83, add_1reg(0xC0, IA32_EBP), SCRATCH_SIZE + 16);
	1478	+ /* add ebp,SCRATCH_SIZE+12*/
	1479	+ EMIT3(0x83, add_1reg(0xC0, IA32_EBP), SCRATCH_SIZE + 12);
1480	1480
1481	1481	/* mov ebx,dword ptr [ebp-12]*/
1482	1482	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), -12);

arch/x86/platform/efi/efi_64.c+3−3

@@ -166,14 +166,14 @@ void __init efi_call_phys_epilog(pgd_t *save_pgd) · 165 unmodified lines
166	166	pgd = pgd_offset_k(pgd_idx * PGDIR_SIZE);
167	167	set_pgd(pgd_offset_k(pgd_idx * PGDIR_SIZE), save_pgd[pgd_idx]);
168	168
169		− if (!(pgd_val(*pgd) & _PAGE_PRESENT))
	169	+ if (!pgd_present(*pgd))
170	170	continue;
171	171
172	172	for (i = 0; i < PTRS_PER_P4D; i++) {
173	173	p4d = p4d_offset(pgd,
174	174	pgd_idx * PGDIR_SIZE + i * P4D_SIZE);
175	175
176		− if (!(p4d_val(*p4d) & _PAGE_PRESENT))
	176	+ if (!p4d_present(*p4d))
177	177	continue;
178	178
179	179	pud = (pud_t )p4d_page_vaddr(p4d);
@@ -417,7 +417,7 @@ static void __init __map_region(efi_memory_desc_t *md, u64 va) · 237 unmodified lines
417	417	if (!(md->attribute & EFI_MEMORY_WB))
418	418	flags \|= _PAGE_PCD;
419	419
420		− if (sev_active())
	420	+ if (sev_active() && md->type != EFI_MEMORY_MAPPED_IO)
421	421	flags \|= _PAGE_ENC;
422	422
423	423	pfn = md->phys_addr >> PAGE_SHIFT;

arch/x86/purgatory/Makefile+1−1

@@ -6,7 +6,7 @@ purgatory-y := purgatory.o stack.o setup-x86_$(BITS).o sha256.o entry64.o string · 5 unmodified lines
6	6	targets += $(purgatory-y)
7	7	PURGATORY_OBJS = $(addprefix $(obj)/,$(purgatory-y))
8	8
9		−$(obj)/sha256.o: $(srctree)/lib/sha256.c
	9	+$(obj)/sha256.o: $(srctree)/lib/sha256.c FORCE
10	10	$(call if_changed_rule,cc_o_c)
11	11
12	12	LDFLAGS_purgatory.ro := -e purgatory_start -r --no-undefined -nostdlib -z nodefaultlib

arch/x86/um/mem_32.c+1−1

@@ -16,7 +16,7 @@ static int __init gate_vma_init(void) · 15 unmodified lines
16	16	if (!FIXADDR_USER_START)
17	17	return 0;
18	18
19		− gate_vma.vm_mm = NULL;
	19	+ vma_init(&gate_vma, NULL);
20	20	gate_vma.vm_start = FIXADDR_USER_START;
21	21	gate_vma.vm_end = FIXADDR_USER_END;
22	22	gate_vma.vm_flags = VM_READ \| VM_MAYREAD \| VM_EXEC \| VM_MAYEXEC;

arch/x86/xen/enlighten.c+7−0

@@ -64,6 +64,13 @@ struct shared_info xen_dummy_shared_info; · 63 unmodified lines
64	64	__read_mostly int xen_have_vector_callback;
65	65	EXPORT_SYMBOL_GPL(xen_have_vector_callback);
66	66
	67	+/*
	68	+ * NB: needs to live in .data because it's used by xen_prepare_pvh which runs
	69	+ * before clearing the bss.
	70	+ */
	71	+uint32_t xen_start_flags __attribute__((section(".data"))) = 0;
	72	+EXPORT_SYMBOL(xen_start_flags);
	73	+
67	74	/*
68	75	* Point at some empty memory to start with. We map the real shared_info
69	76	* page as soon as fixmap is up and running.

arch/x86/xen/enlighten_pv.c+13−13

@@ -1203,15 +1203,24 @@ asmlinkage __visible void __init xen_start_kernel(void) · 1202 unmodified lines
1203	1203	return;
1204	1204
1205	1205	xen_domain_type = XEN_PV_DOMAIN;
	1206	+ xen_start_flags = xen_start_info->flags;
1206	1207
1207	1208	xen_setup_features();
1208	1209
1209		− xen_setup_machphys_mapping();
1210		−
1211	1210	/* Install Xen paravirt ops */
1212	1211	pv_info = xen_info;
1213	1212	pv_init_ops.patch = paravirt_patch_default;
1214	1213	pv_cpu_ops = xen_cpu_ops;
	1214	+ xen_init_irq_ops();
	1215	+
	1216	+ /*
	1217	+ * Setup xen_vcpu early because it is needed for
	1218	+ * local_irq_disable(), irqs_disabled(), e.g. in printk().
	1219	+ *
	1220	+ * Don't do the full vcpu_info placement stuff until we have
	1221	+ * the cpu_possible_mask and a non-dummy shared_info.
	1222	+ */
	1223	+ xen_vcpu_info_reset(0);
1215	1224
1216	1225	x86_platform.get_nmi_reason = xen_get_nmi_reason;
1217	1226
@@ -1224,10 +1233,12 @@ asmlinkage __visible void __init xen_start_kernel(void) · 6 unmodified lines
1224	1233	* Set up some pagetable state before starting to set any ptes.
1225	1234	*/
1226	1235
	1236	+ xen_setup_machphys_mapping();
1227	1237	xen_init_mmu_ops();
1228	1238
1229	1239	/* Prevent unwanted bits from being set in PTEs. */
1230	1240	__supported_pte_mask &= ~_PAGE_GLOBAL;
	1241	+ __default_kernel_pte_mask &= ~_PAGE_GLOBAL;
1231	1242
1232	1243	/*
1233	1244	* Prevent page tables from being allocated in highmem, even
@@ -1248,20 +1259,9 @@ asmlinkage __visible void __init xen_start_kernel(void) · 14 unmodified lines
1248	1259	get_cpu_cap(&boot_cpu_data);
1249	1260	x86_configure_nx();
1250	1261
1251		− xen_init_irq_ops();
1252		−
1253	1262	/* Let's presume PV guests always boot on vCPU with id 0. */
1254	1263	per_cpu(xen_vcpu_id, 0) = 0;
1255	1264
1256		− /*
1257		− * Setup xen_vcpu early because idt_setup_early_handler needs it for
1258		− * local_irq_disable(), irqs_disabled().
1259		− *
1260		− * Don't do the full vcpu_info placement stuff until we have
1261		− * the cpu_possible_mask and a non-dummy shared_info.
1262		− */
1263		− xen_vcpu_info_reset(0);
1264		−
1265	1265	idt_setup_early_handler();
1266	1266
1267	1267	xen_init_capabilities();

arch/x86/xen/enlighten_pvh.c+1−0

@@ -97,6 +97,7 @@ void __init xen_prepare_pvh(void) · 96 unmodified lines
97	97	}
98	98
99	99	xen_pvh = 1;
	100	+ xen_start_flags = pvh_start_info.flags;
100	101
101	102	msr = cpuid_ebx(xen_cpuid_base() + 2);
102	103	pfn = __pa(hypercall_page);

arch/x86/xen/irq.c+1−3

@@ -128,8 +128,6 @@ static const struct pv_irq_ops xen_irq_ops __initconst = { · 127 unmodified lines
128	128
129	129	void __init xen_init_irq_ops(void)
130	130	{
131		− /* For PVH we use default pv_irq_ops settings. */
132		− if (!xen_feature(XENFEAT_hvm_callback_vector))
133		− pv_irq_ops = xen_irq_ops;
	131	+ pv_irq_ops = xen_irq_ops;
134	132	x86_init.irqs.intr_init = xen_init_IRQ;
135	133	}

arch/x86/xen/smp_pv.c+5−0

@@ -32,6 +32,7 @@ · 31 unmodified lines
32	32	#include <xen/interface/vcpu.h>
33	33	#include <xen/interface/xenpmu.h>
34	34
	35	+#include <asm/spec-ctrl.h>
35	36	#include <asm/xen/interface.h>
36	37	#include <asm/xen/hypercall.h>
37	38
@@ -70,6 +71,8 @@ static void cpu_bringup(void) · 32 unmodified lines
70	71	cpu_data(cpu).x86_max_cores = 1;
71	72	set_cpu_sibling_map(cpu);
72	73
	74	+ speculative_store_bypass_ht_init();
	75	+
73	76	xen_setup_cpu_clockevents();
74	77
75	78	notify_cpu_starting(cpu);
@@ -250,6 +253,8 @@ static void __init xen_pv_smp_prepare_cpus(unsigned int max_cpus) · 174 unmodified lines
250	253	}
251	254	set_cpu_sibling_map(0);
252	255
	256	+ speculative_store_bypass_ht_init();
	257	+
253	258	xen_pmu_init(0);
254	259
255	260	if (xen_smp_intr_init(0) \|\| xen_smp_intr_init_pv(0))

block/bio.c+41−16

@@ -903,25 +903,27 @@ int bio_add_page(struct bio bio, struct page page, · 902 unmodified lines
903	903	EXPORT_SYMBOL(bio_add_page);
904	904
905	905	/**
906		− * bio_iov_iter_get_pages - pin user or kernel pages and add them to a bio
	906	+ * __bio_iov_iter_get_pages - pin user or kernel pages and add them to a bio
907	907	* @bio: bio to add pages to
908	908	* @iter: iov iterator describing the region to be mapped
909	909	*
910		− * Pins as many pages from *iter and appends them to @bio's bvec array. The
	910	+ * Pins pages from *iter and appends them to @bio's bvec array. The
911	911	* pages will have to be released using put_page() when done.
	912	+ * For multi-segment *iter, this function only adds pages from the
	913	+ * the next non-empty segment of the iov iterator.
912	914	*/
913		−int bio_iov_iter_get_pages(struct bio bio, struct iov_iter iter)
	915	+static int __bio_iov_iter_get_pages(struct bio bio, struct iov_iter iter)
914	916	{
915		− unsigned short nr_pages = bio->bi_max_vecs - bio->bi_vcnt;
	917	+ unsigned short nr_pages = bio->bi_max_vecs - bio->bi_vcnt, idx;
916	918	struct bio_vec *bv = bio->bi_io_vec + bio->bi_vcnt;
917	919	struct page pages = (struct page )bv;
918		− size_t offset, diff;
	920	+ size_t offset;
919	921	ssize_t size;
920	922
921	923	size = iov_iter_get_pages(iter, pages, LONG_MAX, nr_pages, &offset);
922	924	if (unlikely(size <= 0))
923	925	return size ? size : -EFAULT;
924		− nr_pages = (size + offset + PAGE_SIZE - 1) / PAGE_SIZE;
	926	+ idx = nr_pages = (size + offset + PAGE_SIZE - 1) / PAGE_SIZE;
925	927
926	928	/*
927	929	* Deep magic below: We need to walk the pinned pages backwards
@@ -934,21 +936,46 @@ int bio_iov_iter_get_pages(struct bio bio, struct iov_iter iter) · 6 unmodified lines
934	936	bio->bi_iter.bi_size += size;
935	937	bio->bi_vcnt += nr_pages;
936	938
937		− diff = (nr_pages * PAGE_SIZE - offset) - size;
938		− while (nr_pages--) {
939		− bv[nr_pages].bv_page = pages[nr_pages];
940		− bv[nr_pages].bv_len = PAGE_SIZE;
941		− bv[nr_pages].bv_offset = 0;
	939	+ while (idx--) {
	940	+ bv[idx].bv_page = pages[idx];
	941	+ bv[idx].bv_len = PAGE_SIZE;
	942	+ bv[idx].bv_offset = 0;
942	943	}
943	944
944	945	bv[0].bv_offset += offset;
945	946	bv[0].bv_len -= offset;
946		− if (diff)
947		− bv[bio->bi_vcnt - 1].bv_len -= diff;
	947	+ bv[nr_pages - 1].bv_len -= nr_pages * PAGE_SIZE - offset - size;
948	948
949	949	iov_iter_advance(iter, size);
950	950	return 0;
951	951	}
	952	+
	953	+/**
	954	+ * bio_iov_iter_get_pages - pin user or kernel pages and add them to a bio
	955	+ * @bio: bio to add pages to
	956	+ * @iter: iov iterator describing the region to be mapped
	957	+ *
	958	+ * Pins pages from *iter and appends them to @bio's bvec array. The
	959	+ * pages will have to be released using put_page() when done.
	960	+ * The function tries, but does not guarantee, to pin as many pages as
	961	+ * fit into the bio, or are requested in *iter, whatever is smaller.
	962	+ * If MM encounters an error pinning the requested pages, it stops.
	963	+ * Error is returned only if 0 pages could be pinned.
	964	+ */
	965	+int bio_iov_iter_get_pages(struct bio bio, struct iov_iter iter)
	966	+{
	967	+ unsigned short orig_vcnt = bio->bi_vcnt;
	968	+
	969	+ do {
	970	+ int ret = __bio_iov_iter_get_pages(bio, iter);
	971	+
	972	+ if (unlikely(ret))
	973	+ return bio->bi_vcnt > orig_vcnt ? 0 : ret;
	974	+
	975	+ } while (iov_iter_count(iter) && !bio_full(bio));
	976	+
	977	+ return 0;
	978	+}
952	979	EXPORT_SYMBOL_GPL(bio_iov_iter_get_pages);
953	980
954	981	static void submit_bio_wait_endio(struct bio *bio)
@@ -1807,9 +1834,6 @@ again: · 852 unmodified lines
1807	1834	if (!bio_integrity_endio(bio))
1808	1835	return;
1809	1836
1810		− if (WARN_ONCE(bio->bi_next, "driver left bi_next not NULL"))
1811		− bio->bi_next = NULL;
1812		−
1813	1837	/*
1814	1838	* Need to have a real endio function for chained bios, otherwise
1815	1839	* various corner cases will break (like stacking block devices that
@@ -1869,6 +1893,7 @@ struct bio bio_split(struct bio bio, int sectors, · 53 unmodified lines
1869	1893	bio_integrity_trim(split);
1870	1894
1871	1895	bio_advance(bio, split->bi_iter.bi_size);
	1896	+ bio->bi_iter.bi_done = 0;
1872	1897
1873	1898	if (bio_flagged(bio, BIO_TRACE_COMPLETION))
1874	1899	bio_set_flag(split, BIO_TRACE_COMPLETION);

block/blk-core.c+8−9

@@ -273,10 +273,6 @@ static void req_bio_endio(struct request rq, struct bio bio, · 272 unmodified lines
273	273	bio_advance(bio, nbytes);
274	274
275	275	/* don't actually finish bio if it's part of flush sequence */
276		− /*
277		− * XXX this code looks suspicious - it's not consistent with advancing
278		− * req->bio in caller
279		− */
280	276	if (bio->bi_iter.bi_size == 0 && !(rq->rq_flags & RQF_FLUSH_SEQ))
281	277	bio_endio(bio);
282	278	}
@@ -2159,11 +2155,12 @@ static inline bool bio_check_ro(struct bio bio, struct hd_struct part) · 1876 unmodified lines
2159	2155	if (part->policy && op_is_write(bio_op(bio))) {
2160	2156	char b[BDEVNAME_SIZE];
2161	2157
2162		− printk(KERN_ERR
	2158	+ WARN_ONCE(1,
2163	2159	"generic_make_request: Trying to write "
2164	2160	"to read-only block-device %s (partno %d)\n",
2165	2161	bio_devname(bio, b), part->partno);
2166		− return true;
	2162	+ /* Older lvm-tools actually trigger this */
	2163	+ return false;
2167	2164	}
2168	2165
2169	2166	return false;
@@ -3081,10 +3078,8 @@ bool blk_update_request(struct request *req, blk_status_t error, · 911 unmodified lines
3081	3078	struct bio *bio = req->bio;
3082	3079	unsigned bio_bytes = min(bio->bi_iter.bi_size, nr_bytes);
3083	3080
3084		− if (bio_bytes == bio->bi_iter.bi_size) {
	3081	+ if (bio_bytes == bio->bi_iter.bi_size)
3085	3082	req->bio = bio->bi_next;
3086		− bio->bi_next = NULL;
3087		− }
3088	3083
3089	3084	/* Completion has already been traced */
3090	3085	bio_clear_flag(bio, BIO_TRACE_COMPLETION);
@@ -3479,6 +3474,10 @@ static void __blk_rq_prep_clone(struct request dst, struct request src) · 388 unmodified lines
3479	3474	dst->cpu = src->cpu;
3480	3475	dst->__sector = blk_rq_pos(src);
3481	3476	dst->__data_len = blk_rq_bytes(src);
	3477	+ if (src->rq_flags & RQF_SPECIAL_PAYLOAD) {
	3478	+ dst->rq_flags \|= RQF_SPECIAL_PAYLOAD;
	3479	+ dst->special_vec = src->special_vec;
	3480	+ }
3482	3481	dst->nr_phys_segments = src->nr_phys_segments;
3483	3482	dst->ioprio = src->ioprio;
3484	3483	dst->extra_len = src->extra_len;

block/blk-mq-debugfs.c+1−1

@@ -356,7 +356,7 @@ static const char *const blk_mq_rq_state_name_array[] = { · 355 unmodified lines
356	356
357	357	static const char *blk_mq_rq_state_name(enum mq_rq_state rq_state)
358	358	{
359		− if (WARN_ON_ONCE((unsigned int)rq_state >
	359	+ if (WARN_ON_ONCE((unsigned int)rq_state >=
360	360	ARRAY_SIZE(blk_mq_rq_state_name_array)))
361	361	return "(?)";
362	362	return blk_mq_rq_state_name_array[rq_state];

block/blk-mq-tag.c+1−1

@@ -271,7 +271,7 @@ static bool bt_tags_iter(struct sbitmap bitmap, unsigned int bitnr, void data) · 270 unmodified lines
271	271	* test and set the bit before assining ->rqs[].
272	272	*/
273	273	rq = tags->rqs[bitnr];
274		− if (rq && blk_mq_rq_state(rq) == MQ_RQ_IN_FLIGHT)
	274	+ if (rq && blk_mq_request_started(rq))
275	275	iter_data->fn(rq, iter_data->data, reserved);
276	276
277	277	return true;

block/blk-mq.c+13−4

@@ -558,10 +558,8 @@ static void __blk_mq_complete_request(struct request *rq) · 557 unmodified lines
558	558	bool shared = false;
559	559	int cpu;
560	560
561		− if (cmpxchg(&rq->state, MQ_RQ_IN_FLIGHT, MQ_RQ_COMPLETE) !=
562		− MQ_RQ_IN_FLIGHT)
	561	+ if (!blk_mq_mark_complete(rq))
563	562	return;
564		−
565	563	if (rq->internal_tag != -1)
566	564	blk_mq_sched_completed_request(rq);
567	565
@@ -781,7 +779,6 @@ static void blk_mq_rq_timed_out(struct request *req, bool reserved) · 213 unmodified lines
781	779	WARN_ON_ONCE(ret != BLK_EH_RESET_TIMER);
782	780	}
783	781
784		− req->rq_flags &= ~RQF_TIMED_OUT;
785	782	blk_add_timer(req);
786	783	}
787	784
@@ -1076,6 +1073,9 @@ static bool blk_mq_mark_tag_wait(struct blk_mq_hw_ctx **hctx, · 288 unmodified lines
1076	1073
1077	1074	#define BLK_MQ_RESOURCE_DELAY 3 /* ms units */
1078	1075
	1076	+/*
	1077	+ * Returns true if we did some work AND can potentially do more.
	1078	+ */
1079	1079	bool blk_mq_dispatch_rq_list(struct request_queue q, struct list_head list,
1080	1080	bool got_budget)
1081	1081	{
@@ -1206,8 +1206,17 @@ bool blk_mq_dispatch_rq_list(struct request_queue q, struct list_head list, · 124 unmodified lines
1206	1206	blk_mq_run_hw_queue(hctx, true);
1207	1207	else if (needs_restart && (ret == BLK_STS_RESOURCE))
1208	1208	blk_mq_delay_run_hw_queue(hctx, BLK_MQ_RESOURCE_DELAY);
	1209	+
	1210	+ return false;
1209	1211	}
1210	1212
	1213	+ /*
	1214	+ * If the host/device is unable to accept more work, inform the
	1215	+ * caller of that.
	1216	+ */
	1217	+ if (ret == BLK_STS_RESOURCE \|\| ret == BLK_STS_DEV_RESOURCE)
	1218	+ return false;
	1219	+
1211	1220	return (queued + errors) != 0;
1212	1221	}
1213	1222

block/blk-softirq.c+1−0

@@ -144,6 +144,7 @@ do_local: · 143 unmodified lines
144	144
145	145	local_irq_restore(flags);
146	146	}
	147	+EXPORT_SYMBOL(__blk_complete_request);
147	148
148	149	/**
149	150	* blk_complete_request - end I/O on a request

block/blk-timeout.c+1−0

@@ -210,6 +210,7 @@ void blk_add_timer(struct request *req) · 209 unmodified lines
210	210	if (!req->timeout)
211	211	req->timeout = q->rq_timeout;
212	212
	213	+ req->rq_flags &= ~RQF_TIMED_OUT;
213	214	blk_rq_set_deadline(req, jiffies + req->timeout);
214	215
215	216	/*

block/bsg.c+0−2

@@ -267,8 +267,6 @@ bsg_map_hdr(struct request_queue q, struct sg_io_v4 hdr, fmode_t mode) · 266 unmodified lines
267	267	} else if (hdr->din_xfer_len) {
268	268	ret = blk_rq_map_user(q, rq, NULL, uptr64(hdr->din_xferp),
269	269	hdr->din_xfer_len, GFP_KERNEL);
270		− } else {
271		− ret = blk_rq_map_user(q, rq, NULL, NULL, 0, GFP_KERNEL);
272	270	}
273	271
274	272	if (ret)

block/sed-opal.c+2−2

@@ -877,7 +877,7 @@ static size_t response_get_string(const struct parsed_resp *resp, int n, · 876 unmodified lines
877	877	return 0;
878	878	}
879	879
880		− if (n > resp->num) {
	880	+ if (n >= resp->num) {
881	881	pr_debug("Response has %d tokens. Can't access %d\n",
882	882	resp->num, n);
883	883	return 0;
@@ -916,7 +916,7 @@ static u64 response_get_u64(const struct parsed_resp *resp, int n) · 32 unmodified lines
916	916	return 0;
917	917	}
918	918
919		− if (n > resp->num) {
	919	+ if (n >= resp->num) {
920	920	pr_debug("Response has %d tokens. Can't access %d\n",
921	921	resp->num, n);
922	922	return 0;

certs/blacklist.h+1−1

@@ -1,3 +1,3 @@
1	1	#include <linux/kernel.h>
2	2
3		−extern const char __initdata *const blacklist_hashes[];
	3	+extern const char __initconst *const blacklist_hashes[];

crypto/af_alg.c+13−4

@@ -1060,12 +1060,19 @@ void af_alg_async_cb(struct crypto_async_request *_req, int err) · 1059 unmodified lines
1060	1060	}
1061	1061	EXPORT_SYMBOL_GPL(af_alg_async_cb);
1062	1062
1063		−__poll_t af_alg_poll_mask(struct socket *sock, __poll_t events)
	1063	+/**
	1064	+ * af_alg_poll - poll system call handler
	1065	+ */
	1066	+__poll_t af_alg_poll(struct file file, struct socket sock,
	1067	+ poll_table *wait)
1064	1068	{
1065	1069	struct sock *sk = sock->sk;
1066	1070	struct alg_sock *ask = alg_sk(sk);
1067	1071	struct af_alg_ctx *ctx = ask->private;
1068		− __poll_t mask = 0;
	1072	+ __poll_t mask;
	1073	+
	1074	+ sock_poll_wait(file, sk_sleep(sk), wait);
	1075	+ mask = 0;
1069	1076
1070	1077	if (!ctx->more \|\| ctx->used)
1071	1078	mask \|= EPOLLIN \| EPOLLRDNORM;
@@ -1075,7 +1082,7 @@ __poll_t af_alg_poll_mask(struct socket *sock, __poll_t events) · 3 unmodified lines
1075	1082
1076	1083	return mask;
1077	1084	}
1078		−EXPORT_SYMBOL_GPL(af_alg_poll_mask);
	1085	+EXPORT_SYMBOL_GPL(af_alg_poll);
1079	1086
1080	1087	/**
1081	1088	* af_alg_alloc_areq - allocate struct af_alg_async_req
@@ -1148,8 +1155,10 @@ int af_alg_get_rsgl(struct sock sk, struct msghdr msg, int flags, · 66 unmodified lines
1148	1155
1149	1156	/* make one iovec available as scatterlist */
1150	1157	err = af_alg_make_sg(&rsgl->sgl, &msg->msg_iter, seglen);
1151		− if (err < 0)
	1158	+ if (err < 0) {
	1159	+ rsgl->sg_num_bytes = 0;
1152	1160	return err;
	1161	+ }
1153	1162
1154	1163	/* chain the new scatterlist with previous one */
1155	1164	if (areq->last_rsgl)

crypto/algif_aead.c+2−2

@@ -375,7 +375,7 @@ static struct proto_ops algif_aead_ops = { · 374 unmodified lines
375	375	.sendmsg = aead_sendmsg,
376	376	.sendpage = af_alg_sendpage,
377	377	.recvmsg = aead_recvmsg,
378		− .poll_mask = af_alg_poll_mask,
	378	+ .poll = af_alg_poll,
379	379	};
380	380
381	381	static int aead_check_key(struct socket *sock)
@@ -471,7 +471,7 @@ static struct proto_ops algif_aead_ops_nokey = { · 89 unmodified lines
471	471	.sendmsg = aead_sendmsg_nokey,
472	472	.sendpage = aead_sendpage_nokey,
473	473	.recvmsg = aead_recvmsg_nokey,
474		− .poll_mask = af_alg_poll_mask,
	474	+ .poll = af_alg_poll,
475	475	};
476	476
477	477	static void aead_bind(const char name, u32 type, u32 mask)

crypto/algif_skcipher.c+2−2

@@ -206,7 +206,7 @@ static struct proto_ops algif_skcipher_ops = { · 205 unmodified lines
206	206	.sendmsg = skcipher_sendmsg,
207	207	.sendpage = af_alg_sendpage,
208	208	.recvmsg = skcipher_recvmsg,
209		− .poll_mask = af_alg_poll_mask,
	209	+ .poll = af_alg_poll,
210	210	};
211	211
212	212	static int skcipher_check_key(struct socket *sock)
@@ -302,7 +302,7 @@ static struct proto_ops algif_skcipher_ops_nokey = { · 89 unmodified lines
302	302	.sendmsg = skcipher_sendmsg_nokey,
303	303	.sendpage = skcipher_sendpage_nokey,
304	304	.recvmsg = skcipher_recvmsg_nokey,
305		− .poll_mask = af_alg_poll_mask,
	305	+ .poll = af_alg_poll,
306	306	};
307	307
308	308	static void skcipher_bind(const char name, u32 type, u32 mask)

crypto/asymmetric_keys/x509_cert_parser.c+9−0

@@ -249,6 +249,15 @@ int x509_note_signature(void *context, size_t hdrlen, · 248 unmodified lines
249	249	return -EINVAL;
250	250	}
251	251
	252	+ if (strcmp(ctx->cert->sig->pkey_algo, "rsa") == 0) {
	253	+ /* Discard the BIT STRING metadata */
	254	+ if (vlen < 1 \|\| (const u8 )value != 0)
	255	+ return -EBADMSG;
	256	+
	257	+ value++;
	258	+ vlen--;
	259	+ }
	260	+
252	261	ctx->cert->raw_sig = value;
253	262	ctx->cert->raw_sig_size = vlen;
254	263	return 0;

crypto/morus640.c+2−1

@@ -274,8 +274,9 @@ static void crypto_morus640_decrypt_chunk(struct morus640_state state, u8 dst, · 273 unmodified lines
274	274	union morus640_block_in tail;
275	275
276	276	memcpy(tail.bytes, src, size);
	277	+ memset(tail.bytes + size, 0, MORUS640_BLOCK_SIZE - size);
277	278
278		− crypto_morus640_load_a(&m, src);
	279	+ crypto_morus640_load_a(&m, tail.bytes);
279	280	crypto_morus640_core(state, &m);
280	281	crypto_morus640_store_a(tail.bytes, &m);
281	282	memset(tail.bytes + size, 0, MORUS640_BLOCK_SIZE - size);

crypto/sha3_generic.c+1−1

@@ -152,7 +152,7 @@ static SHA3_INLINE void keccakf_round(u64 st[25]) · 151 unmodified lines
152	152	st[24] ^= bc[ 4];
153	153	}
154	154
155		−static void __optimize("O3") keccakf(u64 st[25])
	155	+static void keccakf(u64 st[25])
156	156	{
157	157	int round;
158	158

drivers/acpi/acpi_lpss.c+13−1

@@ -22,6 +22,7 @@ · 21 unmodified lines
22	22	#include <linux/pm_domain.h>
23	23	#include <linux/pm_runtime.h>
24	24	#include <linux/pwm.h>
	25	+#include <linux/suspend.h>
25	26	#include <linux/delay.h>
26	27
27	28	#include "internal.h"
@@ -878,6 +879,7 @@ static void acpi_lpss_dismiss(struct device *dev) · 850 unmodified lines
878	879	#define LPSS_GPIODEF0_DMA_LLP BIT(13)
879	880
880	881	static DEFINE_MUTEX(lpss_iosf_mutex);
	882	+static bool lpss_iosf_d3_entered;
881	883
882	884	static void lpss_iosf_enter_d3_state(void)
883	885	{
@@ -920,6 +922,9 @@ static void lpss_iosf_enter_d3_state(void) · 36 unmodified lines
920	922
921	923	iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
922	924	LPSS_IOSF_GPIODEF0, value1, mask1);
	925	+
	926	+ lpss_iosf_d3_entered = true;
	927	+
923	928	exit:
924	929	mutex_unlock(&lpss_iosf_mutex);
925	930	}
@@ -934,6 +939,11 @@ static void lpss_iosf_exit_d3_state(void) · 8 unmodified lines
934	939
935	940	mutex_lock(&lpss_iosf_mutex);
936	941
	942	+ if (!lpss_iosf_d3_entered)
	943	+ goto exit;
	944	+
	945	+ lpss_iosf_d3_entered = false;
	946	+
937	947	iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
938	948	LPSS_IOSF_GPIODEF0, value1, mask1);
939	949
@@ -943,6 +953,7 @@ static void lpss_iosf_exit_d3_state(void) · 3 unmodified lines
943	953	iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
944	954	LPSS_IOSF_PMCSR, value2, mask2);
945	955
	956	+exit:
946	957	mutex_unlock(&lpss_iosf_mutex);
947	958	}
948	959
@@ -961,7 +972,8 @@ static int acpi_lpss_suspend(struct device *dev, bool wakeup) · 12 unmodified lines
961	972	* wrong status for devices being about to be powered off. See
962	973	* lpss_iosf_enter_d3_state() for further information.
963	974	*/
964		− if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
	975	+ if (acpi_target_system_state() == ACPI_STATE_S0 &&
	976	+ lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
965	977	lpss_iosf_enter_d3_state();
966	978
967	979	return ret;

drivers/acpi/acpica/hwsleep.c+11−4

@@ -51,16 +51,23 @@ acpi_status acpi_hw_legacy_sleep(u8 sleep_state) · 50 unmodified lines
51	51	return_ACPI_STATUS(status);
52	52	}
53	53
54		− /*
55		− * 1) Disable all GPEs
56		− * 2) Enable all wakeup GPEs
57		− */
	54	+ /* Disable all GPEs */
58	55	status = acpi_hw_disable_all_gpes();
59	56	if (ACPI_FAILURE(status)) {
60	57	return_ACPI_STATUS(status);
61	58	}
	59	+ /*
	60	+ * If the target sleep state is S5, clear all GPEs and fixed events too
	61	+ */
	62	+ if (sleep_state == ACPI_STATE_S5) {
	63	+ status = acpi_hw_clear_acpi_status();
	64	+ if (ACPI_FAILURE(status)) {
	65	+ return_ACPI_STATUS(status);
	66	+ }
	67	+ }
62	68	acpi_gbl_system_awake_and_running = FALSE;
63	69
	70	+ /* Enable all wakeup GPEs */
64	71	status = acpi_hw_enable_all_wakeup_gpes();
65	72	if (ACPI_FAILURE(status)) {
66	73	return_ACPI_STATUS(status);

drivers/acpi/acpica/psloop.c+31−0

@@ -497,6 +497,18 @@ acpi_status acpi_ps_parse_loop(struct acpi_walk_state *walk_state) · 496 unmodified lines
497	497	status =
498	498	acpi_ps_create_op(walk_state, aml_op_start, &op);
499	499	if (ACPI_FAILURE(status)) {
	500	+ /*
	501	+ * ACPI_PARSE_MODULE_LEVEL means that we are loading a table by
	502	+ * executing it as a control method. However, if we encounter
	503	+ * an error while loading the table, we need to keep trying to
	504	+ * load the table rather than aborting the table load. Set the
	505	+ * status to AE_OK to proceed with the table load.
	506	+ */
	507	+ if ((walk_state->
	508	+ parse_flags & ACPI_PARSE_MODULE_LEVEL)
	509	+ && status == AE_ALREADY_EXISTS) {
	510	+ status = AE_OK;
	511	+ }
500	512	if (status == AE_CTRL_PARSE_CONTINUE) {
501	513	continue;
502	514	}
@@ -694,6 +706,25 @@ acpi_status acpi_ps_parse_loop(struct acpi_walk_state *walk_state) · 191 unmodified lines
694	706	acpi_ps_next_parse_state(walk_state, op, status);
695	707	if (status == AE_CTRL_PENDING) {
696	708	status = AE_OK;
	709	+ } else
	710	+ if ((walk_state->
	711	+ parse_flags & ACPI_PARSE_MODULE_LEVEL)
	712	+ && status != AE_CTRL_TRANSFER
	713	+ && ACPI_FAILURE(status)) {
	714	+ /*
	715	+ * ACPI_PARSE_MODULE_LEVEL flag means that we are currently
	716	+ * loading a table by executing it as a control method.
	717	+ * However, if we encounter an error while loading the table,
	718	+ * we need to keep trying to load the table rather than
	719	+ * aborting the table load (setting the status to AE_OK
	720	+ * continues the table load). If we get a failure at this
	721	+ * point, it means that the dispatcher got an error while
	722	+ * processing Op (most likely an AML operand error) or a
	723	+ * control method was called from module level and the
	724	+ * dispatcher returned AE_CTRL_TRANSFER. In the latter case,
	725	+ * leave the status alone, there's nothing wrong with it.
	726	+ */
	727	+ status = AE_OK;
697	728	}
698	729	}
699	730

drivers/acpi/acpica/uterror.c+3−3

@@ -182,19 +182,19 @@ acpi_ut_prefixed_namespace_error(const char *module_name, · 181 unmodified lines
182	182	switch (lookup_status) {
183	183	case AE_ALREADY_EXISTS:
184	184
185		− acpi_os_printf("\n" ACPI_MSG_BIOS_ERROR);
	185	+ acpi_os_printf(ACPI_MSG_BIOS_ERROR);
186	186	message = "Failure creating";
187	187	break;
188	188
189	189	case AE_NOT_FOUND:
190	190
191		− acpi_os_printf("\n" ACPI_MSG_BIOS_ERROR);
	191	+ acpi_os_printf(ACPI_MSG_BIOS_ERROR);
192	192	message = "Could not resolve";
193	193	break;
194	194
195	195	default:
196	196
197		− acpi_os_printf("\n" ACPI_MSG_ERROR);
	197	+ acpi_os_printf(ACPI_MSG_ERROR);
198	198	message = "Failure resolving";
199	199	break;
200	200	}

drivers/acpi/battery.c+5−4

@@ -717,10 +717,11 @@ void battery_hook_register(struct acpi_battery_hook *hook) · 716 unmodified lines
717	717	*/
718	718	pr_err("extension failed to load: %s", hook->name);
719	719	__battery_hook_unregister(hook, 0);
720		− return;
	720	+ goto end;
721	721	}
722	722	}
723	723	pr_info("new extension: %s\n", hook->name);
	724	+end:
724	725	mutex_unlock(&hook_mutex);
725	726	}
726	727	EXPORT_SYMBOL_GPL(battery_hook_register);
@@ -732,7 +733,7 @@ EXPORT_SYMBOL_GPL(battery_hook_register); · 5 unmodified lines
732	733	*/
733	734	static void battery_hook_add_battery(struct acpi_battery *battery)
734	735	{
735		− struct acpi_battery_hook *hook_node;
	736	+ struct acpi_battery_hook hook_node, tmp;
736	737
737	738	mutex_lock(&hook_mutex);
738	739	INIT_LIST_HEAD(&battery->list);
@@ -744,15 +745,15 @@ static void battery_hook_add_battery(struct acpi_battery *battery) · 5 unmodified lines
744	745	* when a battery gets hotplugged or initialized
745	746	* during the battery module initialization.
746	747	*/
747		− list_for_each_entry(hook_node, &battery_hook_list, list) {
	748	+ list_for_each_entry_safe(hook_node, tmp, &battery_hook_list, list) {
748	749	if (hook_node->add_battery(battery->bat)) {
749	750	/*
750	751	* The notification of the extensions has failed, to
751	752	* prevent further errors we will unload the extension.
752	753	*/
753		− __battery_hook_unregister(hook_node, 0);
754	754	pr_err("error in extension, unloading: %s",
755	755	hook_node->name);
	756	+ __battery_hook_unregister(hook_node, 0);
756	757	}
757	758	}
758	759	mutex_unlock(&hook_mutex);

drivers/acpi/ec.c+20−0

@@ -2037,6 +2037,17 @@ static inline void acpi_ec_query_exit(void) · 2036 unmodified lines
2037	2037	}
2038	2038	}
2039	2039
	2040	+static const struct dmi_system_id acpi_ec_no_wakeup[] = {
	2041	+ {
	2042	+ .ident = "Thinkpad X1 Carbon 6th",
	2043	+ .matches = {
	2044	+ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
	2045	+ DMI_MATCH(DMI_PRODUCT_FAMILY, "Thinkpad X1 Carbon 6th"),
	2046	+ },
	2047	+ },
	2048	+ { },
	2049	+};
	2050	+
2040	2051	int __init acpi_ec_init(void)
2041	2052	{
2042	2053	int result;
@@ -2047,6 +2058,15 @@ int __init acpi_ec_init(void) · 4 unmodified lines
2047	2058	if (result)
2048	2059	return result;
2049	2060
	2061	+ /*
	2062	+ * Disable EC wakeup on following systems to prevent periodic
	2063	+ * wakeup from EC GPE.
	2064	+ */
	2065	+ if (dmi_check_system(acpi_ec_no_wakeup)) {
	2066	+ ec_no_wakeup = true;
	2067	+ pr_debug("Disabling EC wakeup on suspend-to-idle\n");
	2068	+ }
	2069	+
2050	2070	/* Drivers must be started after acpi_ec_query_init() */
2051	2071	dsdt_fail = acpi_bus_register_driver(&acpi_ec_driver);
2052	2072	/*

drivers/acpi/nfit/core.c+37−11

@@ -408,6 +408,8 @@ int acpi_nfit_ctl(struct nvdimm_bus_descriptor nd_desc, struct nvdimm nvdimm, · 407 unmodified lines
408	408	const guid_t *guid;
409	409	int rc, i;
410	410
	411	+ if (cmd_rc)
	412	+ *cmd_rc = -EINVAL;
411	413	func = cmd;
412	414	if (cmd == ND_CMD_CALL) {
413	415	call_pkg = buf;
@@ -518,6 +520,8 @@ int acpi_nfit_ctl(struct nvdimm_bus_descriptor nd_desc, struct nvdimm nvdimm, · 104 unmodified lines
518	520	* If we return an error (like elsewhere) then caller wouldn't
519	521	* be able to rely upon data returned to make calculation.
520	522	*/
	523	+ if (cmd_rc)
	524	+ *cmd_rc = 0;
521	525	return 0;
522	526	}
523	527
@@ -1273,7 +1277,7 @@ static ssize_t scrub_show(struct device *dev, · 749 unmodified lines
1273	1277
1274	1278	mutex_lock(&acpi_desc->init_mutex);
1275	1279	rc = sprintf(buf, "%d%s", acpi_desc->scrub_count,
1276		− work_busy(&acpi_desc->dwork.work)
	1280	+ acpi_desc->scrub_busy
1277	1281	&& !acpi_desc->cancel ? "+\n" : "\n");
1278	1282	mutex_unlock(&acpi_desc->init_mutex);
1279	1283	}
@@ -2939,6 +2943,32 @@ static unsigned int __acpi_nfit_scrub(struct acpi_nfit_desc *acpi_desc, · 1659 unmodified lines
2939	2943	return 0;
2940	2944	}
2941	2945
	2946	+static void __sched_ars(struct acpi_nfit_desc *acpi_desc, unsigned int tmo)
	2947	+{
	2948	+ lockdep_assert_held(&acpi_desc->init_mutex);
	2949	+
	2950	+ acpi_desc->scrub_busy = 1;
	2951	+ /* note this should only be set from within the workqueue */
	2952	+ if (tmo)
	2953	+ acpi_desc->scrub_tmo = tmo;
	2954	+ queue_delayed_work(nfit_wq, &acpi_desc->dwork, tmo * HZ);
	2955	+}
	2956	+
	2957	+static void sched_ars(struct acpi_nfit_desc *acpi_desc)
	2958	+{
	2959	+ __sched_ars(acpi_desc, 0);
	2960	+}
	2961	+
	2962	+static void notify_ars_done(struct acpi_nfit_desc *acpi_desc)
	2963	+{
	2964	+ lockdep_assert_held(&acpi_desc->init_mutex);
	2965	+
	2966	+ acpi_desc->scrub_busy = 0;
	2967	+ acpi_desc->scrub_count++;
	2968	+ if (acpi_desc->scrub_count_state)
	2969	+ sysfs_notify_dirent(acpi_desc->scrub_count_state);
	2970	+}
	2971	+
2942	2972	static void acpi_nfit_scrub(struct work_struct *work)
2943	2973	{
2944	2974	struct acpi_nfit_desc *acpi_desc;
@@ -2949,14 +2979,10 @@ static void acpi_nfit_scrub(struct work_struct *work) · 4 unmodified lines
2949	2979	mutex_lock(&acpi_desc->init_mutex);
2950	2980	query_rc = acpi_nfit_query_poison(acpi_desc);
2951	2981	tmo = __acpi_nfit_scrub(acpi_desc, query_rc);
2952		− if (tmo) {
2953		− queue_delayed_work(nfit_wq, &acpi_desc->dwork, tmo * HZ);
2954		− acpi_desc->scrub_tmo = tmo;
2955		− } else {
2956		− acpi_desc->scrub_count++;
2957		− if (acpi_desc->scrub_count_state)
2958		− sysfs_notify_dirent(acpi_desc->scrub_count_state);
2959		− }
	2982	+ if (tmo)
	2983	+ __sched_ars(acpi_desc, tmo);
	2984	+ else
	2985	+ notify_ars_done(acpi_desc);
2960	2986	memset(acpi_desc->ars_status, 0, acpi_desc->max_ars);
2961	2987	mutex_unlock(&acpi_desc->init_mutex);
2962	2988	}
@@ -3037,7 +3063,7 @@ static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc) · 74 unmodified lines
3037	3063	break;
3038	3064	}
3039	3065
3040		− queue_delayed_work(nfit_wq, &acpi_desc->dwork, 0);
	3066	+ sched_ars(acpi_desc);
3041	3067	return 0;
3042	3068	}
3043	3069
@@ -3239,7 +3265,7 @@ int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc, unsigned long flags) · 195 unmodified lines
3239	3265	}
3240	3266	}
3241	3267	if (scheduled) {
3242		− queue_delayed_work(nfit_wq, &acpi_desc->dwork, 0);
	3268	+ sched_ars(acpi_desc);
3243	3269	dev_dbg(dev, "ars_scan triggered\n");
3244	3270	}
3245	3271	mutex_unlock(&acpi_desc->init_mutex);

drivers/acpi/nfit/nfit.h+1−0

@@ -203,6 +203,7 @@ struct acpi_nfit_desc { · 202 unmodified lines
203	203	unsigned int max_ars;
204	204	unsigned int scrub_count;
205	205	unsigned int scrub_mode;
	206	+ unsigned int scrub_busy:1;
206	207	unsigned int cancel:1;
207	208	unsigned long dimm_cmd_force_en;
208	209	unsigned long bus_cmd_force_en;

drivers/acpi/osl.c+72−0

@@ -45,6 +45,8 @@ · 44 unmodified lines
45	45	#include <linux/uaccess.h>
46	46	#include <linux/io-64-nonatomic-lo-hi.h>
47	47
	48	+#include "acpica/accommon.h"
	49	+#include "acpica/acnamesp.h"
48	50	#include "internal.h"
49	51
50	52	#define _COMPONENT ACPI_OS_SERVICES
@@ -1490,6 +1492,76 @@ int acpi_check_region(resource_size_t start, resource_size_t n, · 1439 unmodified lines
1490	1492	}
1491	1493	EXPORT_SYMBOL(acpi_check_region);
1492	1494
	1495	+static acpi_status acpi_deactivate_mem_region(acpi_handle handle, u32 level,
	1496	+ void _res, void *return_value)
	1497	+{
	1498	+ struct acpi_mem_space_context **mem_ctx;
	1499	+ union acpi_operand_object *handler_obj;
	1500	+ union acpi_operand_object *region_obj2;
	1501	+ union acpi_operand_object *region_obj;
	1502	+ struct resource *res = _res;
	1503	+ acpi_status status;
	1504	+
	1505	+ region_obj = acpi_ns_get_attached_object(handle);
	1506	+ if (!region_obj)
	1507	+ return AE_OK;
	1508	+
	1509	+ handler_obj = region_obj->region.handler;
	1510	+ if (!handler_obj)
	1511	+ return AE_OK;
	1512	+
	1513	+ if (region_obj->region.space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY)
	1514	+ return AE_OK;
	1515	+
	1516	+ if (!(region_obj->region.flags & AOPOBJ_SETUP_COMPLETE))
	1517	+ return AE_OK;
	1518	+
	1519	+ region_obj2 = acpi_ns_get_secondary_object(region_obj);
	1520	+ if (!region_obj2)
	1521	+ return AE_OK;
	1522	+
	1523	+ mem_ctx = (void *)&region_obj2->extra.region_context;
	1524	+
	1525	+ if (!(mem_ctx[0]->address >= res->start &&
	1526	+ mem_ctx[0]->address < res->end))
	1527	+ return AE_OK;
	1528	+
	1529	+ status = handler_obj->address_space.setup(region_obj,
	1530	+ ACPI_REGION_DEACTIVATE,
	1531	+ NULL, (void **)mem_ctx);
	1532	+ if (ACPI_SUCCESS(status))
	1533	+ region_obj->region.flags &= ~(AOPOBJ_SETUP_COMPLETE);
	1534	+
	1535	+ return status;
	1536	+}
	1537	+
	1538	+/**
	1539	+ * acpi_release_memory - Release any mappings done to a memory region
	1540	+ * @handle: Handle to namespace node
	1541	+ * @res: Memory resource
	1542	+ * @level: A level that terminates the search
	1543	+ *
	1544	+ * Walks through @handle and unmaps all SystemMemory Operation Regions that
	1545	+ * overlap with @res and that have already been activated (mapped).
	1546	+ *
	1547	+ * This is a helper that allows drivers to place special requirements on memory
	1548	+ * region that may overlap with operation regions, primarily allowing them to
	1549	+ * safely map the region as non-cached memory.
	1550	+ *
	1551	+ * The unmapped Operation Regions will be automatically remapped next time they
	1552	+ * are called, so the drivers do not need to do anything else.
	1553	+ */
	1554	+acpi_status acpi_release_memory(acpi_handle handle, struct resource *res,
	1555	+ u32 level)
	1556	+{
	1557	+ if (!(res->flags & IORESOURCE_MEM))
	1558	+ return AE_TYPE;
	1559	+
	1560	+ return acpi_walk_namespace(ACPI_TYPE_REGION, handle, level,
	1561	+ acpi_deactivate_mem_region, NULL, res, NULL);
	1562	+}
	1563	+EXPORT_SYMBOL_GPL(acpi_release_memory);
	1564	+
1493	1565	/*
1494	1566	* Let drivers know whether the resource checks are effective
1495	1567	*/

drivers/acpi/pptt.c+8−2

@@ -481,8 +481,14 @@ static int topology_get_acpi_cpu_tag(struct acpi_table_header *table, · 480 unmodified lines
481	481	if (cpu_node) {
482	482	cpu_node = acpi_find_processor_package_id(table, cpu_node,
483	483	level, flag);
484		− /* Only the first level has a guaranteed id */
485		− if (level == 0)
	484	+ /*
	485	+ * As per specification if the processor structure represents
	486	+ * an actual processor, then ACPI processor ID must be valid.
	487	+ * For processor containers ACPI_PPTT_ACPI_PROCESSOR_ID_VALID
	488	+ * should be set if the UID is valid
	489	+ */
	490	+ if (level == 0 \|\|
	491	+ cpu_node->flags & ACPI_PPTT_ACPI_PROCESSOR_ID_VALID)
486	492	return cpu_node->acpi_processor_id;
487	493	return ACPI_PTR_DIFF(cpu_node, table);
488	494	}

drivers/ata/Kconfig+0−2

@@ -398,7 +398,6 @@ config SATA_DWC_VDEBUG · 397 unmodified lines
398	398
399	399	config SATA_HIGHBANK
400	400	tristate "Calxeda Highbank SATA support"
401		− depends on HAS_DMA
402	401	depends on ARCH_HIGHBANK \|\| COMPILE_TEST
403	402	help
404	403	This option enables support for the Calxeda Highbank SoC's
@@ -408,7 +407,6 @@ config SATA_HIGHBANK · 3 unmodified lines
408	407
409	408	config SATA_MV
410	409	tristate "Marvell SATA support"
411		− depends on HAS_DMA
412	410	depends on PCI \|\| ARCH_DOVE \|\| ARCH_MV78XX0 \|\| \
413	411	ARCH_MVEBU \|\| ARCH_ORION5X \|\| COMPILE_TEST
414	412	select GENERIC_PHY

drivers/ata/ahci.c+60−0

@@ -400,6 +400,7 @@ static const struct pci_device_id ahci_pci_tbl[] = { · 399 unmodified lines
400	400	{ PCI_VDEVICE(INTEL, 0x0f23), board_ahci_mobile }, /* Bay Trail AHCI */
401	401	{ PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */
402	402	{ PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */
	403	+ { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_mobile }, /* Ice Lake LP AHCI */
403	404
404	405	/* JMicron 360/1/3/5/6, match class to avoid IDE function */
405	406	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
@@ -1280,6 +1281,59 @@ static bool ahci_broken_suspend(struct pci_dev *pdev) · 874 unmodified lines
1280	1281	return strcmp(buf, dmi->driver_data) < 0;
1281	1282	}
1282	1283
	1284	+static bool ahci_broken_lpm(struct pci_dev *pdev)
	1285	+{
	1286	+ static const struct dmi_system_id sysids[] = {
	1287	+ /* Various Lenovo 50 series have LPM issues with older BIOSen */
	1288	+ {
	1289	+ .matches = {
	1290	+ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
	1291	+ DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad X250"),
	1292	+ },
	1293	+ .driver_data = "20180406", /* 1.31 */
	1294	+ },
	1295	+ {
	1296	+ .matches = {
	1297	+ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
	1298	+ DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L450"),
	1299	+ },
	1300	+ .driver_data = "20180420", /* 1.28 */
	1301	+ },
	1302	+ {
	1303	+ .matches = {
	1304	+ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
	1305	+ DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T450s"),
	1306	+ },
	1307	+ .driver_data = "20180315", /* 1.33 */
	1308	+ },
	1309	+ {
	1310	+ .matches = {
	1311	+ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
	1312	+ DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad W541"),
	1313	+ },
	1314	+ /*
	1315	+ * Note date based on release notes, 2.35 has been
	1316	+ * reported to be good, but I've been unable to get
	1317	+ * a hold of the reporter to get the DMI BIOS date.
	1318	+ * TODO: fix this.
	1319	+ */
	1320	+ .driver_data = "20180310", /* 2.35 */
	1321	+ },
	1322	+ { } /* terminate list */
	1323	+ };
	1324	+ const struct dmi_system_id *dmi = dmi_first_match(sysids);
	1325	+ int year, month, date;
	1326	+ char buf[9];
	1327	+
	1328	+ if (!dmi)
	1329	+ return false;
	1330	+
	1331	+ dmi_get_date(DMI_BIOS_DATE, &year, &month, &date);
	1332	+ snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date);
	1333	+
	1334	+ return strcmp(buf, dmi->driver_data) < 0;
	1335	+}
	1336	+
1283	1337	static bool ahci_broken_online(struct pci_dev *pdev)
1284	1338	{
1285	1339	#define ENCODE_BUSDEVFN(bus, slot, func) \
@@ -1694,6 +1748,12 @@ static int ahci_init_one(struct pci_dev pdev, const struct pci_device_id ent) · 408 unmodified lines
1694	1748	"quirky BIOS, skipping spindown on poweroff\n");
1695	1749	}
1696	1750
	1751	+ if (ahci_broken_lpm(pdev)) {
	1752	+ pi.flags \|= ATA_FLAG_NO_LPM;
	1753	+ dev_warn(&pdev->dev,
	1754	+ "BIOS update required for Link Power Management support\n");
	1755	+ }
	1756	+
1697	1757	if (ahci_broken_suspend(pdev)) {
1698	1758	hpriv->flags \|= AHCI_HFLAG_NO_SUSPEND;
1699	1759	dev_warn(&pdev->dev,

drivers/ata/ahci_mvebu.c+1−1

@@ -82,7 +82,7 @@ static void ahci_mvebu_regret_option(struct ahci_host_priv *hpriv) · 81 unmodified lines
82	82	*
83	83	* Return: 0 on success; Error code otherwise.
84	84	*/
85		−int ahci_mvebu_stop_engine(struct ata_port *ap)
	85	+static int ahci_mvebu_stop_engine(struct ata_port *ap)
86	86	{
87	87	void __iomem *port_mmio = ahci_port_base(ap);
88	88	u32 tmp, port_fbs;

drivers/ata/libahci.c+5−2

@@ -35,6 +35,7 @@ · 34 unmodified lines
35	35	#include <linux/kernel.h>
36	36	#include <linux/gfp.h>
37	37	#include <linux/module.h>
	38	+#include <linux/nospec.h>
38	39	#include <linux/blkdev.h>
39	40	#include <linux/delay.h>
40	41	#include <linux/interrupt.h>
@@ -1146,10 +1147,12 @@ static ssize_t ahci_led_store(struct ata_port ap, const char buf, · 1105 unmodified lines
1146	1147
1147	1148	/* get the slot number from the message */
1148	1149	pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
1149		− if (pmp < EM_MAX_SLOTS)
	1150	+ if (pmp < EM_MAX_SLOTS) {
	1151	+ pmp = array_index_nospec(pmp, EM_MAX_SLOTS);
1150	1152	emp = &pp->em_priv[pmp];
1151		− else
	1153	+ } else {
1152	1154	return -EINVAL;
	1155	+ }
1153	1156
1154	1157	/* mask off the activity bits if we are in sw_activity
1155	1158	* mode, user should turn off sw_activity before setting

drivers/ata/libata-core.c+3−0

@@ -2493,6 +2493,9 @@ int ata_dev_configure(struct ata_device *dev) · 2492 unmodified lines
2493	2493	(id[ATA_ID_SATA_CAPABILITY] & 0xe) == 0x2)
2494	2494	dev->horkage \|= ATA_HORKAGE_NOLPM;
2495	2495
	2496	+ if (ap->flags & ATA_FLAG_NO_LPM)
	2497	+ dev->horkage \|= ATA_HORKAGE_NOLPM;
	2498	+
2496	2499	if (dev->horkage & ATA_HORKAGE_NOLPM) {
2497	2500	ata_dev_warn(dev, "LPM support broken, forcing max_power\n");
2498	2501	dev->link->ap->target_lpm_policy = ATA_LPM_MAX_POWER;

drivers/ata/libata-eh.c+16−25

@@ -614,8 +614,7 @@ void ata_scsi_cmd_error_handler(struct Scsi_Host host, struct ata_port ap, · 613 unmodified lines
614	614	list_for_each_entry_safe(scmd, tmp, eh_work_q, eh_entry) {
615	615	struct ata_queued_cmd *qc;
616	616
617		− for (i = 0; i < ATA_MAX_QUEUE; i++) {
618		− qc = __ata_qc_from_tag(ap, i);
	617	+ ata_qc_for_each_raw(ap, qc, i) {
619	618	if (qc->flags & ATA_QCFLAG_ACTIVE &&
620	619	qc->scsicmd == scmd)
621	620	break;
@@ -818,14 +817,13 @@ EXPORT_SYMBOL_GPL(ata_port_wait_eh); · 196 unmodified lines
818	817
819	818	static int ata_eh_nr_in_flight(struct ata_port *ap)
820	819	{
	820	+ struct ata_queued_cmd *qc;
821	821	unsigned int tag;
822	822	int nr = 0;
823	823
824	824	/* count only non-internal commands */
825		− for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
826		− if (ata_tag_internal(tag))
827		− continue;
828		− if (ata_qc_from_tag(ap, tag))
	825	+ ata_qc_for_each(ap, qc, tag) {
	826	+ if (qc)
829	827	nr++;
830	828	}
831	829
@@ -847,13 +845,13 @@ void ata_eh_fastdrain_timerfn(struct timer_list *t) · 15 unmodified lines
847	845	goto out_unlock;
848	846
849	847	if (cnt == ap->fastdrain_cnt) {
	848	+ struct ata_queued_cmd *qc;
850	849	unsigned int tag;
851	850
852	851	/* No progress during the last interval, tag all
853	852	* in-flight qcs as timed out and freeze the port.
854	853	*/
855		− for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
856		− struct ata_queued_cmd *qc = ata_qc_from_tag(ap, tag);
	854	+ ata_qc_for_each(ap, qc, tag) {
857	855	if (qc)
858	856	qc->err_mask \|= AC_ERR_TIMEOUT;
859	857	}
@@ -999,6 +997,7 @@ void ata_port_schedule_eh(struct ata_port *ap) · 139 unmodified lines
999	997
1000	998	static int ata_do_link_abort(struct ata_port ap, struct ata_link link)
1001	999	{
	1000	+ struct ata_queued_cmd *qc;
1002	1001	int tag, nr_aborted = 0;
1003	1002
1004	1003	WARN_ON(!ap->ops->error_handler);
@@ -1007,9 +1006,7 @@ static int ata_do_link_abort(struct ata_port ap, struct ata_link link) · 2 unmodified lines
1007	1006	ata_eh_set_pending(ap, 0);
1008	1007
1009	1008	/* include internal tag in iteration */
1010		− for (tag = 0; tag <= ATA_MAX_QUEUE; tag++) {
1011		− struct ata_queued_cmd *qc = ata_qc_from_tag(ap, tag);
1012		−
	1009	+ ata_qc_for_each_with_internal(ap, qc, tag) {
1013	1010	if (qc && (!link \|\| qc->dev->link == link)) {
1014	1011	qc->flags \|= ATA_QCFLAG_FAILED;
1015	1012	ata_qc_complete(qc);
@@ -1712,9 +1709,7 @@ void ata_eh_analyze_ncq_error(struct ata_link *link) · 696 unmodified lines
1712	1709	return;
1713	1710
1714	1711	/* has LLDD analyzed already? */
1715		− for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
1716		− qc = __ata_qc_from_tag(ap, tag);
1717		−
	1712	+ ata_qc_for_each_raw(ap, qc, tag) {
1718	1713	if (!(qc->flags & ATA_QCFLAG_FAILED))
1719	1714	continue;
1720	1715
@@ -2136,6 +2131,7 @@ static void ata_eh_link_autopsy(struct ata_link *link) · 415 unmodified lines
2136	2131	{
2137	2132	struct ata_port *ap = link->ap;
2138	2133	struct ata_eh_context *ehc = &link->eh_context;
	2134	+ struct ata_queued_cmd *qc;
2139	2135	struct ata_device *dev;
2140	2136	unsigned int all_err_mask = 0, eflags = 0;
2141	2137	int tag, nr_failed = 0, nr_quiet = 0;
@@ -2168,9 +2164,7 @@ static void ata_eh_link_autopsy(struct ata_link *link) · 26 unmodified lines
2168	2164
2169	2165	all_err_mask \|= ehc->i.err_mask;
2170	2166
2171		− for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
2172		− struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag);
2173		−
	2167	+ ata_qc_for_each_raw(ap, qc, tag) {
2174	2168	if (!(qc->flags & ATA_QCFLAG_FAILED) \|\|
2175	2169	ata_dev_phys_link(qc->dev) != link)
2176	2170	continue;
@@ -2436,6 +2430,7 @@ static void ata_eh_link_report(struct ata_link *link) · 259 unmodified lines
2436	2430	{
2437	2431	struct ata_port *ap = link->ap;
2438	2432	struct ata_eh_context *ehc = &link->eh_context;
	2433	+ struct ata_queued_cmd *qc;
2439	2434	const char frozen, desc;
2440	2435	char tries_buf[6] = "";
2441	2436	int tag, nr_failed = 0;
@@ -2447,9 +2442,7 @@ static void ata_eh_link_report(struct ata_link *link) · 5 unmodified lines
2447	2442	if (ehc->i.desc[0] != '\0')
2448	2443	desc = ehc->i.desc;
2449	2444
2450		− for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
2451		− struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag);
2452		−
	2445	+ ata_qc_for_each_raw(ap, qc, tag) {
2453	2446	if (!(qc->flags & ATA_QCFLAG_FAILED) \|\|
2454	2447	ata_dev_phys_link(qc->dev) != link \|\|
2455	2448	((qc->flags & ATA_QCFLAG_QUIET) &&
@@ -2511,8 +2504,7 @@ static void ata_eh_link_report(struct ata_link *link) · 55 unmodified lines
2511	2504	ehc->i.serror & SERR_DEV_XCHG ? "DevExch " : "");
2512	2505	#endif
2513	2506
2514		− for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
2515		− struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag);
	2507	+ ata_qc_for_each_raw(ap, qc, tag) {
2516	2508	struct ata_taskfile cmd = &qc->tf, res = &qc->result_tf;
2517	2509	char data_buf[20] = "";
2518	2510	char cdb_buf[70] = "";
@@ -3992,12 +3984,11 @@ int ata_eh_recover(struct ata_port *ap, ata_prereset_fn_t prereset, · 1473 unmodified lines
3992	3984	*/
3993	3985	void ata_eh_finish(struct ata_port *ap)
3994	3986	{
	3987	+ struct ata_queued_cmd *qc;
3995	3988	int tag;
3996	3989
3997	3990	/* retry or finish qcs */
3998		− for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
3999		− struct ata_queued_cmd *qc = __ata_qc_from_tag(ap, tag);
4000		−
	3991	+ ata_qc_for_each_raw(ap, qc, tag) {
4001	3992	if (!(qc->flags & ATA_QCFLAG_FAILED))
4002	3993	continue;
4003	3994

drivers/ata/libata-scsi.c+12−6

@@ -3805,10 +3805,20 @@ static unsigned int ata_scsi_zbc_out_xlat(struct ata_queued_cmd *qc) · 3804 unmodified lines
3805	3805	*/
3806	3806	goto invalid_param_len;
3807	3807	}
3808		− if (block > dev->n_sectors)
3809		− goto out_of_range;
3810	3808
3811	3809	all = cdb[14] & 0x1;
	3810	+ if (all) {
	3811	+ /*
	3812	+ * Ignore the block address (zone ID) as defined by ZBC.
	3813	+ */
	3814	+ block = 0;
	3815	+ } else if (block >= dev->n_sectors) {
	3816	+ /*
	3817	+ * Block must be a valid zone ID (a zone start LBA).
	3818	+ */
	3819	+ fp = 2;
	3820	+ goto invalid_fld;
	3821	+ }
3812	3822
3813	3823	if (ata_ncq_enabled(qc->dev) &&
3814	3824	ata_fpdma_zac_mgmt_out_supported(qc->dev)) {
@@ -3837,10 +3847,6 @@ static unsigned int ata_scsi_zbc_out_xlat(struct ata_queued_cmd *qc) · 22 unmodified lines
3837	3847	invalid_fld:
3838	3848	ata_scsi_set_invalid_field(qc->dev, scmd, fp, 0xff);
3839	3849	return 1;
3840		− out_of_range:
3841		− /* "Logical Block Address out of range" */
3842		− ata_scsi_set_sense(qc->dev, scmd, ILLEGAL_REQUEST, 0x21, 0x00);
3843		− return 1;
3844	3850	invalid_param_len:
3845	3851	/* "Parameter list length error" */
3846	3852	ata_scsi_set_sense(qc->dev, scmd, ILLEGAL_REQUEST, 0x1a, 0x0);

drivers/ata/sata_fsl.c+1−8

@@ -395,12 +395,6 @@ static inline unsigned int sata_fsl_tag(unsigned int tag, · 394 unmodified lines
395	395	{
396	396	/* We let libATA core do actual (queue) tag allocation */
397	397
398		− /* all non NCQ/queued commands should have tag#0 */
399		− if (ata_tag_internal(tag)) {
400		− DPRINTK("mapping internal cmds to tag#0\n");
401		− return 0;
402		− }
403		−
404	398	if (unlikely(tag >= SATA_FSL_QUEUE_DEPTH)) {
405	399	DPRINTK("tag %d invalid : out of range\n", tag);
406	400	return 0;
@@ -1229,8 +1223,7 @@ static void sata_fsl_host_intr(struct ata_port *ap) · 822 unmodified lines
1229	1223
1230	1224	/* Workaround for data length mismatch errata */
1231	1225	if (unlikely(hstatus & INT_ON_DATA_LENGTH_MISMATCH)) {
1232		− for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
1233		− qc = ata_qc_from_tag(ap, tag);
	1226	+ ata_qc_for_each_with_internal(ap, qc, tag) {
1234	1227	if (qc && ata_is_atapi(qc->tf.protocol)) {
1235	1228	u32 hcontrol;
1236	1229	/* Set HControl[27] to clear error registers */

drivers/ata/sata_nv.c+0−3

@@ -675,7 +675,6 @@ static int nv_adma_slave_config(struct scsi_device *sdev) · 674 unmodified lines
675	675	struct ata_port *ap = ata_shost_to_port(sdev->host);
676	676	struct nv_adma_port_priv *pp = ap->private_data;
677	677	struct nv_adma_port_priv port0, port1;
678		− struct scsi_device sdev0, sdev1;
679	678	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
680	679	unsigned long segment_boundary, flags;
681	680	unsigned short sg_tablesize;
@@ -736,8 +735,6 @@ static int nv_adma_slave_config(struct scsi_device *sdev) · 54 unmodified lines
736	735
737	736	port0 = ap->host->ports[0]->private_data;
738	737	port1 = ap->host->ports[1]->private_data;
739		− sdev0 = ap->host->ports[0]->link.device[0].sdev;
740		− sdev1 = ap->host->ports[1]->link.device[0].sdev;
741	738	if ((port0->flags & NV_ADMA_ATAPI_SETUP_COMPLETE) \|\|
742	739	(port1->flags & NV_ADMA_ATAPI_SETUP_COMPLETE)) {
743	740	/*

drivers/atm/iphase.c+1−1

@@ -1618,7 +1618,7 @@ static int rx_init(struct atm_dev *dev) · 1617 unmodified lines
1618	1618	skb_queue_head_init(&iadev->rx_dma_q);
1619	1619	iadev->rx_free_desc_qhead = NULL;
1620	1620
1621		− iadev->rx_open = kcalloc(4, iadev->num_vc, GFP_KERNEL);
	1621	+ iadev->rx_open = kcalloc(iadev->num_vc, sizeof(void *), GFP_KERNEL);
1622	1622	if (!iadev->rx_open) {
1623	1623	printk(KERN_ERR DEV_LABEL "itf %d couldn't get free page\n",
1624	1624	dev->number);

drivers/atm/zatm.c+2−0

@@ -1483,6 +1483,8 @@ static int zatm_ioctl(struct atm_dev dev,unsigned int cmd,void __user arg) · 1482 unmodified lines
1483	1483	return -EFAULT;
1484	1484	if (pool < 0 \|\| pool > ZATM_LAST_POOL)
1485	1485	return -EINVAL;
	1486	+ pool = array_index_nospec(pool,
	1487	+ ZATM_LAST_POOL + 1);
1486	1488	if (copy_from_user(&info,
1487	1489	&((struct zatm_pool_req __user *) arg)->info,
1488	1490	sizeof(info))) return -EFAULT;

drivers/base/Makefile+0−3

@@ -8,10 +8,7 @@ obj-y := component.o core.o bus.o dd.o syscore.o \ · 7 unmodified lines
8	8	topology.o container.o property.o cacheinfo.o \
9	9	devcon.o
10	10	obj-$(CONFIG_DEVTMPFS) += devtmpfs.o
11		−obj-$(CONFIG_DMA_CMA) += dma-contiguous.o
12	11	obj-y += power/
13		−obj-$(CONFIG_HAS_DMA) += dma-mapping.o
14		−obj-$(CONFIG_HAVE_GENERIC_DMA_COHERENT) += dma-coherent.o
15	12	obj-$(CONFIG_ISA_BUS_API) += isa.o
16	13	obj-y += firmware_loader/
17	14	obj-$(CONFIG_NUMA) += node.o

drivers/base/core.c+11−4

@@ -236,6 +236,13 @@ struct device_link device_link_add(struct device consumer, · 235 unmodified lines
236	236	link->rpm_active = true;
237	237	}
238	238	pm_runtime_new_link(consumer);
	239	+ /*
	240	+ * If the link is being added by the consumer driver at probe
	241	+ * time, balance the decrementation of the supplier's runtime PM
	242	+ * usage counter after consumer probe in driver_probe_device().
	243	+ */
	244	+ if (consumer->links.status == DL_DEV_PROBING)
	245	+ pm_runtime_get_noresume(supplier);
239	246	}
240	247	get_device(supplier);
241	248	link->supplier = supplier;
@@ -255,12 +262,12 @@ struct device_link device_link_add(struct device consumer, · 13 unmodified lines
255	262	switch (consumer->links.status) {
256	263	case DL_DEV_PROBING:
257	264	/*
258		− * Balance the decrementation of the supplier's
259		− * runtime PM usage counter after consumer probe
260		− * in driver_probe_device().
	265	+ * Some callers expect the link creation during
	266	+ * consumer driver probe to resume the supplier
	267	+ * even without DL_FLAG_RPM_ACTIVE.
261	268	*/
262	269	if (flags & DL_FLAG_PM_RUNTIME)
263		− pm_runtime_get_sync(supplier);
	270	+ pm_runtime_resume(supplier);
264	271
265	272	link->status = DL_STATE_CONSUMER_PROBE;
266	273	break;

drivers/base/dd.c+0−8

@@ -434,14 +434,6 @@ re_probe: · 433 unmodified lines
434	434	goto probe_failed;
435	435	}
436	436
437		− /*
438		− * Ensure devices are listed in devices_kset in correct order
439		− * It's important to move Dev to the end of devices_kset before
440		− * calling .probe, because it could be recursive and parent Dev
441		− * should always go first
442		− */
443		− devices_kset_move_last(dev);
444		−
445	437	if (dev->bus->probe) {
446	438	ret = dev->bus->probe(dev);
447	439	if (ret)

drivers/base/power/domain.c+12−11

@@ -2235,7 +2235,7 @@ static void genpd_dev_pm_sync(struct device *dev) · 2234 unmodified lines
2235	2235	}
2236	2236
2237	2237	static int __genpd_dev_pm_attach(struct device dev, struct device_node np,
2238		− unsigned int index)
	2238	+ unsigned int index, bool power_on)
2239	2239	{
2240	2240	struct of_phandle_args pd_args;
2241	2241	struct generic_pm_domain *pd;
@@ -2271,9 +2271,11 @@ static int __genpd_dev_pm_attach(struct device dev, struct device_node np, · 29 unmodified lines
2271	2271	dev->pm_domain->detach = genpd_dev_pm_detach;
2272	2272	dev->pm_domain->sync = genpd_dev_pm_sync;
2273	2273
2274		− genpd_lock(pd);
2275		− ret = genpd_power_on(pd, 0);
2276		− genpd_unlock(pd);
	2274	+ if (power_on) {
	2275	+ genpd_lock(pd);
	2276	+ ret = genpd_power_on(pd, 0);
	2277	+ genpd_unlock(pd);
	2278	+ }
2277	2279
2278	2280	if (ret)
2279	2281	genpd_remove_device(pd, dev);
@@ -2307,7 +2309,7 @@ int genpd_dev_pm_attach(struct device *dev) · 27 unmodified lines
2307	2309	"#power-domain-cells") != 1)
2308	2310	return 0;
2309	2311
2310		− return __genpd_dev_pm_attach(dev, dev->of_node, 0);
	2312	+ return __genpd_dev_pm_attach(dev, dev->of_node, 0, true);
2311	2313	}
2312	2314	EXPORT_SYMBOL_GPL(genpd_dev_pm_attach);
2313	2315
@@ -2359,14 +2361,14 @@ struct device genpd_dev_pm_attach_by_id(struct device dev, · 45 unmodified lines
2359	2361	}
2360	2362
2361	2363	/* Try to attach the device to the PM domain at the specified index. */
2362		− ret = __genpd_dev_pm_attach(genpd_dev, dev->of_node, index);
	2364	+ ret = __genpd_dev_pm_attach(genpd_dev, dev->of_node, index, false);
2363	2365	if (ret < 1) {
2364	2366	device_unregister(genpd_dev);
2365	2367	return ret ? ERR_PTR(ret) : NULL;
2366	2368	}
2367	2369
2368		− pm_runtime_set_active(genpd_dev);
2369	2370	pm_runtime_enable(genpd_dev);
	2371	+ genpd_queue_power_off_work(dev_to_genpd(genpd_dev));
2370	2372
2371	2373	return genpd_dev;
2372	2374	}
@@ -2487,10 +2489,9 @@ EXPORT_SYMBOL_GPL(of_genpd_parse_idle_states); · 114 unmodified lines
2487	2489	* power domain corresponding to a DT node's "required-opps" property.
2488	2490	*
2489	2491	* @dev: Device for which the performance-state needs to be found.
2490		− * @opp_node: DT node where the "required-opps" property is present. This can be
	2492	+ * @np: DT node where the "required-opps" property is present. This can be
2491	2493	* the device node itself (if it doesn't have an OPP table) or a node
2492	2494	* within the OPP table of a device (if device has an OPP table).
2493		− * @state: Pointer to return performance state.
2494	2495	*
2495	2496	* Returns performance state corresponding to the "required-opps" property of
2496	2497	* a DT node. This calls platform specific genpd->opp_to_performance_state()
@@ -2499,7 +2500,7 @@ EXPORT_SYMBOL_GPL(of_genpd_parse_idle_states); · 2 unmodified lines
2499	2500	* Returns performance state on success and 0 on failure.
2500	2501	*/
2501	2502	unsigned int of_genpd_opp_to_performance_state(struct device *dev,
2502		− struct device_node *opp_node)
	2503	+ struct device_node *np)
2503	2504	{
2504	2505	struct generic_pm_domain *genpd;
2505	2506	struct dev_pm_opp *opp;
@@ -2514,7 +2515,7 @@ unsigned int of_genpd_opp_to_performance_state(struct device *dev, · 8 unmodified lines
2514	2515
2515	2516	genpd_lock(genpd);
2516	2517
2517		− opp = of_dev_pm_opp_find_required_opp(&genpd->dev, opp_node);
	2518	+ opp = of_dev_pm_opp_find_required_opp(&genpd->dev, np);
2518	2519	if (IS_ERR(opp)) {
2519	2520	dev_err(dev, "Failed to find required OPP: %ld\n",
2520	2521	PTR_ERR(opp));

drivers/block/drbd/drbd_req.c+2−2

@@ -1244,8 +1244,8 @@ drbd_request_prepare(struct drbd_device device, struct bio bio, unsigned long · 1243 unmodified lines
1244	1244	_drbd_start_io_acct(device, req);
1245	1245
1246	1246	/* process discards always from our submitter thread */
1247		− if ((bio_op(bio) & REQ_OP_WRITE_ZEROES) \|\|
1248		− (bio_op(bio) & REQ_OP_DISCARD))
	1247	+ if (bio_op(bio) == REQ_OP_WRITE_ZEROES \|\|
	1248	+ bio_op(bio) == REQ_OP_DISCARD)
1249	1249	goto queue_for_submitter_thread;
1250	1250
1251	1251	if (rw == WRITE && req->private_bio && req->i.size

drivers/block/drbd/drbd_worker.c+1−1

@@ -282,8 +282,8 @@ void drbd_request_endio(struct bio *bio) · 281 unmodified lines
282	282	what = COMPLETED_OK;
283	283	}
284	284
285		− bio_put(req->private_bio);
286	285	req->private_bio = ERR_PTR(blk_status_to_errno(bio->bi_status));
	286	+ bio_put(bio);
287	287
288	288	/* not req_mod(), we need irqsave here! */
289	289	spin_lock_irqsave(&device->resource->req_lock, flags);

drivers/block/loop.c+1−0

@@ -1613,6 +1613,7 @@ static int lo_compat_ioctl(struct block_device *bdev, fmode_t mode, · 1612 unmodified lines
1613	1613	arg = (unsigned long) compat_ptr(arg);
1614	1614	case LOOP_SET_FD:
1615	1615	case LOOP_CHANGE_FD:
	1616	+ case LOOP_SET_BLOCK_SIZE:
1616	1617	err = lo_ioctl(bdev, mode, cmd, arg);
1617	1618	break;
1618	1619	default:

drivers/block/nbd.c+113−25

@@ -76,6 +76,7 @@ struct link_dead_args { · 75 unmodified lines
76	76	#define NBD_HAS_CONFIG_REF 4
77	77	#define NBD_BOUND 5
78	78	#define NBD_DESTROY_ON_DISCONNECT 6
	79	+#define NBD_DISCONNECT_ON_CLOSE 7
79	80
80	81	struct nbd_config {
81	82	u32 flags;
@@ -111,12 +112,16 @@ struct nbd_device { · 29 unmodified lines
111	112	struct task_struct *task_setup;
112	113	};
113	114
	115	+#define NBD_CMD_REQUEUED 1
	116	+
114	117	struct nbd_cmd {
115	118	struct nbd_device *nbd;
	119	+ struct mutex lock;
116	120	int index;
117	121	int cookie;
118		− struct completion send_complete;
119	122	blk_status_t status;
	123	+ unsigned long flags;
	124	+ u32 cmd_cookie;
120	125	};
121	126
122	127	#if IS_ENABLED(CONFIG_DEBUG_FS)
@@ -138,12 +143,42 @@ static void nbd_config_put(struct nbd_device *nbd); · 15 unmodified lines
138	143	static void nbd_connect_reply(struct genl_info *info, int index);
139	144	static int nbd_genl_status(struct sk_buff skb, struct genl_info info);
140	145	static void nbd_dead_link_work(struct work_struct *work);
	146	+static void nbd_disconnect_and_put(struct nbd_device *nbd);
141	147
142	148	static inline struct device nbd_to_dev(struct nbd_device nbd)
143	149	{
144	150	return disk_to_dev(nbd->disk);
145	151	}
146	152
	153	+static void nbd_requeue_cmd(struct nbd_cmd *cmd)
	154	+{
	155	+ struct request *req = blk_mq_rq_from_pdu(cmd);
	156	+
	157	+ if (!test_and_set_bit(NBD_CMD_REQUEUED, &cmd->flags))
	158	+ blk_mq_requeue_request(req, true);
	159	+}
	160	+
	161	+#define NBD_COOKIE_BITS 32
	162	+
	163	+static u64 nbd_cmd_handle(struct nbd_cmd *cmd)
	164	+{
	165	+ struct request *req = blk_mq_rq_from_pdu(cmd);
	166	+ u32 tag = blk_mq_unique_tag(req);
	167	+ u64 cookie = cmd->cmd_cookie;
	168	+
	169	+ return (cookie << NBD_COOKIE_BITS) \| tag;
	170	+}
	171	+
	172	+static u32 nbd_handle_to_tag(u64 handle)
	173	+{
	174	+ return (u32)handle;
	175	+}
	176	+
	177	+static u32 nbd_handle_to_cookie(u64 handle)
	178	+{
	179	+ return (u32)(handle >> NBD_COOKIE_BITS);
	180	+}
	181	+
147	182	static const char *nbdcmd_to_ascii(int cmd)
148	183	{
149	184	switch (cmd) {
@@ -317,6 +352,9 @@ static enum blk_eh_timer_return nbd_xmit_timeout(struct request *req, · 167 unmodified lines
317	352	}
318	353	config = nbd->config;
319	354
	355	+ if (!mutex_trylock(&cmd->lock))
	356	+ return BLK_EH_RESET_TIMER;
	357	+
320	358	if (config->num_connections > 1) {
321	359	dev_err_ratelimited(nbd_to_dev(nbd),
322	360	"Connection timed out, retrying (%d/%d alive)\n",
@@ -341,7 +379,8 @@ static enum blk_eh_timer_return nbd_xmit_timeout(struct request *req, · 18 unmodified lines
341	379	nbd_mark_nsock_dead(nbd, nsock, 1);
342	380	mutex_unlock(&nsock->tx_lock);
343	381	}
344		− blk_mq_requeue_request(req, true);
	382	+ mutex_unlock(&cmd->lock);
	383	+ nbd_requeue_cmd(cmd);
345	384	nbd_config_put(nbd);
346	385	return BLK_EH_DONE;
347	386	}
@@ -351,6 +390,7 @@ static enum blk_eh_timer_return nbd_xmit_timeout(struct request *req, · 3 unmodified lines
351	390	}
352	391	set_bit(NBD_TIMEDOUT, &config->runtime_flags);
353	392	cmd->status = BLK_STS_IOERR;
	393	+ mutex_unlock(&cmd->lock);
354	394	sock_shutdown(nbd);
355	395	nbd_config_put(nbd);
356	396	done:
@@ -428,9 +468,9 @@ static int nbd_send_cmd(struct nbd_device nbd, struct nbd_cmd cmd, int index) · 71 unmodified lines
428	468	struct iov_iter from;
429	469	unsigned long size = blk_rq_bytes(req);
430	470	struct bio *bio;
	471	+ u64 handle;
431	472	u32 type;
432	473	u32 nbd_cmd_flags = 0;
433		− u32 tag = blk_mq_unique_tag(req);
434	474	int sent = nsock->sent, skip = 0;
435	475
436	476	iov_iter_kvec(&from, WRITE \| ITER_KVEC, &iov, 1, sizeof(request));
@@ -472,6 +512,8 @@ static int nbd_send_cmd(struct nbd_device nbd, struct nbd_cmd cmd, int index) · 35 unmodified lines
472	512	goto send_pages;
473	513	}
474	514	iov_iter_advance(&from, sent);
	515	+ } else {
	516	+ cmd->cmd_cookie++;
475	517	}
476	518	cmd->index = index;
477	519	cmd->cookie = nsock->cookie;
@@ -480,7 +522,8 @@ static int nbd_send_cmd(struct nbd_device nbd, struct nbd_cmd cmd, int index) · 2 unmodified lines
480	522	request.from = cpu_to_be64((u64)blk_rq_pos(req) << 9);
481	523	request.len = htonl(size);
482	524	}
483		− memcpy(request.handle, &tag, sizeof(tag));
	525	+ handle = nbd_cmd_handle(cmd);
	526	+ memcpy(request.handle, &handle, sizeof(handle));
484	527
485	528	dev_dbg(nbd_to_dev(nbd), "request %p: sending control (%s@%llu,%uB)\n",
486	529	req, nbdcmd_to_ascii(type),
@@ -498,6 +541,7 @@ static int nbd_send_cmd(struct nbd_device nbd, struct nbd_cmd cmd, int index) · 11 unmodified lines
498	541	nsock->pending = req;
499	542	nsock->sent = sent;
500	543	}
	544	+ set_bit(NBD_CMD_REQUEUED, &cmd->flags);
501	545	return BLK_STS_RESOURCE;
502	546	}
503	547	dev_err_ratelimited(disk_to_dev(nbd->disk),
@@ -539,6 +583,7 @@ send_pages: · 35 unmodified lines
539	583	*/
540	584	nsock->pending = req;
541	585	nsock->sent = sent;
	586	+ set_bit(NBD_CMD_REQUEUED, &cmd->flags);
542	587	return BLK_STS_RESOURCE;
543	588	}
544	589	dev_err(disk_to_dev(nbd->disk),
@@ -571,10 +616,12 @@ static struct nbd_cmd nbd_read_stat(struct nbd_device nbd, int index) · 26 unmodified lines
571	616	struct nbd_reply reply;
572	617	struct nbd_cmd *cmd;
573	618	struct request *req = NULL;
	619	+ u64 handle;
574	620	u16 hwq;
575	621	u32 tag;
576	622	struct kvec iov = {.iov_base = &reply, .iov_len = sizeof(reply)};
577	623	struct iov_iter to;
	624	+ int ret = 0;
578	625
579	626	reply.magic = 0;
580	627	iov_iter_kvec(&to, READ \| ITER_KVEC, &iov, 1, sizeof(reply));
@@ -592,8 +639,8 @@ static struct nbd_cmd nbd_read_stat(struct nbd_device nbd, int index) · 11 unmodified lines
592	639	return ERR_PTR(-EPROTO);
593	640	}
594	641
595		− memcpy(&tag, reply.handle, sizeof(u32));
596		−
	642	+ memcpy(&handle, reply.handle, sizeof(handle));
	643	+ tag = nbd_handle_to_tag(handle);
597	644	hwq = blk_mq_unique_tag_to_hwq(tag);
598	645	if (hwq < nbd->tag_set.nr_hw_queues)
599	646	req = blk_mq_tag_to_rq(nbd->tag_set.tags[hwq],
@@ -604,11 +651,25 @@ static struct nbd_cmd nbd_read_stat(struct nbd_device nbd, int index) · 4 unmodified lines
604	651	return ERR_PTR(-ENOENT);
605	652	}
606	653	cmd = blk_mq_rq_to_pdu(req);
	654	+
	655	+ mutex_lock(&cmd->lock);
	656	+ if (cmd->cmd_cookie != nbd_handle_to_cookie(handle)) {
	657	+ dev_err(disk_to_dev(nbd->disk), "Double reply on req %p, cmd_cookie %u, handle cookie %u\n",
	658	+ req, cmd->cmd_cookie, nbd_handle_to_cookie(handle));
	659	+ ret = -ENOENT;
	660	+ goto out;
	661	+ }
	662	+ if (test_bit(NBD_CMD_REQUEUED, &cmd->flags)) {
	663	+ dev_err(disk_to_dev(nbd->disk), "Raced with timeout on req %p\n",
	664	+ req);
	665	+ ret = -ENOENT;
	666	+ goto out;
	667	+ }
607	668	if (ntohl(reply.error)) {
608	669	dev_err(disk_to_dev(nbd->disk), "Other side returned error (%d)\n",
609	670	ntohl(reply.error));
610	671	cmd->status = BLK_STS_IOERR;
611		− return cmd;
	672	+ goto out;
612	673	}
613	674
614	675	dev_dbg(nbd_to_dev(nbd), "request %p: got reply\n", req);
@@ -633,18 +694,18 @@ static struct nbd_cmd nbd_read_stat(struct nbd_device nbd, int index) · 18 unmodified lines
633	694	if (nbd_disconnected(config) \|\|
634	695	config->num_connections <= 1) {
635	696	cmd->status = BLK_STS_IOERR;
636		− return cmd;
	697	+ goto out;
637	698	}
638		− return ERR_PTR(-EIO);
	699	+ ret = -EIO;
	700	+ goto out;
639	701	}
640	702	dev_dbg(nbd_to_dev(nbd), "request %p: got %d bytes data\n",
641	703	req, bvec.bv_len);
642	704	}
643		− } else {
644		− /* See the comment in nbd_queue_rq. */
645		− wait_for_completion(&cmd->send_complete);
646	705	}
647		− return cmd;
	706	+out:
	707	+ mutex_unlock(&cmd->lock);
	708	+ return ret ? ERR_PTR(ret) : cmd;
648	709	}
649	710
650	711	static void recv_work(struct work_struct *work)
@@ -803,7 +864,7 @@ again: · 152 unmodified lines
803	864	*/
804	865	blk_mq_start_request(req);
805	866	if (unlikely(nsock->pending && nsock->pending != req)) {
806		− blk_mq_requeue_request(req, true);
	867	+ nbd_requeue_cmd(cmd);
807	868	ret = 0;
808	869	goto out;
809	870	}
@@ -816,7 +877,7 @@ again: · 6 unmodified lines
816	877	dev_err_ratelimited(disk_to_dev(nbd->disk),
817	878	"Request send failed, requeueing\n");
818	879	nbd_mark_nsock_dead(nbd, nsock, 1);
819		− blk_mq_requeue_request(req, true);
	880	+ nbd_requeue_cmd(cmd);
820	881	ret = 0;
821	882	}
822	883	out:
@@ -840,7 +901,8 @@ static blk_status_t nbd_queue_rq(struct blk_mq_hw_ctx *hctx, · 17 unmodified lines
840	901	* that the server is misbehaving (or there was an error) before we're
841	902	* done sending everything over the wire.
842	903	*/
843		− init_completion(&cmd->send_complete);
	904	+ mutex_lock(&cmd->lock);
	905	+ clear_bit(NBD_CMD_REQUEUED, &cmd->flags);
844	906
845	907	/* We can be called directly from the user space process, which means we
846	908	* could possibly have signals pending so our sendmsg will fail. In
@@ -852,7 +914,7 @@ static blk_status_t nbd_queue_rq(struct blk_mq_hw_ctx *hctx, · 5 unmodified lines
852	914	ret = BLK_STS_IOERR;
853	915	else if (!ret)
854	916	ret = BLK_STS_OK;
855		− complete(&cmd->send_complete);
	917	+ mutex_unlock(&cmd->lock);
856	918
857	919	return ret;
858	920	}
@@ -1305,6 +1367,12 @@ out: · 446 unmodified lines
1305	1367	static void nbd_release(struct gendisk *disk, fmode_t mode)
1306	1368	{
1307	1369	struct nbd_device *nbd = disk->private_data;
	1370	+ struct block_device *bdev = bdget_disk(disk, 0);
	1371	+
	1372	+ if (test_bit(NBD_DISCONNECT_ON_CLOSE, &nbd->config->runtime_flags) &&
	1373	+ bdev->bd_openers == 0)
	1374	+ nbd_disconnect_and_put(nbd);
	1375	+
1308	1376	nbd_config_put(nbd);
1309	1377	nbd_put(nbd);
1310	1378	}
@@ -1452,6 +1520,8 @@ static int nbd_init_request(struct blk_mq_tag_set set, struct request rq, · 141 unmodified lines
1452	1520	{
1453	1521	struct nbd_cmd *cmd = blk_mq_rq_to_pdu(rq);
1454	1522	cmd->nbd = set->driver_data;
	1523	+ cmd->flags = 0;
	1524	+ mutex_init(&cmd->lock);
1455	1525	return 0;
1456	1526	}
1457	1527
@@ -1705,6 +1775,10 @@ again: · 247 unmodified lines
1705	1775	&config->runtime_flags);
1706	1776	put_dev = true;
1707	1777	}
	1778	+ if (flags & NBD_CFLAG_DISCONNECT_ON_CLOSE) {
	1779	+ set_bit(NBD_DISCONNECT_ON_CLOSE,
	1780	+ &config->runtime_flags);
	1781	+ }
1708	1782	}
1709	1783
1710	1784	if (info->attrs[NBD_ATTR_SOCKETS]) {
@@ -1749,6 +1823,17 @@ out: · 38 unmodified lines
1749	1823	return ret;
1750	1824	}
1751	1825
	1826	+static void nbd_disconnect_and_put(struct nbd_device *nbd)
	1827	+{
	1828	+ mutex_lock(&nbd->config_lock);
	1829	+ nbd_disconnect(nbd);
	1830	+ nbd_clear_sock(nbd);
	1831	+ mutex_unlock(&nbd->config_lock);
	1832	+ if (test_and_clear_bit(NBD_HAS_CONFIG_REF,
	1833	+ &nbd->config->runtime_flags))
	1834	+ nbd_config_put(nbd);
	1835	+}
	1836	+
1752	1837	static int nbd_genl_disconnect(struct sk_buff skb, struct genl_info info)
1753	1838	{
1754	1839	struct nbd_device *nbd;
@@ -1781,13 +1866,7 @@ static int nbd_genl_disconnect(struct sk_buff skb, struct genl_info info) · 26 unmodified lines
1781	1866	nbd_put(nbd);
1782	1867	return 0;
1783	1868	}
1784		− mutex_lock(&nbd->config_lock);
1785		− nbd_disconnect(nbd);
1786		− nbd_clear_sock(nbd);
1787		− mutex_unlock(&nbd->config_lock);
1788		− if (test_and_clear_bit(NBD_HAS_CONFIG_REF,
1789		− &nbd->config->runtime_flags))
1790		− nbd_config_put(nbd);
	1869	+ nbd_disconnect_and_put(nbd);
1791	1870	nbd_config_put(nbd);
1792	1871	nbd_put(nbd);
1793	1872	return 0;
@@ -1798,7 +1877,7 @@ static int nbd_genl_reconfigure(struct sk_buff skb, struct genl_info info) · 4 unmodified lines
1798	1877	struct nbd_device *nbd = NULL;
1799	1878	struct nbd_config *config;
1800	1879	int index;
1801		− int ret = -EINVAL;
	1880	+ int ret = 0;
1802	1881	bool put_dev = false;
1803	1882
1804	1883	if (!netlink_capable(skb, CAP_SYS_ADMIN))
@@ -1838,6 +1917,7 @@ static int nbd_genl_reconfigure(struct sk_buff skb, struct genl_info info) · 33 unmodified lines
1838	1917	!nbd->task_recv) {
1839	1918	dev_err(nbd_to_dev(nbd),
1840	1919	"not configured, cannot reconfigure\n");
	1920	+ ret = -EINVAL;
1841	1921	goto out;
1842	1922	}
1843	1923
@@ -1862,6 +1942,14 @@ static int nbd_genl_reconfigure(struct sk_buff skb, struct genl_info info) · 18 unmodified lines
1862	1942	&config->runtime_flags))
1863	1943	refcount_inc(&nbd->refs);
1864	1944	}
	1945	+
	1946	+ if (flags & NBD_CFLAG_DISCONNECT_ON_CLOSE) {
	1947	+ set_bit(NBD_DISCONNECT_ON_CLOSE,
	1948	+ &config->runtime_flags);
	1949	+ } else {
	1950	+ clear_bit(NBD_DISCONNECT_ON_CLOSE,
	1951	+ &config->runtime_flags);
	1952	+ }
1865	1953	}
1866	1954
1867	1955	if (info->attrs[NBD_ATTR_SOCKETS]) {

drivers/block/null_blk.c+1−1

@@ -1365,7 +1365,7 @@ static blk_qc_t null_queue_bio(struct request_queue q, struct bio bio) · 1364 unmodified lines
1365	1365	static enum blk_eh_timer_return null_rq_timed_out_fn(struct request *rq)
1366	1366	{
1367	1367	pr_info("null: rq %p timed out\n", rq);
1368		− blk_mq_complete_request(rq);
	1368	+ __blk_complete_request(rq);
1369	1369	return BLK_EH_DONE;
1370	1370	}
1371	1371

drivers/block/zram/zram_drv.c+14−1

@@ -298,7 +298,8 @@ static void reset_bdev(struct zram *zram) · 297 unmodified lines
298	298	zram->backing_dev = NULL;
299	299	zram->old_block_size = 0;
300	300	zram->bdev = NULL;
301		−
	301	+ zram->disk->queue->backing_dev_info->capabilities \|=
	302	+ BDI_CAP_SYNCHRONOUS_IO;
302	303	kvfree(zram->bitmap);
303	304	zram->bitmap = NULL;
304	305	}
@@ -400,6 +401,18 @@ static ssize_t backing_dev_store(struct device *dev, · 95 unmodified lines
400	401	zram->backing_dev = backing_dev;
401	402	zram->bitmap = bitmap;
402	403	zram->nr_pages = nr_pages;
	404	+ /*
	405	+ * With writeback feature, zram does asynchronous IO so it's no longer
	406	+ * synchronous device so let's remove synchronous io flag. Othewise,
	407	+ * upper layer(e.g., swap) could wait IO completion rather than
	408	+ * (submit and return), which will cause system sluggish.
	409	+ * Furthermore, when the IO function returns(e.g., swap_readpage),
	410	+ * upper layer expects IO was done so it could deallocate the page
	411	+ * freely but in fact, IO is going on so finally could cause
	412	+ * use-after-free when the IO is really done.
	413	+ */
	414	+ zram->disk->queue->backing_dev_info->capabilities &=
	415	+ ~BDI_CAP_SYNCHRONOUS_IO;
403	416	up_write(&zram->init_lock);
404	417
405	418	pr_info("setup backing device %s\n", file_name);

drivers/bluetooth/hci_nokia.c+1−1

@@ -29,7 +29,7 @@ · 28 unmodified lines
29	29	#include <linux/slab.h>
30	30	#include <linux/string.h>
31	31	#include <linux/types.h>
32		−#include <linux/unaligned/le_struct.h>
	32	+#include <asm/unaligned.h>
33	33	#include <net/bluetooth/bluetooth.h>
34	34	#include <net/bluetooth/hci_core.h>
35	35

drivers/bus/ti-sysc.c+4−4

@@ -169,9 +169,9 @@ static int sysc_get_clocks(struct sysc *ddata) · 168 unmodified lines
169	169	const char *name;
170	170	int nr_fck = 0, nr_ick = 0, i, error = 0;
171	171
172		− ddata->clock_roles = devm_kzalloc(ddata->dev,
173		− sizeof(ddata->clock_roles)
	172	+ ddata->clock_roles = devm_kcalloc(ddata->dev,
174	173	SYSC_MAX_CLOCKS,
	174	+ sizeof(*ddata->clock_roles),
175	175	GFP_KERNEL);
176	176	if (!ddata->clock_roles)
177	177	return -ENOMEM;
@@ -200,8 +200,8 @@ static int sysc_get_clocks(struct sysc *ddata) · 22 unmodified lines
200	200	return -EINVAL;
201	201	}
202	202
203		− ddata->clocks = devm_kzalloc(ddata->dev,
204		− sizeof(ddata->clocks) ddata->nr_clocks,
	203	+ ddata->clocks = devm_kcalloc(ddata->dev,
	204	+ ddata->nr_clocks, sizeof(*ddata->clocks),
205	205	GFP_KERNEL);
206	206	if (!ddata->clocks)
207	207	return -ENOMEM;

drivers/char/agp/alpha-agp.c+1−1

@@ -11,7 +11,7 @@ · 10 unmodified lines
11	11
12	12	#include "agp.h"
13	13
14		−static int alpha_core_agp_vm_fault(struct vm_fault *vmf)
	14	+static vm_fault_t alpha_core_agp_vm_fault(struct vm_fault *vmf)
15	15	{
16	16	alpha_agp_info *agp = agp_bridge->dev_private_data;
17	17	dma_addr_t dma_addr;

drivers/char/agp/amd64-agp.c+2−2

@@ -156,7 +156,7 @@ static u64 amd64_configure(struct pci_dev *hammer, u64 gatt_table) · 155 unmodified lines
156	156
157	157	/* Address to map to */
158	158	pci_read_config_dword(hammer, AMD64_GARTAPERTUREBASE, &tmp);
159		− aperturebase = tmp << 25;
	159	+ aperturebase = (u64)tmp << 25;
160	160	aper_base = (aperturebase & PCI_BASE_ADDRESS_MEM_MASK);
161	161
162	162	enable_gart_translation(hammer, gatt_table);
@@ -277,7 +277,7 @@ static int fix_northbridge(struct pci_dev nb, struct pci_dev agp, u16 cap) · 114 unmodified lines
277	277	pci_read_config_dword(nb, AMD64_GARTAPERTURECTL, &nb_order);
278	278	nb_order = (nb_order >> 1) & 7;
279	279	pci_read_config_dword(nb, AMD64_GARTAPERTUREBASE, &nb_base);
280		− nb_aper = nb_base << 25;
	280	+ nb_aper = (u64)nb_base << 25;
281	281
282	282	/* Northbridge seems to contain crap. Try the AGP bridge. */
283	283

drivers/char/hw_random/core.c+9−2

@@ -516,11 +516,18 @@ EXPORT_SYMBOL_GPL(hwrng_register); · 515 unmodified lines
516	516
517	517	void hwrng_unregister(struct hwrng *rng)
518	518	{
	519	+ int err;
	520	+
519	521	mutex_lock(&rng_mutex);
520	522
521	523	list_del(&rng->list);
522		− if (current_rng == rng)
523		− enable_best_rng();
	524	+ if (current_rng == rng) {
	525	+ err = enable_best_rng();
	526	+ if (err) {
	527	+ drop_current_rng();
	528	+ cur_rng_set_by_user = 0;
	529	+ }
	530	+ }
524	531
525	532	if (list_empty(&rng_list)) {
526	533	mutex_unlock(&rng_mutex);

drivers/char/ipmi/ipmi_si_intf.c+4−2

@@ -2088,8 +2088,10 @@ static int try_smi_init(struct smi_info *new_smi) · 2087 unmodified lines
2088	2088	return 0;
2089	2089
2090	2090	out_err:
2091		− ipmi_unregister_smi(new_smi->intf);
2092		− new_smi->intf = NULL;
	2091	+ if (new_smi->intf) {
	2092	+ ipmi_unregister_smi(new_smi->intf);
	2093	+ new_smi->intf = NULL;
	2094	+ }
2093	2095
2094	2096	kfree(init_name);
2095	2097

drivers/char/ipmi/kcs_bmc.c+10−21

@@ -210,34 +210,23 @@ static void kcs_bmc_handle_cmd(struct kcs_bmc *kcs_bmc) · 209 unmodified lines
210	210	int kcs_bmc_handle_event(struct kcs_bmc *kcs_bmc)
211	211	{
212	212	unsigned long flags;
213		− int ret = 0;
	213	+ int ret = -ENODATA;
214	214	u8 status;
215	215
216	216	spin_lock_irqsave(&kcs_bmc->lock, flags);
217	217
218		− if (!kcs_bmc->running) {
219		− kcs_force_abort(kcs_bmc);
220		− ret = -ENODEV;
221		− goto out_unlock;
222		− }
223		−
224		− status = read_status(kcs_bmc) & (KCS_STATUS_IBF \| KCS_STATUS_CMD_DAT);
225		−
226		− switch (status) {
227		− case KCS_STATUS_IBF \| KCS_STATUS_CMD_DAT:
228		− kcs_bmc_handle_cmd(kcs_bmc);
229		− break;
230		−
231		− case KCS_STATUS_IBF:
232		− kcs_bmc_handle_data(kcs_bmc);
233		− break;
	218	+ status = read_status(kcs_bmc);
	219	+ if (status & KCS_STATUS_IBF) {
	220	+ if (!kcs_bmc->running)
	221	+ kcs_force_abort(kcs_bmc);
	222	+ else if (status & KCS_STATUS_CMD_DAT)
	223	+ kcs_bmc_handle_cmd(kcs_bmc);
	224	+ else
	225	+ kcs_bmc_handle_data(kcs_bmc);
234	226
235		− default:
236		− ret = -ENODATA;
237		− break;
	227	+ ret = 0;
238	228	}
239	229
240		−out_unlock:
241	230	spin_unlock_irqrestore(&kcs_bmc->lock, flags);
242	231
243	232	return ret;

drivers/char/mem.c+1−0

@@ -708,6 +708,7 @@ static int mmap_zero(struct file file, struct vm_area_struct vma) · 707 unmodified lines
708	708	#endif
709	709	if (vma->vm_flags & VM_SHARED)
710	710	return shmem_zero_setup(vma);
	711	+ vma_set_anonymous(vma);
711	712	return 0;
712	713	}
713	714

drivers/char/random.c+22−17

@@ -402,7 +402,8 @@ static struct poolinfo { · 401 unmodified lines
402	402	/*
403	403	* Static global variables
404	404	*/
405		−static DECLARE_WAIT_QUEUE_HEAD(random_wait);
	405	+static DECLARE_WAIT_QUEUE_HEAD(random_read_wait);
	406	+static DECLARE_WAIT_QUEUE_HEAD(random_write_wait);
406	407	static struct fasync_struct *fasync;
407	408
408	409	static DEFINE_SPINLOCK(random_ready_list_lock);
@@ -721,8 +722,8 @@ retry: · 312 unmodified lines
721	722
722	723	/* should we wake readers? */
723	724	if (entropy_bits >= random_read_wakeup_bits &&
724		− wq_has_sleeper(&random_wait)) {
725		− wake_up_interruptible_poll(&random_wait, POLLIN);
	725	+ wq_has_sleeper(&random_read_wait)) {
	726	+ wake_up_interruptible(&random_read_wait);
726	727	kill_fasync(&fasync, SIGIO, POLL_IN);
727	728	}
728	729	/* If the input pool is getting full, send some
@@ -1396,7 +1397,7 @@ retry: · 667 unmodified lines
1396	1397	trace_debit_entropy(r->name, 8 * ibytes);
1397	1398	if (ibytes &&
1398	1399	(r->entropy_count >> ENTROPY_SHIFT) < random_write_wakeup_bits) {
1399		− wake_up_interruptible_poll(&random_wait, POLLOUT);
	1400	+ wake_up_interruptible(&random_write_wait);
1400	1401	kill_fasync(&fasync, SIGIO, POLL_OUT);
1401	1402	}
1402	1403
@@ -1838,7 +1839,7 @@ _random_read(int nonblock, char __user *buf, size_t nbytes) · 435 unmodified lines
1838	1839	if (nonblock)
1839	1840	return -EAGAIN;
1840	1841
1841		− wait_event_interruptible(random_wait,
	1842	+ wait_event_interruptible(random_read_wait,
1842	1843	ENTROPY_BITS(&input_pool) >=
1843	1844	random_read_wakeup_bits);
1844	1845	if (signal_pending(current))
@@ -1875,17 +1876,14 @@ urandom_read(struct file file, char __user buf, size_t nbytes, loff_t *ppos) · 30 unmodified lines
1875	1876	return ret;
1876	1877	}
1877	1878
1878		−static struct wait_queue_head *
1879		−random_get_poll_head(struct file *file, __poll_t events)
1880		−{
1881		− return &random_wait;
1882		−}
1883		−
1884	1879	static __poll_t
1885		−random_poll_mask(struct file *file, __poll_t events)
	1880	+random_poll(struct file file, poll_table wait)
1886	1881	{
1887		− __poll_t mask = 0;
	1882	+ __poll_t mask;
1888	1883
	1884	+ poll_wait(file, &random_read_wait, wait);
	1885	+ poll_wait(file, &random_write_wait, wait);
	1886	+ mask = 0;
1889	1887	if (ENTROPY_BITS(&input_pool) >= random_read_wakeup_bits)
1890	1888	mask \|= EPOLLIN \| EPOLLRDNORM;
1891	1889	if (ENTROPY_BITS(&input_pool) < random_write_wakeup_bits)
@@ -1897,14 +1895,22 @@ static int · 5 unmodified lines
1897	1895	write_pool(struct entropy_store r, const char __user buffer, size_t count)
1898	1896	{
1899	1897	size_t bytes;
1900		− __u32 buf[16];
	1898	+ __u32 t, buf[16];
1901	1899	const char __user *p = buffer;
1902	1900
1903	1901	while (count > 0) {
	1902	+ int b, i = 0;
	1903	+
1904	1904	bytes = min(count, sizeof(buf));
1905	1905	if (copy_from_user(&buf, p, bytes))
1906	1906	return -EFAULT;
1907	1907
	1908	+ for (b = bytes ; b > 0 ; b -= sizeof(__u32), i++) {
	1909	+ if (!arch_get_random_int(&t))
	1910	+ break;
	1911	+ buf[i] ^= t;
	1912	+ }
	1913	+
1908	1914	count -= bytes;
1909	1915	p += bytes;
1910	1916
@@ -1992,8 +1998,7 @@ static int random_fasync(int fd, struct file *filp, int on) · 81 unmodified lines
1992	1998	const struct file_operations random_fops = {
1993	1999	.read = random_read,
1994	2000	.write = random_write,
1995		− .get_poll_head = random_get_poll_head,
1996		− .poll_mask = random_poll_mask,
	2001	+ .poll = random_poll,
1997	2002	.unlocked_ioctl = random_ioctl,
1998	2003	.fasync = random_fasync,
1999	2004	.llseek = noop_llseek,
@@ -2326,7 +2331,7 @@ void add_hwgenerator_randomness(const char *buffer, size_t count, · 326 unmodified lines
2326	2331	* We'll be woken up again once below random_write_wakeup_thresh,
2327	2332	* or when the calling thread is about to terminate.
2328	2333	*/
2329		− wait_event_interruptible(random_wait, kthread_should_stop() \|\|
	2334	+ wait_event_interruptible(random_write_wait, kthread_should_stop() \|\|
2330	2335	ENTROPY_BITS(&input_pool) <= random_write_wakeup_bits);
2331	2336	mix_pool_bytes(poolp, buffer, count);
2332	2337	credit_entropy_bits(poolp, entropy);

drivers/clk/Makefile+1−1

@@ -96,7 +96,7 @@ obj-$(CONFIG_ARCH_SPRD) += sprd/ · 95 unmodified lines
96	96	obj-$(CONFIG_ARCH_STI) += st/
97	97	obj-$(CONFIG_ARCH_STRATIX10) += socfpga/
98	98	obj-$(CONFIG_ARCH_SUNXI) += sunxi/
99		−obj-$(CONFIG_ARCH_SUNXI) += sunxi-ng/
	99	+obj-$(CONFIG_SUNXI_CCU) += sunxi-ng/
100	100	obj-$(CONFIG_ARCH_TEGRA) += tegra/
101	101	obj-y += ti/
102	102	obj-$(CONFIG_CLK_UNIPHIER) += uniphier/

drivers/clk/clk-aspeed.c+44−15

@@ -24,7 +24,7 @@ · 23 unmodified lines
24	24	#define ASPEED_MPLL_PARAM 0x20
25	25	#define ASPEED_HPLL_PARAM 0x24
26	26	#define AST2500_HPLL_BYPASS_EN BIT(20)
27		−#define AST2400_HPLL_STRAPPED BIT(18)
	27	+#define AST2400_HPLL_PROGRAMMED BIT(18)
28	28	#define AST2400_HPLL_BYPASS_EN BIT(17)
29	29	#define ASPEED_MISC_CTRL 0x2c
30	30	#define UART_DIV13_EN BIT(12)
@@ -91,8 +91,8 @@ static const struct aspeed_gate_data aspeed_gates[] = { · 60 unmodified lines
91	91	[ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
92	92	[ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
93	93	[ASPEED_CLK_GATE_VCLK] = { 3, 6, "vclk-gate", NULL, 0 }, /* Video Capture */
94		− [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", 0 }, /* PCIe/PCI */
95		− [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, 0 }, /* DAC */
	94	+ [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */
	95	+ [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
96	96	[ASPEED_CLK_GATE_REFCLK] = { 6, -1, "refclk-gate", "clkin", CLK_IS_CRITICAL },
97	97	[ASPEED_CLK_GATE_USBPORT2CLK] = { 7, 3, "usb-port2-gate", NULL, 0 }, /* USB2.0 Host port 2 */
98	98	[ASPEED_CLK_GATE_LCLK] = { 8, 5, "lclk-gate", NULL, 0 }, /* LPC */
@@ -212,9 +212,22 @@ static int aspeed_clk_is_enabled(struct clk_hw *hw) · 113 unmodified lines
212	212	{
213	213	struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw);
214	214	u32 clk = BIT(gate->clock_idx);
	215	+ u32 rst = BIT(gate->reset_idx);
215	216	u32 enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk;
216	217	u32 reg;
217	218
	219	+ /*
	220	+ * If the IP is in reset, treat the clock as not enabled,
	221	+ * this happens with some clocks such as the USB one when
	222	+ * coming from cold reset. Without this, aspeed_clk_enable()
	223	+ * will fail to lift the reset.
	224	+ */
	225	+ if (gate->reset_idx >= 0) {
	226	+ regmap_read(gate->map, ASPEED_RESET_CTRL, &reg);
	227	+ if (reg & rst)
	228	+ return 0;
	229	+ }
	230	+
218	231	regmap_read(gate->map, ASPEED_CLK_STOP_CTRL, &reg);
219	232
220	233	return ((reg & clk) == enval) ? 1 : 0;
@@ -565,29 +578,45 @@ builtin_platform_driver(aspeed_clk_driver); · 344 unmodified lines
565	578	static void __init aspeed_ast2400_cc(struct regmap *map)
566	579	{
567	580	struct clk_hw *hw;
568		− u32 val, freq, div;
	581	+ u32 val, div, clkin, hpll;
	582	+ const u16 hpll_rates[][4] = {
	583	+ {384, 360, 336, 408},
	584	+ {400, 375, 350, 425},
	585	+ };
	586	+ int rate;
569	587
570	588	/*
571	589	* CLKIN is the crystal oscillator, 24, 48 or 25MHz selected by
572	590	* strapping
573	591	*/
574	592	regmap_read(map, ASPEED_STRAP, &val);
575		− if (val & CLKIN_25MHZ_EN)
576		− freq = 25000000;
577		− else if (val & AST2400_CLK_SOURCE_SEL)
578		− freq = 48000000;
579		− else
580		− freq = 24000000;
581		− hw = clk_hw_register_fixed_rate(NULL, "clkin", NULL, 0, freq);
582		− pr_debug("clkin @%u MHz\n", freq / 1000000);
	593	+ rate = (val >> 8) & 3;
	594	+ if (val & CLKIN_25MHZ_EN) {
	595	+ clkin = 25000000;
	596	+ hpll = hpll_rates[1][rate];
	597	+ } else if (val & AST2400_CLK_SOURCE_SEL) {
	598	+ clkin = 48000000;
	599	+ hpll = hpll_rates[0][rate];
	600	+ } else {
	601	+ clkin = 24000000;
	602	+ hpll = hpll_rates[0][rate];
	603	+ }
	604	+ hw = clk_hw_register_fixed_rate(NULL, "clkin", NULL, 0, clkin);
	605	+ pr_debug("clkin @%u MHz\n", clkin / 1000000);
583	606
584	607	/*
585	608	* High-speed PLL clock derived from the crystal. This the CPU clock,
586		− * and we assume that it is enabled
	609	+ * and we assume that it is enabled. It can be configured through the
	610	+ * HPLL_PARAM register, or set to a specified frequency by strapping.
587	611	*/
588	612	regmap_read(map, ASPEED_HPLL_PARAM, &val);
589		− WARN(val & AST2400_HPLL_STRAPPED, "hpll is strapped not configured");
590		− aspeed_clk_data->hws[ASPEED_CLK_HPLL] = aspeed_ast2400_calc_pll("hpll", val);
	613	+ if (val & AST2400_HPLL_PROGRAMMED)
	614	+ hw = aspeed_ast2400_calc_pll("hpll", val);
	615	+ else
	616	+ hw = clk_hw_register_fixed_rate(NULL, "hpll", "clkin", 0,
	617	+ hpll * 1000000);
	618	+
	619	+ aspeed_clk_data->hws[ASPEED_CLK_HPLL] = hw;
591	620
592	621	/*
593	622	* Strap bits 11:10 define the CPU/AHB clock frequency ratio (aka HCLK)

drivers/clk/clk.c+1−2

@@ -24,7 +24,6 @@ · 23 unmodified lines
24	24	#include <linux/pm_runtime.h>
25	25	#include <linux/sched.h>
26	26	#include <linux/clkdev.h>
27		−#include <linux/stringify.h>
28	27
29	28	#include "clk.h"
30	29
@@ -2559,7 +2558,7 @@ static const struct { · 2528 unmodified lines
2559	2558	unsigned long flag;
2560	2559	const char *name;
2561	2560	} clk_flags[] = {
2562		−#define ENTRY(f) { f, __stringify(f) }
	2561	+#define ENTRY(f) { f, #f }
2563	2562	ENTRY(CLK_SET_RATE_GATE),
2564	2563	ENTRY(CLK_SET_PARENT_GATE),
2565	2564	ENTRY(CLK_SET_RATE_PARENT),

drivers/clk/davinci/da8xx-cfgchip.c+1−1

@@ -672,7 +672,7 @@ static int of_da8xx_usb_phy_clk_init(struct device dev, struct regmap regmap) · 671 unmodified lines
672	672
673	673	usb1 = da8xx_cfgchip_register_usb1_clk48(dev, regmap);
674	674	if (IS_ERR(usb1)) {
675		− if (PTR_ERR(usb0) == -EPROBE_DEFER)
	675	+ if (PTR_ERR(usb1) == -EPROBE_DEFER)
676	676	return -EPROBE_DEFER;
677	677
678	678	dev_warn(dev, "Failed to register usb1_clk48 (%ld)\n",

drivers/clk/davinci/psc.h+1−1

@@ -107,7 +107,7 @@ extern const struct davinci_psc_init_data of_da850_psc1_init_data; · 106 unmodified lines
107	107	#ifdef CONFIG_ARCH_DAVINCI_DM355
108	108	extern const struct davinci_psc_init_data dm355_psc_init_data;
109	109	#endif
110		−#ifdef CONFIG_ARCH_DAVINCI_DM356
	110	+#ifdef CONFIG_ARCH_DAVINCI_DM365
111	111	extern const struct davinci_psc_init_data dm365_psc_init_data;
112	112	#endif
113	113	#ifdef CONFIG_ARCH_DAVINCI_DM644x

drivers/clk/meson/clk-audio-divider.c+1−1

@@ -51,7 +51,7 @@ static unsigned long audio_divider_recalc_rate(struct clk_hw *hw, · 50 unmodified lines
51	51	struct meson_clk_audio_div_data *adiv = meson_clk_audio_div_data(clk);
52	52	unsigned long divider;
53	53
54		− divider = meson_parm_read(clk->map, &adiv->div);
	54	+ divider = meson_parm_read(clk->map, &adiv->div) + 1;
55	55
56	56	return DIV_ROUND_UP_ULL((u64)parent_rate, divider);
57	57	}

drivers/clk/meson/gxbb.c+1−0

@@ -498,6 +498,7 @@ static struct clk_regmap gxbb_fclk_div2 = { · 497 unmodified lines
498	498	.ops = &clk_regmap_gate_ops,
499	499	.parent_names = (const char *[]){ "fclk_div2_div" },
500	500	.num_parents = 1,
	501	+ .flags = CLK_IS_CRITICAL,
501	502	},
502	503	};
503	504

drivers/clk/mvebu/armada-37xx-periph.c+38−0

@@ -35,6 +35,7 @@ · 34 unmodified lines
35	35	#define CLK_SEL 0x10
36	36	#define CLK_DIS 0x14
37	37
	38	+#define ARMADA_37XX_DVFS_LOAD_1 1
38	39	#define LOAD_LEVEL_NR 4
39	40
40	41	#define ARMADA_37XX_NB_L0L1 0x18
@@ -507,6 +508,40 @@ static long clk_pm_cpu_round_rate(struct clk_hw *hw, unsigned long rate, · 466 unmodified lines
507	508	return -EINVAL;
508	509	}
509	510
	511	+/*
	512	+ * Switching the CPU from the L2 or L3 frequencies (300 and 200 Mhz
	513	+ * respectively) to L0 frequency (1.2 Ghz) requires a significant
	514	+ * amount of time to let VDD stabilize to the appropriate
	515	+ * voltage. This amount of time is large enough that it cannot be
	516	+ * covered by the hardware countdown register. Due to this, the CPU
	517	+ * might start operating at L0 before the voltage is stabilized,
	518	+ * leading to CPU stalls.
	519	+ *
	520	+ * To work around this problem, we prevent switching directly from the
	521	+ * L2/L3 frequencies to the L0 frequency, and instead switch to the L1
	522	+ * frequency in-between. The sequence therefore becomes:
	523	+ * 1. First switch from L2/L3(200/300MHz) to L1(600MHZ)
	524	+ * 2. Sleep 20ms for stabling VDD voltage
	525	+ * 3. Then switch from L1(600MHZ) to L0(1200Mhz).
	526	+ */
	527	+static void clk_pm_cpu_set_rate_wa(unsigned long rate, struct regmap *base)
	528	+{
	529	+ unsigned int cur_level;
	530	+
	531	+ if (rate != 1200 * 1000 * 1000)
	532	+ return;
	533	+
	534	+ regmap_read(base, ARMADA_37XX_NB_CPU_LOAD, &cur_level);
	535	+ cur_level &= ARMADA_37XX_NB_CPU_LOAD_MASK;
	536	+ if (cur_level <= ARMADA_37XX_DVFS_LOAD_1)
	537	+ return;
	538	+
	539	+ regmap_update_bits(base, ARMADA_37XX_NB_CPU_LOAD,
	540	+ ARMADA_37XX_NB_CPU_LOAD_MASK,
	541	+ ARMADA_37XX_DVFS_LOAD_1);
	542	+ msleep(20);
	543	+}
	544	+
510	545	static int clk_pm_cpu_set_rate(struct clk_hw *hw, unsigned long rate,
511	546	unsigned long parent_rate)
512	547	{
@@ -537,6 +572,9 @@ static int clk_pm_cpu_set_rate(struct clk_hw *hw, unsigned long rate, · 24 unmodified lines
537	572	*/
538	573	reg = ARMADA_37XX_NB_CPU_LOAD;
539	574	mask = ARMADA_37XX_NB_CPU_LOAD_MASK;
	575	+
	576	+ clk_pm_cpu_set_rate_wa(rate, base);
	577	+
540	578	regmap_update_bits(base, reg, mask, load_level);
541	579
542	580	return rate;

drivers/clk/qcom/gcc-msm8996.c+1−0

@@ -2781,6 +2781,7 @@ static struct clk_branch gcc_ufs_rx_cfg_clk = { · 2780 unmodified lines
2781	2781
2782	2782	static struct clk_branch gcc_ufs_tx_symbol_0_clk = {
2783	2783	.halt_reg = 0x75018,
	2784	+ .halt_check = BRANCH_HALT_SKIP,
2784	2785	.clkr = {
2785	2786	.enable_reg = 0x75018,
2786	2787	.enable_mask = BIT(0),

drivers/clk/qcom/mmcc-msm8996.c+1−0

@@ -2910,6 +2910,7 @@ static struct gdsc mmagic_bimc_gdsc = { · 2909 unmodified lines
2910	2910	.name = "mmagic_bimc",
2911	2911	},
2912	2912	.pwrsts = PWRSTS_OFF_ON,
	2913	+ .flags = ALWAYS_ON,
2913	2914	};
2914	2915
2915	2916	static struct gdsc mmagic_video_gdsc = {

drivers/clk/sunxi-ng/Makefile+15−24

@@ -1,24 +1,24 @@
1	1	# SPDX-License-Identifier: GPL-2.0
2	2	# Common objects
3		−lib-$(CONFIG_SUNXI_CCU) += ccu_common.o
4		−lib-$(CONFIG_SUNXI_CCU) += ccu_mmc_timing.o
5		−lib-$(CONFIG_SUNXI_CCU) += ccu_reset.o
	3	+obj-y += ccu_common.o
	4	+obj-y += ccu_mmc_timing.o
	5	+obj-y += ccu_reset.o
6	6
7	7	# Base clock types
8		−lib-$(CONFIG_SUNXI_CCU) += ccu_div.o
9		−lib-$(CONFIG_SUNXI_CCU) += ccu_frac.o
10		−lib-$(CONFIG_SUNXI_CCU) += ccu_gate.o
11		−lib-$(CONFIG_SUNXI_CCU) += ccu_mux.o
12		−lib-$(CONFIG_SUNXI_CCU) += ccu_mult.o
13		−lib-$(CONFIG_SUNXI_CCU) += ccu_phase.o
14		−lib-$(CONFIG_SUNXI_CCU) += ccu_sdm.o
	8	+obj-y += ccu_div.o
	9	+obj-y += ccu_frac.o
	10	+obj-y += ccu_gate.o
	11	+obj-y += ccu_mux.o
	12	+obj-y += ccu_mult.o
	13	+obj-y += ccu_phase.o
	14	+obj-y += ccu_sdm.o
15	15
16	16	# Multi-factor clocks
17		−lib-$(CONFIG_SUNXI_CCU) += ccu_nk.o
18		−lib-$(CONFIG_SUNXI_CCU) += ccu_nkm.o
19		−lib-$(CONFIG_SUNXI_CCU) += ccu_nkmp.o
20		−lib-$(CONFIG_SUNXI_CCU) += ccu_nm.o
21		−lib-$(CONFIG_SUNXI_CCU) += ccu_mp.o
	17	+obj-y += ccu_nk.o
	18	+obj-y += ccu_nkm.o
	19	+obj-y += ccu_nkmp.o
	20	+obj-y += ccu_nm.o
	21	+obj-y += ccu_mp.o
22	22
23	23	# SoC support
24	24	obj-$(CONFIG_SUN50I_A64_CCU) += ccu-sun50i-a64.o
@@ -38,12 +38,3 @@ obj-$(CONFIG_SUN8I_R40_CCU) += ccu-sun8i-r40.o · 13 unmodified lines
38	38	obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80.o
39	39	obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80-de.o
40	40	obj-$(CONFIG_SUN9I_A80_CCU) += ccu-sun9i-a80-usb.o
41		−
42		−# The lib-y file goals is supposed to work only in arch/*/lib or lib/. In our
43		−# case, we want to use that goal, but even though lib.a will be properly
44		−# generated, it will not be linked in, eventually resulting in a linker error
45		−# for missing symbols.
46		−#
47		−# We can work around that by explicitly adding lib.a to the obj-y goal. This is
48		−# an undocumented behaviour, but works well for now.
49		−obj-$(CONFIG_SUNXI_CCU) += lib.a

drivers/clocksource/arm_arch_timer.c+1−1

@@ -735,7 +735,7 @@ static void __arch_timer_setup(unsigned type, · 734 unmodified lines
735	735	clk->features \|= CLOCK_EVT_FEAT_DYNIRQ;
736	736	clk->name = "arch_mem_timer";
737	737	clk->rating = 400;
738		− clk->cpumask = cpu_all_mask;
	738	+ clk->cpumask = cpu_possible_mask;
739	739	if (arch_timer_mem_use_virtual) {
740	740	clk->set_state_shutdown = arch_timer_shutdown_virt_mem;
741	741	clk->set_state_oneshot_stopped = arch_timer_shutdown_virt_mem;

drivers/clocksource/timer-stm32.c+3−1

@@ -304,8 +304,10 @@ static int __init stm32_timer_init(struct device_node *node) · 303 unmodified lines
304	304
305	305	to->private_data = kzalloc(sizeof(struct stm32_timer_private),
306	306	GFP_KERNEL);
307		− if (!to->private_data)
	307	+ if (!to->private_data) {
	308	+ ret = -ENOMEM;
308	309	goto deinit;
	310	+ }
309	311
310	312	rstc = of_reset_control_get(node, NULL);
311	313	if (!IS_ERR(rstc)) {

drivers/cpufreq/intel_pstate.c+53−8

@@ -294,6 +294,7 @@ struct pstate_funcs { · 293 unmodified lines
294	294	static struct pstate_funcs pstate_funcs __read_mostly;
295	295
296	296	static int hwp_active __read_mostly;
	297	+static int hwp_mode_bdw __read_mostly;
297	298	static bool per_cpu_limits __read_mostly;
298	299	static bool hwp_boost __read_mostly;
299	300
@@ -310,12 +311,20 @@ static DEFINE_MUTEX(intel_pstate_limits_lock); · 10 unmodified lines
310	311
311	312	#ifdef CONFIG_ACPI
312	313
313		−static bool intel_pstate_get_ppc_enable_status(void)
	314	+static bool intel_pstate_acpi_pm_profile_server(void)
314	315	{
315	316	if (acpi_gbl_FADT.preferred_profile == PM_ENTERPRISE_SERVER \|\|
316	317	acpi_gbl_FADT.preferred_profile == PM_PERFORMANCE_SERVER)
317	318	return true;
318	319
	320	+ return false;
	321	+}
	322	+
	323	+static bool intel_pstate_get_ppc_enable_status(void)
	324	+{
	325	+ if (intel_pstate_acpi_pm_profile_server())
	326	+ return true;
	327	+
319	328	return acpi_ppc;
320	329	}
321	330
@@ -458,6 +467,11 @@ static inline void intel_pstate_init_acpi_perf_limits(struct cpufreq_policy *pol · 136 unmodified lines
458	467	static inline void intel_pstate_exit_perf_limits(struct cpufreq_policy *policy)
459	468	{
460	469	}
	470	+
	471	+static inline bool intel_pstate_acpi_pm_profile_server(void)
	472	+{
	473	+ return false;
	474	+}
461	475	#endif
462	476
463	477	static inline void update_turbo_state(void)
@@ -1413,7 +1427,15 @@ static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) · 949 unmodified lines
1413	1427	cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
1414	1428	cpu->pstate.scaling = pstate_funcs.get_scaling();
1415	1429	cpu->pstate.max_freq = cpu->pstate.max_pstate * cpu->pstate.scaling;
1416		− cpu->pstate.turbo_freq = cpu->pstate.turbo_pstate * cpu->pstate.scaling;
	1430	+
	1431	+ if (hwp_active && !hwp_mode_bdw) {
	1432	+ unsigned int phy_max, current_max;
	1433	+
	1434	+ intel_pstate_get_hwp_max(cpu->cpu, &phy_max, &current_max);
	1435	+ cpu->pstate.turbo_freq = phy_max * cpu->pstate.scaling;
	1436	+ } else {
	1437	+ cpu->pstate.turbo_freq = cpu->pstate.turbo_pstate * cpu->pstate.scaling;
	1438	+ }
1417	1439
1418	1440	if (pstate_funcs.get_aperf_mperf_shift)
1419	1441	cpu->aperf_mperf_shift = pstate_funcs.get_aperf_mperf_shift();
@@ -1832,7 +1854,7 @@ static int intel_pstate_init_cpu(unsigned int cpunum) · 412 unmodified lines
1832	1854	intel_pstate_hwp_enable(cpu);
1833	1855
1834	1856	id = x86_match_cpu(intel_pstate_hwp_boost_ids);
1835		− if (id)
	1857	+ if (id && intel_pstate_acpi_pm_profile_server())
1836	1858	hwp_boost = true;
1837	1859	}
1838	1860
@@ -2385,6 +2407,18 @@ static bool __init intel_pstate_no_acpi_pss(void) · 546 unmodified lines
2385	2407	return true;
2386	2408	}
2387	2409
	2410	+static bool __init intel_pstate_no_acpi_pcch(void)
	2411	+{
	2412	+ acpi_status status;
	2413	+ acpi_handle handle;
	2414	+
	2415	+ status = acpi_get_handle(NULL, "\\_SB", &handle);
	2416	+ if (ACPI_FAILURE(status))
	2417	+ return true;
	2418	+
	2419	+ return !acpi_has_method(handle, "PCCH");
	2420	+}
	2421	+
2388	2422	static bool __init intel_pstate_has_acpi_ppc(void)
2389	2423	{
2390	2424	int i;
@@ -2444,7 +2478,10 @@ static bool __init intel_pstate_platform_pwr_mgmt_exists(void) · 53 unmodified lines
2444	2478
2445	2479	switch (plat_info[idx].data) {
2446	2480	case PSS:
2447		− return intel_pstate_no_acpi_pss();
	2481	+ if (!intel_pstate_no_acpi_pss())
	2482	+ return false;
	2483	+
	2484	+ return intel_pstate_no_acpi_pcch();
2448	2485	case PPC:
2449	2486	return intel_pstate_has_acpi_ppc() && !force_load;
2450	2487	}
@@ -2467,28 +2504,36 @@ static inline bool intel_pstate_has_acpi_ppc(void) { return false; } · 16 unmodified lines
2467	2504	static inline void intel_pstate_request_control_from_smm(void) {}
2468	2505	#endif /* CONFIG_ACPI */
2469	2506
	2507	+#define INTEL_PSTATE_HWP_BROADWELL 0x01
	2508	+
	2509	+#define ICPU_HWP(model, hwp_mode) \
	2510	+ { X86_VENDOR_INTEL, 6, model, X86_FEATURE_HWP, hwp_mode }
	2511	+
2470	2512	static const struct x86_cpu_id hwp_support_ids[] __initconst = {
2471		− { X86_VENDOR_INTEL, 6, X86_MODEL_ANY, X86_FEATURE_HWP },
	2513	+ ICPU_HWP(INTEL_FAM6_BROADWELL_X, INTEL_PSTATE_HWP_BROADWELL),
	2514	+ ICPU_HWP(INTEL_FAM6_BROADWELL_XEON_D, INTEL_PSTATE_HWP_BROADWELL),
	2515	+ ICPU_HWP(X86_MODEL_ANY, 0),
2472	2516	{}
2473	2517	};
2474	2518
2475	2519	static int __init intel_pstate_init(void)
2476	2520	{
	2521	+ const struct x86_cpu_id *id;
2477	2522	int rc;
2478	2523
2479	2524	if (no_load)
2480	2525	return -ENODEV;
2481	2526
2482		− if (x86_match_cpu(hwp_support_ids)) {
	2527	+ id = x86_match_cpu(hwp_support_ids);
	2528	+ if (id) {
2483	2529	copy_cpu_funcs(&core_funcs);
2484	2530	if (!no_hwp) {
2485	2531	hwp_active++;
	2532	+ hwp_mode_bdw = id->driver_data;
2486	2533	intel_pstate.attr = hwp_cpufreq_attrs;
2487	2534	goto hwp_cpu_matched;
2488	2535	}
2489	2536	} else {
2490		− const struct x86_cpu_id *id;
2491		−
2492	2537	id = x86_match_cpu(intel_pstate_cpu_ids);
2493	2538	if (!id)
2494	2539	return -ENODEV;

drivers/cpufreq/pcc-cpufreq.c+4−0

@@ -580,6 +580,10 @@ static int __init pcc_cpufreq_init(void) · 579 unmodified lines
580	580	{
581	581	int ret;
582	582
	583	+ /* Skip initialization if another cpufreq driver is there. */
	584	+ if (cpufreq_get_current_driver())
	585	+ return 0;
	586	+
583	587	if (acpi_disabled)
584	588	return 0;
585	589

drivers/cpufreq/qcom-cpufreq-kryo.c+27−7

@@ -42,6 +42,8 @@ enum _msm8996_version { · 41 unmodified lines
42	42	NUM_OF_MSM8996_VERSIONS,
43	43	};
44	44
	45	+struct platform_device cpufreq_dt_pdev, kryo_cpufreq_pdev;
	46	+
45	47	static enum _msm8996_version __init qcom_cpufreq_kryo_get_msm_id(void)
46	48	{
47	49	size_t len;
@@ -74,7 +76,6 @@ static enum _msm8996_version __init qcom_cpufreq_kryo_get_msm_id(void) · 26 unmodified lines
74	76	static int qcom_cpufreq_kryo_probe(struct platform_device *pdev)
75	77	{
76	78	struct opp_table *opp_tables[NR_CPUS] = {0};
77		− struct platform_device *cpufreq_dt_pdev;
78	79	enum _msm8996_version msm8996_version;
79	80	struct nvmem_cell *speedbin_nvmem;
80	81	struct device_node *np;
@@ -86,8 +87,8 @@ static int qcom_cpufreq_kryo_probe(struct platform_device *pdev) · 5 unmodified lines
86	87	int ret;
87	88
88	89	cpu_dev = get_cpu_device(0);
89		− if (NULL == cpu_dev)
90		− ret = -ENODEV;
	90	+ if (!cpu_dev)
	91	+ return -ENODEV;
91	92
92	93	msm8996_version = qcom_cpufreq_kryo_get_msm_id();
93	94	if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
@@ -96,8 +97,8 @@ static int qcom_cpufreq_kryo_probe(struct platform_device *pdev) · 2 unmodified lines
96	97	}
97	98
98	99	np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
99		− if (IS_ERR(np))
100		− return PTR_ERR(np);
	100	+ if (!np)
	101	+ return -ENOENT;
101	102
102	103	ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
103	104	if (!ret) {
@@ -115,6 +116,8 @@ static int qcom_cpufreq_kryo_probe(struct platform_device *pdev) · 11 unmodified lines
115	116
116	117	speedbin = nvmem_cell_read(speedbin_nvmem, &len);
117	118	nvmem_cell_put(speedbin_nvmem);
	119	+ if (IS_ERR(speedbin))
	120	+ return PTR_ERR(speedbin);
118	121
119	122	switch (msm8996_version) {
120	123	case MSM8996_V3:
@@ -127,6 +130,7 @@ static int qcom_cpufreq_kryo_probe(struct platform_device *pdev) · 6 unmodified lines
127	130	BUG();
128	131	break;
129	132	}
	133	+ kfree(speedbin);
130	134
131	135	for_each_possible_cpu(cpu) {
132	136	cpu_dev = get_cpu_device(cpu);
@@ -162,8 +166,15 @@ free_opp: · 29 unmodified lines
162	166	return ret;
163	167	}
164	168
	169	+static int qcom_cpufreq_kryo_remove(struct platform_device *pdev)
	170	+{
	171	+ platform_device_unregister(cpufreq_dt_pdev);
	172	+ return 0;
	173	+}
	174	+
165	175	static struct platform_driver qcom_cpufreq_kryo_driver = {
166	176	.probe = qcom_cpufreq_kryo_probe,
	177	+ .remove = qcom_cpufreq_kryo_remove,
167	178	.driver = {
168	179	.name = "qcom-cpufreq-kryo",
169	180	},
@@ -172,6 +183,7 @@ static struct platform_driver qcom_cpufreq_kryo_driver = { · 2 unmodified lines
172	183	static const struct of_device_id qcom_cpufreq_kryo_match_list[] __initconst = {
173	184	{ .compatible = "qcom,apq8096", },
174	185	{ .compatible = "qcom,msm8996", },
	186	+ {}
175	187	};
176	188
177	189	/*
@@ -198,8 +210,9 @@ static int __init qcom_cpufreq_kryo_init(void) · 20 unmodified lines
198	210	if (unlikely(ret < 0))
199	211	return ret;
200	212
201		− ret = PTR_ERR_OR_ZERO(platform_device_register_simple(
202		− "qcom-cpufreq-kryo", -1, NULL, 0));
	213	+ kryo_cpufreq_pdev = platform_device_register_simple(
	214	+ "qcom-cpufreq-kryo", -1, NULL, 0);
	215	+ ret = PTR_ERR_OR_ZERO(kryo_cpufreq_pdev);
203	216	if (0 == ret)
204	217	return 0;
205	218
@@ -208,5 +221,12 @@ static int __init qcom_cpufreq_kryo_init(void) · 2 unmodified lines
208	221	}
209	222	module_init(qcom_cpufreq_kryo_init);
210	223
	224	+static void __init qcom_cpufreq_kryo_exit(void)
	225	+{
	226	+ platform_device_unregister(kryo_cpufreq_pdev);
	227	+ platform_driver_unregister(&qcom_cpufreq_kryo_driver);
	228	+}
	229	+module_exit(qcom_cpufreq_kryo_exit);
	230	+
211	231	MODULE_DESCRIPTION("Qualcomm Technologies, Inc. Kryo CPUfreq driver");
212	232	MODULE_LICENSE("GPL v2");

drivers/crypto/chelsio/chtls/chtls_io.c+2−3

@@ -1548,15 +1548,14 @@ skip_copy: · 1547 unmodified lines
1548	1548	tp->urg_data = 0;
1549	1549
1550	1550	if ((avail + offset) >= skb->len) {
1551		− if (likely(skb))
1552		− chtls_free_skb(sk, skb);
1553		− buffers_freed++;
1554	1551	if (ULP_SKB_CB(skb)->flags & ULPCB_FLAG_TLS_HDR) {
1555	1552	tp->copied_seq += skb->len;
1556	1553	hws->rcvpld = skb->hdr_len;
1557	1554	} else {
1558	1555	tp->copied_seq += hws->rcvpld;
1559	1556	}
	1557	+ chtls_free_skb(sk, skb);
	1558	+ buffers_freed++;
1560	1559	hws->copied_seq = 0;
1561	1560	if (copied >= target &&
1562	1561	!skb_peek(&sk->sk_receive_queue))

drivers/crypto/padlock-aes.c+6−2

@@ -266,6 +266,8 @@ static inline void padlock_xcrypt_ecb(const u8 input, u8 output, void *key, · 265 unmodified lines
266	266	return;
267	267	}
268	268
	269	+ count -= initial;
	270	+
269	271	if (initial)
270	272	asm volatile (".byte 0xf3,0x0f,0xa7,0xc8" /* rep xcryptecb */
271	273	: "+S"(input), "+D"(output)
@@ -273,7 +275,7 @@ static inline void padlock_xcrypt_ecb(const u8 input, u8 output, void *key, · 1 unmodified line
273	275
274	276	asm volatile (".byte 0xf3,0x0f,0xa7,0xc8" /* rep xcryptecb */
275	277	: "+S"(input), "+D"(output)
276		− : "d"(control_word), "b"(key), "c"(count - initial));
	278	+ : "d"(control_word), "b"(key), "c"(count));
277	279	}
278	280
279	281	static inline u8 padlock_xcrypt_cbc(const u8 input, u8 output, void key,
@@ -284,6 +286,8 @@ static inline u8 padlock_xcrypt_cbc(const u8 input, u8 output, void key, · 4 unmodified lines
284	286	if (count < cbc_fetch_blocks)
285	287	return cbc_crypt(input, output, key, iv, control_word, count);
286	288
	289	+ count -= initial;
	290	+
287	291	if (initial)
288	292	asm volatile (".byte 0xf3,0x0f,0xa7,0xd0" /* rep xcryptcbc */
289	293	: "+S" (input), "+D" (output), "+a" (iv)
@@ -291,7 +295,7 @@ static inline u8 padlock_xcrypt_cbc(const u8 input, u8 output, void key, · 1 unmodified line
291	295
292	296	asm volatile (".byte 0xf3,0x0f,0xa7,0xd0" /* rep xcryptcbc */
293	297	: "+S" (input), "+D" (output), "+a" (iv)
294		− : "d" (control_word), "b" (key), "c" (count-initial));
	298	+ : "d" (control_word), "b" (key), "c" (count));
295	299	return iv;
296	300	}
297	301

drivers/dax/device.c+8−4

@@ -189,14 +189,16 @@ static int check_vma(struct dev_dax dev_dax, struct vm_area_struct vma, · 188 unmodified lines
189	189
190	190	/* prevent private mappings from being established */
191	191	if ((vma->vm_flags & VM_MAYSHARE) != VM_MAYSHARE) {
192		− dev_info(dev, "%s: %s: fail, attempted private mapping\n",
	192	+ dev_info_ratelimited(dev,
	193	+ "%s: %s: fail, attempted private mapping\n",
193	194	current->comm, func);
194	195	return -EINVAL;
195	196	}
196	197
197	198	mask = dax_region->align - 1;
198	199	if (vma->vm_start & mask \|\| vma->vm_end & mask) {
199		− dev_info(dev, "%s: %s: fail, unaligned vma (%#lx - %#lx, %#lx)\n",
	200	+ dev_info_ratelimited(dev,
	201	+ "%s: %s: fail, unaligned vma (%#lx - %#lx, %#lx)\n",
200	202	current->comm, func, vma->vm_start, vma->vm_end,
201	203	mask);
202	204	return -EINVAL;
@@ -204,13 +206,15 @@ static int check_vma(struct dev_dax dev_dax, struct vm_area_struct vma, · 1 unmodified line
204	206
205	207	if ((dax_region->pfn_flags & (PFN_DEV\|PFN_MAP)) == PFN_DEV
206	208	&& (vma->vm_flags & VM_DONTCOPY) == 0) {
207		− dev_info(dev, "%s: %s: fail, dax range requires MADV_DONTFORK\n",
	209	+ dev_info_ratelimited(dev,
	210	+ "%s: %s: fail, dax range requires MADV_DONTFORK\n",
208	211	current->comm, func);
209	212	return -EINVAL;
210	213	}
211	214
212	215	if (!vma_is_dax(vma)) {
213		− dev_info(dev, "%s: %s: fail, vma is not DAX capable\n",
	216	+ dev_info_ratelimited(dev,
	217	+ "%s: %s: fail, vma is not DAX capable\n",
214	218	current->comm, func);
215	219	return -EINVAL;
216	220	}

drivers/dax/super.c+8−0

@@ -86,6 +86,7 @@ bool __bdev_dax_supported(struct block_device *bdev, int blocksize) · 85 unmodified lines
86	86	{
87	87	struct dax_device *dax_dev;
88	88	bool dax_enabled = false;
	89	+ struct request_queue *q;
89	90	pgoff_t pgoff;
90	91	int err, id;
91	92	void *kaddr;
@@ -99,6 +100,13 @@ bool __bdev_dax_supported(struct block_device *bdev, int blocksize) · 7 unmodified lines
99	100	return false;
100	101	}
101	102
	103	+ q = bdev_get_queue(bdev);
	104	+ if (!q \|\| !blk_queue_dax(q)) {
	105	+ pr_debug("%s: error: request queue doesn't support dax\n",
	106	+ bdevname(bdev, buf));
	107	+ return false;
	108	+ }
	109	+
102	110	err = bdev_dax_pgoff(bdev, 0, PAGE_SIZE, &pgoff);
103	111	if (err) {
104	112	pr_debug("%s: error: unaligned partition for dax\n",

drivers/dma/k3dma.c+1−1

@@ -794,7 +794,7 @@ static struct dma_chan k3_of_dma_simple_xlate(struct of_phandle_args dma_spec, · 793 unmodified lines
794	794	struct k3_dma_dev *d = ofdma->of_dma_data;
795	795	unsigned int request = dma_spec->args[0];
796	796
797		− if (request > d->dma_requests)
	797	+ if (request >= d->dma_requests)
798	798	return NULL;
799	799
800	800	return dma_get_slave_channel(&(d->chans[request].vc.chan));

drivers/dma/pl330.c+1−1

@@ -3033,7 +3033,7 @@ pl330_probe(struct amba_device adev, const struct amba_id id) · 3032 unmodified lines
3033	3033	pd->src_addr_widths = PL330_DMA_BUSWIDTHS;
3034	3034	pd->dst_addr_widths = PL330_DMA_BUSWIDTHS;
3035	3035	pd->directions = BIT(DMA_DEV_TO_MEM) \| BIT(DMA_MEM_TO_DEV);
3036		− pd->residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
	3036	+ pd->residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
3037	3037	pd->max_burst = ((pl330->quirks & PL330_QUIRK_BROKEN_NO_FLUSHP) ?
3038	3038	1 : PL330_MAX_BURST);
3039	3039

drivers/dma/ti/omap-dma.c+5−1

@@ -1485,7 +1485,11 @@ static int omap_dma_probe(struct platform_device *pdev) · 1484 unmodified lines
1485	1485	od->ddev.src_addr_widths = OMAP_DMA_BUSWIDTHS;
1486	1486	od->ddev.dst_addr_widths = OMAP_DMA_BUSWIDTHS;
1487	1487	od->ddev.directions = BIT(DMA_DEV_TO_MEM) \| BIT(DMA_MEM_TO_DEV);
1488		− od->ddev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
	1488	+ if (__dma_omap15xx(od->plat->dma_attr))
	1489	+ od->ddev.residue_granularity =
	1490	+ DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
	1491	+ else
	1492	+ od->ddev.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST;
1489	1493	od->ddev.max_burst = SZ_16M - 1; /* CCEN: 24bit unsigned */
1490	1494	od->ddev.dev = &pdev->dev;
1491	1495	INIT_LIST_HEAD(&od->ddev.channels);

drivers/firmware/dmi-id.c+2−0

@@ -47,6 +47,7 @@ DEFINE_DMI_ATTR_WITH_SHOW(product_name, 0444, DMI_PRODUCT_NAME); · 46 unmodified lines
47	47	DEFINE_DMI_ATTR_WITH_SHOW(product_version, 0444, DMI_PRODUCT_VERSION);
48	48	DEFINE_DMI_ATTR_WITH_SHOW(product_serial, 0400, DMI_PRODUCT_SERIAL);
49	49	DEFINE_DMI_ATTR_WITH_SHOW(product_uuid, 0400, DMI_PRODUCT_UUID);
	50	+DEFINE_DMI_ATTR_WITH_SHOW(product_sku, 0444, DMI_PRODUCT_SKU);
50	51	DEFINE_DMI_ATTR_WITH_SHOW(product_family, 0444, DMI_PRODUCT_FAMILY);
51	52	DEFINE_DMI_ATTR_WITH_SHOW(board_vendor, 0444, DMI_BOARD_VENDOR);
52	53	DEFINE_DMI_ATTR_WITH_SHOW(board_name, 0444, DMI_BOARD_NAME);
@@ -193,6 +194,7 @@ static void __init dmi_id_init_attr_table(void) · 140 unmodified lines
193	194	ADD_DMI_ATTR(product_serial, DMI_PRODUCT_SERIAL);
194	195	ADD_DMI_ATTR(product_uuid, DMI_PRODUCT_UUID);
195	196	ADD_DMI_ATTR(product_family, DMI_PRODUCT_FAMILY);
	197	+ ADD_DMI_ATTR(product_sku, DMI_PRODUCT_SKU);
196	198	ADD_DMI_ATTR(board_vendor, DMI_BOARD_VENDOR);
197	199	ADD_DMI_ATTR(board_name, DMI_BOARD_NAME);
198	200	ADD_DMI_ATTR(board_version, DMI_BOARD_VERSION);

drivers/firmware/dmi_scan.c+1−0

@@ -447,6 +447,7 @@ static void __init dmi_decode(const struct dmi_header dm, void dummy) · 446 unmodified lines
447	447	dmi_save_ident(dm, DMI_PRODUCT_VERSION, 6);
448	448	dmi_save_ident(dm, DMI_PRODUCT_SERIAL, 7);
449	449	dmi_save_uuid(dm, DMI_PRODUCT_UUID, 8);
	450	+ dmi_save_ident(dm, DMI_PRODUCT_SKU, 25);
450	451	dmi_save_ident(dm, DMI_PRODUCT_FAMILY, 26);
451	452	break;
452	453	case 2: /* Base Board Information */

drivers/firmware/efi/libstub/tpm.c+1−1

@@ -64,7 +64,7 @@ static void efi_retrieve_tpm2_eventlog_1_2(efi_system_table_t *sys_table_arg) · 63 unmodified lines
64	64	efi_guid_t tcg2_guid = EFI_TCG2_PROTOCOL_GUID;
65	65	efi_guid_t linux_eventlog_guid = LINUX_EFI_TPM_EVENT_LOG_GUID;
66	66	efi_status_t status;
67		− efi_physical_addr_t log_location, log_last_entry;
	67	+ efi_physical_addr_t log_location = 0, log_last_entry = 0;
68	68	struct linux_efi_tpm_eventlog *log_tbl = NULL;
69	69	unsigned long first_entry_addr, last_entry_addr;
70	70	size_t log_size, last_entry_size;

drivers/fpga/altera-cvp.c+4−2

@@ -455,8 +455,10 @@ static int altera_cvp_probe(struct pci_dev *pdev, · 454 unmodified lines
455	455
456	456	mgr = fpga_mgr_create(&pdev->dev, conf->mgr_name,
457	457	&altera_cvp_ops, conf);
458		− if (!mgr)
459		− return -ENOMEM;
	458	+ if (!mgr) {
	459	+ ret = -ENOMEM;
	460	+ goto err_unmap;
	461	+ }
460	462
461	463	pci_set_drvdata(pdev, mgr);
462	464

drivers/gpio/gpio-uniphier.c+5−1

@@ -181,7 +181,11 @@ static int uniphier_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) · 180 unmodified lines
181	181	fwspec.fwnode = of_node_to_fwnode(chip->parent->of_node);
182	182	fwspec.param_count = 2;
183	183	fwspec.param[0] = offset - UNIPHIER_GPIO_IRQ_OFFSET;
184		− fwspec.param[1] = IRQ_TYPE_NONE;
	184	+ /*
	185	+ * IRQ_TYPE_NONE is rejected by the parent irq domain. Set LEVEL_HIGH
	186	+ * temporarily. Anyway, ->irq_set_type() will override it later.
	187	+ */
	188	+ fwspec.param[1] = IRQ_TYPE_LEVEL_HIGH;
185	189
186	190	return irq_create_fwspec_mapping(&fwspec);
187	191	}

drivers/gpio/gpiolib-acpi.c+55−1

@@ -25,6 +25,7 @@ · 24 unmodified lines
25	25
26	26	struct acpi_gpio_event {
27	27	struct list_head node;
	28	+ struct list_head initial_sync_list;
28	29	acpi_handle handle;
29	30	unsigned int pin;
30	31	unsigned int irq;
@@ -50,6 +51,9 @@ struct acpi_gpio_chip { · 19 unmodified lines
50	51	struct list_head events;
51	52	};
52	53
	54	+static LIST_HEAD(acpi_gpio_initial_sync_list);
	55	+static DEFINE_MUTEX(acpi_gpio_initial_sync_list_lock);
	56	+
53	57	static int acpi_gpiochip_find(struct gpio_chip gc, void data)
54	58	{
55	59	if (!gc->parent)
@@ -85,6 +89,21 @@ static struct gpio_desc acpi_get_gpiod(char path, int pin) · 29 unmodified lines
85	89	return gpiochip_get_desc(chip, pin);
86	90	}
87	91
	92	+static void acpi_gpio_add_to_initial_sync_list(struct acpi_gpio_event *event)
	93	+{
	94	+ mutex_lock(&acpi_gpio_initial_sync_list_lock);
	95	+ list_add(&event->initial_sync_list, &acpi_gpio_initial_sync_list);
	96	+ mutex_unlock(&acpi_gpio_initial_sync_list_lock);
	97	+}
	98	+
	99	+static void acpi_gpio_del_from_initial_sync_list(struct acpi_gpio_event *event)
	100	+{
	101	+ mutex_lock(&acpi_gpio_initial_sync_list_lock);
	102	+ if (!list_empty(&event->initial_sync_list))
	103	+ list_del_init(&event->initial_sync_list);
	104	+ mutex_unlock(&acpi_gpio_initial_sync_list_lock);
	105	+}
	106	+
88	107	static irqreturn_t acpi_gpio_irq_handler(int irq, void *data)
89	108	{
90	109	struct acpi_gpio_event *event = data;
@@ -136,7 +155,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, · 45 unmodified lines
136	155	irq_handler_t handler = NULL;
137	156	struct gpio_desc *desc;
138	157	unsigned long irqflags;
139		− int ret, pin, irq;
	158	+ int ret, pin, irq, value;
140	159
141	160	if (!acpi_gpio_get_irq_resource(ares, &agpio))
142	161	return AE_OK;
@@ -167,6 +186,8 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, · 24 unmodified lines
167	186
168	187	gpiod_direction_input(desc);
169	188
	189	+ value = gpiod_get_value(desc);
	190	+
170	191	ret = gpiochip_lock_as_irq(chip, pin);
171	192	if (ret) {
172	193	dev_err(chip->parent, "Failed to lock GPIO as interrupt\n");
@@ -208,6 +229,7 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, · 35 unmodified lines
208	229	event->irq = irq;
209	230	event->pin = pin;
210	231	event->desc = desc;
	232	+ INIT_LIST_HEAD(&event->initial_sync_list);
211	233
212	234	ret = request_threaded_irq(event->irq, NULL, handler, irqflags,
213	235	"ACPI:Event", event);
@@ -222,6 +244,18 @@ static acpi_status acpi_gpiochip_request_interrupt(struct acpi_resource *ares, · 8 unmodified lines
222	244	enable_irq_wake(irq);
223	245
224	246	list_add_tail(&event->node, &acpi_gpio->events);
	247	+
	248	+ /*
	249	+ * Make sure we trigger the initial state of the IRQ when using RISING
	250	+ * or FALLING. Note we run the handlers on late_init, the AML code
	251	+ * may refer to OperationRegions from other (builtin) drivers which
	252	+ * may be probed after us.
	253	+ */
	254	+ if (handler == acpi_gpio_irq_handler &&
	255	+ (((irqflags & IRQF_TRIGGER_RISING) && value == 1) \|\|
	256	+ ((irqflags & IRQF_TRIGGER_FALLING) && value == 0)))
	257	+ acpi_gpio_add_to_initial_sync_list(event);
	258	+
225	259	return AE_OK;
226	260
227	261	fail_free_event:
@@ -294,6 +328,8 @@ void acpi_gpiochip_free_interrupts(struct gpio_chip *chip) · 66 unmodified lines
294	328	list_for_each_entry_safe_reverse(event, ep, &acpi_gpio->events, node) {
295	329	struct gpio_desc *desc;
296	330
	331	+ acpi_gpio_del_from_initial_sync_list(event);
	332	+
297	333	if (irqd_is_wakeup_set(irq_get_irq_data(event->irq)))
298	334	disable_irq_wake(event->irq);
299	335
@@ -1158,3 +1194,21 @@ bool acpi_can_fallback_to_crs(struct acpi_device adev, const char con_id) · 858 unmodified lines
1158	1194
1159	1195	return con_id == NULL;
1160	1196	}
	1197	+
	1198	+/* Sync the initial state of handlers after all builtin drivers have probed */
	1199	+static int acpi_gpio_initial_sync(void)
	1200	+{
	1201	+ struct acpi_gpio_event event, ep;
	1202	+
	1203	+ mutex_lock(&acpi_gpio_initial_sync_list_lock);
	1204	+ list_for_each_entry_safe(event, ep, &acpi_gpio_initial_sync_list,
	1205	+ initial_sync_list) {
	1206	+ acpi_evaluate_object(event->handle, NULL, NULL, NULL);
	1207	+ list_del_init(&event->initial_sync_list);
	1208	+ }
	1209	+ mutex_unlock(&acpi_gpio_initial_sync_list_lock);
	1210	+
	1211	+ return 0;
	1212	+}
	1213	+/* We must use _sync so that this runs after the first deferred_probe run */
	1214	+late_initcall_sync(acpi_gpio_initial_sync);

drivers/gpio/gpiolib-of.c+2−1

@@ -64,7 +64,8 @@ static void of_gpio_flags_quirks(struct device_node *np, · 63 unmodified lines
64	64	* Note that active low is the default.
65	65	*/
66	66	if (IS_ENABLED(CONFIG_REGULATOR) &&
67		− (of_device_is_compatible(np, "reg-fixed-voltage") \|\|
	67	+ (of_device_is_compatible(np, "regulator-fixed") \|\|
	68	+ of_device_is_compatible(np, "reg-fixed-voltage") \|\|
68	69	of_device_is_compatible(np, "regulator-gpio"))) {
69	70	/*
70	71	* The regulator GPIO handles are specified such that the

drivers/gpu/drm/amd/amdgpu/amdgpu.h+8−38

@@ -190,6 +190,7 @@ struct amdgpu_job; · 189 unmodified lines
190	190	struct amdgpu_irq_src;
191	191	struct amdgpu_fpriv;
192	192	struct amdgpu_bo_va_mapping;
	193	+struct amdgpu_atif;
193	194
194	195	enum amdgpu_cp_irq {
195	196	AMDGPU_CP_IRQ_GFX_EOP = 0,
@@ -1269,43 +1270,6 @@ struct amdgpu_vram_scratch { · 1073 unmodified lines
1269	1270	/*
1270	1271	* ACPI
1271	1272	*/
1272		−struct amdgpu_atif_notification_cfg {
1273		− bool enabled;
1274		− int command_code;
1275		−};
1276		−
1277		−struct amdgpu_atif_notifications {
1278		− bool display_switch;
1279		− bool expansion_mode_change;
1280		− bool thermal_state;
1281		− bool forced_power_state;
1282		− bool system_power_state;
1283		− bool display_conf_change;
1284		− bool px_gfx_switch;
1285		− bool brightness_change;
1286		− bool dgpu_display_event;
1287		−};
1288		−
1289		−struct amdgpu_atif_functions {
1290		− bool system_params;
1291		− bool sbios_requests;
1292		− bool select_active_disp;
1293		− bool lid_state;
1294		− bool get_tv_standard;
1295		− bool set_tv_standard;
1296		− bool get_panel_expansion_mode;
1297		− bool set_panel_expansion_mode;
1298		− bool temperature_change;
1299		− bool graphics_device_types;
1300		−};
1301		−
1302		−struct amdgpu_atif {
1303		− struct amdgpu_atif_notifications notifications;
1304		− struct amdgpu_atif_functions functions;
1305		− struct amdgpu_atif_notification_cfg notification_cfg;
1306		− struct amdgpu_encoder *encoder_for_bl;
1307		−};
1308		−
1309	1273	struct amdgpu_atcs_functions {
1310	1274	bool get_ext_state;
1311	1275	bool pcie_perf_req;
@@ -1466,7 +1430,7 @@ struct amdgpu_device { · 154 unmodified lines
1466	1430	#if defined(CONFIG_DEBUG_FS)
1467	1431	struct dentry *debugfs_regs[AMDGPU_DEBUGFS_MAX_COMPONENTS];
1468	1432	#endif
1469		− struct amdgpu_atif atif;
	1433	+ struct amdgpu_atif *atif;
1470	1434	struct amdgpu_atcs atcs;
1471	1435	struct mutex srbm_mutex;
1472	1436	/* GRBM index mutex. Protects concurrent access to GRBM index */
@@ -1894,6 +1858,12 @@ static inline bool amdgpu_atpx_dgpu_req_power_for_displays(void) { return false; · 421 unmodified lines
1894	1858	static inline bool amdgpu_has_atpx(void) { return false; }
1895	1859	#endif
1896	1860
	1861	+#if defined(CONFIG_VGA_SWITCHEROO) && defined(CONFIG_ACPI)
	1862	+void *amdgpu_atpx_get_dhandle(void);
	1863	+#else
	1864	+static inline void *amdgpu_atpx_get_dhandle(void) { return NULL; }
	1865	+#endif
	1866	+
1897	1867	/*
1898	1868	* KMS
1899	1869	*/

drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c+37−10

@@ -57,6 +57,10 @@ · 56 unmodified lines
57	57	#define ACP_I2S_COMP2_CAP_REG_OFFSET 0xa8
58	58	#define ACP_I2S_COMP1_PLAY_REG_OFFSET 0x6c
59	59	#define ACP_I2S_COMP2_PLAY_REG_OFFSET 0x68
	60	+#define ACP_BT_PLAY_REGS_START 0x14970
	61	+#define ACP_BT_PLAY_REGS_END 0x14a24
	62	+#define ACP_BT_COMP1_REG_OFFSET 0xac
	63	+#define ACP_BT_COMP2_REG_OFFSET 0xa8
60	64
61	65	#define mmACP_PGFSM_RETAIN_REG 0x51c9
62	66	#define mmACP_PGFSM_CONFIG_REG 0x51ca
@@ -77,7 +81,7 @@ · 14 unmodified lines
77	81	#define ACP_SOFT_RESET_DONE_TIME_OUT_VALUE 0x000000FF
78	82
79	83	#define ACP_TIMEOUT_LOOP 0x000000FF
80		−#define ACP_DEVS 3
	84	+#define ACP_DEVS 4
81	85	#define ACP_SRC_ID 162
82	86
83	87	enum {
@@ -316,14 +320,13 @@ static int acp_hw_init(void *handle) · 232 unmodified lines
316	320	if (adev->acp.acp_cell == NULL)
317	321	return -ENOMEM;
318	322
319		− adev->acp.acp_res = kcalloc(4, sizeof(struct resource), GFP_KERNEL);
320		−
	323	+ adev->acp.acp_res = kcalloc(5, sizeof(struct resource), GFP_KERNEL);
321	324	if (adev->acp.acp_res == NULL) {
322	325	kfree(adev->acp.acp_cell);
323	326	return -ENOMEM;
324	327	}
325	328
326		− i2s_pdata = kcalloc(2, sizeof(struct i2s_platform_data), GFP_KERNEL);
	329	+ i2s_pdata = kcalloc(3, sizeof(struct i2s_platform_data), GFP_KERNEL);
327	330	if (i2s_pdata == NULL) {
328	331	kfree(adev->acp.acp_res);
329	332	kfree(adev->acp.acp_cell);
@@ -358,6 +361,20 @@ static int acp_hw_init(void *handle) · 28 unmodified lines
358	361	i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET;
359	362	i2s_pdata[1].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET;
360	363
	364	+ i2s_pdata[2].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;
	365	+ switch (adev->asic_type) {
	366	+ case CHIP_STONEY:
	367	+ i2s_pdata[2].quirks \|= DW_I2S_QUIRK_16BIT_IDX_OVERRIDE;
	368	+ break;
	369	+ default:
	370	+ break;
	371	+ }
	372	+
	373	+ i2s_pdata[2].cap = DWC_I2S_PLAY \| DWC_I2S_RECORD;
	374	+ i2s_pdata[2].snd_rates = SNDRV_PCM_RATE_8000_96000;
	375	+ i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET;
	376	+ i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET;
	377	+
361	378	adev->acp.acp_res[0].name = "acp2x_dma";
362	379	adev->acp.acp_res[0].flags = IORESOURCE_MEM;
363	380	adev->acp.acp_res[0].start = acp_base;
@@ -373,13 +390,18 @@ static int acp_hw_init(void *handle) · 9 unmodified lines
373	390	adev->acp.acp_res[2].start = acp_base + ACP_I2S_CAP_REGS_START;
374	391	adev->acp.acp_res[2].end = acp_base + ACP_I2S_CAP_REGS_END;
375	392
376		− adev->acp.acp_res[3].name = "acp2x_dma_irq";
377		− adev->acp.acp_res[3].flags = IORESOURCE_IRQ;
378		− adev->acp.acp_res[3].start = amdgpu_irq_create_mapping(adev, 162);
379		− adev->acp.acp_res[3].end = adev->acp.acp_res[3].start;
	393	+ adev->acp.acp_res[3].name = "acp2x_dw_bt_i2s_play_cap";
	394	+ adev->acp.acp_res[3].flags = IORESOURCE_MEM;
	395	+ adev->acp.acp_res[3].start = acp_base + ACP_BT_PLAY_REGS_START;
	396	+ adev->acp.acp_res[3].end = acp_base + ACP_BT_PLAY_REGS_END;
	397	+
	398	+ adev->acp.acp_res[4].name = "acp2x_dma_irq";
	399	+ adev->acp.acp_res[4].flags = IORESOURCE_IRQ;
	400	+ adev->acp.acp_res[4].start = amdgpu_irq_create_mapping(adev, 162);
	401	+ adev->acp.acp_res[4].end = adev->acp.acp_res[4].start;
380	402
381	403	adev->acp.acp_cell[0].name = "acp_audio_dma";
382		− adev->acp.acp_cell[0].num_resources = 4;
	404	+ adev->acp.acp_cell[0].num_resources = 5;
383	405	adev->acp.acp_cell[0].resources = &adev->acp.acp_res[0];
384	406	adev->acp.acp_cell[0].platform_data = &adev->asic_type;
385	407	adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type);
@@ -396,6 +418,12 @@ static int acp_hw_init(void *handle) · 10 unmodified lines
396	418	adev->acp.acp_cell[2].platform_data = &i2s_pdata[1];
397	419	adev->acp.acp_cell[2].pdata_size = sizeof(struct i2s_platform_data);
398	420
	421	+ adev->acp.acp_cell[3].name = "designware-i2s";
	422	+ adev->acp.acp_cell[3].num_resources = 1;
	423	+ adev->acp.acp_cell[3].resources = &adev->acp.acp_res[3];
	424	+ adev->acp.acp_cell[3].platform_data = &i2s_pdata[2];
	425	+ adev->acp.acp_cell[3].pdata_size = sizeof(struct i2s_platform_data);
	426	+
399	427	r = mfd_add_hotplug_devices(adev->acp.parent, adev->acp.acp_cell,
400	428	ACP_DEVS);
401	429	if (r)
@@ -451,7 +479,6 @@ static int acp_hw_init(void *handle) · 49 unmodified lines
451	479	val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET);
452	480	val &= ~ACP_SOFT_RESET__SoftResetAud_MASK;
453	481	cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val);
454		−
455	482	return 0;
456	483	}
457	484

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c+108−23

@@ -34,6 +34,45 @@ · 33 unmodified lines
34	34	#include "amd_acpi.h"
35	35	#include "atom.h"
36	36
	37	+struct amdgpu_atif_notification_cfg {
	38	+ bool enabled;
	39	+ int command_code;
	40	+};
	41	+
	42	+struct amdgpu_atif_notifications {
	43	+ bool display_switch;
	44	+ bool expansion_mode_change;
	45	+ bool thermal_state;
	46	+ bool forced_power_state;
	47	+ bool system_power_state;
	48	+ bool display_conf_change;
	49	+ bool px_gfx_switch;
	50	+ bool brightness_change;
	51	+ bool dgpu_display_event;
	52	+};
	53	+
	54	+struct amdgpu_atif_functions {
	55	+ bool system_params;
	56	+ bool sbios_requests;
	57	+ bool select_active_disp;
	58	+ bool lid_state;
	59	+ bool get_tv_standard;
	60	+ bool set_tv_standard;
	61	+ bool get_panel_expansion_mode;
	62	+ bool set_panel_expansion_mode;
	63	+ bool temperature_change;
	64	+ bool graphics_device_types;
	65	+};
	66	+
	67	+struct amdgpu_atif {
	68	+ acpi_handle handle;
	69	+
	70	+ struct amdgpu_atif_notifications notifications;
	71	+ struct amdgpu_atif_functions functions;
	72	+ struct amdgpu_atif_notification_cfg notification_cfg;
	73	+ struct amdgpu_encoder *encoder_for_bl;
	74	+};
	75	+
37	76	/* Call the ATIF method
38	77	*/
39	78	/**
@@ -46,8 +85,9 @@ · 6 unmodified lines
46	85	* Executes the requested ATIF function (all asics).
47	86	* Returns a pointer to the acpi output buffer.
48	87	*/
49		−static union acpi_object *amdgpu_atif_call(acpi_handle handle, int function,
50		− struct acpi_buffer *params)
	88	+static union acpi_object amdgpu_atif_call(struct amdgpu_atif atif,
	89	+ int function,
	90	+ struct acpi_buffer *params)
51	91	{
52	92	acpi_status status;
53	93	union acpi_object atif_arg_elements[2];
@@ -70,7 +110,8 @@ static union acpi_object *amdgpu_atif_call(acpi_handle handle, int function, · 16 unmodified lines
70	110	atif_arg_elements[1].integer.value = 0;
71	111	}
72	112
73		− status = acpi_evaluate_object(handle, "ATIF", &atif_arg, &buffer);
	113	+ status = acpi_evaluate_object(atif->handle, NULL, &atif_arg,
	114	+ &buffer);
74	115
75	116	/* Fail only if calling the method fails and ATIF is supported */
76	117	if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
@@ -141,15 +182,14 @@ static void amdgpu_atif_parse_functions(struct amdgpu_atif_functions *f, u32 mas · 64 unmodified lines
141	182	* (all asics).
142	183	* returns 0 on success, error on failure.
143	184	*/
144		−static int amdgpu_atif_verify_interface(acpi_handle handle,
145		− struct amdgpu_atif *atif)
	185	+static int amdgpu_atif_verify_interface(struct amdgpu_atif *atif)
146	186	{
147	187	union acpi_object *info;
148	188	struct atif_verify_interface output;
149	189	size_t size;
150	190	int err = 0;
151	191
152		− info = amdgpu_atif_call(handle, ATIF_FUNCTION_VERIFY_INTERFACE, NULL);
	192	+ info = amdgpu_atif_call(atif, ATIF_FUNCTION_VERIFY_INTERFACE, NULL);
153	193	if (!info)
154	194	return -EIO;
155	195
@@ -176,6 +216,35 @@ out: · 20 unmodified lines
176	216	return err;
177	217	}
178	218
	219	+static acpi_handle amdgpu_atif_probe_handle(acpi_handle dhandle)
	220	+{
	221	+ acpi_handle handle = NULL;
	222	+ char acpi_method_name[255] = { 0 };
	223	+ struct acpi_buffer buffer = { sizeof(acpi_method_name), acpi_method_name };
	224	+ acpi_status status;
	225	+
	226	+ /* For PX/HG systems, ATIF and ATPX are in the iGPU's namespace, on dGPU only
	227	+ * systems, ATIF is in the dGPU's namespace.
	228	+ */
	229	+ status = acpi_get_handle(dhandle, "ATIF", &handle);
	230	+ if (ACPI_SUCCESS(status))
	231	+ goto out;
	232	+
	233	+ if (amdgpu_has_atpx()) {
	234	+ status = acpi_get_handle(amdgpu_atpx_get_dhandle(), "ATIF",
	235	+ &handle);
	236	+ if (ACPI_SUCCESS(status))
	237	+ goto out;
	238	+ }
	239	+
	240	+ DRM_DEBUG_DRIVER("No ATIF handle found\n");
	241	+ return NULL;
	242	+out:
	243	+ acpi_get_name(handle, ACPI_FULL_PATHNAME, &buffer);
	244	+ DRM_DEBUG_DRIVER("Found ATIF handle %s\n", acpi_method_name);
	245	+ return handle;
	246	+}
	247	+
179	248	/**
180	249	* amdgpu_atif_get_notification_params - determine notify configuration
181	250	*
@@ -188,15 +257,16 @@ out: · 6 unmodified lines
188	257	* where n is specified in the result if a notifier is used.
189	258	* Returns 0 on success, error on failure.
190	259	*/
191		−static int amdgpu_atif_get_notification_params(acpi_handle handle,
192		− struct amdgpu_atif_notification_cfg *n)
	260	+static int amdgpu_atif_get_notification_params(struct amdgpu_atif *atif)
193	261	{
194	262	union acpi_object *info;
	263	+ struct amdgpu_atif_notification_cfg *n = &atif->notification_cfg;
195	264	struct atif_system_params params;
196	265	size_t size;
197	266	int err = 0;
198	267
199		− info = amdgpu_atif_call(handle, ATIF_FUNCTION_GET_SYSTEM_PARAMETERS, NULL);
	268	+ info = amdgpu_atif_call(atif, ATIF_FUNCTION_GET_SYSTEM_PARAMETERS,
	269	+ NULL);
200	270	if (!info) {
201	271	err = -EIO;
202	272	goto out;
@@ -250,14 +320,15 @@ out: · 47 unmodified lines
250	320	* (all asics).
251	321	* Returns 0 on success, error on failure.
252	322	*/
253		−static int amdgpu_atif_get_sbios_requests(acpi_handle handle,
254		− struct atif_sbios_requests *req)
	323	+static int amdgpu_atif_get_sbios_requests(struct amdgpu_atif *atif,
	324	+ struct atif_sbios_requests *req)
255	325	{
256	326	union acpi_object *info;
257	327	size_t size;
258	328	int count = 0;
259	329
260		− info = amdgpu_atif_call(handle, ATIF_FUNCTION_GET_SYSTEM_BIOS_REQUESTS, NULL);
	330	+ info = amdgpu_atif_call(atif, ATIF_FUNCTION_GET_SYSTEM_BIOS_REQUESTS,
	331	+ NULL);
261	332	if (!info)
262	333	return -EIO;
263	334
@@ -290,11 +361,10 @@ out: · 26 unmodified lines
290	361	* Returns NOTIFY code
291	362	*/
292	363	static int amdgpu_atif_handler(struct amdgpu_device *adev,
293		− struct acpi_bus_event *event)
	364	+ struct acpi_bus_event *event)
294	365	{
295		− struct amdgpu_atif *atif = &adev->atif;
	366	+ struct amdgpu_atif *atif = adev->atif;
296	367	struct atif_sbios_requests req;
297		− acpi_handle handle;
298	368	int count;
299	369
300	370	DRM_DEBUG_DRIVER("event, device_class = %s, type = %#x\n",
@@ -303,14 +373,14 @@ static int amdgpu_atif_handler(struct amdgpu_device *adev, · 2 unmodified lines
303	373	if (strcmp(event->device_class, ACPI_VIDEO_CLASS) != 0)
304	374	return NOTIFY_DONE;
305	375
306		− if (!atif->notification_cfg.enabled \|\|
	376	+ if (!atif \|\|
	377	+ !atif->notification_cfg.enabled \|\|
307	378	event->type != atif->notification_cfg.command_code)
308	379	/* Not our event */
309	380	return NOTIFY_DONE;
310	381
311	382	/* Check pending SBIOS requests */
312		− handle = ACPI_HANDLE(&adev->pdev->dev);
313		− count = amdgpu_atif_get_sbios_requests(handle, &req);
	383	+ count = amdgpu_atif_get_sbios_requests(atif, &req);
314	384
315	385	if (count <= 0)
316	386	return NOTIFY_DONE;
@@ -641,8 +711,8 @@ static int amdgpu_acpi_event(struct notifier_block *nb, · 324 unmodified lines
641	711	*/
642	712	int amdgpu_acpi_init(struct amdgpu_device *adev)
643	713	{
644		− acpi_handle handle;
645		− struct amdgpu_atif *atif = &adev->atif;
	714	+ acpi_handle handle, atif_handle;
	715	+ struct amdgpu_atif *atif;
646	716	struct amdgpu_atcs *atcs = &adev->atcs;
647	717	int ret;
648	718
@@ -658,12 +728,26 @@ int amdgpu_acpi_init(struct amdgpu_device *adev) · 9 unmodified lines
658	728	DRM_DEBUG_DRIVER("Call to ATCS verify_interface failed: %d\n", ret);
659	729	}
660	730
	731	+ /* Probe for ATIF, and initialize it if found */
	732	+ atif_handle = amdgpu_atif_probe_handle(handle);
	733	+ if (!atif_handle)
	734	+ goto out;
	735	+
	736	+ atif = kzalloc(sizeof(*atif), GFP_KERNEL);
	737	+ if (!atif) {
	738	+ DRM_WARN("Not enough memory to initialize ATIF\n");
	739	+ goto out;
	740	+ }
	741	+ atif->handle = atif_handle;
	742	+
661	743	/* Call the ATIF method */
662		− ret = amdgpu_atif_verify_interface(handle, atif);
	744	+ ret = amdgpu_atif_verify_interface(atif);
663	745	if (ret) {
664	746	DRM_DEBUG_DRIVER("Call to ATIF verify_interface failed: %d\n", ret);
	747	+ kfree(atif);
665	748	goto out;
666	749	}
	750	+ adev->atif = atif;
667	751
668	752	if (atif->notifications.brightness_change) {
669	753	struct drm_encoder *tmp;
@@ -693,8 +777,7 @@ int amdgpu_acpi_init(struct amdgpu_device *adev) · 23 unmodified lines
693	777	}
694	778
695	779	if (atif->functions.system_params) {
696		− ret = amdgpu_atif_get_notification_params(handle,
697		− &atif->notification_cfg);
	780	+ ret = amdgpu_atif_get_notification_params(atif);
698	781	if (ret) {
699	782	DRM_DEBUG_DRIVER("Call to GET_SYSTEM_PARAMS failed: %d\n",
700	783	ret);
@@ -720,4 +803,6 @@ out: · 19 unmodified lines
720	803	void amdgpu_acpi_fini(struct amdgpu_device *adev)
721	804	{
722	805	unregister_acpi_notifier(&adev->acpi_nb);
	806	+ if (adev->atif)
	807	+ kfree(adev->atif);
723	808	}

drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c+7−0

@@ -90,6 +90,12 @@ bool amdgpu_atpx_dgpu_req_power_for_displays(void) { · 89 unmodified lines
90	90	return amdgpu_atpx_priv.atpx.dgpu_req_power_for_displays;
91	91	}
92	92
	93	+#if defined(CONFIG_ACPI)
	94	+void *amdgpu_atpx_get_dhandle(void) {
	95	+ return amdgpu_atpx_priv.dhandle;
	96	+}
	97	+#endif
	98	+
93	99	/**
94	100	* amdgpu_atpx_call - call an ATPX method
95	101	*
@@ -569,6 +575,7 @@ static const struct amdgpu_px_quirk amdgpu_px_quirk_list[] = { · 473 unmodified lines
569	575	{ 0x1002, 0x6900, 0x1002, 0x0124, AMDGPU_PX_QUIRK_FORCE_ATPX },
570	576	{ 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX },
571	577	{ 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX },
	578	+ { 0x1002, 0x6900, 0x1025, 0x125A, AMDGPU_PX_QUIRK_FORCE_ATPX },
572	579	{ 0, 0, 0, 0, 0 },
573	580	};
574	581

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+4−0

@@ -927,6 +927,10 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev, · 926 unmodified lines
927	927	r = amdgpu_bo_vm_update_pte(p);
928	928	if (r)
929	929	return r;
	930	+
	931	+ r = reservation_object_reserve_shared(vm->root.base.bo->tbo.resv);
	932	+ if (r)
	933	+ return r;
930	934	}
931	935
932	936	return amdgpu_cs_sync_rings(p);

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+12−1

@@ -2158,10 +2158,18 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type) · 2157 unmodified lines
2158	2158	switch (asic_type) {
2159	2159	#if defined(CONFIG_DRM_AMD_DC)
2160	2160	case CHIP_BONAIRE:
2161		− case CHIP_HAWAII:
2162	2161	case CHIP_KAVERI:
2163	2162	case CHIP_KABINI:
2164	2163	case CHIP_MULLINS:
	2164	+ /*
	2165	+ * We have systems in the wild with these ASICs that require
	2166	+ * LVDS and VGA support which is not supported with DC.
	2167	+ *
	2168	+ * Fallback to the non-DC driver here by default so as not to
	2169	+ * cause regressions.
	2170	+ */
	2171	+ return amdgpu_dc > 0;
	2172	+ case CHIP_HAWAII:
2165	2173	case CHIP_CARRIZO:
2166	2174	case CHIP_STONEY:
2167	2175	case CHIP_POLARIS10:
@@ -2739,6 +2747,9 @@ int amdgpu_device_resume(struct drm_device *dev, bool resume, bool fbcon) · 571 unmodified lines
2739	2747	if (r)
2740	2748	return r;
2741	2749
	2750	+ /* Make sure IB tests flushed */
	2751	+ flush_delayed_work(&adev->late_init_work);
	2752	+
2742	2753	/* blat the mode back in */
2743	2754	if (fbcon) {
2744	2755	if (!amdgpu_device_has_dc_support(adev)) {

drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c+1−1

@@ -376,7 +376,7 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring, · 375 unmodified lines
376	376	struct amdgpu_device *adev = ring->adev;
377	377	uint64_t index;
378	378
379		− if (ring != &adev->uvd.inst[ring->me].ring) {
	379	+ if (ring->funcs->type != AMDGPU_RING_TYPE_UVD) {
380	380	ring->fence_drv.cpu_addr = &adev->wb.wb[ring->fence_offs];
381	381	ring->fence_drv.gpu_addr = adev->wb.gpu_addr + (ring->fence_offs * 4);
382	382	} else {

drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c+6−6

@@ -231,6 +231,12 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, · 230 unmodified lines
231	231	if (ib->flags & AMDGPU_IB_FLAG_TC_WB_NOT_INVALIDATE)
232	232	fence_flags \|= AMDGPU_FENCE_FLAG_TC_WB_ONLY;
233	233
	234	+ /* wrap the last IB with fence */
	235	+ if (job && job->uf_addr) {
	236	+ amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence,
	237	+ fence_flags \| AMDGPU_FENCE_FLAG_64BIT);
	238	+ }
	239	+
234	240	r = amdgpu_fence_emit(ring, f, fence_flags);
235	241	if (r) {
236	242	dev_err(adev->dev, "failed to emit fence (%d)\n", r);
@@ -243,12 +249,6 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, · 6 unmodified lines
243	249	if (ring->funcs->insert_end)
244	250	ring->funcs->insert_end(ring);
245	251
246		− /* wrap the last IB with fence */
247		− if (job && job->uf_addr) {
248		− amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence,
249		− fence_flags \| AMDGPU_FENCE_FLAG_64BIT);
250		− }
251		−
252	252	if (patch_offset != ~0 && ring->funcs->patch_cond_exec)
253	253	amdgpu_ring_patch_cond_exec(ring, patch_offset);
254	254

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c+10−14

@@ -762,8 +762,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain, · 761 unmodified lines
762	762	domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
763	763	if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
764	764	adev->vram_pin_size += amdgpu_bo_size(bo);
765		− if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
766		− adev->invisible_pin_size += amdgpu_bo_size(bo);
	765	+ adev->invisible_pin_size += amdgpu_vram_mgr_bo_invisible_size(bo);
767	766	} else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
768	767	adev->gart_pin_size += amdgpu_bo_size(bo);
769	768	}
@@ -790,25 +789,22 @@ int amdgpu_bo_unpin(struct amdgpu_bo *bo) · 20 unmodified lines
790	789	bo->pin_count--;
791	790	if (bo->pin_count)
792	791	return 0;
793		− for (i = 0; i < bo->placement.num_placement; i++) {
794		− bo->placements[i].lpfn = 0;
795		− bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
796		− }
797		− r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
798		− if (unlikely(r)) {
799		− dev_err(adev->dev, "%p validate failed for unpin\n", bo);
800		− goto error;
801		− }
802	792
803	793	if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
804	794	adev->vram_pin_size -= amdgpu_bo_size(bo);
805		− if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
806		− adev->invisible_pin_size -= amdgpu_bo_size(bo);
	795	+ adev->invisible_pin_size -= amdgpu_vram_mgr_bo_invisible_size(bo);
807	796	} else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
808	797	adev->gart_pin_size -= amdgpu_bo_size(bo);
809	798	}
810	799
811		−error:
	800	+ for (i = 0; i < bo->placement.num_placement; i++) {
	801	+ bo->placements[i].lpfn = 0;
	802	+ bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
	803	+ }
	804	+ r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
	805	+ if (unlikely(r))
	806	+ dev_err(adev->dev, "%p validate failed for unpin\n", bo);
	807	+
812	808	return r;
813	809	}
814	810

drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c+1−1

@@ -1882,7 +1882,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *adev) · 1881 unmodified lines
1882	1882	if (!amdgpu_device_has_dc_support(adev)) {
1883	1883	mutex_lock(&adev->pm.mutex);
1884	1884	amdgpu_dpm_get_active_displays(adev);
1885		− adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtcs;
	1885	+ adev->pm.pm_display_cfg.num_display = adev->pm.dpm.new_active_crtc_count;
1886	1886	adev->pm.pm_display_cfg.vrefresh = amdgpu_dpm_get_vrefresh(adev);
1887	1887	adev->pm.pm_display_cfg.min_vblank_time = amdgpu_dpm_get_vblank_time(adev);
1888	1888	/* we have issues with mclk switching with refresh rates over 120 hz on the non-DC code. */

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h+1−0

@@ -73,6 +73,7 @@ bool amdgpu_gtt_mgr_has_gart_addr(struct ttm_mem_reg *mem); · 72 unmodified lines
73	73	uint64_t amdgpu_gtt_mgr_usage(struct ttm_mem_type_manager *man);
74	74	int amdgpu_gtt_mgr_recover(struct ttm_mem_type_manager *man);
75	75
	76	+u64 amdgpu_vram_mgr_bo_invisible_size(struct amdgpu_bo *bo);
76	77	uint64_t amdgpu_vram_mgr_usage(struct ttm_mem_type_manager *man);
77	78	uint64_t amdgpu_vram_mgr_vis_usage(struct ttm_mem_type_manager *man);
78	79

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c+7−7

@@ -130,7 +130,7 @@ int amdgpu_uvd_sw_init(struct amdgpu_device *adev) · 129 unmodified lines
130	130	unsigned version_major, version_minor, family_id;
131	131	int i, j, r;
132	132
133		− INIT_DELAYED_WORK(&adev->uvd.inst->idle_work, amdgpu_uvd_idle_work_handler);
	133	+ INIT_DELAYED_WORK(&adev->uvd.idle_work, amdgpu_uvd_idle_work_handler);
134	134
135	135	switch (adev->asic_type) {
136	136	#ifdef CONFIG_DRM_AMDGPU_CIK
@@ -314,12 +314,12 @@ int amdgpu_uvd_suspend(struct amdgpu_device *adev) · 177 unmodified lines
314	314	void *ptr;
315	315	int i, j;
316	316
	317	+ cancel_delayed_work_sync(&adev->uvd.idle_work);
	318	+
317	319	for (j = 0; j < adev->uvd.num_uvd_inst; ++j) {
318	320	if (adev->uvd.inst[j].vcpu_bo == NULL)
319	321	continue;
320	322
321		− cancel_delayed_work_sync(&adev->uvd.inst[j].idle_work);
322		−
323	323	/* only valid for physical mode */
324	324	if (adev->asic_type < CHIP_POLARIS10) {
325	325	for (i = 0; i < adev->uvd.max_handles; ++i)
@@ -1145,7 +1145,7 @@ int amdgpu_uvd_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle, · 819 unmodified lines
1145	1145	static void amdgpu_uvd_idle_work_handler(struct work_struct *work)
1146	1146	{
1147	1147	struct amdgpu_device *adev =
1148		− container_of(work, struct amdgpu_device, uvd.inst->idle_work.work);
	1148	+ container_of(work, struct amdgpu_device, uvd.idle_work.work);
1149	1149	unsigned fences = 0, i, j;
1150	1150
1151	1151	for (i = 0; i < adev->uvd.num_uvd_inst; ++i) {
@@ -1167,7 +1167,7 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work) · 15 unmodified lines
1167	1167	AMD_CG_STATE_GATE);
1168	1168	}
1169	1169	} else {
1170		− schedule_delayed_work(&adev->uvd.inst->idle_work, UVD_IDLE_TIMEOUT);
	1170	+ schedule_delayed_work(&adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
1171	1171	}
1172	1172	}
1173	1173
@@ -1179,7 +1179,7 @@ void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring) · 5 unmodified lines
1179	1179	if (amdgpu_sriov_vf(adev))
1180	1180	return;
1181	1181
1182		− set_clocks = !cancel_delayed_work_sync(&adev->uvd.inst->idle_work);
	1182	+ set_clocks = !cancel_delayed_work_sync(&adev->uvd.idle_work);
1183	1183	if (set_clocks) {
1184	1184	if (adev->pm.dpm_enabled) {
1185	1185	amdgpu_dpm_enable_uvd(adev, true);
@@ -1196,7 +1196,7 @@ void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring) · 10 unmodified lines
1196	1196	void amdgpu_uvd_ring_end_use(struct amdgpu_ring *ring)
1197	1197	{
1198	1198	if (!amdgpu_sriov_vf(ring->adev))
1199		− schedule_delayed_work(&ring->adev->uvd.inst->idle_work, UVD_IDLE_TIMEOUT);
	1199	+ schedule_delayed_work(&ring->adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
1200	1200	}
1201	1201
1202	1202	/**

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h+1−1

@@ -44,7 +44,6 @@ struct amdgpu_uvd_inst { · 43 unmodified lines
44	44	void *saved_bo;
45	45	atomic_t handles[AMDGPU_MAX_UVD_HANDLES];
46	46	struct drm_file *filp[AMDGPU_MAX_UVD_HANDLES];
47		− struct delayed_work idle_work;
48	47	struct amdgpu_ring ring;
49	48	struct amdgpu_ring ring_enc[AMDGPU_MAX_UVD_ENC_RINGS];
50	49	struct amdgpu_irq_src irq;
@@ -62,6 +61,7 @@ struct amdgpu_uvd { · 11 unmodified lines
62	61	bool address_64_bit;
63	62	bool use_ctx_buf;
64	63	struct amdgpu_uvd_inst inst[AMDGPU_MAX_UVD_INSTANCES];
	64	+ struct delayed_work idle_work;
65	65	};
66	66
67	67	int amdgpu_uvd_sw_init(struct amdgpu_device *adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c+27−6

@@ -52,7 +52,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev) · 51 unmodified lines
52	52	unsigned long bo_size;
53	53	const char *fw_name;
54	54	const struct common_firmware_header *hdr;
55		− unsigned version_major, version_minor, family_id;
	55	+ unsigned char fw_check;
56	56	int r;
57	57
58	58	INIT_DELAYED_WORK(&adev->vcn.idle_work, amdgpu_vcn_idle_work_handler);
@@ -83,12 +83,33 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev) · 24 unmodified lines
83	83
84	84	hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
85	85	adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version);
86		− family_id = le32_to_cpu(hdr->ucode_version) & 0xff;
87		− version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;
88		− version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
89		− DRM_INFO("Found VCN firmware Version: %hu.%hu Family ID: %hu\n",
90		− version_major, version_minor, family_id);
91	86
	87	+ /* Bit 20-23, it is encode major and non-zero for new naming convention.
	88	+ * This field is part of version minor and DRM_DISABLED_FLAG in old naming
	89	+ * convention. Since the l:wq!atest version minor is 0x5B and DRM_DISABLED_FLAG
	90	+ * is zero in old naming convention, this field is always zero so far.
	91	+ * These four bits are used to tell which naming convention is present.
	92	+ */
	93	+ fw_check = (le32_to_cpu(hdr->ucode_version) >> 20) & 0xf;
	94	+ if (fw_check) {
	95	+ unsigned int dec_ver, enc_major, enc_minor, vep, fw_rev;
	96	+
	97	+ fw_rev = le32_to_cpu(hdr->ucode_version) & 0xfff;
	98	+ enc_minor = (le32_to_cpu(hdr->ucode_version) >> 12) & 0xff;
	99	+ enc_major = fw_check;
	100	+ dec_ver = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xf;
	101	+ vep = (le32_to_cpu(hdr->ucode_version) >> 28) & 0xf;
	102	+ DRM_INFO("Found VCN firmware Version ENC: %hu.%hu DEC: %hu VEP: %hu Revision: %hu\n",
	103	+ enc_major, enc_minor, dec_ver, vep, fw_rev);
	104	+ } else {
	105	+ unsigned int version_major, version_minor, family_id;
	106	+
	107	+ family_id = le32_to_cpu(hdr->ucode_version) & 0xff;
	108	+ version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;
	109	+ version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;
	110	+ DRM_INFO("Found VCN firmware Version: %hu.%hu Family ID: %hu\n",
	111	+ version_major, version_minor, family_id);
	112	+ }
92	113
93	114	bo_size = AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(hdr->ucode_size_bytes) + 8)
94	115	+ AMDGPU_VCN_STACK_SIZE + AMDGPU_VCN_HEAP_SIZE

drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c+8−4

@@ -107,6 +107,9 @@ static void amdgpu_vm_bo_base_init(struct amdgpu_vm_bo_base *base, · 106 unmodified lines
107	107	return;
108	108	list_add_tail(&base->bo_list, &bo->va);
109	109
	110	+ if (bo->tbo.type == ttm_bo_type_kernel)
	111	+ list_move(&base->vm_status, &vm->relocated);
	112	+
110	113	if (bo->tbo.resv != vm->root.base.bo->tbo.resv)
111	114	return;
112	115
@@ -468,7 +471,6 @@ static int amdgpu_vm_alloc_levels(struct amdgpu_device *adev, · 355 unmodified lines
468	471	pt->parent = amdgpu_bo_ref(parent->base.bo);
469	472
470	473	amdgpu_vm_bo_base_init(&entry->base, vm, pt);
471		− list_move(&entry->base.vm_status, &vm->relocated);
472	474	}
473	475
474	476	if (level < AMDGPU_VM_PTB) {
@@ -1463,7 +1465,9 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev, · 988 unmodified lines
1463	1465	uint64_t count;
1464	1466
1465	1467	max_entries = min(max_entries, 16ull * 1024ull);
1466		− for (count = 1; count < max_entries; ++count) {
	1468	+ for (count = 1;
	1469	+ count < max_entries / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
	1470	+ ++count) {
1467	1471	uint64_t idx = pfn + count;
1468	1472
1469	1473	if (pages_addr[idx] !=
@@ -1476,7 +1480,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev, · 6 unmodified lines
1476	1480	dma_addr = pages_addr;
1477	1481	} else {
1478	1482	addr = pages_addr[pfn];
1479		− max_entries = count;
	1483	+ max_entries = count * (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
1480	1484	}
1481	1485
1482	1486	} else if (flags & AMDGPU_PTE_VALID) {
@@ -1491,7 +1495,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev, · 8 unmodified lines
1491	1495	if (r)
1492	1496	return r;
1493	1497
1494		− pfn += last - start + 1;
	1498	+ pfn += (last - start + 1) / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
1495	1499	if (nodes && nodes->size == pfn) {
1496	1500	pfn = 0;
1497	1501	++nodes;

drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c+36−3

@@ -96,6 +96,38 @@ static u64 amdgpu_vram_mgr_vis_size(struct amdgpu_device *adev, · 95 unmodified lines
96	96	adev->gmc.visible_vram_size : end) - start;
97	97	}
98	98
	99	+/**
	100	+ * amdgpu_vram_mgr_bo_invisible_size - CPU invisible BO size
	101	+ *
	102	+ * @bo: &amdgpu_bo buffer object (must be in VRAM)
	103	+ *
	104	+ * Returns:
	105	+ * How much of the given &amdgpu_bo buffer object lies in CPU invisible VRAM.
	106	+ */
	107	+u64 amdgpu_vram_mgr_bo_invisible_size(struct amdgpu_bo *bo)
	108	+{
	109	+ struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
	110	+ struct ttm_mem_reg *mem = &bo->tbo.mem;
	111	+ struct drm_mm_node *nodes = mem->mm_node;
	112	+ unsigned pages = mem->num_pages;
	113	+ u64 usage = 0;
	114	+
	115	+ if (adev->gmc.visible_vram_size == adev->gmc.real_vram_size)
	116	+ return 0;
	117	+
	118	+ if (mem->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT)
	119	+ return amdgpu_bo_size(bo);
	120	+
	121	+ while (nodes && pages) {
	122	+ usage += nodes->size << PAGE_SHIFT;
	123	+ usage -= amdgpu_vram_mgr_vis_size(adev, nodes);
	124	+ pages -= nodes->size;
	125	+ ++nodes;
	126	+ }
	127	+
	128	+ return usage;
	129	+}
	130	+
99	131	/**
100	132	* amdgpu_vram_mgr_new - allocate new ranges
101	133	*
@@ -135,7 +167,8 @@ static int amdgpu_vram_mgr_new(struct ttm_mem_type_manager *man, · 33 unmodified lines
135	167	num_nodes = DIV_ROUND_UP(mem->num_pages, pages_per_node);
136	168	}
137	169
138		− nodes = kcalloc(num_nodes, sizeof(*nodes), GFP_KERNEL);
	170	+ nodes = kvmalloc_array(num_nodes, sizeof(*nodes),
	171	+ GFP_KERNEL \| __GFP_ZERO);
139	172	if (!nodes)
140	173	return -ENOMEM;
141	174
@@ -190,7 +223,7 @@ error: · 48 unmodified lines
190	223	drm_mm_remove_node(&nodes[i]);
191	224	spin_unlock(&mgr->lock);
192	225
193		− kfree(nodes);
	226	+ kvfree(nodes);
194	227	return r == -ENOSPC ? 0 : r;
195	228	}
196	229
@@ -229,7 +262,7 @@ static void amdgpu_vram_mgr_del(struct ttm_mem_type_manager *man, · 32 unmodified lines
229	262	atomic64_sub(usage, &mgr->usage);
230	263	atomic64_sub(vis_usage, &mgr->vis_usage);
231	264
232		− kfree(mem->mm_node);
	265	+ kvfree(mem->mm_node);
233	266	mem->mm_node = NULL;
234	267	}
235	268

drivers/gpu/drm/amd/amdgpu/vce_v3_0.c+2−2

@@ -900,7 +900,7 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_phys_funcs = { · 899 unmodified lines
900	900	.emit_frame_size =
901	901	4 + /* vce_v3_0_emit_pipeline_sync */
902	902	6, /* amdgpu_vce_ring_emit_fence x1 no user fence */
903		− .emit_ib_size = 5, /* vce_v3_0_ring_emit_ib */
	903	+ .emit_ib_size = 4, /* amdgpu_vce_ring_emit_ib */
904	904	.emit_ib = amdgpu_vce_ring_emit_ib,
905	905	.emit_fence = amdgpu_vce_ring_emit_fence,
906	906	.test_ring = amdgpu_vce_ring_test_ring,
@@ -924,7 +924,7 @@ static const struct amdgpu_ring_funcs vce_v3_0_ring_vm_funcs = { · 17 unmodified lines
924	924	6 + /* vce_v3_0_emit_vm_flush */
925	925	4 + /* vce_v3_0_emit_pipeline_sync */
926	926	6 + 6, /* amdgpu_vce_ring_emit_fence x2 vm fence */
927		− .emit_ib_size = 4, /* amdgpu_vce_ring_emit_ib */
	927	+ .emit_ib_size = 5, /* vce_v3_0_ring_emit_ib */
928	928	.emit_ib = vce_v3_0_ring_emit_ib,
929	929	.emit_vm_flush = vce_v3_0_emit_vm_flush,
930	930	.emit_pipeline_sync = vce_v3_0_emit_pipeline_sync,

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+55−10

@@ -2175,6 +2175,46 @@ get_output_color_space(const struct dc_crtc_timing *dc_crtc_timing) · 2174 unmodified lines
2175	2175	return color_space;
2176	2176	}
2177	2177
	2178	+static void reduce_mode_colour_depth(struct dc_crtc_timing *timing_out)
	2179	+{
	2180	+ if (timing_out->display_color_depth <= COLOR_DEPTH_888)
	2181	+ return;
	2182	+
	2183	+ timing_out->display_color_depth--;
	2184	+}
	2185	+
	2186	+static void adjust_colour_depth_from_display_info(struct dc_crtc_timing *timing_out,
	2187	+ const struct drm_display_info *info)
	2188	+{
	2189	+ int normalized_clk;
	2190	+ if (timing_out->display_color_depth <= COLOR_DEPTH_888)
	2191	+ return;
	2192	+ do {
	2193	+ normalized_clk = timing_out->pix_clk_khz;
	2194	+ /* YCbCr 4:2:0 requires additional adjustment of 1/2 */
	2195	+ if (timing_out->pixel_encoding == PIXEL_ENCODING_YCBCR420)
	2196	+ normalized_clk /= 2;
	2197	+ /* Adjusting pix clock following on HDMI spec based on colour depth */
	2198	+ switch (timing_out->display_color_depth) {
	2199	+ case COLOR_DEPTH_101010:
	2200	+ normalized_clk = (normalized_clk * 30) / 24;
	2201	+ break;
	2202	+ case COLOR_DEPTH_121212:
	2203	+ normalized_clk = (normalized_clk * 36) / 24;
	2204	+ break;
	2205	+ case COLOR_DEPTH_161616:
	2206	+ normalized_clk = (normalized_clk * 48) / 24;
	2207	+ break;
	2208	+ default:
	2209	+ return;
	2210	+ }
	2211	+ if (normalized_clk <= info->max_tmds_clock)
	2212	+ return;
	2213	+ reduce_mode_colour_depth(timing_out);
	2214	+
	2215	+ } while (timing_out->display_color_depth > COLOR_DEPTH_888);
	2216	+
	2217	+}
2178	2218	/*****************************************************************************/
2179	2219
2180	2220	static void
@@ -2183,6 +2223,7 @@ fill_stream_properties_from_drm_display_mode(struct dc_stream_state *stream, · 2 unmodified lines
2183	2223	const struct drm_connector *connector)
2184	2224	{
2185	2225	struct dc_crtc_timing *timing_out = &stream->timing;
	2226	+ const struct drm_display_info *info = &connector->display_info;
2186	2227
2187	2228	memset(timing_out, 0, sizeof(struct dc_crtc_timing));
2188	2229
@@ -2191,8 +2232,10 @@ fill_stream_properties_from_drm_display_mode(struct dc_stream_state *stream, · 2 unmodified lines
2191	2232	timing_out->v_border_top = 0;
2192	2233	timing_out->v_border_bottom = 0;
2193	2234	/* TODO: un-hardcode */
2194		−
2195		− if ((connector->display_info.color_formats & DRM_COLOR_FORMAT_YCRCB444)
	2235	+ if (drm_mode_is_420_only(info, mode_in)
	2236	+ && stream->sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A)
	2237	+ timing_out->pixel_encoding = PIXEL_ENCODING_YCBCR420;
	2238	+ else if ((connector->display_info.color_formats & DRM_COLOR_FORMAT_YCRCB444)
2196	2239	&& stream->sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A)
2197	2240	timing_out->pixel_encoding = PIXEL_ENCODING_YCBCR444;
2198	2241	else
@@ -2228,6 +2271,8 @@ fill_stream_properties_from_drm_display_mode(struct dc_stream_state *stream, · 29 unmodified lines
2228	2271
2229	2272	stream->out_transfer_func->type = TF_TYPE_PREDEFINED;
2230	2273	stream->out_transfer_func->tf = TRANSFER_FUNCTION_SRGB;
	2274	+ if (stream->sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A)
	2275	+ adjust_colour_depth_from_display_info(timing_out, info);
2231	2276	}
2232	2277
2233	2278	static void fill_audio_info(struct audio_info *audio_info,
@@ -3928,10 +3973,11 @@ static void amdgpu_dm_do_flip(struct drm_crtc *crtc, · 1694 unmodified lines
3928	3973	if (acrtc->base.state->event)
3929	3974	prepare_flip_isr(acrtc);
3930	3975
	3976	+ spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
	3977	+
3931	3978	surface_updates->surface = dc_stream_get_status(acrtc_state->stream)->plane_states[0];
3932	3979	surface_updates->flip_addr = &addr;
3933	3980
3934		−
3935	3981	dc_commit_updates_for_stream(adev->dm.dc,
3936	3982	surface_updates,
3937	3983	1,
@@ -3944,9 +3990,6 @@ static void amdgpu_dm_do_flip(struct drm_crtc *crtc, · 6 unmodified lines
3944	3990	__func__,
3945	3991	addr.address.grph.addr.high_part,
3946	3992	addr.address.grph.addr.low_part);
3947		−
3948		−
3949		− spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
3950	3993	}
3951	3994
3952	3995	/*
@@ -4206,6 +4249,7 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) · 253 unmodified lines
4206	4249	struct drm_connector *connector;
4207	4250	struct drm_connector_state old_con_state, new_con_state;
4208	4251	struct dm_crtc_state dm_old_crtc_state, dm_new_crtc_state;
	4252	+ int crtc_disable_count = 0;
4209	4253
4210	4254	drm_atomic_helper_update_legacy_modeset_state(dev, state);
4211	4255
@@ -4410,6 +4454,9 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) · 198 unmodified lines
4410	4454	struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
4411	4455	bool modeset_needed;
4412	4456
	4457	+ if (old_crtc_state->active && !new_crtc_state->active)
	4458	+ crtc_disable_count++;
	4459	+
4413	4460	dm_new_crtc_state = to_dm_crtc_state(new_crtc_state);
4414	4461	dm_old_crtc_state = to_dm_crtc_state(old_crtc_state);
4415	4462	modeset_needed = modeset_required(
@@ -4463,11 +4510,9 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state) · 47 unmodified lines
4463	4510	* so we can put the GPU into runtime suspend if we're not driving any
4464	4511	* displays anymore
4465	4512	*/
	4513	+ for (i = 0; i < crtc_disable_count; i++)
	4514	+ pm_runtime_put_autosuspend(dev->dev);
4466	4515	pm_runtime_mark_last_busy(dev->dev);
4467		− for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
4468		− if (old_crtc_state->active && !new_crtc_state->active)
4469		− pm_runtime_put_autosuspend(dev->dev);
4470		− }
4471	4516	}
4472	4517
4473	4518

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+8−12

@@ -83,22 +83,21 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, · 82 unmodified lines
83	83	enum i2c_mot_mode mot = (msg->request & DP_AUX_I2C_MOT) ?
84	84	I2C_MOT_TRUE : I2C_MOT_FALSE;
85	85	enum ddc_result res;
86		− uint32_t read_bytes = msg->size;
	86	+ ssize_t read_bytes;
87	87
88	88	if (WARN_ON(msg->size > 16))
89	89	return -E2BIG;
90	90
91	91	switch (msg->request & ~DP_AUX_I2C_MOT) {
92	92	case DP_AUX_NATIVE_READ:
93		− res = dal_ddc_service_read_dpcd_data(
	93	+ read_bytes = dal_ddc_service_read_dpcd_data(
94	94	TO_DM_AUX(aux)->ddc_service,
95	95	false,
96	96	I2C_MOT_UNDEF,
97	97	msg->address,
98	98	msg->buffer,
99		− msg->size,
100		− &read_bytes);
101		− break;
	99	+ msg->size);
	100	+ return read_bytes;
102	101	case DP_AUX_NATIVE_WRITE:
103	102	res = dal_ddc_service_write_dpcd_data(
104	103	TO_DM_AUX(aux)->ddc_service,
@@ -109,15 +108,14 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, · 4 unmodified lines
109	108	msg->size);
110	109	break;
111	110	case DP_AUX_I2C_READ:
112		− res = dal_ddc_service_read_dpcd_data(
	111	+ read_bytes = dal_ddc_service_read_dpcd_data(
113	112	TO_DM_AUX(aux)->ddc_service,
114	113	true,
115	114	mot,
116	115	msg->address,
117	116	msg->buffer,
118		− msg->size,
119		− &read_bytes);
120		− break;
	117	+ msg->size);
	118	+ return read_bytes;
121	119	case DP_AUX_I2C_WRITE:
122	120	res = dal_ddc_service_write_dpcd_data(
123	121	TO_DM_AUX(aux)->ddc_service,
@@ -139,9 +137,7 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, · 15 unmodified lines
139	137	r == DDC_RESULT_SUCESSFULL);
140	138	#endif
141	139
142		− if (res != DDC_RESULT_SUCESSFULL)
143		− return -EIO;
144		− return read_bytes;
	140	+ return msg->size;
145	141	}
146	142
147	143	static enum drm_connector_status

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_services.c+3−2

@@ -255,8 +255,9 @@ static void pp_to_dc_clock_levels_with_latency( · 254 unmodified lines
255	255	DC_DECODE_PP_CLOCK_TYPE(dc_clk_type));
256	256
257	257	for (i = 0; i < clk_level_info->num_levels; i++) {
258		− DRM_DEBUG("DM_PPLIB:\t %d\n", pp_clks->data[i].clocks_in_khz);
259		− clk_level_info->data[i].clocks_in_khz = pp_clks->data[i].clocks_in_khz;
	258	+ DRM_DEBUG("DM_PPLIB:\t %d in 10kHz\n", pp_clks->data[i].clocks_in_khz);
	259	+ /* translate 10kHz to kHz */
	260	+ clk_level_info->data[i].clocks_in_khz = pp_clks->data[i].clocks_in_khz * 10;
260	261	clk_level_info->data[i].latency_in_us = pp_clks->data[i].latency_in_us;
261	262	}
262	263	}

drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c+3−7

@@ -629,14 +629,13 @@ bool dal_ddc_service_query_ddc_data( · 628 unmodified lines
629	629	return ret;
630	630	}
631	631
632		−enum ddc_result dal_ddc_service_read_dpcd_data(
	632	+ssize_t dal_ddc_service_read_dpcd_data(
633	633	struct ddc_service *ddc,
634	634	bool i2c,
635	635	enum i2c_mot_mode mot,
636	636	uint32_t address,
637	637	uint8_t *data,
638		− uint32_t len,
639		− uint32_t *read)
	638	+ uint32_t len)
640	639	{
641	640	struct aux_payload read_payload = {
642	641	.i2c_over_aux = i2c,
@@ -653,8 +652,6 @@ enum ddc_result dal_ddc_service_read_dpcd_data( · 10 unmodified lines
653	652	.mot = mot
654	653	};
655	654
656		− *read = 0;
657		−
658	655	if (len > DEFAULT_AUX_MAX_DATA_SIZE) {
659	656	BREAK_TO_DEBUGGER();
660	657	return DDC_RESULT_FAILED_INVALID_OPERATION;
@@ -664,8 +661,7 @@ enum ddc_result dal_ddc_service_read_dpcd_data( · 3 unmodified lines
664	661	ddc->ctx->i2caux,
665	662	ddc->ddc_pin,
666	663	&command)) {
667		− *read = command.payloads->length;
668		− return DDC_RESULT_SUCESSFULL;
	664	+ return (ssize_t)command.payloads->length;
669	665	}
670	666
671	667	return DDC_RESULT_FAILED_OPERATION;

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+3−5

@@ -1767,12 +1767,10 @@ static void dp_test_send_link_training(struct dc_link *link) · 1766 unmodified lines
1767	1767	dp_retrain_link_dp_test(link, &link_settings, false);
1768	1768	}
1769	1769
1770		−/* TODO hbr2 compliance eye output is unstable
	1770	+/* TODO Raven hbr2 compliance eye output is unstable
1771	1771	* (toggling on and off) with debugger break
1772	1772	* This caueses intermittent PHY automation failure
1773	1773	* Need to look into the root cause */
1774		−static uint8_t force_tps4_for_cp2520 = 1;
1775		−
1776	1774	static void dp_test_send_phy_test_pattern(struct dc_link *link)
1777	1775	{
1778	1776	union phy_test_pattern dpcd_test_pattern;
@@ -1832,13 +1830,13 @@ static void dp_test_send_phy_test_pattern(struct dc_link *link) · 53 unmodified lines
1832	1830	break;
1833	1831	case PHY_TEST_PATTERN_CP2520_1:
1834	1832	/* CP2520 pattern is unstable, temporarily use TPS4 instead */
1835		− test_pattern = (force_tps4_for_cp2520 == 1) ?
	1833	+ test_pattern = (link->dc->caps.force_dp_tps4_for_cp2520 == 1) ?
1836	1834	DP_TEST_PATTERN_TRAINING_PATTERN4 :
1837	1835	DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE;
1838	1836	break;
1839	1837	case PHY_TEST_PATTERN_CP2520_2:
1840	1838	/* CP2520 pattern is unstable, temporarily use TPS4 instead */
1841		− test_pattern = (force_tps4_for_cp2520 == 1) ?
	1839	+ test_pattern = (link->dc->caps.force_dp_tps4_for_cp2520 == 1) ?
1842	1840	DP_TEST_PATTERN_TRAINING_PATTERN4 :
1843	1841	DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE;
1844	1842	break;

drivers/gpu/drm/amd/display/dc/dc.h+1−0

@@ -76,6 +76,7 @@ struct dc_caps { · 75 unmodified lines
76	76	bool is_apu;
77	77	bool dual_link_dvi;
78	78	bool post_blend_color_processing;
	79	+ bool force_dp_tps4_for_cp2520;
79	80	};
80	81
81	82	struct dc_dcc_surface_param {

drivers/gpu/drm/amd/display/dc/dce/dce_mem_input.c+25−2

@@ -741,6 +741,29 @@ static struct mem_input_funcs dce_mi_funcs = { · 740 unmodified lines
741	741	.mem_input_is_flip_pending = dce_mi_is_flip_pending
742	742	};
743	743
	744	+static struct mem_input_funcs dce112_mi_funcs = {
	745	+ .mem_input_program_display_marks = dce112_mi_program_display_marks,
	746	+ .allocate_mem_input = dce_mi_allocate_dmif,
	747	+ .free_mem_input = dce_mi_free_dmif,
	748	+ .mem_input_program_surface_flip_and_addr =
	749	+ dce_mi_program_surface_flip_and_addr,
	750	+ .mem_input_program_pte_vm = dce_mi_program_pte_vm,
	751	+ .mem_input_program_surface_config =
	752	+ dce_mi_program_surface_config,
	753	+ .mem_input_is_flip_pending = dce_mi_is_flip_pending
	754	+};
	755	+
	756	+static struct mem_input_funcs dce120_mi_funcs = {
	757	+ .mem_input_program_display_marks = dce120_mi_program_display_marks,
	758	+ .allocate_mem_input = dce_mi_allocate_dmif,
	759	+ .free_mem_input = dce_mi_free_dmif,
	760	+ .mem_input_program_surface_flip_and_addr =
	761	+ dce_mi_program_surface_flip_and_addr,
	762	+ .mem_input_program_pte_vm = dce_mi_program_pte_vm,
	763	+ .mem_input_program_surface_config =
	764	+ dce_mi_program_surface_config,
	765	+ .mem_input_is_flip_pending = dce_mi_is_flip_pending
	766	+};
744	767
745	768	void dce_mem_input_construct(
746	769	struct dce_mem_input *dce_mi,
@@ -769,7 +792,7 @@ void dce112_mem_input_construct( · 22 unmodified lines
769	792	const struct dce_mem_input_mask *mi_mask)
770	793	{
771	794	dce_mem_input_construct(dce_mi, ctx, inst, regs, mi_shift, mi_mask);
772		− dce_mi->base.funcs->mem_input_program_display_marks = dce112_mi_program_display_marks;
	795	+ dce_mi->base.funcs = &dce112_mi_funcs;
773	796	}
774	797
775	798	void dce120_mem_input_construct(
@@ -781,5 +804,5 @@ void dce120_mem_input_construct( · 5 unmodified lines
781	804	const struct dce_mem_input_mask *mi_mask)
782	805	{
783	806	dce_mem_input_construct(dce_mi, ctx, inst, regs, mi_shift, mi_mask);
784		− dce_mi->base.funcs->mem_input_program_display_marks = dce120_mi_program_display_marks;
	807	+ dce_mi->base.funcs = &dce120_mi_funcs;
785	808	}

drivers/gpu/drm/amd/display/dc/dce100/dce100_resource.c+16−3

@@ -678,9 +678,22 @@ bool dce100_validate_bandwidth( · 677 unmodified lines
678	678	struct dc *dc,
679	679	struct dc_state *context)
680	680	{
681		− /* TODO implement when needed but for now hardcode max value*/
682		− context->bw.dce.dispclk_khz = 681000;
683		− context->bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER;
	681	+ int i;
	682	+ bool at_least_one_pipe = false;
	683	+
	684	+ for (i = 0; i < dc->res_pool->pipe_count; i++) {
	685	+ if (context->res_ctx.pipe_ctx[i].stream)
	686	+ at_least_one_pipe = true;
	687	+ }
	688	+
	689	+ if (at_least_one_pipe) {
	690	+ /* TODO implement when needed but for now hardcode max value*/
	691	+ context->bw.dce.dispclk_khz = 681000;
	692	+ context->bw.dce.yclk_khz = 250000 * MEMORY_TYPE_MULTIPLIER;
	693	+ } else {
	694	+ context->bw.dce.dispclk_khz = 0;
	695	+ context->bw.dce.yclk_khz = 0;
	696	+ }
684	697
685	698	return true;
686	699	}

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c+2−0

@@ -1027,6 +1027,8 @@ static bool construct( · 1026 unmodified lines
1027	1027	dc->caps.max_slave_planes = 1;
1028	1028	dc->caps.is_apu = true;
1029	1029	dc->caps.post_blend_color_processing = false;
	1030	+ /* Raven DP PHY HBR2 eye diagram pattern is not stable. Use TP4 */
	1031	+ dc->caps.force_dp_tps4_for_cp2520 = true;
1030	1032
1031	1033	if (dc->ctx->dce_environment == DCE_ENV_PRODUCTION_DRV)
1032	1034	dc->debug = debug_defaults_drv;

drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h+2−3

@@ -102,14 +102,13 @@ bool dal_ddc_service_query_ddc_data( · 101 unmodified lines
102	102	uint8_t *read_buf,
103	103	uint32_t read_size);
104	104
105		−enum ddc_result dal_ddc_service_read_dpcd_data(
	105	+ssize_t dal_ddc_service_read_dpcd_data(
106	106	struct ddc_service *ddc,
107	107	bool i2c,
108	108	enum i2c_mot_mode mot,
109	109	uint32_t address,
110	110	uint8_t *data,
111		− uint32_t len,
112		− uint32_t *read);
	111	+ uint32_t len);
113	112
114	113	enum ddc_result dal_ddc_service_write_dpcd_data(
115	114	struct ddc_service *ddc,

drivers/gpu/drm/amd/include/atomfirmware.h+4−1

@@ -1433,7 +1433,10 @@ struct atom_smc_dpm_info_v4_1 · 1432 unmodified lines
1433	1433	uint8_t acggfxclkspreadpercent;
1434	1434	uint16_t acggfxclkspreadfreq;
1435	1435
1436		− uint32_t boardreserved[10];
	1436	+ uint8_t Vr2_I2C_address;
	1437	+ uint8_t padding_vr2[3];
	1438	+
	1439	+ uint32_t boardreserved[9];
1437	1440	};
1438	1441
1439	1442	/*

drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.c+84−12

@@ -512,14 +512,82 @@ int pp_atomfwctrl_get_clk_information_by_clkid(struct pp_hwmgr *hwmgr, BIOS_CLKI · 511 unmodified lines
512	512	return 0;
513	513	}
514	514
	515	+static void pp_atomfwctrl_copy_vbios_bootup_values_3_2(struct pp_hwmgr *hwmgr,
	516	+ struct pp_atomfwctrl_bios_boot_up_values *boot_values,
	517	+ struct atom_firmware_info_v3_2 *fw_info)
	518	+{
	519	+ uint32_t frequency = 0;
	520	+
	521	+ boot_values->ulRevision = fw_info->firmware_revision;
	522	+ boot_values->ulGfxClk = fw_info->bootup_sclk_in10khz;
	523	+ boot_values->ulUClk = fw_info->bootup_mclk_in10khz;
	524	+ boot_values->usVddc = fw_info->bootup_vddc_mv;
	525	+ boot_values->usVddci = fw_info->bootup_vddci_mv;
	526	+ boot_values->usMvddc = fw_info->bootup_mvddc_mv;
	527	+ boot_values->usVddGfx = fw_info->bootup_vddgfx_mv;
	528	+ boot_values->ucCoolingID = fw_info->coolingsolution_id;
	529	+ boot_values->ulSocClk = 0;
	530	+ boot_values->ulDCEFClk = 0;
	531	+
	532	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU11_SYSPLL0_SOCCLK_ID, &frequency))
	533	+ boot_values->ulSocClk = frequency;
	534	+
	535	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU11_SYSPLL0_DCEFCLK_ID, &frequency))
	536	+ boot_values->ulDCEFClk = frequency;
	537	+
	538	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU11_SYSPLL0_ECLK_ID, &frequency))
	539	+ boot_values->ulEClk = frequency;
	540	+
	541	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU11_SYSPLL0_VCLK_ID, &frequency))
	542	+ boot_values->ulVClk = frequency;
	543	+
	544	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU11_SYSPLL0_DCLK_ID, &frequency))
	545	+ boot_values->ulDClk = frequency;
	546	+}
	547	+
	548	+static void pp_atomfwctrl_copy_vbios_bootup_values_3_1(struct pp_hwmgr *hwmgr,
	549	+ struct pp_atomfwctrl_bios_boot_up_values *boot_values,
	550	+ struct atom_firmware_info_v3_1 *fw_info)
	551	+{
	552	+ uint32_t frequency = 0;
	553	+
	554	+ boot_values->ulRevision = fw_info->firmware_revision;
	555	+ boot_values->ulGfxClk = fw_info->bootup_sclk_in10khz;
	556	+ boot_values->ulUClk = fw_info->bootup_mclk_in10khz;
	557	+ boot_values->usVddc = fw_info->bootup_vddc_mv;
	558	+ boot_values->usVddci = fw_info->bootup_vddci_mv;
	559	+ boot_values->usMvddc = fw_info->bootup_mvddc_mv;
	560	+ boot_values->usVddGfx = fw_info->bootup_vddgfx_mv;
	561	+ boot_values->ucCoolingID = fw_info->coolingsolution_id;
	562	+ boot_values->ulSocClk = 0;
	563	+ boot_values->ulDCEFClk = 0;
	564	+
	565	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU9_SYSPLL0_SOCCLK_ID, &frequency))
	566	+ boot_values->ulSocClk = frequency;
	567	+
	568	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU9_SYSPLL0_DCEFCLK_ID, &frequency))
	569	+ boot_values->ulDCEFClk = frequency;
	570	+
	571	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU9_SYSPLL0_ECLK_ID, &frequency))
	572	+ boot_values->ulEClk = frequency;
	573	+
	574	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU9_SYSPLL0_VCLK_ID, &frequency))
	575	+ boot_values->ulVClk = frequency;
	576	+
	577	+ if (!pp_atomfwctrl_get_clk_information_by_clkid(hwmgr, SMU9_SYSPLL0_DCLK_ID, &frequency))
	578	+ boot_values->ulDClk = frequency;
	579	+}
	580	+
515	581	int pp_atomfwctrl_get_vbios_bootup_values(struct pp_hwmgr *hwmgr,
516	582	struct pp_atomfwctrl_bios_boot_up_values *boot_values)
517	583	{
518		− struct atom_firmware_info_v3_1 *info = NULL;
	584	+ struct atom_firmware_info_v3_2 *fwinfo_3_2;
	585	+ struct atom_firmware_info_v3_1 *fwinfo_3_1;
	586	+ struct atom_common_table_header *info = NULL;
519	587	uint16_t ix;
520	588
521	589	ix = GetIndexIntoMasterDataTable(firmwareinfo);
522		− info = (struct atom_firmware_info_v3_1 *)
	590	+ info = (struct atom_common_table_header *)
523	591	smu_atom_get_data_table(hwmgr->adev,
524	592	ix, NULL, NULL, NULL);
525	593
@@ -528,16 +596,18 @@ int pp_atomfwctrl_get_vbios_bootup_values(struct pp_hwmgr *hwmgr, · 2 unmodified lines
528	596	return -EINVAL;
529	597	}
530	598
531		− boot_values->ulRevision = info->firmware_revision;
532		− boot_values->ulGfxClk = info->bootup_sclk_in10khz;
533		− boot_values->ulUClk = info->bootup_mclk_in10khz;
534		− boot_values->usVddc = info->bootup_vddc_mv;
535		− boot_values->usVddci = info->bootup_vddci_mv;
536		− boot_values->usMvddc = info->bootup_mvddc_mv;
537		− boot_values->usVddGfx = info->bootup_vddgfx_mv;
538		− boot_values->ucCoolingID = info->coolingsolution_id;
539		− boot_values->ulSocClk = 0;
540		− boot_values->ulDCEFClk = 0;
	599	+ if ((info->format_revision == 3) && (info->content_revision == 2)) {
	600	+ fwinfo_3_2 = (struct atom_firmware_info_v3_2 *)info;
	601	+ pp_atomfwctrl_copy_vbios_bootup_values_3_2(hwmgr,
	602	+ boot_values, fwinfo_3_2);
	603	+ } else if ((info->format_revision == 3) && (info->content_revision == 1)) {
	604	+ fwinfo_3_1 = (struct atom_firmware_info_v3_1 *)info;
	605	+ pp_atomfwctrl_copy_vbios_bootup_values_3_1(hwmgr,
	606	+ boot_values, fwinfo_3_1);
	607	+ } else {
	608	+ pr_info("Fw info table revision does not match!");
	609	+ return -EINVAL;
	610	+ }
541	611
542	612	return 0;
543	613	}
@@ -629,5 +699,7 @@ int pp_atomfwctrl_get_smc_dpm_information(struct pp_hwmgr *hwmgr, · 85 unmodified lines
629	699	param->acggfxclkspreadpercent = info->acggfxclkspreadpercent;
630	700	param->acggfxclkspreadfreq = info->acggfxclkspreadfreq;
631	701
	702	+ param->Vr2_I2C_address = info->Vr2_I2C_address;
	703	+
632	704	return 0;
633	705	}

drivers/gpu/drm/amd/powerplay/hwmgr/ppatomfwctrl.h+5−0

@@ -136,6 +136,9 @@ struct pp_atomfwctrl_bios_boot_up_values { · 135 unmodified lines
136	136	uint32_t ulUClk;
137	137	uint32_t ulSocClk;
138	138	uint32_t ulDCEFClk;
	139	+ uint32_t ulEClk;
	140	+ uint32_t ulVClk;
	141	+ uint32_t ulDClk;
139	142	uint16_t usVddc;
140	143	uint16_t usVddci;
141	144	uint16_t usMvddc;
@@ -207,6 +210,8 @@ struct pp_atomfwctrl_smc_dpm_parameters · 65 unmodified lines
207	210	uint8_t acggfxclkspreadenabled;
208	211	uint8_t acggfxclkspreadpercent;
209	212	uint16_t acggfxclkspreadfreq;
	213	+
	214	+ uint8_t Vr2_I2C_address;
210	215	};
211	216
212	217	int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr,

drivers/gpu/drm/amd/powerplay/hwmgr/vega10_powertune.c+1−1

@@ -1090,7 +1090,7 @@ static int vega10_disable_se_edc_config(struct pp_hwmgr *hwmgr) · 1089 unmodified lines
1090	1090	static int vega10_enable_psm_gc_edc_config(struct pp_hwmgr *hwmgr)
1091	1091	{
1092	1092	struct amdgpu_device *adev = hwmgr->adev;
1093		− int result;
	1093	+ int result = 0;
1094	1094	uint32_t num_se = 0;
1095	1095	uint32_t count, data;
1096	1096

drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c+4−0

@@ -81,6 +81,7 @@ static void vega12_set_default_registry_data(struct pp_hwmgr *hwmgr) · 80 unmodified lines
81	81
82	82	data->registry_data.disallowed_features = 0x0;
83	83	data->registry_data.od_state_in_dc_support = 0;
	84	+ data->registry_data.thermal_support = 1;
84	85	data->registry_data.skip_baco_hardware = 0;
85	86
86	87	data->registry_data.log_avfs_param = 0;
@@ -803,6 +804,9 @@ static int vega12_init_smc_table(struct pp_hwmgr *hwmgr) · 716 unmodified lines
803	804	data->vbios_boot_state.soc_clock = boot_up_values.ulSocClk;
804	805	data->vbios_boot_state.dcef_clock = boot_up_values.ulDCEFClk;
805	806	data->vbios_boot_state.uc_cooling_id = boot_up_values.ucCoolingID;
	807	+ data->vbios_boot_state.eclock = boot_up_values.ulEClk;
	808	+ data->vbios_boot_state.dclock = boot_up_values.ulDClk;
	809	+ data->vbios_boot_state.vclock = boot_up_values.ulVClk;
806	810	smum_send_msg_to_smc_with_parameter(hwmgr,
807	811	PPSMC_MSG_SetMinDeepSleepDcefclk,
808	812	(uint32_t)(data->vbios_boot_state.dcef_clock / 100));

drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.h+3−0

@@ -167,6 +167,9 @@ struct vega12_vbios_boot_state { · 166 unmodified lines
167	167	uint32_t mem_clock;
168	168	uint32_t soc_clock;
169	169	uint32_t dcef_clock;
	170	+ uint32_t eclock;
	171	+ uint32_t dclock;
	172	+ uint32_t vclock;
170	173	};
171	174
172	175	#define DPMTABLE_OD_UPDATE_SCLK 0x00000001

drivers/gpu/drm/amd/powerplay/hwmgr/vega12_processpptables.c+2−0

@@ -230,6 +230,8 @@ static int append_vbios_pptable(struct pp_hwmgr hwmgr, PPTable_t ppsmc_pptable · 229 unmodified lines
230	230	ppsmc_pptable->AcgThresholdFreqLow = 0xFFFF;
231	231	}
232	232
	233	+ ppsmc_pptable->Vr2_I2C_address = smc_dpm_table.Vr2_I2C_address;
	234	+
233	235	return 0;
234	236	}
235	237

drivers/gpu/drm/amd/powerplay/inc/vega12/smu9_driver_if.h+4−1

@@ -499,7 +499,10 @@ typedef struct { · 498 unmodified lines
499	499	uint8_t AcgGfxclkSpreadPercent;
500	500	uint16_t AcgGfxclkSpreadFreq;
501	501
502		− uint32_t BoardReserved[10];
	502	+ uint8_t Vr2_I2C_address;
	503	+ uint8_t padding_vr2[3];
	504	+
	505	+ uint32_t BoardReserved[9];
503	506
504	507
505	508	uint32_t MmHubPadding[7];

drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c+12−11

@@ -381,6 +381,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr) · 380 unmodified lines
381	381	uint32_t fw_to_load;
382	382	int result = 0;
383	383	struct SMU_DRAMData_TOC *toc;
	384	+ uint32_t num_entries = 0;
384	385
385	386	if (!hwmgr->reload_fw) {
386	387	pr_info("skip reloading...\n");
@@ -422,41 +423,41 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr) · 35 unmodified lines
422	423	}
423	424
424	425	toc = (struct SMU_DRAMData_TOC *)smu_data->header;
425		− toc->num_entries = 0;
426	426	toc->structure_version = 1;
427	427
428	428	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
429		− UCODE_ID_RLC_G, &toc->entry[toc->num_entries++]),
	429	+ UCODE_ID_RLC_G, &toc->entry[num_entries++]),
430	430	"Failed to Get Firmware Entry.", return -EINVAL);
431	431	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
432		− UCODE_ID_CP_CE, &toc->entry[toc->num_entries++]),
	432	+ UCODE_ID_CP_CE, &toc->entry[num_entries++]),
433	433	"Failed to Get Firmware Entry.", return -EINVAL);
434	434	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
435		− UCODE_ID_CP_PFP, &toc->entry[toc->num_entries++]),
	435	+ UCODE_ID_CP_PFP, &toc->entry[num_entries++]),
436	436	"Failed to Get Firmware Entry.", return -EINVAL);
437	437	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
438		− UCODE_ID_CP_ME, &toc->entry[toc->num_entries++]),
	438	+ UCODE_ID_CP_ME, &toc->entry[num_entries++]),
439	439	"Failed to Get Firmware Entry.", return -EINVAL);
440	440	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
441		− UCODE_ID_CP_MEC, &toc->entry[toc->num_entries++]),
	441	+ UCODE_ID_CP_MEC, &toc->entry[num_entries++]),
442	442	"Failed to Get Firmware Entry.", return -EINVAL);
443	443	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
444		− UCODE_ID_CP_MEC_JT1, &toc->entry[toc->num_entries++]),
	444	+ UCODE_ID_CP_MEC_JT1, &toc->entry[num_entries++]),
445	445	"Failed to Get Firmware Entry.", return -EINVAL);
446	446	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
447		− UCODE_ID_CP_MEC_JT2, &toc->entry[toc->num_entries++]),
	447	+ UCODE_ID_CP_MEC_JT2, &toc->entry[num_entries++]),
448	448	"Failed to Get Firmware Entry.", return -EINVAL);
449	449	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
450		− UCODE_ID_SDMA0, &toc->entry[toc->num_entries++]),
	450	+ UCODE_ID_SDMA0, &toc->entry[num_entries++]),
451	451	"Failed to Get Firmware Entry.", return -EINVAL);
452	452	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
453		− UCODE_ID_SDMA1, &toc->entry[toc->num_entries++]),
	453	+ UCODE_ID_SDMA1, &toc->entry[num_entries++]),
454	454	"Failed to Get Firmware Entry.", return -EINVAL);
455	455	if (!hwmgr->not_vf)
456	456	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
457		− UCODE_ID_MEC_STORAGE, &toc->entry[toc->num_entries++]),
	457	+ UCODE_ID_MEC_STORAGE, &toc->entry[num_entries++]),
458	458	"Failed to Get Firmware Entry.", return -EINVAL);
459	459
	460	+ toc->num_entries = num_entries;
460	461	smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_DRV_DRAM_ADDR_HI, upper_32_bits(smu_data->header_buffer.mc_addr));
461	462	smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_DRV_DRAM_ADDR_LO, lower_32_bits(smu_data->header_buffer.mc_addr));
462	463

drivers/gpu/drm/arm/malidp_drv.c+2−1

@@ -278,7 +278,6 @@ static int malidp_init(struct drm_device *drm) · 277 unmodified lines
278	278
279	279	static void malidp_fini(struct drm_device *drm)
280	280	{
281		− drm_atomic_helper_shutdown(drm);
282	281	drm_mode_config_cleanup(drm);
283	282	}
284	283
@@ -646,6 +645,7 @@ vblank_fail: · 361 unmodified lines
646	645	malidp_de_irq_fini(drm);
647	646	drm->irq_enabled = false;
648	647	irq_init_fail:
	648	+ drm_atomic_helper_shutdown(drm);
649	649	component_unbind_all(dev, drm);
650	650	bind_fail:
651	651	of_node_put(malidp->crtc.port);
@@ -681,6 +681,7 @@ static void malidp_unbind(struct device *dev) · 29 unmodified lines
681	681	malidp_se_irq_fini(drm);
682	682	malidp_de_irq_fini(drm);
683	683	drm->irq_enabled = false;
	684	+ drm_atomic_helper_shutdown(drm);
684	685	component_unbind_all(dev, drm);
685	686	of_node_put(malidp->crtc.port);
686	687	malidp->crtc.port = NULL;

drivers/gpu/drm/arm/malidp_hw.c+2−1

@@ -634,7 +634,8 @@ const struct malidp_hw malidp_device[MALIDP_MAX_DEVICES] = { · 633 unmodified lines
634	634	.vsync_irq = MALIDP500_DE_IRQ_VSYNC,
635	635	},
636	636	.se_irq_map = {
637		− .irq_mask = MALIDP500_SE_IRQ_CONF_MODE,
	637	+ .irq_mask = MALIDP500_SE_IRQ_CONF_MODE \|
	638	+ MALIDP500_SE_IRQ_GLOBAL,
638	639	.vsync_irq = 0,
639	640	},
640	641	.dc_irq_map = {

drivers/gpu/drm/arm/malidp_planes.c+6−3

@@ -23,6 +23,7 @@ · 22 unmodified lines
23	23
24	24	/* Layer specific register offsets */
25	25	#define MALIDP_LAYER_FORMAT 0x000
	26	+#define LAYER_FORMAT_MASK 0x3f
26	27	#define MALIDP_LAYER_CONTROL 0x004
27	28	#define LAYER_ENABLE (1 << 0)
28	29	#define LAYER_FLOWCFG_MASK 7
@@ -235,8 +236,8 @@ static int malidp_de_plane_check(struct drm_plane *plane, · 206 unmodified lines
235	236	if (state->rotation & MALIDP_ROTATED_MASK) {
236	237	int val;
237	238
238		− val = mp->hwdev->hw->rotmem_required(mp->hwdev, state->crtc_h,
239		− state->crtc_w,
	239	+ val = mp->hwdev->hw->rotmem_required(mp->hwdev, state->crtc_w,
	240	+ state->crtc_h,
240	241	fb->format->format);
241	242	if (val < 0)
242	243	return val;
@@ -337,7 +338,9 @@ static void malidp_de_plane_update(struct drm_plane *plane, · 94 unmodified lines
337	338	dest_w = plane->state->crtc_w;
338	339	dest_h = plane->state->crtc_h;
339	340
340		− malidp_hw_write(mp->hwdev, ms->format, mp->layer->base);
	341	+ val = malidp_hw_read(mp->hwdev, mp->layer->base);
	342	+ val = (val & ~LAYER_FORMAT_MASK) \| ms->format;
	343	+ malidp_hw_write(mp->hwdev, val, mp->layer->base);
341	344
342	345	for (i = 0; i < ms->n_planes; i++) {
343	346	/* calculate the offset for the layer's plane registers */

drivers/gpu/drm/armada/armada_crtc.c+10−2

@@ -519,8 +519,9 @@ static irqreturn_t armada_drm_irq(int irq, void *arg) · 518 unmodified lines
519	519	u32 v, stat = readl_relaxed(dcrtc->base + LCD_SPU_IRQ_ISR);
520	520
521	521	/*
522		− * This is rediculous - rather than writing bits to clear, we
523		− * have to set the actual status register value. This is racy.
	522	+ * Reading the ISR appears to clear bits provided CLEAN_SPU_IRQ_ISR
	523	+ * is set. Writing has some other effect to acknowledge the IRQ -
	524	+ * without this, we only get a single IRQ.
524	525	*/
525	526	writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ISR);
526	527
@@ -1116,16 +1117,22 @@ armada_drm_crtc_set_property(struct drm_crtc *crtc, · 589 unmodified lines
1116	1117	static int armada_drm_crtc_enable_vblank(struct drm_crtc *crtc)
1117	1118	{
1118	1119	struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
	1120	+ unsigned long flags;
1119	1121
	1122	+ spin_lock_irqsave(&dcrtc->irq_lock, flags);
1120	1123	armada_drm_crtc_enable_irq(dcrtc, VSYNC_IRQ_ENA);
	1124	+ spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
1121	1125	return 0;
1122	1126	}
1123	1127
1124	1128	static void armada_drm_crtc_disable_vblank(struct drm_crtc *crtc)
1125	1129	{
1126	1130	struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
	1131	+ unsigned long flags;
1127	1132
	1133	+ spin_lock_irqsave(&dcrtc->irq_lock, flags);
1128	1134	armada_drm_crtc_disable_irq(dcrtc, VSYNC_IRQ_ENA);
	1135	+ spin_unlock_irqrestore(&dcrtc->irq_lock, flags);
1129	1136	}
1130	1137
1131	1138	static const struct drm_crtc_funcs armada_crtc_funcs = {
@@ -1415,6 +1422,7 @@ static int armada_drm_crtc_create(struct drm_device drm, struct device dev, · 283 unmodified lines
1415	1422	CFG_PDWN64x66, dcrtc->base + LCD_SPU_SRAM_PARA1);
1416	1423	writel_relaxed(0x2032ff81, dcrtc->base + LCD_SPU_DMA_CTRL1);
1417	1424	writel_relaxed(dcrtc->irq_ena, dcrtc->base + LCD_SPU_IRQ_ENA);
	1425	+ readl_relaxed(dcrtc->base + LCD_SPU_IRQ_ISR);
1418	1426	writel_relaxed(0, dcrtc->base + LCD_SPU_IRQ_ISR);
1419	1427
1420	1428	ret = devm_request_irq(dev, irq, armada_drm_irq, 0, "armada_drm_crtc",

drivers/gpu/drm/armada/armada_hw.h+1−0

@@ -160,6 +160,7 @@ enum { · 159 unmodified lines
160	160	CFG_ALPHAM_GRA = 0x1 << 16,
161	161	CFG_ALPHAM_CFG = 0x2 << 16,
162	162	CFG_ALPHA_MASK = 0xff << 8,
	163	+#define CFG_ALPHA(x) ((x) << 8)
163	164	CFG_PIXCMD_MASK = 0xff,
164	165	};
165	166

drivers/gpu/drm/armada/armada_overlay.c+22−8

@@ -28,6 +28,7 @@ struct armada_ovl_plane_properties { · 27 unmodified lines
28	28	uint16_t contrast;
29	29	uint16_t saturation;
30	30	uint32_t colorkey_mode;
	31	+ uint32_t colorkey_enable;
31	32	};
32	33
33	34	struct armada_ovl_plane {
@@ -54,11 +55,13 @@ armada_ovl_update_attr(struct armada_ovl_plane_properties *prop, · 20 unmodified lines
54	55	writel_relaxed(0x00002000, dcrtc->base + LCD_SPU_CBSH_HUE);
55	56
56	57	spin_lock_irq(&dcrtc->irq_lock);
57		− armada_updatel(prop->colorkey_mode \| CFG_ALPHAM_GRA,
58		− CFG_CKMODE_MASK \| CFG_ALPHAM_MASK \| CFG_ALPHA_MASK,
59		− dcrtc->base + LCD_SPU_DMA_CTRL1);
60		−
61		− armada_updatel(ADV_GRACOLORKEY, 0, dcrtc->base + LCD_SPU_ADV_REG);
	58	+ armada_updatel(prop->colorkey_mode,
	59	+ CFG_CKMODE_MASK \| CFG_ALPHAM_MASK \| CFG_ALPHA_MASK,
	60	+ dcrtc->base + LCD_SPU_DMA_CTRL1);
	61	+ if (dcrtc->variant->has_spu_adv_reg)
	62	+ armada_updatel(prop->colorkey_enable,
	63	+ ADV_GRACOLORKEY \| ADV_VIDCOLORKEY,
	64	+ dcrtc->base + LCD_SPU_ADV_REG);
62	65	spin_unlock_irq(&dcrtc->irq_lock);
63	66	}
64	67
@@ -321,8 +324,17 @@ static int armada_ovl_plane_set_property(struct drm_plane *plane, · 256 unmodified lines
321	324	dplane->prop.colorkey_vb \|= K2B(val);
322	325	update_attr = true;
323	326	} else if (property == priv->colorkey_mode_prop) {
324		− dplane->prop.colorkey_mode &= ~CFG_CKMODE_MASK;
325		− dplane->prop.colorkey_mode \|= CFG_CKMODE(val);
	327	+ if (val == CKMODE_DISABLE) {
	328	+ dplane->prop.colorkey_mode =
	329	+ CFG_CKMODE(CKMODE_DISABLE) \|
	330	+ CFG_ALPHAM_CFG \| CFG_ALPHA(255);
	331	+ dplane->prop.colorkey_enable = 0;
	332	+ } else {
	333	+ dplane->prop.colorkey_mode =
	334	+ CFG_CKMODE(val) \|
	335	+ CFG_ALPHAM_GRA \| CFG_ALPHA(0);
	336	+ dplane->prop.colorkey_enable = ADV_GRACOLORKEY;
	337	+ }
326	338	update_attr = true;
327	339	} else if (property == priv->brightness_prop) {
328	340	dplane->prop.brightness = val - 256;
@@ -453,7 +465,9 @@ int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs) · 124 unmodified lines
453	465	dplane->prop.colorkey_yr = 0xfefefe00;
454	466	dplane->prop.colorkey_ug = 0x01010100;
455	467	dplane->prop.colorkey_vb = 0x01010100;
456		− dplane->prop.colorkey_mode = CFG_CKMODE(CKMODE_RGB);
	468	+ dplane->prop.colorkey_mode = CFG_CKMODE(CKMODE_RGB) \|
	469	+ CFG_ALPHAM_GRA \| CFG_ALPHA(0);
	470	+ dplane->prop.colorkey_enable = ADV_GRACOLORKEY;
457	471	dplane->prop.brightness = 0;
458	472	dplane->prop.contrast = 0x4000;
459	473	dplane->prop.saturation = 0x4000;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c+1−1

@@ -839,7 +839,7 @@ static int atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane) · 838 unmodified lines
839	839	return ret;
840	840	}
841	841
842		− if (desc->layout.xstride && desc->layout.pstride) {
	842	+ if (desc->layout.xstride[0] && desc->layout.pstride[0]) {
843	843	int ret;
844	844
845	845	ret = drm_plane_create_rotation_property(&plane->base,

drivers/gpu/drm/bridge/adv7511/adv7511_drv.c+12−0

@@ -429,6 +429,18 @@ static void adv7511_hpd_work(struct work_struct *work) · 428 unmodified lines
429	429	else
430	430	status = connector_status_disconnected;
431	431
	432	+ /*
	433	+ * The bridge resets its registers on unplug. So when we get a plug
	434	+ * event and we're already supposed to be powered, cycle the bridge to
	435	+ * restore its state.
	436	+ */
	437	+ if (status == connector_status_connected &&
	438	+ adv7511->connector.status == connector_status_disconnected &&
	439	+ adv7511->powered) {
	440	+ regcache_mark_dirty(adv7511->regmap);
	441	+ adv7511_power_on(adv7511);
	442	+ }
	443	+
432	444	if (adv7511->connector.status != status) {
433	445	adv7511->connector.status = status;
434	446	if (status == connector_status_disconnected)

drivers/gpu/drm/bridge/sil-sii8620.c+157−208

@@ -14,6 +14,7 @@ · 13 unmodified lines
14	14	#include <drm/bridge/mhl.h>
15	15	#include <drm/drm_crtc.h>
16	16	#include <drm/drm_edid.h>
	17	+#include <drm/drm_encoder.h>
17	18
18	19	#include <linux/clk.h>
19	20	#include <linux/delay.h>
@@ -36,8 +37,11 @@ · 16 unmodified lines
36	37
37	38	#define SII8620_BURST_BUF_LEN 288
38	39	#define VAL_RX_HDMI_CTRL2_DEFVAL VAL_RX_HDMI_CTRL2_IDLE_CNT(3)
39		−#define MHL1_MAX_LCLK 225000
40		−#define MHL3_MAX_LCLK 600000
	40	+
	41	+#define MHL1_MAX_PCLK 75000
	42	+#define MHL1_MAX_PCLK_PP_MODE 150000
	43	+#define MHL3_MAX_PCLK 200000
	44	+#define MHL3_MAX_PCLK_PP_MODE 300000
41	45
42	46	enum sii8620_mode {
43	47	CM_DISCONNECTED,
@@ -69,9 +73,7 @@ struct sii8620 { · 25 unmodified lines
69	73	struct regulator_bulk_data supplies[2];
70	74	struct mutex lock; /* context lock, protects fields below */
71	75	int error;
72		− int pixel_clock;
73	76	unsigned int use_packed_pixel:1;
74		− int video_code;
75	77	enum sii8620_mode mode;
76	78	enum sii8620_sink_type sink_type;
77	79	u8 cbus_status;
@@ -79,7 +81,9 @@ struct sii8620 { · 1 unmodified line
79	81	u8 xstat[MHL_XDS_SIZE];
80	82	u8 devcap[MHL_DCAP_SIZE];
81	83	u8 xdevcap[MHL_XDC_SIZE];
82		− u8 avif[HDMI_INFOFRAME_SIZE(AVI)];
	84	+ bool feature_complete;
	85	+ bool devcap_read;
	86	+ bool sink_detected;
83	87	struct edid *edid;
84	88	unsigned int gen2_write_burst:1;
85	89	enum sii8620_mt_state mt_state;
@@ -476,7 +480,7 @@ static void sii8620_update_array(u8 dst, u8 src, int count) · 390 unmodified lines
476	480	}
477	481	}
478	482
479		−static void sii8620_sink_detected(struct sii8620 *ctx, int ret)
	483	+static void sii8620_identify_sink(struct sii8620 *ctx)
480	484	{
481	485	static const char * const sink_str[] = {
482	486	[SINK_NONE] = "NONE",
@@ -487,7 +491,7 @@ static void sii8620_sink_detected(struct sii8620 *ctx, int ret) · 4 unmodified lines
487	491	char sink_name[20];
488	492	struct device *dev = ctx->dev;
489	493
490		− if (ret < 0)
	494	+ if (!ctx->sink_detected \|\| !ctx->devcap_read)
491	495	return;
492	496
493	497	sii8620_fetch_edid(ctx);
@@ -496,6 +500,7 @@ static void sii8620_sink_detected(struct sii8620 *ctx, int ret) · 2 unmodified lines
496	500	sii8620_mhl_disconnected(ctx);
497	501	return;
498	502	}
	503	+ sii8620_set_upstream_edid(ctx);
499	504
500	505	if (drm_detect_hdmi_monitor(ctx->edid))
501	506	ctx->sink_type = SINK_HDMI;
@@ -508,53 +513,6 @@ static void sii8620_sink_detected(struct sii8620 *ctx, int ret) · 6 unmodified lines
508	513	sink_str[ctx->sink_type], sink_name);
509	514	}
510	515
511		−static void sii8620_hsic_init(struct sii8620 *ctx)
512		−{
513		− if (!sii8620_is_mhl3(ctx))
514		− return;
515		−
516		− sii8620_write(ctx, REG_FCGC,
517		− BIT_FCGC_HSIC_HOSTMODE \| BIT_FCGC_HSIC_ENABLE);
518		− sii8620_setbits(ctx, REG_HRXCTRL3,
519		− BIT_HRXCTRL3_HRX_STAY_RESET \| BIT_HRXCTRL3_STATUS_EN, ~0);
520		− sii8620_setbits(ctx, REG_TTXNUMB, MSK_TTXNUMB_TTX_NUMBPS, 4);
521		− sii8620_setbits(ctx, REG_TRXCTRL, BIT_TRXCTRL_TRX_FROM_SE_COC, ~0);
522		− sii8620_setbits(ctx, REG_HTXCTRL, BIT_HTXCTRL_HTX_DRVCONN1, 0);
523		− sii8620_setbits(ctx, REG_KEEPER, MSK_KEEPER_MODE, VAL_KEEPER_MODE_HOST);
524		− sii8620_write_seq_static(ctx,
525		− REG_TDMLLCTL, 0,
526		− REG_UTSRST, BIT_UTSRST_HRX_SRST \| BIT_UTSRST_HTX_SRST \|
527		− BIT_UTSRST_KEEPER_SRST \| BIT_UTSRST_FC_SRST,
528		− REG_UTSRST, BIT_UTSRST_HRX_SRST \| BIT_UTSRST_HTX_SRST,
529		− REG_HRXINTL, 0xff,
530		− REG_HRXINTH, 0xff,
531		− REG_TTXINTL, 0xff,
532		− REG_TTXINTH, 0xff,
533		− REG_TRXINTL, 0xff,
534		− REG_TRXINTH, 0xff,
535		− REG_HTXINTL, 0xff,
536		− REG_HTXINTH, 0xff,
537		− REG_FCINTR0, 0xff,
538		− REG_FCINTR1, 0xff,
539		− REG_FCINTR2, 0xff,
540		− REG_FCINTR3, 0xff,
541		− REG_FCINTR4, 0xff,
542		− REG_FCINTR5, 0xff,
543		− REG_FCINTR6, 0xff,
544		− REG_FCINTR7, 0xff
545		− );
546		−}
547		−
548		−static void sii8620_edid_read(struct sii8620 *ctx, int ret)
549		−{
550		− if (ret < 0)
551		− return;
552		−
553		− sii8620_set_upstream_edid(ctx);
554		− sii8620_hsic_init(ctx);
555		− sii8620_enable_hpd(ctx);
556		−}
557		−
558	516	static void sii8620_mr_devcap(struct sii8620 *ctx)
559	517	{
560	518	u8 dcap[MHL_DCAP_SIZE];
@@ -570,6 +528,8 @@ static void sii8620_mr_devcap(struct sii8620 *ctx) · 9 unmodified lines
570	528	dcap[MHL_DCAP_ADOPTER_ID_H], dcap[MHL_DCAP_ADOPTER_ID_L],
571	529	dcap[MHL_DCAP_DEVICE_ID_H], dcap[MHL_DCAP_DEVICE_ID_L]);
572	530	sii8620_update_array(ctx->devcap, dcap, MHL_DCAP_SIZE);
	531	+ ctx->devcap_read = true;
	532	+ sii8620_identify_sink(ctx);
573	533	}
574	534
575	535	static void sii8620_mr_xdevcap(struct sii8620 *ctx)
@@ -807,6 +767,7 @@ static void sii8620_burst_rx_all(struct sii8620 *ctx) · 231 unmodified lines
807	767	static void sii8620_fetch_edid(struct sii8620 *ctx)
808	768	{
809	769	u8 lm_ddc, ddc_cmd, int3, cbus;
	770	+ unsigned long timeout;
810	771	int fetched, i;
811	772	int edid_len = EDID_LENGTH;
812	773	u8 *edid;
@@ -856,23 +817,31 @@ static void sii8620_fetch_edid(struct sii8620 *ctx) · 43 unmodified lines
856	817	REG_DDC_CMD, ddc_cmd \| VAL_DDC_CMD_ENH_DDC_READ_NO_ACK
857	818	);
858	819
859		− do {
860		− int3 = sii8620_readb(ctx, REG_INTR3);
	820	+ int3 = 0;
	821	+ timeout = jiffies + msecs_to_jiffies(200);
	822	+ for (;;) {
861	823	cbus = sii8620_readb(ctx, REG_CBUS_STATUS);
862		−
863		− if (int3 & BIT_DDC_CMD_DONE)
864		− break;
865		−
866		− if (!(cbus & BIT_CBUS_STATUS_CBUS_CONNECTED)) {
	824	+ if (~cbus & BIT_CBUS_STATUS_CBUS_CONNECTED) {
	825	+ kfree(edid);
	826	+ edid = NULL;
	827	+ goto end;
	828	+ }
	829	+ if (int3 & BIT_DDC_CMD_DONE) {
	830	+ if (sii8620_readb(ctx, REG_DDC_DOUT_CNT)
	831	+ >= FETCH_SIZE)
	832	+ break;
	833	+ } else {
	834	+ int3 = sii8620_readb(ctx, REG_INTR3);
	835	+ }
	836	+ if (time_is_before_jiffies(timeout)) {
	837	+ ctx->error = -ETIMEDOUT;
	838	+ dev_err(ctx->dev, "timeout during EDID read\n");
867	839	kfree(edid);
868	840	edid = NULL;
869	841	goto end;
870	842	}
871		− } while (1);
872		−
873		− sii8620_readb(ctx, REG_DDC_STATUS);
874		− while (sii8620_readb(ctx, REG_DDC_DOUT_CNT) < FETCH_SIZE)
875	843	usleep_range(10, 20);
	844	+ }
876	845
877	846	sii8620_read_buf(ctx, REG_DDC_DATA, edid + fetched, FETCH_SIZE);
878	847	if (fetched + FETCH_SIZE == EDID_LENGTH) {
@@ -971,8 +940,17 @@ static int sii8620_hw_on(struct sii8620 *ctx) · 92 unmodified lines
971	940	ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
972	941	if (ret)
973	942	return ret;
	943	+
974	944	usleep_range(10000, 20000);
975		− return clk_prepare_enable(ctx->clk_xtal);
	945	+ ret = clk_prepare_enable(ctx->clk_xtal);
	946	+ if (ret)
	947	+ return ret;
	948	+
	949	+ msleep(100);
	950	+ gpiod_set_value(ctx->gpio_reset, 0);
	951	+ msleep(100);
	952	+
	953	+ return 0;
976	954	}
977	955
978	956	static int sii8620_hw_off(struct sii8620 *ctx)
@@ -982,17 +960,6 @@ static int sii8620_hw_off(struct sii8620 *ctx) · 3 unmodified lines
982	960	return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
983	961	}
984	962
985		−static void sii8620_hw_reset(struct sii8620 *ctx)
986		−{
987		− usleep_range(10000, 20000);
988		− gpiod_set_value(ctx->gpio_reset, 0);
989		− usleep_range(5000, 20000);
990		− gpiod_set_value(ctx->gpio_reset, 1);
991		− usleep_range(10000, 20000);
992		− gpiod_set_value(ctx->gpio_reset, 0);
993		− msleep(300);
994		−}
995		−
996	963	static void sii8620_cbus_reset(struct sii8620 *ctx)
997	964	{
998	965	sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST
@@ -1055,23 +1022,23 @@ static void sii8620_set_format(struct sii8620 *ctx) · 56 unmodified lines
1055	1022	BIT_M3_P0CTRL_MHL3_P0_PIXEL_MODE_PACKED,
1056	1023	ctx->use_packed_pixel ? ~0 : 0);
1057	1024	} else {
1058		− if (ctx->use_packed_pixel)
	1025	+ if (ctx->use_packed_pixel) {
1059	1026	sii8620_write_seq_static(ctx,
1060	1027	REG_VID_MODE, BIT_VID_MODE_M1080P,
1061	1028	REG_MHL_TOP_CTL, BIT_MHL_TOP_CTL_MHL_PP_SEL \| 1,
1062	1029	REG_MHLTX_CTL6, 0x60
1063	1030	);
1064		− else
	1031	+ } else {
1065	1032	sii8620_write_seq_static(ctx,
1066	1033	REG_VID_MODE, 0,
1067	1034	REG_MHL_TOP_CTL, 1,
1068	1035	REG_MHLTX_CTL6, 0xa0
1069	1036	);
	1037	+ }
1070	1038	}
1071	1039
1072	1040	if (ctx->use_packed_pixel)
1073		− out_fmt = VAL_TPI_FORMAT(YCBCR422, FULL) \|
1074		− BIT_TPI_OUTPUT_CSCMODE709;
	1041	+ out_fmt = VAL_TPI_FORMAT(YCBCR422, FULL);
1075	1042	else
1076	1043	out_fmt = VAL_TPI_FORMAT(RGB, FULL);
1077	1044
@@ -1128,18 +1095,28 @@ static ssize_t mhl3_infoframe_pack(struct mhl3_infoframe *frame, · 50 unmodified lines
1128	1095	return frm_len;
1129	1096	}
1130	1097
1131		−static void sii8620_set_infoframes(struct sii8620 *ctx)
	1098	+static void sii8620_set_infoframes(struct sii8620 *ctx,
	1099	+ struct drm_display_mode *mode)
1132	1100	{
1133	1101	struct mhl3_infoframe mhl_frm;
1134	1102	union hdmi_infoframe frm;
1135	1103	u8 buf[31];
1136	1104	int ret;
1137	1105
	1106	+ ret = drm_hdmi_avi_infoframe_from_display_mode(&frm.avi,
	1107	+ mode,
	1108	+ true);
	1109	+ if (ctx->use_packed_pixel)
	1110	+ frm.avi.colorspace = HDMI_COLORSPACE_YUV422;
	1111	+
	1112	+ if (!ret)
	1113	+ ret = hdmi_avi_infoframe_pack(&frm.avi, buf, ARRAY_SIZE(buf));
	1114	+ if (ret > 0)
	1115	+ sii8620_write_buf(ctx, REG_TPI_AVI_CHSUM, buf + 3, ret - 3);
	1116	+
1138	1117	if (!sii8620_is_mhl3(ctx) \|\| !ctx->use_packed_pixel) {
1139	1118	sii8620_write(ctx, REG_TPI_SC,
1140	1119	BIT_TPI_SC_TPI_OUTPUT_MODE_0_HDMI);
1141		− sii8620_write_buf(ctx, REG_TPI_AVI_CHSUM, ctx->avif + 3,
1142		− ARRAY_SIZE(ctx->avif) - 3);
1143	1120	sii8620_write(ctx, REG_PKT_FILTER_0,
1144	1121	BIT_PKT_FILTER_0_DROP_CEA_GAMUT_PKT \|
1145	1122	BIT_PKT_FILTER_0_DROP_MPEG_PKT \|
@@ -1148,16 +1125,6 @@ static void sii8620_set_infoframes(struct sii8620 *ctx) · 2 unmodified lines
1148	1125	return;
1149	1126	}
1150	1127
1151		− ret = hdmi_avi_infoframe_init(&frm.avi);
1152		− frm.avi.colorspace = HDMI_COLORSPACE_YUV422;
1153		− frm.avi.active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
1154		− frm.avi.picture_aspect = HDMI_PICTURE_ASPECT_16_9;
1155		− frm.avi.colorimetry = HDMI_COLORIMETRY_ITU_709;
1156		− frm.avi.video_code = ctx->video_code;
1157		− if (!ret)
1158		− ret = hdmi_avi_infoframe_pack(&frm.avi, buf, ARRAY_SIZE(buf));
1159		− if (ret > 0)
1160		− sii8620_write_buf(ctx, REG_TPI_AVI_CHSUM, buf + 3, ret - 3);
1161	1128	sii8620_write(ctx, REG_PKT_FILTER_0,
1162	1129	BIT_PKT_FILTER_0_DROP_CEA_GAMUT_PKT \|
1163	1130	BIT_PKT_FILTER_0_DROP_MPEG_PKT \|
@@ -1177,6 +1144,9 @@ static void sii8620_set_infoframes(struct sii8620 *ctx) · 13 unmodified lines
1177	1144
1178	1145	static void sii8620_start_video(struct sii8620 *ctx)
1179	1146	{
	1147	+ struct drm_display_mode *mode =
	1148	+ &ctx->bridge.encoder->crtc->state->adjusted_mode;
	1149	+
1180	1150	if (!sii8620_is_mhl3(ctx))
1181	1151	sii8620_stop_video(ctx);
1182	1152
@@ -1195,8 +1165,14 @@ static void sii8620_start_video(struct sii8620 *ctx) · 12 unmodified lines
1195	1165	sii8620_set_format(ctx);
1196	1166
1197	1167	if (!sii8620_is_mhl3(ctx)) {
1198		− sii8620_mt_write_stat(ctx, MHL_DST_REG(LINK_MODE),
1199		− MHL_DST_LM_CLK_MODE_NORMAL \| MHL_DST_LM_PATH_ENABLED);
	1168	+ u8 link_mode = MHL_DST_LM_PATH_ENABLED;
	1169	+
	1170	+ if (ctx->use_packed_pixel)
	1171	+ link_mode \|= MHL_DST_LM_CLK_MODE_PACKED_PIXEL;
	1172	+ else
	1173	+ link_mode \|= MHL_DST_LM_CLK_MODE_NORMAL;
	1174	+
	1175	+ sii8620_mt_write_stat(ctx, MHL_DST_REG(LINK_MODE), link_mode);
1200	1176	sii8620_set_auto_zone(ctx);
1201	1177	} else {
1202	1178	static const struct {
@@ -1213,10 +1189,10 @@ static void sii8620_start_video(struct sii8620 *ctx) · 10 unmodified lines
1213	1189	MHL_XDS_LINK_RATE_6_0_GBPS, 0x40 },
1214	1190	};
1215	1191	u8 p0_ctrl = BIT_M3_P0CTRL_MHL3_P0_PORT_EN;
1216		− int clk = ctx->pixel_clock * (ctx->use_packed_pixel ? 2 : 3);
	1192	+ int clk = mode->clock * (ctx->use_packed_pixel ? 2 : 3);
1217	1193	int i;
1218	1194
1219		− for (i = 0; i < ARRAY_SIZE(clk_spec); ++i)
	1195	+ for (i = 0; i < ARRAY_SIZE(clk_spec) - 1; ++i)
1220	1196	if (clk < clk_spec[i].max_clk)
1221	1197	break;
1222	1198
@@ -1242,7 +1218,7 @@ static void sii8620_start_video(struct sii8620 *ctx) · 19 unmodified lines
1242	1218	clk_spec[i].link_rate);
1243	1219	}
1244	1220
1245		− sii8620_set_infoframes(ctx);
	1221	+ sii8620_set_infoframes(ctx, mode);
1246	1222	}
1247	1223
1248	1224	static void sii8620_disable_hpd(struct sii8620 *ctx)
@@ -1534,6 +1510,16 @@ static void sii8620_set_mode(struct sii8620 *ctx, enum sii8620_mode mode) · 285 unmodified lines
1534	1510	);
1535	1511	}
1536	1512
	1513	+static void sii8620_hpd_unplugged(struct sii8620 *ctx)
	1514	+{
	1515	+ sii8620_disable_hpd(ctx);
	1516	+ ctx->sink_type = SINK_NONE;
	1517	+ ctx->sink_detected = false;
	1518	+ ctx->feature_complete = false;
	1519	+ kfree(ctx->edid);
	1520	+ ctx->edid = NULL;
	1521	+}
	1522	+
1537	1523	static void sii8620_disconnect(struct sii8620 *ctx)
1538	1524	{
1539	1525	sii8620_disable_gen2_write_burst(ctx);
@@ -1561,7 +1547,7 @@ static void sii8620_disconnect(struct sii8620 *ctx) · 21 unmodified lines
1561	1547	REG_MHL_DP_CTL6, 0x2A,
1562	1548	REG_MHL_DP_CTL7, 0x03
1563	1549	);
1564		− sii8620_disable_hpd(ctx);
	1550	+ sii8620_hpd_unplugged(ctx);
1565	1551	sii8620_write_seq_static(ctx,
1566	1552	REG_M3_CTRL, VAL_M3_CTRL_MHL3_VALUE,
1567	1553	REG_MHL_COC_CTL1, 0x07,
@@ -1609,10 +1595,8 @@ static void sii8620_disconnect(struct sii8620 *ctx) · 41 unmodified lines
1609	1595	memset(ctx->xstat, 0, sizeof(ctx->xstat));
1610	1596	memset(ctx->devcap, 0, sizeof(ctx->devcap));
1611	1597	memset(ctx->xdevcap, 0, sizeof(ctx->xdevcap));
	1598	+ ctx->devcap_read = false;
1612	1599	ctx->cbus_status = 0;
1613		− ctx->sink_type = SINK_NONE;
1614		− kfree(ctx->edid);
1615		− ctx->edid = NULL;
1616	1600	sii8620_mt_cleanup(ctx);
1617	1601	}
1618	1602
@@ -1699,17 +1683,18 @@ static void sii8620_status_dcap_ready(struct sii8620 *ctx) · 80 unmodified lines
1699	1683
1700	1684	static void sii8620_status_changed_path(struct sii8620 *ctx)
1701	1685	{
1702		− if (ctx->stat[MHL_DST_LINK_MODE] & MHL_DST_LM_PATH_ENABLED) {
1703		− sii8620_mt_write_stat(ctx, MHL_DST_REG(LINK_MODE),
1704		− MHL_DST_LM_CLK_MODE_NORMAL
1705		− \| MHL_DST_LM_PATH_ENABLED);
1706		− if (!sii8620_is_mhl3(ctx))
1707		− sii8620_mt_read_devcap(ctx, false);
1708		− sii8620_mt_set_cont(ctx, sii8620_sink_detected);
1709		− } else {
1710		− sii8620_mt_write_stat(ctx, MHL_DST_REG(LINK_MODE),
1711		− MHL_DST_LM_CLK_MODE_NORMAL);
1712		− }
	1686	+ u8 link_mode;
	1687	+
	1688	+ if (ctx->use_packed_pixel)
	1689	+ link_mode = MHL_DST_LM_CLK_MODE_PACKED_PIXEL;
	1690	+ else
	1691	+ link_mode = MHL_DST_LM_CLK_MODE_NORMAL;
	1692	+
	1693	+ if (ctx->stat[MHL_DST_LINK_MODE] & MHL_DST_LM_PATH_ENABLED)
	1694	+ link_mode \|= MHL_DST_LM_PATH_ENABLED;
	1695	+
	1696	+ sii8620_mt_write_stat(ctx, MHL_DST_REG(LINK_MODE),
	1697	+ link_mode);
1713	1698	}
1714	1699
1715	1700	static void sii8620_msc_mr_write_stat(struct sii8620 *ctx)
@@ -1722,9 +1707,14 @@ static void sii8620_msc_mr_write_stat(struct sii8620 *ctx) · 6 unmodified lines
1722	1707	sii8620_update_array(ctx->stat, st, MHL_DST_SIZE);
1723	1708	sii8620_update_array(ctx->xstat, xst, MHL_XDS_SIZE);
1724	1709
1725		− if (ctx->stat[MHL_DST_CONNECTED_RDY] & MHL_DST_CONN_DCAP_RDY)
	1710	+ if (ctx->stat[MHL_DST_CONNECTED_RDY] & st[MHL_DST_CONNECTED_RDY] &
	1711	+ MHL_DST_CONN_DCAP_RDY) {
1726	1712	sii8620_status_dcap_ready(ctx);
1727	1713
	1714	+ if (!sii8620_is_mhl3(ctx))
	1715	+ sii8620_mt_read_devcap(ctx, false);
	1716	+ }
	1717	+
1728	1718	if (st[MHL_DST_LINK_MODE] & MHL_DST_LM_PATH_ENABLED)
1729	1719	sii8620_status_changed_path(ctx);
1730	1720	}
@@ -1808,8 +1798,11 @@ static void sii8620_msc_mr_set_int(struct sii8620 *ctx) · 77 unmodified lines
1808	1798	}
1809	1799	if (ints[MHL_INT_RCHANGE] & MHL_INT_RC_FEAT_REQ)
1810	1800	sii8620_send_features(ctx);
1811		− if (ints[MHL_INT_RCHANGE] & MHL_INT_RC_FEAT_COMPLETE)
1812		− sii8620_edid_read(ctx, 0);
	1801	+ if (ints[MHL_INT_RCHANGE] & MHL_INT_RC_FEAT_COMPLETE) {
	1802	+ ctx->feature_complete = true;
	1803	+ if (ctx->edid)
	1804	+ sii8620_enable_hpd(ctx);
	1805	+ }
1813	1806	}
1814	1807
1815	1808	static struct sii8620_mt_msg sii8620_msc_msg_first(struct sii8620 ctx)
@@ -1884,6 +1877,15 @@ static void sii8620_irq_msc(struct sii8620 *ctx) · 68 unmodified lines
1884	1877	if (stat & BIT_CBUS_MSC_MR_WRITE_STAT)
1885	1878	sii8620_msc_mr_write_stat(ctx);
1886	1879
	1880	+ if (stat & BIT_CBUS_HPD_CHG) {
	1881	+ if (ctx->cbus_status & BIT_CBUS_STATUS_CBUS_HPD) {
	1882	+ ctx->sink_detected = true;
	1883	+ sii8620_identify_sink(ctx);
	1884	+ } else {
	1885	+ sii8620_hpd_unplugged(ctx);
	1886	+ }
	1887	+ }
	1888	+
1887	1889	if (stat & BIT_CBUS_MSC_MR_SET_INT)
1888	1890	sii8620_msc_mr_set_int(ctx);
1889	1891
@@ -1931,14 +1933,6 @@ static void sii8620_irq_edid(struct sii8620 *ctx) · 41 unmodified lines
1931	1933	ctx->mt_state = MT_STATE_DONE;
1932	1934	}
1933	1935
1934		−static void sii8620_scdt_high(struct sii8620 *ctx)
1935		−{
1936		− sii8620_write_seq_static(ctx,
1937		− REG_INTR8_MASK, BIT_CEA_NEW_AVI \| BIT_CEA_NEW_VSI,
1938		− REG_TPI_SC, BIT_TPI_SC_TPI_OUTPUT_MODE_0_HDMI,
1939		− );
1940		−}
1941		−
1942	1936	static void sii8620_irq_scdt(struct sii8620 *ctx)
1943	1937	{
1944	1938	u8 stat = sii8620_readb(ctx, REG_INTR5);
@@ -1946,53 +1940,13 @@ static void sii8620_irq_scdt(struct sii8620 *ctx) · 1 unmodified line
1946	1940	if (stat & BIT_INTR_SCDT_CHANGE) {
1947	1941	u8 cstat = sii8620_readb(ctx, REG_TMDS_CSTAT_P3);
1948	1942
1949		− if (cstat & BIT_TMDS_CSTAT_P3_SCDT) {
1950		− if (ctx->sink_type == SINK_HDMI)
1951		− /* enable infoframe interrupt */
1952		− sii8620_scdt_high(ctx);
1953		− else
1954		− sii8620_start_video(ctx);
1955		− }
	1943	+ if (cstat & BIT_TMDS_CSTAT_P3_SCDT)
	1944	+ sii8620_start_video(ctx);
1956	1945	}
1957	1946
1958	1947	sii8620_write(ctx, REG_INTR5, stat);
1959	1948	}
1960	1949
1961		−static void sii8620_new_vsi(struct sii8620 *ctx)
1962		−{
1963		− u8 vsif[11];
1964		−
1965		− sii8620_write(ctx, REG_RX_HDMI_CTRL2,
1966		− VAL_RX_HDMI_CTRL2_DEFVAL \|
1967		− BIT_RX_HDMI_CTRL2_VSI_MON_SEL_VSI);
1968		− sii8620_read_buf(ctx, REG_RX_HDMI_MON_PKT_HEADER1, vsif,
1969		− ARRAY_SIZE(vsif));
1970		−}
1971		−
1972		−static void sii8620_new_avi(struct sii8620 *ctx)
1973		−{
1974		− sii8620_write(ctx, REG_RX_HDMI_CTRL2, VAL_RX_HDMI_CTRL2_DEFVAL);
1975		− sii8620_read_buf(ctx, REG_RX_HDMI_MON_PKT_HEADER1, ctx->avif,
1976		− ARRAY_SIZE(ctx->avif));
1977		−}
1978		−
1979		−static void sii8620_irq_infr(struct sii8620 *ctx)
1980		−{
1981		− u8 stat = sii8620_readb(ctx, REG_INTR8)
1982		− & (BIT_CEA_NEW_VSI \| BIT_CEA_NEW_AVI);
1983		−
1984		− sii8620_write(ctx, REG_INTR8, stat);
1985		−
1986		− if (stat & BIT_CEA_NEW_VSI)
1987		− sii8620_new_vsi(ctx);
1988		−
1989		− if (stat & BIT_CEA_NEW_AVI)
1990		− sii8620_new_avi(ctx);
1991		−
1992		− if (stat & (BIT_CEA_NEW_VSI \| BIT_CEA_NEW_AVI))
1993		− sii8620_start_video(ctx);
1994		−}
1995		−
1996	1950	static void sii8620_got_xdevcap(struct sii8620 *ctx, int ret)
1997	1951	{
1998	1952	if (ret < 0)
@@ -2043,11 +1997,11 @@ static void sii8620_irq_ddc(struct sii8620 *ctx) · 44 unmodified lines
2043	1997
2044	1998	if (stat & BIT_DDC_CMD_DONE) {
2045	1999	sii8620_write(ctx, REG_INTR3_MASK, 0);
2046		− if (sii8620_is_mhl3(ctx))
	2000	+ if (sii8620_is_mhl3(ctx) && !ctx->feature_complete)
2047	2001	sii8620_mt_set_int(ctx, MHL_INT_REG(RCHANGE),
2048	2002	MHL_INT_RC_FEAT_REQ);
2049	2003	else
2050		− sii8620_edid_read(ctx, 0);
	2004	+ sii8620_enable_hpd(ctx);
2051	2005	}
2052	2006	sii8620_write(ctx, REG_INTR3, stat);
2053	2007	}
@@ -2074,7 +2028,6 @@ static irqreturn_t sii8620_irq_thread(int irq, void *data) · 20 unmodified lines
2074	2028	{ BIT_FAST_INTR_STAT_EDID, sii8620_irq_edid },
2075	2029	{ BIT_FAST_INTR_STAT_DDC, sii8620_irq_ddc },
2076	2030	{ BIT_FAST_INTR_STAT_SCDT, sii8620_irq_scdt },
2077		− { BIT_FAST_INTR_STAT_INFR, sii8620_irq_infr },
2078	2031	};
2079	2032	struct sii8620 *ctx = data;
2080	2033	u8 stats[LEN_FAST_INTR_STAT];
@@ -2112,7 +2065,6 @@ static void sii8620_cable_in(struct sii8620 *ctx) · 31 unmodified lines
2112	2065	dev_err(dev, "Error powering on, %d.\n", ret);
2113	2066	return;
2114	2067	}
2115		− sii8620_hw_reset(ctx);
2116	2068
2117	2069	sii8620_read_buf(ctx, REG_VND_IDL, ver, ARRAY_SIZE(ver));
2118	2070	ret = sii8620_clear_error(ctx);
@@ -2268,17 +2220,43 @@ static void sii8620_detach(struct drm_bridge *bridge) · 149 unmodified lines
2268	2220	rc_unregister_device(ctx->rc_dev);
2269	2221	}
2270	2222
	2223	+static int sii8620_is_packing_required(struct sii8620 *ctx,
	2224	+ const struct drm_display_mode *mode)
	2225	+{
	2226	+ int max_pclk, max_pclk_pp_mode;
	2227	+
	2228	+ if (sii8620_is_mhl3(ctx)) {
	2229	+ max_pclk = MHL3_MAX_PCLK;
	2230	+ max_pclk_pp_mode = MHL3_MAX_PCLK_PP_MODE;
	2231	+ } else {
	2232	+ max_pclk = MHL1_MAX_PCLK;
	2233	+ max_pclk_pp_mode = MHL1_MAX_PCLK_PP_MODE;
	2234	+ }
	2235	+
	2236	+ if (mode->clock < max_pclk)
	2237	+ return 0;
	2238	+ else if (mode->clock < max_pclk_pp_mode)
	2239	+ return 1;
	2240	+ else
	2241	+ return -1;
	2242	+}
	2243	+
2271	2244	static enum drm_mode_status sii8620_mode_valid(struct drm_bridge *bridge,
2272	2245	const struct drm_display_mode *mode)
2273	2246	{
2274	2247	struct sii8620 *ctx = bridge_to_sii8620(bridge);
	2248	+ int pack_required = sii8620_is_packing_required(ctx, mode);
2275	2249	bool can_pack = ctx->devcap[MHL_DCAP_VID_LINK_MODE] &
2276	2250	MHL_DCAP_VID_LINK_PPIXEL;
2277		− unsigned int max_pclk = sii8620_is_mhl3(ctx) ? MHL3_MAX_LCLK :
2278		− MHL1_MAX_LCLK;
2279		− max_pclk /= can_pack ? 2 : 3;
2280	2251
2281		− return (mode->clock > max_pclk) ? MODE_CLOCK_HIGH : MODE_OK;
	2252	+ switch (pack_required) {
	2253	+ case 0:
	2254	+ return MODE_OK;
	2255	+ case 1:
	2256	+ return (can_pack) ? MODE_OK : MODE_CLOCK_HIGH;
	2257	+ default:
	2258	+ return MODE_CLOCK_HIGH;
	2259	+ }
2282	2260	}
2283	2261
2284	2262	static bool sii8620_mode_fixup(struct drm_bridge *bridge,
@@ -2286,43 +2264,14 @@ static bool sii8620_mode_fixup(struct drm_bridge *bridge, · 1 unmodified line
2286	2264	struct drm_display_mode *adjusted_mode)
2287	2265	{
2288	2266	struct sii8620 *ctx = bridge_to_sii8620(bridge);
2289		− int max_lclk;
2290		− bool ret = true;
2291	2267
2292	2268	mutex_lock(&ctx->lock);
2293	2269
2294		− max_lclk = sii8620_is_mhl3(ctx) ? MHL3_MAX_LCLK : MHL1_MAX_LCLK;
2295		− if (max_lclk > 3 * adjusted_mode->clock) {
2296		− ctx->use_packed_pixel = 0;
2297		− goto end;
2298		− }
2299		− if ((ctx->devcap[MHL_DCAP_VID_LINK_MODE] & MHL_DCAP_VID_LINK_PPIXEL) &&
2300		− max_lclk > 2 * adjusted_mode->clock) {
2301		− ctx->use_packed_pixel = 1;
2302		− goto end;
2303		− }
2304		− ret = false;
2305		−end:
2306		− if (ret) {
2307		− u8 vic = drm_match_cea_mode(adjusted_mode);
2308		−
2309		− if (!vic) {
2310		− union hdmi_infoframe frm;
2311		− u8 mhl_vic[] = { 0, 95, 94, 93, 98 };
2312		−
2313		− /* FIXME: We need the connector here */
2314		− drm_hdmi_vendor_infoframe_from_display_mode(
2315		− &frm.vendor.hdmi, NULL, adjusted_mode);
2316		− vic = frm.vendor.hdmi.vic;
2317		− if (vic >= ARRAY_SIZE(mhl_vic))
2318		− vic = 0;
2319		− vic = mhl_vic[vic];
2320		− }
2321		− ctx->video_code = vic;
2322		− ctx->pixel_clock = adjusted_mode->clock;
2323		− }
	2270	+ ctx->use_packed_pixel = sii8620_is_packing_required(ctx, adjusted_mode);
	2271	+
2324	2272	mutex_unlock(&ctx->lock);
2325		− return ret;
	2273	+
	2274	+ return true;
2326	2275	}
2327	2276
2328	2277	static const struct drm_bridge_funcs sii8620_bridge_funcs = {

drivers/gpu/drm/drm_atomic_helper.c+5−3

@@ -1510,8 +1510,9 @@ int drm_atomic_helper_async_check(struct drm_device *dev, · 1509 unmodified lines
1510	1510	{
1511	1511	struct drm_crtc *crtc;
1512	1512	struct drm_crtc_state *crtc_state;
1513		− struct drm_plane *plane;
1514		− struct drm_plane_state old_plane_state, new_plane_state;
	1513	+ struct drm_plane *plane = NULL;
	1514	+ struct drm_plane_state *old_plane_state = NULL;
	1515	+ struct drm_plane_state *new_plane_state = NULL;
1515	1516	const struct drm_plane_helper_funcs *funcs;
1516	1517	int i, n_planes = 0;
1517	1518
@@ -1527,7 +1528,8 @@ int drm_atomic_helper_async_check(struct drm_device *dev, · 9 unmodified lines
1527	1528	if (n_planes != 1)
1528	1529	return -EINVAL;
1529	1530
1530		− if (!new_plane_state->crtc)
	1531	+ if (!new_plane_state->crtc \|\|
	1532	+ old_plane_state->crtc != new_plane_state->crtc)
1531	1533	return -EINVAL;
1532	1534
1533	1535	funcs = plane->helper_private;

drivers/gpu/drm/drm_context.c+1−1

@@ -372,7 +372,7 @@ int drm_legacy_addctx(struct drm_device dev, void data, · 371 unmodified lines
372	372	ctx->handle = drm_legacy_ctxbitmap_next(dev);
373	373	}
374	374	DRM_DEBUG("%d\n", ctx->handle);
375		− if (ctx->handle == -1) {
	375	+ if (ctx->handle < 0) {
376	376	DRM_DEBUG("Not enough free contexts.\n");
377	377	/* Should this return -EBUSY instead? */
378	378	return -ENOMEM;

drivers/gpu/drm/drm_drv.c+7−7

@@ -369,13 +369,6 @@ EXPORT_SYMBOL(drm_dev_exit); · 368 unmodified lines
369	369	*/
370	370	void drm_dev_unplug(struct drm_device *dev)
371	371	{
372		− drm_dev_unregister(dev);
373		−
374		− mutex_lock(&drm_global_mutex);
375		− if (dev->open_count == 0)
376		− drm_dev_put(dev);
377		− mutex_unlock(&drm_global_mutex);
378		−
379	372	/*
380	373	* After synchronizing any critical read section is guaranteed to see
381	374	* the new value of ->unplugged, and any critical section which might
@@ -384,6 +377,13 @@ void drm_dev_unplug(struct drm_device *dev) · 2 unmodified lines
384	377	*/
385	378	dev->unplugged = true;
386	379	synchronize_srcu(&drm_unplug_srcu);
	380	+
	381	+ drm_dev_unregister(dev);
	382	+
	383	+ mutex_lock(&drm_global_mutex);
	384	+ if (dev->open_count == 0)
	385	+ drm_dev_put(dev);
	386	+ mutex_unlock(&drm_global_mutex);
387	387	}
388	388	EXPORT_SYMBOL(drm_dev_unplug);
389	389

drivers/gpu/drm/drm_lease.c+1−15

@@ -553,24 +553,13 @@ int drm_mode_create_lease_ioctl(struct drm_device *dev, · 552 unmodified lines
553	553
554	554	/* Clone the lessor file to create a new file for us */
555	555	DRM_DEBUG_LEASE("Allocating lease file\n");
556		− path_get(&lessor_file->f_path);
557		− lessee_file = alloc_file(&lessor_file->f_path,
558		− lessor_file->f_mode,
559		− fops_get(lessor_file->f_inode->i_fop));
560		−
	556	+ lessee_file = filp_clone_open(lessor_file);
561	557	if (IS_ERR(lessee_file)) {
562	558	ret = PTR_ERR(lessee_file);
563	559	goto out_lessee;
564	560	}
565	561
566		− /* Initialize the new file for DRM */
567		− DRM_DEBUG_LEASE("Initializing the file with %p\n", lessee_file->f_op->open);
568		− ret = lessee_file->f_op->open(lessee_file->f_inode, lessee_file);
569		− if (ret)
570		− goto out_lessee_file;
571		−
572	562	lessee_priv = lessee_file->private_data;
573		−
574	563	/* Change the file to a master one */
575	564	drm_master_put(&lessee_priv->master);
576	565	lessee_priv->master = lessee;
@@ -588,9 +577,6 @@ int drm_mode_create_lease_ioctl(struct drm_device *dev, · 11 unmodified lines
588	577	DRM_DEBUG_LEASE("drm_mode_create_lease_ioctl succeeded\n");
589	578	return 0;
590	579
591		−out_lessee_file:
592		− fput(lessee_file);
593		−
594	580	out_lessee:
595	581	drm_master_put(&lessee);
596	582

drivers/gpu/drm/drm_property.c+3−3

@@ -532,7 +532,7 @@ static void drm_property_free_blob(struct kref *kref) · 531 unmodified lines
532	532
533	533	drm_mode_object_unregister(blob->dev, &blob->base);
534	534
535		− kfree(blob);
	535	+ kvfree(blob);
536	536	}
537	537
538	538	/**
@@ -559,7 +559,7 @@ drm_property_create_blob(struct drm_device *dev, size_t length, · 20 unmodified lines
559	559	if (!length \|\| length > ULONG_MAX - sizeof(struct drm_property_blob))
560	560	return ERR_PTR(-EINVAL);
561	561
562		− blob = kzalloc(sizeof(struct drm_property_blob)+length, GFP_KERNEL);
	562	+ blob = kvzalloc(sizeof(struct drm_property_blob)+length, GFP_KERNEL);
563	563	if (!blob)
564	564	return ERR_PTR(-ENOMEM);
565	565
@@ -576,7 +576,7 @@ drm_property_create_blob(struct drm_device *dev, size_t length, · 10 unmodified lines
576	576	ret = __drm_mode_object_add(dev, &blob->base, DRM_MODE_OBJECT_BLOB,
577	577	true, drm_property_free_blob);
578	578	if (ret) {
579		− kfree(blob);
	579	+ kvfree(blob);
580	580	return ERR_PTR(-EINVAL);
581	581	}
582	582

drivers/gpu/drm/etnaviv/etnaviv_drv.c+20−4

@@ -631,8 +631,11 @@ static struct platform_driver etnaviv_platform_driver = { · 630 unmodified lines
631	631	},
632	632	};
633	633
	634	+static struct platform_device *etnaviv_drm;
	635	+
634	636	static int __init etnaviv_init(void)
635	637	{
	638	+ struct platform_device *pdev;
636	639	int ret;
637	640	struct device_node *np;
638	641
@@ -644,7 +647,7 @@ static int __init etnaviv_init(void) · 5 unmodified lines
644	647
645	648	ret = platform_driver_register(&etnaviv_platform_driver);
646	649	if (ret != 0)
647		− platform_driver_unregister(&etnaviv_gpu_driver);
	650	+ goto unregister_gpu_driver;
648	651
649	652	/*
650	653	* If the DT contains at least one available GPU device, instantiate
@@ -653,20 +656,33 @@ static int __init etnaviv_init(void) · 2 unmodified lines
653	656	for_each_compatible_node(np, NULL, "vivante,gc") {
654	657	if (!of_device_is_available(np))
655	658	continue;
656		−
657		− platform_device_register_simple("etnaviv", -1, NULL, 0);
	659	+ pdev = platform_device_register_simple("etnaviv", -1,
	660	+ NULL, 0);
	661	+ if (IS_ERR(pdev)) {
	662	+ ret = PTR_ERR(pdev);
	663	+ of_node_put(np);
	664	+ goto unregister_platform_driver;
	665	+ }
	666	+ etnaviv_drm = pdev;
658	667	of_node_put(np);
659	668	break;
660	669	}
661	670
	671	+ return 0;
	672	+
	673	+unregister_platform_driver:
	674	+ platform_driver_unregister(&etnaviv_platform_driver);
	675	+unregister_gpu_driver:
	676	+ platform_driver_unregister(&etnaviv_gpu_driver);
662	677	return ret;
663	678	}
664	679	module_init(etnaviv_init);
665	680
666	681	static void __exit etnaviv_exit(void)
667	682	{
668		− platform_driver_unregister(&etnaviv_gpu_driver);
	683	+ platform_device_unregister(etnaviv_drm);
669	684	platform_driver_unregister(&etnaviv_platform_driver);
	685	+ platform_driver_unregister(&etnaviv_gpu_driver);
670	686	}
671	687	module_exit(etnaviv_exit);
672	688

drivers/gpu/drm/etnaviv/etnaviv_gpu.h+3−0

@@ -131,6 +131,9 @@ struct etnaviv_gpu { · 130 unmodified lines
131	131	struct work_struct sync_point_work;
132	132	int sync_point_event;
133	133
	134	+ /* hang detection */
	135	+ u32 hangcheck_dma_addr;
	136	+
134	137	void __iomem *mmio;
135	138	int irq;
136	139

drivers/gpu/drm/etnaviv/etnaviv_sched.c+24−0

@@ -10,6 +10,7 @@ · 9 unmodified lines
10	10	#include "etnaviv_gem.h"
11	11	#include "etnaviv_gpu.h"
12	12	#include "etnaviv_sched.h"
	13	+#include "state.xml.h"
13	14
14	15	static int etnaviv_job_hang_limit = 0;
15	16	module_param_named(job_hang_limit, etnaviv_job_hang_limit, int , 0444);
@@ -85,6 +86,29 @@ static void etnaviv_sched_timedout_job(struct drm_sched_job *sched_job) · 69 unmodified lines
85	86	{
86	87	struct etnaviv_gem_submit *submit = to_etnaviv_submit(sched_job);
87	88	struct etnaviv_gpu *gpu = submit->gpu;
	89	+ u32 dma_addr;
	90	+ int change;
	91	+
	92	+ /*
	93	+ * If the GPU managed to complete this jobs fence, the timout is
	94	+ * spurious. Bail out.
	95	+ */
	96	+ if (fence_completed(gpu, submit->out_fence->seqno))
	97	+ return;
	98	+
	99	+ /*
	100	+ * If the GPU is still making forward progress on the front-end (which
	101	+ * should never loop) we shift out the timeout to give it a chance to
	102	+ * finish the job.
	103	+ */
	104	+ dma_addr = gpu_read(gpu, VIVS_FE_DMA_ADDRESS);
	105	+ change = dma_addr - gpu->hangcheck_dma_addr;
	106	+ if (change < 0 \|\| change > 16) {
	107	+ gpu->hangcheck_dma_addr = dma_addr;
	108	+ schedule_delayed_work(&sched_job->work_tdr,
	109	+ sched_job->sched->timeout);
	110	+ return;
	111	+ }
88	112
89	113	/* block scheduler */
90	114	kthread_park(gpu->sched.thread);

drivers/gpu/drm/exynos/exynos5433_drm_decon.c+3−3

@@ -265,7 +265,7 @@ static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win, · 264 unmodified lines
265	265	unsigned long val;
266	266
267	267	val = readl(ctx->addr + DECON_WINCONx(win));
268		− val &= ~WINCONx_BPPMODE_MASK;
	268	+ val &= WINCONx_ENWIN_F;
269	269
270	270	switch (fb->format->format) {
271	271	case DRM_FORMAT_XRGB1555:
@@ -356,8 +356,8 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, · 84 unmodified lines
356	356	writel(val, ctx->addr + DECON_VIDOSDxB(win));
357	357	}
358	358
359		− val = VIDOSD_Wx_ALPHA_R_F(0x0) \| VIDOSD_Wx_ALPHA_G_F(0x0) \|
360		− VIDOSD_Wx_ALPHA_B_F(0x0);
	359	+ val = VIDOSD_Wx_ALPHA_R_F(0xff) \| VIDOSD_Wx_ALPHA_G_F(0xff) \|
	360	+ VIDOSD_Wx_ALPHA_B_F(0xff);
361	361	writel(val, ctx->addr + DECON_VIDOSDxC(win));
362	362
363	363	val = VIDOSD_Wx_ALPHA_R_F(0x0) \| VIDOSD_Wx_ALPHA_G_F(0x0) \|

drivers/gpu/drm/exynos/exynos_drm_drv.c+2−2

@@ -420,7 +420,7 @@ err_mode_config_cleanup: · 419 unmodified lines
420	420	err_free_private:
421	421	kfree(private);
422	422	err_free_drm:
423		− drm_dev_unref(drm);
	423	+ drm_dev_put(drm);
424	424
425	425	return ret;
426	426	}
@@ -444,7 +444,7 @@ static void exynos_drm_unbind(struct device *dev) · 17 unmodified lines
444	444	drm->dev_private = NULL;
445	445	dev_set_drvdata(dev, NULL);
446	446
447		− drm_dev_unref(drm);
	447	+ drm_dev_put(drm);
448	448	}
449	449
450	450	static const struct component_master_ops exynos_drm_ops = {

drivers/gpu/drm/exynos/exynos_drm_fb.c+1−1

@@ -138,7 +138,7 @@ exynos_user_fb_create(struct drm_device dev, struct drm_file file_priv, · 137 unmodified lines
138	138
139	139	err:
140	140	while (i--)
141		− drm_gem_object_unreference_unlocked(&exynos_gem[i]->base);
	141	+ drm_gem_object_put_unlocked(&exynos_gem[i]->base);
142	142
143	143	return ERR_PTR(ret);
144	144	}

drivers/gpu/drm/exynos/exynos_drm_fimc.c+10−7

@@ -470,17 +470,18 @@ static void fimc_src_set_transf(struct fimc_context *ctx, unsigned int rotation) · 469 unmodified lines
470	470	static void fimc_set_window(struct fimc_context *ctx,
471	471	struct exynos_drm_ipp_buffer *buf)
472	472	{
	473	+ unsigned int real_width = buf->buf.pitch[0] / buf->format->cpp[0];
473	474	u32 cfg, h1, h2, v1, v2;
474	475
475	476	/* cropped image */
476	477	h1 = buf->rect.x;
477		− h2 = buf->buf.width - buf->rect.w - buf->rect.x;
	478	+ h2 = real_width - buf->rect.w - buf->rect.x;
478	479	v1 = buf->rect.y;
479	480	v2 = buf->buf.height - buf->rect.h - buf->rect.y;
480	481
481	482	DRM_DEBUG_KMS("x[%d]y[%d]w[%d]h[%d]hsize[%d]vsize[%d]\n",
482	483	buf->rect.x, buf->rect.y, buf->rect.w, buf->rect.h,
483		− buf->buf.width, buf->buf.height);
	484	+ real_width, buf->buf.height);
484	485	DRM_DEBUG_KMS("h1[%d]h2[%d]v1[%d]v2[%d]\n", h1, h2, v1, v2);
485	486
486	487	/*
@@ -503,12 +504,13 @@ static void fimc_set_window(struct fimc_context *ctx, · 16 unmodified lines
503	504	static void fimc_src_set_size(struct fimc_context *ctx,
504	505	struct exynos_drm_ipp_buffer *buf)
505	506	{
	507	+ unsigned int real_width = buf->buf.pitch[0] / buf->format->cpp[0];
506	508	u32 cfg;
507	509
508		− DRM_DEBUG_KMS("hsize[%d]vsize[%d]\n", buf->buf.width, buf->buf.height);
	510	+ DRM_DEBUG_KMS("hsize[%d]vsize[%d]\n", real_width, buf->buf.height);
509	511
510	512	/* original size */
511		− cfg = (EXYNOS_ORGISIZE_HORIZONTAL(buf->buf.width) \|
	513	+ cfg = (EXYNOS_ORGISIZE_HORIZONTAL(real_width) \|
512	514	EXYNOS_ORGISIZE_VERTICAL(buf->buf.height));
513	515
514	516	fimc_write(ctx, cfg, EXYNOS_ORGISIZE);
@@ -529,7 +531,7 @@ static void fimc_src_set_size(struct fimc_context *ctx, · 14 unmodified lines
529	531	* for now, we support only ITU601 8 bit mode
530	532	*/
531	533	cfg = (EXYNOS_CISRCFMT_ITU601_8BIT \|
532		− EXYNOS_CISRCFMT_SOURCEHSIZE(buf->buf.width) \|
	534	+ EXYNOS_CISRCFMT_SOURCEHSIZE(real_width) \|
533	535	EXYNOS_CISRCFMT_SOURCEVSIZE(buf->buf.height));
534	536	fimc_write(ctx, cfg, EXYNOS_CISRCFMT);
535	537
@@ -842,12 +844,13 @@ static void fimc_set_scaler(struct fimc_context ctx, struct fimc_scaler sc) · 306 unmodified lines
842	844	static void fimc_dst_set_size(struct fimc_context *ctx,
843	845	struct exynos_drm_ipp_buffer *buf)
844	846	{
	847	+ unsigned int real_width = buf->buf.pitch[0] / buf->format->cpp[0];
845	848	u32 cfg, cfg_ext;
846	849
847		− DRM_DEBUG_KMS("hsize[%d]vsize[%d]\n", buf->buf.width, buf->buf.height);
	850	+ DRM_DEBUG_KMS("hsize[%d]vsize[%d]\n", real_width, buf->buf.height);
848	851
849	852	/* original size */
850		− cfg = (EXYNOS_ORGOSIZE_HORIZONTAL(buf->buf.width) \|
	853	+ cfg = (EXYNOS_ORGOSIZE_HORIZONTAL(real_width) \|
851	854	EXYNOS_ORGOSIZE_VERTICAL(buf->buf.height));
852	855
853	856	fimc_write(ctx, cfg, EXYNOS_ORGOSIZE);

drivers/gpu/drm/exynos/exynos_drm_gem.c+5−5

@@ -143,7 +143,7 @@ static int exynos_drm_gem_handle_create(struct drm_gem_object *obj, · 142 unmodified lines
143	143	DRM_DEBUG_KMS("gem handle = 0x%x\n", *handle);
144	144
145	145	/* drop reference from allocate - handle holds it now. */
146		− drm_gem_object_unreference_unlocked(obj);
	146	+ drm_gem_object_put_unlocked(obj);
147	147
148	148	return 0;
149	149	}
@@ -186,7 +186,7 @@ unsigned long exynos_drm_gem_get_size(struct drm_device *dev, · 36 unmodified lines
186	186
187	187	exynos_gem = to_exynos_gem(obj);
188	188
189		− drm_gem_object_unreference_unlocked(obj);
	189	+ drm_gem_object_put_unlocked(obj);
190	190
191	191	return exynos_gem->size;
192	192	}
@@ -329,13 +329,13 @@ void exynos_drm_gem_put_dma_addr(struct drm_device *dev, · 136 unmodified lines
329	329	return;
330	330	}
331	331
332		− drm_gem_object_unreference_unlocked(obj);
	332	+ drm_gem_object_put_unlocked(obj);
333	333
334	334	/*
335	335	* decrease obj->refcount one more time because we has already
336	336	* increased it at exynos_drm_gem_get_dma_addr().
337	337	*/
338		− drm_gem_object_unreference_unlocked(obj);
	338	+ drm_gem_object_put_unlocked(obj);
339	339	}
340	340
341	341	static int exynos_drm_gem_mmap_buffer(struct exynos_drm_gem *exynos_gem,
@@ -383,7 +383,7 @@ int exynos_drm_gem_get_ioctl(struct drm_device dev, void data, · 41 unmodified lines
383	383	args->flags = exynos_gem->flags;
384	384	args->size = exynos_gem->size;
385	385
386		− drm_gem_object_unreference_unlocked(obj);
	386	+ drm_gem_object_put_unlocked(obj);
387	387
388	388	return 0;
389	389	}

drivers/gpu/drm/exynos/exynos_drm_gsc.c+31−20

@@ -492,21 +492,25 @@ static void gsc_src_set_fmt(struct gsc_context *ctx, u32 fmt) · 491 unmodified lines
492	492	GSC_IN_CHROMA_ORDER_CRCB);
493	493	break;
494	494	case DRM_FORMAT_NV21:
	495	+ cfg \|= (GSC_IN_CHROMA_ORDER_CRCB \| GSC_IN_YUV420_2P);
	496	+ break;
495	497	case DRM_FORMAT_NV61:
496		− cfg \|= (GSC_IN_CHROMA_ORDER_CRCB \|
497		− GSC_IN_YUV420_2P);
	498	+ cfg \|= (GSC_IN_CHROMA_ORDER_CRCB \| GSC_IN_YUV422_2P);
498	499	break;
499	500	case DRM_FORMAT_YUV422:
500	501	cfg \|= GSC_IN_YUV422_3P;
501	502	break;
502	503	case DRM_FORMAT_YUV420:
	504	+ cfg \|= (GSC_IN_CHROMA_ORDER_CBCR \| GSC_IN_YUV420_3P);
	505	+ break;
503	506	case DRM_FORMAT_YVU420:
504		− cfg \|= GSC_IN_YUV420_3P;
	507	+ cfg \|= (GSC_IN_CHROMA_ORDER_CRCB \| GSC_IN_YUV420_3P);
505	508	break;
506	509	case DRM_FORMAT_NV12:
	510	+ cfg \|= (GSC_IN_CHROMA_ORDER_CBCR \| GSC_IN_YUV420_2P);
	511	+ break;
507	512	case DRM_FORMAT_NV16:
508		− cfg \|= (GSC_IN_CHROMA_ORDER_CBCR \|
509		− GSC_IN_YUV420_2P);
	513	+ cfg \|= (GSC_IN_CHROMA_ORDER_CBCR \| GSC_IN_YUV422_2P);
510	514	break;
511	515	}
512	516
@@ -523,30 +527,30 @@ static void gsc_src_set_transf(struct gsc_context *ctx, unsigned int rotation) · 10 unmodified lines
523	527
524	528	switch (degree) {
525	529	case DRM_MODE_ROTATE_0:
526		− if (rotation & DRM_MODE_REFLECT_Y)
527		− cfg \|= GSC_IN_ROT_XFLIP;
528	530	if (rotation & DRM_MODE_REFLECT_X)
	531	+ cfg \|= GSC_IN_ROT_XFLIP;
	532	+ if (rotation & DRM_MODE_REFLECT_Y)
529	533	cfg \|= GSC_IN_ROT_YFLIP;
530	534	break;
531	535	case DRM_MODE_ROTATE_90:
532	536	cfg \|= GSC_IN_ROT_90;
533		− if (rotation & DRM_MODE_REFLECT_Y)
534		− cfg \|= GSC_IN_ROT_XFLIP;
535	537	if (rotation & DRM_MODE_REFLECT_X)
	538	+ cfg \|= GSC_IN_ROT_XFLIP;
	539	+ if (rotation & DRM_MODE_REFLECT_Y)
536	540	cfg \|= GSC_IN_ROT_YFLIP;
537	541	break;
538	542	case DRM_MODE_ROTATE_180:
539	543	cfg \|= GSC_IN_ROT_180;
540		− if (rotation & DRM_MODE_REFLECT_Y)
541		− cfg &= ~GSC_IN_ROT_XFLIP;
542	544	if (rotation & DRM_MODE_REFLECT_X)
	545	+ cfg &= ~GSC_IN_ROT_XFLIP;
	546	+ if (rotation & DRM_MODE_REFLECT_Y)
543	547	cfg &= ~GSC_IN_ROT_YFLIP;
544	548	break;
545	549	case DRM_MODE_ROTATE_270:
546	550	cfg \|= GSC_IN_ROT_270;
547		− if (rotation & DRM_MODE_REFLECT_Y)
548		− cfg &= ~GSC_IN_ROT_XFLIP;
549	551	if (rotation & DRM_MODE_REFLECT_X)
	552	+ cfg &= ~GSC_IN_ROT_XFLIP;
	553	+ if (rotation & DRM_MODE_REFLECT_Y)
550	554	cfg &= ~GSC_IN_ROT_YFLIP;
551	555	break;
552	556	}
@@ -577,7 +581,7 @@ static void gsc_src_set_size(struct gsc_context *ctx, · 24 unmodified lines
577	581	cfg &= ~(GSC_SRCIMG_HEIGHT_MASK \|
578	582	GSC_SRCIMG_WIDTH_MASK);
579	583
580		− cfg \|= (GSC_SRCIMG_WIDTH(buf->buf.width) \|
	584	+ cfg \|= (GSC_SRCIMG_WIDTH(buf->buf.pitch[0] / buf->format->cpp[0]) \|
581	585	GSC_SRCIMG_HEIGHT(buf->buf.height));
582	586
583	587	gsc_write(cfg, GSC_SRCIMG_SIZE);
@@ -672,18 +676,25 @@ static void gsc_dst_set_fmt(struct gsc_context *ctx, u32 fmt) · 88 unmodified lines
672	676	GSC_OUT_CHROMA_ORDER_CRCB);
673	677	break;
674	678	case DRM_FORMAT_NV21:
675		− case DRM_FORMAT_NV61:
676	679	cfg \|= (GSC_OUT_CHROMA_ORDER_CRCB \| GSC_OUT_YUV420_2P);
677	680	break;
	681	+ case DRM_FORMAT_NV61:
	682	+ cfg \|= (GSC_OUT_CHROMA_ORDER_CRCB \| GSC_OUT_YUV422_2P);
	683	+ break;
678	684	case DRM_FORMAT_YUV422:
	685	+ cfg \|= GSC_OUT_YUV422_3P;
	686	+ break;
679	687	case DRM_FORMAT_YUV420:
	688	+ cfg \|= (GSC_OUT_CHROMA_ORDER_CBCR \| GSC_OUT_YUV420_3P);
	689	+ break;
680	690	case DRM_FORMAT_YVU420:
681		− cfg \|= GSC_OUT_YUV420_3P;
	691	+ cfg \|= (GSC_OUT_CHROMA_ORDER_CRCB \| GSC_OUT_YUV420_3P);
682	692	break;
683	693	case DRM_FORMAT_NV12:
	694	+ cfg \|= (GSC_OUT_CHROMA_ORDER_CBCR \| GSC_OUT_YUV420_2P);
	695	+ break;
684	696	case DRM_FORMAT_NV16:
685		− cfg \|= (GSC_OUT_CHROMA_ORDER_CBCR \|
686		− GSC_OUT_YUV420_2P);
	697	+ cfg \|= (GSC_OUT_CHROMA_ORDER_CBCR \| GSC_OUT_YUV422_2P);
687	698	break;
688	699	}
689	700
@@ -868,7 +879,7 @@ static void gsc_dst_set_size(struct gsc_context *ctx, · 178 unmodified lines
868	879	/* original size */
869	880	cfg = gsc_read(GSC_DSTIMG_SIZE);
870	881	cfg &= ~(GSC_DSTIMG_HEIGHT_MASK \| GSC_DSTIMG_WIDTH_MASK);
871		− cfg \|= GSC_DSTIMG_WIDTH(buf->buf.width) \|
	882	+ cfg \|= GSC_DSTIMG_WIDTH(buf->buf.pitch[0] / buf->format->cpp[0]) \|
872	883	GSC_DSTIMG_HEIGHT(buf->buf.height);
873	884	gsc_write(cfg, GSC_DSTIMG_SIZE);
874	885
@@ -1341,7 +1352,7 @@ static const struct drm_exynos_ipp_limit gsc_5420_limits[] = { · 466 unmodified lines
1341	1352	};
1342	1353
1343	1354	static const struct drm_exynos_ipp_limit gsc_5433_limits[] = {
1344		− { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 8191, 2 }, .v = { 16, 8191, 2 }) },
	1355	+ { IPP_SIZE_LIMIT(BUFFER, .h = { 32, 8191, 16 }, .v = { 16, 8191, 2 }) },
1345	1356	{ IPP_SIZE_LIMIT(AREA, .h = { 16, 4800, 1 }, .v = { 8, 3344, 1 }) },
1346	1357	{ IPP_SIZE_LIMIT(ROTATED, .h = { 32, 2047 }, .v = { 8, 8191 }) },
1347	1358	{ IPP_SCALE_LIMIT(.h = { (1 << 16) / 16, (1 << 16) * 8 },

drivers/gpu/drm/exynos/exynos_drm_ipp.c+58−52

@@ -345,27 +345,6 @@ static int exynos_drm_ipp_task_setup_buffer(struct exynos_drm_ipp_buffer *buf, · 344 unmodified lines
345	345	int ret = 0;
346	346	int i;
347	347
348		− /* basic checks */
349		− if (buf->buf.width == 0 \|\| buf->buf.height == 0)
350		− return -EINVAL;
351		− buf->format = drm_format_info(buf->buf.fourcc);
352		− for (i = 0; i < buf->format->num_planes; i++) {
353		− unsigned int width = (i == 0) ? buf->buf.width :
354		− DIV_ROUND_UP(buf->buf.width, buf->format->hsub);
355		−
356		− if (buf->buf.pitch[i] == 0)
357		− buf->buf.pitch[i] = width * buf->format->cpp[i];
358		− if (buf->buf.pitch[i] < width * buf->format->cpp[i])
359		− return -EINVAL;
360		− if (!buf->buf.gem_id[i])
361		− return -ENOENT;
362		− }
363		−
364		− /* pitch for additional planes must match */
365		− if (buf->format->num_planes > 2 &&
366		− buf->buf.pitch[1] != buf->buf.pitch[2])
367		− return -EINVAL;
368		−
369	348	/* get GEM buffers and check their size */
370	349	for (i = 0; i < buf->format->num_planes; i++) {
371	350	unsigned int height = (i == 0) ? buf->buf.height :
@@ -428,7 +407,7 @@ enum drm_ipp_size_id { · 56 unmodified lines
428	407	IPP_LIMIT_BUFFER, IPP_LIMIT_AREA, IPP_LIMIT_ROTATED, IPP_LIMIT_MAX
429	408	};
430	409
431		−static const enum drm_ipp_size_id limit_id_fallback[IPP_LIMIT_MAX][4] = {
	410	+static const enum drm_exynos_ipp_limit_type limit_id_fallback[IPP_LIMIT_MAX][4] = {
432	411	[IPP_LIMIT_BUFFER] = { DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
433	412	[IPP_LIMIT_AREA] = { DRM_EXYNOS_IPP_LIMIT_SIZE_AREA,
434	413	DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
@@ -495,12 +474,13 @@ static int exynos_drm_ipp_check_size_limits(struct exynos_drm_ipp_buffer *buf, · 60 unmodified lines
495	474	enum drm_ipp_size_id id = rotate ? IPP_LIMIT_ROTATED : IPP_LIMIT_AREA;
496	475	struct drm_ipp_limit l;
497	476	struct drm_exynos_ipp_limit_val lh = &l.h, lv = &l.v;
	477	+ int real_width = buf->buf.pitch[0] / buf->format->cpp[0];
498	478
499	479	if (!limits)
500	480	return 0;
501	481
502	482	__get_size_limit(limits, num_limits, IPP_LIMIT_BUFFER, &l);
503		− if (!__size_limit_check(buf->buf.width, &l.h) \|\|
	483	+ if (!__size_limit_check(real_width, &l.h) \|\|
504	484	!__size_limit_check(buf->buf.height, &l.v))
505	485	return -EINVAL;
506	486
@@ -560,10 +540,62 @@ static int exynos_drm_ipp_check_scale_limits( · 53 unmodified lines
560	540	return 0;
561	541	}
562	542
	543	+static int exynos_drm_ipp_check_format(struct exynos_drm_ipp_task *task,
	544	+ struct exynos_drm_ipp_buffer *buf,
	545	+ struct exynos_drm_ipp_buffer *src,
	546	+ struct exynos_drm_ipp_buffer *dst,
	547	+ bool rotate, bool swap)
	548	+{
	549	+ const struct exynos_drm_ipp_formats *fmt;
	550	+ int ret, i;
	551	+
	552	+ fmt = __ipp_format_get(task->ipp, buf->buf.fourcc, buf->buf.modifier,
	553	+ buf == src ? DRM_EXYNOS_IPP_FORMAT_SOURCE :
	554	+ DRM_EXYNOS_IPP_FORMAT_DESTINATION);
	555	+ if (!fmt) {
	556	+ DRM_DEBUG_DRIVER("Task %pK: %s format not supported\n", task,
	557	+ buf == src ? "src" : "dst");
	558	+ return -EINVAL;
	559	+ }
	560	+
	561	+ /* basic checks */
	562	+ if (buf->buf.width == 0 \|\| buf->buf.height == 0)
	563	+ return -EINVAL;
	564	+
	565	+ buf->format = drm_format_info(buf->buf.fourcc);
	566	+ for (i = 0; i < buf->format->num_planes; i++) {
	567	+ unsigned int width = (i == 0) ? buf->buf.width :
	568	+ DIV_ROUND_UP(buf->buf.width, buf->format->hsub);
	569	+
	570	+ if (buf->buf.pitch[i] == 0)
	571	+ buf->buf.pitch[i] = width * buf->format->cpp[i];
	572	+ if (buf->buf.pitch[i] < width * buf->format->cpp[i])
	573	+ return -EINVAL;
	574	+ if (!buf->buf.gem_id[i])
	575	+ return -ENOENT;
	576	+ }
	577	+
	578	+ /* pitch for additional planes must match */
	579	+ if (buf->format->num_planes > 2 &&
	580	+ buf->buf.pitch[1] != buf->buf.pitch[2])
	581	+ return -EINVAL;
	582	+
	583	+ /* check driver limits */
	584	+ ret = exynos_drm_ipp_check_size_limits(buf, fmt->limits,
	585	+ fmt->num_limits,
	586	+ rotate,
	587	+ buf == dst ? swap : false);
	588	+ if (ret)
	589	+ return ret;
	590	+ ret = exynos_drm_ipp_check_scale_limits(&src->rect, &dst->rect,
	591	+ fmt->limits,
	592	+ fmt->num_limits, swap);
	593	+ return ret;
	594	+}
	595	+
563	596	static int exynos_drm_ipp_task_check(struct exynos_drm_ipp_task *task)
564	597	{
565	598	struct exynos_drm_ipp *ipp = task->ipp;
566		− const struct exynos_drm_ipp_formats src_fmt, dst_fmt;
567	599	struct exynos_drm_ipp_buffer src = &task->src, dst = &task->dst;
568	600	unsigned int rotation = task->transform.rotation;
569	601	int ret = 0;
@@ -607,37 +639,11 @@ static int exynos_drm_ipp_task_check(struct exynos_drm_ipp_task *task) · 37 unmodified lines
607	639	return -EINVAL;
608	640	}
609	641
610		− src_fmt = __ipp_format_get(ipp, src->buf.fourcc, src->buf.modifier,
611		− DRM_EXYNOS_IPP_FORMAT_SOURCE);
612		− if (!src_fmt) {
613		− DRM_DEBUG_DRIVER("Task %pK: src format not supported\n", task);
614		− return -EINVAL;
615		− }
616		− ret = exynos_drm_ipp_check_size_limits(src, src_fmt->limits,
617		− src_fmt->num_limits,
618		− rotate, false);
619		− if (ret)
620		− return ret;
621		− ret = exynos_drm_ipp_check_scale_limits(&src->rect, &dst->rect,
622		− src_fmt->limits,
623		− src_fmt->num_limits, swap);
	642	+ ret = exynos_drm_ipp_check_format(task, src, src, dst, rotate, swap);
624	643	if (ret)
625	644	return ret;
626	645
627		− dst_fmt = __ipp_format_get(ipp, dst->buf.fourcc, dst->buf.modifier,
628		− DRM_EXYNOS_IPP_FORMAT_DESTINATION);
629		− if (!dst_fmt) {
630		− DRM_DEBUG_DRIVER("Task %pK: dst format not supported\n", task);
631		− return -EINVAL;
632		− }
633		− ret = exynos_drm_ipp_check_size_limits(dst, dst_fmt->limits,
634		− dst_fmt->num_limits,
635		− false, swap);
636		− if (ret)
637		− return ret;
638		− ret = exynos_drm_ipp_check_scale_limits(&src->rect, &dst->rect,
639		− dst_fmt->limits,
640		− dst_fmt->num_limits, swap);
	646	+ ret = exynos_drm_ipp_check_format(task, dst, src, dst, false, swap);
641	647	if (ret)
642	648	return ret;
643	649

drivers/gpu/drm/exynos/exynos_drm_plane.c+1−1

@@ -132,7 +132,7 @@ static void exynos_drm_plane_reset(struct drm_plane *plane) · 131 unmodified lines
132	132	if (plane->state) {
133	133	exynos_state = to_exynos_plane_state(plane->state);
134	134	if (exynos_state->base.fb)
135		− drm_framebuffer_unreference(exynos_state->base.fb);
	135	+ drm_framebuffer_put(exynos_state->base.fb);
136	136	kfree(exynos_state);
137	137	plane->state = NULL;
138	138	}

drivers/gpu/drm/exynos/exynos_drm_rotator.c+2−2

@@ -168,9 +168,9 @@ static void rotator_dst_set_transf(struct rot_context *rot, · 167 unmodified lines
168	168	val &= ~ROT_CONTROL_FLIP_MASK;
169	169
170	170	if (rotation & DRM_MODE_REFLECT_X)
171		− val \|= ROT_CONTROL_FLIP_HORIZONTAL;
172		− if (rotation & DRM_MODE_REFLECT_Y)
173	171	val \|= ROT_CONTROL_FLIP_VERTICAL;
	172	+ if (rotation & DRM_MODE_REFLECT_Y)
	173	+ val \|= ROT_CONTROL_FLIP_HORIZONTAL;
174	174
175	175	val &= ~ROT_CONTROL_ROT_MASK;
176	176

drivers/gpu/drm/exynos/exynos_drm_scaler.c+35−9

@@ -30,6 +30,7 @@ · 29 unmodified lines
30	30	#define scaler_write(cfg, offset) writel(cfg, scaler->regs + (offset))
31	31	#define SCALER_MAX_CLK 4
32	32	#define SCALER_AUTOSUSPEND_DELAY 2000
	33	+#define SCALER_RESET_WAIT_RETRIES 100
33	34
34	35	struct scaler_data {
35	36	const char *clk_name[SCALER_MAX_CLK];
@@ -51,9 +52,9 @@ struct scaler_context { · 15 unmodified lines
51	52	static u32 scaler_get_format(u32 drm_fmt)
52	53	{
53	54	switch (drm_fmt) {
54		− case DRM_FORMAT_NV21:
55		− return SCALER_YUV420_2P_UV;
56	55	case DRM_FORMAT_NV12:
	56	+ return SCALER_YUV420_2P_UV;
	57	+ case DRM_FORMAT_NV21:
57	58	return SCALER_YUV420_2P_VU;
58	59	case DRM_FORMAT_YUV420:
59	60	return SCALER_YUV420_3P;
@@ -63,15 +64,15 @@ static u32 scaler_get_format(u32 drm_fmt) · 3 unmodified lines
63	64	return SCALER_YUV422_1P_UYVY;
64	65	case DRM_FORMAT_YVYU:
65	66	return SCALER_YUV422_1P_YVYU;
66		− case DRM_FORMAT_NV61:
67		− return SCALER_YUV422_2P_UV;
68	67	case DRM_FORMAT_NV16:
	68	+ return SCALER_YUV422_2P_UV;
	69	+ case DRM_FORMAT_NV61:
69	70	return SCALER_YUV422_2P_VU;
70	71	case DRM_FORMAT_YUV422:
71	72	return SCALER_YUV422_3P;
72		− case DRM_FORMAT_NV42:
73		− return SCALER_YUV444_2P_UV;
74	73	case DRM_FORMAT_NV24:
	74	+ return SCALER_YUV444_2P_UV;
	75	+ case DRM_FORMAT_NV42:
75	76	return SCALER_YUV444_2P_VU;
76	77	case DRM_FORMAT_YUV444:
77	78	return SCALER_YUV444_3P;
@@ -100,6 +101,23 @@ static u32 scaler_get_format(u32 drm_fmt) · 22 unmodified lines
100	101	return 0;
101	102	}
102	103
	104	+static inline int scaler_reset(struct scaler_context *scaler)
	105	+{
	106	+ int retry = SCALER_RESET_WAIT_RETRIES;
	107	+
	108	+ scaler_write(SCALER_CFG_SOFT_RESET, SCALER_CFG);
	109	+ do {
	110	+ cpu_relax();
	111	+ } while (retry > 1 &&
	112	+ scaler_read(SCALER_CFG) & SCALER_CFG_SOFT_RESET);
	113	+ do {
	114	+ cpu_relax();
	115	+ scaler_write(1, SCALER_INT_EN);
	116	+ } while (retry > 0 && scaler_read(SCALER_INT_EN) != 1);
	117	+
	118	+ return retry ? 0 : -EIO;
	119	+}
	120	+
103	121	static inline void scaler_enable_int(struct scaler_context *scaler)
104	122	{
105	123	u32 val;
@@ -354,9 +372,13 @@ static int scaler_commit(struct exynos_drm_ipp *ipp, · 248 unmodified lines
354	372	u32 dst_fmt = scaler_get_format(task->dst.buf.fourcc);
355	373	struct drm_exynos_ipp_task_rect *dst_pos = &task->dst.rect;
356	374
357		− scaler->task = task;
358		−
359	375	pm_runtime_get_sync(scaler->dev);
	376	+ if (scaler_reset(scaler)) {
	377	+ pm_runtime_put(scaler->dev);
	378	+ return -EIO;
	379	+ }
	380	+
	381	+ scaler->task = task;
360	382
361	383	scaler_set_src_fmt(scaler, src_fmt);
362	384	scaler_set_src_base(scaler, &task->src);
@@ -394,7 +416,11 @@ static inline void scaler_disable_int(struct scaler_context *scaler) · 31 unmodified lines
394	416
395	417	static inline u32 scaler_get_int_status(struct scaler_context *scaler)
396	418	{
397		− return scaler_read(SCALER_INT_STATUS);
	419	+ u32 val = scaler_read(SCALER_INT_STATUS);
	420	+
	421	+ scaler_write(val, SCALER_INT_STATUS);
	422	+
	423	+ return val;
398	424	}
399	425
400	426	static inline int scaler_task_done(u32 val)

drivers/gpu/drm/exynos/regs-gsc.h+1−0

@@ -138,6 +138,7 @@ · 137 unmodified lines
138	138	#define GSC_OUT_YUV420_3P (3 << 4)
139	139	#define GSC_OUT_YUV422_1P (4 << 4)
140	140	#define GSC_OUT_YUV422_2P (5 << 4)
	141	+#define GSC_OUT_YUV422_3P (6 << 4)
141	142	#define GSC_OUT_YUV444 (7 << 4)
142	143	#define GSC_OUT_TILE_TYPE_MASK (1 << 2)
143	144	#define GSC_OUT_TILE_C_16x8 (0 << 2)

drivers/gpu/drm/i915/gvt/cmd_parser.c+23−0

@@ -862,6 +862,7 @@ static int cmd_reg_handler(struct parser_exec_state *s, · 861 unmodified lines
862	862	{
863	863	struct intel_vgpu *vgpu = s->vgpu;
864	864	struct intel_gvt *gvt = vgpu->gvt;
	865	+ u32 ctx_sr_ctl;
865	866
866	867	if (offset + 4 > gvt->device_info.mmio_size) {
867	868	gvt_vgpu_err("%s access to (%x) outside of MMIO range\n",
@@ -894,6 +895,28 @@ static int cmd_reg_handler(struct parser_exec_state *s, · 26 unmodified lines
894	895	patch_value(s, cmd_ptr(s, index), VGT_PVINFO_PAGE);
895	896	}
896	897
	898	+ /* TODO
	899	+ * Right now only scan LRI command on KBL and in inhibit context.
	900	+ * It's good enough to support initializing mmio by lri command in
	901	+ * vgpu inhibit context on KBL.
	902	+ */
	903	+ if (IS_KABYLAKE(s->vgpu->gvt->dev_priv) &&
	904	+ intel_gvt_mmio_is_in_ctx(gvt, offset) &&
	905	+ !strncmp(cmd, "lri", 3)) {
	906	+ intel_gvt_hypervisor_read_gpa(s->vgpu,
	907	+ s->workload->ring_context_gpa + 12, &ctx_sr_ctl, 4);
	908	+ /* check inhibit context */
	909	+ if (ctx_sr_ctl & 1) {
	910	+ u32 data = cmd_val(s, index + 1);
	911	+
	912	+ if (intel_gvt_mmio_has_mode_mask(s->vgpu->gvt, offset))
	913	+ intel_vgpu_mask_mmio_write(vgpu,
	914	+ offset, &data, 4);
	915	+ else
	916	+ vgpu_vreg(vgpu, offset) = data;
	917	+ }
	918	+ }
	919	+
897	920	/* TODO: Update the global mask if this MMIO is a masked-MMIO */
898	921	intel_gvt_mmio_set_cmd_accessed(gvt, offset);
899	922	return 0;

drivers/gpu/drm/i915/gvt/display.c+3−3

@@ -196,7 +196,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) · 195 unmodified lines
196	196	~(TRANS_DDI_BPC_MASK \| TRANS_DDI_MODE_SELECT_MASK \|
197	197	TRANS_DDI_PORT_MASK);
198	198	vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) \|=
199		− (TRANS_DDI_BPC_8 \| TRANS_DDI_MODE_SELECT_DP_SST \|
	199	+ (TRANS_DDI_BPC_8 \| TRANS_DDI_MODE_SELECT_DVI \|
200	200	(PORT_B << TRANS_DDI_PORT_SHIFT) \|
201	201	TRANS_DDI_FUNC_ENABLE);
202	202	if (IS_BROADWELL(dev_priv)) {
@@ -216,7 +216,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) · 13 unmodified lines
216	216	~(TRANS_DDI_BPC_MASK \| TRANS_DDI_MODE_SELECT_MASK \|
217	217	TRANS_DDI_PORT_MASK);
218	218	vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) \|=
219		− (TRANS_DDI_BPC_8 \| TRANS_DDI_MODE_SELECT_DP_SST \|
	219	+ (TRANS_DDI_BPC_8 \| TRANS_DDI_MODE_SELECT_DVI \|
220	220	(PORT_C << TRANS_DDI_PORT_SHIFT) \|
221	221	TRANS_DDI_FUNC_ENABLE);
222	222	if (IS_BROADWELL(dev_priv)) {
@@ -236,7 +236,7 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu) · 13 unmodified lines
236	236	~(TRANS_DDI_BPC_MASK \| TRANS_DDI_MODE_SELECT_MASK \|
237	237	TRANS_DDI_PORT_MASK);
238	238	vgpu_vreg_t(vgpu, TRANS_DDI_FUNC_CTL(TRANSCODER_A)) \|=
239		− (TRANS_DDI_BPC_8 \| TRANS_DDI_MODE_SELECT_DP_SST \|
	239	+ (TRANS_DDI_BPC_8 \| TRANS_DDI_MODE_SELECT_DVI \|
240	240	(PORT_D << TRANS_DDI_PORT_SHIFT) \|
241	241	TRANS_DDI_FUNC_ENABLE);
242	242	if (IS_BROADWELL(dev_priv)) {

drivers/gpu/drm/i915/gvt/gtt.c+58−0

@@ -1592,6 +1592,7 @@ static struct intel_vgpu_mm intel_vgpu_create_ggtt_mm(struct intel_vgpu vgpu) · 1591 unmodified lines
1592	1592	vgpu_free_mm(mm);
1593	1593	return ERR_PTR(-ENOMEM);
1594	1594	}
	1595	+ mm->ggtt_mm.last_partial_off = -1UL;
1595	1596
1596	1597	return mm;
1597	1598	}
@@ -1616,6 +1617,7 @@ void _intel_vgpu_mm_release(struct kref *mm_ref) · 18 unmodified lines
1616	1617	invalidate_ppgtt_mm(mm);
1617	1618	} else {
1618	1619	vfree(mm->ggtt_mm.virtual_ggtt);
	1620	+ mm->ggtt_mm.last_partial_off = -1UL;
1619	1621	}
1620	1622
1621	1623	vgpu_free_mm(mm);
@@ -1868,6 +1870,62 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, · 246 unmodified lines
1868	1870	memcpy((void *)&e.val64 + (off & (info->gtt_entry_size - 1)), p_data,
1869	1871	bytes);
1870	1872
	1873	+ /* If ggtt entry size is 8 bytes, and it's split into two 4 bytes
	1874	+ * write, we assume the two 4 bytes writes are consecutive.
	1875	+ * Otherwise, we abort and report error
	1876	+ */
	1877	+ if (bytes < info->gtt_entry_size) {
	1878	+ if (ggtt_mm->ggtt_mm.last_partial_off == -1UL) {
	1879	+ /* the first partial part*/
	1880	+ ggtt_mm->ggtt_mm.last_partial_off = off;
	1881	+ ggtt_mm->ggtt_mm.last_partial_data = e.val64;
	1882	+ return 0;
	1883	+ } else if ((g_gtt_index ==
	1884	+ (ggtt_mm->ggtt_mm.last_partial_off >>
	1885	+ info->gtt_entry_size_shift)) &&
	1886	+ (off != ggtt_mm->ggtt_mm.last_partial_off)) {
	1887	+ /* the second partial part */
	1888	+
	1889	+ int last_off = ggtt_mm->ggtt_mm.last_partial_off &
	1890	+ (info->gtt_entry_size - 1);
	1891	+
	1892	+ memcpy((void *)&e.val64 + last_off,
	1893	+ (void *)&ggtt_mm->ggtt_mm.last_partial_data +
	1894	+ last_off, bytes);
	1895	+
	1896	+ ggtt_mm->ggtt_mm.last_partial_off = -1UL;
	1897	+ } else {
	1898	+ int last_offset;
	1899	+
	1900	+ gvt_vgpu_err("failed to populate guest ggtt entry: abnormal ggtt entry write sequence, last_partial_off=%lx, offset=%x, bytes=%d, ggtt entry size=%d\n",
	1901	+ ggtt_mm->ggtt_mm.last_partial_off, off,
	1902	+ bytes, info->gtt_entry_size);
	1903	+
	1904	+ /* set host ggtt entry to scratch page and clear
	1905	+ * virtual ggtt entry as not present for last
	1906	+ * partially write offset
	1907	+ */
	1908	+ last_offset = ggtt_mm->ggtt_mm.last_partial_off &
	1909	+ (~(info->gtt_entry_size - 1));
	1910	+
	1911	+ ggtt_get_host_entry(ggtt_mm, &m, last_offset);
	1912	+ ggtt_invalidate_pte(vgpu, &m);
	1913	+ ops->set_pfn(&m, gvt->gtt.scratch_mfn);
	1914	+ ops->clear_present(&m);
	1915	+ ggtt_set_host_entry(ggtt_mm, &m, last_offset);
	1916	+ ggtt_invalidate(gvt->dev_priv);
	1917	+
	1918	+ ggtt_get_guest_entry(ggtt_mm, &e, last_offset);
	1919	+ ops->clear_present(&e);
	1920	+ ggtt_set_guest_entry(ggtt_mm, &e, last_offset);
	1921	+
	1922	+ ggtt_mm->ggtt_mm.last_partial_off = off;
	1923	+ ggtt_mm->ggtt_mm.last_partial_data = e.val64;
	1924	+
	1925	+ return 0;
	1926	+ }
	1927	+ }
	1928	+
1871	1929	if (ops->test_present(&e)) {
1872	1930	gfn = ops->get_pfn(&e);
1873	1931	m = e;

drivers/gpu/drm/i915/gvt/gtt.h+2−0

@@ -150,6 +150,8 @@ struct intel_vgpu_mm { · 149 unmodified lines
150	150	} ppgtt_mm;
151	151	struct {
152	152	void *virtual_ggtt;
	153	+ unsigned long last_partial_off;
	154	+ u64 last_partial_data;
153	155	} ggtt_mm;
154	156	};
155	157	};

drivers/gpu/drm/i915/gvt/gvt.h+29−0

@@ -268,6 +268,8 @@ struct intel_gvt_mmio { · 267 unmodified lines
268	268	#define F_CMD_ACCESSED (1 << 5)
269	269	/* This reg could be accessed by unaligned address */
270	270	#define F_UNALIGN (1 << 6)
	271	+/* This reg is saved/restored in context */
	272	+#define F_IN_CTX (1 << 7)
271	273
272	274	struct gvt_mmio_block *mmio_block;
273	275	unsigned int num_mmio_block;
@@ -639,6 +641,33 @@ static inline bool intel_gvt_mmio_has_mode_mask( · 365 unmodified lines
639	641	return gvt->mmio.mmio_attribute[offset >> 2] & F_MODE_MASK;
640	642	}
641	643
	644	+/**
	645	+ * intel_gvt_mmio_is_in_ctx - check if a MMIO has in-ctx mask
	646	+ * @gvt: a GVT device
	647	+ * @offset: register offset
	648	+ *
	649	+ * Returns:
	650	+ * True if a MMIO has a in-context mask, false if it isn't.
	651	+ *
	652	+ */
	653	+static inline bool intel_gvt_mmio_is_in_ctx(
	654	+ struct intel_gvt *gvt, unsigned int offset)
	655	+{
	656	+ return gvt->mmio.mmio_attribute[offset >> 2] & F_IN_CTX;
	657	+}
	658	+
	659	+/**
	660	+ * intel_gvt_mmio_set_in_ctx - mask a MMIO in logical context
	661	+ * @gvt: a GVT device
	662	+ * @offset: register offset
	663	+ *
	664	+ */
	665	+static inline void intel_gvt_mmio_set_in_ctx(
	666	+ struct intel_gvt *gvt, unsigned int offset)
	667	+{
	668	+ gvt->mmio.mmio_attribute[offset >> 2] \|= F_IN_CTX;
	669	+}
	670	+
642	671	int intel_gvt_debugfs_add_vgpu(struct intel_vgpu *vgpu);
643	672	void intel_gvt_debugfs_remove_vgpu(struct intel_vgpu *vgpu);
644	673	int intel_gvt_debugfs_init(struct intel_gvt *gvt);

drivers/gpu/drm/i915/gvt/handlers.c+24−0

@@ -3045,6 +3045,30 @@ int intel_vgpu_default_mmio_write(struct intel_vgpu *vgpu, unsigned int offset, · 3044 unmodified lines
3045	3045	return 0;
3046	3046	}
3047	3047
	3048	+/**
	3049	+ * intel_vgpu_mask_mmio_write - write mask register
	3050	+ * @vgpu: a vGPU
	3051	+ * @offset: access offset
	3052	+ * @p_data: write data buffer
	3053	+ * @bytes: access data length
	3054	+ *
	3055	+ * Returns:
	3056	+ * Zero on success, negative error code if failed.
	3057	+ */
	3058	+int intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
	3059	+ void *p_data, unsigned int bytes)
	3060	+{
	3061	+ u32 mask, old_vreg;
	3062	+
	3063	+ old_vreg = vgpu_vreg(vgpu, offset);
	3064	+ write_vreg(vgpu, offset, p_data, bytes);
	3065	+ mask = vgpu_vreg(vgpu, offset) >> 16;
	3066	+ vgpu_vreg(vgpu, offset) = (old_vreg & ~mask) \|
	3067	+ (vgpu_vreg(vgpu, offset) & mask);
	3068	+
	3069	+ return 0;
	3070	+}
	3071	+
3048	3072	/**
3049	3073	* intel_gvt_in_force_nonpriv_whitelist - if a mmio is in whitelist to be
3050	3074	* force-nopriv register

drivers/gpu/drm/i915/gvt/mmio.h+2−0

@@ -98,4 +98,6 @@ bool intel_gvt_in_force_nonpriv_whitelist(struct intel_gvt *gvt, · 97 unmodified lines
98	98	int intel_vgpu_mmio_reg_rw(struct intel_vgpu *vgpu, unsigned int offset,
99	99	void *pdata, unsigned int bytes, bool is_read);
100	100
	101	+int intel_vgpu_mask_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
	102	+ void *p_data, unsigned int bytes);
101	103	#endif

drivers/gpu/drm/i915/gvt/mmio_context.c+3−1

@@ -581,7 +581,9 @@ void intel_gvt_init_engine_mmio_context(struct intel_gvt *gvt) · 580 unmodified lines
581	581
582	582	for (mmio = gvt->engine_mmio_list.mmio;
583	583	i915_mmio_reg_valid(mmio->reg); mmio++) {
584		− if (mmio->in_context)
	584	+ if (mmio->in_context) {
585	585	gvt->engine_mmio_list.ctx_mmio_count[mmio->ring_id]++;
	586	+ intel_gvt_mmio_set_in_ctx(gvt, mmio->reg.reg);
	587	+ }
586	588	}
587	589	}

drivers/gpu/drm/i915/i915_drv.h+15−10

@@ -340,14 +340,21 @@ struct drm_i915_file_private { · 339 unmodified lines
340	340
341	341	unsigned int bsd_engine;
342	342
343		−/* Client can have a maximum of 3 contexts banned before
344		− * it is denied of creating new contexts. As one context
345		− * ban needs 4 consecutive hangs, and more if there is
346		− * progress in between, this is a last resort stop gap measure
347		− * to limit the badly behaving clients access to gpu.
	343	+/*
	344	+ * Every context ban increments per client ban score. Also
	345	+ * hangs in short succession increments ban score. If ban threshold
	346	+ * is reached, client is considered banned and submitting more work
	347	+ * will fail. This is a stop gap measure to limit the badly behaving
	348	+ * clients access to gpu. Note that unbannable contexts never increment
	349	+ * the client ban score.
348	350	*/
349		−#define I915_MAX_CLIENT_CONTEXT_BANS 3
350		− atomic_t context_bans;
	351	+#define I915_CLIENT_SCORE_HANG_FAST 1
	352	+#define I915_CLIENT_FAST_HANG_JIFFIES (60 * HZ)
	353	+#define I915_CLIENT_SCORE_CONTEXT_BAN 3
	354	+#define I915_CLIENT_SCORE_BANNED 9
	355	+ /** ban_score: Accumulated score of all ctx bans and fast hangs. */
	356	+ atomic_t ban_score;
	357	+ unsigned long hang_timestamp;
351	358	};
352	359
353	360	/* Interface history:
@@ -645,6 +652,7 @@ enum intel_sbi_destination { · 291 unmodified lines
645	652	#define QUIRK_BACKLIGHT_PRESENT (1<<3)
646	653	#define QUIRK_PIN_SWIZZLED_PAGES (1<<5)
647	654	#define QUIRK_INCREASE_T12_DELAY (1<<6)
	655	+#define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7)
648	656
649	657	struct intel_fbdev;
650	658	struct intel_fbc_work;
@@ -2238,9 +2246,6 @@ static inline struct scatterlist ____sg_next(struct scatterlist sg) · 1587 unmodified lines
2238	2246	**/
2239	2247	static inline struct scatterlist __sg_next(struct scatterlist sg)
2240	2248	{
2241		−#ifdef CONFIG_DEBUG_SG
2242		− BUG_ON(sg->sg_magic != SG_MAGIC);
2243		−#endif
2244	2249	return sg_is_last(sg) ? NULL : ____sg_next(sg);
2245	2250	}
2246	2251

drivers/gpu/drm/i915/i915_gem.c+57−28

@@ -2002,7 +2002,6 @@ int i915_gem_fault(struct vm_fault *vmf) · 2001 unmodified lines
2002	2002	bool write = !!(vmf->flags & FAULT_FLAG_WRITE);
2003	2003	struct i915_vma *vma;
2004	2004	pgoff_t page_offset;
2005		− unsigned int flags;
2006	2005	int ret;
2007	2006
2008	2007	/* We don't use vmf->pgoff since that has the fake offset */
@@ -2038,27 +2037,34 @@ int i915_gem_fault(struct vm_fault *vmf) · 29 unmodified lines
2038	2037	goto err_unlock;
2039	2038	}
2040	2039
2041		− /* If the object is smaller than a couple of partial vma, it is
2042		− * not worth only creating a single partial vma - we may as well
2043		− * clear enough space for the full object.
2044		− */
2045		− flags = PIN_MAPPABLE;
2046		− if (obj->base.size > 2 * MIN_CHUNK_PAGES << PAGE_SHIFT)
2047		− flags \|= PIN_NONBLOCK \| PIN_NONFAULT;
2048	2040
2049	2041	/* Now pin it into the GTT as needed */
2050		− vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, flags);
	2042	+ vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0,
	2043	+ PIN_MAPPABLE \|
	2044	+ PIN_NONBLOCK \|
	2045	+ PIN_NONFAULT);
2051	2046	if (IS_ERR(vma)) {
2052	2047	/* Use a partial view if it is bigger than available space */
2053	2048	struct i915_ggtt_view view =
2054	2049	compute_partial_view(obj, page_offset, MIN_CHUNK_PAGES);
	2050	+ unsigned int flags;
2055	2051
2056		− /* Userspace is now writing through an untracked VMA, abandon
	2052	+ flags = PIN_MAPPABLE;
	2053	+ if (view.type == I915_GGTT_VIEW_NORMAL)
	2054	+ flags \|= PIN_NONBLOCK; /* avoid warnings for pinned */
	2055	+
	2056	+ /*
	2057	+ * Userspace is now writing through an untracked VMA, abandon
2057	2058	* all hope that the hardware is able to track future writes.
2058	2059	*/
2059	2060	obj->frontbuffer_ggtt_origin = ORIGIN_CPU;
2060	2061
2061		− vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE);
	2062	+ vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, flags);
	2063	+ if (IS_ERR(vma) && !view.type) {
	2064	+ flags = PIN_MAPPABLE;
	2065	+ view.type = I915_GGTT_VIEW_PARTIAL;
	2066	+ vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, flags);
	2067	+ }
2062	2068	}
2063	2069	if (IS_ERR(vma)) {
2064	2070	ret = PTR_ERR(vma);
@@ -2933,32 +2939,54 @@ i915_gem_object_pwrite_gtt(struct drm_i915_gem_object *obj, · 868 unmodified lines
2933	2939	return 0;
2934	2940	}
2935	2941
	2942	+static void i915_gem_client_mark_guilty(struct drm_i915_file_private *file_priv,
	2943	+ const struct i915_gem_context *ctx)
	2944	+{
	2945	+ unsigned int score;
	2946	+ unsigned long prev_hang;
	2947	+
	2948	+ if (i915_gem_context_is_banned(ctx))
	2949	+ score = I915_CLIENT_SCORE_CONTEXT_BAN;
	2950	+ else
	2951	+ score = 0;
	2952	+
	2953	+ prev_hang = xchg(&file_priv->hang_timestamp, jiffies);
	2954	+ if (time_before(jiffies, prev_hang + I915_CLIENT_FAST_HANG_JIFFIES))
	2955	+ score += I915_CLIENT_SCORE_HANG_FAST;
	2956	+
	2957	+ if (score) {
	2958	+ atomic_add(score, &file_priv->ban_score);
	2959	+
	2960	+ DRM_DEBUG_DRIVER("client %s: gained %u ban score, now %u\n",
	2961	+ ctx->name, score,
	2962	+ atomic_read(&file_priv->ban_score));
	2963	+ }
	2964	+}
	2965	+
2936	2966	static void i915_gem_context_mark_guilty(struct i915_gem_context *ctx)
2937	2967	{
2938		− bool banned;
	2968	+ unsigned int score;
	2969	+ bool banned, bannable;
2939	2970
2940	2971	atomic_inc(&ctx->guilty_count);
2941	2972
2942		− banned = false;
2943		− if (i915_gem_context_is_bannable(ctx)) {
2944		− unsigned int score;
	2973	+ bannable = i915_gem_context_is_bannable(ctx);
	2974	+ score = atomic_add_return(CONTEXT_SCORE_GUILTY, &ctx->ban_score);
	2975	+ banned = score >= CONTEXT_SCORE_BAN_THRESHOLD;
2945	2976
2946		− score = atomic_add_return(CONTEXT_SCORE_GUILTY,
2947		− &ctx->ban_score);
2948		− banned = score >= CONTEXT_SCORE_BAN_THRESHOLD;
	2977	+ DRM_DEBUG_DRIVER("context %s: guilty %d, score %u, ban %s\n",
	2978	+ ctx->name, atomic_read(&ctx->guilty_count),
	2979	+ score, yesno(banned && bannable));
2949	2980
2950		− DRM_DEBUG_DRIVER("context %s marked guilty (score %d) banned? %s\n",
2951		− ctx->name, score, yesno(banned));
2952		− }
2953		− if (!banned)
	2981	+ /* Cool contexts don't accumulate client ban score */
	2982	+ if (!bannable)
2954	2983	return;
2955	2984
2956		− i915_gem_context_set_banned(ctx);
2957		− if (!IS_ERR_OR_NULL(ctx->file_priv)) {
2958		− atomic_inc(&ctx->file_priv->context_bans);
2959		− DRM_DEBUG_DRIVER("client %s has had %d context banned\n",
2960		− ctx->name, atomic_read(&ctx->file_priv->context_bans));
2961		− }
	2985	+ if (banned)
	2986	+ i915_gem_context_set_banned(ctx);
	2987	+
	2988	+ if (!IS_ERR_OR_NULL(ctx->file_priv))
	2989	+ i915_gem_client_mark_guilty(ctx->file_priv, ctx);
2962	2990	}
2963	2991
2964	2992	static void i915_gem_context_mark_innocent(struct i915_gem_context *ctx)
@@ -5736,6 +5764,7 @@ int i915_gem_open(struct drm_i915_private i915, struct drm_file file) · 2771 unmodified lines
5736	5764	INIT_LIST_HEAD(&file_priv->mm.request_list);
5737	5765
5738	5766	file_priv->bsd_engine = -1;
	5767	+ file_priv->hang_timestamp = jiffies;
5739	5768
5740	5769	ret = i915_gem_context_open(i915, file);
5741	5770	if (ret)

drivers/gpu/drm/i915/i915_gem_context.c+1−1

@@ -652,7 +652,7 @@ int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv) · 651 unmodified lines
652	652
653	653	static bool client_is_banned(struct drm_i915_file_private *file_priv)
654	654	{
655		− return atomic_read(&file_priv->context_bans) > I915_MAX_CLIENT_CONTEXT_BANS;
	655	+ return atomic_read(&file_priv->ban_score) >= I915_CLIENT_SCORE_BANNED;
656	656	}
657	657
658	658	int i915_gem_context_create_ioctl(struct drm_device dev, void data,

drivers/gpu/drm/i915/i915_gem_execbuffer.c+27−22

@@ -489,7 +489,9 @@ eb_validate_vma(struct i915_execbuffer *eb, · 488 unmodified lines
489	489	}
490	490
491	491	static int
492		−eb_add_vma(struct i915_execbuffer eb, unsigned int i, struct i915_vma vma)
	492	+eb_add_vma(struct i915_execbuffer *eb,
	493	+ unsigned int i, unsigned batch_idx,
	494	+ struct i915_vma *vma)
493	495	{
494	496	struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
495	497	int err;
@@ -522,6 +524,24 @@ eb_add_vma(struct i915_execbuffer eb, unsigned int i, struct i915_vma vma) · 26 unmodified lines
522	524	eb->flags[i] = entry->flags;
523	525	vma->exec_flags = &eb->flags[i];
524	526
	527	+ /*
	528	+ * SNA is doing fancy tricks with compressing batch buffers, which leads
	529	+ * to negative relocation deltas. Usually that works out ok since the
	530	+ * relocate address is still positive, except when the batch is placed
	531	+ * very low in the GTT. Ensure this doesn't happen.
	532	+ *
	533	+ * Note that actual hangs have only been observed on gen7, but for
	534	+ * paranoia do it everywhere.
	535	+ */
	536	+ if (i == batch_idx) {
	537	+ if (!(eb->flags[i] & EXEC_OBJECT_PINNED))
	538	+ eb->flags[i] \|= __EXEC_OBJECT_NEEDS_BIAS;
	539	+ if (eb->reloc_cache.has_fence)
	540	+ eb->flags[i] \|= EXEC_OBJECT_NEEDS_FENCE;
	541	+
	542	+ eb->batch = vma;
	543	+ }
	544	+
525	545	err = 0;
526	546	if (eb_pin_vma(eb, entry, vma)) {
527	547	if (entry->offset != vma->node.start) {
@@ -716,7 +736,7 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb) · 188 unmodified lines
716	736	{
717	737	struct radix_tree_root *handles_vma = &eb->ctx->handles_vma;
718	738	struct drm_i915_gem_object *obj;
719		− unsigned int i;
	739	+ unsigned int i, batch;
720	740	int err;
721	741
722	742	if (unlikely(i915_gem_context_is_closed(eb->ctx)))
@@ -728,6 +748,8 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb) · 5 unmodified lines
728	748	INIT_LIST_HEAD(&eb->relocs);
729	749	INIT_LIST_HEAD(&eb->unbound);
730	750
	751	+ batch = eb_batch_index(eb);
	752	+
731	753	for (i = 0; i < eb->buffer_count; i++) {
732	754	u32 handle = eb->exec[i].handle;
733	755	struct i915_lut_handle *lut;
@@ -770,33 +792,16 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb) · 36 unmodified lines
770	792	lut->handle = handle;
771	793
772	794	add_vma:
773		− err = eb_add_vma(eb, i, vma);
	795	+ err = eb_add_vma(eb, i, batch, vma);
774	796	if (unlikely(err))
775	797	goto err_vma;
776	798
777	799	GEM_BUG_ON(vma != eb->vma[i]);
778	800	GEM_BUG_ON(vma->exec_flags != &eb->flags[i]);
	801	+ GEM_BUG_ON(drm_mm_node_allocated(&vma->node) &&
	802	+ eb_vma_misplaced(&eb->exec[i], vma, eb->flags[i]));
779	803	}
780	804
781		− /* take note of the batch buffer before we might reorder the lists */
782		− i = eb_batch_index(eb);
783		− eb->batch = eb->vma[i];
784		− GEM_BUG_ON(eb->batch->exec_flags != &eb->flags[i]);
785		−
786		− /*
787		− * SNA is doing fancy tricks with compressing batch buffers, which leads
788		− * to negative relocation deltas. Usually that works out ok since the
789		− * relocate address is still positive, except when the batch is placed
790		− * very low in the GTT. Ensure this doesn't happen.
791		− *
792		− * Note that actual hangs have only been observed on gen7, but for
793		− * paranoia do it everywhere.
794		− */
795		− if (!(eb->flags[i] & EXEC_OBJECT_PINNED))
796		− eb->flags[i] \|= __EXEC_OBJECT_NEEDS_BIAS;
797		− if (eb->reloc_cache.has_fence)
798		− eb->flags[i] \|= EXEC_OBJECT_NEEDS_FENCE;
799		−
800	805	eb->args->flags \|= __EXEC_VALIDATED;
801	806	return eb_reserve(eb);
802	807

drivers/gpu/drm/i915/i915_irq.c+40−4

@@ -1893,9 +1893,17 @@ static void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv, · 1892 unmodified lines
1893	1893
1894	1894	/*
1895	1895	* Clear the PIPE*STAT regs before the IIR
	1896	+ *
	1897	+ * Toggle the enable bits to make sure we get an
	1898	+ * edge in the ISR pipe event bit if we don't clear
	1899	+ * all the enabled status bits. Otherwise the edge
	1900	+ * triggered IIR on i965/g4x wouldn't notice that
	1901	+ * an interrupt is still pending.
1896	1902	*/
1897		− if (pipe_stats[pipe])
1898		− I915_WRITE(reg, enable_mask \| pipe_stats[pipe]);
	1903	+ if (pipe_stats[pipe]) {
	1904	+ I915_WRITE(reg, pipe_stats[pipe]);
	1905	+ I915_WRITE(reg, enable_mask);
	1906	+ }
1899	1907	}
1900	1908	spin_unlock(&dev_priv->irq_lock);
1901	1909	}
@@ -1990,10 +1998,38 @@ static void valleyview_pipestat_irq_handler(struct drm_i915_private *dev_priv, · 88 unmodified lines
1990	1998
1991	1999	static u32 i9xx_hpd_irq_ack(struct drm_i915_private *dev_priv)
1992	2000	{
1993		− u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
	2001	+ u32 hotplug_status = 0, hotplug_status_mask;
	2002	+ int i;
1994	2003
1995		− if (hotplug_status)
	2004	+ if (IS_G4X(dev_priv) \|\|
	2005	+ IS_VALLEYVIEW(dev_priv) \|\| IS_CHERRYVIEW(dev_priv))
	2006	+ hotplug_status_mask = HOTPLUG_INT_STATUS_G4X \|
	2007	+ DP_AUX_CHANNEL_MASK_INT_STATUS_G4X;
	2008	+ else
	2009	+ hotplug_status_mask = HOTPLUG_INT_STATUS_I915;
	2010	+
	2011	+ /*
	2012	+ * We absolutely have to clear all the pending interrupt
	2013	+ * bits in PORT_HOTPLUG_STAT. Otherwise the ISR port
	2014	+ * interrupt bit won't have an edge, and the i965/g4x
	2015	+ * edge triggered IIR will not notice that an interrupt
	2016	+ * is still pending. We can't use PORT_HOTPLUG_EN to
	2017	+ * guarantee the edge as the act of toggling the enable
	2018	+ * bits can itself generate a new hotplug interrupt :(
	2019	+ */
	2020	+ for (i = 0; i < 10; i++) {
	2021	+ u32 tmp = I915_READ(PORT_HOTPLUG_STAT) & hotplug_status_mask;
	2022	+
	2023	+ if (tmp == 0)
	2024	+ return hotplug_status;
	2025	+
	2026	+ hotplug_status \|= tmp;
1996	2027	I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
	2028	+ }
	2029	+
	2030	+ WARN_ONCE(1,
	2031	+ "PORT_HOTPLUG_STAT did not clear (0x%08x)\n",
	2032	+ I915_READ(PORT_HOTPLUG_STAT));
1997	2033
1998	2034	return hotplug_status;
1999	2035	}

drivers/gpu/drm/i915/i915_reg.h+5−0

@@ -2425,12 +2425,17 @@ enum i915_power_well_id { · 2424 unmodified lines
2425	2425	#define _3D_CHICKEN _MMIO(0x2084)
2426	2426	#define _3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB (1 << 10)
2427	2427	#define _3D_CHICKEN2 _MMIO(0x208c)
	2428	+
	2429	+#define FF_SLICE_CHICKEN _MMIO(0x2088)
	2430	+#define FF_SLICE_CHICKEN_CL_PROVOKING_VERTEX_FIX (1 << 1)
	2431	+
2428	2432	/* Disables pipelining of read flushes past the SF-WIZ interface.
2429	2433	* Required on all Ironlake steppings according to the B-Spec, but the
2430	2434	* particular danger of not doing so is not specified.
2431	2435	*/
2432	2436	# define _3D_CHICKEN2_WM_READ_PIPELINED (1 << 14)
2433	2437	#define _3D_CHICKEN3 _MMIO(0x2090)
	2438	+#define _3D_CHICKEN_SF_PROVOKING_VERTEX_FIX (1 << 12)
2434	2439	#define _3D_CHICKEN_SF_DISABLE_OBJEND_CULL (1 << 10)
2435	2440	#define _3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE (1 << 5)
2436	2441	#define _3D_CHICKEN3_SF_DISABLE_FASTCLIP_CULL (1 << 5)

drivers/gpu/drm/i915/i915_vma.c+1−1

@@ -109,7 +109,7 @@ vma_create(struct drm_i915_gem_object *obj, · 108 unmodified lines
109	109	obj->base.size >> PAGE_SHIFT));
110	110	vma->size = view->partial.size;
111	111	vma->size <<= PAGE_SHIFT;
112		− GEM_BUG_ON(vma->size >= obj->base.size);
	112	+ GEM_BUG_ON(vma->size > obj->base.size);
113	113	} else if (view->type == I915_GGTT_VIEW_ROTATED) {
114	114	vma->size = intel_rotation_info_size(&view->rotated);
115	115	vma->size <<= PAGE_SHIFT;

drivers/gpu/drm/i915/intel_crt.c+20−0

@@ -304,6 +304,9 @@ intel_crt_mode_valid(struct drm_connector *connector, · 303 unmodified lines
304	304	int max_dotclk = dev_priv->max_dotclk_freq;
305	305	int max_clock;
306	306
	307	+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	308	+ return MODE_NO_DBLESCAN;
	309	+
307	310	if (mode->clock < 25000)
308	311	return MODE_CLOCK_LOW;
309	312
@@ -337,6 +340,12 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder, · 27 unmodified lines
337	340	struct intel_crtc_state *pipe_config,
338	341	struct drm_connector_state *conn_state)
339	342	{
	343	+ struct drm_display_mode *adjusted_mode =
	344	+ &pipe_config->base.adjusted_mode;
	345	+
	346	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	347	+ return false;
	348	+
340	349	return true;
341	350	}
342	351
@@ -344,6 +353,12 @@ static bool pch_crt_compute_config(struct intel_encoder *encoder, · 1 unmodified line
344	353	struct intel_crtc_state *pipe_config,
345	354	struct drm_connector_state *conn_state)
346	355	{
	356	+ struct drm_display_mode *adjusted_mode =
	357	+ &pipe_config->base.adjusted_mode;
	358	+
	359	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	360	+ return false;
	361	+
347	362	pipe_config->has_pch_encoder = true;
348	363
349	364	return true;
@@ -354,6 +369,11 @@ static bool hsw_crt_compute_config(struct intel_encoder *encoder, · 4 unmodified lines
354	369	struct drm_connector_state *conn_state)
355	370	{
356	371	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
	372	+ struct drm_display_mode *adjusted_mode =
	373	+ &pipe_config->base.adjusted_mode;
	374	+
	375	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	376	+ return false;
357	377
358	378	pipe_config->has_pch_encoder = true;
359	379

drivers/gpu/drm/i915/intel_ddi.c+11−2

@@ -1782,15 +1782,24 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) · 1781 unmodified lines
1782	1782	I915_WRITE(TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
1783	1783	}
1784	1784
1785		−void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
1786		− enum transcoder cpu_transcoder)
	1785	+void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
1787	1786	{
	1787	+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
	1788	+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
	1789	+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
1788	1790	i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);
1789	1791	uint32_t val = I915_READ(reg);
1790	1792
1791	1793	val &= ~(TRANS_DDI_FUNC_ENABLE \| TRANS_DDI_PORT_MASK \| TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
1792	1794	val \|= TRANS_DDI_PORT_NONE;
1793	1795	I915_WRITE(reg, val);
	1796	+
	1797	+ if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
	1798	+ intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
	1799	+ DRM_DEBUG_KMS("Quirk Increase DDI disabled time\n");
	1800	+ /* Quirk time at 100ms for reliable operation */
	1801	+ msleep(100);
	1802	+ }
1794	1803	}
1795	1804
1796	1805	int intel_ddi_toggle_hdcp_signalling(struct intel_encoder *intel_encoder,

drivers/gpu/drm/i915/intel_display.c+33−4

@@ -5809,7 +5809,7 @@ static void haswell_crtc_disable(struct intel_crtc_state *old_crtc_state, · 5808 unmodified lines
5809	5809	intel_ddi_set_vc_payload_alloc(intel_crtc->config, false);
5810	5810
5811	5811	if (!transcoder_is_dsi(cpu_transcoder))
5812		− intel_ddi_disable_transcoder_func(dev_priv, cpu_transcoder);
	5812	+ intel_ddi_disable_transcoder_func(old_crtc_state);
5813	5813
5814	5814	if (INTEL_GEN(dev_priv) >= 9)
5815	5815	skylake_scaler_disable(intel_crtc);
@@ -14469,12 +14469,22 @@ static enum drm_mode_status · 8653 unmodified lines
14469	14469	intel_mode_valid(struct drm_device *dev,
14470	14470	const struct drm_display_mode *mode)
14471	14471	{
	14472	+ /*
	14473	+ * Can't reject DBLSCAN here because Xorg ddxen can add piles
	14474	+ * of DBLSCAN modes to the output's mode list when they detect
	14475	+ * the scaling mode property on the connector. And they don't
	14476	+ * ask the kernel to validate those modes in any way until
	14477	+ * modeset time at which point the client gets a protocol error.
	14478	+ * So in order to not upset those clients we silently ignore the
	14479	+ * DBLSCAN flag on such connectors. For other connectors we will
	14480	+ * reject modes with the DBLSCAN flag in encoder->compute_config().
	14481	+ * And we always reject DBLSCAN modes in connector->mode_valid()
	14482	+ * as we never want such modes on the connector's mode list.
	14483	+ */
	14484	+
14472	14485	if (mode->vscan > 1)
14473	14486	return MODE_NO_VSCAN;
14474	14487
14475		− if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
14476		− return MODE_NO_DBLESCAN;
14477		−
14478	14488	if (mode->flags & DRM_MODE_FLAG_HSKEW)
14479	14489	return MODE_H_ILLEGAL;
14480	14490
@@ -14636,6 +14646,18 @@ static void quirk_increase_t12_delay(struct drm_device *dev) · 155 unmodified lines
14636	14646	DRM_INFO("Applying T12 delay quirk\n");
14637	14647	}
14638	14648
	14649	+/*
	14650	+ * GeminiLake NUC HDMI outputs require additional off time
	14651	+ * this allows the onboard retimer to correctly sync to signal
	14652	+ */
	14653	+static void quirk_increase_ddi_disabled_time(struct drm_device *dev)
	14654	+{
	14655	+ struct drm_i915_private *dev_priv = to_i915(dev);
	14656	+
	14657	+ dev_priv->quirks \|= QUIRK_INCREASE_DDI_DISABLED_TIME;
	14658	+ DRM_INFO("Applying Increase DDI Disabled quirk\n");
	14659	+}
	14660	+
14639	14661	struct intel_quirk {
14640	14662	int device;
14641	14663	int subsystem_vendor;
@@ -14722,6 +14744,13 @@ static struct intel_quirk intel_quirks[] = { · 80 unmodified lines
14722	14744
14723	14745	/* Toshiba Satellite P50-C-18C */
14724	14746	{ 0x191B, 0x1179, 0xF840, quirk_increase_t12_delay },
	14747	+
	14748	+ /* GeminiLake NUC */
	14749	+ { 0x3185, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
	14750	+ { 0x3184, 0x8086, 0x2072, quirk_increase_ddi_disabled_time },
	14751	+ /* ASRock ITX*/
	14752	+ { 0x3185, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
	14753	+ { 0x3184, 0x1849, 0x2212, quirk_increase_ddi_disabled_time },
14725	14754	};
14726	14755
14727	14756	static void intel_init_quirks(struct drm_device *dev)

drivers/gpu/drm/i915/intel_dp.c+16−18

@@ -420,6 +420,9 @@ intel_dp_mode_valid(struct drm_connector *connector, · 419 unmodified lines
420	420	int max_rate, mode_rate, max_lanes, max_link_clock;
421	421	int max_dotclk;
422	422
	423	+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	424	+ return MODE_NO_DBLESCAN;
	425	+
423	426	max_dotclk = intel_dp_downstream_max_dotclock(intel_dp);
424	427
425	428	if (intel_dp_is_edp(intel_dp) && fixed_mode) {
@@ -1862,7 +1865,10 @@ intel_dp_compute_config(struct intel_encoder *encoder, · 1436 unmodified lines
1862	1865	conn_state->scaling_mode);
1863	1866	}
1864	1867
1865		− if ((IS_VALLEYVIEW(dev_priv) \|\| IS_CHERRYVIEW(dev_priv)) &&
	1868	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	1869	+ return false;
	1870	+
	1871	+ if (HAS_GMCH_DISPLAY(dev_priv) &&
1866	1872	adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
1867	1873	return false;
1868	1874
@@ -2782,16 +2788,6 @@ static void intel_disable_dp(struct intel_encoder *encoder, · 913 unmodified lines
2782	2788	static void g4x_disable_dp(struct intel_encoder *encoder,
2783	2789	const struct intel_crtc_state *old_crtc_state,
2784	2790	const struct drm_connector_state *old_conn_state)
2785		−{
2786		− intel_disable_dp(encoder, old_crtc_state, old_conn_state);
2787		−
2788		− /* disable the port before the pipe on g4x */
2789		− intel_dp_link_down(encoder, old_crtc_state);
2790		−}
2791		−
2792		−static void ilk_disable_dp(struct intel_encoder *encoder,
2793		− const struct intel_crtc_state *old_crtc_state,
2794		− const struct drm_connector_state *old_conn_state)
2795	2791	{
2796	2792	intel_disable_dp(encoder, old_crtc_state, old_conn_state);
2797	2793	}
@@ -2807,13 +2803,19 @@ static void vlv_disable_dp(struct intel_encoder *encoder, · 9 unmodified lines
2807	2803	intel_disable_dp(encoder, old_crtc_state, old_conn_state);
2808	2804	}
2809	2805
2810		−static void ilk_post_disable_dp(struct intel_encoder *encoder,
	2806	+static void g4x_post_disable_dp(struct intel_encoder *encoder,
2811	2807	const struct intel_crtc_state *old_crtc_state,
2812	2808	const struct drm_connector_state *old_conn_state)
2813	2809	{
2814	2810	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
2815	2811	enum port port = encoder->port;
2816	2812
	2813	+ /*
	2814	+ * Bspec does not list a specific disable sequence for g4x DP.
	2815	+ * Follow the ilk+ sequence (disable pipe before the port) for
	2816	+ * g4x DP as it does not suffer from underruns like the normal
	2817	+ * g4x modeset sequence (disable pipe after the port).
	2818	+ */
2817	2819	intel_dp_link_down(encoder, old_crtc_state);
2818	2820
2819	2821	/* Only ilk+ has port A */
@@ -6337,7 +6339,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, · 3517 unmodified lines
6337	6339	drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
6338	6340	drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
6339	6341
6340		− if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
	6342	+ if (!HAS_GMCH_DISPLAY(dev_priv))
6341	6343	connector->interlace_allowed = true;
6342	6344	connector->doublescan_allowed = 0;
6343	6345
@@ -6436,15 +6438,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv, · 92 unmodified lines
6436	6438	intel_encoder->enable = vlv_enable_dp;
6437	6439	intel_encoder->disable = vlv_disable_dp;
6438	6440	intel_encoder->post_disable = vlv_post_disable_dp;
6439		− } else if (INTEL_GEN(dev_priv) >= 5) {
6440		− intel_encoder->pre_enable = g4x_pre_enable_dp;
6441		− intel_encoder->enable = g4x_enable_dp;
6442		− intel_encoder->disable = ilk_disable_dp;
6443		− intel_encoder->post_disable = ilk_post_disable_dp;
6444	6441	} else {
6445	6442	intel_encoder->pre_enable = g4x_pre_enable_dp;
6446	6443	intel_encoder->enable = g4x_enable_dp;
6447	6444	intel_encoder->disable = g4x_disable_dp;
	6445	+ intel_encoder->post_disable = g4x_post_disable_dp;
6448	6446	}
6449	6447
6450	6448	intel_dig_port->dp.output_reg = output_reg;

drivers/gpu/drm/i915/intel_dp_mst.c+6−0

@@ -48,6 +48,9 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder, · 47 unmodified lines
48	48	bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc,
49	49	DP_DPCD_QUIRK_LIMITED_M_N);
50	50
	51	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	52	+ return false;
	53	+
51	54	pipe_config->has_pch_encoder = false;
52	55	bpp = 24;
53	56	if (intel_dp->compliance.test_data.bpc) {
@@ -366,6 +369,9 @@ intel_dp_mst_mode_valid(struct drm_connector *connector, · 312 unmodified lines
366	369	if (!intel_dp)
367	370	return MODE_ERROR;
368	371
	372	+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	373	+ return MODE_NO_DBLESCAN;
	374	+
369	375	max_link_clock = intel_dp_max_link_rate(intel_dp);
370	376	max_lanes = intel_dp_max_lane_count(intel_dp);
371	377

drivers/gpu/drm/i915/intel_drv.h+1−2

@@ -1388,8 +1388,7 @@ void hsw_fdi_link_train(struct intel_crtc *crtc, · 1387 unmodified lines
1388	1388	void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
1389	1389	bool intel_ddi_get_hw_state(struct intel_encoder encoder, enum pipe pipe);
1390	1390	void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state);
1391		−void intel_ddi_disable_transcoder_func(struct drm_i915_private *dev_priv,
1392		− enum transcoder cpu_transcoder);
	1391	+void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
1393	1392	void intel_ddi_enable_pipe_clock(const struct intel_crtc_state *crtc_state);
1394	1393	void intel_ddi_disable_pipe_clock(const struct intel_crtc_state *crtc_state);
1395	1394	struct intel_encoder *

drivers/gpu/drm/i915/intel_dsi.c+6−0

@@ -326,6 +326,9 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder, · 325 unmodified lines
326	326	conn_state->scaling_mode);
327	327	}
328	328
	329	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	330	+ return false;
	331	+
329	332	/* DSI uses short packets for sync events, so clear mode flags for DSI */
330	333	adjusted_mode->flags = 0;
331	334
@@ -1266,6 +1269,9 @@ intel_dsi_mode_valid(struct drm_connector *connector, · 934 unmodified lines
1266	1269
1267	1270	DRM_DEBUG_KMS("\n");
1268	1271
	1272	+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	1273	+ return MODE_NO_DBLESCAN;
	1274	+
1269	1275	if (fixed_mode) {
1270	1276	if (mode->hdisplay > fixed_mode->hdisplay)
1271	1277	return MODE_PANEL;

drivers/gpu/drm/i915/intel_dvo.c+6−0

@@ -219,6 +219,9 @@ intel_dvo_mode_valid(struct drm_connector *connector, · 218 unmodified lines
219	219	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
220	220	int target_clock = mode->clock;
221	221
	222	+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	223	+ return MODE_NO_DBLESCAN;
	224	+
222	225	/* XXX: Validate clock range */
223	226
224	227	if (fixed_mode) {
@@ -254,6 +257,9 @@ static bool intel_dvo_compute_config(struct intel_encoder *encoder, · 29 unmodified lines
254	257	if (fixed_mode)
255	258	intel_fixed_panel_mode(fixed_mode, adjusted_mode);
256	259
	260	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	261	+ return false;
	262	+
257	263	return true;
258	264	}
259	265

drivers/gpu/drm/i915/intel_hdmi.c+6−0

@@ -1557,6 +1557,9 @@ intel_hdmi_mode_valid(struct drm_connector *connector, · 1556 unmodified lines
1557	1557	bool force_dvi =
1558	1558	READ_ONCE(to_intel_digital_connector_state(connector->state)->force_audio) == HDMI_AUDIO_OFF_DVI;
1559	1559
	1560	+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	1561	+ return MODE_NO_DBLESCAN;
	1562	+
1560	1563	clock = mode->clock;
1561	1564
1562	1565	if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING)
@@ -1677,6 +1680,9 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder, · 114 unmodified lines
1677	1680	int desired_bpp;
1678	1681	bool force_dvi = intel_conn_state->force_audio == HDMI_AUDIO_OFF_DVI;
1679	1682
	1683	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	1684	+ return false;
	1685	+
1680	1686	pipe_config->has_hdmi_sink = !force_dvi && intel_hdmi->has_hdmi_sink;
1681	1687
1682	1688	if (pipe_config->has_hdmi_sink)

drivers/gpu/drm/i915/intel_lrc.c+13−5

@@ -1545,11 +1545,21 @@ static u32 gen9_init_indirectctx_bb(struct intel_engine_cs engine, u32 *batch) · 1544 unmodified lines
1545	1545	/* WaFlushCoherentL3CacheLinesAtContextSwitch:skl,bxt,glk */
1546	1546	batch = gen8_emit_flush_coherentl3_wa(engine, batch);
1547	1547
	1548	+ *batch++ = MI_LOAD_REGISTER_IMM(3);
	1549	+
1548	1550	/* WaDisableGatherAtSetShaderCommonSlice:skl,bxt,kbl,glk */
1549		− *batch++ = MI_LOAD_REGISTER_IMM(1);
1550	1551	*batch++ = i915_mmio_reg_offset(COMMON_SLICE_CHICKEN2);
1551	1552	*batch++ = _MASKED_BIT_DISABLE(
1552	1553	GEN9_DISABLE_GATHER_AT_SET_SHADER_COMMON_SLICE);
	1554	+
	1555	+ /* BSpec: 11391 */
	1556	+ *batch++ = i915_mmio_reg_offset(FF_SLICE_CHICKEN);
	1557	+ *batch++ = _MASKED_BIT_ENABLE(FF_SLICE_CHICKEN_CL_PROVOKING_VERTEX_FIX);
	1558	+
	1559	+ /* BSpec: 11299 */
	1560	+ *batch++ = i915_mmio_reg_offset(_3D_CHICKEN3);
	1561	+ *batch++ = _MASKED_BIT_ENABLE(_3D_CHICKEN_SF_PROVOKING_VERTEX_FIX);
	1562	+
1553	1563	*batch++ = MI_NOOP;
1554	1564
1555	1565	/* WaClearSlmSpaceAtContextSwitch:kbl */
@@ -2641,10 +2651,8 @@ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx, · 1085 unmodified lines
2641	2651	context_size += LRC_HEADER_PAGES * PAGE_SIZE;
2642	2652
2643	2653	ctx_obj = i915_gem_object_create(ctx->i915, context_size);
2644		− if (IS_ERR(ctx_obj)) {
2645		− ret = PTR_ERR(ctx_obj);
2646		− goto error_deref_obj;
2647		− }
	2654	+ if (IS_ERR(ctx_obj))
	2655	+ return PTR_ERR(ctx_obj);
2648	2656
2649	2657	vma = i915_vma_instance(ctx_obj, &ctx->i915->ggtt.base, NULL);
2650	2658	if (IS_ERR(vma)) {

drivers/gpu/drm/i915/intel_lvds.c+5−0

@@ -380,6 +380,8 @@ intel_lvds_mode_valid(struct drm_connector *connector, · 379 unmodified lines
380	380	struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
381	381	int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
382	382
	383	+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	384	+ return MODE_NO_DBLESCAN;
383	385	if (mode->hdisplay > fixed_mode->hdisplay)
384	386	return MODE_PANEL;
385	387	if (mode->vdisplay > fixed_mode->vdisplay)
@@ -429,6 +431,9 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder, · 43 unmodified lines
429	431	intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
430	432	adjusted_mode);
431	433
	434	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	435	+ return false;
	436	+
432	437	if (HAS_PCH_SPLIT(dev_priv)) {
433	438	pipe_config->has_pch_encoder = true;
434	439

drivers/gpu/drm/i915/intel_sdvo.c+6−0

@@ -1160,6 +1160,9 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder, · 1159 unmodified lines
1160	1160	adjusted_mode);
1161	1161	}
1162	1162
	1163	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	1164	+ return false;
	1165	+
1163	1166	/*
1164	1167	* Make the CRTC code factor in the SDVO pixel multiplier. The
1165	1168	* SDVO device will factor out the multiplier during mode_set.
@@ -1621,6 +1624,9 @@ intel_sdvo_mode_valid(struct drm_connector *connector, · 455 unmodified lines
1621	1624	struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1622	1625	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1623	1626
	1627	+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	1628	+ return MODE_NO_DBLESCAN;
	1629	+
1624	1630	if (intel_sdvo->pixel_clock_min > mode->clock)
1625	1631	return MODE_CLOCK_LOW;
1626	1632

drivers/gpu/drm/i915/intel_tv.c+10−2

@@ -850,6 +850,9 @@ intel_tv_mode_valid(struct drm_connector *connector, · 849 unmodified lines
850	850	const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
851	851	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
852	852
	853	+ if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	854	+ return MODE_NO_DBLESCAN;
	855	+
853	856	if (mode->clock > max_dotclk)
854	857	return MODE_CLOCK_HIGH;
855	858
@@ -877,16 +880,21 @@ intel_tv_compute_config(struct intel_encoder *encoder, · 21 unmodified lines
877	880	struct drm_connector_state *conn_state)
878	881	{
879	882	const struct tv_mode *tv_mode = intel_tv_mode_find(conn_state);
	883	+ struct drm_display_mode *adjusted_mode =
	884	+ &pipe_config->base.adjusted_mode;
880	885
881	886	if (!tv_mode)
882	887	return false;
883	888
884		− pipe_config->base.adjusted_mode.crtc_clock = tv_mode->clock;
	889	+ if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
	890	+ return false;
	891	+
	892	+ adjusted_mode->crtc_clock = tv_mode->clock;
885	893	DRM_DEBUG_KMS("forcing bpc to 8 for TV\n");
886	894	pipe_config->pipe_bpp = 8*3;
887	895
888	896	/* TV has it's own notion of sync and other mode flags, so clear them. */
889		− pipe_config->base.adjusted_mode.flags = 0;
	897	+ adjusted_mode->flags = 0;
890	898
891	899	/*
892	900	* FIXME: We don't check whether the input mode is actually what we want

drivers/gpu/drm/imx/imx-ldb.c+6−3

@@ -612,6 +612,9 @@ static int imx_ldb_bind(struct device dev, struct device master, void *data) · 611 unmodified lines
612	612	return PTR_ERR(imx_ldb->regmap);
613	613	}
614	614
	615	+ /* disable LDB by resetting the control register to POR default */
	616	+ regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
	617	+
615	618	imx_ldb->dev = dev;
616	619
617	620	if (of_id)
@@ -652,14 +655,14 @@ static int imx_ldb_bind(struct device dev, struct device master, void *data) · 34 unmodified lines
652	655	if (ret \|\| i < 0 \|\| i > 1)
653	656	return -EINVAL;
654	657
	658	+ if (!of_device_is_available(child))
	659	+ continue;
	660	+
655	661	if (dual && i > 0) {
656	662	dev_warn(dev, "dual-channel mode, ignoring second output\n");
657	663	continue;
658	664	}
659	665
660		− if (!of_device_is_available(child))
661		− continue;
662		−
663	666	channel = &imx_ldb->channel[i];
664	667	channel->ldb = imx_ldb;
665	668	channel->chno = i;

drivers/gpu/drm/meson/meson_drv.c+8−4

@@ -197,8 +197,10 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) · 196 unmodified lines
197	197	priv->io_base = regs;
198	198
199	199	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
200		− if (!res)
201		− return -EINVAL;
	200	+ if (!res) {
	201	+ ret = -EINVAL;
	202	+ goto free_drm;
	203	+ }
202	204	/* Simply ioremap since it may be a shared register zone */
203	205	regs = devm_ioremap(dev, res->start, resource_size(res));
204	206	if (!regs) {
@@ -215,8 +217,10 @@ static int meson_drv_bind_master(struct device *dev, bool has_components) · 10 unmodified lines
215	217	}
216	218
217	219	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dmc");
218		− if (!res)
219		− return -EINVAL;
	220	+ if (!res) {
	221	+ ret = -EINVAL;
	222	+ goto free_drm;
	223	+ }
220	224	/* Simply ioremap since it may be a shared register zone */
221	225	regs = devm_ioremap(dev, res->start, resource_size(res));
222	226	if (!regs) {

drivers/gpu/drm/nouveau/dispnv04/disp.c+3−0

@@ -55,6 +55,9 @@ nv04_display_create(struct drm_device *dev) · 54 unmodified lines
55	55	nouveau_display(dev)->init = nv04_display_init;
56	56	nouveau_display(dev)->fini = nv04_display_fini;
57	57
	58	+ /* Pre-nv50 doesn't support atomic, so don't expose the ioctls */
	59	+ dev->driver->driver_features &= ~DRIVER_ATOMIC;
	60	+
58	61	nouveau_hw_save_vga_fonts(dev, 1);
59	62
60	63	nv04_crtc_create(dev, 0);

drivers/gpu/drm/nouveau/dispnv50/curs507a.c+1−1

@@ -132,7 +132,7 @@ curs507a_new_(const struct nv50_wimm_func func, struct nouveau_drm drm, · 131 unmodified lines
132	132
133	133	nvif_object_map(&wndw->wimm.base.user, NULL, 0);
134	134	wndw->immd = func;
135		− wndw->ctxdma.parent = &disp->core->chan.base.user;
	135	+ wndw->ctxdma.parent = NULL;
136	136	return 0;
137	137	}
138	138

drivers/gpu/drm/nouveau/dispnv50/disp.c+27−26

@@ -1585,8 +1585,9 @@ nv50_pior_create(struct drm_connector connector, struct dcb_output dcbe) · 1584 unmodified lines
1585	1585	*****************************************************************************/
1586	1586
1587	1587	static void
1588		−nv50_disp_atomic_commit_core(struct nouveau_drm drm, u32 interlock)
	1588	+nv50_disp_atomic_commit_core(struct drm_atomic_state state, u32 interlock)
1589	1589	{
	1590	+ struct nouveau_drm *drm = nouveau_drm(state->dev);
1590	1591	struct nv50_disp *disp = nv50_disp(drm->dev);
1591	1592	struct nv50_core *core = disp->core;
1592	1593	struct nv50_mstm *mstm;
@@ -1617,6 +1618,22 @@ nv50_disp_atomic_commit_core(struct nouveau_drm drm, u32 interlock) · 24 unmodified lines
1617	1618	}
1618	1619	}
1619	1620
	1621	+static void
	1622	+nv50_disp_atomic_commit_wndw(struct drm_atomic_state state, u32 interlock)
	1623	+{
	1624	+ struct drm_plane_state *new_plane_state;
	1625	+ struct drm_plane *plane;
	1626	+ int i;
	1627	+
	1628	+ for_each_new_plane_in_state(state, plane, new_plane_state, i) {
	1629	+ struct nv50_wndw *wndw = nv50_wndw(plane);
	1630	+ if (interlock[wndw->interlock.type] & wndw->interlock.data) {
	1631	+ if (wndw->func->update)
	1632	+ wndw->func->update(wndw, interlock);
	1633	+ }
	1634	+ }
	1635	+}
	1636	+
1620	1637	static void
1621	1638	nv50_disp_atomic_commit_tail(struct drm_atomic_state *state)
1622	1639	{
@@ -1684,7 +1701,8 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state) · 61 unmodified lines
1684	1701	help->disable(encoder);
1685	1702	interlock[NV50_DISP_INTERLOCK_CORE] \|= 1;
1686	1703	if (outp->flush_disable) {
1687		− nv50_disp_atomic_commit_core(drm, interlock);
	1704	+ nv50_disp_atomic_commit_wndw(state, interlock);
	1705	+ nv50_disp_atomic_commit_core(state, interlock);
1688	1706	memset(interlock, 0x00, sizeof(interlock));
1689	1707	}
1690	1708	}
@@ -1693,15 +1711,8 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state) · 2 unmodified lines
1693	1711	/* Flush disable. */
1694	1712	if (interlock[NV50_DISP_INTERLOCK_CORE]) {
1695	1713	if (atom->flush_disable) {
1696		− for_each_new_plane_in_state(state, plane, new_plane_state, i) {
1697		− struct nv50_wndw *wndw = nv50_wndw(plane);
1698		− if (interlock[wndw->interlock.type] & wndw->interlock.data) {
1699		− if (wndw->func->update)
1700		− wndw->func->update(wndw, interlock);
1701		− }
1702		− }
1703		−
1704		− nv50_disp_atomic_commit_core(drm, interlock);
	1714	+ nv50_disp_atomic_commit_wndw(state, interlock);
	1715	+ nv50_disp_atomic_commit_core(state, interlock);
1705	1716	memset(interlock, 0x00, sizeof(interlock));
1706	1717	}
1707	1718	}
@@ -1762,18 +1773,14 @@ nv50_disp_atomic_commit_tail(struct drm_atomic_state *state) · 54 unmodified lines
1762	1773	}
1763	1774
1764	1775	/* Flush update. */
1765		− for_each_new_plane_in_state(state, plane, new_plane_state, i) {
1766		− struct nv50_wndw *wndw = nv50_wndw(plane);
1767		− if (interlock[wndw->interlock.type] & wndw->interlock.data) {
1768		− if (wndw->func->update)
1769		− wndw->func->update(wndw, interlock);
1770		− }
1771		− }
	1776	+ nv50_disp_atomic_commit_wndw(state, interlock);
1772	1777
1773	1778	if (interlock[NV50_DISP_INTERLOCK_CORE]) {
1774	1779	if (interlock[NV50_DISP_INTERLOCK_BASE] \|\|
	1780	+ interlock[NV50_DISP_INTERLOCK_OVLY] \|\|
	1781	+ interlock[NV50_DISP_INTERLOCK_WNDW] \|\|
1775	1782	!atom->state.legacy_cursor_update)
1776		− nv50_disp_atomic_commit_core(drm, interlock);
	1783	+ nv50_disp_atomic_commit_core(state, interlock);
1777	1784	else
1778	1785	disp->core->func->update(disp->core, interlock, false);
1779	1786	}
@@ -1871,7 +1878,7 @@ nv50_disp_atomic_commit(struct drm_device *dev, · 91 unmodified lines
1871	1878	nv50_disp_atomic_commit_tail(state);
1872	1879
1873	1880	drm_for_each_crtc(crtc, dev) {
1874		− if (crtc->state->enable) {
	1881	+ if (crtc->state->active) {
1875	1882	if (!drm->have_disp_power_ref) {
1876	1883	drm->have_disp_power_ref = true;
1877	1884	return 0;
@@ -2119,10 +2126,6 @@ nv50_display_destroy(struct drm_device *dev) · 241 unmodified lines
2119	2126	kfree(disp);
2120	2127	}
2121	2128
2122		−MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
2123		−static int nouveau_atomic = 0;
2124		−module_param_named(atomic, nouveau_atomic, int, 0400);
2125		−
2126	2129	int
2127	2130	nv50_display_create(struct drm_device *dev)
2128	2131	{
@@ -2147,8 +2150,6 @@ nv50_display_create(struct drm_device *dev) · 18 unmodified lines
2147	2150	disp->disp = &nouveau_display(dev)->disp;
2148	2151	dev->mode_config.funcs = &nv50_disp_func;
2149	2152	dev->driver->driver_features \|= DRIVER_PREFER_XBGR_30BPP;
2150		− if (nouveau_atomic)
2151		− dev->driver->driver_features \|= DRIVER_ATOMIC;
2152	2153
2153	2154	/* small shared memory area we use for notifiers and semaphores */
2154	2155	ret = nouveau_bo_new(&drm->client, 4096, 0x1000, TTM_PL_FLAG_VRAM,

drivers/gpu/drm/nouveau/dispnv50/wndw.c+8−5

@@ -444,14 +444,17 @@ nv50_wndw_prepare_fb(struct drm_plane plane, struct drm_plane_state state) · 443 unmodified lines
444	444	if (ret)
445	445	return ret;
446	446
447		− ctxdma = nv50_wndw_ctxdma_new(wndw, fb);
448		− if (IS_ERR(ctxdma)) {
449		− nouveau_bo_unpin(fb->nvbo);
450		− return PTR_ERR(ctxdma);
	447	+ if (wndw->ctxdma.parent) {
	448	+ ctxdma = nv50_wndw_ctxdma_new(wndw, fb);
	449	+ if (IS_ERR(ctxdma)) {
	450	+ nouveau_bo_unpin(fb->nvbo);
	451	+ return PTR_ERR(ctxdma);
	452	+ }
	453	+
	454	+ asyw->image.handle[0] = ctxdma->object.handle;
451	455	}
452	456
453	457	asyw->state.fence = reservation_object_get_excl_rcu(fb->nvbo->bo.resv);
454		− asyw->image.handle[0] = ctxdma->object.handle;
455	458	asyw->image.offset[0] = fb->nvbo->bo.offset;
456	459
457	460	if (wndw->func->prepare) {

drivers/gpu/drm/nouveau/nouveau_backlight.c+4−2

@@ -267,6 +267,7 @@ nouveau_backlight_init(struct drm_device *dev) · 266 unmodified lines
267	267	struct nouveau_drm *drm = nouveau_drm(dev);
268	268	struct nvif_device *device = &drm->client.device;
269	269	struct drm_connector *connector;
	270	+ struct drm_connector_list_iter conn_iter;
270	271
271	272	INIT_LIST_HEAD(&drm->bl_connectors);
272	273
@@ -275,7 +276,8 @@ nouveau_backlight_init(struct drm_device *dev) · 2 unmodified lines
275	276	return 0;
276	277	}
277	278
278		− list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	279	+ drm_connector_list_iter_begin(dev, &conn_iter);
	280	+ drm_for_each_connector_iter(connector, &conn_iter) {
279	281	if (connector->connector_type != DRM_MODE_CONNECTOR_LVDS &&
280	282	connector->connector_type != DRM_MODE_CONNECTOR_eDP)
281	283	continue;
@@ -292,7 +294,7 @@ nouveau_backlight_init(struct drm_device *dev) · 10 unmodified lines
292	294	break;
293	295	}
294	296	}
295		−
	297	+ drm_connector_list_iter_end(&conn_iter);
296	298
297	299	return 0;
298	300	}

drivers/gpu/drm/nouveau/nouveau_connector.c+7−2

@@ -1208,14 +1208,19 @@ nouveau_connector_create(struct drm_device *dev, int index) · 1207 unmodified lines
1208	1208	struct nouveau_display *disp = nouveau_display(dev);
1209	1209	struct nouveau_connector *nv_connector = NULL;
1210	1210	struct drm_connector *connector;
	1211	+ struct drm_connector_list_iter conn_iter;
1211	1212	int type, ret = 0;
1212	1213	bool dummy;
1213	1214
1214		− list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	1215	+ drm_connector_list_iter_begin(dev, &conn_iter);
	1216	+ nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
1215	1217	nv_connector = nouveau_connector(connector);
1216		− if (nv_connector->index == index)
	1218	+ if (nv_connector->index == index) {
	1219	+ drm_connector_list_iter_end(&conn_iter);
1217	1220	return connector;
	1221	+ }
1218	1222	}
	1223	+ drm_connector_list_iter_end(&conn_iter);
1219	1224
1220	1225	nv_connector = kzalloc(sizeof(*nv_connector), GFP_KERNEL);
1221	1226	if (!nv_connector)

drivers/gpu/drm/nouveau/nouveau_connector.h+32−4

@@ -33,6 +33,7 @@ · 32 unmodified lines
33	33	#include <drm/drm_encoder.h>
34	34	#include <drm/drm_dp_helper.h>
35	35	#include "nouveau_crtc.h"
	36	+#include "nouveau_encoder.h"
36	37
37	38	struct nvkm_i2c_port;
38	39
@@ -60,19 +61,46 @@ static inline struct nouveau_connector *nouveau_connector( · 21 unmodified lines
60	61	return container_of(con, struct nouveau_connector, base);
61	62	}
62	63
	64	+static inline bool
	65	+nouveau_connector_is_mst(struct drm_connector *connector)
	66	+{
	67	+ const struct nouveau_encoder *nv_encoder;
	68	+ const struct drm_encoder *encoder;
	69	+
	70	+ if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
	71	+ return false;
	72	+
	73	+ nv_encoder = find_encoder(connector, DCB_OUTPUT_ANY);
	74	+ if (!nv_encoder)
	75	+ return false;
	76	+
	77	+ encoder = &nv_encoder->base.base;
	78	+ return encoder->encoder_type == DRM_MODE_ENCODER_DPMST;
	79	+}
	80	+
	81	+#define nouveau_for_each_non_mst_connector_iter(connector, iter) \
	82	+ drm_for_each_connector_iter(connector, iter) \
	83	+ for_each_if(!nouveau_connector_is_mst(connector))
	84	+
63	85	static inline struct nouveau_connector *
64	86	nouveau_crtc_connector_get(struct nouveau_crtc *nv_crtc)
65	87	{
66	88	struct drm_device *dev = nv_crtc->base.dev;
67	89	struct drm_connector *connector;
	90	+ struct drm_connector_list_iter conn_iter;
	91	+ struct nouveau_connector *nv_connector = NULL;
68	92	struct drm_crtc *crtc = to_drm_crtc(nv_crtc);
69	93
70		− list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
71		− if (connector->encoder && connector->encoder->crtc == crtc)
72		− return nouveau_connector(connector);
	94	+ drm_connector_list_iter_begin(dev, &conn_iter);
	95	+ nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
	96	+ if (connector->encoder && connector->encoder->crtc == crtc) {
	97	+ nv_connector = nouveau_connector(connector);
	98	+ break;
	99	+ }
73	100	}
	101	+ drm_connector_list_iter_end(&conn_iter);
74	102
75		− return NULL;
	103	+ return nv_connector;
76	104	}
77	105
78	106	struct drm_connector *

drivers/gpu/drm/nouveau/nouveau_display.c+8−2

@@ -404,6 +404,7 @@ nouveau_display_init(struct drm_device *dev) · 403 unmodified lines
404	404	struct nouveau_display *disp = nouveau_display(dev);
405	405	struct nouveau_drm *drm = nouveau_drm(dev);
406	406	struct drm_connector *connector;
	407	+ struct drm_connector_list_iter conn_iter;
407	408	int ret;
408	409
409	410	ret = disp->init(dev);
@@ -411,10 +412,12 @@ nouveau_display_init(struct drm_device *dev) · 1 unmodified line
411	412	return ret;
412	413
413	414	/* enable hotplug interrupts */
414		− list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	415	+ drm_connector_list_iter_begin(dev, &conn_iter);
	416	+ nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
415	417	struct nouveau_connector *conn = nouveau_connector(connector);
416	418	nvif_notify_get(&conn->hpd);
417	419	}
	420	+ drm_connector_list_iter_end(&conn_iter);
418	421
419	422	/* enable flip completion events */
420	423	nvif_notify_get(&drm->flip);
@@ -427,6 +430,7 @@ nouveau_display_fini(struct drm_device *dev, bool suspend) · 6 unmodified lines
427	430	struct nouveau_display *disp = nouveau_display(dev);
428	431	struct nouveau_drm *drm = nouveau_drm(dev);
429	432	struct drm_connector *connector;
	433	+ struct drm_connector_list_iter conn_iter;
430	434
431	435	if (!suspend) {
432	436	if (drm_drv_uses_atomic_modeset(dev))
@@ -439,10 +443,12 @@ nouveau_display_fini(struct drm_device *dev, bool suspend) · 6 unmodified lines
439	443	nvif_notify_put(&drm->flip);
440	444
441	445	/* disable hotplug interrupts */
442		− list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	446	+ drm_connector_list_iter_begin(dev, &conn_iter);
	447	+ nouveau_for_each_non_mst_connector_iter(connector, &conn_iter) {
443	448	struct nouveau_connector *conn = nouveau_connector(connector);
444	449	nvif_notify_put(&conn->hpd);
445	450	}
	451	+ drm_connector_list_iter_end(&conn_iter);
446	452
447	453	drm_kms_helper_poll_disable(dev);
448	454	disp->fini(dev);

drivers/gpu/drm/nouveau/nouveau_drm.c+7−11

@@ -81,6 +81,10 @@ MODULE_PARM_DESC(modeset, "enable driver (default: auto, " · 80 unmodified lines
81	81	int nouveau_modeset = -1;
82	82	module_param_named(modeset, nouveau_modeset, int, 0400);
83	83
	84	+MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
	85	+static int nouveau_atomic = 0;
	86	+module_param_named(atomic, nouveau_atomic, int, 0400);
	87	+
84	88	MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
85	89	static int nouveau_runtime_pm = -1;
86	90	module_param_named(runpm, nouveau_runtime_pm, int, 0400);
@@ -509,6 +513,9 @@ static int nouveau_drm_probe(struct pci_dev *pdev, · 422 unmodified lines
509	513
510	514	pci_set_master(pdev);
511	515
	516	+ if (nouveau_atomic)
	517	+ driver_pci.driver_features \|= DRIVER_ATOMIC;
	518	+
512	519	ret = drm_get_pci_dev(pdev, pent, &driver_pci);
513	520	if (ret) {
514	521	nvkm_device_del(&device);
@@ -874,22 +881,11 @@ nouveau_pmops_runtime_resume(struct device *dev) · 359 unmodified lines
874	881	static int
875	882	nouveau_pmops_runtime_idle(struct device *dev)
876	883	{
877		− struct pci_dev *pdev = to_pci_dev(dev);
878		− struct drm_device *drm_dev = pci_get_drvdata(pdev);
879		− struct nouveau_drm *drm = nouveau_drm(drm_dev);
880		− struct drm_crtc *crtc;
881		−
882	884	if (!nouveau_pmops_runtime()) {
883	885	pm_runtime_forbid(dev);
884	886	return -EBUSY;
885	887	}
886	888
887		− list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
888		− if (crtc->enabled) {
889		− DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
890		− return -EBUSY;
891		− }
892		− }
893	889	pm_runtime_mark_last_busy(dev);
894	890	pm_runtime_autosuspend(dev);
895	891	/* we don't want the main rpm_idle to call suspend - we want to autosuspend */

drivers/gpu/drm/nouveau/nouveau_gem.c+2−2

@@ -616,7 +616,7 @@ nouveau_gem_pushbuf_reloc_apply(struct nouveau_cli *cli, · 615 unmodified lines
616	616	struct nouveau_bo *nvbo;
617	617	uint32_t data;
618	618
619		− if (unlikely(r->bo_index > req->nr_buffers)) {
	619	+ if (unlikely(r->bo_index >= req->nr_buffers)) {
620	620	NV_PRINTK(err, cli, "reloc bo index invalid\n");
621	621	ret = -EINVAL;
622	622	break;
@@ -626,7 +626,7 @@ nouveau_gem_pushbuf_reloc_apply(struct nouveau_cli *cli, · 3 unmodified lines
626	626	if (b->presumed.valid)
627	627	continue;
628	628
629		− if (unlikely(r->reloc_bo_index > req->nr_buffers)) {
	629	+ if (unlikely(r->reloc_bo_index >= req->nr_buffers)) {
630	630	NV_PRINTK(err, cli, "reloc container bo index invalid\n");
631	631	ret = -EINVAL;
632	632	break;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/base.c+3−0

@@ -140,6 +140,9 @@ nvkm_fb_init(struct nvkm_subdev *subdev) · 139 unmodified lines
140	140	if (fb->func->init)
141	141	fb->func->init(fb);
142	142
	143	+ if (fb->func->init_remapper)
	144	+ fb->func->init_remapper(fb);
	145	+
143	146	if (fb->func->init_page) {
144	147	ret = fb->func->init_page(fb);
145	148	if (WARN_ON(ret))

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp100.c+9−0

@@ -36,6 +36,14 @@ gp100_fb_init_unkn(struct nvkm_fb *base) · 35 unmodified lines
36	36	nvkm_wr32(device, 0x1faccc, nvkm_rd32(device, 0x100ccc));
37	37	}
38	38
	39	+void
	40	+gp100_fb_init_remapper(struct nvkm_fb *fb)
	41	+{
	42	+ struct nvkm_device *device = fb->subdev.device;
	43	+ /* Disable address remapper. */
	44	+ nvkm_mask(device, 0x100c14, 0x00040000, 0x00000000);
	45	+}
	46	+
39	47	void
40	48	gp100_fb_init(struct nvkm_fb *base)
41	49	{
@@ -56,6 +64,7 @@ gp100_fb = { · 14 unmodified lines
56	64	.dtor = gf100_fb_dtor,
57	65	.oneinit = gf100_fb_oneinit,
58	66	.init = gp100_fb_init,
	67	+ .init_remapper = gp100_fb_init_remapper,
59	68	.init_page = gm200_fb_init_page,
60	69	.init_unkn = gp100_fb_init_unkn,
61	70	.ram_new = gp100_ram_new,

drivers/gpu/drm/nouveau/nvkm/subdev/fb/gp102.c+1−0

@@ -31,6 +31,7 @@ gp102_fb = { · 30 unmodified lines
31	31	.dtor = gf100_fb_dtor,
32	32	.oneinit = gf100_fb_oneinit,
33	33	.init = gp100_fb_init,
	34	+ .init_remapper = gp100_fb_init_remapper,
34	35	.init_page = gm200_fb_init_page,
35	36	.ram_new = gp100_ram_new,
36	37	};

drivers/gpu/drm/nouveau/nvkm/subdev/fb/priv.h+2−0

@@ -11,6 +11,7 @@ struct nvkm_fb_func { · 10 unmodified lines
11	11	u32 (tags)(struct nvkm_fb );
12	12	int (oneinit)(struct nvkm_fb );
13	13	void (init)(struct nvkm_fb );
	14	+ void (init_remapper)(struct nvkm_fb );
14	15	int (init_page)(struct nvkm_fb );
15	16	void (init_unkn)(struct nvkm_fb );
16	17	void (intr)(struct nvkm_fb );
@@ -69,5 +70,6 @@ int gf100_fb_init_page(struct nvkm_fb *); · 52 unmodified lines
69	70
70	71	int gm200_fb_init_page(struct nvkm_fb *);
71	72
	73	+void gp100_fb_init_remapper(struct nvkm_fb *);
72	74	void gp100_fb_init_unkn(struct nvkm_fb *);
73	75	#endif

drivers/gpu/drm/qxl/qxl_display.c+5−2

@@ -623,7 +623,7 @@ static void qxl_cursor_atomic_update(struct drm_plane *plane, · 622 unmodified lines
623	623	struct qxl_cursor_cmd *cmd;
624	624	struct qxl_cursor *cursor;
625	625	struct drm_gem_object *obj;
626		− struct qxl_bo cursor_bo = NULL, user_bo = NULL;
	626	+ struct qxl_bo cursor_bo = NULL, user_bo = NULL, *old_cursor_bo = NULL;
627	627	int ret;
628	628	void *user_ptr;
629	629	int size = 64644;
@@ -677,7 +677,7 @@ static void qxl_cursor_atomic_update(struct drm_plane *plane, · 47 unmodified lines
677	677	cursor_bo, 0);
678	678	cmd->type = QXL_CURSOR_SET;
679	679
680		− qxl_bo_unref(&qcrtc->cursor_bo);
	680	+ old_cursor_bo = qcrtc->cursor_bo;
681	681	qcrtc->cursor_bo = cursor_bo;
682	682	cursor_bo = NULL;
683	683	} else {
@@ -697,6 +697,9 @@ static void qxl_cursor_atomic_update(struct drm_plane *plane, · 13 unmodified lines
697	697	qxl_push_cursor_ring_release(qdev, release, QXL_CMD_CURSOR, false);
698	698	qxl_release_fence_buffer_objects(release);
699	699
	700	+ if (old_cursor_bo)
	701	+ qxl_bo_unref(&old_cursor_bo);
	702	+
700	703	qxl_bo_unref(&cursor_bo);
701	704
702	705	return;

drivers/gpu/drm/sun4i/Makefile+4−1

@@ -32,7 +32,10 @@ obj-$(CONFIG_DRM_SUN4I) += sun4i-tcon.o · 31 unmodified lines
32	32	obj-$(CONFIG_DRM_SUN4I) += sun4i_tv.o
33	33	obj-$(CONFIG_DRM_SUN4I) += sun6i_drc.o
34	34
35		−obj-$(CONFIG_DRM_SUN4I_BACKEND) += sun4i-backend.o sun4i-frontend.o
	35	+obj-$(CONFIG_DRM_SUN4I_BACKEND) += sun4i-backend.o
	36	+ifdef CONFIG_DRM_SUN4I_BACKEND
	37	+obj-$(CONFIG_DRM_SUN4I) += sun4i-frontend.o
	38	+endif
36	39	obj-$(CONFIG_DRM_SUN4I_HDMI) += sun4i-drm-hdmi.o
37	40	obj-$(CONFIG_DRM_SUN6I_DSI) += sun6i-dsi.o
38	41	obj-$(CONFIG_DRM_SUN8I_DW_HDMI) += sun8i-drm-hdmi.o

drivers/gpu/drm/sun4i/sun4i_tcon.c+0−25

@@ -17,7 +17,6 @@ · 16 unmodified lines
17	17	#include <drm/drm_encoder.h>
18	18	#include <drm/drm_modes.h>
19	19	#include <drm/drm_of.h>
20		−#include <drm/drm_panel.h>
21	20
22	21	#include <uapi/drm/drm_mode.h>
23	22
@@ -418,9 +417,6 @@ static void sun4i_tcon0_mode_set_lvds(struct sun4i_tcon *tcon, · 394 unmodified lines
418	417	static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon,
419	418	const struct drm_display_mode *mode)
420	419	{
421		− struct drm_panel *panel = tcon->panel;
422		− struct drm_connector *connector = panel->connector;
423		− struct drm_display_info display_info = connector->display_info;
424	420	unsigned int bp, hsync, vsync;
425	421	u8 clk_delay;
426	422	u32 val = 0;
@@ -478,27 +474,6 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, · 51 unmodified lines
478	474	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
479	475	val \|= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;
480	476
481		− /*
482		− * On A20 and similar SoCs, the only way to achieve Positive Edge
483		− * (Rising Edge), is setting dclk clock phase to 2/3(240°).
484		− * By default TCON works in Negative Edge(Falling Edge),
485		− * this is why phase is set to 0 in that case.
486		− * Unfortunately there's no way to logically invert dclk through
487		− * IO_POL register.
488		− * The only acceptable way to work, triple checked with scope,
489		− * is using clock phase set to 0° for Negative Edge and set to 240°
490		− * for Positive Edge.
491		− * On A33 and similar SoCs there would be a 90° phase option,
492		− * but it divides also dclk by 2.
493		− * Following code is a way to avoid quirks all around TCON
494		− * and DOTCLOCK drivers.
495		− */
496		− if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)
497		− clk_set_phase(tcon->dclk, 240);
498		−
499		− if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE)
500		− clk_set_phase(tcon->dclk, 0);
501		−
502	477	regmap_update_bits(tcon->regs, SUN4I_TCON0_IO_POL_REG,
503	478	SUN4I_TCON0_IO_POL_HSYNC_POSITIVE \| SUN4I_TCON0_IO_POL_VSYNC_POSITIVE,
504	479	val);

drivers/gpu/drm/tegra/drm.c+1−1

@@ -398,7 +398,7 @@ int tegra_drm_submit(struct tegra_drm_context *context, · 397 unmodified lines
398	398	* unaligned offset is malformed and cause commands stream
399	399	* corruption on the buffer address relocation.
400	400	*/
401		− if (offset & 3 \|\| offset >= obj->gem.size) {
	401	+ if (offset & 3 \|\| offset > obj->gem.size) {
402	402	err = -EINVAL;
403	403	goto fail;
404	404	}

drivers/gpu/drm/udl/udl_fb.c+4−1

@@ -137,7 +137,10 @@ int udl_handle_damage(struct udl_framebuffer *fb, int x, int y, · 136 unmodified lines
137	137
138	138	if (cmd > (char *) urb->transfer_buffer) {
139	139	/* Send partial buffer remaining before exiting */
140		− int len = cmd - (char *) urb->transfer_buffer;
	140	+ int len;
	141	+ if (cmd < (char *) urb->transfer_buffer + urb->transfer_buffer_length)
	142	+ *cmd++ = 0xAF;
	143	+ len = cmd - (char *) urb->transfer_buffer;
141	144	ret = udl_submit_urb(dev, urb, len);
142	145	bytes_sent += len;
143	146	} else

drivers/gpu/drm/udl/udl_transfer.c+7−4

@@ -153,11 +153,11 @@ static void udl_compress_hline16( · 152 unmodified lines
153	153	raw_pixels_count_byte = cmd++; /* we'll know this later */
154	154	raw_pixel_start = pixel;
155	155
156		− cmd_pixel_end = pixel + (min(MAX_CMD_PIXELS + 1,
157		− min((int)(pixel_end - pixel) / bpp,
158		− (int)(cmd_buffer_end - cmd) / 2))) * bpp;
	156	+ cmd_pixel_end = pixel + min3(MAX_CMD_PIXELS + 1UL,
	157	+ (unsigned long)(pixel_end - pixel) / bpp,
	158	+ (unsigned long)(cmd_buffer_end - 1 - cmd) / 2) * bpp;
159	159
160		− prefetch_range((void ) pixel, (cmd_pixel_end - pixel) bpp);
	160	+ prefetch_range((void *) pixel, cmd_pixel_end - pixel);
161	161	pixel_val16 = get_pixel_val16(pixel, bpp);
162	162
163	163	while (pixel < cmd_pixel_end) {
@@ -193,6 +193,9 @@ static void udl_compress_hline16( · 29 unmodified lines
193	193	if (pixel > raw_pixel_start) {
194	194	/* finalize last RAW span */
195	195	*raw_pixels_count_byte = ((pixel-raw_pixel_start) / bpp) & 0xFF;
	196	+ } else {
	197	+ /* undo unused byte */
	198	+ cmd--;
196	199	}
197	200
198	201	*cmd_pixels_count_byte = ((pixel - cmd_pixel_start) / bpp) & 0xFF;

drivers/gpu/drm/vc4/vc4_plane.c+3−0

@@ -320,6 +320,9 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) · 319 unmodified lines
320	320	vc4_state->x_scaling[0] = VC4_SCALING_TPZ;
321	321	if (vc4_state->y_scaling[0] == VC4_SCALING_NONE)
322	322	vc4_state->y_scaling[0] = VC4_SCALING_TPZ;
	323	+ } else {
	324	+ vc4_state->x_scaling[1] = VC4_SCALING_NONE;
	325	+ vc4_state->y_scaling[1] = VC4_SCALING_NONE;
323	326	}
324	327
325	328	vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&

drivers/gpu/host1x/dev.c+3−0

@@ -218,6 +218,9 @@ static int host1x_probe(struct platform_device *pdev) · 217 unmodified lines
218	218	return err;
219	219	}
220	220
	221	+ if (IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL))
	222	+ goto skip_iommu;
	223	+
221	224	host->group = iommu_group_get(&pdev->dev);
222	225	if (host->group) {
223	226	struct iommu_domain_geometry *geometry;

drivers/gpu/host1x/job.c+2−1

@@ -569,7 +569,8 @@ void host1x_job_unpin(struct host1x_job *job) · 568 unmodified lines
569	569	for (i = 0; i < job->num_unpins; i++) {
570	570	struct host1x_job_unpin_data *unpin = &job->unpins[i];
571	571
572		− if (!IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) && host->domain) {
	572	+ if (!IS_ENABLED(CONFIG_TEGRA_HOST1X_FIREWALL) &&
	573	+ unpin->size && host->domain) {
573	574	iommu_unmap(host->domain, job->addr_phys[i],
574	575	unpin->size);
575	576	free_iova(&host->iova,

drivers/gpu/ipu-v3/ipu-csi.c+2−1

@@ -339,7 +339,8 @@ static void fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg, · 338 unmodified lines
339	339	break;
340	340	case V4L2_MBUS_BT656:
341	341	csicfg->ext_vsync = 0;
342		− if (V4L2_FIELD_HAS_BOTH(mbus_fmt->field))
	342	+ if (V4L2_FIELD_HAS_BOTH(mbus_fmt->field) \|\|
	343	+ mbus_fmt->field == V4L2_FIELD_ALTERNATE)
343	344	csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_INTERLACED;
344	345	else
345	346	csicfg->clk_mode = IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE;

drivers/hid/hid-core.c+4−1

@@ -1952,6 +1952,8 @@ static int hid_device_probe(struct device *dev) · 1951 unmodified lines
1952	1952	}
1953	1953	hdev->io_started = false;
1954	1954
	1955	+ clear_bit(ffs(HID_STAT_REPROBED), &hdev->status);
	1956	+
1955	1957	if (!hdev->driver) {
1956	1958	id = hid_match_device(hdev, hdrv);
1957	1959	if (id == NULL) {
@@ -2215,7 +2217,8 @@ static int __hid_bus_reprobe_drivers(struct device dev, void data) · 257 unmodified lines
2215	2217	struct hid_device *hdev = to_hid_device(dev);
2216	2218
2217	2219	if (hdev->driver == hdrv &&
2218		− !hdrv->match(hdev, hid_ignore_special_drivers))
	2220	+ !hdrv->match(hdev, hid_ignore_special_drivers) &&
	2221	+ !test_and_set_bit(ffs(HID_STAT_REPROBED), &hdev->status))
2219	2222	return device_reprobe(dev);
2220	2223
2221	2224	return 0;

drivers/hid/hid-debug.c+7−1

@@ -1154,6 +1154,8 @@ copy_rest: · 1153 unmodified lines
1154	1154	goto out;
1155	1155	if (list->tail > list->head) {
1156	1156	len = list->tail - list->head;
	1157	+ if (len > count)
	1158	+ len = count;
1157	1159
1158	1160	if (copy_to_user(buffer + ret, &list->hid_debug_buf[list->head], len)) {
1159	1161	ret = -EFAULT;
@@ -1163,6 +1165,8 @@ copy_rest: · 3 unmodified lines
1163	1165	list->head += len;
1164	1166	} else {
1165	1167	len = HID_DEBUG_BUFSIZE - list->head;
	1168	+ if (len > count)
	1169	+ len = count;
1166	1170
1167	1171	if (copy_to_user(buffer, &list->hid_debug_buf[list->head], len)) {
1168	1172	ret = -EFAULT;
@@ -1170,7 +1174,9 @@ copy_rest: · 1 unmodified line
1170	1174	}
1171	1175	list->head = 0;
1172	1176	ret += len;
1173		− goto copy_rest;
	1177	+ count -= len;
	1178	+ if (count > 0)
	1179	+ goto copy_rest;
1174	1180	}
1175	1181
1176	1182	}

drivers/hid/hid-google-hammer.c+2−0

@@ -124,6 +124,8 @@ static const struct hid_device_id hammer_devices[] = { · 123 unmodified lines
124	124	USB_VENDOR_ID_GOOGLE, USB_DEVICE_ID_GOOGLE_STAFF) },
125	125	{ HID_DEVICE(BUS_USB, HID_GROUP_GENERIC,
126	126	USB_VENDOR_ID_GOOGLE, USB_DEVICE_ID_GOOGLE_WAND) },
	127	+ { HID_DEVICE(BUS_USB, HID_GROUP_GENERIC,
	128	+ USB_VENDOR_ID_GOOGLE, USB_DEVICE_ID_GOOGLE_WHISKERS) },
127	129	{ }
128	130	};
129	131	MODULE_DEVICE_TABLE(hid, hammer_devices);

drivers/hid/hid-ids.h+1−0

@@ -452,6 +452,7 @@ · 451 unmodified lines
452	452	#define USB_DEVICE_ID_GOOGLE_TOUCH_ROSE 0x5028
453	453	#define USB_DEVICE_ID_GOOGLE_STAFF 0x502b
454	454	#define USB_DEVICE_ID_GOOGLE_WAND 0x502d
	455	+#define USB_DEVICE_ID_GOOGLE_WHISKERS 0x5030
455	456
456	457	#define USB_VENDOR_ID_GOTOP 0x08f2
457	458	#define USB_DEVICE_ID_SUPER_Q2 0x007f

drivers/hid/hid-steam.c+5−5

@@ -573,7 +573,7 @@ static bool steam_is_valve_interface(struct hid_device *hdev) · 572 unmodified lines
573	573
574	574	static int steam_client_ll_parse(struct hid_device *hdev)
575	575	{
576		− struct steam_device *steam = hid_get_drvdata(hdev);
	576	+ struct steam_device *steam = hdev->driver_data;
577	577
578	578	return hid_parse_report(hdev, steam->hdev->dev_rdesc,
579	579	steam->hdev->dev_rsize);
@@ -590,7 +590,7 @@ static void steam_client_ll_stop(struct hid_device *hdev) · 10 unmodified lines
590	590
591	591	static int steam_client_ll_open(struct hid_device *hdev)
592	592	{
593		− struct steam_device *steam = hid_get_drvdata(hdev);
	593	+ struct steam_device *steam = hdev->driver_data;
594	594	int ret;
595	595
596	596	ret = hid_hw_open(steam->hdev);
@@ -605,7 +605,7 @@ static int steam_client_ll_open(struct hid_device *hdev) · 8 unmodified lines
605	605
606	606	static void steam_client_ll_close(struct hid_device *hdev)
607	607	{
608		− struct steam_device *steam = hid_get_drvdata(hdev);
	608	+ struct steam_device *steam = hdev->driver_data;
609	609
610	610	mutex_lock(&steam->mutex);
611	611	steam->client_opened = false;
@@ -623,7 +623,7 @@ static int steam_client_ll_raw_request(struct hid_device *hdev, · 11 unmodified lines
623	623	size_t count, unsigned char report_type,
624	624	int reqtype)
625	625	{
626		− struct steam_device *steam = hid_get_drvdata(hdev);
	626	+ struct steam_device *steam = hdev->driver_data;
627	627
628	628	return hid_hw_raw_request(steam->hdev, reportnum, buf, count,
629	629	report_type, reqtype);
@@ -710,7 +710,7 @@ static int steam_probe(struct hid_device *hdev, · 80 unmodified lines
710	710	ret = PTR_ERR(steam->client_hdev);
711	711	goto client_hdev_fail;
712	712	}
713		− hid_set_drvdata(steam->client_hdev, steam);
	713	+ steam->client_hdev->driver_data = steam;
714	714
715	715	/*
716	716	* With the real steam controller interface, do not connect hidraw.

drivers/hid/i2c-hid/i2c-hid.c+1−1

@@ -484,7 +484,7 @@ static void i2c_hid_get_input(struct i2c_hid *ihid) · 483 unmodified lines
484	484	return;
485	485	}
486	486
487		− if ((ret_size > size) \|\| (ret_size <= 2)) {
	487	+ if ((ret_size > size) \|\| (ret_size < 2)) {
488	488	dev_err(&ihid->client->dev, "%s: incomplete report (%d/%d)\n",
489	489	__func__, size, ret_size);
490	490	return;

drivers/hid/intel-ish-hid/ipc/pci-ish.c+7−15

@@ -205,8 +205,7 @@ static void ish_remove(struct pci_dev *pdev) · 204 unmodified lines
205	205	kfree(ishtp_dev);
206	206	}
207	207
208		−#ifdef CONFIG_PM
209		−static struct device *ish_resume_device;
	208	+static struct device __maybe_unused *ish_resume_device;
210	209
211	210	/* 50ms to get resume response */
212	211	#define WAIT_FOR_RESUME_ACK_MS 50
@@ -220,7 +219,7 @@ static struct device *ish_resume_device; · 7 unmodified lines
220	219	* in that case a simple resume message is enough, others we need
221	220	* a reset sequence.
222	221	*/
223		−static void ish_resume_handler(struct work_struct *work)
	222	+static void __maybe_unused ish_resume_handler(struct work_struct *work)
224	223	{
225	224	struct pci_dev *pdev = to_pci_dev(ish_resume_device);
226	225	struct ishtp_device *dev = pci_get_drvdata(pdev);
@@ -262,7 +261,7 @@ static void ish_resume_handler(struct work_struct *work) · 35 unmodified lines
262	261	*
263	262	* Return: 0 to the pm core
264	263	*/
265		−static int ish_suspend(struct device *device)
	264	+static int __maybe_unused ish_suspend(struct device *device)
266	265	{
267	266	struct pci_dev *pdev = to_pci_dev(device);
268	267	struct ishtp_device *dev = pci_get_drvdata(pdev);
@@ -288,7 +287,7 @@ static int ish_suspend(struct device *device) · 19 unmodified lines
288	287	return 0;
289	288	}
290	289
291		−static DECLARE_WORK(resume_work, ish_resume_handler);
	290	+static __maybe_unused DECLARE_WORK(resume_work, ish_resume_handler);
292	291	/**
293	292	* ish_resume() - ISH resume callback
294	293	* @device: device pointer
@@ -297,7 +296,7 @@ static DECLARE_WORK(resume_work, ish_resume_handler); · 2 unmodified lines
297	296	*
298	297	* Return: 0 to the pm core
299	298	*/
300		−static int ish_resume(struct device *device)
	299	+static int __maybe_unused ish_resume(struct device *device)
301	300	{
302	301	struct pci_dev *pdev = to_pci_dev(device);
303	302	struct ishtp_device *dev = pci_get_drvdata(pdev);
@@ -311,21 +310,14 @@ static int ish_resume(struct device *device) · 7 unmodified lines
311	310	return 0;
312	311	}
313	312
314		−static const struct dev_pm_ops ish_pm_ops = {
315		− .suspend = ish_suspend,
316		− .resume = ish_resume,
317		−};
318		−#define ISHTP_ISH_PM_OPS (&ish_pm_ops)
319		−#else
320		−#define ISHTP_ISH_PM_OPS NULL
321		−#endif /* CONFIG_PM */
	313	+static SIMPLE_DEV_PM_OPS(ish_pm_ops, ish_suspend, ish_resume);
322	314
323	315	static struct pci_driver ish_driver = {
324	316	.name = KBUILD_MODNAME,
325	317	.id_table = ish_pci_tbl,
326	318	.probe = ish_probe,
327	319	.remove = ish_remove,
328		− .driver.pm = ISHTP_ISH_PM_OPS,
	320	+ .driver.pm = &ish_pm_ops,
329	321	};
330	322
331	323	module_pci_driver(ish_driver);

drivers/hid/usbhid/hiddev.c+11−0

@@ -36,6 +36,7 @@ · 35 unmodified lines
36	36	#include <linux/hiddev.h>
37	37	#include <linux/compat.h>
38	38	#include <linux/vmalloc.h>
	39	+#include <linux/nospec.h>
39	40	#include "usbhid.h"
40	41
41	42	#ifdef CONFIG_USB_DYNAMIC_MINORS
@@ -469,10 +470,14 @@ static noinline int hiddev_ioctl_usage(struct hiddev *hiddev, unsigned int cmd, · 427 unmodified lines
469	470
470	471	if (uref->field_index >= report->maxfield)
471	472	goto inval;
	473	+ uref->field_index = array_index_nospec(uref->field_index,
	474	+ report->maxfield);
472	475
473	476	field = report->field[uref->field_index];
474	477	if (uref->usage_index >= field->maxusage)
475	478	goto inval;
	479	+ uref->usage_index = array_index_nospec(uref->usage_index,
	480	+ field->maxusage);
476	481
477	482	uref->usage_code = field->usage[uref->usage_index].hid;
478	483
@@ -499,6 +504,8 @@ static noinline int hiddev_ioctl_usage(struct hiddev *hiddev, unsigned int cmd, · 20 unmodified lines
499	504
500	505	if (uref->field_index >= report->maxfield)
501	506	goto inval;
	507	+ uref->field_index = array_index_nospec(uref->field_index,
	508	+ report->maxfield);
502	509
503	510	field = report->field[uref->field_index];
504	511
@@ -753,6 +760,8 @@ static long hiddev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 248 unmodified lines
753	760
754	761	if (finfo.field_index >= report->maxfield)
755	762	break;
	763	+ finfo.field_index = array_index_nospec(finfo.field_index,
	764	+ report->maxfield);
756	765
757	766	field = report->field[finfo.field_index];
758	767	memset(&finfo, 0, sizeof(finfo));
@@ -797,6 +806,8 @@ static long hiddev_ioctl(struct file *file, unsigned int cmd, unsigned long arg) · 38 unmodified lines
797	806
798	807	if (cinfo.index >= hid->maxcollection)
799	808	break;
	809	+ cinfo.index = array_index_nospec(cinfo.index,
	810	+ hid->maxcollection);
800	811
801	812	cinfo.type = hid->collection[cinfo.index].type;
802	813	cinfo.usage = hid->collection[cinfo.index].usage;

drivers/hid/wacom_sys.c+8−0

@@ -395,6 +395,14 @@ static void wacom_usage_mapping(struct hid_device *hdev, · 394 unmodified lines
395	395	}
396	396	}
397	397
	398	+ /* 2nd-generation Intuos Pro Large has incorrect Y maximum */
	399	+ if (hdev->vendor == USB_VENDOR_ID_WACOM &&
	400	+ hdev->product == 0x0358 &&
	401	+ WACOM_PEN_FIELD(field) &&
	402	+ wacom_equivalent_usage(usage->hid) == HID_GD_Y) {
	403	+ field->logical_maximum = 43200;
	404	+ }
	405	+
398	406	switch (usage->hid) {
399	407	case HID_GD_X:
400	408	features->x_max = field->logical_maximum;

drivers/hid/wacom_wac.c+8−2

@@ -3365,8 +3365,14 @@ void wacom_setup_device_quirks(struct wacom *wacom) · 3364 unmodified lines
3365	3365	if (features->type >= INTUOSHT && features->type <= BAMBOO_PT)
3366	3366	features->device_type \|= WACOM_DEVICETYPE_PAD;
3367	3367
3368		− features->x_max = 4096;
3369		− features->y_max = 4096;
	3368	+ if (features->type == INTUOSHT2) {
	3369	+ features->x_max = features->x_max / 10;
	3370	+ features->y_max = features->y_max / 10;
	3371	+ }
	3372	+ else {
	3373	+ features->x_max = 4096;
	3374	+ features->y_max = 4096;
	3375	+ }
3370	3376	}
3371	3377	else if (features->pktlen == WACOM_PKGLEN_BBTOUCH) {
3372	3378	features->device_type \|= WACOM_DEVICETYPE_PAD;

drivers/hwmon/dell-smm-hwmon.c+7−0

@@ -1074,6 +1074,13 @@ static struct dmi_system_id i8k_blacklist_fan_support_dmi_table[] __initdata = { · 1073 unmodified lines
1074	1074	DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Vostro 3360"),
1075	1075	},
1076	1076	},
	1077	+ {
	1078	+ .ident = "Dell XPS13 9333",
	1079	+ .matches = {
	1080	+ DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
	1081	+ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "XPS13 9333"),
	1082	+ },
	1083	+ },
1077	1084	{ }
1078	1085	};
1079	1086

drivers/hwmon/nct6775.c+1−1

@@ -4175,7 +4175,7 @@ static int nct6775_probe(struct platform_device *pdev) · 4174 unmodified lines
4175	4175	* The temperature is already monitored if the respective bit in <mask>
4176	4176	* is set.
4177	4177	*/
4178		− for (i = 0; i < 32; i++) {
	4178	+ for (i = 0; i < 31; i++) {
4179	4179	if (!(data->temp_mask & BIT(i + 1)))
4180	4180	continue;
4181	4181	if (!reg_temp_alternate[i])

drivers/i2c/algos/i2c-algo-bit.c+4−4

@@ -647,10 +647,10 @@ static int __i2c_bit_add_bus(struct i2c_adapter *adap, · 646 unmodified lines
647	647	if (bit_adap->getscl == NULL)
648	648	adap->quirks = &i2c_bit_quirk_no_clk_stretch;
649	649
650		− /* Bring bus to a known state. Looks like STOP if bus is not free yet */
651		− setscl(bit_adap, 1);
652		− udelay(bit_adap->udelay);
653		− setsda(bit_adap, 1);
	650	+ /*
	651	+ * We tried forcing SCL/SDA to an initial state here. But that caused a
	652	+ * regression, sadly. Check Bugzilla #200045 for details.
	653	+ */
654	654
655	655	ret = add_adapter(adap);
656	656	if (ret < 0)

drivers/i2c/busses/i2c-cht-wc.c+2−1

@@ -234,7 +234,8 @@ static const struct irq_chip cht_wc_i2c_irq_chip = { · 233 unmodified lines
234	234	.name = "cht_wc_ext_chrg_irq_chip",
235	235	};
236	236
237		−static const char * const bq24190_suppliers[] = { "fusb302-typec-source" };
	237	+static const char * const bq24190_suppliers[] = {
	238	+ "tcpm-source-psy-i2c-fusb302" };
238	239
239	240	static const struct property_entry bq24190_props[] = {
240	241	PROPERTY_ENTRY_STRING_ARRAY("supplied-from", bq24190_suppliers),

drivers/i2c/busses/i2c-davinci.c+6−2

@@ -237,12 +237,16 @@ static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev *dev) · 236 unmodified lines
237	237	/*
238	238	* It's not always possible to have 1 to 2 ratio when d=7, so fall back
239	239	* to minimal possible clkh in this case.
	240	+ *
	241	+ * Note:
	242	+ * CLKH is not allowed to be 0, in this case I2C clock is not generated
	243	+ * at all
240	244	*/
241		− if (clk >= clkl + d) {
	245	+ if (clk > clkl + d) {
242	246	clkh = clk - clkl - d;
243	247	clkl -= d;
244	248	} else {
245		− clkh = 0;
	249	+ clkh = 1;
246	250	clkl = clk - (d << 1);
247	251	}
248	252

drivers/i2c/busses/i2c-gpio.c+2−2

@@ -279,9 +279,9 @@ static int i2c_gpio_probe(struct platform_device *pdev) · 278 unmodified lines
279	279	* required for an I2C bus.
280	280	*/
281	281	if (pdata->scl_is_open_drain)
282		− gflags = GPIOD_OUT_LOW;
	282	+ gflags = GPIOD_OUT_HIGH;
283	283	else
284		− gflags = GPIOD_OUT_LOW_OPEN_DRAIN;
	284	+ gflags = GPIOD_OUT_HIGH_OPEN_DRAIN;
285	285	priv->scl = i2c_gpio_get_desc(dev, "scl", 1, gflags);
286	286	if (IS_ERR(priv->scl))
287	287	return PTR_ERR(priv->scl);

drivers/i2c/busses/i2c-imx.c+2−3

@@ -368,6 +368,7 @@ static int i2c_imx_dma_xfer(struct imx_i2c_struct *i2c_imx, · 367 unmodified lines
368	368	goto err_desc;
369	369	}
370	370
	371	+ reinit_completion(&dma->cmd_complete);
371	372	txdesc->callback = i2c_imx_dma_callback;
372	373	txdesc->callback_param = i2c_imx;
373	374	if (dma_submit_error(dmaengine_submit(txdesc))) {
@@ -622,7 +623,6 @@ static int i2c_imx_dma_write(struct imx_i2c_struct *i2c_imx, · 248 unmodified lines
622	623	* The first byte must be transmitted by the CPU.
623	624	*/
624	625	imx_i2c_write_reg(i2c_8bit_addr_from_msg(msgs), i2c_imx, IMX_I2C_I2DR);
625		− reinit_completion(&i2c_imx->dma->cmd_complete);
626	626	time_left = wait_for_completion_timeout(
627	627	&i2c_imx->dma->cmd_complete,
628	628	msecs_to_jiffies(DMA_TIMEOUT));
@@ -681,7 +681,6 @@ static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx, · 52 unmodified lines
681	681	if (result)
682	682	return result;
683	683
684		− reinit_completion(&i2c_imx->dma->cmd_complete);
685	684	time_left = wait_for_completion_timeout(
686	685	&i2c_imx->dma->cmd_complete,
687	686	msecs_to_jiffies(DMA_TIMEOUT));
@@ -1010,7 +1009,7 @@ static int i2c_imx_init_recovery_info(struct imx_i2c_struct *i2c_imx, · 322 unmodified lines
1010	1009	i2c_imx->pinctrl_pins_gpio = pinctrl_lookup_state(i2c_imx->pinctrl,
1011	1010	"gpio");
1012	1011	rinfo->sda_gpiod = devm_gpiod_get(&pdev->dev, "sda", GPIOD_IN);
1013		− rinfo->scl_gpiod = devm_gpiod_get(&pdev->dev, "scl", GPIOD_OUT_HIGH);
	1012	+ rinfo->scl_gpiod = devm_gpiod_get(&pdev->dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN);
1014	1013
1015	1014	if (PTR_ERR(rinfo->sda_gpiod) == -EPROBE_DEFER \|\|
1016	1015	PTR_ERR(rinfo->scl_gpiod) == -EPROBE_DEFER) {

drivers/i2c/busses/i2c-rcar.c+51−3

@@ -32,6 +32,7 @@ · 31 unmodified lines
32	32	#include <linux/of_device.h>
33	33	#include <linux/platform_device.h>
34	34	#include <linux/pm_runtime.h>
	35	+#include <linux/reset.h>
35	36	#include <linux/slab.h>
36	37
37	38	/* register offsets */
@@ -111,8 +112,9 @@ · 73 unmodified lines
111	112	#define ID_ARBLOST (1 << 3)
112	113	#define ID_NACK (1 << 4)
113	114	/* persistent flags */
	115	+#define ID_P_NO_RXDMA (1 << 30) /* HW forbids RXDMA sometimes */
114	116	#define ID_P_PM_BLOCKED (1 << 31)
115		−#define ID_P_MASK ID_P_PM_BLOCKED
	117	+#define ID_P_MASK (ID_P_PM_BLOCKED \| ID_P_NO_RXDMA)
116	118
117	119	enum rcar_i2c_type {
118	120	I2C_RCAR_GEN1,
@@ -141,6 +143,8 @@ struct rcar_i2c_priv { · 22 unmodified lines
141	143	struct dma_chan *dma_rx;
142	144	struct scatterlist sg;
143	145	enum dma_data_direction dma_direction;
	146	+
	147	+ struct reset_control *rstc;
144	148	};
145	149
146	150	#define rcar_i2c_priv_to_dev(p) ((p)->adap.dev.parent)
@@ -370,6 +374,11 @@ static void rcar_i2c_dma_unmap(struct rcar_i2c_priv *priv) · 223 unmodified lines
370	374	dma_unmap_single(chan->device->dev, sg_dma_address(&priv->sg),
371	375	sg_dma_len(&priv->sg), priv->dma_direction);
372	376
	377	+ /* Gen3 can only do one RXDMA per transfer and we just completed it */
	378	+ if (priv->devtype == I2C_RCAR_GEN3 &&
	379	+ priv->dma_direction == DMA_FROM_DEVICE)
	380	+ priv->flags \|= ID_P_NO_RXDMA;
	381	+
373	382	priv->dma_direction = DMA_NONE;
374	383	}
375	384
@@ -407,8 +416,9 @@ static void rcar_i2c_dma(struct rcar_i2c_priv *priv) · 31 unmodified lines
407	416	unsigned char *buf;
408	417	int len;
409	418
410		− /* Do not use DMA if it's not available or for messages < 8 bytes */
411		− if (IS_ERR(chan) \|\| msg->len < 8 \|\| !(msg->flags & I2C_M_DMA_SAFE))
	419	+ /* Do various checks to see if DMA is feasible at all */
	420	+ if (IS_ERR(chan) \|\| msg->len < 8 \|\| !(msg->flags & I2C_M_DMA_SAFE) \|\|
	421	+ (read && priv->flags & ID_P_NO_RXDMA))
412	422	return;
413	423
414	424	if (read) {
@@ -739,6 +749,25 @@ static void rcar_i2c_release_dma(struct rcar_i2c_priv *priv) · 324 unmodified lines
739	749	}
740	750	}
741	751
	752	+/* I2C is a special case, we need to poll the status of a reset */
	753	+static int rcar_i2c_do_reset(struct rcar_i2c_priv *priv)
	754	+{
	755	+ int i, ret;
	756	+
	757	+ ret = reset_control_reset(priv->rstc);
	758	+ if (ret)
	759	+ return ret;
	760	+
	761	+ for (i = 0; i < LOOP_TIMEOUT; i++) {
	762	+ ret = reset_control_status(priv->rstc);
	763	+ if (ret == 0)
	764	+ return 0;
	765	+ udelay(1);
	766	+ }
	767	+
	768	+ return -ETIMEDOUT;
	769	+}
	770	+
742	771	static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
743	772	struct i2c_msg *msgs,
744	773	int num)
@@ -750,6 +779,16 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, · 5 unmodified lines
750	779
751	780	pm_runtime_get_sync(dev);
752	781
	782	+ /* Gen3 needs a reset before allowing RXDMA once */
	783	+ if (priv->devtype == I2C_RCAR_GEN3) {
	784	+ priv->flags \|= ID_P_NO_RXDMA;
	785	+ if (!IS_ERR(priv->rstc)) {
	786	+ ret = rcar_i2c_do_reset(priv);
	787	+ if (ret == 0)
	788	+ priv->flags &= ~ID_P_NO_RXDMA;
	789	+ }
	790	+ }
	791	+
753	792	rcar_i2c_init(priv);
754	793
755	794	ret = rcar_i2c_bus_barrier(priv);
@@ -920,6 +959,15 @@ static int rcar_i2c_probe(struct platform_device *pdev) · 164 unmodified lines
920	959	if (ret < 0)
921	960	goto out_pm_put;
922	961
	962	+ if (priv->devtype == I2C_RCAR_GEN3) {
	963	+ priv->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
	964	+ if (!IS_ERR(priv->rstc)) {
	965	+ ret = reset_control_status(priv->rstc);
	966	+ if (ret < 0)
	967	+ priv->rstc = ERR_PTR(-ENOTSUPP);
	968	+ }
	969	+ }
	970	+
923	971	/* Stay always active when multi-master to keep arbitration working */
924	972	if (of_property_read_bool(dev->of_node, "multi-master"))
925	973	priv->flags \|= ID_P_PM_BLOCKED;

drivers/i2c/busses/i2c-stu300.c+1−1

@@ -127,7 +127,7 @@ enum stu300_error { · 126 unmodified lines
127	127
128	128	/*
129	129	* The number of address send athemps tried before giving up.
130		− * If the first one failes it seems like 5 to 8 attempts are required.
	130	+ * If the first one fails it seems like 5 to 8 attempts are required.
131	131	*/
132	132	#define NUM_ADDR_RESEND_ATTEMPTS 12
133	133

drivers/i2c/busses/i2c-tegra.c+8−9

@@ -545,6 +545,14 @@ static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev) · 544 unmodified lines
545	545	{
546	546	u32 cnfg;
547	547
	548	+ /*
	549	+ * NACK interrupt is generated before the I2C controller generates
	550	+ * the STOP condition on the bus. So wait for 2 clock periods
	551	+ * before disabling the controller so that the STOP condition has
	552	+ * been delivered properly.
	553	+ */
	554	+ udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate));
	555	+
548	556	cnfg = i2c_readl(i2c_dev, I2C_CNFG);
549	557	if (cnfg & I2C_CNFG_PACKET_MODE_EN)
550	558	i2c_writel(i2c_dev, cnfg & ~I2C_CNFG_PACKET_MODE_EN, I2C_CNFG);
@@ -706,15 +714,6 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, · 155 unmodified lines
706	714	if (likely(i2c_dev->msg_err == I2C_ERR_NONE))
707	715	return 0;
708	716
709		− /*
710		− * NACK interrupt is generated before the I2C controller generates
711		− * the STOP condition on the bus. So wait for 2 clock periods
712		− * before resetting the controller so that the STOP condition has
713		− * been delivered properly.
714		− */
715		− if (i2c_dev->msg_err == I2C_ERR_NO_ACK)
716		− udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate));
717		−
718	717	tegra_i2c_init(i2c_dev);
719	718	if (i2c_dev->msg_err == I2C_ERR_NO_ACK) {
720	719	if (msg->flags & I2C_M_IGNORE_NAK)

drivers/i2c/busses/i2c-xlp9xx.c+28−13

@@ -191,28 +191,43 @@ static void xlp9xx_i2c_drain_rx_fifo(struct xlp9xx_i2c_dev *priv) · 190 unmodified lines
191	191	if (priv->len_recv) {
192	192	/* read length byte */
193	193	rlen = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_MRXFIFO);
	194	+
	195	+ /*
	196	+ * We expect at least 2 interrupts for I2C_M_RECV_LEN
	197	+ * transactions. The length is updated during the first
	198	+ * interrupt, and the buffer contents are only copied
	199	+ * during subsequent interrupts. If in case the interrupts
	200	+ * get merged we would complete the transaction without
	201	+ * copying out the bytes from RX fifo. To avoid this now we
	202	+ * drain the fifo as and when data is available.
	203	+ * We drained the rlen byte already, decrement total length
	204	+ * by one.
	205	+ */
	206	+
	207	+ len--;
194	208	if (rlen > I2C_SMBUS_BLOCK_MAX \|\| rlen == 0) {
195	209	rlen = 0; /abort transfer /
196	210	priv->msg_buf_remaining = 0;
197	211	priv->msg_len = 0;
198		− } else {
199		− *buf++ = rlen;
200		− if (priv->client_pec)
201		− ++rlen; /* account for error check byte */
202		− /* update remaining bytes and message length */
203		− priv->msg_buf_remaining = rlen;
204		− priv->msg_len = rlen + 1;
	212	+ xlp9xx_i2c_update_rlen(priv);
	213	+ return;
205	214	}
	215	+
	216	+ *buf++ = rlen;
	217	+ if (priv->client_pec)
	218	+ ++rlen; /* account for error check byte */
	219	+ /* update remaining bytes and message length */
	220	+ priv->msg_buf_remaining = rlen;
	221	+ priv->msg_len = rlen + 1;
206	222	xlp9xx_i2c_update_rlen(priv);
207	223	priv->len_recv = false;
208		− } else {
209		− len = min(priv->msg_buf_remaining, len);
210		− for (i = 0; i < len; i++, buf++)
211		− *buf = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_MRXFIFO);
212		−
213		− priv->msg_buf_remaining -= len;
214	224	}
215	225
	226	+ len = min(priv->msg_buf_remaining, len);
	227	+ for (i = 0; i < len; i++, buf++)
	228	+ *buf = xlp9xx_read_i2c_reg(priv, XLP9XX_I2C_MRXFIFO);
	229	+
	230	+ priv->msg_buf_remaining -= len;
216	231	priv->msg_buf = buf;
217	232
218	233	if (priv->msg_buf_remaining)

drivers/i2c/i2c-core-base.c+11−2

@@ -198,7 +198,16 @@ int i2c_generic_scl_recovery(struct i2c_adapter *adap) · 197 unmodified lines
198	198
199	199	val = !val;
200	200	bri->set_scl(adap, val);
201		− ndelay(RECOVERY_NDELAY);
	201	+
	202	+ /*
	203	+ * If we can set SDA, we will always create STOP here to ensure
	204	+ * the additional pulses will do no harm. This is achieved by
	205	+ * letting SDA follow SCL half a cycle later.
	206	+ */
	207	+ ndelay(RECOVERY_NDELAY / 2);
	208	+ if (bri->set_sda)
	209	+ bri->set_sda(adap, val);
	210	+ ndelay(RECOVERY_NDELAY / 2);
202	211	}
203	212
204	213	/* check if recovery actually succeeded */
@@ -615,7 +624,7 @@ static int i2c_check_addr_busy(struct i2c_adapter *adapter, int addr) · 410 unmodified lines
615	624	static void i2c_adapter_lock_bus(struct i2c_adapter *adapter,
616	625	unsigned int flags)
617	626	{
618		− rt_mutex_lock(&adapter->bus_lock);
	627	+ rt_mutex_lock_nested(&adapter->bus_lock, i2c_adapter_depth(adapter));
619	628	}
620	629
621	630	/**

drivers/i2c/i2c-core-smbus.c+9−5

@@ -465,15 +465,18 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter *adapter, u16 addr, · 464 unmodified lines
465	465
466	466	status = i2c_transfer(adapter, msg, num);
467	467	if (status < 0)
468		− return status;
469		− if (status != num)
470		− return -EIO;
	468	+ goto cleanup;
	469	+ if (status != num) {
	470	+ status = -EIO;
	471	+ goto cleanup;
	472	+ }
	473	+ status = 0;
471	474
472	475	/* Check PEC if last message is a read */
473	476	if (i && (msg[num-1].flags & I2C_M_RD)) {
474	477	status = i2c_smbus_check_pec(partial_pec, &msg[num-1]);
475	478	if (status < 0)
476		− return status;
	479	+ goto cleanup;
477	480	}
478	481
479	482	if (read_write == I2C_SMBUS_READ)
@@ -499,12 +502,13 @@ static s32 i2c_smbus_xfer_emulated(struct i2c_adapter *adapter, u16 addr, · 19 unmodified lines
499	502	break;
500	503	}
501	504
	505	+cleanup:
502	506	if (msg[0].flags & I2C_M_DMA_SAFE)
503	507	kfree(msg[0].buf);
504	508	if (msg[1].flags & I2C_M_DMA_SAFE)
505	509	kfree(msg[1].buf);
506	510
507		− return 0;
	511	+ return status;
508	512	}
509	513
510	514	/**

drivers/i2c/i2c-mux.c+2−2

@@ -144,7 +144,7 @@ static void i2c_mux_lock_bus(struct i2c_adapter *adapter, unsigned int flags) · 143 unmodified lines
144	144	struct i2c_mux_priv *priv = adapter->algo_data;
145	145	struct i2c_adapter *parent = priv->muxc->parent;
146	146
147		− rt_mutex_lock(&parent->mux_lock);
	147	+ rt_mutex_lock_nested(&parent->mux_lock, i2c_adapter_depth(adapter));
148	148	if (!(flags & I2C_LOCK_ROOT_ADAPTER))
149	149	return;
150	150	i2c_lock_bus(parent, flags);
@@ -181,7 +181,7 @@ static void i2c_parent_lock_bus(struct i2c_adapter *adapter, · 30 unmodified lines
181	181	struct i2c_mux_priv *priv = adapter->algo_data;
182	182	struct i2c_adapter *parent = priv->muxc->parent;
183	183
184		− rt_mutex_lock(&parent->mux_lock);
	184	+ rt_mutex_lock_nested(&parent->mux_lock, i2c_adapter_depth(adapter));
185	185	i2c_lock_bus(parent, flags);
186	186	}
187	187

drivers/iio/accel/mma8452.c+1−1

@@ -1053,7 +1053,7 @@ static irqreturn_t mma8452_interrupt(int irq, void *p) · 1052 unmodified lines
1053	1053	if (src < 0)
1054	1054	return IRQ_NONE;
1055	1055
1056		− if (!(src & data->chip_info->enabled_events))
	1056	+ if (!(src & (data->chip_info->enabled_events \| MMA8452_INT_DRDY)))
1057	1057	return IRQ_NONE;
1058	1058
1059	1059	if (src & MMA8452_INT_DRDY) {

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c+2−0

@@ -959,6 +959,8 @@ int inv_mpu_core_probe(struct regmap regmap, int irq, const char name, · 958 unmodified lines
959	959	}
960	960
961	961	irq_type = irqd_get_trigger_type(desc);
	962	+ if (!irq_type)
	963	+ irq_type = IRQF_TRIGGER_RISING;
962	964	if (irq_type == IRQF_TRIGGER_RISING)
963	965	st->irq_mask = INV_MPU6050_ACTIVE_HIGH;
964	966	else if (irq_type == IRQF_TRIGGER_FALLING)

drivers/iio/light/tsl2772.c+2−0

@@ -582,6 +582,8 @@ static int tsl2772_als_calibrate(struct iio_dev *indio_dev) · 581 unmodified lines
582	582	"%s: failed to get lux\n", __func__);
583	583	return lux_val;
584	584	}
	585	+ if (lux_val == 0)
	586	+ return -ERANGE;
585	587
586	588	ret = (chip->settings.als_cal_target * chip->settings.als_gain_trim) /
587	589	lux_val;

drivers/iio/pressure/bmp280-core.c+2−3

@@ -415,10 +415,9 @@ static int bmp280_read_humid(struct bmp280_data data, int val, int *val2) · 414 unmodified lines
415	415	}
416	416	comp_humidity = bmp280_compensate_humidity(data, adc_humidity);
417	417
418		− *val = comp_humidity;
419		− *val2 = 1024;
	418	+ val = comp_humidity 1000 / 1024;
420	419
421		− return IIO_VAL_FRACTIONAL;
	420	+ return IIO_VAL_INT;
422	421	}
423	422
424	423	static int bmp280_read_raw(struct iio_dev *indio_dev,

drivers/infiniband/core/uverbs_cmd.c+71−15

@@ -1963,15 +1963,64 @@ static int modify_qp(struct ib_uverbs_file *file, · 1962 unmodified lines
1963	1963	goto release_qp;
1964	1964	}
1965	1965
1966		− if ((cmd->base.attr_mask & IB_QP_AV) &&
1967		− !rdma_is_port_valid(qp->device, cmd->base.dest.port_num)) {
1968		− ret = -EINVAL;
1969		− goto release_qp;
	1966	+ if ((cmd->base.attr_mask & IB_QP_AV)) {
	1967	+ if (!rdma_is_port_valid(qp->device, cmd->base.dest.port_num)) {
	1968	+ ret = -EINVAL;
	1969	+ goto release_qp;
	1970	+ }
	1971	+
	1972	+ if (cmd->base.attr_mask & IB_QP_STATE &&
	1973	+ cmd->base.qp_state == IB_QPS_RTR) {
	1974	+ /* We are in INIT->RTR TRANSITION (if we are not,
	1975	+ * this transition will be rejected in subsequent checks).
	1976	+ * In the INIT->RTR transition, we cannot have IB_QP_PORT set,
	1977	+ * but the IB_QP_STATE flag is required.
	1978	+ *
	1979	+ * Since kernel 3.14 (commit dbf727de7440), the uverbs driver,
	1980	+ * when IB_QP_AV is set, has required inclusion of a valid
	1981	+ * port number in the primary AV. (AVs are created and handled
	1982	+ * differently for infiniband and ethernet (RoCE) ports).
	1983	+ *
	1984	+ * Check the port number included in the primary AV against
	1985	+ * the port number in the qp struct, which was set (and saved)
	1986	+ * in the RST->INIT transition.
	1987	+ */
	1988	+ if (cmd->base.dest.port_num != qp->real_qp->port) {
	1989	+ ret = -EINVAL;
	1990	+ goto release_qp;
	1991	+ }
	1992	+ } else {
	1993	+ /* We are in SQD->SQD. (If we are not, this transition will
	1994	+ * be rejected later in the verbs layer checks).
	1995	+ * Check for both IB_QP_PORT and IB_QP_AV, these can be set
	1996	+ * together in the SQD->SQD transition.
	1997	+ *
	1998	+ * If only IP_QP_AV was set, add in IB_QP_PORT as well (the
	1999	+ * verbs layer driver does not track primary port changes
	2000	+ * resulting from path migration. Thus, in SQD, if the primary
	2001	+ * AV is modified, the primary port should also be modified).
	2002	+ *
	2003	+ * Note that in this transition, the IB_QP_STATE flag
	2004	+ * is not allowed.
	2005	+ */
	2006	+ if (((cmd->base.attr_mask & (IB_QP_AV \| IB_QP_PORT))
	2007	+ == (IB_QP_AV \| IB_QP_PORT)) &&
	2008	+ cmd->base.port_num != cmd->base.dest.port_num) {
	2009	+ ret = -EINVAL;
	2010	+ goto release_qp;
	2011	+ }
	2012	+ if ((cmd->base.attr_mask & (IB_QP_AV \| IB_QP_PORT))
	2013	+ == IB_QP_AV) {
	2014	+ cmd->base.attr_mask \|= IB_QP_PORT;
	2015	+ cmd->base.port_num = cmd->base.dest.port_num;
	2016	+ }
	2017	+ }
1970	2018	}
1971	2019
1972	2020	if ((cmd->base.attr_mask & IB_QP_ALT_PATH) &&
1973	2021	(!rdma_is_port_valid(qp->device, cmd->base.alt_port_num) \|\|
1974		− !rdma_is_port_valid(qp->device, cmd->base.alt_dest.port_num))) {
	2022	+ !rdma_is_port_valid(qp->device, cmd->base.alt_dest.port_num) \|\|
	2023	+ cmd->base.alt_port_num != cmd->base.alt_dest.port_num)) {
1975	2024	ret = -EINVAL;
1976	2025	goto release_qp;
1977	2026	}
@@ -3419,8 +3468,8 @@ int ib_uverbs_ex_create_flow(struct ib_uverbs_file *file, · 1441 unmodified lines
3419	3468	struct ib_flow_attr *flow_attr;
3420	3469	struct ib_qp *qp;
3421	3470	struct ib_uflow_resources *uflow_res;
	3471	+ struct ib_uverbs_flow_spec_hdr *kern_spec;
3422	3472	int err = 0;
3423		− void *kern_spec;
3424	3473	void *ib_spec;
3425	3474	int i;
3426	3475	struct ib_device *ib_dev;
@@ -3470,8 +3519,8 @@ int ib_uverbs_ex_create_flow(struct ib_uverbs_file *file, · 43 unmodified lines
3470	3519	if (!kern_flow_attr)
3471	3520	return -ENOMEM;
3472	3521
3473		− memcpy(kern_flow_attr, &cmd.flow_attr, sizeof(*kern_flow_attr));
3474		− err = ib_copy_from_udata(kern_flow_attr + 1, ucore,
	3522	+ *kern_flow_attr = cmd.flow_attr;
	3523	+ err = ib_copy_from_udata(&kern_flow_attr->flow_specs, ucore,
3475	3524	cmd.flow_attr.size);
3476	3525	if (err)
3477	3526	goto err_free_attr;
@@ -3491,6 +3540,11 @@ int ib_uverbs_ex_create_flow(struct ib_uverbs_file *file, · 13 unmodified lines
3491	3540	goto err_uobj;
3492	3541	}
3493	3542
	3543	+ if (qp->qp_type != IB_QPT_UD && qp->qp_type != IB_QPT_RAW_PACKET) {
	3544	+ err = -EINVAL;
	3545	+ goto err_put;
	3546	+ }
	3547	+
3494	3548	if (!qp->device->create_flow) {
3495	3549	err = -EOPNOTSUPP;
3496	3550	goto err_put;
@@ -3515,20 +3569,22 @@ int ib_uverbs_ex_create_flow(struct ib_uverbs_file *file, · 18 unmodified lines
3515	3569	flow_attr->flags = kern_flow_attr->flags;
3516	3570	flow_attr->size = sizeof(*flow_attr);
3517	3571
3518		− kern_spec = kern_flow_attr + 1;
	3572	+ kern_spec = kern_flow_attr->flow_specs;
3519	3573	ib_spec = flow_attr + 1;
3520	3574	for (i = 0; i < flow_attr->num_of_specs &&
3521		− cmd.flow_attr.size > offsetof(struct ib_uverbs_flow_spec, reserved) &&
3522		− cmd.flow_attr.size >=
3523		− ((struct ib_uverbs_flow_spec *)kern_spec)->size; i++) {
3524		− err = kern_spec_to_ib_spec(file, kern_spec, ib_spec, uflow_res);
	3575	+ cmd.flow_attr.size >= sizeof(*kern_spec) &&
	3576	+ cmd.flow_attr.size >= kern_spec->size;
	3577	+ i++) {
	3578	+ err = kern_spec_to_ib_spec(
	3579	+ file, (struct ib_uverbs_flow_spec *)kern_spec,
	3580	+ ib_spec, uflow_res);
3525	3581	if (err)
3526	3582	goto err_free;
3527	3583
3528	3584	flow_attr->size +=
3529	3585	((union ib_flow_spec *) ib_spec)->size;
3530		− cmd.flow_attr.size -= ((struct ib_uverbs_flow_spec *)kern_spec)->size;
3531		− kern_spec += ((struct ib_uverbs_flow_spec *) kern_spec)->size;
	3586	+ cmd.flow_attr.size -= kern_spec->size;
	3587	+ kern_spec = ((void *)kern_spec) + kern_spec->size;
3532	3588	ib_spec += ((union ib_flow_spec *) ib_spec)->size;
3533	3589	}
3534	3590	if (cmd.flow_attr.size \|\| (i != flow_attr->num_of_specs)) {

drivers/infiniband/core/verbs.c+8−6

@@ -1869,11 +1869,12 @@ EXPORT_SYMBOL(ib_destroy_qp); · 1868 unmodified lines
1869	1869
1870	1870	/* Completion queues */
1871	1871
1872		−struct ib_cq ib_create_cq(struct ib_device device,
1873		− ib_comp_handler comp_handler,
1874		− void (event_handler)(struct ib_event , void *),
1875		− void *cq_context,
1876		− const struct ib_cq_init_attr *cq_attr)
	1872	+struct ib_cq __ib_create_cq(struct ib_device device,
	1873	+ ib_comp_handler comp_handler,
	1874	+ void (event_handler)(struct ib_event , void *),
	1875	+ void *cq_context,
	1876	+ const struct ib_cq_init_attr *cq_attr,
	1877	+ const char *caller)
1877	1878	{
1878	1879	struct ib_cq *cq;
1879	1880
@@ -1887,12 +1888,13 @@ struct ib_cq ib_create_cq(struct ib_device device, · 7 unmodified lines
1887	1888	cq->cq_context = cq_context;
1888	1889	atomic_set(&cq->usecnt, 0);
1889	1890	cq->res.type = RDMA_RESTRACK_CQ;
	1891	+ cq->res.kern_name = caller;
1890	1892	rdma_restrack_add(&cq->res);
1891	1893	}
1892	1894
1893	1895	return cq;
1894	1896	}
1895		−EXPORT_SYMBOL(ib_create_cq);
	1897	+EXPORT_SYMBOL(__ib_create_cq);
1896	1898
1897	1899	int rdma_set_cq_moderation(struct ib_cq *cq, u16 cq_count, u16 cq_period)
1898	1900	{

drivers/infiniband/hw/cxgb4/mem.c+1−1

@@ -774,7 +774,7 @@ static int c4iw_set_page(struct ib_mr *ibmr, u64 addr) · 773 unmodified lines
774	774	{
775	775	struct c4iw_mr *mhp = to_c4iw_mr(ibmr);
776	776
777		− if (unlikely(mhp->mpl_len == mhp->max_mpl_len))
	777	+ if (unlikely(mhp->mpl_len == mhp->attr.pbl_size))
778	778	return -ENOMEM;
779	779
780	780	mhp->mpl[mhp->mpl_len++] = addr;

drivers/infiniband/hw/hfi1/rc.c+1−1

@@ -271,7 +271,7 @@ int hfi1_make_rc_req(struct rvt_qp qp, struct hfi1_pkt_state ps) · 270 unmodified lines
271	271
272	272	lockdep_assert_held(&qp->s_lock);
273	273	ps->s_txreq = get_txreq(ps->dev, qp);
274		− if (IS_ERR(ps->s_txreq))
	274	+ if (!ps->s_txreq)
275	275	goto bail_no_tx;
276	276
277	277	if (priv->hdr_type == HFI1_PKT_TYPE_9B) {

drivers/infiniband/hw/hfi1/uc.c+2−2

@@ -1,5 +1,5 @@
1	1	/*
2		− * Copyright(c) 2015, 2016 Intel Corporation.
	2	+ * Copyright(c) 2015 - 2018 Intel Corporation.
3	3	*
4	4	* This file is provided under a dual BSD/GPLv2 license. When using or
5	5	* redistributing this file, you may do so under either license.
@@ -72,7 +72,7 @@ int hfi1_make_uc_req(struct rvt_qp qp, struct hfi1_pkt_state ps) · 66 unmodified lines
72	72	int middle = 0;
73	73
74	74	ps->s_txreq = get_txreq(ps->dev, qp);
75		− if (IS_ERR(ps->s_txreq))
	75	+ if (!ps->s_txreq)
76	76	goto bail_no_tx;
77	77
78	78	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {

drivers/infiniband/hw/hfi1/ud.c+2−2

@@ -1,5 +1,5 @@
1	1	/*
2		− * Copyright(c) 2015, 2016 Intel Corporation.
	2	+ * Copyright(c) 2015 - 2018 Intel Corporation.
3	3	*
4	4	* This file is provided under a dual BSD/GPLv2 license. When using or
5	5	* redistributing this file, you may do so under either license.
@@ -503,7 +503,7 @@ int hfi1_make_ud_req(struct rvt_qp qp, struct hfi1_pkt_state ps) · 497 unmodified lines
503	503	u32 lid;
504	504
505	505	ps->s_txreq = get_txreq(ps->dev, qp);
506		− if (IS_ERR(ps->s_txreq))
	506	+ if (!ps->s_txreq)
507	507	goto bail_no_tx;
508	508
509	509	if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK)) {

drivers/infiniband/hw/hfi1/verbs_txreq.c+2−2

@@ -1,5 +1,5 @@
1	1	/*
2		− * Copyright(c) 2016 - 2017 Intel Corporation.
	2	+ * Copyright(c) 2016 - 2018 Intel Corporation.
3	3	*
4	4	* This file is provided under a dual BSD/GPLv2 license. When using or
5	5	* redistributing this file, you may do so under either license.
@@ -94,7 +94,7 @@ struct verbs_txreq __get_txreq(struct hfi1_ibdev dev, · 88 unmodified lines
94	94	struct rvt_qp *qp)
95	95	__must_hold(&qp->s_lock)
96	96	{
97		− struct verbs_txreq *tx = ERR_PTR(-EBUSY);
	97	+ struct verbs_txreq *tx = NULL;
98	98
99	99	write_seqlock(&dev->txwait_lock);
100	100	if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {

drivers/infiniband/hw/hfi1/verbs_txreq.h+2−2

@@ -1,5 +1,5 @@
1	1	/*
2		− * Copyright(c) 2016 Intel Corporation.
	2	+ * Copyright(c) 2016 - 2018 Intel Corporation.
3	3	*
4	4	* This file is provided under a dual BSD/GPLv2 license. When using or
5	5	* redistributing this file, you may do so under either license.
@@ -83,7 +83,7 @@ static inline struct verbs_txreq get_txreq(struct hfi1_ibdev dev, · 77 unmodified lines
83	83	if (unlikely(!tx)) {
84	84	/* call slow path to get the lock */
85	85	tx = __get_txreq(dev, qp);
86		− if (IS_ERR(tx))
	86	+ if (!tx)
87	87	return tx;
88	88	}
89	89	tx->qp = qp;

drivers/infiniband/hw/mlx4/mr.c+5−2

@@ -486,8 +486,11 @@ int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags, · 485 unmodified lines
486	486	}
487	487
488	488	if (flags & IB_MR_REREG_ACCESS) {
489		− if (ib_access_writable(mr_access_flags) && !mmr->umem->writable)
490		− return -EPERM;
	489	+ if (ib_access_writable(mr_access_flags) &&
	490	+ !mmr->umem->writable) {
	491	+ err = -EPERM;
	492	+ goto release_mpt_entry;
	493	+ }
491	494
492	495	err = mlx4_mr_hw_change_access(dev->dev, *pmpt_entry,
493	496	convert_access(mr_access_flags));

drivers/infiniband/hw/mlx5/main.c+22−16

@@ -3208,8 +3208,8 @@ static int flow_counters_set_data(struct ib_counters *ibcounters, · 3207 unmodified lines
3208	3208	if (!mcounters->hw_cntrs_hndl) {
3209	3209	mcounters->hw_cntrs_hndl = mlx5_fc_create(
3210	3210	to_mdev(ibcounters->device)->mdev, false);
3211		− if (!mcounters->hw_cntrs_hndl) {
3212		− ret = -ENOMEM;
	3211	+ if (IS_ERR(mcounters->hw_cntrs_hndl)) {
	3212	+ ret = PTR_ERR(mcounters->hw_cntrs_hndl);
3213	3213	goto free;
3214	3214	}
3215	3215	hw_hndl = true;
@@ -3556,29 +3556,35 @@ static struct ib_flow mlx5_ib_create_flow(struct ib_qp qp, · 340 unmodified lines
3556	3556	return ERR_PTR(-ENOMEM);
3557	3557
3558	3558	err = ib_copy_from_udata(ucmd, udata, required_ucmd_sz);
3559		− if (err) {
3560		− kfree(ucmd);
3561		− return ERR_PTR(err);
3562		− }
	3559	+ if (err)
	3560	+ goto free_ucmd;
3563	3561	}
3564	3562
3565		− if (flow_attr->priority > MLX5_IB_FLOW_LAST_PRIO)
3566		− return ERR_PTR(-ENOMEM);
	3563	+ if (flow_attr->priority > MLX5_IB_FLOW_LAST_PRIO) {
	3564	+ err = -ENOMEM;
	3565	+ goto free_ucmd;
	3566	+ }
3567	3567
3568	3568	if (domain != IB_FLOW_DOMAIN_USER \|\|
3569	3569	flow_attr->port > dev->num_ports \|\|
3570	3570	(flow_attr->flags & ~(IB_FLOW_ATTR_FLAGS_DONT_TRAP \|
3571		− IB_FLOW_ATTR_FLAGS_EGRESS)))
3572		− return ERR_PTR(-EINVAL);
	3571	+ IB_FLOW_ATTR_FLAGS_EGRESS))) {
	3572	+ err = -EINVAL;
	3573	+ goto free_ucmd;
	3574	+ }
3573	3575
3574	3576	if (is_egress &&
3575	3577	(flow_attr->type == IB_FLOW_ATTR_ALL_DEFAULT \|\|
3576		− flow_attr->type == IB_FLOW_ATTR_MC_DEFAULT))
3577		− return ERR_PTR(-EINVAL);
	3578	+ flow_attr->type == IB_FLOW_ATTR_MC_DEFAULT)) {
	3579	+ err = -EINVAL;
	3580	+ goto free_ucmd;
	3581	+ }
3578	3582
3579	3583	dst = kzalloc(sizeof(*dst), GFP_KERNEL);
3580		− if (!dst)
3581		− return ERR_PTR(-ENOMEM);
	3584	+ if (!dst) {
	3585	+ err = -ENOMEM;
	3586	+ goto free_ucmd;
	3587	+ }
3582	3588
3583	3589	mutex_lock(&dev->flow_db->lock);
3584	3590
@@ -3647,8 +3653,8 @@ destroy_ft: · 62 unmodified lines
3647	3653	unlock:
3648	3654	mutex_unlock(&dev->flow_db->lock);
3649	3655	kfree(dst);
	3656	+free_ucmd:
3650	3657	kfree(ucmd);
3651		− kfree(handler);
3652	3658	return ERR_PTR(err);
3653	3659	}
3654	3660
@@ -6343,7 +6349,7 @@ static void mlx5_ib_add(struct mlx5_core_dev mdev) · 2688 unmodified lines
6343	6349	dev->num_ports = max(MLX5_CAP_GEN(mdev, num_ports),
6344	6350	MLX5_CAP_GEN(mdev, num_vhca_ports));
6345	6351
6346		− if (MLX5_VPORT_MANAGER(mdev) &&
	6352	+ if (MLX5_ESWITCH_MANAGER(mdev) &&
6347	6353	mlx5_ib_eswitch_mode(mdev->priv.eswitch) == SRIOV_OFFLOADS) {
6348	6354	dev->rep = mlx5_ib_vport_rep(mdev->priv.eswitch, 0);
6349	6355

drivers/infiniband/hw/mlx5/srq.c+12−6

@@ -266,18 +266,24 @@ struct ib_srq mlx5_ib_create_srq(struct ib_pd pd, · 265 unmodified lines
266	266
267	267	desc_size = sizeof(struct mlx5_wqe_srq_next_seg) +
268	268	srq->msrq.max_gs * sizeof(struct mlx5_wqe_data_seg);
269		− if (desc_size == 0 \|\| srq->msrq.max_gs > desc_size)
270		− return ERR_PTR(-EINVAL);
	269	+ if (desc_size == 0 \|\| srq->msrq.max_gs > desc_size) {
	270	+ err = -EINVAL;
	271	+ goto err_srq;
	272	+ }
271	273	desc_size = roundup_pow_of_two(desc_size);
272	274	desc_size = max_t(size_t, 32, desc_size);
273		− if (desc_size < sizeof(struct mlx5_wqe_srq_next_seg))
274		− return ERR_PTR(-EINVAL);
	275	+ if (desc_size < sizeof(struct mlx5_wqe_srq_next_seg)) {
	276	+ err = -EINVAL;
	277	+ goto err_srq;
	278	+ }
275	279	srq->msrq.max_avail_gather = (desc_size - sizeof(struct mlx5_wqe_srq_next_seg)) /
276	280	sizeof(struct mlx5_wqe_data_seg);
277	281	srq->msrq.wqe_shift = ilog2(desc_size);
278	282	buf_size = srq->msrq.max * desc_size;
279		− if (buf_size < desc_size)
280		− return ERR_PTR(-EINVAL);
	283	+ if (buf_size < desc_size) {
	284	+ err = -EINVAL;
	285	+ goto err_srq;
	286	+ }
281	287	in.type = init_attr->srq_type;
282	288
283	289	if (pd->uobject)

drivers/infiniband/hw/qedr/verbs.c+3−0

@@ -2288,6 +2288,9 @@ int qedr_modify_qp(struct ib_qp ibqp, struct ib_qp_attr attr, · 2287 unmodified lines
2288	2288	}
2289	2289
2290	2290	if (attr_mask & (IB_QP_AV \| IB_QP_PATH_MTU)) {
	2291	+ if (rdma_protocol_iwarp(&dev->ibdev, 1))
	2292	+ return -EINVAL;
	2293	+
2291	2294	if (attr_mask & IB_QP_PATH_MTU) {
2292	2295	if (attr->path_mtu < IB_MTU_256 \|\|
2293	2296	attr->path_mtu > IB_MTU_4096) {

drivers/infiniband/sw/rxe/rxe_req.c+4−1

@@ -645,6 +645,9 @@ next_wqe: · 644 unmodified lines
645	645	} else {
646	646	goto exit;
647	647	}
	648	+ if ((wqe->wr.send_flags & IB_SEND_SIGNALED) \|\|
	649	+ qp->sq_sig_type == IB_SIGNAL_ALL_WR)
	650	+ rxe_run_task(&qp->comp.task, 1);
648	651	qp->req.wqe_index = next_index(qp->sq.queue,
649	652	qp->req.wqe_index);
650	653	goto next_wqe;
@@ -709,6 +712,7 @@ next_wqe: · 58 unmodified lines
709	712
710	713	if (fill_packet(qp, wqe, &pkt, skb, payload)) {
711	714	pr_debug("qp#%d Error during fill packet\n", qp_num(qp));
	715	+ kfree_skb(skb);
712	716	goto err;
713	717	}
714	718
@@ -740,7 +744,6 @@ next_wqe: · 25 unmodified lines
740	744	goto next_wqe;
741	745
742	746	err:
743		− kfree_skb(skb);
744	747	wqe->status = IB_WC_LOC_PROT_ERR;
745	748	wqe->state = wqe_state_error;
746	749	__rxe_do_task(&qp->comp.task);

drivers/input/input-mt.c+8−4

@@ -131,8 +131,10 @@ EXPORT_SYMBOL(input_mt_destroy_slots); · 130 unmodified lines
131	131	* inactive, or if the tool type is changed, a new tracking id is
132	132	* assigned to the slot. The tool type is only reported if the
133	133	* corresponding absbit field is set.
	134	+ *
	135	+ * Returns true if contact is active.
134	136	*/
135		−void input_mt_report_slot_state(struct input_dev *dev,
	137	+bool input_mt_report_slot_state(struct input_dev *dev,
136	138	unsigned int tool_type, bool active)
137	139	{
138	140	struct input_mt *mt = dev->mt;
@@ -140,22 +142,24 @@ void input_mt_report_slot_state(struct input_dev *dev, · 1 unmodified line
140	142	int id;
141	143
142	144	if (!mt)
143		− return;
	145	+ return false;
144	146
145	147	slot = &mt->slots[mt->slot];
146	148	slot->frame = mt->frame;
147	149
148	150	if (!active) {
149	151	input_event(dev, EV_ABS, ABS_MT_TRACKING_ID, -1);
150		− return;
	152	+ return false;
151	153	}
152	154
153	155	id = input_mt_get_value(slot, ABS_MT_TRACKING_ID);
154		− if (id < 0 \|\| input_mt_get_value(slot, ABS_MT_TOOL_TYPE) != tool_type)
	156	+ if (id < 0)
155	157	id = input_mt_new_trkid(mt);
156	158
157	159	input_event(dev, EV_ABS, ABS_MT_TRACKING_ID, id);
158	160	input_event(dev, EV_ABS, ABS_MT_TOOL_TYPE, tool_type);
	161	+
	162	+ return true;
159	163	}
160	164	EXPORT_SYMBOL(input_mt_report_slot_state);
161	165

drivers/input/joystick/xpad.c+1−1

@@ -125,7 +125,7 @@ static const struct xpad_device { · 124 unmodified lines
125	125	u8 mapping;
126	126	u8 xtype;
127	127	} xpad_device[] = {
128		− { 0x0079, 0x18d4, "GPD Win 2 Controller", 0, XTYPE_XBOX360 },
	128	+ { 0x0079, 0x18d4, "GPD Win 2 X-Box Controller", 0, XTYPE_XBOX360 },
129	129	{ 0x044f, 0x0f00, "Thrustmaster Wheel", 0, XTYPE_XBOX },
130	130	{ 0x044f, 0x0f03, "Thrustmaster Wheel", 0, XTYPE_XBOX },
131	131	{ 0x044f, 0x0f07, "Thrustmaster, Inc. Controller", 0, XTYPE_XBOX },

drivers/input/keyboard/goldfish_events.c+5−4

@@ -45,7 +45,7 @@ struct event_dev { · 44 unmodified lines
45	45	static irqreturn_t events_interrupt(int irq, void *dev_id)
46	46	{
47	47	struct event_dev *edev = dev_id;
48		− unsigned type, code, value;
	48	+ unsigned int type, code, value;
49	49
50	50	type = __raw_readl(edev->addr + REG_READ);
51	51	code = __raw_readl(edev->addr + REG_READ);
@@ -57,7 +57,7 @@ static irqreturn_t events_interrupt(int irq, void *dev_id) · 5 unmodified lines
57	57	}
58	58
59	59	static void events_import_bits(struct event_dev *edev,
60		− unsigned long bits[], unsigned type, size_t count)
	60	+ unsigned long bits[], unsigned int type, size_t count)
61	61	{
62	62	void __iomem *addr = edev->addr;
63	63	int i, j;
@@ -99,6 +99,7 @@ static void events_import_abs_params(struct event_dev *edev) · 35 unmodified lines
99	99
100	100	for (j = 0; j < ARRAY_SIZE(val); j++) {
101	101	int offset = (i * ARRAY_SIZE(val) + j) * sizeof(u32);
	102	+
102	103	val[j] = __raw_readl(edev->addr + REG_DATA + offset);
103	104	}
104	105
@@ -112,7 +113,7 @@ static int events_probe(struct platform_device *pdev) · 7 unmodified lines
112	113	struct input_dev *input_dev;
113	114	struct event_dev *edev;
114	115	struct resource *res;
115		− unsigned keymapnamelen;
	116	+ unsigned int keymapnamelen;
116	117	void __iomem *addr;
117	118	int irq;
118	119	int i;
@@ -150,7 +151,7 @@ static int events_probe(struct platform_device *pdev) · 31 unmodified lines
150	151	for (i = 0; i < keymapnamelen; i++)
151	152	edev->name[i] = __raw_readb(edev->addr + REG_DATA + i);
152	153
153		− pr_debug("events_probe() keymap=%s\n", edev->name);
	154	+ pr_debug("%s: keymap=%s\n", __func__, edev->name);
154	155
155	156	input_dev->name = edev->name;
156	157	input_dev->id.bustype = BUS_HOST;

drivers/input/misc/Kconfig+10−0

@@ -841,4 +841,14 @@ config INPUT_RAVE_SP_PWRBUTTON · 840 unmodified lines
841	841	To compile this driver as a module, choose M here: the
842	842	module will be called rave-sp-pwrbutton.
843	843
	844	+config INPUT_SC27XX_VIBRA
	845	+ tristate "Spreadtrum sc27xx vibrator support"
	846	+ depends on MFD_SC27XX_PMIC \|\| COMPILE_TEST
	847	+ select INPUT_FF_MEMLESS
	848	+ help
	849	+ This option enables support for Spreadtrum sc27xx vibrator driver.
	850	+
	851	+ To compile this driver as a module, choose M here. The module will
	852	+ be called sc27xx_vibra.
	853	+
844	854	endif

drivers/input/misc/Makefile+1−0

@@ -66,6 +66,7 @@ obj-$(CONFIG_INPUT_RETU_PWRBUTTON) += retu-pwrbutton.o · 65 unmodified lines
66	66	obj-$(CONFIG_INPUT_AXP20X_PEK) += axp20x-pek.o
67	67	obj-$(CONFIG_INPUT_GPIO_ROTARY_ENCODER) += rotary_encoder.o
68	68	obj-$(CONFIG_INPUT_RK805_PWRKEY) += rk805-pwrkey.o
	69	+obj-$(CONFIG_INPUT_SC27XX_VIBRA) += sc27xx-vibra.o
69	70	obj-$(CONFIG_INPUT_SGI_BTNS) += sgi_btns.o
70	71	obj-$(CONFIG_INPUT_SIRFSOC_ONKEY) += sirfsoc-onkey.o
71	72	obj-$(CONFIG_INPUT_SOC_BUTTON_ARRAY) += soc_button_array.o

drivers/input/misc/sc27xx-vibra.c+154−0

@@ -0,0 +1,154 @@
	1	+// SPDX-License-Identifier: GPL-2.0
	2	+/*
	3	+ * Copyright (C) 2018 Spreadtrum Communications Inc.
	4	+ */
	5	+
	6	+#include <linux/module.h>
	7	+#include <linux/of_address.h>
	8	+#include <linux/platform_device.h>
	9	+#include <linux/regmap.h>
	10	+#include <linux/input.h>
	11	+#include <linux/workqueue.h>
	12	+
	13	+#define CUR_DRV_CAL_SEL GENMASK(13, 12)
	14	+#define SLP_LDOVIBR_PD_EN BIT(9)
	15	+#define LDO_VIBR_PD BIT(8)
	16	+
	17	+struct vibra_info {
	18	+ struct input_dev *input_dev;
	19	+ struct work_struct play_work;
	20	+ struct regmap *regmap;
	21	+ u32 base;
	22	+ u32 strength;
	23	+ bool enabled;
	24	+};
	25	+
	26	+static void sc27xx_vibra_set(struct vibra_info *info, bool on)
	27	+{
	28	+ if (on) {
	29	+ regmap_update_bits(info->regmap, info->base, LDO_VIBR_PD, 0);
	30	+ regmap_update_bits(info->regmap, info->base,
	31	+ SLP_LDOVIBR_PD_EN, 0);
	32	+ info->enabled = true;
	33	+ } else {
	34	+ regmap_update_bits(info->regmap, info->base, LDO_VIBR_PD,
	35	+ LDO_VIBR_PD);
	36	+ regmap_update_bits(info->regmap, info->base,
	37	+ SLP_LDOVIBR_PD_EN, SLP_LDOVIBR_PD_EN);
	38	+ info->enabled = false;
	39	+ }
	40	+}
	41	+
	42	+static int sc27xx_vibra_hw_init(struct vibra_info *info)
	43	+{
	44	+ return regmap_update_bits(info->regmap, info->base, CUR_DRV_CAL_SEL, 0);
	45	+}
	46	+
	47	+static void sc27xx_vibra_play_work(struct work_struct *work)
	48	+{
	49	+ struct vibra_info *info = container_of(work, struct vibra_info,
	50	+ play_work);
	51	+
	52	+ if (info->strength && !info->enabled)
	53	+ sc27xx_vibra_set(info, true);
	54	+ else if (info->strength == 0 && info->enabled)
	55	+ sc27xx_vibra_set(info, false);
	56	+}
	57	+
	58	+static int sc27xx_vibra_play(struct input_dev input, void data,
	59	+ struct ff_effect *effect)
	60	+{
	61	+ struct vibra_info *info = input_get_drvdata(input);
	62	+
	63	+ info->strength = effect->u.rumble.weak_magnitude;
	64	+ schedule_work(&info->play_work);
	65	+
	66	+ return 0;
	67	+}
	68	+
	69	+static void sc27xx_vibra_close(struct input_dev *input)
	70	+{
	71	+ struct vibra_info *info = input_get_drvdata(input);
	72	+
	73	+ cancel_work_sync(&info->play_work);
	74	+ if (info->enabled)
	75	+ sc27xx_vibra_set(info, false);
	76	+}
	77	+
	78	+static int sc27xx_vibra_probe(struct platform_device *pdev)
	79	+{
	80	+ struct vibra_info *info;
	81	+ int error;
	82	+
	83	+ info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
	84	+ if (!info)
	85	+ return -ENOMEM;
	86	+
	87	+ info->regmap = dev_get_regmap(pdev->dev.parent, NULL);
	88	+ if (!info->regmap) {
	89	+ dev_err(&pdev->dev, "failed to get vibrator regmap.\n");
	90	+ return -ENODEV;
	91	+ }
	92	+
	93	+ error = device_property_read_u32(&pdev->dev, "reg", &info->base);
	94	+ if (error) {
	95	+ dev_err(&pdev->dev, "failed to get vibrator base address.\n");
	96	+ return error;
	97	+ }
	98	+
	99	+ info->input_dev = devm_input_allocate_device(&pdev->dev);
	100	+ if (!info->input_dev) {
	101	+ dev_err(&pdev->dev, "failed to allocate input device.\n");
	102	+ return -ENOMEM;
	103	+ }
	104	+
	105	+ info->input_dev->name = "sc27xx:vibrator";
	106	+ info->input_dev->id.version = 0;
	107	+ info->input_dev->close = sc27xx_vibra_close;
	108	+
	109	+ input_set_drvdata(info->input_dev, info);
	110	+ input_set_capability(info->input_dev, EV_FF, FF_RUMBLE);
	111	+ INIT_WORK(&info->play_work, sc27xx_vibra_play_work);
	112	+ info->enabled = false;
	113	+
	114	+ error = sc27xx_vibra_hw_init(info);
	115	+ if (error) {
	116	+ dev_err(&pdev->dev, "failed to initialize the vibrator.\n");
	117	+ return error;
	118	+ }
	119	+
	120	+ error = input_ff_create_memless(info->input_dev, NULL,
	121	+ sc27xx_vibra_play);
	122	+ if (error) {
	123	+ dev_err(&pdev->dev, "failed to register vibrator to FF.\n");
	124	+ return error;
	125	+ }
	126	+
	127	+ error = input_register_device(info->input_dev);
	128	+ if (error) {
	129	+ dev_err(&pdev->dev, "failed to register input device.\n");
	130	+ return error;
	131	+ }
	132	+
	133	+ return 0;
	134	+}
	135	+
	136	+static const struct of_device_id sc27xx_vibra_of_match[] = {
	137	+ { .compatible = "sprd,sc2731-vibrator", },
	138	+ {}
	139	+};
	140	+MODULE_DEVICE_TABLE(of, sc27xx_vibra_of_match);
	141	+
	142	+static struct platform_driver sc27xx_vibra_driver = {
	143	+ .driver = {
	144	+ .name = "sc27xx-vibrator",
	145	+ .of_match_table = sc27xx_vibra_of_match,
	146	+ },
	147	+ .probe = sc27xx_vibra_probe,
	148	+};
	149	+
	150	+module_platform_driver(sc27xx_vibra_driver);
	151	+
	152	+MODULE_DESCRIPTION("Spreadtrum SC27xx Vibrator Driver");
	153	+MODULE_LICENSE("GPL v2");
	154	+MODULE_AUTHOR("Xiaotong Lu <xiaotong.lu@spreadtrum.com>");

drivers/input/mouse/elan_i2c.h+2−0

@@ -27,6 +27,8 @@ · 26 unmodified lines
27	27	#define ETP_DISABLE_POWER 0x0001
28	28	#define ETP_PRESSURE_OFFSET 25
29	29
	30	+#define ETP_CALIBRATE_MAX_LEN 3
	31	+
30	32	/* IAP Firmware handling */
31	33	#define ETP_PRODUCT_ID_FORMAT_STRING "%d.0"
32	34	#define ETP_FW_NAME "elan_i2c_" ETP_PRODUCT_ID_FORMAT_STRING ".bin"

drivers/input/mouse/elan_i2c_core.c+4−1

@@ -613,7 +613,7 @@ static ssize_t calibrate_store(struct device *dev, · 612 unmodified lines
613	613	int tries = 20;
614	614	int retval;
615	615	int error;
616		− u8 val[3];
	616	+ u8 val[ETP_CALIBRATE_MAX_LEN];
617	617
618	618	retval = mutex_lock_interruptible(&data->sysfs_mutex);
619	619	if (retval)
@@ -1345,6 +1345,9 @@ static const struct acpi_device_id elan_acpi_id[] = { · 725 unmodified lines
1345	1345	{ "ELAN060C", 0 },
1346	1346	{ "ELAN0611", 0 },
1347	1347	{ "ELAN0612", 0 },
	1348	+ { "ELAN0618", 0 },
	1349	+ { "ELAN061D", 0 },
	1350	+ { "ELAN0622", 0 },
1348	1351	{ "ELAN1000", 0 },
1349	1352	{ }
1350	1353	};

drivers/input/mouse/elan_i2c_smbus.c+8−2

@@ -56,7 +56,7 @@ · 55 unmodified lines
56	56	static int elan_smbus_initialize(struct i2c_client *client)
57	57	{
58	58	u8 check[ETP_SMBUS_HELLOPACKET_LEN] = { 0x55, 0x55, 0x55, 0x55, 0x55 };
59		− u8 values[ETP_SMBUS_HELLOPACKET_LEN] = { 0, 0, 0, 0, 0 };
	59	+ u8 values[I2C_SMBUS_BLOCK_MAX] = {0};
60	60	int len, error;
61	61
62	62	/* Get hello packet */
@@ -117,12 +117,16 @@ static int elan_smbus_calibrate(struct i2c_client *client) · 54 unmodified lines
117	117	static int elan_smbus_calibrate_result(struct i2c_client client, u8 val)
118	118	{
119	119	int error;
	120	+ u8 buf[I2C_SMBUS_BLOCK_MAX] = {0};
	121	+
	122	+ BUILD_BUG_ON(ETP_CALIBRATE_MAX_LEN > sizeof(buf));
120	123
121	124	error = i2c_smbus_read_block_data(client,
122		− ETP_SMBUS_CALIBRATE_QUERY, val);
	125	+ ETP_SMBUS_CALIBRATE_QUERY, buf);
123	126	if (error < 0)
124	127	return error;
125	128
	129	+ memcpy(val, buf, ETP_CALIBRATE_MAX_LEN);
126	130	return 0;
127	131	}
128	132
@@ -472,6 +476,8 @@ static int elan_smbus_get_report(struct i2c_client client, u8 report) · 343 unmodified lines
472	476	{
473	477	int len;
474	478
	479	+ BUILD_BUG_ON(I2C_SMBUS_BLOCK_MAX > ETP_SMBUS_REPORT_LEN);
	480	+
475	481	len = i2c_smbus_read_block_data(client,
476	482	ETP_SMBUS_PACKET_QUERY,
477	483	&report[ETP_SMBUS_REPORT_OFFSET]);

drivers/input/mouse/elantech.c+9−2

@@ -799,7 +799,7 @@ static int elantech_packet_check_v4(struct psmouse *psmouse) · 798 unmodified lines
799	799	else if (ic_version == 7 && etd->info.samples[1] == 0x2A)
800	800	sanity_check = ((packet[3] & 0x1c) == 0x10);
801	801	else
802		− sanity_check = ((packet[0] & 0x0c) == 0x04 &&
	802	+ sanity_check = ((packet[0] & 0x08) == 0x00 &&
803	803	(packet[3] & 0x1c) == 0x10);
804	804
805	805	if (!sanity_check)
@@ -1175,6 +1175,12 @@ static const struct dmi_system_id elantech_dmi_has_middle_button[] = { · 369 unmodified lines
1175	1175	{ }
1176	1176	};
1177	1177
	1178	+static const char * const middle_button_pnp_ids[] = {
	1179	+ "LEN2131", /* ThinkPad P52 w/ NFC */
	1180	+ "LEN2132", /* ThinkPad P52 */
	1181	+ NULL
	1182	+};
	1183	+
1178	1184	/*
1179	1185	* Set the appropriate event bits for the input subsystem
1180	1186	*/
@@ -1194,7 +1200,8 @@ static int elantech_set_input_params(struct psmouse *psmouse) · 13 unmodified lines
1194	1200	__clear_bit(EV_REL, dev->evbit);
1195	1201
1196	1202	__set_bit(BTN_LEFT, dev->keybit);
1197		− if (dmi_check_system(elantech_dmi_has_middle_button))
	1203	+ if (dmi_check_system(elantech_dmi_has_middle_button) \|\|
	1204	+ psmouse_matches_pnp_id(psmouse, middle_button_pnp_ids))
1198	1205	__set_bit(BTN_MIDDLE, dev->keybit);
1199	1206	__set_bit(BTN_RIGHT, dev->keybit);
1200	1207

drivers/input/mouse/psmouse-base.c+6−6

@@ -192,8 +192,8 @@ psmouse_ret_t psmouse_process_byte(struct psmouse *psmouse) · 191 unmodified lines
192	192	else
193	193	input_report_rel(dev, REL_WHEEL, -wheel);
194	194
195		− input_report_key(dev, BTN_SIDE, BIT(4));
196		− input_report_key(dev, BTN_EXTRA, BIT(5));
	195	+ input_report_key(dev, BTN_SIDE, packet[3] & BIT(4));
	196	+ input_report_key(dev, BTN_EXTRA, packet[3] & BIT(5));
197	197	break;
198	198	}
199	199	break;
@@ -203,13 +203,13 @@ psmouse_ret_t psmouse_process_byte(struct psmouse *psmouse) · 3 unmodified lines
203	203	input_report_rel(dev, REL_WHEEL, -(s8) packet[3]);
204	204
205	205	/* Extra buttons on Genius NewNet 3D */
206		− input_report_key(dev, BTN_SIDE, BIT(6));
207		− input_report_key(dev, BTN_EXTRA, BIT(7));
	206	+ input_report_key(dev, BTN_SIDE, packet[0] & BIT(6));
	207	+ input_report_key(dev, BTN_EXTRA, packet[0] & BIT(7));
208	208	break;
209	209
210	210	case PSMOUSE_THINKPS:
211	211	/* Extra button on ThinkingMouse */
212		− input_report_key(dev, BTN_EXTRA, BIT(3));
	212	+ input_report_key(dev, BTN_EXTRA, packet[0] & BIT(3));
213	213
214	214	/*
215	215	* Without this bit of weirdness moving up gives wildly
@@ -223,7 +223,7 @@ psmouse_ret_t psmouse_process_byte(struct psmouse *psmouse) · 7 unmodified lines
223	223	* Cortron PS2 Trackball reports SIDE button in the
224	224	* 4th bit of the first byte.
225	225	*/
226		− input_report_key(dev, BTN_SIDE, BIT(3));
	226	+ input_report_key(dev, BTN_SIDE, packet[0] & BIT(3));
227	227	packet[0] \|= BIT(3);
228	228	break;
229	229

drivers/input/rmi4/Kconfig+1−0

@@ -3,6 +3,7 @@ · 2 unmodified lines
3	3	#
4	4	config RMI4_CORE
5	5	tristate "Synaptics RMI4 bus support"
	6	+ select IRQ_DOMAIN
6	7	help
7	8	Say Y here if you want to support the Synaptics RMI4 bus. This is
8	9	required for all RMI4 device support.

drivers/input/rmi4/rmi_2d_sensor.c+16−18

@@ -32,15 +32,15 @@ void rmi_2d_sensor_abs_process(struct rmi_2d_sensor *sensor, · 31 unmodified lines
32	32	if (obj->type == RMI_2D_OBJECT_NONE)
33	33	return;
34	34
35		− if (axis_align->swap_axes)
36		− swap(obj->x, obj->y);
37		−
38	35	if (axis_align->flip_x)
39	36	obj->x = sensor->max_x - obj->x;
40	37
41	38	if (axis_align->flip_y)
42	39	obj->y = sensor->max_y - obj->y;
43	40
	41	+ if (axis_align->swap_axes)
	42	+ swap(obj->x, obj->y);
	43	+
44	44	/*
45	45	* Here checking if X offset or y offset are specified is
46	46	* redundant. We just add the offsets or clip the values.
@@ -120,15 +120,15 @@ void rmi_2d_sensor_rel_report(struct rmi_2d_sensor *sensor, int x, int y) · 73 unmodified lines
120	120	x = min(RMI_2D_REL_POS_MAX, max(RMI_2D_REL_POS_MIN, (int)x));
121	121	y = min(RMI_2D_REL_POS_MAX, max(RMI_2D_REL_POS_MIN, (int)y));
122	122
123		− if (axis_align->swap_axes)
124		− swap(x, y);
125		−
126	123	if (axis_align->flip_x)
127	124	x = min(RMI_2D_REL_POS_MAX, -x);
128	125
129	126	if (axis_align->flip_y)
130	127	y = min(RMI_2D_REL_POS_MAX, -y);
131	128
	129	+ if (axis_align->swap_axes)
	130	+ swap(x, y);
	131	+
132	132	if (x \|\| y) {
133	133	input_report_rel(sensor->input, REL_X, x);
134	134	input_report_rel(sensor->input, REL_Y, y);
@@ -141,17 +141,10 @@ static void rmi_2d_sensor_set_input_params(struct rmi_2d_sensor *sensor) · 6 unmodified lines
141	141	struct input_dev *input = sensor->input;
142	142	int res_x;
143	143	int res_y;
	144	+ int max_x, max_y;
144	145	int input_flags = 0;
145	146
146	147	if (sensor->report_abs) {
147		− if (sensor->axis_align.swap_axes) {
148		− swap(sensor->max_x, sensor->max_y);
149		− swap(sensor->axis_align.clip_x_low,
150		− sensor->axis_align.clip_y_low);
151		− swap(sensor->axis_align.clip_x_high,
152		− sensor->axis_align.clip_y_high);
153		− }
154		−
155	148	sensor->min_x = sensor->axis_align.clip_x_low;
156	149	if (sensor->axis_align.clip_x_high)
157	150	sensor->max_x = min(sensor->max_x,
@@ -163,14 +156,19 @@ static void rmi_2d_sensor_set_input_params(struct rmi_2d_sensor *sensor) · 5 unmodified lines
163	156	sensor->axis_align.clip_y_high);
164	157
165	158	set_bit(EV_ABS, input->evbit);
166		− input_set_abs_params(input, ABS_MT_POSITION_X, 0, sensor->max_x,
167		− 0, 0);
168		− input_set_abs_params(input, ABS_MT_POSITION_Y, 0, sensor->max_y,
169		− 0, 0);
	159	+
	160	+ max_x = sensor->max_x;
	161	+ max_y = sensor->max_y;
	162	+ if (sensor->axis_align.swap_axes)
	163	+ swap(max_x, max_y);
	164	+ input_set_abs_params(input, ABS_MT_POSITION_X, 0, max_x, 0, 0);
	165	+ input_set_abs_params(input, ABS_MT_POSITION_Y, 0, max_y, 0, 0);
170	166
171	167	if (sensor->x_mm && sensor->y_mm) {
172	168	res_x = (sensor->max_x - sensor->min_x) / sensor->x_mm;
173	169	res_y = (sensor->max_y - sensor->min_y) / sensor->y_mm;
	170	+ if (sensor->axis_align.swap_axes)
	171	+ swap(res_x, res_y);
174	172
175	173	input_abs_set_res(input, ABS_X, res_x);
176	174	input_abs_set_res(input, ABS_Y, res_y);

drivers/input/rmi4/rmi_bus.c+49−1

@@ -9,6 +9,8 @@ · 8 unmodified lines
9	9
10	10	#include <linux/kernel.h>
11	11	#include <linux/device.h>
	12	+#include <linux/irq.h>
	13	+#include <linux/irqdomain.h>
12	14	#include <linux/list.h>
13	15	#include <linux/pm.h>
14	16	#include <linux/rmi.h>
@@ -167,6 +169,39 @@ static inline void rmi_function_of_probe(struct rmi_function *fn) · 152 unmodified lines
167	169	{}
168	170	#endif
169	171
	172	+static struct irq_chip rmi_irq_chip = {
	173	+ .name = "rmi4",
	174	+};
	175	+
	176	+static int rmi_create_function_irq(struct rmi_function *fn,
	177	+ struct rmi_function_handler *handler)
	178	+{
	179	+ struct rmi_driver_data *drvdata = dev_get_drvdata(&fn->rmi_dev->dev);
	180	+ int i, error;
	181	+
	182	+ for (i = 0; i < fn->num_of_irqs; i++) {
	183	+ set_bit(fn->irq_pos + i, fn->irq_mask);
	184	+
	185	+ fn->irq[i] = irq_create_mapping(drvdata->irqdomain,
	186	+ fn->irq_pos + i);
	187	+
	188	+ irq_set_chip_data(fn->irq[i], fn);
	189	+ irq_set_chip_and_handler(fn->irq[i], &rmi_irq_chip,
	190	+ handle_simple_irq);
	191	+ irq_set_nested_thread(fn->irq[i], 1);
	192	+
	193	+ error = devm_request_threaded_irq(&fn->dev, fn->irq[i], NULL,
	194	+ handler->attention, IRQF_ONESHOT,
	195	+ dev_name(&fn->dev), fn);
	196	+ if (error) {
	197	+ dev_err(&fn->dev, "Error %d registering IRQ\n", error);
	198	+ return error;
	199	+ }
	200	+ }
	201	+
	202	+ return 0;
	203	+}
	204	+
170	205	static int rmi_function_probe(struct device *dev)
171	206	{
172	207	struct rmi_function *fn = to_rmi_function(dev);
@@ -178,7 +213,14 @@ static int rmi_function_probe(struct device *dev) · 5 unmodified lines
178	213
179	214	if (handler->probe) {
180	215	error = handler->probe(fn);
181		− return error;
	216	+ if (error)
	217	+ return error;
	218	+ }
	219	+
	220	+ if (fn->num_of_irqs && handler->attention) {
	221	+ error = rmi_create_function_irq(fn, handler);
	222	+ if (error)
	223	+ return error;
182	224	}
183	225
184	226	return 0;
@@ -230,12 +272,18 @@ err_put_device: · 45 unmodified lines
230	272
231	273	void rmi_unregister_function(struct rmi_function *fn)
232	274	{
	275	+ int i;
	276	+
233	277	rmi_dbg(RMI_DEBUG_CORE, &fn->dev, "Unregistering F%02X.\n",
234	278	fn->fd.function_number);
235	279
236	280	device_del(&fn->dev);
237	281	of_node_put(fn->dev.of_node);
238	282	put_device(&fn->dev);
	283	+
	284	+ for (i = 0; i < fn->num_of_irqs; i++)
	285	+ irq_dispose_mapping(fn->irq[i]);
	286	+
239	287	}
240	288
241	289	/**

drivers/input/rmi4/rmi_bus.h+9−1

@@ -14,6 +14,12 @@ · 13 unmodified lines
14	14
15	15	struct rmi_device;
16	16
	17	+/*
	18	+ * The interrupt source count in the function descriptor can represent up to
	19	+ * 6 interrupt sources in the normal manner.
	20	+ */
	21	+#define RMI_FN_MAX_IRQS 6
	22	+
17	23	/**
18	24	* struct rmi_function - represents the implementation of an RMI4
19	25	* function for a particular device (basically, a driver for that RMI4 function)
@@ -26,6 +32,7 @@ struct rmi_device; · 6 unmodified lines
26	32	* @irq_pos: The position in the irq bitfield this function holds
27	33	* @irq_mask: For convenience, can be used to mask IRQ bits off during ATTN
28	34	* interrupt handling.
	35	+ * @irqs: assigned virq numbers (up to num_of_irqs)
29	36	*
30	37	* @node: entry in device's list of functions
31	38	*/
@@ -36,6 +43,7 @@ struct rmi_function { · 4 unmodified lines
36	43	struct list_head node;
37	44
38	45	unsigned int num_of_irqs;
	46	+ int irq[RMI_FN_MAX_IRQS];
39	47	unsigned int irq_pos;
40	48	unsigned long irq_mask[];
41	49	};
@@ -76,7 +84,7 @@ struct rmi_function_handler { · 34 unmodified lines
76	84	void (remove)(struct rmi_function fn);
77	85	int (config)(struct rmi_function fn);
78	86	int (reset)(struct rmi_function fn);
79		− int (attention)(struct rmi_function fn, unsigned long *irq_bits);
	87	+ irqreturn_t (attention)(int irq, void ctx);
80	88	int (suspend)(struct rmi_function fn);
81	89	int (resume)(struct rmi_function fn);
82	90	};

drivers/input/rmi4/rmi_driver.c+20−32

@@ -21,6 +21,7 @@ · 20 unmodified lines
21	21	#include <linux/pm.h>
22	22	#include <linux/slab.h>
23	23	#include <linux/of.h>
	24	+#include <linux/irqdomain.h>
24	25	#include <uapi/linux/input.h>
25	26	#include <linux/rmi.h>
26	27	#include "rmi_bus.h"
@@ -127,28 +128,11 @@ static int rmi_driver_process_config_requests(struct rmi_device *rmi_dev) · 100 unmodified lines
127	128	return 0;
128	129	}
129	130
130		−static void process_one_interrupt(struct rmi_driver_data *data,
131		− struct rmi_function *fn)
132		−{
133		− struct rmi_function_handler *fh;
134		−
135		− if (!fn \|\| !fn->dev.driver)
136		− return;
137		−
138		− fh = to_rmi_function_handler(fn->dev.driver);
139		− if (fh->attention) {
140		− bitmap_and(data->fn_irq_bits, data->irq_status, fn->irq_mask,
141		− data->irq_count);
142		− if (!bitmap_empty(data->fn_irq_bits, data->irq_count))
143		− fh->attention(fn, data->fn_irq_bits);
144		− }
145		−}
146		−
147	131	static int rmi_process_interrupt_requests(struct rmi_device *rmi_dev)
148	132	{
149	133	struct rmi_driver_data *data = dev_get_drvdata(&rmi_dev->dev);
150	134	struct device *dev = &rmi_dev->dev;
151		− struct rmi_function *entry;
	135	+ int i;
152	136	int error;
153	137
154	138	if (!data)
@@ -173,16 +157,8 @@ static int rmi_process_interrupt_requests(struct rmi_device *rmi_dev) · 18 unmodified lines
173	157	*/
174	158	mutex_unlock(&data->irq_mutex);
175	159
176		− /*
177		− * It would be nice to be able to use irq_chip to handle these
178		− * nested IRQs. Unfortunately, most of the current customers for
179		− * this driver are using older kernels (3.0.x) that don't support
180		− * the features required for that. Once they've shifted to more
181		− * recent kernels (say, 3.3 and higher), this should be switched to
182		− * use irq_chip.
183		− */
184		− list_for_each_entry(entry, &data->function_list, node)
185		− process_one_interrupt(data, entry);
	160	+ for_each_set_bit(i, data->irq_status, data->irq_count)
	161	+ handle_nested_irq(irq_find_mapping(data->irqdomain, i));
186	162
187	163	if (data->input)
188	164	input_sync(data->input);
@@ -1001,9 +977,13 @@ EXPORT_SYMBOL_GPL(rmi_driver_resume); · 812 unmodified lines
1001	977	static int rmi_driver_remove(struct device *dev)
1002	978	{
1003	979	struct rmi_device *rmi_dev = to_rmi_device(dev);
	980	+ struct rmi_driver_data *data = dev_get_drvdata(&rmi_dev->dev);
1004	981
1005	982	rmi_disable_irq(rmi_dev, false);
1006	983
	984	+ irq_domain_remove(data->irqdomain);
	985	+ data->irqdomain = NULL;
	986	+
1007	987	rmi_f34_remove_sysfs(rmi_dev);
1008	988	rmi_free_function_list(rmi_dev);
1009	989
@@ -1035,7 +1015,8 @@ int rmi_probe_interrupts(struct rmi_driver_data *data) · 25 unmodified lines
1035	1015	{
1036	1016	struct rmi_device *rmi_dev = data->rmi_dev;
1037	1017	struct device *dev = &rmi_dev->dev;
1038		− int irq_count;
	1018	+ struct fwnode_handle *fwnode = rmi_dev->xport->dev->fwnode;
	1019	+ int irq_count = 0;
1039	1020	size_t size;
1040	1021	int retval;
1041	1022
@@ -1046,7 +1027,6 @@ int rmi_probe_interrupts(struct rmi_driver_data *data) · 4 unmodified lines
1046	1027	* being accessed.
1047	1028	*/
1048	1029	rmi_dbg(RMI_DEBUG_CORE, dev, "%s: Counting IRQs.\n", __func__);
1049		− irq_count = 0;
1050	1030	data->bootloader_mode = false;
1051	1031
1052	1032	retval = rmi_scan_pdt(rmi_dev, &irq_count, rmi_count_irqs);
@@ -1058,6 +1038,15 @@ int rmi_probe_interrupts(struct rmi_driver_data *data) · 5 unmodified lines
1058	1038	if (data->bootloader_mode)
1059	1039	dev_warn(dev, "Device in bootloader mode.\n");
1060	1040
	1041	+ /* Allocate and register a linear revmap irq_domain */
	1042	+ data->irqdomain = irq_domain_create_linear(fwnode, irq_count,
	1043	+ &irq_domain_simple_ops,
	1044	+ data);
	1045	+ if (!data->irqdomain) {
	1046	+ dev_err(&rmi_dev->dev, "Failed to create IRQ domain\n");
	1047	+ return -ENOMEM;
	1048	+ }
	1049	+
1061	1050	data->irq_count = irq_count;
1062	1051	data->num_of_irq_regs = (data->irq_count + 7) / 8;
1063	1052
@@ -1080,10 +1069,9 @@ int rmi_init_functions(struct rmi_driver_data *data) · 16 unmodified lines
1080	1069	{
1081	1070	struct rmi_device *rmi_dev = data->rmi_dev;
1082	1071	struct device *dev = &rmi_dev->dev;
1083		− int irq_count;
	1072	+ int irq_count = 0;
1084	1073	int retval;
1085	1074
1086		− irq_count = 0;
1087	1075	rmi_dbg(RMI_DEBUG_CORE, dev, "%s: Creating functions.\n", __func__);
1088	1076	retval = rmi_scan_pdt(rmi_dev, &irq_count, rmi_create_function);
1089	1077	if (retval < 0) {

drivers/input/rmi4/rmi_f01.c+5−5

@@ -681,9 +681,9 @@ static int rmi_f01_resume(struct rmi_function *fn) · 680 unmodified lines
681	681	return 0;
682	682	}
683	683
684		−static int rmi_f01_attention(struct rmi_function *fn,
685		− unsigned long *irq_bits)
	684	+static irqreturn_t rmi_f01_attention(int irq, void *ctx)
686	685	{
	686	+ struct rmi_function *fn = ctx;
687	687	struct rmi_device *rmi_dev = fn->rmi_dev;
688	688	int error;
689	689	u8 device_status;
@@ -692,7 +692,7 @@ static int rmi_f01_attention(struct rmi_function *fn, · 2 unmodified lines
692	692	if (error) {
693	693	dev_err(&fn->dev,
694	694	"Failed to read device status: %d.\n", error);
695		− return error;
	695	+ return IRQ_RETVAL(error);
696	696	}
697	697
698	698	if (RMI_F01_STATUS_BOOTLOADER(device_status))
@@ -704,11 +704,11 @@ static int rmi_f01_attention(struct rmi_function *fn, · 5 unmodified lines
704	704	error = rmi_dev->driver->reset_handler(rmi_dev);
705	705	if (error) {
706	706	dev_err(&fn->dev, "Device reset failed: %d\n", error);
707		− return error;
	707	+ return IRQ_RETVAL(error);
708	708	}
709	709	}
710	710
711		− return 0;
	711	+ return IRQ_HANDLED;
712	712	}
713	713
714	714	struct rmi_function_handler rmi_f01_handler = {

drivers/input/rmi4/rmi_f03.c+5−4

@@ -244,8 +244,9 @@ static int rmi_f03_config(struct rmi_function *fn) · 243 unmodified lines
244	244	return 0;
245	245	}
246	246
247		−static int rmi_f03_attention(struct rmi_function fn, unsigned long irq_bits)
	247	+static irqreturn_t rmi_f03_attention(int irq, void *ctx)
248	248	{
	249	+ struct rmi_function *fn = ctx;
249	250	struct rmi_device *rmi_dev = fn->rmi_dev;
250	251	struct rmi_driver_data *drvdata = dev_get_drvdata(&rmi_dev->dev);
251	252	struct f03_data *f03 = dev_get_drvdata(&fn->dev);
@@ -262,7 +263,7 @@ static int rmi_f03_attention(struct rmi_function fn, unsigned long irq_bits) · 10 unmodified lines
262	263	/* First grab the data passed by the transport device */
263	264	if (drvdata->attn_data.size < ob_len) {
264	265	dev_warn(&fn->dev, "F03 interrupted, but data is missing!\n");
265		− return 0;
	266	+ return IRQ_HANDLED;
266	267	}
267	268
268	269	memcpy(obs, drvdata->attn_data.data, ob_len);
@@ -277,7 +278,7 @@ static int rmi_f03_attention(struct rmi_function fn, unsigned long irq_bits) · 8 unmodified lines
277	278	"%s: Failed to read F03 output buffers: %d\n",
278	279	__func__, error);
279	280	serio_interrupt(f03->serio, 0, SERIO_TIMEOUT);
280		− return error;
	281	+ return IRQ_RETVAL(error);
281	282	}
282	283	}
283	284
@@ -303,7 +304,7 @@ static int rmi_f03_attention(struct rmi_function fn, unsigned long irq_bits) · 19 unmodified lines
303	304	serio_interrupt(f03->serio, ob_data, serio_flags);
304	305	}
305	306
306		− return 0;
	307	+ return IRQ_HANDLED;
307	308	}
308	309
309	310	static void rmi_f03_remove(struct rmi_function *fn)

drivers/input/rmi4/rmi_f11.c+16−26

@@ -570,9 +570,7 @@ static inline u8 rmi_f11_parse_finger_state(const u8 *f_state, u8 n_finger) · 569 unmodified lines
570	570	}
571	571
572	572	static void rmi_f11_finger_handler(struct f11_data *f11,
573		− struct rmi_2d_sensor *sensor,
574		− unsigned long *irq_bits, int num_irq_regs,
575		− int size)
	573	+ struct rmi_2d_sensor *sensor, int size)
576	574	{
577	575	const u8 *f_state = f11->data.f_state;
578	576	u8 finger_state;
@@ -581,12 +579,7 @@ static void rmi_f11_finger_handler(struct f11_data *f11, · 2 unmodified lines
581	579	int rel_fingers;
582	580	int abs_size = sensor->nbr_fingers * RMI_F11_ABS_BYTES;
583	581
584		− int abs_bits = bitmap_and(f11->result_bits, irq_bits, f11->abs_mask,
585		− num_irq_regs * 8);
586		− int rel_bits = bitmap_and(f11->result_bits, irq_bits, f11->rel_mask,
587		− num_irq_regs * 8);
588		−
589		− if (abs_bits) {
	582	+ if (sensor->report_abs) {
590	583	if (abs_size > size)
591	584	abs_fingers = size / RMI_F11_ABS_BYTES;
592	585	else
@@ -604,19 +597,7 @@ static void rmi_f11_finger_handler(struct f11_data *f11, · 11 unmodified lines
604	597	rmi_f11_abs_pos_process(f11, sensor, &sensor->objs[i],
605	598	finger_state, i);
606	599	}
607		− }
608	600
609		− if (rel_bits) {
610		− if ((abs_size + sensor->nbr_fingers * RMI_F11_REL_BYTES) > size)
611		− rel_fingers = (size - abs_size) / RMI_F11_REL_BYTES;
612		− else
613		− rel_fingers = sensor->nbr_fingers;
614		−
615		− for (i = 0; i < rel_fingers; i++)
616		− rmi_f11_rel_pos_report(f11, i);
617		− }
618		−
619		− if (abs_bits) {
620	601	/*
621	602	* the absolute part is made in 2 parts to allow the kernel
622	603	* tracking to take place.
@@ -638,7 +619,16 @@ static void rmi_f11_finger_handler(struct f11_data *f11, · 15 unmodified lines
638	619	}
639	620
640	621	input_mt_sync_frame(sensor->input);
	622	+ } else if (sensor->report_rel) {
	623	+ if ((abs_size + sensor->nbr_fingers * RMI_F11_REL_BYTES) > size)
	624	+ rel_fingers = (size - abs_size) / RMI_F11_REL_BYTES;
	625	+ else
	626	+ rel_fingers = sensor->nbr_fingers;
	627	+
	628	+ for (i = 0; i < rel_fingers; i++)
	629	+ rmi_f11_rel_pos_report(f11, i);
641	630	}
	631	+
642	632	}
643	633
644	634	static int f11_2d_construct_data(struct f11_data *f11)
@@ -1276,8 +1266,9 @@ static int rmi_f11_config(struct rmi_function *fn) · 631 unmodified lines
1276	1266	return 0;
1277	1267	}
1278	1268
1279		−static int rmi_f11_attention(struct rmi_function fn, unsigned long irq_bits)
	1269	+static irqreturn_t rmi_f11_attention(int irq, void *ctx)
1280	1270	{
	1271	+ struct rmi_function *fn = ctx;
1281	1272	struct rmi_device *rmi_dev = fn->rmi_dev;
1282	1273	struct rmi_driver_data *drvdata = dev_get_drvdata(&rmi_dev->dev);
1283	1274	struct f11_data *f11 = dev_get_drvdata(&fn->dev);
@@ -1303,13 +1294,12 @@ static int rmi_f11_attention(struct rmi_function fn, unsigned long irq_bits) · 19 unmodified lines
1303	1294	data_base_addr, f11->sensor.data_pkt,
1304	1295	f11->sensor.pkt_size);
1305	1296	if (error < 0)
1306		− return error;
	1297	+ return IRQ_RETVAL(error);
1307	1298	}
1308	1299
1309		− rmi_f11_finger_handler(f11, &f11->sensor, irq_bits,
1310		− drvdata->num_of_irq_regs, valid_bytes);
	1300	+ rmi_f11_finger_handler(f11, &f11->sensor, valid_bytes);
1311	1301
1312		− return 0;
	1302	+ return IRQ_HANDLED;
1313	1303	}
1314	1304
1315	1305	static int rmi_f11_resume(struct rmi_function *fn)

drivers/input/rmi4/rmi_f12.c+4−4

@@ -197,10 +197,10 @@ static void rmi_f12_process_objects(struct f12_data f12, u8 data1, int size) · 196 unmodified lines
197	197	rmi_2d_sensor_abs_report(sensor, &sensor->objs[i], i);
198	198	}
199	199
200		−static int rmi_f12_attention(struct rmi_function *fn,
201		− unsigned long *irq_nr_regs)
	200	+static irqreturn_t rmi_f12_attention(int irq, void *ctx)
202	201	{
203	202	int retval;
	203	+ struct rmi_function *fn = ctx;
204	204	struct rmi_device *rmi_dev = fn->rmi_dev;
205	205	struct rmi_driver_data *drvdata = dev_get_drvdata(&rmi_dev->dev);
206	206	struct f12_data *f12 = dev_get_drvdata(&fn->dev);
@@ -222,7 +222,7 @@ static int rmi_f12_attention(struct rmi_function *fn, · 15 unmodified lines
222	222	if (retval < 0) {
223	223	dev_err(&fn->dev, "Failed to read object data. Code: %d.\n",
224	224	retval);
225		− return retval;
	225	+ return IRQ_RETVAL(retval);
226	226	}
227	227	}
228	228
@@ -232,7 +232,7 @@ static int rmi_f12_attention(struct rmi_function *fn, · 3 unmodified lines
232	232
233	233	input_mt_sync_frame(sensor->input);
234	234
235		− return 0;
	235	+ return IRQ_HANDLED;
236	236	}
237	237
238	238	static int rmi_f12_write_control_regs(struct rmi_function *fn)

drivers/input/rmi4/rmi_f30.c+5−4

@@ -122,8 +122,9 @@ static void rmi_f30_report_button(struct rmi_function *fn, · 121 unmodified lines
122	122	}
123	123	}
124	124
125		−static int rmi_f30_attention(struct rmi_function fn, unsigned long irq_bits)
	125	+static irqreturn_t rmi_f30_attention(int irq, void *ctx)
126	126	{
	127	+ struct rmi_function *fn = ctx;
127	128	struct f30_data *f30 = dev_get_drvdata(&fn->dev);
128	129	struct rmi_driver_data *drvdata = dev_get_drvdata(&fn->rmi_dev->dev);
129	130	int error;
@@ -134,7 +135,7 @@ static int rmi_f30_attention(struct rmi_function fn, unsigned long irq_bits) · 4 unmodified lines
134	135	if (drvdata->attn_data.size < f30->register_count) {
135	136	dev_warn(&fn->dev,
136	137	"F30 interrupted, but data is missing\n");
137		− return 0;
	138	+ return IRQ_HANDLED;
138	139	}
139	140	memcpy(f30->data_regs, drvdata->attn_data.data,
140	141	f30->register_count);
@@ -147,7 +148,7 @@ static int rmi_f30_attention(struct rmi_function fn, unsigned long irq_bits) · 6 unmodified lines
147	148	dev_err(&fn->dev,
148	149	"%s: Failed to read F30 data registers: %d\n",
149	150	__func__, error);
150		− return error;
	151	+ return IRQ_RETVAL(error);
151	152	}
152	153	}
153	154
@@ -159,7 +160,7 @@ static int rmi_f30_attention(struct rmi_function fn, unsigned long irq_bits) · 5 unmodified lines
159	160	rmi_f03_commit_buttons(f30->f03);
160	161	}
161	162
162		− return 0;
	163	+ return IRQ_HANDLED;
163	164	}
164	165
165	166	static int rmi_f30_config(struct rmi_function *fn)

drivers/input/rmi4/rmi_f34.c+3−2

@@ -100,8 +100,9 @@ static int rmi_f34_command(struct f34_data *f34, u8 command, · 99 unmodified lines
100	100	return 0;
101	101	}
102	102
103		−static int rmi_f34_attention(struct rmi_function fn, unsigned long irq_bits)
	103	+static irqreturn_t rmi_f34_attention(int irq, void *ctx)
104	104	{
	105	+ struct rmi_function *fn = ctx;
105	106	struct f34_data *f34 = dev_get_drvdata(&fn->dev);
106	107	int ret;
107	108	u8 status;
@@ -126,7 +127,7 @@ static int rmi_f34_attention(struct rmi_function fn, unsigned long irq_bits) · 18 unmodified lines
126	127	complete(&f34->v7.cmd_done);
127	128	}
128	129
129		− return 0;
	130	+ return IRQ_HANDLED;
130	131	}
131	132
132	133	static int rmi_f34_write_blocks(struct f34_data f34, const void data,

drivers/input/rmi4/rmi_f54.c+0−6

@@ -610,11 +610,6 @@ error: · 609 unmodified lines
610	610	mutex_unlock(&f54->data_mutex);
611	611	}
612	612
613		−static int rmi_f54_attention(struct rmi_function fn, unsigned long irqbits)
614		−{
615		− return 0;
616		−}
617		−
618	613	static int rmi_f54_config(struct rmi_function *fn)
619	614	{
620	615	struct rmi_driver *drv = fn->rmi_dev->driver;
@@ -756,6 +751,5 @@ struct rmi_function_handler rmi_f54_handler = { · 135 unmodified lines
756	751	.func = 0x54,
757	752	.probe = rmi_f54_probe,
758	753	.config = rmi_f54_config,
759		− .attention = rmi_f54_attention,
760	754	.remove = rmi_f54_remove,
761	755	};

drivers/input/serio/i8042-x86ia64io.h+7−0

@@ -527,6 +527,13 @@ static const struct dmi_system_id __initconst i8042_dmi_nomux_table[] = { · 526 unmodified lines
527	527	DMI_MATCH(DMI_PRODUCT_NAME, "N24_25BU"),
528	528	},
529	529	},
	530	+ {
	531	+ /* Lenovo LaVie Z */
	532	+ .matches = {
	533	+ DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
	534	+ DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo LaVie Z"),
	535	+ },
	536	+ },
530	537	{ }
531	538	};
532	539

drivers/input/touchscreen/silead.c+1−0

@@ -603,6 +603,7 @@ static const struct acpi_device_id silead_ts_acpi_match[] = { · 602 unmodified lines
603	603	{ "GSL3692", 0 },
604	604	{ "MSSL1680", 0 },
605	605	{ "MSSL0001", 0 },
	606	+ { "MSSL0002", 0 },
606	607	{ }
607	608	};
608	609	MODULE_DEVICE_TABLE(acpi, silead_ts_acpi_match);

drivers/iommu/Kconfig+0−1

@@ -142,7 +142,6 @@ config DMAR_TABLE · 141 unmodified lines
142	142	config INTEL_IOMMU
143	143	bool "Support for Intel IOMMU using DMA Remapping Devices"
144	144	depends on PCI_MSI && ACPI && (X86 \|\| IA64_GENERIC)
145		− select DMA_DIRECT_OPS
146	145	select IOMMU_API
147	146	select IOMMU_IOVA
148	147	select NEED_DMA_MAP_STATE

drivers/iommu/intel-iommu.c+76−18

@@ -31,7 +31,6 @@ · 30 unmodified lines
31	31	#include <linux/pci.h>
32	32	#include <linux/dmar.h>
33	33	#include <linux/dma-mapping.h>
34		−#include <linux/dma-direct.h>
35	34	#include <linux/mempool.h>
36	35	#include <linux/memory.h>
37	36	#include <linux/cpu.h>
@@ -485,14 +484,37 @@ static int dmar_forcedac; · 447 unmodified lines
485	484	static int intel_iommu_strict;
486	485	static int intel_iommu_superpage = 1;
487	486	static int intel_iommu_ecs = 1;
	487	+static int intel_iommu_pasid28;
488	488	static int iommu_identity_mapping;
489	489
490	490	#define IDENTMAP_ALL 1
491	491	#define IDENTMAP_GFX 2
492	492	#define IDENTMAP_AZALIA 4
493	493
494		−#define ecs_enabled(iommu) (intel_iommu_ecs && ecap_ecs(iommu->ecap))
495		−#define pasid_enabled(iommu) (ecs_enabled(iommu) && ecap_pasid(iommu->ecap))
	494	+/* Broadwell and Skylake have broken ECS support — normal so-called "second
	495	+ * level" translation of DMA requests-without-PASID doesn't actually happen
	496	+ * unless you also set the NESTE bit in an extended context-entry. Which of
	497	+ * course means that SVM doesn't work because it's trying to do nested
	498	+ * translation of the physical addresses it finds in the process page tables,
	499	+ * through the IOVA->phys mapping found in the "second level" page tables.
	500	+ *
	501	+ * The VT-d specification was retroactively changed to change the definition
	502	+ * of the capability bits and pretend that Broadwell/Skylake never happened...
	503	+ * but unfortunately the wrong bit was changed. It's ECS which is broken, but
	504	+ * for some reason it was the PASID capability bit which was redefined (from
	505	+ * bit 28 on BDW/SKL to bit 40 in future).
	506	+ *
	507	+ * So our test for ECS needs to eschew those implementations which set the old
	508	+ * PASID capabiity bit 28, since those are the ones on which ECS is broken.
	509	+ * Unless we are working around the 'pasid28' limitations, that is, by putting
	510	+ * the device into passthrough mode for normal DMA and thus masking the bug.
	511	+ */
	512	+#define ecs_enabled(iommu) (intel_iommu_ecs && ecap_ecs(iommu->ecap) && \
	513	+ (intel_iommu_pasid28 \|\| !ecap_broken_pasid(iommu->ecap)))
	514	+/* PASID support is thus enabled if ECS is enabled and either of the old
	515	+ * or new capability bits are set. */
	516	+#define pasid_enabled(iommu) (ecs_enabled(iommu) && \
	517	+ (ecap_pasid(iommu->ecap) \|\| ecap_broken_pasid(iommu->ecap)))
496	518
497	519	int intel_iommu_gfx_mapped;
498	520	EXPORT_SYMBOL_GPL(intel_iommu_gfx_mapped);
@@ -555,6 +577,11 @@ static int __init intel_iommu_setup(char *str) · 56 unmodified lines
555	577	printk(KERN_INFO
556	578	"Intel-IOMMU: disable extended context table support\n");
557	579	intel_iommu_ecs = 0;
	580	+ } else if (!strncmp(str, "pasid28", 7)) {
	581	+ printk(KERN_INFO
	582	+ "Intel-IOMMU: enable pre-production PASID support\n");
	583	+ intel_iommu_pasid28 = 1;
	584	+ iommu_identity_mapping \|= IDENTMAP_GFX;
558	585	} else if (!strncmp(str, "tboot_noforce", 13)) {
559	586	printk(KERN_INFO
560	587	"Intel-IOMMU: not forcing on after tboot. This could expose security risk for tboot\n");
@@ -3713,30 +3740,61 @@ static void intel_alloc_coherent(struct device dev, size_t size, · 3152 unmodified lines
3713	3740	dma_addr_t *dma_handle, gfp_t flags,
3714	3741	unsigned long attrs)
3715	3742	{
3716		− void *vaddr;
	3743	+ struct page *page = NULL;
	3744	+ int order;
3717	3745
3718		− vaddr = dma_direct_alloc(dev, size, dma_handle, flags, attrs);
3719		− if (iommu_no_mapping(dev) \|\| !vaddr)
3720		− return vaddr;
	3746	+ size = PAGE_ALIGN(size);
	3747	+ order = get_order(size);
3721	3748
3722		− *dma_handle = __intel_map_single(dev, virt_to_phys(vaddr),
3723		− PAGE_ALIGN(size), DMA_BIDIRECTIONAL,
3724		− dev->coherent_dma_mask);
3725		− if (!*dma_handle)
3726		− goto out_free_pages;
3727		− return vaddr;
	3749	+ if (!iommu_no_mapping(dev))
	3750	+ flags &= ~(GFP_DMA \| GFP_DMA32);
	3751	+ else if (dev->coherent_dma_mask < dma_get_required_mask(dev)) {
	3752	+ if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
	3753	+ flags \|= GFP_DMA;
	3754	+ else
	3755	+ flags \|= GFP_DMA32;
	3756	+ }
	3757	+
	3758	+ if (gfpflags_allow_blocking(flags)) {
	3759	+ unsigned int count = size >> PAGE_SHIFT;
	3760	+
	3761	+ page = dma_alloc_from_contiguous(dev, count, order, flags);
	3762	+ if (page && iommu_no_mapping(dev) &&
	3763	+ page_to_phys(page) + size > dev->coherent_dma_mask) {
	3764	+ dma_release_from_contiguous(dev, page, count);
	3765	+ page = NULL;
	3766	+ }
	3767	+ }
	3768	+
	3769	+ if (!page)
	3770	+ page = alloc_pages(flags, order);
	3771	+ if (!page)
	3772	+ return NULL;
	3773	+ memset(page_address(page), 0, size);
	3774	+
	3775	+ *dma_handle = __intel_map_single(dev, page_to_phys(page), size,
	3776	+ DMA_BIDIRECTIONAL,
	3777	+ dev->coherent_dma_mask);
	3778	+ if (*dma_handle)
	3779	+ return page_address(page);
	3780	+ if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT))
	3781	+ __free_pages(page, order);
3728	3782
3729		−out_free_pages:
3730		− dma_direct_free(dev, size, vaddr, *dma_handle, attrs);
3731	3783	return NULL;
3732	3784	}
3733	3785
3734	3786	static void intel_free_coherent(struct device dev, size_t size, void vaddr,
3735	3787	dma_addr_t dma_handle, unsigned long attrs)
3736	3788	{
3737		− if (!iommu_no_mapping(dev))
3738		− intel_unmap(dev, dma_handle, PAGE_ALIGN(size));
3739		− dma_direct_free(dev, size, vaddr, dma_handle, attrs);
	3789	+ int order;
	3790	+ struct page *page = virt_to_page(vaddr);
	3791	+
	3792	+ size = PAGE_ALIGN(size);
	3793	+ order = get_order(size);
	3794	+
	3795	+ intel_unmap(dev, dma_handle, size);
	3796	+ if (!dma_release_from_contiguous(dev, page, size >> PAGE_SHIFT))
	3797	+ __free_pages(page, order);
3740	3798	}
3741	3799
3742	3800	static void intel_unmap_sg(struct device dev, struct scatterlist sglist,

drivers/irqchip/irq-gic-v2m.c+1−1

@@ -199,7 +199,7 @@ static int gicv2m_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, · 198 unmodified lines
199	199
200	200	fail:
201	201	irq_domain_free_irqs_parent(domain, virq, nr_irqs);
202		− gicv2m_unalloc_msi(v2m, hwirq, get_count_order(nr_irqs));
	202	+ gicv2m_unalloc_msi(v2m, hwirq, nr_irqs);
203	203	return err;
204	204	}
205	205

drivers/irqchip/irq-gic-v3-its.c+50−12

@@ -182,6 +182,22 @@ static struct its_collection dev_event_to_col(struct its_device its_dev, · 181 unmodified lines
182	182	return its->collections + its_dev->event_map.col_map[event];
183	183	}
184	184
	185	+static struct its_collection valid_col(struct its_collection col)
	186	+{
	187	+ if (WARN_ON_ONCE(col->target_address & GENMASK_ULL(0, 15)))
	188	+ return NULL;
	189	+
	190	+ return col;
	191	+}
	192	+
	193	+static struct its_vpe valid_vpe(struct its_node its, struct its_vpe *vpe)
	194	+{
	195	+ if (valid_col(its->collections + vpe->col_idx))
	196	+ return vpe;
	197	+
	198	+ return NULL;
	199	+}
	200	+
185	201	/*
186	202	* ITS command descriptors - parameters to be encoded in a command
187	203	* block.
@@ -439,7 +455,7 @@ static struct its_collection its_build_mapti_cmd(struct its_node its, · 251 unmodified lines
439	455
440	456	its_fixup_cmd(cmd);
441	457
442		− return col;
	458	+ return valid_col(col);
443	459	}
444	460
445	461	static struct its_collection its_build_movi_cmd(struct its_node its,
@@ -458,7 +474,7 @@ static struct its_collection its_build_movi_cmd(struct its_node its, · 12 unmodified lines
458	474
459	475	its_fixup_cmd(cmd);
460	476
461		− return col;
	477	+ return valid_col(col);
462	478	}
463	479
464	480	static struct its_collection its_build_discard_cmd(struct its_node its,
@@ -476,7 +492,7 @@ static struct its_collection its_build_discard_cmd(struct its_node its, · 11 unmodified lines
476	492
477	493	its_fixup_cmd(cmd);
478	494
479		− return col;
	495	+ return valid_col(col);
480	496	}
481	497
482	498	static struct its_collection its_build_inv_cmd(struct its_node its,
@@ -494,7 +510,7 @@ static struct its_collection its_build_inv_cmd(struct its_node its, · 11 unmodified lines
494	510
495	511	its_fixup_cmd(cmd);
496	512
497		− return col;
	513	+ return valid_col(col);
498	514	}
499	515
500	516	static struct its_collection its_build_int_cmd(struct its_node its,
@@ -512,7 +528,7 @@ static struct its_collection its_build_int_cmd(struct its_node its, · 11 unmodified lines
512	528
513	529	its_fixup_cmd(cmd);
514	530
515		− return col;
	531	+ return valid_col(col);
516	532	}
517	533
518	534	static struct its_collection its_build_clear_cmd(struct its_node its,
@@ -530,7 +546,7 @@ static struct its_collection its_build_clear_cmd(struct its_node its, · 11 unmodified lines
530	546
531	547	its_fixup_cmd(cmd);
532	548
533		− return col;
	549	+ return valid_col(col);
534	550	}
535	551
536	552	static struct its_collection its_build_invall_cmd(struct its_node its,
@@ -554,7 +570,7 @@ static struct its_vpe its_build_vinvall_cmd(struct its_node its, · 17 unmodified lines
554	570
555	571	its_fixup_cmd(cmd);
556	572
557		− return desc->its_vinvall_cmd.vpe;
	573	+ return valid_vpe(its, desc->its_vinvall_cmd.vpe);
558	574	}
559	575
560	576	static struct its_vpe its_build_vmapp_cmd(struct its_node its,
@@ -576,7 +592,7 @@ static struct its_vpe its_build_vmapp_cmd(struct its_node its, · 15 unmodified lines
576	592
577	593	its_fixup_cmd(cmd);
578	594
579		− return desc->its_vmapp_cmd.vpe;
	595	+ return valid_vpe(its, desc->its_vmapp_cmd.vpe);
580	596	}
581	597
582	598	static struct its_vpe its_build_vmapti_cmd(struct its_node its,
@@ -599,7 +615,7 @@ static struct its_vpe its_build_vmapti_cmd(struct its_node its, · 16 unmodified lines
599	615
600	616	its_fixup_cmd(cmd);
601	617
602		− return desc->its_vmapti_cmd.vpe;
	618	+ return valid_vpe(its, desc->its_vmapti_cmd.vpe);
603	619	}
604	620
605	621	static struct its_vpe its_build_vmovi_cmd(struct its_node its,
@@ -622,7 +638,7 @@ static struct its_vpe its_build_vmovi_cmd(struct its_node its, · 16 unmodified lines
622	638
623	639	its_fixup_cmd(cmd);
624	640
625		− return desc->its_vmovi_cmd.vpe;
	641	+ return valid_vpe(its, desc->its_vmovi_cmd.vpe);
626	642	}
627	643
628	644	static struct its_vpe its_build_vmovp_cmd(struct its_node its,
@@ -640,7 +656,7 @@ static struct its_vpe its_build_vmovp_cmd(struct its_node its, · 11 unmodified lines
640	656
641	657	its_fixup_cmd(cmd);
642	658
643		− return desc->its_vmovp_cmd.vpe;
	659	+ return valid_vpe(its, desc->its_vmovp_cmd.vpe);
644	660	}
645	661
646	662	static u64 its_cmd_ptr_to_offset(struct its_node *its,
@@ -1824,11 +1840,16 @@ static int its_alloc_tables(struct its_node *its) · 1177 unmodified lines
1824	1840
1825	1841	static int its_alloc_collections(struct its_node *its)
1826	1842	{
	1843	+ int i;
	1844	+
1827	1845	its->collections = kcalloc(nr_cpu_ids, sizeof(*its->collections),
1828	1846	GFP_KERNEL);
1829	1847	if (!its->collections)
1830	1848	return -ENOMEM;
1831	1849
	1850	+ for (i = 0; i < nr_cpu_ids; i++)
	1851	+ its->collections[i].target_address = ~0ULL;
	1852	+
1832	1853	return 0;
1833	1854	}
1834	1855
@@ -2310,7 +2331,14 @@ static int its_irq_domain_activate(struct irq_domain *domain, · 475 unmodified lines
2310	2331	cpu_mask = cpumask_of_node(its_dev->its->numa_node);
2311	2332
2312	2333	/* Bind the LPI to the first possible CPU */
2313		− cpu = cpumask_first(cpu_mask);
	2334	+ cpu = cpumask_first_and(cpu_mask, cpu_online_mask);
	2335	+ if (cpu >= nr_cpu_ids) {
	2336	+ if (its_dev->its->flags & ITS_FLAGS_WORKAROUND_CAVIUM_23144)
	2337	+ return -EINVAL;
	2338	+
	2339	+ cpu = cpumask_first(cpu_online_mask);
	2340	+ }
	2341	+
2314	2342	its_dev->event_map.col_map[event] = cpu;
2315	2343	irq_data_update_effective_affinity(d, cpumask_of(cpu));
2316	2344
@@ -3399,6 +3427,16 @@ static int redist_disable_lpis(void) · 1082 unmodified lines
3399	3427	u64 timeout = USEC_PER_SEC;
3400	3428	u64 val;
3401	3429
	3430	+ /*
	3431	+ * If coming via a CPU hotplug event, we don't need to disable
	3432	+ * LPIs before trying to re-enable them. They are already
	3433	+ * configured and all is well in the world. Detect this case
	3434	+ * by checking the allocation of the pending table for the
	3435	+ * current CPU.
	3436	+ */
	3437	+ if (gic_data_rdist()->pend_page)
	3438	+ return 0;
	3439	+
3402	3440	if (!gic_rdists_supports_plpis()) {
3403	3441	pr_info("CPU%d: LPIs not supported\n", smp_processor_id());
3404	3442	return -ENXIO;

drivers/irqchip/irq-ls-scfg-msi.c+7−3

@@ -93,8 +93,12 @@ static void ls_scfg_msi_compose_msg(struct irq_data data, struct msi_msg msg) · 92 unmodified lines
93	93	msg->address_lo = lower_32_bits(msi_data->msiir_addr);
94	94	msg->data = data->hwirq;
95	95
96		− if (msi_affinity_flag)
97		− msg->data \|= cpumask_first(data->common->affinity);
	96	+ if (msi_affinity_flag) {
	97	+ const struct cpumask *mask;
	98	+
	99	+ mask = irq_data_get_effective_affinity_mask(data);
	100	+ msg->data \|= cpumask_first(mask);
	101	+ }
98	102
99	103	iommu_dma_map_msi_msg(data->irq, msg);
100	104	}
@@ -121,7 +125,7 @@ static int ls_scfg_msi_set_affinity(struct irq_data *irq_data, · 20 unmodified lines

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drivers/net/can/mscan/mpc5xxx_can.c+5−0

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drivers/net/can/peak_canfd/peak_pciefd_main.c+19−0

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drivers/net/dsa/mv88e6xxx/chip.c+15−10

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drivers/net/ethernet/3com/Kconfig+1−1

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drivers/net/ethernet/amazon/ena/ena_com.c+1−0

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drivers/net/ethernet/amd/Kconfig+3−3

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drivers/net/ethernet/amd/xgbe/xgbe-mdio.c+2−2

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drivers/net/ethernet/apm/xgene-v2/Kconfig+0−1

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drivers/net/ethernet/aquantia/atlantic/aq_cfg.h+0−2

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drivers/net/ethernet/aquantia/atlantic/aq_hw.h+3−1

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drivers/net/ethernet/aquantia/atlantic/aq_main.c+2−9

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drivers/net/ethernet/aquantia/atlantic/aq_nic.c+27−20

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drivers/net/ethernet/aquantia/atlantic/aq_nic.h+1−1

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drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_a0.c+1−1

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drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_b0.c+3−3

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drivers/net/ethernet/arc/Kconfig+4−2

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drivers/net/ethernet/atheros/alx/main.c+7−1

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drivers/net/ethernet/atheros/atl1c/atl1c_main.c+1−0

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drivers/net/ethernet/broadcom/Kconfig+0−2

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drivers/net/ethernet/broadcom/bcmsysport.c+2−2

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drivers/net/ethernet/broadcom/bcmsysport.h+2−1

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drivers/net/ethernet/broadcom/bnx2x/bnx2x.h+1−0

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drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c+6−0

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drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c+10−3

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drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c+6−0

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drivers/net/ethernet/broadcom/bnxt/bnxt.c+17−7

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drivers/net/ethernet/broadcom/bnxt/bnxt.h+0−1

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drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c+27−3

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drivers/net/ethernet/broadcom/bnxt/bnxt_ulp.c+0−2

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drivers/net/ethernet/broadcom/cnic.c+1−1

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drivers/net/ethernet/broadcom/tg3.c+13−0

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drivers/net/ethernet/broadcom/tg3.h+2−0

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drivers/net/ethernet/cadence/macb.h+11−0

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drivers/net/ethernet/cadence/macb_main.c+27−11

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drivers/net/ethernet/cadence/macb_ptp.c+1−4

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drivers/net/ethernet/calxeda/Kconfig+1−1

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drivers/net/ethernet/cavium/Kconfig+6−6

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drivers/net/ethernet/cavium/liquidio/lio_main.c+4−1

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drivers/net/ethernet/cavium/octeon/octeon_mgmt.c+11−3

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drivers/net/ethernet/cavium/thunder/thunder_bgx.c+2−0

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drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c+2−0

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drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c+2−4

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drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c+3−1

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drivers/net/ethernet/chelsio/cxgb4/t4_hw.c+13−22

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drivers/net/ethernet/cirrus/Kconfig+1−0

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drivers/net/ethernet/cisco/enic/enic_clsf.c+1−2

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drivers/net/ethernet/cisco/enic/enic_main.c+34−58

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drivers/net/ethernet/faraday/ftgmac100.c+2−2

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drivers/net/ethernet/freescale/dpaa/dpaa_eth.c+8−7

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drivers/net/ethernet/freescale/fman/fman_port.c+8−0

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drivers/net/ethernet/hisilicon/Kconfig+1−1

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drivers/net/ethernet/huawei/hinic/hinic_main.c+1−0

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drivers/net/ethernet/huawei/hinic/hinic_rx.c+1−0

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drivers/net/ethernet/huawei/hinic/hinic_tx.c+1−0

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drivers/net/ethernet/ibm/ibmvnic.c+29−14

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drivers/net/ethernet/intel/i40e/i40e_txrx.c+18−13

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drivers/net/ethernet/intel/ixgbe/ixgbe_common.c+11−1

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drivers/net/ethernet/intel/ixgbe/ixgbe_ipsec.c+1−1

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drivers/net/ethernet/intel/ixgbe/ixgbe_main.c+14−10

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drivers/net/ethernet/marvell/Kconfig+3−5

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drivers/net/ethernet/marvell/mvneta.c+1−1

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drivers/net/ethernet/mellanox/mlx4/en_rx.c+6−2

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drivers/net/ethernet/mellanox/mlx4/resource_tracker.c+1−1

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drivers/net/ethernet/mellanox/mlx5/core/alloc.c+1−1

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drivers/net/ethernet/mellanox/mlx5/core/cmd.c+4−4

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drivers/net/ethernet/mellanox/mlx5/core/en.h+0−2

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drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c+5−2

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drivers/net/ethernet/mellanox/mlx5/core/en_dcbnl.c+21−28

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drivers/net/ethernet/mellanox/mlx5/core/en_main.c+8−7

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drivers/net/ethernet/mellanox/mlx5/core/en_rep.c+6−2

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drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+8−4

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drivers/net/ethernet/mellanox/mlx5/core/eswitch.c+8−10

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drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+2−2

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drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+3−2

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drivers/net/ethernet/mellanox/mlx5/core/fw.c+3−2

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drivers/net/ethernet/mellanox/mlx5/core/ipoib/ipoib.c+4−0

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drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c+10−2

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drivers/net/ethernet/mellanox/mlx5/core/lib/mpfs.c+5−4

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drivers/net/ethernet/mellanox/mlx5/core/port.c+2−2

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drivers/net/ethernet/mellanox/mlx5/core/sriov.c+6−1

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drivers/net/ethernet/mellanox/mlx5/core/vport.c+0−2

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drivers/net/ethernet/mellanox/mlx5/core/wq.c+22−12

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drivers/net/ethernet/mellanox/mlxsw/Kconfig+1−1

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drivers/net/ethernet/mellanox/mlxsw/core_acl_flex_actions.c+29−22

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drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c+24−24

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drivers/net/ethernet/mscc/ocelot.c+6−5

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drivers/net/ethernet/netronome/nfp/bpf/main.c+6−3

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drivers/net/ethernet/netronome/nfp/flower/main.c+3−1

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drivers/net/ethernet/netronome/nfp/flower/match.c+14−0

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drivers/net/ethernet/netronome/nfp/flower/offload.c+11−0

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drivers/net/ethernet/netronome/nfp/flower/tunnel_conf.c+1−1

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drivers/net/ethernet/netronome/nfp/nfp_main.c+1−5

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drivers/net/ethernet/netronome/nfp/nfpcore/nfp_nffw.c+1−1

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drivers/net/ethernet/qlogic/qed/qed.h+1−0

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drivers/net/ethernet/qlogic/qed/qed_dcbx.c+8−11

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drivers/net/ethernet/qlogic/qed/qed_debug.c+1−1

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drivers/net/ethernet/qlogic/qed/qed_dev.c+1−1

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drivers/net/ethernet/qlogic/qed/qed_l2.c+7−8

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drivers/net/ethernet/qlogic/qed/qed_l2.h+1−1

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drivers/net/ethernet/qlogic/qed/qed_ll2.c+9−2

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drivers/net/ethernet/qlogic/qed/qed_main.c+19−3

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drivers/net/ethernet/qlogic/qed/qed_mcp.c+37−15

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drivers/net/ethernet/qlogic/qed/qed_sriov.c+18−3

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drivers/net/ethernet/qlogic/qed/qed_vf.c+2−2

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drivers/net/ethernet/qlogic/qed/qed_vf.h+6−1

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drivers/net/ethernet/qlogic/qede/qede_ptp.c+8−2

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drivers/net/ethernet/qlogic/qlcnic/qlcnic_sysfs.c+2−0

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drivers/net/ethernet/qualcomm/qca_spi.c+12−9

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drivers/net/ethernet/realtek/r8169.c+3−3

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drivers/net/ethernet/renesas/Kconfig+0−2

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drivers/net/ethernet/renesas/ravb_main.c+17−76

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drivers/net/ethernet/renesas/sh_eth.c+17−77

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drivers/net/ethernet/sfc/ef10.c+21−9

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drivers/net/ethernet/sfc/efx.c+9−9

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drivers/net/ethernet/sfc/farch.c+1−0

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drivers/net/ethernet/stmicro/stmmac/Kconfig+1−1

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drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c+14−4

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drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c+1−1

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drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c+12−0

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drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h+2−0

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drivers/net/ethernet/stmicro/stmmac/hwif.h+3−0

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drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+13−1

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drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c+38−2

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drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c+0−1

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drivers/net/ethernet/sun/sungem.c+12−10

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drivers/net/ethernet/ti/cpsw.c+11−14

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drivers/net/ethernet/ti/cpsw_ale.c+1−1

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drivers/net/ethernet/ti/davinci_cpdma.c+1−1

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drivers/net/ethernet/ti/davinci_emac.c+17−2

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drivers/net/ethernet/xilinx/xilinx_axienet_mdio.c+1−0

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drivers/net/geneve.c+1−1

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drivers/net/hamradio/bpqether.c+2−6

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drivers/net/hyperv/hyperv_net.h+1−1

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drivers/net/hyperv/netvsc.c+46−8

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drivers/net/hyperv/netvsc_drv.c+16−1

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drivers/net/hyperv/rndis_filter.c+13−49

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drivers/net/ieee802154/adf7242.c+32−2

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drivers/net/ieee802154/at86rf230.c+5−10

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drivers/net/ieee802154/fakelb.c+1−1

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drivers/net/ieee802154/mcr20a.c+2−1

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drivers/net/ipvlan/ipvlan_main.c+31−9

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drivers/net/net_failover.c+1−1

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drivers/net/netdevsim/devlink.c+1−0

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drivers/net/phy/dp83tc811.c+1−1

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drivers/net/phy/marvell.c+36−18

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drivers/net/phy/mdio-mux-bcm-iproc.c+1−1

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drivers/net/phy/phy.c+1−1

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drivers/net/phy/phy_device.c+2−5

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drivers/net/phy/sfp-bus.c+26−9

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drivers/net/ppp/pppoe.c+1−1

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drivers/net/tun.c+1−1

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drivers/net/usb/asix_devices.c+3−1

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drivers/net/usb/cdc_ncm.c+1−2

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drivers/net/usb/lan78xx.c+40−4

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drivers/net/usb/qmi_wwan.c+2−0

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drivers/net/usb/r8152.c+2−1

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drivers/net/usb/rtl8150.c+1−1

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drivers/net/usb/smsc75xx.c+62−0

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drivers/net/virtio_net.c+38−25

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drivers/net/vxlan.c+88−42

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drivers/net/wan/lmc/lmc_main.c+1−1

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drivers/net/wireless/ath/ath10k/mac.c+14−2

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drivers/net/wireless/ath/ath10k/wmi.h+1−0

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drivers/net/wireless/ath/wcn36xx/testmode.c+1−1

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drivers/net/wireless/broadcom/brcm80211/Kconfig+0−1

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drivers/net/wireless/broadcom/brcm80211/brcmfmac/pcie.c+2−1

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drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c+7−0

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drivers/net/wireless/intel/iwlwifi/cfg/9000.c+69−0

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drivers/net/wireless/intel/iwlwifi/iwl-config.h+5−0

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drivers/net/wireless/intel/iwlwifi/pcie/drv.c+22−0

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drivers/net/wireless/marvell/mwifiex/usb.c+2−5

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drivers/net/wireless/mediatek/mt7601u/phy.c+4−2

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drivers/net/wireless/quantenna/qtnfmac/Kconfig+1−1

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drivers/net/wireless/quantenna/qtnfmac/cfg80211.c+1−2

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drivers/net/wireless/realtek/rtlwifi/base.c+10−7

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drivers/net/wireless/realtek/rtlwifi/base.h+1−1

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drivers/net/wireless/realtek/rtlwifi/core.c+1−2

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drivers/net/wireless/realtek/rtlwifi/pci.c+1−1

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drivers/net/wireless/realtek/rtlwifi/ps.c+2−2

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drivers/net/wireless/realtek/rtlwifi/usb.c+1−1

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drivers/net/xen-netfront.c+16−9

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drivers/nfc/pn533/usb.c+2−2

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drivers/nvdimm/claim.c+1−0

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drivers/nvdimm/pmem.c+2−1

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drivers/nvme/host/core.c+35−29

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drivers/nvme/host/fabrics.c+7−3

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drivers/nvme/host/fabrics.h+2−1

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drivers/nvme/host/fc.c+4−4

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drivers/nvme/host/nvme.h+1−0

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drivers/nvme/host/pci.c+41−7

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drivers/nvme/host/rdma.c+41−37

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drivers/nvme/target/configfs.c+7−2

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drivers/nvme/target/core.c+9−1

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drivers/nvme/target/fc.c+35−9

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drivers/nvme/target/loop.c+1−1

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drivers/nvmem/core.c+4−0

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drivers/of/base.c+3−3

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drivers/of/of_private.h+2−0

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drivers/of/overlay.c+11−0

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drivers/opp/core.c+1−1

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drivers/pci/Makefile+3−3

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drivers/pci/bus.c+3−3

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drivers/pci/controller/Kconfig+0−3

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drivers/pci/controller/dwc/Kconfig+0−1

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drivers/pci/controller/dwc/pcie-designware-host.c+2−1

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drivers/pci/controller/pci-aardvark.c+1−1

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drivers/pci/controller/pci-ftpci100.c+3−1

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drivers/pci/controller/pci-hyperv.c+5−3

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drivers/pci/controller/pci-v3-semi.c+1−1

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drivers/pci/controller/pci-versatile.c+1−1

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drivers/pci/controller/pci-xgene.c+1−1

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drivers/pci/controller/pcie-mediatek.c+1−1

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drivers/pci/controller/pcie-mobiveil.c+1−1

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drivers/pci/controller/pcie-rcar.c+13−3

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drivers/pci/controller/pcie-xilinx-nwl.c+1−1

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drivers/pci/controller/pcie-xilinx.c+1−0

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drivers/pci/endpoint/pci-epf-core.c+43−19

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drivers/pci/hotplug/acpi_pcihp.c+9−1

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drivers/pci/hotplug/acpiphp_glue.c+1−1

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drivers/pci/iov.c+16−0

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drivers/pci/of.c+1−1

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drivers/pci/pci-acpi.c+12−0

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drivers/pci/pci-driver.c+1−0

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drivers/pci/pci.c+38−0

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drivers/pci/pci.h+15−0

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drivers/pci/pcie/err.c+2−0

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drivers/pci/probe.c+2−2

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drivers/pci/remove.c+3−2

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drivers/perf/xgene_pmu.c+1−1

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drivers/phy/broadcom/phy-brcm-usb-init.c+4−0

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drivers/phy/motorola/phy-mapphone-mdm6600.c+2−2

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drivers/pinctrl/actions/pinctrl-owl.c+1−1

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drivers/pinctrl/bcm/pinctrl-nsp-mux.c+4−2

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drivers/pinctrl/devicetree.c+5−2

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drivers/pinctrl/mediatek/pinctrl-mt7622.c+38−16

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drivers/pinctrl/mediatek/pinctrl-mtk-common.c+0−5

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drivers/pinctrl/pinctrl-ingenic.c+1−1

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drivers/pinctrl/pinctrl-single.c+11−3

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drivers/pinctrl/sh-pfc/pfc-r8a77970.c+6−8

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drivers/platform/x86/dell-laptop.c+1−1

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drivers/ptp/ptp_chardev.c+3−2

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drivers/ptp/ptp_qoriq.c+1−1

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drivers/rtc/interface.c+5−3

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drivers/rtc/rtc-mrst.c+1−3

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drivers/s390/block/dasd.c+67−117

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drivers/s390/block/dasd_alias.c+3−3

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drivers/s390/block/dasd_diag.c+2−1

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drivers/s390/block/dasd_eckd.c+25−21

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drivers/s390/block/dasd_eer.c+5−5

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drivers/s390/block/dasd_fba.c+4−2

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drivers/s390/block/dasd_int.h+5−29

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drivers/s390/cio/Makefile+1−0

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drivers/s390/cio/vfio_ccw_cp.c+75−65

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drivers/s390/cio/vfio_ccw_drv.c+4−1

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drivers/s390/cio/vfio_ccw_fsm.c+16−1

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drivers/s390/cio/vfio_ccw_trace.h+54−0

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drivers/s390/net/qeth_core.h+12−1

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drivers/s390/net/qeth_core_main.c+28−19

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drivers/s390/net/qeth_l2_main.c+15−9

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drivers/s390/net/qeth_l3_main.c+2−1

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drivers/scsi/aacraid/aachba.c+7−8

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drivers/scsi/cxlflash/main.h+2−2

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drivers/scsi/cxlflash/ocxl_hw.c+2−3

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drivers/scsi/fcoe/fcoe_ctlr.c+3−3

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drivers/scsi/hpsa.c+21−4

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drivers/scsi/hpsa.h+1−0

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drivers/scsi/ipr.c+0−2

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drivers/scsi/libfc/fc_rport.c+1−0

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drivers/scsi/libiscsi.c+6−6

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drivers/scsi/mpt3sas/mpt3sas_base.c+8−8

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drivers/scsi/qedf/qedf_main.c+12−0

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drivers/scsi/qedi/qedi_main.c+12−1

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drivers/scsi/qla2xxx/qla_attr.c+1−0

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drivers/scsi/qla2xxx/qla_def.h+2−0

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drivers/scsi/qla2xxx/qla_gbl.h+1−0

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drivers/scsi/qla2xxx/qla_gs.c+30−14

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drivers/scsi/qla2xxx/qla_init.c+11−10

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drivers/scsi/qla2xxx/qla_inline.h+2−0

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drivers/scsi/qla2xxx/qla_iocb.c+27−26

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drivers/scsi/qla2xxx/qla_isr.c+3−0

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drivers/scsi/qla2xxx/qla_mbx.c+6−0

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drivers/scsi/qla2xxx/qla_mid.c+9−2

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drivers/scsi/qla2xxx/qla_os.c+24−31

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drivers/scsi/qla2xxx/qla_sup.c+3−0

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drivers/scsi/qla2xxx/qla_target.c+3−4

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drivers/scsi/scsi_debug.c+1−1

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drivers/scsi/scsi_error.c+14−0

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drivers/scsi/scsi_transport_fc.c+1−1

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drivers/scsi/sd_zbc.c+3−2

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drivers/scsi/sg.c+46−11

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drivers/scsi/sr.c+21−8

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drivers/scsi/vmw_pvscsi.c+8−3

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drivers/scsi/xen-scsifront.c+26−7

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drivers/soc/imx/gpc.c+21−0

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drivers/soc/imx/gpcv2.c+9−4

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drivers/soc/qcom/Kconfig+2−1

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drivers/soc/renesas/rcar-sysc.c+29−6

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drivers/staging/android/ashmem.c+2−0

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drivers/staging/android/ion/ion_heap.c+1−1

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drivers/staging/comedi/drivers/quatech_daqp_cs.c+1−1

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drivers/staging/ks7010/ks_hostif.c+6−6

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drivers/staging/media/omap4iss/iss_video.c+2−1

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drivers/staging/rtl8188eu/Kconfig+0−1

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drivers/staging/rtl8188eu/core/rtw_recv.c+114−47

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drivers/staging/rtl8188eu/core/rtw_security.c+46−46

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drivers/staging/rtl8723bs/core/rtw_ap.c+1−1

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drivers/staging/rtlwifi/rtl8822be/hw.c+1−1

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drivers/staging/rtlwifi/wifi.h+1−0

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drivers/staging/speakup/speakup_soft.c+5−1

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drivers/staging/typec/Kconfig+1−0

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drivers/target/iscsi/cxgbit/cxgbit_target.c+9−7

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drivers/target/target_core_pr.c+10−5

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drivers/target/target_core_user.c+36−8

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drivers/thunderbolt/domain.c+4−0

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drivers/tty/n_tty.c+32−23

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drivers/tty/serdev/core.c+1−0

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drivers/tty/serial/8250/8250_pci.c+0−2

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drivers/tty/vt/vt.c+2−2

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drivers/uio/uio.c+103−36

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drivers/usb/chipidea/Kconfig+1−8

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drivers/usb/chipidea/Makefile+1−2

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drivers/usb/chipidea/ci.h+0−8

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drivers/usb/chipidea/host.c+4−1

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drivers/usb/chipidea/ulpi.c+3−0

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drivers/usb/class/cdc-acm.c+6−0

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drivers/usb/core/hub.c+6−2

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drivers/usb/core/quirks.c+4−0

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drivers/usb/dwc2/core.h+3−0

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drivers/usb/dwc2/gadget.c+15−11

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drivers/usb/dwc2/hcd.c+118−29

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drivers/usb/dwc2/hcd.h+8−0

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drivers/usb/dwc2/hcd_intr.c+16−4

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drivers/usb/dwc2/hcd_queue.c+4−1

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drivers/usb/dwc3/core.c+13−10

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drivers/usb/dwc3/dwc3-of-simple.c+2−1

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drivers/usb/dwc3/dwc3-pci.c+2−0

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drivers/usb/dwc3/dwc3-qcom.c+5−8

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drivers/usb/dwc3/ep0.c+0−3

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drivers/usb/gadget/composite.c+3−1

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drivers/usb/gadget/function/f_fs.c+19−9

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drivers/usb/gadget/function/f_uac2.c+12−12

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drivers/usb/gadget/function/u_audio.c+33−55

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drivers/usb/gadget/udc/aspeed-vhub/Kconfig+1−0

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drivers/usb/gadget/udc/aspeed-vhub/ep0.c+10−1

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drivers/usb/gadget/udc/aspeed-vhub/epn.c+11−3

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drivers/usb/gadget/udc/aspeed-vhub/vhub.h+33−0

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drivers/usb/gadget/udc/r8a66597-udc.c+3−3

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drivers/usb/host/xhci-dbgcap.c+8−4

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drivers/usb/host/xhci-mem.c+3−3

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drivers/usb/host/xhci-tegra.c+3−3

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drivers/usb/host/xhci-trace.h+31−5

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drivers/usb/host/xhci.c+44−4

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drivers/usb/host/xhci.h+4−0

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drivers/usb/misc/yurex.c+6−17

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drivers/usb/phy/phy-fsl-usb.c+3−1

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drivers/usb/serial/ch341.c+1−1

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drivers/usb/serial/cp210x.c+15−0

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drivers/usb/serial/keyspan_pda.c+3−1

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drivers/usb/serial/mos7840.c+3−0

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drivers/usb/typec/tcpm.c+10−7

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drivers/usb/typec/ucsi/ucsi.c+13−0

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drivers/usb/typec/ucsi/ucsi_acpi.c+5−0

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drivers/vfio/pci/Kconfig+10−2

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drivers/vfio/pci/vfio_pci.c+4−0

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drivers/vfio/vfio_iommu_spapr_tce.c+5−5

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drivers/vfio/vfio_iommu_type1.c+7−9

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drivers/vhost/net.c+2−1

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drivers/vhost/vhost.c+6−3

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drivers/virtio/virtio_balloon.c+2−0

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drivers/xen/Makefile+1−1

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drivers/xen/events/events_base.c+0−2

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