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drm/sun4i: frontend: Add support for planar YUV input formats

Planar YUV formats come with 3 distinct planes, which requires configuring the frontend line stride and address registers for the third plane. Our hardware only supports the YUV planes order and in order to support formats with a YVU plane order, a helper is introduced to indicate whether to invert the address of the two chroma planes. Missing definitions for YUV411 and YUV444 input format configuration are also introduced as support is added for these formats. For the input sequence part, no configuration is required for planar YUV formats so zero is returned in that case.

Paul Kocialkowski committed 7 years ago

Commit 8c8152b1 parent 9afe52d3 files · +66 −1Browse files

Unified · Split

3 files
  1. drivers/gpu/drm/sun4i/sun4i_frontend.c +53 −1
  2. drivers/gpu/drm/sun4i/sun4i_frontend.h +5 −0
  3. drivers/gpu/drm/sun4i/sun4i_layer.c +8 −0
drivers/gpu/drm/sun4i/sun4i_frontend.c+53−1
@@ -107,12 +107,27 @@ void sun4i_frontend_exit(struct sun4i_frontend *frontend) · 106 unmodified lines
107107 }
108108 EXPORT_SYMBOL(sun4i_frontend_exit);
109109
110+static bool sun4i_frontend_format_chroma_requires_swap(uint32_t fmt)
111+{
112+ switch (fmt) {
113+ case DRM_FORMAT_YVU411:
114+ case DRM_FORMAT_YVU420:
115+ case DRM_FORMAT_YVU422:
116+ case DRM_FORMAT_YVU444:
117+ return true;
118+
119+ default:
120+ return false;
121+ }
122+}
123+
110124 void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend,
111125 struct drm_plane *plane)
112126 {
113127 struct drm_plane_state *state = plane->state;
114128 struct drm_framebuffer *fb = state->fb;
115129 dma_addr_t paddr;
130+ bool swap;
116131
117132 /* Set the line width */
118133 DRM_DEBUG_DRIVER("Frontend stride: %d bytes\n", fb->pitches[0]);
@@ -123,6 +138,13 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, · 4 unmodified lines
123138 regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD1_REG,
124139 fb->pitches[1]);
125140
141+ if (fb->format->num_planes > 2)
142+ regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD2_REG,
143+ fb->pitches[2]);
144+
145+ /* Some planar formats require chroma channel swapping by hand. */
146+ swap = sun4i_frontend_format_chroma_requires_swap(fb->format->format);
147+
126148 /* Set the physical address of the buffer in memory */
127149 paddr = drm_fb_cma_get_gem_addr(fb, state, 0);
128150 paddr -= PHYS_OFFSET;
@@ -130,12 +152,20 @@ void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend, · 1 unmodified line
130152 regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr);
131153
132154 if (fb->format->num_planes > 1) {
133− paddr = drm_fb_cma_get_gem_addr(fb, state, 1);
155+ paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 2 : 1);
134156 paddr -= PHYS_OFFSET;
135157 DRM_DEBUG_DRIVER("Setting buffer #1 address to %pad\n", &paddr);
136158 regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR1_REG,
137159 paddr);
138160 }
161+
162+ if (fb->format->num_planes > 2) {
163+ paddr = drm_fb_cma_get_gem_addr(fb, state, swap ? 1 : 2);
164+ paddr -= PHYS_OFFSET;
165+ DRM_DEBUG_DRIVER("Setting buffer #2 address to %pad\n", &paddr);
166+ regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR2_REG,
167+ paddr);
168+ }
139169 }
140170 EXPORT_SYMBOL(sun4i_frontend_update_buffer);
141171
@@ -145,10 +175,14 @@ sun4i_frontend_drm_format_to_input_fmt(const struct drm_format_info *format, · 3 unmodified lines
145175 {
146176 if (!format->is_yuv)
147177 *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB;
178+ else if (drm_format_info_is_yuv_sampling_411(format))
179+ *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV411;
148180 else if (drm_format_info_is_yuv_sampling_420(format))
149181 *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420;
150182 else if (drm_format_info_is_yuv_sampling_422(format))
151183 *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422;
184+ else if (drm_format_info_is_yuv_sampling_444(format))
185+ *val = SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV444;
152186 else
153187 return -EINVAL;
154188
@@ -168,6 +202,10 @@ sun4i_frontend_drm_format_to_input_mode(const struct drm_format_info *format, · 13 unmodified lines
168202 *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR;
169203 return 0;
170204
205+ case 3:
206+ *val = SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR;
207+ return 0;
208+
171209 default:
172210 return -EINVAL;
173211 }
@@ -177,6 +215,12 @@ static int · 3 unmodified lines
177215 sun4i_frontend_drm_format_to_input_sequence(const struct drm_format_info *format,
178216 u32 *val)
179217 {
218+ /* Planar formats have an explicit input sequence. */
219+ if (drm_format_info_is_yuv_planar(format)) {
220+ *val = 0;
221+ return 0;
222+ }
223+
180224 switch (format->format) {
181225 case DRM_FORMAT_BGRX8888:
182226 *val = SUN4I_FRONTEND_INPUT_FMT_DATA_PS_BGRX;
@@ -248,7 +292,15 @@ static const uint32_t sun4i_frontend_formats[] = { · 65 unmodified lines
248292 DRM_FORMAT_UYVY,
249293 DRM_FORMAT_VYUY,
250294 DRM_FORMAT_XRGB8888,
295+ DRM_FORMAT_YUV411,
296+ DRM_FORMAT_YUV420,
297+ DRM_FORMAT_YUV422,
298+ DRM_FORMAT_YUV444,
251299 DRM_FORMAT_YUYV,
300+ DRM_FORMAT_YVU411,
301+ DRM_FORMAT_YVU420,
302+ DRM_FORMAT_YVU422,
303+ DRM_FORMAT_YVU444,
252304 DRM_FORMAT_YVYU,
253305 };
254306
drivers/gpu/drm/sun4i/sun4i_frontend.h+5−0
@@ -23,15 +23,20 @@ · 22 unmodified lines
2323
2424 #define SUN4I_FRONTEND_BUF_ADDR0_REG 0x020
2525 #define SUN4I_FRONTEND_BUF_ADDR1_REG 0x024
26+#define SUN4I_FRONTEND_BUF_ADDR2_REG 0x028
2627
2728 #define SUN4I_FRONTEND_LINESTRD0_REG 0x040
2829 #define SUN4I_FRONTEND_LINESTRD1_REG 0x044
30+#define SUN4I_FRONTEND_LINESTRD2_REG 0x048
2931
3032 #define SUN4I_FRONTEND_INPUT_FMT_REG 0x04c
33+#define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PLANAR (0 << 8)
3134 #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_PACKED (1 << 8)
3235 #define SUN4I_FRONTEND_INPUT_FMT_DATA_MOD_SEMIPLANAR (2 << 8)
36+#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV444 (0 << 4)
3337 #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV422 (1 << 4)
3438 #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV420 (2 << 4)
39+#define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_YUV411 (3 << 4)
3540 #define SUN4I_FRONTEND_INPUT_FMT_DATA_FMT_RGB (5 << 4)
3641 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_UYVY 0
3742 #define SUN4I_FRONTEND_INPUT_FMT_DATA_PS_YUYV 1
drivers/gpu/drm/sun4i/sun4i_layer.c+8−0
@@ -145,7 +145,15 @@ static const uint32_t sun4i_layer_formats[] = { · 144 unmodified lines
145145 DRM_FORMAT_UYVY,
146146 DRM_FORMAT_VYUY,
147147 DRM_FORMAT_XRGB8888,
148+ DRM_FORMAT_YUV411,
149+ DRM_FORMAT_YUV420,
150+ DRM_FORMAT_YUV422,
151+ DRM_FORMAT_YUV444,
148152 DRM_FORMAT_YUYV,
153+ DRM_FORMAT_YVU411,
154+ DRM_FORMAT_YVU420,
155+ DRM_FORMAT_YVU422,
156+ DRM_FORMAT_YVU444,
149157 DRM_FORMAT_YVYU,
150158 };
151159