Pull OpenRISC fixes from Stafford Horne: "Two fixes for issues which were breaking OpenRISC boot: - Fix bug in __pte_free_tlb() exposed in 4.18 by Matthew Wilcox's page table flag addition. - Fix issue booting on real hardware if delay slot detection emulation is disabled" * tag 'for-linus' of git://github.com/stffrdhrn/linux: openrisc: entry: Fix delay slot exception detection openrisc: Call destructor during __pte_free_tlb
Unified · Split
| @@ -98,8 +98,12 @@ static inline void pte_free(struct mm_struct *mm, struct page *pte) · 97 unmodified lines | ||
| 98 | 98 | __free_page(pte); |
| 99 | 99 | } |
| 100 | 100 | |
| 101 | +#define __pte_free_tlb(tlb, pte, addr) \ | |
| 102 | +do { \ | |
| 103 | + pgtable_page_dtor(pte); \ | |
| 104 | + tlb_remove_page((tlb), (pte)); \ | |
| 105 | +} while (0) | |
| 101 | 106 | |
| 102 | −#define __pte_free_tlb(tlb, pte, addr) tlb_remove_page((tlb), (pte)) | |
| 103 | 107 | #define pmd_pgtable(pmd) pmd_page(pmd) |
| 104 | 108 | |
| 105 | 109 | #define check_pgt_cache() do { } while (0) |
| @@ -277,12 +277,6 @@ EXCEPTION_ENTRY(_data_page_fault_handler) · 276 unmodified lines | ||
| 277 | 277 | l.addi r3,r1,0 // pt_regs |
| 278 | 278 | /* r4 set be EXCEPTION_HANDLE */ // effective address of fault |
| 279 | 279 | |
| 280 | − /* | |
| 281 | − * __PHX__: TODO | |
| 282 | − * | |
| 283 | − * all this can be written much simpler. look at | |
| 284 | − * DTLB miss handler in the CONFIG_GUARD_PROTECTED_CORE part | |
| 285 | − */ | |
| 286 | 280 | #ifdef CONFIG_OPENRISC_NO_SPR_SR_DSX |
| 287 | 281 | l.lwz r6,PT_PC(r3) // address of an offending insn |
| 288 | 282 | l.lwz r6,0(r6) // instruction that caused pf |
| @@ -314,7 +308,7 @@ EXCEPTION_ENTRY(_data_page_fault_handler) · 25 unmodified lines | ||
| 314 | 308 | |
| 315 | 309 | #else |
| 316 | 310 | |
| 317 | − l.lwz r6,PT_SR(r3) // SR | |
| 311 | + l.mfspr r6,r0,SPR_SR // SR | |
| 318 | 312 | l.andi r6,r6,SPR_SR_DSX // check for delay slot exception |
| 319 | 313 | l.sfne r6,r0 // exception happened in delay slot |
| 320 | 314 | l.bnf 7f |
| @@ -210,8 +210,7 @@ · 209 unmodified lines | ||
| 210 | 210 | * r4 - EEAR exception EA |
| 211 | 211 | * r10 - current pointing to current_thread_info struct |
| 212 | 212 | * r12 - syscall 0, since we didn't come from syscall |
| 213 | − * r13 - temp it actually contains new SR, not needed anymore | |
| 214 | − * r31 - handler address of the handler we'll jump to | |
| 213 | + * r30 - handler address of the handler we'll jump to | |
| 215 | 214 | * |
| 216 | 215 | * handler has to save remaining registers to the exception |
| 217 | 216 | * ksp frame *before* tainting them! |
| @@ -244,6 +243,7 @@ · 26 unmodified lines | ||
| 244 | 243 | /* r1 is KSP, r30 is __pa(KSP) */ ;\ |
| 245 | 244 | tophys (r30,r1) ;\ |
| 246 | 245 | l.sw PT_GPR12(r30),r12 ;\ |
| 246 | + /* r4 use for tmp before EA */ ;\ | |
| 247 | 247 | l.mfspr r12,r0,SPR_EPCR_BASE ;\ |
| 248 | 248 | l.sw PT_PC(r30),r12 ;\ |
| 249 | 249 | l.mfspr r12,r0,SPR_ESR_BASE ;\ |
| @@ -263,7 +263,10 @@ · 13 unmodified lines | ||
| 263 | 263 | /* r12 == 1 if we come from syscall */ ;\ |
| 264 | 264 | CLEAR_GPR(r12) ;\ |
| 265 | 265 | /* ----- turn on MMU ----- */ ;\ |
| 266 | − l.ori r30,r0,(EXCEPTION_SR) ;\ | |
| 266 | + /* Carry DSX into exception SR */ ;\ | |
| 267 | + l.mfspr r30,r0,SPR_SR ;\ | |
| 268 | + l.andi r30,r30,SPR_SR_DSX ;\ | |
| 269 | + l.ori r30,r30,(EXCEPTION_SR) ;\ | |
| 267 | 270 | l.mtspr r0,r30,SPR_ESR_BASE ;\ |
| 268 | 271 | /* r30: EA address of handler */ ;\ |
| 269 | 272 | LOAD_SYMBOL_2_GPR(r30,handler) ;\ |
| @@ -300,7 +300,7 @@ static inline int in_delay_slot(struct pt_regs *regs) · 299 unmodified lines | ||
| 300 | 300 | return 0; |
| 301 | 301 | } |
| 302 | 302 | #else |
| 303 | − return regs->sr & SPR_SR_DSX; | |
| 303 | + return mfspr(SPR_SR) & SPR_SR_DSX; | |
| 304 | 304 | #endif |
| 305 | 305 | } |
| 306 | 306 | |