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dt-bindings: media: venus: Add sm8250 dt schema

Add a schema description for the venus video encoder/decoder on the sm8250.

Bryan O'Donoghue committed 5 years ago

Commit 8d3a1cb1 parent 31e46db1 file · +167 −0Browse files

Unified · Split

Documentation/devicetree/bindings/media/qcom,sm8250-venus.yaml+167−0
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1+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+
3+%YAML 1.2
4+---
5+$id: "http://devicetree.org/schemas/media/qcom,sm8250-venus.yaml#"
6+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7+
8+title: Qualcomm Venus video encode and decode accelerators
9+
10+maintainers:
11+ - Stanimir Varbanov <stanimir.varbanov@linaro.org>
12+
13+description: |
14+ The Venus IP is a video encode and decode accelerator present
15+ on Qualcomm platforms
16+
17+properties:
18+ compatible:
19+ const: qcom,sm8250-venus
20+
21+ reg:
22+ maxItems: 1
23+
24+ interrupts:
25+ maxItems: 1
26+
27+ power-domains:
28+ minItems: 2
29+ maxItems: 3
30+
31+ power-domain-names:
32+ minItems: 2
33+ maxItems: 3
34+ items:
35+ - const: venus
36+ - const: vcodec0
37+ - const: mx
38+
39+ clocks:
40+ maxItems: 3
41+
42+ clock-names:
43+ items:
44+ - const: iface
45+ - const: core
46+ - const: vcodec0_core
47+
48+ iommus:
49+ maxItems: 1
50+
51+ memory-region:
52+ maxItems: 1
53+
54+ interconnects:
55+ maxItems: 2
56+
57+ interconnect-names:
58+ items:
59+ - const: cpu-cfg
60+ - const: video-mem
61+
62+ resets:
63+ maxItems: 2
64+
65+ reset-names:
66+ items:
67+ - const: bus
68+ - const: core
69+
70+ video-decoder:
71+ type: object
72+
73+ properties:
74+ compatible:
75+ const: venus-decoder
76+
77+ required:
78+ - compatible
79+
80+ additionalProperties: false
81+
82+ video-encoder:
83+ type: object
84+
85+ properties:
86+ compatible:
87+ const: venus-encoder
88+
89+ required:
90+ - compatible
91+
92+ additionalProperties: false
93+
94+ video-firmware:
95+ type: object
96+
97+ description: |
98+ Firmware subnode is needed when the platform does not
99+ have TrustZone.
100+
101+ properties:
102+ iommus:
103+ maxItems: 1
104+
105+ required:
106+ - iommus
107+
108+required:
109+ - compatible
110+ - reg
111+ - interrupts
112+ - power-domains
113+ - power-domain-names
114+ - clocks
115+ - clock-names
116+ - interconnects
117+ - interconnect-names
118+ - iommus
119+ - memory-region
120+ - resets
121+ - reset-names
122+ - video-decoder
123+ - video-encoder
124+
125+additionalProperties: false
126+
127+examples:
128+ - |
129+ #include <dt-bindings/interrupt-controller/arm-gic.h>
130+ #include <dt-bindings/clock/qcom,videocc-sm8250.h>
131+ #include <dt-bindings/interconnect/qcom,sm8250.h>
132+ #include <dt-bindings/clock/qcom,gcc-sm8250.h>
133+ #include <dt-bindings/power/qcom-rpmpd.h>
134+
135+ venus: video-codec@aa00000 {
136+ compatible = "qcom,sm8250-venus";
137+ reg = <0x0aa00000 0xff000>;
138+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
139+ power-domains = <&videocc MVS0C_GDSC>,
140+ <&videocc MVS0_GDSC>,
141+ <&rpmhpd SM8250_MX>;
142+ power-domain-names = "venus", "vcodec0", "mx";
143+
144+ clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
145+ <&videocc VIDEO_CC_MVS0C_CLK>,
146+ <&videocc VIDEO_CC_MVS0_CLK>;
147+ clock-names = "iface", "core", "vcodec0_core";
148+
149+ interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>,
150+ <&mmss_noc MASTER_VIDEO_P0 &mc_virt SLAVE_EBI_CH0>;
151+ interconnect-names = "cpu-cfg", "video-mem";
152+
153+ iommus = <&apps_smmu 0x2100 0x0400>;
154+ memory-region = <&video_mem>;
155+
156+ resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
157+ <&videocc VIDEO_CC_MVS0C_CLK_ARES>;
158+ reset-names = "bus", "core";
159+
160+ video-decoder {
161+ compatible = "venus-decoder";
162+ };
163+
164+ video-encoder {
165+ compatible = "venus-encoder";
166+ };
167+ };