lael-labs/linux

Documentation/admin-guide/cgroup-v1/memory.rst+7−0

@@ -92,6 +92,13 @@ Brief summary of control files. · 91 unmodified lines
92	memory.oom_control set/show oom controls.	92	memory.oom_control set/show oom controls.
93	memory.numa_stat show the number of memory usage per numa	93	memory.numa_stat show the number of memory usage per numa
94	node	94	node
		95	memory.kmem.limit_in_bytes Deprecated knob to set and read the kernel
		96	memory hard limit. Kernel hard limit is not
		97	supported since 5.16. Writing any value to
		98	do file will not have any effect same as if
		99	nokmem kernel parameter was specified.
		100	Kernel memory is still charged and reported
		101	by memory.kmem.usage_in_bytes.
95	memory.kmem.usage_in_bytes show current kernel memory allocation	102	memory.kmem.usage_in_bytes show current kernel memory allocation
96	memory.kmem.failcnt show the number of kernel memory usage	103	memory.kmem.failcnt show the number of kernel memory usage
97	hits limits	104	hits limits

Documentation/arch/arm64/cpu-feature-registers.rst+12−0

      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
      +------------------------------+---------+---------+
+     | SME                          | [27-24] |    y    |
+     +------------------------------+---------+---------+
      | MTE                          | [11-8]  |    y    |
      +------------------------------+---------+---------+
      | SSBS                         | [7-4]   |    y    |
      +------------------------------+---------+---------+
      | Name                         |  bits   | visible |
      +------------------------------+---------+---------+
+     | CSSC                         | [55-52] |    y    |
+     +------------------------------+---------+---------+
+     | RPRFM                        | [51-48] |    y    |
+     +------------------------------+---------+---------+
+     | BC                           | [23-20] |    y    |
+     +------------------------------+---------+---------+
      | MOPS                         | [19-16] |    y    |
      +------------------------------+---------+---------+
+     | APA3                         | [15-12] |    y    |
+     +------------------------------+---------+---------+
+     | GPA3                         | [11-8]  |    y    |
+     +------------------------------+---------+---------+
      | RPRES                        | [7-4]   |    y    |
      +------------------------------+---------+---------+
      | WFXT                         | [3-0]   |    y    |

Documentation/arch/arm64/elf_hwcaps.rst+3−0

@@ -305,6 +305,9 @@ HWCAP2_SMEF16F16 · 304 unmodified lines
305	HWCAP2_MOPS	305	HWCAP2_MOPS
306	Functionality implied by ID_AA64ISAR2_EL1.MOPS == 0b0001.	306	Functionality implied by ID_AA64ISAR2_EL1.MOPS == 0b0001.
307		307
		308	HWCAP2_HBC
		309	Functionality implied by ID_AA64ISAR2_EL1.BC == 0b0001.
		310
308	4. Unused AT_HWCAP bits	311	4. Unused AT_HWCAP bits
309	-----------------------	312	-----------------------
310		313

Documentation/arch/loongarch/introduction.rst+2−2

@@ -381,9 +381,9 @@ Documentation of LoongArch ISA: · 380 unmodified lines
381		381
382	Documentation of LoongArch ELF psABI:	382	Documentation of LoongArch ELF psABI:
383		383
384	https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-CN.pdf (in Chinese)	384	https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.01-CN.pdf (in Chinese)
385		385
386	https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-EN.pdf (in English)	386	https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.01-EN.pdf (in English)
387		387
388	Linux kernel repository of Loongson and LoongArch:	388	Linux kernel repository of Loongson and LoongArch:
389		389

Documentation/devicetree/bindings/ata/pata-common.yaml+1−0

@@ -38,6 +38,7 @@ patternProperties: · 37 unmodified lines
38	ID number 0 and the slave drive will have ID number 1. The PATA port	38	ID number 0 and the slave drive will have ID number 1. The PATA port
39	nodes will be named "ide-port".	39	nodes will be named "ide-port".
40	type: object	40	type: object
		41	additionalProperties: false
41		42
42	properties:	43	properties:
43	reg:	44	reg:

Documentation/devicetree/bindings/clock/renesas,5p35023.yaml+7−4

     maxItems: 1
   '#clock-cells':
+    description:
+      The index in the assigned-clocks is mapped to the output clock as below
+      0 - REF, 1 - SE1, 2 - SE2, 3 - SE3, 4 - DIFF1, 5 - DIFF2.
     const: 1
   clocks:
             reg = <0x68>;
             #clock-cells = <1>;
-            clocks = <&x1_x2>;
+            clocks = <&x1>;
             renesas,settings = [
                 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
             assigned-clocks = <&versa3 0>, <&versa3 1>,
                               <&versa3 2>, <&versa3 3>,
                               <&versa3 4>, <&versa3 5>;
-            assigned-clock-rates = <12288000>, <25000000>,
+            assigned-clock-rates = <24000000>, <11289600>,
-                                   <12000000>, <11289600>,
+                                   <11289600>, <12000000>,
-                                   <11289600>, <24000000>;
+                                   <25000000>, <12288000>;
         };
     };

Documentation/devicetree/bindings/i2c/i2c-mxs.yaml+4−1

 maintainers:
   - Shawn Guo <shawnguo@kernel.org>
+allOf:
+  - $ref: /schemas/i2c/i2c-controller.yaml#
 properties:
   compatible:
     enum:
   - dmas
   - dma-names
-additionalProperties: false
+unevaluatedProperties: false
 examples:
   - |

Documentation/devicetree/bindings/soc/loongson/loongson,ls2k-pmc.yaml+37−6

@@ -11,11 +11,16 @@ maintainers: · 10 unmodified lines
11		11
12	properties:	12	properties:
13	compatible:	13	compatible:
14	items:	14	oneOf:
15	- enum:	15	- items:
16	- loongson,ls2k0500-pmc	16	- const: loongson,ls2k0500-pmc
17	- loongson,ls2k1000-pmc	17	- const: syscon
18	- const: syscon	18	- items:
		19	- enum:
		20	- loongson,ls2k1000-pmc
		21	- loongson,ls2k2000-pmc
		22	- const: loongson,ls2k0500-pmc
		23	- const: syscon
19		24
20	reg:	25	reg:
21	maxItems: 1	26	maxItems: 1
@@ -32,6 +37,18 @@ properties: · 10 unmodified lines
32	addition, the PM need according to it to indicate that current	37	addition, the PM need according to it to indicate that current
33	SoC whether support Suspend To RAM.	38	SoC whether support Suspend To RAM.
34		39
		40	syscon-poweroff:
		41	$ref: /schemas/power/reset/syscon-poweroff.yaml#
		42	type: object
		43	description:
		44	Node for power off method
		45
		46	syscon-reboot:
		47	$ref: /schemas/power/reset/syscon-reboot.yaml#
		48	type: object
		49	description:
		50	Node for reboot method
		51
35	required:	52	required:
36	- compatible	53	- compatible
37	- reg	54	- reg
@@ -44,9 +61,23 @@ examples: · 6 unmodified lines
44	#include <dt-bindings/interrupt-controller/irq.h>	61	#include <dt-bindings/interrupt-controller/irq.h>
45		62
46	power-management@1fe27000 {	63	power-management@1fe27000 {
47	compatible = "loongson,ls2k1000-pmc", "syscon";	64	compatible = "loongson,ls2k1000-pmc", "loongson,ls2k0500-pmc", "syscon";
48	reg = <0x1fe27000 0x58>;	65	reg = <0x1fe27000 0x58>;
49	interrupt-parent = <&liointc1>;	66	interrupt-parent = <&liointc1>;
50	interrupts = <11 IRQ_TYPE_LEVEL_LOW>;	67	interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
51	loongson,suspend-address = <0x0 0x1c000500>;	68	loongson,suspend-address = <0x0 0x1c000500>;
		69
		70	syscon-reboot {
		71	compatible = "syscon-reboot";
		72	offset = <0x30>;
		73	mask = <0x1>;
		74	};
		75
		76	syscon-poweroff {
		77	compatible = "syscon-poweroff";
		78	regmap = <&pmc>;
		79	offset = <0x14>;
		80	mask = <0x3c00>;
		81	value = <0x3c00>;
		82	};
52	};	83	};

Documentation/devicetree/bindings/spi/fsl-imx-cspi.yaml+7−0

@@ -22,6 +22,13 @@ properties: · 21 unmodified lines
22	- const: fsl,imx35-cspi	22	- const: fsl,imx35-cspi
23	- const: fsl,imx51-ecspi	23	- const: fsl,imx51-ecspi
24	- const: fsl,imx53-ecspi	24	- const: fsl,imx53-ecspi
		25	- items:
		26	- enum:
		27	- fsl,imx25-cspi
		28	- fsl,imx50-cspi
		29	- fsl,imx51-cspi
		30	- fsl,imx53-cspi
		31	- const: fsl,imx35-cspi
25	- items:	32	- items:
26	- const: fsl,imx8mp-ecspi	33	- const: fsl,imx8mp-ecspi
27	- const: fsl,imx6ul-ecspi	34	- const: fsl,imx6ul-ecspi

Documentation/filesystems/btrfs.rst+0−1

@@ -37,7 +37,6 @@ For more information please refer to the documentation site or wiki · 36 unmodified lines
37		37
38	https://btrfs.readthedocs.io	38	https://btrfs.readthedocs.io
39		39
40	https://btrfs.wiki.kernel.org
41		40
42	that maintains information about administration tasks, frequently asked	41	that maintains information about administration tasks, frequently asked
43	questions, use cases, mount options, comprehensible changelogs, features,	42	questions, use cases, mount options, comprehensible changelogs, features,

Documentation/filesystems/porting.rst+96−0

@@ -949,3 +949,99 @@ mmap_lock held. All in-tree users have been audited and do not seem to · 948 unmodified lines
949	depend on the mmap_lock being held, but out of tree users should verify	949	depend on the mmap_lock being held, but out of tree users should verify
950	for themselves. If they do need it, they can return VM_FAULT_RETRY to	950	for themselves. If they do need it, they can return VM_FAULT_RETRY to
951	be called with the mmap_lock held.	951	be called with the mmap_lock held.
		952
		953	---
		954
		955	mandatory
		956
		957	The order of opening block devices and matching or creating superblocks has
		958	changed.
		959
		960	The old logic opened block devices first and then tried to find a
		961	suitable superblock to reuse based on the block device pointer.
		962
		963	The new logic tries to find a suitable superblock first based on the device
		964	number, and opening the block device afterwards.
		965
		966	Since opening block devices cannot happen under s_umount because of lock
		967	ordering requirements s_umount is now dropped while opening block devices and
		968	reacquired before calling fill_super().
		969
		970	In the old logic concurrent mounters would find the superblock on the list of
		971	superblocks for the filesystem type. Since the first opener of the block device
		972	would hold s_umount they would wait until the superblock became either born or
		973	was discarded due to initialization failure.
		974
		975	Since the new logic drops s_umount concurrent mounters could grab s_umount and
		976	would spin. Instead they are now made to wait using an explicit wait-wake
		977	mechanism without having to hold s_umount.
		978
		979	---
		980
		981	mandatory
		982
		983	The holder of a block device is now the superblock.
		984
		985	The holder of a block device used to be the file_system_type which wasn't
		986	particularly useful. It wasn't possible to go from block device to owning
		987	superblock without matching on the device pointer stored in the superblock.
		988	This mechanism would only work for a single device so the block layer couldn't
		989	find the owning superblock of any additional devices.
		990
		991	In the old mechanism reusing or creating a superblock for a racing mount(2) and
		992	umount(2) relied on the file_system_type as the holder. This was severly
		993	underdocumented however:
		994
		995	(1) Any concurrent mounter that managed to grab an active reference on an
		996	existing superblock was made to wait until the superblock either became
		997	ready or until the superblock was removed from the list of superblocks of
		998	the filesystem type. If the superblock is ready the caller would simple
		999	reuse it.
		1000
		1001	(2) If the mounter came after deactivate_locked_super() but before
		1002	the superblock had been removed from the list of superblocks of the
		1003	filesystem type the mounter would wait until the superblock was shutdown,
		1004	reuse the block device and allocate a new superblock.
		1005
		1006	(3) If the mounter came after deactivate_locked_super() and after
		1007	the superblock had been removed from the list of superblocks of the
		1008	filesystem type the mounter would reuse the block device and allocate a new
		1009	superblock (the bd_holder point may still be set to the filesystem type).
		1010
		1011	Because the holder of the block device was the file_system_type any concurrent
		1012	mounter could open the block devices of any superblock of the same
		1013	file_system_type without risking seeing EBUSY because the block device was
		1014	still in use by another superblock.
		1015
		1016	Making the superblock the owner of the block device changes this as the holder
		1017	is now a unique superblock and thus block devices associated with it cannot be
		1018	reused by concurrent mounters. So a concurrent mounter in (2) could suddenly
		1019	see EBUSY when trying to open a block device whose holder was a different
		1020	superblock.
		1021
		1022	The new logic thus waits until the superblock and the devices are shutdown in
		1023	->kill_sb(). Removal of the superblock from the list of superblocks of the
		1024	filesystem type is now moved to a later point when the devices are closed:
		1025
		1026	(1) Any concurrent mounter managing to grab an active reference on an existing
		1027	superblock is made to wait until the superblock is either ready or until
		1028	the superblock and all devices are shutdown in ->kill_sb(). If the
		1029	superblock is ready the caller will simply reuse it.
		1030
		1031	(2) If the mounter comes after deactivate_locked_super() but before
		1032	the superblock has been removed from the list of superblocks of the
		1033	filesystem type the mounter is made to wait until the superblock and the
		1034	devices are shut down in ->kill_sb() and the superblock is removed from the
		1035	list of superblocks of the filesystem type. The mounter will allocate a new
		1036	superblock and grab ownership of the block device (the bd_holder pointer of
		1037	the block device will be set to the newly allocated superblock).
		1038
		1039	(3) This case is now collapsed into (2) as the superblock is left on the list
		1040	of superblocks of the filesystem type until all devices are shutdown in
		1041	->kill_sb(). In other words, if the superblock isn't on the list of
		1042	superblock of the filesystem type anymore then it has given up ownership of
		1043	all associated block devices (the bd_holder pointer is NULL).
		1044
		1045	As this is a VFS level change it has no practical consequences for filesystems
		1046	other than that all of them must use one of the provided kill_litter_super(),
		1047	kill_anon_super(), or kill_block_super() helpers.

Documentation/kbuild/kconfig-language.rst+26−0

@@ -573,6 +573,32 @@ above, leading to: · 572 unmodified lines
573	bool "Support for foo hardware"	573	bool "Support for foo hardware"
574	depends on ARCH_FOO_VENDOR \|\| COMPILE_TEST	574	depends on ARCH_FOO_VENDOR \|\| COMPILE_TEST
575		575
		576	Optional dependencies
		577	~~~~~~~~~~~~~~~~~~~~~
		578
		579	Some drivers are able to optionally use a feature from another module
		580	or build cleanly with that module disabled, but cause a link failure
		581	when trying to use that loadable module from a built-in driver.
		582
		583	The most common way to express this optional dependency in Kconfig logic
		584	uses the slightly counterintuitive::
		585
		586	config FOO
		587	tristate "Support for foo hardware"
		588	depends on BAR \|\| !BAR
		589
		590	This means that there is either a dependency on BAR that disallows
		591	the combination of FOO=y with BAR=m, or BAR is completely disabled.
		592	For a more formalized approach if there are multiple drivers that have
		593	the same dependency, a helper symbol can be used, like::
		594
		595	config FOO
		596	tristate "Support for foo hardware"
		597	depends on BAR_OPTIONAL
		598
		599	config BAR_OPTIONAL
		600	def_tristate BAR \|\| !BAR
		601
576	Kconfig recursive dependency limitations	602	Kconfig recursive dependency limitations
577	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~	603	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
578		604

Documentation/networking/ax25.rst+2−2

@@ -7,9 +7,9 @@ AX.25 · 6 unmodified lines
7	To use the amateur radio protocols within Linux you will need to get a	7	To use the amateur radio protocols within Linux you will need to get a
8	suitable copy of the AX.25 Utilities. More detailed information about	8	suitable copy of the AX.25 Utilities. More detailed information about
9	AX.25, NET/ROM and ROSE, associated programs and utilities can be	9	AX.25, NET/ROM and ROSE, associated programs and utilities can be
10	found on http://www.linux-ax25.org.	10	found on https://linux-ax25.in-berlin.de.
11		11
12	There is an active mailing list for discussing Linux amateur radio matters	12	There is a mailing list for discussing Linux amateur radio matters
13	called linux-hams@vger.kernel.org. To subscribe to it, send a message to	13	called linux-hams@vger.kernel.org. To subscribe to it, send a message to
14	majordomo@vger.kernel.org with the words "subscribe linux-hams" in the body	14	majordomo@vger.kernel.org with the words "subscribe linux-hams" in the body
15	of the message, the subject field is ignored. You don't need to be	15	of the message, the subject field is ignored. You don't need to be

Documentation/process/embargoed-hardware-issues.rst+1−0

@@ -251,6 +251,7 @@ an involved disclosed party. The current ambassadors list: · 250 unmodified lines
251	IBM Z Christian Borntraeger <borntraeger@de.ibm.com>	251	IBM Z Christian Borntraeger <borntraeger@de.ibm.com>
252	Intel Tony Luck <tony.luck@intel.com>	252	Intel Tony Luck <tony.luck@intel.com>
253	Qualcomm Trilok Soni <tsoni@codeaurora.org>	253	Qualcomm Trilok Soni <tsoni@codeaurora.org>
		254	RISC-V Palmer Dabbelt <palmer@dabbelt.com>
254	Samsung Javier González <javier.gonz@samsung.com>	255	Samsung Javier González <javier.gonz@samsung.com>
255		256
256	Microsoft James Morris <jamorris@linux.microsoft.com>	257	Microsoft James Morris <jamorris@linux.microsoft.com>

Documentation/sound/designs/midi-2.0.rst+2−2

@@ -74,8 +74,8 @@ topology based on those information. When the device is older and · 73 unmodified lines
74	doesn't respond to the new UMP inquiries, the driver falls back and	74	doesn't respond to the new UMP inquiries, the driver falls back and
75	builds the topology based on Group Terminal Block (GTB) information	75	builds the topology based on Group Terminal Block (GTB) information
76	from the USB descriptor. Some device might be screwed up by the	76	from the USB descriptor. Some device might be screwed up by the
77	unexpected UMP command; in such a case, pass `midi2_probe=0` option to	77	unexpected UMP command; in such a case, pass `midi2_ump_probe=0`
78	snd-usb-audio driver for skipping the UMP v1.1 inquiries.	78	option to snd-usb-audio driver for skipping the UMP v1.1 inquiries.
79		79
80	When the MIDI 2.0 device is probed, the kernel creates a rawmidi	80	When the MIDI 2.0 device is probed, the kernel creates a rawmidi
81	device for each UMP Endpoint of the device. Its device name is	81	device for each UMP Endpoint of the device. Its device name is

Documentation/translations/zh_CN/arch/loongarch/introduction.rst+2−2

@@ -344,9 +344,9 @@ LoongArch指令集架构的文档： · 343 unmodified lines
344		344
345	LoongArch的ELF psABI文档：	345	LoongArch的ELF psABI文档：
346		346
347	https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-CN.pdf （中文版）	347	https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.01-CN.pdf （中文版）
348		348
349	https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.00-EN.pdf （英文版）	349	https://github.com/loongson/LoongArch-Documentation/releases/latest/download/LoongArch-ELF-ABI-v2.01-EN.pdf （英文版）
350		350
351	Loongson与LoongArch的Linux内核源码仓库：	351	Loongson与LoongArch的Linux内核源码仓库：
352		352

MAINTAINERS+26−23

@@ -1662,7 +1662,7 @@ F: arch/arm*/include/asm/perf_event.h · 1661 unmodified lines
1662	F: arch/arm*/kernel/hw_breakpoint.c	1662	F: arch/arm*/kernel/hw_breakpoint.c
1663	F: arch/arm/kernel/perf_	1663	F: arch/arm/kernel/perf_
1664	F: drivers/perf/	1664	F: drivers/perf/
1665	F: include/linux/perf/arm_pmu.h	1665	F: include/linux/perf/arm_pmu*.h
1666		1666
1667	ARM PORT	1667	ARM PORT
1668	M: Russell King <linux@armlinux.org.uk>	1668	M: Russell King <linux@armlinux.org.uk>
@@ -1855,7 +1855,7 @@ F: Documentation/devicetree/bindings/phy/amlogic* · 186 unmodified lines
1855	F: arch/arm/boot/dts/amlogic/	1855	F: arch/arm/boot/dts/amlogic/
1856	F: arch/arm/mach-meson/	1856	F: arch/arm/mach-meson/
1857	F: arch/arm64/boot/dts/amlogic/	1857	F: arch/arm64/boot/dts/amlogic/
1858	F: drivers/genpd/amlogic/	1858	F: drivers/pmdomain/amlogic/
1859	F: drivers/mmc/host/meson*	1859	F: drivers/mmc/host/meson*
1860	F: drivers/phy/amlogic/	1860	F: drivers/phy/amlogic/
1861	F: drivers/pinctrl/meson/	1861	F: drivers/pinctrl/meson/
@@ -1918,7 +1918,7 @@ F: drivers/bluetooth/hci_bcm4377.c · 56 unmodified lines
1918	F: drivers/clk/clk-apple-nco.c	1918	F: drivers/clk/clk-apple-nco.c
1919	F: drivers/cpufreq/apple-soc-cpufreq.c	1919	F: drivers/cpufreq/apple-soc-cpufreq.c
1920	F: drivers/dma/apple-admac.c	1920	F: drivers/dma/apple-admac.c
1921	F: drivers/genpd/apple/	1921	F: drivers/pmdomain/apple/
1922	F: drivers/i2c/busses/i2c-pasemi-core.c	1922	F: drivers/i2c/busses/i2c-pasemi-core.c
1923	F: drivers/i2c/busses/i2c-pasemi-platform.c	1923	F: drivers/i2c/busses/i2c-pasemi-platform.c
1924	F: drivers/iommu/apple-dart.c	1924	F: drivers/iommu/apple-dart.c
@@ -1963,12 +1963,12 @@ F: drivers/irqchip/irq-aspeed-i2c-ic.c · 38 unmodified lines
1963		1963
1964	ARM/ASPEED MACHINE SUPPORT	1964	ARM/ASPEED MACHINE SUPPORT
1965	M: Joel Stanley <joel@jms.id.au>	1965	M: Joel Stanley <joel@jms.id.au>
1966	R: Andrew Jeffery <andrew@aj.id.au>	1966	R: Andrew Jeffery <andrew@codeconstruct.com.au>
1967	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)	1967	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1968	L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)	1968	L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)
1969	S: Supported	1969	S: Supported
1970	Q: https://patchwork.ozlabs.org/project/linux-aspeed/list/	1970	Q: https://patchwork.ozlabs.org/project/linux-aspeed/list/
1971	T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed.git	1971	T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc.git
1972	F: Documentation/devicetree/bindings/arm/aspeed/	1972	F: Documentation/devicetree/bindings/arm/aspeed/
1973	F: arch/arm/boot/dts/aspeed/	1973	F: arch/arm/boot/dts/aspeed/
1974	F: arch/arm/mach-aspeed/	1974	F: arch/arm/mach-aspeed/
@@ -2435,7 +2435,7 @@ F: arch/arm/mach-ux500/ · 460 unmodified lines
2435	F: drivers/clk/clk-nomadik.c	2435	F: drivers/clk/clk-nomadik.c
2436	F: drivers/clocksource/clksrc-dbx500-prcmu.c	2436	F: drivers/clocksource/clksrc-dbx500-prcmu.c
2437	F: drivers/dma/ste_dma40*	2437	F: drivers/dma/ste_dma40*
2438	F: drivers/genpd/st/ste-ux500-pm-domain.c	2438	F: drivers/pmdomain/st/ste-ux500-pm-domain.c
2439	F: drivers/hwspinlock/u8500_hsem.c	2439	F: drivers/hwspinlock/u8500_hsem.c
2440	F: drivers/i2c/busses/i2c-nomadik.c	2440	F: drivers/i2c/busses/i2c-nomadik.c
2441	F: drivers/iio/adc/ab8500-gpadc.c	2441	F: drivers/iio/adc/ab8500-gpadc.c
@@ -2598,7 +2598,7 @@ F: arch/arm/include/debug/renesas-scif.S · 156 unmodified lines
2598	F: arch/arm/mach-shmobile/	2598	F: arch/arm/mach-shmobile/
2599	F: arch/arm64/boot/dts/renesas/	2599	F: arch/arm64/boot/dts/renesas/
2600	F: arch/riscv/boot/dts/renesas/	2600	F: arch/riscv/boot/dts/renesas/
2601	F: drivers/genpd/renesas/	2601	F: drivers/pmdomain/renesas/
2602	F: drivers/soc/renesas/	2602	F: drivers/soc/renesas/
2603	F: include/linux/soc/renesas/	2603	F: include/linux/soc/renesas/
2604	K: \brenesas,	2604	K: \brenesas,
@@ -3058,7 +3058,7 @@ F: Documentation/devicetree/bindings/peci/peci-aspeed.yaml · 453 unmodified lines
3058	F: drivers/peci/controller/peci-aspeed.c	3058	F: drivers/peci/controller/peci-aspeed.c
3059		3059
3060	ASPEED PINCTRL DRIVERS	3060	ASPEED PINCTRL DRIVERS
3061	M: Andrew Jeffery <andrew@aj.id.au>	3061	M: Andrew Jeffery <andrew@codeconstruct.com.au>
3062	L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)	3062	L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)
3063	L: openbmc@lists.ozlabs.org (moderated for non-subscribers)	3063	L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
3064	L: linux-gpio@vger.kernel.org	3064	L: linux-gpio@vger.kernel.org
@@ -3075,7 +3075,7 @@ F: drivers/irqchip/irq-aspeed-scu-ic.c · 10 unmodified lines
3075	F: include/dt-bindings/interrupt-controller/aspeed-scu-ic.h	3075	F: include/dt-bindings/interrupt-controller/aspeed-scu-ic.h
3076		3076
3077	ASPEED SD/MMC DRIVER	3077	ASPEED SD/MMC DRIVER
3078	M: Andrew Jeffery <andrew@aj.id.au>	3078	M: Andrew Jeffery <andrew@codeconstruct.com.au>
3079	L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)	3079	L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)
3080	L: openbmc@lists.ozlabs.org (moderated for non-subscribers)	3080	L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
3081	L: linux-mmc@vger.kernel.org	3081	L: linux-mmc@vger.kernel.org
@@ -3344,7 +3344,7 @@ AX.25 NETWORK LAYER · 262 unmodified lines
3344	M: Ralf Baechle <ralf@linux-mips.org>	3344	M: Ralf Baechle <ralf@linux-mips.org>
3345	L: linux-hams@vger.kernel.org	3345	L: linux-hams@vger.kernel.org
3346	S: Maintained	3346	S: Maintained
3347	W: http://www.linux-ax25.org/	3347	W: https://linux-ax25.in-berlin.de
3348	F: include/net/ax25.h	3348	F: include/net/ax25.h
3349	F: include/uapi/linux/ax25.h	3349	F: include/uapi/linux/ax25.h
3350	F: net/ax25/	3350	F: net/ax25/
@@ -4026,7 +4026,7 @@ F: arch/mips/kernel/bmips · 675 unmodified lines
4026	F: drivers/irqchip/irq-bcm63*	4026	F: drivers/irqchip/irq-bcm63*
4027	F: drivers/irqchip/irq-bcm7*	4027	F: drivers/irqchip/irq-bcm7*
4028	F: drivers/irqchip/irq-brcmstb*	4028	F: drivers/irqchip/irq-brcmstb*
4029	F: drivers/genpd/bcm/bcm63xx-power.c	4029	F: drivers/pmdomain/bcm/bcm63xx-power.c
4030	F: include/linux/bcm963xx_nvram.h	4030	F: include/linux/bcm963xx_nvram.h
4031	F: include/linux/bcm963xx_tag.h	4031	F: include/linux/bcm963xx_tag.h
4032		4032
@@ -4082,7 +4082,7 @@ F: drivers/net/wireless/broadcom/brcm80211/ · 49 unmodified lines
4082		4082
4083	BROADCOM BRCMSTB GPIO DRIVER	4083	BROADCOM BRCMSTB GPIO DRIVER
4084	M: Doug Berger <opendmb@gmail.com>	4084	M: Doug Berger <opendmb@gmail.com>
4085	M: Florian Fainelli <florian.fainelli@broadcom>	4085	M: Florian Fainelli <florian.fainelli@broadcom.com>
4086	R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>	4086	R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>
4087	S: Supported	4087	S: Supported
4088	F: Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml	4088	F: Documentation/devicetree/bindings/gpio/brcm,brcmstb-gpio.yaml
@@ -4248,7 +4248,7 @@ R: Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com> · 159 unmodified lines
4248	L: linux-pm@vger.kernel.org	4248	L: linux-pm@vger.kernel.org
4249	S: Maintained	4249	S: Maintained
4250	T: git https://github.com/broadcom/stblinux.git	4250	T: git https://github.com/broadcom/stblinux.git
4251	F: drivers/genpd/bcm/bcm-pmb.c	4251	F: drivers/pmdomain/bcm/bcm-pmb.c
4252	F: include/dt-bindings/soc/bcm-pmb.h	4252	F: include/dt-bindings/soc/bcm-pmb.h
4253		4253
4254	BROADCOM SPECIFIC AMBA DRIVER (BCMA)	4254	BROADCOM SPECIFIC AMBA DRIVER (BCMA)
@@ -4378,7 +4378,6 @@ M: David Sterba <dsterba@suse.com> · 123 unmodified lines
4378	L: linux-btrfs@vger.kernel.org	4378	L: linux-btrfs@vger.kernel.org
4379	S: Maintained	4379	S: Maintained
4380	W: https://btrfs.readthedocs.io	4380	W: https://btrfs.readthedocs.io
4381	W: https://btrfs.wiki.kernel.org/
4382	Q: https://patchwork.kernel.org/project/linux-btrfs/list/	4381	Q: https://patchwork.kernel.org/project/linux-btrfs/list/
4383	C: irc://irc.libera.chat/btrfs	4382	C: irc://irc.libera.chat/btrfs
4384	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux.git	4383	T: git git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux.git
@@ -6646,9 +6645,9 @@ F: Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml · 2261 unmodified lines
6646	F: drivers/gpu/drm/panel/panel-novatek-nt36672a.c	6645	F: drivers/gpu/drm/panel/panel-novatek-nt36672a.c
6647		6646
6648	DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS	6647	DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS
6649	M: Ben Skeggs <bskeggs@redhat.com>
6650	M: Karol Herbst <kherbst@redhat.com>	6648	M: Karol Herbst <kherbst@redhat.com>
6651	M: Lyude Paul <lyude@redhat.com>	6649	M: Lyude Paul <lyude@redhat.com>
		6650	M: Danilo Krummrich <dakr@redhat.com>
6652	L: dri-devel@lists.freedesktop.org	6651	L: dri-devel@lists.freedesktop.org
6653	L: nouveau@lists.freedesktop.org	6652	L: nouveau@lists.freedesktop.org
6654	S: Supported	6653	S: Supported
@@ -8729,7 +8728,7 @@ M: Ulf Hansson <ulf.hansson@linaro.org> · 2074 unmodified lines
8729	L: linux-pm@vger.kernel.org	8728	L: linux-pm@vger.kernel.org
8730	S: Supported	8729	S: Supported
8731	T: git git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git	8730	T: git git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm.git
8732	F: drivers/genpd/	8731	F: drivers/pmdomain/
8733		8732
8734	GENERIC RESISTIVE TOUCHSCREEN ADC DRIVER	8733	GENERIC RESISTIVE TOUCHSCREEN ADC DRIVER
8735	M: Eugen Hristev <eugen.hristev@microchip.com>	8734	M: Eugen Hristev <eugen.hristev@microchip.com>
@@ -8875,7 +8874,7 @@ F: drivers/gpio/gpio-mockup.c · 139 unmodified lines
8875	F: tools/testing/selftests/gpio/	8874	F: tools/testing/selftests/gpio/
8876		8875
8877	GPIO REGMAP	8876	GPIO REGMAP
8878	R: Michael Walle <michael@walle.cc>	8877	M: Michael Walle <michael@walle.cc>
8879	S: Maintained	8878	S: Maintained
8880	F: drivers/gpio/gpio-regmap.c	8879	F: drivers/gpio/gpio-regmap.c
8881	F: include/linux/gpio/regmap.h	8880	F: include/linux/gpio/regmap.h
@@ -13617,6 +13616,7 @@ F: drivers/net/ethernet/mellanox/mlxfw/ · 4735 unmodified lines
13617		13616
13618	MELLANOX HARDWARE PLATFORM SUPPORT	13617	MELLANOX HARDWARE PLATFORM SUPPORT
13619	M: Hans de Goede <hdegoede@redhat.com>	13618	M: Hans de Goede <hdegoede@redhat.com>
		13619	M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
13620	M: Mark Gross <markgross@kernel.org>	13620	M: Mark Gross <markgross@kernel.org>
13621	M: Vadim Pasternak <vadimp@nvidia.com>	13621	M: Vadim Pasternak <vadimp@nvidia.com>
13622	L: platform-driver-x86@vger.kernel.org	13622	L: platform-driver-x86@vger.kernel.org
@@ -14211,6 +14211,7 @@ F: drivers/platform/surface/surface_gpe.c · 588 unmodified lines
14211		14211
14212	MICROSOFT SURFACE HARDWARE PLATFORM SUPPORT	14212	MICROSOFT SURFACE HARDWARE PLATFORM SUPPORT
14213	M: Hans de Goede <hdegoede@redhat.com>	14213	M: Hans de Goede <hdegoede@redhat.com>
		14214	M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
14214	M: Mark Gross <markgross@kernel.org>	14215	M: Mark Gross <markgross@kernel.org>
14215	M: Maximilian Luz <luzmaximilian@gmail.com>	14216	M: Maximilian Luz <luzmaximilian@gmail.com>
14216	L: platform-driver-x86@vger.kernel.org	14217	L: platform-driver-x86@vger.kernel.org
@@ -14757,7 +14758,7 @@ NETROM NETWORK LAYER · 540 unmodified lines
14757	M: Ralf Baechle <ralf@linux-mips.org>	14758	M: Ralf Baechle <ralf@linux-mips.org>
14758	L: linux-hams@vger.kernel.org	14759	L: linux-hams@vger.kernel.org
14759	S: Maintained	14760	S: Maintained
14760	W: http://www.linux-ax25.org/	14761	W: https://linux-ax25.in-berlin.de
14761	F: include/net/netrom.h	14762	F: include/net/netrom.h
14762	F: include/uapi/linux/netrom.h	14763	F: include/uapi/linux/netrom.h
14763	F: net/netrom/	14764	F: net/netrom/
@@ -17680,7 +17681,7 @@ L: linux-pm@vger.kernel.org · 2916 unmodified lines
17680	L: linux-arm-msm@vger.kernel.org	17681	L: linux-arm-msm@vger.kernel.org
17681	S: Maintained	17682	S: Maintained
17682	F: Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml	17683	F: Documentation/devicetree/bindings/power/avs/qcom,cpr.yaml
17683	F: drivers/genpd/qcom/cpr.c	17684	F: drivers/pmdomain/qcom/cpr.c
17684		17685
17685	QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096	17686	QUALCOMM CPUFREQ DRIVER MSM8996/APQ8096
17686	M: Ilia Lin <ilia.lin@kernel.org>	17687	M: Ilia Lin <ilia.lin@kernel.org>
@@ -18608,7 +18609,7 @@ ROSE NETWORK LAYER · 921 unmodified lines
18608	M: Ralf Baechle <ralf@linux-mips.org>	18609	M: Ralf Baechle <ralf@linux-mips.org>
18609	L: linux-hams@vger.kernel.org	18610	L: linux-hams@vger.kernel.org
18610	S: Maintained	18611	S: Maintained
18611	W: http://www.linux-ax25.org/	18612	W: https://linux-ax25.in-berlin.de
18612	F: include/net/rose.h	18613	F: include/net/rose.h
18613	F: include/uapi/linux/rose.h	18614	F: include/uapi/linux/rose.h
18614	F: net/rose/	18615	F: net/rose/
@@ -20514,7 +20515,7 @@ STARFIVE JH71XX PMU CONTROLLER DRIVER · 1899 unmodified lines
20514	M: Walker Chen <walker.chen@starfivetech.com>	20515	M: Walker Chen <walker.chen@starfivetech.com>
20515	S: Supported	20516	S: Supported
20516	F: Documentation/devicetree/bindings/power/starfive*	20517	F: Documentation/devicetree/bindings/power/starfive*
20517	F: drivers/genpd/starfive/jh71xx-pmu.c	20518	F: drivers/pmdomain/starfive/jh71xx-pmu.c
20518	F: include/dt-bindings/power/starfive,jh7110-pmu.h	20519	F: include/dt-bindings/power/starfive,jh7110-pmu.h
20519		20520
20520	STARFIVE SOC DRIVERS	20521	STARFIVE SOC DRIVERS
@@ -21339,7 +21340,7 @@ F: drivers/irqchip/irq-ti-sci-inta.c · 818 unmodified lines
21339	F: drivers/irqchip/irq-ti-sci-intr.c	21340	F: drivers/irqchip/irq-ti-sci-intr.c
21340	F: drivers/reset/reset-ti-sci.c	21341	F: drivers/reset/reset-ti-sci.c
21341	F: drivers/soc/ti/ti_sci_inta_msi.c	21342	F: drivers/soc/ti/ti_sci_inta_msi.c
21342	F: drivers/genpd/ti/ti_sci_pm_domains.c	21343	F: drivers/pmdomain/ti/ti_sci_pm_domains.c
21343	F: include/dt-bindings/soc/ti,sci_pm_domain.h	21344	F: include/dt-bindings/soc/ti,sci_pm_domain.h
21344	F: include/linux/soc/ti/ti_sci_inta_msi.h	21345	F: include/linux/soc/ti/ti_sci_inta_msi.h
21345	F: include/linux/soc/ti/ti_sci_protocol.h	21346	F: include/linux/soc/ti/ti_sci_protocol.h
@@ -21581,7 +21582,7 @@ L: linux-kernel@vger.kernel.org · 235 unmodified lines
21581	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)	21582	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
21582	S: Maintained	21583	S: Maintained
21583	T: git git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git	21584	T: git git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
21584	F: drivers/genpd/ti/omap_prm.c	21585	F: drivers/pmdomain/ti/omap_prm.c
21585	F: drivers/soc/ti/*	21586	F: drivers/soc/ti/*
21586		21587
21587	TI LM49xxx FAMILY ASoC CODEC DRIVERS	21588	TI LM49xxx FAMILY ASoC CODEC DRIVERS
@@ -23424,9 +23425,11 @@ F: drivers/platform/x86/x86-android-tablets/ · 1836 unmodified lines
23424		23425
23425	X86 PLATFORM DRIVERS	23426	X86 PLATFORM DRIVERS
23426	M: Hans de Goede <hdegoede@redhat.com>	23427	M: Hans de Goede <hdegoede@redhat.com>
		23428	M: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
23427	M: Mark Gross <markgross@kernel.org>	23429	M: Mark Gross <markgross@kernel.org>
23428	L: platform-driver-x86@vger.kernel.org	23430	L: platform-driver-x86@vger.kernel.org
23429	S: Maintained	23431	S: Maintained
		23432	Q: https://patchwork.kernel.org/project/platform-driver-x86/list/
23430	T: git git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git	23433	T: git git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86.git
23431	F: drivers/platform/olpc/	23434	F: drivers/platform/olpc/
23432	F: drivers/platform/x86/	23435	F: drivers/platform/x86/

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	VERSION = 6	2	VERSION = 6
3	PATCHLEVEL = 6	3	PATCHLEVEL = 6
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc1	5	EXTRAVERSION = -rc4
6	NAME = Hurr durr I'ma ninja sloth	6	NAME = Hurr durr I'ma ninja sloth
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION

arch/arm/boot/dts/ti/omap/motorola-mapphone-common.dtsi+3−2

 /* Configure pwm clock source for timers 8 & 9 */
 &timer8 {
 	assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
-	assigned-clock-parents = <&sys_clkin_ck>;
+	assigned-clock-parents = <&sys_32k_ck>;
 };
 &timer9 {
 	assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
-	assigned-clock-parents = <&sys_clkin_ck>;
+	assigned-clock-parents = <&sys_32k_ck>;
 };
 /*
 &uart3 {
 	interrupts-extended = <&wakeupgen GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH
 			       &omap4_pmx_core 0x17c>;
+	overrun-throttle-ms = <500>;
 };
 &uart4 {

arch/arm/boot/dts/ti/omap/omap3-cpu-thermal.dtsi+1−2

@@ -12,8 +12,7 @@ cpu_thermal: cpu-thermal { · 11 unmodified lines
12	polling-delay = <1000>; /* milliseconds */	12	polling-delay = <1000>; /* milliseconds */
13	coefficients = <0 20000>;	13	coefficients = <0 20000>;
14		14
15	/* sensor ID */	15	thermal-sensors = <&bandgap>;
16	thermal-sensors = <&bandgap 0>;
17		16
18	cpu_trips: trips {	17	cpu_trips: trips {
19	cpu_alert0: cpu_alert {	18	cpu_alert0: cpu_alert {

arch/arm/boot/dts/ti/omap/omap4-cpu-thermal.dtsi+4−1

 	polling-delay-passive = <250>; /* milliseconds */
 	polling-delay = <1000>; /* milliseconds */
-			/* sensor       ID */
+	/*
+	 * See 44xx files for single sensor addressing, omap5 and dra7 need
+	 * also sensor ID for addressing.
+	 */
 	thermal-sensors = <&bandgap     0>;
 	cpu_trips: trips {

arch/arm/boot/dts/ti/omap/omap443x.dtsi+1−0

@@ -69,6 +69,7 @@ · 68 unmodified lines
69	};	69	};
70		70
71	&cpu_thermal {	71	&cpu_thermal {
		72	thermal-sensors = <&bandgap>;
72	coefficients = <0 20000>;	73	coefficients = <0 20000>;
73	};	74	};
74		75

arch/arm/boot/dts/ti/omap/omap4460.dtsi+1−0

@@ -79,6 +79,7 @@ · 78 unmodified lines
79	};	79	};
80		80
81	&cpu_thermal {	81	&cpu_thermal {
		82	thermal-sensors = <&bandgap>;
82	coefficients = <348 (-9301)>;	83	coefficients = <348 (-9301)>;
83	};	84	};
84		85

arch/arm/include/asm/hardware/locomo.h+1−1

@@ -195,7 +195,7 @@ struct locomo_driver { · 194 unmodified lines
195		195
196	#define LOCOMO_DRIVER_NAME(_ldev) ((_ldev)->dev.driver->name)	196	#define LOCOMO_DRIVER_NAME(_ldev) ((_ldev)->dev.driver->name)
197		197
198	void locomo_lcd_power(struct locomo_dev *, int, unsigned int);	198	extern void locomolcd_power(int on);
199		199
200	int locomo_driver_register(struct locomo_driver *);	200	int locomo_driver_register(struct locomo_driver *);
201	void locomo_driver_unregister(struct locomo_driver *);	201	void locomo_driver_unregister(struct locomo_driver *);

arch/arm/mach-omap2/pm44xx.c+2−2

@@ -99,7 +99,7 @@ static int omap4_pm_suspend(void) · 98 unmodified lines
99	* possible causes.	99	* possible causes.
100	* http://www.spinics.net/lists/arm-kernel/msg218641.html	100	* http://www.spinics.net/lists/arm-kernel/msg218641.html
101	*/	101	*/
102	pr_warn("A possible cause could be an old bootloader - try u-boot >= v2012.07\n");	102	pr_debug("A possible cause could be an old bootloader - try u-boot >= v2012.07\n");
103	} else {	103	} else {
104	pr_info("Successfully put all powerdomains to target state\n");	104	pr_info("Successfully put all powerdomains to target state\n");
105	}	105	}
@@ -257,7 +257,7 @@ int __init omap4_pm_init(void) · 151 unmodified lines
257	* http://www.spinics.net/lists/arm-kernel/msg218641.html	257	* http://www.spinics.net/lists/arm-kernel/msg218641.html
258	*/	258	*/
259	if (cpu_is_omap44xx())	259	if (cpu_is_omap44xx())
260	pr_warn("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n");	260	pr_debug("OMAP4 PM: u-boot >= v2012.07 is required for full PM support\n");
261		261
262	ret = pwrdm_for_each(pwrdms_setup, NULL);	262	ret = pwrdm_for_each(pwrdms_setup, NULL);
263	if (ret) {	263	if (ret) {

arch/arm/mach-sa1100/include/mach/collie.h+0−2

@@ -16,8 +16,6 @@ · 15 unmodified lines
16		16
17	#include "hardware.h" /* Gives GPIO_MAX */	17	#include "hardware.h" /* Gives GPIO_MAX */
18		18
19	extern void locomolcd_power(int on);
20
21	#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1)	19	#define COLLIE_SCOOP_GPIO_BASE (GPIO_MAX + 1)
22	#define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0)	20	#define COLLIE_GPIO_CHARGE_ON (COLLIE_SCOOP_GPIO_BASE + 0)
23	#define COLLIE_SCP_DIAG_BOOT1 SCOOP_GPCR_PA12	21	#define COLLIE_SCP_DIAG_BOOT1 SCOOP_GPCR_PA12

arch/arm/mm/cache-uniphier.c+3−1

 		((op & UNIPHIER_SSCOQM_S_MASK) == UNIPHIER_SSCOQM_S_RANGE)
 /**
- * uniphier_cache_data - UniPhier outer cache specific data
+ * struct uniphier_cache_data - UniPhier outer cache specific data
  *
  * @ctrl_base: virtual base address of control registers
  * @rev_base: virtual base address of revision registers
  * @op_base: virtual base address of operation registers
+ * @way_ctrl_base: virtual address of the way control registers for this
+ *	SoC revision
  * @way_mask: each bit specifies if the way is present
  * @nsets: number of associativity sets
  * @line_size: line size in bytes

arch/arm/xen/enlighten.c+1−1

@@ -207,7 +207,7 @@ static void xen_power_off(void) · 206 unmodified lines
207		207
208	static irqreturn_t xen_arm_callback(int irq, void *arg)	208	static irqreturn_t xen_arm_callback(int irq, void *arg)
209	{	209	{
210	xen_hvm_evtchn_do_upcall();	210	xen_evtchn_do_upcall();
211	return IRQ_HANDLED;	211	return IRQ_HANDLED;
212	}	212	}
213		213

arch/arm64/boot/dts/freescale/Makefile+1−0

@@ -66,6 +66,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mm-mx8menlo.dtb · 65 unmodified lines
66	dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb	66	dtb-$(CONFIG_ARCH_MXC) += imx8mm-nitrogen-r2.dtb
67	dtb-$(CONFIG_ARCH_MXC) += imx8mm-phg.dtb	67	dtb-$(CONFIG_ARCH_MXC) += imx8mm-phg.dtb
68	dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb	68	dtb-$(CONFIG_ARCH_MXC) += imx8mm-phyboard-polis-rdk.dtb
		69	dtb-$(CONFIG_ARCH_MXC) += imx8mm-prt8mm.dtb
69	dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb	70	dtb-$(CONFIG_ARCH_MXC) += imx8mm-tqma8mqml-mba8mx.dtb
70	dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb	71	dtb-$(CONFIG_ARCH_MXC) += imx8mm-var-som-symphony.dtb
71	dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb	72	dtb-$(CONFIG_ARCH_MXC) += imx8mm-venice-gw71xx-0x.dtb

arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi+20−12

@@ -26,7 +26,7 @@ · 25 unmodified lines
26		26
27	port {	27	port {
28	hdmi_connector_in: endpoint {	28	hdmi_connector_in: endpoint {
29	remote-endpoint = <&adv7533_out>;	29	remote-endpoint = <&adv7535_out>;
30	};	30	};
31	};	31	};
32	};	32	};
@@ -72,6 +72,13 @@ · 39 unmodified lines
72	enable-active-high;	72	enable-active-high;
73	};	73	};
74		74
		75	reg_vddext_3v3: regulator-vddext-3v3 {
		76	compatible = "regulator-fixed";
		77	regulator-name = "VDDEXT_3V3";
		78	regulator-min-microvolt = <3300000>;
		79	regulator-max-microvolt = <3300000>;
		80	};
		81
75	backlight: backlight {	82	backlight: backlight {
76	compatible = "pwm-backlight";	83	compatible = "pwm-backlight";
77	pwms = <&pwm1 0 5000000 0>;	84	pwms = <&pwm1 0 5000000 0>;
@@ -317,15 +324,16 @@ · 239 unmodified lines
317		324
318	hdmi@3d {	325	hdmi@3d {
319	compatible = "adi,adv7535";	326	compatible = "adi,adv7535";
320	reg = <0x3d>, <0x3c>, <0x3e>, <0x3f>;	327	reg = <0x3d>;
321	reg-names = "main", "cec", "edid", "packet";	328	interrupt-parent = <&gpio1>;
		329	interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
322	adi,dsi-lanes = <4>;	330	adi,dsi-lanes = <4>;
323		331	avdd-supply = <&buck5_reg>;
324	adi,input-depth = <8>;	332	dvdd-supply = <&buck5_reg>;
325	adi,input-colorspace = "rgb";	333	pvdd-supply = <&buck5_reg>;
326	adi,input-clock = "1x";	334	a2vdd-supply = <&buck5_reg>;
327	adi,input-style = <1>;	335	v3p3-supply = <&reg_vddext_3v3>;
328	adi,input-justification = "evenly";	336	v1p2-supply = <&buck5_reg>;
329		337
330	ports {	338	ports {
331	#address-cells = <1>;	339	#address-cells = <1>;
@@ -334,7 +342,7 @@ · 2 unmodified lines
334	port@0 {	342	port@0 {
335	reg = <0>;	343	reg = <0>;
336		344
337	adv7533_in: endpoint {	345	adv7535_in: endpoint {
338	remote-endpoint = <&dsi_out>;	346	remote-endpoint = <&dsi_out>;
339	};	347	};
340	};	348	};
@@ -342,7 +350,7 @@ · 1 unmodified line
342	port@1 {	350	port@1 {
343	reg = <1>;	351	reg = <1>;
344		352
345	adv7533_out: endpoint {	353	adv7535_out: endpoint {
346	remote-endpoint = <&hdmi_connector_in>;	354	remote-endpoint = <&hdmi_connector_in>;
347	};	355	};
348	};	356	};
@@ -448,7 +456,7 @@ · 99 unmodified lines
448	reg = <1>;	456	reg = <1>;
449		457
450	dsi_out: endpoint {	458	dsi_out: endpoint {
451	remote-endpoint = <&adv7533_in>;	459	remote-endpoint = <&adv7535_in>;
452	data-lanes = <1 2 3 4>;	460	data-lanes = <1 2 3 4>;
453	};	461	};
454	};	462	};

arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts+3−2

 &sai3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_sai3>;
-	assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
+	assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
+			  <&clk IMX8MP_AUDIO_PLL2> ;
 	assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
-	assigned-clock-rates = <12288000>;
+	assigned-clock-rates = <12288000>, <361267200>;
 	fsl,sai-mclk-direction-output;
 	status = "okay";
 };

arch/arm64/boot/dts/freescale/imx8mp.dtsi+6−0

 						reg = <IMX8MP_POWER_DOMAIN_AUDIOMIX>;
 						clocks = <&clk IMX8MP_CLK_AUDIO_ROOT>,
 							 <&clk IMX8MP_CLK_AUDIO_AXI>;
+						assigned-clocks = <&clk IMX8MP_CLK_AUDIO_AHB>,
+								  <&clk IMX8MP_CLK_AUDIO_AXI_SRC>;
+						assigned-clock-parents =  <&clk IMX8MP_SYS_PLL1_800M>,
+									  <&clk IMX8MP_SYS_PLL1_800M>;
+						assigned-clock-rates = <400000000>,
+								       <600000000>;
 					};
 					pgc_gpu2d: power-domain@6 {

arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi+1−1

@@ -81,7 +81,7 @@ · 80 unmodified lines
81	&gpio1 {	81	&gpio1 {
82	pmic-irq-hog {	82	pmic-irq-hog {
83	gpio-hog;	83	gpio-hog;
84	gpios = <2 GPIO_ACTIVE_LOW>;	84	gpios = <3 GPIO_ACTIVE_LOW>;
85	input;	85	input;
86	line-name = "PMIC_IRQ#";	86	line-name = "PMIC_IRQ#";
87	};	87	};

arch/arm64/boot/dts/mediatek/mt8195.dtsi+5−5

arch/arm64/configs/defconfig+1−1

 CONFIG_POWER_RESET_QCOM_PON=m
 CONFIG_POWER_RESET_XGENE=y
 CONFIG_POWER_RESET_SYSCON=y
+CONFIG_POWER_RESET_SYSCON_POWEROFF=y
 CONFIG_SYSCON_REBOOT_MODE=y
 CONFIG_NVMEM_REBOOT_MODE=m
 CONFIG_BATTERY_SBS=m
 CONFIG_COMMON_CLK_PWM=y
 CONFIG_COMMON_CLK_RS9_PCIE=y
 CONFIG_COMMON_CLK_VC5=y
-CONFIG_COMMON_CLK_NPCM8XX=y
 CONFIG_COMMON_CLK_BD718XX=m
 CONFIG_CLK_RASPBERRYPI=m
 CONFIG_CLK_IMX8MM=y

arch/arm64/include/asm/cpufeature.h+1−1

@@ -663,7 +663,7 @@ static inline bool supports_clearbhb(int scope) · 662 unmodified lines
663	isar2 = read_sanitised_ftr_reg(SYS_ID_AA64ISAR2_EL1);	663	isar2 = read_sanitised_ftr_reg(SYS_ID_AA64ISAR2_EL1);
664		664
665	return cpuid_feature_extract_unsigned_field(isar2,	665	return cpuid_feature_extract_unsigned_field(isar2,
666	ID_AA64ISAR2_EL1_BC_SHIFT);	666	ID_AA64ISAR2_EL1_CLRBHB_SHIFT);
667	}	667	}
668		668
669	const struct cpumask *system_32bit_el0_cpumask(void);	669	const struct cpumask *system_32bit_el0_cpumask(void);

arch/arm64/include/asm/hugetlb.h+1−1

@@ -28,7 +28,7 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags); · 27 unmodified lines
28	#define arch_make_huge_pte arch_make_huge_pte	28	#define arch_make_huge_pte arch_make_huge_pte
29	#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT	29	#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
30	extern void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,	30	extern void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
31	pte_t *ptep, pte_t pte);	31	pte_t *ptep, pte_t pte, unsigned long sz);
32	#define __HAVE_ARCH_HUGE_PTEP_SET_ACCESS_FLAGS	32	#define __HAVE_ARCH_HUGE_PTEP_SET_ACCESS_FLAGS
33	extern int huge_ptep_set_access_flags(struct vm_area_struct *vma,	33	extern int huge_ptep_set_access_flags(struct vm_area_struct *vma,
34	unsigned long addr, pte_t *ptep,	34	unsigned long addr, pte_t *ptep,

arch/arm64/include/asm/kvm_hyp.h+1−1

@@ -118,7 +118,7 @@ void deactivate_traps_vhe_put(struct kvm_vcpu *vcpu); · 117 unmodified lines
118		118
119	u64 __guest_enter(struct kvm_vcpu *vcpu);	119	u64 __guest_enter(struct kvm_vcpu *vcpu);
120		120
121	bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt);	121	bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt, u32 func_id);
122		122
123	#ifdef __KVM_NVHE_HYPERVISOR__	123	#ifdef __KVM_NVHE_HYPERVISOR__
124	void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr,	124	void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr,

arch/arm64/kernel/cpufeature.c+2−1

 static const struct arm64_ftr_bits ftr_id_aa64isar2[] = {
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_CSSC_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_RPRFM_SHIFT, 4, 0),
-	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_EL1_BC_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_CLRBHB_SHIFT, 4, 0),
+	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_BC_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR2_EL1_MOPS_SHIFT, 4, 0),
 	ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),
 		       FTR_STRICT, FTR_EXACT, ID_AA64ISAR2_EL1_APA3_SHIFT, 4, 0),

arch/arm64/kvm/hyp/include/nvhe/ffa.h+1−1

@@ -12,6 +12,6 @@ · 11 unmodified lines
12	#define FFA_MAX_FUNC_NUM 0x7F	12	#define FFA_MAX_FUNC_NUM 0x7F
13		13
14	int hyp_ffa_init(void *pages);	14	int hyp_ffa_init(void *pages);
15	bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt);	15	bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt, u32 func_id);
16		16
17	#endif /* __KVM_HYP_FFA_H */	17	#endif /* __KVM_HYP_FFA_H */

arch/arm64/kvm/hyp/nvhe/ffa.c+1−2

@@ -634,9 +634,8 @@ out_handled: · 633 unmodified lines
634	return true;	634	return true;
635	}	635	}
636		636
637	bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt)	637	bool kvm_host_ffa_handler(struct kvm_cpu_context *host_ctxt, u32 func_id)
638	{	638	{
639	DECLARE_REG(u64, func_id, host_ctxt, 0);
640	struct arm_smccc_res res;	639	struct arm_smccc_res res;
641		640
642	/*	641	/*

arch/arm64/kvm/hyp/nvhe/hyp-init.S+1−0

@@ -57,6 +57,7 @@ __do_hyp_init: · 56 unmodified lines
57	cmp x0, #HVC_STUB_HCALL_NR	57	cmp x0, #HVC_STUB_HCALL_NR
58	b.lo __kvm_handle_stub_hvc	58	b.lo __kvm_handle_stub_hvc
59		59
		60	bic x0, x0, #ARM_SMCCC_CALL_HINTS
60	mov x3, #KVM_HOST_SMCCC_FUNC(__kvm_hyp_init)	61	mov x3, #KVM_HOST_SMCCC_FUNC(__kvm_hyp_init)
61	cmp x0, x3	62	cmp x0, x3
62	b.eq 1f	63	b.eq 1f

arch/arm64/kvm/hyp/nvhe/hyp-main.c+6−2

 	if (static_branch_unlikely(&kvm_protected_mode_initialized))
 		hcall_min = __KVM_HOST_SMCCC_FUNC___pkvm_prot_finalize;
+	id &= ~ARM_SMCCC_CALL_HINTS;
 	id -= KVM_HOST_SMCCC_ID(0);
 	if (unlikely(id < hcall_min || id >= ARRAY_SIZE(host_hcall)))
 static void handle_host_smc(struct kvm_cpu_context *host_ctxt)
 {
+	DECLARE_REG(u64, func_id, host_ctxt, 0);
 	bool handled;
-	handled = kvm_host_psci_handler(host_ctxt);
+	func_id &= ~ARM_SMCCC_CALL_HINTS;
+	handled = kvm_host_psci_handler(host_ctxt, func_id);
 	if (!handled)
-		handled = kvm_host_ffa_handler(host_ctxt);
+		handled = kvm_host_ffa_handler(host_ctxt, func_id);
 	if (!handled)
 		default_host_smc_handler(host_ctxt);

arch/arm64/kvm/hyp/nvhe/psci-relay.c+1−2

@@ -273,9 +273,8 @@ static unsigned long psci_1_0_handler(u64 func_id, struct kvm_cpu_context *host_ · 272 unmodified lines
273	}	273	}
274	}	274	}
275		275
276	bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt)	276	bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt, u32 func_id)
277	{	277	{
278	DECLARE_REG(u64, func_id, host_ctxt, 0);
279	unsigned long ret;	278	unsigned long ret;
280		279
281	switch (kvm_host_psci_config.version) {	280	switch (kvm_host_psci_config.version) {

arch/arm64/kvm/mmu.c+3−0

@@ -652,6 +652,9 @@ int hyp_alloc_private_va_range(size_t size, unsigned long *haddr) · 651 unmodified lines
652		652
653	mutex_unlock(&kvm_hyp_pgd_mutex);	653	mutex_unlock(&kvm_hyp_pgd_mutex);
654		654
		655	if (!ret)
		656	*haddr = base;
		657
655	return ret;	658	return ret;
656	}	659	}
657		660

arch/arm64/mm/hugetlbpage.c+7−16

 	flush_tlb_range(&vma, saddr, addr);
 }
-static inline struct folio *hugetlb_swap_entry_to_folio(swp_entry_t entry)
-{
-	VM_BUG_ON(!is_migration_entry(entry) && !is_hwpoison_entry(entry));
-	return page_folio(pfn_to_page(swp_offset_pfn(entry)));
-}
 void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
-			    pte_t *ptep, pte_t pte)
+			    pte_t *ptep, pte_t pte, unsigned long sz)
 {
 	size_t pgsize;
 	int i;
 	unsigned long pfn, dpfn;
 	pgprot_t hugeprot;
-	if (!pte_present(pte)) {
+	ncontig = num_contig_ptes(sz, &pgsize);
-		struct folio *folio;
-		folio = hugetlb_swap_entry_to_folio(pte_to_swp_entry(pte));
-		ncontig = num_contig_ptes(folio_size(folio), &pgsize);
-		for (i = 0; i < ncontig; i++, ptep++)
+	if (!pte_present(pte)) {
+		for (i = 0; i < ncontig; i++, ptep++, addr += pgsize)
 			set_pte_at(mm, addr, ptep, pte);
 		return;
 	}
 		return;
 	}
-	ncontig = find_num_contig(mm, addr, ptep, &pgsize);
 	pfn = pte_pfn(pte);
 	dpfn = pgsize >> PAGE_SHIFT;
 	hugeprot = pte_pgprot(pte);
 void huge_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep,
 				  pte_t old_pte, pte_t pte)
 {
-	set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
+	unsigned long psize = huge_page_size(hstate_vma(vma));
+	set_huge_pte_at(vma->vm_mm, addr, ptep, pte, psize);
 }

arch/arm64/tools/sysreg+5−1

 	0b0000	NI
 	0b0001	IMP
 EndEnum
-Res0	47:28
+Res0	47:32
+UnsignedEnum	31:28	CLRBHB
+	0b0000	NI
+	0b0001	IMP
+EndEnum
 UnsignedEnum	27:24	PAC_frac
 	0b0000	NI
 	0b0001	IMP

arch/ia64/kernel/acpi.c+4−0

@@ -907,3 +907,7 @@ EXPORT_SYMBOL(acpi_unregister_ioapic); · 906 unmodified lines
907	* TBD when IA64 starts to support suspend...	907	* TBD when IA64 starts to support suspend...
908	*/	908	*/
909	int acpi_suspend_lowlevel(void) { return 0; }	909	int acpi_suspend_lowlevel(void) { return 0; }
		910
		911	void acpi_proc_quirk_mwait_check(void)
		912	{
		913	}

arch/loongarch/include/asm/addrspace.h+6−6

  */
 #ifndef __ASSEMBLY__
 #ifndef PHYS_OFFSET
-#define PHYS_OFFSET	_AC(0, UL)
+#define PHYS_OFFSET	_UL(0)
 #endif
 extern unsigned long vm_map_base;
 #endif /* __ASSEMBLY__ */
  * Memory above this physical address will be considered highmem.
  */
 #ifndef HIGHMEM_START
-#define HIGHMEM_START		(_AC(1, UL) << _AC(DMW_PABITS, UL))
+#define HIGHMEM_START		(_UL(1) << _UL(DMW_PABITS))
 #endif
 #define TO_PHYS(x)		(		((x) & TO_PHYS_MASK))
 #define _ATYPE_
 #define _ATYPE32_
 #define _ATYPE64_
-#define _CONST64_(x)	x
 #else
 #define _ATYPE_		__PTRDIFF_TYPE__
 #define _ATYPE32_	int
 #define _ATYPE64_	__s64
+#endif
 #ifdef CONFIG_64BIT
-#define _CONST64_(x)	x ## UL
+#define _CONST64_(x)	_UL(x)
 #else
-#define _CONST64_(x)	x ## ULL
+#define _CONST64_(x)	_ULL(x)
-#endif
 #endif
 /*

arch/loongarch/include/asm/elf.h+9−0

@@ -111,6 +111,15 @@ · 110 unmodified lines
111	#define R_LARCH_TLS_GD_HI20 98	111	#define R_LARCH_TLS_GD_HI20 98
112	#define R_LARCH_32_PCREL 99	112	#define R_LARCH_32_PCREL 99
113	#define R_LARCH_RELAX 100	113	#define R_LARCH_RELAX 100
		114	#define R_LARCH_DELETE 101
		115	#define R_LARCH_ALIGN 102
		116	#define R_LARCH_PCREL20_S2 103
		117	#define R_LARCH_CFA 104
		118	#define R_LARCH_ADD6 105
		119	#define R_LARCH_SUB6 106
		120	#define R_LARCH_ADD_ULEB128 107
		121	#define R_LARCH_SUB_ULEB128 108
		122	#define R_LARCH_64_PCREL 109
114		123
115	#ifndef ELF_ARCH	124	#ifndef ELF_ARCH
116		125

arch/loongarch/include/asm/exception.h+45−0

@@ -0,0 +1,45 @@
	1	/* SPDX-License-Identifier: GPL-2.0-only */
	2
	3	#ifndef __ASM_EXCEPTION_H
	4	#define __ASM_EXCEPTION_H
	5
	6	#include <asm/ptrace.h>
	7	#include <linux/kprobes.h>
	8
	9	void show_registers(struct pt_regs *regs);
	10
	11	asmlinkage void cache_parity_error(void);
	12	asmlinkage void noinstr do_ade(struct pt_regs *regs);
	13	asmlinkage void noinstr do_ale(struct pt_regs *regs);
	14	asmlinkage void noinstr do_bce(struct pt_regs *regs);
	15	asmlinkage void noinstr do_bp(struct pt_regs *regs);
	16	asmlinkage void noinstr do_ri(struct pt_regs *regs);
	17	asmlinkage void noinstr do_fpu(struct pt_regs *regs);
	18	asmlinkage void noinstr do_fpe(struct pt_regs *regs, unsigned long fcsr);
	19	asmlinkage void noinstr do_lsx(struct pt_regs *regs);
	20	asmlinkage void noinstr do_lasx(struct pt_regs *regs);
	21	asmlinkage void noinstr do_lbt(struct pt_regs *regs);
	22	asmlinkage void noinstr do_watch(struct pt_regs *regs);
	23	asmlinkage void noinstr do_syscall(struct pt_regs *regs);
	24	asmlinkage void noinstr do_reserved(struct pt_regs *regs);
	25	asmlinkage void noinstr do_vint(struct pt_regs *regs, unsigned long sp);
	26	asmlinkage void __kprobes do_page_fault(struct pt_regs *regs,
	27	unsigned long write, unsigned long address);
	28
	29	asmlinkage void handle_ade(void);
	30	asmlinkage void handle_ale(void);
	31	asmlinkage void handle_bce(void);
	32	asmlinkage void handle_sys(void);
	33	asmlinkage void handle_bp(void);
	34	asmlinkage void handle_ri(void);
	35	asmlinkage void handle_fpu(void);
	36	asmlinkage void handle_fpe(void);
	37	asmlinkage void handle_lsx(void);
	38	asmlinkage void handle_lasx(void);
	39	asmlinkage void handle_lbt(void);
	40	asmlinkage void handle_watch(void);
	41	asmlinkage void handle_reserved(void);
	42	asmlinkage void handle_vint(void);
	43	asmlinkage void noinstr handle_loongarch_irq(struct pt_regs *regs);
	44
	45	#endif /* __ASM_EXCEPTION_H */

arch/loongarch/include/asm/kasan.h+9−50

@@ -10,8 +10,6 @@ · 9 unmodified lines
10	#include <asm/io.h>	10	#include <asm/io.h>
11	#include <asm/pgtable.h>	11	#include <asm/pgtable.h>
12		12
13	#define __HAVE_ARCH_SHADOW_MAP
14
15	#define KASAN_SHADOW_SCALE_SHIFT 3	13	#define KASAN_SHADOW_SCALE_SHIFT 3
16	#define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)	14	#define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
17		15
@@ -62,61 +60,22 @@ · 44 unmodified lines
62	extern bool kasan_early_stage;	60	extern bool kasan_early_stage;
63	extern unsigned char kasan_early_shadow_page[PAGE_SIZE];	61	extern unsigned char kasan_early_shadow_page[PAGE_SIZE];
64		62
		63	#define kasan_mem_to_shadow kasan_mem_to_shadow
		64	void kasan_mem_to_shadow(const void addr);
		65
		66	#define kasan_shadow_to_mem kasan_shadow_to_mem
		67	const void kasan_shadow_to_mem(const void shadow_addr);
		68
65	#define kasan_arch_is_ready kasan_arch_is_ready	69	#define kasan_arch_is_ready kasan_arch_is_ready
66	static __always_inline bool kasan_arch_is_ready(void)	70	static __always_inline bool kasan_arch_is_ready(void)
67	{	71	{
68	return !kasan_early_stage;	72	return !kasan_early_stage;
69	}	73	}
70		74
71	static inline void kasan_mem_to_shadow(const void addr)	75	#define addr_has_metadata addr_has_metadata
72	{	76	static __always_inline bool addr_has_metadata(const void *addr)
73	if (!kasan_arch_is_ready()) {
74	return (void *)(kasan_early_shadow_page);
75	} else {
76	unsigned long maddr = (unsigned long)addr;
77	unsigned long xrange = (maddr >> XRANGE_SHIFT) & 0xffff;
78	unsigned long offset = 0;
79
80	maddr &= XRANGE_SHADOW_MASK;
81	switch (xrange) {
82	case XKPRANGE_CC_SEG:
83	offset = XKPRANGE_CC_SHADOW_OFFSET;
84	break;
85	case XKPRANGE_UC_SEG:
86	offset = XKPRANGE_UC_SHADOW_OFFSET;
87	break;
88	case XKVRANGE_VC_SEG:
89	offset = XKVRANGE_VC_SHADOW_OFFSET;
90	break;
91	default:
92	WARN_ON(1);
93	return NULL;
94	}
95
96	return (void *)((maddr >> KASAN_SHADOW_SCALE_SHIFT) + offset);
97	}
98	}
99
100	static inline const void kasan_shadow_to_mem(const void shadow_addr)
101	{	77	{
102	unsigned long addr = (unsigned long)shadow_addr;	78	return (kasan_mem_to_shadow((void *)addr) != NULL);
103
104	if (unlikely(addr > KASAN_SHADOW_END) \|\|
105	unlikely(addr < KASAN_SHADOW_START)) {
106	WARN_ON(1);
107	return NULL;
108	}
109
110	if (addr >= XKVRANGE_VC_SHADOW_OFFSET)
111	return (void *)(((addr - XKVRANGE_VC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKVRANGE_VC_START);
112	else if (addr >= XKPRANGE_UC_SHADOW_OFFSET)
113	return (void *)(((addr - XKPRANGE_UC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_UC_START);
114	else if (addr >= XKPRANGE_CC_SHADOW_OFFSET)
115	return (void *)(((addr - XKPRANGE_CC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_CC_START);
116	else {
117	WARN_ON(1);
118	return NULL;
119	}
120	}	79	}
121		80
122	void kasan_init(void);	81	void kasan_init(void);

arch/loongarch/include/asm/smp.h+1−0

@@ -70,6 +70,7 @@ struct secondary_data { · 69 unmodified lines
70	extern struct secondary_data cpuboot_data;	70	extern struct secondary_data cpuboot_data;
71		71
72	extern asmlinkage void smpboot_entry(void);	72	extern asmlinkage void smpboot_entry(void);
		73	extern asmlinkage void start_secondary(void);
73		74
74	extern void calculate_cpu_foreign_map(void);	75	extern void calculate_cpu_foreign_map(void);
75		76

arch/loongarch/kernel/Makefile+4−0

@@ -19,6 +19,10 @@ obj-$(CONFIG_CPU_HAS_LBT) += lbt.o · 18 unmodified lines
19		19
20	obj-$(CONFIG_ARCH_STRICT_ALIGN) += unaligned.o	20	obj-$(CONFIG_ARCH_STRICT_ALIGN) += unaligned.o
21		21
		22	CFLAGS_module.o += $(call cc-option,-Wno-override-init,)
		23	CFLAGS_syscall.o += $(call cc-option,-Wno-override-init,)
		24	CFLAGS_perf_event.o += $(call cc-option,-Wno-override-init,)
		25
22	ifdef CONFIG_FUNCTION_TRACER	26	ifdef CONFIG_FUNCTION_TRACER
23	ifndef CONFIG_DYNAMIC_FTRACE	27	ifndef CONFIG_DYNAMIC_FTRACE
24	obj-y += mcount.o ftrace.o	28	obj-y += mcount.o ftrace.o

arch/loongarch/kernel/acpi.c+0−1

@@ -281,7 +281,6 @@ acpi_numa_processor_affinity_init(struct acpi_srat_cpu_affinity *pa) · 280 unmodified lines
281	pr_info("SRAT: PXM %u -> CPU 0x%02x -> Node %u\n", pxm, pa->apic_id, node);	281	pr_info("SRAT: PXM %u -> CPU 0x%02x -> Node %u\n", pxm, pa->apic_id, node);
282	}	282	}
283		283
284	void __init acpi_numa_arch_fixup(void) {}
285	#endif	284	#endif
286		285
287	void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size)	286	void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size)

arch/loongarch/kernel/mem.c+3−1

 	}
 	memblock_set_current_limit(PFN_PHYS(max_low_pfn));
-	memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
 	/* Reserve the first 2MB */
 	memblock_reserve(PHYS_OFFSET, 0x200000);
 	/* Reserve the kernel text/data/bss */
 	memblock_reserve(__pa_symbol(&_text),
 			 __pa_symbol(&_end) - __pa_symbol(&_text));
+	memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);
+	memblock_set_node(0, PHYS_ADDR_MAX, &memblock.reserved, 0);
 }

arch/loongarch/kernel/module-sections.c+1−0

@@ -6,6 +6,7 @@ · 5 unmodified lines
6	#include <linux/elf.h>	6	#include <linux/elf.h>
7	#include <linux/kernel.h>	7	#include <linux/kernel.h>
8	#include <linux/module.h>	8	#include <linux/module.h>
		9	#include <linux/moduleloader.h>
9	#include <linux/ftrace.h>	10	#include <linux/ftrace.h>
10		11
11	Elf_Addr module_emit_got_entry(struct module mod, Elf_Shdr sechdrs, Elf_Addr val)	12	Elf_Addr module_emit_got_entry(struct module mod, Elf_Shdr sechdrs, Elf_Addr val)

arch/loongarch/kernel/module.c+21−1

@@ -367,6 +367,24 @@ static int apply_r_larch_got_pc(struct module *mod, · 366 unmodified lines
367	return apply_r_larch_pcala(mod, location, got, rela_stack, rela_stack_top, type);	367	return apply_r_larch_pcala(mod, location, got, rela_stack, rela_stack_top, type);
368	}	368	}
369		369
		370	static int apply_r_larch_32_pcrel(struct module mod, u32 location, Elf_Addr v,
		371	s64 rela_stack, size_t rela_stack_top, unsigned int type)
		372	{
		373	ptrdiff_t offset = (void )v - (void )location;
		374
		375	(u32 )location = offset;
		376	return 0;
		377	}
		378
		379	static int apply_r_larch_64_pcrel(struct module mod, u32 location, Elf_Addr v,
		380	s64 rela_stack, size_t rela_stack_top, unsigned int type)
		381	{
		382	ptrdiff_t offset = (void )v - (void )location;
		383
		384	(u64 )location = offset;
		385	return 0;
		386	}
		387
370	/*	388	/*
371	* reloc_handlers_rela() - Apply a particular relocation to a module	389	* reloc_handlers_rela() - Apply a particular relocation to a module
372	* @mod: the module to apply the reloc to	390	* @mod: the module to apply the reloc to
@@ -382,7 +400,7 @@ typedef int (reloc_rela_handler)(struct module mod, u32 *location, Elf_Addr v, · 9 unmodified lines
382		400
383	/* The handlers for known reloc types */	401	/* The handlers for known reloc types */
384	static reloc_rela_handler reloc_rela_handlers[] = {	402	static reloc_rela_handler reloc_rela_handlers[] = {
385	[R_LARCH_NONE ... R_LARCH_RELAX] = apply_r_larch_error,	403	[R_LARCH_NONE ... R_LARCH_64_PCREL] = apply_r_larch_error,
386		404
387	[R_LARCH_NONE] = apply_r_larch_none,	405	[R_LARCH_NONE] = apply_r_larch_none,
388	[R_LARCH_32] = apply_r_larch_32,	406	[R_LARCH_32] = apply_r_larch_32,
@@ -396,6 +414,8 @@ static reloc_rela_handler reloc_rela_handlers[] = { · 7 unmodified lines
396	[R_LARCH_SOP_POP_32_S_10_5 ... R_LARCH_SOP_POP_32_U] = apply_r_larch_sop_imm_field,	414	[R_LARCH_SOP_POP_32_S_10_5 ... R_LARCH_SOP_POP_32_U] = apply_r_larch_sop_imm_field,
397	[R_LARCH_ADD32 ... R_LARCH_SUB64] = apply_r_larch_add_sub,	415	[R_LARCH_ADD32 ... R_LARCH_SUB64] = apply_r_larch_add_sub,
398	[R_LARCH_PCALA_HI20...R_LARCH_PCALA64_HI12] = apply_r_larch_pcala,	416	[R_LARCH_PCALA_HI20...R_LARCH_PCALA64_HI12] = apply_r_larch_pcala,
		417	[R_LARCH_32_PCREL] = apply_r_larch_32_pcrel,
		418	[R_LARCH_64_PCREL] = apply_r_larch_64_pcrel,
399	};	419	};
400		420
401	int apply_relocate_add(Elf_Shdr sechdrs, const char strtab,	421	int apply_relocate_add(Elf_Shdr sechdrs, const char strtab,

arch/loongarch/kernel/numa.c+1−1

@@ -436,7 +436,7 @@ void __init paging_init(void) · 435 unmodified lines
436		436
437	void __init mem_init(void)	437	void __init mem_init(void)
438	{	438	{
439	high_memory = (void *) __va(get_num_physpages() << PAGE_SHIFT);	439	high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT);
440	memblock_free_all();	440	memblock_free_all();
441	}	441	}
442		442

arch/loongarch/kernel/process.c+1−0

@@ -37,6 +37,7 @@ · 36 unmodified lines
37	#include <asm/bootinfo.h>	37	#include <asm/bootinfo.h>
38	#include <asm/cpu.h>	38	#include <asm/cpu.h>
39	#include <asm/elf.h>	39	#include <asm/elf.h>
		40	#include <asm/exec.h>
40	#include <asm/fpu.h>	41	#include <asm/fpu.h>
41	#include <asm/lbt.h>	42	#include <asm/lbt.h>
42	#include <asm/io.h>	43	#include <asm/io.h>

arch/loongarch/kernel/relocate_kernel.S+0−1

@@ -72,7 +72,6 @@ copy_word: · 71 unmodified lines
72	LONG_ADDI s5, s5, -1	72	LONG_ADDI s5, s5, -1
73	beqz s5, process_entry	73	beqz s5, process_entry
74	b copy_word	74	b copy_word
75	b process_entry
76		75
77	done:	76	done:
78	ibar 0	77	ibar 0

arch/loongarch/kernel/signal.c+4−3

 #include <linux/audit.h>
 #include <linux/cache.h>
 #include <linux/context_tracking.h>
+#include <linux/entry-common.h>
 #include <linux/irqflags.h>
 #include <linux/sched.h>
 #include <linux/mm.h>
 	return new_sp;
 }
-void __user *get_sigframe(struct ksignal *ksig, struct pt_regs *regs,
+static void __user *get_sigframe(struct ksignal *ksig, struct pt_regs *regs,
-			  struct extctx_layout *extctx)
+				 struct extctx_layout *extctx)
 {
 	unsigned long sp;
  * Atomically swap in the new signal mask, and wait for a signal.
  */
-asmlinkage long sys_rt_sigreturn(void)
+SYSCALL_DEFINE0(rt_sigreturn)
 {
 	int sig;
 	sigset_t set;

arch/loongarch/kernel/smp.c+3−0

 #include <linux/cpumask.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
+#include <linux/profile.h>
 #include <linux/seq_file.h>
 #include <linux/smp.h>
 #include <linux/threads.h>
 	smp_call_function(stop_this_cpu, NULL, 0);
 }
+#ifdef CONFIG_PROFILING
 int setup_profiling_timer(unsigned int multiplier)
 {
 	return 0;
 }
+#endif
 static void flush_tlb_all_ipi(void *info)
 {

arch/loongarch/kernel/syscall.c+1−0

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	#include <linux/unistd.h>	13	#include <linux/unistd.h>
14		14
15	#include <asm/asm.h>	15	#include <asm/asm.h>
		16	#include <asm/exception.h>
16	#include <asm/signal.h>	17	#include <asm/signal.h>
17	#include <asm/switch_to.h>	18	#include <asm/switch_to.h>
18	#include <asm-generic/syscalls.h>	19	#include <asm-generic/syscalls.h>

arch/loongarch/kernel/time.c+1−1

@@ -29,7 +29,7 @@ static void constant_event_handler(struct clock_event_device *dev) · 28 unmodified lines
29	{	29	{
30	}	30	}
31		31
32	irqreturn_t constant_timer_interrupt(int irq, void *data)	32	static irqreturn_t constant_timer_interrupt(int irq, void *data)
33	{	33	{
34	int cpu = smp_processor_id();	34	int cpu = smp_processor_id();
35	struct clock_event_device *cd;	35	struct clock_event_device *cd;

arch/loongarch/kernel/topology.c+3−0

 // SPDX-License-Identifier: GPL-2.0
+#include <linux/acpi.h>
 #include <linux/cpu.h>
 #include <linux/cpumask.h>
 #include <linux/init.h>
 #include <linux/percpu.h>
 #include <asm/bootinfo.h>
+#include <acpi/processor.h>
 static DEFINE_PER_CPU(struct cpu, cpu_devices);
 #ifdef CONFIG_HOTPLUG_CPU

arch/loongarch/kernel/traps.c+5−20

 #include <linux/ptrace.h>
 #include <linux/kgdb.h>
 #include <linux/kdebug.h>
-#include <linux/kprobes.h>
 #include <linux/notifier.h>
 #include <linux/irq.h>
 #include <linux/perf_event.h>
 #include <asm/branch.h>
 #include <asm/break.h>
 #include <asm/cpu.h>
+#include <asm/exception.h>
 #include <asm/fpu.h>
 #include <asm/lbt.h>
 #include <asm/inst.h>
 #include "access-helper.h"
-extern asmlinkage void handle_ade(void);
-extern asmlinkage void handle_ale(void);
-extern asmlinkage void handle_bce(void);
-extern asmlinkage void handle_sys(void);
-extern asmlinkage void handle_bp(void);
-extern asmlinkage void handle_ri(void);
-extern asmlinkage void handle_fpu(void);
-extern asmlinkage void handle_fpe(void);
-extern asmlinkage void handle_lbt(void);
-extern asmlinkage void handle_lsx(void);
-extern asmlinkage void handle_lasx(void);
-extern asmlinkage void handle_reserved(void);
-extern asmlinkage void handle_watch(void);
-extern asmlinkage void handle_vint(void);
 static void show_backtrace(struct task_struct *task, const struct pt_regs *regs,
 			   const char *loglvl, bool user)
 {
  * happen together with Overflow or Underflow, and `ptrace' can set
  * any bits.
  */
-void force_fcsr_sig(unsigned long fcsr, void __user *fault_addr,
+static void force_fcsr_sig(unsigned long fcsr,
-		     struct task_struct *tsk)
+			void __user *fault_addr, struct task_struct *tsk)
 {
 	int si_code = FPE_FLTUNK;
 	force_sig_fault(SIGFPE, si_code, fault_addr);
 }
-int process_fpemu_return(int sig, void __user *fault_addr, unsigned long fcsr)
+static int process_fpemu_return(int sig, void __user *fault_addr, unsigned long fcsr)
 {
 	int si_code;
 asmlinkage void noinstr do_ri(struct pt_regs *regs)
 {
 	int status = SIGILL;
-	unsigned int opcode = 0;
+	unsigned int __maybe_unused opcode;
 	unsigned int __user *era = (unsigned int __user *)exception_era(regs);
 	irqentry_state_t state = irqentry_enter(regs);

arch/loongarch/kernel/vmlinux.lds.S+28−27

 	. = ALIGN(PECOFF_SEGMENT_ALIGN);
 	_etext = .;
-	/*
-	 * struct alt_inst entries. From the header (alternative.h):
-	 * "Alternative instructions for different CPU types or capabilities"
-	 * Think locking instructions on spinlocks.
-	 */
-	. = ALIGN(4);
-	.altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
-		__alt_instructions = .;
-		*(.altinstructions)
-		__alt_instructions_end = .;
-	}
-#ifdef CONFIG_RELOCATABLE
-	. = ALIGN(8);
-	.la_abs : AT(ADDR(.la_abs) - LOAD_OFFSET) {
-		__la_abs_begin = .;
-		*(.la_abs)
-		__la_abs_end = .;
-	}
-#endif
-	.got : ALIGN(16) { *(.got) }
-	.plt : ALIGN(16) { *(.plt) }
-	.got.plt : ALIGN(16) { *(.got.plt) }
-	.data.rel : { *(.data.rel*) }
 	. = ALIGN(PECOFF_SEGMENT_ALIGN);
 	__init_begin = .;
 	__inittext_begin = .;
 	__initdata_begin = .;
+	/*
+	 * struct alt_inst entries. From the header (alternative.h):
+	 * "Alternative instructions for different CPU types or capabilities"
+	 * Think locking instructions on spinlocks.
+	 */
+	. = ALIGN(4);
+	.altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
+		__alt_instructions = .;
+		*(.altinstructions)
+		__alt_instructions_end = .;
+	}
 	INIT_DATA_SECTION(16)
 	.exit.data : {
 		EXIT_DATA
 	_sdata = .;
 	RO_DATA(4096)
+	.got : ALIGN(16) { *(.got) }
+	.plt : ALIGN(16) { *(.plt) }
+	.got.plt : ALIGN(16) { *(.got.plt) }
 	RW_DATA(1 << CONFIG_L1_CACHE_SHIFT, PAGE_SIZE, THREAD_SIZE)
 	.rela.dyn : ALIGN(8) {
 		__rela_dyn_end = .;
 	}
+	.data.rel : { *(.data.rel*) }
+#ifdef CONFIG_RELOCATABLE
+	. = ALIGN(8);
+	.la_abs : AT(ADDR(.la_abs) - LOAD_OFFSET) {
+		__la_abs_begin = .;
+		*(.la_abs)
+		__la_abs_end = .;
+	}
+#endif
 	.sdata : {
 		*(.sdata)
 	}

arch/loongarch/mm/fault.c+1−1

 #include <linux/mm.h>
 #include <linux/smp.h>
 #include <linux/kdebug.h>
-#include <linux/kprobes.h>
 #include <linux/perf_event.h>
 #include <linux/uaccess.h>
 #include <linux/kfence.h>
 #include <asm/branch.h>
+#include <asm/exception.h>
 #include <asm/mmu_context.h>
 #include <asm/ptrace.h>

arch/loongarch/mm/hugetlbpage.c+0−12

@@ -50,18 +50,6 @@ pte_t huge_pte_offset(struct mm_struct mm, unsigned long addr, · 49 unmodified lines
50	return (pte_t *) pmd;	50	return (pte_t *) pmd;
51	}	51	}
52		52
53	/*
54	* This function checks for proper alignment of input addr and len parameters.
55	*/
56	int is_aligned_hugepage_range(unsigned long addr, unsigned long len)
57	{
58	if (len & ~HPAGE_MASK)
59	return -EINVAL;
60	if (addr & ~HPAGE_MASK)
61	return -EINVAL;
62	return 0;
63	}
64
65	int pmd_huge(pmd_t pmd)	53	int pmd_huge(pmd_t pmd)
66	{	54	{
67	return (pmd_val(pmd) & _PAGE_HUGE) != 0;	55	return (pmd_val(pmd) & _PAGE_HUGE) != 0;

arch/loongarch/mm/ioremap.c+1−0

@@ -4,6 +4,7 @@ · 3 unmodified lines
4	*/	4	*/
5		5
6	#include <asm/io.h>	6	#include <asm/io.h>
		7	#include <asm-generic/early_ioremap.h>
7		8
8	void __init __iomem *early_ioremap(u64 phys_addr, unsigned long size)	9	void __init __iomem *early_ioremap(u64 phys_addr, unsigned long size)
9	{	10	{

arch/loongarch/mm/kasan_init.c+51−0

@@ -35,6 +35,57 @@ static pgd_t kasan_pg_dir[PTRS_PER_PGD] __initdata __aligned(PAGE_SIZE); · 34 unmodified lines
35		35
36	bool kasan_early_stage = true;	36	bool kasan_early_stage = true;
37		37
		38	void kasan_mem_to_shadow(const void addr)
		39	{
		40	if (!kasan_arch_is_ready()) {
		41	return (void *)(kasan_early_shadow_page);
		42	} else {
		43	unsigned long maddr = (unsigned long)addr;
		44	unsigned long xrange = (maddr >> XRANGE_SHIFT) & 0xffff;
		45	unsigned long offset = 0;
		46
		47	maddr &= XRANGE_SHADOW_MASK;
		48	switch (xrange) {
		49	case XKPRANGE_CC_SEG:
		50	offset = XKPRANGE_CC_SHADOW_OFFSET;
		51	break;
		52	case XKPRANGE_UC_SEG:
		53	offset = XKPRANGE_UC_SHADOW_OFFSET;
		54	break;
		55	case XKVRANGE_VC_SEG:
		56	offset = XKVRANGE_VC_SHADOW_OFFSET;
		57	break;
		58	default:
		59	WARN_ON(1);
		60	return NULL;
		61	}
		62
		63	return (void *)((maddr >> KASAN_SHADOW_SCALE_SHIFT) + offset);
		64	}
		65	}
		66
		67	const void kasan_shadow_to_mem(const void shadow_addr)
		68	{
		69	unsigned long addr = (unsigned long)shadow_addr;
		70
		71	if (unlikely(addr > KASAN_SHADOW_END) \|\|
		72	unlikely(addr < KASAN_SHADOW_START)) {
		73	WARN_ON(1);
		74	return NULL;
		75	}
		76
		77	if (addr >= XKVRANGE_VC_SHADOW_OFFSET)
		78	return (void *)(((addr - XKVRANGE_VC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKVRANGE_VC_START);
		79	else if (addr >= XKPRANGE_UC_SHADOW_OFFSET)
		80	return (void *)(((addr - XKPRANGE_UC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_UC_START);
		81	else if (addr >= XKPRANGE_CC_SHADOW_OFFSET)
		82	return (void *)(((addr - XKPRANGE_CC_SHADOW_OFFSET) << KASAN_SHADOW_SCALE_SHIFT) + XKPRANGE_CC_START);
		83	else {
		84	WARN_ON(1);
		85	return NULL;
		86	}
		87	}
		88
38	/*	89	/*
39	* Alloc memory for shadow memory page table.	90	* Alloc memory for shadow memory page table.
40	*/	91	*/

arch/loongarch/mm/tlb.c+1−1

@@ -261,7 +261,7 @@ unsigned long pcpu_handlers[NR_CPUS]; · 260 unmodified lines
261	#endif	261	#endif
262	extern long exception_handlers[VECSIZE * 128 / sizeof(long)];	262	extern long exception_handlers[VECSIZE * 128 / sizeof(long)];
263		263
264	void setup_tlb_handler(int cpu)	264	static void setup_tlb_handler(int cpu)
265	{	265	{
266	setup_ptwalker();	266	setup_ptwalker();
267	local_flush_tlb_all();	267	local_flush_tlb_all();

arch/mips/alchemy/devboards/db1000.c+4−0

 /******************************************************************************/
+#ifdef CONFIG_MMC_AU1X
 static irqreturn_t db1100_mmc_cd(int irq, void *ptr)
 {
 	mmc_detect_change(ptr, msecs_to_jiffies(500));
 	.num_resources	= ARRAY_SIZE(au1100_mmc1_res),
 	.resource	= au1100_mmc1_res,
 };
+#endif /* CONFIG_MMC_AU1X */
 /******************************************************************************/
 static struct platform_device *db1100_devs[] = {
 	&au1100_lcd_device,
+#ifdef CONFIG_MMC_AU1X
 	&db1100_mmc0_dev,
 	&db1100_mmc1_dev,
+#endif
 };
 int __init db1000_dev_setup(void)

arch/mips/alchemy/devboards/db1200.c+6−0

 /**********************************************************************/
+#ifdef CONFIG_MMC_AU1X
 /* SD carddetects:  they're supposed to be edge-triggered, but ack
  * doesn't seem to work (CPLD Rev 2).  Instead, the screaming one
  * is disabled and its counterpart enabled.  The 200ms timeout is
 	.num_resources	= ARRAY_SIZE(au1200_mmc1_res),
 	.resource	= au1200_mmc1_res,
 };
+#endif /* CONFIG_MMC_AU1X */
 /**********************************************************************/
 static struct platform_device *db1200_devs[] __initdata = {
 	NULL,		/* PSC0, selected by S6.8 */
 	&db1200_ide_dev,
+#ifdef CONFIG_MMC_AU1X
 	&db1200_mmc0_dev,
+#endif
 	&au1200_lcd_dev,
 	&db1200_eth_dev,
 	&db1200_nand_dev,
 };
 static struct platform_device *pb1200_devs[] __initdata = {
+#ifdef CONFIG_MMC_AU1X
 	&pb1200_mmc1_dev,
+#endif
 };
 /* Some peripheral base addresses differ on the PB1200 */

arch/mips/alchemy/devboards/db1300.c+4−0

 /**********************************************************************/
+#ifdef CONFIG_MMC_AU1X
 static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
 {
 	disable_irq_nosync(irq);
 	.resource	= au1300_sd0_res,
 	.num_resources	= ARRAY_SIZE(au1300_sd0_res),
 };
+#endif /* CONFIG_MMC_AU1X */
 /**********************************************************************/
 	&db1300_5waysw_dev,
 	&db1300_nand_dev,
 	&db1300_ide_dev,
+#ifdef CONFIG_MMC_AU1X
 	&db1300_sd0_dev,
 	&db1300_sd1_dev,
+#endif
 	&db1300_lcd_dev,
 	&db1300_ac97_dev,
 	&db1300_i2s_dev,

arch/parisc/include/asm/cache.h+1−0

@@ -37,6 +37,7 @@ extern int split_tlb; · 36 unmodified lines
37	extern int dcache_stride;	37	extern int dcache_stride;
38	extern int icache_stride;	38	extern int icache_stride;
39	extern struct pdc_cache_info cache_info;	39	extern struct pdc_cache_info cache_info;
		40	extern struct pdc_btlb_info btlb_info;
40	void parisc_setup_cache_timing(void);	41	void parisc_setup_cache_timing(void);
41		42
42	#define pdtlb(sr, addr) asm volatile("pdtlb 0(%%sr%0,%1)" \	43	#define pdtlb(sr, addr) asm volatile("pdtlb 0(%%sr%0,%1)" \

arch/parisc/include/asm/hugetlb.h+1−1

@@ -6,7 +6,7 @@ · 5 unmodified lines
6		6
7	#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT	7	#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
8	void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,	8	void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
9	pte_t *ptep, pte_t pte);	9	pte_t *ptep, pte_t pte, unsigned long sz);
10		10
11	#define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR	11	#define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR
12	pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,	12	pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,

arch/parisc/include/asm/mckinley.h+0−8

@@ -1,8 +0,0 @@
1	/* SPDX-License-Identifier: GPL-2.0 */
2	#ifndef ASM_PARISC_MCKINLEY_H
3	#define ASM_PARISC_MCKINLEY_H
4
5	/* declared in arch/parisc/kernel/setup.c */
6	extern struct proc_dir_entry * proc_mckinley_root;
7
8	#endif /ASM_PARISC_MCKINLEY_H/

arch/parisc/include/asm/pdc.h+3−2

 int pdc_model_platform_info(char *orig_prod_num, char *current_prod_num, char *serial_no);
 int pdc_cache_info(struct pdc_cache_info *cache);
 int pdc_spaceid_bits(unsigned long *space_bits);
-#ifndef CONFIG_PA20
 int pdc_btlb_info(struct pdc_btlb_info *btlb);
+int pdc_btlb_insert(unsigned long long vpage, unsigned long physpage, unsigned long len,
+                    unsigned long entry_info, unsigned long slot);
+int pdc_btlb_purge_all(void);
 int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
-#endif /* !CONFIG_PA20 */
 int pdc_pim_toc11(struct pdc_toc_pim_11 *ret);
 int pdc_pim_toc20(struct pdc_toc_pim_20 *ret);
 int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);

arch/parisc/include/asm/processor.h+1−0

@@ -310,6 +310,7 @@ extern void do_syscall_trace_exit(struct pt_regs *); · 309 unmodified lines
310	struct seq_file;	310	struct seq_file;
311	extern void early_trap_init(void);	311	extern void early_trap_init(void);
312	extern void collect_boot_cpu_data(void);	312	extern void collect_boot_cpu_data(void);
		313	extern void btlb_init_per_cpu(void);
313	extern int show_cpuinfo (struct seq_file m, void v);	314	extern int show_cpuinfo (struct seq_file m, void v);
314		315
315	/* driver code in driver/parisc */	316	/* driver code in driver/parisc */

arch/parisc/include/asm/ropes.h+5−2

 struct ioc {
 	void __iomem	*ioc_hpa;	/* I/O MMU base address */
 	char		*res_map;	/* resource map, bit == pdir entry */
-	u64		*pdir_base;	/* physical base address */
+	__le64		*pdir_base;	/* physical base address */
 	unsigned long	ibase;		/* pdir IOV Space base - shared w/lba_pci */
 	unsigned long	imask;		/* pdir IOV Space mask - shared w/lba_pci */
 #ifdef ZX1_SUPPORT
 	struct ioc		ioc[MAX_IOC];
 };
+/* list of SBA's in system, see drivers/parisc/sba_iommu.c */
+extern struct sba_device *sba_list;
 #define ASTRO_RUNWAY_PORT	0x582
 #define IKE_MERCED_PORT		0x803
 #define REO_MERCED_PORT		0x804
 #define SBA_PDIR_VALID_BIT	0x8000000000000000ULL
-#define SBA_AGPGART_COOKIE	0x0000badbadc0ffeeULL
+#define SBA_AGPGART_COOKIE	(__force __le64) 0x0000badbadc0ffeeULL
 #define SBA_FUNC_ID	0x0000	/* function id */
 #define SBA_FCLASS	0x0008	/* function class, bist, header, rev... */

arch/parisc/include/asm/shmparam.h+15−0

@@ -2,6 +2,21 @@ · 1 unmodified line
2	#ifndef _ASMPARISC_SHMPARAM_H	2	#ifndef _ASMPARISC_SHMPARAM_H
3	#define _ASMPARISC_SHMPARAM_H	3	#define _ASMPARISC_SHMPARAM_H
4		4
		5	/*
		6	* PA-RISC uses virtually indexed & physically tagged (VIPT) caches
		7	* which has strict requirements when two pages to the same physical
		8	* address are accessed through different mappings. Read the section
		9	* "Address Aliasing" in the arch docs for more detail:
		10	* PA-RISC 1.1 (page 3-6):
		11	* https://parisc.wiki.kernel.org/images-parisc/6/68/Pa11_acd.pdf
		12	* PA-RISC 2.0 (page F-5):
		13	* https://parisc.wiki.kernel.org/images-parisc/7/73/Parisc2.0.pdf
		14	*
		15	* For Linux we allow kernel and userspace to map pages on page size
		16	* granularity (SHMLBA) but have to ensure that, if two pages are
		17	* mapped to the same physical address, the virtual and physical
		18	* addresses modulo SHM_COLOUR are identical.
		19	*/
5	#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */	20	#define SHMLBA PAGE_SIZE /* attach addr a multiple of this */
6	#define SHM_COLOUR 0x00400000 /* shared mappings colouring */	21	#define SHM_COLOUR 0x00400000 /* shared mappings colouring */
7		22

arch/parisc/kernel/asm-offsets.c+2−0

 	 * and kernel data on physical huge pages */
 #ifdef CONFIG_HUGETLB_PAGE
 	DEFINE(HUGEPAGE_SIZE, 1UL << REAL_HPAGE_SHIFT);
+#elif !defined(CONFIG_64BIT)
+	DEFINE(HUGEPAGE_SIZE, 4*1024*1024);
 #else
 	DEFINE(HUGEPAGE_SIZE, PAGE_SIZE);
 #endif

arch/parisc/kernel/cache.c+1−7

 struct pdc_cache_info cache_info __ro_after_init;
 #ifndef CONFIG_PA20
-static struct pdc_btlb_info btlb_info __ro_after_init;
+struct pdc_btlb_info btlb_info __ro_after_init;
 #endif
 DEFINE_STATIC_KEY_TRUE(parisc_has_cache);
 	icache_stride = CAFL_STRIDE(cache_info.ic_conf);
 #undef CAFL_STRIDE
-#ifndef CONFIG_PA20
-	if (pdc_btlb_info(&btlb_info) < 0) {
-		memset(&btlb_info, 0, sizeof btlb_info);
-	}
-#endif
 	if ((boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) ==
 						PDC_MODEL_NVA_UNSUPPORTED) {
 		printk(KERN_WARNING "parisc_cache_init: Only equivalent aliasing supported!\n");

arch/parisc/kernel/drivers.c+1−1

 	pr_info("#define PARISC_MODEL \"%s\"\n\n",
 			boot_cpu_data.pdc.sys_model_name);
+	#define p ((unsigned long *)&boot_cpu_data.pdc.model)
 	pr_info("#define PARISC_PDC_MODEL 0x%lx, 0x%lx, 0x%lx, "
 		"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
-	#define p ((unsigned long *)&boot_cpu_data.pdc.model)
 		p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
 	#undef p

arch/parisc/kernel/firmware.c+45−11

 	return retval;
 }
-#ifndef CONFIG_PA20
 /**
  * pdc_btlb_info - Return block TLB information.
  * @btlb: The return buffer.
  */
 int pdc_btlb_info(struct pdc_btlb_info *btlb)
 {
-        int retval;
+	int retval;
 	unsigned long flags;
-        spin_lock_irqsave(&pdc_lock, flags);
+	if (IS_ENABLED(CONFIG_PA20))
-        retval = mem_pdc_call(PDC_BLOCK_TLB, PDC_BTLB_INFO, __pa(pdc_result), 0);
+		return PDC_BAD_PROC;
-        memcpy(btlb, pdc_result, sizeof(*btlb));
-        spin_unlock_irqrestore(&pdc_lock, flags);
-        if(retval < 0) {
+	spin_lock_irqsave(&pdc_lock, flags);
-                btlb->max_size = 0;
+	retval = mem_pdc_call(PDC_BLOCK_TLB, PDC_BTLB_INFO, __pa(pdc_result), 0);
-        }
+	memcpy(btlb, pdc_result, sizeof(*btlb));
-        return retval;
+	spin_unlock_irqrestore(&pdc_lock, flags);
+	if(retval < 0) {
+		btlb->max_size = 0;
+	}
+	return retval;
+}
+int pdc_btlb_insert(unsigned long long vpage, unsigned long physpage, unsigned long len,
+		    unsigned long entry_info, unsigned long slot)
+{
+	int retval;
+	unsigned long flags;
+	if (IS_ENABLED(CONFIG_PA20))
+		return PDC_BAD_PROC;
+	spin_lock_irqsave(&pdc_lock, flags);
+	retval = mem_pdc_call(PDC_BLOCK_TLB, PDC_BTLB_INSERT, (unsigned long) (vpage >> 32),
+			      (unsigned long) vpage, physpage, len, entry_info, slot);
+	spin_unlock_irqrestore(&pdc_lock, flags);
+	return retval;
+}
+int pdc_btlb_purge_all(void)
+{
+	int retval;
+	unsigned long flags;
+	if (IS_ENABLED(CONFIG_PA20))
+		return PDC_BAD_PROC;
+	spin_lock_irqsave(&pdc_lock, flags);
+	retval = mem_pdc_call(PDC_BLOCK_TLB, PDC_BTLB_PURGE_ALL);
+	spin_unlock_irqrestore(&pdc_lock, flags);
+	return retval;
 }
 /**
         int retval;
 	unsigned long flags;
+	if (IS_ENABLED(CONFIG_PA20))
+		return PDC_BAD_PROC;
         spin_lock_irqsave(&pdc_lock, flags);
         memcpy(pdc_result2, mod_path, sizeof(*mod_path));
         retval = mem_pdc_call(PDC_MEM_MAP, PDC_MEM_MAP_HPA, __pa(pdc_result),
         return retval;
 }
-#endif	/* !CONFIG_PA20 */
 /**
  * pdc_lan_station_id - Get the LAN address.

arch/parisc/kernel/head.S+13−3

 	std		%dp,0x18(%r10)
 #endif
-#ifdef CONFIG_64BIT
-	/* Get PDCE_PROC for monarch CPU. */
 #define MEM_PDC_LO 0x388
 #define MEM_PDC_HI 0x35C
+#ifdef CONFIG_64BIT
+	/* Get PDCE_PROC for monarch CPU. */
 	ldw             MEM_PDC_LO(%r0),%r3
 	ldw             MEM_PDC_HI(%r0),%r10
 	depd            %r10, 31, 32, %r3        /* move to upper word */
 	tovirt_r1	%r6
 	mtctl		%r6,%cr30		/* restore task thread info */
 #endif
+#ifndef CONFIG_64BIT
+	/* clear all BTLBs */
+	ldi		PDC_BLOCK_TLB,%arg0
+	load32          PA(stext_pdc_btlb_ret), %rp
+	ldw             MEM_PDC_LO(%r0),%r3
+	bv              (%r3)
+	ldi		PDC_BTLB_PURGE_ALL,%arg1
+stext_pdc_btlb_ret:
+#endif
 	/* PARANOID: clear user scratch/user space SR's */
 	mtsp	%r0,%sr0
 	mtsp	%r0,%sr1

arch/parisc/kernel/irq.c+1−1

@@ -365,7 +365,7 @@ union irq_stack_union { · 364 unmodified lines
365	volatile unsigned int lock[1];	365	volatile unsigned int lock[1];
366	};	366	};
367		367
368	DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {	368	static DEFINE_PER_CPU(union irq_stack_union, irq_stack_union) = {
369	.slock = { 1,1,1,1 },	369	.slock = { 1,1,1,1 },
370	};	370	};
371	#endif	371	#endif

arch/parisc/kernel/processor.c+2−0

@@ -368,6 +368,8 @@ int init_per_cpu(int cpunum) · 367 unmodified lines
368	/* FUTURE: Enable Performance Monitor : ccr bit 0x20 */	368	/* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
369	init_percpu_prof(cpunum);	369	init_percpu_prof(cpunum);
370		370
		371	btlb_init_per_cpu();
		372
371	return ret;	373	return ret;
372	}	374	}
373		375

arch/parisc/kernel/vmlinux.lds.S+1−0

@@ -154,6 +154,7 @@ SECTIONS · 153 unmodified lines
154	}	154	}
155		155
156	/* End of data section */	156	/* End of data section */
		157	. = ALIGN(PAGE_SIZE);
157	_edata = .;	158	_edata = .;
158		159
159	/* BSS */	160	/* BSS */

arch/parisc/mm/hugetlbpage.c+1−1

@@ -140,7 +140,7 @@ static void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr, · 139 unmodified lines
140	}	140	}
141		141
142	void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,	142	void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
143	pte_t *ptep, pte_t entry)	143	pte_t *ptep, pte_t entry, unsigned long sz)
144	{	144	{
145	__set_huge_pte_at(mm, addr, ptep, entry);	145	__set_huge_pte_at(mm, addr, ptep, entry);
146	}	146	}

arch/parisc/mm/init.c+72−0

@@ -32,6 +32,7 @@ · 31 unmodified lines
32	#include <asm/sections.h>	32	#include <asm/sections.h>
33	#include <asm/msgbuf.h>	33	#include <asm/msgbuf.h>
34	#include <asm/sparsemem.h>	34	#include <asm/sparsemem.h>
		35	#include <asm/asm-offsets.h>
35		36
36	extern int data_start;	37	extern int data_start;
37	extern void parisc_kernel_start(void); /* Kernel entry point in head.S */	38	extern void parisc_kernel_start(void); /* Kernel entry point in head.S */
@@ -720,6 +721,77 @@ void __init paging_init(void) · 682 unmodified lines
720	parisc_bootmem_free();	721	parisc_bootmem_free();
721	}	722	}
722		723
		724	static void alloc_btlb(unsigned long start, unsigned long end, int *slot,
		725	unsigned long entry_info)
		726	{
		727	const int slot_max = btlb_info.fixed_range_info.num_comb;
		728	int min_num_pages = btlb_info.min_size;
		729	unsigned long size;
		730
		731	/* map at minimum 4 pages */
		732	if (min_num_pages < 4)
		733	min_num_pages = 4;
		734
		735	size = HUGEPAGE_SIZE;
		736	while (start < end && *slot < slot_max && size >= PAGE_SIZE) {
		737	/* starting address must have same alignment as size! */
		738	/* if correctly aligned and fits in double size, increase */
		739	if (((start & (2 * size - 1)) == 0) &&
		740	(end - start) >= (2 * size)) {
		741	size <<= 1;
		742	continue;
		743	}
		744	/* if current size alignment is too big, try smaller size */
		745	if ((start & (size - 1)) != 0) {
		746	size >>= 1;
		747	continue;
		748	}
		749	if ((end - start) >= size) {
		750	if ((size >> PAGE_SHIFT) >= min_num_pages)
		751	pdc_btlb_insert(start >> PAGE_SHIFT, __pa(start) >> PAGE_SHIFT,
		752	size >> PAGE_SHIFT, entry_info, *slot);
		753	(*slot)++;
		754	start += size;
		755	continue;
		756	}
		757	size /= 2;
		758	continue;
		759	}
		760	}
		761
		762	void btlb_init_per_cpu(void)
		763	{
		764	unsigned long s, t, e;
		765	int slot;
		766
		767	/* BTLBs are not available on 64-bit CPUs */
		768	if (IS_ENABLED(CONFIG_PA20))
		769	return;
		770	else if (pdc_btlb_info(&btlb_info) < 0) {
		771	memset(&btlb_info, 0, sizeof btlb_info);
		772	}
		773
		774	/* insert BLTLBs for code and data segments */
		775	s = (uintptr_t) dereference_function_descriptor(&_stext);
		776	e = (uintptr_t) dereference_function_descriptor(&_etext);
		777	t = (uintptr_t) dereference_function_descriptor(&_sdata);
		778	BUG_ON(t != e);
		779
		780	/* code segments */
		781	slot = 0;
		782	alloc_btlb(s, e, &slot, 0x13800000);
		783
		784	/* sanity check */
		785	t = (uintptr_t) dereference_function_descriptor(&_edata);
		786	e = (uintptr_t) dereference_function_descriptor(&__bss_start);
		787	BUG_ON(t != e);
		788
		789	/* data segments */
		790	s = (uintptr_t) dereference_function_descriptor(&_sdata);
		791	e = (uintptr_t) dereference_function_descriptor(&__bss_stop);
		792	alloc_btlb(s, e, &slot, 0x11800000);
		793	}
		794
723	#ifdef CONFIG_PA20	795	#ifdef CONFIG_PA20
724		796
725	/*	797	/*

arch/powerpc/Kconfig+1−1

@@ -255,7 +255,7 @@ config PPC · 254 unmodified lines
255	select HAVE_KPROBES	255	select HAVE_KPROBES
256	select HAVE_KPROBES_ON_FTRACE	256	select HAVE_KPROBES_ON_FTRACE
257	select HAVE_KRETPROBES	257	select HAVE_KRETPROBES
258	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if HAVE_OBJTOOL_MCOUNT	258	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION if HAVE_OBJTOOL_MCOUNT && (!ARCH_USING_PATCHABLE_FUNCTION_ENTRY \|\| (!CC_IS_GCC \|\| GCC_VERSION >= 110100))
259	select HAVE_LIVEPATCH if HAVE_DYNAMIC_FTRACE_WITH_REGS	259	select HAVE_LIVEPATCH if HAVE_DYNAMIC_FTRACE_WITH_REGS
260	select HAVE_MOD_ARCH_SPECIFIC	260	select HAVE_MOD_ARCH_SPECIFIC
261	select HAVE_NMI if PERF_EVENTS \|\| (PPC64 && PPC_BOOK3S)	261	select HAVE_NMI if PERF_EVENTS \|\| (PPC64 && PPC_BOOK3S)

arch/powerpc/include/asm/nohash/32/hugetlb-8xx.h+2−1

@@ -46,7 +46,8 @@ static inline int check_and_get_huge_psize(int shift) · 45 unmodified lines
46	}	46	}
47		47
48	#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT	48	#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
49	void set_huge_pte_at(struct mm_struct mm, unsigned long addr, pte_t ptep, pte_t pte);	49	void set_huge_pte_at(struct mm_struct mm, unsigned long addr, pte_t ptep,
		50	pte_t pte, unsigned long sz);
50		51
51	#define __HAVE_ARCH_HUGE_PTE_CLEAR	52	#define __HAVE_ARCH_HUGE_PTE_CLEAR
52	static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr,	53	static inline void huge_pte_clear(struct mm_struct *mm, unsigned long addr,

arch/powerpc/kernel/hw_breakpoint.c+15−1

 	struct arch_hw_breakpoint *info;
 	int i;
+	preempt_disable();
 	for (i = 0; i < nr_wp_slots(); i++) {
 		struct perf_event *bp = __this_cpu_read(bp_per_reg[i]);
 		if (unlikely(bp && counter_arch_bp(bp)->perf_single_step))
 			goto reset;
 	}
-	return;
+	goto out;
 reset:
 	regs_set_return_msr(regs, regs->msr & ~MSR_SE);
 		__set_breakpoint(i, info);
 		info->perf_single_step = false;
 	}
+out:
+	preempt_enable();
 }
 static bool is_larx_stcx_instr(int type)
 	}
 }
+/*
+ * Handle a DABR or DAWR exception.
+ *
+ * Called in atomic context.
+ */
 int hw_breakpoint_handler(struct die_args *args)
 {
 	bool err = false;
 /*
  * Handle single-step exceptions following a DABR hit.
+ *
+ * Called in atomic context.
  */
 static int single_step_dabr_instruction(struct die_args *args)
 {
 /*
  * Handle debug exception notifications.
+ *
+ * Called in atomic context.
  */
 int hw_breakpoint_exceptions_notify(
 		struct notifier_block *unused, unsigned long val, void *data)

arch/powerpc/kernel/hw_breakpoint_constraints.c+6−1

 			 int *type, int *size, unsigned long *ea)
 {
 	struct instruction_op op;
+	int err;
-	if (__get_user_instr(*instr, (void __user *)regs->nip))
+	pagefault_disable();
+	err = __get_user_instr(*instr, (void __user *)regs->nip);
+	pagefault_enable();
+	if (err)
 		return;
 	analyse_instr(&op, regs, *instr);

arch/powerpc/kernel/stacktrace.c+5−22

@@ -73,29 +73,12 @@ int __no_sanitize_address arch_stack_walk_reliable(stack_trace_consume_fn consum · 72 unmodified lines
73	bool firstframe;	73	bool firstframe;
74		74
75	stack_end = stack_page + THREAD_SIZE;	75	stack_end = stack_page + THREAD_SIZE;
76	if (!is_idle_task(task)) {	76
77	/*	77	// See copy_thread() for details.
78	* For user tasks, this is the SP value loaded on	78	if (task->flags & PF_KTHREAD)
79	* kernel entry, see "PACAKSAVE(r13)" in _switch() and
80	* system_call_common().
81	*
82	* Likewise for non-swapper kernel threads,
83	* this also happens to be the top of the stack
84	* as setup by copy_thread().
85	*
86	* Note that stack backlinks are not properly setup by
87	* copy_thread() and thus, a forked task() will have
88	* an unreliable stack trace until it's been
89	* _switch()'ed to for the first time.
90	*/
91	stack_end -= STACK_USER_INT_FRAME_SIZE;
92	} else {
93	/*
94	* idle tasks have a custom stack layout,
95	* c.f. cpu_idle_thread_init().
96	*/
97	stack_end -= STACK_FRAME_MIN_SIZE;	79	stack_end -= STACK_FRAME_MIN_SIZE;
98	}	80	else
		81	stack_end -= STACK_USER_INT_FRAME_SIZE;
99		82
100	if (task == current)	83	if (task == current)
101	sp = current_stack_frame();	84	sp = current_stack_frame();

arch/powerpc/kernel/traps.c+36−20

@@ -1512,23 +1512,11 @@ static void do_program_check(struct pt_regs *regs) · 1511 unmodified lines
1512	return;	1512	return;
1513	}	1513	}
1514		1514
1515	if (cpu_has_feature(CPU_FTR_DEXCR_NPHIE) && user_mode(regs)) {	1515	/* User mode considers other cases after enabling IRQs */
1516	ppc_inst_t insn;	1516	if (!user_mode(regs)) {
1517		1517	_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
1518	if (get_user_instr(insn, (void __user *)regs->nip)) {	1518	return;
1519	_exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1520	return;
1521	}
1522
1523	if (ppc_inst_primary_opcode(insn) == 31 &&
1524	get_xop(ppc_inst_val(insn)) == OP_31_XOP_HASHCHK) {
1525	_exception(SIGILL, regs, ILL_ILLOPN, regs->nip);
1526	return;
1527	}
1528	}	1519	}
1529
1530	_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
1531	return;
1532	}	1520	}
1533	#ifdef CONFIG_PPC_TRANSACTIONAL_MEM	1521	#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1534	if (reason & REASON_TM) {	1522	if (reason & REASON_TM) {
@@ -1561,16 +1549,44 @@ static void do_program_check(struct pt_regs *regs) · 26 unmodified lines
1561		1549
1562	/*	1550	/*
1563	* If we took the program check in the kernel skip down to sending a	1551	* If we took the program check in the kernel skip down to sending a
1564	* SIGILL. The subsequent cases all relate to emulating instructions	1552	* SIGILL. The subsequent cases all relate to user space, such as
1565	* which we should only do for userspace. We also do not want to enable	1553	* emulating instructions which we should only do for user space. We
1566	* interrupts for kernel faults because that might lead to further	1554	* also do not want to enable interrupts for kernel faults because that
1567	* faults, and loose the context of the original exception.	1555	* might lead to further faults, and loose the context of the original
		1556	* exception.
1568	*/	1557	*/
1569	if (!user_mode(regs))	1558	if (!user_mode(regs))
1570	goto sigill;	1559	goto sigill;
1571		1560
1572	interrupt_cond_local_irq_enable(regs);	1561	interrupt_cond_local_irq_enable(regs);
1573		1562
		1563	/*
		1564	* (reason & REASON_TRAP) is mostly handled before enabling IRQs,
		1565	* except get_user_instr() can sleep so we cannot reliably inspect the
		1566	* current instruction in that context. Now that we know we are
		1567	* handling a user space trap and can sleep, we can check if the trap
		1568	* was a hashchk failure.
		1569	*/
		1570	if (reason & REASON_TRAP) {
		1571	if (cpu_has_feature(CPU_FTR_DEXCR_NPHIE)) {
		1572	ppc_inst_t insn;
		1573
		1574	if (get_user_instr(insn, (void __user *)regs->nip)) {
		1575	_exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
		1576	return;
		1577	}
		1578
		1579	if (ppc_inst_primary_opcode(insn) == 31 &&
		1580	get_xop(ppc_inst_val(insn)) == OP_31_XOP_HASHCHK) {
		1581	_exception(SIGILL, regs, ILL_ILLOPN, regs->nip);
		1582	return;
		1583	}
		1584	}
		1585
		1586	_exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
		1587	return;
		1588	}
		1589
1574	/* (reason & REASON_ILLEGAL) would be the obvious thing here,	1590	/* (reason & REASON_ILLEGAL) would be the obvious thing here,
1575	* but there seems to be a hardware bug on the 405GP (RevD)	1591	* but there seems to be a hardware bug on the 405GP (RevD)
1576	* that means ESR is sometimes set incorrectly - either to	1592	* that means ESR is sometimes set incorrectly - either to

arch/powerpc/mm/book3s64/hugetlbpage.c+4−1

@@ -143,11 +143,14 @@ pte_t huge_ptep_modify_prot_start(struct vm_area_struct *vma, · 142 unmodified lines
143	void huge_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,	143	void huge_ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr,
144	pte_t *ptep, pte_t old_pte, pte_t pte)	144	pte_t *ptep, pte_t old_pte, pte_t pte)
145	{	145	{
		146	unsigned long psize;
146		147
147	if (radix_enabled())	148	if (radix_enabled())
148	return radix__huge_ptep_modify_prot_commit(vma, addr, ptep,	149	return radix__huge_ptep_modify_prot_commit(vma, addr, ptep,
149	old_pte, pte);	150	old_pte, pte);
150	set_huge_pte_at(vma->vm_mm, addr, ptep, pte);	151
		152	psize = huge_page_size(hstate_vma(vma));
		153	set_huge_pte_at(vma->vm_mm, addr, ptep, pte, psize);
151	}	154	}
152		155
153	void __init hugetlbpage_init_defaultsize(void)	156	void __init hugetlbpage_init_defaultsize(void)

arch/powerpc/mm/book3s64/radix_hugetlbpage.c+2−1

 					 pte_t old_pte, pte_t pte)
 {
 	struct mm_struct *mm = vma->vm_mm;
+	unsigned long psize = huge_page_size(hstate_vma(vma));
 	/*
 	 * POWER9 NMMU must flush the TLB after clearing the PTE before
 	    atomic_read(&mm->context.copros) > 0)
 		radix__flush_hugetlb_page(vma, addr);
-	set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
+	set_huge_pte_at(vma->vm_mm, addr, ptep, pte, psize);
 }

arch/powerpc/mm/nohash/8xx.c+2−1

@@ -91,7 +91,8 @@ static int __ref __early_map_kernel_hugepage(unsigned long va, phys_addr_t pa, · 90 unmodified lines
91	if (new && WARN_ON(pte_present(*ptep) && pgprot_val(prot)))	91	if (new && WARN_ON(pte_present(*ptep) && pgprot_val(prot)))
92	return -EINVAL;	92	return -EINVAL;
93		93
94	set_huge_pte_at(&init_mm, va, ptep, pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)));	94	set_huge_pte_at(&init_mm, va, ptep,
		95	pte_mkhuge(pfn_pte(pa >> PAGE_SHIFT, prot)), psize);
95		96
96	return 0;	97	return 0;
97	}	98	}

arch/powerpc/mm/pgtable.c+2−1

@@ -288,7 +288,8 @@ int huge_ptep_set_access_flags(struct vm_area_struct *vma, · 287 unmodified lines
288	}	288	}
289		289
290	#if defined(CONFIG_PPC_8xx)	290	#if defined(CONFIG_PPC_8xx)
291	void set_huge_pte_at(struct mm_struct mm, unsigned long addr, pte_t ptep, pte_t pte)	291	void set_huge_pte_at(struct mm_struct mm, unsigned long addr, pte_t ptep,
		292	pte_t pte, unsigned long sz)
292	{	293	{
293	pmd_t *pmd = pmd_off(mm, addr);	294	pmd_t *pmd = pmd_off(mm, addr);
294	pte_basic_t val;	295	pte_basic_t val;

arch/powerpc/perf/hv-24x7.c+1−1

@@ -1418,7 +1418,7 @@ static int h_24x7_event_init(struct perf_event *event) · 1417 unmodified lines
1418	}	1418	}
1419		1419
1420	domain = event_get_domain(event);	1420	domain = event_get_domain(event);
1421	if (domain >= HV_PERF_DOMAIN_MAX) {	1421	if (domain == 0 \|\| domain >= HV_PERF_DOMAIN_MAX) {
1422	pr_devel("invalid domain %d\n", domain);	1422	pr_devel("invalid domain %d\n", domain);
1423	return -EINVAL;	1423	return -EINVAL;
1424	}	1424	}

arch/powerpc/platforms/82xx/Kconfig+1−2

 menuconfig PPC_82xx
 	bool "82xx-based boards (PQ II)"
 	depends on PPC_BOOK3S_32
+	select FSL_SOC
 if PPC_82xx
 	bool "Embedded Planet EP8248E (a.k.a. CWH-PPC-8248N-VE)"
 	select CPM2
 	select PPC_INDIRECT_PCI if PCI
-	select FSL_SOC
 	select PHYLIB if NETDEVICES
 	select MDIO_BITBANG if PHYLIB
 	help
 	bool "Keymile MGCOGE"
 	select CPM2
 	select PPC_INDIRECT_PCI if PCI
-	select FSL_SOC
 	help
 	  This enables support for the Keymile MGCOGE board.

arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi+26−25

 				reg = <0x100000 0x400000>;
 			};
 			reserved-data@600000 {
-				reg = <0x600000 0x1000000>;
+				reg = <0x600000 0xa00000>;
 			};
 		};
 	};
 		};
 	};
-	uart0_pins: uart0-0 {
-		tx-pins {
-			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
-					     GPOEN_ENABLE,
-					     GPI_NONE)>;
-			bias-disable;
-			drive-strength = <12>;
-			input-disable;
-			input-schmitt-disable;
-			slew-rate = <0>;
-		};
-		rx-pins {
-			pinmux = <GPIOMUX(6, GPOUT_LOW,
-					     GPOEN_DISABLE,
-					     GPI_SYS_UART0_RX)>;
-			bias-disable; /* external pull-up */
-			drive-strength = <2>;
-			input-enable;
-			input-schmitt-enable;
-			slew-rate = <0>;
-		};
-	};
 	tdm_pins: tdm-0 {
 		tx-pins {
 			pinmux = <GPIOMUX(44, GPOUT_SYS_TDM_TXD,
 			input-enable;
 		};
 	};
+	uart0_pins: uart0-0 {
+		tx-pins {
+			pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
+					     GPOEN_ENABLE,
+					     GPI_NONE)>;
+			bias-disable;
+			drive-strength = <12>;
+			input-disable;
+			input-schmitt-disable;
+			slew-rate = <0>;
+		};
+		rx-pins {
+			pinmux = <GPIOMUX(6, GPOUT_LOW,
+					     GPOEN_DISABLE,
+					     GPI_SYS_UART0_RX)>;
+			bias-disable; /* external pull-up */
+			drive-strength = <2>;
+			input-enable;
+			input-schmitt-enable;
+			slew-rate = <0>;
+		};
+	};
 };
 &tdm {
 &usb0 {
 	dr_mode = "peripheral";
+	status = "okay";
 };
 &U74_1 {

arch/riscv/include/asm/errata_list.h+2−2

@@ -105,7 +105,7 @@ asm volatile(ALTERNATIVE( \ · 104 unmodified lines
105	* \| 31 - 25 \| 24 - 20 \| 19 - 15 \| 14 - 12 \| 11 - 7 \| 6 - 0 \|	105	* \| 31 - 25 \| 24 - 20 \| 19 - 15 \| 14 - 12 \| 11 - 7 \| 6 - 0 \|
106	* 0000001 01001 rs1 000 00000 0001011	106	* 0000001 01001 rs1 000 00000 0001011
107	* dcache.cva rs1 (clean, virtual address)	107	* dcache.cva rs1 (clean, virtual address)
108	* 0000001 00100 rs1 000 00000 0001011	108	* 0000001 00101 rs1 000 00000 0001011
109	*	109	*
110	* dcache.cipa rs1 (clean then invalidate, physical address)	110	* dcache.cipa rs1 (clean then invalidate, physical address)
111	* \| 31 - 25 \| 24 - 20 \| 19 - 15 \| 14 - 12 \| 11 - 7 \| 6 - 0 \|	111	* \| 31 - 25 \| 24 - 20 \| 19 - 15 \| 14 - 12 \| 11 - 7 \| 6 - 0 \|
@@ -118,7 +118,7 @@ asm volatile(ALTERNATIVE( \ · 6 unmodified lines
118	* 0000000 11001 00000 000 00000 0001011	118	* 0000000 11001 00000 000 00000 0001011
119	*/	119	*/
120	#define THEAD_inval_A0 ".long 0x0265000b"	120	#define THEAD_inval_A0 ".long 0x0265000b"
121	#define THEAD_clean_A0 ".long 0x0245000b"	121	#define THEAD_clean_A0 ".long 0x0255000b"
122	#define THEAD_flush_A0 ".long 0x0275000b"	122	#define THEAD_flush_A0 ".long 0x0275000b"
123	#define THEAD_SYNC_S ".long 0x0190000b"	123	#define THEAD_SYNC_S ".long 0x0190000b"
124		124

arch/riscv/include/asm/hugetlb.h+2−1

@@ -18,7 +18,8 @@ void huge_pte_clear(struct mm_struct *mm, unsigned long addr, · 17 unmodified lines
18		18
19	#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT	19	#define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
20	void set_huge_pte_at(struct mm_struct *mm,	20	void set_huge_pte_at(struct mm_struct *mm,
21	unsigned long addr, pte_t *ptep, pte_t pte);	21	unsigned long addr, pte_t *ptep, pte_t pte,
		22	unsigned long sz);
22		23
23	#define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR	24	#define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR
24	pte_t huge_ptep_get_and_clear(struct mm_struct *mm,	25	pte_t huge_ptep_get_and_clear(struct mm_struct *mm,

arch/riscv/kernel/elf_kexec.c+7−1

@@ -98,7 +98,13 @@ static int elf_find_pbase(struct kimage *image, unsigned long kernel_len, · 97 unmodified lines
98	kbuf.image = image;	98	kbuf.image = image;
99	kbuf.buf_min = lowest_paddr;	99	kbuf.buf_min = lowest_paddr;
100	kbuf.buf_max = ULONG_MAX;	100	kbuf.buf_max = ULONG_MAX;
101	kbuf.buf_align = PAGE_SIZE;	101
		102	/*
		103	* Current riscv boot protocol requires 2MB alignment for
		104	* RV64 and 4MB alignment for RV32
		105	*
		106	*/
		107	kbuf.buf_align = PMD_SIZE;
102	kbuf.mem = KEXEC_BUF_MEM_UNKNOWN;	108	kbuf.mem = KEXEC_BUF_MEM_UNKNOWN;
103	kbuf.memsz = ALIGN(kernel_len, PAGE_SIZE);	109	kbuf.memsz = ALIGN(kernel_len, PAGE_SIZE);
104	kbuf.top_down = false;	110	kbuf.top_down = false;

arch/riscv/kvm/vcpu_onereg.c+5−2

 	    reg_num >= ARRAY_SIZE(kvm_isa_ext_arr))
 		return -ENOENT;
-	*reg_val = 0;
 	host_isa_ext = kvm_isa_ext_arr[reg_num];
+	if (!__riscv_isa_extension_available(NULL, host_isa_ext))
+		return -ENOENT;
+	*reg_val = 0;
 	if (__riscv_isa_extension_available(vcpu->arch.isa, host_isa_ext))
 		*reg_val = 1; /* Mark the given extension as available */
 		u64 reg = KVM_REG_RISCV | size | KVM_REG_RISCV_ISA_EXT | i;
 		isa_ext = kvm_isa_ext_arr[i];
-		if (!__riscv_isa_extension_available(vcpu->arch.isa, isa_ext))
+		if (!__riscv_isa_extension_available(NULL, isa_ext))
 			continue;
 		if (uindices) {

arch/riscv/mm/hugetlbpage.c+2−1

@@ -180,7 +180,8 @@ pte_t arch_make_huge_pte(pte_t entry, unsigned int shift, vm_flags_t flags) · 179 unmodified lines
180	void set_huge_pte_at(struct mm_struct *mm,	180	void set_huge_pte_at(struct mm_struct *mm,
181	unsigned long addr,	181	unsigned long addr,
182	pte_t *ptep,	182	pte_t *ptep,
183	pte_t pte)	183	pte_t pte,
		184	unsigned long sz)
184	{	185	{
185	int i, pte_num;	186	int i, pte_num;
186		187

arch/s390/configs/debug_defconfig+10−4

 CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
 CONFIG_PROFILING=y
+CONFIG_KEXEC_FILE=y
+CONFIG_KEXEC_SIG=y
+CONFIG_CRASH_DUMP=y
 CONFIG_LIVEPATCH=y
 CONFIG_MARCH_ZEC12=y
 CONFIG_TUNE_ZEC12=y
 CONFIG_NR_CPUS=512
 CONFIG_NUMA=y
 CONFIG_HZ_100=y
-CONFIG_KEXEC_FILE=y
+CONFIG_CERT_STORE=y
-CONFIG_KEXEC_SIG=y
 CONFIG_EXPOLINE=y
 CONFIG_EXPOLINE_AUTO=y
 CONFIG_CHSC_SCH=y
 CONFIG_VFIO_CCW=m
 CONFIG_VFIO_AP=m
-CONFIG_CRASH_DUMP=y
 CONFIG_PROTECTED_VIRTUALIZATION_GUEST=y
 CONFIG_CMM=m
 CONFIG_APPLDATA_BASE=y
+CONFIG_S390_HYPFS_FS=y
 CONFIG_KVM=m
 CONFIG_S390_UNWIND_SELFTEST=m
 CONFIG_S390_KPROBES_SANITY_TEST=m
 CONFIG_SCSI_DH_ALUA=m
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
+# CONFIG_MD_BITMAP_FILE is not set
 CONFIG_MD_LINEAR=m
 CONFIG_MD_MULTIPATH=m
 CONFIG_MD_FAULTY=m
 CONFIG_DIAG288_WATCHDOG=m
 # CONFIG_DRM_DEBUG_MODESET_LOCK is not set
 CONFIG_FB=y
+# CONFIG_FB_DEVICE is not set
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_TMPFS_INODE64=y
+CONFIG_TMPFS_QUOTA=y
 CONFIG_HUGETLBFS=y
 CONFIG_ECRYPT_FS=m
 CONFIG_CRAMFS=m
 CONFIG_IMA_APPRAISE=y
 CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor"
 CONFIG_INIT_STACK_NONE=y
+CONFIG_BUG_ON_DATA_CORRUPTION=y
 CONFIG_CRYPTO_USER=m
 # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
 CONFIG_CRYPTO_PCRYPT=m
 CONFIG_DEBUG_ATOMIC_SLEEP=y
 CONFIG_DEBUG_LOCKING_API_SELFTESTS=y
 CONFIG_DEBUG_IRQFLAGS=y
+CONFIG_DEBUG_LIST=y
 CONFIG_DEBUG_SG=y
 CONFIG_DEBUG_NOTIFIERS=y
-CONFIG_BUG_ON_DATA_CORRUPTION=y
 CONFIG_DEBUG_CREDENTIALS=y
 CONFIG_RCU_TORTURE_TEST=m
 CONFIG_RCU_REF_SCALE_TEST=m

arch/s390/configs/defconfig+9−4

 CONFIG_EXPERT=y
 # CONFIG_SYSFS_SYSCALL is not set
 CONFIG_PROFILING=y
+CONFIG_KEXEC_FILE=y
+CONFIG_KEXEC_SIG=y
+CONFIG_CRASH_DUMP=y
 CONFIG_LIVEPATCH=y
 CONFIG_MARCH_ZEC12=y
 CONFIG_TUNE_ZEC12=y
 CONFIG_NR_CPUS=512
 CONFIG_NUMA=y
 CONFIG_HZ_100=y
-CONFIG_KEXEC_FILE=y
+CONFIG_CERT_STORE=y
-CONFIG_KEXEC_SIG=y
 CONFIG_EXPOLINE=y
 CONFIG_EXPOLINE_AUTO=y
 CONFIG_CHSC_SCH=y
 CONFIG_VFIO_CCW=m
 CONFIG_VFIO_AP=m
-CONFIG_CRASH_DUMP=y
 CONFIG_PROTECTED_VIRTUALIZATION_GUEST=y
 CONFIG_CMM=m
 CONFIG_APPLDATA_BASE=y
+CONFIG_S390_HYPFS_FS=y
 CONFIG_KVM=m
 CONFIG_S390_UNWIND_SELFTEST=m
 CONFIG_S390_KPROBES_SANITY_TEST=m
 CONFIG_SCSI_DH_ALUA=m
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
+# CONFIG_MD_BITMAP_FILE is not set
 CONFIG_MD_LINEAR=m
 CONFIG_MD_MULTIPATH=m
 CONFIG_MD_FAULTY=m
 CONFIG_SOFT_WATCHDOG=m
 CONFIG_DIAG288_WATCHDOG=m
 CONFIG_FB=y
+# CONFIG_FB_DEVICE is not set
 CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
 # CONFIG_HID_SUPPORT is not set
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_TMPFS_INODE64=y
+CONFIG_TMPFS_QUOTA=y
 CONFIG_HUGETLBFS=y
 CONFIG_CONFIGFS_FS=m
 CONFIG_ECRYPT_FS=m
 CONFIG_IMA_APPRAISE=y
 CONFIG_LSM="yama,loadpin,safesetid,integrity,selinux,smack,tomoyo,apparmor"
 CONFIG_INIT_STACK_NONE=y
+CONFIG_BUG_ON_DATA_CORRUPTION=y
 CONFIG_CRYPTO_FIPS=y
 CONFIG_CRYPTO_USER=m
 # CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
 CONFIG_DEBUG_MEMORY_INIT=y
 CONFIG_PANIC_ON_OOPS=y
 CONFIG_TEST_LOCKUP=m
-CONFIG_BUG_ON_DATA_CORRUPTION=y
 CONFIG_RCU_TORTURE_TEST=m
 CONFIG_RCU_REF_SCALE_TEST=m
 CONFIG_RCU_CPU_STALL_TIMEOUT=60

arch/s390/configs/zfcpdump_defconfig+2−2

 # CONFIG_NET_NS is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_CRASH_DUMP=y
 CONFIG_MARCH_ZEC12=y
 CONFIG_TUNE_ZEC12=y
 # CONFIG_COMPAT is not set
 CONFIG_HZ_100=y
 # CONFIG_CHSC_SCH is not set
 # CONFIG_SCM_BUS is not set
-CONFIG_CRASH_DUMP=y
 # CONFIG_PFAULT is not set
-# CONFIG_S390_HYPFS_FS is not set
+# CONFIG_S390_HYPFS is not set
 # CONFIG_VIRTUALIZATION is not set
 # CONFIG_S390_GUEST is not set
 # CONFIG_SECCOMP is not set

arch/s390/include/asm/hugetlb.h+4−2

 #define hugepages_supported()			(MACHINE_HAS_EDAT1)
 void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+		     pte_t *ptep, pte_t pte, unsigned long sz);
+void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
 		     pte_t *ptep, pte_t pte);
 pte_t huge_ptep_get(pte_t *ptep);
 pte_t huge_ptep_get_and_clear(struct mm_struct *mm,
 	int changed = !pte_same(huge_ptep_get(ptep), pte);
 	if (changed) {
 		huge_ptep_get_and_clear(vma->vm_mm, addr, ptep);
-		set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
+		__set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
 	}
 	return changed;
 }
 					   unsigned long addr, pte_t *ptep)
 {
 	pte_t pte = huge_ptep_get_and_clear(mm, addr, ptep);
-	set_huge_pte_at(mm, addr, ptep, pte_wrprotect(pte));
+	__set_huge_pte_at(mm, addr, ptep, pte_wrprotect(pte));
 }
 static inline pte_t mk_huge_pte(struct page *page, pgprot_t pgprot)

arch/s390/kernel/cert_store.c+4−3

 	char *desc;
 	cs_token = vcssb->cs_token;
-	/* Description string contains "%64s:%04u:%08u\0". */
+	/* Description string contains "%64s:%05u:%010u\0". */
 	name_len = sizeof(vce->vce_hdr.vc_name);
-	len = name_len + 1 + 4 + 1 + 8 + 1;
+	len = name_len + 1 + 5 + 1 + 10 + 1;
 	desc = kmalloc(len, GFP_KERNEL);
 	if (!desc)
 		return NULL;
 	memcpy(desc, vce->vce_hdr.vc_name, name_len);
-	sprintf(desc + name_len, ":%04u:%08u", vce->vce_hdr.vc_index, cs_token);
+	snprintf(desc + name_len, len - name_len, ":%05u:%010u",
+		 vce->vce_hdr.vc_index, cs_token);
 	return desc;
 }

arch/s390/mm/hugetlbpage.c+7−1

 		__storage_key_init_range(paddr, paddr + size - 1);
 }
-void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
 		     pte_t *ptep, pte_t pte)
 {
 	unsigned long rste;
 	set_pte(ptep, __pte(rste));
 }
+void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+		     pte_t *ptep, pte_t pte, unsigned long sz)
+{
+	__set_huge_pte_at(mm, addr, ptep, pte);
+}
 pte_t huge_ptep_get(pte_t *ptep)
 {
 	return __rste_to_pte(pte_val(*ptep));

arch/sh/mm/ioremap.c+2−2

@@ -72,8 +72,8 @@ __ioremap_29bit(phys_addr_t offset, unsigned long size, pgprot_t prot) · 71 unmodified lines
72	#define __ioremap_29bit(offset, size, prot) NULL	72	#define __ioremap_29bit(offset, size, prot) NULL
73	#endif /* CONFIG_29BIT */	73	#endif /* CONFIG_29BIT */
74		74
75	void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size,	75	void __iomem __ref *ioremap_prot(phys_addr_t phys_addr, size_t size,
76	unsigned long prot)	76	unsigned long prot)
77	{	77	{
78	void __iomem *mapped;	78	void __iomem *mapped;
79	pgprot_t pgprot = __pgprot(prot);	79	pgprot_t pgprot = __pgprot(prot);

arch/sparc/include/asm/hugetlb.h+4−2

 #define __HAVE_ARCH_HUGE_SET_HUGE_PTE_AT
 void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+		     pte_t *ptep, pte_t pte, unsigned long sz);
+void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
 		     pte_t *ptep, pte_t pte);
 #define __HAVE_ARCH_HUGE_PTEP_GET_AND_CLEAR
 					   unsigned long addr, pte_t *ptep)
 {
 	pte_t old_pte = *ptep;
-	set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
+	__set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
 }
 #define __HAVE_ARCH_HUGE_PTEP_SET_ACCESS_FLAGS
 {
 	int changed = !pte_same(*ptep, pte);
 	if (changed) {
-		set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
+		__set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
 		flush_tlb_page(vma, addr);
 	}
 	return changed;

arch/sparc/mm/hugetlbpage.c+7−1

 	return pte_offset_huge(pmd, addr);
 }
-void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+void __set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
 		     pte_t *ptep, pte_t entry)
 {
 	unsigned int nptes, orig_shift, shift;
 				    orig_shift);
 }
+void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
+		     pte_t *ptep, pte_t entry, unsigned long sz)
+{
+	__set_huge_pte_at(mm, addr, ptep, entry);
+}
 pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
 			      pte_t *ptep)
 {

arch/x86/Kconfig+1−1

 	select UCS2_STRING
 	select EFI_RUNTIME_WRAPPERS
 	select ARCH_USE_MEMREMAP_PROT
+	select EFI_RUNTIME_MAP if KEXEC_CORE
 	help
 	  This enables the kernel to use EFI runtime services that are
 	  available (such as the EFI variable services).
 config EFI_RUNTIME_MAP
 	bool "Export EFI runtime maps to sysfs" if EXPERT
 	depends on EFI
-	default KEXEC_CORE
 	help
 	  Export EFI runtime memory regions to /sys/firmware/efi/runtime-map.
 	  That memory map is required by the 2nd kernel to set up EFI virtual

arch/x86/boot/compressed/ident_map_64.c+8−0

@@ -59,6 +59,14 @@ static void alloc_pgt_page(void context) · 58 unmodified lines
59	return NULL;	59	return NULL;
60	}	60	}
61		61
		62	/* Consumed more tables than expected? */
		63	if (pages->pgt_buf_offset == BOOT_PGT_SIZE_WARN) {
		64	debug_putstr("pgt_buf running low in " __FILE__ "\n");
		65	debug_putstr("Need to raise BOOT_PGT_SIZE?\n");
		66	debug_putaddr(pages->pgt_buf_offset);
		67	debug_putaddr(pages->pgt_buf_size);
		68	}
		69
62	entry = pages->pgt_buf + pages->pgt_buf_offset;	70	entry = pages->pgt_buf + pages->pgt_buf_offset;
63	pages->pgt_buf_offset += PAGE_SIZE;	71	pages->pgt_buf_offset += PAGE_SIZE;
64		72

arch/x86/entry/common.c+1−1

@@ -294,7 +294,7 @@ static void __xen_pv_evtchn_do_upcall(struct pt_regs *regs) · 293 unmodified lines
294		294
295	inc_irq_stat(irq_hv_callback_count);	295	inc_irq_stat(irq_hv_callback_count);
296		296
297	xen_hvm_evtchn_do_upcall();	297	xen_evtchn_do_upcall();
298		298
299	set_irq_regs(old_regs);	299	set_irq_regs(old_regs);
300	}	300	}

arch/x86/events/amd/core.c+17−7

 	/* Clear enable bits i.e. PerfCntrGlobalCtl.PerfCntrEn */
 	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, 0);
-	/* Clear overflow bits i.e. PerfCntrGLobalStatus.PerfCntrOvfl */
+	/*
-	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR, amd_pmu_global_cntr_mask);
+	 * Clear freeze and overflow bits i.e. PerfCntrGLobalStatus.LbrFreeze
+	 * and PerfCntrGLobalStatus.PerfCntrOvfl
+	 */
+	wrmsrl(MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR,
+	       GLOBAL_STATUS_LBRS_FROZEN | amd_pmu_global_cntr_mask);
 }
 static int amd_pmu_cpu_prepare(int cpu)
 	int i, nb_id;
 	cpuc->perf_ctr_virt_mask = AMD64_EVENTSEL_HOSTONLY;
+	amd_pmu_cpu_reset(cpu);
 	if (!x86_pmu.amd_nb_constraints)
 		return;
 	cpuc->amd_nb->nb_id = nb_id;
 	cpuc->amd_nb->refcnt++;
-	amd_pmu_cpu_reset(cpu);
 }
 static void amd_pmu_cpu_dead(int cpu)
 	kfree(cpuhw->lbr_sel);
 	cpuhw->lbr_sel = NULL;
+	amd_pmu_cpu_reset(cpu);
 	if (!x86_pmu.amd_nb_constraints)
 		return;
 		cpuhw->amd_nb = NULL;
 	}
-	amd_pmu_cpu_reset(cpu);
 }
 static inline void amd_pmu_set_global_ctl(u64 ctl)
 	struct hw_perf_event *hwc;
 	struct perf_event *event;
 	int handled = 0, idx;
-	u64 status, mask;
+	u64 reserved, status, mask;
 	bool pmu_enabled;
 	/*
 		status &= ~GLOBAL_STATUS_LBRS_FROZEN;
 	}
+	reserved = status & ~amd_pmu_global_cntr_mask;
+	if (reserved)
+		pr_warn_once("Reserved PerfCntrGlobalStatus bits are set (0x%llx), please consider updating microcode\n",
+			     reserved);
+	/* Clear any reserved bits set by buggy microcode */
+	status &= amd_pmu_global_cntr_mask;
 	for (idx = 0; idx < x86_pmu.num_counters; idx++) {
 		if (!test_bit(idx, cpuc->active_mask))
 			continue;

arch/x86/include/asm/boot.h+31−14

@@ -40,23 +40,40 @@ · 39 unmodified lines
40	#ifdef CONFIG_X86_64	40	#ifdef CONFIG_X86_64
41	# define BOOT_STACK_SIZE 0x4000	41	# define BOOT_STACK_SIZE 0x4000
42		42
		43	/*
		44	* Used by decompressor's startup_32() to allocate page tables for identity
		45	* mapping of the 4G of RAM in 4-level paging mode:
		46	* - 1 level4 table;
		47	* - 1 level3 table;
		48	* - 4 level2 table that maps everything with 2M pages;
		49	*
		50	* The additional level5 table needed for 5-level paging is allocated from
		51	* trampoline_32bit memory.
		52	*/
43	# define BOOT_INIT_PGT_SIZE (6*4096)	53	# define BOOT_INIT_PGT_SIZE (6*4096)
44	# ifdef CONFIG_RANDOMIZE_BASE	54
45	/*	55	/*
46	* Assuming all cross the 512GB boundary:	56	* Total number of page tables kernel_add_identity_map() can allocate,
47	* 1 page for level4	57	* including page tables consumed by startup_32().
48	* (2+2)*4 pages for kernel, param, cmd_line, and randomized kernel	58	*
49	* 2 pages for first 2M (video RAM: CONFIG_X86_VERBOSE_BOOTUP).	59	* Worst-case scenario:
50	* Total is 19 pages.	60	* - 5-level paging needs 1 level5 table;
		61	* - KASLR needs to map kernel, boot_params, cmdline and randomized kernel,
		62	* assuming all of them cross 256T boundary:
		63	* + 4*2 level4 table;
		64	* + 4*2 level3 table;
		65	* + 4*2 level2 table;
		66	* - X86_VERBOSE_BOOTUP needs to map the first 2M (video RAM):
		67	* + 1 level4 table;
		68	* + 1 level3 table;
		69	* + 1 level2 table;
		70	* Total: 28 tables
		71	*
		72	* Add 4 spare table in case decompressor touches anything beyond what is
		73	* accounted above. Warn if it happens.
51	*/	74	*/
52	# ifdef CONFIG_X86_VERBOSE_BOOTUP	75	# define BOOT_PGT_SIZE_WARN (28*4096)
53	# define BOOT_PGT_SIZE (19*4096)	76	# define BOOT_PGT_SIZE (32*4096)
54	# else /* !CONFIG_X86_VERBOSE_BOOTUP */
55	# define BOOT_PGT_SIZE (17*4096)
56	# endif
57	# else /* !CONFIG_RANDOMIZE_BASE */
58	# define BOOT_PGT_SIZE BOOT_INIT_PGT_SIZE
59	# endif
60		77
61	#else /* !CONFIG_X86_64 */	78	#else /* !CONFIG_X86_64 */
62	# define BOOT_STACK_SIZE 0x1000	79	# define BOOT_STACK_SIZE 0x1000

arch/x86/include/asm/efi.h+2−30

@@ -91,19 +91,6 @@ static inline void efi_fpu_end(void) · 90 unmodified lines
91		91
92	#ifdef CONFIG_X86_32	92	#ifdef CONFIG_X86_32
93	#define EFI_X86_KERNEL_ALLOC_LIMIT (SZ_512M - 1)	93	#define EFI_X86_KERNEL_ALLOC_LIMIT (SZ_512M - 1)
94
95	#define arch_efi_call_virt_setup() \
96	({ \
97	efi_fpu_begin(); \
98	firmware_restrict_branch_speculation_start(); \
99	})
100
101	#define arch_efi_call_virt_teardown() \
102	({ \
103	firmware_restrict_branch_speculation_end(); \
104	efi_fpu_end(); \
105	})
106
107	#else /* !CONFIG_X86_32 */	94	#else /* !CONFIG_X86_32 */
108	#define EFI_X86_KERNEL_ALLOC_LIMIT EFI_ALLOC_LIMIT	95	#define EFI_X86_KERNEL_ALLOC_LIMIT EFI_ALLOC_LIMIT
109		96
@@ -116,14 +103,6 @@ extern bool efi_disable_ibt_for_runtime; · 6 unmodified lines
116	__efi_call(__VA_ARGS__); \	103	__efi_call(__VA_ARGS__); \
117	})	104	})
118		105
119	#define arch_efi_call_virt_setup() \
120	({ \
121	efi_sync_low_kernel_mappings(); \
122	efi_fpu_begin(); \
123	firmware_restrict_branch_speculation_start(); \
124	efi_enter_mm(); \
125	})
126
127	#undef arch_efi_call_virt	106	#undef arch_efi_call_virt
128	#define arch_efi_call_virt(p, f, args...) ({ \	107	#define arch_efi_call_virt(p, f, args...) ({ \
129	u64 ret, ibt = ibt_save(efi_disable_ibt_for_runtime); \	108	u64 ret, ibt = ibt_save(efi_disable_ibt_for_runtime); \
@@ -132,13 +111,6 @@ extern bool efi_disable_ibt_for_runtime; · 2 unmodified lines
132	ret; \	111	ret; \
133	})	112	})
134		113
135	#define arch_efi_call_virt_teardown() \
136	({ \
137	efi_leave_mm(); \
138	firmware_restrict_branch_speculation_end(); \
139	efi_fpu_end(); \
140	})
141
142	#ifdef CONFIG_KASAN	114	#ifdef CONFIG_KASAN
143	/*	115	/*
144	* CONFIG_KASAN may redefine memset to __memset. __memset function is present	116	* CONFIG_KASAN may redefine memset to __memset. __memset function is present
@@ -168,8 +140,8 @@ extern void efi_delete_dummy_variable(void); · 23 unmodified lines
168	extern void efi_crash_gracefully_on_page_fault(unsigned long phys_addr);	140	extern void efi_crash_gracefully_on_page_fault(unsigned long phys_addr);
169	extern void efi_free_boot_services(void);	141	extern void efi_free_boot_services(void);
170		142
171	void efi_enter_mm(void);	143	void arch_efi_call_virt_setup(void);
172	void efi_leave_mm(void);	144	void arch_efi_call_virt_teardown(void);
173		145
174	/* kexec external ABI */	146	/* kexec external ABI */
175	struct efi_setup_data {	147	struct efi_setup_data {

arch/x86/include/asm/kvm_host.h+1−2

 	 * the thread holds the MMU lock in write mode.
 	 */
 	spinlock_t tdp_mmu_pages_lock;
-	struct workqueue_struct *tdp_mmu_zap_wq;
 #endif /* CONFIG_X86_64 */
 	/*
 void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
 int kvm_mmu_create(struct kvm_vcpu *vcpu);
-int kvm_mmu_init_vm(struct kvm *kvm);
+void kvm_mmu_init_vm(struct kvm *kvm);
 void kvm_mmu_uninit_vm(struct kvm *kvm);
 void kvm_mmu_after_set_cpuid(struct kvm_vcpu *vcpu);

arch/x86/include/asm/linkage.h+15−0

@@ -8,6 +8,14 @@ · 7 unmodified lines
8	#undef notrace	8	#undef notrace
9	#define notrace __attribute__((no_instrument_function))	9	#define notrace __attribute__((no_instrument_function))
10		10
		11	#ifdef CONFIG_64BIT
		12	/*
		13	* The generic version tends to create spurious ENDBR instructions under
		14	* certain conditions.
		15	*/
		16	#define _THIS_IP_ ({ unsigned long __here; asm ("lea 0(%%rip), %0" : "=r" (__here)); __here; })
		17	#endif
		18
11	#ifdef CONFIG_X86_32	19	#ifdef CONFIG_X86_32
12	#define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0)))	20	#define asmlinkage CPP_ASMLINKAGE __attribute__((regparm(0)))
13	#endif /* CONFIG_X86_32 */	21	#endif /* CONFIG_X86_32 */
@@ -97,6 +105,13 @@ · 83 unmodified lines
97	CFI_POST_PADDING \	105	CFI_POST_PADDING \
98	SYM_FUNC_END(__cfi_##name)	106	SYM_FUNC_END(__cfi_##name)
99		107
		108	/* UML needs to be able to override memcpy() and friends for KASAN. */
		109	#ifdef CONFIG_UML
		110	# define SYM_FUNC_ALIAS_MEMFUNC SYM_FUNC_ALIAS_WEAK
		111	#else
		112	# define SYM_FUNC_ALIAS_MEMFUNC SYM_FUNC_ALIAS
		113	#endif
		114
100	/* SYM_TYPED_FUNC_START -- use for indirectly called globals, w/ CFI type */	115	/* SYM_TYPED_FUNC_START -- use for indirectly called globals, w/ CFI type */
101	#define SYM_TYPED_FUNC_START(name) \	116	#define SYM_TYPED_FUNC_START(name) \
102	SYM_TYPED_START(name, SYM_L_GLOBAL, SYM_F_ALIGN) \	117	SYM_TYPED_START(name, SYM_L_GLOBAL, SYM_F_ALIGN) \

arch/x86/include/asm/mmu_context.h+1−2

 #else
 #define deactivate_mm(tsk, mm)			\
 do {						\
-	if (!tsk->vfork_done)			\
+	shstk_free(tsk);			\
-		shstk_free(tsk);		\
 	load_gs_index(0);			\
 	loadsegment(fs, 0);			\
 } while (0)

arch/x86/include/asm/paravirt_types.h+0−15

@@ -9,13 +9,6 @@ struct paravirt_patch_site { · 8 unmodified lines
9	u8 type; /* type of this instruction */	9	u8 type; /* type of this instruction */
10	u8 len; /* length of original instruction */	10	u8 len; /* length of original instruction */
11	};	11	};
12
13	/* Lazy mode for batching updates / context switch */
14	enum paravirt_lazy_mode {
15	PARAVIRT_LAZY_NONE,
16	PARAVIRT_LAZY_MMU,
17	PARAVIRT_LAZY_CPU,
18	};
19	#endif	12	#endif
20		13
21	#ifdef CONFIG_PARAVIRT	14	#ifdef CONFIG_PARAVIRT
@@ -549,14 +542,6 @@ int paravirt_disable_iospace(void); · 527 unmodified lines
549	__PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \	542	__PVOP_VCALL(op, PVOP_CALL_ARG1(arg1), PVOP_CALL_ARG2(arg2), \
550	PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))	543	PVOP_CALL_ARG3(arg3), PVOP_CALL_ARG4(arg4))
551		544
552	enum paravirt_lazy_mode paravirt_get_lazy_mode(void);
553	void paravirt_start_context_switch(struct task_struct *prev);
554	void paravirt_end_context_switch(struct task_struct *next);
555
556	void paravirt_enter_lazy_mmu(void);
557	void paravirt_leave_lazy_mmu(void);
558	void paravirt_flush_lazy_mmu(void);
559
560	void _paravirt_nop(void);	545	void _paravirt_nop(void);
561	void paravirt_BUG(void);	546	void paravirt_BUG(void);
562	unsigned long paravirt_ret0(void);	547	unsigned long paravirt_ret0(void);

arch/x86/include/asm/pgtable.h+8−0

@@ -955,6 +955,14 @@ static inline int pte_same(pte_t a, pte_t b) · 954 unmodified lines
955	return a.pte == b.pte;	955	return a.pte == b.pte;
956	}	956	}
957		957
		958	static inline pte_t pte_next_pfn(pte_t pte)
		959	{
		960	if (__pte_needs_invert(pte_val(pte)))
		961	return __pte(pte_val(pte) - (1UL << PFN_PTE_SHIFT));
		962	return __pte(pte_val(pte) + (1UL << PFN_PTE_SHIFT));
		963	}
		964	#define pte_next_pfn pte_next_pfn
		965
958	static inline int pte_present(pte_t a)	966	static inline int pte_present(pte_t a)
959	{	967	{
960	return pte_flags(a) & (_PAGE_PRESENT \| _PAGE_PROTNONE);	968	return pte_flags(a) & (_PAGE_PRESENT \| _PAGE_PROTNONE);

arch/x86/include/asm/processor.h+0−2

 #ifdef CONFIG_CPU_SUP_AMD
 extern u32 amd_get_nodes_per_socket(void);
 extern u32 amd_get_highest_perf(void);
-extern bool cpu_has_ibpb_brtype_microcode(void);
 extern void amd_clear_divider(void);
 extern void amd_check_microcode(void);
 #else
 static inline u32 amd_get_nodes_per_socket(void)	{ return 0; }
 static inline u32 amd_get_highest_perf(void)		{ return 0; }
-static inline bool cpu_has_ibpb_brtype_microcode(void)	{ return false; }
 static inline void amd_clear_divider(void)		{ }
 static inline void amd_check_microcode(void)		{ }
 #endif

arch/x86/include/asm/xen/hypervisor.h+37−0

@@ -36,6 +36,7 @@ · 35 unmodified lines
36	extern struct shared_info *HYPERVISOR_shared_info;	36	extern struct shared_info *HYPERVISOR_shared_info;
37	extern struct start_info *xen_start_info;	37	extern struct start_info *xen_start_info;
38		38
		39	#include <asm/bug.h>
39	#include <asm/processor.h>	40	#include <asm/processor.h>
40		41
41	#define XEN_SIGNATURE "XenVMMXenVMM"	42	#define XEN_SIGNATURE "XenVMMXenVMM"
@@ -63,4 +64,40 @@ void __init xen_pvh_init(struct boot_params *boot_params); · 21 unmodified lines
63	void __init mem_map_via_hcall(struct boot_params *boot_params_p);	64	void __init mem_map_via_hcall(struct boot_params *boot_params_p);
64	#endif	65	#endif
65		66
		67	/* Lazy mode for batching updates / context switch */
		68	enum xen_lazy_mode {
		69	XEN_LAZY_NONE,
		70	XEN_LAZY_MMU,
		71	XEN_LAZY_CPU,
		72	};
		73
		74	DECLARE_PER_CPU(enum xen_lazy_mode, xen_lazy_mode);
		75	DECLARE_PER_CPU(unsigned int, xen_lazy_nesting);
		76
		77	static inline void enter_lazy(enum xen_lazy_mode mode)
		78	{
		79	enum xen_lazy_mode old_mode = this_cpu_read(xen_lazy_mode);
		80
		81	if (mode == old_mode) {
		82	this_cpu_inc(xen_lazy_nesting);
		83	return;
		84	}
		85
		86	BUG_ON(old_mode != XEN_LAZY_NONE);
		87
		88	this_cpu_write(xen_lazy_mode, mode);
		89	}
		90
		91	static inline void leave_lazy(enum xen_lazy_mode mode)
		92	{
		93	BUG_ON(this_cpu_read(xen_lazy_mode) != mode);
		94
		95	if (this_cpu_read(xen_lazy_nesting) == 0)
		96	this_cpu_write(xen_lazy_mode, XEN_LAZY_NONE);
		97	else
		98	this_cpu_dec(xen_lazy_nesting);
		99	}
		100
		101	enum xen_lazy_mode xen_get_lazy_mode(void);
		102
66	#endif /* _ASM_X86_XEN_HYPERVISOR_H */	103	#endif /* _ASM_X86_XEN_HYPERVISOR_H */

arch/x86/kernel/alternative.c+2−7

 {
 	s32 *s;
-	/*
+	if (cpu_feature_enabled(X86_FEATURE_RETHUNK))
-	 * Do not patch out the default return thunks if those needed are the
+		static_call_force_reinit();
-	 * ones generated by the compiler.
-	 */
-	if (cpu_feature_enabled(X86_FEATURE_RETHUNK) &&
-	    (x86_return_thunk == __x86_return_thunk))
-		return;
 	for (s = start; s < end; s++) {
 		void *dest = NULL, *addr = (void *)s + *s;

arch/x86/kernel/apic/x2apic_uv_x.c+5−6

 {
 	struct uv_gam_range_entry *gre = uv_gre_table;
 	int nums, numn, nump;
-	int cpu, i, lnid;
+	int i, lnid, apicid;
 	int minsock = _min_socket;
 	int maxsock = _max_socket;
 	int minpnode = _min_pnode;
 	/* Set socket -> node values: */
 	lnid = NUMA_NO_NODE;
-	for_each_possible_cpu(cpu) {
+	for (apicid = 0; apicid < ARRAY_SIZE(__apicid_to_node); apicid++) {
-		int nid = cpu_to_node(cpu);
+		int nid = __apicid_to_node[apicid];
-		int apicid, sockid;
+		int sockid;
-		if (lnid == nid)
+		if ((nid == NUMA_NO_NODE) || (lnid == nid))
 			continue;
 		lnid = nid;
-		apicid = per_cpu(x86_cpu_to_apicid, cpu);
 		sockid = apicid >> uv_cpuid.socketid_shift;
 		if (_socket_to_node[sockid - minsock] == SOCK_EMPTY)

arch/x86/kernel/callthunks.c+0−1

@@ -272,7 +272,6 @@ void __init callthunks_patch_builtin_calls(void) · 271 unmodified lines
272	pr_info("Setting up call depth tracking\n");	272	pr_info("Setting up call depth tracking\n");
273	mutex_lock(&text_mutex);	273	mutex_lock(&text_mutex);
274	callthunks_setup(&cs, &builtin_coretext);	274	callthunks_setup(&cs, &builtin_coretext);
275	static_call_force_reinit();
276	thunks_initialized = true;	275	thunks_initialized = true;
277	mutex_unlock(&text_mutex);	276	mutex_unlock(&text_mutex);
278	}	277	}

arch/x86/kernel/cpu/amd.c+9−19

 	if (cpu_has(c, X86_FEATURE_TOPOEXT))
 		smp_num_siblings = ((cpuid_ebx(0x8000001e) >> 8) & 0xff) + 1;
+	if (!cpu_has(c, X86_FEATURE_HYPERVISOR) && !cpu_has(c, X86_FEATURE_IBPB_BRTYPE)) {
+		if (c->x86 == 0x17 && boot_cpu_has(X86_FEATURE_AMD_IBPB))
+			setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE);
+		else if (c->x86 >= 0x19 && !wrmsrl_safe(MSR_IA32_PRED_CMD, PRED_CMD_SBPB)) {
+			setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE);
+			setup_force_cpu_cap(X86_FEATURE_SBPB);
+		}
+	}
 }
 static void init_amd_k8(struct cpuinfo_x86 *c)
 	on_each_cpu(zenbleed_check_cpu, NULL, 1);
 }
-bool cpu_has_ibpb_brtype_microcode(void)
-{
-	switch (boot_cpu_data.x86) {
-	/* Zen1/2 IBPB flushes branch type predictions too. */
-	case 0x17:
-		return boot_cpu_has(X86_FEATURE_AMD_IBPB);
-	case 0x19:
-		/* Poke the MSR bit on Zen3/4 to check its presence. */
-		if (!wrmsrl_safe(MSR_IA32_PRED_CMD, PRED_CMD_SBPB)) {
-			setup_force_cpu_cap(X86_FEATURE_SBPB);
-			return true;
-		} else {
-			return false;
-		}
-	default:
-		return false;
-	}
-}
 /*
  * Issue a DIV 0/1 insn to clear any division data from previous DIV
  * operations.

arch/x86/kernel/cpu/bugs.c+3−14

 static void __init srso_select_mitigation(void)
 {
-	bool has_microcode;
+	bool has_microcode = boot_cpu_has(X86_FEATURE_IBPB_BRTYPE);
 	if (!boot_cpu_has_bug(X86_BUG_SRSO) || cpu_mitigations_off())
 		goto pred_cmd;
-	/*
-	 * The first check is for the kernel running as a guest in order
-	 * for guests to verify whether IBPB is a viable mitigation.
-	 */
-	has_microcode = boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) || cpu_has_ibpb_brtype_microcode();
 	if (!has_microcode) {
 		pr_warn("IBPB-extending microcode not applied!\n");
 		pr_warn(SRSO_NOTICE);
 	} else {
-		/*
-		 * Enable the synthetic (even if in a real CPUID leaf)
-		 * flags for guests.
-		 */
-		setup_force_cpu_cap(X86_FEATURE_IBPB_BRTYPE);
 		/*
 		 * Zen1/2 with SMT off aren't vulnerable after the right
 		 * IBPB microcode has been applied.
 	switch (srso_cmd) {
 	case SRSO_CMD_OFF:
-		return;
+		goto pred_cmd;
 	case SRSO_CMD_MICROCODE:
 		if (has_microcode) {
 	return sysfs_emit(buf, "%s%s\n",
 			  srso_strings[srso_mitigation],
-			  (cpu_has_ibpb_brtype_microcode() ? "" : ", no microcode"));
+			  boot_cpu_has(X86_FEATURE_IBPB_BRTYPE) ? "" : ", no microcode");
 }
 static ssize_t gds_show_state(char *buf)

arch/x86/kernel/cpu/common.c+1−1

@@ -1303,7 +1303,7 @@ static const struct x86_cpu_id cpu_vuln_blacklist[] __initconst = { · 1302 unmodified lines
1303	VULNBL_AMD(0x15, RETBLEED),	1303	VULNBL_AMD(0x15, RETBLEED),
1304	VULNBL_AMD(0x16, RETBLEED),	1304	VULNBL_AMD(0x16, RETBLEED),
1305	VULNBL_AMD(0x17, RETBLEED \| SMT_RSB \| SRSO),	1305	VULNBL_AMD(0x17, RETBLEED \| SMT_RSB \| SRSO),
1306	VULNBL_HYGON(0x18, RETBLEED \| SMT_RSB),	1306	VULNBL_HYGON(0x18, RETBLEED \| SMT_RSB \| SRSO),
1307	VULNBL_AMD(0x19, SRSO),	1307	VULNBL_AMD(0x19, SRSO),
1308	{}	1308	{}
1309	};	1309	};

arch/x86/kernel/cpu/sgx/encl.c+25−5

 	return epc_page;
 }
+/*
+ * Ensure the SECS page is not swapped out.  Must be called with encl->lock
+ * to protect the enclave states including SECS and ensure the SECS page is
+ * not swapped out again while being used.
+ */
+static struct sgx_epc_page *sgx_encl_load_secs(struct sgx_encl *encl)
+{
+	struct sgx_epc_page *epc_page = encl->secs.epc_page;
+	if (!epc_page)
+		epc_page = sgx_encl_eldu(&encl->secs, NULL);
+	return epc_page;
+}
 static struct sgx_encl_page *__sgx_encl_load_page(struct sgx_encl *encl,
 						  struct sgx_encl_page *entry)
 {
 		return entry;
 	}
-	if (!(encl->secs.epc_page)) {
+	epc_page = sgx_encl_load_secs(encl);
-		epc_page = sgx_encl_eldu(&encl->secs, NULL);
+	if (IS_ERR(epc_page))
-		if (IS_ERR(epc_page))
+		return ERR_CAST(epc_page);
-			return ERR_CAST(epc_page);
-	}
 	epc_page = sgx_encl_eldu(entry, encl->secs.epc_page);
 	if (IS_ERR(epc_page))
 	mutex_lock(&encl->lock);
+	epc_page = sgx_encl_load_secs(encl);
+	if (IS_ERR(epc_page)) {
+		if (PTR_ERR(epc_page) == -EBUSY)
+			vmret = VM_FAULT_NOPAGE;
+		goto err_out_unlock;
+	}
 	epc_page = sgx_alloc_epc_page(encl_page, false);
 	if (IS_ERR(epc_page)) {
 		if (PTR_ERR(epc_page) == -EBUSY)

arch/x86/kernel/kgdb.c+0−1

@@ -695,7 +695,6 @@ void kgdb_arch_exit(void) · 694 unmodified lines
695	}	695	}
696		696
697	/**	697	/**
698	*
699	* kgdb_skipexception - Bail out of KGDB when we've been triggered.	698	* kgdb_skipexception - Bail out of KGDB when we've been triggered.
700	* @exception: Exception vector number	699	* @exception: Exception vector number
701	* @regs: Current &struct pt_regs.	700	* @regs: Current &struct pt_regs.

arch/x86/kernel/paravirt.c+0−67

@@ -143,66 +143,7 @@ int paravirt_disable_iospace(void) · 142 unmodified lines
143	return request_resource(&ioport_resource, &reserve_ioports);	143	return request_resource(&ioport_resource, &reserve_ioports);
144	}	144	}
145		145
146	static DEFINE_PER_CPU(enum paravirt_lazy_mode, paravirt_lazy_mode) = PARAVIRT_LAZY_NONE;
147
148	static inline void enter_lazy(enum paravirt_lazy_mode mode)
149	{
150	BUG_ON(this_cpu_read(paravirt_lazy_mode) != PARAVIRT_LAZY_NONE);
151
152	this_cpu_write(paravirt_lazy_mode, mode);
153	}
154
155	static void leave_lazy(enum paravirt_lazy_mode mode)
156	{
157	BUG_ON(this_cpu_read(paravirt_lazy_mode) != mode);
158
159	this_cpu_write(paravirt_lazy_mode, PARAVIRT_LAZY_NONE);
160	}
161
162	void paravirt_enter_lazy_mmu(void)
163	{
164	enter_lazy(PARAVIRT_LAZY_MMU);
165	}
166
167	void paravirt_leave_lazy_mmu(void)
168	{
169	leave_lazy(PARAVIRT_LAZY_MMU);
170	}
171
172	void paravirt_flush_lazy_mmu(void)
173	{
174	preempt_disable();
175
176	if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_MMU) {
177	arch_leave_lazy_mmu_mode();
178	arch_enter_lazy_mmu_mode();
179	}
180
181	preempt_enable();
182	}
183
184	#ifdef CONFIG_PARAVIRT_XXL	146	#ifdef CONFIG_PARAVIRT_XXL
185	void paravirt_start_context_switch(struct task_struct *prev)
186	{
187	BUG_ON(preemptible());
188
189	if (this_cpu_read(paravirt_lazy_mode) == PARAVIRT_LAZY_MMU) {
190	arch_leave_lazy_mmu_mode();
191	set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES);
192	}
193	enter_lazy(PARAVIRT_LAZY_CPU);
194	}
195
196	void paravirt_end_context_switch(struct task_struct *next)
197	{
198	BUG_ON(preemptible());
199
200	leave_lazy(PARAVIRT_LAZY_CPU);
201
202	if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES))
203	arch_enter_lazy_mmu_mode();
204	}
205
206	static noinstr void pv_native_write_cr2(unsigned long val)	147	static noinstr void pv_native_write_cr2(unsigned long val)
207	{	148	{
208	native_write_cr2(val);	149	native_write_cr2(val);
@@ -229,14 +170,6 @@ static noinstr void pv_native_safe_halt(void) · 20 unmodified lines
229	}	170	}
230	#endif	171	#endif
231		172
232	enum paravirt_lazy_mode paravirt_get_lazy_mode(void)
233	{
234	if (in_interrupt())
235	return PARAVIRT_LAZY_NONE;
236
237	return this_cpu_read(paravirt_lazy_mode);
238	}
239
240	struct pv_info pv_info = {	173	struct pv_info pv_info = {
241	.name = "bare hardware",	174	.name = "bare hardware",
242	#ifdef CONFIG_PARAVIRT_XXL	175	#ifdef CONFIG_PARAVIRT_XXL

arch/x86/kernel/process.c+0−7

@@ -257,13 +257,6 @@ int copy_thread(struct task_struct p, const struct kernel_clone_args args) · 256 unmodified lines
257	if (!ret && unlikely(test_tsk_thread_flag(current, TIF_IO_BITMAP)))	257	if (!ret && unlikely(test_tsk_thread_flag(current, TIF_IO_BITMAP)))
258	io_bitmap_share(p);	258	io_bitmap_share(p);
259		259
260	/*
261	* If copy_thread() if failing, don't leak the shadow stack possibly
262	* allocated in shstk_alloc_thread_stack() above.
263	*/
264	if (ret)
265	shstk_free(p);
266
267	return ret;	260	return ret;
268	}	261	}
269		262

arch/x86/kernel/setup.c+2−6

 #if defined(CONFIG_HAVE_IMA_KEXEC) && !defined(CONFIG_OF_FLATTREE)
 int __init ima_free_kexec_buffer(void)
 {
-	int rc;
 	if (!ima_kexec_buffer_size)
 		return -ENOENT;
-	rc = memblock_phys_free(ima_kexec_buffer_phys,
+	memblock_free_late(ima_kexec_buffer_phys,
-				ima_kexec_buffer_size);
+			   ima_kexec_buffer_size);
-	if (rc)
-		return rc;
 	ima_kexec_buffer_phys = 0;
 	ima_kexec_buffer_size = 0;

arch/x86/kernel/shstk.c+31−2

@@ -205,10 +205,21 @@ unsigned long shstk_alloc_thread_stack(struct task_struct *tsk, unsigned long cl · 204 unmodified lines
205	return 0;	205	return 0;
206		206
207	/*	207	/*
208	* For CLONE_VM, except vfork, the child needs a separate shadow	208	* For CLONE_VFORK the child will share the parents shadow stack.
		209	* Make sure to clear the internal tracking of the thread shadow
		210	* stack so the freeing logic run for child knows to leave it alone.
		211	*/
		212	if (clone_flags & CLONE_VFORK) {
		213	shstk->base = 0;
		214	shstk->size = 0;
		215	return 0;
		216	}
		217
		218	/*
		219	* For !CLONE_VM the child will use a copy of the parents shadow
209	* stack.	220	* stack.
210	*/	221	*/
211	if ((clone_flags & (CLONE_VFORK \| CLONE_VM)) != CLONE_VM)	222	if (!(clone_flags & CLONE_VM))
212	return 0;	223	return 0;
213		224
214	size = adjust_shstk_size(stack_size);	225	size = adjust_shstk_size(stack_size);
@@ -408,7 +419,25 @@ void shstk_free(struct task_struct *tsk) · 193 unmodified lines
408	if (!tsk->mm \|\| tsk->mm != current->mm)	419	if (!tsk->mm \|\| tsk->mm != current->mm)
409	return;	420	return;
410		421
		422	/*
		423	* If shstk->base is NULL, then this task is not managing its
		424	* own shadow stack (CLONE_VFORK). So skip freeing it.
		425	*/
		426	if (!shstk->base)
		427	return;
		428
		429	/*
		430	* shstk->base is NULL for CLONE_VFORK child tasks, and so is
		431	* normal. But size = 0 on a shstk->base is not normal and
		432	* indicated an attempt to free the thread shadow stack twice.
		433	* Warn about it.
		434	*/
		435	if (WARN_ON(!shstk->size))
		436	return;
		437
411	unmap_shadow_stack(shstk->base, shstk->size);	438	unmap_shadow_stack(shstk->base, shstk->size);
		439
		440	shstk->size = 0;
412	}	441	}
413		442
414	static int wrss_control(bool enable)	443	static int wrss_control(bool enable)

arch/x86/kernel/smpboot.c+9−3

@@ -579,7 +579,6 @@ static bool match_llc(struct cpuinfo_x86 c, struct cpuinfo_x86 o) · 578 unmodified lines
579	}	579	}
580		580
581		581
582	#if defined(CONFIG_SCHED_SMT) \|\| defined(CONFIG_SCHED_CLUSTER) \|\| defined(CONFIG_SCHED_MC)
583	static inline int x86_sched_itmt_flags(void)	582	static inline int x86_sched_itmt_flags(void)
584	{	583	{
585	return sysctl_sched_itmt_enabled ? SD_ASYM_PACKING : 0;	584	return sysctl_sched_itmt_enabled ? SD_ASYM_PACKING : 0;
@@ -603,7 +602,14 @@ static int x86_cluster_flags(void) · 17 unmodified lines
603	return cpu_cluster_flags() \| x86_sched_itmt_flags();	602	return cpu_cluster_flags() \| x86_sched_itmt_flags();
604	}	603	}
605	#endif	604	#endif
606	#endif	605
		606	static int x86_die_flags(void)
		607	{
		608	if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU))
		609	return x86_sched_itmt_flags();
		610
		611	return 0;
		612	}
607		613
608	/*	614	/*
609	* Set if a package/die has multiple NUMA nodes inside.	615	* Set if a package/die has multiple NUMA nodes inside.
@@ -640,7 +646,7 @@ static void __init build_sched_topology(void) · 30 unmodified lines
640	*/	646	*/
641	if (!x86_has_numa_in_package) {	647	if (!x86_has_numa_in_package) {
642	x86_topology[i++] = (struct sched_domain_topology_level){	648	x86_topology[i++] = (struct sched_domain_topology_level){
643	cpu_cpu_mask, SD_INIT_NAME(DIE)	649	cpu_cpu_mask, x86_die_flags, SD_INIT_NAME(DIE)
644	};	650	};
645	}	651	}
646		652

arch/x86/kvm/mmu/mmu.c+5−16

 	return unlikely(!list_empty_careful(&kvm->arch.zapped_obsolete_pages));
 }
-int kvm_mmu_init_vm(struct kvm *kvm)
+void kvm_mmu_init_vm(struct kvm *kvm)
 {
-	int r;
 	INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
 	INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
 	INIT_LIST_HEAD(&kvm->arch.possible_nx_huge_pages);
 	spin_lock_init(&kvm->arch.mmu_unsync_pages_lock);
-	if (tdp_mmu_enabled) {
+	if (tdp_mmu_enabled)
-		r = kvm_mmu_init_tdp_mmu(kvm);
+		kvm_mmu_init_tdp_mmu(kvm);
-		if (r < 0)
-			return r;
-	}
 	kvm->arch.split_page_header_cache.kmem_cache = mmu_page_header_cache;
 	kvm->arch.split_page_header_cache.gfp_zero = __GFP_ZERO;
 	kvm->arch.split_desc_cache.kmem_cache = pte_list_desc_cache;
 	kvm->arch.split_desc_cache.gfp_zero = __GFP_ZERO;
-	return 0;
 }
 static void mmu_free_vm_memory_caches(struct kvm *kvm)
 void kvm_zap_gfn_range(struct kvm *kvm, gfn_t gfn_start, gfn_t gfn_end)
 {
 	bool flush;
-	int i;
 	if (WARN_ON_ONCE(gfn_end <= gfn_start))
 		return;
 	flush = kvm_rmap_zap_gfn_range(kvm, gfn_start, gfn_end);
-	if (tdp_mmu_enabled) {
+	if (tdp_mmu_enabled)
-		for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++)
+		flush = kvm_tdp_mmu_zap_leafs(kvm, gfn_start, gfn_end, flush);
-			flush = kvm_tdp_mmu_zap_leafs(kvm, i, gfn_start,
-						      gfn_end, true, flush);
-	}
 	if (flush)
 		kvm_flush_remote_tlbs_range(kvm, gfn_start, gfn_end - gfn_start);

arch/x86/kvm/mmu/mmu_internal.h+7−8

 	bool tdp_mmu_page;
 	bool unsync;
-	u8 mmu_valid_gen;
+	union {
+		u8 mmu_valid_gen;
+		/* Only accessed under slots_lock.  */
+		bool tdp_mmu_scheduled_root_to_zap;
+	};
 	 /*
 	  * The shadow page can't be replaced by an equivalent huge page
 		struct kvm_rmap_head parent_ptes; /* rmap pointers to parent sptes */
 		tdp_ptep_t ptep;
 	};
-	union {
+	DECLARE_BITMAP(unsync_child_bitmap, 512);
-		DECLARE_BITMAP(unsync_child_bitmap, 512);
-		struct {
-			struct work_struct tdp_mmu_async_work;
-			void *tdp_mmu_async_data;
-		};
-	};
 	/*
 	 * Tracks shadow pages that, if zapped, would allow KVM to create an NX

arch/x86/kvm/mmu/tdp_mmu.c+67−85

@@ -12,18 +12,10 @@ · 11 unmodified lines
12	#include <trace/events/kvm.h>	12	#include <trace/events/kvm.h>
13		13
14	/* Initializes the TDP MMU for the VM, if enabled. */	14	/* Initializes the TDP MMU for the VM, if enabled. */
15	int kvm_mmu_init_tdp_mmu(struct kvm *kvm)	15	void kvm_mmu_init_tdp_mmu(struct kvm *kvm)
16	{	16	{
17	struct workqueue_struct *wq;
18
19	wq = alloc_workqueue("kvm", WQ_UNBOUND\|WQ_MEM_RECLAIM\|WQ_CPU_INTENSIVE, 0);
20	if (!wq)
21	return -ENOMEM;
22
23	INIT_LIST_HEAD(&kvm->arch.tdp_mmu_roots);	17	INIT_LIST_HEAD(&kvm->arch.tdp_mmu_roots);
24	spin_lock_init(&kvm->arch.tdp_mmu_pages_lock);	18	spin_lock_init(&kvm->arch.tdp_mmu_pages_lock);
25	kvm->arch.tdp_mmu_zap_wq = wq;
26	return 1;
27	}	19	}
28		20
29	/* Arbitrarily returns true so that this may be used in if statements. */	21	/* Arbitrarily returns true so that this may be used in if statements. */
@@ -46,20 +38,15 @@ void kvm_mmu_uninit_tdp_mmu(struct kvm *kvm) · 16 unmodified lines
46	* ultimately frees all roots.	38	* ultimately frees all roots.
47	*/	39	*/
48	kvm_tdp_mmu_invalidate_all_roots(kvm);	40	kvm_tdp_mmu_invalidate_all_roots(kvm);
49		41	kvm_tdp_mmu_zap_invalidated_roots(kvm);
50	/*
51	* Destroying a workqueue also first flushes the workqueue, i.e. no
52	* need to invoke kvm_tdp_mmu_zap_invalidated_roots().
53	*/
54	destroy_workqueue(kvm->arch.tdp_mmu_zap_wq);
55		42
56	WARN_ON(atomic64_read(&kvm->arch.tdp_mmu_pages));	43	WARN_ON(atomic64_read(&kvm->arch.tdp_mmu_pages));
57	WARN_ON(!list_empty(&kvm->arch.tdp_mmu_roots));	44	WARN_ON(!list_empty(&kvm->arch.tdp_mmu_roots));
58		45
59	/*	46	/*
60	* Ensure that all the outstanding RCU callbacks to free shadow pages	47	* Ensure that all the outstanding RCU callbacks to free shadow pages
61	* can run before the VM is torn down. Work items on tdp_mmu_zap_wq	48	* can run before the VM is torn down. Putting the last reference to
62	* can call kvm_tdp_mmu_put_root and create new callbacks.	49	* zapped roots will create new callbacks.
63	*/	50	*/
64	rcu_barrier();	51	rcu_barrier();
65	}	52	}
@@ -86,46 +73,6 @@ static void tdp_mmu_free_sp_rcu_callback(struct rcu_head *head) · 20 unmodified lines
86	tdp_mmu_free_sp(sp);	73	tdp_mmu_free_sp(sp);
87	}	74	}
88		75
89	static void tdp_mmu_zap_root(struct kvm kvm, struct kvm_mmu_page root,
90	bool shared);
91
92	static void tdp_mmu_zap_root_work(struct work_struct *work)
93	{
94	struct kvm_mmu_page *root = container_of(work, struct kvm_mmu_page,
95	tdp_mmu_async_work);
96	struct kvm *kvm = root->tdp_mmu_async_data;
97
98	read_lock(&kvm->mmu_lock);
99
100	/*
101	* A TLB flush is not necessary as KVM performs a local TLB flush when
102	* allocating a new root (see kvm_mmu_load()), and when migrating vCPU
103	* to a different pCPU. Note, the local TLB flush on reuse also
104	* invalidates any paging-structure-cache entries, i.e. TLB entries for
105	* intermediate paging structures, that may be zapped, as such entries
106	* are associated with the ASID on both VMX and SVM.
107	*/
108	tdp_mmu_zap_root(kvm, root, true);
109
110	/*
111	* Drop the refcount using kvm_tdp_mmu_put_root() to test its logic for
112	* avoiding an infinite loop. By design, the root is reachable while
113	* it's being asynchronously zapped, thus a different task can put its
114	* last reference, i.e. flowing through kvm_tdp_mmu_put_root() for an
115	* asynchronously zapped root is unavoidable.
116	*/
117	kvm_tdp_mmu_put_root(kvm, root, true);
118
119	read_unlock(&kvm->mmu_lock);
120	}
121
122	static void tdp_mmu_schedule_zap_root(struct kvm kvm, struct kvm_mmu_page root)
123	{
124	root->tdp_mmu_async_data = kvm;
125	INIT_WORK(&root->tdp_mmu_async_work, tdp_mmu_zap_root_work);
126	queue_work(kvm->arch.tdp_mmu_zap_wq, &root->tdp_mmu_async_work);
127	}
128
129	void kvm_tdp_mmu_put_root(struct kvm kvm, struct kvm_mmu_page root,	76	void kvm_tdp_mmu_put_root(struct kvm kvm, struct kvm_mmu_page root,
130	bool shared)	77	bool shared)
131	{	78	{
@@ -211,8 +158,12 @@ static struct kvm_mmu_page tdp_mmu_next_root(struct kvm kvm, · 79 unmodified lines
211	#define for_each_valid_tdp_mmu_root_yield_safe(_kvm, _root, _as_id, _shared) \	158	#define for_each_valid_tdp_mmu_root_yield_safe(_kvm, _root, _as_id, _shared) \
212	__for_each_tdp_mmu_root_yield_safe(_kvm, _root, _as_id, _shared, true)	159	__for_each_tdp_mmu_root_yield_safe(_kvm, _root, _as_id, _shared, true)
213		160
214	#define for_each_tdp_mmu_root_yield_safe(_kvm, _root, _as_id) \	161	#define for_each_tdp_mmu_root_yield_safe(_kvm, _root, _shared) \
215	__for_each_tdp_mmu_root_yield_safe(_kvm, _root, _as_id, false, false)	162	for (_root = tdp_mmu_next_root(_kvm, NULL, _shared, false); \
		163	_root; \
		164	_root = tdp_mmu_next_root(_kvm, _root, _shared, false)) \
		165	if (!kvm_lockdep_assert_mmu_lock_held(_kvm, _shared)) { \
		166	} else
216		167
217	/*	168	/*
218	* Iterate over all TDP MMU roots. Requires that mmu_lock be held for write,	169	* Iterate over all TDP MMU roots. Requires that mmu_lock be held for write,
@@ -292,7 +243,7 @@ hpa_t kvm_tdp_mmu_get_vcpu_root_hpa(struct kvm_vcpu *vcpu) · 73 unmodified lines
292	* by a memslot update or by the destruction of the VM. Initialize the	243	* by a memslot update or by the destruction of the VM. Initialize the
293	* refcount to two; one reference for the vCPU, and one reference for	244	* refcount to two; one reference for the vCPU, and one reference for
294	* the TDP MMU itself, which is held until the root is invalidated and	245	* the TDP MMU itself, which is held until the root is invalidated and
295	* is ultimately put by tdp_mmu_zap_root_work().	246	* is ultimately put by kvm_tdp_mmu_zap_invalidated_roots().
296	*/	247	*/
297	refcount_set(&root->tdp_mmu_root_count, 2);	248	refcount_set(&root->tdp_mmu_root_count, 2);
298		249
@@ -877,13 +828,12 @@ static bool tdp_mmu_zap_leafs(struct kvm kvm, struct kvm_mmu_page root, · 578 unmodified lines
877	* true if a TLB flush is needed before releasing the MMU lock, i.e. if one or	828	* true if a TLB flush is needed before releasing the MMU lock, i.e. if one or
878	* more SPTEs were zapped since the MMU lock was last acquired.	829	* more SPTEs were zapped since the MMU lock was last acquired.
879	*/	830	*/
880	bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, int as_id, gfn_t start, gfn_t end,	831	bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, gfn_t start, gfn_t end, bool flush)
881	bool can_yield, bool flush)
882	{	832	{
883	struct kvm_mmu_page *root;	833	struct kvm_mmu_page *root;
884		834
885	for_each_tdp_mmu_root_yield_safe(kvm, root, as_id)	835	for_each_tdp_mmu_root_yield_safe(kvm, root, false)
886	flush = tdp_mmu_zap_leafs(kvm, root, start, end, can_yield, flush);	836	flush = tdp_mmu_zap_leafs(kvm, root, start, end, true, flush);
887		837
888	return flush;	838	return flush;
889	}	839	}
@@ -891,7 +841,6 @@ bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, int as_id, gfn_t start, gfn_t end, · 1 unmodified line
891	void kvm_tdp_mmu_zap_all(struct kvm *kvm)	841	void kvm_tdp_mmu_zap_all(struct kvm *kvm)
892	{	842	{
893	struct kvm_mmu_page *root;	843	struct kvm_mmu_page *root;
894	int i;
895		844
896	/*	845	/*
897	* Zap all roots, including invalid roots, as all SPTEs must be dropped	846	* Zap all roots, including invalid roots, as all SPTEs must be dropped
@@ -905,10 +854,8 @@ void kvm_tdp_mmu_zap_all(struct kvm *kvm) · 7 unmodified lines
905	* is being destroyed or the userspace VMM has exited. In both cases,	854	* is being destroyed or the userspace VMM has exited. In both cases,
906	* KVM_RUN is unreachable, i.e. no vCPUs will ever service the request.	855	* KVM_RUN is unreachable, i.e. no vCPUs will ever service the request.
907	*/	856	*/
908	for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {	857	for_each_tdp_mmu_root_yield_safe(kvm, root, false)
909	for_each_tdp_mmu_root_yield_safe(kvm, root, i)	858	tdp_mmu_zap_root(kvm, root, false);
910	tdp_mmu_zap_root(kvm, root, false);
911	}
912	}	859	}
913		860
914	/*	861	/*
@@ -917,18 +864,47 @@ void kvm_tdp_mmu_zap_all(struct kvm *kvm) · 2 unmodified lines
917	*/	864	*/
918	void kvm_tdp_mmu_zap_invalidated_roots(struct kvm *kvm)	865	void kvm_tdp_mmu_zap_invalidated_roots(struct kvm *kvm)
919	{	866	{
920	flush_workqueue(kvm->arch.tdp_mmu_zap_wq);	867	struct kvm_mmu_page *root;
		868
		869	read_lock(&kvm->mmu_lock);
		870
		871	for_each_tdp_mmu_root_yield_safe(kvm, root, true) {
		872	if (!root->tdp_mmu_scheduled_root_to_zap)
		873	continue;
		874
		875	root->tdp_mmu_scheduled_root_to_zap = false;
		876	KVM_BUG_ON(!root->role.invalid, kvm);
		877
		878	/*
		879	* A TLB flush is not necessary as KVM performs a local TLB
		880	* flush when allocating a new root (see kvm_mmu_load()), and
		881	* when migrating a vCPU to a different pCPU. Note, the local
		882	* TLB flush on reuse also invalidates paging-structure-cache
		883	* entries, i.e. TLB entries for intermediate paging structures,
		884	* that may be zapped, as such entries are associated with the
		885	* ASID on both VMX and SVM.
		886	*/
		887	tdp_mmu_zap_root(kvm, root, true);
		888
		889	/*
		890	* The referenced needs to be put after zapping the root, as
		891	* the root must be reachable by mmu_notifiers while it's being
		892	* zapped
		893	*/
		894	kvm_tdp_mmu_put_root(kvm, root, true);
		895	}
		896
		897	read_unlock(&kvm->mmu_lock);
921	}	898	}
922		899
923	/*	900	/*
924	* Mark each TDP MMU root as invalid to prevent vCPUs from reusing a root that	901	* Mark each TDP MMU root as invalid to prevent vCPUs from reusing a root that
925	* is about to be zapped, e.g. in response to a memslots update. The actual	902	* is about to be zapped, e.g. in response to a memslots update. The actual
926	* zapping is performed asynchronously. Using a separate workqueue makes it	903	* zapping is done separately so that it happens with mmu_lock with read,
927	* easy to ensure that the destruction is performed before the "fast zap"	904	* whereas invalidating roots must be done with mmu_lock held for write (unless
928	* completes, without keeping a separate list of invalidated roots; the list is	905	* the VM is being destroyed).
929	* effectively the list of work items in the workqueue.
930	*	906	*
931	* Note, the asynchronous worker is gifted the TDP MMU's reference.	907	* Note, kvm_tdp_mmu_zap_invalidated_roots() is gifted the TDP MMU's reference.
932	* See kvm_tdp_mmu_get_vcpu_root_hpa().	908	* See kvm_tdp_mmu_get_vcpu_root_hpa().
933	*/	909	*/
934	void kvm_tdp_mmu_invalidate_all_roots(struct kvm *kvm)	910	void kvm_tdp_mmu_invalidate_all_roots(struct kvm *kvm)
@@ -953,19 +929,20 @@ void kvm_tdp_mmu_invalidate_all_roots(struct kvm *kvm) · 18 unmodified lines
953	/*	929	/*
954	* As above, mmu_lock isn't held when destroying the VM! There can't	930	* As above, mmu_lock isn't held when destroying the VM! There can't
955	* be other references to @kvm, i.e. nothing else can invalidate roots	931	* be other references to @kvm, i.e. nothing else can invalidate roots
956	* or be consuming roots, but walking the list of roots does need to be	932	* or get/put references to roots.
957	* guarded against roots being deleted by the asynchronous zap worker.
958	*/	933	*/
959	rcu_read_lock();	934	list_for_each_entry(root, &kvm->arch.tdp_mmu_roots, link) {
960		935	/*
961	list_for_each_entry_rcu(root, &kvm->arch.tdp_mmu_roots, link) {	936	* Note, invalid roots can outlive a memslot update! Invalid
		937	* roots must be zapped before the memslot update completes,
		938	* but a different task can acquire a reference and keep the
		939	* root alive after its been zapped.
		940	*/
962	if (!root->role.invalid) {	941	if (!root->role.invalid) {
		942	root->tdp_mmu_scheduled_root_to_zap = true;
963	root->role.invalid = true;	943	root->role.invalid = true;
964	tdp_mmu_schedule_zap_root(kvm, root);
965	}	944	}
966	}	945	}
967
968	rcu_read_unlock();
969	}	946	}
970		947
971	/*	948	/*
@@ -1146,8 +1123,13 @@ retry: · 174 unmodified lines
1146	bool kvm_tdp_mmu_unmap_gfn_range(struct kvm kvm, struct kvm_gfn_range range,	1123	bool kvm_tdp_mmu_unmap_gfn_range(struct kvm kvm, struct kvm_gfn_range range,
1147	bool flush)	1124	bool flush)
1148	{	1125	{
1149	return kvm_tdp_mmu_zap_leafs(kvm, range->slot->as_id, range->start,	1126	struct kvm_mmu_page *root;
1150	range->end, range->may_block, flush);	1127
		1128	__for_each_tdp_mmu_root_yield_safe(kvm, root, range->slot->as_id, false, false)
		1129	flush = tdp_mmu_zap_leafs(kvm, root, range->start, range->end,
		1130	range->may_block, flush);
		1131
		1132	return flush;
1151	}	1133	}
1152		1134
1153	typedef bool (tdp_handler_t)(struct kvm kvm, struct tdp_iter *iter,	1135	typedef bool (tdp_handler_t)(struct kvm kvm, struct tdp_iter *iter,

arch/x86/kvm/mmu/tdp_mmu.h+2−3

 #include "spte.h"
-int kvm_mmu_init_tdp_mmu(struct kvm *kvm);
+void kvm_mmu_init_tdp_mmu(struct kvm *kvm);
 void kvm_mmu_uninit_tdp_mmu(struct kvm *kvm);
 hpa_t kvm_tdp_mmu_get_vcpu_root_hpa(struct kvm_vcpu *vcpu);
 void kvm_tdp_mmu_put_root(struct kvm *kvm, struct kvm_mmu_page *root,
 			  bool shared);
-bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, int as_id, gfn_t start,
+bool kvm_tdp_mmu_zap_leafs(struct kvm *kvm, gfn_t start, gfn_t end, bool flush);
-				 gfn_t end, bool can_yield, bool flush);
 bool kvm_tdp_mmu_zap_sp(struct kvm *kvm, struct kvm_mmu_page *sp);
 void kvm_tdp_mmu_zap_all(struct kvm *kvm);
 void kvm_tdp_mmu_invalidate_all_roots(struct kvm *kvm);

arch/x86/kvm/svm/sev.c+26−8

@@ -2962,6 +2962,32 @@ int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in) · 2961 unmodified lines
2962	count, in);	2962	count, in);
2963	}	2963	}
2964		2964
		2965	static void sev_es_vcpu_after_set_cpuid(struct vcpu_svm *svm)
		2966	{
		2967	struct kvm_vcpu *vcpu = &svm->vcpu;
		2968
		2969	if (boot_cpu_has(X86_FEATURE_V_TSC_AUX)) {
		2970	bool v_tsc_aux = guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP) \|\|
		2971	guest_cpuid_has(vcpu, X86_FEATURE_RDPID);
		2972
		2973	set_msr_interception(vcpu, svm->msrpm, MSR_TSC_AUX, v_tsc_aux, v_tsc_aux);
		2974	}
		2975	}
		2976
		2977	void sev_vcpu_after_set_cpuid(struct vcpu_svm *svm)
		2978	{
		2979	struct kvm_vcpu *vcpu = &svm->vcpu;
		2980	struct kvm_cpuid_entry2 *best;
		2981
		2982	/* For sev guests, the memory encryption bit is not reserved in CR3. */
		2983	best = kvm_find_cpuid_entry(vcpu, 0x8000001F);
		2984	if (best)
		2985	vcpu->arch.reserved_gpa_bits &= ~(1UL << (best->ebx & 0x3f));
		2986
		2987	if (sev_es_guest(svm->vcpu.kvm))
		2988	sev_es_vcpu_after_set_cpuid(svm);
		2989	}
		2990
2965	static void sev_es_init_vmcb(struct vcpu_svm *svm)	2991	static void sev_es_init_vmcb(struct vcpu_svm *svm)
2966	{	2992	{
2967	struct vmcb *vmcb = svm->vmcb01.ptr;	2993	struct vmcb *vmcb = svm->vmcb01.ptr;
@@ -3024,14 +3050,6 @@ static void sev_es_init_vmcb(struct vcpu_svm *svm) · 56 unmodified lines
3024	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1);	3050	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1);
3025	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);	3051	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
3026	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1);	3052	set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1);
3027
3028	if (boot_cpu_has(X86_FEATURE_V_TSC_AUX) &&
3029	(guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDTSCP) \|\|
3030	guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDPID))) {
3031	set_msr_interception(vcpu, svm->msrpm, MSR_TSC_AUX, 1, 1);
3032	if (guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDTSCP))
3033	svm_clr_intercept(svm, INTERCEPT_RDTSCP);
3034	}
3035	}	3053	}
3036		3054
3037	void sev_init_vmcb(struct vcpu_svm *svm)	3055	void sev_init_vmcb(struct vcpu_svm *svm)

arch/x86/kvm/svm/svm.c+35−8

 	amd_pmu_enable_virt();
+	/*
+	 * If TSC_AUX virtualization is supported, TSC_AUX becomes a swap type
+	 * "B" field (see sev_es_prepare_switch_to_guest()) for SEV-ES guests.
+	 * Since Linux does not change the value of TSC_AUX once set, prime the
+	 * TSC_AUX field now to avoid a RDMSR on every vCPU run.
+	 */
+	if (boot_cpu_has(X86_FEATURE_V_TSC_AUX)) {
+		struct sev_es_save_area *hostsa;
+		u32 msr_hi;
+		hostsa = (struct sev_es_save_area *)(page_address(sd->save_area) + 0x400);
+		rdmsr(MSR_TSC_AUX, hostsa->tsc_aux, msr_hi);
+	}
 	return 0;
 }
 	if (tsc_scaling)
 		__svm_write_tsc_multiplier(vcpu->arch.tsc_scaling_ratio);
-	if (likely(tsc_aux_uret_slot >= 0))
+	/*
+	 * TSC_AUX is always virtualized for SEV-ES guests when the feature is
+	 * available. The user return MSR support is not required in this case
+	 * because TSC_AUX is restored on #VMEXIT from the host save area
+	 * (which has been initialized in svm_hardware_enable()).
+	 */
+	if (likely(tsc_aux_uret_slot >= 0) &&
+	    (!boot_cpu_has(X86_FEATURE_V_TSC_AUX) || !sev_es_guest(vcpu->kvm)))
 		kvm_set_user_return_msr(tsc_aux_uret_slot, svm->tsc_aux, -1ull);
 	svm->guest_state_loaded = true;
 		svm->sysenter_esp_hi = guest_cpuid_is_intel(vcpu) ? (data >> 32) : 0;
 		break;
 	case MSR_TSC_AUX:
+		/*
+		 * TSC_AUX is always virtualized for SEV-ES guests when the
+		 * feature is available. The user return MSR support is not
+		 * required in this case because TSC_AUX is restored on #VMEXIT
+		 * from the host save area (which has been initialized in
+		 * svm_hardware_enable()).
+		 */
+		if (boot_cpu_has(X86_FEATURE_V_TSC_AUX) && sev_es_guest(vcpu->kvm))
+			break;
 		/*
 		 * TSC_AUX is usually changed only during boot and never read
 		 * directly.  Intercept TSC_AUX instead of exposing it to the
 static void svm_vcpu_after_set_cpuid(struct kvm_vcpu *vcpu)
 {
 	struct vcpu_svm *svm = to_svm(vcpu);
-	struct kvm_cpuid_entry2 *best;
 	/*
 	 * SVM doesn't provide a way to disable just XSAVES in the guest, KVM
 		set_msr_interception(vcpu, svm->msrpm, MSR_IA32_FLUSH_CMD, 0,
 				     !!guest_cpuid_has(vcpu, X86_FEATURE_FLUSH_L1D));
-	/* For sev guests, the memory encryption bit is not reserved in CR3.  */
+	if (sev_guest(vcpu->kvm))
-	if (sev_guest(vcpu->kvm)) {
+		sev_vcpu_after_set_cpuid(svm);
-		best = kvm_find_cpuid_entry(vcpu, 0x8000001F);
-		if (best)
-			vcpu->arch.reserved_gpa_bits &= ~(1UL << (best->ebx & 0x3f));
-	}
 	init_vmcb_after_set_cpuid(vcpu);
 }

arch/x86/kvm/svm/svm.h+1−0

@@ -684,6 +684,7 @@ void __init sev_hardware_setup(void); · 683 unmodified lines
684	void sev_hardware_unsetup(void);	684	void sev_hardware_unsetup(void);
685	int sev_cpu_init(struct svm_cpu_data *sd);	685	int sev_cpu_init(struct svm_cpu_data *sd);
686	void sev_init_vmcb(struct vcpu_svm *svm);	686	void sev_init_vmcb(struct vcpu_svm *svm);
		687	void sev_vcpu_after_set_cpuid(struct vcpu_svm *svm);
687	void sev_free_vcpu(struct kvm_vcpu *vcpu);	688	void sev_free_vcpu(struct kvm_vcpu *vcpu);
688	int sev_handle_vmgexit(struct kvm_vcpu *vcpu);	689	int sev_handle_vmgexit(struct kvm_vcpu *vcpu);
689	int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in);	690	int sev_es_string_io(struct vcpu_svm *svm, int size, unsigned int port, int in);

arch/x86/kvm/x86.c+1−4

 	if (ret)
 		goto out;
-	ret = kvm_mmu_init_vm(kvm);
+	kvm_mmu_init_vm(kvm);
-	if (ret)
-		goto out_page_track;
 	ret = static_call(kvm_x86_vm_init)(kvm);
 	if (ret)
 out_uninit_mmu:
 	kvm_mmu_uninit_vm(kvm);
-out_page_track:
 	kvm_page_track_cleanup(kvm);
 out:
 	return ret;

arch/x86/lib/memcpy_64.S+1−1

@@ -40,7 +40,7 @@ SYM_TYPED_FUNC_START(__memcpy) · 39 unmodified lines
40	SYM_FUNC_END(__memcpy)	40	SYM_FUNC_END(__memcpy)
41	EXPORT_SYMBOL(__memcpy)	41	EXPORT_SYMBOL(__memcpy)
42		42
43	SYM_FUNC_ALIAS(memcpy, __memcpy)	43	SYM_FUNC_ALIAS_MEMFUNC(memcpy, __memcpy)
44	EXPORT_SYMBOL(memcpy)	44	EXPORT_SYMBOL(memcpy)
45		45
46	SYM_FUNC_START_LOCAL(memcpy_orig)	46	SYM_FUNC_START_LOCAL(memcpy_orig)

arch/x86/lib/memmove_64.S+1−1

@@ -212,5 +212,5 @@ SYM_FUNC_START(__memmove) · 211 unmodified lines
212	SYM_FUNC_END(__memmove)	212	SYM_FUNC_END(__memmove)
213	EXPORT_SYMBOL(__memmove)	213	EXPORT_SYMBOL(__memmove)
214		214
215	SYM_FUNC_ALIAS(memmove, __memmove)	215	SYM_FUNC_ALIAS_MEMFUNC(memmove, __memmove)
216	EXPORT_SYMBOL(memmove)	216	EXPORT_SYMBOL(memmove)

arch/x86/lib/memset_64.S+1−1

@@ -40,7 +40,7 @@ SYM_FUNC_START(__memset) · 39 unmodified lines
40	SYM_FUNC_END(__memset)	40	SYM_FUNC_END(__memset)
41	EXPORT_SYMBOL(__memset)	41	EXPORT_SYMBOL(__memset)
42		42
43	SYM_FUNC_ALIAS(memset, __memset)	43	SYM_FUNC_ALIAS_MEMFUNC(memset, __memset)
44	EXPORT_SYMBOL(memset)	44	EXPORT_SYMBOL(memset)
45		45
46	SYM_FUNC_START_LOCAL(memset_orig)	46	SYM_FUNC_START_LOCAL(memset_orig)

arch/x86/lib/putuser.S+0−4

 EXPORT_SYMBOL(__put_user_1)
 SYM_FUNC_START(__put_user_nocheck_1)
-	ENDBR
 	ASM_STAC
 2:	movb %al,(%_ASM_CX)
 	xor %ecx,%ecx
 EXPORT_SYMBOL(__put_user_2)
 SYM_FUNC_START(__put_user_nocheck_2)
-	ENDBR
 	ASM_STAC
 4:	movw %ax,(%_ASM_CX)
 	xor %ecx,%ecx
 EXPORT_SYMBOL(__put_user_4)
 SYM_FUNC_START(__put_user_nocheck_4)
-	ENDBR
 	ASM_STAC
 6:	movl %eax,(%_ASM_CX)
 	xor %ecx,%ecx
 EXPORT_SYMBOL(__put_user_8)
 SYM_FUNC_START(__put_user_nocheck_8)
-	ENDBR
 	ASM_STAC
 9:	mov %_ASM_AX,(%_ASM_CX)
 #ifdef CONFIG_X86_32

arch/x86/platform/efi/efi_32.c+12−0

@@ -140,3 +140,15 @@ void __init efi_runtime_update_mappings(void) · 139 unmodified lines
140	}	140	}
141	}	141	}
142	}	142	}
		143
		144	void arch_efi_call_virt_setup(void)
		145	{
		146	efi_fpu_begin();
		147	firmware_restrict_branch_speculation_start();
		148	}
		149
		150	void arch_efi_call_virt_teardown(void)
		151	{
		152	firmware_restrict_branch_speculation_end();
		153	efi_fpu_end();
		154	}

arch/x86/platform/efi/efi_64.c+17−2

  * can not change under us.
  * It should be ensured that there are no concurrent calls to this function.
  */
-void efi_enter_mm(void)
+static void efi_enter_mm(void)
 {
 	efi_prev_mm = current->active_mm;
 	current->active_mm = &efi_mm;
 	switch_mm(efi_prev_mm, &efi_mm, NULL);
 }
-void efi_leave_mm(void)
+static void efi_leave_mm(void)
 {
 	current->active_mm = efi_prev_mm;
 	switch_mm(&efi_mm, efi_prev_mm, NULL);
 }
+void arch_efi_call_virt_setup(void)
+{
+	efi_sync_low_kernel_mappings();
+	efi_fpu_begin();
+	firmware_restrict_branch_speculation_start();
+	efi_enter_mm();
+}
+void arch_efi_call_virt_teardown(void)
+{
+	efi_leave_mm();
+	firmware_restrict_branch_speculation_end();
+	efi_fpu_end();
+}
 static DEFINE_SPINLOCK(efi_runtime_lock);
 /*

arch/x86/purgatory/Makefile+4−0

 # optimization flags.
 KBUILD_CFLAGS := $(filter-out -fprofile-sample-use=% -fprofile-use=%,$(KBUILD_CFLAGS))
+# When LTO is enabled, llvm emits many text sections, which is not supported
+# by kexec. Remove -flto=* flags.
+KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_LTO),$(KBUILD_CFLAGS))
 # When linking purgatory.ro with -r unresolved symbols are not checked,
 # also link a purgatory.chk binary without -r to check for unresolved symbols.
 PURGATORY_LDFLAGS := -e purgatory_start -z nodefaultlib

arch/x86/xen/efi.c+1−1

@@ -138,7 +138,7 @@ void __init xen_efi_init(struct boot_params *boot_params) · 137 unmodified lines
138	if (efi_systab_xen == NULL)	138	if (efi_systab_xen == NULL)
139	return;	139	return;
140		140
141	strncpy((char *)&boot_params->efi_info.efi_loader_signature, "Xen",	141	strscpy((char *)&boot_params->efi_info.efi_loader_signature, "Xen",
142	sizeof(boot_params->efi_info.efi_loader_signature));	142	sizeof(boot_params->efi_info.efi_loader_signature));
143	boot_params->efi_info.efi_systab = (__u32)__pa(efi_systab_xen);	143	boot_params->efi_info.efi_systab = (__u32)__pa(efi_systab_xen);
144	boot_params->efi_info.efi_systab_hi = (__u32)(__pa(efi_systab_xen) >> 32);	144	boot_params->efi_info.efi_systab_hi = (__u32)(__pa(efi_systab_xen) >> 32);

arch/x86/xen/enlighten.c+1−1

@@ -32,7 +32,7 @@ EXPORT_SYMBOL_GPL(hypercall_page); · 31 unmodified lines
32	* &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info	32	* &HYPERVISOR_shared_info->vcpu_info[cpu]. See xen_hvm_init_shared_info
33	* and xen_vcpu_setup for details. By default it points to share_info->vcpu_info	33	* and xen_vcpu_setup for details. By default it points to share_info->vcpu_info
34	* but during boot it is switched to point to xen_vcpu_info.	34	* but during boot it is switched to point to xen_vcpu_info.
35	* The pointer is used in __xen_evtchn_do_upcall to acknowledge pending events.	35	* The pointer is used in xen_evtchn_do_upcall to acknowledge pending events.
36	*/	36	*/
37	DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);	37	DEFINE_PER_CPU(struct vcpu_info *, xen_vcpu);
38	DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);	38	DEFINE_PER_CPU(struct vcpu_info, xen_vcpu_info);

arch/x86/xen/enlighten_hvm.c+1−1

@@ -136,7 +136,7 @@ DEFINE_IDTENTRY_SYSVEC(sysvec_xen_hvm_callback) · 135 unmodified lines
136		136
137	inc_irq_stat(irq_hv_callback_count);	137	inc_irq_stat(irq_hv_callback_count);
138		138
139	xen_hvm_evtchn_do_upcall();	139	xen_evtchn_do_upcall();
140		140
141	set_irq_regs(old_regs);	141	set_irq_regs(old_regs);
142	}	142	}

arch/x86/xen/enlighten_pv.c+33−7

 	struct desc_struct desc[3];
 };
+DEFINE_PER_CPU(enum xen_lazy_mode, xen_lazy_mode) = XEN_LAZY_NONE;
+DEFINE_PER_CPU(unsigned int, xen_lazy_nesting);
+enum xen_lazy_mode xen_get_lazy_mode(void)
+{
+	if (in_interrupt())
+		return XEN_LAZY_NONE;
+	return this_cpu_read(xen_lazy_mode);
+}
 /*
  * Updating the 3 TLS descriptors in the GDT on every task switch is
  * surprisingly expensive so we avoid updating them if they haven't
 	return HYPERVISOR_get_debugreg(reg);
 }
+static void xen_start_context_switch(struct task_struct *prev)
+{
+	BUG_ON(preemptible());
+	if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) {
+		arch_leave_lazy_mmu_mode();
+		set_ti_thread_flag(task_thread_info(prev), TIF_LAZY_MMU_UPDATES);
+	}
+	enter_lazy(XEN_LAZY_CPU);
+}
 static void xen_end_context_switch(struct task_struct *next)
 {
+	BUG_ON(preemptible());
 	xen_mc_flush();
-	paravirt_end_context_switch(next);
+	leave_lazy(XEN_LAZY_CPU);
+	if (test_and_clear_ti_thread_flag(task_thread_info(next), TIF_LAZY_MMU_UPDATES))
+		arch_enter_lazy_mmu_mode();
 }
 static unsigned long xen_store_tr(void)
 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
-	xen_mc_issue(PARAVIRT_LAZY_CPU);
+	xen_mc_issue(XEN_LAZY_CPU);
 }
 static void xen_load_gdt(const struct desc_ptr *dtr)
 	 * exception between the new %fs descriptor being loaded and
 	 * %fs being effectively cleared at __switch_to().
 	 */
-	if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU)
+	if (xen_get_lazy_mode() == XEN_LAZY_CPU)
 		loadsegment(fs, 0);
 	xen_mc_batch();
 	load_TLS_descriptor(t, cpu, 1);
 	load_TLS_descriptor(t, cpu, 2);
-	xen_mc_issue(PARAVIRT_LAZY_CPU);
+	xen_mc_issue(XEN_LAZY_CPU);
 }
 static void xen_load_gs_index(unsigned int idx)
 	mcs = xen_mc_entry(0);
 	MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
-	xen_mc_issue(PARAVIRT_LAZY_CPU);
+	xen_mc_issue(XEN_LAZY_CPU);
 	this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
 }
 	MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
-	xen_mc_issue(PARAVIRT_LAZY_CPU);
+	xen_mc_issue(XEN_LAZY_CPU);
 }
 static void xen_write_cr4(unsigned long cr4)
 #endif
 		.io_delay = xen_io_delay,
-		.start_context_switch = paravirt_start_context_switch,
+		.start_context_switch = xen_start_context_switch,
 		.end_context_switch = xen_end_context_switch,
 	},
 };

arch/x86/xen/mmu_pv.c+36−19

 	u.val = pmd_val_ma(val);
 	xen_extend_mmu_update(&u);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 	preempt_enable();
 }
 {
 	struct mmu_update u;
-	if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
+	if (xen_get_lazy_mode() != XEN_LAZY_MMU)
 		return false;
 	xen_mc_batch();
 	u.val = pte_val_ma(pteval);
 	xen_extend_mmu_update(&u);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 	return true;
 }
 	u.val = pte_val_ma(pte);
 	xen_extend_mmu_update(&u);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 }
 /* Assume pteval_t is equivalent to all the other *val_t types. */
 	u.val = pud_val_ma(val);
 	xen_extend_mmu_update(&u);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 	preempt_enable();
 }
 	__xen_set_p4d_hyper(ptr, val);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 	preempt_enable();
 }
 	if (user_ptr)
 		__xen_set_p4d_hyper((p4d_t *)user_ptr, val);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 }
 #if CONFIG_PGTABLE_LEVELS >= 5
 	op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 	preempt_enable();
 }
 	op->arg1.linear_addr = addr & PAGE_MASK;
 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 	preempt_enable();
 }
 	MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 }
 static unsigned long xen_read_cr3(void)
 	else
 		__xen_write_cr3(false, 0);
-	xen_mc_issue(PARAVIRT_LAZY_CPU);  /* interrupts restored */
+	xen_mc_issue(XEN_LAZY_CPU);  /* interrupts restored */
 }
 /*
 	__xen_write_cr3(true, cr3);
-	xen_mc_issue(PARAVIRT_LAZY_CPU);  /* interrupts restored */
+	xen_mc_issue(XEN_LAZY_CPU);  /* interrupts restored */
 }
 static int xen_pgd_alloc(struct mm_struct *mm)
 		if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS && !pinned)
 			__pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
-		xen_mc_issue(PARAVIRT_LAZY_MMU);
+		xen_mc_issue(XEN_LAZY_MMU);
 	}
 }
 		__set_pfn_prot(pfn, PAGE_KERNEL);
-		xen_mc_issue(PARAVIRT_LAZY_MMU);
+		xen_mc_issue(XEN_LAZY_MMU);
 		ClearPagePinned(page);
 	}
 	 */
 	xen_mc_batch();
 	__xen_write_cr3(true, __pa(init_top_pgt));
-	xen_mc_issue(PARAVIRT_LAZY_CPU);
+	xen_mc_issue(XEN_LAZY_CPU);
 	/* We can't that easily rip out L3 and L2, as the Xen pagetables are
 	 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ...  for
 #endif
 }
+static void xen_enter_lazy_mmu(void)
+{
+	enter_lazy(XEN_LAZY_MMU);
+}
+static void xen_flush_lazy_mmu(void)
+{
+	preempt_disable();
+	if (xen_get_lazy_mode() == XEN_LAZY_MMU) {
+		arch_leave_lazy_mmu_mode();
+		arch_enter_lazy_mmu_mode();
+	}
+	preempt_enable();
+}
 static void __init xen_post_allocator_init(void)
 {
 	pv_ops.mmu.set_pte = xen_set_pte;
 {
 	preempt_disable();
 	xen_mc_flush();
-	paravirt_leave_lazy_mmu();
+	leave_lazy(XEN_LAZY_MMU);
 	preempt_enable();
 }
 		.exit_mmap = xen_exit_mmap,
 		.lazy_mode = {
-			.enter = paravirt_enter_lazy_mmu,
+			.enter = xen_enter_lazy_mmu,
 			.leave = xen_leave_lazy_mmu,
-			.flush = paravirt_flush_lazy_mmu,
+			.flush = xen_flush_lazy_mmu,
 		},
 		.set_fixmap = xen_set_fixmap,
 	op->cmd = MMUEXT_TLB_FLUSH_ALL;
 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
-	xen_mc_issue(PARAVIRT_LAZY_MMU);
+	xen_mc_issue(XEN_LAZY_MMU);
 	preempt_enable();
 }

arch/x86/xen/multicalls.h+2−2

@@ -26,7 +26,7 @@ static inline void xen_mc_batch(void) · 25 unmodified lines
26		26
27	/* need to disable interrupts until this entry is complete */	27	/* need to disable interrupts until this entry is complete */
28	local_irq_save(flags);	28	local_irq_save(flags);
29	trace_xen_mc_batch(paravirt_get_lazy_mode());	29	trace_xen_mc_batch(xen_get_lazy_mode());
30	__this_cpu_write(xen_mc_irq_flags, flags);	30	__this_cpu_write(xen_mc_irq_flags, flags);
31	}	31	}
32		32
@@ -44,7 +44,7 @@ static inline void xen_mc_issue(unsigned mode) · 11 unmodified lines
44	{	44	{
45	trace_xen_mc_issue(mode);	45	trace_xen_mc_issue(mode);
46		46
47	if ((paravirt_get_lazy_mode() & mode) == 0)	47	if ((xen_get_lazy_mode() & mode) == 0)
48	xen_mc_flush();	48	xen_mc_flush();
49		49
50	/* restore flags saved in xen_mc_batch */	50	/* restore flags saved in xen_mc_batch */

arch/xtensa/boot/Makefile+1−2

@@ -9,8 +9,7 @@ · 8 unmodified lines
9		9
10		10
11	# KBUILD_CFLAGS used when building rest of boot (takes effect recursively)	11	# KBUILD_CFLAGS used when building rest of boot (takes effect recursively)
12	KBUILD_CFLAGS += -fno-builtin -Iarch/$(ARCH)/boot/include	12	KBUILD_CFLAGS += -fno-builtin
13	HOSTFLAGS += -Iarch/$(ARCH)/boot/include
14		13
15	subdir-y := lib	14	subdir-y := lib
16	targets += vmlinux.bin vmlinux.bin.gz	15	targets += vmlinux.bin vmlinux.bin.gz

arch/xtensa/boot/lib/zmem.c+3−2

 /* bits taken from ppc */
 extern void *avail_ram, *end_avail;
+void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp);
-void exit (void)
+static void exit(void)
 {
   for (;;);
 }
-void *zalloc(unsigned size)
+static void *zalloc(unsigned int size)
 {
         void *p = avail_ram;

arch/xtensa/include/asm/core.h+4−0

@@ -6,6 +6,10 @@ · 5 unmodified lines
6		6
7	#include <variant/core.h>	7	#include <variant/core.h>
8		8
		9	#ifndef XCHAL_HAVE_DIV32
		10	#define XCHAL_HAVE_DIV32 0
		11	#endif
		12
9	#ifndef XCHAL_HAVE_EXCLUSIVE	13	#ifndef XCHAL_HAVE_EXCLUSIVE
10	#define XCHAL_HAVE_EXCLUSIVE 0	14	#define XCHAL_HAVE_EXCLUSIVE 0
11	#endif	15	#endif

arch/xtensa/include/asm/hw_breakpoint.h+1−0

@@ -48,6 +48,7 @@ void arch_uninstall_hw_breakpoint(struct perf_event *bp); · 47 unmodified lines
48	void hw_breakpoint_pmu_read(struct perf_event *bp);	48	void hw_breakpoint_pmu_read(struct perf_event *bp);
49	int check_hw_breakpoint(struct pt_regs *regs);	49	int check_hw_breakpoint(struct pt_regs *regs);
50	void clear_ptrace_hw_breakpoint(struct task_struct *tsk);	50	void clear_ptrace_hw_breakpoint(struct task_struct *tsk);
		51	void restore_dbreak(void);
51		52
52	#else	53	#else
53		54

arch/xtensa/include/asm/processor.h+5−0

 #include <linux/compiler.h>
 #include <linux/stringify.h>
+#include <asm/bootparam.h>
 #include <asm/ptrace.h>
 #include <asm/types.h>
 #include <asm/regs.h>
 extern unsigned long __get_wchan(struct task_struct *p);
+void init_arch(bp_tag_t *bp_start);
+void do_notify_resume(struct pt_regs *regs);
 #define KSTK_EIP(tsk)		(task_pt_regs(tsk)->pc)
 #define KSTK_ESP(tsk)		(task_pt_regs(tsk)->areg[1])

arch/xtensa/include/asm/ptrace.h+3−0

@@ -106,6 +106,9 @@ static inline unsigned long regs_return_value(struct pt_regs *regs) · 105 unmodified lines
106	return regs->areg[2];	106	return regs->areg[2];
107	}	107	}
108		108
		109	int do_syscall_trace_enter(struct pt_regs *regs);
		110	void do_syscall_trace_leave(struct pt_regs *regs);
		111
109	#else /* __ASSEMBLY__ */	112	#else /* __ASSEMBLY__ */
110		113
111	# include <asm/asm-offsets.h>	114	# include <asm/asm-offsets.h>

arch/xtensa/include/asm/smp.h+1−0

@@ -23,6 +23,7 @@ struct cpumask; · 22 unmodified lines
23	void arch_send_call_function_ipi_mask(const struct cpumask *mask);	23	void arch_send_call_function_ipi_mask(const struct cpumask *mask);
24	void arch_send_call_function_single_ipi(int cpu);	24	void arch_send_call_function_single_ipi(int cpu);
25		25
		26	void secondary_start_kernel(void);
26	void smp_init_cpus(void);	27	void smp_init_cpus(void);
27	void secondary_init_irq(void);	28	void secondary_init_irq(void);
28	void ipi_init(void);	29	void ipi_init(void);

arch/xtensa/include/asm/tlb.h+2−0

@@ -18,4 +18,6 @@ · 17 unmodified lines
18		18
19	#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, pte)	19	#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, pte)
20		20
		21	void check_tlb_sanity(void);
		22
21	#endif /* _XTENSA_TLB_H */	23	#endif /* _XTENSA_TLB_H */

arch/xtensa/kernel/hw_breakpoint.c+1−0

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	#include <linux/percpu.h>	13	#include <linux/percpu.h>
14	#include <linux/perf_event.h>	14	#include <linux/perf_event.h>
15	#include <asm/core.h>	15	#include <asm/core.h>
		16	#include <asm/hw_breakpoint.h>
16		17
17	/* Breakpoint currently in use for each IBREAKA. */	18	/* Breakpoint currently in use for each IBREAKA. */
18	static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[XCHAL_NUM_IBREAK]);	19	static DEFINE_PER_CPU(struct perf_event *, bp_on_reg[XCHAL_NUM_IBREAK]);

arch/xtensa/kernel/irq.c+1−0

@@ -28,6 +28,7 @@ · 27 unmodified lines
28	#include <asm/mxregs.h>	28	#include <asm/mxregs.h>
29	#include <linux/uaccess.h>	29	#include <linux/uaccess.h>
30	#include <asm/platform.h>	30	#include <asm/platform.h>
		31	#include <asm/traps.h>
31		32
32	DECLARE_PER_CPU(unsigned long, nmi_count);	33	DECLARE_PER_CPU(unsigned long, nmi_count);
33		34

arch/xtensa/kernel/ptrace.c+0−1

@@ -541,7 +541,6 @@ long arch_ptrace(struct task_struct *child, long request, · 540 unmodified lines
541	return ret;	541	return ret;
542	}	542	}
543		543
544	void do_syscall_trace_leave(struct pt_regs *regs);
545	int do_syscall_trace_enter(struct pt_regs *regs)	544	int do_syscall_trace_enter(struct pt_regs *regs)
546	{	545	{
547	if (regs->syscall == NO_SYSCALL)	546	if (regs->syscall == NO_SYSCALL)

arch/xtensa/kernel/signal.c+2−0

@@ -26,6 +26,8 @@ · 25 unmodified lines
26	#include <linux/uaccess.h>	26	#include <linux/uaccess.h>
27	#include <asm/cacheflush.h>	27	#include <asm/cacheflush.h>
28	#include <asm/coprocessor.h>	28	#include <asm/coprocessor.h>
		29	#include <asm/processor.h>
		30	#include <asm/syscall.h>
29	#include <asm/unistd.h>	31	#include <asm/unistd.h>
30		32
31	extern struct task_struct *coproc_owners[];	33	extern struct task_struct *coproc_owners[];

arch/xtensa/kernel/smp.c+1−0

@@ -21,6 +21,7 @@ · 20 unmodified lines
21	#include <linux/irq.h>	21	#include <linux/irq.h>
22	#include <linux/kdebug.h>	22	#include <linux/kdebug.h>
23	#include <linux/module.h>	23	#include <linux/module.h>
		24	#include <linux/profile.h>
24	#include <linux/sched/mm.h>	25	#include <linux/sched/mm.h>
25	#include <linux/sched/hotplug.h>	26	#include <linux/sched/hotplug.h>
26	#include <linux/sched/task_stack.h>	27	#include <linux/sched/task_stack.h>

arch/xtensa/kernel/stacktrace.c+1−0

@@ -12,6 +12,7 @@ · 11 unmodified lines
12	#include <linux/sched.h>	12	#include <linux/sched.h>
13	#include <linux/stacktrace.h>	13	#include <linux/stacktrace.h>
14		14
		15	#include <asm/ftrace.h>
15	#include <asm/stacktrace.h>	16	#include <asm/stacktrace.h>
16	#include <asm/traps.h>	17	#include <asm/traps.h>
17	#include <linux/uaccess.h>	18	#include <linux/uaccess.h>

arch/xtensa/kernel/traps.c+1−0

@@ -23,6 +23,7 @@ · 22 unmodified lines
23	* for more details.	23	* for more details.
24	*/	24	*/
25		25
		26	#include <linux/cpu.h>
26	#include <linux/kernel.h>	27	#include <linux/kernel.h>
27	#include <linux/sched/signal.h>	28	#include <linux/sched/signal.h>
28	#include <linux/sched/debug.h>	29	#include <linux/sched/debug.h>

arch/xtensa/lib/umulsidi3.S+3−1

@@ -3,7 +3,9 @@ · 2 unmodified lines
3	#include <asm/asmmacro.h>	3	#include <asm/asmmacro.h>
4	#include <asm/core.h>	4	#include <asm/core.h>
5		5
6	#if !XCHAL_HAVE_MUL16 && !XCHAL_HAVE_MUL32 && !XCHAL_HAVE_MAC16	6	#if XCHAL_HAVE_MUL16 \|\| XCHAL_HAVE_MUL32 \|\| XCHAL_HAVE_MAC16
		7	#define XCHAL_NO_MUL 0
		8	#else
7	#define XCHAL_NO_MUL 1	9	#define XCHAL_NO_MUL 1
8	#endif	10	#endif
9		11

arch/xtensa/mm/fault.c+1−0

@@ -20,6 +20,7 @@ · 19 unmodified lines
20	#include <asm/mmu_context.h>	20	#include <asm/mmu_context.h>
21	#include <asm/cacheflush.h>	21	#include <asm/cacheflush.h>
22	#include <asm/hardirq.h>	22	#include <asm/hardirq.h>
		23	#include <asm/traps.h>
23		24
24	void bad_page_fault(struct pt_regs*, unsigned long, int);	25	void bad_page_fault(struct pt_regs*, unsigned long, int);
25		26

arch/xtensa/mm/tlb.c+1−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	#include <linux/mm.h>	17	#include <linux/mm.h>
18	#include <asm/processor.h>	18	#include <asm/processor.h>
19	#include <asm/mmu_context.h>	19	#include <asm/mmu_context.h>
		20	#include <asm/tlb.h>
20	#include <asm/tlbflush.h>	21	#include <asm/tlbflush.h>
21	#include <asm/cacheflush.h>	22	#include <asm/cacheflush.h>
22		23

arch/xtensa/platforms/iss/network.c+2−2

@@ -201,7 +201,7 @@ static int tuntap_write(struct iss_net_private lp, struct sk_buff *skb) · 200 unmodified lines
201	return simc_write(lp->tp.info.tuntap.fd, (skb)->data, (skb)->len);	201	return simc_write(lp->tp.info.tuntap.fd, (skb)->data, (skb)->len);
202	}	202	}
203		203
204	unsigned short tuntap_protocol(struct sk_buff *skb)	204	static unsigned short tuntap_protocol(struct sk_buff *skb)
205	{	205	{
206	return eth_type_trans(skb, skb->dev);	206	return eth_type_trans(skb, skb->dev);
207	}	207	}
@@ -441,7 +441,7 @@ static int iss_net_change_mtu(struct net_device *dev, int new_mtu) · 233 unmodified lines
441	return -EINVAL;	441	return -EINVAL;
442	}	442	}
443		443
444	void iss_net_user_timer_expire(struct timer_list *unused)	444	static void iss_net_user_timer_expire(struct timer_list *unused)
445	{	445	{
446	}	446	}
447		447

block/blk-mq.c+7−6

 	struct blk_mq_tags **new_tags;
 	int i;
-	if (set->nr_hw_queues >= new_nr_hw_queues) {
+	if (set->nr_hw_queues >= new_nr_hw_queues)
-		for (i = new_nr_hw_queues; i < set->nr_hw_queues; i++)
-			__blk_mq_free_map_and_rqs(set, i);
 		goto done;
-	}
 	new_tags = kcalloc_node(new_nr_hw_queues, sizeof(struct blk_mq_tags *),
 				GFP_KERNEL, set->numa_node);
 {
 	struct request_queue *q;
 	LIST_HEAD(head);
-	int prev_nr_hw_queues;
+	int prev_nr_hw_queues = set->nr_hw_queues;
+	int i;
 	lockdep_assert_held(&set->tag_list_lock);
 		blk_mq_sysfs_unregister_hctxs(q);
 	}
-	prev_nr_hw_queues = set->nr_hw_queues;
 	if (blk_mq_realloc_tag_set_tags(set, nr_hw_queues) < 0)
 		goto reregister;
 	list_for_each_entry(q, &set->tag_list, tag_set_list)
 		blk_mq_unfreeze_queue(q);
+	/* Free the excess tags when nr_hw_queues shrink. */
+	for (i = set->nr_hw_queues; i < prev_nr_hw_queues; i++)
+		__blk_mq_free_map_and_rqs(set, i);
 }
 void blk_mq_update_nr_hw_queues(struct blk_mq_tag_set *set, int nr_hw_queues)

block/blk-rq-qos.c+1−1

@@ -270,7 +270,7 @@ void rq_qos_wait(struct rq_wait rqw, void private_data, · 269 unmodified lines
270	finish_wait(&rqw->wait, &data.wq);	270	finish_wait(&rqw->wait, &data.wq);
271		271
272	/*	272	/*
273	* We raced with wbt_wake_function() getting a token,	273	* We raced with rq_qos_wake_function() getting a token,
274	* which means we now have two. Put our local token	274	* which means we now have two. Put our local token
275	* and wake anyone else potentially waiting for one.	275	* and wake anyone else potentially waiting for one.
276	*/	276	*/

block/disk-events.c+0−1

@@ -290,7 +290,6 @@ EXPORT_SYMBOL(disk_check_media_change); · 289 unmodified lines
290	/**	290	/**
291	* disk_force_media_change - force a media change event	291	* disk_force_media_change - force a media change event
292	* @disk: the disk which will raise the event	292	* @disk: the disk which will raise the event
293	* @events: the events to raise
294	*	293	*
295	* Should be called when the media changes for @disk. Generates a uevent	294	* Should be called when the media changes for @disk. Generates a uevent
296	* and attempts to free all dentries and inodes and invalidates all block	295	* and attempts to free all dentries and inodes and invalidates all block

crypto/sm2.c+5−1

 	if (!ec)
 		return -ENOMEM;
-	err = __sm2_set_pub_key(ec, key, keylen);
+	err = sm2_ec_ctx_init(ec);
 	if (err)
 		goto out_free_ec;
+	err = __sm2_set_pub_key(ec, key, keylen);
+	if (err)
+		goto out_deinit_ec;
 	bits_len = SM2_DEFAULT_USERID_LEN * 8;
 	entl[0] = bits_len >> 8;
 	entl[1] = bits_len & 0xff;

drivers/Makefile+1−1

@@ -46,7 +46,7 @@ obj-$(CONFIG_DMADEVICES) += dma/ · 45 unmodified lines
46		46
47	# SOC specific infrastructure drivers.	47	# SOC specific infrastructure drivers.
48	obj-y += soc/	48	obj-y += soc/
49	obj-$(CONFIG_PM_GENERIC_DOMAINS) += genpd/	49	obj-$(CONFIG_PM_GENERIC_DOMAINS) += pmdomain/
50		50
51	obj-y += virtio/	51	obj-y += virtio/
52	obj-$(CONFIG_VDPA) += vdpa/	52	obj-$(CONFIG_VDPA) += vdpa/

drivers/accel/ivpu/ivpu_drv.c+2−1

 	}
 	if (!ret)
-		ivpu_info(vdev, "VPU ready message received successfully\n");
+		ivpu_dbg(vdev, PM, "VPU ready message received successfully\n");
 	else
 		ivpu_hw_diagnose_failure(vdev);
 static struct pci_device_id ivpu_pci_ids[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_MTL) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_ARL) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_LNL) },
 	{ }
 };

drivers/accel/ivpu/ivpu_drv.h+2−0

 #define DRIVER_DATE "20230117"
 #define PCI_DEVICE_ID_MTL   0x7d1d
+#define PCI_DEVICE_ID_ARL   0xad1d
 #define PCI_DEVICE_ID_LNL   0x643e
 #define IVPU_HW_37XX	37
 {
 	switch (ivpu_device_id(vdev)) {
 	case PCI_DEVICE_ID_MTL:
+	case PCI_DEVICE_ID_ARL:
 		return IVPU_HW_37XX;
 	case PCI_DEVICE_ID_LNL:
 		return IVPU_HW_40XX;

drivers/accel/ivpu/ivpu_fw.c+5−3

 	if (ret)
 		return ret;
-	fw->mem = ivpu_bo_alloc_internal(vdev, fw->runtime_addr, fw->runtime_size, DRM_IVPU_BO_WC);
+	fw->mem = ivpu_bo_alloc_internal(vdev, fw->runtime_addr, fw->runtime_size,
+					 DRM_IVPU_BO_CACHED | DRM_IVPU_BO_NOSNOOP);
 	if (!fw->mem) {
 		ivpu_err(vdev, "Failed to allocate firmware runtime memory\n");
 		return -ENOMEM;
 		memset(start, 0, size);
 	}
-	wmb(); /* Flush WC buffers after writing fw->mem */
+	clflush_cache_range(fw->mem->kvaddr, fw->mem->base.size);
 	return 0;
 }
 	if (!ivpu_fw_is_cold_boot(vdev)) {
 		boot_params->save_restore_ret_address = 0;
 		vdev->pm->is_warmboot = true;
+		clflush_cache_range(vdev->fw->mem->kvaddr, SZ_4K);
 		return;
 	}
 	boot_params->punit_telemetry_sram_size = ivpu_hw_reg_telemetry_size_get(vdev);
 	boot_params->vpu_telemetry_enable = ivpu_hw_reg_telemetry_enable_get(vdev);
-	wmb(); /* Flush WC buffers after writing bootparams */
+	clflush_cache_range(vdev->fw->mem->kvaddr, SZ_4K);
 	ivpu_fw_boot_params_print(vdev, boot_params);
 }

drivers/accel/ivpu/ivpu_gem.h+5−0

 #include <drm/drm_gem.h>
 #include <drm/drm_mm.h>
+#define DRM_IVPU_BO_NOSNOOP       0x10000000
 struct dma_buf;
 struct ivpu_bo_ops;
 struct ivpu_file_priv;
 static inline bool ivpu_bo_is_snooped(struct ivpu_bo *bo)
 {
+	if (bo->flags & DRM_IVPU_BO_NOSNOOP)
+		return false;
 	return ivpu_bo_cache_mode(bo) == DRM_IVPU_BO_CACHED;
 }

drivers/accel/ivpu/ivpu_hw_40xx.c+23−4

 #define ICB_0_1_IRQ_MASK ((((u64)ICB_1_IRQ_MASK) << 32) | ICB_0_IRQ_MASK)
-#define BUTTRESS_IRQ_MASK ((REG_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE)) | \
+#define BUTTRESS_IRQ_MASK ((REG_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR)) | \
-			   (REG_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR)) | \
 			   (REG_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, CFI0_ERR)) | \
 			   (REG_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, CFI1_ERR)) | \
 			   (REG_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, IMR0_ERR)) | \
 	return REGB_POLL_FLD(VPU_40XX_BUTTRESS_VPU_STATUS, READY, 1, PLL_TIMEOUT_US);
 }
+static int ivpu_wait_for_clock_own_resource_ack(struct ivpu_device *vdev)
+{
+	if (ivpu_is_simics(vdev))
+		return 0;
+	return REGB_POLL_FLD(VPU_40XX_BUTTRESS_VPU_STATUS, CLOCK_RESOURCE_OWN_ACK, 1, TIMEOUT_US);
+}
 static void ivpu_pll_init_frequency_ratios(struct ivpu_device *vdev)
 {
 	struct ivpu_hw_info *hw = vdev->hw;
 {
 	int ret;
+	ret = ivpu_wait_for_clock_own_resource_ack(vdev);
+	if (ret) {
+		ivpu_err(vdev, "Timed out waiting for clock own resource ACK\n");
+		return ret;
+	}
 	ivpu_boot_pwr_island_trickle_drive(vdev, true);
 	ivpu_boot_pwr_island_drive(vdev, true);
 	if (status == 0)
 		return IRQ_NONE;
-	REGB_WR32(VPU_40XX_BUTTRESS_INTERRUPT_STAT, status);
 	if (REG_TEST_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE, status))
 		ivpu_dbg(vdev, IRQ, "FREQ_CHANGE");
 		schedule_recovery = true;
 	}
+	/* This must be done after interrupts are cleared at the source. */
+	REGB_WR32(VPU_40XX_BUTTRESS_INTERRUPT_STAT, status);
 	if (schedule_recovery)
 		ivpu_pm_schedule_recovery(vdev);
 	struct ivpu_device *vdev = ptr;
 	irqreturn_t ret = IRQ_NONE;
+	REGB_WR32(VPU_40XX_BUTTRESS_GLOBAL_INT_MASK, 0x1);
 	ret |= ivpu_hw_40xx_irqv_handler(vdev, irq);
 	ret |= ivpu_hw_40xx_irqb_handler(vdev, irq);
+	/* Re-enable global interrupts to re-trigger MSI for pending interrupts */
+	REGB_WR32(VPU_40XX_BUTTRESS_GLOBAL_INT_MASK, 0x0);
 	if (ret & IRQ_WAKE_THREAD)
 		return IRQ_WAKE_THREAD;

drivers/accel/ivpu/ivpu_hw_40xx_reg.h+2−0

@@ -70,6 +70,8 @@ · 69 unmodified lines
70	#define VPU_40XX_BUTTRESS_VPU_STATUS_READY_MASK BIT_MASK(0)	70	#define VPU_40XX_BUTTRESS_VPU_STATUS_READY_MASK BIT_MASK(0)
71	#define VPU_40XX_BUTTRESS_VPU_STATUS_IDLE_MASK BIT_MASK(1)	71	#define VPU_40XX_BUTTRESS_VPU_STATUS_IDLE_MASK BIT_MASK(1)
72	#define VPU_40XX_BUTTRESS_VPU_STATUS_DUP_IDLE_MASK BIT_MASK(2)	72	#define VPU_40XX_BUTTRESS_VPU_STATUS_DUP_IDLE_MASK BIT_MASK(2)
		73	#define VPU_40XX_BUTTRESS_VPU_STATUS_CLOCK_RESOURCE_OWN_ACK_MASK BIT_MASK(6)
		74	#define VPU_40XX_BUTTRESS_VPU_STATUS_POWER_RESOURCE_OWN_ACK_MASK BIT_MASK(7)
73	#define VPU_40XX_BUTTRESS_VPU_STATUS_PERF_CLK_MASK BIT_MASK(11)	75	#define VPU_40XX_BUTTRESS_VPU_STATUS_PERF_CLK_MASK BIT_MASK(11)
74	#define VPU_40XX_BUTTRESS_VPU_STATUS_DISABLE_CLK_RELINQUISH_MASK BIT_MASK(12)	76	#define VPU_40XX_BUTTRESS_VPU_STATUS_DISABLE_CLK_RELINQUISH_MASK BIT_MASK(12)
75		77

drivers/accel/ivpu/ivpu_ipc.c+4−7

 	struct ivpu_ipc_rx_msg *rx_msg;
 	int wait_ret, ret = 0;
-	wait_ret = wait_event_interruptible_timeout(cons->rx_msg_wq,
+	wait_ret = wait_event_timeout(cons->rx_msg_wq,
-						    (IS_KTHREAD() && kthread_should_stop()) ||
+				      (IS_KTHREAD() && kthread_should_stop()) ||
-						    !list_empty(&cons->rx_msg_list),
+				      !list_empty(&cons->rx_msg_list),
-						    msecs_to_jiffies(timeout_ms));
+				      msecs_to_jiffies(timeout_ms));
 	if (IS_KTHREAD() && kthread_should_stop())
 		return -EINTR;
 	if (wait_ret == 0)
 		return -ETIMEDOUT;
-	if (wait_ret < 0)
-		return -ERESTARTSYS;
 	spin_lock_irq(&cons->rx_msg_lock);
 	rx_msg = list_first_entry_or_null(&cons->rx_msg_list, struct ivpu_ipc_rx_msg, link);
 	if (!rx_msg) {

drivers/acpi/acpi_video.c+5−2

 	    !auto_detect)
 		acpi_video_bus_register_backlight(video);
-	acpi_video_bus_add_notify_handler(video);
+	error = acpi_video_bus_add_notify_handler(video);
+	if (error)
+		goto err_del;
 	error = acpi_dev_install_notify_handler(device, ACPI_DEVICE_NOTIFY,
 						acpi_video_bus_notify);
 	return 0;
 err_remove:
+	acpi_video_bus_remove_notify_handler(video);
+err_del:
 	mutex_lock(&video_list_lock);
 	list_del(&video->entry);
 	mutex_unlock(&video_list_lock);
-	acpi_video_bus_remove_notify_handler(video);
 	acpi_video_bus_unregister_backlight(video);
 err_put_video:
 	acpi_video_bus_put_devices(video);

drivers/acpi/processor_pdc.c+1−0

@@ -19,6 +19,7 @@ static void acpi_set_pdc_bits(u32 *buf) · 18 unmodified lines
19	{	19	{
20	buf[0] = ACPI_PDC_REVISION_ID;	20	buf[0] = ACPI_PDC_REVISION_ID;
21	buf[1] = 1;	21	buf[1] = 1;
		22	buf[2] = 0;
22		23
23	/* Twiddle arch-specific bits needed for _PDC */	24	/* Twiddle arch-specific bits needed for _PDC */
24	arch_acpi_set_proc_cap_bits(&buf[2]);	25	arch_acpi_set_proc_cap_bits(&buf[2]);

drivers/acpi/thermal.c+1−1

@@ -492,7 +492,7 @@ static int thermal_get_temp(struct thermal_zone_device thermal, int temp) · 491 unmodified lines
492	}	492	}
493		493
494	static int thermal_get_trend(struct thermal_zone_device *thermal,	494	static int thermal_get_trend(struct thermal_zone_device *thermal,
495	struct thermal_trip *trip,	495	const struct thermal_trip *trip,
496	enum thermal_trend *trend)	496	enum thermal_trend *trend)
497	{	497	{
498	struct acpi_thermal *tz = thermal_zone_device_priv(thermal);	498	struct acpi_thermal *tz = thermal_zone_device_priv(thermal);

drivers/ata/ahci.c+9−0

@@ -1883,6 +1883,15 @@ static int ahci_init_one(struct pci_dev pdev, const struct pci_device_id ent) · 1882 unmodified lines
1883	else	1883	else
1884	dev_info(&pdev->dev, "SSS flag set, parallel bus scan disabled\n");	1884	dev_info(&pdev->dev, "SSS flag set, parallel bus scan disabled\n");
1885		1885
		1886	if (!(hpriv->cap & HOST_CAP_PART))
		1887	host->flags \|= ATA_HOST_NO_PART;
		1888
		1889	if (!(hpriv->cap & HOST_CAP_SSC))
		1890	host->flags \|= ATA_HOST_NO_SSC;
		1891
		1892	if (!(hpriv->cap2 & HOST_CAP2_SDS))
		1893	host->flags \|= ATA_HOST_NO_DEVSLP;
		1894
1886	if (pi.flags & ATA_FLAG_EM)	1895	if (pi.flags & ATA_FLAG_EM)
1887	ahci_reset_em(host);	1896	ahci_reset_em(host);
1888		1897

drivers/ata/libahci.c+23−12

 	return sprintf(buf, "%d\n", emp->blink_policy);
 }
+static void ahci_port_clear_pending_irq(struct ata_port *ap)
+{
+	struct ahci_host_priv *hpriv = ap->host->private_data;
+	void __iomem *port_mmio = ahci_port_base(ap);
+	u32 tmp;
+	/* clear SError */
+	tmp = readl(port_mmio + PORT_SCR_ERR);
+	dev_dbg(ap->host->dev, "PORT_SCR_ERR 0x%x\n", tmp);
+	writel(tmp, port_mmio + PORT_SCR_ERR);
+	/* clear port IRQ */
+	tmp = readl(port_mmio + PORT_IRQ_STAT);
+	dev_dbg(ap->host->dev, "PORT_IRQ_STAT 0x%x\n", tmp);
+	if (tmp)
+		writel(tmp, port_mmio + PORT_IRQ_STAT);
+	writel(1 << ap->port_no, hpriv->mmio + HOST_IRQ_STAT);
+}
 static void ahci_port_init(struct device *dev, struct ata_port *ap,
 			   int port_no, void __iomem *mmio,
 			   void __iomem *port_mmio)
 	if (rc)
 		dev_warn(dev, "%s (%d)\n", emsg, rc);
-	/* clear SError */
+	ahci_port_clear_pending_irq(ap);
-	tmp = readl(port_mmio + PORT_SCR_ERR);
-	dev_dbg(dev, "PORT_SCR_ERR 0x%x\n", tmp);
-	writel(tmp, port_mmio + PORT_SCR_ERR);
-	/* clear port IRQ */
-	tmp = readl(port_mmio + PORT_IRQ_STAT);
-	dev_dbg(dev, "PORT_IRQ_STAT 0x%x\n", tmp);
-	if (tmp)
-		writel(tmp, port_mmio + PORT_IRQ_STAT);
-	writel(1 << port_no, mmio + HOST_IRQ_STAT);
 	/* mark esata ports */
 	tmp = readl(port_mmio + PORT_CMD);
 	tf.status = ATA_BUSY;
 	ata_tf_to_fis(&tf, 0, 0, d2h_fis);
+	ahci_port_clear_pending_irq(ap);
 	rc = sata_link_hardreset(link, timing, deadline, online,
 				 ahci_check_ready);

drivers/ata/libata-core.c+139−17

@@ -1972,6 +1972,96 @@ retry: · 1971 unmodified lines
1972	return rc;	1972	return rc;
1973	}	1973	}
1974		1974
		1975	/**
		1976	* ata_dev_power_set_standby - Set a device power mode to standby
		1977	* @dev: target device
		1978	*
		1979	* Issue a STANDBY IMMEDIATE command to set a device power mode to standby.
		1980	* For an HDD device, this spins down the disks.
		1981	*
		1982	* LOCKING:
		1983	* Kernel thread context (may sleep).
		1984	*/
		1985	void ata_dev_power_set_standby(struct ata_device *dev)
		1986	{
		1987	unsigned long ap_flags = dev->link->ap->flags;
		1988	struct ata_taskfile tf;
		1989	unsigned int err_mask;
		1990
		1991	/* Issue STANDBY IMMEDIATE command only if supported by the device */
		1992	if (dev->class != ATA_DEV_ATA && dev->class != ATA_DEV_ZAC)
		1993	return;
		1994
		1995	/*
		1996	* Some odd clown BIOSes issue spindown on power off (ACPI S4 or S5)
		1997	* causing some drives to spin up and down again. For these, do nothing
		1998	* if we are being called on shutdown.
		1999	*/
		2000	if ((ap_flags & ATA_FLAG_NO_POWEROFF_SPINDOWN) &&
		2001	system_state == SYSTEM_POWER_OFF)
		2002	return;
		2003
		2004	if ((ap_flags & ATA_FLAG_NO_HIBERNATE_SPINDOWN) &&
		2005	system_entering_hibernation())
		2006	return;
		2007
		2008	ata_tf_init(dev, &tf);
		2009	tf.flags \|= ATA_TFLAG_DEVICE \| ATA_TFLAG_ISADDR;
		2010	tf.protocol = ATA_PROT_NODATA;
		2011	tf.command = ATA_CMD_STANDBYNOW1;
		2012
		2013	ata_dev_notice(dev, "Entering standby power mode\n");
		2014
		2015	err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
		2016	if (err_mask)
		2017	ata_dev_err(dev, "STANDBY IMMEDIATE failed (err_mask=0x%x)\n",
		2018	err_mask);
		2019	}
		2020
		2021	/**
		2022	* ata_dev_power_set_active - Set a device power mode to active
		2023	* @dev: target device
		2024	*
		2025	* Issue a VERIFY command to enter to ensure that the device is in the
		2026	* active power mode. For a spun-down HDD (standby or idle power mode),
		2027	* the VERIFY command will complete after the disk spins up.
		2028	*
		2029	* LOCKING:
		2030	* Kernel thread context (may sleep).
		2031	*/
		2032	void ata_dev_power_set_active(struct ata_device *dev)
		2033	{
		2034	struct ata_taskfile tf;
		2035	unsigned int err_mask;
		2036
		2037	/*
		2038	* Issue READ VERIFY SECTORS command for 1 sector at lba=0 only
		2039	* if supported by the device.
		2040	*/
		2041	if (dev->class != ATA_DEV_ATA && dev->class != ATA_DEV_ZAC)
		2042	return;
		2043
		2044	ata_tf_init(dev, &tf);
		2045	tf.flags \|= ATA_TFLAG_DEVICE \| ATA_TFLAG_ISADDR;
		2046	tf.protocol = ATA_PROT_NODATA;
		2047	tf.command = ATA_CMD_VERIFY;
		2048	tf.nsect = 1;
		2049	if (dev->flags & ATA_DFLAG_LBA) {
		2050	tf.flags \|= ATA_TFLAG_LBA;
		2051	tf.device \|= ATA_LBA;
		2052	} else {
		2053	/* CHS */
		2054	tf.lbal = 0x1; /* sect */
		2055	}
		2056
		2057	ata_dev_notice(dev, "Entering active power mode\n");
		2058
		2059	err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
		2060	if (err_mask)
		2061	ata_dev_err(dev, "VERIFY failed (err_mask=0x%x)\n",
		2062	err_mask);
		2063	}
		2064
1975	/**	2065	/**
1976	* ata_read_log_page - read a specific log page	2066	* ata_read_log_page - read a specific log page
1977	* @dev: target device	2067	* @dev: target device
@@ -2529,7 +2619,7 @@ static int ata_dev_config_lba(struct ata_device *dev) · 551 unmodified lines
2529	{	2619	{
2530	const u16 *id = dev->id;	2620	const u16 *id = dev->id;
2531	const char *lba_desc;	2621	const char *lba_desc;
2532	char ncq_desc[24];	2622	char ncq_desc[32];
2533	int ret;	2623	int ret;
2534		2624
2535	dev->flags \|= ATA_DFLAG_LBA;	2625	dev->flags \|= ATA_DFLAG_LBA;
@@ -4783,11 +4873,8 @@ void ata_qc_complete(struct ata_queued_cmd *qc) · 2247 unmodified lines
4783	* been aborted by the device due to a limit timeout using the policy	4873	* been aborted by the device due to a limit timeout using the policy
4784	* 0xD. For these commands, invoke EH to get the command sense data.	4874	* 0xD. For these commands, invoke EH to get the command sense data.
4785	*/	4875	*/
4786	if (qc->result_tf.status & ATA_SENSE &&	4876	if (qc->flags & ATA_QCFLAG_HAS_CDL &&
4787	((ata_is_ncq(qc->tf.protocol) &&	4877	qc->result_tf.status & ATA_SENSE) {
4788	dev->flags & ATA_DFLAG_CDL_ENABLED) \|\|
4789	(!ata_is_ncq(qc->tf.protocol) &&
4790	ata_id_sense_reporting_enabled(dev->id)))) {
4791	/*	4878	/*
4792	* Tell SCSI EH to not overwrite scmd->result even if this	4879	* Tell SCSI EH to not overwrite scmd->result even if this
4793	* command is finished with result SAM_STAT_GOOD.	4880	* command is finished with result SAM_STAT_GOOD.
@@ -5040,17 +5127,19 @@ static void ata_port_request_pm(struct ata_port *ap, pm_message_t mesg, · 246 unmodified lines
5040	struct ata_link *link;	5127	struct ata_link *link;
5041	unsigned long flags;	5128	unsigned long flags;
5042		5129
5043	/* Previous resume operation might still be in	5130	spin_lock_irqsave(ap->lock, flags);
5044	* progress. Wait for PM_PENDING to clear.	5131
		5132	/*
		5133	* A previous PM operation might still be in progress. Wait for
		5134	* ATA_PFLAG_PM_PENDING to clear.
5045	*/	5135	*/
5046	if (ap->pflags & ATA_PFLAG_PM_PENDING) {	5136	if (ap->pflags & ATA_PFLAG_PM_PENDING) {
		5137	spin_unlock_irqrestore(ap->lock, flags);
5047	ata_port_wait_eh(ap);	5138	ata_port_wait_eh(ap);
5048	WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);	5139	spin_lock_irqsave(ap->lock, flags);
5049	}	5140	}
5050		5141
5051	/* request PM ops to EH */	5142	/* Request PM operation to EH */
5052	spin_lock_irqsave(ap->lock, flags);
5053
5054	ap->pm_mesg = mesg;	5143	ap->pm_mesg = mesg;
5055	ap->pflags \|= ATA_PFLAG_PM_PENDING;	5144	ap->pflags \|= ATA_PFLAG_PM_PENDING;
5056	ata_for_each_link(link, ap, HOST_FIRST) {	5145	ata_for_each_link(link, ap, HOST_FIRST) {
@@ -5062,10 +5151,8 @@ static void ata_port_request_pm(struct ata_port *ap, pm_message_t mesg, · 5 unmodified lines
5062		5151
5063	spin_unlock_irqrestore(ap->lock, flags);	5152	spin_unlock_irqrestore(ap->lock, flags);
5064		5153
5065	if (!async) {	5154	if (!async)
5066	ata_port_wait_eh(ap);	5155	ata_port_wait_eh(ap);
5067	WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5068	}
5069	}	5156	}
5070		5157
5071	/*	5158	/*
@@ -5081,11 +5168,27 @@ static const unsigned int ata_port_suspend_ehi = ATA_EHI_QUIET · 9 unmodified lines
5081		5168
5082	static void ata_port_suspend(struct ata_port *ap, pm_message_t mesg)	5169	static void ata_port_suspend(struct ata_port *ap, pm_message_t mesg)
5083	{	5170	{
		5171	/*
		5172	* We are about to suspend the port, so we do not care about
		5173	* scsi_rescan_device() calls scheduled by previous resume operations.
		5174	* The next resume will schedule the rescan again. So cancel any rescan
		5175	* that is not done yet.
		5176	*/
		5177	cancel_delayed_work_sync(&ap->scsi_rescan_task);
		5178
5084	ata_port_request_pm(ap, mesg, 0, ata_port_suspend_ehi, false);	5179	ata_port_request_pm(ap, mesg, 0, ata_port_suspend_ehi, false);
5085	}	5180	}
5086		5181
5087	static void ata_port_suspend_async(struct ata_port *ap, pm_message_t mesg)	5182	static void ata_port_suspend_async(struct ata_port *ap, pm_message_t mesg)
5088	{	5183	{
		5184	/*
		5185	* We are about to suspend the port, so we do not care about
		5186	* scsi_rescan_device() calls scheduled by previous resume operations.
		5187	* The next resume will schedule the rescan again. So cancel any rescan
		5188	* that is not done yet.
		5189	*/
		5190	cancel_delayed_work_sync(&ap->scsi_rescan_task);
		5191
5089	ata_port_request_pm(ap, mesg, 0, ata_port_suspend_ehi, true);	5192	ata_port_request_pm(ap, mesg, 0, ata_port_suspend_ehi, true);
5090	}	5193	}
5091		5194
@@ -5232,7 +5335,7 @@ EXPORT_SYMBOL_GPL(ata_host_resume); · 140 unmodified lines
5232	#endif	5335	#endif
5233		5336
5234	const struct device_type ata_port_type = {	5337	const struct device_type ata_port_type = {
5235	.name = "ata_port",	5338	.name = ATA_PORT_TYPE_NAME,
5236	#ifdef CONFIG_PM	5339	#ifdef CONFIG_PM
5237	.pm = &ata_port_pm_ops,	5340	.pm = &ata_port_pm_ops,
5238	#endif	5341	#endif
@@ -5951,11 +6054,30 @@ static void ata_port_detach(struct ata_port *ap) · 712 unmodified lines
5951	struct ata_link *link;	6054	struct ata_link *link;
5952	struct ata_device *dev;	6055	struct ata_device *dev;
5953		6056
5954	/* tell EH we're leaving & flush EH */	6057	/* Wait for any ongoing EH */
		6058	ata_port_wait_eh(ap);
		6059
		6060	mutex_lock(&ap->scsi_scan_mutex);
5955	spin_lock_irqsave(ap->lock, flags);	6061	spin_lock_irqsave(ap->lock, flags);
		6062
		6063	/* Remove scsi devices */
		6064	ata_for_each_link(link, ap, HOST_FIRST) {
		6065	ata_for_each_dev(dev, link, ALL) {
		6066	if (dev->sdev) {
		6067	spin_unlock_irqrestore(ap->lock, flags);
		6068	scsi_remove_device(dev->sdev);
		6069	spin_lock_irqsave(ap->lock, flags);
		6070	dev->sdev = NULL;
		6071	}
		6072	}
		6073	}
		6074
		6075	/* Tell EH to disable all devices */
5956	ap->pflags \|= ATA_PFLAG_UNLOADING;	6076	ap->pflags \|= ATA_PFLAG_UNLOADING;
5957	ata_port_schedule_eh(ap);	6077	ata_port_schedule_eh(ap);
		6078
5958	spin_unlock_irqrestore(ap->lock, flags);	6079	spin_unlock_irqrestore(ap->lock, flags);
		6080	mutex_unlock(&ap->scsi_scan_mutex);
5959		6081
5960	/* wait till EH commits suicide */	6082	/* wait till EH commits suicide */
5961	ata_port_wait_eh(ap);	6083	ata_port_wait_eh(ap);

drivers/ata/libata-eh.c+49−15

 	  .timeouts = ata_eh_other_timeouts, },
 	{ .commands = CMDS(ATA_CMD_FLUSH, ATA_CMD_FLUSH_EXT),
 	  .timeouts = ata_eh_flush_timeouts },
+	{ .commands = CMDS(ATA_CMD_VERIFY),
+	  .timeouts = ata_eh_reset_timeouts },
 };
 #undef CMDS
 	struct ata_device *dev;
 	unsigned long flags;
-	/* Restore SControl IPM and SPD for the next driver and
+	/*
+	 * Unless we are restarting, transition all enabled devices to
+	 * standby power mode.
+	 */
+	if (system_state != SYSTEM_RESTART) {
+		ata_for_each_link(link, ap, PMP_FIRST) {
+			ata_for_each_dev(dev, link, ENABLED)
+				ata_dev_power_set_standby(dev);
+		}
+	}
+	/*
+	 * Restore SControl IPM and SPD for the next driver and
 	 * disable attached devices.
 	 */
 	ata_for_each_link(link, ap, PMP_FIRST) {
 			ehc->saved_xfer_mode[devno] = dev->xfer_mode;
 			if (ata_ncq_enabled(dev))
 				ehc->saved_ncq_enabled |= 1 << devno;
+			/* If we are resuming, wake up the device */
+			if (ap->pflags & ATA_PFLAG_RESUMING)
+				ehc->i.dev_action[devno] |= ATA_EH_SET_ACTIVE;
 		}
 	}
 	/* clean up */
 	spin_lock_irqsave(ap->lock, flags);
+	ap->pflags &= ~ATA_PFLAG_RESUMING;
 	if (ap->pflags & ATA_PFLAG_LOADING)
 		ap->pflags &= ~ATA_PFLAG_LOADING;
 	else if ((ap->pflags & ATA_PFLAG_SCSI_HOTPLUG) &&
 	struct ata_eh_context *ehc = &link->eh_context;
 	unsigned long flags;
+	/*
+	 * If the device is still enabled, transition it to standby power mode
+	 * (i.e. spin down HDDs).
+	 */
+	if (ata_dev_enabled(dev))
+		ata_dev_power_set_standby(dev);
 	ata_dev_disable(dev);
 	spin_lock_irqsave(ap->lock, flags);
 	struct ata_eh_context *ehc = &link->eh_context;
 	struct ata_queued_cmd *qc;
 	const char *frozen, *desc;
-	char tries_buf[6] = "";
+	char tries_buf[16] = "";
 	int tag, nr_failed = 0;
 	if (ehc->i.flags & ATA_EHI_QUIET)
 		}
 	}
-	/*
+	/* clear cached SError */
-	 * Some controllers can't be frozen very well and may set spurious
-	 * error conditions during reset.  Clear accumulated error
-	 * information and re-thaw the port if frozen.  As reset is the
-	 * final recovery action and we cross check link onlineness against
-	 * device classification later, no hotplug event is lost by this.
-	 */
 	spin_lock_irqsave(link->ap->lock, flags);
-	memset(&link->eh_info, 0, sizeof(link->eh_info));
+	link->eh_info.serror = 0;
 	if (slave)
-		memset(&slave->eh_info, 0, sizeof(link->eh_info));
+		slave->eh_info.serror = 0;
-	ap->pflags &= ~ATA_PFLAG_EH_PENDING;
 	spin_unlock_irqrestore(link->ap->lock, flags);
-	if (ata_port_is_frozen(ap))
-		ata_eh_thaw_port(ap);
 	/*
 	 * Make sure onlineness and classification result correspond.
 	 * Hotplug could have happened during reset and some
 		if (ehc->i.flags & ATA_EHI_DID_RESET)
 			readid_flags |= ATA_READID_POSTRESET;
+		/*
+		 * When resuming, before executing any command, make sure to
+		 * transition the device to the active power mode.
+		 */
+		if ((action & ATA_EH_SET_ACTIVE) && ata_dev_enabled(dev)) {
+			ata_dev_power_set_active(dev);
+			ata_eh_done(link, dev, ATA_EH_SET_ACTIVE);
+		}
 		if ((action & ATA_EH_REVALIDATE) && ata_dev_enabled(dev)) {
 			WARN_ON(dev->class == ATA_DEV_PMP);
 	unsigned long flags;
 	int rc = 0;
 	struct ata_device *dev;
+	struct ata_link *link;
 	/* are we suspending? */
 	spin_lock_irqsave(ap->lock, flags);
 	WARN_ON(ap->pflags & ATA_PFLAG_SUSPENDED);
+	/* Set all devices attached to the port in standby mode */
+	ata_for_each_link(link, ap, HOST_FIRST) {
+		ata_for_each_dev(dev, link, ENABLED)
+			ata_dev_power_set_standby(dev);
+	}
 	/*
 	 * If we have a ZPODD attached, check its zero
 	 * power ready status before the port is frozen.
 	/* update the flags */
 	spin_lock_irqsave(ap->lock, flags);
 	ap->pflags &= ~(ATA_PFLAG_PM_PENDING | ATA_PFLAG_SUSPENDED);
+	ap->pflags |= ATA_PFLAG_RESUMING;
 	spin_unlock_irqrestore(ap->lock, flags);
 }
 #endif /* CONFIG_PM */

drivers/ata/libata-sata.c+16−3

@@ -396,10 +396,23 @@ int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy, · 395 unmodified lines
396	case ATA_LPM_MED_POWER_WITH_DIPM:	396	case ATA_LPM_MED_POWER_WITH_DIPM:
397	case ATA_LPM_MIN_POWER_WITH_PARTIAL:	397	case ATA_LPM_MIN_POWER_WITH_PARTIAL:
398	case ATA_LPM_MIN_POWER:	398	case ATA_LPM_MIN_POWER:
399	if (ata_link_nr_enabled(link) > 0)	399	if (ata_link_nr_enabled(link) > 0) {
400	/* no restrictions on LPM transitions */	400	/* assume no restrictions on LPM transitions */
401	scontrol &= ~(0x7 << 8);	401	scontrol &= ~(0x7 << 8);
402	else {	402
		403	/*
		404	* If the controller does not support partial, slumber,
		405	* or devsleep, then disallow these transitions.
		406	*/
		407	if (link->ap->host->flags & ATA_HOST_NO_PART)
		408	scontrol \|= (0x1 << 8);
		409
		410	if (link->ap->host->flags & ATA_HOST_NO_SSC)
		411	scontrol \|= (0x2 << 8);
		412
		413	if (link->ap->host->flags & ATA_HOST_NO_DEVSLP)
		414	scontrol \|= (0x4 << 8);
		415	} else {
403	/* empty port, power off */	416	/* empty port, power off */
404	scontrol &= ~0xf;	417	scontrol &= ~0xf;
405	scontrol \|= (0x1 << 2);	418	scontrol \|= (0x1 << 2);

drivers/ata/libata-scsi.c+67−33

 		}
 	} else {
 		sdev->sector_size = ata_id_logical_sector_size(dev->id);
 		/*
-		 * Stop the drive on suspend but do not issue START STOP UNIT
+		 * Ask the sd driver to issue START STOP UNIT on runtime suspend
-		 * on resume as this is not necessary and may fail: the device
+		 * and resume only. For system level suspend/resume, devices
-		 * will be woken up by ata_port_pm_resume() with a port reset
+		 * power state is handled directly by libata EH.
-		 * and device revalidation.
 		 */
-		sdev->manage_start_stop = 1;
+		sdev->manage_runtime_start_stop = true;
-		sdev->no_start_on_resume = 1;
 	}
 	/*
 	return 0;
 }
+/**
+ *	ata_scsi_slave_alloc - Early setup of SCSI device
+ *	@sdev: SCSI device to examine
+ *
+ *	This is called from scsi_alloc_sdev() when the scsi device
+ *	associated with an ATA device is scanned on a port.
+ *
+ *	LOCKING:
+ *	Defined by SCSI layer.  We don't really care.
+ */
+int ata_scsi_slave_alloc(struct scsi_device *sdev)
+{
+	struct ata_port *ap = ata_shost_to_port(sdev->host);
+	struct device_link *link;
+	ata_scsi_sdev_config(sdev);
+	/*
+	 * Create a link from the ata_port device to the scsi device to ensure
+	 * that PM does suspend/resume in the correct order: the scsi device is
+	 * consumer (child) and the ata port the supplier (parent).
+	 */
+	link = device_link_add(&sdev->sdev_gendev, &ap->tdev,
+			       DL_FLAG_STATELESS |
+			       DL_FLAG_PM_RUNTIME | DL_FLAG_RPM_ACTIVE);
+	if (!link) {
+		ata_port_err(ap, "Failed to create link to scsi device %s\n",
+			     dev_name(&sdev->sdev_gendev));
+		return -ENODEV;
+	}
+	return 0;
+}
+EXPORT_SYMBOL_GPL(ata_scsi_slave_alloc);
 /**
  *	ata_scsi_slave_config - Set SCSI device attributes
  *	@sdev: SCSI device to examine
 {
 	struct ata_port *ap = ata_shost_to_port(sdev->host);
 	struct ata_device *dev = __ata_scsi_find_dev(ap, sdev);
-	int rc = 0;
-	ata_scsi_sdev_config(sdev);
 	if (dev)
-		rc = ata_scsi_dev_config(sdev, dev);
+		return ata_scsi_dev_config(sdev, dev);
-	return rc;
+	return 0;
 }
 EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
 	unsigned long flags;
 	struct ata_device *dev;
+	device_link_remove(&sdev->sdev_gendev, &ap->tdev);
 	spin_lock_irqsave(ap->lock, flags);
 	dev = __ata_scsi_find_dev(ap, sdev);
 	if (dev && dev->sdev) {
 	}
 	if (cdb[4] & 0x1) {
-		tf->nsect = 1;	/* 1 sector, lba=0 */
+		tf->nsect = 1;  /* 1 sector, lba=0 */
 		if (qc->dev->flags & ATA_DFLAG_LBA) {
 			tf->flags |= ATA_TFLAG_LBA;
 			tf->lbah = 0x0; /* cyl high */
 		}
-		tf->command = ATA_CMD_VERIFY;	/* READ VERIFY */
+		tf->command = ATA_CMD_VERIFY;   /* READ VERIFY */
 	} else {
 		/* Some odd clown BIOSen issue spindown on power off (ACPI S4
 		 * or S5) causing some drives to spin up and down again.
 			goto skip;
 		if ((qc->ap->flags & ATA_FLAG_NO_HIBERNATE_SPINDOWN) &&
-		     system_entering_hibernation())
+		    system_entering_hibernation())
 			goto skip;
 		/* Issue ATA STANDBY IMMEDIATE command */
 		hdr[2] = 0x7; /* claim SPC-5 version compatibility */
 	}
+	if (args->dev->flags & ATA_DFLAG_CDL)
+		hdr[2] = 0xd; /* claim SPC-6 version compatibility */
 	memcpy(rbuf, hdr, sizeof(hdr));
 	memcpy(&rbuf[8], "ATA     ", 8);
 	ata_id_string(args->id, &rbuf[16], ATA_ID_PROD, 16);
 		break;
 	case MAINTENANCE_IN:
-		if (scsicmd[1] == MI_REPORT_SUPPORTED_OPERATION_CODES)
+		if ((scsicmd[1] & 0x1f) == MI_REPORT_SUPPORTED_OPERATION_CODES)
 			ata_scsi_rbuf_fill(&args, ata_scsiop_maint_in);
 		else
 			ata_scsi_set_invalid_field(dev, cmd, 1, 0xff);
 	struct ata_link *link;
 	struct ata_device *dev;
 	unsigned long flags;
-	bool delay_rescan = false;
+	int ret = 0;
 	mutex_lock(&ap->scsi_scan_mutex);
 	spin_lock_irqsave(ap->lock, flags);
 		ata_for_each_dev(dev, link, ENABLED) {
 			struct scsi_device *sdev = dev->sdev;
+			/*
+			 * If the port was suspended before this was scheduled,
+			 * bail out.
+			 */
+			if (ap->pflags & ATA_PFLAG_SUSPENDED)
+				goto unlock;
 			if (!sdev)
 				continue;
 			if (scsi_device_get(sdev))
 				continue;
-			/*
-			 * If the rescan work was scheduled because of a resume
-			 * event, the port is already fully resumed, but the
-			 * SCSI device may not yet be fully resumed. In such
-			 * case, executing scsi_rescan_device() may cause a
-			 * deadlock with the PM code on device_lock(). Prevent
-			 * this by giving up and retrying rescan after a short
-			 * delay.
-			 */
-			delay_rescan = sdev->sdev_gendev.power.is_suspended;
-			if (delay_rescan) {
-				scsi_device_put(sdev);
-				break;
-			}
 			spin_unlock_irqrestore(ap->lock, flags);
-			scsi_rescan_device(sdev);
+			ret = scsi_rescan_device(sdev);
 			scsi_device_put(sdev);
 			spin_lock_irqsave(ap->lock, flags);
+			if (ret)
+				goto unlock;
 		}
 	}
+unlock:
 	spin_unlock_irqrestore(ap->lock, flags);
 	mutex_unlock(&ap->scsi_scan_mutex);
-	if (delay_rescan)
+	/* Reschedule with a delay if scsi_rescan_device() returned an error */
+	if (ret)
 		schedule_delayed_work(&ap->scsi_rescan_task,
 				      msecs_to_jiffies(5));
 }

drivers/ata/libata-transport.c+8−1

 	put_device(dev);
 }
+static const struct device_type ata_port_sas_type = {
+	.name = ATA_PORT_TYPE_NAME,
+};
 /** ata_tport_add - initialize a transport ATA port structure
  *
  * @parent:	parent device
 	struct device *dev = &ap->tdev;
 	device_initialize(dev);
-	dev->type = &ata_port_type;
+	if (ap->flags & ATA_FLAG_SAS_HOST)
+		dev->type = &ata_port_sas_type;
+	else
+		dev->type = &ata_port_type;
 	dev->parent = parent;
 	ata_host_get(ap->host);

drivers/ata/libata.h+4−0

 	ATA_DNXFER_QUIET	= (1 << 31),
 };
+#define ATA_PORT_TYPE_NAME	"ata_port"
 extern atomic_t ata_print_id;
 extern int atapi_passthru16;
 extern int libata_fua;
 extern int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
 			      unsigned int readid_flags);
 extern int ata_dev_configure(struct ata_device *dev);
+extern void ata_dev_power_set_standby(struct ata_device *dev);
+extern void ata_dev_power_set_active(struct ata_device *dev);
 extern int sata_down_spd_limit(struct ata_link *link, u32 spd_limit);
 extern int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel);
 extern unsigned int ata_dev_set_feature(struct ata_device *dev,

drivers/ata/pata_parport/comm.c+4−5

@@ -37,7 +37,7 @@ static int comm_read_regr(struct pi_adapter *pi, int cont, int regr) · 36 unmodified lines
37	{	37	{
38	int l, h, r;	38	int l, h, r;
39		39
40	r = regr + cont_map[cont];	40	r = regr + cont_map[cont];
41		41
42	switch (pi->mode) {	42	switch (pi->mode) {
43	case 0:	43	case 0:
@@ -90,7 +90,6 @@ static void comm_connect(struct pi_adapter *pi) · 46 unmodified lines
90	}	90	}
91		91
92	static void comm_disconnect(struct pi_adapter *pi)	92	static void comm_disconnect(struct pi_adapter *pi)
93
94	{	93	{
95	w2(0); w2(0); w2(0); w2(4);	94	w2(0); w2(0); w2(0); w2(4);
96	w0(pi->saved_r0);	95	w0(pi->saved_r0);
@@ -172,12 +171,12 @@ static void comm_write_block(struct pi_adapter pi, char buf, int count) · 75 unmodified lines
172	w4l(swab16(((u16 )buf)[2 k]) \|	171	w4l(swab16(((u16 )buf)[2 k]) \|
173	swab16(((u16 )buf)[2 k + 1]) << 16);	172	swab16(((u16 )buf)[2 k + 1]) << 16);
174	break;	173	break;
175	}	174	}
176	}	175	}
177		176
178	static void comm_log_adapter(struct pi_adapter *pi)	177	static void comm_log_adapter(struct pi_adapter *pi)
179		178	{
180	{ char *mode_string[5] = { "4-bit", "8-bit", "EPP-8", "EPP-16", "EPP-32" };	179	char *mode_string[5] = { "4-bit", "8-bit", "EPP-8", "EPP-16", "EPP-32" };
181		180
182	dev_info(&pi->dev,	181	dev_info(&pi->dev,
183	"DataStor Commuter at 0x%x, mode %d (%s), delay %d\n",	182	"DataStor Commuter at 0x%x, mode %d (%s), delay %d\n",

drivers/ata/sata_mv.c+2−2

@@ -1255,8 +1255,8 @@ static void mv_dump_mem(struct device dev, void __iomem start, unsigned bytes) · 1254 unmodified lines
1255		1255
1256	for (b = 0; b < bytes; ) {	1256	for (b = 0; b < bytes; ) {
1257	for (w = 0, o = 0; b < bytes && w < 4; w++) {	1257	for (w = 0, o = 0; b < bytes && w < 4; w++) {
1258	o += snprintf(linebuf + o, sizeof(linebuf) - o,	1258	o += scnprintf(linebuf + o, sizeof(linebuf) - o,
1259	"%08x ", readl(start + b));	1259	"%08x ", readl(start + b));
1260	b += sizeof(u32);	1260	b += sizeof(u32);
1261	}	1261	}
1262	dev_dbg(dev, "%s: %p: %s\n",	1262	dev_dbg(dev, "%s: %p: %s\n",

drivers/base/core.c+2−0

@@ -3537,6 +3537,8 @@ int device_add(struct device *dev) · 3536 unmodified lines
3537	/* subsystems can specify simple device enumeration */	3537	/* subsystems can specify simple device enumeration */
3538	else if (dev->bus && dev->bus->dev_name)	3538	else if (dev->bus && dev->bus->dev_name)
3539	error = dev_set_name(dev, "%s%u", dev->bus->dev_name, dev->id);	3539	error = dev_set_name(dev, "%s%u", dev->bus->dev_name, dev->id);
		3540	else
		3541	error = -EINVAL;
3540	if (error)	3542	if (error)
3541	goto name_error;	3543	goto name_error;
3542		3544

drivers/block/rbd.c+225−187

 static void rbd_dev_remove_parent(struct rbd_device *rbd_dev);
 static int rbd_dev_refresh(struct rbd_device *rbd_dev);
-static int rbd_dev_v2_header_onetime(struct rbd_device *rbd_dev);
+static int rbd_dev_v2_header_onetime(struct rbd_device *rbd_dev,
-static int rbd_dev_header_info(struct rbd_device *rbd_dev);
+				     struct rbd_image_header *header);
-static int rbd_dev_v2_parent_info(struct rbd_device *rbd_dev);
 static const char *rbd_dev_v2_snap_name(struct rbd_device *rbd_dev,
 					u64 snap_id);
 static int _rbd_dev_v2_snap_size(struct rbd_device *rbd_dev, u64 snap_id,
 	RCU_INIT_POINTER(rbd_dev->layout.pool_ns, NULL);
 }
+static void rbd_image_header_cleanup(struct rbd_image_header *header)
+{
+	kfree(header->object_prefix);
+	ceph_put_snap_context(header->snapc);
+	kfree(header->snap_sizes);
+	kfree(header->snap_names);
+	memset(header, 0, sizeof(*header));
+}
 /*
  * Fill an rbd image header with information from the given format 1
  * on-disk header.
  */
-static int rbd_header_from_disk(struct rbd_device *rbd_dev,
+static int rbd_header_from_disk(struct rbd_image_header *header,
-				 struct rbd_image_header_ondisk *ondisk)
+				struct rbd_image_header_ondisk *ondisk,
+				bool first_time)
 {
-	struct rbd_image_header *header = &rbd_dev->header;
-	bool first_time = header->object_prefix == NULL;
 	struct ceph_snap_context *snapc;
 	char *object_prefix = NULL;
 	char *snap_names = NULL;
 	if (first_time) {
 		header->object_prefix = object_prefix;
 		header->obj_order = ondisk->options.order;
-		rbd_init_layout(rbd_dev);
-	} else {
-		ceph_put_snap_context(header->snapc);
-		kfree(header->snap_names);
-		kfree(header->snap_sizes);
 	}
 	/* The remaining fields always get updated (when we refresh) */
  * return, the rbd_dev->header field will contain up-to-date
  * information about the image.
  */
-static int rbd_dev_v1_header_info(struct rbd_device *rbd_dev)
+static int rbd_dev_v1_header_info(struct rbd_device *rbd_dev,
+				  struct rbd_image_header *header,
+				  bool first_time)
 {
 	struct rbd_image_header_ondisk *ondisk = NULL;
 	u32 snap_count = 0;
 		snap_count = le32_to_cpu(ondisk->snap_count);
 	} while (snap_count != want_count);
-	ret = rbd_header_from_disk(rbd_dev, ondisk);
+	ret = rbd_header_from_disk(header, ondisk, first_time);
 out:
 	kfree(ondisk);
 	}
 }
-static int rbd_dev_refresh(struct rbd_device *rbd_dev)
-{
-	u64 mapping_size;
-	int ret;
-	down_write(&rbd_dev->header_rwsem);
-	mapping_size = rbd_dev->mapping.size;
-	ret = rbd_dev_header_info(rbd_dev);
-	if (ret)
-		goto out;
-	/*
-	 * If there is a parent, see if it has disappeared due to the
-	 * mapped image getting flattened.
-	 */
-	if (rbd_dev->parent) {
-		ret = rbd_dev_v2_parent_info(rbd_dev);
-		if (ret)
-			goto out;
-	}
-	rbd_assert(!rbd_is_snap(rbd_dev));
-	rbd_dev->mapping.size = rbd_dev->header.image_size;
-out:
-	up_write(&rbd_dev->header_rwsem);
-	if (!ret && mapping_size != rbd_dev->mapping.size)
-		rbd_dev_update_size(rbd_dev);
-	return ret;
-}
 static const struct blk_mq_ops rbd_mq_ops = {
 	.queue_rq	= rbd_queue_rq,
 };
 	return 0;
 }
-static int rbd_dev_v2_image_size(struct rbd_device *rbd_dev)
+static int rbd_dev_v2_object_prefix(struct rbd_device *rbd_dev,
-{
+				    char **pobject_prefix)
-	return _rbd_dev_v2_snap_size(rbd_dev, CEPH_NOSNAP,
-					&rbd_dev->header.obj_order,
-					&rbd_dev->header.image_size);
-}
-static int rbd_dev_v2_object_prefix(struct rbd_device *rbd_dev)
 {
 	size_t size;
 	void *reply_buf;
+	char *object_prefix;
 	int ret;
 	void *p;
 		goto out;
 	p = reply_buf;
-	rbd_dev->header.object_prefix = ceph_extract_encoded_string(&p,
+	object_prefix = ceph_extract_encoded_string(&p, p + ret, NULL,
-						p + ret, NULL, GFP_NOIO);
+						    GFP_NOIO);
+	if (IS_ERR(object_prefix)) {
+		ret = PTR_ERR(object_prefix);
+		goto out;
+	}
 	ret = 0;
-	if (IS_ERR(rbd_dev->header.object_prefix)) {
+	*pobject_prefix = object_prefix;
-		ret = PTR_ERR(rbd_dev->header.object_prefix);
+	dout("  object_prefix = %s\n", object_prefix);
-		rbd_dev->header.object_prefix = NULL;
-	} else {
-		dout("  object_prefix = %s\n", rbd_dev->header.object_prefix);
-	}
 out:
 	kfree(reply_buf);
 	return 0;
 }
-static int rbd_dev_v2_features(struct rbd_device *rbd_dev)
-{
-	return _rbd_dev_v2_snap_features(rbd_dev, CEPH_NOSNAP,
-					 rbd_is_ro(rbd_dev),
-					 &rbd_dev->header.features);
-}
 /*
  * These are generic image flags, but since they are used only for
  * object map, store them in rbd_dev->object_map_flags.
 	u64		overlap;
 };
+static void rbd_parent_info_cleanup(struct parent_image_info *pii)
+{
+	kfree(pii->pool_ns);
+	kfree(pii->image_id);
+	memset(pii, 0, sizeof(*pii));
+}
 /*
  * The caller is responsible for @pii.
  */
 	if (pii->has_overlap)
 		ceph_decode_64_safe(&p, end, pii->overlap, e_inval);
+	dout("%s pool_id %llu pool_ns %s image_id %s snap_id %llu has_overlap %d overlap %llu\n",
+	     __func__, pii->pool_id, pii->pool_ns, pii->image_id, pii->snap_id,
+	     pii->has_overlap, pii->overlap);
 	return 0;
 e_inval:
 	pii->has_overlap = true;
 	ceph_decode_64_safe(&p, end, pii->overlap, e_inval);
+	dout("%s pool_id %llu pool_ns %s image_id %s snap_id %llu has_overlap %d overlap %llu\n",
+	     __func__, pii->pool_id, pii->pool_ns, pii->image_id, pii->snap_id,
+	     pii->has_overlap, pii->overlap);
 	return 0;
 e_inval:
 	return -EINVAL;
 }
-static int get_parent_info(struct rbd_device *rbd_dev,
+static int rbd_dev_v2_parent_info(struct rbd_device *rbd_dev,
-			   struct parent_image_info *pii)
+				  struct parent_image_info *pii)
 {
 	struct page *req_page, *reply_page;
 	void *p;
 	return ret;
 }
-static int rbd_dev_v2_parent_info(struct rbd_device *rbd_dev)
+static int rbd_dev_setup_parent(struct rbd_device *rbd_dev)
 {
 	struct rbd_spec *parent_spec;
 	struct parent_image_info pii = { 0 };
 	if (!parent_spec)
 		return -ENOMEM;
-	ret = get_parent_info(rbd_dev, &pii);
+	ret = rbd_dev_v2_parent_info(rbd_dev, &pii);
 	if (ret)
 		goto out_err;
-	dout("%s pool_id %llu pool_ns %s image_id %s snap_id %llu has_overlap %d overlap %llu\n",
+	if (pii.pool_id == CEPH_NOPOOL || !pii.has_overlap)
-	     __func__, pii.pool_id, pii.pool_ns, pii.image_id, pii.snap_id,
-	     pii.has_overlap, pii.overlap);
-	if (pii.pool_id == CEPH_NOPOOL || !pii.has_overlap) {
-		/*
-		 * Either the parent never existed, or we have
-		 * record of it but the image got flattened so it no
-		 * longer has a parent.  When the parent of a
-		 * layered image disappears we immediately set the
-		 * overlap to 0.  The effect of this is that all new
-		 * requests will be treated as if the image had no
-		 * parent.
-		 *
-		 * If !pii.has_overlap, the parent image spec is not
-		 * applicable.  It's there to avoid duplication in each
-		 * snapshot record.
-		 */
-		if (rbd_dev->parent_overlap) {
-			rbd_dev->parent_overlap = 0;
-			rbd_dev_parent_put(rbd_dev);
-			pr_info("%s: clone image has been flattened\n",
-				rbd_dev->disk->disk_name);
-		}
 		goto out;	/* No parent?  No problem. */
-	}
 	/* The ceph file layout needs to fit pool id in 32 bits */
 	}
 	/*
-	 * The parent won't change (except when the clone is
+	 * The parent won't change except when the clone is flattened,
-	 * flattened, already handled that).  So we only need to
+	 * so we only need to record the parent image spec once.
-	 * record the parent spec we have not already done so.
 	 */
-	if (!rbd_dev->parent_spec) {
+	parent_spec->pool_id = pii.pool_id;
-		parent_spec->pool_id = pii.pool_id;
+	if (pii.pool_ns && *pii.pool_ns) {
-		if (pii.pool_ns && *pii.pool_ns) {
+		parent_spec->pool_ns = pii.pool_ns;
-			parent_spec->pool_ns = pii.pool_ns;
+		pii.pool_ns = NULL;
-			pii.pool_ns = NULL;
-		}
-		parent_spec->image_id = pii.image_id;
-		pii.image_id = NULL;
-		parent_spec->snap_id = pii.snap_id;
-		rbd_dev->parent_spec = parent_spec;
-		parent_spec = NULL;	/* rbd_dev now owns this */
 	}
+	parent_spec->image_id = pii.image_id;
+	pii.image_id = NULL;
+	parent_spec->snap_id = pii.snap_id;
+	rbd_assert(!rbd_dev->parent_spec);
+	rbd_dev->parent_spec = parent_spec;
+	parent_spec = NULL;	/* rbd_dev now owns this */
 	/*
-	 * We always update the parent overlap.  If it's zero we issue
+	 * Record the parent overlap.  If it's zero, issue a warning as
-	 * a warning, as we will proceed as if there was no parent.
+	 * we will proceed as if there is no parent.
 	 */
-	if (!pii.overlap) {
+	if (!pii.overlap)
-		if (parent_spec) {
+		rbd_warn(rbd_dev, "clone is standalone (overlap 0)");
-			/* refresh, careful to warn just once */
-			if (rbd_dev->parent_overlap)
-				rbd_warn(rbd_dev,
-				    "clone now standalone (overlap became 0)");
-		} else {
-			/* initial probe */
-			rbd_warn(rbd_dev, "clone is standalone (overlap 0)");
-		}
-	}
 	rbd_dev->parent_overlap = pii.overlap;
 out:
 	ret = 0;
 out_err:
-	kfree(pii.pool_ns);
+	rbd_parent_info_cleanup(&pii);
-	kfree(pii.image_id);
 	rbd_spec_put(parent_spec);
 	return ret;
 }
-static int rbd_dev_v2_striping_info(struct rbd_device *rbd_dev)
+static int rbd_dev_v2_striping_info(struct rbd_device *rbd_dev,
+				    u64 *stripe_unit, u64 *stripe_count)
 {
 	struct {
 		__le64 stripe_unit;
 		__le64 stripe_count;
 	} __attribute__ ((packed)) striping_info_buf = { 0 };
 	size_t size = sizeof (striping_info_buf);
-	void *p;
 	int ret;
 	ret = rbd_obj_method_sync(rbd_dev, &rbd_dev->header_oid,
 	if (ret < size)
 		return -ERANGE;
-	p = &striping_info_buf;
+	*stripe_unit = le64_to_cpu(striping_info_buf.stripe_unit);
-	rbd_dev->header.stripe_unit = ceph_decode_64(&p);
+	*stripe_count = le64_to_cpu(striping_info_buf.stripe_count);
-	rbd_dev->header.stripe_count = ceph_decode_64(&p);
+	dout("  stripe_unit = %llu stripe_count = %llu\n", *stripe_unit,
+	     *stripe_count);
 	return 0;
 }
-static int rbd_dev_v2_data_pool(struct rbd_device *rbd_dev)
+static int rbd_dev_v2_data_pool(struct rbd_device *rbd_dev, s64 *data_pool_id)
 {
-	__le64 data_pool_id;
+	__le64 data_pool_buf;
 	int ret;
 	ret = rbd_obj_method_sync(rbd_dev, &rbd_dev->header_oid,
 				  &rbd_dev->header_oloc, "get_data_pool",
-				  NULL, 0, &data_pool_id, sizeof(data_pool_id));
+				  NULL, 0, &data_pool_buf,
+				  sizeof(data_pool_buf));
+	dout("%s: rbd_obj_method_sync returned %d\n", __func__, ret);
 	if (ret < 0)
 		return ret;
-	if (ret < sizeof(data_pool_id))
+	if (ret < sizeof(data_pool_buf))
 		return -EBADMSG;
-	rbd_dev->header.data_pool_id = le64_to_cpu(data_pool_id);
+	*data_pool_id = le64_to_cpu(data_pool_buf);
-	WARN_ON(rbd_dev->header.data_pool_id == CEPH_NOPOOL);
+	dout("  data_pool_id = %lld\n", *data_pool_id);
+	WARN_ON(*data_pool_id == CEPH_NOPOOL);
 	return 0;
 }
 	return ret;
 }
-static int rbd_dev_v2_snap_context(struct rbd_device *rbd_dev)
+static int rbd_dev_v2_snap_context(struct rbd_device *rbd_dev,
+				   struct ceph_snap_context **psnapc)
 {
 	size_t size;
 	int ret;
 	for (i = 0; i < snap_count; i++)
 		snapc->snaps[i] = ceph_decode_64(&p);
-	ceph_put_snap_context(rbd_dev->header.snapc);
+	*psnapc = snapc;
-	rbd_dev->header.snapc = snapc;
 	dout("  snap context seq = %llu, snap_count = %u\n",
 		(unsigned long long)seq, (unsigned int)snap_count);
 out:
 	return snap_name;
 }
-static int rbd_dev_v2_header_info(struct rbd_device *rbd_dev)
+static int rbd_dev_v2_header_info(struct rbd_device *rbd_dev,
+				  struct rbd_image_header *header,
+				  bool first_time)
 {
-	bool first_time = rbd_dev->header.object_prefix == NULL;
 	int ret;
-	ret = rbd_dev_v2_image_size(rbd_dev);
+	ret = _rbd_dev_v2_snap_size(rbd_dev, CEPH_NOSNAP,
+				    first_time ? &header->obj_order : NULL,
+				    &header->image_size);
 	if (ret)
 		return ret;
 	if (first_time) {
-		ret = rbd_dev_v2_header_onetime(rbd_dev);
+		ret = rbd_dev_v2_header_onetime(rbd_dev, header);
 		if (ret)
 			return ret;
 	}
-	ret = rbd_dev_v2_snap_context(rbd_dev);
+	ret = rbd_dev_v2_snap_context(rbd_dev, &header->snapc);
-	if (ret && first_time) {
+	if (ret)
-		kfree(rbd_dev->header.object_prefix);
+		return ret;
-		rbd_dev->header.object_prefix = NULL;
-	}
-	return ret;
+	return 0;
 }
-static int rbd_dev_header_info(struct rbd_device *rbd_dev)
+static int rbd_dev_header_info(struct rbd_device *rbd_dev,
+			       struct rbd_image_header *header,
+			       bool first_time)
 {
 	rbd_assert(rbd_image_format_valid(rbd_dev->image_format));
+	rbd_assert(!header->object_prefix && !header->snapc);
 	if (rbd_dev->image_format == 1)
-		return rbd_dev_v1_header_info(rbd_dev);
+		return rbd_dev_v1_header_info(rbd_dev, header, first_time);
-	return rbd_dev_v2_header_info(rbd_dev);
+	return rbd_dev_v2_header_info(rbd_dev, header, first_time);
 }
 /*
  */
 static void rbd_dev_unprobe(struct rbd_device *rbd_dev)
 {
-	struct rbd_image_header	*header;
 	rbd_dev_parent_put(rbd_dev);
 	rbd_object_map_free(rbd_dev);
 	rbd_dev_mapping_clear(rbd_dev);
 	/* Free dynamic fields from the header, then zero it out */
-	header = &rbd_dev->header;
+	rbd_image_header_cleanup(&rbd_dev->header);
-	ceph_put_snap_context(header->snapc);
-	kfree(header->snap_sizes);
-	kfree(header->snap_names);
-	kfree(header->object_prefix);
-	memset(header, 0, sizeof (*header));
 }
-static int rbd_dev_v2_header_onetime(struct rbd_device *rbd_dev)
+static int rbd_dev_v2_header_onetime(struct rbd_device *rbd_dev,
+				     struct rbd_image_header *header)
 {
 	int ret;
-	ret = rbd_dev_v2_object_prefix(rbd_dev);
+	ret = rbd_dev_v2_object_prefix(rbd_dev, &header->object_prefix);
 	if (ret)
-		goto out_err;
+		return ret;
 	/*
 	 * Get the and check features for the image.  Currently the
 	 * features are assumed to never change.
 	 */
-	ret = rbd_dev_v2_features(rbd_dev);
+	ret = _rbd_dev_v2_snap_features(rbd_dev, CEPH_NOSNAP,
+					rbd_is_ro(rbd_dev), &header->features);
 	if (ret)
-		goto out_err;
+		return ret;
 	/* If the image supports fancy striping, get its parameters */
-	if (rbd_dev->header.features & RBD_FEATURE_STRIPINGV2) {
+	if (header->features & RBD_FEATURE_STRIPINGV2) {
-		ret = rbd_dev_v2_striping_info(rbd_dev);
+		ret = rbd_dev_v2_striping_info(rbd_dev, &header->stripe_unit,
-		if (ret < 0)
+					       &header->stripe_count);
-			goto out_err;
+		if (ret)
+			return ret;
 	}
-	if (rbd_dev->header.features & RBD_FEATURE_DATA_POOL) {
+	if (header->features & RBD_FEATURE_DATA_POOL) {
-		ret = rbd_dev_v2_data_pool(rbd_dev);
+		ret = rbd_dev_v2_data_pool(rbd_dev, &header->data_pool_id);
 		if (ret)
-			goto out_err;
+			return ret;
 	}
-	rbd_init_layout(rbd_dev);
 	return 0;
-out_err:
-	rbd_dev->header.features = 0;
-	kfree(rbd_dev->header.object_prefix);
-	rbd_dev->header.object_prefix = NULL;
-	return ret;
 }
 /*
 	if (!depth)
 		down_write(&rbd_dev->header_rwsem);
-	ret = rbd_dev_header_info(rbd_dev);
+	ret = rbd_dev_header_info(rbd_dev, &rbd_dev->header, true);
 	if (ret) {
 		if (ret == -ENOENT && !need_watch)
 			rbd_print_dne(rbd_dev, false);
 		goto err_out_probe;
 	}
+	rbd_init_layout(rbd_dev);
 	/*
 	 * If this image is the one being mapped, we have pool name and
 	 * id, image name and id, and snap name - need to fill snap id.
 	}
 	if (rbd_dev->header.features & RBD_FEATURE_LAYERING) {
-		ret = rbd_dev_v2_parent_info(rbd_dev);
+		ret = rbd_dev_setup_parent(rbd_dev);
 		if (ret)
 			goto err_out_probe;
 	}
 	return ret;
 }
+static void rbd_dev_update_header(struct rbd_device *rbd_dev,
+				  struct rbd_image_header *header)
+{
+	rbd_assert(rbd_image_format_valid(rbd_dev->image_format));
+	rbd_assert(rbd_dev->header.object_prefix); /* !first_time */
+	if (rbd_dev->header.image_size != header->image_size) {
+		rbd_dev->header.image_size = header->image_size;
+		if (!rbd_is_snap(rbd_dev)) {
+			rbd_dev->mapping.size = header->image_size;
+			rbd_dev_update_size(rbd_dev);
+		}
+	}
+	ceph_put_snap_context(rbd_dev->header.snapc);
+	rbd_dev->header.snapc = header->snapc;
+	header->snapc = NULL;
+	if (rbd_dev->image_format == 1) {
+		kfree(rbd_dev->header.snap_names);
+		rbd_dev->header.snap_names = header->snap_names;
+		header->snap_names = NULL;
+		kfree(rbd_dev->header.snap_sizes);
+		rbd_dev->header.snap_sizes = header->snap_sizes;
+		header->snap_sizes = NULL;
+	}
+}
+static void rbd_dev_update_parent(struct rbd_device *rbd_dev,
+				  struct parent_image_info *pii)
+{
+	if (pii->pool_id == CEPH_NOPOOL || !pii->has_overlap) {
+		/*
+		 * Either the parent never existed, or we have
+		 * record of it but the image got flattened so it no
+		 * longer has a parent.  When the parent of a
+		 * layered image disappears we immediately set the
+		 * overlap to 0.  The effect of this is that all new
+		 * requests will be treated as if the image had no
+		 * parent.
+		 *
+		 * If !pii.has_overlap, the parent image spec is not
+		 * applicable.  It's there to avoid duplication in each
+		 * snapshot record.
+		 */
+		if (rbd_dev->parent_overlap) {
+			rbd_dev->parent_overlap = 0;
+			rbd_dev_parent_put(rbd_dev);
+			pr_info("%s: clone has been flattened\n",
+				rbd_dev->disk->disk_name);
+		}
+	} else {
+		rbd_assert(rbd_dev->parent_spec);
+		/*
+		 * Update the parent overlap.  If it became zero, issue
+		 * a warning as we will proceed as if there is no parent.
+		 */
+		if (!pii->overlap && rbd_dev->parent_overlap)
+			rbd_warn(rbd_dev,
+				 "clone has become standalone (overlap 0)");
+		rbd_dev->parent_overlap = pii->overlap;
+	}
+}
+static int rbd_dev_refresh(struct rbd_device *rbd_dev)
+{
+	struct rbd_image_header	header = { 0 };
+	struct parent_image_info pii = { 0 };
+	int ret;
+	dout("%s rbd_dev %p\n", __func__, rbd_dev);
+	ret = rbd_dev_header_info(rbd_dev, &header, false);
+	if (ret)
+		goto out;
+	/*
+	 * If there is a parent, see if it has disappeared due to the
+	 * mapped image getting flattened.
+	 */
+	if (rbd_dev->parent) {
+		ret = rbd_dev_v2_parent_info(rbd_dev, &pii);
+		if (ret)
+			goto out;
+	}
+	down_write(&rbd_dev->header_rwsem);
+	rbd_dev_update_header(rbd_dev, &header);
+	if (rbd_dev->parent)
+		rbd_dev_update_parent(rbd_dev, &pii);
+	up_write(&rbd_dev->header_rwsem);
+out:
+	rbd_parent_info_cleanup(&pii);
+	rbd_image_header_cleanup(&header);
+	return ret;
+}
 static ssize_t do_rbd_add(const char *buf, size_t count)
 {
 	struct rbd_device *rbd_dev = NULL;

drivers/bus/ti-sysc.c+22−9

 	SOC_2420,
 	SOC_2430,
 	SOC_3430,
+	SOC_AM35,
 	SOC_3630,
 	SOC_4430,
 	SOC_4460,
 	if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_SIDLE |
 				 SYSC_QUIRK_SWSUP_SIDLE_ACT)) {
 		best_mode = SYSC_IDLE_NO;
+		/* Clear WAKEUP */
+		if (regbits->enwkup_shift >= 0 &&
+		    ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
+			reg &= ~BIT(regbits->enwkup_shift);
 	} else {
 		best_mode = fls(ddata->cfg.sidlemodes) - 1;
 		if (best_mode > SYSC_IDLE_MASK) {
 		}
 	}
+	if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_SIDLE_ACT) {
+		/* Set WAKEUP */
+		if (regbits->enwkup_shift >= 0 &&
+		    ddata->cfg.sysc_val & BIT(regbits->enwkup_shift))
+			reg |= BIT(regbits->enwkup_shift);
+	}
 	reg &= ~(SYSC_IDLE_MASK << regbits->sidle_shift);
 	reg |= best_mode << regbits->sidle_shift;
 	if (regbits->autoidle_shift >= 0 &&
 static const struct sysc_revision_quirk sysc_revision_quirks[] = {
 	/* These drivers need to be fixed to not use pm_runtime_irq_safe() */
 	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000046, 0xffffffff,
-		   SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
+		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
 	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
-		   SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
+		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
 	/* Uarts on omap4 and later */
 	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff,
-		   SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
+		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
 	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,
-		   SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
+		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
 	SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47424e03, 0xffffffff,
-		   SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE),
+		   SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE),
 	/* Quirks that need to be set based on the module address */
 	SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff,
 		dev_warn(ddata->dev, "%s: timed out %08x !+ %08x\n",
 			 __func__, val, irq_mask);
-	if (sysc_soc->soc == SOC_3430) {
+	if (sysc_soc->soc == SOC_3430 || sysc_soc->soc == SOC_AM35) {
 		/* Clear DSS_SDI_CONTROL */
 		sysc_write(ddata, 0x44, 0);
 	}
 	if (ddata->cfg.srst_udelay)
-		usleep_range(ddata->cfg.srst_udelay,
+		fsleep(ddata->cfg.srst_udelay);
-			     ddata->cfg.srst_udelay * 2);
 	if (ddata->post_reset_quirk)
 		ddata->post_reset_quirk(ddata);
 static const struct soc_device_attribute sysc_soc_match[] = {
 	SOC_FLAG("OMAP242*", SOC_2420),
 	SOC_FLAG("OMAP243*", SOC_2430),
+	SOC_FLAG("AM35*", SOC_AM35),
 	SOC_FLAG("OMAP3[45]*", SOC_3430),
 	SOC_FLAG("OMAP3[67]*", SOC_3630),
 	SOC_FLAG("OMAP443*", SOC_4430),
 	 * can be dropped if we stop supporting old beagleboard revisions
 	 * A to B4 at some point.
 	 */
-	if (sysc_soc->soc == SOC_3430)
+	if (sysc_soc->soc == SOC_3430 || sysc_soc->soc == SOC_AM35)
 		error = -ENXIO;
 	else
 		error = -EBUSY;

drivers/char/agp/parisc-agp.c+0−2

@@ -394,8 +394,6 @@ find_quicksilver(struct device dev, void data) · 393 unmodified lines
394	static int __init	394	static int __init
395	parisc_agp_init(void)	395	parisc_agp_init(void)
396	{	396	{
397	extern struct sba_device *sba_list;
398
399	int err = -1;	397	int err = -1;
400	struct parisc_device sba = NULL, lba = NULL;	398	struct parisc_device sba = NULL, lba = NULL;
401	struct lba_device *lbadev = NULL;	399	struct lba_device *lbadev = NULL;

drivers/char/tpm/tpm-chip.c+1−1

@@ -33,7 +33,7 @@ const struct class tpm_class = { · 32 unmodified lines
33	.shutdown_pre = tpm_class_shutdown,	33	.shutdown_pre = tpm_class_shutdown,
34	};	34	};
35	const struct class tpmrm_class = {	35	const struct class tpmrm_class = {
36	.name = "tmprm",	36	.name = "tpmrm",
37	};	37	};
38	dev_t tpm_devt;	38	dev_t tpm_devt;
39		39

drivers/clk/clk-si521xx.c+5−4

 				    unsigned int val)
 {
 	struct i2c_client *i2c = context;
-	const u8 data[3] = { reg, 1, val };
+	const u8 data[2] = { reg, val };
 	const int count = ARRAY_SIZE(data);
 	int ret;
 static const struct regmap_config si521xx_regmap_config = {
 	.reg_bits = 8,
 	.val_bits = 8,
-	.cache_type = REGCACHE_NONE,
+	.cache_type = REGCACHE_FLAT,
 	.max_register = SI521XX_REG_DA,
 	.rd_table = &si521xx_readable_table,
 	.wr_table = &si521xx_writeable_table,
 {
 	const u16 chip_info = (u16)(uintptr_t)device_get_match_data(&client->dev);
 	const struct clk_parent_data clk_parent_data = { .index = 0 };
-	struct si521xx *si;
+	const u8 data[3] = { SI521XX_REG_BC, 1, 1 };
 	unsigned char name[6] = "DIFF0";
 	struct clk_init_data init = {};
+	struct si521xx *si;
 	int i, ret;
 	if (!chip_info)
 				     "Failed to allocate register map\n");
 	/* Always read back 1 Byte via I2C */
-	ret = regmap_write(si->regmap, SI521XX_REG_BC, 1);
+	ret = i2c_master_send(client, data, ARRAY_SIZE(data));
 	if (ret < 0)
 		return ret;

drivers/clk/clk-versaclock3.c+40−41

 	VC3_DIV5,
 };
-enum vc3_clk_mux {
-	VC3_DIFF2_MUX,
-	VC3_DIFF1_MUX,
-	VC3_SE3_MUX,
-	VC3_SE2_MUX,
-	VC3_SE1_MUX,
-};
 enum vc3_clk {
-	VC3_DIFF2,
-	VC3_DIFF1,
-	VC3_SE3,
-	VC3_SE2,
-	VC3_SE1,
 	VC3_REF,
+	VC3_SE1,
+	VC3_SE2,
+	VC3_SE3,
+	VC3_DIFF1,
+	VC3_DIFF2,
+};
+enum vc3_clk_mux {
+	VC3_SE1_MUX = VC3_SE1 - 1,
+	VC3_SE2_MUX = VC3_SE2 - 1,
+	VC3_SE3_MUX = VC3_SE3 - 1,
+	VC3_DIFF1_MUX = VC3_DIFF1 - 1,
+	VC3_DIFF2_MUX = VC3_DIFF2 - 1,
 };
 struct vc3_clk_data {
 		/* Determine best fractional part, which is 16 bit wide */
 		div_frc = rate % *parent_rate;
 		div_frc *= BIT(16) - 1;
-		do_div(div_frc, *parent_rate);
-		vc3->div_frc = (u32)div_frc;
+		vc3->div_frc = min_t(u64, div64_ul(div_frc, *parent_rate), U16_MAX);
 		rate = (*parent_rate *
-			(vc3->div_int * VC3_2_POW_16 + div_frc) / VC3_2_POW_16);
+			(vc3->div_int * VC3_2_POW_16 + vc3->div_frc) / VC3_2_POW_16);
 	} else {
 		rate = *parent_rate * vc3->div_int;
 	}
 };
 static struct vc3_hw_data clk_mux[] = {
-	[VC3_DIFF2_MUX] = {
+	[VC3_SE1_MUX] = {
 		.data = &(struct vc3_clk_data) {
-			.offs = VC3_DIFF2_CTRL_REG,
+			.offs = VC3_SE1_DIV4_CTRL,
-			.bitmsk = VC3_DIFF2_CTRL_REG_DIFF2_CLK_SEL
+			.bitmsk = VC3_SE1_DIV4_CTRL_SE1_CLK_SEL
 		},
 		.hw.init = &(struct clk_init_data){
-			.name = "diff2_mux",
+			.name = "se1_mux",
 			.ops = &vc3_clk_mux_ops,
 			.parent_hws = (const struct clk_hw *[]) {
-				&clk_div[VC3_DIV1].hw,
+				&clk_div[VC3_DIV5].hw,
-				&clk_div[VC3_DIV3].hw
+				&clk_div[VC3_DIV4].hw
 			},
 			.num_parents = 2,
 			.flags = CLK_SET_RATE_PARENT
 		}
 	},
-	[VC3_DIFF1_MUX] = {
+	[VC3_SE2_MUX] = {
 		.data = &(struct vc3_clk_data) {
-			.offs = VC3_DIFF1_CTRL_REG,
+			.offs = VC3_SE2_CTRL_REG0,
-			.bitmsk = VC3_DIFF1_CTRL_REG_DIFF1_CLK_SEL
+			.bitmsk = VC3_SE2_CTRL_REG0_SE2_CLK_SEL
 		},
 		.hw.init = &(struct clk_init_data){
-			.name = "diff1_mux",
+			.name = "se2_mux",
 			.ops = &vc3_clk_mux_ops,
 			.parent_hws = (const struct clk_hw *[]) {
-				&clk_div[VC3_DIV1].hw,
+				&clk_div[VC3_DIV5].hw,
-				&clk_div[VC3_DIV3].hw
+				&clk_div[VC3_DIV4].hw
 			},
 			.num_parents = 2,
 			.flags = CLK_SET_RATE_PARENT
 			.flags = CLK_SET_RATE_PARENT
 		}
 	},
-	[VC3_SE2_MUX] = {
+	[VC3_DIFF1_MUX] = {
 		.data = &(struct vc3_clk_data) {
-			.offs = VC3_SE2_CTRL_REG0,
+			.offs = VC3_DIFF1_CTRL_REG,
-			.bitmsk = VC3_SE2_CTRL_REG0_SE2_CLK_SEL
+			.bitmsk = VC3_DIFF1_CTRL_REG_DIFF1_CLK_SEL
 		},
 		.hw.init = &(struct clk_init_data){
-			.name = "se2_mux",
+			.name = "diff1_mux",
 			.ops = &vc3_clk_mux_ops,
 			.parent_hws = (const struct clk_hw *[]) {
-				&clk_div[VC3_DIV5].hw,
+				&clk_div[VC3_DIV1].hw,
-				&clk_div[VC3_DIV4].hw
+				&clk_div[VC3_DIV3].hw
 			},
 			.num_parents = 2,
 			.flags = CLK_SET_RATE_PARENT
 		}
 	},
-	[VC3_SE1_MUX] = {
+	[VC3_DIFF2_MUX] = {
 		.data = &(struct vc3_clk_data) {
-			.offs = VC3_SE1_DIV4_CTRL,
+			.offs = VC3_DIFF2_CTRL_REG,
-			.bitmsk = VC3_SE1_DIV4_CTRL_SE1_CLK_SEL
+			.bitmsk = VC3_DIFF2_CTRL_REG_DIFF2_CLK_SEL
 		},
 		.hw.init = &(struct clk_init_data){
-			.name = "se1_mux",
+			.name = "diff2_mux",
 			.ops = &vc3_clk_mux_ops,
 			.parent_hws = (const struct clk_hw *[]) {
-				&clk_div[VC3_DIV5].hw,
+				&clk_div[VC3_DIV1].hw,
-				&clk_div[VC3_DIV4].hw
+				&clk_div[VC3_DIV3].hw
 			},
 			.num_parents = 2,
 			.flags = CLK_SET_RATE_PARENT
 				name, 0, CLK_SET_RATE_PARENT, 1, 1);
 		else
 			clk_out[i] = devm_clk_hw_register_fixed_factor_parent_hw(dev,
-				name, &clk_mux[i].hw, CLK_SET_RATE_PARENT, 1, 1);
+				name, &clk_mux[i - 1].hw, CLK_SET_RATE_PARENT, 1, 1);
 		if (IS_ERR(clk_out[i]))
 			return PTR_ERR(clk_out[i]);

drivers/clk/sprd/ums512-clk.c+1−1

@@ -800,7 +800,7 @@ static SPRD_MUX_CLK_DATA(uart1_clk, "uart1-clk", uart_parents, · 799 unmodified lines
800	0x250, 0, 3, UMS512_MUX_FLAG);	800	0x250, 0, 3, UMS512_MUX_FLAG);
801		801
802	static const struct clk_parent_data thm_parents[] = {	802	static const struct clk_parent_data thm_parents[] = {
803	{ .fw_name = "ext-32m" },	803	{ .fw_name = "ext-32k" },
804	{ .hw = &clk_250k.hw },	804	{ .hw = &clk_250k.hw },
805	};	805	};
806	static SPRD_MUX_CLK_DATA(thm0_clk, "thm0-clk", thm_parents,	806	static SPRD_MUX_CLK_DATA(thm0_clk, "thm0-clk", thm_parents,

drivers/clk/tegra/clk-bpmp.c+1−1

@@ -159,7 +159,7 @@ static unsigned long tegra_bpmp_clk_recalc_rate(struct clk_hw *hw, · 158 unmodified lines
159		159
160	err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);	160	err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);
161	if (err < 0)	161	if (err < 0)
162	return err;	162	return 0;
163		163
164	return response.rate;	164	return response.rate;
165	}	165	}

drivers/comedi/Kconfig+35−68

 config COMEDI_PARPORT
 	tristate "Parallel port support"
-	depends on HAS_IOPORT
 	help
 	  Enable support for the standard parallel port.
 	  A cheap and easy way to get a few more digital I/O lines. Steal
 config COMEDI_SSV_DNP
 	tristate "SSV Embedded Systems DIL/Net-PC support"
 	depends on X86_32 || COMPILE_TEST
-	depends on HAS_IOPORT
 	help
 	  Enable support for SSV Embedded Systems DIL/Net-PC
 menuconfig COMEDI_ISA_DRIVERS
 	bool "Comedi ISA and PC/104 drivers"
-	depends on ISA
 	help
 	  Enable comedi ISA and PC/104 drivers to be built
 config COMEDI_PCL711
 	tristate "Advantech PCL-711/711b and ADlink ACL-8112 ISA card support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for Advantech PCL-711 and 711b, ADlink ACL-8112
 config COMEDI_PCL812
 	tristate "Advantech PCL-812/813 and ADlink ACL-8112/8113/8113/8216"
-	depends on HAS_IOPORT
 	select COMEDI_ISADMA if ISA_DMA_API
-	depends on COMEDI_8254
+	select COMEDI_8254
 	help
 	  Enable support for Advantech PCL-812/PG, PCL-813/B, ADLink
 	  ACL-8112DG/HG/PG, ACL-8113, ACL-8216, ICP DAS A-821PGH/PGL/PGL-NDA,
 config COMEDI_PCL816
 	tristate "Advantech PCL-814 and PCL-816 ISA card support"
-	depends on HAS_IOPORT
 	select COMEDI_ISADMA if ISA_DMA_API
-	depends on COMEDI_8254
+	select COMEDI_8254
 	help
 	  Enable support for Advantech PCL-814 and PCL-816 ISA cards
 config COMEDI_PCL818
 	tristate "Advantech PCL-718 and PCL-818 ISA card support"
-	depends on HAS_IOPORT
 	select COMEDI_ISADMA if ISA_DMA_API
-	depends on COMEDI_8254
+	select COMEDI_8254
 	help
 	  Enable support for Advantech PCL-818 ISA cards
 	  PCL-818L, PCL-818H, PCL-818HD, PCL-818HG, PCL-818 and PCL-718
 config COMEDI_AMPLC_DIO200_ISA
 	tristate "Amplicon PC212E/PC214E/PC215E/PC218E/PC272E"
-	depends on COMEDI_AMPLC_DIO200
+	select COMEDI_AMPLC_DIO200
 	help
 	  Enable support for Amplicon PC212E, PC214E, PC215E, PC218E and
 	  PC272E ISA DIO boards
 config COMEDI_DAS16M1
 	tristate "MeasurementComputing CIO-DAS16/M1DAS-16 ISA card support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	select COMEDI_8255
 	help
 	  Enable support for Measurement Computing CIO-DAS16/M1 ISA cards.
 config COMEDI_DAS08_ISA
 	tristate "DAS-08 compatible ISA and PC/104 card support"
-	depends on COMEDI_DAS08
+	select COMEDI_DAS08
 	help
 	  Enable support for Keithley Metrabyte/ComputerBoards DAS08
 	  and compatible ISA and PC/104 cards:
 config COMEDI_DAS16
 	tristate "DAS-16 compatible ISA and PC/104 card support"
-	depends on HAS_IOPORT
 	select COMEDI_ISADMA if ISA_DMA_API
-	depends on COMEDI_8254
+	select COMEDI_8254
 	select COMEDI_8255
 	help
 	  Enable support for Keithley Metrabyte/ComputerBoards DAS16
 config COMEDI_DAS800
 	tristate "DAS800 and compatible ISA card support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for Keithley Metrabyte DAS800 and compatible ISA cards
 	  Keithley Metrabyte DAS-800, DAS-801, DAS-802
 config COMEDI_DAS1800
 	tristate "DAS1800 and compatible ISA card support"
-	depends on HAS_IOPORT
 	select COMEDI_ISADMA if ISA_DMA_API
-	depends on COMEDI_8254
+	select COMEDI_8254
 	help
 	  Enable support for DAS1800 and compatible ISA cards
 	  Keithley Metrabyte DAS-1701ST, DAS-1701ST-DA, DAS-1701/AO,
 config COMEDI_DAS6402
 	tristate "DAS6402 and compatible ISA card support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for DAS6402 and compatible ISA cards
 	  Computerboards, Keithley Metrabyte DAS6402 and compatibles
 config COMEDI_AIO_AIO12_8
 	tristate "I/O Products PC/104 AIO12-8 Analog I/O Board support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	select COMEDI_8255
 	help
 	  Enable support for I/O Products PC/104 AIO12-8 Analog I/O Board
 config COMEDI_NI_AT_A2150
 	tristate "NI AT-A2150 ISA card support"
-	depends on HAS_IOPORT
 	select COMEDI_ISADMA if ISA_DMA_API
-	depends on COMEDI_8254
+	select COMEDI_8254
 	help
 	  Enable support for National Instruments AT-A2150 cards
 config COMEDI_NI_AT_AO
 	tristate "NI AT-AO-6/10 EISA card support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for National Instruments AT-AO-6/10 cards
 config COMEDI_NI_LABPC_ISA
 	tristate "NI Lab-PC and compatibles ISA support"
-	depends on COMEDI_NI_LABPC
+	select COMEDI_NI_LABPC
 	help
 	  Enable support for National Instruments Lab-PC and compatibles
 	  Lab-PC-1200, Lab-PC-1200AI, Lab-PC+.
 menuconfig COMEDI_PCI_DRIVERS
 	tristate "Comedi PCI drivers"
-	depends on PCI && HAS_IOPORT
+	depends on PCI
 	help
 	  Enable support for comedi PCI drivers.
 config COMEDI_ADL_PCI9111
 	tristate "ADLink PCI-9111HR support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for ADlink PCI9111 cards
 config COMEDI_ADL_PCI9118
 	tristate "ADLink PCI-9118DG, PCI-9118HG, PCI-9118HR support"
 	depends on HAS_DMA
-	depends on COMEDI_8254
+	select COMEDI_8254
 	help
 	  Enable support for ADlink PCI-9118DG, PCI-9118HG, PCI-9118HR cards
 config COMEDI_ADV_PCI1710
 	tristate "Advantech PCI-171x and PCI-1731 support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for Advantech PCI-1710, PCI-1710HG, PCI-1711,
 	  PCI-1713 and PCI-1731
 config COMEDI_ADV_PCI_DIO
 	tristate "Advantech PCI DIO card support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	select COMEDI_8255
 	help
 	  Enable support for Advantech PCI DIO cards
 config COMEDI_AMPLC_DIO200_PCI
 	tristate "Amplicon PCI215/PCI272/PCIe215/PCIe236/PCIe296 DIO support"
-	depends on COMEDI_AMPLC_DIO200
+	select COMEDI_AMPLC_DIO200
 	help
 	  Enable support for Amplicon PCI215, PCI272, PCIe215, PCIe236
 	  and PCIe296 DIO boards.
 config COMEDI_AMPLC_PCI224
 	tristate "Amplicon PCI224 and PCI234 support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for Amplicon PCI224 and PCI234 AO boards
 config COMEDI_AMPLC_PCI230
 	tristate "Amplicon PCI230 and PCI260 support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	select COMEDI_8255
 	help
 	  Enable support for Amplicon PCI230 and PCI260 Multifunction I/O
 config COMEDI_DAS08_PCI
 	tristate "DAS-08 PCI support"
-	depends on COMEDI_DAS08
+	select COMEDI_DAS08
 	help
 	  Enable support for PCI DAS-08 cards.
 config COMEDI_CB_PCIDAS
 	tristate "MeasurementComputing PCI-DAS support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	select COMEDI_8255
 	help
 	  Enable support for ComputerBoards/MeasurementComputing PCI-DAS with
 config COMEDI_CB_PCIMDAS
 	tristate "MeasurementComputing PCIM-DAS1602/16, PCIe-DAS1602/16 support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	select COMEDI_8255
 	help
 	  Enable support for ComputerBoards/MeasurementComputing PCI Migration
 config COMEDI_ME4000
 	tristate "Meilhaus ME-4000 support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for Meilhaus PCI data acquisition cards
 	  ME-4650, ME-4670i, ME-4680, ME-4680i and ME-4680is
 config COMEDI_NI_LABPC_PCI
 	tristate "NI Lab-PC PCI-1200 support"
-	depends on COMEDI_NI_LABPC
+	select COMEDI_NI_LABPC
 	help
 	  Enable support for National Instruments Lab-PC PCI-1200.
 config COMEDI_NI_PCIMIO
 	tristate "NI PCI-MIO-E series and M series support"
 	depends on HAS_DMA
-	depends on HAS_IOPORT
 	select COMEDI_NI_TIOCMD
 	select COMEDI_8255
 	help
 config COMEDI_RTD520
 	tristate "Real Time Devices PCI4520/DM7520 support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for Real Time Devices PCI4520/DM7520
 config COMEDI_CB_DAS16_CS
 	tristate "CB DAS16 series PCMCIA support"
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	help
 	  Enable support for the ComputerBoards/MeasurementComputing PCMCIA
 	  cards DAS16/16, PCM-DAS16D/12 and PCM-DAS16s/16
 config COMEDI_DAS08_CS
 	tristate "CB DAS08 PCMCIA support"
-	depends on COMEDI_DAS08
+	select COMEDI_DAS08
 	help
 	  Enable support for the ComputerBoards/MeasurementComputing DAS-08
 	  PCMCIA card
 config COMEDI_NI_DAQ_700_CS
 	tristate "NI DAQCard-700 PCMCIA support"
-	depends on HAS_IOPORT
 	help
 	  Enable support for the National Instruments PCMCIA DAQCard-700 DIO
 config COMEDI_NI_DAQ_DIO24_CS
 	tristate "NI DAQ-Card DIO-24 PCMCIA support"
-	depends on HAS_IOPORT
 	select COMEDI_8255
 	help
 	  Enable support for the National Instruments PCMCIA DAQ-Card DIO-24
 config COMEDI_NI_LABPC_CS
 	tristate "NI DAQCard-1200 PCMCIA support"
-	depends on COMEDI_NI_LABPC
+	select COMEDI_NI_LABPC
 	help
 	  Enable support for the National Instruments PCMCIA DAQCard-1200
 config COMEDI_NI_MIO_CS
 	tristate "NI DAQCard E series PCMCIA support"
-	depends on HAS_IOPORT
 	select COMEDI_NI_TIO
 	select COMEDI_8255
 	help
 config COMEDI_QUATECH_DAQP_CS
 	tristate "Quatech DAQP PCMCIA data capture card support"
-	depends on HAS_IOPORT
 	help
 	  Enable support for the Quatech DAQP PCMCIA data capture cards
 	  DAQP-208 and DAQP-308
 config COMEDI_8254
 	tristate
-	depends on HAS_IOPORT
 config COMEDI_8255
 	tristate
 config COMEDI_8255_SA
 	tristate "Standalone 8255 support"
-	depends on HAS_IOPORT
 	select COMEDI_8255
 	help
 	  Enable support for 8255 digital I/O as a standalone driver.
 	  called kcomedilib.
 config COMEDI_AMPLC_DIO200
-	depends on COMEDI_8254
+	select COMEDI_8254
 	tristate
 config COMEDI_AMPLC_PC236
 config COMEDI_DAS08
 	tristate
-	depends on COMEDI_8254
+	select COMEDI_8254
 	select COMEDI_8255
 config COMEDI_ISADMA
 config COMEDI_NI_LABPC
 	tristate
-	depends on HAS_IOPORT
+	select COMEDI_8254
-	depends on COMEDI_8254
 	select COMEDI_8255
 config COMEDI_NI_LABPC_ISADMA

drivers/cxl/acpi.c+2−2

 struct cxl_cxims_data {
 	int nr_maps;
-	u64 xormaps[];
+	u64 xormaps[] __counted_by(nr_maps);
 };
 /*
 			      GFP_KERNEL);
 	if (!cximsd)
 		return -ENOMEM;
+	cximsd->nr_maps = nr_maps;
 	memcpy(cximsd->xormaps, cxims->xormap_list,
 	       nr_maps * sizeof(*cximsd->xormaps));
-	cximsd->nr_maps = nr_maps;
 	cxlrd->platform_data = cximsd;
 	return 0;

drivers/cxl/core/mbox.c+12−11

 	for (i = 0; i < cel_entries; i++) {
 		u16 opcode = le16_to_cpu(cel_entry[i].opcode);
 		struct cxl_mem_command *cmd = cxl_mem_find_command(opcode);
+		int enabled = 0;
-		if (!cmd && (!cxl_is_poison_command(opcode) ||
+		if (cmd) {
-			     !cxl_is_security_command(opcode))) {
-			dev_dbg(dev,
-				"Opcode 0x%04x unsupported by driver\n", opcode);
-			continue;
-		}
-		if (cmd)
 			set_bit(cmd->info.id, mds->enabled_cmds);
+			enabled++;
+		}
-		if (cxl_is_poison_command(opcode))
+		if (cxl_is_poison_command(opcode)) {
 			cxl_set_poison_cmd_enabled(&mds->poison, opcode);
+			enabled++;
+		}
-		if (cxl_is_security_command(opcode))
+		if (cxl_is_security_command(opcode)) {
 			cxl_set_security_cmd_enabled(&mds->security, opcode);
+			enabled++;
+		}
-		dev_dbg(dev, "Opcode 0x%04x enabled\n", opcode);
+		dev_dbg(dev, "Opcode 0x%04x %s\n", opcode,
+			enabled ? "enabled" : "unsupported by driver");
 	}
 }

drivers/cxl/core/port.c+9−4

 // SPDX-License-Identifier: GPL-2.0-only
 /* Copyright(c) 2020 Intel Corporation. All rights reserved. */
+#include <linux/platform_device.h>
 #include <linux/memregion.h>
 #include <linux/workqueue.h>
 #include <linux/debugfs.h>
 	return cxl_setup_regs(map);
 }
-static inline int cxl_port_setup_regs(struct cxl_port *port,
+static int cxl_port_setup_regs(struct cxl_port *port,
-				      resource_size_t component_reg_phys)
+			resource_size_t component_reg_phys)
 {
+	if (dev_is_platform(port->uport_dev))
+		return 0;
 	return cxl_setup_comp_regs(&port->dev, &port->comp_map,
 				   component_reg_phys);
 }
-static inline int cxl_dport_setup_regs(struct cxl_dport *dport,
+static int cxl_dport_setup_regs(struct cxl_dport *dport,
-				       resource_size_t component_reg_phys)
+				resource_size_t component_reg_phys)
 {
+	if (dev_is_platform(dport->dport_dev))
+		return 0;
 	return cxl_setup_comp_regs(dport->dport_dev, &dport->comp_map,
 				   component_reg_phys);
 }

drivers/cxl/core/region.c+31−10

@@ -717,13 +717,35 @@ static int match_free_decoder(struct device dev, void data) · 716 unmodified lines
717	return 0;	717	return 0;
718	}	718	}
719		719
		720	static int match_auto_decoder(struct device dev, void data)
		721	{
		722	struct cxl_region_params *p = data;
		723	struct cxl_decoder *cxld;
		724	struct range *r;
		725
		726	if (!is_switch_decoder(dev))
		727	return 0;
		728
		729	cxld = to_cxl_decoder(dev);
		730	r = &cxld->hpa_range;
		731
		732	if (p->res && p->res->start == r->start && p->res->end == r->end)
		733	return 1;
		734
		735	return 0;
		736	}
		737
720	static struct cxl_decoder cxl_region_find_decoder(struct cxl_port port,	738	static struct cxl_decoder cxl_region_find_decoder(struct cxl_port port,
721	struct cxl_region *cxlr)	739	struct cxl_region *cxlr)
722	{	740	{
723	struct device *dev;	741	struct device *dev;
724	int id = 0;	742	int id = 0;
725		743
726	dev = device_find_child(&port->dev, &id, match_free_decoder);	744	if (test_bit(CXL_REGION_F_AUTO, &cxlr->flags))
		745	dev = device_find_child(&port->dev, &cxlr->params,
		746	match_auto_decoder);
		747	else
		748	dev = device_find_child(&port->dev, &id, match_free_decoder);
727	if (!dev)	749	if (!dev)
728	return NULL;	750	return NULL;
729	/*	751	/*
@@ -1154,16 +1176,15 @@ static int cxl_port_setup_targets(struct cxl_port *port, · 424 unmodified lines
1154	}	1176	}
1155		1177
1156	/*	1178	/*
1157	* If @parent_port is masking address bits, pick the next unused address	1179	* Interleave granularity is a multiple of @parent_port granularity.
1158	* bit to route @port's targets.	1180	* Multiplier is the parent port interleave ways.
1159	*/	1181	*/
1160	if (parent_iw > 1 && cxl_rr->nr_targets > 1) {	1182	rc = granularity_to_eig(parent_ig * parent_iw, &eig);
1161	u32 address_bit = max(peig + peiw, eiw + peig);	1183	if (rc) {
1162		1184	dev_dbg(&cxlr->dev,
1163	eig = address_bit - eiw + 1;	1185	"%s: invalid granularity calculation (%d * %d)\n",
1164	} else {	1186	dev_name(&parent_port->dev), parent_ig, parent_iw);
1165	eiw = peiw;	1187	return rc;
1166	eig = peig;
1167	}	1188	}
1168		1189
1169	rc = eig_to_granularity(eig, &ig);	1190	rc = eig_to_granularity(eig, &ig);

drivers/cxl/pci.c+3−4

 static int cxl_pci_ras_unmask(struct pci_dev *pdev)
 {
-	struct pci_host_bridge *host_bridge = pci_find_host_bridge(pdev->bus);
 	struct cxl_dev_state *cxlds = pci_get_drvdata(pdev);
 	void __iomem *addr;
 	u32 orig_val, val, mask;
 		return 0;
 	}
-	/* BIOS has CXL error control */
+	/* BIOS has PCIe AER error control */
-	if (!host_bridge->native_cxl_error)
+	if (!pcie_aer_is_native(pdev))
-		return -ENXIO;
+		return 0;
 	rc = pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &cap);
 	if (rc)

drivers/firewire/core-device.c+1−1

@@ -1211,7 +1211,7 @@ void fw_node_event(struct fw_card card, struct fw_node node, int event) · 1210 unmodified lines
1211	* without actually having a link.	1211	* without actually having a link.
1212	*/	1212	*/
1213	create:	1213	create:
1214	device = kzalloc(sizeof(*device), GFP_KERNEL);	1214	device = kzalloc(sizeof(*device), GFP_ATOMIC);
1215	if (device == NULL)	1215	if (device == NULL)
1216	break;	1216	break;
1217		1217

drivers/firewire/core-topology.c+1−1

@@ -101,7 +101,7 @@ static struct fw_node *fw_node_create(u32 sid, int port_count, int color) · 100 unmodified lines
101	{	101	{
102	struct fw_node *node;	102	struct fw_node *node;
103		103
104	node = kzalloc(struct_size(node, ports, port_count), GFP_KERNEL);	104	node = kzalloc(struct_size(node, ports, port_count), GFP_ATOMIC);
105	if (node == NULL)	105	if (node == NULL)
106	return NULL;	106	return NULL;
107		107

drivers/firewire/sbp2.c+6−3

  *
  * - power condition
  *   Set the power condition field in the START STOP UNIT commands sent by
- *   sd_mod on suspend, resume, and shutdown (if manage_start_stop is on).
+ *   sd_mod on suspend, resume, and shutdown (if manage_system_start_stop or
+ *   manage_runtime_start_stop is on).
  *   Some disks need this to spin down or to resume properly.
  *
  * - override internal blacklist
 	sdev->use_10_for_rw = 1;
-	if (sbp2_param_exclusive_login)
+	if (sbp2_param_exclusive_login) {
-		sdev->manage_start_stop = 1;
+		sdev->manage_system_start_stop = true;
+		sdev->manage_runtime_start_stop = true;
+	}
 	if (sdev->type == TYPE_ROM)
 		sdev->use_10_for_ms = 1;

drivers/firmware/arm_ffa/driver.c+14−2

 	return num_pages;
 }
+static u8 ffa_memory_attributes_get(u32 func_id)
+{
+	/*
+	 * For the memory lend or donate operation, if the receiver is a PE or
+	 * a proxy endpoint, the owner/sender must not specify the attributes
+	 */
+	if (func_id == FFA_FN_NATIVE(MEM_LEND) ||
+	    func_id == FFA_MEM_LEND)
+		return 0;
+	return FFA_MEM_NORMAL | FFA_MEM_WRITE_BACK | FFA_MEM_INNER_SHAREABLE;
+}
 static int
 ffa_setup_and_transmit(u32 func_id, void *buffer, u32 max_fragsize,
 		       struct ffa_mem_ops_args *args)
 	mem_region->tag = args->tag;
 	mem_region->flags = args->flags;
 	mem_region->sender_id = drv_info->vm_id;
-	mem_region->attributes = FFA_MEM_NORMAL | FFA_MEM_WRITE_BACK |
+	mem_region->attributes = ffa_memory_attributes_get(func_id);
-				 FFA_MEM_INNER_SHAREABLE;
 	ep_mem_access = &mem_region->ep_mem_access[0];
 	for (idx = 0; idx < args->nattrs; idx++, ep_mem_access++) {

drivers/firmware/arm_scmi/perf.c+2−2

 	if (!pinfo)
 		return -ENOMEM;
+	pinfo->version = version;
 	ret = scmi_perf_attributes_get(ph, pinfo);
 	if (ret)
 		return ret;
 	if (ret)
 		return ret;
-	pinfo->version = version;
 	return ph->set_priv(ph, pinfo);
 }

drivers/firmware/cirrus/cs_dsp.c+17−17

drivers/firmware/efi/efi.c+29−3

@@ -623,6 +623,34 @@ static __init int match_config_table(const efi_guid_t *guid, · 622 unmodified lines
623	return 0;	623	return 0;
624	}	624	}
625		625
		626	/**
		627	* reserve_unaccepted - Map and reserve unaccepted configuration table
		628	* @unaccepted: Pointer to unaccepted memory table
		629	*
		630	* memblock_add() makes sure that the table is mapped in direct mapping. During
		631	* normal boot it happens automatically because the table is allocated from
		632	* usable memory. But during crashkernel boot only memory specifically reserved
		633	* for crash scenario is mapped. memblock_add() forces the table to be mapped
		634	* in crashkernel case.
		635	*
		636	* Align the range to the nearest page borders. Ranges smaller than page size
		637	* are not going to be mapped.
		638	*
		639	* memblock_reserve() makes sure that future allocations will not touch the
		640	* table.
		641	*/
		642
		643	static __init void reserve_unaccepted(struct efi_unaccepted_memory *unaccepted)
		644	{
		645	phys_addr_t start, size;
		646
		647	start = PAGE_ALIGN_DOWN(efi.unaccepted);
		648	size = PAGE_ALIGN(sizeof(*unaccepted) + unaccepted->size);
		649
		650	memblock_add(start, size);
		651	memblock_reserve(start, size);
		652	}
		653
626	int __init efi_config_parse_tables(const efi_config_table_t *config_tables,	654	int __init efi_config_parse_tables(const efi_config_table_t *config_tables,
627	int count,	655	int count,
628	const efi_config_table_type_t *arch_tables)	656	const efi_config_table_type_t *arch_tables)
@@ -751,11 +779,9 @@ int __init efi_config_parse_tables(const efi_config_table_t *config_tables, · 122 unmodified lines
751		779
752	unaccepted = early_memremap(efi.unaccepted, sizeof(*unaccepted));	780	unaccepted = early_memremap(efi.unaccepted, sizeof(*unaccepted));
753	if (unaccepted) {	781	if (unaccepted) {
754	unsigned long size;
755		782
756	if (unaccepted->version == 1) {	783	if (unaccepted->version == 1) {
757	size = sizeof(*unaccepted) + unaccepted->size;	784	reserve_unaccepted(unaccepted);
758	memblock_reserve(efi.unaccepted, size);
759	} else {	785	} else {
760	efi.unaccepted = EFI_INVALID_TABLE_ADDR;	786	efi.unaccepted = EFI_INVALID_TABLE_ADDR;
761	}	787	}

drivers/firmware/efi/libstub/unaccepted_memory.c+1−1

@@ -62,7 +62,7 @@ efi_status_t allocate_unaccepted_bitmap(__u32 nr_desc, · 61 unmodified lines
62	bitmap_size = DIV_ROUND_UP(unaccepted_end - unaccepted_start,	62	bitmap_size = DIV_ROUND_UP(unaccepted_end - unaccepted_start,
63	EFI_UNACCEPTED_UNIT_SIZE * BITS_PER_BYTE);	63	EFI_UNACCEPTED_UNIT_SIZE * BITS_PER_BYTE);
64		64
65	status = efi_bs_call(allocate_pool, EFI_LOADER_DATA,	65	status = efi_bs_call(allocate_pool, EFI_ACPI_RECLAIM_MEMORY,
66	sizeof(*unaccepted_table) + bitmap_size,	66	sizeof(*unaccepted_table) + bitmap_size,
67	(void **)&unaccepted_table);	67	(void **)&unaccepted_table);
68	if (status != EFI_SUCCESS) {	68	if (status != EFI_SUCCESS) {

drivers/firmware/imx/imx-dsp.c+1−0

@@ -114,6 +114,7 @@ static int imx_dsp_setup_channels(struct imx_dsp_ipc *dsp_ipc) · 113 unmodified lines
114	dsp_chan->idx = i % 2;	114	dsp_chan->idx = i % 2;
115	dsp_chan->ch = mbox_request_channel_byname(cl, chan_name);	115	dsp_chan->ch = mbox_request_channel_byname(cl, chan_name);
116	if (IS_ERR(dsp_chan->ch)) {	116	if (IS_ERR(dsp_chan->ch)) {
		117	kfree(dsp_chan->name);
117	ret = PTR_ERR(dsp_chan->ch);	118	ret = PTR_ERR(dsp_chan->ch);
118	if (ret != -EPROBE_DEFER)	119	if (ret != -EPROBE_DEFER)
119	dev_err(dev, "Failed to request mbox chan %s ret %d\n",	120	dev_err(dev, "Failed to request mbox chan %s ret %d\n",

drivers/gpio/gpio-pmic-eic-sprd.c+1−0

@@ -352,6 +352,7 @@ static int sprd_pmic_eic_probe(struct platform_device *pdev) · 351 unmodified lines
352	pmic_eic->chip.set_config = sprd_pmic_eic_set_config;	352	pmic_eic->chip.set_config = sprd_pmic_eic_set_config;
353	pmic_eic->chip.set = sprd_pmic_eic_set;	353	pmic_eic->chip.set = sprd_pmic_eic_set;
354	pmic_eic->chip.get = sprd_pmic_eic_get;	354	pmic_eic->chip.get = sprd_pmic_eic_get;
		355	pmic_eic->chip.can_sleep = true;
355		356
356	irq = &pmic_eic->chip.irq;	357	irq = &pmic_eic->chip.irq;
357	gpio_irq_chip_set_chip(irq, &pmic_eic_irq_chip);	358	gpio_irq_chip_set_chip(irq, &pmic_eic_irq_chip);

drivers/gpio/gpio-sim.c+23−37

 #include <linux/irq.h>
 #include <linux/irq_sim.h>
 #include <linux/list.h>
+#include <linux/minmax.h>
 #include <linux/mod_devicetable.h>
 #include <linux/module.h>
 #include <linux/mutex.h>
 	return sprintf(page, "%c\n", live ? '1' : '0');
 }
-static char **gpio_sim_make_line_names(struct gpio_sim_bank *bank,
+static unsigned int gpio_sim_get_line_names_size(struct gpio_sim_bank *bank)
-				       unsigned int *line_names_size)
 {
-	unsigned int max_offset = 0;
-	bool has_line_names = false;
 	struct gpio_sim_line *line;
-	char **line_names;
+	unsigned int size = 0;
 	list_for_each_entry(line, &bank->line_list, siblings) {
-		if (line->offset >= bank->num_lines)
+		if (!line->name || (line->offset >= bank->num_lines))
 			continue;
-		if (line->name) {
+		size = max(size, line->offset + 1);
-			if (line->offset > max_offset)
-				max_offset = line->offset;
-			/*
-			 * max_offset can stay at 0 so it's not an indicator
-			 * of whether line names were configured at all.
-			 */
-			has_line_names = true;
-		}
 	}
-	if (!has_line_names)
+	return size;
-		/*
+}
-		 * This is not an error - NULL means, there are no line
-		 * names configured.
-		 */
-		return NULL;
-	*line_names_size = max_offset + 1;
-	line_names = kcalloc(*line_names_size, sizeof(*line_names), GFP_KERNEL);
+static void
-	if (!line_names)
+gpio_sim_set_line_names(struct gpio_sim_bank *bank, char **line_names)
-		return ERR_PTR(-ENOMEM);
+{
+	struct gpio_sim_line *line;
 	list_for_each_entry(line, &bank->line_list, siblings) {
-		if (line->offset >= bank->num_lines)
+		if (!line->name || (line->offset >= bank->num_lines))
 			continue;
-		if (line->name && (line->offset <= max_offset))
+		line_names[line->offset] = line->name;
-			line_names[line->offset] = line->name;
 	}
-	return line_names;
 }
 static void gpio_sim_remove_hogs(struct gpio_sim_device *dev)
 			  struct fwnode_handle *parent)
 {
 	struct property_entry properties[GPIO_SIM_PROP_MAX];
-	unsigned int prop_idx = 0, line_names_size = 0;
+	unsigned int prop_idx = 0, line_names_size;
 	char **line_names __free(kfree) = NULL;
 	memset(properties, 0, sizeof(properties));
 		properties[prop_idx++] = PROPERTY_ENTRY_STRING("gpio-sim,label",
 							       bank->label);
-	line_names = gpio_sim_make_line_names(bank, &line_names_size);
+	line_names_size = gpio_sim_get_line_names_size(bank);
-	if (IS_ERR(line_names))
+	if (line_names_size) {
-		return ERR_CAST(line_names);
+		line_names = kcalloc(line_names_size, sizeof(*line_names),
+				     GFP_KERNEL);
+		if (!line_names)
+			return ERR_PTR(-ENOMEM);
+		gpio_sim_set_line_names(bank, line_names);
-	if (line_names)
 		properties[prop_idx++] = PROPERTY_ENTRY_STRING_ARRAY_LEN(
 						"gpio-line-names",
 						line_names, line_names_size);
+	}
 	return fwnode_create_software_node(properties, parent);
 }

drivers/gpio/gpio-tb10x.c+5−1

 				handle_edge_irq, IRQ_NOREQUEST, IRQ_NOPROBE,
 				IRQ_GC_INIT_MASK_CACHE);
 		if (ret)
-			return ret;
+			goto err_remove_domain;
 		gc = tb10x_gpio->domain->gc->gc[0];
 		gc->reg_base                         = tb10x_gpio->base;
 	}
 	return 0;
+err_remove_domain:
+	irq_domain_remove(tb10x_gpio->domain);
+	return ret;
 }
 static int tb10x_gpio_remove(struct platform_device *pdev)

drivers/gpio/gpio-timberdale.c+3−2

 	unsigned offset, bool enabled)
 {
 	struct timbgpio *tgpio = gpiochip_get_data(gpio);
+	unsigned long flags;
 	u32 reg;
-	spin_lock(&tgpio->lock);
+	spin_lock_irqsave(&tgpio->lock, flags);
 	reg = ioread32(tgpio->membase + offset);
 	if (enabled)
 		reg &= ~(1 << index);
 	iowrite32(reg, tgpio->membase + offset);
-	spin_unlock(&tgpio->lock);
+	spin_unlock_irqrestore(&tgpio->lock, flags);
 	return 0;
 }

drivers/gpu/drm/Kconfig+1−1

@@ -136,7 +136,7 @@ config DRM_FBDEV_EMULATION · 135 unmodified lines
136	bool "Enable legacy fbdev support for your modesetting driver"	136	bool "Enable legacy fbdev support for your modesetting driver"
137	depends on DRM	137	depends on DRM
138	select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE	138	select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE
139	default y	139	default FB
140	help	140	help
141	Choose this option if you have a need for the legacy fbdev	141	Choose this option if you have a need for the legacy fbdev
142	support. Note that this support also provides the linux console	142	support. Note that this support also provides the linux console

drivers/gpu/drm/amd/amdgpu/amdgpu.h+0−1

@@ -1293,7 +1293,6 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev, · 1292 unmodified lines
1293	void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);	1293	void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
1294	int amdgpu_device_pci_reset(struct amdgpu_device *adev);	1294	int amdgpu_device_pci_reset(struct amdgpu_device *adev);
1295	bool amdgpu_device_need_post(struct amdgpu_device *adev);	1295	bool amdgpu_device_need_post(struct amdgpu_device *adev);
1296	bool amdgpu_sg_display_supported(struct amdgpu_device *adev);
1297	bool amdgpu_device_pcie_dynamic_switching_supported(void);	1296	bool amdgpu_device_pcie_dynamic_switching_supported(void);
1298	bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);	1297	bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
1299	bool amdgpu_device_aspm_support_quirk(void);	1298	bool amdgpu_device_aspm_support_quirk(void);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c+1−1

@@ -478,7 +478,7 @@ void amdgpu_amdkfd_get_cu_info(struct amdgpu_device adev, struct kfd_cu_info c · 477 unmodified lines
478	cu_info->cu_active_number = acu_info.number;	478	cu_info->cu_active_number = acu_info.number;
479	cu_info->cu_ao_mask = acu_info.ao_cu_mask;	479	cu_info->cu_ao_mask = acu_info.ao_cu_mask;
480	memcpy(&cu_info->cu_bitmap[0], &acu_info.bitmap[0],	480	memcpy(&cu_info->cu_bitmap[0], &acu_info.bitmap[0],
481	sizeof(acu_info.bitmap));	481	sizeof(cu_info->cu_bitmap));
482	cu_info->num_shader_engines = adev->gfx.config.max_shader_engines;	482	cu_info->num_shader_engines = adev->gfx.config.max_shader_engines;
483	cu_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;	483	cu_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;
484	cu_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh;	484	cu_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c+1−2

@@ -980,8 +980,7 @@ void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev, · 979 unmodified lines
980	uint32_t wait_times,	980	uint32_t wait_times,
981	uint32_t grace_period,	981	uint32_t grace_period,
982	uint32_t *reg_offset,	982	uint32_t *reg_offset,
983	uint32_t *reg_data,	983	uint32_t *reg_data)
984	uint32_t inst)
985	{	984	{
986	*reg_data = wait_times;	985	*reg_data = wait_times;
987		986

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h+1−2

@@ -55,5 +55,4 @@ void kgd_gfx_v10_build_grace_period_packet_info(struct amdgpu_device *adev, · 54 unmodified lines
55	uint32_t wait_times,	55	uint32_t wait_times,
56	uint32_t grace_period,	56	uint32_t grace_period,
57	uint32_t *reg_offset,	57	uint32_t *reg_offset,
58	uint32_t *reg_data,	58	uint32_t *reg_data);
59	uint32_t inst);

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c+2−4

 		uint32_t wait_times,
 		uint32_t grace_period,
 		uint32_t *reg_offset,
-		uint32_t *reg_data,
+		uint32_t *reg_data)
-		uint32_t inst)
 {
 	*reg_data = wait_times;
 			SCH_WAVE,
 			grace_period);
-	*reg_offset = SOC15_REG_OFFSET(GC, GET_INST(GC, inst),
+	*reg_offset = SOC15_REG_OFFSET(GC, 0, mmCP_IQ_WAIT_TIME2);
-			mmCP_IQ_WAIT_TIME2);
 }
 void kgd_gfx_v9_program_trap_handler_settings(struct amdgpu_device *adev,

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h+1−2

@@ -100,5 +100,4 @@ void kgd_gfx_v9_build_grace_period_packet_info(struct amdgpu_device *adev, · 99 unmodified lines
100	uint32_t wait_times,	100	uint32_t wait_times,
101	uint32_t grace_period,	101	uint32_t grace_period,
102	uint32_t *reg_offset,	102	uint32_t *reg_offset,
103	uint32_t *reg_data,	103	uint32_t *reg_data);
104	uint32_t inst);

drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c+1−1

@@ -1776,7 +1776,7 @@ static ssize_t amdgpu_atombios_get_vbios_version(struct device *dev, · 1775 unmodified lines
1776	struct amdgpu_device *adev = drm_to_adev(ddev);	1776	struct amdgpu_device *adev = drm_to_adev(ddev);
1777	struct atom_context *ctx = adev->mode_info.atom_context;	1777	struct atom_context *ctx = adev->mode_info.atom_context;
1778		1778
1779	return sysfs_emit(buf, "%s\n", ctx->vbios_ver_str);	1779	return sysfs_emit(buf, "%s\n", ctx->vbios_pn);
1780	}	1780	}
1781		1781
1782	static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version,	1782	static DEVICE_ATTR(vbios_version, 0444, amdgpu_atombios_get_vbios_version,

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+0−26

@@ -1244,32 +1244,6 @@ bool amdgpu_device_need_post(struct amdgpu_device *adev) · 1243 unmodified lines
1244	return true;	1244	return true;
1245	}	1245	}
1246		1246
1247	/*
1248	* On APUs with >= 64GB white flickering has been observed w/ SG enabled.
1249	* Disable S/G on such systems until we have a proper fix.
1250	* https://gitlab.freedesktop.org/drm/amd/-/issues/2354
1251	* https://gitlab.freedesktop.org/drm/amd/-/issues/2735
1252	*/
1253	bool amdgpu_sg_display_supported(struct amdgpu_device *adev)
1254	{
1255	switch (amdgpu_sg_display) {
1256	case -1:
1257	break;
1258	case 0:
1259	return false;
1260	case 1:
1261	return true;
1262	default:
1263	return false;
1264	}
1265	if ((totalram_pages() << (PAGE_SHIFT - 10)) +
1266	(adev->gmc.real_vram_size / 1024) >= 64000000) {
1267	DRM_WARN("Disabling S/G due to >=64GB RAM\n");
1268	return false;
1269	}
1270	return true;
1271	}
1272
1273	/*	1247	/*
1274	* Intel hosts such as Raptor Lake and Sapphire Rapids don't support dynamic	1248	* Intel hosts such as Raptor Lake and Sapphire Rapids don't support dynamic
1275	* speed switching. Until we have confirmation from Intel that a specific host	1249	* speed switching. Until we have confirmation from Intel that a specific host

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h+2−1

 #define AMDGPU_GFX_LBPW_DISABLED_MODE		0x00000008L
 #define AMDGPU_MAX_GC_INSTANCES		8
+#define KGD_MAX_QUEUES			128
 #define AMDGPU_MAX_GFX_QUEUES KGD_MAX_QUEUES
 #define AMDGPU_MAX_COMPUTE_QUEUES KGD_MAX_QUEUES
 	uint32_t number;
 	uint32_t ao_cu_mask;
 	uint32_t ao_cu_bitmap[4][4];
-	uint32_t bitmap[4][4];
+	uint32_t bitmap[AMDGPU_MAX_GC_INSTANCES][4][4];
 };
 struct amdgpu_gfx_ras {

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+12−7

 		memcpy(&dev_info->cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0],
 		       sizeof(adev->gfx.cu_info.ao_cu_bitmap));
 		memcpy(&dev_info->cu_bitmap[0], &adev->gfx.cu_info.bitmap[0],
-		       sizeof(adev->gfx.cu_info.bitmap));
+		       sizeof(dev_info->cu_bitmap));
 		dev_info->vram_type = adev->gmc.vram_type;
 		dev_info->vram_bit_width = adev->gmc.vram_width;
 		dev_info->vce_harvest_config = adev->vce.harvest_config;
 			struct atom_context *atom_context;
 			atom_context = adev->mode_info.atom_context;
-			memcpy(vbios_info.name, atom_context->name, sizeof(atom_context->name));
+			if (atom_context) {
-			memcpy(vbios_info.vbios_pn, atom_context->vbios_pn, sizeof(atom_context->vbios_pn));
+				memcpy(vbios_info.name, atom_context->name,
-			vbios_info.version = atom_context->version;
+				       sizeof(atom_context->name));
-			memcpy(vbios_info.vbios_ver_str, atom_context->vbios_ver_str,
+				memcpy(vbios_info.vbios_pn, atom_context->vbios_pn,
-						sizeof(atom_context->vbios_ver_str));
+				       sizeof(atom_context->vbios_pn));
-			memcpy(vbios_info.date, atom_context->date, sizeof(atom_context->date));
+				vbios_info.version = atom_context->version;
+				memcpy(vbios_info.vbios_ver_str, atom_context->vbios_ver_str,
+				       sizeof(atom_context->vbios_ver_str));
+				memcpy(vbios_info.date, atom_context->date,
+				       sizeof(atom_context->date));
+			}
 			return copy_to_user(out, &vbios_info,
 						min((size_t)size, sizeof(vbios_info))) ? -EFAULT : 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c+5−2

 				enable ? "enable":"disable",
 				get_ras_block_str(head),
 				amdgpu_ras_is_poison_mode_supported(adev), ret);
+			kfree(info);
 			return ret;
 		}
 	info->ce_count = obj->err_data.ce_count;
 	if (err_data.ce_count) {
-		if (adev->smuio.funcs &&
+		if (!adev->aid_mask &&
+		    adev->smuio.funcs &&
 		    adev->smuio.funcs->get_socket_id &&
 		    adev->smuio.funcs->get_die_id) {
 			dev_info(adev->dev, "socket: %d, die: %d "
 		}
 	}
 	if (err_data.ue_count) {
-		if (adev->smuio.funcs &&
+		if (!adev->aid_mask &&
+		    adev->smuio.funcs &&
 		    adev->smuio.funcs->get_socket_id &&
 		    adev->smuio.funcs->get_die_id) {
 			dev_info(adev->dev, "socket: %d, die: %d "

drivers/gpu/drm/amd/amdgpu/amdgpu_sa.c+1−1

@@ -81,7 +81,7 @@ int amdgpu_sa_bo_new(struct amdgpu_sa_manager *sa_manager, · 80 unmodified lines
81	unsigned int size)	81	unsigned int size)
82	{	82	{
83	struct drm_suballoc *sa = drm_suballoc_new(&sa_manager->base, size,	83	struct drm_suballoc *sa = drm_suballoc_new(&sa_manager->base, size,
84	GFP_KERNEL, true, 0);	84	GFP_KERNEL, false, 0);
85		85
86	if (IS_ERR(sa)) {	86	if (IS_ERR(sa)) {
87	*sa_bo = NULL;	87	*sa_bo = NULL;

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+1−1

@@ -9449,7 +9449,7 @@ static int gfx_v10_0_get_cu_info(struct amdgpu_device *adev, · 9448 unmodified lines
9449	gfx_v10_0_set_user_wgp_inactive_bitmap_per_sh(	9449	gfx_v10_0_set_user_wgp_inactive_bitmap_per_sh(
9450	adev, disable_masks[i * 2 + j]);	9450	adev, disable_masks[i * 2 + j]);
9451	bitmap = gfx_v10_0_get_cu_active_bitmap_per_sh(adev);	9451	bitmap = gfx_v10_0_get_cu_active_bitmap_per_sh(adev);
9452	cu_info->bitmap[i][j] = bitmap;	9452	cu_info->bitmap[0][i][j] = bitmap;
9453		9453
9454	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {	9454	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {
9455	if (bitmap & mask) {	9455	if (bitmap & mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c+1−1

@@ -6368,7 +6368,7 @@ static int gfx_v11_0_get_cu_info(struct amdgpu_device *adev, · 6367 unmodified lines
6368	* SE6: {SH0,SH1} --> {bitmap[2][2], bitmap[2][3]}	6368	* SE6: {SH0,SH1} --> {bitmap[2][2], bitmap[2][3]}
6369	* SE7: {SH0,SH1} --> {bitmap[3][2], bitmap[3][3]}	6369	* SE7: {SH0,SH1} --> {bitmap[3][2], bitmap[3][3]}
6370	*/	6370	*/
6371	cu_info->bitmap[i % 4][j + (i / 4) * 2] = bitmap;	6371	cu_info->bitmap[0][i % 4][j + (i / 4) * 2] = bitmap;
6372		6372
6373	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {	6373	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {
6374	if (bitmap & mask)	6374	if (bitmap & mask)

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c+1−1

@@ -3577,7 +3577,7 @@ static void gfx_v6_0_get_cu_info(struct amdgpu_device *adev) · 3576 unmodified lines
3577	gfx_v6_0_set_user_cu_inactive_bitmap(	3577	gfx_v6_0_set_user_cu_inactive_bitmap(
3578	adev, disable_masks[i * 2 + j]);	3578	adev, disable_masks[i * 2 + j]);
3579	bitmap = gfx_v6_0_get_cu_enabled(adev);	3579	bitmap = gfx_v6_0_get_cu_enabled(adev);
3580	cu_info->bitmap[i][j] = bitmap;	3580	cu_info->bitmap[0][i][j] = bitmap;
3581		3581
3582	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {	3582	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {
3583	if (bitmap & mask) {	3583	if (bitmap & mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c+1−1

@@ -5119,7 +5119,7 @@ static void gfx_v7_0_get_cu_info(struct amdgpu_device *adev) · 5118 unmodified lines
5119	gfx_v7_0_set_user_cu_inactive_bitmap(	5119	gfx_v7_0_set_user_cu_inactive_bitmap(
5120	adev, disable_masks[i * 2 + j]);	5120	adev, disable_masks[i * 2 + j]);
5121	bitmap = gfx_v7_0_get_cu_active_bitmap(adev);	5121	bitmap = gfx_v7_0_get_cu_active_bitmap(adev);
5122	cu_info->bitmap[i][j] = bitmap;	5122	cu_info->bitmap[0][i][j] = bitmap;
5123		5123
5124	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {	5124	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {
5125	if (bitmap & mask) {	5125	if (bitmap & mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+1−1

@@ -7121,7 +7121,7 @@ static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev) · 7120 unmodified lines
7121	gfx_v8_0_set_user_cu_inactive_bitmap(	7121	gfx_v8_0_set_user_cu_inactive_bitmap(
7122	adev, disable_masks[i * 2 + j]);	7122	adev, disable_masks[i * 2 + j]);
7123	bitmap = gfx_v8_0_get_cu_active_bitmap(adev);	7123	bitmap = gfx_v8_0_get_cu_active_bitmap(adev);
7124	cu_info->bitmap[i][j] = bitmap;	7124	cu_info->bitmap[0][i][j] = bitmap;
7125		7125
7126	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) {	7126	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) {
7127	if (bitmap & mask) {	7127	if (bitmap & mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c+2−2

@@ -1499,7 +1499,7 @@ static void gfx_v9_0_init_always_on_cu_mask(struct amdgpu_device *adev) · 1498 unmodified lines
1499	amdgpu_gfx_select_se_sh(adev, i, j, 0xffffffff, 0);	1499	amdgpu_gfx_select_se_sh(adev, i, j, 0xffffffff, 0);
1500		1500
1501	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) {	1501	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) {
1502	if (cu_info->bitmap[i][j] & mask) {	1502	if (cu_info->bitmap[0][i][j] & mask) {
1503	if (counter == pg_always_on_cu_num)	1503	if (counter == pg_always_on_cu_num)
1504	WREG32_SOC15(GC, 0, mmRLC_PG_ALWAYS_ON_CU_MASK, cu_bitmap);	1504	WREG32_SOC15(GC, 0, mmRLC_PG_ALWAYS_ON_CU_MASK, cu_bitmap);
1505	if (counter < always_on_cu_num)	1505	if (counter < always_on_cu_num)
@@ -7233,7 +7233,7 @@ static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev, · 5727 unmodified lines
7233	* SE6,SH0 --> bitmap[2][1]	7233	* SE6,SH0 --> bitmap[2][1]
7234	* SE7,SH0 --> bitmap[3][1]	7234	* SE7,SH0 --> bitmap[3][1]
7235	*/	7235	*/
7236	cu_info->bitmap[i % 4][j + i / 4] = bitmap;	7236	cu_info->bitmap[0][i % 4][j + i / 4] = bitmap;
7237		7237
7238	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) {	7238	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k ++) {
7239	if (bitmap & mask) {	7239	if (bitmap & mask) {

drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c+34−42

@@ -4259,7 +4259,7 @@ static void gfx_v9_4_3_set_gds_init(struct amdgpu_device *adev) · 4258 unmodified lines
4259	}	4259	}
4260		4260
4261	static void gfx_v9_4_3_set_user_cu_inactive_bitmap(struct amdgpu_device *adev,	4261	static void gfx_v9_4_3_set_user_cu_inactive_bitmap(struct amdgpu_device *adev,
4262	u32 bitmap)	4262	u32 bitmap, int xcc_id)
4263	{	4263	{
4264	u32 data;	4264	u32 data;
4265		4265
@@ -4269,15 +4269,15 @@ static void gfx_v9_4_3_set_user_cu_inactive_bitmap(struct amdgpu_device *adev, · 3 unmodified lines
4269	data = bitmap << GC_USER_SHADER_ARRAY_CONFIG__INACTIVE_CUS__SHIFT;	4269	data = bitmap << GC_USER_SHADER_ARRAY_CONFIG__INACTIVE_CUS__SHIFT;
4270	data &= GC_USER_SHADER_ARRAY_CONFIG__INACTIVE_CUS_MASK;	4270	data &= GC_USER_SHADER_ARRAY_CONFIG__INACTIVE_CUS_MASK;
4271		4271
4272	WREG32_SOC15(GC, GET_INST(GC, 0), regGC_USER_SHADER_ARRAY_CONFIG, data);	4272	WREG32_SOC15(GC, GET_INST(GC, xcc_id), regGC_USER_SHADER_ARRAY_CONFIG, data);
4273	}	4273	}
4274		4274
4275	static u32 gfx_v9_4_3_get_cu_active_bitmap(struct amdgpu_device *adev)	4275	static u32 gfx_v9_4_3_get_cu_active_bitmap(struct amdgpu_device *adev, int xcc_id)
4276	{	4276	{
4277	u32 data, mask;	4277	u32 data, mask;
4278		4278
4279	data = RREG32_SOC15(GC, GET_INST(GC, 0), regCC_GC_SHADER_ARRAY_CONFIG);	4279	data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regCC_GC_SHADER_ARRAY_CONFIG);
4280	data \|= RREG32_SOC15(GC, GET_INST(GC, 0), regGC_USER_SHADER_ARRAY_CONFIG);	4280	data \|= RREG32_SOC15(GC, GET_INST(GC, xcc_id), regGC_USER_SHADER_ARRAY_CONFIG);
4281		4281
4282	data &= CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS_MASK;	4282	data &= CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS_MASK;
4283	data >>= CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS__SHIFT;	4283	data >>= CC_GC_SHADER_ARRAY_CONFIG__INACTIVE_CUS__SHIFT;
@@ -4290,7 +4290,7 @@ static u32 gfx_v9_4_3_get_cu_active_bitmap(struct amdgpu_device *adev) · 6 unmodified lines
4290	static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev,	4290	static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev,
4291	struct amdgpu_cu_info *cu_info)	4291	struct amdgpu_cu_info *cu_info)
4292	{	4292	{
4293	int i, j, k, counter, active_cu_number = 0;	4293	int i, j, k, counter, xcc_id, active_cu_number = 0;
4294	u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0;	4294	u32 mask, bitmap, ao_bitmap, ao_cu_mask = 0;
4295	unsigned disable_masks[4 * 4];	4295	unsigned disable_masks[4 * 4];
4296		4296
@@ -4309,46 +4309,38 @@ static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev, · 12 unmodified lines
4309	adev->gfx.config.max_sh_per_se);	4309	adev->gfx.config.max_sh_per_se);
4310		4310
4311	mutex_lock(&adev->grbm_idx_mutex);	4311	mutex_lock(&adev->grbm_idx_mutex);
4312	for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {	4312	for (xcc_id = 0; xcc_id < NUM_XCC(adev->gfx.xcc_mask); xcc_id++) {
4313	for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {	4313	for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
4314	mask = 1;	4314	for (j = 0; j < adev->gfx.config.max_sh_per_se; j++) {
4315	ao_bitmap = 0;	4315	mask = 1;
4316	counter = 0;	4316	ao_bitmap = 0;
4317	gfx_v9_4_3_xcc_select_se_sh(adev, i, j, 0xffffffff, 0);	4317	counter = 0;
4318	gfx_v9_4_3_set_user_cu_inactive_bitmap(	4318	gfx_v9_4_3_xcc_select_se_sh(adev, i, j, 0xffffffff, xcc_id);
4319	adev, disable_masks[i * adev->gfx.config.max_sh_per_se + j]);	4319	gfx_v9_4_3_set_user_cu_inactive_bitmap(
4320	bitmap = gfx_v9_4_3_get_cu_active_bitmap(adev);	4320	adev,
4321		4321	disable_masks[i * adev->gfx.config.max_sh_per_se + j],
4322	/*	4322	xcc_id);
4323	* The bitmap(and ao_cu_bitmap) in cu_info structure is	4323	bitmap = gfx_v9_4_3_get_cu_active_bitmap(adev, xcc_id);
4324	* 4x4 size array, and it's usually suitable for Vega	4324
4325	* ASICs which has 4*2 SE/SH layout.	4325	cu_info->bitmap[xcc_id][i][j] = bitmap;
4326	* But for Arcturus, SE/SH layout is changed to 8*1.	4326
4327	* To mostly reduce the impact, we make it compatible	4327	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {
4328	* with current bitmap array as below:	4328	if (bitmap & mask) {
4329	* SE4,SH0 --> bitmap[0][1]	4329	if (counter < adev->gfx.config.max_cu_per_sh)
4330	* SE5,SH0 --> bitmap[1][1]	4330	ao_bitmap \|= mask;
4331	* SE6,SH0 --> bitmap[2][1]	4331	counter++;
4332	* SE7,SH0 --> bitmap[3][1]	4332	}
4333	*/	4333	mask <<= 1;
4334	cu_info->bitmap[i % 4][j + i / 4] = bitmap;
4335
4336	for (k = 0; k < adev->gfx.config.max_cu_per_sh; k++) {
4337	if (bitmap & mask) {
4338	if (counter < adev->gfx.config.max_cu_per_sh)
4339	ao_bitmap \|= mask;
4340	counter++;
4341	}	4334	}
4342	mask <<= 1;	4335	active_cu_number += counter;
		4336	if (i < 2 && j < 2)
		4337	ao_cu_mask \|= (ao_bitmap << (i * 16 + j * 8));
		4338	cu_info->ao_cu_bitmap[i][j] = ao_bitmap;
4343	}	4339	}
4344	active_cu_number += counter;
4345	if (i < 2 && j < 2)
4346	ao_cu_mask \|= (ao_bitmap << (i * 16 + j * 8));
4347	cu_info->ao_cu_bitmap[i % 4][j + i / 4] = ao_bitmap;
4348	}	4340	}
		4341	gfx_v9_4_3_xcc_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff,
		4342	xcc_id);
4349	}	4343	}
4350	gfx_v9_4_3_xcc_select_se_sh(adev, 0xffffffff, 0xffffffff, 0xffffffff,
4351	0);
4352	mutex_unlock(&adev->grbm_idx_mutex);	4344	mutex_unlock(&adev->grbm_idx_mutex);
4353		4345
4354	cu_info->number = active_cu_number;	4346	cu_info->number = active_cu_number;

drivers/gpu/drm/amd/amdgpu/nbio_v4_3.c+3−0

 		data &= ~RCC_DEV0_EPF2_STRAP2__STRAP_NO_SOFT_RESET_DEV0_F2_MASK;
 		WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF2_STRAP2, data);
 	}
+	if (amdgpu_sriov_vf(adev))
+		adev->rmmio_remap.reg_offset = SOC15_REG_OFFSET(NBIO, 0,
+			regBIF_BX_DEV0_EPF0_VF0_HDP_MEM_COHERENCY_FLUSH_CNTL) << 2;
 }
 static u32 nbio_v4_3_get_rom_offset(struct amdgpu_device *adev)

drivers/gpu/drm/amd/amdgpu/soc21.c+1−1

@@ -766,7 +766,7 @@ static int soc21_common_hw_init(void *handle) · 765 unmodified lines
766	* for the purpose of expose those registers	766	* for the purpose of expose those registers
767	* to process space	767	* to process space
768	*/	768	*/
769	if (adev->nbio.funcs->remap_hdp_registers)	769	if (adev->nbio.funcs->remap_hdp_registers && !amdgpu_sriov_vf(adev))
770	adev->nbio.funcs->remap_hdp_registers(adev);	770	adev->nbio.funcs->remap_hdp_registers(adev);
771	/* enable the doorbell aperture */	771	/* enable the doorbell aperture */
772	adev->nbio.funcs->enable_doorbell_aperture(adev, true);	772	adev->nbio.funcs->enable_doorbell_aperture(adev, true);

drivers/gpu/drm/amd/amdkfd/kfd_crat.c+2−1

@@ -2087,7 +2087,8 @@ static int kfd_create_vcrat_image_gpu(void *pcrat_image, · 2086 unmodified lines
2087		2087
2088	amdgpu_amdkfd_get_cu_info(kdev->adev, &cu_info);	2088	amdgpu_amdkfd_get_cu_info(kdev->adev, &cu_info);
2089	cu->num_simd_per_cu = cu_info.simd_per_cu;	2089	cu->num_simd_per_cu = cu_info.simd_per_cu;
2090	cu->num_simd_cores = cu_info.simd_per_cu * cu_info.cu_active_number;	2090	cu->num_simd_cores = cu_info.simd_per_cu *
		2091	(cu_info.cu_active_number / kdev->kfd->num_nodes);
2091	cu->max_waves_simd = cu_info.max_waves_per_simd;	2092	cu->max_waves_simd = cu_info.max_waves_per_simd;
2092		2093
2093	cu->wave_front_size = cu_info.wave_front_size;	2094	cu->wave_front_size = cu_info.wave_front_size;

drivers/gpu/drm/amd/amdkfd/kfd_crat.h+4−0

 #define CRAT_SUBTYPE_IOLINK_AFFINITY		5
 #define CRAT_SUBTYPE_MAX			6
+/*
+ * Do not change the value of CRAT_SIBLINGMAP_SIZE from 32
+ * as it breaks the ABI.
+ */
 #define CRAT_SIBLINGMAP_SIZE	32
 /*

drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c+2−3

 	if (q->wptr_bo) {
 		wptr_addr_off = (uint64_t)q->properties.write_ptr & (PAGE_SIZE - 1);
-		queue_input.wptr_mc_addr = ((uint64_t)q->wptr_bo->tbo.resource->start << PAGE_SHIFT) + wptr_addr_off;
+		queue_input.wptr_mc_addr = amdgpu_bo_gpu_offset(q->wptr_bo) + wptr_addr_off;
 	}
 	queue_input.is_kfd_process = 1;
 			dqm->dev->kfd2kgd->build_grace_period_packet_info(
 					dqm->dev->adev,	dqm->wait_times,
 					grace_period, &reg_offset,
-					&dqm->wait_times,
+					&dqm->wait_times);
-					ffs(dqm->dev->xcc_mask) - 1);
 	}
 	dqm_unlock(dqm);

drivers/gpu/drm/amd/amdkfd/kfd_doorbell.c+2−0

 		return NULL;
 	*doorbell_off = amdgpu_doorbell_index_on_bar(kfd->adev, kfd->doorbells, inx);
+	inx *= 2;
 	pr_debug("Get kernel queue doorbell\n"
 			"     doorbell offset   == 0x%08X\n"
 	unsigned int inx;
 	inx = (unsigned int)(db_addr - kfd->doorbell_kernel_ptr);
+	inx /= 2;
 	mutex_lock(&kfd->doorbell_mutex);
 	__clear_bit(inx, kfd->doorbell_bitmap);

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c+26−8

 void mqd_symmetrically_map_cu_mask(struct mqd_manager *mm,
 		const uint32_t *cu_mask, uint32_t cu_mask_count,
-		uint32_t *se_mask)
+		uint32_t *se_mask, uint32_t inst)
 {
 	struct kfd_cu_info cu_info;
 	uint32_t cu_per_sh[KFD_MAX_NUM_SE][KFD_MAX_NUM_SH_PER_SE] = {0};
 	bool wgp_mode_req = KFD_GC_VERSION(mm->dev) >= IP_VERSION(10, 0, 0);
 	uint32_t en_mask = wgp_mode_req ? 0x3 : 0x1;
-	int i, se, sh, cu, cu_bitmap_sh_mul, inc = wgp_mode_req ? 2 : 1;
+	int i, se, sh, cu, cu_bitmap_sh_mul, cu_inc = wgp_mode_req ? 2 : 1;
+	uint32_t cu_active_per_node;
+	int inc = cu_inc * NUM_XCC(mm->dev->xcc_mask);
+	int xcc_inst = inst + ffs(mm->dev->xcc_mask) - 1;
 	amdgpu_amdkfd_get_cu_info(mm->dev->adev, &cu_info);
-	if (cu_mask_count > cu_info.cu_active_number)
+	cu_active_per_node = cu_info.cu_active_number / mm->dev->kfd->num_nodes;
-		cu_mask_count = cu_info.cu_active_number;
+	if (cu_mask_count > cu_active_per_node)
+		cu_mask_count = cu_active_per_node;
 	/* Exceeding these bounds corrupts the stack and indicates a coding error.
 	 * Returning with no CU's enabled will hang the queue, which should be
 	for (se = 0; se < cu_info.num_shader_engines; se++)
 		for (sh = 0; sh < cu_info.num_shader_arrays_per_engine; sh++)
 			cu_per_sh[se][sh] = hweight32(
-				cu_info.cu_bitmap[se % 4][sh + (se / 4) * cu_bitmap_sh_mul]);
+				cu_info.cu_bitmap[xcc_inst][se % 4][sh + (se / 4) *
+				cu_bitmap_sh_mul]);
 	/* Symmetrically map cu_mask to all SEs & SHs:
 	 * se_mask programs up to 2 SH in the upper and lower 16 bits.
 	 * cu_mask[0] bit8 -> se_mask[0] bit1 (SE0,SH0,CU1)
 	 * ...
 	 *
+	 * For GFX 9.4.3, the following code only looks at a
+	 * subset of the cu_mask corresponding to the inst parameter.
+	 * If we have n XCCs under one GPU node
+	 * cu_mask[0] bit0 -> XCC0 se_mask[0] bit0 (XCC0,SE0,SH0,CU0)
+	 * cu_mask[0] bit1 -> XCC1 se_mask[0] bit0 (XCC1,SE0,SH0,CU0)
+	 * ..
+	 * cu_mask[0] bitn -> XCCn se_mask[0] bit0 (XCCn,SE0,SH0,CU0)
+	 * cu_mask[0] bit n+1 -> XCC0 se_mask[1] bit0 (XCC0,SE1,SH0,CU0)
+	 *
+	 * For example, if there are 6 XCCs under 1 KFD node, this code
+	 * running for each inst, will look at the bits as:
+	 * inst, inst + 6, inst + 12...
+	 *
 	 * First ensure all CUs are disabled, then enable user specified CUs.
 	 */
 	for (i = 0; i < cu_info.num_shader_engines; i++)
 		se_mask[i] = 0;
-	i = 0;
+	i = inst;
-	for (cu = 0; cu < 16; cu += inc) {
+	for (cu = 0; cu < 16; cu += cu_inc) {
 		for (sh = 0; sh < cu_info.num_shader_arrays_per_engine; sh++) {
 			for (se = 0; se < cu_info.num_shader_engines; se++) {
 				if (cu_per_sh[se][sh] > cu) {
 					if (cu_mask[i / 32] & (en_mask << (i % 32)))
 						se_mask[se] |= en_mask << (cu + sh * 16);
 					i += inc;
-					if (i == cu_mask_count)
+					if (i >= cu_mask_count)
 						return;
 				}
 			}

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.h+1−1

@@ -138,7 +138,7 @@ void free_mqd_hiq_sdma(struct mqd_manager mm, void mqd, · 137 unmodified lines
138		138
139	void mqd_symmetrically_map_cu_mask(struct mqd_manager *mm,	139	void mqd_symmetrically_map_cu_mask(struct mqd_manager *mm,
140	const uint32_t *cu_mask, uint32_t cu_mask_count,	140	const uint32_t *cu_mask, uint32_t cu_mask_count,
141	uint32_t *se_mask);	141	uint32_t *se_mask, uint32_t inst);
142		142
143	int kfd_hiq_load_mqd_kiq(struct mqd_manager mm, void mqd,	143	int kfd_hiq_load_mqd_kiq(struct mqd_manager mm, void mqd,
144	uint32_t pipe_id, uint32_t queue_id,	144	uint32_t pipe_id, uint32_t queue_id,

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_cik.c+1−1

@@ -52,7 +52,7 @@ static void update_cu_mask(struct mqd_manager mm, void mqd, · 51 unmodified lines
52	return;	52	return;
53		53
54	mqd_symmetrically_map_cu_mask(mm,	54	mqd_symmetrically_map_cu_mask(mm,
55	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask);	55	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0);
56		56
57	m = get_mqd(mqd);	57	m = get_mqd(mqd);
58	m->compute_static_thread_mgmt_se0 = se_mask[0];	58	m->compute_static_thread_mgmt_se0 = se_mask[0];

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c+1−1

@@ -52,7 +52,7 @@ static void update_cu_mask(struct mqd_manager mm, void mqd, · 51 unmodified lines
52	return;	52	return;
53		53
54	mqd_symmetrically_map_cu_mask(mm,	54	mqd_symmetrically_map_cu_mask(mm,
55	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask);	55	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0);
56		56
57	m = get_mqd(mqd);	57	m = get_mqd(mqd);
58	m->compute_static_thread_mgmt_se0 = se_mask[0];	58	m->compute_static_thread_mgmt_se0 = se_mask[0];

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v11.c+42−1

@@ -71,7 +71,7 @@ static void update_cu_mask(struct mqd_manager mm, void mqd, · 70 unmodified lines
71	}	71	}
72		72
73	mqd_symmetrically_map_cu_mask(mm,	73	mqd_symmetrically_map_cu_mask(mm,
74	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask);	74	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0);
75		75
76	m->compute_static_thread_mgmt_se0 = se_mask[0];	76	m->compute_static_thread_mgmt_se0 = se_mask[0];
77	m->compute_static_thread_mgmt_se1 = se_mask[1];	77	m->compute_static_thread_mgmt_se1 = se_mask[1];
@@ -321,6 +321,43 @@ static int get_wave_state(struct mqd_manager mm, void mqd, · 243 unmodified lines
321	return 0;	321	return 0;
322	}	322	}
323		323
		324	static void checkpoint_mqd(struct mqd_manager mm, void mqd, void mqd_dst, void ctl_stack_dst)
		325	{
		326	struct v11_compute_mqd *m;
		327
		328	m = get_mqd(mqd);
		329
		330	memcpy(mqd_dst, m, sizeof(struct v11_compute_mqd));
		331	}
		332
		333	static void restore_mqd(struct mqd_manager mm, void *mqd,
		334	struct kfd_mem_obj mqd_mem_obj, uint64_t gart_addr,
		335	struct queue_properties *qp,
		336	const void *mqd_src,
		337	const void *ctl_stack_src, const u32 ctl_stack_size)
		338	{
		339	uint64_t addr;
		340	struct v11_compute_mqd *m;
		341
		342	m = (struct v11_compute_mqd *) mqd_mem_obj->cpu_ptr;
		343	addr = mqd_mem_obj->gpu_addr;
		344
		345	memcpy(m, mqd_src, sizeof(*m));
		346
		347	*mqd = m;
		348	if (gart_addr)
		349	*gart_addr = addr;
		350
		351	m->cp_hqd_pq_doorbell_control =
		352	qp->doorbell_off <<
		353	CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT;
		354	pr_debug("cp_hqd_pq_doorbell_control 0x%x\n",
		355	m->cp_hqd_pq_doorbell_control);
		356
		357	qp->is_active = 0;
		358	}
		359
		360
324	static void init_mqd_hiq(struct mqd_manager mm, void *mqd,	361	static void init_mqd_hiq(struct mqd_manager mm, void *mqd,
325	struct kfd_mem_obj mqd_mem_obj, uint64_t gart_addr,	362	struct kfd_mem_obj mqd_mem_obj, uint64_t gart_addr,
326	struct queue_properties *q)	363	struct queue_properties *q)
@@ -458,6 +495,8 @@ struct mqd_manager *mqd_manager_init_v11(enum KFD_MQD_TYPE type, · 131 unmodified lines
458	mqd->mqd_size = sizeof(struct v11_compute_mqd);	495	mqd->mqd_size = sizeof(struct v11_compute_mqd);
459	mqd->get_wave_state = get_wave_state;	496	mqd->get_wave_state = get_wave_state;
460	mqd->mqd_stride = kfd_mqd_stride;	497	mqd->mqd_stride = kfd_mqd_stride;
		498	mqd->checkpoint_mqd = checkpoint_mqd;
		499	mqd->restore_mqd = restore_mqd;
461	#if defined(CONFIG_DEBUG_FS)	500	#if defined(CONFIG_DEBUG_FS)
462	mqd->debugfs_show_mqd = debugfs_show_mqd;	501	mqd->debugfs_show_mqd = debugfs_show_mqd;
463	#endif	502	#endif
@@ -502,6 +541,8 @@ struct mqd_manager *mqd_manager_init_v11(enum KFD_MQD_TYPE type, · 38 unmodified lines
502	mqd->update_mqd = update_mqd_sdma;	541	mqd->update_mqd = update_mqd_sdma;
503	mqd->destroy_mqd = kfd_destroy_mqd_sdma;	542	mqd->destroy_mqd = kfd_destroy_mqd_sdma;
504	mqd->is_occupied = kfd_is_occupied_sdma;	543	mqd->is_occupied = kfd_is_occupied_sdma;
		544	mqd->checkpoint_mqd = checkpoint_mqd;
		545	mqd->restore_mqd = restore_mqd;
505	mqd->mqd_size = sizeof(struct v11_sdma_mqd);	546	mqd->mqd_size = sizeof(struct v11_sdma_mqd);
506	mqd->mqd_stride = kfd_mqd_stride;	547	mqd->mqd_stride = kfd_mqd_stride;
507	#if defined(CONFIG_DEBUG_FS)	548	#if defined(CONFIG_DEBUG_FS)

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c+29−17

@@ -60,7 +60,7 @@ static inline struct v9_sdma_mqd get_sdma_mqd(void mqd) · 59 unmodified lines
60	}	60	}
61		61
62	static void update_cu_mask(struct mqd_manager mm, void mqd,	62	static void update_cu_mask(struct mqd_manager mm, void mqd,
63	struct mqd_update_info *minfo)	63	struct mqd_update_info *minfo, uint32_t inst)
64	{	64	{
65	struct v9_mqd *m;	65	struct v9_mqd *m;
66	uint32_t se_mask[KFD_MAX_NUM_SE] = {0};	66	uint32_t se_mask[KFD_MAX_NUM_SE] = {0};
@@ -69,27 +69,36 @@ static void update_cu_mask(struct mqd_manager mm, void mqd, · 2 unmodified lines
69	return;	69	return;
70		70
71	mqd_symmetrically_map_cu_mask(mm,	71	mqd_symmetrically_map_cu_mask(mm,
72	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask);	72	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, inst);
73		73
74	m = get_mqd(mqd);	74	m = get_mqd(mqd);
		75
75	m->compute_static_thread_mgmt_se0 = se_mask[0];	76	m->compute_static_thread_mgmt_se0 = se_mask[0];
76	m->compute_static_thread_mgmt_se1 = se_mask[1];	77	m->compute_static_thread_mgmt_se1 = se_mask[1];
77	m->compute_static_thread_mgmt_se2 = se_mask[2];	78	m->compute_static_thread_mgmt_se2 = se_mask[2];
78	m->compute_static_thread_mgmt_se3 = se_mask[3];	79	m->compute_static_thread_mgmt_se3 = se_mask[3];
79	m->compute_static_thread_mgmt_se4 = se_mask[4];	80	if (KFD_GC_VERSION(mm->dev) != IP_VERSION(9, 4, 3)) {
80	m->compute_static_thread_mgmt_se5 = se_mask[5];	81	m->compute_static_thread_mgmt_se4 = se_mask[4];
81	m->compute_static_thread_mgmt_se6 = se_mask[6];	82	m->compute_static_thread_mgmt_se5 = se_mask[5];
82	m->compute_static_thread_mgmt_se7 = se_mask[7];	83	m->compute_static_thread_mgmt_se6 = se_mask[6];
83		84	m->compute_static_thread_mgmt_se7 = se_mask[7];
84	pr_debug("update cu mask to %#x %#x %#x %#x %#x %#x %#x %#x\n",	85
85	m->compute_static_thread_mgmt_se0,	86	pr_debug("update cu mask to %#x %#x %#x %#x %#x %#x %#x %#x\n",
86	m->compute_static_thread_mgmt_se1,	87	m->compute_static_thread_mgmt_se0,
87	m->compute_static_thread_mgmt_se2,	88	m->compute_static_thread_mgmt_se1,
88	m->compute_static_thread_mgmt_se3,	89	m->compute_static_thread_mgmt_se2,
89	m->compute_static_thread_mgmt_se4,	90	m->compute_static_thread_mgmt_se3,
90	m->compute_static_thread_mgmt_se5,	91	m->compute_static_thread_mgmt_se4,
91	m->compute_static_thread_mgmt_se6,	92	m->compute_static_thread_mgmt_se5,
92	m->compute_static_thread_mgmt_se7);	93	m->compute_static_thread_mgmt_se6,
		94	m->compute_static_thread_mgmt_se7);
		95	} else {
		96	pr_debug("inst: %u, update cu mask to %#x %#x %#x %#x\n",
		97	inst, m->compute_static_thread_mgmt_se0,
		98	m->compute_static_thread_mgmt_se1,
		99	m->compute_static_thread_mgmt_se2,
		100	m->compute_static_thread_mgmt_se3);
		101	}
93	}	102	}
94		103
95	static void set_priority(struct v9_mqd m, struct queue_properties q)	104	static void set_priority(struct v9_mqd m, struct queue_properties q)
@@ -290,7 +299,8 @@ static void update_mqd(struct mqd_manager mm, void mqd, · 194 unmodified lines
290	if (mm->dev->kfd->cwsr_enabled && q->ctx_save_restore_area_address)	299	if (mm->dev->kfd->cwsr_enabled && q->ctx_save_restore_area_address)
291	m->cp_hqd_ctx_save_control = 0;	300	m->cp_hqd_ctx_save_control = 0;
292		301
293	update_cu_mask(mm, mqd, minfo);	302	if (KFD_GC_VERSION(mm->dev) != IP_VERSION(9, 4, 3))
		303	update_cu_mask(mm, mqd, minfo, 0);
294	set_priority(m, q);	304	set_priority(m, q);
295		305
296	q->is_active = QUEUE_IS_ACTIVE(*q);	306	q->is_active = QUEUE_IS_ACTIVE(*q);
@@ -676,6 +686,8 @@ static void update_mqd_v9_4_3(struct mqd_manager mm, void mqd, · 379 unmodified lines
676	m = get_mqd(mqd + size * xcc);	686	m = get_mqd(mqd + size * xcc);
677	update_mqd(mm, m, q, minfo);	687	update_mqd(mm, m, q, minfo);
678		688
		689	update_cu_mask(mm, mqd, minfo, xcc);
		690
679	if (q->format == KFD_QUEUE_FORMAT_AQL) {	691	if (q->format == KFD_QUEUE_FORMAT_AQL) {
680	switch (xcc) {	692	switch (xcc) {
681	case 0:	693	case 0:

drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c+1−1

@@ -55,7 +55,7 @@ static void update_cu_mask(struct mqd_manager mm, void mqd, · 54 unmodified lines
55	return;	55	return;
56		56
57	mqd_symmetrically_map_cu_mask(mm,	57	mqd_symmetrically_map_cu_mask(mm,
58	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask);	58	minfo->cu_mask.ptr, minfo->cu_mask.count, se_mask, 0);
59		59
60	m = get_mqd(mqd);	60	m = get_mqd(mqd);
61	m->compute_static_thread_mgmt_se0 = se_mask[0];	61	m->compute_static_thread_mgmt_se0 = se_mask[0];

drivers/gpu/drm/amd/amdkfd/kfd_packet_manager_v9.c+1−2

@@ -299,8 +299,7 @@ static int pm_set_grace_period_v9(struct packet_manager *pm, · 298 unmodified lines
299	pm->dqm->wait_times,	299	pm->dqm->wait_times,
300	grace_period,	300	grace_period,
301	&reg_offset,	301	&reg_offset,
302	&reg_data,	302	&reg_data);
303	0);
304		303
305	if (grace_period == USE_DEFAULT_GRACE_PERIOD)	304	if (grace_period == USE_DEFAULT_GRACE_PERIOD)
306	reg_data = pm->dqm->wait_times;	305	reg_data = pm->dqm->wait_times;

drivers/gpu/drm/amd/amdkfd/kfd_priv.h+1−2

@@ -1466,8 +1466,7 @@ void kfd_flush_tlb(struct kfd_process_device *pdd, enum TLB_FLUSH_TYPE type); · 1465 unmodified lines
1466		1466
1467	static inline bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev)	1467	static inline bool kfd_flush_tlb_after_unmap(struct kfd_dev *dev)
1468	{	1468	{
1469	return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3) \|\|	1469	return KFD_GC_VERSION(dev) > IP_VERSION(9, 4, 2) \|\|
1470	KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2) \|\|
1471	(KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) && dev->sdma_fw_version >= 18) \|\|	1470	(KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 1) && dev->sdma_fw_version >= 18) \|\|
1472	KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0);	1471	KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 0);
1473	}	1472	}

drivers/gpu/drm/amd/amdkfd/kfd_topology.c+43−34

@@ -450,8 +450,7 @@ static ssize_t node_show(struct kobject kobj, struct attribute attr, · 449 unmodified lines
450	sysfs_show_32bit_prop(buffer, offs, "cpu_cores_count",	450	sysfs_show_32bit_prop(buffer, offs, "cpu_cores_count",
451	dev->node_props.cpu_cores_count);	451	dev->node_props.cpu_cores_count);
452	sysfs_show_32bit_prop(buffer, offs, "simd_count",	452	sysfs_show_32bit_prop(buffer, offs, "simd_count",
453	dev->gpu ? (dev->node_props.simd_count *	453	dev->gpu ? dev->node_props.simd_count : 0);
454	NUM_XCC(dev->gpu->xcc_mask)) : 0);
455	sysfs_show_32bit_prop(buffer, offs, "mem_banks_count",	454	sysfs_show_32bit_prop(buffer, offs, "mem_banks_count",
456	dev->node_props.mem_banks_count);	455	dev->node_props.mem_banks_count);
457	sysfs_show_32bit_prop(buffer, offs, "caches_count",	456	sysfs_show_32bit_prop(buffer, offs, "caches_count",
@@ -1597,14 +1596,17 @@ static int fill_in_l1_pcache(struct kfd_cache_properties **props_ext, · 1139 unmodified lines
1597	static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext,	1596	static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext,
1598	struct kfd_gpu_cache_info *pcache_info,	1597	struct kfd_gpu_cache_info *pcache_info,
1599	struct kfd_cu_info *cu_info,	1598	struct kfd_cu_info *cu_info,
1600	int cache_type, unsigned int cu_processor_id)	1599	int cache_type, unsigned int cu_processor_id,
		1600	struct kfd_node *knode)
1601	{	1601	{
1602	unsigned int cu_sibling_map_mask;	1602	unsigned int cu_sibling_map_mask;
1603	int first_active_cu;	1603	int first_active_cu;
1604	int i, j, k;	1604	int i, j, k, xcc, start, end;
1605	struct kfd_cache_properties *pcache = NULL;	1605	struct kfd_cache_properties *pcache = NULL;
1606		1606
1607	cu_sibling_map_mask = cu_info->cu_bitmap[0][0];	1607	start = ffs(knode->xcc_mask) - 1;
		1608	end = start + NUM_XCC(knode->xcc_mask);
		1609	cu_sibling_map_mask = cu_info->cu_bitmap[start][0][0];
1608	cu_sibling_map_mask &=	1610	cu_sibling_map_mask &=
1609	((1 << pcache_info[cache_type].num_cu_shared) - 1);	1611	((1 << pcache_info[cache_type].num_cu_shared) - 1);
1610	first_active_cu = ffs(cu_sibling_map_mask);	1612	first_active_cu = ffs(cu_sibling_map_mask);
@@ -1639,16 +1641,18 @@ static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext, · 28 unmodified lines
1639	cu_sibling_map_mask = cu_sibling_map_mask >> (first_active_cu - 1);	1641	cu_sibling_map_mask = cu_sibling_map_mask >> (first_active_cu - 1);
1640	k = 0;	1642	k = 0;
1641		1643
1642	for (i = 0; i < cu_info->num_shader_engines; i++) {	1644	for (xcc = start; xcc < end; xcc++) {
1643	for (j = 0; j < cu_info->num_shader_arrays_per_engine; j++) {	1645	for (i = 0; i < cu_info->num_shader_engines; i++) {
1644	pcache->sibling_map[k] = (uint8_t)(cu_sibling_map_mask & 0xFF);	1646	for (j = 0; j < cu_info->num_shader_arrays_per_engine; j++) {
1645	pcache->sibling_map[k+1] = (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF);	1647	pcache->sibling_map[k] = (uint8_t)(cu_sibling_map_mask & 0xFF);
1646	pcache->sibling_map[k+2] = (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF);	1648	pcache->sibling_map[k+1] = (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF);
1647	pcache->sibling_map[k+3] = (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF);	1649	pcache->sibling_map[k+2] = (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF);
1648	k += 4;	1650	pcache->sibling_map[k+3] = (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF);
1649		1651	k += 4;
1650	cu_sibling_map_mask = cu_info->cu_bitmap[i % 4][j + i / 4];	1652
1651	cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1);	1653	cu_sibling_map_mask = cu_info->cu_bitmap[xcc][i % 4][j + i / 4];
		1654	cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1);
		1655	}
1652	}	1656	}
1653	}	1657	}
1654	pcache->sibling_map_size = k;	1658	pcache->sibling_map_size = k;
@@ -1666,7 +1670,7 @@ static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext, · 11 unmodified lines
1666	static void kfd_fill_cache_non_crat_info(struct kfd_topology_device dev, struct kfd_node kdev)	1670	static void kfd_fill_cache_non_crat_info(struct kfd_topology_device dev, struct kfd_node kdev)
1667	{	1671	{
1668	struct kfd_gpu_cache_info *pcache_info = NULL;	1672	struct kfd_gpu_cache_info *pcache_info = NULL;
1669	int i, j, k;	1673	int i, j, k, xcc, start, end;
1670	int ct = 0;	1674	int ct = 0;
1671	unsigned int cu_processor_id;	1675	unsigned int cu_processor_id;
1672	int ret;	1676	int ret;
@@ -1700,37 +1704,42 @@ static void kfd_fill_cache_non_crat_info(struct kfd_topology_device *dev, struct · 27 unmodified lines
1700	* then it will consider only one CU from	1704	* then it will consider only one CU from
1701	* the shared unit	1705	* the shared unit
1702	*/	1706	*/
		1707	start = ffs(kdev->xcc_mask) - 1;
		1708	end = start + NUM_XCC(kdev->xcc_mask);
		1709
1703	for (ct = 0; ct < num_of_cache_types; ct++) {	1710	for (ct = 0; ct < num_of_cache_types; ct++) {
1704	cu_processor_id = gpu_processor_id;	1711	cu_processor_id = gpu_processor_id;
1705	if (pcache_info[ct].cache_level == 1) {	1712	if (pcache_info[ct].cache_level == 1) {
1706	for (i = 0; i < pcu_info->num_shader_engines; i++) {	1713	for (xcc = start; xcc < end; xcc++) {
1707	for (j = 0; j < pcu_info->num_shader_arrays_per_engine; j++) {	1714	for (i = 0; i < pcu_info->num_shader_engines; i++) {
1708	for (k = 0; k < pcu_info->num_cu_per_sh; k += pcache_info[ct].num_cu_shared) {	1715	for (j = 0; j < pcu_info->num_shader_arrays_per_engine; j++) {
		1716	for (k = 0; k < pcu_info->num_cu_per_sh; k += pcache_info[ct].num_cu_shared) {
1709		1717
1710	ret = fill_in_l1_pcache(&props_ext, pcache_info, pcu_info,	1718	ret = fill_in_l1_pcache(&props_ext, pcache_info, pcu_info,
1711	pcu_info->cu_bitmap[i % 4][j + i / 4], ct,	1719	pcu_info->cu_bitmap[xcc][i % 4][j + i / 4], ct,
1712	cu_processor_id, k);	1720	cu_processor_id, k);
1713		1721
1714	if (ret < 0)	1722	if (ret < 0)
1715	break;	1723	break;
1716		1724
1717	if (!ret) {	1725	if (!ret) {
1718	num_of_entries++;	1726	num_of_entries++;
1719	list_add_tail(&props_ext->list, &dev->cache_props);	1727	list_add_tail(&props_ext->list, &dev->cache_props);
1720	}	1728	}
1721		1729
1722	/* Move to next CU block */	1730	/* Move to next CU block */
1723	num_cu_shared = ((k + pcache_info[ct].num_cu_shared) <=	1731	num_cu_shared = ((k + pcache_info[ct].num_cu_shared) <=
1724	pcu_info->num_cu_per_sh) ?	1732	pcu_info->num_cu_per_sh) ?
1725	pcache_info[ct].num_cu_shared :	1733	pcache_info[ct].num_cu_shared :
1726	(pcu_info->num_cu_per_sh - k);	1734	(pcu_info->num_cu_per_sh - k);
1727	cu_processor_id += num_cu_shared;	1735	cu_processor_id += num_cu_shared;
		1736	}
1728	}	1737	}
1729	}	1738	}
1730	}	1739	}
1731	} else {	1740	} else {
1732	ret = fill_in_l2_l3_pcache(&props_ext, pcache_info,	1741	ret = fill_in_l2_l3_pcache(&props_ext, pcache_info,
1733	pcu_info, ct, cu_processor_id);	1742	pcu_info, ct, cu_processor_id, kdev);
1734		1743
1735	if (ret < 0)	1744	if (ret < 0)
1736	break;	1745	break;

drivers/gpu/drm/amd/amdkfd/kfd_topology.h+1−1

@@ -89,7 +89,7 @@ struct kfd_mem_properties { · 88 unmodified lines
89	struct attribute attr;	89	struct attribute attr;
90	};	90	};
91		91
92	#define CACHE_SIBLINGMAP_SIZE 64	92	#define CACHE_SIBLINGMAP_SIZE 128
93		93
94	struct kfd_cache_properties {	94	struct kfd_cache_properties {
95	struct list_head list;	95	struct list_head list;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+96−23

 	pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);
-	page_table_start.high_part = (u32)(adev->gmc.gart_start >> 44) & 0xF;
+	page_table_start.high_part = upper_32_bits(adev->gmc.gart_start >>
-	page_table_start.low_part = (u32)(adev->gmc.gart_start >> 12);
+						   AMDGPU_GPU_PAGE_SHIFT);
-	page_table_end.high_part = (u32)(adev->gmc.gart_end >> 44) & 0xF;
+	page_table_start.low_part = lower_32_bits(adev->gmc.gart_start >>
-	page_table_end.low_part = (u32)(adev->gmc.gart_end >> 12);
+						  AMDGPU_GPU_PAGE_SHIFT);
-	page_table_base.high_part = upper_32_bits(pt_base) & 0xF;
+	page_table_end.high_part = upper_32_bits(adev->gmc.gart_end >>
+						 AMDGPU_GPU_PAGE_SHIFT);
+	page_table_end.low_part = lower_32_bits(adev->gmc.gart_end >>
+						AMDGPU_GPU_PAGE_SHIFT);
+	page_table_base.high_part = upper_32_bits(pt_base);
 	page_table_base.low_part = lower_32_bits(pt_base);
 	pa_config->system_aperture.start_addr = (uint64_t)logical_addr_low << 18;
 		}
 		break;
 	}
-	if (init_data.flags.gpu_vm_support)
+	if (init_data.flags.gpu_vm_support &&
-		init_data.flags.gpu_vm_support = amdgpu_sg_display_supported(adev);
+	    (amdgpu_sg_display == 0))
+		init_data.flags.gpu_vm_support = false;
 	if (init_data.flags.gpu_vm_support)
 		adev->mode_info.gpu_vm_support = true;
 	return detect_mst_link_for_all_connectors(adev_to_drm(adev));
 }
+static void resume_mst_branch_status(struct drm_dp_mst_topology_mgr *mgr)
+{
+	int ret;
+	u8 guid[16];
+	u64 tmp64;
+	mutex_lock(&mgr->lock);
+	if (!mgr->mst_primary)
+		goto out_fail;
+	if (drm_dp_read_dpcd_caps(mgr->aux, mgr->dpcd) < 0) {
+		drm_dbg_kms(mgr->dev, "dpcd read failed - undocked during suspend?\n");
+		goto out_fail;
+	}
+	ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL,
+				 DP_MST_EN |
+				 DP_UP_REQ_EN |
+				 DP_UPSTREAM_IS_SRC);
+	if (ret < 0) {
+		drm_dbg_kms(mgr->dev, "mst write failed - undocked during suspend?\n");
+		goto out_fail;
+	}
+	/* Some hubs forget their guids after they resume */
+	ret = drm_dp_dpcd_read(mgr->aux, DP_GUID, guid, 16);
+	if (ret != 16) {
+		drm_dbg_kms(mgr->dev, "dpcd read failed - undocked during suspend?\n");
+		goto out_fail;
+	}
+	if (memchr_inv(guid, 0, 16) == NULL) {
+		tmp64 = get_jiffies_64();
+		memcpy(&guid[0], &tmp64, sizeof(u64));
+		memcpy(&guid[8], &tmp64, sizeof(u64));
+		ret = drm_dp_dpcd_write(mgr->aux, DP_GUID, guid, 16);
+		if (ret != 16) {
+			drm_dbg_kms(mgr->dev, "check mstb guid failed - undocked during suspend?\n");
+			goto out_fail;
+		}
+	}
+	memcpy(mgr->mst_primary->guid, guid, 16);
+out_fail:
+	mutex_unlock(&mgr->lock);
+}
 static void s3_handle_mst(struct drm_device *dev, bool suspend)
 {
 	struct amdgpu_dm_connector *aconnector;
 	struct drm_connector *connector;
 	struct drm_connector_list_iter iter;
 	struct drm_dp_mst_topology_mgr *mgr;
-	int ret;
-	bool need_hotplug = false;
 	drm_connector_list_iter_begin(dev, &iter);
 	drm_for_each_connector_iter(connector, &iter) {
 			if (!dp_is_lttpr_present(aconnector->dc_link))
 				try_to_configure_aux_timeout(aconnector->dc_link->ddc, LINK_AUX_DEFAULT_TIMEOUT_PERIOD);
-			ret = drm_dp_mst_topology_mgr_resume(mgr, true);
+			/* TODO: move resume_mst_branch_status() into drm mst resume again
-			if (ret < 0) {
+			 * once topology probing work is pulled out from mst resume into mst
-				dm_helpers_dp_mst_stop_top_mgr(aconnector->dc_link->ctx,
+			 * resume 2nd step. mst resume 2nd step should be called after old
-					aconnector->dc_link);
+			 * state getting restored (i.e. drm_atomic_helper_resume()).
-				need_hotplug = true;
+			 */
-			}
+			resume_mst_branch_status(mgr);
 		}
 	}
 	drm_connector_list_iter_end(&iter);
-	if (need_hotplug)
-		drm_kms_helper_hotplug_event(dev);
 }
 static int amdgpu_dm_smu_write_watermarks_table(struct amdgpu_device *adev)
 	struct dm_atomic_state *dm_state = to_dm_atomic_state(dm->atomic_obj.state);
 	enum dc_connection_type new_connection_type = dc_connection_none;
 	struct dc_state *dc_state;
-	int i, r, j;
+	int i, r, j, ret;
+	bool need_hotplug = false;
 	if (amdgpu_in_reset(adev)) {
 		dc_state = dm->cached_dc_state;
 			continue;
 		/*
-		 * this is the case when traversing through already created
+		 * this is the case when traversing through already created end sink
 		 * MST connectors, should be skipped
 		 */
 		if (aconnector && aconnector->mst_root)
 	dm->cached_state = NULL;
+	/* Do mst topology probing after resuming cached state*/
+	drm_connector_list_iter_begin(ddev, &iter);
+	drm_for_each_connector_iter(connector, &iter) {
+		aconnector = to_amdgpu_dm_connector(connector);
+		if (aconnector->dc_link->type != dc_connection_mst_branch ||
+		    aconnector->mst_root)
+			continue;
+		ret = drm_dp_mst_topology_mgr_resume(&aconnector->mst_mgr, true);
+		if (ret < 0) {
+			dm_helpers_dp_mst_stop_top_mgr(aconnector->dc_link->ctx,
+					aconnector->dc_link);
+			need_hotplug = true;
+		}
+	}
+	drm_connector_list_iter_end(&iter);
+	if (need_hotplug)
+		drm_kms_helper_hotplug_event(ddev);
 	amdgpu_dm_irq_resume_late(adev);
 	amdgpu_dm_smu_write_watermarks_table(adev);
 	if (recalculate_timing)
 		drm_mode_set_crtcinfo(&saved_mode, 0);
-	else if (!old_stream)
-		drm_mode_set_crtcinfo(&mode, 0);
 	/*
 	 * If scaling is enabled and refresh rate didn't change
 		goto fail;
 	}
+	drm_mode_set_crtcinfo(mode, 0);
 	stream = create_validate_stream_for_sink(aconnector, mode,
 						 to_dm_connector_state(connector->state),
 						 NULL);
 		bundle->surface_updates[planes_count].plane_info =
 			&bundle->plane_infos[planes_count];
-		if (acrtc_state->stream->link->psr_settings.psr_feature_enabled) {
+		if (acrtc_state->stream->link->psr_settings.psr_feature_enabled ||
+		    acrtc_state->stream->link->replay_settings.replay_feature_enabled) {
 			fill_dc_dirty_rects(plane, old_plane_state,
 					    new_plane_state, new_crtc_state,
 					    &bundle->flip_addrs[planes_count],

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h+1−1

@@ -620,7 +620,7 @@ struct amdgpu_hdmi_vsdb_info { · 619 unmodified lines
620	unsigned int max_refresh_rate_hz;	620	unsigned int max_refresh_rate_hz;
621		621
622	/**	622	/**
623	* @replay mode: Replay supported	623	* @replay_mode: Replay supported
624	*/	624	*/
625	bool replay_mode;	625	bool replay_mode;
626	};	626	};

drivers/gpu/drm/amd/display/dc/core/dc_link_enc_cfg.c+28−7

@@ -169,11 +169,23 @@ static void add_link_enc_assignment( · 168 unmodified lines
169	/* Return first available DIG link encoder. */	169	/* Return first available DIG link encoder. */
170	static enum engine_id find_first_avail_link_enc(	170	static enum engine_id find_first_avail_link_enc(
171	const struct dc_context *ctx,	171	const struct dc_context *ctx,
172	const struct dc_state *state)	172	const struct dc_state *state,
		173	enum engine_id eng_id_requested)
173	{	174	{
174	enum engine_id eng_id = ENGINE_ID_UNKNOWN;	175	enum engine_id eng_id = ENGINE_ID_UNKNOWN;
175	int i;	176	int i;
176		177
		178	if (eng_id_requested != ENGINE_ID_UNKNOWN) {
		179
		180	for (i = 0; i < ctx->dc->res_pool->res_cap->num_dig_link_enc; i++) {
		181	eng_id = state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i];
		182	if (eng_id == eng_id_requested)
		183	return eng_id;
		184	}
		185	}
		186
		187	eng_id = ENGINE_ID_UNKNOWN;
		188
177	for (i = 0; i < ctx->dc->res_pool->res_cap->num_dig_link_enc; i++) {	189	for (i = 0; i < ctx->dc->res_pool->res_cap->num_dig_link_enc; i++) {
178	eng_id = state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i];	190	eng_id = state->res_ctx.link_enc_cfg_ctx.link_enc_avail[i];
179	if (eng_id != ENGINE_ID_UNKNOWN)	191	if (eng_id != ENGINE_ID_UNKNOWN)
@@ -287,7 +299,7 @@ void link_enc_cfg_link_encs_assign( · 107 unmodified lines
287	struct dc_stream_state *streams[],	299	struct dc_stream_state *streams[],
288	uint8_t stream_count)	300	uint8_t stream_count)
289	{	301	{
290	enum engine_id eng_id = ENGINE_ID_UNKNOWN;	302	enum engine_id eng_id = ENGINE_ID_UNKNOWN, eng_id_req = ENGINE_ID_UNKNOWN;
291	int i;	303	int i;
292	int j;	304	int j;
293		305
@@ -377,8 +389,14 @@ void link_enc_cfg_link_encs_assign( · 83 unmodified lines
377	* assigned to that endpoint.	389	* assigned to that endpoint.
378	*/	390	*/
379	link_enc = get_link_enc_used_by_link(state, stream->link);	391	link_enc = get_link_enc_used_by_link(state, stream->link);
380	if (link_enc == NULL)	392	if (link_enc == NULL) {
381	eng_id = find_first_avail_link_enc(stream->ctx, state);	393
		394	if (stream->link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA &&
		395	stream->link->dpia_preferred_eng_id != ENGINE_ID_UNKNOWN)
		396	eng_id_req = stream->link->dpia_preferred_eng_id;
		397
		398	eng_id = find_first_avail_link_enc(stream->ctx, state, eng_id_req);
		399	}
382	else	400	else
383	eng_id = link_enc->preferred_engine;	401	eng_id = link_enc->preferred_engine;
384		402
@@ -402,7 +420,9 @@ void link_enc_cfg_link_encs_assign( · 17 unmodified lines
402	DC_LOG_DEBUG("%s: CUR %s(%d) - enc_id(%d)\n",	420	DC_LOG_DEBUG("%s: CUR %s(%d) - enc_id(%d)\n",
403	__func__,	421	__func__,
404	assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ? "PHY" : "DPIA",	422	assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ? "PHY" : "DPIA",
405	assignment.ep_id.link_id.enum_id - 1,	423	assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ?
		424	assignment.ep_id.link_id.enum_id :
		425	assignment.ep_id.link_id.enum_id - 1,
406	assignment.eng_id);	426	assignment.eng_id);
407	}	427	}
408	for (i = 0; i < MAX_PIPES; i++) {	428	for (i = 0; i < MAX_PIPES; i++) {
@@ -413,7 +433,9 @@ void link_enc_cfg_link_encs_assign( · 4 unmodified lines
413	DC_LOG_DEBUG("%s: NEW %s(%d) - enc_id(%d)\n",	433	DC_LOG_DEBUG("%s: NEW %s(%d) - enc_id(%d)\n",
414	__func__,	434	__func__,
415	assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ? "PHY" : "DPIA",	435	assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ? "PHY" : "DPIA",
416	assignment.ep_id.link_id.enum_id - 1,	436	assignment.ep_id.ep_type == DISPLAY_ENDPOINT_PHY ?
		437	assignment.ep_id.link_id.enum_id :
		438	assignment.ep_id.link_id.enum_id - 1,
417	assignment.eng_id);	439	assignment.eng_id);
418	}	440	}
419		441
@@ -478,7 +500,6 @@ struct dc_link *link_enc_cfg_get_link_using_link_enc( · 58 unmodified lines
478	if (stream)	500	if (stream)
479	link = stream->link;	501	link = stream->link;
480		502
481	// dm_output_to_console("%s: No link using DIG(%d).\n", __func__, eng_id);
482	return link;	503	return link;
483	}	504	}
484		505

drivers/gpu/drm/amd/display/dc/dc.h+1−0

@@ -1496,6 +1496,7 @@ struct dc_link { · 1495 unmodified lines
1496	* object creation.	1496	* object creation.
1497	*/	1497	*/
1498	enum engine_id eng_id;	1498	enum engine_id eng_id;
		1499	enum engine_id dpia_preferred_eng_id;
1499		1500
1500	bool test_pattern_enabled;	1501	bool test_pattern_enabled;
1501	enum dp_test_pattern current_test_pattern;	1502	enum dp_test_pattern current_test_pattern;

drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c+20−14

@@ -964,7 +964,9 @@ void dce110_edp_backlight_control( · 963 unmodified lines
964	return;	964	return;
965	}	965	}
966		966
967	if (link->panel_cntl) {	967	if (link->panel_cntl && !(link->dpcd_sink_ext_caps.bits.oled \|\|
		968	link->dpcd_sink_ext_caps.bits.hdr_aux_backlight_control == 1 \|\|
		969	link->dpcd_sink_ext_caps.bits.sdr_aux_backlight_control == 1)) {
968	bool is_backlight_on = link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl);	970	bool is_backlight_on = link->panel_cntl->funcs->is_panel_backlight_on(link->panel_cntl);
969		971
970	if ((enable && is_backlight_on) \|\| (!enable && !is_backlight_on)) {	972	if ((enable && is_backlight_on) \|\| (!enable && !is_backlight_on)) {
@@ -1176,12 +1178,15 @@ void dce110_disable_stream(struct pipe_ctx *pipe_ctx) · 205 unmodified lines
1176	dto_params.otg_inst = tg->inst;	1178	dto_params.otg_inst = tg->inst;
1177	dto_params.timing = &pipe_ctx->stream->timing;	1179	dto_params.timing = &pipe_ctx->stream->timing;
1178	dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;	1180	dp_hpo_inst = pipe_ctx->stream_res.hpo_dp_stream_enc->inst;
1179	dccg->funcs->set_dtbclk_dto(dccg, &dto_params);	1181	if (dccg) {
1180	dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);	1182	dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
1181	dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);	1183	dccg->funcs->disable_symclk32_se(dccg, dp_hpo_inst);
1182	} else if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST && dccg->funcs->disable_symclk_se)	1184	dccg->funcs->set_dpstreamclk(dccg, REFCLK, tg->inst, dp_hpo_inst);
		1185	}
		1186	} else if (dccg && dccg->funcs->disable_symclk_se) {
1183	dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,	1187	dccg->funcs->disable_symclk_se(dccg, stream_enc->stream_enc_inst,
1184	link_enc->transmitter - TRANSMITTER_UNIPHY_A);	1188	link_enc->transmitter - TRANSMITTER_UNIPHY_A);
		1189	}
1185		1190
1186	if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {	1191	if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {
1187	/* TODO: This looks like a bug to me as we are disabling HPO IO when	1192	/* TODO: This looks like a bug to me as we are disabling HPO IO when
@@ -2656,11 +2661,11 @@ void dce110_prepare_bandwidth( · 1468 unmodified lines
2656	struct clk_mgr *dccg = dc->clk_mgr;	2661	struct clk_mgr *dccg = dc->clk_mgr;
2657		2662
2658	dce110_set_safe_displaymarks(&context->res_ctx, dc->res_pool);	2663	dce110_set_safe_displaymarks(&context->res_ctx, dc->res_pool);
2659		2664	if (dccg)
2660	dccg->funcs->update_clocks(	2665	dccg->funcs->update_clocks(
2661	dccg,	2666	dccg,
2662	context,	2667	context,
2663	false);	2668	false);
2664	}	2669	}
2665		2670
2666	void dce110_optimize_bandwidth(	2671	void dce110_optimize_bandwidth(
@@ -2671,10 +2676,11 @@ void dce110_optimize_bandwidth( · 4 unmodified lines
2671		2676
2672	dce110_set_displaymarks(dc, context);	2677	dce110_set_displaymarks(dc, context);
2673		2678
2674	dccg->funcs->update_clocks(	2679	if (dccg)
2675	dccg,	2680	dccg->funcs->update_clocks(
2676	context,	2681	dccg,
2677	true);	2682	context,
		2683	true);
2678	}	2684	}
2679		2685
2680	static void dce110_program_front_end_for_pipe(	2686	static void dce110_program_front_end_for_pipe(

drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c+2−6

 	struct dce_hwseq *hws = dc->hwseq;
 	unsigned int k1_div = PIXEL_RATE_DIV_NA;
 	unsigned int k2_div = PIXEL_RATE_DIV_NA;
-	struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link);
-	struct stream_encoder *stream_enc = pipe_ctx->stream_res.stream_enc;
 	if (dc->link_srv->dp_is_128b_132b_signal(pipe_ctx)) {
 		if (dc->hwseq->funcs.setup_hpo_hw_control)
 		dto_params.timing = &pipe_ctx->stream->timing;
 		dto_params.ref_dtbclk_khz = dc->clk_mgr->funcs->get_dtb_ref_clk_frequency(dc->clk_mgr);
 		dccg->funcs->set_dtbclk_dto(dccg, &dto_params);
-	} else if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST && dccg->funcs->enable_symclk_se)
+	} else {
-		dccg->funcs->enable_symclk_se(dccg,
+		}
-			stream_enc->stream_enc_inst, link_enc->transmitter - TRANSMITTER_UNIPHY_A);
 	if (hws->funcs.calculate_dccg_k1_k2_values && dc->res_pool->dccg->funcs->set_pixel_rate_div) {
 		hws->funcs.calculate_dccg_k1_k2_values(pipe_ctx, &k1_div, &k2_div);

drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c+23−0

@@ -1032,6 +1032,28 @@ static const struct dce_i2c_mask i2c_masks = { · 1031 unmodified lines
1032	I2C_COMMON_MASK_SH_LIST_DCN30(_MASK)	1032	I2C_COMMON_MASK_SH_LIST_DCN30(_MASK)
1033	};	1033	};
1034		1034
		1035	/* ========================================================== */
		1036
		1037	/*
		1038	* DPIA index \| Preferred Encoder \| Host Router
		1039	* 0 \| C \| 0
		1040	* 1 \| First Available \| 0
		1041	* 2 \| D \| 1
		1042	* 3 \| First Available \| 1
		1043	*/
		1044	/* ========================================================== */
		1045	static const enum engine_id dpia_to_preferred_enc_id_table[] = {
		1046	ENGINE_ID_DIGC,
		1047	ENGINE_ID_DIGC,
		1048	ENGINE_ID_DIGD,
		1049	ENGINE_ID_DIGD
		1050	};
		1051
		1052	static enum engine_id dcn314_get_preferred_eng_id_dpia(unsigned int dpia_index)
		1053	{
		1054	return dpia_to_preferred_enc_id_table[dpia_index];
		1055	}
		1056
1035	static struct dce_i2c_hw *dcn31_i2c_hw_create(	1057	static struct dce_i2c_hw *dcn31_i2c_hw_create(
1036	struct dc_context *ctx,	1058	struct dc_context *ctx,
1037	uint32_t inst)	1059	uint32_t inst)
@@ -1785,6 +1807,7 @@ static struct resource_funcs dcn314_res_pool_funcs = { · 747 unmodified lines
1785	.update_bw_bounding_box = dcn314_update_bw_bounding_box,	1807	.update_bw_bounding_box = dcn314_update_bw_bounding_box,
1786	.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,	1808	.patch_unknown_plane_state = dcn20_patch_unknown_plane_state,
1787	.get_panel_config_defaults = dcn314_get_panel_config_defaults,	1809	.get_panel_config_defaults = dcn314_get_panel_config_defaults,
		1810	.get_preferred_eng_id_dpia = dcn314_get_preferred_eng_id_dpia,
1788	};	1811	};
1789		1812
1790	static struct clock_source *dcn30_clock_source_create(	1813	static struct clock_source *dcn30_clock_source_create(

drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c+1−1

@@ -75,7 +75,7 @@ void mpc32_power_on_blnd_lut( · 74 unmodified lines
75	if (power_on) {	75	if (power_on) {
76	REG_UPDATE(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_1DLUT_MEM_PWR_FORCE, 0);	76	REG_UPDATE(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_1DLUT_MEM_PWR_FORCE, 0);
77	REG_WAIT(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_1DLUT_MEM_PWR_STATE, 0, 1, 5);	77	REG_WAIT(MPCC_MCM_MEM_PWR_CTRL[mpcc_id], MPCC_MCM_1DLUT_MEM_PWR_STATE, 0, 1, 5);
78	} else {	78	} else if (!mpc->ctx->dc->debug.disable_mem_low_power) {
79	ASSERT(false);	79	ASSERT(false);
80	/* TODO: change to mpc	80	/* TODO: change to mpc
81	* dpp_base->ctx->dc->optimized_required = true;	81	* dpp_base->ctx->dc->optimized_required = true;

drivers/gpu/drm/amd/display/dc/inc/core_types.h+1−0

@@ -65,6 +65,7 @@ struct resource_context; · 64 unmodified lines
65	struct clk_bw_params;	65	struct clk_bw_params;
66		66
67	struct resource_funcs {	67	struct resource_funcs {
		68	enum engine_id (*get_preferred_eng_id_dpia)(unsigned int dpia_index);
68	void (destroy)(struct resource_pool *pool);	69	void (destroy)(struct resource_pool *pool);
69	void (link_init)(struct dc_link link);	70	void (link_init)(struct dc_link link);
70	struct panel_cntl(panel_cntl_create)(	71	struct panel_cntl(panel_cntl_create)(

drivers/gpu/drm/amd/display/dc/link/link_factory.c+4−0

@@ -791,6 +791,10 @@ static bool construct_dpia(struct dc_link *link, · 790 unmodified lines
791	/* Set dpia port index : 0 to number of dpia ports */	791	/* Set dpia port index : 0 to number of dpia ports */
792	link->ddc_hw_inst = init_params->connector_index;	792	link->ddc_hw_inst = init_params->connector_index;
793		793
		794	// Assign Dpia preferred eng_id
		795	if (link->dc->res_pool->funcs->get_preferred_eng_id_dpia)
		796	link->dpia_preferred_eng_id = link->dc->res_pool->funcs->get_preferred_eng_id_dpia(link->ddc_hw_inst);
		797
794	/* TODO: Create link encoder */	798	/* TODO: Create link encoder */
795		799
796	link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED;	800	link->psr_settings.psr_version = DC_PSR_VERSION_UNSUPPORTED;

drivers/gpu/drm/amd/include/kgd_kfd_interface.h+4−5

 #include <linux/types.h>
 #include <linux/bitmap.h>
 #include <linux/dma-fence.h>
+#include "amdgpu_irq.h"
+#include "amdgpu_gfx.h"
 struct pci_dev;
 struct amdgpu_device;
-#define KGD_MAX_QUEUES 128
 struct kfd_dev;
 struct kgd_mem;
 	uint32_t wave_front_size;
 	uint32_t max_scratch_slots_per_cu;
 	uint32_t lds_size;
-	uint32_t cu_bitmap[4][4];
+	uint32_t cu_bitmap[AMDGPU_MAX_GC_INSTANCES][4][4];
 };
 /* For getting GPU local memory information from KGD */
 			uint32_t wait_times,
 			uint32_t grace_period,
 			uint32_t *reg_offset,
-			uint32_t *reg_data,
+			uint32_t *reg_data);
-			uint32_t inst);
 	void (*get_cu_occupancy)(struct amdgpu_device *adev, int pasid,
 			int *wave_cnt, int *max_waves_per_cu, uint32_t inst);
 	void (*program_trap_handler_settings)(struct amdgpu_device *adev,

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c+1−1

@@ -336,7 +336,7 @@ static int smu_v13_0_6_setup_driver_pptable(struct smu_context *smu) · 335 unmodified lines
336		336
337	/* Store one-time values in driver PPTable */	337	/* Store one-time values in driver PPTable */
338	if (!pptable->Init) {	338	if (!pptable->Init) {
339	while (retry--) {	339	while (--retry) {
340	ret = smu_v13_0_6_get_metrics_table(smu, NULL, true);	340	ret = smu_v13_0_6_get_metrics_table(smu, NULL, true);
341	if (ret)	341	if (ret)
342	return ret;	342	return ret;

drivers/gpu/drm/drm_connector.c+2−0

 /**
  * drm_mode_create_hdmi_colorspace_property - create hdmi colorspace property
  * @connector: connector to create the Colorspace property on.
+ * @supported_colorspaces: bitmap of supported color spaces
  *
  * Called by a driver the first time it's needed, must be attached to desired
  * HDMI connectors.
 /**
  * drm_mode_create_dp_colorspace_property - create dp colorspace property
  * @connector: connector to create the Colorspace property on.
+ * @supported_colorspaces: bitmap of supported color spaces
  *
  * Called by a driver the first time it's needed, must be attached to desired
  * DP connectors.

drivers/gpu/drm/drm_exec.c+1−1

@@ -56,7 +56,7 @@ static void drm_exec_unlock_all(struct drm_exec *exec) · 55 unmodified lines
56	struct drm_gem_object *obj;	56	struct drm_gem_object *obj;
57	unsigned long index;	57	unsigned long index;
58		58
59	drm_exec_for_each_locked_object(exec, index, obj) {	59	drm_exec_for_each_locked_object_reverse(exec, index, obj) {
60	dma_resv_unlock(obj->resv);	60	dma_resv_unlock(obj->resv);
61	drm_gem_object_put(obj);	61	drm_gem_object_put(obj);
62	}	62	}

drivers/gpu/drm/i915/display/intel_bios.c+21−0

@@ -3540,6 +3540,27 @@ enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata) · 3539 unmodified lines
3540	return map_aux_ch(devdata->i915, devdata->child.aux_channel);	3540	return map_aux_ch(devdata->i915, devdata->child.aux_channel);
3541	}	3541	}
3542		3542
		3543	bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata)
		3544	{
		3545	struct drm_i915_private *i915;
		3546	u8 aux_channel;
		3547	int count = 0;
		3548
		3549	if (!devdata \|\| !devdata->child.aux_channel)
		3550	return false;
		3551
		3552	i915 = devdata->i915;
		3553	aux_channel = devdata->child.aux_channel;
		3554
		3555	list_for_each_entry(devdata, &i915->display.vbt.display_devices, node) {
		3556	if (intel_bios_encoder_supports_dp(devdata) &&
		3557	aux_channel == devdata->child.aux_channel)
		3558	count++;
		3559	}
		3560
		3561	return count > 1;
		3562	}
		3563
3543	int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)	3564	int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3544	{	3565	{
3545	if (!devdata \|\| devdata->i915->display.vbt.version < 196 \|\| !devdata->child.iboost)	3566	if (!devdata \|\| devdata->i915->display.vbt.version < 196 \|\| !devdata->child.iboost)

drivers/gpu/drm/i915/display/intel_bios.h+1−0

@@ -273,6 +273,7 @@ enum aux_ch intel_bios_dp_aux_ch(const struct intel_bios_encoder_data *devdata); · 272 unmodified lines
273	int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata);	273	int intel_bios_dp_boost_level(const struct intel_bios_encoder_data *devdata);
274	int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata);	274	int intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data *devdata);
275	int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata);	275	int intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata);
		276	bool intel_bios_dp_has_shared_aux_ch(const struct intel_bios_encoder_data *devdata);
276	int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata);	277	int intel_bios_hdmi_boost_level(const struct intel_bios_encoder_data *devdata);
277	int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata);	278	int intel_bios_hdmi_ddc_pin(const struct intel_bios_encoder_data *devdata);
278	int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata);	279	int intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata);

drivers/gpu/drm/i915/display/intel_dp.c+6−1

 	/*
 	 * VBT and straps are liars. Also check HPD as that seems
 	 * to be the most reliable piece of information available.
+	 *
+	 * ... expect on devices that forgot to hook HPD up for eDP
+	 * (eg. Acer Chromebook C710), so we'll check it only if multiple
+	 * ports are attempting to use the same AUX CH, according to VBT.
 	 */
-	if (!intel_digital_port_connected(encoder)) {
+	if (intel_bios_dp_has_shared_aux_ch(encoder->devdata) &&
+	    !intel_digital_port_connected(encoder)) {
 		/*
 		 * If this fails, presume the DPCD answer came
 		 * from some other port using the same AUX CH.

drivers/gpu/drm/i915/gem/i915_gem_shmem.c+7−4

 	st->nents = 0;
 	for (i = 0; i < page_count; i++) {
 		struct folio *folio;
+		unsigned long nr_pages;
 		const unsigned int shrink[] = {
 			I915_SHRINK_BOUND | I915_SHRINK_UNBOUND,
 			0,
 			}
 		} while (1);
+		nr_pages = min_t(unsigned long,
+				folio_nr_pages(folio), page_count - i);
 		if (!i ||
 		    sg->length >= max_segment ||
 		    folio_pfn(folio) != next_pfn) {
 				sg = sg_next(sg);
 			st->nents++;
-			sg_set_folio(sg, folio, folio_size(folio), 0);
+			sg_set_folio(sg, folio, nr_pages * PAGE_SIZE, 0);
 		} else {
 			/* XXX: could overflow? */
-			sg->length += folio_size(folio);
+			sg->length += nr_pages * PAGE_SIZE;
 		}
-		next_pfn = folio_pfn(folio) + folio_nr_pages(folio);
+		next_pfn = folio_pfn(folio) + nr_pages;
-		i += folio_nr_pages(folio) - 1;
+		i += nr_pages - 1;
 		/* Check that the i965g/gm workaround works. */
 		GEM_BUG_ON(gfp & __GFP_DMA32 && next_pfn >= 0x00100000UL);

drivers/gpu/drm/i915/gt/intel_engine_cs.c+0−1

@@ -558,7 +558,6 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id, · 557 unmodified lines
558	DRIVER_CAPS(i915)->has_logical_contexts = true;	558	DRIVER_CAPS(i915)->has_logical_contexts = true;
559		559
560	ewma__engine_latency_init(&engine->latency);	560	ewma__engine_latency_init(&engine->latency);
561	seqcount_init(&engine->stats.execlists.lock);
562		561
563	ATOMIC_INIT_NOTIFIER_HEAD(&engine->context_status_notifier);	562	ATOMIC_INIT_NOTIFIER_HEAD(&engine->context_status_notifier);
564		563

drivers/gpu/drm/i915/gt/intel_execlists_submission.c+2−0

@@ -3550,6 +3550,8 @@ int intel_execlists_submission_setup(struct intel_engine_cs *engine) · 3549 unmodified lines
3550	logical_ring_default_vfuncs(engine);	3550	logical_ring_default_vfuncs(engine);
3551	logical_ring_default_irqs(engine);	3551	logical_ring_default_irqs(engine);
3552		3552
		3553	seqcount_init(&engine->stats.execlists.lock);
		3554
3553	if (engine->flags & I915_ENGINE_HAS_RCS_REG_STATE)	3555	if (engine->flags & I915_ENGINE_HAS_RCS_REG_STATE)
3554	rcs_submission_override(engine);	3556	rcs_submission_override(engine);
3555		3557

drivers/gpu/drm/i915/gt/intel_ggtt.c+17−6

 	vm->clear_range(vm, vma_res->start, vma_res->vma_size);
 }
+/*
+ * Reserve the top of the GuC address space for firmware images. Addresses
+ * beyond GUC_GGTT_TOP in the GuC address space are inaccessible by GuC,
+ * which makes for a suitable range to hold GuC/HuC firmware images if the
+ * size of the GGTT is 4G. However, on a 32-bit platform the size of the GGTT
+ * is limited to 2G, which is less than GUC_GGTT_TOP, but we reserve a chunk
+ * of the same size anyway, which is far more than needed, to keep the logic
+ * in uc_fw_ggtt_offset() simple.
+ */
+#define GUC_TOP_RESERVE_SIZE (SZ_4G - GUC_GGTT_TOP)
 static int ggtt_reserve_guc_top(struct i915_ggtt *ggtt)
 {
-	u64 size;
+	u64 offset;
 	int ret;
 	if (!intel_uc_uses_guc(&ggtt->vm.gt->uc))
 		return 0;
-	GEM_BUG_ON(ggtt->vm.total <= GUC_GGTT_TOP);
+	GEM_BUG_ON(ggtt->vm.total <= GUC_TOP_RESERVE_SIZE);
-	size = ggtt->vm.total - GUC_GGTT_TOP;
+	offset = ggtt->vm.total - GUC_TOP_RESERVE_SIZE;
-	ret = i915_gem_gtt_reserve(&ggtt->vm, NULL, &ggtt->uc_fw, size,
+	ret = i915_gem_gtt_reserve(&ggtt->vm, NULL, &ggtt->uc_fw,
-				   GUC_GGTT_TOP, I915_COLOR_UNEVICTABLE,
+				   GUC_TOP_RESERVE_SIZE, offset,
-				   PIN_NOEVICT);
+				   I915_COLOR_UNEVICTABLE, PIN_NOEVICT);
 	if (ret)
 		drm_dbg(&ggtt->vm.i915->drm,
 			"Failed to reserve top of GGTT for GuC\n");

drivers/gpu/drm/i915/gt/intel_lrc.c+3−2

 					  I915_BO_ALLOC_PM_VOLATILE);
 	if (IS_ERR(obj)) {
 		obj = i915_gem_object_create_shmem(engine->i915, context_size);
+		if (IS_ERR(obj))
+			return ERR_CAST(obj);
 		/*
 		 * Wa_22016122933: For Media version 13.0, all Media GT shared
 		 * memory needs to be mapped as WC on CPU side and UC (PAT
 		if (intel_gt_needs_wa_22016122933(engine->gt))
 			i915_gem_object_set_cache_coherency(obj, I915_CACHE_NONE);
 	}
-	if (IS_ERR(obj))
-		return ERR_CAST(obj);
 	vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
 	if (IS_ERR(vma)) {

drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c+35−3

@@ -1432,6 +1432,36 @@ static void guc_timestamp_ping(struct work_struct *wrk) · 1431 unmodified lines
1432	unsigned long index;	1432	unsigned long index;
1433	int srcu, ret;	1433	int srcu, ret;
1434		1434
		1435	/*
		1436	* Ideally the busyness worker should take a gt pm wakeref because the
		1437	* worker only needs to be active while gt is awake. However, the
		1438	* gt_park path cancels the worker synchronously and this complicates
		1439	* the flow if the worker is also running at the same time. The cancel
		1440	* waits for the worker and when the worker releases the wakeref, that
		1441	* would call gt_park and would lead to a deadlock.
		1442	*
		1443	* The resolution is to take the global pm wakeref if runtime pm is
		1444	* already active. If not, we don't need to update the busyness stats as
		1445	* the stats would already be updated when the gt was parked.
		1446	*
		1447	* Note:
		1448	* - We do not requeue the worker if we cannot take a reference to runtime
		1449	* pm since intel_guc_busyness_unpark would requeue the worker in the
		1450	* resume path.
		1451	*
		1452	* - If the gt was parked longer than time taken for GT timestamp to roll
		1453	* over, we ignore those rollovers since we don't care about tracking
		1454	* the exact GT time. We only care about roll overs when the gt is
		1455	* active and running workloads.
		1456	*
		1457	* - There is a window of time between gt_park and runtime suspend,
		1458	* where the worker may run. This is acceptable since the worker will
		1459	* not find any new data to update busyness.
		1460	*/
		1461	wakeref = intel_runtime_pm_get_if_active(&gt->i915->runtime_pm);
		1462	if (!wakeref)
		1463	return;
		1464
1435	/*	1465	/*
1436	* Synchronize with gt reset to make sure the worker does not	1466	* Synchronize with gt reset to make sure the worker does not
1437	* corrupt the engine/guc stats. NB: can't actually block waiting	1467	* corrupt the engine/guc stats. NB: can't actually block waiting
@@ -1440,10 +1470,9 @@ static void guc_timestamp_ping(struct work_struct *wrk) · 2 unmodified lines
1440	*/	1470	*/
1441	ret = intel_gt_reset_trylock(gt, &srcu);	1471	ret = intel_gt_reset_trylock(gt, &srcu);
1442	if (ret)	1472	if (ret)
1443	return;	1473	goto err_trylock;
1444		1474
1445	with_intel_runtime_pm(&gt->i915->runtime_pm, wakeref)	1475	__update_guc_busyness_stats(guc);
1446	__update_guc_busyness_stats(guc);
1447		1476
1448	/* adjust context stats for overflow */	1477	/* adjust context stats for overflow */
1449	xa_for_each(&guc->context_lookup, index, ce)	1478	xa_for_each(&guc->context_lookup, index, ce)
@@ -1452,6 +1481,9 @@ static void guc_timestamp_ping(struct work_struct *wrk) · 2 unmodified lines
1452	intel_gt_reset_unlock(gt, srcu);	1481	intel_gt_reset_unlock(gt, srcu);
1453		1482
1454	guc_enable_busyness_worker(guc);	1483	guc_enable_busyness_worker(guc);
		1484
		1485	err_trylock:
		1486	intel_runtime_pm_put(&gt->i915->runtime_pm, wakeref);
1455	}	1487	}
1456		1488
1457	static int guc_action_enable_usage_stats(struct intel_guc *guc)	1489	static int guc_action_enable_usage_stats(struct intel_guc *guc)

drivers/gpu/drm/meson/meson_encoder_hdmi.c+2−0

@@ -334,6 +334,8 @@ static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge, · 333 unmodified lines
334	return;	334	return;
335		335
336	cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid);	336	cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid);
		337
		338	kfree(edid);
337	} else	339	} else
338	cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier);	340	cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier);
339	}	341	}

drivers/gpu/drm/nouveau/nouveau_drv.h+5−14

@@ -189,21 +189,12 @@ u_free(void *addr) · 188 unmodified lines
189	static inline void *	189	static inline void *
190	u_memcpya(uint64_t user, unsigned int nmemb, unsigned int size)	190	u_memcpya(uint64_t user, unsigned int nmemb, unsigned int size)
191	{	191	{
192	void *mem;	192	void __user *userptr = u64_to_user_ptr(user);
193	void __user userptr = (void __force __user )(uintptr_t)user;	193	size_t bytes;
194		194
195	size *= nmemb;	195	if (unlikely(check_mul_overflow(nmemb, size, &bytes)))
196		196	return ERR_PTR(-EOVERFLOW);
197	mem = kvmalloc(size, GFP_KERNEL);	197	return vmemdup_user(userptr, bytes);
198	if (!mem)
199	return ERR_PTR(-ENOMEM);
200
201	if (copy_from_user(mem, userptr, size)) {
202	u_free(mem);
203	return ERR_PTR(-EFAULT);
204	}
205
206	return mem;
207	}	198	}
208		199
209	#include <nvif/object.h>	200	#include <nvif/object.h>

drivers/gpu/drm/nouveau/nouveau_exec.c+1−1

@@ -213,7 +213,7 @@ nouveau_exec_job_timeout(struct nouveau_job *job) · 212 unmodified lines
213		213
214	nouveau_sched_entity_fini(job->entity);	214	nouveau_sched_entity_fini(job->entity);
215		215
216	return DRM_GPU_SCHED_STAT_ENODEV;	216	return DRM_GPU_SCHED_STAT_NOMINAL;
217	}	217	}
218		218
219	static struct nouveau_job_ops nouveau_exec_job_ops = {	219	static struct nouveau_job_ops nouveau_exec_job_ops = {

drivers/gpu/drm/nouveau/nouveau_fence.c+1−1

@@ -207,7 +207,7 @@ nouveau_fence_context_new(struct nouveau_channel *chan, struct nouveau_fence_cha · 206 unmodified lines
207	int	207	int
208	nouveau_fence_emit(struct nouveau_fence *fence)	208	nouveau_fence_emit(struct nouveau_fence *fence)
209	{	209	{
210	struct nouveau_channel *chan = fence->channel;	210	struct nouveau_channel *chan = unrcu_pointer(fence->channel);
211	struct nouveau_fence_chan *fctx = chan->fence;	211	struct nouveau_fence_chan *fctx = chan->fence;
212	struct nouveau_fence_priv priv = (void)chan->drm->fence;	212	struct nouveau_fence_priv priv = (void)chan->drm->fence;
213	int ret;	213	int ret;

drivers/gpu/drm/nouveau/nouveau_sched.c+9−3

 static enum drm_gpu_sched_stat
 nouveau_sched_timedout_job(struct drm_sched_job *sched_job)
 {
+	struct drm_gpu_scheduler *sched = sched_job->sched;
 	struct nouveau_job *job = to_nouveau_job(sched_job);
+	enum drm_gpu_sched_stat stat = DRM_GPU_SCHED_STAT_NOMINAL;
-	NV_PRINTK(warn, job->cli, "Job timed out.\n");
+	drm_sched_stop(sched, sched_job);
 	if (job->ops->timeout)
-		return job->ops->timeout(job);
+		stat = job->ops->timeout(job);
+	else
+		NV_PRINTK(warn, job->cli, "Generic job timeout.\n");
+	drm_sched_start(sched, true);
-	return DRM_GPU_SCHED_STAT_ENODEV;
+	return stat;
 }
 static void

drivers/gpu/drm/radeon/radeon_sa.c+1−1

@@ -123,7 +123,7 @@ int radeon_sa_bo_new(struct radeon_sa_manager *sa_manager, · 122 unmodified lines
123	unsigned int size, unsigned int align)	123	unsigned int size, unsigned int align)
124	{	124	{
125	struct drm_suballoc *sa = drm_suballoc_new(&sa_manager->base, size,	125	struct drm_suballoc *sa = drm_suballoc_new(&sa_manager->base, size,
126	GFP_KERNEL, true, align);	126	GFP_KERNEL, false, align);
127		127
128	if (IS_ERR(sa)) {	128	if (IS_ERR(sa)) {
129	*sa_bo = NULL;	129	*sa_bo = NULL;

drivers/gpu/drm/tests/drm_mm_test.c+1−1

@@ -939,7 +939,7 @@ static void drm_test_mm_insert_range(struct kunit *test) · 938 unmodified lines
939	KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 0, max - 1));	939	KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 0, max - 1));
940	KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 0, max / 2));	940	KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size, 0, max / 2));
941	KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size,	941	KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size,
942	max / 2, max / 2));	942	max / 2, max));
943	KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size,	943	KUNIT_ASSERT_FALSE(test, __drm_test_mm_insert_range(test, count, size,
944	max / 4 + 1, 3 * max / 4 - 1));	944	max / 4 + 1, 3 * max / 4 - 1));
945		945

drivers/gpu/drm/tiny/gm12u320.c+5−5

@@ -70,10 +70,10 @@ MODULE_PARM_DESC(eco_mode, "Turn on Eco mode (less bright, more silent)"); · 69 unmodified lines
70	#define READ_STATUS_SIZE 13	70	#define READ_STATUS_SIZE 13
71	#define MISC_VALUE_SIZE 4	71	#define MISC_VALUE_SIZE 4
72		72
73	#define CMD_TIMEOUT msecs_to_jiffies(200)	73	#define CMD_TIMEOUT 200
74	#define DATA_TIMEOUT msecs_to_jiffies(1000)	74	#define DATA_TIMEOUT 1000
75	#define IDLE_TIMEOUT msecs_to_jiffies(2000)	75	#define IDLE_TIMEOUT 2000
76	#define FIRST_FRAME_TIMEOUT msecs_to_jiffies(2000)	76	#define FIRST_FRAME_TIMEOUT 2000
77		77
78	#define MISC_REQ_GET_SET_ECO_A 0xff	78	#define MISC_REQ_GET_SET_ECO_A 0xff
79	#define MISC_REQ_GET_SET_ECO_B 0x35	79	#define MISC_REQ_GET_SET_ECO_B 0x35
@@ -389,7 +389,7 @@ static void gm12u320_fb_update_work(struct work_struct *work) · 309 unmodified lines
389	* switches back to showing its logo.	389	* switches back to showing its logo.
390	*/	390	*/
391	queue_delayed_work(system_long_wq, &gm12u320->fb_update.work,	391	queue_delayed_work(system_long_wq, &gm12u320->fb_update.work,
392	IDLE_TIMEOUT);	392	msecs_to_jiffies(IDLE_TIMEOUT));
393		393
394	return;	394	return;
395	err:	395	err:

drivers/gpu/drm/virtio/virtgpu_submit.c+0−1

@@ -361,7 +361,6 @@ static void virtio_gpu_complete_submit(struct virtio_gpu_submit *submit) · 360 unmodified lines
361	submit->buf = NULL;	361	submit->buf = NULL;
362	submit->buflist = NULL;	362	submit->buflist = NULL;
363	submit->sync_file = NULL;	363	submit->sync_file = NULL;
364	submit->out_fence = NULL;
365	submit->out_fence_fd = -1;	364	submit->out_fence_fd = -1;
366	}	365	}
367		366

drivers/gpu/drm/vkms/vkms_composer.c+2−7

@@ -408,15 +408,10 @@ void vkms_set_composer(struct vkms_output *out, bool enabled) · 407 unmodified lines
408	if (enabled)	408	if (enabled)
409	drm_crtc_vblank_get(&out->crtc);	409	drm_crtc_vblank_get(&out->crtc);
410		410
411	mutex_lock(&out->enabled_lock);	411	spin_lock_irq(&out->lock);
412	old_enabled = out->composer_enabled;	412	old_enabled = out->composer_enabled;
413	out->composer_enabled = enabled;	413	out->composer_enabled = enabled;
414		414	spin_unlock_irq(&out->lock);
415	/* the composition wasn't enabled, so unlock the lock to make sure the lock
416	* will be balanced even if we have a failed commit
417	*/
418	if (!out->composer_enabled)
419	mutex_unlock(&out->enabled_lock);
420		415
421	if (old_enabled)	416	if (old_enabled)
422	drm_crtc_vblank_put(&out->crtc);	417	drm_crtc_vblank_put(&out->crtc);

drivers/gpu/drm/vkms/vkms_crtc.c+4−5

 	struct drm_crtc *crtc = &output->crtc;
 	struct vkms_crtc_state *state;
 	u64 ret_overrun;
-	bool ret, fence_cookie, composer_enabled;
+	bool ret, fence_cookie;
 	fence_cookie = dma_fence_begin_signalling();
 	if (ret_overrun != 1)
 		pr_warn("%s: vblank timer overrun\n", __func__);
+	spin_lock(&output->lock);
 	ret = drm_crtc_handle_vblank(crtc);
 	if (!ret)
 		DRM_ERROR("vkms failure on handling vblank");
 	state = output->composer_state;
-	composer_enabled = output->composer_enabled;
+	spin_unlock(&output->lock);
-	mutex_unlock(&output->enabled_lock);
-	if (state && composer_enabled) {
+	if (state && output->composer_enabled) {
 		u64 frame = drm_crtc_accurate_vblank_count(crtc);
 		/* update frame_start only if a queued vkms_composer_worker()
 	spin_lock_init(&vkms_out->lock);
 	spin_lock_init(&vkms_out->composer_lock);
-	mutex_init(&vkms_out->enabled_lock);
 	vkms_out->composer_workq = alloc_ordered_workqueue("vkms_composer", 0);
 	if (!vkms_out->composer_workq)

drivers/gpu/drm/vkms/vkms_drv.h+1−3

 	struct workqueue_struct *composer_workq;
 	/* protects concurrent access to composer */
 	spinlock_t lock;
-	/* guarantees that if the composer is enabled, a job will be queued */
-	struct mutex enabled_lock;
-	/* protected by @enabled_lock */
+	/* protected by @lock */
 	bool composer_enabled;
 	struct vkms_crtc_state *composer_state;

drivers/hwmon/nct6775-core.c+4−0

 	struct device *dev = kobj_to_dev(kobj);
 	struct nct6775_data *data = dev_get_drvdata(dev);
 	int in = index / 5;	/* voltage index */
+	int nr = index % 5;	/* attribute index */
+	if (nr == 1 && data->ALARM_BITS[in] == -1)
+		return 0;
 	if (!(data->have_in & BIT(in)))
 		return 0;

drivers/i2c/Kconfig+1−1

@@ -72,7 +72,7 @@ config I2C_MUX · 71 unmodified lines
72	source "drivers/i2c/muxes/Kconfig"	72	source "drivers/i2c/muxes/Kconfig"
73		73
74	config I2C_ATR	74	config I2C_ATR
75	tristate "I2C Address Translator (ATR) support"	75	tristate "I2C Address Translator (ATR) support" if COMPILE_TEST
76	help	76	help
77	Enable support for I2C Address Translator (ATR) chips.	77	Enable support for I2C Address Translator (ATR) chips.
78		78

drivers/i2c/busses/Kconfig+2−2

@@ -1384,10 +1384,10 @@ config I2C_ICY · 1383 unmodified lines
1384		1384
1385	config I2C_MLXCPLD	1385	config I2C_MLXCPLD
1386	tristate "Mellanox I2C driver"	1386	tristate "Mellanox I2C driver"
1387	depends on X86_64 \|\| ARM64 \|\| COMPILE_TEST	1387	depends on X86_64 \|\| (ARM64 && ACPI) \|\| COMPILE_TEST
1388	help	1388	help
1389	This exposes the Mellanox platform I2C busses to the linux I2C layer	1389	This exposes the Mellanox platform I2C busses to the linux I2C layer
1390	for X86 based systems.	1390	for X86 and ARM64/ACPI based systems.
1391	Controller is implemented as CPLD logic.	1391	Controller is implemented as CPLD logic.
1392		1392
1393	This driver can also be built as a module. If so, the module will be	1393	This driver can also be built as a module. If so, the module will be

drivers/i2c/busses/i2c-aspeed.c+5−2

 	if (time_left == 0) {
 		/*
-		 * If timed out and bus is still busy in a multi master
+		 * In a multi-master setup, if a timeout occurs, attempt
-		 * environment, attempt recovery at here.
+		 * recovery. But if the bus is idle, we still need to reset the
+		 * i2c controller to clear the remaining interrupts.
 		 */
 		if (bus->multi_master &&
 		    (readl(bus->base + ASPEED_I2C_CMD_REG) &
 		     ASPEED_I2CD_BUS_BUSY_STS))
 			aspeed_i2c_recover_bus(bus);
+		else
+			aspeed_i2c_reset(bus);
 		/*
 		 * If timed out and the state is still pending, drop the pending

drivers/i2c/busses/i2c-cadence.c+1−0

@@ -182,6 +182,7 @@ enum cdns_i2c_slave_state { · 181 unmodified lines
182	* @reset: Reset control for the device	182	* @reset: Reset control for the device
183	* @quirks: flag for broken hold bit usage in r1p10	183	* @quirks: flag for broken hold bit usage in r1p10
184	* @ctrl_reg: Cached value of the control register.	184	* @ctrl_reg: Cached value of the control register.
		185	* @rinfo: I2C GPIO recovery information
185	* @ctrl_reg_diva_divb: value of fields DIV_A and DIV_B from CR register	186	* @ctrl_reg_diva_divb: value of fields DIV_A and DIV_B from CR register
186	* @slave: Registered slave instance.	187	* @slave: Registered slave instance.
187	* @dev_mode: I2C operating role(master/slave).	188	* @dev_mode: I2C operating role(master/slave).

drivers/i2c/busses/i2c-designware-common.c+17−0

@@ -441,8 +441,25 @@ err_release_lock: · 440 unmodified lines
441		441
442	void __i2c_dw_disable(struct dw_i2c_dev *dev)	442	void __i2c_dw_disable(struct dw_i2c_dev *dev)
443	{	443	{
		444	unsigned int raw_intr_stats;
		445	unsigned int enable;
444	int timeout = 100;	446	int timeout = 100;
		447	bool abort_needed;
445	unsigned int status;	448	unsigned int status;
		449	int ret;
		450
		451	regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_intr_stats);
		452	regmap_read(dev->map, DW_IC_ENABLE, &enable);
		453
		454	abort_needed = raw_intr_stats & DW_IC_INTR_MST_ON_HOLD;
		455	if (abort_needed) {
		456	regmap_write(dev->map, DW_IC_ENABLE, enable \| DW_IC_ENABLE_ABORT);
		457	ret = regmap_read_poll_timeout(dev->map, DW_IC_ENABLE, enable,
		458	!(enable & DW_IC_ENABLE_ABORT), 10,
		459	100);
		460	if (ret)
		461	dev_err(dev->dev, "timeout while trying to abort current transfer\n");
		462	}
446		463
447	do {	464	do {
448	__i2c_dw_disable_nowait(dev);	465	__i2c_dw_disable_nowait(dev);

drivers/i2c/busses/i2c-designware-core.h+3−0

 #define DW_IC_INTR_START_DET			BIT(10)
 #define DW_IC_INTR_GEN_CALL			BIT(11)
 #define DW_IC_INTR_RESTART_DET			BIT(12)
+#define DW_IC_INTR_MST_ON_HOLD			BIT(13)
 #define DW_IC_INTR_DEFAULT_MASK			(DW_IC_INTR_RX_FULL | \
 						 DW_IC_INTR_TX_ABRT | \
 						 DW_IC_INTR_RX_UNDER | \
 						 DW_IC_INTR_RD_REQ)
+#define DW_IC_ENABLE_ABORT			BIT(1)
 #define DW_IC_STATUS_ACTIVITY			BIT(0)
 #define DW_IC_STATUS_TFE			BIT(2)
 #define DW_IC_STATUS_RFNE			BIT(3)

drivers/i2c/busses/i2c-i801.c+1−0

@@ -1754,6 +1754,7 @@ static int i801_probe(struct pci_dev dev, const struct pci_device_id id) · 1753 unmodified lines
1754	"SMBus I801 adapter at %04lx", priv->smba);	1754	"SMBus I801 adapter at %04lx", priv->smba);
1755	err = i2c_add_adapter(&priv->adapter);	1755	err = i2c_add_adapter(&priv->adapter);
1756	if (err) {	1756	if (err) {
		1757	platform_device_unregister(priv->tco_pdev);
1757	i801_acpi_remove(priv);	1758	i801_acpi_remove(priv);
1758	return err;	1759	return err;
1759	}	1760	}

drivers/i2c/busses/i2c-npcm7xx.c+7−10

 {
 	struct i2c_msg *msgs;
 	int msgs_num;
+	bool do_complete = false;
 	msgs = bus->msgs;
 	msgs_num = bus->msgs_num;
 				 msgs[1].flags & I2C_M_RD)
 				msgs[1].len = info;
 		}
-		if (completion_done(&bus->cmd_complete) == false)
+		do_complete = true;
-			complete(&bus->cmd_complete);
+		break;
-	break;
 	case I2C_NACK_IND:
 		/* MASTER transmit got a NACK before tx all bytes */
 		bus->cmd_err = -ENXIO;
-		if (bus->master_or_slave == I2C_MASTER)
+		do_complete = true;
-			complete(&bus->cmd_complete);
 		break;
 	case I2C_BUS_ERR_IND:
 		/* Bus error */
 		bus->cmd_err = -EAGAIN;
-		if (bus->master_or_slave == I2C_MASTER)
+		do_complete = true;
-			complete(&bus->cmd_complete);
 		break;
 	case I2C_WAKE_UP_IND:
 		/* I2C wake up */
 	if (bus->slave)
 		bus->master_or_slave = I2C_SLAVE;
 #endif
+	if (do_complete)
+		complete(&bus->cmd_complete);
 }
 static u8 npcm_i2c_fifo_usage(struct npcm_i2c *bus)

drivers/i2c/busses/i2c-xiic.c+1−1

@@ -710,7 +710,7 @@ static irqreturn_t xiic_process(int irq, void *dev_id) · 709 unmodified lines
710	* reset the IP instead of just flush fifos	710	* reset the IP instead of just flush fifos
711	*/	711	*/
712	ret = xiic_reinit(i2c);	712	ret = xiic_reinit(i2c);
713	if (!ret)	713	if (ret < 0)
714	dev_dbg(i2c->adap.dev.parent, "reinit failed\n");	714	dev_dbg(i2c->adap.dev.parent, "reinit failed\n");
715		715
716	if (i2c->rx_msg) {	716	if (i2c->rx_msg) {

drivers/i2c/i2c-mux.c+1−1

@@ -341,7 +341,7 @@ int i2c_mux_add_adapter(struct i2c_mux_core *muxc, · 340 unmodified lines
341	priv->adap.lock_ops = &i2c_parent_lock_ops;	341	priv->adap.lock_ops = &i2c_parent_lock_ops;
342		342
343	/* Sanity check on class */	343	/* Sanity check on class */
344	if (i2c_mux_parent_classes(parent) & class)	344	if (i2c_mux_parent_classes(parent) & class & ~I2C_CLASS_DEPRECATED)
345	dev_err(&parent->dev,	345	dev_err(&parent->dev,
346	"Segment %d behind mux can't share classes with ancestors\n",	346	"Segment %d behind mux can't share classes with ancestors\n",
347	chan_id);	347	chan_id);

drivers/i2c/muxes/i2c-demux-pinctrl.c+4−0

 		props[i].name = devm_kstrdup(&pdev->dev, "status", GFP_KERNEL);
 		props[i].value = devm_kstrdup(&pdev->dev, "ok", GFP_KERNEL);
+		if (!props[i].name || !props[i].value) {
+			err = -ENOMEM;
+			goto err_rollback;
+		}
 		props[i].length = 3;
 		of_changeset_init(&priv->chan[i].chgset);

drivers/i2c/muxes/i2c-mux-gpio.c+3−1

 		} else if (is_acpi_node(child)) {
 			rc = acpi_get_local_address(ACPI_HANDLE_FWNODE(child), values + i);
-			if (rc)
+			if (rc) {
+				fwnode_handle_put(child);
 				return dev_err_probe(dev, rc, "Cannot get address\n");
+			}
 		}
 		i++;

drivers/irqchip/irq-xtensa-mx.c+1−0

@@ -12,6 +12,7 @@ · 11 unmodified lines
12	#include <linux/irqdomain.h>	12	#include <linux/irqdomain.h>
13	#include <linux/irq.h>	13	#include <linux/irq.h>
14	#include <linux/irqchip.h>	14	#include <linux/irqchip.h>
		15	#include <linux/irqchip/xtensa-mx.h>
15	#include <linux/of.h>	16	#include <linux/of.h>
16		17
17	#include <asm/mxregs.h>	18	#include <asm/mxregs.h>

drivers/md/dm-core.h+1−0

@@ -214,6 +214,7 @@ struct dm_table { · 213 unmodified lines
214		214
215	/* a list of devices used by this table */	215	/* a list of devices used by this table */
216	struct list_head devices;	216	struct list_head devices;
		217	struct rw_semaphore devices_lock;
217		218
218	/* events get handed up using this callback */	219	/* events get handed up using this callback */
219	void (event_fn)(void data);	220	void (event_fn)(void data);

drivers/md/dm-ioctl.c+6−1

 	struct dm_dev_internal *dd;
 	struct dm_target_deps *deps;
+	down_read(&table->devices_lock);
 	deps = get_result_buffer(param, param_size, &len);
 	/*
 	needed = struct_size(deps, dev, count);
 	if (len < needed) {
 		param->flags |= DM_BUFFER_FULL_FLAG;
-		return;
+		goto out;
 	}
 	/*
 		deps->dev[count++] = huge_encode_dev(dd->dm_dev->bdev->bd_dev);
 	param->data_size = param->data_start + needed;
+out:
+	up_read(&table->devices_lock);
 }
 static int table_deps(struct file *filp, struct dm_ioctl *param, size_t param_size)

drivers/md/dm-table.c+24−8

 		return -ENOMEM;
 	INIT_LIST_HEAD(&t->devices);
+	init_rwsem(&t->devices_lock);
 	if (!num_targets)
 		num_targets = KEYS_PER_NODE;
 	if (dev == disk_devt(t->md->disk))
 		return -EINVAL;
+	down_write(&t->devices_lock);
 	dd = find_device(&t->devices, dev);
 	if (!dd) {
 		dd = kmalloc(sizeof(*dd), GFP_KERNEL);
-		if (!dd)
+		if (!dd) {
-			return -ENOMEM;
+			r = -ENOMEM;
+			goto unlock_ret_r;
+		}
 		r = dm_get_table_device(t->md, dev, mode, &dd->dm_dev);
 		if (r) {
 			kfree(dd);
-			return r;
+			goto unlock_ret_r;
 		}
 		refcount_set(&dd->count, 1);
 	} else if (dd->dm_dev->mode != (mode | dd->dm_dev->mode)) {
 		r = upgrade_mode(dd, mode, t->md);
 		if (r)
-			return r;
+			goto unlock_ret_r;
 	}
 	refcount_inc(&dd->count);
 out:
+	up_write(&t->devices_lock);
 	*result = dd->dm_dev;
 	return 0;
+unlock_ret_r:
+	up_write(&t->devices_lock);
+	return r;
 }
 EXPORT_SYMBOL(dm_get_device);
 void dm_put_device(struct dm_target *ti, struct dm_dev *d)
 {
 	int found = 0;
-	struct list_head *devices = &ti->table->devices;
+	struct dm_table *t = ti->table;
+	struct list_head *devices = &t->devices;
 	struct dm_dev_internal *dd;
+	down_write(&t->devices_lock);
 	list_for_each_entry(dd, devices, list) {
 		if (dd->dm_dev == d) {
 			found = 1;
 	}
 	if (!found) {
 		DMERR("%s: device %s not in table devices list",
-		      dm_device_name(ti->table->md), d->name);
+		      dm_device_name(t->md), d->name);
-		return;
+		goto unlock_ret;
 	}
 	if (refcount_dec_and_test(&dd->count)) {
-		dm_put_table_device(ti->table->md, d);
+		dm_put_table_device(t->md, d);
 		list_del(&dd->list);
 		kfree(dd);
 	}
+unlock_ret:
+	up_write(&t->devices_lock);
 }
 EXPORT_SYMBOL(dm_put_device);

drivers/md/dm.c+2−21

 	rcu_read_unlock();
 }
-static inline struct dm_table *dm_get_live_table_bio(struct mapped_device *md,
-					int *srcu_idx, blk_opf_t bio_opf)
-{
-	if (bio_opf & REQ_NOWAIT)
-		return dm_get_live_table_fast(md);
-	else
-		return dm_get_live_table(md, srcu_idx);
-}
-static inline void dm_put_live_table_bio(struct mapped_device *md, int srcu_idx,
-					 blk_opf_t bio_opf)
-{
-	if (bio_opf & REQ_NOWAIT)
-		dm_put_live_table_fast(md);
-	else
-		dm_put_live_table(md, srcu_idx);
-}
 static char *_dm_claim_ptr = "I belong to device-mapper";
 /*
 	struct mapped_device *md = bio->bi_bdev->bd_disk->private_data;
 	int srcu_idx;
 	struct dm_table *map;
-	blk_opf_t bio_opf = bio->bi_opf;
-	map = dm_get_live_table_bio(md, &srcu_idx, bio_opf);
+	map = dm_get_live_table(md, &srcu_idx);
 	/* If suspended, or map not yet available, queue this IO for later */
 	if (unlikely(test_bit(DMF_BLOCK_IO_FOR_SUSPEND, &md->flags)) ||
 	dm_split_and_process_bio(md, map, bio);
 out:
-	dm_put_live_table_bio(md, srcu_idx, bio_opf);
+	dm_put_live_table(md, srcu_idx);
 }
 static bool dm_poll_dm_io(struct dm_io *io, struct io_comp_batch *iob,

drivers/md/md.c+16−7

 	} else
 		mutex_unlock(&mddev->reconfig_mutex);
+	md_wakeup_thread(mddev->thread);
+	wake_up(&mddev->sb_wait);
 	list_for_each_entry_safe(rdev, tmp, &delete, same_set) {
 		list_del_init(&rdev->same_set);
 		kobject_del(&rdev->kobj);
 		export_rdev(rdev, mddev);
 	}
-	md_wakeup_thread(mddev->thread);
-	wake_up(&mddev->sb_wait);
 }
 EXPORT_SYMBOL_GPL(mddev_unlock);
 	if (test_bit(AutoDetected, &rdev->flags))
 		md_autodetect_dev(rdev->bdev->bd_dev);
 #endif
-	blkdev_put(rdev->bdev, mddev->external ? &claim_rdev : rdev);
+	blkdev_put(rdev->bdev,
+		   test_bit(Holder, &rdev->flags) ? rdev : &claim_rdev);
 	rdev->bdev = NULL;
 	kobject_put(&rdev->kobj);
 }
 static struct md_rdev *md_import_device(dev_t newdev, int super_format, int super_minor)
 {
 	struct md_rdev *rdev;
+	struct md_rdev *holder;
 	sector_t size;
 	int err;
 	if (err)
 		goto out_clear_rdev;
+	if (super_format == -2) {
+		holder = &claim_rdev;
+	} else {
+		holder = rdev;
+		set_bit(Holder, &rdev->flags);
+	}
 	rdev->bdev = blkdev_get_by_dev(newdev, BLK_OPEN_READ | BLK_OPEN_WRITE,
-			super_format == -2 ? &claim_rdev : rdev, NULL);
+				       holder, NULL);
 	if (IS_ERR(rdev->bdev)) {
 		pr_warn("md: could not open device unknown-block(%u,%u).\n",
 			MAJOR(newdev), MINOR(newdev));
 	return rdev;
 out_blkdev_put:
-	blkdev_put(rdev->bdev, super_format == -2 ? &claim_rdev : rdev);
+	blkdev_put(rdev->bdev, holder);
 out_clear_rdev:
 	md_rdev_clear(rdev);
 out_free_rdev:
 	spin_unlock(&all_mddevs_lock);
 	if (to_put)
-		mddev_put(mddev);
+		mddev_put(to_put);
 	return next_mddev;
 }

drivers/md/md.h+3−0

 				 * check if there is collision between raid1
 				 * serial bios.
 				 */
+	Holder,			/* rdev is used as holder while opening
+				 * underlying disk exclusively.
+				 */
 };
 static inline int is_badblock(struct md_rdev *rdev, sector_t s, int sectors,

drivers/md/raid1.c+1−2

 	struct r1conf *conf = mddev->private;
 	int err = 0;
 	int number = rdev->raid_disk;
+	struct raid1_info *p = conf->mirrors + number;
 	if (unlikely(number >= conf->raid_disks))
 		goto abort;
-	struct raid1_info *p = conf->mirrors + number;
 	if (rdev != p->rdev)
 		p = conf->mirrors + conf->raid_disks + number;

drivers/media/common/videobuf2/frame_vector.c+4−2

  * different type underlying the specified range of virtual addresses.
  * When the function isn't able to map a single page, it returns error.
  *
+ * Note that get_vaddr_frames() cannot follow VM_IO mappings. It used
+ * to be able to do that, but that could (racily) return non-refcounted
+ * pfns.
+ *
  * This function takes care of grabbing mmap_lock as necessary.
  */
 int get_vaddr_frames(unsigned long start, unsigned int nr_frames, bool write,
 	if (likely(ret > 0))
 		return ret;
-	/* This used to (racily) return non-refcounted pfns. Let people know */
-	WARN_ONCE(1, "get_vaddr_frames() cannot follow VM_IO mapping");
 	vec->nr_frames = 0;
 	return ret ? ret : -EFAULT;
 }

drivers/media/i2c/imx219.c+7−6

 	struct v4l2_mbus_framefmt *format;
 	struct v4l2_rect *crop;
-	/* Initialize try_fmt */
+	/* Initialize the format. */
 	format = v4l2_subdev_get_pad_format(sd, state, 0);
 	imx219_update_pad_format(imx219, &supported_modes[0], format,
 				 MEDIA_BUS_FMT_SRGGB10_1X10);
-	/* Initialize crop rectangle. */
+	/* Initialize the crop rectangle. */
 	crop = v4l2_subdev_get_pad_crop(sd, state, 0);
 	crop->top = IMX219_PIXEL_ARRAY_TOP;
 	crop->left = IMX219_PIXEL_ARRAY_LEFT;
 	const struct imx219_mode *mode;
 	int exposure_max, exposure_def, hblank;
 	struct v4l2_mbus_framefmt *format;
+	struct v4l2_rect *crop;
 	mode = v4l2_find_nearest_size(supported_modes,
 				      ARRAY_SIZE(supported_modes),
 				      fmt->format.width, fmt->format.height);
 	imx219_update_pad_format(imx219, mode, &fmt->format, fmt->format.code);
 	format = v4l2_subdev_get_pad_format(sd, sd_state, 0);
+	crop = v4l2_subdev_get_pad_crop(sd, sd_state, 0);
-	if (imx219->mode == mode && format->code == fmt->format.code)
+	*format = fmt->format;
-		return 0;
+	*crop = mode->crop;
 	if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
 		imx219->mode = mode;
 					 hblank);
 	}
-	*format = fmt->format;
 	return 0;
 }

drivers/media/i2c/max9286.c+0−1

@@ -1110,7 +1110,6 @@ err_async: · 1109 unmodified lines
1110		1110
1111	static void max9286_v4l2_unregister(struct max9286_priv *priv)	1111	static void max9286_v4l2_unregister(struct max9286_priv *priv)
1112	{	1112	{
1113	fwnode_handle_put(priv->sd.fwnode);
1114	v4l2_ctrl_handler_free(&priv->ctrls);	1113	v4l2_ctrl_handler_free(&priv->ctrls);
1115	v4l2_async_unregister_subdev(&priv->sd);	1114	v4l2_async_unregister_subdev(&priv->sd);
1116	max9286_v4l2_notifier_unregister(priv);	1115	max9286_v4l2_notifier_unregister(priv);

drivers/media/i2c/rdacm21.c+0−1

@@ -608,7 +608,6 @@ static void rdacm21_remove(struct i2c_client *client) · 607 unmodified lines
608	v4l2_async_unregister_subdev(&dev->sd);	608	v4l2_async_unregister_subdev(&dev->sd);
609	v4l2_ctrl_handler_free(&dev->ctrls);	609	v4l2_ctrl_handler_free(&dev->ctrls);
610	i2c_unregister_device(dev->isp);	610	i2c_unregister_device(dev->isp);
611	fwnode_handle_put(dev->sd.fwnode);
612	}	611	}
613		612
614	static const struct of_device_id rdacm21_of_ids[] = {	613	static const struct of_device_id rdacm21_of_ids[] = {

drivers/media/pci/bt8xx/bttv-risc.c+1−3

 	sg = sglist;
 	for (line = 0; line < store_lines; line++) {
 		if ((line >= (store_lines - VCR_HACK_LINES)) &&
-		    (btv->opt_vcr_hack ||
+		    btv->opt_vcr_hack)
-		    (V4L2_FIELD_HAS_BOTH(btv->field) ||
-		     btv->field == V4L2_FIELD_ALTERNATE)))
 			continue;
 		while (offset && offset >= sg_dma_len(sg)) {
 			offset -= sg_dma_len(sg);

drivers/media/pci/intel/ivsc/Kconfig+4−1

 config INTEL_VSC
 	tristate "Intel Visual Sensing Controller"
-	depends on INTEL_MEI && ACPI
+	depends on INTEL_MEI && ACPI && VIDEO_DEV
+	select MEDIA_CONTROLLER
+	select VIDEO_V4L2_SUBDEV_API
+	select V4L2_ASYNC
 	help
 	  This adds support for Intel Visual Sensing Controller (IVSC).

drivers/media/platform/marvell/Kconfig+2−2

@@ -7,7 +7,7 @@ config VIDEO_CAFE_CCIC · 6 unmodified lines
7	depends on V4L_PLATFORM_DRIVERS	7	depends on V4L_PLATFORM_DRIVERS
8	depends on PCI && I2C && VIDEO_DEV	8	depends on PCI && I2C && VIDEO_DEV
9	depends on COMMON_CLK	9	depends on COMMON_CLK
10	select VIDEO_OV7670	10	select VIDEO_OV7670 if MEDIA_SUBDRV_AUTOSELECT && VIDEO_CAMERA_SENSOR
11	select VIDEOBUF2_VMALLOC	11	select VIDEOBUF2_VMALLOC
12	select VIDEOBUF2_DMA_CONTIG	12	select VIDEOBUF2_DMA_CONTIG
13	select VIDEOBUF2_DMA_SG	13	select VIDEOBUF2_DMA_SG
@@ -22,7 +22,7 @@ config VIDEO_MMP_CAMERA · 8 unmodified lines
22	depends on I2C && VIDEO_DEV	22	depends on I2C && VIDEO_DEV
23	depends on ARCH_MMP \|\| COMPILE_TEST	23	depends on ARCH_MMP \|\| COMPILE_TEST
24	depends on COMMON_CLK	24	depends on COMMON_CLK
25	select VIDEO_OV7670	25	select VIDEO_OV7670 if MEDIA_SUBDRV_AUTOSELECT && VIDEO_CAMERA_SENSOR
26	select I2C_GPIO	26	select I2C_GPIO
27	select VIDEOBUF2_VMALLOC	27	select VIDEOBUF2_VMALLOC
28	select VIDEOBUF2_DMA_CONTIG	28	select VIDEOBUF2_DMA_CONTIG

drivers/media/platform/nxp/imx-mipi-csis.c+0−2

 	v4l2_async_unregister_subdev(&csis->sd);
 err_disable_clock:
 	mipi_csis_clk_disable(csis);
-	fwnode_handle_put(csis->sd.fwnode);
 	return ret;
 }
 	mipi_csis_clk_disable(csis);
 	v4l2_subdev_cleanup(&csis->sd);
 	media_entity_cleanup(&csis->sd.entity);
-	fwnode_handle_put(csis->sd.fwnode);
 	pm_runtime_set_suspended(&pdev->dev);
 }

drivers/media/platform/via/Kconfig+1−1

@@ -7,7 +7,7 @@ config VIDEO_VIA_CAMERA · 6 unmodified lines
7	depends on V4L_PLATFORM_DRIVERS	7	depends on V4L_PLATFORM_DRIVERS
8	depends on FB_VIA && VIDEO_DEV	8	depends on FB_VIA && VIDEO_DEV
9	select VIDEOBUF2_DMA_SG	9	select VIDEOBUF2_DMA_SG
10	select VIDEO_OV7670	10	select VIDEO_OV7670 if VIDEO_CAMERA_SENSOR
11	help	11	help
12	Driver support for the integrated camera controller in VIA	12	Driver support for the integrated camera controller in VIA
13	Chrome9 chipsets. Currently only tested on OLPC xo-1.5 systems	13	Chrome9 chipsets. Currently only tested on OLPC xo-1.5 systems

drivers/media/usb/em28xx/Kconfig+2−2

@@ -12,8 +12,8 @@ config VIDEO_EM28XX_V4L2 · 11 unmodified lines
12	select VIDEO_SAA711X if MEDIA_SUBDRV_AUTOSELECT	12	select VIDEO_SAA711X if MEDIA_SUBDRV_AUTOSELECT
13	select VIDEO_TVP5150 if MEDIA_SUBDRV_AUTOSELECT	13	select VIDEO_TVP5150 if MEDIA_SUBDRV_AUTOSELECT
14	select VIDEO_MSP3400 if MEDIA_SUBDRV_AUTOSELECT	14	select VIDEO_MSP3400 if MEDIA_SUBDRV_AUTOSELECT
15	select VIDEO_MT9V011 if MEDIA_SUBDRV_AUTOSELECT && MEDIA_CAMERA_SUPPORT	15	select VIDEO_MT9V011 if MEDIA_SUBDRV_AUTOSELECT && VIDEO_CAMERA_SENSOR
16	select VIDEO_OV2640 if MEDIA_SUBDRV_AUTOSELECT && MEDIA_CAMERA_SUPPORT	16	select VIDEO_OV2640 if MEDIA_SUBDRV_AUTOSELECT && VIDEO_CAMERA_SENSOR
17	help	17	help
18	This is a video4linux driver for Empia 28xx based TV cards.	18	This is a video4linux driver for Empia 28xx based TV cards.
19		19

drivers/media/usb/go7007/Kconfig+1−1

 	select VIDEO_TW2804 if MEDIA_SUBDRV_AUTOSELECT
 	select VIDEO_TW9903 if MEDIA_SUBDRV_AUTOSELECT
 	select VIDEO_TW9906 if MEDIA_SUBDRV_AUTOSELECT
-	select VIDEO_OV7640 if MEDIA_SUBDRV_AUTOSELECT && MEDIA_CAMERA_SUPPORT
 	select VIDEO_UDA1342 if MEDIA_SUBDRV_AUTOSELECT
+	select VIDEO_OV7640 if MEDIA_SUBDRV_AUTOSELECT && VIDEO_CAMERA_SENSOR
 	help
 	  This is a video4linux driver for the WIS GO7007 MPEG
 	  encoder chip.

drivers/media/usb/uvc/uvc_ctrl.c+3−0

@@ -1402,6 +1402,9 @@ int uvc_query_v4l2_menu(struct uvc_video_chain *chain, · 1401 unmodified lines
1402	query_menu->id = id;	1402	query_menu->id = id;
1403	query_menu->index = index;	1403	query_menu->index = index;
1404		1404
		1405	if (index >= BITS_PER_TYPE(mapping->menu_mask))
		1406	return -EINVAL;
		1407
1405	ret = mutex_lock_interruptible(&chain->ctrl_mutex);	1408	ret = mutex_lock_interruptible(&chain->ctrl_mutex);
1406	if (ret < 0)	1409	if (ret < 0)
1407	return -ERESTARTSYS;	1410	return -ERESTARTSYS;

drivers/mfd/cs42l43.c+2−2

@@ -1178,8 +1178,8 @@ err: · 1177 unmodified lines
1178	}	1178	}
1179		1179
1180	EXPORT_NS_GPL_DEV_PM_OPS(cs42l43_pm_ops, MFD_CS42L43) = {	1180	EXPORT_NS_GPL_DEV_PM_OPS(cs42l43_pm_ops, MFD_CS42L43) = {
1181	SET_SYSTEM_SLEEP_PM_OPS(cs42l43_suspend, cs42l43_resume)	1181	SYSTEM_SLEEP_PM_OPS(cs42l43_suspend, cs42l43_resume)
1182	SET_RUNTIME_PM_OPS(cs42l43_runtime_suspend, cs42l43_runtime_resume, NULL)	1182	RUNTIME_PM_OPS(cs42l43_runtime_suspend, cs42l43_runtime_resume, NULL)
1183	};	1183	};
1184		1184
1185	MODULE_DESCRIPTION("CS42L43 Core Driver");	1185	MODULE_DESCRIPTION("CS42L43 Core Driver");

drivers/misc/cardreader/rts5227.c+6−49

@@ -83,63 +83,20 @@ static void rts5227_fetch_vendor_settings(struct rtsx_pcr *pcr) · 82 unmodified lines
83		83
84	static void rts5227_init_from_cfg(struct rtsx_pcr *pcr)	84	static void rts5227_init_from_cfg(struct rtsx_pcr *pcr)
85	{	85	{
86	struct pci_dev *pdev = pcr->pci;
87	int l1ss;
88	u32 lval;
89	struct rtsx_cr_option *option = &pcr->option;	86	struct rtsx_cr_option *option = &pcr->option;
90		87
91	l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
92	if (!l1ss)
93	return;
94
95	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
96
97	if (CHK_PCI_PID(pcr, 0x522A)) {	88	if (CHK_PCI_PID(pcr, 0x522A)) {
98	if (0 == (lval & 0x0F))	89	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN \| ASPM_L1_2_EN
99	rtsx_pci_enable_oobs_polling(pcr);	90	\| PM_L1_1_EN \| PM_L1_2_EN))
100	else
101	rtsx_pci_disable_oobs_polling(pcr);	91	rtsx_pci_disable_oobs_polling(pcr);
		92	else
		93	rtsx_pci_enable_oobs_polling(pcr);
102	}	94	}
103		95
104	if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
105	rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
106	else
107	rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN);
108
109	if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
110	rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
111	else
112	rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN);
113
114	if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
115	rtsx_set_dev_flag(pcr, PM_L1_1_EN);
116	else
117	rtsx_clear_dev_flag(pcr, PM_L1_1_EN);
118
119	if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
120	rtsx_set_dev_flag(pcr, PM_L1_2_EN);
121	else
122	rtsx_clear_dev_flag(pcr, PM_L1_2_EN);
123
124	if (option->ltr_en) {	96	if (option->ltr_en) {
125	u16 val;	97	if (option->ltr_enabled)
126
127	pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
128	if (val & PCI_EXP_DEVCTL2_LTR_EN) {
129	option->ltr_enabled = true;
130	option->ltr_active = true;
131	rtsx_set_ltr_latency(pcr, option->ltr_active_latency);	98	rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
132	} else {
133	option->ltr_enabled = false;
134	}
135	}	99	}
136
137	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN \| ASPM_L1_2_EN
138	\| PM_L1_1_EN \| PM_L1_2_EN))
139	option->force_clkreq_0 = false;
140	else
141	option->force_clkreq_0 = true;
142
143	}	100	}
144		101
145	static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)	102	static int rts5227_extra_init_hw(struct rtsx_pcr *pcr)
@@ -195,7 +152,7 @@ static int rts5227_extra_init_hw(struct rtsx_pcr *pcr) · 49 unmodified lines
195	}	152	}
196	}	153	}
197		154
198	if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)	155	if (option->force_clkreq_0)
199	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,	156	rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG,
200	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);	157	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
201	else	158	else

drivers/misc/cardreader/rts5228.c+17−40

 static void rts5228_init_from_cfg(struct rtsx_pcr *pcr)
 {
-	struct pci_dev *pdev = pcr->pci;
-	int l1ss;
-	u32 lval;
 	struct rtsx_cr_option *option = &pcr->option;
-	l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
+	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN
-	if (!l1ss)
+				| PM_L1_1_EN | PM_L1_2_EN))
-		return;
-	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
-	if (0 == (lval & 0x0F))
-		rtsx_pci_enable_oobs_polling(pcr);
-	else
 		rtsx_pci_disable_oobs_polling(pcr);
-	if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
-		rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
-	else
-		rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN);
-	if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
-		rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
-	else
-		rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN);
-	if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
-		rtsx_set_dev_flag(pcr, PM_L1_1_EN);
 	else
-		rtsx_clear_dev_flag(pcr, PM_L1_1_EN);
+		rtsx_pci_enable_oobs_polling(pcr);
-	if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
-		rtsx_set_dev_flag(pcr, PM_L1_2_EN);
-	else
-		rtsx_clear_dev_flag(pcr, PM_L1_2_EN);
 	rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0);
-	if (option->ltr_en) {
-		u16 val;
-		pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &val);
+	if (option->ltr_en) {
-		if (val & PCI_EXP_DEVCTL2_LTR_EN) {
+		if (option->ltr_enabled)
-			option->ltr_enabled = true;
-			option->ltr_active = true;
 			rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
-		} else {
-			option->ltr_enabled = false;
-		}
 	}
 }
 static int rts5228_extra_init_hw(struct rtsx_pcr *pcr)
 {
+	struct rtsx_cr_option *option = &pcr->option;
 	rtsx_pci_write_register(pcr, RTS5228_AUTOLOAD_CFG1,
 			CD_RESUME_EN_MASK, CD_RESUME_EN_MASK);
 	else
 		rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
+	/*
+	 * If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
+	 * to drive low, and we forcibly request clock.
+	 */
+	if (option->force_clkreq_0)
+		rtsx_pci_write_register(pcr, PETXCFG,
+				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
+	else
+		rtsx_pci_write_register(pcr, PETXCFG,
+				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
 	rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
 	if (pcr->rtd3_en) {

drivers/misc/cardreader/rts5249.c+7−49

@@ -86,64 +86,22 @@ static void rtsx_base_fetch_vendor_settings(struct rtsx_pcr *pcr) · 85 unmodified lines
86		86
87	static void rts5249_init_from_cfg(struct rtsx_pcr *pcr)	87	static void rts5249_init_from_cfg(struct rtsx_pcr *pcr)
88	{	88	{
89	struct pci_dev *pdev = pcr->pci;
90	int l1ss;
91	struct rtsx_cr_option *option = &(pcr->option);	89	struct rtsx_cr_option *option = &(pcr->option);
92	u32 lval;
93
94	l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
95	if (!l1ss)
96	return;
97
98	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
99		90
100	if (CHK_PCI_PID(pcr, PID_524A) \|\| CHK_PCI_PID(pcr, PID_525A)) {	91	if (CHK_PCI_PID(pcr, PID_524A) \|\| CHK_PCI_PID(pcr, PID_525A)) {
101	if (0 == (lval & 0x0F))	92	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN \| ASPM_L1_2_EN
102	rtsx_pci_enable_oobs_polling(pcr);	93	\| PM_L1_1_EN \| PM_L1_2_EN))
103	else
104	rtsx_pci_disable_oobs_polling(pcr);	94	rtsx_pci_disable_oobs_polling(pcr);
		95	else
		96	rtsx_pci_enable_oobs_polling(pcr);
105	}	97	}
106		98
107
108	if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
109	rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
110
111	if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
112	rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
113
114	if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
115	rtsx_set_dev_flag(pcr, PM_L1_1_EN);
116
117	if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
118	rtsx_set_dev_flag(pcr, PM_L1_2_EN);
119
120	if (option->ltr_en) {	99	if (option->ltr_en) {
121	u16 val;	100	if (option->ltr_enabled)
122
123	pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &val);
124	if (val & PCI_EXP_DEVCTL2_LTR_EN) {
125	option->ltr_enabled = true;
126	option->ltr_active = true;
127	rtsx_set_ltr_latency(pcr, option->ltr_active_latency);	101	rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
128	} else {
129	option->ltr_enabled = false;
130	}
131	}	102	}
132	}	103	}
133		104
134	static int rts5249_init_from_hw(struct rtsx_pcr *pcr)
135	{
136	struct rtsx_cr_option *option = &(pcr->option);
137
138	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN \| ASPM_L1_2_EN
139	\| PM_L1_1_EN \| PM_L1_2_EN))
140	option->force_clkreq_0 = false;
141	else
142	option->force_clkreq_0 = true;
143
144	return 0;
145	}
146
147	static void rts52xa_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime)	105	static void rts52xa_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime)
148	{	106	{
149	/* Set relink_time to 0 */	107	/* Set relink_time to 0 */
@@ -276,7 +234,6 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr) · 126 unmodified lines
276	struct rtsx_cr_option *option = &(pcr->option);	234	struct rtsx_cr_option *option = &(pcr->option);
277		235
278	rts5249_init_from_cfg(pcr);	236	rts5249_init_from_cfg(pcr);
279	rts5249_init_from_hw(pcr);
280		237
281	rtsx_pci_init_cmd(pcr);	238	rtsx_pci_init_cmd(pcr);
282		239
@@ -327,11 +284,12 @@ static int rts5249_extra_init_hw(struct rtsx_pcr *pcr) · 44 unmodified lines
327	}	284	}
328	}	285	}
329		286
		287
330	/*	288	/*
331	* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced	289	* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
332	* to drive low, and we forcibly request clock.	290	* to drive low, and we forcibly request clock.
333	*/	291	*/
334	if (option->force_clkreq_0 && pcr->aspm_mode == ASPM_MODE_CFG)	292	if (option->force_clkreq_0)
335	rtsx_pci_write_register(pcr, PETXCFG,	293	rtsx_pci_write_register(pcr, PETXCFG,
336	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);	294	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
337	else	295	else

drivers/misc/cardreader/rts5260.c+13−30

 static void rts5260_init_from_cfg(struct rtsx_pcr *pcr)
 {
-	struct pci_dev *pdev = pcr->pci;
-	int l1ss;
 	struct rtsx_cr_option *option = &pcr->option;
-	u32 lval;
-	l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
-	if (!l1ss)
-		return;
-	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
-	if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
-		rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
-	if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
-		rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
-	if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
-		rtsx_set_dev_flag(pcr, PM_L1_1_EN);
-	if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
-		rtsx_set_dev_flag(pcr, PM_L1_2_EN);
 	rts5260_pwr_saving_setting(pcr);
 	if (option->ltr_en) {
-		u16 val;
+		if (option->ltr_enabled)
-		pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &val);
-		if (val & PCI_EXP_DEVCTL2_LTR_EN) {
-			option->ltr_enabled = true;
-			option->ltr_active = true;
 			rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
-		} else {
-			option->ltr_enabled = false;
-		}
 	}
 }
 static int rts5260_extra_init_hw(struct rtsx_pcr *pcr)
 {
+	struct rtsx_cr_option *option = &pcr->option;
 	/* Set mcu_cnt to 7 to ensure data can be sampled properly */
 	rtsx_pci_write_register(pcr, 0xFC03, 0x7F, 0x07);
 	rts5260_init_hw(pcr);
+	/*
+	 * If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
+	 * to drive low, and we forcibly request clock.
+	 */
+	if (option->force_clkreq_0)
+		rtsx_pci_write_register(pcr, PETXCFG,
+				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
+	else
+		rtsx_pci_write_register(pcr, PETXCFG,
+				 FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
 	rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00);
 	return 0;

drivers/misc/cardreader/rts5261.c+13−39

@@ -454,54 +454,17 @@ static void rts5261_init_from_hw(struct rtsx_pcr *pcr) · 453 unmodified lines
454		454
455	static void rts5261_init_from_cfg(struct rtsx_pcr *pcr)	455	static void rts5261_init_from_cfg(struct rtsx_pcr *pcr)
456	{	456	{
457	struct pci_dev *pdev = pcr->pci;
458	int l1ss;
459	u32 lval;
460	struct rtsx_cr_option *option = &pcr->option;	457	struct rtsx_cr_option *option = &pcr->option;
461		458
462	l1ss = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_L1SS);
463	if (!l1ss)
464	return;
465
466	pci_read_config_dword(pdev, l1ss + PCI_L1SS_CTL1, &lval);
467
468	if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
469	rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
470	else
471	rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN);
472
473	if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
474	rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
475	else
476	rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN);
477
478	if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
479	rtsx_set_dev_flag(pcr, PM_L1_1_EN);
480	else
481	rtsx_clear_dev_flag(pcr, PM_L1_1_EN);
482
483	if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
484	rtsx_set_dev_flag(pcr, PM_L1_2_EN);
485	else
486	rtsx_clear_dev_flag(pcr, PM_L1_2_EN);
487
488	rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0);
489	if (option->ltr_en) {	459	if (option->ltr_en) {
490	u16 val;	460	if (option->ltr_enabled)
491
492	pcie_capability_read_word(pdev, PCI_EXP_DEVCTL2, &val);
493	if (val & PCI_EXP_DEVCTL2_LTR_EN) {
494	option->ltr_enabled = true;
495	option->ltr_active = true;
496	rtsx_set_ltr_latency(pcr, option->ltr_active_latency);	461	rtsx_set_ltr_latency(pcr, option->ltr_active_latency);
497	} else {
498	option->ltr_enabled = false;
499	}
500	}	462	}
501	}	463	}
502		464
503	static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)	465	static int rts5261_extra_init_hw(struct rtsx_pcr *pcr)
504	{	466	{
		467	struct rtsx_cr_option *option = &pcr->option;
505	u32 val;	468	u32 val;
506		469
507	rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1,	470	rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1,
@@ -547,6 +510,17 @@ static int rts5261_extra_init_hw(struct rtsx_pcr *pcr) · 39 unmodified lines
547	else	510	else
548	rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);	511	rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00);
549		512
		513	/*
		514	* If u_force_clkreq_0 is enabled, CLKREQ# PIN will be forced
		515	* to drive low, and we forcibly request clock.
		516	*/
		517	if (option->force_clkreq_0)
		518	rtsx_pci_write_register(pcr, PETXCFG,
		519	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_LOW);
		520	else
		521	rtsx_pci_write_register(pcr, PETXCFG,
		522	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
		523
550	rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);	524	rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB);
551		525
552	if (pcr->rtd3_en) {	526	if (pcr->rtd3_en) {

drivers/misc/cardreader/rtsx_pcr.c+46−5

@@ -1326,11 +1326,8 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) · 1325 unmodified lines
1326	return err;	1326	return err;
1327	}	1327	}
1328		1328
1329	if (pcr->aspm_mode == ASPM_MODE_REG) {	1329	if (pcr->aspm_mode == ASPM_MODE_REG)
1330	rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0x30, 0x30);	1330	rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0x30, 0x30);
1331	rtsx_pci_write_register(pcr, PETXCFG,
1332	FORCE_CLKREQ_DELINK_MASK, FORCE_CLKREQ_HIGH);
1333	}
1334		1331
1335	/* No CD interrupt if probing driver with card inserted.	1332	/* No CD interrupt if probing driver with card inserted.
1336	* So we need to initialize pcr->card_exist here.	1333	* So we need to initialize pcr->card_exist here.
@@ -1345,7 +1342,9 @@ static int rtsx_pci_init_hw(struct rtsx_pcr *pcr) · 8 unmodified lines
1345		1342
1346	static int rtsx_pci_init_chip(struct rtsx_pcr *pcr)	1343	static int rtsx_pci_init_chip(struct rtsx_pcr *pcr)
1347	{	1344	{
1348	int err;	1345	struct rtsx_cr_option *option = &(pcr->option);
		1346	int err, l1ss;
		1347	u32 lval;
1349	u16 cfg_val;	1348	u16 cfg_val;
1350	u8 val;	1349	u8 val;
1351		1350
@@ -1430,6 +1429,48 @@ static int rtsx_pci_init_chip(struct rtsx_pcr *pcr) · 78 unmodified lines
1430	pcr->aspm_enabled = true;	1429	pcr->aspm_enabled = true;
1431	}	1430	}
1432		1431
		1432	l1ss = pci_find_ext_capability(pcr->pci, PCI_EXT_CAP_ID_L1SS);
		1433	if (l1ss) {
		1434	pci_read_config_dword(pcr->pci, l1ss + PCI_L1SS_CTL1, &lval);
		1435
		1436	if (lval & PCI_L1SS_CTL1_ASPM_L1_1)
		1437	rtsx_set_dev_flag(pcr, ASPM_L1_1_EN);
		1438	else
		1439	rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN);
		1440
		1441	if (lval & PCI_L1SS_CTL1_ASPM_L1_2)
		1442	rtsx_set_dev_flag(pcr, ASPM_L1_2_EN);
		1443	else
		1444	rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN);
		1445
		1446	if (lval & PCI_L1SS_CTL1_PCIPM_L1_1)
		1447	rtsx_set_dev_flag(pcr, PM_L1_1_EN);
		1448	else
		1449	rtsx_clear_dev_flag(pcr, PM_L1_1_EN);
		1450
		1451	if (lval & PCI_L1SS_CTL1_PCIPM_L1_2)
		1452	rtsx_set_dev_flag(pcr, PM_L1_2_EN);
		1453	else
		1454	rtsx_clear_dev_flag(pcr, PM_L1_2_EN);
		1455
		1456	pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cfg_val);
		1457	if (cfg_val & PCI_EXP_DEVCTL2_LTR_EN) {
		1458	option->ltr_enabled = true;
		1459	option->ltr_active = true;
		1460	} else {
		1461	option->ltr_enabled = false;
		1462	}
		1463
		1464	if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN \| ASPM_L1_2_EN
		1465	\| PM_L1_1_EN \| PM_L1_2_EN))
		1466	option->force_clkreq_0 = false;
		1467	else
		1468	option->force_clkreq_0 = true;
		1469	} else {
		1470	option->ltr_enabled = false;
		1471	option->force_clkreq_0 = true;
		1472	}
		1473
1433	if (pcr->ops->fetch_vendor_settings)	1474	if (pcr->ops->fetch_vendor_settings)
1434	pcr->ops->fetch_vendor_settings(pcr);	1475	pcr->ops->fetch_vendor_settings(pcr);
1435		1476

drivers/net/dsa/sja1105/sja1105.h+2−0

 	 * the switch doesn't confuse them with one another.
 	 */
 	struct mutex mgmt_lock;
+	/* Serializes accesses to the FDB */
+	struct mutex fdb_lock;
 	/* PTP two-step TX timestamp ID, and its serialization lock */
 	spinlock_t ts_id_lock;
 	u8 ts_id;

drivers/net/dsa/sja1105/sja1105_dynamic_config.c+44−49

 static int
 sja1105_dynamic_config_poll_valid(struct sja1105_private *priv,
-				  struct sja1105_dyn_cmd *cmd,
+				  const struct sja1105_dynamic_table_ops *ops,
-				  const struct sja1105_dynamic_table_ops *ops)
+				  void *entry, bool check_valident,
+				  bool check_errors)
 {
 	u8 packed_buf[SJA1105_MAX_DYN_CMD_SIZE] = {};
+	struct sja1105_dyn_cmd cmd = {};
 	int rc;
-	/* We don't _need_ to read the full entry, just the command area which
+	/* Read back the whole entry + command structure. */
-	 * is a fixed SJA1105_SIZE_DYN_CMD. But our cmd_packing() API expects a
-	 * buffer that contains the full entry too. Additionally, our API
-	 * doesn't really know how many bytes into the buffer does the command
-	 * area really begin. So just read back the whole entry.
-	 */
 	rc = sja1105_xfer_buf(priv, SPI_READ, ops->addr, packed_buf,
 			      ops->packed_size);
 	if (rc)
 	/* Unpack the command structure, and return it to the caller in case it
 	 * needs to perform further checks on it (VALIDENT).
 	 */
-	memset(cmd, 0, sizeof(*cmd));
+	ops->cmd_packing(packed_buf, &cmd, UNPACK);
-	ops->cmd_packing(packed_buf, cmd, UNPACK);
 	/* Hardware hasn't cleared VALID => still working on it */
-	return cmd->valid ? -EAGAIN : 0;
+	if (cmd.valid)
+		return -EAGAIN;
+	if (check_valident && !cmd.valident && !(ops->access & OP_VALID_ANYWAY))
+		return -ENOENT;
+	if (check_errors && cmd.errors)
+		return -EINVAL;
+	/* Don't dereference possibly NULL pointer - maybe caller
+	 * only wanted to see whether the entry existed or not.
+	 */
+	if (entry)
+		ops->entry_packing(packed_buf, entry, UNPACK);
+	return 0;
 }
 /* Poll the dynamic config entry's control area until the hardware has
  */
 static int
 sja1105_dynamic_config_wait_complete(struct sja1105_private *priv,
-				     struct sja1105_dyn_cmd *cmd,
+				     const struct sja1105_dynamic_table_ops *ops,
-				     const struct sja1105_dynamic_table_ops *ops)
+				     void *entry, bool check_valident,
+				     bool check_errors)
 {
-	int rc;
+	int err, rc;
-	return read_poll_timeout(sja1105_dynamic_config_poll_valid,
+	err = read_poll_timeout(sja1105_dynamic_config_poll_valid,
-				 rc, rc != -EAGAIN,
+				rc, rc != -EAGAIN,
-				 SJA1105_DYNAMIC_CONFIG_SLEEP_US,
+				SJA1105_DYNAMIC_CONFIG_SLEEP_US,
-				 SJA1105_DYNAMIC_CONFIG_TIMEOUT_US,
+				SJA1105_DYNAMIC_CONFIG_TIMEOUT_US,
-				 false, priv, cmd, ops);
+				false, priv, ops, entry, check_valident,
+				check_errors);
+	return err < 0 ? err : rc;
 }
 /* Provides read access to the settings through the dynamic interface
 	mutex_lock(&priv->dynamic_config_lock);
 	rc = sja1105_xfer_buf(priv, SPI_WRITE, ops->addr, packed_buf,
 			      ops->packed_size);
-	if (rc < 0) {
-		mutex_unlock(&priv->dynamic_config_lock);
-		return rc;
-	}
-	rc = sja1105_dynamic_config_wait_complete(priv, &cmd, ops);
-	mutex_unlock(&priv->dynamic_config_lock);
 	if (rc < 0)
-		return rc;
+		goto out;
-	if (!cmd.valident && !(ops->access & OP_VALID_ANYWAY))
+	rc = sja1105_dynamic_config_wait_complete(priv, ops, entry, true, false);
-		return -ENOENT;
+out:
+	mutex_unlock(&priv->dynamic_config_lock);
-	/* Don't dereference possibly NULL pointer - maybe caller
+	return rc;
-	 * only wanted to see whether the entry existed or not.
-	 */
-	if (entry)
-		ops->entry_packing(packed_buf, entry, UNPACK);
-	return 0;
 }
 int sja1105_dynamic_config_write(struct sja1105_private *priv,
 	mutex_lock(&priv->dynamic_config_lock);
 	rc = sja1105_xfer_buf(priv, SPI_WRITE, ops->addr, packed_buf,
 			      ops->packed_size);
-	if (rc < 0) {
-		mutex_unlock(&priv->dynamic_config_lock);
-		return rc;
-	}
-	rc = sja1105_dynamic_config_wait_complete(priv, &cmd, ops);
-	mutex_unlock(&priv->dynamic_config_lock);
 	if (rc < 0)
-		return rc;
+		goto out;
-	cmd = (struct sja1105_dyn_cmd) {0};
+	rc = sja1105_dynamic_config_wait_complete(priv, ops, NULL, false, true);
-	ops->cmd_packing(packed_buf, &cmd, UNPACK);
+out:
-	if (cmd.errors)
+	mutex_unlock(&priv->dynamic_config_lock);
-		return -EINVAL;
-	return 0;
+	return rc;
 }
 static u8 sja1105_crc8_add(u8 crc, u8 byte, u8 poly)

drivers/net/dsa/sja1105/sja1105_main.c+51−18

 			   struct dsa_db db)
 {
 	struct sja1105_private *priv = ds->priv;
+	int rc;
 	if (!vid) {
 		switch (db.type) {
 		}
 	}
-	return priv->info->fdb_add_cmd(ds, port, addr, vid);
+	mutex_lock(&priv->fdb_lock);
+	rc = priv->info->fdb_add_cmd(ds, port, addr, vid);
+	mutex_unlock(&priv->fdb_lock);
+	return rc;
 }
-static int sja1105_fdb_del(struct dsa_switch *ds, int port,
+static int __sja1105_fdb_del(struct dsa_switch *ds, int port,
-			   const unsigned char *addr, u16 vid,
+			     const unsigned char *addr, u16 vid,
-			   struct dsa_db db)
+			     struct dsa_db db)
 {
 	struct sja1105_private *priv = ds->priv;
 	return priv->info->fdb_del_cmd(ds, port, addr, vid);
 }
+static int sja1105_fdb_del(struct dsa_switch *ds, int port,
+			   const unsigned char *addr, u16 vid,
+			   struct dsa_db db)
+{
+	struct sja1105_private *priv = ds->priv;
+	int rc;
+	mutex_lock(&priv->fdb_lock);
+	rc = __sja1105_fdb_del(ds, port, addr, vid, db);
+	mutex_unlock(&priv->fdb_lock);
+	return rc;
+}
 static int sja1105_fdb_dump(struct dsa_switch *ds, int port,
 			    dsa_fdb_dump_cb_t *cb, void *data)
 {
 		if (!(l2_lookup.destports & BIT(port)))
 			continue;
-		/* We need to hide the FDB entry for unknown multicast */
-		if (l2_lookup.macaddr == SJA1105_UNKNOWN_MULTICAST &&
-		    l2_lookup.mask_macaddr == SJA1105_UNKNOWN_MULTICAST)
-			continue;
 		u64_to_ether_addr(l2_lookup.macaddr, macaddr);
+		/* Hardware FDB is shared for fdb and mdb, "bridge fdb show"
+		 * only wants to see unicast
+		 */
+		if (is_multicast_ether_addr(macaddr))
+			continue;
 		/* We need to hide the dsa_8021q VLANs from the user. */
 		if (vid_is_dsa_8021q(l2_lookup.vlanid))
 			l2_lookup.vlanid = 0;
 	};
 	int i;
+	mutex_lock(&priv->fdb_lock);
 	for (i = 0; i < SJA1105_MAX_L2_LOOKUP_COUNT; i++) {
 		struct sja1105_l2_lookup_entry l2_lookup = {0};
 		u8 macaddr[ETH_ALEN];
 		if (rc) {
 			dev_err(ds->dev, "Failed to read FDB: %pe\n",
 				ERR_PTR(rc));
-			return;
+			break;
 		}
 		if (!(l2_lookup.destports & BIT(port)))
 		u64_to_ether_addr(l2_lookup.macaddr, macaddr);
-		rc = sja1105_fdb_del(ds, port, macaddr, l2_lookup.vlanid, db);
+		rc = __sja1105_fdb_del(ds, port, macaddr, l2_lookup.vlanid, db);
 		if (rc) {
 			dev_err(ds->dev,
 				"Failed to delete FDB entry %pM vid %lld: %pe\n",
 				macaddr, l2_lookup.vlanid, ERR_PTR(rc));
-			return;
+			break;
 		}
 	}
+	mutex_unlock(&priv->fdb_lock);
 }
 static int sja1105_mdb_add(struct dsa_switch *ds, int port,
 	int rc, i;
 	s64 now;
+	mutex_lock(&priv->fdb_lock);
 	mutex_lock(&priv->mgmt_lock);
 	mac = priv->static_config.tables[BLK_IDX_MAC_CONFIG].entries;
 		goto out;
 out:
 	mutex_unlock(&priv->mgmt_lock);
+	mutex_unlock(&priv->fdb_lock);
 	return rc;
 }
 {
 	struct sja1105_l2_lookup_entry *l2_lookup;
 	struct sja1105_table *table;
-	int match;
+	int match, rc;
+	mutex_lock(&priv->fdb_lock);
 	table = &priv->static_config.tables[BLK_IDX_L2_LOOKUP];
 	l2_lookup = table->entries;
 	if (match == table->entry_count) {
 		NL_SET_ERR_MSG_MOD(extack,
 				   "Could not find FDB entry for unknown multicast");
-		return -ENOSPC;
+		rc = -ENOSPC;
+		goto out;
 	}
 	if (flags.val & BR_MCAST_FLOOD)
 	else
 		l2_lookup[match].destports &= ~BIT(to);
-	return sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
+	rc = sja1105_dynamic_config_write(priv, BLK_IDX_L2_LOOKUP,
-					    l2_lookup[match].index,
+					  l2_lookup[match].index,
-					    &l2_lookup[match],
+					  &l2_lookup[match], true);
-					    true);
+out:
+	mutex_unlock(&priv->fdb_lock);
+	return rc;
 }
 static int sja1105_port_pre_bridge_flags(struct dsa_switch *ds, int port,
 	mutex_init(&priv->ptp_data.lock);
 	mutex_init(&priv->dynamic_config_lock);
 	mutex_init(&priv->mgmt_lock);
+	mutex_init(&priv->fdb_lock);
 	spin_lock_init(&priv->ts_id_lock);
 	rc = sja1105_parse_dt(priv);

drivers/net/ethernet/adi/adin1110.c+1−1

@@ -1385,7 +1385,7 @@ static int adin1110_fdb_add(struct adin1110_port_priv *port_priv, · 1384 unmodified lines
1385	return -ENOMEM;	1385	return -ENOMEM;
1386		1386
1387	other_port = priv->ports[!port_priv->nr];	1387	other_port = priv->ports[!port_priv->nr];
1388	port_rules = adin1110_port_rules(port_priv, false, true);	1388	port_rules = adin1110_port_rules(other_port, false, true);
1389	eth_broadcast_addr(mask);	1389	eth_broadcast_addr(mask);
1390		1390
1391	return adin1110_write_mac_address(other_port, mac_nr, (u8 *)fdb->addr,	1391	return adin1110_write_mac_address(other_port, mac_nr, (u8 *)fdb->addr,

drivers/net/ethernet/amazon/ena/ena_netdev.c+3−0

@@ -1833,6 +1833,9 @@ static int ena_clean_rx_irq(struct ena_ring rx_ring, struct napi_struct napi, · 1832 unmodified lines
1833	return work_done;	1833	return work_done;
1834		1834
1835	error:	1835	error:
		1836	if (xdp_flags & ENA_XDP_REDIRECT)
		1837	xdp_do_flush();
		1838
1836	adapter = netdev_priv(rx_ring->netdev);	1839	adapter = netdev_priv(rx_ring->netdev);
1837		1840
1838	if (rc == -ENOSPC) {	1841	if (rc == -ENOSPC) {

drivers/net/ethernet/broadcom/asp2/bcmasp.c+8−2

 				  ASP_RX_FILTER_BLK_CTRL);
 }
-void bcmasp_netfilt_get_all_active(struct bcmasp_intf *intf, u32 *rule_locs,
+int bcmasp_netfilt_get_all_active(struct bcmasp_intf *intf, u32 *rule_locs,
-				   u32 *rule_cnt)
+				  u32 *rule_cnt)
 {
 	struct bcmasp_priv *priv = intf->parent;
 	int j = 0, i;
 	for (i = 0; i < NUM_NET_FILTERS; i++) {
+		if (j == *rule_cnt)
+			return -EMSGSIZE;
 		if (!priv->net_filters[i].claimed ||
 		    priv->net_filters[i].port != intf->port)
 			continue;
 	}
 	*rule_cnt = j;
+	return 0;
 }
 int bcmasp_netfilt_get_active(struct bcmasp_intf *intf)
 		if (!intf) {
 			dev_err(dev, "Cannot create eth interface %d\n", i);
 			bcmasp_remove_intfs(priv);
+			of_node_put(intf_node);
 			goto of_put_exit;
 		}
 		list_add_tail(&intf->list, &priv->intfs);

drivers/net/ethernet/broadcom/asp2/bcmasp.h+2−2

@@ -577,8 +577,8 @@ void bcmasp_netfilt_release(struct bcmasp_intf *intf, · 576 unmodified lines
577		577
578	int bcmasp_netfilt_get_active(struct bcmasp_intf *intf);	578	int bcmasp_netfilt_get_active(struct bcmasp_intf *intf);
579		579
580	void bcmasp_netfilt_get_all_active(struct bcmasp_intf intf, u32 rule_locs,	580	int bcmasp_netfilt_get_all_active(struct bcmasp_intf intf, u32 rule_locs,
581	u32 *rule_cnt);	581	u32 *rule_cnt);
582		582
583	void bcmasp_netfilt_suspend(struct bcmasp_intf *intf);	583	void bcmasp_netfilt_suspend(struct bcmasp_intf *intf);
584		584

drivers/net/ethernet/broadcom/asp2/bcmasp_ethtool.c+1−1

@@ -335,7 +335,7 @@ static int bcmasp_get_rxnfc(struct net_device dev, struct ethtool_rxnfc cmd, · 334 unmodified lines
335	err = bcmasp_flow_get(intf, cmd);	335	err = bcmasp_flow_get(intf, cmd);
336	break;	336	break;
337	case ETHTOOL_GRXCLSRLALL:	337	case ETHTOOL_GRXCLSRLALL:
338	bcmasp_netfilt_get_all_active(intf, rule_locs, &cmd->rule_cnt);	338	err = bcmasp_netfilt_get_all_active(intf, rule_locs, &cmd->rule_cnt);
339	cmd->data = NUM_NET_FILTERS;	339	cmd->data = NUM_NET_FILTERS;
340	break;	340	break;
341	default:	341	default:

drivers/net/ethernet/broadcom/bnxt/bnxt.c+5−0

 	struct rx_cmp_ext *rxcmp1;
 	u32 cp_cons, tmp_raw_cons;
 	u32 raw_cons = cpr->cp_raw_cons;
+	bool flush_xdp = false;
 	u32 rx_pkts = 0;
 	u8 event = 0;
 				rx_pkts++;
 			else if (rc == -EBUSY)	/* partial completion */
 				break;
+			if (event & BNXT_REDIRECT_EVENT)
+				flush_xdp = true;
 		} else if (unlikely(TX_CMP_TYPE(txcmp) ==
 				    CMPL_BASE_TYPE_HWRM_DONE)) {
 			bnxt_hwrm_handler(bp, txcmp);
 	if (event & BNXT_AGG_EVENT)
 		bnxt_db_write(bp, &rxr->rx_agg_db, rxr->rx_agg_prod);
+	if (flush_xdp)
+		xdp_do_flush();
 	if (!bnxt_has_work(bp, cpr) && rx_pkts < budget) {
 		napi_complete_done(napi, rx_pkts);

drivers/net/ethernet/cadence/macb_main.c+3−2

 		if (rx_pause)
 			ctrl |= MACB_BIT(PAE);
-		macb_set_tx_clk(bp, speed);
 		/* Initialize rings & buffers as clearing MACB_BIT(TE) in link down
 		 * cleared the pipeline and control registers.
 		 */
 	spin_unlock_irqrestore(&bp->lock, flags);
+	if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC))
+		macb_set_tx_clk(bp, speed);
 	/* Enable Rx and Tx; Enable PTP unicast */
 	ctrl = macb_readl(bp, NCR);
 	if (gem_has_ptp(bp))

drivers/net/ethernet/engleder/tsnep_ethtool.c+2−4

 {
 	struct tsnep_adapter *adapter = netdev_priv(netdev);
-	ch->max_rx = adapter->num_rx_queues;
+	ch->max_combined = adapter->num_queues;
-	ch->max_tx = adapter->num_tx_queues;
+	ch->combined_count = adapter->num_queues;
-	ch->rx_count = adapter->num_rx_queues;
-	ch->tx_count = adapter->num_tx_queues;
 }
 static int tsnep_ethtool_get_ts_info(struct net_device *netdev,

drivers/net/ethernet/engleder/tsnep_main.c+14−4

 	/* handle TX/RX queue 0 interrupt */
 	if ((active & adapter->queue[0].irq_mask) != 0) {
-		tsnep_disable_irq(adapter, adapter->queue[0].irq_mask);
+		if (napi_schedule_prep(&adapter->queue[0].napi)) {
-		napi_schedule(&adapter->queue[0].napi);
+			tsnep_disable_irq(adapter, adapter->queue[0].irq_mask);
+			/* schedule after masking to avoid races */
+			__napi_schedule(&adapter->queue[0].napi);
+		}
 	}
 	return IRQ_HANDLED;
 	struct tsnep_queue *queue = arg;
 	/* handle TX/RX queue interrupt */
-	tsnep_disable_irq(queue->adapter, queue->irq_mask);
+	if (napi_schedule_prep(&queue->napi)) {
-	napi_schedule(&queue->napi);
+		tsnep_disable_irq(queue->adapter, queue->irq_mask);
+		/* schedule after masking to avoid races */
+		__napi_schedule(&queue->napi);
+	}
 	return IRQ_HANDLED;
 }
 	if (queue->tx)
 		complete = tsnep_tx_poll(queue->tx, budget);
+	/* handle case where we are called by netpoll with a budget of 0 */
+	if (unlikely(budget <= 0))
+		return budget;
 	if (queue->rx) {
 		done = queue->rx->xsk_pool ?
 		       tsnep_rx_poll_zc(queue->rx, napi, budget) :

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c+9−0

@@ -3353,6 +3353,15 @@ static void hns3_set_default_feature(struct net_device *netdev) · 3352 unmodified lines
3353	NETIF_F_HW_TC);	3353	NETIF_F_HW_TC);
3354		3354
3355	netdev->hw_enc_features \|= netdev->vlan_features \| NETIF_F_TSO_MANGLEID;	3355	netdev->hw_enc_features \|= netdev->vlan_features \| NETIF_F_TSO_MANGLEID;
		3356
		3357	/* The device_version V3 hardware can't offload the checksum for IP in
		3358	* GRE packets, but can do it for NvGRE. So default to disable the
		3359	* checksum and GSO offload for GRE.
		3360	*/
		3361	if (ae_dev->dev_version > HNAE3_DEVICE_VERSION_V2) {
		3362	netdev->features &= ~NETIF_F_GSO_GRE;
		3363	netdev->features &= ~NETIF_F_GSO_GRE_CSUM;
		3364	}
3356	}	3365	}
3357		3366
3358	static int hns3_alloc_buffer(struct hns3_enet_ring *ring,	3367	static int hns3_alloc_buffer(struct hns3_enet_ring *ring,

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+12−1

 static void hclge_clear_event_cause(struct hclge_dev *hdev, u32 event_type,
 				    u32 regclr)
 {
+#define HCLGE_IMP_RESET_DELAY		5
 	switch (event_type) {
 	case HCLGE_VECTOR0_EVENT_PTP:
 	case HCLGE_VECTOR0_EVENT_RST:
+		if (regclr == BIT(HCLGE_VECTOR0_IMPRESET_INT_B))
+			mdelay(HCLGE_IMP_RESET_DELAY);
 		hclge_write_dev(&hdev->hw, HCLGE_MISC_RESET_STS_REG, regclr);
 		break;
 	case HCLGE_VECTOR0_EVENT_MBX:
 	ret = hclge_fd_tcam_config(hdev, HCLGE_FD_STAGE_1, true, rule->location,
 				   NULL, false);
 	if (ret) {
+		/* if tcam config fail, set rule state to TO_DEL,
+		 * so the rule will be deleted when periodic
+		 * task being scheduled.
+		 */
+		hclge_update_fd_list(hdev, HCLGE_FD_TO_DEL, rule->location, NULL);
+		set_bit(HCLGE_STATE_FD_TBL_CHANGED, &hdev->state);
 		spin_unlock_bh(&hdev->fd_rule_lock);
 		return ret;
 	}
 	if (mac_type == HCLGE_MAC_ADDR_UC) {
 		if (is_all_added)
 			vport->overflow_promisc_flags &= ~HNAE3_OVERFLOW_UPE;
-		else
+		else if (hclge_is_umv_space_full(vport, true))
 			vport->overflow_promisc_flags |= HNAE3_OVERFLOW_UPE;
 	} else {
 		if (is_all_added)

drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c+2−1

@@ -1855,7 +1855,8 @@ static void hclgevf_periodic_service_task(struct hclgevf_dev *hdev) · 1854 unmodified lines
1855	unsigned long delta = round_jiffies_relative(HZ);	1855	unsigned long delta = round_jiffies_relative(HZ);
1856	struct hnae3_handle *handle = &hdev->nic;	1856	struct hnae3_handle *handle = &hdev->nic;
1857		1857
1858	if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state))	1858	if (test_bit(HCLGEVF_STATE_RST_FAIL, &hdev->state) \|\|
		1859	test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state))
1859	return;	1860	return;
1860		1861
1861	if (time_is_after_jiffies(hdev->last_serv_processed + HZ)) {	1862	if (time_is_after_jiffies(hdev->last_serv_processed + HZ)) {

drivers/net/ethernet/huawei/hinic/hinic_port.c+0−3

@@ -456,9 +456,6 @@ int hinic_set_vlan_fliter(struct hinic_dev *nic_dev, u32 en) · 455 unmodified lines
456	u16 out_size = sizeof(vlan_filter);	456	u16 out_size = sizeof(vlan_filter);
457	int err;	457	int err;
458		458
459	if (!hwdev)
460	return -EINVAL;
461
462	vlan_filter.func_idx = HINIC_HWIF_FUNC_IDX(hwif);	459	vlan_filter.func_idx = HINIC_HWIF_FUNC_IDX(hwif);
463	vlan_filter.enable = en;	460	vlan_filter.enable = en;
464		461

drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c+5−3

@@ -4475,9 +4475,7 @@ int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id, · 4474 unmodified lines
4475	goto error_pvid;	4475	goto error_pvid;
4476		4476
4477	i40e_vlan_stripping_enable(vsi);	4477	i40e_vlan_stripping_enable(vsi);
4478	i40e_vc_reset_vf(vf, true);	4478
4479	/* During reset the VF got a new VSI, so refresh a pointer. */
4480	vsi = pf->vsi[vf->lan_vsi_idx];
4481	/* Locked once because multiple functions below iterate list */	4479	/* Locked once because multiple functions below iterate list */
4482	spin_lock_bh(&vsi->mac_filter_hash_lock);	4480	spin_lock_bh(&vsi->mac_filter_hash_lock);
4483		4481
@@ -4563,6 +4561,10 @@ int i40e_ndo_set_vf_port_vlan(struct net_device *netdev, int vf_id, · 79 unmodified lines
4563	*/	4561	*/
4564	vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);	4562	vf->port_vlan_id = le16_to_cpu(vsi->info.pvid);
4565		4563
		4564	i40e_vc_reset_vf(vf, true);
		4565	/* During reset the VF got a new VSI, so refresh a pointer. */
		4566	vsi = pf->vsi[vf->lan_vsi_idx];
		4567
4566	ret = i40e_config_vf_promiscuous_mode(vf, vsi->id, allmulti, alluni);	4568	ret = i40e_config_vf_promiscuous_mode(vf, vsi->id, allmulti, alluni);
4567	if (ret) {	4569	if (ret) {
4568	dev_err(&pf->pdev->dev, "Unable to config vf promiscuous mode\n");	4570	dev_err(&pf->pdev->dev, "Unable to config vf promiscuous mode\n");

drivers/net/ethernet/intel/iavf/iavf.h+1−1

@@ -521,7 +521,7 @@ void iavf_down(struct iavf_adapter *adapter); · 520 unmodified lines
521	int iavf_process_config(struct iavf_adapter *adapter);	521	int iavf_process_config(struct iavf_adapter *adapter);
522	int iavf_parse_vf_resource_msg(struct iavf_adapter *adapter);	522	int iavf_parse_vf_resource_msg(struct iavf_adapter *adapter);
523	void iavf_schedule_reset(struct iavf_adapter *adapter, u64 flags);	523	void iavf_schedule_reset(struct iavf_adapter *adapter, u64 flags);
524	void iavf_schedule_request_stats(struct iavf_adapter *adapter);	524	void iavf_schedule_aq_request(struct iavf_adapter *adapter, u64 flags);
525	void iavf_schedule_finish_config(struct iavf_adapter *adapter);	525	void iavf_schedule_finish_config(struct iavf_adapter *adapter);
526	void iavf_reset(struct iavf_adapter *adapter);	526	void iavf_reset(struct iavf_adapter *adapter);
527	void iavf_set_ethtool_ops(struct net_device *netdev);	527	void iavf_set_ethtool_ops(struct net_device *netdev);

drivers/net/ethernet/intel/iavf/iavf_ethtool.c+1−1

@@ -362,7 +362,7 @@ static void iavf_get_ethtool_stats(struct net_device *netdev, · 361 unmodified lines
362	unsigned int i;	362	unsigned int i;
363		363
364	/* Explicitly request stats refresh */	364	/* Explicitly request stats refresh */
365	iavf_schedule_request_stats(adapter);	365	iavf_schedule_aq_request(adapter, IAVF_FLAG_AQ_REQUEST_STATS);
366		366
367	iavf_add_ethtool_stats(&data, adapter, iavf_gstrings_stats);	367	iavf_add_ethtool_stats(&data, adapter, iavf_gstrings_stats);
368		368

drivers/net/ethernet/intel/iavf/iavf_main.c+8−9

 }
 /**
- * iavf_schedule_request_stats - Set the flags and schedule statistics request
+ * iavf_schedule_aq_request - Set the flags and schedule aq request
  * @adapter: board private structure
- *
+ * @flags: requested aq flags
- * Sets IAVF_FLAG_AQ_REQUEST_STATS flag so iavf_watchdog_task() will explicitly
- * request and refresh ethtool stats
  **/
-void iavf_schedule_request_stats(struct iavf_adapter *adapter)
+void iavf_schedule_aq_request(struct iavf_adapter *adapter, u64 flags)
 {
-	adapter->aq_required |= IAVF_FLAG_AQ_REQUEST_STATS;
+	adapter->aq_required |= flags;
 	mod_delayed_work(adapter->wq, &adapter->watchdog_task, 0);
 }
 		list_add_tail(&f->list, &adapter->vlan_filter_list);
 		f->state = IAVF_VLAN_ADD;
 		adapter->num_vlan_filters++;
-		adapter->aq_required |= IAVF_FLAG_AQ_ADD_VLAN_FILTER;
+		iavf_schedule_aq_request(adapter, IAVF_FLAG_AQ_ADD_VLAN_FILTER);
 	}
 clearout:
 	f = iavf_find_vlan(adapter, vlan);
 	if (f) {
 		f->state = IAVF_VLAN_REMOVE;
-		adapter->aq_required |= IAVF_FLAG_AQ_DEL_VLAN_FILTER;
+		iavf_schedule_aq_request(adapter, IAVF_FLAG_AQ_DEL_VLAN_FILTER);
 	}
 	spin_unlock_bh(&adapter->mac_vlan_list_lock);
 	iavf_clear_fdir_filters(adapter);
 	iavf_clear_adv_rss_conf(adapter);
-	if (!(adapter->flags & IAVF_FLAG_PF_COMMS_FAILED)) {
+	if (!(adapter->flags & IAVF_FLAG_PF_COMMS_FAILED) &&
+	    !(test_bit(__IAVF_IN_REMOVE_TASK, &adapter->crit_section))) {
 		/* cancel any current operation */
 		adapter->current_op = VIRTCHNL_OP_UNKNOWN;
 		/* Schedule operations to close down the HW. Don't wait

drivers/net/ethernet/intel/igb/igb_main.c+4−1

 	}
 	/* only call pci_enable_sriov() if no VFs are allocated already */
-	if (!old_vfs)
+	if (!old_vfs) {
 		err = pci_enable_sriov(pdev, adapter->vfs_allocated_count);
+		if (err)
+			goto err_out;
+	}
 	goto out;

drivers/net/ethernet/intel/igc/igc_ethtool.c+19−12

 	spin_unlock(&adapter->stats64_lock);
 }
+static int igc_ethtool_get_previous_rx_coalesce(struct igc_adapter *adapter)
+{
+	return (adapter->rx_itr_setting <= 3) ?
+		adapter->rx_itr_setting : adapter->rx_itr_setting >> 2;
+}
+static int igc_ethtool_get_previous_tx_coalesce(struct igc_adapter *adapter)
+{
+	return (adapter->tx_itr_setting <= 3) ?
+		adapter->tx_itr_setting : adapter->tx_itr_setting >> 2;
+}
 static int igc_ethtool_get_coalesce(struct net_device *netdev,
 				    struct ethtool_coalesce *ec,
 				    struct kernel_ethtool_coalesce *kernel_coal,
 {
 	struct igc_adapter *adapter = netdev_priv(netdev);
-	if (adapter->rx_itr_setting <= 3)
+	ec->rx_coalesce_usecs = igc_ethtool_get_previous_rx_coalesce(adapter);
-		ec->rx_coalesce_usecs = adapter->rx_itr_setting;
+	ec->tx_coalesce_usecs = igc_ethtool_get_previous_tx_coalesce(adapter);
-	else
-		ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
-	if (!(adapter->flags & IGC_FLAG_QUEUE_PAIRS)) {
-		if (adapter->tx_itr_setting <= 3)
-			ec->tx_coalesce_usecs = adapter->tx_itr_setting;
-		else
-			ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
-	}
 	return 0;
 }
 	    ec->tx_coalesce_usecs == 2)
 		return -EINVAL;
-	if ((adapter->flags & IGC_FLAG_QUEUE_PAIRS) && ec->tx_coalesce_usecs)
+	if ((adapter->flags & IGC_FLAG_QUEUE_PAIRS) &&
+	    ec->tx_coalesce_usecs != igc_ethtool_get_previous_tx_coalesce(adapter)) {
+		NL_SET_ERR_MSG_MOD(extack,
+				   "Queue Pair mode enabled, both Rx and Tx coalescing controlled by rx-usecs");
 		return -EINVAL;
+	}
 	/* If ITR is disabled, disable DMAC */
 	if (ec->rx_coalesce_usecs == 0) {

drivers/net/ethernet/intel/igc/igc_main.c+1−1

@@ -6491,7 +6491,7 @@ static int igc_xdp_xmit(struct net_device *dev, int num_frames, · 6490 unmodified lines
6491	struct igc_ring *ring;	6491	struct igc_ring *ring;
6492	int i, drops;	6492	int i, drops;
6493		6493
6494	if (unlikely(test_bit(__IGC_DOWN, &adapter->state)))	6494	if (unlikely(!netif_carrier_ok(dev)))
6495	return -ENETDOWN;	6495	return -ENETDOWN;
6496		6496
6497	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))	6497	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))

drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c+15−13

 	u32 tsync_tx_ctl = IXGBE_TSYNCTXCTL_ENABLED;
 	u32 tsync_rx_ctl = IXGBE_TSYNCRXCTL_ENABLED;
 	u32 tsync_rx_mtrl = PTP_EV_PORT << 16;
+	u32 aflags = adapter->flags;
 	bool is_l2 = false;
 	u32 regval;
 	case HWTSTAMP_FILTER_NONE:
 		tsync_rx_ctl = 0;
 		tsync_rx_mtrl = 0;
-		adapter->flags &= ~(IXGBE_FLAG_RX_HWTSTAMP_ENABLED |
+		aflags &= ~(IXGBE_FLAG_RX_HWTSTAMP_ENABLED |
-				    IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER);
+			    IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER);
 		break;
 	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
 		tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1;
 		tsync_rx_mtrl |= IXGBE_RXMTRL_V1_SYNC_MSG;
-		adapter->flags |= (IXGBE_FLAG_RX_HWTSTAMP_ENABLED |
+		aflags |= (IXGBE_FLAG_RX_HWTSTAMP_ENABLED |
-				   IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER);
+			   IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER);
 		break;
 	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
 		tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_L4_V1;
 		tsync_rx_mtrl |= IXGBE_RXMTRL_V1_DELAY_REQ_MSG;
-		adapter->flags |= (IXGBE_FLAG_RX_HWTSTAMP_ENABLED |
+		aflags |= (IXGBE_FLAG_RX_HWTSTAMP_ENABLED |
-				   IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER);
+			   IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER);
 		break;
 	case HWTSTAMP_FILTER_PTP_V2_EVENT:
 	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 		tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_EVENT_V2;
 		is_l2 = true;
 		config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
-		adapter->flags |= (IXGBE_FLAG_RX_HWTSTAMP_ENABLED |
+		aflags |= (IXGBE_FLAG_RX_HWTSTAMP_ENABLED |
-				   IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER);
+			   IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER);
 		break;
 	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
 	case HWTSTAMP_FILTER_NTP_ALL:
 		if (hw->mac.type >= ixgbe_mac_X550) {
 			tsync_rx_ctl |= IXGBE_TSYNCRXCTL_TYPE_ALL;
 			config->rx_filter = HWTSTAMP_FILTER_ALL;
-			adapter->flags |= IXGBE_FLAG_RX_HWTSTAMP_ENABLED;
+			aflags |= IXGBE_FLAG_RX_HWTSTAMP_ENABLED;
 			break;
 		}
 		fallthrough;
 		 * Delay_Req messages and hardware does not support
 		 * timestamping all packets => return error
 		 */
-		adapter->flags &= ~(IXGBE_FLAG_RX_HWTSTAMP_ENABLED |
-				    IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER);
 		config->rx_filter = HWTSTAMP_FILTER_NONE;
 		return -ERANGE;
 	}
 			       IXGBE_TSYNCRXCTL_TYPE_ALL |
 			       IXGBE_TSYNCRXCTL_TSIP_UT_EN;
 		config->rx_filter = HWTSTAMP_FILTER_ALL;
-		adapter->flags |= IXGBE_FLAG_RX_HWTSTAMP_ENABLED;
+		aflags |= IXGBE_FLAG_RX_HWTSTAMP_ENABLED;
-		adapter->flags &= ~IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER;
+		aflags &= ~IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER;
 		is_l2 = true;
 		break;
 	default:
 	IXGBE_WRITE_FLUSH(hw);
+	/* configure adapter flags only when HW is actually configured */
+	adapter->flags = aflags;
 	/* clear TX/RX time stamp registers, just to be sure */
 	ixgbe_ptp_clear_tx_timestamp(adapter);
 	IXGBE_READ_REG(hw, IXGBE_RXSTMPH);

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c+5−0

 		break;
 	case ETHTOOL_GRXCLSRLALL:
 		for (i = 0; i < MVPP2_N_RFS_ENTRIES_PER_FLOW; i++) {
+			if (loc == info->rule_cnt) {
+				ret = -EMSGSIZE;
+				break;
+			}
 			if (port->rfs_rules[i])
 				rules[loc++] = i;
 		}

drivers/net/ethernet/marvell/octeon_ep/octep_main.c+4−4

@@ -734,13 +734,13 @@ static netdev_tx_t octep_start_xmit(struct sk_buff *skb, · 733 unmodified lines
734	dma_map_sg_err:	734	dma_map_sg_err:
735	if (si > 0) {	735	if (si > 0) {
736	dma_unmap_single(iq->dev, sglist[0].dma_ptr[0],	736	dma_unmap_single(iq->dev, sglist[0].dma_ptr[0],
737	sglist[0].len[0], DMA_TO_DEVICE);	737	sglist[0].len[3], DMA_TO_DEVICE);
738	sglist[0].len[0] = 0;	738	sglist[0].len[3] = 0;
739	}	739	}
740	while (si > 1) {	740	while (si > 1) {
741	dma_unmap_page(iq->dev, sglist[si >> 2].dma_ptr[si & 3],	741	dma_unmap_page(iq->dev, sglist[si >> 2].dma_ptr[si & 3],
742	sglist[si >> 2].len[si & 3], DMA_TO_DEVICE);	742	sglist[si >> 2].len[3 - (si & 3)], DMA_TO_DEVICE);
743	sglist[si >> 2].len[si & 3] = 0;	743	sglist[si >> 2].len[3 - (si & 3)] = 0;
744	si--;	744	si--;
745	}	745	}
746	tx_buffer->gather = 0;	746	tx_buffer->gather = 0;

drivers/net/ethernet/marvell/octeon_ep/octep_tx.c+4−4

@@ -69,12 +69,12 @@ int octep_iq_process_completions(struct octep_iq *iq, u16 budget) · 68 unmodified lines
69	compl_sg++;	69	compl_sg++;
70		70
71	dma_unmap_single(iq->dev, tx_buffer->sglist[0].dma_ptr[0],	71	dma_unmap_single(iq->dev, tx_buffer->sglist[0].dma_ptr[0],
72	tx_buffer->sglist[0].len[0], DMA_TO_DEVICE);	72	tx_buffer->sglist[0].len[3], DMA_TO_DEVICE);
73		73
74	i = 1; /* entry 0 is main skb, unmapped above */	74	i = 1; /* entry 0 is main skb, unmapped above */
75	while (frags--) {	75	while (frags--) {
76	dma_unmap_page(iq->dev, tx_buffer->sglist[i >> 2].dma_ptr[i & 3],	76	dma_unmap_page(iq->dev, tx_buffer->sglist[i >> 2].dma_ptr[i & 3],
77	tx_buffer->sglist[i >> 2].len[i & 3], DMA_TO_DEVICE);	77	tx_buffer->sglist[i >> 2].len[3 - (i & 3)], DMA_TO_DEVICE);
78	i++;	78	i++;
79	}	79	}
80		80
@@ -131,13 +131,13 @@ static void octep_iq_free_pending(struct octep_iq *iq) · 50 unmodified lines
131		131
132	dma_unmap_single(iq->dev,	132	dma_unmap_single(iq->dev,
133	tx_buffer->sglist[0].dma_ptr[0],	133	tx_buffer->sglist[0].dma_ptr[0],
134	tx_buffer->sglist[0].len[0],	134	tx_buffer->sglist[0].len[3],
135	DMA_TO_DEVICE);	135	DMA_TO_DEVICE);
136		136
137	i = 1; /* entry 0 is main skb, unmapped above */	137	i = 1; /* entry 0 is main skb, unmapped above */
138	while (frags--) {	138	while (frags--) {
139	dma_unmap_page(iq->dev, tx_buffer->sglist[i >> 2].dma_ptr[i & 3],	139	dma_unmap_page(iq->dev, tx_buffer->sglist[i >> 2].dma_ptr[i & 3],
140	tx_buffer->sglist[i >> 2].len[i & 3], DMA_TO_DEVICE);	140	tx_buffer->sglist[i >> 2].len[3 - (i & 3)], DMA_TO_DEVICE);
141	i++;	141	i++;
142	}	142	}
143		143

drivers/net/ethernet/marvell/octeon_ep/octep_tx.h+15−1

@@ -17,7 +17,21 @@ · 16 unmodified lines
17	#define TX_BUFTYPE_NET_SG 2	17	#define TX_BUFTYPE_NET_SG 2
18	#define NUM_TX_BUFTYPES 3	18	#define NUM_TX_BUFTYPES 3
19		19
20	/* Hardware format for Scatter/Gather list */	20	/* Hardware format for Scatter/Gather list
		21	*
		22	* 63 48\|47 32\|31 16\|15 0
		23	* -----------------------------------------
		24	* \| Len 0 \| Len 1 \| Len 2 \| Len 3 \|
		25	* -----------------------------------------
		26	* \| Ptr 0 \|
		27	* -----------------------------------------
		28	* \| Ptr 1 \|
		29	* -----------------------------------------
		30	* \| Ptr 2 \|
		31	* -----------------------------------------
		32	* \| Ptr 3 \|
		33	* -----------------------------------------
		34	*/
21	struct octep_tx_sglist_desc {	35	struct octep_tx_sglist_desc {
22	u16 len[4];	36	u16 len[4];
23	dma_addr_t dma_ptr[4];	37	dma_addr_t dma_ptr[4];

drivers/net/ethernet/marvell/octeontx2/nic/cn10k.c+4−2

 }
 #define NPA_MAX_BURST 16
-void cn10k_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq)
+int cn10k_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq)
 {
 	struct otx2_nic *pfvf = dev;
+	int cnt = cq->pool_ptrs;
 	u64 ptrs[NPA_MAX_BURST];
-	int num_ptrs = 1;
 	dma_addr_t bufptr;
+	int num_ptrs = 1;
 	/* Refill pool with new buffers */
 	while (cq->pool_ptrs) {
 			num_ptrs = 1;
 		}
 	}
+	return cnt - cq->pool_ptrs;
 }
 void cn10k_sqe_flush(void *dev, struct otx2_snd_queue *sq, int size, int qidx)

drivers/net/ethernet/marvell/octeontx2/nic/cn10k.h+1−1

@@ -24,7 +24,7 @@ static inline int mtu_to_dwrr_weight(struct otx2_nic *pfvf, int mtu) · 23 unmodified lines
24	return weight;	24	return weight;
25	}	25	}
26		26
27	void cn10k_refill_pool_ptrs(void dev, struct otx2_cq_queue cq);	27	int cn10k_refill_pool_ptrs(void dev, struct otx2_cq_queue cq);
28	void cn10k_sqe_flush(void dev, struct otx2_snd_queue sq, int size, int qidx);	28	void cn10k_sqe_flush(void dev, struct otx2_snd_queue sq, int size, int qidx);
29	int cn10k_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura);	29	int cn10k_sq_aq_init(void *dev, u16 qidx, u16 sqb_aura);
30	int cn10k_lmtst_init(struct otx2_nic *pfvf);	30	int cn10k_lmtst_init(struct otx2_nic *pfvf);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.c+6−37

@@ -574,20 +574,8 @@ int otx2_alloc_rbuf(struct otx2_nic pfvf, struct otx2_pool pool, · 573 unmodified lines
574	int otx2_alloc_buffer(struct otx2_nic pfvf, struct otx2_cq_queue cq,	574	int otx2_alloc_buffer(struct otx2_nic pfvf, struct otx2_cq_queue cq,
575	dma_addr_t *dma)	575	dma_addr_t *dma)
576	{	576	{
577	if (unlikely(__otx2_alloc_rbuf(pfvf, cq->rbpool, dma))) {	577	if (unlikely(__otx2_alloc_rbuf(pfvf, cq->rbpool, dma)))
578	struct refill_work *work;
579	struct delayed_work *dwork;
580
581	work = &pfvf->refill_wrk[cq->cq_idx];
582	dwork = &work->pool_refill_work;
583	/* Schedule a task if no other task is running */
584	if (!cq->refill_task_sched) {
585	cq->refill_task_sched = true;
586	schedule_delayed_work(dwork,
587	msecs_to_jiffies(100));
588	}
589	return -ENOMEM;	578	return -ENOMEM;
590	}
591	return 0;	579	return 0;
592	}	580	}
593		581
@@ -1082,39 +1070,20 @@ static int otx2_cq_init(struct otx2_nic *pfvf, u16 qidx) · 488 unmodified lines
1082	static void otx2_pool_refill_task(struct work_struct *work)	1070	static void otx2_pool_refill_task(struct work_struct *work)
1083	{	1071	{
1084	struct otx2_cq_queue *cq;	1072	struct otx2_cq_queue *cq;
1085	struct otx2_pool *rbpool;
1086	struct refill_work *wrk;	1073	struct refill_work *wrk;
1087	int qidx, free_ptrs = 0;
1088	struct otx2_nic *pfvf;	1074	struct otx2_nic *pfvf;
1089	dma_addr_t bufptr;	1075	int qidx;
1090		1076
1091	wrk = container_of(work, struct refill_work, pool_refill_work.work);	1077	wrk = container_of(work, struct refill_work, pool_refill_work.work);
1092	pfvf = wrk->pf;	1078	pfvf = wrk->pf;
1093	qidx = wrk - pfvf->refill_wrk;	1079	qidx = wrk - pfvf->refill_wrk;
1094	cq = &pfvf->qset.cq[qidx];	1080	cq = &pfvf->qset.cq[qidx];
1095	rbpool = cq->rbpool;
1096	free_ptrs = cq->pool_ptrs;
1097		1081
1098	while (cq->pool_ptrs) {
1099	if (otx2_alloc_rbuf(pfvf, rbpool, &bufptr)) {
1100	/* Schedule a WQ if we fails to free atleast half of the
1101	* pointers else enable napi for this RQ.
1102	*/
1103	if (!((free_ptrs - cq->pool_ptrs) > free_ptrs / 2)) {
1104	struct delayed_work *dwork;
1105
1106	dwork = &wrk->pool_refill_work;
1107	schedule_delayed_work(dwork,
1108	msecs_to_jiffies(100));
1109	} else {
1110	cq->refill_task_sched = false;
1111	}
1112	return;
1113	}
1114	pfvf->hw_ops->aura_freeptr(pfvf, qidx, bufptr + OTX2_HEAD_ROOM);
1115	cq->pool_ptrs--;
1116	}
1117	cq->refill_task_sched = false;	1082	cq->refill_task_sched = false;
		1083
		1084	local_bh_disable();
		1085	napi_schedule(wrk->napi);
		1086	local_bh_enable();
1118	}	1087	}
1119		1088
1120	int otx2_config_nix_queues(struct otx2_nic *pfvf)	1089	int otx2_config_nix_queues(struct otx2_nic *pfvf)

drivers/net/ethernet/marvell/octeontx2/nic/otx2_common.h+2−1

 struct refill_work {
 	struct delayed_work pool_refill_work;
 	struct otx2_nic *pf;
+	struct napi_struct *napi;
 };
 /* PTPv2 originTimestamp structure */
 	int	(*sq_aq_init)(void *dev, u16 qidx, u16 sqb_aura);
 	void	(*sqe_flush)(void *dev, struct otx2_snd_queue *sq,
 			     int size, int qidx);
-	void	(*refill_pool_ptrs)(void *dev, struct otx2_cq_queue *cq);
+	int	(*refill_pool_ptrs)(void *dev, struct otx2_cq_queue *cq);
 	void	(*aura_freeptr)(void *dev, int aura, u64 buf);
 };

drivers/net/ethernet/marvell/octeontx2/nic/otx2_pf.c+4−3

 	netif_tx_disable(netdev);
+	for (wrk = 0; wrk < pf->qset.cq_cnt; wrk++)
+		cancel_delayed_work_sync(&pf->refill_wrk[wrk].pool_refill_work);
+	devm_kfree(pf->dev, pf->refill_wrk);
 	otx2_free_hw_resources(pf);
 	otx2_free_cints(pf, pf->hw.cint_cnt);
 	otx2_disable_napi(pf);
 	for (qidx = 0; qidx < netdev->num_tx_queues; qidx++)
 		netdev_tx_reset_queue(netdev_get_tx_queue(netdev, qidx));
-	for (wrk = 0; wrk < pf->qset.cq_cnt; wrk++)
-		cancel_delayed_work_sync(&pf->refill_wrk[wrk].pool_refill_work);
-	devm_kfree(pf->dev, pf->refill_wrk);
 	kfree(qset->sq);
 	kfree(qset->cq);

drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.c+38−11

 static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf,
 				     struct bpf_prog *prog,
 				     struct nix_cqe_rx_s *cqe,
-				     struct otx2_cq_queue *cq);
+				     struct otx2_cq_queue *cq,
+				     bool *need_xdp_flush);
 static int otx2_nix_cq_op_status(struct otx2_nic *pfvf,
 				 struct otx2_cq_queue *cq)
 static void otx2_rcv_pkt_handler(struct otx2_nic *pfvf,
 				 struct napi_struct *napi,
 				 struct otx2_cq_queue *cq,
-				 struct nix_cqe_rx_s *cqe)
+				 struct nix_cqe_rx_s *cqe, bool *need_xdp_flush)
 {
 	struct nix_rx_parse_s *parse = &cqe->parse;
 	struct nix_rx_sg_s *sg = &cqe->sg;
 	}
 	if (pfvf->xdp_prog)
-		if (otx2_xdp_rcv_pkt_handler(pfvf, pfvf->xdp_prog, cqe, cq))
+		if (otx2_xdp_rcv_pkt_handler(pfvf, pfvf->xdp_prog, cqe, cq, need_xdp_flush))
 			return;
 	skb = napi_get_frags(napi);
 				struct napi_struct *napi,
 				struct otx2_cq_queue *cq, int budget)
 {
+	bool need_xdp_flush = false;
 	struct nix_cqe_rx_s *cqe;
 	int processed_cqe = 0;
 		cq->cq_head++;
 		cq->cq_head &= (cq->cqe_cnt - 1);
-		otx2_rcv_pkt_handler(pfvf, napi, cq, cqe);
+		otx2_rcv_pkt_handler(pfvf, napi, cq, cqe, &need_xdp_flush);
 		cqe->hdr.cqe_type = NIX_XQE_TYPE_INVALID;
 		cqe->sg.seg_addr = 0x00;
 		processed_cqe++;
 		cq->pend_cqe--;
 	}
+	if (need_xdp_flush)
+		xdp_do_flush();
 	/* Free CQEs to HW */
 	otx2_write64(pfvf, NIX_LF_CQ_OP_DOOR,
 	return processed_cqe;
 }
-void otx2_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq)
+int otx2_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq)
 {
 	struct otx2_nic *pfvf = dev;
+	int cnt = cq->pool_ptrs;
 	dma_addr_t bufptr;
 	while (cq->pool_ptrs) {
 		otx2_aura_freeptr(pfvf, cq->cq_idx, bufptr + OTX2_HEAD_ROOM);
 		cq->pool_ptrs--;
 	}
+	return cnt - cq->pool_ptrs;
 }
 static int otx2_tx_napi_handler(struct otx2_nic *pfvf,
 	struct otx2_cq_queue *cq;
 	struct otx2_qset *qset;
 	struct otx2_nic *pfvf;
+	int filled_cnt = -1;
 	cq_poll = container_of(napi, struct otx2_cq_poll, napi);
 	pfvf = (struct otx2_nic *)cq_poll->dev;
 	}
 	if (rx_cq && rx_cq->pool_ptrs)
-		pfvf->hw_ops->refill_pool_ptrs(pfvf, rx_cq);
+		filled_cnt = pfvf->hw_ops->refill_pool_ptrs(pfvf, rx_cq);
 	/* Clear the IRQ */
 	otx2_write64(pfvf, NIX_LF_CINTX_INT(cq_poll->cint_idx), BIT_ULL(0));
 				otx2_config_irq_coalescing(pfvf, i);
 		}
-		/* Re-enable interrupts */
+		if (unlikely(!filled_cnt)) {
-		otx2_write64(pfvf, NIX_LF_CINTX_ENA_W1S(cq_poll->cint_idx),
+			struct refill_work *work;
-			     BIT_ULL(0));
+			struct delayed_work *dwork;
+			work = &pfvf->refill_wrk[cq->cq_idx];
+			dwork = &work->pool_refill_work;
+			/* Schedule a task if no other task is running */
+			if (!cq->refill_task_sched) {
+				work->napi = napi;
+				cq->refill_task_sched = true;
+				schedule_delayed_work(dwork,
+						      msecs_to_jiffies(100));
+			}
+		} else {
+			/* Re-enable interrupts */
+			otx2_write64(pfvf,
+				     NIX_LF_CINTX_ENA_W1S(cq_poll->cint_idx),
+				     BIT_ULL(0));
+		}
 	}
 	return workdone;
 }
 static bool otx2_xdp_rcv_pkt_handler(struct otx2_nic *pfvf,
 				     struct bpf_prog *prog,
 				     struct nix_cqe_rx_s *cqe,
-				     struct otx2_cq_queue *cq)
+				     struct otx2_cq_queue *cq,
+				     bool *need_xdp_flush)
 {
 	unsigned char *hard_start, *data;
 	int qidx = cq->cq_idx;
 		otx2_dma_unmap_page(pfvf, iova, pfvf->rbsize,
 				    DMA_FROM_DEVICE);
-		if (!err)
+		if (!err) {
+			*need_xdp_flush = true;
 			return true;
+		}
 		put_page(page);
 		break;
 	default:

drivers/net/ethernet/marvell/octeontx2/nic/otx2_txrx.h+2−2

@@ -170,6 +170,6 @@ void cn10k_sqe_flush(void dev, struct otx2_snd_queue sq, · 169 unmodified lines
170	int size, int qidx);	170	int size, int qidx);
171	void otx2_sqe_flush(void dev, struct otx2_snd_queue sq,	171	void otx2_sqe_flush(void dev, struct otx2_snd_queue sq,
172	int size, int qidx);	172	int size, int qidx);
173	void otx2_refill_pool_ptrs(void dev, struct otx2_cq_queue cq);	173	int otx2_refill_pool_ptrs(void dev, struct otx2_cq_queue cq);
174	void cn10k_refill_pool_ptrs(void dev, struct otx2_cq_queue cq);	174	int cn10k_refill_pool_ptrs(void dev, struct otx2_cq_queue cq);
175	#endif /* OTX2_TXRX_H */	175	#endif /* OTX2_TXRX_H */

drivers/net/ethernet/mediatek/mtk_eth_soc.c+6−2

 	u8 *data, *new_data;
 	struct mtk_rx_dma_v2 *rxd, trxd;
 	int done = 0, bytes = 0;
+	dma_addr_t dma_addr = DMA_MAPPING_ERROR;
 	while (done < budget) {
 		unsigned int pktlen, *rxdcsum;
 		struct net_device *netdev;
-		dma_addr_t dma_addr;
 		u32 hash, reason;
 		int mac = 0;
 		else
 			rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size);
-		if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA))
+		if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA) &&
+		    likely(dma_addr != DMA_MAPPING_ERROR))
 			rxd->rxd2 |= RX_DMA_PREP_ADDR64(dma_addr);
 		ring->calc_idx = idx;
 	int i;
 	for (i = 0; i < MTK_MAX_LRO_IP_CNT; i++) {
+		if (cnt == cmd->rule_cnt)
+			return -EMSGSIZE;
 		if (mac->hwlro_ip[i]) {
 			rule_locs[cnt] = i;
 			cnt++;

drivers/net/ethernet/mediatek/mtk_ppe_offload.c+4−2

 	dsa_port = mtk_flow_get_dsa_port(&dev);
 	if (dev == eth->netdev[0])
-		pse_port = 1;
+		pse_port = PSE_GDM1_PORT;
 	else if (dev == eth->netdev[1])
-		pse_port = 2;
+		pse_port = PSE_GDM2_PORT;
+	else if (dev == eth->netdev[2])
+		pse_port = PSE_GDM3_PORT;
 	else
 		return -EOPNOTSUPP;

drivers/net/ethernet/microchip/vcap/vcap_api.c+16−2

 	list_for_each_entry(ckf, &ri->data.keyfields, ctrl.list) {
 		newckf = kmemdup(ckf, sizeof(*newckf), GFP_KERNEL);
 		if (!newckf)
-			return ERR_PTR(-ENOMEM);
+			goto err;
 		list_add_tail(&newckf->ctrl.list, &duprule->data.keyfields);
 	}
 	list_for_each_entry(caf, &ri->data.actionfields, ctrl.list) {
 		newcaf = kmemdup(caf, sizeof(*newcaf), GFP_KERNEL);
 		if (!newcaf)
-			return ERR_PTR(-ENOMEM);
+			goto err;
 		list_add_tail(&newcaf->ctrl.list, &duprule->data.actionfields);
 	}
 	return duprule;
+err:
+	list_for_each_entry_safe(ckf, newckf, &duprule->data.keyfields, ctrl.list) {
+		list_del(&ckf->ctrl.list);
+		kfree(ckf);
+	}
+	list_for_each_entry_safe(caf, newcaf, &duprule->data.actionfields, ctrl.list) {
+		list_del(&caf->ctrl.list);
+		kfree(caf);
+	}
+	kfree(duprule);
+	return ERR_PTR(-ENOMEM);
 }
 static void vcap_apply_width(u8 *dst, int width, int bytes)

drivers/net/ethernet/microchip/vcap/vcap_api_kunit.c+54−5

 }
 /* Helper function to create a rule of a specific size */
-static struct vcap_rule *
+static void test_vcap_xn_rule_creator(struct kunit *test, int cid,
-test_vcap_xn_rule_creator(struct kunit *test, int cid, enum vcap_user user,
+				      enum vcap_user user, u16 priority,
-			  u16 priority,
+				      int id, int size, int expected_addr)
-			  int id, int size, int expected_addr)
 {
 	struct vcap_rule *rule;
 	struct vcap_rule_internal *ri;
 	ret = vcap_add_rule(rule);
 	KUNIT_EXPECT_EQ(test, 0, ret);
 	KUNIT_EXPECT_EQ(test, expected_addr, ri->addr);
-	return rule;
+	vcap_free_rule(rule);
 }
 /* Prepare testing rule deletion */
 	KUNIT_EXPECT_EQ(test, (u32)0x00000000, actwords[11]);
 }
+static void vcap_free_ckf(struct vcap_rule *rule)
+{
+	struct vcap_client_keyfield *ckf, *next_ckf;
+	list_for_each_entry_safe(ckf, next_ckf, &rule->keyfields, ctrl.list) {
+		list_del(&ckf->ctrl.list);
+		kfree(ckf);
+	}
+}
 static void vcap_api_rule_add_keyvalue_test(struct kunit *test)
 {
 	struct vcap_admin admin = {
 	KUNIT_EXPECT_EQ(test, VCAP_FIELD_BIT, kf->ctrl.type);
 	KUNIT_EXPECT_EQ(test, 0x0, kf->data.u1.value);
 	KUNIT_EXPECT_EQ(test, 0x1, kf->data.u1.mask);
+	vcap_free_ckf(rule);
 	INIT_LIST_HEAD(&rule->keyfields);
 	ret = vcap_rule_add_key_bit(rule, VCAP_KF_LOOKUP_FIRST_IS, VCAP_BIT_1);
 	KUNIT_EXPECT_EQ(test, VCAP_FIELD_BIT, kf->ctrl.type);
 	KUNIT_EXPECT_EQ(test, 0x1, kf->data.u1.value);
 	KUNIT_EXPECT_EQ(test, 0x1, kf->data.u1.mask);
+	vcap_free_ckf(rule);
 	INIT_LIST_HEAD(&rule->keyfields);
 	ret = vcap_rule_add_key_bit(rule, VCAP_KF_LOOKUP_FIRST_IS,
 	KUNIT_EXPECT_EQ(test, VCAP_FIELD_BIT, kf->ctrl.type);
 	KUNIT_EXPECT_EQ(test, 0x0, kf->data.u1.value);
 	KUNIT_EXPECT_EQ(test, 0x0, kf->data.u1.mask);
+	vcap_free_ckf(rule);
 	INIT_LIST_HEAD(&rule->keyfields);
 	ret = vcap_rule_add_key_u32(rule, VCAP_KF_TYPE, 0x98765432, 0xff00ffab);
 	KUNIT_EXPECT_EQ(test, VCAP_FIELD_U32, kf->ctrl.type);
 	KUNIT_EXPECT_EQ(test, 0x98765432, kf->data.u32.value);
 	KUNIT_EXPECT_EQ(test, 0xff00ffab, kf->data.u32.mask);
+	vcap_free_ckf(rule);
 	INIT_LIST_HEAD(&rule->keyfields);
 	ret = vcap_rule_add_key_u128(rule, VCAP_KF_L3_IP6_SIP, &dip);
 		KUNIT_EXPECT_EQ(test, dip.value[idx], kf->data.u128.value[idx]);
 	for (idx = 0; idx < ARRAY_SIZE(dip.mask); ++idx)
 		KUNIT_EXPECT_EQ(test, dip.mask[idx], kf->data.u128.mask[idx]);
+	vcap_free_ckf(rule);
+}
+static void vcap_free_caf(struct vcap_rule *rule)
+{
+	struct vcap_client_actionfield *caf, *next_caf;
+	list_for_each_entry_safe(caf, next_caf,
+				 &rule->actionfields, ctrl.list) {
+		list_del(&caf->ctrl.list);
+		kfree(caf);
+	}
 }
 static void vcap_api_rule_add_actionvalue_test(struct kunit *test)
 	KUNIT_EXPECT_EQ(test, VCAP_AF_POLICE_ENA, af->ctrl.action);
 	KUNIT_EXPECT_EQ(test, VCAP_FIELD_BIT, af->ctrl.type);
 	KUNIT_EXPECT_EQ(test, 0x0, af->data.u1.value);
+	vcap_free_caf(rule);
 	INIT_LIST_HEAD(&rule->actionfields);
 	ret = vcap_rule_add_action_bit(rule, VCAP_AF_POLICE_ENA, VCAP_BIT_1);
 	KUNIT_EXPECT_EQ(test, VCAP_AF_POLICE_ENA, af->ctrl.action);
 	KUNIT_EXPECT_EQ(test, VCAP_FIELD_BIT, af->ctrl.type);
 	KUNIT_EXPECT_EQ(test, 0x1, af->data.u1.value);
+	vcap_free_caf(rule);
 	INIT_LIST_HEAD(&rule->actionfields);
 	ret = vcap_rule_add_action_bit(rule, VCAP_AF_POLICE_ENA, VCAP_BIT_ANY);
 	KUNIT_EXPECT_EQ(test, VCAP_AF_POLICE_ENA, af->ctrl.action);
 	KUNIT_EXPECT_EQ(test, VCAP_FIELD_BIT, af->ctrl.type);
 	KUNIT_EXPECT_EQ(test, 0x0, af->data.u1.value);
+	vcap_free_caf(rule);
 	INIT_LIST_HEAD(&rule->actionfields);
 	ret = vcap_rule_add_action_u32(rule, VCAP_AF_TYPE, 0x98765432);
 	KUNIT_EXPECT_EQ(test, VCAP_AF_TYPE, af->ctrl.action);
 	KUNIT_EXPECT_EQ(test, VCAP_FIELD_U32, af->ctrl.type);
 	KUNIT_EXPECT_EQ(test, 0x98765432, af->data.u32.value);
+	vcap_free_caf(rule);
 	INIT_LIST_HEAD(&rule->actionfields);
 	ret = vcap_rule_add_action_u32(rule, VCAP_AF_MASK_MODE, 0xaabbccdd);
 	KUNIT_EXPECT_EQ(test, VCAP_AF_MASK_MODE, af->ctrl.action);
 	KUNIT_EXPECT_EQ(test, VCAP_FIELD_U32, af->ctrl.type);
 	KUNIT_EXPECT_EQ(test, 0xaabbccdd, af->data.u32.value);
+	vcap_free_caf(rule);
 }
 static void vcap_api_rule_find_keyset_basic_test(struct kunit *test)
 	ret = list_empty(&is2_admin.rules);
 	KUNIT_EXPECT_EQ(test, false, ret);
 	KUNIT_EXPECT_EQ(test, 0, ret);
+	vcap_enable_lookups(&test_vctrl, &test_netdev, 0, 0,
+			    rule->cookie, false);
 	vcap_free_rule(rule);
 	/* Check that the rule has been freed: tricky to access since this
 	KUNIT_EXPECT_EQ(test, true, ret);
 	ret = list_empty(&rule->actionfields);
 	KUNIT_EXPECT_EQ(test, true, ret);
+	vcap_del_rule(&test_vctrl, &test_netdev, id);
 }
 static void vcap_api_set_rule_counter_test(struct kunit *test)
 	test_vcap_xn_rule_creator(test, 10000, VCAP_USER_QOS, 20, 400, 6, 774);
 	test_vcap_xn_rule_creator(test, 10000, VCAP_USER_QOS, 30, 300, 3, 771);
 	test_vcap_xn_rule_creator(test, 10000, VCAP_USER_QOS, 40, 200, 2, 768);
+	vcap_del_rule(&test_vctrl, &test_netdev, 200);
+	vcap_del_rule(&test_vctrl, &test_netdev, 300);
+	vcap_del_rule(&test_vctrl, &test_netdev, 400);
+	vcap_del_rule(&test_vctrl, &test_netdev, 500);
 }
 static void vcap_api_rule_insert_reverse_order_test(struct kunit *test)
 		++idx;
 	}
 	KUNIT_EXPECT_EQ(test, 768, admin.last_used_addr);
+	vcap_del_rule(&test_vctrl, &test_netdev, 500);
+	vcap_del_rule(&test_vctrl, &test_netdev, 400);
+	vcap_del_rule(&test_vctrl, &test_netdev, 300);
+	vcap_del_rule(&test_vctrl, &test_netdev, 200);
 }
 static void vcap_api_rule_remove_at_end_test(struct kunit *test)
 	KUNIT_EXPECT_EQ(test, 786, test_init_start);
 	KUNIT_EXPECT_EQ(test, 8, test_init_count);
 	KUNIT_EXPECT_EQ(test, 794, admin.last_used_addr);
+	vcap_del_rule(&test_vctrl, &test_netdev, 200);
+	vcap_del_rule(&test_vctrl, &test_netdev, 300);
 }
 static struct kunit_case vcap_api_rule_remove_test_cases[] = {

drivers/net/ethernet/pensando/ionic/ionic_dev.h+1−0

@@ -187,6 +187,7 @@ typedef void (ionic_desc_cb)(struct ionic_queue q, · 186 unmodified lines
187	struct ionic_desc_info *desc_info,	187	struct ionic_desc_info *desc_info,
188	struct ionic_cq_info cq_info, void cb_arg);	188	struct ionic_cq_info cq_info, void cb_arg);
189		189
		190	#define IONIC_MAX_BUF_LEN ((u16)-1)
190	#define IONIC_PAGE_SIZE PAGE_SIZE	191	#define IONIC_PAGE_SIZE PAGE_SIZE
191	#define IONIC_PAGE_SPLIT_SZ (PAGE_SIZE / 2)	192	#define IONIC_PAGE_SPLIT_SZ (PAGE_SIZE / 2)
192	#define IONIC_PAGE_GFP_MASK (GFP_ATOMIC \| __GFP_NOWARN \|\	193	#define IONIC_PAGE_GFP_MASK (GFP_ATOMIC \| __GFP_NOWARN \|\

drivers/net/ethernet/pensando/ionic/ionic_txrx.c+7−3

 			return NULL;
 		}
-		frag_len = min_t(u16, len, IONIC_PAGE_SIZE - buf_info->page_offset);
+		frag_len = min_t(u16, len, min_t(u32, IONIC_MAX_BUF_LEN,
+						 IONIC_PAGE_SIZE - buf_info->page_offset));
 		len -= frag_len;
 		dma_sync_single_for_cpu(dev,
 		/* fill main descriptor - buf[0] */
 		desc->addr = cpu_to_le64(buf_info->dma_addr + buf_info->page_offset);
-		frag_len = min_t(u16, len, IONIC_PAGE_SIZE - buf_info->page_offset);
+		frag_len = min_t(u16, len, min_t(u32, IONIC_MAX_BUF_LEN,
+						 IONIC_PAGE_SIZE - buf_info->page_offset));
 		desc->len = cpu_to_le16(frag_len);
 		remain_len -= frag_len;
 		buf_info++;
 			}
 			sg_elem->addr = cpu_to_le64(buf_info->dma_addr + buf_info->page_offset);
-			frag_len = min_t(u16, remain_len, IONIC_PAGE_SIZE - buf_info->page_offset);
+			frag_len = min_t(u16, remain_len, min_t(u32, IONIC_MAX_BUF_LEN,
+								IONIC_PAGE_SIZE -
+								buf_info->page_offset));
 			sg_elem->len = cpu_to_le16(frag_len);
 			remain_len -= frag_len;
 			buf_info++;

drivers/net/ethernet/renesas/rswitch.c+16−4

@@ -799,6 +799,7 @@ static int rswitch_poll(struct napi_struct *napi, int budget) · 798 unmodified lines
799	struct net_device *ndev = napi->dev;	799	struct net_device *ndev = napi->dev;
800	struct rswitch_private *priv;	800	struct rswitch_private *priv;
801	struct rswitch_device *rdev;	801	struct rswitch_device *rdev;
		802	unsigned long flags;
802	int quota = budget;	803	int quota = budget;
803		804
804	rdev = netdev_priv(ndev);	805	rdev = netdev_priv(ndev);
@@ -816,10 +817,12 @@ retry: · 11 unmodified lines
816		817
817	netif_wake_subqueue(ndev, 0);	818	netif_wake_subqueue(ndev, 0);
818		819
819	napi_complete(napi);	820	if (napi_complete_done(napi, budget - quota)) {
820		821	spin_lock_irqsave(&priv->lock, flags);
821	rswitch_enadis_data_irq(priv, rdev->tx_queue->index, true);	822	rswitch_enadis_data_irq(priv, rdev->tx_queue->index, true);
822	rswitch_enadis_data_irq(priv, rdev->rx_queue->index, true);	823	rswitch_enadis_data_irq(priv, rdev->rx_queue->index, true);
		824	spin_unlock_irqrestore(&priv->lock, flags);
		825	}
823		826
824	out:	827	out:
825	return budget - quota;	828	return budget - quota;
@@ -835,8 +838,10 @@ static void rswitch_queue_interrupt(struct net_device *ndev) · 9 unmodified lines
835	struct rswitch_device *rdev = netdev_priv(ndev);	838	struct rswitch_device *rdev = netdev_priv(ndev);
836		839
837	if (napi_schedule_prep(&rdev->napi)) {	840	if (napi_schedule_prep(&rdev->napi)) {
		841	spin_lock(&rdev->priv->lock);
838	rswitch_enadis_data_irq(rdev->priv, rdev->tx_queue->index, false);	842	rswitch_enadis_data_irq(rdev->priv, rdev->tx_queue->index, false);
839	rswitch_enadis_data_irq(rdev->priv, rdev->rx_queue->index, false);	843	rswitch_enadis_data_irq(rdev->priv, rdev->rx_queue->index, false);
		844	spin_unlock(&rdev->priv->lock);
840	__napi_schedule(&rdev->napi);	845	__napi_schedule(&rdev->napi);
841	}	846	}
842	}	847	}
@@ -1440,14 +1445,17 @@ static void rswitch_ether_port_deinit_all(struct rswitch_private *priv) · 597 unmodified lines
1440	static int rswitch_open(struct net_device *ndev)	1445	static int rswitch_open(struct net_device *ndev)
1441	{	1446	{
1442	struct rswitch_device *rdev = netdev_priv(ndev);	1447	struct rswitch_device *rdev = netdev_priv(ndev);
		1448	unsigned long flags;
1443		1449
1444	phy_start(ndev->phydev);	1450	phy_start(ndev->phydev);
1445		1451
1446	napi_enable(&rdev->napi);	1452	napi_enable(&rdev->napi);
1447	netif_start_queue(ndev);	1453	netif_start_queue(ndev);
1448		1454
		1455	spin_lock_irqsave(&rdev->priv->lock, flags);
1449	rswitch_enadis_data_irq(rdev->priv, rdev->tx_queue->index, true);	1456	rswitch_enadis_data_irq(rdev->priv, rdev->tx_queue->index, true);
1450	rswitch_enadis_data_irq(rdev->priv, rdev->rx_queue->index, true);	1457	rswitch_enadis_data_irq(rdev->priv, rdev->rx_queue->index, true);
		1458	spin_unlock_irqrestore(&rdev->priv->lock, flags);
1451		1459
1452	if (bitmap_empty(rdev->priv->opened_ports, RSWITCH_NUM_PORTS))	1460	if (bitmap_empty(rdev->priv->opened_ports, RSWITCH_NUM_PORTS))
1453	iowrite32(GWCA_TS_IRQ_BIT, rdev->priv->addr + GWTSDIE);	1461	iowrite32(GWCA_TS_IRQ_BIT, rdev->priv->addr + GWTSDIE);
@@ -1461,6 +1469,7 @@ static int rswitch_stop(struct net_device *ndev) · 7 unmodified lines
1461	{	1469	{
1462	struct rswitch_device *rdev = netdev_priv(ndev);	1470	struct rswitch_device *rdev = netdev_priv(ndev);
1463	struct rswitch_gwca_ts_info ts_info, ts_info2;	1471	struct rswitch_gwca_ts_info ts_info, ts_info2;
		1472	unsigned long flags;
1464		1473
1465	netif_tx_stop_all_queues(ndev);	1474	netif_tx_stop_all_queues(ndev);
1466	bitmap_clear(rdev->priv->opened_ports, rdev->port, 1);	1475	bitmap_clear(rdev->priv->opened_ports, rdev->port, 1);
@@ -1476,8 +1485,10 @@ static int rswitch_stop(struct net_device *ndev) · 9 unmodified lines
1476	kfree(ts_info);	1485	kfree(ts_info);
1477	}	1486	}
1478		1487
		1488	spin_lock_irqsave(&rdev->priv->lock, flags);
1479	rswitch_enadis_data_irq(rdev->priv, rdev->tx_queue->index, false);	1489	rswitch_enadis_data_irq(rdev->priv, rdev->tx_queue->index, false);
1480	rswitch_enadis_data_irq(rdev->priv, rdev->rx_queue->index, false);	1490	rswitch_enadis_data_irq(rdev->priv, rdev->rx_queue->index, false);
		1491	spin_unlock_irqrestore(&rdev->priv->lock, flags);
1481		1492
1482	phy_stop(ndev->phydev);	1493	phy_stop(ndev->phydev);
1483	napi_disable(&rdev->napi);	1494	napi_disable(&rdev->napi);
@@ -1887,6 +1898,7 @@ static int renesas_eth_sw_probe(struct platform_device *pdev) · 403 unmodified lines
1887	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);	1898	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1888	if (!priv)	1899	if (!priv)
1889	return -ENOMEM;	1900	return -ENOMEM;
		1901	spin_lock_init(&priv->lock);
1890		1902
1891	attr = soc_device_match(rswitch_soc_no_speed_change);	1903	attr = soc_device_match(rswitch_soc_no_speed_change);
1892	if (attr)	1904	if (attr)

drivers/net/ethernet/renesas/rswitch.h+2−0

@@ -1011,6 +1011,8 @@ struct rswitch_private { · 1010 unmodified lines
1011	struct rswitch_etha etha[RSWITCH_NUM_PORTS];	1011	struct rswitch_etha etha[RSWITCH_NUM_PORTS];
1012	struct rswitch_mfwd mfwd;	1012	struct rswitch_mfwd mfwd;
1013		1013
		1014	spinlock_t lock; /* lock interrupt registers' control */
		1015
1014	bool etha_no_runtime_change;	1016	bool etha_no_runtime_change;
1015	bool gwca_halt;	1017	bool gwca_halt;
1016	};	1018	};

drivers/net/ethernet/sfc/tc.c+18−3

 	if (old) {
 		/* don't need our new entry */
 		kfree(ped);
+		if (IS_ERR(old)) /* oh dear, it's actually an error */
+			return ERR_CAST(old);
 		if (!refcount_inc_not_zero(&old->ref))
 			return ERR_PTR(-EAGAIN);
 		/* existing entry found, ref taken */
 		kfree(encap);
 		if (pseudo) /* don't need our new pseudo either */
 			efx_tc_flower_release_encap_match(efx, pseudo);
+		if (IS_ERR(old)) /* oh dear, it's actually an error */
+			return PTR_ERR(old);
 		/* check old and new em_types are compatible */
 		switch (old->type) {
 		case EFX_TC_EM_DIRECT:
 	if (old) {
 		/* don't need our new entry */
 		kfree(rid);
+		if (IS_ERR(old)) /* oh dear, it's actually an error */
+			return ERR_CAST(old);
 		if (!refcount_inc_not_zero(&old->ref))
 			return ERR_PTR(-EAGAIN);
 		/* existing entry found */
 	old = rhashtable_lookup_get_insert_fast(&efx->tc->match_action_ht,
 						&rule->linkage,
 						efx_tc_match_action_ht_params);
-	if (old) {
+	if (IS_ERR(old)) {
+		rc = PTR_ERR(old);
+		goto release;
+	} else if (old) {
 		netif_dbg(efx, drv, efx->net_dev,
 			  "Ignoring already-offloaded rule (cookie %lx)\n",
 			  tc->cookie);
 	old = rhashtable_lookup_get_insert_fast(&efx->tc->lhs_rule_ht,
 						&rule->linkage,
 						efx_tc_lhs_rule_ht_params);
-	if (old) {
+	if (IS_ERR(old)) {
+		rc = PTR_ERR(old);
+		goto release;
+	} else if (old) {
 		netif_dbg(efx, drv, efx->net_dev,
 			  "Already offloaded rule (cookie %lx)\n", tc->cookie);
 		rc = -EEXIST;
 	old = rhashtable_lookup_get_insert_fast(&efx->tc->match_action_ht,
 						&rule->linkage,
 						efx_tc_match_action_ht_params);
-	if (old) {
+	if (IS_ERR(old)) {
+		rc = PTR_ERR(old);
+		goto release;
+	} else if (old) {
 		netif_dbg(efx, drv, efx->net_dev,
 			  "Already offloaded rule (cookie %lx)\n", tc->cookie);
 		NL_SET_ERR_MSG_MOD(extack, "Rule already offloaded");

drivers/net/ethernet/sfc/tc_conntrack.c+6−1

 	old = rhashtable_lookup_get_insert_fast(&efx->tc->ct_ht,
 						&conn->linkage,
 						efx_tc_ct_ht_params);
-	if (old) {
+	if (IS_ERR(old)) {
+		rc = PTR_ERR(old);
+		goto release;
+	} else if (old) {
 		netif_dbg(efx, drv, efx->net_dev,
 			  "Already offloaded conntrack (cookie %lx)\n", tc->cookie);
 		rc = -EEXIST;
 	if (old) {
 		/* don't need our new entry */
 		kfree(ct_zone);
+		if (IS_ERR(old)) /* oh dear, it's actually an error */
+			return ERR_CAST(old);
 		if (!refcount_inc_not_zero(&old->ref))
 			return ERR_PTR(-EAGAIN);
 		/* existing entry found */

drivers/net/ethernet/sfc/tc_counters.c+2−0

 	if (old) {
 		/* don't need our new entry */
 		kfree(ctr);
+		if (IS_ERR(old)) /* oh dear, it's actually an error */
+			return ERR_CAST(old);
 		if (!refcount_inc_not_zero(&old->ref))
 			return ERR_PTR(-EAGAIN);
 		/* existing entry found */

drivers/net/ethernet/sfc/tc_encap_actions.c+4−0

 		/* don't need our new entry */
 		put_net_track(neigh->net, &neigh->ns_tracker);
 		kfree(neigh);
+		if (IS_ERR(old)) /* oh dear, it's actually an error */
+			return PTR_ERR(old);
 		if (!refcount_inc_not_zero(&old->ref))
 			return -EAGAIN;
 		/* existing entry found, ref taken */
 	if (old) {
 		/* don't need our new entry */
 		kfree(encap);
+		if (IS_ERR(old)) /* oh dear, it's actually an error */
+			return ERR_CAST(old);
 		if (!refcount_inc_not_zero(&old->ref))
 			return ERR_PTR(-EAGAIN);
 		/* existing entry found, ref taken */

drivers/net/ethernet/stmicro/stmmac/common.h+5−2

 	u64 tx_tso_frames;
 	u64 tx_tso_nfrags;
 	struct u64_stats_sync syncp;
-};
+} ____cacheline_aligned_in_smp;
 struct stmmac_rxq_stats {
 	u64 rx_bytes;
 	u64 rx_normal_irq_n;
 	u64 napi_poll;
 	struct u64_stats_sync syncp;
-};
+} ____cacheline_aligned_in_smp;
 /* Extra statistic and debug information exposed by ethtool */
 struct stmmac_extra_stats {
 	unsigned long mtl_est_hlbf;
 	unsigned long mtl_est_btre;
 	unsigned long mtl_est_btrlm;
+	/* per queue statistics */
+	struct stmmac_txq_stats txq_stats[MTL_MAX_TX_QUEUES];
+	struct stmmac_rxq_stats rxq_stats[MTL_MAX_RX_QUEUES];
 	unsigned long rx_dropped;
 	unsigned long rx_errors;
 	unsigned long tx_dropped;

drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c+8−8

@@ -441,8 +441,8 @@ static int sun8i_dwmac_dma_interrupt(struct stmmac_priv *priv, · 440 unmodified lines
441	struct stmmac_extra_stats *x, u32 chan,	441	struct stmmac_extra_stats *x, u32 chan,
442	u32 dir)	442	u32 dir)
443	{	443	{
444	struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[chan];	444	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
445	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];	445	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
446	int ret = 0;	446	int ret = 0;
447	u32 v;	447	u32 v;
448		448
@@ -455,9 +455,9 @@ static int sun8i_dwmac_dma_interrupt(struct stmmac_priv *priv, · 6 unmodified lines
455		455
456	if (v & EMAC_TX_INT) {	456	if (v & EMAC_TX_INT) {
457	ret \|= handle_tx;	457	ret \|= handle_tx;
458	u64_stats_update_begin(&tx_q->txq_stats.syncp);	458	u64_stats_update_begin(&txq_stats->syncp);
459	tx_q->txq_stats.tx_normal_irq_n++;	459	txq_stats->tx_normal_irq_n++;
460	u64_stats_update_end(&tx_q->txq_stats.syncp);	460	u64_stats_update_end(&txq_stats->syncp);
461	}	461	}
462		462
463	if (v & EMAC_TX_DMA_STOP_INT)	463	if (v & EMAC_TX_DMA_STOP_INT)
@@ -479,9 +479,9 @@ static int sun8i_dwmac_dma_interrupt(struct stmmac_priv *priv, · 15 unmodified lines
479		479
480	if (v & EMAC_RX_INT) {	480	if (v & EMAC_RX_INT) {
481	ret \|= handle_rx;	481	ret \|= handle_rx;
482	u64_stats_update_begin(&rx_q->rxq_stats.syncp);	482	u64_stats_update_begin(&rxq_stats->syncp);
483	rx_q->rxq_stats.rx_normal_irq_n++;	483	rxq_stats->rx_normal_irq_n++;
484	u64_stats_update_end(&rx_q->rxq_stats.syncp);	484	u64_stats_update_end(&rxq_stats->syncp);
485	}	485	}
486		486
487	if (v & EMAC_RX_BUF_UA_INT)	487	if (v & EMAC_RX_BUF_UA_INT)

drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c+8−8

@@ -171,8 +171,8 @@ int dwmac4_dma_interrupt(struct stmmac_priv priv, void __iomem ioaddr, · 170 unmodified lines
171	const struct dwmac4_addrs *dwmac4_addrs = priv->plat->dwmac4_addrs;	171	const struct dwmac4_addrs *dwmac4_addrs = priv->plat->dwmac4_addrs;
172	u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(dwmac4_addrs, chan));	172	u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(dwmac4_addrs, chan));
173	u32 intr_en = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan));	173	u32 intr_en = readl(ioaddr + DMA_CHAN_INTR_ENA(dwmac4_addrs, chan));
174	struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[chan];	174	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
175	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];	175	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
176	int ret = 0;	176	int ret = 0;
177		177
178	if (dir == DMA_DIR_RX)	178	if (dir == DMA_DIR_RX)
@@ -201,15 +201,15 @@ int dwmac4_dma_interrupt(struct stmmac_priv priv, void __iomem ioaddr, · 22 unmodified lines
201	}	201	}
202	/* TX/RX NORMAL interrupts */	202	/* TX/RX NORMAL interrupts */
203	if (likely(intr_status & DMA_CHAN_STATUS_RI)) {	203	if (likely(intr_status & DMA_CHAN_STATUS_RI)) {
204	u64_stats_update_begin(&rx_q->rxq_stats.syncp);	204	u64_stats_update_begin(&rxq_stats->syncp);
205	rx_q->rxq_stats.rx_normal_irq_n++;	205	rxq_stats->rx_normal_irq_n++;
206	u64_stats_update_end(&rx_q->rxq_stats.syncp);	206	u64_stats_update_end(&rxq_stats->syncp);
207	ret \|= handle_rx;	207	ret \|= handle_rx;
208	}	208	}
209	if (likely(intr_status & DMA_CHAN_STATUS_TI)) {	209	if (likely(intr_status & DMA_CHAN_STATUS_TI)) {
210	u64_stats_update_begin(&tx_q->txq_stats.syncp);	210	u64_stats_update_begin(&txq_stats->syncp);
211	tx_q->txq_stats.tx_normal_irq_n++;	211	txq_stats->tx_normal_irq_n++;
212	u64_stats_update_end(&tx_q->txq_stats.syncp);	212	u64_stats_update_end(&txq_stats->syncp);
213	ret \|= handle_tx;	213	ret \|= handle_tx;
214	}	214	}
215		215

drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c+8−8

@@ -162,8 +162,8 @@ static void show_rx_process_state(unsigned int status) · 161 unmodified lines
162	int dwmac_dma_interrupt(struct stmmac_priv priv, void __iomem ioaddr,	162	int dwmac_dma_interrupt(struct stmmac_priv priv, void __iomem ioaddr,
163	struct stmmac_extra_stats *x, u32 chan, u32 dir)	163	struct stmmac_extra_stats *x, u32 chan, u32 dir)
164	{	164	{
165	struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[chan];	165	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
166	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];	166	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
167	int ret = 0;	167	int ret = 0;
168	/* read the status register (CSR5) */	168	/* read the status register (CSR5) */
169	u32 intr_status = readl(ioaddr + DMA_STATUS);	169	u32 intr_status = readl(ioaddr + DMA_STATUS);
@@ -215,16 +215,16 @@ int dwmac_dma_interrupt(struct stmmac_priv priv, void __iomem ioaddr, · 45 unmodified lines
215	u32 value = readl(ioaddr + DMA_INTR_ENA);	215	u32 value = readl(ioaddr + DMA_INTR_ENA);
216	/* to schedule NAPI on real RIE event. */	216	/* to schedule NAPI on real RIE event. */
217	if (likely(value & DMA_INTR_ENA_RIE)) {	217	if (likely(value & DMA_INTR_ENA_RIE)) {
218	u64_stats_update_begin(&rx_q->rxq_stats.syncp);	218	u64_stats_update_begin(&rxq_stats->syncp);
219	rx_q->rxq_stats.rx_normal_irq_n++;	219	rxq_stats->rx_normal_irq_n++;
220	u64_stats_update_end(&rx_q->rxq_stats.syncp);	220	u64_stats_update_end(&rxq_stats->syncp);
221	ret \|= handle_rx;	221	ret \|= handle_rx;
222	}	222	}
223	}	223	}
224	if (likely(intr_status & DMA_STATUS_TI)) {	224	if (likely(intr_status & DMA_STATUS_TI)) {
225	u64_stats_update_begin(&tx_q->txq_stats.syncp);	225	u64_stats_update_begin(&txq_stats->syncp);
226	tx_q->txq_stats.tx_normal_irq_n++;	226	txq_stats->tx_normal_irq_n++;
227	u64_stats_update_end(&tx_q->txq_stats.syncp);	227	u64_stats_update_end(&txq_stats->syncp);
228	ret \|= handle_tx;	228	ret \|= handle_tx;
229	}	229	}
230	if (unlikely(intr_status & DMA_STATUS_ERI))	230	if (unlikely(intr_status & DMA_STATUS_ERI))

drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c+8−8

@@ -337,8 +337,8 @@ static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv, · 336 unmodified lines
337	struct stmmac_extra_stats *x, u32 chan,	337	struct stmmac_extra_stats *x, u32 chan,
338	u32 dir)	338	u32 dir)
339	{	339	{
340	struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[chan];	340	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[chan];
341	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[chan];	341	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[chan];
342	u32 intr_status = readl(ioaddr + XGMAC_DMA_CH_STATUS(chan));	342	u32 intr_status = readl(ioaddr + XGMAC_DMA_CH_STATUS(chan));
343	u32 intr_en = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan));	343	u32 intr_en = readl(ioaddr + XGMAC_DMA_CH_INT_EN(chan));
344	int ret = 0;	344	int ret = 0;
@@ -367,15 +367,15 @@ static int dwxgmac2_dma_interrupt(struct stmmac_priv *priv, · 22 unmodified lines
367	/* TX/RX NORMAL interrupts */	367	/* TX/RX NORMAL interrupts */
368	if (likely(intr_status & XGMAC_NIS)) {	368	if (likely(intr_status & XGMAC_NIS)) {
369	if (likely(intr_status & XGMAC_RI)) {	369	if (likely(intr_status & XGMAC_RI)) {
370	u64_stats_update_begin(&rx_q->rxq_stats.syncp);	370	u64_stats_update_begin(&rxq_stats->syncp);
371	rx_q->rxq_stats.rx_normal_irq_n++;	371	rxq_stats->rx_normal_irq_n++;
372	u64_stats_update_end(&rx_q->rxq_stats.syncp);	372	u64_stats_update_end(&rxq_stats->syncp);
373	ret \|= handle_rx;	373	ret \|= handle_rx;
374	}	374	}
375	if (likely(intr_status & (XGMAC_TI \| XGMAC_TBU))) {	375	if (likely(intr_status & (XGMAC_TI \| XGMAC_TBU))) {
376	u64_stats_update_begin(&tx_q->txq_stats.syncp);	376	u64_stats_update_begin(&txq_stats->syncp);
377	tx_q->txq_stats.tx_normal_irq_n++;	377	txq_stats->tx_normal_irq_n++;
378	u64_stats_update_end(&tx_q->txq_stats.syncp);	378	u64_stats_update_end(&txq_stats->syncp);
379	ret \|= handle_tx;	379	ret \|= handle_tx;
380	}	380	}
381	}	381	}

drivers/net/ethernet/stmicro/stmmac/stmmac.h+0−2

 	dma_addr_t dma_tx_phy;
 	dma_addr_t tx_tail_addr;
 	u32 mss;
-	struct stmmac_txq_stats txq_stats;
 };
 struct stmmac_rx_buffer {
 		unsigned int len;
 		unsigned int error;
 	} state;
-	struct stmmac_rxq_stats rxq_stats;
 };
 struct stmmac_channel {

drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c+16−16

@@ -548,14 +548,14 @@ static void stmmac_get_per_qstats(struct stmmac_priv priv, u64 data) · 547 unmodified lines
548		548
549	pos = data;	549	pos = data;
550	for (q = 0; q < tx_cnt; q++) {	550	for (q = 0; q < tx_cnt; q++) {
551	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[q];	551	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[q];
552	struct stmmac_txq_stats snapshot;	552	struct stmmac_txq_stats snapshot;
553		553
554	data = pos;	554	data = pos;
555	do {	555	do {
556	start = u64_stats_fetch_begin(&tx_q->txq_stats.syncp);	556	start = u64_stats_fetch_begin(&txq_stats->syncp);
557	snapshot = tx_q->txq_stats;	557	snapshot = *txq_stats;
558	} while (u64_stats_fetch_retry(&tx_q->txq_stats.syncp, start));	558	} while (u64_stats_fetch_retry(&txq_stats->syncp, start));
559		559
560	p = (char *)&snapshot + offsetof(struct stmmac_txq_stats, tx_pkt_n);	560	p = (char *)&snapshot + offsetof(struct stmmac_txq_stats, tx_pkt_n);
561	for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {	561	for (stat = 0; stat < STMMAC_TXQ_STATS; stat++) {
@@ -566,14 +566,14 @@ static void stmmac_get_per_qstats(struct stmmac_priv priv, u64 data) · 4 unmodified lines
566		566
567	pos = data;	567	pos = data;
568	for (q = 0; q < rx_cnt; q++) {	568	for (q = 0; q < rx_cnt; q++) {
569	struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[q];	569	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[q];
570	struct stmmac_rxq_stats snapshot;	570	struct stmmac_rxq_stats snapshot;
571		571
572	data = pos;	572	data = pos;
573	do {	573	do {
574	start = u64_stats_fetch_begin(&rx_q->rxq_stats.syncp);	574	start = u64_stats_fetch_begin(&rxq_stats->syncp);
575	snapshot = rx_q->rxq_stats;	575	snapshot = *rxq_stats;
576	} while (u64_stats_fetch_retry(&rx_q->rxq_stats.syncp, start));	576	} while (u64_stats_fetch_retry(&rxq_stats->syncp, start));
577		577
578	p = (char *)&snapshot + offsetof(struct stmmac_rxq_stats, rx_pkt_n);	578	p = (char *)&snapshot + offsetof(struct stmmac_rxq_stats, rx_pkt_n);
579	for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {	579	for (stat = 0; stat < STMMAC_RXQ_STATS; stat++) {
@@ -637,14 +637,14 @@ static void stmmac_get_ethtool_stats(struct net_device *dev, · 57 unmodified lines
637		637
638	pos = j;	638	pos = j;
639	for (i = 0; i < rx_queues_count; i++) {	639	for (i = 0; i < rx_queues_count; i++) {
640	struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[i];	640	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[i];
641	struct stmmac_rxq_stats snapshot;	641	struct stmmac_rxq_stats snapshot;
642		642
643	j = pos;	643	j = pos;
644	do {	644	do {
645	start = u64_stats_fetch_begin(&rx_q->rxq_stats.syncp);	645	start = u64_stats_fetch_begin(&rxq_stats->syncp);
646	snapshot = rx_q->rxq_stats;	646	snapshot = *rxq_stats;
647	} while (u64_stats_fetch_retry(&rx_q->rxq_stats.syncp, start));	647	} while (u64_stats_fetch_retry(&rxq_stats->syncp, start));
648		648
649	data[j++] += snapshot.rx_pkt_n;	649	data[j++] += snapshot.rx_pkt_n;
650	data[j++] += snapshot.rx_normal_irq_n;	650	data[j++] += snapshot.rx_normal_irq_n;
@@ -654,14 +654,14 @@ static void stmmac_get_ethtool_stats(struct net_device *dev, · 3 unmodified lines
654		654
655	pos = j;	655	pos = j;
656	for (i = 0; i < tx_queues_count; i++) {	656	for (i = 0; i < tx_queues_count; i++) {
657	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[i];	657	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[i];
658	struct stmmac_txq_stats snapshot;	658	struct stmmac_txq_stats snapshot;
659		659
660	j = pos;	660	j = pos;
661	do {	661	do {
662	start = u64_stats_fetch_begin(&tx_q->txq_stats.syncp);	662	start = u64_stats_fetch_begin(&txq_stats->syncp);
663	snapshot = tx_q->txq_stats;	663	snapshot = *txq_stats;
664	} while (u64_stats_fetch_retry(&tx_q->txq_stats.syncp, start));	664	} while (u64_stats_fetch_retry(&txq_stats->syncp, start));
665		665
666	data[j++] += snapshot.tx_pkt_n;	666	data[j++] += snapshot.tx_pkt_n;
667	data[j++] += snapshot.tx_normal_irq_n;	667	data[j++] += snapshot.tx_normal_irq_n;

drivers/net/ethernet/stmicro/stmmac/stmmac_main.c+73−62

 {
 	struct netdev_queue *nq = netdev_get_tx_queue(priv->dev, queue);
 	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
+	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[queue];
 	struct xsk_buff_pool *pool = tx_q->xsk_pool;
 	unsigned int entry = tx_q->cur_tx;
 	struct dma_desc *tx_desc = NULL;
 		tx_q->cur_tx = STMMAC_GET_ENTRY(tx_q->cur_tx, priv->dma_conf.dma_tx_size);
 		entry = tx_q->cur_tx;
 	}
-	flags = u64_stats_update_begin_irqsave(&tx_q->txq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
-	tx_q->txq_stats.tx_set_ic_bit += tx_set_ic_bit;
+	txq_stats->tx_set_ic_bit += tx_set_ic_bit;
-	u64_stats_update_end_irqrestore(&tx_q->txq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
 	if (tx_desc) {
 		stmmac_flush_tx_descriptors(priv, queue);
 static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue)
 {
 	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
+	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[queue];
 	unsigned int bytes_compl = 0, pkts_compl = 0;
 	unsigned int entry, xmits = 0, count = 0;
 	u32 tx_packets = 0, tx_errors = 0;
 	/* We still have pending packets, let's call for a new scheduling */
 	if (tx_q->dirty_tx != tx_q->cur_tx)
-		hrtimer_start(&tx_q->txtimer,
+		stmmac_tx_timer_arm(priv, queue);
-			      STMMAC_COAL_TIMER(priv->tx_coal_timer[queue]),
-			      HRTIMER_MODE_REL);
-	flags = u64_stats_update_begin_irqsave(&tx_q->txq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
-	tx_q->txq_stats.tx_packets += tx_packets;
+	txq_stats->tx_packets += tx_packets;
-	tx_q->txq_stats.tx_pkt_n += tx_packets;
+	txq_stats->tx_pkt_n += tx_packets;
-	tx_q->txq_stats.tx_clean++;
+	txq_stats->tx_clean++;
-	u64_stats_update_end_irqrestore(&tx_q->txq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
 	priv->xstats.tx_errors += tx_errors;
 static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue)
 {
 	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
+	u32 tx_coal_timer = priv->tx_coal_timer[queue];
+	if (!tx_coal_timer)
+		return;
 	hrtimer_start(&tx_q->txtimer,
-		      STMMAC_COAL_TIMER(priv->tx_coal_timer[queue]),
+		      STMMAC_COAL_TIMER(tx_coal_timer),
 		      HRTIMER_MODE_REL);
 }
 	int nfrags = skb_shinfo(skb)->nr_frags;
 	u32 queue = skb_get_queue_mapping(skb);
 	unsigned int first_entry, tx_packets;
+	struct stmmac_txq_stats *txq_stats;
 	int tmp_pay_len = 0, first_tx;
 	struct stmmac_tx_queue *tx_q;
 	bool has_vlan, set_ic;
 	int i;
 	tx_q = &priv->dma_conf.tx_queue[queue];
+	txq_stats = &priv->xstats.txq_stats[queue];
 	first_tx = tx_q->cur_tx;
 	/* Compute header lengths */
 		netif_tx_stop_queue(netdev_get_tx_queue(priv->dev, queue));
 	}
-	flags = u64_stats_update_begin_irqsave(&tx_q->txq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
-	tx_q->txq_stats.tx_bytes += skb->len;
+	txq_stats->tx_bytes += skb->len;
-	tx_q->txq_stats.tx_tso_frames++;
+	txq_stats->tx_tso_frames++;
-	tx_q->txq_stats.tx_tso_nfrags += nfrags;
+	txq_stats->tx_tso_nfrags += nfrags;
 	if (set_ic)
-		tx_q->txq_stats.tx_set_ic_bit++;
+		txq_stats->tx_set_ic_bit++;
-	u64_stats_update_end_irqrestore(&tx_q->txq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
 	if (priv->sarc_type)
 		stmmac_set_desc_sarc(priv, first, priv->sarc_type);
 	u32 queue = skb_get_queue_mapping(skb);
 	int nfrags = skb_shinfo(skb)->nr_frags;
 	int gso = skb_shinfo(skb)->gso_type;
+	struct stmmac_txq_stats *txq_stats;
 	struct dma_edesc *tbs_desc = NULL;
 	struct dma_desc *desc, *first;
 	struct stmmac_tx_queue *tx_q;
 	dma_addr_t des;
 	tx_q = &priv->dma_conf.tx_queue[queue];
+	txq_stats = &priv->xstats.txq_stats[queue];
 	first_tx = tx_q->cur_tx;
 	if (priv->tx_path_in_lpi_mode && priv->eee_sw_timer_en)
 		netif_tx_stop_queue(netdev_get_tx_queue(priv->dev, queue));
 	}
-	flags = u64_stats_update_begin_irqsave(&tx_q->txq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
-	tx_q->txq_stats.tx_bytes += skb->len;
+	txq_stats->tx_bytes += skb->len;
 	if (set_ic)
-		tx_q->txq_stats.tx_set_ic_bit++;
+		txq_stats->tx_set_ic_bit++;
-	u64_stats_update_end_irqrestore(&tx_q->txq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
 	if (priv->sarc_type)
 		stmmac_set_desc_sarc(priv, first, priv->sarc_type);
 static int stmmac_xdp_xmit_xdpf(struct stmmac_priv *priv, int queue,
 				struct xdp_frame *xdpf, bool dma_map)
 {
+	struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[queue];
 	struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue];
 	unsigned int entry = tx_q->cur_tx;
 	struct dma_desc *tx_desc;
 		unsigned long flags;
 		tx_q->tx_count_frames = 0;
 		stmmac_set_tx_ic(priv, tx_desc);
-		flags = u64_stats_update_begin_irqsave(&tx_q->txq_stats.syncp);
+		flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
-		tx_q->txq_stats.tx_set_ic_bit++;
+		txq_stats->tx_set_ic_bit++;
-		u64_stats_update_end_irqrestore(&tx_q->txq_stats.syncp, flags);
+		u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
 	}
 	stmmac_enable_dma_transmission(priv, priv->ioaddr);
 				   struct dma_desc *p, struct dma_desc *np,
 				   struct xdp_buff *xdp)
 {
-	struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
+	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[queue];
 	struct stmmac_channel *ch = &priv->channel[queue];
 	unsigned int len = xdp->data_end - xdp->data;
 	enum pkt_hash_types hash_type;
 	skb_record_rx_queue(skb, queue);
 	napi_gro_receive(&ch->rxtx_napi, skb);
-	flags = u64_stats_update_begin_irqsave(&rx_q->rxq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
-	rx_q->rxq_stats.rx_pkt_n++;
+	rxq_stats->rx_pkt_n++;
-	rx_q->rxq_stats.rx_bytes += len;
+	rxq_stats->rx_bytes += len;
-	u64_stats_update_end_irqrestore(&rx_q->rxq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
 }
 static bool stmmac_rx_refill_zc(struct stmmac_priv *priv, u32 queue, u32 budget)
 static int stmmac_rx_zc(struct stmmac_priv *priv, int limit, u32 queue)
 {
+	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[queue];
 	struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
 	unsigned int count = 0, error = 0, len = 0;
 	int dirty = stmmac_rx_dirty(priv, queue);
 	stmmac_finalize_xdp_rx(priv, xdp_status);
-	flags = u64_stats_update_begin_irqsave(&rx_q->rxq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
-	rx_q->rxq_stats.rx_pkt_n += count;
+	rxq_stats->rx_pkt_n += count;
-	u64_stats_update_end_irqrestore(&rx_q->rxq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
 	priv->xstats.rx_dropped += rx_dropped;
 	priv->xstats.rx_errors += rx_errors;
 static int stmmac_rx(struct stmmac_priv *priv, int limit, u32 queue)
 {
 	u32 rx_errors = 0, rx_dropped = 0, rx_bytes = 0, rx_packets = 0;
+	struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[queue];
 	struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
 	struct stmmac_channel *ch = &priv->channel[queue];
 	unsigned int count = 0, error = 0, len = 0;
 	stmmac_rx_refill(priv, queue);
-	flags = u64_stats_update_begin_irqsave(&rx_q->rxq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
-	rx_q->rxq_stats.rx_packets += rx_packets;
+	rxq_stats->rx_packets += rx_packets;
-	rx_q->rxq_stats.rx_bytes += rx_bytes;
+	rxq_stats->rx_bytes += rx_bytes;
-	rx_q->rxq_stats.rx_pkt_n += count;
+	rxq_stats->rx_pkt_n += count;
-	u64_stats_update_end_irqrestore(&rx_q->rxq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
 	priv->xstats.rx_dropped += rx_dropped;
 	priv->xstats.rx_errors += rx_errors;
 	struct stmmac_channel *ch =
 		container_of(napi, struct stmmac_channel, rx_napi);
 	struct stmmac_priv *priv = ch->priv_data;
-	struct stmmac_rx_queue *rx_q;
+	struct stmmac_rxq_stats *rxq_stats;
 	u32 chan = ch->index;
 	unsigned long flags;
 	int work_done;
-	rx_q = &priv->dma_conf.rx_queue[chan];
+	rxq_stats = &priv->xstats.rxq_stats[chan];
-	flags = u64_stats_update_begin_irqsave(&rx_q->rxq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
-	rx_q->rxq_stats.napi_poll++;
+	rxq_stats->napi_poll++;
-	u64_stats_update_end_irqrestore(&rx_q->rxq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
 	work_done = stmmac_rx(priv, budget, chan);
 	if (work_done < budget && napi_complete_done(napi, work_done)) {
 	struct stmmac_channel *ch =
 		container_of(napi, struct stmmac_channel, tx_napi);
 	struct stmmac_priv *priv = ch->priv_data;
-	struct stmmac_tx_queue *tx_q;
+	struct stmmac_txq_stats *txq_stats;
 	u32 chan = ch->index;
 	unsigned long flags;
 	int work_done;
-	tx_q = &priv->dma_conf.tx_queue[chan];
+	txq_stats = &priv->xstats.txq_stats[chan];
-	flags = u64_stats_update_begin_irqsave(&tx_q->txq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
-	tx_q->txq_stats.napi_poll++;
+	txq_stats->napi_poll++;
-	u64_stats_update_end_irqrestore(&tx_q->txq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
 	work_done = stmmac_tx_clean(priv, budget, chan);
 	work_done = min(work_done, budget);
 		container_of(napi, struct stmmac_channel, rxtx_napi);
 	struct stmmac_priv *priv = ch->priv_data;
 	int rx_done, tx_done, rxtx_done;
-	struct stmmac_rx_queue *rx_q;
+	struct stmmac_rxq_stats *rxq_stats;
-	struct stmmac_tx_queue *tx_q;
+	struct stmmac_txq_stats *txq_stats;
 	u32 chan = ch->index;
 	unsigned long flags;
-	rx_q = &priv->dma_conf.rx_queue[chan];
+	rxq_stats = &priv->xstats.rxq_stats[chan];
-	flags = u64_stats_update_begin_irqsave(&rx_q->rxq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&rxq_stats->syncp);
-	rx_q->rxq_stats.napi_poll++;
+	rxq_stats->napi_poll++;
-	u64_stats_update_end_irqrestore(&rx_q->rxq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&rxq_stats->syncp, flags);
-	tx_q = &priv->dma_conf.tx_queue[chan];
+	txq_stats = &priv->xstats.txq_stats[chan];
-	flags = u64_stats_update_begin_irqsave(&tx_q->txq_stats.syncp);
+	flags = u64_stats_update_begin_irqsave(&txq_stats->syncp);
-	tx_q->txq_stats.napi_poll++;
+	txq_stats->napi_poll++;
-	u64_stats_update_end_irqrestore(&tx_q->txq_stats.syncp, flags);
+	u64_stats_update_end_irqrestore(&txq_stats->syncp, flags);
 	tx_done = stmmac_tx_clean(priv, budget, chan);
 	tx_done = min(tx_done, budget);
 	int q;
 	for (q = 0; q < tx_cnt; q++) {
-		struct stmmac_txq_stats *txq_stats = &priv->dma_conf.tx_queue[q].txq_stats;
+		struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[q];
 		u64 tx_packets;
 		u64 tx_bytes;
 	}
 	for (q = 0; q < rx_cnt; q++) {
-		struct stmmac_rxq_stats *rxq_stats = &priv->dma_conf.rx_queue[q].rxq_stats;
+		struct stmmac_rxq_stats *rxq_stats = &priv->xstats.rxq_stats[q];
 		u64 rx_packets;
 		u64 rx_bytes;
 	priv->dev = ndev;
 	for (i = 0; i < MTL_MAX_RX_QUEUES; i++)
-		u64_stats_init(&priv->dma_conf.rx_queue[i].rxq_stats.syncp);
+		u64_stats_init(&priv->xstats.rxq_stats[i].syncp);
 	for (i = 0; i < MTL_MAX_TX_QUEUES; i++)
-		u64_stats_init(&priv->dma_conf.tx_queue[i].txq_stats.syncp);
+		u64_stats_init(&priv->xstats.txq_stats[i].syncp);
 	stmmac_set_ethtool_ops(ndev);
 	priv->pause = pause;

drivers/net/ethernet/ti/Kconfig+1−0

@@ -199,6 +199,7 @@ config TI_ICSSG_PRUETH · 198 unmodified lines
199		199
200	config TI_ICSS_IEP	200	config TI_ICSS_IEP
201	tristate "TI PRU ICSS IEP driver"	201	tristate "TI PRU ICSS IEP driver"
		202	depends on PTP_1588_CLOCK_OPTIONAL
202	depends on TI_PRUSS	203	depends on TI_PRUSS
203	default TI_PRUSS	204	default TI_PRUSS
204	help	205	help

drivers/net/team/team.c+9−1

 static void team_setup_by_port(struct net_device *dev,
 			       struct net_device *port_dev)
 {
-	dev->header_ops	= port_dev->header_ops;
+	struct team *team = netdev_priv(dev);
+	if (port_dev->type == ARPHRD_ETHER)
+		dev->header_ops	= team->header_ops_cache;
+	else
+		dev->header_ops	= port_dev->header_ops;
 	dev->type = port_dev->type;
 	dev->hard_header_len = port_dev->hard_header_len;
 	dev->needed_headroom = port_dev->needed_headroom;
 static void team_setup(struct net_device *dev)
 {
+	struct team *team = netdev_priv(dev);
 	ether_setup(dev);
 	dev->max_mtu = ETH_MAX_MTU;
+	team->header_ops_cache = dev->header_ops;
 	dev->netdev_ops = &team_netdev_ops;
 	dev->ethtool_ops = &team_ethtool_ops;

drivers/net/thunderbolt/main.c+1−2

 		*tucso = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
 					    ip_hdr(skb)->daddr, 0,
 					    ip_hdr(skb)->protocol, 0);
-	} else if (skb_is_gso_v6(skb)) {
+	} else if (skb_is_gso(skb) && skb_is_gso_v6(skb)) {
 		tucso = dest + ((void *)&(tcp_hdr(skb)->check) - data);
 		*tucso = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
 					  &ipv6_hdr(skb)->daddr, 0,
 					  IPPROTO_TCP, 0);
-		return false;
 	} else if (protocol == htons(ETH_P_IPV6)) {
 		tucso = dest + skb_checksum_start_offset(skb) + skb->csum_offset;
 		*tucso = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,

drivers/net/usb/r8152.c+3−0

@@ -2636,6 +2636,9 @@ static int r8152_poll(struct napi_struct *napi, int budget) · 2635 unmodified lines
2636	struct r8152 *tp = container_of(napi, struct r8152, napi);	2636	struct r8152 *tp = container_of(napi, struct r8152, napi);
2637	int work_done;	2637	int work_done;
2638		2638
		2639	if (!budget)
		2640	return 0;
		2641
2639	work_done = rx_bottom(tp, budget);	2642	work_done = rx_bottom(tp, budget);
2640		2643
2641	if (work_done < budget) {	2644	if (work_done < budget) {

drivers/net/veth.c+2−0

@@ -1446,6 +1446,8 @@ static int veth_open(struct net_device *dev) · 1445 unmodified lines
1446	netif_carrier_on(peer);	1446	netif_carrier_on(peer);
1447	}	1447	}
1448		1448
		1449	veth_set_xdp_features(dev);
		1450
1449	return 0;	1451	return 0;
1450	}	1452	}
1451		1453

drivers/net/vxlan/vxlan_core.c+4−0

 		nla_total_size(sizeof(__u8)) + /* IFLA_VXLAN_REMCSUM_TX */
 		nla_total_size(sizeof(__u8)) + /* IFLA_VXLAN_REMCSUM_RX */
 		nla_total_size(sizeof(__u8)) + /* IFLA_VXLAN_LOCALBYPASS */
+		nla_total_size(0) + /* IFLA_VXLAN_GBP */
+		nla_total_size(0) + /* IFLA_VXLAN_GPE */
+		nla_total_size(0) + /* IFLA_VXLAN_REMCSUM_NOPARTIAL */
+		nla_total_size(sizeof(__u8)) + /* IFLA_VXLAN_VNIFILTER */
 		0;
 }

drivers/nvme/host/core.c+35−19

@@ -2245,25 +2245,8 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl) · 2244 unmodified lines
2245	else	2245	else
2246	ctrl->ctrl_config = NVME_CC_CSS_NVM;	2246	ctrl->ctrl_config = NVME_CC_CSS_NVM;
2247		2247
2248	if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {	2248	if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS)
2249	u32 crto;	2249	ctrl->ctrl_config \|= NVME_CC_CRIME;
2250
2251	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2252	if (ret) {
2253	dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2254	ret);
2255	return ret;
2256	}
2257
2258	if (ctrl->cap & NVME_CAP_CRMS_CRIMS) {
2259	ctrl->ctrl_config \|= NVME_CC_CRIME;
2260	timeout = NVME_CRTO_CRIMT(crto);
2261	} else {
2262	timeout = NVME_CRTO_CRWMT(crto);
2263	}
2264	} else {
2265	timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2266	}
2267		2250
2268	ctrl->ctrl_config \|= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;	2251	ctrl->ctrl_config \|= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2269	ctrl->ctrl_config \|= NVME_CC_AMS_RR \| NVME_CC_SHN_NONE;	2252	ctrl->ctrl_config \|= NVME_CC_AMS_RR \| NVME_CC_SHN_NONE;
@@ -2277,6 +2260,39 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl) · 7 unmodified lines
2277	if (ret)	2260	if (ret)
2278	return ret;	2261	return ret;
2279		2262
		2263	/* CAP value may change after initial CC write */
		2264	ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
		2265	if (ret)
		2266	return ret;
		2267
		2268	timeout = NVME_CAP_TIMEOUT(ctrl->cap);
		2269	if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
		2270	u32 crto, ready_timeout;
		2271
		2272	ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
		2273	if (ret) {
		2274	dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
		2275	ret);
		2276	return ret;
		2277	}
		2278
		2279	/*
		2280	* CRTO should always be greater or equal to CAP.TO, but some
		2281	* devices are known to get this wrong. Use the larger of the
		2282	* two values.
		2283	*/
		2284	if (ctrl->ctrl_config & NVME_CC_CRIME)
		2285	ready_timeout = NVME_CRTO_CRIMT(crto);
		2286	else
		2287	ready_timeout = NVME_CRTO_CRWMT(crto);
		2288
		2289	if (ready_timeout < timeout)
		2290	dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
		2291	crto, ctrl->cap);
		2292	else
		2293	timeout = ready_timeout;
		2294	}
		2295
2280	ctrl->ctrl_config \|= NVME_CC_ENABLE;	2296	ctrl->ctrl_config \|= NVME_CC_ENABLE;
2281	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);	2297	ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2282	if (ret)	2298	if (ret)

drivers/nvme/host/fc.c+1−1

@@ -1924,7 +1924,7 @@ char nvme_fc_io_getuuid(struct nvmefc_fcp_req req) · 1923 unmodified lines
1924	struct nvme_fc_fcp_op *op = fcp_req_to_fcp_op(req);	1924	struct nvme_fc_fcp_op *op = fcp_req_to_fcp_op(req);
1925	struct request *rq = op->rq;	1925	struct request *rq = op->rq;
1926		1926
1927	if (!IS_ENABLED(CONFIG_BLK_CGROUP_FC_APPID) \|\| !rq->bio)	1927	if (!IS_ENABLED(CONFIG_BLK_CGROUP_FC_APPID) \|\| !rq \|\| !rq->bio)
1928	return NULL;	1928	return NULL;
1929	return blkcg_get_fc_appid(rq->bio);	1929	return blkcg_get_fc_appid(rq->bio);
1930	}	1930	}

drivers/nvme/host/hwmon.c+1−1

@@ -187,7 +187,7 @@ static umode_t nvme_hwmon_is_visible(const void *_data, · 186 unmodified lines
187	return 0;	187	return 0;
188	}	188	}
189		189
190	static const struct hwmon_channel_info *nvme_hwmon_info[] = {	190	static const struct hwmon_channel_info *const nvme_hwmon_info[] = {
191	HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),	191	HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
192	HWMON_CHANNEL_INFO(temp,	192	HWMON_CHANNEL_INFO(temp,
193	HWMON_T_INPUT \| HWMON_T_MAX \| HWMON_T_MIN \|	193	HWMON_T_INPUT \| HWMON_T_MAX \| HWMON_T_MIN \|

drivers/nvme/host/pci.c+0−3

@@ -2916,9 +2916,6 @@ static struct nvme_dev nvme_pci_alloc_dev(struct pci_dev pdev, · 2915 unmodified lines
2916	struct nvme_dev *dev;	2916	struct nvme_dev *dev;
2917	int ret = -ENOMEM;	2917	int ret = -ENOMEM;
2918		2918
2919	if (node == NUMA_NO_NODE)
2920	set_dev_node(&pdev->dev, first_memory_node);
2921
2922	dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);	2919	dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
2923	if (!dev)	2920	if (!dev)
2924	return ERR_PTR(-ENOMEM);	2921	return ERR_PTR(-ENOMEM);

drivers/nvme/target/tcp.c+1−1

@@ -348,7 +348,7 @@ static void nvmet_tcp_build_pdu_iovec(struct nvmet_tcp_cmd *cmd) · 347 unmodified lines
348	while (length) {	348	while (length) {
349	u32 iov_len = min_t(u32, length, sg->length - sg_offset);	349	u32 iov_len = min_t(u32, length, sg->length - sg_offset);
350		350
351	bvec_set_page(iov, sg_page(sg), sg->length,	351	bvec_set_page(iov, sg_page(sg), iov_len,
352	sg->offset + sg_offset);	352	sg->offset + sg_offset);
353		353
354	length -= iov_len;	354	length -= iov_len;

drivers/parisc/ccio-dma.c+9−9

@@ -214,7 +214,7 @@ struct ioa_registers { · 213 unmodified lines
214	struct ioc {	214	struct ioc {
215	struct ioa_registers __iomem ioc_regs; / I/O MMU base address */	215	struct ioa_registers __iomem ioc_regs; / I/O MMU base address */
216	u8 res_map; / resource map, bit == pdir entry */	216	u8 res_map; / resource map, bit == pdir entry */
217	u64 pdir_base; / physical base address */	217	__le64 pdir_base; / physical base address */
218	u32 pdir_size; /* bytes, function of IOV Space size */	218	u32 pdir_size; /* bytes, function of IOV Space size */
219	u32 res_hint; /* next available IOVP -	219	u32 res_hint; /* next available IOVP -
220	circular search */	220	circular search */
@@ -339,7 +339,7 @@ ccio_alloc_range(struct ioc ioc, struct device dev, size_t size) · 118 unmodified lines
339	BUG_ON(pages_needed == 0);	339	BUG_ON(pages_needed == 0);
340	BUG_ON((pages_needed * IOVP_SIZE) > DMA_CHUNK_SIZE);	340	BUG_ON((pages_needed * IOVP_SIZE) > DMA_CHUNK_SIZE);
341		341
342	DBG_RES("%s() size: %d pages_needed %d\n",	342	DBG_RES("%s() size: %zu pages_needed %d\n",
343	__func__, size, pages_needed);	343	__func__, size, pages_needed);
344		344
345	/*	345	/*
@@ -427,7 +427,7 @@ ccio_free_range(struct ioc *ioc, dma_addr_t iova, unsigned long pages_mapped) · 81 unmodified lines
427	BUG_ON((pages_mapped * IOVP_SIZE) > DMA_CHUNK_SIZE);	427	BUG_ON((pages_mapped * IOVP_SIZE) > DMA_CHUNK_SIZE);
428	BUG_ON(pages_mapped > BITS_PER_LONG);	428	BUG_ON(pages_mapped > BITS_PER_LONG);
429		429
430	DBG_RES("%s(): res_idx: %d pages_mapped %d\n",	430	DBG_RES("%s(): res_idx: %d pages_mapped %lu\n",
431	__func__, res_idx, pages_mapped);	431	__func__, res_idx, pages_mapped);
432		432
433	#ifdef CCIO_COLLECT_STATS	433	#ifdef CCIO_COLLECT_STATS
@@ -543,7 +543,7 @@ static u32 hint_lookup[] = { · 109 unmodified lines
543	* index are bits 12:19 of the value returned by LCI.	543	* index are bits 12:19 of the value returned by LCI.
544	*/	544	*/
545	static void	545	static void
546	ccio_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba,	546	ccio_io_pdir_entry(__le64 *pdir_ptr, space_t sid, unsigned long vba,
547	unsigned long hints)	547	unsigned long hints)
548	{	548	{
549	register unsigned long pa;	549	register unsigned long pa;
@@ -719,7 +719,7 @@ ccio_map_single(struct device dev, void addr, size_t size, · 169 unmodified lines
719	unsigned long flags;	719	unsigned long flags;
720	dma_addr_t iovp;	720	dma_addr_t iovp;
721	dma_addr_t offset;	721	dma_addr_t offset;
722	u64 *pdir_start;	722	__le64 *pdir_start;
723	unsigned long hint = hint_lookup[(int)direction];	723	unsigned long hint = hint_lookup[(int)direction];
724		724
725	BUG_ON(!dev);	725	BUG_ON(!dev);
@@ -746,8 +746,8 @@ ccio_map_single(struct device dev, void addr, size_t size, · 20 unmodified lines
746		746
747	pdir_start = &(ioc->pdir_base[idx]);	747	pdir_start = &(ioc->pdir_base[idx]);
748		748
749	DBG_RUN("%s() 0x%p -> 0x%lx size: %0x%x\n",	749	DBG_RUN("%s() %px -> %#lx size: %zu\n",
750	__func__, addr, (long)iovp \| offset, size);	750	__func__, addr, (long)(iovp \| offset), size);
751		751
752	/* If not cacheline aligned, force SAFE_DMA on the whole mess */	752	/* If not cacheline aligned, force SAFE_DMA on the whole mess */
753	if((size % L1_CACHE_BYTES) \|\| ((unsigned long)addr % L1_CACHE_BYTES))	753	if((size % L1_CACHE_BYTES) \|\| ((unsigned long)addr % L1_CACHE_BYTES))
@@ -805,7 +805,7 @@ ccio_unmap_page(struct device *dev, dma_addr_t iova, size_t size, · 51 unmodified lines
805	return;	805	return;
806	}	806	}
807		807
808	DBG_RUN("%s() iovp 0x%lx/%x\n",	808	DBG_RUN("%s() iovp %#lx/%zx\n",
809	__func__, (long)iova, size);	809	__func__, (long)iova, size);
810		810
811	iova ^= offset; /* clear offset bits */	811	iova ^= offset; /* clear offset bits */
@@ -1283,7 +1283,7 @@ ccio_ioc_init(struct ioc *ioc) · 471 unmodified lines
1283	iova_space_size>>20,	1283	iova_space_size>>20,
1284	iov_order + PAGE_SHIFT);	1284	iov_order + PAGE_SHIFT);
1285		1285
1286	ioc->pdir_base = (u64 *)__get_free_pages(GFP_KERNEL,	1286	ioc->pdir_base = (__le64 *)__get_free_pages(GFP_KERNEL,
1287	get_order(ioc->pdir_size));	1287	get_order(ioc->pdir_size));
1288	if(NULL == ioc->pdir_base) {	1288	if(NULL == ioc->pdir_base) {
1289	panic("%s() could not allocate I/O Page Table\n", __func__);	1289	panic("%s() could not allocate I/O Page Table\n", __func__);

drivers/parisc/iommu-helpers.h+4−4

@@ -14,13 +14,13 @@ · 13 unmodified lines
14	static inline unsigned int	14	static inline unsigned int
15	iommu_fill_pdir(struct ioc ioc, struct scatterlist startsg, int nents,	15	iommu_fill_pdir(struct ioc ioc, struct scatterlist startsg, int nents,
16	unsigned long hint,	16	unsigned long hint,
17	void (iommu_io_pdir_entry)(u64 , space_t, unsigned long,	17	void (iommu_io_pdir_entry)(__le64 , space_t, unsigned long,
18	unsigned long))	18	unsigned long))
19	{	19	{
20	struct scatterlist dma_sg = startsg; / pointer to current DMA */	20	struct scatterlist dma_sg = startsg; / pointer to current DMA */
21	unsigned int n_mappings = 0;	21	unsigned int n_mappings = 0;
22	unsigned long dma_offset = 0, dma_len = 0;	22	unsigned long dma_offset = 0, dma_len = 0;
23	u64 *pdirp = NULL;	23	__le64 *pdirp = NULL;
24		24
25	/* Horrible hack. For efficiency's sake, dma_sg starts one	25	/* Horrible hack. For efficiency's sake, dma_sg starts one
26	* entry below the true start (it is immediately incremented	26	* entry below the true start (it is immediately incremented
@@ -31,8 +31,8 @@ iommu_fill_pdir(struct ioc ioc, struct scatterlist startsg, int nents, · 4 unmodified lines
31	unsigned long vaddr;	31	unsigned long vaddr;
32	long size;	32	long size;
33		33
34	DBG_RUN_SG(" %d : %08lx/%05x %p/%05x\n", nents,	34	DBG_RUN_SG(" %d : %08lx %p/%05x\n", nents,
35	(unsigned long)sg_dma_address(startsg), cnt,	35	(unsigned long)sg_dma_address(startsg),
36	sg_virt(startsg), startsg->length	36	sg_virt(startsg), startsg->length
37	);	37	);
38		38

drivers/parisc/iosapic.c+2−2

@@ -202,9 +202,9 @@ static inline void iosapic_write(void __iomem *iosapic, unsigned int reg, u32 va · 201 unmodified lines
202		202
203	static DEFINE_SPINLOCK(iosapic_lock);	203	static DEFINE_SPINLOCK(iosapic_lock);
204		204
205	static inline void iosapic_eoi(void __iomem *addr, unsigned int data)	205	static inline void iosapic_eoi(__le32 __iomem *addr, __le32 data)
206	{	206	{
207	__raw_writel(data, addr);	207	__raw_writel((__force u32)data, addr);
208	}	208	}
209		209
210	/*	210	/*

drivers/parisc/iosapic_private.h+2−2

@@ -118,8 +118,8 @@ struct iosapic_irt { · 117 unmodified lines
118	struct vector_info {	118	struct vector_info {
119	struct iosapic_info iosapic; / I/O SAPIC this vector is on */	119	struct iosapic_info iosapic; / I/O SAPIC this vector is on */
120	struct irt_entry irte; / IRT entry */	120	struct irt_entry irte; / IRT entry */
121	u32 __iomem eoi_addr; / precalculate EOI reg address */	121	__le32 __iomem eoi_addr; / precalculate EOI reg address */
122	u32 eoi_data; /* IA64: ? PA: swapped txn_data */	122	__le32 eoi_data; /* IA64: ? PA: swapped txn_data */
123	int txn_irq; /* virtual IRQ number for processor */	123	int txn_irq; /* virtual IRQ number for processor */
124	ulong txn_addr; /* IA64: id_eid PA: partial HPA */	124	ulong txn_addr; /* IA64: id_eid PA: partial HPA */
125	u32 txn_data; /* CPU interrupt bit */	125	u32 txn_data; /* CPU interrupt bit */

drivers/parisc/sba_iommu.c+16−22

 #include <linux/module.h>
 #include <asm/ropes.h>
-#include <asm/mckinley.h>	/* for proc_mckinley_root */
-#include <asm/runway.h>		/* for proc_runway_root */
 #include <asm/page.h>		/* for PAGE0 */
 #include <asm/pdc.h>		/* for PDC_MODEL_* */
 #include <asm/pdcpat.h>		/* for is_pdc_pat() */
 #endif
 static struct proc_dir_entry *proc_runway_root __ro_after_init;
-struct proc_dir_entry *proc_mckinley_root __ro_after_init;
+static struct proc_dir_entry *proc_mckinley_root __ro_after_init;
 /************************************
 ** SBA register read and write support
 sba_dump_pdir_entry(struct ioc *ioc, char *msg, uint pide)
 {
 	/* start printing from lowest pde in rval */
-	u64 *ptr = &(ioc->pdir_base[pide & (~0U * BITS_PER_LONG)]);
+	__le64 *ptr = &(ioc->pdir_base[pide & (~0U * BITS_PER_LONG)]);
 	unsigned long *rptr = (unsigned long *) &(ioc->res_map[(pide >>3) & ~(sizeof(unsigned long) - 1)]);
 	uint rcnt;
  */
 static void
-sba_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba,
+sba_io_pdir_entry(__le64 *pdir_ptr, space_t sid, unsigned long vba,
 		  unsigned long hint)
 {
 	u64 pa; /* physical address */
 sba_mark_invalid(struct ioc *ioc, dma_addr_t iova, size_t byte_cnt)
 {
 	u32 iovp = (u32) SBA_IOVP(ioc,iova);
-	u64 *pdir_ptr = &ioc->pdir_base[PDIR_INDEX(iovp)];
+	__le64 *pdir_ptr = &ioc->pdir_base[PDIR_INDEX(iovp)];
 #ifdef ASSERT_PDIR_SANITY
 	/* Assert first pdir entry is set.
 	unsigned long flags;
 	dma_addr_t iovp;
 	dma_addr_t offset;
-	u64 *pdir_start;
+	__le64 *pdir_start;
 	int pide;
 	ioc = GET_IOC(dev);
 	ioc->pdir_size = pdir_size = (iova_space_size/IOVP_SIZE) * sizeof(u64);
-	DBG_INIT("%s() hpa 0x%lx mem %ldMB IOV %dMB (%d bits)\n",
+	DBG_INIT("%s() hpa %px mem %ldMB IOV %dMB (%d bits)\n",
 			__func__,
 			ioc->ioc_hpa,
 			(unsigned long) totalram_pages() >> (20 - PAGE_SHIFT),
 	ioc->iovp_mask = ~(iova_space_mask + PAGE_SIZE - 1);
 #endif
-	DBG_INIT("%s() IOV base 0x%lx mask 0x%0lx\n",
+	DBG_INIT("%s() IOV base %#lx mask %#0lx\n",
 		__func__, ioc->ibase, ioc->imask);
 	/*
 	if (!IS_PLUTO(sba_dev->dev)) {
 		ioc_ctl = READ_REG(sba_dev->sba_hpa+IOC_CTRL);
-		DBG_INIT("%s() hpa 0x%lx ioc_ctl 0x%Lx ->",
+		DBG_INIT("%s() hpa %px ioc_ctl 0x%Lx ->",
 			__func__, sba_dev->sba_hpa, ioc_ctl);
 		ioc_ctl &= ~(IOC_CTRL_RM | IOC_CTRL_NC | IOC_CTRL_CE);
 		ioc_ctl |= IOC_CTRL_DD | IOC_CTRL_D4 | IOC_CTRL_TC;
 		/* flush out the last writes */
 		READ_REG(sba_dev->ioc[i].ioc_hpa + ROPE7_CTL);
-		DBG_INIT("	ioc[%d] ROPE_CFG 0x%Lx  ROPE_DBG 0x%Lx\n",
+		DBG_INIT("	ioc[%d] ROPE_CFG %#lx  ROPE_DBG %lx\n",
 				i,
-				READ_REG(sba_dev->ioc[i].ioc_hpa + 0x40),
+				(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x40),
-				READ_REG(sba_dev->ioc[i].ioc_hpa + 0x50)
+				(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x50)
 			);
-		DBG_INIT("	STATUS_CONTROL 0x%Lx  FLUSH_CTRL 0x%Lx\n",
+		DBG_INIT("	STATUS_CONTROL %#lx  FLUSH_CTRL %#lx\n",
-				READ_REG(sba_dev->ioc[i].ioc_hpa + 0x108),
+				(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x108),
-				READ_REG(sba_dev->ioc[i].ioc_hpa + 0x400)
+				(unsigned long) READ_REG(sba_dev->ioc[i].ioc_hpa + 0x400)
 			);
 		if (IS_PLUTO(sba_dev->dev)) {
 #ifdef ASSERT_PDIR_SANITY
 		/* Mark first bit busy - ie no IOVA 0 */
 		sba_dev->ioc[i].res_map[0] = 0x80;
-		sba_dev->ioc[i].pdir_base[0] = 0xeeffc0addbba0080ULL;
+		sba_dev->ioc[i].pdir_base[0] = (__force __le64) 0xeeffc0addbba0080ULL;
 #endif
 		/* Third (and last) part of PIRANHA BUG */
 	int i;
 	char *version;
 	void __iomem *sba_addr = ioremap(dev->hpa.start, SBA_FUNC_SIZE);
-#ifdef CONFIG_PROC_FS
+	struct proc_dir_entry *root __maybe_unused;
-	struct proc_dir_entry *root;
-#endif
 	sba_dump_ranges(sba_addr);
 	hppa_dma_ops = &sba_ops;
-#ifdef CONFIG_PROC_FS
 	switch (dev->id.hversion) {
 	case PLUTO_MCKINLEY_PORT:
 		if (!proc_mckinley_root)
 	proc_create_single("sba_iommu", 0, root, sba_proc_info);
 	proc_create_single("sba_iommu-bitmap", 0, root, sba_proc_bitmap_info);
-#endif
 	return 0;
 }

drivers/pci/pcie/aer.c+1−0

@@ -229,6 +229,7 @@ int pcie_aer_is_native(struct pci_dev *dev) · 228 unmodified lines
229		229
230	return pcie_ports_native \|\| host->native_aer;	230	return pcie_ports_native \|\| host->native_aer;
231	}	231	}
		232	EXPORT_SYMBOL_NS_GPL(pcie_aer_is_native, CXL);
232		233
233	static int pci_enable_pcie_error_reporting(struct pci_dev *dev)	234	static int pci_enable_pcie_error_reporting(struct pci_dev *dev)
234	{	235	{

drivers/pci/pcie/portdrv.h+0−2

 #ifdef CONFIG_PCIEAER
 int pcie_aer_init(void);
-int pcie_aer_is_native(struct pci_dev *dev);
 #else
 static inline int pcie_aer_init(void) { return 0; }
-static inline int pcie_aer_is_native(struct pci_dev *dev) { return 0; }
 #endif
 #ifdef CONFIG_HOTPLUG_PCI_PCIE

drivers/platform/mellanox/Kconfig+3−2

 	tristate "Mellanox BlueField Firmware Boot Control driver"
 	depends on ARM64
 	depends on ACPI
+	depends on NET
 	help
 	  The Mellanox BlueField firmware implements functionality to
 	  request swapping the primary and alternate eMMC boot partition,
 config NVSW_SN2201
 	tristate "Nvidia SN2201 platform driver support"
-	depends on HWMON
+	depends on HWMON && I2C
-	depends on I2C
+	depends on ACPI || COMPILE_TEST
 	select REGMAP_I2C
 	help
 	  This driver provides support for the Nvidia SN2201 platform.

drivers/platform/mellanox/mlxbf-pmc.c+14−27

 };
 static const struct mlxbf_pmc_events mlxbf_pmc_trio_events_1[] = {
+	{ 0x0, "DISABLE" },
 	{ 0xa0, "TPIO_DATA_BEAT" },
 	{ 0xa1, "TDMA_DATA_BEAT" },
 	{ 0xa2, "MAP_DATA_BEAT" },
 };
 static const struct mlxbf_pmc_events mlxbf_pmc_trio_events_2[] = {
+	{ 0x0, "DISABLE" },
 	{ 0xa0, "TPIO_DATA_BEAT" },
 	{ 0xa1, "TDMA_DATA_BEAT" },
 	{ 0xa2, "MAP_DATA_BEAT" },
 };
 static const struct mlxbf_pmc_events mlxbf_pmc_ecc_events[] = {
+	{ 0x0, "DISABLE" },
 	{ 0x100, "ECC_SINGLE_ERROR_CNT" },
 	{ 0x104, "ECC_DOUBLE_ERROR_CNT" },
 	{ 0x114, "SERR_INJ" },
 };
 static const struct mlxbf_pmc_events mlxbf_pmc_mss_events[] = {
+	{ 0x0, "DISABLE" },
 	{ 0xc0, "RXREQ_MSS" },
 	{ 0xc1, "RXDAT_MSS" },
 	{ 0xc2, "TXRSP_MSS" },
 };
 static const struct mlxbf_pmc_events mlxbf_pmc_hnf_events[] = {
+	{ 0x0, "DISABLE" },
 	{ 0x45, "HNF_REQUESTS" },
 	{ 0x46, "HNF_REJECTS" },
 	{ 0x47, "ALL_BUSY" },
 };
 static const struct mlxbf_pmc_events mlxbf_pmc_hnfnet_events[] = {
+	{ 0x0, "DISABLE" },
 	{ 0x12, "CDN_REQ" },
 	{ 0x13, "DDN_REQ" },
 	{ 0x14, "NDN_REQ" },
 				uint64_t *result)
 {
 	uint32_t perfcfg_offset, perfval_offset;
-	uint64_t perfmon_cfg, perfevt, perfctl;
+	uint64_t perfmon_cfg, perfevt;
 	if (cnt_num >= pmc->block[blk_num].counters)
 		return -EINVAL;
 	perfval_offset = perfcfg_offset +
 			 pmc->block[blk_num].counters * MLXBF_PMC_REG_SIZE;
-	/* Set counter in "read" mode */
-	perfmon_cfg = FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_ADDR,
-				 MLXBF_PMC_PERFCTL);
-	perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_STROBE, 1);
-	perfmon_cfg |= FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_WR_R_B, 0);
-	if (mlxbf_pmc_write(pmc->block[blk_num].mmio_base + perfcfg_offset,
-			    MLXBF_PMC_WRITE_REG_64, perfmon_cfg))
-		return -EFAULT;
-	/* Check if the counter is enabled */
-	if (mlxbf_pmc_read(pmc->block[blk_num].mmio_base + perfval_offset,
-			   MLXBF_PMC_READ_REG_64, &perfctl))
-		return -EFAULT;
-	if (!FIELD_GET(MLXBF_PMC_PERFCTL_EN0, perfctl))
-		return -EINVAL;
 	/* Set counter in "read" mode */
 	perfmon_cfg = FIELD_PREP(MLXBF_PMC_PERFMON_CONFIG_ADDR,
 				 MLXBF_PMC_PERFEVT);
 	} else
 		return -EINVAL;
-	return sprintf(buf, "0x%llx\n", value);
+	return sysfs_emit(buf, "0x%llx\n", value);
 }
 /* Store function for "counter" sysfs files */
 	err = mlxbf_pmc_read_event(blk_num, cnt_num, is_l3, &evt_num);
 	if (err)
-		return sprintf(buf, "No event being monitored\n");
+		return sysfs_emit(buf, "No event being monitored\n");
 	evt_name = mlxbf_pmc_get_event_name(pmc->block_name[blk_num], evt_num);
 	if (!evt_name)
 		return -EINVAL;
-	return sprintf(buf, "0x%llx: %s\n", evt_num, evt_name);
+	return sysfs_emit(buf, "0x%llx: %s\n", evt_num, evt_name);
 }
 /* Store function for "event" sysfs files */
 		return -EINVAL;
 	for (i = 0, buf[0] = '\0'; i < size; ++i) {
-		len += sprintf(e_info, "0x%x: %s\n", events[i].evt_num,
+		len += snprintf(e_info, sizeof(e_info), "0x%x: %s\n",
-			       events[i].evt_name);
+				events[i].evt_num, events[i].evt_name);
-		if (len > PAGE_SIZE)
+		if (len >= PAGE_SIZE)
 			break;
 		strcat(buf, e_info);
 		ret = len;
 	value = FIELD_GET(MLXBF_PMC_L3C_PERF_CNT_CFG_EN, perfcnt_cfg);
-	return sprintf(buf, "%d\n", value);
+	return sysfs_emit(buf, "%d\n", value);
 }
 /* Store function for "enable" sysfs files - only for l3cache */

drivers/platform/mellanox/mlxbf-tmfifo.c+66−24

  * @vq: pointer to the virtio virtqueue
  * @desc: current descriptor of the pending packet
  * @desc_head: head descriptor of the pending packet
+ * @drop_desc: dummy desc for packet dropping
  * @cur_len: processed length of the current descriptor
  * @rem_len: remaining length of the pending packet
  * @pkt_len: total length of the pending packet
 	struct virtqueue *vq;
 	struct vring_desc *desc;
 	struct vring_desc *desc_head;
+	struct vring_desc drop_desc;
 	int cur_len;
 	int rem_len;
 	u32 pkt_len;
 	struct mlxbf_tmfifo *fifo;
 };
+/* Check whether vring is in drop mode. */
+#define IS_VRING_DROP(_r) ({ \
+	typeof(_r) (r) = (_r); \
+	(r->desc_head == &r->drop_desc ? true : false); })
+/* A stub length to drop maximum length packet. */
+#define VRING_DROP_DESC_MAX_LEN		GENMASK(15, 0)
 /* Interrupt types. */
 enum {
 	MLXBF_TM_RX_LWM_IRQ,
 static efi_char16_t mlxbf_tmfifo_efi_name[] = L"RshimMacAddr";
 /* Maximum L2 header length. */
-#define MLXBF_TMFIFO_NET_L2_OVERHEAD	36
+#define MLXBF_TMFIFO_NET_L2_OVERHEAD	(ETH_HLEN + VLAN_HLEN)
 /* Supported virtio-net features. */
 #define MLXBF_TMFIFO_NET_FEATURES \
 		vring->align = SMP_CACHE_BYTES;
 		vring->index = i;
 		vring->vdev_id = tm_vdev->vdev.id.device;
+		vring->drop_desc.len = VRING_DROP_DESC_MAX_LEN;
 		dev = &tm_vdev->vdev.dev;
 		size = vring_size(vring->num, vring->align);
 	return len;
 }
-static void mlxbf_tmfifo_release_pending_pkt(struct mlxbf_tmfifo_vring *vring)
+static void mlxbf_tmfifo_release_pkt(struct mlxbf_tmfifo_vring *vring)
 {
 	struct vring_desc *desc_head;
 	u32 len = 0;
 	if (vring->cur_len + sizeof(u64) <= len) {
 		/* The whole word. */
-		if (is_rx)
+		if (!IS_VRING_DROP(vring)) {
-			memcpy(addr + vring->cur_len, &data, sizeof(u64));
+			if (is_rx)
-		else
+				memcpy(addr + vring->cur_len, &data,
-			memcpy(&data, addr + vring->cur_len, sizeof(u64));
+				       sizeof(u64));
+			else
+				memcpy(&data, addr + vring->cur_len,
+				       sizeof(u64));
+		}
 		vring->cur_len += sizeof(u64);
 	} else {
 		/* Leftover bytes. */
-		if (is_rx)
+		if (!IS_VRING_DROP(vring)) {
-			memcpy(addr + vring->cur_len, &data,
+			if (is_rx)
-			       len - vring->cur_len);
+				memcpy(addr + vring->cur_len, &data,
-		else
+				       len - vring->cur_len);
-			memcpy(&data, addr + vring->cur_len,
+			else
-			       len - vring->cur_len);
+				memcpy(&data, addr + vring->cur_len,
+				       len - vring->cur_len);
+		}
 		vring->cur_len = len;
 	}
  * flag is set.
  */
 static void mlxbf_tmfifo_rxtx_header(struct mlxbf_tmfifo_vring *vring,
-				     struct vring_desc *desc,
+				     struct vring_desc **desc,
 				     bool is_rx, bool *vring_change)
 {
 	struct mlxbf_tmfifo *fifo = vring->fifo;
 	struct virtio_net_config *config;
 	struct mlxbf_tmfifo_msg_hdr hdr;
 	int vdev_id, hdr_len;
+	bool drop_rx = false;
 	/* Read/Write packet header. */
 	if (is_rx) {
 			if (ntohs(hdr.len) >
 			    __virtio16_to_cpu(virtio_legacy_is_little_endian(),
 					      config->mtu) +
-			    MLXBF_TMFIFO_NET_L2_OVERHEAD)
+					      MLXBF_TMFIFO_NET_L2_OVERHEAD)
-				return;
+				drop_rx = true;
 		} else {
 			vdev_id = VIRTIO_ID_CONSOLE;
 			hdr_len = 0;
 			if (!tm_dev2)
 				return;
-			vring->desc = desc;
+			vring->desc = *desc;
 			vring = &tm_dev2->vrings[MLXBF_TMFIFO_VRING_RX];
 			*vring_change = true;
 		}
+		if (drop_rx && !IS_VRING_DROP(vring)) {
+			if (vring->desc_head)
+				mlxbf_tmfifo_release_pkt(vring);
+			*desc = &vring->drop_desc;
+			vring->desc_head = *desc;
+			vring->desc = *desc;
+		}
 		vring->pkt_len = ntohs(hdr.len) + hdr_len;
 	} else {
 		/* Network virtio has an extra header. */
 		hdr_len = (vring->vdev_id == VIRTIO_ID_NET) ?
 			   sizeof(struct virtio_net_hdr) : 0;
-		vring->pkt_len = mlxbf_tmfifo_get_pkt_len(vring, desc);
+		vring->pkt_len = mlxbf_tmfifo_get_pkt_len(vring, *desc);
 		hdr.type = (vring->vdev_id == VIRTIO_ID_NET) ?
 			    VIRTIO_ID_NET : VIRTIO_ID_CONSOLE;
 		hdr.len = htons(vring->pkt_len - hdr_len);
 	/* Get the descriptor of the next packet. */
 	if (!vring->desc) {
 		desc = mlxbf_tmfifo_get_next_pkt(vring, is_rx);
-		if (!desc)
+		if (!desc) {
-			return false;
+			/* Drop next Rx packet to avoid stuck. */
+			if (is_rx) {
+				desc = &vring->drop_desc;
+				vring->desc_head = desc;
+				vring->desc = desc;
+			} else {
+				return false;
+			}
+		}
 	} else {
 		desc = vring->desc;
 	}
 	/* Beginning of a packet. Start to Rx/Tx packet header. */
 	if (vring->pkt_len == 0) {
-		mlxbf_tmfifo_rxtx_header(vring, desc, is_rx, &vring_change);
+		mlxbf_tmfifo_rxtx_header(vring, &desc, is_rx, &vring_change);
 		(*avail)--;
 		/* Return if new packet is for another ring. */
 		vring->rem_len -= len;
 		/* Get the next desc on the chain. */
-		if (vring->rem_len > 0 &&
+		if (!IS_VRING_DROP(vring) && vring->rem_len > 0 &&
 		    (virtio16_to_cpu(vdev, desc->flags) & VRING_DESC_F_NEXT)) {
 			idx = virtio16_to_cpu(vdev, desc->next);
 			desc = &vr->desc[idx];
 			goto mlxbf_tmfifo_desc_done;
 		}
-		/* Done and release the pending packet. */
+		/* Done and release the packet. */
-		mlxbf_tmfifo_release_pending_pkt(vring);
 		desc = NULL;
 		fifo->vring[is_rx] = NULL;
+		if (!IS_VRING_DROP(vring)) {
+			mlxbf_tmfifo_release_pkt(vring);
+		} else {
+			vring->pkt_len = 0;
+			vring->desc_head = NULL;
+			vring->desc = NULL;
+			return false;
+		}
 		/*
 		 * Make sure the load/store are in order before
 		/* Release the pending packet. */
 		if (vring->desc)
-			mlxbf_tmfifo_release_pending_pkt(vring);
+			mlxbf_tmfifo_release_pkt(vring);
 		vq = vring->vq;
 		if (vq) {
 			vring->vq = NULL;

drivers/platform/x86/asus-nb-wmi.c+9−0

@@ -478,6 +478,15 @@ static const struct dmi_system_id asus_quirks[] = { · 477 unmodified lines
478	},	478	},
479	.driver_data = &quirk_asus_tablet_mode,	479	.driver_data = &quirk_asus_tablet_mode,
480	},	480	},
		481	{
		482	.callback = dmi_matched,
		483	.ident = "ASUS ROG FLOW X16",
		484	.matches = {
		485	DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
		486	DMI_MATCH(DMI_PRODUCT_NAME, "GV601V"),
		487	},
		488	.driver_data = &quirk_asus_tablet_mode,
		489	},
481	{	490	{
482	.callback = dmi_matched,	491	.callback = dmi_matched,
483	.ident = "ASUS VivoBook E410MA",	492	.ident = "ASUS VivoBook E410MA",

drivers/platform/x86/intel_scu_ipc.c+40−26

@@ -19,6 +19,7 @@ · 18 unmodified lines
19	#include <linux/init.h>	19	#include <linux/init.h>
20	#include <linux/interrupt.h>	20	#include <linux/interrupt.h>
21	#include <linux/io.h>	21	#include <linux/io.h>
		22	#include <linux/iopoll.h>
22	#include <linux/module.h>	23	#include <linux/module.h>
23	#include <linux/slab.h>	24	#include <linux/slab.h>
24		25
@@ -231,19 +232,15 @@ static inline u32 ipc_data_readl(struct intel_scu_ipc_dev *scu, u32 offset) · 206 unmodified lines
231	/* Wait till scu status is busy */	232	/* Wait till scu status is busy */
232	static inline int busy_loop(struct intel_scu_ipc_dev *scu)	233	static inline int busy_loop(struct intel_scu_ipc_dev *scu)
233	{	234	{
234	unsigned long end = jiffies + IPC_TIMEOUT;	235	u8 status;
235		236	int err;
236	do {
237	u32 status;
238
239	status = ipc_read_status(scu);
240	if (!(status & IPC_STATUS_BUSY))
241	return (status & IPC_STATUS_ERR) ? -EIO : 0;
242		237
243	usleep_range(50, 100);	238	err = readx_poll_timeout(ipc_read_status, scu, status, !(status & IPC_STATUS_BUSY),
244	} while (time_before(jiffies, end));	239	100, jiffies_to_usecs(IPC_TIMEOUT));
		240	if (err)
		241	return err;
245		242
246	return -ETIMEDOUT;	243	return (status & IPC_STATUS_ERR) ? -EIO : 0;
247	}	244	}
248		245
249	/* Wait till ipc ioc interrupt is received or timeout in 10 HZ */	246	/* Wait till ipc ioc interrupt is received or timeout in 10 HZ */
@@ -251,10 +248,12 @@ static inline int ipc_wait_for_interrupt(struct intel_scu_ipc_dev *scu) · 1 unmodified line
251	{	248	{
252	int status;	249	int status;
253		250
254	if (!wait_for_completion_timeout(&scu->cmd_complete, IPC_TIMEOUT))	251	wait_for_completion_timeout(&scu->cmd_complete, IPC_TIMEOUT);
255	return -ETIMEDOUT;
256		252
257	status = ipc_read_status(scu);	253	status = ipc_read_status(scu);
		254	if (status & IPC_STATUS_BUSY)
		255	return -ETIMEDOUT;
		256
258	if (status & IPC_STATUS_ERR)	257	if (status & IPC_STATUS_ERR)
259	return -EIO;	258	return -EIO;
260		259
@@ -266,6 +265,24 @@ static int intel_scu_ipc_check_status(struct intel_scu_ipc_dev *scu) · 5 unmodified lines
266	return scu->irq > 0 ? ipc_wait_for_interrupt(scu) : busy_loop(scu);	265	return scu->irq > 0 ? ipc_wait_for_interrupt(scu) : busy_loop(scu);
267	}	266	}
268		267
		268	static struct intel_scu_ipc_dev intel_scu_ipc_get(struct intel_scu_ipc_dev scu)
		269	{
		270	u8 status;
		271
		272	if (!scu)
		273	scu = ipcdev;
		274	if (!scu)
		275	return ERR_PTR(-ENODEV);
		276
		277	status = ipc_read_status(scu);
		278	if (status & IPC_STATUS_BUSY) {
		279	dev_dbg(&scu->dev, "device is busy\n");
		280	return ERR_PTR(-EBUSY);
		281	}
		282
		283	return scu;
		284	}
		285
269	/* Read/Write power control(PMIC in Langwell, MSIC in PenWell) registers */	286	/* Read/Write power control(PMIC in Langwell, MSIC in PenWell) registers */
270	static int pwr_reg_rdwr(struct intel_scu_ipc_dev scu, u16 addr, u8 *data,	287	static int pwr_reg_rdwr(struct intel_scu_ipc_dev scu, u16 addr, u8 *data,
271	u32 count, u32 op, u32 id)	288	u32 count, u32 op, u32 id)
@@ -279,11 +296,10 @@ static int pwr_reg_rdwr(struct intel_scu_ipc_dev scu, u16 addr, u8 *data, · 7 unmodified lines
279	memset(cbuf, 0, sizeof(cbuf));	296	memset(cbuf, 0, sizeof(cbuf));
280		297
281	mutex_lock(&ipclock);	298	mutex_lock(&ipclock);
282	if (!scu)	299	scu = intel_scu_ipc_get(scu);
283	scu = ipcdev;	300	if (IS_ERR(scu)) {
284	if (!scu) {
285	mutex_unlock(&ipclock);	301	mutex_unlock(&ipclock);
286	return -ENODEV;	302	return PTR_ERR(scu);
287	}	303	}
288		304
289	for (nc = 0; nc < count; nc++, offset += 2) {	305	for (nc = 0; nc < count; nc++, offset += 2) {
@@ -438,13 +454,12 @@ int intel_scu_ipc_dev_simple_command(struct intel_scu_ipc_dev *scu, int cmd, · 148 unmodified lines
438	int err;	454	int err;
439		455
440	mutex_lock(&ipclock);	456	mutex_lock(&ipclock);
441	if (!scu)	457	scu = intel_scu_ipc_get(scu);
442	scu = ipcdev;	458	if (IS_ERR(scu)) {
443	if (!scu) {
444	mutex_unlock(&ipclock);	459	mutex_unlock(&ipclock);
445	return -ENODEV;	460	return PTR_ERR(scu);
446	}	461	}
447	scu = ipcdev;	462
448	cmdval = sub << 12 \| cmd;	463	cmdval = sub << 12 \| cmd;
449	ipc_command(scu, cmdval);	464	ipc_command(scu, cmdval);
450	err = intel_scu_ipc_check_status(scu);	465	err = intel_scu_ipc_check_status(scu);
@@ -484,11 +499,10 @@ int intel_scu_ipc_dev_command_with_size(struct intel_scu_ipc_dev *scu, int cmd, · 33 unmodified lines
484	return -EINVAL;	499	return -EINVAL;
485		500
486	mutex_lock(&ipclock);	501	mutex_lock(&ipclock);
487	if (!scu)	502	scu = intel_scu_ipc_get(scu);
488	scu = ipcdev;	503	if (IS_ERR(scu)) {
489	if (!scu) {
490	mutex_unlock(&ipclock);	504	mutex_unlock(&ipclock);
491	return -ENODEV;	505	return PTR_ERR(scu);
492	}	506	}
493		507
494	memcpy(inbuf, in, inlen);	508	memcpy(inbuf, in, inlen);

drivers/platform/x86/thinkpad_acpi.c+2−0

 {
 	tpacpi_disable_brightness_delay();
+	mutex_lock(&hotkey_mutex);
 	if (hotkey_status_set(true) < 0 ||
 	    hotkey_mask_set(hotkey_acpi_mask) < 0)
 		pr_err("error while attempting to reset the event firmware interface\n");
+	mutex_unlock(&hotkey_mutex);
 	tpacpi_send_radiosw_update();
 	tpacpi_input_send_tabletsw();

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drivers/power/reset/Kconfig+1−1

@@ -300,7 +300,7 @@ config NVMEM_REBOOT_MODE · 299 unmodified lines
300		300
301	config POWER_MLXBF	301	config POWER_MLXBF
302	tristate "Mellanox BlueField power handling driver"	302	tristate "Mellanox BlueField power handling driver"
303	depends on (GPIO_MLXBF2 && ACPI)	303	depends on (GPIO_MLXBF2 \|\| GPIO_MLXBF3) && ACPI
304	help	304	help
305	This driver supports reset or low power mode handling for Mellanox BlueField.	305	This driver supports reset or low power mode handling for Mellanox BlueField.
306		306

drivers/power/reset/pwr-mlxbf.c+1−1

@@ -1,4 +1,4 @@
1	// SPDX-License-Identifier: GPL-2.0-only or BSD-3-Clause	1	// SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause
2		2
3	/*	3	/*
4	* Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES.	4	* Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES.

drivers/power/reset/vexpress-poweroff.c+1−1

@@ -121,7 +121,7 @@ static int vexpress_reset_probe(struct platform_device *pdev) · 120 unmodified lines
121	return PTR_ERR(regmap);	121	return PTR_ERR(regmap);
122	dev_set_drvdata(&pdev->dev, regmap);	122	dev_set_drvdata(&pdev->dev, regmap);
123		123
124	switch ((enum vexpress_reset_func)match->data) {	124	switch ((uintptr_t)match->data) {
125	case FUNC_SHUTDOWN:	125	case FUNC_SHUTDOWN:
126	vexpress_power_off_device = &pdev->dev;	126	vexpress_power_off_device = &pdev->dev;
127	pm_power_off = vexpress_power_off;	127	pm_power_off = vexpress_power_off;

drivers/power/supply/Kconfig+1−0

@@ -769,6 +769,7 @@ config BATTERY_RT5033 · 768 unmodified lines
769	config CHARGER_RT5033	769	config CHARGER_RT5033
770	tristate "RT5033 battery charger support"	770	tristate "RT5033 battery charger support"
771	depends on MFD_RT5033	771	depends on MFD_RT5033
		772	depends on EXTCON \|\| !EXTCON
772	help	773	help
773	This adds support for battery charger in Richtek RT5033 PMIC.	774	This adds support for battery charger in Richtek RT5033 PMIC.
774	The device supports pre-charge mode, fast charge mode and	775	The device supports pre-charge mode, fast charge mode and

drivers/power/supply/ab8500_btemp.c+1−8

 static enum power_supply_property ab8500_btemp_props[] = {
 	POWER_SUPPLY_PROP_PRESENT,
 	POWER_SUPPLY_PROP_ONLINE,
-	POWER_SUPPLY_PROP_TECHNOLOGY,
 	POWER_SUPPLY_PROP_TEMP,
 };
 		else
 			val->intval = 1;
 		break;
-	case POWER_SUPPLY_PROP_TECHNOLOGY:
-		if (di->bm->bi)
-			val->intval = di->bm->bi->technology;
-		else
-			val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
-		break;
 	case POWER_SUPPLY_PROP_TEMP:
 		val->intval = ab8500_btemp_get_temp(di);
 		break;
 static const struct power_supply_desc ab8500_btemp_desc = {
 	.name			= "ab8500_btemp",
-	.type			= POWER_SUPPLY_TYPE_BATTERY,
+	.type			= POWER_SUPPLY_TYPE_UNKNOWN,
 	.properties		= ab8500_btemp_props,
 	.num_properties		= ARRAY_SIZE(ab8500_btemp_props),
 	.get_property		= ab8500_btemp_get_property,

drivers/power/supply/ab8500_chargalg.c+1−1

@@ -1720,7 +1720,7 @@ static char *supply_interface[] = { · 1719 unmodified lines
1720		1720
1721	static const struct power_supply_desc ab8500_chargalg_desc = {	1721	static const struct power_supply_desc ab8500_chargalg_desc = {
1722	.name = "ab8500_chargalg",	1722	.name = "ab8500_chargalg",
1723	.type = POWER_SUPPLY_TYPE_BATTERY,	1723	.type = POWER_SUPPLY_TYPE_UNKNOWN,
1724	.properties = ab8500_chargalg_props,	1724	.properties = ab8500_chargalg_props,
1725	.num_properties = ARRAY_SIZE(ab8500_chargalg_props),	1725	.num_properties = ARRAY_SIZE(ab8500_chargalg_props),
1726	.get_property = ab8500_chargalg_get_property,	1726	.get_property = ab8500_chargalg_get_property,

drivers/power/supply/mt6370-charger.c+1−1

@@ -324,7 +324,7 @@ static int mt6370_chg_toggle_cfo(struct mt6370_priv *priv) · 323 unmodified lines
324		324
325	if (fl_strobe) {	325	if (fl_strobe) {
326	dev_err(priv->dev, "Flash led is still in strobe mode\n");	326	dev_err(priv->dev, "Flash led is still in strobe mode\n");
327	return ret;	327	return -EINVAL;
328	}	328	}
329		329
330	/* cfo off */	330	/* cfo off */

drivers/power/supply/power_supply_sysfs.c+7−0

@@ -482,6 +482,13 @@ int power_supply_uevent(const struct device dev, struct kobj_uevent_env env) · 481 unmodified lines
482	if (ret)	482	if (ret)
483	return ret;	483	return ret;
484		484
		485	/*
		486	* Kernel generates KOBJ_REMOVE uevent in device removal path, after
		487	* resources have been freed. Exit early to avoid use-after-free.
		488	*/
		489	if (psy->removing)
		490	return 0;
		491
485	prop_buf = (char *)get_zeroed_page(GFP_KERNEL);	492	prop_buf = (char *)get_zeroed_page(GFP_KERNEL);
486	if (!prop_buf)	493	if (!prop_buf)
487	return -ENOMEM;	494	return -ENOMEM;

drivers/power/supply/rk817_charger.c+13−3

 	queue_delayed_work(system_wq, &charger->work, msecs_to_jiffies(8000));
 }
+static void rk817_cleanup_node(void *data)
+{
+	struct device_node *node = data;
+	of_node_put(node);
+}
 static int rk817_charger_probe(struct platform_device *pdev)
 {
 	struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent);
 	if (!node)
 		return -ENODEV;
+	ret = devm_add_action_or_reset(&pdev->dev, rk817_cleanup_node, node);
+	if (ret)
+		return ret;
 	charger = devm_kzalloc(&pdev->dev, sizeof(*charger), GFP_KERNEL);
-	if (!charger) {
+	if (!charger)
-		of_node_put(node);
 		return -ENOMEM;
-	}
 	charger->rk808 = rk808;
 MODULE_AUTHOR("Maya Matuszczyk <maccraft123mc@gmail.com>");
 MODULE_AUTHOR("Chris Morgan <macromorgan@hotmail.com>");
 MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:rk817-charger");

drivers/power/supply/rt9467-charger.c+2−2

@@ -598,8 +598,8 @@ static int rt9467_run_aicl(struct rt9467_chg_data *data) · 597 unmodified lines
598		598
599	reinit_completion(&data->aicl_done);	599	reinit_completion(&data->aicl_done);
600	ret = wait_for_completion_timeout(&data->aicl_done, msecs_to_jiffies(3500));	600	ret = wait_for_completion_timeout(&data->aicl_done, msecs_to_jiffies(3500));
601	if (ret)	601	if (ret == 0)
602	return ret;	602	return -ETIMEDOUT;
603		603
604	ret = rt9467_get_value_from_ranges(data, F_IAICR, RT9467_RANGE_IAICR, &aicr_get);	604	ret = rt9467_get_value_from_ranges(data, F_IAICR, RT9467_RANGE_IAICR, &aicr_get);
605	if (ret) {	605	if (ret) {

drivers/power/supply/ucs1002_power.c+2−1

 	case POWER_SUPPLY_PROP_USB_TYPE:
 		return ucs1002_get_usb_type(info, val);
 	case POWER_SUPPLY_PROP_HEALTH:
-		return val->intval = info->health;
+		val->intval = info->health;
+		return 0;
 	case POWER_SUPPLY_PROP_PRESENT:
 		val->intval = info->present;
 		return 0;

drivers/regulator/helpers.c+1−1

@@ -197,7 +197,7 @@ int regulator_set_voltage_sel_pickable_regmap(struct regulator_dev *rdev, · 196 unmodified lines
197	sel += rdev->desc->linear_ranges[i].min_sel;	197	sel += rdev->desc->linear_ranges[i].min_sel;
198		198
199	range = rdev->desc->linear_range_selectors_bitfield[i];	199	range = rdev->desc->linear_range_selectors_bitfield[i];
200	range <<= ffs(rdev->desc->vsel_mask) - 1;	200	range <<= ffs(rdev->desc->vsel_range_mask) - 1;
201		201
202	if (rdev->desc->vsel_reg == rdev->desc->vsel_range_reg) {	202	if (rdev->desc->vsel_reg == rdev->desc->vsel_range_reg) {
203	ret = regmap_update_bits(rdev->regmap,	203	ret = regmap_update_bits(rdev->regmap,

drivers/scsi/iscsi_tcp.c+4−0

 		return -EEXIST;
 	}
+	err = -EINVAL;
+	if (!sk_is_tcp(sock->sk))
+		goto free_socket;
 	err = iscsi_conn_bind(cls_session, cls_conn, is_leading);
 	if (err)
 		goto free_socket;

drivers/scsi/lpfc/lpfc_debugfs.c+7−7

@@ -6073,7 +6073,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport) · 6072 unmodified lines
6073	phba->hba_debugfs_root,	6073	phba->hba_debugfs_root,
6074	phba,	6074	phba,
6075	&lpfc_debugfs_op_multixripools);	6075	&lpfc_debugfs_op_multixripools);
6076	if (!phba->debug_multixri_pools) {	6076	if (IS_ERR(phba->debug_multixri_pools)) {
6077	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,	6077	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
6078	"0527 Cannot create debugfs multixripools\n");	6078	"0527 Cannot create debugfs multixripools\n");
6079	goto debug_failed;	6079	goto debug_failed;
@@ -6085,7 +6085,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport) · 5 unmodified lines
6085	debugfs_create_file(name, S_IFREG \| 0644,	6085	debugfs_create_file(name, S_IFREG \| 0644,
6086	phba->hba_debugfs_root,	6086	phba->hba_debugfs_root,
6087	phba, &lpfc_cgn_buffer_op);	6087	phba, &lpfc_cgn_buffer_op);
6088	if (!phba->debug_cgn_buffer) {	6088	if (IS_ERR(phba->debug_cgn_buffer)) {
6089	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,	6089	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
6090	"6527 Cannot create debugfs "	6090	"6527 Cannot create debugfs "
6091	"cgn_buffer\n");	6091	"cgn_buffer\n");
@@ -6098,7 +6098,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport) · 6 unmodified lines
6098	debugfs_create_file(name, S_IFREG \| 0644,	6098	debugfs_create_file(name, S_IFREG \| 0644,
6099	phba->hba_debugfs_root,	6099	phba->hba_debugfs_root,
6100	phba, &lpfc_rx_monitor_op);	6100	phba, &lpfc_rx_monitor_op);
6101	if (!phba->debug_rx_monitor) {	6101	if (IS_ERR(phba->debug_rx_monitor)) {
6102	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,	6102	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
6103	"6528 Cannot create debugfs "	6103	"6528 Cannot create debugfs "
6104	"rx_monitor\n");	6104	"rx_monitor\n");
@@ -6111,7 +6111,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport) · 6 unmodified lines
6111	debugfs_create_file(name, 0644,	6111	debugfs_create_file(name, 0644,
6112	phba->hba_debugfs_root,	6112	phba->hba_debugfs_root,
6113	phba, &lpfc_debugfs_ras_log);	6113	phba, &lpfc_debugfs_ras_log);
6114	if (!phba->debug_ras_log) {	6114	if (IS_ERR(phba->debug_ras_log)) {
6115	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,	6115	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
6116	"6148 Cannot create debugfs"	6116	"6148 Cannot create debugfs"
6117	" ras_log\n");	6117	" ras_log\n");
@@ -6132,7 +6132,7 @@ lpfc_debugfs_initialize(struct lpfc_vport *vport) · 14 unmodified lines
6132	debugfs_create_file(name, S_IFREG \| 0644,	6132	debugfs_create_file(name, S_IFREG \| 0644,
6133	phba->hba_debugfs_root,	6133	phba->hba_debugfs_root,
6134	phba, &lpfc_debugfs_op_lockstat);	6134	phba, &lpfc_debugfs_op_lockstat);
6135	if (!phba->debug_lockstat) {	6135	if (IS_ERR(phba->debug_lockstat)) {
6136	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,	6136	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
6137	"4610 Can't create debugfs lockstat\n");	6137	"4610 Can't create debugfs lockstat\n");
6138	goto debug_failed;	6138	goto debug_failed;
@@ -6358,7 +6358,7 @@ nvmeio_off: · 219 unmodified lines
6358	debugfs_create_file(name, 0644,	6358	debugfs_create_file(name, 0644,
6359	vport->vport_debugfs_root,	6359	vport->vport_debugfs_root,
6360	vport, &lpfc_debugfs_op_scsistat);	6360	vport, &lpfc_debugfs_op_scsistat);
6361	if (!vport->debug_scsistat) {	6361	if (IS_ERR(vport->debug_scsistat)) {
6362	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,	6362	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
6363	"4611 Cannot create debugfs scsistat\n");	6363	"4611 Cannot create debugfs scsistat\n");
6364	goto debug_failed;	6364	goto debug_failed;
@@ -6369,7 +6369,7 @@ nvmeio_off: · 4 unmodified lines
6369	debugfs_create_file(name, 0644,	6369	debugfs_create_file(name, 0644,
6370	vport->vport_debugfs_root,	6370	vport->vport_debugfs_root,
6371	vport, &lpfc_debugfs_op_ioktime);	6371	vport, &lpfc_debugfs_op_ioktime);
6372	if (!vport->debug_ioktime) {	6372	if (IS_ERR(vport->debug_ioktime)) {
6373	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,	6373	lpfc_printf_vlog(vport, KERN_ERR, LOG_INIT,
6374	"0815 Cannot create debugfs ioktime\n");	6374	"0815 Cannot create debugfs ioktime\n");
6375	goto debug_failed;	6375	goto debug_failed;

drivers/scsi/lpfc/lpfc_hbadisc.c+3−2

 		/* Only 1 thread can drop the initial node reference.  If
 		 * another thread has set NLP_DROPPED, this thread is done.
 		 */
-		if (!(ndlp->nlp_flag & NLP_DROPPED)) {
+		if (!(ndlp->fc4_xpt_flags & NVME_XPT_REGD) &&
+		    !(ndlp->nlp_flag & NLP_DROPPED)) {
 			ndlp->nlp_flag |= NLP_DROPPED;
 			spin_unlock_irqrestore(&ndlp->lock, iflags);
 			lpfc_nlp_put(ndlp);
-			spin_lock_irqsave(&ndlp->lock, iflags);
+			return;
 		}
 		spin_unlock_irqrestore(&ndlp->lock, iflags);

drivers/scsi/lpfc/lpfc_nvme.c+17−7

 	spin_unlock_irq(&ndlp->lock);
 	/* On a devloss timeout event, one more put is executed provided the
-	 * NVME and SCSI rport unregister requests are complete.  If the vport
+	 * NVME and SCSI rport unregister requests are complete.
-	 * is unloading, this extra put is executed by lpfc_drop_node.
 	 */
 	if (!(ndlp->fc4_xpt_flags & fc4_xpt_flags))
 		lpfc_disc_state_machine(vport, ndlp, NULL, NLP_EVT_DEVICE_RM);
  * nvme_transport perspective.  Loss of an rport just means IO cannot
  * be sent and recovery is completely up to the initator.
  * For now, the driver just unbinds the DID and port_role so that
- * no further IO can be issued.  Changes are planned for later.
+ * no further IO can be issued.
- *
- * Notes - the ndlp reference count is not decremented here since
- * since there is no nvme_transport api for devloss.  Node ref count
- * is only adjusted in driver unload.
  */
 void
 lpfc_nvme_unregister_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp)
 					 "6167 NVME unregister failed %d "
 					 "port_state x%x\n",
 					 ret, remoteport->port_state);
+			if (vport->load_flag & FC_UNLOADING) {
+				/* Only 1 thread can drop the initial node
+				 * reference. Check if another thread has set
+				 * NLP_DROPPED.
+				 */
+				spin_lock_irq(&ndlp->lock);
+				if (!(ndlp->nlp_flag & NLP_DROPPED)) {
+					ndlp->nlp_flag |= NLP_DROPPED;
+					spin_unlock_irq(&ndlp->lock);
+					lpfc_nlp_put(ndlp);
+					return;
+				}
+				spin_unlock_irq(&ndlp->lock);
+			}
 		}
 	}
 	return;

drivers/scsi/megaraid/megaraid_sas.h+1−1

@@ -2332,7 +2332,7 @@ struct megasas_instance { · 2331 unmodified lines
2332	u32 support_morethan256jbod; /* FW support for more than 256 PD/JBOD */	2332	u32 support_morethan256jbod; /* FW support for more than 256 PD/JBOD */
2333	bool use_seqnum_jbod_fp; /* Added for PD sequence */	2333	bool use_seqnum_jbod_fp; /* Added for PD sequence */
2334	bool smp_affinity_enable;	2334	bool smp_affinity_enable;
2335	spinlock_t crashdump_lock;	2335	struct mutex crashdump_lock;
2336		2336
2337	struct megasas_register_set __iomem *reg_set;	2337	struct megasas_register_set __iomem *reg_set;
2338	u32 __iomem *reply_post_host_index_addr[MR_MAX_MSIX_REG_ARRAY];	2338	u32 __iomem *reply_post_host_index_addr[MR_MAX_MSIX_REG_ARRAY];

drivers/scsi/megaraid/megaraid_sas_base.c+9−12

 	struct megasas_instance *instance =
 		(struct megasas_instance *) shost->hostdata;
 	int val = 0;
-	unsigned long flags;
 	if (kstrtoint(buf, 0, &val) != 0)
 		return -EINVAL;
-	spin_lock_irqsave(&instance->crashdump_lock, flags);
+	mutex_lock(&instance->crashdump_lock);
 	instance->fw_crash_buffer_offset = val;
-	spin_unlock_irqrestore(&instance->crashdump_lock, flags);
+	mutex_unlock(&instance->crashdump_lock);
 	return strlen(buf);
 }
 	unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
 	unsigned long chunk_left_bytes;
 	unsigned long src_addr;
-	unsigned long flags;
 	u32 buff_offset;
-	spin_lock_irqsave(&instance->crashdump_lock, flags);
+	mutex_lock(&instance->crashdump_lock);
 	buff_offset = instance->fw_crash_buffer_offset;
 	if (!instance->crash_dump_buf ||
 		!((instance->fw_crash_state == AVAILABLE) ||
 		(instance->fw_crash_state == COPYING))) {
 		dev_err(&instance->pdev->dev,
 			"Firmware crash dump is not available\n");
-		spin_unlock_irqrestore(&instance->crashdump_lock, flags);
+		mutex_unlock(&instance->crashdump_lock);
 		return -EINVAL;
 	}
 	if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
 		dev_err(&instance->pdev->dev,
 			"Firmware crash dump offset is out of range\n");
-		spin_unlock_irqrestore(&instance->crashdump_lock, flags);
+		mutex_unlock(&instance->crashdump_lock);
 		return 0;
 	}
 	src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
 		(buff_offset % dmachunk);
 	memcpy(buf, (void *)src_addr, size);
-	spin_unlock_irqrestore(&instance->crashdump_lock, flags);
+	mutex_unlock(&instance->crashdump_lock);
 	return size;
 }
 	struct megasas_instance *instance =
 		(struct megasas_instance *) shost->hostdata;
 	int val = 0;
-	unsigned long flags;
 	if (kstrtoint(buf, 0, &val) != 0)
 		return -EINVAL;
 	instance->fw_crash_state = val;
 	if ((val == COPIED) || (val == COPY_ERROR)) {
-		spin_lock_irqsave(&instance->crashdump_lock, flags);
+		mutex_lock(&instance->crashdump_lock);
 		megasas_free_host_crash_buffer(instance);
-		spin_unlock_irqrestore(&instance->crashdump_lock, flags);
+		mutex_unlock(&instance->crashdump_lock);
 		if (val == COPY_ERROR)
 			dev_info(&instance->pdev->dev, "application failed to "
 				"copy Firmware crash dump\n");
 	init_waitqueue_head(&instance->int_cmd_wait_q);
 	init_waitqueue_head(&instance->abort_cmd_wait_q);
-	spin_lock_init(&instance->crashdump_lock);
+	mutex_init(&instance->crashdump_lock);
 	spin_lock_init(&instance->mfi_pool_lock);
 	spin_lock_init(&instance->hba_lock);
 	spin_lock_init(&instance->stream_lock);

drivers/scsi/pm8001/pm8001_hwi.c+1−1

@@ -4180,7 +4180,7 @@ pm8001_chip_phy_start_req(struct pm8001_hba_info *pm8001_ha, u8 phy_id) · 4179 unmodified lines
4180	payload.sas_identify.dev_type = SAS_END_DEVICE;	4180	payload.sas_identify.dev_type = SAS_END_DEVICE;
4181	payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL;	4181	payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL;
4182	memcpy(payload.sas_identify.sas_addr,	4182	memcpy(payload.sas_identify.sas_addr,
4183	pm8001_ha->sas_addr, SAS_ADDR_SIZE);	4183	&pm8001_ha->phy[phy_id].dev_sas_addr, SAS_ADDR_SIZE);
4184	payload.sas_identify.phy_id = phy_id;	4184	payload.sas_identify.phy_id = phy_id;
4185		4185
4186	return pm8001_mpi_build_cmd(pm8001_ha, 0, opcode, &payload,	4186	return pm8001_mpi_build_cmd(pm8001_ha, 0, opcode, &payload,

drivers/scsi/pm8001/pm8001_init.c+17−34

@@ -273,7 +273,6 @@ static irqreturn_t pm8001_interrupt_handler_intx(int irq, void *dev_id) · 272 unmodified lines
273	return ret;	273	return ret;
274	}	274	}
275		275
276	static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha);
277	static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha);	276	static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha);
278		277
279	/**	278	/**
@@ -294,13 +293,6 @@ static int pm8001_alloc(struct pm8001_hba_info *pm8001_ha, · 14 unmodified lines
294	pm8001_dbg(pm8001_ha, INIT, "pm8001_alloc: PHY:%x\n",	293	pm8001_dbg(pm8001_ha, INIT, "pm8001_alloc: PHY:%x\n",
295	pm8001_ha->chip->n_phy);	294	pm8001_ha->chip->n_phy);
296		295
297	/* Setup Interrupt */
298	rc = pm8001_setup_irq(pm8001_ha);
299	if (rc) {
300	pm8001_dbg(pm8001_ha, FAIL,
301	"pm8001_setup_irq failed [ret: %d]\n", rc);
302	goto err_out;
303	}
304	/* Request Interrupt */	296	/* Request Interrupt */
305	rc = pm8001_request_irq(pm8001_ha);	297	rc = pm8001_request_irq(pm8001_ha);
306	if (rc)	298	if (rc)
@@ -1031,47 +1023,38 @@ static u32 pm8001_request_msix(struct pm8001_hba_info *pm8001_ha) · 724 unmodified lines
1031	}	1023	}
1032	#endif	1024	#endif
1033		1025
1034	static u32 pm8001_setup_irq(struct pm8001_hba_info *pm8001_ha)
1035	{
1036	struct pci_dev *pdev;
1037
1038	pdev = pm8001_ha->pdev;
1039
1040	#ifdef PM8001_USE_MSIX
1041	if (pci_find_capability(pdev, PCI_CAP_ID_MSIX))
1042	return pm8001_setup_msix(pm8001_ha);
1043	pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
1044	#endif
1045	return 0;
1046	}
1047
1048	/**	1026	/**
1049	* pm8001_request_irq - register interrupt	1027	* pm8001_request_irq - register interrupt
1050	* @pm8001_ha: our ha struct.	1028	* @pm8001_ha: our ha struct.
1051	*/	1029	*/
1052	static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)	1030	static u32 pm8001_request_irq(struct pm8001_hba_info *pm8001_ha)
1053	{	1031	{
1054	struct pci_dev *pdev;	1032	struct pci_dev *pdev = pm8001_ha->pdev;
		1033	#ifdef PM8001_USE_MSIX
1055	int rc;	1034	int rc;
1056		1035
1057	pdev = pm8001_ha->pdev;	1036	if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) {
		1037	rc = pm8001_setup_msix(pm8001_ha);
		1038	if (rc) {
		1039	pm8001_dbg(pm8001_ha, FAIL,
		1040	"pm8001_setup_irq failed [ret: %d]\n", rc);
		1041	return rc;
		1042	}
1058		1043
1059	#ifdef PM8001_USE_MSIX	1044	if (pdev->msix_cap && pci_msi_enabled())
1060	if (pdev->msix_cap && pci_msi_enabled())	1045	return pm8001_request_msix(pm8001_ha);
1061	return pm8001_request_msix(pm8001_ha);
1062	else {
1063	pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
1064	goto intx;
1065	}	1046	}
		1047
		1048	pm8001_dbg(pm8001_ha, INIT, "MSIX not supported!!!\n");
1066	#endif	1049	#endif
1067		1050
1068	intx:
1069	/* initialize the INT-X interrupt */	1051	/* initialize the INT-X interrupt */
1070	pm8001_ha->irq_vector[0].irq_id = 0;	1052	pm8001_ha->irq_vector[0].irq_id = 0;
1071	pm8001_ha->irq_vector[0].drv_inst = pm8001_ha;	1053	pm8001_ha->irq_vector[0].drv_inst = pm8001_ha;
1072	rc = request_irq(pdev->irq, pm8001_interrupt_handler_intx, IRQF_SHARED,	1054
1073	pm8001_ha->name, SHOST_TO_SAS_HA(pm8001_ha->shost));	1055	return request_irq(pdev->irq, pm8001_interrupt_handler_intx,
1074	return rc;	1056	IRQF_SHARED, pm8001_ha->name,
		1057	SHOST_TO_SAS_HA(pm8001_ha->shost));
1075	}	1058	}
1076		1059
1077	/**	1060	/**

drivers/scsi/pm8001/pm80xx_hwi.c+3−1

 			(struct set_ctrl_cfg_resp *)(piomb + 4);
 	u32 status = le32_to_cpu(pPayload->status);
 	u32 err_qlfr_pgcd = le32_to_cpu(pPayload->err_qlfr_pgcd);
+	u32 tag = le32_to_cpu(pPayload->tag);
 	pm8001_dbg(pm8001_ha, MSG,
 		   "SET CONTROLLER RESP: status 0x%x qlfr_pgcd 0x%x\n",
 		   status, err_qlfr_pgcd);
+	pm8001_tag_free(pm8001_ha, tag);
 	return 0;
 }
 	payload.sas_identify.dev_type = SAS_END_DEVICE;
 	payload.sas_identify.initiator_bits = SAS_PROTOCOL_ALL;
 	memcpy(payload.sas_identify.sas_addr,
-	  &pm8001_ha->sas_addr, SAS_ADDR_SIZE);
+		&pm8001_ha->phy[phy_id].dev_sas_addr, SAS_ADDR_SIZE);
 	payload.sas_identify.phy_id = phy_id;
 	return pm8001_mpi_build_cmd(pm8001_ha, 0, opcode, &payload,

drivers/scsi/ppa.c+2−2

@@ -307,9 +307,9 @@ static int ppa_out(ppa_struct dev, char buffer, int len) · 306 unmodified lines
307	case PPA_EPP_8:	307	case PPA_EPP_8:
308	epp_reset(ppb);	308	epp_reset(ppb);
309	w_ctr(ppb, 0x4);	309	w_ctr(ppb, 0x4);
310	if (dev->mode == PPA_EPP_32 && !(((long) buffer \| len) & 0x01))	310	if (dev->mode == PPA_EPP_32 && !(((long) buffer \| len) & 0x03))
311	outsl(ppb + 4, buffer, len >> 2);	311	outsl(ppb + 4, buffer, len >> 2);
312	else if (dev->mode == PPA_EPP_16 && !(((long) buffer \| len) & 0x03))	312	else if (dev->mode == PPA_EPP_16 && !(((long) buffer \| len) & 0x01))
313	outsw(ppb + 4, buffer, len >> 1);	313	outsw(ppb + 4, buffer, len >> 1);
314	else	314	else
315	outsb(ppb + 4, buffer, len);	315	outsb(ppb + 4, buffer, len);

drivers/scsi/qedf/qedf_io.c+8−2

 		goto drop_rdata_kref;
 	}
+	spin_lock_irqsave(&fcport->rport_lock, flags);
 	if (!test_bit(QEDF_CMD_OUTSTANDING, &io_req->flags) ||
 	    test_bit(QEDF_CMD_IN_CLEANUP, &io_req->flags) ||
 	    test_bit(QEDF_CMD_IN_ABORT, &io_req->flags)) {
 			 "io_req xid=0x%x sc_cmd=%p already in cleanup or abort processing or already completed.\n",
 			 io_req->xid, io_req->sc_cmd);
 		rc = 1;
+		spin_unlock_irqrestore(&fcport->rport_lock, flags);
 		goto drop_rdata_kref;
 	}
+	/* Set the command type to abort */
+	io_req->cmd_type = QEDF_ABTS;
+	spin_unlock_irqrestore(&fcport->rport_lock, flags);
 	kref_get(&io_req->refcount);
 	xid = io_req->xid;
 	qedf->control_requests++;
 	qedf->packet_aborts++;
-	/* Set the command type to abort */
-	io_req->cmd_type = QEDF_ABTS;
 	io_req->return_scsi_cmd_on_abts = return_scsi_cmd_on_abts;
 	set_bit(QEDF_CMD_IN_ABORT, &io_req->flags);
 		  refcount, fcport, fcport->rdata->ids.port_id);
 	/* Cleanup cmds re-use the same TID as the original I/O */
+	spin_lock_irqsave(&fcport->rport_lock, flags);
 	io_req->cmd_type = QEDF_CLEANUP;
+	spin_unlock_irqrestore(&fcport->rport_lock, flags);
 	io_req->return_scsi_cmd_on_abts = return_scsi_cmd_on_abts;
 	init_completion(&io_req->cleanup_done);

drivers/scsi/qedf/qedf_main.c+6−1

 	struct qedf_ioreq *io_req;
 	struct qedf_rport *fcport;
 	u32 comp_type;
+	u8 io_comp_type;
+	unsigned long flags;
 	comp_type = (cqe->cqe_data >> FCOE_CQE_CQE_TYPE_SHIFT) &
 	    FCOE_CQE_CQE_TYPE_MASK;
 		return;
 	}
+	spin_lock_irqsave(&fcport->rport_lock, flags);
+	io_comp_type = io_req->cmd_type;
+	spin_unlock_irqrestore(&fcport->rport_lock, flags);
 	switch (comp_type) {
 	case FCOE_GOOD_COMPLETION_CQE_TYPE:
 		atomic_inc(&fcport->free_sqes);
-		switch (io_req->cmd_type) {
+		switch (io_comp_type) {
 		case QEDF_SCSI_CMD:
 			qedf_scsi_completion(qedf, cqe, io_req);
 			break;

drivers/scsi/qla2xxx/qla_dfs.c+3−3

@@ -116,7 +116,7 @@ qla2x00_dfs_create_rport(scsi_qla_host_t vha, struct fc_port fp) · 115 unmodified lines
116		116
117	sprintf(wwn, "pn-%016llx", wwn_to_u64(fp->port_name));	117	sprintf(wwn, "pn-%016llx", wwn_to_u64(fp->port_name));
118	fp->dfs_rport_dir = debugfs_create_dir(wwn, vha->dfs_rport_root);	118	fp->dfs_rport_dir = debugfs_create_dir(wwn, vha->dfs_rport_root);
119	if (!fp->dfs_rport_dir)	119	if (IS_ERR(fp->dfs_rport_dir))
120	return;	120	return;
121	if (NVME_TARGET(vha->hw, fp))	121	if (NVME_TARGET(vha->hw, fp))
122	debugfs_create_file("dev_loss_tmo", 0600, fp->dfs_rport_dir,	122	debugfs_create_file("dev_loss_tmo", 0600, fp->dfs_rport_dir,
@@ -708,14 +708,14 @@ create_nodes: · 585 unmodified lines
708	if (IS_QLA27XX(ha) \|\| IS_QLA83XX(ha) \|\| IS_QLA28XX(ha)) {	708	if (IS_QLA27XX(ha) \|\| IS_QLA83XX(ha) \|\| IS_QLA28XX(ha)) {
709	ha->tgt.dfs_naqp = debugfs_create_file("naqp",	709	ha->tgt.dfs_naqp = debugfs_create_file("naqp",
710	0400, ha->dfs_dir, vha, &dfs_naqp_ops);	710	0400, ha->dfs_dir, vha, &dfs_naqp_ops);
711	if (!ha->tgt.dfs_naqp) {	711	if (IS_ERR(ha->tgt.dfs_naqp)) {
712	ql_log(ql_log_warn, vha, 0xd011,	712	ql_log(ql_log_warn, vha, 0xd011,
713	"Unable to create debugFS naqp node.\n");	713	"Unable to create debugFS naqp node.\n");
714	goto out;	714	goto out;
715	}	715	}
716	}	716	}
717	vha->dfs_rport_root = debugfs_create_dir("rports", ha->dfs_dir);	717	vha->dfs_rport_root = debugfs_create_dir("rports", ha->dfs_dir);
718	if (!vha->dfs_rport_root) {	718	if (IS_ERR(vha->dfs_rport_root)) {
719	ql_log(ql_log_warn, vha, 0xd012,	719	ql_log(ql_log_warn, vha, 0xd012,
720	"Unable to create debugFS rports node.\n");	720	"Unable to create debugFS rports node.\n");
721	goto out;	721	goto out;

drivers/scsi/qla2xxx/qla_inline.h+1−1

@@ -577,7 +577,7 @@ fcport_is_bigger(fc_port_t *fcport) · 576 unmodified lines
577	static inline struct qla_qpair *	577	static inline struct qla_qpair *
578	qla_mapq_nvme_select_qpair(struct qla_hw_data ha, struct qla_qpair qpair)	578	qla_mapq_nvme_select_qpair(struct qla_hw_data ha, struct qla_qpair qpair)
579	{	579	{
580	int cpuid = smp_processor_id();	580	int cpuid = raw_smp_processor_id();
581		581
582	if (qpair->cpuid != cpuid &&	582	if (qpair->cpuid != cpuid &&
583	ha->qp_cpu_map[cpuid]) {	583	ha->qp_cpu_map[cpuid]) {

drivers/scsi/qla2xxx/qla_isr.c+3−3

@@ -3965,7 +3965,7 @@ void qla24xx_process_response_queue(struct scsi_qla_host *vha, · 3964 unmodified lines
3965	if (!ha->flags.fw_started)	3965	if (!ha->flags.fw_started)
3966	return;	3966	return;
3967		3967
3968	if (rsp->qpair->cpuid != smp_processor_id() \|\| !rsp->qpair->rcv_intr) {	3968	if (rsp->qpair->cpuid != raw_smp_processor_id() \|\| !rsp->qpair->rcv_intr) {
3969	rsp->qpair->rcv_intr = 1;	3969	rsp->qpair->rcv_intr = 1;
3970		3970
3971	if (!rsp->qpair->cpu_mapped)	3971	if (!rsp->qpair->cpu_mapped)
@@ -4468,7 +4468,7 @@ qla2xxx_msix_rsp_q(int irq, void *dev_id) · 496 unmodified lines
4468	}	4468	}
4469	ha = qpair->hw;	4469	ha = qpair->hw;
4470		4470
4471	queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);	4471	queue_work(ha->wq, &qpair->q_work);
4472		4472
4473	return IRQ_HANDLED;	4473	return IRQ_HANDLED;
4474	}	4474	}
@@ -4494,7 +4494,7 @@ qla2xxx_msix_rsp_q_hs(int irq, void *dev_id) · 19 unmodified lines
4494	wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);	4494	wrt_reg_dword(&reg->hccr, HCCRX_CLR_RISC_INT);
4495	spin_unlock_irqrestore(&ha->hardware_lock, flags);	4495	spin_unlock_irqrestore(&ha->hardware_lock, flags);
4496		4496
4497	queue_work_on(smp_processor_id(), ha->wq, &qpair->q_work);	4497	queue_work(ha->wq, &qpair->q_work);
4498		4498
4499	return IRQ_HANDLED;	4499	return IRQ_HANDLED;
4500	}	4500	}

drivers/scsi/qla2xxx/qla_nvme.c+5−5

@@ -399,14 +399,14 @@ static int qla_nvme_xmt_ls_rsp(struct nvme_fc_local_port *lport, · 398 unmodified lines
399	nvme->u.nvme.dl = 0;	399	nvme->u.nvme.dl = 0;
400	nvme->u.nvme.timeout_sec = 0;	400	nvme->u.nvme.timeout_sec = 0;
401	nvme->u.nvme.cmd_dma = fd_resp->rspdma;	401	nvme->u.nvme.cmd_dma = fd_resp->rspdma;
402	nvme->u.nvme.cmd_len = fd_resp->rsplen;	402	nvme->u.nvme.cmd_len = cpu_to_le32(fd_resp->rsplen);
403	nvme->u.nvme.rsp_len = 0;	403	nvme->u.nvme.rsp_len = 0;
404	nvme->u.nvme.rsp_dma = 0;	404	nvme->u.nvme.rsp_dma = 0;
405	nvme->u.nvme.exchange_address = uctx->exchange_address;	405	nvme->u.nvme.exchange_address = uctx->exchange_address;
406	nvme->u.nvme.nport_handle = uctx->nport_handle;	406	nvme->u.nvme.nport_handle = uctx->nport_handle;
407	nvme->u.nvme.ox_id = uctx->ox_id;	407	nvme->u.nvme.ox_id = uctx->ox_id;
408	dma_sync_single_for_device(&ha->pdev->dev, nvme->u.nvme.cmd_dma,	408	dma_sync_single_for_device(&ha->pdev->dev, nvme->u.nvme.cmd_dma,
409	le32_to_cpu(fd_resp->rsplen), DMA_TO_DEVICE);	409	fd_resp->rsplen, DMA_TO_DEVICE);
410		410
411	ql_dbg(ql_dbg_unsol, vha, 0x2122,	411	ql_dbg(ql_dbg_unsol, vha, 0x2122,
412	"Unsol lsreq portid=%06x %8phC exchange_address 0x%x ox_id 0x%x hdl 0x%x\n",	412	"Unsol lsreq portid=%06x %8phC exchange_address 0x%x ox_id 0x%x hdl 0x%x\n",
@@ -504,13 +504,13 @@ static int qla_nvme_ls_req(struct nvme_fc_local_port *lport, · 91 unmodified lines
504	nvme->u.nvme.desc = fd;	504	nvme->u.nvme.desc = fd;
505	nvme->u.nvme.dir = 0;	505	nvme->u.nvme.dir = 0;
506	nvme->u.nvme.dl = 0;	506	nvme->u.nvme.dl = 0;
507	nvme->u.nvme.cmd_len = fd->rqstlen;	507	nvme->u.nvme.cmd_len = cpu_to_le32(fd->rqstlen);
508	nvme->u.nvme.rsp_len = fd->rsplen;	508	nvme->u.nvme.rsp_len = cpu_to_le32(fd->rsplen);
509	nvme->u.nvme.rsp_dma = fd->rspdma;	509	nvme->u.nvme.rsp_dma = fd->rspdma;
510	nvme->u.nvme.timeout_sec = fd->timeout;	510	nvme->u.nvme.timeout_sec = fd->timeout;
511	nvme->u.nvme.cmd_dma = fd->rqstdma;	511	nvme->u.nvme.cmd_dma = fd->rqstdma;
512	dma_sync_single_for_device(&ha->pdev->dev, nvme->u.nvme.cmd_dma,	512	dma_sync_single_for_device(&ha->pdev->dev, nvme->u.nvme.cmd_dma,
513	le32_to_cpu(fd->rqstlen), DMA_TO_DEVICE);	513	fd->rqstlen, DMA_TO_DEVICE);
514		514
515	rval = qla2x00_start_sp(sp);	515	rval = qla2x00_start_sp(sp);
516	if (rval != QLA_SUCCESS) {	516	if (rval != QLA_SUCCESS) {

drivers/scsi/qla2xxx/qla_target.c+1−2

 		queue_work_on(cmd->se_cmd.cpuid, qla_tgt_wq, &cmd->work);
 	} else if (ha->msix_count) {
 		if (cmd->atio.u.isp24.fcp_cmnd.rddata)
-			queue_work_on(smp_processor_id(), qla_tgt_wq,
+			queue_work(qla_tgt_wq, &cmd->work);
-			    &cmd->work);
 		else
 			queue_work_on(cmd->se_cmd.cpuid, qla_tgt_wq,
 			    &cmd->work);

drivers/scsi/qla2xxx/tcm_qla2xxx.c+2−2

@@ -310,7 +310,7 @@ static void tcm_qla2xxx_free_cmd(struct qla_tgt_cmd *cmd) · 309 unmodified lines
310	cmd->trc_flags \|= TRC_CMD_DONE;	310	cmd->trc_flags \|= TRC_CMD_DONE;
311		311
312	INIT_WORK(&cmd->work, tcm_qla2xxx_complete_free);	312	INIT_WORK(&cmd->work, tcm_qla2xxx_complete_free);
313	queue_work_on(smp_processor_id(), tcm_qla2xxx_free_wq, &cmd->work);	313	queue_work(tcm_qla2xxx_free_wq, &cmd->work);
314	}	314	}
315		315
316	/*	316	/*
@@ -547,7 +547,7 @@ static void tcm_qla2xxx_handle_data(struct qla_tgt_cmd *cmd) · 230 unmodified lines
547	cmd->trc_flags \|= TRC_DATA_IN;	547	cmd->trc_flags \|= TRC_DATA_IN;
548	cmd->cmd_in_wq = 1;	548	cmd->cmd_in_wq = 1;
549	INIT_WORK(&cmd->work, tcm_qla2xxx_handle_data_work);	549	INIT_WORK(&cmd->work, tcm_qla2xxx_handle_data_work);
550	queue_work_on(smp_processor_id(), tcm_qla2xxx_free_wq, &cmd->work);	550	queue_work(tcm_qla2xxx_free_wq, &cmd->work);
551	}	551	}
552		552
553	static int tcm_qla2xxx_chk_dif_tags(uint32_t tag)	553	static int tcm_qla2xxx_chk_dif_tags(uint32_t tag)

drivers/scsi/scsi.c+11−0

@@ -613,6 +613,17 @@ void scsi_cdl_check(struct scsi_device *sdev) · 612 unmodified lines
613	bool cdl_supported;	613	bool cdl_supported;
614	unsigned char *buf;	614	unsigned char *buf;
615		615
		616	/*
		617	* Support for CDL was defined in SPC-5. Ignore devices reporting an
		618	* lower SPC version. This also avoids problems with old drives choking
		619	* on MAINTENANCE_IN / MI_REPORT_SUPPORTED_OPERATION_CODES with a
		620	* service action specified, as done in scsi_cdl_check_cmd().
		621	*/
		622	if (sdev->scsi_level < SCSI_SPC_5) {
		623	sdev->cdl_supported = 0;
		624	return;
		625	}
		626
616	buf = kmalloc(SCSI_CDL_CHECK_BUF_LEN, GFP_KERNEL);	627	buf = kmalloc(SCSI_CDL_CHECK_BUF_LEN, GFP_KERNEL);
617	if (!buf) {	628	if (!buf) {
618	sdev->cdl_supported = 0;	629	sdev->cdl_supported = 0;

drivers/scsi/scsi_scan.c+18−2

 	 * device is attached at LUN 0 (SCSI_SCAN_TARGET_PRESENT) so
 	 * non-zero LUNs can be scanned.
 	 */
-	sdev->scsi_level = inq_result[2] & 0x07;
+	sdev->scsi_level = inq_result[2] & 0x0f;
 	if (sdev->scsi_level >= 2 ||
 	    (sdev->scsi_level == 1 && (inq_result[3] & 0x0f) == 1))
 		sdev->scsi_level++;
 }
 EXPORT_SYMBOL(scsi_add_device);
-void scsi_rescan_device(struct scsi_device *sdev)
+int scsi_rescan_device(struct scsi_device *sdev)
 {
 	struct device *dev = &sdev->sdev_gendev;
+	int ret = 0;
 	device_lock(dev);
+	/*
+	 * Bail out if the device is not running. Otherwise, the rescan may
+	 * block waiting for commands to be executed, with us holding the
+	 * device lock. This can result in a potential deadlock in the power
+	 * management core code when system resume is on-going.
+	 */
+	if (sdev->sdev_state != SDEV_RUNNING) {
+		ret = -EWOULDBLOCK;
+		goto unlock;
+	}
 	scsi_attach_vpd(sdev);
 	scsi_cdl_check(sdev);
 			drv->rescan(dev);
 		module_put(dev->driver->owner);
 	}
+unlock:
 	device_unlock(dev);
+	return ret;
 }
 EXPORT_SYMBOL(scsi_rescan_device);

drivers/scsi/sd.c+82−19

 }
 static ssize_t
-manage_start_stop_show(struct device *dev, struct device_attribute *attr,
+manage_start_stop_show(struct device *dev,
-		       char *buf)
+		       struct device_attribute *attr, char *buf)
 {
 	struct scsi_disk *sdkp = to_scsi_disk(dev);
 	struct scsi_device *sdp = sdkp->device;
-	return sprintf(buf, "%u\n", sdp->manage_start_stop);
+	return sysfs_emit(buf, "%u\n",
+			  sdp->manage_system_start_stop &&
+			  sdp->manage_runtime_start_stop);
 }
+static DEVICE_ATTR_RO(manage_start_stop);
 static ssize_t
-manage_start_stop_store(struct device *dev, struct device_attribute *attr,
+manage_system_start_stop_show(struct device *dev,
-			const char *buf, size_t count)
+			      struct device_attribute *attr, char *buf)
+{
+	struct scsi_disk *sdkp = to_scsi_disk(dev);
+	struct scsi_device *sdp = sdkp->device;
+	return sysfs_emit(buf, "%u\n", sdp->manage_system_start_stop);
+}
+static ssize_t
+manage_system_start_stop_store(struct device *dev,
+			       struct device_attribute *attr,
+			       const char *buf, size_t count)
 {
 	struct scsi_disk *sdkp = to_scsi_disk(dev);
 	struct scsi_device *sdp = sdkp->device;
 	if (kstrtobool(buf, &v))
 		return -EINVAL;
-	sdp->manage_start_stop = v;
+	sdp->manage_system_start_stop = v;
 	return count;
 }
-static DEVICE_ATTR_RW(manage_start_stop);
+static DEVICE_ATTR_RW(manage_system_start_stop);
+static ssize_t
+manage_runtime_start_stop_show(struct device *dev,
+			       struct device_attribute *attr, char *buf)
+{
+	struct scsi_disk *sdkp = to_scsi_disk(dev);
+	struct scsi_device *sdp = sdkp->device;
+	return sysfs_emit(buf, "%u\n", sdp->manage_runtime_start_stop);
+}
+static ssize_t
+manage_runtime_start_stop_store(struct device *dev,
+				struct device_attribute *attr,
+				const char *buf, size_t count)
+{
+	struct scsi_disk *sdkp = to_scsi_disk(dev);
+	struct scsi_device *sdp = sdkp->device;
+	bool v;
+	if (!capable(CAP_SYS_ADMIN))
+		return -EACCES;
+	if (kstrtobool(buf, &v))
+		return -EINVAL;
+	sdp->manage_runtime_start_stop = v;
+	return count;
+}
+static DEVICE_ATTR_RW(manage_runtime_start_stop);
 static ssize_t
 allow_restart_show(struct device *dev, struct device_attribute *attr, char *buf)
 	&dev_attr_FUA.attr,
 	&dev_attr_allow_restart.attr,
 	&dev_attr_manage_start_stop.attr,
+	&dev_attr_manage_system_start_stop.attr,
+	&dev_attr_manage_runtime_start_stop.attr,
 	&dev_attr_protection_type.attr,
 	&dev_attr_protection_mode.attr,
 	&dev_attr_app_tag_own.attr,
 	device_del(&sdkp->disk_dev);
 	del_gendisk(sdkp->disk);
-	sd_shutdown(dev);
+	if (!sdkp->suspended)
+		sd_shutdown(dev);
 	put_disk(sdkp->disk);
 	return 0;
 		sd_sync_cache(sdkp, NULL);
 	}
-	if (system_state != SYSTEM_RESTART && sdkp->device->manage_start_stop) {
+	if (system_state != SYSTEM_RESTART &&
+	    sdkp->device->manage_system_start_stop) {
 		sd_printk(KERN_NOTICE, sdkp, "Stopping disk\n");
 		sd_start_stop_device(sdkp, 0);
 	}
 }
-static int sd_suspend_common(struct device *dev, bool ignore_stop_errors)
+static inline bool sd_do_start_stop(struct scsi_device *sdev, bool runtime)
+{
+	return (sdev->manage_system_start_stop && !runtime) ||
+		(sdev->manage_runtime_start_stop && runtime);
+}
+static int sd_suspend_common(struct device *dev, bool runtime)
 {
 	struct scsi_disk *sdkp = dev_get_drvdata(dev);
 	struct scsi_sense_hdr sshdr;
 		}
 	}
-	if (sdkp->device->manage_start_stop) {
+	if (sd_do_start_stop(sdkp->device, runtime)) {
 		if (!sdkp->device->silence_suspend)
 			sd_printk(KERN_NOTICE, sdkp, "Stopping disk\n");
 		/* an error is not worth aborting a system sleep */
 		ret = sd_start_stop_device(sdkp, 0);
-		if (ignore_stop_errors)
+		if (!runtime)
 			ret = 0;
 	}
+	if (!ret)
+		sdkp->suspended = true;
 	return ret;
 }
 	if (pm_runtime_suspended(dev))
 		return 0;
-	return sd_suspend_common(dev, true);
+	return sd_suspend_common(dev, false);
 }
 static int sd_suspend_runtime(struct device *dev)
 {
-	return sd_suspend_common(dev, false);
+	return sd_suspend_common(dev, true);
 }
-static int sd_resume(struct device *dev)
+static int sd_resume(struct device *dev, bool runtime)
 {
 	struct scsi_disk *sdkp = dev_get_drvdata(dev);
 	int ret = 0;
 	if (!sdkp)	/* E.g.: runtime resume at the start of sd_probe() */
 		return 0;
-	if (!sdkp->device->manage_start_stop)
+	if (!sd_do_start_stop(sdkp->device, runtime)) {
+		sdkp->suspended = false;
 		return 0;
+	}
 	if (!sdkp->device->no_start_on_resume) {
 		sd_printk(KERN_NOTICE, sdkp, "Starting disk\n");
 		ret = sd_start_stop_device(sdkp, 1);
 	}
-	if (!ret)
+	if (!ret) {
 		opal_unlock_from_suspend(sdkp->opal_dev);
+		sdkp->suspended = false;
+	}
 	return ret;
 }
 	if (pm_runtime_suspended(dev))
 		return 0;
-	return sd_resume(dev);
+	return sd_resume(dev, false);
 }
 static int sd_resume_runtime(struct device *dev)
 				  "Failed to clear sense data\n");
 	}
-	return sd_resume(dev);
+	return sd_resume(dev, true);
 }
 static const struct dev_pm_ops sd_pm_ops = {

drivers/scsi/sd.h+1−0

@@ -131,6 +131,7 @@ struct scsi_disk { · 130 unmodified lines
131	u8 provisioning_mode;	131	u8 provisioning_mode;
132	u8 zeroing_mode;	132	u8 zeroing_mode;
133	u8 nr_actuators; /* Number of actuators */	133	u8 nr_actuators; /* Number of actuators */
		134	bool suspended; /* Disk is suspended (stopped) */
134	unsigned ATO : 1; /* state of disk ATO bit */	135	unsigned ATO : 1; /* state of disk ATO bit */
135	unsigned cache_override : 1; /* temp override of WCE,RCD */	136	unsigned cache_override : 1; /* temp override of WCE,RCD */
136	unsigned WCE : 1; /* state of disk WCE bit */	137	unsigned WCE : 1; /* state of disk WCE bit */

drivers/soc/imx/soc-imx8m.c+10−0

 {
 	void __iomem *ocotp_base;
 	struct device_node *np;
+	struct clk *clk;
 	u32 offset = of_machine_is_compatible("fsl,imx8mp") ?
 		     IMX8MP_OCOTP_UID_OFFSET : 0;
 	ocotp_base = of_iomap(np, 0);
 	WARN_ON(!ocotp_base);
+	clk = of_clk_get_by_name(np, NULL);
+	if (IS_ERR(clk)) {
+		WARN_ON(IS_ERR(clk));
+		return;
+	}
+	clk_prepare_enable(clk);
 	soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH + offset);
 	soc_uid <<= 32;
 	soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW + offset);
+	clk_disable_unprepare(clk);
+	clk_put(clk);
 	iounmap(ocotp_base);
 	of_node_put(np);
 }

drivers/soc/loongson/Kconfig+1−0

@@ -20,6 +20,7 @@ config LOONGSON2_GUTS · 19 unmodified lines
20	config LOONGSON2_PM	20	config LOONGSON2_PM
21	bool "Loongson-2 SoC Power Management Controller Driver"	21	bool "Loongson-2 SoC Power Management Controller Driver"
22	depends on LOONGARCH && OF	22	depends on LOONGARCH && OF
		23	depends on INPUT=y
23	help	24	help
24	The Loongson-2's power management controller was ACPI, supports ACPI	25	The Loongson-2's power management controller was ACPI, supports ACPI
25	S2Idle (Suspend To Idle), ACPI S3 (Suspend To RAM), ACPI S4 (Suspend To	26	S2Idle (Suspend To Idle), ACPI S3 (Suspend To RAM), ACPI S4 (Suspend To

drivers/soc/loongson/loongson2_guts.c+2−4

 		if (matches->svr == (svr & matches->mask))
 			return matches;
 		matches++;
-	};
+	}
 	return NULL;
 }
 {
 	struct device_node *root, *np = pdev->dev.of_node;
 	struct device *dev = &pdev->dev;
-	struct resource *res;
 	const struct loongson2_soc_die_attr *soc_die;
 	const char *machine;
 	u32 svr;
 	guts->little_endian = of_property_read_bool(np, "little-endian");
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	guts->regs = devm_platform_ioremap_resource(pdev, 0);
-	guts->regs = ioremap(res->start, res->end - res->start + 1);
 	if (IS_ERR(guts->regs))
 		return PTR_ERR(guts->regs);

drivers/soc/loongson/loongson2_pm.c+6−1

 #include <linux/input.h>
 #include <linux/suspend.h>
 #include <linux/interrupt.h>
+#include <linux/of_platform.h>
 #include <linux/pm_wakeirq.h>
 #include <linux/platform_device.h>
 #include <asm/bootinfo.h>
 	if (loongson_sysconf.suspend_addr)
 		suspend_set_ops(&loongson2_suspend_ops);
+	/* Populate children */
+	retval = devm_of_platform_populate(dev);
+	if (retval)
+		dev_err(dev, "Error populating children, reboot and poweroff might not work properly\n");
 	return 0;
 }
 static const struct of_device_id loongson2_pm_match[] = {
 	{ .compatible = "loongson,ls2k0500-pmc", },
-	{ .compatible = "loongson,ls2k1000-pmc", },
 	{},
 };

drivers/spi/spi-cs42l43.c+0−1

@@ -256,7 +256,6 @@ static int cs42l43_spi_probe(struct platform_device *pdev) · 255 unmodified lines
256		256
257	ret = devm_spi_register_controller(priv->dev, priv->ctlr);	257	ret = devm_spi_register_controller(priv->dev, priv->ctlr);
258	if (ret) {	258	if (ret) {
259	pm_runtime_disable(priv->dev);
260	dev_err(priv->dev, "Failed to register SPI controller: %d\n", ret);	259	dev_err(priv->dev, "Failed to register SPI controller: %d\n", ret);
261	}	260	}
262		261

drivers/spi/spi-gxp.c+1−1

@@ -194,7 +194,7 @@ static ssize_t gxp_spi_write(struct gxp_spi_chip *chip, const struct spi_mem_op · 193 unmodified lines
194	return ret;	194	return ret;
195	}	195	}
196		196
197	return write_len;	197	return 0;
198	}	198	}
199		199
200	static int do_gxp_exec_mem_op(struct spi_mem mem, const struct spi_mem_op op)	200	static int do_gxp_exec_mem_op(struct spi_mem mem, const struct spi_mem_op op)

drivers/spi/spi-imx.c+1−1

@@ -662,7 +662,7 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx, · 661 unmodified lines
662	if (spi_imx->count >= 512)	662	if (spi_imx->count >= 512)
663	ctrl \|= 0xFFF << MX51_ECSPI_CTRL_BL_OFFSET;	663	ctrl \|= 0xFFF << MX51_ECSPI_CTRL_BL_OFFSET;
664	else	664	else
665	ctrl \|= (spi_imx->count*8 - 1)	665	ctrl \|= (spi_imx->count * spi_imx->bits_per_word - 1)
666	<< MX51_ECSPI_CTRL_BL_OFFSET;	666	<< MX51_ECSPI_CTRL_BL_OFFSET;
667	}	667	}
668		668

drivers/spi/spi-intel-pci.c+1−0

@@ -72,6 +72,7 @@ static const struct pci_device_id intel_spi_pci_ids[] = { · 71 unmodified lines
72	{ PCI_VDEVICE(INTEL, 0x4da4), (unsigned long)&bxt_info },	72	{ PCI_VDEVICE(INTEL, 0x4da4), (unsigned long)&bxt_info },
73	{ PCI_VDEVICE(INTEL, 0x51a4), (unsigned long)&cnl_info },	73	{ PCI_VDEVICE(INTEL, 0x51a4), (unsigned long)&cnl_info },
74	{ PCI_VDEVICE(INTEL, 0x54a4), (unsigned long)&cnl_info },	74	{ PCI_VDEVICE(INTEL, 0x54a4), (unsigned long)&cnl_info },
		75	{ PCI_VDEVICE(INTEL, 0x5794), (unsigned long)&cnl_info },
75	{ PCI_VDEVICE(INTEL, 0x7a24), (unsigned long)&cnl_info },	76	{ PCI_VDEVICE(INTEL, 0x7a24), (unsigned long)&cnl_info },
76	{ PCI_VDEVICE(INTEL, 0x7aa4), (unsigned long)&cnl_info },	77	{ PCI_VDEVICE(INTEL, 0x7aa4), (unsigned long)&cnl_info },
77	{ PCI_VDEVICE(INTEL, 0x7e23), (unsigned long)&cnl_info },	78	{ PCI_VDEVICE(INTEL, 0x7e23), (unsigned long)&cnl_info },

drivers/spi/spi-nxp-fspi.c+7−0

@@ -1084,6 +1084,13 @@ static int nxp_fspi_default_setup(struct nxp_fspi *f) · 1083 unmodified lines
1084	fspi_writel(f, FSPI_AHBCR_PREF_EN \| FSPI_AHBCR_RDADDROPT,	1084	fspi_writel(f, FSPI_AHBCR_PREF_EN \| FSPI_AHBCR_RDADDROPT,
1085	base + FSPI_AHBCR);	1085	base + FSPI_AHBCR);
1086		1086
		1087	/* Reset the FLSHxCR1 registers. */
		1088	reg = FSPI_FLSHXCR1_TCSH(0x3) \| FSPI_FLSHXCR1_TCSS(0x3);
		1089	fspi_writel(f, reg, base + FSPI_FLSHA1CR1);
		1090	fspi_writel(f, reg, base + FSPI_FLSHA2CR1);
		1091	fspi_writel(f, reg, base + FSPI_FLSHB1CR1);
		1092	fspi_writel(f, reg, base + FSPI_FLSHB2CR1);
		1093
1087	/* AHB Read - Set lut sequence ID for all CS. */	1094	/* AHB Read - Set lut sequence ID for all CS. */
1088	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA1CR2);	1095	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA1CR2);
1089	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA2CR2);	1096	fspi_writel(f, SEQID_LUT, base + FSPI_FLSHA2CR2);

drivers/spi/spi-stm32.c+8−0

  * @fifo_size: size of the embedded fifo in bytes
  * @cur_midi: master inter-data idleness in ns
  * @cur_speed: speed configured in Hz
+ * @cur_half_period: time of a half bit in us
  * @cur_bpw: number of bits in a single SPI data frame
  * @cur_fthlv: fifo threshold level (data frames in a single data packet)
  * @cur_comm: SPI communication mode
 	unsigned int cur_midi;
 	unsigned int cur_speed;
+	unsigned int cur_half_period;
 	unsigned int cur_bpw;
 	unsigned int cur_fthlv;
 	unsigned int cur_comm;
 	spi->cur_speed = spi->clk_rate / (1 << mbrdiv);
+	spi->cur_half_period = DIV_ROUND_CLOSEST(USEC_PER_SEC, 2 * spi->cur_speed);
 	return mbrdiv - 1;
 }
 		return;
 	}
+	/* Add a delay to make sure that transmission is ended. */
+	if (spi->cur_half_period)
+		udelay(spi->cur_half_period);
 	if (spi->cur_usedma && spi->dma_tx)
 		dmaengine_terminate_async(spi->dma_tx);
 	if (spi->cur_usedma && spi->dma_rx)

drivers/spi/spi-zynqmp-gqspi.c+8−4

 	return 0;
 clk_dis_all:
-	pm_runtime_put_sync(&pdev->dev);
-	pm_runtime_set_suspended(&pdev->dev);
 	pm_runtime_disable(&pdev->dev);
+	pm_runtime_put_noidle(&pdev->dev);
+	pm_runtime_set_suspended(&pdev->dev);
 	clk_disable_unprepare(xqspi->refclk);
 clk_dis_pclk:
 	clk_disable_unprepare(xqspi->pclk);
 {
 	struct zynqmp_qspi *xqspi = platform_get_drvdata(pdev);
+	pm_runtime_get_sync(&pdev->dev);
 	zynqmp_gqspi_write(xqspi, GQSPI_EN_OFST, 0x0);
+	pm_runtime_disable(&pdev->dev);
+	pm_runtime_put_noidle(&pdev->dev);
+	pm_runtime_set_suspended(&pdev->dev);
 	clk_disable_unprepare(xqspi->refclk);
 	clk_disable_unprepare(xqspi->pclk);
-	pm_runtime_set_suspended(&pdev->dev);
-	pm_runtime_disable(&pdev->dev);
 }
 MODULE_DEVICE_TABLE(of, zynqmp_qspi_of_match);

drivers/target/target_core_configfs.c+12−12

@@ -1392,16 +1392,16 @@ static ssize_t target_wwn_vendor_id_store(struct config_item *item, · 1391 unmodified lines
1392	/* +2 to allow for a trailing (stripped) '\n' and null-terminator */	1392	/* +2 to allow for a trailing (stripped) '\n' and null-terminator */
1393	unsigned char buf[INQUIRY_VENDOR_LEN + 2];	1393	unsigned char buf[INQUIRY_VENDOR_LEN + 2];
1394	char *stripped = NULL;	1394	char *stripped = NULL;
1395	size_t len;	1395	ssize_t len;
1396	ssize_t ret;	1396	ssize_t ret;
1397		1397
1398	len = strlcpy(buf, page, sizeof(buf));	1398	len = strscpy(buf, page, sizeof(buf));
1399	if (len < sizeof(buf)) {	1399	if (len > 0) {
1400	/* Strip any newline added from userspace. */	1400	/* Strip any newline added from userspace. */
1401	stripped = strstrip(buf);	1401	stripped = strstrip(buf);
1402	len = strlen(stripped);	1402	len = strlen(stripped);
1403	}	1403	}
1404	if (len > INQUIRY_VENDOR_LEN) {	1404	if (len < 0 \|\| len > INQUIRY_VENDOR_LEN) {
1405	pr_err("Emulated T10 Vendor Identification exceeds"	1405	pr_err("Emulated T10 Vendor Identification exceeds"
1406	" INQUIRY_VENDOR_LEN: " __stringify(INQUIRY_VENDOR_LEN)	1406	" INQUIRY_VENDOR_LEN: " __stringify(INQUIRY_VENDOR_LEN)
1407	"\n");	1407	"\n");
@@ -1448,16 +1448,16 @@ static ssize_t target_wwn_product_id_store(struct config_item *item, · 40 unmodified lines
1448	/* +2 to allow for a trailing (stripped) '\n' and null-terminator */	1448	/* +2 to allow for a trailing (stripped) '\n' and null-terminator */
1449	unsigned char buf[INQUIRY_MODEL_LEN + 2];	1449	unsigned char buf[INQUIRY_MODEL_LEN + 2];
1450	char *stripped = NULL;	1450	char *stripped = NULL;
1451	size_t len;	1451	ssize_t len;
1452	ssize_t ret;	1452	ssize_t ret;
1453		1453
1454	len = strlcpy(buf, page, sizeof(buf));	1454	len = strscpy(buf, page, sizeof(buf));
1455	if (len < sizeof(buf)) {	1455	if (len > 0) {
1456	/* Strip any newline added from userspace. */	1456	/* Strip any newline added from userspace. */
1457	stripped = strstrip(buf);	1457	stripped = strstrip(buf);
1458	len = strlen(stripped);	1458	len = strlen(stripped);
1459	}	1459	}
1460	if (len > INQUIRY_MODEL_LEN) {	1460	if (len < 0 \|\| len > INQUIRY_MODEL_LEN) {
1461	pr_err("Emulated T10 Vendor exceeds INQUIRY_MODEL_LEN: "	1461	pr_err("Emulated T10 Vendor exceeds INQUIRY_MODEL_LEN: "
1462	__stringify(INQUIRY_MODEL_LEN)	1462	__stringify(INQUIRY_MODEL_LEN)
1463	"\n");	1463	"\n");
@@ -1504,16 +1504,16 @@ static ssize_t target_wwn_revision_store(struct config_item *item, · 40 unmodified lines
1504	/* +2 to allow for a trailing (stripped) '\n' and null-terminator */	1504	/* +2 to allow for a trailing (stripped) '\n' and null-terminator */
1505	unsigned char buf[INQUIRY_REVISION_LEN + 2];	1505	unsigned char buf[INQUIRY_REVISION_LEN + 2];
1506	char *stripped = NULL;	1506	char *stripped = NULL;
1507	size_t len;	1507	ssize_t len;
1508	ssize_t ret;	1508	ssize_t ret;
1509		1509
1510	len = strlcpy(buf, page, sizeof(buf));	1510	len = strscpy(buf, page, sizeof(buf));
1511	if (len < sizeof(buf)) {	1511	if (len > 0) {
1512	/* Strip any newline added from userspace. */	1512	/* Strip any newline added from userspace. */
1513	stripped = strstrip(buf);	1513	stripped = strstrip(buf);
1514	len = strlen(stripped);	1514	len = strlen(stripped);
1515	}	1515	}
1516	if (len > INQUIRY_REVISION_LEN) {	1516	if (len < 0 \|\| len > INQUIRY_REVISION_LEN) {
1517	pr_err("Emulated T10 Revision exceeds INQUIRY_REVISION_LEN: "	1517	pr_err("Emulated T10 Revision exceeds INQUIRY_REVISION_LEN: "
1518	__stringify(INQUIRY_REVISION_LEN)	1518	__stringify(INQUIRY_REVISION_LEN)
1519	"\n");	1519	"\n");

drivers/target/target_core_transport.c+1−0

@@ -264,6 +264,7 @@ void target_free_cmd_counter(struct target_cmd_counter *cmd_cnt) · 263 unmodified lines
264	percpu_ref_put(&cmd_cnt->refcnt);	264	percpu_ref_put(&cmd_cnt->refcnt);
265		265
266	percpu_ref_exit(&cmd_cnt->refcnt);	266	percpu_ref_exit(&cmd_cnt->refcnt);
		267	kfree(cmd_cnt);
267	}	268	}
268	EXPORT_SYMBOL_GPL(target_free_cmd_counter);	269	EXPORT_SYMBOL_GPL(target_free_cmd_counter);
269		270

drivers/tee/optee/optee_private.h+0−2

@@ -238,8 +238,6 @@ int optee_notif_send(struct optee *optee, u_int key); · 237 unmodified lines
238	u32 optee_supp_thrd_req(struct tee_context *ctx, u32 func, size_t num_params,	238	u32 optee_supp_thrd_req(struct tee_context *ctx, u32 func, size_t num_params,
239	struct tee_param *param);	239	struct tee_param *param);
240		240
241	int optee_supp_read(struct tee_context ctx, void __user buf, size_t len);
242	int optee_supp_write(struct tee_context ctx, void __user buf, size_t len);
243	void optee_supp_init(struct optee_supp *supp);	241	void optee_supp_init(struct optee_supp *supp);
244	void optee_supp_uninit(struct optee_supp *supp);	242	void optee_supp_uninit(struct optee_supp *supp);
245	void optee_supp_release(struct optee_supp *supp);	243	void optee_supp_release(struct optee_supp *supp);

drivers/tee/tee_private.h+0−2

@@ -47,8 +47,6 @@ struct tee_device { · 46 unmodified lines
47	struct tee_shm_pool *pool;	47	struct tee_shm_pool *pool;
48	};	48	};
49		49
50	int tee_shm_init(void);
51
52	int tee_shm_get_fd(struct tee_shm *shm);	50	int tee_shm_get_fd(struct tee_shm *shm);
53		51
54	bool tee_device_get(struct tee_device *teedev);	52	bool tee_device_get(struct tee_device *teedev);

drivers/thermal/thermal_core.c+4−2

 	struct thermal_trip trip;
 	/* Ignore disabled trip points */
-	if (test_bit(trip_id, &tz->trips_disabled) ||
+	if (test_bit(trip_id, &tz->trips_disabled))
-	    trip.temperature == THERMAL_TEMP_INVALID)
 		return;
 	__thermal_zone_get_trip(tz, trip_id, &trip);
+	if (trip.temperature == THERMAL_TEMP_INVALID)
+		return;
 	if (tz->last_temperature != THERMAL_TEMP_INVALID) {
 		if (tz->last_temperature < trip.temperature &&
 		    tz->temperature >= trip.temperature)

drivers/thermal/thermal_of.c+6−2

 	 */
 	for_each_child_of_node(trips, t) {
-		if (t == trip)
+		if (t == trip) {
+			of_node_put(t);
 			goto out;
+		}
 		i++;
 	}
 	for_each_child_of_node(cm_np, child) {
 		ret = thermal_of_for_each_cooling_device(tz_np, child, tz, cdev, action);
-		if (ret)
+		if (ret) {
+			of_node_put(child);
 			break;
+		}
 	}
 	of_node_put(cm_np);

drivers/thermal/thermal_sysfs.c+5−4

 	if (sscanf(attr->attr.name, "trip_point_%d_hyst", &trip_id) != 1)
 		return -EINVAL;
-	if (kstrtoint(buf, 10, &trip.hysteresis))
-		return -EINVAL;
 	mutex_lock(&tz->lock);
 	if (!device_is_registered(dev)) {
 	ret = __thermal_zone_get_trip(tz, trip_id, &trip);
 	if (ret)
 		goto unlock;
+	ret = kstrtoint(buf, 10, &trip.hysteresis);
+	if (ret)
+		goto unlock;
 	ret = thermal_zone_set_trip(tz, trip_id, &trip);
 unlock:
 	mutex_unlock(&tz->lock);

drivers/thermal/ti-soc-thermal/ti-thermal-common.c+2−1

@@ -110,7 +110,8 @@ static inline int __ti_thermal_get_temp(struct thermal_zone_device tz, int tem · 109 unmodified lines
110	}	110	}
111		111
112	static int __ti_thermal_get_trend(struct thermal_zone_device *tz,	112	static int __ti_thermal_get_trend(struct thermal_zone_device *tz,
113	struct thermal_trip trip, enum thermal_trend trend)	113	const struct thermal_trip *trip,
		114	enum thermal_trend *trend)
114	{	115	{
115	struct ti_thermal_data *data = thermal_zone_device_priv(tz);	116	struct ti_thermal_data *data = thermal_zone_device_priv(tz);
116	struct ti_bandgap *bgp;	117	struct ti_bandgap *bgp;

drivers/tty/n_gsm.c+1−3

 		gsm->has_devices = false;
 	}
 	for (i = NUM_DLCI - 1; i >= 0; i--)
-		if (gsm->dlci[i]) {
+		if (gsm->dlci[i])
 			gsm_dlci_release(gsm->dlci[i]);
-			gsm->dlci[i] = NULL;
-		}
 	mutex_unlock(&gsm->mutex);
 	/* Now wipe the queues */
 	tty_ldisc_flush(gsm->tty);

drivers/tty/serial/8250/8250_port.c+4−1

 		skip_rx = true;
 	if (status & (UART_LSR_DR | UART_LSR_BI) && !skip_rx) {
-		if (irqd_is_wakeup_set(irq_get_irq_data(port->irq)))
+		struct irq_data *d;
+		d = irq_get_irq_data(port->irq);
+		if (d && irqd_is_wakeup_set(d))
 			pm_wakeup_event(tport->tty->dev, 0);
 		if (!up->dma || handle_rx_dma(up, iir))
 			status = serial8250_rx_chars(up, status);

drivers/ufs/core/ufshcd.c+7−6

 #include <linux/module.h>
 #include <linux/regulator/consumer.h>
 #include <linux/sched/clock.h>
+#include <linux/iopoll.h>
 #include <scsi/scsi_cmnd.h>
 #include <scsi/scsi_dbg.h>
 #include <scsi/scsi_driver.h>
  */
 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
 {
-	return ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY;
+	u32 val;
+	int ret = read_poll_timeout(ufshcd_readl, val, val & UIC_COMMAND_READY,
+				    500, UIC_CMD_TIMEOUT * 1000, false, hba,
+				    REG_CONTROLLER_STATUS);
+	return ret == 0 ? true : false;
 }
 /**
 		      bool completion)
 {
 	lockdep_assert_held(&hba->uic_cmd_mutex);
-	lockdep_assert_held(hba->host->host_lock);
 	if (!ufshcd_ready_for_uic_cmd(hba)) {
 		dev_err(hba->dev,
 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
 {
 	int ret;
-	unsigned long flags;
 	if (hba->quirks & UFSHCD_QUIRK_BROKEN_UIC_CMD)
 		return 0;
 	mutex_lock(&hba->uic_cmd_mutex);
 	ufshcd_add_delay_before_dme_cmd(hba);
-	spin_lock_irqsave(hba->host->host_lock, flags);
 	ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
-	spin_unlock_irqrestore(hba->host->host_lock, flags);
 	if (!ret)
 		ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
 		wmb();
 		reenable_intr = true;
 	}
-	ret = __ufshcd_send_uic_cmd(hba, cmd, false);
 	spin_unlock_irqrestore(hba->host->host_lock, flags);
+	ret = __ufshcd_send_uic_cmd(hba, cmd, false);
 	if (ret) {
 		dev_err(hba->dev,
 			"pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",

drivers/usb/typec/ucsi/debugfs.c+3−0

@@ -84,6 +84,9 @@ void ucsi_debugfs_register(struct ucsi *ucsi) · 83 unmodified lines
84		84
85	void ucsi_debugfs_unregister(struct ucsi *ucsi)	85	void ucsi_debugfs_unregister(struct ucsi *ucsi)
86	{	86	{
		87	if (IS_ERR_OR_NULL(ucsi) \|\| !ucsi->debugfs)
		88	return;
		89
87	debugfs_remove_recursive(ucsi->debugfs->dentry);	90	debugfs_remove_recursive(ucsi->debugfs->dentry);
88	kfree(ucsi->debugfs);	91	kfree(ucsi->debugfs);
89	}	92	}

drivers/vfio/mdev/mdev_sysfs.c+2−1

@@ -233,7 +233,8 @@ int parent_create_sysfs_files(struct mdev_parent *parent) · 232 unmodified lines
233	out_err:	233	out_err:
234	while (--i >= 0)	234	while (--i >= 0)
235	mdev_type_remove(parent->types[i]);	235	mdev_type_remove(parent->types[i]);
236	return 0;	236	kset_unregister(parent->mdev_types_kset);
		237	return ret;
237	}	238	}
238		239
239	static ssize_t remove_store(struct device dev, struct device_attribute attr,	240	static ssize_t remove_store(struct device dev, struct device_attribute attr,

drivers/vfio/pci/pds/Kconfig+1−1

@@ -3,7 +3,7 @@ · 2 unmodified lines
3		3
4	config PDS_VFIO_PCI	4	config PDS_VFIO_PCI
5	tristate "VFIO support for PDS PCI devices"	5	tristate "VFIO support for PDS PCI devices"
6	depends on PDS_CORE	6	depends on PDS_CORE && PCI_IOV
7	select VFIO_PCI_CORE	7	select VFIO_PCI_CORE
8	help	8	help
9	This provides generic PCI support for PDS devices using the VFIO	9	This provides generic PCI support for PDS devices using the VFIO

drivers/vfio/pci/pds/vfio_dev.c+1−1

@@ -162,7 +162,7 @@ static int pds_vfio_init_device(struct vfio_device *vdev) · 161 unmodified lines
162	pci_id = PCI_DEVID(pdev->bus->number, pdev->devfn);	162	pci_id = PCI_DEVID(pdev->bus->number, pdev->devfn);
163	dev_dbg(&pdev->dev,	163	dev_dbg(&pdev->dev,
164	"%s: PF %#04x VF %#04x vf_id %d domain %d pds_vfio %p\n",	164	"%s: PF %#04x VF %#04x vf_id %d domain %d pds_vfio %p\n",
165	__func__, pci_dev_id(pdev->physfn), pci_id, vf_id,	165	__func__, pci_dev_id(pci_physfn(pdev)), pci_id, vf_id,
166	pci_domain_nr(pdev->bus), pds_vfio);	166	pci_domain_nr(pdev->bus), pds_vfio);
167		167
168	return 0;	168	return 0;

drivers/video/console/Kconfig+1−0

@@ -73,6 +73,7 @@ config DUMMY_CONSOLE_ROWS · 72 unmodified lines
73	config FRAMEBUFFER_CONSOLE	73	config FRAMEBUFFER_CONSOLE
74	bool "Framebuffer Console support"	74	bool "Framebuffer Console support"
75	depends on FB_CORE && !UML	75	depends on FB_CORE && !UML
		76	default DRM_FBDEV_EMULATION
76	select VT_HW_CONSOLE_BINDING	77	select VT_HW_CONSOLE_BINDING
77	select CRC32	78	select CRC32
78	select FONT_SUPPORT	79	select FONT_SUPPORT

drivers/video/fbdev/Kconfig+1−1

@@ -1762,7 +1762,7 @@ config FB_COBALT · 1761 unmodified lines
1762		1762
1763	config FB_SH7760	1763	config FB_SH7760
1764	bool "SH7760/SH7763/SH7720/SH7721 LCDC support"	1764	bool "SH7760/SH7763/SH7720/SH7721 LCDC support"
1765	depends on FB && (CPU_SUBTYPE_SH7760 \|\| CPU_SUBTYPE_SH7763 \	1765	depends on FB=y && (CPU_SUBTYPE_SH7760 \|\| CPU_SUBTYPE_SH7763 \
1766	\|\| CPU_SUBTYPE_SH7720 \|\| CPU_SUBTYPE_SH7721)	1766	\|\| CPU_SUBTYPE_SH7720 \|\| CPU_SUBTYPE_SH7721)
1767	select FB_IOMEM_HELPERS	1767	select FB_IOMEM_HELPERS
1768	help	1768	help

drivers/video/fbdev/core/Kconfig+1−1

@@ -28,7 +28,7 @@ config FIRMWARE_EDID · 27 unmodified lines
28	config FB_DEVICE	28	config FB_DEVICE
29	bool "Provide legacy /dev/fb* device"	29	bool "Provide legacy /dev/fb* device"
30	depends on FB_CORE	30	depends on FB_CORE
31	default y	31	default FB
32	help	32	help
33	Say Y here if you want the legacy /dev/fb* device file and	33	Say Y here if you want the legacy /dev/fb* device file and
34	interfaces within sysfs anc procfs. It is only required if you	34	interfaces within sysfs anc procfs. It is only required if you

drivers/w1/masters/ds2482.c+1−1

@@ -551,7 +551,7 @@ static struct i2c_driver ds2482_driver = { · 550 unmodified lines
551	.driver = {	551	.driver = {
552	.name = "ds2482",	552	.name = "ds2482",
553	},	553	},
554	.probe_new = ds2482_probe,	554	.probe = ds2482_probe,
555	.remove = ds2482_remove,	555	.remove = ds2482_remove,
556	.id_table = ds2482_id,	556	.id_table = ds2482_id,
557	};	557	};

drivers/xen/events/events_base.c+2−19

@@ -1704,7 +1704,7 @@ void handle_irq_for_port(evtchn_port_t port, struct evtchn_loop_ctrl *ctrl) · 1703 unmodified lines
1704	generic_handle_irq(irq);	1704	generic_handle_irq(irq);
1705	}	1705	}
1706		1706
1707	static int __xen_evtchn_do_upcall(void)	1707	int xen_evtchn_do_upcall(void)
1708	{	1708	{
1709	struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);	1709	struct vcpu_info *vcpu_info = __this_cpu_read(xen_vcpu);
1710	int ret = vcpu_info->evtchn_upcall_pending ? IRQ_HANDLED : IRQ_NONE;	1710	int ret = vcpu_info->evtchn_upcall_pending ? IRQ_HANDLED : IRQ_NONE;
@@ -1735,24 +1735,7 @@ static int __xen_evtchn_do_upcall(void) · 24 unmodified lines
1735		1735
1736	return ret;	1736	return ret;
1737	}	1737	}
1738		1738	EXPORT_SYMBOL_GPL(xen_evtchn_do_upcall);
1739	void xen_evtchn_do_upcall(struct pt_regs *regs)
1740	{
1741	struct pt_regs *old_regs = set_irq_regs(regs);
1742
1743	irq_enter();
1744
1745	__xen_evtchn_do_upcall();
1746
1747	irq_exit();
1748	set_irq_regs(old_regs);
1749	}
1750
1751	int xen_hvm_evtchn_do_upcall(void)
1752	{
1753	return __xen_evtchn_do_upcall();
1754	}
1755	EXPORT_SYMBOL_GPL(xen_hvm_evtchn_do_upcall);
1756		1739
1757	/* Rebind a new event channel to an existing irq. */	1740	/* Rebind a new event channel to an existing irq. */
1758	void rebind_evtchn_irq(evtchn_port_t evtchn, int irq)	1741	void rebind_evtchn_irq(evtchn_port_t evtchn, int irq)

drivers/xen/platform-pci.c+1−1

@@ -64,7 +64,7 @@ static uint64_t get_callback_via(struct pci_dev *pdev) · 63 unmodified lines
64		64
65	static irqreturn_t do_hvm_evtchn_intr(int irq, void *dev_id)	65	static irqreturn_t do_hvm_evtchn_intr(int irq, void *dev_id)
66	{	66	{
67	return xen_hvm_evtchn_do_upcall();	67	return xen_evtchn_do_upcall();
68	}	68	}
69		69
70	static int xen_allocate_irq(struct pci_dev *pdev)	70	static int xen_allocate_irq(struct pci_dev *pdev)

fs/aio.c+1−1

@@ -80,7 +80,7 @@ struct aio_ring { · 79 unmodified lines
80	struct kioctx_table {	80	struct kioctx_table {
81	struct rcu_head rcu;	81	struct rcu_head rcu;
82	unsigned nr;	82	unsigned nr;
83	struct kioctx __rcu *table[];	83	struct kioctx __rcu *table[] __counted_by(nr);
84	};	84	};
85		85
86	struct kioctx_cpu {	86	struct kioctx_cpu {

fs/binfmt_elf_fdpic.c+2−3

 	/* there's now no turning back... the old userspace image is dead,
 	 * defunct, deceased, etc.
 	 */
+	SET_PERSONALITY(exec_params.hdr);
 	if (elf_check_fdpic(&exec_params.hdr))
-		set_personality(PER_LINUX_FDPIC);
+		current->personality |= PER_LINUX_FDPIC;
-	else
-		set_personality(PER_LINUX);
 	if (elf_read_implies_exec(&exec_params.hdr, executable_stack))
 		current->personality |= READ_IMPLIES_EXEC;

fs/btrfs/Kconfig+1−1

@@ -31,7 +31,7 @@ config BTRFS_FS · 30 unmodified lines
31	continue to be mountable and usable by newer kernels.	31	continue to be mountable and usable by newer kernels.
32		32
33	For more information, please see the web pages at	33	For more information, please see the web pages at
34	http://btrfs.wiki.kernel.org.	34	https://btrfs.readthedocs.io
35		35
36	To compile this file system support as a module, choose M here. The	36	To compile this file system support as a module, choose M here. The
37	module will be called btrfs.	37	module will be called btrfs.

fs/btrfs/block-group.c+10−2

 	btrfs_mark_buffer_dirty(leaf);
 fail:
 	btrfs_release_path(path);
-	/* We didn't update the block group item, need to revert @commit_used. */
+	/*
-	if (ret < 0) {
+	 * We didn't update the block group item, need to revert commit_used
+	 * unless the block group item didn't exist yet - this is to prevent a
+	 * race with a concurrent insertion of the block group item, with
+	 * insert_block_group_item(), that happened just after we attempted to
+	 * update. In that case we would reset commit_used to 0 just after the
+	 * insertion set it to a value greater than 0 - if the block group later
+	 * becomes with 0 used bytes, we would incorrectly skip its update.
+	 */
+	if (ret < 0 && ret != -ENOENT) {
 		spin_lock(&cache->lock);
 		cache->commit_used = old_commit_used;
 		spin_unlock(&cache->lock);

fs/btrfs/delayed-inode.c+71−33

 static void __btrfs_remove_delayed_item(struct btrfs_delayed_item *delayed_item)
 {
+	struct btrfs_delayed_node *delayed_node = delayed_item->delayed_node;
 	struct rb_root_cached *root;
 	struct btrfs_delayed_root *delayed_root;
 	if (RB_EMPTY_NODE(&delayed_item->rb_node))
 		return;
-	delayed_root = delayed_item->delayed_node->root->fs_info->delayed_root;
+	/* If it's in a rbtree, then we need to have delayed node locked. */
+	lockdep_assert_held(&delayed_node->mutex);
+	delayed_root = delayed_node->root->fs_info->delayed_root;
 	BUG_ON(!delayed_root);
 	if (delayed_item->type == BTRFS_DELAYED_INSERTION_ITEM)
-		root = &delayed_item->delayed_node->ins_root;
+		root = &delayed_node->ins_root;
 	else
-		root = &delayed_item->delayed_node->del_root;
+		root = &delayed_node->del_root;
 	rb_erase_cached(&delayed_item->rb_node, root);
 	RB_CLEAR_NODE(&delayed_item->rb_node);
-	delayed_item->delayed_node->count--;
+	delayed_node->count--;
 	finish_one_item(delayed_root);
 }
 		ret = __btrfs_commit_inode_delayed_items(trans, path,
 							 curr_node);
 		if (ret) {
-			btrfs_release_delayed_node(curr_node);
-			curr_node = NULL;
 			btrfs_abort_transaction(trans, ret);
 			break;
 		}
 		prev_node = curr_node;
 		curr_node = btrfs_next_delayed_node(curr_node);
+		/*
+		 * See the comment below about releasing path before releasing
+		 * node. If the commit of delayed items was successful the path
+		 * should always be released, but in case of an error, it may
+		 * point to locked extent buffers (a leaf at the very least).
+		 */
+		ASSERT(path->nodes[0] == NULL);
 		btrfs_release_delayed_node(prev_node);
 	}
+	/*
+	 * Release the path to avoid a potential deadlock and lockdep splat when
+	 * releasing the delayed node, as that requires taking the delayed node's
+	 * mutex. If another task starts running delayed items before we take
+	 * the mutex, it will first lock the mutex and then it may try to lock
+	 * the same btree path (leaf).
+	 */
+	btrfs_free_path(path);
 	if (curr_node)
 		btrfs_release_delayed_node(curr_node);
-	btrfs_free_path(path);
 	trans->block_rsv = block_rsv;
 	return ret;
 	btrfs_wq_run_delayed_node(delayed_root, fs_info, BTRFS_DELAYED_BATCH);
 }
-/* Will return 0 or -ENOMEM */
+static void btrfs_release_dir_index_item_space(struct btrfs_trans_handle *trans)
+{
+	struct btrfs_fs_info *fs_info = trans->fs_info;
+	const u64 bytes = btrfs_calc_insert_metadata_size(fs_info, 1);
+	if (test_bit(BTRFS_FS_LOG_RECOVERING, &fs_info->flags))
+		return;
+	/*
+	 * Adding the new dir index item does not require touching another
+	 * leaf, so we can release 1 unit of metadata that was previously
+	 * reserved when starting the transaction. This applies only to
+	 * the case where we had a transaction start and excludes the
+	 * transaction join case (when replaying log trees).
+	 */
+	trace_btrfs_space_reservation(fs_info, "transaction",
+				      trans->transid, bytes, 0);
+	btrfs_block_rsv_release(fs_info, trans->block_rsv, bytes, NULL);
+	ASSERT(trans->bytes_reserved >= bytes);
+	trans->bytes_reserved -= bytes;
+}
+/* Will return 0, -ENOMEM or -EEXIST (index number collision, unexpected). */
 int btrfs_insert_delayed_dir_index(struct btrfs_trans_handle *trans,
 				   const char *name, int name_len,
 				   struct btrfs_inode *dir,
 	mutex_lock(&delayed_node->mutex);
+	/*
+	 * First attempt to insert the delayed item. This is to make the error
+	 * handling path simpler in case we fail (-EEXIST). There's no risk of
+	 * any other task coming in and running the delayed item before we do
+	 * the metadata space reservation below, because we are holding the
+	 * delayed node's mutex and that mutex must also be locked before the
+	 * node's delayed items can be run.
+	 */
+	ret = __btrfs_add_delayed_item(delayed_node, delayed_item);
+	if (unlikely(ret)) {
+		btrfs_err(trans->fs_info,
+"error adding delayed dir index item, name: %.*s, index: %llu, root: %llu, dir: %llu, dir->index_cnt: %llu, delayed_node->index_cnt: %llu, error: %d",
+			  name_len, name, index, btrfs_root_id(delayed_node->root),
+			  delayed_node->inode_id, dir->index_cnt,
+			  delayed_node->index_cnt, ret);
+		btrfs_release_delayed_item(delayed_item);
+		btrfs_release_dir_index_item_space(trans);
+		mutex_unlock(&delayed_node->mutex);
+		goto release_node;
+	}
 	if (delayed_node->index_item_leaves == 0 ||
 	    delayed_node->curr_index_batch_size + data_len > leaf_data_size) {
 		delayed_node->curr_index_batch_size = data_len;
 		 * impossible.
 		 */
 		if (WARN_ON(ret)) {
-			mutex_unlock(&delayed_node->mutex);
 			btrfs_release_delayed_item(delayed_item);
+			mutex_unlock(&delayed_node->mutex);
 			goto release_node;
 		}
 		delayed_node->index_item_leaves++;
-	} else if (!test_bit(BTRFS_FS_LOG_RECOVERING, &fs_info->flags)) {
+	} else {
-		const u64 bytes = btrfs_calc_insert_metadata_size(fs_info, 1);
+		btrfs_release_dir_index_item_space(trans);
-		/*
-		 * Adding the new dir index item does not require touching another
-		 * leaf, so we can release 1 unit of metadata that was previously
-		 * reserved when starting the transaction. This applies only to
-		 * the case where we had a transaction start and excludes the
-		 * transaction join case (when replaying log trees).
-		 */
-		trace_btrfs_space_reservation(fs_info, "transaction",
-					      trans->transid, bytes, 0);
-		btrfs_block_rsv_release(fs_info, trans->block_rsv, bytes, NULL);
-		ASSERT(trans->bytes_reserved >= bytes);
-		trans->bytes_reserved -= bytes;
-	}
-	ret = __btrfs_add_delayed_item(delayed_node, delayed_item);
-	if (unlikely(ret)) {
-		btrfs_err(trans->fs_info,
-			  "err add delayed dir index item(name: %.*s) into the insertion tree of the delayed node(root id: %llu, inode id: %llu, errno: %d)",
-			  name_len, name, delayed_node->root->root_key.objectid,
-			  delayed_node->inode_id, ret);
-		BUG();
 	}
 	mutex_unlock(&delayed_node->mutex);

fs/btrfs/delayed-ref.c+35−11

@@ -103,24 +103,17 @@ void btrfs_update_delayed_refs_rsv(struct btrfs_trans_handle *trans) · 102 unmodified lines
103	* Transfer bytes to our delayed refs rsv.	103	* Transfer bytes to our delayed refs rsv.
104	*	104	*
105	* @fs_info: the filesystem	105	* @fs_info: the filesystem
106	* @src: source block rsv to transfer from
107	* @num_bytes: number of bytes to transfer	106	* @num_bytes: number of bytes to transfer
108	*	107	*
109	* This transfers up to the num_bytes amount from the src rsv to the	108	* This transfers up to the num_bytes amount, previously reserved, to the
110	* delayed_refs_rsv. Any extra bytes are returned to the space info.	109	* delayed_refs_rsv. Any extra bytes are returned to the space info.
111	*/	110	*/
112	void btrfs_migrate_to_delayed_refs_rsv(struct btrfs_fs_info *fs_info,	111	void btrfs_migrate_to_delayed_refs_rsv(struct btrfs_fs_info *fs_info,
113	struct btrfs_block_rsv *src,
114	u64 num_bytes)	112	u64 num_bytes)
115	{	113	{
116	struct btrfs_block_rsv *delayed_refs_rsv = &fs_info->delayed_refs_rsv;	114	struct btrfs_block_rsv *delayed_refs_rsv = &fs_info->delayed_refs_rsv;
117	u64 to_free = 0;	115	u64 to_free = 0;
118		116
119	spin_lock(&src->lock);
120	src->reserved -= num_bytes;
121	src->size -= num_bytes;
122	spin_unlock(&src->lock);
123
124	spin_lock(&delayed_refs_rsv->lock);	117	spin_lock(&delayed_refs_rsv->lock);
125	if (delayed_refs_rsv->size > delayed_refs_rsv->reserved) {	118	if (delayed_refs_rsv->size > delayed_refs_rsv->reserved) {
126	u64 delta = delayed_refs_rsv->size -	119	u64 delta = delayed_refs_rsv->size -
@@ -163,6 +156,8 @@ int btrfs_delayed_refs_rsv_refill(struct btrfs_fs_info *fs_info, · 36 unmodified lines
163	struct btrfs_block_rsv *block_rsv = &fs_info->delayed_refs_rsv;	156	struct btrfs_block_rsv *block_rsv = &fs_info->delayed_refs_rsv;
164	u64 limit = btrfs_calc_delayed_ref_bytes(fs_info, 1);	157	u64 limit = btrfs_calc_delayed_ref_bytes(fs_info, 1);
165	u64 num_bytes = 0;	158	u64 num_bytes = 0;
		159	u64 refilled_bytes;
		160	u64 to_free;
166	int ret = -ENOSPC;	161	int ret = -ENOSPC;
167		162
168	spin_lock(&block_rsv->lock);	163	spin_lock(&block_rsv->lock);
@@ -178,9 +173,38 @@ int btrfs_delayed_refs_rsv_refill(struct btrfs_fs_info *fs_info, · 9 unmodified lines
178	ret = btrfs_reserve_metadata_bytes(fs_info, block_rsv, num_bytes, flush);	173	ret = btrfs_reserve_metadata_bytes(fs_info, block_rsv, num_bytes, flush);
179	if (ret)	174	if (ret)
180	return ret;	175	return ret;
181	btrfs_block_rsv_add_bytes(block_rsv, num_bytes, false);	176
182	trace_btrfs_space_reservation(fs_info, "delayed_refs_rsv",	177	/*
183	0, num_bytes, 1);	178	* We may have raced with someone else, so check again if we the block
		179	* reserve is still not full and release any excess space.
		180	*/
		181	spin_lock(&block_rsv->lock);
		182	if (block_rsv->reserved < block_rsv->size) {
		183	u64 needed = block_rsv->size - block_rsv->reserved;
		184
		185	if (num_bytes >= needed) {
		186	block_rsv->reserved += needed;
		187	block_rsv->full = true;
		188	to_free = num_bytes - needed;
		189	refilled_bytes = needed;
		190	} else {
		191	block_rsv->reserved += num_bytes;
		192	to_free = 0;
		193	refilled_bytes = num_bytes;
		194	}
		195	} else {
		196	to_free = num_bytes;
		197	refilled_bytes = 0;
		198	}
		199	spin_unlock(&block_rsv->lock);
		200
		201	if (to_free > 0)
		202	btrfs_space_info_free_bytes_may_use(fs_info, block_rsv->space_info,
		203	to_free);
		204
		205	if (refilled_bytes > 0)
		206	trace_btrfs_space_reservation(fs_info, "delayed_refs_rsv", 0,
		207	refilled_bytes, 1);
184	return 0;	208	return 0;
185	}	209	}
186		210

fs/btrfs/delayed-ref.h+0−1

@@ -407,7 +407,6 @@ void btrfs_update_delayed_refs_rsv(struct btrfs_trans_handle *trans); · 406 unmodified lines
407	int btrfs_delayed_refs_rsv_refill(struct btrfs_fs_info *fs_info,	407	int btrfs_delayed_refs_rsv_refill(struct btrfs_fs_info *fs_info,
408	enum btrfs_reserve_flush_enum flush);	408	enum btrfs_reserve_flush_enum flush);
409	void btrfs_migrate_to_delayed_refs_rsv(struct btrfs_fs_info *fs_info,	409	void btrfs_migrate_to_delayed_refs_rsv(struct btrfs_fs_info *fs_info,
410	struct btrfs_block_rsv *src,
411	u64 num_bytes);	410	u64 num_bytes);
412	bool btrfs_check_space_for_delayed_refs(struct btrfs_fs_info *fs_info);	411	bool btrfs_check_space_for_delayed_refs(struct btrfs_fs_info *fs_info);
413		412

fs/btrfs/disk-io.c+12−10

 		struct folio *folio)
 {
 	struct btrfs_fs_info *fs_info = btrfs_sb(mapping->host->i_sb);
+	struct btrfs_subpage_info *spi = fs_info->subpage_info;
 	struct btrfs_subpage *subpage;
 	struct extent_buffer *eb;
 	int cur_bit = 0;
 		btrfs_assert_tree_write_locked(eb);
 		return filemap_dirty_folio(mapping, folio);
 	}
+	ASSERT(spi);
 	subpage = folio_get_private(folio);
-	ASSERT(subpage->dirty_bitmap);
+	for (cur_bit = spi->dirty_offset;
-	while (cur_bit < BTRFS_SUBPAGE_BITMAP_SIZE) {
+	     cur_bit < spi->dirty_offset + spi->bitmap_nr_bits;
+	     cur_bit++) {
 		unsigned long flags;
 		u64 cur;
-		u16 tmp = (1 << cur_bit);
 		spin_lock_irqsave(&subpage->lock, flags);
-		if (!(tmp & subpage->dirty_bitmap)) {
+		if (!test_bit(cur_bit, subpage->bitmaps)) {
 			spin_unlock_irqrestore(&subpage->lock, flags);
-			cur_bit++;
 			continue;
 		}
 		spin_unlock_irqrestore(&subpage->lock, flags);
 		btrfs_assert_tree_write_locked(eb);
 		free_extent_buffer(eb);
-		cur_bit += (fs_info->nodesize >> fs_info->sectorsize_bits);
+		cur_bit += (fs_info->nodesize >> fs_info->sectorsize_bits) - 1;
 	}
 	return filemap_dirty_folio(mapping, folio);
 }
 		delta = ktime_get_seconds() - cur->start_time;
 		if (!test_and_clear_bit(BTRFS_FS_COMMIT_TRANS, &fs_info->flags) &&
-		    cur->state < TRANS_STATE_COMMIT_START &&
+		    cur->state < TRANS_STATE_COMMIT_PREP &&
 		    delta < fs_info->commit_interval) {
 			spin_unlock(&fs_info->trans_lock);
 			delay -= msecs_to_jiffies((delta - 1) * 1000);
 	btrfs_lockdep_init_map(fs_info, btrfs_trans_num_extwriters);
 	btrfs_lockdep_init_map(fs_info, btrfs_trans_pending_ordered);
 	btrfs_lockdep_init_map(fs_info, btrfs_ordered_extent);
-	btrfs_state_lockdep_init_map(fs_info, btrfs_trans_commit_start,
+	btrfs_state_lockdep_init_map(fs_info, btrfs_trans_commit_prep,
-				     BTRFS_LOCKDEP_TRANS_COMMIT_START);
+				     BTRFS_LOCKDEP_TRANS_COMMIT_PREP);
 	btrfs_state_lockdep_init_map(fs_info, btrfs_trans_unblocked,
 				     BTRFS_LOCKDEP_TRANS_UNBLOCKED);
 	btrfs_state_lockdep_init_map(fs_info, btrfs_trans_super_committed,
 	while (!list_empty(&fs_info->trans_list)) {
 		t = list_first_entry(&fs_info->trans_list,
 				     struct btrfs_transaction, list);
-		if (t->state >= TRANS_STATE_COMMIT_START) {
+		if (t->state >= TRANS_STATE_COMMIT_PREP) {
 			refcount_inc(&t->use_count);
 			spin_unlock(&fs_info->trans_lock);
 			btrfs_wait_for_commit(fs_info, t->transid);

fs/btrfs/extent-tree.c+10−8

@@ -1514,15 +1514,14 @@ static int __btrfs_inc_extent_ref(struct btrfs_trans_handle *trans, · 1513 unmodified lines
1514	btrfs_release_path(path);	1514	btrfs_release_path(path);
1515		1515
1516	/* now insert the actual backref */	1516	/* now insert the actual backref */
1517	if (owner < BTRFS_FIRST_FREE_OBJECTID) {	1517	if (owner < BTRFS_FIRST_FREE_OBJECTID)
1518	BUG_ON(refs_to_add != 1);
1519	ret = insert_tree_block_ref(trans, path, bytenr, parent,	1518	ret = insert_tree_block_ref(trans, path, bytenr, parent,
1520	root_objectid);	1519	root_objectid);
1521	} else {	1520	else
1522	ret = insert_extent_data_ref(trans, path, bytenr, parent,	1521	ret = insert_extent_data_ref(trans, path, bytenr, parent,
1523	root_objectid, owner, offset,	1522	root_objectid, owner, offset,
1524	refs_to_add);	1523	refs_to_add);
1525	}	1524
1526	if (ret)	1525	if (ret)
1527	btrfs_abort_transaction(trans, ret);	1526	btrfs_abort_transaction(trans, ret);
1528	out:	1527	out:
@@ -1656,7 +1655,10 @@ again: · 127 unmodified lines
1656	goto again;	1655	goto again;
1657	}	1656	}
1658	} else {	1657	} else {
1659	err = -EIO;	1658	err = -EUCLEAN;
		1659	btrfs_err(fs_info,
		1660	"missing extent item for extent %llu num_bytes %llu level %d",
		1661	head->bytenr, head->num_bytes, extent_op->level);
1660	goto out;	1662	goto out;
1661	}	1663	}
1662	}	1664	}
@@ -1699,12 +1701,12 @@ static int run_delayed_tree_ref(struct btrfs_trans_handle *trans, · 36 unmodified lines
1699	parent = ref->parent;	1701	parent = ref->parent;
1700	ref_root = ref->root;	1702	ref_root = ref->root;
1701		1703
1702	if (node->ref_mod != 1) {	1704	if (unlikely(node->ref_mod != 1)) {
1703	btrfs_err(trans->fs_info,	1705	btrfs_err(trans->fs_info,
1704	"btree block(%llu) has %d references rather than 1: action %d ref_root %llu parent %llu",	1706	"btree block %llu has %d references rather than 1: action %d ref_root %llu parent %llu",
1705	node->bytenr, node->ref_mod, node->action, ref_root,	1707	node->bytenr, node->ref_mod, node->action, ref_root,
1706	parent);	1708	parent);
1707	return -EIO;	1709	return -EUCLEAN;
1708	}	1710	}
1709	if (node->action == BTRFS_ADD_DELAYED_REF && insert_reserved) {	1711	if (node->action == BTRFS_ADD_DELAYED_REF && insert_reserved) {
1710	BUG_ON(!extent_op \|\| !extent_op->update_flags);	1712	BUG_ON(!extent_op \|\| !extent_op->update_flags);

fs/btrfs/extent_io.c+8−9

 				   bvec->bv_offset, bvec->bv_len);
 		btrfs_finish_ordered_extent(bbio->ordered, page, start, len, !error);
-		if (error) {
+		if (error)
-			btrfs_page_clear_uptodate(fs_info, page, start, len);
 			mapping_set_error(page->mapping, error);
-		}
 		btrfs_page_clear_writeback(fs_info, page, start, len);
 	}
 	if (ret) {
 		btrfs_mark_ordered_io_finished(BTRFS_I(inode), page, page_start,
 					       PAGE_SIZE, !ret);
-		btrfs_page_clear_uptodate(btrfs_sb(inode->i_sb), page,
-					  page_start, PAGE_SIZE);
 		mapping_set_error(page->mapping, ret);
 	}
 	unlock_page(page);
 		struct page *page = bvec->bv_page;
 		u32 len = bvec->bv_len;
-		if (!uptodate)
-			btrfs_page_clear_uptodate(fs_info, page, start, len);
 		btrfs_page_clear_writeback(fs_info, page, start, len);
 		bio_offset += len;
 	}
 		if (ret) {
 			btrfs_mark_ordered_io_finished(BTRFS_I(inode), page,
 						       cur, cur_len, !ret);
-			btrfs_page_clear_uptodate(fs_info, page, cur, cur_len);
 			mapping_set_error(page->mapping, ret);
 		}
 		btrfs_page_unlock_writer(fs_info, page, cur, cur_len);
 	char *dst = (char *)dstv;
 	unsigned long i = get_eb_page_index(start);
-	if (check_eb_range(eb, start, len))
+	if (check_eb_range(eb, start, len)) {
+		/*
+		 * Invalid range hit, reset the memory, so callers won't get
+		 * some random garbage for their uninitialzed memory.
+		 */
+		memset(dstv, 0, len);
 		return;
+	}
 	offset = get_eb_offset_in_page(eb, start);

fs/btrfs/file.c+34−6

@@ -1106,6 +1106,25 @@ void btrfs_check_nocow_unlock(struct btrfs_inode *inode) · 1105 unmodified lines
1106	btrfs_drew_write_unlock(&inode->root->snapshot_lock);	1106	btrfs_drew_write_unlock(&inode->root->snapshot_lock);
1107	}	1107	}
1108		1108
		1109	static void update_time_for_write(struct inode *inode)
		1110	{
		1111	struct timespec64 now, ctime;
		1112
		1113	if (IS_NOCMTIME(inode))
		1114	return;
		1115
		1116	now = current_time(inode);
		1117	if (!timespec64_equal(&inode->i_mtime, &now))
		1118	inode->i_mtime = now;
		1119
		1120	ctime = inode_get_ctime(inode);
		1121	if (!timespec64_equal(&ctime, &now))
		1122	inode_set_ctime_to_ts(inode, now);
		1123
		1124	if (IS_I_VERSION(inode))
		1125	inode_inc_iversion(inode);
		1126	}
		1127
1109	static int btrfs_write_check(struct kiocb iocb, struct iov_iter from,	1128	static int btrfs_write_check(struct kiocb iocb, struct iov_iter from,
1110	size_t count)	1129	size_t count)
1111	{	1130	{
@@ -1137,10 +1156,7 @@ static int btrfs_write_check(struct kiocb iocb, struct iov_iter from, · 25 unmodified lines
1137	* need to start yet another transaction to update the inode as we will	1156	* need to start yet another transaction to update the inode as we will
1138	* update the inode when we finish writing whatever data we write.	1157	* update the inode when we finish writing whatever data we write.
1139	*/	1158	*/
1140	if (!IS_NOCMTIME(inode)) {	1159	update_time_for_write(inode);
1141	inode->i_mtime = inode_set_ctime_current(inode);
1142	inode_inc_iversion(inode);
1143	}
1144		1160
1145	start_pos = round_down(pos, fs_info->sectorsize);	1161	start_pos = round_down(pos, fs_info->sectorsize);
1146	oldsize = i_size_read(inode);	1162	oldsize = i_size_read(inode);
@@ -1451,8 +1467,13 @@ static ssize_t btrfs_direct_write(struct kiocb iocb, struct iov_iter from) · 304 unmodified lines
1451	if (iocb->ki_flags & IOCB_NOWAIT)	1467	if (iocb->ki_flags & IOCB_NOWAIT)
1452	ilock_flags \|= BTRFS_ILOCK_TRY;	1468	ilock_flags \|= BTRFS_ILOCK_TRY;
1453		1469
1454	/* If the write DIO is within EOF, use a shared lock */	1470	/*
1455	if (iocb->ki_pos + iov_iter_count(from) <= i_size_read(inode))	1471	* If the write DIO is within EOF, use a shared lock and also only if
		1472	* security bits will likely not be dropped by file_remove_privs() called
		1473	* from btrfs_write_check(). Either will need to be rechecked after the
		1474	* lock was acquired.
		1475	*/
		1476	if (iocb->ki_pos + iov_iter_count(from) <= i_size_read(inode) && IS_NOSEC(inode))
1456	ilock_flags \|= BTRFS_ILOCK_SHARED;	1477	ilock_flags \|= BTRFS_ILOCK_SHARED;
1457		1478
1458	relock:	1479	relock:
@@ -1460,6 +1481,13 @@ relock: · 1 unmodified line
1460	if (err < 0)	1481	if (err < 0)
1461	return err;	1482	return err;
1462		1483
		1484	/* Shared lock cannot be used with security bits set. */
		1485	if ((ilock_flags & BTRFS_ILOCK_SHARED) && !IS_NOSEC(inode)) {
		1486	btrfs_inode_unlock(BTRFS_I(inode), ilock_flags);
		1487	ilock_flags &= ~BTRFS_ILOCK_SHARED;
		1488	goto relock;
		1489	}
		1490
1463	err = generic_write_checks(iocb, from);	1491	err = generic_write_checks(iocb, from);
1464	if (err <= 0) {	1492	if (err <= 0) {
1465	btrfs_inode_unlock(BTRFS_I(inode), ilock_flags);	1493	btrfs_inode_unlock(BTRFS_I(inode), ilock_flags);

fs/btrfs/inode.c+23−10

 			btrfs_mark_ordered_io_finished(inode, locked_page,
 						       page_start, PAGE_SIZE,
 						       !ret);
-			btrfs_page_clear_uptodate(inode->root->fs_info,
-						  locked_page, page_start,
-						  PAGE_SIZE);
 			mapping_set_error(locked_page->mapping, ret);
 			unlock_page(locked_page);
 		}
 		mapping_set_error(page->mapping, ret);
 		btrfs_mark_ordered_io_finished(inode, page, page_start,
 					       PAGE_SIZE, !ret);
-		btrfs_page_clear_uptodate(fs_info, page, page_start, PAGE_SIZE);
 		clear_page_dirty_for_io(page);
 	}
 	btrfs_page_clear_checked(fs_info, page, page_start, PAGE_SIZE);
 static int btrfs_get_dir_last_index(struct btrfs_inode *dir, u64 *index)
 {
-	if (dir->index_cnt == (u64)-1) {
+	int ret = 0;
-		int ret;
+	btrfs_inode_lock(dir, 0);
+	if (dir->index_cnt == (u64)-1) {
 		ret = btrfs_inode_delayed_dir_index_count(dir);
 		if (ret) {
 			ret = btrfs_set_inode_index_count(dir);
 			if (ret)
-				return ret;
+				goto out;
 		}
 	}
-	*index = dir->index_cnt;
+	/* index_cnt is the index number of next new entry, so decrement it. */
+	*index = dir->index_cnt - 1;
+out:
+	btrfs_inode_unlock(dir, 0);
-	return 0;
+	return ret;
 }
 /*
 	return 0;
 }
+static loff_t btrfs_dir_llseek(struct file *file, loff_t offset, int whence)
+{
+	struct btrfs_file_private *private = file->private_data;
+	int ret;
+	ret = btrfs_get_dir_last_index(BTRFS_I(file_inode(file)),
+				       &private->last_index);
+	if (ret)
+		return ret;
+	return generic_file_llseek(file, offset, whence);
+}
 struct dir_entry {
 	u64 ino;
 	u64 offset;
 };
 static const struct file_operations btrfs_dir_file_operations = {
-	.llseek		= generic_file_llseek,
+	.llseek		= btrfs_dir_llseek,
 	.read		= generic_read_dir,
 	.iterate_shared	= btrfs_real_readdir,
 	.open		= btrfs_opendir,

fs/btrfs/ioctl.c+7−1

 				goto out_put;
 			}
+			/*
+			 * We don't need the path anymore, so release it and
+			 * avoid deadlocks and lockdep warnings in case
+			 * btrfs_iget() needs to lookup the inode from its root
+			 * btree and lock the same leaf.
+			 */
+			btrfs_release_path(path);
 			temp_inode = btrfs_iget(sb, key2.objectid, root);
 			if (IS_ERR(temp_inode)) {
 				ret = PTR_ERR(temp_inode);
 				goto out_put;
 			}
-			btrfs_release_path(path);
 			key.objectid = key.offset;
 			key.offset = (u64)-1;
 			dirid = key.objectid;

fs/btrfs/locking.h+1−1

@@ -79,7 +79,7 @@ enum btrfs_lock_nesting { · 78 unmodified lines
79	};	79	};
80		80
81	enum btrfs_lockdep_trans_states {	81	enum btrfs_lockdep_trans_states {
82	BTRFS_LOCKDEP_TRANS_COMMIT_START,	82	BTRFS_LOCKDEP_TRANS_COMMIT_PREP,
83	BTRFS_LOCKDEP_TRANS_UNBLOCKED,	83	BTRFS_LOCKDEP_TRANS_UNBLOCKED,
84	BTRFS_LOCKDEP_TRANS_SUPER_COMMITTED,	84	BTRFS_LOCKDEP_TRANS_SUPER_COMMITTED,
85	BTRFS_LOCKDEP_TRANS_COMPLETED,	85	BTRFS_LOCKDEP_TRANS_COMPLETED,

fs/btrfs/ordered-data.c+1−1

@@ -639,7 +639,7 @@ void btrfs_remove_ordered_extent(struct btrfs_inode *btrfs_inode, · 638 unmodified lines
639	refcount_inc(&trans->use_count);	639	refcount_inc(&trans->use_count);
640	spin_unlock(&fs_info->trans_lock);	640	spin_unlock(&fs_info->trans_lock);
641		641
642	ASSERT(trans);	642	ASSERT(trans \|\| BTRFS_FS_ERROR(fs_info));
643	if (trans) {	643	if (trans) {
644	if (atomic_dec_and_test(&trans->pending_ordered))	644	if (atomic_dec_and_test(&trans->pending_ordered))
645	wake_up(&trans->pending_wait);	645	wake_up(&trans->pending_wait);

fs/btrfs/super.c+3−4

 	 * calculated f_bavail.
 	 */
 	if (!mixed && block_rsv->space_info->full &&
-	    total_free_meta - thresh < block_rsv->size)
+	    (total_free_meta < thresh || total_free_meta - thresh < block_rsv->size))
 		buf->f_bavail = 0;
 	buf->f_type = BTRFS_SUPER_MAGIC;
 	.name		= "btrfs",
 	.mount		= btrfs_mount,
 	.kill_sb	= btrfs_kill_super,
-	.fs_flags	= FS_REQUIRES_DEV | FS_BINARY_MOUNTDATA | FS_MGTIME,
+	.fs_flags	= FS_REQUIRES_DEV | FS_BINARY_MOUNTDATA,
 };
 static struct file_system_type btrfs_root_fs_type = {
 	.name		= "btrfs",
 	.mount		= btrfs_mount_root,
 	.kill_sb	= btrfs_kill_super,
-	.fs_flags	= FS_REQUIRES_DEV | FS_BINARY_MOUNTDATA |
+	.fs_flags	= FS_REQUIRES_DEV | FS_BINARY_MOUNTDATA | FS_ALLOW_IDMAP,
-			  FS_ALLOW_IDMAP | FS_MGTIME,
 };
 MODULE_ALIAS_FS("btrfs");

fs/btrfs/transaction.c+27−18

  * |  Call btrfs_commit_transaction() on any trans handle attached to
  * |  transaction N
  * V
- * Transaction N [[TRANS_STATE_COMMIT_START]]
+ * Transaction N [[TRANS_STATE_COMMIT_PREP]]
+ * |
+ * | If there are simultaneous calls to btrfs_commit_transaction() one will win
+ * | the race and the rest will wait for the winner to commit the transaction.
+ * |
+ * | The winner will wait for previous running transaction to completely finish
+ * | if there is one.
  * |
- * | Will wait for previous running transaction to completely finish if there
+ * Transaction N [[TRANS_STATE_COMMIT_START]]
- * | is one
  * |
- * | Then one of the following happes:
+ * | Then one of the following happens:
  * | - Wait for all other trans handle holders to release.
  * |   The btrfs_commit_transaction() caller will do the commit work.
  * | - Wait for current transaction to be committed by others.
  */
 static const unsigned int btrfs_blocked_trans_types[TRANS_STATE_MAX] = {
 	[TRANS_STATE_RUNNING]		= 0U,
+	[TRANS_STATE_COMMIT_PREP]	= 0U,
 	[TRANS_STATE_COMMIT_START]	= (__TRANS_START | __TRANS_ATTACH),
 	[TRANS_STATE_COMMIT_DOING]	= (__TRANS_START |
 					   __TRANS_ATTACH |
 			reloc_reserved = true;
 		}
-		ret = btrfs_block_rsv_add(fs_info, rsv, num_bytes, flush);
+		ret = btrfs_reserve_metadata_bytes(fs_info, rsv, num_bytes, flush);
 		if (ret)
 			goto reserve_fail;
 		if (delayed_refs_bytes) {
-			btrfs_migrate_to_delayed_refs_rsv(fs_info, rsv,
+			btrfs_migrate_to_delayed_refs_rsv(fs_info, delayed_refs_bytes);
-							  delayed_refs_bytes);
 			num_bytes -= delayed_refs_bytes;
 		}
+		btrfs_block_rsv_add_bytes(rsv, num_bytes, true);
 		if (rsv->space_info->force_alloc)
 			do_chunk_alloc = true;
 	 * Wait for the current transaction commit to start and block
 	 * subsequent transaction joins
 	 */
-	btrfs_might_wait_for_state(fs_info, BTRFS_LOCKDEP_TRANS_COMMIT_START);
+	btrfs_might_wait_for_state(fs_info, BTRFS_LOCKDEP_TRANS_COMMIT_PREP);
 	wait_event(fs_info->transaction_blocked_wait,
 		   cur_trans->state >= TRANS_STATE_COMMIT_START ||
 		   TRANS_ABORTED(cur_trans));
 		return;
 	lockdep_assert_held(&trans->fs_info->trans_lock);
-	ASSERT(cur_trans->state >= TRANS_STATE_COMMIT_START);
+	ASSERT(cur_trans->state >= TRANS_STATE_COMMIT_PREP);
 	list_add(&trans->pending_snapshot->list, &cur_trans->pending_snapshots);
 }
 	ktime_t interval;
 	ASSERT(refcount_read(&trans->use_count) == 1);
-	btrfs_trans_state_lockdep_acquire(fs_info, BTRFS_LOCKDEP_TRANS_COMMIT_START);
+	btrfs_trans_state_lockdep_acquire(fs_info, BTRFS_LOCKDEP_TRANS_COMMIT_PREP);
 	clear_bit(BTRFS_FS_NEED_TRANS_COMMIT, &fs_info->flags);
 	}
 	spin_lock(&fs_info->trans_lock);
-	if (cur_trans->state >= TRANS_STATE_COMMIT_START) {
+	if (cur_trans->state >= TRANS_STATE_COMMIT_PREP) {
 		enum btrfs_trans_state want_state = TRANS_STATE_COMPLETED;
 		add_pending_snapshot(trans);
 			want_state = TRANS_STATE_SUPER_COMMITTED;
 		btrfs_trans_state_lockdep_release(fs_info,
-						  BTRFS_LOCKDEP_TRANS_COMMIT_START);
+						  BTRFS_LOCKDEP_TRANS_COMMIT_PREP);
 		ret = btrfs_end_transaction(trans);
 		wait_for_commit(cur_trans, want_state);
 		return ret;
 	}
-	cur_trans->state = TRANS_STATE_COMMIT_START;
+	cur_trans->state = TRANS_STATE_COMMIT_PREP;
 	wake_up(&fs_info->transaction_blocked_wait);
-	btrfs_trans_state_lockdep_release(fs_info, BTRFS_LOCKDEP_TRANS_COMMIT_START);
+	btrfs_trans_state_lockdep_release(fs_info, BTRFS_LOCKDEP_TRANS_COMMIT_PREP);
 	if (cur_trans->list.prev != &fs_info->trans_list) {
 		enum btrfs_trans_state want_state = TRANS_STATE_COMPLETED;
 			btrfs_put_transaction(prev_trans);
 			if (ret)
 				goto lockdep_release;
-		} else {
+			spin_lock(&fs_info->trans_lock);
-			spin_unlock(&fs_info->trans_lock);
 		}
 	} else {
-		spin_unlock(&fs_info->trans_lock);
 		/*
 		 * The previous transaction was aborted and was already removed
 		 * from the list of transactions at fs_info->trans_list. So we
 		 * corrupt state (pointing to trees with unwritten nodes/leafs).
 		 */
 		if (BTRFS_FS_ERROR(fs_info)) {
+			spin_unlock(&fs_info->trans_lock);
 			ret = -EROFS;
 			goto lockdep_release;
 		}
 	}
+	cur_trans->state = TRANS_STATE_COMMIT_START;
+	wake_up(&fs_info->transaction_blocked_wait);
+	spin_unlock(&fs_info->trans_lock);
 	/*
 	 * Get the time spent on the work done by the commit thread and not
 	 * the time spent waiting on a previous commit
 	goto cleanup_transaction;
 lockdep_trans_commit_start_release:
-	btrfs_trans_state_lockdep_release(fs_info, BTRFS_LOCKDEP_TRANS_COMMIT_START);
+	btrfs_trans_state_lockdep_release(fs_info, BTRFS_LOCKDEP_TRANS_COMMIT_PREP);
 	btrfs_end_transaction(trans);
 	return ret;
 }

fs/btrfs/transaction.h+1−0

@@ -14,6 +14,7 @@ · 13 unmodified lines
14		14
15	enum btrfs_trans_state {	15	enum btrfs_trans_state {
16	TRANS_STATE_RUNNING,	16	TRANS_STATE_RUNNING,
		17	TRANS_STATE_COMMIT_PREP,
17	TRANS_STATE_COMMIT_START,	18	TRANS_STATE_COMMIT_START,
18	TRANS_STATE_COMMIT_DOING,	19	TRANS_STATE_COMMIT_DOING,
19	TRANS_STATE_UNBLOCKED,	20	TRANS_STATE_UNBLOCKED,

fs/btrfs/tree-log.c+1−1

@@ -4722,7 +4722,7 @@ static int btrfs_log_prealloc_extents(struct btrfs_trans_handle *trans, · 4721 unmodified lines
4722	struct extent_buffer *leaf;	4722	struct extent_buffer *leaf;
4723	int slot;	4723	int slot;
4724	int ins_nr = 0;	4724	int ins_nr = 0;
4725	int start_slot;	4725	int start_slot = 0;
4726	int ret;	4726	int ret;
4727		4727
4728	if (!(inode->flags & BTRFS_INODE_PREALLOC))	4728	if (!(inode->flags & BTRFS_INODE_PREALLOC))

fs/btrfs/verity.c+31−33

 						pgoff_t index,
 						unsigned long num_ra_pages)
 {
-	struct page *page;
+	struct folio *folio;
 	u64 off = (u64)index << PAGE_SHIFT;
 	loff_t merkle_pos = merkle_file_pos(inode);
 	int ret;
 		return ERR_PTR(-EFBIG);
 	index += merkle_pos >> PAGE_SHIFT;
 again:
-	page = find_get_page_flags(inode->i_mapping, index, FGP_ACCESSED);
+	folio = __filemap_get_folio(inode->i_mapping, index, FGP_ACCESSED, 0);
-	if (page) {
+	if (!IS_ERR(folio)) {
-		if (PageUptodate(page))
+		if (folio_test_uptodate(folio))
-			return page;
+			goto out;
-		lock_page(page);
+		folio_lock(folio);
-		/*
+		/* If it's not uptodate after we have the lock, we got a read error. */
-		 * We only insert uptodate pages, so !Uptodate has to be
+		if (!folio_test_uptodate(folio)) {
-		 * an error
+			folio_unlock(folio);
-		 */
+			folio_put(folio);
-		if (!PageUptodate(page)) {
-			unlock_page(page);
-			put_page(page);
 			return ERR_PTR(-EIO);
 		}
-		unlock_page(page);
+		folio_unlock(folio);
-		return page;
+		goto out;
 	}
-	page = __page_cache_alloc(mapping_gfp_constraint(inode->i_mapping, ~__GFP_FS));
+	folio = filemap_alloc_folio(mapping_gfp_constraint(inode->i_mapping, ~__GFP_FS),
-	if (!page)
+				    0);
+	if (!folio)
 		return ERR_PTR(-ENOMEM);
+	ret = filemap_add_folio(inode->i_mapping, folio, index, GFP_NOFS);
+	if (ret) {
+		folio_put(folio);
+		/* Did someone else insert a folio here? */
+		if (ret == -EEXIST)
+			goto again;
+		return ERR_PTR(ret);
+	}
 	/*
 	 * Merkle item keys are indexed from byte 0 in the merkle tree.
 	 * They have the form:
 	 * [ inode objectid, BTRFS_MERKLE_ITEM_KEY, offset in bytes ]
 	 */
 	ret = read_key_bytes(BTRFS_I(inode), BTRFS_VERITY_MERKLE_ITEM_KEY, off,
-			     page_address(page), PAGE_SIZE, page);
+			     folio_address(folio), PAGE_SIZE, &folio->page);
 	if (ret < 0) {
-		put_page(page);
+		folio_put(folio);
 		return ERR_PTR(ret);
 	}
 	if (ret < PAGE_SIZE)
-		memzero_page(page, ret, PAGE_SIZE - ret);
+		folio_zero_segment(folio, ret, PAGE_SIZE);
-	SetPageUptodate(page);
+	folio_mark_uptodate(folio);
-	ret = add_to_page_cache_lru(page, inode->i_mapping, index, GFP_NOFS);
+	folio_unlock(folio);
-	if (!ret) {
+out:
-		/* Inserted and ready for fsverity */
+	return folio_file_page(folio, index);
-		unlock_page(page);
-	} else {
-		put_page(page);
-		/* Did someone race us into inserting this page? */
-		if (ret == -EEXIST)
-			goto again;
-		page = ERR_PTR(ret);
-	}
-	return page;
 }
 /*

fs/btrfs/volumes.c+6−7

@@ -1594,7 +1594,7 @@ static int find_free_dev_extent(struct btrfs_device *device, u64 num_bytes, · 1593 unmodified lines
1594	u64 search_start;	1594	u64 search_start;
1595	u64 hole_size;	1595	u64 hole_size;
1596	u64 max_hole_start;	1596	u64 max_hole_start;
1597	u64 max_hole_size;	1597	u64 max_hole_size = 0;
1598	u64 extent_end;	1598	u64 extent_end;
1599	u64 search_end = device->total_bytes;	1599	u64 search_end = device->total_bytes;
1600	int ret;	1600	int ret;
@@ -1602,17 +1602,16 @@ static int find_free_dev_extent(struct btrfs_device *device, u64 num_bytes, · 1 unmodified line
1602	struct extent_buffer *l;	1602	struct extent_buffer *l;
1603		1603
1604	search_start = dev_extent_search_start(device);	1604	search_start = dev_extent_search_start(device);
		1605	max_hole_start = search_start;
1605		1606
1606	WARN_ON(device->zone_info &&	1607	WARN_ON(device->zone_info &&
1607	!IS_ALIGNED(num_bytes, device->zone_info->zone_size));	1608	!IS_ALIGNED(num_bytes, device->zone_info->zone_size));
1608		1609
1609	path = btrfs_alloc_path();	1610	path = btrfs_alloc_path();
1610	if (!path)	1611	if (!path) {
1611	return -ENOMEM;	1612	ret = -ENOMEM;
1612		1613	goto out;
1613	max_hole_start = search_start;	1614	}
1614	max_hole_size = 0;
1615
1616	again:	1615	again:
1617	if (search_start >= search_end \|\|	1616	if (search_start >= search_end \|\|
1618	test_bit(BTRFS_DEV_STATE_REPLACE_TGT, &device->dev_state)) {	1617	test_bit(BTRFS_DEV_STATE_REPLACE_TGT, &device->dev_state)) {

fs/buffer.c+24−12

 }
 EXPORT_SYMBOL(folio_zero_new_buffers);
-static void
+static int
 iomap_to_bh(struct inode *inode, sector_t block, struct buffer_head *bh,
 		const struct iomap *iomap)
 {
 	 * current block, then do not map the buffer and let the caller
 	 * handle it.
 	 */
-	BUG_ON(offset >= iomap->offset + iomap->length);
+	if (offset >= iomap->offset + iomap->length)
+		return -EIO;
 	switch (iomap->type) {
 	case IOMAP_HOLE:
 		if (!buffer_uptodate(bh) ||
 		    (offset >= i_size_read(inode)))
 			set_buffer_new(bh);
-		break;
+		return 0;
 	case IOMAP_DELALLOC:
 		if (!buffer_uptodate(bh) ||
 		    (offset >= i_size_read(inode)))
 		set_buffer_uptodate(bh);
 		set_buffer_mapped(bh);
 		set_buffer_delay(bh);
-		break;
+		return 0;
 	case IOMAP_UNWRITTEN:
 		/*
 		 * For unwritten regions, we always need to ensure that regions
 		fallthrough;
 	case IOMAP_MAPPED:
 		if ((iomap->flags & IOMAP_F_NEW) ||
-		    offset >= i_size_read(inode))
+		    offset >= i_size_read(inode)) {
+			/*
+			 * This can happen if truncating the block device races
+			 * with the check in the caller as i_size updates on
+			 * block devices aren't synchronized by i_rwsem for
+			 * block devices.
+			 */
+			if (S_ISBLK(inode->i_mode))
+				return -EIO;
 			set_buffer_new(bh);
+		}
 		bh->b_blocknr = (iomap->addr + offset - iomap->offset) >>
 				inode->i_blkbits;
 		set_buffer_mapped(bh);
-		break;
+		return 0;
+	default:
+		WARN_ON_ONCE(1);
+		return -EIO;
 	}
 }
 			clear_buffer_new(bh);
 		if (!buffer_mapped(bh)) {
 			WARN_ON(bh->b_size != blocksize);
-			if (get_block) {
+			if (get_block)
 				err = get_block(inode, block, bh, 1);
-				if (err)
+			else
-					break;
+				err = iomap_to_bh(inode, block, bh, iomap);
-			} else {
+			if (err)
-				iomap_to_bh(inode, block, bh, iomap);
+				break;
-			}
 			if (buffer_new(bh)) {
 				clean_bdev_bh_alias(bh);

fs/ceph/crypto.c+2−4

 	if (!dir) {
 		/* This can happen if we're not mounting cephfs on the root */
 		dir = ceph_get_inode(parent->i_sb, vino, NULL);
-		if (!dir)
+		if (IS_ERR(dir))
-			dir = ERR_PTR(-ENOENT);
+			dout("Can't find inode %s (%s)\n", inode_number, name);
 	}
-	if (IS_ERR(dir))
-		dout("Can't find inode %s (%s)\n", inode_number, name);
 out:
 	kfree(inode_number);

fs/efivarfs/super.c+10−4

 	u64 storage_space, remaining_space, max_variable_size;
 	efi_status_t status;
-	status = efivar_query_variable_info(attr, &storage_space, &remaining_space,
+	/* Some UEFI firmware does not implement QueryVariableInfo() */
-					    &max_variable_size);
+	storage_space = remaining_space = 0;
-	if (status != EFI_SUCCESS)
+	if (efi_rt_services_supported(EFI_RT_SUPPORTED_QUERY_VARIABLE_INFO)) {
-		return efi_status_to_err(status);
+		status = efivar_query_variable_info(attr, &storage_space,
+						    &remaining_space,
+						    &max_variable_size);
+		if (status != EFI_SUCCESS && status != EFI_UNSUPPORTED)
+			pr_warn_ratelimited("query_variable_info() failed: 0x%lx\n",
+					    status);
+	}
 	/*
 	 * This is not a normal filesystem, so no point in pretending it has a block

fs/ext4/mballoc.c+33−21

 #include <linux/slab.h>
 #include <linux/nospec.h>
 #include <linux/backing-dev.h>
+#include <linux/freezer.h>
 #include <trace/events/ext4.h>
 /*
 	return ret;
 }
+static ext4_grpblk_t ext4_last_grp_cluster(struct super_block *sb,
+					   ext4_group_t grp)
+{
+	if (grp < ext4_get_groups_count(sb))
+		return EXT4_CLUSTERS_PER_GROUP(sb) - 1;
+	return (ext4_blocks_count(EXT4_SB(sb)->s_es) -
+		ext4_group_first_block_no(sb, grp) - 1) >>
+					EXT4_CLUSTER_BITS(sb);
+}
+static bool ext4_trim_interrupted(void)
+{
+	return fatal_signal_pending(current) || freezing(current);
+}
 static int ext4_try_to_trim_range(struct super_block *sb,
 		struct ext4_buddy *e4b, ext4_grpblk_t start,
 		ext4_grpblk_t max, ext4_grpblk_t minblocks)
 __releases(ext4_group_lock_ptr(sb, e4b->bd_group))
 {
 	ext4_grpblk_t next, count, free_count;
+	bool set_trimmed = false;
 	void *bitmap;
 	bitmap = e4b->bd_bitmap;
+	if (start == 0 && max >= ext4_last_grp_cluster(sb, e4b->bd_group))
+		set_trimmed = true;
 	start = max(e4b->bd_info->bb_first_free, start);
 	count = 0;
 	free_count = 0;
 			int ret = ext4_trim_extent(sb, start, next - start, e4b);
 			if (ret && ret != -EOPNOTSUPP)
-				break;
+				return count;
 			count += next - start;
 		}
 		free_count += next - start;
 		start = next + 1;
-		if (fatal_signal_pending(current)) {
+		if (ext4_trim_interrupted())
-			count = -ERESTARTSYS;
+			return count;
-			break;
-		}
 		if (need_resched()) {
 			ext4_unlock_group(sb, e4b->bd_group);
 			break;
 	}
+	if (set_trimmed)
+		EXT4_MB_GRP_SET_TRIMMED(e4b->bd_info);
 	return count;
 }
  * @start:		first group block to examine
  * @max:		last group block to examine
  * @minblocks:		minimum extent block count
- * @set_trimmed:	set the trimmed flag if at least one block is trimmed
  *
  * ext4_trim_all_free walks through group's block bitmap searching for free
  * extents. When the free extent is found, mark it as used in group buddy
 static ext4_grpblk_t
 ext4_trim_all_free(struct super_block *sb, ext4_group_t group,
 		   ext4_grpblk_t start, ext4_grpblk_t max,
-		   ext4_grpblk_t minblocks, bool set_trimmed)
+		   ext4_grpblk_t minblocks)
 {
 	struct ext4_buddy e4b;
 	int ret;
 	ext4_lock_group(sb, group);
 	if (!EXT4_MB_GRP_WAS_TRIMMED(e4b.bd_info) ||
-	    minblocks < EXT4_SB(sb)->s_last_trim_minblks) {
+	    minblocks < EXT4_SB(sb)->s_last_trim_minblks)
 		ret = ext4_try_to_trim_range(sb, &e4b, start, max, minblocks);
-		if (ret >= 0 && set_trimmed)
+	else
-			EXT4_MB_GRP_SET_TRIMMED(e4b.bd_info);
-	} else {
 		ret = 0;
-	}
 	ext4_unlock_group(sb, group);
 	ext4_mb_unload_buddy(&e4b);
 	ext4_fsblk_t first_data_blk =
 			le32_to_cpu(EXT4_SB(sb)->s_es->s_first_data_block);
 	ext4_fsblk_t max_blks = ext4_blocks_count(EXT4_SB(sb)->s_es);
-	bool whole_group, eof = false;
 	int ret = 0;
 	start = range->start >> sb->s_blocksize_bits;
 		if (minlen > EXT4_CLUSTERS_PER_GROUP(sb))
 			goto out;
 	}
-	if (end >= max_blks - 1) {
+	if (end >= max_blks - 1)
 		end = max_blks - 1;
-		eof = true;
-	}
 	if (end <= first_data_blk)
 		goto out;
 	if (start < first_data_blk)
 	/* end now represents the last cluster to discard in this group */
 	end = EXT4_CLUSTERS_PER_GROUP(sb) - 1;
-	whole_group = true;
 	for (group = first_group; group <= last_group; group++) {
+		if (ext4_trim_interrupted())
+			break;
 		grp = ext4_get_group_info(sb, group);
 		if (!grp)
 			continue;
 		 * change it for the last group, note that last_cluster is
 		 * already computed earlier by ext4_get_group_no_and_offset()
 		 */
-		if (group == last_group) {
+		if (group == last_group)
 			end = last_cluster;
-			whole_group = eof ? true : end == EXT4_CLUSTERS_PER_GROUP(sb) - 1;
-		}
 		if (grp->bb_free >= minlen) {
 			cnt = ext4_trim_all_free(sb, group, first_cluster,
-						 end, minlen, whole_group);
+						 end, minlen);
 			if (cnt < 0) {
 				ret = cnt;
 				break;

fs/ext4/namei.c+15−11

 						   struct buffer_head *bh)
 {
 	struct ext4_dir_entry_tail *t;
+	int blocksize = EXT4_BLOCK_SIZE(inode->i_sb);
 #ifdef PARANOID
 	struct ext4_dir_entry *d, *top;
 	d = (struct ext4_dir_entry *)bh->b_data;
 	top = (struct ext4_dir_entry *)(bh->b_data +
-		(EXT4_BLOCK_SIZE(inode->i_sb) -
+		(blocksize - sizeof(struct ext4_dir_entry_tail)));
-		 sizeof(struct ext4_dir_entry_tail)));
+	while (d < top && ext4_rec_len_from_disk(d->rec_len, blocksize))
-	while (d < top && d->rec_len)
 		d = (struct ext4_dir_entry *)(((void *)d) +
-		    le16_to_cpu(d->rec_len));
+		    ext4_rec_len_from_disk(d->rec_len, blocksize));
 	if (d != top)
 		return NULL;
 #endif
 	if (t->det_reserved_zero1 ||
-	    le16_to_cpu(t->det_rec_len) != sizeof(struct ext4_dir_entry_tail) ||
+	    (ext4_rec_len_from_disk(t->det_rec_len, blocksize) !=
+	     sizeof(struct ext4_dir_entry_tail)) ||
 	    t->det_reserved_zero2 ||
 	    t->det_reserved_ft != EXT4_FT_DIR_CSUM)
 		return NULL;
 	struct ext4_dir_entry *dp;
 	struct dx_root_info *root;
 	int count_offset;
+	int blocksize = EXT4_BLOCK_SIZE(inode->i_sb);
+	unsigned int rlen = ext4_rec_len_from_disk(dirent->rec_len, blocksize);
-	if (le16_to_cpu(dirent->rec_len) == EXT4_BLOCK_SIZE(inode->i_sb))
+	if (rlen == blocksize)
 		count_offset = 8;
-	else if (le16_to_cpu(dirent->rec_len) == 12) {
+	else if (rlen == 12) {
 		dp = (struct ext4_dir_entry *)(((void *)dirent) + 12);
-		if (le16_to_cpu(dp->rec_len) !=
+		if (ext4_rec_len_from_disk(dp->rec_len, blocksize) != blocksize - 12)
-		    EXT4_BLOCK_SIZE(inode->i_sb) - 12)
 			return NULL;
 		root = (struct dx_root_info *)(((void *)dp + 12));
 		if (root->reserved_zero ||
 	unsigned int buflen = bh->b_size;
 	char *base = bh->b_data;
 	struct dx_hash_info h = *hinfo;
+	int blocksize = EXT4_BLOCK_SIZE(dir->i_sb);
 	if (ext4_has_metadata_csum(dir->i_sb))
 		buflen -= sizeof(struct ext4_dir_entry_tail);
 			map_tail--;
 			map_tail->hash = h.hash;
 			map_tail->offs = ((char *) de - base)>>2;
-			map_tail->size = le16_to_cpu(de->rec_len);
+			map_tail->size = ext4_rec_len_from_disk(de->rec_len,
+								blocksize);
 			count++;
 			cond_resched();
 		}
-		de = ext4_next_entry(de, dir->i_sb->s_blocksize);
+		de = ext4_next_entry(de, blocksize);
 	}
 	return count;
 }

fs/ext4/super.c+1−1

@@ -7314,7 +7314,7 @@ static struct file_system_type ext4_fs_type = { · 7313 unmodified lines
7314	.init_fs_context = ext4_init_fs_context,	7314	.init_fs_context = ext4_init_fs_context,
7315	.parameters = ext4_param_specs,	7315	.parameters = ext4_param_specs,
7316	.kill_sb = ext4_kill_sb,	7316	.kill_sb = ext4_kill_sb,
7317	.fs_flags = FS_REQUIRES_DEV \| FS_ALLOW_IDMAP \| FS_MGTIME,	7317	.fs_flags = FS_REQUIRES_DEV \| FS_ALLOW_IDMAP,
7318	};	7318	};
7319	MODULE_ALIAS_FS("ext4");	7319	MODULE_ALIAS_FS("ext4");
7320		7320

fs/fs-writeback.c+8−3

 	if (wbc->pages_skipped) {
 		/*
-		 * writeback is not making progress due to locked
+		 * Writeback is not making progress due to locked buffers.
-		 * buffers. Skip this inode for now.
+		 * Skip this inode for now. Although having skipped pages
+		 * is odd for clean inodes, it can happen for some
+		 * filesystems so handle that gracefully.
 		 */
-		redirty_tail_locked(inode, wb);
+		if (inode->i_state & I_DIRTY_ALL)
+			redirty_tail_locked(inode, wb);
+		else
+			inode_cgwb_move_to_attached(inode, wb);
 		return;
 	}

fs/gfs2/glock.c+3−1

 		if (!test_bit(GLF_LOCK, &gl->gl_flags)) {
 			if (!spin_trylock(&gl->gl_lockref.lock))
 				continue;
-			if (!gl->gl_lockref.count) {
+			if (gl->gl_lockref.count <= 1 &&
+			    (gl->gl_state == LM_ST_UNLOCKED ||
+			     demote_ok(gl))) {
 				list_move(&gl->gl_lru, &dispose);
 				atomic_dec(&lru_count);
 				freed++;

fs/gfs2/glops.c+5−4

 	struct super_block *sb = sdp->sd_vfs;
 	if (!remote ||
-	    gl->gl_state != LM_ST_SHARED ||
+	    (gl->gl_state != LM_ST_SHARED &&
+	     gl->gl_state != LM_ST_UNLOCKED) ||
 	    gl->gl_demote_state != LM_ST_UNLOCKED)
 		return;
 	/*
 	 * Try to get an active super block reference to prevent racing with
-	 * unmount (see trylock_super()).  But note that unmount isn't the only
+	 * unmount (see super_trylock_shared()).  But note that unmount isn't
-	 * place where a write lock on s_umount is taken, and we can fail here
+	 * the only place where a write lock on s_umount is taken, and we can
-	 * because of things like remount as well.
+	 * fail here because of things like remount as well.
 	 */
 	if (down_read_trylock(&sb->s_umount)) {
 		atomic_inc(&sb->s_active);

fs/gfs2/quota.h+2−1

 	ret = gfs2_quota_lock(ip, NO_UID_QUOTA_CHANGE, NO_GID_QUOTA_CHANGE);
 	if (ret)
 		return ret;
-	if (sdp->sd_args.ar_quota != GFS2_QUOTA_ON)
+	if (sdp->sd_args.ar_quota != GFS2_QUOTA_ON &&
+	    sdp->sd_args.ar_quota != GFS2_QUOTA_QUIET)
 		return 0;
 	ret = gfs2_quota_check(ip, ip->i_inode.i_uid, ip->i_inode.i_gid, ap);
 	if (ret)

fs/inode.c+3−79

@@ -2102,52 +2102,10 @@ int file_remove_privs(struct file *file) · 2101 unmodified lines
2102	}	2102	}
2103	EXPORT_SYMBOL(file_remove_privs);	2103	EXPORT_SYMBOL(file_remove_privs);
2104		2104
2105	/**
2106	* current_mgtime - Return FS time (possibly fine-grained)
2107	* @inode: inode.
2108	*
2109	* Return the current time truncated to the time granularity supported by
2110	* the fs, as suitable for a ctime/mtime change. If the ctime is flagged
2111	* as having been QUERIED, get a fine-grained timestamp.
2112	*/
2113	struct timespec64 current_mgtime(struct inode *inode)
2114	{
2115	struct timespec64 now, ctime;
2116	atomic_long_t pnsec = (atomic_long_t )&inode->__i_ctime.tv_nsec;
2117	long nsec = atomic_long_read(pnsec);
2118
2119	if (nsec & I_CTIME_QUERIED) {
2120	ktime_get_real_ts64(&now);
2121	return timestamp_truncate(now, inode);
2122	}
2123
2124	ktime_get_coarse_real_ts64(&now);
2125	now = timestamp_truncate(now, inode);
2126
2127	/*
2128	* If we've recently fetched a fine-grained timestamp
2129	* then the coarse-grained one may still be earlier than the
2130	* existing ctime. Just keep the existing value if so.
2131	*/
2132	ctime = inode_get_ctime(inode);
2133	if (timespec64_compare(&ctime, &now) > 0)
2134	now = ctime;
2135
2136	return now;
2137	}
2138	EXPORT_SYMBOL(current_mgtime);
2139
2140	static struct timespec64 current_ctime(struct inode *inode)
2141	{
2142	if (is_mgtime(inode))
2143	return current_mgtime(inode);
2144	return current_time(inode);
2145	}
2146
2147	static int inode_needs_update_time(struct inode *inode)	2105	static int inode_needs_update_time(struct inode *inode)
2148	{	2106	{
2149	int sync_it = 0;	2107	int sync_it = 0;
2150	struct timespec64 now = current_ctime(inode);	2108	struct timespec64 now = current_time(inode);
2151	struct timespec64 ctime;	2109	struct timespec64 ctime;
2152		2110
2153	/* First try to exhaust all avenues to not sync */	2111	/* First try to exhaust all avenues to not sync */
@@ -2578,43 +2536,9 @@ EXPORT_SYMBOL(current_time); · 424 unmodified lines
2578	*/	2536	*/
2579	struct timespec64 inode_set_ctime_current(struct inode *inode)	2537	struct timespec64 inode_set_ctime_current(struct inode *inode)
2580	{	2538	{
2581	struct timespec64 now;	2539	struct timespec64 now = current_time(inode);
2582	struct timespec64 ctime;
2583
2584	ctime.tv_nsec = READ_ONCE(inode->__i_ctime.tv_nsec);
2585	if (!(ctime.tv_nsec & I_CTIME_QUERIED)) {
2586	now = current_time(inode);
2587		2540
2588	/* Just copy it into place if it's not multigrain */	2541	inode_set_ctime(inode, now.tv_sec, now.tv_nsec);
2589	if (!is_mgtime(inode)) {
2590	inode_set_ctime_to_ts(inode, now);
2591	return now;
2592	}
2593
2594	/*
2595	* If we've recently updated with a fine-grained timestamp,
2596	* then the coarse-grained one may still be earlier than the
2597	* existing ctime. Just keep the existing value if so.
2598	*/
2599	ctime.tv_sec = inode->__i_ctime.tv_sec;
2600	if (timespec64_compare(&ctime, &now) > 0)
2601	return ctime;
2602
2603	/*
2604	* Ctime updates are usually protected by the inode_lock, but
2605	* we can still race with someone setting the QUERIED flag.
2606	* Try to swap the new nsec value into place. If it's changed
2607	* in the interim, then just go with a fine-grained timestamp.
2608	*/
2609	if (cmpxchg(&inode->__i_ctime.tv_nsec, ctime.tv_nsec,
2610	now.tv_nsec) != ctime.tv_nsec)
2611	goto fine_grained;
2612	inode->__i_ctime.tv_sec = now.tv_sec;
2613	return now;
2614	}
2615	fine_grained:
2616	ktime_get_real_ts64(&now);
2617	inode_set_ctime_to_ts(inode, timestamp_truncate(now, inode));
2618	return now;	2542	return now;
2619	}	2543	}
2620	EXPORT_SYMBOL(inode_set_ctime_current);	2544	EXPORT_SYMBOL(inode_set_ctime_current);

fs/iomap/buffered-io.c+19−13

 	size_t poff, plen;
 	/*
-	 * If the write completely overlaps the current folio, then
+	 * If the write or zeroing completely overlaps the current folio, then
 	 * entire folio will be dirtied so there is no need for
 	 * per-block state tracking structures to be attached to this folio.
+	 * For the unshare case, we must read in the ondisk contents because we
+	 * are not changing pagecache contents.
 	 */
-	if (pos <= folio_pos(folio) &&
+	if (!(iter->flags & IOMAP_UNSHARE) && pos <= folio_pos(folio) &&
 	    pos + len >= folio_pos(folio) + folio_size(folio))
 		return 0;
 /*
  * Scan the data range passed to us for dirty page cache folios. If we find a
- * dirty folio, punch out the preceeding range and update the offset from which
+ * dirty folio, punch out the preceding range and update the offset from which
  * the next punch will start from.
  *
  * We can punch out storage reservations under clean pages because they either
 	const struct iomap *srcmap = iomap_iter_srcmap(iter);
 	loff_t pos = iter->pos;
 	loff_t length = iomap_length(iter);
-	long status = 0;
 	loff_t written = 0;
 	/* don't bother with blocks that are not shared to start with */
 		return length;
 	do {
-		unsigned long offset = offset_in_page(pos);
-		unsigned long bytes = min_t(loff_t, PAGE_SIZE - offset, length);
 		struct folio *folio;
+		int status;
+		size_t offset;
+		size_t bytes = min_t(u64, SIZE_MAX, length);
 		status = iomap_write_begin(iter, pos, bytes, &folio);
 		if (unlikely(status))
 			return status;
-		if (iter->iomap.flags & IOMAP_F_STALE)
+		if (iomap->flags & IOMAP_F_STALE)
 			break;
-		status = iomap_write_end(iter, pos, bytes, bytes, folio);
+		offset = offset_in_folio(folio, pos);
-		if (WARN_ON_ONCE(status == 0))
+		if (bytes > folio_size(folio) - offset)
+			bytes = folio_size(folio) - offset;
+		bytes = iomap_write_end(iter, pos, bytes, bytes, folio);
+		if (WARN_ON_ONCE(bytes == 0))
 			return -EIO;
 		cond_resched();
-		pos += status;
+		pos += bytes;
-		written += status;
+		written += bytes;
-		length -= status;
+		length -= bytes;
 		balance_dirty_pages_ratelimited(iter->inode->i_mapping);
-	} while (length);
+	} while (length > 0);
 	return written;
 }

fs/jbd2/commit.c+6−10

 static __u32 jbd2_checksum_data(__u32 crc32_sum, struct buffer_head *bh)
 {
-	struct page *page = bh->b_page;
 	char *addr;
 	__u32 checksum;
-	addr = kmap_atomic(page);
+	addr = kmap_local_folio(bh->b_folio, bh_offset(bh));
-	checksum = crc32_be(crc32_sum,
+	checksum = crc32_be(crc32_sum, addr, bh->b_size);
-		(void *)(addr + offset_in_page(bh->b_data)), bh->b_size);
+	kunmap_local(addr);
-	kunmap_atomic(addr);
 	return checksum;
 }
 				    struct buffer_head *bh, __u32 sequence)
 {
 	journal_block_tag3_t *tag3 = (journal_block_tag3_t *)tag;
-	struct page *page = bh->b_page;
 	__u8 *addr;
 	__u32 csum32;
 	__be32 seq;
 		return;
 	seq = cpu_to_be32(sequence);
-	addr = kmap_atomic(page);
+	addr = kmap_local_folio(bh->b_folio, bh_offset(bh));
 	csum32 = jbd2_chksum(j, j->j_csum_seed, (__u8 *)&seq, sizeof(seq));
-	csum32 = jbd2_chksum(j, csum32, addr + offset_in_page(bh->b_data),
+	csum32 = jbd2_chksum(j, csum32, addr, bh->b_size);
-			     bh->b_size);
+	kunmap_local(addr);
-	kunmap_atomic(addr);
 	if (jbd2_has_feature_csum3(j))
 		tag3->t_checksum = cpu_to_be32(csum32);

fs/jbd2/journal.c+2−0

@@ -1601,6 +1601,8 @@ static journal_t journal_init_common(struct block_device bdev, · 1600 unmodified lines
1601		1601
1602	err_cleanup:	1602	err_cleanup:
1603	percpu_counter_destroy(&journal->j_checkpoint_jh_count);	1603	percpu_counter_destroy(&journal->j_checkpoint_jh_count);
		1604	if (journal->j_chksum_driver)
		1605	crypto_free_shash(journal->j_chksum_driver);
1604	kfree(journal->j_wbuf);	1606	kfree(journal->j_wbuf);
1605	jbd2_journal_destroy_revoke(journal);	1607	jbd2_journal_destroy_revoke(journal);
1606	journal_fail_superblock(journal);	1608	journal_fail_superblock(journal);

fs/jbd2/transaction.c+4−8

 /* Call t_frozen trigger and copy buffer data into jh->b_frozen_data. */
 static void jbd2_freeze_jh_data(struct journal_head *jh)
 {
-	struct page *page;
-	int offset;
 	char *source;
 	struct buffer_head *bh = jh2bh(jh);
 	J_EXPECT_JH(jh, buffer_uptodate(bh), "Possible IO failure.\n");
-	page = bh->b_page;
+	source = kmap_local_folio(bh->b_folio, bh_offset(bh));
-	offset = offset_in_page(bh->b_data);
-	source = kmap_atomic(page);
 	/* Fire data frozen trigger just before we copy the data */
-	jbd2_buffer_frozen_trigger(jh, source + offset, jh->b_triggers);
+	jbd2_buffer_frozen_trigger(jh, source, jh->b_triggers);
-	memcpy(jh->b_frozen_data, source + offset, bh->b_size);
+	memcpy(jh->b_frozen_data, source, bh->b_size);
-	kunmap_atomic(source);
+	kunmap_local(source);
 	/*
 	 * Now that the frozen data is saved off, we need to store any matching

fs/libfs.c+1−0

@@ -1903,6 +1903,7 @@ ssize_t direct_write_fallback(struct kiocb iocb, struct iov_iter iter, · 1902 unmodified lines
1903	* We don't know how much we wrote, so just return the number of	1903	* We don't know how much we wrote, so just return the number of
1904	* bytes which were direct-written	1904	* bytes which were direct-written
1905	*/	1905	*/
		1906	iocb->ki_pos -= buffered_written;
1906	if (direct_written)	1907	if (direct_written)
1907	return direct_written;	1908	return direct_written;
1908	return err;	1909	return err;

fs/netfs/buffered_read.c+5−1

 	xas_for_each(&xas, folio, last_page) {
 		loff_t pg_end;
 		bool pg_failed = false;
+		bool folio_started;
 		if (xas_retry(&xas, folio))
 			continue;
 		pg_end = folio_pos(folio) + folio_size(folio) - 1;
+		folio_started = false;
 		for (;;) {
 			loff_t sreq_end;
 				pg_failed = true;
 				break;
 			}
-			if (test_bit(NETFS_SREQ_COPY_TO_CACHE, &subreq->flags))
+			if (!folio_started && test_bit(NETFS_SREQ_COPY_TO_CACHE, &subreq->flags)) {
 				folio_start_fscache(folio);
+				folio_started = true;
+			}
 			pg_failed |= subreq_failed;
 			sreq_end = subreq->start + subreq->len - 1;
 			if (pg_end < sreq_end)

fs/nfs/direct.c+93−41

 		dreq->max_count = dreq_len;
 		if (dreq->count > dreq_len)
 			dreq->count = dreq_len;
-		if (test_bit(NFS_IOHDR_ERROR, &hdr->flags))
-			dreq->error = hdr->error;
-		else /* Clear outstanding error if this is EOF */
-			dreq->error = 0;
 	}
+	if (test_bit(NFS_IOHDR_ERROR, &hdr->flags) && !dreq->error)
+		dreq->error = hdr->error;
 }
 static void
 		dreq->count = dreq_len;
 }
+static void nfs_direct_truncate_request(struct nfs_direct_req *dreq,
+					struct nfs_page *req)
+{
+	loff_t offs = req_offset(req);
+	size_t req_start = (size_t)(offs - dreq->io_start);
+	if (req_start < dreq->max_count)
+		dreq->max_count = req_start;
+	if (req_start < dreq->count)
+		dreq->count = req_start;
+}
 /**
  * nfs_swap_rw - NFS address space operation for swap I/O
  * @iocb: target I/O control block
 	kref_get(&head->wb_kref);
 }
-static void nfs_direct_join_group(struct list_head *list, struct inode *inode)
+static void nfs_direct_join_group(struct list_head *list,
+				  struct nfs_commit_info *cinfo,
+				  struct inode *inode)
 {
 	struct nfs_page *req, *subreq;
 				nfs_release_request(subreq);
 			}
 		} while ((subreq = subreq->wb_this_page) != req);
-		nfs_join_page_group(req, inode);
+		nfs_join_page_group(req, cinfo, inode);
 	}
 }
 static void nfs_direct_write_reschedule(struct nfs_direct_req *dreq)
 {
 	struct nfs_pageio_descriptor desc;
-	struct nfs_page *req, *tmp;
+	struct nfs_page *req;
 	LIST_HEAD(reqs);
 	struct nfs_commit_info cinfo;
-	LIST_HEAD(failed);
 	nfs_init_cinfo_from_dreq(&cinfo, dreq);
 	nfs_direct_write_scan_commit_list(dreq->inode, &reqs, &cinfo);
-	nfs_direct_join_group(&reqs, dreq->inode);
+	nfs_direct_join_group(&reqs, &cinfo, dreq->inode);
-	dreq->count = 0;
-	dreq->max_count = 0;
-	list_for_each_entry(req, &reqs, wb_list)
-		dreq->max_count += req->wb_bytes;
 	nfs_clear_pnfs_ds_commit_verifiers(&dreq->ds_cinfo);
 	get_dreq(dreq);
 			      &nfs_direct_write_completion_ops);
 	desc.pg_dreq = dreq;
-	list_for_each_entry_safe(req, tmp, &reqs, wb_list) {
+	while (!list_empty(&reqs)) {
+		req = nfs_list_entry(reqs.next);
 		/* Bump the transmission count */
 		req->wb_nio++;
 		if (!nfs_pageio_add_request(&desc, req)) {
-			nfs_list_move_request(req, &failed);
+			spin_lock(&dreq->lock);
-			spin_lock(&cinfo.inode->i_lock);
+			if (dreq->error < 0) {
-			dreq->flags = 0;
+				desc.pg_error = dreq->error;
-			if (desc.pg_error < 0)
+			} else if (desc.pg_error != -EAGAIN) {
+				dreq->flags = 0;
+				if (!desc.pg_error)
+					desc.pg_error = -EIO;
 				dreq->error = desc.pg_error;
-			else
+			} else
-				dreq->error = -EIO;
+				dreq->flags = NFS_ODIRECT_RESCHED_WRITES;
-			spin_unlock(&cinfo.inode->i_lock);
+			spin_unlock(&dreq->lock);
+			break;
 		}
 		nfs_release_request(req);
 	}
 	nfs_pageio_complete(&desc);
-	while (!list_empty(&failed)) {
+	while (!list_empty(&reqs)) {
-		req = nfs_list_entry(failed.next);
+		req = nfs_list_entry(reqs.next);
 		nfs_list_remove_request(req);
 		nfs_unlock_and_release_request(req);
+		if (desc.pg_error == -EAGAIN) {
+			nfs_mark_request_commit(req, NULL, &cinfo, 0);
+		} else {
+			spin_lock(&dreq->lock);
+			nfs_direct_truncate_request(dreq, req);
+			spin_unlock(&dreq->lock);
+			nfs_release_request(req);
+		}
 	}
 	if (put_dreq(dreq))
 	if (status < 0) {
 		/* Errors in commit are fatal */
 		dreq->error = status;
-		dreq->max_count = 0;
-		dreq->count = 0;
 		dreq->flags = NFS_ODIRECT_DONE;
 	} else {
 		status = dreq->error;
 	while (!list_empty(&data->pages)) {
 		req = nfs_list_entry(data->pages.next);
 		nfs_list_remove_request(req);
-		if (status >= 0 && !nfs_write_match_verf(verf, req)) {
+		if (status < 0) {
+			spin_lock(&dreq->lock);
+			nfs_direct_truncate_request(dreq, req);
+			spin_unlock(&dreq->lock);
+			nfs_release_request(req);
+		} else if (!nfs_write_match_verf(verf, req)) {
 			dreq->flags = NFS_ODIRECT_RESCHED_WRITES;
 			/*
 			 * Despite the reboot, the write was successful,
 			 */
 			req->wb_nio = 0;
 			nfs_mark_request_commit(req, NULL, &cinfo, 0);
-		} else /* Error or match */
+		} else
 			nfs_release_request(req);
 		nfs_unlock_and_release_request(req);
 	}
 	while (!list_empty(&reqs)) {
 		req = nfs_list_entry(reqs.next);
 		nfs_list_remove_request(req);
+		nfs_direct_truncate_request(dreq, req);
 		nfs_release_request(req);
 		nfs_unlock_and_release_request(req);
 	}
 	}
 	nfs_direct_count_bytes(dreq, hdr);
-	if (test_bit(NFS_IOHDR_UNSTABLE_WRITES, &hdr->flags)) {
+	if (test_bit(NFS_IOHDR_UNSTABLE_WRITES, &hdr->flags) &&
+	    !test_bit(NFS_IOHDR_ERROR, &hdr->flags)) {
 		if (!dreq->flags)
 			dreq->flags = NFS_ODIRECT_DO_COMMIT;
 		flags = dreq->flags;
 static void nfs_direct_write_reschedule_io(struct nfs_pgio_header *hdr)
 {
 	struct nfs_direct_req *dreq = hdr->dreq;
+	struct nfs_page *req;
+	struct nfs_commit_info cinfo;
 	trace_nfs_direct_write_reschedule_io(dreq);
+	nfs_init_cinfo_from_dreq(&cinfo, dreq);
 	spin_lock(&dreq->lock);
-	if (dreq->error == 0) {
+	if (dreq->error == 0)
 		dreq->flags = NFS_ODIRECT_RESCHED_WRITES;
-		/* fake unstable write to let common nfs resend pages */
+	set_bit(NFS_IOHDR_REDO, &hdr->flags);
-		hdr->verf.committed = NFS_UNSTABLE;
-		hdr->good_bytes = hdr->args.offset + hdr->args.count -
-			hdr->io_start;
-	}
 	spin_unlock(&dreq->lock);
+	while (!list_empty(&hdr->pages)) {
+		req = nfs_list_entry(hdr->pages.next);
+		nfs_list_remove_request(req);
+		nfs_unlock_request(req);
+		nfs_mark_request_commit(req, NULL, &cinfo, 0);
+	}
 }
 static const struct nfs_pgio_completion_ops nfs_direct_write_completion_ops = {
 {
 	struct nfs_pageio_descriptor desc;
 	struct inode *inode = dreq->inode;
+	struct nfs_commit_info cinfo;
 	ssize_t result = 0;
 	size_t requested_bytes = 0;
 	size_t wsize = max_t(size_t, NFS_SERVER(inode)->wsize, PAGE_SIZE);
+	bool defer = false;
 	trace_nfs_direct_write_schedule_iovec(dreq);
 				break;
 			}
-			nfs_lock_request(req);
-			if (!nfs_pageio_add_request(&desc, req)) {
-				result = desc.pg_error;
-				nfs_unlock_and_release_request(req);
-				break;
-			}
 			pgbase = 0;
 			bytes -= req_len;
 			requested_bytes += req_len;
 			pos += req_len;
 			dreq->bytes_left -= req_len;
+			if (defer) {
+				nfs_mark_request_commit(req, NULL, &cinfo, 0);
+				continue;
+			}
+			nfs_lock_request(req);
+			if (nfs_pageio_add_request(&desc, req))
+				continue;
+			/* Exit on hard errors */
+			if (desc.pg_error < 0 && desc.pg_error != -EAGAIN) {
+				result = desc.pg_error;
+				nfs_unlock_and_release_request(req);
+				break;
+			}
+			/* If the error is soft, defer remaining requests */
+			nfs_init_cinfo_from_dreq(&cinfo, dreq);
+			spin_lock(&dreq->lock);
+			dreq->flags = NFS_ODIRECT_RESCHED_WRITES;
+			spin_unlock(&dreq->lock);
+			nfs_unlock_request(req);
+			nfs_mark_request_commit(req, NULL, &cinfo, 0);
+			desc.pg_error = 0;
+			defer = true;
 		}
 		nfs_direct_release_pages(pagevec, npages);
 		kvfree(pagevec);

fs/nfs/flexfilelayout/flexfilelayout.c+1−0

@@ -1235,6 +1235,7 @@ static void ff_layout_io_track_ds_error(struct pnfs_layout_segment *lseg, · 1234 unmodified lines
1235	case -EPFNOSUPPORT:	1235	case -EPFNOSUPPORT:
1236	case -EPROTONOSUPPORT:	1236	case -EPROTONOSUPPORT:
1237	case -EOPNOTSUPP:	1237	case -EOPNOTSUPP:
		1238	case -EINVAL:
1238	case -ECONNREFUSED:	1239	case -ECONNREFUSED:
1239	case -ECONNRESET:	1240	case -ECONNRESET:
1240	case -EHOSTDOWN:	1241	case -EHOSTDOWN:

fs/nfs/nfs4client.c+5−1

 		.net = old->cl_net,
 		.servername = old->cl_hostname,
 	};
+	int max_connect = test_bit(NFS_CS_PNFS, &clp->cl_flags) ?
+		clp->cl_max_connect : old->cl_max_connect;
 	if (clp->cl_proto != old->cl_proto)
 		return;
 	xprt_args.addrlen = clp_salen;
 	rpc_clnt_add_xprt(old->cl_rpcclient, &xprt_args,
-			  rpc_clnt_test_and_add_xprt, NULL);
+			  rpc_clnt_test_and_add_xprt, &max_connect);
 }
 /**
 		__set_bit(NFS_CS_NORESVPORT, &cl_init.init_flags);
 	__set_bit(NFS_CS_DS, &cl_init.init_flags);
+	__set_bit(NFS_CS_PNFS, &cl_init.init_flags);
+	cl_init.max_connect = NFS_MAX_TRANSPORTS;
 	/*
 	 * Set an authflavor equual to the MDS value. Use the MDS nfs_client
 	 * cl_ipaddr so as to use the same EXCHANGE_ID co_ownerid as the MDS

fs/nfs/nfs4proc.c+5−1

 			return status;
 	}
 	if (!(o_res->f_attr->valid & NFS_ATTR_FATTR)) {
+		struct nfs_fh *fh = &o_res->fh;
 		nfs4_sequence_free_slot(&o_res->seq_res);
-		nfs4_proc_getattr(server, &o_res->fh, o_res->f_attr, NULL);
+		if (o_arg->claim == NFS4_OPEN_CLAIM_FH)
+			fh = NFS_FH(d_inode(data->dentry));
+		nfs4_proc_getattr(server, fh, o_res->f_attr, NULL);
 	}
 	return 0;
 }

fs/nfs/write.c+12−11

 static const struct nfs_commit_completion_ops nfs_commit_completion_ops;
 static const struct nfs_rw_ops nfs_rw_write_ops;
 static void nfs_inode_remove_request(struct nfs_page *req);
-static void nfs_clear_request_commit(struct nfs_page *req);
+static void nfs_clear_request_commit(struct nfs_commit_info *cinfo,
+				     struct nfs_page *req);
 static void nfs_init_cinfo_from_inode(struct nfs_commit_info *cinfo,
 				      struct inode *inode);
 static struct nfs_page *
  * the (former) group.  All subrequests are removed from any write or commit
  * lists, unlinked from the group and destroyed.
  */
-void
+void nfs_join_page_group(struct nfs_page *head, struct nfs_commit_info *cinfo,
-nfs_join_page_group(struct nfs_page *head, struct inode *inode)
+			 struct inode *inode)
 {
 	struct nfs_page *subreq;
 	struct nfs_page *destroy_list = NULL;
 	 * Commit list removal accounting is done after locks are dropped */
 	subreq = head;
 	do {
-		nfs_clear_request_commit(subreq);
+		nfs_clear_request_commit(cinfo, subreq);
 		subreq = subreq->wb_this_page;
 	} while (subreq != head);
 {
 	struct inode *inode = folio_file_mapping(folio)->host;
 	struct nfs_page *head;
+	struct nfs_commit_info cinfo;
 	int ret;
+	nfs_init_cinfo_from_inode(&cinfo, inode);
 	/*
 	 * A reference is taken only on the head request which acts as a
 	 * reference to the whole page group - the group will not be destroyed
 		return ERR_PTR(ret);
 	}
-	nfs_join_page_group(head, inode);
+	nfs_join_page_group(head, &cinfo, inode);
 	return head;
 }
 }
 /* Called holding the request lock on @req */
-static void
+static void nfs_clear_request_commit(struct nfs_commit_info *cinfo,
-nfs_clear_request_commit(struct nfs_page *req)
+				     struct nfs_page *req)
 {
 	if (test_bit(PG_CLEAN, &req->wb_flags)) {
 		struct nfs_open_context *ctx = nfs_req_openctx(req);
 		struct inode *inode = d_inode(ctx->dentry);
-		struct nfs_commit_info cinfo;
-		nfs_init_cinfo_from_inode(&cinfo, inode);
 		mutex_lock(&NFS_I(inode)->commit_mutex);
-		if (!pnfs_clear_request_commit(req, &cinfo)) {
+		if (!pnfs_clear_request_commit(req, cinfo)) {
-			nfs_request_remove_commit_list(req, &cinfo);
+			nfs_request_remove_commit_list(req, cinfo);
 		}
 		mutex_unlock(&NFS_I(inode)->commit_mutex);
 		nfs_folio_clear_commit(nfs_page_to_folio(req));

fs/nfsd/nfs4proc.c+2−2

@@ -1058,8 +1058,8 @@ nfsd4_rename(struct svc_rqst rqstp, struct nfsd4_compound_state cstate, · 1057 unmodified lines
1058	rename->rn_tname, rename->rn_tnamelen);	1058	rename->rn_tname, rename->rn_tnamelen);
1059	if (status)	1059	if (status)
1060	return status;	1060	return status;
1061	set_change_info(&rename->rn_sinfo, &cstate->current_fh);	1061	set_change_info(&rename->rn_sinfo, &cstate->save_fh);
1062	set_change_info(&rename->rn_tinfo, &cstate->save_fh);	1062	set_change_info(&rename->rn_tinfo, &cstate->current_fh);
1063	return nfs_ok;	1063	return nfs_ok;
1064	}	1064	}
1065		1065

fs/nfsd/nfs4xdr.c+2−2

 				 struct file *file, unsigned long maxcount)
 {
 	struct xdr_stream *xdr = resp->xdr;
+	unsigned int base = xdr->buf->page_len & ~PAGE_MASK;
 	unsigned int starting_len = xdr->buf->len;
 	__be32 zero = xdr_zero;
 	__be32 nfserr;
 		return nfserr_resource;
 	nfserr = nfsd_iter_read(resp->rqstp, read->rd_fhp, file,
-				read->rd_offset, &maxcount,
+				read->rd_offset, &maxcount, base,
-				xdr->buf->page_len & ~PAGE_MASK,
 				&read->rd_eof);
 	read->rd_length = maxcount;
 	if (nfserr)

fs/nfsd/nfssvc.c+3−2

 int nfsd_pool_stats_release(struct inode *inode, struct file *file)
 {
+	struct seq_file *seq = file->private_data;
+	struct svc_serv *serv = seq->private;
 	int ret = seq_release(inode, file);
-	struct net *net = inode->i_sb->s_fs_info;
 	mutex_lock(&nfsd_mutex);
-	nfsd_put(net);
+	svc_put(serv);
 	mutex_unlock(&nfsd_mutex);
 	return ret;
 }

fs/nilfs2/gcinode.c+3−3

 		struct the_nilfs *nilfs = inode->i_sb->s_fs_info;
 		err = nilfs_dat_translate(nilfs->ns_dat, vbn, &pbn);
-		if (unlikely(err)) { /* -EIO, -ENOMEM, -ENOENT */
+		if (unlikely(err)) /* -EIO, -ENOMEM, -ENOENT */
-			brelse(bh);
 			goto failed;
-		}
 	}
 	lock_buffer(bh);
  failed:
 	unlock_page(bh->b_page);
 	put_page(bh->b_page);
+	if (unlikely(err))
+		brelse(bh);
 	return err;
 }

fs/ntfs3/super.c+1−0

@@ -1562,6 +1562,7 @@ load_root: · 1561 unmodified lines
1562	put_inode_out:	1562	put_inode_out:
1563	iput(inode);	1563	iput(inode);
1564	out:	1564	out:
		1565	ntfs3_put_sbi(sbi);
1565	kfree(boot2);	1566	kfree(boot2);
1566	return err;	1567	return err;
1567	}	1568	}

fs/overlayfs/copy_up.c+3−2

 {
 	struct iattr attr = {
 		.ia_valid =
-		     ATTR_ATIME | ATTR_MTIME | ATTR_ATIME_SET | ATTR_MTIME_SET,
+		     ATTR_ATIME | ATTR_MTIME | ATTR_ATIME_SET | ATTR_MTIME_SET | ATTR_CTIME,
 		.ia_atime = stat->atime,
 		.ia_mtime = stat->mtime,
 	};
 	if (err)
 		return err;
-	if (inode->i_flags & OVL_COPY_I_FLAGS_MASK) {
+	if (inode->i_flags & OVL_COPY_I_FLAGS_MASK &&
+	    (S_ISREG(c->stat.mode) || S_ISDIR(c->stat.mode))) {
 		/*
 		 * Copy the fileattr inode flags that are the source of already
 		 * copied i_flags

fs/overlayfs/file.c+9−6

 	struct kiocb iocb;
 	refcount_t ref;
 	struct kiocb *orig_iocb;
-	struct fd fd;
 };
 static struct kmem_cache *ovl_aio_request_cachep;
 static inline void ovl_aio_put(struct ovl_aio_req *aio_req)
 {
 	if (refcount_dec_and_test(&aio_req->ref)) {
-		fdput(aio_req->fd);
+		fput(aio_req->iocb.ki_filp);
 		kmem_cache_free(ovl_aio_request_cachep, aio_req);
 	}
 }
 		if (!aio_req)
 			goto out;
-		aio_req->fd = real;
 		real.flags = 0;
 		aio_req->orig_iocb = iocb;
-		kiocb_clone(&aio_req->iocb, iocb, real.file);
+		kiocb_clone(&aio_req->iocb, iocb, get_file(real.file));
 		aio_req->iocb.ki_complete = ovl_aio_rw_complete;
 		refcount_set(&aio_req->ref, 2);
 		ret = vfs_iocb_iter_read(real.file, &aio_req->iocb, iter);
 	if (!ovl_should_sync(OVL_FS(inode->i_sb)))
 		ifl &= ~(IOCB_DSYNC | IOCB_SYNC);
+	/*
+	 * Overlayfs doesn't support deferred completions, don't copy
+	 * this property in case it is set by the issuer.
+	 */
+	ifl &= ~IOCB_DIO_CALLER_COMP;
 	old_cred = ovl_override_creds(file_inode(file)->i_sb);
 	if (is_sync_kiocb(iocb)) {
 		file_start_write(real.file);
 		if (!aio_req)
 			goto out;
-		aio_req->fd = real;
 		real.flags = 0;
 		aio_req->orig_iocb = iocb;
-		kiocb_clone(&aio_req->iocb, iocb, real.file);
+		kiocb_clone(&aio_req->iocb, iocb, get_file(real.file));
 		aio_req->iocb.ki_flags = ifl;
 		aio_req->iocb.ki_complete = ovl_aio_rw_complete;
 		refcount_set(&aio_req->ref, 2);

fs/pipe.c+0−1

@@ -537,7 +537,6 @@ pipe_write(struct kiocb iocb, struct iov_iter from) · 536 unmodified lines
537	break;	537	break;
538	}	538	}
539	ret += copied;	539	ret += copied;
540	buf->offset = 0;
541	buf->len = copied;	540	buf->len = copied;
542		541
543	if (!iov_iter_count(from))	542	if (!iov_iter_count(from))

fs/proc/internal.h+0−2

 	struct inode *inode;
 	struct task_struct *task;
 	struct mm_struct *mm;
-#ifdef CONFIG_MMU
 	struct vma_iterator iter;
-#endif
 #ifdef CONFIG_NUMA
 	struct mempolicy *task_mempolicy;
 #endif

fs/proc/task_nommu.c+37−27

@@ -175,15 +175,28 @@ static int show_map(struct seq_file m, void _p) · 174 unmodified lines
175	return nommu_vma_show(m, _p);	175	return nommu_vma_show(m, _p);
176	}	176	}
177		177
178	static void m_start(struct seq_file m, loff_t *pos)	178	static struct vm_area_struct proc_get_vma(struct proc_maps_private priv,
		179	loff_t *ppos)
		180	{
		181	struct vm_area_struct *vma = vma_next(&priv->iter);
		182
		183	if (vma) {
		184	*ppos = vma->vm_start;
		185	} else {
		186	*ppos = -1UL;
		187	}
		188
		189	return vma;
		190	}
		191
		192	static void m_start(struct seq_file m, loff_t *ppos)
179	{	193	{
180	struct proc_maps_private *priv = m->private;	194	struct proc_maps_private *priv = m->private;
		195	unsigned long last_addr = *ppos;
181	struct mm_struct *mm;	196	struct mm_struct *mm;
182	struct vm_area_struct *vma;
183	unsigned long addr = *pos;
184		197
185	/* See m_next(). Zero at the start or after lseek. */	198	/* See proc_get_vma(). Zero at the start or after lseek. */
186	if (addr == -1UL)	199	if (last_addr == -1UL)
187	return NULL;	200	return NULL;
188		201
189	/* pin the task and mm whilst we play with them */	202	/* pin the task and mm whilst we play with them */
@@ -192,44 +205,41 @@ static void m_start(struct seq_file m, loff_t *pos) · 2 unmodified lines
192	return ERR_PTR(-ESRCH);	205	return ERR_PTR(-ESRCH);
193		206
194	mm = priv->mm;	207	mm = priv->mm;
195	if (!mm \|\| !mmget_not_zero(mm))	208	if (!mm \|\| !mmget_not_zero(mm)) {
		209	put_task_struct(priv->task);
		210	priv->task = NULL;
196	return NULL;	211	return NULL;
		212	}
197		213
198	if (mmap_read_lock_killable(mm)) {	214	if (mmap_read_lock_killable(mm)) {
199	mmput(mm);	215	mmput(mm);
		216	put_task_struct(priv->task);
		217	priv->task = NULL;
200	return ERR_PTR(-EINTR);	218	return ERR_PTR(-EINTR);
201	}	219	}
202		220
203	/* start the next element from addr */	221	vma_iter_init(&priv->iter, mm, last_addr);
204	vma = find_vma(mm, addr);
205	if (vma)
206	return vma;
207		222
208	mmap_read_unlock(mm);	223	return proc_get_vma(priv, ppos);
209	mmput(mm);
210	return NULL;
211	}	224	}
212		225
213	static void m_stop(struct seq_file m, void _vml)	226	static void m_stop(struct seq_file m, void v)
214	{	227	{
215	struct proc_maps_private *priv = m->private;	228	struct proc_maps_private *priv = m->private;
		229	struct mm_struct *mm = priv->mm;
216		230
217	if (!IS_ERR_OR_NULL(_vml)) {	231	if (!priv->task)
218	mmap_read_unlock(priv->mm);	232	return;
219	mmput(priv->mm);	233
220	}	234	mmap_read_unlock(mm);
221	if (priv->task) {	235	mmput(mm);
222	put_task_struct(priv->task);	236	put_task_struct(priv->task);
223	priv->task = NULL;	237	priv->task = NULL;
224	}
225	}	238	}
226		239
227	static void m_next(struct seq_file m, void _p, loff_t pos)	240	static void m_next(struct seq_file m, void _p, loff_t ppos)
228	{	241	{
229	struct vm_area_struct *vma = _p;	242	return proc_get_vma(m->private, ppos);
230
231	*pos = vma->vm_end;
232	return find_vma(vma->vm_mm, vma->vm_end);
233	}	243	}
234		244
235	static const struct seq_operations proc_pid_maps_ops = {	245	static const struct seq_operations proc_pid_maps_ops = {

fs/reiserfs/reiserfs.h+3−3

@@ -2699,7 +2699,7 @@ struct reiserfs_iget_args { · 2698 unmodified lines
2699	#define get_journal_desc_magic(bh) (bh->b_data + bh->b_size - 12)	2699	#define get_journal_desc_magic(bh) (bh->b_data + bh->b_size - 12)
2700		2700
2701	#define journal_trans_half(blocksize) \	2701	#define journal_trans_half(blocksize) \
2702	((blocksize - sizeof (struct reiserfs_journal_desc) + sizeof (__u32) - 12) / sizeof (__u32))	2702	((blocksize - sizeof(struct reiserfs_journal_desc) - 12) / sizeof(__u32))
2703		2703
2704	/* journal.c see journal.c for all the comments here */	2704	/* journal.c see journal.c for all the comments here */
2705		2705
@@ -2711,7 +2711,7 @@ struct reiserfs_journal_desc { · 5 unmodified lines
2711	__le32 j_len;	2711	__le32 j_len;
2712		2712
2713	__le32 j_mount_id; /* mount id of this trans */	2713	__le32 j_mount_id; /* mount id of this trans */
2714	__le32 j_realblock[1]; /* real locations for each block */	2714	__le32 j_realblock[]; /* real locations for each block */
2715	};	2715	};
2716		2716
2717	#define get_desc_trans_id(d) le32_to_cpu((d)->j_trans_id)	2717	#define get_desc_trans_id(d) le32_to_cpu((d)->j_trans_id)
@@ -2726,7 +2726,7 @@ struct reiserfs_journal_desc { · 8 unmodified lines
2726	struct reiserfs_journal_commit {	2726	struct reiserfs_journal_commit {
2727	__le32 j_trans_id; /* must match j_trans_id from the desc block */	2727	__le32 j_trans_id; /* must match j_trans_id from the desc block */
2728	__le32 j_len; /* ditto */	2728	__le32 j_len; /* ditto */
2729	__le32 j_realblock[1]; /* real locations for each block */	2729	__le32 j_realblock[]; /* real locations for each block */
2730	};	2730	};
2731		2731
2732	#define get_commit_trans_id(c) le32_to_cpu((c)->j_trans_id)	2732	#define get_commit_trans_id(c) le32_to_cpu((c)->j_trans_id)

fs/smb/client/cached_dir.c+6−0

 	struct cached_fid *cfid, *q;
 	LIST_HEAD(entry);
+	if (cfids == NULL)
+		return;
 	spin_lock(&cfids->cfid_list_lock);
 	list_for_each_entry_safe(cfid, q, &cfids->entries, entry) {
 		list_move(&cfid->entry, &entry);
 	struct cached_fid *cfid, *q;
 	LIST_HEAD(entry);
+	if (cfids == NULL)
+		return;
 	if (cfids->laundromat) {
 		kthread_stop(cfids->laundromat);
 		cfids->laundromat = NULL;

fs/smb/client/cifsglob.h+2−1

 #define   MID_RETRY_NEEDED      8 /* session closed while this request out */
 #define   MID_RESPONSE_MALFORMED 0x10
 #define   MID_SHUTDOWN		 0x20
+#define   MID_RESPONSE_READY 0x40 /* ready for other process handle the rsp */
 /* Flags */
 #define   MID_WAIT_CANCELLED	 1 /* Cancelled while waiting for response */
  * cifsInodeInfo->lock_sem	cifsInodeInfo->llist		cifs_init_once
  *				->can_cache_brlcks
  * cifsInodeInfo->deferred_lock	cifsInodeInfo->deferred_closes	cifsInodeInfo_alloc
- * cached_fid->fid_mutex		cifs_tcon->crfid		tconInfoAlloc
+ * cached_fid->fid_mutex		cifs_tcon->crfid		tcon_info_alloc
  * cifsFileInfo->fh_mutex		cifsFileInfo			cifs_new_fileinfo
  * cifsFileInfo->file_info_lock	cifsFileInfo->count		cifs_new_fileinfo
  *				->invalidHandle			initiate_cifs_search

fs/smb/client/cifsproto.h+1−1

@@ -512,7 +512,7 @@ extern int CIFSSMBLogoff(const unsigned int xid, struct cifs_ses *ses); · 511 unmodified lines
512		512
513	extern struct cifs_ses *sesInfoAlloc(void);	513	extern struct cifs_ses *sesInfoAlloc(void);
514	extern void sesInfoFree(struct cifs_ses *);	514	extern void sesInfoFree(struct cifs_ses *);
515	extern struct cifs_tcon *tconInfoAlloc(void);	515	extern struct cifs_tcon *tcon_info_alloc(bool dir_leases_enabled);
516	extern void tconInfoFree(struct cifs_tcon *);	516	extern void tconInfoFree(struct cifs_tcon *);
517		517
518	extern int cifs_sign_rqst(struct smb_rqst rqst, struct TCP_Server_Info server,	518	extern int cifs_sign_rqst(struct smb_rqst rqst, struct TCP_Server_Info server,

fs/smb/client/connect.c+6−2

 		}
 	}
-	tcon = tconInfoAlloc();
+	/* no need to setup directory caching on IPC share, so pass in false */
+	tcon = tcon_info_alloc(false);
 	if (tcon == NULL)
 		return -ENOMEM;
 		goto out_fail;
 	}
-	tcon = tconInfoAlloc();
+	if (ses->server->capabilities & SMB2_GLOBAL_CAP_DIRECTORY_LEASING)
+		tcon = tcon_info_alloc(true);
+	else
+		tcon = tcon_info_alloc(false);
 	if (tcon == NULL) {
 		rc = -ENOMEM;
 		goto out_fail;

fs/smb/client/fs_context.c+1−0

@@ -1541,6 +1541,7 @@ static int smb3_fs_context_parse_param(struct fs_context *fc, · 1540 unmodified lines
1541		1541
1542	cifs_parse_mount_err:	1542	cifs_parse_mount_err:
1543	kfree_sensitive(ctx->password);	1543	kfree_sensitive(ctx->password);
		1544	ctx->password = NULL;
1544	return -EINVAL;	1545	return -EINVAL;
1545	}	1546	}
1546		1547

fs/smb/client/inode.c+1−1

@@ -2680,7 +2680,7 @@ int cifs_fiemap(struct inode inode, struct fiemap_extent_info fei, u64 start, · 2679 unmodified lines
2680	}	2680	}
2681		2681
2682	cifsFileInfo_put(cfile);	2682	cifsFileInfo_put(cfile);
2683	return -ENOTSUPP;	2683	return -EOPNOTSUPP;
2684	}	2684	}
2685		2685
2686	int cifs_truncate_page(struct address_space *mapping, loff_t from)	2686	int cifs_truncate_page(struct address_space *mapping, loff_t from)

fs/smb/client/misc.c+9−5

@@ -113,18 +113,22 @@ sesInfoFree(struct cifs_ses *buf_to_free) · 112 unmodified lines
113	}	113	}
114		114
115	struct cifs_tcon *	115	struct cifs_tcon *
116	tconInfoAlloc(void)	116	tcon_info_alloc(bool dir_leases_enabled)
117	{	117	{
118	struct cifs_tcon *ret_buf;	118	struct cifs_tcon *ret_buf;
119		119
120	ret_buf = kzalloc(sizeof(*ret_buf), GFP_KERNEL);	120	ret_buf = kzalloc(sizeof(*ret_buf), GFP_KERNEL);
121	if (!ret_buf)	121	if (!ret_buf)
122	return NULL;	122	return NULL;
123	ret_buf->cfids = init_cached_dirs();	123
124	if (!ret_buf->cfids) {	124	if (dir_leases_enabled == true) {
125	kfree(ret_buf);	125	ret_buf->cfids = init_cached_dirs();
126	return NULL;	126	if (!ret_buf->cfids) {
		127	kfree(ret_buf);
		128	return NULL;
		129	}
127	}	130	}
		131	/* else ret_buf->cfids is already set to NULL above */
128		132
129	atomic_inc(&tconInfoAllocCount);	133	atomic_inc(&tconInfoAllocCount);
130	ret_buf->status = TID_NEW;	134	ret_buf->status = TID_NEW;

fs/smb/client/smb2inode.c+3−0

 	int rc = 0;
 	switch (rsp->hdr.Status) {
+	case STATUS_IO_REPARSE_TAG_NOT_HANDLED:
+		reparse_point = true;
+		break;
 	case STATUS_STOPPED_ON_SYMLINK:
 		rc = smb2_parse_symlink_response(cifs_sb, iov,
 						 &data->symlink_target);

fs/smb/client/smb2maperror.c+0−2

 	"STATUS_IO_REPARSE_TAG_MISMATCH"},
 	{STATUS_IO_REPARSE_DATA_INVALID, -EIO,
 	"STATUS_IO_REPARSE_DATA_INVALID"},
-	{STATUS_IO_REPARSE_TAG_NOT_HANDLED, -EIO,
-	"STATUS_IO_REPARSE_TAG_NOT_HANDLED"},
 	{STATUS_REPARSE_POINT_NOT_RESOLVED, -EIO,
 	"STATUS_REPARSE_POINT_NOT_RESOLVED"},
 	{STATUS_DIRECTORY_IS_A_REPARSE_POINT, -EIO,

fs/smb/client/smb2ops.c+3−3

@@ -297,7 +297,7 @@ smb2_adjust_credits(struct TCP_Server_Info *server, · 296 unmodified lines
297	cifs_server_dbg(VFS, "request has less credits (%d) than required (%d)",	297	cifs_server_dbg(VFS, "request has less credits (%d) than required (%d)",
298	credits->value, new_val);	298	credits->value, new_val);
299		299
300	return -ENOTSUPP;	300	return -EOPNOTSUPP;
301	}	301	}
302		302
303	spin_lock(&server->req_lock);	303	spin_lock(&server->req_lock);
@@ -1161,7 +1161,7 @@ smb2_set_ea(const unsigned int xid, struct cifs_tcon *tcon, · 857 unmodified lines
1161	/* Use a fudge factor of 256 bytes in case we collide	1161	/* Use a fudge factor of 256 bytes in case we collide
1162	* with a different set_EAs command.	1162	* with a different set_EAs command.
1163	*/	1163	*/
1164	if(CIFSMaxBufSize - MAX_SMB2_CREATE_RESPONSE_SIZE -	1164	if (CIFSMaxBufSize - MAX_SMB2_CREATE_RESPONSE_SIZE -
1165	MAX_SMB2_CLOSE_RESPONSE_SIZE - 256 <	1165	MAX_SMB2_CLOSE_RESPONSE_SIZE - 256 <
1166	used_len + ea_name_len + ea_value_len + 1) {	1166	used_len + ea_name_len + ea_value_len + 1) {
1167	rc = -ENOSPC;	1167	rc = -ENOSPC;
@@ -4591,7 +4591,7 @@ handle_read_data(struct TCP_Server_Info server, struct mid_q_entry mid, · 3423 unmodified lines
4591		4591
4592	if (shdr->Command != SMB2_READ) {	4592	if (shdr->Command != SMB2_READ) {
4593	cifs_server_dbg(VFS, "only big read responses are supported\n");	4593	cifs_server_dbg(VFS, "only big read responses are supported\n");
4594	return -ENOTSUPP;	4594	return -EOPNOTSUPP;
4595	}	4595	}
4596		4596
4597	if (server->ops->is_session_expired &&	4597	if (server->ops->is_session_expired &&

fs/smb/client/smb2pdu.c+21−14

@@ -89,20 +89,26 @@ smb2_hdr_assemble(struct smb2_hdr *shdr, __le16 smb2_cmd, · 88 unmodified lines
89	struct TCP_Server_Info *server)	89	struct TCP_Server_Info *server)
90	{	90	{
91	struct smb3_hdr_req *smb3_hdr;	91	struct smb3_hdr_req *smb3_hdr;
		92
92	shdr->ProtocolId = SMB2_PROTO_NUMBER;	93	shdr->ProtocolId = SMB2_PROTO_NUMBER;
93	shdr->StructureSize = cpu_to_le16(64);	94	shdr->StructureSize = cpu_to_le16(64);
94	shdr->Command = smb2_cmd;	95	shdr->Command = smb2_cmd;
95	if (server->dialect >= SMB30_PROT_ID) {	96
96	/* After reconnect SMB3 must set ChannelSequence on subsequent reqs */
97	smb3_hdr = (struct smb3_hdr_req *)shdr;
98	/* if primary channel is not set yet, use default channel for chan sequence num */
99	if (SERVER_IS_CHAN(server))
100	smb3_hdr->ChannelSequence =
101	cpu_to_le16(server->primary_server->channel_sequence_num);
102	else
103	smb3_hdr->ChannelSequence = cpu_to_le16(server->channel_sequence_num);
104	}
105	if (server) {	97	if (server) {
		98	/* After reconnect SMB3 must set ChannelSequence on subsequent reqs */
		99	if (server->dialect >= SMB30_PROT_ID) {
		100	smb3_hdr = (struct smb3_hdr_req *)shdr;
		101	/*
		102	* if primary channel is not set yet, use default
		103	* channel for chan sequence num
		104	*/
		105	if (SERVER_IS_CHAN(server))
		106	smb3_hdr->ChannelSequence =
		107	cpu_to_le16(server->primary_server->channel_sequence_num);
		108	else
		109	smb3_hdr->ChannelSequence =
		110	cpu_to_le16(server->channel_sequence_num);
		111	}
106	spin_lock(&server->req_lock);	112	spin_lock(&server->req_lock);
107	/* Request up to 10 credits but don't go over the limit. */	113	/* Request up to 10 credits but don't go over the limit. */
108	if (server->credits >= server->max_credits)	114	if (server->credits >= server->max_credits)
@@ -842,7 +848,7 @@ add_posix_context(struct kvec iov, unsigned int num_iovec, umode_t mode) · 733 unmodified lines
842		848
843	iov[num].iov_base = create_posix_buf(mode);	849	iov[num].iov_base = create_posix_buf(mode);
844	if (mode == ACL_NO_MODE)	850	if (mode == ACL_NO_MODE)
845	cifs_dbg(FYI, "Invalid mode\n");	851	cifs_dbg(FYI, "%s: no mode\n", __func__);
846	if (iov[num].iov_base == NULL)	852	if (iov[num].iov_base == NULL)
847	return -ENOMEM;	853	return -ENOMEM;
848	iov[num].iov_len = sizeof(struct create_posix);	854	iov[num].iov_len = sizeof(struct create_posix);
@@ -2234,7 +2240,7 @@ create_durable_v2_buf(struct cifs_open_parms *oparms) · 1385 unmodified lines
2234	* (most servers default to 120 seconds) and most clients default to 0.	2240	* (most servers default to 120 seconds) and most clients default to 0.
2235	* This can be overridden at mount ("handletimeout=") if the user wants	2241	* This can be overridden at mount ("handletimeout=") if the user wants
2236	* a different persistent (or resilient) handle timeout for all opens	2242	* a different persistent (or resilient) handle timeout for all opens
2237	* opens on a particular SMB3 mount.	2243	* on a particular SMB3 mount.
2238	*/	2244	*/
2239	buf->dcontext.Timeout = cpu_to_le32(oparms->tcon->handle_timeout);	2245	buf->dcontext.Timeout = cpu_to_le32(oparms->tcon->handle_timeout);
2240	buf->dcontext.Flags = cpu_to_le32(SMB2_DHANDLE_FLAG_PERSISTENT);	2246	buf->dcontext.Flags = cpu_to_le32(SMB2_DHANDLE_FLAG_PERSISTENT);
@@ -2379,7 +2385,7 @@ add_twarp_context(struct kvec iov, unsigned int num_iovec, __u64 timewarp) · 138 unmodified lines
2379	return 0;	2385	return 0;
2380	}	2386	}
2381		2387
2382	/* See See http://technet.microsoft.com/en-us/library/hh509017(v=ws.10).aspx */	2388	/* See http://technet.microsoft.com/en-us/library/hh509017(v=ws.10).aspx */
2383	static void setup_owner_group_sids(char *buf)	2389	static void setup_owner_group_sids(char *buf)
2384	{	2390	{
2385	struct owner_group_sids sids = (struct owner_group_sids )buf;	2391	struct owner_group_sids sids = (struct owner_group_sids )buf;
@@ -3124,6 +3130,7 @@ void · 738 unmodified lines
3124	SMB2_ioctl_free(struct smb_rqst *rqst)	3130	SMB2_ioctl_free(struct smb_rqst *rqst)
3125	{	3131	{
3126	int i;	3132	int i;
		3133
3127	if (rqst && rqst->rq_iov) {	3134	if (rqst && rqst->rq_iov) {
3128	cifs_small_buf_release(rqst->rq_iov[0].iov_base); /* request */	3135	cifs_small_buf_release(rqst->rq_iov[0].iov_base); /* request */
3129	for (i = 1; i < rqst->rq_nvec; i++)	3136	for (i = 1; i < rqst->rq_nvec; i++)
@@ -3871,7 +3878,7 @@ void smb2_reconnect_server(struct work_struct *work) · 741 unmodified lines
3871	goto done;	3878	goto done;
3872		3879
3873	/* allocate a dummy tcon struct used for reconnect */	3880	/* allocate a dummy tcon struct used for reconnect */
3874	tcon = tconInfoAlloc();	3881	tcon = tcon_info_alloc(false);
3875	if (!tcon) {	3882	if (!tcon) {
3876	resched = true;	3883	resched = true;
3877	list_for_each_entry_safe(ses, ses2, &tmp_ses_list, rlist) {	3884	list_for_each_entry_safe(ses, ses2, &tmp_ses_list, rlist) {

fs/smb/client/smbdirect.c+6−3

@@ -1401,10 +1401,13 @@ create_conn: · 1400 unmodified lines
1401	server->smbd_conn = smbd_get_connection(	1401	server->smbd_conn = smbd_get_connection(
1402	server, (struct sockaddr *) &server->dstaddr);	1402	server, (struct sockaddr *) &server->dstaddr);
1403		1403
1404	if (server->smbd_conn)	1404	if (server->smbd_conn) {
1405	cifs_dbg(VFS, "RDMA transport re-established\n");	1405	cifs_dbg(VFS, "RDMA transport re-established\n");
1406		1406	trace_smb3_smbd_connect_done(server->hostname, server->conn_id, &server->dstaddr);
1407	return server->smbd_conn ? 0 : -ENOENT;	1407	return 0;
		1408	}
		1409	trace_smb3_smbd_connect_err(server->hostname, server->conn_id, &server->dstaddr);
		1410	return -ENOENT;
1408	}	1411	}
1409		1412
1410	static void destroy_caches_and_workqueue(struct smbd_connection *info)	1413	static void destroy_caches_and_workqueue(struct smbd_connection *info)

fs/smb/client/trace.h+2−0

@@ -935,6 +935,8 @@ DEFINE_EVENT(smb3_connect_class, smb3_##name, \ · 934 unmodified lines
935	TP_ARGS(hostname, conn_id, addr))	935	TP_ARGS(hostname, conn_id, addr))
936		936
937	DEFINE_SMB3_CONNECT_EVENT(connect_done);	937	DEFINE_SMB3_CONNECT_EVENT(connect_done);
		938	DEFINE_SMB3_CONNECT_EVENT(smbd_connect_done);
		939	DEFINE_SMB3_CONNECT_EVENT(smbd_connect_err);
938		940
939	DECLARE_EVENT_CLASS(smb3_connect_err_class,	941	DECLARE_EVENT_CLASS(smb3_connect_err_class,
940	TP_PROTO(char *hostname, __u64 conn_id,	942	TP_PROTO(char *hostname, __u64 conn_id,

fs/smb/client/transport.c+24−12

 #include <linux/bvec.h>
 #include <linux/highmem.h>
 #include <linux/uaccess.h>
-#include <asm/processor.h>
+#include <linux/processor.h>
 #include <linux/mempool.h>
 #include <linux/sched/signal.h>
 #include <linux/task_io_accounting_ops.h>
 void
 cifs_wake_up_task(struct mid_q_entry *mid)
 {
+	if (mid->mid_state == MID_RESPONSE_RECEIVED)
+		mid->mid_state = MID_RESPONSE_READY;
 	wake_up_process(mid->callback_data);
 }
 	struct TCP_Server_Info *server = midEntry->server;
 	if (midEntry->resp_buf && (midEntry->mid_flags & MID_WAIT_CANCELLED) &&
-	    midEntry->mid_state == MID_RESPONSE_RECEIVED &&
+	    (midEntry->mid_state == MID_RESPONSE_RECEIVED ||
+	     midEntry->mid_state == MID_RESPONSE_READY) &&
 	    server->ops->handle_cancelled_mid)
 		server->ops->handle_cancelled_mid(midEntry, server);
 	int error;
 	error = wait_event_state(server->response_q,
-				 midQ->mid_state != MID_REQUEST_SUBMITTED,
+				 midQ->mid_state != MID_REQUEST_SUBMITTED &&
+				 midQ->mid_state != MID_RESPONSE_RECEIVED,
 				 (TASK_KILLABLE|TASK_FREEZABLE_UNSAFE));
 	if (error < 0)
 		return -ERESTARTSYS;
 	spin_lock(&server->mid_lock);
 	switch (mid->mid_state) {
-	case MID_RESPONSE_RECEIVED:
+	case MID_RESPONSE_READY:
 		spin_unlock(&server->mid_lock);
 		return rc;
 	case MID_RETRY_NEEDED:
 	credits.instance = server->reconnect_instance;
 	add_credits(server, &credits, mid->optype);
+	if (mid->mid_state == MID_RESPONSE_RECEIVED)
+		mid->mid_state = MID_RESPONSE_READY;
 }
 static void
 			send_cancel(server, &rqst[i], midQ[i]);
 			spin_lock(&server->mid_lock);
 			midQ[i]->mid_flags |= MID_WAIT_CANCELLED;
-			if (midQ[i]->mid_state == MID_REQUEST_SUBMITTED) {
+			if (midQ[i]->mid_state == MID_REQUEST_SUBMITTED ||
+			    midQ[i]->mid_state == MID_RESPONSE_RECEIVED) {
 				midQ[i]->callback = cifs_cancelled_callback;
 				cancelled_mid[i] = true;
 				credits[i].value = 0;
 		}
 		if (!midQ[i]->resp_buf ||
-		    midQ[i]->mid_state != MID_RESPONSE_RECEIVED) {
+		    midQ[i]->mid_state != MID_RESPONSE_READY) {
 			rc = -EIO;
 			cifs_dbg(FYI, "Bad MID state?\n");
 			goto out;
 	if (rc != 0) {
 		send_cancel(server, &rqst, midQ);
 		spin_lock(&server->mid_lock);
-		if (midQ->mid_state == MID_REQUEST_SUBMITTED) {
+		if (midQ->mid_state == MID_REQUEST_SUBMITTED ||
+		    midQ->mid_state == MID_RESPONSE_RECEIVED) {
 			/* no longer considered to be "in-flight" */
 			midQ->callback = release_mid;
 			spin_unlock(&server->mid_lock);
 	}
 	if (!midQ->resp_buf || !out_buf ||
-	    midQ->mid_state != MID_RESPONSE_RECEIVED) {
+	    midQ->mid_state != MID_RESPONSE_READY) {
 		rc = -EIO;
 		cifs_server_dbg(VFS, "Bad MID state?\n");
 		goto out;
 	/* Wait for a reply - allow signals to interrupt. */
 	rc = wait_event_interruptible(server->response_q,
-		(!(midQ->mid_state == MID_REQUEST_SUBMITTED)) ||
+		(!(midQ->mid_state == MID_REQUEST_SUBMITTED ||
+		   midQ->mid_state == MID_RESPONSE_RECEIVED)) ||
 		((server->tcpStatus != CifsGood) &&
 		 (server->tcpStatus != CifsNew)));
 	/* Were we interrupted by a signal ? */
 	spin_lock(&server->srv_lock);
 	if ((rc == -ERESTARTSYS) &&
-		(midQ->mid_state == MID_REQUEST_SUBMITTED) &&
+		(midQ->mid_state == MID_REQUEST_SUBMITTED ||
+		 midQ->mid_state == MID_RESPONSE_RECEIVED) &&
 		((server->tcpStatus == CifsGood) ||
 		 (server->tcpStatus == CifsNew))) {
 		spin_unlock(&server->srv_lock);
 		if (rc) {
 			send_cancel(server, &rqst, midQ);
 			spin_lock(&server->mid_lock);
-			if (midQ->mid_state == MID_REQUEST_SUBMITTED) {
+			if (midQ->mid_state == MID_REQUEST_SUBMITTED ||
+			    midQ->mid_state == MID_RESPONSE_RECEIVED) {
 				/* no longer considered to be "in-flight" */
 				midQ->callback = release_mid;
 				spin_unlock(&server->mid_lock);
 		return rc;
 	/* rcvd frame is ok */
-	if (out_buf == NULL || midQ->mid_state != MID_RESPONSE_RECEIVED) {
+	if (out_buf == NULL || midQ->mid_state != MID_RESPONSE_READY) {
 		rc = -EIO;
 		cifs_tcon_dbg(VFS, "Bad MID state?\n");
 		goto out;

fs/smb/server/connection.c+3−0

@@ -197,6 +197,9 @@ int ksmbd_conn_write(struct ksmbd_work *work) · 196 unmodified lines
197	if (work->send_no_response)	197	if (work->send_no_response)
198	return 0;	198	return 0;
199		199
		200	if (!work->iov_idx)
		201	return -EINVAL;
		202
200	ksmbd_conn_lock(conn);	203	ksmbd_conn_lock(conn);
201	sent = conn->transport->ops->writev(conn->transport, work->iov,	204	sent = conn->transport->ops->writev(conn->transport, work->iov,
202	work->iov_cnt,	205	work->iov_cnt,

fs/smb/server/server.c+3−1

 	if (check_conn_state(work))
 		return SERVER_HANDLER_CONTINUE;
-	if (ksmbd_verify_smb_message(work))
+	if (ksmbd_verify_smb_message(work)) {
+		conn->ops->set_rsp_status(work, STATUS_INVALID_PARAMETER);
 		return SERVER_HANDLER_ABORT;
+	}
 	command = conn->ops->get_cmd_val(work);
 	*cmd = command;

fs/smb/server/smb2misc.c+1−3

 validate_credit:
 	if ((work->conn->vals->capabilities & SMB2_GLOBAL_CAP_LARGE_MTU) &&
-	    smb2_validate_credit_charge(work->conn, hdr)) {
+	    smb2_validate_credit_charge(work->conn, hdr))
-		work->conn->ops->set_rsp_status(work, STATUS_INVALID_PARAMETER);
 		return 1;
-	}
 	return 0;
 }

fs/smb/server/smb2pdu.c+1−1

@@ -6312,7 +6312,7 @@ int smb2_read(struct ksmbd_work *work) · 6311 unmodified lines
6312	aux_payload_buf,	6312	aux_payload_buf,
6313	nbytes);	6313	nbytes);
6314	kvfree(aux_payload_buf);	6314	kvfree(aux_payload_buf);
6315		6315	aux_payload_buf = NULL;
6316	nbytes = 0;	6316	nbytes = 0;
6317	if (remain_bytes < 0) {	6317	if (remain_bytes < 0) {
6318	err = (int)remain_bytes;	6318	err = (int)remain_bytes;

fs/smb/server/smbacl.c+0−1

@@ -1420,7 +1420,6 @@ int set_info_sec(struct ksmbd_conn conn, struct ksmbd_tree_connect tcon, · 1419 unmodified lines
1420	out:	1420	out:
1421	posix_acl_release(fattr.cf_acls);	1421	posix_acl_release(fattr.cf_acls);
1422	posix_acl_release(fattr.cf_dacls);	1422	posix_acl_release(fattr.cf_dacls);
1423	mark_inode_dirty(inode);
1424	return rc;	1423	return rc;
1425	}	1424	}
1426		1425

fs/stat.c+2−45

@@ -26,37 +26,6 @@ · 25 unmodified lines
26	#include "internal.h"	26	#include "internal.h"
27	#include "mount.h"	27	#include "mount.h"
28		28
29	/**
30	* fill_mg_cmtime - Fill in the mtime and ctime and flag ctime as QUERIED
31	* @stat: where to store the resulting values
32	* @request_mask: STATX_* values requested
33	* @inode: inode from which to grab the c/mtime
34	*
35	* Given @inode, grab the ctime and mtime out if it and store the result
36	* in @stat. When fetching the value, flag it as queried so the next write
37	* will use a fine-grained timestamp.
38	*/
39	void fill_mg_cmtime(struct kstat stat, u32 request_mask, struct inode inode)
40	{
41	atomic_long_t pnsec = (atomic_long_t )&inode->__i_ctime.tv_nsec;
42
43	/* If neither time was requested, then don't report them */
44	if (!(request_mask & (STATX_CTIME\|STATX_MTIME))) {
45	stat->result_mask &= ~(STATX_CTIME\|STATX_MTIME);
46	return;
47	}
48
49	stat->mtime = inode->i_mtime;
50	stat->ctime.tv_sec = inode->__i_ctime.tv_sec;
51	/*
52	* Atomically set the QUERIED flag and fetch the new value with
53	* the flag masked off.
54	*/
55	stat->ctime.tv_nsec = atomic_long_fetch_or(I_CTIME_QUERIED, pnsec) &
56	~I_CTIME_QUERIED;
57	}
58	EXPORT_SYMBOL(fill_mg_cmtime);
59
60	/**	29	/**
61	* generic_fillattr - Fill in the basic attributes from the inode struct	30	* generic_fillattr - Fill in the basic attributes from the inode struct
62	* @idmap: idmap of the mount the inode was found from	31	* @idmap: idmap of the mount the inode was found from
@@ -89,14 +58,8 @@ void generic_fillattr(struct mnt_idmap *idmap, u32 request_mask, · 26 unmodified lines
89	stat->rdev = inode->i_rdev;	58	stat->rdev = inode->i_rdev;
90	stat->size = i_size_read(inode);	59	stat->size = i_size_read(inode);
91	stat->atime = inode->i_atime;	60	stat->atime = inode->i_atime;
92		61	stat->mtime = inode->i_mtime;
93	if (is_mgtime(inode)) {	62	stat->ctime = inode_get_ctime(inode);
94	fill_mg_cmtime(stat, request_mask, inode);
95	} else {
96	stat->mtime = inode->i_mtime;
97	stat->ctime = inode_get_ctime(inode);
98	}
99
100	stat->blksize = i_blocksize(inode);	63	stat->blksize = i_blocksize(inode);
101	stat->blocks = inode->i_blocks;	64	stat->blocks = inode->i_blocks;
102		65
@@ -419,12 +382,6 @@ SYSCALL_DEFINE2(fstat, unsigned int, fd, struct __old_kernel_stat __user *, stat · 316 unmodified lines
419		382
420	#ifdef __ARCH_WANT_NEW_STAT	383	#ifdef __ARCH_WANT_NEW_STAT
421		384
422	#if BITS_PER_LONG == 32
423	# define choose_32_64(a,b) a
424	#else
425	# define choose_32_64(a,b) b
426	#endif
427
428	#ifndef INIT_STRUCT_STAT_PADDING	385	#ifndef INIT_STRUCT_STAT_PADDING
429	# define INIT_STRUCT_STAT_PADDING(st) memset(&st, 0, sizeof(st))	386	# define INIT_STRUCT_STAT_PADDING(st) memset(&st, 0, sizeof(st))
430	#endif	387	#endif

fs/tracefs/event_inode.c+122−24

@@ -70,6 +70,7 @@ static struct dentry eventfs_root_lookup(struct inode dir, · 69 unmodified lines
70	struct dentry *dentry,	70	struct dentry *dentry,
71	unsigned int flags);	71	unsigned int flags);
72	static int dcache_dir_open_wrapper(struct inode inode, struct file file);	72	static int dcache_dir_open_wrapper(struct inode inode, struct file file);
		73	static int dcache_readdir_wrapper(struct file file, struct dir_context ctx);
73	static int eventfs_release(struct inode inode, struct file file);	74	static int eventfs_release(struct inode inode, struct file file);
74		75
75	static const struct inode_operations eventfs_root_dir_inode_operations = {	76	static const struct inode_operations eventfs_root_dir_inode_operations = {
@@ -79,7 +80,7 @@ static const struct inode_operations eventfs_root_dir_inode_operations = { · 3 unmodified lines
79	static const struct file_operations eventfs_file_operations = {	80	static const struct file_operations eventfs_file_operations = {
80	.open = dcache_dir_open_wrapper,	81	.open = dcache_dir_open_wrapper,
81	.read = generic_read_dir,	82	.read = generic_read_dir,
82	.iterate_shared = dcache_readdir,	83	.iterate_shared = dcache_readdir_wrapper,
83	.llseek = generic_file_llseek,	84	.llseek = generic_file_llseek,
84	.release = eventfs_release,	85	.release = eventfs_release,
85	};	86	};
@@ -185,17 +186,49 @@ static struct dentry create_dir(const char name, struct dentry parent, void · 99 unmodified lines
185		186
186	/**	187	/**
187	* eventfs_set_ef_status_free - set the ef->status to free	188	* eventfs_set_ef_status_free - set the ef->status to free
		189	* @ti: the tracefs_inode of the dentry
188	* @dentry: dentry who's status to be freed	190	* @dentry: dentry who's status to be freed
189	*	191	*
190	* eventfs_set_ef_status_free will be called if no more	192	* eventfs_set_ef_status_free will be called if no more
191	* references remain	193	* references remain
192	*/	194	*/
193	void eventfs_set_ef_status_free(struct dentry *dentry)	195	void eventfs_set_ef_status_free(struct tracefs_inode ti, struct dentry dentry)
194	{	196	{
195	struct tracefs_inode *ti_parent;	197	struct tracefs_inode *ti_parent;
196	struct eventfs_file *ef;	198	struct eventfs_inode *ei;
		199	struct eventfs_file ef, tmp;
		200
		201	/* The top level events directory may be freed by this */
		202	if (unlikely(ti->flags & TRACEFS_EVENT_TOP_INODE)) {
		203	LIST_HEAD(ef_del_list);
		204
		205	mutex_lock(&eventfs_mutex);
		206
		207	ei = ti->private;
		208
		209	/* Record all the top level files */
		210	list_for_each_entry_srcu(ef, &ei->e_top_files, list,
		211	lockdep_is_held(&eventfs_mutex)) {
		212	list_add_tail(&ef->del_list, &ef_del_list);
		213	}
		214
		215	/* Nothing should access this, but just in case! */
		216	ti->private = NULL;
		217
		218	mutex_unlock(&eventfs_mutex);
		219
		220	/* Now safely free the top level files and their children */
		221	list_for_each_entry_safe(ef, tmp, &ef_del_list, del_list) {
		222	list_del(&ef->del_list);
		223	eventfs_remove(ef);
		224	}
		225
		226	kfree(ei);
		227	return;
		228	}
197		229
198	mutex_lock(&eventfs_mutex);	230	mutex_lock(&eventfs_mutex);
		231
199	ti_parent = get_tracefs(dentry->d_parent->d_inode);	232	ti_parent = get_tracefs(dentry->d_parent->d_inode);
200	if (!ti_parent \|\| !(ti_parent->flags & TRACEFS_EVENT_INODE))	233	if (!ti_parent \|\| !(ti_parent->flags & TRACEFS_EVENT_INODE))
201	goto out;	234	goto out;
@@ -364,6 +397,11 @@ static struct dentry eventfs_root_lookup(struct inode dir, · 162 unmodified lines
364	return ret;	397	return ret;
365	}	398	}
366		399
		400	struct dentry_list {
		401	void *cursor;
		402	struct dentry **dentries;
		403	};
		404
367	/**	405	/**
368	* eventfs_release - called to release eventfs file/dir	406	* eventfs_release - called to release eventfs file/dir
369	* @inode: inode to be released	407	* @inode: inode to be released
@@ -372,26 +410,25 @@ static struct dentry eventfs_root_lookup(struct inode dir, · 2 unmodified lines
372	static int eventfs_release(struct inode inode, struct file file)	410	static int eventfs_release(struct inode inode, struct file file)
373	{	411	{
374	struct tracefs_inode *ti;	412	struct tracefs_inode *ti;
375	struct eventfs_inode *ei;	413	struct dentry_list *dlist = file->private_data;
376	struct eventfs_file *ef;	414	void *cursor;
377	struct dentry *dentry;	415	int i;
378	int idx;
379		416
380	ti = get_tracefs(inode);	417	ti = get_tracefs(inode);
381	if (!(ti->flags & TRACEFS_EVENT_INODE))	418	if (!(ti->flags & TRACEFS_EVENT_INODE))
382	return -EINVAL;	419	return -EINVAL;
383		420
384	ei = ti->private;	421	if (WARN_ON_ONCE(!dlist))
385	idx = srcu_read_lock(&eventfs_srcu);	422	return -EINVAL;
386	list_for_each_entry_srcu(ef, &ei->e_top_files, list,	423
387	srcu_read_lock_held(&eventfs_srcu)) {	424	for (i = 0; dlist->dentries && dlist->dentries[i]; i++) {
388	mutex_lock(&eventfs_mutex);	425	dput(dlist->dentries[i]);
389	dentry = ef->dentry;
390	mutex_unlock(&eventfs_mutex);
391	if (dentry)
392	dput(dentry);
393	}	426	}
394	srcu_read_unlock(&eventfs_srcu, idx);	427
		428	cursor = dlist->cursor;
		429	kfree(dlist->dentries);
		430	kfree(dlist);
		431	file->private_data = cursor;
395	return dcache_dir_close(inode, file);	432	return dcache_dir_close(inode, file);
396	}	433	}
397		434
@@ -410,21 +447,70 @@ static int dcache_dir_open_wrapper(struct inode inode, struct file file) · 12 unmodified lines
410	struct tracefs_inode *ti;	447	struct tracefs_inode *ti;
411	struct eventfs_inode *ei;	448	struct eventfs_inode *ei;
412	struct eventfs_file *ef;	449	struct eventfs_file *ef;
		450	struct dentry_list *dlist;
		451	struct dentry **dentries = NULL;
413	struct dentry *dentry = file_dentry(file);	452	struct dentry *dentry = file_dentry(file);
		453	struct dentry *d;
414	struct inode *f_inode = file_inode(file);	454	struct inode *f_inode = file_inode(file);
		455	int cnt = 0;
415	int idx;	456	int idx;
		457	int ret;
416		458
417	ti = get_tracefs(f_inode);	459	ti = get_tracefs(f_inode);
418	if (!(ti->flags & TRACEFS_EVENT_INODE))	460	if (!(ti->flags & TRACEFS_EVENT_INODE))
419	return -EINVAL;	461	return -EINVAL;
420		462
		463	if (WARN_ON_ONCE(file->private_data))
		464	return -EINVAL;
		465
		466	dlist = kmalloc(sizeof(*dlist), GFP_KERNEL);
		467	if (!dlist)
		468	return -ENOMEM;
		469
421	ei = ti->private;	470	ei = ti->private;
422	idx = srcu_read_lock(&eventfs_srcu);	471	idx = srcu_read_lock(&eventfs_srcu);
423	list_for_each_entry_rcu(ef, &ei->e_top_files, list) {	472	list_for_each_entry_srcu(ef, &ei->e_top_files, list,
424	create_dentry(ef, dentry, false);	473	srcu_read_lock_held(&eventfs_srcu)) {
		474	d = create_dentry(ef, dentry, false);
		475	if (d) {
		476	struct dentry **tmp;
		477
		478	tmp = krealloc(dentries, sizeof(d) * (cnt + 2), GFP_KERNEL);
		479	if (!tmp)
		480	break;
		481	tmp[cnt] = d;
		482	tmp[cnt + 1] = NULL;
		483	cnt++;
		484	dentries = tmp;
		485	}
425	}	486	}
426	srcu_read_unlock(&eventfs_srcu, idx);	487	srcu_read_unlock(&eventfs_srcu, idx);
427	return dcache_dir_open(inode, file);	488	ret = dcache_dir_open(inode, file);
		489
		490	/*
		491	* dcache_dir_open() sets file->private_data to a dentry cursor.
		492	* Need to save that but also save all the dentries that were
		493	* opened by this function.
		494	*/
		495	dlist->cursor = file->private_data;
		496	dlist->dentries = dentries;
		497	file->private_data = dlist;
		498	return ret;
		499	}
		500
		501	/*
		502	* This just sets the file->private_data back to the cursor and back.
		503	*/
		504	static int dcache_readdir_wrapper(struct file file, struct dir_context ctx)
		505	{
		506	struct dentry_list *dlist = file->private_data;
		507	int ret;
		508
		509	file->private_data = dlist->cursor;
		510	ret = dcache_readdir(file, ctx);
		511	dlist->cursor = file->private_data;
		512	file->private_data = dlist;
		513	return ret;
428	}	514	}
429		515
430	/**	516	/**
@@ -491,6 +577,9 @@ struct dentry eventfs_create_events_dir(const char name, · 60 unmodified lines
491	struct tracefs_inode *ti;	577	struct tracefs_inode *ti;
492	struct inode *inode;	578	struct inode *inode;
493		579
		580	if (security_locked_down(LOCKDOWN_TRACEFS))
		581	return NULL;
		582
494	if (IS_ERR(dentry))	583	if (IS_ERR(dentry))
495	return dentry;	584	return dentry;
496		585
@@ -507,7 +596,7 @@ struct dentry eventfs_create_events_dir(const char name, · 10 unmodified lines
507	INIT_LIST_HEAD(&ei->e_top_files);	596	INIT_LIST_HEAD(&ei->e_top_files);
508		597
509	ti = get_tracefs(inode);	598	ti = get_tracefs(inode);
510	ti->flags \|= TRACEFS_EVENT_INODE;	599	ti->flags \|= TRACEFS_EVENT_INODE \| TRACEFS_EVENT_TOP_INODE;
511	ti->private = ei;	600	ti->private = ei;
512		601
513	inode->i_mode = S_IFDIR \| S_IRWXU \| S_IRUGO \| S_IXUGO;	602	inode->i_mode = S_IFDIR \| S_IRWXU \| S_IRUGO \| S_IXUGO;
@@ -538,6 +627,9 @@ struct eventfs_file eventfs_add_subsystem_dir(const char name, · 24 unmodified lines
538	struct eventfs_inode *ei_parent;	627	struct eventfs_inode *ei_parent;
539	struct eventfs_file *ef;	628	struct eventfs_file *ef;
540		629
		630	if (security_locked_down(LOCKDOWN_TRACEFS))
		631	return NULL;
		632
541	if (!parent)	633	if (!parent)
542	return ERR_PTR(-EINVAL);	634	return ERR_PTR(-EINVAL);
543		635
@@ -569,6 +661,9 @@ struct eventfs_file eventfs_add_dir(const char name, · 25 unmodified lines
569	{	661	{
570	struct eventfs_file *ef;	662	struct eventfs_file *ef;
571		663
		664	if (security_locked_down(LOCKDOWN_TRACEFS))
		665	return NULL;
		666
572	if (!ef_parent)	667	if (!ef_parent)
573	return ERR_PTR(-EINVAL);	668	return ERR_PTR(-EINVAL);
574		669
@@ -606,6 +701,9 @@ int eventfs_add_events_file(const char *name, umode_t mode, · 31 unmodified lines
606	struct eventfs_inode *ei;	701	struct eventfs_inode *ei;
607	struct eventfs_file *ef;	702	struct eventfs_file *ef;
608		703
		704	if (security_locked_down(LOCKDOWN_TRACEFS))
		705	return -ENODEV;
		706
609	if (!parent)	707	if (!parent)
610	return -EINVAL;	708	return -EINVAL;
611		709
@@ -654,6 +752,9 @@ int eventfs_add_file(const char *name, umode_t mode, · 42 unmodified lines
654	{	752	{
655	struct eventfs_file *ef;	753	struct eventfs_file *ef;
656		754
		755	if (security_locked_down(LOCKDOWN_TRACEFS))
		756	return -ENODEV;
		757
657	if (!ef_parent)	758	if (!ef_parent)
658	return -EINVAL;	759	return -EINVAL;
659		760
@@ -791,7 +892,6 @@ void eventfs_remove(struct eventfs_file *ef) · 131 unmodified lines
791	void eventfs_remove_events_dir(struct dentry *dentry)	892	void eventfs_remove_events_dir(struct dentry *dentry)
792	{	893	{
793	struct tracefs_inode *ti;	894	struct tracefs_inode *ti;
794	struct eventfs_inode *ei;
795		895
796	if (!dentry \|\| !dentry->d_inode)	896	if (!dentry \|\| !dentry->d_inode)
797	return;	897	return;
@@ -800,8 +900,6 @@ void eventfs_remove_events_dir(struct dentry *dentry) · 2 unmodified lines
800	if (!ti \|\| !(ti->flags & TRACEFS_EVENT_INODE))	900	if (!ti \|\| !(ti->flags & TRACEFS_EVENT_INODE))
801	return;	901	return;
802		902
803	ei = ti->private;
804	d_invalidate(dentry);	903	d_invalidate(dentry);
805	dput(dentry);	904	dput(dentry);
806	kfree(ei);
807	}	905	}

fs/tracefs/inode.c+4−1

 	ti = get_tracefs(inode);
 	if (ti && ti->flags & TRACEFS_EVENT_INODE)
-		eventfs_set_ef_status_free(dentry);
+		eventfs_set_ef_status_free(ti, dentry);
 	iput(inode);
 }
  */
 struct dentry *tracefs_create_dir(const char *name, struct dentry *parent)
 {
+	if (security_locked_down(LOCKDOWN_TRACEFS))
+		return NULL;
 	return __create_dir(name, parent, &simple_dir_inode_operations);
 }

fs/tracefs/internal.h+3−2

 #define _TRACEFS_INTERNAL_H
 enum {
-	TRACEFS_EVENT_INODE     = BIT(1),
+	TRACEFS_EVENT_INODE		= BIT(1),
+	TRACEFS_EVENT_TOP_INODE		= BIT(2),
 };
 struct tracefs_inode {
 struct dentry *eventfs_start_creating(const char *name, struct dentry *parent);
 struct dentry *eventfs_failed_creating(struct dentry *dentry);
 struct dentry *eventfs_end_creating(struct dentry *dentry);
-void eventfs_set_ef_status_free(struct dentry *dentry);
+void eventfs_set_ef_status_free(struct tracefs_inode *ti, struct dentry *dentry);
 #endif /* _TRACEFS_INTERNAL_H */

fs/xfs/Kconfig+1−1

@@ -147,7 +147,7 @@ config XFS_ONLINE_SCRUB_STATS · 146 unmodified lines
147	bool "XFS online metadata check usage data collection"	147	bool "XFS online metadata check usage data collection"
148	default y	148	default y
149	depends on XFS_ONLINE_SCRUB	149	depends on XFS_ONLINE_SCRUB
150	select FS_DEBUG	150	select XFS_DEBUG
151	help	151	help
152	If you say Y here, the kernel will gather usage data about	152	If you say Y here, the kernel will gather usage data about
153	the online metadata check subsystem. This includes the number	153	the online metadata check subsystem. This includes the number

fs/xfs/libxfs/xfs_log_recover.h+22−0

@@ -131,4 +131,26 @@ void xlog_check_buf_cancel_table(struct xlog *log); · 130 unmodified lines
131	#define xlog_check_buf_cancel_table(log) do { } while (0)	131	#define xlog_check_buf_cancel_table(log) do { } while (0)
132	#endif	132	#endif
133		133
		134	/*
		135	* Transform a regular reservation into one suitable for recovery of a log
		136	* intent item.
		137	*
		138	* Intent recovery only runs a single step of the transaction chain and defers
		139	* the rest to a separate transaction. Therefore, we reduce logcount to 1 here
		140	* to avoid livelocks if the log grant space is nearly exhausted due to the
		141	* recovered intent pinning the tail. Keep the same logflags to avoid tripping
		142	* asserts elsewhere. Struct copies abound below.
		143	*/
		144	static inline struct xfs_trans_res
		145	xlog_recover_resv(const struct xfs_trans_res *r)
		146	{
		147	struct xfs_trans_res ret = {
		148	.tr_logres = r->tr_logres,
		149	.tr_logcount = 1,
		150	.tr_logflags = r->tr_logflags,
		151	};
		152
		153	return ret;
		154	}
		155
134	#endif /* __XFS_LOG_RECOVER_H__ */	156	#endif /* __XFS_LOG_RECOVER_H__ */

fs/xfs/libxfs/xfs_sb.c+2−1

@@ -266,7 +266,8 @@ xfs_validate_sb_write( · 265 unmodified lines
266	return -EFSCORRUPTED;	266	return -EFSCORRUPTED;
267	}	267	}
268		268
269	if (xfs_sb_has_ro_compat_feature(sbp, XFS_SB_FEAT_RO_COMPAT_UNKNOWN)) {	269	if (!xfs_is_readonly(mp) &&
		270	xfs_sb_has_ro_compat_feature(sbp, XFS_SB_FEAT_RO_COMPAT_UNKNOWN)) {
270	xfs_alert(mp,	271	xfs_alert(mp,
271	"Corruption detected in superblock read-only compatible features (0x%x)!",	272	"Corruption detected in superblock read-only compatible features (0x%x)!",
272	(sbp->sb_features_ro_compat &	273	(sbp->sb_features_ro_compat &

fs/xfs/libxfs/xfs_trans_inode.c+3−3

 	ASSERT(tp);
 	ASSERT(xfs_isilocked(ip, XFS_ILOCK_EXCL));
-	/* If the mtime changes, then ctime must also change */
+	tv = current_time(inode);
-	ASSERT(flags & XFS_ICHGTIME_CHG);
-	tv = inode_set_ctime_current(inode);
 	if (flags & XFS_ICHGTIME_MOD)
 		inode->i_mtime = tv;
+	if (flags & XFS_ICHGTIME_CHG)
+		inode_set_ctime_to_ts(inode, tv);
 	if (flags & XFS_ICHGTIME_CREATE)
 		ip->i_crtime = tv;
 }

fs/xfs/scrub/scrub.c+2−2

 out_teardown:
 	error = xchk_teardown(sc, error);
 out_sc:
+	if (error != -ENOENT)
+		xchk_stats_merge(mp, sm, &run);
 	kfree(sc);
 out:
 	trace_xchk_done(XFS_I(file_inode(file)), sm, error);
 		sm->sm_flags |= XFS_SCRUB_OFLAG_CORRUPT;
 		error = 0;
 	}
-	if (error != -ENOENT)
-		xchk_stats_merge(mp, sm, &run);
 	return error;
 need_drain:
 	error = xchk_teardown(sc, 0);

fs/xfs/scrub/stats.c+4−1

 {
 	struct xchk_scrub_stats		*css;
-	ASSERT(sm->sm_type < XFS_SCRUB_TYPE_NR);
+	if (sm->sm_type >= XFS_SCRUB_TYPE_NR) {
+		ASSERT(sm->sm_type < XFS_SCRUB_TYPE_NR);
+		return;
+	}
 	css = &cs->cs_stats[sm->sm_type];
 	spin_lock(&css->css_lock);

fs/xfs/xfs_attr_inactive.c+0−1

@@ -333,7 +333,6 @@ xfs_attr_inactive( · 332 unmodified lines
333	int error = 0;	333	int error = 0;
334		334
335	mp = dp->i_mount;	335	mp = dp->i_mount;
336	ASSERT(! XFS_NOT_DQATTACHED(mp, dp));
337		336
338	xfs_ilock(dp, lock_mode);	337	xfs_ilock(dp, lock_mode);
339	if (!xfs_inode_has_attr_fork(dp))	338	if (!xfs_inode_has_attr_fork(dp))

fs/xfs/xfs_attr_item.c+4−3

 	struct xfs_inode		*ip;
 	struct xfs_da_args		*args;
 	struct xfs_trans		*tp;
-	struct xfs_trans_res		tres;
+	struct xfs_trans_res		resv;
 	struct xfs_attri_log_format	*attrp;
 	struct xfs_attri_log_nameval	*nv = attrip->attri_nameval;
 	int				error;
 		goto out;
 	}
-	xfs_init_attr_trans(args, &tres, &total);
+	xfs_init_attr_trans(args, &resv, &total);
-	error = xfs_trans_alloc(mp, &tres, total, 0, XFS_TRANS_RESERVE, &tp);
+	resv = xlog_recover_resv(&resv);
+	error = xfs_trans_alloc(mp, &resv, total, 0, XFS_TRANS_RESERVE, &tp);
 	if (error)
 		goto out;

fs/xfs/xfs_bmap_item.c+3−1

 	struct list_head		*capture_list)
 {
 	struct xfs_bmap_intent		fake = { };
+	struct xfs_trans_res		resv;
 	struct xfs_bui_log_item		*buip = BUI_ITEM(lip);
 	struct xfs_trans		*tp;
 	struct xfs_inode		*ip = NULL;
 		return error;
 	/* Allocate transaction and do the work. */
-	error = xfs_trans_alloc(mp, &M_RES(mp)->tr_itruncate,
+	resv = xlog_recover_resv(&M_RES(mp)->tr_itruncate);
+	error = xfs_trans_alloc(mp, &resv,
 			XFS_EXTENTADD_SPACE_RES(mp, XFS_DATA_FORK), 0, 0, &tp);
 	if (error)
 		goto err_rele;

fs/xfs/xfs_export.c+14−0

@@ -146,6 +146,20 @@ xfs_nfs_get_inode( · 145 unmodified lines
146	return ERR_PTR(error);	146	return ERR_PTR(error);
147	}	147	}
148		148
		149	/*
		150	* Reload the incore unlinked list to avoid failure in inodegc.
		151	* Use an unlocked check here because unrecovered unlinked inodes
		152	* should be somewhat rare.
		153	*/
		154	if (xfs_inode_unlinked_incomplete(ip)) {
		155	error = xfs_inode_reload_unlinked(ip);
		156	if (error) {
		157	xfs_force_shutdown(mp, SHUTDOWN_CORRUPT_INCORE);
		158	xfs_irele(ip);
		159	return ERR_PTR(error);
		160	}
		161	}
		162
149	if (VFS_I(ip)->i_generation != generation) {	163	if (VFS_I(ip)->i_generation != generation) {
150	xfs_irele(ip);	164	xfs_irele(ip);
151	return ERR_PTR(-ESTALE);	165	return ERR_PTR(-ESTALE);

fs/xfs/xfs_extfree_item.c+3−1

 	struct xfs_log_item		*lip,
 	struct list_head		*capture_list)
 {
+	struct xfs_trans_res		resv;
 	struct xfs_efi_log_item		*efip = EFI_ITEM(lip);
 	struct xfs_mount		*mp = lip->li_log->l_mp;
 	struct xfs_efd_log_item		*efdp;
 		}
 	}
-	error = xfs_trans_alloc(mp, &M_RES(mp)->tr_itruncate, 0, 0, 0, &tp);
+	resv = xlog_recover_resv(&M_RES(mp)->tr_itruncate);
+	error = xfs_trans_alloc(mp, &resv, 0, 0, 0, &tp);
 	if (error)
 		return error;
 	efdp = xfs_trans_get_efd(tp, efip, efip->efi_format.efi_nextents);

fs/xfs/xfs_fsmap.c+18−7

 }
 #endif /* CONFIG_XFS_RT */
+static inline bool
+rmap_not_shareable(struct xfs_mount *mp, const struct xfs_rmap_irec *r)
+{
+	if (!xfs_has_reflink(mp))
+		return true;
+	if (XFS_RMAP_NON_INODE_OWNER(r->rm_owner))
+		return true;
+	if (r->rm_flags & (XFS_RMAP_ATTR_FORK | XFS_RMAP_BMBT_BLOCK |
+			   XFS_RMAP_UNWRITTEN))
+		return true;
+	return false;
+}
 /* Execute a getfsmap query against the regular data device. */
 STATIC int
 __xfs_getfsmap_datadev(
 	 * low to the fsmap low key and max out the high key to the end
 	 * of the AG.
 	 */
-	info->low.rm_startblock = XFS_FSB_TO_AGBNO(mp, start_fsb);
 	info->low.rm_offset = XFS_BB_TO_FSBT(mp, keys[0].fmr_offset);
 	error = xfs_fsmap_owner_to_rmap(&info->low, &keys[0]);
 	if (error)
 	/* Adjust the low key if we are continuing from where we left off. */
 	if (info->low.rm_blockcount == 0) {
-		/* empty */
+		/* No previous record from which to continue */
-	} else if (XFS_RMAP_NON_INODE_OWNER(info->low.rm_owner) ||
+	} else if (rmap_not_shareable(mp, &info->low)) {
-		   (info->low.rm_flags & (XFS_RMAP_ATTR_FORK |
+		/* Last record seen was an unshareable extent */
-					  XFS_RMAP_BMBT_BLOCK |
-					  XFS_RMAP_UNWRITTEN))) {
-		info->low.rm_startblock += info->low.rm_blockcount;
 		info->low.rm_owner = 0;
 		info->low.rm_offset = 0;
 		if (XFS_FSB_TO_DADDR(mp, start_fsb) >= eofs)
 			return 0;
 	} else {
+		/* Last record seen was a shareable file data extent */
 		info->low.rm_offset += info->low.rm_blockcount;
 	}
+	info->low.rm_startblock = XFS_FSB_TO_AGBNO(mp, start_fsb);
 	info->high.rm_startblock = -1U;
 	info->high.rm_owner = ULLONG_MAX;

fs/xfs/xfs_icache.c+29−51

 	INIT_LIST_HEAD(&ip->i_ioend_list);
 	spin_lock_init(&ip->i_ioend_lock);
 	ip->i_next_unlinked = NULLAGINO;
-	ip->i_prev_unlinked = NULLAGINO;
+	ip->i_prev_unlinked = 0;
 	return ip;
 }
 	int			cpu;
 	bool			ret = false;
-	for_each_online_cpu(cpu) {
+	for_each_cpu(cpu, &mp->m_inodegc_cpumask) {
 		gc = per_cpu_ptr(mp->m_inodegc, cpu);
 		if (!llist_empty(&gc->list)) {
 			mod_delayed_work_on(cpu, mp->m_inodegc_wq, &gc->work, 0);
 	int			error = 0;
 	flush_workqueue(mp->m_inodegc_wq);
-	for_each_online_cpu(cpu) {
+	for_each_cpu(cpu, &mp->m_inodegc_cpumask) {
 		struct xfs_inodegc	*gc;
 		gc = per_cpu_ptr(mp->m_inodegc, cpu);
 						struct xfs_inodegc, work);
 	struct llist_node	*node = llist_del_all(&gc->list);
 	struct xfs_inode	*ip, *n;
+	struct xfs_mount	*mp = gc->mp;
 	unsigned int		nofs_flag;
-	ASSERT(gc->cpu == smp_processor_id());
+	/*
+	 * Clear the cpu mask bit and ensure that we have seen the latest
+	 * update of the gc structure associated with this CPU. This matches
+	 * with the release semantics used when setting the cpumask bit in
+	 * xfs_inodegc_queue.
+	 */
+	cpumask_clear_cpu(gc->cpu, &mp->m_inodegc_cpumask);
+	smp_mb__after_atomic();
 	WRITE_ONCE(gc->items, 0);
 	nofs_flag = memalloc_nofs_save();
 	ip = llist_entry(node, struct xfs_inode, i_gclist);
-	trace_xfs_inodegc_worker(ip->i_mount, READ_ONCE(gc->shrinker_hits));
+	trace_xfs_inodegc_worker(mp, READ_ONCE(gc->shrinker_hits));
 	WRITE_ONCE(gc->shrinker_hits, 0);
 	llist_for_each_entry_safe(ip, n, node, i_gclist) {
 	struct xfs_inodegc	*gc;
 	int			items;
 	unsigned int		shrinker_hits;
+	unsigned int		cpu_nr;
 	unsigned long		queue_delay = 1;
 	trace_xfs_inode_set_need_inactive(ip);
 	ip->i_flags |= XFS_NEED_INACTIVE;
 	spin_unlock(&ip->i_flags_lock);
-	gc = get_cpu_ptr(mp->m_inodegc);
+	cpu_nr = get_cpu();
+	gc = this_cpu_ptr(mp->m_inodegc);
 	llist_add(&ip->i_gclist, &gc->list);
 	items = READ_ONCE(gc->items);
 	WRITE_ONCE(gc->items, items + 1);
 	shrinker_hits = READ_ONCE(gc->shrinker_hits);
+	/*
+	 * Ensure the list add is always seen by anyone who finds the cpumask
+	 * bit set. This effectively gives the cpumask bit set operation
+	 * release ordering semantics.
+	 */
+	smp_mb__before_atomic();
+	if (!cpumask_test_cpu(cpu_nr, &mp->m_inodegc_cpumask))
+		cpumask_test_and_set_cpu(cpu_nr, &mp->m_inodegc_cpumask);
 	/*
 	 * We queue the work while holding the current CPU so that the work
 	 * is scheduled to run on this CPU.
 	 */
 	if (!xfs_is_inodegc_enabled(mp)) {
-		put_cpu_ptr(gc);
+		put_cpu();
 		return;
 	}
 	trace_xfs_inodegc_queue(mp, __return_address);
 	mod_delayed_work_on(current_cpu(), mp->m_inodegc_wq, &gc->work,
 			queue_delay);
-	put_cpu_ptr(gc);
+	put_cpu();
 	if (xfs_inodegc_want_flush_work(ip, items, shrinker_hits)) {
 		trace_xfs_inodegc_throttle(mp, __return_address);
 	}
 }
-/*
- * Fold the dead CPU inodegc queue into the current CPUs queue.
- */
-void
-xfs_inodegc_cpu_dead(
-	struct xfs_mount	*mp,
-	unsigned int		dead_cpu)
-{
-	struct xfs_inodegc	*dead_gc, *gc;
-	struct llist_node	*first, *last;
-	unsigned int		count = 0;
-	dead_gc = per_cpu_ptr(mp->m_inodegc, dead_cpu);
-	cancel_delayed_work_sync(&dead_gc->work);
-	if (llist_empty(&dead_gc->list))
-		return;
-	first = dead_gc->list.first;
-	last = first;
-	while (last->next) {
-		last = last->next;
-		count++;
-	}
-	dead_gc->list.first = NULL;
-	dead_gc->items = 0;
-	/* Add pending work to current CPU */
-	gc = get_cpu_ptr(mp->m_inodegc);
-	llist_add_batch(first, last, &gc->list);
-	count += READ_ONCE(gc->items);
-	WRITE_ONCE(gc->items, count);
-	if (xfs_is_inodegc_enabled(mp)) {
-		trace_xfs_inodegc_queue(mp, __return_address);
-		mod_delayed_work_on(current_cpu(), mp->m_inodegc_wq, &gc->work,
-				0);
-	}
-	put_cpu_ptr(gc);
-}
 /*
  * We set the inode flag atomically with the radix tree tag.  Once we get tag
  * lookups on the radix tree, this inode flag can go away.
 	if (!xfs_is_inodegc_enabled(mp))
 		return 0;
-	for_each_online_cpu(cpu) {
+	for_each_cpu(cpu, &mp->m_inodegc_cpumask) {
 		gc = per_cpu_ptr(mp->m_inodegc, cpu);
 		if (!llist_empty(&gc->list))
 			return XFS_INODEGC_SHRINKER_COUNT;
 	trace_xfs_inodegc_shrinker_scan(mp, sc, __return_address);
-	for_each_online_cpu(cpu) {
+	for_each_cpu(cpu, &mp->m_inodegc_cpumask) {
 		gc = per_cpu_ptr(mp->m_inodegc, cpu);
 		if (!llist_empty(&gc->list)) {
 			unsigned int	h = READ_ONCE(gc->shrinker_hits);

fs/xfs/xfs_icache.h+0−1

@@ -79,7 +79,6 @@ void xfs_inodegc_push(struct xfs_mount *mp); · 78 unmodified lines
79	int xfs_inodegc_flush(struct xfs_mount *mp);	79	int xfs_inodegc_flush(struct xfs_mount *mp);
80	void xfs_inodegc_stop(struct xfs_mount *mp);	80	void xfs_inodegc_stop(struct xfs_mount *mp);
81	void xfs_inodegc_start(struct xfs_mount *mp);	81	void xfs_inodegc_start(struct xfs_mount *mp);
82	void xfs_inodegc_cpu_dead(struct xfs_mount *mp, unsigned int cpu);
83	int xfs_inodegc_register_shrinker(struct xfs_mount *mp);	82	int xfs_inodegc_register_shrinker(struct xfs_mount *mp);
84		83
85	#endif	84	#endif

fs/xfs/xfs_inode.c+218−13

@@ -1642,8 +1642,11 @@ xfs_inode_needs_inactive( · 1641 unmodified lines
1642	if (VFS_I(ip)->i_mode == 0)	1642	if (VFS_I(ip)->i_mode == 0)
1643	return false;	1643	return false;
1644		1644
1645	/* If this is a read-only mount, don't do this (would generate I/O) */	1645	/*
1646	if (xfs_is_readonly(mp))	1646	* If this is a read-only mount, don't do this (would generate I/O)
		1647	* unless we're in log recovery and cleaning the iunlinked list.
		1648	*/
		1649	if (xfs_is_readonly(mp) && !xlog_recovery_needed(mp->m_log))
1647	return false;	1650	return false;
1648		1651
1649	/* If the log isn't running, push inodes straight to reclaim. */	1652	/* If the log isn't running, push inodes straight to reclaim. */
@@ -1703,8 +1706,11 @@ xfs_inactive( · 53 unmodified lines
1703	mp = ip->i_mount;	1706	mp = ip->i_mount;
1704	ASSERT(!xfs_iflags_test(ip, XFS_IRECOVERY));	1707	ASSERT(!xfs_iflags_test(ip, XFS_IRECOVERY));
1705		1708
1706	/* If this is a read-only mount, don't do this (would generate I/O) */	1709	/*
1707	if (xfs_is_readonly(mp))	1710	* If this is a read-only mount, don't do this (would generate I/O)
		1711	* unless we're in log recovery and cleaning the iunlinked list.
		1712	*/
		1713	if (xfs_is_readonly(mp) && !xlog_recovery_needed(mp->m_log))
1708	goto out;	1714	goto out;
1709		1715
1710	/* Metadata inodes require explicit resource cleanup. */	1716	/* Metadata inodes require explicit resource cleanup. */
@@ -1736,9 +1742,21 @@ xfs_inactive( · 25 unmodified lines
1736	ip->i_df.if_nextents > 0 \|\| ip->i_delayed_blks > 0))	1742	ip->i_df.if_nextents > 0 \|\| ip->i_delayed_blks > 0))
1737	truncate = 1;	1743	truncate = 1;
1738		1744
1739	error = xfs_qm_dqattach(ip);	1745	if (xfs_iflags_test(ip, XFS_IQUOTAUNCHECKED)) {
1740	if (error)	1746	/*
1741	goto out;	1747	* If this inode is being inactivated during a quotacheck and
		1748	* has not yet been scanned by quotacheck, we /must/ remove
		1749	* the dquots from the inode before inactivation changes the
		1750	* block and inode counts. Most probably this is a result of
		1751	* reloading the incore iunlinked list to purge unrecovered
		1752	* unlinked inodes.
		1753	*/
		1754	xfs_qm_dqdetach(ip);
		1755	} else {
		1756	error = xfs_qm_dqattach(ip);
		1757	if (error)
		1758	goto out;
		1759	}
1742		1760
1743	if (S_ISLNK(VFS_I(ip)->i_mode))	1761	if (S_ISLNK(VFS_I(ip)->i_mode))
1744	error = xfs_inactive_symlink(ip);	1762	error = xfs_inactive_symlink(ip);
@@ -1822,12 +1840,17 @@ xfs_iunlink_lookup( · 77 unmodified lines
1822		1840
1823	rcu_read_lock();	1841	rcu_read_lock();
1824	ip = radix_tree_lookup(&pag->pag_ici_root, agino);	1842	ip = radix_tree_lookup(&pag->pag_ici_root, agino);
		1843	if (!ip) {
		1844	/* Caller can handle inode not being in memory. */
		1845	rcu_read_unlock();
		1846	return NULL;
		1847	}
1825		1848
1826	/*	1849	/*
1827	* Inode not in memory or in RCU freeing limbo should not happen.	1850	* Inode in RCU freeing limbo should not happen. Warn about this and
1828	* Warn about this and let the caller handle the failure.	1851	* let the caller handle the failure.
1829	*/	1852	*/
1830	if (WARN_ON_ONCE(!ip \|\| !ip->i_ino)) {	1853	if (WARN_ON_ONCE(!ip->i_ino)) {
1831	rcu_read_unlock();	1854	rcu_read_unlock();
1832	return NULL;	1855	return NULL;
1833	}	1856	}
@@ -1836,7 +1859,10 @@ xfs_iunlink_lookup( · 2 unmodified lines
1836	return ip;	1859	return ip;
1837	}	1860	}
1838		1861
1839	/* Update the prev pointer of the next agino. */	1862	/*
		1863	* Update the prev pointer of the next agino. Returns -ENOLINK if the inode
		1864	* is not in cache.
		1865	*/
1840	static int	1866	static int
1841	xfs_iunlink_update_backref(	1867	xfs_iunlink_update_backref(
1842	struct xfs_perag *pag,	1868	struct xfs_perag *pag,
@@ -1851,7 +1877,8 @@ xfs_iunlink_update_backref( · 8 unmodified lines
1851		1877
1852	ip = xfs_iunlink_lookup(pag, next_agino);	1878	ip = xfs_iunlink_lookup(pag, next_agino);
1853	if (!ip)	1879	if (!ip)
1854	return -EFSCORRUPTED;	1880	return -ENOLINK;
		1881
1855	ip->i_prev_unlinked = prev_agino;	1882	ip->i_prev_unlinked = prev_agino;
1856	return 0;	1883	return 0;
1857	}	1884	}
@@ -1895,6 +1922,64 @@ xfs_iunlink_update_bucket( · 37 unmodified lines
1895	return 0;	1922	return 0;
1896	}	1923	}
1897		1924
		1925	/*
		1926	* Load the inode @next_agino into the cache and set its prev_unlinked pointer
		1927	* to @prev_agino. Caller must hold the AGI to synchronize with other changes
		1928	* to the unlinked list.
		1929	*/
		1930	STATIC int
		1931	xfs_iunlink_reload_next(
		1932	struct xfs_trans *tp,
		1933	struct xfs_buf *agibp,
		1934	xfs_agino_t prev_agino,
		1935	xfs_agino_t next_agino)
		1936	{
		1937	struct xfs_perag *pag = agibp->b_pag;
		1938	struct xfs_mount *mp = pag->pag_mount;
		1939	struct xfs_inode *next_ip = NULL;
		1940	xfs_ino_t ino;
		1941	int error;
		1942
		1943	ASSERT(next_agino != NULLAGINO);
		1944
		1945	#ifdef DEBUG
		1946	rcu_read_lock();
		1947	next_ip = radix_tree_lookup(&pag->pag_ici_root, next_agino);
		1948	ASSERT(next_ip == NULL);
		1949	rcu_read_unlock();
		1950	#endif
		1951
		1952	xfs_info_ratelimited(mp,
		1953	"Found unrecovered unlinked inode 0x%x in AG 0x%x. Initiating recovery.",
		1954	next_agino, pag->pag_agno);
		1955
		1956	/*
		1957	* Use an untrusted lookup just to be cautious in case the AGI has been
		1958	* corrupted and now points at a free inode. That shouldn't happen,
		1959	* but we'd rather shut down now since we're already running in a weird
		1960	* situation.
		1961	*/
		1962	ino = XFS_AGINO_TO_INO(mp, pag->pag_agno, next_agino);
		1963	error = xfs_iget(mp, tp, ino, XFS_IGET_UNTRUSTED, 0, &next_ip);
		1964	if (error)
		1965	return error;
		1966
		1967	/* If this is not an unlinked inode, something is very wrong. */
		1968	if (VFS_I(next_ip)->i_nlink != 0) {
		1969	error = -EFSCORRUPTED;
		1970	goto rele;
		1971	}
		1972
		1973	next_ip->i_prev_unlinked = prev_agino;
		1974	trace_xfs_iunlink_reload_next(next_ip);
		1975	rele:
		1976	ASSERT(!(VFS_I(next_ip)->i_state & I_DONTCACHE));
		1977	if (xfs_is_quotacheck_running(mp) && next_ip)
		1978	xfs_iflags_set(next_ip, XFS_IQUOTAUNCHECKED);
		1979	xfs_irele(next_ip);
		1980	return error;
		1981	}
		1982
1898	static int	1983	static int
1899	xfs_iunlink_insert_inode(	1984	xfs_iunlink_insert_inode(
1900	struct xfs_trans *tp,	1985	struct xfs_trans *tp,
@@ -1926,6 +2011,8 @@ xfs_iunlink_insert_inode( · 25 unmodified lines
1926	* inode.	2011	* inode.
1927	*/	2012	*/
1928	error = xfs_iunlink_update_backref(pag, agino, next_agino);	2013	error = xfs_iunlink_update_backref(pag, agino, next_agino);
		2014	if (error == -ENOLINK)
		2015	error = xfs_iunlink_reload_next(tp, agibp, agino, next_agino);
1929	if (error)	2016	if (error)
1930	return error;	2017	return error;
1931		2018
@@ -1941,6 +2028,7 @@ xfs_iunlink_insert_inode( · 9 unmodified lines
1941	}	2028	}
1942		2029
1943	/* Point the head of the list to point to this inode. */	2030	/* Point the head of the list to point to this inode. */
		2031	ip->i_prev_unlinked = NULLAGINO;
1944	return xfs_iunlink_update_bucket(tp, pag, agibp, bucket_index, agino);	2032	return xfs_iunlink_update_bucket(tp, pag, agibp, bucket_index, agino);
1945	}	2033	}
1946		2034
@@ -2020,6 +2108,9 @@ xfs_iunlink_remove_inode( · 73 unmodified lines
2020	*/	2108	*/
2021	error = xfs_iunlink_update_backref(pag, ip->i_prev_unlinked,	2109	error = xfs_iunlink_update_backref(pag, ip->i_prev_unlinked,
2022	ip->i_next_unlinked);	2110	ip->i_next_unlinked);
		2111	if (error == -ENOLINK)
		2112	error = xfs_iunlink_reload_next(tp, agibp, ip->i_prev_unlinked,
		2113	ip->i_next_unlinked);
2023	if (error)	2114	if (error)
2024	return error;	2115	return error;
2025		2116
@@ -2040,7 +2131,7 @@ xfs_iunlink_remove_inode( · 14 unmodified lines
2040	}	2131	}
2041		2132
2042	ip->i_next_unlinked = NULLAGINO;	2133	ip->i_next_unlinked = NULLAGINO;
2043	ip->i_prev_unlinked = NULLAGINO;	2134	ip->i_prev_unlinked = 0;
2044	return error;	2135	return error;
2045	}	2136	}
2046		2137
@@ -3529,3 +3620,117 @@ xfs_iunlock2_io_mmap( · 1482 unmodified lines
3529	if (ip1 != ip2)	3620	if (ip1 != ip2)
3530	inode_unlock(VFS_I(ip1));	3621	inode_unlock(VFS_I(ip1));
3531	}	3622	}
		3623
		3624	/*
		3625	* Reload the incore inode list for this inode. Caller should ensure that
		3626	* the link count cannot change, either by taking ILOCK_SHARED or otherwise
		3627	* preventing other threads from executing.
		3628	*/
		3629	int
		3630	xfs_inode_reload_unlinked_bucket(
		3631	struct xfs_trans *tp,
		3632	struct xfs_inode *ip)
		3633	{
		3634	struct xfs_mount *mp = tp->t_mountp;
		3635	struct xfs_buf *agibp;
		3636	struct xfs_agi *agi;
		3637	struct xfs_perag *pag;
		3638	xfs_agnumber_t agno = XFS_INO_TO_AGNO(mp, ip->i_ino);
		3639	xfs_agino_t agino = XFS_INO_TO_AGINO(mp, ip->i_ino);
		3640	xfs_agino_t prev_agino, next_agino;
		3641	unsigned int bucket;
		3642	bool foundit = false;
		3643	int error;
		3644
		3645	/* Grab the first inode in the list */
		3646	pag = xfs_perag_get(mp, agno);
		3647	error = xfs_ialloc_read_agi(pag, tp, &agibp);
		3648	xfs_perag_put(pag);
		3649	if (error)
		3650	return error;
		3651
		3652	/*
		3653	* We've taken ILOCK_SHARED and the AGI buffer lock to stabilize the
		3654	* incore unlinked list pointers for this inode. Check once more to
		3655	* see if we raced with anyone else to reload the unlinked list.
		3656	*/
		3657	if (!xfs_inode_unlinked_incomplete(ip)) {
		3658	foundit = true;
		3659	goto out_agibp;
		3660	}
		3661
		3662	bucket = agino % XFS_AGI_UNLINKED_BUCKETS;
		3663	agi = agibp->b_addr;
		3664
		3665	trace_xfs_inode_reload_unlinked_bucket(ip);
		3666
		3667	xfs_info_ratelimited(mp,
		3668	"Found unrecovered unlinked inode 0x%x in AG 0x%x. Initiating list recovery.",
		3669	agino, agno);
		3670
		3671	prev_agino = NULLAGINO;
		3672	next_agino = be32_to_cpu(agi->agi_unlinked[bucket]);
		3673	while (next_agino != NULLAGINO) {
		3674	struct xfs_inode *next_ip = NULL;
		3675
		3676	/* Found this caller's inode, set its backlink. */
		3677	if (next_agino == agino) {
		3678	next_ip = ip;
		3679	next_ip->i_prev_unlinked = prev_agino;
		3680	foundit = true;
		3681	goto next_inode;
		3682	}
		3683
		3684	/* Try in-memory lookup first. */
		3685	next_ip = xfs_iunlink_lookup(pag, next_agino);
		3686	if (next_ip)
		3687	goto next_inode;
		3688
		3689	/* Inode not in memory, try reloading it. */
		3690	error = xfs_iunlink_reload_next(tp, agibp, prev_agino,
		3691	next_agino);
		3692	if (error)
		3693	break;
		3694
		3695	/* Grab the reloaded inode. */
		3696	next_ip = xfs_iunlink_lookup(pag, next_agino);
		3697	if (!next_ip) {
		3698	/* No incore inode at all? We reloaded it... */
		3699	ASSERT(next_ip != NULL);
		3700	error = -EFSCORRUPTED;
		3701	break;
		3702	}
		3703
		3704	next_inode:
		3705	prev_agino = next_agino;
		3706	next_agino = next_ip->i_next_unlinked;
		3707	}
		3708
		3709	out_agibp:
		3710	xfs_trans_brelse(tp, agibp);
		3711	/* Should have found this inode somewhere in the iunlinked bucket. */
		3712	if (!error && !foundit)
		3713	error = -EFSCORRUPTED;
		3714	return error;
		3715	}
		3716
		3717	/* Decide if this inode is missing its unlinked list and reload it. */
		3718	int
		3719	xfs_inode_reload_unlinked(
		3720	struct xfs_inode *ip)
		3721	{
		3722	struct xfs_trans *tp;
		3723	int error;
		3724
		3725	error = xfs_trans_alloc_empty(ip->i_mount, &tp);
		3726	if (error)
		3727	return error;
		3728
		3729	xfs_ilock(ip, XFS_ILOCK_SHARED);
		3730	if (xfs_inode_unlinked_incomplete(ip))
		3731	error = xfs_inode_reload_unlinked_bucket(tp, ip);
		3732	xfs_iunlock(ip, XFS_ILOCK_SHARED);
		3733	xfs_trans_cancel(tp);
		3734
		3735	return error;
		3736	}

fs/xfs/xfs_inode.h+32−2

 	uint64_t		i_diflags2;	/* XFS_DIFLAG2_... */
 	struct timespec64	i_crtime;	/* time created */
-	/* unlinked list pointers */
+	/*
+	 * Unlinked list pointers.  These point to the next and previous inodes
+	 * in the AGI unlinked bucket list, respectively.  These fields can
+	 * only be updated with the AGI locked.
+	 *
+	 * i_next_unlinked caches di_next_unlinked.
+	 */
 	xfs_agino_t		i_next_unlinked;
+	/*
+	 * If the inode is not on an unlinked list, this field is zero.  If the
+	 * inode is the first element in an unlinked list, this field is
+	 * NULLAGINO.  Otherwise, i_prev_unlinked points to the previous inode
+	 * in the unlinked list.
+	 */
 	xfs_agino_t		i_prev_unlinked;
 	/* VFS inode */
 	struct list_head	i_ioend_list;
 } xfs_inode_t;
+static inline bool xfs_inode_on_unlinked_list(const struct xfs_inode *ip)
+{
+	return ip->i_prev_unlinked != 0;
+}
 static inline bool xfs_inode_has_attr_fork(struct xfs_inode *ip)
 {
 	return ip->i_forkoff > 0;
  */
 #define XFS_INACTIVATING	(1 << 13)
+/* Quotacheck is running but inode has not been added to quota counts. */
+#define XFS_IQUOTAUNCHECKED	(1 << 14)
 /* All inode state flags related to inode reclaim. */
 #define XFS_ALL_IRECLAIM_FLAGS	(XFS_IRECLAIMABLE | \
 				 XFS_IRECLAIM | \
 #define XFS_IRECLAIM_RESET_FLAGS	\
 	(XFS_IRECLAIMABLE | XFS_IRECLAIM | \
 	 XFS_IDIRTY_RELEASE | XFS_ITRUNCATED | XFS_NEED_INACTIVE | \
-	 XFS_INACTIVATING)
+	 XFS_INACTIVATING | XFS_IQUOTAUNCHECKED)
 /*
  * Flags for inode locking.
 int xfs_ilock2_io_mmap(struct xfs_inode *ip1, struct xfs_inode *ip2);
 void xfs_iunlock2_io_mmap(struct xfs_inode *ip1, struct xfs_inode *ip2);
+static inline bool
+xfs_inode_unlinked_incomplete(
+	struct xfs_inode	*ip)
+{
+	return VFS_I(ip)->i_nlink == 0 && !xfs_inode_on_unlinked_list(ip);
+}
+int xfs_inode_reload_unlinked_bucket(struct xfs_trans *tp, struct xfs_inode *ip);
+int xfs_inode_reload_unlinked(struct xfs_inode *ip);
 #endif	/* __XFS_INODE_H__ */

fs/xfs/xfs_iops.c+3−3

 	stat->gid = vfsgid_into_kgid(vfsgid);
 	stat->ino = ip->i_ino;
 	stat->atime = inode->i_atime;
+	stat->mtime = inode->i_mtime;
+	stat->ctime = inode_get_ctime(inode);
 	stat->blocks = XFS_FSB_TO_BB(mp, ip->i_nblocks + ip->i_delayed_blks);
-	fill_mg_cmtime(stat, request_mask, inode);
 	if (xfs_has_v3inodes(mp)) {
 		if (request_mask & STATX_BTIME) {
 			stat->result_mask |= STATX_BTIME;
 	if (newsize != oldsize &&
 	    !(iattr->ia_valid & (ATTR_CTIME | ATTR_MTIME))) {
 		iattr->ia_ctime = iattr->ia_mtime =
-			current_mgtime(inode);
+			current_time(inode);
 		iattr->ia_valid |= ATTR_CTIME | ATTR_MTIME;
 	}

fs/xfs/xfs_itable.c+11−0

@@ -80,6 +80,17 @@ xfs_bulkstat_one_int( · 79 unmodified lines
80	if (error)	80	if (error)
81	goto out;	81	goto out;
82		82
		83	/* Reload the incore unlinked list to avoid failure in inodegc. */
		84	if (xfs_inode_unlinked_incomplete(ip)) {
		85	error = xfs_inode_reload_unlinked_bucket(tp, ip);
		86	if (error) {
		87	xfs_iunlock(ip, XFS_ILOCK_SHARED);
		88	xfs_force_shutdown(mp, SHUTDOWN_CORRUPT_INCORE);
		89	xfs_irele(ip);
		90	return error;
		91	}
		92	}
		93
83	ASSERT(ip != NULL);	94	ASSERT(ip != NULL);
84	ASSERT(ip->i_imap.im_blkno != 0);	95	ASSERT(ip->i_imap.im_blkno != 0);
85	inode = VFS_I(ip);	96	inode = VFS_I(ip);

fs/xfs/xfs_log.c+0−17

 	 * just worked.
 	 */
 	if (!xfs_has_norecovery(mp)) {
-		/*
-		 * log recovery ignores readonly state and so we need to clear
-		 * mount-based read only state so it can write to disk.
-		 */
-		bool	readonly = test_and_clear_bit(XFS_OPSTATE_READONLY,
-						&mp->m_opstate);
 		error = xlog_recover(log);
-		if (readonly)
-			set_bit(XFS_OPSTATE_READONLY, &mp->m_opstate);
 		if (error) {
 			xfs_warn(mp, "log mount/recovery failed: error %d",
 				error);
 	struct xfs_mount	*mp)
 {
 	struct xlog		*log = mp->m_log;
-	bool			readonly;
 	int			error = 0;
 	if (xfs_has_norecovery(mp)) {
 		return 0;
 	}
-	/*
-	 * log recovery ignores readonly state and so we need to clear
-	 * mount-based read only state so it can write to disk.
-	 */
-	readonly = test_and_clear_bit(XFS_OPSTATE_READONLY, &mp->m_opstate);
 	/*
 	 * During the second phase of log recovery, we need iget and
 	 * iput to behave like they do for an active filesystem.
 	xfs_buftarg_drain(mp->m_ddev_targp);
 	clear_bit(XLOG_RECOVERY_NEEDED, &log->l_opstate);
-	if (readonly)
-		set_bit(XFS_OPSTATE_READONLY, &mp->m_opstate);
 	/* Make sure the log is dead if we're returning failure. */
 	ASSERT(!error || xlog_is_shutdown(log));

fs/xfs/xfs_log_cil.c+16−36

 	struct xlog_cil_pcp	*cilpcp;
 	int			cpu;
-	for_each_online_cpu(cpu) {
+	for_each_cpu(cpu, &ctx->cil_pcpmask) {
 		cilpcp = per_cpu_ptr(cil->xc_pcp, cpu);
 		ctx->ticket->t_curr_res += cilpcp->space_reserved;
 	if (!test_and_clear_bit(XLOG_CIL_PCP_SPACE, &cil->xc_flags))
 		return;
-	for_each_online_cpu(cpu) {
+	/*
+	 * We can race with other cpus setting cil_pcpmask.  However, we've
+	 * atomically cleared PCP_SPACE which forces other threads to add to
+	 * the global space used count.  cil_pcpmask is a superset of cilpcp
+	 * structures that could have a nonzero space_used.
+	 */
+	for_each_cpu(cpu, &ctx->cil_pcpmask) {
 		int	old, prev;
 		cilpcp = per_cpu_ptr(cil->xc_pcp, cpu);
 	int			iovhdr_res = 0, split_res = 0, ctx_res = 0;
 	int			space_used;
 	int			order;
+	unsigned int		cpu_nr;
 	struct xlog_cil_pcp	*cilpcp;
 	ASSERT(tp);
 	 * can't be scheduled away between split sample/update operations that
 	 * are done without outside locking to serialise them.
 	 */
-	cilpcp = get_cpu_ptr(cil->xc_pcp);
+	cpu_nr = get_cpu();
+	cilpcp = this_cpu_ptr(cil->xc_pcp);
+	/* Tell the future push that there was work added by this CPU. */
+	if (!cpumask_test_cpu(cpu_nr, &ctx->cil_pcpmask))
+		cpumask_test_and_set_cpu(cpu_nr, &ctx->cil_pcpmask);
 	/*
 	 * We need to take the CIL checkpoint unit reservation on the first
 			continue;
 		list_add_tail(&lip->li_cil, &cilpcp->log_items);
 	}
-	put_cpu_ptr(cilpcp);
+	put_cpu();
 	/*
 	 * If we've overrun the reservation, dump the tx details before we move
 	return 0;
 }
-/*
- * Move dead percpu state to the relevant CIL context structures.
- *
- * We have to lock the CIL context here to ensure that nothing is modifying
- * the percpu state, either addition or removal. Both of these are done under
- * the CIL context lock, so grabbing that exclusively here will ensure we can
- * safely drain the cilpcp for the CPU that is dying.
- */
-void
-xlog_cil_pcp_dead(
-	struct xlog		*log,
-	unsigned int		cpu)
-{
-	struct xfs_cil		*cil = log->l_cilp;
-	struct xlog_cil_pcp	*cilpcp = per_cpu_ptr(cil->xc_pcp, cpu);
-	struct xfs_cil_ctx	*ctx;
-	down_write(&cil->xc_ctx_lock);
-	ctx = cil->xc_ctx;
-	if (ctx->ticket)
-		ctx->ticket->t_curr_res += cilpcp->space_reserved;
-	cilpcp->space_reserved = 0;
-	if (!list_empty(&cilpcp->log_items))
-		list_splice_init(&cilpcp->log_items, &ctx->log_items);
-	if (!list_empty(&cilpcp->busy_extents))
-		list_splice_init(&cilpcp->busy_extents, &ctx->busy_extents);
-	atomic_add(cilpcp->space_used, &ctx->space_used);
-	cilpcp->space_used = 0;
-	up_write(&cil->xc_ctx_lock);
-}
 /*
  * Perform initial CIL structure initialisation.
  */

fs/xfs/xfs_log_priv.h+6−8

 	struct work_struct	discard_endio_work;
 	struct work_struct	push_work;
 	atomic_t		order_id;
+	/*
+	 * CPUs that could have added items to the percpu CIL data.  Access is
+	 * coordinated with xc_ctx_lock.
+	 */
+	struct cpumask		cil_pcpmask;
 };
 /*
 	wait_queue_head_t	xc_push_wait;	/* background push throttle */
 	void __percpu		*xc_pcp;	/* percpu CIL structures */
-#ifdef CONFIG_HOTPLUG_CPU
-	struct list_head	xc_pcp_list;
-#endif
 } ____cacheline_aligned_in_smp;
 /* xc_flags bit values */
 	return p;
 }
-/*
- * CIL CPU dead notifier
- */
-void xlog_cil_pcp_dead(struct xlog *log, unsigned int cpu);
 #endif	/* __XFS_LOG_PRIV_H__ */

fs/xfs/xfs_log_recover.c+2−2

@@ -329,7 +329,7 @@ xlog_find_verify_cycle( · 328 unmodified lines
329	* try a smaller size. We need to be able to read at least	329	* try a smaller size. We need to be able to read at least
330	* a log sector, or we're out of luck.	330	* a log sector, or we're out of luck.
331	*/	331	*/
332	bufblks = 1 << ffs(nbblks);	332	bufblks = roundup_pow_of_two(nbblks);
333	while (bufblks > log->l_logBBsize)	333	while (bufblks > log->l_logBBsize)
334	bufblks >>= 1;	334	bufblks >>= 1;
335	while (!(buffer = xlog_alloc_buffer(log, bufblks))) {	335	while (!(buffer = xlog_alloc_buffer(log, bufblks))) {
@@ -1528,7 +1528,7 @@ xlog_write_log_records( · 1192 unmodified lines
1528	* a smaller size. We need to be able to write at least a	1528	* a smaller size. We need to be able to write at least a
1529	* log sector, or we're out of luck.	1529	* log sector, or we're out of luck.
1530	*/	1530	*/
1531	bufblks = 1 << ffs(blocks);	1531	bufblks = roundup_pow_of_two(blocks);
1532	while (bufblks > log->l_logBBsize)	1532	while (bufblks > log->l_logBBsize)
1533	bufblks >>= 1;	1533	bufblks >>= 1;
1534	while (!(buffer = xlog_alloc_buffer(log, bufblks))) {	1534	while (!(buffer = xlog_alloc_buffer(log, bufblks))) {

fs/xfs/xfs_mount.h+13−4

  * Per-cpu deferred inode inactivation GC lists.
  */
 struct xfs_inodegc {
+	struct xfs_mount	*mp;
 	struct llist_head	list;
 	struct delayed_work	work;
 	int			error;
 	/* approximate count of inodes in the list */
 	unsigned int		items;
 	unsigned int		shrinker_hits;
-#if defined(DEBUG) || defined(XFS_WARN)
 	unsigned int		cpu;
-#endif
 };
 /*
 	xfs_buftarg_t		*m_ddev_targp;	/* saves taking the address */
 	xfs_buftarg_t		*m_logdev_targp;/* ptr to log device */
 	xfs_buftarg_t		*m_rtdev_targp;	/* ptr to rt device */
-	struct list_head	m_mount_list;	/* global mount list */
 	void __percpu		*m_inodegc;	/* percpu inodegc structures */
 	/*
 	unsigned int		*m_errortag;
 	struct xfs_kobj		m_errortag_kobj;
 #endif
+	/* cpus that have inodes queued for inactivation */
+	struct cpumask		m_inodegc_cpumask;
 } xfs_mount_t;
 #define M_IGEO(mp)		(&(mp)->m_ino_geo)
 #define XFS_OPSTATE_WARNED_SHRINK	8
 /* Kernel has logged a warning about logged xattr updates being used. */
 #define XFS_OPSTATE_WARNED_LARP		9
+/* Mount time quotacheck is running */
+#define XFS_OPSTATE_QUOTACHECK_RUNNING	10
 #define __XFS_IS_OPSTATE(name, NAME) \
 static inline bool xfs_is_ ## name (struct xfs_mount *mp) \
 __XFS_IS_OPSTATE(readonly, READONLY)
 __XFS_IS_OPSTATE(inodegc_enabled, INODEGC_ENABLED)
 __XFS_IS_OPSTATE(blockgc_enabled, BLOCKGC_ENABLED)
+#ifdef CONFIG_XFS_QUOTA
+__XFS_IS_OPSTATE(quotacheck_running, QUOTACHECK_RUNNING)
+#else
+# define xfs_is_quotacheck_running(mp)	(false)
+#endif
 static inline bool
 xfs_should_warn(struct xfs_mount *mp, long nr)
 	{ (1UL << XFS_OPSTATE_BLOCKGC_ENABLED),		"blockgc" }, \
 	{ (1UL << XFS_OPSTATE_WARNED_SCRUB),		"wscrub" }, \
 	{ (1UL << XFS_OPSTATE_WARNED_SHRINK),		"wshrink" }, \
-	{ (1UL << XFS_OPSTATE_WARNED_LARP),		"wlarp" }
+	{ (1UL << XFS_OPSTATE_WARNED_LARP),		"wlarp" }, \
+	{ (1UL << XFS_OPSTATE_QUOTACHECK_RUNNING),	"quotacheck" }
 /*
  * Max and min values for mount-option defined I/O

fs/xfs/xfs_qm.c+16−0

 	if (error)
 		return error;
+	/*
+	 * Reload the incore unlinked list to avoid failure in inodegc.
+	 * Use an unlocked check here because unrecovered unlinked inodes
+	 * should be somewhat rare.
+	 */
+	if (xfs_inode_unlinked_incomplete(ip)) {
+		error = xfs_inode_reload_unlinked(ip);
+		if (error) {
+			xfs_force_shutdown(mp, SHUTDOWN_CORRUPT_INCORE);
+			goto error0;
+		}
+	}
 	ASSERT(ip->i_delayed_blks == 0);
 	if (XFS_IS_REALTIME_INODE(ip)) {
 	}
 	nblks = (xfs_qcnt_t)ip->i_nblocks - rtblks;
+	xfs_iflags_clear(ip, XFS_IQUOTAUNCHECKED);
 	/*
 	 * Add the (disk blocks and inode) resources occupied by this
 		flags |= XFS_PQUOTA_CHKD;
 	}
+	xfs_set_quotacheck_running(mp);
 	error = xfs_iwalk_threaded(mp, 0, 0, xfs_qm_dqusage_adjust, 0, true,
 			NULL);
+	xfs_clear_quotacheck_running(mp);
 	/*
 	 * On error, the inode walk may have partially populated the dquot

fs/xfs/xfs_refcount_item.c+4−2

 	struct xfs_log_item		*lip,
 	struct list_head		*capture_list)
 {
+	struct xfs_trans_res		resv;
 	struct xfs_cui_log_item		*cuip = CUI_ITEM(lip);
 	struct xfs_cud_log_item		*cudp;
 	struct xfs_trans		*tp;
 	 * doesn't fit.  We need to reserve enough blocks to handle a
 	 * full btree split on either end of the refcount range.
 	 */
-	error = xfs_trans_alloc(mp, &M_RES(mp)->tr_itruncate,
+	resv = xlog_recover_resv(&M_RES(mp)->tr_itruncate);
-			mp->m_refc_maxlevels * 2, 0, XFS_TRANS_RESERVE, &tp);
+	error = xfs_trans_alloc(mp, &resv, mp->m_refc_maxlevels * 2, 0,
+			XFS_TRANS_RESERVE, &tp);
 	if (error)
 		return error;

fs/xfs/xfs_rmap_item.c+4−2

@@ -507,6 +507,7 @@ xfs_rui_item_recover( · 506 unmodified lines
507	struct xfs_log_item *lip,	507	struct xfs_log_item *lip,
508	struct list_head *capture_list)	508	struct list_head *capture_list)
509	{	509	{
		510	struct xfs_trans_res resv;
510	struct xfs_rui_log_item *ruip = RUI_ITEM(lip);	511	struct xfs_rui_log_item *ruip = RUI_ITEM(lip);
511	struct xfs_rud_log_item *rudp;	512	struct xfs_rud_log_item *rudp;
512	struct xfs_trans *tp;	513	struct xfs_trans *tp;

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Merge branch 'sched/urgent' into sched/core, to pick up fixes and refresh the branch

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@@ -2957,7 +2957,7 @@ · 2956 unmodified lines
2957	clock-names = "merge","merge_async";	2957	clock-names = "merge","merge_async";
2958	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;	2958	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
2959	mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;	2959	mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xc000 0x1000>;
2960	mediatek,merge-mute = <1>;	2960	mediatek,merge-mute;
2961	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC>;	2961	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE0_DL_ASYNC>;
2962	};	2962	};
2963		2963
@@ -2970,7 +2970,7 @@ · 6 unmodified lines
2970	clock-names = "merge","merge_async";	2970	clock-names = "merge","merge_async";
2971	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;	2971	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
2972	mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;	2972	mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xd000 0x1000>;
2973	mediatek,merge-mute = <1>;	2973	mediatek,merge-mute;
2974	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC>;	2974	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE1_DL_ASYNC>;
2975	};	2975	};
2976		2976
@@ -2983,7 +2983,7 @@ · 6 unmodified lines
2983	clock-names = "merge","merge_async";	2983	clock-names = "merge","merge_async";
2984	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;	2984	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
2985	mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;	2985	mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xe000 0x1000>;
2986	mediatek,merge-mute = <1>;	2986	mediatek,merge-mute;
2987	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC>;	2987	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE2_DL_ASYNC>;
2988	};	2988	};
2989		2989
@@ -2996,7 +2996,7 @@ · 6 unmodified lines
2996	clock-names = "merge","merge_async";	2996	clock-names = "merge","merge_async";
2997	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;	2997	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
2998	mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;	2998	mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0xf000 0x1000>;
2999	mediatek,merge-mute = <1>;	2999	mediatek,merge-mute;
3000	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC>;	3000	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE3_DL_ASYNC>;
3001	};	3001	};
3002		3002
@@ -3009,7 +3009,7 @@ · 6 unmodified lines
3009	clock-names = "merge","merge_async";	3009	clock-names = "merge","merge_async";
3010	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;	3010	power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
3011	mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;	3011	mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0x0000 0x1000>;
3012	mediatek,merge-fifo-en = <1>;	3012	mediatek,merge-fifo-en;
3013	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC>;	3013	resets = <&vdosys1 MT8195_VDOSYS1_SW0_RST_B_MERGE4_DL_ASYNC>;
3014	};	3014	};
3015		3015

@@ -1863,15 +1863,15 @@ static int cs_dsp_adsp2_setup_algs(struct cs_dsp *dsp) · 1862 unmodified lines
1863	return PTR_ERR(adsp2_alg);	1863	return PTR_ERR(adsp2_alg);
1864		1864
1865	for (i = 0; i < n_algs; i++) {	1865	for (i = 0; i < n_algs; i++) {
1866	cs_dsp_info(dsp,	1866	cs_dsp_dbg(dsp,
1867	"%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",	1867	"%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
1868	i, be32_to_cpu(adsp2_alg[i].alg.id),	1868	i, be32_to_cpu(adsp2_alg[i].alg.id),
1869	(be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,	1869	(be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
1870	(be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,	1870	(be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
1871	be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,	1871	be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
1872	be32_to_cpu(adsp2_alg[i].xm),	1872	be32_to_cpu(adsp2_alg[i].xm),
1873	be32_to_cpu(adsp2_alg[i].ym),	1873	be32_to_cpu(adsp2_alg[i].ym),
1874	be32_to_cpu(adsp2_alg[i].zm));	1874	be32_to_cpu(adsp2_alg[i].zm));
1875		1875
1876	alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_XM,	1876	alg_region = cs_dsp_create_region(dsp, WMFW_ADSP2_XM,
1877	adsp2_alg[i].alg.id,	1877	adsp2_alg[i].alg.id,
@@ -1996,14 +1996,14 @@ static int cs_dsp_halo_setup_algs(struct cs_dsp *dsp) · 118 unmodified lines
1996	return PTR_ERR(halo_alg);	1996	return PTR_ERR(halo_alg);
1997		1997
1998	for (i = 0; i < n_algs; i++) {	1998	for (i = 0; i < n_algs; i++) {
1999	cs_dsp_info(dsp,	1999	cs_dsp_dbg(dsp,
2000	"%d: ID %x v%d.%d.%d XM@%x YM@%x\n",	2000	"%d: ID %x v%d.%d.%d XM@%x YM@%x\n",
2001	i, be32_to_cpu(halo_alg[i].alg.id),	2001	i, be32_to_cpu(halo_alg[i].alg.id),
2002	(be32_to_cpu(halo_alg[i].alg.ver) & 0xff0000) >> 16,	2002	(be32_to_cpu(halo_alg[i].alg.ver) & 0xff0000) >> 16,
2003	(be32_to_cpu(halo_alg[i].alg.ver) & 0xff00) >> 8,	2003	(be32_to_cpu(halo_alg[i].alg.ver) & 0xff00) >> 8,
2004	be32_to_cpu(halo_alg[i].alg.ver) & 0xff,	2004	be32_to_cpu(halo_alg[i].alg.ver) & 0xff,
2005	be32_to_cpu(halo_alg[i].xm_base),	2005	be32_to_cpu(halo_alg[i].xm_base),
2006	be32_to_cpu(halo_alg[i].ym_base));	2006	be32_to_cpu(halo_alg[i].ym_base));
2007		2007
2008	ret = cs_dsp_halo_create_regions(dsp, halo_alg[i].alg.id,	2008	ret = cs_dsp_halo_create_regions(dsp, halo_alg[i].alg.id,
2009	halo_alg[i].alg.ver,	2009	halo_alg[i].alg.ver,