Add new ioctls for getting and setting the current destination color key. This allows for simple overlay display control by matching a color key value in the primary plane before blending the overlay on top. v2: remove unnecessary mutex acquire/release around reg accesses v3: add support for full color key management v4: fix copy & paste bug in snb_get_colorkey don't bother checking min/max values against docs as the docs are likely wrong (how could we handle 10bpc surface formats?)
Showing the changes to include/drm (1 of 5 files). Show all
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| @@ -198,6 +198,8 @@ typedef struct _drm_i915_sarea { · 197 unmodified lines | ||
| 198 | 198 | #define DRM_I915_OVERLAY_PUT_IMAGE 0x27 |
| 199 | 199 | #define DRM_I915_OVERLAY_ATTRS 0x28 |
| 200 | 200 | #define DRM_I915_GEM_EXECBUFFER2 0x29 |
| 201 | +#define DRM_I915_GET_SPRITE_COLORKEY 0x2a | |
| 202 | +#define DRM_I915_SET_SPRITE_COLORKEY 0x2b | |
| 201 | 203 | |
| 202 | 204 | #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) |
| 203 | 205 | #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) |
| @@ -239,6 +241,8 @@ typedef struct _drm_i915_sarea { · 35 unmodified lines | ||
| 239 | 241 | #define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise) |
| 240 | 242 | #define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_OVERLAY_PUT_IMAGE, struct drm_intel_overlay_put_image) |
| 241 | 243 | #define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) |
| 244 | +#define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) | |
| 245 | +#define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey) | |
| 242 | 246 | |
| 243 | 247 | /* Allow drivers to submit batchbuffers directly to hardware, relying |
| 244 | 248 | * on the security mechanisms provided by hardware. |
| @@ -844,4 +848,36 @@ struct drm_intel_overlay_attrs { · 599 unmodified lines | ||
| 844 | 848 | __u32 gamma5; |
| 845 | 849 | }; |
| 846 | 850 | |
| 851 | +/* | |
| 852 | + * Intel sprite handling | |
| 853 | + * | |
| 854 | + * Color keying works with a min/mask/max tuple. Both source and destination | |
| 855 | + * color keying is allowed. | |
| 856 | + * | |
| 857 | + * Source keying: | |
| 858 | + * Sprite pixels within the min & max values, masked against the color channels | |
| 859 | + * specified in the mask field, will be transparent. All other pixels will | |
| 860 | + * be displayed on top of the primary plane. For RGB surfaces, only the min | |
| 861 | + * and mask fields will be used; ranged compares are not allowed. | |
| 862 | + * | |
| 863 | + * Destination keying: | |
| 864 | + * Primary plane pixels that match the min value, masked against the color | |
| 865 | + * channels specified in the mask field, will be replaced by corresponding | |
| 866 | + * pixels from the sprite plane. | |
| 867 | + * | |
| 868 | + * Note that source & destination keying are exclusive; only one can be | |
| 869 | + * active on a given plane. | |
| 870 | + */ | |
| 871 | + | |
| 872 | +#define I915_SET_COLORKEY_NONE (1<<0) /* disable color key matching */ | |
| 873 | +#define I915_SET_COLORKEY_DESTINATION (1<<1) | |
| 874 | +#define I915_SET_COLORKEY_SOURCE (1<<2) | |
| 875 | +struct drm_intel_sprite_colorkey { | |
| 876 | + __u32 plane_id; | |
| 877 | + __u32 min_value; | |
| 878 | + __u32 channel_mask; | |
| 879 | + __u32 max_value; | |
| 880 | + __u32 flags; | |
| 881 | +}; | |
| 882 | + | |
| 847 | 883 | #endif /* _I915_DRM_H_ */ |