Pull staging driver fixes from Greg KH: "Here are some staging driver fixes, well, really all just IIO driver fixes, for 4.0-rc6. They fix issues that have been reported with these drivers. All of these patches have been in linux-next for a while" * tag 'staging-4.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: iio: imu: Use iio_trigger_get for indio_dev->trig assignment iio: adc: vf610: use ADC clock within specification iio/adc/cc10001_adc.c: Fix !HAS_IOMEM build iio: core: Fix double free. iio:inv-mpu6050: Fix inconsistency for the scale channel staging: iio: dummy: Fix undefined symbol build error iio: inv_mpu6050: Clear timestamps fifo while resetting hardware fifo staging: iio: hmc5843: Set iio name property in sysfs iio: bmc150: change sampling frequency iio: fix drivers that check buffer->scan_mask
Unified · Split
| @@ -659,7 +659,7 @@ static irqreturn_t bma180_trigger_handler(int irq, void *p) · 658 unmodified lines | ||
| 659 | 659 | |
| 660 | 660 | mutex_lock(&data->mutex); |
| 661 | 661 | |
| 662 | − for_each_set_bit(bit, indio_dev->buffer->scan_mask, | |
| 662 | + for_each_set_bit(bit, indio_dev->active_scan_mask, | |
| 663 | 663 | indio_dev->masklength) { |
| 664 | 664 | ret = bma180_get_data_reg(data, bit); |
| 665 | 665 | if (ret < 0) { |
| @@ -168,14 +168,14 @@ static const struct { · 167 unmodified lines | ||
| 168 | 168 | int val; |
| 169 | 169 | int val2; |
| 170 | 170 | u8 bw_bits; |
| 171 | −} bmc150_accel_samp_freq_table[] = { {7, 810000, 0x08}, | |
| 172 | − {15, 630000, 0x09}, | |
| 173 | − {31, 250000, 0x0A}, | |
| 174 | − {62, 500000, 0x0B}, | |
| 175 | − {125, 0, 0x0C}, | |
| 176 | − {250, 0, 0x0D}, | |
| 177 | − {500, 0, 0x0E}, | |
| 178 | − {1000, 0, 0x0F} }; | |
| 171 | +} bmc150_accel_samp_freq_table[] = { {15, 620000, 0x08}, | |
| 172 | + {31, 260000, 0x09}, | |
| 173 | + {62, 500000, 0x0A}, | |
| 174 | + {125, 0, 0x0B}, | |
| 175 | + {250, 0, 0x0C}, | |
| 176 | + {500, 0, 0x0D}, | |
| 177 | + {1000, 0, 0x0E}, | |
| 178 | + {2000, 0, 0x0F} }; | |
| 179 | 179 | |
| 180 | 180 | static const struct { |
| 181 | 181 | int bw_bits; |
| @@ -840,7 +840,7 @@ static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev, · 658 unmodified lines | ||
| 840 | 840 | } |
| 841 | 841 | |
| 842 | 842 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( |
| 843 | − "7.810000 15.630000 31.250000 62.500000 125 250 500 1000"); | |
| 843 | + "15.620000 31.260000 62.50000 125 250 500 1000 2000"); | |
| 844 | 844 | |
| 845 | 845 | static struct attribute *bmc150_accel_attributes[] = { |
| 846 | 846 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, |
| @@ -986,7 +986,7 @@ static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p) · 139 unmodified lines | ||
| 986 | 986 | int bit, ret, i = 0; |
| 987 | 987 | |
| 988 | 988 | mutex_lock(&data->mutex); |
| 989 | − for_each_set_bit(bit, indio_dev->buffer->scan_mask, | |
| 989 | + for_each_set_bit(bit, indio_dev->active_scan_mask, | |
| 990 | 990 | indio_dev->masklength) { |
| 991 | 991 | ret = i2c_smbus_read_word_data(data->client, |
| 992 | 992 | BMC150_ACCEL_AXIS_TO_REG(bit)); |
| @@ -956,7 +956,7 @@ static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) · 955 unmodified lines | ||
| 956 | 956 | |
| 957 | 957 | mutex_lock(&data->mutex); |
| 958 | 958 | |
| 959 | − for_each_set_bit(bit, indio_dev->buffer->scan_mask, | |
| 959 | + for_each_set_bit(bit, indio_dev->active_scan_mask, | |
| 960 | 960 | indio_dev->masklength) { |
| 961 | 961 | ret = kxcjk1013_get_acc_reg(data, bit); |
| 962 | 962 | if (ret < 0) { |
| @@ -137,7 +137,8 @@ config AXP288_ADC · 136 unmodified lines | ||
| 137 | 137 | |
| 138 | 138 | config CC10001_ADC |
| 139 | 139 | tristate "Cosmic Circuits 10001 ADC driver" |
| 140 | − depends on HAS_IOMEM || HAVE_CLK || REGULATOR | |
| 140 | + depends on HAVE_CLK || REGULATOR | |
| 141 | + depends on HAS_IOMEM | |
| 141 | 142 | select IIO_BUFFER |
| 142 | 143 | select IIO_TRIGGERED_BUFFER |
| 143 | 144 | help |
| @@ -544,7 +544,6 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state) · 543 unmodified lines | ||
| 544 | 544 | { |
| 545 | 545 | struct iio_dev *idev = iio_trigger_get_drvdata(trig); |
| 546 | 546 | struct at91_adc_state *st = iio_priv(idev); |
| 547 | − struct iio_buffer *buffer = idev->buffer; | |
| 548 | 547 | struct at91_adc_reg_desc *reg = st->registers; |
| 549 | 548 | u32 status = at91_adc_readl(st, reg->trigger_register); |
| 550 | 549 | int value; |
| @@ -564,7 +563,7 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state) · 13 unmodified lines | ||
| 564 | 563 | at91_adc_writel(st, reg->trigger_register, |
| 565 | 564 | status | value); |
| 566 | 565 | |
| 567 | − for_each_set_bit(bit, buffer->scan_mask, | |
| 566 | + for_each_set_bit(bit, idev->active_scan_mask, | |
| 568 | 567 | st->num_channels) { |
| 569 | 568 | struct iio_chan_spec const *chan = idev->channels + bit; |
| 570 | 569 | at91_adc_writel(st, AT91_ADC_CHER, |
| @@ -579,7 +578,7 @@ static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state) · 8 unmodified lines | ||
| 579 | 578 | at91_adc_writel(st, reg->trigger_register, |
| 580 | 579 | status & ~value); |
| 581 | 580 | |
| 582 | − for_each_set_bit(bit, buffer->scan_mask, | |
| 581 | + for_each_set_bit(bit, idev->active_scan_mask, | |
| 583 | 582 | st->num_channels) { |
| 584 | 583 | struct iio_chan_spec const *chan = idev->channels + bit; |
| 585 | 584 | at91_adc_writel(st, AT91_ADC_CHDR, |
| @@ -188,12 +188,11 @@ static int tiadc_buffer_preenable(struct iio_dev *indio_dev) · 187 unmodified lines | ||
| 188 | 188 | static int tiadc_buffer_postenable(struct iio_dev *indio_dev) |
| 189 | 189 | { |
| 190 | 190 | struct tiadc_device *adc_dev = iio_priv(indio_dev); |
| 191 | − struct iio_buffer *buffer = indio_dev->buffer; | |
| 192 | 191 | unsigned int enb = 0; |
| 193 | 192 | u8 bit; |
| 194 | 193 | |
| 195 | 194 | tiadc_step_config(indio_dev); |
| 196 | − for_each_set_bit(bit, buffer->scan_mask, adc_dev->channels) | |
| 195 | + for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels) | |
| 197 | 196 | enb |= (get_adc_step_bit(adc_dev, bit) << 1); |
| 198 | 197 | adc_dev->buffer_en_ch_steps = enb; |
| 199 | 198 | |
| @@ -141,9 +141,13 @@ struct vf610_adc { · 140 unmodified lines | ||
| 141 | 141 | struct regulator *vref; |
| 142 | 142 | struct vf610_adc_feature adc_feature; |
| 143 | 143 | |
| 144 | + u32 sample_freq_avail[5]; | |
| 145 | + | |
| 144 | 146 | struct completion completion; |
| 145 | 147 | }; |
| 146 | 148 | |
| 149 | +static const u32 vf610_hw_avgs[] = { 1, 4, 8, 16, 32 }; | |
| 150 | + | |
| 147 | 151 | #define VF610_ADC_CHAN(_idx, _chan_type) { \ |
| 148 | 152 | .type = (_chan_type), \ |
| 149 | 153 | .indexed = 1, \ |
| @@ -180,35 +184,47 @@ static const struct iio_chan_spec vf610_adc_iio_channels[] = { · 30 unmodified lines | ||
| 180 | 184 | /* sentinel */ |
| 181 | 185 | }; |
| 182 | 186 | |
| 183 | −/* | |
| 184 | − * ADC sample frequency, unit is ADCK cycles. | |
| 185 | − * ADC clk source is ipg clock, which is the same as bus clock. | |
| 186 | − * | |
| 187 | − * ADC conversion time = SFCAdder + AverageNum x (BCT + LSTAdder) | |
| 188 | − * SFCAdder: fixed to 6 ADCK cycles | |
| 189 | − * AverageNum: 1, 4, 8, 16, 32 samples for hardware average. | |
| 190 | − * BCT (Base Conversion Time): fixed to 25 ADCK cycles for 12 bit mode | |
| 191 | − * LSTAdder(Long Sample Time): fixed to 3 ADCK cycles | |
| 192 | − * | |
| 193 | − * By default, enable 12 bit resolution mode, clock source | |
| 194 | − * set to ipg clock, So get below frequency group: | |
| 195 | − */ | |
| 196 | −static const u32 vf610_sample_freq_avail[5] = | |
| 197 | −{1941176, 559332, 286957, 145374, 73171}; | |
| 187 | +static inline void vf610_adc_calculate_rates(struct vf610_adc *info) | |
| 188 | +{ | |
| 189 | + unsigned long adck_rate, ipg_rate = clk_get_rate(info->clk); | |
| 190 | + int i; | |
| 191 | + | |
| 192 | + /* | |
| 193 | + * Calculate ADC sample frequencies | |
| 194 | + * Sample time unit is ADCK cycles. ADCK clk source is ipg clock, | |
| 195 | + * which is the same as bus clock. | |
| 196 | + * | |
| 197 | + * ADC conversion time = SFCAdder + AverageNum x (BCT + LSTAdder) | |
| 198 | + * SFCAdder: fixed to 6 ADCK cycles | |
| 199 | + * AverageNum: 1, 4, 8, 16, 32 samples for hardware average. | |
| 200 | + * BCT (Base Conversion Time): fixed to 25 ADCK cycles for 12 bit mode | |
| 201 | + * LSTAdder(Long Sample Time): fixed to 3 ADCK cycles | |
| 202 | + */ | |
| 203 | + adck_rate = ipg_rate / info->adc_feature.clk_div; | |
| 204 | + for (i = 0; i < ARRAY_SIZE(vf610_hw_avgs); i++) | |
| 205 | + info->sample_freq_avail[i] = | |
| 206 | + adck_rate / (6 + vf610_hw_avgs[i] * (25 + 3)); | |
| 207 | +} | |
| 198 | 208 | |
| 199 | 209 | static inline void vf610_adc_cfg_init(struct vf610_adc *info) |
| 200 | 210 | { |
| 211 | + struct vf610_adc_feature *adc_feature = &info->adc_feature; | |
| 212 | + | |
| 201 | 213 | /* set default Configuration for ADC controller */ |
| 202 | − info->adc_feature.clk_sel = VF610_ADCIOC_BUSCLK_SET; | |
| 203 | − info->adc_feature.vol_ref = VF610_ADCIOC_VR_VREF_SET; | |
| 214 | + adc_feature->clk_sel = VF610_ADCIOC_BUSCLK_SET; | |
| 215 | + adc_feature->vol_ref = VF610_ADCIOC_VR_VREF_SET; | |
| 216 | + | |
| 217 | + adc_feature->calibration = true; | |
| 218 | + adc_feature->ovwren = true; | |
| 219 | + | |
| 220 | + adc_feature->res_mode = 12; | |
| 221 | + adc_feature->sample_rate = 1; | |
| 222 | + adc_feature->lpm = true; | |
| 204 | 223 | |
| 205 | − info->adc_feature.calibration = true; | |
| 206 | − info->adc_feature.ovwren = true; | |
| 224 | + /* Use a save ADCK which is below 20MHz on all devices */ | |
| 225 | + adc_feature->clk_div = 8; | |
| 207 | 226 | |
| 208 | − info->adc_feature.clk_div = 1; | |
| 209 | − info->adc_feature.res_mode = 12; | |
| 210 | − info->adc_feature.sample_rate = 1; | |
| 211 | − info->adc_feature.lpm = true; | |
| 227 | + vf610_adc_calculate_rates(info); | |
| 212 | 228 | } |
| 213 | 229 | |
| 214 | 230 | static void vf610_adc_cfg_post_set(struct vf610_adc *info) |
| @@ -290,12 +306,10 @@ static void vf610_adc_cfg_set(struct vf610_adc *info) · 75 unmodified lines | ||
| 290 | 306 | |
| 291 | 307 | cfg_data = readl(info->regs + VF610_REG_ADC_CFG); |
| 292 | 308 | |
| 293 | − /* low power configuration */ | |
| 294 | 309 | cfg_data &= ~VF610_ADC_ADLPC_EN; |
| 295 | 310 | if (adc_feature->lpm) |
| 296 | 311 | cfg_data |= VF610_ADC_ADLPC_EN; |
| 297 | 312 | |
| 298 | − /* disable high speed */ | |
| 299 | 313 | cfg_data &= ~VF610_ADC_ADHSC_EN; |
| 300 | 314 | |
| 301 | 315 | writel(cfg_data, info->regs + VF610_REG_ADC_CFG); |
| @@ -435,10 +449,27 @@ static irqreturn_t vf610_adc_isr(int irq, void *dev_id) · 133 unmodified lines | ||
| 435 | 449 | return IRQ_HANDLED; |
| 436 | 450 | } |
| 437 | 451 | |
| 438 | −static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("1941176, 559332, 286957, 145374, 73171"); | |
| 452 | +static ssize_t vf610_show_samp_freq_avail(struct device *dev, | |
| 453 | + struct device_attribute *attr, char *buf) | |
| 454 | +{ | |
| 455 | + struct vf610_adc *info = iio_priv(dev_to_iio_dev(dev)); | |
| 456 | + size_t len = 0; | |
| 457 | + int i; | |
| 458 | + | |
| 459 | + for (i = 0; i < ARRAY_SIZE(info->sample_freq_avail); i++) | |
| 460 | + len += scnprintf(buf + len, PAGE_SIZE - len, | |
| 461 | + "%u ", info->sample_freq_avail[i]); | |
| 462 | + | |
| 463 | + /* replace trailing space by newline */ | |
| 464 | + buf[len - 1] = '\n'; | |
| 465 | + | |
| 466 | + return len; | |
| 467 | +} | |
| 468 | + | |
| 469 | +static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(vf610_show_samp_freq_avail); | |
| 439 | 470 | |
| 440 | 471 | static struct attribute *vf610_attributes[] = { |
| 441 | − &iio_const_attr_sampling_frequency_available.dev_attr.attr, | |
| 472 | + &iio_dev_attr_sampling_frequency_available.dev_attr.attr, | |
| 442 | 473 | NULL |
| 443 | 474 | }; |
| 444 | 475 | |
| @@ -502,7 +533,7 @@ static int vf610_read_raw(struct iio_dev *indio_dev, · 57 unmodified lines | ||
| 502 | 533 | return IIO_VAL_FRACTIONAL_LOG2; |
| 503 | 534 | |
| 504 | 535 | case IIO_CHAN_INFO_SAMP_FREQ: |
| 505 | − *val = vf610_sample_freq_avail[info->adc_feature.sample_rate]; | |
| 536 | + *val = info->sample_freq_avail[info->adc_feature.sample_rate]; | |
| 506 | 537 | *val2 = 0; |
| 507 | 538 | return IIO_VAL_INT; |
| 508 | 539 | |
| @@ -525,9 +556,9 @@ static int vf610_write_raw(struct iio_dev *indio_dev, · 16 unmodified lines | ||
| 525 | 556 | switch (mask) { |
| 526 | 557 | case IIO_CHAN_INFO_SAMP_FREQ: |
| 527 | 558 | for (i = 0; |
| 528 | − i < ARRAY_SIZE(vf610_sample_freq_avail); | |
| 559 | + i < ARRAY_SIZE(info->sample_freq_avail); | |
| 529 | 560 | i++) |
| 530 | − if (val == vf610_sample_freq_avail[i]) { | |
| 561 | + if (val == info->sample_freq_avail[i]) { | |
| 531 | 562 | info->adc_feature.sample_rate = i; |
| 532 | 563 | vf610_adc_sample_set(info); |
| 533 | 564 | return 0; |
| @@ -822,7 +822,7 @@ static irqreturn_t bmg160_trigger_handler(int irq, void *p) · 821 unmodified lines | ||
| 822 | 822 | int bit, ret, i = 0; |
| 823 | 823 | |
| 824 | 824 | mutex_lock(&data->mutex); |
| 825 | − for_each_set_bit(bit, indio_dev->buffer->scan_mask, | |
| 825 | + for_each_set_bit(bit, indio_dev->active_scan_mask, | |
| 826 | 826 | indio_dev->masklength) { |
| 827 | 827 | ret = i2c_smbus_read_word_data(data->client, |
| 828 | 828 | BMG160_AXIS_TO_REG(bit)); |
| @@ -60,7 +60,7 @@ int adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev) · 59 unmodified lines | ||
| 60 | 60 | iio_trigger_set_drvdata(adis->trig, adis); |
| 61 | 61 | ret = iio_trigger_register(adis->trig); |
| 62 | 62 | |
| 63 | − indio_dev->trig = adis->trig; | |
| 63 | + indio_dev->trig = iio_trigger_get(adis->trig); | |
| 64 | 64 | if (ret) |
| 65 | 65 | goto error_free_irq; |
| 66 | 66 | |
| @@ -410,42 +410,46 @@ error_read_raw: · 409 unmodified lines | ||
| 410 | 410 | } |
| 411 | 411 | } |
| 412 | 412 | |
| 413 | −static int inv_mpu6050_write_fsr(struct inv_mpu6050_state *st, int fsr) | |
| 413 | +static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val) | |
| 414 | 414 | { |
| 415 | − int result; | |
| 415 | + int result, i; | |
| 416 | 416 | u8 d; |
| 417 | 417 | |
| 418 | − if (fsr < 0 || fsr > INV_MPU6050_MAX_GYRO_FS_PARAM) | |
| 419 | − return -EINVAL; | |
| 420 | − if (fsr == st->chip_config.fsr) | |
| 421 | − return 0; | |
| 418 | + for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { | |
| 419 | + if (gyro_scale_6050[i] == val) { | |
| 420 | + d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); | |
| 421 | + result = inv_mpu6050_write_reg(st, | |
| 422 | + st->reg->gyro_config, d); | |
| 423 | + if (result) | |
| 424 | + return result; | |
| 422 | 425 | |
| 423 | − d = (fsr << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); | |
| 424 | − result = inv_mpu6050_write_reg(st, st->reg->gyro_config, d); | |
| 425 | − if (result) | |
| 426 | − return result; | |
| 427 | − st->chip_config.fsr = fsr; | |
| 426 | + st->chip_config.fsr = i; | |
| 427 | + return 0; | |
| 428 | + } | |
| 429 | + } | |
| 428 | 430 | |
| 429 | − return 0; | |
| 431 | + return -EINVAL; | |
| 430 | 432 | } |
| 431 | 433 | |
| 432 | −static int inv_mpu6050_write_accel_fs(struct inv_mpu6050_state *st, int fs) | |
| 434 | +static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val) | |
| 433 | 435 | { |
| 434 | − int result; | |
| 436 | + int result, i; | |
| 435 | 437 | u8 d; |
| 436 | 438 | |
| 437 | − if (fs < 0 || fs > INV_MPU6050_MAX_ACCL_FS_PARAM) | |
| 438 | − return -EINVAL; | |
| 439 | − if (fs == st->chip_config.accl_fs) | |
| 440 | − return 0; | |
| 439 | + for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { | |
| 440 | + if (accel_scale[i] == val) { | |
| 441 | + d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); | |
| 442 | + result = inv_mpu6050_write_reg(st, | |
| 443 | + st->reg->accl_config, d); | |
| 444 | + if (result) | |
| 445 | + return result; | |
| 441 | 446 | |
| 442 | − d = (fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); | |
| 443 | − result = inv_mpu6050_write_reg(st, st->reg->accl_config, d); | |
| 444 | − if (result) | |
| 445 | − return result; | |
| 446 | − st->chip_config.accl_fs = fs; | |
| 447 | + st->chip_config.accl_fs = i; | |
| 448 | + return 0; | |
| 449 | + } | |
| 450 | + } | |
| 447 | 451 | |
| 448 | − return 0; | |
| 452 | + return -EINVAL; | |
| 449 | 453 | } |
| 450 | 454 | |
| 451 | 455 | static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, |
| @@ -471,10 +475,10 @@ static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, · 19 unmodified lines | ||
| 471 | 475 | case IIO_CHAN_INFO_SCALE: |
| 472 | 476 | switch (chan->type) { |
| 473 | 477 | case IIO_ANGL_VEL: |
| 474 | − result = inv_mpu6050_write_fsr(st, val); | |
| 478 | + result = inv_mpu6050_write_gyro_scale(st, val2); | |
| 475 | 479 | break; |
| 476 | 480 | case IIO_ACCEL: |
| 477 | − result = inv_mpu6050_write_accel_fs(st, val); | |
| 481 | + result = inv_mpu6050_write_accel_scale(st, val2); | |
| 478 | 482 | break; |
| 479 | 483 | default: |
| 480 | 484 | result = -EINVAL; |
| @@ -24,6 +24,16 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/poll.h> |
| 25 | 25 | #include "inv_mpu_iio.h" |
| 26 | 26 | |
| 27 | +static void inv_clear_kfifo(struct inv_mpu6050_state *st) | |
| 28 | +{ | |
| 29 | + unsigned long flags; | |
| 30 | + | |
| 31 | + /* take the spin lock sem to avoid interrupt kick in */ | |
| 32 | + spin_lock_irqsave(&st->time_stamp_lock, flags); | |
| 33 | + kfifo_reset(&st->timestamps); | |
| 34 | + spin_unlock_irqrestore(&st->time_stamp_lock, flags); | |
| 35 | +} | |
| 36 | + | |
| 27 | 37 | int inv_reset_fifo(struct iio_dev *indio_dev) |
| 28 | 38 | { |
| 29 | 39 | int result; |
| @@ -50,6 +60,10 @@ int inv_reset_fifo(struct iio_dev *indio_dev) · 20 unmodified lines | ||
| 50 | 60 | INV_MPU6050_BIT_FIFO_RST); |
| 51 | 61 | if (result) |
| 52 | 62 | goto reset_fifo_fail; |
| 63 | + | |
| 64 | + /* clear timestamps fifo */ | |
| 65 | + inv_clear_kfifo(st); | |
| 66 | + | |
| 53 | 67 | /* enable interrupt */ |
| 54 | 68 | if (st->chip_config.accl_fifo_enable || |
| 55 | 69 | st->chip_config.gyro_fifo_enable) { |
| @@ -83,16 +97,6 @@ reset_fifo_fail: · 27 unmodified lines | ||
| 83 | 97 | return result; |
| 84 | 98 | } |
| 85 | 99 | |
| 86 | −static void inv_clear_kfifo(struct inv_mpu6050_state *st) | |
| 87 | −{ | |
| 88 | − unsigned long flags; | |
| 89 | − | |
| 90 | − /* take the spin lock sem to avoid interrupt kick in */ | |
| 91 | − spin_lock_irqsave(&st->time_stamp_lock, flags); | |
| 92 | − kfifo_reset(&st->timestamps); | |
| 93 | − spin_unlock_irqrestore(&st->time_stamp_lock, flags); | |
| 94 | −} | |
| 95 | − | |
| 96 | 100 | /** |
| 97 | 101 | * inv_mpu6050_irq_handler() - Cache a timestamp at each data ready interrupt. |
| 98 | 102 | */ |
| @@ -184,7 +188,6 @@ end_session: · 85 unmodified lines | ||
| 184 | 188 | flush_fifo: |
| 185 | 189 | /* Flush HW and SW FIFOs. */ |
| 186 | 190 | inv_reset_fifo(indio_dev); |
| 187 | − inv_clear_kfifo(st); | |
| 188 | 191 | mutex_unlock(&indio_dev->mlock); |
| 189 | 192 | iio_trigger_notify_done(indio_dev->trig); |
| 190 | 193 | |
| @@ -1227,7 +1227,7 @@ static irqreturn_t kmx61_trigger_handler(int irq, void *p) · 1226 unmodified lines | ||
| 1227 | 1227 | base = KMX61_MAG_XOUT_L; |
| 1228 | 1228 | |
| 1229 | 1229 | mutex_lock(&data->lock); |
| 1230 | − for_each_set_bit(bit, indio_dev->buffer->scan_mask, | |
| 1230 | + for_each_set_bit(bit, indio_dev->active_scan_mask, | |
| 1231 | 1231 | indio_dev->masklength) { |
| 1232 | 1232 | ret = kmx61_read_measurement(data, base, bit); |
| 1233 | 1233 | if (ret < 0) { |
| @@ -847,8 +847,7 @@ static int iio_device_add_channel_sysfs(struct iio_dev *indio_dev, · 846 unmodified lines | ||
| 847 | 847 | * @attr_list: List of IIO device attributes |
| 848 | 848 | * |
| 849 | 849 | * This function frees the memory allocated for each of the IIO device |
| 850 | − * attributes in the list. Note: if you want to reuse the list after calling | |
| 851 | − * this function you have to reinitialize it using INIT_LIST_HEAD(). | |
| 850 | + * attributes in the list. | |
| 852 | 851 | */ |
| 853 | 852 | void iio_free_chan_devattr_list(struct list_head *attr_list) |
| 854 | 853 | { |
| @@ -856,6 +855,7 @@ void iio_free_chan_devattr_list(struct list_head *attr_list) · 1 unmodified line | ||
| 856 | 855 | |
| 857 | 856 | list_for_each_entry_safe(p, n, attr_list, l) { |
| 858 | 857 | kfree(p->dev_attr.attr.name); |
| 858 | + list_del(&p->l); | |
| 859 | 859 | kfree(p); |
| 860 | 860 | } |
| 861 | 861 | } |
| @@ -936,6 +936,7 @@ static void iio_device_unregister_sysfs(struct iio_dev *indio_dev) · 74 unmodified lines | ||
| 936 | 936 | |
| 937 | 937 | iio_free_chan_devattr_list(&indio_dev->channel_attr_list); |
| 938 | 938 | kfree(indio_dev->chan_attr_group.attrs); |
| 939 | + indio_dev->chan_attr_group.attrs = NULL; | |
| 939 | 940 | } |
| 940 | 941 | |
| 941 | 942 | static void iio_dev_release(struct device *device) |
| @@ -500,6 +500,7 @@ int iio_device_register_eventset(struct iio_dev *indio_dev) · 499 unmodified lines | ||
| 500 | 500 | error_free_setup_event_lines: |
| 501 | 501 | iio_free_chan_devattr_list(&indio_dev->event_interface->dev_attr_list); |
| 502 | 502 | kfree(indio_dev->event_interface); |
| 503 | + indio_dev->event_interface = NULL; | |
| 503 | 504 | return ret; |
| 504 | 505 | } |
| 505 | 506 | |
| @@ -494,7 +494,7 @@ static irqreturn_t sx9500_trigger_handler(int irq, void *private) · 493 unmodified lines | ||
| 494 | 494 | |
| 495 | 495 | mutex_lock(&data->mutex); |
| 496 | 496 | |
| 497 | − for_each_set_bit(bit, indio_dev->buffer->scan_mask, | |
| 497 | + for_each_set_bit(bit, indio_dev->active_scan_mask, | |
| 498 | 498 | indio_dev->masklength) { |
| 499 | 499 | ret = sx9500_read_proximity(data, &indio_dev->channels[bit], |
| 500 | 500 | &val); |
| @@ -38,6 +38,7 @@ config IIO_SIMPLE_DUMMY_EVENTS · 37 unmodified lines | ||
| 38 | 38 | config IIO_SIMPLE_DUMMY_BUFFER |
| 39 | 39 | bool "Buffered capture support" |
| 40 | 40 | select IIO_BUFFER |
| 41 | + select IIO_TRIGGER | |
| 41 | 42 | select IIO_KFIFO_BUF |
| 42 | 43 | help |
| 43 | 44 | Add buffered data capture to the simple dummy driver. |
| @@ -592,6 +592,7 @@ int hmc5843_common_probe(struct device *dev, struct regmap *regmap, · 591 unmodified lines | ||
| 592 | 592 | mutex_init(&data->lock); |
| 593 | 593 | |
| 594 | 594 | indio_dev->dev.parent = dev; |
| 595 | + indio_dev->name = dev->driver->name; | |
| 595 | 596 | indio_dev->info = &hmc5843_info; |
| 596 | 597 | indio_dev->modes = INDIO_DIRECT_MODE; |
| 597 | 598 | indio_dev->channels = data->variant->channels; |