Pull RAS fix from Borislav Petkov: "One urgent fix for the thermal throttling machinery: the recent change reworking the thermal notifications forgot to mask out read-only and reserved bits in the thermal status MSRs, leading to exceptions while writing those MSRs. The fix takes care of masking out those bits first" * 'ras-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mce/therm_throt: Mask out read-only and reserved MSR bits
Unified · Split
| @@ -195,17 +195,24 @@ static const struct attribute_group thermal_attr_group = { · 194 unmodified lines | |||
| 195 | #define THERM_THROT_POLL_INTERVAL HZ | 195 | #define THERM_THROT_POLL_INTERVAL HZ |
| 196 | #define THERM_STATUS_PROCHOT_LOG BIT(1) | 196 | #define THERM_STATUS_PROCHOT_LOG BIT(1) |
| 197 | 197 | ||
| 198 | #define THERM_STATUS_CLEAR_CORE_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11) | BIT(13) | BIT(15)) | ||
| 199 | #define THERM_STATUS_CLEAR_PKG_MASK (BIT(1) | BIT(3) | BIT(5) | BIT(7) | BIT(9) | BIT(11)) | ||
| 200 | |||
| 198 | static void clear_therm_status_log(int level) | 201 | static void clear_therm_status_log(int level) |
| 199 | { | 202 | { |
| 200 | int msr; | 203 | int msr; |
| 201 | u64 msr_val; | 204 | u64 mask, msr_val; |
| 202 | 205 | ||
| 203 | if (level == CORE_LEVEL) | 206 | if (level == CORE_LEVEL) { |
| 204 | msr = MSR_IA32_THERM_STATUS; | 207 | msr = MSR_IA32_THERM_STATUS; |
| 205 | else | 208 | mask = THERM_STATUS_CLEAR_CORE_MASK; |
| 206 | msr = MSR_IA32_PACKAGE_THERM_STATUS; | 209 | } else { |
| 210 | msr = MSR_IA32_PACKAGE_THERM_STATUS; | ||
| 211 | mask = THERM_STATUS_CLEAR_PKG_MASK; | ||
| 212 | } | ||
| 207 | 213 | ||
| 208 | rdmsrl(msr, msr_val); | 214 | rdmsrl(msr, msr_val); |
| 215 | msr_val &= mask; | ||
| 209 | wrmsrl(msr, msr_val & ~THERM_STATUS_PROCHOT_LOG); | 216 | wrmsrl(msr, msr_val & ~THERM_STATUS_PROCHOT_LOG); |
| 210 | } | 217 | } |
| 211 | 218 | ||