Merge tag 'regulator-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator

Pull regulator updates from Mark Brown: "A couple of nice new features this month, the ability to map regulators in order to allow voltage control by external coprocessors is something people have been asking for for a long time. - improved support for switch only "regulators", allowing current state to be read from the parent regulator but no setting. - support for obtaining the register access method used to set voltages, for use in systems which can offload control of this to a coprocessor (typically for DVFS). - support for Active-Semi AC8846, Dialog DA9211 and Texas Instruments TPS65917" * tag 'regulator-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (58 commits) regulator: act8865: fix build when OF is not enabled regulator: act8865: add act8846 to DT binding documentation regulator: act8865: add support for act8846 regulator: act8865: prepare support for other act88xx devices regulator: act8865: set correct number of regulators in pdata regulator: act8865: Remove error variable in act8865_pmic_probe regulator: act8865: fix parsing of platform data regulator: tps65090: Set voltage for fixed regulators regulator: core: Allow to get voltage count and list from parent regulator: core: Get voltage from parent if not available regulator: Add missing statics and inlines for stub functions regulator: lp872x: Don't set constraints within the regulator driver regmap: Fix return code for stub regmap_get_device() regulator: s2mps11: Update module description and Kconfig to add S2MPU02 support regulator: Add helpers for low-level register access regmap: Allow regmap_get_device() to be used by modules regmap: Add regmap_get_device regulator: da9211: Remove unnecessary devm_regulator_unregister() calls regulator: Add DT bindings for tps65218 PMIC regulators. regulator: da9211: new regulator driver ...

Linus Torvalds committed 12 years ago

Commit 91c2ff72 parents 1325b65 f955c8b38 files · +3105 −808Browse files

Unified · Split

38 files

Documentation/devicetree/bindings/mfd/palmas.txt +2 −0
Documentation/devicetree/bindings/regulator/act8865-regulator.txt +5 −2
Documentation/devicetree/bindings/regulator/palmas-pmic.txt +1 −0
Documentation/devicetree/bindings/regulator/tps65218.txt +23 −0
Documentation/power/regulator/consumer.txt +35 −0
drivers/base/regmap/regmap.c +13 −0
drivers/mfd/palmas.c +176 −57
drivers/regulator/88pm800.c +0 −1
drivers/regulator/Kconfig +12 −2
drivers/regulator/Makefile +1 −0
drivers/regulator/ab8500.c +9 −29
drivers/regulator/act8865-regulator.c +189 −140
drivers/regulator/arizona-ldo1.c +0 −2
drivers/regulator/as3722-regulator.c +2 −2
drivers/regulator/bcm590xx-regulator.c +4 −12
drivers/regulator/core.c +108 −18
drivers/regulator/da9211-regulator.c +368 −0
drivers/regulator/da9211-regulator.h +271 −0
drivers/regulator/lp872x.c +0 −9
drivers/regulator/lp8755.c +6 −17
drivers/regulator/ltc3589.c +1 −1
drivers/regulator/max8952.c +10 −24
drivers/regulator/mc13xxx-regulator-core.c +8 −29
drivers/regulator/mc13xxx.h +0 −1
drivers/regulator/palmas-regulator.c +796 −308
drivers/regulator/s2mps11.c +1 −1
drivers/regulator/s5m8767.c +1 −3
drivers/regulator/tps65090-regulator.c +42 −34
drivers/regulator/tps65217-regulator.c +2 −2
drivers/regulator/tps65218-regulator.c +26 −26
drivers/regulator/tps6586x-regulator.c +68 −61
drivers/regulator/twl-regulator.c +1 −12
include/linux/mfd/palmas.h +837 −0
include/linux/regmap.h +7 −0
include/linux/regulator/ab8500.h +0 −14
include/linux/regulator/act8865.h +22 −1
include/linux/regulator/consumer.h +26 −0
include/linux/regulator/da9211.h +32 −0

Documentation/devicetree/bindings/mfd/palmas.txt+2−0

@@ -6,6 +6,7 @@ twl6037 (palmas) · 5 unmodified lines
6	6	tps65913 (palmas)
7	7	tps65914 (palmas)
8	8	tps659038
	9	+tps65917
9	10
10	11	Required properties:
11	12	- compatible : Should be from the list
@@ -16,6 +17,7 @@ Required properties: · 4 unmodified lines
16	17	ti,tps65914
17	18	ti,tps80036
18	19	ti,tps659038
	20	+ ti,tps65917
19	21	and also the generic series names
20	22	ti,palmas
21	23	- interrupt-controller : palmas has its own internal IRQs

Documentation/devicetree/bindings/regulator/act8865-regulator.txt+5−2

@@ -1,13 +1,16 @@
1		−ACT8865 regulator
	1	+ACT88xx regulators
2	2	-------------------
3	3
4	4	Required properties:
5		−- compatible: "active-semi,act8865"
	5	+- compatible: "active-semi,act8846" or "active-semi,act8865"
6	6	- reg: I2C slave address
7	7
8	8	Any standard regulator properties can be used to configure the single regulator.
9	9
10	10	The valid names for regulators are:
	11	+ - for act8846:
	12	+ REG1, REG2, REG3, REG4, REG5, REG6, REG7, REG8, REG9, REG10, REG11, REG12
	13	+ - for act8865:
11	14	DCDC_REG1, DCDC_REG2, DCDC_REG3, LDO_REG1, LDO_REG2, LDO_REG3, LDO_REG4.
12	15
13	16	Example:

Documentation/devicetree/bindings/regulator/palmas-pmic.txt+1−0

@@ -7,6 +7,7 @@ Required properties: · 6 unmodified lines
7	7	ti,twl6037-pmic
8	8	ti,tps65913-pmic
9	9	ti,tps65914-pmic
	10	+ ti,tps65917-pmic
10	11	and also the generic series names
11	12	ti,palmas-pmic
12	13	- interrupt-parent : The parent interrupt controller which is palmas.

Documentation/devicetree/bindings/regulator/tps65218.txt+23−0

@@ -0,0 +1,23 @@
	1	+TPS65218 family of regulators
	2	+
	3	+Required properties:
	4	+For tps65218 regulators/LDOs
	5	+- compatible:
	6	+ - "ti,tps65218-dcdc1" for DCDC1
	7	+ - "ti,tps65218-dcdc2" for DCDC2
	8	+ - "ti,tps65218-dcdc3" for DCDC3
	9	+ - "ti,tps65218-dcdc4" for DCDC4
	10	+ - "ti,tps65218-dcdc5" for DCDC5
	11	+ - "ti,tps65218-dcdc6" for DCDC6
	12	+ - "ti,tps65218-ldo1" for LDO1
	13	+
	14	+Optional properties:
	15	+- Any optional property defined in bindings/regulator/regulator.txt
	16	+
	17	+Example:
	18	+
	19	+ xyz: regulator@0 {
	20	+ compatible = "ti,tps65218-dcdc1";
	21	+ regulator-min-microvolt = <1000000>;
	22	+ regulator-max-microvolt = <3000000>;
	23	+ };

Documentation/power/regulator/consumer.txt+35−0

@@ -180,3 +180,38 @@ int regulator_unregister_notifier(struct regulator *regulator, · 179 unmodified lines
180	180
181	181	Regulators use the kernel notifier framework to send event to their interested
182	182	consumers.
	183	+
	184	+7. Regulator Direct Register Access
	185	+===================================
	186	+Some kinds of power management hardware or firmware are designed such that
	187	+they need to do low-level hardware access to regulators, with no involvement
	188	+from the kernel. Examples of such devices are:
	189	+
	190	+- clocksource with a voltage-controlled oscillator and control logic to change
	191	+ the supply voltage over I2C to achieve a desired output clock rate
	192	+- thermal management firmware that can issue an arbitrary I2C transaction to
	193	+ perform system poweroff during overtemperature conditions
	194	+
	195	+To set up such a device/firmware, various parameters like I2C address of the
	196	+regulator, addresses of various regulator registers etc. need to be configured
	197	+to it. The regulator framework provides the following helpers for querying
	198	+these details.
	199	+
	200	+Bus-specific details, like I2C addresses or transfer rates are handled by the
	201	+regmap framework. To get the regulator's regmap (if supported), use :-
	202	+
	203	+struct regmap regulator_get_regmap(struct regulator regulator);
	204	+
	205	+To obtain the hardware register offset and bitmask for the regulator's voltage
	206	+selector register, use :-
	207	+
	208	+int regulator_get_hardware_vsel_register(struct regulator *regulator,
	209	+ unsigned *vsel_reg,
	210	+ unsigned *vsel_mask);
	211	+
	212	+To convert a regulator framework voltage selector code (used by
	213	+regulator_list_voltage) to a hardware-specific voltage selector that can be
	214	+directly written to the voltage selector register, use :-
	215	+
	216	+int regulator_list_hardware_vsel(struct regulator *regulator,
	217	+ unsigned selector);

drivers/base/regmap/regmap.c+13−0

@@ -1073,6 +1073,19 @@ struct regmap dev_get_regmap(struct device dev, const char *name) · 1072 unmodified lines
1073	1073	}
1074	1074	EXPORT_SYMBOL_GPL(dev_get_regmap);
1075	1075
	1076	+/**
	1077	+ * regmap_get_device(): Obtain the device from a regmap
	1078	+ *
	1079	+ * @map: Register map to operate on.
	1080	+ *
	1081	+ * Returns the underlying device that the regmap has been created for.
	1082	+ */
	1083	+struct device regmap_get_device(struct regmap map)
	1084	+{
	1085	+ return map->dev;
	1086	+}
	1087	+EXPORT_SYMBOL_GPL(regmap_get_device);
	1088	+
1076	1089	static int _regmap_select_page(struct regmap map, unsigned int reg,
1077	1090	struct regmap_range_node *range,
1078	1091	unsigned int val_num)

drivers/mfd/palmas.c+176−57

@@ -25,52 +25,6 @@ · 24 unmodified lines
25	25	#include <linux/mfd/palmas.h>
26	26	#include <linux/of_device.h>
27	27
28		−#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 \| \
29		− PALMAS_EXT_CONTROL_ENABLE2 \| \
30		− PALMAS_EXT_CONTROL_NSLEEP)
31		−
32		−struct palmas_sleep_requestor_info {
33		− int id;
34		− int reg_offset;
35		− int bit_pos;
36		−};
37		−
38		−#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
39		− [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
40		− .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
41		− .reg_offset = _offset, \
42		− .bit_pos = _pos, \
43		− }
44		−
45		−static struct palmas_sleep_requestor_info sleep_req_info[] = {
46		− EXTERNAL_REQUESTOR(REGEN1, 0, 0),
47		− EXTERNAL_REQUESTOR(REGEN2, 0, 1),
48		− EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
49		− EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
50		− EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
51		− EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
52		− EXTERNAL_REQUESTOR(REGEN3, 0, 6),
53		− EXTERNAL_REQUESTOR(SMPS12, 1, 0),
54		− EXTERNAL_REQUESTOR(SMPS3, 1, 1),
55		− EXTERNAL_REQUESTOR(SMPS45, 1, 2),
56		− EXTERNAL_REQUESTOR(SMPS6, 1, 3),
57		− EXTERNAL_REQUESTOR(SMPS7, 1, 4),
58		− EXTERNAL_REQUESTOR(SMPS8, 1, 5),
59		− EXTERNAL_REQUESTOR(SMPS9, 1, 6),
60		− EXTERNAL_REQUESTOR(SMPS10, 1, 7),
61		− EXTERNAL_REQUESTOR(LDO1, 2, 0),
62		− EXTERNAL_REQUESTOR(LDO2, 2, 1),
63		− EXTERNAL_REQUESTOR(LDO3, 2, 2),
64		− EXTERNAL_REQUESTOR(LDO4, 2, 3),
65		− EXTERNAL_REQUESTOR(LDO5, 2, 4),
66		− EXTERNAL_REQUESTOR(LDO6, 2, 5),
67		− EXTERNAL_REQUESTOR(LDO7, 2, 6),
68		− EXTERNAL_REQUESTOR(LDO8, 2, 7),
69		− EXTERNAL_REQUESTOR(LDO9, 3, 0),
70		− EXTERNAL_REQUESTOR(LDOLN, 3, 1),
71		− EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
72		−};
73		−
74	28	static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
75	29	{
76	30	.reg_bits = 8,
@@ -92,6 +46,133 @@ static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = { · 15 unmodified lines
92	46	},
93	47	};
94	48
	49	+static const struct regmap_irq tps65917_irqs[] = {
	50	+ /* INT1 IRQs */
	51	+ [TPS65917_RESERVED1] = {
	52	+ .mask = TPS65917_RESERVED,
	53	+ },
	54	+ [TPS65917_PWRON_IRQ] = {
	55	+ .mask = TPS65917_INT1_STATUS_PWRON,
	56	+ },
	57	+ [TPS65917_LONG_PRESS_KEY_IRQ] = {
	58	+ .mask = TPS65917_INT1_STATUS_LONG_PRESS_KEY,
	59	+ },
	60	+ [TPS65917_RESERVED2] = {
	61	+ .mask = TPS65917_RESERVED,
	62	+ },
	63	+ [TPS65917_PWRDOWN_IRQ] = {
	64	+ .mask = TPS65917_INT1_STATUS_PWRDOWN,
	65	+ },
	66	+ [TPS65917_HOTDIE_IRQ] = {
	67	+ .mask = TPS65917_INT1_STATUS_HOTDIE,
	68	+ },
	69	+ [TPS65917_VSYS_MON_IRQ] = {
	70	+ .mask = TPS65917_INT1_STATUS_VSYS_MON,
	71	+ },
	72	+ [TPS65917_RESERVED3] = {
	73	+ .mask = TPS65917_RESERVED,
	74	+ },
	75	+ /* INT2 IRQs*/
	76	+ [TPS65917_RESERVED4] = {
	77	+ .mask = TPS65917_RESERVED,
	78	+ .reg_offset = 1,
	79	+ },
	80	+ [TPS65917_OTP_ERROR_IRQ] = {
	81	+ .mask = TPS65917_INT2_STATUS_OTP_ERROR,
	82	+ .reg_offset = 1,
	83	+ },
	84	+ [TPS65917_WDT_IRQ] = {
	85	+ .mask = TPS65917_INT2_STATUS_WDT,
	86	+ .reg_offset = 1,
	87	+ },
	88	+ [TPS65917_RESERVED5] = {
	89	+ .mask = TPS65917_RESERVED,
	90	+ .reg_offset = 1,
	91	+ },
	92	+ [TPS65917_RESET_IN_IRQ] = {
	93	+ .mask = TPS65917_INT2_STATUS_RESET_IN,
	94	+ .reg_offset = 1,
	95	+ },
	96	+ [TPS65917_FSD_IRQ] = {
	97	+ .mask = TPS65917_INT2_STATUS_FSD,
	98	+ .reg_offset = 1,
	99	+ },
	100	+ [TPS65917_SHORT_IRQ] = {
	101	+ .mask = TPS65917_INT2_STATUS_SHORT,
	102	+ .reg_offset = 1,
	103	+ },
	104	+ [TPS65917_RESERVED6] = {
	105	+ .mask = TPS65917_RESERVED,
	106	+ .reg_offset = 1,
	107	+ },
	108	+ /* INT3 IRQs */
	109	+ [TPS65917_GPADC_AUTO_0_IRQ] = {
	110	+ .mask = TPS65917_INT3_STATUS_GPADC_AUTO_0,
	111	+ .reg_offset = 2,
	112	+ },
	113	+ [TPS65917_GPADC_AUTO_1_IRQ] = {
	114	+ .mask = TPS65917_INT3_STATUS_GPADC_AUTO_1,
	115	+ .reg_offset = 2,
	116	+ },
	117	+ [TPS65917_GPADC_EOC_SW_IRQ] = {
	118	+ .mask = TPS65917_INT3_STATUS_GPADC_EOC_SW,
	119	+ .reg_offset = 2,
	120	+ },
	121	+ [TPS65917_RESREVED6] = {
	122	+ .mask = TPS65917_RESERVED6,
	123	+ .reg_offset = 2,
	124	+ },
	125	+ [TPS65917_RESERVED7] = {
	126	+ .mask = TPS65917_RESERVED,
	127	+ .reg_offset = 2,
	128	+ },
	129	+ [TPS65917_RESERVED8] = {
	130	+ .mask = TPS65917_RESERVED,
	131	+ .reg_offset = 2,
	132	+ },
	133	+ [TPS65917_RESERVED9] = {
	134	+ .mask = TPS65917_RESERVED,
	135	+ .reg_offset = 2,
	136	+ },
	137	+ [TPS65917_VBUS_IRQ] = {
	138	+ .mask = TPS65917_INT3_STATUS_VBUS,
	139	+ .reg_offset = 2,
	140	+ },
	141	+ /* INT4 IRQs */
	142	+ [TPS65917_GPIO_0_IRQ] = {
	143	+ .mask = TPS65917_INT4_STATUS_GPIO_0,
	144	+ .reg_offset = 3,
	145	+ },
	146	+ [TPS65917_GPIO_1_IRQ] = {
	147	+ .mask = TPS65917_INT4_STATUS_GPIO_1,
	148	+ .reg_offset = 3,
	149	+ },
	150	+ [TPS65917_GPIO_2_IRQ] = {
	151	+ .mask = TPS65917_INT4_STATUS_GPIO_2,
	152	+ .reg_offset = 3,
	153	+ },
	154	+ [TPS65917_GPIO_3_IRQ] = {
	155	+ .mask = TPS65917_INT4_STATUS_GPIO_3,
	156	+ .reg_offset = 3,
	157	+ },
	158	+ [TPS65917_GPIO_4_IRQ] = {
	159	+ .mask = TPS65917_INT4_STATUS_GPIO_4,
	160	+ .reg_offset = 3,
	161	+ },
	162	+ [TPS65917_GPIO_5_IRQ] = {
	163	+ .mask = TPS65917_INT4_STATUS_GPIO_5,
	164	+ .reg_offset = 3,
	165	+ },
	166	+ [TPS65917_GPIO_6_IRQ] = {
	167	+ .mask = TPS65917_INT4_STATUS_GPIO_6,
	168	+ .reg_offset = 3,
	169	+ },
	170	+ [TPS65917_RESERVED10] = {
	171	+ .mask = TPS65917_RESERVED10,
	172	+ .reg_offset = 3,
	173	+ },
	174	+};
	175	+
95	176	static const struct regmap_irq palmas_irqs[] = {
96	177	/* INT1 IRQs */
97	178	[PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {
@@ -232,13 +313,26 @@ static struct regmap_irq_chip palmas_irq_chip = { · 134 unmodified lines
232	313	PALMAS_INT1_MASK),
233	314	};
234	315
	316	+static struct regmap_irq_chip tps65917_irq_chip = {
	317	+ .name = "tps65917",
	318	+ .irqs = tps65917_irqs,
	319	+ .num_irqs = ARRAY_SIZE(tps65917_irqs),
	320	+
	321	+ .num_regs = 4,
	322	+ .irq_reg_stride = 5,
	323	+ .status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
	324	+ PALMAS_INT1_STATUS),
	325	+ .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
	326	+ PALMAS_INT1_MASK),
	327	+};
	328	+
235	329	int palmas_ext_control_req_config(struct palmas *palmas,
236	330	enum palmas_external_requestor_id id, int ext_ctrl, bool enable)
237	331	{
	332	+ struct palmas_pmic_driver_data *pmic_ddata = palmas->pmic_ddata;
238	333	int preq_mask_bit = 0;
239	334	int reg_add = 0;
240		− int bit_pos;
241		− int ret;
	335	+ int bit_pos, ret;
242	336
243	337	if (!(ext_ctrl & PALMAS_EXT_REQ))
244	338	return 0;
@@ -257,8 +351,8 @@ int palmas_ext_control_req_config(struct palmas *palmas, · 12 unmodified lines
257	351	preq_mask_bit = 2;
258	352	}
259	353
260		− bit_pos = sleep_req_info[id].bit_pos;
261		− reg_add += sleep_req_info[id].reg_offset;
	354	+ bit_pos = pmic_ddata->sleep_req_info[id].bit_pos;
	355	+ reg_add += pmic_ddata->sleep_req_info[id].reg_offset;
262	356	if (enable)
263	357	ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
264	358	reg_add, BIT(bit_pos), BIT(bit_pos));
@@ -357,14 +451,38 @@ static void palmas_power_off(void) · 92 unmodified lines
357	451	static unsigned int palmas_features = PALMAS_PMIC_FEATURE_SMPS10_BOOST;
358	452	static unsigned int tps659038_features;
359	453
	454	+struct palmas_driver_data {
	455	+ unsigned int *features;
	456	+ struct regmap_irq_chip *irq_chip;
	457	+};
	458	+
	459	+static struct palmas_driver_data palmas_data = {
	460	+ .features = &palmas_features,
	461	+ .irq_chip = &palmas_irq_chip,
	462	+};
	463	+
	464	+static struct palmas_driver_data tps659038_data = {
	465	+ .features = &tps659038_features,
	466	+ .irq_chip = &palmas_irq_chip,
	467	+};
	468	+
	469	+static struct palmas_driver_data tps65917_data = {
	470	+ .features = &tps659038_features,
	471	+ .irq_chip = &tps65917_irq_chip,
	472	+};
	473	+
360	474	static const struct of_device_id of_palmas_match_tbl[] = {
361	475	{
362	476	.compatible = "ti,palmas",
363		− .data = &palmas_features,
	477	+ .data = &palmas_data,
364	478	},
365	479	{
366	480	.compatible = "ti,tps659038",
367		− .data = &tps659038_features,
	481	+ .data = &tps659038_data,
	482	+ },
	483	+ {
	484	+ .compatible = "ti,tps65917",
	485	+ .data = &tps65917_data,
368	486	},
369	487	{ },
370	488	};
@@ -375,9 +493,10 @@ static int palmas_i2c_probe(struct i2c_client *i2c, · 4 unmodified lines
375	493	{
376	494	struct palmas *palmas;
377	495	struct palmas_platform_data *pdata;
	496	+ struct palmas_driver_data *driver_data;
378	497	struct device_node *node = i2c->dev.of_node;
379	498	int ret = 0, i;
380		− unsigned int reg, addr, *features;
	499	+ unsigned int reg, addr;
381	500	int slave;
382	501	const struct of_device_id *match;
383	502
@@ -408,8 +527,8 @@ static int palmas_i2c_probe(struct i2c_client *i2c, · 24 unmodified lines
408	527	if (!match)
409	528	return -ENODATA;
410	529
411		− features = (unsigned int *)match->data;
412		− palmas->features = *features;
	530	+ driver_data = (struct palmas_driver_data *)match->data;
	531	+ palmas->features = *driver_data->features;
413	532
414	533	for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
415	534	if (i == 0)
@@ -463,8 +582,8 @@ static int palmas_i2c_probe(struct i2c_client *i2c, · 47 unmodified lines
463	582	regmap_write(palmas->regmap[slave], addr, reg);
464	583
465	584	ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
466		− IRQF_ONESHOT \| pdata->irq_flags, 0, &palmas_irq_chip,
467		− &palmas->irq_data);
	585	+ IRQF_ONESHOT \| pdata->irq_flags, 0,
	586	+ driver_data->irq_chip, &palmas->irq_data);
468	587	if (ret < 0)
469	588	goto err_i2c;
470	589

drivers/regulator/88pm800.c+0−1

@@ -52,7 +52,6 @@ · 51 unmodified lines
52	52	#define PM800_BUCK1_3 (0x3F)
53	53	#define PM800_BUCK2 (0x40)
54	54	#define PM800_BUCK3 (0x41)
55		−#define PM800_BUCK3 (0x41)
56	55	#define PM800_BUCK4 (0x42)
57	56	#define PM800_BUCK4_1 (0x43)
58	57	#define PM800_BUCK4_2 (0x44)

drivers/regulator/Kconfig+12−2

@@ -198,6 +198,16 @@ config REGULATOR_DA9210 · 197 unmodified lines
198	198	converter 12A DC-DC Buck controlled through an I2C
199	199	interface.
200	200
	201	+config REGULATOR_DA9211
	202	+ tristate "Dialog Semiconductor DA9211/DA9212 regulator"
	203	+ depends on I2C
	204	+ select REGMAP_I2C
	205	+ help
	206	+ Say y here to support for the Dialog Semiconductor DA9211/DA9212.
	207	+ The DA9211/DA9212 is a multi-phase synchronous step down
	208	+ converter 12A DC-DC Buck controlled through an I2C
	209	+ interface.
	210	+
201	211	config REGULATOR_DBX500_PRCMU
202	212	bool
203	213
@@ -457,10 +467,10 @@ config REGULATOR_S2MPA01 · 253 unmodified lines
457	467	via I2C bus. S2MPA01 has 10 Bucks and 26 LDO outputs.
458	468
459	469	config REGULATOR_S2MPS11
460		− tristate "Samsung S2MPS11/S2MPS14 voltage regulator"
	470	+ tristate "Samsung S2MPS11/S2MPS14/S2MPU02 voltage regulator"
461	471	depends on MFD_SEC_CORE
462	472	help
463		− This driver supports a Samsung S2MPS11/S2MPS14 voltage output
	473	+ This driver supports a Samsung S2MPS11/S2MPS14/S2MPU02 voltage output
464	474	regulator via I2C bus. The chip is comprised of high efficient Buck
465	475	converters including Dual-Phase Buck converter, Buck-Boost converter,
466	476	various LDOs.

drivers/regulator/Makefile+1−0

@@ -27,6 +27,7 @@ obj-$(CONFIG_REGULATOR_DA9052) += da9052-regulator.o · 26 unmodified lines
27	27	obj-$(CONFIG_REGULATOR_DA9055) += da9055-regulator.o
28	28	obj-$(CONFIG_REGULATOR_DA9063) += da9063-regulator.o
29	29	obj-$(CONFIG_REGULATOR_DA9210) += da9210-regulator.o
	30	+obj-$(CONFIG_REGULATOR_DA9211) += da9211-regulator.o
30	31	obj-$(CONFIG_REGULATOR_DBX500_PRCMU) += dbx500-prcmu.o
31	32	obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o
32	33	obj-$(CONFIG_REGULATOR_FAN53555) += fan53555.o

drivers/regulator/ab8500.c+9−29

@@ -3037,28 +3037,12 @@ static int ab8500_regulator_register(struct platform_device *pdev, · 3036 unmodified lines
3037	3037	return 0;
3038	3038	}
3039	3039
3040		−static int
3041		−ab8500_regulator_of_probe(struct platform_device *pdev,
3042		− struct device_node *np)
3043		−{
3044		− struct of_regulator_match *match = abx500_regulator.match;
3045		− int err, i;
3046		−
3047		− for (i = 0; i < abx500_regulator.info_size; i++) {
3048		− err = ab8500_regulator_register(
3049		− pdev, match[i].init_data, i, match[i].of_node);
3050		− if (err)
3051		− return err;
3052		− }
3053		−
3054		− return 0;
3055		−}
3056		−
3057	3040	static int ab8500_regulator_probe(struct platform_device *pdev)
3058	3041	{
3059	3042	struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
3060	3043	struct device_node *np = pdev->dev.of_node;
3061		− int err;
	3044	+ struct of_regulator_match *match;
	3045	+ int err, i;
3062	3046
3063	3047	if (!ab8500) {
3064	3048	dev_err(&pdev->dev, "null mfd parent\n");
@@ -3075,24 +3059,20 @@ static int ab8500_regulator_probe(struct platform_device *pdev) · 10 unmodified lines
3075	3059	"Error parsing regulator init data: %d\n", err);
3076	3060	return err;
3077	3061	}
3078		− return ab8500_regulator_of_probe(pdev, np);
3079		−}
3080		−
3081		−static int ab8500_regulator_remove(struct platform_device *pdev)
3082		−{
3083		− int err;
3084	3062
3085		− /* remove regulator debug */
3086		− err = ab8500_regulator_debug_exit(pdev);
3087		− if (err)
3088		− return err;
	3063	+ match = abx500_regulator.match;
	3064	+ for (i = 0; i < abx500_regulator.info_size; i++) {
	3065	+ err = ab8500_regulator_register(pdev, match[i].init_data, i,
	3066	+ match[i].of_node);
	3067	+ if (err)
	3068	+ return err;
	3069	+ }
3089	3070
3090	3071	return 0;
3091	3072	}
3092	3073
3093	3074	static struct platform_driver ab8500_regulator_driver = {
3094	3075	.probe = ab8500_regulator_probe,
3095		− .remove = ab8500_regulator_remove,
3096	3076	.driver = {
3097	3077	.name = "ab8500-regulator",
3098	3078	.owner = THIS_MODULE,

drivers/regulator/act8865-regulator.c+189−140

@@ -1,6 +1,7 @@
1	1	/*
2		− * act8865-regulator.c - Voltage regulation for the active-semi ACT8865
3		− * http://www.active-semi.com/sheets/ACT8865_Datasheet.pdf
	2	+ * act8865-regulator.c - Voltage regulation for active-semi ACT88xx PMUs
	3	+ *
	4	+ * http://www.active-semi.com/products/power-management-units/act88xx/
4	5	*
5	6	* Copyright (C) 2013 Atmel Corporation
6	7	*
@@ -27,6 +28,40 @@ · 20 unmodified lines
27	28	#include <linux/regulator/of_regulator.h>
28	29	#include <linux/regmap.h>
29	30
	31	+/*
	32	+ * ACT8846 Global Register Map.
	33	+ */
	34	+#define ACT8846_SYS0 0x00
	35	+#define ACT8846_SYS1 0x01
	36	+#define ACT8846_REG1_VSET 0x10
	37	+#define ACT8846_REG1_CTRL 0x12
	38	+#define ACT8846_REG2_VSET0 0x20
	39	+#define ACT8846_REG2_VSET1 0x21
	40	+#define ACT8846_REG2_CTRL 0x22
	41	+#define ACT8846_REG3_VSET0 0x30
	42	+#define ACT8846_REG3_VSET1 0x31
	43	+#define ACT8846_REG3_CTRL 0x32
	44	+#define ACT8846_REG4_VSET0 0x40
	45	+#define ACT8846_REG4_VSET1 0x41
	46	+#define ACT8846_REG4_CTRL 0x42
	47	+#define ACT8846_REG5_VSET 0x50
	48	+#define ACT8846_REG5_CTRL 0x51
	49	+#define ACT8846_REG6_VSET 0x58
	50	+#define ACT8846_REG6_CTRL 0x59
	51	+#define ACT8846_REG7_VSET 0x60
	52	+#define ACT8846_REG7_CTRL 0x61
	53	+#define ACT8846_REG8_VSET 0x68
	54	+#define ACT8846_REG8_CTRL 0x69
	55	+#define ACT8846_REG9_VSET 0x70
	56	+#define ACT8846_REG9_CTRL 0x71
	57	+#define ACT8846_REG10_VSET 0x80
	58	+#define ACT8846_REG10_CTRL 0x81
	59	+#define ACT8846_REG11_VSET 0x90
	60	+#define ACT8846_REG11_CTRL 0x91
	61	+#define ACT8846_REG12_VSET 0xa0
	62	+#define ACT8846_REG12_CTRL 0xa1
	63	+#define ACT8846_REG13_CTRL 0xb1
	64	+
30	65	/*
31	66	* ACT8865 Global Register Map.
32	67	*/
@@ -70,7 +105,7 @@ static const struct regmap_config act8865_regmap_config = { · 37 unmodified lines
70	105	.val_bits = 8,
71	106	};
72	107
73		−static const struct regulator_linear_range act8865_volatge_ranges[] = {
	108	+static const struct regulator_linear_range act8865_voltage_ranges[] = {
74	109	REGULATOR_LINEAR_RANGE(600000, 0, 23, 25000),
75	110	REGULATOR_LINEAR_RANGE(1200000, 24, 47, 50000),
76	111	REGULATOR_LINEAR_RANGE(2400000, 48, 63, 100000),
@@ -86,114 +121,70 @@ static struct regulator_ops act8865_ops = { · 9 unmodified lines
86	121	.is_enabled = regulator_is_enabled_regmap,
87	122	};
88	123
89		−static const struct regulator_desc act8865_reg[] = {
90		− {
91		− .name = "DCDC_REG1",
92		− .id = ACT8865_ID_DCDC1,
93		− .ops = &act8865_ops,
94		− .type = REGULATOR_VOLTAGE,
95		− .n_voltages = ACT8865_VOLTAGE_NUM,
96		− .linear_ranges = act8865_volatge_ranges,
97		− .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges),
98		− .vsel_reg = ACT8865_DCDC1_VSET1,
99		− .vsel_mask = ACT8865_VSEL_MASK,
100		− .enable_reg = ACT8865_DCDC1_CTRL,
101		− .enable_mask = ACT8865_ENA,
102		− .owner = THIS_MODULE,
103		− },
104		− {
105		− .name = "DCDC_REG2",
106		− .id = ACT8865_ID_DCDC2,
107		− .ops = &act8865_ops,
108		− .type = REGULATOR_VOLTAGE,
109		− .n_voltages = ACT8865_VOLTAGE_NUM,
110		− .linear_ranges = act8865_volatge_ranges,
111		− .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges),
112		− .vsel_reg = ACT8865_DCDC2_VSET1,
113		− .vsel_mask = ACT8865_VSEL_MASK,
114		− .enable_reg = ACT8865_DCDC2_CTRL,
115		− .enable_mask = ACT8865_ENA,
116		− .owner = THIS_MODULE,
117		− },
118		− {
119		− .name = "DCDC_REG3",
120		− .id = ACT8865_ID_DCDC3,
121		− .ops = &act8865_ops,
122		− .type = REGULATOR_VOLTAGE,
123		− .n_voltages = ACT8865_VOLTAGE_NUM,
124		− .linear_ranges = act8865_volatge_ranges,
125		− .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges),
126		− .vsel_reg = ACT8865_DCDC3_VSET1,
127		− .vsel_mask = ACT8865_VSEL_MASK,
128		− .enable_reg = ACT8865_DCDC3_CTRL,
129		− .enable_mask = ACT8865_ENA,
130		− .owner = THIS_MODULE,
131		− },
132		− {
133		− .name = "LDO_REG1",
134		− .id = ACT8865_ID_LDO1,
135		− .ops = &act8865_ops,
136		− .type = REGULATOR_VOLTAGE,
137		− .n_voltages = ACT8865_VOLTAGE_NUM,
138		− .linear_ranges = act8865_volatge_ranges,
139		− .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges),
140		− .vsel_reg = ACT8865_LDO1_VSET,
141		− .vsel_mask = ACT8865_VSEL_MASK,
142		− .enable_reg = ACT8865_LDO1_CTRL,
143		− .enable_mask = ACT8865_ENA,
144		− .owner = THIS_MODULE,
145		− },
146		− {
147		− .name = "LDO_REG2",
148		− .id = ACT8865_ID_LDO2,
149		− .ops = &act8865_ops,
150		− .type = REGULATOR_VOLTAGE,
151		− .n_voltages = ACT8865_VOLTAGE_NUM,
152		− .linear_ranges = act8865_volatge_ranges,
153		− .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges),
154		− .vsel_reg = ACT8865_LDO2_VSET,
155		− .vsel_mask = ACT8865_VSEL_MASK,
156		− .enable_reg = ACT8865_LDO2_CTRL,
157		− .enable_mask = ACT8865_ENA,
158		− .owner = THIS_MODULE,
159		− },
160		− {
161		− .name = "LDO_REG3",
162		− .id = ACT8865_ID_LDO3,
163		− .ops = &act8865_ops,
164		− .type = REGULATOR_VOLTAGE,
165		− .n_voltages = ACT8865_VOLTAGE_NUM,
166		− .linear_ranges = act8865_volatge_ranges,
167		− .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges),
168		− .vsel_reg = ACT8865_LDO3_VSET,
169		− .vsel_mask = ACT8865_VSEL_MASK,
170		− .enable_reg = ACT8865_LDO3_CTRL,
171		− .enable_mask = ACT8865_ENA,
172		− .owner = THIS_MODULE,
173		− },
174		− {
175		− .name = "LDO_REG4",
176		− .id = ACT8865_ID_LDO4,
177		− .ops = &act8865_ops,
178		− .type = REGULATOR_VOLTAGE,
179		− .n_voltages = ACT8865_VOLTAGE_NUM,
180		− .linear_ranges = act8865_volatge_ranges,
181		− .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges),
182		− .vsel_reg = ACT8865_LDO4_VSET,
183		− .vsel_mask = ACT8865_VSEL_MASK,
184		− .enable_reg = ACT8865_LDO4_CTRL,
185		− .enable_mask = ACT8865_ENA,
186		− .owner = THIS_MODULE,
187		− },
	124	+#define ACT88xx_REG(_name, _family, _id, _vsel_reg) \
	125	+ [_family##_ID_##_id] = { \
	126	+ .name = _name, \
	127	+ .id = _family##_ID_##_id, \
	128	+ .type = REGULATOR_VOLTAGE, \
	129	+ .ops = &act8865_ops, \
	130	+ .n_voltages = ACT8865_VOLTAGE_NUM, \
	131	+ .linear_ranges = act8865_voltage_ranges, \
	132	+ .n_linear_ranges = ARRAY_SIZE(act8865_voltage_ranges), \
	133	+ .vsel_reg = _family##_##_id##_##_vsel_reg, \
	134	+ .vsel_mask = ACT8865_VSEL_MASK, \
	135	+ .enable_reg = _family##_##_id##_CTRL, \
	136	+ .enable_mask = ACT8865_ENA, \
	137	+ .owner = THIS_MODULE, \
	138	+ }
	139	+
	140	+static const struct regulator_desc act8846_regulators[] = {
	141	+ ACT88xx_REG("REG1", ACT8846, REG1, VSET),
	142	+ ACT88xx_REG("REG2", ACT8846, REG2, VSET0),
	143	+ ACT88xx_REG("REG3", ACT8846, REG3, VSET0),
	144	+ ACT88xx_REG("REG4", ACT8846, REG4, VSET0),
	145	+ ACT88xx_REG("REG5", ACT8846, REG5, VSET),
	146	+ ACT88xx_REG("REG6", ACT8846, REG6, VSET),
	147	+ ACT88xx_REG("REG7", ACT8846, REG7, VSET),
	148	+ ACT88xx_REG("REG8", ACT8846, REG8, VSET),
	149	+ ACT88xx_REG("REG9", ACT8846, REG9, VSET),
	150	+ ACT88xx_REG("REG10", ACT8846, REG10, VSET),
	151	+ ACT88xx_REG("REG11", ACT8846, REG11, VSET),
	152	+ ACT88xx_REG("REG12", ACT8846, REG12, VSET),
	153	+};
	154	+
	155	+static const struct regulator_desc act8865_regulators[] = {
	156	+ ACT88xx_REG("DCDC_REG1", ACT8865, DCDC1, VSET1),
	157	+ ACT88xx_REG("DCDC_REG2", ACT8865, DCDC2, VSET1),
	158	+ ACT88xx_REG("DCDC_REG3", ACT8865, DCDC3, VSET1),
	159	+ ACT88xx_REG("LDO_REG1", ACT8865, LDO1, VSET),
	160	+ ACT88xx_REG("LDO_REG2", ACT8865, LDO2, VSET),
	161	+ ACT88xx_REG("LDO_REG3", ACT8865, LDO3, VSET),
	162	+ ACT88xx_REG("LDO_REG4", ACT8865, LDO4, VSET),
188	163	};
189	164
190	165	#ifdef CONFIG_OF
191	166	static const struct of_device_id act8865_dt_ids[] = {
192		− { .compatible = "active-semi,act8865" },
	167	+ { .compatible = "active-semi,act8846", .data = (void *)ACT8846 },
	168	+ { .compatible = "active-semi,act8865", .data = (void *)ACT8865 },
193	169	{ }
194	170	};
195	171	MODULE_DEVICE_TABLE(of, act8865_dt_ids);
196	172
	173	+static struct of_regulator_match act8846_matches[] = {
	174	+ [ACT8846_ID_REG1] = { .name = "REG1" },
	175	+ [ACT8846_ID_REG2] = { .name = "REG2" },
	176	+ [ACT8846_ID_REG3] = { .name = "REG3" },
	177	+ [ACT8846_ID_REG4] = { .name = "REG4" },
	178	+ [ACT8846_ID_REG5] = { .name = "REG5" },
	179	+ [ACT8846_ID_REG6] = { .name = "REG6" },
	180	+ [ACT8846_ID_REG7] = { .name = "REG7" },
	181	+ [ACT8846_ID_REG8] = { .name = "REG8" },
	182	+ [ACT8846_ID_REG9] = { .name = "REG9" },
	183	+ [ACT8846_ID_REG10] = { .name = "REG10" },
	184	+ [ACT8846_ID_REG11] = { .name = "REG11" },
	185	+ [ACT8846_ID_REG12] = { .name = "REG12" },
	186	+};
	187	+
197	188	static struct of_regulator_match act8865_matches[] = {
198	189	[ACT8865_ID_DCDC1] = { .name = "DCDC_REG1"},
199	190	[ACT8865_ID_DCDC2] = { .name = "DCDC_REG2"},
@@ -206,11 +197,13 @@ static struct of_regulator_match act8865_matches[] = { · 6 unmodified lines
206	197
207	198	static int act8865_pdata_from_dt(struct device *dev,
208	199	struct device_node **of_node,
209		− struct act8865_platform_data *pdata)
	200	+ struct act8865_platform_data *pdata,
	201	+ unsigned long type)
210	202	{
211		− int matched, i;
	203	+ int matched, i, num_matches;
212	204	struct device_node *np;
213	205	struct act8865_regulator_data *regulator;
	206	+ struct of_regulator_match *matches;
214	207
215	208	np = of_get_child_by_name(dev->of_node, "regulators");
216	209	if (!np) {
@@ -218,26 +211,39 @@ static int act8865_pdata_from_dt(struct device *dev, · 1 unmodified line
218	211	return -EINVAL;
219	212	}
220	213
221		− matched = of_regulator_match(dev, np,
222		− act8865_matches, ARRAY_SIZE(act8865_matches));
	214	+ switch (type) {
	215	+ case ACT8846:
	216	+ matches = act8846_matches;
	217	+ num_matches = ARRAY_SIZE(act8846_matches);
	218	+ break;
	219	+ case ACT8865:
	220	+ matches = act8865_matches;
	221	+ num_matches = ARRAY_SIZE(act8865_matches);
	222	+ break;
	223	+ default:
	224	+ dev_err(dev, "invalid device id %lu\n", type);
	225	+ return -EINVAL;
	226	+ }
	227	+
	228	+ matched = of_regulator_match(dev, np, matches, num_matches);
223	229	of_node_put(np);
224	230	if (matched <= 0)
225	231	return matched;
226	232
227	233	pdata->regulators = devm_kzalloc(dev,
228		− sizeof(struct act8865_regulator_data) *
229		− ARRAY_SIZE(act8865_matches), GFP_KERNEL);
	234	+ sizeof(struct act8865_regulator_data) *
	235	+ num_matches, GFP_KERNEL);
230	236	if (!pdata->regulators)
231	237	return -ENOMEM;
232	238
233		− pdata->num_regulators = matched;
	239	+ pdata->num_regulators = num_matches;
234	240	regulator = pdata->regulators;
235	241
236		− for (i = 0; i < ARRAY_SIZE(act8865_matches); i++) {
	242	+ for (i = 0; i < num_matches; i++) {
237	243	regulator->id = i;
238		− regulator->name = act8865_matches[i].name;
239		− regulator->platform_data = act8865_matches[i].init_data;
240		− of_node[i] = act8865_matches[i].of_node;
	244	+ regulator->name = matches[i].name;
	245	+ regulator->platform_data = matches[i].init_data;
	246	+ of_node[i] = matches[i].of_node;
241	247	regulator++;
242	248	}
243	249
@@ -246,42 +252,84 @@ static int act8865_pdata_from_dt(struct device *dev, · 2 unmodified lines
246	252	#else
247	253	static inline int act8865_pdata_from_dt(struct device *dev,
248	254	struct device_node **of_node,
249		− struct act8865_platform_data *pdata)
	255	+ struct act8865_platform_data *pdata,
	256	+ unsigned long type)
250	257	{
251	258	return 0;
252	259	}
253	260	#endif
254	261
	262	+static struct regulator_init_data
	263	+act8865_get_init_data(int id, struct act8865_platform_data pdata)
	264	+{
	265	+ int i;
	266	+
	267	+ if (!pdata)
	268	+ return NULL;
	269	+
	270	+ for (i = 0; i < pdata->num_regulators; i++) {
	271	+ if (pdata->regulators[i].id == id)
	272	+ return pdata->regulators[i].platform_data;
	273	+ }
	274	+
	275	+ return NULL;
	276	+}
	277	+
255	278	static int act8865_pmic_probe(struct i2c_client *client,
256		− const struct i2c_device_id *i2c_id)
	279	+ const struct i2c_device_id *i2c_id)
257	280	{
258		− struct regulator_dev *rdev;
	281	+ static const struct regulator_desc *regulators;
	282	+ struct act8865_platform_data pdata_of, *pdata;
259	283	struct device *dev = &client->dev;
260		− struct act8865_platform_data *pdata = dev_get_platdata(dev);
261		− struct regulator_config config = { };
	284	+ struct device_node **of_node;
	285	+ int i, ret, num_regulators;
262	286	struct act8865 *act8865;
263		− struct device_node *of_node[ACT8865_REG_NUM];
264		− int i, id;
265		− int ret = -EINVAL;
266		− int error;
	287	+ unsigned long type;
	288	+
	289	+ pdata = dev_get_platdata(dev);
267	290
268	291	if (dev->of_node && !pdata) {
269	292	const struct of_device_id *id;
270		− struct act8865_platform_data pdata_of;
271	293
272	294	id = of_match_device(of_match_ptr(act8865_dt_ids), dev);
273	295	if (!id)
274	296	return -ENODEV;
275	297
276		− ret = act8865_pdata_from_dt(dev, of_node, &pdata_of);
	298	+ type = (unsigned long) id->data;
	299	+ } else {
	300	+ type = i2c_id->driver_data;
	301	+ }
	302	+
	303	+ switch (type) {
	304	+ case ACT8846:
	305	+ regulators = act8846_regulators;
	306	+ num_regulators = ARRAY_SIZE(act8846_regulators);
	307	+ break;
	308	+ case ACT8865:
	309	+ regulators = act8865_regulators;
	310	+ num_regulators = ARRAY_SIZE(act8865_regulators);
	311	+ break;
	312	+ default:
	313	+ dev_err(dev, "invalid device id %lu\n", type);
	314	+ return -EINVAL;
	315	+ }
	316	+
	317	+ of_node = devm_kzalloc(dev, sizeof(struct device_node )
	318	+ num_regulators, GFP_KERNEL);
	319	+ if (!of_node)
	320	+ return -ENOMEM;
	321	+
	322	+ if (dev->of_node && !pdata) {
	323	+ ret = act8865_pdata_from_dt(dev, of_node, &pdata_of, type);
277	324	if (ret < 0)
278	325	return ret;
279	326
280	327	pdata = &pdata_of;
281	328	}
282	329
283		− if (pdata->num_regulators > ACT8865_REG_NUM) {
284		− dev_err(dev, "Too many regulators found!\n");
	330	+ if (pdata->num_regulators > num_regulators) {
	331	+ dev_err(dev, "too many regulators: %d\n",
	332	+ pdata->num_regulators);
285	333	return -EINVAL;
286	334	}
287	335
@@ -291,39 +339,40 @@ static int act8865_pmic_probe(struct i2c_client *client, · 3 unmodified lines
291	339
292	340	act8865->regmap = devm_regmap_init_i2c(client, &act8865_regmap_config);
293	341	if (IS_ERR(act8865->regmap)) {
294		− error = PTR_ERR(act8865->regmap);
	342	+ ret = PTR_ERR(act8865->regmap);
295	343	dev_err(&client->dev, "Failed to allocate register map: %d\n",
296		− error);
297		− return error;
	344	+ ret);
	345	+ return ret;
298	346	}
299	347
300	348	/* Finally register devices */
301		− for (i = 0; i < ACT8865_REG_NUM; i++) {
302		−
303		− id = pdata->regulators[i].id;
	349	+ for (i = 0; i < num_regulators; i++) {
	350	+ const struct regulator_desc *desc = &regulators[i];
	351	+ struct regulator_config config = { };
	352	+ struct regulator_dev *rdev;
304	353
305	354	config.dev = dev;
306		− config.init_data = pdata->regulators[i].platform_data;
	355	+ config.init_data = act8865_get_init_data(desc->id, pdata);
307	356	config.of_node = of_node[i];
308	357	config.driver_data = act8865;
309	358	config.regmap = act8865->regmap;
310	359
311		− rdev = devm_regulator_register(&client->dev, &act8865_reg[i],
312		− &config);
	360	+ rdev = devm_regulator_register(&client->dev, desc, &config);
313	361	if (IS_ERR(rdev)) {
314		− dev_err(dev, "failed to register %s\n",
315		− act8865_reg[id].name);
	362	+ dev_err(dev, "failed to register %s\n", desc->name);
316	363	return PTR_ERR(rdev);
317	364	}
318	365	}
319	366
320	367	i2c_set_clientdata(client, act8865);
	368	+ devm_kfree(dev, of_node);
321	369
322	370	return 0;
323	371	}
324	372
325	373	static const struct i2c_device_id act8865_ids[] = {
326		− { "act8865", 0 },
	374	+ { .name = "act8846", .driver_data = ACT8846 },
	375	+ { .name = "act8865", .driver_data = ACT8865 },
327	376	{ },
328	377	};
329	378	MODULE_DEVICE_TABLE(i2c, act8865_ids);
@@ -339,6 +388,6 @@ static struct i2c_driver act8865_pmic_driver = { · 9 unmodified lines
339	388
340	389	module_i2c_driver(act8865_pmic_driver);
341	390
342		−MODULE_DESCRIPTION("active-semi act8865 voltage regulator driver");
	391	+MODULE_DESCRIPTION("active-semi act88xx voltage regulator driver");
343	392	MODULE_AUTHOR("Wenyou Yang <wenyou.yang@atmel.com>");
344	393	MODULE_LICENSE("GPL v2");

drivers/regulator/arizona-ldo1.c+0−2

@@ -143,8 +143,6 @@ static struct regulator_ops arizona_ldo1_ops = { · 142 unmodified lines
143	143	.map_voltage = regulator_map_voltage_linear,
144	144	.get_voltage_sel = regulator_get_voltage_sel_regmap,
145	145	.set_voltage_sel = regulator_set_voltage_sel_regmap,
146		− .get_bypass = regulator_get_bypass_regmap,
147		− .set_bypass = regulator_set_bypass_regmap,
148	146	};
149	147
150	148	static const struct regulator_desc arizona_ldo1 = {

drivers/regulator/as3722-regulator.c+2−2

@@ -219,7 +219,7 @@ static const struct as3722_register_mapping as3722_reg_lookup[] = { · 218 unmodified lines
219	219	{
220	220	.regulator_id = AS3722_REGULATOR_ID_LDO3,
221	221	.name = "as3722-ldo3",
222		− .name = "vin-ldo3-4",
	222	+ .sname = "vin-ldo3-4",
223	223	.vsel_reg = AS3722_LDO3_VOLTAGE_REG,
224	224	.vsel_mask = AS3722_LDO3_VSEL_MASK,
225	225	.enable_reg = AS3722_LDOCONTROL0_REG,
@@ -231,7 +231,7 @@ static const struct as3722_register_mapping as3722_reg_lookup[] = { · 5 unmodified lines
231	231	{
232	232	.regulator_id = AS3722_REGULATOR_ID_LDO4,
233	233	.name = "as3722-ldo4",
234		− .name = "vin-ldo3-4",
	234	+ .sname = "vin-ldo3-4",
235	235	.vsel_reg = AS3722_LDO4_VOLTAGE_REG,
236	236	.vsel_mask = AS3722_LDO_VSEL_MASK,
237	237	.enable_reg = AS3722_LDOCONTROL0_REG,

drivers/regulator/bcm590xx-regulator.c+4−12

@@ -331,10 +331,8 @@ static struct bcm590xx_board *bcm590xx_parse_dt_reg_data( · 330 unmodified lines
331	331	}
332	332
333	333	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
334		− if (!data) {
335		− dev_err(&pdev->dev, "failed to allocate regulator board data\n");
	334	+ if (!data)
336	335	return NULL;
337		− }
338	336
339	337	np = of_node_get(np);
340	338	regulators = of_get_child_by_name(np, "regulators");
@@ -379,10 +377,8 @@ static int bcm590xx_probe(struct platform_device *pdev) · 38 unmodified lines
379	377	&bcm590xx_reg_matches);
380	378
381	379	pmu = devm_kzalloc(&pdev->dev, sizeof(*pmu), GFP_KERNEL);
382		− if (!pmu) {
383		− dev_err(&pdev->dev, "Memory allocation failed for pmu\n");
	380	+ if (!pmu)
384	381	return -ENOMEM;
385		− }
386	382
387	383	pmu->mfd = bcm590xx;
388	384
@@ -390,17 +386,13 @@ static int bcm590xx_probe(struct platform_device *pdev) · 1 unmodified line
390	386
391	387	pmu->desc = devm_kzalloc(&pdev->dev, BCM590XX_NUM_REGS *
392	388	sizeof(struct regulator_desc), GFP_KERNEL);
393		− if (!pmu->desc) {
394		− dev_err(&pdev->dev, "Memory alloc fails for desc\n");
	389	+ if (!pmu->desc)
395	390	return -ENOMEM;
396		− }
397	391
398	392	pmu->info = devm_kzalloc(&pdev->dev, BCM590XX_NUM_REGS *
399	393	sizeof(struct bcm590xx_info *), GFP_KERNEL);
400		− if (!pmu->info) {
401		− dev_err(&pdev->dev, "Memory alloc fails for info\n");
	394	+ if (!pmu->info)
402	395	return -ENOMEM;
403		− }
404	396
405	397	info = bcm590xx_regs;
406	398

drivers/regulator/core.c+108−18

@@ -24,6 +24,7 @@ · 23 unmodified lines
24	24	#include <linux/suspend.h>
25	25	#include <linux/delay.h>
26	26	#include <linux/gpio.h>
	27	+#include <linux/gpio/consumer.h>
27	28	#include <linux/of.h>
28	29	#include <linux/regmap.h>
29	30	#include <linux/regulator/of_regulator.h>
@@ -77,7 +78,7 @@ struct regulator_map { · 47 unmodified lines
77	78	*/
78	79	struct regulator_enable_gpio {
79	80	struct list_head list;
80		− int gpio;
	81	+ struct gpio_desc *gpiod;
81	82	u32 enable_count; /* a number of enabled shared GPIO */
82	83	u32 request_count; /* a number of requested shared GPIO */
83	84	unsigned int ena_gpio_invert:1;
@@ -846,7 +847,9 @@ static int machine_constraints_voltage(struct regulator_dev *rdev, · 762 unmodified lines
846	847	rdev->constraints->min_uV == rdev->constraints->max_uV) {
847	848	int current_uV = _regulator_get_voltage(rdev);
848	849	if (current_uV < 0) {
849		− rdev_err(rdev, "failed to get the current voltage\n");
	850	+ rdev_err(rdev,
	851	+ "failed to get the current voltage(%d)\n",
	852	+ current_uV);
850	853	return current_uV;
851	854	}
852	855	if (current_uV < rdev->constraints->min_uV \|\|
@@ -856,8 +859,8 @@ static int machine_constraints_voltage(struct regulator_dev *rdev, · 3 unmodified lines
856	859	rdev->constraints->max_uV);
857	860	if (ret < 0) {
858	861	rdev_err(rdev,
859		− "failed to apply %duV constraint\n",
860		− rdev->constraints->min_uV);
	862	+ "failed to apply %duV constraint(%d)\n",
	863	+ rdev->constraints->min_uV, ret);
861	864	return ret;
862	865	}
863	866	}
@@ -1660,10 +1663,13 @@ static int regulator_ena_gpio_request(struct regulator_dev *rdev, · 796 unmodified lines
1660	1663	const struct regulator_config *config)
1661	1664	{
1662	1665	struct regulator_enable_gpio *pin;
	1666	+ struct gpio_desc *gpiod;
1663	1667	int ret;
1664	1668
	1669	+ gpiod = gpio_to_desc(config->ena_gpio);
	1670	+
1665	1671	list_for_each_entry(pin, &regulator_ena_gpio_list, list) {
1666		− if (pin->gpio == config->ena_gpio) {
	1672	+ if (pin->gpiod == gpiod) {
1667	1673	rdev_dbg(rdev, "GPIO %d is already used\n",
1668	1674	config->ena_gpio);
1669	1675	goto update_ena_gpio_to_rdev;
@@ -1682,7 +1688,7 @@ static int regulator_ena_gpio_request(struct regulator_dev *rdev, · 12 unmodified lines
1682	1688	return -ENOMEM;
1683	1689	}
1684	1690
1685		− pin->gpio = config->ena_gpio;
	1691	+ pin->gpiod = gpiod;
1686	1692	pin->ena_gpio_invert = config->ena_gpio_invert;
1687	1693	list_add(&pin->list, &regulator_ena_gpio_list);
1688	1694
@@ -1701,10 +1707,10 @@ static void regulator_ena_gpio_free(struct regulator_dev *rdev) · 12 unmodified lines
1701	1707
1702	1708	/* Free the GPIO only in case of no use */
1703	1709	list_for_each_entry_safe(pin, n, &regulator_ena_gpio_list, list) {
1704		− if (pin->gpio == rdev->ena_pin->gpio) {
	1710	+ if (pin->gpiod == rdev->ena_pin->gpiod) {
1705	1711	if (pin->request_count <= 1) {
1706	1712	pin->request_count = 0;
1707		− gpio_free(pin->gpio);
	1713	+ gpiod_put(pin->gpiod);
1708	1714	list_del(&pin->list);
1709	1715	kfree(pin);
1710	1716	} else {
@@ -1732,8 +1738,8 @@ static int regulator_ena_gpio_ctrl(struct regulator_dev *rdev, bool enable) · 21 unmodified lines
1732	1738	if (enable) {
1733	1739	/* Enable GPIO at initial use */
1734	1740	if (pin->enable_count == 0)
1735		− gpio_set_value_cansleep(pin->gpio,
1736		− !pin->ena_gpio_invert);
	1741	+ gpiod_set_value_cansleep(pin->gpiod,
	1742	+ !pin->ena_gpio_invert);
1737	1743
1738	1744	pin->enable_count++;
1739	1745	} else {
@@ -1744,8 +1750,8 @@ static int regulator_ena_gpio_ctrl(struct regulator_dev *rdev, bool enable) · 4 unmodified lines
1744	1750
1745	1751	/* Disable GPIO if not used */
1746	1752	if (pin->enable_count <= 1) {
1747		− gpio_set_value_cansleep(pin->gpio,
1748		− pin->ena_gpio_invert);
	1753	+ gpiod_set_value_cansleep(pin->gpiod,
	1754	+ pin->ena_gpio_invert);
1749	1755	pin->enable_count = 0;
1750	1756	}
1751	1757	}
@@ -2180,7 +2186,13 @@ int regulator_count_voltages(struct regulator *regulator) · 428 unmodified lines
2180	2186	{
2181	2187	struct regulator_dev *rdev = regulator->rdev;
2182	2188
2183		− return rdev->desc->n_voltages ? : -EINVAL;
	2189	+ if (rdev->desc->n_voltages)
	2190	+ return rdev->desc->n_voltages;
	2191	+
	2192	+ if (!rdev->supply)
	2193	+ return -EINVAL;
	2194	+
	2195	+ return regulator_count_voltages(rdev->supply);
2184	2196	}
2185	2197	EXPORT_SYMBOL_GPL(regulator_count_voltages);
2186	2198
@@ -2203,12 +2215,17 @@ int regulator_list_voltage(struct regulator *regulator, unsigned selector) · 16 unmodified lines
2203	2215	if (rdev->desc->fixed_uV && rdev->desc->n_voltages == 1 && !selector)
2204	2216	return rdev->desc->fixed_uV;
2205	2217
2206		− if (!ops->list_voltage \|\| selector >= rdev->desc->n_voltages)
	2218	+ if (ops->list_voltage) {
	2219	+ if (selector >= rdev->desc->n_voltages)
	2220	+ return -EINVAL;
	2221	+ mutex_lock(&rdev->mutex);
	2222	+ ret = ops->list_voltage(rdev, selector);
	2223	+ mutex_unlock(&rdev->mutex);
	2224	+ } else if (rdev->supply) {
	2225	+ ret = regulator_list_voltage(rdev->supply, selector);
	2226	+ } else {
2207	2227	return -EINVAL;
2208		−
2209		− mutex_lock(&rdev->mutex);
2210		− ret = ops->list_voltage(rdev, selector);
2211		− mutex_unlock(&rdev->mutex);
	2228	+ }
2212	2229
2213	2230	if (ret > 0) {
2214	2231	if (ret < rdev->constraints->min_uV)
@@ -2221,6 +2238,77 @@ int regulator_list_voltage(struct regulator *regulator, unsigned selector) · 6 unmodified lines
2221	2238	}
2222	2239	EXPORT_SYMBOL_GPL(regulator_list_voltage);
2223	2240
	2241	+/**
	2242	+ * regulator_get_regmap - get the regulator's register map
	2243	+ * @regulator: regulator source
	2244	+ *
	2245	+ * Returns the register map for the given regulator, or an ERR_PTR value
	2246	+ * if the regulator doesn't use regmap.
	2247	+ */
	2248	+struct regmap regulator_get_regmap(struct regulator regulator)
	2249	+{
	2250	+ struct regmap *map = regulator->rdev->regmap;
	2251	+
	2252	+ return map ? map : ERR_PTR(-EOPNOTSUPP);
	2253	+}
	2254	+
	2255	+/**
	2256	+ * regulator_get_hardware_vsel_register - get the HW voltage selector register
	2257	+ * @regulator: regulator source
	2258	+ * @vsel_reg: voltage selector register, output parameter
	2259	+ * @vsel_mask: mask for voltage selector bitfield, output parameter
	2260	+ *
	2261	+ * Returns the hardware register offset and bitmask used for setting the
	2262	+ * regulator voltage. This might be useful when configuring voltage-scaling
	2263	+ * hardware or firmware that can make I2C requests behind the kernel's back,
	2264	+ * for example.
	2265	+ *
	2266	+ * On success, the output parameters @vsel_reg and @vsel_mask are filled in
	2267	+ * and 0 is returned, otherwise a negative errno is returned.
	2268	+ */
	2269	+int regulator_get_hardware_vsel_register(struct regulator *regulator,
	2270	+ unsigned *vsel_reg,
	2271	+ unsigned *vsel_mask)
	2272	+{
	2273	+ struct regulator_dev *rdev = regulator->rdev;
	2274	+ struct regulator_ops *ops = rdev->desc->ops;
	2275	+
	2276	+ if (ops->set_voltage_sel != regulator_set_voltage_sel_regmap)
	2277	+ return -EOPNOTSUPP;
	2278	+
	2279	+ *vsel_reg = rdev->desc->vsel_reg;
	2280	+ *vsel_mask = rdev->desc->vsel_mask;
	2281	+
	2282	+ return 0;
	2283	+}
	2284	+EXPORT_SYMBOL_GPL(regulator_get_hardware_vsel_register);
	2285	+
	2286	+/**
	2287	+ * regulator_list_hardware_vsel - get the HW-specific register value for a selector
	2288	+ * @regulator: regulator source
	2289	+ * @selector: identify voltage to list
	2290	+ *
	2291	+ * Converts the selector to a hardware-specific voltage selector that can be
	2292	+ * directly written to the regulator registers. The address of the voltage
	2293	+ * register can be determined by calling @regulator_get_hardware_vsel_register.
	2294	+ *
	2295	+ * On error a negative errno is returned.
	2296	+ */
	2297	+int regulator_list_hardware_vsel(struct regulator *regulator,
	2298	+ unsigned selector)
	2299	+{
	2300	+ struct regulator_dev *rdev = regulator->rdev;
	2301	+ struct regulator_ops *ops = rdev->desc->ops;
	2302	+
	2303	+ if (selector >= rdev->desc->n_voltages)
	2304	+ return -EINVAL;
	2305	+ if (ops->set_voltage_sel != regulator_set_voltage_sel_regmap)
	2306	+ return -EOPNOTSUPP;
	2307	+
	2308	+ return selector;
	2309	+}
	2310	+EXPORT_SYMBOL_GPL(regulator_list_hardware_vsel);
	2311	+
2224	2312	/**
2225	2313	* regulator_get_linear_step - return the voltage step size between VSEL values
2226	2314	* @regulator: regulator source
@@ -2618,6 +2706,8 @@ static int _regulator_get_voltage(struct regulator_dev *rdev) · 391 unmodified lines
2618	2706	ret = rdev->desc->ops->list_voltage(rdev, 0);
2619	2707	} else if (rdev->desc->fixed_uV && (rdev->desc->n_voltages == 1)) {
2620	2708	ret = rdev->desc->fixed_uV;
	2709	+ } else if (rdev->supply) {
	2710	+ ret = regulator_get_voltage(rdev->supply);
2621	2711	} else {
2622	2712	return -EINVAL;
2623	2713	}

drivers/regulator/da9211-regulator.c+368−0

@@ -0,0 +1,368 @@
	1	+/*
	2	+ * da9211-regulator.c - Regulator device driver for DA9211
	3	+ * Copyright (C) 2014 Dialog Semiconductor Ltd.
	4	+ *
	5	+ * This library is free software; you can redistribute it and/or
	6	+ * modify it under the terms of the GNU Library General Public
	7	+ * License as published by the Free Software Foundation; either
	8	+ * version 2 of the License, or (at your option) any later version.
	9	+ *
	10	+ * This library is distributed in the hope that it will be useful,
	11	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	+ * Library General Public License for more details.
	14	+ */
	15	+
	16	+#include <linux/err.h>
	17	+#include <linux/gpio.h>
	18	+#include <linux/i2c.h>
	19	+#include <linux/module.h>
	20	+#include <linux/init.h>
	21	+#include <linux/slab.h>
	22	+#include <linux/regulator/driver.h>
	23	+#include <linux/regulator/machine.h>
	24	+#include <linux/regmap.h>
	25	+#include <linux/irq.h>
	26	+#include <linux/interrupt.h>
	27	+#include <linux/regulator/da9211.h>
	28	+#include "da9211-regulator.h"
	29	+
	30	+#define DA9211_BUCK_MODE_SLEEP 1
	31	+#define DA9211_BUCK_MODE_SYNC 2
	32	+#define DA9211_BUCK_MODE_AUTO 3
	33	+
	34	+/* DA9211 REGULATOR IDs */
	35	+#define DA9211_ID_BUCKA 0
	36	+#define DA9211_ID_BUCKB 1
	37	+
	38	+struct da9211 {
	39	+ struct device *dev;
	40	+ struct regmap *regmap;
	41	+ struct da9211_pdata *pdata;
	42	+ struct regulator_dev *rdev[DA9211_MAX_REGULATORS];
	43	+ int num_regulator;
	44	+ int chip_irq;
	45	+};
	46	+
	47	+static const struct regmap_range_cfg da9211_regmap_range[] = {
	48	+ {
	49	+ .selector_reg = DA9211_REG_PAGE_CON,
	50	+ .selector_mask = DA9211_REG_PAGE_MASK,
	51	+ .selector_shift = DA9211_REG_PAGE_SHIFT,
	52	+ .window_start = 0,
	53	+ .window_len = 256,
	54	+ .range_min = 0,
	55	+ .range_max = 2*256,
	56	+ },
	57	+};
	58	+
	59	+static const struct regmap_config da9211_regmap_config = {
	60	+ .reg_bits = 8,
	61	+ .val_bits = 8,
	62	+ .max_register = 2 * 256,
	63	+ .ranges = da9211_regmap_range,
	64	+ .num_ranges = ARRAY_SIZE(da9211_regmap_range),
	65	+};
	66	+
	67	+/* Default limits measured in millivolts and milliamps */
	68	+#define DA9211_MIN_MV 300
	69	+#define DA9211_MAX_MV 1570
	70	+#define DA9211_STEP_MV 10
	71	+
	72	+/* Current limits for buck (uA) indices corresponds with register values */
	73	+static const int da9211_current_limits[] = {
	74	+ 2000000, 2200000, 2400000, 2600000, 2800000, 3000000, 3200000, 3400000,
	75	+ 3600000, 3800000, 4000000, 4200000, 4400000, 4600000, 4800000, 5000000
	76	+};
	77	+
	78	+static unsigned int da9211_buck_get_mode(struct regulator_dev *rdev)
	79	+{
	80	+ int id = rdev_get_id(rdev);
	81	+ struct da9211 *chip = rdev_get_drvdata(rdev);
	82	+ unsigned int data;
	83	+ int ret, mode = 0;
	84	+
	85	+ ret = regmap_read(chip->regmap, DA9211_REG_BUCKA_CONF+id, &data);
	86	+ if (ret < 0)
	87	+ return ret;
	88	+
	89	+ switch (data & 0x03) {
	90	+ case DA9211_BUCK_MODE_SYNC:
	91	+ mode = REGULATOR_MODE_FAST;
	92	+ break;
	93	+ case DA9211_BUCK_MODE_AUTO:
	94	+ mode = REGULATOR_MODE_NORMAL;
	95	+ break;
	96	+ case DA9211_BUCK_MODE_SLEEP:
	97	+ mode = REGULATOR_MODE_STANDBY;
	98	+ break;
	99	+ }
	100	+
	101	+ return mode;
	102	+}
	103	+
	104	+static int da9211_buck_set_mode(struct regulator_dev *rdev,
	105	+ unsigned int mode)
	106	+{
	107	+ int id = rdev_get_id(rdev);
	108	+ struct da9211 *chip = rdev_get_drvdata(rdev);
	109	+ int val = 0;
	110	+
	111	+ switch (mode) {
	112	+ case REGULATOR_MODE_FAST:
	113	+ val = DA9211_BUCK_MODE_SYNC;
	114	+ break;
	115	+ case REGULATOR_MODE_NORMAL:
	116	+ val = DA9211_BUCK_MODE_AUTO;
	117	+ break;
	118	+ case REGULATOR_MODE_STANDBY:
	119	+ val = DA9211_BUCK_MODE_SLEEP;
	120	+ break;
	121	+ }
	122	+
	123	+ return regmap_update_bits(chip->regmap, DA9211_REG_BUCKA_CONF+id,
	124	+ 0x03, val);
	125	+}
	126	+
	127	+static int da9211_set_current_limit(struct regulator_dev *rdev, int min,
	128	+ int max)
	129	+{
	130	+ int id = rdev_get_id(rdev);
	131	+ struct da9211 *chip = rdev_get_drvdata(rdev);
	132	+ int i;
	133	+
	134	+ /* search for closest to maximum */
	135	+ for (i = ARRAY_SIZE(da9211_current_limits)-1; i >= 0; i--) {
	136	+ if (min <= da9211_current_limits[i] &&
	137	+ max >= da9211_current_limits[i]) {
	138	+ return regmap_update_bits(chip->regmap,
	139	+ DA9211_REG_BUCK_ILIM,
	140	+ (0x0F << id4), (i << id4));
	141	+ }
	142	+ }
	143	+
	144	+ return -EINVAL;
	145	+}
	146	+
	147	+static int da9211_get_current_limit(struct regulator_dev *rdev)
	148	+{
	149	+ int id = rdev_get_id(rdev);
	150	+ struct da9211 *chip = rdev_get_drvdata(rdev);
	151	+ unsigned int data;
	152	+ int ret;
	153	+
	154	+ ret = regmap_read(chip->regmap, DA9211_REG_BUCK_ILIM, &data);
	155	+ if (ret < 0)
	156	+ return ret;
	157	+
	158	+ /* select one of 16 values: 0000 (2000mA) to 1111 (5000mA) */
	159	+ data = (data >> id*4) & 0x0F;
	160	+ return da9211_current_limits[data];
	161	+}
	162	+
	163	+static struct regulator_ops da9211_buck_ops = {
	164	+ .get_mode = da9211_buck_get_mode,
	165	+ .set_mode = da9211_buck_set_mode,
	166	+ .enable = regulator_enable_regmap,
	167	+ .disable = regulator_disable_regmap,
	168	+ .is_enabled = regulator_is_enabled_regmap,
	169	+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
	170	+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
	171	+ .list_voltage = regulator_list_voltage_linear,
	172	+ .set_current_limit = da9211_set_current_limit,
	173	+ .get_current_limit = da9211_get_current_limit,
	174	+};
	175	+
	176	+#define DA9211_BUCK(_id) \
	177	+{\
	178	+ .name = #_id,\
	179	+ .ops = &da9211_buck_ops,\
	180	+ .type = REGULATOR_VOLTAGE,\
	181	+ .id = DA9211_ID_##_id,\
	182	+ .n_voltages = (DA9211_MAX_MV - DA9211_MIN_MV) / DA9211_STEP_MV + 1,\
	183	+ .min_uV = (DA9211_MIN_MV * 1000),\
	184	+ .uV_step = (DA9211_STEP_MV * 1000),\
	185	+ .enable_reg = DA9211_REG_BUCKA_CONT + DA9211_ID_##_id,\
	186	+ .enable_mask = DA9211_BUCKA_EN,\
	187	+ .vsel_reg = DA9211_REG_VBUCKA_A + DA9211_ID_##_id * 2,\
	188	+ .vsel_mask = DA9211_VBUCK_MASK,\
	189	+ .owner = THIS_MODULE,\
	190	+}
	191	+
	192	+static struct regulator_desc da9211_regulators[] = {
	193	+ DA9211_BUCK(BUCKA),
	194	+ DA9211_BUCK(BUCKB),
	195	+};
	196	+
	197	+static irqreturn_t da9211_irq_handler(int irq, void *data)
	198	+{
	199	+ struct da9211 *chip = data;
	200	+ int reg_val, err, ret = IRQ_NONE;
	201	+
	202	+ err = regmap_read(chip->regmap, DA9211_REG_EVENT_B, &reg_val);
	203	+ if (err < 0)
	204	+ goto error_i2c;
	205	+
	206	+ if (reg_val & DA9211_E_OV_CURR_A) {
	207	+ regulator_notifier_call_chain(chip->rdev[0],
	208	+ REGULATOR_EVENT_OVER_CURRENT,
	209	+ rdev_get_drvdata(chip->rdev[0]));
	210	+
	211	+ err = regmap_write(chip->regmap, DA9211_REG_EVENT_B,
	212	+ DA9211_E_OV_CURR_A);
	213	+ if (err < 0)
	214	+ goto error_i2c;
	215	+
	216	+ ret = IRQ_HANDLED;
	217	+ }
	218	+
	219	+ if (reg_val & DA9211_E_OV_CURR_B) {
	220	+ regulator_notifier_call_chain(chip->rdev[1],
	221	+ REGULATOR_EVENT_OVER_CURRENT,
	222	+ rdev_get_drvdata(chip->rdev[1]));
	223	+
	224	+ err = regmap_write(chip->regmap, DA9211_REG_EVENT_B,
	225	+ DA9211_E_OV_CURR_B);
	226	+ if (err < 0)
	227	+ goto error_i2c;
	228	+
	229	+ ret = IRQ_HANDLED;
	230	+ }
	231	+
	232	+ return ret;
	233	+
	234	+error_i2c:
	235	+ dev_err(chip->dev, "I2C error : %d\n", err);
	236	+ return IRQ_NONE;
	237	+}
	238	+
	239	+static int da9211_regulator_init(struct da9211 *chip)
	240	+{
	241	+ struct regulator_config config = { };
	242	+ int i, ret;
	243	+ unsigned int data;
	244	+
	245	+ ret = regmap_read(chip->regmap, DA9211_REG_CONFIG_E, &data);
	246	+ if (ret < 0) {
	247	+ dev_err(chip->dev, "Failed to read CONTROL_E reg: %d\n", ret);
	248	+ return ret;
	249	+ }
	250	+
	251	+ data &= DA9211_SLAVE_SEL;
	252	+ /* If configuration for 1/2 bucks is different between platform data
	253	+ * and the register, driver should exit.
	254	+ */
	255	+ if ((chip->pdata->num_buck == 2 && data == 0x40)
	256	+ \|\| (chip->pdata->num_buck == 1 && data == 0x00)) {
	257	+ if (data == 0)
	258	+ chip->num_regulator = 1;
	259	+ else
	260	+ chip->num_regulator = 2;
	261	+ } else {
	262	+ dev_err(chip->dev, "Configuration is mismatched\n");
	263	+ return -EINVAL;
	264	+ }
	265	+
	266	+ for (i = 0; i < chip->num_regulator; i++) {
	267	+ if (chip->pdata)
	268	+ config.init_data =
	269	+ &(chip->pdata->init_data[i]);
	270	+
	271	+ config.dev = chip->dev;
	272	+ config.driver_data = chip;
	273	+ config.regmap = chip->regmap;
	274	+
	275	+ chip->rdev[i] = devm_regulator_register(chip->dev,
	276	+ &da9211_regulators[i], &config);
	277	+ if (IS_ERR(chip->rdev[i])) {
	278	+ dev_err(chip->dev,
	279	+ "Failed to register DA9211 regulator\n");
	280	+ return PTR_ERR(chip->rdev[i]);
	281	+ }
	282	+
	283	+ if (chip->chip_irq != 0) {
	284	+ ret = regmap_update_bits(chip->regmap,
	285	+ DA9211_REG_MASK_B, DA9211_M_OV_CURR_A << i, 1);
	286	+ if (ret < 0) {
	287	+ dev_err(chip->dev,
	288	+ "Failed to update mask reg: %d\n", ret);
	289	+ return ret;
	290	+ }
	291	+ }
	292	+ }
	293	+
	294	+ return 0;
	295	+}
	296	+/*
	297	+ * I2C driver interface functions
	298	+ */
	299	+static int da9211_i2c_probe(struct i2c_client *i2c,
	300	+ const struct i2c_device_id *id)
	301	+{
	302	+ struct da9211 *chip;
	303	+ int error, ret;
	304	+
	305	+ chip = devm_kzalloc(&i2c->dev, sizeof(struct da9211), GFP_KERNEL);
	306	+
	307	+ chip->dev = &i2c->dev;
	308	+ chip->regmap = devm_regmap_init_i2c(i2c, &da9211_regmap_config);
	309	+ if (IS_ERR(chip->regmap)) {
	310	+ error = PTR_ERR(chip->regmap);
	311	+ dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
	312	+ error);
	313	+ return error;
	314	+ }
	315	+
	316	+ i2c_set_clientdata(i2c, chip);
	317	+
	318	+ chip->pdata = i2c->dev.platform_data;
	319	+ if (!chip->pdata) {
	320	+ dev_err(&i2c->dev, "No platform init data supplied\n");
	321	+ return -ENODEV;
	322	+ }
	323	+
	324	+ chip->chip_irq = i2c->irq;
	325	+
	326	+ if (chip->chip_irq != 0) {
	327	+ ret = devm_request_threaded_irq(chip->dev, chip->chip_irq, NULL,
	328	+ da9211_irq_handler,
	329	+ IRQF_TRIGGER_LOW\|IRQF_ONESHOT,
	330	+ "da9211", chip);
	331	+ if (ret != 0) {
	332	+ dev_err(chip->dev, "Failed to request IRQ: %d\n",
	333	+ chip->chip_irq);
	334	+ return ret;
	335	+ }
	336	+ } else {
	337	+ dev_warn(chip->dev, "No IRQ configured\n");
	338	+ }
	339	+
	340	+ ret = da9211_regulator_init(chip);
	341	+
	342	+ if (ret < 0)
	343	+ dev_err(&i2c->dev, "Failed to initialize regulator: %d\n", ret);
	344	+
	345	+ return ret;
	346	+}
	347	+
	348	+static const struct i2c_device_id da9211_i2c_id[] = {
	349	+ {"da9211", 0},
	350	+ {},
	351	+};
	352	+
	353	+MODULE_DEVICE_TABLE(i2c, da9211_i2c_id);
	354	+
	355	+static struct i2c_driver da9211_regulator_driver = {
	356	+ .driver = {
	357	+ .name = "da9211",
	358	+ .owner = THIS_MODULE,
	359	+ },
	360	+ .probe = da9211_i2c_probe,
	361	+ .id_table = da9211_i2c_id,
	362	+};
	363	+
	364	+module_i2c_driver(da9211_regulator_driver);
	365	+
	366	+MODULE_AUTHOR("James Ban <James.Ban.opensource@diasemi.com>");
	367	+MODULE_DESCRIPTION("Regulator device driver for Dialog DA9211");
	368	+MODULE_LICENSE("GPL v2");

drivers/regulator/da9211-regulator.h+271−0

@@ -0,0 +1,271 @@
	1	+/*
	2	+ * da9211-regulator.h - Regulator definitions for DA9211
	3	+ * Copyright (C) 2014 Dialog Semiconductor Ltd.
	4	+ *
	5	+ * This library is free software; you can redistribute it and/or
	6	+ * modify it under the terms of the GNU Library General Public
	7	+ * License as published by the Free Software Foundation; either
	8	+ * version 2 of the License, or (at your option) any later version.
	9	+ *
	10	+ * This library is distributed in the hope that it will be useful,
	11	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	+ * Library General Public License for more details.
	14	+ */
	15	+
	16	+#ifndef __DA9211_REGISTERS_H__
	17	+#define __DA9211_REGISTERS_H__
	18	+
	19	+/* Page selection */
	20	+#define DA9211_REG_PAGE_CON 0x00
	21	+
	22	+/* System Control and Event Registers */
	23	+#define DA9211_REG_STATUS_A 0x50
	24	+#define DA9211_REG_STATUS_B 0x51
	25	+#define DA9211_REG_EVENT_A 0x52
	26	+#define DA9211_REG_EVENT_B 0x53
	27	+#define DA9211_REG_MASK_A 0x54
	28	+#define DA9211_REG_MASK_B 0x55
	29	+#define DA9211_REG_CONTROL_A 0x56
	30	+
	31	+/* GPIO Control Registers */
	32	+#define DA9211_REG_GPIO_0_1 0x58
	33	+#define DA9211_REG_GPIO_2_3 0x59
	34	+#define DA9211_REG_GPIO_4 0x5A
	35	+
	36	+/* Regulator Registers */
	37	+#define DA9211_REG_BUCKA_CONT 0x5D
	38	+#define DA9211_REG_BUCKB_CONT 0x5E
	39	+#define DA9211_REG_BUCK_ILIM 0xD0
	40	+#define DA9211_REG_BUCKA_CONF 0xD1
	41	+#define DA9211_REG_BUCKB_CONF 0xD2
	42	+#define DA9211_REG_BUCK_CONF 0xD3
	43	+#define DA9211_REG_VBACKA_MAX 0xD5
	44	+#define DA9211_REG_VBACKB_MAX 0xD6
	45	+#define DA9211_REG_VBUCKA_A 0xD7
	46	+#define DA9211_REG_VBUCKA_B 0xD8
	47	+#define DA9211_REG_VBUCKB_A 0xD9
	48	+#define DA9211_REG_VBUCKB_B 0xDA
	49	+
	50	+/* I2C Interface Settings */
	51	+#define DA9211_REG_INTERFACE 0x105
	52	+
	53	+/* BUCK Phase Selection*/
	54	+#define DA9211_REG_CONFIG_E 0x147
	55	+
	56	+/*
	57	+ * Registers bits
	58	+ */
	59	+/* DA9211_REG_PAGE_CON (addr=0x00) */
	60	+#define DA9211_REG_PAGE_SHIFT 1
	61	+#define DA9211_REG_PAGE_MASK 0x02
	62	+/* On I2C registers 0x00 - 0xFF */
	63	+#define DA9211_REG_PAGE0 0
	64	+/* On I2C registers 0x100 - 0x1FF */
	65	+#define DA9211_REG_PAGE2 2
	66	+#define DA9211_PAGE_WRITE_MODE 0x00
	67	+#define DA9211_REPEAT_WRITE_MODE 0x40
	68	+#define DA9211_PAGE_REVERT 0x80
	69	+
	70	+/* DA9211_REG_STATUS_A (addr=0x50) */
	71	+#define DA9211_GPI0 0x01
	72	+#define DA9211_GPI1 0x02
	73	+#define DA9211_GPI2 0x04
	74	+#define DA9211_GPI3 0x08
	75	+#define DA9211_GPI4 0x10
	76	+
	77	+/* DA9211_REG_EVENT_A (addr=0x52) */
	78	+#define DA9211_E_GPI0 0x01
	79	+#define DA9211_E_GPI1 0x02
	80	+#define DA9211_E_GPI2 0x04
	81	+#define DA9211_E_GPI3 0x08
	82	+#define DA9211_E_GPI4 0x10
	83	+#define DA9211_E_UVLO_IO 0x40
	84	+
	85	+/* DA9211_REG_EVENT_B (addr=0x53) */
	86	+#define DA9211_E_PWRGOOD_A 0x01
	87	+#define DA9211_E_PWRGOOD_B 0x02
	88	+#define DA9211_E_TEMP_WARN 0x04
	89	+#define DA9211_E_TEMP_CRIT 0x08
	90	+#define DA9211_E_OV_CURR_A 0x10
	91	+#define DA9211_E_OV_CURR_B 0x20
	92	+
	93	+/* DA9211_REG_MASK_A (addr=0x54) */
	94	+#define DA9211_M_GPI0 0x01
	95	+#define DA9211_M_GPI1 0x02
	96	+#define DA9211_M_GPI2 0x04
	97	+#define DA9211_M_GPI3 0x08
	98	+#define DA9211_M_GPI4 0x10
	99	+#define DA9211_M_UVLO_IO 0x40
	100	+
	101	+/* DA9211_REG_MASK_B (addr=0x55) */
	102	+#define DA9211_M_PWRGOOD_A 0x01
	103	+#define DA9211_M_PWRGOOD_B 0x02
	104	+#define DA9211_M_TEMP_WARN 0x04
	105	+#define DA9211_M_TEMP_CRIT 0x08
	106	+#define DA9211_M_OV_CURR_A 0x10
	107	+#define DA9211_M_OV_CURR_B 0x20
	108	+
	109	+/* DA9211_REG_CONTROL_A (addr=0x56) */
	110	+#define DA9211_DEBOUNCING_SHIFT 0
	111	+#define DA9211_DEBOUNCING_MASK 0x07
	112	+#define DA9211_SLEW_RATE_SHIFT 3
	113	+#define DA9211_SLEW_RATE_A_MASK 0x18
	114	+#define DA9211_SLEW_RATE_B_SHIFT 5
	115	+#define DA9211_SLEW_RATE_B_MASK 0x60
	116	+#define DA9211_V_LOCK 0x80
	117	+
	118	+/* DA9211_REG_GPIO_0_1 (addr=0x58) */
	119	+#define DA9211_GPIO0_PIN_SHIFT 0
	120	+#define DA9211_GPIO0_PIN_MASK 0x03
	121	+#define DA9211_GPIO0_PIN_GPI 0x00
	122	+#define DA9211_GPIO0_PIN_GPO_OD 0x02
	123	+#define DA9211_GPIO0_PIN_GPO 0x03
	124	+#define DA9211_GPIO0_TYPE 0x04
	125	+#define DA9211_GPIO0_TYPE_GPI 0x00
	126	+#define DA9211_GPIO0_TYPE_GPO 0x04
	127	+#define DA9211_GPIO0_MODE 0x08
	128	+#define DA9211_GPIO1_PIN_SHIFT 4
	129	+#define DA9211_GPIO1_PIN_MASK 0x30
	130	+#define DA9211_GPIO1_PIN_GPI 0x00
	131	+#define DA9211_GPIO1_PIN_VERROR 0x10
	132	+#define DA9211_GPIO1_PIN_GPO_OD 0x20
	133	+#define DA9211_GPIO1_PIN_GPO 0x30
	134	+#define DA9211_GPIO1_TYPE_SHIFT 0x40
	135	+#define DA9211_GPIO1_TYPE_GPI 0x00
	136	+#define DA9211_GPIO1_TYPE_GPO 0x40
	137	+#define DA9211_GPIO1_MODE 0x80
	138	+
	139	+/* DA9211_REG_GPIO_2_3 (addr=0x59) */
	140	+#define DA9211_GPIO2_PIN_SHIFT 0
	141	+#define DA9211_GPIO2_PIN_MASK 0x03
	142	+#define DA9211_GPIO2_PIN_GPI 0x00
	143	+#define DA9211_GPIO5_PIN_BUCK_CLK 0x10
	144	+#define DA9211_GPIO2_PIN_GPO_OD 0x02
	145	+#define DA9211_GPIO2_PIN_GPO 0x03
	146	+#define DA9211_GPIO2_TYPE 0x04
	147	+#define DA9211_GPIO2_TYPE_GPI 0x00
	148	+#define DA9211_GPIO2_TYPE_GPO 0x04
	149	+#define DA9211_GPIO2_MODE 0x08
	150	+#define DA9211_GPIO3_PIN_SHIFT 4
	151	+#define DA9211_GPIO3_PIN_MASK 0x30
	152	+#define DA9211_GPIO3_PIN_GPI 0x00
	153	+#define DA9211_GPIO3_PIN_IERROR 0x10
	154	+#define DA9211_GPIO3_PIN_GPO_OD 0x20
	155	+#define DA9211_GPIO3_PIN_GPO 0x30
	156	+#define DA9211_GPIO3_TYPE_SHIFT 0x40
	157	+#define DA9211_GPIO3_TYPE_GPI 0x00
	158	+#define DA9211_GPIO3_TYPE_GPO 0x40
	159	+#define DA9211_GPIO3_MODE 0x80
	160	+
	161	+/* DA9211_REG_GPIO_4 (addr=0x5A) */
	162	+#define DA9211_GPIO4_PIN_SHIFT 0
	163	+#define DA9211_GPIO4_PIN_MASK 0x03
	164	+#define DA9211_GPIO4_PIN_GPI 0x00
	165	+#define DA9211_GPIO4_PIN_GPO_OD 0x02
	166	+#define DA9211_GPIO4_PIN_GPO 0x03
	167	+#define DA9211_GPIO4_TYPE 0x04
	168	+#define DA9211_GPIO4_TYPE_GPI 0x00
	169	+#define DA9211_GPIO4_TYPE_GPO 0x04
	170	+#define DA9211_GPIO4_MODE 0x08
	171	+
	172	+/* DA9211_REG_BUCKA_CONT (addr=0x5D) */
	173	+#define DA9211_BUCKA_EN 0x01
	174	+#define DA9211_BUCKA_GPI_SHIFT 1
	175	+#define DA9211_BUCKA_GPI_MASK 0x06
	176	+#define DA9211_BUCKA_GPI_OFF 0x00
	177	+#define DA9211_BUCKA_GPI_GPIO0 0x02
	178	+#define DA9211_BUCKA_GPI_GPIO1 0x04
	179	+#define DA9211_BUCKA_GPI_GPIO3 0x06
	180	+#define DA9211_BUCKA_PD_DIS 0x08
	181	+#define DA9211_VBUCKA_SEL 0x10
	182	+#define DA9211_VBUCKA_SEL_A 0x00
	183	+#define DA9211_VBUCKA_SEL_B 0x10
	184	+#define DA9211_VBUCKA_GPI_SHIFT 5
	185	+#define DA9211_VBUCKA_GPI_MASK 0x60
	186	+#define DA9211_VBUCKA_GPI_OFF 0x00
	187	+#define DA9211_VBUCKA_GPI_GPIO1 0x20
	188	+#define DA9211_VBUCKA_GPI_GPIO2 0x40
	189	+#define DA9211_VBUCKA_GPI_GPIO4 0x60
	190	+
	191	+/* DA9211_REG_BUCKB_CONT (addr=0x5E) */
	192	+#define DA9211_BUCKB_EN 0x01
	193	+#define DA9211_BUCKB_GPI_SHIFT 1
	194	+#define DA9211_BUCKB_GPI_MASK 0x06
	195	+#define DA9211_BUCKB_GPI_OFF 0x00
	196	+#define DA9211_BUCKB_GPI_GPIO0 0x02
	197	+#define DA9211_BUCKB_GPI_GPIO1 0x04
	198	+#define DA9211_BUCKB_GPI_GPIO3 0x06
	199	+#define DA9211_BUCKB_PD_DIS 0x08
	200	+#define DA9211_VBUCKB_SEL 0x10
	201	+#define DA9211_VBUCKB_SEL_A 0x00
	202	+#define DA9211_VBUCKB_SEL_B 0x10
	203	+#define DA9211_VBUCKB_GPI_SHIFT 5
	204	+#define DA9211_VBUCKB_GPI_MASK 0x60
	205	+#define DA9211_VBUCKB_GPI_OFF 0x00
	206	+#define DA9211_VBUCKB_GPI_GPIO1 0x20
	207	+#define DA9211_VBUCKB_GPI_GPIO2 0x40
	208	+#define DA9211_VBUCKB_GPI_GPIO4 0x60
	209	+
	210	+/* DA9211_REG_BUCK_ILIM (addr=0xD0) */
	211	+#define DA9211_BUCKA_ILIM_SHIFT 0
	212	+#define DA9211_BUCKA_ILIM_MASK 0x0F
	213	+#define DA9211_BUCKB_ILIM_SHIFT 4
	214	+#define DA9211_BUCKB_ILIM_MASK 0xF0
	215	+
	216	+/* DA9211_REG_BUCKA_CONF (addr=0xD1) */
	217	+#define DA9211_BUCKA_MODE_SHIFT 0
	218	+#define DA9211_BUCKA_MODE_MASK 0x03
	219	+#define DA9211_BUCKA_MODE_MANUAL 0x00
	220	+#define DA9211_BUCKA_MODE_SLEEP 0x01
	221	+#define DA9211_BUCKA_MODE_SYNC 0x02
	222	+#define DA9211_BUCKA_MODE_AUTO 0x03
	223	+#define DA9211_BUCKA_UP_CTRL_SHIFT 2
	224	+#define DA9211_BUCKA_UP_CTRL_MASK 0x1C
	225	+#define DA9211_BUCKA_DOWN_CTRL_SHIFT 5
	226	+#define DA9211_BUCKA_DOWN_CTRL_MASK 0xE0
	227	+
	228	+/* DA9211_REG_BUCKB_CONF (addr=0xD2) */
	229	+#define DA9211_BUCKB_MODE_SHIFT 0
	230	+#define DA9211_BUCKB_MODE_MASK 0x03
	231	+#define DA9211_BUCKB_MODE_MANUAL 0x00
	232	+#define DA9211_BUCKB_MODE_SLEEP 0x01
	233	+#define DA9211_BUCKB_MODE_SYNC 0x02
	234	+#define DA9211_BUCKB_MODE_AUTO 0x03
	235	+#define DA9211_BUCKB_UP_CTRL_SHIFT 2
	236	+#define DA9211_BUCKB_UP_CTRL_MASK 0x1C
	237	+#define DA9211_BUCKB_DOWN_CTRL_SHIFT 5
	238	+#define DA9211_BUCKB_DOWN_CTRL_MASK 0xE0
	239	+
	240	+/* DA9211_REG_BUCK_CONF (addr=0xD3) */
	241	+#define DA9211_PHASE_SEL_A_SHIFT 0
	242	+#define DA9211_PHASE_SEL_A_MASK 0x03
	243	+#define DA9211_PHASE_SEL_B_SHIFT 2
	244	+#define DA9211_PHASE_SEL_B_MASK 0x04
	245	+#define DA9211_PH_SH_EN_A_SHIFT 3
	246	+#define DA9211_PH_SH_EN_A_MASK 0x08
	247	+#define DA9211_PH_SH_EN_B_SHIFT 4
	248	+#define DA9211_PH_SH_EN_B_MASK 0x10
	249	+
	250	+/* DA9211_REG_VBUCKA_MAX (addr=0xD5) */
	251	+#define DA9211_VBUCKA_BASE_SHIFT 0
	252	+#define DA9211_VBUCKA_BASE_MASK 0x7F
	253	+
	254	+/* DA9211_REG_VBUCKB_MAX (addr=0xD6) */
	255	+#define DA9211_VBUCKB_BASE_SHIFT 0
	256	+#define DA9211_VBUCKB_BASE_MASK 0x7F
	257	+
	258	+/* DA9211_REG_VBUCKA/B_A/B (addr=0xD7/0xD8/0xD9/0xDA) */
	259	+#define DA9211_VBUCK_SHIFT 0
	260	+#define DA9211_VBUCK_MASK 0x7F
	261	+#define DA9211_VBUCK_BIAS 0
	262	+#define DA9211_BUCK_SL 0x80
	263	+
	264	+/* DA9211_REG_INTERFACE (addr=0x105) */
	265	+#define DA9211_IF_BASE_ADDR_SHIFT 4
	266	+#define DA9211_IF_BASE_ADDR_MASK 0xF0
	267	+
	268	+/* DA9211_REG_CONFIG_E (addr=0x147) */
	269	+#define DA9211_SLAVE_SEL 0x40
	270	+
	271	+#endif /* __DA9211_REGISTERS_H__ */

drivers/regulator/lp872x.c+0−9

@@ -845,7 +845,6 @@ static struct lp872x_platform_data · 844 unmodified lines
845	845	struct device_node *np = dev->of_node;
846	846	struct lp872x_platform_data *pdata;
847	847	struct of_regulator_match *match;
848		− struct regulator_init_data *d;
849	848	int num_matches;
850	849	int count;
851	850	int i;
@@ -892,14 +891,6 @@ static struct lp872x_platform_data · 40 unmodified lines
892	891	pdata->regulator_data[i].id =
893	892	(enum lp872x_regulator_id)match[i].driver_data;
894	893	pdata->regulator_data[i].init_data = match[i].init_data;
895		−
896		− /* Operation mode configuration for buck/buck1/buck2 */
897		− if (strncmp(match[i].name, "buck", 4))
898		− continue;
899		−
900		− d = pdata->regulator_data[i].init_data;
901		− d->constraints.valid_modes_mask \|= LP872X_VALID_OPMODE;
902		− d->constraints.valid_ops_mask \|= REGULATOR_CHANGE_MODE;
903	894	}
904	895	out:
905	896	return pdata;

drivers/regulator/lp8755.c+6−17

@@ -339,22 +339,18 @@ static int lp8755_regulator_init(struct lp8755_chip *pchip) · 338 unmodified lines
339	339	rconfig.init_data = pdata->buck_data[buck_num];
340	340	rconfig.of_node = pchip->dev->of_node;
341	341	pchip->rdev[buck_num] =
342		− regulator_register(&lp8755_regulators[buck_num], &rconfig);
	342	+ devm_regulator_register(pchip->dev,
	343	+ &lp8755_regulators[buck_num], &rconfig);
343	344	if (IS_ERR(pchip->rdev[buck_num])) {
344	345	ret = PTR_ERR(pchip->rdev[buck_num]);
345	346	pchip->rdev[buck_num] = NULL;
346	347	dev_err(pchip->dev, "regulator init failed: buck %d\n",
347	348	buck_num);
348		− goto err_buck;
	349	+ return ret;
349	350	}
350	351	}
351	352
352	353	return 0;
353		−
354		−err_buck:
355		− for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++)
356		− regulator_unregister(pchip->rdev[icnt]);
357		− return ret;
358	354	}
359	355
360	356	static irqreturn_t lp8755_irq_handler(int irq, void *data)
@@ -490,23 +486,19 @@ static int lp8755_probe(struct i2c_client *client, · 129 unmodified lines
490	486	ret = lp8755_regulator_init(pchip);
491	487	if (ret < 0) {
492	488	dev_err(&client->dev, "fail to initialize regulators\n");
493		− goto err_regulator;
	489	+ goto err;
494	490	}
495	491
496	492	pchip->irq = client->irq;
497	493	ret = lp8755_int_config(pchip);
498	494	if (ret < 0) {
499	495	dev_err(&client->dev, "fail to irq config\n");
500		− goto err_irq;
	496	+ goto err;
501	497	}
502	498
503	499	return ret;
504	500
505		−err_irq:
506		− for (icnt = 0; icnt < mphase_buck[pchip->mphase].nreg; icnt++)
507		− regulator_unregister(pchip->rdev[icnt]);
508		−
509		−err_regulator:
	501	+err:
510	502	/* output disable */
511	503	for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++)
512	504	lp8755_write(pchip, icnt, 0x00);
@@ -519,9 +511,6 @@ static int lp8755_remove(struct i2c_client *client) · 6 unmodified lines
519	511	int icnt;
520	512	struct lp8755_chip *pchip = i2c_get_clientdata(client);
521	513
522		− for (icnt = 0; icnt < mphase_buck[pchip->mphase].nreg; icnt++)
523		− regulator_unregister(pchip->rdev[icnt]);
524		−
525	514	for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++)
526	515	lp8755_write(pchip, icnt, 0x00);
527	516

drivers/regulator/ltc3589.c+1−1

@@ -377,7 +377,7 @@ static bool ltc3589_volatile_reg(struct device *dev, unsigned int reg) · 376 unmodified lines
377	377	return false;
378	378	}
379	379
380		−struct reg_default ltc3589_reg_defaults[] = {
	380	+static struct reg_default ltc3589_reg_defaults[] = {
381	381	{ LTC3589_SCR1, 0x00 },
382	382	{ LTC3589_OVEN, 0x00 },
383	383	{ LTC3589_SCR2, 0x00 },

drivers/regulator/max8952.c+10−24

@@ -229,7 +229,6 @@ static int max8952_pmic_probe(struct i2c_client *client, · 228 unmodified lines
229	229	config.ena_gpio_flags \|= GPIOF_OUT_INIT_HIGH;
230	230
231	231	rdev = devm_regulator_register(&client->dev, &regulator, &config);
232		−
233	232	if (IS_ERR(rdev)) {
234	233	ret = PTR_ERR(rdev);
235	234	dev_err(&client->dev, "regulator init failed (%d)\n", ret);
@@ -241,21 +240,19 @@ static int max8952_pmic_probe(struct i2c_client *client, · 5 unmodified lines
241	240
242	241	if (gpio_is_valid(pdata->gpio_vid0) &&
243	242	gpio_is_valid(pdata->gpio_vid1)) {
244		− if (!gpio_request(pdata->gpio_vid0, "MAX8952 VID0"))
245		− gpio_direction_output(pdata->gpio_vid0,
246		− (pdata->default_mode) & 0x1);
247		− else
	243	+ unsigned long gpio_flags;
	244	+
	245	+ gpio_flags = max8952->vid0 ?
	246	+ GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
	247	+ if (devm_gpio_request_one(&client->dev, pdata->gpio_vid0,
	248	+ gpio_flags, "MAX8952 VID0"))
248	249	err = 1;
249	250
250		− if (!gpio_request(pdata->gpio_vid1, "MAX8952 VID1"))
251		− gpio_direction_output(pdata->gpio_vid1,
252		− (pdata->default_mode >> 1) & 0x1);
253		− else {
254		− if (!err)
255		− gpio_free(pdata->gpio_vid0);
	251	+ gpio_flags = max8952->vid1 ?
	252	+ GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW;
	253	+ if (devm_gpio_request_one(&client->dev, pdata->gpio_vid1,
	254	+ gpio_flags, "MAX8952 VID1"))
256	255	err = 2;
257		− }
258		−
259	256	} else
260	257	err = 3;
261	258
@@ -314,16 +311,6 @@ static int max8952_pmic_probe(struct i2c_client *client, · 52 unmodified lines
314	311	return 0;
315	312	}
316	313
317		−static int max8952_pmic_remove(struct i2c_client *client)
318		−{
319		− struct max8952_data *max8952 = i2c_get_clientdata(client);
320		− struct max8952_platform_data *pdata = max8952->pdata;
321		−
322		− gpio_free(pdata->gpio_vid0);
323		− gpio_free(pdata->gpio_vid1);
324		− return 0;
325		−}
326		−
327	314	static const struct i2c_device_id max8952_ids[] = {
328	315	{ "max8952", 0 },
329	316	{ },
@@ -332,7 +319,6 @@ MODULE_DEVICE_TABLE(i2c, max8952_ids); · 2 unmodified lines
332	319
333	320	static struct i2c_driver max8952_pmic_driver = {
334	321	.probe = max8952_pmic_probe,
335		− .remove = max8952_pmic_remove,
336	322	.driver = {
337	323	.name = "max8952",
338	324	.of_match_table = of_match_ptr(max8952_dt_match),

drivers/regulator/mc13xxx-regulator-core.c+8−29

@@ -33,17 +33,12 @@ static int mc13xxx_regulator_enable(struct regulator_dev *rdev) · 32 unmodified lines
33	33	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
34	34	struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
35	35	int id = rdev_get_id(rdev);
36		− int ret;
37	36
38	37	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
39	38
40		− mc13xxx_lock(priv->mc13xxx);
41		− ret = mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg,
42		− mc13xxx_regulators[id].enable_bit,
43		− mc13xxx_regulators[id].enable_bit);
44		− mc13xxx_unlock(priv->mc13xxx);
45		−
46		− return ret;
	39	+ return mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg,
	40	+ mc13xxx_regulators[id].enable_bit,
	41	+ mc13xxx_regulators[id].enable_bit);
47	42	}
48	43
49	44	static int mc13xxx_regulator_disable(struct regulator_dev *rdev)
@@ -51,16 +46,11 @@ static int mc13xxx_regulator_disable(struct regulator_dev *rdev) · 1 unmodified line
51	46	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
52	47	struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
53	48	int id = rdev_get_id(rdev);
54		− int ret;
55	49
56	50	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
57	51
58		− mc13xxx_lock(priv->mc13xxx);
59		− ret = mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg,
60		− mc13xxx_regulators[id].enable_bit, 0);
61		− mc13xxx_unlock(priv->mc13xxx);
62		−
63		− return ret;
	52	+ return mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg,
	53	+ mc13xxx_regulators[id].enable_bit, 0);
64	54	}
65	55
66	56	static int mc13xxx_regulator_is_enabled(struct regulator_dev *rdev)
@@ -70,10 +60,7 @@ static int mc13xxx_regulator_is_enabled(struct regulator_dev *rdev) · 3 unmodified lines
70	60	int ret, id = rdev_get_id(rdev);
71	61	unsigned int val;
72	62
73		− mc13xxx_lock(priv->mc13xxx);
74	63	ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val);
75		− mc13xxx_unlock(priv->mc13xxx);
76		−
77	64	if (ret)
78	65	return ret;
79	66
@@ -86,15 +73,10 @@ static int mc13xxx_regulator_set_voltage_sel(struct regulator_dev *rdev, · 6 unmodified lines
86	73	struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev);
87	74	struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators;
88	75	int id = rdev_get_id(rdev);
89		− int ret;
90	76
91		− mc13xxx_lock(priv->mc13xxx);
92		− ret = mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].vsel_reg,
93		− mc13xxx_regulators[id].vsel_mask,
94		− selector << mc13xxx_regulators[id].vsel_shift);
95		− mc13xxx_unlock(priv->mc13xxx);
96		−
97		− return ret;
	77	+ return mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].vsel_reg,
	78	+ mc13xxx_regulators[id].vsel_mask,
	79	+ selector << mc13xxx_regulators[id].vsel_shift);
98	80	}
99	81
100	82	static int mc13xxx_regulator_get_voltage(struct regulator_dev *rdev)
@@ -106,11 +88,8 @@ static int mc13xxx_regulator_get_voltage(struct regulator_dev *rdev) · 5 unmodified lines
106	88
107	89	dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
108	90
109		− mc13xxx_lock(priv->mc13xxx);
110	91	ret = mc13xxx_reg_read(priv->mc13xxx,
111	92	mc13xxx_regulators[id].vsel_reg, &val);
112		− mc13xxx_unlock(priv->mc13xxx);
113		−
114	93	if (ret)
115	94	return ret;
116	95

drivers/regulator/mc13xxx.h+0−1

@@ -21,7 +21,6 @@ struct mc13xxx_regulator { · 20 unmodified lines
21	21	int vsel_reg;
22	22	int vsel_shift;
23	23	int vsel_mask;
24		− int hi_bit;
25	24	};
26	25
27	26	struct mc13xxx_regulator_priv {

drivers/regulator/palmas-regulator.c+796−308

@@ -27,15 +27,6 @@ · 26 unmodified lines
27	27	#include <linux/of_platform.h>
28	28	#include <linux/regulator/of_regulator.h>
29	29
30		−struct regs_info {
31		− char *name;
32		− char *sname;
33		− u8 vsel_addr;
34		− u8 ctrl_addr;
35		− u8 tstep_addr;
36		− int sleep_id;
37		−};
38		−
39	30	static const struct regulator_linear_range smps_low_ranges[] = {
40	31	REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
41	32	REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
@@ -50,7 +41,7 @@ static const struct regulator_linear_range smps_high_ranges[] = { · 8 unmodified lines
50	41	REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
51	42	};
52	43
53		−static const struct regs_info palmas_regs_info[] = {
	44	+static struct palmas_regs_info palmas_generic_regs_info[] = {
54	45	{
55	46	.name = "SMPS12",
56	47	.sname = "smps1-in",
@@ -236,6 +227,153 @@ static const struct regs_info palmas_regs_info[] = { · 179 unmodified lines
236	227	},
237	228	};
238	229
	230	+static struct palmas_regs_info tps65917_regs_info[] = {
	231	+ {
	232	+ .name = "SMPS1",
	233	+ .sname = "smps1-in",
	234	+ .vsel_addr = TPS65917_SMPS1_VOLTAGE,
	235	+ .ctrl_addr = TPS65917_SMPS1_CTRL,
	236	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
	237	+ },
	238	+ {
	239	+ .name = "SMPS2",
	240	+ .sname = "smps2-in",
	241	+ .vsel_addr = TPS65917_SMPS2_VOLTAGE,
	242	+ .ctrl_addr = TPS65917_SMPS2_CTRL,
	243	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
	244	+ },
	245	+ {
	246	+ .name = "SMPS3",
	247	+ .sname = "smps3-in",
	248	+ .vsel_addr = TPS65917_SMPS3_VOLTAGE,
	249	+ .ctrl_addr = TPS65917_SMPS3_CTRL,
	250	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
	251	+ },
	252	+ {
	253	+ .name = "SMPS4",
	254	+ .sname = "smps4-in",
	255	+ .vsel_addr = TPS65917_SMPS4_VOLTAGE,
	256	+ .ctrl_addr = TPS65917_SMPS4_CTRL,
	257	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
	258	+ },
	259	+ {
	260	+ .name = "SMPS5",
	261	+ .sname = "smps5-in",
	262	+ .vsel_addr = TPS65917_SMPS5_VOLTAGE,
	263	+ .ctrl_addr = TPS65917_SMPS5_CTRL,
	264	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
	265	+ },
	266	+ {
	267	+ .name = "LDO1",
	268	+ .sname = "ldo1-in",
	269	+ .vsel_addr = TPS65917_LDO1_VOLTAGE,
	270	+ .ctrl_addr = TPS65917_LDO1_CTRL,
	271	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
	272	+ },
	273	+ {
	274	+ .name = "LDO2",
	275	+ .sname = "ldo2-in",
	276	+ .vsel_addr = TPS65917_LDO2_VOLTAGE,
	277	+ .ctrl_addr = TPS65917_LDO2_CTRL,
	278	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
	279	+ },
	280	+ {
	281	+ .name = "LDO3",
	282	+ .sname = "ldo3-in",
	283	+ .vsel_addr = TPS65917_LDO3_VOLTAGE,
	284	+ .ctrl_addr = TPS65917_LDO3_CTRL,
	285	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
	286	+ },
	287	+ {
	288	+ .name = "LDO4",
	289	+ .sname = "ldo4-in",
	290	+ .vsel_addr = TPS65917_LDO4_VOLTAGE,
	291	+ .ctrl_addr = TPS65917_LDO4_CTRL,
	292	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
	293	+ },
	294	+ {
	295	+ .name = "LDO5",
	296	+ .sname = "ldo5-in",
	297	+ .vsel_addr = TPS65917_LDO5_VOLTAGE,
	298	+ .ctrl_addr = TPS65917_LDO5_CTRL,
	299	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
	300	+ },
	301	+ {
	302	+ .name = "REGEN1",
	303	+ .ctrl_addr = TPS65917_REGEN1_CTRL,
	304	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
	305	+ },
	306	+ {
	307	+ .name = "REGEN2",
	308	+ .ctrl_addr = TPS65917_REGEN2_CTRL,
	309	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
	310	+ },
	311	+ {
	312	+ .name = "REGEN3",
	313	+ .ctrl_addr = TPS65917_REGEN3_CTRL,
	314	+ .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
	315	+ },
	316	+};
	317	+
	318	+#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
	319	+ [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
	320	+ .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
	321	+ .reg_offset = _offset, \
	322	+ .bit_pos = _pos, \
	323	+ }
	324	+
	325	+static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
	326	+ EXTERNAL_REQUESTOR(REGEN1, 0, 0),
	327	+ EXTERNAL_REQUESTOR(REGEN2, 0, 1),
	328	+ EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
	329	+ EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
	330	+ EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
	331	+ EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
	332	+ EXTERNAL_REQUESTOR(REGEN3, 0, 6),
	333	+ EXTERNAL_REQUESTOR(SMPS12, 1, 0),
	334	+ EXTERNAL_REQUESTOR(SMPS3, 1, 1),
	335	+ EXTERNAL_REQUESTOR(SMPS45, 1, 2),
	336	+ EXTERNAL_REQUESTOR(SMPS6, 1, 3),
	337	+ EXTERNAL_REQUESTOR(SMPS7, 1, 4),
	338	+ EXTERNAL_REQUESTOR(SMPS8, 1, 5),
	339	+ EXTERNAL_REQUESTOR(SMPS9, 1, 6),
	340	+ EXTERNAL_REQUESTOR(SMPS10, 1, 7),
	341	+ EXTERNAL_REQUESTOR(LDO1, 2, 0),
	342	+ EXTERNAL_REQUESTOR(LDO2, 2, 1),
	343	+ EXTERNAL_REQUESTOR(LDO3, 2, 2),
	344	+ EXTERNAL_REQUESTOR(LDO4, 2, 3),
	345	+ EXTERNAL_REQUESTOR(LDO5, 2, 4),
	346	+ EXTERNAL_REQUESTOR(LDO6, 2, 5),
	347	+ EXTERNAL_REQUESTOR(LDO7, 2, 6),
	348	+ EXTERNAL_REQUESTOR(LDO8, 2, 7),
	349	+ EXTERNAL_REQUESTOR(LDO9, 3, 0),
	350	+ EXTERNAL_REQUESTOR(LDOLN, 3, 1),
	351	+ EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
	352	+};
	353	+
	354	+#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
	355	+ [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
	356	+ .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
	357	+ .reg_offset = _offset, \
	358	+ .bit_pos = _pos, \
	359	+ }
	360	+
	361	+static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
	362	+ EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
	363	+ EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
	364	+ EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
	365	+ EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
	366	+ EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
	367	+ EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
	368	+ EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
	369	+ EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
	370	+ EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
	371	+ EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
	372	+ EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
	373	+ EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
	374	+ EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
	375	+};
	376	+
239	377	static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
240	378
241	379	#define SMPS_CTRL_MODE_OFF 0x00
@@ -296,12 +434,15 @@ static int palmas_ldo_write(struct palmas *palmas, unsigned int reg, · 54 unmodified lines
296	434
297	435	static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
298	436	{
299		− struct palmas_pmic *pmic = rdev_get_drvdata(dev);
300	437	int id = rdev_get_id(dev);
	438	+ struct palmas_pmic *pmic = rdev_get_drvdata(dev);
	439	+ struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
	440	+ struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
301	441	unsigned int reg;
302	442	bool rail_enable = true;
303	443
304		− palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
	444	+ palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, &reg);
	445	+
305	446	reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
306	447
307	448	if (reg == SMPS_CTRL_MODE_OFF)
@@ -323,8 +464,7 @@ static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode) · 15 unmodified lines
323	464
324	465	pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
325	466	if (rail_enable)
326		− palmas_smps_write(pmic->palmas,
327		− palmas_regs_info[id].ctrl_addr, reg);
	467	+ palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
328	468
329	469	/* Switch the enable value to ensure this is used for enable */
330	470	pmic->desc[id].enable_val = pmic->current_reg_mode[id];
@@ -355,10 +495,11 @@ static unsigned int palmas_get_mode_smps(struct regulator_dev *dev) · 24 unmodified lines
355	495	static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
356	496	int ramp_delay)
357	497	{
358		− struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
359	498	int id = rdev_get_id(rdev);
	499	+ struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
	500	+ struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
	501	+ struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
360	502	unsigned int reg = 0;
361		− unsigned int addr = palmas_regs_info[id].tstep_addr;
362	503	int ret;
363	504
364	505	/* SMPS3 and SMPS7 do not have tstep_addr setting */
@@ -377,7 +518,7 @@ static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev, · 12 unmodified lines
377	518	else
378	519	reg = 1;
379	520
380		− ret = palmas_smps_write(pmic->palmas, addr, reg);
	521	+ ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
381	522	if (ret < 0) {
382	523	dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
383	524	return ret;
@@ -424,13 +565,37 @@ static struct regulator_ops palmas_ops_smps10 = { · 40 unmodified lines
424	565	.get_bypass = regulator_get_bypass_regmap,
425	566	};
426	567
	568	+static struct regulator_ops tps65917_ops_smps = {
	569	+ .is_enabled = regulator_is_enabled_regmap,
	570	+ .enable = regulator_enable_regmap,
	571	+ .disable = regulator_disable_regmap,
	572	+ .set_mode = palmas_set_mode_smps,
	573	+ .get_mode = palmas_get_mode_smps,
	574	+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
	575	+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
	576	+ .list_voltage = regulator_list_voltage_linear_range,
	577	+ .map_voltage = regulator_map_voltage_linear_range,
	578	+ .set_voltage_time_sel = regulator_set_voltage_time_sel,
	579	+};
	580	+
	581	+static struct regulator_ops tps65917_ops_ext_control_smps = {
	582	+ .set_mode = palmas_set_mode_smps,
	583	+ .get_mode = palmas_get_mode_smps,
	584	+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
	585	+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
	586	+ .list_voltage = regulator_list_voltage_linear_range,
	587	+ .map_voltage = regulator_map_voltage_linear_range,
	588	+};
	589	+
427	590	static int palmas_is_enabled_ldo(struct regulator_dev *dev)
428	591	{
429		− struct palmas_pmic *pmic = rdev_get_drvdata(dev);
430	592	int id = rdev_get_id(dev);
	593	+ struct palmas_pmic *pmic = rdev_get_drvdata(dev);
	594	+ struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
	595	+ struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
431	596	unsigned int reg;
432	597
433		− palmas_ldo_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg);
	598	+ palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, &reg);
434	599
435	600	reg &= PALMAS_LDO1_CTRL_STATUS;
436	601
@@ -463,14 +628,26 @@ static struct regulator_ops palmas_ops_extreg = { · 26 unmodified lines
463	628	static struct regulator_ops palmas_ops_ext_control_extreg = {
464	629	};
465	630
	631	+static struct regulator_ops tps65917_ops_ldo = {
	632	+ .is_enabled = palmas_is_enabled_ldo,
	633	+ .enable = regulator_enable_regmap,
	634	+ .disable = regulator_disable_regmap,
	635	+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
	636	+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
	637	+ .list_voltage = regulator_list_voltage_linear,
	638	+ .map_voltage = regulator_map_voltage_linear,
	639	+ .set_voltage_time_sel = regulator_set_voltage_time_sel,
	640	+};
	641	+
466	642	static int palmas_regulator_config_external(struct palmas *palmas, int id,
467	643	struct palmas_reg_init *reg_init)
468	644	{
469		− int sleep_id = palmas_regs_info[id].sleep_id;
	645	+ struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
	646	+ struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
470	647	int ret;
471	648
472		− ret = palmas_ext_control_req_config(palmas, sleep_id,
473		− reg_init->roof_floor, true);
	649	+ ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
	650	+ reg_init->roof_floor, true);
474	651	if (ret < 0)
475	652	dev_err(palmas->dev,
476	653	"Ext control config for regulator %d failed %d\n",
@@ -488,10 +665,10 @@ static int palmas_smps_init(struct palmas *palmas, int id, · 11 unmodified lines
488	665	struct palmas_reg_init *reg_init)
489	666	{
490	667	unsigned int reg;
491		− unsigned int addr;
492	668	int ret;
493		−
494		− addr = palmas_regs_info[id].ctrl_addr;
	669	+ struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
	670	+ struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
	671	+ unsigned int addr = rinfo->ctrl_addr;
495	672
496	673	ret = palmas_smps_read(palmas, addr, &reg);
497	674	if (ret)
@@ -526,12 +703,11 @@ static int palmas_smps_init(struct palmas *palmas, int id, · 28 unmodified lines
526	703	if (ret)
527	704	return ret;
528	705
529		− if (palmas_regs_info[id].vsel_addr && reg_init->vsel) {
530		− addr = palmas_regs_info[id].vsel_addr;
	706	+ if (rinfo->vsel_addr && reg_init->vsel) {
531	707
532	708	reg = reg_init->vsel;
533	709
534		− ret = palmas_smps_write(palmas, addr, reg);
	710	+ ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
535	711	if (ret)
536	712	return ret;
537	713	}
@@ -539,7 +715,6 @@ static int palmas_smps_init(struct palmas *palmas, int id, · 1 unmodified line
539	715	if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
540	716	(id != PALMAS_REG_SMPS10_OUT2)) {
541	717	/* Enable externally controlled regulator */
542		− addr = palmas_regs_info[id].ctrl_addr;
543	718	ret = palmas_smps_read(palmas, addr, &reg);
544	719	if (ret < 0)
545	720	return ret;
@@ -561,8 +736,10 @@ static int palmas_ldo_init(struct palmas *palmas, int id, · 15 unmodified lines
561	736	unsigned int reg;
562	737	unsigned int addr;
563	738	int ret;
	739	+ struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
	740	+ struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
564	741
565		− addr = palmas_regs_info[id].ctrl_addr;
	742	+ addr = rinfo->ctrl_addr;
566	743
567	744	ret = palmas_ldo_read(palmas, addr, &reg);
568	745	if (ret)
@@ -584,7 +761,6 @@ static int palmas_ldo_init(struct palmas *palmas, int id, · 15 unmodified lines
584	761
585	762	if (reg_init->roof_floor) {
586	763	/* Enable externally controlled regulator */
587		− addr = palmas_regs_info[id].ctrl_addr;
588	764	ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
589	765	addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
590	766	PALMAS_LDO1_CTRL_MODE_ACTIVE);
@@ -605,8 +781,10 @@ static int palmas_extreg_init(struct palmas *palmas, int id, · 14 unmodified lines
605	781	unsigned int addr;
606	782	int ret;
607	783	unsigned int val = 0;
	784	+ struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
	785	+ struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
608	786
609		− addr = palmas_regs_info[id].ctrl_addr;
	787	+ addr = rinfo->ctrl_addr;
610	788
611	789	if (reg_init->mode_sleep)
612	790	val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
@@ -621,7 +799,6 @@ static int palmas_extreg_init(struct palmas *palmas, int id, · 8 unmodified lines
621	799
622	800	if (reg_init->roof_floor) {
623	801	/* Enable externally controlled regulator */
624		− addr = palmas_regs_info[id].ctrl_addr;
625	802	ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
626	803	addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
627	804	PALMAS_REGEN1_CTRL_MODE_ACTIVE);
@@ -641,8 +818,11 @@ static void palmas_enable_ldo8_track(struct palmas *palmas) · 13 unmodified lines
641	818	unsigned int reg;
642	819	unsigned int addr;
643	820	int ret;
	821	+ struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
	822	+ struct palmas_regs_info *rinfo;
644	823
645		− addr = palmas_regs_info[PALMAS_REG_LDO8].ctrl_addr;
	824	+ rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
	825	+ addr = rinfo->ctrl_addr;
646	826
647	827	ret = palmas_ldo_read(palmas, addr, &reg);
648	828	if (ret) {
@@ -661,7 +841,7 @@ static void palmas_enable_ldo8_track(struct palmas *palmas) · 12 unmodified lines
661	841	* output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
662	842	* and can be set from 0.45 to 1.65 V.
663	843	*/
664		− addr = palmas_regs_info[PALMAS_REG_LDO8].vsel_addr;
	844	+ addr = rinfo->vsel_addr;
665	845	ret = palmas_ldo_read(palmas, addr, &reg);
666	846	if (ret) {
667	847	dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
@@ -676,169 +856,230 @@ static void palmas_enable_ldo8_track(struct palmas *palmas) · 8 unmodified lines
676	856	return;
677	857	}
678	858
679		−static struct of_regulator_match palmas_matches[] = {
680		− { .name = "smps12", },
681		− { .name = "smps123", },
682		− { .name = "smps3", },
683		− { .name = "smps45", },
684		− { .name = "smps457", },
685		− { .name = "smps6", },
686		− { .name = "smps7", },
687		− { .name = "smps8", },
688		− { .name = "smps9", },
689		− { .name = "smps10_out2", },
690		− { .name = "smps10_out1", },
691		− { .name = "ldo1", },
692		− { .name = "ldo2", },
693		− { .name = "ldo3", },
694		− { .name = "ldo4", },
695		− { .name = "ldo5", },
696		− { .name = "ldo6", },
697		− { .name = "ldo7", },
698		− { .name = "ldo8", },
699		− { .name = "ldo9", },
700		− { .name = "ldoln", },
701		− { .name = "ldousb", },
702		− { .name = "regen1", },
703		− { .name = "regen2", },
704		− { .name = "regen3", },
705		− { .name = "sysen1", },
706		− { .name = "sysen2", },
707		−};
708		−
709		−static void palmas_dt_to_pdata(struct device *dev,
710		− struct device_node *node,
711		− struct palmas_pmic_platform_data *pdata)
	859	+static int palmas_ldo_registration(struct palmas_pmic *pmic,
	860	+ struct palmas_pmic_driver_data *ddata,
	861	+ struct palmas_pmic_platform_data *pdata,
	862	+ const char *pdev_name,
	863	+ struct regulator_config config)
712	864	{
713		− struct device_node *regulators;
714		− u32 prop;
715		− int idx, ret;
	865	+ int id, ret;
	866	+ struct regulator_dev *rdev;
	867	+ struct palmas_reg_init *reg_init;
	868	+ struct palmas_regs_info *rinfo;
	869	+ struct regulator_desc *desc;
716	870
717		− node = of_node_get(node);
718		− regulators = of_get_child_by_name(node, "regulators");
719		− if (!regulators) {
720		− dev_info(dev, "regulator node not found\n");
721		− return;
722		− }
	871	+ for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
	872	+ if (pdata && pdata->reg_init[id])
	873	+ reg_init = pdata->reg_init[id];
	874	+ else
	875	+ reg_init = NULL;
723	876
724		− ret = of_regulator_match(dev, regulators, palmas_matches,
725		− PALMAS_NUM_REGS);
726		− of_node_put(regulators);
727		− if (ret < 0) {
728		− dev_err(dev, "Error parsing regulator init data: %d\n", ret);
729		− return;
730		− }
	877	+ rinfo = &ddata->palmas_regs_info[id];
	878	+ /* Miss out regulators which are not available due
	879	+ * to alternate functions.
	880	+ */
731	881
732		− for (idx = 0; idx < PALMAS_NUM_REGS; idx++) {
733		− if (!palmas_matches[idx].init_data \|\|
734		− !palmas_matches[idx].of_node)
735		− continue;
	882	+ /* Register the regulators */
	883	+ desc = &pmic->desc[id];
	884	+ desc->name = rinfo->name;
	885	+ desc->id = id;
	886	+ desc->type = REGULATOR_VOLTAGE;
	887	+ desc->owner = THIS_MODULE;
736	888
737		− pdata->reg_data[idx] = palmas_matches[idx].init_data;
	889	+ if (id < PALMAS_REG_REGEN1) {
	890	+ desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
	891	+ if (reg_init && reg_init->roof_floor)
	892	+ desc->ops = &palmas_ops_ext_control_ldo;
	893	+ else
	894	+ desc->ops = &palmas_ops_ldo;
	895	+ desc->min_uV = 900000;
	896	+ desc->uV_step = 50000;
	897	+ desc->linear_min_sel = 1;
	898	+ desc->enable_time = 500;
	899	+ desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
	900	+ rinfo->vsel_addr);
	901	+ desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
	902	+ desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
	903	+ rinfo->ctrl_addr);
	904	+ desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
738	905
739		− pdata->reg_init[idx] = devm_kzalloc(dev,
740		− sizeof(struct palmas_reg_init), GFP_KERNEL);
	906	+ /* Check if LDO8 is in tracking mode or not */
	907	+ if (pdata && (id == PALMAS_REG_LDO8) &&
	908	+ pdata->enable_ldo8_tracking) {
	909	+ palmas_enable_ldo8_track(pmic->palmas);
	910	+ desc->min_uV = 450000;
	911	+ desc->uV_step = 25000;
	912	+ }
741	913
742		− pdata->reg_init[idx]->warm_reset =
743		− of_property_read_bool(palmas_matches[idx].of_node,
744		− "ti,warm-reset");
	914	+ /* LOD6 in vibrator mode will have enable time 2000us */
	915	+ if (pdata && pdata->ldo6_vibrator &&
	916	+ (id == PALMAS_REG_LDO6))
	917	+ desc->enable_time = 2000;
	918	+ } else {
	919	+ desc->n_voltages = 1;
	920	+ if (reg_init && reg_init->roof_floor)
	921	+ desc->ops = &palmas_ops_ext_control_extreg;
	922	+ else
	923	+ desc->ops = &palmas_ops_extreg;
	924	+ desc->enable_reg =
	925	+ PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
	926	+ rinfo->ctrl_addr);
	927	+ desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
	928	+ }
745	929
746		− ret = of_property_read_u32(palmas_matches[idx].of_node,
747		− "ti,roof-floor", &prop);
748		− /* EINVAL: Property not found */
749		− if (ret != -EINVAL) {
750		− int econtrol;
	930	+ if (pdata)
	931	+ config.init_data = pdata->reg_data[id];
	932	+ else
	933	+ config.init_data = NULL;
751	934
752		− /* use default value, when no value is specified */
753		− econtrol = PALMAS_EXT_CONTROL_NSLEEP;
754		− if (!ret) {
755		− switch (prop) {
756		− case 1:
757		− econtrol = PALMAS_EXT_CONTROL_ENABLE1;
758		− break;
759		− case 2:
760		− econtrol = PALMAS_EXT_CONTROL_ENABLE2;
761		− break;
762		− case 3:
763		− econtrol = PALMAS_EXT_CONTROL_NSLEEP;
764		− break;
765		− default:
766		− WARN_ON(1);
767		− dev_warn(dev,
768		− "%s: Invalid roof-floor option: %u\n",
769		− palmas_matches[idx].name, prop);
770		− break;
771		− }
772		− }
773		− pdata->reg_init[idx]->roof_floor = econtrol;
774		− }
	935	+ desc->supply_name = rinfo->sname;
	936	+ config.of_node = ddata->palmas_matches[id].of_node;
775	937
776		− ret = of_property_read_u32(palmas_matches[idx].of_node,
777		− "ti,mode-sleep", &prop);
778		− if (!ret)
779		− pdata->reg_init[idx]->mode_sleep = prop;
	938	+ rdev = devm_regulator_register(pmic->dev, desc, &config);
	939	+ if (IS_ERR(rdev)) {
	940	+ dev_err(pmic->dev,
	941	+ "failed to register %s regulator\n",
	942	+ pdev_name);
	943	+ return PTR_ERR(rdev);
	944	+ }
780	945
781		− ret = of_property_read_bool(palmas_matches[idx].of_node,
782		− "ti,smps-range");
783		− if (ret)
784		− pdata->reg_init[idx]->vsel =
785		− PALMAS_SMPS12_VOLTAGE_RANGE;
	946	+ /* Save regulator for cleanup */
	947	+ pmic->rdev[id] = rdev;
786	948
787		− if (idx == PALMAS_REG_LDO8)
788		− pdata->enable_ldo8_tracking = of_property_read_bool(
789		− palmas_matches[idx].of_node,
790		− "ti,enable-ldo8-tracking");
	949	+ /* Initialise sleep/init values from platform data */
	950	+ if (pdata) {
	951	+ reg_init = pdata->reg_init[id];
	952	+ if (reg_init) {
	953	+ if (id <= ddata->ldo_end)
	954	+ ret = palmas_ldo_init(pmic->palmas, id,
	955	+ reg_init);
	956	+ else
	957	+ ret = palmas_extreg_init(pmic->palmas,
	958	+ id, reg_init);
	959	+ if (ret)
	960	+ return ret;
	961	+ }
	962	+ }
791	963	}
792	964
793		− pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
	965	+ return 0;
794	966	}
795	967
796		−
797		−static int palmas_regulators_probe(struct platform_device *pdev)
	968	+static int tps65917_ldo_registration(struct palmas_pmic *pmic,
	969	+ struct palmas_pmic_driver_data *ddata,
	970	+ struct palmas_pmic_platform_data *pdata,
	971	+ const char *pdev_name,
	972	+ struct regulator_config config)
798	973	{
799		− struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
800		− struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
801		− struct device_node *node = pdev->dev.of_node;
	974	+ int id, ret;
802	975	struct regulator_dev *rdev;
803		− struct regulator_config config = { };
804		− struct palmas_pmic *pmic;
805	976	struct palmas_reg_init *reg_init;
806		− int id = 0, ret;
807		− unsigned int addr, reg;
	977	+ struct palmas_regs_info *rinfo;
	978	+ struct regulator_desc *desc;
808	979
809		− if (node && !pdata) {
810		− pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
	980	+ for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
	981	+ if (pdata && pdata->reg_init[id])
	982	+ reg_init = pdata->reg_init[id];
	983	+ else
	984	+ reg_init = NULL;
811	985
812		− if (!pdata)
813		− return -ENOMEM;
	986	+ /* Miss out regulators which are not available due
	987	+ * to alternate functions.
	988	+ */
	989	+ rinfo = &ddata->palmas_regs_info[id];
814	990
815		− palmas_dt_to_pdata(&pdev->dev, node, pdata);
816		− }
	991	+ /* Register the regulators */
	992	+ desc = &pmic->desc[id];
	993	+ desc->name = rinfo->name;
	994	+ desc->id = id;
	995	+ desc->type = REGULATOR_VOLTAGE;
	996	+ desc->owner = THIS_MODULE;
	997	+
	998	+ if (id < TPS65917_REG_REGEN1) {
	999	+ desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
	1000	+ if (reg_init && reg_init->roof_floor)
	1001	+ desc->ops = &palmas_ops_ext_control_ldo;
	1002	+ else
	1003	+ desc->ops = &tps65917_ops_ldo;
	1004	+ desc->min_uV = 900000;
	1005	+ desc->uV_step = 50000;
	1006	+ desc->linear_min_sel = 1;
	1007	+ desc->enable_time = 500;
	1008	+ desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
	1009	+ rinfo->vsel_addr);
	1010	+ desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
	1011	+ desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
	1012	+ rinfo->ctrl_addr);
	1013	+ desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
	1014	+ /*
	1015	+ * To be confirmed. Discussion on going with PMIC Team.
	1016	+ * It is of the order of ~60mV/uS.
	1017	+ */
	1018	+ desc->ramp_delay = 2500;
	1019	+ } else {
	1020	+ desc->n_voltages = 1;
	1021	+ if (reg_init && reg_init->roof_floor)
	1022	+ desc->ops = &palmas_ops_ext_control_extreg;
	1023	+ else
	1024	+ desc->ops = &palmas_ops_extreg;
	1025	+ desc->enable_reg =
	1026	+ PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
	1027	+ rinfo->ctrl_addr);
	1028	+ desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
	1029	+ }
817	1030
818		− pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
819		− if (!pmic)
820		− return -ENOMEM;
	1031	+ if (pdata)
	1032	+ config.init_data = pdata->reg_data[id];
	1033	+ else
	1034	+ config.init_data = NULL;
821	1035
822		− pmic->dev = &pdev->dev;
823		− pmic->palmas = palmas;
824		− palmas->pmic = pmic;
825		− platform_set_drvdata(pdev, pmic);
	1036	+ desc->supply_name = rinfo->sname;
	1037	+ config.of_node = ddata->palmas_matches[id].of_node;
826	1038
827		− ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
828		− if (ret)
829		− return ret;
	1039	+ rdev = devm_regulator_register(pmic->dev, desc, &config);
	1040	+ if (IS_ERR(rdev)) {
	1041	+ dev_err(pmic->dev,
	1042	+ "failed to register %s regulator\n",
	1043	+ pdev_name);
	1044	+ return PTR_ERR(rdev);
	1045	+ }
830	1046
831		− if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
832		− pmic->smps123 = 1;
	1047	+ /* Save regulator for cleanup */
	1048	+ pmic->rdev[id] = rdev;
833	1049
834		− if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
835		− pmic->smps457 = 1;
	1050	+ /* Initialise sleep/init values from platform data */
	1051	+ if (pdata) {
	1052	+ reg_init = pdata->reg_init[id];
	1053	+ if (reg_init) {
	1054	+ if (id < TPS65917_REG_REGEN1)
	1055	+ ret = palmas_ldo_init(pmic->palmas,
	1056	+ id, reg_init);
	1057	+ else
	1058	+ ret = palmas_extreg_init(pmic->palmas,
	1059	+ id, reg_init);
	1060	+ if (ret)
	1061	+ return ret;
	1062	+ }
	1063	+ }
	1064	+ }
836	1065
837		− config.regmap = palmas->regmap[REGULATOR_SLAVE];
838		− config.dev = &pdev->dev;
839		− config.driver_data = pmic;
	1066	+ return 0;
	1067	+}
840	1068
841		− for (id = 0; id < PALMAS_REG_LDO1; id++) {
	1069	+static int palmas_smps_registration(struct palmas_pmic *pmic,
	1070	+ struct palmas_pmic_driver_data *ddata,
	1071	+ struct palmas_pmic_platform_data *pdata,
	1072	+ const char *pdev_name,
	1073	+ struct regulator_config config)
	1074	+{
	1075	+ int id, ret;
	1076	+ unsigned int addr, reg;
	1077	+ struct regulator_dev *rdev;
	1078	+ struct palmas_reg_init *reg_init;
	1079	+ struct palmas_regs_info *rinfo;
	1080	+ struct regulator_desc *desc;
	1081	+
	1082	+ for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
842	1083	bool ramp_delay_support = false;
843	1084
844	1085	/*
@@ -872,30 +1113,31 @@ static int palmas_regulators_probe(struct platform_device *pdev) · 27 unmodified lines
872	1113	break;
873	1114	case PALMAS_REG_SMPS10_OUT1:
874	1115	case PALMAS_REG_SMPS10_OUT2:
875		− if (!PALMAS_PMIC_HAS(palmas, SMPS10_BOOST))
	1116	+ if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
876	1117	continue;
877	1118	}
	1119	+ rinfo = &ddata->palmas_regs_info[id];
	1120	+ desc = &pmic->desc[id];
878	1121
879	1122	if ((id == PALMAS_REG_SMPS6) \|\| (id == PALMAS_REG_SMPS8))
880	1123	ramp_delay_support = true;
881	1124
882	1125	if (ramp_delay_support) {
883		− addr = palmas_regs_info[id].tstep_addr;
	1126	+ addr = rinfo->tstep_addr;
884	1127	ret = palmas_smps_read(pmic->palmas, addr, &reg);
885	1128	if (ret < 0) {
886		− dev_err(&pdev->dev,
	1129	+ dev_err(pmic->dev,
887	1130	"reading TSTEP reg failed: %d\n", ret);
888	1131	return ret;
889	1132	}
890		− pmic->desc[id].ramp_delay =
891		− palmas_smps_ramp_delay[reg & 0x3];
892		− pmic->ramp_delay[id] = pmic->desc[id].ramp_delay;
	1133	+ desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
	1134	+ pmic->ramp_delay[id] = desc->ramp_delay;
893	1135	}
894	1136
895	1137	/* Initialise sleep/init values from platform data */
896	1138	if (pdata && pdata->reg_init[id]) {
897	1139	reg_init = pdata->reg_init[id];
898		− ret = palmas_smps_init(palmas, id, reg_init);
	1140	+ ret = palmas_smps_init(pmic->palmas, id, reg_init);
899	1141	if (ret)
900	1142	return ret;
901	1143	} else {
@@ -903,31 +1145,28 @@ static int palmas_regulators_probe(struct platform_device *pdev) · 1 unmodified line
903	1145	}
904	1146
905	1147	/* Register the regulators */
906		− pmic->desc[id].name = palmas_regs_info[id].name;
907		− pmic->desc[id].id = id;
	1148	+ desc->name = rinfo->name;
	1149	+ desc->id = id;
908	1150
909	1151	switch (id) {
910	1152	case PALMAS_REG_SMPS10_OUT1:
911	1153	case PALMAS_REG_SMPS10_OUT2:
912		− pmic->desc[id].n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
913		− pmic->desc[id].ops = &palmas_ops_smps10;
914		− pmic->desc[id].vsel_reg =
915		− PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
916		− PALMAS_SMPS10_CTRL);
917		− pmic->desc[id].vsel_mask = SMPS10_VSEL;
918		− pmic->desc[id].enable_reg =
919		− PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
920		− PALMAS_SMPS10_CTRL);
	1154	+ desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
	1155	+ desc->ops = &palmas_ops_smps10;
	1156	+ desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
	1157	+ PALMAS_SMPS10_CTRL);
	1158	+ desc->vsel_mask = SMPS10_VSEL;
	1159	+ desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
	1160	+ PALMAS_SMPS10_CTRL);
921	1161	if (id == PALMAS_REG_SMPS10_OUT1)
922		− pmic->desc[id].enable_mask = SMPS10_SWITCH_EN;
	1162	+ desc->enable_mask = SMPS10_SWITCH_EN;
923	1163	else
924		− pmic->desc[id].enable_mask = SMPS10_BOOST_EN;
925		− pmic->desc[id].bypass_reg =
926		− PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
927		− PALMAS_SMPS10_CTRL);
928		− pmic->desc[id].bypass_mask = SMPS10_BYPASS_EN;
929		− pmic->desc[id].min_uV = 3750000;
930		− pmic->desc[id].uV_step = 1250000;
	1164	+ desc->enable_mask = SMPS10_BOOST_EN;
	1165	+ desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
	1166	+ PALMAS_SMPS10_CTRL);
	1167	+ desc->bypass_mask = SMPS10_BYPASS_EN;
	1168	+ desc->min_uV = 3750000;
	1169	+ desc->uV_step = 1250000;
931	1170	break;
932	1171	default:
933	1172	/*
@@ -936,8 +1175,8 @@ static int palmas_regulators_probe(struct platform_device *pdev) · 2 unmodified lines
936	1175	* otherwise we error in probe with unsupportable
937	1176	* ranges. Read the current smps mode for later use.
938	1177	*/
939		− addr = palmas_regs_info[id].vsel_addr;
940		− pmic->desc[id].n_linear_ranges = 3;
	1178	+ addr = rinfo->vsel_addr;
	1179	+ desc->n_linear_ranges = 3;
941	1180
942	1181	ret = palmas_smps_read(pmic->palmas, addr, &reg);
943	1182	if (ret)
@@ -945,56 +1184,50 @@ static int palmas_regulators_probe(struct platform_device *pdev) · 1 unmodified line
945	1184	if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
946	1185	pmic->range[id] = 1;
947	1186	if (pmic->range[id])
948		− pmic->desc[id].linear_ranges = smps_high_ranges;
	1187	+ desc->linear_ranges = smps_high_ranges;
949	1188	else
950		− pmic->desc[id].linear_ranges = smps_low_ranges;
	1189	+ desc->linear_ranges = smps_low_ranges;
951	1190
952	1191	if (reg_init && reg_init->roof_floor)
953		− pmic->desc[id].ops =
954		− &palmas_ops_ext_control_smps;
	1192	+ desc->ops = &palmas_ops_ext_control_smps;
955	1193	else
956		− pmic->desc[id].ops = &palmas_ops_smps;
957		− pmic->desc[id].n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
958		− pmic->desc[id].vsel_reg =
959		− PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
960		− palmas_regs_info[id].vsel_addr);
961		− pmic->desc[id].vsel_mask =
962		− PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
	1194	+ desc->ops = &palmas_ops_smps;
	1195	+ desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
	1196	+ desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
	1197	+ rinfo->vsel_addr);
	1198	+ desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
963	1199
964	1200	/* Read the smps mode for later use. */
965		− addr = palmas_regs_info[id].ctrl_addr;
	1201	+ addr = rinfo->ctrl_addr;
966	1202	ret = palmas_smps_read(pmic->palmas, addr, &reg);
967	1203	if (ret)
968	1204	return ret;
969	1205	pmic->current_reg_mode[id] = reg &
970	1206	PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
971	1207
972		− pmic->desc[id].enable_reg =
973		− PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
974		− palmas_regs_info[id].ctrl_addr);
975		− pmic->desc[id].enable_mask =
976		− PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
	1208	+ desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
	1209	+ rinfo->ctrl_addr);
	1210	+ desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
977	1211	/* set_mode overrides this value */
978		− pmic->desc[id].enable_val = SMPS_CTRL_MODE_ON;
	1212	+ desc->enable_val = SMPS_CTRL_MODE_ON;
979	1213	}
980	1214
981		− pmic->desc[id].type = REGULATOR_VOLTAGE;
982		− pmic->desc[id].owner = THIS_MODULE;
	1215	+ desc->type = REGULATOR_VOLTAGE;
	1216	+ desc->owner = THIS_MODULE;
983	1217
984	1218	if (pdata)
985	1219	config.init_data = pdata->reg_data[id];
986	1220	else
987	1221	config.init_data = NULL;
988	1222
989		− pmic->desc[id].supply_name = palmas_regs_info[id].sname;
990		− config.of_node = palmas_matches[id].of_node;
	1223	+ desc->supply_name = rinfo->sname;
	1224	+ config.of_node = ddata->palmas_matches[id].of_node;
991	1225
992		− rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id],
993		− &config);
	1226	+ rdev = devm_regulator_register(pmic->dev, desc, &config);
994	1227	if (IS_ERR(rdev)) {
995		− dev_err(&pdev->dev,
	1228	+ dev_err(pmic->dev,
996	1229	"failed to register %s regulator\n",
997		− pdev->name);
	1230	+ pdev_name);
998	1231	return PTR_ERR(rdev);
999	1232	}
1000	1233
@@ -1002,123 +1235,378 @@ static int palmas_regulators_probe(struct platform_device *pdev) · 1 unmodified line
1002	1235	pmic->rdev[id] = rdev;
1003	1236	}
1004	1237
1005		− /* Start this loop from the id left from previous loop */
1006		− for (; id < PALMAS_NUM_REGS; id++) {
1007		− if (pdata && pdata->reg_init[id])
	1238	+ return 0;
	1239	+}
	1240	+
	1241	+static int tps65917_smps_registration(struct palmas_pmic *pmic,
	1242	+ struct palmas_pmic_driver_data *ddata,
	1243	+ struct palmas_pmic_platform_data *pdata,
	1244	+ const char *pdev_name,
	1245	+ struct regulator_config config)
	1246	+{
	1247	+ int id, ret;
	1248	+ unsigned int addr, reg;
	1249	+ struct regulator_dev *rdev;
	1250	+ struct palmas_reg_init *reg_init;
	1251	+ struct palmas_regs_info *rinfo;
	1252	+ struct regulator_desc *desc;
	1253	+
	1254	+ for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
	1255	+ /*
	1256	+ * Miss out regulators which are not available due
	1257	+ * to slaving configurations.
	1258	+ */
	1259	+ desc = &pmic->desc[id];
	1260	+ desc->n_linear_ranges = 3;
	1261	+ if ((id == TPS65917_REG_SMPS2) && pmic->smps12)
	1262	+ continue;
	1263	+
	1264	+ /* Initialise sleep/init values from platform data */
	1265	+ if (pdata && pdata->reg_init[id]) {
1008	1266	reg_init = pdata->reg_init[id];
1009		− else
	1267	+ ret = palmas_smps_init(pmic->palmas, id, reg_init);
	1268	+ if (ret)
	1269	+ return ret;
	1270	+ } else {
1010	1271	reg_init = NULL;
	1272	+ }
	1273	+ rinfo = &ddata->palmas_regs_info[id];
1011	1274
1012		− /* Miss out regulators which are not available due
1013		− * to alternate functions.
	1275	+ /* Register the regulators */
	1276	+ desc->name = rinfo->name;
	1277	+ desc->id = id;
	1278	+
	1279	+ /*
	1280	+ * Read and store the RANGE bit for later use
	1281	+ * This must be done before regulator is probed,
	1282	+ * otherwise we error in probe with unsupportable
	1283	+ * ranges. Read the current smps mode for later use.
1014	1284	*/
	1285	+ addr = rinfo->vsel_addr;
1015	1286
1016		− /* Register the regulators */
1017		− pmic->desc[id].name = palmas_regs_info[id].name;
1018		− pmic->desc[id].id = id;
1019		− pmic->desc[id].type = REGULATOR_VOLTAGE;
1020		− pmic->desc[id].owner = THIS_MODULE;
	1287	+ ret = palmas_smps_read(pmic->palmas, addr, &reg);
	1288	+ if (ret)
	1289	+ return ret;
	1290	+ if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
	1291	+ pmic->range[id] = 1;
1021	1292
1022		− if (id < PALMAS_REG_REGEN1) {
1023		− pmic->desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES;
1024		− if (reg_init && reg_init->roof_floor)
1025		− pmic->desc[id].ops =
1026		− &palmas_ops_ext_control_ldo;
1027		− else
1028		− pmic->desc[id].ops = &palmas_ops_ldo;
1029		− pmic->desc[id].min_uV = 900000;
1030		− pmic->desc[id].uV_step = 50000;
1031		− pmic->desc[id].linear_min_sel = 1;
1032		− pmic->desc[id].enable_time = 500;
1033		− pmic->desc[id].vsel_reg =
1034		− PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1035		− palmas_regs_info[id].vsel_addr);
1036		− pmic->desc[id].vsel_mask =
1037		− PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1038		− pmic->desc[id].enable_reg =
1039		− PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1040		− palmas_regs_info[id].ctrl_addr);
1041		− pmic->desc[id].enable_mask =
1042		− PALMAS_LDO1_CTRL_MODE_ACTIVE;
	1293	+ if (pmic->range[id])
	1294	+ desc->linear_ranges = smps_high_ranges;
	1295	+ else
	1296	+ desc->linear_ranges = smps_low_ranges;
1043	1297
1044		− /* Check if LDO8 is in tracking mode or not */
1045		− if (pdata && (id == PALMAS_REG_LDO8) &&
1046		− pdata->enable_ldo8_tracking) {
1047		− palmas_enable_ldo8_track(palmas);
1048		− pmic->desc[id].min_uV = 450000;
1049		− pmic->desc[id].uV_step = 25000;
1050		− }
	1298	+ if (reg_init && reg_init->roof_floor)
	1299	+ desc->ops = &tps65917_ops_ext_control_smps;
	1300	+ else
	1301	+ desc->ops = &tps65917_ops_smps;
	1302	+ desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
	1303	+ desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
	1304	+ rinfo->vsel_addr);
	1305	+ desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
	1306	+ desc->ramp_delay = 2500;
	1307	+
	1308	+ /* Read the smps mode for later use. */
	1309	+ addr = rinfo->ctrl_addr;
	1310	+ ret = palmas_smps_read(pmic->palmas, addr, &reg);
	1311	+ if (ret)
	1312	+ return ret;
	1313	+ pmic->current_reg_mode[id] = reg &
	1314	+ PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
	1315	+ desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
	1316	+ rinfo->ctrl_addr);
	1317	+ desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
	1318	+ /* set_mode overrides this value */
	1319	+ desc->enable_val = SMPS_CTRL_MODE_ON;
1051	1320
1052		− /* LOD6 in vibrator mode will have enable time 2000us */
1053		− if (pdata && pdata->ldo6_vibrator &&
1054		− (id == PALMAS_REG_LDO6))
1055		− pmic->desc[id].enable_time = 2000;
1056		− } else {
1057		− pmic->desc[id].n_voltages = 1;
1058		− if (reg_init && reg_init->roof_floor)
1059		− pmic->desc[id].ops =
1060		− &palmas_ops_ext_control_extreg;
1061		− else
1062		− pmic->desc[id].ops = &palmas_ops_extreg;
1063		− pmic->desc[id].enable_reg =
1064		− PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
1065		− palmas_regs_info[id].ctrl_addr);
1066		− pmic->desc[id].enable_mask =
1067		− PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1068		− }
	1321	+ desc->type = REGULATOR_VOLTAGE;
	1322	+ desc->owner = THIS_MODULE;
1069	1323
1070	1324	if (pdata)
1071	1325	config.init_data = pdata->reg_data[id];
1072	1326	else
1073	1327	config.init_data = NULL;
1074	1328
1075		− pmic->desc[id].supply_name = palmas_regs_info[id].sname;
1076		− config.of_node = palmas_matches[id].of_node;
	1329	+ desc->supply_name = rinfo->sname;
	1330	+ config.of_node = ddata->palmas_matches[id].of_node;
1077	1331
1078		− rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id],
1079		− &config);
	1332	+ rdev = devm_regulator_register(pmic->dev, desc, &config);
1080	1333	if (IS_ERR(rdev)) {
1081		− dev_err(&pdev->dev,
	1334	+ dev_err(pmic->dev,
1082	1335	"failed to register %s regulator\n",
1083		− pdev->name);
	1336	+ pdev_name);
1084	1337	return PTR_ERR(rdev);
1085	1338	}
1086	1339
1087	1340	/* Save regulator for cleanup */
1088	1341	pmic->rdev[id] = rdev;
	1342	+ }
1089	1343
1090		− /* Initialise sleep/init values from platform data */
1091		− if (pdata) {
1092		− reg_init = pdata->reg_init[id];
1093		− if (reg_init) {
1094		− if (id < PALMAS_REG_REGEN1)
1095		− ret = palmas_ldo_init(palmas,
1096		− id, reg_init);
1097		− else
1098		− ret = palmas_extreg_init(palmas,
1099		− id, reg_init);
1100		− if (ret)
1101		− return ret;
	1344	+ return 0;
	1345	+}
	1346	+
	1347	+static struct of_regulator_match palmas_matches[] = {
	1348	+ { .name = "smps12", },
	1349	+ { .name = "smps123", },
	1350	+ { .name = "smps3", },
	1351	+ { .name = "smps45", },
	1352	+ { .name = "smps457", },
	1353	+ { .name = "smps6", },
	1354	+ { .name = "smps7", },
	1355	+ { .name = "smps8", },
	1356	+ { .name = "smps9", },
	1357	+ { .name = "smps10_out2", },
	1358	+ { .name = "smps10_out1", },
	1359	+ { .name = "ldo1", },
	1360	+ { .name = "ldo2", },
	1361	+ { .name = "ldo3", },
	1362	+ { .name = "ldo4", },
	1363	+ { .name = "ldo5", },
	1364	+ { .name = "ldo6", },
	1365	+ { .name = "ldo7", },
	1366	+ { .name = "ldo8", },
	1367	+ { .name = "ldo9", },
	1368	+ { .name = "ldoln", },
	1369	+ { .name = "ldousb", },
	1370	+ { .name = "regen1", },
	1371	+ { .name = "regen2", },
	1372	+ { .name = "regen3", },
	1373	+ { .name = "sysen1", },
	1374	+ { .name = "sysen2", },
	1375	+};
	1376	+
	1377	+static struct of_regulator_match tps65917_matches[] = {
	1378	+ { .name = "smps1", },
	1379	+ { .name = "smps2", },
	1380	+ { .name = "smps3", },
	1381	+ { .name = "smps4", },
	1382	+ { .name = "smps5", },
	1383	+ { .name = "ldo1", },
	1384	+ { .name = "ldo2", },
	1385	+ { .name = "ldo3", },
	1386	+ { .name = "ldo4", },
	1387	+ { .name = "ldo5", },
	1388	+ { .name = "regen1", },
	1389	+ { .name = "regen2", },
	1390	+ { .name = "regen3", },
	1391	+ { .name = "sysen1", },
	1392	+ { .name = "sysen2", },
	1393	+};
	1394	+
	1395	+static struct palmas_pmic_driver_data palmas_ddata = {
	1396	+ .smps_start = PALMAS_REG_SMPS12,
	1397	+ .smps_end = PALMAS_REG_SMPS10_OUT1,
	1398	+ .ldo_begin = PALMAS_REG_LDO1,
	1399	+ .ldo_end = PALMAS_REG_LDOUSB,
	1400	+ .max_reg = PALMAS_NUM_REGS,
	1401	+ .palmas_regs_info = palmas_generic_regs_info,
	1402	+ .palmas_matches = palmas_matches,
	1403	+ .sleep_req_info = palma_sleep_req_info,
	1404	+ .smps_register = palmas_smps_registration,
	1405	+ .ldo_register = palmas_ldo_registration,
	1406	+};
	1407	+
	1408	+static struct palmas_pmic_driver_data tps65917_ddata = {
	1409	+ .smps_start = TPS65917_REG_SMPS1,
	1410	+ .smps_end = TPS65917_REG_SMPS5,
	1411	+ .ldo_begin = TPS65917_REG_LDO1,
	1412	+ .ldo_end = TPS65917_REG_LDO5,
	1413	+ .max_reg = TPS65917_NUM_REGS,
	1414	+ .palmas_regs_info = tps65917_regs_info,
	1415	+ .palmas_matches = tps65917_matches,
	1416	+ .sleep_req_info = tps65917_sleep_req_info,
	1417	+ .smps_register = tps65917_smps_registration,
	1418	+ .ldo_register = tps65917_ldo_registration,
	1419	+};
	1420	+
	1421	+static void palmas_dt_to_pdata(struct device *dev,
	1422	+ struct device_node *node,
	1423	+ struct palmas_pmic_platform_data *pdata,
	1424	+ struct palmas_pmic_driver_data *ddata)
	1425	+{
	1426	+ struct device_node *regulators;
	1427	+ u32 prop;
	1428	+ int idx, ret;
	1429	+
	1430	+ node = of_node_get(node);
	1431	+ regulators = of_get_child_by_name(node, "regulators");
	1432	+ if (!regulators) {
	1433	+ dev_info(dev, "regulator node not found\n");
	1434	+ return;
	1435	+ }
	1436	+
	1437	+ ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
	1438	+ ddata->max_reg);
	1439	+ of_node_put(regulators);
	1440	+ if (ret < 0) {
	1441	+ dev_err(dev, "Error parsing regulator init data: %d\n", ret);
	1442	+ return;
	1443	+ }
	1444	+
	1445	+ for (idx = 0; idx < ddata->max_reg; idx++) {
	1446	+ if (!ddata->palmas_matches[idx].init_data \|\|
	1447	+ !ddata->palmas_matches[idx].of_node)
	1448	+ continue;
	1449	+
	1450	+ pdata->reg_data[idx] = ddata->palmas_matches[idx].init_data;
	1451	+
	1452	+ pdata->reg_init[idx] = devm_kzalloc(dev,
	1453	+ sizeof(struct palmas_reg_init), GFP_KERNEL);
	1454	+
	1455	+ pdata->reg_init[idx]->warm_reset =
	1456	+ of_property_read_bool(ddata->palmas_matches[idx].of_node,
	1457	+ "ti,warm-reset");
	1458	+
	1459	+ ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
	1460	+ "ti,roof-floor", &prop);
	1461	+ /* EINVAL: Property not found */
	1462	+ if (ret != -EINVAL) {
	1463	+ int econtrol;
	1464	+
	1465	+ /* use default value, when no value is specified */
	1466	+ econtrol = PALMAS_EXT_CONTROL_NSLEEP;
	1467	+ if (!ret) {
	1468	+ switch (prop) {
	1469	+ case 1:
	1470	+ econtrol = PALMAS_EXT_CONTROL_ENABLE1;
	1471	+ break;
	1472	+ case 2:
	1473	+ econtrol = PALMAS_EXT_CONTROL_ENABLE2;
	1474	+ break;
	1475	+ case 3:
	1476	+ econtrol = PALMAS_EXT_CONTROL_NSLEEP;
	1477	+ break;
	1478	+ default:
	1479	+ WARN_ON(1);
	1480	+ dev_warn(dev,
	1481	+ "%s: Invalid roof-floor option: %u\n",
	1482	+ palmas_matches[idx].name, prop);
	1483	+ break;
	1484	+ }
1102	1485	}
	1486	+ pdata->reg_init[idx]->roof_floor = econtrol;
1103	1487	}
1104		− }
1105	1488
	1489	+ ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
	1490	+ "ti,mode-sleep", &prop);
	1491	+ if (!ret)
	1492	+ pdata->reg_init[idx]->mode_sleep = prop;
1106	1493
1107		− return 0;
	1494	+ ret = of_property_read_bool(ddata->palmas_matches[idx].of_node,
	1495	+ "ti,smps-range");
	1496	+ if (ret)
	1497	+ pdata->reg_init[idx]->vsel =
	1498	+ PALMAS_SMPS12_VOLTAGE_RANGE;
	1499	+
	1500	+ if (idx == PALMAS_REG_LDO8)
	1501	+ pdata->enable_ldo8_tracking = of_property_read_bool(
	1502	+ ddata->palmas_matches[idx].of_node,
	1503	+ "ti,enable-ldo8-tracking");
	1504	+ }
	1505	+
	1506	+ pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
1108	1507	}
1109	1508
1110		−static const struct of_device_id of_palmas_match_tbl[] = {
1111		− { .compatible = "ti,palmas-pmic", },
1112		− { .compatible = "ti,twl6035-pmic", },
1113		− { .compatible = "ti,twl6036-pmic", },
1114		− { .compatible = "ti,twl6037-pmic", },
1115		− { .compatible = "ti,tps65913-pmic", },
1116		− { .compatible = "ti,tps65914-pmic", },
1117		− { .compatible = "ti,tps80036-pmic", },
1118		− { .compatible = "ti,tps659038-pmic", },
	1509	+static struct of_device_id of_palmas_match_tbl[] = {
	1510	+ {
	1511	+ .compatible = "ti,palmas-pmic",
	1512	+ .data = &palmas_ddata,
	1513	+ },
	1514	+ {
	1515	+ .compatible = "ti,twl6035-pmic",
	1516	+ .data = &palmas_ddata,
	1517	+ },
	1518	+ {
	1519	+ .compatible = "ti,twl6036-pmic",
	1520	+ .data = &palmas_ddata,
	1521	+ },
	1522	+ {
	1523	+ .compatible = "ti,twl6037-pmic",
	1524	+ .data = &palmas_ddata,
	1525	+ },
	1526	+ {
	1527	+ .compatible = "ti,tps65913-pmic",
	1528	+ .data = &palmas_ddata,
	1529	+ },
	1530	+ {
	1531	+ .compatible = "ti,tps65914-pmic",
	1532	+ .data = &palmas_ddata,
	1533	+ },
	1534	+ {
	1535	+ .compatible = "ti,tps80036-pmic",
	1536	+ .data = &palmas_ddata,
	1537	+ },
	1538	+ {
	1539	+ .compatible = "ti,tps659038-pmic",
	1540	+ .data = &palmas_ddata,
	1541	+ },
	1542	+ {
	1543	+ .compatible = "ti,tps65917-pmic",
	1544	+ .data = &tps65917_ddata,
	1545	+ },
1119	1546	{ /* end */ }
1120	1547	};
1121	1548
	1549	+static int palmas_regulators_probe(struct platform_device *pdev)
	1550	+{
	1551	+ struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
	1552	+ struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
	1553	+ struct device_node *node = pdev->dev.of_node;
	1554	+ struct palmas_pmic_driver_data *driver_data;
	1555	+ struct regulator_config config = { };
	1556	+ struct palmas_pmic *pmic;
	1557	+ const char *pdev_name;
	1558	+ const struct of_device_id *match;
	1559	+ int ret = 0;
	1560	+ unsigned int reg;
	1561	+
	1562	+ match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
	1563	+
	1564	+ if (!match)
	1565	+ return -ENODATA;
	1566	+
	1567	+ driver_data = (struct palmas_pmic_driver_data *)match->data;
	1568	+ pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
	1569	+ if (!pdata)
	1570	+ return -ENOMEM;
	1571	+
	1572	+ pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
	1573	+ if (!pmic)
	1574	+ return -ENOMEM;
	1575	+
	1576	+ pmic->dev = &pdev->dev;
	1577	+ pmic->palmas = palmas;
	1578	+ palmas->pmic = pmic;
	1579	+ platform_set_drvdata(pdev, pmic);
	1580	+ pmic->palmas->pmic_ddata = driver_data;
	1581	+
	1582	+ palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
	1583	+
	1584	+ ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg);
	1585	+ if (ret)
	1586	+ return ret;
	1587	+
	1588	+ if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
	1589	+ pmic->smps123 = 1;
	1590	+
	1591	+ if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
	1592	+ pmic->smps457 = 1;
	1593	+
	1594	+ config.regmap = palmas->regmap[REGULATOR_SLAVE];
	1595	+ config.dev = &pdev->dev;
	1596	+ config.driver_data = pmic;
	1597	+ pdev_name = pdev->name;
	1598	+
	1599	+ ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
	1600	+ config);
	1601	+ if (ret)
	1602	+ return ret;
	1603	+
	1604	+ ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
	1605	+ config);
	1606	+
	1607	+ return ret;
	1608	+}
	1609	+
1122	1610	static struct platform_driver palmas_driver = {
1123	1611	.driver = {
1124	1612	.name = "palmas-pmic",

drivers/regulator/s2mps11.c+1−1

@@ -766,5 +766,5 @@ module_exit(s2mps11_pmic_exit); · 765 unmodified lines
766	766
767	767	/* Module information */
768	768	MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
769		−MODULE_DESCRIPTION("SAMSUNG S2MPS11/S2MPS14 Regulator Driver");
	769	+MODULE_DESCRIPTION("SAMSUNG S2MPS11/S2MPS14/S2MPU02 Regulator Driver");
770	770	MODULE_LICENSE("GPL");

drivers/regulator/s5m8767.c+1−3

@@ -686,7 +686,7 @@ static int s5m8767_pmic_probe(struct platform_device *pdev) · 685 unmodified lines
686	686	struct sec_platform_data *pdata = iodev->pdata;
687	687	struct regulator_config config = { };
688	688	struct s5m8767_info *s5m8767;
689		− int i, ret, size, buck_init;
	689	+ int i, ret, buck_init;
690	690
691	691	if (!pdata) {
692	692	dev_err(pdev->dev.parent, "Platform data not supplied\n");
@@ -725,8 +725,6 @@ static int s5m8767_pmic_probe(struct platform_device *pdev) · 32 unmodified lines
725	725	if (!s5m8767)
726	726	return -ENOMEM;
727	727
728		− size = sizeof(struct regulator_dev ) (S5M8767_REG_MAX - 2);
729		−
730	728	s5m8767->dev = &pdev->dev;
731	729	s5m8767->iodev = iodev;
732	730	s5m8767->num_regulators = pdata->num_regulators;

drivers/regulator/tps65090-regulator.c+42−34

@@ -192,12 +192,14 @@ static struct regulator_ops tps65090_fet_control_ops = { · 191 unmodified lines
192	192	static struct regulator_ops tps65090_ldo_ops = {
193	193	};
194	194
195		−#define tps65090_REG_DESC(_id, _sname, _en_reg, _en_bits, _ops) \
	195	+#define tps65090_REG_DESC(_id, _sname, _en_reg, _en_bits, _nvolt, _volt, _ops) \
196	196	{ \
197	197	.name = "TPS65090_RAILS"#_id, \
198	198	.supply_name = _sname, \
199	199	.id = TPS65090_REGULATOR_##_id, \
	200	+ .n_voltages = _nvolt, \
200	201	.ops = &_ops, \
	202	+ .fixed_uV = _volt, \
201	203	.enable_reg = _en_reg, \
202	204	.enable_val = _en_bits, \
203	205	.enable_mask = _en_bits, \
@@ -205,40 +207,46 @@ static struct regulator_ops tps65090_ldo_ops = { · 1 unmodified line
205	207	.owner = THIS_MODULE, \
206	208	}
207	209
	210	+#define tps65090_REG_FIXEDV(_id, _sname, en_reg, _en_bits, _volt, _ops) \
	211	+ tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 1, _volt, _ops)
	212	+
	213	+#define tps65090_REG_SWITCH(_id, _sname, en_reg, _en_bits, _ops) \
	214	+ tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 0, 0, _ops)
	215	+
208	216	static struct regulator_desc tps65090_regulator_desc[] = {
209		− tps65090_REG_DESC(DCDC1, "vsys1", 0x0C, BIT(CTRL_EN_BIT),
210		− tps65090_reg_control_ops),
211		− tps65090_REG_DESC(DCDC2, "vsys2", 0x0D, BIT(CTRL_EN_BIT),
212		− tps65090_reg_control_ops),
213		− tps65090_REG_DESC(DCDC3, "vsys3", 0x0E, BIT(CTRL_EN_BIT),
214		− tps65090_reg_control_ops),
215		−
216		− tps65090_REG_DESC(FET1, "infet1", 0x0F,
217		− BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
218		− tps65090_fet_control_ops),
219		− tps65090_REG_DESC(FET2, "infet2", 0x10,
220		− BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
221		− tps65090_fet_control_ops),
222		− tps65090_REG_DESC(FET3, "infet3", 0x11,
223		− BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
224		− tps65090_fet_control_ops),
225		− tps65090_REG_DESC(FET4, "infet4", 0x12,
226		− BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
227		− tps65090_fet_control_ops),
228		− tps65090_REG_DESC(FET5, "infet5", 0x13,
229		− BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
230		− tps65090_fet_control_ops),
231		− tps65090_REG_DESC(FET6, "infet6", 0x14,
232		− BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
233		− tps65090_fet_control_ops),
234		− tps65090_REG_DESC(FET7, "infet7", 0x15,
235		− BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
236		− tps65090_fet_control_ops),
237		−
238		− tps65090_REG_DESC(LDO1, "vsys-l1", 0, 0,
239		− tps65090_ldo_ops),
240		− tps65090_REG_DESC(LDO2, "vsys-l2", 0, 0,
241		− tps65090_ldo_ops),
	217	+ tps65090_REG_FIXEDV(DCDC1, "vsys1", 0x0C, BIT(CTRL_EN_BIT), 5000000,
	218	+ tps65090_reg_control_ops),
	219	+ tps65090_REG_FIXEDV(DCDC2, "vsys2", 0x0D, BIT(CTRL_EN_BIT), 3300000,
	220	+ tps65090_reg_control_ops),
	221	+ tps65090_REG_SWITCH(DCDC3, "vsys3", 0x0E, BIT(CTRL_EN_BIT),
	222	+ tps65090_reg_control_ops),
	223	+
	224	+ tps65090_REG_SWITCH(FET1, "infet1", 0x0F,
	225	+ BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
	226	+ tps65090_fet_control_ops),
	227	+ tps65090_REG_SWITCH(FET2, "infet2", 0x10,
	228	+ BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
	229	+ tps65090_fet_control_ops),
	230	+ tps65090_REG_SWITCH(FET3, "infet3", 0x11,
	231	+ BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
	232	+ tps65090_fet_control_ops),
	233	+ tps65090_REG_SWITCH(FET4, "infet4", 0x12,
	234	+ BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
	235	+ tps65090_fet_control_ops),
	236	+ tps65090_REG_SWITCH(FET5, "infet5", 0x13,
	237	+ BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
	238	+ tps65090_fet_control_ops),
	239	+ tps65090_REG_SWITCH(FET6, "infet6", 0x14,
	240	+ BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
	241	+ tps65090_fet_control_ops),
	242	+ tps65090_REG_SWITCH(FET7, "infet7", 0x15,
	243	+ BIT(CTRL_EN_BIT) \| BIT(CTRL_PG_BIT),
	244	+ tps65090_fet_control_ops),
	245	+
	246	+ tps65090_REG_FIXEDV(LDO1, "vsys-l1", 0, 0, 5000000,
	247	+ tps65090_ldo_ops),
	248	+ tps65090_REG_FIXEDV(LDO2, "vsys-l2", 0, 0, 3300000,
	249	+ tps65090_ldo_ops),
242	250	};
243	251
244	252	static inline bool is_dcdc(int id)

drivers/regulator/tps65217-regulator.c+2−2

@@ -68,7 +68,7 @@ static const struct regulator_linear_range tps65217_uv2_ranges[] = { · 67 unmodified lines
68	68	static int tps65217_pmic_enable(struct regulator_dev *dev)
69	69	{
70	70	struct tps65217 *tps = rdev_get_drvdata(dev);
71		− unsigned int rid = rdev_get_id(dev);
	71	+ int rid = rdev_get_id(dev);
72	72
73	73	if (rid < TPS65217_DCDC_1 \|\| rid > TPS65217_LDO_4)
74	74	return -EINVAL;
@@ -82,7 +82,7 @@ static int tps65217_pmic_enable(struct regulator_dev *dev) · 7 unmodified lines
82	82	static int tps65217_pmic_disable(struct regulator_dev *dev)
83	83	{
84	84	struct tps65217 *tps = rdev_get_drvdata(dev);
85		− unsigned int rid = rdev_get_id(dev);
	85	+ int rid = rdev_get_id(dev);
86	86
87	87	if (rid < TPS65217_DCDC_1 \|\| rid > TPS65217_LDO_4)
88	88	return -EINVAL;

drivers/regulator/tps65218-regulator.c+26−26

@@ -29,8 +29,8 @@ · 28 unmodified lines
29	29
30	30	enum tps65218_regulators { DCDC1, DCDC2, DCDC3, DCDC4, DCDC5, DCDC6, LDO1 };
31	31
32		−#define TPS65218_REGULATOR(_name, _id, _ops, _n, _vr, _vm, _er, _em, _t, \
33		− _lr, _nlr, _delay) \
	32	+#define TPS65218_REGULATOR(_name, _id, _ops, _n, _vr, _vm, _er, _em, \
	33	+ _lr, _nlr, _delay, _fuv) \
34	34	{ \
35	35	.name = _name, \
36	36	.id = _id, \
@@ -42,14 +42,15 @@ enum tps65218_regulators { DCDC1, DCDC2, DCDC3, DCDC4, DCDC5, DCDC6, LDO1 }; · 5 unmodified lines
42	42	.vsel_mask = _vm, \
43	43	.enable_reg = _er, \
44	44	.enable_mask = _em, \
45		− .volt_table = _t, \
	45	+ .volt_table = NULL, \
46	46	.linear_ranges = _lr, \
47	47	.n_linear_ranges = _nlr, \
48	48	.ramp_delay = _delay, \
	49	+ .fixed_uV = _fuv \
49	50	} \
50	51
51	52	#define TPS65218_INFO(_id, _nm, _min, _max) \
52		− { \
	53	+ [_id] = { \
53	54	.id = _id, \
54	55	.name = _nm, \
55	56	.min_uV = _min, \
@@ -68,17 +69,17 @@ static const struct regulator_linear_range ldo1_dcdc3_ranges[] = { · 12 unmodified lines
68	69
69	70	static const struct regulator_linear_range dcdc4_ranges[] = {
70	71	REGULATOR_LINEAR_RANGE(1175000, 0x0, 0xf, 25000),
71		− REGULATOR_LINEAR_RANGE(1550000, 0x10, 0x34, 50000),
	72	+ REGULATOR_LINEAR_RANGE(1600000, 0x10, 0x34, 50000),
72	73	};
73	74
74	75	static struct tps_info tps65218_pmic_regs[] = {
75		− TPS65218_INFO(0, "DCDC1", 850000, 167500),
76		− TPS65218_INFO(1, "DCDC2", 850000, 1675000),
77		− TPS65218_INFO(2, "DCDC3", 900000, 3400000),
78		− TPS65218_INFO(3, "DCDC4", 1175000, 3400000),
79		− TPS65218_INFO(4, "DCDC5", 1000000, 1000000),
80		− TPS65218_INFO(5, "DCDC6", 1800000, 1800000),
81		− TPS65218_INFO(6, "LDO1", 900000, 3400000),
	76	+ TPS65218_INFO(DCDC1, "DCDC1", 850000, 167500),
	77	+ TPS65218_INFO(DCDC2, "DCDC2", 850000, 1675000),
	78	+ TPS65218_INFO(DCDC3, "DCDC3", 900000, 3400000),
	79	+ TPS65218_INFO(DCDC4, "DCDC4", 1175000, 3400000),
	80	+ TPS65218_INFO(DCDC5, "DCDC5", 1000000, 1000000),
	81	+ TPS65218_INFO(DCDC6, "DCDC6", 1800000, 1800000),
	82	+ TPS65218_INFO(LDO1, "LDO1", 900000, 3400000),
82	83	};
83	84
84	85	#define TPS65218_OF_MATCH(comp, label) \
@@ -127,7 +128,7 @@ static int tps65218_pmic_set_voltage_sel(struct regulator_dev *dev, · 42 unmodified lines
127	128	static int tps65218_pmic_enable(struct regulator_dev *dev)
128	129	{
129	130	struct tps65218 *tps = rdev_get_drvdata(dev);
130		− unsigned int rid = rdev_get_id(dev);
	131	+ int rid = rdev_get_id(dev);
131	132
132	133	if (rid < TPS65218_DCDC_1 \|\| rid > TPS65218_LDO_1)
133	134	return -EINVAL;
@@ -141,7 +142,7 @@ static int tps65218_pmic_enable(struct regulator_dev *dev) · 7 unmodified lines
141	142	static int tps65218_pmic_disable(struct regulator_dev *dev)
142	143	{
143	144	struct tps65218 *tps = rdev_get_drvdata(dev);
144		− unsigned int rid = rdev_get_id(dev);
	145	+ int rid = rdev_get_id(dev);
145	146
146	147	if (rid < TPS65218_DCDC_1 \|\| rid > TPS65218_LDO_1)
147	148	return -EINVAL;
@@ -185,34 +186,33 @@ static const struct regulator_desc regulators[] = { · 37 unmodified lines
185	186	TPS65218_REGULATOR("DCDC1", TPS65218_DCDC_1, tps65218_dcdc12_ops, 64,
186	187	TPS65218_REG_CONTROL_DCDC1,
187	188	TPS65218_CONTROL_DCDC1_MASK,
188		− TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC1_EN, NULL,
189		− dcdc1_dcdc2_ranges, 2, 4000),
	189	+ TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC1_EN,
	190	+ dcdc1_dcdc2_ranges, 2, 4000, 0),
190	191	TPS65218_REGULATOR("DCDC2", TPS65218_DCDC_2, tps65218_dcdc12_ops, 64,
191	192	TPS65218_REG_CONTROL_DCDC2,
192	193	TPS65218_CONTROL_DCDC2_MASK,
193		− TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC2_EN, NULL,
194		− dcdc1_dcdc2_ranges, 2, 4000),
	194	+ TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC2_EN,
	195	+ dcdc1_dcdc2_ranges, 2, 4000, 0),
195	196	TPS65218_REGULATOR("DCDC3", TPS65218_DCDC_3, tps65218_ldo1_dcdc34_ops,
196	197	64, TPS65218_REG_CONTROL_DCDC3,
197	198	TPS65218_CONTROL_DCDC3_MASK, TPS65218_REG_ENABLE1,
198		− TPS65218_ENABLE1_DC3_EN, NULL,
199		− ldo1_dcdc3_ranges, 2, 0),
	199	+ TPS65218_ENABLE1_DC3_EN, ldo1_dcdc3_ranges, 2, 0, 0),
200	200	TPS65218_REGULATOR("DCDC4", TPS65218_DCDC_4, tps65218_ldo1_dcdc34_ops,
201	201	53, TPS65218_REG_CONTROL_DCDC4,
202	202	TPS65218_CONTROL_DCDC4_MASK,
203		− TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC4_EN, NULL,
204		− dcdc4_ranges, 2, 0),
	203	+ TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC4_EN,
	204	+ dcdc4_ranges, 2, 0, 0),
205	205	TPS65218_REGULATOR("DCDC5", TPS65218_DCDC_5, tps65218_dcdc56_pmic_ops,
206	206	1, -1, -1, TPS65218_REG_ENABLE1,
207		− TPS65218_ENABLE1_DC5_EN, NULL, NULL, 0, 0),
	207	+ TPS65218_ENABLE1_DC5_EN, NULL, 0, 0, 1000000),
208	208	TPS65218_REGULATOR("DCDC6", TPS65218_DCDC_6, tps65218_dcdc56_pmic_ops,
209	209	1, -1, -1, TPS65218_REG_ENABLE1,
210		− TPS65218_ENABLE1_DC6_EN, NULL, NULL, 0, 0),
	210	+ TPS65218_ENABLE1_DC6_EN, NULL, 0, 0, 1800000),
211	211	TPS65218_REGULATOR("LDO1", TPS65218_LDO_1, tps65218_ldo1_dcdc34_ops, 64,
212	212	TPS65218_REG_CONTROL_LDO1,
213	213	TPS65218_CONTROL_LDO1_MASK, TPS65218_REG_ENABLE2,
214		− TPS65218_ENABLE2_LDO1_EN, NULL, ldo1_dcdc3_ranges,
215		− 2, 0),
	214	+ TPS65218_ENABLE2_LDO1_EN, ldo1_dcdc3_ranges,
	215	+ 2, 0, 0),
216	216	};
217	217
218	218	static int tps65218_regulator_probe(struct platform_device *pdev)

drivers/regulator/tps6586x-regulator.c+68−61

@@ -74,6 +74,16 @@ static struct regulator_ops tps6586x_rw_regulator_ops = { · 73 unmodified lines
74	74	.disable = regulator_disable_regmap,
75	75	};
76	76
	77	+static struct regulator_ops tps6586x_rw_linear_regulator_ops = {
	78	+ .list_voltage = regulator_list_voltage_linear,
	79	+ .get_voltage_sel = regulator_get_voltage_sel_regmap,
	80	+ .set_voltage_sel = regulator_set_voltage_sel_regmap,
	81	+
	82	+ .is_enabled = regulator_is_enabled_regmap,
	83	+ .enable = regulator_enable_regmap,
	84	+ .disable = regulator_disable_regmap,
	85	+};
	86	+
77	87	static struct regulator_ops tps6586x_ro_regulator_ops = {
78	88	.list_voltage = regulator_list_voltage_table,
79	89	.map_voltage = regulator_map_voltage_ascend,
@@ -91,48 +101,11 @@ static const unsigned int tps6586x_ldo0_voltages[] = { · 11 unmodified lines
91	101	1200000, 1500000, 1800000, 2500000, 2700000, 2850000, 3100000, 3300000,
92	102	};
93	103
94		−static const unsigned int tps6586x_ldo4_voltages[] = {
95		− 1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000,
96		− 1900000, 1925000, 1950000, 1975000, 2000000, 2025000, 2050000, 2075000,
97		− 2100000, 2125000, 2150000, 2175000, 2200000, 2225000, 2250000, 2275000,
98		− 2300000, 2325000, 2350000, 2375000, 2400000, 2425000, 2450000, 2475000,
99		−};
100		−
101		−#define tps658623_sm2_voltages tps6586x_ldo4_voltages
102		−
103	104	static const unsigned int tps6586x_ldo_voltages[] = {
104	105	1250000, 1500000, 1800000, 2500000, 2700000, 2850000, 3100000, 3300000,
105	106	};
106	107
107		−static const unsigned int tps6586x_sm2_voltages[] = {
108		− 3000000, 3050000, 3100000, 3150000, 3200000, 3250000, 3300000, 3350000,
109		− 3400000, 3450000, 3500000, 3550000, 3600000, 3650000, 3700000, 3750000,
110		− 3800000, 3850000, 3900000, 3950000, 4000000, 4050000, 4100000, 4150000,
111		− 4200000, 4250000, 4300000, 4350000, 4400000, 4450000, 4500000, 4550000,
112		−};
113		−
114		−static int tps658640_sm2_voltages[] = {
115		− 2150000, 2200000, 2250000, 2300000, 2350000, 2400000, 2450000, 2500000,
116		− 2550000, 2600000, 2650000, 2700000, 2750000, 2800000, 2850000, 2900000,
117		− 2950000, 3000000, 3050000, 3100000, 3150000, 3200000, 3250000, 3300000,
118		− 3350000, 3400000, 3450000, 3500000, 3550000, 3600000, 3650000, 3700000,
119		−};
120		−
121		−static const unsigned int tps658643_sm2_voltages[] = {
122		− 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000,
123		− 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000, 1400000,
124		− 1425000, 1450000, 1475000, 1500000, 1525000, 1550000, 1575000, 1600000,
125		− 1625000, 1650000, 1675000, 1700000, 1725000, 1750000, 1775000, 1800000,
126		−};
127		−
128		−static const unsigned int tps6586x_dvm_voltages[] = {
129		− 725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000,
130		− 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000,
131		− 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000,
132		− 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000,
133		−};
134		−
135		−static int tps658640_rtc_voltages[] = {
	108	+static const unsigned int tps658640_rtc_voltages[] = {
136	109	2500000, 2850000, 3100000, 3300000,
137	110	};
138	111
@@ -159,6 +132,31 @@ static int tps658640_rtc_voltages[] = { · 20 unmodified lines
159	132	.enable_reg[1] = TPS6586X_SUPPLY##ereg1, \
160	133	.enable_bit[1] = (ebit1),
161	134
	135	+#define TPS6586X_REGULATOR_LINEAR(_id, _ops, _pin_name, n_volt, min_uv, \
	136	+ uv_step, vreg, shift, nbits, ereg0, \
	137	+ ebit0, ereg1, ebit1, goreg, gobit) \
	138	+ .desc = { \
	139	+ .supply_name = _pin_name, \
	140	+ .name = "REG-" #_id, \
	141	+ .ops = &tps6586x_## _ops ## _regulator_ops, \
	142	+ .type = REGULATOR_VOLTAGE, \
	143	+ .id = TPS6586X_ID_##_id, \
	144	+ .n_voltages = n_volt, \
	145	+ .min_uV = min_uv, \
	146	+ .uV_step = uv_step, \
	147	+ .owner = THIS_MODULE, \
	148	+ .enable_reg = TPS6586X_SUPPLY##ereg0, \
	149	+ .enable_mask = 1 << (ebit0), \
	150	+ .vsel_reg = TPS6586X_##vreg, \
	151	+ .vsel_mask = ((1 << (nbits)) - 1) << (shift), \
	152	+ .apply_reg = (goreg), \
	153	+ .apply_bit = (gobit), \
	154	+ }, \
	155	+ .enable_reg[0] = TPS6586X_SUPPLY##ereg0, \
	156	+ .enable_bit[0] = (ebit0), \
	157	+ .enable_reg[1] = TPS6586X_SUPPLY##ereg1, \
	158	+ .enable_bit[1] = (ebit1),
	159	+
162	160	#define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \
163	161	ereg0, ebit0, ereg1, ebit1) \
164	162	{ \
@@ -166,6 +164,14 @@ static int tps658640_rtc_voltages[] = { · 1 unmodified line
166	164	ereg0, ebit0, ereg1, ebit1, 0, 0) \
167	165	}
168	166
	167	+#define TPS6586X_LDO_LINEAR(_id, _pname, n_volt, min_uv, uv_step, vreg, \
	168	+ shift, nbits, ereg0, ebit0, ereg1, ebit1) \
	169	+{ \
	170	+ TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \
	171	+ min_uv, uv_step, vreg, shift, nbits, \
	172	+ ereg0, ebit0, ereg1, ebit1, 0, 0) \
	173	+}
	174	+
169	175	#define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \
170	176	ereg0, ebit0, ereg1, ebit1) \
171	177	{ \
@@ -173,11 +179,13 @@ static int tps658640_rtc_voltages[] = { · 1 unmodified line
173	179	ereg0, ebit0, ereg1, ebit1, 0, 0) \
174	180	}
175	181
176		−#define TPS6586X_DVM(_id, _pname, vdata, vreg, shift, nbits, \
177		− ereg0, ebit0, ereg1, ebit1, goreg, gobit) \
	182	+#define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \
	183	+ nbits, ereg0, ebit0, ereg1, ebit1, goreg, gobit) \
178	184	{ \
179		− TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \
180		− ereg0, ebit0, ereg1, ebit1, goreg, gobit) \
	185	+ TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \
	186	+ min_uv, uv_step, vreg, shift, nbits, \
	187	+ ereg0, ebit0, ereg1, ebit1, goreg, \
	188	+ gobit) \
181	189	}
182	190
183	191	#define TPS6586X_SYS_REGULATOR() \
@@ -210,24 +218,23 @@ static struct tps6586x_regulator tps6586x_regulator[] = { · 26 unmodified lines
210	218	ENE, 7),
211	219	TPS6586X_LDO(LDO_RTC, "REG-SYS", tps6586x_ldo, SUPPLYV4, 3, 3, V4, 7,
212	220	V4, 7),
213		− TPS6586X_LDO(LDO_1, "vinldo01", tps6586x_dvm, SUPPLYV1, 0, 5, ENC, 1,
214		− END, 1),
215		− TPS6586X_LDO(SM_2, "vin-sm2", tps6586x_sm2, SUPPLYV2, 0, 5, ENC, 7,
216		− END, 7),
217		−
218		− TPS6586X_DVM(LDO_2, "vinldo23", tps6586x_dvm, LDO2BV1, 0, 5, ENA, 3,
219		− ENB, 3, TPS6586X_VCC2, BIT(6)),
220		− TPS6586X_DVM(LDO_4, "vinldo4", tps6586x_ldo4, LDO4V1, 0, 5, ENC, 3,
221		− END, 3, TPS6586X_VCC1, BIT(6)),
222		− TPS6586X_DVM(SM_0, "vin-sm0", tps6586x_dvm, SM0V1, 0, 5, ENA, 1,
223		− ENB, 1, TPS6586X_VCC1, BIT(2)),
224		− TPS6586X_DVM(SM_1, "vin-sm1", tps6586x_dvm, SM1V1, 0, 5, ENA, 0,
225		− ENB, 0, TPS6586X_VCC1, BIT(0)),
	221	+ TPS6586X_LDO_LINEAR(LDO_1, "vinldo01", 32, 725000, 25000, SUPPLYV1,
	222	+ 0, 5, ENC, 1, END, 1),
	223	+ TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 3000000, 50000, SUPPLYV2,
	224	+ 0, 5, ENC, 7, END, 7),
	225	+ TPS6586X_DVM(LDO_2, "vinldo23", 32, 725000, 25000, LDO2BV1, 0, 5,
	226	+ ENA, 3, ENB, 3, TPS6586X_VCC2, BIT(6)),
	227	+ TPS6586X_DVM(LDO_4, "vinldo4", 32, 1700000, 25000, LDO4V1, 0, 5,
	228	+ ENC, 3, END, 3, TPS6586X_VCC1, BIT(6)),
	229	+ TPS6586X_DVM(SM_0, "vin-sm0", 32, 725000, 25000, SM0V1, 0, 5,
	230	+ ENA, 1, ENB, 1, TPS6586X_VCC1, BIT(2)),
	231	+ TPS6586X_DVM(SM_1, "vin-sm1", 32, 725000, 25000, SM1V1, 0, 5,
	232	+ ENA, 0, ENB, 0, TPS6586X_VCC1, BIT(0)),
226	233	};
227	234
228	235	static struct tps6586x_regulator tps658623_regulator[] = {
229		− TPS6586X_LDO(SM_2, "vin-sm2", tps658623_sm2, SUPPLYV2, 0, 5, ENC, 7,
230		− END, 7),
	236	+ TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 1700000, 25000, SUPPLYV2,
	237	+ 0, 5, ENC, 7, END, 7),
231	238	};
232	239
233	240	static struct tps6586x_regulator tps658640_regulator[] = {
@@ -243,16 +250,16 @@ static struct tps6586x_regulator tps658640_regulator[] = { · 9 unmodified lines
243	250	ENC, 6, END, 6),
244	251	TPS6586X_LDO(LDO_9, "vinldo9", tps6586x_ldo0, SUPPLYV6, 3, 3,
245	252	ENE, 7, ENE, 7),
246		− TPS6586X_LDO(SM_2, "vin-sm2", tps658640_sm2, SUPPLYV2, 0, 5,
247		− ENC, 7, END, 7),
	253	+ TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 2150000, 50000, SUPPLYV2,
	254	+ 0, 5, ENC, 7, END, 7),
248	255
249	256	TPS6586X_FIXED_LDO(LDO_RTC, "REG-SYS", tps658640_rtc, SUPPLYV4, 3, 2,
250	257	V4, 7, V4, 7),
251	258	};
252	259
253	260	static struct tps6586x_regulator tps658643_regulator[] = {
254		− TPS6586X_LDO(SM_2, "vin-sm2", tps658643_sm2, SUPPLYV2, 0, 5, ENC, 7,
255		− END, 7),
	261	+ TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 1025000, 25000, SUPPLYV2,
	262	+ 0, 5, ENC, 7, END, 7),
256	263	};
257	264
258	265	/*

drivers/regulator/twl-regulator.c+1−12

@@ -1128,7 +1128,7 @@ static int twlreg_probe(struct platform_device *pdev) · 1127 unmodified lines
1128	1128	if (!initdata)
1129	1129	return -EINVAL;
1130	1130
1131		− info = kmemdup(template, sizeof(*info), GFP_KERNEL);
	1131	+ info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL);
1132	1132	if (!info)
1133	1133	return -ENOMEM;
1134	1134
@@ -1192,7 +1192,6 @@ static int twlreg_probe(struct platform_device *pdev) · 57 unmodified lines
1192	1192	if (IS_ERR(rdev)) {
1193	1193	dev_err(&pdev->dev, "can't register %s, %ld\n",
1194	1194	info->desc.name, PTR_ERR(rdev));
1195		− kfree(info);
1196	1195	return PTR_ERR(rdev);
1197	1196	}
1198	1197	platform_set_drvdata(pdev, rdev);
@@ -1212,20 +1211,10 @@ static int twlreg_probe(struct platform_device *pdev) · 13 unmodified lines
1212	1211	return 0;
1213	1212	}
1214	1213
1215		−static int twlreg_remove(struct platform_device *pdev)
1216		−{
1217		− struct regulator_dev *rdev = platform_get_drvdata(pdev);
1218		− struct twlreg_info *info = rdev->reg_data;
1219		−
1220		− kfree(info);
1221		− return 0;
1222		−}
1223		−
1224	1214	MODULE_ALIAS("platform:twl_reg");
1225	1215
1226	1216	static struct platform_driver twlreg_driver = {
1227	1217	.probe = twlreg_probe,
1228		− .remove = twlreg_remove,
1229	1218	/* NOTE: short name, to work around driver model truncation of
1230	1219	* "twl_regulator.12" (and friends) to "twl_regulator.1".
1231	1220	*/

include/linux/mfd/palmas.h+837−0

@@ -30,6 +30,8 @@ · 29 unmodified lines
30	30	#define PALMAS_CHIP_ID 0xC035
31	31	#define PALMAS_CHIP_CHARGER_ID 0xC036
32	32
	33	+#define TPS65917_RESERVED -1
	34	+
33	35	#define is_palmas(a) (((a) == PALMAS_CHIP_OLD_ID) \|\| \
34	36	((a) == PALMAS_CHIP_ID))
35	37	#define is_palmas_charger(a) ((a) == PALMAS_CHIP_CHARGER_ID)
@@ -51,6 +53,8 @@ struct palmas_pmic; · 15 unmodified lines
51	53	struct palmas_gpadc;
52	54	struct palmas_resource;
53	55	struct palmas_usb;
	56	+struct palmas_pmic_driver_data;
	57	+struct palmas_pmic_platform_data;
54	58
55	59	enum palmas_usb_state {
56	60	PALMAS_USB_STATE_DISCONNECT,
@@ -74,6 +78,8 @@ struct palmas { · 17 unmodified lines
74	78	struct mutex irq_lock;
75	79	struct regmap_irq_chip_data *irq_data;
76	80
	81	+ struct palmas_pmic_driver_data *pmic_ddata;
	82	+
77	83	/* Child Devices */
78	84	struct palmas_pmic *pmic;
79	85	struct palmas_gpadc *gpadc;
@@ -86,6 +92,46 @@ struct palmas { · 6 unmodified lines
86	92	u8 pwm_muxed;
87	93	};
88	94
	95	+#define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 \| \
	96	+ PALMAS_EXT_CONTROL_ENABLE2 \| \
	97	+ PALMAS_EXT_CONTROL_NSLEEP)
	98	+
	99	+struct palmas_sleep_requestor_info {
	100	+ int id;
	101	+ int reg_offset;
	102	+ int bit_pos;
	103	+};
	104	+
	105	+struct palmas_regs_info {
	106	+ char *name;
	107	+ char *sname;
	108	+ u8 vsel_addr;
	109	+ u8 ctrl_addr;
	110	+ u8 tstep_addr;
	111	+ int sleep_id;
	112	+};
	113	+
	114	+struct palmas_pmic_driver_data {
	115	+ int smps_start;
	116	+ int smps_end;
	117	+ int ldo_begin;
	118	+ int ldo_end;
	119	+ int max_reg;
	120	+ struct palmas_regs_info *palmas_regs_info;
	121	+ struct of_regulator_match *palmas_matches;
	122	+ struct palmas_sleep_requestor_info *sleep_req_info;
	123	+ int (smps_register)(struct palmas_pmic pmic,
	124	+ struct palmas_pmic_driver_data *ddata,
	125	+ struct palmas_pmic_platform_data *pdata,
	126	+ const char *pdev_name,
	127	+ struct regulator_config config);
	128	+ int (ldo_register)(struct palmas_pmic pmic,
	129	+ struct palmas_pmic_driver_data *ddata,
	130	+ struct palmas_pmic_platform_data *pdata,
	131	+ const char *pdev_name,
	132	+ struct regulator_config config);
	133	+};
	134	+
89	135	struct palmas_gpadc_platform_data {
90	136	/* Channel 3 current source is only enabled during conversion */
91	137	int ch3_current;
@@ -184,6 +230,27 @@ enum palmas_regulators { · 92 unmodified lines
184	230	PALMAS_NUM_REGS,
185	231	};
186	232
	233	+enum tps65917_regulators {
	234	+ /* SMPS regulators */
	235	+ TPS65917_REG_SMPS1,
	236	+ TPS65917_REG_SMPS2,
	237	+ TPS65917_REG_SMPS3,
	238	+ TPS65917_REG_SMPS4,
	239	+ TPS65917_REG_SMPS5,
	240	+ /* LDO regulators */
	241	+ TPS65917_REG_LDO1,
	242	+ TPS65917_REG_LDO2,
	243	+ TPS65917_REG_LDO3,
	244	+ TPS65917_REG_LDO4,
	245	+ TPS65917_REG_LDO5,
	246	+ TPS65917_REG_REGEN1,
	247	+ TPS65917_REG_REGEN2,
	248	+ TPS65917_REG_REGEN3,
	249	+
	250	+ /* Total number of regulators */
	251	+ TPS65917_NUM_REGS,
	252	+};
	253	+
187	254	/* External controll signal name */
188	255	enum {
189	256	PALMAS_EXT_CONTROL_ENABLE1 = 0x1,
@@ -228,6 +295,24 @@ enum palmas_external_requestor_id { · 38 unmodified lines
228	295	PALMAS_EXTERNAL_REQSTR_ID_MAX,
229	296	};
230	297
	298	+enum tps65917_external_requestor_id {
	299	+ TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
	300	+ TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
	301	+ TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
	302	+ TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
	303	+ TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
	304	+ TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
	305	+ TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
	306	+ TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
	307	+ TPS65917_EXTERNAL_REQSTR_ID_LDO1,
	308	+ TPS65917_EXTERNAL_REQSTR_ID_LDO2,
	309	+ TPS65917_EXTERNAL_REQSTR_ID_LDO3,
	310	+ TPS65917_EXTERNAL_REQSTR_ID_LDO4,
	311	+ TPS65917_EXTERNAL_REQSTR_ID_LDO5,
	312	+ /* Last entry */
	313	+ TPS65917_EXTERNAL_REQSTR_ID_MAX,
	314	+};
	315	+
231	316	struct palmas_pmic_platform_data {
232	317	/* An array of pointers to regulator init data indexed by regulator
233	318	* ID
@@ -349,6 +434,48 @@ struct palmas_gpadc_result { · 115 unmodified lines
349	434
350	435	#define PALMAS_MAX_CHANNELS 16
351	436
	437	+/* Define the tps65917 IRQ numbers */
	438	+enum tps65917_irqs {
	439	+ /* INT1 registers */
	440	+ TPS65917_RESERVED1,
	441	+ TPS65917_PWRON_IRQ,
	442	+ TPS65917_LONG_PRESS_KEY_IRQ,
	443	+ TPS65917_RESERVED2,
	444	+ TPS65917_PWRDOWN_IRQ,
	445	+ TPS65917_HOTDIE_IRQ,
	446	+ TPS65917_VSYS_MON_IRQ,
	447	+ TPS65917_RESERVED3,
	448	+ /* INT2 registers */
	449	+ TPS65917_RESERVED4,
	450	+ TPS65917_OTP_ERROR_IRQ,
	451	+ TPS65917_WDT_IRQ,
	452	+ TPS65917_RESERVED5,
	453	+ TPS65917_RESET_IN_IRQ,
	454	+ TPS65917_FSD_IRQ,
	455	+ TPS65917_SHORT_IRQ,
	456	+ TPS65917_RESERVED6,
	457	+ /* INT3 registers */
	458	+ TPS65917_GPADC_AUTO_0_IRQ,
	459	+ TPS65917_GPADC_AUTO_1_IRQ,
	460	+ TPS65917_GPADC_EOC_SW_IRQ,
	461	+ TPS65917_RESREVED6,
	462	+ TPS65917_RESERVED7,
	463	+ TPS65917_RESERVED8,
	464	+ TPS65917_RESERVED9,
	465	+ TPS65917_VBUS_IRQ,
	466	+ /* INT4 registers */
	467	+ TPS65917_GPIO_0_IRQ,
	468	+ TPS65917_GPIO_1_IRQ,
	469	+ TPS65917_GPIO_2_IRQ,
	470	+ TPS65917_GPIO_3_IRQ,
	471	+ TPS65917_GPIO_4_IRQ,
	472	+ TPS65917_GPIO_5_IRQ,
	473	+ TPS65917_GPIO_6_IRQ,
	474	+ TPS65917_RESERVED10,
	475	+ /* Total Number IRQs */
	476	+ TPS65917_NUM_IRQ,
	477	+};
	478	+
352	479	/* Define the palmas IRQ numbers */
353	480	enum palmas_irqs {
354	481	/* INT1 registers */
@@ -400,6 +527,7 @@ struct palmas_pmic { · 45 unmodified lines
400	527
401	528	int smps123;
402	529	int smps457;
	530	+ int smps12;
403	531
404	532	int range[PALMAS_REG_SMPS10_OUT1];
405	533	unsigned int ramp_delay[PALMAS_REG_SMPS10_OUT1];
@@ -2871,6 +2999,715 @@ enum usb_irq_events { · 2465 unmodified lines
2871	2999	#define PALMAS_GPADC_TRIM15 0x0E
2872	3000	#define PALMAS_GPADC_TRIM16 0x0F
2873	3001
	3002	+/* TPS65917 Interrupt registers */
	3003	+
	3004	+/* Registers for function INTERRUPT */
	3005	+#define TPS65917_INT1_STATUS 0x00
	3006	+#define TPS65917_INT1_MASK 0x01
	3007	+#define TPS65917_INT1_LINE_STATE 0x02
	3008	+#define TPS65917_INT2_STATUS 0x05
	3009	+#define TPS65917_INT2_MASK 0x06
	3010	+#define TPS65917_INT2_LINE_STATE 0x07
	3011	+#define TPS65917_INT3_STATUS 0x0A
	3012	+#define TPS65917_INT3_MASK 0x0B
	3013	+#define TPS65917_INT3_LINE_STATE 0x0C
	3014	+#define TPS65917_INT4_STATUS 0x0F
	3015	+#define TPS65917_INT4_MASK 0x10
	3016	+#define TPS65917_INT4_LINE_STATE 0x11
	3017	+#define TPS65917_INT4_EDGE_DETECT1 0x12
	3018	+#define TPS65917_INT4_EDGE_DETECT2 0x13
	3019	+#define TPS65917_INT_CTRL 0x14
	3020	+
	3021	+/* Bit definitions for INT1_STATUS */
	3022	+#define TPS65917_INT1_STATUS_VSYS_MON 0x40
	3023	+#define TPS65917_INT1_STATUS_VSYS_MON_SHIFT 0x06
	3024	+#define TPS65917_INT1_STATUS_HOTDIE 0x20
	3025	+#define TPS65917_INT1_STATUS_HOTDIE_SHIFT 0x05
	3026	+#define TPS65917_INT1_STATUS_PWRDOWN 0x10
	3027	+#define TPS65917_INT1_STATUS_PWRDOWN_SHIFT 0x04
	3028	+#define TPS65917_INT1_STATUS_LONG_PRESS_KEY 0x04
	3029	+#define TPS65917_INT1_STATUS_LONG_PRESS_KEY_SHIFT 0x02
	3030	+#define TPS65917_INT1_STATUS_PWRON 0x02
	3031	+#define TPS65917_INT1_STATUS_PWRON_SHIFT 0x01
	3032	+
	3033	+/* Bit definitions for INT1_MASK */
	3034	+#define TPS65917_INT1_MASK_VSYS_MON 0x40
	3035	+#define TPS65917_INT1_MASK_VSYS_MON_SHIFT 0x06
	3036	+#define TPS65917_INT1_MASK_HOTDIE 0x20
	3037	+#define TPS65917_INT1_MASK_HOTDIE_SHIFT 0x05
	3038	+#define TPS65917_INT1_MASK_PWRDOWN 0x10
	3039	+#define TPS65917_INT1_MASK_PWRDOWN_SHIFT 0x04
	3040	+#define TPS65917_INT1_MASK_LONG_PRESS_KEY 0x04
	3041	+#define TPS65917_INT1_MASK_LONG_PRESS_KEY_SHIFT 0x02
	3042	+#define TPS65917_INT1_MASK_PWRON 0x02
	3043	+#define TPS65917_INT1_MASK_PWRON_SHIFT 0x01
	3044	+
	3045	+/* Bit definitions for INT1_LINE_STATE */
	3046	+#define TPS65917_INT1_LINE_STATE_VSYS_MON 0x40
	3047	+#define TPS65917_INT1_LINE_STATE_VSYS_MON_SHIFT 0x06
	3048	+#define TPS65917_INT1_LINE_STATE_HOTDIE 0x20
	3049	+#define TPS65917_INT1_LINE_STATE_HOTDIE_SHIFT 0x05
	3050	+#define TPS65917_INT1_LINE_STATE_PWRDOWN 0x10
	3051	+#define TPS65917_INT1_LINE_STATE_PWRDOWN_SHIFT 0x04
	3052	+#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY 0x04
	3053	+#define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT 0x02
	3054	+#define TPS65917_INT1_LINE_STATE_PWRON 0x02
	3055	+#define TPS65917_INT1_LINE_STATE_PWRON_SHIFT 0x01
	3056	+
	3057	+/* Bit definitions for INT2_STATUS */
	3058	+#define TPS65917_INT2_STATUS_SHORT 0x40
	3059	+#define TPS65917_INT2_STATUS_SHORT_SHIFT 0x06
	3060	+#define TPS65917_INT2_STATUS_FSD 0x20
	3061	+#define TPS65917_INT2_STATUS_FSD_SHIFT 0x05
	3062	+#define TPS65917_INT2_STATUS_RESET_IN 0x10
	3063	+#define TPS65917_INT2_STATUS_RESET_IN_SHIFT 0x04
	3064	+#define TPS65917_INT2_STATUS_WDT 0x04
	3065	+#define TPS65917_INT2_STATUS_WDT_SHIFT 0x02
	3066	+#define TPS65917_INT2_STATUS_OTP_ERROR 0x02
	3067	+#define TPS65917_INT2_STATUS_OTP_ERROR_SHIFT 0x01
	3068	+
	3069	+/* Bit definitions for INT2_MASK */
	3070	+#define TPS65917_INT2_MASK_SHORT 0x40
	3071	+#define TPS65917_INT2_MASK_SHORT_SHIFT 0x06
	3072	+#define TPS65917_INT2_MASK_FSD 0x20
	3073	+#define TPS65917_INT2_MASK_FSD_SHIFT 0x05
	3074	+#define TPS65917_INT2_MASK_RESET_IN 0x10
	3075	+#define TPS65917_INT2_MASK_RESET_IN_SHIFT 0x04
	3076	+#define TPS65917_INT2_MASK_WDT 0x04
	3077	+#define TPS65917_INT2_MASK_WDT_SHIFT 0x02
	3078	+#define TPS65917_INT2_MASK_OTP_ERROR_TIMER 0x02
	3079	+#define TPS65917_INT2_MASK_OTP_ERROR_SHIFT 0x01
	3080	+
	3081	+/* Bit definitions for INT2_LINE_STATE */
	3082	+#define TPS65917_INT2_LINE_STATE_SHORT 0x40
	3083	+#define TPS65917_INT2_LINE_STATE_SHORT_SHIFT 0x06
	3084	+#define TPS65917_INT2_LINE_STATE_FSD 0x20
	3085	+#define TPS65917_INT2_LINE_STATE_FSD_SHIFT 0x05
	3086	+#define TPS65917_INT2_LINE_STATE_RESET_IN 0x10
	3087	+#define TPS65917_INT2_LINE_STATE_RESET_IN_SHIFT 0x04
	3088	+#define TPS65917_INT2_LINE_STATE_WDT 0x04
	3089	+#define TPS65917_INT2_LINE_STATE_WDT_SHIFT 0x02
	3090	+#define TPS65917_INT2_LINE_STATE_OTP_ERROR 0x02
	3091	+#define TPS65917_INT2_LINE_STATE_OTP_ERROR_SHIFT 0x01
	3092	+
	3093	+/* Bit definitions for INT3_STATUS */
	3094	+#define TPS65917_INT3_STATUS_VBUS 0x80
	3095	+#define TPS65917_INT3_STATUS_VBUS_SHIFT 0x07
	3096	+#define TPS65917_INT3_STATUS_GPADC_EOC_SW 0x04
	3097	+#define TPS65917_INT3_STATUS_GPADC_EOC_SW_SHIFT 0x02
	3098	+#define TPS65917_INT3_STATUS_GPADC_AUTO_1 0x02
	3099	+#define TPS65917_INT3_STATUS_GPADC_AUTO_1_SHIFT 0x01
	3100	+#define TPS65917_INT3_STATUS_GPADC_AUTO_0 0x01
	3101	+#define TPS65917_INT3_STATUS_GPADC_AUTO_0_SHIFT 0x00
	3102	+
	3103	+/* Bit definitions for INT3_MASK */
	3104	+#define TPS65917_INT3_MASK_VBUS 0x80
	3105	+#define TPS65917_INT3_MASK_VBUS_SHIFT 0x07
	3106	+#define TPS65917_INT3_MASK_GPADC_EOC_SW 0x04
	3107	+#define TPS65917_INT3_MASK_GPADC_EOC_SW_SHIFT 0x02
	3108	+#define TPS65917_INT3_MASK_GPADC_AUTO_1 0x02
	3109	+#define TPS65917_INT3_MASK_GPADC_AUTO_1_SHIFT 0x01
	3110	+#define TPS65917_INT3_MASK_GPADC_AUTO_0 0x01
	3111	+#define TPS65917_INT3_MASK_GPADC_AUTO_0_SHIFT 0x00
	3112	+
	3113	+/* Bit definitions for INT3_LINE_STATE */
	3114	+#define TPS65917_INT3_LINE_STATE_VBUS 0x80
	3115	+#define TPS65917_INT3_LINE_STATE_VBUS_SHIFT 0x07
	3116	+#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW 0x04
	3117	+#define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT 0x02
	3118	+#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1 0x02
	3119	+#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT 0x01
	3120	+#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0 0x01
	3121	+#define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT 0x00
	3122	+
	3123	+/* Bit definitions for INT4_STATUS */
	3124	+#define TPS65917_INT4_STATUS_GPIO_6 0x40
	3125	+#define TPS65917_INT4_STATUS_GPIO_6_SHIFT 0x06
	3126	+#define TPS65917_INT4_STATUS_GPIO_5 0x20
	3127	+#define TPS65917_INT4_STATUS_GPIO_5_SHIFT 0x05
	3128	+#define TPS65917_INT4_STATUS_GPIO_4 0x10
	3129	+#define TPS65917_INT4_STATUS_GPIO_4_SHIFT 0x04
	3130	+#define TPS65917_INT4_STATUS_GPIO_3 0x08
	3131	+#define TPS65917_INT4_STATUS_GPIO_3_SHIFT 0x03
	3132	+#define TPS65917_INT4_STATUS_GPIO_2 0x04
	3133	+#define TPS65917_INT4_STATUS_GPIO_2_SHIFT 0x02
	3134	+#define TPS65917_INT4_STATUS_GPIO_1 0x02
	3135	+#define TPS65917_INT4_STATUS_GPIO_1_SHIFT 0x01
	3136	+#define TPS65917_INT4_STATUS_GPIO_0 0x01
	3137	+#define TPS65917_INT4_STATUS_GPIO_0_SHIFT 0x00
	3138	+
	3139	+/* Bit definitions for INT4_MASK */
	3140	+#define TPS65917_INT4_MASK_GPIO_6 0x40
	3141	+#define TPS65917_INT4_MASK_GPIO_6_SHIFT 0x06
	3142	+#define TPS65917_INT4_MASK_GPIO_5 0x20
	3143	+#define TPS65917_INT4_MASK_GPIO_5_SHIFT 0x05
	3144	+#define TPS65917_INT4_MASK_GPIO_4 0x10
	3145	+#define TPS65917_INT4_MASK_GPIO_4_SHIFT 0x04
	3146	+#define TPS65917_INT4_MASK_GPIO_3 0x08
	3147	+#define TPS65917_INT4_MASK_GPIO_3_SHIFT 0x03
	3148	+#define TPS65917_INT4_MASK_GPIO_2 0x04
	3149	+#define TPS65917_INT4_MASK_GPIO_2_SHIFT 0x02
	3150	+#define TPS65917_INT4_MASK_GPIO_1 0x02
	3151	+#define TPS65917_INT4_MASK_GPIO_1_SHIFT 0x01
	3152	+#define TPS65917_INT4_MASK_GPIO_0 0x01
	3153	+#define TPS65917_INT4_MASK_GPIO_0_SHIFT 0x00
	3154	+
	3155	+/* Bit definitions for INT4_LINE_STATE */
	3156	+#define TPS65917_INT4_LINE_STATE_GPIO_6 0x40
	3157	+#define TPS65917_INT4_LINE_STATE_GPIO_6_SHIFT 0x06
	3158	+#define TPS65917_INT4_LINE_STATE_GPIO_5 0x20
	3159	+#define TPS65917_INT4_LINE_STATE_GPIO_5_SHIFT 0x05
	3160	+#define TPS65917_INT4_LINE_STATE_GPIO_4 0x10
	3161	+#define TPS65917_INT4_LINE_STATE_GPIO_4_SHIFT 0x04
	3162	+#define TPS65917_INT4_LINE_STATE_GPIO_3 0x08
	3163	+#define TPS65917_INT4_LINE_STATE_GPIO_3_SHIFT 0x03
	3164	+#define TPS65917_INT4_LINE_STATE_GPIO_2 0x04
	3165	+#define TPS65917_INT4_LINE_STATE_GPIO_2_SHIFT 0x02
	3166	+#define TPS65917_INT4_LINE_STATE_GPIO_1 0x02
	3167	+#define TPS65917_INT4_LINE_STATE_GPIO_1_SHIFT 0x01
	3168	+#define TPS65917_INT4_LINE_STATE_GPIO_0 0x01
	3169	+#define TPS65917_INT4_LINE_STATE_GPIO_0_SHIFT 0x00
	3170	+
	3171	+/* Bit definitions for INT4_EDGE_DETECT1 */
	3172	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING 0x80
	3173	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT 0x07
	3174	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING 0x40
	3175	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT 0x06
	3176	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING 0x20
	3177	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT 0x05
	3178	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING 0x10
	3179	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT 0x04
	3180	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING 0x08
	3181	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT 0x03
	3182	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING 0x04
	3183	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT 0x02
	3184	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING 0x02
	3185	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT 0x01
	3186	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING 0x01
	3187	+#define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT 0x00
	3188	+
	3189	+/* Bit definitions for INT4_EDGE_DETECT2 */
	3190	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING 0x20
	3191	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT 0x05
	3192	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING 0x10
	3193	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT 0x04
	3194	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING 0x08
	3195	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT 0x03
	3196	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING 0x04
	3197	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT 0x02
	3198	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING 0x02
	3199	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT 0x01
	3200	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING 0x01
	3201	+#define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT 0x00
	3202	+
	3203	+/* Bit definitions for INT_CTRL */
	3204	+#define TPS65917_INT_CTRL_INT_PENDING 0x04
	3205	+#define TPS65917_INT_CTRL_INT_PENDING_SHIFT 0x02
	3206	+#define TPS65917_INT_CTRL_INT_CLEAR 0x01
	3207	+#define TPS65917_INT_CTRL_INT_CLEAR_SHIFT 0x00
	3208	+
	3209	+/* TPS65917 SMPS Registers */
	3210	+
	3211	+/* Registers for function SMPS */
	3212	+#define TPS65917_SMPS1_CTRL 0x00
	3213	+#define TPS65917_SMPS1_FORCE 0x02
	3214	+#define TPS65917_SMPS1_VOLTAGE 0x03
	3215	+#define TPS65917_SMPS2_CTRL 0x04
	3216	+#define TPS65917_SMPS2_FORCE 0x06
	3217	+#define TPS65917_SMPS2_VOLTAGE 0x07
	3218	+#define TPS65917_SMPS3_CTRL 0x0C
	3219	+#define TPS65917_SMPS3_FORCE 0x0E
	3220	+#define TPS65917_SMPS3_VOLTAGE 0x0F
	3221	+#define TPS65917_SMPS4_CTRL 0x10
	3222	+#define TPS65917_SMPS4_VOLTAGE 0x13
	3223	+#define TPS65917_SMPS5_CTRL 0x18
	3224	+#define TPS65917_SMPS5_VOLTAGE 0x1B
	3225	+#define TPS65917_SMPS_CTRL 0x24
	3226	+#define TPS65917_SMPS_PD_CTRL 0x25
	3227	+#define TPS65917_SMPS_THERMAL_EN 0x27
	3228	+#define TPS65917_SMPS_THERMAL_STATUS 0x28
	3229	+#define TPS65917_SMPS_SHORT_STATUS 0x29
	3230	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN 0x2A
	3231	+#define TPS65917_SMPS_POWERGOOD_MASK1 0x2B
	3232	+#define TPS65917_SMPS_POWERGOOD_MASK2 0x2C
	3233	+
	3234	+/* Bit definitions for SMPS1_CTRL */
	3235	+#define TPS65917_SMPS1_CTRL_WR_S 0x80
	3236	+#define TPS65917_SMPS1_CTRL_WR_S_SHIFT 0x07
	3237	+#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN 0x40
	3238	+#define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
	3239	+#define TPS65917_SMPS1_CTRL_STATUS_MASK 0x30
	3240	+#define TPS65917_SMPS1_CTRL_STATUS_SHIFT 0x04
	3241	+#define TPS65917_SMPS1_CTRL_MODE_SLEEP_MASK 0x0C
	3242	+#define TPS65917_SMPS1_CTRL_MODE_SLEEP_SHIFT 0x02
	3243	+#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_MASK 0x03
	3244	+#define TPS65917_SMPS1_CTRL_MODE_ACTIVE_SHIFT 0x00
	3245	+
	3246	+/* Bit definitions for SMPS1_FORCE */
	3247	+#define TPS65917_SMPS1_FORCE_CMD 0x80
	3248	+#define TPS65917_SMPS1_FORCE_CMD_SHIFT 0x07
	3249	+#define TPS65917_SMPS1_FORCE_VSEL_MASK 0x7F
	3250	+#define TPS65917_SMPS1_FORCE_VSEL_SHIFT 0x00
	3251	+
	3252	+/* Bit definitions for SMPS1_VOLTAGE */
	3253	+#define TPS65917_SMPS1_VOLTAGE_RANGE 0x80
	3254	+#define TPS65917_SMPS1_VOLTAGE_RANGE_SHIFT 0x07
	3255	+#define TPS65917_SMPS1_VOLTAGE_VSEL_MASK 0x7F
	3256	+#define TPS65917_SMPS1_VOLTAGE_VSEL_SHIFT 0x00
	3257	+
	3258	+/* Bit definitions for SMPS2_CTRL */
	3259	+#define TPS65917_SMPS2_CTRL_WR_S 0x80
	3260	+#define TPS65917_SMPS2_CTRL_WR_S_SHIFT 0x07
	3261	+#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN 0x40
	3262	+#define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
	3263	+#define TPS65917_SMPS2_CTRL_STATUS_MASK 0x30
	3264	+#define TPS65917_SMPS2_CTRL_STATUS_SHIFT 0x04
	3265	+#define TPS65917_SMPS2_CTRL_MODE_SLEEP_MASK 0x0C
	3266	+#define TPS65917_SMPS2_CTRL_MODE_SLEEP_SHIFT 0x02
	3267	+#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_MASK 0x03
	3268	+#define TPS65917_SMPS2_CTRL_MODE_ACTIVE_SHIFT 0x00
	3269	+
	3270	+/* Bit definitions for SMPS2_FORCE */
	3271	+#define TPS65917_SMPS2_FORCE_CMD 0x80
	3272	+#define TPS65917_SMPS2_FORCE_CMD_SHIFT 0x07
	3273	+#define TPS65917_SMPS2_FORCE_VSEL_MASK 0x7F
	3274	+#define TPS65917_SMPS2_FORCE_VSEL_SHIFT 0x00
	3275	+
	3276	+/* Bit definitions for SMPS2_VOLTAGE */
	3277	+#define TPS65917_SMPS2_VOLTAGE_RANGE 0x80
	3278	+#define TPS65917_SMPS2_VOLTAGE_RANGE_SHIFT 0x07
	3279	+#define TPS65917_SMPS2_VOLTAGE_VSEL_MASK 0x7F
	3280	+#define TPS65917_SMPS2_VOLTAGE_VSEL_SHIFT 0x00
	3281	+
	3282	+/* Bit definitions for SMPS3_CTRL */
	3283	+#define TPS65917_SMPS3_CTRL_WR_S 0x80
	3284	+#define TPS65917_SMPS3_CTRL_WR_S_SHIFT 0x07
	3285	+#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN 0x40
	3286	+#define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
	3287	+#define TPS65917_SMPS3_CTRL_STATUS_MASK 0x30
	3288	+#define TPS65917_SMPS3_CTRL_STATUS_SHIFT 0x04
	3289	+#define TPS65917_SMPS3_CTRL_MODE_SLEEP_MASK 0x0C
	3290	+#define TPS65917_SMPS3_CTRL_MODE_SLEEP_SHIFT 0x02
	3291	+#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_MASK 0x03
	3292	+#define TPS65917_SMPS3_CTRL_MODE_ACTIVE_SHIFT 0x00
	3293	+
	3294	+/* Bit definitions for SMPS3_FORCE */
	3295	+#define TPS65917_SMPS3_FORCE_CMD 0x80
	3296	+#define TPS65917_SMPS3_FORCE_CMD_SHIFT 0x07
	3297	+#define TPS65917_SMPS3_FORCE_VSEL_MASK 0x7F
	3298	+#define TPS65917_SMPS3_FORCE_VSEL_SHIFT 0x00
	3299	+
	3300	+/* Bit definitions for SMPS3_VOLTAGE */
	3301	+#define TPS65917_SMPS3_VOLTAGE_RANGE 0x80
	3302	+#define TPS65917_SMPS3_VOLTAGE_RANGE_SHIFT 0x07
	3303	+#define TPS65917_SMPS3_VOLTAGE_VSEL_MASK 0x7F
	3304	+#define TPS65917_SMPS3_VOLTAGE_VSEL_SHIFT 0x00
	3305	+
	3306	+/* Bit definitions for SMPS4_CTRL */
	3307	+#define TPS65917_SMPS4_CTRL_WR_S 0x80
	3308	+#define TPS65917_SMPS4_CTRL_WR_S_SHIFT 0x07
	3309	+#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN 0x40
	3310	+#define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
	3311	+#define TPS65917_SMPS4_CTRL_STATUS_MASK 0x30
	3312	+#define TPS65917_SMPS4_CTRL_STATUS_SHIFT 0x04
	3313	+#define TPS65917_SMPS4_CTRL_MODE_SLEEP_MASK 0x0C
	3314	+#define TPS65917_SMPS4_CTRL_MODE_SLEEP_SHIFT 0x02
	3315	+#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_MASK 0x03
	3316	+#define TPS65917_SMPS4_CTRL_MODE_ACTIVE_SHIFT 0x00
	3317	+
	3318	+/* Bit definitions for SMPS4_VOLTAGE */
	3319	+#define TPS65917_SMPS4_VOLTAGE_RANGE 0x80
	3320	+#define TPS65917_SMPS4_VOLTAGE_RANGE_SHIFT 0x07
	3321	+#define TPS65917_SMPS4_VOLTAGE_VSEL_MASK 0x7F
	3322	+#define TPS65917_SMPS4_VOLTAGE_VSEL_SHIFT 0x00
	3323	+
	3324	+/* Bit definitions for SMPS5_CTRL */
	3325	+#define TPS65917_SMPS5_CTRL_WR_S 0x80
	3326	+#define TPS65917_SMPS5_CTRL_WR_S_SHIFT 0x07
	3327	+#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN 0x40
	3328	+#define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN_SHIFT 0x06
	3329	+#define TPS65917_SMPS5_CTRL_STATUS_MASK 0x30
	3330	+#define TPS65917_SMPS5_CTRL_STATUS_SHIFT 0x04
	3331	+#define TPS65917_SMPS5_CTRL_MODE_SLEEP_MASK 0x0C
	3332	+#define TPS65917_SMPS5_CTRL_MODE_SLEEP_SHIFT 0x02
	3333	+#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_MASK 0x03
	3334	+#define TPS65917_SMPS5_CTRL_MODE_ACTIVE_SHIFT 0x00
	3335	+
	3336	+/* Bit definitions for SMPS5_VOLTAGE */
	3337	+#define TPS65917_SMPS5_VOLTAGE_RANGE 0x80
	3338	+#define TPS65917_SMPS5_VOLTAGE_RANGE_SHIFT 0x07
	3339	+#define TPS65917_SMPS5_VOLTAGE_VSEL_MASK 0x7F
	3340	+#define TPS65917_SMPS5_VOLTAGE_VSEL_SHIFT 0x00
	3341	+
	3342	+/* Bit definitions for SMPS_CTRL */
	3343	+#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN 0x10
	3344	+#define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN_SHIFT 0x04
	3345	+#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL 0x03
	3346	+#define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL_SHIFT 0x00
	3347	+
	3348	+/* Bit definitions for SMPS_PD_CTRL */
	3349	+#define TPS65917_SMPS_PD_CTRL_SMPS5 0x40
	3350	+#define TPS65917_SMPS_PD_CTRL_SMPS5_SHIFT 0x06
	3351	+#define TPS65917_SMPS_PD_CTRL_SMPS4 0x10
	3352	+#define TPS65917_SMPS_PD_CTRL_SMPS4_SHIFT 0x04
	3353	+#define TPS65917_SMPS_PD_CTRL_SMPS3 0x08
	3354	+#define TPS65917_SMPS_PD_CTRL_SMPS3_SHIFT 0x03
	3355	+#define TPS65917_SMPS_PD_CTRL_SMPS2 0x02
	3356	+#define TPS65917_SMPS_PD_CTRL_SMPS2_SHIFT 0x01
	3357	+#define TPS65917_SMPS_PD_CTRL_SMPS1 0x01
	3358	+#define TPS65917_SMPS_PD_CTRL_SMPS1_SHIFT 0x00
	3359	+
	3360	+/* Bit definitions for SMPS_THERMAL_EN */
	3361	+#define TPS65917_SMPS_THERMAL_EN_SMPS5 0x40
	3362	+#define TPS65917_SMPS_THERMAL_EN_SMPS5_SHIFT 0x06
	3363	+#define TPS65917_SMPS_THERMAL_EN_SMPS3 0x08
	3364	+#define TPS65917_SMPS_THERMAL_EN_SMPS3_SHIFT 0x03
	3365	+#define TPS65917_SMPS_THERMAL_EN_SMPS12 0x01
	3366	+#define TPS65917_SMPS_THERMAL_EN_SMPS12_SHIFT 0x00
	3367	+
	3368	+/* Bit definitions for SMPS_THERMAL_STATUS */
	3369	+#define TPS65917_SMPS_THERMAL_STATUS_SMPS5 0x40
	3370	+#define TPS65917_SMPS_THERMAL_STATUS_SMPS5_SHIFT 0x06
	3371	+#define TPS65917_SMPS_THERMAL_STATUS_SMPS3 0x08
	3372	+#define TPS65917_SMPS_THERMAL_STATUS_SMPS3_SHIFT 0x03
	3373	+#define TPS65917_SMPS_THERMAL_STATUS_SMPS12 0x01
	3374	+#define TPS65917_SMPS_THERMAL_STATUS_SMPS12_SHIFT 0x00
	3375	+
	3376	+/* Bit definitions for SMPS_SHORT_STATUS */
	3377	+#define TPS65917_SMPS_SHORT_STATUS_SMPS5 0x40
	3378	+#define TPS65917_SMPS_SHORT_STATUS_SMPS5_SHIFT 0x06
	3379	+#define TPS65917_SMPS_SHORT_STATUS_SMPS4 0x10
	3380	+#define TPS65917_SMPS_SHORT_STATUS_SMPS4_SHIFT 0x04
	3381	+#define TPS65917_SMPS_SHORT_STATUS_SMPS3 0x08
	3382	+#define TPS65917_SMPS_SHORT_STATUS_SMPS3_SHIFT 0x03
	3383	+#define TPS65917_SMPS_SHORT_STATUS_SMPS2 0x02
	3384	+#define TPS65917_SMPS_SHORT_STATUS_SMPS2_SHIFT 0x01
	3385	+#define TPS65917_SMPS_SHORT_STATUS_SMPS1 0x01
	3386	+#define TPS65917_SMPS_SHORT_STATUS_SMPS1_SHIFT 0x00
	3387	+
	3388	+/* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */
	3389	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5 0x40
	3390	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5_SHIFT 0x06
	3391	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4 0x10
	3392	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4_SHIFT 0x04
	3393	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3 0x08
	3394	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT 0x03
	3395	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2 0x02
	3396	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2_SHIFT 0x01
	3397	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1 0x01
	3398	+#define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1_SHIFT 0x00
	3399	+
	3400	+/* Bit definitions for SMPS_POWERGOOD_MASK1 */
	3401	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5 0x40
	3402	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5_SHIFT 0x06
	3403	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4 0x10
	3404	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4_SHIFT 0x04
	3405	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3 0x08
	3406	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT 0x03
	3407	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2 0x02
	3408	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2_SHIFT 0x01
	3409	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1 0x01
	3410	+#define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1_SHIFT 0x00
	3411	+
	3412	+/* Bit definitions for SMPS_POWERGOOD_MASK2 */
	3413	+#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT 0x80
	3414	+#define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 0x07
	3415	+#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM_SHIFT 0x10
	3416	+#define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM 0x04
	3417	+
	3418	+/* Bit definitions for SMPS_PLL_CTRL */
	3419	+
	3420	+#define TPS65917_SMPS_PLL_CTRL_PLL_EN_PLL_BYPASS_SHIFT 0x08
	3421	+#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_EN_BYPASS 0x03
	3422	+#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK_SHIFT 0x04
	3423	+#define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK 0x02
	3424	+
	3425	+/* Registers for function LDO */
	3426	+#define TPS65917_LDO1_CTRL 0x00
	3427	+#define TPS65917_LDO1_VOLTAGE 0x01
	3428	+#define TPS65917_LDO2_CTRL 0x02
	3429	+#define TPS65917_LDO2_VOLTAGE 0x03
	3430	+#define TPS65917_LDO3_CTRL 0x04
	3431	+#define TPS65917_LDO3_VOLTAGE 0x05
	3432	+#define TPS65917_LDO4_CTRL 0x0E
	3433	+#define TPS65917_LDO4_VOLTAGE 0x0F
	3434	+#define TPS65917_LDO5_CTRL 0x12
	3435	+#define TPS65917_LDO5_VOLTAGE 0x13
	3436	+#define TPS65917_LDO_PD_CTRL1 0x1B
	3437	+#define TPS65917_LDO_PD_CTRL2 0x1C
	3438	+#define TPS65917_LDO_SHORT_STATUS1 0x1D
	3439	+#define TPS65917_LDO_SHORT_STATUS2 0x1E
	3440	+#define TPS65917_LDO_PD_CTRL3 0x2D
	3441	+#define TPS65917_LDO_SHORT_STATUS3 0x2E
	3442	+
	3443	+/* Bit definitions for LDO1_CTRL */
	3444	+#define TPS65917_LDO1_CTRL_WR_S 0x80
	3445	+#define TPS65917_LDO1_CTRL_WR_S_SHIFT 0x07
	3446	+#define TPS65917_LDO1_CTRL_BYPASS_EN 0x40
	3447	+#define TPS65917_LDO1_CTRL_BYPASS_EN_SHIFT 0x06
	3448	+#define TPS65917_LDO1_CTRL_STATUS 0x10
	3449	+#define TPS65917_LDO1_CTRL_STATUS_SHIFT 0x04
	3450	+#define TPS65917_LDO1_CTRL_MODE_SLEEP 0x04
	3451	+#define TPS65917_LDO1_CTRL_MODE_SLEEP_SHIFT 0x02
	3452	+#define TPS65917_LDO1_CTRL_MODE_ACTIVE 0x01
	3453	+#define TPS65917_LDO1_CTRL_MODE_ACTIVE_SHIFT 0x00
	3454	+
	3455	+/* Bit definitions for LDO1_VOLTAGE */
	3456	+#define TPS65917_LDO1_VOLTAGE_VSEL_MASK 0x2F
	3457	+#define TPS65917_LDO1_VOLTAGE_VSEL_SHIFT 0x00
	3458	+
	3459	+/* Bit definitions for LDO2_CTRL */
	3460	+#define TPS65917_LDO2_CTRL_WR_S 0x80
	3461	+#define TPS65917_LDO2_CTRL_WR_S_SHIFT 0x07
	3462	+#define TPS65917_LDO2_CTRL_BYPASS_EN 0x40
	3463	+#define TPS65917_LDO2_CTRL_BYPASS_EN_SHIFT 0x06
	3464	+#define TPS65917_LDO2_CTRL_STATUS 0x10
	3465	+#define TPS65917_LDO2_CTRL_STATUS_SHIFT 0x04
	3466	+#define TPS65917_LDO2_CTRL_MODE_SLEEP 0x04
	3467	+#define TPS65917_LDO2_CTRL_MODE_SLEEP_SHIFT 0x02
	3468	+#define TPS65917_LDO2_CTRL_MODE_ACTIVE 0x01
	3469	+#define TPS65917_LDO2_CTRL_MODE_ACTIVE_SHIFT 0x00
	3470	+
	3471	+/* Bit definitions for LDO2_VOLTAGE */
	3472	+#define TPS65917_LDO2_VOLTAGE_VSEL_MASK 0x2F
	3473	+#define TPS65917_LDO2_VOLTAGE_VSEL_SHIFT 0x00
	3474	+
	3475	+/* Bit definitions for LDO3_CTRL */
	3476	+#define TPS65917_LDO3_CTRL_WR_S 0x80
	3477	+#define TPS65917_LDO3_CTRL_WR_S_SHIFT 0x07
	3478	+#define TPS65917_LDO3_CTRL_STATUS 0x10
	3479	+#define TPS65917_LDO3_CTRL_STATUS_SHIFT 0x04
	3480	+#define TPS65917_LDO3_CTRL_MODE_SLEEP 0x04
	3481	+#define TPS65917_LDO3_CTRL_MODE_SLEEP_SHIFT 0x02
	3482	+#define TPS65917_LDO3_CTRL_MODE_ACTIVE 0x01
	3483	+#define TPS65917_LDO3_CTRL_MODE_ACTIVE_SHIFT 0x00
	3484	+
	3485	+/* Bit definitions for LDO3_VOLTAGE */
	3486	+#define TPS65917_LDO3_VOLTAGE_VSEL_MASK 0x2F
	3487	+#define TPS65917_LDO3_VOLTAGE_VSEL_SHIFT 0x00
	3488	+
	3489	+/* Bit definitions for LDO4_CTRL */
	3490	+#define TPS65917_LDO4_CTRL_WR_S 0x80
	3491	+#define TPS65917_LDO4_CTRL_WR_S_SHIFT 0x07
	3492	+#define TPS65917_LDO4_CTRL_STATUS 0x10
	3493	+#define TPS65917_LDO4_CTRL_STATUS_SHIFT 0x04
	3494	+#define TPS65917_LDO4_CTRL_MODE_SLEEP 0x04
	3495	+#define TPS65917_LDO4_CTRL_MODE_SLEEP_SHIFT 0x02
	3496	+#define TPS65917_LDO4_CTRL_MODE_ACTIVE 0x01
	3497	+#define TPS65917_LDO4_CTRL_MODE_ACTIVE_SHIFT 0x00
	3498	+
	3499	+/* Bit definitions for LDO4_VOLTAGE */
	3500	+#define TPS65917_LDO4_VOLTAGE_VSEL_MASK 0x2F
	3501	+#define TPS65917_LDO4_VOLTAGE_VSEL_SHIFT 0x00
	3502	+
	3503	+/* Bit definitions for LDO5_CTRL */
	3504	+#define TPS65917_LDO5_CTRL_WR_S 0x80
	3505	+#define TPS65917_LDO5_CTRL_WR_S_SHIFT 0x07
	3506	+#define TPS65917_LDO5_CTRL_STATUS 0x10
	3507	+#define TPS65917_LDO5_CTRL_STATUS_SHIFT 0x04
	3508	+#define TPS65917_LDO5_CTRL_MODE_SLEEP 0x04
	3509	+#define TPS65917_LDO5_CTRL_MODE_SLEEP_SHIFT 0x02
	3510	+#define TPS65917_LDO5_CTRL_MODE_ACTIVE 0x01
	3511	+#define TPS65917_LDO5_CTRL_MODE_ACTIVE_SHIFT 0x00
	3512	+
	3513	+/* Bit definitions for LDO5_VOLTAGE */
	3514	+#define TPS65917_LDO5_VOLTAGE_VSEL_MASK 0x2F
	3515	+#define TPS65917_LDO5_VOLTAGE_VSEL_SHIFT 0x00
	3516	+
	3517	+/* Bit definitions for LDO_PD_CTRL1 */
	3518	+#define TPS65917_LDO_PD_CTRL1_LDO4 0x80
	3519	+#define TPS65917_LDO_PD_CTRL1_LDO4_SHIFT 0x07
	3520	+#define TPS65917_LDO_PD_CTRL1_LDO2 0x02
	3521	+#define TPS65917_LDO_PD_CTRL1_LDO2_SHIFT 0x01
	3522	+#define TPS65917_LDO_PD_CTRL1_LDO1 0x01
	3523	+#define TPS65917_LDO_PD_CTRL1_LDO1_SHIFT 0x00
	3524	+
	3525	+/* Bit definitions for LDO_PD_CTRL2 */
	3526	+#define TPS65917_LDO_PD_CTRL2_LDO3 0x04
	3527	+#define TPS65917_LDO_PD_CTRL2_LDO3_SHIFT 0x02
	3528	+#define TPS65917_LDO_PD_CTRL2_LDO5 0x02
	3529	+#define TPS65917_LDO_PD_CTRL2_LDO5_SHIFT 0x01
	3530	+
	3531	+/* Bit definitions for LDO_PD_CTRL3 */
	3532	+#define TPS65917_LDO_PD_CTRL2_LDOVANA 0x80
	3533	+#define TPS65917_LDO_PD_CTRL2_LDOVANA_SHIFT 0x07
	3534	+
	3535	+/* Bit definitions for LDO_SHORT_STATUS1 */
	3536	+#define TPS65917_LDO_SHORT_STATUS1_LDO4 0x80
	3537	+#define TPS65917_LDO_SHORT_STATUS1_LDO4_SHIFT 0x07
	3538	+#define TPS65917_LDO_SHORT_STATUS1_LDO2 0x02
	3539	+#define TPS65917_LDO_SHORT_STATUS1_LDO2_SHIFT 0x01
	3540	+#define TPS65917_LDO_SHORT_STATUS1_LDO1 0x01
	3541	+#define TPS65917_LDO_SHORT_STATUS1_LDO1_SHIFT 0x00
	3542	+
	3543	+/* Bit definitions for LDO_SHORT_STATUS2 */
	3544	+#define TPS65917_LDO_SHORT_STATUS2_LDO3 0x04
	3545	+#define TPS65917_LDO_SHORT_STATUS2_LDO3_SHIFT 0x02
	3546	+#define TPS65917_LDO_SHORT_STATUS2_LDO5 0x02
	3547	+#define TPS65917_LDO_SHORT_STATUS2_LDO5_SHIFT 0x01
	3548	+
	3549	+/* Bit definitions for LDO_SHORT_STATUS2 */
	3550	+#define TPS65917_LDO_SHORT_STATUS2_LDOVANA 0x80
	3551	+#define TPS65917_LDO_SHORT_STATUS2_LDOVANA_SHIFT 0x07
	3552	+
	3553	+/* Bit definitions for REGEN1_CTRL */
	3554	+#define TPS65917_REGEN1_CTRL_STATUS 0x10
	3555	+#define TPS65917_REGEN1_CTRL_STATUS_SHIFT 0x04
	3556	+#define TPS65917_REGEN1_CTRL_MODE_SLEEP 0x04
	3557	+#define TPS65917_REGEN1_CTRL_MODE_SLEEP_SHIFT 0x02
	3558	+#define TPS65917_REGEN1_CTRL_MODE_ACTIVE 0x01
	3559	+#define TPS65917_REGEN1_CTRL_MODE_ACTIVE_SHIFT 0x00
	3560	+
	3561	+/* Bit definitions for PLLEN_CTRL */
	3562	+#define TPS65917_PLLEN_CTRL_STATUS 0x10
	3563	+#define TPS65917_PLLEN_CTRL_STATUS_SHIFT 0x04
	3564	+#define TPS65917_PLLEN_CTRL_MODE_SLEEP 0x04
	3565	+#define TPS65917_PLLEN_CTRL_MODE_SLEEP_SHIFT 0x02
	3566	+#define TPS65917_PLLEN_CTRL_MODE_ACTIVE 0x01
	3567	+#define TPS65917_PLLEN_CTRL_MODE_ACTIVE_SHIFT 0x00
	3568	+
	3569	+/* Bit definitions for REGEN2_CTRL */
	3570	+#define TPS65917_REGEN2_CTRL_STATUS 0x10
	3571	+#define TPS65917_REGEN2_CTRL_STATUS_SHIFT 0x04
	3572	+#define TPS65917_REGEN2_CTRL_MODE_SLEEP 0x04
	3573	+#define TPS65917_REGEN2_CTRL_MODE_SLEEP_SHIFT 0x02
	3574	+#define TPS65917_REGEN2_CTRL_MODE_ACTIVE 0x01
	3575	+#define TPS65917_REGEN2_CTRL_MODE_ACTIVE_SHIFT 0x00
	3576	+
	3577	+/* Bit definitions for NSLEEP_RES_ASSIGN */
	3578	+#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN 0x08
	3579	+#define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN_SHIFT 0x03
	3580	+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3 0x04
	3581	+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN3_SHIFT 0x02
	3582	+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2 0x02
	3583	+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN2_SHIFT 0x01
	3584	+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1 0x01
	3585	+#define TPS65917_NSLEEP_RES_ASSIGN_REGEN1_SHIFT 0x00
	3586	+
	3587	+/* Bit definitions for NSLEEP_SMPS_ASSIGN */
	3588	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5 0x40
	3589	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5_SHIFT 0x06
	3590	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4 0x10
	3591	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4_SHIFT 0x04
	3592	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3 0x08
	3593	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT 0x03
	3594	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2 0x02
	3595	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2_SHIFT 0x01
	3596	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1 0x01
	3597	+#define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1_SHIFT 0x00
	3598	+
	3599	+/* Bit definitions for NSLEEP_LDO_ASSIGN1 */
	3600	+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4 0x80
	3601	+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT 0x07
	3602	+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2 0x02
	3603	+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT 0x01
	3604	+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1 0x01
	3605	+#define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT 0x00
	3606	+
	3607	+/* Bit definitions for NSLEEP_LDO_ASSIGN2 */
	3608	+#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3 0x04
	3609	+#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3_SHIFT 0x02
	3610	+#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5 0x02
	3611	+#define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5_SHIFT 0x01
	3612	+
	3613	+/* Bit definitions for ENABLE1_RES_ASSIGN */
	3614	+#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN 0x08
	3615	+#define TPS65917_ENABLE1_RES_ASSIGN_PLLEN_SHIFT 0x03
	3616	+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3 0x04
	3617	+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN3_SHIFT 0x02
	3618	+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2 0x02
	3619	+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN2_SHIFT 0x01
	3620	+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1 0x01
	3621	+#define TPS65917_ENABLE1_RES_ASSIGN_REGEN1_SHIFT 0x00
	3622	+
	3623	+/* Bit definitions for ENABLE1_SMPS_ASSIGN */
	3624	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5 0x40
	3625	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5_SHIFT 0x06
	3626	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4 0x10
	3627	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4_SHIFT 0x04
	3628	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3 0x08
	3629	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT 0x03
	3630	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2 0x02
	3631	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2_SHIFT 0x01
	3632	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1 0x01
	3633	+#define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1_SHIFT 0x00
	3634	+
	3635	+/* Bit definitions for ENABLE1_LDO_ASSIGN1 */
	3636	+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4 0x80
	3637	+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT 0x07
	3638	+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2 0x02
	3639	+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT 0x01
	3640	+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1 0x01
	3641	+#define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT 0x00
	3642	+
	3643	+/* Bit definitions for ENABLE1_LDO_ASSIGN2 */
	3644	+#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3 0x04
	3645	+#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3_SHIFT 0x02
	3646	+#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5 0x02
	3647	+#define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5_SHIFT 0x01
	3648	+
	3649	+/* Bit definitions for ENABLE2_RES_ASSIGN */
	3650	+#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN 0x08
	3651	+#define TPS65917_ENABLE2_RES_ASSIGN_PLLEN_SHIFT 0x03
	3652	+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3 0x04
	3653	+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN3_SHIFT 0x02
	3654	+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2 0x02
	3655	+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN2_SHIFT 0x01
	3656	+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1 0x01
	3657	+#define TPS65917_ENABLE2_RES_ASSIGN_REGEN1_SHIFT 0x00
	3658	+
	3659	+/* Bit definitions for ENABLE2_SMPS_ASSIGN */
	3660	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5 0x40
	3661	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5_SHIFT 0x06
	3662	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4 0x10
	3663	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4_SHIFT 0x04
	3664	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3 0x08
	3665	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT 0x03
	3666	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2 0x02
	3667	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2_SHIFT 0x01
	3668	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1 0x01
	3669	+#define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1_SHIFT 0x00
	3670	+
	3671	+/* Bit definitions for ENABLE2_LDO_ASSIGN1 */
	3672	+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4 0x80
	3673	+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT 0x07
	3674	+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2 0x02
	3675	+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT 0x01
	3676	+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1 0x01
	3677	+#define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT 0x00
	3678	+
	3679	+/* Bit definitions for ENABLE2_LDO_ASSIGN2 */
	3680	+#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3 0x04
	3681	+#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3_SHIFT 0x02
	3682	+#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5 0x02
	3683	+#define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5_SHIFT 0x01
	3684	+
	3685	+/* Bit definitions for REGEN3_CTRL */
	3686	+#define TPS65917_REGEN3_CTRL_STATUS 0x10
	3687	+#define TPS65917_REGEN3_CTRL_STATUS_SHIFT 0x04
	3688	+#define TPS65917_REGEN3_CTRL_MODE_SLEEP 0x04
	3689	+#define TPS65917_REGEN3_CTRL_MODE_SLEEP_SHIFT 0x02
	3690	+#define TPS65917_REGEN3_CTRL_MODE_ACTIVE 0x01
	3691	+#define TPS65917_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0x00
	3692	+
	3693	+/* Registers for function RESOURCE */
	3694	+#define TPS65917_REGEN1_CTRL 0x2
	3695	+#define TPS65917_PLLEN_CTRL 0x3
	3696	+#define TPS65917_NSLEEP_RES_ASSIGN 0x6
	3697	+#define TPS65917_NSLEEP_SMPS_ASSIGN 0x7
	3698	+#define TPS65917_NSLEEP_LDO_ASSIGN1 0x8
	3699	+#define TPS65917_NSLEEP_LDO_ASSIGN2 0x9
	3700	+#define TPS65917_ENABLE1_RES_ASSIGN 0xA
	3701	+#define TPS65917_ENABLE1_SMPS_ASSIGN 0xB
	3702	+#define TPS65917_ENABLE1_LDO_ASSIGN1 0xC
	3703	+#define TPS65917_ENABLE1_LDO_ASSIGN2 0xD
	3704	+#define TPS65917_ENABLE2_RES_ASSIGN 0xE
	3705	+#define TPS65917_ENABLE2_SMPS_ASSIGN 0xF
	3706	+#define TPS65917_ENABLE2_LDO_ASSIGN1 0x10
	3707	+#define TPS65917_ENABLE2_LDO_ASSIGN2 0x11
	3708	+#define TPS65917_REGEN2_CTRL 0x12
	3709	+#define TPS65917_REGEN3_CTRL 0x13
	3710	+
2874	3711	static inline int palmas_read(struct palmas *palmas, unsigned int base,
2875	3712	unsigned int reg, unsigned int *val)
2876	3713	{

include/linux/regmap.h+7−0

@@ -396,6 +396,7 @@ void regmap_exit(struct regmap *map); · 395 unmodified lines
396	396	int regmap_reinit_cache(struct regmap *map,
397	397	const struct regmap_config *config);
398	398	struct regmap dev_get_regmap(struct device dev, const char *name);
	399	+struct device regmap_get_device(struct regmap map);
399	400	int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
400	401	int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val);
401	402	int regmap_raw_write(struct regmap *map, unsigned int reg,
@@ -729,6 +730,12 @@ static inline struct regmap dev_get_regmap(struct device dev, · 327 unmodified lines
729	730	return NULL;
730	731	}
731	732
	733	+static inline struct device regmap_get_device(struct regmap map)
	734	+{
	735	+ WARN_ONCE(1, "regmap API is disabled");
	736	+ return NULL;
	737	+}
	738	+
732	739	#endif
733	740
734	741	#endif

include/linux/regulator/ab8500.h+0−14

@@ -322,18 +322,4 @@ struct ab8500_regulator_platform_data { · 321 unmodified lines
322	322	struct regulator_init_data *ext_regulator;
323	323	};
324	324
325		−#ifdef CONFIG_REGULATOR_AB8500_DEBUG
326		−int ab8500_regulator_debug_init(struct platform_device *pdev);
327		−int ab8500_regulator_debug_exit(struct platform_device *pdev);
328		−#else
329		−static inline int ab8500_regulator_debug_init(struct platform_device *pdev)
330		−{
331		− return 0;
332		−}
333		−static inline int ab8500_regulator_debug_exit(struct platform_device *pdev)
334		−{
335		− return 0;
336		−}
337		−#endif
338		−
339	325	#endif

include/linux/regulator/act8865.h+22−1

@@ -1,5 +1,5 @@
1	1	/*
2		− * act8865.h -- Voltage regulation for the active-semi act8865
	2	+ * act8865.h -- Voltage regulation for active-semi act88xx PMUs
3	3	*
4	4	* Copyright (C) 2013 Atmel Corporation.
5	5	*
@@ -29,6 +29,27 @@ enum { · 23 unmodified lines
29	29	ACT8865_REG_NUM,
30	30	};
31	31
	32	+enum {
	33	+ ACT8846_ID_REG1,
	34	+ ACT8846_ID_REG2,
	35	+ ACT8846_ID_REG3,
	36	+ ACT8846_ID_REG4,
	37	+ ACT8846_ID_REG5,
	38	+ ACT8846_ID_REG6,
	39	+ ACT8846_ID_REG7,
	40	+ ACT8846_ID_REG8,
	41	+ ACT8846_ID_REG9,
	42	+ ACT8846_ID_REG10,
	43	+ ACT8846_ID_REG11,
	44	+ ACT8846_ID_REG12,
	45	+ ACT8846_REG_NUM,
	46	+};
	47	+
	48	+enum {
	49	+ ACT8865,
	50	+ ACT8846,
	51	+};
	52	+
32	53	/**
33	54	* act8865_regulator_data - regulator data
34	55	* @id: regulator id

include/linux/regulator/consumer.h+26−0

@@ -37,6 +37,7 @@ · 36 unmodified lines
37	37
38	38	struct device;
39	39	struct notifier_block;
	40	+struct regmap;
40	41
41	42	/*
42	43	* Regulator operating modes.
@@ -215,6 +216,13 @@ int regulator_set_optimum_mode(struct regulator *regulator, int load_uA); · 172 unmodified lines
215	216
216	217	int regulator_allow_bypass(struct regulator *regulator, bool allow);
217	218
	219	+struct regmap regulator_get_regmap(struct regulator regulator);
	220	+int regulator_get_hardware_vsel_register(struct regulator *regulator,
	221	+ unsigned *vsel_reg,
	222	+ unsigned *vsel_mask);
	223	+int regulator_list_hardware_vsel(struct regulator *regulator,
	224	+ unsigned selector);
	225	+
218	226	/* regulator notifier block */
219	227	int regulator_register_notifier(struct regulator *regulator,
220	228	struct notifier_block *nb);
@@ -457,6 +465,24 @@ static inline int regulator_allow_bypass(struct regulator *regulator, · 236 unmodified lines
457	465	return 0;
458	466	}
459	467
	468	+static inline struct regmap regulator_get_regmap(struct regulator regulator)
	469	+{
	470	+ return ERR_PTR(-EOPNOTSUPP);
	471	+}
	472	+
	473	+static inline int regulator_get_hardware_vsel_register(struct regulator *regulator,
	474	+ unsigned *vsel_reg,
	475	+ unsigned *vsel_mask)
	476	+{
	477	+ return -EOPNOTSUPP;
	478	+}
	479	+
	480	+static inline int regulator_list_hardware_vsel(struct regulator *regulator,
	481	+ unsigned selector)
	482	+{
	483	+ return -EOPNOTSUPP;
	484	+}
	485	+
460	486	static inline int regulator_register_notifier(struct regulator *regulator,
461	487	struct notifier_block *nb)
462	488	{

include/linux/regulator/da9211.h+32−0

@@ -0,0 +1,32 @@
	1	+/*
	2	+ * da9211.h - Regulator device driver for DA9211
	3	+ * Copyright (C) 2014 Dialog Semiconductor Ltd.
	4	+ *
	5	+ * This library is free software; you can redistribute it and/or
	6	+ * modify it under the terms of the GNU Library General Public
	7	+ * License as published by the Free Software Foundation; either
	8	+ * version 2 of the License, or (at your option) any later version.
	9	+ *
	10	+ * This library is distributed in the hope that it will be useful,
	11	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	+ * Library General Public License for more details.
	14	+ */
	15	+
	16	+#ifndef __LINUX_REGULATOR_DA9211_H
	17	+#define __LINUX_REGULATOR_DA9211_H
	18	+
	19	+#include <linux/regulator/machine.h>
	20	+
	21	+#define DA9211_MAX_REGULATORS 2
	22	+
	23	+struct da9211_pdata {
	24	+ /*
	25	+ * Number of buck
	26	+ * 1 : 4 phase 1 buck
	27	+ * 2 : 2 phase 2 buck
	28	+ */
	29	+ int num_buck;
	30	+ struct regulator_init_data *init_data;
	31	+};
	32	+#endif