Pull perf updates from Thomas Gleixner: "Core: - Allow ftrace to instrument parts of the perf core code - Add a new mem_hops field to perf_mem_data_src which allows to represent intra-node/package or inter-node/off-package details to prepare for next generation systems which have more hieararchy within the node/pacakge level. Tools: - Update for the new mem_hops field in perf_mem_data_src Arch: - A set of constraints fixes for the Intel uncore PMU - The usual set of small fixes and improvements for x86 and PPC" * tag 'perf-core-2021-10-31' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86/intel: Fix ICL/SPR INST_RETIRED.PREC_DIST encodings powerpc/perf: Fix data source encodings for L2.1 and L3.1 accesses tools/perf: Add mem_hops field in perf_mem_data_src structure perf: Add mem_hops field in perf_mem_data_src structure perf: Add comment about current state of PERF_MEM_LVL_* namespace and remove an extra line perf/core: Allow ftrace for functions in kernel/event/core.c perf/x86: Add new event for AUX output counter index perf/x86: Add compiler barrier after updating BTS perf/x86/intel/uncore: Fix Intel SPR M3UPI event constraints perf/x86/intel/uncore: Fix Intel SPR M2PCIE event constraints perf/x86/intel/uncore: Fix Intel SPR IIO event constraints perf/x86/intel/uncore: Fix Intel SPR CHA event constraints perf/x86/intel/uncore: Fix Intel ICX IIO event constraints perf/x86/intel/uncore: Fix invalid unit check perf/x86/intel/uncore: Support extra IMC channel on Ice Lake server
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| @@ -1141,6 +1141,21 @@ enum perf_event_type { · 1140 unmodified lines | |||
| 1141 | */ | 1141 | */ |
| 1142 | PERF_RECORD_TEXT_POKE = 20, | 1142 | PERF_RECORD_TEXT_POKE = 20, |
| 1143 | 1143 | ||
| 1144 | /* | ||
| 1145 | * Data written to the AUX area by hardware due to aux_output, may need | ||
| 1146 | * to be matched to the event by an architecture-specific hardware ID. | ||
| 1147 | * This records the hardware ID, but requires sample_id to provide the | ||
| 1148 | * event ID. e.g. Intel PT uses this record to disambiguate PEBS-via-PT | ||
| 1149 | * records from multiple events. | ||
| 1150 | * | ||
| 1151 | * struct { | ||
| 1152 | * struct perf_event_header header; | ||
| 1153 | * u64 hw_id; | ||
| 1154 | * struct sample_id sample_id; | ||
| 1155 | * }; | ||
| 1156 | */ | ||
| 1157 | PERF_RECORD_AUX_OUTPUT_HW_ID = 21, | ||
| 1158 | |||
| 1144 | PERF_RECORD_MAX, /* non-ABI */ | 1159 | PERF_RECORD_MAX, /* non-ABI */ |
| 1145 | }; | 1160 | }; |
| 1146 | 1161 | ||
| @@ -1210,14 +1225,16 @@ union perf_mem_data_src { · 63 unmodified lines | |||
| 1210 | mem_remote:1, /* remote */ | 1225 | mem_remote:1, /* remote */ |
| 1211 | mem_snoopx:2, /* snoop mode, ext */ | 1226 | mem_snoopx:2, /* snoop mode, ext */ |
| 1212 | mem_blk:3, /* access blocked */ | 1227 | mem_blk:3, /* access blocked */ |
| 1213 | mem_rsvd:21; | 1228 | mem_hops:3, /* hop level */ |
| 1229 | mem_rsvd:18; | ||
| 1214 | }; | 1230 | }; |
| 1215 | }; | 1231 | }; |
| 1216 | #elif defined(__BIG_ENDIAN_BITFIELD) | 1232 | #elif defined(__BIG_ENDIAN_BITFIELD) |
| 1217 | union perf_mem_data_src { | 1233 | union perf_mem_data_src { |
| 1218 | __u64 val; | 1234 | __u64 val; |
| 1219 | struct { | 1235 | struct { |
| 1220 | __u64 mem_rsvd:21, | 1236 | __u64 mem_rsvd:18, |
| 1237 | mem_hops:3, /* hop level */ | ||
| 1221 | mem_blk:3, /* access blocked */ | 1238 | mem_blk:3, /* access blocked */ |
| 1222 | mem_snoopx:2, /* snoop mode, ext */ | 1239 | mem_snoopx:2, /* snoop mode, ext */ |
| 1223 | mem_remote:1, /* remote */ | 1240 | mem_remote:1, /* remote */ |
| @@ -1241,7 +1258,13 @@ union perf_mem_data_src { · 17 unmodified lines | |||
| 1241 | #define PERF_MEM_OP_EXEC 0x10 /* code (execution) */ | 1258 | #define PERF_MEM_OP_EXEC 0x10 /* code (execution) */ |
| 1242 | #define PERF_MEM_OP_SHIFT 0 | 1259 | #define PERF_MEM_OP_SHIFT 0 |
| 1243 | 1260 | ||
| 1244 | /* memory hierarchy (memory level, hit or miss) */ | 1261 | /* |
| 1262 | * PERF_MEM_LVL_* namespace being depricated to some extent in the | ||
| 1263 | * favour of newer composite PERF_MEM_{LVLNUM_,REMOTE_,SNOOPX_} fields. | ||
| 1264 | * Supporting this namespace inorder to not break defined ABIs. | ||
| 1265 | * | ||
| 1266 | * memory hierarchy (memory level, hit or miss) | ||
| 1267 | */ | ||
| 1245 | #define PERF_MEM_LVL_NA 0x01 /* not available */ | 1268 | #define PERF_MEM_LVL_NA 0x01 /* not available */ |
| 1246 | #define PERF_MEM_LVL_HIT 0x02 /* hit level */ | 1269 | #define PERF_MEM_LVL_HIT 0x02 /* hit level */ |
| 1247 | #define PERF_MEM_LVL_MISS 0x04 /* miss level */ | 1270 | #define PERF_MEM_LVL_MISS 0x04 /* miss level */ |
| @@ -1307,6 +1330,11 @@ union perf_mem_data_src { · 59 unmodified lines | |||
| 1307 | #define PERF_MEM_BLK_ADDR 0x04 /* address conflict */ | 1330 | #define PERF_MEM_BLK_ADDR 0x04 /* address conflict */ |
| 1308 | #define PERF_MEM_BLK_SHIFT 40 | 1331 | #define PERF_MEM_BLK_SHIFT 40 |
| 1309 | 1332 | ||
| 1333 | /* hop level */ | ||
| 1334 | #define PERF_MEM_HOPS_0 0x01 /* remote core, same node */ | ||
| 1335 | /* 2-7 available */ | ||
| 1336 | #define PERF_MEM_HOPS_SHIFT 43 | ||
| 1337 | |||
| 1310 | #define PERF_MEM_S(a, s) \ | 1338 | #define PERF_MEM_S(a, s) \ |
| 1311 | (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) | 1339 | (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) |
| 1312 | 1340 | ||