New features for 4.21: amdgpu: - Support for SDMA paging queue on vega - Put compute EOP buffers into vram for better performance - Share more code with amdkfd - Support for scanout with DCC on gfx9 - Initial kerneldoc for DC - Updated SMU firmware support for gfx8 chips - Rework CSA handling for eventual support for preemption - XGMI PSP support - Clean up RLC handling - Enable GPU reset by default on VI, SOC15 dGPUs - Ring and IB test cleanups amdkfd: - Share more code with amdgpu ttm: - Move global init out of the drivers scheduler: - Track if schedulers are ready for work - Timeout/fault handling changes to facilitate GPU recovery
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| @@ -326,6 +326,12 @@ struct drm_amdgpu_gem_userptr { · 325 unmodified lines | ||
| 326 | 326 | /* GFX9 and later: */ |
| 327 | 327 | #define AMDGPU_TILING_SWIZZLE_MODE_SHIFT 0 |
| 328 | 328 | #define AMDGPU_TILING_SWIZZLE_MODE_MASK 0x1f |
| 329 | +#define AMDGPU_TILING_DCC_OFFSET_256B_SHIFT 5 | |
| 330 | +#define AMDGPU_TILING_DCC_OFFSET_256B_MASK 0xFFFFFF | |
| 331 | +#define AMDGPU_TILING_DCC_PITCH_MAX_SHIFT 29 | |
| 332 | +#define AMDGPU_TILING_DCC_PITCH_MAX_MASK 0x3FFF | |
| 333 | +#define AMDGPU_TILING_DCC_INDEPENDENT_64B_SHIFT 43 | |
| 334 | +#define AMDGPU_TILING_DCC_INDEPENDENT_64B_MASK 0x1 | |
| 329 | 335 | |
| 330 | 336 | /* Set/Get helpers for tiling flags. */ |
| 331 | 337 | #define AMDGPU_TILING_SET(field, value) \ |