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mtd: spi-nor: move spi_nor_write_ear() to winbond module

The "Extended Address Register" is winbond specific. If the flash is larger than 16MiB and is used in 3 byte address mode, it is used to set the remaining address bits. Move the write_ear() function, the opcode macros and the spimem op template into the winbond module and rename them accordingly.

Michael Walle committed 4 years ago

Commit 94f697c1 parent 5ad784d4 files · +41 −40Browse files

Unified · Split

4 files
  1. drivers/mtd/spi-nor/core.c +0 −30
  2. drivers/mtd/spi-nor/core.h +0 −7
  3. drivers/mtd/spi-nor/winbond.c +41 −1
  4. include/linux/mtd/spi-nor.h +0 −2
drivers/mtd/spi-nor/core.c+0−30
@@ -570,36 +570,6 @@ static int spansion_set_4byte_addr_mode(struct spi_nor *nor, bool enable) · 569 unmodified lines
570 return ret;570 return ret;
571}571}
572 572
573/**
574 * spi_nor_write_ear() - Write Extended Address Register.
575 * @nor: pointer to 'struct spi_nor'.
576 * @ear: value to write to the Extended Address Register.
577 *
578 * Return: 0 on success, -errno otherwise.
579 */
580int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
581{
582 int ret;
583
584 nor->bouncebuf[0] = ear;
585
586 if (nor->spimem) {
587 struct spi_mem_op op = SPI_NOR_WREAR_OP(nor->bouncebuf);
588
589 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
590
591 ret = spi_mem_exec_op(nor->spimem, &op);
592 } else {
593 ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_WREAR,
594 nor->bouncebuf, 1);
595 }
596
597 if (ret)
598 dev_dbg(nor->dev, "error %d writing EAR\n", ret);
599
600 return ret;
601}
602
603/**573/**
604 * spi_nor_sr_ready() - Query the Status Register to see if the flash is ready574 * spi_nor_sr_ready() - Query the Status Register to see if the flash is ready
605 * for new commands.575 * for new commands.
drivers/mtd/spi-nor/core.h+0−7
@@ -72,12 +72,6 @@ · 71 unmodified lines
72 SPI_MEM_OP_NO_DUMMY, \72 SPI_MEM_OP_NO_DUMMY, \
73 SPI_MEM_OP_DATA_OUT(1, buf, 0))73 SPI_MEM_OP_DATA_OUT(1, buf, 0))
74 74
75#define SPI_NOR_WREAR_OP(buf) \
76 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREAR, 0), \
77 SPI_MEM_OP_NO_ADDR, \
78 SPI_MEM_OP_NO_DUMMY, \
79 SPI_MEM_OP_DATA_OUT(1, buf, 0))
80
81#define SPI_NOR_GBULK_OP \75#define SPI_NOR_GBULK_OP \
82 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \76 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \
83 SPI_MEM_OP_NO_ADDR, \77 SPI_MEM_OP_NO_ADDR, \
@@ -636,7 +630,6 @@ void spi_nor_spimem_setup_op(const struct spi_nor *nor, · 552 unmodified lines
636int spi_nor_write_enable(struct spi_nor *nor);630int spi_nor_write_enable(struct spi_nor *nor);
637int spi_nor_write_disable(struct spi_nor *nor);631int spi_nor_write_disable(struct spi_nor *nor);
638int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);632int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
639int spi_nor_write_ear(struct spi_nor *nor, u8 ear);
640int spi_nor_wait_till_ready(struct spi_nor *nor);633int spi_nor_wait_till_ready(struct spi_nor *nor);
641int spi_nor_global_block_unlock(struct spi_nor *nor);634int spi_nor_global_block_unlock(struct spi_nor *nor);
642int spi_nor_lock_and_prep(struct spi_nor *nor);635int spi_nor_lock_and_prep(struct spi_nor *nor);
drivers/mtd/spi-nor/winbond.c+41−1
@@ -8,6 +8,15 @@ · 7 unmodified lines
8 8
9#include "core.h"9#include "core.h"
10 10
11#define WINBOND_NOR_OP_RDEAR 0xc8 /* Read Extended Address Register */
12#define WINBOND_NOR_OP_WREAR 0xc5 /* Write Extended Address Register */
13
14#define WINBOND_NOR_WREAR_OP(buf) \
15 SPI_MEM_OP(SPI_MEM_OP_CMD(WINBOND_NOR_OP_WREAR, 0), \
16 SPI_MEM_OP_NO_ADDR, \
17 SPI_MEM_OP_NO_DUMMY, \
18 SPI_MEM_OP_DATA_OUT(1, buf, 0))
19
11static int20static int
12w25q256_post_bfpt_fixups(struct spi_nor *nor,21w25q256_post_bfpt_fixups(struct spi_nor *nor,
13 const struct sfdp_parameter_header *bfpt_header,22 const struct sfdp_parameter_header *bfpt_header,
@@ -129,6 +138,37 @@ static const struct flash_info winbond_nor_parts[] = { · 115 unmodified lines
129 SPI_NOR_QUAD_READ) },138 SPI_NOR_QUAD_READ) },
130};139};
131 140
141/**
142 * winbond_nor_write_ear() - Write Extended Address Register.
143 * @nor: pointer to 'struct spi_nor'.
144 * @ear: value to write to the Extended Address Register.
145 *
146 * Return: 0 on success, -errno otherwise.
147 */
148static int winbond_nor_write_ear(struct spi_nor *nor, u8 ear)
149{
150 int ret;
151
152 nor->bouncebuf[0] = ear;
153
154 if (nor->spimem) {
155 struct spi_mem_op op = WINBOND_NOR_WREAR_OP(nor->bouncebuf);
156
157 spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
158
159 ret = spi_mem_exec_op(nor->spimem, &op);
160 } else {
161 ret = spi_nor_controller_ops_write_reg(nor,
162 WINBOND_NOR_OP_WREAR,
163 nor->bouncebuf, 1);
164 }
165
166 if (ret)
167 dev_dbg(nor->dev, "error %d writing EAR\n", ret);
168
169 return ret;
170}
171
132/**172/**
133 * winbond_nor_set_4byte_addr_mode() - Set 4-byte address mode for Winbond173 * winbond_nor_set_4byte_addr_mode() - Set 4-byte address mode for Winbond
134 * flashes.174 * flashes.
@@ -155,7 +195,7 @@ static int winbond_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable) · 20 unmodified lines
155 if (ret)195 if (ret)
156 return ret;196 return ret;
157 197
158 ret = spi_nor_write_ear(nor, 0);198 ret = winbond_nor_write_ear(nor, 0);
159 if (ret)199 if (ret)
160 return ret;200 return ret;
161 201
include/linux/mtd/spi-nor.h+0−2
@@ -47,8 +47,6 @@ · 46 unmodified lines
47#define SPINOR_OP_RDID 0x9f /* Read JEDEC ID */47#define SPINOR_OP_RDID 0x9f /* Read JEDEC ID */
48#define SPINOR_OP_RDSFDP 0x5a /* Read SFDP */48#define SPINOR_OP_RDSFDP 0x5a /* Read SFDP */
49#define SPINOR_OP_RDCR 0x35 /* Read configuration register */49#define SPINOR_OP_RDCR 0x35 /* Read configuration register */
50#define SPINOR_OP_RDEAR 0xc8 /* Read Extended Address Register */
51#define SPINOR_OP_WREAR 0xc5 /* Write Extended Address Register */
52#define SPINOR_OP_SRSTEN 0x66 /* Software Reset Enable */50#define SPINOR_OP_SRSTEN 0x66 /* Software Reset Enable */
53#define SPINOR_OP_SRST 0x99 /* Software Reset */51#define SPINOR_OP_SRST 0x99 /* Software Reset */
54#define SPINOR_OP_GBULK 0x98 /* Global Block Unlock */52#define SPINOR_OP_GBULK 0x98 /* Global Block Unlock */