Pull iommu updates from Joerg Roedel: - Remove of the dev->archdata.iommu (or similar) pointers from most architectures. Only Sparc is left, but this is private to Sparc as their drivers don't use the IOMMU-API. - ARM-SMMU updates from Will Deacon: - Support for SMMU-500 implementation in Marvell Armada-AP806 SoC - Support for SMMU-500 implementation in NVIDIA Tegra194 SoC - DT compatible string updates - Remove unused IOMMU_SYS_CACHE_ONLY flag - Move ARM-SMMU drivers into their own subdirectory - Intel VT-d updates from Lu Baolu: - Misc tweaks and fixes for vSVA - Report/response page request events - Cleanups - Move the Kconfig and Makefile bits for the AMD and Intel drivers into their respective subdirectory. - MT6779 IOMMU Support - Support for new chipsets in the Renesas IOMMU driver - Other misc cleanups and fixes (e.g. to improve compile test coverage) * tag 'iommu-updates-v5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (77 commits) iommu/amd: Move Kconfig and Makefile bits down into amd directory iommu/vt-d: Move Kconfig and Makefile bits down into intel directory iommu/arm-smmu: Move Arm SMMU drivers into their own subdirectory iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu iommu: Add gfp parameter to io_pgtable_ops->map() iommu: Mark __iommu_map_sg() as static iommu/vt-d: Rename intel-pasid.h to pasid.h iommu/vt-d: Add page response ops support iommu/vt-d: Report page request faults for guest SVA iommu/vt-d: Add a helper to get svm and sdev for pasid iommu/vt-d: Refactor device_to_iommu() helper iommu/vt-d: Disable multiple GPASID-dev bind iommu/vt-d: Warn on out-of-range invalidation address iommu/vt-d: Fix devTLB flush for vSVA iommu/vt-d: Handle non-page aligned address iommu/vt-d: Fix PASID devTLB invalidation iommu/vt-d: Remove global page support in devTLB flush iommu/vt-d: Enforce PASID devTLB field mask iommu: Make some functions static iommu/amd: Remove double zero check ...
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| @@ -81,7 +81,10 @@ struct iommu_fault_unrecoverable { · 80 unmodified lines | |||
| 81 | /** | 81 | /** |
| 82 | * struct iommu_fault_page_request - Page Request data | 82 | * struct iommu_fault_page_request - Page Request data |
| 83 | * @flags: encodes whether the corresponding fields are valid and whether this | 83 | * @flags: encodes whether the corresponding fields are valid and whether this |
| 84 | * is the last page in group (IOMMU_FAULT_PAGE_REQUEST_* values) | 84 | * is the last page in group (IOMMU_FAULT_PAGE_REQUEST_* values). |
| 85 | * When IOMMU_FAULT_PAGE_RESPONSE_NEEDS_PASID is set, the page response | ||
| 86 | * must have the same PASID value as the page request. When it is clear, | ||
| 87 | * the page response should not have a PASID. | ||
| 85 | * @pasid: Process Address Space ID | 88 | * @pasid: Process Address Space ID |
| 86 | * @grpid: Page Request Group Index | 89 | * @grpid: Page Request Group Index |
| 87 | * @perm: requested page permissions (IOMMU_FAULT_PERM_* values) | 90 | * @perm: requested page permissions (IOMMU_FAULT_PERM_* values) |
| @@ -92,6 +95,7 @@ struct iommu_fault_page_request { · 4 unmodified lines | |||
| 92 | #define IOMMU_FAULT_PAGE_REQUEST_PASID_VALID (1 << 0) | 95 | #define IOMMU_FAULT_PAGE_REQUEST_PASID_VALID (1 << 0) |
| 93 | #define IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE (1 << 1) | 96 | #define IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE (1 << 1) |
| 94 | #define IOMMU_FAULT_PAGE_REQUEST_PRIV_DATA (1 << 2) | 97 | #define IOMMU_FAULT_PAGE_REQUEST_PRIV_DATA (1 << 2) |
| 98 | #define IOMMU_FAULT_PAGE_RESPONSE_NEEDS_PASID (1 << 3) | ||
| 95 | __u32 flags; | 99 | __u32 flags; |
| 96 | __u32 pasid; | 100 | __u32 pasid; |
| 97 | __u32 grpid; | 101 | __u32 grpid; |