History

Merge tag 'mlx5-fixes-2019-08-08' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux

Saeed Mahameed says: ==================== Mellanox, mlx5 fixes 2019-08-08 This series introduces some fixes to mlx5 driver. Highlights: 1) From Tariq, Critical mlx5 kTLS fixes to better align with hw specs. 2) From Aya, Fixes to mlx5 tx devlink health reporter. 3) From Maxim, aRFs parsing to use flow dissector to avoid relying on invalid skb fields. Please pull and let me know if there is any problem. For -stable v4.3 ('net/mlx5e: Only support tx/rx pause setting for port owner') For -stable v4.9 ('net/mlx5e: Use flow keys dissector to parse packets for ARFS') For -stable v5.1 ('net/mlx5e: Fix false negative indication on tx reporter CQE recovery') ('net/mlx5e: Remove redundant check in CQE recovery flow of tx reporter') ('net/mlx5e: ethtool, Avoid setting speed to 56GBASE when autoneg off') Note: when merged with net-next this minor conflict will pop up: ++<<<<<<< (net-next) + if (is_eswitch_flow) { + flow->esw_attr->match_level = match_level; + flow->esw_attr->tunnel_match_level = tunnel_match_level; ++======= + if (flow->flags & MLX5E_TC_FLOW_ESWITCH) { + flow->esw_attr->inner_match_level = inner_match_level; + flow->esw_attr->outer_match_level = outer_match_level; ++>>>>>>> (net) To resolve, use hunks from net (2nd) and replace: if (flow->flags & MLX5E_TC_FLOW_ESWITCH) with if (is_eswitch_flow) ====================

David S. Miller committed 7 years ago

Commit 9566e652 parents 8b63816 a4e508c13 files · +101 −109Browse files

Unified · Split

13 files
  1. drivers/net/ethernet/mellanox/mlx5/core/en.h +7 −2
  2. drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c +9 −10
  3. drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h +4 −2
  4. drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c +5 −5
  5. drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c +34 −63
  6. drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c +11 −0
  7. drivers/net/ethernet/mellanox/mlx5/core/en_main.c +0 −1
  8. drivers/net/ethernet/mellanox/mlx5/core/en_tc.c +20 −11
  9. drivers/net/ethernet/mellanox/mlx5/core/eswitch.h +2 −2
  10. drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +4 −8
  11. drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.c +1 −0
  12. include/linux/mlx5/device.h +2 −2
  13. include/linux/mlx5/mlx5_ifc.h +2 −3
drivers/net/ethernet/mellanox/mlx5/core/en.h+7−2
@@ -184,8 +184,13 @@ static inline int mlx5e_get_max_num_channels(struct mlx5_core_dev *mdev) · 183 unmodified lines
184 184
185struct mlx5e_tx_wqe {185struct mlx5e_tx_wqe {
186 struct mlx5_wqe_ctrl_seg ctrl;186 struct mlx5_wqe_ctrl_seg ctrl;
187 struct mlx5_wqe_eth_seg eth;187 union {
188 struct mlx5_wqe_data_seg data[0];188 struct {
189 struct mlx5_wqe_eth_seg eth;
190 struct mlx5_wqe_data_seg data[0];
191 };
192 u8 tls_progress_params_ctx[0];
193 };
189};194};
190 195
191struct mlx5e_rx_wqe_ll {196struct mlx5e_rx_wqe_ll {
drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c+9−10
@@ -76,26 +76,21 @@ static int mlx5e_tx_reporter_err_cqe_recover(struct mlx5e_txqsq *sq) · 75 unmodified lines
76 u8 state;76 u8 state;
77 int err;77 int err;
78 78
79 if (!test_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state))
80 return 0;
81
82 err = mlx5_core_query_sq_state(mdev, sq->sqn, &state);79 err = mlx5_core_query_sq_state(mdev, sq->sqn, &state);
83 if (err) {80 if (err) {
84 netdev_err(dev, "Failed to query SQ 0x%x state. err = %d\n",81 netdev_err(dev, "Failed to query SQ 0x%x state. err = %d\n",
85 sq->sqn, err);82 sq->sqn, err);
86 return err;83 goto out;
87 }84 }
88 85
89 if (state != MLX5_SQC_STATE_ERR) {86 if (state != MLX5_SQC_STATE_ERR)
90 netdev_err(dev, "SQ 0x%x not in ERROR state\n", sq->sqn);87 goto out;
91 return -EINVAL;
92 }
93 88
94 mlx5e_tx_disable_queue(sq->txq);89 mlx5e_tx_disable_queue(sq->txq);
95 90
96 err = mlx5e_wait_for_sq_flush(sq);91 err = mlx5e_wait_for_sq_flush(sq);
97 if (err)92 if (err)
98 return err;93 goto out;
99 94
100 /* At this point, no new packets will arrive from the stack as TXQ is95 /* At this point, no new packets will arrive from the stack as TXQ is
101 * marked with QUEUE_STATE_DRV_XOFF. In addition, NAPI cleared all96 * marked with QUEUE_STATE_DRV_XOFF. In addition, NAPI cleared all
@@ -104,13 +99,17 @@ static int mlx5e_tx_reporter_err_cqe_recover(struct mlx5e_txqsq *sq) · 2 unmodified lines
104 99
105 err = mlx5e_sq_to_ready(sq, state);100 err = mlx5e_sq_to_ready(sq, state);
106 if (err)101 if (err)
107 return err;102 goto out;
108 103
109 mlx5e_reset_txqsq_cc_pc(sq);104 mlx5e_reset_txqsq_cc_pc(sq);
110 sq->stats->recover++;105 sq->stats->recover++;
106 clear_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state);
111 mlx5e_activate_txqsq(sq);107 mlx5e_activate_txqsq(sq);
112 108
113 return 0;109 return 0;
110out:
111 clear_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state);
112 return err;
114}113}
115 114
116static int mlx5_tx_health_report(struct devlink_health_reporter *tx_reporter,115static int mlx5_tx_health_report(struct devlink_health_reporter *tx_reporter,
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls.h+4−2
@@ -11,12 +11,14 @@ · 10 unmodified lines
11#include "accel/tls.h"11#include "accel/tls.h"
12 12
13#define MLX5E_KTLS_STATIC_UMR_WQE_SZ \13#define MLX5E_KTLS_STATIC_UMR_WQE_SZ \
14 (sizeof(struct mlx5e_umr_wqe) + MLX5_ST_SZ_BYTES(tls_static_params))14 (offsetof(struct mlx5e_umr_wqe, tls_static_params_ctx) + \
15 MLX5_ST_SZ_BYTES(tls_static_params))
15#define MLX5E_KTLS_STATIC_WQEBBS \16#define MLX5E_KTLS_STATIC_WQEBBS \
16 (DIV_ROUND_UP(MLX5E_KTLS_STATIC_UMR_WQE_SZ, MLX5_SEND_WQE_BB))17 (DIV_ROUND_UP(MLX5E_KTLS_STATIC_UMR_WQE_SZ, MLX5_SEND_WQE_BB))
17 18
18#define MLX5E_KTLS_PROGRESS_WQE_SZ \19#define MLX5E_KTLS_PROGRESS_WQE_SZ \
19 (sizeof(struct mlx5e_tx_wqe) + MLX5_ST_SZ_BYTES(tls_progress_params))20 (offsetof(struct mlx5e_tx_wqe, tls_progress_params_ctx) + \
21 MLX5_ST_SZ_BYTES(tls_progress_params))
20#define MLX5E_KTLS_PROGRESS_WQEBBS \22#define MLX5E_KTLS_PROGRESS_WQEBBS \
21 (DIV_ROUND_UP(MLX5E_KTLS_PROGRESS_WQE_SZ, MLX5_SEND_WQE_BB))23 (DIV_ROUND_UP(MLX5E_KTLS_PROGRESS_WQE_SZ, MLX5_SEND_WQE_BB))
22#define MLX5E_KTLS_MAX_DUMP_WQEBBS 224#define MLX5E_KTLS_MAX_DUMP_WQEBBS 2
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ktls_tx.c+5−5
@@ -69,7 +69,7 @@ build_static_params(struct mlx5e_umr_wqe *wqe, u16 pc, u32 sqn, · 68 unmodified lines
69 cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) |69 cseg->qpn_ds = cpu_to_be32((sqn << MLX5_WQE_CTRL_QPN_SHIFT) |
70 STATIC_PARAMS_DS_CNT);70 STATIC_PARAMS_DS_CNT);
71 cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;71 cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;
72 cseg->imm = cpu_to_be32(priv_tx->tisn);72 cseg->tisn = cpu_to_be32(priv_tx->tisn << 8);
73 73
74 ucseg->flags = MLX5_UMR_INLINE;74 ucseg->flags = MLX5_UMR_INLINE;
75 ucseg->bsf_octowords = cpu_to_be16(MLX5_ST_SZ_BYTES(tls_static_params) / 16);75 ucseg->bsf_octowords = cpu_to_be16(MLX5_ST_SZ_BYTES(tls_static_params) / 16);
@@ -80,7 +80,7 @@ build_static_params(struct mlx5e_umr_wqe *wqe, u16 pc, u32 sqn, · 4 unmodified lines
80static void80static void
81fill_progress_params_ctx(void *ctx, struct mlx5e_ktls_offload_context_tx *priv_tx)81fill_progress_params_ctx(void *ctx, struct mlx5e_ktls_offload_context_tx *priv_tx)
82{82{
83 MLX5_SET(tls_progress_params, ctx, pd, priv_tx->tisn);83 MLX5_SET(tls_progress_params, ctx, tisn, priv_tx->tisn);
84 MLX5_SET(tls_progress_params, ctx, record_tracker_state,84 MLX5_SET(tls_progress_params, ctx, record_tracker_state,
85 MLX5E_TLS_PROGRESS_PARAMS_RECORD_TRACKER_STATE_START);85 MLX5E_TLS_PROGRESS_PARAMS_RECORD_TRACKER_STATE_START);
86 MLX5_SET(tls_progress_params, ctx, auth_state,86 MLX5_SET(tls_progress_params, ctx, auth_state,
@@ -104,7 +104,7 @@ build_progress_params(struct mlx5e_tx_wqe *wqe, u16 pc, u32 sqn, · 17 unmodified lines
104 PROGRESS_PARAMS_DS_CNT);104 PROGRESS_PARAMS_DS_CNT);
105 cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;105 cseg->fm_ce_se = fence ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;
106 106
107 fill_progress_params_ctx(wqe->data, priv_tx);107 fill_progress_params_ctx(wqe->tls_progress_params_ctx, priv_tx);
108}108}
109 109
110static void tx_fill_wi(struct mlx5e_txqsq *sq,110static void tx_fill_wi(struct mlx5e_txqsq *sq,
@@ -278,7 +278,7 @@ tx_post_resync_dump(struct mlx5e_txqsq *sq, struct sk_buff *skb, · 167 unmodified lines
278 278
279 cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_DUMP);279 cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_DUMP);
280 cseg->qpn_ds = cpu_to_be32((sq->sqn << 8) | ds_cnt);280 cseg->qpn_ds = cpu_to_be32((sq->sqn << 8) | ds_cnt);
281 cseg->imm = cpu_to_be32(tisn);281 cseg->tisn = cpu_to_be32(tisn << 8);
282 cseg->fm_ce_se = first ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;282 cseg->fm_ce_se = first ? MLX5_FENCE_MODE_INITIATOR_SMALL : 0;
283 283
284 eseg->inline_hdr.sz = cpu_to_be16(ihs);284 eseg->inline_hdr.sz = cpu_to_be16(ihs);
@@ -434,7 +434,7 @@ struct sk_buff *mlx5e_ktls_handle_tx_skb(struct net_device *netdev, · 149 unmodified lines
434 priv_tx->expected_seq = seq + datalen;434 priv_tx->expected_seq = seq + datalen;
435 435
436 cseg = &(*wqe)->ctrl;436 cseg = &(*wqe)->ctrl;
437 cseg->imm = cpu_to_be32(priv_tx->tisn);437 cseg->tisn = cpu_to_be32(priv_tx->tisn << 8);
438 438
439 stats->tls_encrypted_packets += skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 1;439 stats->tls_encrypted_packets += skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 1;
440 stats->tls_encrypted_bytes += datalen;440 stats->tls_encrypted_bytes += datalen;
drivers/net/ethernet/mellanox/mlx5/core/en_arfs.c+34−63
@@ -437,12 +437,6 @@ arfs_hash_bucket(struct arfs_table *arfs_t, __be16 src_port, · 436 unmodified lines
437 return &arfs_t->rules_hash[bucket_idx];437 return &arfs_t->rules_hash[bucket_idx];
438}438}
439 439
440static u8 arfs_get_ip_proto(const struct sk_buff *skb)
441{
442 return (skb->protocol == htons(ETH_P_IP)) ?
443 ip_hdr(skb)->protocol : ipv6_hdr(skb)->nexthdr;
444}
445
446static struct arfs_table *arfs_get_table(struct mlx5e_arfs_tables *arfs,440static struct arfs_table *arfs_get_table(struct mlx5e_arfs_tables *arfs,
447 u8 ip_proto, __be16 etype)441 u8 ip_proto, __be16 etype)
448{442{
@@ -602,31 +596,9 @@ out: · 153 unmodified lines
602 arfs_may_expire_flow(priv);596 arfs_may_expire_flow(priv);
603}597}
604 598
605/* return L4 destination port from ip4/6 packets */
606static __be16 arfs_get_dst_port(const struct sk_buff *skb)
607{
608 char *transport_header;
609
610 transport_header = skb_transport_header(skb);
611 if (arfs_get_ip_proto(skb) == IPPROTO_TCP)
612 return ((struct tcphdr *)transport_header)->dest;
613 return ((struct udphdr *)transport_header)->dest;
614}
615
616/* return L4 source port from ip4/6 packets */
617static __be16 arfs_get_src_port(const struct sk_buff *skb)
618{
619 char *transport_header;
620
621 transport_header = skb_transport_header(skb);
622 if (arfs_get_ip_proto(skb) == IPPROTO_TCP)
623 return ((struct tcphdr *)transport_header)->source;
624 return ((struct udphdr *)transport_header)->source;
625}
626
627static struct arfs_rule *arfs_alloc_rule(struct mlx5e_priv *priv,599static struct arfs_rule *arfs_alloc_rule(struct mlx5e_priv *priv,
628 struct arfs_table *arfs_t,600 struct arfs_table *arfs_t,
629 const struct sk_buff *skb,601 const struct flow_keys *fk,
630 u16 rxq, u32 flow_id)602 u16 rxq, u32 flow_id)
631{603{
632 struct arfs_rule *rule;604 struct arfs_rule *rule;
@@ -641,19 +613,19 @@ static struct arfs_rule *arfs_alloc_rule(struct mlx5e_priv *priv, · 8 unmodified lines
641 INIT_WORK(&rule->arfs_work, arfs_handle_work);613 INIT_WORK(&rule->arfs_work, arfs_handle_work);
642 614
643 tuple = &rule->tuple;615 tuple = &rule->tuple;
644 tuple->etype = skb->protocol;616 tuple->etype = fk->basic.n_proto;
617 tuple->ip_proto = fk->basic.ip_proto;
645 if (tuple->etype == htons(ETH_P_IP)) {618 if (tuple->etype == htons(ETH_P_IP)) {
646 tuple->src_ipv4 = ip_hdr(skb)->saddr;619 tuple->src_ipv4 = fk->addrs.v4addrs.src;
647 tuple->dst_ipv4 = ip_hdr(skb)->daddr;620 tuple->dst_ipv4 = fk->addrs.v4addrs.dst;
648 } else {621 } else {
649 memcpy(&tuple->src_ipv6, &ipv6_hdr(skb)->saddr,622 memcpy(&tuple->src_ipv6, &fk->addrs.v6addrs.src,
650 sizeof(struct in6_addr));623 sizeof(struct in6_addr));
651 memcpy(&tuple->dst_ipv6, &ipv6_hdr(skb)->daddr,624 memcpy(&tuple->dst_ipv6, &fk->addrs.v6addrs.dst,
652 sizeof(struct in6_addr));625 sizeof(struct in6_addr));
653 }626 }
654 tuple->ip_proto = arfs_get_ip_proto(skb);627 tuple->src_port = fk->ports.src;
655 tuple->src_port = arfs_get_src_port(skb);628 tuple->dst_port = fk->ports.dst;
656 tuple->dst_port = arfs_get_dst_port(skb);
657 629
658 rule->flow_id = flow_id;630 rule->flow_id = flow_id;
659 rule->filter_id = priv->fs.arfs.last_filter_id++ % RPS_NO_FILTER;631 rule->filter_id = priv->fs.arfs.last_filter_id++ % RPS_NO_FILTER;
@@ -664,37 +636,33 @@ static struct arfs_rule *arfs_alloc_rule(struct mlx5e_priv *priv, · 4 unmodified lines
664 return rule;636 return rule;
665}637}
666 638
667static bool arfs_cmp_ips(struct arfs_tuple *tuple,639static bool arfs_cmp(const struct arfs_tuple *tuple, const struct flow_keys *fk)
668 const struct sk_buff *skb)
669{640{
670 if (tuple->etype == htons(ETH_P_IP) &&641 if (tuple->src_port != fk->ports.src || tuple->dst_port != fk->ports.dst)
671 tuple->src_ipv4 == ip_hdr(skb)->saddr &&642 return false;
672 tuple->dst_ipv4 == ip_hdr(skb)->daddr)643 if (tuple->etype != fk->basic.n_proto)
673 return true;644 return false;
674 if (tuple->etype == htons(ETH_P_IPV6) &&645 if (tuple->etype == htons(ETH_P_IP))
675 (!memcmp(&tuple->src_ipv6, &ipv6_hdr(skb)->saddr,646 return tuple->src_ipv4 == fk->addrs.v4addrs.src &&
676 sizeof(struct in6_addr))) &&647 tuple->dst_ipv4 == fk->addrs.v4addrs.dst;
677 (!memcmp(&tuple->dst_ipv6, &ipv6_hdr(skb)->daddr,648 if (tuple->etype == htons(ETH_P_IPV6))
678 sizeof(struct in6_addr))))649 return !memcmp(&tuple->src_ipv6, &fk->addrs.v6addrs.src,
679 return true;650 sizeof(struct in6_addr)) &&
651 !memcmp(&tuple->dst_ipv6, &fk->addrs.v6addrs.dst,
652 sizeof(struct in6_addr));
680 return false;653 return false;
681}654}
682 655
683static struct arfs_rule *arfs_find_rule(struct arfs_table *arfs_t,656static struct arfs_rule *arfs_find_rule(struct arfs_table *arfs_t,
684 const struct sk_buff *skb)657 const struct flow_keys *fk)
685{658{
686 struct arfs_rule *arfs_rule;659 struct arfs_rule *arfs_rule;
687 struct hlist_head *head;660 struct hlist_head *head;
688 __be16 src_port = arfs_get_src_port(skb);
689 __be16 dst_port = arfs_get_dst_port(skb);
690 661
691 head = arfs_hash_bucket(arfs_t, src_port, dst_port);662 head = arfs_hash_bucket(arfs_t, fk->ports.src, fk->ports.dst);
692 hlist_for_each_entry(arfs_rule, head, hlist) {663 hlist_for_each_entry(arfs_rule, head, hlist) {
693 if (arfs_rule->tuple.src_port == src_port &&664 if (arfs_cmp(&arfs_rule->tuple, fk))
694 arfs_rule->tuple.dst_port == dst_port &&
695 arfs_cmp_ips(&arfs_rule->tuple, skb)) {
696 return arfs_rule;665 return arfs_rule;
697 }
698 }666 }
699 667
700 return NULL;668 return NULL;
@@ -707,20 +675,24 @@ int mlx5e_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb, · 6 unmodified lines
707 struct mlx5e_arfs_tables *arfs = &priv->fs.arfs;675 struct mlx5e_arfs_tables *arfs = &priv->fs.arfs;
708 struct arfs_table *arfs_t;676 struct arfs_table *arfs_t;
709 struct arfs_rule *arfs_rule;677 struct arfs_rule *arfs_rule;
678 struct flow_keys fk;
679
680 if (!skb_flow_dissect_flow_keys(skb, &fk, 0))
681 return -EPROTONOSUPPORT;
710 682
711 if (skb->protocol != htons(ETH_P_IP) &&683 if (fk.basic.n_proto != htons(ETH_P_IP) &&
712 skb->protocol != htons(ETH_P_IPV6))684 fk.basic.n_proto != htons(ETH_P_IPV6))
713 return -EPROTONOSUPPORT;685 return -EPROTONOSUPPORT;
714 686
715 if (skb->encapsulation)687 if (skb->encapsulation)
716 return -EPROTONOSUPPORT;688 return -EPROTONOSUPPORT;
717 689
718 arfs_t = arfs_get_table(arfs, arfs_get_ip_proto(skb), skb->protocol);690 arfs_t = arfs_get_table(arfs, fk.basic.ip_proto, fk.basic.n_proto);
719 if (!arfs_t)691 if (!arfs_t)
720 return -EPROTONOSUPPORT;692 return -EPROTONOSUPPORT;
721 693
722 spin_lock_bh(&arfs->arfs_lock);694 spin_lock_bh(&arfs->arfs_lock);
723 arfs_rule = arfs_find_rule(arfs_t, skb);695 arfs_rule = arfs_find_rule(arfs_t, &fk);
724 if (arfs_rule) {696 if (arfs_rule) {
725 if (arfs_rule->rxq == rxq_index) {697 if (arfs_rule->rxq == rxq_index) {
726 spin_unlock_bh(&arfs->arfs_lock);698 spin_unlock_bh(&arfs->arfs_lock);
@@ -728,8 +700,7 @@ int mlx5e_rx_flow_steer(struct net_device *dev, const struct sk_buff *skb, · 1 unmodified line
728 }700 }
729 arfs_rule->rxq = rxq_index;701 arfs_rule->rxq = rxq_index;
730 } else {702 } else {
731 arfs_rule = arfs_alloc_rule(priv, arfs_t, skb,703 arfs_rule = arfs_alloc_rule(priv, arfs_t, &fk, rxq_index, flow_id);
732 rxq_index, flow_id);
733 if (!arfs_rule) {704 if (!arfs_rule) {
734 spin_unlock_bh(&arfs->arfs_lock);705 spin_unlock_bh(&arfs->arfs_lock);
735 return -ENOMEM;706 return -ENOMEM;
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c+11−0
@@ -1081,6 +1081,14 @@ int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv, · 1080 unmodified lines
1081 link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :1081 link_modes = autoneg == AUTONEG_ENABLE ? ethtool2ptys_adver_func(adver) :
1082 mlx5e_port_speed2linkmodes(mdev, speed, !ext);1082 mlx5e_port_speed2linkmodes(mdev, speed, !ext);
1083 1083
1084 if ((link_modes & MLX5E_PROT_MASK(MLX5E_56GBASE_R4)) &&
1085 autoneg != AUTONEG_ENABLE) {
1086 netdev_err(priv->netdev, "%s: 56G link speed requires autoneg enabled\n",
1087 __func__);
1088 err = -EINVAL;
1089 goto out;
1090 }
1091
1084 link_modes = link_modes & eproto.cap;1092 link_modes = link_modes & eproto.cap;
1085 if (!link_modes) {1093 if (!link_modes) {
1086 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",1094 netdev_err(priv->netdev, "%s: Not supported link mode(s) requested",
@@ -1338,6 +1346,9 @@ int mlx5e_ethtool_set_pauseparam(struct mlx5e_priv *priv, · 251 unmodified lines
1338 struct mlx5_core_dev *mdev = priv->mdev;1346 struct mlx5_core_dev *mdev = priv->mdev;
1339 int err;1347 int err;
1340 1348
1349 if (!MLX5_CAP_GEN(mdev, vport_group_manager))
1350 return -EOPNOTSUPP;
1351
1341 if (pauseparam->autoneg)1352 if (pauseparam->autoneg)
1342 return -EINVAL;1353 return -EINVAL;
1343 1354
drivers/net/ethernet/mellanox/mlx5/core/en_main.c+0−1
@@ -1321,7 +1321,6 @@ err_free_txqsq: · 1320 unmodified lines
1321void mlx5e_activate_txqsq(struct mlx5e_txqsq *sq)1321void mlx5e_activate_txqsq(struct mlx5e_txqsq *sq)
1322{1322{
1323 sq->txq = netdev_get_tx_queue(sq->channel->netdev, sq->txq_ix);1323 sq->txq = netdev_get_tx_queue(sq->channel->netdev, sq->txq_ix);
1324 clear_bit(MLX5E_SQ_STATE_RECOVERING, &sq->state);
1325 set_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);1324 set_bit(MLX5E_SQ_STATE_ENABLED, &sq->state);
1326 netdev_tx_reset_queue(sq->txq);1325 netdev_tx_reset_queue(sq->txq);
1327 netif_tx_start_queue(sq->txq);1326 netif_tx_start_queue(sq->txq);
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c+20−11
@@ -1480,7 +1480,7 @@ static int __parse_cls_flower(struct mlx5e_priv *priv, · 1479 unmodified lines
1480 struct mlx5_flow_spec *spec,1480 struct mlx5_flow_spec *spec,
1481 struct flow_cls_offload *f,1481 struct flow_cls_offload *f,
1482 struct net_device *filter_dev,1482 struct net_device *filter_dev,
1483 u8 *match_level, u8 *tunnel_match_level)1483 u8 *inner_match_level, u8 *outer_match_level)
1484{1484{
1485 struct netlink_ext_ack *extack = f->common.extack;1485 struct netlink_ext_ack *extack = f->common.extack;
1486 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,1486 void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
@@ -1495,8 +1495,9 @@ static int __parse_cls_flower(struct mlx5e_priv *priv, · 8 unmodified lines
1495 struct flow_dissector *dissector = rule->match.dissector;1495 struct flow_dissector *dissector = rule->match.dissector;
1496 u16 addr_type = 0;1496 u16 addr_type = 0;
1497 u8 ip_proto = 0;1497 u8 ip_proto = 0;
1498 u8 *match_level;
1498 1499
1499 *match_level = MLX5_MATCH_NONE;1500 match_level = outer_match_level;
1500 1501
1501 if (dissector->used_keys &1502 if (dissector->used_keys &
1502 ~(BIT(FLOW_DISSECTOR_KEY_META) |1503 ~(BIT(FLOW_DISSECTOR_KEY_META) |
@@ -1524,12 +1525,14 @@ static int __parse_cls_flower(struct mlx5e_priv *priv, · 21 unmodified lines
1524 }1525 }
1525 1526
1526 if (mlx5e_get_tc_tun(filter_dev)) {1527 if (mlx5e_get_tc_tun(filter_dev)) {
1527 if (parse_tunnel_attr(priv, spec, f, filter_dev, tunnel_match_level))1528 if (parse_tunnel_attr(priv, spec, f, filter_dev,
1529 outer_match_level))
1528 return -EOPNOTSUPP;1530 return -EOPNOTSUPP;
1529 1531
1530 /* In decap flow, header pointers should point to the inner1532 /* At this point, header pointers should point to the inner
1531 * headers, outer header were already set by parse_tunnel_attr1533 * headers, outer header were already set by parse_tunnel_attr
1532 */1534 */
1535 match_level = inner_match_level;
1533 headers_c = get_match_headers_criteria(MLX5_FLOW_CONTEXT_ACTION_DECAP,1536 headers_c = get_match_headers_criteria(MLX5_FLOW_CONTEXT_ACTION_DECAP,
1534 spec);1537 spec);
1535 headers_v = get_match_headers_value(MLX5_FLOW_CONTEXT_ACTION_DECAP,1538 headers_v = get_match_headers_value(MLX5_FLOW_CONTEXT_ACTION_DECAP,
@@ -1831,35 +1834,41 @@ static int parse_cls_flower(struct mlx5e_priv *priv, · 295 unmodified lines
1831 struct flow_cls_offload *f,1834 struct flow_cls_offload *f,
1832 struct net_device *filter_dev)1835 struct net_device *filter_dev)
1833{1836{
1837 u8 inner_match_level, outer_match_level, non_tunnel_match_level;
1834 struct netlink_ext_ack *extack = f->common.extack;1838 struct netlink_ext_ack *extack = f->common.extack;
1835 struct mlx5_core_dev *dev = priv->mdev;1839 struct mlx5_core_dev *dev = priv->mdev;
1836 struct mlx5_eswitch *esw = dev->priv.eswitch;1840 struct mlx5_eswitch *esw = dev->priv.eswitch;
1837 struct mlx5e_rep_priv *rpriv = priv->ppriv;1841 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1838 u8 match_level, tunnel_match_level = MLX5_MATCH_NONE;
1839 struct mlx5_eswitch_rep *rep;1842 struct mlx5_eswitch_rep *rep;
1840 int err;1843 int err;
1841 1844
1842 err = __parse_cls_flower(priv, spec, f, filter_dev, &match_level, &tunnel_match_level);1845 inner_match_level = MLX5_MATCH_NONE;
1846 outer_match_level = MLX5_MATCH_NONE;
1847
1848 err = __parse_cls_flower(priv, spec, f, filter_dev, &inner_match_level,
1849 &outer_match_level);
1850 non_tunnel_match_level = (inner_match_level == MLX5_MATCH_NONE) ?
1851 outer_match_level : inner_match_level;
1843 1852
1844 if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {1853 if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) {
1845 rep = rpriv->rep;1854 rep = rpriv->rep;
1846 if (rep->vport != MLX5_VPORT_UPLINK &&1855 if (rep->vport != MLX5_VPORT_UPLINK &&
1847 (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&1856 (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE &&
1848 esw->offloads.inline_mode < match_level)) {1857 esw->offloads.inline_mode < non_tunnel_match_level)) {
1849 NL_SET_ERR_MSG_MOD(extack,1858 NL_SET_ERR_MSG_MOD(extack,
1850 "Flow is not offloaded due to min inline setting");1859 "Flow is not offloaded due to min inline setting");
1851 netdev_warn(priv->netdev,1860 netdev_warn(priv->netdev,
1852 "Flow is not offloaded due to min inline setting, required %d actual %d\n",1861 "Flow is not offloaded due to min inline setting, required %d actual %d\n",
1853 match_level, esw->offloads.inline_mode);1862 non_tunnel_match_level, esw->offloads.inline_mode);
1854 return -EOPNOTSUPP;1863 return -EOPNOTSUPP;
1855 }1864 }
1856 }1865 }
1857 1866
1858 if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {1867 if (flow->flags & MLX5E_TC_FLOW_ESWITCH) {
1859 flow->esw_attr->match_level = match_level;1868 flow->esw_attr->inner_match_level = inner_match_level;
1860 flow->esw_attr->tunnel_match_level = tunnel_match_level;1869 flow->esw_attr->outer_match_level = outer_match_level;
1861 } else {1870 } else {
1862 flow->nic_attr->match_level = match_level;1871 flow->nic_attr->match_level = non_tunnel_match_level;
1863 }1872 }
1864 1873
1865 return err;1874 return err;
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h+2−2
@@ -377,8 +377,8 @@ struct mlx5_esw_flow_attr { · 376 unmodified lines
377 struct mlx5_termtbl_handle *termtbl;377 struct mlx5_termtbl_handle *termtbl;
378 } dests[MLX5_MAX_FLOW_FWD_VPORTS];378 } dests[MLX5_MAX_FLOW_FWD_VPORTS];
379 u32 mod_hdr_id;379 u32 mod_hdr_id;
380 u8 match_level;380 u8 inner_match_level;
381 u8 tunnel_match_level;381 u8 outer_match_level;
382 struct mlx5_fc *counter;382 struct mlx5_fc *counter;
383 u32 chain;383 u32 chain;
384 u16 prio;384 u16 prio;
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c+4−8
@@ -207,14 +207,10 @@ mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw, · 206 unmodified lines
207 207
208 mlx5_eswitch_set_rule_source_port(esw, spec, attr);208 mlx5_eswitch_set_rule_source_port(esw, spec, attr);
209 209
210 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_DECAP) {210 if (attr->outer_match_level != MLX5_MATCH_NONE)
211 if (attr->tunnel_match_level != MLX5_MATCH_NONE)
212 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;
213 if (attr->match_level != MLX5_MATCH_NONE)
214 spec->match_criteria_enable |= MLX5_MATCH_INNER_HEADERS;
215 } else if (attr->match_level != MLX5_MATCH_NONE) {
216 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;211 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;
217 }212 if (attr->inner_match_level != MLX5_MATCH_NONE)
213 spec->match_criteria_enable |= MLX5_MATCH_INNER_HEADERS;
218 214
219 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)215 if (flow_act.action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)
220 flow_act.modify_id = attr->mod_hdr_id;216 flow_act.modify_id = attr->mod_hdr_id;
@@ -290,7 +286,7 @@ mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw, · 69 unmodified lines
290 mlx5_eswitch_set_rule_source_port(esw, spec, attr);286 mlx5_eswitch_set_rule_source_port(esw, spec, attr);
291 287
292 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;288 spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS;
293 if (attr->match_level != MLX5_MATCH_NONE)289 if (attr->outer_match_level != MLX5_MATCH_NONE)
294 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;290 spec->match_criteria_enable |= MLX5_MATCH_OUTER_HEADERS;
295 291
296 rule = mlx5_add_flow_rules(fast_fdb, spec, &flow_act, dest, i);292 rule = mlx5_add_flow_rules(fast_fdb, spec, &flow_act, dest, i);
drivers/net/ethernet/mellanox/mlx5/core/lib/crypto.c+1−0
@@ -27,6 +27,7 @@ int mlx5_create_encryption_key(struct mlx5_core_dev *mdev, · 26 unmodified lines
27 case 128:27 case 128:
28 general_obj_key_size =28 general_obj_key_size =
29 MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_128;29 MLX5_GENERAL_OBJECT_TYPE_ENCRYPTION_KEY_KEY_SIZE_128;
30 key_p += sz_bytes;
30 break;31 break;
31 case 256:32 case 256:
32 general_obj_key_size =33 general_obj_key_size =
include/linux/mlx5/device.h+2−2
@@ -446,11 +446,11 @@ enum { · 445 unmodified lines
446};446};
447 447
448enum {448enum {
449 MLX5_OPC_MOD_TLS_TIS_STATIC_PARAMS = 0x20,449 MLX5_OPC_MOD_TLS_TIS_STATIC_PARAMS = 0x1,
450};450};
451 451
452enum {452enum {
453 MLX5_OPC_MOD_TLS_TIS_PROGRESS_PARAMS = 0x20,453 MLX5_OPC_MOD_TLS_TIS_PROGRESS_PARAMS = 0x1,
454};454};
455 455
456enum {456enum {
include/linux/mlx5/mlx5_ifc.h+2−3
@@ -10054,9 +10054,8 @@ struct mlx5_ifc_tls_static_params_bits { · 10053 unmodified lines
10054};10054};
10055 10055
10056struct mlx5_ifc_tls_progress_params_bits {10056struct mlx5_ifc_tls_progress_params_bits {
10057 u8 valid[0x1];10057 u8 reserved_at_0[0x8];
10058 u8 reserved_at_1[0x7];10058 u8 tisn[0x18];
10059 u8 pd[0x18];
10060 10059
10061 u8 next_record_tcp_sn[0x20];10060 u8 next_record_tcp_sn[0x20];
10062 10061

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