History

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus

Pull mips fixes from Ralf Baechle: "The hopefully final round of fixes for 3.18: - Fix a number of build errors affecting particular configurations. - Handle EVA correctly when flushing a signal trampoline and dcache lines. - Fix printks printing jibberish. - Handle 64 bit memory addresses correctly when adding memory chunk on 32 bit kernels. - Fix a race condition in the hardware tablewalker code" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: tlbex: Fix potential HTW race on TLBL/M/S handlers MIPS: Fix address type used for early memory detection. MIPS: Kconfig: Don't allow both microMIPS and SmartMIPS to be selected. MIPS: kernel: cps-vec: Set ISA level to mips32r2 for the MIPS MT ASE MIPS: Netlogic: handle modular AHCI builds MIPS: Netlogic: handle modular USB case MIPS: Loongson: Make platform serial setup always built-in. MIPS: fix EVA & non-SMP non-FPU FP context signal handling MIPS: cpu-probe: Set the FTLB probability bit on supported cores MIPS: BMIPS: Fix ".previous without corresponding .section" warnings MIPS: uaccess.h: Fix strnlen_user comment. MIPS: r4kcache: Add EVA case for protected_writeback_dcache_line MIPS: Fix info about plat_setup in arch_mem_init comment MIPS: rtlx: Remove KERN_DEBUG from pr_debug() arguments in rtlx.c MIPS: SEAD3: Fix LED device registration. MIPS: Fix a copy & paste error in unistd.h

Linus Torvalds committed 11 years ago

Commit 98e8d2e2 parents 21f122f 070e76c15 files · +84 −31Browse files

Unified · Split

15 files
  1. arch/mips/Kconfig +12 −2
  2. arch/mips/include/asm/mipsregs.h +2 −0
  3. arch/mips/include/asm/r4kcache.h +4 −0
  4. arch/mips/include/asm/uaccess.h +2 −4
  5. arch/mips/include/uapi/asm/unistd.h +1 −1
  6. arch/mips/kernel/bmips_vec.S +0 −3
  7. arch/mips/kernel/cps-vec.S +2 −0
  8. arch/mips/kernel/cpu-probe.c +32 −1
  9. arch/mips/kernel/rtlx.c +2 −2
  10. arch/mips/kernel/setup.c +2 −2
  11. arch/mips/kernel/signal.c +4 −4
  12. arch/mips/loongson/common/Makefile +2 −1
  13. arch/mips/mm/tlbex.c +9 −1
  14. arch/mips/mti-sead3/sead3-leds.c +2 −6
  15. arch/mips/netlogic/xlp/Makefile +8 −4
arch/mips/Kconfig+12−2
@@ -2101,9 +2101,17 @@ config 64BIT_PHYS_ADDR · 2100 unmodified lines
21012101 config ARCH_PHYS_ADDR_T_64BIT
21022102 def_bool 64BIT_PHYS_ADDR
21032103
2104+choice
2105+ prompt "SmartMIPS or microMIPS ASE support"
2106+
2107+config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2108+ bool "None"
2109+ help
2110+ Select this if you want neither microMIPS nor SmartMIPS support
2111+
21042112 config CPU_HAS_SMARTMIPS
21052113 depends on SYS_SUPPORTS_SMARTMIPS
2106− bool "Support for the SmartMIPS ASE"
2114+ bool "SmartMIPS"
21072115 help
21082116 SmartMIPS is a extension of the MIPS32 architecture aimed at
21092117 increased security at both hardware and software level for
@@ -2115,11 +2123,13 @@ config CPU_HAS_SMARTMIPS · 5 unmodified lines
21152123
21162124 config CPU_MICROMIPS
21172125 depends on SYS_SUPPORTS_MICROMIPS
2118− bool "Build kernel using microMIPS ISA"
2126+ bool "microMIPS"
21192127 help
21202128 When this option is enabled the kernel will be built using the
21212129 microMIPS ISA
21222130
2131+endchoice
2132+
21232133 config CPU_HAS_MSA
21242134 bool "Support for the MIPS SIMD Architecture (EXPERIMENTAL)"
21252135 depends on CPU_SUPPORTS_MSA
arch/mips/include/asm/mipsregs.h+2−0
@@ -661,6 +661,8 @@ · 660 unmodified lines
661661 #define MIPS_CONF6_SYND (_ULCAST_(1) << 13)
662662 /* proAptiv FTLB on/off bit */
663663 #define MIPS_CONF6_FTLBEN (_ULCAST_(1) << 15)
664+/* FTLB probability bits */
665+#define MIPS_CONF6_FTLBP_SHIFT (16)
664666
665667 #define MIPS_CONF7_WII (_ULCAST_(1) << 31)
666668
arch/mips/include/asm/r4kcache.h+4−0
@@ -257,7 +257,11 @@ static inline void protected_flush_icache_line(unsigned long addr) · 256 unmodified lines
257257 */
258258 static inline void protected_writeback_dcache_line(unsigned long addr)
259259 {
260+#ifdef CONFIG_EVA
261+ protected_cachee_op(Hit_Writeback_Inv_D, addr);
262+#else
260263 protected_cache_op(Hit_Writeback_Inv_D, addr);
264+#endif
261265 }
262266
263267 static inline void protected_writeback_scache_line(unsigned long addr)
arch/mips/include/asm/uaccess.h+2−4
@@ -1422,7 +1422,7 @@ static inline long __strnlen_user(const char __user *s, long n) · 1421 unmodified lines
14221422 }
14231423
14241424 /*
1425− * strlen_user: - Get the size of a string in user space.
1425+ * strnlen_user: - Get the size of a string in user space.
14261426 * @str: The string to measure.
14271427 *
14281428 * Context: User context only. This function may sleep.
@@ -1431,9 +1431,7 @@ static inline long __strnlen_user(const char __user *s, long n) · 2 unmodified lines
14311431 *
14321432 * Returns the size of the string INCLUDING the terminating NUL.
14331433 * On exception, returns 0.
1434− *
1435− * If there is a limit on the length of a valid string, you may wish to
1436− * consider using strnlen_user() instead.
1434+ * If the string is too long, returns a value greater than @n.
14371435 */
14381436 static inline long strnlen_user(const char __user *s, long n)
14391437 {
arch/mips/include/uapi/asm/unistd.h+1−1
@@ -1045,7 +1045,7 @@ · 1044 unmodified lines
10451045 #define __NR_seccomp (__NR_Linux + 316)
10461046 #define __NR_getrandom (__NR_Linux + 317)
10471047 #define __NR_memfd_create (__NR_Linux + 318)
1048−#define __NR_memfd_create (__NR_Linux + 319)
1048+#define __NR_bpf (__NR_Linux + 319)
10491049
10501050 /*
10511051 * Offset of the last N32 flavoured syscall
arch/mips/kernel/bmips_vec.S+0−3
@@ -208,7 +208,6 @@ bmips_reset_nmi_vec_end: · 207 unmodified lines
208208 END(bmips_reset_nmi_vec)
209209
210210 .set pop
211− .previous
212211
213212 /***********************************************************************
214213 * CPU1 warm restart vector (used for second and subsequent boots).
@@ -281,5 +280,3 @@ LEAF(bmips_enable_xks01) · 66 unmodified lines
281280 jr ra
282281
283282 END(bmips_enable_xks01)
284−
285− .previous
arch/mips/kernel/cps-vec.S+2−0
@@ -229,6 +229,7 @@ LEAF(mips_cps_core_init) · 228 unmodified lines
229229 nop
230230
231231 .set push
232+ .set mips32r2
232233 .set mt
233234
234235 /* Only allow 1 TC per VPE to execute... */
@@ -345,6 +346,7 @@ LEAF(mips_cps_boot_vpes) · 110 unmodified lines
345346 nop
346347
347348 .set push
349+ .set mips32r2
348350 .set mt
349351
350352 1: /* Enter VPE configuration state */
arch/mips/kernel/cpu-probe.c+32−1
@@ -193,6 +193,32 @@ static void set_isa(struct cpuinfo_mips *c, unsigned int isa) · 192 unmodified lines
193193 static char unknown_isa[] = KERN_ERR \
194194 "Unsupported ISA type, c0.config0: %d.";
195195
196+static unsigned int calculate_ftlb_probability(struct cpuinfo_mips *c)
197+{
198+
199+ unsigned int probability = c->tlbsize / c->tlbsizevtlb;
200+
201+ /*
202+ * 0 = All TLBWR instructions go to FTLB
203+ * 1 = 15:1: For every 16 TBLWR instructions, 15 go to the
204+ * FTLB and 1 goes to the VTLB.
205+ * 2 = 7:1: As above with 7:1 ratio.
206+ * 3 = 3:1: As above with 3:1 ratio.
207+ *
208+ * Use the linear midpoint as the probability threshold.
209+ */
210+ if (probability >= 12)
211+ return 1;
212+ else if (probability >= 6)
213+ return 2;
214+ else
215+ /*
216+ * So FTLB is less than 4 times bigger than VTLB.
217+ * A 3:1 ratio can still be useful though.
218+ */
219+ return 3;
220+}
221+
196222 static void set_ftlb_enable(struct cpuinfo_mips *c, int enable)
197223 {
198224 unsigned int config6;
@@ -203,9 +229,14 @@ static void set_ftlb_enable(struct cpuinfo_mips *c, int enable) · 4 unmodified lines
203229 case CPU_P5600:
204230 /* proAptiv & related cores use Config6 to enable the FTLB */
205231 config6 = read_c0_config6();
232+ /* Clear the old probability value */
233+ config6 &= ~(3 << MIPS_CONF6_FTLBP_SHIFT);
206234 if (enable)
207235 /* Enable FTLB */
208− write_c0_config6(config6 | MIPS_CONF6_FTLBEN);
236+ write_c0_config6(config6 |
237+ (calculate_ftlb_probability(c)
238+ << MIPS_CONF6_FTLBP_SHIFT)
239+ | MIPS_CONF6_FTLBEN);
209240 else
210241 /* Disable FTLB */
211242 write_c0_config6(config6 & ~MIPS_CONF6_FTLBEN);
arch/mips/kernel/rtlx.c+2−2
@@ -94,12 +94,12 @@ int rtlx_open(int index, int can_sleep) · 93 unmodified lines
9494 int ret = 0;
9595
9696 if (index >= RTLX_CHANNELS) {
97− pr_debug(KERN_DEBUG "rtlx_open index out of range\n");
97+ pr_debug("rtlx_open index out of range\n");
9898 return -ENOSYS;
9999 }
100100
101101 if (atomic_inc_return(&channel_wqs[index].in_open) > 1) {
102− pr_debug(KERN_DEBUG "rtlx_open channel %d already opened\n", index);
102+ pr_debug("rtlx_open channel %d already opened\n", index);
103103 ret = -EBUSY;
104104 goto out_fail;
105105 }
arch/mips/kernel/setup.c+2−2
@@ -485,7 +485,7 @@ static void __init bootmem_init(void) · 484 unmodified lines
485485 * NOTE: historically plat_mem_setup did the entire platform initialization.
486486 * This was rather impractical because it meant plat_mem_setup had to
487487 * get away without any kind of memory allocator. To keep old code from
488− * breaking plat_setup was just renamed to plat_setup and a second platform
488+ * breaking plat_setup was just renamed to plat_mem_setup and a second platform
489489 * initialization hook for anything else was introduced.
490490 */
491491
@@ -493,7 +493,7 @@ static int usermem __initdata; · 1 unmodified line
493493
494494 static int __init early_parse_mem(char *p)
495495 {
496− unsigned long start, size;
496+ phys_t start, size;
497497
498498 /*
499499 * If a user specifies memory size, we
arch/mips/kernel/signal.c+4−4
@@ -658,13 +658,13 @@ static int signal_setup(void) · 657 unmodified lines
658658 save_fp_context = _save_fp_context;
659659 restore_fp_context = _restore_fp_context;
660660 } else {
661− save_fp_context = copy_fp_from_sigcontext;
662− restore_fp_context = copy_fp_to_sigcontext;
661+ save_fp_context = copy_fp_to_sigcontext;
662+ restore_fp_context = copy_fp_from_sigcontext;
663663 }
664664 #endif /* CONFIG_SMP */
665665 #else
666− save_fp_context = copy_fp_from_sigcontext;;
667− restore_fp_context = copy_fp_to_sigcontext;
666+ save_fp_context = copy_fp_to_sigcontext;
667+ restore_fp_context = copy_fp_from_sigcontext;
668668 #endif
669669
670670 return 0;
arch/mips/loongson/common/Makefile+2−1
@@ -11,7 +11,8 @@ obj-$(CONFIG_PCI) += pci.o · 10 unmodified lines
1111 # Serial port support
1212 #
1313 obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
14−obj-$(CONFIG_SERIAL_8250) += serial.o
14+loongson-serial-$(CONFIG_SERIAL_8250) := serial.o
15+obj-y += $(loongson-serial-m) $(loongson-serial-y)
1516 obj-$(CONFIG_LOONGSON_UART_BASE) += uart_base.o
1617 obj-$(CONFIG_LOONGSON_MC146818) += rtc.o
1718
arch/mips/mm/tlbex.c+9−1
@@ -1872,8 +1872,16 @@ build_r4000_tlbchange_handler_head(u32 **p, struct uasm_label **l, · 1871 unmodified lines
18721872 uasm_l_smp_pgtable_change(l, *p);
18731873 #endif
18741874 iPTE_LW(p, wr.r1, wr.r2); /* get even pte */
1875− if (!m4kc_tlbp_war())
1875+ if (!m4kc_tlbp_war()) {
18761876 build_tlb_probe_entry(p);
1877+ if (cpu_has_htw) {
1878+ /* race condition happens, leaving */
1879+ uasm_i_ehb(p);
1880+ uasm_i_mfc0(p, wr.r3, C0_INDEX);
1881+ uasm_il_bltz(p, r, wr.r3, label_leave);
1882+ uasm_i_nop(p);
1883+ }
1884+ }
18771885 return wr;
18781886 }
18791887
arch/mips/mti-sead3/sead3-leds.c+2−6
@@ -5,7 +5,7 @@ · 4 unmodified lines
55 *
66 * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
77 */
8−#include <linux/module.h>
8+#include <linux/init.h>
99 #include <linux/leds.h>
1010 #include <linux/platform_device.h>
1111
@@ -76,8 +76,4 @@ static int __init led_init(void) · 64 unmodified lines
7676 return platform_device_register(&fled_device);
7777 }
7878
79−module_init(led_init);
80−
81−MODULE_AUTHOR("Chris Dearman <chris@mips.com>");
82−MODULE_LICENSE("GPL");
83−MODULE_DESCRIPTION("LED probe driver for SEAD-3");
79+device_initcall(led_init);
arch/mips/netlogic/xlp/Makefile+8−4
@@ -1,6 +1,10 @@
11 obj-y += setup.o nlm_hal.o cop2-ex.o dt.o
22 obj-$(CONFIG_SMP) += wakeup.o
3−obj-$(CONFIG_USB) += usb-init.o
4−obj-$(CONFIG_USB) += usb-init-xlp2.o
5−obj-$(CONFIG_SATA_AHCI) += ahci-init.o
6−obj-$(CONFIG_SATA_AHCI) += ahci-init-xlp2.o
3+ifdef CONFIG_USB
4+obj-y += usb-init.o
5+obj-y += usb-init-xlp2.o
6+endif
7+ifdef CONFIG_SATA_AHCI
8+obj-y += ahci-init.o
9+obj-y += ahci-init-xlp2.o
10+endif