Updating drm-misc-next to the state of v6.18-rc1.
Showing the changes to include/uapi (62 of 11830 files). Show all
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| @@ -105,6 +105,8 @@ extern "C" { · 104 unmodified lines | |||
| 105 | * | 105 | * |
| 106 | * %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell. It is an MMIO region for | 106 | * %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell. It is an MMIO region for |
| 107 | * signalling user mode queues. | 107 | * signalling user mode queues. |
| 108 | * | ||
| 109 | * %AMDGPU_GEM_DOMAIN_MMIO_REMAP MMIO remap page (special mapping for HDP flushing). | ||
| 108 | */ | 110 | */ |
| 109 | #define AMDGPU_GEM_DOMAIN_CPU 0x1 | 111 | #define AMDGPU_GEM_DOMAIN_CPU 0x1 |
| 110 | #define AMDGPU_GEM_DOMAIN_GTT 0x2 | 112 | #define AMDGPU_GEM_DOMAIN_GTT 0x2 |
| @@ -113,13 +115,15 @@ extern "C" { · 2 unmodified lines | |||
| 113 | #define AMDGPU_GEM_DOMAIN_GWS 0x10 | 115 | #define AMDGPU_GEM_DOMAIN_GWS 0x10 |
| 114 | #define AMDGPU_GEM_DOMAIN_OA 0x20 | 116 | #define AMDGPU_GEM_DOMAIN_OA 0x20 |
| 115 | #define AMDGPU_GEM_DOMAIN_DOORBELL 0x40 | 117 | #define AMDGPU_GEM_DOMAIN_DOORBELL 0x40 |
| 118 | #define AMDGPU_GEM_DOMAIN_MMIO_REMAP 0x80 | ||
| 116 | #define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \ | 119 | #define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \ |
| 117 | AMDGPU_GEM_DOMAIN_GTT | \ | 120 | AMDGPU_GEM_DOMAIN_GTT | \ |
| 118 | AMDGPU_GEM_DOMAIN_VRAM | \ | 121 | AMDGPU_GEM_DOMAIN_VRAM | \ |
| 119 | AMDGPU_GEM_DOMAIN_GDS | \ | 122 | AMDGPU_GEM_DOMAIN_GDS | \ |
| 120 | AMDGPU_GEM_DOMAIN_GWS | \ | 123 | AMDGPU_GEM_DOMAIN_GWS | \ |
| 121 | AMDGPU_GEM_DOMAIN_OA | \ | 124 | AMDGPU_GEM_DOMAIN_OA | \ |
| 122 | AMDGPU_GEM_DOMAIN_DOORBELL) | 125 | AMDGPU_GEM_DOMAIN_DOORBELL | \ |
| 126 | AMDGPU_GEM_DOMAIN_MMIO_REMAP) | ||
| 123 | 127 | ||
| 124 | /* Flag that CPU access will be required for the case of VRAM domain */ | 128 | /* Flag that CPU access will be required for the case of VRAM domain */ |
| 125 | #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0) | 129 | #define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0) |
| @@ -1084,10 +1088,11 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow { · 958 unmodified lines | |||
| 1084 | * Query h/w info: Flag that this is integrated (a.h.a. fusion) GPU | 1088 | * Query h/w info: Flag that this is integrated (a.h.a. fusion) GPU |
| 1085 | * | 1089 | * |
| 1086 | */ | 1090 | */ |
| 1087 | #define AMDGPU_IDS_FLAGS_FUSION 0x1 | 1091 | #define AMDGPU_IDS_FLAGS_FUSION 0x01 |
| 1088 | #define AMDGPU_IDS_FLAGS_PREEMPTION 0x2 | 1092 | #define AMDGPU_IDS_FLAGS_PREEMPTION 0x02 |
| 1089 | #define AMDGPU_IDS_FLAGS_TMZ 0x4 | 1093 | #define AMDGPU_IDS_FLAGS_TMZ 0x04 |
| 1090 | #define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x8 | 1094 | #define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x08 |
| 1095 | #define AMDGPU_IDS_FLAGS_GANG_SUBMIT 0x10 | ||
| 1091 | 1096 | ||
| 1092 | /* | 1097 | /* |
| 1093 | * Query h/w info: Flag identifying VF/PF/PT mode | 1098 | * Query h/w info: Flag identifying VF/PF/PT mode |
| @@ -38,7 +38,7 @@ enum { · 37 unmodified lines | |||
| 38 | BINDER_TYPE_PTR = B_PACK_CHARS('p', 't', '*', B_TYPE_LARGE), | 38 | BINDER_TYPE_PTR = B_PACK_CHARS('p', 't', '*', B_TYPE_LARGE), |
| 39 | }; | 39 | }; |
| 40 | 40 | ||
| 41 | enum { | 41 | enum flat_binder_object_flags { |
| 42 | FLAT_BINDER_FLAG_PRIORITY_MASK = 0xff, | 42 | FLAT_BINDER_FLAG_PRIORITY_MASK = 0xff, |
| 43 | FLAT_BINDER_FLAG_ACCEPTS_FDS = 0x100, | 43 | FLAT_BINDER_FLAG_ACCEPTS_FDS = 0x100, |
| 44 | 44 | ||
| @@ -0,0 +1,37 @@ | |||
| 1 | /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ | ||
| 2 | /* Do not edit directly, auto-generated from: */ | ||
| 3 | /* Documentation/netlink/specs/binder.yaml */ | ||
| 4 | /* YNL-GEN uapi header */ | ||
| 5 | |||
| 6 | #ifndef _UAPI_LINUX_ANDROID_BINDER_NETLINK_H | ||
| 7 | #define _UAPI_LINUX_ANDROID_BINDER_NETLINK_H | ||
| 8 | |||
| 9 | #define BINDER_FAMILY_NAME "binder" | ||
| 10 | #define BINDER_FAMILY_VERSION 1 | ||
| 11 | |||
| 12 | enum { | ||
| 13 | BINDER_A_REPORT_ERROR = 1, | ||
| 14 | BINDER_A_REPORT_CONTEXT, | ||
| 15 | BINDER_A_REPORT_FROM_PID, | ||
| 16 | BINDER_A_REPORT_FROM_TID, | ||
| 17 | BINDER_A_REPORT_TO_PID, | ||
| 18 | BINDER_A_REPORT_TO_TID, | ||
| 19 | BINDER_A_REPORT_IS_REPLY, | ||
| 20 | BINDER_A_REPORT_FLAGS, | ||
| 21 | BINDER_A_REPORT_CODE, | ||
| 22 | BINDER_A_REPORT_DATA_SIZE, | ||
| 23 | |||
| 24 | __BINDER_A_REPORT_MAX, | ||
| 25 | BINDER_A_REPORT_MAX = (__BINDER_A_REPORT_MAX - 1) | ||
| 26 | }; | ||
| 27 | |||
| 28 | enum { | ||
| 29 | BINDER_CMD_REPORT = 1, | ||
| 30 | |||
| 31 | __BINDER_CMD_MAX, | ||
| 32 | BINDER_CMD_MAX = (__BINDER_CMD_MAX - 1) | ||
| 33 | }; | ||
| 34 | |||
| 35 | #define BINDER_MCGRP_REPORT "report" | ||
| 36 | |||
| 37 | #endif /* _UAPI_LINUX_ANDROID_BINDER_NETLINK_H */ | ||
| @@ -8,6 +8,13 @@ · 7 unmodified lines | |||
| 8 | 8 | ||
| 9 | #include <linux/v4l2-controls.h> | 9 | #include <linux/v4l2-controls.h> |
| 10 | 10 | ||
| 11 | /* aspeed video's input types */ | ||
| 12 | enum aspeed_video_input { | ||
| 13 | VIDEO_INPUT_VGA = 0, | ||
| 14 | VIDEO_INPUT_GFX, | ||
| 15 | VIDEO_INPUT_MAX | ||
| 16 | }; | ||
| 17 | |||
| 11 | #define V4L2_CID_ASPEED_HQ_MODE (V4L2_CID_USER_ASPEED_BASE + 1) | 18 | #define V4L2_CID_ASPEED_HQ_MODE (V4L2_CID_USER_ASPEED_BASE + 1) |
| 12 | #define V4L2_CID_ASPEED_HQ_JPEG_QUALITY (V4L2_CID_USER_ASPEED_BASE + 2) | 19 | #define V4L2_CID_ASPEED_HQ_JPEG_QUALITY (V4L2_CID_USER_ASPEED_BASE + 2) |
| 13 | 20 | ||
| @@ -148,6 +148,8 @@ · 147 unmodified lines | |||
| 148 | #define AUDIT_IPE_POLICY_LOAD 1422 /* IPE policy load */ | 148 | #define AUDIT_IPE_POLICY_LOAD 1422 /* IPE policy load */ |
| 149 | #define AUDIT_LANDLOCK_ACCESS 1423 /* Landlock denial */ | 149 | #define AUDIT_LANDLOCK_ACCESS 1423 /* Landlock denial */ |
| 150 | #define AUDIT_LANDLOCK_DOMAIN 1424 /* Landlock domain status */ | 150 | #define AUDIT_LANDLOCK_DOMAIN 1424 /* Landlock domain status */ |
| 151 | #define AUDIT_MAC_TASK_CONTEXTS 1425 /* Multiple LSM task contexts */ | ||
| 152 | #define AUDIT_MAC_OBJ_CONTEXTS 1426 /* Multiple LSM objext contexts */ | ||
| 151 | 153 | ||
| 152 | #define AUDIT_FIRST_KERN_ANOM_MSG 1700 | 154 | #define AUDIT_FIRST_KERN_ANOM_MSG 1700 |
| 153 | #define AUDIT_LAST_KERN_ANOM_MSG 1799 | 155 | #define AUDIT_LAST_KERN_ANOM_MSG 1799 |
| @@ -1522,6 +1522,12 @@ union bpf_attr { · 1521 unmodified lines | |||
| 1522 | * If provided, map_flags should have BPF_F_TOKEN_FD flag set. | 1522 | * If provided, map_flags should have BPF_F_TOKEN_FD flag set. |
| 1523 | */ | 1523 | */ |
| 1524 | __s32 map_token_fd; | 1524 | __s32 map_token_fd; |
| 1525 | |||
| 1526 | /* Hash of the program that has exclusive access to the map. | ||
| 1527 | */ | ||
| 1528 | __aligned_u64 excl_prog_hash; | ||
| 1529 | /* Size of the passed excl_prog_hash. */ | ||
| 1530 | __u32 excl_prog_hash_size; | ||
| 1525 | }; | 1531 | }; |
| 1526 | 1532 | ||
| 1527 | struct { /* anonymous struct used by BPF_MAP_*_ELEM and BPF_MAP_FREEZE commands */ | 1533 | struct { /* anonymous struct used by BPF_MAP_*_ELEM and BPF_MAP_FREEZE commands */ |
| @@ -1605,6 +1611,16 @@ union bpf_attr { · 77 unmodified lines | |||
| 1605 | * continuous. | 1611 | * continuous. |
| 1606 | */ | 1612 | */ |
| 1607 | __u32 fd_array_cnt; | 1613 | __u32 fd_array_cnt; |
| 1614 | /* Pointer to a buffer containing the signature of the BPF | ||
| 1615 | * program. | ||
| 1616 | */ | ||
| 1617 | __aligned_u64 signature; | ||
| 1618 | /* Size of the signature buffer in bytes. */ | ||
| 1619 | __u32 signature_size; | ||
| 1620 | /* ID of the kernel keyring to be used for signature | ||
| 1621 | * verification. | ||
| 1622 | */ | ||
| 1623 | __s32 keyring_id; | ||
| 1608 | }; | 1624 | }; |
| 1609 | 1625 | ||
| 1610 | struct { /* anonymous struct used by BPF_OBJ_* commands */ | 1626 | struct { /* anonymous struct used by BPF_OBJ_* commands */ |
| @@ -4875,7 +4891,7 @@ union bpf_attr { · 3264 unmodified lines | |||
| 4875 | * | 4891 | * |
| 4876 | * **-ENOENT** if the bpf_local_storage cannot be found. | 4892 | * **-ENOENT** if the bpf_local_storage cannot be found. |
| 4877 | * | 4893 | * |
| 4878 | * long bpf_d_path(struct path *path, char *buf, u32 sz) | 4894 | * long bpf_d_path(const struct path *path, char *buf, u32 sz) |
| 4879 | * Description | 4895 | * Description |
| 4880 | * Return full path for given **struct path** object, which | 4896 | * Return full path for given **struct path** object, which |
| 4881 | * needs to be the kernel BTF *path* object. The path is | 4897 | * needs to be the kernel BTF *path* object. The path is |
| @@ -6666,6 +6682,8 @@ struct bpf_map_info { · 1784 unmodified lines | |||
| 6666 | __u32 btf_value_type_id; | 6682 | __u32 btf_value_type_id; |
| 6667 | __u32 btf_vmlinux_id; | 6683 | __u32 btf_vmlinux_id; |
| 6668 | __u64 map_extra; | 6684 | __u64 map_extra; |
| 6685 | __aligned_u64 hash; | ||
| 6686 | __u32 hash_size; | ||
| 6669 | } __attribute__((aligned(8))); | 6687 | } __attribute__((aligned(8))); |
| 6670 | 6688 | ||
| 6671 | struct bpf_btf_info { | 6689 | struct bpf_btf_info { |
| @@ -7418,6 +7436,10 @@ struct bpf_timer { · 746 unmodified lines | |||
| 7418 | __u64 __opaque[2]; | 7436 | __u64 __opaque[2]; |
| 7419 | } __attribute__((aligned(8))); | 7437 | } __attribute__((aligned(8))); |
| 7420 | 7438 | ||
| 7439 | struct bpf_task_work { | ||
| 7440 | __u64 __opaque; | ||
| 7441 | } __attribute__((aligned(8))); | ||
| 7442 | |||
| 7421 | struct bpf_wq { | 7443 | struct bpf_wq { |
| 7422 | __u64 __opaque[2]; | 7444 | __u64 __opaque[2]; |
| 7423 | } __attribute__((aligned(8))); | 7445 | } __attribute__((aligned(8))); |
| @@ -101,8 +101,8 @@ struct can_ctrlmode { · 100 unmodified lines | |||
| 101 | #define CAN_CTRLMODE_PRESUME_ACK 0x40 /* Ignore missing CAN ACKs */ | 101 | #define CAN_CTRLMODE_PRESUME_ACK 0x40 /* Ignore missing CAN ACKs */ |
| 102 | #define CAN_CTRLMODE_FD_NON_ISO 0x80 /* CAN FD in non-ISO mode */ | 102 | #define CAN_CTRLMODE_FD_NON_ISO 0x80 /* CAN FD in non-ISO mode */ |
| 103 | #define CAN_CTRLMODE_CC_LEN8_DLC 0x100 /* Classic CAN DLC option */ | 103 | #define CAN_CTRLMODE_CC_LEN8_DLC 0x100 /* Classic CAN DLC option */ |
| 104 | #define CAN_CTRLMODE_TDC_AUTO 0x200 /* CAN transiver automatically calculates TDCV */ | 104 | #define CAN_CTRLMODE_TDC_AUTO 0x200 /* FD transceiver automatically calculates TDCV */ |
| 105 | #define CAN_CTRLMODE_TDC_MANUAL 0x400 /* TDCV is manually set up by user */ | 105 | #define CAN_CTRLMODE_TDC_MANUAL 0x400 /* FD TDCV is manually set up by user */ |
| 106 | 106 | ||
| 107 | /* | 107 | /* |
| 108 | * CAN device statistics | 108 | * CAN device statistics |
| @@ -129,14 +129,14 @@ enum { · 20 unmodified lines | |||
| 129 | IFLA_CAN_RESTART_MS, | 129 | IFLA_CAN_RESTART_MS, |
| 130 | IFLA_CAN_RESTART, | 130 | IFLA_CAN_RESTART, |
| 131 | IFLA_CAN_BERR_COUNTER, | 131 | IFLA_CAN_BERR_COUNTER, |
| 132 | IFLA_CAN_DATA_BITTIMING, | 132 | IFLA_CAN_DATA_BITTIMING, /* FD */ |
| 133 | IFLA_CAN_DATA_BITTIMING_CONST, | 133 | IFLA_CAN_DATA_BITTIMING_CONST, /* FD */ |
| 134 | IFLA_CAN_TERMINATION, | 134 | IFLA_CAN_TERMINATION, |
| 135 | IFLA_CAN_TERMINATION_CONST, | 135 | IFLA_CAN_TERMINATION_CONST, |
| 136 | IFLA_CAN_BITRATE_CONST, | 136 | IFLA_CAN_BITRATE_CONST, |
| 137 | IFLA_CAN_DATA_BITRATE_CONST, | 137 | IFLA_CAN_DATA_BITRATE_CONST, /* FD */ |
| 138 | IFLA_CAN_BITRATE_MAX, | 138 | IFLA_CAN_BITRATE_MAX, |
| 139 | IFLA_CAN_TDC, | 139 | IFLA_CAN_TDC, /* FD */ |
| 140 | IFLA_CAN_CTRLMODE_EXT, | 140 | IFLA_CAN_CTRLMODE_EXT, |
| 141 | 141 | ||
| 142 | /* add new constants above here */ | 142 | /* add new constants above here */ |
| @@ -145,7 +145,7 @@ enum { · 2 unmodified lines | |||
| 145 | }; | 145 | }; |
| 146 | 146 | ||
| 147 | /* | 147 | /* |
| 148 | * CAN FD Transmitter Delay Compensation (TDC) | 148 | * CAN FD/XL Transmitter Delay Compensation (TDC) |
| 149 | * | 149 | * |
| 150 | * Please refer to struct can_tdc_const and can_tdc in | 150 | * Please refer to struct can_tdc_const and can_tdc in |
| 151 | * include/linux/can/bittiming.h for further details. | 151 | * include/linux/can/bittiming.h for further details. |
| @@ -636,6 +636,8 @@ enum devlink_attr { · 635 unmodified lines | |||
| 636 | 636 | ||
| 637 | DEVLINK_ATTR_RATE_TC_BWS, /* nested */ | 637 | DEVLINK_ATTR_RATE_TC_BWS, /* nested */ |
| 638 | 638 | ||
| 639 | DEVLINK_ATTR_HEALTH_REPORTER_BURST_PERIOD, /* u64 */ | ||
| 640 | |||
| 639 | /* Add new attributes above here, update the spec in | 641 | /* Add new attributes above here, update the spec in |
| 640 | * Documentation/netlink/specs/devlink.yaml and re-generate | 642 | * Documentation/netlink/specs/devlink.yaml and re-generate |
| 641 | * net/devlink/netlink_gen.c. | 643 | * net/devlink/netlink_gen.c. |
| @@ -216,6 +216,7 @@ enum dpll_a { · 215 unmodified lines | |||
| 216 | DPLL_A_LOCK_STATUS_ERROR, | 216 | DPLL_A_LOCK_STATUS_ERROR, |
| 217 | DPLL_A_CLOCK_QUALITY_LEVEL, | 217 | DPLL_A_CLOCK_QUALITY_LEVEL, |
| 218 | DPLL_A_PHASE_OFFSET_MONITOR, | 218 | DPLL_A_PHASE_OFFSET_MONITOR, |
| 219 | DPLL_A_PHASE_OFFSET_AVG_FACTOR, | ||
| 219 | 220 | ||
| 220 | __DPLL_A_MAX, | 221 | __DPLL_A_MAX, |
| 221 | DPLL_A_MAX = (__DPLL_A_MAX - 1) | 222 | DPLL_A_MAX = (__DPLL_A_MAX - 1) |
| @@ -2380,6 +2380,7 @@ enum { · 2379 unmodified lines | |||
| 2380 | #define RXH_L4_B_0_1 (1 << 6) /* src port in case of TCP/UDP/SCTP */ | 2380 | #define RXH_L4_B_0_1 (1 << 6) /* src port in case of TCP/UDP/SCTP */ |
| 2381 | #define RXH_L4_B_2_3 (1 << 7) /* dst port in case of TCP/UDP/SCTP */ | 2381 | #define RXH_L4_B_2_3 (1 << 7) /* dst port in case of TCP/UDP/SCTP */ |
| 2382 | #define RXH_GTP_TEID (1 << 8) /* teid in case of GTP */ | 2382 | #define RXH_GTP_TEID (1 << 8) /* teid in case of GTP */ |
| 2383 | #define RXH_IP6_FL (1 << 9) /* IPv6 flow label */ | ||
| 2383 | #define RXH_DISCARD (1 << 31) | 2384 | #define RXH_DISCARD (1 << 31) |
| 2384 | 2385 | ||
| 2385 | #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL | 2386 | #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL |
| @@ -561,12 +561,24 @@ enum { · 560 unmodified lines | |||
| 561 | ETHTOOL_A_TUNNEL_INFO_MAX = (__ETHTOOL_A_TUNNEL_INFO_CNT - 1) | 561 | ETHTOOL_A_TUNNEL_INFO_MAX = (__ETHTOOL_A_TUNNEL_INFO_CNT - 1) |
| 562 | }; | 562 | }; |
| 563 | 563 | ||
| 564 | enum { | ||
| 565 | ETHTOOL_A_FEC_HIST_PAD = 1, | ||
| 566 | ETHTOOL_A_FEC_HIST_BIN_LOW, | ||
| 567 | ETHTOOL_A_FEC_HIST_BIN_HIGH, | ||
| 568 | ETHTOOL_A_FEC_HIST_BIN_VAL, | ||
| 569 | ETHTOOL_A_FEC_HIST_BIN_VAL_PER_LANE, | ||
| 570 | |||
| 571 | __ETHTOOL_A_FEC_HIST_CNT, | ||
| 572 | ETHTOOL_A_FEC_HIST_MAX = (__ETHTOOL_A_FEC_HIST_CNT - 1) | ||
| 573 | }; | ||
| 574 | |||
| 564 | enum { | 575 | enum { |
| 565 | ETHTOOL_A_FEC_STAT_UNSPEC, | 576 | ETHTOOL_A_FEC_STAT_UNSPEC, |
| 566 | ETHTOOL_A_FEC_STAT_PAD, | 577 | ETHTOOL_A_FEC_STAT_PAD, |
| 567 | ETHTOOL_A_FEC_STAT_CORRECTED, | 578 | ETHTOOL_A_FEC_STAT_CORRECTED, |
| 568 | ETHTOOL_A_FEC_STAT_UNCORR, | 579 | ETHTOOL_A_FEC_STAT_UNCORR, |
| 569 | ETHTOOL_A_FEC_STAT_CORR_BITS, | 580 | ETHTOOL_A_FEC_STAT_CORR_BITS, |
| 581 | ETHTOOL_A_FEC_STAT_HIST, | ||
| 570 | 582 | ||
| 571 | __ETHTOOL_A_FEC_STAT_CNT, | 583 | __ETHTOOL_A_FEC_STAT_CNT, |
| 572 | ETHTOOL_A_FEC_STAT_MAX = (__ETHTOOL_A_FEC_STAT_CNT - 1) | 584 | ETHTOOL_A_FEC_STAT_MAX = (__ETHTOOL_A_FEC_STAT_CNT - 1) |
| @@ -33,6 +33,8 @@ · 32 unmodified lines | |||
| 33 | #define EXT4_IOC_CHECKPOINT _IOW('f', 43, __u32) | 33 | #define EXT4_IOC_CHECKPOINT _IOW('f', 43, __u32) |
| 34 | #define EXT4_IOC_GETFSUUID _IOR('f', 44, struct fsuuid) | 34 | #define EXT4_IOC_GETFSUUID _IOR('f', 44, struct fsuuid) |
| 35 | #define EXT4_IOC_SETFSUUID _IOW('f', 44, struct fsuuid) | 35 | #define EXT4_IOC_SETFSUUID _IOW('f', 44, struct fsuuid) |
| 36 | #define EXT4_IOC_GET_TUNE_SB_PARAM _IOR('f', 45, struct ext4_tune_sb_params) | ||
| 37 | #define EXT4_IOC_SET_TUNE_SB_PARAM _IOW('f', 46, struct ext4_tune_sb_params) | ||
| 36 | 38 | ||
| 37 | #define EXT4_IOC_SHUTDOWN _IOR('X', 125, __u32) | 39 | #define EXT4_IOC_SHUTDOWN _IOR('X', 125, __u32) |
| 38 | 40 | ||
| @@ -108,6 +110,57 @@ struct ext4_new_group_input { · 69 unmodified lines | |||
| 108 | __u16 unused; | 110 | __u16 unused; |
| 109 | }; | 111 | }; |
| 110 | 112 | ||
| 113 | struct ext4_tune_sb_params { | ||
| 114 | __u32 set_flags; | ||
| 115 | __u32 checkinterval; | ||
| 116 | __u16 errors_behavior; | ||
| 117 | __u16 mnt_count; | ||
| 118 | __u16 max_mnt_count; | ||
| 119 | __u16 raid_stride; | ||
| 120 | __u64 last_check_time; | ||
| 121 | __u64 reserved_blocks; | ||
| 122 | __u64 blocks_count; | ||
| 123 | __u32 default_mnt_opts; | ||
| 124 | __u32 reserved_uid; | ||
| 125 | __u32 reserved_gid; | ||
| 126 | __u32 raid_stripe_width; | ||
| 127 | __u16 encoding; | ||
| 128 | __u16 encoding_flags; | ||
| 129 | __u8 def_hash_alg; | ||
| 130 | __u8 pad_1; | ||
| 131 | __u16 pad_2; | ||
| 132 | __u32 feature_compat; | ||
| 133 | __u32 feature_incompat; | ||
| 134 | __u32 feature_ro_compat; | ||
| 135 | __u32 set_feature_compat_mask; | ||
| 136 | __u32 set_feature_incompat_mask; | ||
| 137 | __u32 set_feature_ro_compat_mask; | ||
| 138 | __u32 clear_feature_compat_mask; | ||
| 139 | __u32 clear_feature_incompat_mask; | ||
| 140 | __u32 clear_feature_ro_compat_mask; | ||
| 141 | __u8 mount_opts[64]; | ||
| 142 | __u8 pad[64]; | ||
| 143 | }; | ||
| 144 | |||
| 145 | #define EXT4_TUNE_FL_ERRORS_BEHAVIOR 0x00000001 | ||
| 146 | #define EXT4_TUNE_FL_MNT_COUNT 0x00000002 | ||
| 147 | #define EXT4_TUNE_FL_MAX_MNT_COUNT 0x00000004 | ||
| 148 | #define EXT4_TUNE_FL_CHECKINTRVAL 0x00000008 | ||
| 149 | #define EXT4_TUNE_FL_LAST_CHECK_TIME 0x00000010 | ||
| 150 | #define EXT4_TUNE_FL_RESERVED_BLOCKS 0x00000020 | ||
| 151 | #define EXT4_TUNE_FL_RESERVED_UID 0x00000040 | ||
| 152 | #define EXT4_TUNE_FL_RESERVED_GID 0x00000080 | ||
| 153 | #define EXT4_TUNE_FL_DEFAULT_MNT_OPTS 0x00000100 | ||
| 154 | #define EXT4_TUNE_FL_DEF_HASH_ALG 0x00000200 | ||
| 155 | #define EXT4_TUNE_FL_RAID_STRIDE 0x00000400 | ||
| 156 | #define EXT4_TUNE_FL_RAID_STRIPE_WIDTH 0x00000800 | ||
| 157 | #define EXT4_TUNE_FL_MOUNT_OPTS 0x00001000 | ||
| 158 | #define EXT4_TUNE_FL_FEATURES 0x00002000 | ||
| 159 | #define EXT4_TUNE_FL_EDIT_FEATURES 0x00004000 | ||
| 160 | #define EXT4_TUNE_FL_FORCE_FSCK 0x00008000 | ||
| 161 | #define EXT4_TUNE_FL_ENCODING 0x00010000 | ||
| 162 | #define EXT4_TUNE_FL_ENCODING_FLAGS 0x00020000 | ||
| 163 | |||
| 111 | /* | 164 | /* |
| 112 | * Returned by EXT4_IOC_GET_ES_CACHE as an additional possible flag. | 165 | * Returned by EXT4_IOC_GET_ES_CACHE as an additional possible flag. |
| 113 | * It indicates that the entry in extent status cache is for a hole. | 166 | * It indicates that the entry in extent status cache is for a hole. |
| @@ -111,6 +111,7 @@ · 110 unmodified lines | |||
| 111 | #define PIDFD_SELF_THREAD_GROUP -10001 /* Current thread group leader. */ | 111 | #define PIDFD_SELF_THREAD_GROUP -10001 /* Current thread group leader. */ |
| 112 | 112 | ||
| 113 | #define FD_PIDFS_ROOT -10002 /* Root of the pidfs filesystem */ | 113 | #define FD_PIDFS_ROOT -10002 /* Root of the pidfs filesystem */ |
| 114 | #define FD_NSFS_ROOT -10003 /* Root of the nsfs filesystem */ | ||
| 114 | #define FD_INVALID -10009 /* Invalid file descriptor: -10000 - EBADF = -10009 */ | 115 | #define FD_INVALID -10009 /* Invalid file descriptor: -10000 - EBADF = -10009 */ |
| 115 | 116 | ||
| 116 | /* Generic flags for the *at(2) family of syscalls. */ | 117 | /* Generic flags for the *at(2) family of syscalls. */ |
| @@ -430,10 +430,13 @@ typedef int __bitwise __kernel_rwf_t; · 429 unmodified lines | |||
| 430 | /* buffered IO that drops the cache after reading or writing data */ | 430 | /* buffered IO that drops the cache after reading or writing data */ |
| 431 | #define RWF_DONTCACHE ((__force __kernel_rwf_t)0x00000080) | 431 | #define RWF_DONTCACHE ((__force __kernel_rwf_t)0x00000080) |
| 432 | 432 | ||
| 433 | /* prevent pipe and socket writes from raising SIGPIPE */ | ||
| 434 | #define RWF_NOSIGNAL ((__force __kernel_rwf_t)0x00000100) | ||
| 435 | |||
| 433 | /* mask of flags supported by the kernel */ | 436 | /* mask of flags supported by the kernel */ |
| 434 | #define RWF_SUPPORTED (RWF_HIPRI | RWF_DSYNC | RWF_SYNC | RWF_NOWAIT |\ | 437 | #define RWF_SUPPORTED (RWF_HIPRI | RWF_DSYNC | RWF_SYNC | RWF_NOWAIT |\ |
| 435 | RWF_APPEND | RWF_NOAPPEND | RWF_ATOMIC |\ | 438 | RWF_APPEND | RWF_NOAPPEND | RWF_ATOMIC |\ |
| 436 | RWF_DONTCACHE) | 439 | RWF_DONTCACHE | RWF_NOSIGNAL) |
| 437 | 440 | ||
| 438 | #define PROCFS_IOCTL_MAGIC 'f' | 441 | #define PROCFS_IOCTL_MAGIC 'f' |
| 439 | 442 | ||
| @@ -235,6 +235,11 @@ · 234 unmodified lines | |||
| 235 | * | 235 | * |
| 236 | * 7.44 | 236 | * 7.44 |
| 237 | * - add FUSE_NOTIFY_INC_EPOCH | 237 | * - add FUSE_NOTIFY_INC_EPOCH |
| 238 | * | ||
| 239 | * 7.45 | ||
| 240 | * - add FUSE_COPY_FILE_RANGE_64 | ||
| 241 | * - add struct fuse_copy_file_range_out | ||
| 242 | * - add FUSE_NOTIFY_PRUNE | ||
| 238 | */ | 243 | */ |
| 239 | 244 | ||
| 240 | #ifndef _LINUX_FUSE_H | 245 | #ifndef _LINUX_FUSE_H |
| @@ -270,7 +275,7 @@ · 29 unmodified lines | |||
| 270 | #define FUSE_KERNEL_VERSION 7 | 275 | #define FUSE_KERNEL_VERSION 7 |
| 271 | 276 | ||
| 272 | /** Minor version number of this interface */ | 277 | /** Minor version number of this interface */ |
| 273 | #define FUSE_KERNEL_MINOR_VERSION 44 | 278 | #define FUSE_KERNEL_MINOR_VERSION 45 |
| 274 | 279 | ||
| 275 | /** The node ID of the root inode */ | 280 | /** The node ID of the root inode */ |
| 276 | #define FUSE_ROOT_ID 1 | 281 | #define FUSE_ROOT_ID 1 |
| @@ -657,6 +662,7 @@ enum fuse_opcode { · 380 unmodified lines | |||
| 657 | FUSE_SYNCFS = 50, | 662 | FUSE_SYNCFS = 50, |
| 658 | FUSE_TMPFILE = 51, | 663 | FUSE_TMPFILE = 51, |
| 659 | FUSE_STATX = 52, | 664 | FUSE_STATX = 52, |
| 665 | FUSE_COPY_FILE_RANGE_64 = 53, | ||
| 660 | 666 | ||
| 661 | /* CUSE specific operations */ | 667 | /* CUSE specific operations */ |
| 662 | CUSE_INIT = 4096, | 668 | CUSE_INIT = 4096, |
| @@ -675,7 +681,7 @@ enum fuse_notify_code { · 12 unmodified lines | |||
| 675 | FUSE_NOTIFY_DELETE = 6, | 681 | FUSE_NOTIFY_DELETE = 6, |
| 676 | FUSE_NOTIFY_RESEND = 7, | 682 | FUSE_NOTIFY_RESEND = 7, |
| 677 | FUSE_NOTIFY_INC_EPOCH = 8, | 683 | FUSE_NOTIFY_INC_EPOCH = 8, |
| 678 | FUSE_NOTIFY_CODE_MAX, | 684 | FUSE_NOTIFY_PRUNE = 9, |
| 679 | }; | 685 | }; |
| 680 | 686 | ||
| 681 | /* The read buffer is required to be at least 8k, but may be much larger */ | 687 | /* The read buffer is required to be at least 8k, but may be much larger */ |
| @@ -1114,6 +1120,12 @@ struct fuse_notify_retrieve_in { · 432 unmodified lines | |||
| 1114 | uint64_t dummy4; | 1120 | uint64_t dummy4; |
| 1115 | }; | 1121 | }; |
| 1116 | 1122 | ||
| 1123 | struct fuse_notify_prune_out { | ||
| 1124 | uint32_t count; | ||
| 1125 | uint32_t padding; | ||
| 1126 | uint64_t spare; | ||
| 1127 | }; | ||
| 1128 | |||
| 1117 | struct fuse_backing_map { | 1129 | struct fuse_backing_map { |
| 1118 | int32_t fd; | 1130 | int32_t fd; |
| 1119 | uint32_t flags; | 1131 | uint32_t flags; |
| @@ -1126,6 +1138,7 @@ struct fuse_backing_map { · 6 unmodified lines | |||
| 1126 | #define FUSE_DEV_IOC_BACKING_OPEN _IOW(FUSE_DEV_IOC_MAGIC, 1, \ | 1138 | #define FUSE_DEV_IOC_BACKING_OPEN _IOW(FUSE_DEV_IOC_MAGIC, 1, \ |
| 1127 | struct fuse_backing_map) | 1139 | struct fuse_backing_map) |
| 1128 | #define FUSE_DEV_IOC_BACKING_CLOSE _IOW(FUSE_DEV_IOC_MAGIC, 2, uint32_t) | 1140 | #define FUSE_DEV_IOC_BACKING_CLOSE _IOW(FUSE_DEV_IOC_MAGIC, 2, uint32_t) |
| 1141 | #define FUSE_DEV_IOC_SYNC_INIT _IO(FUSE_DEV_IOC_MAGIC, 3) | ||
| 1129 | 1142 | ||
| 1130 | struct fuse_lseek_in { | 1143 | struct fuse_lseek_in { |
| 1131 | uint64_t fh; | 1144 | uint64_t fh; |
| @@ -1148,6 +1161,11 @@ struct fuse_copy_file_range_in { · 16 unmodified lines | |||
| 1148 | uint64_t flags; | 1161 | uint64_t flags; |
| 1149 | }; | 1162 | }; |
| 1150 | 1163 | ||
| 1164 | /* For FUSE_COPY_FILE_RANGE_64 */ | ||
| 1165 | struct fuse_copy_file_range_out { | ||
| 1166 | uint64_t bytes_copied; | ||
| 1167 | }; | ||
| 1168 | |||
| 1151 | #define FUSE_SETUPMAPPING_FLAG_WRITE (1ull << 0) | 1169 | #define FUSE_SETUPMAPPING_FLAG_WRITE (1ull << 0) |
| 1152 | #define FUSE_SETUPMAPPING_FLAG_READ (1ull << 1) | 1170 | #define FUSE_SETUPMAPPING_FLAG_READ (1ull << 1) |
| 1153 | struct fuse_setupmapping_in { | 1171 | struct fuse_setupmapping_in { |
| @@ -48,6 +48,8 @@ struct hidraw_devinfo { · 47 unmodified lines | |||
| 48 | #define HIDIOCGOUTPUT(len) _IOC(_IOC_WRITE|_IOC_READ, 'H', 0x0C, len) | 48 | #define HIDIOCGOUTPUT(len) _IOC(_IOC_WRITE|_IOC_READ, 'H', 0x0C, len) |
| 49 | #define HIDIOCREVOKE _IOW('H', 0x0D, int) /* Revoke device access */ | 49 | #define HIDIOCREVOKE _IOW('H', 0x0D, int) /* Revoke device access */ |
| 50 | 50 | ||
| 51 | #define HIDIOCTL_LAST _IOC_NR(HIDIOCREVOKE) | ||
| 52 | |||
| 51 | #define HIDRAW_FIRST_MINOR 0 | 53 | #define HIDRAW_FIRST_MINOR 0 |
| 52 | #define HIDRAW_MAX_DEVICES 64 | 54 | #define HIDRAW_MAX_DEVICES 64 |
| 53 | /* number of reports to buffer */ | 55 | /* number of reports to buffer */ |
| @@ -36,6 +36,8 @@ · 35 unmodified lines | |||
| 36 | #define I8K_FAN_LOW 1 | 36 | #define I8K_FAN_LOW 1 |
| 37 | #define I8K_FAN_HIGH 2 | 37 | #define I8K_FAN_HIGH 2 |
| 38 | #define I8K_FAN_TURBO 3 | 38 | #define I8K_FAN_TURBO 3 |
| 39 | /* Many machines treat this mode as some sort of automatic mode */ | ||
| 40 | #define I8K_FAN_AUTO 3 | ||
| 39 | #define I8K_FAN_MAX I8K_FAN_TURBO | 41 | #define I8K_FAN_MAX I8K_FAN_TURBO |
| 40 | 42 | ||
| 41 | #define I8K_VOL_UP 1 | 43 | #define I8K_VOL_UP 1 |
| @@ -823,6 +823,8 @@ struct br_mcast_stats { · 822 unmodified lines | |||
| 823 | /* bridge boolean options | 823 | /* bridge boolean options |
| 824 | * BR_BOOLOPT_NO_LL_LEARN - disable learning from link-local packets | 824 | * BR_BOOLOPT_NO_LL_LEARN - disable learning from link-local packets |
| 825 | * BR_BOOLOPT_MCAST_VLAN_SNOOPING - control vlan multicast snooping | 825 | * BR_BOOLOPT_MCAST_VLAN_SNOOPING - control vlan multicast snooping |
| 826 | * BR_BOOLOPT_FDB_LOCAL_VLAN_0 - local FDB entries installed by the bridge | ||
| 827 | * driver itself should only be added on VLAN 0 | ||
| 826 | * | 828 | * |
| 827 | * IMPORTANT: if adding a new option do not forget to handle | 829 | * IMPORTANT: if adding a new option do not forget to handle |
| 828 | * it in br_boolopt_toggle/get and bridge sysfs | 830 | * it in br_boolopt_toggle/get and bridge sysfs |
| @@ -832,6 +834,7 @@ enum br_boolopt_id { · 3 unmodified lines | |||
| 832 | BR_BOOLOPT_MCAST_VLAN_SNOOPING, | 834 | BR_BOOLOPT_MCAST_VLAN_SNOOPING, |
| 833 | BR_BOOLOPT_MST_ENABLE, | 835 | BR_BOOLOPT_MST_ENABLE, |
| 834 | BR_BOOLOPT_MDB_OFFLOAD_FAIL_NOTIFICATION, | 836 | BR_BOOLOPT_MDB_OFFLOAD_FAIL_NOTIFICATION, |
| 837 | BR_BOOLOPT_FDB_LOCAL_VLAN_0, | ||
| 835 | BR_BOOLOPT_MAX | 838 | BR_BOOLOPT_MAX |
| 836 | }; | 839 | }; |
| 837 | 840 | ||
| @@ -379,6 +379,8 @@ enum { · 378 unmodified lines | |||
| 379 | IFLA_DPLL_PIN, | 379 | IFLA_DPLL_PIN, |
| 380 | IFLA_MAX_PACING_OFFLOAD_HORIZON, | 380 | IFLA_MAX_PACING_OFFLOAD_HORIZON, |
| 381 | IFLA_NETNS_IMMUTABLE, | 381 | IFLA_NETNS_IMMUTABLE, |
| 382 | IFLA_HEADROOM, | ||
| 383 | IFLA_TAILROOM, | ||
| 382 | __IFLA_MAX | 384 | __IFLA_MAX |
| 383 | }; | 385 | }; |
| 384 | 386 | ||
| @@ -1564,6 +1566,7 @@ enum { · 1179 unmodified lines | |||
| 1564 | IFLA_BOND_SLAVE_AD_ACTOR_OPER_PORT_STATE, | 1566 | IFLA_BOND_SLAVE_AD_ACTOR_OPER_PORT_STATE, |
| 1565 | IFLA_BOND_SLAVE_AD_PARTNER_OPER_PORT_STATE, | 1567 | IFLA_BOND_SLAVE_AD_PARTNER_OPER_PORT_STATE, |
| 1566 | IFLA_BOND_SLAVE_PRIO, | 1568 | IFLA_BOND_SLAVE_PRIO, |
| 1569 | IFLA_BOND_SLAVE_ACTOR_PORT_PRIO, | ||
| 1567 | __IFLA_BOND_SLAVE_MAX, | 1570 | __IFLA_BOND_SLAVE_MAX, |
| 1568 | }; | 1571 | }; |
| 1569 | 1572 | ||
| @@ -52,6 +52,7 @@ enum iio_chan_type { · 51 unmodified lines | |||
| 52 | IIO_COLORTEMP, | 52 | IIO_COLORTEMP, |
| 53 | IIO_CHROMATICITY, | 53 | IIO_CHROMATICITY, |
| 54 | IIO_ATTENTION, | 54 | IIO_ATTENTION, |
| 55 | IIO_ALTCURRENT, | ||
| 55 | }; | 56 | }; |
| 56 | 57 | ||
| 57 | enum iio_modifier { | 58 | enum iio_modifier { |
| @@ -108,6 +109,10 @@ enum iio_modifier { · 50 unmodified lines | |||
| 108 | IIO_MOD_ROLL, | 109 | IIO_MOD_ROLL, |
| 109 | IIO_MOD_LIGHT_UVA, | 110 | IIO_MOD_LIGHT_UVA, |
| 110 | IIO_MOD_LIGHT_UVB, | 111 | IIO_MOD_LIGHT_UVB, |
| 112 | IIO_MOD_RMS, | ||
| 113 | IIO_MOD_ACTIVE, | ||
| 114 | IIO_MOD_REACTIVE, | ||
| 115 | IIO_MOD_APPARENT, | ||
| 111 | }; | 116 | }; |
| 112 | 117 | ||
| 113 | enum iio_event_type { | 118 | enum iio_event_type { |
| @@ -27,6 +27,7 @@ · 26 unmodified lines | |||
| 27 | #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */ | 27 | #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */ |
| 28 | #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */ | 28 | #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */ |
| 29 | #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */ | 29 | #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */ |
| 30 | #define INPUT_PROP_HAPTIC_TOUCHPAD 0x07 /* is a haptic touchpad */ | ||
| 30 | 31 | ||
| 31 | #define INPUT_PROP_MAX 0x1f | 32 | #define INPUT_PROP_MAX 0x1f |
| 32 | #define INPUT_PROP_CNT (INPUT_PROP_MAX + 1) | 33 | #define INPUT_PROP_CNT (INPUT_PROP_MAX + 1) |
| @@ -429,6 +429,24 @@ struct ff_rumble_effect { · 428 unmodified lines | |||
| 429 | __u16 weak_magnitude; | 429 | __u16 weak_magnitude; |
| 430 | }; | 430 | }; |
| 431 | 431 | ||
| 432 | /** | ||
| 433 | * struct ff_haptic_effect | ||
| 434 | * @hid_usage: hid_usage according to Haptics page (WAVEFORM_CLICK, etc.) | ||
| 435 | * @vendor_id: the waveform vendor ID if hid_usage is in the vendor-defined range | ||
| 436 | * @vendor_waveform_page: the vendor waveform page if hid_usage is in the vendor-defined range | ||
| 437 | * @intensity: strength of the effect as percentage | ||
| 438 | * @repeat_count: number of times to retrigger effect | ||
| 439 | * @retrigger_period: time before effect is retriggered (in ms) | ||
| 440 | */ | ||
| 441 | struct ff_haptic_effect { | ||
| 442 | __u16 hid_usage; | ||
| 443 | __u16 vendor_id; | ||
| 444 | __u8 vendor_waveform_page; | ||
| 445 | __u16 intensity; | ||
| 446 | __u16 repeat_count; | ||
| 447 | __u16 retrigger_period; | ||
| 448 | }; | ||
| 449 | |||
| 432 | /** | 450 | /** |
| 433 | * struct ff_effect - defines force feedback effect | 451 | * struct ff_effect - defines force feedback effect |
| 434 | * @type: type of the effect (FF_CONSTANT, FF_PERIODIC, FF_RAMP, FF_SPRING, | 452 | * @type: type of the effect (FF_CONSTANT, FF_PERIODIC, FF_RAMP, FF_SPRING, |
| @@ -465,6 +483,7 @@ struct ff_effect { · 30 unmodified lines | |||
| 465 | struct ff_periodic_effect periodic; | 483 | struct ff_periodic_effect periodic; |
| 466 | struct ff_condition_effect condition[2]; /* One for each axis */ | 484 | struct ff_condition_effect condition[2]; /* One for each axis */ |
| 467 | struct ff_rumble_effect rumble; | 485 | struct ff_rumble_effect rumble; |
| 486 | struct ff_haptic_effect haptic; | ||
| 468 | } u; | 487 | } u; |
| 469 | }; | 488 | }; |
| 470 | 489 | ||
| @@ -472,6 +491,7 @@ struct ff_effect { · 1 unmodified line | |||
| 472 | * Force feedback effect types | 491 | * Force feedback effect types |
| 473 | */ | 492 | */ |
| 474 | 493 | ||
| 494 | #define FF_HAPTIC 0x4f | ||
| 475 | #define FF_RUMBLE 0x50 | 495 | #define FF_RUMBLE 0x50 |
| 476 | #define FF_PERIODIC 0x51 | 496 | #define FF_PERIODIC 0x51 |
| 477 | #define FF_CONSTANT 0x52 | 497 | #define FF_CONSTANT 0x52 |
| @@ -481,7 +501,7 @@ struct ff_effect { · 3 unmodified lines | |||
| 481 | #define FF_INERTIA 0x56 | 501 | #define FF_INERTIA 0x56 |
| 482 | #define FF_RAMP 0x57 | 502 | #define FF_RAMP 0x57 |
| 483 | 503 | ||
| 484 | #define FF_EFFECT_MIN FF_RUMBLE | 504 | #define FF_EFFECT_MIN FF_HAPTIC |
| 485 | #define FF_EFFECT_MAX FF_RAMP | 505 | #define FF_EFFECT_MAX FF_RAMP |
| 486 | 506 | ||
| 487 | /* | 507 | /* |
| @@ -225,6 +225,12 @@ enum io_uring_sqe_flags_bit { · 224 unmodified lines | |||
| 225 | /* Use hybrid poll in iopoll process */ | 225 | /* Use hybrid poll in iopoll process */ |
| 226 | #define IORING_SETUP_HYBRID_IOPOLL (1U << 17) | 226 | #define IORING_SETUP_HYBRID_IOPOLL (1U << 17) |
| 227 | 227 | ||
| 228 | /* | ||
| 229 | * Allow both 16b and 32b CQEs. If a 32b CQE is posted, it will have | ||
| 230 | * IORING_CQE_F_32 set in cqe->flags. | ||
| 231 | */ | ||
| 232 | #define IORING_SETUP_CQE_MIXED (1U << 18) | ||
| 233 | |||
| 228 | enum io_uring_op { | 234 | enum io_uring_op { |
| 229 | IORING_OP_NOP, | 235 | IORING_OP_NOP, |
| 230 | IORING_OP_READV, | 236 | IORING_OP_READV, |
| @@ -298,9 +304,13 @@ enum io_uring_op { · 67 unmodified lines | |||
| 298 | * sqe->uring_cmd_flags top 8bits aren't available for userspace | 304 | * sqe->uring_cmd_flags top 8bits aren't available for userspace |
| 299 | * IORING_URING_CMD_FIXED use registered buffer; pass this flag | 305 | * IORING_URING_CMD_FIXED use registered buffer; pass this flag |
| 300 | * along with setting sqe->buf_index. | 306 | * along with setting sqe->buf_index. |
| 307 | * IORING_URING_CMD_MULTISHOT must be used with buffer select, like other | ||
| 308 | * multishot commands. Not compatible with | ||
| 309 | * IORING_URING_CMD_FIXED, for now. | ||
| 301 | */ | 310 | */ |
| 302 | #define IORING_URING_CMD_FIXED (1U << 0) | 311 | #define IORING_URING_CMD_FIXED (1U << 0) |
| 303 | #define IORING_URING_CMD_MASK IORING_URING_CMD_FIXED | 312 | #define IORING_URING_CMD_MULTISHOT (1U << 1) |
| 313 | #define IORING_URING_CMD_MASK (IORING_URING_CMD_FIXED | IORING_URING_CMD_MULTISHOT) | ||
| 304 | 314 | ||
| 305 | 315 | ||
| 306 | /* | 316 | /* |
| @@ -394,7 +404,7 @@ enum io_uring_op { · 87 unmodified lines | |||
| 394 | * will be contiguous from the starting buffer ID. | 404 | * will be contiguous from the starting buffer ID. |
| 395 | * | 405 | * |
| 396 | * IORING_SEND_VECTORIZED If set, SEND[_ZC] will take a pointer to a io_vec | 406 | * IORING_SEND_VECTORIZED If set, SEND[_ZC] will take a pointer to a io_vec |
| 397 | * to allow vectorized send operations. | 407 | * to allow vectorized send operations. |
| 398 | */ | 408 | */ |
| 399 | #define IORING_RECVSEND_POLL_FIRST (1U << 0) | 409 | #define IORING_RECVSEND_POLL_FIRST (1U << 0) |
| 400 | #define IORING_RECV_MULTISHOT (1U << 1) | 410 | #define IORING_RECV_MULTISHOT (1U << 1) |
| @@ -454,6 +464,7 @@ enum io_uring_msg_ring_flags { · 53 unmodified lines | |||
| 454 | #define IORING_NOP_FIXED_FILE (1U << 2) | 464 | #define IORING_NOP_FIXED_FILE (1U << 2) |
| 455 | #define IORING_NOP_FIXED_BUFFER (1U << 3) | 465 | #define IORING_NOP_FIXED_BUFFER (1U << 3) |
| 456 | #define IORING_NOP_TW (1U << 4) | 466 | #define IORING_NOP_TW (1U << 4) |
| 467 | #define IORING_NOP_CQE32 (1U << 5) | ||
| 457 | 468 | ||
| 458 | /* | 469 | /* |
| 459 | * IO completion data structure (Completion Queue Entry) | 470 | * IO completion data structure (Completion Queue Entry) |
| @@ -487,12 +498,22 @@ struct io_uring_cqe { · 27 unmodified lines | |||
| 487 | * other provided buffer type, all completions with a | 498 | * other provided buffer type, all completions with a |
| 488 | * buffer passed back is automatically returned to the | 499 | * buffer passed back is automatically returned to the |
| 489 | * application. | 500 | * application. |
| 501 | * IORING_CQE_F_SKIP If set, then the application/liburing must ignore this | ||
| 502 | * CQE. It's only purpose is to fill a gap in the ring, | ||
| 503 | * if a large CQE is attempted posted when the ring has | ||
| 504 | * just a single small CQE worth of space left before | ||
| 505 | * wrapping. | ||
| 506 | * IORING_CQE_F_32 If set, this is a 32b/big-cqe posting. Use with rings | ||
| 507 | * setup in a mixed CQE mode, where both 16b and 32b | ||
| 508 | * CQEs may be posted to the CQ ring. | ||
| 490 | */ | 509 | */ |
| 491 | #define IORING_CQE_F_BUFFER (1U << 0) | 510 | #define IORING_CQE_F_BUFFER (1U << 0) |
| 492 | #define IORING_CQE_F_MORE (1U << 1) | 511 | #define IORING_CQE_F_MORE (1U << 1) |
| 493 | #define IORING_CQE_F_SOCK_NONEMPTY (1U << 2) | 512 | #define IORING_CQE_F_SOCK_NONEMPTY (1U << 2) |
| 494 | #define IORING_CQE_F_NOTIF (1U << 3) | 513 | #define IORING_CQE_F_NOTIF (1U << 3) |
| 495 | #define IORING_CQE_F_BUF_MORE (1U << 4) | 514 | #define IORING_CQE_F_BUF_MORE (1U << 4) |
| 515 | #define IORING_CQE_F_SKIP (1U << 5) | ||
| 516 | #define IORING_CQE_F_32 (1U << 15) | ||
| 496 | 517 | ||
| 497 | #define IORING_CQE_BUFFER_SHIFT 16 | 518 | #define IORING_CQE_BUFFER_SHIFT 16 |
| 498 | 519 | ||
| @@ -665,6 +686,12 @@ enum io_uring_register_op { · 166 unmodified lines | |||
| 665 | 686 | ||
| 666 | IORING_REGISTER_MEM_REGION = 34, | 687 | IORING_REGISTER_MEM_REGION = 34, |
| 667 | 688 | ||
| 689 | /* query various aspects of io_uring, see linux/io_uring/query.h */ | ||
| 690 | IORING_REGISTER_QUERY = 35, | ||
| 691 | |||
| 692 | /* return zcrx buffers back into circulation */ | ||
| 693 | IORING_REGISTER_ZCRX_REFILL = 36, | ||
| 694 | |||
| 668 | /* this goes last */ | 695 | /* this goes last */ |
| 669 | IORING_REGISTER_LAST, | 696 | IORING_REGISTER_LAST, |
| 670 | 697 | ||
| @@ -1046,6 +1073,15 @@ struct io_uring_zcrx_ifq_reg { · 375 unmodified lines | |||
| 1046 | __u64 __resv[3]; | 1073 | __u64 __resv[3]; |
| 1047 | }; | 1074 | }; |
| 1048 | 1075 | ||
| 1076 | struct io_uring_zcrx_sync_refill { | ||
| 1077 | __u32 zcrx_id; | ||
| 1078 | /* the number of entries to return */ | ||
| 1079 | __u32 nr_entries; | ||
| 1080 | /* pointer to an array of struct io_uring_zcrx_rqe */ | ||
| 1081 | __u64 rqes; | ||
| 1082 | __u64 __resv[2]; | ||
| 1083 | }; | ||
| 1084 | |||
| 1049 | #ifdef __cplusplus | 1085 | #ifdef __cplusplus |
| 1050 | } | 1086 | } |
| 1051 | #endif | 1087 | #endif |
| @@ -0,0 +1,41 @@ | |||
| 1 | /* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR MIT */ | ||
| 2 | /* | ||
| 3 | * Header file for the io_uring query interface. | ||
| 4 | */ | ||
| 5 | #ifndef LINUX_IO_URING_QUERY_H | ||
| 6 | #define LINUX_IO_URING_QUERY_H | ||
| 7 | |||
| 8 | #include <linux/types.h> | ||
| 9 | |||
| 10 | struct io_uring_query_hdr { | ||
| 11 | __u64 next_entry; | ||
| 12 | __u64 query_data; | ||
| 13 | __u32 query_op; | ||
| 14 | __u32 size; | ||
| 15 | __s32 result; | ||
| 16 | __u32 __resv[3]; | ||
| 17 | }; | ||
| 18 | |||
| 19 | enum { | ||
| 20 | IO_URING_QUERY_OPCODES = 0, | ||
| 21 | |||
| 22 | __IO_URING_QUERY_MAX, | ||
| 23 | }; | ||
| 24 | |||
| 25 | /* Doesn't require a ring */ | ||
| 26 | struct io_uring_query_opcode { | ||
| 27 | /* The number of supported IORING_OP_* opcodes */ | ||
| 28 | __u32 nr_request_opcodes; | ||
| 29 | /* The number of supported IORING_[UN]REGISTER_* opcodes */ | ||
| 30 | __u32 nr_register_opcodes; | ||
| 31 | /* Bitmask of all supported IORING_FEAT_* flags */ | ||
| 32 | __u64 feature_flags; | ||
| 33 | /* Bitmask of all supported IORING_SETUP_* flags */ | ||
| 34 | __u64 ring_setup_flags; | ||
| 35 | /* Bitmask of all supported IORING_ENTER_** flags */ | ||
| 36 | __u64 enter_flags; | ||
| 37 | /* Bitmask of all supported IOSQE_* flags */ | ||
| 38 | __u64 sqe_flags; | ||
| 39 | }; | ||
| 40 | |||
| 41 | #endif | ||
| @@ -2,7 +2,7 @@ · 1 unmodified line | |||
| 2 | /* | 2 | /* |
| 3 | Public ivtv API header | 3 | Public ivtv API header |
| 4 | Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com> | 4 | Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com> |
| 5 | Copyright (C) 2004-2007 Hans Verkuil <hverkuil@xs4all.nl> | 5 | Copyright (C) 2004-2007 Hans Verkuil <hverkuil@kernel.org> |
| 6 | 6 | ||
| 7 | This program is free software; you can redistribute it and/or modify | 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by | 8 | it under the terms of the GNU General Public License as published by |
| @@ -22,12 +22,16 @@ · 21 unmodified lines | |||
| 22 | * KEXEC_FILE_ON_CRASH : Load/unload operation belongs to kdump image. | 22 | * KEXEC_FILE_ON_CRASH : Load/unload operation belongs to kdump image. |
| 23 | * KEXEC_FILE_NO_INITRAMFS : No initramfs is being loaded. Ignore the initrd | 23 | * KEXEC_FILE_NO_INITRAMFS : No initramfs is being loaded. Ignore the initrd |
| 24 | * fd field. | 24 | * fd field. |
| 25 | * KEXEC_FILE_FORCE_DTB : Force carrying over the current boot's DTB to the new | ||
| 26 | * kernel on x86. This is already the default behavior on | ||
| 27 | * some other architectures, like ARM64 and PowerPC. | ||
| 25 | */ | 28 | */ |
| 26 | #define KEXEC_FILE_UNLOAD 0x00000001 | 29 | #define KEXEC_FILE_UNLOAD 0x00000001 |
| 27 | #define KEXEC_FILE_ON_CRASH 0x00000002 | 30 | #define KEXEC_FILE_ON_CRASH 0x00000002 |
| 28 | #define KEXEC_FILE_NO_INITRAMFS 0x00000004 | 31 | #define KEXEC_FILE_NO_INITRAMFS 0x00000004 |
| 29 | #define KEXEC_FILE_DEBUG 0x00000008 | 32 | #define KEXEC_FILE_DEBUG 0x00000008 |
| 30 | #define KEXEC_FILE_NO_CMA 0x00000010 | 33 | #define KEXEC_FILE_NO_CMA 0x00000010 |
| 34 | #define KEXEC_FILE_FORCE_DTB 0x00000020 | ||
| 31 | 35 | ||
| 32 | /* These values match the ELF architecture values. | 36 | /* These values match the ELF architecture values. |
| 33 | * Unless there is a good reason that should continue to be the case. | 37 | * Unless there is a good reason that should continue to be the case. |
| @@ -67,8 +67,8 @@ struct kfd_ioctl_get_version_args { · 66 unmodified lines | |||
| 67 | 67 | ||
| 68 | struct kfd_ioctl_create_queue_args { | 68 | struct kfd_ioctl_create_queue_args { |
| 69 | __u64 ring_base_address; /* to KFD */ | 69 | __u64 ring_base_address; /* to KFD */ |
| 70 | __u64 write_pointer_address; /* from KFD */ | 70 | __u64 write_pointer_address; /* to KFD */ |
| 71 | __u64 read_pointer_address; /* from KFD */ | 71 | __u64 read_pointer_address; /* to KFD */ |
| 72 | __u64 doorbell_offset; /* from KFD */ | 72 | __u64 doorbell_offset; /* from KFD */ |
| 73 | 73 | ||
| 74 | __u32 ring_size; /* to KFD */ | 74 | __u32 ring_size; /* to KFD */ |
| @@ -962,6 +962,7 @@ struct kvm_enable_cap { · 961 unmodified lines | |||
| 962 | #define KVM_CAP_ARM_EL2_E2H0 241 | 962 | #define KVM_CAP_ARM_EL2_E2H0 241 |
| 963 | #define KVM_CAP_RISCV_MP_STATE_RESET 242 | 963 | #define KVM_CAP_RISCV_MP_STATE_RESET 242 |
| 964 | #define KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 243 | 964 | #define KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 243 |
| 965 | #define KVM_CAP_GUEST_MEMFD_MMAP 244 | ||
| 965 | 966 | ||
| 966 | struct kvm_irq_routing_irqchip { | 967 | struct kvm_irq_routing_irqchip { |
| 967 | __u32 irqchip; | 968 | __u32 irqchip; |
| @@ -1598,6 +1599,7 @@ struct kvm_memory_attributes { · 630 unmodified lines | |||
| 1598 | #define KVM_MEMORY_ATTRIBUTE_PRIVATE (1ULL << 3) | 1599 | #define KVM_MEMORY_ATTRIBUTE_PRIVATE (1ULL << 3) |
| 1599 | 1600 | ||
| 1600 | #define KVM_CREATE_GUEST_MEMFD _IOWR(KVMIO, 0xd4, struct kvm_create_guest_memfd) | 1601 | #define KVM_CREATE_GUEST_MEMFD _IOWR(KVMIO, 0xd4, struct kvm_create_guest_memfd) |
| 1602 | #define GUEST_MEMFD_FLAG_MMAP (1ULL << 0) | ||
| 1601 | 1603 | ||
| 1602 | struct kvm_create_guest_memfd { | 1604 | struct kvm_create_guest_memfd { |
| 1603 | __u64 size; | 1605 | __u64 size; |
| @@ -66,10 +66,16 @@ enum { · 65 unmodified lines | |||
| 66 | #define MPOL_F_MORON (1 << 4) /* Migrate On protnone Reference On Node */ | 66 | #define MPOL_F_MORON (1 << 4) /* Migrate On protnone Reference On Node */ |
| 67 | 67 | ||
| 68 | /* | 68 | /* |
| 69 | * These bit locations are exposed in the vm.zone_reclaim_mode sysctl | 69 | * Enabling zone reclaim means the page allocator will attempt to fulfill |
| 70 | * ABI. New bits are OK, but existing bits can never change. | 70 | * the allocation request on the current node by triggering reclaim and |
| 71 | * trying to shrink the current node. | ||
| 72 | * Fallback allocations on the next candidates in the zonelist are considered | ||
| 73 | * when reclaim fails to free up enough memory in the current node/zone. | ||
| 74 | * | ||
| 75 | * These bit locations are exposed in the vm.zone_reclaim_mode sysctl. | ||
| 76 | * New bits are OK, but existing bits should not be changed. | ||
| 71 | */ | 77 | */ |
| 72 | #define RECLAIM_ZONE (1<<0) /* Run shrink_inactive_list on the zone */ | 78 | #define RECLAIM_ZONE (1<<0) /* Enable zone reclaim */ |
| 73 | #define RECLAIM_WRITE (1<<1) /* Writeout pages during reclaim */ | 79 | #define RECLAIM_WRITE (1<<1) /* Writeout pages during reclaim */ |
| 74 | #define RECLAIM_UNMAP (1<<2) /* Unmap pages during reclaim */ | 80 | #define RECLAIM_UNMAP (1<<2) /* Unmap pages during reclaim */ |
| 75 | 81 | ||
| @@ -31,19 +31,28 @@ · 30 unmodified lines | |||
| 31 | #define MPTCP_INFO_FLAG_FALLBACK _BITUL(0) | 31 | #define MPTCP_INFO_FLAG_FALLBACK _BITUL(0) |
| 32 | #define MPTCP_INFO_FLAG_REMOTE_KEY_RECEIVED _BITUL(1) | 32 | #define MPTCP_INFO_FLAG_REMOTE_KEY_RECEIVED _BITUL(1) |
| 33 | 33 | ||
| 34 | #define MPTCP_PM_ADDR_FLAG_SIGNAL (1 << 0) | 34 | #define MPTCP_PM_EV_FLAG_DENY_JOIN_ID0 _BITUL(0) |
| 35 | #define MPTCP_PM_ADDR_FLAG_SUBFLOW (1 << 1) | 35 | #define MPTCP_PM_EV_FLAG_SERVER_SIDE _BITUL(1) |
| 36 | #define MPTCP_PM_ADDR_FLAG_BACKUP (1 << 2) | 36 | |
| 37 | #define MPTCP_PM_ADDR_FLAG_FULLMESH (1 << 3) | 37 | #define MPTCP_PM_ADDR_FLAG_SIGNAL _BITUL(0) |
| 38 | #define MPTCP_PM_ADDR_FLAG_IMPLICIT (1 << 4) | 38 | #define MPTCP_PM_ADDR_FLAG_SUBFLOW _BITUL(1) |
| 39 | #define MPTCP_PM_ADDR_FLAG_BACKUP _BITUL(2) | ||
| 40 | #define MPTCP_PM_ADDR_FLAG_FULLMESH _BITUL(3) | ||
| 41 | #define MPTCP_PM_ADDR_FLAG_IMPLICIT _BITUL(4) | ||
| 42 | #define MPTCP_PM_ADDR_FLAG_LAMINAR _BITUL(5) | ||
| 39 | 43 | ||
| 40 | struct mptcp_info { | 44 | struct mptcp_info { |
| 41 | __u8 mptcpi_subflows; | 45 | __u8 mptcpi_subflows; |
| 46 | #define mptcpi_extra_subflows mptcpi_subflows | ||
| 42 | __u8 mptcpi_add_addr_signal; | 47 | __u8 mptcpi_add_addr_signal; |
| 43 | __u8 mptcpi_add_addr_accepted; | 48 | __u8 mptcpi_add_addr_accepted; |
| 44 | __u8 mptcpi_subflows_max; | 49 | __u8 mptcpi_subflows_max; |
| 50 | #define mptcpi_limit_extra_subflows mptcpi_subflows_max | ||
| 45 | __u8 mptcpi_add_addr_signal_max; | 51 | __u8 mptcpi_add_addr_signal_max; |
| 52 | #define mptcpi_endp_signal_max mptcpi_add_addr_signal_max | ||
| 46 | __u8 mptcpi_add_addr_accepted_max; | 53 | __u8 mptcpi_add_addr_accepted_max; |
| 54 | #define mptcpi_limit_add_addr_accepted mptcpi_add_addr_accepted_max | ||
| 55 | /* 16-bit hole that can no longer be filled */ | ||
| 47 | __u32 mptcpi_flags; | 56 | __u32 mptcpi_flags; |
| 48 | __u32 mptcpi_token; | 57 | __u32 mptcpi_token; |
| 49 | __u64 mptcpi_write_seq; | 58 | __u64 mptcpi_write_seq; |
| @@ -51,14 +60,17 @@ struct mptcp_info { · 1 unmodified line | |||
| 51 | __u64 mptcpi_rcv_nxt; | 60 | __u64 mptcpi_rcv_nxt; |
| 52 | __u8 mptcpi_local_addr_used; | 61 | __u8 mptcpi_local_addr_used; |
| 53 | __u8 mptcpi_local_addr_max; | 62 | __u8 mptcpi_local_addr_max; |
| 63 | #define mptcpi_endp_subflow_max mptcpi_local_addr_max | ||
| 54 | __u8 mptcpi_csum_enabled; | 64 | __u8 mptcpi_csum_enabled; |
| 65 | /* 8-bit hole that can no longer be filled */ | ||
| 55 | __u32 mptcpi_retransmits; | 66 | __u32 mptcpi_retransmits; |
| 56 | __u64 mptcpi_bytes_retrans; | 67 | __u64 mptcpi_bytes_retrans; |
| 57 | __u64 mptcpi_bytes_sent; | 68 | __u64 mptcpi_bytes_sent; |
| 58 | __u64 mptcpi_bytes_received; | 69 | __u64 mptcpi_bytes_received; |
| 59 | __u64 mptcpi_bytes_acked; | 70 | __u64 mptcpi_bytes_acked; |
| 60 | __u8 mptcpi_subflows_total; | 71 | __u8 mptcpi_subflows_total; |
| 61 | __u8 reserved[3]; | 72 | __u8 mptcpi_endp_laminar_max; |
| 73 | __u8 reserved[2]; | ||
| 62 | __u32 mptcpi_last_data_sent; | 74 | __u32 mptcpi_last_data_sent; |
| 63 | __u32 mptcpi_last_data_recv; | 75 | __u32 mptcpi_last_data_recv; |
| 64 | __u32 mptcpi_last_ack_recv; | 76 | __u32 mptcpi_last_ack_recv; |
| @@ -16,10 +16,10 @@ · 15 unmodified lines | |||
| 16 | * good time to allocate memory and send ADD_ADDR if needed. Depending on the | 16 | * good time to allocate memory and send ADD_ADDR if needed. Depending on the |
| 17 | * traffic-patterns it can take a long time until the MPTCP_EVENT_ESTABLISHED | 17 | * traffic-patterns it can take a long time until the MPTCP_EVENT_ESTABLISHED |
| 18 | * is sent. Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6, | 18 | * is sent. Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6, |
| 19 | * sport, dport, server-side. | 19 | * sport, dport, [server-side], [flags]. |
| 20 | * @MPTCP_EVENT_ESTABLISHED: A MPTCP connection is established (can start new | 20 | * @MPTCP_EVENT_ESTABLISHED: A MPTCP connection is established (can start new |
| 21 | * subflows). Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6, | 21 | * subflows). Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6, |
| 22 | * sport, dport, server-side. | 22 | * sport, dport, [server-side], [flags]. |
| 23 | * @MPTCP_EVENT_CLOSED: A MPTCP connection has stopped. Attribute: token. | 23 | * @MPTCP_EVENT_CLOSED: A MPTCP connection has stopped. Attribute: token. |
| 24 | * @MPTCP_EVENT_ANNOUNCED: A new address has been announced by the peer. | 24 | * @MPTCP_EVENT_ANNOUNCED: A new address has been announced by the peer. |
| 25 | * Attributes: token, rem_id, family, daddr4 | daddr6 [, dport]. | 25 | * Attributes: token, rem_id, family, daddr4 | daddr6 [, dport]. |
| @@ -959,6 +959,7 @@ enum nft_exthdr_attributes { · 958 unmodified lines | |||
| 959 | * @NFT_META_SDIF: slave device interface index | 959 | * @NFT_META_SDIF: slave device interface index |
| 960 | * @NFT_META_SDIFNAME: slave device interface name | 960 | * @NFT_META_SDIFNAME: slave device interface name |
| 961 | * @NFT_META_BRI_BROUTE: packet br_netfilter_broute bit | 961 | * @NFT_META_BRI_BROUTE: packet br_netfilter_broute bit |
| 962 | * @NFT_META_BRI_IIFHWADDR: packet input bridge interface ethernet address | ||
| 962 | */ | 963 | */ |
| 963 | enum nft_meta_keys { | 964 | enum nft_meta_keys { |
| 964 | NFT_META_LEN, | 965 | NFT_META_LEN, |
| @@ -999,6 +1000,7 @@ enum nft_meta_keys { · 34 unmodified lines | |||
| 999 | NFT_META_SDIFNAME, | 1000 | NFT_META_SDIFNAME, |
| 1000 | NFT_META_BRI_BROUTE, | 1001 | NFT_META_BRI_BROUTE, |
| 1001 | __NFT_META_IIFTYPE, | 1002 | __NFT_META_IIFTYPE, |
| 1003 | NFT_META_BRI_IIFHWADDR, | ||
| 1002 | }; | 1004 | }; |
| 1003 | 1005 | ||
| 1004 | /** | 1006 | /** |
| @@ -1085,8 +1085,9 @@ · 1084 unmodified lines | |||
| 1085 | * %NL80211_ATTR_NAN_MASTER_PREF attribute and optional | 1085 | * %NL80211_ATTR_NAN_MASTER_PREF attribute and optional |
| 1086 | * %NL80211_ATTR_BANDS attributes. If %NL80211_ATTR_BANDS is | 1086 | * %NL80211_ATTR_BANDS attributes. If %NL80211_ATTR_BANDS is |
| 1087 | * omitted or set to 0, it means don't-care and the device will | 1087 | * omitted or set to 0, it means don't-care and the device will |
| 1088 | * decide what to use. After this command NAN functions can be | 1088 | * decide what to use. Additional cluster configuration may be |
| 1089 | * added. | 1089 | * optionally provided with %NL80211_ATTR_NAN_CONFIG. |
| 1090 | * After this command NAN functions can be added. | ||
| 1090 | * @NL80211_CMD_STOP_NAN: Stop the NAN operation, identified by | 1091 | * @NL80211_CMD_STOP_NAN: Stop the NAN operation, identified by |
| 1091 | * its %NL80211_ATTR_WDEV interface. | 1092 | * its %NL80211_ATTR_WDEV interface. |
| 1092 | * @NL80211_CMD_ADD_NAN_FUNCTION: Add a NAN function. The function is defined | 1093 | * @NL80211_CMD_ADD_NAN_FUNCTION: Add a NAN function. The function is defined |
| @@ -1115,6 +1116,10 @@ · 22 unmodified lines | |||
| 1115 | * current configuration is not changed. If it is present but | 1116 | * current configuration is not changed. If it is present but |
| 1116 | * set to zero, the configuration is changed to don't-care | 1117 | * set to zero, the configuration is changed to don't-care |
| 1117 | * (i.e. the device can decide what to do). | 1118 | * (i.e. the device can decide what to do). |
| 1119 | * Additional parameters may be provided with | ||
| 1120 | * %NL80211_ATTR_NAN_CONFIG. User space should provide all previously | ||
| 1121 | * configured nested attributes under %NL80211_ATTR_NAN_CONFIG, even if | ||
| 1122 | * only a subset was changed. | ||
| 1118 | * @NL80211_CMD_NAN_MATCH: Notification sent when a match is reported. | 1123 | * @NL80211_CMD_NAN_MATCH: Notification sent when a match is reported. |
| 1119 | * This will contain a %NL80211_ATTR_NAN_MATCH nested attribute and | 1124 | * This will contain a %NL80211_ATTR_NAN_MATCH nested attribute and |
| 1120 | * %NL80211_ATTR_COOKIE. | 1125 | * %NL80211_ATTR_COOKIE. |
| @@ -1344,6 +1349,18 @@ · 223 unmodified lines | |||
| 1344 | * control EPCS configuration. Used to notify userland on the current state | 1349 | * control EPCS configuration. Used to notify userland on the current state |
| 1345 | * of EPCS. | 1350 | * of EPCS. |
| 1346 | * | 1351 | * |
| 1352 | * @NL80211_CMD_NAN_NEXT_DW_NOTIFICATION: This command is used to notify | ||
| 1353 | * user space about the next NAN Discovery Window (DW). User space may use | ||
| 1354 | * it to prepare frames to be sent in the next DW. | ||
| 1355 | * %NL80211_ATTR_WIPHY_FREQ is used to indicate the frequency of the next | ||
| 1356 | * DW. SDF transmission should be requested with %NL80211_CMD_FRAME and | ||
| 1357 | * the device/driver shall take care of the actual transmission timing. | ||
| 1358 | * This notification is only sent to the NAN interface owning socket | ||
| 1359 | * (see %NL80211_ATTR_SOCKET_OWNER flag). | ||
| 1360 | * @NL80211_CMD_NAN_CLUSTER_JOINED: This command is used to notify | ||
| 1361 | * user space that the NAN new cluster has been joined. The cluster ID is | ||
| 1362 | * indicated by %NL80211_ATTR_MAC. | ||
| 1363 | * | ||
| 1347 | * @NL80211_CMD_MAX: highest used command number | 1364 | * @NL80211_CMD_MAX: highest used command number |
| 1348 | * @__NL80211_CMD_AFTER_LAST: internal use | 1365 | * @__NL80211_CMD_AFTER_LAST: internal use |
| 1349 | */ | 1366 | */ |
| @@ -1604,6 +1621,9 @@ enum nl80211_commands { · 254 unmodified lines | |||
| 1604 | NL80211_CMD_ASSOC_MLO_RECONF, | 1621 | NL80211_CMD_ASSOC_MLO_RECONF, |
| 1605 | NL80211_CMD_EPCS_CFG, | 1622 | NL80211_CMD_EPCS_CFG, |
| 1606 | 1623 | ||
| 1624 | NL80211_CMD_NAN_NEXT_DW_NOTIFICATION, | ||
| 1625 | NL80211_CMD_NAN_CLUSTER_JOINED, | ||
| 1626 | |||
| 1607 | /* add new commands above here */ | 1627 | /* add new commands above here */ |
| 1608 | 1628 | ||
| 1609 | /* used to define NL80211_CMD_MAX below */ | 1629 | /* used to define NL80211_CMD_MAX below */ |
| @@ -1943,8 +1963,9 @@ enum nl80211_commands { · 333 unmodified lines | |||
| 1943 | * The driver must also specify support for this with the extended | 1963 | * The driver must also specify support for this with the extended |
| 1944 | * features NL80211_EXT_FEATURE_BEACON_RATE_LEGACY, | 1964 | * features NL80211_EXT_FEATURE_BEACON_RATE_LEGACY, |
| 1945 | * NL80211_EXT_FEATURE_BEACON_RATE_HT, | 1965 | * NL80211_EXT_FEATURE_BEACON_RATE_HT, |
| 1946 | * NL80211_EXT_FEATURE_BEACON_RATE_VHT and | 1966 | * NL80211_EXT_FEATURE_BEACON_RATE_VHT, |
| 1947 | * NL80211_EXT_FEATURE_BEACON_RATE_HE. | 1967 | * NL80211_EXT_FEATURE_BEACON_RATE_HE and |
| 1968 | * NL80211_EXT_FEATURE_BEACON_RATE_EHT. | ||
| 1948 | * | 1969 | * |
| 1949 | * @NL80211_ATTR_FRAME_MATCH: A binary attribute which typically must contain | 1970 | * @NL80211_ATTR_FRAME_MATCH: A binary attribute which typically must contain |
| 1950 | * at least one byte, currently used with @NL80211_CMD_REGISTER_FRAME. | 1971 | * at least one byte, currently used with @NL80211_CMD_REGISTER_FRAME. |
| @@ -2283,7 +2304,8 @@ enum nl80211_commands { · 332 unmodified lines | |||
| 2283 | * @NL80211_ATTR_PEER_AID: Association ID for the peer TDLS station (u16). | 2304 | * @NL80211_ATTR_PEER_AID: Association ID for the peer TDLS station (u16). |
| 2284 | * This is similar to @NL80211_ATTR_STA_AID but with a difference of being | 2305 | * This is similar to @NL80211_ATTR_STA_AID but with a difference of being |
| 2285 | * allowed to be used with the first @NL80211_CMD_SET_STATION command to | 2306 | * allowed to be used with the first @NL80211_CMD_SET_STATION command to |
| 2286 | * update a TDLS peer STA entry. | 2307 | * update a TDLS peer STA entry. For S1G interfaces, this is limited to |
| 2308 | * 1600 for the current mac80211 implementation. | ||
| 2287 | * | 2309 | * |
| 2288 | * @NL80211_ATTR_COALESCE_RULE: Coalesce rule information. | 2310 | * @NL80211_ATTR_COALESCE_RULE: Coalesce rule information. |
| 2289 | * | 2311 | * |
| @@ -2928,6 +2950,29 @@ enum nl80211_commands { · 638 unmodified lines | |||
| 2928 | * required alongside this attribute. Refer to | 2950 | * required alongside this attribute. Refer to |
| 2929 | * @enum nl80211_s1g_short_beacon_attrs for the attribute definitions. | 2951 | * @enum nl80211_s1g_short_beacon_attrs for the attribute definitions. |
| 2930 | * | 2952 | * |
| 2953 | * @NL80211_ATTR_BSS_PARAM: nested attribute used with %NL80211_CMD_GET_WIPHY | ||
| 2954 | * which indicates which BSS parameters can be modified. The attribute can | ||
| 2955 | * also be used as flag attribute by user-space in %NL80211_CMD_SET_BSS to | ||
| 2956 | * indicate that it wants strict checking on the BSS parameters to be | ||
| 2957 | * modified. | ||
| 2958 | * | ||
| 2959 | * @NL80211_ATTR_NAN_CONFIG: Nested attribute for | ||
| 2960 | * extended NAN cluster configuration. This is used with | ||
| 2961 | * %NL80211_CMD_START_NAN and %NL80211_CMD_CHANGE_NAN_CONFIG. | ||
| 2962 | * See &enum nl80211_nan_conf_attributes for details. | ||
| 2963 | * This attribute is optional. | ||
| 2964 | * @NL80211_ATTR_NAN_NEW_CLUSTER: Flag attribute indicating that a new | ||
| 2965 | * NAN cluster has been created. This is used with | ||
| 2966 | * %NL80211_CMD_NAN_CLUSTER_JOINED | ||
| 2967 | * @NL80211_ATTR_NAN_CAPABILITIES: Nested attribute for NAN capabilities. | ||
| 2968 | * This is used with %NL80211_CMD_GET_WIPHY to indicate the NAN | ||
| 2969 | * capabilities supported by the driver. See &enum nl80211_nan_capabilities | ||
| 2970 | * for details. | ||
| 2971 | * | ||
| 2972 | * @NL80211_ATTR_S1G_PRIMARY_2MHZ: flag attribute indicating that the S1G | ||
| 2973 | * primary channel is 2 MHz wide, and the control channel designates | ||
| 2974 | * the 1 MHz primary subchannel within that 2 MHz primary. | ||
| 2975 | * | ||
| 2931 | * @NUM_NL80211_ATTR: total number of nl80211_attrs available | 2976 | * @NUM_NL80211_ATTR: total number of nl80211_attrs available |
| 2932 | * @NL80211_ATTR_MAX: highest attribute number currently defined | 2977 | * @NL80211_ATTR_MAX: highest attribute number currently defined |
| 2933 | * @__NL80211_ATTR_AFTER_LAST: internal use | 2978 | * @__NL80211_ATTR_AFTER_LAST: internal use |
| @@ -3489,6 +3534,12 @@ enum nl80211_attrs { · 555 unmodified lines | |||
| 3489 | 3534 | ||
| 3490 | NL80211_ATTR_S1G_LONG_BEACON_PERIOD, | 3535 | NL80211_ATTR_S1G_LONG_BEACON_PERIOD, |
| 3491 | NL80211_ATTR_S1G_SHORT_BEACON, | 3536 | NL80211_ATTR_S1G_SHORT_BEACON, |
| 3537 | NL80211_ATTR_BSS_PARAM, | ||
| 3538 | NL80211_ATTR_NAN_CONFIG, | ||
| 3539 | NL80211_ATTR_NAN_NEW_CLUSTER, | ||
| 3540 | NL80211_ATTR_NAN_CAPABILITIES, | ||
| 3541 | |||
| 3542 | NL80211_ATTR_S1G_PRIMARY_2MHZ, | ||
| 3492 | 3543 | ||
| 3493 | /* add attributes here, update the policy in nl80211.c */ | 3544 | /* add attributes here, update the policy in nl80211.c */ |
| 3494 | 3545 | ||
| @@ -3735,6 +3786,22 @@ enum nl80211_eht_gi { · 240 unmodified lines | |||
| 3735 | NL80211_RATE_INFO_EHT_GI_3_2, | 3786 | NL80211_RATE_INFO_EHT_GI_3_2, |
| 3736 | }; | 3787 | }; |
| 3737 | 3788 | ||
| 3789 | /** | ||
| 3790 | * enum nl80211_eht_ltf - EHT long training field | ||
| 3791 | * @NL80211_RATE_INFO_EHT_1XLTF: 3.2 usec | ||
| 3792 | * @NL80211_RATE_INFO_EHT_2XLTF: 6.4 usec | ||
| 3793 | * @NL80211_RATE_INFO_EHT_4XLTF: 12.8 usec | ||
| 3794 | * @NL80211_RATE_INFO_EHT_6XLTF: 19.2 usec | ||
| 3795 | * @NL80211_RATE_INFO_EHT_8XLTF: 25.6 usec | ||
| 3796 | */ | ||
| 3797 | enum nl80211_eht_ltf { | ||
| 3798 | NL80211_RATE_INFO_EHT_1XLTF, | ||
| 3799 | NL80211_RATE_INFO_EHT_2XLTF, | ||
| 3800 | NL80211_RATE_INFO_EHT_4XLTF, | ||
| 3801 | NL80211_RATE_INFO_EHT_6XLTF, | ||
| 3802 | NL80211_RATE_INFO_EHT_8XLTF, | ||
| 3803 | }; | ||
| 3804 | |||
| 3738 | /** | 3805 | /** |
| 3739 | * enum nl80211_eht_ru_alloc - EHT RU allocation values | 3806 | * enum nl80211_eht_ru_alloc - EHT RU allocation values |
| 3740 | * @NL80211_RATE_INFO_EHT_RU_ALLOC_26: 26-tone RU allocation | 3807 | * @NL80211_RATE_INFO_EHT_RU_ALLOC_26: 26-tone RU allocation |
| @@ -4371,6 +4438,12 @@ enum nl80211_wmm_rule { · 630 unmodified lines | |||
| 4371 | * very low power (VLP) AP, despite being NO_IR. | 4438 | * very low power (VLP) AP, despite being NO_IR. |
| 4372 | * @NL80211_FREQUENCY_ATTR_ALLOW_20MHZ_ACTIVITY: This channel can be active in | 4439 | * @NL80211_FREQUENCY_ATTR_ALLOW_20MHZ_ACTIVITY: This channel can be active in |
| 4373 | * 20 MHz bandwidth, despite being NO_IR. | 4440 | * 20 MHz bandwidth, despite being NO_IR. |
| 4441 | * @NL80211_FREQUENCY_ATTR_NO_4MHZ: 4 MHz operation is not allowed on this | ||
| 4442 | * channel in current regulatory domain. | ||
| 4443 | * @NL80211_FREQUENCY_ATTR_NO_8MHZ: 8 MHz operation is not allowed on this | ||
| 4444 | * channel in current regulatory domain. | ||
| 4445 | * @NL80211_FREQUENCY_ATTR_NO_16MHZ: 16 MHz operation is not allowed on this | ||
| 4446 | * channel in current regulatory domain. | ||
| 4374 | * @NL80211_FREQUENCY_ATTR_MAX: highest frequency attribute number | 4447 | * @NL80211_FREQUENCY_ATTR_MAX: highest frequency attribute number |
| 4375 | * currently defined | 4448 | * currently defined |
| 4376 | * @__NL80211_FREQUENCY_ATTR_AFTER_LAST: internal use | 4449 | * @__NL80211_FREQUENCY_ATTR_AFTER_LAST: internal use |
| @@ -4416,6 +4489,9 @@ enum nl80211_frequency_attr { · 39 unmodified lines | |||
| 4416 | NL80211_FREQUENCY_ATTR_CAN_MONITOR, | 4489 | NL80211_FREQUENCY_ATTR_CAN_MONITOR, |
| 4417 | NL80211_FREQUENCY_ATTR_ALLOW_6GHZ_VLP_AP, | 4490 | NL80211_FREQUENCY_ATTR_ALLOW_6GHZ_VLP_AP, |
| 4418 | NL80211_FREQUENCY_ATTR_ALLOW_20MHZ_ACTIVITY, | 4491 | NL80211_FREQUENCY_ATTR_ALLOW_20MHZ_ACTIVITY, |
| 4492 | NL80211_FREQUENCY_ATTR_NO_4MHZ, | ||
| 4493 | NL80211_FREQUENCY_ATTR_NO_8MHZ, | ||
| 4494 | NL80211_FREQUENCY_ATTR_NO_16MHZ, | ||
| 4419 | 4495 | ||
| 4420 | /* keep last */ | 4496 | /* keep last */ |
| 4421 | __NL80211_FREQUENCY_ATTR_AFTER_LAST, | 4497 | __NL80211_FREQUENCY_ATTR_AFTER_LAST, |
| @@ -5481,6 +5557,10 @@ enum nl80211_key_attributes { · 1059 unmodified lines | |||
| 5481 | * see &struct nl80211_txrate_he | 5557 | * see &struct nl80211_txrate_he |
| 5482 | * @NL80211_TXRATE_HE_GI: configure HE GI, 0.8us, 1.6us and 3.2us. | 5558 | * @NL80211_TXRATE_HE_GI: configure HE GI, 0.8us, 1.6us and 3.2us. |
| 5483 | * @NL80211_TXRATE_HE_LTF: configure HE LTF, 1XLTF, 2XLTF and 4XLTF. | 5559 | * @NL80211_TXRATE_HE_LTF: configure HE LTF, 1XLTF, 2XLTF and 4XLTF. |
| 5560 | * @NL80211_TXRATE_EHT: EHT rates allowed for TX rate selection, | ||
| 5561 | * see &struct nl80211_txrate_eht | ||
| 5562 | * @NL80211_TXRATE_EHT_GI: configure EHT GI, (u8, see &enum nl80211_eht_gi) | ||
| 5563 | * @NL80211_TXRATE_EHT_LTF: configure EHT LTF, (u8, see &enum nl80211_eht_ltf) | ||
| 5484 | * @__NL80211_TXRATE_AFTER_LAST: internal | 5564 | * @__NL80211_TXRATE_AFTER_LAST: internal |
| 5485 | * @NL80211_TXRATE_MAX: highest TX rate attribute | 5565 | * @NL80211_TXRATE_MAX: highest TX rate attribute |
| 5486 | */ | 5566 | */ |
| @@ -5493,6 +5573,9 @@ enum nl80211_tx_rate_attributes { · 6 unmodified lines | |||
| 5493 | NL80211_TXRATE_HE, | 5573 | NL80211_TXRATE_HE, |
| 5494 | NL80211_TXRATE_HE_GI, | 5574 | NL80211_TXRATE_HE_GI, |
| 5495 | NL80211_TXRATE_HE_LTF, | 5575 | NL80211_TXRATE_HE_LTF, |
| 5576 | NL80211_TXRATE_EHT, | ||
| 5577 | NL80211_TXRATE_EHT_GI, | ||
| 5578 | NL80211_TXRATE_EHT_LTF, | ||
| 5496 | 5579 | ||
| 5497 | /* keep last */ | 5580 | /* keep last */ |
| 5498 | __NL80211_TXRATE_AFTER_LAST, | 5581 | __NL80211_TXRATE_AFTER_LAST, |
| @@ -5525,6 +5608,15 @@ enum nl80211_txrate_gi { · 26 unmodified lines | |||
| 5525 | NL80211_TXRATE_FORCE_LGI, | 5608 | NL80211_TXRATE_FORCE_LGI, |
| 5526 | }; | 5609 | }; |
| 5527 | 5610 | ||
| 5611 | #define NL80211_EHT_NSS_MAX 16 | ||
| 5612 | /** | ||
| 5613 | * struct nl80211_txrate_eht - EHT MCS/NSS txrate bitmap | ||
| 5614 | * @mcs: MCS bitmap table for each NSS (array index 0 for 1 stream, etc.) | ||
| 5615 | */ | ||
| 5616 | struct nl80211_txrate_eht { | ||
| 5617 | __u16 mcs[NL80211_EHT_NSS_MAX]; | ||
| 5618 | }; | ||
| 5619 | |||
| 5528 | /** | 5620 | /** |
| 5529 | * enum nl80211_band - Frequency band | 5621 | * enum nl80211_band - Frequency band |
| 5530 | * @NL80211_BAND_2GHZ: 2.4 GHz ISM band | 5622 | * @NL80211_BAND_2GHZ: 2.4 GHz ISM band |
| @@ -6649,6 +6741,9 @@ enum nl80211_feature_flags { · 1118 unmodified lines | |||
| 6649 | * (signaling and payload protected) A-MSDUs and this shall be advertised | 6741 | * (signaling and payload protected) A-MSDUs and this shall be advertised |
| 6650 | * in the RSNXE. | 6742 | * in the RSNXE. |
| 6651 | * | 6743 | * |
| 6744 | * @NL80211_EXT_FEATURE_BEACON_RATE_EHT: Driver supports beacon rate | ||
| 6745 | * configuration (AP/mesh) with EHT rates. | ||
| 6746 | * | ||
| 6652 | * @NUM_NL80211_EXT_FEATURES: number of extended features. | 6747 | * @NUM_NL80211_EXT_FEATURES: number of extended features. |
| 6653 | * @MAX_NL80211_EXT_FEATURES: highest extended feature index. | 6748 | * @MAX_NL80211_EXT_FEATURES: highest extended feature index. |
| 6654 | */ | 6749 | */ |
| @@ -6724,6 +6819,7 @@ enum nl80211_ext_feature_index { · 69 unmodified lines | |||
| 6724 | NL80211_EXT_FEATURE_OWE_OFFLOAD_AP, | 6819 | NL80211_EXT_FEATURE_OWE_OFFLOAD_AP, |
| 6725 | NL80211_EXT_FEATURE_DFS_CONCURRENT, | 6820 | NL80211_EXT_FEATURE_DFS_CONCURRENT, |
| 6726 | NL80211_EXT_FEATURE_SPP_AMSDU_SUPPORT, | 6821 | NL80211_EXT_FEATURE_SPP_AMSDU_SUPPORT, |
| 6822 | NL80211_EXT_FEATURE_BEACON_RATE_EHT, | ||
| 6727 | 6823 | ||
| 6728 | /* add new features before the definition below */ | 6824 | /* add new features before the definition below */ |
| 6729 | NUM_NL80211_EXT_FEATURES, | 6825 | NUM_NL80211_EXT_FEATURES, |
| @@ -7278,6 +7374,105 @@ enum nl80211_nan_match_attributes { · 548 unmodified lines | |||
| 7278 | NL80211_NAN_MATCH_ATTR_MAX = NUM_NL80211_NAN_MATCH_ATTR - 1 | 7374 | NL80211_NAN_MATCH_ATTR_MAX = NUM_NL80211_NAN_MATCH_ATTR - 1 |
| 7279 | }; | 7375 | }; |
| 7280 | 7376 | ||
| 7377 | /** | ||
| 7378 | * enum nl80211_nan_band_conf_attributes - NAN band configuration attributes | ||
| 7379 | * @__NL80211_NAN_BAND_CONF_INVALID: Invalid. | ||
| 7380 | * @NL80211_NAN_BAND_CONF_BAND: Band for which the configuration is | ||
| 7381 | * being set. The value is according to &enum nl80211_band (u8). | ||
| 7382 | * @NL80211_NAN_BAND_CONF_FREQ: Discovery frequency. This attribute shall not | ||
| 7383 | * be present on 2.4 GHZ band. On 5 GHz band its presence is optional. | ||
| 7384 | * The allowed values are 5220 (channel 44) or 5745 (channel 149). | ||
| 7385 | * If not present, channel 149 is used if allowed, otherwise channel 44 | ||
| 7386 | * will be selected. The value is in MHz (u16). | ||
| 7387 | * @NL80211_NAN_BAND_CONF_RSSI_CLOSE: RSSI close threshold used for NAN state | ||
| 7388 | * transition algorithm as described in chapters 3.3.6 and 3.3.7 "NAN | ||
| 7389 | * Device Role and State Transition" of Wi-Fi Aware (TM) Specification | ||
| 7390 | * v4.0. If not specified, default device value is used. The value should | ||
| 7391 | * be greater than -60 dBm (s8). | ||
| 7392 | * @NL80211_NAN_BAND_CONF_RSSI_MIDDLE: RSSI middle threshold used for NAN state | ||
| 7393 | * transition algorithm as described in chapters 3.3.6 and 3.3.7 "NAN | ||
| 7394 | * Device Role and State Transition" of Wi-Fi Aware (TM) Specification | ||
| 7395 | * v4.0. If not present, default device value is used. The value should be | ||
| 7396 | * greater than -75 dBm and less than %NL80211_NAN_BAND_CONF_RSSI_CLOSE | ||
| 7397 | * (s8). | ||
| 7398 | * @NL80211_NAN_BAND_CONF_WAKE_DW: Committed DW information (values 0-5). | ||
| 7399 | * Value 0 means that the device will not wake up during the | ||
| 7400 | * discovery window. Values 1-5 mean that the device will wake up | ||
| 7401 | * during each 2^(n - 1) discovery window, where n is the value of | ||
| 7402 | * this attribute. Setting this attribute to 0 is not allowed on | ||
| 7403 | * 2.4 GHz band (u8). This is an optional parameter (default is 1). | ||
| 7404 | * @NL80211_NAN_BAND_CONF_DISABLE_SCAN: Optional flag attribute to disable | ||
| 7405 | * scanning (for cluster merge) on the band. If set, the device will not | ||
| 7406 | * scan on this band anymore. Disabling scanning on 2.4 GHz band is not | ||
| 7407 | * allowed. | ||
| 7408 | * @NUM_NL80211_NAN_BAND_CONF_ATTR: Internal. | ||
| 7409 | * @NL80211_NAN_BAND_CONF_ATTR_MAX: Highest NAN band configuration attribute. | ||
| 7410 | * | ||
| 7411 | * These attributes are used to configure NAN band-specific parameters. Note, | ||
| 7412 | * that both RSSI attributes should be configured (or both left unset). | ||
| 7413 | */ | ||
| 7414 | enum nl80211_nan_band_conf_attributes { | ||
| 7415 | __NL80211_NAN_BAND_CONF_INVALID, | ||
| 7416 | NL80211_NAN_BAND_CONF_BAND, | ||
| 7417 | NL80211_NAN_BAND_CONF_FREQ, | ||
| 7418 | NL80211_NAN_BAND_CONF_RSSI_CLOSE, | ||
| 7419 | NL80211_NAN_BAND_CONF_RSSI_MIDDLE, | ||
| 7420 | NL80211_NAN_BAND_CONF_WAKE_DW, | ||
| 7421 | NL80211_NAN_BAND_CONF_DISABLE_SCAN, | ||
| 7422 | |||
| 7423 | /* keep last */ | ||
| 7424 | NUM_NL80211_NAN_BAND_CONF_ATTR, | ||
| 7425 | NL80211_NAN_BAND_CONF_ATTR_MAX = NUM_NL80211_NAN_BAND_CONF_ATTR - 1, | ||
| 7426 | }; | ||
| 7427 | |||
| 7428 | /** | ||
| 7429 | * enum nl80211_nan_conf_attributes - NAN configuration attributes | ||
| 7430 | * @__NL80211_NAN_CONF_INVALID: Invalid attribute, used for validation. | ||
| 7431 | * @NL80211_NAN_CONF_CLUSTER_ID: ID for the NAN cluster. This is a MAC | ||
| 7432 | * address that can take values from 50-6F-9A-01-00-00 to | ||
| 7433 | * 50-6F-9A-01-FF-FF. This attribute is optional. If not present, | ||
| 7434 | * a random Cluster ID will be chosen. | ||
| 7435 | * @NL80211_NAN_CONF_EXTRA_ATTRS: Additional NAN attributes to be | ||
| 7436 | * published in the beacons. This is an optional byte array. | ||
| 7437 | * @NL80211_NAN_CONF_VENDOR_ELEMS: Vendor-specific elements that will | ||
| 7438 | * be published in the beacons. This is an optional byte array. | ||
| 7439 | * @NL80211_NAN_CONF_BAND_CONFIGS: This is a nested array attribute, | ||
| 7440 | * containing multiple entries for each supported band. Each band | ||
| 7441 | * configuration consists of &enum nl80211_nan_band_conf_attributes. | ||
| 7442 | * @NL80211_NAN_CONF_SCAN_PERIOD: Scan period in seconds. If not configured, | ||
| 7443 | * device default is used. Zero value will disable scanning. | ||
| 7444 | * This is u16 (optional). | ||
| 7445 | * @NL80211_NAN_CONF_SCAN_DWELL_TIME: Scan dwell time in TUs per channel. | ||
| 7446 | * Only non-zero values are valid. If not configured the device default | ||
| 7447 | * value is used. This is u16 (optional) | ||
| 7448 | * @NL80211_NAN_CONF_DISCOVERY_BEACON_INTERVAL: Discovery beacon interval | ||
| 7449 | * in TUs. Valid range is 50-200 TUs. If not configured the device default | ||
| 7450 | * value is used. This is u8 (optional) | ||
| 7451 | * @NL80211_NAN_CONF_NOTIFY_DW: If set, the driver will notify userspace about | ||
| 7452 | * the upcoming discovery window with | ||
| 7453 | * %NL80211_CMD_NAN_NEXT_DW_NOTIFICATION. | ||
| 7454 | * This is a flag attribute. | ||
| 7455 | * @NUM_NL80211_NAN_CONF_ATTR: Internal. | ||
| 7456 | * @NL80211_NAN_CONF_ATTR_MAX: Highest NAN configuration attribute. | ||
| 7457 | * | ||
| 7458 | * These attributes are used to configure NAN-specific parameters. | ||
| 7459 | */ | ||
| 7460 | enum nl80211_nan_conf_attributes { | ||
| 7461 | __NL80211_NAN_CONF_INVALID, | ||
| 7462 | NL80211_NAN_CONF_CLUSTER_ID, | ||
| 7463 | NL80211_NAN_CONF_EXTRA_ATTRS, | ||
| 7464 | NL80211_NAN_CONF_VENDOR_ELEMS, | ||
| 7465 | NL80211_NAN_CONF_BAND_CONFIGS, | ||
| 7466 | NL80211_NAN_CONF_SCAN_PERIOD, | ||
| 7467 | NL80211_NAN_CONF_SCAN_DWELL_TIME, | ||
| 7468 | NL80211_NAN_CONF_DISCOVERY_BEACON_INTERVAL, | ||
| 7469 | NL80211_NAN_CONF_NOTIFY_DW, | ||
| 7470 | |||
| 7471 | /* keep last */ | ||
| 7472 | NUM_NL80211_NAN_CONF_ATTR, | ||
| 7473 | NL80211_NAN_CONF_ATTR_MAX = NUM_NL80211_NAN_CONF_ATTR - 1, | ||
| 7474 | }; | ||
| 7475 | |||
| 7281 | /** | 7476 | /** |
| 7282 | * enum nl80211_external_auth_action - Action to perform with external | 7477 | * enum nl80211_external_auth_action - Action to perform with external |
| 7283 | * authentication request. Used by NL80211_ATTR_EXTERNAL_AUTH_ACTION. | 7478 | * authentication request. Used by NL80211_ATTR_EXTERNAL_AUTH_ACTION. |
| @@ -8187,4 +8382,54 @@ enum nl80211_s1g_short_beacon_attrs { · 903 unmodified lines | |||
| 8187 | __NL80211_S1G_SHORT_BEACON_ATTR_LAST - 1 | 8382 | __NL80211_S1G_SHORT_BEACON_ATTR_LAST - 1 |
| 8188 | }; | 8383 | }; |
| 8189 | 8384 | ||
| 8385 | /** | ||
| 8386 | * enum nl80211_nan_capabilities - NAN (Neighbor Aware Networking) | ||
| 8387 | * capabilities. | ||
| 8388 | * | ||
| 8389 | * @__NL80211_NAN_CAPABILITIES_INVALID: Invalid. | ||
| 8390 | * @NL80211_NAN_CAPA_CONFIGURABLE_SYNC: Flag attribute indicating that | ||
| 8391 | * the device supports configurable synchronization. If set, the device | ||
| 8392 | * should be able to handle %NL80211_ATTR_NAN_CONFIG | ||
| 8393 | * attribute in the %NL80211_CMD_START_NAN (and change) command. | ||
| 8394 | * @NL80211_NAN_CAPA_USERSPACE_DE: Flag attribute indicating that | ||
| 8395 | * NAN Discovery Engine (DE) is not offloaded and the driver assumes | ||
| 8396 | * user space DE implementation. When set, %NL80211_CMD_ADD_NAN_FUNCTION, | ||
| 8397 | * %NL80211_CMD_DEL_NAN_FUNCTION and %NL80211_CMD_NAN_MATCH commands | ||
| 8398 | * should not be used. In addition, the device/driver should support | ||
| 8399 | * sending discovery window (DW) notifications using | ||
| 8400 | * %NL80211_CMD_NAN_NEXT_DW_NOTIFICATION and handling transmission and | ||
| 8401 | * reception of NAN SDF frames on NAN device interface during DW windows. | ||
| 8402 | * (%NL80211_CMD_FRAME is used to transmit SDFs) | ||
| 8403 | * @NL80211_NAN_CAPA_OP_MODE: u8 attribute indicating the supported operation | ||
| 8404 | * modes as defined in Wi-Fi Aware (TM) specification Table 81 (Operation | ||
| 8405 | * Mode field format). | ||
| 8406 | * @NL80211_NAN_CAPA_NUM_ANTENNAS: u8 attribute indicating the number of | ||
| 8407 | * TX and RX antennas supported by the device. Lower nibble indicates | ||
| 8408 | * the number of TX antennas and upper nibble indicates the number of RX | ||
| 8409 | * antennas. Value 0 indicates the information is not available. | ||
| 8410 | * See table 79 of Wi-Fi Aware (TM) specification (Number of | ||
| 8411 | * Antennas field). | ||
| 8412 | * @NL80211_NAN_CAPA_MAX_CHANNEL_SWITCH_TIME: u16 attribute indicating the | ||
| 8413 | * maximum time in microseconds that the device requires to switch | ||
| 8414 | * channels. | ||
| 8415 | * @NL80211_NAN_CAPA_CAPABILITIES: u8 attribute containing the | ||
| 8416 | * capabilities of the device as defined in Wi-Fi Aware (TM) | ||
| 8417 | * specification Table 79 (Capabilities field). | ||
| 8418 | * @__NL80211_NAN_CAPABILITIES_LAST: Internal | ||
| 8419 | * @NL80211_NAN_CAPABILITIES_MAX: Highest NAN capability attribute. | ||
| 8420 | */ | ||
| 8421 | enum nl80211_nan_capabilities { | ||
| 8422 | __NL80211_NAN_CAPABILITIES_INVALID, | ||
| 8423 | |||
| 8424 | NL80211_NAN_CAPA_CONFIGURABLE_SYNC, | ||
| 8425 | NL80211_NAN_CAPA_USERSPACE_DE, | ||
| 8426 | NL80211_NAN_CAPA_OP_MODE, | ||
| 8427 | NL80211_NAN_CAPA_NUM_ANTENNAS, | ||
| 8428 | NL80211_NAN_CAPA_MAX_CHANNEL_SWITCH_TIME, | ||
| 8429 | NL80211_NAN_CAPA_CAPABILITIES, | ||
| 8430 | /* keep last */ | ||
| 8431 | __NL80211_NAN_CAPABILITIES_LAST, | ||
| 8432 | NL80211_NAN_CAPABILITIES_MAX = __NL80211_NAN_CAPABILITIES_LAST - 1, | ||
| 8433 | }; | ||
| 8434 | |||
| 8190 | #endif /* __LINUX_NL80211_H */ | 8435 | #endif /* __LINUX_NL80211_H */ |
| @@ -16,8 +16,6 @@ · 15 unmodified lines | |||
| 16 | #define NS_GET_NSTYPE _IO(NSIO, 0x3) | 16 | #define NS_GET_NSTYPE _IO(NSIO, 0x3) |
| 17 | /* Get owner UID (in the caller's user namespace) for a user namespace */ | 17 | /* Get owner UID (in the caller's user namespace) for a user namespace */ |
| 18 | #define NS_GET_OWNER_UID _IO(NSIO, 0x4) | 18 | #define NS_GET_OWNER_UID _IO(NSIO, 0x4) |
| 19 | /* Get the id for a mount namespace */ | ||
| 20 | #define NS_GET_MNTNS_ID _IOR(NSIO, 0x5, __u64) | ||
| 21 | /* Translate pid from target pid namespace into the caller's pid namespace. */ | 19 | /* Translate pid from target pid namespace into the caller's pid namespace. */ |
| 22 | #define NS_GET_PID_FROM_PIDNS _IOR(NSIO, 0x6, int) | 20 | #define NS_GET_PID_FROM_PIDNS _IOR(NSIO, 0x6, int) |
| 23 | /* Return thread-group leader id of pid in the callers pid namespace. */ | 21 | /* Return thread-group leader id of pid in the callers pid namespace. */ |
| @@ -42,6 +40,10 @@ struct mnt_ns_info { · 18 unmodified lines | |||
| 42 | /* Get previous namespace. */ | 40 | /* Get previous namespace. */ |
| 43 | #define NS_MNT_GET_PREV _IOR(NSIO, 12, struct mnt_ns_info) | 41 | #define NS_MNT_GET_PREV _IOR(NSIO, 12, struct mnt_ns_info) |
| 44 | 42 | ||
| 43 | /* Retrieve namespace identifiers. */ | ||
| 44 | #define NS_GET_MNTNS_ID _IOR(NSIO, 5, __u64) | ||
| 45 | #define NS_GET_ID _IOR(NSIO, 13, __u64) | ||
| 46 | |||
| 45 | enum init_ns_ino { | 47 | enum init_ns_ino { |
| 46 | IPC_NS_INIT_INO = 0xEFFFFFFFU, | 48 | IPC_NS_INIT_INO = 0xEFFFFFFFU, |
| 47 | UTS_NS_INIT_INO = 0xEFFFFFFEU, | 49 | UTS_NS_INIT_INO = 0xEFFFFFFEU, |
| @@ -51,6 +53,18 @@ enum init_ns_ino { · 3 unmodified lines | |||
| 51 | TIME_NS_INIT_INO = 0xEFFFFFFAU, | 53 | TIME_NS_INIT_INO = 0xEFFFFFFAU, |
| 52 | NET_NS_INIT_INO = 0xEFFFFFF9U, | 54 | NET_NS_INIT_INO = 0xEFFFFFF9U, |
| 53 | MNT_NS_INIT_INO = 0xEFFFFFF8U, | 55 | MNT_NS_INIT_INO = 0xEFFFFFF8U, |
| 56 | #ifdef __KERNEL__ | ||
| 57 | MNT_NS_ANON_INO = 0xEFFFFFF7U, | ||
| 58 | #endif | ||
| 59 | }; | ||
| 60 | |||
| 61 | struct nsfs_file_handle { | ||
| 62 | __u64 ns_id; | ||
| 63 | __u32 ns_type; | ||
| 64 | __u32 ns_inum; | ||
| 54 | }; | 65 | }; |
| 55 | 66 | ||
| 67 | #define NSFS_FILE_HANDLE_SIZE_VER0 16 /* sizeof first published struct */ | ||
| 68 | #define NSFS_FILE_HANDLE_SIZE_LATEST sizeof(struct nsfs_file_handle) /* sizeof latest published struct */ | ||
| 69 | |||
| 56 | #endif /* __LINUX_NSFS_H */ | 70 | #endif /* __LINUX_NSFS_H */ |
| @@ -207,6 +207,9 @@ · 206 unmodified lines | |||
| 207 | 207 | ||
| 208 | /* Capability lists */ | 208 | /* Capability lists */ |
| 209 | 209 | ||
| 210 | #define PCI_CAP_ID_MASK 0x00ff /* Capability ID mask */ | ||
| 211 | #define PCI_CAP_LIST_NEXT_MASK 0xff00 /* Next Capability Pointer mask */ | ||
| 212 | |||
| 210 | #define PCI_CAP_LIST_ID 0 /* Capability ID */ | 213 | #define PCI_CAP_LIST_ID 0 /* Capability ID */ |
| 211 | #define PCI_CAP_ID_PM 0x01 /* Power Management */ | 214 | #define PCI_CAP_ID_PM 0x01 /* Power Management */ |
| 212 | #define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ | 215 | #define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */ |
| @@ -776,6 +779,12 @@ · 563 unmodified lines | |||
| 776 | #define PCI_ERR_UNC_MCBTLP 0x00800000 /* MC blocked TLP */ | 779 | #define PCI_ERR_UNC_MCBTLP 0x00800000 /* MC blocked TLP */ |
| 777 | #define PCI_ERR_UNC_ATOMEG 0x01000000 /* Atomic egress blocked */ | 780 | #define PCI_ERR_UNC_ATOMEG 0x01000000 /* Atomic egress blocked */ |
| 778 | #define PCI_ERR_UNC_TLPPRE 0x02000000 /* TLP prefix blocked */ | 781 | #define PCI_ERR_UNC_TLPPRE 0x02000000 /* TLP prefix blocked */ |
| 782 | #define PCI_ERR_UNC_POISON_BLK 0x04000000 /* Poisoned TLP Egress Blocked */ | ||
| 783 | #define PCI_ERR_UNC_DMWR_BLK 0x08000000 /* DMWr Request Egress Blocked */ | ||
| 784 | #define PCI_ERR_UNC_IDE_CHECK 0x10000000 /* IDE Check Failed */ | ||
| 785 | #define PCI_ERR_UNC_MISR_IDE 0x20000000 /* Misrouted IDE TLP */ | ||
| 786 | #define PCI_ERR_UNC_PCRC_CHECK 0x40000000 /* PCRC Check Failed */ | ||
| 787 | #define PCI_ERR_UNC_XLAT_BLK 0x80000000 /* TLP Translation Egress Blocked */ | ||
| 779 | #define PCI_ERR_UNCOR_MASK 0x08 /* Uncorrectable Error Mask */ | 788 | #define PCI_ERR_UNCOR_MASK 0x08 /* Uncorrectable Error Mask */ |
| 780 | /* Same bits as above */ | 789 | /* Same bits as above */ |
| 781 | #define PCI_ERR_UNCOR_SEVER 0x0c /* Uncorrectable Error Severity */ | 790 | #define PCI_ERR_UNCOR_SEVER 0x0c /* Uncorrectable Error Severity */ |
| @@ -798,6 +807,7 @@ · 16 unmodified lines | |||
| 798 | #define PCI_ERR_CAP_ECRC_CHKC 0x00000080 /* ECRC Check Capable */ | 807 | #define PCI_ERR_CAP_ECRC_CHKC 0x00000080 /* ECRC Check Capable */ |
| 799 | #define PCI_ERR_CAP_ECRC_CHKE 0x00000100 /* ECRC Check Enable */ | 808 | #define PCI_ERR_CAP_ECRC_CHKE 0x00000100 /* ECRC Check Enable */ |
| 800 | #define PCI_ERR_CAP_PREFIX_LOG_PRESENT 0x00000800 /* TLP Prefix Log Present */ | 809 | #define PCI_ERR_CAP_PREFIX_LOG_PRESENT 0x00000800 /* TLP Prefix Log Present */ |
| 810 | #define PCI_ERR_CAP_COMP_TIME_LOG 0x00001000 /* Completion Timeout Prefix/Header Log Capable */ | ||
| 801 | #define PCI_ERR_CAP_TLP_LOG_FLIT 0x00040000 /* TLP was logged in Flit Mode */ | 811 | #define PCI_ERR_CAP_TLP_LOG_FLIT 0x00040000 /* TLP was logged in Flit Mode */ |
| 802 | #define PCI_ERR_CAP_TLP_LOG_SIZE 0x00f80000 /* Logged TLP Size (only in Flit mode) */ | 812 | #define PCI_ERR_CAP_TLP_LOG_SIZE 0x00f80000 /* Logged TLP Size (only in Flit mode) */ |
| 803 | #define PCI_ERR_HEADER_LOG 0x1c /* Header Log Register (16 bytes) */ | 813 | #define PCI_ERR_HEADER_LOG 0x1c /* Header Log Register (16 bytes) */ |
| @@ -177,7 +177,17 @@ struct prctl_mm_map { · 176 unmodified lines | |||
| 177 | 177 | ||
| 178 | #define PR_GET_TID_ADDRESS 40 | 178 | #define PR_GET_TID_ADDRESS 40 |
| 179 | 179 | ||
| 180 | /* | ||
| 181 | * Flags for PR_SET_THP_DISABLE are only applicable when disabling. Bit 0 | ||
| 182 | * is reserved, so PR_GET_THP_DISABLE can return "1 | flags", to effectively | ||
| 183 | * return "1" when no flags were specified for PR_SET_THP_DISABLE. | ||
| 184 | */ | ||
| 180 | #define PR_SET_THP_DISABLE 41 | 185 | #define PR_SET_THP_DISABLE 41 |
| 186 | /* | ||
| 187 | * Don't disable THPs when explicitly advised (e.g., MADV_HUGEPAGE / | ||
| 188 | * VM_HUGEPAGE, MADV_COLLAPSE). | ||
| 189 | */ | ||
| 190 | # define PR_THP_DISABLE_EXCEPT_ADVISED (1 << 1) | ||
| 181 | #define PR_GET_THP_DISABLE 42 | 191 | #define PR_GET_THP_DISABLE 42 |
| 182 | 192 | ||
| 183 | /* | 193 | /* |
| @@ -185,6 +185,10 @@ struct sev_user_data_get_id2 { · 184 unmodified lines | |||
| 185 | * @mask_chip_id: whether chip id is present in attestation reports or not | 185 | * @mask_chip_id: whether chip id is present in attestation reports or not |
| 186 | * @mask_chip_key: whether attestation reports are signed or not | 186 | * @mask_chip_key: whether attestation reports are signed or not |
| 187 | * @vlek_en: VLEK (Version Loaded Endorsement Key) hashstick is loaded | 187 | * @vlek_en: VLEK (Version Loaded Endorsement Key) hashstick is loaded |
| 188 | * @feature_info: whether SNP_FEATURE_INFO command is available | ||
| 189 | * @rapl_dis: whether RAPL is disabled | ||
| 190 | * @ciphertext_hiding_cap: whether platform has ciphertext hiding capability | ||
| 191 | * @ciphertext_hiding_en: whether ciphertext hiding is enabled | ||
| 188 | * @rsvd1: reserved | 192 | * @rsvd1: reserved |
| 189 | * @guest_count: the number of guest currently managed by the firmware | 193 | * @guest_count: the number of guest currently managed by the firmware |
| 190 | * @current_tcb_version: current TCB version | 194 | * @current_tcb_version: current TCB version |
| @@ -200,7 +204,11 @@ struct sev_user_data_snp_status { · 9 unmodified lines | |||
| 200 | __u32 mask_chip_id:1; /* Out */ | 204 | __u32 mask_chip_id:1; /* Out */ |
| 201 | __u32 mask_chip_key:1; /* Out */ | 205 | __u32 mask_chip_key:1; /* Out */ |
| 202 | __u32 vlek_en:1; /* Out */ | 206 | __u32 vlek_en:1; /* Out */ |
| 203 | __u32 rsvd1:29; | 207 | __u32 feature_info:1; /* Out */ |
| 208 | __u32 rapl_dis:1; /* Out */ | ||
| 209 | __u32 ciphertext_hiding_cap:1; /* Out */ | ||
| 210 | __u32 ciphertext_hiding_en:1; /* Out */ | ||
| 211 | __u32 rsvd1:25; | ||
| 204 | __u32 guest_count; /* Out */ | 212 | __u32 guest_count; /* Out */ |
| 205 | __u64 current_tcb_version; /* Out */ | 213 | __u64 current_tcb_version; /* Out */ |
| 206 | __u64 reported_tcb_version; /* Out */ | 214 | __u64 reported_tcb_version; /* Out */ |
| @@ -0,0 +1,87 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ | ||
| 2 | /* | ||
| 3 | * Userspace interface for AMD Seamless Firmware Servicing (SFS) | ||
| 4 | * | ||
| 5 | * Copyright (C) 2025 Advanced Micro Devices, Inc. | ||
| 6 | * | ||
| 7 | * Author: Ashish Kalra <ashish.kalra@amd.com> | ||
| 8 | */ | ||
| 9 | |||
| 10 | #ifndef __PSP_SFS_USER_H__ | ||
| 11 | #define __PSP_SFS_USER_H__ | ||
| 12 | |||
| 13 | #include <linux/types.h> | ||
| 14 | |||
| 15 | /** | ||
| 16 | * SFS: AMD Seamless Firmware Support (SFS) interface | ||
| 17 | */ | ||
| 18 | |||
| 19 | #define PAYLOAD_NAME_SIZE 64 | ||
| 20 | #define TEE_EXT_CMD_BUFFER_SIZE 4096 | ||
| 21 | |||
| 22 | /** | ||
| 23 | * struct sfs_user_get_fw_versions - get current level of base firmware (output). | ||
| 24 | * @blob: current level of base firmware for ASP and patch levels (input/output). | ||
| 25 | * @sfs_status: 32-bit SFS status value (output). | ||
| 26 | * @sfs_extended_status: 32-bit SFS extended status value (output). | ||
| 27 | */ | ||
| 28 | struct sfs_user_get_fw_versions { | ||
| 29 | __u8 blob[TEE_EXT_CMD_BUFFER_SIZE]; | ||
| 30 | __u32 sfs_status; | ||
| 31 | __u32 sfs_extended_status; | ||
| 32 | } __packed; | ||
| 33 | |||
| 34 | /** | ||
| 35 | * struct sfs_user_update_package - update SFS package (input). | ||
| 36 | * @payload_name: name of SFS package to load, verify and execute (input). | ||
| 37 | * @sfs_status: 32-bit SFS status value (output). | ||
| 38 | * @sfs_extended_status: 32-bit SFS extended status value (output). | ||
| 39 | */ | ||
| 40 | struct sfs_user_update_package { | ||
| 41 | char payload_name[PAYLOAD_NAME_SIZE]; | ||
| 42 | __u32 sfs_status; | ||
| 43 | __u32 sfs_extended_status; | ||
| 44 | } __packed; | ||
| 45 | |||
| 46 | /** | ||
| 47 | * Seamless Firmware Support (SFS) IOC | ||
| 48 | * | ||
| 49 | * possible return codes for all SFS IOCTLs: | ||
| 50 | * 0: success | ||
| 51 | * -EINVAL: invalid input | ||
| 52 | * -E2BIG: excess data passed | ||
| 53 | * -EFAULT: failed to copy to/from userspace | ||
| 54 | * -EBUSY: mailbox in recovery or in use | ||
| 55 | * -ENODEV: driver not bound with PSP device | ||
| 56 | * -EACCES: request isn't authorized | ||
| 57 | * -EINVAL: invalid parameter | ||
| 58 | * -ETIMEDOUT: request timed out | ||
| 59 | * -EAGAIN: invalid request for state machine | ||
| 60 | * -ENOENT: not implemented | ||
| 61 | * -ENFILE: overflow | ||
| 62 | * -EPERM: invalid signature | ||
| 63 | * -EIO: PSP I/O error | ||
| 64 | */ | ||
| 65 | #define SFS_IOC_TYPE 'S' | ||
| 66 | |||
| 67 | /** | ||
| 68 | * SFSIOCFWVERS - returns blob containing FW versions | ||
| 69 | * ASP provides the current level of Base Firmware for the ASP | ||
| 70 | * and the other microprocessors as well as current patch | ||
| 71 | * level(s). | ||
| 72 | */ | ||
| 73 | #define SFSIOCFWVERS _IOWR(SFS_IOC_TYPE, 0x1, struct sfs_user_get_fw_versions) | ||
| 74 | |||
| 75 | /** | ||
| 76 | * SFSIOCUPDATEPKG - updates package/payload | ||
| 77 | * ASP loads, verifies and executes the SFS package. | ||
| 78 | * By default, the SFS package/payload is loaded from | ||
| 79 | * /lib/firmware/amd, but alternative firmware loading | ||
| 80 | * path can be specified using kernel parameter | ||
| 81 | * firmware_class.path or the firmware loading path | ||
| 82 | * can be customized using sysfs file: | ||
| 83 | * /sys/module/firmware_class/parameters/path. | ||
| 84 | */ | ||
| 85 | #define SFSIOCUPDATEPKG _IOWR(SFS_IOC_TYPE, 0x2, struct sfs_user_update_package) | ||
| 86 | |||
| 87 | #endif /* __PSP_SFS_USER_H__ */ | ||
| @@ -0,0 +1,66 @@ | |||
| 1 | /* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */ | ||
| 2 | /* Do not edit directly, auto-generated from: */ | ||
| 3 | /* Documentation/netlink/specs/psp.yaml */ | ||
| 4 | /* YNL-GEN uapi header */ | ||
| 5 | |||
| 6 | #ifndef _UAPI_LINUX_PSP_H | ||
| 7 | #define _UAPI_LINUX_PSP_H | ||
| 8 | |||
| 9 | #define PSP_FAMILY_NAME "psp" | ||
| 10 | #define PSP_FAMILY_VERSION 1 | ||
| 11 | |||
| 12 | enum psp_version { | ||
| 13 | PSP_VERSION_HDR0_AES_GCM_128, | ||
| 14 | PSP_VERSION_HDR0_AES_GCM_256, | ||
| 15 | PSP_VERSION_HDR0_AES_GMAC_128, | ||
| 16 | PSP_VERSION_HDR0_AES_GMAC_256, | ||
| 17 | }; | ||
| 18 | |||
| 19 | enum { | ||
| 20 | PSP_A_DEV_ID = 1, | ||
| 21 | PSP_A_DEV_IFINDEX, | ||
| 22 | PSP_A_DEV_PSP_VERSIONS_CAP, | ||
| 23 | PSP_A_DEV_PSP_VERSIONS_ENA, | ||
| 24 | |||
| 25 | __PSP_A_DEV_MAX, | ||
| 26 | PSP_A_DEV_MAX = (__PSP_A_DEV_MAX - 1) | ||
| 27 | }; | ||
| 28 | |||
| 29 | enum { | ||
| 30 | PSP_A_ASSOC_DEV_ID = 1, | ||
| 31 | PSP_A_ASSOC_VERSION, | ||
| 32 | PSP_A_ASSOC_RX_KEY, | ||
| 33 | PSP_A_ASSOC_TX_KEY, | ||
| 34 | PSP_A_ASSOC_SOCK_FD, | ||
| 35 | |||
| 36 | __PSP_A_ASSOC_MAX, | ||
| 37 | PSP_A_ASSOC_MAX = (__PSP_A_ASSOC_MAX - 1) | ||
| 38 | }; | ||
| 39 | |||
| 40 | enum { | ||
| 41 | PSP_A_KEYS_KEY = 1, | ||
| 42 | PSP_A_KEYS_SPI, | ||
| 43 | |||
| 44 | __PSP_A_KEYS_MAX, | ||
| 45 | PSP_A_KEYS_MAX = (__PSP_A_KEYS_MAX - 1) | ||
| 46 | }; | ||
| 47 | |||
| 48 | enum { | ||
| 49 | PSP_CMD_DEV_GET = 1, | ||
| 50 | PSP_CMD_DEV_ADD_NTF, | ||
| 51 | PSP_CMD_DEV_DEL_NTF, | ||
| 52 | PSP_CMD_DEV_SET, | ||
| 53 | PSP_CMD_DEV_CHANGE_NTF, | ||
| 54 | PSP_CMD_KEY_ROTATE, | ||
| 55 | PSP_CMD_KEY_ROTATE_NTF, | ||
| 56 | PSP_CMD_RX_ASSOC, | ||
| 57 | PSP_CMD_TX_ASSOC, | ||
| 58 | |||
| 59 | __PSP_CMD_MAX, | ||
| 60 | PSP_CMD_MAX = (__PSP_CMD_MAX - 1) | ||
| 61 | }; | ||
| 62 | |||
| 63 | #define PSP_MCGRP_MGMT "mgmt" | ||
| 64 | #define PSP_MCGRP_USE "use" | ||
| 65 | |||
| 66 | #endif /* _UAPI_LINUX_PSP_H */ | ||
| @@ -37,6 +37,9 @@ · 36 unmodified lines | |||
| 37 | 37 | ||
| 38 | /* | 38 | /* |
| 39 | * flag fields valid for the new PTP_EXTTS_REQUEST2 ioctl. | 39 | * flag fields valid for the new PTP_EXTTS_REQUEST2 ioctl. |
| 40 | * | ||
| 41 | * Note: PTP_STRICT_FLAGS is always enabled by the kernel for | ||
| 42 | * PTP_EXTTS_REQUEST2 regardless of whether it is set by userspace. | ||
| 40 | */ | 43 | */ |
| 41 | #define PTP_EXTTS_VALID_FLAGS (PTP_ENABLE_FEATURE | \ | 44 | #define PTP_EXTTS_VALID_FLAGS (PTP_ENABLE_FEATURE | \ |
| 42 | PTP_RISING_EDGE | \ | 45 | PTP_RISING_EDGE | \ |
| @@ -245,6 +248,10 @@ struct ptp_pin_desc { · 202 unmodified lines | |||
| 245 | _IOWR(PTP_CLK_MAGIC, 18, struct ptp_sys_offset_extended) | 248 | _IOWR(PTP_CLK_MAGIC, 18, struct ptp_sys_offset_extended) |
| 246 | #define PTP_MASK_CLEAR_ALL _IO(PTP_CLK_MAGIC, 19) | 249 | #define PTP_MASK_CLEAR_ALL _IO(PTP_CLK_MAGIC, 19) |
| 247 | #define PTP_MASK_EN_SINGLE _IOW(PTP_CLK_MAGIC, 20, unsigned int) | 250 | #define PTP_MASK_EN_SINGLE _IOW(PTP_CLK_MAGIC, 20, unsigned int) |
| 251 | #define PTP_SYS_OFFSET_PRECISE_CYCLES \ | ||
| 252 | _IOWR(PTP_CLK_MAGIC, 21, struct ptp_sys_offset_precise) | ||
| 253 | #define PTP_SYS_OFFSET_EXTENDED_CYCLES \ | ||
| 254 | _IOWR(PTP_CLK_MAGIC, 22, struct ptp_sys_offset_extended) | ||
| 248 | 255 | ||
| 249 | struct ptp_extts_event { | 256 | struct ptp_extts_event { |
| 250 | struct ptp_clock_time t; /* Time event occurred. */ | 257 | struct ptp_clock_time t; /* Time event occurred. */ |
| @@ -2,7 +2,9 @@ · 1 unmodified line | |||
| 2 | #ifndef _UAPI_LINUX_STDDEF_H | 2 | #ifndef _UAPI_LINUX_STDDEF_H |
| 3 | #define _UAPI_LINUX_STDDEF_H | 3 | #define _UAPI_LINUX_STDDEF_H |
| 4 | 4 | ||
| 5 | #ifdef __KERNEL__ | ||
| 5 | #include <linux/compiler_types.h> | 6 | #include <linux/compiler_types.h> |
| 7 | #endif | ||
| 6 | 8 | ||
| 7 | #ifndef __always_inline | 9 | #ifndef __always_inline |
| 8 | #define __always_inline inline | 10 | #define __always_inline inline |
| @@ -316,6 +316,15 @@ struct tcp_info { · 315 unmodified lines | |||
| 316 | * in milliseconds, including any | 316 | * in milliseconds, including any |
| 317 | * unfinished recovery. | 317 | * unfinished recovery. |
| 318 | */ | 318 | */ |
| 319 | __u32 tcpi_received_ce; /* # of CE marks received */ | ||
| 320 | __u32 tcpi_delivered_e1_bytes; /* Accurate ECN byte counters */ | ||
| 321 | __u32 tcpi_delivered_e0_bytes; | ||
| 322 | __u32 tcpi_delivered_ce_bytes; | ||
| 323 | __u32 tcpi_received_e1_bytes; | ||
| 324 | __u32 tcpi_received_e0_bytes; | ||
| 325 | __u32 tcpi_received_ce_bytes; | ||
| 326 | __u16 tcpi_accecn_fail_mode; | ||
| 327 | __u16 tcpi_accecn_opt_seen; | ||
| 319 | }; | 328 | }; |
| 320 | 329 | ||
| 321 | /* netlink attributes types for SCM_TIMESTAMPING_OPT_STATS */ | 330 | /* netlink attributes types for SCM_TIMESTAMPING_OPT_STATS */ |
| @@ -42,14 +42,16 @@ · 41 unmodified lines | |||
| 42 | #define TEE_IOC_MAGIC 0xa4 | 42 | #define TEE_IOC_MAGIC 0xa4 |
| 43 | #define TEE_IOC_BASE 0 | 43 | #define TEE_IOC_BASE 0 |
| 44 | 44 | ||
| 45 | #define TEE_MAX_ARG_SIZE 1024 | 45 | #define TEE_MAX_ARG_SIZE 4096 |
| 46 | 46 | ||
| 47 | #define TEE_GEN_CAP_GP (1 << 0)/* GlobalPlatform compliant TEE */ | 47 | #define TEE_GEN_CAP_GP (1 << 0)/* GlobalPlatform compliant TEE */ |
| 48 | #define TEE_GEN_CAP_PRIVILEGED (1 << 1)/* Privileged device (for supplicant) */ | 48 | #define TEE_GEN_CAP_PRIVILEGED (1 << 1)/* Privileged device (for supplicant) */ |
| 49 | #define TEE_GEN_CAP_REG_MEM (1 << 2)/* Supports registering shared memory */ | 49 | #define TEE_GEN_CAP_REG_MEM (1 << 2)/* Supports registering shared memory */ |
| 50 | #define TEE_GEN_CAP_MEMREF_NULL (1 << 3)/* NULL MemRef support */ | 50 | #define TEE_GEN_CAP_MEMREF_NULL (1 << 3)/* NULL MemRef support */ |
| 51 | #define TEE_GEN_CAP_OBJREF (1 << 4)/* Supports generic object reference */ | ||
| 51 | 52 | ||
| 52 | #define TEE_MEMREF_NULL (__u64)(-1) /* NULL MemRef Buffer */ | 53 | #define TEE_MEMREF_NULL ((__u64)(-1)) /* NULL MemRef Buffer */ |
| 54 | #define TEE_OBJREF_NULL ((__u64)(-1)) /* NULL ObjRef Object */ | ||
| 53 | 55 | ||
| 54 | /* | 56 | /* |
| 55 | * TEE Implementation ID | 57 | * TEE Implementation ID |
| @@ -57,6 +59,7 @@ · 1 unmodified line | |||
| 57 | #define TEE_IMPL_ID_OPTEE 1 | 59 | #define TEE_IMPL_ID_OPTEE 1 |
| 58 | #define TEE_IMPL_ID_AMDTEE 2 | 60 | #define TEE_IMPL_ID_AMDTEE 2 |
| 59 | #define TEE_IMPL_ID_TSTEE 3 | 61 | #define TEE_IMPL_ID_TSTEE 3 |
| 62 | #define TEE_IMPL_ID_QTEE 4 | ||
| 60 | 63 | ||
| 61 | /* | 64 | /* |
| 62 | * OP-TEE specific capabilities | 65 | * OP-TEE specific capabilities |
| @@ -151,6 +154,20 @@ struct tee_ioctl_buf_data { · 88 unmodified lines | |||
| 151 | #define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT 6 | 154 | #define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_OUTPUT 6 |
| 152 | #define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INOUT 7 /* input and output */ | 155 | #define TEE_IOCTL_PARAM_ATTR_TYPE_MEMREF_INOUT 7 /* input and output */ |
| 153 | 156 | ||
| 157 | /* | ||
| 158 | * These defines userspace buffer parameters. | ||
| 159 | */ | ||
| 160 | #define TEE_IOCTL_PARAM_ATTR_TYPE_UBUF_INPUT 8 | ||
| 161 | #define TEE_IOCTL_PARAM_ATTR_TYPE_UBUF_OUTPUT 9 | ||
| 162 | #define TEE_IOCTL_PARAM_ATTR_TYPE_UBUF_INOUT 10 /* input and output */ | ||
| 163 | |||
| 164 | /* | ||
| 165 | * These defines object reference parameters. | ||
| 166 | */ | ||
| 167 | #define TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF_INPUT 11 | ||
| 168 | #define TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF_OUTPUT 12 | ||
| 169 | #define TEE_IOCTL_PARAM_ATTR_TYPE_OBJREF_INOUT 13 | ||
| 170 | |||
| 154 | /* | 171 | /* |
| 155 | * Mask for the type part of the attribute, leaves room for more types | 172 | * Mask for the type part of the attribute, leaves room for more types |
| 156 | */ | 173 | */ |
| @@ -186,14 +203,18 @@ struct tee_ioctl_buf_data { · 29 unmodified lines | |||
| 186 | /** | 203 | /** |
| 187 | * struct tee_ioctl_param - parameter | 204 | * struct tee_ioctl_param - parameter |
| 188 | * @attr: attributes | 205 | * @attr: attributes |
| 189 | * @a: if a memref, offset into the shared memory object, else a value parameter | 206 | * @a: if a memref, offset into the shared memory object, |
| 190 | * @b: if a memref, size of the buffer, else a value parameter | 207 | * else if a ubuf, address of the user buffer, |
| 208 | * else if an objref, object identifier, else a value parameter | ||
| 209 | * @b: if a memref or ubuf, size of the buffer, | ||
| 210 | * else if objref, flags for the object, else a value parameter | ||
| 191 | * @c: if a memref, shared memory identifier, else a value parameter | 211 | * @c: if a memref, shared memory identifier, else a value parameter |
| 192 | * | 212 | * |
| 193 | * @attr & TEE_PARAM_ATTR_TYPE_MASK indicates if memref or value is used in | 213 | * @attr & TEE_PARAM_ATTR_TYPE_MASK indicates if memref, ubuf, or value is |
| 194 | * the union. TEE_PARAM_ATTR_TYPE_VALUE_* indicates value and | 214 | * used in the union. TEE_PARAM_ATTR_TYPE_VALUE_* indicates value, |
| 195 | * TEE_PARAM_ATTR_TYPE_MEMREF_* indicates memref. TEE_PARAM_ATTR_TYPE_NONE | 215 | * TEE_PARAM_ATTR_TYPE_MEMREF_* indicates memref, TEE_PARAM_ATTR_TYPE_UBUF_* |
| 196 | * indicates that none of the members are used. | 216 | * indicates ubuf, and TEE_PARAM_ATTR_TYPE_OBJREF_* indicates objref. |
| 217 | * TEE_PARAM_ATTR_TYPE_NONE indicates that none of the members are used. | ||
| 197 | * | 218 | * |
| 198 | * Shared memory is allocated with TEE_IOC_SHM_ALLOC which returns an | 219 | * Shared memory is allocated with TEE_IOC_SHM_ALLOC which returns an |
| 199 | * identifier representing the shared memory object. A memref can reference | 220 | * identifier representing the shared memory object. A memref can reference |
| @@ -378,6 +399,37 @@ struct tee_ioctl_shm_register_data { · 178 unmodified lines | |||
| 378 | __s32 id; | 399 | __s32 id; |
| 379 | }; | 400 | }; |
| 380 | 401 | ||
| 402 | /** | ||
| 403 | * struct tee_ioctl_shm_register_fd_data - Shared memory registering argument | ||
| 404 | * @fd: [in] File descriptor identifying dmabuf reference | ||
| 405 | * @size: [out] Size of referenced memory | ||
| 406 | * @flags: [in] Flags to/from allocation. | ||
| 407 | * @id: [out] Identifier of the shared memory | ||
| 408 | * | ||
| 409 | * The flags field should currently be zero as input. Updated by the call | ||
| 410 | * with actual flags as defined by TEE_IOCTL_SHM_* above. | ||
| 411 | * This structure is used as argument for TEE_IOC_SHM_REGISTER_FD below. | ||
| 412 | */ | ||
| 413 | struct tee_ioctl_shm_register_fd_data { | ||
| 414 | __s64 fd; | ||
| 415 | __u64 size; | ||
| 416 | __u32 flags; | ||
| 417 | __s32 id; | ||
| 418 | }; | ||
| 419 | |||
| 420 | /** | ||
| 421 | * TEE_IOC_SHM_REGISTER_FD - register a shared memory from a file descriptor | ||
| 422 | * | ||
| 423 | * Returns a file descriptor on success or < 0 on failure | ||
| 424 | * | ||
| 425 | * The returned file descriptor refers to the shared memory object in the | ||
| 426 | * kernel. The supplied file deccriptor can be closed if it's not needed | ||
| 427 | * for other purposes. The shared memory is freed when the descriptor is | ||
| 428 | * closed. | ||
| 429 | */ | ||
| 430 | #define TEE_IOC_SHM_REGISTER_FD _IOWR(TEE_IOC_MAGIC, TEE_IOC_BASE + 8, \ | ||
| 431 | struct tee_ioctl_shm_register_fd_data) | ||
| 432 | |||
| 381 | /** | 433 | /** |
| 382 | * TEE_IOC_SHM_REGISTER - Register shared memory argument | 434 | * TEE_IOC_SHM_REGISTER - Register shared memory argument |
| 383 | * | 435 | * |
| @@ -401,4 +453,23 @@ struct tee_ioctl_shm_register_data { · 17 unmodified lines | |||
| 401 | * munmap(): unmaps previously shared memory | 453 | * munmap(): unmaps previously shared memory |
| 402 | */ | 454 | */ |
| 403 | 455 | ||
| 456 | /** | ||
| 457 | * struct tee_ioctl_invoke_func_arg - Invokes an object in a Trusted Application | ||
| 458 | * @id: [in] Object id | ||
| 459 | * @op: [in] Object operation, specific to the object | ||
| 460 | * @ret: [out] return value | ||
| 461 | * @num_params: [in] number of parameters following this struct | ||
| 462 | */ | ||
| 463 | struct tee_ioctl_object_invoke_arg { | ||
| 464 | __u64 id; | ||
| 465 | __u32 op; | ||
| 466 | __u32 ret; | ||
| 467 | __u32 num_params; | ||
| 468 | /* num_params tells the actual number of element in params */ | ||
| 469 | struct tee_ioctl_param params[]; | ||
| 470 | }; | ||
| 471 | |||
| 472 | #define TEE_IOC_OBJECT_INVOKE _IOR(TEE_IOC_MAGIC, TEE_IOC_BASE + 10, \ | ||
| 473 | struct tee_ioctl_buf_data) | ||
| 474 | |||
| 404 | #endif /*__TEE_H*/ | 475 | #endif /*__TEE_H*/ |
| @@ -1193,7 +1193,7 @@ enum v4l2_flash_strobe_source { · 1192 unmodified lines | |||
| 1193 | #define V4L2_CID_JPEG_CLASS_BASE (V4L2_CTRL_CLASS_JPEG | 0x900) | 1193 | #define V4L2_CID_JPEG_CLASS_BASE (V4L2_CTRL_CLASS_JPEG | 0x900) |
| 1194 | #define V4L2_CID_JPEG_CLASS (V4L2_CTRL_CLASS_JPEG | 1) | 1194 | #define V4L2_CID_JPEG_CLASS (V4L2_CTRL_CLASS_JPEG | 1) |
| 1195 | 1195 | ||
| 1196 | #define V4L2_CID_JPEG_CHROMA_SUBSAMPLING (V4L2_CID_JPEG_CLASS_BASE + 1) | 1196 | #define V4L2_CID_JPEG_CHROMA_SUBSAMPLING (V4L2_CID_JPEG_CLASS_BASE + 1) |
| 1197 | enum v4l2_jpeg_chroma_subsampling { | 1197 | enum v4l2_jpeg_chroma_subsampling { |
| 1198 | V4L2_JPEG_CHROMA_SUBSAMPLING_444 = 0, | 1198 | V4L2_JPEG_CHROMA_SUBSAMPLING_444 = 0, |
| 1199 | V4L2_JPEG_CHROMA_SUBSAMPLING_422 = 1, | 1199 | V4L2_JPEG_CHROMA_SUBSAMPLING_422 = 1, |
| @@ -1202,15 +1202,15 @@ enum v4l2_jpeg_chroma_subsampling { · 2 unmodified lines | |||
| 1202 | V4L2_JPEG_CHROMA_SUBSAMPLING_410 = 4, | 1202 | V4L2_JPEG_CHROMA_SUBSAMPLING_410 = 4, |
| 1203 | V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY = 5, | 1203 | V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY = 5, |
| 1204 | }; | 1204 | }; |
| 1205 | #define V4L2_CID_JPEG_RESTART_INTERVAL (V4L2_CID_JPEG_CLASS_BASE + 2) | 1205 | #define V4L2_CID_JPEG_RESTART_INTERVAL (V4L2_CID_JPEG_CLASS_BASE + 2) |
| 1206 | #define V4L2_CID_JPEG_COMPRESSION_QUALITY (V4L2_CID_JPEG_CLASS_BASE + 3) | 1206 | #define V4L2_CID_JPEG_COMPRESSION_QUALITY (V4L2_CID_JPEG_CLASS_BASE + 3) |
| 1207 | 1207 | ||
| 1208 | #define V4L2_CID_JPEG_ACTIVE_MARKER (V4L2_CID_JPEG_CLASS_BASE + 4) | 1208 | #define V4L2_CID_JPEG_ACTIVE_MARKER (V4L2_CID_JPEG_CLASS_BASE + 4) |
| 1209 | #define V4L2_JPEG_ACTIVE_MARKER_APP0 (1 << 0) | 1209 | #define V4L2_JPEG_ACTIVE_MARKER_APP0 (1 << 0) |
| 1210 | #define V4L2_JPEG_ACTIVE_MARKER_APP1 (1 << 1) | 1210 | #define V4L2_JPEG_ACTIVE_MARKER_APP1 (1 << 1) |
| 1211 | #define V4L2_JPEG_ACTIVE_MARKER_COM (1 << 16) | 1211 | #define V4L2_JPEG_ACTIVE_MARKER_COM (1 << 16) |
| 1212 | #define V4L2_JPEG_ACTIVE_MARKER_DQT (1 << 17) | 1212 | #define V4L2_JPEG_ACTIVE_MARKER_DQT (1 << 17) |
| 1213 | #define V4L2_JPEG_ACTIVE_MARKER_DHT (1 << 18) | 1213 | #define V4L2_JPEG_ACTIVE_MARKER_DHT (1 << 18) |
| 1214 | 1214 | ||
| 1215 | 1215 | ||
| 1216 | /* Image source controls */ | 1216 | /* Image source controls */ |
| @@ -1243,10 +1243,10 @@ enum v4l2_jpeg_chroma_subsampling { · 26 unmodified lines | |||
| 1243 | #define V4L2_CID_DV_CLASS_BASE (V4L2_CTRL_CLASS_DV | 0x900) | 1243 | #define V4L2_CID_DV_CLASS_BASE (V4L2_CTRL_CLASS_DV | 0x900) |
| 1244 | #define V4L2_CID_DV_CLASS (V4L2_CTRL_CLASS_DV | 1) | 1244 | #define V4L2_CID_DV_CLASS (V4L2_CTRL_CLASS_DV | 1) |
| 1245 | 1245 | ||
| 1246 | #define V4L2_CID_DV_TX_HOTPLUG (V4L2_CID_DV_CLASS_BASE + 1) | 1246 | #define V4L2_CID_DV_TX_HOTPLUG (V4L2_CID_DV_CLASS_BASE + 1) |
| 1247 | #define V4L2_CID_DV_TX_RXSENSE (V4L2_CID_DV_CLASS_BASE + 2) | 1247 | #define V4L2_CID_DV_TX_RXSENSE (V4L2_CID_DV_CLASS_BASE + 2) |
| 1248 | #define V4L2_CID_DV_TX_EDID_PRESENT (V4L2_CID_DV_CLASS_BASE + 3) | 1248 | #define V4L2_CID_DV_TX_EDID_PRESENT (V4L2_CID_DV_CLASS_BASE + 3) |
| 1249 | #define V4L2_CID_DV_TX_MODE (V4L2_CID_DV_CLASS_BASE + 4) | 1249 | #define V4L2_CID_DV_TX_MODE (V4L2_CID_DV_CLASS_BASE + 4) |
| 1250 | enum v4l2_dv_tx_mode { | 1250 | enum v4l2_dv_tx_mode { |
| 1251 | V4L2_DV_TX_MODE_DVI_D = 0, | 1251 | V4L2_DV_TX_MODE_DVI_D = 0, |
| 1252 | V4L2_DV_TX_MODE_HDMI = 1, | 1252 | V4L2_DV_TX_MODE_HDMI = 1, |
| @@ -1267,7 +1267,7 @@ enum v4l2_dv_it_content_type { · 14 unmodified lines | |||
| 1267 | V4L2_DV_IT_CONTENT_TYPE_NO_ITC = 4, | 1267 | V4L2_DV_IT_CONTENT_TYPE_NO_ITC = 4, |
| 1268 | }; | 1268 | }; |
| 1269 | 1269 | ||
| 1270 | #define V4L2_CID_DV_RX_POWER_PRESENT (V4L2_CID_DV_CLASS_BASE + 100) | 1270 | #define V4L2_CID_DV_RX_POWER_PRESENT (V4L2_CID_DV_CLASS_BASE + 100) |
| 1271 | #define V4L2_CID_DV_RX_RGB_RANGE (V4L2_CID_DV_CLASS_BASE + 101) | 1271 | #define V4L2_CID_DV_RX_RGB_RANGE (V4L2_CID_DV_CLASS_BASE + 101) |
| 1272 | #define V4L2_CID_DV_RX_IT_CONTENT_TYPE (V4L2_CID_DV_CLASS_BASE + 102) | 1272 | #define V4L2_CID_DV_RX_IT_CONTENT_TYPE (V4L2_CID_DV_CLASS_BASE + 102) |
| 1273 | 1273 | ||
| @@ -1537,15 +1537,6 @@ struct v4l2_ctrl_h264_pred_weights { · 263 unmodified lines | |||
| 1537 | struct v4l2_h264_weight_factors weight_factors[2]; | 1537 | struct v4l2_h264_weight_factors weight_factors[2]; |
| 1538 | }; | 1538 | }; |
| 1539 | 1539 | ||
| 1540 | #define V4L2_H264_SLICE_TYPE_P 0 | ||
| 1541 | #define V4L2_H264_SLICE_TYPE_B 1 | ||
| 1542 | #define V4L2_H264_SLICE_TYPE_I 2 | ||
| 1543 | #define V4L2_H264_SLICE_TYPE_SP 3 | ||
| 1544 | #define V4L2_H264_SLICE_TYPE_SI 4 | ||
| 1545 | |||
| 1546 | #define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED 0x01 | ||
| 1547 | #define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH 0x02 | ||
| 1548 | |||
| 1549 | #define V4L2_H264_TOP_FIELD_REF 0x1 | 1540 | #define V4L2_H264_TOP_FIELD_REF 0x1 |
| 1550 | #define V4L2_H264_BOTTOM_FIELD_REF 0x2 | 1541 | #define V4L2_H264_BOTTOM_FIELD_REF 0x2 |
| 1551 | #define V4L2_H264_FRAME_REF 0x3 | 1542 | #define V4L2_H264_FRAME_REF 0x3 |
| @@ -1566,8 +1557,17 @@ struct v4l2_h264_reference { · 14 unmodified lines | |||
| 1566 | * Maximum DPB size, as specified by section 'A.3.1 Level limits | 1557 | * Maximum DPB size, as specified by section 'A.3.1 Level limits |
| 1567 | * common to the Baseline, Main, and Extended profiles'. | 1558 | * common to the Baseline, Main, and Extended profiles'. |
| 1568 | */ | 1559 | */ |
| 1569 | #define V4L2_H264_NUM_DPB_ENTRIES 16 | 1560 | #define V4L2_H264_NUM_DPB_ENTRIES 16 |
| 1570 | #define V4L2_H264_REF_LIST_LEN (2 * V4L2_H264_NUM_DPB_ENTRIES) | 1561 | #define V4L2_H264_REF_LIST_LEN (2 * V4L2_H264_NUM_DPB_ENTRIES) |
| 1562 | |||
| 1563 | #define V4L2_H264_SLICE_TYPE_P 0 | ||
| 1564 | #define V4L2_H264_SLICE_TYPE_B 1 | ||
| 1565 | #define V4L2_H264_SLICE_TYPE_I 2 | ||
| 1566 | #define V4L2_H264_SLICE_TYPE_SP 3 | ||
| 1567 | #define V4L2_H264_SLICE_TYPE_SI 4 | ||
| 1568 | |||
| 1569 | #define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED 0x01 | ||
| 1570 | #define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH 0x02 | ||
| 1571 | 1571 | ||
| 1572 | #define V4L2_CID_STATELESS_H264_SLICE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 6) | 1572 | #define V4L2_CID_STATELESS_H264_SLICE_PARAMS (V4L2_CID_CODEC_STATELESS_BASE + 6) |
| 1573 | /** | 1573 | /** |
| @@ -1707,7 +1707,6 @@ struct v4l2_ctrl_h264_decode_params { · 133 unmodified lines | |||
| 1707 | __u32 flags; | 1707 | __u32 flags; |
| 1708 | }; | 1708 | }; |
| 1709 | 1709 | ||
| 1710 | |||
| 1711 | /* Stateless FWHT control, used by the vicodec driver */ | 1710 | /* Stateless FWHT control, used by the vicodec driver */ |
| 1712 | 1711 | ||
| 1713 | /* Current FWHT version */ | 1712 | /* Current FWHT version */ |
| @@ -2549,44 +2548,10 @@ struct v4l2_ctrl_hevc_scaling_matrix { · 835 unmodified lines | |||
| 2549 | __u8 scaling_list_dc_coef_32x32[2]; | 2548 | __u8 scaling_list_dc_coef_32x32[2]; |
| 2550 | }; | 2549 | }; |
| 2551 | 2550 | ||
| 2552 | #define V4L2_CID_COLORIMETRY_CLASS_BASE (V4L2_CTRL_CLASS_COLORIMETRY | 0x900) | ||
| 2553 | #define V4L2_CID_COLORIMETRY_CLASS (V4L2_CTRL_CLASS_COLORIMETRY | 1) | ||
| 2554 | |||
| 2555 | #define V4L2_CID_COLORIMETRY_HDR10_CLL_INFO (V4L2_CID_COLORIMETRY_CLASS_BASE + 0) | ||
| 2556 | |||
| 2557 | struct v4l2_ctrl_hdr10_cll_info { | ||
| 2558 | __u16 max_content_light_level; | ||
| 2559 | __u16 max_pic_average_light_level; | ||
| 2560 | }; | ||
| 2561 | |||
| 2562 | #define V4L2_CID_COLORIMETRY_HDR10_MASTERING_DISPLAY (V4L2_CID_COLORIMETRY_CLASS_BASE + 1) | ||
| 2563 | |||
| 2564 | #define V4L2_HDR10_MASTERING_PRIMARIES_X_LOW 5 | ||
| 2565 | #define V4L2_HDR10_MASTERING_PRIMARIES_X_HIGH 37000 | ||
| 2566 | #define V4L2_HDR10_MASTERING_PRIMARIES_Y_LOW 5 | ||
| 2567 | #define V4L2_HDR10_MASTERING_PRIMARIES_Y_HIGH 42000 | ||
| 2568 | #define V4L2_HDR10_MASTERING_WHITE_POINT_X_LOW 5 | ||
| 2569 | #define V4L2_HDR10_MASTERING_WHITE_POINT_X_HIGH 37000 | ||
| 2570 | #define V4L2_HDR10_MASTERING_WHITE_POINT_Y_LOW 5 | ||
| 2571 | #define V4L2_HDR10_MASTERING_WHITE_POINT_Y_HIGH 42000 | ||
| 2572 | #define V4L2_HDR10_MASTERING_MAX_LUMA_LOW 50000 | ||
| 2573 | #define V4L2_HDR10_MASTERING_MAX_LUMA_HIGH 100000000 | ||
| 2574 | #define V4L2_HDR10_MASTERING_MIN_LUMA_LOW 1 | ||
| 2575 | #define V4L2_HDR10_MASTERING_MIN_LUMA_HIGH 50000 | ||
| 2576 | |||
| 2577 | struct v4l2_ctrl_hdr10_mastering_display { | ||
| 2578 | __u16 display_primaries_x[3]; | ||
| 2579 | __u16 display_primaries_y[3]; | ||
| 2580 | __u16 white_point_x; | ||
| 2581 | __u16 white_point_y; | ||
| 2582 | __u32 max_display_mastering_luminance; | ||
| 2583 | __u32 min_display_mastering_luminance; | ||
| 2584 | }; | ||
| 2585 | |||
| 2586 | /* Stateless VP9 controls */ | 2551 | /* Stateless VP9 controls */ |
| 2587 | 2552 | ||
| 2588 | #define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 | 2553 | #define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_ENABLED 0x1 |
| 2589 | #define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 | 2554 | #define V4L2_VP9_LOOP_FILTER_FLAG_DELTA_UPDATE 0x2 |
| 2590 | 2555 | ||
| 2591 | /** | 2556 | /** |
| 2592 | * struct v4l2_vp9_loop_filter - VP9 loop filter parameters | 2557 | * struct v4l2_vp9_loop_filter - VP9 loop filter parameters |
| @@ -3515,4 +3480,38 @@ struct v4l2_ctrl_av1_film_grain { · 922 unmodified lines | |||
| 3515 | #define V4L2_CID_MPEG_MFC51_BASE V4L2_CID_CODEC_MFC51_BASE | 3480 | #define V4L2_CID_MPEG_MFC51_BASE V4L2_CID_CODEC_MFC51_BASE |
| 3516 | #endif | 3481 | #endif |
| 3517 | 3482 | ||
| 3483 | #define V4L2_CID_COLORIMETRY_CLASS_BASE (V4L2_CTRL_CLASS_COLORIMETRY | 0x900) | ||
| 3484 | #define V4L2_CID_COLORIMETRY_CLASS (V4L2_CTRL_CLASS_COLORIMETRY | 1) | ||
| 3485 | |||
| 3486 | #define V4L2_CID_COLORIMETRY_HDR10_CLL_INFO (V4L2_CID_COLORIMETRY_CLASS_BASE + 0) | ||
| 3487 | |||
| 3488 | struct v4l2_ctrl_hdr10_cll_info { | ||
| 3489 | __u16 max_content_light_level; | ||
| 3490 | __u16 max_pic_average_light_level; | ||
| 3491 | }; | ||
| 3492 | |||
| 3493 | #define V4L2_CID_COLORIMETRY_HDR10_MASTERING_DISPLAY (V4L2_CID_COLORIMETRY_CLASS_BASE + 1) | ||
| 3494 | |||
| 3495 | #define V4L2_HDR10_MASTERING_PRIMARIES_X_LOW 5 | ||
| 3496 | #define V4L2_HDR10_MASTERING_PRIMARIES_X_HIGH 37000 | ||
| 3497 | #define V4L2_HDR10_MASTERING_PRIMARIES_Y_LOW 5 | ||
| 3498 | #define V4L2_HDR10_MASTERING_PRIMARIES_Y_HIGH 42000 | ||
| 3499 | #define V4L2_HDR10_MASTERING_WHITE_POINT_X_LOW 5 | ||
| 3500 | #define V4L2_HDR10_MASTERING_WHITE_POINT_X_HIGH 37000 | ||
| 3501 | #define V4L2_HDR10_MASTERING_WHITE_POINT_Y_LOW 5 | ||
| 3502 | #define V4L2_HDR10_MASTERING_WHITE_POINT_Y_HIGH 42000 | ||
| 3503 | #define V4L2_HDR10_MASTERING_MAX_LUMA_LOW 50000 | ||
| 3504 | #define V4L2_HDR10_MASTERING_MAX_LUMA_HIGH 100000000 | ||
| 3505 | #define V4L2_HDR10_MASTERING_MIN_LUMA_LOW 1 | ||
| 3506 | #define V4L2_HDR10_MASTERING_MIN_LUMA_HIGH 50000 | ||
| 3507 | |||
| 3508 | struct v4l2_ctrl_hdr10_mastering_display { | ||
| 3509 | __u16 display_primaries_x[3]; | ||
| 3510 | __u16 display_primaries_y[3]; | ||
| 3511 | __u16 white_point_x; | ||
| 3512 | __u16 white_point_y; | ||
| 3513 | __u32 max_display_mastering_luminance; | ||
| 3514 | __u32 min_display_mastering_luminance; | ||
| 3515 | }; | ||
| 3516 | |||
| 3518 | #endif | 3517 | #endif |
| @@ -2,7 +2,7 @@ · 1 unmodified line | |||
| 2 | /* | 2 | /* |
| 3 | * V4L2 DV timings header. | 3 | * V4L2 DV timings header. |
| 4 | * | 4 | * |
| 5 | * Copyright (C) 2012-2016 Hans Verkuil <hansverk@cisco.com> | 5 | * Copyright (C) 2012-2016 Hans Verkuil <hverkuil@kernel.org> |
| 6 | */ | 6 | */ |
| 7 | 7 | ||
| 8 | #ifndef _V4L2_DV_TIMINGS_H | 8 | #ifndef _V4L2_DV_TIMINGS_H |
| @@ -237,7 +237,7 @@ struct vduse_iova_umem { · 236 unmodified lines | |||
| 237 | * struct vduse_iova_info - information of one IOVA region | 237 | * struct vduse_iova_info - information of one IOVA region |
| 238 | * @start: start of the IOVA region | 238 | * @start: start of the IOVA region |
| 239 | * @last: last of the IOVA region | 239 | * @last: last of the IOVA region |
| 240 | * @capability: capability of the IOVA regsion | 240 | * @capability: capability of the IOVA region |
| 241 | * @reserved: for future use, needs to be initialized to zero | 241 | * @reserved: for future use, needs to be initialized to zero |
| 242 | * | 242 | * |
| 243 | * Structure used by VDUSE_IOTLB_GET_INFO ioctl to get information of | 243 | * Structure used by VDUSE_IOTLB_GET_INFO ioctl to get information of |
| @@ -51,7 +51,7 @@ · 50 unmodified lines | |||
| 51 | * | 51 | * |
| 52 | * Author: Bill Dirks <bill@thedirks.org> | 52 | * Author: Bill Dirks <bill@thedirks.org> |
| 53 | * Justin Schoeman | 53 | * Justin Schoeman |
| 54 | * Hans Verkuil <hverkuil@xs4all.nl> | 54 | * Hans Verkuil <hverkuil@kernel.org> |
| 55 | * et al. | 55 | * et al. |
| 56 | */ | 56 | */ |
| 57 | #ifndef _UAPI__LINUX_VIDEODEV2_H | 57 | #ifndef _UAPI__LINUX_VIDEODEV2_H |
| @@ -1607,8 +1607,8 @@ struct v4l2_bt_timings { · 1549 unmodified lines | |||
| 1607 | } __attribute__ ((packed)); | 1607 | } __attribute__ ((packed)); |
| 1608 | 1608 | ||
| 1609 | /* Interlaced or progressive format */ | 1609 | /* Interlaced or progressive format */ |
| 1610 | #define V4L2_DV_PROGRESSIVE 0 | 1610 | #define V4L2_DV_PROGRESSIVE 0 |
| 1611 | #define V4L2_DV_INTERLACED 1 | 1611 | #define V4L2_DV_INTERLACED 1 |
| 1612 | 1612 | ||
| 1613 | /* Polarities. If bit is not set, it is assumed to be negative polarity */ | 1613 | /* Polarities. If bit is not set, it is assumed to be negative polarity */ |
| 1614 | #define V4L2_DV_VSYNC_POS_POL 0x00000001 | 1614 | #define V4L2_DV_VSYNC_POS_POL 0x00000001 |
| @@ -2788,15 +2788,15 @@ struct v4l2_remove_buffers { · 1173 unmodified lines | |||
| 2788 | * Only implemented if CONFIG_VIDEO_ADV_DEBUG is defined. | 2788 | * Only implemented if CONFIG_VIDEO_ADV_DEBUG is defined. |
| 2789 | * You must be root to use these ioctls. Never use these in applications! | 2789 | * You must be root to use these ioctls. Never use these in applications! |
| 2790 | */ | 2790 | */ |
| 2791 | #define VIDIOC_DBG_S_REGISTER _IOW('V', 79, struct v4l2_dbg_register) | 2791 | #define VIDIOC_DBG_S_REGISTER _IOW('V', 79, struct v4l2_dbg_register) |
| 2792 | #define VIDIOC_DBG_G_REGISTER _IOWR('V', 80, struct v4l2_dbg_register) | 2792 | #define VIDIOC_DBG_G_REGISTER _IOWR('V', 80, struct v4l2_dbg_register) |
| 2793 | 2793 | ||
| 2794 | #define VIDIOC_S_HW_FREQ_SEEK _IOW('V', 82, struct v4l2_hw_freq_seek) | 2794 | #define VIDIOC_S_HW_FREQ_SEEK _IOW('V', 82, struct v4l2_hw_freq_seek) |
| 2795 | #define VIDIOC_S_DV_TIMINGS _IOWR('V', 87, struct v4l2_dv_timings) | 2795 | #define VIDIOC_S_DV_TIMINGS _IOWR('V', 87, struct v4l2_dv_timings) |
| 2796 | #define VIDIOC_G_DV_TIMINGS _IOWR('V', 88, struct v4l2_dv_timings) | 2796 | #define VIDIOC_G_DV_TIMINGS _IOWR('V', 88, struct v4l2_dv_timings) |
| 2797 | #define VIDIOC_DQEVENT _IOR('V', 89, struct v4l2_event) | 2797 | #define VIDIOC_DQEVENT _IOR('V', 89, struct v4l2_event) |
| 2798 | #define VIDIOC_SUBSCRIBE_EVENT _IOW('V', 90, struct v4l2_event_subscription) | 2798 | #define VIDIOC_SUBSCRIBE_EVENT _IOW('V', 90, struct v4l2_event_subscription) |
| 2799 | #define VIDIOC_UNSUBSCRIBE_EVENT _IOW('V', 91, struct v4l2_event_subscription) | 2799 | #define VIDIOC_UNSUBSCRIBE_EVENT _IOW('V', 91, struct v4l2_event_subscription) |
| 2800 | #define VIDIOC_CREATE_BUFS _IOWR('V', 92, struct v4l2_create_buffers) | 2800 | #define VIDIOC_CREATE_BUFS _IOWR('V', 92, struct v4l2_create_buffers) |
| 2801 | #define VIDIOC_PREPARE_BUF _IOWR('V', 93, struct v4l2_buffer) | 2801 | #define VIDIOC_PREPARE_BUF _IOWR('V', 93, struct v4l2_buffer) |
| 2802 | #define VIDIOC_G_SELECTION _IOWR('V', 94, struct v4l2_selection) | 2802 | #define VIDIOC_G_SELECTION _IOWR('V', 94, struct v4l2_selection) |
| @@ -68,6 +68,7 @@ · 67 unmodified lines | |||
| 68 | #define VIRTIO_ID_AUDIO_POLICY 39 /* virtio audio policy */ | 68 | #define VIRTIO_ID_AUDIO_POLICY 39 /* virtio audio policy */ |
| 69 | #define VIRTIO_ID_BT 40 /* virtio bluetooth */ | 69 | #define VIRTIO_ID_BT 40 /* virtio bluetooth */ |
| 70 | #define VIRTIO_ID_GPIO 41 /* virtio gpio */ | 70 | #define VIRTIO_ID_GPIO 41 /* virtio gpio */ |
| 71 | #define VIRTIO_ID_SPI 45 /* virtio spi */ | ||
| 71 | 72 | ||
| 72 | /* | 73 | /* |
| 73 | * Virtio Transitional IDs | 74 | * Virtio Transitional IDs |
| @@ -0,0 +1,181 @@ | |||
| 1 | /* SPDX-License-Identifier: BSD-3-Clause */ | ||
| 2 | /* | ||
| 3 | * Copyright (C) 2023 OpenSynergy GmbH | ||
| 4 | * Copyright (C) 2025 Qualcomm Innovation Center, Inc. All rights reserved. | ||
| 5 | */ | ||
| 6 | #ifndef _LINUX_VIRTIO_VIRTIO_SPI_H | ||
| 7 | #define _LINUX_VIRTIO_VIRTIO_SPI_H | ||
| 8 | |||
| 9 | #include <linux/types.h> | ||
| 10 | #include <linux/virtio_config.h> | ||
| 11 | #include <linux/virtio_ids.h> | ||
| 12 | #include <linux/virtio_types.h> | ||
| 13 | |||
| 14 | /* Sample data on trailing clock edge */ | ||
| 15 | #define VIRTIO_SPI_CPHA _BITUL(0) | ||
| 16 | /* Clock is high when IDLE */ | ||
| 17 | #define VIRTIO_SPI_CPOL _BITUL(1) | ||
| 18 | /* Chip Select is active high */ | ||
| 19 | #define VIRTIO_SPI_CS_HIGH _BITUL(2) | ||
| 20 | /* Transmit LSB first */ | ||
| 21 | #define VIRTIO_SPI_MODE_LSB_FIRST _BITUL(3) | ||
| 22 | /* Loopback mode */ | ||
| 23 | #define VIRTIO_SPI_MODE_LOOP _BITUL(4) | ||
| 24 | |||
| 25 | /** | ||
| 26 | * struct virtio_spi_config - All config fields are read-only for the | ||
| 27 | * Virtio SPI driver | ||
| 28 | * @cs_max_number: maximum number of chipselect the host SPI controller | ||
| 29 | * supports. | ||
| 30 | * @cs_change_supported: indicates if the host SPI controller supports to toggle | ||
| 31 | * chipselect after each transfer in one message: | ||
| 32 | * 0: unsupported, chipselect will be kept in active state throughout the | ||
| 33 | * message transaction; | ||
| 34 | * 1: supported. | ||
| 35 | * Note: Message here contains a sequence of SPI transfers. | ||
| 36 | * @tx_nbits_supported: indicates the supported number of bit for writing: | ||
| 37 | * bit 0: DUAL (2-bit transfer), 1 for supported | ||
| 38 | * bit 1: QUAD (4-bit transfer), 1 for supported | ||
| 39 | * bit 2: OCTAL (8-bit transfer), 1 for supported | ||
| 40 | * other bits are reserved as 0, 1-bit transfer is always supported. | ||
| 41 | * @rx_nbits_supported: indicates the supported number of bit for reading: | ||
| 42 | * bit 0: DUAL (2-bit transfer), 1 for supported | ||
| 43 | * bit 1: QUAD (4-bit transfer), 1 for supported | ||
| 44 | * bit 2: OCTAL (8-bit transfer), 1 for supported | ||
| 45 | * other bits are reserved as 0, 1-bit transfer is always supported. | ||
| 46 | * @bits_per_word_mask: mask indicating which values of bits_per_word are | ||
| 47 | * supported. If not set, no limitation for bits_per_word. | ||
| 48 | * @mode_func_supported: indicates the following features are supported or not: | ||
| 49 | * bit 0-1: CPHA feature | ||
| 50 | * 0b00: invalid, should support as least one CPHA setting | ||
| 51 | * 0b01: supports CPHA=0 only | ||
| 52 | * 0b10: supports CPHA=1 only | ||
| 53 | * 0b11: supports CPHA=0 and CPHA=1. | ||
| 54 | * bit 2-3: CPOL feature | ||
| 55 | * 0b00: invalid, should support as least one CPOL setting | ||
| 56 | * 0b01: supports CPOL=0 only | ||
| 57 | * 0b10: supports CPOL=1 only | ||
| 58 | * 0b11: supports CPOL=0 and CPOL=1. | ||
| 59 | * bit 4: chipselect active high feature, 0 for unsupported and 1 for | ||
| 60 | * supported, chipselect active low is supported by default. | ||
| 61 | * bit 5: LSB first feature, 0 for unsupported and 1 for supported, | ||
| 62 | * MSB first is supported by default. | ||
| 63 | * bit 6: loopback mode feature, 0 for unsupported and 1 for supported, | ||
| 64 | * normal mode is supported by default. | ||
| 65 | * @max_freq_hz: the maximum clock rate supported in Hz unit, 0 means no | ||
| 66 | * limitation for transfer speed. | ||
| 67 | * @max_word_delay_ns: the maximum word delay supported, in nanoseconds. | ||
| 68 | * A value of 0 indicates that word delay is unsupported. | ||
| 69 | * Each transfer may consist of a sequence of words. | ||
| 70 | * @max_cs_setup_ns: the maximum delay supported after chipselect is asserted, | ||
| 71 | * in ns unit, 0 means delay is not supported to introduce after chipselect is | ||
| 72 | * asserted. | ||
| 73 | * @max_cs_hold_ns: the maximum delay supported before chipselect is deasserted, | ||
| 74 | * in ns unit, 0 means delay is not supported to introduce before chipselect | ||
| 75 | * is deasserted. | ||
| 76 | * @max_cs_incative_ns: maximum delay supported after chipselect is deasserted, | ||
| 77 | * in ns unit, 0 means delay is not supported to introduce after chipselect is | ||
| 78 | * deasserted. | ||
| 79 | */ | ||
| 80 | struct virtio_spi_config { | ||
| 81 | __u8 cs_max_number; | ||
| 82 | __u8 cs_change_supported; | ||
| 83 | #define VIRTIO_SPI_RX_TX_SUPPORT_DUAL _BITUL(0) | ||
| 84 | #define VIRTIO_SPI_RX_TX_SUPPORT_QUAD _BITUL(1) | ||
| 85 | #define VIRTIO_SPI_RX_TX_SUPPORT_OCTAL _BITUL(2) | ||
| 86 | __u8 tx_nbits_supported; | ||
| 87 | __u8 rx_nbits_supported; | ||
| 88 | __le32 bits_per_word_mask; | ||
| 89 | #define VIRTIO_SPI_MF_SUPPORT_CPHA_0 _BITUL(0) | ||
| 90 | #define VIRTIO_SPI_MF_SUPPORT_CPHA_1 _BITUL(1) | ||
| 91 | #define VIRTIO_SPI_MF_SUPPORT_CPOL_0 _BITUL(2) | ||
| 92 | #define VIRTIO_SPI_MF_SUPPORT_CPOL_1 _BITUL(3) | ||
| 93 | #define VIRTIO_SPI_MF_SUPPORT_CS_HIGH _BITUL(4) | ||
| 94 | #define VIRTIO_SPI_MF_SUPPORT_LSB_FIRST _BITUL(5) | ||
| 95 | #define VIRTIO_SPI_MF_SUPPORT_LOOPBACK _BITUL(6) | ||
| 96 | __le32 mode_func_supported; | ||
| 97 | __le32 max_freq_hz; | ||
| 98 | __le32 max_word_delay_ns; | ||
| 99 | __le32 max_cs_setup_ns; | ||
| 100 | __le32 max_cs_hold_ns; | ||
| 101 | __le32 max_cs_inactive_ns; | ||
| 102 | }; | ||
| 103 | |||
| 104 | /** | ||
| 105 | * struct spi_transfer_head - virtio SPI transfer descriptor | ||
| 106 | * @chip_select_id: chipselect index the SPI transfer used. | ||
| 107 | * @bits_per_word: the number of bits in each SPI transfer word. | ||
| 108 | * @cs_change: whether to deselect device after finishing this transfer | ||
| 109 | * before starting the next transfer, 0 means cs keep asserted and | ||
| 110 | * 1 means cs deasserted then asserted again. | ||
| 111 | * @tx_nbits: bus width for write transfer. | ||
| 112 | * 0,1: bus width is 1, also known as SINGLE | ||
| 113 | * 2 : bus width is 2, also known as DUAL | ||
| 114 | * 4 : bus width is 4, also known as QUAD | ||
| 115 | * 8 : bus width is 8, also known as OCTAL | ||
| 116 | * other values are invalid. | ||
| 117 | * @rx_nbits: bus width for read transfer. | ||
| 118 | * 0,1: bus width is 1, also known as SINGLE | ||
| 119 | * 2 : bus width is 2, also known as DUAL | ||
| 120 | * 4 : bus width is 4, also known as QUAD | ||
| 121 | * 8 : bus width is 8, also known as OCTAL | ||
| 122 | * other values are invalid. | ||
| 123 | * @reserved: for future use. | ||
| 124 | * @mode: SPI transfer mode. | ||
| 125 | * bit 0: CPHA, determines the timing (i.e. phase) of the data | ||
| 126 | * bits relative to the clock pulses.For CPHA=0, the | ||
| 127 | * "out" side changes the data on the trailing edge of the | ||
| 128 | * preceding clock cycle, while the "in" side captures the data | ||
| 129 | * on (or shortly after) the leading edge of the clock cycle. | ||
| 130 | * For CPHA=1, the "out" side changes the data on the leading | ||
| 131 | * edge of the current clock cycle, while the "in" side | ||
| 132 | * captures the data on (or shortly after) the trailing edge of | ||
| 133 | * the clock cycle. | ||
| 134 | * bit 1: CPOL, determines the polarity of the clock. CPOL=0 is a | ||
| 135 | * clock which idles at 0, and each cycle consists of a pulse | ||
| 136 | * of 1. CPOL=1 is a clock which idles at 1, and each cycle | ||
| 137 | * consists of a pulse of 0. | ||
| 138 | * bit 2: CS_HIGH, if 1, chip select active high, else active low. | ||
| 139 | * bit 3: LSB_FIRST, determines per-word bits-on-wire, if 0, MSB | ||
| 140 | * first, else LSB first. | ||
| 141 | * bit 4: LOOP, loopback mode. | ||
| 142 | * @freq: the transfer speed in Hz. | ||
| 143 | * @word_delay_ns: delay to be inserted between consecutive words of a | ||
| 144 | * transfer, in ns unit. | ||
| 145 | * @cs_setup_ns: delay to be introduced after CS is asserted, in ns | ||
| 146 | * unit. | ||
| 147 | * @cs_delay_hold_ns: delay to be introduced before CS is deasserted | ||
| 148 | * for each transfer, in ns unit. | ||
| 149 | * @cs_change_delay_inactive_ns: delay to be introduced after CS is | ||
| 150 | * deasserted and before next asserted, in ns unit. | ||
| 151 | */ | ||
| 152 | struct spi_transfer_head { | ||
| 153 | __u8 chip_select_id; | ||
| 154 | __u8 bits_per_word; | ||
| 155 | __u8 cs_change; | ||
| 156 | __u8 tx_nbits; | ||
| 157 | __u8 rx_nbits; | ||
| 158 | __u8 reserved[3]; | ||
| 159 | __le32 mode; | ||
| 160 | __le32 freq; | ||
| 161 | __le32 word_delay_ns; | ||
| 162 | __le32 cs_setup_ns; | ||
| 163 | __le32 cs_delay_hold_ns; | ||
| 164 | __le32 cs_change_delay_inactive_ns; | ||
| 165 | }; | ||
| 166 | |||
| 167 | /** | ||
| 168 | * struct spi_transfer_result - virtio SPI transfer result | ||
| 169 | * @result: Transfer result code. | ||
| 170 | * VIRTIO_SPI_TRANS_OK: Transfer successful. | ||
| 171 | * VIRTIO_SPI_PARAM_ERR: Parameter error. | ||
| 172 | * VIRTIO_SPI_TRANS_ERR: Transfer error. | ||
| 173 | */ | ||
| 174 | struct spi_transfer_result { | ||
| 175 | #define VIRTIO_SPI_TRANS_OK 0 | ||
| 176 | #define VIRTIO_SPI_PARAM_ERR 1 | ||
| 177 | #define VIRTIO_SPI_TRANS_ERR 2 | ||
| 178 | __u8 result; | ||
| 179 | }; | ||
| 180 | |||
| 181 | #endif /* #ifndef _LINUX_VIRTIO_VIRTIO_SPI_H */ | ||
| @@ -134,7 +134,7 @@ struct fastrpc_mem_unmap { · 133 unmodified lines | |||
| 134 | }; | 134 | }; |
| 135 | 135 | ||
| 136 | struct fastrpc_ioctl_capability { | 136 | struct fastrpc_ioctl_capability { |
| 137 | __u32 domain; | 137 | __u32 unused; /* deprecated, ignored by the kernel */ |
| 138 | __u32 attribute_id; | 138 | __u32 attribute_id; |
| 139 | __u32 capability; /* dsp capability */ | 139 | __u32 capability; /* dsp capability */ |
| 140 | __u32 reserved[4]; | 140 | __u32 reserved[4]; |
| @@ -31,6 +31,7 @@ struct hisi_qp_info { · 30 unmodified lines | |||
| 31 | #define HISI_QM_API_VER_BASE "hisi_qm_v1" | 31 | #define HISI_QM_API_VER_BASE "hisi_qm_v1" |
| 32 | #define HISI_QM_API_VER2_BASE "hisi_qm_v2" | 32 | #define HISI_QM_API_VER2_BASE "hisi_qm_v2" |
| 33 | #define HISI_QM_API_VER3_BASE "hisi_qm_v3" | 33 | #define HISI_QM_API_VER3_BASE "hisi_qm_v3" |
| 34 | #define HISI_QM_API_VER5_BASE "hisi_qm_v5" | ||
| 34 | 35 | ||
| 35 | /* UACCE_CMD_QM_SET_QP_CTX: Set qp algorithm type */ | 36 | /* UACCE_CMD_QM_SET_QP_CTX: Set qp algorithm type */ |
| 36 | #define UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx) | 37 | #define UACCE_CMD_QM_SET_QP_CTX _IOWR('H', 10, struct hisi_qp_ctx) |
| @@ -255,6 +255,7 @@ enum rdma_driver_id { · 254 unmodified lines | |||
| 255 | RDMA_DRIVER_SIW, | 255 | RDMA_DRIVER_SIW, |
| 256 | RDMA_DRIVER_ERDMA, | 256 | RDMA_DRIVER_ERDMA, |
| 257 | RDMA_DRIVER_MANA, | 257 | RDMA_DRIVER_MANA, |
| 258 | RDMA_DRIVER_IONIC, | ||
| 258 | }; | 259 | }; |
| 259 | 260 | ||
| 260 | enum ib_uverbs_gid_type { | 261 | enum ib_uverbs_gid_type { |
| @@ -74,4 +74,18 @@ struct ib_user_path_rec { · 73 unmodified lines | |||
| 74 | __u8 preference; | 74 | __u8 preference; |
| 75 | }; | 75 | }; |
| 76 | 76 | ||
| 77 | struct ib_user_service_rec { | ||
| 78 | __be64 id; | ||
| 79 | __u8 gid[16]; | ||
| 80 | __be16 pkey; | ||
| 81 | __u8 reserved[2]; | ||
| 82 | __be32 lease; | ||
| 83 | __u8 key[16]; | ||
| 84 | __u8 name[64]; | ||
| 85 | __u8 data_8[16]; | ||
| 86 | __be16 data_16[8]; | ||
| 87 | __be32 data_32[4]; | ||
| 88 | __be64 data_64[2]; | ||
| 89 | }; | ||
| 90 | |||
| 77 | #endif /* IB_USER_SA_H */ | 91 | #endif /* IB_USER_SA_H */ |
| @@ -0,0 +1,115 @@ | |||
| 1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ | ||
| 2 | /* Copyright (C) 2018-2025, Advanced Micro Devices, Inc */ | ||
| 3 | |||
| 4 | #ifndef IONIC_ABI_H | ||
| 5 | #define IONIC_ABI_H | ||
| 6 | |||
| 7 | #include <linux/types.h> | ||
| 8 | |||
| 9 | #define IONIC_ABI_VERSION 1 | ||
| 10 | |||
| 11 | #define IONIC_EXPDB_64 1 | ||
| 12 | #define IONIC_EXPDB_128 2 | ||
| 13 | #define IONIC_EXPDB_256 4 | ||
| 14 | #define IONIC_EXPDB_512 8 | ||
| 15 | |||
| 16 | #define IONIC_EXPDB_SQ 1 | ||
| 17 | #define IONIC_EXPDB_RQ 2 | ||
| 18 | |||
| 19 | #define IONIC_CMB_ENABLE 1 | ||
| 20 | #define IONIC_CMB_REQUIRE 2 | ||
| 21 | #define IONIC_CMB_EXPDB 4 | ||
| 22 | #define IONIC_CMB_WC 8 | ||
| 23 | #define IONIC_CMB_UC 16 | ||
| 24 | |||
| 25 | struct ionic_ctx_req { | ||
| 26 | __u32 rsvd[2]; | ||
| 27 | }; | ||
| 28 | |||
| 29 | struct ionic_ctx_resp { | ||
| 30 | __u32 rsvd; | ||
| 31 | __u32 page_shift; | ||
| 32 | |||
| 33 | __aligned_u64 dbell_offset; | ||
| 34 | |||
| 35 | __u16 version; | ||
| 36 | __u8 qp_opcodes; | ||
| 37 | __u8 admin_opcodes; | ||
| 38 | |||
| 39 | __u8 sq_qtype; | ||
| 40 | __u8 rq_qtype; | ||
| 41 | __u8 cq_qtype; | ||
| 42 | __u8 admin_qtype; | ||
| 43 | |||
| 44 | __u8 max_stride; | ||
| 45 | __u8 max_spec; | ||
| 46 | __u8 udma_count; | ||
| 47 | __u8 expdb_mask; | ||
| 48 | __u8 expdb_qtypes; | ||
| 49 | |||
| 50 | __u8 rsvd2[3]; | ||
| 51 | }; | ||
| 52 | |||
| 53 | struct ionic_qdesc { | ||
| 54 | __aligned_u64 addr; | ||
| 55 | __u32 size; | ||
| 56 | __u16 mask; | ||
| 57 | __u8 depth_log2; | ||
| 58 | __u8 stride_log2; | ||
| 59 | }; | ||
| 60 | |||
| 61 | struct ionic_ah_resp { | ||
| 62 | __u32 ahid; | ||
| 63 | __u32 pad; | ||
| 64 | }; | ||
| 65 | |||
| 66 | struct ionic_cq_req { | ||
| 67 | struct ionic_qdesc cq[2]; | ||
| 68 | __u8 udma_mask; | ||
| 69 | __u8 rsvd[7]; | ||
| 70 | }; | ||
| 71 | |||
| 72 | struct ionic_cq_resp { | ||
| 73 | __u32 cqid[2]; | ||
| 74 | __u8 udma_mask; | ||
| 75 | __u8 rsvd[7]; | ||
| 76 | }; | ||
| 77 | |||
| 78 | struct ionic_qp_req { | ||
| 79 | struct ionic_qdesc sq; | ||
| 80 | struct ionic_qdesc rq; | ||
| 81 | __u8 sq_spec; | ||
| 82 | __u8 rq_spec; | ||
| 83 | __u8 sq_cmb; | ||
| 84 | __u8 rq_cmb; | ||
| 85 | __u8 udma_mask; | ||
| 86 | __u8 rsvd[3]; | ||
| 87 | }; | ||
| 88 | |||
| 89 | struct ionic_qp_resp { | ||
| 90 | __u32 qpid; | ||
| 91 | __u8 sq_cmb; | ||
| 92 | __u8 rq_cmb; | ||
| 93 | __u8 udma_idx; | ||
| 94 | __u8 rsvd[1]; | ||
| 95 | __aligned_u64 sq_cmb_offset; | ||
| 96 | __aligned_u64 rq_cmb_offset; | ||
| 97 | }; | ||
| 98 | |||
| 99 | struct ionic_srq_req { | ||
| 100 | struct ionic_qdesc rq; | ||
| 101 | __u8 rq_spec; | ||
| 102 | __u8 rq_cmb; | ||
| 103 | __u8 udma_mask; | ||
| 104 | __u8 rsvd[5]; | ||
| 105 | }; | ||
| 106 | |||
| 107 | struct ionic_srq_resp { | ||
| 108 | __u32 qpid; | ||
| 109 | __u8 rq_cmb; | ||
| 110 | __u8 udma_idx; | ||
| 111 | __u8 rsvd[2]; | ||
| 112 | __aligned_u64 rq_cmb_offset; | ||
| 113 | }; | ||
| 114 | |||
| 115 | #endif /* IONIC_ABI_H */ | ||
| @@ -20,11 +20,14 @@ enum irdma_memreg_type { · 19 unmodified lines | |||
| 20 | IRDMA_MEMREG_TYPE_MEM = 0, | 20 | IRDMA_MEMREG_TYPE_MEM = 0, |
| 21 | IRDMA_MEMREG_TYPE_QP = 1, | 21 | IRDMA_MEMREG_TYPE_QP = 1, |
| 22 | IRDMA_MEMREG_TYPE_CQ = 2, | 22 | IRDMA_MEMREG_TYPE_CQ = 2, |
| 23 | IRDMA_MEMREG_TYPE_SRQ = 3, | ||
| 23 | }; | 24 | }; |
| 24 | 25 | ||
| 25 | enum { | 26 | enum { |
| 26 | IRDMA_ALLOC_UCTX_USE_RAW_ATTR = 1 << 0, | 27 | IRDMA_ALLOC_UCTX_USE_RAW_ATTR = 1 << 0, |
| 27 | IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE = 1 << 1, | 28 | IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE = 1 << 1, |
| 29 | IRDMA_ALLOC_UCTX_MAX_HW_SRQ_QUANTA = 1 << 2, | ||
| 30 | IRDMA_SUPPORT_WQE_FORMAT_V2 = 1 << 3, | ||
| 28 | }; | 31 | }; |
| 29 | 32 | ||
| 30 | struct irdma_alloc_ucontext_req { | 33 | struct irdma_alloc_ucontext_req { |
| @@ -54,7 +57,8 @@ struct irdma_alloc_ucontext_resp { · 23 unmodified lines | |||
| 54 | __u8 rsvd2; | 57 | __u8 rsvd2; |
| 55 | __aligned_u64 comp_mask; | 58 | __aligned_u64 comp_mask; |
| 56 | __u16 min_hw_wq_size; | 59 | __u16 min_hw_wq_size; |
| 57 | __u8 rsvd3[6]; | 60 | __u32 max_hw_srq_quanta; |
| 61 | __u8 rsvd3[2]; | ||
| 58 | }; | 62 | }; |
| 59 | 63 | ||
| 60 | struct irdma_alloc_pd_resp { | 64 | struct irdma_alloc_pd_resp { |
| @@ -71,6 +75,16 @@ struct irdma_create_cq_req { · 10 unmodified lines | |||
| 71 | __aligned_u64 user_shadow_area; | 75 | __aligned_u64 user_shadow_area; |
| 72 | }; | 76 | }; |
| 73 | 77 | ||
| 78 | struct irdma_create_srq_req { | ||
| 79 | __aligned_u64 user_srq_buf; | ||
| 80 | __aligned_u64 user_shadow_area; | ||
| 81 | }; | ||
| 82 | |||
| 83 | struct irdma_create_srq_resp { | ||
| 84 | __u32 srq_id; | ||
| 85 | __u32 srq_size; | ||
| 86 | }; | ||
| 87 | |||
| 74 | struct irdma_create_qp_req { | 88 | struct irdma_create_qp_req { |
| 75 | __aligned_u64 user_wqe_bufs; | 89 | __aligned_u64 user_wqe_bufs; |
| 76 | __aligned_u64 user_compl_ctx; | 90 | __aligned_u64 user_compl_ctx; |
| @@ -67,7 +67,9 @@ enum { · 66 unmodified lines | |||
| 67 | RDMA_USER_CM_CMD_QUERY, | 67 | RDMA_USER_CM_CMD_QUERY, |
| 68 | RDMA_USER_CM_CMD_BIND, | 68 | RDMA_USER_CM_CMD_BIND, |
| 69 | RDMA_USER_CM_CMD_RESOLVE_ADDR, | 69 | RDMA_USER_CM_CMD_RESOLVE_ADDR, |
| 70 | RDMA_USER_CM_CMD_JOIN_MCAST | 70 | RDMA_USER_CM_CMD_JOIN_MCAST, |
| 71 | RDMA_USER_CM_CMD_RESOLVE_IB_SERVICE, | ||
| 72 | RDMA_USER_CM_CMD_WRITE_CM_EVENT, | ||
| 71 | }; | 73 | }; |
| 72 | 74 | ||
| 73 | /* See IBTA Annex A11, servies ID bytes 4 & 5 */ | 75 | /* See IBTA Annex A11, servies ID bytes 4 & 5 */ |
| @@ -147,7 +149,8 @@ struct rdma_ucm_resolve_route { · 73 unmodified lines | |||
| 147 | enum { | 149 | enum { |
| 148 | RDMA_USER_CM_QUERY_ADDR, | 150 | RDMA_USER_CM_QUERY_ADDR, |
| 149 | RDMA_USER_CM_QUERY_PATH, | 151 | RDMA_USER_CM_QUERY_PATH, |
| 150 | RDMA_USER_CM_QUERY_GID | 152 | RDMA_USER_CM_QUERY_GID, |
| 153 | RDMA_USER_CM_QUERY_IB_SERVICE | ||
| 151 | }; | 154 | }; |
| 152 | 155 | ||
| 153 | struct rdma_ucm_query { | 156 | struct rdma_ucm_query { |
| @@ -187,6 +190,11 @@ struct rdma_ucm_query_path_resp { · 33 unmodified lines | |||
| 187 | struct ib_path_rec_data path_data[]; | 190 | struct ib_path_rec_data path_data[]; |
| 188 | }; | 191 | }; |
| 189 | 192 | ||
| 193 | struct rdma_ucm_query_ib_service_resp { | ||
| 194 | __u32 num_service_recs; | ||
| 195 | struct ib_user_service_rec recs[]; | ||
| 196 | }; | ||
| 197 | |||
| 190 | struct rdma_ucm_conn_param { | 198 | struct rdma_ucm_conn_param { |
| 191 | __u32 qp_num; | 199 | __u32 qp_num; |
| 192 | __u32 qkey; | 200 | __u32 qkey; |
| @@ -297,6 +305,7 @@ struct rdma_ucm_event_resp { · 104 unmodified lines | |||
| 297 | union { | 305 | union { |
| 298 | struct rdma_ucm_conn_param conn; | 306 | struct rdma_ucm_conn_param conn; |
| 299 | struct rdma_ucm_ud_param ud; | 307 | struct rdma_ucm_ud_param ud; |
| 308 | __u32 arg32[2]; | ||
| 300 | } param; | 309 | } param; |
| 301 | __u32 reserved; | 310 | __u32 reserved; |
| 302 | struct rdma_ucm_ece ece; | 311 | struct rdma_ucm_ece ece; |
| @@ -338,4 +347,33 @@ struct rdma_ucm_migrate_resp { · 35 unmodified lines | |||
| 338 | __u32 events_reported; | 347 | __u32 events_reported; |
| 339 | }; | 348 | }; |
| 340 | 349 | ||
| 350 | enum { | ||
| 351 | RDMA_USER_CM_IB_SERVICE_FLAG_ID = 1 << 0, | ||
| 352 | RDMA_USER_CM_IB_SERVICE_FLAG_NAME = 1 << 1, | ||
| 353 | }; | ||
| 354 | |||
| 355 | #define RDMA_USER_CM_IB_SERVICE_NAME_SIZE 64 | ||
| 356 | struct rdma_ucm_ib_service { | ||
| 357 | __u64 service_id; | ||
| 358 | __u8 service_name[RDMA_USER_CM_IB_SERVICE_NAME_SIZE]; | ||
| 359 | __u32 flags; | ||
| 360 | __u32 reserved; | ||
| 361 | }; | ||
| 362 | |||
| 363 | struct rdma_ucm_resolve_ib_service { | ||
| 364 | __u32 id; | ||
| 365 | struct rdma_ucm_ib_service ibs; | ||
| 366 | }; | ||
| 367 | |||
| 368 | struct rdma_ucm_write_cm_event { | ||
| 369 | __u32 id; | ||
| 370 | __u32 reserved; | ||
| 371 | __u32 event; | ||
| 372 | __u32 status; | ||
| 373 | union { | ||
| 374 | struct rdma_ucm_conn_param conn; | ||
| 375 | struct rdma_ucm_ud_param ud; | ||
| 376 | __u64 arg; | ||
| 377 | } param; | ||
| 378 | }; | ||
| 341 | #endif /* RDMA_USER_CM_H */ | 379 | #endif /* RDMA_USER_CM_H */ |
| @@ -11,6 +11,12 @@ · 10 unmodified lines | |||
| 11 | #include <linux/types.h> | 11 | #include <linux/types.h> |
| 12 | #include <asm/byteorder.h> | 12 | #include <asm/byteorder.h> |
| 13 | 13 | ||
| 14 | #ifdef __KERNEL__ | ||
| 15 | #include <linux/stddef.h> /* for offsetof */ | ||
| 16 | #else | ||
| 17 | #include <stddef.h> /* for offsetof */ | ||
| 18 | #endif | ||
| 19 | |||
| 14 | /* | 20 | /* |
| 15 | * Fibre Channel Switch - Enhanced Link Services definitions. | 21 | * Fibre Channel Switch - Enhanced Link Services definitions. |
| 16 | * From T11 FC-LS Rev 1.2 June 7, 2005. | 22 | * From T11 FC-LS Rev 1.2 June 7, 2005. |
| @@ -1109,12 +1115,15 @@ struct fc_els_fpin { · 1092 unmodified lines | |||
| 1109 | 1115 | ||
| 1110 | /* Diagnostic Function Descriptor - FPIN Registration */ | 1116 | /* Diagnostic Function Descriptor - FPIN Registration */ |
| 1111 | struct fc_df_desc_fpin_reg { | 1117 | struct fc_df_desc_fpin_reg { |
| 1112 | __be32 desc_tag; /* FPIN Registration (0x00030001) */ | 1118 | /* New members MUST be added within the __struct_group() macro below. */ |
| 1113 | __be32 desc_len; /* Length of Descriptor (in bytes). | 1119 | __struct_group(fc_df_desc_fpin_reg_hdr, __hdr, /* no attrs */, |
| 1114 | * Size of descriptor excluding | 1120 | __be32 desc_tag; /* FPIN Registration (0x00030001) */ |
| 1115 | * desc_tag and desc_len fields. | 1121 | __be32 desc_len; /* Length of Descriptor (in bytes). |
| 1116 | */ | 1122 | * Size of descriptor excluding |
| 1117 | __be32 count; /* Number of desc_tags elements */ | 1123 | * desc_tag and desc_len fields. |
| 1124 | */ | ||
| 1125 | __be32 count; /* Number of desc_tags elements */ | ||
| 1126 | ); | ||
| 1118 | __be32 desc_tags[]; /* Array of Descriptor Tags. | 1127 | __be32 desc_tags[]; /* Array of Descriptor Tags. |
| 1119 | * Each tag indicates a function | 1128 | * Each tag indicates a function |
| 1120 | * supported by the N_Port (request) | 1129 | * supported by the N_Port (request) |
| @@ -1124,33 +1133,44 @@ struct fc_df_desc_fpin_reg { · 3 unmodified lines | |||
| 1124 | * See ELS_FN_DTAG_xxx for tag values. | 1133 | * See ELS_FN_DTAG_xxx for tag values. |
| 1125 | */ | 1134 | */ |
| 1126 | }; | 1135 | }; |
| 1136 | _Static_assert(offsetof(struct fc_df_desc_fpin_reg, desc_tags) == sizeof(struct fc_df_desc_fpin_reg_hdr), | ||
| 1137 | "struct member likely outside of __struct_group()"); | ||
| 1127 | 1138 | ||
| 1128 | /* | 1139 | /* |
| 1129 | * ELS_RDF - Register Diagnostic Functions | 1140 | * ELS_RDF - Register Diagnostic Functions |
| 1130 | */ | 1141 | */ |
| 1131 | struct fc_els_rdf { | 1142 | struct fc_els_rdf { |
| 1132 | __u8 fpin_cmd; /* command (0x19) */ | 1143 | /* New members MUST be added within the __struct_group() macro below. */ |
| 1133 | __u8 fpin_zero[3]; /* specified as zero - part of cmd */ | 1144 | __struct_group(fc_els_rdf_hdr, __hdr, /* no attrs */, |
| 1134 | __be32 desc_len; /* Length of Descriptor List (in bytes). | 1145 | __u8 fpin_cmd; /* command (0x19) */ |
| 1135 | * Size of ELS excluding fpin_cmd, | 1146 | __u8 fpin_zero[3]; /* specified as zero - part of cmd */ |
| 1136 | * fpin_zero and desc_len fields. | 1147 | __be32 desc_len; /* Length of Descriptor List (in bytes). |
| 1137 | */ | 1148 | * Size of ELS excluding fpin_cmd, |
| 1149 | * fpin_zero and desc_len fields. | ||
| 1150 | */ | ||
| 1151 | ); | ||
| 1138 | struct fc_tlv_desc desc[]; /* Descriptor list */ | 1152 | struct fc_tlv_desc desc[]; /* Descriptor list */ |
| 1139 | }; | 1153 | }; |
| 1154 | _Static_assert(offsetof(struct fc_els_rdf, desc) == sizeof(struct fc_els_rdf_hdr), | ||
| 1155 | "struct member likely outside of __struct_group()"); | ||
| 1140 | 1156 | ||
| 1141 | /* | 1157 | /* |
| 1142 | * ELS RDF LS_ACC Response. | 1158 | * ELS RDF LS_ACC Response. |
| 1143 | */ | 1159 | */ |
| 1144 | struct fc_els_rdf_resp { | 1160 | struct fc_els_rdf_resp { |
| 1145 | struct fc_els_ls_acc acc_hdr; | 1161 | /* New members MUST be added within the __struct_group() macro below. */ |
| 1146 | __be32 desc_list_len; /* Length of response (in | 1162 | __struct_group(fc_els_rdf_resp_hdr, __hdr, /* no attrs */, |
| 1147 | * bytes). Excludes acc_hdr | 1163 | struct fc_els_ls_acc acc_hdr; |
| 1148 | * and desc_list_len fields. | 1164 | __be32 desc_list_len; /* Length of response (in |
| 1149 | */ | 1165 | * bytes). Excludes acc_hdr |
| 1150 | struct fc_els_lsri_desc lsri; | 1166 | * and desc_list_len fields. |
| 1167 | */ | ||
| 1168 | struct fc_els_lsri_desc lsri; | ||
| 1169 | ); | ||
| 1151 | struct fc_tlv_desc desc[]; /* Supported Descriptor list */ | 1170 | struct fc_tlv_desc desc[]; /* Supported Descriptor list */ |
| 1152 | }; | 1171 | }; |
| 1153 | 1172 | _Static_assert(offsetof(struct fc_els_rdf_resp, desc) == sizeof(struct fc_els_rdf_resp_hdr), | |
| 1173 | "struct member likely outside of __struct_group()"); | ||
| 1154 | 1174 | ||
| 1155 | /* | 1175 | /* |
| 1156 | * Diagnostic Capability Descriptors for EDC ELS | 1176 | * Diagnostic Capability Descriptors for EDC ELS |
| @@ -13,8 +13,7 @@ · 12 unmodified lines | |||
| 13 | #include <sound/asound.h> | 13 | #include <sound/asound.h> |
| 14 | #include <sound/compress_params.h> | 14 | #include <sound/compress_params.h> |
| 15 | 15 | ||
| 16 | 16 | #define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 4, 1) | |
| 17 | #define SNDRV_COMPRESS_VERSION SNDRV_PROTOCOL_VERSION(0, 3, 0) | ||
| 18 | /** | 17 | /** |
| 19 | * struct snd_compressed_buffer - compressed buffer | 18 | * struct snd_compressed_buffer - compressed buffer |
| 20 | * @fragment_size: size of buffer fragment in bytes | 19 | * @fragment_size: size of buffer fragment in bytes |
| @@ -56,6 +55,25 @@ struct snd_compr_tstamp { · 35 unmodified lines | |||
| 56 | __u32 sampling_rate; | 55 | __u32 sampling_rate; |
| 57 | } __attribute__((packed, aligned(4))); | 56 | } __attribute__((packed, aligned(4))); |
| 58 | 57 | ||
| 58 | /** | ||
| 59 | * struct snd_compr_tstamp64 - timestamp descriptor with fields in 64 bit | ||
| 60 | * @byte_offset: Byte offset in ring buffer to DSP | ||
| 61 | * @copied_total: Total number of bytes copied from/to ring buffer to/by DSP | ||
| 62 | * @pcm_frames: Frames decoded or encoded by DSP. This field will evolve by | ||
| 63 | * large steps and should only be used to monitor encoding/decoding | ||
| 64 | * progress. It shall not be used for timing estimates. | ||
| 65 | * @pcm_io_frames: Frames rendered or received by DSP into a mixer or an audio | ||
| 66 | * output/input. This field should be used for A/V sync or time estimates. | ||
| 67 | * @sampling_rate: sampling rate of audio | ||
| 68 | */ | ||
| 69 | struct snd_compr_tstamp64 { | ||
| 70 | __u32 byte_offset; | ||
| 71 | __u64 copied_total; | ||
| 72 | __u64 pcm_frames; | ||
| 73 | __u64 pcm_io_frames; | ||
| 74 | __u32 sampling_rate; | ||
| 75 | } __attribute__((packed, aligned(4))); | ||
| 76 | |||
| 59 | /** | 77 | /** |
| 60 | * struct snd_compr_avail - avail descriptor | 78 | * struct snd_compr_avail - avail descriptor |
| 61 | * @avail: Number of bytes available in ring buffer for writing/reading | 79 | * @avail: Number of bytes available in ring buffer for writing/reading |
| @@ -66,6 +84,16 @@ struct snd_compr_avail { · 4 unmodified lines | |||
| 66 | struct snd_compr_tstamp tstamp; | 84 | struct snd_compr_tstamp tstamp; |
| 67 | } __attribute__((packed, aligned(4))); | 85 | } __attribute__((packed, aligned(4))); |
| 68 | 86 | ||
| 87 | /** | ||
| 88 | * struct snd_compr_avail64 - avail descriptor with tstamp in 64 bit format | ||
| 89 | * @avail: Number of bytes available in ring buffer for writing/reading | ||
| 90 | * @tstamp: timestamp information | ||
| 91 | */ | ||
| 92 | struct snd_compr_avail64 { | ||
| 93 | __u64 avail; | ||
| 94 | struct snd_compr_tstamp64 tstamp; | ||
| 95 | } __attribute__((packed, aligned(4))); | ||
| 96 | |||
| 69 | enum snd_compr_direction { | 97 | enum snd_compr_direction { |
| 70 | SND_COMPRESS_PLAYBACK = 0, | 98 | SND_COMPRESS_PLAYBACK = 0, |
| 71 | SND_COMPRESS_CAPTURE, | 99 | SND_COMPRESS_CAPTURE, |
| @@ -189,6 +217,7 @@ struct snd_compr_task_status { · 117 unmodified lines | |||
| 189 | * Note: only codec params can be changed runtime and stream params cant be | 217 | * Note: only codec params can be changed runtime and stream params cant be |
| 190 | * SNDRV_COMPRESS_GET_PARAMS: Query codec params | 218 | * SNDRV_COMPRESS_GET_PARAMS: Query codec params |
| 191 | * SNDRV_COMPRESS_TSTAMP: get the current timestamp value | 219 | * SNDRV_COMPRESS_TSTAMP: get the current timestamp value |
| 220 | * SNDRV_COMPRESS_TSTAMP64: get the current timestamp value in 64 bit format | ||
| 192 | * SNDRV_COMPRESS_AVAIL: get the current buffer avail value. | 221 | * SNDRV_COMPRESS_AVAIL: get the current buffer avail value. |
| 193 | * This also queries the tstamp properties | 222 | * This also queries the tstamp properties |
| 194 | * SNDRV_COMPRESS_PAUSE: Pause the running stream | 223 | * SNDRV_COMPRESS_PAUSE: Pause the running stream |
| @@ -211,6 +240,8 @@ struct snd_compr_task_status { · 16 unmodified lines | |||
| 211 | struct snd_compr_metadata) | 240 | struct snd_compr_metadata) |
| 212 | #define SNDRV_COMPRESS_TSTAMP _IOR('C', 0x20, struct snd_compr_tstamp) | 241 | #define SNDRV_COMPRESS_TSTAMP _IOR('C', 0x20, struct snd_compr_tstamp) |
| 213 | #define SNDRV_COMPRESS_AVAIL _IOR('C', 0x21, struct snd_compr_avail) | 242 | #define SNDRV_COMPRESS_AVAIL _IOR('C', 0x21, struct snd_compr_avail) |
| 243 | #define SNDRV_COMPRESS_TSTAMP64 _IOR('C', 0x22, struct snd_compr_tstamp64) | ||
| 244 | #define SNDRV_COMPRESS_AVAIL64 _IOR('C', 0x23, struct snd_compr_avail64) | ||
| 214 | #define SNDRV_COMPRESS_PAUSE _IO('C', 0x30) | 245 | #define SNDRV_COMPRESS_PAUSE _IO('C', 0x30) |
| 215 | #define SNDRV_COMPRESS_RESUME _IO('C', 0x31) | 246 | #define SNDRV_COMPRESS_RESUME _IO('C', 0x31) |
| 216 | #define SNDRV_COMPRESS_START _IO('C', 0x32) | 247 | #define SNDRV_COMPRESS_START _IO('C', 0x32) |
| @@ -43,7 +43,8 @@ · 42 unmodified lines | |||
| 43 | #define SND_AUDIOCODEC_BESPOKE ((__u32) 0x0000000E) | 43 | #define SND_AUDIOCODEC_BESPOKE ((__u32) 0x0000000E) |
| 44 | #define SND_AUDIOCODEC_ALAC ((__u32) 0x0000000F) | 44 | #define SND_AUDIOCODEC_ALAC ((__u32) 0x0000000F) |
| 45 | #define SND_AUDIOCODEC_APE ((__u32) 0x00000010) | 45 | #define SND_AUDIOCODEC_APE ((__u32) 0x00000010) |
| 46 | #define SND_AUDIOCODEC_MAX SND_AUDIOCODEC_APE | 46 | #define SND_AUDIOCODEC_OPUS_RAW ((__u32) 0x00000011) |
| 47 | #define SND_AUDIOCODEC_MAX SND_AUDIOCODEC_OPUS_RAW | ||
| 47 | 48 | ||
| 48 | /* | 49 | /* |
| 49 | * Profile and modes are listed with bit masks. This allows for a | 50 | * Profile and modes are listed with bit masks. This allows for a |
| @@ -324,6 +325,43 @@ struct snd_dec_ape { · 274 unmodified lines | |||
| 324 | __u32 seek_table_present; | 325 | __u32 seek_table_present; |
| 325 | } __attribute__((packed, aligned(4))); | 326 | } __attribute__((packed, aligned(4))); |
| 326 | 327 | ||
| 328 | /** | ||
| 329 | * struct snd_dec_opus - Opus decoder parameters (raw opus packets) | ||
| 330 | * @version: Usually should be '1' but can be split into major (4 upper bits) | ||
| 331 | * and minor (4 lower bits) sub-fields. | ||
| 332 | * @num_channels: Number of output channels. | ||
| 333 | * @pre_skip: Number of samples to discard at 48 kHz. | ||
| 334 | * @sample_rate: Sample rate of original input. | ||
| 335 | * @output_gain: Gain to apply when decoding (in Q7.8 format). | ||
| 336 | * @mapping_family: Order and meaning of output channels. Only values 0 and 1 | ||
| 337 | * are expected; values 2..255 are not recommended for playback. | ||
| 338 | * | ||
| 339 | * @chan_map: Optional channel mapping table. Describes mapping of opus streams | ||
| 340 | * to decoded channels. Fields: | ||
| 341 | * @chan_map.stream_count: Number of streams encoded in each Ogg packet. | ||
| 342 | * @chan_map.coupled_count: Number of streams whose decoders are used | ||
| 343 | * for two channels. | ||
| 344 | * @chan_map.channel_map: Which decoded channel to be used for each one. | ||
| 345 | * Supports only mapping families 0 and 1, | ||
| 346 | * max number of channels is 8. | ||
| 347 | * | ||
| 348 | * These options were extracted from RFC7845 Section 5. | ||
| 349 | */ | ||
| 350 | |||
| 351 | struct snd_dec_opus { | ||
| 352 | __u8 version; | ||
| 353 | __u8 num_channels; | ||
| 354 | __u16 pre_skip; | ||
| 355 | __u32 sample_rate; | ||
| 356 | __u16 output_gain; | ||
| 357 | __u8 mapping_family; | ||
| 358 | struct snd_dec_opus_ch_map { | ||
| 359 | __u8 stream_count; | ||
| 360 | __u8 coupled_count; | ||
| 361 | __u8 channel_map[8]; | ||
| 362 | } chan_map; | ||
| 363 | } __attribute__((packed, aligned(4))); | ||
| 364 | |||
| 327 | union snd_codec_options { | 365 | union snd_codec_options { |
| 328 | struct snd_enc_wma wma; | 366 | struct snd_enc_wma wma; |
| 329 | struct snd_enc_vorbis vorbis; | 367 | struct snd_enc_vorbis vorbis; |
| @@ -334,6 +372,7 @@ union snd_codec_options { · 4 unmodified lines | |||
| 334 | struct snd_dec_wma wma_d; | 372 | struct snd_dec_wma wma_d; |
| 335 | struct snd_dec_alac alac_d; | 373 | struct snd_dec_alac alac_d; |
| 336 | struct snd_dec_ape ape_d; | 374 | struct snd_dec_ape ape_d; |
| 375 | struct snd_dec_opus opus_d; | ||
| 337 | struct { | 376 | struct { |
| 338 | __u32 out_sample_rate; | 377 | __u32 out_sample_rate; |
| 339 | } src_d; | 378 | } src_d; |
| @@ -133,6 +133,21 @@ enum avs_tplg_token { · 132 unmodified lines | |||
| 133 | AVS_TKN_PATH_FE_FMT_ID_U32 = 1902, | 133 | AVS_TKN_PATH_FE_FMT_ID_U32 = 1902, |
| 134 | AVS_TKN_PATH_BE_FMT_ID_U32 = 1903, | 134 | AVS_TKN_PATH_BE_FMT_ID_U32 = 1903, |
| 135 | 135 | ||
| 136 | /* struct avs_tplg_path_template (conditional) */ | ||
| 137 | AVS_TKN_CONDPATH_TMPL_ID_U32 = 1801, | ||
| 138 | AVS_TKN_CONDPATH_TMPL_SOURCE_TPLG_NAME_STRING = 2002, | ||
| 139 | AVS_TKN_CONDPATH_TMPL_SOURCE_PATH_TMPL_ID_U32 = 2003, | ||
| 140 | AVS_TKN_CONDPATH_TMPL_SINK_TPLG_NAME_STRING = 2004, | ||
| 141 | AVS_TKN_CONDPATH_TMPL_SINK_PATH_TMPL_ID_U32 = 2005, | ||
| 142 | AVS_TKN_CONDPATH_TMPL_COND_TYPE_U32 = 2006, | ||
| 143 | AVS_TKN_CONDPATH_TMPL_OVERRIDABLE_BOOL = 2007, | ||
| 144 | AVS_TKN_CONDPATH_TMPL_PRIORITY_U8 = 2008, | ||
| 145 | |||
| 146 | /* struct avs_tplg_path (conditional) */ | ||
| 147 | AVS_TKN_CONDPATH_ID_U32 = 1901, | ||
| 148 | AVS_TKN_CONDPATH_SOURCE_PATH_ID_U32 = 2102, | ||
| 149 | AVS_TKN_CONDPATH_SINK_PATH_ID_U32 = 2103, | ||
| 150 | |||
| 136 | /* struct avs_tplg_pin_format */ | 151 | /* struct avs_tplg_pin_format */ |
| 137 | AVS_TKN_PIN_FMT_INDEX_U32 = 2201, | 152 | AVS_TKN_PIN_FMT_INDEX_U32 = 2201, |
| 138 | AVS_TKN_PIN_FMT_IOBS_U32 = 2202, | 153 | AVS_TKN_PIN_FMT_IOBS_U32 = 2202, |
| @@ -3,6 +3,8 @@ · 2 unmodified lines | |||
| 3 | #ifndef __SND_AR_TOKENS_H__ | 3 | #ifndef __SND_AR_TOKENS_H__ |
| 4 | #define __SND_AR_TOKENS_H__ | 4 | #define __SND_AR_TOKENS_H__ |
| 5 | 5 | ||
| 6 | #include <linux/types.h> | ||
| 7 | |||
| 6 | #define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1 | 8 | #define APM_SUB_GRAPH_PERF_MODE_LOW_POWER 0x1 |
| 7 | #define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2 | 9 | #define APM_SUB_GRAPH_PERF_MODE_LOW_LATENCY 0x2 |
| 8 | 10 | ||
| @@ -118,6 +120,12 @@ enum ar_event_types { · 109 unmodified lines | |||
| 118 | * LPAIF_WSA = 2, | 120 | * LPAIF_WSA = 2, |
| 119 | * LPAIF_VA = 3, | 121 | * LPAIF_VA = 3, |
| 120 | * LPAIF_AXI = 4 | 122 | * LPAIF_AXI = 4 |
| 123 | * Possible values for MI2S | ||
| 124 | * I2S_INTF_TYPE_PRIMARY = 0, | ||
| 125 | * I2S_INTF_TYPE_SECONDARY = 1, | ||
| 126 | * I2S_INTF_TYPE_TERTIARY = 2, | ||
| 127 | * I2S_INTF_TYPE_QUATERNARY = 3, | ||
| 128 | * I2S_INTF_TYPE_QUINARY = 4, | ||
| 121 | * | 129 | * |
| 122 | * %AR_TKN_U32_MODULE_FMT_INTERLEAVE: PCM Interleaving | 130 | * %AR_TKN_U32_MODULE_FMT_INTERLEAVE: PCM Interleaving |
| 123 | * PCM_INTERLEAVED = 1, | 131 | * PCM_INTERLEAVED = 1, |
| @@ -184,8 +192,8 @@ enum ar_event_types { · 60 unmodified lines | |||
| 184 | #define AR_TKN_U32_MODULE_INSTANCE_ID 201 | 192 | #define AR_TKN_U32_MODULE_INSTANCE_ID 201 |
| 185 | #define AR_TKN_U32_MODULE_MAX_IP_PORTS 202 | 193 | #define AR_TKN_U32_MODULE_MAX_IP_PORTS 202 |
| 186 | #define AR_TKN_U32_MODULE_MAX_OP_PORTS 203 | 194 | #define AR_TKN_U32_MODULE_MAX_OP_PORTS 203 |
| 187 | #define AR_TKN_U32_MODULE_IN_PORTS 204 | 195 | #define AR_TKN_U32_MODULE_IN_PORTS 204 /* deprecated */ |
| 188 | #define AR_TKN_U32_MODULE_OUT_PORTS 205 | 196 | #define AR_TKN_U32_MODULE_OUT_PORTS 205 /* deprecated */ |
| 189 | #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID 206 | 197 | #define AR_TKN_U32_MODULE_SRC_OP_PORT_ID 206 |
| 190 | #define AR_TKN_U32_MODULE_DST_IN_PORT_ID 207 | 198 | #define AR_TKN_U32_MODULE_DST_IN_PORT_ID 207 |
| 191 | #define AR_TKN_U32_MODULE_SRC_INSTANCE_ID 208 | 199 | #define AR_TKN_U32_MODULE_SRC_INSTANCE_ID 208 |
| @@ -232,4 +240,12 @@ enum ar_event_types { · 40 unmodified lines | |||
| 232 | #define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID 260 | 240 | #define AR_TKN_U32_MODULE_LOG_TAP_POINT_ID 260 |
| 233 | #define AR_TKN_U32_MODULE_LOG_MODE 261 | 241 | #define AR_TKN_U32_MODULE_LOG_MODE 261 |
| 234 | 242 | ||
| 243 | #define SND_SOC_AR_TPLG_MODULE_CFG_TYPE 0x01001006 | ||
| 244 | struct audioreach_module_priv_data { | ||
| 245 | __le32 size; /* size in bytes of the array, including all elements */ | ||
| 246 | __le32 type; /* SND_SOC_AR_TPLG_MODULE_CFG_TYPE */ | ||
| 247 | __le32 priv[2]; /* Private data for future expansion */ | ||
| 248 | __le32 data[0]; /* config data */ | ||
| 249 | }; | ||
| 250 | |||
| 235 | #endif /* __SND_AR_TOKENS_H__ */ | 251 | #endif /* __SND_AR_TOKENS_H__ */ |
| @@ -106,6 +106,8 @@ · 105 unmodified lines | |||
| 106 | */ | 106 | */ |
| 107 | #define SOF_TKN_COMP_NO_WNAME_IN_KCONTROL_NAME 417 | 107 | #define SOF_TKN_COMP_NO_WNAME_IN_KCONTROL_NAME 417 |
| 108 | 108 | ||
| 109 | #define SOF_TKN_COMP_SCHED_DOMAIN 418 | ||
| 110 | |||
| 109 | /* SSP */ | 111 | /* SSP */ |
| 110 | #define SOF_TKN_INTEL_SSP_CLKS_CONTROL 500 | 112 | #define SOF_TKN_INTEL_SSP_CLKS_CONTROL 500 |
| 111 | #define SOF_TKN_INTEL_SSP_MCLK_ID 501 | 113 | #define SOF_TKN_INTEL_SSP_MCLK_ID 501 |