Merge tag 'v7.0-rc4' into togreg

Linux 7.0-rc4 Required for the ds4422 series which is build upon; 5187e03b817c ("iio: dac: ds4424: reject -128 RAW value")

Jonathan Cameron committed 7 months ago

Commit 9e4e86a2 parents e8b8349 f338e771405 files · +17925 −9135Browse files

Unified · Split

1405 files

.mailmap +13 −2
CREDITS +8 −0
Documentation/ABI/testing/sysfs-block-zram +2 −2
Documentation/ABI/testing/sysfs-driver-uniwill-laptop +5 −5
Documentation/admin-guide/blockdev/zram.rst +3 −3
Documentation/admin-guide/kernel-parameters.txt +16 −0
Documentation/admin-guide/laptops/uniwill-laptop.rst +1 −1
Documentation/admin-guide/sysctl/net.rst +3 −0
Documentation/devicetree/bindings/display/msm/dp-controller.yaml +20 −1
Documentation/devicetree/bindings/display/msm/qcom,glymur-mdss.yaml +10 −6
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Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml +1 −30
Documentation/hwmon/emc1403.rst +1 −1
Documentation/hwmon/index.rst +0 −1
Documentation/hwmon/sa67.rst +0 −41
Documentation/netlink/specs/nfsd.yaml +2 −2
Documentation/scheduler/sched-ext.rst +27 −3
Documentation/sound/alsa-configuration.rst +4 −0
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MAINTAINERS +57 −65
Makefile +9 −5
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arch/arm/boot/compressed/vmlinux.lds.S +1 −0
arch/arm/kernel/vmlinux-xip.lds.S +1 −0
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arch/arm64/include/asm/pgtable-prot.h +5 −8
arch/arm64/include/asm/runtime-const.h +4 −0
arch/arm64/include/asm/tlbflush.h +37 −26
arch/arm64/kernel/acpi.c +1 −1
arch/arm64/kernel/cpufeature.c +9 −0
arch/arm64/kernel/sys_compat.c +1 −1
arch/arm64/kernel/topology.c +15 −6
arch/arm64/kernel/vmlinux.lds.S +1 −0
arch/arm64/kvm/Kconfig +0 −1
arch/arm64/kvm/arm.c +0 −1
arch/arm64/kvm/at.c +2 −27
arch/arm64/kvm/guest.c +2 −2
arch/arm64/kvm/hyp/nvhe/mem_protect.c +1 −1
arch/arm64/kvm/hyp/nvhe/mm.c +1 −1
arch/arm64/kvm/hyp/nvhe/pkvm.c +34 −3
arch/arm64/kvm/hyp/nvhe/tlb.c +4 −4
arch/arm64/kvm/hyp/pgtable.c +1 −1
arch/arm64/kvm/hyp/vhe/tlb.c +5 −5
arch/arm64/kvm/mmu.c +14 −12
arch/arm64/kvm/nested.c +47 −43
arch/arm64/kvm/sys_regs.c +3 −0
arch/arm64/kvm/vgic/vgic-init.c +16 −16
arch/arm64/kvm/vgic/vgic-v2.c +2 −2
arch/arm64/kvm/vgic/vgic-v3.c +6 −6
arch/arm64/kvm/vgic/vgic.c +6 −0
arch/arm64/lib/delay.c +5 −1
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arch/arm64/mm/ioremap.c +3 −3
arch/arm64/mm/mmap.c +10 −2
arch/arm64/net/bpf_jit_comp.c +1 −1
arch/csky/kernel/vmlinux.lds.S +1 −0
arch/hexagon/kernel/vmlinux.lds.S +1 −0
arch/loongarch/kernel/vmlinux.lds.S +1 −0
arch/loongarch/kvm/Kconfig +0 −1
arch/loongarch/kvm/vcpu.c +1 −1
arch/loongarch/kvm/vm.c +1 −2
arch/m68k/kernel/vmlinux-nommu.lds +1 −0
arch/m68k/kernel/vmlinux-std.lds +1 −0
arch/m68k/kernel/vmlinux-sun3.lds +1 −0
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arch/mips/kvm/Kconfig +0 −1
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arch/nios2/kernel/vmlinux.lds.S +1 −0
arch/openrisc/kernel/vmlinux.lds.S +1 −0
arch/parisc/boot/compressed/vmlinux.lds.S +1 −0
arch/parisc/include/asm/pgtable.h +1 −1
arch/parisc/kernel/head.S +6 −1
arch/parisc/kernel/setup.c +12 −8
arch/parisc/kernel/vmlinux.lds.S +1 −0
arch/powerpc/Kconfig +2 −2
arch/powerpc/boot/dts/asp834x-redboot.dts +1 −1
arch/powerpc/boot/dts/fsl/interlaken-lac-portals.dtsi +0 −156
arch/powerpc/boot/dts/fsl/interlaken-lac.dtsi +0 −45
arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi +0 −43
arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi +0 −80
arch/powerpc/boot/dts/mpc8308_p1m.dts +1 −1
arch/powerpc/boot/dts/mpc8308rdb.dts +1 −1
arch/powerpc/boot/dts/mpc8313erdb.dts +35 −26
arch/powerpc/boot/dts/mpc8315erdb.dts +64 −55
arch/powerpc/boot/dts/mpc832x_rdb.dts +1 −1
arch/powerpc/boot/dts/mpc8349emitx.dts +1 −1
arch/powerpc/boot/dts/mpc8349emitxgp.dts +1 −1
arch/powerpc/boot/dts/mpc8377_rdb.dts +1 −1
arch/powerpc/boot/dts/mpc8377_wlan.dts +1 −1
arch/powerpc/boot/dts/mpc8378_rdb.dts +1 −1
arch/powerpc/boot/dts/mpc8379_rdb.dts +1 −1
arch/powerpc/include/asm/nohash/32/pgtable.h +1 −3
arch/powerpc/include/asm/nohash/32/pte-85xx.h +0 −59
arch/powerpc/include/asm/pgtable-types.h +1 −1
arch/powerpc/include/asm/uaccess.h +46 −21
arch/powerpc/kernel/head_85xx.S +1 −45
arch/powerpc/kernel/iommu.c +1 −1
arch/powerpc/kernel/pci_of_scan.c +7 −0
arch/powerpc/kernel/prom_init.c +2 −1
arch/powerpc/kernel/setup-common.c +0 −10
arch/powerpc/kernel/trace/ftrace.c +22 −4
arch/powerpc/kernel/vmlinux.lds.S +1 −0
arch/powerpc/kexec/core.c +9 −8
arch/powerpc/kexec/file_load_64.c +13 −1
arch/powerpc/kvm/Kconfig +0 −4
arch/powerpc/kvm/book3s.c +2 −2
arch/powerpc/kvm/booke.c +2 −2
arch/powerpc/kvm/e500.h +1 −5
arch/powerpc/kvm/e500_mmu.c +2 −2
arch/powerpc/kvm/e500_mmu_host.c +44 −47
arch/powerpc/kvm/powerpc.c +0 −6
arch/powerpc/lib/copyuser_64.S +1 −0
arch/powerpc/lib/copyuser_power7.S +15 −30
arch/powerpc/lib/vmx-helper.c +2 −0
arch/powerpc/mm/mem.c +14 −0
arch/powerpc/net/bpf_jit.h +0 −5
arch/powerpc/net/bpf_jit_comp.c +56 −71
arch/powerpc/net/bpf_jit_comp64.c +143 −38
arch/powerpc/perf/callchain.c +5 −0
arch/powerpc/perf/callchain_32.c +0 −1
arch/powerpc/perf/callchain_64.c +0 −1
arch/powerpc/platforms/83xx/km83xx.c +2 −2
arch/powerpc/platforms/Kconfig.cputype +2 −2
arch/powerpc/platforms/pseries/msi.c +1 −1
arch/powerpc/tools/check-fpatchable-function-entry.sh +0 −0
arch/powerpc/tools/ftrace-gen-ool-stubs.sh +2 −2
arch/riscv/kernel/vmlinux.lds.S +1 −0
arch/riscv/kvm/Kconfig +0 −1
arch/riscv/kvm/aia.c +13 −2
arch/riscv/kvm/aia_aplic.c +12 −11
arch/riscv/kvm/aia_device.c +14 −4
arch/riscv/kvm/aia_imsic.c +4 −0
arch/riscv/kvm/mmu.c +5 −1
arch/riscv/kvm/vcpu.c +1 −1
arch/riscv/kvm/vcpu_fp.c +13 −4
arch/riscv/kvm/vcpu_onereg.c +36 −18
arch/riscv/kvm/vcpu_pmu.c +12 −4
arch/riscv/kvm/vm.c +1 −2
arch/s390/include/asm/idle.h +2 −2
arch/s390/include/asm/processor.h +1 −1
arch/s390/include/asm/vtime.h +34 −0
arch/s390/kernel/entry.h +0 −2
arch/s390/kernel/idle.c +5 −20
arch/s390/kernel/ipl.c +1 −1
arch/s390/kernel/irq.c +8 −2
arch/s390/kernel/vmlinux.lds.S +1 −0
arch/s390/kernel/vtime.c +10 −32
arch/s390/kvm/Kconfig +0 −2
arch/s390/kvm/kvm-s390.c +2 −3
arch/s390/lib/xor.c +5 −6
arch/s390/mm/pfault.c +2 −2
arch/sh/kernel/vmlinux.lds.S +1 −0
arch/sparc/kernel/iommu.c +2 −0
arch/sparc/kernel/pci.c +7 −0
arch/sparc/kernel/pci_sun4v.c +2 −0
arch/sparc/kernel/vmlinux.lds.S +1 −0
arch/um/drivers/ubd_kern.c +5 −5
arch/um/kernel/dyn.lds.S +1 −0
arch/um/kernel/uml.lds.S +1 −0
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arch/x86/boot/compressed/sev.c +5 −4
arch/x86/boot/compressed/vmlinux.lds.S +1 −1
arch/x86/boot/startup/sev-shared.c +1 −1
arch/x86/coco/sev/core.c +1 −0
arch/x86/entry/entry_fred.c +2 −3
arch/x86/entry/vdso/vdso32/sigreturn.S +30 −0
arch/x86/events/intel/uncore_snbep.c +27 −1
arch/x86/include/asm/bug.h +3 −3
arch/x86/include/asm/cfi.h +8 −4
arch/x86/include/asm/efi.h +1 −1
arch/x86/include/asm/irqflags.h +2 −2
arch/x86/include/asm/kvm_host.h +2 −1
arch/x86/include/asm/linkage.h +2 −2
arch/x86/include/asm/msr-index.h +4 −1
arch/x86/include/asm/numa.h +6 −0
arch/x86/include/asm/percpu.h +1 −1
arch/x86/include/asm/pgtable_64.h +0 −2
arch/x86/include/asm/runtime-const.h +3 −3
arch/x86/include/asm/topology.h +6 −0
arch/x86/include/asm/traps.h +2 −0
arch/x86/include/uapi/asm/kvm.h +1 −0
arch/x86/kernel/alternative.c +22 −7
arch/x86/kernel/apic/apic.c +6 −0
arch/x86/kernel/cpu/common.c +3 −0
arch/x86/kernel/cpu/resctrl/monitor.c +5 −31
arch/x86/kernel/cpu/topology.c +11 −2
arch/x86/kernel/head_64.S +0 −28
arch/x86/kernel/smpboot.c +145 −56
arch/x86/kernel/traps.c +1 −1
arch/x86/kernel/vmlinux.lds.S +1 −0
arch/x86/kvm/Kconfig +0 −1
arch/x86/kvm/cpuid.c +4 −1
arch/x86/kvm/hyperv.c +5 −4
arch/x86/kvm/ioapic.c +2 −1
arch/x86/kvm/svm/avic.c +6 −3
arch/x86/kvm/svm/nested.c +10 −2
arch/x86/kvm/svm/svm.c +11 −6
arch/x86/kvm/svm/svm.h +1 −0
arch/x86/kvm/vmx/nested.c +45 −16
arch/x86/kvm/vmx/nested.h +1 −0
arch/x86/kvm/vmx/vmx.c +7 −3
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arch/x86/mm/extable.c +2 −5
arch/x86/mm/numa.c +8 −0
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arch/x86/net/bpf_jit_comp.c +2 −11
arch/x86/platform/efi/efi.c +1 −1
arch/x86/platform/efi/quirks.c +52 −3
arch/x86/platform/pvh/enlighten.c +1 −6
arch/x86/xen/enlighten_pv.c +1 −1
arch/x86/xen/mmu_pv.c +9 −0
block/blk-map.c +1 −2
block/blk-mq.c +30 −15
block/blk-sysfs.c +7 −1
block/elevator.c +11 −1
crypto/Kconfig +0 −9
crypto/testmgr.c +2 −2
drivers/accel/amdxdna/aie2_ctx.c +17 −28
drivers/accel/amdxdna/aie2_message.c +38 −13
drivers/accel/amdxdna/aie2_pci.c +64 −38
drivers/accel/amdxdna/aie2_pci.h +1 −0
drivers/accel/amdxdna/aie2_pm.c +1 −1
drivers/accel/amdxdna/amdxdna_ctx.c +48 −13
drivers/accel/amdxdna/amdxdna_ctx.h +3 −0
drivers/accel/amdxdna/amdxdna_gem.c +19 −19
drivers/accel/amdxdna/amdxdna_mailbox.c +45 −46
drivers/accel/amdxdna/amdxdna_mailbox.h +17 −14
drivers/accel/amdxdna/amdxdna_pci_drv.c +3 −0
drivers/accel/amdxdna/amdxdna_pm.c +2 −0
drivers/accel/amdxdna/amdxdna_pm.h +11 −0
drivers/accel/amdxdna/amdxdna_ubuf.c +5 −1
drivers/accel/amdxdna/npu1_regs.c +2 −2
drivers/accel/amdxdna/npu4_regs.c +1 −1
drivers/accel/amdxdna/npu5_regs.c +1 −1
drivers/accel/amdxdna/npu6_regs.c +1 −1
drivers/accel/ethosu/ethosu_gem.c +10 −4
drivers/accel/ethosu/ethosu_job.c +18 −8
drivers/accel/ivpu/ivpu_hw_40xx_reg.h +0 −6
drivers/accel/ivpu/ivpu_hw_ip.c +0 −1
drivers/acpi/Kconfig +1 −0
drivers/acpi/acpi_platform.c +1 −1
drivers/acpi/acpi_video.c +22 −23
drivers/acpi/acpica/acpredef.h +3 −2
drivers/acpi/device_pm.c +0 −9
drivers/acpi/osi.c +13 −0
drivers/acpi/osl.c +1 −1
drivers/acpi/scan.c +45 −0
drivers/acpi/sleep.c +8 −0
drivers/android/binder/page_range.rs +64 −20
drivers/android/binder/process.rs +2 −1
drivers/android/binder/range_alloc/array.rs +33 −2
drivers/android/binder/range_alloc/mod.rs +2 −2
drivers/android/binder/range_alloc/tree.rs +9 −9
drivers/android/binder/thread.rs +6 −11
drivers/ata/libata-core.c +5 −5
drivers/ata/libata-eh.c +20 −3
drivers/ata/libata-scsi.c +1 −0
drivers/base/base.h +1 −10
drivers/base/dd.c +1 −1
drivers/base/property.c +13 −14
drivers/block/drbd/drbd_actlog.c +23 −30
drivers/block/drbd/drbd_interval.h +4 −1
drivers/block/drbd/drbd_main.c +9 −5
drivers/block/drbd/drbd_receiver.c +2 −2
drivers/block/drbd/drbd_req.c +2 −1
drivers/block/ublk_drv.c +12 −4
drivers/block/zloop.c +24 −7
drivers/block/zram/zram_drv.c +12 −12
drivers/block/zram/zram_drv.h +1 −1
drivers/bluetooth/hci_qca.c +14 −10
drivers/char/ipmi/ipmi_ipmb.c +5 −0
drivers/char/ipmi/ipmi_msghandler.c +95 −46
drivers/char/ipmi/ipmi_si_intf.c +24 −13
drivers/char/ipmi/ipmi_si_ls2k.c +1 −1
drivers/char/random.c +1 −11
drivers/clk/imx/clk-imx8qxp.c +23 −1
drivers/clk/imx/clk-scu.c +11 −1
drivers/clk/imx/clk-scu.h +2 −0
drivers/cpufreq/intel_pstate.c +8 −6
drivers/cpuidle/cpuidle.c +0 −10
drivers/crypto/atmel-sha204a.c +3 −2
drivers/crypto/ccp/sev-dev-tsm.c +1 −1
drivers/crypto/ccp/sev-dev.c +4 −6
drivers/cxl/core/core.h +18 −0
drivers/cxl/core/hdm.c +1 −1
drivers/cxl/core/mbox.c +9 −2
drivers/cxl/core/memdev.c +9 −4
drivers/cxl/core/pmem.c +32 −10
drivers/cxl/core/port.c +18 −34
drivers/cxl/core/region.c +2 −2
drivers/cxl/cxl.h +7 −0
drivers/cxl/pmem.c +21 −1
drivers/dpll/zl3073x/core.c +2 −5
drivers/dpll/zl3073x/core.h +28 −0
drivers/dpll/zl3073x/dpll.c +5 −2
drivers/dpll/zl3073x/ref.c +20 −5
drivers/dpll/zl3073x/regs.h +1 −0
drivers/firewire/ohci.c +1 −1
drivers/firmware/cirrus/cs_dsp.c +18 −6
drivers/firmware/efi/mokvar-table.c +1 −1
drivers/firmware/stratix10-rsu.c +2 −0
drivers/firmware/stratix10-svc.c +126 −102
drivers/gpib/lpvo_usb_gpib/lpvo_usb_gpib.c +4 −3
drivers/gpio/gpiolib-shared.c +3 −3
drivers/gpio/gpiolib.c +6 −2
drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c +1 −0
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c +5 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +23 −8
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h +8 −8
drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c +7 −5
drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c +81 −35
drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h +4 −0
drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c +33 −31
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c +0 −5
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c +4 −6
drivers/gpu/drm/amd/amdgpu/psp_v15_0.c +10 −10
drivers/gpu/drm/amd/amdgpu/soc21.c +3 −1
drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c +4 −0
drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c +1 −0
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c +4 −2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c +2 −1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c +8 −8
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +8 −0
drivers/gpu/drm/amd/display/dc/core/dc_stream.c +2 −2
drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h +5 −1
drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c +20 −1
drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.h +7 −1
drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h +4 −1
drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h +4 −1
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c +5 −1
drivers/gpu/drm/amd/include/asic_reg/mp/mp_15_0_0_offset.h +18 −0
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c +9 −2
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c +4 −2
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c +2 −1
drivers/gpu/drm/bridge/samsung-dsim.c +14 −9
drivers/gpu/drm/bridge/synopsys/dw-dp.c +3 −1
drivers/gpu/drm/bridge/ti-sn65dsi83.c +7 −6
drivers/gpu/drm/bridge/ti-sn65dsi86.c +4 −2
drivers/gpu/drm/drm_client_modeset.c +2 −1
drivers/gpu/drm/drm_gpusvm.c +5 −5
drivers/gpu/drm/drm_pagemap.c +2 −12
drivers/gpu/drm/gud/gud_drv.c +8 −1
drivers/gpu/drm/gud/gud_internal.h +4 −0
drivers/gpu/drm/gud/gud_pipe.c +36 −18
drivers/gpu/drm/i915/display/intel_alpm.c +1 −12
drivers/gpu/drm/i915/display/intel_display.c +0 −1
drivers/gpu/drm/i915/display/intel_dp.c +7 −0
drivers/gpu/drm/i915/display/intel_psr.c +56 −15
drivers/gpu/drm/i915/display/intel_vdsc.c +23 −0
drivers/gpu/drm/i915/display/intel_vdsc.h +3 −0
drivers/gpu/drm/i915/display/intel_vdsc_regs.h +12 −0
drivers/gpu/drm/i915/display/intel_vrr.c +14 −0
drivers/gpu/drm/i915/gem/i915_gem_shmem.c +9 −3
drivers/gpu/drm/imx/ipuv3/parallel-display.c +3 −1
drivers/gpu/drm/logicvc/logicvc_drm.c +2 −2
drivers/gpu/drm/msm/adreno/a2xx_gpummu.c +1 −1
drivers/gpu/drm/msm/adreno/a6xx_catalog.c +1 −2
drivers/gpu/drm/msm/adreno/a8xx_gpu.c +12 −2
drivers/gpu/drm/msm/adreno/adreno_device.c +1 −0
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h +6 −6
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h +6 −6
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h +2 −2
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h +6 −6
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h +6 −6
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h +6 −6
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c +1 −1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c +3 −1
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +14 −38
drivers/gpu/drm/msm/dsi/dsi_host.c +31 −12
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +11 −11
drivers/gpu/drm/nouveau/nouveau_connector.c +3 −0
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c +6 −6
drivers/gpu/drm/panthor/panthor_sched.c +5 −4
drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c +15 −1
drivers/gpu/drm/scheduler/sched_main.c +1 −0
drivers/gpu/drm/sitronix/st7586.c +6 −9
drivers/gpu/drm/solomon/ssd130x.c +2 −4
drivers/gpu/drm/tiny/sharp-memory.c +2 −2
drivers/gpu/drm/ttm/tests/ttm_bo_test.c +2 −2
drivers/gpu/drm/ttm/ttm_bo.c +5 −6
drivers/gpu/drm/ttm/ttm_pool_internal.h +1 −1
drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c +4 −0
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c +2 −2
drivers/gpu/drm/vmwgfx/vmwgfx_page_dirty.c +8 −1
drivers/gpu/drm/xe/regs/xe_engine_regs.h +6 −0
drivers/gpu/drm/xe/xe_configfs.c +1 −0
drivers/gpu/drm/xe/xe_exec_queue.c +11 −12
drivers/gpu/drm/xe/xe_gsc_proxy.c +35 −8
drivers/gpu/drm/xe/xe_gsc_types.h +2 −0
drivers/gpu/drm/xe/xe_gt.c +54 −12
drivers/gpu/drm/xe/xe_lrc.h +2 −1
drivers/gpu/drm/xe/xe_reg_sr.c +3 −1
drivers/gpu/drm/xe/xe_ring_ops.c +9 −0
drivers/gpu/drm/xe/xe_sync.c +21 −9
drivers/gpu/drm/xe/xe_vm_madvise.c +2 −1
drivers/gpu/drm/xe/xe_wa.c +7 −6
drivers/gpu/nova-core/gsp.rs +24 −22
drivers/gpu/nova-core/gsp/boot.rs +1 −1
drivers/gpu/nova-core/gsp/cmdq.rs +33 −60
drivers/gpu/nova-core/gsp/fw.rs +69 −32
drivers/hid/hid-apple.c +4 −3
drivers/hid/hid-asus.c +14 −4
drivers/hid/hid-cmedia.c +1 −1
drivers/hid/hid-creative-sb0540.c +1 −1
drivers/hid/hid-ids.h +1 −0
drivers/hid/hid-magicmouse.c +2 −4
drivers/hid/hid-mcp2221.c +2 −0
drivers/hid/hid-multitouch.c +38 −5
drivers/hid/hid-zydacron.c +1 −1
drivers/hid/intel-ish-hid/ipc/hw-ish.h +2 −0
drivers/hid/intel-ish-hid/ipc/pci-ish.c +12 −0
drivers/hid/usbhid/hid-pidff.c +7 −4
drivers/hwmon/Kconfig +2 −14
drivers/hwmon/Makefile +0 −1
drivers/hwmon/aht10.c +4 −2
drivers/hwmon/it87.c +4 −1
drivers/hwmon/macsmc-hwmon.c +27 −26
drivers/hwmon/max6639.c +1 −1
drivers/hwmon/pmbus/q54sj108a2.c +10 −9
drivers/hwmon/sa67mcu-hwmon.c +0 −161
drivers/i2c/busses/i2c-i801.c +10 −4
drivers/i3c/Kconfig +12 −0
drivers/i3c/master/dw-i3c-master.c +4 −2
drivers/i3c/master/mipi-i3c-hci/cmd.h +1 −0
drivers/i3c/master/mipi-i3c-hci/cmd_v1.c +3 −5
drivers/i3c/master/mipi-i3c-hci/cmd_v2.c +3 −5
drivers/i3c/master/mipi-i3c-hci/core.c +90 −53
drivers/i3c/master/mipi-i3c-hci/dma.c +84 −74
drivers/i3c/master/mipi-i3c-hci/hci.h +5 −0
drivers/i3c/master/mipi-i3c-hci/pio.c +5 −11
drivers/iio/adc/ad7768-1.c +11 −2
drivers/iio/chemical/bme680_core.c +1 −1
drivers/iio/chemical/sps30_i2c.c +1 −1
drivers/iio/chemical/sps30_serial.c +1 −1
drivers/iio/dac/ds4424.c +1 −1
drivers/iio/frequency/adf4377.c +1 −1
drivers/iio/gyro/mpu3050-core.c +13 −5
drivers/iio/gyro/mpu3050-i2c.c +1 −2
drivers/iio/imu/adis.c +1 −1
drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c +2 −0
drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c +4 −0
drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c +2 −0
drivers/iio/imu/inv_icm45600/inv_icm45600.h +1 −1
drivers/iio/imu/inv_icm45600/inv_icm45600_core.c +8 −3
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c +8 −0
drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h +2 −0
drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c +4 −1
drivers/iio/industrialio-buffer.c +4 −2
drivers/iio/light/bh1780.c +1 −1
drivers/iio/magnetometer/Kconfig +1 −2
drivers/iio/magnetometer/tlv493d.c +1 −1
drivers/iio/potentiometer/mcp4131.c +1 −1
drivers/iio/proximity/hx9023s.c +4 −2
drivers/infiniband/Kconfig +1 −0
drivers/infiniband/core/cache.c +13 −0
drivers/infiniband/core/cma.c +5 −1
drivers/infiniband/core/core_priv.h +3 −0
drivers/infiniband/core/device.c +33 −1
drivers/infiniband/core/umem_dmabuf.c +1 −3
drivers/infiniband/core/uverbs_std_types_dmabuf.c +2 −0
drivers/infiniband/hw/bng_re/bng_dev.c +19 −37
drivers/infiniband/hw/efa/efa_verbs.c +1 −1
drivers/infiniband/hw/ionic/ionic_controlpath.c +1 −1
drivers/infiniband/hw/ionic/ionic_ibdev.c +2 −0
drivers/infiniband/hw/irdma/verbs.c +1 −1
drivers/infiniband/hw/mthca/mthca_provider.c +3 −2
drivers/irqchip/irq-gic-v3-its.c +4 −0
drivers/irqchip/irq-gic-v5-irs.c +1 −1
drivers/irqchip/irq-ls-extirq.c +34 −19
drivers/irqchip/irq-mmp.c +1 −1
drivers/irqchip/irq-riscv-aplic-main.c +17 −4
drivers/irqchip/irq-sifive-plic.c +6 −1
drivers/media/dvb-core/dmxdev.c +3 −1
drivers/media/dvb-core/dvb_net.c +3 −0
drivers/misc/amd-sbi/Kconfig +1 −2
drivers/mmc/host/dw_mmc-rockchip.c +37 −1
drivers/mmc/host/mmci_qcom_dml.c +1 −0
drivers/mmc/host/sdhci-brcmstb.c +1 −1
drivers/net/bonding/bond_main.c +70 −9
drivers/net/bonding/bond_options.c +2 −0
drivers/net/caif/caif_serial.c +3 −0
drivers/net/can/dev/calc_bittiming.c +1 −1
drivers/net/can/dummy_can.c +1 −0
drivers/net/can/spi/hi311x.c +4 −1
drivers/net/can/spi/mcp251x.c +14 −1
drivers/net/can/usb/ems_usb.c +6 −1
drivers/net/can/usb/esd_usb.c +17 −13
drivers/net/can/usb/etas_es58x/es58x_core.c +7 −1
drivers/net/can/usb/f81604.c +40 −5
drivers/net/can/usb/gs_usb.c +16 −6
drivers/net/can/usb/ucan.c +1 −1
drivers/net/dsa/microchip/ksz_ptp.c +8 −3
drivers/net/dsa/mxl862xx/mxl862xx.c +0 −1
drivers/net/dsa/realtek/rtl8365mb.c +2 −3
drivers/net/dsa/realtek/rtl8366rb-leds.c +3 −3
drivers/net/dsa/sja1105/sja1105_main.c +11 −5
drivers/net/ethernet/amd/xgbe/xgbe-common.h +1 −1
drivers/net/ethernet/amd/xgbe/xgbe-drv.c +10 −19
drivers/net/ethernet/amd/xgbe/xgbe-main.c +0 −1
drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c +75 −7
drivers/net/ethernet/amd/xgbe/xgbe.h +4 −3
drivers/net/ethernet/arc/emac_main.c +11 −0
drivers/net/ethernet/broadcom/bnxt/bnxt.c +7 −6
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c +2 −2
drivers/net/ethernet/broadcom/genet/bcmgenet.c +12 −19
drivers/net/ethernet/broadcom/genet/bcmgenet.h +1 −4
drivers/net/ethernet/broadcom/genet/bcmmii.c +5 −5
drivers/net/ethernet/cadence/macb_main.c +95 −3
drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c +9 −1
drivers/net/ethernet/freescale/enetc/enetc.c +1 −1
drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c +10 −14
drivers/net/ethernet/google/gve/gve_tx_dqo.c +25 −31
drivers/net/ethernet/intel/e1000/e1000_main.c +0 −2
drivers/net/ethernet/intel/e1000e/defines.h +1 −0
drivers/net/ethernet/intel/e1000e/e1000.h +3 −1
drivers/net/ethernet/intel/e1000e/hw.h +0 −2
drivers/net/ethernet/intel/e1000e/ich8lan.c +30 −1
drivers/net/ethernet/intel/e1000e/netdev.c +7 −10
drivers/net/ethernet/intel/i40e/i40e_main.c +24 −17
drivers/net/ethernet/intel/i40e/i40e_trace.h +1 −1
drivers/net/ethernet/intel/i40e/i40e_txrx.c +3 −2
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c +7 −7
drivers/net/ethernet/intel/iavf/iavf.h +1 −2
drivers/net/ethernet/intel/iavf/iavf_ethtool.c +6 −13
drivers/net/ethernet/intel/iavf/iavf_main.c +44 −54
drivers/net/ethernet/intel/iavf/iavf_virtchnl.c +0 −1
drivers/net/ethernet/intel/ice/devlink/devlink.c +2 −2
drivers/net/ethernet/intel/ice/ice.h +1 −0
drivers/net/ethernet/intel/ice/ice_base.c +14 −24
drivers/net/ethernet/intel/ice/ice_common.c +11 −4
drivers/net/ethernet/intel/ice/ice_ethtool.c +28 −23
drivers/net/ethernet/intel/ice/ice_idc.c +34 −10
drivers/net/ethernet/intel/ice/ice_lib.c +10 −5
drivers/net/ethernet/intel/ice/ice_main.c +6 −1
drivers/net/ethernet/intel/ice/ice_txrx.c +3 −1
drivers/net/ethernet/intel/ice/ice_xsk.c +3 −0
drivers/net/ethernet/intel/idpf/idpf_ethtool.c +0 −3
drivers/net/ethernet/intel/idpf/idpf_lib.c +1 −0
drivers/net/ethernet/intel/idpf/idpf_txrx.c +10 −4
drivers/net/ethernet/intel/idpf/xdp.c +5 −1
drivers/net/ethernet/intel/idpf/xsk.c +1 −0
drivers/net/ethernet/intel/igb/igb_xsk.c +30 −8
drivers/net/ethernet/intel/igc/igc_main.c +24 −10
drivers/net/ethernet/intel/igc/igc_ptp.c +2 −1
drivers/net/ethernet/intel/ixgbevf/vf.c +2 −1
drivers/net/ethernet/intel/libeth/xsk.c +1 −0
drivers/net/ethernet/intel/libie/fwlog.c +4 −0
drivers/net/ethernet/marvell/octeon_ep/octep_main.c +28 −12
drivers/net/ethernet/marvell/octeon_ep/octep_rx.c +19 −8
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_main.c +28 −10
drivers/net/ethernet/marvell/octeon_ep_vf/octep_vf_rx.c +20 −8
drivers/net/ethernet/marvell/octeontx2/af/rvu_devlink.c +3 −3
drivers/net/ethernet/mediatek/mtk_eth_soc.c +12 −3
drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c +0 −1
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c +1 −2
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c +1 −1
drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +9 −14
drivers/net/ethernet/mellanox/mlx5/core/eswitch.c +4 −3
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h +2 −0
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c +27 −20
drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c +6 −2
drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c +4 −4
drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.h +5 −0
drivers/net/ethernet/mellanox/mlx5/core/sriov.c +2 −0
drivers/net/ethernet/mellanox/mlx5/core/steering/sws/dr_dbg.c +2 −2
drivers/net/ethernet/microsoft/mana/gdma_main.c +5 −1
drivers/net/ethernet/microsoft/mana/mana_en.c +21 −6
drivers/net/ethernet/spacemit/k1_emac.c +13 −6
drivers/net/ethernet/stmicro/stmmac/stmmac.h +1 −0
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +48 −6
drivers/net/ethernet/stmicro/stmmac/stmmac_vlan.c +31 −29
drivers/net/ethernet/ti/am65-cpsw-nuss.c +10 −8
drivers/net/ethernet/ti/am65-cpsw-nuss.h +1 −1
drivers/net/ethernet/ti/cpsw_ale.c +4 −5
drivers/net/ethernet/ti/icssg/icssg_prueth.c +8 −0
drivers/net/ethernet/xscale/ixp4xx_eth.c +1 −4
drivers/net/ethernet/xscale/ptp_ixp46x.c +3 −0
drivers/net/mctp/mctp-i2c.c +1 −0
drivers/net/mctp/mctp-usb.c +1 −2
drivers/net/netconsole.c +3 −2
drivers/net/ovpn/tcp.c +36 −17
drivers/net/phy/phy_device.c +17 −8
drivers/net/phy/qcom/qca807x.c +1 −1
drivers/net/phy/sfp.c +7 −1
drivers/net/team/team_core.c +21 −5
drivers/net/usb/kalmia.c +7 −0
drivers/net/usb/kaweth.c +13 −2
drivers/net/usb/lan78xx.c +8 −6
drivers/net/usb/lan78xx.h +3 −0
drivers/net/usb/pegasus.c +42 −6
drivers/net/usb/qmi_wwan.c +2 −2
drivers/net/usb/r8152.c +1 −0
drivers/net/usb/usbnet.c +4 −3
drivers/net/vxlan/vxlan_core.c +5 −0
drivers/net/wan/farsync.c +2 −0
drivers/net/wireless/ath/ath12k/mac.c +3 −3
drivers/net/wireless/ath/ath12k/wmi.c +13 −23
drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c +3 −4
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +4 −3
drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h +1 −1
drivers/net/wireless/marvell/libertas/main.c +2 −2
drivers/net/wireless/marvell/mwifiex/cfg80211.c +1 −1
drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c +1 −0
drivers/net/wireless/mediatek/mt76/mt7925/mac.c +1 −0
drivers/net/wireless/mediatek/mt76/mt7996/mac.c +1 −0
drivers/net/wireless/rsi/rsi_91x_mac80211.c +1 −1
drivers/net/wireless/st/cw1200/pm.c +2 −0
drivers/net/wireless/ti/wlcore/main.c +2 −2
drivers/net/xen-netfront.c +17 −17
drivers/nfc/pn533/usb.c +1 −0
drivers/nvme/host/core.c +13 −18
drivers/nvme/host/fabrics.c +2 −2
drivers/nvme/host/multipath.c +6 −8
drivers/nvme/host/nvme.h +56 −1
drivers/nvme/host/pci.c +189 −5
drivers/nvme/host/pr.c +2 −2
drivers/nvme/host/sysfs.c +23 −0
drivers/nvme/host/tcp.c +3 −2
drivers/nvme/target/admin-cmd.c +1 −1
drivers/nvme/target/core.c +12 −2
drivers/nvme/target/fcloop.c +11 −4
drivers/nvme/target/nvmet.h +1 −0
drivers/nvme/target/rdma.c +1 −0
drivers/pci/controller/dwc/pcie-designware-ep.c +16 −9
drivers/pci/xen-pcifront.c +4 −4
drivers/pinctrl/cirrus/pinctrl-cs42l43.c +2 −3
drivers/pinctrl/cix/pinctrl-sky1.c +1 −2
drivers/pinctrl/meson/pinctrl-amlogic-a4.c +1 −2
drivers/pinctrl/pinconf-generic.c +2 −2
drivers/pinctrl/pinctrl-amdisp.c +1 −1
drivers/pinctrl/pinctrl-cy8c95x0.c +2 −2
drivers/pinctrl/pinctrl-equilibrium.c +19 −12
drivers/pinctrl/pinctrl-rockchip.c +4 −8
drivers/pinctrl/qcom/pinctrl-qcs615.c +1 −0
drivers/pinctrl/qcom/pinctrl-sdm660-lpass-lpi.c +2 −2
drivers/pinctrl/sunxi/pinctrl-sunxi.c +51 −0
drivers/platform/x86/asus-armoury.h +75 −0
drivers/platform/x86/dell/alienware-wmi-wmax.c +1 −1
drivers/platform/x86/dell/dell-wmi-base.c +6 −0
drivers/platform/x86/dell/dell-wmi-sysman/passwordattr-interface.c +0 −1
drivers/platform/x86/hp/hp-bioscfg/enum-attributes.c +6 −3
drivers/platform/x86/hp/hp-wmi.c +11 −1
drivers/platform/x86/intel/hid.c +19 −0
drivers/platform/x86/intel/int3472/discrete.c +7 −0
drivers/platform/x86/lenovo/thinkpad_acpi.c +4 −2
drivers/platform/x86/oxpec.c +29 −1
drivers/platform/x86/redmi-wmi.c +24 −1
drivers/platform/x86/touchscreen_dmi.c +18 −0
drivers/platform/x86/uniwill/uniwill-acpi.c +75 −35
drivers/platform/x86/uniwill/uniwill-wmi.h +3 −3
drivers/pmdomain/bcm/bcm2835-power.c +3 −3
drivers/pmdomain/imx/gpcv2.c +3 −1
drivers/pmdomain/rockchip/pm-domains.c +1 −1
drivers/power/sequencing/pwrseq-pcie-m2.c +1 −1
drivers/regulator/Kconfig +1 −1
drivers/regulator/bq257xx-regulator.c +1 −2
drivers/regulator/fp9931.c +3 −4
drivers/regulator/mt6363-regulator.c +1 −3
drivers/regulator/pca9450-regulator.c +10 −4
drivers/regulator/pf9453-regulator.c +1 −1
drivers/regulator/tps65185.c +3 −0
drivers/remoteproc/imx_rproc.c +1 −1
drivers/remoteproc/mtk_scp.c +39 −0
drivers/remoteproc/qcom_sysmon.c +1 −1
drivers/remoteproc/qcom_wcnss.c +1 −1
drivers/s390/block/dasd_eckd.c +16 −0
drivers/s390/crypto/zcrypt_ccamisc.c +7 −5
drivers/s390/crypto/zcrypt_cex4.c +1 −2
drivers/scsi/hisi_sas/hisi_sas_main.c +1 −1
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c +1 −1
drivers/scsi/lpfc/lpfc_init.c +2 −0
drivers/scsi/lpfc/lpfc_sli.c +30 −6
drivers/scsi/lpfc/lpfc_sli4.h +3 −0
drivers/scsi/mpi3mr/mpi3mr_fw.c +29 −15
drivers/scsi/pm8001/pm8001_sas.c +3 −2
drivers/scsi/qla2xxx/qla_iocb.c +0 −2
drivers/scsi/scsi_devinfo.c +1 −1
drivers/scsi/scsi_scan.c +2 −5
drivers/scsi/ses.c +2 −3
drivers/scsi/snic/vnic_dev.c +0 −9
drivers/scsi/storvsc_drv.c +3 −2
drivers/scsi/xen-scsifront.c +1 −1
drivers/spi/spi-amlogic-spifc-a4.c +2 −3
drivers/spi/spi-atcspi200.c +16 −22
drivers/spi/spi-cadence-quadspi.c +6 −0
drivers/spi/spi-dw-dma.c +1 −1
drivers/spi/spi-intel-pci.c +1 −0
drivers/spi/spi-rockchip-sfc.c +1 −1
drivers/spi/spi-stm32.c +3 −0
drivers/staging/rtl8723bs/core/rtw_ieee80211.c +10 −5
drivers/staging/rtl8723bs/core/rtw_mlme.c +4 −1
drivers/staging/sm750fb/sm750.c +1 −0
drivers/staging/sm750fb/sm750_hw.c +11 −11
drivers/target/target_core_configfs.c +6 −9
drivers/ufs/core/ufshcd.c +35 −14
drivers/usb/class/cdc-acm.c +5 −0
drivers/usb/class/cdc-acm.h +1 −0
drivers/usb/class/cdc-wdm.c +3 −1
drivers/usb/class/usbtmc.c +3 −3
drivers/usb/core/config.c +5 −1
drivers/usb/core/message.c +79 −21
drivers/usb/core/phy.c +1 −7
drivers/usb/core/quirks.c +21 −0
drivers/usb/dwc3/dwc3-pci.c +2 −0
drivers/usb/gadget/function/f_hid.c +4 −0
drivers/usb/gadget/function/f_mass_storage.c +10 −2
drivers/usb/gadget/function/f_ncm.c +80 −66
drivers/usb/gadget/function/f_tcm.c +14 −0
drivers/usb/gadget/function/u_ether.c +22 −45
drivers/usb/gadget/function/u_ether.h +26 −30
drivers/usb/gadget/function/u_ether_configfs.h +0 −177
drivers/usb/gadget/function/u_ncm.h +1 −3
drivers/usb/gadget/function/uvc_video.c +1 −1
drivers/usb/host/xhci-debugfs.c +9 −1
drivers/usb/host/xhci-ring.c +1 −0
drivers/usb/host/xhci.c +2 −2
drivers/usb/image/mdc800.c +4 −2
drivers/usb/misc/uss720.c +1 −1
drivers/usb/misc/yurex.c +1 −1
drivers/usb/renesas_usbhs/common.c +9 −0
drivers/usb/roles/class.c +6 −1
drivers/usb/typec/altmodes/displayport.c +6 −1
drivers/usb/typec/tcpm/tcpm.c +1 −1
drivers/video/fbdev/au1100fb.c +6 −2
drivers/xen/xen-acpi-processor.c +2 −5
drivers/xen/xen-pciback/xenbus.c +5 −5
drivers/xen/xenbus/xenbus_client.c +14 −3
drivers/xen/xenbus/xenbus_probe.c +39 −3
drivers/xen/xenbus/xenbus_probe_frontend.c +1 −1
fs/afs/addr_list.c +4 −4
fs/binfmt_elf.c +2 −1
fs/btrfs/block-group.c +0 −1
fs/btrfs/delayed-inode.c +1 −1
fs/btrfs/disk-io.c +27 −16
fs/btrfs/extent-tree.c +7 −1
fs/btrfs/extent_io.c +1 −0
fs/btrfs/inode.c +36 −2
fs/btrfs/ioctl.c +34 −5
fs/btrfs/messages.h +0 −3
fs/btrfs/print-tree.c +10 −0
fs/btrfs/qgroup.c +1 −1
fs/btrfs/relocation.c +8 −0
fs/btrfs/scrub.c +1 −1
fs/btrfs/space-info.c +4 −1
fs/btrfs/transaction.c +16 −0
fs/btrfs/tree-checker.c +2 −2
fs/btrfs/uuid-tree.c +38 −0
fs/btrfs/uuid-tree.h +2 −0
fs/btrfs/volumes.c +5 −3
fs/ceph/addr.c +0 −1
fs/ceph/debugfs.c +2 −2
fs/ceph/dir.c +15 −2
fs/ceph/file.c +2 −2
fs/ceph/inode.c +1 −1
fs/ceph/mds_client.c +3 −0
fs/erofs/inode.c +6 −1
fs/erofs/internal.h +7 −9
fs/erofs/ishare.c +9 −5
fs/erofs/super.c +36 −49
fs/erofs/zmap.c +5 −4
fs/eventpoll.c +3 −2
fs/file_attr.c +1 −1
fs/fs-writeback.c +5 −4
fs/iomap/buffered-io.c +13 −3
fs/iomap/direct-io.c +14 −1
fs/iomap/ioend.c +53 −6
fs/minix/bitmap.c +1 −1
fs/namespace.c +74 −59
fs/netfs/direct_write.c +212 −16
fs/netfs/internal.h +3 −1
fs/netfs/write_collect.c +0 −21
fs/netfs/write_issue.c +3 −38
fs/nfs/Kconfig +2 −1
fs/nfs/nfs3proc.c +6 −1
fs/nfsd/nfsctl.c +11 −11
fs/nfsd/nfssvc.c +4 −3
fs/nsfs.c +14 −1
fs/pidfs.c +4 −6
fs/proc/base.c +3 −0
fs/smb/client/Makefile +2 −0
fs/smb/client/cached_dir.c +1 −1
fs/smb/client/cifs_fs_sb.h +1 −1
fs/smb/client/cifs_ioctl.h +0 −8
fs/smb/client/cifs_unicode.c +0 −14
fs/smb/client/cifs_unicode.h +13 −1
fs/smb/client/cifsacl.c +7 −12
fs/smb/client/cifsfs.c +50 −43
fs/smb/client/cifsglob.h +67 −17
fs/smb/client/cifsproto.h +23 −4
fs/smb/client/connect.c +44 −36
fs/smb/client/dfs_cache.c +1 −1
fs/smb/client/dir.c +29 −24
fs/smb/client/file.c +114 −118
fs/smb/client/fs_context.c +75 −76
fs/smb/client/fs_context.h +1 −1
fs/smb/client/inode.c +77 −71
fs/smb/client/ioctl.c +1 −1
fs/smb/client/link.c +8 −6
fs/smb/client/misc.c +52 −6
fs/smb/client/readdir.c +21 −18
fs/smb/client/reparse.c +14 −13
fs/smb/client/reparse.h +2 −2
fs/smb/client/smb1encrypt.c +2 −1
fs/smb/client/smb1ops.c +15 −9
fs/smb/client/smb2file.c +1 −1
fs/smb/client/smb2glob.h +12 −0
fs/smb/client/smb2inode.c +15 −15
fs/smb/client/smb2maperror.c +18 −13
fs/smb/client/smb2maperror_test.c +9 −3
fs/smb/client/smb2misc.c +4 −14
fs/smb/client/smb2ops.c +18 −8
fs/smb/client/smb2pdu.c +19 −39
fs/smb/client/smb2pdu.h +5 −2
fs/smb/client/smb2proto.h +0 −3
fs/smb/client/smb2transport.c +3 −1
fs/smb/client/trace.h +2 −0
fs/smb/client/transport.c +10 −11
fs/smb/client/xattr.c +3 −3
fs/smb/server/Kconfig +1 −0
fs/smb/server/auth.c +5 −21
fs/smb/server/oplock.c +25 −10
fs/smb/server/oplock.h +3 −2
fs/smb/server/smb2pdu.c +7 −6
fs/smb/server/smb2pdu.h +4 −1
fs/smb/server/transport_rdma.c +2 −2
fs/smb/server/vfs_cache.c +5 −5
fs/squashfs/cache.c +3 −0
fs/verity/Kconfig +3 −0
fs/xfs/libxfs/xfs_ag.c +28 −0
fs/xfs/libxfs/xfs_ag.h +3 −0
fs/xfs/libxfs/xfs_da_btree.c +2 −6
fs/xfs/libxfs/xfs_defer.c +1 −1
fs/xfs/libxfs/xfs_inode_buf.c +4 −0
fs/xfs/libxfs/xfs_metafile.c +5 −0
fs/xfs/libxfs/xfs_ondisk.h +36 −16
fs/xfs/libxfs/xfs_sb.c +3 −0
fs/xfs/scrub/dir_repair.c +1 −1
fs/xfs/scrub/orphanage.c +6 −1
fs/xfs/xfs_bmap_item.c +1 −1
fs/xfs/xfs_dquot.c +7 −1
fs/xfs/xfs_fsops.c +2 −15
fs/xfs/xfs_health.c +18 −2
fs/xfs/xfs_healthmon.c +17 −11
fs/xfs/xfs_icache.c +14 −5
fs/xfs/xfs_log.c +2 −0
fs/xfs/xfs_mount.h +1 −1
fs/xfs/xfs_notify_failure.c +2 −2
fs/xfs/xfs_platform.h +9 −0
fs/xfs/xfs_rtalloc.c +37 −7
fs/xfs/xfs_stats.c +11 −6
fs/xfs/xfs_stats.h +10 −9
fs/xfs/xfs_super.c +2 −2
fs/xfs/xfs_verify_media.c +2 −2
fs/xfs/xfs_zone_alloc.c +3 −3
fs/xfs/xfs_zone_gc.c +5 −7
include/asm-generic/vmlinux.lds.h +3 −1
include/drm/display/drm_dp.h +2 −0
include/kunit/run-in-irq-context.h +28 −16
include/linux/bpf.h +2 −2
include/linux/bpf_local_storage.h +1 −1
include/linux/bpf_mem_alloc.h +6 −0
include/linux/device/bus.h +2 −0
include/linux/eventpoll.h +7 −4
include/linux/firmware/intel/stratix10-svc-client.h +4 −4
include/linux/fsnotify.h +0 −13
include/linux/gfp.h +7 −4
include/linux/gfp_types.h +2 −0
include/linux/hid.h +6 −0
include/linux/indirect_call_wrapper.h +11 −7
include/linux/io_uring_types.h +1 −0
include/linux/ipv6.h +6 −1
include/linux/irqchip/arm-gic-v3.h +1 −0
include/linux/jiffies.h +38 −2
include/linux/kthread.h +20 −1
include/linux/kvm_host.h +36 −54
include/linux/liveupdate.h +6 −3
include/linux/migrate.h +9 −1
include/linux/mm.h +6 −11
include/linux/mmc/host.h +5 −4
include/linux/mmu_notifier.h +16 −15
include/linux/netdevice.h +54 −5
include/linux/ns_common.h +2 −0
include/linux/nvme-auth.h +1 −1
include/linux/overflow.h +4 −4
include/linux/platform_data/mlxreg.h +7 −7
include/linux/platform_data/x86/int3472.h +3 −2
include/linux/pm_runtime.h +2 −14
include/linux/ring_buffer.h +1 −0
include/linux/rseq.h +12 −0
include/linux/rseq_entry.h +4 −4
include/linux/rseq_types.h +5 −1
include/linux/sched.h +1 −2
include/linux/slab.h +0 −12
include/linux/tnum.h +3 −0
include/linux/uaccess.h +22 −36
include/linux/usb.h +6 −2
include/linux/usb/quirks.h +3 −0
include/linux/usb/r8152.h +1 −0
include/linux/usb/usbnet.h +1 −0
include/net/act_api.h +1 −0
include/net/af_vsock.h +11 −2
include/net/bluetooth/l2cap.h +5 −3
include/net/bonding.h +1 −0
include/net/inet6_hashtables.h +1 −1
include/net/inet_connection_sock.h +3 −1
include/net/inet_hashtables.h +1 −1
include/net/ip.h +1 −1
include/net/ip6_tunnel.h +14 −0
include/net/ip_fib.h +1 −1
include/net/ip_tunnels.h +7 −0
include/net/libeth/xsk.h +3 −0
include/net/netfilter/nf_tables.h +7 −0
include/net/netns/vsock.h +3 −0
include/net/page_pool/types.h +1 −1
include/net/sch_generic.h +10 −0
include/net/secure_seq.h +38 −7
include/net/sock.h +1 −1
include/net/tc_act/tc_gate.h +26 −7
include/net/tc_act/tc_ife.h +1 −3
include/net/tcp.h +7 −3
include/net/xdp_sock_drv.h +13 −3
include/rdma/rdma_cm.h +1 −1
include/sound/cs35l56.h +1 −0
include/sound/tas2781.h +1 −0
include/trace/events/kmem.h +7 −1
include/trace/events/netfs.h +3 −1
include/uapi/drm/drm_fourcc.h +6 −6
include/uapi/linux/dma-buf.h +1 −0
include/uapi/linux/io_uring.h +2 −1
include/uapi/linux/kvm.h +8 −0
include/uapi/linux/pci_regs.h +1 −1
include/uapi/linux/rseq.h +22 −4
include/xen/xenbus.h +3 −1
init/Kconfig +2 −2
io_uring/bpf_filter.c +1 −1
io_uring/cmd_net.c +1 −1
io_uring/eventfd.c +7 −3
io_uring/io_uring.c +3 −1
io_uring/kbuf.c +11 −2
io_uring/net.c +2 −0
io_uring/register.c +13 −2
io_uring/timeout.c +2 −2
io_uring/tw.c +20 −2
io_uring/zcrx.c +5 −3
kernel/bpf/arena.c +1 −1
kernel/bpf/arraymap.c +1 −1
kernel/bpf/bloom_filter.c +1 −1
kernel/bpf/bpf_insn_array.c +1 −1
kernel/bpf/bpf_local_storage.c +39 −36
kernel/bpf/cpumap.c +15 −2
kernel/bpf/devmap.c +38 −9
kernel/bpf/hashtab.c +86 −0
kernel/bpf/local_storage.c +1 −1
kernel/bpf/lpm_trie.c +1 −1
kernel/bpf/memalloc.c +47 −11
kernel/bpf/syscall.c +1 −1
kernel/bpf/tnum.c +56 −0
kernel/bpf/trampoline.c +1 −3
kernel/bpf/verifier.c +64 −4
kernel/cgroup/cgroup.c +7 −0
kernel/cgroup/cpuset.c +154 −75
kernel/configs/debug.config +0 −1
kernel/dma/direct.h +1 −1
kernel/events/core.c +62 −21
kernel/exit.c +6 −0
kernel/fork.c +2 −3
kernel/kcsan/kcsan_test.c +1 −1
kernel/kprobes.c +6 −2
kernel/kthread.c +5 −36
kernel/liveupdate/luo_file.c +25 −16
kernel/module/Kconfig +13 −10
kernel/module/main.c +7 −6
kernel/nscommon.c +6 −0
kernel/nstree.c +4 −25
kernel/rseq.c +5 −3
kernel/sched/core.c +29 −51
kernel/sched/ext.c +92 −27
kernel/sched/ext_idle.c +2 −3
kernel/sched/ext_internal.h +99 −17
kernel/sched/fair.c +112 −38
kernel/sched/idle.c +10 −1
kernel/sched/isolation.c +1 −3
kernel/sched/sched.h +11 −0
kernel/sched/syscalls.c +30 −0
kernel/time/jiffies.c +0 −2
kernel/time/time.c +8 −13
kernel/time/timekeeping.c +4 −2
kernel/time/timer_migration.c +1 −3
kernel/trace/blktrace.c +1 −2
kernel/trace/bpf_trace.c +3 −1
kernel/trace/ftrace.c +4 −0
kernel/trace/ring_buffer.c +21 −0
kernel/trace/trace.c +16 −3
kernel/trace/trace_events.c +44 −16
kernel/trace/trace_events_trigger.c +3 −0
kernel/trace/trace_functions_graph.c +13 −6
kernel/workqueue.c +28 −27
kernel/workqueue_internal.h +1 −0
lib/Kconfig.debug +3 −29
lib/bootconfig.c +3 −3
lib/crypto/.kunitconfig +34 −0
lib/crypto/tests/Kconfig +12 −23
lib/debugobjects.c +18 −1
lib/kunit/test.c +125 −106
mm/cma.c +4 −1
mm/damon/core.c +9 −1
mm/filemap.c +10 −5
mm/huge_memory.c +12 −4
mm/hugetlb.c +2 −2
mm/kfence/core.c +23 −6
mm/madvise.c +1 −1
mm/memcontrol.c +1 −1
mm/memfd_luo.c +49 −7
mm/memory.c +2 −1
mm/migrate.c +4 −4
mm/migrate_device.c +1 −1
mm/mm_init.c +5 −1
mm/page_alloc.c +2 −1
mm/slab.h +7 −7
mm/slub.c +86 −45
net/atm/lec.c +15 −11
net/batman-adv/bat_v_elp.c +9 −1
net/batman-adv/hard-interface.c +4 −4
net/batman-adv/hard-interface.h +1 −0
net/bluetooth/hci_sock.c +1 −0
net/bluetooth/hci_sync.c +1 −1
net/bluetooth/iso.c +1 −0
net/bluetooth/l2cap_core.c +70 −25
net/bluetooth/l2cap_sock.c +12 −4
net/bluetooth/sco.c +1 −0
net/bridge/br_device.c +1 −1
net/bridge/br_input.c +1 −1
net/bridge/br_private.h +10 −0
net/bridge/br_vlan_options.c +23 −3
net/can/bcm.c +1 −0
net/ceph/auth.c +4 −2
net/ceph/messenger_v2.c +21 −10
net/ceph/mon_client.c +3 −3
net/core/dev.c +36 −23
net/core/dev.h +0 −35
net/core/devmem.c +4 −2
net/core/filter.c +11 −2
net/core/neighbour.c +2 −1
net/core/netpoll.c +1 −1
net/core/page_pool_user.c +2 −2
net/core/secure_seq.c +29 −51
net/core/skbuff.c +18 −5
net/core/skmsg.c +7 −7
net/ipv4/Kconfig +2 −0
net/ipv4/af_inet.c +6 −0
net/ipv4/inet_hashtables.c +4 −4
net/ipv4/ip_tunnel_core.c +15 −0
net/ipv4/nexthop.c +11 −3
net/ipv4/syncookies.c +9 −4
net/ipv4/sysctl_net_ipv4.c +3 −2
net/ipv4/tcp.c +4 −3
net/ipv4/tcp_ao.c +2 −1
net/ipv4/tcp_bpf.c +1 −1
net/ipv4/tcp_diag.c +1 −1
net/ipv4/tcp_fastopen.c +1 −1
net/ipv4/tcp_input.c +29 −27
net/ipv4/tcp_ipv4.c +26 −22
net/ipv4/tcp_minisocks.c +2 −2
net/ipv4/udp.c +16 −11
net/ipv4/udp_bpf.c +1 −1
net/ipv4/udplite.c +1 −2
net/ipv6/af_inet6.c +0 −8
net/ipv6/inet6_hashtables.c +2 −1
net/ipv6/route.c +5 −6
net/ipv6/syncookies.c +8 −3
net/ipv6/tcp_ipv6.c +61 −77
net/ipv6/udplite.c +1 −2
net/ipv6/xfrm6_policy.c +5 −2
net/kcm/kcmsock.c +19 −2
net/mac80211/eht.c +1 −0
net/mac80211/link.c +2 −0
net/mac80211/mesh.c +3 −0
net/mac80211/mlme.c +3 −0
net/mctp/route.c +7 −4
net/mptcp/pm.c +43 −12
net/mptcp/pm_kernel.c +9 −0
net/mptcp/subflow.c +4 −2
net/ncsi/ncsi-aen.c +2 −1
net/ncsi/ncsi-rsp.c +12 −4
net/netfilter/nf_conntrack_h323_asn1.c +1 −1
net/netfilter/nf_tables_api.c +26 −23
net/netfilter/nfnetlink_cthelper.c +4 −4
net/netfilter/nfnetlink_queue.c +3 −1
net/netfilter/nft_chain_filter.c +1 −1
net/netfilter/nft_set_hash.c +1 −0
net/netfilter/nft_set_pipapo.c +54 −11
net/netfilter/nft_set_pipapo.h +2 −0
net/netfilter/nft_set_rbtree.c +5 −3
net/netfilter/xt_IDLETIMER.c +6 −0
net/netfilter/xt_dccp.c +2 −2
net/netfilter/xt_tcpudp.c +4 −2
net/nfc/digital_core.c +6 −2
net/nfc/nci/core.c +27 −3
net/nfc/nci/data.c +8 −4
net/nfc/rawsock.c +11 −0
net/psp/psp_main.c +38 −1
net/rds/connection.c +3 −0
net/rds/tcp.c +10 −4
net/rds/tcp_listen.c +5 −23
net/rxrpc/af_rxrpc.c +5 −3
net/sched/act_ct.c +6 −0
net/sched/act_gate.c +186 −79
net/sched/act_ife.c +44 −49
net/sched/cls_api.c +7 −0
net/sched/sch_cake.c +25 −28
net/sched/sch_ets.c +8 −4
net/sched/sch_fq.c +1 −0
net/sched/sch_teql.c +1 −0
net/shaper/shaper.c +2 −9
net/smc/af_smc.c +4 −2
net/socket.c +1 −1
net/sunrpc/xprtrdma/verbs.c +4 −3
net/tipc/name_table.c +4 −2
net/tipc/socket.c +2 −0
net/tls/tls_sw.c +1 −1
net/unix/af_unix.c +4 −4
net/vmw_vsock/af_vsock.c +12 −7
net/wireless/core.c +1 −0
net/wireless/radiotap.c +2 −2
net/wireless/wext-compat.c +1 −1
net/xdp/xsk.c +16 −10
net/xfrm/espintcp.c +1 −1
net/xfrm/xfrm_device.c +11 −1
net/xfrm/xfrm_policy.c +9 −2
rust/Makefile +5 −6
rust/kernel/cpufreq.rs +1 −0
rust/kernel/dma.rs +50 −64
rust/kernel/io.rs +89 −42
rust/kernel/kunit.rs +8 −0
rust/kernel/lib.rs +4 −0
rust/kernel/pci/io.rs +12 −12
rust/kernel/ptr.rs +29 −1
rust/kernel/ptr/projection.rs +305 −0
rust/kernel/str.rs +2 −2
rust/pin-init/internal/src/init.rs +23 −46
rust/pin-init/src/__internal.rs +24 −4
samples/rust/rust_dma.rs +16 −14
samples/workqueue/stall_detector/Makefile +1 −0
samples/workqueue/stall_detector/wq_stall.c +98 −0
scripts/Makefile.build +3 −1
scripts/genksyms/parse.y +2 −2
scripts/package/install-extmod-build +4 −0
security/apparmor/apparmorfs.c +134 −91
security/apparmor/include/label.h +8 −8
security/apparmor/include/lib.h +12 −0
security/apparmor/include/match.h +1 −0
security/apparmor/include/policy.h +5 −5
security/apparmor/include/policy_ns.h +2 −0
security/apparmor/include/policy_unpack.h +45 −30
security/apparmor/label.c +8 −4
security/apparmor/match.c +42 −16
security/apparmor/policy.c +67 −10
security/apparmor/policy_ns.c +2 −0
security/apparmor/policy_unpack.c +37 −12
sound/core/pcm_native.c +16 −3
sound/firewire/dice/dice.c +1 −1
sound/hda/codecs/ca0132.c +9 −0
sound/hda/codecs/hdmi/tegrahdmi.c +1 −0
sound/hda/codecs/realtek/alc269.c +40 −1
sound/hda/codecs/realtek/alc662.c +9 −0
sound/hda/codecs/senarytech.c +8 −6
sound/hda/codecs/side-codecs/cs35l56_hda.c +1 −6
sound/hda/codecs/side-codecs/tas2781_hda_i2c.c +3 −12
sound/hda/controllers/intel.c +2 −0
sound/soc/amd/acp/acp-mach-common.c +14 −4
sound/soc/amd/acp/amd-acp63-acpi-match.c +413 −0
sound/soc/amd/acp3x-rt5682-max9836.c +7 −2
sound/soc/amd/yc/acp6x-mach.c +14 −0
sound/soc/codecs/cs35l56-shared.c +15 −1
sound/soc/codecs/cs35l56.c +10 −2
sound/soc/codecs/cs42l43-jack.c +1 −0
sound/soc/codecs/rt1011.c +1 −1
sound/soc/codecs/rt1320-sdw.c +3 −2
sound/soc/codecs/tas2781-fmwlib.c +94 −0
sound/soc/fsl/fsl_easrc.c +10 −4
sound/soc/generic/simple-card-utils.c +8 −4
sound/soc/intel/boards/sof_sdw.c +8 −0
sound/soc/qcom/qdsp6/q6apm-dai.c +1 −0
sound/soc/qcom/qdsp6/q6apm-lpass-dais.c +1 −0
sound/soc/qcom/qdsp6/q6apm.c +1 −0
sound/soc/sdca/sdca_functions.c +4 −1
sound/soc/sdca/sdca_interrupts.c +2 −2
sound/soc/soc-core.c +8 −3
sound/soc/tegra/tegra_audio_graph_card.c +11 −0
sound/usb/endpoint.c +7 −3
sound/usb/format.c +65 −5
sound/usb/mixer_s1810c.c +6 −6
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sound/usb/qcom/qc_audio_offload.c +1 −1
sound/usb/quirks.c +9 −1
sound/usb/stream.c +3 −0
sound/usb/usbaudio.h +6 −0
sound/usb/usx2y/us122l.c +2 −10
sound/usb/usx2y/us144mkii.c +7 −7
sound/usb/usx2y/us144mkii_capture.c +6 −6
sound/usb/usx2y/us144mkii_controls.c +21 −21
sound/usb/usx2y/us144mkii_midi.c +11 −11
sound/usb/usx2y/us144mkii_playback.c +5 −5
sound/usb/validate.c +1 −1
tools/arch/x86/include/asm/amd/ibs.h +1 −1
tools/arch/x86/include/asm/cpufeatures.h +3 −1
tools/arch/x86/include/asm/msr-index.h +6 −0
tools/arch/x86/include/uapi/asm/kvm.h +6 −2
tools/bootconfig/samples/bad-non-closed-brace.bconf +4 −0
tools/bootconfig/samples/bad-over-max-brace.bconf +19 −0
tools/bootconfig/samples/exp-good-nested-brace.bconf +1 −0
tools/bootconfig/samples/good-nested-brace.bconf +18 −0
tools/bootconfig/test-bootconfig.sh +9 −0
tools/bpf/resolve_btfids/Makefile +10 −2
tools/bpf/resolve_btfids/main.c +54 −27
tools/build/Build.include +9 −0
tools/build/Makefile.build +4 −2
tools/include/linux/args.h +4 −0
tools/include/linux/coresight-pmu.h +0 −24
tools/include/linux/gfp.h +4 −0
tools/include/linux/gfp_types.h +7 −2
tools/include/linux/overflow.h +19 −0
tools/include/linux/slab.h +9 −0
tools/include/uapi/asm-generic/unistd.h +4 −1
tools/include/uapi/linux/kvm.h +23 −1
tools/include/uapi/linux/perf_event.h +1 −1
tools/objtool/Makefile +6 −4
tools/objtool/arch/x86/decode.c +23 −39
tools/objtool/check.c +19 −5
tools/objtool/elf.c +1 −1
tools/objtool/include/objtool/warn.h +1 −1
tools/objtool/klp-diff.c +26 −13
tools/perf/Makefile.config +18 −0
tools/perf/Makefile.perf +1 −1
tools/perf/arch/arm/entry/syscalls/syscall.tbl +1 −0
tools/perf/arch/arm/util/cs-etm.c +0 −14
tools/perf/arch/mips/entry/syscalls/syscall_n64.tbl +1 −0
tools/perf/arch/powerpc/entry/syscalls/syscall.tbl +1 −0
tools/perf/arch/s390/entry/syscalls/syscall.tbl +392 −467
tools/perf/arch/sh/entry/syscalls/syscall.tbl +1 −0
tools/perf/arch/sparc/entry/syscalls/syscall.tbl +2 −1
tools/perf/arch/x86/entry/syscalls/syscall_32.tbl +1 −0
tools/perf/arch/x86/entry/syscalls/syscall_64.tbl +1 −0
tools/perf/arch/xtensa/entry/syscalls/syscall.tbl +1 −0
tools/perf/builtin-ftrace.c +7 −2
tools/perf/pmu-events/Build +2 −1
tools/perf/trace/beauty/arch/x86/include/asm/irq_vectors.h +1 −0
tools/perf/trace/beauty/include/uapi/linux/fs.h +1 −0
tools/perf/trace/beauty/include/uapi/linux/mount.h +11 −2
tools/perf/trace/beauty/include/uapi/linux/prctl.h +37 −0
tools/perf/util/annotate-arch/annotate-loongarch.c +1 −1
tools/perf/util/annotate.c +4 −1
tools/perf/util/cs-etm-decoder/cs-etm-decoder.c +1 −1
tools/perf/util/cs-etm.c +13 −23
tools/perf/util/cs-etm.h +15 −0
tools/perf/util/disasm.c +1 −1
tools/perf/util/synthetic-events.c +5 −0
tools/power/cpupower/cpupower-service.conf +5 −0
tools/power/cpupower/cpupower.sh +6 −0
tools/power/cpupower/utils/cpupower-set.c +5 −1
tools/power/cpupower/utils/helpers/helpers.h +4 −1
tools/power/cpupower/utils/helpers/misc.c +39 −2
tools/power/cpupower/utils/powercap-info.c +2 −2
tools/sched_ext/Kconfig +61 −0
tools/sched_ext/Makefile +2 −0
tools/sched_ext/README.md +0 −6
tools/sched_ext/include/scx/compat.h +5 −2
tools/sched_ext/scx_central.c +1 −1
tools/sched_ext/scx_sdt.c +1 −1
tools/scripts/syscall.tbl +1 −0
tools/testing/kunit/kunit_kernel.py +4 −2
tools/testing/kunit/kunit_tool_test.py +26 −0
tools/testing/selftests/arm64/abi/hwcap.c +2 −2
tools/testing/selftests/arm64/signal/testcases/gcs_prot_none_fault.c +76 −0
tools/testing/selftests/bpf/DENYLIST.asan +3 −0
tools/testing/selftests/bpf/Makefile +10 −4
tools/testing/selftests/bpf/benchs/bench_trigger.c +8 −6
tools/testing/selftests/bpf/bpf_util.h +32 −13
tools/testing/selftests/bpf/bpftool_helpers.c +19 −6
tools/testing/selftests/bpf/cgroup_helpers.c +1 −1
tools/testing/selftests/bpf/jit_disasm_helpers.c +9 −9
tools/testing/selftests/bpf/network_helpers.c +2 −3
tools/testing/selftests/bpf/prog_tests/bpf_iter.c +1 −2
tools/testing/selftests/bpf/prog_tests/bpf_tcp_ca.c +1 −1
tools/testing/selftests/bpf/prog_tests/cgrp_local_storage.c +3 −1
tools/testing/selftests/bpf/prog_tests/ctx_rewrite.c +4 −2
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tools/testing/selftests/bpf/prog_tests/htab_update.c +1 −0
tools/testing/selftests/bpf/prog_tests/kmem_cache_iter.c +2 −5
tools/testing/selftests/bpf/prog_tests/kprobe_multi_test.c +5 −7
tools/testing/selftests/bpf/prog_tests/lwt_seg6local.c +1 −1
tools/testing/selftests/bpf/prog_tests/map_kptr_race.c +218 −0
tools/testing/selftests/bpf/prog_tests/queue_stack_map.c +2 −2
tools/testing/selftests/bpf/prog_tests/reg_bounds.c +59 −19
tools/testing/selftests/bpf/prog_tests/setget_sockopt.c +1 −1
tools/testing/selftests/bpf/prog_tests/skc_to_unix_sock.c +1 −1
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tools/testing/selftests/bpf/prog_tests/sockopt_sk.c +1 −1
tools/testing/selftests/bpf/prog_tests/struct_ops_private_stack.c +1 −3
tools/testing/selftests/bpf/prog_tests/task_local_data.h +1 −1
tools/testing/selftests/bpf/prog_tests/tc_opts.c +2 −4
tools/testing/selftests/bpf/prog_tests/tc_redirect.c +1 −1
tools/testing/selftests/bpf/prog_tests/test_sysctl.c +3 −0
tools/testing/selftests/bpf/prog_tests/test_tc_tunnel.c +4 −1
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tools/testing/selftests/bpf/prog_tests/test_xsk.c +20 −4
tools/testing/selftests/bpf/prog_tests/uprobe_multi_test.c +5 −1
tools/testing/selftests/bpf/prog_tests/verifier_log.c +1 −1
tools/testing/selftests/bpf/prog_tests/xdp_bonding.c +58 −0
tools/testing/selftests/bpf/prog_tests/xdp_flowtable.c +2 −1
tools/testing/selftests/bpf/prog_tests/xdp_metadata.c +2 −2
tools/testing/selftests/bpf/progs/dmabuf_iter.c +1 −1
tools/testing/selftests/bpf/progs/exceptions_assert.c +17 −17
tools/testing/selftests/bpf/progs/map_kptr_race.c +197 −0
tools/testing/selftests/bpf/progs/verifier_bounds.c +175 −1
tools/testing/selftests/bpf/progs/verifier_linked_scalars.c +64 −0
tools/testing/selftests/bpf/progs/verifier_scalar_ids.c +42 −14
tools/testing/selftests/bpf/test_progs.c +27 −11
tools/testing/selftests/bpf/test_verifier.c +1 −1
tools/testing/selftests/bpf/testing_helpers.c +1 −0
tools/testing/selftests/bpf/trace_helpers.c +12 −11
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tools/testing/selftests/bpf/xdp_features.c +2 −1
tools/testing/selftests/bpf/xdp_hw_metadata.c +2 −2
tools/testing/selftests/cgroup/test_cpuset_prs.sh +114 −110
tools/testing/selftests/drivers/net/hw/rss_ctx.py +98 −2
tools/testing/selftests/drivers/net/team/Makefile +1 −0
tools/testing/selftests/drivers/net/team/refleak.sh +17 −0
tools/testing/selftests/filesystems/nsfs/iterate_mntns.c +15 −10
tools/testing/selftests/hid/tests/test_wacom_generic.py +21 −13
tools/testing/selftests/kselftest_harness.h +5 −2
tools/testing/selftests/kvm/Makefile.kvm +1 −0
tools/testing/selftests/kvm/guest_memfd_test.c +1 −1
tools/testing/selftests/kvm/include/x86/processor.h +23 −0
tools/testing/selftests/kvm/include/x86/smm.h +17 −0
tools/testing/selftests/kvm/lib/x86/processor.c +26 −0
tools/testing/selftests/kvm/x86/evmcs_smm_controls_test.c +150 −0
tools/testing/selftests/kvm/x86/sev_smoke_test.c +30 −0
tools/testing/selftests/kvm/x86/smm_test.c +2 −25
tools/testing/selftests/net/Makefile +1 −0
tools/testing/selftests/net/bridge_vlan_dump.sh +204 −0
tools/testing/selftests/net/fib_nexthops.sh +11 −0
tools/testing/selftests/net/mptcp/mptcp_join.sh +49 −0
tools/testing/selftests/net/mptcp/simult_flows.sh +7 −4
tools/testing/selftests/net/netfilter/nf_queue.c +8 −2
tools/testing/selftests/net/netfilter/nft_queue.sh +9 −4
tools/testing/selftests/net/packetdrill/tcp_rcv_big_endseq.pkt +1 −1
tools/testing/selftests/net/packetdrill/tcp_rcv_toobig.pkt +0 −33
tools/testing/selftests/net/packetdrill/tcp_rcv_zero_wnd_fin.pkt +27 −0
tools/testing/selftests/net/rtnetlink.sh +55 −0
tools/testing/selftests/net/tun.c +6 −6
tools/testing/selftests/powerpc/copyloops/.gitignore +2 −2
tools/testing/selftests/powerpc/copyloops/Makefile +8 −3
tools/testing/selftests/powerpc/copyloops/stubs.S +0 −8
tools/testing/selftests/powerpc/copyloops/validate.c +14 −1
tools/testing/selftests/rcutorture/configs/rcu/SRCU-N +3 −1
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tools/testing/selftests/tc-testing/tc-tests/actions/ct.json +159 −0
tools/testing/selftests/tc-testing/tc-tests/actions/ife.json +99 −0
tools/testing/selftests/tc-testing/tdc_helper.py +7 −3
tools/testing/selftests/vsock/vmtest.sh +21 −20
virt/kvm/Kconfig +1 −8
virt/kvm/binary_stats.c +1 −1
virt/kvm/kvm_main.c +11 −26

.mailmap+13−2

 Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>
 Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>
 Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>
+Daniel Lezcano <daniel.lezcano@kernel.org> <daniel.lezcano@linaro.org>
+Daniel Lezcano <daniel.lezcano@kernel.org> <daniel.lezcano@free.fr>
+Daniel Lezcano <daniel.lezcano@kernel.org> <daniel.lezcano@linexp.org>
+Daniel Lezcano <daniel.lezcano@kernel.org> <dlezcano@fr.ibm.com>
 Daniel Thompson <danielt@kernel.org> <daniel.thompson@linaro.org>
+Daniele Alessandrelli <daniele.alessandrelli@gmail.com> <daniele.alessandrelli@intel.com>
 Danilo Krummrich <dakr@kernel.org> <dakr@redhat.com>
 David Brownell <david-b@pacbell.net>
 David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>
+David Gow <david@davidgow.net> <davidgow@google.com>
 David Heidelberg <david@ixit.cz> <d.okias@gmail.com>
 David Hildenbrand <david@kernel.org> <david@redhat.com>
 David Rheinsberg <david@readahead.eu> <dh.herrmann@gmail.com>
 Jason Gunthorpe <jgg@ziepe.ca> <jgg@mellanox.com>
 Jason Gunthorpe <jgg@ziepe.ca> <jgg@nvidia.com>
 Jason Gunthorpe <jgg@ziepe.ca> <jgunthorpe@obsidianresearch.com>
+Jason Xing <kerneljasonxing@gmail.com>  <kernelxing@tencent.com>
 <javier@osg.samsung.com> <javier.martinez@collabora.co.uk>
 Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com>
 Jayachandran C <c.jayachandran@gmail.com> <jayachandranc@netlogicmicro.com>
 Jisheng Zhang <jszhang@kernel.org> <jszhang@marvell.com>
 Jisheng Zhang <jszhang@kernel.org> <Jisheng.Zhang@synaptics.com>
 Jishnu Prakash <quic_jprakash@quicinc.com> <jprakash@codeaurora.org>
+Joe Damato <joe@dama.to> <jdamato@fastly.com>
 Joel Granados <joel.granados@kernel.org> <j.granados@samsung.com>
 Johan Hovold <johan@kernel.org> <jhovold@gmail.com>
 Johan Hovold <johan@kernel.org> <johan@hovoldconsulting.com>
 Loic Poulain <loic.poulain@oss.qualcomm.com> <loic.poulain@linaro.org>
 Loic Poulain <loic.poulain@oss.qualcomm.com> <loic.poulain@intel.com>
 Lorenzo Pieralisi <lpieralisi@kernel.org> <lorenzo.pieralisi@arm.com>
-Lorenzo Stoakes <lorenzo.stoakes@oracle.com> <lstoakes@gmail.com>
+Lorenzo Stoakes <ljs@kernel.org> <lstoakes@gmail.com>
+Lorenzo Stoakes <ljs@kernel.org> <lorenzo.stoakes@oracle.com>
 Luca Ceresoli <luca.ceresoli@bootlin.com> <luca@lucaceresoli.net>
 Luca Weiss <luca@lucaweiss.eu> <luca@z3ntu.xyz>
 Lucas De Marchi <demarchi@kernel.org> <lucas.demarchi@intel.com>
 Vlad Dogaru <ddvlad@gmail.com> <vlad.dogaru@intel.com>
 Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@parallels.com>
 Vladimir Davydov <vdavydov.dev@gmail.com> <vdavydov@virtuozzo.com>
+Vlastimil Babka <vbabka@kernel.org> <vbabka@suse.cz>
 WangYuli <wangyuli@aosc.io> <wangyl5933@chinaunicom.cn>
 WangYuli <wangyuli@aosc.io> <wangyuli@deepin.org>
 Weiwen Hu <huweiwen@linux.alibaba.com> <sehuww@mail.scut.edu.cn>
 Ying Huang <huang.ying.caritas@gmail.com> <ying.huang@intel.com>
 Yixun Lan <dlan@kernel.org> <dlan@gentoo.org>
 Yixun Lan <dlan@kernel.org> <yixun.lan@amlogic.com>
-Yosry Ahmed <yosry.ahmed@linux.dev> <yosryahmed@google.com>
+Yosry Ahmed <yosry@kernel.org> <yosryahmed@google.com>
+Yosry Ahmed <yosry@kernel.org> <yosry.ahmed@linux.dev>
 Yu-Chun Lin <eleanor.lin@realtek.com> <eleanor15x@gmail.com>
 Yusuke Goda <goda.yusuke@renesas.com>
 Zack Rusin <zack.rusin@broadcom.com> <zackr@vmware.com>

CREDITS+8−0

@@ -1242,6 +1242,10 @@ N: Veaceslav Falico · 1241 unmodified lines
1242	E: vfalico@gmail.com	1242	E: vfalico@gmail.com
1243	D: Co-maintainer and co-author of the network bonding driver.	1243	D: Co-maintainer and co-author of the network bonding driver.
1244		1244
		1245	N: Thomas Falcon
		1246	E: tlfalcon@linux.ibm.com
		1247	D: Initial author of the IBM ibmvnic network driver
		1248
1245	N: János Farkas	1249	N: János Farkas
1246	E: chexum@shadow.banki.hu	1250	E: chexum@shadow.banki.hu
1247	D: romfs, various (mostly networking) fixes	1251	D: romfs, various (mostly networking) fixes
@@ -2415,6 +2419,10 @@ S: Am Muehlenweg 38 · 1167 unmodified lines
2415	S: D53424 Remagen	2419	S: D53424 Remagen
2416	S: Germany	2420	S: Germany
2417		2421
		2422	N: Jonathan Lemon
		2423	E: jonathan.lemon@gmail.com
		2424	D: OpenCompute PTP clock driver (ptp_ocp)
		2425
2418	N: Colin Leroy	2426	N: Colin Leroy
2419	E: colin@colino.net	2427	E: colin@colino.net
2420	W: http://www.geekounet.org/	2428	W: http://www.geekounet.org/

Documentation/ABI/testing/sysfs-block-zram+2−2

@@ -151,11 +151,11 @@ Description: · 150 unmodified lines
151	The algorithm_params file is write-only and is used to setup	151	The algorithm_params file is write-only and is used to setup
152	compression algorithm parameters.	152	compression algorithm parameters.
153		153
154	What: /sys/block/zram<id>/writeback_compressed	154	What: /sys/block/zram<id>/compressed_writeback
155	Date: Decemeber 2025	155	Date: Decemeber 2025
156	Contact: Richard Chang <richardycc@google.com>	156	Contact: Richard Chang <richardycc@google.com>
157	Description:	157	Description:
158	The writeback_compressed device atrribute toggles compressed	158	The compressed_writeback device atrribute toggles compressed
159	writeback feature.	159	writeback feature.
160		160
161	What: /sys/block/zram<id>/writeback_batch_size	161	What: /sys/block/zram<id>/writeback_batch_size

Documentation/ABI/testing/sysfs-driver-uniwill-laptop+5−5

@@ -1,4 +1,4 @@
1	What: /sys/bus/platform/devices/INOU0000:XX/fn_lock_toggle_enable	1	What: /sys/bus/platform/devices/INOU0000:XX/fn_lock
2	Date: November 2025	2	Date: November 2025
3	KernelVersion: 6.19	3	KernelVersion: 6.19
4	Contact: Armin Wolf <W_Armin@gmx.de>	4	Contact: Armin Wolf <W_Armin@gmx.de>
@@ -8,15 +8,15 @@ Description: · 3 unmodified lines
8		8
9	Reading this file returns the current enable status of the FN lock functionality.	9	Reading this file returns the current enable status of the FN lock functionality.
10		10
11	What: /sys/bus/platform/devices/INOU0000:XX/super_key_toggle_enable	11	What: /sys/bus/platform/devices/INOU0000:XX/super_key_enable
12	Date: November 2025	12	Date: November 2025
13	KernelVersion: 6.19	13	KernelVersion: 6.19
14	Contact: Armin Wolf <W_Armin@gmx.de>	14	Contact: Armin Wolf <W_Armin@gmx.de>
15	Description:	15	Description:
16	Allows userspace applications to enable/disable the super key functionality	16	Allows userspace applications to enable/disable the super key of the integrated
17	of the integrated keyboard by writing "1"/"0" into this file.	17	keyboard by writing "1"/"0" into this file.
18		18
19	Reading this file returns the current enable status of the super key functionality.	19	Reading this file returns the current enable status of the super key.
20		20
21	What: /sys/bus/platform/devices/INOU0000:XX/touchpad_toggle_enable	21	What: /sys/bus/platform/devices/INOU0000:XX/touchpad_toggle_enable
22	Date: November 2025	22	Date: November 2025

Documentation/admin-guide/blockdev/zram.rst+3−3

Documentation/admin-guide/kernel-parameters.txt+16−0

 	TPM	TPM drivers are enabled.
 	UMS	USB Mass Storage support is enabled.
 	USB	USB support is enabled.
+	NVME	NVMe support is enabled
 	USBHID	USB Human Interface Device support is enabled.
 	V4L	Video For Linux support is enabled.
 	VGA	The VGA console has been enabled.
 			This can be set from sysctl after boot.
 			See Documentation/admin-guide/sysctl/vm.rst for details.
+	nvme.quirks=    [NVME] A list of quirk entries to augment the built-in
+			nvme quirk list. List entries are separated by a
+			'-' character.
+			Each entry has the form VendorID:ProductID:quirk_names.
+			The IDs are 4-digits hex numbers and quirk_names is a
+			list of quirk names separated by commas. A quirk name
+			can be prefixed by '^', meaning that the specified
+			quirk must be disabled.
+			Example:
+			nvme.quirks=7710:2267:bogus_nid,^identify_cns-9900:7711:broken_msi
 	ohci1394_dma=early	[HW,EARLY] enable debugging via the ohci1394 driver.
 			See Documentation/core-api/debugging-via-ohci1394.rst for more
 			info.
 				p = USB_QUIRK_SHORT_SET_ADDRESS_REQ_TIMEOUT
 					(Reduce timeout of the SET_ADDRESS
 					request from 5000 ms to 500 ms);
+				q = USB_QUIRK_FORCE_ONE_CONFIG (Device
+					claims zero configurations,
+					forcing to 1);
 			Example: quirks=0781:5580:bk,0a5c:5834:gij
 	usbhid.mousepoll=

Documentation/admin-guide/laptops/uniwill-laptop.rst+1−1

@@ -24,7 +24,7 @@ Keyboard settings · 23 unmodified lines
24		24
25	The ``uniwill-laptop`` driver allows the user to enable/disable:	25	The ``uniwill-laptop`` driver allows the user to enable/disable:
26		26
27	- the FN and super key lock functionality of the integrated keyboard	27	- the FN lock and super key of the integrated keyboard
28	- the touchpad toggle functionality of the integrated touchpad	28	- the touchpad toggle functionality of the integrated touchpad
29		29
30	See Documentation/ABI/testing/sysfs-driver-uniwill-laptop for details.	30	See Documentation/ABI/testing/sysfs-driver-uniwill-laptop for details.

Documentation/admin-guide/sysctl/net.rst+3−0

@@ -594,6 +594,9 @@ Values: · 593 unmodified lines
594	their sockets will only be able to connect within their own	594	their sockets will only be able to connect within their own
595	namespace.	595	namespace.
596		596
		597	The first write to ``child_ns_mode`` locks its value. Subsequent writes of the
		598	same value succeed, but writing a different value returns ``-EBUSY``.
		599
597	Changing ``child_ns_mode`` only affects namespaces created after the change;	600	Changing ``child_ns_mode`` only affects namespaces created after the change;
598	it does not modify the current namespace or any existing children.	601	it does not modify the current namespace or any existing children.
599		602

Documentation/devicetree/bindings/display/msm/dp-controller.yaml+20−1

@@ -253,7 +253,6 @@ allOf: · 252 unmodified lines
253	enum:	253	enum:
254	# these platforms support 2 streams MST on some interfaces,	254	# these platforms support 2 streams MST on some interfaces,
255	# others are SST only	255	# others are SST only
256	- qcom,glymur-dp
257	- qcom,sc8280xp-dp	256	- qcom,sc8280xp-dp
258	- qcom,x1e80100-dp	257	- qcom,x1e80100-dp
259	then:	258	then:
@@ -310,6 +309,26 @@ allOf: · 50 unmodified lines
310	minItems: 6	309	minItems: 6
311	maxItems: 8	310	maxItems: 8
312		311
		312	- if:
		313	properties:
		314	compatible:
		315	contains:
		316	enum:
		317	# these platforms support 2 streams MST on some interfaces,
		318	# others are SST only, but all controllers have 4 ports
		319	- qcom,glymur-dp
		320	then:
		321	properties:
		322	reg:
		323	minItems: 9
		324	maxItems: 9
		325	clocks:
		326	minItems: 5
		327	maxItems: 6
		328	clocks-names:
		329	minItems: 5
		330	maxItems: 6
		331
313	unevaluatedProperties: false	332	unevaluatedProperties: false
314		333
315	examples:	334	examples:

Documentation/devicetree/bindings/display/msm/qcom,glymur-mdss.yaml+10−6

                 };
             };
-            displayport-controller@ae90000 {
+            displayport-controller@af54000 {
                 compatible = "qcom,glymur-dp";
-                reg = <0xae90000 0x200>,
+                reg = <0xaf54000 0x200>,
-                      <0xae90200 0x200>,
+                      <0xaf54200 0x200>,
-                      <0xae90400 0x600>,
+                      <0xaf55000 0xc00>,
-                      <0xae91000 0x400>,
+                      <0xaf56000 0x400>,
-                      <0xae91400 0x400>;
+                      <0xaf57000 0x400>,
+                      <0xaf58000 0x400>,
+                      <0xaf59000 0x400>,
+                      <0xaf5a000 0x600>,
+                      <0xaf5b000 0x600>;
                 interrupt-parent = <&mdss>;
                 interrupts = <12>;

Documentation/devicetree/bindings/display/msm/qcom,sm8750-mdss.yaml+1−1

@@ -10,7 +10,7 @@ maintainers: · 9 unmodified lines
10	- Krzysztof Kozlowski <krzk@kernel.org>	10	- Krzysztof Kozlowski <krzk@kernel.org>
11		11
12	description:	12	description:
13	SM8650 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like	13	SM8750 MSM Mobile Display Subsystem(MDSS), which encapsulates sub-blocks like
14	DPU display controller, DSI and DP interfaces etc.	14	DPU display controller, DSI and DP interfaces etc.
15		15
16	$ref: /schemas/display/msm/mdss-common.yaml#	16	$ref: /schemas/display/msm/mdss-common.yaml#

Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml+0−1

@@ -16,7 +16,6 @@ description: \| · 15 unmodified lines
16	properties:	16	properties:
17	compatible:	17	compatible:
18	enum:	18	enum:
19	- kontron,sa67mcu-hwmon
20	- kontron,sl28cpld-fan	19	- kontron,sl28cpld-fan
21		20
22	reg:	21	reg:

Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml+1−1

@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
7	title: Synopsys DesignWare APB I2C Controller	7	title: Synopsys DesignWare APB I2C Controller
8		8
9	maintainers:	9	maintainers:
10	- Jarkko Nikula <jarkko.nikula@linux.intel.com>	10	- Mika Westerberg <mika.westerberg@linux.intel.com>
11		11
12	allOf:	12	allOf:
13	- $ref: /schemas/i2c/i2c-controller.yaml#	13	- $ref: /schemas/i2c/i2c-controller.yaml#

Documentation/devicetree/bindings/net/can/nxp,sja1000.yaml+1−0

@@ -87,6 +87,7 @@ required: · 86 unmodified lines
87		87
88	allOf:	88	allOf:
89	- $ref: can-controller.yaml#	89	- $ref: can-controller.yaml#
		90	- $ref: /schemas/memory-controllers/mc-peripheral-props.yaml
90	- if:	91	- if:
91	properties:	92	properties:
92	compatible:	93	compatible:

Documentation/devicetree/bindings/powerpc/fsl/fsl,mpc83xx.yaml+93−0

@@ -0,0 +1,93 @@
	1	# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/powerpc/fsl/fsl,mpc83xx.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Freescale PowerQUICC II Pro (MPC83xx) platforms
	8
	9	maintainers:
	10	- J. Neuschäfer <j.ne@posteo.net>
	11
	12	properties:
	13	$nodename:
	14	const: '/'
	15	compatible:
	16	oneOf:
	17	- description: MPC83xx Reference Design Boards
	18	items:
	19	- enum:
	20	- fsl,mpc8308rdb
	21	- fsl,mpc8315erdb
	22	- fsl,mpc8360rdk
	23	- fsl,mpc8377rdb
	24	- fsl,mpc8377wlan
	25	- fsl,mpc8378rdb
	26	- fsl,mpc8379rdb
	27
	28	- description: MPC8313E Reference Design Board
	29	items:
	30	- const: MPC8313ERDB
	31	- const: MPC831xRDB
	32	- const: MPC83xxRDB
	33
	34	- description: MPC8323E Reference Design Board
	35	items:
	36	- const: MPC8323ERDB
	37	- const: MPC832xRDB
	38	- const: MPC83xxRDB
	39
	40	- description: MPC8349E-mITX(-GP) Reference Design Platform
	41	items:
	42	- enum:
	43	- MPC8349EMITX
	44	- MPC8349EMITXGP
	45	- const: MPC834xMITX
	46	- const: MPC83xxMITX
	47
	48	- description: Keymile KMETER1 board
	49	const: keymile,KMETER1
	50
	51	- description: MPC8308 P1M board
	52	const: denx,mpc8308_p1m
	53
	54	patternProperties:
	55	"^soc@.*$":
	56	type: object
	57	properties:
	58	compatible:
	59	oneOf:
	60	- items:
	61	- enum:
	62	- fsl,mpc8315-immr
	63	- fsl,mpc8308-immr
	64	- const: simple-bus
	65	- items:
	66	- const: fsl,mpc8360-immr
	67	- const: fsl,immr
	68	- const: fsl,soc
	69	- const: simple-bus
	70	- const: simple-bus
	71
	72	additionalProperties: true
	73
	74	examples:
	75	- \|
	76	/ {
	77	compatible = "fsl,mpc8315erdb";
	78	model = "MPC8315E-RDB";
	79	#address-cells = <1>;
	80	#size-cells = <1>;
	81
	82	soc@e0000000 {
	83	compatible = "fsl,mpc8315-immr", "simple-bus";
	84	reg = <0xe0000000 0x00000200>;
	85	#address-cells = <1>;
	86	#size-cells = <1>;
	87	device_type = "soc";
	88	ranges = <0 0xe0000000 0x00100000>;
	89	bus-frequency = <0>;
	90	};
	91	};
	92
	93	...

Documentation/devicetree/bindings/regulator/mt6359-regulator.yaml+2−2

@@ -287,7 +287,7 @@ examples: · 286 unmodified lines
287	regulator-max-microvolt = <1700000>;	287	regulator-max-microvolt = <1700000>;
288	};	288	};
289	mt6359_vrfck_1_ldo_reg: ldo_vrfck_1 {	289	mt6359_vrfck_1_ldo_reg: ldo_vrfck_1 {
290	regulator-name = "vrfck";	290	regulator-name = "vrfck_1";
291	regulator-min-microvolt = <1240000>;	291	regulator-min-microvolt = <1240000>;
292	regulator-max-microvolt = <1600000>;	292	regulator-max-microvolt = <1600000>;
293	};	293	};
@@ -309,7 +309,7 @@ examples: · 15 unmodified lines
309	regulator-max-microvolt = <3300000>;	309	regulator-max-microvolt = <3300000>;
310	};	310	};
311	mt6359_vemc_1_ldo_reg: ldo_vemc_1 {	311	mt6359_vemc_1_ldo_reg: ldo_vemc_1 {
312	regulator-name = "vemc";	312	regulator-name = "vemc_1";
313	regulator-min-microvolt = <2500000>;	313	regulator-min-microvolt = <2500000>;
314	regulator-max-microvolt = <3300000>;	314	regulator-max-microvolt = <3300000>;
315	};	315	};

Documentation/devicetree/bindings/sound/nvidia,tegra-audio-graph-card.yaml+1−0

@@ -23,6 +23,7 @@ properties: · 22 unmodified lines
23	enum:	23	enum:
24	- nvidia,tegra210-audio-graph-card	24	- nvidia,tegra210-audio-graph-card
25	- nvidia,tegra186-audio-graph-card	25	- nvidia,tegra186-audio-graph-card
		26	- nvidia,tegra238-audio-graph-card
26	- nvidia,tegra264-audio-graph-card	27	- nvidia,tegra264-audio-graph-card
27		28
28	clocks:	29	clocks:

Documentation/devicetree/bindings/sound/renesas,rz-ssi.yaml+1−0

@@ -20,6 +20,7 @@ properties: · 19 unmodified lines
20	- renesas,r9a07g044-ssi # RZ/G2{L,LC}	20	- renesas,r9a07g044-ssi # RZ/G2{L,LC}
21	- renesas,r9a07g054-ssi # RZ/V2L	21	- renesas,r9a07g054-ssi # RZ/V2L
22	- renesas,r9a08g045-ssi # RZ/G3S	22	- renesas,r9a08g045-ssi # RZ/G3S
		23	- renesas,r9a08g046-ssi # RZ/G3L
23	- const: renesas,rz-ssi	24	- const: renesas,rz-ssi
24		25
25	reg:	26	reg:

Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml+24−5

 title: Allwinner A31 SPI Controller
-allOf:
-  - $ref: spi-controller.yaml
 maintainers:
   - Chen-Yu Tsai <wens@csie.org>
   - Maxime Ripard <mripard@kernel.org>
       spi-rx-bus-width:
         items:
-          - const: 1
+          enum: [0, 1, 2, 4]
       spi-tx-bus-width:
         items:
-          - const: 1
+          enum: [0, 1, 2, 4]
 required:
   - compatible
   - clocks
   - clock-names
+allOf:
+  - $ref: spi-controller.yaml
+  - if:
+      not:
+        properties:
+          compatible:
+            contains:
+              enum:
+                - allwinner,sun50i-r329-spi
+                - allwinner,sun55i-a523-spi
+    then:
+      patternProperties:
+        "^.*@[0-9a-f]+":
+          properties:
+            spi-rx-bus-width:
+              items:
+                enum: [0, 1]
+            spi-tx-bus-width:
+              items:
+                enum: [0, 1]
 unevaluatedProperties: false
 examples:

Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml+1−30

@@ -22,21 +22,6 @@ allOf: · 21 unmodified lines
22	properties:	22	properties:
23	reg:	23	reg:
24	minItems: 2	24	minItems: 2
25	- if:
26	properties:
27	compatible:
28	contains:
29	enum:
30	- baikal,bt1-sys-ssi
31	then:
32	properties:
33	mux-controls:
34	maxItems: 1
35	required:
36	- mux-controls
37	else:
38	required:
39	- interrupts
40	- if:	25	- if:
41	properties:	26	properties:
42	compatible:	27	compatible:
@@ -75,10 +60,6 @@ properties: · 32 unmodified lines
75	const: intel,mountevans-imc-ssi	60	const: intel,mountevans-imc-ssi
76	- description: AMD Pensando Elba SoC SPI Controller	61	- description: AMD Pensando Elba SoC SPI Controller
77	const: amd,pensando-elba-spi	62	const: amd,pensando-elba-spi
78	- description: Baikal-T1 SPI Controller
79	const: baikal,bt1-ssi
80	- description: Baikal-T1 System Boot SPI Controller
81	const: baikal,bt1-sys-ssi
82	- description: Canaan Kendryte K210 SoS SPI Controller	63	- description: Canaan Kendryte K210 SoS SPI Controller
83	const: canaan,k210-spi	64	const: canaan,k210-spi
84	- description: Renesas RZ/N1 SPI Controller	65	- description: Renesas RZ/N1 SPI Controller
@@ -170,6 +151,7 @@ required: · 85 unmodified lines
170	- "#address-cells"	151	- "#address-cells"
171	- "#size-cells"	152	- "#size-cells"
172	- clocks	153	- clocks
		154	- interrupts
173		155
174	examples:	156	examples:
175	- \|	157	- \|
@@ -190,15 +172,4 @@ examples: · 14 unmodified lines
190	rx-sample-delay-ns = <7>;	172	rx-sample-delay-ns = <7>;
191	};	173	};
192	};	174	};
193	- \|
194	spi@1f040100 {
195	compatible = "baikal,bt1-sys-ssi";
196	reg = <0x1f040100 0x900>,
197	<0x1c000000 0x1000000>;
198	#address-cells = <1>;
199	#size-cells = <0>;
200	mux-controls = <&boot_mux>;
201	clocks = <&ccu_sys>;
202	clock-names = "ssi_clk";
203	};
204	...	175	...

Documentation/hwmon/emc1403.rst+1−1

@@ -57,7 +57,7 @@ Supported chips: · 56 unmodified lines
57	- https://ww1.microchip.com/downloads/en/DeviceDoc/EMC1438%20DS%20Rev.%201.0%20(04-29-10).pdf	57	- https://ww1.microchip.com/downloads/en/DeviceDoc/EMC1438%20DS%20Rev.%201.0%20(04-29-10).pdf
58		58
59	Author:	59	Author:
60	Kalhan Trisal <kalhan.trisal@intel.com	60	Kalhan Trisal <kalhan.trisal@intel.com>
61		61
62		62
63	Description	63	Description

Documentation/hwmon/index.rst+0−1

@@ -220,7 +220,6 @@ Hardware Monitoring Kernel Drivers · 219 unmodified lines
220	q54sj108a2	220	q54sj108a2
221	qnap-mcu-hwmon	221	qnap-mcu-hwmon
222	raspberrypi-hwmon	222	raspberrypi-hwmon
223	sa67
224	sbrmi	223	sbrmi
225	sbtsi_temp	224	sbtsi_temp
226	sch5627	225	sch5627

Documentation/hwmon/sa67.rst+0−41

@@ -1,41 +0,0 @@
1	.. SPDX-License-Identifier: GPL-2.0-only
2
3	Kernel driver sa67mcu
4	=====================
5
6	Supported chips:
7
8	* Kontron sa67mcu
9
10	Prefix: 'sa67mcu'
11
12	Datasheet: not available
13
14	Authors: Michael Walle <mwalle@kernel.org>
15
16	Description
17	-----------
18
19	The sa67mcu is a board management controller which also exposes a hardware
20	monitoring controller.
21
22	The controller has two voltage and one temperature sensor. The values are
23	hold in two 8 bit registers to form one 16 bit value. Reading the lower byte
24	will also capture the high byte to make the access atomic. The unit of the
25	volatge sensors are 1mV and the unit of the temperature sensor is 0.1degC.
26
27	Sysfs entries
28	-------------
29
30	The following attributes are supported.
31
32	======================= ========================================================
33	in0_label "VDDIN"
34	in0_input Measured VDDIN voltage.
35
36	in1_label "VDD_RTC"
37	in1_input Measured VDD_RTC voltage.
38
39	temp1_input MCU temperature. Roughly the board temperature.
40	======================= ========================================================
41

Documentation/netlink/specs/nfsd.yaml+2−2

@@ -152,7 +152,7 @@ operations: · 151 unmodified lines
152	- compound-ops	152	- compound-ops
153	-	153	-
154	name: threads-set	154	name: threads-set
155	doc: set the number of running threads	155	doc: set the maximum number of running threads
156	attribute-set: server	156	attribute-set: server
157	flags: [admin-perm]	157	flags: [admin-perm]
158	do:	158	do:
@@ -165,7 +165,7 @@ operations: · 6 unmodified lines
165	- min-threads	165	- min-threads
166	-	166	-
167	name: threads-get	167	name: threads-get
168	doc: get the number of running threads	168	doc: get the maximum number of running threads
169	attribute-set: server	169	attribute-set: server
170	do:	170	do:
171	reply:	171	reply:

Documentation/scheduler/sched-ext.rst+27−3

     CONFIG_DEBUG_INFO_BTF=y
     CONFIG_BPF_JIT_ALWAYS_ON=y
     CONFIG_BPF_JIT_DEFAULT_ON=y
-    CONFIG_PAHOLE_HAS_BTF_TAG=y
 sched_ext is used only when the BPF scheduler is loaded and running.
 However, when the BPF scheduler is loaded and ``SCX_OPS_SWITCH_PARTIAL`` is
 set in ``ops->flags``, only tasks with the ``SCHED_EXT`` policy are scheduled
 by sched_ext, while tasks with ``SCHED_NORMAL``, ``SCHED_BATCH`` and
-``SCHED_IDLE`` policies are scheduled by the fair-class scheduler.
+``SCHED_IDLE`` policies are scheduled by the fair-class scheduler which has
+higher sched_class precedence than ``SCHED_EXT``.
 Terminating the sched_ext scheduler program, triggering `SysRq-S`, or
 detection of any internal error including stalled runnable tasks aborts the
   The functions prefixed with ``scx_bpf_`` can be called from the BPF
   scheduler.
+* ``kernel/sched/ext_idle.c`` contains the built-in idle CPU selection policy.
 * ``tools/sched_ext/`` hosts example BPF scheduler implementations.
   * ``scx_simple[.bpf].c``: Minimal global FIFO scheduler example using a
   * ``scx_qmap[.bpf].c``: A multi-level FIFO scheduler supporting five
     levels of priority implemented with ``BPF_MAP_TYPE_QUEUE``.
+  * ``scx_central[.bpf].c``: A central FIFO scheduler where all scheduling
+    decisions are made on one CPU, demonstrating ``LOCAL_ON`` dispatching,
+    tickless operation, and kthread preemption.
+  * ``scx_cpu0[.bpf].c``: A scheduler that queues all tasks to a shared DSQ
+    and only dispatches them on CPU0 in FIFO order. Useful for testing bypass
+    behavior.
+  * ``scx_flatcg[.bpf].c``: A flattened cgroup hierarchy scheduler
+    implementing hierarchical weight-based cgroup CPU control by compounding
+    each cgroup's share at every level into a single flat scheduling layer.
+  * ``scx_pair[.bpf].c``: A core-scheduling example that always makes
+    sibling CPU pairs execute tasks from the same CPU cgroup.
+  * ``scx_sdt[.bpf].c``: A variation of ``scx_simple`` demonstrating BPF
+    arena memory management for per-task data.
+  * ``scx_userland[.bpf].c``: A minimal scheduler demonstrating user space
+    scheduling. Tasks with CPU affinity are direct-dispatched in FIFO order;
+    all others are scheduled in user space by a simple vruntime scheduler.
 ABI Instability
 ===============
 The APIs provided by sched_ext to BPF schedulers programs have no stability
 guarantees. This includes the ops table callbacks and constants defined in
 ``include/linux/sched/ext.h``, as well as the ``scx_bpf_`` kfuncs defined in
-``kernel/sched/ext.c``.
+``kernel/sched/ext.c`` and ``kernel/sched/ext_idle.c``.
 While we will attempt to provide a relatively stable API surface when
 possible, they are subject to change without warning between kernel

Documentation/sound/alsa-configuration.rst+4−0

           audible volume
         * bit 25: ``mixer_capture_min_mute``
           Similar to bit 24 but for capture streams
+        * bit 26: ``skip_iface_setup``
+          Skip the probe-time interface setup (usb_set_interface,
+          init_pitch, init_sample_rate); redundant with
+          snd_usb_endpoint_prepare() at stream-open time
 This module supports multiple devices, autoprobe and hotplugging.

Documentation/virt/kvm/api.rst+121−115

Documentation/virt/kvm/locking.rst+2−0

@@ -17,6 +17,8 @@ The acquisition orders for mutexes are as follows: · 16 unmodified lines
17		17
18	- kvm->lock is taken outside kvm->slots_lock and kvm->irq_lock	18	- kvm->lock is taken outside kvm->slots_lock and kvm->irq_lock
19		19
		20	- vcpu->mutex is taken outside kvm->slots_lock and kvm->slots_arch_lock
		21
20	- kvm->slots_lock is taken outside kvm->irq_lock, though acquiring	22	- kvm->slots_lock is taken outside kvm->irq_lock, though acquiring
21	them together is quite rare.	23	them together is quite rare.
22		24

MAINTAINERS+57−65

 F:	drivers/thermal/thermal_mmio.c
 AMAZON ETHERNET DRIVERS
-M:	Shay Agroskin <shayagr@amazon.com>
 M:	Arthur Kiyanovski <akiyano@amazon.com>
-R:	David Arinzon <darinzon@amazon.com>
+M:	David Arinzon <darinzon@amazon.com>
-R:	Saeed Bishara <saeedb@amazon.com>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	Documentation/networking/device_drivers/ethernet/amazon/ena.rst
 F:	include/uapi/drm/amdxdna_accel.h
 AMD XGBE DRIVER
-M:	"Shyam Sundar S K" <Shyam-sundar.S-k@amd.com>
 M:	Raju Rangoju <Raju.Rangoju@amd.com>
 L:	netdev@vger.kernel.org
 S:	Maintained
 BLUETOOTH SUBSYSTEM
 M:	Marcel Holtmann <marcel@holtmann.org>
-M:	Johan Hedberg <johan.hedberg@gmail.com>
 M:	Luiz Augusto von Dentz <luiz.dentz@gmail.com>
 L:	linux-bluetooth@vger.kernel.org
 S:	Supported
 CISCO SCSI HBA DRIVER
 M:	Karan Tilak Kumar <kartilak@cisco.com>
+M:	Narsimhulu Musini <nmusini@cisco.com>
 M:	Sesidhar Baddela <sebaddel@cisco.com>
 L:	linux-scsi@vger.kernel.org
 S:	Supported
 F:	drivers/scsi/snic/
 CISCO VIC ETHERNET NIC DRIVER
-M:	Christian Benvenuti <benve@cisco.com>
 M:	Satish Kharat <satishkh@cisco.com>
 S:	Maintained
 F:	drivers/net/ethernet/cisco/enic/
 CISCO VIC LOW LATENCY NIC DRIVER
-M:	Christian Benvenuti <benve@cisco.com>
 M:	Nelson Escobar <neescoba@cisco.com>
+M:	Satish Kharat <satishkh@cisco.com>
 S:	Supported
 F:	drivers/infiniband/hw/usnic/
 F:	include/linux/clk.h
 CLOCKSOURCE, CLOCKEVENT DRIVERS
-M:	Daniel Lezcano <daniel.lezcano@linaro.org>
+M:	Daniel Lezcano <daniel.lezcano@kernel.org>
 M:	Thomas Gleixner <tglx@kernel.org>
 L:	linux-kernel@vger.kernel.org
 S:	Supported
 CPU IDLE TIME MANAGEMENT FRAMEWORK
 M:	"Rafael J. Wysocki" <rafael@kernel.org>
-M:	Daniel Lezcano <daniel.lezcano@linaro.org>
+M:	Daniel Lezcano <daniel.lezcano@kernel.org>
 R:	Christian Loehle <christian.loehle@arm.com>
 L:	linux-pm@vger.kernel.org
 S:	Maintained
 CPUIDLE DRIVER - ARM BIG LITTLE
 M:	Lorenzo Pieralisi <lpieralisi@kernel.org>
-M:	Daniel Lezcano <daniel.lezcano@linaro.org>
+M:	Daniel Lezcano <daniel.lezcano@kernel.org>
 L:	linux-pm@vger.kernel.org
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 F:	drivers/cpuidle/cpuidle-big_little.c
 CPUIDLE DRIVER - ARM EXYNOS
-M:	Daniel Lezcano <daniel.lezcano@linaro.org>
+M:	Daniel Lezcano <daniel.lezcano@kernel.org>
 M:	Kukjin Kim <kgene@kernel.org>
 R:	Krzysztof Kozlowski <krzk@kernel.org>
 L:	linux-pm@vger.kernel.org
 F:	include/uapi/drm/lima_drm.h
 DRM DRIVERS FOR LOONGSON
-M:	Sui Jingfeng <suijingfeng@loongson.cn>
 L:	dri-devel@lists.freedesktop.org
-S:	Supported
+S:	Orphan
 T:	git https://gitlab.freedesktop.org/drm/misc/kernel.git
 F:	drivers/gpu/drm/loongson/
 FREESCALE IMX / MXC FEC DRIVER
 M:	Wei Fang <wei.fang@nxp.com>
+R:	Frank Li <frank.li@nxp.com>
 R:	Shenwei Wang <shenwei.wang@nxp.com>
-R:	Clark Wang <xiaoning.wang@nxp.com>
 L:	imx@lists.linux.dev
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	Documentation/trace/ftrace*
 F:	arch/*/*/*/*ftrace*
 F:	arch/*/*/*ftrace*
-F:	include/*/ftrace.h
+F:	include/*/*ftrace*
 F:	kernel/trace/fgraph.c
 F:	kernel/trace/ftrace*
 F:	samples/ftrace
 M:	Haren Myneni <haren@linux.ibm.com>
 M:	Rick Lindsley <ricklind@linux.ibm.com>
 R:	Nick Child <nnac123@linux.ibm.com>
-R:	Thomas Falcon <tlfalcon@linux.ibm.com>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	drivers/net/ethernet/ibm/ibmvnic.*
 KERNEL UNIT TESTING FRAMEWORK (KUnit)
 M:	Brendan Higgins <brendan.higgins@linux.dev>
-M:	David Gow <davidgow@google.com>
+M:	David Gow <david@davidgow.net>
 R:	Rae Moar <raemoar63@gmail.com>
 L:	linux-kselftest@vger.kernel.org
 L:	kunit-dev@googlegroups.com
 M:	Herve Codina <herve.codina@bootlin.com>
 S:	Maintained
 F:	Documentation/devicetree/bindings/net/lantiq,pef2256.yaml
-F:	drivers/net/wan/framer/pef2256/
+F:	drivers/net/wan/framer/
 F:	drivers/pinctrl/pinctrl-pef2256.c
-F:	include/linux/framer/pef2256.h
+F:	include/linux/framer/
 LASI 53c700 driver for PARISC
 M:	"James E.J. Bottomley" <James.Bottomley@HansenPartnership.com>
 F:	drivers/platform/x86/hp/hp_accel.c
 LIST KUNIT TEST
-M:	David Gow <davidgow@google.com>
+M:	David Gow <david@davidgow.net>
 L:	linux-kselftest@vger.kernel.org
 L:	kunit-dev@googlegroups.com
 S:	Maintained
 F:	include/linux/soc/marvell/octeontx2/
 MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2)
-M:	Mirko Lindner <mlindner@marvell.com>
-M:	Stephen Hemminger <stephen@networkplumber.org>
 L:	netdev@vger.kernel.org
-S:	Odd fixes
+S:	Orphan
 F:	drivers/net/ethernet/marvell/sk*
 MARVELL LIBERTAS WIRELESS DRIVER
 M:	Sunil Goutham <sgoutham@marvell.com>
 M:	Linu Cherian <lcherian@marvell.com>
 M:	Geetha sowjanya <gakula@marvell.com>
-M:	Jerin Jacob <jerinj@marvell.com>
 M:	hariprasad <hkelam@marvell.com>
 M:	Subbaraya Sundeep <sbhatta@marvell.com>
 L:	netdev@vger.kernel.org
 F:	drivers/perf/marvell_pem_pmu.c
 MARVELL PRESTERA ETHERNET SWITCH DRIVER
-M:	Taras Chornyi <taras.chornyi@plvision.eu>
+M:	Elad Nachman <enachman@marvell.com>
 S:	Supported
 W:	https://github.com/Marvell-switching/switchdev-prestera
 F:	drivers/net/ethernet/marvell/prestera/
 MEDIATEK ETHERNET DRIVER
 M:	Felix Fietkau <nbd@nbd.name>
-M:	Sean Wang <sean.wang@mediatek.com>
 M:	Lorenzo Bianconi <lorenzo@kernel.org>
 L:	netdev@vger.kernel.org
 S:	Maintained
 MEDIATEK SWITCH DRIVER
 M:	Chester A. Unal <chester.a.unal@arinc9.com>
 M:	Daniel Golle <daniel@makrotopia.org>
-M:	DENG Qingfang <dqfext@gmail.com>
-M:	Sean Wang <sean.wang@mediatek.com>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	drivers/net/dsa/mt7530-mdio.c
 MEDIATEK T7XX 5G WWAN MODEM DRIVER
 M:	Chandrashekar Devegowda <chandrashekar.devegowda@intel.com>
-R:	Chiranjeevi Rapolu <chiranjeevi.rapolu@linux.intel.com>
 R:	Liu Haijun <haijun.liu@mediatek.com>
 R:	Ricardo Martinez <ricardo.martinez@linux.intel.com>
 L:	netdev@vger.kernel.org
 MEMORY MANAGEMENT - CORE
 M:	Andrew Morton <akpm@linux-foundation.org>
 M:	David Hildenbrand <david@kernel.org>
-R:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+R:	Lorenzo Stoakes <ljs@kernel.org>
 R:	Liam R. Howlett <Liam.Howlett@oracle.com>
-R:	Vlastimil Babka <vbabka@suse.cz>
+R:	Vlastimil Babka <vbabka@kernel.org>
 R:	Mike Rapoport <rppt@kernel.org>
 R:	Suren Baghdasaryan <surenb@google.com>
 R:	Michal Hocko <mhocko@suse.com>
 MEMORY MANAGEMENT - MISC
 M:	Andrew Morton <akpm@linux-foundation.org>
 M:	David Hildenbrand <david@kernel.org>
-R:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+R:	Lorenzo Stoakes <ljs@kernel.org>
 R:	Liam R. Howlett <Liam.Howlett@oracle.com>
-R:	Vlastimil Babka <vbabka@suse.cz>
+R:	Vlastimil Babka <vbabka@kernel.org>
 R:	Mike Rapoport <rppt@kernel.org>
 R:	Suren Baghdasaryan <surenb@google.com>
 R:	Michal Hocko <mhocko@suse.com>
 MEMORY MANAGEMENT - PAGE ALLOCATOR
 M:	Andrew Morton <akpm@linux-foundation.org>
-M:	Vlastimil Babka <vbabka@suse.cz>
+M:	Vlastimil Babka <vbabka@kernel.org>
 R:	Suren Baghdasaryan <surenb@google.com>
 R:	Michal Hocko <mhocko@suse.com>
 R:	Brendan Jackman <jackmanb@google.com>
 R:	Michal Hocko <mhocko@kernel.org>
 R:	Qi Zheng <zhengqi.arch@bytedance.com>
 R:	Shakeel Butt <shakeel.butt@linux.dev>
-R:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+R:	Lorenzo Stoakes <ljs@kernel.org>
 L:	linux-mm@kvack.org
 S:	Maintained
 F:	mm/vmscan.c
 MEMORY MANAGEMENT - RMAP (REVERSE MAPPING)
 M:	Andrew Morton <akpm@linux-foundation.org>
 M:	David Hildenbrand <david@kernel.org>
-M:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+M:	Lorenzo Stoakes <ljs@kernel.org>
 R:	Rik van Riel <riel@surriel.com>
 R:	Liam R. Howlett <Liam.Howlett@oracle.com>
-R:	Vlastimil Babka <vbabka@suse.cz>
+R:	Vlastimil Babka <vbabka@kernel.org>
 R:	Harry Yoo <harry.yoo@oracle.com>
 R:	Jann Horn <jannh@google.com>
 L:	linux-mm@kvack.org
 MEMORY MANAGEMENT - THP (TRANSPARENT HUGE PAGE)
 M:	Andrew Morton <akpm@linux-foundation.org>
 M:	David Hildenbrand <david@kernel.org>
-M:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+M:	Lorenzo Stoakes <ljs@kernel.org>
 R:	Zi Yan <ziy@nvidia.com>
 R:	Baolin Wang <baolin.wang@linux.alibaba.com>
 R:	Liam R. Howlett <Liam.Howlett@oracle.com>
 MEMORY MANAGEMENT - RUST
 M:	Alice Ryhl <aliceryhl@google.com>
-R:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+R:	Lorenzo Stoakes <ljs@kernel.org>
 R:	Liam R. Howlett <Liam.Howlett@oracle.com>
 L:	linux-mm@kvack.org
 L:	rust-for-linux@vger.kernel.org
 MEMORY MAPPING
 M:	Andrew Morton <akpm@linux-foundation.org>
 M:	Liam R. Howlett <Liam.Howlett@oracle.com>
-M:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+M:	Lorenzo Stoakes <ljs@kernel.org>
-R:	Vlastimil Babka <vbabka@suse.cz>
+R:	Vlastimil Babka <vbabka@kernel.org>
 R:	Jann Horn <jannh@google.com>
 R:	Pedro Falcato <pfalcato@suse.de>
 L:	linux-mm@kvack.org
 M:	Andrew Morton <akpm@linux-foundation.org>
 M:	Suren Baghdasaryan <surenb@google.com>
 M:	Liam R. Howlett <Liam.Howlett@oracle.com>
-M:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+M:	Lorenzo Stoakes <ljs@kernel.org>
-R:	Vlastimil Babka <vbabka@suse.cz>
+R:	Vlastimil Babka <vbabka@kernel.org>
 R:	Shakeel Butt <shakeel.butt@linux.dev>
 L:	linux-mm@kvack.org
 S:	Maintained
 MEMORY MAPPING - MADVISE (MEMORY ADVICE)
 M:	Andrew Morton <akpm@linux-foundation.org>
 M:	Liam R. Howlett <Liam.Howlett@oracle.com>
-M:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+M:	Lorenzo Stoakes <ljs@kernel.org>
 M:	David Hildenbrand <david@kernel.org>
-R:	Vlastimil Babka <vbabka@suse.cz>
+R:	Vlastimil Babka <vbabka@kernel.org>
 R:	Jann Horn <jannh@google.com>
 L:	linux-mm@kvack.org
 S:	Maintained
 OCELOT ETHERNET SWITCH DRIVER
 M:	Vladimir Oltean <vladimir.oltean@nxp.com>
-M:	Claudiu Manoil <claudiu.manoil@nxp.com>
-M:	Alexandre Belloni <alexandre.belloni@bootlin.com>
 M:	UNGLinuxDriver@microchip.com
 L:	netdev@vger.kernel.org
 S:	Supported
 F:	include/dt-bindings/
 OPENCOMPUTE PTP CLOCK DRIVER
-M:	Jonathan Lemon <jonathan.lemon@gmail.com>
 M:	Vadim Fedorenko <vadim.fedorenko@linux.dev>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	drivers/pci/controller/pci-aardvark.c
 PCI DRIVER FOR ALTERA PCIE IP
-M:	Joyce Ooi <joyce.ooi@intel.com>
 L:	linux-pci@vger.kernel.org
-S:	Supported
+S:	Orphan
 F:	Documentation/devicetree/bindings/pci/altr,pcie-root-port.yaml
 F:	drivers/pci/controller/pcie-altera.c
 F:	Documentation/PCI/pci-error-recovery.rst
 PCI MSI DRIVER FOR ALTERA MSI IP
-M:	Joyce Ooi <joyce.ooi@intel.com>
 L:	linux-pci@vger.kernel.org
-S:	Supported
+S:	Orphan
 F:	Documentation/devicetree/bindings/interrupt-controller/altr,msi-controller.yaml
 F:	drivers/pci/controller/pcie-altera-msi.c
 F:	drivers/pci/controller/dwc/pcie-kirin.c
 PCIE DRIVER FOR HISILICON STB
-M:	Shawn Guo <shawn.guo@linaro.org>
+M:	Shawn Guo <shawnguo@kernel.org>
 L:	linux-pci@vger.kernel.org
 S:	Maintained
 F:	Documentation/devicetree/bindings/pci/hisilicon-histb-pcie.txt
 F:	drivers/scsi/qedi/
 QLOGIC QL4xxx ETHERNET DRIVER
-M:	Manish Chopra <manishc@marvell.com>
 L:	netdev@vger.kernel.org
-S:	Maintained
+S:	Orphan
 F:	drivers/net/ethernet/qlogic/qed/
 F:	drivers/net/ethernet/qlogic/qede/
 F:	include/linux/qed/
 F:	drivers/net/ethernet/qualcomm/emac/
 QUALCOMM ETHQOS ETHERNET DRIVER
-M:	Vinod Koul <vkoul@kernel.org>
+M:	Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>
 L:	netdev@vger.kernel.org
 L:	linux-arm-msm@vger.kernel.org
 S:	Maintained
 RADOS BLOCK DEVICE (RBD)
 M:	Ilya Dryomov <idryomov@gmail.com>
-R:	Dongsheng Yang <dongsheng.yang@easystack.cn>
+R:	Dongsheng Yang <dongsheng.yang@linux.dev>
 L:	ceph-devel@vger.kernel.org
 S:	Supported
 W:	http://ceph.com/
 S:	Orphan
 F:	drivers/net/wireless/rsi/
+RELAY
+M:	Andrew Morton <akpm@linux-foundation.org>
+M:	Jens Axboe <axboe@kernel.dk>
+M:	Jason Xing <kernelxing@tencent.com>
+L:	linux-kernel@vger.kernel.org
+S:	Maintained
+F:	Documentation/filesystems/relay.rst
+F:	include/linux/relay.h
+F:	kernel/relay.c
 REGISTER MAP ABSTRACTION
 M:	Mark Brown <broonie@kernel.org>
 L:	linux-kernel@vger.kernel.org
 RUST [ALLOC]
 M:	Danilo Krummrich <dakr@kernel.org>
-R:	Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
+R:	Lorenzo Stoakes <ljs@kernel.org>
-R:	Vlastimil Babka <vbabka@suse.cz>
+R:	Vlastimil Babka <vbabka@kernel.org>
 R:	Liam R. Howlett <Liam.Howlett@oracle.com>
 R:	Uladzislau Rezki <urezki@gmail.com>
 L:	rust-for-linux@vger.kernel.org
 F:	Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml
 F:	Documentation/devicetree/bindings/watchdog/kontron,sl28cpld-wdt.yaml
 F:	drivers/gpio/gpio-sl28cpld.c
-F:	drivers/hwmon/sa67mcu-hwmon.c
 F:	drivers/hwmon/sl28cpld-hwmon.c
 F:	drivers/irqchip/irq-sl28cpld.c
 F:	drivers/pwm/pwm-sl28cpld.c
 F:	drivers/nvmem/layouts/sl28vpd.c
 SLAB ALLOCATOR
-M:	Vlastimil Babka <vbabka@suse.cz>
+M:	Vlastimil Babka <vbabka@kernel.org>
+M:	Harry Yoo <harry.yoo@oracle.com>
 M:	Andrew Morton <akpm@linux-foundation.org>
+R:	Hao Li <hao.li@linux.dev>
 R:	Christoph Lameter <cl@gentwo.org>
 R:	David Rientjes <rientjes@google.com>
 R:	Roman Gushchin <roman.gushchin@linux.dev>
-R:	Harry Yoo <harry.yoo@oracle.com>
 L:	linux-mm@kvack.org
 S:	Maintained
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/vbabka/slab.git
 F:	include/net/pkt_sched.h
 F:	include/net/sch_priv.h
 F:	include/net/tc_act/
+F:	include/net/tc_wrapper.h
 F:	include/uapi/linux/pkt_cls.h
 F:	include/uapi/linux/pkt_sched.h
 F:	include/uapi/linux/tc_act/
 THERMAL
 M:	Rafael J. Wysocki <rafael@kernel.org>
-M:	Daniel Lezcano <daniel.lezcano@linaro.org>
+M:	Daniel Lezcano <daniel.lezcano@kernel.org>
 R:	Zhang Rui <rui.zhang@intel.com>
 R:	Lukasz Luba <lukasz.luba@arm.com>
 L:	linux-pm@vger.kernel.org
 THERMAL/CPU_COOLING
 M:	Amit Daniel Kachhap <amit.kachhap@gmail.com>
-M:	Daniel Lezcano <daniel.lezcano@linaro.org>
+M:	Daniel Lezcano <daniel.lezcano@kernel.org>
 M:	Viresh Kumar <viresh.kumar@linaro.org>
 R:	Lukasz Luba <lukasz.luba@arm.com>
 L:	linux-pm@vger.kernel.org
 ZSWAP COMPRESSED SWAP CACHING
 M:	Johannes Weiner <hannes@cmpxchg.org>
-M:	Yosry Ahmed <yosry.ahmed@linux.dev>
+M:	Yosry Ahmed <yosry@kernel.org>
 M:	Nhat Pham <nphamcs@gmail.com>
 R:	Chengming Zhou <chengming.zhou@linux.dev>
 L:	linux-mm@kvack.org

Makefile+9−5

 VERSION = 7
 PATCHLEVEL = 0
 SUBLEVEL = 0
-EXTRAVERSION = -rc1
+EXTRAVERSION = -rc4
 NAME = Baby Opossum Posse
 # *DOCUMENTATION*
 export rust_common_flags := --edition=2021 \
 			    -Zbinary_dep_depinfo=y \
 			    -Astable_features \
+			    -Aunused_features \
 			    -Dnon_ascii_idents \
 			    -Dunsafe_op_in_unsafe_fn \
 			    -Wmissing_docs \
 # change __FILE__ to the relative path to the source directory
 ifdef building_out_of_srctree
 KBUILD_CPPFLAGS += -fmacro-prefix-map=$(srcroot)/=
+ifeq ($(call rustc-option-yn, --remap-path-scope=macro),y)
+KBUILD_RUSTFLAGS += --remap-path-prefix=$(srcroot)/= --remap-path-scope=macro
+endif
 endif
 # include additional Makefiles when needed
 	$(Q)$(MAKE) -sC $(srctree)/tools/bpf/resolve_btfids O=$(resolve_btfids_O) clean
 endif
-PHONY += objtool_clean
+PHONY += objtool_clean objtool_mrproper
 objtool_O = $(abspath $(objtree))/tools/objtool
-objtool_clean:
+objtool_clean objtool_mrproper:
 ifneq ($(wildcard $(objtool_O)),)
-	$(Q)$(MAKE) -sC $(abs_srctree)/tools/objtool O=$(objtool_O) srctree=$(abs_srctree) clean
+	$(Q)$(MAKE) -sC $(abs_srctree)/tools/objtool O=$(objtool_O) srctree=$(abs_srctree) $(patsubst objtool_%,%,$@)
 endif
 tools/: FORCE
 $(mrproper-dirs):
 	$(Q)$(MAKE) $(clean)=$(patsubst _mrproper_%,%,$@)
-mrproper: clean $(mrproper-dirs)
+mrproper: clean objtool_mrproper $(mrproper-dirs)
 	$(call cmd,rmfiles)
 	@find . $(RCS_FIND_IGNORE) \
 		\( -name '*.rmeta' \) \

arch/alpha/kernel/vmlinux.lds.S+1−0

@@ -71,6 +71,7 @@ SECTIONS · 70 unmodified lines
71		71
72	STABS_DEBUG	72	STABS_DEBUG
73	DWARF_DEBUG	73	DWARF_DEBUG
		74	MODINFO
74	ELF_DETAILS	75	ELF_DETAILS
75		76
76	DISCARDS	77	DISCARDS

arch/arc/kernel/vmlinux.lds.S+1−0

@@ -123,6 +123,7 @@ SECTIONS · 122 unmodified lines
123	_end = . ;	123	_end = . ;
124		124
125	STABS_DEBUG	125	STABS_DEBUG
		126	MODINFO
126	ELF_DETAILS	127	ELF_DETAILS
127	DISCARDS	128	DISCARDS
128		129

arch/arm/boot/compressed/vmlinux.lds.S+1−0

@@ -21,6 +21,7 @@ SECTIONS · 20 unmodified lines
21	COMMON_DISCARDS	21	COMMON_DISCARDS
22	(.ARM.exidx)	22	(.ARM.exidx)
23	(.ARM.extab)	23	(.ARM.extab)
		24	*(.modinfo)
24	(.note.)	25	(.note.)
25	(.rel.)	26	(.rel.)
26	*(.printk_index)	27	*(.printk_index)

arch/arm/kernel/vmlinux-xip.lds.S+1−0

@@ -154,6 +154,7 @@ SECTIONS · 153 unmodified lines
154		154
155	STABS_DEBUG	155	STABS_DEBUG
156	DWARF_DEBUG	156	DWARF_DEBUG
		157	MODINFO
157	ARM_DETAILS	158	ARM_DETAILS
158		159
159	ARM_ASSERTS	160	ARM_ASSERTS

arch/arm/kernel/vmlinux.lds.S+1−0

@@ -153,6 +153,7 @@ SECTIONS · 152 unmodified lines
153		153
154	STABS_DEBUG	154	STABS_DEBUG
155	DWARF_DEBUG	155	DWARF_DEBUG
		156	MODINFO
156	ARM_DETAILS	157	ARM_DETAILS
157		158
158	ARM_ASSERTS	159	ARM_ASSERTS

arch/arm64/include/asm/cmpxchg.h+7−5

 #define __xchg_wrapper(sfx, ptr, x)					\
 ({									\
 	__typeof__(*(ptr)) __ret;					\
-	__ret = (__typeof__(*(ptr)))					\
+	__ret = (__force __typeof__(*(ptr)))				\
-		__arch_xchg##sfx((unsigned long)(x), (ptr), sizeof(*(ptr))); \
+		__arch_xchg##sfx((__force unsigned long)(x), (ptr),	\
+				  sizeof(*(ptr)));			\
 	__ret;								\
 })
 #define __cmpxchg_wrapper(sfx, ptr, o, n)				\
 ({									\
 	__typeof__(*(ptr)) __ret;					\
-	__ret = (__typeof__(*(ptr)))					\
+	__ret = (__force __typeof__(*(ptr)))				\
-		__cmpxchg##sfx((ptr), (unsigned long)(o),		\
+		__cmpxchg##sfx((ptr), (__force unsigned long)(o),	\
-				(unsigned long)(n), sizeof(*(ptr)));	\
+				(__force unsigned long)(n),		\
+				sizeof(*(ptr)));			\
 	__ret;								\
 })

arch/arm64/include/asm/io.h+20−6

 typedef int (*ioremap_prot_hook_t)(phys_addr_t phys_addr, size_t size,
 				   pgprot_t *prot);
 int arm64_ioremap_prot_hook_register(const ioremap_prot_hook_t hook);
+void __iomem *__ioremap_prot(phys_addr_t phys, size_t size, pgprot_t prot);
-#define ioremap_prot ioremap_prot
+static inline void __iomem *ioremap_prot(phys_addr_t phys, size_t size,
+					 pgprot_t user_prot)
+{
+	pgprot_t prot;
+	ptdesc_t user_prot_val = pgprot_val(user_prot);
+	if (WARN_ON_ONCE(!(user_prot_val & PTE_USER)))
+		return NULL;
-#define _PAGE_IOREMAP PROT_DEVICE_nGnRE
+	prot = __pgprot_modify(PAGE_KERNEL, PTE_ATTRINDX_MASK,
+			       user_prot_val & PTE_ATTRINDX_MASK);
+	return __ioremap_prot(phys, size, prot);
+}
+#define ioremap_prot ioremap_prot
+#define ioremap(addr, size)	\
+	__ioremap_prot((addr), (size), __pgprot(PROT_DEVICE_nGnRE))
 #define ioremap_wc(addr, size)	\
-	ioremap_prot((addr), (size), __pgprot(PROT_NORMAL_NC))
+	__ioremap_prot((addr), (size), __pgprot(PROT_NORMAL_NC))
 #define ioremap_np(addr, size)	\
-	ioremap_prot((addr), (size), __pgprot(PROT_DEVICE_nGnRnE))
+	__ioremap_prot((addr), (size), __pgprot(PROT_DEVICE_nGnRnE))
 #define ioremap_encrypted(addr, size)	\
-	ioremap_prot((addr), (size), PAGE_KERNEL)
+	__ioremap_prot((addr), (size), PAGE_KERNEL)
 /*
  * io{read,write}{16,32,64}be() macros
 	if (pfn_is_map_memory(__phys_to_pfn(addr)))
 		return (void __iomem *)__phys_to_virt(addr);
-	return ioremap_prot(addr, size, __pgprot(PROT_NORMAL));
+	return __ioremap_prot(addr, size, __pgprot(PROT_NORMAL));
 }
 /*

arch/arm64/include/asm/kvm_host.h+5−1

 	/* Number of debug breakpoints/watchpoints for this CPU (minus 1) */
 	unsigned int debug_brps;
 	unsigned int debug_wrps;
+	/* Last vgic_irq part of the AP list recorded in an LR */
+	struct vgic_irq *last_lr_irq;
 };
 struct kvm_host_psci_config {
 	(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1PIE, IMP))
 #define kvm_has_s1poe(k)				\
-	(kvm_has_feat((k), ID_AA64MMFR3_EL1, S1POE, IMP))
+	(system_supports_poe() &&			\
+	 kvm_has_feat((k), ID_AA64MMFR3_EL1, S1POE, IMP))
 #define kvm_has_ras(k)					\
 	(kvm_has_feat((k), ID_AA64PFR0_EL1, RAS, IMP))

arch/arm64/include/asm/kvm_nested.h+2−0

@@ -397,6 +397,8 @@ int kvm_vcpu_allocate_vncr_tlb(struct kvm_vcpu *vcpu); · 396 unmodified lines
397	int kvm_handle_vncr_abort(struct kvm_vcpu *vcpu);	397	int kvm_handle_vncr_abort(struct kvm_vcpu *vcpu);
398	void kvm_handle_s1e2_tlbi(struct kvm_vcpu *vcpu, u32 inst, u64 val);	398	void kvm_handle_s1e2_tlbi(struct kvm_vcpu *vcpu, u32 inst, u64 val);
399		399
		400	u16 get_asid_by_regime(struct kvm_vcpu *vcpu, enum trans_regime regime);
		401
400	#define vncr_fixmap(c) \	402	#define vncr_fixmap(c) \
401	({ \	403	({ \
402	u32 __c = (c); \	404	u32 __c = (c); \

arch/arm64/include/asm/pgtable-prot.h+5−8

 #define _PAGE_DEFAULT		(_PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL))
-#define _PAGE_KERNEL		(PROT_NORMAL)
+#define _PAGE_KERNEL		(PROT_NORMAL | PTE_DIRTY)
-#define _PAGE_KERNEL_RO		((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY)
+#define _PAGE_KERNEL_RO		((PROT_NORMAL & ~PTE_WRITE) | PTE_RDONLY | PTE_DIRTY)
-#define _PAGE_KERNEL_ROX	((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY)
+#define _PAGE_KERNEL_ROX	((PROT_NORMAL & ~(PTE_WRITE | PTE_PXN)) | PTE_RDONLY | PTE_DIRTY)
-#define _PAGE_KERNEL_EXEC	(PROT_NORMAL & ~PTE_PXN)
+#define _PAGE_KERNEL_EXEC	((PROT_NORMAL & ~PTE_PXN) | PTE_DIRTY)
-#define _PAGE_KERNEL_EXEC_CONT	((PROT_NORMAL & ~PTE_PXN) | PTE_CONT)
+#define _PAGE_KERNEL_EXEC_CONT	((PROT_NORMAL & ~PTE_PXN) | PTE_CONT | PTE_DIRTY)
 #define _PAGE_SHARED		(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
 #define _PAGE_SHARED_EXEC	(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE)
 #define _PAGE_GCS	(_PAGE_DEFAULT | PTE_NG | PTE_UXN | PTE_WRITE | PTE_USER)
 #define _PAGE_GCS_RO	(_PAGE_DEFAULT | PTE_NG | PTE_UXN | PTE_USER)
-#define PAGE_GCS	__pgprot(_PAGE_GCS)
-#define PAGE_GCS_RO	__pgprot(_PAGE_GCS_RO)
 #define PIE_E0	( \
 	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS),           PIE_GCS)  | \
 	PIRx_ELx_PERM_PREP(pte_pi_index(_PAGE_GCS_RO),        PIE_R)   | \

arch/arm64/include/asm/runtime-const.h+4−0

@@ -2,6 +2,10 @@ · 1 unmodified line
2	#ifndef _ASM_RUNTIME_CONST_H	2	#ifndef _ASM_RUNTIME_CONST_H
3	#define _ASM_RUNTIME_CONST_H	3	#define _ASM_RUNTIME_CONST_H
4		4
		5	#ifdef MODULE
		6	#error "Cannot use runtime-const infrastructure from modules"
		7	#endif
		8
5	#include <asm/cacheflush.h>	9	#include <asm/cacheflush.h>
6		10
7	/* Sigh. You can still run arm64 in BE mode */	11	/* Sigh. You can still run arm64 in BE mode */

arch/arm64/include/asm/tlbflush.h+37−26

  */
 #define __TLBI_0(op, arg) asm (ARM64_ASM_PREAMBLE			       \
 			       "tlbi " #op "\n"				       \
-		   ALTERNATIVE("nop\n			nop",		       \
-			       "dsb ish\n		tlbi " #op,	       \
-			       ARM64_WORKAROUND_REPEAT_TLBI,		       \
-			       CONFIG_ARM64_WORKAROUND_REPEAT_TLBI)	       \
 			    : : )
 #define __TLBI_1(op, arg) asm (ARM64_ASM_PREAMBLE			       \
-			       "tlbi " #op ", %0\n"			       \
+			       "tlbi " #op ", %x0\n"			       \
-		   ALTERNATIVE("nop\n			nop",		       \
+			    : : "rZ" (arg))
-			       "dsb ish\n		tlbi " #op ", %0",     \
-			       ARM64_WORKAROUND_REPEAT_TLBI,		       \
-			       CONFIG_ARM64_WORKAROUND_REPEAT_TLBI)	       \
-			    : : "r" (arg))
 #define __TLBI_N(op, arg, n, ...) __TLBI_##n(op, arg)
 		(__pages >> (5 * (scale) + 1)) - 1;			\
 	})
+#define __repeat_tlbi_sync(op, arg...)						\
+do {										\
+	if (!alternative_has_cap_unlikely(ARM64_WORKAROUND_REPEAT_TLBI))	\
+		break;								\
+	__tlbi(op, ##arg);							\
+	dsb(ish);								\
+} while (0)
+/*
+ * Complete broadcast TLB maintenance issued by the host which invalidates
+ * stage 1 information in the host's own translation regime.
+ */
+static inline void __tlbi_sync_s1ish(void)
+{
+	dsb(ish);
+	__repeat_tlbi_sync(vale1is, 0);
+}
+/*
+ * Complete broadcast TLB maintenance issued by hyp code which invalidates
+ * stage 1 translation information in any translation regime.
+ */
+static inline void __tlbi_sync_s1ish_hyp(void)
+{
+	dsb(ish);
+	__repeat_tlbi_sync(vale2is, 0);
+}
 /*
  *	TLB Invalidation
  *	================
 {
 	dsb(ishst);
 	__tlbi(vmalle1is);
-	dsb(ish);
+	__tlbi_sync_s1ish();
 	isb();
 }
 	asid = __TLBI_VADDR(0, ASID(mm));
 	__tlbi(aside1is, asid);
 	__tlbi_user(aside1is, asid);
-	dsb(ish);
+	__tlbi_sync_s1ish();
 	mmu_notifier_arch_invalidate_secondary_tlbs(mm, 0, -1UL);
 }
 				  unsigned long uaddr)
 {
 	flush_tlb_page_nosync(vma, uaddr);
-	dsb(ish);
+	__tlbi_sync_s1ish();
 }
 static inline bool arch_tlbbatch_should_defer(struct mm_struct *mm)
 {
-	/*
-	 * TLB flush deferral is not required on systems which are affected by
-	 * ARM64_WORKAROUND_REPEAT_TLBI, as __tlbi()/__tlbi_user() implementation
-	 * will have two consecutive TLBI instructions with a dsb(ish) in between
-	 * defeating the purpose (i.e save overall 'dsb ish' cost).
-	 */
-	if (alternative_has_cap_unlikely(ARM64_WORKAROUND_REPEAT_TLBI))
-		return false;
 	return true;
 }
  */
 static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
 {
-	dsb(ish);
+	__tlbi_sync_s1ish();
 }
 /*
 {
 	__flush_tlb_range_nosync(vma->vm_mm, start, end, stride,
 				 last_level, tlb_level);
-	dsb(ish);
+	__tlbi_sync_s1ish();
 }
 static inline void local_flush_tlb_contpte(struct vm_area_struct *vma,
 	dsb(ishst);
 	__flush_tlb_range_op(vaale1is, start, pages, stride, 0,
 			     TLBI_TTL_UNKNOWN, false, lpa2_is_enabled());
-	dsb(ish);
+	__tlbi_sync_s1ish();
 	isb();
 }
 	dsb(ishst);
 	__tlbi(vaae1is, addr);
-	dsb(ish);
+	__tlbi_sync_s1ish();
 	isb();
 }

arch/arm64/kernel/acpi.c+1−1

@@ -377,7 +377,7 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) · 376 unmodified lines
377	prot = __acpi_get_writethrough_mem_attribute();	377	prot = __acpi_get_writethrough_mem_attribute();
378	}	378	}
379	}	379	}
380	return ioremap_prot(phys, size, prot);	380	return __ioremap_prot(phys, size, prot);
381	}	381	}
382		382
383	/*	383	/*

arch/arm64/kernel/cpufeature.c+9−0

@@ -2345,6 +2345,15 @@ static bool can_trap_icv_dir_el1(const struct arm64_cpu_capabilities *entry, · 2344 unmodified lines
2345	!is_midr_in_range_list(has_vgic_v3))	2345	!is_midr_in_range_list(has_vgic_v3))
2346	return false;	2346	return false;
2347		2347
		2348	/*
		2349	* pKVM prevents late onlining of CPUs. This means that whatever
		2350	* state the capability is in after deprivilege cannot be affected
		2351	* by a new CPU booting -- this is garanteed to be a CPU we have
		2352	* already seen, and the cap is therefore unchanged.
		2353	*/
		2354	if (system_capabilities_finalized() && is_protected_kvm_enabled())
		2355	return cpus_have_final_cap(ARM64_HAS_ICH_HCR_EL2_TDIR);
		2356
2348	if (is_kernel_in_hyp_mode())	2357	if (is_kernel_in_hyp_mode())
2349	res.a1 = read_sysreg_s(SYS_ICH_VTR_EL2);	2358	res.a1 = read_sysreg_s(SYS_ICH_VTR_EL2);
2350	else	2359	else

arch/arm64/kernel/sys_compat.c+1−1

@@ -37,7 +37,7 @@ __do_compat_cache_op(unsigned long start, unsigned long end) · 36 unmodified lines
37	* We pick the reserved-ASID to minimise the impact.	37	* We pick the reserved-ASID to minimise the impact.
38	*/	38	*/
39	__tlbi(aside1is, __TLBI_VADDR(0, 0));	39	__tlbi(aside1is, __TLBI_VADDR(0, 0));
40	dsb(ish);	40	__tlbi_sync_s1ish();
41	}	41	}
42		42
43	ret = caches_clean_inval_user_pou(start, start + chunk);	43	ret = caches_clean_inval_user_pou(start, start + chunk);

arch/arm64/kernel/topology.c+15−6

@@ -400,16 +400,25 @@ static inline · 399 unmodified lines
400	int counters_read_on_cpu(int cpu, smp_call_func_t func, u64 *val)	400	int counters_read_on_cpu(int cpu, smp_call_func_t func, u64 *val)
401	{	401	{
402	/*	402	/*
403	* Abort call on counterless CPU or when interrupts are	403	* Abort call on counterless CPU.
404	* disabled - can lead to deadlock in smp sync call.
405	*/	404	*/
406	if (!cpu_has_amu_feat(cpu))	405	if (!cpu_has_amu_feat(cpu))
407	return -EOPNOTSUPP;	406	return -EOPNOTSUPP;
408		407
409	if (WARN_ON_ONCE(irqs_disabled()))	408	if (irqs_disabled()) {
410	return -EPERM;	409	/*
411		410	* When IRQs are disabled (tick path: sched_tick ->
412	smp_call_function_single(cpu, func, val, 1);	411	* topology_scale_freq_tick or cppc_scale_freq_tick), only local
		412	* CPU counter reads are allowed. Remote CPU counter read would
		413	* require smp_call_function_single() which is unsafe with IRQs
		414	* disabled.
		415	*/
		416	if (WARN_ON_ONCE(cpu != smp_processor_id()))
		417	return -EPERM;
		418	func(val);
		419	} else {
		420	smp_call_function_single(cpu, func, val, 1);
		421	}
413		422
414	return 0;	423	return 0;
415	}	424	}

arch/arm64/kernel/vmlinux.lds.S+1−0

@@ -349,6 +349,7 @@ SECTIONS · 348 unmodified lines
349		349
350	STABS_DEBUG	350	STABS_DEBUG
351	DWARF_DEBUG	351	DWARF_DEBUG
		352	MODINFO
352	ELF_DETAILS	353	ELF_DETAILS
353		354
354	HEAD_SYMBOLS	355	HEAD_SYMBOLS

arch/arm64/kvm/Kconfig+0−1

@@ -21,7 +21,6 @@ menuconfig KVM · 20 unmodified lines
21	bool "Kernel-based Virtual Machine (KVM) support"	21	bool "Kernel-based Virtual Machine (KVM) support"
22	select KVM_COMMON	22	select KVM_COMMON
23	select KVM_GENERIC_HARDWARE_ENABLING	23	select KVM_GENERIC_HARDWARE_ENABLING
24	select KVM_GENERIC_MMU_NOTIFIER
25	select HAVE_KVM_CPU_RELAX_INTERCEPT	24	select HAVE_KVM_CPU_RELAX_INTERCEPT
26	select KVM_MMIO	25	select KVM_MMIO
27	select KVM_GENERIC_DIRTYLOG_READ_PROTECT	26	select KVM_GENERIC_DIRTYLOG_READ_PROTECT

arch/arm64/kvm/arm.c+0−1

@@ -358,7 +358,6 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 357 unmodified lines
358	break;	358	break;
359	case KVM_CAP_IOEVENTFD:	359	case KVM_CAP_IOEVENTFD:
360	case KVM_CAP_USER_MEMORY:	360	case KVM_CAP_USER_MEMORY:
361	case KVM_CAP_SYNC_MMU:
362	case KVM_CAP_DESTROY_MEMORY_REGION_WORKS:	361	case KVM_CAP_DESTROY_MEMORY_REGION_WORKS:
363	case KVM_CAP_ONE_REG:	362	case KVM_CAP_ONE_REG:
364	case KVM_CAP_ARM_PSCI:	363	case KVM_CAP_ARM_PSCI:

arch/arm64/kvm/at.c+2−27

@@ -540,31 +540,8 @@ static int walk_s1(struct kvm_vcpu vcpu, struct s1_walk_info wi, · 539 unmodified lines
540	wr->pa \|= va & GENMASK_ULL(va_bottom - 1, 0);	540	wr->pa \|= va & GENMASK_ULL(va_bottom - 1, 0);
541		541
542	wr->nG = (wi->regime != TR_EL2) && (desc & PTE_NG);	542	wr->nG = (wi->regime != TR_EL2) && (desc & PTE_NG);
543	if (wr->nG) {	543	if (wr->nG)
544	u64 asid_ttbr, tcr;	544	wr->asid = get_asid_by_regime(vcpu, wi->regime);
545
546	switch (wi->regime) {
547	case TR_EL10:
548	tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);
549	asid_ttbr = ((tcr & TCR_A1) ?
550	vcpu_read_sys_reg(vcpu, TTBR1_EL1) :
551	vcpu_read_sys_reg(vcpu, TTBR0_EL1));
552	break;
553	case TR_EL20:
554	tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);
555	asid_ttbr = ((tcr & TCR_A1) ?
556	vcpu_read_sys_reg(vcpu, TTBR1_EL2) :
557	vcpu_read_sys_reg(vcpu, TTBR0_EL2));
558	break;
559	default:
560	BUG();
561	}
562
563	wr->asid = FIELD_GET(TTBR_ASID_MASK, asid_ttbr);
564	if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) \|\|
565	!(tcr & TCR_ASID16))
566	wr->asid &= GENMASK(7, 0);
567	}
568		545
569	return 0;	546	return 0;
570		547
@@ -1527,8 +1504,6 @@ int __kvm_at_s1e2(struct kvm_vcpu *vcpu, u32 op, u64 vaddr) · 956 unmodified lines
1527	fail = true;	1504	fail = true;
1528	}	1505	}
1529		1506
1530	isb();
1531
1532	if (!fail)	1507	if (!fail)
1533	par = read_sysreg_par();	1508	par = read_sysreg_par();
1534		1509

arch/arm64/kvm/guest.c+2−2

@@ -29,7 +29,7 @@ · 28 unmodified lines
29		29
30	#include "trace.h"	30	#include "trace.h"
31		31
32	const struct _kvm_stats_desc kvm_vm_stats_desc[] = {	32	const struct kvm_stats_desc kvm_vm_stats_desc[] = {
33	KVM_GENERIC_VM_STATS()	33	KVM_GENERIC_VM_STATS()
34	};	34	};
35		35
@@ -42,7 +42,7 @@ const struct kvm_stats_header kvm_vm_stats_header = { · 6 unmodified lines
42	sizeof(kvm_vm_stats_desc),	42	sizeof(kvm_vm_stats_desc),
43	};	43	};
44		44
45	const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {	45	const struct kvm_stats_desc kvm_vcpu_stats_desc[] = {
46	KVM_GENERIC_VCPU_STATS(),	46	KVM_GENERIC_VCPU_STATS(),
47	STATS_DESC_COUNTER(VCPU, hvc_exit_stat),	47	STATS_DESC_COUNTER(VCPU, hvc_exit_stat),
48	STATS_DESC_COUNTER(VCPU, wfe_exit_stat),	48	STATS_DESC_COUNTER(VCPU, wfe_exit_stat),

arch/arm64/kvm/hyp/nvhe/mem_protect.c+1−1

@@ -518,7 +518,7 @@ static int host_stage2_adjust_range(u64 addr, struct kvm_mem_range *range) · 517 unmodified lines
518	granule = kvm_granule_size(level);	518	granule = kvm_granule_size(level);
519	cur.start = ALIGN_DOWN(addr, granule);	519	cur.start = ALIGN_DOWN(addr, granule);
520	cur.end = cur.start + granule;	520	cur.end = cur.start + granule;
521	if (!range_included(&cur, range))	521	if (!range_included(&cur, range) && level < KVM_PGTABLE_LAST_LEVEL)
522	continue;	522	continue;
523	*range = cur;	523	*range = cur;
524	return 0;	524	return 0;

arch/arm64/kvm/hyp/nvhe/mm.c+1−1

@@ -271,7 +271,7 @@ static void fixmap_clear_slot(struct hyp_fixmap_slot *slot) · 270 unmodified lines
271	*/	271	*/
272	dsb(ishst);	272	dsb(ishst);
273	__tlbi_level(vale2is, __TLBI_VADDR(addr, 0), level);	273	__tlbi_level(vale2is, __TLBI_VADDR(addr, 0), level);
274	dsb(ish);	274	__tlbi_sync_s1ish_hyp();
275	isb();	275	isb();
276	}	276	}
277		277

arch/arm64/kvm/hyp/nvhe/pkvm.c+34−3

@@ -342,6 +342,7 @@ static void pkvm_init_features_from_host(struct pkvm_hyp_vm *hyp_vm, const struc · 341 unmodified lines
342	/* No restrictions for non-protected VMs. */	342	/* No restrictions for non-protected VMs. */
343	if (!kvm_vm_is_protected(kvm)) {	343	if (!kvm_vm_is_protected(kvm)) {
344	hyp_vm->kvm.arch.flags = host_arch_flags;	344	hyp_vm->kvm.arch.flags = host_arch_flags;
		345	hyp_vm->kvm.arch.flags &= ~BIT_ULL(KVM_ARCH_FLAG_ID_REGS_INITIALIZED);
345		346
346	bitmap_copy(kvm->arch.vcpu_features,	347	bitmap_copy(kvm->arch.vcpu_features,
347	host_kvm->arch.vcpu_features,	348	host_kvm->arch.vcpu_features,
@@ -391,7 +392,7 @@ static void unpin_host_sve_state(struct pkvm_hyp_vcpu *hyp_vcpu) · 43 unmodified lines
391	if (!vcpu_has_feature(&hyp_vcpu->vcpu, KVM_ARM_VCPU_SVE))	392	if (!vcpu_has_feature(&hyp_vcpu->vcpu, KVM_ARM_VCPU_SVE))
392	return;	393	return;
393		394
394	sve_state = kern_hyp_va(hyp_vcpu->vcpu.arch.sve_state);	395	sve_state = hyp_vcpu->vcpu.arch.sve_state;
395	hyp_unpin_shared_mem(sve_state,	396	hyp_unpin_shared_mem(sve_state,
396	sve_state + vcpu_sve_state_size(&hyp_vcpu->vcpu));	397	sve_state + vcpu_sve_state_size(&hyp_vcpu->vcpu));
397	}	398	}
@@ -471,6 +472,35 @@ err: · 73 unmodified lines
471	return ret;	472	return ret;
472	}	473	}
473		474
		475	static int vm_copy_id_regs(struct pkvm_hyp_vcpu *hyp_vcpu)
		476	{
		477	struct pkvm_hyp_vm *hyp_vm = pkvm_hyp_vcpu_to_hyp_vm(hyp_vcpu);
		478	const struct kvm *host_kvm = hyp_vm->host_kvm;
		479	struct kvm *kvm = &hyp_vm->kvm;
		480
		481	if (!test_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &host_kvm->arch.flags))
		482	return -EINVAL;
		483
		484	if (test_and_set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags))
		485	return 0;
		486
		487	memcpy(kvm->arch.id_regs, host_kvm->arch.id_regs, sizeof(kvm->arch.id_regs));
		488
		489	return 0;
		490	}
		491
		492	static int pkvm_vcpu_init_sysregs(struct pkvm_hyp_vcpu *hyp_vcpu)
		493	{
		494	int ret = 0;
		495
		496	if (pkvm_hyp_vcpu_is_protected(hyp_vcpu))
		497	kvm_init_pvm_id_regs(&hyp_vcpu->vcpu);
		498	else
		499	ret = vm_copy_id_regs(hyp_vcpu);
		500
		501	return ret;
		502	}
		503
474	static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu,	504	static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu,
475	struct pkvm_hyp_vm *hyp_vm,	505	struct pkvm_hyp_vm *hyp_vm,
476	struct kvm_vcpu *host_vcpu)	506	struct kvm_vcpu *host_vcpu)
@@ -490,8 +520,9 @@ static int init_pkvm_hyp_vcpu(struct pkvm_hyp_vcpu *hyp_vcpu, · 13 unmodified lines
490	hyp_vcpu->vcpu.arch.cflags = READ_ONCE(host_vcpu->arch.cflags);	520	hyp_vcpu->vcpu.arch.cflags = READ_ONCE(host_vcpu->arch.cflags);
491	hyp_vcpu->vcpu.arch.mp_state.mp_state = KVM_MP_STATE_STOPPED;	521	hyp_vcpu->vcpu.arch.mp_state.mp_state = KVM_MP_STATE_STOPPED;
492		522
493	if (pkvm_hyp_vcpu_is_protected(hyp_vcpu))	523	ret = pkvm_vcpu_init_sysregs(hyp_vcpu);
494	kvm_init_pvm_id_regs(&hyp_vcpu->vcpu);	524	if (ret)
		525	goto done;
495		526
496	ret = pkvm_vcpu_init_traps(hyp_vcpu);	527	ret = pkvm_vcpu_init_traps(hyp_vcpu);
497	if (ret)	528	if (ret)

arch/arm64/kvm/hyp/nvhe/tlb.c+4−4

@@ -169,7 +169,7 @@ void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, · 168 unmodified lines
169	*/	169	*/
170	dsb(ish);	170	dsb(ish);
171	__tlbi(vmalle1is);	171	__tlbi(vmalle1is);
172	dsb(ish);	172	__tlbi_sync_s1ish_hyp();
173	isb();	173	isb();
174		174
175	exit_vmid_context(&cxt);	175	exit_vmid_context(&cxt);
@@ -226,7 +226,7 @@ void __kvm_tlb_flush_vmid_range(struct kvm_s2_mmu *mmu, · 50 unmodified lines
226		226
227	dsb(ish);	227	dsb(ish);
228	__tlbi(vmalle1is);	228	__tlbi(vmalle1is);
229	dsb(ish);	229	__tlbi_sync_s1ish_hyp();
230	isb();	230	isb();
231		231
232	exit_vmid_context(&cxt);	232	exit_vmid_context(&cxt);
@@ -240,7 +240,7 @@ void __kvm_tlb_flush_vmid(struct kvm_s2_mmu *mmu) · 7 unmodified lines
240	enter_vmid_context(mmu, &cxt, false);	240	enter_vmid_context(mmu, &cxt, false);
241		241
242	__tlbi(vmalls12e1is);	242	__tlbi(vmalls12e1is);
243	dsb(ish);	243	__tlbi_sync_s1ish_hyp();
244	isb();	244	isb();
245		245
246	exit_vmid_context(&cxt);	246	exit_vmid_context(&cxt);
@@ -266,5 +266,5 @@ void __kvm_flush_vm_context(void) · 19 unmodified lines
266	/* Same remark as in enter_vmid_context() */	266	/* Same remark as in enter_vmid_context() */
267	dsb(ish);	267	dsb(ish);
268	__tlbi(alle1is);	268	__tlbi(alle1is);
269	dsb(ish);	269	__tlbi_sync_s1ish_hyp();
270	}	270	}

arch/arm64/kvm/hyp/pgtable.c+1−1

@@ -501,7 +501,7 @@ static int hyp_unmap_walker(const struct kvm_pgtable_visit_ctx *ctx, · 500 unmodified lines
501	*unmapped += granule;	501	*unmapped += granule;
502	}	502	}
503		503
504	dsb(ish);	504	__tlbi_sync_s1ish_hyp();
505	isb();	505	isb();
506	mm_ops->put_page(ctx->ptep);	506	mm_ops->put_page(ctx->ptep);
507		507

arch/arm64/kvm/hyp/vhe/tlb.c+5−5

@@ -115,7 +115,7 @@ void __kvm_tlb_flush_vmid_ipa(struct kvm_s2_mmu *mmu, · 114 unmodified lines
115	*/	115	*/
116	dsb(ish);	116	dsb(ish);
117	__tlbi(vmalle1is);	117	__tlbi(vmalle1is);
118	dsb(ish);	118	__tlbi_sync_s1ish_hyp();
119	isb();	119	isb();
120		120
121	exit_vmid_context(&cxt);	121	exit_vmid_context(&cxt);
@@ -176,7 +176,7 @@ void __kvm_tlb_flush_vmid_range(struct kvm_s2_mmu *mmu, · 54 unmodified lines
176		176
177	dsb(ish);	177	dsb(ish);
178	__tlbi(vmalle1is);	178	__tlbi(vmalle1is);
179	dsb(ish);	179	__tlbi_sync_s1ish_hyp();
180	isb();	180	isb();
181		181
182	exit_vmid_context(&cxt);	182	exit_vmid_context(&cxt);
@@ -192,7 +192,7 @@ void __kvm_tlb_flush_vmid(struct kvm_s2_mmu *mmu) · 9 unmodified lines
192	enter_vmid_context(mmu, &cxt);	192	enter_vmid_context(mmu, &cxt);
193		193
194	__tlbi(vmalls12e1is);	194	__tlbi(vmalls12e1is);
195	dsb(ish);	195	__tlbi_sync_s1ish_hyp();
196	isb();	196	isb();
197		197
198	exit_vmid_context(&cxt);	198	exit_vmid_context(&cxt);
@@ -217,7 +217,7 @@ void __kvm_flush_vm_context(void) · 18 unmodified lines
217	{	217	{
218	dsb(ishst);	218	dsb(ishst);
219	__tlbi(alle1is);	219	__tlbi(alle1is);
220	dsb(ish);	220	__tlbi_sync_s1ish_hyp();
221	}	221	}
222		222
223	/*	223	/*
@@ -358,7 +358,7 @@ int __kvm_tlbi_s1e2(struct kvm_s2_mmu *mmu, u64 va, u64 sys_encoding) · 134 unmodified lines
358	default:	358	default:
359	ret = -EINVAL;	359	ret = -EINVAL;
360	}	360	}
361	dsb(ish);	361	__tlbi_sync_s1ish_hyp();
362	isb();	362	isb();
363		363
364	if (mmu)	364	if (mmu)

arch/arm64/kvm/mmu.c+14−12

 		force_pte = (max_map_size == PAGE_SIZE);
 		vma_pagesize = min_t(long, vma_pagesize, max_map_size);
+		vma_shift = __ffs(vma_pagesize);
 	}
 	/*
-	 * Both the canonical IPA and fault IPA must be hugepage-aligned to
+	 * Both the canonical IPA and fault IPA must be aligned to the
-	 * ensure we find the right PFN and lay down the mapping in the right
+	 * mapping size to ensure we find the right PFN and lay down the
-	 * place.
+	 * mapping in the right place.
 	 */
-	if (vma_pagesize == PMD_SIZE || vma_pagesize == PUD_SIZE) {
+	fault_ipa = ALIGN_DOWN(fault_ipa, vma_pagesize);
-		fault_ipa &= ~(vma_pagesize - 1);
+	ipa = ALIGN_DOWN(ipa, vma_pagesize);
-		ipa &= ~(vma_pagesize - 1);
-	}
 	gfn = ipa >> PAGE_SHIFT;
 	mte_allowed = kvm_vma_mte_allowed(vma);
 	if (exec_fault && s2_force_noncacheable)
 		ret = -ENOEXEC;
-	if (ret) {
+	if (ret)
-		kvm_release_page_unused(page);
+		goto out_put_page;
-		return ret;
-	}
 	/*
 	 * Guest performs atomic/exclusive operations on memory with unsupported
 	 */
 	if (esr_fsc_is_excl_atomic_fault(kvm_vcpu_get_esr(vcpu))) {
 		kvm_inject_dabt_excl_atomic(vcpu, kvm_vcpu_get_hfar(vcpu));
-		return 1;
+		ret = 1;
+		goto out_put_page;
 	}
 	if (nested)
 		mark_page_dirty_in_slot(kvm, memslot, gfn);
 	return ret != -EAGAIN ? ret : 0;
+out_put_page:
+	kvm_release_page_unused(page);
+	return ret;
 }
 /* Resolve the access fault by making the page young again. */

arch/arm64/kvm/nested.c+47−43

 	return 64 - wi->t0sz;
 }
-static int check_base_s2_limits(struct s2_walk_info *wi,
+static int check_base_s2_limits(struct kvm_vcpu *vcpu, struct s2_walk_info *wi,
 				int level, int input_size, int stride)
 {
-	int start_size, ia_size;
+	int start_size, pa_max;
-	ia_size = get_ia_size(wi);
+	pa_max = kvm_get_pa_bits(vcpu->kvm);
 	/* Check translation limits */
 	switch (BIT(wi->pgshift)) {
 	case SZ_64K:
-		if (level == 0 || (level == 1 && ia_size <= 42))
+		if (level == 0 || (level == 1 && pa_max <= 42))
 			return -EFAULT;
 		break;
 	case SZ_16K:
-		if (level == 0 || (level == 1 && ia_size <= 40))
+		if (level == 0 || (level == 1 && pa_max <= 40))
 			return -EFAULT;
 		break;
 	case SZ_4K:
-		if (level < 0 || (level == 0 && ia_size <= 42))
+		if (level < 0 || (level == 0 && pa_max <= 42))
 			return -EFAULT;
 		break;
 	}
 	/* Check input size limits */
-	if (input_size > ia_size)
+	if (input_size > pa_max)
 		return -EFAULT;
 	/* Check number of entries in starting level table */
 	if (input_size > 48 || input_size < 25)
 		return -EFAULT;
-	ret = check_base_s2_limits(wi, level, input_size, stride);
+	ret = check_base_s2_limits(vcpu, wi, level, input_size, stride);
-	if (WARN_ON(ret))
+	if (WARN_ON(ret)) {
+		out->esr = compute_fsc(0, ESR_ELx_FSC_FAULT);
 		return ret;
+	}
 	base_lower_bound = 3 + input_size - ((3 - level) * stride +
 			   wi->pgshift);
 	base_addr = wi->baddr & GENMASK_ULL(47, base_lower_bound);
 	if (check_output_size(wi, base_addr)) {
-		out->esr = compute_fsc(level, ESR_ELx_FSC_ADDRSZ);
+		/* R_BFHQH */
+		out->esr = compute_fsc(0, ESR_ELx_FSC_ADDRSZ);
 		return 1;
 	}
 		paddr = base_addr | index;
 		ret = read_guest_s2_desc(vcpu, paddr, &desc, wi);
-		if (ret < 0)
+		if (ret < 0) {
+			out->esr = ESR_ELx_FSC_SEA_TTW(level);
 			return ret;
+		}
 		new_desc = desc;
 	return kvm_inject_nested_sync(vcpu, esr_el2);
 }
+u16 get_asid_by_regime(struct kvm_vcpu *vcpu, enum trans_regime regime)
+{
+	enum vcpu_sysreg ttbr_elx;
+	u64 tcr;
+	u16 asid;
+	switch (regime) {
+	case TR_EL10:
+		tcr = vcpu_read_sys_reg(vcpu, TCR_EL1);
+		ttbr_elx = (tcr & TCR_A1) ? TTBR1_EL1 : TTBR0_EL1;
+		break;
+	case TR_EL20:
+		tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);
+		ttbr_elx = (tcr & TCR_A1) ? TTBR1_EL2 : TTBR0_EL2;
+		break;
+	default:
+		BUG();
+	}
+	asid = FIELD_GET(TTBRx_EL1_ASID, vcpu_read_sys_reg(vcpu, ttbr_elx));
+	if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||
+	    !(tcr & TCR_ASID16))
+		asid &= GENMASK(7, 0);
+	return asid;
+}
 static void invalidate_vncr(struct vncr_tlb *vt)
 {
 	vt->valid = false;
 {
 	int i;
-	if (!kvm->arch.nested_mmus_size)
-		return;
 	for (i = 0; i < kvm->arch.nested_mmus_size; i++) {
 		struct kvm_s2_mmu *mmu = &kvm->arch.nested_mmus[i];
 	if (read_vncr_el2(vcpu) != vt->gva)
 		return false;
-	if (vt->wr.nG) {
+	if (vt->wr.nG)
-		u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);
+		return get_asid_by_regime(vcpu, TR_EL20) == vt->wr.asid;
-		u64 ttbr = ((tcr & TCR_A1) ?
-			    vcpu_read_sys_reg(vcpu, TTBR1_EL2) :
-			    vcpu_read_sys_reg(vcpu, TTBR0_EL2));
-		u16 asid;
-		asid = FIELD_GET(TTBR_ASID_MASK, ttbr);
-		if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||
-		    !(tcr & TCR_ASID16))
-			asid &= GENMASK(7, 0);
-		return asid == vt->wr.asid;
-	}
 	return true;
 }
 	if (read_vncr_el2(vcpu) != vt->gva)
 		return;
-	if (vt->wr.nG) {
+	if (vt->wr.nG && get_asid_by_regime(vcpu, TR_EL20) != vt->wr.asid)
-		u64 tcr = vcpu_read_sys_reg(vcpu, TCR_EL2);
+		return;
-		u64 ttbr = ((tcr & TCR_A1) ?
-			    vcpu_read_sys_reg(vcpu, TTBR1_EL2) :
-			    vcpu_read_sys_reg(vcpu, TTBR0_EL2));
-		u16 asid;
-		asid = FIELD_GET(TTBR_ASID_MASK, ttbr);
-		if (!kvm_has_feat_enum(vcpu->kvm, ID_AA64MMFR0_EL1, ASIDBITS, 16) ||
-		    !(tcr & TCR_ASID16))
-			asid &= GENMASK(7, 0);
-		if (asid != vt->wr.asid)
-			return;
-	}
 	vt->cpu = smp_processor_id();

arch/arm64/kvm/sys_regs.c+3−0

 		       ID_AA64MMFR3_EL1_SCTLRX |
 		       ID_AA64MMFR3_EL1_S1POE |
 		       ID_AA64MMFR3_EL1_S1PIE;
+		if (!system_supports_poe())
+			val &= ~ID_AA64MMFR3_EL1_S1POE;
 		break;
 	case SYS_ID_MMFR4_EL1:
 		val &= ~ID_MMFR4_EL1_CCIDX;

arch/arm64/kvm/vgic/vgic-init.c+16−16

 	kvm->arch.vgic.in_kernel = true;
 	kvm->arch.vgic.vgic_model = type;
 	kvm->arch.vgic.implementation_rev = KVM_VGIC_IMP_REV_LATEST;
+	kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;
+	aa64pfr0 = kvm_read_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1) & ~ID_AA64PFR0_EL1_GIC;
+	pfr1 = kvm_read_vm_id_reg(kvm, SYS_ID_PFR1_EL1) & ~ID_PFR1_EL1_GIC;
+	if (type == KVM_DEV_TYPE_ARM_VGIC_V2) {
+		kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;
+	} else {
+		INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);
+		aa64pfr0 |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, GIC, IMP);
+		pfr1 |= SYS_FIELD_PREP_ENUM(ID_PFR1_EL1, GIC, GICv3);
+	}
+	kvm_set_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1, aa64pfr0);
+	kvm_set_vm_id_reg(kvm, SYS_ID_PFR1_EL1, pfr1);
 	kvm_for_each_vcpu(i, vcpu, kvm) {
 		ret = vgic_allocate_private_irqs_locked(vcpu, type);
 			vgic_cpu->private_irqs = NULL;
 		}
+		kvm->arch.vgic.vgic_model = 0;
 		goto out_unlock;
 	}
-	kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;
-	aa64pfr0 = kvm_read_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1) & ~ID_AA64PFR0_EL1_GIC;
-	pfr1 = kvm_read_vm_id_reg(kvm, SYS_ID_PFR1_EL1) & ~ID_PFR1_EL1_GIC;
-	if (type == KVM_DEV_TYPE_ARM_VGIC_V2) {
-		kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;
-	} else {
-		INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);
-		aa64pfr0 |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, GIC, IMP);
-		pfr1 |= SYS_FIELD_PREP_ENUM(ID_PFR1_EL1, GIC, GICv3);
-	}
-	kvm_set_vm_id_reg(kvm, SYS_ID_AA64PFR0_EL1, aa64pfr0);
-	kvm_set_vm_id_reg(kvm, SYS_ID_PFR1_EL1, pfr1);
 	if (type == KVM_DEV_TYPE_ARM_VGIC_V3)
 		kvm->arch.vgic.nassgicap = system_supports_direct_sgis();

arch/arm64/kvm/vgic/vgic-v2.c+2−2

@@ -115,7 +115,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) · 114 unmodified lines
115	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;	115	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
116	struct vgic_v2_cpu_if *cpuif = &vgic_cpu->vgic_v2;	116	struct vgic_v2_cpu_if *cpuif = &vgic_cpu->vgic_v2;
117	u32 eoicount = FIELD_GET(GICH_HCR_EOICOUNT, cpuif->vgic_hcr);	117	u32 eoicount = FIELD_GET(GICH_HCR_EOICOUNT, cpuif->vgic_hcr);
118	struct vgic_irq *irq;	118	struct vgic_irq irq = host_data_ptr(last_lr_irq);
119		119
120	DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());	120	DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());
121		121
@@ -123,7 +123,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) · 1 unmodified line
123	vgic_v2_fold_lr(vcpu, cpuif->vgic_lr[lr]);	123	vgic_v2_fold_lr(vcpu, cpuif->vgic_lr[lr]);
124		124
125	/* See the GICv3 equivalent for the EOIcount handling rationale */	125	/* See the GICv3 equivalent for the EOIcount handling rationale */
126	list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {	126	list_for_each_entry_continue(irq, &vgic_cpu->ap_list_head, ap_list) {
127	u32 lr;	127	u32 lr;
128		128
129	if (!eoicount) {	129	if (!eoicount) {

arch/arm64/kvm/vgic/vgic-v3.c+6−6

@@ -148,7 +148,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) · 147 unmodified lines
148	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;	148	struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
149	struct vgic_v3_cpu_if *cpuif = &vgic_cpu->vgic_v3;	149	struct vgic_v3_cpu_if *cpuif = &vgic_cpu->vgic_v3;
150	u32 eoicount = FIELD_GET(ICH_HCR_EL2_EOIcount, cpuif->vgic_hcr);	150	u32 eoicount = FIELD_GET(ICH_HCR_EL2_EOIcount, cpuif->vgic_hcr);
151	struct vgic_irq *irq;	151	struct vgic_irq irq = host_data_ptr(last_lr_irq);
152		152
153	DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());	153	DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());
154		154
@@ -158,12 +158,12 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) · 3 unmodified lines
158	/*	158	/*
159	* EOIMode=0: use EOIcount to emulate deactivation. We are	159	* EOIMode=0: use EOIcount to emulate deactivation. We are
160	* guaranteed to deactivate in reverse order of the activation, so	160	* guaranteed to deactivate in reverse order of the activation, so
161	* just pick one active interrupt after the other in the ap_list,	161	* just pick one active interrupt after the other in the tail part
162	* and replay the deactivation as if the CPU was doing it. We also	162	* of the ap_list, past the LRs, and replay the deactivation as if
163	* rely on priority drop to have taken place, and the list to be	163	* the CPU was doing it. We also rely on priority drop to have taken
164	* sorted by priority.	164	* place, and the list to be sorted by priority.
165	*/	165	*/
166	list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {	166	list_for_each_entry_continue(irq, &vgic_cpu->ap_list_head, ap_list) {
167	u64 lr;	167	u64 lr;
168		168
169	/*	169	/*

arch/arm64/kvm/vgic/vgic.c+6−0

 static inline void vgic_fold_lr_state(struct kvm_vcpu *vcpu)
 {
+	if (!*host_data_ptr(last_lr_irq))
+		return;
 	if (kvm_vgic_global_state.type == VGIC_V2)
 		vgic_v2_fold_lr_state(vcpu);
 	else
 	if (irqs_outside_lrs(&als))
 		vgic_sort_ap_list(vcpu);
+	*host_data_ptr(last_lr_irq) = NULL;
 	list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
 		scoped_guard(raw_spinlock,  &irq->irq_lock) {
 			if (likely(vgic_target_oracle(irq) == vcpu)) {
 				vgic_populate_lr(vcpu, irq, count++);
+				*host_data_ptr(last_lr_irq) = irq;
 			}
 		}

arch/arm64/lib/delay.c+5−1

  * Note that userspace cannot change the offset behind our back either,
  * as the vcpu mutex is held as long as KVM_RUN is in progress.
  */
-#define __delay_cycles()	__arch_counter_get_cntvct_stable()
+static cycles_t notrace __delay_cycles(void)
+{
+	guard(preempt_notrace)();
+	return __arch_counter_get_cntvct_stable();
+}
 void __delay(unsigned long cycles)
 {

arch/arm64/mm/contpte.c+49−4

@@ -599,6 +599,27 @@ void contpte_clear_young_dirty_ptes(struct vm_area_struct *vma, · 598 unmodified lines
599	}	599	}
600	EXPORT_SYMBOL_GPL(contpte_clear_young_dirty_ptes);	600	EXPORT_SYMBOL_GPL(contpte_clear_young_dirty_ptes);
601		601
		602	static bool contpte_all_subptes_match_access_flags(pte_t *ptep, pte_t entry)
		603	{
		604	pte_t *cont_ptep = contpte_align_down(ptep);
		605	/*
		606	* PFNs differ per sub-PTE. Match only bits consumed by
		607	* __ptep_set_access_flags(): AF, DIRTY and write permission.
		608	*/
		609	const pteval_t cmp_mask = PTE_RDONLY \| PTE_AF \| PTE_WRITE \| PTE_DIRTY;
		610	pteval_t entry_cmp = pte_val(entry) & cmp_mask;
		611	int i;
		612
		613	for (i = 0; i < CONT_PTES; i++) {
		614	pteval_t pte_cmp = pte_val(__ptep_get(cont_ptep + i)) & cmp_mask;
		615
		616	if (pte_cmp != entry_cmp)
		617	return false;
		618	}
		619
		620	return true;
		621	}
		622
602	int contpte_ptep_set_access_flags(struct vm_area_struct *vma,	623	int contpte_ptep_set_access_flags(struct vm_area_struct *vma,
603	unsigned long addr, pte_t *ptep,	624	unsigned long addr, pte_t *ptep,
604	pte_t entry, int dirty)	625	pte_t entry, int dirty)
@@ -608,13 +629,37 @@ int contpte_ptep_set_access_flags(struct vm_area_struct *vma, · 3 unmodified lines
608	int i;	629	int i;
609		630
610	/*	631	/*
611	* Gather the access/dirty bits for the contiguous range. If nothing has	632	* Check whether all sub-PTEs in the CONT block already match the
612	* changed, its a noop.	633	* requested access flags/write permission, using raw per-PTE values
		634	* rather than the gathered ptep_get() view.
		635	*
		636	* __ptep_set_access_flags() can update AF, dirty and write
		637	* permission, but only to make the mapping more permissive.
		638	*
		639	* ptep_get() gathers AF/dirty state across the whole CONT block,
		640	* which is correct for a CPU with FEAT_HAFDBS. But page-table
		641	* walkers that evaluate each descriptor individually (e.g. a CPU
		642	* without DBM support, or an SMMU without HTTU, or with HA/HD
		643	* disabled in CD.TCR) can keep faulting on the target sub-PTE if
		644	* only a sibling has been updated. Gathering can therefore cause
		645	* false no-ops when only a sibling has been updated:
		646	* - write faults: target still has PTE_RDONLY (needs PTE_RDONLY cleared)
		647	* - read faults: target still lacks PTE_AF
		648	*
		649	* Per Arm ARM (DDI 0487) D8.7.1, any sub-PTE in a CONT range may
		650	* become the effective cached translation, so all entries must have
		651	* consistent attributes. Check the full CONT block before returning
		652	* no-op, and when any sub-PTE mismatches, proceed to update the whole
		653	* range.
613	*/	654	*/
614	orig_pte = pte_mknoncont(ptep_get(ptep));	655	if (contpte_all_subptes_match_access_flags(ptep, entry))
615	if (pte_val(orig_pte) == pte_val(entry))
616	return 0;	656	return 0;
617		657
		658	/*
		659	* Use raw target pte (not gathered) for write-bit unfold decision.
		660	*/
		661	orig_pte = pte_mknoncont(__ptep_get(ptep));
		662
618	/*	663	/*
619	* We can fix up access/dirty bits without having to unfold the contig	664	* We can fix up access/dirty bits without having to unfold the contig
620	* range. But if the write bit is changing, we must unfold.	665	* range. But if the write bit is changing, we must unfold.

arch/arm64/mm/ioremap.c+3−3

@@ -14,8 +14,8 @@ int arm64_ioremap_prot_hook_register(ioremap_prot_hook_t hook) · 13 unmodified lines
14	return 0;	14	return 0;
15	}	15	}
16		16
17	void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size,	17	void __iomem *__ioremap_prot(phys_addr_t phys_addr, size_t size,
18	pgprot_t pgprot)	18	pgprot_t pgprot)
19	{	19	{
20	unsigned long last_addr = phys_addr + size - 1;	20	unsigned long last_addr = phys_addr + size - 1;
21		21
@@ -39,7 +39,7 @@ void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size, · 17 unmodified lines
39		39
40	return generic_ioremap_prot(phys_addr, size, pgprot);	40	return generic_ioremap_prot(phys_addr, size, pgprot);
41	}	41	}
42	EXPORT_SYMBOL(ioremap_prot);	42	EXPORT_SYMBOL(__ioremap_prot);
43		43
44	/*	44	/*
45	* Must be called after early_fixmap_init	45	* Must be called after early_fixmap_init

arch/arm64/mm/mmap.c+10−2

 	[VM_SHARED | VM_EXEC | VM_WRITE | VM_READ]	= PAGE_SHARED_EXEC
 };
+static ptdesc_t gcs_page_prot __ro_after_init = _PAGE_GCS_RO;
 /*
  * You really shouldn't be using read() or write() on /dev/mem.  This might go
  * away in the future.
 		protection_map[VM_EXEC | VM_SHARED] = PAGE_EXECONLY;
 	}
-	if (lpa2_is_enabled())
+	if (lpa2_is_enabled()) {
 		for (int i = 0; i < ARRAY_SIZE(protection_map); i++)
 			pgprot_val(protection_map[i]) &= ~PTE_SHARED;
+		gcs_page_prot &= ~PTE_SHARED;
+	}
 	return 0;
 }
 	/* Short circuit GCS to avoid bloating the table. */
 	if (system_supports_gcs() && (vm_flags & VM_SHADOW_STACK)) {
-		prot = _PAGE_GCS_RO;
+		/* Honour mprotect(PROT_NONE) on shadow stack mappings */
+		if (vm_flags & VM_ACCESS_FLAGS)
+			prot = gcs_page_prot;
+		else
+			prot = pgprot_val(protection_map[VM_NONE]);
 	} else {
 		prot = pgprot_val(protection_map[vm_flags &
 				   (VM_READ|VM_WRITE|VM_EXEC|VM_SHARED)]);

arch/arm64/net/bpf_jit_comp.c+1−1

@@ -2119,7 +2119,7 @@ struct bpf_prog bpf_int_jit_compile(struct bpf_prog prog) · 2118 unmodified lines
2119	extable_offset = round_up(prog_size + PLT_TARGET_SIZE, extable_align);	2119	extable_offset = round_up(prog_size + PLT_TARGET_SIZE, extable_align);
2120	image_size = extable_offset + extable_size;	2120	image_size = extable_offset + extable_size;
2121	ro_header = bpf_jit_binary_pack_alloc(image_size, &ro_image_ptr,	2121	ro_header = bpf_jit_binary_pack_alloc(image_size, &ro_image_ptr,
2122	sizeof(u32), &header, &image_ptr,	2122	sizeof(u64), &header, &image_ptr,
2123	jit_fill_hole);	2123	jit_fill_hole);
2124	if (!ro_header) {	2124	if (!ro_header) {
2125	prog = orig_prog;	2125	prog = orig_prog;

arch/csky/kernel/vmlinux.lds.S+1−0

@@ -109,6 +109,7 @@ SECTIONS · 108 unmodified lines
109		109
110	STABS_DEBUG	110	STABS_DEBUG
111	DWARF_DEBUG	111	DWARF_DEBUG
		112	MODINFO
112	ELF_DETAILS	113	ELF_DETAILS
113		114
114	DISCARDS	115	DISCARDS

arch/hexagon/kernel/vmlinux.lds.S+1−0

@@ -62,6 +62,7 @@ SECTIONS · 61 unmodified lines
62		62
63	STABS_DEBUG	63	STABS_DEBUG
64	DWARF_DEBUG	64	DWARF_DEBUG
		65	MODINFO
65	ELF_DETAILS	66	ELF_DETAILS
66	.hexagon.attributes 0 : { *(.hexagon.attributes) }	67	.hexagon.attributes 0 : { *(.hexagon.attributes) }
67		68

arch/loongarch/kernel/vmlinux.lds.S+1−0

@@ -147,6 +147,7 @@ SECTIONS · 146 unmodified lines
147		147
148	STABS_DEBUG	148	STABS_DEBUG
149	DWARF_DEBUG	149	DWARF_DEBUG
		150	MODINFO
150	ELF_DETAILS	151	ELF_DETAILS
151		152
152	#ifdef CONFIG_EFI_STUB	153	#ifdef CONFIG_EFI_STUB

arch/loongarch/kvm/Kconfig+0−1

@@ -28,7 +28,6 @@ config KVM · 27 unmodified lines
28	select KVM_COMMON	28	select KVM_COMMON
29	select KVM_GENERIC_DIRTYLOG_READ_PROTECT	29	select KVM_GENERIC_DIRTYLOG_READ_PROTECT
30	select KVM_GENERIC_HARDWARE_ENABLING	30	select KVM_GENERIC_HARDWARE_ENABLING
31	select KVM_GENERIC_MMU_NOTIFIER
32	select KVM_MMIO	31	select KVM_MMIO
33	select VIRT_XFER_TO_GUEST_WORK	32	select VIRT_XFER_TO_GUEST_WORK
34	select SCHED_INFO	33	select SCHED_INFO

arch/loongarch/kvm/vcpu.c+1−1

@@ -14,7 +14,7 @@ · 13 unmodified lines
14	#define CREATE_TRACE_POINTS	14	#define CREATE_TRACE_POINTS
15	#include "trace.h"	15	#include "trace.h"
16		16
17	const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {	17	const struct kvm_stats_desc kvm_vcpu_stats_desc[] = {
18	KVM_GENERIC_VCPU_STATS(),	18	KVM_GENERIC_VCPU_STATS(),
19	STATS_DESC_COUNTER(VCPU, int_exits),	19	STATS_DESC_COUNTER(VCPU, int_exits),
20	STATS_DESC_COUNTER(VCPU, idle_exits),	20	STATS_DESC_COUNTER(VCPU, idle_exits),

arch/loongarch/kvm/vm.c+1−2

 #include <asm/kvm_eiointc.h>
 #include <asm/kvm_pch_pic.h>
-const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
+const struct kvm_stats_desc kvm_vm_stats_desc[] = {
 	KVM_GENERIC_VM_STATS(),
 	STATS_DESC_ICOUNTER(VM, pages),
 	STATS_DESC_ICOUNTER(VM, hugepages),
 	case KVM_CAP_ONE_REG:
 	case KVM_CAP_ENABLE_CAP:
 	case KVM_CAP_READONLY_MEM:
-	case KVM_CAP_SYNC_MMU:
 	case KVM_CAP_IMMEDIATE_EXIT:
 	case KVM_CAP_IOEVENTFD:
 	case KVM_CAP_MP_STATE:

arch/m68k/kernel/vmlinux-nommu.lds+1−0

@@ -85,6 +85,7 @@ SECTIONS { · 84 unmodified lines
85	_end = .;	85	_end = .;
86		86
87	STABS_DEBUG	87	STABS_DEBUG
		88	MODINFO
88	ELF_DETAILS	89	ELF_DETAILS
89		90
90	/* Sections to be discarded */	91	/* Sections to be discarded */

arch/m68k/kernel/vmlinux-std.lds+1−0

@@ -58,6 +58,7 @@ SECTIONS · 57 unmodified lines
58	_end = . ;	58	_end = . ;
59		59
60	STABS_DEBUG	60	STABS_DEBUG
		61	MODINFO
61	ELF_DETAILS	62	ELF_DETAILS
62		63
63	/* Sections to be discarded */	64	/* Sections to be discarded */

arch/m68k/kernel/vmlinux-sun3.lds+1−0

@@ -51,6 +51,7 @@ __init_begin = .; · 50 unmodified lines
51	_end = . ;	51	_end = . ;
52		52
53	STABS_DEBUG	53	STABS_DEBUG
		54	MODINFO
54	ELF_DETAILS	55	ELF_DETAILS
55		56
56	/* Sections to be discarded */	57	/* Sections to be discarded */

arch/mips/kernel/vmlinux.lds.S+1−0

@@ -217,6 +217,7 @@ SECTIONS · 216 unmodified lines
217		217
218	STABS_DEBUG	218	STABS_DEBUG
219	DWARF_DEBUG	219	DWARF_DEBUG
		220	MODINFO
220	ELF_DETAILS	221	ELF_DETAILS
221		222
222	/* These must appear regardless of . */	223	/* These must appear regardless of . */

arch/mips/kvm/Kconfig+0−1

@@ -23,7 +23,6 @@ config KVM · 22 unmodified lines
23	select KVM_COMMON	23	select KVM_COMMON
24	select KVM_GENERIC_DIRTYLOG_READ_PROTECT	24	select KVM_GENERIC_DIRTYLOG_READ_PROTECT
25	select KVM_MMIO	25	select KVM_MMIO
26	select KVM_GENERIC_MMU_NOTIFIER
27	select KVM_GENERIC_HARDWARE_ENABLING	26	select KVM_GENERIC_HARDWARE_ENABLING
28	select HAVE_KVM_READONLY_MEM	27	select HAVE_KVM_READONLY_MEM
29	help	28	help

arch/mips/kvm/mips.c+2−3

 #define VECTORSPACING 0x100	/* for EI/VI mode */
 #endif
-const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
+const struct kvm_stats_desc kvm_vm_stats_desc[] = {
 	KVM_GENERIC_VM_STATS()
 };
 		       sizeof(kvm_vm_stats_desc),
 };
-const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
+const struct kvm_stats_desc kvm_vcpu_stats_desc[] = {
 	KVM_GENERIC_VCPU_STATS(),
 	STATS_DESC_COUNTER(VCPU, wait_exits),
 	STATS_DESC_COUNTER(VCPU, cache_exits),
 	case KVM_CAP_ONE_REG:
 	case KVM_CAP_ENABLE_CAP:
 	case KVM_CAP_READONLY_MEM:
-	case KVM_CAP_SYNC_MMU:
 	case KVM_CAP_IMMEDIATE_EXIT:
 		r = 1;
 		break;

arch/nios2/kernel/vmlinux.lds.S+1−0

@@ -57,6 +57,7 @@ SECTIONS · 56 unmodified lines
57		57
58	STABS_DEBUG	58	STABS_DEBUG
59	DWARF_DEBUG	59	DWARF_DEBUG
		60	MODINFO
60	ELF_DETAILS	61	ELF_DETAILS
61		62
62	DISCARDS	63	DISCARDS

arch/openrisc/kernel/vmlinux.lds.S+1−0

@@ -101,6 +101,7 @@ SECTIONS · 100 unmodified lines
101	/* Throw in the debugging sections */	101	/* Throw in the debugging sections */
102	STABS_DEBUG	102	STABS_DEBUG
103	DWARF_DEBUG	103	DWARF_DEBUG
		104	MODINFO
104	ELF_DETAILS	105	ELF_DETAILS
105		106
106	/* Sections to be discarded -- must be last */	107	/* Sections to be discarded -- must be last */

arch/parisc/boot/compressed/vmlinux.lds.S+1−0

@@ -90,6 +90,7 @@ SECTIONS · 89 unmodified lines
90	/* Sections to be discarded */	90	/* Sections to be discarded */
91	DISCARDS	91	DISCARDS
92	/DISCARD/ : {	92	/DISCARD/ : {
		93	*(.modinfo)
93	#ifdef CONFIG_64BIT	94	#ifdef CONFIG_64BIT
94	/* temporary hack until binutils is fixed to not emit these	95	/* temporary hack until binutils is fixed to not emit these
95	* for static binaries	96	* for static binaries

arch/parisc/include/asm/pgtable.h+1−1

@@ -85,7 +85,7 @@ extern void __update_cache(pte_t pte); · 84 unmodified lines
85	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))	85	printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
86		86
87	/* This is the size of the initially mapped kernel memory */	87	/* This is the size of the initially mapped kernel memory */
88	#if defined(CONFIG_64BIT)	88	#if defined(CONFIG_64BIT) \|\| defined(CONFIG_KALLSYMS)
89	#define KERNEL_INITIAL_ORDER 26 /* 1<<26 = 64MB */	89	#define KERNEL_INITIAL_ORDER 26 /* 1<<26 = 64MB */
90	#else	90	#else
91	#define KERNEL_INITIAL_ORDER 25 /* 1<<25 = 32MB */	91	#define KERNEL_INITIAL_ORDER 25 /* 1<<25 = 32MB */

arch/parisc/kernel/head.S+6−1

 	.import __bss_start,data
 	.import __bss_stop,data
+	.import __end,data
 	load32		PA(__bss_start),%r3
 	load32		PA(__bss_stop),%r4
 	 * everything ... it will get remapped correctly later */
 	ldo		0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
 	load32		(1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
-	load32		PA(pg0),%r1
+	load32		PA(_end),%r1
+	SHRREG		%r1,PAGE_SHIFT,%r1  /* %r1 is PFN count for _end symbol */
+	cmpb,<<,n	%r11,%r1,1f
+	copy		%r1,%r11	/* %r1 PFN count smaller than %r11 */
+1:	load32		PA(pg0),%r1
 $pgt_fill_loop:
 	STREGM          %r3,ASM_PTE_ENTRY_SIZE(%r1)

arch/parisc/kernel/setup.c+12−8

 #endif
 	printk(KERN_CONT ".\n");
-	/*
-	 * Check if initial kernel page mappings are sufficient.
-	 * panic early if not, else we may access kernel functions
-	 * and variables which can't be reached.
-	 */
-	if (__pa((unsigned long) &_end) >= KERNEL_INITIAL_SIZE)
-		panic("KERNEL_INITIAL_ORDER too small!");
 #ifdef CONFIG_64BIT
 	if(parisc_narrow_firmware) {
 		printk(KERN_INFO "Kernel is using PDC in 32-bit mode.\n");
 	int ret, cpunum;
 	struct pdc_coproc_cfg coproc_cfg;
+	/*
+	 * Check if initial kernel page mapping is sufficient.
+	 * Print warning if not, because we may access kernel functions and
+	 * variables which can't be reached yet through the initial mappings.
+	 * Note that the panic() and printk() functions are not functional
+	 * yet, so we need to use direct iodc() firmware calls instead.
+	 */
+	const char warn1[] = "CRITICAL: Kernel may crash because "
+			     "KERNEL_INITIAL_ORDER is too small.\n";
+	if (__pa((unsigned long) &_end) >= KERNEL_INITIAL_SIZE)
+		pdc_iodc_print(warn1, sizeof(warn1) - 1);
 	/* check QEMU/SeaBIOS marker in PAGE0 */
 	running_on_qemu = (memcmp(&PAGE0->pad0, "SeaBIOS", 8) == 0);

arch/parisc/kernel/vmlinux.lds.S+1−0

@@ -165,6 +165,7 @@ SECTIONS · 164 unmodified lines
165	_end = . ;	165	_end = . ;
166		166
167	STABS_DEBUG	167	STABS_DEBUG
		168	MODINFO
168	ELF_DETAILS	169	ELF_DETAILS
169	.note 0 : { *(.note) }	170	.note 0 : { *(.note) }
170		171

arch/powerpc/Kconfig+2−2

@@ -573,8 +573,8 @@ config ARCH_USING_PATCHABLE_FUNCTION_ENTRY · 572 unmodified lines
573	depends on FUNCTION_TRACER && (PPC32 \|\| PPC64_ELF_ABI_V2)	573	depends on FUNCTION_TRACER && (PPC32 \|\| PPC64_ELF_ABI_V2)
574	depends on $(cc-option,-fpatchable-function-entry=2)	574	depends on $(cc-option,-fpatchable-function-entry=2)
575	def_bool y if PPC32	575	def_bool y if PPC32
576	def_bool $(success,$(srctree)/arch/powerpc/tools/gcc-check-fpatchable-function-entry.sh $(CC) -mlittle-endian) if PPC64 && CPU_LITTLE_ENDIAN	576	def_bool $(success,$(srctree)/arch/powerpc/tools/check-fpatchable-function-entry.sh $(CC) $(CLANG_FLAGS) -mlittle-endian) if PPC64 && CPU_LITTLE_ENDIAN
577	def_bool $(success,$(srctree)/arch/powerpc/tools/gcc-check-fpatchable-function-entry.sh $(CC) -mbig-endian) if PPC64 && CPU_BIG_ENDIAN	577	def_bool $(success,$(srctree)/arch/powerpc/tools/check-fpatchable-function-entry.sh $(CC) -mbig-endian) if PPC64 && CPU_BIG_ENDIAN
578		578
579	config PPC_FTRACE_OUT_OF_LINE	579	config PPC_FTRACE_OUT_OF_LINE
580	def_bool PPC64 && ARCH_USING_PATCHABLE_FUNCTION_ENTRY	580	def_bool PPC64 && ARCH_USING_PATCHABLE_FUNCTION_ENTRY

arch/powerpc/boot/dts/asp834x-redboot.dts+1−1

@@ -37,7 +37,7 @@ · 36 unmodified lines
37	};	37	};
38	};	38	};
39		39
40	memory {	40	memory@0 {
41	device_type = "memory";	41	device_type = "memory";
42	reg = <0x00000000 0x8000000>; // 128MB at 0	42	reg = <0x00000000 0x8000000>; // 128MB at 0
43	};	43	};

arch/powerpc/boot/dts/fsl/interlaken-lac-portals.dtsi+0−156

@@ -1,156 +0,0 @@
1	/* T4240 Interlaken LAC Portal device tree stub with 24 portals.
2	*
3	* Copyright 2012 Freescale Semiconductor Inc.
4	*
5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions are met:
7	* * Redistributions of source code must retain the above copyright
8	* notice, this list of conditions and the following disclaimer.
9	* * Redistributions in binary form must reproduce the above copyright
10	* notice, this list of conditions and the following disclaimer in the
11	* documentation and/or other materials provided with the distribution.
12	* * Neither the name of Freescale Semiconductor nor the
13	* names of its contributors may be used to endorse or promote products
14	* derived from this software without specific prior written permission.
15	*
16	*
17	* ALTERNATIVELY, this software may be distributed under the terms of the
18	* GNU General Public License ("GPL") as published by the Free Software
19	* Foundation, either version 2 of that License or (at your option) any
20	* later version.
21	*
22	* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
23	* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24	* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25	* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
26	* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
29	* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
31	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32	*/
33
34	#address-cells = <0x1>;
35	#size-cells = <0x1>;
36	compatible = "fsl,interlaken-lac-portals";
37
38	lportal0: lac-portal@0 {
39	compatible = "fsl,interlaken-lac-portal-v1.0";
40	reg = <0x0 0x1000>;
41	};
42
43	lportal1: lac-portal@1000 {
44	compatible = "fsl,interlaken-lac-portal-v1.0";
45	reg = <0x1000 0x1000>;
46	};
47
48	lportal2: lac-portal@2000 {
49	compatible = "fsl,interlaken-lac-portal-v1.0";
50	reg = <0x2000 0x1000>;
51	};
52
53	lportal3: lac-portal@3000 {
54	compatible = "fsl,interlaken-lac-portal-v1.0";
55	reg = <0x3000 0x1000>;
56	};
57
58	lportal4: lac-portal@4000 {
59	compatible = "fsl,interlaken-lac-portal-v1.0";
60	reg = <0x4000 0x1000>;
61	};
62
63	lportal5: lac-portal@5000 {
64	compatible = "fsl,interlaken-lac-portal-v1.0";
65	reg = <0x5000 0x1000>;
66	};
67
68	lportal6: lac-portal@6000 {
69	compatible = "fsl,interlaken-lac-portal-v1.0";
70	reg = <0x6000 0x1000>;
71	};
72
73	lportal7: lac-portal@7000 {
74	compatible = "fsl,interlaken-lac-portal-v1.0";
75	reg = <0x7000 0x1000>;
76	};
77
78	lportal8: lac-portal@8000 {
79	compatible = "fsl,interlaken-lac-portal-v1.0";
80	reg = <0x8000 0x1000>;
81	};
82
83	lportal9: lac-portal@9000 {
84	compatible = "fsl,interlaken-lac-portal-v1.0";
85	reg = <0x9000 0x1000>;
86	};
87
88	lportal10: lac-portal@A000 {
89	compatible = "fsl,interlaken-lac-portal-v1.0";
90	reg = <0xA000 0x1000>;
91	};
92
93	lportal11: lac-portal@B000 {
94	compatible = "fsl,interlaken-lac-portal-v1.0";
95	reg = <0xB000 0x1000>;
96	};
97
98	lportal12: lac-portal@C000 {
99	compatible = "fsl,interlaken-lac-portal-v1.0";
100	reg = <0xC000 0x1000>;
101	};
102
103	lportal13: lac-portal@D000 {
104	compatible = "fsl,interlaken-lac-portal-v1.0";
105	reg = <0xD000 0x1000>;
106	};
107
108	lportal14: lac-portal@E000 {
109	compatible = "fsl,interlaken-lac-portal-v1.0";
110	reg = <0xE000 0x1000>;
111	};
112
113	lportal15: lac-portal@F000 {
114	compatible = "fsl,interlaken-lac-portal-v1.0";
115	reg = <0xF000 0x1000>;
116	};
117
118	lportal16: lac-portal@10000 {
119	compatible = "fsl,interlaken-lac-portal-v1.0";
120	reg = <0x10000 0x1000>;
121	};
122
123	lportal17: lac-portal@11000 {
124	compatible = "fsl,interlaken-lac-portal-v1.0";
125	reg = <0x11000 0x1000>;
126	};
127
128	lportal18: lac-portal@1200 {
129	compatible = "fsl,interlaken-lac-portal-v1.0";
130	reg = <0x12000 0x1000>;
131	};
132
133	lportal19: lac-portal@13000 {
134	compatible = "fsl,interlaken-lac-portal-v1.0";
135	reg = <0x13000 0x1000>;
136	};
137
138	lportal20: lac-portal@14000 {
139	compatible = "fsl,interlaken-lac-portal-v1.0";
140	reg = <0x14000 0x1000>;
141	};
142
143	lportal21: lac-portal@15000 {
144	compatible = "fsl,interlaken-lac-portal-v1.0";
145	reg = <0x15000 0x1000>;
146	};
147
148	lportal22: lac-portal@16000 {
149	compatible = "fsl,interlaken-lac-portal-v1.0";
150	reg = <0x16000 0x1000>;
151	};
152
153	lportal23: lac-portal@17000 {
154	compatible = "fsl,interlaken-lac-portal-v1.0";
155	reg = <0x17000 0x1000>;
156	};

arch/powerpc/boot/dts/fsl/interlaken-lac.dtsi+0−45

@@ -1,45 +0,0 @@
1	/*
2	* T4 Interlaken Look-aside Controller (LAC) device tree stub
3	*
4	* Copyright 2012 Freescale Semiconductor Inc.
5	*
6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions are met:
8	* * Redistributions of source code must retain the above copyright
9	* notice, this list of conditions and the following disclaimer.
10	* * Redistributions in binary form must reproduce the above copyright
11	* notice, this list of conditions and the following disclaimer in the
12	* documentation and/or other materials provided with the distribution.
13	* * Neither the name of Freescale Semiconductor nor the
14	* names of its contributors may be used to endorse or promote products
15	* derived from this software without specific prior written permission.
16	*
17	*
18	* ALTERNATIVELY, this software may be distributed under the terms of the
19	* GNU General Public License ("GPL") as published by the Free Software
20	* Foundation, either version 2 of that License or (at your option) any
21	* later version.
22	*
23	* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24	* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25	* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26	* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27	* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30	* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33	*/
34
35	lac: lac@229000 {
36	compatible = "fsl,interlaken-lac";
37	reg = <0x229000 0x1000>;
38	interrupts = <16 2 1 18>;
39	};
40
41	lac-hv@228000 {
42	compatible = "fsl,interlaken-lac-hv";
43	reg = <0x228000 0x1000>;
44	fsl,non-hv-node = <&lac>;
45	};

arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi+0−43

@@ -1,43 +0,0 @@
1	/*
2	* PQ3 MPIC Message (Group B) device tree stub [ controller @ offset 0x42400 ]
3	*
4	* Copyright 2012 Freescale Semiconductor Inc.
5	*
6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions are met:
8	* * Redistributions of source code must retain the above copyright
9	* notice, this list of conditions and the following disclaimer.
10	* * Redistributions in binary form must reproduce the above copyright
11	* notice, this list of conditions and the following disclaimer in the
12	* documentation and/or other materials provided with the distribution.
13	* * Neither the name of Freescale Semiconductor nor the
14	* names of its contributors may be used to endorse or promote products
15	* derived from this software without specific prior written permission.
16	*
17	*
18	* ALTERNATIVELY, this software may be distributed under the terms of the
19	* GNU General Public License ("GPL") as published by the Free Software
20	* Foundation, either version 2 of that License or (at your option) any
21	* later version.
22	*
23	* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24	* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25	* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26	* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27	* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30	* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33	*/
34
35	message@42400 {
36	compatible = "fsl,mpic-v3.1-msgr";
37	reg = <0x42400 0x200>;
38	interrupts = <
39	0xb4 2 0 0
40	0xb5 2 0 0
41	0xb6 2 0 0
42	0xb7 2 0 0>;
43	};

arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi+0−80

@@ -1,80 +0,0 @@
1	/*
2	* QorIQ FMan v3 1g port #1 device tree stub [ controller @ offset 0x400000 ]
3	*
4	* Copyright 2012 - 2015 Freescale Semiconductor Inc.
5	*
6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions are met:
8	* * Redistributions of source code must retain the above copyright
9	* notice, this list of conditions and the following disclaimer.
10	* * Redistributions in binary form must reproduce the above copyright
11	* notice, this list of conditions and the following disclaimer in the
12	* documentation and/or other materials provided with the distribution.
13	* * Neither the name of Freescale Semiconductor nor the
14	* names of its contributors may be used to endorse or promote products
15	* derived from this software without specific prior written permission.
16	*
17	*
18	* ALTERNATIVELY, this software may be distributed under the terms of the
19	* GNU General Public License ("GPL") as published by the Free Software
20	* Foundation, either version 2 of that License or (at your option) any
21	* later version.
22	*
23	* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24	* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25	* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26	* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27	* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28	* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29	* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30	* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32	* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33	*/
34
35	fman@400000 {
36	fman0_rx_0x09: port@89000 {
37	cell-index = <0x9>;
38	compatible = "fsl,fman-v3-port-rx";
39	reg = <0x89000 0x1000>;
40	fsl,fman-10g-port;
41	fsl,fman-best-effort-port;
42	};
43
44	fman0_tx_0x29: port@a9000 {
45	cell-index = <0x29>;
46	compatible = "fsl,fman-v3-port-tx";
47	reg = <0xa9000 0x1000>;
48	fsl,fman-10g-port;
49	fsl,fman-best-effort-port;
50	};
51
52	ethernet@e2000 {
53	cell-index = <1>;
54	compatible = "fsl,fman-memac";
55	reg = <0xe2000 0x1000>;
56	fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
57	ptp-timer = <&ptp_timer0>;
58	pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
59	pcs-handle-names = "sgmii", "qsgmii";
60	};
61
62	mdio@e1000 {
63	qsgmiia_pcs1: ethernet-pcs@1 {
64	compatible = "fsl,lynx-pcs";
65	reg = <1>;
66	};
67	};
68
69	mdio@e3000 {
70	#address-cells = <1>;
71	#size-cells = <0>;
72	compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
73	reg = <0xe3000 0x1000>;
74	fsl,erratum-a011043; /* must ignore read errors */
75
76	pcsphy1: ethernet-phy@0 {
77	reg = <0x0>;
78	};
79	};
80	};

arch/powerpc/boot/dts/mpc8308_p1m.dts+1−1

@@ -37,7 +37,7 @@ · 36 unmodified lines
37	};	37	};
38	};	38	};
39		39
40	memory {	40	memory@0 {
41	device_type = "memory";	41	device_type = "memory";
42	reg = <0x00000000 0x08000000>; // 128MB at 0	42	reg = <0x00000000 0x08000000>; // 128MB at 0
43	};	43	};

arch/powerpc/boot/dts/mpc8308rdb.dts+1−1

@@ -38,7 +38,7 @@ · 37 unmodified lines
38	};	38	};
39	};	39	};
40		40
41	memory {	41	memory@0 {
42	device_type = "memory";	42	device_type = "memory";
43	reg = <0x00000000 0x08000000>; // 128MB at 0	43	reg = <0x00000000 0x08000000>; // 128MB at 0
44	};	44	};

arch/powerpc/boot/dts/mpc8313erdb.dts+35−26

  */
 /dts-v1/;
+#include <dt-bindings/interrupt-controller/irq.h>
 / {
 	model = "MPC8313ERDB";
 		};
 	};
-	memory {
+	memory@0 {
 		device_type = "memory";
 		reg = <0x00000000 0x08000000>;	// 128MB at 0
 	};
 		#size-cells = <1>;
 		compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
 		reg = <0xe0005000 0x1000>;
-		interrupts = <77 0x8>;
+		interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
 		interrupt-parent = <&ipic>;
 		// CS0 and CS1 are swapped when
 				cell-index = <0>;
 				compatible = "fsl-i2c";
 				reg = <0x3000 0x100>;
-				interrupts = <14 0x8>;
+				interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
 				interrupt-parent = <&ipic>;
 				dfsrr;
 				rtc@68 {
 				compatible = "fsl,sec2.2", "fsl,sec2.1",
 				             "fsl,sec2.0";
 				reg = <0x30000 0x10000>;
-				interrupts = <11 0x8>;
+				interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 				interrupt-parent = <&ipic>;
 				fsl,num-channels = <1>;
 				fsl,channel-fifo-len = <24>;
 			cell-index = <1>;
 			compatible = "fsl-i2c";
 			reg = <0x3100 0x100>;
-			interrupts = <15 0x8>;
+			interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			dfsrr;
 		};
 			cell-index = <0>;
 			compatible = "fsl,spi";
 			reg = <0x7000 0x1000>;
-			interrupts = <16 0x8>;
+			interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			mode = "cpu";
 		};
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupt-parent = <&ipic>;
-			interrupts = <38 0x8>;
+			interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
 			phy_type = "utmi_wide";
 			sleep = <&pmc 0x00300000>;
 		};
 		ptp_clock@24E00 {
 			compatible = "fsl,etsec-ptp";
 			reg = <0x24E00 0xB0>;
-			interrupts = <12 0x8 13 0x8>;
+			interrupts = <12 IRQ_TYPE_LEVEL_LOW>,
+				     <13 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = < &ipic >;
 			fsl,tclk-period = <10>;
 			fsl,tmr-prsc    = <100>;
 			compatible = "gianfar";
 			reg = <0x24000 0x1000>;
 			local-mac-address = [ 00 00 00 00 00 00 ];
-			interrupts = <37 0x8 36 0x8 35 0x8>;
+			interrupts = <37 IRQ_TYPE_LEVEL_LOW>,
+				     <36 IRQ_TYPE_LEVEL_LOW>,
+				     <35 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			tbi-handle = < &tbi0 >;
 			/* Vitesse 7385 isn't on the MDIO bus */
 				reg = <0x520 0x20>;
 				phy4: ethernet-phy@4 {
 					interrupt-parent = <&ipic>;
-					interrupts = <20 0x8>;
+					interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
 					reg = <0x4>;
 				};
 				tbi0: tbi-phy@11 {
 			reg = <0x25000 0x1000>;
 			ranges = <0x0 0x25000 0x1000>;
 			local-mac-address = [ 00 00 00 00 00 00 ];
-			interrupts = <34 0x8 33 0x8 32 0x8>;
+			interrupts = <34 IRQ_TYPE_LEVEL_LOW>,
+				     <33 IRQ_TYPE_LEVEL_LOW>,
+				     <32 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			tbi-handle = < &tbi1 >;
 			phy-handle = < &phy4 >;
 			compatible = "fsl,ns16550", "ns16550";
 			reg = <0x4500 0x100>;
 			clock-frequency = <0>;
-			interrupts = <9 0x8>;
+			interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 		};
 			compatible = "fsl,ns16550", "ns16550";
 			reg = <0x4600 0x100>;
 			clock-frequency = <0>;
-			interrupts = <10 0x8>;
+			interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 		};
 		/* IPIC
-		 * interrupts cell = <intr #, sense>
+		 * interrupts cell = <intr #, type>
-		 * sense values match linux IORESOURCE_IRQ_* defines:
-		 * sense == 8: Level, low assertion
-		 * sense == 2: Edge, high-to-low change
 		 */
 		ipic: pic@700 {
 			interrupt-controller;
 		pmc: power@b00 {
 			compatible = "fsl,mpc8313-pmc", "fsl,mpc8349-pmc";
 			reg = <0xb00 0x100 0xa00 0x100>;
-			interrupts = <80 8>;
+			interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			fsl,mpc8313-wakeup-timer = <&gtm1>;
 		gtm1: timer@500 {
 			compatible = "fsl,mpc8313-gtm", "fsl,gtm";
 			reg = <0x500 0x100>;
-			interrupts = <90 8 78 8 84 8 72 8>;
+			interrupts = <90 IRQ_TYPE_LEVEL_LOW>,
+				     <78 IRQ_TYPE_LEVEL_LOW>,
+				     <84 IRQ_TYPE_LEVEL_LOW>,
+				     <72 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 		};
 		timer@600 {
 			compatible = "fsl,mpc8313-gtm", "fsl,gtm";
 			reg = <0x600 0x100>;
-			interrupts = <91 8 79 8 85 8 73 8>;
+			interrupts = <91 IRQ_TYPE_LEVEL_LOW>,
+				     <79 IRQ_TYPE_LEVEL_LOW>,
+				     <85 IRQ_TYPE_LEVEL_LOW>,
+				     <73 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 		};
 	};
 					 0x7800 0x0 0x0 0x3 &ipic 17 0x8
 					 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
 			interrupt-parent = <&ipic>;
-			interrupts = <66 0x8>;
+			interrupts = <66 IRQ_TYPE_LEVEL_LOW>;
 			bus-range = <0x0 0x0>;
 			ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 				  0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 			reg = <0xe00082a8 4>;
 			ranges = <0 0xe0008100 0x1a8>;
 			interrupt-parent = <&ipic>;
-			interrupts = <71 8>;
+			interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 			dma-channel@0 {
 				compatible = "fsl,mpc8313-dma-channel",
 				             "fsl,elo-dma-channel";
 				reg = <0 0x28>;
 				interrupt-parent = <&ipic>;
-				interrupts = <71 8>;
+				interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 				cell-index = <0>;
 			};
 				             "fsl,elo-dma-channel";
 				reg = <0x80 0x28>;
 				interrupt-parent = <&ipic>;
-				interrupts = <71 8>;
+				interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 				cell-index = <1>;
 			};
 				             "fsl,elo-dma-channel";
 				reg = <0x100 0x28>;
 				interrupt-parent = <&ipic>;
-				interrupts = <71 8>;
+				interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 				cell-index = <2>;
 			};
 				             "fsl,elo-dma-channel";
 				reg = <0x180 0x28>;
 				interrupt-parent = <&ipic>;
-				interrupts = <71 8>;
+				interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 				cell-index = <3>;
 			};
 		};

arch/powerpc/boot/dts/mpc8315erdb.dts+64−55

 		};
 	};
-	memory {
+	memory@0 {
 		device_type = "memory";
 		reg = <0x00000000 0x08000000>;	// 128MB at 0
 	};
 		#size-cells = <1>;
 		compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
 		reg = <0xe0005000 0x1000>;
-		interrupts = <77 0x8>;
+		interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
 		interrupt-parent = <&ipic>;
 		// CS0 and CS1 are swapped when
 			cell-index = <0>;
 			compatible = "fsl-i2c";
 			reg = <0x3000 0x100>;
-			interrupts = <14 0x8>;
+			interrupts = <14 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			dfsrr;
 			rtc@68 {
 			cell-index = <0>;
 			compatible = "fsl,spi";
 			reg = <0x7000 0x1000>;
-			interrupts = <16 0x8>;
+			interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			mode = "cpu";
 		};
 			reg = <0x82a8 4>;
 			ranges = <0 0x8100 0x1a8>;
 			interrupt-parent = <&ipic>;
-			interrupts = <71 8>;
+			interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 			cell-index = <0>;
 			dma-channel@0 {
 				compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
 				reg = <0 0x80>;
 				cell-index = <0>;
 				interrupt-parent = <&ipic>;
-				interrupts = <71 8>;
+				interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 			};
 			dma-channel@80 {
 				compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
 				reg = <0x80 0x80>;
 				cell-index = <1>;
 				interrupt-parent = <&ipic>;
-				interrupts = <71 8>;
+				interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 			};
 			dma-channel@100 {
 				compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
 				reg = <0x100 0x80>;
 				cell-index = <2>;
 				interrupt-parent = <&ipic>;
-				interrupts = <71 8>;
+				interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 			};
 			dma-channel@180 {
 				compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
 				reg = <0x180 0x28>;
 				cell-index = <3>;
 				interrupt-parent = <&ipic>;
-				interrupts = <71 8>;
+				interrupts = <71 IRQ_TYPE_LEVEL_LOW>;
 			};
 		};
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupt-parent = <&ipic>;
-			interrupts = <38 0x8>;
+			interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
 			phy_type = "utmi";
 		};
 			reg = <0x24000 0x1000>;
 			ranges = <0x0 0x24000 0x1000>;
 			local-mac-address = [ 00 00 00 00 00 00 ];
-			interrupts = <32 0x8 33 0x8 34 0x8>;
+			interrupts = <32 IRQ_TYPE_LEVEL_LOW>,
+				     <33 IRQ_TYPE_LEVEL_LOW>,
+				     <34 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			tbi-handle = <&tbi0>;
 			phy-handle = < &phy0 >;
 			reg = <0x25000 0x1000>;
 			ranges = <0x0 0x25000 0x1000>;
 			local-mac-address = [ 00 00 00 00 00 00 ];
-			interrupts = <35 0x8 36 0x8 37 0x8>;
+			interrupts = <35 IRQ_TYPE_LEVEL_LOW>,
+				     <36 IRQ_TYPE_LEVEL_LOW>,
+				     <37 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			tbi-handle = <&tbi1>;
 			phy-handle = < &phy1 >;
 			compatible = "fsl,ns16550", "ns16550";
 			reg = <0x4500 0x100>;
 			clock-frequency = <133333333>;
-			interrupts = <9 0x8>;
+			interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 		};
 			compatible = "fsl,ns16550", "ns16550";
 			reg = <0x4600 0x100>;
 			clock-frequency = <133333333>;
-			interrupts = <10 0x8>;
+			interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 		};
 				     "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
 				     "fsl,sec2.0";
 			reg = <0x30000 0x10000>;
-			interrupts = <11 0x8>;
+			interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			fsl,num-channels = <4>;
 			fsl,channel-fifo-len = <24>;
 			compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
 			reg = <0x18000 0x1000>;
 			cell-index = <1>;
-			interrupts = <44 0x8>;
+			interrupts = <44 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 		};
 			compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
 			reg = <0x19000 0x1000>;
 			cell-index = <2>;
-			interrupts = <45 0x8>;
+			interrupts = <45 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 		};
 		gtm1: timer@500 {
 			compatible = "fsl,mpc8315-gtm", "fsl,gtm";
 			reg = <0x500 0x100>;
-			interrupts = <90 8 78 8 84 8 72 8>;
+			interrupts = <90 IRQ_TYPE_LEVEL_LOW>,
+				     <78 IRQ_TYPE_LEVEL_LOW>,
+				     <84 IRQ_TYPE_LEVEL_LOW>,
+				     <72 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			clock-frequency = <133333333>;
 		};
 		timer@600 {
 			compatible = "fsl,mpc8315-gtm", "fsl,gtm";
 			reg = <0x600 0x100>;
-			interrupts = <91 8 79 8 85 8 73 8>;
+			interrupts = <91 IRQ_TYPE_LEVEL_LOW>,
+				     <79 IRQ_TYPE_LEVEL_LOW>,
+				     <85 IRQ_TYPE_LEVEL_LOW>,
+				     <73 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			clock-frequency = <133333333>;
 		};
 		/* IPIC
-		 * interrupts cell = <intr #, sense>
+		 * interrupts cell = <intr #, type>
-		 * sense values match linux IORESOURCE_IRQ_* defines:
-		 * sense == 8: Level, low assertion
-		 * sense == 2: Edge, high-to-low change
 		 */
 		ipic: interrupt-controller@700 {
 			interrupt-controller;
 			compatible = "fsl,ipic-msi";
 			reg = <0x7c0 0x40>;
 			msi-available-ranges = <0 0x100>;
-			interrupts = <0x43 0x8
+			interrupts = <0x43 IRQ_TYPE_LEVEL_LOW
-				      0x4  0x8
+				      0x4  IRQ_TYPE_LEVEL_LOW
-				      0x51 0x8
+				      0x51 IRQ_TYPE_LEVEL_LOW
-				      0x52 0x8
+				      0x52 IRQ_TYPE_LEVEL_LOW
-				      0x56 0x8
+				      0x56 IRQ_TYPE_LEVEL_LOW
-				      0x57 0x8
+				      0x57 IRQ_TYPE_LEVEL_LOW
-				      0x58 0x8
+				      0x58 IRQ_TYPE_LEVEL_LOW
-				      0x59 0x8>;
+				      0x59 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = < &ipic >;
 		};
 			compatible = "fsl,mpc8315-pmc", "fsl,mpc8313-pmc",
 				     "fsl,mpc8349-pmc";
 			reg = <0xb00 0x100 0xa00 0x100>;
-			interrupts = <80 8>;
+			interrupts = <80 IRQ_TYPE_LEVEL_LOW>;
 			interrupt-parent = <&ipic>;
 			fsl,mpc8313-wakeup-timer = <&gtm1>;
 		};
 		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 		interrupt-map = <
 				/* IDSEL 0x0E -mini PCI */
-				 0x7000 0x0 0x0 0x1 &ipic 18 0x8
+				 0x7000 0x0 0x0 0x1 &ipic 18 IRQ_TYPE_LEVEL_LOW
-				 0x7000 0x0 0x0 0x2 &ipic 18 0x8
+				 0x7000 0x0 0x0 0x2 &ipic 18 IRQ_TYPE_LEVEL_LOW
-				 0x7000 0x0 0x0 0x3 &ipic 18 0x8
+				 0x7000 0x0 0x0 0x3 &ipic 18 IRQ_TYPE_LEVEL_LOW
-				 0x7000 0x0 0x0 0x4 &ipic 18 0x8
+				 0x7000 0x0 0x0 0x4 &ipic 18 IRQ_TYPE_LEVEL_LOW
 				/* IDSEL 0x0F -mini PCI */
-				 0x7800 0x0 0x0 0x1 &ipic 17 0x8
+				 0x7800 0x0 0x0 0x1 &ipic 17 IRQ_TYPE_LEVEL_LOW
-				 0x7800 0x0 0x0 0x2 &ipic 17 0x8
+				 0x7800 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW
-				 0x7800 0x0 0x0 0x3 &ipic 17 0x8
+				 0x7800 0x0 0x0 0x3 &ipic 17 IRQ_TYPE_LEVEL_LOW
-				 0x7800 0x0 0x0 0x4 &ipic 17 0x8
+				 0x7800 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW
 				/* IDSEL 0x10 - PCI slot */
-				 0x8000 0x0 0x0 0x1 &ipic 48 0x8
+				 0x8000 0x0 0x0 0x1 &ipic 48 IRQ_TYPE_LEVEL_LOW
-				 0x8000 0x0 0x0 0x2 &ipic 17 0x8
+				 0x8000 0x0 0x0 0x2 &ipic 17 IRQ_TYPE_LEVEL_LOW
-				 0x8000 0x0 0x0 0x3 &ipic 48 0x8
+				 0x8000 0x0 0x0 0x3 &ipic 48 IRQ_TYPE_LEVEL_LOW
-				 0x8000 0x0 0x0 0x4 &ipic 17 0x8>;
+				 0x8000 0x0 0x0 0x4 &ipic 17 IRQ_TYPE_LEVEL_LOW>;
 		interrupt-parent = <&ipic>;
-		interrupts = <66 0x8>;
+		interrupts = <66 IRQ_TYPE_LEVEL_LOW>;
 		bus-range = <0x0 0x0>;
 		ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
 			  0x42000000 0 0x80000000 0x80000000 0 0x10000000
 		          0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
 		bus-range = <0 255>;
 		interrupt-map-mask = <0xf800 0 0 7>;
-		interrupt-map = <0 0 0 1 &ipic 1 8
+		interrupt-map = <0 0 0 1 &ipic 1 IRQ_TYPE_LEVEL_LOW
-				 0 0 0 2 &ipic 1 8
+				 0 0 0 2 &ipic 1 IRQ_TYPE_LEVEL_LOW
-				 0 0 0 3 &ipic 1 8
+				 0 0 0 3 &ipic 1 IRQ_TYPE_LEVEL_LOW
-				 0 0 0 4 &ipic 1 8>;
+				 0 0 0 4 &ipic 1 IRQ_TYPE_LEVEL_LOW>;
 		clock-frequency = <0>;
 		pcie@0 {
 			  0x01000000 0 0x00000000 0xd1000000 0 0x00800000>;
 		bus-range = <0 255>;
 		interrupt-map-mask = <0xf800 0 0 7>;
-		interrupt-map = <0 0 0 1 &ipic 2 8
+		interrupt-map = <0 0 0 1 &ipic 2 IRQ_TYPE_LEVEL_LOW
-				 0 0 0 2 &ipic 2 8
+				 0 0 0 2 &ipic 2 IRQ_TYPE_LEVEL_LOW
-				 0 0 0 3 &ipic 2 8
+				 0 0 0 3 &ipic 2 IRQ_TYPE_LEVEL_LOW
-				 0 0 0 4 &ipic 2 8>;
+				 0 0 0 4 &ipic 2 IRQ_TYPE_LEVEL_LOW>;
 		clock-frequency = <0>;
 		pcie@0 {
 	leds {
 		compatible = "gpio-leds";
-		pwr {
+		led-pwr {
 			gpios = <&mcu_pio 0 0>;
 			default-state = "on";
 		};
-		hdd {
+		led-hdd {
 			gpios = <&mcu_pio 1 0>;
 			linux,default-trigger = "disk-activity";
 		};

arch/powerpc/boot/dts/mpc832x_rdb.dts+1−1

@@ -38,7 +38,7 @@ · 37 unmodified lines
38	};	38	};
39	};	39	};
40		40
41	memory {	41	memory@0 {
42	device_type = "memory";	42	device_type = "memory";
43	reg = <0x00000000 0x04000000>;	43	reg = <0x00000000 0x04000000>;
44	};	44	};

arch/powerpc/boot/dts/mpc8349emitx.dts+1−1

@@ -39,7 +39,7 @@ · 38 unmodified lines
39	};	39	};
40	};	40	};
41		41
42	memory {	42	memory@0 {
43	device_type = "memory";	43	device_type = "memory";
44	reg = <0x00000000 0x10000000>;	44	reg = <0x00000000 0x10000000>;
45	};	45	};

arch/powerpc/boot/dts/mpc8349emitxgp.dts+1−1

@@ -37,7 +37,7 @@ · 36 unmodified lines
37	};	37	};
38	};	38	};
39		39
40	memory {	40	memory@0 {
41	device_type = "memory";	41	device_type = "memory";
42	reg = <0x00000000 0x10000000>;	42	reg = <0x00000000 0x10000000>;
43	};	43	};

arch/powerpc/boot/dts/mpc8377_rdb.dts+1−1

@@ -39,7 +39,7 @@ · 38 unmodified lines
39	};	39	};
40	};	40	};
41		41
42	memory {	42	memory@0 {
43	device_type = "memory";	43	device_type = "memory";
44	reg = <0x00000000 0x10000000>; // 256MB at 0	44	reg = <0x00000000 0x10000000>; // 256MB at 0
45	};	45	};

arch/powerpc/boot/dts/mpc8377_wlan.dts+1−1

@@ -40,7 +40,7 @@ · 39 unmodified lines
40	};	40	};
41	};	41	};
42		42
43	memory {	43	memory@0 {
44	device_type = "memory";	44	device_type = "memory";
45	reg = <0x00000000 0x20000000>; // 512MB at 0	45	reg = <0x00000000 0x20000000>; // 512MB at 0
46	};	46	};

arch/powerpc/boot/dts/mpc8378_rdb.dts+1−1

@@ -39,7 +39,7 @@ · 38 unmodified lines
39	};	39	};
40	};	40	};
41		41
42	memory {	42	memory@0 {
43	device_type = "memory";	43	device_type = "memory";
44	reg = <0x00000000 0x10000000>; // 256MB at 0	44	reg = <0x00000000 0x10000000>; // 256MB at 0
45	};	45	};

arch/powerpc/boot/dts/mpc8379_rdb.dts+1−1

@@ -37,7 +37,7 @@ · 36 unmodified lines
37	};	37	};
38	};	38	};
39		39
40	memory {	40	memory@0 {
41	device_type = "memory";	41	device_type = "memory";
42	reg = <0x00000000 0x10000000>; // 256MB at 0	42	reg = <0x00000000 0x10000000>; // 256MB at 0
43	};	43	};

arch/powerpc/include/asm/nohash/32/pgtable.h+1−3

 #if defined(CONFIG_44x)
 #include <asm/nohash/32/pte-44x.h>
-#elif defined(CONFIG_PPC_85xx) && defined(CONFIG_PTE_64BIT)
-#include <asm/nohash/pte-e500.h>
 #elif defined(CONFIG_PPC_85xx)
-#include <asm/nohash/32/pte-85xx.h>
+#include <asm/nohash/pte-e500.h>
 #elif defined(CONFIG_PPC_8xx)
 #include <asm/nohash/32/pte-8xx.h>
 #endif

arch/powerpc/include/asm/nohash/32/pte-85xx.h+0−59

@@ -1,59 +0,0 @@
1	/* SPDX-License-Identifier: GPL-2.0 */
2	#ifndef _ASM_POWERPC_NOHASH_32_PTE_85xx_H
3	#define _ASM_POWERPC_NOHASH_32_PTE_85xx_H
4	#ifdef __KERNEL__
5
6	/* PTE bit definitions for Freescale BookE SW loaded TLB MMU based
7	* processors
8	*
9	MMU Assist Register 3:
10
11	32 33 34 35 36 ... 50 51 52 53 54 55 56 57 58 59 60 61 62 63
12	RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR
13
14	- PRESENT must be in the bottom two bits because swap PTEs use
15	the top 30 bits.
16
17	*/
18
19	/* Definitions for FSL Book-E Cores */
20	#define _PAGE_READ 0x00001 /* H: Read permission (SR) */
21	#define _PAGE_PRESENT 0x00002 /* S: PTE contains a translation */
22	#define _PAGE_WRITE 0x00004 /* S: Write permission (SW) */
23	#define _PAGE_DIRTY 0x00008 /* S: Page dirty */
24	#define _PAGE_EXEC 0x00010 /* H: SX permission */
25	#define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
26
27	#define _PAGE_ENDIAN 0x00040 /* H: E bit */
28	#define _PAGE_GUARDED 0x00080 /* H: G bit */
29	#define _PAGE_COHERENT 0x00100 /* H: M bit */
30	#define _PAGE_NO_CACHE 0x00200 /* H: I bit */
31	#define _PAGE_WRITETHRU 0x00400 /* H: W bit */
32	#define _PAGE_SPECIAL 0x00800 /* S: Special page */
33
34	#define _PMD_PRESENT 0
35	#define _PMD_PRESENT_MASK (PAGE_MASK)
36	#define _PMD_BAD (~PAGE_MASK)
37	#define _PMD_USER 0
38
39	#define _PTE_NONE_MASK 0
40
41	#define PTE_WIMGE_SHIFT (6)
42
43	/*
44	* We define 2 sets of base prot bits, one for basic pages (ie,
45	* cacheable kernel and user pages) and one for non cacheable
46	* pages. We always set _PAGE_COHERENT when SMP is enabled or
47	* the processor might need it for DMA coherency.
48	*/
49	#define _PAGE_BASE_NC (_PAGE_PRESENT \| _PAGE_ACCESSED)
50	#if defined(CONFIG_SMP) \|\| defined(CONFIG_PPC_E500MC)
51	#define _PAGE_BASE (_PAGE_BASE_NC \| _PAGE_COHERENT)
52	#else
53	#define _PAGE_BASE (_PAGE_BASE_NC)
54	#endif
55
56	#include <asm/pgtable-masks.h>
57
58	#endif /* __KERNEL__ */
59	#endif /* _ASM_POWERPC_NOHASH_32_PTE_FSL_85xx_H */

arch/powerpc/include/asm/pgtable-types.h+1−1

@@ -49,7 +49,7 @@ static inline unsigned long pud_val(pud_t x) · 48 unmodified lines
49	#endif /* CONFIG_PPC64 */	49	#endif /* CONFIG_PPC64 */
50		50
51	/* PGD level */	51	/* PGD level */
52	#if defined(CONFIG_PPC_85xx) && defined(CONFIG_PTE_64BIT)	52	#if defined(CONFIG_PPC_85xx)
53	typedef struct { unsigned long long pgd; } pgd_t;	53	typedef struct { unsigned long long pgd; } pgd_t;
54		54
55	static inline unsigned long long pgd_val(pgd_t x)	55	static inline unsigned long long pgd_val(pgd_t x)

arch/powerpc/include/asm/uaccess.h+46−21

@@ -15,6 +15,9 @@ · 14 unmodified lines
15	#define TASK_SIZE_MAX TASK_SIZE_USER64	15	#define TASK_SIZE_MAX TASK_SIZE_USER64
16	#endif	16	#endif
17		17
		18	/* Threshold above which VMX copy path is used */
		19	#define VMX_COPY_THRESHOLD 3328
		20
18	#include <asm-generic/access_ok.h>	21	#include <asm-generic/access_ok.h>
19		22
20	/*	23	/*
@@ -255,7 +258,7 @@ __gus_failed: \ · 234 unmodified lines
255	".section .fixup,\"ax\"\n" \	258	".section .fixup,\"ax\"\n" \
256	"4: li %0,%3\n" \	259	"4: li %0,%3\n" \
257	" li %1,0\n" \	260	" li %1,0\n" \
258	" li %1+1,0\n" \	261	" li %L1,0\n" \
259	" b 3b\n" \	262	" b 3b\n" \
260	".previous\n" \	263	".previous\n" \
261	EX_TABLE(1b, 4b) \	264	EX_TABLE(1b, 4b) \
@@ -326,40 +329,62 @@ do { \ · 64 unmodified lines
326	extern unsigned long __copy_tofrom_user(void __user *to,	329	extern unsigned long __copy_tofrom_user(void __user *to,
327	const void __user *from, unsigned long size);	330	const void __user *from, unsigned long size);
328		331
329	#ifdef __powerpc64__	332	unsigned long __copy_tofrom_user_base(void __user *to,
330	static inline unsigned long	333	const void __user *from, unsigned long size);
331	raw_copy_in_user(void __user to, const void __user from, unsigned long n)	334
		335	unsigned long __copy_tofrom_user_power7_vmx(void __user *to,
		336	const void __user *from, unsigned long size);
		337
		338	static __always_inline bool will_use_vmx(unsigned long n)
		339	{
		340	return IS_ENABLED(CONFIG_ALTIVEC) && cpu_has_feature(CPU_FTR_VMX_COPY) &&
		341	n > VMX_COPY_THRESHOLD;
		342	}
		343
		344	static __always_inline unsigned long
		345	raw_copy_tofrom_user(void __user to, const void __user from,
		346	unsigned long n, unsigned long dir)
332	{	347	{
333	unsigned long ret;	348	unsigned long ret;
334		349
335	barrier_nospec();	350	if (will_use_vmx(n) && enter_vmx_usercopy()) {
336	allow_user_access(to, KUAP_READ_WRITE);	351	allow_user_access(to, dir);
		352	ret = __copy_tofrom_user_power7_vmx(to, from, n);
		353	prevent_user_access(dir);
		354	exit_vmx_usercopy();
		355
		356	if (unlikely(ret)) {
		357	allow_user_access(to, dir);
		358	ret = __copy_tofrom_user_base(to, from, n);
		359	prevent_user_access(dir);
		360	}
		361	return ret;
		362	}
		363
		364	allow_user_access(to, dir);
337	ret = __copy_tofrom_user(to, from, n);	365	ret = __copy_tofrom_user(to, from, n);
338	prevent_user_access(KUAP_READ_WRITE);	366	prevent_user_access(dir);
339	return ret;	367	return ret;
340	}	368	}
341	#endif /* __powerpc64__ */
342		369
343	static inline unsigned long raw_copy_from_user(void *to,	370	#ifdef CONFIG_PPC64
344	const void __user *from, unsigned long n)	371	static inline unsigned long
		372	raw_copy_in_user(void __user to, const void __user from, unsigned long n)
345	{	373	{
346	unsigned long ret;	374	barrier_nospec();
		375	return raw_copy_tofrom_user(to, from, n, KUAP_READ_WRITE);
		376	}
		377	#endif /* CONFIG_PPC64 */
347		378
348	allow_user_access(NULL, KUAP_READ);	379	static inline unsigned long raw_copy_from_user(void to, const void __user from, unsigned long n)
349	ret = __copy_tofrom_user((__force void __user *)to, from, n);	380	{
350	prevent_user_access(KUAP_READ);	381	return raw_copy_tofrom_user((__force void __user *)to, from, n, KUAP_READ);
351	return ret;
352	}	382	}
353		383
354	static inline unsigned long	384	static inline unsigned long
355	raw_copy_to_user(void __user to, const void from, unsigned long n)	385	raw_copy_to_user(void __user to, const void from, unsigned long n)
356	{	386	{
357	unsigned long ret;	387	return raw_copy_tofrom_user(to, (__force const void __user *)from, n, KUAP_WRITE);
358
359	allow_user_access(to, KUAP_WRITE);
360	ret = __copy_tofrom_user(to, (__force const void __user *)from, n);
361	prevent_user_access(KUAP_WRITE);
362	return ret;
363	}	388	}
364		389
365	unsigned long __arch_clear_user(void __user *addr, unsigned long size);	390	unsigned long __arch_clear_user(void __user *addr, unsigned long size);

arch/powerpc/kernel/head_85xx.S+1−45

  *   r12 is pointer to the pte
  *   r10 is the pshift from the PGD, if we're a hugepage
  */
-#ifdef CONFIG_PTE_64BIT
 #ifdef CONFIG_HUGETLB_PAGE
 #define FIND_PTE	\
 	rlwinm	r12, r13, 14, 18, 28;	/* Compute pgdir/pmd offset */	\
 	rlwimi	r12, r13, 23, 20, 28;	/* Compute pte address */	\
 	lwz	r11, 4(r12);		/* Get pte entry */
 #endif /* HUGEPAGE */
-#else /* !PTE_64BIT */
-#define FIND_PTE	\
-	rlwimi	r11, r13, 12, 20, 29;	/* Create L1 (pgdir/pmd) address */	\
-	lwz	r11, 0(r11);		/* Get L1 entry */			\
-	rlwinm.	r12, r11, 0, 0, 19;	/* Extract L2 (pte) base address */	\
-	beq	2f;			/* Bail if no table */			\
-	rlwimi	r12, r13, 22, 20, 29;	/* Compute PTE address */		\
-	lwz	r11, 0(r12);		/* Get Linux PTE */
-#endif
 /*
  * Interrupt vector entry code
 4:
 	FIND_PTE
-#ifdef CONFIG_PTE_64BIT
 	li	r13,_PAGE_PRESENT|_PAGE_BAP_SR
 	oris	r13,r13,_PAGE_ACCESSED@h
-#else
-	li	r13,_PAGE_PRESENT|_PAGE_READ|_PAGE_ACCESSED
-#endif
 	andc.	r13,r13,r11		/* Check permission */
-#ifdef CONFIG_PTE_64BIT
 #ifdef CONFIG_SMP
 	subf	r13,r11,r12		/* create false data dep */
 	lwzx	r13,r11,r13		/* Get upper pte bits */
 #else
 	lwz	r13,0(r12)		/* Get upper pte bits */
-#endif
 #endif
 	bne	2f			/* Bail if permission/valid mismatch */
 	FIND_PTE
 	/* Make up the required permissions for kernel code */
-#ifdef CONFIG_PTE_64BIT
 	li	r13,_PAGE_PRESENT | _PAGE_BAP_SX
 	oris	r13,r13,_PAGE_ACCESSED@h
-#else
-	li	r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
-#endif
 	b	4f
 	/* Get the PGD for the current thread */
 	FIND_PTE
 	/* Make up the required permissions for user code */
-#ifdef CONFIG_PTE_64BIT
 	li	r13,_PAGE_PRESENT | _PAGE_BAP_UX
 	oris	r13,r13,_PAGE_ACCESSED@h
-#else
-	li	r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_EXEC
-#endif
 4:
 	andc.	r13,r13,r11		/* Check permission */
-#ifdef CONFIG_PTE_64BIT
 #ifdef CONFIG_SMP
 	subf	r13,r11,r12		/* create false data dep */
 	lwzx	r13,r11,r13		/* Get upper pte bits */
 #else
 	lwz	r13,0(r12)		/* Get upper pte bits */
-#endif
 #endif
 	bne	2f			/* Bail if permission mismatch */
  *	r10 - tsize encoding (if HUGETLB_PAGE) or available to use
  *	r11 - TLB (info from Linux PTE)
  *	r12 - available to use
- *	r13 - upper bits of PTE (if PTE_64BIT) or available to use
+ *	r13 - upper bits of PTE
  *	CR5 - results of addr >= PAGE_OFFSET
  *	MAS0, MAS1 - loaded with proper value when we get here
  *	MAS2, MAS3 - will need additional info from Linux PTE
 	 * here we (properly should) assume have the appropriate value.
 	 */
 finish_tlb_load_cont:
-#ifdef CONFIG_PTE_64BIT
 	rlwinm	r12, r11, 32-2, 26, 31	/* Move in perm bits */
 	andi.	r10, r11, _PAGE_DIRTY
 	bne	1f
 	srwi	r10, r13, 12		/* grab RPN[12:31] */
 	mtspr	SPRN_MAS7, r10
 END_MMU_FTR_SECTION_IFSET(MMU_FTR_BIG_PHYS)
-#else
-	li	r10, (_PAGE_EXEC | _PAGE_READ)
-	mr	r13, r11
-	rlwimi	r10, r11, 31, 29, 29	/* extract _PAGE_DIRTY into SW */
-	and	r12, r11, r10
-	mcrf	cr0, cr5		/* Test for user page */
-	slwi	r10, r12, 1
-	or	r10, r10, r12
-	rlwinm	r10, r10, 0, ~_PAGE_EXEC	/* Clear SX on user pages */
-	isellt	r12, r10, r12
-	rlwimi	r13, r12, 0, 20, 31	/* Get RPN from PTE, merge w/ perms */
-	mtspr	SPRN_MAS3, r13
-#endif
 	mfspr	r12, SPRN_MAS2
-#ifdef CONFIG_PTE_64BIT
 	rlwimi	r12, r11, 32-19, 27, 31	/* extract WIMGE from pte */
-#else
-	rlwimi	r12, r11, 26, 27, 31	/* extract WIMGE from pte */
-#endif
 #ifdef CONFIG_HUGETLB_PAGE
 	beq	6, 3f			/* don't mask if page isn't huge */
 	li	r13, 1

arch/powerpc/kernel/iommu.c+1−1

@@ -1159,7 +1159,7 @@ spapr_tce_platform_iommu_attach_dev(struct iommu_domain *platform_domain, · 1158 unmodified lines
1159	struct device *dev,	1159	struct device *dev,
1160	struct iommu_domain *old)	1160	struct iommu_domain *old)
1161	{	1161	{
1162	struct iommu_domain *domain = iommu_get_domain_for_dev(dev);	1162	struct iommu_domain *domain = iommu_driver_get_domain_for_dev(dev);
1163	struct iommu_table_group *table_group;	1163	struct iommu_table_group *table_group;
1164	struct iommu_group *grp;	1164	struct iommu_group *grp;
1165		1165

arch/powerpc/kernel/pci_of_scan.c+7−0

@@ -212,6 +212,13 @@ struct pci_dev of_create_pci_dev(struct device_node node, · 211 unmodified lines
212	dev->error_state = pci_channel_io_normal;	212	dev->error_state = pci_channel_io_normal;
213	dev->dma_mask = 0xffffffff;	213	dev->dma_mask = 0xffffffff;
214		214
		215	/*
		216	* Assume 64-bit addresses for MSI initially. Will be changed to 32-bit
		217	* if MSI (rather than MSI-X) capability does not have
		218	* PCI_MSI_FLAGS_64BIT. Can also be overridden by driver.
		219	*/
		220	dev->msi_addr_mask = DMA_BIT_MASK(64);
		221
215	/* Early fixups, before probing the BARs */	222	/* Early fixups, before probing the BARs */
216	pci_fixup_device(pci_fixup_early, dev);	223	pci_fixup_device(pci_fixup_early, dev);
217		224

arch/powerpc/kernel/prom_init.c+2−1

@@ -2893,7 +2893,8 @@ static void __init fixup_device_tree_pmac(void) · 2892 unmodified lines
2893	for (node = 0; prom_next_node(&node); ) {	2893	for (node = 0; prom_next_node(&node); ) {
2894	type[0] = '\0';	2894	type[0] = '\0';
2895	prom_getprop(node, "device_type", type, sizeof(type));	2895	prom_getprop(node, "device_type", type, sizeof(type));
2896	if (prom_strcmp(type, "escc") && prom_strcmp(type, "i2s"))	2896	if (prom_strcmp(type, "escc") && prom_strcmp(type, "i2s") &&
		2897	prom_strcmp(type, "media-bay"))
2897	continue;	2898	continue;
2898		2899
2899	if (prom_getproplen(node, "#size-cells") != PROM_ERROR)	2900	if (prom_getproplen(node, "#size-cells") != PROM_ERROR)

arch/powerpc/kernel/setup-common.c+0−10

 #include <linux/of_irq.h>
 #include <linux/hugetlb.h>
 #include <linux/pgtable.h>
-#include <asm/kexec.h>
 #include <asm/io.h>
 #include <asm/paca.h>
 #include <asm/processor.h>
 	initmem_init();
-	/*
-	 * Reserve large chunks of memory for use by CMA for kdump, fadump, KVM and
-	 * hugetlb. These must be called after initmem_init(), so that
-	 * pageblock_order is initialised.
-	 */
-	fadump_cma_init();
-	kdump_cma_reserve();
-	kvm_cma_reserve();
 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
 	if (ppc_md.setup_arch)

arch/powerpc/kernel/trace/ftrace.c+22−4

@@ -37,11 +37,29 @@ unsigned long ftrace_call_adjust(unsigned long addr) · 36 unmodified lines
37	if (addr >= (unsigned long)__exittext_begin && addr < (unsigned long)__exittext_end)	37	if (addr >= (unsigned long)__exittext_begin && addr < (unsigned long)__exittext_end)
38	return 0;	38	return 0;
39		39
40	if (IS_ENABLED(CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY) &&	40	if (IS_ENABLED(CONFIG_ARCH_USING_PATCHABLE_FUNCTION_ENTRY)) {
41	!IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {	41	if (!IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {
42	addr += MCOUNT_INSN_SIZE;
43	if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS))
44	addr += MCOUNT_INSN_SIZE;	42	addr += MCOUNT_INSN_SIZE;
		43	if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE_WITH_CALL_OPS))
		44	addr += MCOUNT_INSN_SIZE;
		45	} else if (IS_ENABLED(CONFIG_CC_IS_CLANG) && IS_ENABLED(CONFIG_PPC64)) {
		46	/*
		47	* addr points to global entry point though the NOP was emitted at local
		48	* entry point due to https://github.com/llvm/llvm-project/issues/163706
		49	* Handle that here with ppc_function_entry() for kernel symbols while
		50	* adjusting module addresses in the else case, by looking for the below
		51	* module global entry point sequence:
		52	* ld r2, -8(r12)
		53	* add r2, r2, r12
		54	*/
		55	if (is_kernel_text(addr) \|\| is_kernel_inittext(addr))
		56	addr = ppc_function_entry((void *)addr);
		57	else if ((ppc_inst_val(ppc_inst_read((u32 *)addr)) ==
		58	PPC_RAW_LD(_R2, _R12, -8)) &&
		59	(ppc_inst_val(ppc_inst_read((u32 *)(addr+4))) ==
		60	PPC_RAW_ADD(_R2, _R2, _R12)))
		61	addr += 8;
		62	}
45	}	63	}
46		64
47	return addr;	65	return addr;

arch/powerpc/kernel/vmlinux.lds.S+1−0

@@ -397,6 +397,7 @@ SECTIONS · 396 unmodified lines
397	_end = . ;	397	_end = . ;
398		398
399	DWARF_DEBUG	399	DWARF_DEBUG
		400	MODINFO
400	ELF_DETAILS	401	ELF_DETAILS
401		402
402	DISCARDS	403	DISCARDS

arch/powerpc/kexec/core.c+9−8

 #include <asm/firmware.h>
 #define cpu_to_be_ulong __PASTE(cpu_to_be, BITS_PER_LONG)
+#define __be_word __PASTE(__be, BITS_PER_LONG)
 #ifdef CONFIG_CRASH_DUMP
 void machine_crash_shutdown(struct pt_regs *regs)
 }
 /* Values we need to export to the second kernel via the device tree. */
-static phys_addr_t crashk_base;
+static __be_word crashk_base;
-static phys_addr_t crashk_size;
+static __be_word crashk_size;
-static unsigned long long mem_limit;
+static __be_word mem_limit;
 static struct property crashk_base_prop = {
 	.name = "linux,crashkernel-base",
-	.length = sizeof(phys_addr_t),
+	.length = sizeof(__be_word),
 	.value = &crashk_base
 };
 static struct property crashk_size_prop = {
 	.name = "linux,crashkernel-size",
-	.length = sizeof(phys_addr_t),
+	.length = sizeof(__be_word),
 	.value = &crashk_size,
 };
 static struct property memory_limit_prop = {
 	.name = "linux,memory-limit",
-	.length = sizeof(unsigned long long),
+	.length = sizeof(__be_word),
 	.value = &mem_limit,
 };
 }
 #endif /* CONFIG_CRASH_RESERVE */
-static phys_addr_t kernel_end;
+static __be_word kernel_end;
 static struct property kernel_end_prop = {
 	.name = "linux,kernel-end",
-	.length = sizeof(phys_addr_t),
+	.length = sizeof(__be_word),
 	.value = &kernel_end,
 };

arch/powerpc/kexec/file_load_64.c+13−1

@@ -450,6 +450,11 @@ static int load_elfcorehdr_segment(struct kimage image, struct kexec_buf kbuf) · 449 unmodified lines
450	kbuf->buffer = headers;	450	kbuf->buffer = headers;
451	kbuf->mem = KEXEC_BUF_MEM_UNKNOWN;	451	kbuf->mem = KEXEC_BUF_MEM_UNKNOWN;
452	kbuf->bufsz = headers_sz;	452	kbuf->bufsz = headers_sz;
		453
		454	/*
		455	* Account for extra space required to accommodate additional memory
		456	* ranges in elfcorehdr due to memory hotplug events.
		457	*/
453	kbuf->memsz = headers_sz + kdump_extra_elfcorehdr_size(cmem);	458	kbuf->memsz = headers_sz + kdump_extra_elfcorehdr_size(cmem);
454	kbuf->top_down = false;	459	kbuf->top_down = false;
455		460
@@ -460,7 +465,14 @@ static int load_elfcorehdr_segment(struct kimage image, struct kexec_buf kbuf) · 4 unmodified lines
460	}	465	}
461		466
462	image->elf_load_addr = kbuf->mem;	467	image->elf_load_addr = kbuf->mem;
463	image->elf_headers_sz = headers_sz;	468
		469	/*
		470	* If CONFIG_CRASH_HOTPLUG is enabled, the elfcorehdr kexec segment
		471	* memsz can be larger than bufsz. Always initialize elf_headers_sz
		472	* with memsz. This ensures the correct size is reserved for elfcorehdr
		473	* memory in the FDT prepared for kdump.
		474	*/
		475	image->elf_headers_sz = kbuf->memsz;
464	image->elf_headers = headers;	476	image->elf_headers = headers;
465	out:	477	out:
466	kfree(cmem);	478	kfree(cmem);

arch/powerpc/kvm/Kconfig+0−4

 config KVM_BOOK3S_PR_POSSIBLE
 	bool
 	select KVM_MMIO
-	select KVM_GENERIC_MMU_NOTIFIER
 config KVM_BOOK3S_HV_POSSIBLE
 	bool
 	tristate "KVM for POWER7 and later using hypervisor mode in host"
 	depends on KVM_BOOK3S_64 && PPC_POWERNV
 	select KVM_BOOK3S_HV_POSSIBLE
-	select KVM_GENERIC_MMU_NOTIFIER
 	select KVM_BOOK3S_HV_PMU
 	select CMA
 	help
 	depends on !CONTEXT_TRACKING_USER
 	select KVM
 	select KVM_MMIO
-	select KVM_GENERIC_MMU_NOTIFIER
 	help
 	  Support running unmodified E500 guest kernels in virtual machines on
 	  E500v2 host processors.
 	select KVM
 	select KVM_MMIO
 	select KVM_BOOKE_HV
-	select KVM_GENERIC_MMU_NOTIFIER
 	help
 	  Support running unmodified E500MC/E5500/E6500 guest kernels in
 	  virtual machines on E500MC/E5500/E6500 host processors.

arch/powerpc/kvm/book3s.c+2−2

@@ -38,7 +38,7 @@ · 37 unmodified lines
38		38
39	/* #define EXIT_DEBUG */	39	/* #define EXIT_DEBUG */
40		40
41	const struct _kvm_stats_desc kvm_vm_stats_desc[] = {	41	const struct kvm_stats_desc kvm_vm_stats_desc[] = {
42	KVM_GENERIC_VM_STATS(),	42	KVM_GENERIC_VM_STATS(),
43	STATS_DESC_ICOUNTER(VM, num_2M_pages),	43	STATS_DESC_ICOUNTER(VM, num_2M_pages),
44	STATS_DESC_ICOUNTER(VM, num_1G_pages)	44	STATS_DESC_ICOUNTER(VM, num_1G_pages)
@@ -53,7 +53,7 @@ const struct kvm_stats_header kvm_vm_stats_header = { · 8 unmodified lines
53	sizeof(kvm_vm_stats_desc),	53	sizeof(kvm_vm_stats_desc),
54	};	54	};
55		55
56	const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {	56	const struct kvm_stats_desc kvm_vcpu_stats_desc[] = {
57	KVM_GENERIC_VCPU_STATS(),	57	KVM_GENERIC_VCPU_STATS(),
58	STATS_DESC_COUNTER(VCPU, sum_exits),	58	STATS_DESC_COUNTER(VCPU, sum_exits),
59	STATS_DESC_COUNTER(VCPU, mmio_exits),	59	STATS_DESC_COUNTER(VCPU, mmio_exits),

arch/powerpc/kvm/booke.c+2−2

@@ -36,7 +36,7 @@ · 35 unmodified lines
36		36
37	unsigned long kvmppc_booke_handlers;	37	unsigned long kvmppc_booke_handlers;
38		38
39	const struct _kvm_stats_desc kvm_vm_stats_desc[] = {	39	const struct kvm_stats_desc kvm_vm_stats_desc[] = {
40	KVM_GENERIC_VM_STATS(),	40	KVM_GENERIC_VM_STATS(),
41	STATS_DESC_ICOUNTER(VM, num_2M_pages),	41	STATS_DESC_ICOUNTER(VM, num_2M_pages),
42	STATS_DESC_ICOUNTER(VM, num_1G_pages)	42	STATS_DESC_ICOUNTER(VM, num_1G_pages)
@@ -51,7 +51,7 @@ const struct kvm_stats_header kvm_vm_stats_header = { · 8 unmodified lines
51	sizeof(kvm_vm_stats_desc),	51	sizeof(kvm_vm_stats_desc),
52	};	52	};
53		53
54	const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {	54	const struct kvm_stats_desc kvm_vcpu_stats_desc[] = {
55	KVM_GENERIC_VCPU_STATS(),	55	KVM_GENERIC_VCPU_STATS(),
56	STATS_DESC_COUNTER(VCPU, sum_exits),	56	STATS_DESC_COUNTER(VCPU, sum_exits),
57	STATS_DESC_COUNTER(VCPU, mmio_exits),	57	STATS_DESC_COUNTER(VCPU, mmio_exits),

arch/powerpc/kvm/e500.h+1−5

 /* bits [6-5] MAS2_X1 and MAS2_X0 and [4-0] bits for WIMGE */
 #define E500_TLB_MAS2_ATTR	(0x7f)
-struct tlbe_ref {
+struct tlbe_priv {
 	kvm_pfn_t pfn;		/* valid only for TLB0, except briefly */
 	unsigned int flags;	/* E500_TLB_* */
 };
-struct tlbe_priv {
-	struct tlbe_ref ref;
-};
 #ifdef CONFIG_KVM_E500V2
 struct vcpu_id_table;
 #endif

arch/powerpc/kvm/e500_mmu.c+2−2

@@ -920,12 +920,12 @@ int kvmppc_e500_tlb_init(struct kvmppc_vcpu_e500 *vcpu_e500) · 919 unmodified lines
920	vcpu_e500->gtlb_offset[0] = 0;	920	vcpu_e500->gtlb_offset[0] = 0;
921	vcpu_e500->gtlb_offset[1] = KVM_E500_TLB0_SIZE;	921	vcpu_e500->gtlb_offset[1] = KVM_E500_TLB0_SIZE;
922		922
923	vcpu_e500->gtlb_priv[0] = kzalloc_objs(struct tlbe_ref,	923	vcpu_e500->gtlb_priv[0] = kzalloc_objs(struct tlbe_priv,
924	vcpu_e500->gtlb_params[0].entries);	924	vcpu_e500->gtlb_params[0].entries);
925	if (!vcpu_e500->gtlb_priv[0])	925	if (!vcpu_e500->gtlb_priv[0])
926	goto free_vcpu;	926	goto free_vcpu;
927		927
928	vcpu_e500->gtlb_priv[1] = kzalloc_objs(struct tlbe_ref,	928	vcpu_e500->gtlb_priv[1] = kzalloc_objs(struct tlbe_priv,
929	vcpu_e500->gtlb_params[1].entries);	929	vcpu_e500->gtlb_params[1].entries);
930	if (!vcpu_e500->gtlb_priv[1])	930	if (!vcpu_e500->gtlb_priv[1])
931	goto free_vcpu;	931	goto free_vcpu;

arch/powerpc/kvm/e500_mmu_host.c+44−47

 {
 	struct kvm_book3e_206_tlb_entry *gtlbe =
 		get_entry(vcpu_e500, tlbsel, esel);
-	struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[tlbsel][esel].ref;
+	struct tlbe_priv *tlbe = &vcpu_e500->gtlb_priv[tlbsel][esel];
 	/* Don't bother with unmapped entries */
-	if (!(ref->flags & E500_TLB_VALID)) {
+	if (!(tlbe->flags & E500_TLB_VALID)) {
-		WARN(ref->flags & (E500_TLB_BITMAP | E500_TLB_TLB0),
+		WARN(tlbe->flags & (E500_TLB_BITMAP | E500_TLB_TLB0),
-		     "%s: flags %x\n", __func__, ref->flags);
+		     "%s: flags %x\n", __func__, tlbe->flags);
 		WARN_ON(tlbsel == 1 && vcpu_e500->g2h_tlb1_map[esel]);
 	}
-	if (tlbsel == 1 && ref->flags & E500_TLB_BITMAP) {
+	if (tlbsel == 1 && tlbe->flags & E500_TLB_BITMAP) {
 		u64 tmp = vcpu_e500->g2h_tlb1_map[esel];
 		int hw_tlb_indx;
 		unsigned long flags;
 		}
 		mb();
 		vcpu_e500->g2h_tlb1_map[esel] = 0;
-		ref->flags &= ~(E500_TLB_BITMAP | E500_TLB_VALID);
+		tlbe->flags &= ~(E500_TLB_BITMAP | E500_TLB_VALID);
 		local_irq_restore(flags);
 	}
-	if (tlbsel == 1 && ref->flags & E500_TLB_TLB0) {
+	if (tlbsel == 1 && tlbe->flags & E500_TLB_TLB0) {
 		/*
 		 * TLB1 entry is backed by 4k pages. This should happen
 		 * rarely and is not worth optimizing. Invalidate everything.
 		 */
 		kvmppc_e500_tlbil_all(vcpu_e500);
-		ref->flags &= ~(E500_TLB_TLB0 | E500_TLB_VALID);
+		tlbe->flags &= ~(E500_TLB_TLB0 | E500_TLB_VALID);
 	}
 	/*
 	 * If TLB entry is still valid then it's a TLB0 entry, and thus
 	 * backed by at most one host tlbe per shadow pid
 	 */
-	if (ref->flags & E500_TLB_VALID)
+	if (tlbe->flags & E500_TLB_VALID)
 		kvmppc_e500_tlbil_one(vcpu_e500, gtlbe);
 	/* Mark the TLB as not backed by the host anymore */
-	ref->flags = 0;
+	tlbe->flags = 0;
 }
 static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
 	return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
 }
-static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
+static inline void kvmppc_e500_tlbe_setup(struct tlbe_priv *tlbe,
-					 struct kvm_book3e_206_tlb_entry *gtlbe,
+					  struct kvm_book3e_206_tlb_entry *gtlbe,
-					 kvm_pfn_t pfn, unsigned int wimg,
+					  kvm_pfn_t pfn, unsigned int wimg,
-					 bool writable)
+					  bool writable)
 {
-	ref->pfn = pfn;
+	tlbe->pfn = pfn;
-	ref->flags = E500_TLB_VALID;
+	tlbe->flags = E500_TLB_VALID;
 	if (writable)
-		ref->flags |= E500_TLB_WRITABLE;
+		tlbe->flags |= E500_TLB_WRITABLE;
 	/* Use guest supplied MAS2_G and MAS2_E */
-	ref->flags |= (gtlbe->mas2 & MAS2_ATTRIB_MASK) | wimg;
+	tlbe->flags |= (gtlbe->mas2 & MAS2_ATTRIB_MASK) | wimg;
 }
-static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
+static inline void kvmppc_e500_tlbe_release(struct tlbe_priv *tlbe)
 {
-	if (ref->flags & E500_TLB_VALID) {
+	if (tlbe->flags & E500_TLB_VALID) {
 		/* FIXME: don't log bogus pfn for TLB1 */
-		trace_kvm_booke206_ref_release(ref->pfn, ref->flags);
+		trace_kvm_booke206_ref_release(tlbe->pfn, tlbe->flags);
-		ref->flags = 0;
+		tlbe->flags = 0;
 	}
 }
 	int i;
 	for (tlbsel = 0; tlbsel <= 1; tlbsel++) {
-		for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
+		for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++)
-			struct tlbe_ref *ref =
+			kvmppc_e500_tlbe_release(&vcpu_e500->gtlb_priv[tlbsel][i]);
-				&vcpu_e500->gtlb_priv[tlbsel][i].ref;
-			kvmppc_e500_ref_release(ref);
-		}
 	}
 }
 static void kvmppc_e500_setup_stlbe(
 	struct kvm_vcpu *vcpu,
 	struct kvm_book3e_206_tlb_entry *gtlbe,
-	int tsize, struct tlbe_ref *ref, u64 gvaddr,
+	int tsize, struct tlbe_priv *tlbe, u64 gvaddr,
 	struct kvm_book3e_206_tlb_entry *stlbe)
 {
-	kvm_pfn_t pfn = ref->pfn;
+	kvm_pfn_t pfn = tlbe->pfn;
 	u32 pr = vcpu->arch.shared->msr & MSR_PR;
-	bool writable = !!(ref->flags & E500_TLB_WRITABLE);
+	bool writable = !!(tlbe->flags & E500_TLB_WRITABLE);
-	BUG_ON(!(ref->flags & E500_TLB_VALID));
+	BUG_ON(!(tlbe->flags & E500_TLB_VALID));
 	/* Force IPROT=0 for all guest mappings. */
 	stlbe->mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;
-	stlbe->mas2 = (gvaddr & MAS2_EPN) | (ref->flags & E500_TLB_MAS2_ATTR);
+	stlbe->mas2 = (gvaddr & MAS2_EPN) | (tlbe->flags & E500_TLB_MAS2_ATTR);
 	stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT) |
 			e500_shadow_mas3_attrib(gtlbe->mas7_3, writable, pr);
 }
 static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
 	u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
 	int tlbsel, struct kvm_book3e_206_tlb_entry *stlbe,
-	struct tlbe_ref *ref)
+	struct tlbe_priv *tlbe)
 {
 	struct kvm_memory_slot *slot;
 	unsigned int psize;
 		}
 	}
-	kvmppc_e500_ref_setup(ref, gtlbe, pfn, wimg, writable);
+	kvmppc_e500_tlbe_setup(tlbe, gtlbe, pfn, wimg, writable);
 	kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
-				ref, gvaddr, stlbe);
+				tlbe, gvaddr, stlbe);
 	writable = tlbe_is_writable(stlbe);
 	/* Clear i-cache for new pages */
 				struct kvm_book3e_206_tlb_entry *stlbe)
 {
 	struct kvm_book3e_206_tlb_entry *gtlbe;
-	struct tlbe_ref *ref;
+	struct tlbe_priv *tlbe;
 	int stlbsel = 0;
 	int sesel = 0;
 	int r;
 	gtlbe = get_entry(vcpu_e500, 0, esel);
-	ref = &vcpu_e500->gtlb_priv[0][esel].ref;
+	tlbe = &vcpu_e500->gtlb_priv[0][esel];
 	r = kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
 			get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
-			gtlbe, 0, stlbe, ref);
+			gtlbe, 0, stlbe, tlbe);
 	if (r)
 		return r;
 }
 static int kvmppc_e500_tlb1_map_tlb1(struct kvmppc_vcpu_e500 *vcpu_e500,
-				     struct tlbe_ref *ref,
+				     struct tlbe_priv *tlbe,
 				     int esel)
 {
 	unsigned int sesel = vcpu_e500->host_tlb1_nv++;
 		vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << sesel);
 	}
-	vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
+	vcpu_e500->gtlb_priv[1][esel].flags |= E500_TLB_BITMAP;
 	vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << sesel;
 	vcpu_e500->h2g_tlb1_rmap[sesel] = esel + 1;
-	WARN_ON(!(ref->flags & E500_TLB_VALID));
+	WARN_ON(!(tlbe->flags & E500_TLB_VALID));
 	return sesel;
 }
 		u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
 		struct kvm_book3e_206_tlb_entry *stlbe, int esel)
 {
-	struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[1][esel].ref;
+	struct tlbe_priv *tlbe = &vcpu_e500->gtlb_priv[1][esel];
 	int sesel;
 	int r;
 	r = kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe,
-				   ref);
+				   tlbe);
 	if (r)
 		return r;
 	/* Use TLB0 when we can only map a page with 4k */
 	if (get_tlb_tsize(stlbe) == BOOK3E_PAGESZ_4K) {
-		vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_TLB0;
+		vcpu_e500->gtlb_priv[1][esel].flags |= E500_TLB_TLB0;
 		write_stlbe(vcpu_e500, gtlbe, stlbe, 0, 0);
 		return 0;
 	}
 	/* Otherwise map into TLB1 */
-	sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, ref, esel);
+	sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, tlbe, esel);
 	write_stlbe(vcpu_e500, gtlbe, stlbe, 1, sesel);
 	return 0;
 		priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
 		/* Triggers after clear_tlb_privs or on initial mapping */
-		if (!(priv->ref.flags & E500_TLB_VALID)) {
+		if (!(priv->flags & E500_TLB_VALID)) {
 			kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
 		} else {
 			kvmppc_e500_setup_stlbe(vcpu, gtlbe, BOOK3E_PAGESZ_4K,
-						&priv->ref, eaddr, &stlbe);
+						priv, eaddr, &stlbe);
 			write_stlbe(vcpu_e500, gtlbe, &stlbe, 0, 0);
 		}
 		break;

arch/powerpc/kvm/powerpc.c+0−6

 		r = !!(hv_enabled && kvmppc_hv_ops->enable_nested &&
 		       !kvmppc_hv_ops->enable_nested(NULL));
 		break;
-#endif
-	case KVM_CAP_SYNC_MMU:
-		BUILD_BUG_ON(!IS_ENABLED(CONFIG_KVM_GENERIC_MMU_NOTIFIER));
-		r = 1;
-		break;
-#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
 	case KVM_CAP_PPC_HTAB_FD:
 		r = hv_enabled;
 		break;

arch/powerpc/lib/copyuser_64.S+1−0

@@ -562,3 +562,4 @@ exc; std r10,32(3) · 561 unmodified lines
562	li r5,4096	562	li r5,4096
563	b .Ldst_aligned	563	b .Ldst_aligned
564	EXPORT_SYMBOL(__copy_tofrom_user)	564	EXPORT_SYMBOL(__copy_tofrom_user)
		565	EXPORT_SYMBOL(__copy_tofrom_user_base)

arch/powerpc/lib/copyuser_power7.S+15−30

  *
  * Author: Anton Blanchard <anton@au.ibm.com>
  */
+#include <linux/export.h>
 #include <asm/ppc_asm.h>
-#ifndef SELFTEST_CASE
-/* 0 == don't use VMX, 1 == use VMX */
-#define SELFTEST_CASE	0
-#endif
 #ifdef __BIG_ENDIAN__
 #define LVS(VRT,RA,RB)		lvsl	VRT,RA,RB
 #define VPERM(VRT,VRA,VRB,VRC)	vperm	VRT,VRA,VRB,VRC
 	ld	r15,STK_REG(R15)(r1)
 	ld	r14,STK_REG(R14)(r1)
 .Ldo_err3:
-	bl	CFUNC(exit_vmx_usercopy)
+	ld      r6,STK_REG(R31)(r1)	/* original destination pointer */
+	ld      r5,STK_REG(R29)(r1)	/* original number of bytes */
+	subf    r7,r6,r3		/* #bytes copied */
+	subf    r3,r7,r5		/* #bytes not copied in r3 */
 	ld	r0,STACKFRAMESIZE+16(r1)
 	mtlr	r0
-	b	.Lexit
+	addi    r1,r1,STACKFRAMESIZE
+	blr
 #endif /* CONFIG_ALTIVEC */
 .Ldo_err2:
 _GLOBAL(__copy_tofrom_user_power7)
 	cmpldi	r5,16
-	cmpldi	cr1,r5,3328
 	std	r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
 	std	r4,-STACKFRAMESIZE+STK_REG(R30)(r1)
 	blt	.Lshort_copy
-#ifdef CONFIG_ALTIVEC
-test_feature = SELFTEST_CASE
-BEGIN_FTR_SECTION
-	bgt	cr1,.Lvmx_copy
-END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-#endif
 .Lnonvmx_copy:
 	/* Get the source 8B aligned */
 15:	li	r3,0
 	blr
-.Lunwind_stack_nonvmx_copy:
-	addi	r1,r1,STACKFRAMESIZE
-	b	.Lnonvmx_copy
-.Lvmx_copy:
 #ifdef CONFIG_ALTIVEC
+_GLOBAL(__copy_tofrom_user_power7_vmx)
 	mflr	r0
 	std	r0,16(r1)
 	stdu	r1,-STACKFRAMESIZE(r1)
-	bl	CFUNC(enter_vmx_usercopy)
-	cmpwi	cr1,r3,0
-	ld	r0,STACKFRAMESIZE+16(r1)
-	ld	r3,STK_REG(R31)(r1)
-	ld	r4,STK_REG(R30)(r1)
-	ld	r5,STK_REG(R29)(r1)
-	mtlr	r0
+	std     r3,STK_REG(R31)(r1)
+	std     r5,STK_REG(R29)(r1)
 	/*
 	 * We prefetch both the source and destination using enhanced touch
 	 * instructions. We use a stream ID of 0 for the load side and
 	DCBT_SETUP_STREAMS(r6, r7, r9, r10, r8)
-	beq	cr1,.Lunwind_stack_nonvmx_copy
 	/*
 	 * If source and destination are not relatively aligned we use a
 	 * slower permute loop.
 err3;	stb	r0,0(r3)
 15:	addi	r1,r1,STACKFRAMESIZE
-	b	CFUNC(exit_vmx_usercopy)	/* tail call optimise */
+	li r3,0
+	blr
 .Lvmx_unaligned_copy:
 	/* Get the destination 16B aligned */
 err3;	stb	r0,0(r3)
 15:	addi	r1,r1,STACKFRAMESIZE
-	b	CFUNC(exit_vmx_usercopy)	/* tail call optimise */
+	li r3,0
+	blr
+EXPORT_SYMBOL(__copy_tofrom_user_power7_vmx)
 #endif /* CONFIG_ALTIVEC */

arch/powerpc/lib/vmx-helper.c+2−0

 	return 1;
 }
+EXPORT_SYMBOL(enter_vmx_usercopy);
 /*
  * This function must return 0 because we tail call optimise when calling
 		set_dec(1);
 	return 0;
 }
+EXPORT_SYMBOL(exit_vmx_usercopy);
 int enter_vmx_ops(void)
 {

arch/powerpc/mm/mem.c+14−0

@@ -30,6 +30,10 @@ · 29 unmodified lines
30	#include <asm/setup.h>	30	#include <asm/setup.h>
31	#include <asm/fixmap.h>	31	#include <asm/fixmap.h>
32		32
		33	#include <asm/fadump.h>
		34	#include <asm/kexec.h>
		35	#include <asm/kvm_ppc.h>
		36
33	#include <mm/mmu_decl.h>	37	#include <mm/mmu_decl.h>
34		38
35	unsigned long long memory_limit __initdata;	39	unsigned long long memory_limit __initdata;
@@ -268,6 +272,16 @@ void __init paging_init(void) · 232 unmodified lines
268		272
269	void __init arch_mm_preinit(void)	273	void __init arch_mm_preinit(void)
270	{	274	{
		275
		276	/*
		277	* Reserve large chunks of memory for use by CMA for kdump, fadump, KVM
		278	* and hugetlb. These must be called after pageblock_order is
		279	* initialised.
		280	*/
		281	fadump_cma_init();
		282	kdump_cma_reserve();
		283	kvm_cma_reserve();
		284
271	/*	285	/*
272	* book3s is limited to 16 page sizes due to encoding this in	286	* book3s is limited to 16 page sizes due to encoding this in
273	* a 4-bit field for slices.	287	* a 4-bit field for slices.

arch/powerpc/net/bpf_jit.h+0−5

 #ifdef CONFIG_PPC64
-/* for gpr non volatile registers BPG_REG_6 to 10 */
-#define BPF_PPC_STACK_SAVE	(6 * 8)
 /* If dummy pass (!image), account for maximum possible instructions */
 #define PPC_LI64(d, i)		do {					      \
 	if (!image)							      \
 int bpf_add_extable_entry(struct bpf_prog *fp, u32 *image, u32 *fimage, int pass,
 			  struct codegen_context *ctx, int insn_idx,
 			  int jmp_off, int dst_reg, u32 code);
-int bpf_jit_stack_tailcallinfo_offset(struct codegen_context *ctx);
 #endif
 #endif

arch/powerpc/net/bpf_jit_comp.c+56−71

@@ -450,7 +450,7 @@ bool bpf_jit_supports_subprog_tailcalls(void) · 449 unmodified lines
450		450
451	bool bpf_jit_supports_kfunc_call(void)	451	bool bpf_jit_supports_kfunc_call(void)
452	{	452	{
453	return true;	453	return IS_ENABLED(CONFIG_PPC64);
454	}	454	}
455		455
456	bool bpf_jit_supports_arena(void)	456	bool bpf_jit_supports_arena(void)
@@ -638,19 +638,12 @@ static int invoke_bpf_mod_ret(u32 image, u32 ro_image, struct codegen_context · 181 unmodified lines
638	* for the traced function (BPF subprog/callee) to fetch it.	638	* for the traced function (BPF subprog/callee) to fetch it.
639	*/	639	*/
640	static void bpf_trampoline_setup_tail_call_info(u32 image, struct codegen_context ctx,	640	static void bpf_trampoline_setup_tail_call_info(u32 image, struct codegen_context ctx,
641	int func_frame_offset,	641	int bpf_frame_size, int r4_off)
642	int bpf_dummy_frame_size, int r4_off)
643	{	642	{
644	if (IS_ENABLED(CONFIG_PPC64)) {	643	if (IS_ENABLED(CONFIG_PPC64)) {
645	/* See Generated stack layout */	644	EMIT(PPC_RAW_LD(_R4, _R1, bpf_frame_size));
646	int tailcallinfo_offset = BPF_PPC_TAILCALL;	645	/* Refer to trampoline's Generated stack layout */
647		646	EMIT(PPC_RAW_LD(_R3, _R4, -BPF_PPC_TAILCALL));
648	/*
649	* func_frame_offset = ...(1)
650	* bpf_dummy_frame_size + trampoline_frame_size
651	*/
652	EMIT(PPC_RAW_LD(_R4, _R1, func_frame_offset));
653	EMIT(PPC_RAW_LD(_R3, _R4, -tailcallinfo_offset));
654		647
655	/*	648	/*
656	* Setting the tail_call_info in trampoline's frame	649	* Setting the tail_call_info in trampoline's frame
@@ -658,22 +651,14 @@ static void bpf_trampoline_setup_tail_call_info(u32 *image, struct codegen_conte · 1 unmodified line
658	*/	651	*/
659	EMIT(PPC_RAW_CMPLWI(_R3, MAX_TAIL_CALL_CNT));	652	EMIT(PPC_RAW_CMPLWI(_R3, MAX_TAIL_CALL_CNT));
660	PPC_BCC_CONST_SHORT(COND_GT, 8);	653	PPC_BCC_CONST_SHORT(COND_GT, 8);
661	EMIT(PPC_RAW_ADDI(_R3, _R4, bpf_jit_stack_tailcallinfo_offset(ctx)));	654	EMIT(PPC_RAW_ADDI(_R3, _R4, -BPF_PPC_TAILCALL));
		655
662	/*	656	/*
663	* From ...(1) above:	657	* Trampoline's tail_call_info is at the same offset, as that of
664	* trampoline_frame_bottom = ...(2)	658	* any bpf program, with reference to previous frame. Update the
665	* func_frame_offset - bpf_dummy_frame_size	659	* address of main's tail_call_info in trampoline frame.
666	*
667	* Using ...(2) derived above:
668	* trampoline_tail_call_info_offset = ...(3)
669	* trampoline_frame_bottom - tailcallinfo_offset
670	*
671	* From ...(3):
672	* Use trampoline_tail_call_info_offset to write reference of main's
673	* tail_call_info in trampoline frame.
674	*/	660	*/
675	EMIT(PPC_RAW_STL(_R3, _R1, (func_frame_offset - bpf_dummy_frame_size)	661	EMIT(PPC_RAW_STL(_R3, _R1, bpf_frame_size - BPF_PPC_TAILCALL));
676	- tailcallinfo_offset));
677	} else {	662	} else {
678	/* See bpf_jit_stack_offsetof() and BPF_PPC_TC */	663	/* See bpf_jit_stack_offsetof() and BPF_PPC_TC */
679	EMIT(PPC_RAW_LL(_R4, _R1, r4_off));	664	EMIT(PPC_RAW_LL(_R4, _R1, r4_off));
@@ -681,7 +666,7 @@ static void bpf_trampoline_setup_tail_call_info(u32 *image, struct codegen_conte · 1 unmodified line
681	}	666	}
682		667
683	static void bpf_trampoline_restore_tail_call_cnt(u32 image, struct codegen_context ctx,	668	static void bpf_trampoline_restore_tail_call_cnt(u32 image, struct codegen_context ctx,
684	int func_frame_offset, int r4_off)	669	int bpf_frame_size, int r4_off)
685	{	670	{
686	if (IS_ENABLED(CONFIG_PPC32)) {	671	if (IS_ENABLED(CONFIG_PPC32)) {
687	/*	672	/*
@@ -692,12 +677,12 @@ static void bpf_trampoline_restore_tail_call_cnt(u32 *image, struct codegen_cont · 4 unmodified lines
692	}	677	}
693	}	678	}
694		679
695	static void bpf_trampoline_save_args(u32 image, struct codegen_context ctx, int func_frame_offset,	680	static void bpf_trampoline_save_args(u32 image, struct codegen_context ctx,
696	int nr_regs, int regs_off)	681	int bpf_frame_size, int nr_regs, int regs_off)
697	{	682	{
698	int param_save_area_offset;	683	int param_save_area_offset;
699		684
700	param_save_area_offset = func_frame_offset; /* the two frames we alloted */	685	param_save_area_offset = bpf_frame_size;
701	param_save_area_offset += STACK_FRAME_MIN_SIZE; /* param save area is past frame header */	686	param_save_area_offset += STACK_FRAME_MIN_SIZE; /* param save area is past frame header */
702		687
703	for (int i = 0; i < nr_regs; i++) {	688	for (int i = 0; i < nr_regs; i++) {
@@ -720,11 +705,11 @@ static void bpf_trampoline_restore_args_regs(u32 *image, struct codegen_context · 16 unmodified lines
720		705
721	/* Used when we call into the traced function. Replicate parameter save area */	706	/* Used when we call into the traced function. Replicate parameter save area */
722	static void bpf_trampoline_restore_args_stack(u32 image, struct codegen_context ctx,	707	static void bpf_trampoline_restore_args_stack(u32 image, struct codegen_context ctx,
723	int func_frame_offset, int nr_regs, int regs_off)	708	int bpf_frame_size, int nr_regs, int regs_off)
724	{	709	{
725	int param_save_area_offset;	710	int param_save_area_offset;
726		711
727	param_save_area_offset = func_frame_offset; /* the two frames we alloted */	712	param_save_area_offset = bpf_frame_size;
728	param_save_area_offset += STACK_FRAME_MIN_SIZE; /* param save area is past frame header */	713	param_save_area_offset += STACK_FRAME_MIN_SIZE; /* param save area is past frame header */
729		714
730	for (int i = 8; i < nr_regs; i++) {	715	for (int i = 8; i < nr_regs; i++) {
@@ -741,10 +726,10 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image im, void rw_im · 10 unmodified lines
741	void *func_addr)	726	void *func_addr)
742	{	727	{
743	int regs_off, nregs_off, ip_off, run_ctx_off, retval_off, nvr_off, alt_lr_off, r4_off = 0;	728	int regs_off, nregs_off, ip_off, run_ctx_off, retval_off, nvr_off, alt_lr_off, r4_off = 0;
744	int i, ret, nr_regs, bpf_frame_size = 0, bpf_dummy_frame_size = 0, func_frame_offset;
745	struct bpf_tramp_links *fmod_ret = &tlinks[BPF_TRAMP_MODIFY_RETURN];	729	struct bpf_tramp_links *fmod_ret = &tlinks[BPF_TRAMP_MODIFY_RETURN];
746	struct bpf_tramp_links *fentry = &tlinks[BPF_TRAMP_FENTRY];	730	struct bpf_tramp_links *fentry = &tlinks[BPF_TRAMP_FENTRY];
747	struct bpf_tramp_links *fexit = &tlinks[BPF_TRAMP_FEXIT];	731	struct bpf_tramp_links *fexit = &tlinks[BPF_TRAMP_FEXIT];
		732	int i, ret, nr_regs, retaddr_off, bpf_frame_size = 0;
748	struct codegen_context codegen_ctx, *ctx;	733	struct codegen_context codegen_ctx, *ctx;
749	u32 image = (u32 )rw_image;	734	u32 image = (u32 )rw_image;
750	ppc_inst_t branch_insn;	735	ppc_inst_t branch_insn;
@@ -770,24 +755,19 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image im, void rw_im · 19 unmodified lines
770	* Generated stack layout:	755	* Generated stack layout:
771	*	756	*
772	* func prev back chain [ back chain ]	757	* func prev back chain [ back chain ]
773	* [ ]
774	* bpf prog redzone/tailcallcnt [ ... ] 64 bytes (64-bit powerpc)
775	* [ ] --
776	* LR save area [ r0 save (64-bit) ] \| header
777	* [ r0 save (32-bit) ] \|
778	* dummy frame for unwind [ back chain 1 ] --
779	* [ tail_call_info ] optional - 64-bit powerpc	758	* [ tail_call_info ] optional - 64-bit powerpc
780	* [ padding ] align stack frame	759	* [ padding ] align stack frame
781	* r4_off [ r4 (tailcallcnt) ] optional - 32-bit powerpc	760	* r4_off [ r4 (tailcallcnt) ] optional - 32-bit powerpc
782	* alt_lr_off [ real lr (ool stub)] optional - actual lr	761	* alt_lr_off [ real lr (ool stub)] optional - actual lr
		762	* retaddr_off [ return address ]
783	* [ r26 ]	763	* [ r26 ]
784	* nvr_off [ r25 ] nvr save area	764	* nvr_off [ r25 ] nvr save area
785	* retval_off [ return value ]	765	* retval_off [ return value ]
786	* [ reg argN ]	766	* [ reg argN ]
787	* [ ... ]	767	* [ ... ]
788	* regs_off [ reg_arg1 ] prog ctx context	768	* regs_off [ reg_arg1 ] prog_ctx
789	* nregs_off [ args count ]	769	* nregs_off [ args count ] ((u64 *)prog_ctx)[-1]
790	* ip_off [ traced function ]	770	* ip_off [ traced function ] ((u64 *)prog_ctx)[-2]
791	* [ ... ]	771	* [ ... ]
792	* run_ctx_off [ bpf_tramp_run_ctx ]	772	* run_ctx_off [ bpf_tramp_run_ctx ]
793	* [ reg argN ]	773	* [ reg argN ]
@@ -843,6 +823,10 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image im, void rw_im · 49 unmodified lines
843	nvr_off = bpf_frame_size;	823	nvr_off = bpf_frame_size;
844	bpf_frame_size += 2 * SZL;	824	bpf_frame_size += 2 * SZL;
845		825
		826	/* Save area for return address */
		827	retaddr_off = bpf_frame_size;
		828	bpf_frame_size += SZL;
		829
846	/* Optional save area for actual LR in case of ool ftrace */	830	/* Optional save area for actual LR in case of ool ftrace */
847	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {	831	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {
848	alt_lr_off = bpf_frame_size;	832	alt_lr_off = bpf_frame_size;
@@ -869,16 +853,8 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image im, void rw_im · 20 unmodified lines
869	/* Padding to align stack frame, if any */	853	/* Padding to align stack frame, if any */
870	bpf_frame_size = round_up(bpf_frame_size, SZL * 2);	854	bpf_frame_size = round_up(bpf_frame_size, SZL * 2);
871		855
872	/* Dummy frame size for proper unwind - includes 64-bytes red zone for 64-bit powerpc */	856	/* Store original return value */
873	bpf_dummy_frame_size = STACK_FRAME_MIN_SIZE + 64;
874
875	/* Offset to the traced function's stack frame */
876	func_frame_offset = bpf_dummy_frame_size + bpf_frame_size;
877
878	/* Create dummy frame for unwind, store original return value */
879	EMIT(PPC_RAW_STL(_R0, _R1, PPC_LR_STKOFF));	857	EMIT(PPC_RAW_STL(_R0, _R1, PPC_LR_STKOFF));
880	/* Protect red zone where tail call count goes */
881	EMIT(PPC_RAW_STLU(_R1, _R1, -bpf_dummy_frame_size));
882		858
883	/* Create our stack frame */	859	/* Create our stack frame */
884	EMIT(PPC_RAW_STLU(_R1, _R1, -bpf_frame_size));	860	EMIT(PPC_RAW_STLU(_R1, _R1, -bpf_frame_size));
@@ -893,34 +869,44 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image im, void rw_im · 8 unmodified lines
893	if (IS_ENABLED(CONFIG_PPC32) && nr_regs < 2)	869	if (IS_ENABLED(CONFIG_PPC32) && nr_regs < 2)
894	EMIT(PPC_RAW_STL(_R4, _R1, r4_off));	870	EMIT(PPC_RAW_STL(_R4, _R1, r4_off));
895		871
896	bpf_trampoline_save_args(image, ctx, func_frame_offset, nr_regs, regs_off);	872	bpf_trampoline_save_args(image, ctx, bpf_frame_size, nr_regs, regs_off);
897		873
898	/* Save our return address */	874	/* Save our LR/return address */
899	EMIT(PPC_RAW_MFLR(_R3));	875	EMIT(PPC_RAW_MFLR(_R3));
900	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))	876	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))
901	EMIT(PPC_RAW_STL(_R3, _R1, alt_lr_off));	877	EMIT(PPC_RAW_STL(_R3, _R1, alt_lr_off));
902	else	878	else
903	EMIT(PPC_RAW_STL(_R3, _R1, bpf_frame_size + PPC_LR_STKOFF));	879	EMIT(PPC_RAW_STL(_R3, _R1, retaddr_off));
904		880
905	/*	881	/*
906	* Save ip address of the traced function.	882	* Derive IP address of the traced function.
907	* We could recover this from LR, but we will need to address for OOL trampoline,	883	* In case of CONFIG_PPC_FTRACE_OUT_OF_LINE or BPF program, LR points to the instruction
908	* and optional GEP area.	884	* after the 'bl' instruction in the OOL stub. Refer to ftrace_init_ool_stub() and
		885	* bpf_arch_text_poke() for OOL stub of kernel functions and bpf programs respectively.
		886	* Relevant stub sequence:
		887	*
		888	* bl <tramp>
		889	* LR (R3) => mtlr r0
		890	* b <func_addr+4>
		891	*
		892	* Recover kernel function/bpf program address from the unconditional
		893	* branch instruction at the end of OOL stub.
909	*/	894	*/
910	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE) \|\| flags & BPF_TRAMP_F_IP_ARG) {	895	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE) \|\| flags & BPF_TRAMP_F_IP_ARG) {
911	EMIT(PPC_RAW_LWZ(_R4, _R3, 4));	896	EMIT(PPC_RAW_LWZ(_R4, _R3, 4));
912	EMIT(PPC_RAW_SLWI(_R4, _R4, 6));	897	EMIT(PPC_RAW_SLWI(_R4, _R4, 6));
913	EMIT(PPC_RAW_SRAWI(_R4, _R4, 6));	898	EMIT(PPC_RAW_SRAWI(_R4, _R4, 6));
914	EMIT(PPC_RAW_ADD(_R3, _R3, _R4));	899	EMIT(PPC_RAW_ADD(_R3, _R3, _R4));
915	EMIT(PPC_RAW_ADDI(_R3, _R3, 4));
916	}	900	}
917		901
918	if (flags & BPF_TRAMP_F_IP_ARG)	902	if (flags & BPF_TRAMP_F_IP_ARG)
919	EMIT(PPC_RAW_STL(_R3, _R1, ip_off));	903	EMIT(PPC_RAW_STL(_R3, _R1, ip_off));
920		904
921	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE))	905	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {
922	/* Fake our LR for unwind */	906	/* Fake our LR for BPF_TRAMP_F_CALL_ORIG case */
923	EMIT(PPC_RAW_STL(_R3, _R1, bpf_frame_size + PPC_LR_STKOFF));	907	EMIT(PPC_RAW_ADDI(_R3, _R3, 4));
		908	EMIT(PPC_RAW_STL(_R3, _R1, retaddr_off));
		909	}
924		910
925	/* Save function arg count -- see bpf_get_func_arg_cnt() */	911	/* Save function arg count -- see bpf_get_func_arg_cnt() */
926	EMIT(PPC_RAW_LI(_R3, nr_regs));	912	EMIT(PPC_RAW_LI(_R3, nr_regs));
@@ -958,20 +944,19 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image im, void rw_im · 31 unmodified lines
958	/* Call the traced function */	944	/* Call the traced function */
959	if (flags & BPF_TRAMP_F_CALL_ORIG) {	945	if (flags & BPF_TRAMP_F_CALL_ORIG) {
960	/*	946	/*
961	* The address in LR save area points to the correct point in the original function	947	* retaddr on trampoline stack points to the correct point in the original function
962	* with both PPC_FTRACE_OUT_OF_LINE as well as with traditional ftrace instruction	948	* with both PPC_FTRACE_OUT_OF_LINE as well as with traditional ftrace instruction
963	* sequence	949	* sequence
964	*/	950	*/
965	EMIT(PPC_RAW_LL(_R3, _R1, bpf_frame_size + PPC_LR_STKOFF));	951	EMIT(PPC_RAW_LL(_R3, _R1, retaddr_off));
966	EMIT(PPC_RAW_MTCTR(_R3));	952	EMIT(PPC_RAW_MTCTR(_R3));
967		953
968	/* Replicate tail_call_cnt before calling the original BPF prog */	954	/* Replicate tail_call_cnt before calling the original BPF prog */
969	if (flags & BPF_TRAMP_F_TAIL_CALL_CTX)	955	if (flags & BPF_TRAMP_F_TAIL_CALL_CTX)
970	bpf_trampoline_setup_tail_call_info(image, ctx, func_frame_offset,	956	bpf_trampoline_setup_tail_call_info(image, ctx, bpf_frame_size, r4_off);
971	bpf_dummy_frame_size, r4_off);
972		957
973	/* Restore args */	958	/* Restore args */
974	bpf_trampoline_restore_args_stack(image, ctx, func_frame_offset, nr_regs, regs_off);	959	bpf_trampoline_restore_args_stack(image, ctx, bpf_frame_size, nr_regs, regs_off);
975		960
976	/* Restore TOC for 64-bit */	961	/* Restore TOC for 64-bit */
977	if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2) && !IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))	962	if (IS_ENABLED(CONFIG_PPC64_ELF_ABI_V2) && !IS_ENABLED(CONFIG_PPC_KERNEL_PCREL))
@@ -985,7 +970,7 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image im, void rw_im · 7 unmodified lines
985		970
986	/* Restore updated tail_call_cnt */	971	/* Restore updated tail_call_cnt */
987	if (flags & BPF_TRAMP_F_TAIL_CALL_CTX)	972	if (flags & BPF_TRAMP_F_TAIL_CALL_CTX)
988	bpf_trampoline_restore_tail_call_cnt(image, ctx, func_frame_offset, r4_off);	973	bpf_trampoline_restore_tail_call_cnt(image, ctx, bpf_frame_size, r4_off);
989		974
990	/* Reserve space to patch branch instruction to skip fexit progs */	975	/* Reserve space to patch branch instruction to skip fexit progs */
991	if (ro_image) /* image is NULL for dummy pass */	976	if (ro_image) /* image is NULL for dummy pass */
@@ -1037,7 +1022,7 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image im, void rw_im · 45 unmodified lines
1037	EMIT(PPC_RAW_LD(_R2, _R1, 24));	1022	EMIT(PPC_RAW_LD(_R2, _R1, 24));
1038	if (flags & BPF_TRAMP_F_SKIP_FRAME) {	1023	if (flags & BPF_TRAMP_F_SKIP_FRAME) {
1039	/* Skip the traced function and return to parent */	1024	/* Skip the traced function and return to parent */
1040	EMIT(PPC_RAW_ADDI(_R1, _R1, func_frame_offset));	1025	EMIT(PPC_RAW_ADDI(_R1, _R1, bpf_frame_size));
1041	EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));	1026	EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));
1042	EMIT(PPC_RAW_MTLR(_R0));	1027	EMIT(PPC_RAW_MTLR(_R0));
1043	EMIT(PPC_RAW_BLR());	1028	EMIT(PPC_RAW_BLR());
@@ -1045,13 +1030,13 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image im, void rw_im · 1 unmodified line
1045	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {	1030	if (IS_ENABLED(CONFIG_PPC_FTRACE_OUT_OF_LINE)) {
1046	EMIT(PPC_RAW_LL(_R0, _R1, alt_lr_off));	1031	EMIT(PPC_RAW_LL(_R0, _R1, alt_lr_off));
1047	EMIT(PPC_RAW_MTLR(_R0));	1032	EMIT(PPC_RAW_MTLR(_R0));
1048	EMIT(PPC_RAW_ADDI(_R1, _R1, func_frame_offset));	1033	EMIT(PPC_RAW_ADDI(_R1, _R1, bpf_frame_size));
1049	EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));	1034	EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));
1050	EMIT(PPC_RAW_BLR());	1035	EMIT(PPC_RAW_BLR());
1051	} else {	1036	} else {
1052	EMIT(PPC_RAW_LL(_R0, _R1, bpf_frame_size + PPC_LR_STKOFF));	1037	EMIT(PPC_RAW_LL(_R0, _R1, retaddr_off));
1053	EMIT(PPC_RAW_MTCTR(_R0));	1038	EMIT(PPC_RAW_MTCTR(_R0));
1054	EMIT(PPC_RAW_ADDI(_R1, _R1, func_frame_offset));	1039	EMIT(PPC_RAW_ADDI(_R1, _R1, bpf_frame_size));
1055	EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));	1040	EMIT(PPC_RAW_LL(_R0, _R1, PPC_LR_STKOFF));
1056	EMIT(PPC_RAW_MTLR(_R0));	1041	EMIT(PPC_RAW_MTLR(_R0));
1057	EMIT(PPC_RAW_BCTR());	1042	EMIT(PPC_RAW_BCTR());

arch/powerpc/net/bpf_jit_comp64.c+143−38

@@ -32,23 +32,27 @@ · 31 unmodified lines
32	*	32	*
33	* [ prev sp ] <-------------	33	* [ prev sp ] <-------------
34	* [ tail_call_info ] 8 \|	34	* [ tail_call_info ] 8 \|
35	* [ nv gpr save area ] 68 + (128) \|	35	* [ nv gpr save area ] (6 * 8) \|
		36	* [ addl. nv gpr save area] (12 * 8) \| <--- exception boundary/callback program
36	* [ local_tmp_var ] 24 \|	37	* [ local_tmp_var ] 24 \|
37	* fp (r31) --> [ ebpf stack space ] upto 512 \|	38	* fp (r31) --> [ ebpf stack space ] upto 512 \|
38	* [ frame header ] 32/112 \|	39	* [ frame header ] 32/112 \|
39	* sp (r1) ---> [ stack pointer ] --------------	40	* sp (r1) ---> [ stack pointer ] --------------
40	*	41	*
41	* Additional (12*8) in 'nv gpr save area' only in case of	42	* Additional (12 * 8) in 'nv gpr save area' only in case of
42	* exception boundary.	43	* exception boundary/callback.
43	*/	44	*/
44		45
		46	/* BPF non-volatile registers save area size */
		47	#define BPF_PPC_STACK_SAVE (6 * 8)
		48
45	/* for bpf JIT code internal usage */	49	/* for bpf JIT code internal usage */
46	#define BPF_PPC_STACK_LOCALS 24	50	#define BPF_PPC_STACK_LOCALS 24
47	/*	51	/*
48	* for additional non volatile registers(r14-r25) to be saved	52	* for additional non volatile registers(r14-r25) to be saved
49	* at exception boundary	53	* at exception boundary
50	*/	54	*/
51	#define BPF_PPC_EXC_STACK_SAVE (12*8)	55	#define BPF_PPC_EXC_STACK_SAVE (12 * 8)
52		56
53	/* stack frame excluding BPF stack, ensure this is quadword aligned */	57	/* stack frame excluding BPF stack, ensure this is quadword aligned */
54	#define BPF_PPC_STACKFRAME (STACK_FRAME_MIN_SIZE + \	58	#define BPF_PPC_STACKFRAME (STACK_FRAME_MIN_SIZE + \
@@ -125,12 +129,13 @@ static inline bool bpf_has_stack_frame(struct codegen_context *ctx) · 70 unmodified lines
125	* [ ... ] \|	129	* [ ... ] \|
126	* sp (r1) ---> [ stack pointer ] --------------	130	* sp (r1) ---> [ stack pointer ] --------------
127	* [ tail_call_info ] 8	131	* [ tail_call_info ] 8
128	* [ nv gpr save area ] 68 + (128)	132	* [ nv gpr save area ] (6 * 8)
		133	* [ addl. nv gpr save area] (12 * 8) <--- exception boundary/callback program
129	* [ local_tmp_var ] 24	134	* [ local_tmp_var ] 24
130	* [ unused red zone ] 224	135	* [ unused red zone ] 224
131	*	136	*
132	* Additional (12*8) in 'nv gpr save area' only in case of	137	* Additional (12 * 8) in 'nv gpr save area' only in case of
133	* exception boundary.	138	* exception boundary/callback.
134	*/	139	*/
135	static int bpf_jit_stack_local(struct codegen_context *ctx)	140	static int bpf_jit_stack_local(struct codegen_context *ctx)
136	{	141	{
@@ -148,7 +153,7 @@ static int bpf_jit_stack_local(struct codegen_context *ctx) · 11 unmodified lines
148	}	153	}
149	}	154	}
150		155
151	int bpf_jit_stack_tailcallinfo_offset(struct codegen_context *ctx)	156	static int bpf_jit_stack_tailcallinfo_offset(struct codegen_context *ctx)
152	{	157	{
153	return bpf_jit_stack_local(ctx) + BPF_PPC_STACK_LOCALS + BPF_PPC_STACK_SAVE;	158	return bpf_jit_stack_local(ctx) + BPF_PPC_STACK_LOCALS + BPF_PPC_STACK_SAVE;
154	}	159	}
@@ -237,10 +242,6 @@ void bpf_jit_build_prologue(u32 image, struct codegen_context ctx) · 82 unmodified lines
237		242
238	if (bpf_has_stack_frame(ctx) && !ctx->exception_cb) {	243	if (bpf_has_stack_frame(ctx) && !ctx->exception_cb) {
239	/*	244	/*
240	* exception_cb uses boundary frame after stack walk.
241	* It can simply use redzone, this optimization reduces
242	* stack walk loop by one level.
243	*
244	* We need a stack frame, but we don't necessarily need to	245	* We need a stack frame, but we don't necessarily need to
245	* save/restore LR unless we call other functions	246	* save/restore LR unless we call other functions
246	*/	247	*/
@@ -284,6 +285,22 @@ void bpf_jit_build_prologue(u32 image, struct codegen_context ctx) · 37 unmodified lines
284	* program(main prog) as third arg	285	* program(main prog) as third arg
285	*/	286	*/
286	EMIT(PPC_RAW_MR(_R1, _R5));	287	EMIT(PPC_RAW_MR(_R1, _R5));
		288	/*
		289	* Exception callback reuses the stack frame of exception boundary.
		290	* But BPF stack depth of exception callback and exception boundary
		291	* don't have to be same. If BPF stack depth is different, adjust the
		292	* stack frame size considering BPF stack depth of exception callback.
		293	* The non-volatile register save area remains unchanged. These non-
		294	* volatile registers are restored in exception callback's epilogue.
		295	*/
		296	EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_1), _R5, 0));
		297	EMIT(PPC_RAW_SUB(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_1), _R1));
		298	EMIT(PPC_RAW_ADDI(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2),
		299	-BPF_PPC_EXC_STACKFRAME));
		300	EMIT(PPC_RAW_CMPLDI(bpf_to_ppc(TMP_REG_2), ctx->stack_size));
		301	PPC_BCC_CONST_SHORT(COND_EQ, 12);
		302	EMIT(PPC_RAW_MR(_R1, bpf_to_ppc(TMP_REG_1)));
		303	EMIT(PPC_RAW_STDU(_R1, _R1, -(BPF_PPC_EXC_STACKFRAME + ctx->stack_size)));
287	}	304	}
288		305
289	/*	306	/*
@@ -482,6 +499,83 @@ int bpf_jit_emit_func_call_rel(u32 image, u32 fimage, struct codegen_context * · 192 unmodified lines
482	return 0;	499	return 0;
483	}	500	}
484		501
		502	static int zero_extend(u32 image, struct codegen_context ctx, u32 src_reg, u32 dst_reg, u32 size)
		503	{
		504	switch (size) {
		505	case 1:
		506	/* zero-extend 8 bits into 64 bits */
		507	EMIT(PPC_RAW_RLDICL(dst_reg, src_reg, 0, 56));
		508	return 0;
		509	case 2:
		510	/* zero-extend 16 bits into 64 bits */
		511	EMIT(PPC_RAW_RLDICL(dst_reg, src_reg, 0, 48));
		512	return 0;
		513	case 4:
		514	/* zero-extend 32 bits into 64 bits */
		515	EMIT(PPC_RAW_RLDICL(dst_reg, src_reg, 0, 32));
		516	fallthrough;
		517	case 8:
		518	/* Nothing to do */
		519	return 0;
		520	default:
		521	return -1;
		522	}
		523	}
		524
		525	static int sign_extend(u32 image, struct codegen_context ctx, u32 src_reg, u32 dst_reg, u32 size)
		526	{
		527	switch (size) {
		528	case 1:
		529	/* sign-extend 8 bits into 64 bits */
		530	EMIT(PPC_RAW_EXTSB(dst_reg, src_reg));
		531	return 0;
		532	case 2:
		533	/* sign-extend 16 bits into 64 bits */
		534	EMIT(PPC_RAW_EXTSH(dst_reg, src_reg));
		535	return 0;
		536	case 4:
		537	/* sign-extend 32 bits into 64 bits */
		538	EMIT(PPC_RAW_EXTSW(dst_reg, src_reg));
		539	fallthrough;
		540	case 8:
		541	/* Nothing to do */
		542	return 0;
		543	default:
		544	return -1;
		545	}
		546	}
		547
		548	/*
		549	* Handle powerpc ABI expectations from caller:
		550	* - Unsigned arguments are zero-extended.
		551	* - Signed arguments are sign-extended.
		552	*/
		553	static int prepare_for_kfunc_call(const struct bpf_prog fp, u32 image,
		554	struct codegen_context *ctx,
		555	const struct bpf_insn *insn)
		556	{
		557	const struct btf_func_model *m = bpf_jit_find_kfunc_model(fp, insn);
		558	int i;
		559
		560	if (!m)
		561	return -1;
		562
		563	for (i = 0; i < m->nr_args; i++) {
		564	/* Note that BPF ABI only allows up to 5 args for kfuncs */
		565	u32 reg = bpf_to_ppc(BPF_REG_1 + i), size = m->arg_size[i];
		566
		567	if (!(m->arg_flags[i] & BTF_FMODEL_SIGNED_ARG)) {
		568	if (zero_extend(image, ctx, reg, reg, size))
		569	return -1;
		570	} else {
		571	if (sign_extend(image, ctx, reg, reg, size))
		572	return -1;
		573	}
		574	}
		575
		576	return 0;
		577	}
		578
485	static int bpf_jit_emit_tail_call(u32 image, struct codegen_context ctx, u32 out)	579	static int bpf_jit_emit_tail_call(u32 image, struct codegen_context ctx, u32 out)
486	{	580	{
487	/*	581	/*
@@ -522,9 +616,30 @@ static int bpf_jit_emit_tail_call(u32 image, struct codegen_context ctx, u32 o · 34 unmodified lines
522		616
523	/*	617	/*
524	* tail_call_info++; <- Actual value of tcc here	618	* tail_call_info++; <- Actual value of tcc here
		619	* Writeback this updated value only if tailcall succeeds.
525	*/	620	*/
526	EMIT(PPC_RAW_ADDI(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1), 1));	621	EMIT(PPC_RAW_ADDI(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1), 1));
527		622
		623	/* prog = array->ptrs[index]; */
		624	EMIT(PPC_RAW_MULI(bpf_to_ppc(TMP_REG_2), b2p_index, 8));
		625	EMIT(PPC_RAW_ADD(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2), b2p_bpf_array));
		626	EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2),
		627	offsetof(struct bpf_array, ptrs)));
		628
		629	/*
		630	* if (prog == NULL)
		631	* goto out;
		632	*/
		633	EMIT(PPC_RAW_CMPLDI(bpf_to_ppc(TMP_REG_2), 0));
		634	PPC_BCC_SHORT(COND_EQ, out);
		635
		636	/* goto (prog->bpf_func + prologue_size); /
		637	EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2),
		638	offsetof(struct bpf_prog, bpf_func)));
		639	EMIT(PPC_RAW_ADDI(bpf_to_ppc(TMP_REG_2), bpf_to_ppc(TMP_REG_2),
		640	FUNCTION_DESCR_SIZE + bpf_tailcall_prologue_size));
		641	EMIT(PPC_RAW_MTCTR(bpf_to_ppc(TMP_REG_2)));
		642
528	/*	643	/*
529	* Before writing updated tail_call_info, distinguish if current frame	644	* Before writing updated tail_call_info, distinguish if current frame
530	* is storing a reference to tail_call_info or actual tcc value in	645	* is storing a reference to tail_call_info or actual tcc value in
@@ -539,24 +654,6 @@ static int bpf_jit_emit_tail_call(u32 image, struct codegen_context ctx, u32 o · 8 unmodified lines
539	/* Writeback updated value to tail_call_info */	654	/* Writeback updated value to tail_call_info */
540	EMIT(PPC_RAW_STD(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_2), 0));	655	EMIT(PPC_RAW_STD(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_2), 0));
541		656
542	/* prog = array->ptrs[index]; */
543	EMIT(PPC_RAW_MULI(bpf_to_ppc(TMP_REG_1), b2p_index, 8));
544	EMIT(PPC_RAW_ADD(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1), b2p_bpf_array));
545	EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1), offsetof(struct bpf_array, ptrs)));
546
547	/*
548	* if (prog == NULL)
549	* goto out;
550	*/
551	EMIT(PPC_RAW_CMPLDI(bpf_to_ppc(TMP_REG_1), 0));
552	PPC_BCC_SHORT(COND_EQ, out);
553
554	/* goto (prog->bpf_func + prologue_size); /
555	EMIT(PPC_RAW_LD(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1), offsetof(struct bpf_prog, bpf_func)));
556	EMIT(PPC_RAW_ADDI(bpf_to_ppc(TMP_REG_1), bpf_to_ppc(TMP_REG_1),
557	FUNCTION_DESCR_SIZE + bpf_tailcall_prologue_size));
558	EMIT(PPC_RAW_MTCTR(bpf_to_ppc(TMP_REG_1)));
559
560	/* tear down stack, restore NVRs, ... */	657	/* tear down stack, restore NVRs, ... */
561	bpf_jit_emit_common_epilogue(image, ctx);	658	bpf_jit_emit_common_epilogue(image, ctx);
562		659
@@ -1123,14 +1220,16 @@ int bpf_jit_build_body(struct bpf_prog fp, u32 image, u32 *fimage, struct code · 560 unmodified lines
1123	/* special mov32 for zext */	1220	/* special mov32 for zext */
1124	EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 0, 31));	1221	EMIT(PPC_RAW_RLWINM(dst_reg, dst_reg, 0, 0, 31));
1125	break;	1222	break;
1126	} else if (off == 8) {	1223	}
1127	EMIT(PPC_RAW_EXTSB(dst_reg, src_reg));	1224	if (off == 0) {
1128	} else if (off == 16) {	1225	/* MOV */
1129	EMIT(PPC_RAW_EXTSH(dst_reg, src_reg));	1226	if (dst_reg != src_reg)
1130	} else if (off == 32) {	1227	EMIT(PPC_RAW_MR(dst_reg, src_reg));
1131	EMIT(PPC_RAW_EXTSW(dst_reg, src_reg));	1228	} else {
1132	} else if (dst_reg != src_reg)	1229	/* MOVSX: dst = (s8,s16,s32)src (off = 8,16,32) */
1133	EMIT(PPC_RAW_MR(dst_reg, src_reg));	1230	if (sign_extend(image, ctx, src_reg, dst_reg, off / 8))
		1231	return -1;
		1232	}
1134	goto bpf_alu32_trunc;	1233	goto bpf_alu32_trunc;
1135	case BPF_ALU \| BPF_MOV \| BPF_K: /* (u32) dst = imm */	1234	case BPF_ALU \| BPF_MOV \| BPF_K: /* (u32) dst = imm */
1136	case BPF_ALU64 \| BPF_MOV \| BPF_K: /* dst = (s64) imm */	1235	case BPF_ALU64 \| BPF_MOV \| BPF_K: /* dst = (s64) imm */
@@ -1598,6 +1697,12 @@ emit_clear: · 461 unmodified lines
1598	if (ret < 0)	1697	if (ret < 0)
1599	return ret;	1698	return ret;
1600		1699
		1700	/* Take care of powerpc ABI requirements before kfunc call */
		1701	if (insn[i].src_reg == BPF_PSEUDO_KFUNC_CALL) {
		1702	if (prepare_for_kfunc_call(fp, image, ctx, &insn[i]))
		1703	return -1;
		1704	}
		1705
1601	ret = bpf_jit_emit_func_call_rel(image, fimage, ctx, func_addr);	1706	ret = bpf_jit_emit_func_call_rel(image, fimage, ctx, func_addr);
1602	if (ret)	1707	if (ret)
1603	return ret;	1708	return ret;

arch/powerpc/perf/callchain.c+5−0

 void
 perf_callchain_user(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs)
 {
+	perf_callchain_store(entry, perf_arch_instruction_pointer(regs));
+	if (!current->mm)
+		return;
 	if (!is_32bit_task())
 		perf_callchain_user_64(entry, regs);
 	else

arch/powerpc/perf/callchain_32.c+0−1

@@ -142,7 +142,6 @@ void perf_callchain_user_32(struct perf_callchain_entry_ctx *entry, · 141 unmodified lines
142	next_ip = perf_arch_instruction_pointer(regs);	142	next_ip = perf_arch_instruction_pointer(regs);
143	lr = regs->link;	143	lr = regs->link;
144	sp = regs->gpr[1];	144	sp = regs->gpr[1];
145	perf_callchain_store(entry, next_ip);
146		145
147	while (entry->nr < entry->max_stack) {	146	while (entry->nr < entry->max_stack) {
148	fp = (unsigned int __user *) (unsigned long) sp;	147	fp = (unsigned int __user *) (unsigned long) sp;

arch/powerpc/perf/callchain_64.c+0−1

@@ -77,7 +77,6 @@ void perf_callchain_user_64(struct perf_callchain_entry_ctx *entry, · 76 unmodified lines
77	next_ip = perf_arch_instruction_pointer(regs);	77	next_ip = perf_arch_instruction_pointer(regs);
78	lr = regs->link;	78	lr = regs->link;
79	sp = regs->gpr[1];	79	sp = regs->gpr[1];
80	perf_callchain_store(entry, next_ip);
81		80
82	while (entry->nr < entry->max_stack) {	81	while (entry->nr < entry->max_stack) {
83	fp = (unsigned long __user *) sp;	82	fp = (unsigned long __user *) sp;

arch/powerpc/platforms/83xx/km83xx.c+2−2

@@ -155,8 +155,8 @@ machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices); · 154 unmodified lines
155		155
156	/* list of the supported boards */	156	/* list of the supported boards */
157	static char *board[] __initdata = {	157	static char *board[] __initdata = {
158	"Keymile,KMETER1",	158	"keymile,KMETER1",
159	"Keymile,kmpbec8321",	159	"keymile,kmpbec8321",
160	NULL	160	NULL
161	};	161	};
162		162

arch/powerpc/platforms/Kconfig.cputype+2−2

@@ -276,7 +276,7 @@ config PPC_BOOK3S · 275 unmodified lines
276	config PPC_E500	276	config PPC_E500
277	select FSL_EMB_PERFMON	277	select FSL_EMB_PERFMON
278	bool	278	bool
279	select ARCH_SUPPORTS_HUGETLBFS if PHYS_64BIT \|\| PPC64	279	select ARCH_SUPPORTS_HUGETLBFS
280	select PPC_SMP_MUXED_IPI	280	select PPC_SMP_MUXED_IPI
281	select PPC_DOORBELL	281	select PPC_DOORBELL
282	select PPC_KUEP	282	select PPC_KUEP
@@ -337,7 +337,7 @@ config BOOKE · 54 unmodified lines
337	config PTE_64BIT	337	config PTE_64BIT
338	bool	338	bool
339	depends on 44x \|\| PPC_E500 \|\| PPC_86xx	339	depends on 44x \|\| PPC_E500 \|\| PPC_86xx
340	default y if PHYS_64BIT	340	default y if PPC_E500 \|\| PHYS_64BIT
341		341
342	config PHYS_64BIT	342	config PHYS_64BIT
343	bool 'Large physical address support' if PPC_E500 \|\| PPC_86xx	343	bool 'Large physical address support' if PPC_E500 \|\| PPC_86xx

arch/powerpc/platforms/pseries/msi.c+1−1

@@ -605,7 +605,7 @@ static int pseries_irq_domain_alloc(struct irq_domain *domain, unsigned int virq · 604 unmodified lines
605	&pseries_msi_irq_chip, pseries_dev);	605	&pseries_msi_irq_chip, pseries_dev);
606	}	606	}
607		607
608	pseries_dev->msi_used++;	608	pseries_dev->msi_used += nr_irqs;
609	return 0;	609	return 0;
610		610
611	out:	611	out:

arch/powerpc/tools/check-fpatchable-function-entry.shrenamed from arch/powerpc/tools/gcc-check-fpatchable-function-entry.sh+0−0

File renamed without changes.

arch/powerpc/tools/ftrace-gen-ool-stubs.sh+2−2

@@ -15,9 +15,9 @@ if [ -z "$is_64bit" ]; then · 14 unmodified lines
15	RELOCATION=R_PPC_ADDR32	15	RELOCATION=R_PPC_ADDR32
16	fi	16	fi
17		17
18	num_ool_stubs_total=$($objdump -r -j __patchable_function_entries "$vmlinux_o" \|	18	num_ool_stubs_total=$($objdump -r -j __patchable_function_entries -d "$vmlinux_o" \|
19	grep -c "$RELOCATION")	19	grep -c "$RELOCATION")
20	num_ool_stubs_inittext=$($objdump -r -j __patchable_function_entries "$vmlinux_o" \|	20	num_ool_stubs_inittext=$($objdump -r -j __patchable_function_entries -d "$vmlinux_o" \|
21	grep -e ".init.text" -e ".text.startup" \| grep -c "$RELOCATION")	21	grep -e ".init.text" -e ".text.startup" \| grep -c "$RELOCATION")
22	num_ool_stubs_text=$((num_ool_stubs_total - num_ool_stubs_inittext))	22	num_ool_stubs_text=$((num_ool_stubs_total - num_ool_stubs_inittext))
23		23

arch/riscv/kernel/vmlinux.lds.S+1−0

@@ -170,6 +170,7 @@ SECTIONS · 169 unmodified lines
170		170
171	STABS_DEBUG	171	STABS_DEBUG
172	DWARF_DEBUG	172	DWARF_DEBUG
		173	MODINFO
173	ELF_DETAILS	174	ELF_DETAILS
174	.riscv.attributes 0 : { *(.riscv.attributes) }	175	.riscv.attributes 0 : { *(.riscv.attributes) }
175		176

arch/riscv/kvm/Kconfig+0−1

@@ -30,7 +30,6 @@ config KVM · 29 unmodified lines
30	select KVM_GENERIC_HARDWARE_ENABLING	30	select KVM_GENERIC_HARDWARE_ENABLING
31	select KVM_MMIO	31	select KVM_MMIO
32	select VIRT_XFER_TO_GUEST_WORK	32	select VIRT_XFER_TO_GUEST_WORK
33	select KVM_GENERIC_MMU_NOTIFIER
34	select SCHED_INFO	33	select SCHED_INFO
35	select GUEST_PERF_EVENTS if PERF_EVENTS	34	select GUEST_PERF_EVENTS if PERF_EVENTS
36	help	35	help

arch/riscv/kvm/aia.c+13−2

 #include <linux/irqchip/riscv-imsic.h>
 #include <linux/irqdomain.h>
 #include <linux/kvm_host.h>
+#include <linux/nospec.h>
 #include <linux/percpu.h>
 #include <linux/spinlock.h>
 #include <asm/cpufeature.h>
 			       unsigned long *out_val)
 {
 	struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr;
+	unsigned long regs_max = sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long);
-	if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long))
+	if (!riscv_isa_extension_available(vcpu->arch.isa, SSAIA))
 		return -ENOENT;
+	if (reg_num >= regs_max)
+		return -ENOENT;
+	reg_num = array_index_nospec(reg_num, regs_max);
 	*out_val = 0;
 	if (kvm_riscv_aia_available())
 			       unsigned long val)
 {
 	struct kvm_vcpu_aia_csr *csr = &vcpu->arch.aia_context.guest_csr;
+	unsigned long regs_max = sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long);
-	if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long))
+	if (!riscv_isa_extension_available(vcpu->arch.isa, SSAIA))
 		return -ENOENT;
+	if (reg_num >= regs_max)
+		return -ENOENT;
+	reg_num = array_index_nospec(reg_num, regs_max);
 	if (kvm_riscv_aia_available()) {
 		((unsigned long *)csr)[reg_num] = val;

arch/riscv/kvm/aia_aplic.c+12−11

 #include <linux/irqchip/riscv-aplic.h>
 #include <linux/kvm_host.h>
 #include <linux/math.h>
+#include <linux/nospec.h>
 #include <linux/spinlock.h>
 #include <linux/swab.h>
 #include <kvm/iodev.h>
 	if (!irq || aplic->nr_irqs <= irq)
 		return 0;
-	irqd = &aplic->irqs[irq];
+	irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 	raw_spin_lock_irqsave(&irqd->lock, flags);
 	ret = irqd->sourcecfg;
 	if (!irq || aplic->nr_irqs <= irq)
 		return;
-	irqd = &aplic->irqs[irq];
+	irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 	if (val & APLIC_SOURCECFG_D)
 		val = 0;
 	if (!irq || aplic->nr_irqs <= irq)
 		return 0;
-	irqd = &aplic->irqs[irq];
+	irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 	raw_spin_lock_irqsave(&irqd->lock, flags);
 	ret = irqd->target;
 	if (!irq || aplic->nr_irqs <= irq)
 		return;
-	irqd = &aplic->irqs[irq];
+	irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 	val &= APLIC_TARGET_EIID_MASK |
 	       (APLIC_TARGET_HART_IDX_MASK << APLIC_TARGET_HART_IDX_SHIFT) |
 	if (!irq || aplic->nr_irqs <= irq)
 		return false;
-	irqd = &aplic->irqs[irq];
+	irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 	raw_spin_lock_irqsave(&irqd->lock, flags);
 	ret = (irqd->state & APLIC_IRQ_STATE_PENDING) ? true : false;
 	if (!irq || aplic->nr_irqs <= irq)
 		return;
-	irqd = &aplic->irqs[irq];
+	irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 	raw_spin_lock_irqsave(&irqd->lock, flags);
 	if (!irq || aplic->nr_irqs <= irq)
 		return false;
-	irqd = &aplic->irqs[irq];
+	irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 	raw_spin_lock_irqsave(&irqd->lock, flags);
 	ret = (irqd->state & APLIC_IRQ_STATE_ENABLED) ? true : false;
 	if (!irq || aplic->nr_irqs <= irq)
 		return;
-	irqd = &aplic->irqs[irq];
+	irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 	raw_spin_lock_irqsave(&irqd->lock, flags);
 	if (enabled)
 	if (!irq || aplic->nr_irqs <= irq)
 		return false;
-	irqd = &aplic->irqs[irq];
+	irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 	raw_spin_lock_irqsave(&irqd->lock, flags);
 	for (irq = first; irq <= last; irq++) {
 		if (!irq || aplic->nr_irqs <= irq)
 			continue;
-		irqd = &aplic->irqs[irq];
+		irqd = &aplic->irqs[array_index_nospec(irq, aplic->nr_irqs)];
 		raw_spin_lock_irqsave(&irqd->lock, flags);
 	if (!aplic || !source || (aplic->nr_irqs <= source))
 		return -ENODEV;
-	irqd = &aplic->irqs[source];
+	irqd = &aplic->irqs[array_index_nospec(source, aplic->nr_irqs)];
 	ie = (aplic->domaincfg & APLIC_DOMAINCFG_IE) ? true : false;
 	raw_spin_lock_irqsave(&irqd->lock, flags);

arch/riscv/kvm/aia_device.c+14−4

 #include <linux/irqchip/riscv-imsic.h>
 #include <linux/kvm_host.h>
 #include <linux/uaccess.h>
+#include <linux/cpufeature.h>
 static int aia_create(struct kvm_device *dev, u32 type)
 {
 	if (irqchip_in_kernel(kvm))
 		return -EEXIST;
+	if (!riscv_isa_extension_available(NULL, SSAIA))
+		return -ENODEV;
 	ret = -EBUSY;
 	if (kvm_trylock_all_vcpus(kvm))
 		return ret;
 static int aia_has_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
 {
-	int nr_vcpus;
+	int nr_vcpus, r = -ENXIO;
 	switch (attr->group) {
 	case KVM_DEV_RISCV_AIA_GRP_CONFIG:
 		}
 		break;
 	case KVM_DEV_RISCV_AIA_GRP_APLIC:
-		return kvm_riscv_aia_aplic_has_attr(dev->kvm, attr->attr);
+		mutex_lock(&dev->kvm->lock);
+		r = kvm_riscv_aia_aplic_has_attr(dev->kvm, attr->attr);
+		mutex_unlock(&dev->kvm->lock);
+		break;
 	case KVM_DEV_RISCV_AIA_GRP_IMSIC:
-		return kvm_riscv_aia_imsic_has_attr(dev->kvm, attr->attr);
+		mutex_lock(&dev->kvm->lock);
+		r = kvm_riscv_aia_imsic_has_attr(dev->kvm, attr->attr);
+		mutex_unlock(&dev->kvm->lock);
+		break;
 	}
-	return -ENXIO;
+	return r;
 }
 struct kvm_device_ops kvm_riscv_aia_device_ops = {

arch/riscv/kvm/aia_imsic.c+4−0

 	int r, rc = KVM_INSN_CONTINUE_NEXT_SEPC;
 	struct imsic *imsic = vcpu->arch.aia_context.imsic_state;
+	/* If IMSIC vCPU state not initialized then forward to user space */
+	if (!imsic)
+		return KVM_INSN_EXIT_TO_USER_SPACE;
 	if (isel == KVM_RISCV_AIA_IMSIC_TOPEI) {
 		/* Read pending and enabled interrupt with highest priority */
 		topei = imsic_mrif_topei(imsic->swfile, imsic->nr_eix,

arch/riscv/kvm/mmu.c+5−1

 bool kvm_unmap_gfn_range(struct kvm *kvm, struct kvm_gfn_range *range)
 {
 	struct kvm_gstage gstage;
+	bool mmu_locked;
 	if (!kvm->arch.pgd)
 		return false;
 	gstage.flags = 0;
 	gstage.vmid = READ_ONCE(kvm->arch.vmid.vmid);
 	gstage.pgd = kvm->arch.pgd;
+	mmu_locked = spin_trylock(&kvm->mmu_lock);
 	kvm_riscv_gstage_unmap_range(&gstage, range->start << PAGE_SHIFT,
 				     (range->end - range->start) << PAGE_SHIFT,
 				     range->may_block);
+	if (mmu_locked)
+		spin_unlock(&kvm->mmu_lock);
 	return false;
 }
 		goto out_unlock;
 	/* Check if we are backed by a THP and thus use block mapping if possible */
-	if (vma_pagesize == PAGE_SIZE)
+	if (!logging && (vma_pagesize == PAGE_SIZE))
 		vma_pagesize = transparent_hugepage_adjust(kvm, memslot, hva, &hfn, &gpa);
 	if (writable) {

arch/riscv/kvm/vcpu.c+1−1

@@ -24,7 +24,7 @@ · 23 unmodified lines
24	#define CREATE_TRACE_POINTS	24	#define CREATE_TRACE_POINTS
25	#include "trace.h"	25	#include "trace.h"
26		26
27	const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {	27	const struct kvm_stats_desc kvm_vcpu_stats_desc[] = {
28	KVM_GENERIC_VCPU_STATS(),	28	KVM_GENERIC_VCPU_STATS(),
29	STATS_DESC_COUNTER(VCPU, ecall_exit_stat),	29	STATS_DESC_COUNTER(VCPU, ecall_exit_stat),
30	STATS_DESC_COUNTER(VCPU, wfi_exit_stat),	30	STATS_DESC_COUNTER(VCPU, wfi_exit_stat),

arch/riscv/kvm/vcpu_fp.c+13−4

 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/kvm_host.h>
+#include <linux/nospec.h>
 #include <linux/uaccess.h>
 #include <asm/cpufeature.h>
 		if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr))
 			reg_val = &cntx->fp.f.fcsr;
 		else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) &&
-			  reg_num <= KVM_REG_RISCV_FP_F_REG(f[31]))
+			  reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) {
+			reg_num = array_index_nospec(reg_num,
+					ARRAY_SIZE(cntx->fp.f.f));
 			reg_val = &cntx->fp.f.f[reg_num];
-		else
+		} else
 			return -ENOENT;
 	} else if ((rtype == KVM_REG_RISCV_FP_D) &&
 		   riscv_isa_extension_available(vcpu->arch.isa, d)) {
 			   reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) {
 			if (KVM_REG_SIZE(reg->id) != sizeof(u64))
 				return -EINVAL;
+			reg_num = array_index_nospec(reg_num,
+					ARRAY_SIZE(cntx->fp.d.f));
 			reg_val = &cntx->fp.d.f[reg_num];
 		} else
 			return -ENOENT;
 		if (reg_num == KVM_REG_RISCV_FP_F_REG(fcsr))
 			reg_val = &cntx->fp.f.fcsr;
 		else if ((KVM_REG_RISCV_FP_F_REG(f[0]) <= reg_num) &&
-			  reg_num <= KVM_REG_RISCV_FP_F_REG(f[31]))
+			  reg_num <= KVM_REG_RISCV_FP_F_REG(f[31])) {
+			reg_num = array_index_nospec(reg_num,
+					ARRAY_SIZE(cntx->fp.f.f));
 			reg_val = &cntx->fp.f.f[reg_num];
-		else
+		} else
 			return -ENOENT;
 	} else if ((rtype == KVM_REG_RISCV_FP_D) &&
 		   riscv_isa_extension_available(vcpu->arch.isa, d)) {
 			   reg_num <= KVM_REG_RISCV_FP_D_REG(f[31])) {
 			if (KVM_REG_SIZE(reg->id) != sizeof(u64))
 				return -EINVAL;
+			reg_num = array_index_nospec(reg_num,
+					ARRAY_SIZE(cntx->fp.d.f));
 			reg_val = &cntx->fp.d.f[reg_num];
 		} else
 			return -ENOENT;

arch/riscv/kvm/vcpu_onereg.c+36−18

 #include <linux/bitops.h>
 #include <linux/errno.h>
 #include <linux/err.h>
+#include <linux/nospec.h>
 #include <linux/uaccess.h>
 #include <linux/kvm_host.h>
 #include <asm/cacheflush.h>
 	    kvm_ext >= ARRAY_SIZE(kvm_isa_ext_arr))
 		return -ENOENT;
+	kvm_ext = array_index_nospec(kvm_ext, ARRAY_SIZE(kvm_isa_ext_arr));
 	*guest_ext = kvm_isa_ext_arr[kvm_ext];
 	switch (*guest_ext) {
 	case RISCV_ISA_EXT_SMNPM:
 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
 					    KVM_REG_SIZE_MASK |
 					    KVM_REG_RISCV_CORE);
+	unsigned long regs_max = sizeof(struct kvm_riscv_core) / sizeof(unsigned long);
 	unsigned long reg_val;
 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))
 		return -EINVAL;
-	if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long))
+	if (reg_num >= regs_max)
 		return -ENOENT;
+	reg_num = array_index_nospec(reg_num, regs_max);
 	if (reg_num == KVM_REG_RISCV_CORE_REG(regs.pc))
 		reg_val = cntx->sepc;
 	else if (KVM_REG_RISCV_CORE_REG(regs.pc) < reg_num &&
 	unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK |
 					    KVM_REG_SIZE_MASK |
 					    KVM_REG_RISCV_CORE);
+	unsigned long regs_max = sizeof(struct kvm_riscv_core) / sizeof(unsigned long);
 	unsigned long reg_val;
 	if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long))
 		return -EINVAL;
-	if (reg_num >= sizeof(struct kvm_riscv_core) / sizeof(unsigned long))
+	if (reg_num >= regs_max)
 		return -ENOENT;
+	reg_num = array_index_nospec(reg_num, regs_max);
 	if (copy_from_user(&reg_val, uaddr, KVM_REG_SIZE(reg->id)))
 		return -EFAULT;
 					  unsigned long *out_val)
 {
 	struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
+	unsigned long regs_max = sizeof(struct kvm_riscv_csr) / sizeof(unsigned long);
-	if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long))
+	if (reg_num >= regs_max)
 		return -ENOENT;
+	reg_num = array_index_nospec(reg_num, regs_max);
 	if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) {
 		kvm_riscv_vcpu_flush_interrupts(vcpu);
 		*out_val = (csr->hvip >> VSIP_TO_HVIP_SHIFT) & VSIP_VALID_MASK;
 					  unsigned long reg_val)
 {
 	struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
+	unsigned long regs_max = sizeof(struct kvm_riscv_csr) / sizeof(unsigned long);
-	if (reg_num >= sizeof(struct kvm_riscv_csr) / sizeof(unsigned long))
+	if (reg_num >= regs_max)
 		return -ENOENT;
+	reg_num = array_index_nospec(reg_num, regs_max);
 	if (reg_num == KVM_REG_RISCV_CSR_REG(sip)) {
 		reg_val &= VSIP_VALID_MASK;
 		reg_val <<= VSIP_TO_HVIP_SHIFT;
 						   unsigned long reg_val)
 {
 	struct kvm_vcpu_smstateen_csr *csr = &vcpu->arch.smstateen_csr;
+	unsigned long regs_max = sizeof(struct kvm_riscv_smstateen_csr) /
+		sizeof(unsigned long);
-	if (reg_num >= sizeof(struct kvm_riscv_smstateen_csr) /
+	if (!riscv_isa_extension_available(vcpu->arch.isa, SMSTATEEN))
-		sizeof(unsigned long))
+		return -ENOENT;
-		return -EINVAL;
+	if (reg_num >= regs_max)
+		return -ENOENT;
+	reg_num = array_index_nospec(reg_num, regs_max);
 	((unsigned long *)csr)[reg_num] = reg_val;
 	return 0;
 					    unsigned long *out_val)
 {
 	struct kvm_vcpu_smstateen_csr *csr = &vcpu->arch.smstateen_csr;
+	unsigned long regs_max = sizeof(struct kvm_riscv_smstateen_csr) /
+		sizeof(unsigned long);
-	if (reg_num >= sizeof(struct kvm_riscv_smstateen_csr) /
+	if (!riscv_isa_extension_available(vcpu->arch.isa, SMSTATEEN))
-		sizeof(unsigned long))
+		return -ENOENT;
-		return -EINVAL;
+	if (reg_num >= regs_max)
+		return -ENOENT;
+	reg_num = array_index_nospec(reg_num, regs_max);
 	*out_val = ((unsigned long *)csr)[reg_num];
 	return 0;
 		rc = kvm_riscv_vcpu_aia_get_csr(vcpu, reg_num, &reg_val);
 		break;
 	case KVM_REG_RISCV_CSR_SMSTATEEN:
-		rc = -EINVAL;
+		rc = kvm_riscv_vcpu_smstateen_get_csr(vcpu, reg_num, &reg_val);
-		if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN))
-			rc = kvm_riscv_vcpu_smstateen_get_csr(vcpu, reg_num,
-							      &reg_val);
 		break;
 	default:
 		rc = -ENOENT;
 		rc = kvm_riscv_vcpu_aia_set_csr(vcpu, reg_num, reg_val);
 		break;
 	case KVM_REG_RISCV_CSR_SMSTATEEN:
-		rc = -EINVAL;
+		rc = kvm_riscv_vcpu_smstateen_set_csr(vcpu, reg_num, reg_val);
-		if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SMSTATEEN))
-			rc = kvm_riscv_vcpu_smstateen_set_csr(vcpu, reg_num,
-							      reg_val);
 		break;
 	default:
 		rc = -ENOENT;

arch/riscv/kvm/vcpu_pmu.c+12−4

 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/kvm_host.h>
+#include <linux/nospec.h>
 #include <linux/perf/riscv_pmu.h>
 #include <asm/csr.h>
 #include <asm/kvm_vcpu_sbi.h>
 static u64 kvm_pmu_get_perf_event_hw_config(u32 sbi_event_code)
 {
-	return hw_event_perf_map[sbi_event_code];
+	return hw_event_perf_map[array_index_nospec(sbi_event_code,
+						    SBI_PMU_HW_GENERAL_MAX)];
 }
 static u64 kvm_pmu_get_perf_event_cache_config(u32 sbi_event_code)
 		return -EINVAL;
 	}
+	cidx = array_index_nospec(cidx, RISCV_KVM_MAX_COUNTERS);
 	pmc = &kvpmu->pmc[cidx];
 	if (pmc->cinfo.type != SBI_PMU_CTR_TYPE_FW)
 		return -EINVAL;
 	}
+	cidx = array_index_nospec(cidx, RISCV_KVM_MAX_COUNTERS);
 	pmc = &kvpmu->pmc[cidx];
 	if (pmc->cinfo.type == SBI_PMU_CTR_TYPE_FW) {
 {
 	struct kvm_pmu *kvpmu = vcpu_to_pmu(vcpu);
-	if (cidx > RISCV_KVM_MAX_COUNTERS || cidx == 1) {
+	if (cidx >= RISCV_KVM_MAX_COUNTERS || cidx == 1) {
 		retdata->err_val = SBI_ERR_INVALID_PARAM;
 		return 0;
 	}
+	cidx = array_index_nospec(cidx, RISCV_KVM_MAX_COUNTERS);
 	retdata->out_val = kvpmu->pmc[cidx].cinfo.value;
 	return 0;
 	}
 	/* Start the counters that have been configured and requested by the guest */
 	for_each_set_bit(i, &ctr_mask, RISCV_MAX_COUNTERS) {
-		pmc_index = i + ctr_base;
+		pmc_index = array_index_nospec(i + ctr_base,
+					       RISCV_KVM_MAX_COUNTERS);
 		if (!test_bit(pmc_index, kvpmu->pmc_in_use))
 			continue;
 		/* The guest started the counter again. Reset the overflow status */
 	/* Stop the counters that have been configured and requested by the guest */
 	for_each_set_bit(i, &ctr_mask, RISCV_MAX_COUNTERS) {
-		pmc_index = i + ctr_base;
+		pmc_index = array_index_nospec(i + ctr_base,
+					       RISCV_KVM_MAX_COUNTERS);
 		if (!test_bit(pmc_index, kvpmu->pmc_in_use))
 			continue;
 		pmc = &kvpmu->pmc[pmc_index];
 		}
 	}
+	ctr_idx = array_index_nospec(ctr_idx, RISCV_KVM_MAX_COUNTERS);
 	pmc = &kvpmu->pmc[ctr_idx];
 	pmc->idx = ctr_idx;

arch/riscv/kvm/vm.c+1−2

 #include <linux/kvm_host.h>
 #include <asm/kvm_mmu.h>
-const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
+const struct kvm_stats_desc kvm_vm_stats_desc[] = {
 	KVM_GENERIC_VM_STATS()
 };
 static_assert(ARRAY_SIZE(kvm_vm_stats_desc) ==
 		break;
 	case KVM_CAP_IOEVENTFD:
 	case KVM_CAP_USER_MEMORY:
-	case KVM_CAP_SYNC_MMU:
 	case KVM_CAP_DESTROY_MEMORY_REGION_WORKS:
 	case KVM_CAP_ONE_REG:
 	case KVM_CAP_READONLY_MEM:

arch/s390/include/asm/idle.h+2−2

@@ -19,9 +19,9 @@ struct s390_idle_data { · 18 unmodified lines
19	unsigned long mt_cycles_enter[8];	19	unsigned long mt_cycles_enter[8];
20	};	20	};
21		21
		22	DECLARE_PER_CPU(struct s390_idle_data, s390_idle);
		23
22	extern struct device_attribute dev_attr_idle_count;	24	extern struct device_attribute dev_attr_idle_count;
23	extern struct device_attribute dev_attr_idle_time_us;	25	extern struct device_attribute dev_attr_idle_time_us;
24		26
25	void psw_idle(struct s390_idle_data *data, unsigned long psw_mask);
26
27	#endif /* _S390_IDLE_H */	27	#endif /* _S390_IDLE_H */

arch/s390/include/asm/processor.h+1−1

@@ -159,7 +159,7 @@ static __always_inline void __stackleak_poison(unsigned long erase_low, · 158 unmodified lines
159	" j 4f\n"	159	" j 4f\n"
160	"3: mvc 8(1,%[addr]),0(%[addr])\n"	160	"3: mvc 8(1,%[addr]),0(%[addr])\n"
161	"4:"	161	"4:"
162	: [addr] "+&a" (erase_low), [count] "+&d" (count), [tmp] "=&a" (tmp)	162	: [addr] "+&a" (erase_low), [count] "+&a" (count), [tmp] "=&a" (tmp)
163	: [poison] "d" (poison)	163	: [poison] "d" (poison)
164	: "memory", "cc"	164	: "memory", "cc"
165	);	165	);

arch/s390/include/asm/vtime.h+34−0

@@ -2,6 +2,12 @@ · 1 unmodified line
2	#ifndef _S390_VTIME_H	2	#ifndef _S390_VTIME_H
3	#define _S390_VTIME_H	3	#define _S390_VTIME_H
4		4
		5	#include <asm/lowcore.h>
		6	#include <asm/cpu_mf.h>
		7	#include <asm/idle.h>
		8
		9	DECLARE_PER_CPU(u64, mt_cycles[8]);
		10
5	static inline void update_timer_sys(void)	11	static inline void update_timer_sys(void)
6	{	12	{
7	struct lowcore *lc = get_lowcore();	13	struct lowcore *lc = get_lowcore();
@@ -20,4 +26,32 @@ static inline void update_timer_mcck(void) · 12 unmodified lines
20	lc->last_update_timer = lc->mcck_enter_timer;	26	lc->last_update_timer = lc->mcck_enter_timer;
21	}	27	}
22		28
		29	static inline void update_timer_idle(void)
		30	{
		31	struct s390_idle_data *idle = this_cpu_ptr(&s390_idle);
		32	struct lowcore *lc = get_lowcore();
		33	u64 cycles_new[8];
		34	int i, mtid;
		35
		36	mtid = smp_cpu_mtid;
		37	if (mtid) {
		38	stcctm(MT_DIAG, mtid, cycles_new);
		39	for (i = 0; i < mtid; i++)
		40	__this_cpu_add(mt_cycles[i], cycles_new[i] - idle->mt_cycles_enter[i]);
		41	}
		42	/*
		43	* This is a bit subtle: Forward last_update_clock so it excludes idle
		44	* time. For correct steal time calculation in do_account_vtime() add
		45	* passed wall time before idle_enter to steal_timer:
		46	* During the passed wall time before idle_enter CPU time may have
		47	* been accounted to system, hardirq, softirq, etc. lowcore fields.
		48	* The accounted CPU times will be subtracted again from steal_timer
		49	* when accumulated steal time is calculated in do_account_vtime().
		50	*/
		51	lc->steal_timer += idle->clock_idle_enter - lc->last_update_clock;
		52	lc->last_update_clock = lc->int_clock;
		53	lc->system_timer += lc->last_update_timer - idle->timer_idle_enter;
		54	lc->last_update_timer = lc->sys_enter_timer;
		55	}
		56
23	#endif /* _S390_VTIME_H */	57	#endif /* _S390_VTIME_H */

arch/s390/kernel/entry.h+0−2

@@ -56,8 +56,6 @@ long sys_s390_pci_mmio_write(unsigned long, const void __user *, size_t); · 55 unmodified lines
56	long sys_s390_pci_mmio_read(unsigned long, void __user *, size_t);	56	long sys_s390_pci_mmio_read(unsigned long, void __user *, size_t);
57	long sys_s390_sthyi(unsigned long function_code, void __user buffer, u64 __user return_code, unsigned long flags);	57	long sys_s390_sthyi(unsigned long function_code, void __user buffer, u64 __user return_code, unsigned long flags);
58		58
59	DECLARE_PER_CPU(u64, mt_cycles[8]);
60
61	unsigned long stack_alloc(void);	59	unsigned long stack_alloc(void);
62	void stack_free(unsigned long stack);	60	void stack_free(unsigned long stack);
63		61

arch/s390/kernel/idle.c+5−20

 #include <trace/events/power.h>
 #include <asm/cpu_mf.h>
 #include <asm/cputime.h>
+#include <asm/idle.h>
 #include <asm/nmi.h>
 #include <asm/smp.h>
-#include "entry.h"
-static DEFINE_PER_CPU(struct s390_idle_data, s390_idle);
+DEFINE_PER_CPU(struct s390_idle_data, s390_idle);
 void account_idle_time_irq(void)
 {
 	struct s390_idle_data *idle = this_cpu_ptr(&s390_idle);
-	struct lowcore *lc = get_lowcore();
 	unsigned long idle_time;
-	u64 cycles_new[8];
-	int i;
-	if (smp_cpu_mtid) {
+	idle_time = get_lowcore()->int_clock - idle->clock_idle_enter;
-		stcctm(MT_DIAG, smp_cpu_mtid, cycles_new);
-		for (i = 0; i < smp_cpu_mtid; i++)
-			this_cpu_add(mt_cycles[i], cycles_new[i] - idle->mt_cycles_enter[i]);
-	}
-	idle_time = lc->int_clock - idle->clock_idle_enter;
-	lc->steal_timer += idle->clock_idle_enter - lc->last_update_clock;
-	lc->last_update_clock = lc->int_clock;
-	lc->system_timer += lc->last_update_timer - idle->timer_idle_enter;
-	lc->last_update_timer = lc->sys_enter_timer;
 	/* Account time spent with enabled wait psw loaded as idle time. */
-	WRITE_ONCE(idle->idle_time, READ_ONCE(idle->idle_time) + idle_time);
+	__atomic64_add(idle_time, &idle->idle_time);
-	WRITE_ONCE(idle->idle_count, READ_ONCE(idle->idle_count) + 1);
+	__atomic64_add_const(1, &idle->idle_count);
 	account_idle_time(cputime_to_nsecs(idle_time));
 }

arch/s390/kernel/ipl.c+1−1

@@ -2377,7 +2377,7 @@ void __init setup_ipl(void) · 2376 unmodified lines
2377	atomic_notifier_chain_register(&panic_notifier_list, &on_panic_nb);	2377	atomic_notifier_chain_register(&panic_notifier_list, &on_panic_nb);
2378	}	2378	}
2379		2379
2380	void s390_reset_system(void)	2380	void __no_stack_protector s390_reset_system(void)
2381	{	2381	{
2382	/* Disable prefixing */	2382	/* Disable prefixing */
2383	set_prefix(0);	2383	set_prefix(0);

arch/s390/kernel/irq.c+8−2

 	struct pt_regs *old_regs = set_irq_regs(regs);
 	bool from_idle;
+	from_idle = test_and_clear_cpu_flag(CIF_ENABLED_WAIT);
+	if (from_idle)
+		update_timer_idle();
 	irq_enter_rcu();
 	if (user_mode(regs)) {
 			current->thread.last_break = regs->last_break;
 	}
-	from_idle = test_and_clear_cpu_flag(CIF_ENABLED_WAIT);
 	if (from_idle)
 		account_idle_time_irq();
 	struct pt_regs *old_regs = set_irq_regs(regs);
 	bool from_idle;
+	from_idle = test_and_clear_cpu_flag(CIF_ENABLED_WAIT);
+	if (from_idle)
+		update_timer_idle();
 	irq_enter_rcu();
 	if (user_mode(regs)) {
 	regs->int_parm = get_lowcore()->ext_params;
 	regs->int_parm_long = get_lowcore()->ext_params2;
-	from_idle = test_and_clear_cpu_flag(CIF_ENABLED_WAIT);
 	if (from_idle)
 		account_idle_time_irq();

arch/s390/kernel/vmlinux.lds.S+1−0

@@ -221,6 +221,7 @@ SECTIONS · 220 unmodified lines
221	/* Debugging sections. */	221	/* Debugging sections. */
222	STABS_DEBUG	222	STABS_DEBUG
223	DWARF_DEBUG	223	DWARF_DEBUG
		224	MODINFO
224	ELF_DETAILS	225	ELF_DETAILS
225		226
226	/*	227	/*

arch/s390/kernel/vtime.c+10−32

 static inline int virt_timer_forward(u64 elapsed)
 {
-	BUG_ON(!irqs_disabled());
+	lockdep_assert_irqs_disabled();
 	if (list_empty(&virt_timer_list))
 		return 0;
 	elapsed = atomic64_add_return(elapsed, &virt_timer_elapsed);
 		lc->system_timer += timer;
 	/* Update MT utilization calculation */
-	if (smp_cpu_mtid &&
+	if (smp_cpu_mtid && time_after64(jiffies_64, __this_cpu_read(mt_scaling_jiffies)))
-	    time_after64(jiffies_64, this_cpu_read(mt_scaling_jiffies)))
 		update_mt_scaling();
 	/* Calculate cputime delta */
-	user = update_tsk_timer(&tsk->thread.user_timer,
+	user = update_tsk_timer(&tsk->thread.user_timer, lc->user_timer);
-				READ_ONCE(lc->user_timer));
+	guest = update_tsk_timer(&tsk->thread.guest_timer, lc->guest_timer);
-	guest = update_tsk_timer(&tsk->thread.guest_timer,
+	system = update_tsk_timer(&tsk->thread.system_timer, lc->system_timer);
-				 READ_ONCE(lc->guest_timer));
+	hardirq = update_tsk_timer(&tsk->thread.hardirq_timer, lc->hardirq_timer);
-	system = update_tsk_timer(&tsk->thread.system_timer,
+	softirq = update_tsk_timer(&tsk->thread.softirq_timer, lc->softirq_timer);
-				  READ_ONCE(lc->system_timer));
+	lc->steal_timer += clock - user - guest - system - hardirq - softirq;
-	hardirq = update_tsk_timer(&tsk->thread.hardirq_timer,
-				   READ_ONCE(lc->hardirq_timer));
-	softirq = update_tsk_timer(&tsk->thread.softirq_timer,
-				   READ_ONCE(lc->softirq_timer));
-	lc->steal_timer +=
-		clock - user - guest - system - hardirq - softirq;
 	/* Push account value */
 	if (user) {
 	return timer - lc->last_update_timer;
 }
-/*
- * Update process times based on virtual cpu times stored by entry.S
- * to the lowcore fields user_timer, system_timer & steal_clock.
- */
 void vtime_account_kernel(struct task_struct *tsk)
 {
 	struct lowcore *lc = get_lowcore();
 		lc->guest_timer += delta;
 	else
 		lc->system_timer += delta;
-	virt_timer_forward(delta);
 }
 EXPORT_SYMBOL_GPL(vtime_account_kernel);
 void vtime_account_softirq(struct task_struct *tsk)
 {
-	u64 delta = vtime_delta();
+	get_lowcore()->softirq_timer += vtime_delta();
-	get_lowcore()->softirq_timer += delta;
-	virt_timer_forward(delta);
 }
 void vtime_account_hardirq(struct task_struct *tsk)
 {
-	u64 delta = vtime_delta();
+	get_lowcore()->hardirq_timer += vtime_delta();
-	get_lowcore()->hardirq_timer += delta;
-	virt_timer_forward(delta);
 }
 /*

arch/s390/kvm/Kconfig+0−2

 	select HAVE_KVM_INVALID_WAKEUPS
 	select HAVE_KVM_NO_POLL
 	select KVM_VFIO
-	select MMU_NOTIFIER
 	select VIRT_XFER_TO_GUEST_WORK
-	select KVM_GENERIC_MMU_NOTIFIER
 	select KVM_MMU_LOCKLESS_AGING
 	help
 	  Support hosting paravirtualized guest machines using the SIE

arch/s390/kvm/kvm-s390.c+2−3

 #define VCPU_IRQS_MAX_BUF (sizeof(struct kvm_s390_irq) * \
 			   (KVM_MAX_VCPUS + LOCAL_IRQS))
-const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
+const struct kvm_stats_desc kvm_vm_stats_desc[] = {
 	KVM_GENERIC_VM_STATS(),
 	STATS_DESC_COUNTER(VM, inject_io),
 	STATS_DESC_COUNTER(VM, inject_float_mchk),
 		       sizeof(kvm_vm_stats_desc),
 };
-const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
+const struct kvm_stats_desc kvm_vcpu_stats_desc[] = {
 	KVM_GENERIC_VCPU_STATS(),
 	STATS_DESC_COUNTER(VCPU, exit_userspace),
 	STATS_DESC_COUNTER(VCPU, exit_null),
 	switch (ext) {
 	case KVM_CAP_S390_PSW:
 	case KVM_CAP_S390_GMAP:
-	case KVM_CAP_SYNC_MMU:
 #ifdef CONFIG_KVM_S390_UCONTROL
 	case KVM_CAP_S390_UCONTROL:
 #endif

arch/s390/lib/xor.c+5−6

 		"	j	3f\n"
 		"2:	xc	0(1,%1),0(%2)\n"
 		"3:"
-		: : "d" (bytes), "a" (p1), "a" (p2)
+		: "+a" (bytes), "+a" (p1), "+a" (p2)
-		: "0", "cc", "memory");
+		: : "0", "cc", "memory");
 }
 static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1,
 		"2:	xc	0(1,%1),0(%2)\n"
 		"3:	xc	0(1,%1),0(%3)\n"
 		"4:"
-		: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
+		: "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
 		: : "0", "cc", "memory");
 }
 		"3:	xc	0(1,%1),0(%3)\n"
 		"4:	xc	0(1,%1),0(%4)\n"
 		"5:"
-		: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
+		: "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
 		: : "0", "cc", "memory");
 }
 		     const unsigned long * __restrict p5)
 {
 	asm volatile(
-		"	larl	1,2f\n"
 		"	aghi	%0,-1\n"
 		"	jm	6f\n"
 		"	srlg	0,%0,8\n"
 		"4:	xc	0(1,%1),0(%4)\n"
 		"5:	xc	0(1,%1),0(%5)\n"
 		"6:"
-		: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
+		: "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
 		  "+a" (p5)
 		: : "0", "cc", "memory");
 }

arch/s390/mm/pfault.c+2−2

@@ -62,7 +62,7 @@ int __pfault_init(void) · 61 unmodified lines
62	"0: nopr %%r7\n"	62	"0: nopr %%r7\n"
63	EX_TABLE(0b, 0b)	63	EX_TABLE(0b, 0b)
64	: [rc] "+d" (rc)	64	: [rc] "+d" (rc)
65	: [refbk] "a" (&pfault_init_refbk), "m" (pfault_init_refbk)	65	: [refbk] "a" (virt_to_phys(&pfault_init_refbk)), "m" (pfault_init_refbk)
66	: "cc");	66	: "cc");
67	return rc;	67	return rc;
68	}	68	}
@@ -84,7 +84,7 @@ void __pfault_fini(void) · 15 unmodified lines
84	"0: nopr %%r7\n"	84	"0: nopr %%r7\n"
85	EX_TABLE(0b, 0b)	85	EX_TABLE(0b, 0b)
86	:	86	:
87	: [refbk] "a" (&pfault_fini_refbk), "m" (pfault_fini_refbk)	87	: [refbk] "a" (virt_to_phys(&pfault_fini_refbk)), "m" (pfault_fini_refbk)
88	: "cc");	88	: "cc");
89	}	89	}
90		90

arch/sh/kernel/vmlinux.lds.S+1−0

@@ -89,6 +89,7 @@ SECTIONS · 88 unmodified lines
89		89
90	STABS_DEBUG	90	STABS_DEBUG
91	DWARF_DEBUG	91	DWARF_DEBUG
		92	MODINFO
92	ELF_DETAILS	93	ELF_DETAILS
93		94
94	DISCARDS	95	DISCARDS

arch/sparc/kernel/iommu.c+2−0

@@ -312,6 +312,8 @@ static dma_addr_t dma_4u_map_phys(struct device *dev, phys_addr_t phys, · 311 unmodified lines
312	if (direction != DMA_TO_DEVICE)	312	if (direction != DMA_TO_DEVICE)
313	iopte_protection \|= IOPTE_WRITE;	313	iopte_protection \|= IOPTE_WRITE;
314		314
		315	phys &= IO_PAGE_MASK;
		316
315	for (i = 0; i < npages; i++, base++, phys += IO_PAGE_SIZE)	317	for (i = 0; i < npages; i++, base++, phys += IO_PAGE_SIZE)
316	iopte_val(*base) = iopte_protection \| phys;	318	iopte_val(*base) = iopte_protection \| phys;
317		319

arch/sparc/kernel/pci.c+7−0

@@ -355,6 +355,13 @@ static struct pci_dev of_create_pci_dev(struct pci_pbm_info pbm, · 354 unmodified lines
355	dev->error_state = pci_channel_io_normal;	355	dev->error_state = pci_channel_io_normal;
356	dev->dma_mask = 0xffffffff;	356	dev->dma_mask = 0xffffffff;
357		357
		358	/*
		359	* Assume 64-bit addresses for MSI initially. Will be changed to 32-bit
		360	* if MSI (rather than MSI-X) capability does not have
		361	* PCI_MSI_FLAGS_64BIT. Can also be overridden by driver.
		362	*/
		363	dev->msi_addr_mask = DMA_BIT_MASK(64);
		364
358	if (of_node_name_eq(node, "pci")) {	365	if (of_node_name_eq(node, "pci")) {
359	/* a PCI-PCI bridge */	366	/* a PCI-PCI bridge */
360	dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;	367	dev->hdr_type = PCI_HEADER_TYPE_BRIDGE;

arch/sparc/kernel/pci_sun4v.c+2−0

@@ -410,6 +410,8 @@ static dma_addr_t dma_4v_map_phys(struct device *dev, phys_addr_t phys, · 409 unmodified lines
410		410
411	iommu_batch_start(dev, prot, entry);	411	iommu_batch_start(dev, prot, entry);
412		412
		413	phys &= IO_PAGE_MASK;
		414
413	for (i = 0; i < npages; i++, phys += IO_PAGE_SIZE) {	415	for (i = 0; i < npages; i++, phys += IO_PAGE_SIZE) {
414	long err = iommu_batch_add(phys, mask);	416	long err = iommu_batch_add(phys, mask);
415	if (unlikely(err < 0L))	417	if (unlikely(err < 0L))

arch/sparc/kernel/vmlinux.lds.S+1−0

@@ -191,6 +191,7 @@ SECTIONS · 190 unmodified lines
191		191
192	STABS_DEBUG	192	STABS_DEBUG
193	DWARF_DEBUG	193	DWARF_DEBUG
		194	MODINFO
194	ELF_DETAILS	195	ELF_DETAILS
195		196
196	DISCARDS	197	DISCARDS

arch/um/drivers/ubd_kern.c+5−5

@@ -69,11 +69,11 @@ struct io_thread_req { · 68 unmodified lines
69	};	69	};
70		70
71		71
72	static struct io_thread_req * (*irq_req_buffer)[];	72	static struct io_thread_req **irq_req_buffer;
73	static struct io_thread_req *irq_remainder;	73	static struct io_thread_req *irq_remainder;
74	static int irq_remainder_size;	74	static int irq_remainder_size;
75		75
76	static struct io_thread_req * (*io_req_buffer)[];	76	static struct io_thread_req **io_req_buffer;
77	static struct io_thread_req *io_remainder;	77	static struct io_thread_req *io_remainder;
78	static int io_remainder_size;	78	static int io_remainder_size;
79		79
@@ -398,7 +398,7 @@ static int thread_fd = -1; · 318 unmodified lines
398		398
399	static int bulk_req_safe_read(	399	static int bulk_req_safe_read(
400	int fd,	400	int fd,
401	struct io_thread_req * (*request_buffer)[],	401	struct io_thread_req **request_buffer,
402	struct io_thread_req **remainder,	402	struct io_thread_req **remainder,
403	int *remainder_size,	403	int *remainder_size,
404	int max_recs	404	int max_recs
@@ -465,7 +465,7 @@ static irqreturn_t ubd_intr(int irq, void *dev) · 60 unmodified lines
465	&irq_remainder, &irq_remainder_size,	465	&irq_remainder, &irq_remainder_size,
466	UBD_REQ_BUFFER_SIZE)) >= 0) {	466	UBD_REQ_BUFFER_SIZE)) >= 0) {
467	for (i = 0; i < len / sizeof(struct io_thread_req *); i++)	467	for (i = 0; i < len / sizeof(struct io_thread_req *); i++)
468	ubd_end_request((*irq_req_buffer)[i]);	468	ubd_end_request(irq_req_buffer[i]);
469	}	469	}
470		470
471	if (len < 0 && len != -EAGAIN)	471	if (len < 0 && len != -EAGAIN)
@@ -1512,7 +1512,7 @@ void io_thread(void arg) · 1040 unmodified lines
1512	}	1512	}
1513		1513
1514	for (count = 0; count < n/sizeof(struct io_thread_req *); count++) {	1514	for (count = 0; count < n/sizeof(struct io_thread_req *); count++) {
1515	struct io_thread_req req = (io_req_buffer)[count];	1515	struct io_thread_req *req = io_req_buffer[count];
1516	int i;	1516	int i;
1517		1517
1518	io_count++;	1518	io_count++;

arch/um/kernel/dyn.lds.S+1−0

@@ -172,6 +172,7 @@ SECTIONS · 171 unmodified lines
172		172
173	STABS_DEBUG	173	STABS_DEBUG
174	DWARF_DEBUG	174	DWARF_DEBUG
		175	MODINFO
175	ELF_DETAILS	176	ELF_DETAILS
176		177
177	DISCARDS	178	DISCARDS

arch/um/kernel/uml.lds.S+1−0

@@ -113,6 +113,7 @@ SECTIONS · 112 unmodified lines
113		113
114	STABS_DEBUG	114	STABS_DEBUG
115	DWARF_DEBUG	115	DWARF_DEBUG
		116	MODINFO
116	ELF_DETAILS	117	ELF_DETAILS
117		118
118	DISCARDS	119	DISCARDS

arch/x86/boot/compressed/Makefile+1−0

@@ -113,6 +113,7 @@ vmlinux-objs-$(CONFIG_EFI_SBAT) += $(obj)/sbat.o · 112 unmodified lines
113		113
114	ifdef CONFIG_EFI_SBAT	114	ifdef CONFIG_EFI_SBAT
115	$(obj)/sbat.o: $(CONFIG_EFI_SBAT_FILE)	115	$(obj)/sbat.o: $(CONFIG_EFI_SBAT_FILE)
		116	AFLAGS_sbat.o += -I $(srctree)
116	endif	117	endif
117		118
118	$(obj)/vmlinux: $(vmlinux-objs-y) $(vmlinux-libs-y) FORCE	119	$(obj)/vmlinux: $(vmlinux-objs-y) $(vmlinux-libs-y) FORCE

arch/x86/boot/compressed/sev.c+5−4

 #include "sev.h"
 static struct ghcb boot_ghcb_page __aligned(PAGE_SIZE);
-struct ghcb *boot_ghcb;
+struct ghcb *boot_ghcb __section(".data");
 #undef __init
 #define __init
 #define __BOOT_COMPRESSED
-u8 snp_vmpl;
+u8 snp_vmpl __section(".data");
-u16 ghcb_version;
+u16 ghcb_version __section(".data");
-u64 boot_svsm_caa_pa;
+u64 boot_svsm_caa_pa __section(".data");
 /* Include code for early handlers */
 #include "../../boot/startup/sev-shared.c"
 				 MSR_AMD64_SNP_RESERVED_BIT13 |		\
 				 MSR_AMD64_SNP_RESERVED_BIT15 |		\
 				 MSR_AMD64_SNP_SECURE_AVIC |		\
+				 MSR_AMD64_SNP_RESERVED_BITS19_22 |	\
 				 MSR_AMD64_SNP_RESERVED_MASK)
 #ifdef CONFIG_AMD_SECURE_AVIC

arch/x86/boot/compressed/vmlinux.lds.S+1−1

@@ -88,7 +88,7 @@ SECTIONS · 87 unmodified lines
88	/DISCARD/ : {	88	/DISCARD/ : {
89	(.dynamic) (.dynsym) (.dynstr) (.dynbss)	89	(.dynamic) (.dynsym) (.dynstr) (.dynbss)
90	(.hash) (.gnu.hash)	90	(.hash) (.gnu.hash)
91	(.note.)	91	(.note.) *(.modinfo)
92	}	92	}
93		93
94	.got.plt (INFO) : {	94	.got.plt (INFO) : {

arch/x86/boot/startup/sev-shared.c+1−1

@@ -31,7 +31,7 @@ static u32 cpuid_std_range_max __ro_after_init; · 30 unmodified lines
31	static u32 cpuid_hyp_range_max __ro_after_init;	31	static u32 cpuid_hyp_range_max __ro_after_init;
32	static u32 cpuid_ext_range_max __ro_after_init;	32	static u32 cpuid_ext_range_max __ro_after_init;
33		33
34	bool sev_snp_needs_sfw;	34	bool sev_snp_needs_sfw __section(".data");
35		35
36	void __noreturn	36	void __noreturn
37	sev_es_terminate(unsigned int set, unsigned int reason)	37	sev_es_terminate(unsigned int set, unsigned int reason)

arch/x86/coco/sev/core.c+1−0

@@ -89,6 +89,7 @@ static const char * const sev_status_feat_names[] = { · 88 unmodified lines
89	[MSR_AMD64_SNP_VMSA_REG_PROT_BIT] = "VMSARegProt",	89	[MSR_AMD64_SNP_VMSA_REG_PROT_BIT] = "VMSARegProt",
90	[MSR_AMD64_SNP_SMT_PROT_BIT] = "SMTProt",	90	[MSR_AMD64_SNP_SMT_PROT_BIT] = "SMTProt",
91	[MSR_AMD64_SNP_SECURE_AVIC_BIT] = "SecureAVIC",	91	[MSR_AMD64_SNP_SECURE_AVIC_BIT] = "SecureAVIC",
		92	[MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT] = "IBPBOnEntry",
92	};	93	};
93		94
94	/*	95	/*

arch/x86/entry/entry_fred.c+2−3

 static noinstr void fred_extint(struct pt_regs *regs)
 {
 	unsigned int vector = regs->fred_ss.vector;
-	unsigned int index = array_index_nospec(vector - FIRST_SYSTEM_VECTOR,
-						NR_SYSTEM_VECTORS);
 	if (WARN_ON_ONCE(vector < FIRST_EXTERNAL_VECTOR))
 		return;
 		irqentry_state_t state = irqentry_enter(regs);
 		instrumentation_begin();
-		sysvec_table[index](regs);
+		sysvec_table[array_index_nospec(vector - FIRST_SYSTEM_VECTOR,
+						NR_SYSTEM_VECTORS)](regs);
 		instrumentation_end();
 		irqentry_exit(regs, state);
 	} else {

arch/x86/entry/vdso/vdso32/sigreturn.S+30−0

@@ -35,9 +35,38 @@ · 34 unmodified lines
35	#endif	35	#endif
36	.endm	36	.endm
37		37
		38	/*
		39	* WARNING:
		40	*
		41	* A bug in the libgcc unwinder as of at least gcc 15.2 (2026) means that
		42	* the unwinder fails to recognize the signal frame flag.
		43	*
		44	* There is a hacky legacy fallback path in libgcc which ends up
		45	* getting invoked instead. It happens to work as long as BOTH of the
		46	* following conditions are true:
		47	*
		48	* 1. There is at least one byte before the each of the sigreturn
		49	* functions which falls outside any function. This is enforced by
		50	* an explicit nop instruction before the ALIGN.
		51	* 2. The code sequences between the entry point up to and including
		52	* the int $0x80 below need to match EXACTLY. Do not change them
		53	* in any way. The exact byte sequences are:
		54	*
		55	* __kernel_sigreturn:
		56	* 0: 58 pop %eax
		57	* 1: b8 77 00 00 00 mov $0x77,%eax
		58	* 6: cd 80 int $0x80
		59	*
		60	* __kernel_rt_sigreturn:
		61	* 0: b8 ad 00 00 00 mov $0xad,%eax
		62	* 5: cd 80 int $0x80
		63	*
		64	* For details, see: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=124050
		65	*/
38	.text	66	.text
39	.globl __kernel_sigreturn	67	.globl __kernel_sigreturn
40	.type __kernel_sigreturn,@function	68	.type __kernel_sigreturn,@function
		69	nop /* libgcc hack: see comment above */
41	ALIGN	70	ALIGN
42	__kernel_sigreturn:	71	__kernel_sigreturn:
43	STARTPROC_SIGNAL_FRAME IA32_SIGFRAME_sigcontext	72	STARTPROC_SIGNAL_FRAME IA32_SIGFRAME_sigcontext
@@ -52,6 +81,7 @@ SYM_INNER_LABEL(vdso32_sigreturn_landing_pad, SYM_L_GLOBAL) · 8 unmodified lines
52		81
53	.globl __kernel_rt_sigreturn	82	.globl __kernel_rt_sigreturn
54	.type __kernel_rt_sigreturn,@function	83	.type __kernel_rt_sigreturn,@function
		84	nop /* libgcc hack: see comment above */
55	ALIGN	85	ALIGN
56	__kernel_rt_sigreturn:	86	__kernel_rt_sigreturn:
57	STARTPROC_SIGNAL_FRAME IA32_RT_SIGFRAME_sigcontext	87	STARTPROC_SIGNAL_FRAME IA32_RT_SIGFRAME_sigcontext

arch/x86/events/intel/uncore_snbep.c+27−1

@@ -6497,6 +6497,32 @@ static struct intel_uncore_type gnr_uncore_ubox = { · 6496 unmodified lines
6497	.attr_update = uncore_alias_groups,	6497	.attr_update = uncore_alias_groups,
6498	};	6498	};
6499		6499
		6500	static struct uncore_event_desc gnr_uncore_imc_events[] = {
		6501	INTEL_UNCORE_EVENT_DESC(clockticks, "event=0x01,umask=0x00"),
		6502	INTEL_UNCORE_EVENT_DESC(cas_count_read_sch0, "event=0x05,umask=0xcf"),
		6503	INTEL_UNCORE_EVENT_DESC(cas_count_read_sch0.scale, "6.103515625e-5"),
		6504	INTEL_UNCORE_EVENT_DESC(cas_count_read_sch0.unit, "MiB"),
		6505	INTEL_UNCORE_EVENT_DESC(cas_count_read_sch1, "event=0x06,umask=0xcf"),
		6506	INTEL_UNCORE_EVENT_DESC(cas_count_read_sch1.scale, "6.103515625e-5"),
		6507	INTEL_UNCORE_EVENT_DESC(cas_count_read_sch1.unit, "MiB"),
		6508	INTEL_UNCORE_EVENT_DESC(cas_count_write_sch0, "event=0x05,umask=0xf0"),
		6509	INTEL_UNCORE_EVENT_DESC(cas_count_write_sch0.scale, "6.103515625e-5"),
		6510	INTEL_UNCORE_EVENT_DESC(cas_count_write_sch0.unit, "MiB"),
		6511	INTEL_UNCORE_EVENT_DESC(cas_count_write_sch1, "event=0x06,umask=0xf0"),
		6512	INTEL_UNCORE_EVENT_DESC(cas_count_write_sch1.scale, "6.103515625e-5"),
		6513	INTEL_UNCORE_EVENT_DESC(cas_count_write_sch1.unit, "MiB"),
		6514	{ /* end: all zeroes */ },
		6515	};
		6516
		6517	static struct intel_uncore_type gnr_uncore_imc = {
		6518	SPR_UNCORE_MMIO_COMMON_FORMAT(),
		6519	.name = "imc",
		6520	.fixed_ctr_bits = 48,
		6521	.fixed_ctr = SNR_IMC_MMIO_PMON_FIXED_CTR,
		6522	.fixed_ctl = SNR_IMC_MMIO_PMON_FIXED_CTL,
		6523	.event_descs = gnr_uncore_imc_events,
		6524	};
		6525
6500	static struct intel_uncore_type gnr_uncore_pciex8 = {	6526	static struct intel_uncore_type gnr_uncore_pciex8 = {
6501	SPR_UNCORE_PCI_COMMON_FORMAT(),	6527	SPR_UNCORE_PCI_COMMON_FORMAT(),
6502	.name = "pciex8",	6528	.name = "pciex8",
@@ -6544,7 +6570,7 @@ static struct intel_uncore_type *gnr_uncores[UNCORE_GNR_NUM_UNCORE_TYPES] = { · 41 unmodified lines
6544	NULL,	6570	NULL,
6545	&spr_uncore_pcu,	6571	&spr_uncore_pcu,
6546	&gnr_uncore_ubox,	6572	&gnr_uncore_ubox,
6547	&spr_uncore_imc,	6573	&gnr_uncore_imc,
6548	NULL,	6574	NULL,
6549	&gnr_uncore_upi,	6575	&gnr_uncore_upi,
6550	NULL,	6576	NULL,

arch/x86/include/asm/bug.h+3−3

@@ -7,7 +7,7 @@ · 6 unmodified lines
7	#include <linux/objtool.h>	7	#include <linux/objtool.h>
8	#include <asm/asm.h>	8	#include <asm/asm.h>
9		9
10	#ifndef __ASSEMBLY__	10	#ifndef __ASSEMBLER__
11	struct bug_entry;	11	struct bug_entry;
12	extern void __WARN_trap(struct bug_entry *bug, ...);	12	extern void __WARN_trap(struct bug_entry *bug, ...);
13	#endif	13	#endif
@@ -137,7 +137,7 @@ do { \ · 123 unmodified lines
137		137
138	#ifdef HAVE_ARCH_BUG_FORMAT_ARGS	138	#ifdef HAVE_ARCH_BUG_FORMAT_ARGS
139		139
140	#ifndef __ASSEMBLY__	140	#ifndef __ASSEMBLER__
141	#include <linux/static_call_types.h>	141	#include <linux/static_call_types.h>
142	DECLARE_STATIC_CALL(WARN_trap, __WARN_trap);	142	DECLARE_STATIC_CALL(WARN_trap, __WARN_trap);
143		143
@@ -153,7 +153,7 @@ struct arch_va_list { · 9 unmodified lines
153	struct sysv_va_list args;	153	struct sysv_va_list args;
154	};	154	};
155	extern void __warn_args(struct arch_va_list args, struct pt_regs *regs);	155	extern void __warn_args(struct arch_va_list args, struct pt_regs *regs);
156	#endif /* __ASSEMBLY__ */	156	#endif /* __ASSEMBLER__ */
157		157
158	#define __WARN_bug_entry(flags, format) ({ \	158	#define __WARN_bug_entry(flags, format) ({ \
159	struct bug_entry *bug; \	159	struct bug_entry *bug; \

arch/x86/include/asm/cfi.h+8−4

 struct pt_regs;
+#ifdef CONFIG_CALL_PADDING
+#define CFI_OFFSET (CONFIG_FUNCTION_PADDING_CFI+5)
+#else
+#define CFI_OFFSET 5
+#endif
 #ifdef CONFIG_CFI
 enum bug_trap_type handle_cfi_failure(struct pt_regs *regs);
 #define __bpfcall
 {
 	switch (cfi_mode) {
 	case CFI_FINEIBT:
-		return 16;
+		return /* fineibt_prefix_size */ 16;
 	case CFI_KCFI:
-		if (IS_ENABLED(CONFIG_CALL_PADDING))
+		return CFI_OFFSET;
-			return 16;
-		return 5;
 	default:
 		return 0;
 	}

arch/x86/include/asm/efi.h+1−1

@@ -138,7 +138,7 @@ extern void __init efi_apply_memmap_quirks(void); · 137 unmodified lines
138	extern int __init efi_reuse_config(u64 tables, int nr_tables);	138	extern int __init efi_reuse_config(u64 tables, int nr_tables);
139	extern void efi_delete_dummy_variable(void);	139	extern void efi_delete_dummy_variable(void);
140	extern void efi_crash_gracefully_on_page_fault(unsigned long phys_addr);	140	extern void efi_crash_gracefully_on_page_fault(unsigned long phys_addr);
141	extern void efi_free_boot_services(void);	141	extern void efi_unmap_boot_services(void);
142		142
143	void arch_efi_call_virt_setup(void);	143	void arch_efi_call_virt_setup(void);
144	void arch_efi_call_virt_teardown(void);	144	void arch_efi_call_virt_teardown(void);

arch/x86/include/asm/irqflags.h+2−2

@@ -77,7 +77,7 @@ static __always_inline void native_local_irq_restore(unsigned long flags) · 76 unmodified lines
77	#endif	77	#endif
78		78
79	#ifndef CONFIG_PARAVIRT	79	#ifndef CONFIG_PARAVIRT
80	#ifndef __ASSEMBLY__	80	#ifndef __ASSEMBLER__
81	/*	81	/*
82	* Used in the idle loop; sti takes one instruction cycle	82	* Used in the idle loop; sti takes one instruction cycle
83	* to complete:	83	* to complete:
@@ -95,7 +95,7 @@ static __always_inline void halt(void) · 11 unmodified lines
95	{	95	{
96	native_halt();	96	native_halt();
97	}	97	}
98	#endif /* __ASSEMBLY__ */	98	#endif /* __ASSEMBLER__ */
99	#endif /* CONFIG_PARAVIRT */	99	#endif /* CONFIG_PARAVIRT */
100		100
101	#ifdef CONFIG_PARAVIRT_XXL	101	#ifdef CONFIG_PARAVIRT_XXL

arch/x86/include/asm/kvm_host.h+2−1

@@ -2485,7 +2485,8 @@ int memslot_rmap_alloc(struct kvm_memory_slot *slot, unsigned long npages); · 2484 unmodified lines
2485	KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS \| \	2485	KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS \| \
2486	KVM_X86_QUIRK_SLOT_ZAP_ALL \| \	2486	KVM_X86_QUIRK_SLOT_ZAP_ALL \| \
2487	KVM_X86_QUIRK_STUFF_FEATURE_MSRS \| \	2487	KVM_X86_QUIRK_STUFF_FEATURE_MSRS \| \
2488	KVM_X86_QUIRK_IGNORE_GUEST_PAT)	2488	KVM_X86_QUIRK_IGNORE_GUEST_PAT \| \
		2489	KVM_X86_QUIRK_VMCS12_ALLOW_FREEZE_IN_SMM)
2489		2490
2490	#define KVM_X86_CONDITIONAL_QUIRKS \	2491	#define KVM_X86_CONDITIONAL_QUIRKS \
2491	(KVM_X86_QUIRK_CD_NW_CLEARED \| \	2492	(KVM_X86_QUIRK_CD_NW_CLEARED \| \

arch/x86/include/asm/linkage.h+2−2

@@ -68,7 +68,7 @@ · 67 unmodified lines
68	* Depending on -fpatchable-function-entry=N,N usage (CONFIG_CALL_PADDING) the	68	* Depending on -fpatchable-function-entry=N,N usage (CONFIG_CALL_PADDING) the
69	* CFI symbol layout changes.	69	* CFI symbol layout changes.
70	*	70	*
71	* Without CALL_THUNKS:	71	* Without CALL_PADDING:
72	*	72	*
73	* .align FUNCTION_ALIGNMENT	73	* .align FUNCTION_ALIGNMENT
74	* __cfi_##name:	74	* __cfi_##name:
@@ -77,7 +77,7 @@ · 2 unmodified lines
77	* .long __kcfi_typeid_##name	77	* .long __kcfi_typeid_##name
78	* name:	78	* name:
79	*	79	*
80	* With CALL_THUNKS:	80	* With CALL_PADDING:
81	*	81	*
82	* .align FUNCTION_ALIGNMENT	82	* .align FUNCTION_ALIGNMENT
83	* __cfi_##name:	83	* __cfi_##name:

arch/x86/include/asm/msr-index.h+4−1

 #define MSR_AMD64_SNP_SMT_PROT		BIT_ULL(MSR_AMD64_SNP_SMT_PROT_BIT)
 #define MSR_AMD64_SNP_SECURE_AVIC_BIT	18
 #define MSR_AMD64_SNP_SECURE_AVIC	BIT_ULL(MSR_AMD64_SNP_SECURE_AVIC_BIT)
-#define MSR_AMD64_SNP_RESV_BIT		19
+#define MSR_AMD64_SNP_RESERVED_BITS19_22 GENMASK_ULL(22, 19)
+#define MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT	23
+#define MSR_AMD64_SNP_IBPB_ON_ENTRY	BIT_ULL(MSR_AMD64_SNP_IBPB_ON_ENTRY_BIT)
+#define MSR_AMD64_SNP_RESV_BIT		24
 #define MSR_AMD64_SNP_RESERVED_MASK	GENMASK_ULL(63, MSR_AMD64_SNP_RESV_BIT)
 #define MSR_AMD64_SAVIC_CONTROL		0xc0010138
 #define MSR_AMD64_SAVIC_EN_BIT		0

arch/x86/include/asm/numa.h+6−0

  */
 extern s16 __apicid_to_node[MAX_LOCAL_APIC];
 extern nodemask_t numa_nodes_parsed __initdata;
+extern nodemask_t numa_phys_nodes_parsed __initdata;
 static inline void set_apicid_to_node(int apicid, s16 node)
 {
 extern void numa_add_cpu(unsigned int cpu);
 extern void numa_remove_cpu(unsigned int cpu);
 extern void init_gi_nodes(void);
+extern int num_phys_nodes(void);
 #else	/* CONFIG_NUMA */
 static inline void numa_set_node(int cpu, int node)	{ }
 static inline void numa_clear_node(int cpu)		{ }
 static inline void numa_add_cpu(unsigned int cpu)	{ }
 static inline void numa_remove_cpu(unsigned int cpu)	{ }
 static inline void init_gi_nodes(void)			{ }
+static inline int num_phys_nodes(void)
+{
+	return 1;
+}
 #endif	/* CONFIG_NUMA */
 #ifdef CONFIG_DEBUG_PER_CPU_MAPS

arch/x86/include/asm/percpu.h+1−1

@@ -20,7 +20,7 @@ · 19 unmodified lines
20		20
21	#define PER_CPU_VAR(var) __percpu(var)__percpu_rel	21	#define PER_CPU_VAR(var) __percpu(var)__percpu_rel
22		22
23	#else /* !__ASSEMBLY__: */	23	#else /* !__ASSEMBLER__: */
24		24
25	#include <linux/args.h>	25	#include <linux/args.h>
26	#include <linux/bits.h>	26	#include <linux/bits.h>

arch/x86/include/asm/pgtable_64.h+0−2

 extern p4d_t level4_kernel_pgt[512];
 extern p4d_t level4_ident_pgt[512];
 extern pud_t level3_kernel_pgt[512];
-extern pud_t level3_ident_pgt[512];
 extern pmd_t level2_kernel_pgt[512];
 extern pmd_t level2_fixmap_pgt[512];
-extern pmd_t level2_ident_pgt[512];
 extern pte_t level1_fixmap_pgt[512 * FIXMAP_PMD_NUM];
 extern pgd_t init_top_pgt[];

arch/x86/include/asm/runtime-const.h+3−3

@@ -6,7 +6,7 @@ · 5 unmodified lines
6	#error "Cannot use runtime-const infrastructure from modules"	6	#error "Cannot use runtime-const infrastructure from modules"
7	#endif	7	#endif
8		8
9	#ifdef __ASSEMBLY__	9	#ifdef __ASSEMBLER__
10		10
11	.macro RUNTIME_CONST_PTR sym reg	11	.macro RUNTIME_CONST_PTR sym reg
12	movq $0x0123456789abcdef, %\reg	12	movq $0x0123456789abcdef, %\reg
@@ -16,7 +16,7 @@ · 3 unmodified lines
16	.popsection	16	.popsection
17	.endm	17	.endm
18		18
19	#else /* __ASSEMBLY__ */	19	#else /* __ASSEMBLER__ */
20		20
21	#define runtime_const_ptr(sym) ({ \	21	#define runtime_const_ptr(sym) ({ \
22	typeof(sym) __ret; \	22	typeof(sym) __ret; \
@@ -74,5 +74,5 @@ static inline void runtime_const_fixup(void (fn)(void , unsigned long), · 51 unmodified lines
74	}	74	}
75	}	75	}
76		76
77	#endif /* __ASSEMBLY__ */	77	#endif /* __ASSEMBLER__ */
78	#endif	78	#endif

arch/x86/include/asm/topology.h+6−0

 extern unsigned int __max_threads_per_core;
 extern unsigned int __num_threads_per_package;
 extern unsigned int __num_cores_per_package;
+extern unsigned int __num_nodes_per_package;
 const char *get_topology_cpu_type_name(struct cpuinfo_x86 *c);
 enum x86_topology_cpu_type get_topology_cpu_type(struct cpuinfo_x86 *c);
 	return __num_threads_per_package;
 }
+static inline unsigned int topology_num_nodes_per_package(void)
+{
+	return __num_nodes_per_package;
+}
 #ifdef CONFIG_X86_LOCAL_APIC
 int topology_get_logical_id(u32 apicid, enum x86_topology_domains at_level);
 #else

arch/x86/include/asm/traps.h+2−0

@@ -25,6 +25,8 @@ extern int ibt_selftest_noendbr(void); · 24 unmodified lines
25	void handle_invalid_op(struct pt_regs *regs);	25	void handle_invalid_op(struct pt_regs *regs);
26	#endif	26	#endif
27		27
		28	noinstr bool handle_bug(struct pt_regs *regs);
		29
28	static inline int get_si_code(unsigned long condition)	30	static inline int get_si_code(unsigned long condition)
29	{	31	{
30	if (condition & DR_STEP)	32	if (condition & DR_STEP)

arch/x86/include/uapi/asm/kvm.h+1−0

@@ -476,6 +476,7 @@ struct kvm_sync_regs { · 475 unmodified lines
476	#define KVM_X86_QUIRK_SLOT_ZAP_ALL (1 << 7)	476	#define KVM_X86_QUIRK_SLOT_ZAP_ALL (1 << 7)
477	#define KVM_X86_QUIRK_STUFF_FEATURE_MSRS (1 << 8)	477	#define KVM_X86_QUIRK_STUFF_FEATURE_MSRS (1 << 8)
478	#define KVM_X86_QUIRK_IGNORE_GUEST_PAT (1 << 9)	478	#define KVM_X86_QUIRK_IGNORE_GUEST_PAT (1 << 9)
		479	#define KVM_X86_QUIRK_VMCS12_ALLOW_FREEZE_IN_SMM (1 << 10)
479		480
480	#define KVM_STATE_NESTED_FORMAT_VMX 0	481	#define KVM_STATE_NESTED_FORMAT_VMX 0
481	#define KVM_STATE_NESTED_FORMAT_SVM 1	482	#define KVM_STATE_NESTED_FORMAT_SVM 1

arch/x86/kernel/alternative.c+22−7

 		poison_endbr(addr);
 		if (IS_ENABLED(CONFIG_FINEIBT))
-			poison_cfi(addr - 16);
+			poison_cfi(addr - CFI_OFFSET);
 	}
 }
 #define fineibt_preamble_ud   0x13
 #define fineibt_preamble_hash 5
+#define fineibt_prefix_size (fineibt_preamble_size - ENDBR_INSN_SIZE)
 /*
  * <fineibt_caller_start>:
  *  0:   b8 78 56 34 12          mov    $0x12345678, %eax
 		 * have determined there are no indirect calls to it and we
 		 * don't need no CFI either.
 		 */
-		if (!is_endbr(addr + 16))
+		if (!is_endbr(addr + CFI_OFFSET))
 			continue;
 		hash = decode_preamble_hash(addr, &arity);
 			 addr, addr, 5, addr))
 			return -EINVAL;
+		/*
+		 * FineIBT relies on being at func-16, so if the preamble is
+		 * actually larger than that, place it the tail end.
+		 *
+		 * NOTE: this is possible with things like DEBUG_CALL_THUNKS
+		 * and DEBUG_FORCE_FUNCTION_ALIGN_64B.
+		 */
+		addr += CFI_OFFSET - fineibt_prefix_size;
 		text_poke_early(addr, fineibt_preamble_start, fineibt_preamble_size);
 		WARN_ON(*(u32 *)(addr + fineibt_preamble_hash) != 0x12345678);
 		text_poke_early(addr + fineibt_preamble_hash, &hash, 4);
 	for (s = start; s < end; s++) {
 		void *addr = (void *)s + *s;
-		if (!exact_endbr(addr + 16))
+		if (!exact_endbr(addr + CFI_OFFSET))
 			continue;
-		poison_endbr(addr + 16);
+		poison_endbr(addr + CFI_OFFSET);
 	}
 }
 	if (FINEIBT_WARN(fineibt_preamble_size, 20)			||
 	    FINEIBT_WARN(fineibt_preamble_bhi + fineibt_bhi1_size, 20)	||
 	    FINEIBT_WARN(fineibt_caller_size, 14)			||
-	    FINEIBT_WARN(fineibt_paranoid_size, 20))
+	    FINEIBT_WARN(fineibt_paranoid_size, 20)			||
+	    WARN_ON_ONCE(CFI_OFFSET < fineibt_prefix_size))
 		return;
 	if (cfi_mode == CFI_AUTO) {
 	 */
 	switch (cfi_mode) {
 	case CFI_FINEIBT:
+		/*
+		 * FineIBT preamble is at func-16.
+		 */
+		addr += CFI_OFFSET - fineibt_prefix_size;
 		/*
 		 * FineIBT prefix should start with an ENDBR.
 		 */
 	}
 }
-#define fineibt_prefix_size (fineibt_preamble_size - ENDBR_INSN_SIZE)
 /*
  * When regs->ip points to a 0xD6 byte in the FineIBT preamble,
  * return true and fill out target and type.

arch/x86/kernel/apic/apic.c+6−0

 static inline void try_to_enable_x2apic(int remap_mode) { }
 static inline void __x2apic_enable(void) { }
+static inline void __x2apic_disable(void) { }
 #endif /* !CONFIG_X86_X2APIC */
 void __init enable_IR_x2apic(void)
 	if (x2apic_mode) {
 		__x2apic_enable();
 	} else {
+		if (x2apic_enabled()) {
+			pr_warn_once("x2apic: re-enabled by firmware during resume. Disabling\n");
+			__x2apic_disable();
+		}
 		/*
 		 * Make sure the APICBASE points to the right address
 		 *

arch/x86/kernel/cpu/common.c+3−0

@@ -95,6 +95,9 @@ EXPORT_SYMBOL(__max_dies_per_package); · 94 unmodified lines
95	unsigned int __max_logical_packages __ro_after_init = 1;	95	unsigned int __max_logical_packages __ro_after_init = 1;
96	EXPORT_SYMBOL(__max_logical_packages);	96	EXPORT_SYMBOL(__max_logical_packages);
97		97
		98	unsigned int __num_nodes_per_package __ro_after_init = 1;
		99	EXPORT_SYMBOL(__num_nodes_per_package);
		100
98	unsigned int __num_cores_per_package __ro_after_init = 1;	101	unsigned int __num_cores_per_package __ro_after_init = 1;
99	EXPORT_SYMBOL(__num_cores_per_package);	102	EXPORT_SYMBOL(__num_cores_per_package);
100		103

arch/x86/kernel/cpu/resctrl/monitor.c+5−31

@@ -364,7 +364,7 @@ void arch_mon_domain_online(struct rdt_resource r, struct rdt_l3_mon_domain d) · 363 unmodified lines
364	msr_clear_bit(MSR_RMID_SNC_CONFIG, 0);	364	msr_clear_bit(MSR_RMID_SNC_CONFIG, 0);
365	}	365	}
366		366
367	/* CPU models that support MSR_RMID_SNC_CONFIG */	367	/* CPU models that support SNC and MSR_RMID_SNC_CONFIG */
368	static const struct x86_cpu_id snc_cpu_ids[] __initconst = {	368	static const struct x86_cpu_id snc_cpu_ids[] __initconst = {
369	X86_MATCH_VFM(INTEL_ICELAKE_X, 0),	369	X86_MATCH_VFM(INTEL_ICELAKE_X, 0),
370	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, 0),	370	X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, 0),
@@ -375,40 +375,14 @@ static const struct x86_cpu_id snc_cpu_ids[] __initconst = { · 4 unmodified lines
375	{}	375	{}
376	};	376	};
377		377
378	/*
379	* There isn't a simple hardware bit that indicates whether a CPU is running
380	* in Sub-NUMA Cluster (SNC) mode. Infer the state by comparing the
381	* number of CPUs sharing the L3 cache with CPU0 to the number of CPUs in
382	* the same NUMA node as CPU0.
383	* It is not possible to accurately determine SNC state if the system is
384	* booted with a maxcpus=N parameter. That distorts the ratio of SNC nodes
385	* to L3 caches. It will be OK if system is booted with hyperthreading
386	* disabled (since this doesn't affect the ratio).
387	*/
388	static __init int snc_get_config(void)	378	static __init int snc_get_config(void)
389	{	379	{
390	struct cacheinfo *ci = get_cpu_cacheinfo_level(0, RESCTRL_L3_CACHE);	380	int ret = topology_num_nodes_per_package();
391	const cpumask_t *node0_cpumask;
392	int cpus_per_node, cpus_per_l3;
393	int ret;
394
395	if (!x86_match_cpu(snc_cpu_ids) \|\| !ci)
396	return 1;
397		381
398	cpus_read_lock();	382	if (ret > 1 && !x86_match_cpu(snc_cpu_ids)) {
399	if (num_online_cpus() != num_present_cpus())	383	pr_warn("CoD enabled system? Resctrl not supported\n");
400	pr_warn("Some CPUs offline, SNC detection may be incorrect\n");
401	cpus_read_unlock();
402
403	node0_cpumask = cpumask_of_node(cpu_to_node(0));
404
405	cpus_per_node = cpumask_weight(node0_cpumask);
406	cpus_per_l3 = cpumask_weight(&ci->shared_cpu_map);
407
408	if (!cpus_per_node \|\| !cpus_per_l3)
409	return 1;	384	return 1;
410		385	}
411	ret = cpus_per_l3 / cpus_per_node;
412		386
413	/* sanity check: Only valid results are 1, 2, 3, 4, 6 */	387	/* sanity check: Only valid results are 1, 2, 3, 4, 6 */
414	switch (ret) {	388	switch (ret) {

arch/x86/kernel/cpu/topology.c+11−2

 #include <asm/mpspec.h>
 #include <asm/msr.h>
 #include <asm/smp.h>
+#include <asm/numa.h>
 #include "cpu.h"
 	set_nr_cpu_ids(allowed);
 	cnta = domain_weight(TOPO_PKG_DOMAIN);
-	cntb = domain_weight(TOPO_DIE_DOMAIN);
 	__max_logical_packages = cnta;
+	pr_info("Max. logical packages: %3u\n", __max_logical_packages);
+	cntb = num_phys_nodes();
+	__num_nodes_per_package = DIV_ROUND_UP(cntb, cnta);
+	pr_info("Max. logical nodes:    %3u\n", cntb);
+	pr_info("Num. nodes per package:%3u\n", __num_nodes_per_package);
+	cntb = domain_weight(TOPO_DIE_DOMAIN);
 	__max_dies_per_package = 1U << (get_count_order(cntb) - get_count_order(cnta));
-	pr_info("Max. logical packages: %3u\n", cnta);
 	pr_info("Max. logical dies:     %3u\n", cntb);
 	pr_info("Max. dies per package: %3u\n", __max_dies_per_package);

arch/x86/kernel/head_64.S+0−28

@@ -616,38 +616,10 @@ SYM_DATA(early_recursion_flag, .long 0) · 615 unmodified lines
616		616
617	.data	617	.data
618		618
619	#if defined(CONFIG_XEN_PV) \|\| defined(CONFIG_PVH)
620	SYM_DATA_START_PTI_ALIGNED(init_top_pgt)
621	.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
622	.org init_top_pgt + L4_PAGE_OFFSET*8, 0
623	.quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
624	.org init_top_pgt + L4_START_KERNEL*8, 0
625	/* (2^48-(2102410241024))/(2^39) = 511 /
626	.quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE_NOENC
627	.fill PTI_USER_PGD_FILL,8,0
628	SYM_DATA_END(init_top_pgt)
629
630	SYM_DATA_START_PAGE_ALIGNED(level3_ident_pgt)
631	.quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE_NOENC
632	.fill 511, 8, 0
633	SYM_DATA_END(level3_ident_pgt)
634	SYM_DATA_START_PAGE_ALIGNED(level2_ident_pgt)
635	/*
636	* Since I easily can, map the first 1G.
637	* Don't set NX because code runs from these pages.
638	*
639	* Note: This sets _PAGE_GLOBAL despite whether
640	* the CPU supports it or it is enabled. But,
641	* the CPU should ignore the bit.
642	*/
643	PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
644	SYM_DATA_END(level2_ident_pgt)
645	#else
646	SYM_DATA_START_PTI_ALIGNED(init_top_pgt)	619	SYM_DATA_START_PTI_ALIGNED(init_top_pgt)
647	.fill 512,8,0	620	.fill 512,8,0
648	.fill PTI_USER_PGD_FILL,8,0	621	.fill PTI_USER_PGD_FILL,8,0
649	SYM_DATA_END(init_top_pgt)	622	SYM_DATA_END(init_top_pgt)
650	#endif
651		623
652	SYM_DATA_START_PAGE_ALIGNED(level4_kernel_pgt)	624	SYM_DATA_START_PAGE_ALIGNED(level4_kernel_pgt)
653	.fill 511,8,0	625	.fill 511,8,0

arch/x86/kernel/smpboot.c+145−56

@@ -468,13 +468,6 @@ static int x86_cluster_flags(void) · 467 unmodified lines
468	}	468	}
469	#endif	469	#endif
470		470
471	/*
472	* Set if a package/die has multiple NUMA nodes inside.
473	* AMD Magny-Cours, Intel Cluster-on-Die, and Intel
474	* Sub-NUMA Clustering have this.
475	*/
476	static bool x86_has_numa_in_package;
477
478	static struct sched_domain_topology_level x86_topology[] = {	471	static struct sched_domain_topology_level x86_topology[] = {
479	SDTL_INIT(tl_smt_mask, cpu_smt_flags, SMT),	472	SDTL_INIT(tl_smt_mask, cpu_smt_flags, SMT),
480	#ifdef CONFIG_SCHED_CLUSTER	473	#ifdef CONFIG_SCHED_CLUSTER
@@ -496,7 +489,7 @@ static void __init build_sched_topology(void) · 15 unmodified lines
496	* PKG domain since the NUMA domains will auto-magically create the	489	* PKG domain since the NUMA domains will auto-magically create the
497	* right spanning domains based on the SLIT.	490	* right spanning domains based on the SLIT.
498	*/	491	*/
499	if (x86_has_numa_in_package) {	492	if (topology_num_nodes_per_package() > 1) {
500	unsigned int pkgdom = ARRAY_SIZE(x86_topology) - 2;	493	unsigned int pkgdom = ARRAY_SIZE(x86_topology) - 2;
501		494
502	memset(&x86_topology[pkgdom], 0, sizeof(x86_topology[pkgdom]));	495	memset(&x86_topology[pkgdom], 0, sizeof(x86_topology[pkgdom]));
@@ -513,33 +506,149 @@ static void __init build_sched_topology(void) · 10 unmodified lines
513	}	506	}
514		507
515	#ifdef CONFIG_NUMA	508	#ifdef CONFIG_NUMA
516	static int sched_avg_remote_distance;	509	/*
517	static int avg_remote_numa_distance(void)	510	* Test if the on-trace cluster at (N,N) is symmetric.
		511	* Uses upper triangle iteration to avoid obvious duplicates.
		512	*/
		513	static bool slit_cluster_symmetric(int N)
518	{	514	{
519	int i, j;	515	int u = topology_num_nodes_per_package();
520	int distance, nr_remote, total_distance;	516
521		517	for (int k = 0; k < u; k++) {
522	if (sched_avg_remote_distance > 0)	518	for (int l = k; l < u; l++) {
523	return sched_avg_remote_distance;	519	if (node_distance(N + k, N + l) !=
524		520	node_distance(N + l, N + k))
525	nr_remote = 0;	521	return false;
526	total_distance = 0;
527	for_each_node_state(i, N_CPU) {
528	for_each_node_state(j, N_CPU) {
529	distance = node_distance(i, j);
530
531	if (distance >= REMOTE_DISTANCE) {
532	nr_remote++;
533	total_distance += distance;
534	}
535	}	522	}
536	}	523	}
537	if (nr_remote)
538	sched_avg_remote_distance = total_distance / nr_remote;
539	else
540	sched_avg_remote_distance = REMOTE_DISTANCE;
541		524
542	return sched_avg_remote_distance;	525	return true;
		526	}
		527
		528	/*
		529	* Return the package-id of the cluster, or ~0 if indeterminate.
		530	* Each node in the on-trace cluster should have the same package-id.
		531	*/
		532	static u32 slit_cluster_package(int N)
		533	{
		534	int u = topology_num_nodes_per_package();
		535	u32 pkg_id = ~0;
		536
		537	for (int n = 0; n < u; n++) {
		538	const struct cpumask *cpus = cpumask_of_node(N + n);
		539	int cpu;
		540
		541	for_each_cpu(cpu, cpus) {
		542	u32 id = topology_logical_package_id(cpu);
		543
		544	if (pkg_id == ~0)
		545	pkg_id = id;
		546	if (pkg_id != id)
		547	return ~0;
		548	}
		549	}
		550
		551	return pkg_id;
		552	}
		553
		554	/*
		555	* Validate the SLIT table is of the form expected for SNC, specifically:
		556	*
		557	* - each on-trace cluster should be symmetric,
		558	* - each on-trace cluster should have a unique package-id.
		559	*
		560	* If you NUMA_EMU on top of SNC, you get to keep the pieces.
		561	*/
		562	static bool slit_validate(void)
		563	{
		564	int u = topology_num_nodes_per_package();
		565	u32 pkg_id, prev_pkg_id = ~0;
		566
		567	for (int pkg = 0; pkg < topology_max_packages(); pkg++) {
		568	int n = pkg * u;
		569
		570	/*
		571	* Ensure the on-trace cluster is symmetric and each cluster
		572	* has a different package id.
		573	*/
		574	if (!slit_cluster_symmetric(n))
		575	return false;
		576	pkg_id = slit_cluster_package(n);
		577	if (pkg_id == ~0)
		578	return false;
		579	if (pkg && pkg_id == prev_pkg_id)
		580	return false;
		581
		582	prev_pkg_id = pkg_id;
		583	}
		584
		585	return true;
		586	}
		587
		588	/*
		589	* Compute a sanitized SLIT table for SNC; notably SNC-3 can end up with
		590	* asymmetric off-trace clusters, reflecting physical assymmetries. However
		591	* this leads to 'unfortunate' sched_domain configurations.
		592	*
		593	* For example dual socket GNR with SNC-3:
		594	*
		595	* node distances:
		596	* node 0 1 2 3 4 5
		597	* 0: 10 15 17 21 28 26
		598	* 1: 15 10 15 23 26 23
		599	* 2: 17 15 10 26 23 21
		600	* 3: 21 28 26 10 15 17
		601	* 4: 23 26 23 15 10 15
		602	* 5: 26 23 21 17 15 10
		603	*
		604	* Fix things up by averaging out the off-trace clusters; resulting in:
		605	*
		606	* node 0 1 2 3 4 5
		607	* 0: 10 15 17 24 24 24
		608	* 1: 15 10 15 24 24 24
		609	* 2: 17 15 10 24 24 24
		610	* 3: 24 24 24 10 15 17
		611	* 4: 24 24 24 15 10 15
		612	* 5: 24 24 24 17 15 10
		613	*/
		614	static int slit_cluster_distance(int i, int j)
		615	{
		616	static int slit_valid = -1;
		617	int u = topology_num_nodes_per_package();
		618	long d = 0;
		619	int x, y;
		620
		621	if (slit_valid < 0) {
		622	slit_valid = slit_validate();
		623	if (!slit_valid)
		624	pr_err(FW_BUG "SLIT table doesn't have the expected form for SNC -- fixup disabled!\n");
		625	else
		626	pr_info("Fixing up SNC SLIT table.\n");
		627	}
		628
		629	/*
		630	* Is this a unit cluster on the trace?
		631	*/
		632	if ((i / u) == (j / u) \|\| !slit_valid)
		633	return node_distance(i, j);
		634
		635	/*
		636	* Off-trace cluster.
		637	*
		638	* Notably average out the symmetric pair of off-trace clusters to
		639	* ensure the resulting SLIT table is symmetric.
		640	*/
		641	x = i - (i % u);
		642	y = j - (j % u);
		643
		644	for (i = x; i < x + u; i++) {
		645	for (j = y; j < y + u; j++) {
		646	d += node_distance(i, j);
		647	d += node_distance(j, i);
		648	}
		649	}
		650
		651	return d / (2uu);
543	}	652	}
544		653
545	int arch_sched_node_distance(int from, int to)	654	int arch_sched_node_distance(int from, int to)
@@ -549,34 +658,14 @@ int arch_sched_node_distance(int from, int to) · 3 unmodified lines
549	switch (boot_cpu_data.x86_vfm) {	658	switch (boot_cpu_data.x86_vfm) {
550	case INTEL_GRANITERAPIDS_X:	659	case INTEL_GRANITERAPIDS_X:
551	case INTEL_ATOM_DARKMONT_X:	660	case INTEL_ATOM_DARKMONT_X:
552		661	if (topology_max_packages() == 1 \|\|
553	if (!x86_has_numa_in_package \|\| topology_max_packages() == 1 \|\|	662	topology_num_nodes_per_package() < 3)
554	d < REMOTE_DISTANCE)
555	return d;	663	return d;
556		664
557	/*	665	/*
558	* With SNC enabled, there could be too many levels of remote	666	* Handle SNC-3 asymmetries.
559	* NUMA node distances, creating NUMA domain levels
560	* including local nodes and partial remote nodes.
561	*
562	* Trim finer distance tuning for NUMA nodes in remote package
563	* for the purpose of building sched domains. Group NUMA nodes
564	* in the remote package in the same sched group.
565	* Simplify NUMA domains and avoid extra NUMA levels including
566	* different remote NUMA nodes and local nodes.
567	*
568	* GNR and CWF don't expect systems with more than 2 packages
569	* and more than 2 hops between packages. Single average remote
570	* distance won't be appropriate if there are more than 2
571	* packages as average distance to different remote packages
572	* could be different.
573	*/	667	*/
574	WARN_ONCE(topology_max_packages() > 2,	668	return slit_cluster_distance(from, to);
575	"sched: Expect only up to 2 packages for GNR or CWF, "
576	"but saw %d packages when building sched domains.",
577	topology_max_packages());
578
579	d = avg_remote_numa_distance();
580	}	669	}
581	return d;	670	return d;
582	}	671	}
@@ -606,7 +695,7 @@ void set_cpu_sibling_map(int cpu) · 23 unmodified lines
606	o = &cpu_data(i);	695	o = &cpu_data(i);
607		696
608	if (match_pkg(c, o) && !topology_same_node(c, o))	697	if (match_pkg(c, o) && !topology_same_node(c, o))
609	x86_has_numa_in_package = true;	698	WARN_ON_ONCE(topology_num_nodes_per_package() == 1);
610		699
611	if ((i == cpu) \|\| (has_smt && match_smt(c, o)))	700	if ((i == cpu) \|\| (has_smt && match_smt(c, o)))
612	link_mask(topology_sibling_cpumask, cpu, i);	701	link_mask(topology_sibling_cpumask, cpu, i);

arch/x86/kernel/traps.c+1−1

@@ -397,7 +397,7 @@ static inline void handle_invalid_op(struct pt_regs *regs) · 396 unmodified lines
397	ILL_ILLOPN, error_get_trap_addr(regs));	397	ILL_ILLOPN, error_get_trap_addr(regs));
398	}	398	}
399		399
400	static noinstr bool handle_bug(struct pt_regs *regs)	400	noinstr bool handle_bug(struct pt_regs *regs)
401	{	401	{
402	unsigned long addr = regs->ip;	402	unsigned long addr = regs->ip;
403	bool handled = false;	403	bool handled = false;

arch/x86/kernel/vmlinux.lds.S+1−0

@@ -427,6 +427,7 @@ SECTIONS · 426 unmodified lines
427	.llvm_bb_addr_map : { *(.llvm_bb_addr_map) }	427	.llvm_bb_addr_map : { *(.llvm_bb_addr_map) }
428	#endif	428	#endif
429		429
		430	MODINFO
430	ELF_DETAILS	431	ELF_DETAILS
431		432
432	DISCARDS	433	DISCARDS

arch/x86/kvm/Kconfig+0−1

@@ -20,7 +20,6 @@ if VIRTUALIZATION · 19 unmodified lines
20	config KVM_X86	20	config KVM_X86
21	def_tristate KVM if (KVM_INTEL != n \|\| KVM_AMD != n)	21	def_tristate KVM if (KVM_INTEL != n \|\| KVM_AMD != n)
22	select KVM_COMMON	22	select KVM_COMMON
23	select KVM_GENERIC_MMU_NOTIFIER
24	select KVM_ELIDE_TLB_FLUSH_IF_YOUNG	23	select KVM_ELIDE_TLB_FLUSH_IF_YOUNG
25	select KVM_MMU_LOCKLESS_AGING	24	select KVM_MMU_LOCKLESS_AGING
26	select HAVE_KVM_IRQCHIP	25	select HAVE_KVM_IRQCHIP

arch/x86/kvm/cpuid.c+4−1

 #define SYNTHESIZED_F(name)					\
 ({								\
 	kvm_cpu_cap_synthesized |= feature_bit(name);		\
-	F(name);						\
+								\
+	BUILD_BUG_ON(X86_FEATURE_##name >= MAX_CPU_FEATURES);	\
+	if (boot_cpu_has(X86_FEATURE_##name))			\
+		F(name);					\
 })
 /*

arch/x86/kvm/hyperv.c+5−4

 		if (entries[i] == KVM_HV_TLB_FLUSHALL_ENTRY)
 			goto out_flush_all;
-		if (is_noncanonical_invlpg_address(entries[i], vcpu))
-			continue;
 		/*
 		 * Lower 12 bits of 'address' encode the number of additional
 		 * pages to flush.
 		 */
 		gva = entries[i] & PAGE_MASK;
-		for (j = 0; j < (entries[i] & ~PAGE_MASK) + 1; j++)
+		for (j = 0; j < (entries[i] & ~PAGE_MASK) + 1; j++) {
+			if (is_noncanonical_invlpg_address(gva + j * PAGE_SIZE, vcpu))
+				continue;
 			kvm_x86_call(flush_tlb_gva)(vcpu, gva + j * PAGE_SIZE);
+		}
 		++vcpu->stat.tlb_flush;
 	}

arch/x86/kvm/ioapic.c+2−1

 	idx = srcu_read_lock(&kvm->irq_srcu);
 	gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
 	if (gsi != -1)
-		hlist_for_each_entry_rcu(kimn, &ioapic->mask_notifier_list, link)
+		hlist_for_each_entry_srcu(kimn, &ioapic->mask_notifier_list, link,
+				srcu_read_lock_held(&kvm->irq_srcu))
 			if (kimn->irq == gsi)
 				kimn->func(kimn, mask);
 	srcu_read_unlock(&kvm->irq_srcu, idx);

arch/x86/kvm/svm/avic.c+6−3

 	struct kvm_vcpu *vcpu = &svm->vcpu;
 	vmcb->control.int_ctl &= ~(AVIC_ENABLE_MASK | X2APIC_MODE_MASK);
 	vmcb->control.avic_physical_id &= ~AVIC_PHYSICAL_MAX_INDEX_MASK;
 	vmcb->control.avic_physical_id |= avic_get_max_physical_id(vcpu);
 	vmcb->control.int_ctl |= AVIC_ENABLE_MASK;
+	svm_clr_intercept(svm, INTERCEPT_CR8_WRITE);
 	/*
 	 * Note: KVM supports hybrid-AVIC mode, where KVM emulates x2APIC MSR
 	 * accesses, while interrupt injection to a running vCPU can be
 	vmcb->control.int_ctl &= ~(AVIC_ENABLE_MASK | X2APIC_MODE_MASK);
 	vmcb->control.avic_physical_id &= ~AVIC_PHYSICAL_MAX_INDEX_MASK;
+	if (!sev_es_guest(svm->vcpu.kvm))
+		svm_set_intercept(svm, INTERCEPT_CR8_WRITE);
 	/*
 	 * If running nested and the guest uses its own MSR bitmap, there
 	 * is no need to update L0's msr bitmap
 	vmcb->control.avic_physical_id = __sme_set(__pa(kvm_svm->avic_physical_id_table));
 	vmcb->control.avic_vapic_bar = APIC_DEFAULT_PHYS_BASE;
-	if (kvm_apicv_activated(svm->vcpu.kvm))
+	if (kvm_vcpu_apicv_active(&svm->vcpu))
 		avic_activate_vmcb(svm);
 	else
 		avic_deactivate_vmcb(svm);

arch/x86/kvm/svm/nested.c+10−2

 	return __nested_vmcb_check_controls(vcpu, ctl);
 }
+int nested_svm_check_cached_vmcb12(struct kvm_vcpu *vcpu)
+{
+	if (!nested_vmcb_check_save(vcpu) ||
+	    !nested_vmcb_check_controls(vcpu))
+		return -EINVAL;
+	return 0;
+}
 /*
  * If a feature is not advertised to L1, clear the corresponding vmcb12
  * intercept.
 	nested_copy_vmcb_control_to_cache(svm, &vmcb12->control);
 	nested_copy_vmcb_save_to_cache(svm, &vmcb12->save);
-	if (!nested_vmcb_check_save(vcpu) ||
+	if (nested_svm_check_cached_vmcb12(vcpu) < 0) {
-	    !nested_vmcb_check_controls(vcpu)) {
 		vmcb12->control.exit_code    = SVM_EXIT_ERR;
 		vmcb12->control.exit_info_1  = 0;
 		vmcb12->control.exit_info_2  = 0;

arch/x86/kvm/svm/svm.c+11−6

 	svm_set_intercept(svm, INTERCEPT_CR0_WRITE);
 	svm_set_intercept(svm, INTERCEPT_CR3_WRITE);
 	svm_set_intercept(svm, INTERCEPT_CR4_WRITE);
-	if (!kvm_vcpu_apicv_active(vcpu))
+	svm_set_intercept(svm, INTERCEPT_CR8_WRITE);
-		svm_set_intercept(svm, INTERCEPT_CR8_WRITE);
 	set_dr_intercepts(svm);
 	if (guest_cpu_cap_has(vcpu, X86_FEATURE_ERAPS))
 		svm->vmcb->control.erap_ctl |= ERAP_CONTROL_ALLOW_LARGER_RAP;
-	if (kvm_vcpu_apicv_active(vcpu))
+	if (enable_apicv && irqchip_in_kernel(vcpu->kvm))
 		avic_init_vmcb(svm, vmcb);
 	if (vnmi)
 static int cr8_write_interception(struct kvm_vcpu *vcpu)
 {
+	u8 cr8_prev = kvm_get_cr8(vcpu);
 	int r;
-	u8 cr8_prev = kvm_get_cr8(vcpu);
+	WARN_ON_ONCE(kvm_vcpu_apicv_active(vcpu));
 	/* instruction emulation calls kvm_set_cr8() */
 	r = cr_interception(vcpu);
 	if (lapic_in_kernel(vcpu))
 	vmcb12 = map.hva;
 	nested_copy_vmcb_control_to_cache(svm, &vmcb12->control);
 	nested_copy_vmcb_save_to_cache(svm, &vmcb12->save);
-	ret = enter_svm_guest_mode(vcpu, smram64->svm_guest_vmcb_gpa, vmcb12, false);
-	if (ret)
+	if (nested_svm_check_cached_vmcb12(vcpu) < 0)
+		goto unmap_save;
+	if (enter_svm_guest_mode(vcpu, smram64->svm_guest_vmcb_gpa,
+				 vmcb12, false) != 0)
 		goto unmap_save;
+	ret = 0;
 	svm->nested.nested_run_pending = 1;
 unmap_save:

arch/x86/kvm/svm/svm.h+1−0

@@ -797,6 +797,7 @@ static inline int nested_svm_simple_vmexit(struct vcpu_svm *svm, u32 exit_code) · 796 unmodified lines
797		797
798	int nested_svm_exit_handled(struct vcpu_svm *svm);	798	int nested_svm_exit_handled(struct vcpu_svm *svm);
799	int nested_svm_check_permissions(struct kvm_vcpu *vcpu);	799	int nested_svm_check_permissions(struct kvm_vcpu *vcpu);
		800	int nested_svm_check_cached_vmcb12(struct kvm_vcpu *vcpu);
800	int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,	801	int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
801	bool has_error_code, u32 error_code);	802	bool has_error_code, u32 error_code);
802	int nested_svm_exit_special(struct vcpu_svm *svm);	803	int nested_svm_exit_special(struct vcpu_svm *svm);

arch/x86/kvm/vmx/nested.c+45−16

@@ -3300,10 +3300,24 @@ static int nested_vmx_check_guest_state(struct kvm_vcpu *vcpu, · 3299 unmodified lines
3300	if (CC(vmcs12->guest_cr4 & X86_CR4_CET && !(vmcs12->guest_cr0 & X86_CR0_WP)))	3300	if (CC(vmcs12->guest_cr4 & X86_CR4_CET && !(vmcs12->guest_cr0 & X86_CR0_WP)))
3301	return -EINVAL;	3301	return -EINVAL;
3302		3302
3303	if ((vmcs12->vm_entry_controls & VM_ENTRY_LOAD_DEBUG_CONTROLS) &&	3303	if (vmcs12->vm_entry_controls & VM_ENTRY_LOAD_DEBUG_CONTROLS) {
3304	(CC(!kvm_dr7_valid(vmcs12->guest_dr7)) \|\|	3304	u64 debugctl = vmcs12->guest_ia32_debugctl;
3305	CC(!vmx_is_valid_debugctl(vcpu, vmcs12->guest_ia32_debugctl, false))))	3305
3306	return -EINVAL;	3306	/*
		3307	* FREEZE_IN_SMM is not virtualized, but allow L1 to set it in
		3308	* vmcs12's DEBUGCTL under a quirk for backwards compatibility.
		3309	* Note that the quirk only relaxes the consistency check. The
		3310	* vmcc02 bit is still under the control of the host. In
		3311	* particular, if a host administrator decides to clear the bit,
		3312	* then L1 has no say in the matter.
		3313	*/
		3314	if (kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_VMCS12_ALLOW_FREEZE_IN_SMM))
		3315	debugctl &= ~DEBUGCTLMSR_FREEZE_IN_SMM;
		3316
		3317	if (CC(!kvm_dr7_valid(vmcs12->guest_dr7)) \|\|
		3318	CC(!vmx_is_valid_debugctl(vcpu, debugctl, false)))
		3319	return -EINVAL;
		3320	}
3307		3321
3308	if ((vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_PAT) &&	3322	if ((vmcs12->vm_entry_controls & VM_ENTRY_LOAD_IA32_PAT) &&
3309	CC(!kvm_pat_valid(vmcs12->guest_ia32_pat)))	3323	CC(!kvm_pat_valid(vmcs12->guest_ia32_pat)))
@@ -6842,13 +6856,34 @@ void vmx_leave_nested(struct kvm_vcpu *vcpu) · 3532 unmodified lines
6842	free_nested(vcpu);	6856	free_nested(vcpu);
6843	}	6857	}
6844		6858
		6859	int nested_vmx_check_restored_vmcs12(struct kvm_vcpu *vcpu)
		6860	{
		6861	enum vm_entry_failure_code ignored;
		6862	struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
		6863
		6864	if (nested_cpu_has_shadow_vmcs(vmcs12) &&
		6865	vmcs12->vmcs_link_pointer != INVALID_GPA) {
		6866	struct vmcs12 *shadow_vmcs12 = get_shadow_vmcs12(vcpu);
		6867
		6868	if (shadow_vmcs12->hdr.revision_id != VMCS12_REVISION \|\|
		6869	!shadow_vmcs12->hdr.shadow_vmcs)
		6870	return -EINVAL;
		6871	}
		6872
		6873	if (nested_vmx_check_controls(vcpu, vmcs12) \|\|
		6874	nested_vmx_check_host_state(vcpu, vmcs12) \|\|
		6875	nested_vmx_check_guest_state(vcpu, vmcs12, &ignored))
		6876	return -EINVAL;
		6877
		6878	return 0;
		6879	}
		6880
6845	static int vmx_set_nested_state(struct kvm_vcpu *vcpu,	6881	static int vmx_set_nested_state(struct kvm_vcpu *vcpu,
6846	struct kvm_nested_state __user *user_kvm_nested_state,	6882	struct kvm_nested_state __user *user_kvm_nested_state,
6847	struct kvm_nested_state *kvm_state)	6883	struct kvm_nested_state *kvm_state)
6848	{	6884	{
6849	struct vcpu_vmx *vmx = to_vmx(vcpu);	6885	struct vcpu_vmx *vmx = to_vmx(vcpu);
6850	struct vmcs12 *vmcs12;	6886	struct vmcs12 *vmcs12;
6851	enum vm_entry_failure_code ignored;
6852	struct kvm_vmx_nested_state_data __user *user_vmx_nested_state =	6887	struct kvm_vmx_nested_state_data __user *user_vmx_nested_state =
6853	&user_kvm_nested_state->data.vmx[0];	6888	&user_kvm_nested_state->data.vmx[0];
6854	int ret;	6889	int ret;
@@ -6979,25 +7014,20 @@ static int vmx_set_nested_state(struct kvm_vcpu *vcpu, · 124 unmodified lines
6979	vmx->nested.mtf_pending =	7014	vmx->nested.mtf_pending =
6980	!!(kvm_state->flags & KVM_STATE_NESTED_MTF_PENDING);	7015	!!(kvm_state->flags & KVM_STATE_NESTED_MTF_PENDING);
6981		7016
6982	ret = -EINVAL;
6983	if (nested_cpu_has_shadow_vmcs(vmcs12) &&	7017	if (nested_cpu_has_shadow_vmcs(vmcs12) &&
6984	vmcs12->vmcs_link_pointer != INVALID_GPA) {	7018	vmcs12->vmcs_link_pointer != INVALID_GPA) {
6985	struct vmcs12 *shadow_vmcs12 = get_shadow_vmcs12(vcpu);	7019	struct vmcs12 *shadow_vmcs12 = get_shadow_vmcs12(vcpu);
6986		7020
		7021	ret = -EINVAL;
6987	if (kvm_state->size <	7022	if (kvm_state->size <
6988	sizeof(*kvm_state) +	7023	sizeof(*kvm_state) +
6989	sizeof(user_vmx_nested_state->vmcs12) + sizeof(*shadow_vmcs12))	7024	sizeof(user_vmx_nested_state->vmcs12) + sizeof(*shadow_vmcs12))
6990	goto error_guest_mode;	7025	goto error_guest_mode;
6991		7026
		7027	ret = -EFAULT;
6992	if (copy_from_user(shadow_vmcs12,	7028	if (copy_from_user(shadow_vmcs12,
6993	user_vmx_nested_state->shadow_vmcs12,	7029	user_vmx_nested_state->shadow_vmcs12,
6994	sizeof(*shadow_vmcs12))) {	7030	sizeof(*shadow_vmcs12)))
6995	ret = -EFAULT;
6996	goto error_guest_mode;
6997	}
6998
6999	if (shadow_vmcs12->hdr.revision_id != VMCS12_REVISION \|\|
7000	!shadow_vmcs12->hdr.shadow_vmcs)
7001	goto error_guest_mode;	7031	goto error_guest_mode;
7002	}	7032	}
7003		7033
@@ -7008,9 +7038,8 @@ static int vmx_set_nested_state(struct kvm_vcpu *vcpu, · 4 unmodified lines
7008	kvm_state->hdr.vmx.preemption_timer_deadline;	7038	kvm_state->hdr.vmx.preemption_timer_deadline;
7009	}	7039	}
7010		7040
7011	if (nested_vmx_check_controls(vcpu, vmcs12) \|\|	7041	ret = nested_vmx_check_restored_vmcs12(vcpu);
7012	nested_vmx_check_host_state(vcpu, vmcs12) \|\|	7042	if (ret < 0)
7013	nested_vmx_check_guest_state(vcpu, vmcs12, &ignored))
7014	goto error_guest_mode;	7043	goto error_guest_mode;
7015		7044
7016	vmx->nested.dirty_vmcs12 = true;	7045	vmx->nested.dirty_vmcs12 = true;

arch/x86/kvm/vmx/nested.h+1−0

@@ -22,6 +22,7 @@ void nested_vmx_setup_ctls_msrs(struct vmcs_config *vmcs_conf, u32 ept_caps); · 21 unmodified lines
22	void nested_vmx_hardware_unsetup(void);	22	void nested_vmx_hardware_unsetup(void);
23	__init int nested_vmx_hardware_setup(int (exit_handlers[])(struct kvm_vcpu ));	23	__init int nested_vmx_hardware_setup(int (exit_handlers[])(struct kvm_vcpu ));
24	void nested_vmx_set_vmcs_shadowing_bitmap(void);	24	void nested_vmx_set_vmcs_shadowing_bitmap(void);
		25	int nested_vmx_check_restored_vmcs12(struct kvm_vcpu *vcpu);
25	void nested_vmx_free_vcpu(struct kvm_vcpu *vcpu);	26	void nested_vmx_free_vcpu(struct kvm_vcpu *vcpu);
26	enum nvmx_vmentry_status nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu,	27	enum nvmx_vmentry_status nested_vmx_enter_non_root_mode(struct kvm_vcpu *vcpu,
27	bool from_vmentry);	28	bool from_vmentry);

arch/x86/kvm/vmx/vmx.c+7−3

 	}
 	vmx_add_auto_msr(&m->guest, msr, guest_val, VM_ENTRY_MSR_LOAD_COUNT, kvm);
-	vmx_add_auto_msr(&m->guest, msr, host_val, VM_EXIT_MSR_LOAD_COUNT, kvm);
+	vmx_add_auto_msr(&m->host, msr, host_val, VM_EXIT_MSR_LOAD_COUNT, kvm);
 }
 static bool update_transition_efer(struct vcpu_vmx *vmx)
 	}
 	if (vmx->nested.smm.guest_mode) {
+		/* Triple fault if the state is invalid.  */
+		if (nested_vmx_check_restored_vmcs12(vcpu) < 0)
+			return 1;
 		ret = nested_vmx_enter_non_root_mode(vcpu, false);
-		if (ret)
+		if (ret != NVMX_VMENTRY_SUCCESS)
-			return ret;
+			return 1;
 		vmx->nested.nested_run_pending = 1;
 		vmx->nested.smm.guest_mode = false;

arch/x86/kvm/x86.c+2−3

 bool __read_mostly enable_device_posted_irqs = true;
 EXPORT_SYMBOL_FOR_KVM_INTERNAL(enable_device_posted_irqs);
-const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
+const struct kvm_stats_desc kvm_vm_stats_desc[] = {
 	KVM_GENERIC_VM_STATS(),
 	STATS_DESC_COUNTER(VM, mmu_shadow_zapped),
 	STATS_DESC_COUNTER(VM, mmu_pte_write),
 		       sizeof(kvm_vm_stats_desc),
 };
-const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
+const struct kvm_stats_desc kvm_vcpu_stats_desc[] = {
 	KVM_GENERIC_VCPU_STATS(),
 	STATS_DESC_COUNTER(VCPU, pf_taken),
 	STATS_DESC_COUNTER(VCPU, pf_fixed),
 #endif
 	case KVM_CAP_NOP_IO_DELAY:
 	case KVM_CAP_MP_STATE:
-	case KVM_CAP_SYNC_MMU:
 	case KVM_CAP_USER_NMI:
 	case KVM_CAP_IRQ_INJECT_STATUS:
 	case KVM_CAP_IOEVENTFD:

arch/x86/mm/extable.c+2−5

 		return;
 	if (trapnr == X86_TRAP_UD) {
-		if (report_bug(regs->ip, regs) == BUG_TRAP_TYPE_WARN) {
+		if (handle_bug(regs))
-			/* Skip the ud2. */
-			regs->ip += LEN_UD2;
 			return;
-		}
 		/*
-		 * If this was a BUG and report_bug returns or if this
+		 * If this was a BUG and handle_bug returns or if this
 		 * was just a normal #UD, we want to continue onward and
 		 * crash.
 		 */

arch/x86/mm/numa.c+8−0

 	[0 ... MAX_LOCAL_APIC-1] = NUMA_NO_NODE
 };
+nodemask_t numa_phys_nodes_parsed __initdata;
 int numa_cpu_node(int cpu)
 {
 	u32 apicid = early_per_cpu(x86_cpu_to_apicid, cpu);
 	return NUMA_NO_NODE;
 }
+int __init num_phys_nodes(void)
+{
+	return bitmap_weight(numa_phys_nodes_parsed.bits, MAX_NUMNODES);
+}
 cpumask_var_t node_to_cpumask_map[MAX_NUMNODES];
 EXPORT_SYMBOL(node_to_cpumask_map);
 	       0LLU, PFN_PHYS(max_pfn) - 1);
 	node_set(0, numa_nodes_parsed);
+	node_set(0, numa_phys_nodes_parsed);
 	numa_add_memblk(0, 0, PFN_PHYS(max_pfn));
 	return 0;

arch/x86/mm/srat.c+2−0

 	}
 	set_apicid_to_node(apic_id, node);
 	node_set(node, numa_nodes_parsed);
+	node_set(node, numa_phys_nodes_parsed);
 	pr_debug("SRAT: PXM %u -> APIC 0x%04x -> Node %u\n", pxm, apic_id, node);
 }
 	set_apicid_to_node(apic_id, node);
 	node_set(node, numa_nodes_parsed);
+	node_set(node, numa_phys_nodes_parsed);
 	pr_debug("SRAT: PXM %u -> APIC 0x%02x -> Node %u\n", pxm, apic_id, node);
 }

arch/x86/net/bpf_jit_comp.c+2−11

@@ -438,17 +438,8 @@ static void emit_kcfi(u8 **pprog, u32 hash) · 437 unmodified lines
438		438
439	EMIT1_off32(0xb8, hash); /* movl $hash, %eax */	439	EMIT1_off32(0xb8, hash); /* movl $hash, %eax */
440	#ifdef CONFIG_CALL_PADDING	440	#ifdef CONFIG_CALL_PADDING
441	EMIT1(0x90);	441	for (int i = 0; i < CONFIG_FUNCTION_PADDING_CFI; i++)
442	EMIT1(0x90);	442	EMIT1(0x90);
443	EMIT1(0x90);
444	EMIT1(0x90);
445	EMIT1(0x90);
446	EMIT1(0x90);
447	EMIT1(0x90);
448	EMIT1(0x90);
449	EMIT1(0x90);
450	EMIT1(0x90);
451	EMIT1(0x90);
452	#endif	443	#endif
453	EMIT_ENDBR();	444	EMIT_ENDBR();
454		445

arch/x86/platform/efi/efi.c+1−1

@@ -836,7 +836,7 @@ static void __init __efi_enter_virtual_mode(void) · 835 unmodified lines
836	}	836	}
837		837
838	efi_check_for_embedded_firmwares();	838	efi_check_for_embedded_firmwares();
839	efi_free_boot_services();	839	efi_unmap_boot_services();
840		840
841	if (!efi_is_mixed())	841	if (!efi_is_mixed())
842	efi_native_runtime_setup();	842	efi_native_runtime_setup();

arch/x86/platform/efi/quirks.c+52−3

@@ -341,7 +341,7 @@ void __init efi_reserve_boot_services(void) · 340 unmodified lines
341		341
342	/*	342	/*
343	* Because the following memblock_reserve() is paired	343	* Because the following memblock_reserve() is paired
344	* with memblock_free_late() for this region in	344	* with free_reserved_area() for this region in
345	* efi_free_boot_services(), we must be extremely	345	* efi_free_boot_services(), we must be extremely
346	* careful not to reserve, and subsequently free,	346	* careful not to reserve, and subsequently free,
347	* critical regions of memory (like the kernel image) or	347	* critical regions of memory (like the kernel image) or
@@ -404,17 +404,33 @@ static void __init efi_unmap_pages(efi_memory_desc_t *md) · 56 unmodified lines
404	pr_err("Failed to unmap VA mapping for 0x%llx\n", va);	404	pr_err("Failed to unmap VA mapping for 0x%llx\n", va);
405	}	405	}
406		406
407	void __init efi_free_boot_services(void)	407	struct efi_freeable_range {
		408	u64 start;
		409	u64 end;
		410	};
		411
		412	static struct efi_freeable_range *ranges_to_free;
		413
		414	void __init efi_unmap_boot_services(void)
408	{	415	{
409	struct efi_memory_map_data data = { 0 };	416	struct efi_memory_map_data data = { 0 };
410	efi_memory_desc_t *md;	417	efi_memory_desc_t *md;
411	int num_entries = 0;	418	int num_entries = 0;
		419	int idx = 0;
		420	size_t sz;
412	void new, new_md;	421	void new, new_md;
413		422
414	/* Keep all regions for /sys/kernel/debug/efi */	423	/* Keep all regions for /sys/kernel/debug/efi */
415	if (efi_enabled(EFI_DBG))	424	if (efi_enabled(EFI_DBG))
416	return;	425	return;
417		426
		427	sz = sizeof(ranges_to_free) efi.memmap.nr_map + 1;
		428	ranges_to_free = kzalloc(sz, GFP_KERNEL);
		429	if (!ranges_to_free) {
		430	pr_err("Failed to allocate storage for freeable EFI regions\n");
		431	return;
		432	}
		433
418	for_each_efi_memory_desc(md) {	434	for_each_efi_memory_desc(md) {
419	unsigned long long start = md->phys_addr;	435	unsigned long long start = md->phys_addr;
420	unsigned long long size = md->num_pages << EFI_PAGE_SHIFT;	436	unsigned long long size = md->num_pages << EFI_PAGE_SHIFT;
@@ -471,7 +487,15 @@ void __init efi_free_boot_services(void) · 50 unmodified lines
471	start = SZ_1M;	487	start = SZ_1M;
472	}	488	}
473		489
474	memblock_free_late(start, size);	490	/*
		491	* With CONFIG_DEFERRED_STRUCT_PAGE_INIT parts of the memory
		492	* map are still not initialized and we can't reliably free
		493	* memory here.
		494	* Queue the ranges to free at a later point.
		495	*/
		496	ranges_to_free[idx].start = start;
		497	ranges_to_free[idx].end = start + size;
		498	idx++;
475	}	499	}
476		500
477	if (!num_entries)	501	if (!num_entries)
@@ -512,6 +536,31 @@ void __init efi_free_boot_services(void) · 34 unmodified lines
512	}	536	}
513	}	537	}
514		538
		539	static int __init efi_free_boot_services(void)
		540	{
		541	struct efi_freeable_range *range = ranges_to_free;
		542	unsigned long freed = 0;
		543
		544	if (!ranges_to_free)
		545	return 0;
		546
		547	while (range->start) {
		548	void *start = phys_to_virt(range->start);
		549	void *end = phys_to_virt(range->end);
		550
		551	free_reserved_area(start, end, -1, NULL);
		552	freed += (end - start);
		553	range++;
		554	}
		555	kfree(ranges_to_free);
		556
		557	if (freed)
		558	pr_info("Freeing EFI boot services memory: %ldK\n", freed / SZ_1K);
		559
		560	return 0;
		561	}
		562	arch_initcall(efi_free_boot_services);
		563
515	/*	564	/*
516	* A number of config table entries get remapped to virtual addresses	565	* A number of config table entries get remapped to virtual addresses
517	* after entering EFI virtual mode. However, the kexec kernel requires	566	* after entering EFI virtual mode. However, the kexec kernel requires

arch/x86/platform/pvh/enlighten.c+1−6

 const unsigned int __initconst pvh_start_info_sz = sizeof(pvh_start_info);
-static u64 __init pvh_get_root_pointer(void)
-{
-	return pvh_start_info.rsdp_paddr;
-}
 /*
  * Xen guests are able to obtain the memory map from the hypervisor via the
  * HYPERVISOR_memory_op hypercall.
 	pvh_bootparams.hdr.version = (2 << 8) | 12;
 	pvh_bootparams.hdr.type_of_loader = ((xen_guest ? 0x9 : 0xb) << 4) | 0;
-	x86_init.acpi.get_root_pointer = pvh_get_root_pointer;
+	pvh_bootparams.acpi_rsdp_addr = pvh_start_info.rsdp_paddr;
 }
 /*

arch/x86/xen/enlighten_pv.c+1−1

@@ -392,7 +392,7 @@ static void __init xen_init_capabilities(void) · 391 unmodified lines
392		392
393	/*	393	/*
394	* Xen PV would need some work to support PCID: CR3 handling as well	394	* Xen PV would need some work to support PCID: CR3 handling as well
395	* as xen_flush_tlb_others() would need updating.	395	* as xen_flush_tlb_multi() would need updating.
396	*/	396	*/
397	setup_clear_cpu_cap(X86_FEATURE_PCID);	397	setup_clear_cpu_cap(X86_FEATURE_PCID);
398		398

arch/x86/xen/mmu_pv.c+9−0

 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
 #endif
+static pud_t level3_ident_pgt[PTRS_PER_PUD] __page_aligned_bss;
+static pmd_t level2_ident_pgt[PTRS_PER_PMD] __page_aligned_bss;
 /*
  * Protects atomic reservation decrease/increase against concurrent increases.
  * Also protects non-atomic updates of current_pages and balloon lists.
 	/* Zap identity mapping */
 	init_top_pgt[0] = __pgd(0);
+	init_top_pgt[pgd_index(__PAGE_OFFSET_BASE_L4)].pgd =
+		__pa_symbol(level3_ident_pgt) + _KERNPG_TABLE_NOENC;
+	init_top_pgt[pgd_index(__START_KERNEL_map)].pgd =
+		__pa_symbol(level3_kernel_pgt) + _PAGE_TABLE_NOENC;
+	level3_ident_pgt[0].pud = __pa_symbol(level2_ident_pgt) + _KERNPG_TABLE_NOENC;
 	/* Pre-constructed entries are in pfn, so convert to mfn */
 	/* L4[273] -> level3_ident_pgt  */
 	/* L4[511] -> level3_kernel_pgt */

block/blk-map.c+1−2

@@ -398,8 +398,7 @@ static struct bio bio_copy_kern(struct request rq, void *data, unsigned int le · 397 unmodified lines
398	if (op_is_write(op))	398	if (op_is_write(op))
399	memcpy(page_address(page), p, bytes);	399	memcpy(page_address(page), p, bytes);
400		400
401	if (bio_add_page(bio, page, bytes, 0) < bytes)	401	__bio_add_page(bio, page, bytes, 0);
402	break;
403		402
404	len -= bytes;	403	len -= bytes;
405	p += bytes;	404	p += bytes;

block/blk-mq.c+30−15

 	}
 }
-static int blk_mq_realloc_tag_set_tags(struct blk_mq_tag_set *set,
+static struct blk_mq_tags **blk_mq_prealloc_tag_set_tags(
-				       int new_nr_hw_queues)
+				struct blk_mq_tag_set *set,
+				int new_nr_hw_queues)
 {
 	struct blk_mq_tags **new_tags;
 	int i;
 	if (set->nr_hw_queues >= new_nr_hw_queues)
-		goto done;
+		return NULL;
 	new_tags = kcalloc_node(new_nr_hw_queues, sizeof(struct blk_mq_tags *),
 				GFP_KERNEL, set->numa_node);
 	if (!new_tags)
-		return -ENOMEM;
+		return ERR_PTR(-ENOMEM);
 	if (set->tags)
 		memcpy(new_tags, set->tags, set->nr_hw_queues *
 		       sizeof(*set->tags));
-	kfree(set->tags);
-	set->tags = new_tags;
 	for (i = set->nr_hw_queues; i < new_nr_hw_queues; i++) {
-		if (!__blk_mq_alloc_map_and_rqs(set, i)) {
+		if (blk_mq_is_shared_tags(set->flags)) {
-			while (--i >= set->nr_hw_queues)
+			new_tags[i] = set->shared_tags;
-				__blk_mq_free_map_and_rqs(set, i);
+		} else {
-			return -ENOMEM;
+			new_tags[i] = blk_mq_alloc_map_and_rqs(set, i,
+					set->queue_depth);
+			if (!new_tags[i])
+				goto out_unwind;
 		}
 		cond_resched();
 	}
-done:
+	return new_tags;
-	set->nr_hw_queues = new_nr_hw_queues;
+out_unwind:
-	return 0;
+	while (--i >= set->nr_hw_queues) {
+		if (!blk_mq_is_shared_tags(set->flags))
+			blk_mq_free_map_and_rqs(set, new_tags[i], i);
+	}
+	kfree(new_tags);
+	return ERR_PTR(-ENOMEM);
 }
 /*
 	unsigned int memflags;
 	int i;
 	struct xarray elv_tbl;
+	struct blk_mq_tags **new_tags;
 	bool queues_frozen = false;
 	lockdep_assert_held(&set->tag_list_lock);
 		if (blk_mq_elv_switch_none(q, &elv_tbl))
 			goto switch_back;
+	new_tags = blk_mq_prealloc_tag_set_tags(set, nr_hw_queues);
+	if (IS_ERR(new_tags))
+		goto switch_back;
 	list_for_each_entry(q, &set->tag_list, tag_set_list)
 		blk_mq_freeze_queue_nomemsave(q);
 	queues_frozen = true;
-	if (blk_mq_realloc_tag_set_tags(set, nr_hw_queues) < 0)
+	if (new_tags) {
-		goto switch_back;
+		kfree(set->tags);
+		set->tags = new_tags;
+	}
+	set->nr_hw_queues = nr_hw_queues;
 fallback:
 	blk_mq_update_queue_map(set);

block/blk-sysfs.c+7−1

 	/*
 	 * Serialize updating nr_requests with concurrent queue_requests_store()
 	 * and switching elevator.
+	 *
+	 * Use trylock to avoid circular lock dependency with kernfs active
+	 * reference during concurrent disk deletion:
+	 *   update_nr_hwq_lock -> kn->active (via del_gendisk -> kobject_del)
+	 *   kn->active -> update_nr_hwq_lock (via this sysfs write path)
 	 */
-	down_write(&set->update_nr_hwq_lock);
+	if (!down_write_trylock(&set->update_nr_hwq_lock))
+		return -EBUSY;
 	if (nr == q->nr_requests)
 		goto unlock;

block/elevator.c+11−1

 	elv_iosched_load_module(ctx.name);
 	ctx.type = elevator_find_get(ctx.name);
-	down_read(&set->update_nr_hwq_lock);
+	/*
+	 * Use trylock to avoid circular lock dependency with kernfs active
+	 * reference during concurrent disk deletion:
+	 *   update_nr_hwq_lock -> kn->active (via del_gendisk -> kobject_del)
+	 *   kn->active -> update_nr_hwq_lock (via this sysfs write path)
+	 */
+	if (!down_read_trylock(&set->update_nr_hwq_lock)) {
+		ret = -EBUSY;
+		goto out;
+	}
 	if (!blk_queue_no_elv_switch(q)) {
 		ret = elevator_change(q, &ctx);
 		if (!ret)
 	}
 	up_read(&set->update_nr_hwq_lock);
+out:
 	if (ctx.type)
 		elevator_put(ctx.type);
 	return ret;

crypto/Kconfig+0−9

 	  - blake2b-384
 	  - blake2b-512
-	  Used by the btrfs filesystem.
 	  See https://blake2.net for further information.
 config CRYPTO_CMAC
 	  10118-3), including HMAC support.
 	  This is required for IPsec AH (XFRM_AH) and IPsec ESP (XFRM_ESP).
-	  Used by the btrfs filesystem, Ceph, NFS, and SMB.
 config CRYPTO_SHA512
 	tristate "SHA-384 and SHA-512"
 	  Extremely fast, working at speeds close to RAM limits.
-	  Used by the btrfs filesystem.
 endmenu
 menu "CRCs (cyclic redundancy checks)"
 	  on Communications, Vol. 41, No. 6, June 1993, selected for use with
 	  iSCSI.
-	  Used by btrfs, ext4, jbd2, NVMeoF/TCP, and iSCSI.
 config CRYPTO_CRC32
 	tristate "CRC32"
 	select CRYPTO_HASH
 	help
 	  CRC32 CRC algorithm (IEEE 802.3)
-	  Used by RoCEv2 and f2fs.
 endmenu
 menu "Compression"

crypto/testmgr.c+2−2

@@ -4132,7 +4132,7 @@ static const struct alg_test_desc alg_test_descs[] = { · 4131 unmodified lines
4132	.fips_allowed = 1,	4132	.fips_allowed = 1,
4133	}, {	4133	}, {
4134	.alg = "authenc(hmac(sha224),cbc(aes))",	4134	.alg = "authenc(hmac(sha224),cbc(aes))",
4135	.generic_driver = "authenc(hmac-sha224-lib,cbc(aes-generic))",	4135	.generic_driver = "authenc(hmac-sha224-lib,cbc(aes-lib))",
4136	.test = alg_test_aead,	4136	.test = alg_test_aead,
4137	.suite = {	4137	.suite = {
4138	.aead = __VECS(hmac_sha224_aes_cbc_tv_temp)	4138	.aead = __VECS(hmac_sha224_aes_cbc_tv_temp)
@@ -4194,7 +4194,7 @@ static const struct alg_test_desc alg_test_descs[] = { · 55 unmodified lines
4194	.fips_allowed = 1,	4194	.fips_allowed = 1,
4195	}, {	4195	}, {
4196	.alg = "authenc(hmac(sha384),cbc(aes))",	4196	.alg = "authenc(hmac(sha384),cbc(aes))",
4197	.generic_driver = "authenc(hmac-sha384-lib,cbc(aes-generic))",	4197	.generic_driver = "authenc(hmac-sha384-lib,cbc(aes-lib))",
4198	.test = alg_test_aead,	4198	.test = alg_test_aead,
4199	.suite = {	4199	.suite = {
4200	.aead = __VECS(hmac_sha384_aes_cbc_tv_temp)	4200	.aead = __VECS(hmac_sha384_aes_cbc_tv_temp)

drivers/accel/amdxdna/aie2_ctx.c+17−28

 #include "amdxdna_pci_drv.h"
 #include "amdxdna_pm.h"
-static bool force_cmdlist;
+static bool force_cmdlist = true;
 module_param(force_cmdlist, bool, 0600);
-MODULE_PARM_DESC(force_cmdlist, "Force use command list (Default false)");
+MODULE_PARM_DESC(force_cmdlist, "Force use command list (Default true)");
 #define HWCTX_MAX_TIMEOUT	60000 /* milliseconds */
 {
 	drm_sched_stop(&hwctx->priv->sched, bad_job);
 	aie2_destroy_context(xdna->dev_handle, hwctx);
+	drm_sched_start(&hwctx->priv->sched, 0);
 }
 static int aie2_hwctx_restart(struct amdxdna_dev *xdna, struct amdxdna_hwctx *hwctx)
 	}
 out:
-	drm_sched_start(&hwctx->priv->sched, 0);
 	XDNA_DBG(xdna, "%s restarted, ret %d", hwctx->name, ret);
 	return ret;
 }
 	trace_xdna_job(&job->base, job->hwctx->name, "signaled fence", job->seq);
-	amdxdna_pm_suspend_put(job->hwctx->client->xdna);
 	job->hwctx->priv->completed++;
 	dma_fence_signal(fence);
 	cmd_abo = job->cmd_bo;
 	if (unlikely(job->job_timeout)) {
-		amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_TIMEOUT);
+		amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_TIMEOUT);
 		ret = -EINVAL;
 		goto out;
 	}
 	if (unlikely(!data) || unlikely(size != sizeof(u32))) {
-		amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ABORT);
+		amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_ABORT);
 		ret = -EINVAL;
 		goto out;
 	}
 	if (status == AIE2_STATUS_SUCCESS)
 		amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_COMPLETED);
 	else
-		amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ERROR);
+		amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_ERROR);
 out:
 	aie2_sched_notify(job);
 	cmd_abo = job->cmd_bo;
 	if (unlikely(job->job_timeout)) {
-		amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_TIMEOUT);
+		amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_TIMEOUT);
 		ret = -EINVAL;
 		goto out;
 	}
 	if (unlikely(!data) || unlikely(size != sizeof(u32) * 3)) {
-		amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ABORT);
+		amdxdna_cmd_set_error(cmd_abo, job, 0, ERT_CMD_STATE_ABORT);
 		ret = -EINVAL;
 		goto out;
 	}
 		 fail_cmd_idx, fail_cmd_status);
 	if (fail_cmd_status == AIE2_STATUS_SUCCESS) {
-		amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ABORT);
+		amdxdna_cmd_set_error(cmd_abo, job, fail_cmd_idx, ERT_CMD_STATE_ABORT);
 		ret = -EINVAL;
-		goto out;
+	} else {
+		amdxdna_cmd_set_error(cmd_abo, job, fail_cmd_idx, ERT_CMD_STATE_ERROR);
 	}
-	amdxdna_cmd_set_state(cmd_abo, ERT_CMD_STATE_ERROR);
-	if (amdxdna_cmd_get_op(cmd_abo) == ERT_CMD_CHAIN) {
-		struct amdxdna_cmd_chain *cc = amdxdna_cmd_get_payload(cmd_abo, NULL);
-		cc->error_index = fail_cmd_idx;
-		if (cc->error_index >= cc->command_count)
-			cc->error_index = 0;
-	}
 out:
 	aie2_sched_notify(job);
 	return ret;
 	kref_get(&job->refcnt);
 	fence = dma_fence_get(job->fence);
-	ret = amdxdna_pm_resume_get(hwctx->client->xdna);
-	if (ret)
-		goto out;
 	if (job->drv_cmd) {
 		switch (job->drv_cmd->opcode) {
 		case SYNC_DEBUG_BO:
 out:
 	if (ret) {
-		amdxdna_pm_suspend_put(hwctx->client->xdna);
 		dma_fence_put(job->fence);
 		aie2_job_put(job);
 		mmput(job->mm);
 	if (AIE2_FEATURE_ON(xdna->dev_handle, AIE2_TEMPORAL_ONLY)) {
 		ret = aie2_destroy_context(xdna->dev_handle, hwctx);
-		if (ret)
+		if (ret && ret != -ENODEV)
 			XDNA_ERR(xdna, "Destroy temporal only context failed, ret %d", ret);
 	} else {
 		ret = xrs_release_resource(xdna->xrs_hdl, (uintptr_t)hwctx);
 		goto free_entity;
 	}
-	ret = amdxdna_pm_resume_get(xdna);
+	ret = amdxdna_pm_resume_get_locked(xdna);
 	if (ret)
 		goto free_col_list;
 	if (!hwctx->cus)
 		return -ENOMEM;
-	ret = amdxdna_pm_resume_get(xdna);
+	ret = amdxdna_pm_resume_get_locked(xdna);
 	if (ret)
 		goto free_cus;
 	ret = dma_resv_wait_timeout(gobj->resv, DMA_RESV_USAGE_BOOKKEEP,
 				    true, MAX_SCHEDULE_TIMEOUT);
-	if (!ret || ret == -ERESTARTSYS)
+	if (!ret)
 		XDNA_ERR(xdna, "Failed to wait for bo, ret %ld", ret);
+	else if (ret == -ERESTARTSYS)
+		XDNA_DBG(xdna, "Wait for bo interrupted by signal");
 }

drivers/accel/amdxdna/aie2_message.c+38−13

 		return -ENODEV;
 	ret = xdna_send_msg_wait(xdna, ndev->mgmt_chann, msg);
-	if (ret == -ETIME) {
+	if (ret == -ETIME)
-		xdna_mailbox_stop_channel(ndev->mgmt_chann);
+		aie2_destroy_mgmt_chann(ndev);
-		xdna_mailbox_destroy_channel(ndev->mgmt_chann);
-		ndev->mgmt_chann = NULL;
-	}
 	if (!ret && *hdl->status != AIE2_STATUS_SUCCESS) {
 		XDNA_ERR(xdna, "command opcode 0x%x failed, status 0x%x",
 	req.context_id = id;
 	ret = aie2_send_mgmt_msg_wait(ndev, &msg);
-	if (ret)
+	if (ret && ret != -ENODEV)
 		XDNA_WARN(xdna, "Destroy context failed, ret %d", ret);
+	else if (ret == -ENODEV)
+		XDNA_DBG(xdna, "Destroy context: device already stopped");
 	return ret;
 }
 	}
 	intr_reg = i2x.mb_head_ptr_reg + 4;
-	hwctx->priv->mbox_chann = xdna_mailbox_create_channel(ndev->mbox, &x2i, &i2x,
+	hwctx->priv->mbox_chann = xdna_mailbox_alloc_channel(ndev->mbox);
-							      intr_reg, ret);
 	if (!hwctx->priv->mbox_chann) {
 		XDNA_ERR(xdna, "Not able to create channel");
 		ret = -EINVAL;
 		goto del_ctx_req;
 	}
+	ret = xdna_mailbox_start_channel(hwctx->priv->mbox_chann, &x2i, &i2x,
+					 intr_reg, ret);
+	if (ret) {
+		XDNA_ERR(xdna, "Not able to create channel");
+		ret = -EINVAL;
+		goto free_channel;
+	}
 	ndev->hwctx_num++;
 	XDNA_DBG(xdna, "Mailbox channel irq: %d, msix_id: %d", ret, resp.msix_id);
 	return 0;
+free_channel:
+	xdna_mailbox_free_channel(hwctx->priv->mbox_chann);
 del_ctx_req:
 	aie2_destroy_context_req(ndev, hwctx->fw_ctx_id);
 	return ret;
 	struct amdxdna_dev *xdna = ndev->xdna;
 	int ret;
+	if (!hwctx->priv->mbox_chann)
+		return 0;
 	xdna_mailbox_stop_channel(hwctx->priv->mbox_chann);
 	ret = aie2_destroy_context_req(ndev, hwctx->fw_ctx_id);
-	xdna_mailbox_destroy_channel(hwctx->priv->mbox_chann);
+	xdna_mailbox_free_channel(hwctx->priv->mbox_chann);
 	XDNA_DBG(xdna, "Destroyed fw ctx %d", hwctx->fw_ctx_id);
 	hwctx->priv->mbox_chann = NULL;
 	hwctx->fw_ctx_id = -1;
 	u32 cmd_len;
 	void *cmd;
-	memset(npu_slot, 0, sizeof(*npu_slot));
 	cmd = amdxdna_cmd_get_payload(cmd_bo, &cmd_len);
 	if (*size < sizeof(*npu_slot) + cmd_len)
 		return -EINVAL;
+	memset(npu_slot, 0, sizeof(*npu_slot));
 	npu_slot->cu_idx = amdxdna_cmd_get_cu_idx(cmd_bo);
 	if (npu_slot->cu_idx == INVALID_CU_IDX)
 		return -EINVAL;
 	u32 cmd_len;
 	u32 arg_sz;
-	memset(npu_slot, 0, sizeof(*npu_slot));
 	sn = amdxdna_cmd_get_payload(cmd_bo, &cmd_len);
 	arg_sz = cmd_len - sizeof(*sn);
 	if (cmd_len < sizeof(*sn) || arg_sz > MAX_NPU_ARGS_SIZE)
 	if (*size < sizeof(*npu_slot) + arg_sz)
 		return -EINVAL;
+	memset(npu_slot, 0, sizeof(*npu_slot));
 	npu_slot->cu_idx = amdxdna_cmd_get_cu_idx(cmd_bo);
 	if (npu_slot->cu_idx == INVALID_CU_IDX)
 		return -EINVAL;
 	u32 cmd_len;
 	u32 arg_sz;
-	memset(npu_slot, 0, sizeof(*npu_slot));
 	pd = amdxdna_cmd_get_payload(cmd_bo, &cmd_len);
 	arg_sz = cmd_len - sizeof(*pd);
 	if (cmd_len < sizeof(*pd) || arg_sz > MAX_NPU_ARGS_SIZE)
 	if (*size < sizeof(*npu_slot) + arg_sz)
 		return -EINVAL;
+	memset(npu_slot, 0, sizeof(*npu_slot));
 	npu_slot->cu_idx = amdxdna_cmd_get_cu_idx(cmd_bo);
 	if (npu_slot->cu_idx == INVALID_CU_IDX)
 		return -EINVAL;
 	u32 cmd_len;
 	u32 arg_sz;
-	memset(npu_slot, 0, sizeof(*npu_slot));
 	pd = amdxdna_cmd_get_payload(cmd_bo, &cmd_len);
 	arg_sz = cmd_len - sizeof(*pd);
 	if (cmd_len < sizeof(*pd) || arg_sz > MAX_NPU_ARGS_SIZE)
 	if (*size < sizeof(*npu_slot) + arg_sz)
 		return -EINVAL;
+	memset(npu_slot, 0, sizeof(*npu_slot));
 	npu_slot->type = EXEC_NPU_TYPE_ELF;
 	npu_slot->inst_buf_addr = pd->inst_buf;
 	npu_slot->save_buf_addr = pd->save_buf;
 		ndev->exec_msg_ops = &legacy_exec_message_ops;
 }
+void aie2_destroy_mgmt_chann(struct amdxdna_dev_hdl *ndev)
+{
+	struct amdxdna_dev *xdna = ndev->xdna;
+	drm_WARN_ON(&xdna->ddev, !mutex_is_locked(&xdna->dev_lock));
+	if (!ndev->mgmt_chann)
+		return;
+	xdna_mailbox_stop_channel(ndev->mgmt_chann);
+	xdna_mailbox_free_channel(ndev->mgmt_chann);
+	ndev->mgmt_chann = NULL;
+}
 static inline struct amdxdna_gem_obj *
 aie2_cmdlist_get_cmd_buf(struct amdxdna_sched_job *job)
 {

drivers/accel/amdxdna/aie2_pci.c+64−38

 module_param(aie2_max_col, uint, 0600);
 MODULE_PARM_DESC(aie2_max_col, "Maximum column could be used");
+static char *npu_fw[] = {
+	"npu_7.sbin",
+	"npu.sbin"
+};
 /*
  * The management mailbox channel is allocated by firmware.
  * The related register and ring buffer information is on SRAM BAR.
 		return;
 	}
+	aie2_runtime_cfg(ndev, AIE2_RT_CFG_CLK_GATING, NULL);
 	aie2_mgmt_fw_fini(ndev);
-	xdna_mailbox_stop_channel(ndev->mgmt_chann);
+	aie2_destroy_mgmt_chann(ndev);
-	xdna_mailbox_destroy_channel(ndev->mgmt_chann);
-	ndev->mgmt_chann = NULL;
 	drmm_kfree(&xdna->ddev, ndev->mbox);
 	ndev->mbox = NULL;
 	aie2_psp_stop(ndev->psp_hdl);
 	}
 	pci_set_master(pdev);
+	mbox_res.ringbuf_base = ndev->sram_base;
+	mbox_res.ringbuf_size = pci_resource_len(pdev, xdna->dev_info->sram_bar);
+	mbox_res.mbox_base = ndev->mbox_base;
+	mbox_res.mbox_size = MBOX_SIZE(ndev);
+	mbox_res.name = "xdna_mailbox";
+	ndev->mbox = xdnam_mailbox_create(&xdna->ddev, &mbox_res);
+	if (!ndev->mbox) {
+		XDNA_ERR(xdna, "failed to create mailbox device");
+		ret = -ENODEV;
+		goto disable_dev;
+	}
+	ndev->mgmt_chann = xdna_mailbox_alloc_channel(ndev->mbox);
+	if (!ndev->mgmt_chann) {
+		XDNA_ERR(xdna, "failed to alloc channel");
+		ret = -ENODEV;
+		goto disable_dev;
+	}
 	ret = aie2_smu_init(ndev);
 	if (ret) {
 		XDNA_ERR(xdna, "failed to init smu, ret %d", ret);
-		goto disable_dev;
+		goto free_channel;
 	}
 	ret = aie2_psp_start(ndev->psp_hdl);
 		goto stop_psp;
 	}
-	mbox_res.ringbuf_base = ndev->sram_base;
-	mbox_res.ringbuf_size = pci_resource_len(pdev, xdna->dev_info->sram_bar);
-	mbox_res.mbox_base = ndev->mbox_base;
-	mbox_res.mbox_size = MBOX_SIZE(ndev);
-	mbox_res.name = "xdna_mailbox";
-	ndev->mbox = xdnam_mailbox_create(&xdna->ddev, &mbox_res);
-	if (!ndev->mbox) {
-		XDNA_ERR(xdna, "failed to create mailbox device");
-		ret = -ENODEV;
-		goto stop_psp;
-	}
 	mgmt_mb_irq = pci_irq_vector(pdev, ndev->mgmt_chan_idx);
 	if (mgmt_mb_irq < 0) {
 		ret = mgmt_mb_irq;
 	}
 	xdna_mailbox_intr_reg = ndev->mgmt_i2x.mb_head_ptr_reg + 4;
-	ndev->mgmt_chann = xdna_mailbox_create_channel(ndev->mbox,
+	ret = xdna_mailbox_start_channel(ndev->mgmt_chann,
-						       &ndev->mgmt_x2i,
+					 &ndev->mgmt_x2i,
-						       &ndev->mgmt_i2x,
+					 &ndev->mgmt_i2x,
-						       xdna_mailbox_intr_reg,
+					 xdna_mailbox_intr_reg,
-						       mgmt_mb_irq);
+					 mgmt_mb_irq);
-	if (!ndev->mgmt_chann) {
+	if (ret) {
-		XDNA_ERR(xdna, "failed to create management mailbox channel");
+		XDNA_ERR(xdna, "failed to start management mailbox channel");
 		ret = -EINVAL;
 		goto stop_psp;
 	}
-	ret = aie2_pm_init(ndev);
+	ret = aie2_mgmt_fw_init(ndev);
 	if (ret) {
-		XDNA_ERR(xdna, "failed to init pm, ret %d", ret);
+		XDNA_ERR(xdna, "initial mgmt firmware failed, ret %d", ret);
-		goto destroy_mgmt_chann;
+		goto stop_fw;
 	}
-	ret = aie2_mgmt_fw_init(ndev);
+	ret = aie2_pm_init(ndev);
 	if (ret) {
-		XDNA_ERR(xdna, "initial mgmt firmware failed, ret %d", ret);
+		XDNA_ERR(xdna, "failed to init pm, ret %d", ret);
-		goto destroy_mgmt_chann;
+		goto stop_fw;
 	}
 	ret = aie2_mgmt_fw_query(ndev);
 	if (ret) {
 		XDNA_ERR(xdna, "failed to query fw, ret %d", ret);
-		goto destroy_mgmt_chann;
+		goto stop_fw;
 	}
 	ret = aie2_error_async_events_alloc(ndev);
 	if (ret) {
 		XDNA_ERR(xdna, "Allocate async events failed, ret %d", ret);
-		goto destroy_mgmt_chann;
+		goto stop_fw;
 	}
 	ndev->dev_status = AIE2_DEV_START;
 	return 0;
-destroy_mgmt_chann:
+stop_fw:
+	aie2_suspend_fw(ndev);
 	xdna_mailbox_stop_channel(ndev->mgmt_chann);
-	xdna_mailbox_destroy_channel(ndev->mgmt_chann);
 stop_psp:
 	aie2_psp_stop(ndev->psp_hdl);
 fini_smu:
 	aie2_smu_fini(ndev);
+free_channel:
+	xdna_mailbox_free_channel(ndev->mgmt_chann);
+	ndev->mgmt_chann = NULL;
 disable_dev:
 	pci_disable_device(pdev);
 {
 	struct amdxdna_client *client;
-	guard(mutex)(&xdna->dev_lock);
 	list_for_each_entry(client, &xdna->client_list, node)
 		aie2_hwctx_suspend(client);
 	struct psp_config psp_conf;
 	const struct firmware *fw;
 	unsigned long bars = 0;
+	char *fw_full_path;
 	int i, nvec, ret;
 	if (!hypervisor_is_type(X86_HYPER_NATIVE)) {
 	ndev->priv = xdna->dev_info->dev_priv;
 	ndev->xdna = xdna;
-	ret = request_firmware(&fw, ndev->priv->fw_path, &pdev->dev);
+	for (i = 0; i < ARRAY_SIZE(npu_fw); i++) {
+		fw_full_path = kasprintf(GFP_KERNEL, "%s%s", ndev->priv->fw_path, npu_fw[i]);
+		if (!fw_full_path)
+			return -ENOMEM;
+		ret = firmware_request_nowarn(&fw, fw_full_path, &pdev->dev);
+		kfree(fw_full_path);
+		if (!ret) {
+			XDNA_INFO(xdna, "Load firmware %s%s", ndev->priv->fw_path, npu_fw[i]);
+			break;
+		}
+	}
 	if (ret) {
 		XDNA_ERR(xdna, "failed to request_firmware %s, ret %d",
 			 ndev->priv->fw_path, ret);
 	if (!drm_dev_enter(&xdna->ddev, &idx))
 		return -ENODEV;
-	ret = amdxdna_pm_resume_get(xdna);
+	ret = amdxdna_pm_resume_get_locked(xdna);
 	if (ret)
 		goto dev_exit;
 	if (!drm_dev_enter(&xdna->ddev, &idx))
 		return -ENODEV;
-	ret = amdxdna_pm_resume_get(xdna);
+	ret = amdxdna_pm_resume_get_locked(xdna);
 	if (ret)
 		goto dev_exit;
 	if (!drm_dev_enter(&xdna->ddev, &idx))
 		return -ENODEV;
-	ret = amdxdna_pm_resume_get(xdna);
+	ret = amdxdna_pm_resume_get_locked(xdna);
 	if (ret)
 		goto dev_exit;

drivers/accel/amdxdna/aie2_pci.h+1−0

@@ -303,6 +303,7 @@ int aie2_get_array_async_error(struct amdxdna_dev_hdl *ndev, · 302 unmodified lines
303		303
304	/* aie2_message.c */	304	/* aie2_message.c */
305	void aie2_msg_init(struct amdxdna_dev_hdl *ndev);	305	void aie2_msg_init(struct amdxdna_dev_hdl *ndev);
		306	void aie2_destroy_mgmt_chann(struct amdxdna_dev_hdl *ndev);
306	int aie2_suspend_fw(struct amdxdna_dev_hdl *ndev);	307	int aie2_suspend_fw(struct amdxdna_dev_hdl *ndev);
307	int aie2_resume_fw(struct amdxdna_dev_hdl *ndev);	308	int aie2_resume_fw(struct amdxdna_dev_hdl *ndev);
308	int aie2_set_runtime_cfg(struct amdxdna_dev_hdl *ndev, u32 type, u64 value);	309	int aie2_set_runtime_cfg(struct amdxdna_dev_hdl *ndev, u32 type, u64 value);

drivers/accel/amdxdna/aie2_pm.c+1−1

@@ -31,7 +31,7 @@ int aie2_pm_set_dpm(struct amdxdna_dev_hdl *ndev, u32 dpm_level) · 30 unmodified lines
31	{	31	{
32	int ret;	32	int ret;
33		33
34	ret = amdxdna_pm_resume_get(ndev->xdna);	34	ret = amdxdna_pm_resume_get_locked(ndev->xdna);
35	if (ret)	35	if (ret)
36	return ret;	36	return ret;
37		37

drivers/accel/amdxdna/amdxdna_ctx.c+48−13

 #include "amdxdna_ctx.h"
 #include "amdxdna_gem.h"
 #include "amdxdna_pci_drv.h"
+#include "amdxdna_pm.h"
 #define MAX_HWCTX_ID		255
 #define MAX_ARG_COUNT		4095
 	if (size) {
 		count = FIELD_GET(AMDXDNA_CMD_COUNT, cmd->header);
-		if (unlikely(count <= num_masks)) {
+		if (unlikely(count <= num_masks ||
+			     count * sizeof(u32) +
+			     offsetof(struct amdxdna_cmd, data[0]) >
+			     abo->mem.size)) {
 			*size = 0;
 			return NULL;
 		}
 	return INVALID_CU_IDX;
 }
+int amdxdna_cmd_set_error(struct amdxdna_gem_obj *abo,
+			  struct amdxdna_sched_job *job, u32 cmd_idx,
+			  enum ert_cmd_state error_state)
+{
+	struct amdxdna_client *client = job->hwctx->client;
+	struct amdxdna_cmd *cmd = abo->mem.kva;
+	struct amdxdna_cmd_chain *cc = NULL;
+	cmd->header &= ~AMDXDNA_CMD_STATE;
+	cmd->header |= FIELD_PREP(AMDXDNA_CMD_STATE, error_state);
+	if (amdxdna_cmd_get_op(abo) == ERT_CMD_CHAIN) {
+		cc = amdxdna_cmd_get_payload(abo, NULL);
+		cc->error_index = (cmd_idx < cc->command_count) ? cmd_idx : 0;
+		abo = amdxdna_gem_get_obj(client, cc->data[0], AMDXDNA_BO_CMD);
+		if (!abo)
+			return -EINVAL;
+		cmd = abo->mem.kva;
+	}
+	memset(cmd->data, 0xff, abo->mem.size - sizeof(*cmd));
+	if (cc)
+		amdxdna_gem_put_obj(abo);
+	return 0;
+}
 /*
  * This should be called in close() and remove(). DO NOT call in other syscalls.
  * This guarantee that when hwctx and resources will be released, if user
 	struct amdxdna_drm_config_hwctx *args = data;
 	struct amdxdna_dev *xdna = to_xdna_dev(dev);
 	struct amdxdna_hwctx *hwctx;
-	int ret, idx;
 	u32 buf_size;
 	void *buf;
+	int ret;
 	u64 val;
 	if (XDNA_MBZ_DBG(xdna, &args->pad, sizeof(args->pad)))
 		return -EINVAL;
 	}
-	mutex_lock(&xdna->dev_lock);
+	guard(mutex)(&xdna->dev_lock);
-	idx = srcu_read_lock(&client->hwctx_srcu);
 	hwctx = xa_load(&client->hwctx_xa, args->handle);
 	if (!hwctx) {
 		XDNA_DBG(xdna, "PID %d failed to get hwctx %d", client->pid, args->handle);
 		ret = -EINVAL;
-		goto unlock_srcu;
+		goto free_buf;
 	}
 	ret = xdna->dev_info->ops->hwctx_config(hwctx, args->param_type, val, buf, buf_size);
-unlock_srcu:
+free_buf:
-	srcu_read_unlock(&client->hwctx_srcu, idx);
-	mutex_unlock(&xdna->dev_lock);
 	kfree(buf);
 	return ret;
 }
 	struct amdxdna_hwctx *hwctx;
 	struct amdxdna_gem_obj *abo;
 	struct drm_gem_object *gobj;
-	int ret, idx;
+	int ret;
 	if (!xdna->dev_info->ops->hwctx_sync_debug_bo)
 		return -EOPNOTSUPP;
 	abo = to_xdna_obj(gobj);
 	guard(mutex)(&xdna->dev_lock);
-	idx = srcu_read_lock(&client->hwctx_srcu);
 	hwctx = xa_load(&client->hwctx_xa, abo->assigned_hwctx);
 	if (!hwctx) {
 		ret = -EINVAL;
-		goto unlock_srcu;
+		goto put_obj;
 	}
 	ret = xdna->dev_info->ops->hwctx_sync_debug_bo(hwctx, debug_bo_hdl);
-unlock_srcu:
+put_obj:
-	srcu_read_unlock(&client->hwctx_srcu, idx);
 	drm_gem_object_put(gobj);
 	return ret;
 }
 void amdxdna_sched_job_cleanup(struct amdxdna_sched_job *job)
 {
 	trace_amdxdna_debug_point(job->hwctx->name, job->seq, "job release");
+	amdxdna_pm_suspend_put(job->hwctx->client->xdna);
 	amdxdna_arg_bos_put(job);
 	amdxdna_gem_put_obj(job->cmd_bo);
 	dma_fence_put(job->fence);
 		goto cmd_put;
 	}
+	ret = amdxdna_pm_resume_get(xdna);
+	if (ret) {
+		XDNA_ERR(xdna, "Resume failed, ret %d", ret);
+		goto put_bos;
+	}
 	idx = srcu_read_lock(&client->hwctx_srcu);
 	hwctx = xa_load(&client->hwctx_xa, hwctx_hdl);
 	if (!hwctx) {
 	dma_fence_put(job->fence);
 unlock_srcu:
 	srcu_read_unlock(&client->hwctx_srcu, idx);
+	amdxdna_pm_suspend_put(xdna);
+put_bos:
 	amdxdna_arg_bos_put(job);
 cmd_put:
 	amdxdna_gem_put_obj(job->cmd_bo);

drivers/accel/amdxdna/amdxdna_ctx.h+3−0

@@ -167,6 +167,9 @@ amdxdna_cmd_get_state(struct amdxdna_gem_obj *abo) · 166 unmodified lines
167		167
168	void amdxdna_cmd_get_payload(struct amdxdna_gem_obj abo, u32 *size);	168	void amdxdna_cmd_get_payload(struct amdxdna_gem_obj abo, u32 *size);
169	u32 amdxdna_cmd_get_cu_idx(struct amdxdna_gem_obj *abo);	169	u32 amdxdna_cmd_get_cu_idx(struct amdxdna_gem_obj *abo);
		170	int amdxdna_cmd_set_error(struct amdxdna_gem_obj *abo,
		171	struct amdxdna_sched_job *job, u32 cmd_idx,
		172	enum ert_cmd_state error_state);
170		173
171	void amdxdna_sched_job_cleanup(struct amdxdna_sched_job *job);	174	void amdxdna_sched_job_cleanup(struct amdxdna_sched_job *job);
172	void amdxdna_hwctx_remove_all(struct amdxdna_client *client);	175	void amdxdna_hwctx_remove_all(struct amdxdna_client *client);

drivers/accel/amdxdna/amdxdna_gem.c+19−19

 #include "amdxdna_pci_drv.h"
 #include "amdxdna_ubuf.h"
-#define XDNA_MAX_CMD_BO_SIZE	SZ_32K
 MODULE_IMPORT_NS("DMA_BUF");
 static int
 {
 	struct amdxdna_dev *xdna = to_xdna_dev(dev);
 	struct amdxdna_gem_obj *abo;
-	int ret;
-	if (args->size > XDNA_MAX_CMD_BO_SIZE) {
-		XDNA_ERR(xdna, "Command bo size 0x%llx too large", args->size);
-		return ERR_PTR(-EINVAL);
-	}
 	if (args->size < sizeof(struct amdxdna_cmd)) {
 		XDNA_DBG(xdna, "Command BO size 0x%llx too small", args->size);
 	abo->type = AMDXDNA_BO_CMD;
 	abo->client = filp->driver_priv;
-	ret = amdxdna_gem_obj_vmap(abo, &abo->mem.kva);
-	if (ret) {
-		XDNA_ERR(xdna, "Vmap cmd bo failed, ret %d", ret);
-		goto release_obj;
-	}
 	return abo;
-release_obj:
-	drm_gem_object_put(to_gobj(abo));
-	return ERR_PTR(ret);
 }
 int amdxdna_drm_create_bo_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 	struct amdxdna_dev *xdna = client->xdna;
 	struct amdxdna_gem_obj *abo;
 	struct drm_gem_object *gobj;
+	int ret;
 	gobj = drm_gem_object_lookup(client->filp, bo_hdl);
 	if (!gobj) {
 	}
 	abo = to_xdna_obj(gobj);
-	if (bo_type == AMDXDNA_BO_INVALID || abo->type == bo_type)
+	if (bo_type != AMDXDNA_BO_INVALID && abo->type != bo_type)
+		goto put_obj;
+	if (bo_type != AMDXDNA_BO_CMD || abo->mem.kva)
 		return abo;
+	if (abo->mem.size > SZ_32K) {
+		XDNA_ERR(xdna, "Cmd bo is too big %ld", abo->mem.size);
+		goto put_obj;
+	}
+	ret = amdxdna_gem_obj_vmap(abo, &abo->mem.kva);
+	if (ret) {
+		XDNA_ERR(xdna, "Vmap cmd bo failed, ret %d", ret);
+		goto put_obj;
+	}
+	return abo;
+put_obj:
 	drm_gem_object_put(gobj);
 	return NULL;
 }

drivers/accel/amdxdna/amdxdna_mailbox.c+45−46

 	return ret;
 }
-struct mailbox_channel *
+struct mailbox_channel *xdna_mailbox_alloc_channel(struct mailbox *mb)
-xdna_mailbox_create_channel(struct mailbox *mb,
-			    const struct xdna_mailbox_chann_res *x2i,
-			    const struct xdna_mailbox_chann_res *i2x,
-			    u32 iohub_int_addr,
-			    int mb_irq)
 {
 	struct mailbox_channel *mb_chann;
-	int ret;
-	if (!is_power_of_2(x2i->rb_size) || !is_power_of_2(i2x->rb_size)) {
-		pr_err("Ring buf size must be power of 2");
-		return NULL;
-	}
 	mb_chann = kzalloc_obj(*mb_chann);
 	if (!mb_chann)
 		return NULL;
+	INIT_WORK(&mb_chann->rx_work, mailbox_rx_worker);
+	mb_chann->work_q = create_singlethread_workqueue(MAILBOX_NAME);
+	if (!mb_chann->work_q) {
+		MB_ERR(mb_chann, "Create workqueue failed");
+		goto free_chann;
+	}
 	mb_chann->mb = mb;
+	return mb_chann;
+free_chann:
+	kfree(mb_chann);
+	return NULL;
+}
+void xdna_mailbox_free_channel(struct mailbox_channel *mb_chann)
+{
+	destroy_workqueue(mb_chann->work_q);
+	kfree(mb_chann);
+}
+int
+xdna_mailbox_start_channel(struct mailbox_channel *mb_chann,
+			   const struct xdna_mailbox_chann_res *x2i,
+			   const struct xdna_mailbox_chann_res *i2x,
+			   u32 iohub_int_addr,
+			   int mb_irq)
+{
+	int ret;
+	if (!is_power_of_2(x2i->rb_size) || !is_power_of_2(i2x->rb_size)) {
+		pr_err("Ring buf size must be power of 2");
+		return -EINVAL;
+	}
 	mb_chann->msix_irq = mb_irq;
 	mb_chann->iohub_int_addr = iohub_int_addr;
 	memcpy(&mb_chann->res[CHAN_RES_X2I], x2i, sizeof(*x2i));
 	mb_chann->x2i_tail = mailbox_get_tailptr(mb_chann, CHAN_RES_X2I);
 	mb_chann->i2x_head = mailbox_get_headptr(mb_chann, CHAN_RES_I2X);
-	INIT_WORK(&mb_chann->rx_work, mailbox_rx_worker);
-	mb_chann->work_q = create_singlethread_workqueue(MAILBOX_NAME);
-	if (!mb_chann->work_q) {
-		MB_ERR(mb_chann, "Create workqueue failed");
-		goto free_and_out;
-	}
 	/* Everything look good. Time to enable irq handler */
 	ret = request_irq(mb_irq, mailbox_irq_handler, 0, MAILBOX_NAME, mb_chann);
 	if (ret) {
 		MB_ERR(mb_chann, "Failed to request irq %d ret %d", mb_irq, ret);
-		goto destroy_wq;
+		return ret;
 	}
 	mb_chann->bad_state = false;
 	mailbox_reg_write(mb_chann, mb_chann->iohub_int_addr, 0);
-	MB_DBG(mb_chann, "Mailbox channel created (irq: %d)", mb_chann->msix_irq);
+	MB_DBG(mb_chann, "Mailbox channel started (irq: %d)", mb_chann->msix_irq);
-	return mb_chann;
+	return 0;
-destroy_wq:
-	destroy_workqueue(mb_chann->work_q);
-free_and_out:
-	kfree(mb_chann);
-	return NULL;
 }
-int xdna_mailbox_destroy_channel(struct mailbox_channel *mb_chann)
+void xdna_mailbox_stop_channel(struct mailbox_channel *mb_chann)
 {
 	struct mailbox_msg *mb_msg;
 	unsigned long msg_id;
-	MB_DBG(mb_chann, "IRQ disabled and RX work cancelled");
+	/* Disable an irq and wait. This might sleep. */
 	free_irq(mb_chann->msix_irq, mb_chann);
-	destroy_workqueue(mb_chann->work_q);
-	/* We can clean up and release resources */
+	/* Cancel RX work and wait for it to finish */
+	drain_workqueue(mb_chann->work_q);
+	/* We can clean up and release resources */
 	xa_for_each(&mb_chann->chan_xa, msg_id, mb_msg)
 		mailbox_release_msg(mb_chann, mb_msg);
 	xa_destroy(&mb_chann->chan_xa);
-	MB_DBG(mb_chann, "Mailbox channel destroyed, irq: %d", mb_chann->msix_irq);
+	MB_DBG(mb_chann, "Mailbox channel stopped, irq: %d", mb_chann->msix_irq);
-	kfree(mb_chann);
-	return 0;
-}
-void xdna_mailbox_stop_channel(struct mailbox_channel *mb_chann)
-{
-	/* Disable an irq and wait. This might sleep. */
-	disable_irq(mb_chann->msix_irq);
-	/* Cancel RX work and wait for it to finish */
-	cancel_work_sync(&mb_chann->rx_work);
-	MB_DBG(mb_chann, "IRQ disabled and RX work cancelled");
 }
 struct mailbox *xdnam_mailbox_create(struct drm_device *ddev,

drivers/accel/amdxdna/amdxdna_mailbox.h+17−14

 				     const struct xdna_mailbox_res *res);
 /*
- * xdna_mailbox_create_channel() -- Create a mailbox channel instance
+ * xdna_mailbox_alloc_channel() -- alloc a mailbox channel
  *
- * @mailbox: the handle return from xdna_mailbox_create()
+ * @mb: mailbox handle
+ */
+struct mailbox_channel *xdna_mailbox_alloc_channel(struct mailbox *mb);
+/*
+ * xdna_mailbox_start_channel() -- start a mailbox channel instance
+ *
+ * @mb_chann: the handle return from xdna_mailbox_alloc_channel()
  * @x2i: host to firmware mailbox resources
  * @i2x: firmware to host mailbox resources
  * @xdna_mailbox_intr_reg: register addr of MSI-X interrupt
  *
  * Return: If success, return a handle of mailbox channel. Otherwise, return NULL.
  */
-struct mailbox_channel *
+int
-xdna_mailbox_create_channel(struct mailbox *mailbox,
+xdna_mailbox_start_channel(struct mailbox_channel *mb_chann,
-			    const struct xdna_mailbox_chann_res *x2i,
+			   const struct xdna_mailbox_chann_res *x2i,
-			    const struct xdna_mailbox_chann_res *i2x,
+			   const struct xdna_mailbox_chann_res *i2x,
-			    u32 xdna_mailbox_intr_reg,
+			   u32 xdna_mailbox_intr_reg,
-			    int mb_irq);
+			   int mb_irq);
 /*
- * xdna_mailbox_destroy_channel() -- destroy mailbox channel
+ * xdna_mailbox_free_channel() -- free mailbox channel
  *
  * @mailbox_chann: the handle return from xdna_mailbox_create_channel()
- *
- * Return: if success, return 0. otherwise return error code
  */
-int xdna_mailbox_destroy_channel(struct mailbox_channel *mailbox_chann);
+void xdna_mailbox_free_channel(struct mailbox_channel *mailbox_chann);
 /*
  * xdna_mailbox_stop_channel() -- stop mailbox channel
  *
  * @mailbox_chann: the handle return from xdna_mailbox_create_channel()
- *
- * Return: if success, return 0. otherwise return error code
  */
 void xdna_mailbox_stop_channel(struct mailbox_channel *mailbox_chann);

drivers/accel/amdxdna/amdxdna_pci_drv.c+3−0

 MODULE_FIRMWARE("amdnpu/17f0_10/npu.sbin");
 MODULE_FIRMWARE("amdnpu/17f0_11/npu.sbin");
 MODULE_FIRMWARE("amdnpu/17f0_20/npu.sbin");
+MODULE_FIRMWARE("amdnpu/1502_00/npu_7.sbin");
+MODULE_FIRMWARE("amdnpu/17f0_10/npu_7.sbin");
+MODULE_FIRMWARE("amdnpu/17f0_11/npu_7.sbin");
 /*
  * 0.0: Initial version

drivers/accel/amdxdna/amdxdna_pm.c+2−0

 	struct amdxdna_dev *xdna = to_xdna_dev(dev_get_drvdata(dev));
 	int ret = -EOPNOTSUPP;
+	guard(mutex)(&xdna->dev_lock);
 	if (xdna->dev_info->ops->suspend)
 		ret = xdna->dev_info->ops->suspend(xdna);
 	struct amdxdna_dev *xdna = to_xdna_dev(dev_get_drvdata(dev));
 	int ret = -EOPNOTSUPP;
+	guard(mutex)(&xdna->dev_lock);
 	if (xdna->dev_info->ops->resume)
 		ret = xdna->dev_info->ops->resume(xdna);

drivers/accel/amdxdna/amdxdna_pm.h+11−0

@@ -15,4 +15,15 @@ void amdxdna_pm_suspend_put(struct amdxdna_dev *xdna); · 14 unmodified lines
15	void amdxdna_pm_init(struct amdxdna_dev *xdna);	15	void amdxdna_pm_init(struct amdxdna_dev *xdna);
16	void amdxdna_pm_fini(struct amdxdna_dev *xdna);	16	void amdxdna_pm_fini(struct amdxdna_dev *xdna);
17		17
		18	static inline int amdxdna_pm_resume_get_locked(struct amdxdna_dev *xdna)
		19	{
		20	int ret;
		21
		22	mutex_unlock(&xdna->dev_lock);
		23	ret = amdxdna_pm_resume_get(xdna);
		24	mutex_lock(&xdna->dev_lock);
		25
		26	return ret;
		27	}
		28
18	#endif /* _AMDXDNA_PM_H_ */	29	#endif /* _AMDXDNA_PM_H_ */

drivers/accel/amdxdna/amdxdna_ubuf.c+5−1

 #include <drm/drm_device.h>
 #include <drm/drm_print.h>
 #include <linux/dma-buf.h>
+#include <linux/overflow.h>
 #include <linux/pagemap.h>
 #include <linux/vmalloc.h>
 			goto free_ent;
 		}
-		exp_info.size += va_ent[i].len;
+		if (check_add_overflow(exp_info.size, va_ent[i].len, &exp_info.size)) {
+			ret = -EINVAL;
+			goto free_ent;
+		}
 	}
 	ubuf->nr_pages = exp_info.size >> PAGE_SHIFT;

drivers/accel/amdxdna/npu1_regs.c+2−2

@@ -67,12 +67,12 @@ const struct dpm_clk_freq npu1_dpm_clk_table[] = { · 66 unmodified lines
67		67
68	static const struct aie2_fw_feature_tbl npu1_fw_feature_table[] = {	68	static const struct aie2_fw_feature_tbl npu1_fw_feature_table[] = {
69	{ .major = 5, .min_minor = 7 },	69	{ .major = 5, .min_minor = 7 },
70	{ .features = BIT_U64(AIE2_NPU_COMMAND), .min_minor = 8 },	70	{ .features = BIT_U64(AIE2_NPU_COMMAND), .major = 5, .min_minor = 8 },
71	{ 0 }	71	{ 0 }
72	};	72	};
73		73
74	static const struct amdxdna_dev_priv npu1_dev_priv = {	74	static const struct amdxdna_dev_priv npu1_dev_priv = {
75	.fw_path = "amdnpu/1502_00/npu.sbin",	75	.fw_path = "amdnpu/1502_00/",
76	.rt_config = npu1_default_rt_cfg,	76	.rt_config = npu1_default_rt_cfg,
77	.dpm_clk_tbl = npu1_dpm_clk_table,	77	.dpm_clk_tbl = npu1_dpm_clk_table,
78	.fw_feature_tbl = npu1_fw_feature_table,	78	.fw_feature_tbl = npu1_fw_feature_table,

drivers/accel/amdxdna/npu4_regs.c+1−1

@@ -98,7 +98,7 @@ const struct aie2_fw_feature_tbl npu4_fw_feature_table[] = { · 97 unmodified lines
98	};	98	};
99		99
100	static const struct amdxdna_dev_priv npu4_dev_priv = {	100	static const struct amdxdna_dev_priv npu4_dev_priv = {
101	.fw_path = "amdnpu/17f0_10/npu.sbin",	101	.fw_path = "amdnpu/17f0_10/",
102	.rt_config = npu4_default_rt_cfg,	102	.rt_config = npu4_default_rt_cfg,
103	.dpm_clk_tbl = npu4_dpm_clk_table,	103	.dpm_clk_tbl = npu4_dpm_clk_table,
104	.fw_feature_tbl = npu4_fw_feature_table,	104	.fw_feature_tbl = npu4_fw_feature_table,

drivers/accel/amdxdna/npu5_regs.c+1−1

@@ -63,7 +63,7 @@ · 62 unmodified lines
63	#define NPU5_SRAM_BAR_BASE MMNPU_APERTURE1_BASE	63	#define NPU5_SRAM_BAR_BASE MMNPU_APERTURE1_BASE
64		64
65	static const struct amdxdna_dev_priv npu5_dev_priv = {	65	static const struct amdxdna_dev_priv npu5_dev_priv = {
66	.fw_path = "amdnpu/17f0_11/npu.sbin",	66	.fw_path = "amdnpu/17f0_11/",
67	.rt_config = npu4_default_rt_cfg,	67	.rt_config = npu4_default_rt_cfg,
68	.dpm_clk_tbl = npu4_dpm_clk_table,	68	.dpm_clk_tbl = npu4_dpm_clk_table,
69	.fw_feature_tbl = npu4_fw_feature_table,	69	.fw_feature_tbl = npu4_fw_feature_table,

drivers/accel/amdxdna/npu6_regs.c+1−1

@@ -63,7 +63,7 @@ · 62 unmodified lines
63	#define NPU6_SRAM_BAR_BASE MMNPU_APERTURE1_BASE	63	#define NPU6_SRAM_BAR_BASE MMNPU_APERTURE1_BASE
64		64
65	static const struct amdxdna_dev_priv npu6_dev_priv = {	65	static const struct amdxdna_dev_priv npu6_dev_priv = {
66	.fw_path = "amdnpu/17f0_10/npu.sbin",	66	.fw_path = "amdnpu/17f0_10/",
67	.rt_config = npu4_default_rt_cfg,	67	.rt_config = npu4_default_rt_cfg,
68	.dpm_clk_tbl = npu4_dpm_clk_table,	68	.dpm_clk_tbl = npu4_dpm_clk_table,
69	.fw_feature_tbl = npu4_fw_feature_table,	69	.fw_feature_tbl = npu4_fw_feature_table,

drivers/accel/ethosu/ethosu_gem.c+10−4

 static u64 cmd_to_addr(u32 *cmd)
 {
-	return ((u64)((cmd[0] & 0xff0000) << 16)) | cmd[1];
+	return (((u64)cmd[0] & 0xff0000) << 16) | cmd[1];
 }
 static u64 dma_length(struct ethosu_validated_cmdstream_info *info,
 			((st->ifm.stride_kernel >> 1) & 0x1) + 1;
 		u32 stride_x = ((st->ifm.stride_kernel >> 5) & 0x2) +
 			(st->ifm.stride_kernel & 0x1) + 1;
-		u32 ifm_height = st->ofm.height[2] * stride_y +
+		s32 ifm_height = st->ofm.height[2] * stride_y +
 			st->ifm.height[2] - (st->ifm.pad_top + st->ifm.pad_bottom);
-		u32 ifm_width  = st->ofm.width * stride_x +
+		s32 ifm_width = st->ofm.width * stride_x +
 			st->ifm.width - (st->ifm.pad_left + st->ifm.pad_right);
+		if (ifm_height < 0 || ifm_width < 0)
+			return -EINVAL;
 		len = feat_matrix_length(info, &st->ifm, ifm_width,
 					 ifm_height, st->ifm.depth);
 		dev_dbg(ddev->dev, "op %d: IFM:%d:0x%llx-0x%llx\n",
 				return ret;
 			break;
 		case NPU_OP_ELEMENTWISE:
-			use_ifm2 = !((st.ifm2.broadcast == 8) || (param == 5) ||
+			use_scale = ethosu_is_u65(edev) ?
+				    (st.ifm2.broadcast & 0x80) :
+				    (st.ifm2.broadcast == 8);
+			use_ifm2 = !(use_scale || (param == 5) ||
 				(param == 6) || (param == 7) || (param == 0x24));
 			use_ifm = st.ifm.broadcast != 8;
 			ret = calc_sizes_elemwise(ddev, info, cmd, &st, use_ifm, use_ifm2);

drivers/accel/ethosu/ethosu_job.c+18−8

 	return ret;
 }
+static void ethosu_job_err_cleanup(struct ethosu_job *job)
+{
+	unsigned int i;
+	for (i = 0; i < job->region_cnt; i++)
+		drm_gem_object_put(job->region_bo[i]);
+	drm_gem_object_put(job->cmd_bo);
+	kfree(job);
+}
 static void ethosu_job_cleanup(struct kref *ref)
 {
 	struct ethosu_job *job = container_of(ref, struct ethosu_job,
 						refcount);
-	unsigned int i;
 	pm_runtime_put_autosuspend(job->dev->base.dev);
 	dma_fence_put(job->done_fence);
 	dma_fence_put(job->inference_done_fence);
-	for (i = 0; i < job->region_cnt; i++)
+	ethosu_job_err_cleanup(job);
-		drm_gem_object_put(job->region_bo[i]);
-	drm_gem_object_put(job->cmd_bo);
-	kfree(job);
 }
 static void ethosu_job_put(struct ethosu_job *job)
 		}
 	}
 	ret = ethosu_job_push(ejob);
+	if (!ret) {
+		ethosu_job_put(ejob);
+		return 0;
+	}
 out_cleanup_job:
 	if (ret)
 		drm_sched_job_cleanup(&ejob->base);
 out_put_job:
-	ethosu_job_put(ejob);
+	ethosu_job_err_cleanup(ejob);
 	return ret;
 }

drivers/accel/ivpu/ivpu_hw_40xx_reg.h+0−6

 #define VPU_50XX_HOST_SS_AON_PWR_ISLAND_STATUS_DLY			0x0003006cu
 #define VPU_50XX_HOST_SS_AON_PWR_ISLAND_STATUS_DLY_STATUS_DLY_MASK	GENMASK(7, 0)
-#define VPU_40XX_HOST_SS_AON_RETENTION0                                 0x0003000cu
-#define VPU_40XX_HOST_SS_AON_RETENTION1                                 0x00030010u
-#define VPU_40XX_HOST_SS_AON_RETENTION2                                 0x00030014u
-#define VPU_40XX_HOST_SS_AON_RETENTION3                                 0x00030018u
-#define VPU_40XX_HOST_SS_AON_RETENTION4                                 0x0003001cu
 #define VPU_40XX_HOST_SS_AON_IDLE_GEN					0x00030200u
 #define VPU_40XX_HOST_SS_AON_IDLE_GEN_EN_MASK				BIT_MASK(0)
 #define VPU_40XX_HOST_SS_AON_IDLE_GEN_HW_PG_EN_MASK			BIT_MASK(1)

drivers/accel/ivpu/ivpu_hw_ip.c+0−1

@@ -931,7 +931,6 @@ static int soc_cpu_boot_40xx(struct ivpu_device *vdev) · 930 unmodified lines
931		931
932	static int soc_cpu_boot_60xx(struct ivpu_device *vdev)	932	static int soc_cpu_boot_60xx(struct ivpu_device *vdev)
933	{	933	{
934	REGV_WR64(VPU_40XX_HOST_SS_AON_RETENTION1, vdev->fw->mem_bp->vpu_addr);
935	soc_cpu_set_entry_point_40xx(vdev, vdev->fw->cold_boot_entry_point);	934	soc_cpu_set_entry_point_40xx(vdev, vdev->fw->cold_boot_entry_point);
936		935
937	return 0;	936	return 0;

drivers/acpi/Kconfig+1−0

@@ -9,6 +9,7 @@ config ARCH_SUPPORTS_ACPI · 8 unmodified lines
9	menuconfig ACPI	9	menuconfig ACPI
10	bool "ACPI (Advanced Configuration and Power Interface) Support"	10	bool "ACPI (Advanced Configuration and Power Interface) Support"
11	depends on ARCH_SUPPORTS_ACPI	11	depends on ARCH_SUPPORTS_ACPI
		12	select AUXILIARY_BUS
12	select PNP	13	select PNP
13	select NLS	14	select NLS
14	select CRC32	15	select CRC32

drivers/acpi/acpi_platform.c+1−1

@@ -135,7 +135,7 @@ struct platform_device acpi_create_platform_device(struct acpi_device adev, · 134 unmodified lines
135	}	135	}
136	}	136	}
137		137
138	if (adev->device_type == ACPI_BUS_TYPE_DEVICE && !adev->pnp.type.backlight) {	138	if (adev->device_type == ACPI_BUS_TYPE_DEVICE) {
139	LIST_HEAD(resource_list);	139	LIST_HEAD(resource_list);
140		140
141	count = acpi_dev_get_resources(adev, &resource_list, NULL, NULL);	141	count = acpi_dev_get_resources(adev, &resource_list, NULL, NULL);

drivers/acpi/acpi_video.c+22−23

 #define pr_fmt(fmt) "ACPI: video: " fmt
+#include <linux/auxiliary_bus.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/sort.h>
 #include <linux/pci.h>
 #include <linux/pci_ids.h>
-#include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/dmi.h>
 #include <linux/suspend.h>
 static DEFINE_MUTEX(register_count_mutex);
 static DEFINE_MUTEX(video_list_lock);
 static LIST_HEAD(video_bus_head);
-static int acpi_video_bus_probe(struct platform_device *pdev);
+static int acpi_video_bus_probe(struct auxiliary_device *aux_dev,
-static void acpi_video_bus_remove(struct platform_device *pdev);
+				const struct auxiliary_device_id *id);
+static void acpi_video_bus_remove(struct auxiliary_device *aux);
 static void acpi_video_bus_notify(acpi_handle handle, u32 event, void *data);
 /*
 	ACPI_VIDEO_FIRST_LEVEL,		/* actual supported levels begin here */
 };
-static const struct acpi_device_id video_device_ids[] = {
+static const struct auxiliary_device_id video_bus_auxiliary_id_table[] = {
-	{ACPI_VIDEO_HID, 0},
+	{ .name = "acpi.video_bus" },
-	{"", 0},
+	{},
 };
-MODULE_DEVICE_TABLE(acpi, video_device_ids);
+MODULE_DEVICE_TABLE(auxiliary, video_bus_auxiliary_id_table);
-static struct platform_driver acpi_video_bus = {
+static struct auxiliary_driver acpi_video_bus = {
 	.probe = acpi_video_bus_probe,
 	.remove = acpi_video_bus_remove,
-	.driver = {
+	.id_table = video_bus_auxiliary_id_table,
-		.name = "acpi-video",
-		.acpi_match_table = video_device_ids,
-	},
 };
 struct acpi_video_bus_flags {
 }
 static int acpi_video_bus_add_notify_handler(struct acpi_video_bus *video,
-					     struct platform_device *pdev)
+					     struct device *parent)
 {
 	struct input_dev *input;
 	struct acpi_video_device *dev;
 	input->phys = video->phys;
 	input->id.bustype = BUS_HOST;
 	input->id.product = 0x06;
-	input->dev.parent = &pdev->dev;
+	input->dev.parent = parent;
 	input->evbit[0] = BIT(EV_KEY);
 	set_bit(KEY_SWITCHVIDEOMODE, input->keybit);
 	set_bit(KEY_VIDEO_NEXT, input->keybit);
 static int instance;
-static int acpi_video_bus_probe(struct platform_device *pdev)
+static int acpi_video_bus_probe(struct auxiliary_device *aux_dev,
+				const struct auxiliary_device_id *id_unused)
 {
-	struct acpi_device *device = ACPI_COMPANION(&pdev->dev);
+	struct acpi_device *device = ACPI_COMPANION(&aux_dev->dev);
 	struct acpi_video_bus *video;
 	bool auto_detect;
 	int error;
 		instance++;
 	}
-	platform_set_drvdata(pdev, video);
+	auxiliary_set_drvdata(aux_dev, video);
 	video->device = device;
 	strscpy(acpi_device_name(device), ACPI_VIDEO_BUS_NAME);
 	    !auto_detect)
 		acpi_video_bus_register_backlight(video);
-	error = acpi_video_bus_add_notify_handler(video, pdev);
+	error = acpi_video_bus_add_notify_handler(video, &aux_dev->dev);
 	if (error)
 		goto err_del;
 	return error;
 }
-static void acpi_video_bus_remove(struct platform_device *pdev)
+static void acpi_video_bus_remove(struct auxiliary_device *aux_dev)
 {
-	struct acpi_video_bus *video = platform_get_drvdata(pdev);
+	struct acpi_video_bus *video = auxiliary_get_drvdata(aux_dev);
-	struct acpi_device *device = ACPI_COMPANION(&pdev->dev);
+	struct acpi_device *device = ACPI_COMPANION(&aux_dev->dev);
 	acpi_dev_remove_notify_handler(device, ACPI_DEVICE_NOTIFY,
 				       acpi_video_bus_notify);
 	dmi_check_system(video_dmi_table);
-	ret = platform_driver_register(&acpi_video_bus);
+	ret = auxiliary_driver_register(&acpi_video_bus);
 	if (ret)
 		goto leave;
 {
 	mutex_lock(&register_count_mutex);
 	if (register_count) {
-		platform_driver_unregister(&acpi_video_bus);
+		auxiliary_driver_unregister(&acpi_video_bus);
 		register_count = 0;
 		may_report_brightness_keys = false;
 	}

drivers/acpi/acpica/acpredef.h+3−2

@@ -379,8 +379,9 @@ const union acpi_predefined_info acpi_gbl_predefined_methods[] = { · 378 unmodified lines
379		379
380	{{"_CPC", METHOD_0ARGS,	380	{{"_CPC", METHOD_0ARGS,
381	METHOD_RETURNS(ACPI_RTYPE_PACKAGE)}}, /* Variable-length (Ints/Bufs) */	381	METHOD_RETURNS(ACPI_RTYPE_PACKAGE)}}, /* Variable-length (Ints/Bufs) */
382	PACKAGE_INFO(ACPI_PTYPE1_VAR, ACPI_RTYPE_INTEGER \| ACPI_RTYPE_BUFFER, 0,	382	PACKAGE_INFO(ACPI_PTYPE1_VAR,
383	0, 0, 0),	383	ACPI_RTYPE_INTEGER \| ACPI_RTYPE_BUFFER \|
		384	ACPI_RTYPE_PACKAGE, 0, 0, 0, 0),
384		385
385	{{"_CR3", METHOD_0ARGS, /* ACPI 6.0 */	386	{{"_CR3", METHOD_0ARGS, /* ACPI 6.0 */
386	METHOD_RETURNS(ACPI_RTYPE_INTEGER)}},	387	METHOD_RETURNS(ACPI_RTYPE_INTEGER)}},

drivers/acpi/device_pm.c+0−9

@@ -1456,15 +1456,6 @@ int acpi_dev_pm_attach(struct device *dev, bool power_on) · 1455 unmodified lines
1456	if (!adev \|\| !acpi_match_device_ids(adev, special_pm_ids))	1456	if (!adev \|\| !acpi_match_device_ids(adev, special_pm_ids))
1457	return 0;	1457	return 0;
1458		1458
1459	/*
1460	* Skip devices whose ACPI companions don't support power management and
1461	* don't have a wakeup GPE.
1462	*/
1463	if (!acpi_device_power_manageable(adev) && !acpi_device_can_wakeup(adev)) {
1464	dev_dbg(dev, "No ACPI power management or wakeup GPE\n");
1465	return 0;
1466	}
1467
1468	/*	1459	/*
1469	* Only attach the power domain to the first device if the	1460	* Only attach the power domain to the first device if the
1470	* companion is shared by multiple. This is to prevent doing power	1461	* companion is shared by multiple. This is to prevent doing power

drivers/acpi/osi.c+13−0

@@ -389,6 +389,19 @@ static const struct dmi_system_id acpi_osi_dmi_table[] __initconst = { · 388 unmodified lines
389	},	389	},
390	},	390	},
391		391
		392	/*
		393	* The screen backlight turns off during udev device creation
		394	* when returning true for _OSI("Windows 2009")
		395	*/
		396	{
		397	.callback = dmi_disable_osi_win7,
		398	.ident = "Acer Aspire One D255",
		399	.matches = {
		400	DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
		401	DMI_MATCH(DMI_PRODUCT_NAME, "AOD255"),
		402	},
		403	},
		404
392	/*	405	/*
393	* The wireless hotkey does not work on those machines when	406	* The wireless hotkey does not work on those machines when
394	* returning true for _OSI("Windows 2012")	407	* returning true for _OSI("Windows 2012")

drivers/acpi/osl.c+1−1

@@ -1681,7 +1681,7 @@ acpi_status __init acpi_os_initialize(void) · 1680 unmodified lines
1681	* Use acpi_os_map_generic_address to pre-map the reset	1681	* Use acpi_os_map_generic_address to pre-map the reset
1682	* register if it's in system memory.	1682	* register if it's in system memory.
1683	*/	1683	*/
1684	void *rv;	1684	void __iomem *rv;
1685		1685
1686	rv = acpi_os_map_generic_address(&acpi_gbl_FADT.reset_register);	1686	rv = acpi_os_map_generic_address(&acpi_gbl_FADT.reset_register);
1687	pr_debug("%s: Reset register mapping %s\n", __func__,	1687	pr_debug("%s: Reset register mapping %s\n", __func__,

drivers/acpi/scan.c+45−0

@@ -6,6 +6,7 @@ · 5 unmodified lines
6	#define pr_fmt(fmt) "ACPI: " fmt	6	#define pr_fmt(fmt) "ACPI: " fmt
7		7
8	#include <linux/async.h>	8	#include <linux/async.h>
		9	#include <linux/auxiliary_bus.h>
9	#include <linux/module.h>	10	#include <linux/module.h>
10	#include <linux/init.h>	11	#include <linux/init.h>
11	#include <linux/slab.h>	12	#include <linux/slab.h>
@@ -2192,6 +2193,44 @@ static acpi_status acpi_bus_check_add_2(acpi_handle handle, u32 lvl_not_used, · 2180 unmodified lines
2192	return acpi_bus_check_add(handle, false, (struct acpi_device **)ret_p);	2193	return acpi_bus_check_add(handle, false, (struct acpi_device **)ret_p);
2193	}	2194	}
2194		2195
		2196	static void acpi_video_bus_device_release(struct device *dev)
		2197	{
		2198	struct auxiliary_device *aux_dev = to_auxiliary_dev(dev);
		2199
		2200	kfree(aux_dev);
		2201	}
		2202
		2203	static void acpi_create_video_bus_device(struct acpi_device *adev,
		2204	struct acpi_device *parent)
		2205	{
		2206	struct auxiliary_device *aux_dev;
		2207	static unsigned int aux_dev_id;
		2208
		2209	aux_dev = kzalloc_obj(*aux_dev);
		2210	if (!aux_dev)
		2211	return;
		2212
		2213	aux_dev->id = aux_dev_id++;
		2214	aux_dev->name = "video_bus";
		2215	aux_dev->dev.parent = acpi_get_first_physical_node(parent);
		2216	if (!aux_dev->dev.parent)
		2217	goto err;
		2218
		2219	aux_dev->dev.release = acpi_video_bus_device_release;
		2220
		2221	if (auxiliary_device_init(aux_dev))
		2222	goto err;
		2223
		2224	ACPI_COMPANION_SET(&aux_dev->dev, adev);
		2225	if (__auxiliary_device_add(aux_dev, "acpi"))
		2226	auxiliary_device_uninit(aux_dev);
		2227
		2228	return;
		2229
		2230	err:
		2231	kfree(aux_dev);
		2232	}
		2233
2195	struct acpi_scan_system_dev {	2234	struct acpi_scan_system_dev {
2196	struct list_head node;	2235	struct list_head node;
2197	struct acpi_device *adev;	2236	struct acpi_device *adev;
@@ -2229,6 +2268,12 @@ static void acpi_default_enumeration(struct acpi_device *device) · 31 unmodified lines
2229	sd->adev = device;	2268	sd->adev = device;
2230	list_add_tail(&sd->node, &acpi_scan_system_dev_list);	2269	list_add_tail(&sd->node, &acpi_scan_system_dev_list);
2231	}	2270	}
		2271	} else if (device->pnp.type.backlight) {
		2272	struct acpi_device *parent;
		2273
		2274	parent = acpi_dev_parent(device);
		2275	if (parent)
		2276	acpi_create_video_bus_device(device, parent);
2232	} else {	2277	} else {
2233	/* For a regular device object, create a platform device. */	2278	/* For a regular device object, create a platform device. */
2234	acpi_create_platform_device(device, NULL);	2279	acpi_create_platform_device(device, NULL);

drivers/acpi/sleep.c+8−0

@@ -386,6 +386,14 @@ static const struct dmi_system_id acpisleep_dmi_table[] __initconst = { · 385 unmodified lines
386	DMI_MATCH(DMI_PRODUCT_NAME, "80E1"),	386	DMI_MATCH(DMI_PRODUCT_NAME, "80E1"),
387	},	387	},
388	},	388	},
		389	{
		390	.callback = init_nvs_save_s3,
		391	.ident = "Lenovo G70-35",
		392	.matches = {
		393	DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
		394	DMI_MATCH(DMI_PRODUCT_NAME, "80Q5"),
		395	},
		396	},
389	/*	397	/*
390	* ThinkPad X1 Tablet(2016) cannot do suspend-to-idle using	398	* ThinkPad X1 Tablet(2016) cannot do suspend-to-idle using
391	* the Low Power S0 Idle firmware interface (see	399	* the Low Power S0 Idle firmware interface (see

drivers/android/binder/page_range.rs+64−20

@@ -142,6 +142,30 @@ pub(crate) struct ShrinkablePageRange { · 141 unmodified lines
142	_pin: PhantomPinned,	142	_pin: PhantomPinned,
143	}	143	}
144		144
		145	// We do not define any ops. For now, used only to check identity of vmas.
		146	static BINDER_VM_OPS: bindings::vm_operations_struct = pin_init::zeroed();
		147
		148	// To ensure that we do not accidentally install pages into or zap pages from the wrong vma, we
		149	// check its vm_ops and private data before using it.
		150	fn check_vma(vma: &virt::VmaRef, owner: *const ShrinkablePageRange) -> Option<&virt::VmaMixedMap> {
		151	// SAFETY: Just reading the vm_ops pointer of any active vma is safe.
		152	let vm_ops = unsafe { (*vma.as_ptr()).vm_ops };
		153	if !ptr::eq(vm_ops, &BINDER_VM_OPS) {
		154	return None;
		155	}
		156
		157	// SAFETY: Reading the vm_private_data pointer of a binder-owned vma is safe.
		158	let vm_private_data = unsafe { (*vma.as_ptr()).vm_private_data };
		159	// The ShrinkablePageRange is only dropped when the Process is dropped, which only happens once
		160	// the file's ->release handler is invoked, which means the ShrinkablePageRange outlives any
		161	// VMA associated with it, so there can't be any false positives due to pointer reuse here.
		162	if !ptr::eq(vm_private_data, owner.cast()) {
		163	return None;
		164	}
		165
		166	vma.as_mixedmap_vma()
		167	}
		168
145	struct Inner {	169	struct Inner {
146	/// Array of pages.	170	/// Array of pages.
147	///	171	///
@@ -308,6 +332,18 @@ impl ShrinkablePageRange { · 160 unmodified lines
308	inner.size = num_pages;	332	inner.size = num_pages;
309	inner.vma_addr = vma.start();	333	inner.vma_addr = vma.start();
310		334
		335	// This pointer is only used for comparison - it's not dereferenced.
		336	//
		337	// SAFETY: We own the vma, and we don't use any methods on VmaNew that rely on
		338	// `vm_private_data`.
		339	unsafe {
		340	(*vma.as_ptr()).vm_private_data = ptr::from_ref(self).cast_mut().cast::<c_void>()
		341	};
		342
		343	// SAFETY: We own the vma, and we don't use any methods on VmaNew that rely on
		344	// `vm_ops`.
		345	unsafe { (*vma.as_ptr()).vm_ops = &BINDER_VM_OPS };
		346
311	Ok(num_pages)	347	Ok(num_pages)
312	}	348	}
313		349
@@ -399,22 +435,25 @@ impl ShrinkablePageRange { · 85 unmodified lines
399	//	435	//
400	// Using `mmput_async` avoids this, because then the `mm` cleanup is instead queued to a	436	// Using `mmput_async` avoids this, because then the `mm` cleanup is instead queued to a
401	// workqueue.	437	// workqueue.
402	MmWithUser::into_mmput_async(self.mm.mmget_not_zero().ok_or(ESRCH)?)	438	let mm = MmWithUser::into_mmput_async(self.mm.mmget_not_zero().ok_or(ESRCH)?);
403	.mmap_read_lock()	439	{
404	.vma_lookup(vma_addr)	440	let vma_read;
405	.ok_or(ESRCH)?	441	let mmap_read;
406	.as_mixedmap_vma()	442	let vma = if let Some(ret) = mm.lock_vma_under_rcu(vma_addr) {
407	.ok_or(ESRCH)?	443	vma_read = ret;
408	.vm_insert_page(user_page_addr, &new_page)	444	check_vma(&vma_read, self)
409	.inspect_err(\|err\| {	445	} else {
410	pr_warn!(	446	mmap_read = mm.mmap_read_lock();
411	"Failed to vm_insert_page({}): vma_addr:{} i:{} err:{:?}",	447	mmap_read
412	user_page_addr,	448	.vma_lookup(vma_addr)
413	vma_addr,	449	.and_then(\|vma\| check_vma(vma, self))
414	i,	450	};
415	err	451
416	)	452	match vma {
417	})?;	453	Some(vma) => vma.vm_insert_page(user_page_addr, &new_page)?,
		454	None => return Err(ESRCH),
		455	}
		456	}
418		457
419	let inner = self.lock.lock();	458	let inner = self.lock.lock();
420		459
@@ -667,12 +706,15 @@ unsafe extern "C" fn rust_shrink_free_page( · 246 unmodified lines
667	let mmap_read;	706	let mmap_read;
668	let mm_mutex;	707	let mm_mutex;
669	let vma_addr;	708	let vma_addr;
		709	let range_ptr;
670		710
671	{	711	{
672	// CAST: The `list_head` field is first in `PageInfo`.	712	// CAST: The `list_head` field is first in `PageInfo`.
673	let info = item as *mut PageInfo;	713	let info = item as *mut PageInfo;
674	// SAFETY: The `range` field of `PageInfo` is immutable.	714	// SAFETY: The `range` field of `PageInfo` is immutable.
675	let range = unsafe { &((info).range) };	715	range_ptr = unsafe { (*info).range };
		716	// SAFETY: The `range` outlives its `PageInfo` values.
		717	let range = unsafe { &*range_ptr };
676		718
677	mm = match range.mm.mmget_not_zero() {	719	mm = match range.mm.mmget_not_zero() {
678	Some(mm) => MmWithUser::into_mmput_async(mm),	720	Some(mm) => MmWithUser::into_mmput_async(mm),
@@ -717,9 +759,11 @@ unsafe extern "C" fn rust_shrink_free_page( · 38 unmodified lines
717	// SAFETY: The lru lock is locked when this method is called.	759	// SAFETY: The lru lock is locked when this method is called.
718	unsafe { bindings::spin_unlock(&raw mut (*lru).lock) };	760	unsafe { bindings::spin_unlock(&raw mut (*lru).lock) };
719		761
720	if let Some(vma) = mmap_read.vma_lookup(vma_addr) {	762	if let Some(unchecked_vma) = mmap_read.vma_lookup(vma_addr) {
721	let user_page_addr = vma_addr + (page_index << PAGE_SHIFT);	763	if let Some(vma) = check_vma(unchecked_vma, range_ptr) {
722	vma.zap_page_range_single(user_page_addr, PAGE_SIZE);	764	let user_page_addr = vma_addr + (page_index << PAGE_SHIFT);
		765	vma.zap_page_range_single(user_page_addr, PAGE_SIZE);
		766	}
723	}	767	}
724		768
725	drop(mmap_read);	769	drop(mmap_read);

drivers/android/binder/process.rs+2−1

@@ -1295,7 +1295,8 @@ impl Process { · 1294 unmodified lines
1295	}	1295	}
1296		1296
1297	pub(crate) fn dead_binder_done(&self, cookie: u64, thread: &Thread) {	1297	pub(crate) fn dead_binder_done(&self, cookie: u64, thread: &Thread) {
1298	if let Some(death) = self.inner.lock().pull_delivered_death(cookie) {	1298	let death = self.inner.lock().pull_delivered_death(cookie);
		1299	if let Some(death) = death {
1299	death.set_notification_done(thread);	1300	death.set_notification_done(thread);
1300	}	1301	}
1301	}	1302	}

drivers/android/binder/range_alloc/array.rs+33−2

@@ -118,7 +118,7 @@ impl<T> ArrayRangeAllocator<T> { · 117 unmodified lines
118	size: usize,	118	size: usize,
119	is_oneway: bool,	119	is_oneway: bool,
120	pid: Pid,	120	pid: Pid,
121	) -> Result<usize> {	121	) -> Result<(usize, bool)> {
122	// Compute new value of free_oneway_space, which is set only on success.	122	// Compute new value of free_oneway_space, which is set only on success.
123	let new_oneway_space = if is_oneway {	123	let new_oneway_space = if is_oneway {
124	match self.free_oneway_space.checked_sub(size) {	124	match self.free_oneway_space.checked_sub(size) {
@@ -146,7 +146,38 @@ impl<T> ArrayRangeAllocator<T> { · 21 unmodified lines
146	.ok()	146	.ok()
147	.unwrap();	147	.unwrap();
148		148
149	Ok(insert_at_offset)	149	// Start detecting spammers once we have less than 20%
		150	// of async space left (which is less than 10% of total
		151	// buffer size).
		152	//
		153	// (This will short-circuit, so `low_oneway_space` is
		154	// only called when necessary.)
		155	let oneway_spam_detected =
		156	is_oneway && new_oneway_space < self.size / 10 && self.low_oneway_space(pid);
		157
		158	Ok((insert_at_offset, oneway_spam_detected))
		159	}
		160
		161	/// Find the amount and size of buffers allocated by the current caller.
		162	///
		163	/// The idea is that once we cross the threshold, whoever is responsible
		164	/// for the low async space is likely to try to send another async transaction,
		165	/// and at some point we'll catch them in the act. This is more efficient
		166	/// than keeping a map per pid.
		167	fn low_oneway_space(&self, calling_pid: Pid) -> bool {
		168	let mut total_alloc_size = 0;
		169	let mut num_buffers = 0;
		170
		171	// Warn if this pid has more than 50 transactions, or more than 50% of
		172	// async space (which is 25% of total buffer size). Oneway spam is only
		173	// detected when the threshold is exceeded.
		174	for range in &self.ranges {
		175	if range.state.is_oneway() && range.state.pid() == calling_pid {
		176	total_alloc_size += range.size;
		177	num_buffers += 1;
		178	}
		179	}
		180	num_buffers > 50 \|\| total_alloc_size > self.size / 4
150	}	181	}
151		182
152	pub(crate) fn reservation_abort(&mut self, offset: usize) -> Result<FreedRange> {	183	pub(crate) fn reservation_abort(&mut self, offset: usize) -> Result<FreedRange> {

drivers/android/binder/range_alloc/mod.rs+2−2

@@ -188,11 +188,11 @@ impl<T> RangeAllocator<T> { · 187 unmodified lines
188	self.reserve_new(args)	188	self.reserve_new(args)
189	}	189	}
190	Impl::Array(array) => {	190	Impl::Array(array) => {
191	let offset =	191	let (offset, oneway_spam_detected) =
192	array.reserve_new(args.debug_id, args.size, args.is_oneway, args.pid)?;	192	array.reserve_new(args.debug_id, args.size, args.is_oneway, args.pid)?;
193	Ok(ReserveNew::Success(ReserveNewSuccess {	193	Ok(ReserveNew::Success(ReserveNewSuccess {
194	offset,	194	offset,
195	oneway_spam_detected: false,	195	oneway_spam_detected,
196	_empty_array_alloc: args.empty_array_alloc,	196	_empty_array_alloc: args.empty_array_alloc,
197	_new_tree_alloc: args.new_tree_alloc,	197	_new_tree_alloc: args.new_tree_alloc,
198	_tree_alloc: args.tree_alloc,	198	_tree_alloc: args.tree_alloc,

drivers/android/binder/range_alloc/tree.rs+9−9

             self.free_oneway_space
         };
-        // Start detecting spammers once we have less than 20%
-        // of async space left (which is less than 10% of total
-        // buffer size).
-        //
-        // (This will short-circut, so `low_oneway_space` is
-        // only called when necessary.)
-        let oneway_spam_detected =
-            is_oneway && new_oneway_space < self.size / 10 && self.low_oneway_space(pid);
         let (found_size, found_off, tree_node, free_tree_node) = match self.find_best_match(size) {
             None => {
                 pr_warn!("ENOSPC from range_alloc.reserve_new - size: {}", size);
             self.free_tree.insert(free_tree_node);
         }
+        // Start detecting spammers once we have less than 20%
+        // of async space left (which is less than 10% of total
+        // buffer size).
+        //
+        // (This will short-circuit, so `low_oneway_space` is
+        // only called when necessary.)
+        let oneway_spam_detected =
+            is_oneway && new_oneway_space < self.size / 10 && self.low_oneway_space(pid);
         Ok((found_off, oneway_spam_detected))
     }

drivers/android/binder/thread.rs+6−11

         // Copy offsets if there are any.
         if offsets_size > 0 {
-            {
+            let mut offsets_reader =
-                let mut reader =
+                UserSlice::new(UserPtr::from_addr(trd_data_ptr.offsets as _), offsets_size)
-                    UserSlice::new(UserPtr::from_addr(trd_data_ptr.offsets as _), offsets_size)
+                    .reader();
-                        .reader();
-                alloc.copy_into(&mut reader, aligned_data_size, offsets_size)?;
-            }
             let offsets_start = aligned_data_size;
             let offsets_end = aligned_data_size + offsets_size;
                 .step_by(size_of::<u64>())
                 .enumerate()
             {
-                let offset: usize = view
+                let offset = offsets_reader.read::<u64>()?;
-                    .alloc
+                view.alloc.write(index_offset, &offset)?;
-                    .read::<u64>(index_offset)?
+                let offset: usize = offset.try_into().map_err(|_| EINVAL)?;
-                    .try_into()
-                    .map_err(|_| EINVAL)?;
                 if offset < end_of_previous_object || !is_aligned(offset, size_of::<u32>()) {
                     pr_warn!("Got transaction with invalid offset.");

drivers/ata/libata-core.c+5−5

 						ATA_QUIRK_FIRMWARE_WARN },
 	/* Seagate disks with LPM issues */
+	{ "ST1000DM010-2EP102",	NULL,		ATA_QUIRK_NOLPM },
 	{ "ST2000DM008-2FR102",	NULL,		ATA_QUIRK_NOLPM },
 	/* drives which fail FPDMA_AA activation (some may freeze afterwards)
 	/* Devices that do not need bridging limits applied */
 	{ "MTRON MSP-SATA*",		NULL,	ATA_QUIRK_BRIDGE_OK },
 	{ "BUFFALO HD-QSU2/R5",		NULL,	ATA_QUIRK_BRIDGE_OK },
+	{ "QEMU HARDDISK",		"2.5+",	ATA_QUIRK_BRIDGE_OK },
 	/* Devices which aren't very happy with higher link speeds */
 	{ "WD My Book",			NULL,	ATA_QUIRK_1_5_GBPS },
 		}
 	}
-	/* Make sure the deferred qc work finished. */
-	cancel_work_sync(&ap->deferred_qc_work);
-	WARN_ON(ap->deferred_qc);
 	/* Tell EH to disable all devices */
 	ap->pflags |= ATA_PFLAG_UNLOADING;
 	ata_port_schedule_eh(ap);
 	/* wait till EH commits suicide */
 	ata_port_wait_eh(ap);
-	/* it better be dead now */
+	/* It better be dead now and not have any remaining deferred qc. */
 	WARN_ON(!(ap->pflags & ATA_PFLAG_UNLOADED));
+	WARN_ON(ap->deferred_qc);
+	cancel_work_sync(&ap->deferred_qc_work);
 	cancel_delayed_work_sync(&ap->hotplug_task);
 	cancel_delayed_work_sync(&ap->scsi_rescan_task);

drivers/ata/libata-eh.c+20−3

@@ -640,12 +640,29 @@ void ata_scsi_cmd_error_handler(struct Scsi_Host host, struct ata_port ap, · 639 unmodified lines
640	set_host_byte(scmd, DID_OK);	640	set_host_byte(scmd, DID_OK);
641		641
642	ata_qc_for_each_raw(ap, qc, i) {	642	ata_qc_for_each_raw(ap, qc, i) {
643	if (qc->flags & ATA_QCFLAG_ACTIVE &&	643	if (qc->scsicmd != scmd)
644	qc->scsicmd == scmd)	644	continue;
		645	if ((qc->flags & ATA_QCFLAG_ACTIVE) \|\|
		646	qc == ap->deferred_qc)
645	break;	647	break;
646	}	648	}
647		649
648	if (i < ATA_MAX_QUEUE) {	650	if (i < ATA_MAX_QUEUE && qc == ap->deferred_qc) {
		651	/*
		652	* This is a deferred command that timed out while
		653	* waiting for the command queue to drain. Since the qc
		654	* is not active yet (deferred_qc is still set, so the
		655	* deferred qc work has not issued the command yet),
		656	* simply signal the timeout by finishing the SCSI
		657	* command and clear the deferred qc to prevent the
		658	* deferred qc work from issuing this qc.
		659	*/
		660	WARN_ON_ONCE(qc->flags & ATA_QCFLAG_ACTIVE);
		661	ap->deferred_qc = NULL;
		662	cancel_work(&ap->deferred_qc_work);
		663	set_host_byte(scmd, DID_TIME_OUT);
		664	scsi_eh_finish_cmd(scmd, &ap->eh_done_q);
		665	} else if (i < ATA_MAX_QUEUE) {
649	/* the scmd has an associated qc */	666	/* the scmd has an associated qc */
650	if (!(qc->flags & ATA_QCFLAG_EH)) {	667	if (!(qc->flags & ATA_QCFLAG_EH)) {
651	/* which hasn't failed yet, timeout */	668	/* which hasn't failed yet, timeout */

drivers/ata/libata-scsi.c+1−0

@@ -1699,6 +1699,7 @@ void ata_scsi_requeue_deferred_qc(struct ata_port *ap) · 1698 unmodified lines
1699		1699
1700	scmd = qc->scsicmd;	1700	scmd = qc->scsicmd;
1701	ap->deferred_qc = NULL;	1701	ap->deferred_qc = NULL;
		1702	cancel_work(&ap->deferred_qc_work);
1702	ata_qc_free(qc);	1703	ata_qc_free(qc);
1703	scmd->result = (DID_SOFT_ERROR << 16);	1704	scmd->result = (DID_SOFT_ERROR << 16);
1704	scsi_done(scmd);	1705	scsi_done(scmd);

drivers/base/base.h+1−10

 void driver_detach(const struct device_driver *drv);
 void driver_deferred_probe_del(struct device *dev);
 void device_set_deferred_probe_reason(const struct device *dev, struct va_format *vaf);
-static inline int driver_match_device_locked(const struct device_driver *drv,
-					     struct device *dev)
-{
-	device_lock_assert(dev);
-	return drv->bus->match ? drv->bus->match(dev, drv) : 1;
-}
 static inline int driver_match_device(const struct device_driver *drv,
 				      struct device *dev)
 {
-	guard(device)(dev);
+	return drv->bus->match ? drv->bus->match(dev, drv) : 1;
-	return driver_match_device_locked(drv, dev);
 }
 static inline void dev_sync_state(struct device *dev)

drivers/base/dd.c+1−1

@@ -928,7 +928,7 @@ static int __device_attach_driver(struct device_driver drv, void _data) · 927 unmodified lines
928	bool async_allowed;	928	bool async_allowed;
929	int ret;	929	int ret;
930		930
931	ret = driver_match_device_locked(drv, dev);	931	ret = driver_match_device(drv, dev);
932	if (ret == 0) {	932	if (ret == 0) {
933	/* no match */	933	/* no match */
934	return 0;	934	return 0;

drivers/base/property.c+13−14

 fwnode_get_next_child_node(const struct fwnode_handle *fwnode,
 			   struct fwnode_handle *child)
 {
-	return fwnode_call_ptr_op(fwnode, get_next_child_node, child);
+	struct fwnode_handle *next;
+	if (IS_ERR_OR_NULL(fwnode))
+		return NULL;
+	/* Try to find a child in primary fwnode */
+	next = fwnode_call_ptr_op(fwnode, get_next_child_node, child);
+	if (next)
+		return next;
+	/* When no more children in primary, continue with secondary */
+	return fwnode_call_ptr_op(fwnode->secondary, get_next_child_node, child);
 }
 EXPORT_SYMBOL_GPL(fwnode_get_next_child_node);
 struct fwnode_handle *device_get_next_child_node(const struct device *dev,
 						 struct fwnode_handle *child)
 {
-	const struct fwnode_handle *fwnode = dev_fwnode(dev);
+	return fwnode_get_next_child_node(dev_fwnode(dev), child);
-	struct fwnode_handle *next;
-	if (IS_ERR_OR_NULL(fwnode))
-		return NULL;
-	/* Try to find a child in primary fwnode */
-	next = fwnode_get_next_child_node(fwnode, child);
-	if (next)
-		return next;
-	/* When no more children in primary, continue with secondary */
-	return fwnode_get_next_child_node(fwnode->secondary, child);
 }
 EXPORT_SYMBOL_GPL(device_get_next_child_node);

drivers/block/drbd/drbd_actlog.c+23−30

@@ -483,38 +483,20 @@ void drbd_al_begin_io(struct drbd_device device, struct drbd_interval i) · 482 unmodified lines
483		483
484	int drbd_al_begin_io_nonblock(struct drbd_device device, struct drbd_interval i)	484	int drbd_al_begin_io_nonblock(struct drbd_device device, struct drbd_interval i)
485	{	485	{
486	struct lru_cache *al = device->act_log;
487	/* for bios crossing activity log extent boundaries,	486	/* for bios crossing activity log extent boundaries,
488	* we may need to activate two extents in one go */	487	* we may need to activate two extents in one go */
489	unsigned first = i->sector >> (AL_EXTENT_SHIFT-9);	488	unsigned first = i->sector >> (AL_EXTENT_SHIFT-9);
490	unsigned last = i->size == 0 ? first : (i->sector + (i->size >> 9) - 1) >> (AL_EXTENT_SHIFT-9);	489	unsigned last = i->size == 0 ? first : (i->sector + (i->size >> 9) - 1) >> (AL_EXTENT_SHIFT-9);
491	unsigned nr_al_extents;
492	unsigned available_update_slots;
493	unsigned enr;	490	unsigned enr;
494		491
495	D_ASSERT(device, first <= last);	492	if (i->partially_in_al_next_enr) {
496		493	D_ASSERT(device, first < i->partially_in_al_next_enr);
497	nr_al_extents = 1 + last - first; /* worst case: all touched extends are cold. */	494	D_ASSERT(device, last >= i->partially_in_al_next_enr);
498	available_update_slots = min(al->nr_elements - al->used,	495	first = i->partially_in_al_next_enr;
499	al->max_pending_changes - al->pending_changes);
500
501	/* We want all necessary updates for a given request within the same transaction
502	* We could first check how many updates are actually needed,
503	* and use that instead of the worst-case nr_al_extents */
504	if (available_update_slots < nr_al_extents) {
505	/* Too many activity log extents are currently "hot".
506	*
507	* If we have accumulated pending changes already,
508	* we made progress.
509	*
510	* If we cannot get even a single pending change through,
511	* stop the fast path until we made some progress,
512	* or requests to "cold" extents could be starved. */
513	if (!al->pending_changes)
514	__set_bit(__LC_STARVING, &device->act_log->flags);
515	return -ENOBUFS;
516	}	496	}
517		497
		498	D_ASSERT(device, first <= last);
		499
518	/* Is resync active in this area? */	500	/* Is resync active in this area? */
519	for (enr = first; enr <= last; enr++) {	501	for (enr = first; enr <= last; enr++) {
520	struct lc_element *tmp;	502	struct lc_element *tmp;
@@ -529,14 +511,21 @@ int drbd_al_begin_io_nonblock(struct drbd_device device, struct drbd_interval · 8 unmodified lines
529	}	511	}
530	}	512	}
531		513
532	/* Checkout the refcounts.	514	/* Try to checkout the refcounts. */
533	* Given that we checked for available elements and update slots above,
534	* this has to be successful. */
535	for (enr = first; enr <= last; enr++) {	515	for (enr = first; enr <= last; enr++) {
536	struct lc_element *al_ext;	516	struct lc_element *al_ext;
537	al_ext = lc_get_cumulative(device->act_log, enr);	517	al_ext = lc_get_cumulative(device->act_log, enr);
538	if (!al_ext)	518
539	drbd_info(device, "LOGIC BUG for enr=%u\n", enr);	519	if (!al_ext) {
		520	/* Did not work. We may have exhausted the possible
		521	* changes per transaction. Or raced with someone
		522	* "locking" it against changes.
		523	* Remember where to continue from.
		524	*/
		525	if (enr > first)
		526	i->partially_in_al_next_enr = enr;
		527	return -ENOBUFS;
		528	}
540	}	529	}
541	return 0;	530	return 0;
542	}	531	}
@@ -556,7 +545,11 @@ void drbd_al_complete_io(struct drbd_device device, struct drbd_interval i) · 13 unmodified lines
556		545
557	for (enr = first; enr <= last; enr++) {	546	for (enr = first; enr <= last; enr++) {
558	extent = lc_find(device->act_log, enr);	547	extent = lc_find(device->act_log, enr);
559	if (!extent) {	548	/* Yes, this masks a bug elsewhere. However, during normal
		549	* operation this is harmless, so no need to crash the kernel
		550	* by the BUG_ON(refcount == 0) in lc_put().
		551	*/
		552	if (!extent \|\| extent->refcnt == 0) {
560	drbd_err(device, "al_complete_io() called on inactive extent %u\n", enr);	553	drbd_err(device, "al_complete_io() called on inactive extent %u\n", enr);
561	continue;	554	continue;
562	}	555	}

drivers/block/drbd/drbd_interval.h+4−1

 struct drbd_interval {
 	struct rb_node rb;
 	sector_t sector;		/* start sector of the interval */
-	unsigned int size;		/* size in bytes */
 	sector_t end;			/* highest interval end in subtree */
+	unsigned int size;		/* size in bytes */
 	unsigned int local:1		/* local or remote request? */;
 	unsigned int waiting:1;		/* someone is waiting for completion */
 	unsigned int completed:1;	/* this has been completed already;
 					 * ignore for conflict detection */
+	/* to resume a partially successful drbd_al_begin_io_nonblock(); */
+	unsigned int partially_in_al_next_enr;
 };
 static inline void drbd_clear_interval(struct drbd_interval *i)

drivers/block/drbd/drbd_main.c+9−5

 #include <linux/memcontrol.h>
 #include <linux/mm_inline.h>
 #include <linux/slab.h>
+#include <linux/string.h>
 #include <linux/random.h>
 #include <linux/reboot.h>
 #include <linux/notifier.h>
 	}
 	if (apv >= 88)
-		strcpy(p->verify_alg, nc->verify_alg);
+		strscpy(p->verify_alg, nc->verify_alg);
 	if (apv >= 89)
-		strcpy(p->csums_alg, nc->csums_alg);
+		strscpy(p->csums_alg, nc->csums_alg);
 	rcu_read_unlock();
 	return drbd_send_command(peer_device, sock, cmd, size, NULL, 0);
 	struct drbd_socket *sock;
 	struct p_protocol *p;
 	struct net_conf *nc;
+	size_t integrity_alg_len;
 	int size, cf;
 	sock = &connection->data;
 	}
 	size = sizeof(*p);
-	if (connection->agreed_pro_version >= 87)
+	if (connection->agreed_pro_version >= 87) {
-		size += strlen(nc->integrity_alg) + 1;
+		integrity_alg_len = strlen(nc->integrity_alg) + 1;
+		size += integrity_alg_len;
+	}
 	p->protocol      = cpu_to_be32(nc->wire_protocol);
 	p->after_sb_0p   = cpu_to_be32(nc->after_sb_0p);
 	p->conn_flags    = cpu_to_be32(cf);
 	if (connection->agreed_pro_version >= 87)
-		strcpy(p->integrity_alg, nc->integrity_alg);
+		strscpy(p->integrity_alg, nc->integrity_alg, integrity_alg_len);
 	rcu_read_unlock();
 	return __conn_send_command(connection, sock, cmd, size, NULL, 0);

drivers/block/drbd/drbd_receiver.c+2−2

@@ -3801,14 +3801,14 @@ static int receive_SyncParam(struct drbd_connection *connection, struct packet_i · 3800 unmodified lines
3801	new_net_conf = old_net_conf;	3801	new_net_conf = old_net_conf;
3802		3802
3803	if (verify_tfm) {	3803	if (verify_tfm) {
3804	strcpy(new_net_conf->verify_alg, p->verify_alg);	3804	strscpy(new_net_conf->verify_alg, p->verify_alg);
3805	new_net_conf->verify_alg_len = strlen(p->verify_alg) + 1;	3805	new_net_conf->verify_alg_len = strlen(p->verify_alg) + 1;
3806	crypto_free_shash(peer_device->connection->verify_tfm);	3806	crypto_free_shash(peer_device->connection->verify_tfm);
3807	peer_device->connection->verify_tfm = verify_tfm;	3807	peer_device->connection->verify_tfm = verify_tfm;
3808	drbd_info(device, "using verify-alg: \"%s\"\n", p->verify_alg);	3808	drbd_info(device, "using verify-alg: \"%s\"\n", p->verify_alg);
3809	}	3809	}
3810	if (csums_tfm) {	3810	if (csums_tfm) {
3811	strcpy(new_net_conf->csums_alg, p->csums_alg);	3811	strscpy(new_net_conf->csums_alg, p->csums_alg);
3812	new_net_conf->csums_alg_len = strlen(p->csums_alg) + 1;	3812	new_net_conf->csums_alg_len = strlen(p->csums_alg) + 1;
3813	crypto_free_shash(peer_device->connection->csums_tfm);	3813	crypto_free_shash(peer_device->connection->csums_tfm);
3814	peer_device->connection->csums_tfm = csums_tfm;	3814	peer_device->connection->csums_tfm = csums_tfm;

drivers/block/drbd/drbd_req.c+2−1

@@ -621,7 +621,8 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what, · 620 unmodified lines
621	break;	621	break;
622		622
623	case READ_COMPLETED_WITH_ERROR:	623	case READ_COMPLETED_WITH_ERROR:
624	drbd_set_out_of_sync(peer_device, req->i.sector, req->i.size);	624	drbd_set_out_of_sync(first_peer_device(device),
		625	req->i.sector, req->i.size);
625	drbd_report_io_error(device, req);	626	drbd_report_io_error(device, req);
626	__drbd_chk_io_error(device, DRBD_READ_ERROR);	627	__drbd_chk_io_error(device, DRBD_READ_ERROR);
627	fallthrough;	628	fallthrough;

drivers/block/ublk_drv.c+12−4

 	/* Skip partition scan if disabled by user */
 	if (ub->dev_info.flags & UBLK_F_NO_AUTO_PART_SCAN) {
-		clear_bit(GD_SUPPRESS_PART_SCAN, &disk->state);
+		/* Not clear for unprivileged daemons, see comment above */
+		if (!ub->unprivileged_daemons)
+			clear_bit(GD_SUPPRESS_PART_SCAN, &disk->state);
 	} else {
 		/* Schedule async partition scan for trusted daemons */
 		if (!ub->unprivileged_daemons)
 	return 0;
 }
-static void ublk_ctrl_set_size(struct ublk_device *ub, const struct ublksrv_ctrl_cmd *header)
+static int ublk_ctrl_set_size(struct ublk_device *ub, const struct ublksrv_ctrl_cmd *header)
 {
 	struct ublk_param_basic *p = &ub->params.basic;
 	u64 new_size = header->data[0];
+	int ret = 0;
 	mutex_lock(&ub->mutex);
+	if (!ub->ub_disk) {
+		ret = -ENODEV;
+		goto out;
+	}
 	p->dev_sectors = new_size;
 	set_capacity_and_notify(ub->ub_disk, p->dev_sectors);
+out:
 	mutex_unlock(&ub->mutex);
+	return ret;
 }
 struct count_busy {
 		ret = ublk_ctrl_end_recovery(ub, &header);
 		break;
 	case UBLK_CMD_UPDATE_SIZE:
-		ublk_ctrl_set_size(ub, &header);
+		ret = ublk_ctrl_set_size(ub, &header);
-		ret = 0;
 		break;
 	case UBLK_CMD_QUIESCE_DEV:
 		ret = ublk_ctrl_quiesce_dev(ub, &header);

drivers/block/zloop.c+24−7

 	zloop_put_cmd(cmd);
 }
+/*
+ * Sync the entire FS containing the zone files instead of walking all files.
+ */
+static int zloop_flush(struct zloop_device *zlo)
+{
+	struct super_block *sb = file_inode(zlo->data_dir)->i_sb;
+	int ret;
+	down_read(&sb->s_umount);
+	ret = sync_filesystem(sb);
+	up_read(&sb->s_umount);
+	return ret;
+}
 static void zloop_handle_cmd(struct zloop_cmd *cmd)
 {
 	struct request *rq = blk_mq_rq_from_pdu(cmd);
 		zloop_rw(cmd);
 		return;
 	case REQ_OP_FLUSH:
-		/*
+		cmd->ret = zloop_flush(zlo);
-		 * Sync the entire FS containing the zone files instead of
-		 * walking all files
-		 */
-		cmd->ret = sync_filesystem(file_inode(zlo->data_dir)->i_sb);
 		break;
 	case REQ_OP_ZONE_RESET:
 		cmd->ret = zloop_reset_zone(zlo, rq_zone_no(rq));
 	struct queue_limits lim = {
 		.max_hw_sectors		= SZ_1M >> SECTOR_SHIFT,
 		.chunk_sectors		= opts->zone_size,
-		.features		= BLK_FEAT_ZONED,
+		.features		= BLK_FEAT_ZONED | BLK_FEAT_WRITE_CACHE,
 	};
 	unsigned int nr_zones, i, j;
 	struct zloop_device *zlo;
 	int ret;
 	if (!(opts->mask & ZLOOP_OPT_ID)) {
-		pr_err("No ID specified\n");
+		pr_err("No ID specified for remove\n");
+		return -EINVAL;
+	}
+	if (opts->mask & ~ZLOOP_OPT_ID) {
+		pr_err("Invalid option specified for remove\n");
 		return -EINVAL;
 	}

drivers/block/zram/zram_drv.c+12−12

@@ -549,7 +549,7 @@ static ssize_t bd_stat_show(struct device dev, struct device_attribute attr, · 548 unmodified lines
549	return ret;	549	return ret;
550	}	550	}
551		551
552	static ssize_t writeback_compressed_store(struct device *dev,	552	static ssize_t compressed_writeback_store(struct device *dev,
553	struct device_attribute *attr,	553	struct device_attribute *attr,
554	const char *buf, size_t len)	554	const char *buf, size_t len)
555	{	555	{
@@ -564,12 +564,12 @@ static ssize_t writeback_compressed_store(struct device *dev, · 8 unmodified lines
564	return -EBUSY;	564	return -EBUSY;
565	}	565	}
566		566
567	zram->wb_compressed = val;	567	zram->compressed_wb = val;
568		568
569	return len;	569	return len;
570	}	570	}
571		571
572	static ssize_t writeback_compressed_show(struct device *dev,	572	static ssize_t compressed_writeback_show(struct device *dev,
573	struct device_attribute *attr,	573	struct device_attribute *attr,
574	char *buf)	574	char *buf)
575	{	575	{
@@ -577,7 +577,7 @@ static ssize_t writeback_compressed_show(struct device *dev, · 1 unmodified line
577	struct zram *zram = dev_to_zram(dev);	577	struct zram *zram = dev_to_zram(dev);
578		578
579	guard(rwsem_read)(&zram->dev_lock);	579	guard(rwsem_read)(&zram->dev_lock);
580	val = zram->wb_compressed;	580	val = zram->compressed_wb;
581		581
582	return sysfs_emit(buf, "%d\n", val);	582	return sysfs_emit(buf, "%d\n", val);
583	}	583	}
@@ -946,7 +946,7 @@ static int zram_writeback_complete(struct zram zram, struct zram_wb_req req) · 362 unmodified lines
946	goto out;	946	goto out;
947	}	947	}
948		948
949	if (zram->wb_compressed) {	949	if (zram->compressed_wb) {
950	/*	950	/*
951	* ZRAM_WB slots get freed, we need to preserve data required	951	* ZRAM_WB slots get freed, we need to preserve data required
952	* for read decompression.	952	* for read decompression.
@@ -960,7 +960,7 @@ static int zram_writeback_complete(struct zram zram, struct zram_wb_req req) · 7 unmodified lines
960	set_slot_flag(zram, index, ZRAM_WB);	960	set_slot_flag(zram, index, ZRAM_WB);
961	set_slot_handle(zram, index, req->blk_idx);	961	set_slot_handle(zram, index, req->blk_idx);
962		962
963	if (zram->wb_compressed) {	963	if (zram->compressed_wb) {
964	if (huge)	964	if (huge)
965	set_slot_flag(zram, index, ZRAM_HUGE);	965	set_slot_flag(zram, index, ZRAM_HUGE);
966	set_slot_size(zram, index, size);	966	set_slot_size(zram, index, size);
@@ -1100,7 +1100,7 @@ static int zram_writeback_slots(struct zram *zram, · 133 unmodified lines
1100	*/	1100	*/
1101	if (!test_slot_flag(zram, index, ZRAM_PP_SLOT))	1101	if (!test_slot_flag(zram, index, ZRAM_PP_SLOT))
1102	goto next;	1102	goto next;
1103	if (zram->wb_compressed)	1103	if (zram->compressed_wb)
1104	err = read_from_zspool_raw(zram, req->page, index);	1104	err = read_from_zspool_raw(zram, req->page, index);
1105	else	1105	else
1106	err = read_from_zspool(zram, req->page, index);	1106	err = read_from_zspool(zram, req->page, index);
@@ -1429,7 +1429,7 @@ static void zram_async_read_endio(struct bio *bio) · 322 unmodified lines
1429	*	1429	*
1430	* Keep the existing behavior for now.	1430	* Keep the existing behavior for now.
1431	*/	1431	*/
1432	if (zram->wb_compressed == false) {	1432	if (zram->compressed_wb == false) {
1433	/* No decompression needed, complete the parent IO */	1433	/* No decompression needed, complete the parent IO */
1434	bio_endio(req->parent);	1434	bio_endio(req->parent);
1435	bio_put(bio);	1435	bio_put(bio);
@@ -1508,7 +1508,7 @@ static int read_from_bdev_sync(struct zram zram, struct page page, u32 index, · 72 unmodified lines
1508	flush_work(&req.work);	1508	flush_work(&req.work);
1509	destroy_work_on_stack(&req.work);	1509	destroy_work_on_stack(&req.work);
1510		1510
1511	if (req.error \|\| zram->wb_compressed == false)	1511	if (req.error \|\| zram->compressed_wb == false)
1512	return req.error;	1512	return req.error;
1513		1513
1514	return decompress_bdev_page(zram, page, index);	1514	return decompress_bdev_page(zram, page, index);
@@ -3007,7 +3007,7 @@ static DEVICE_ATTR_WO(writeback); · 1492 unmodified lines
3007	static DEVICE_ATTR_RW(writeback_limit);	3007	static DEVICE_ATTR_RW(writeback_limit);
3008	static DEVICE_ATTR_RW(writeback_limit_enable);	3008	static DEVICE_ATTR_RW(writeback_limit_enable);
3009	static DEVICE_ATTR_RW(writeback_batch_size);	3009	static DEVICE_ATTR_RW(writeback_batch_size);
3010	static DEVICE_ATTR_RW(writeback_compressed);	3010	static DEVICE_ATTR_RW(compressed_writeback);
3011	#endif	3011	#endif
3012	#ifdef CONFIG_ZRAM_MULTI_COMP	3012	#ifdef CONFIG_ZRAM_MULTI_COMP
3013	static DEVICE_ATTR_RW(recomp_algorithm);	3013	static DEVICE_ATTR_RW(recomp_algorithm);
@@ -3031,7 +3031,7 @@ static struct attribute *zram_disk_attrs[] = { · 17 unmodified lines
3031	&dev_attr_writeback_limit.attr,	3031	&dev_attr_writeback_limit.attr,
3032	&dev_attr_writeback_limit_enable.attr,	3032	&dev_attr_writeback_limit_enable.attr,
3033	&dev_attr_writeback_batch_size.attr,	3033	&dev_attr_writeback_batch_size.attr,
3034	&dev_attr_writeback_compressed.attr,	3034	&dev_attr_compressed_writeback.attr,
3035	#endif	3035	#endif
3036	&dev_attr_io_stat.attr,	3036	&dev_attr_io_stat.attr,
3037	&dev_attr_mm_stat.attr,	3037	&dev_attr_mm_stat.attr,
@@ -3091,7 +3091,7 @@ static int zram_add(void) · 53 unmodified lines
3091	init_rwsem(&zram->dev_lock);	3091	init_rwsem(&zram->dev_lock);
3092	#ifdef CONFIG_ZRAM_WRITEBACK	3092	#ifdef CONFIG_ZRAM_WRITEBACK
3093	zram->wb_batch_size = 32;	3093	zram->wb_batch_size = 32;
3094	zram->wb_compressed = false;	3094	zram->compressed_wb = false;
3095	#endif	3095	#endif
3096		3096
3097	/* gendisk structure */	3097	/* gendisk structure */

drivers/block/zram/zram_drv.h+1−1

@@ -133,7 +133,7 @@ struct zram { · 132 unmodified lines
133	#ifdef CONFIG_ZRAM_WRITEBACK	133	#ifdef CONFIG_ZRAM_WRITEBACK
134	struct file *backing_dev;	134	struct file *backing_dev;
135	bool wb_limit_enable;	135	bool wb_limit_enable;
136	bool wb_compressed;	136	bool compressed_wb;
137	u32 wb_batch_size;	137	u32 wb_batch_size;
138	u64 bd_wb_limit;	138	u64 bd_wb_limit;
139	struct block_device *bdev;	139	struct block_device *bdev;

drivers/bluetooth/hci_qca.c+14−10

@@ -2046,19 +2046,23 @@ retry: · 2045 unmodified lines
2046	}	2046	}
2047		2047
2048	out:	2048	out:
2049	if (ret && retries < MAX_INIT_RETRIES) {	2049	if (ret) {
2050	bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
2051	qca_power_shutdown(hu);	2050	qca_power_shutdown(hu);
2052	if (hu->serdev) {	2051
2053	serdev_device_close(hu->serdev);	2052	if (retries < MAX_INIT_RETRIES) {
2054	ret = serdev_device_open(hu->serdev);	2053	bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
2055	if (ret) {	2054	if (hu->serdev) {
2056	bt_dev_err(hdev, "failed to open port");	2055	serdev_device_close(hu->serdev);
2057	return ret;	2056	ret = serdev_device_open(hu->serdev);
		2057	if (ret) {
		2058	bt_dev_err(hdev, "failed to open port");
		2059	return ret;
		2060	}
2058	}	2061	}
		2062	retries++;
		2063	goto retry;
2059	}	2064	}
2060	retries++;	2065	return ret;
2061	goto retry;
2062	}	2066	}
2063		2067
2064	/* Setup bdaddr */	2068	/* Setup bdaddr */

drivers/char/ipmi/ipmi_ipmb.c+5−0

 		break;
 	case I2C_SLAVE_READ_REQUESTED:
+		*val = 0xff;
+		ipmi_ipmb_check_msg_done(iidev);
+		break;
 	case I2C_SLAVE_STOP:
 		ipmi_ipmb_check_msg_done(iidev);
 		break;
 	case I2C_SLAVE_READ_PROCESSED:
+		*val = 0xff;
 		break;
 	}

drivers/char/ipmi/ipmi_msghandler.c+95−46

 static int __scan_channels(struct ipmi_smi *intf,
 				struct ipmi_device_id *id, bool rescan);
+static void ipmi_lock_xmit_msgs(struct ipmi_smi *intf, int run_to_completion,
+				unsigned long *flags)
+{
+	if (run_to_completion)
+		return;
+	spin_lock_irqsave(&intf->xmit_msgs_lock, *flags);
+}
+static void ipmi_unlock_xmit_msgs(struct ipmi_smi *intf, int run_to_completion,
+				  unsigned long *flags)
+{
+	if (run_to_completion)
+		return;
+	spin_unlock_irqrestore(&intf->xmit_msgs_lock, *flags);
+}
 static void free_ipmi_user(struct kref *ref)
 {
 	struct ipmi_user *user = container_of(ref, struct ipmi_user, refcount);
 	return smi_msg;
 }
-static void smi_send(struct ipmi_smi *intf,
+static int smi_send(struct ipmi_smi *intf,
 		     const struct ipmi_smi_handlers *handlers,
 		     struct ipmi_smi_msg *smi_msg, int priority)
 {
 	int run_to_completion = READ_ONCE(intf->run_to_completion);
 	unsigned long flags = 0;
+	int rv = 0;
-	if (!run_to_completion)
+	ipmi_lock_xmit_msgs(intf, run_to_completion, &flags);
-		spin_lock_irqsave(&intf->xmit_msgs_lock, flags);
 	smi_msg = smi_add_send_msg(intf, smi_msg, priority);
-	if (!run_to_completion)
+	ipmi_unlock_xmit_msgs(intf, run_to_completion, &flags);
-		spin_unlock_irqrestore(&intf->xmit_msgs_lock, flags);
-	if (smi_msg)
+	if (smi_msg) {
-		handlers->sender(intf->send_info, smi_msg);
+		rv = handlers->sender(intf->send_info, smi_msg);
+		if (rv) {
+			ipmi_lock_xmit_msgs(intf, run_to_completion, &flags);
+			intf->curr_msg = NULL;
+			ipmi_unlock_xmit_msgs(intf, run_to_completion, &flags);
+			/*
+			 * Something may have been added to the transmit
+			 * queue, so schedule a check for that.
+			 */
+			queue_work(system_wq, &intf->smi_work);
+		}
+	}
+	return rv;
 }
 static bool is_maintenance_mode_cmd(struct kernel_ipmi_msg *msg)
 	struct ipmi_recv_msg *recv_msg;
 	int run_to_completion = READ_ONCE(intf->run_to_completion);
 	int rv = 0;
+	bool in_seq_table = false;
 	if (supplied_recv) {
 		recv_msg = supplied_recv;
 		rv = i_ipmi_req_ipmb(intf, addr, msgid, msg, smi_msg, recv_msg,
 				     source_address, source_lun,
 				     retries, retry_time_ms);
+		in_seq_table = true;
 	} else if (is_ipmb_direct_addr(addr)) {
 		rv = i_ipmi_req_ipmb_direct(intf, addr, msgid, msg, smi_msg,
 					    recv_msg, source_lun);
 	} else if (is_lan_addr(addr)) {
 		rv = i_ipmi_req_lan(intf, addr, msgid, msg, smi_msg, recv_msg,
 				    source_lun, retries, retry_time_ms);
+		in_seq_table = true;
 	} else {
-	    /* Unknown address type. */
+		/* Unknown address type. */
 		ipmi_inc_stat(intf, sent_invalid_commands);
 		rv = -EINVAL;
 	}
-	if (rv) {
+	if (!rv) {
-out_err:
-		if (!supplied_smi)
-			ipmi_free_smi_msg(smi_msg);
-		if (!supplied_recv)
-			ipmi_free_recv_msg(recv_msg);
-	} else {
 		dev_dbg(intf->si_dev, "Send: %*ph\n",
 			smi_msg->data_size, smi_msg->data);
-		smi_send(intf, intf->handlers, smi_msg, priority);
+		rv = smi_send(intf, intf->handlers, smi_msg, priority);
+		if (rv != IPMI_CC_NO_ERROR)
+			/* smi_send() returns an IPMI err, return a Linux one. */
+			rv = -EIO;
+		if (rv && in_seq_table) {
+			/*
+			 * If it's in the sequence table, it will be
+			 * retried later, so ignore errors.
+			 */
+			rv = 0;
+			/* But we need to fix the timeout. */
+			intf_start_seq_timer(intf, smi_msg->msgid);
+			ipmi_free_smi_msg(smi_msg);
+			smi_msg = NULL;
+		}
 	}
+out_err:
 	if (!run_to_completion)
 		mutex_unlock(&intf->users_mutex);
+	if (rv) {
+		if (!supplied_smi)
+			ipmi_free_smi_msg(smi_msg);
+		if (!supplied_recv)
+			ipmi_free_recv_msg(recv_msg);
+	}
 	return rv;
 }
 		dev_dbg(intf->si_dev, "Invalid command: %*ph\n",
 			msg->data_size, msg->data);
-		smi_send(intf, intf->handlers, msg, 0);
+		if (smi_send(intf, intf->handlers, msg, 0) == IPMI_CC_NO_ERROR)
-		/*
+			/*
-		 * We used the message, so return the value that
+			 * We used the message, so return the value that
-		 * causes it to not be freed or queued.
+			 * causes it to not be freed or queued.
-		 */
+			 */
-		rv = -1;
+			rv = -1;
 	} else if (!IS_ERR(recv_msg)) {
 		/* Extract the source address from the data. */
 		ipmb_addr = (struct ipmi_ipmb_addr *) &recv_msg->addr;
 		msg->data[4] = IPMI_INVALID_CMD_COMPLETION_CODE;
 		msg->data_size = 5;
-		smi_send(intf, intf->handlers, msg, 0);
+		if (smi_send(intf, intf->handlers, msg, 0) == IPMI_CC_NO_ERROR)
-		/*
+			/*
-		 * We used the message, so return the value that
+			 * We used the message, so return the value that
-		 * causes it to not be freed or queued.
+			 * causes it to not be freed or queued.
-		 */
+			 */
-		rv = -1;
+			rv = -1;
 	} else if (!IS_ERR(recv_msg)) {
 		/* Extract the source address from the data. */
 		daddr = (struct ipmi_ipmb_direct_addr *)&recv_msg->addr;
 				  struct ipmi_smi_msg *msg)
 {
 	struct cmd_rcvr          *rcvr;
-	int                      rv = 0;
+	int                      rv = 0; /* Free by default */
 	unsigned char            netfn;
 	unsigned char            cmd;
 	unsigned char            chan;
 		dev_dbg(intf->si_dev, "Invalid command: %*ph\n",
 			msg->data_size, msg->data);
-		smi_send(intf, intf->handlers, msg, 0);
+		if (smi_send(intf, intf->handlers, msg, 0) == IPMI_CC_NO_ERROR)
-		/*
+			/*
-		 * We used the message, so return the value that
+			 * We used the message, so return the value that
-		 * causes it to not be freed or queued.
+			 * causes it to not be freed or queued.
-		 */
+			 */
-		rv = -1;
+			rv = -1;
 	} else if (!IS_ERR(recv_msg)) {
 		/* Extract the source address from the data. */
 		lan_addr = (struct ipmi_lan_addr *) &recv_msg->addr;
 	 * message delivery.
 	 */
 restart:
-	if (!run_to_completion)
+	ipmi_lock_xmit_msgs(intf, run_to_completion, &flags);
-		spin_lock_irqsave(&intf->xmit_msgs_lock, flags);
 	if (intf->curr_msg == NULL && !intf->in_shutdown) {
 		struct list_head *entry = NULL;
 			intf->curr_msg = newmsg;
 		}
 	}
-	if (!run_to_completion)
+	ipmi_unlock_xmit_msgs(intf, run_to_completion, &flags);
-		spin_unlock_irqrestore(&intf->xmit_msgs_lock, flags);
 	if (newmsg) {
 		cc = intf->handlers->sender(intf->send_info, newmsg);
 			if (newmsg->recv_msg)
 				deliver_err_response(intf,
 						     newmsg->recv_msg, cc);
-			else
+			ipmi_lock_xmit_msgs(intf, run_to_completion, &flags);
-				ipmi_free_smi_msg(newmsg);
+			intf->curr_msg = NULL;
+			ipmi_unlock_xmit_msgs(intf, run_to_completion, &flags);
+			ipmi_free_smi_msg(newmsg);
+			newmsg = NULL;
 			goto restart;
 		}
 	}
 		spin_unlock_irqrestore(&intf->waiting_rcv_msgs_lock,
 				       flags);
-	if (!run_to_completion)
+	ipmi_lock_xmit_msgs(intf, run_to_completion, &flags);
-		spin_lock_irqsave(&intf->xmit_msgs_lock, flags);
 	/*
 	 * We can get an asynchronous event or receive message in addition
 	 * to commands we send.
 	 */
 	if (msg == intf->curr_msg)
 		intf->curr_msg = NULL;
-	if (!run_to_completion)
+	ipmi_unlock_xmit_msgs(intf, run_to_completion, &flags);
-		spin_unlock_irqrestore(&intf->xmit_msgs_lock, flags);
 	if (run_to_completion)
 		smi_work(&intf->smi_work);
 				ipmi_inc_stat(intf,
 					      retransmitted_ipmb_commands);
-			smi_send(intf, intf->handlers, smi_msg, 0);
+			/* If this fails we'll retry later or timeout. */
+			if (smi_send(intf, intf->handlers, smi_msg, 0) != IPMI_CC_NO_ERROR) {
+				/* But fix the timeout. */
+				intf_start_seq_timer(intf, smi_msg->msgid);
+				ipmi_free_smi_msg(smi_msg);
+			}
 		} else
 			ipmi_free_smi_msg(smi_msg);

drivers/char/ipmi/ipmi_si_intf.c+24−13

 			 */
 			return_hosed_msg(smi_info, IPMI_BUS_ERR);
 		}
+		if (smi_info->waiting_msg != NULL) {
+			/* Also handle if there was a message waiting. */
+			smi_info->curr_msg = smi_info->waiting_msg;
+			smi_info->waiting_msg = NULL;
+			return_hosed_msg(smi_info, IPMI_BUS_ERR);
+		}
 		smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_HOSED);
 		goto out;
 	}
 {
 	struct smi_info   *smi_info = send_info;
 	unsigned long     flags;
+	int rv = IPMI_CC_NO_ERROR;
 	debug_timestamp(smi_info, "Enqueue");
+	/*
+	 * Check here for run to completion mode.  A check under lock is
+	 * later.
+	 */
 	if (smi_info->si_state == SI_HOSED)
 		return IPMI_BUS_ERR;
 	}
 	spin_lock_irqsave(&smi_info->si_lock, flags);
-	/*
+	if (smi_info->si_state == SI_HOSED) {
-	 * The following two lines don't need to be under the lock for
+		rv = IPMI_BUS_ERR;
-	 * the lock's sake, but they do need SMP memory barriers to
+	} else {
-	 * avoid getting things out of order.  We are already claiming
+		BUG_ON(smi_info->waiting_msg);
-	 * the lock, anyway, so just do it under the lock to avoid the
+		smi_info->waiting_msg = msg;
-	 * ordering problem.
+		check_start_timer_thread(smi_info);
-	 */
+	}
-	BUG_ON(smi_info->waiting_msg);
-	smi_info->waiting_msg = msg;
-	check_start_timer_thread(smi_info);
 	spin_unlock_irqrestore(&smi_info->si_lock, flags);
-	return IPMI_CC_NO_ERROR;
+	return rv;
 }
 static void set_run_to_completion(void *send_info, bool i_run_to_completion)
 		     * SI_USEC_PER_JIFFY);
 	smi_result = smi_event_handler(smi_info, time_diff);
-	if ((smi_info->io.irq) && (!smi_info->interrupt_disabled)) {
+	if (smi_info->si_state == SI_HOSED) {
+		timeout = jiffies + SI_TIMEOUT_HOSED;
+	} else if ((smi_info->io.irq) && (!smi_info->interrupt_disabled)) {
 		/* Running with interrupts, only do long timeouts. */
 		timeout = jiffies + SI_TIMEOUT_JIFFIES;
 		smi_inc_stat(smi_info, long_timeouts);
 	unsigned long jiffies_now;
 	long time_diff;
-	while (smi_info->curr_msg || (smi_info->si_state != SI_NORMAL)) {
+	while (smi_info->si_state != SI_HOSED &&
+		    (smi_info->curr_msg || (smi_info->si_state != SI_NORMAL))) {
 		jiffies_now = jiffies;
 		time_diff = (((long)jiffies_now - (long)smi_info->last_timeout_jiffies)
 		     * SI_USEC_PER_JIFFY);

drivers/char/ipmi/ipmi_si_ls2k.c+1−1

@@ -168,7 +168,7 @@ static void ipmi_ls2k_remove(struct platform_device *pdev) · 167 unmodified lines
168	ipmi_si_remove_by_dev(&pdev->dev);	168	ipmi_si_remove_by_dev(&pdev->dev);
169	}	169	}
170		170
171	struct platform_driver ipmi_ls2k_platform_driver = {	171	static struct platform_driver ipmi_ls2k_platform_driver = {
172	.driver = {	172	.driver = {
173	.name = "ls2k-ipmi-si",	173	.name = "ls2k-ipmi-si",
174	},	174	},

drivers/char/random.c+1−11

 /* Control how we warn userspace. */
 static struct ratelimit_state urandom_warning =
 	RATELIMIT_STATE_INIT_FLAGS("urandom_warning", HZ, 3, RATELIMIT_MSG_ON_RELEASE);
-static int ratelimit_disable __read_mostly =
+static int ratelimit_disable __read_mostly = 0;
-	IS_ENABLED(CONFIG_WARN_ALL_UNSEEDED_RANDOM);
 module_param_named(ratelimit_disable, ratelimit_disable, int, 0644);
 MODULE_PARM_DESC(ratelimit_disable, "Disable random ratelimit suppression");
 	return ret;
 }
-#define warn_unseeded_randomness() \
-	if (IS_ENABLED(CONFIG_WARN_ALL_UNSEEDED_RANDOM) && !crng_ready()) \
-		printk_deferred(KERN_NOTICE "random: %s called from %pS with crng_init=%d\n", \
-				__func__, (void *)_RET_IP_, crng_init)
 /*********************************************************************
  *
  * Fast key erasure RNG, the "crng".
  */
 void get_random_bytes(void *buf, size_t len)
 {
-	warn_unseeded_randomness();
 	_get_random_bytes(buf, len);
 }
 EXPORT_SYMBOL(get_random_bytes);
 	struct batch_ ##type *batch;						\
 	unsigned long next_gen;							\
 										\
-	warn_unseeded_randomness();						\
-										\
 	if  (!crng_ready()) {							\
 		_get_random_bytes(&ret, sizeof(ret));				\
 		return ret;							\

drivers/clk/imx/clk-imx8qxp.c+23−1

@@ -346,7 +346,29 @@ static struct platform_driver imx8qxp_clk_driver = { · 345 unmodified lines
346	},	346	},
347	.probe = imx8qxp_clk_probe,	347	.probe = imx8qxp_clk_probe,
348	};	348	};
349	module_platform_driver(imx8qxp_clk_driver);	349
		350	static int __init imx8qxp_clk_init(void)
		351	{
		352	int ret;
		353
		354	ret = platform_driver_register(&imx8qxp_clk_driver);
		355	if (ret)
		356	return ret;
		357
		358	ret = imx_clk_scu_module_init();
		359	if (ret)
		360	platform_driver_unregister(&imx8qxp_clk_driver);
		361
		362	return ret;
		363	}
		364	module_init(imx8qxp_clk_init);
		365
		366	static void __exit imx8qxp_clk_exit(void)
		367	{
		368	imx_clk_scu_module_exit();
		369	platform_driver_unregister(&imx8qxp_clk_driver);
		370	}
		371	module_exit(imx8qxp_clk_exit);
350		372
351	MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");	373	MODULE_AUTHOR("Aisheng Dong <aisheng.dong@nxp.com>");
352	MODULE_DESCRIPTION("NXP i.MX8QXP clock driver");	374	MODULE_DESCRIPTION("NXP i.MX8QXP clock driver");

drivers/clk/imx/clk-scu.c+11−1

 	return p != NULL;
 }
+int __init imx_clk_scu_module_init(void)
+{
+	return platform_driver_register(&imx_clk_scu_driver);
+}
+void __exit imx_clk_scu_module_exit(void)
+{
+	return platform_driver_unregister(&imx_clk_scu_driver);
+}
 int imx_clk_scu_init(struct device_node *np,
 		     const struct imx_clk_scu_rsrc_table *data)
 {
 		rsrc_table = data;
 	}
-	return platform_driver_register(&imx_clk_scu_driver);
+	return 0;
 }
 /*

drivers/clk/imx/clk-scu.h+2−0

@@ -25,6 +25,8 @@ extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8dxl; · 24 unmodified lines
25	extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qxp;	25	extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qxp;
26	extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qm;	26	extern const struct imx_clk_scu_rsrc_table imx_clk_scu_rsrc_imx8qm;
27		27
		28	int __init imx_clk_scu_module_init(void);
		29	void __exit imx_clk_scu_module_exit(void);
28	int imx_clk_scu_init(struct device_node *np,	30	int imx_clk_scu_init(struct device_node *np,
29	const struct imx_clk_scu_rsrc_table *data);	31	const struct imx_clk_scu_rsrc_table *data);
30	struct clk_hw imx_scu_of_clk_src_get(struct of_phandle_args clkspec,	32	struct clk_hw imx_scu_of_clk_src_get(struct of_phandle_args clkspec,

drivers/cpufreq/intel_pstate.c+8−6

 	refresh_frequency_limits(policy);
 }
-static bool intel_pstate_update_max_freq(struct cpudata *cpudata)
+static bool intel_pstate_update_max_freq(int cpu)
 {
-	struct cpufreq_policy *policy __free(put_cpufreq_policy) = cpufreq_cpu_get(cpudata->cpu);
+	struct cpufreq_policy *policy __free(put_cpufreq_policy) = cpufreq_cpu_get(cpu);
 	if (!policy)
 		return false;
-	__intel_pstate_update_max_freq(policy, cpudata);
+	__intel_pstate_update_max_freq(policy, all_cpu_data[cpu]);
 	return true;
 }
 	int cpu;
 	for_each_possible_cpu(cpu)
-		intel_pstate_update_max_freq(all_cpu_data[cpu]);
+		intel_pstate_update_max_freq(cpu);
 	mutex_lock(&hybrid_capacity_lock);
 static void update_cpu_qos_request(int cpu, enum freq_qos_req_type type)
 {
 	struct cpudata *cpudata = all_cpu_data[cpu];
-	unsigned int freq = cpudata->pstate.turbo_freq;
 	struct freq_qos_request *req;
+	unsigned int freq;
 	struct cpufreq_policy *policy __free(put_cpufreq_policy) = cpufreq_cpu_get(cpu);
 	if (!policy)
 	if (hwp_active)
 		intel_pstate_get_hwp_cap(cpudata);
+	freq = cpudata->pstate.turbo_freq;
 	if (type == FREQ_QOS_MIN) {
 		freq = DIV_ROUND_UP(freq * global.min_perf_pct, 100);
 	} else {
 	struct cpudata *cpudata =
 		container_of(to_delayed_work(work), struct cpudata, hwp_notify_work);
-	if (intel_pstate_update_max_freq(cpudata)) {
+	if (intel_pstate_update_max_freq(cpudata->cpu)) {
 		/*
 		 * The driver will not be unregistered while this function is
 		 * running, so update the capacity without acquiring the driver

drivers/cpuidle/cpuidle.c+0−10

@@ -359,16 +359,6 @@ noinstr int cpuidle_enter_state(struct cpuidle_device *dev, · 358 unmodified lines
359	int cpuidle_select(struct cpuidle_driver drv, struct cpuidle_device dev,	359	int cpuidle_select(struct cpuidle_driver drv, struct cpuidle_device dev,
360	bool *stop_tick)	360	bool *stop_tick)
361	{	361	{
362	/*
363	* If there is only a single idle state (or none), there is nothing
364	* meaningful for the governor to choose. Skip the governor and
365	* always use state 0 with the tick running.
366	*/
367	if (drv->state_count <= 1) {
368	*stop_tick = false;
369	return 0;
370	}
371
372	return cpuidle_curr_governor->select(drv, dev, stop_tick);	362	return cpuidle_curr_governor->select(drv, dev, stop_tick);
373	}	363	}
374		364

drivers/crypto/atmel-sha204a.c+3−2

@@ -52,9 +52,10 @@ static int atmel_sha204a_rng_read_nonblocking(struct hwrng rng, void data, · 51 unmodified lines
52	rng->priv = 0;	52	rng->priv = 0;
53	} else {	53	} else {
54	work_data = kmalloc_obj(*work_data, GFP_ATOMIC);	54	work_data = kmalloc_obj(*work_data, GFP_ATOMIC);
55	if (!work_data)	55	if (!work_data) {
		56	atomic_dec(&i2c_priv->tfm_count);
56	return -ENOMEM;	57	return -ENOMEM;
57		58	}
58	work_data->ctx = i2c_priv;	59	work_data->ctx = i2c_priv;
59	work_data->client = i2c_priv->client;	60	work_data->client = i2c_priv->client;
60		61

drivers/crypto/ccp/sev-dev-tsm.c+1−1

 	return;
 error_exit:
-	kfree(t);
 	pr_err("Failed to enable SEV-TIO: ret=%d en=%d initdone=%d SEV=%d\n",
 	       ret, t->tio_en, t->tio_init_done, boot_cpu_has(X86_FEATURE_SEV));
+	kfree(t);
 }
 void sev_tsm_uninit(struct sev_device *sev)

drivers/crypto/ccp/sev-dev.c+4−6

 {
 	struct psp_device *psp_master = psp_get_master_device();
 	struct snp_hv_fixed_pages_entry *entry;
-	struct sev_device *sev;
 	unsigned int order;
 	struct page *page;
-	if (!psp_master || !psp_master->sev_data)
+	if (!psp_master)
 		return NULL;
-	sev = psp_master->sev_data;
 	order = get_order(PMD_SIZE * num_2mb_pages);
 	/*
 	 * This API uses SNP_INIT_EX to transition allocated pages to HV_Fixed
 	 * page state, fail if SNP is already initialized.
 	 */
-	if (sev->snp_initialized)
+	if (psp_master->sev_data &&
+	    ((struct sev_device *)psp_master->sev_data)->snp_initialized)
 		return NULL;
 	/* Re-use freed pages that match the request */
 	struct psp_device *psp_master = psp_get_master_device();
 	struct snp_hv_fixed_pages_entry *entry, *nentry;
-	if (!psp_master || !psp_master->sev_data)
+	if (!psp_master)
 		return;
 	/*

drivers/cxl/core/core.h+18−0

@@ -152,6 +152,24 @@ int cxl_pci_get_bandwidth(struct pci_dev pdev, struct access_coordinate c); · 151 unmodified lines
152	int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port,	152	int cxl_port_get_switch_dport_bandwidth(struct cxl_port *port,
153	struct access_coordinate *c);	153	struct access_coordinate *c);
154		154
		155	static inline struct device port_to_host(struct cxl_port port)
		156	{
		157	struct cxl_port *parent = is_cxl_root(port) ? NULL :
		158	to_cxl_port(port->dev.parent);
		159
		160	/*
		161	* The host of CXL root port and the first level of ports is
		162	* the platform firmware device, the host of all other ports
		163	* is their parent port.
		164	*/
		165	if (!parent)
		166	return port->uport_dev;
		167	else if (is_cxl_root(parent))
		168	return parent->uport_dev;
		169	else
		170	return &parent->dev;
		171	}
		172
155	static inline struct device dport_to_host(struct cxl_dport dport)	173	static inline struct device dport_to_host(struct cxl_dport dport)
156	{	174	{
157	struct cxl_port *port = dport->port;	175	struct cxl_port *port = dport->port;

drivers/cxl/core/hdm.c+1−1

@@ -904,7 +904,7 @@ static void cxl_decoder_reset(struct cxl_decoder *cxld) · 903 unmodified lines
904	if ((cxld->flags & CXL_DECODER_F_ENABLE) == 0)	904	if ((cxld->flags & CXL_DECODER_F_ENABLE) == 0)
905	return;	905	return;
906		906
907	if (test_bit(CXL_DECODER_F_LOCK, &cxld->flags))	907	if (cxld->flags & CXL_DECODER_F_LOCK)
908	return;	908	return;
909		909
910	if (port->commit_end == id)	910	if (port->commit_end == id)

drivers/cxl/core/mbox.c+9−2

  * cxl_payload_from_user_allowed() - Check contents of in_payload.
  * @opcode: The mailbox command opcode.
  * @payload_in: Pointer to the input payload passed in from user space.
+ * @in_size: Size of @payload_in in bytes.
  *
  * Return:
  *  * true	- payload_in passes check for @opcode.
  *
  * The specific checks are determined by the opcode.
  */
-static bool cxl_payload_from_user_allowed(u16 opcode, void *payload_in)
+static bool cxl_payload_from_user_allowed(u16 opcode, void *payload_in,
+					  size_t in_size)
 {
 	switch (opcode) {
 	case CXL_MBOX_OP_SET_PARTITION_INFO: {
 		struct cxl_mbox_set_partition_info *pi = payload_in;
+		if (in_size < sizeof(*pi))
+			return false;
 		if (pi->flags & CXL_SET_PARTITION_IMMEDIATE_FLAG)
 			return false;
 		break;
 	case CXL_MBOX_OP_CLEAR_LOG: {
 		const uuid_t *uuid = (uuid_t *)payload_in;
+		if (in_size < sizeof(uuid_t))
+			return false;
 		/*
 		 * Restrict the ‘Clear log’ action to only apply to
 		 * Vendor debug logs.
 		if (IS_ERR(mbox_cmd->payload_in))
 			return PTR_ERR(mbox_cmd->payload_in);
-		if (!cxl_payload_from_user_allowed(opcode, mbox_cmd->payload_in)) {
+		if (!cxl_payload_from_user_allowed(opcode, mbox_cmd->payload_in,
+						  in_size)) {
 			dev_dbg(cxl_mbox->host, "%s: input payload not allowed\n",
 				cxl_mem_opcode_to_name(opcode));
 			kvfree(mbox_cmd->payload_in);

drivers/cxl/core/memdev.c+9−4

 DEFINE_FREE(put_cxlmd, struct cxl_memdev *,
 	    if (!IS_ERR_OR_NULL(_T)) put_device(&_T->dev))
-static struct cxl_memdev *cxl_memdev_autoremove(struct cxl_memdev *cxlmd)
+static bool cxl_memdev_attach_failed(struct cxl_memdev *cxlmd)
 {
-	int rc;
 	/*
 	 * If @attach is provided fail if the driver is not attached upon
 	 * return. Note that failure here could be the result of a race to
 	 * succeeded and then cxl_mem unbound before the lock is acquired.
 	 */
 	guard(device)(&cxlmd->dev);
-	if (cxlmd->attach && !cxlmd->dev.driver) {
+	return (cxlmd->attach && !cxlmd->dev.driver);
+}
+static struct cxl_memdev *cxl_memdev_autoremove(struct cxl_memdev *cxlmd)
+{
+	int rc;
+	if (cxl_memdev_attach_failed(cxlmd)) {
 		cxl_memdev_unregister(cxlmd);
 		return ERR_PTR(-ENXIO);
 	}

drivers/cxl/core/pmem.c+32−10

@@ -115,15 +115,17 @@ static void unregister_nvb(void *_cxl_nvb) · 114 unmodified lines
115	device_unregister(&cxl_nvb->dev);	115	device_unregister(&cxl_nvb->dev);
116	}	116	}
117		117
118	/**	118	static bool cxl_nvdimm_bridge_failed_attach(struct cxl_nvdimm_bridge *cxl_nvb)
119	* devm_cxl_add_nvdimm_bridge() - add the root of a LIBNVDIMM topology	119	{
120	* @host: platform firmware root device	120	struct device *dev = &cxl_nvb->dev;
121	* @port: CXL port at the root of a CXL topology	121
122	*	122	guard(device)(dev);
123	* Return: bridge device that can host cxl_nvdimm objects	123	/* If the device has no driver, then it failed to attach. */
124	*/	124	return dev->driver == NULL;
125	struct cxl_nvdimm_bridge devm_cxl_add_nvdimm_bridge(struct device host,	125	}
126	struct cxl_port *port)	126
		127	struct cxl_nvdimm_bridge __devm_cxl_add_nvdimm_bridge(struct device host,
		128	struct cxl_port *port)
127	{	129	{
128	struct cxl_nvdimm_bridge *cxl_nvb;	130	struct cxl_nvdimm_bridge *cxl_nvb;
129	struct device *dev;	131	struct device *dev;
@@ -145,6 +147,11 @@ struct cxl_nvdimm_bridge devm_cxl_add_nvdimm_bridge(struct device host, · 15 unmodified lines
145	if (rc)	147	if (rc)
146	goto err;	148	goto err;
147		149
		150	if (cxl_nvdimm_bridge_failed_attach(cxl_nvb)) {
		151	unregister_nvb(cxl_nvb);
		152	return ERR_PTR(-ENODEV);
		153	}
		154
148	rc = devm_add_action_or_reset(host, unregister_nvb, cxl_nvb);	155	rc = devm_add_action_or_reset(host, unregister_nvb, cxl_nvb);
149	if (rc)	156	if (rc)
150	return ERR_PTR(rc);	157	return ERR_PTR(rc);
@@ -155,7 +162,7 @@ err: · 4 unmodified lines
155	put_device(dev);	162	put_device(dev);
156	return ERR_PTR(rc);	163	return ERR_PTR(rc);
157	}	164	}
158	EXPORT_SYMBOL_NS_GPL(devm_cxl_add_nvdimm_bridge, "CXL");	165	EXPORT_SYMBOL_FOR_MODULES(__devm_cxl_add_nvdimm_bridge, "cxl_pmem");
159		166
160	static void cxl_nvdimm_release(struct device *dev)	167	static void cxl_nvdimm_release(struct device *dev)
161	{	168	{
@@ -255,6 +262,21 @@ int devm_cxl_add_nvdimm(struct device host, struct cxl_port port, · 93 unmodified lines
255	if (!cxl_nvb)	262	if (!cxl_nvb)
256	return -ENODEV;	263	return -ENODEV;
257		264
		265	/*
		266	* Take the uport_dev lock to guard against race of nvdimm_bus object.
		267	* cxl_acpi_probe() registers the nvdimm_bus and is done under the
		268	* root port uport_dev lock.
		269	*
		270	* Take the cxl_nvb device lock to ensure that cxl_nvb driver is in a
		271	* consistent state. And the driver registers nvdimm_bus.
		272	*/
		273	guard(device)(cxl_nvb->port->uport_dev);
		274	guard(device)(&cxl_nvb->dev);
		275	if (!cxl_nvb->nvdimm_bus) {
		276	rc = -ENODEV;
		277	goto err_alloc;
		278	}
		279
258	cxl_nvd = cxl_nvdimm_alloc(cxl_nvb, cxlmd);	280	cxl_nvd = cxl_nvdimm_alloc(cxl_nvb, cxlmd);
259	if (IS_ERR(cxl_nvd)) {	281	if (IS_ERR(cxl_nvd)) {
260	rc = PTR_ERR(cxl_nvd);	282	rc = PTR_ERR(cxl_nvd);

drivers/cxl/core/port.c+18−34

 static void unregister_port(void *_port)
 {
 	struct cxl_port *port = _port;
-	struct cxl_port *parent = parent_port_of(port);
-	struct device *lock_dev;
-	/*
+	device_lock_assert(port_to_host(port));
-	 * CXL root port's and the first level of ports are unregistered
-	 * under the platform firmware device lock, all other ports are
-	 * unregistered while holding their parent port lock.
-	 */
-	if (!parent)
-		lock_dev = port->uport_dev;
-	else if (is_cxl_root(parent))
-		lock_dev = parent->uport_dev;
-	else
-		lock_dev = &parent->dev;
-	device_lock_assert(lock_dev);
 	port->dead = true;
 	device_unregister(&port->dev);
 }
 	return NULL;
 }
-static struct device *endpoint_host(struct cxl_port *endpoint)
-{
-	struct cxl_port *port = to_cxl_port(endpoint->dev.parent);
-	if (is_cxl_root(port))
-		return port->uport_dev;
-	return &port->dev;
-}
 static void delete_endpoint(void *data)
 {
 	struct cxl_memdev *cxlmd = data;
 	struct cxl_port *endpoint = cxlmd->endpoint;
-	struct device *host = endpoint_host(endpoint);
+	struct device *host = port_to_host(endpoint);
 	scoped_guard(device, host) {
 		if (host->driver && !endpoint->dead) {
 int cxl_endpoint_autoremove(struct cxl_memdev *cxlmd, struct cxl_port *endpoint)
 {
-	struct device *host = endpoint_host(endpoint);
+	struct device *host = port_to_host(endpoint);
 	struct device *dev = &cxlmd->dev;
 	get_device(host);
 {
 	struct cxl_dport *dport;
-	device_lock_assert(&port->dev);
+	/*
+	 * The port is already visible in CXL hierarchy, but it may still
+	 * be in the process of binding to the CXL port driver at this point.
+	 *
+	 * port creation and driver binding are protected by the port's host
+	 * lock, so acquire the host lock here to ensure the port has completed
+	 * driver binding before proceeding with dport addition.
+	 */
+	guard(device)(port_to_host(port));
+	guard(device)(&port->dev);
 	dport = cxl_find_dport_by_dev(port, dport_dev);
 	if (!dport) {
 		dport = probe_dport(port, dport_dev);
 			 * RP port enumerated by cxl_acpi without dport will
 			 * have the dport added here.
 			 */
-			scoped_guard(device, &port->dev) {
+			dport = find_or_add_dport(port, dport_dev);
-				dport = find_or_add_dport(port, dport_dev);
+			if (IS_ERR(dport)) {
-				if (IS_ERR(dport)) {
+				if (PTR_ERR(dport) == -EAGAIN)
-					if (PTR_ERR(dport) == -EAGAIN)
+					goto retry;
-						goto retry;
+				return PTR_ERR(dport);
-					return PTR_ERR(dport);
-				}
 			}
 			rc = cxl_add_ep(dport, &cxlmd->dev);

drivers/cxl/core/region.c+2−2

@@ -1100,12 +1100,12 @@ static int cxl_rr_assign_decoder(struct cxl_port port, struct cxl_region cxlr, · 1099 unmodified lines
1100	static void cxl_region_setup_flags(struct cxl_region *cxlr,	1100	static void cxl_region_setup_flags(struct cxl_region *cxlr,
1101	struct cxl_decoder *cxld)	1101	struct cxl_decoder *cxld)
1102	{	1102	{
1103	if (test_bit(CXL_DECODER_F_LOCK, &cxld->flags)) {	1103	if (cxld->flags & CXL_DECODER_F_LOCK) {
1104	set_bit(CXL_REGION_F_LOCK, &cxlr->flags);	1104	set_bit(CXL_REGION_F_LOCK, &cxlr->flags);
1105	clear_bit(CXL_REGION_F_NEEDS_RESET, &cxlr->flags);	1105	clear_bit(CXL_REGION_F_NEEDS_RESET, &cxlr->flags);
1106	}	1106	}
1107		1107
1108	if (test_bit(CXL_DECODER_F_NORMALIZED_ADDRESSING, &cxld->flags))	1108	if (cxld->flags & CXL_DECODER_F_NORMALIZED_ADDRESSING)
1109	set_bit(CXL_REGION_F_NORMALIZED_ADDRESSING, &cxlr->flags);	1109	set_bit(CXL_REGION_F_NORMALIZED_ADDRESSING, &cxlr->flags);
1110	}	1110	}
1111		1111

drivers/cxl/cxl.h+7−0

 #define CXL_DEV_ID_LEN 19
+enum {
+	CXL_NVD_F_INVALIDATED = 0,
+};
 struct cxl_nvdimm {
 	struct device dev;
 	struct cxl_memdev *cxlmd;
 	u8 dev_id[CXL_DEV_ID_LEN]; /* for nvdimm, string of 'serial' */
 	u64 dirty_shutdowns;
+	unsigned long flags;
 };
 struct cxl_pmem_region_mapping {
 struct cxl_nvdimm_bridge *to_cxl_nvdimm_bridge(struct device *dev);
 struct cxl_nvdimm_bridge *devm_cxl_add_nvdimm_bridge(struct device *host,
 						     struct cxl_port *port);
+struct cxl_nvdimm_bridge *__devm_cxl_add_nvdimm_bridge(struct device *host,
+						       struct cxl_port *port);
 struct cxl_nvdimm *to_cxl_nvdimm(struct device *dev);
 bool is_cxl_nvdimm(struct device *dev);
 int devm_cxl_add_nvdimm(struct device *host, struct cxl_port *port,

drivers/cxl/pmem.c+21−1

 static __read_mostly DECLARE_BITMAP(exclusive_cmds, CXL_MEM_COMMAND_ID_MAX);
+/**
+ * devm_cxl_add_nvdimm_bridge() - add the root of a LIBNVDIMM topology
+ * @host: platform firmware root device
+ * @port: CXL port at the root of a CXL topology
+ *
+ * Return: bridge device that can host cxl_nvdimm objects
+ */
+struct cxl_nvdimm_bridge *devm_cxl_add_nvdimm_bridge(struct device *host,
+						     struct cxl_port *port)
+{
+	return __devm_cxl_add_nvdimm_bridge(host, port);
+}
+EXPORT_SYMBOL_NS_GPL(devm_cxl_add_nvdimm_bridge, "CXL");
 static void clear_exclusive(void *mds)
 {
 	clear_exclusive_cxl_commands(mds, exclusive_cmds);
 	struct nvdimm *nvdimm;
 	int rc;
+	if (test_bit(CXL_NVD_F_INVALIDATED, &cxl_nvd->flags))
+		return -EBUSY;
 	set_exclusive_cxl_commands(mds, exclusive_cmds);
 	rc = devm_add_action_or_reset(dev, clear_exclusive, mds);
 	if (rc)
 	scoped_guard(device, dev) {
 		if (dev->driver) {
 			cxl_nvd = to_cxl_nvdimm(dev);
-			if (cxl_nvd->cxlmd && cxl_nvd->cxlmd->cxl_nvb == data)
+			if (cxl_nvd->cxlmd && cxl_nvd->cxlmd->cxl_nvb == data) {
 				release = true;
+				set_bit(CXL_NVD_F_INVALIDATED, &cxl_nvd->flags);
+			}
 		}
 	}
 	if (release)
 	.probe = cxl_nvdimm_bridge_probe,
 	.id = CXL_DEVICE_NVDIMM_BRIDGE,
 	.drv = {
+		.probe_type = PROBE_FORCE_SYNCHRONOUS,
 		.suppress_bind_attrs = true,
 	},
 };

drivers/dpll/zl3073x/core.c+2−5

 	}
 	/* Add devres action to release DPLL related resources */
-	rc = devm_add_action_or_reset(zldev->dev, zl3073x_dev_dpll_fini, zldev);
+	return devm_add_action_or_reset(zldev->dev, zl3073x_dev_dpll_fini, zldev);
-	if (rc)
-		goto error;
-	return 0;
 error:
 	zl3073x_dev_dpll_fini(zldev);
 				     "Unknown or non-match chip ID: 0x%0x\n",
 				     id);
 	}
+	zldev->chip_id = id;
 	/* Read revision, firmware version and custom config version */
 	rc = zl3073x_read_u16(zldev, ZL_REG_REVISION, &revision);

drivers/dpll/zl3073x/core.h+28−0

@@ -35,6 +35,7 @@ struct zl3073x_dpll; · 34 unmodified lines
35	* @dev: pointer to device	35	* @dev: pointer to device
36	* @regmap: regmap to access device registers	36	* @regmap: regmap to access device registers
37	* @multiop_lock: to serialize multiple register operations	37	* @multiop_lock: to serialize multiple register operations
		38	* @chip_id: chip ID read from hardware
38	* @ref: array of input references' invariants	39	* @ref: array of input references' invariants
39	* @out: array of outs' invariants	40	* @out: array of outs' invariants
40	* @synth: array of synths' invariants	41	* @synth: array of synths' invariants
@@ -48,6 +49,7 @@ struct zl3073x_dev { · 7 unmodified lines
48	struct device *dev;	49	struct device *dev;
49	struct regmap *regmap;	50	struct regmap *regmap;
50	struct mutex multiop_lock;	51	struct mutex multiop_lock;
		52	u16 chip_id;
51		53
52	/* Invariants */	54	/* Invariants */
53	struct zl3073x_ref ref[ZL3073X_NUM_REFS];	55	struct zl3073x_ref ref[ZL3073X_NUM_REFS];
@@ -144,6 +146,32 @@ int zl3073x_write_hwreg_seq(struct zl3073x_dev *zldev, · 90 unmodified lines
144		146
145	int zl3073x_ref_phase_offsets_update(struct zl3073x_dev *zldev, int channel);	147	int zl3073x_ref_phase_offsets_update(struct zl3073x_dev *zldev, int channel);
146		148
		149	/**
		150	* zl3073x_dev_is_ref_phase_comp_32bit - check ref phase comp register size
		151	* @zldev: pointer to zl3073x device
		152	*
		153	* Some chip IDs have a 32-bit wide ref_phase_offset_comp register instead
		154	* of the default 48-bit.
		155	*
		156	* Return: true if the register is 32-bit, false if 48-bit
		157	*/
		158	static inline bool
		159	zl3073x_dev_is_ref_phase_comp_32bit(struct zl3073x_dev *zldev)
		160	{
		161	switch (zldev->chip_id) {
		162	case 0x0E30:
		163	case 0x0E93:
		164	case 0x0E94:
		165	case 0x0E95:
		166	case 0x0E96:
		167	case 0x0E97:
		168	case 0x1F60:
		169	return true;
		170	default:
		171	return false;
		172	}
		173	}
		174
147	static inline bool	175	static inline bool
148	zl3073x_is_n_pin(u8 id)	176	zl3073x_is_n_pin(u8 id)
149	{	177	{

drivers/dpll/zl3073x/dpll.c+5−2

 	ref_id = zl3073x_input_pin_ref_get(pin->id);
 	ref = zl3073x_ref_state_get(zldev, ref_id);
-	/* Perform sign extension for 48bit signed value */
+	/* Perform sign extension based on register width */
-	phase_comp = sign_extend64(ref->phase_comp, 47);
+	if (zl3073x_dev_is_ref_phase_comp_32bit(zldev))
+		phase_comp = sign_extend64(ref->phase_comp, 31);
+	else
+		phase_comp = sign_extend64(ref->phase_comp, 47);
 	/* Reverse two's complement negation applied during set and convert
 	 * to 32bit signed int

drivers/dpll/zl3073x/ref.c+20−5

 		return rc;
 	/* Read phase compensation register */
-	rc = zl3073x_read_u48(zldev, ZL_REG_REF_PHASE_OFFSET_COMP,
+	if (zl3073x_dev_is_ref_phase_comp_32bit(zldev)) {
-			      &ref->phase_comp);
+		u32 val;
+		rc = zl3073x_read_u32(zldev, ZL_REG_REF_PHASE_OFFSET_COMP_32,
+				      &val);
+		ref->phase_comp = val;
+	} else {
+		rc = zl3073x_read_u48(zldev, ZL_REG_REF_PHASE_OFFSET_COMP,
+				      &ref->phase_comp);
+	}
 	if (rc)
 		return rc;
 	if (!rc && dref->sync_ctrl != ref->sync_ctrl)
 		rc = zl3073x_write_u8(zldev, ZL_REG_REF_SYNC_CTRL,
 				      ref->sync_ctrl);
-	if (!rc && dref->phase_comp != ref->phase_comp)
+	if (!rc && dref->phase_comp != ref->phase_comp) {
-		rc = zl3073x_write_u48(zldev, ZL_REG_REF_PHASE_OFFSET_COMP,
+		if (zl3073x_dev_is_ref_phase_comp_32bit(zldev))
-				       ref->phase_comp);
+			rc = zl3073x_write_u32(zldev,
+					       ZL_REG_REF_PHASE_OFFSET_COMP_32,
+					       ref->phase_comp);
+		else
+			rc = zl3073x_write_u48(zldev,
+					       ZL_REG_REF_PHASE_OFFSET_COMP,
+					       ref->phase_comp);
+	}
 	if (rc)
 		return rc;

drivers/dpll/zl3073x/regs.h+1−0

@@ -194,6 +194,7 @@ · 193 unmodified lines
194	#define ZL_REF_CONFIG_DIFF_EN BIT(2)	194	#define ZL_REF_CONFIG_DIFF_EN BIT(2)
195		195
196	#define ZL_REG_REF_PHASE_OFFSET_COMP ZL_REG(10, 0x28, 6)	196	#define ZL_REG_REF_PHASE_OFFSET_COMP ZL_REG(10, 0x28, 6)
		197	#define ZL_REG_REF_PHASE_OFFSET_COMP_32 ZL_REG(10, 0x28, 4)
197		198
198	#define ZL_REG_REF_SYNC_CTRL ZL_REG(10, 0x2e, 1)	199	#define ZL_REG_REF_SYNC_CTRL ZL_REG(10, 0x2e, 1)
199	#define ZL_REF_SYNC_CTRL_MODE GENMASK(2, 0)	200	#define ZL_REF_SYNC_CTRL_MODE GENMASK(2, 0)

drivers/firewire/ohci.c+1−1

@@ -848,7 +848,7 @@ static int ar_context_init(struct ar_context ctx, struct fw_ohci ohci, · 847 unmodified lines
848	{	848	{
849	struct device *dev = ohci->card.device;	849	struct device *dev = ohci->card.device;
850	unsigned int i;	850	unsigned int i;
851	struct page *pages[AR_BUFFERS + AR_WRAPAROUND_PAGES];	851	struct page *pages[AR_BUFFERS + AR_WRAPAROUND_PAGES] = { NULL };
852	dma_addr_t dma_addrs[AR_BUFFERS];	852	dma_addr_t dma_addrs[AR_BUFFERS];
853	void *vaddr;	853	void *vaddr;
854	struct descriptor *d;	854	struct descriptor *d;

drivers/firmware/cirrus/cs_dsp.c+18−6

 			   region_name);
 		if (reg) {
+			/*
+			 * Although we expect the underlying bus does not require
+			 * physically-contiguous buffers, we pessimistically use
+			 * a temporary buffer instead of trusting that the
+			 * alignment of region->data is ok.
+			 */
 			region_len = le32_to_cpu(region->len);
 			if (region_len > buf_len) {
 				buf_len = round_up(region_len, PAGE_SIZE);
-				kfree(buf);
+				vfree(buf);
-				buf = kmalloc(buf_len, GFP_KERNEL | GFP_DMA);
+				buf = vmalloc(buf_len);
 				if (!buf) {
 					ret = -ENOMEM;
 					goto out_fw;
 	ret = 0;
 out_fw:
-	kfree(buf);
+	vfree(buf);
 	if (ret == -EOVERFLOW)
 		cs_dsp_err(dsp, "%s: file content overflows file data\n", file);
 		}
 		if (reg) {
+			/*
+			 * Although we expect the underlying bus does not require
+			 * physically-contiguous buffers, we pessimistically use
+			 * a temporary buffer instead of trusting that the
+			 * alignment of blk->data is ok.
+			 */
 			region_len = le32_to_cpu(blk->len);
 			if (region_len > buf_len) {
 				buf_len = round_up(region_len, PAGE_SIZE);
-				kfree(buf);
+				vfree(buf);
-				buf = kmalloc(buf_len, GFP_KERNEL | GFP_DMA);
+				buf = vmalloc(buf_len);
 				if (!buf) {
 					ret = -ENOMEM;
 					goto out_fw;
 	ret = 0;
 out_fw:
-	kfree(buf);
+	vfree(buf);
 	if (ret == -EOVERFLOW)
 		cs_dsp_err(dsp, "%s: file content overflows file data\n", file);

drivers/firmware/efi/mokvar-table.c+1−1

@@ -85,7 +85,7 @@ static struct kobject *mokvar_kobj; · 84 unmodified lines
85	* as an alternative to ordinary EFI variables, due to platform-dependent	85	* as an alternative to ordinary EFI variables, due to platform-dependent
86	* limitations. The memory occupied by this table is marked as reserved.	86	* limitations. The memory occupied by this table is marked as reserved.
87	*	87	*
88	* This routine must be called before efi_free_boot_services() in order	88	* This routine must be called before efi_unmap_boot_services() in order
89	* to guarantee that it can mark the table as reserved.	89	* to guarantee that it can mark the table as reserved.
90	*	90	*
91	* Implicit inputs:	91	* Implicit inputs:

drivers/firmware/stratix10-rsu.c+2−0

 				 rsu_async_status_callback);
 	if (ret) {
 		dev_err(dev, "Error, getting RSU status %i\n", ret);
+		stratix10_svc_remove_async_client(priv->chan);
 		stratix10_svc_free_channel(priv->chan);
+		return ret;
 	}
 	/* get DCMF version from firmware */

drivers/firmware/stratix10-svc.c+126−102

@@ -37,15 +37,14 @@ · 36 unmodified lines
37	* service layer will return error to FPGA manager when timeout occurs,	37	* service layer will return error to FPGA manager when timeout occurs,
38	* timeout is set to 30 seconds (30 * 1000) at Intel Stratix10 SoC.	38	* timeout is set to 30 seconds (30 * 1000) at Intel Stratix10 SoC.
39	*/	39	*/
40	#define SVC_NUM_DATA_IN_FIFO 32	40	#define SVC_NUM_DATA_IN_FIFO 8
41	#define SVC_NUM_CHANNEL 4	41	#define SVC_NUM_CHANNEL 4
42	#define FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS 200	42	#define FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS 2000
43	#define FPGA_CONFIG_STATUS_TIMEOUT_SEC 30	43	#define FPGA_CONFIG_STATUS_TIMEOUT_SEC 30
44	#define BYTE_TO_WORD_SIZE 4	44	#define BYTE_TO_WORD_SIZE 4
45		45
46	/* stratix10 service layer clients */	46	/* stratix10 service layer clients */
47	#define STRATIX10_RSU "stratix10-rsu"	47	#define STRATIX10_RSU "stratix10-rsu"
48	#define INTEL_FCS "intel-fcs"
49		48
50	/* Maximum number of SDM client IDs. */	49	/* Maximum number of SDM client IDs. */
51	#define MAX_SDM_CLIENT_IDS 16	50	#define MAX_SDM_CLIENT_IDS 16
@@ -105,11 +104,9 @@ struct stratix10_svc_chan; · 53 unmodified lines
105	/**	104	/**
106	* struct stratix10_svc - svc private data	105	* struct stratix10_svc - svc private data
107	* @stratix10_svc_rsu: pointer to stratix10 RSU device	106	* @stratix10_svc_rsu: pointer to stratix10 RSU device
108	* @intel_svc_fcs: pointer to the FCS device
109	*/	107	*/
110	struct stratix10_svc {	108	struct stratix10_svc {
111	struct platform_device *stratix10_svc_rsu;	109	struct platform_device *stratix10_svc_rsu;
112	struct platform_device *intel_svc_fcs;
113	};	110	};
114		111
115	/**	112	/**
@@ -251,12 +248,10 @@ struct stratix10_async_ctrl { · 135 unmodified lines
251	* @num_active_client: number of active service client	248	* @num_active_client: number of active service client
252	* @node: list management	249	* @node: list management
253	* @genpool: memory pool pointing to the memory region	250	* @genpool: memory pool pointing to the memory region
254	* @task: pointer to the thread task which handles SMC or HVC call
255	* @svc_fifo: a queue for storing service message data
256	* @complete_status: state for completion	251	* @complete_status: state for completion
257	* @svc_fifo_lock: protect access to service message data queue
258	* @invoke_fn: function to issue secure monitor call or hypervisor call	252	* @invoke_fn: function to issue secure monitor call or hypervisor call
259	* @svc: manages the list of client svc drivers	253	* @svc: manages the list of client svc drivers
		254	* @sdm_lock: only allows a single command single response to SDM
260	* @actrl: async control structure	255	* @actrl: async control structure
261	*	256	*
262	* This struct is used to create communication channels for service clients, to	257	* This struct is used to create communication channels for service clients, to
@@ -269,12 +264,10 @@ struct stratix10_svc_controller { · 6 unmodified lines
269	int num_active_client;	264	int num_active_client;
270	struct list_head node;	265	struct list_head node;
271	struct gen_pool *genpool;	266	struct gen_pool *genpool;
272	struct task_struct *task;
273	struct kfifo svc_fifo;
274	struct completion complete_status;	267	struct completion complete_status;
275	spinlock_t svc_fifo_lock;
276	svc_invoke_fn *invoke_fn;	268	svc_invoke_fn *invoke_fn;
277	struct stratix10_svc *svc;	269	struct stratix10_svc *svc;
		270	struct mutex sdm_lock;
278	struct stratix10_async_ctrl actrl;	271	struct stratix10_async_ctrl actrl;
279	};	272	};
280		273
@@ -283,6 +276,9 @@ struct stratix10_svc_controller { · 2 unmodified lines
283	* @ctrl: pointer to service controller which is the provider of this channel	276	* @ctrl: pointer to service controller which is the provider of this channel
284	* @scl: pointer to service client which owns the channel	277	* @scl: pointer to service client which owns the channel
285	* @name: service client name associated with the channel	278	* @name: service client name associated with the channel
		279	* @task: pointer to the thread task which handles SMC or HVC call
		280	* @svc_fifo: a queue for storing service message data (separate fifo for every channel)
		281	* @svc_fifo_lock: protect access to service message data queue (locking pending fifo)
286	* @lock: protect access to the channel	282	* @lock: protect access to the channel
287	* @async_chan: reference to asynchronous channel object for this channel	283	* @async_chan: reference to asynchronous channel object for this channel
288	*	284	*
@@ -293,6 +289,9 @@ struct stratix10_svc_chan { · 4 unmodified lines
293	struct stratix10_svc_controller *ctrl;	289	struct stratix10_svc_controller *ctrl;
294	struct stratix10_svc_client *scl;	290	struct stratix10_svc_client *scl;
295	char *name;	291	char *name;
		292	struct task_struct *task;
		293	struct kfifo svc_fifo;
		294	spinlock_t svc_fifo_lock;
296	spinlock_t lock;	295	spinlock_t lock;
297	struct stratix10_async_chan *async_chan;	296	struct stratix10_async_chan *async_chan;
298	};	297	};
@@ -527,10 +526,10 @@ static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data, · 228 unmodified lines
527	*/	526	*/
528	static int svc_normal_to_secure_thread(void *data)	527	static int svc_normal_to_secure_thread(void *data)
529	{	528	{
530	struct stratix10_svc_controller	529	struct stratix10_svc_chan chan = (struct stratix10_svc_chan )data;
531	ctrl = (struct stratix10_svc_controller )data;	530	struct stratix10_svc_controller *ctrl = chan->ctrl;
532	struct stratix10_svc_data *pdata;	531	struct stratix10_svc_data *pdata = NULL;
533	struct stratix10_svc_cb_data *cbdata;	532	struct stratix10_svc_cb_data *cbdata = NULL;
534	struct arm_smccc_res res;	533	struct arm_smccc_res res;
535	unsigned long a0, a1, a2, a3, a4, a5, a6, a7;	534	unsigned long a0, a1, a2, a3, a4, a5, a6, a7;
536	int ret_fifo = 0;	535	int ret_fifo = 0;
@@ -555,12 +554,12 @@ static int svc_normal_to_secure_thread(void *data) · 18 unmodified lines
555	a6 = 0;	554	a6 = 0;
556	a7 = 0;	555	a7 = 0;
557		556
558	pr_debug("smc_hvc_shm_thread is running\n");	557	pr_debug("%s: %s: Thread is running!\n", __func__, chan->name);
559		558
560	while (!kthread_should_stop()) {	559	while (!kthread_should_stop()) {
561	ret_fifo = kfifo_out_spinlocked(&ctrl->svc_fifo,	560	ret_fifo = kfifo_out_spinlocked(&chan->svc_fifo,
562	pdata, sizeof(*pdata),	561	pdata, sizeof(*pdata),
563	&ctrl->svc_fifo_lock);	562	&chan->svc_fifo_lock);
564		563
565	if (!ret_fifo)	564	if (!ret_fifo)
566	continue;	565	continue;
@@ -569,9 +568,25 @@ static int svc_normal_to_secure_thread(void *data) · 2 unmodified lines
569	(unsigned int)pdata->paddr, pdata->command,	568	(unsigned int)pdata->paddr, pdata->command,
570	(unsigned int)pdata->size);	569	(unsigned int)pdata->size);
571		570
		571	/* SDM can only process one command at a time */
		572	pr_debug("%s: %s: Thread is waiting for mutex!\n",
		573	__func__, chan->name);
		574	if (mutex_lock_interruptible(&ctrl->sdm_lock)) {
		575	/* item already dequeued; notify client to unblock it */
		576	cbdata->status = BIT(SVC_STATUS_ERROR);
		577	cbdata->kaddr1 = NULL;
		578	cbdata->kaddr2 = NULL;
		579	cbdata->kaddr3 = NULL;
		580	if (pdata->chan->scl)
		581	pdata->chan->scl->receive_cb(pdata->chan->scl,
		582	cbdata);
		583	break;
		584	}
		585
572	switch (pdata->command) {	586	switch (pdata->command) {
573	case COMMAND_RECONFIG_DATA_CLAIM:	587	case COMMAND_RECONFIG_DATA_CLAIM:
574	svc_thread_cmd_data_claim(ctrl, pdata, cbdata);	588	svc_thread_cmd_data_claim(ctrl, pdata, cbdata);
		589	mutex_unlock(&ctrl->sdm_lock);
575	continue;	590	continue;
576	case COMMAND_RECONFIG:	591	case COMMAND_RECONFIG:
577	a0 = INTEL_SIP_SMC_FPGA_CONFIG_START;	592	a0 = INTEL_SIP_SMC_FPGA_CONFIG_START;
@@ -700,10 +715,11 @@ static int svc_normal_to_secure_thread(void *data) · 122 unmodified lines
700	break;	715	break;
701	default:	716	default:
702	pr_warn("it shouldn't happen\n");	717	pr_warn("it shouldn't happen\n");
703	break;	718	mutex_unlock(&ctrl->sdm_lock);
		719	continue;
704	}	720	}
705	pr_debug("%s: before SMC call -- a0=0x%016x a1=0x%016x",	721	pr_debug("%s: %s: before SMC call -- a0=0x%016x a1=0x%016x",
706	__func__,	722	__func__, chan->name,
707	(unsigned int)a0,	723	(unsigned int)a0,
708	(unsigned int)a1);	724	(unsigned int)a1);
709	pr_debug(" a2=0x%016x\n", (unsigned int)a2);	725	pr_debug(" a2=0x%016x\n", (unsigned int)a2);
@@ -712,8 +728,8 @@ static int svc_normal_to_secure_thread(void *data) · 2 unmodified lines
712	pr_debug(" a5=0x%016x\n", (unsigned int)a5);	728	pr_debug(" a5=0x%016x\n", (unsigned int)a5);
713	ctrl->invoke_fn(a0, a1, a2, a3, a4, a5, a6, a7, &res);	729	ctrl->invoke_fn(a0, a1, a2, a3, a4, a5, a6, a7, &res);
714		730
715	pr_debug("%s: after SMC call -- res.a0=0x%016x",	731	pr_debug("%s: %s: after SMC call -- res.a0=0x%016x",
716	__func__, (unsigned int)res.a0);	732	__func__, chan->name, (unsigned int)res.a0);
717	pr_debug(" res.a1=0x%016x, res.a2=0x%016x",	733	pr_debug(" res.a1=0x%016x, res.a2=0x%016x",
718	(unsigned int)res.a1, (unsigned int)res.a2);	734	(unsigned int)res.a1, (unsigned int)res.a2);
719	pr_debug(" res.a3=0x%016x\n", (unsigned int)res.a3);	735	pr_debug(" res.a3=0x%016x\n", (unsigned int)res.a3);
@@ -728,6 +744,7 @@ static int svc_normal_to_secure_thread(void *data) · 8 unmodified lines
728	cbdata->kaddr2 = NULL;	744	cbdata->kaddr2 = NULL;
729	cbdata->kaddr3 = NULL;	745	cbdata->kaddr3 = NULL;
730	pdata->chan->scl->receive_cb(pdata->chan->scl, cbdata);	746	pdata->chan->scl->receive_cb(pdata->chan->scl, cbdata);
		747	mutex_unlock(&ctrl->sdm_lock);
731	continue;	748	continue;
732	}	749	}
733		750
@@ -801,6 +818,8 @@ static int svc_normal_to_secure_thread(void *data) · 67 unmodified lines
801	break;	818	break;
802		819
803	}	820	}
		821
		822	mutex_unlock(&ctrl->sdm_lock);
804	}	823	}
805		824
806	kfree(cbdata);	825	kfree(cbdata);
@@ -1696,22 +1715,33 @@ int stratix10_svc_send(struct stratix10_svc_chan chan, void msg) · 889 unmodified lines
1696	if (!p_data)	1715	if (!p_data)
1697	return -ENOMEM;	1716	return -ENOMEM;
1698		1717
1699	/* first client will create kernel thread */	1718	/* first caller creates the per-channel kthread */
1700	if (!chan->ctrl->task) {	1719	if (!chan->task) {
1701	chan->ctrl->task =	1720	struct task_struct *task;
1702	kthread_run_on_cpu(svc_normal_to_secure_thread,	1721
1703	(void *)chan->ctrl,	1722	task = kthread_run_on_cpu(svc_normal_to_secure_thread,
1704	cpu, "svc_smc_hvc_thread");	1723	(void *)chan,
1705	if (IS_ERR(chan->ctrl->task)) {	1724	cpu, "svc_smc_hvc_thread");
		1725	if (IS_ERR(task)) {
1706	dev_err(chan->ctrl->dev,	1726	dev_err(chan->ctrl->dev,
1707	"failed to create svc_smc_hvc_thread\n");	1727	"failed to create svc_smc_hvc_thread\n");
1708	kfree(p_data);	1728	kfree(p_data);
1709	return -EINVAL;	1729	return -EINVAL;
1710	}	1730	}
		1731
		1732	spin_lock(&chan->lock);
		1733	if (chan->task) {
		1734	/* another caller won the race; discard our thread */
		1735	spin_unlock(&chan->lock);
		1736	kthread_stop(task);
		1737	} else {
		1738	chan->task = task;
		1739	spin_unlock(&chan->lock);
		1740	}
1711	}	1741	}
1712		1742
1713	pr_debug("%s: sent P-va=%p, P-com=%x, P-size=%u\n", __func__,	1743	pr_debug("%s: %s: sent P-va=%p, P-com=%x, P-size=%u\n", __func__,
1714	p_msg->payload, p_msg->command,	1744	chan->name, p_msg->payload, p_msg->command,
1715	(unsigned int)p_msg->payload_length);	1745	(unsigned int)p_msg->payload_length);
1716		1746
1717	if (list_empty(&svc_data_mem)) {	1747	if (list_empty(&svc_data_mem)) {
@@ -1747,12 +1777,16 @@ int stratix10_svc_send(struct stratix10_svc_chan chan, void msg) · 29 unmodified lines
1747	p_data->arg[2] = p_msg->arg[2];	1777	p_data->arg[2] = p_msg->arg[2];
1748	p_data->size = p_msg->payload_length;	1778	p_data->size = p_msg->payload_length;
1749	p_data->chan = chan;	1779	p_data->chan = chan;
1750	pr_debug("%s: put to FIFO pa=0x%016x, cmd=%x, size=%u\n", __func__,	1780	pr_debug("%s: %s: put to FIFO pa=0x%016x, cmd=%x, size=%u\n",
1751	(unsigned int)p_data->paddr, p_data->command,	1781	__func__,
1752	(unsigned int)p_data->size);	1782	chan->name,
1753	ret = kfifo_in_spinlocked(&chan->ctrl->svc_fifo, p_data,	1783	(unsigned int)p_data->paddr,
		1784	p_data->command,
		1785	(unsigned int)p_data->size);
		1786
		1787	ret = kfifo_in_spinlocked(&chan->svc_fifo, p_data,
1754	sizeof(*p_data),	1788	sizeof(*p_data),
1755	&chan->ctrl->svc_fifo_lock);	1789	&chan->svc_fifo_lock);
1756		1790
1757	kfree(p_data);	1791	kfree(p_data);
1758		1792
@@ -1773,11 +1807,12 @@ EXPORT_SYMBOL_GPL(stratix10_svc_send); · 14 unmodified lines
1773	*/	1807	*/
1774	void stratix10_svc_done(struct stratix10_svc_chan *chan)	1808	void stratix10_svc_done(struct stratix10_svc_chan *chan)
1775	{	1809	{
1776	/* stop thread when thread is running AND only one active client */	1810	/* stop thread when thread is running */
1777	if (chan->ctrl->task && chan->ctrl->num_active_client <= 1) {	1811	if (chan->task) {
1778	pr_debug("svc_smc_hvc_shm_thread is stopped\n");	1812	pr_debug("%s: %s: svc_smc_hvc_shm_thread is stopping\n",
1779	kthread_stop(chan->ctrl->task);	1813	__func__, chan->name);
1780	chan->ctrl->task = NULL;	1814	kthread_stop(chan->task);
		1815	chan->task = NULL;
1781	}	1816	}
1782	}	1817	}
1783	EXPORT_SYMBOL_GPL(stratix10_svc_done);	1818	EXPORT_SYMBOL_GPL(stratix10_svc_done);
@@ -1817,8 +1852,8 @@ void stratix10_svc_allocate_memory(struct stratix10_svc_chan chan, · 33 unmodified lines
1817	pmem->paddr = pa;	1852	pmem->paddr = pa;
1818	pmem->size = s;	1853	pmem->size = s;
1819	list_add_tail(&pmem->node, &svc_data_mem);	1854	list_add_tail(&pmem->node, &svc_data_mem);
1820	pr_debug("%s: va=%p, pa=0x%016x\n", __func__,	1855	pr_debug("%s: %s: va=%p, pa=0x%016x\n", __func__,
1821	pmem->vaddr, (unsigned int)pmem->paddr);	1856	chan->name, pmem->vaddr, (unsigned int)pmem->paddr);
1822		1857
1823	return (void *)va;	1858	return (void *)va;
1824	}	1859	}
@@ -1855,6 +1890,13 @@ static const struct of_device_id stratix10_svc_drv_match[] = { · 30 unmodified lines
1855	{},	1890	{},
1856	};	1891	};
1857		1892
		1893	static const char * const chan_names[SVC_NUM_CHANNEL] = {
		1894	SVC_CLIENT_FPGA,
		1895	SVC_CLIENT_RSU,
		1896	SVC_CLIENT_FCS,
		1897	SVC_CLIENT_HWMON
		1898	};
		1899
1858	static int stratix10_svc_drv_probe(struct platform_device *pdev)	1900	static int stratix10_svc_drv_probe(struct platform_device *pdev)
1859	{	1901	{
1860	struct device *dev = &pdev->dev;	1902	struct device *dev = &pdev->dev;
@@ -1862,11 +1904,11 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev) · 1 unmodified line
1862	struct stratix10_svc_chan *chans;	1904	struct stratix10_svc_chan *chans;
1863	struct gen_pool *genpool;	1905	struct gen_pool *genpool;
1864	struct stratix10_svc_sh_memory *sh_memory;	1906	struct stratix10_svc_sh_memory *sh_memory;
1865	struct stratix10_svc *svc;	1907	struct stratix10_svc *svc = NULL;
1866		1908
1867	svc_invoke_fn *invoke_fn;	1909	svc_invoke_fn *invoke_fn;
1868	size_t fifo_size;	1910	size_t fifo_size;
1869	int ret;	1911	int ret, i = 0;
1870		1912
1871	/* get SMC or HVC function */	1913	/* get SMC or HVC function */
1872	invoke_fn = get_invoke_func(dev);	1914	invoke_fn = get_invoke_func(dev);
@@ -1905,8 +1947,8 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev) · 32 unmodified lines
1905	controller->num_active_client = 0;	1947	controller->num_active_client = 0;
1906	controller->chans = chans;	1948	controller->chans = chans;
1907	controller->genpool = genpool;	1949	controller->genpool = genpool;
1908	controller->task = NULL;
1909	controller->invoke_fn = invoke_fn;	1950	controller->invoke_fn = invoke_fn;
		1951	INIT_LIST_HEAD(&controller->node);
1910	init_completion(&controller->complete_status);	1952	init_completion(&controller->complete_status);
1911		1953
1912	ret = stratix10_svc_async_init(controller);	1954	ret = stratix10_svc_async_init(controller);
@@ -1917,32 +1959,20 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev) · 4 unmodified lines
1917	}	1959	}
1918		1960
1919	fifo_size = sizeof(struct stratix10_svc_data) * SVC_NUM_DATA_IN_FIFO;	1961	fifo_size = sizeof(struct stratix10_svc_data) * SVC_NUM_DATA_IN_FIFO;
1920	ret = kfifo_alloc(&controller->svc_fifo, fifo_size, GFP_KERNEL);	1962	mutex_init(&controller->sdm_lock);
1921	if (ret) {
1922	dev_err(dev, "failed to allocate FIFO\n");
1923	goto err_async_exit;
1924	}
1925	spin_lock_init(&controller->svc_fifo_lock);
1926
1927	chans[0].scl = NULL;
1928	chans[0].ctrl = controller;
1929	chans[0].name = SVC_CLIENT_FPGA;
1930	spin_lock_init(&chans[0].lock);
1931		1963
1932	chans[1].scl = NULL;	1964	for (i = 0; i < SVC_NUM_CHANNEL; i++) {
1933	chans[1].ctrl = controller;	1965	chans[i].scl = NULL;
1934	chans[1].name = SVC_CLIENT_RSU;	1966	chans[i].ctrl = controller;
1935	spin_lock_init(&chans[1].lock);	1967	chans[i].name = (char *)chan_names[i];
1936		1968	spin_lock_init(&chans[i].lock);
1937	chans[2].scl = NULL;	1969	ret = kfifo_alloc(&chans[i].svc_fifo, fifo_size, GFP_KERNEL);
1938	chans[2].ctrl = controller;	1970	if (ret) {
1939	chans[2].name = SVC_CLIENT_FCS;	1971	dev_err(dev, "failed to allocate FIFO %d\n", i);
1940	spin_lock_init(&chans[2].lock);	1972	goto err_free_fifos;
1941		1973	}
1942	chans[3].scl = NULL;	1974	spin_lock_init(&chans[i].svc_fifo_lock);
1943	chans[3].ctrl = controller;	1975	}
1944	chans[3].name = SVC_CLIENT_HWMON;
1945	spin_lock_init(&chans[3].lock);
1946		1976
1947	list_add_tail(&controller->node, &svc_ctrl);	1977	list_add_tail(&controller->node, &svc_ctrl);
1948	platform_set_drvdata(pdev, controller);	1978	platform_set_drvdata(pdev, controller);
@@ -1951,7 +1981,7 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev) · 2 unmodified lines
1951	svc = devm_kzalloc(dev, sizeof(*svc), GFP_KERNEL);	1981	svc = devm_kzalloc(dev, sizeof(*svc), GFP_KERNEL);
1952	if (!svc) {	1982	if (!svc) {
1953	ret = -ENOMEM;	1983	ret = -ENOMEM;
1954	goto err_free_kfifo;	1984	goto err_free_fifos;
1955	}	1985	}
1956	controller->svc = svc;	1986	controller->svc = svc;
1957		1987
@@ -1959,51 +1989,43 @@ static int stratix10_svc_drv_probe(struct platform_device *pdev) · 1 unmodified line
1959	if (!svc->stratix10_svc_rsu) {	1989	if (!svc->stratix10_svc_rsu) {
1960	dev_err(dev, "failed to allocate %s device\n", STRATIX10_RSU);	1990	dev_err(dev, "failed to allocate %s device\n", STRATIX10_RSU);
1961	ret = -ENOMEM;	1991	ret = -ENOMEM;
1962	goto err_free_kfifo;	1992	goto err_free_fifos;
1963	}	1993	}
1964		1994
1965	ret = platform_device_add(svc->stratix10_svc_rsu);	1995	ret = platform_device_add(svc->stratix10_svc_rsu);
1966	if (ret) {	1996	if (ret)
1967	platform_device_put(svc->stratix10_svc_rsu);	1997	goto err_put_device;
1968	goto err_free_kfifo;
1969	}
1970
1971	svc->intel_svc_fcs = platform_device_alloc(INTEL_FCS, 1);
1972	if (!svc->intel_svc_fcs) {
1973	dev_err(dev, "failed to allocate %s device\n", INTEL_FCS);
1974	ret = -ENOMEM;
1975	goto err_unregister_rsu_dev;
1976	}
1977
1978	ret = platform_device_add(svc->intel_svc_fcs);
1979	if (ret) {
1980	platform_device_put(svc->intel_svc_fcs);
1981	goto err_unregister_rsu_dev;
1982	}
1983		1998
1984	ret = of_platform_default_populate(dev_of_node(dev), NULL, dev);	1999	ret = of_platform_default_populate(dev_of_node(dev), NULL, dev);
1985	if (ret)	2000	if (ret)
1986	goto err_unregister_fcs_dev;	2001	goto err_unregister_rsu_dev;
1987		2002
1988	pr_info("Intel Service Layer Driver Initialized\n");	2003	pr_info("Intel Service Layer Driver Initialized\n");
1989		2004
1990	return 0;	2005	return 0;
1991		2006
1992	err_unregister_fcs_dev:
1993	platform_device_unregister(svc->intel_svc_fcs);
1994	err_unregister_rsu_dev:	2007	err_unregister_rsu_dev:
1995	platform_device_unregister(svc->stratix10_svc_rsu);	2008	platform_device_unregister(svc->stratix10_svc_rsu);
1996	err_free_kfifo:	2009	goto err_free_fifos;
1997	kfifo_free(&controller->svc_fifo);	2010	err_put_device:
1998	err_async_exit:	2011	platform_device_put(svc->stratix10_svc_rsu);
		2012	err_free_fifos:
		2013	/* only remove from list if list_add_tail() was reached */
		2014	if (!list_empty(&controller->node))
		2015	list_del(&controller->node);
		2016	/* free only the FIFOs that were successfully allocated */
		2017	while (i--)
		2018	kfifo_free(&chans[i].svc_fifo);
1999	stratix10_svc_async_exit(controller);	2019	stratix10_svc_async_exit(controller);
2000	err_destroy_pool:	2020	err_destroy_pool:
2001	gen_pool_destroy(genpool);	2021	gen_pool_destroy(genpool);
		2022
2002	return ret;	2023	return ret;
2003	}	2024	}
2004		2025
2005	static void stratix10_svc_drv_remove(struct platform_device *pdev)	2026	static void stratix10_svc_drv_remove(struct platform_device *pdev)
2006	{	2027	{
		2028	int i;
2007	struct stratix10_svc_controller *ctrl = platform_get_drvdata(pdev);	2029	struct stratix10_svc_controller *ctrl = platform_get_drvdata(pdev);
2008	struct stratix10_svc *svc = ctrl->svc;	2030	struct stratix10_svc *svc = ctrl->svc;
2009		2031
@@ -2011,14 +2033,16 @@ static void stratix10_svc_drv_remove(struct platform_device *pdev) · 1 unmodified line
2011		2033
2012	of_platform_depopulate(ctrl->dev);	2034	of_platform_depopulate(ctrl->dev);
2013		2035
2014	platform_device_unregister(svc->intel_svc_fcs);
2015	platform_device_unregister(svc->stratix10_svc_rsu);	2036	platform_device_unregister(svc->stratix10_svc_rsu);
2016		2037
2017	kfifo_free(&ctrl->svc_fifo);	2038	for (i = 0; i < SVC_NUM_CHANNEL; i++) {
2018	if (ctrl->task) {	2039	if (ctrl->chans[i].task) {
2019	kthread_stop(ctrl->task);	2040	kthread_stop(ctrl->chans[i].task);
2020	ctrl->task = NULL;	2041	ctrl->chans[i].task = NULL;
		2042	}
		2043	kfifo_free(&ctrl->chans[i].svc_fifo);
2021	}	2044	}
		2045
2022	if (ctrl->genpool)	2046	if (ctrl->genpool)
2023	gen_pool_destroy(ctrl->genpool);	2047	gen_pool_destroy(ctrl->genpool);
2024	list_del(&ctrl->node);	2048	list_del(&ctrl->node);

drivers/gpib/lpvo_usb_gpib/lpvo_usb_gpib.c+4−3

 /*
  * Table of devices that work with this driver.
  *
- * Currently, only one device is known to be used in the
+ * Currently, only one device is known to be used in the lpvo_usb_gpib
- * lpvo_usb_gpib adapter (FTDI 0403:6001).
+ * adapter (FTDI 0403:6001) but as this device id is already handled by the
+ * ftdi_sio USB serial driver the LPVO driver must not bind to it by default.
+ *
  * If your adapter uses a different chip, insert a line
  * in the following table with proper <Vendor-id>, <Product-id>.
  *
  */
 static const struct usb_device_id skel_table[] = {
-	{ USB_DEVICE(0x0403, 0x6001) },
 	{ }					   /* Terminating entry */
 };
 MODULE_DEVICE_TABLE(usb, skel_table);

drivers/gpio/gpiolib-shared.c+3−3

 static void gpio_shared_free_exclusive(void)
 {
 	struct gpio_shared_entry *entry, *epos;
+	struct gpio_shared_ref *ref, *rpos;
 	list_for_each_entry_safe(entry, epos, &gpio_shared_list, list) {
 		if (gpio_shared_entry_is_really_shared(entry))
 			continue;
-		gpio_shared_drop_ref(list_first_entry(&entry->refs,
+		list_for_each_entry_safe(ref, rpos, &entry->refs, list)
-						      struct gpio_shared_ref,
+			gpio_shared_drop_ref(ref);
-						      list));
 		gpio_shared_drop_entry(entry);
 	}
 }

drivers/gpio/gpiolib.c+6−2

 	/* Make sure this is called after checking for gc->get(). */
 	ret = gc->get(gc, offset);
-	if (ret > 1)
+	if (ret > 1) {
-		ret = -EBADE;
+		gpiochip_warn(gc,
+			"invalid return value from gc->get(): %d, consider fixing the driver\n",
+			ret);
+		ret = !!ret;
+	}
 	return ret;
 }

drivers/gpu/drm/amd/amdgpu/amdgpu_aca.c+1−0

@@ -641,6 +641,7 @@ static void aca_error_fini(struct aca_error *aerr) · 640 unmodified lines
641	aca_bank_error_remove(aerr, bank_error);	641	aca_bank_error_remove(aerr, bank_error);
642		642
643	out_unlock:	643	out_unlock:
		644	mutex_unlock(&aerr->lock);
644	mutex_destroy(&aerr->lock);	645	mutex_destroy(&aerr->lock);
645	}	646	}
646		647

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c+5−1

 		*process_info = info;
 	}
-	vm->process_info = *process_info;
+	if (cmpxchg(&vm->process_info, NULL, *process_info) != NULL) {
+		ret = -EINVAL;
+		goto already_acquired;
+	}
 	/* Validate page directory and attach eviction fence */
 	ret = amdgpu_bo_reserve(vm->root.bo, true);
 	amdgpu_bo_unreserve(vm->root.bo);
 reserve_pd_fail:
 	vm->process_info = NULL;
+already_acquired:
 	if (info) {
 		dma_fence_put(&info->eviction_fence->base);
 		*process_info = NULL;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+23−8

 		break;
 	default:
 		r = amdgpu_discovery_set_ip_blocks(adev);
-		if (r)
+		if (r) {
+			adev->num_ip_blocks = 0;
 			return r;
+		}
 		break;
 	}
 		i = state == AMD_CG_STATE_GATE ? j : adev->num_ip_blocks - j - 1;
 		if (!adev->ip_blocks[i].status.late_initialized)
 			continue;
+		if (!adev->ip_blocks[i].version)
+			continue;
 		/* skip CG for GFX, SDMA on S0ix */
 		if (adev->in_s0ix &&
 		    (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GFX ||
 		i = state == AMD_PG_STATE_GATE ? j : adev->num_ip_blocks - j - 1;
 		if (!adev->ip_blocks[i].status.late_initialized)
 			continue;
+		if (!adev->ip_blocks[i].version)
+			continue;
 		/* skip PG for GFX, SDMA on S0ix */
 		if (adev->in_s0ix &&
 		    (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GFX ||
 	int i, r;
 	for (i = 0; i < adev->num_ip_blocks; i++) {
+		if (!adev->ip_blocks[i].version)
+			continue;
 		if (!adev->ip_blocks[i].version->funcs->early_fini)
 			continue;
 		if (!adev->ip_blocks[i].status.sw)
 			continue;
+		if (!adev->ip_blocks[i].version)
+			continue;
 		if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_GMC) {
 			amdgpu_ucode_free_bo(adev);
 			amdgpu_free_static_csa(&adev->virt.csa_obj);
 	for (i = adev->num_ip_blocks - 1; i >= 0; i--) {
 		if (!adev->ip_blocks[i].status.late_initialized)
 			continue;
+		if (!adev->ip_blocks[i].version)
+			continue;
 		if (adev->ip_blocks[i].version->funcs->late_fini)
 			adev->ip_blocks[i].version->funcs->late_fini(&adev->ip_blocks[i]);
 		adev->ip_blocks[i].status.late_initialized = false;
 	dev_info(adev->dev, "PCI error: slot reset callback!!\n");
 	memset(&reset_context, 0, sizeof(reset_context));
+	INIT_LIST_HEAD(&device_list);
+	hive = amdgpu_get_xgmi_hive(adev);
+	if (hive) {
+		mutex_lock(&hive->hive_lock);
+		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head)
+			list_add_tail(&tmp_adev->reset_list, &device_list);
+	} else {
+		list_add_tail(&adev->reset_list, &device_list);
+	}
 	if (adev->pcie_reset_ctx.swus)
 		link_dev = adev->pcie_reset_ctx.swus;
 	reset_context.reset_req_dev = adev;
 	set_bit(AMDGPU_NEED_FULL_RESET, &reset_context.flags);
 	set_bit(AMDGPU_SKIP_COREDUMP, &reset_context.flags);
-	INIT_LIST_HEAD(&device_list);
-	hive = amdgpu_get_xgmi_hive(adev);
 	if (hive) {
-		mutex_lock(&hive->hive_lock);
 		reset_context.hive = hive;
-		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head) {
+		list_for_each_entry(tmp_adev, &hive->device_list, gmc.xgmi.head)
 			tmp_adev->pcie_reset_ctx.in_link_reset = true;
-			list_add_tail(&tmp_adev->reset_list, &device_list);
-		}
 	} else {
 		set_bit(AMDGPU_SKIP_HW_RESET, &reset_context.flags);
-		list_add_tail(&adev->reset_list, &device_list);
 	}
 	r = amdgpu_device_asic_reset(adev, &device_list, &reset_context);

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+1−1

@@ -83,7 +83,7 @@ void amdgpu_driver_unload_kms(struct drm_device *dev) · 82 unmodified lines
83	{	83	{
84	struct amdgpu_device *adev = drm_to_adev(dev);	84	struct amdgpu_device *adev = drm_to_adev(dev);
85		85
86	if (adev == NULL)	86	if (adev == NULL \|\| !adev->num_ip_blocks)
87	return;	87	return;
88		88
89	amdgpu_unregister_gpu_instance(adev);	89	amdgpu_unregister_gpu_instance(adev);

drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h+8−8

drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c+7−5

 	if (!context || !context->initialized) {
 		dev_err(adev->dev, "TA is not initialized\n");
 		ret = -EINVAL;
-		goto err_free_shared_buf;
+		goto free_shared_buf;
 	}
 	if (!psp->ta_funcs || !psp->ta_funcs->fn_ta_invoke) {
 		dev_err(adev->dev, "Unsupported function to invoke TA\n");
 		ret = -EOPNOTSUPP;
-		goto err_free_shared_buf;
+		goto free_shared_buf;
 	}
 	context->session_id = ta_id;
 	mutex_lock(&psp->ras_context.mutex);
 	ret = prep_ta_mem_context(&context->mem_context, shared_buf, shared_buf_len);
 	if (ret)
-		goto err_free_shared_buf;
+		goto unlock;
 	ret = psp_fn_ta_invoke(psp, cmd_id);
 	if (ret || context->resp_status) {
 			ret, context->resp_status);
 		if (!ret) {
 			ret = -EINVAL;
-			goto err_free_shared_buf;
+			goto unlock;
 		}
 	}
 	if (copy_to_user((char *)&buf[copy_pos], context->mem_context.shared_buf, shared_buf_len))
 		ret = -EFAULT;
-err_free_shared_buf:
+unlock:
 	mutex_unlock(&psp->ras_context.mutex);
+free_shared_buf:
 	kfree(shared_buf);
 	return ret;

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c+81−35

 	return ret;
 }
-static void amdgpu_userq_cleanup(struct amdgpu_usermode_queue *queue,
+static void amdgpu_userq_cleanup(struct amdgpu_usermode_queue *queue)
-				 int queue_id)
 {
 	struct amdgpu_userq_mgr *uq_mgr = queue->userq_mgr;
 	struct amdgpu_device *adev = uq_mgr->adev;
 	uq_funcs->mqd_destroy(queue);
 	amdgpu_userq_fence_driver_free(queue);
 	/* Use interrupt-safe locking since IRQ handlers may access these XArrays */
-	xa_erase_irq(&uq_mgr->userq_xa, (unsigned long)queue_id);
 	xa_erase_irq(&adev->userq_doorbell_xa, queue->doorbell_index);
 	queue->userq_mgr = NULL;
 	list_del(&queue->userq_va_list);
 	up_read(&adev->reset_domain->sem);
 }
-static struct amdgpu_usermode_queue *
-amdgpu_userq_find(struct amdgpu_userq_mgr *uq_mgr, int qid)
-{
-	return xa_load(&uq_mgr->userq_xa, qid);
-}
 void
 amdgpu_userq_ensure_ev_fence(struct amdgpu_userq_mgr *uq_mgr,
 			     struct amdgpu_eviction_fence_mgr *evf_mgr)
 }
 static int
-amdgpu_userq_destroy(struct drm_file *filp, int queue_id)
+amdgpu_userq_destroy(struct amdgpu_userq_mgr *uq_mgr, struct amdgpu_usermode_queue *queue)
 {
-	struct amdgpu_fpriv *fpriv = filp->driver_priv;
-	struct amdgpu_userq_mgr *uq_mgr = &fpriv->userq_mgr;
 	struct amdgpu_device *adev = uq_mgr->adev;
-	struct amdgpu_usermode_queue *queue;
 	int r = 0;
 	cancel_delayed_work_sync(&uq_mgr->resume_work);
 	mutex_lock(&uq_mgr->userq_mutex);
-	queue = amdgpu_userq_find(uq_mgr, queue_id);
-	if (!queue) {
-		drm_dbg_driver(adev_to_drm(uq_mgr->adev), "Invalid queue id to destroy\n");
-		mutex_unlock(&uq_mgr->userq_mutex);
-		return -EINVAL;
-	}
 	amdgpu_userq_wait_for_last_fence(queue);
 	/* Cancel any pending hang detection work and cleanup */
 	if (queue->hang_detect_fence) {
 		drm_warn(adev_to_drm(uq_mgr->adev), "trying to destroy a HW mapping userq\n");
 		queue->state = AMDGPU_USERQ_STATE_HUNG;
 	}
-	amdgpu_userq_cleanup(queue, queue_id);
+	amdgpu_userq_cleanup(queue);
 	mutex_unlock(&uq_mgr->userq_mutex);
 	pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
 	return r;
 }
+static void amdgpu_userq_kref_destroy(struct kref *kref)
+{
+	int r;
+	struct amdgpu_usermode_queue *queue =
+		container_of(kref, struct amdgpu_usermode_queue, refcount);
+	struct amdgpu_userq_mgr *uq_mgr = queue->userq_mgr;
+	r = amdgpu_userq_destroy(uq_mgr, queue);
+	if (r)
+		drm_file_err(uq_mgr->file, "Failed to destroy usermode queue %d\n", r);
+}
+struct amdgpu_usermode_queue *amdgpu_userq_get(struct amdgpu_userq_mgr *uq_mgr, u32 qid)
+{
+	struct amdgpu_usermode_queue *queue;
+	xa_lock(&uq_mgr->userq_xa);
+	queue = xa_load(&uq_mgr->userq_xa, qid);
+	if (queue)
+		kref_get(&queue->refcount);
+	xa_unlock(&uq_mgr->userq_xa);
+	return queue;
+}
+void amdgpu_userq_put(struct amdgpu_usermode_queue *queue)
+{
+	if (queue)
+		kref_put(&queue->refcount, amdgpu_userq_kref_destroy);
+}
 static int amdgpu_userq_priority_permit(struct drm_file *filp,
 					int priority)
 {
 		goto unlock;
 	}
+	/* drop this refcount during queue destroy */
+	kref_init(&queue->refcount);
 	/* Wait for mode-1 reset to complete */
 	down_read(&adev->reset_domain->sem);
 	r = xa_err(xa_store_irq(&adev->userq_doorbell_xa, index, queue, GFP_KERNEL));
 		       struct drm_file *filp)
 {
 	union drm_amdgpu_userq *args = data;
-	int r;
+	struct amdgpu_fpriv *fpriv = filp->driver_priv;
+	struct amdgpu_usermode_queue *queue;
+	int r = 0;
 	if (!amdgpu_userq_enabled(dev))
 		return -ENOTSUPP;
 			drm_file_err(filp, "Failed to create usermode queue\n");
 		break;
-	case AMDGPU_USERQ_OP_FREE:
+	case AMDGPU_USERQ_OP_FREE: {
-		r = amdgpu_userq_destroy(filp, args->in.queue_id);
+		xa_lock(&fpriv->userq_mgr.userq_xa);
-		if (r)
+		queue = __xa_erase(&fpriv->userq_mgr.userq_xa, args->in.queue_id);
-			drm_file_err(filp, "Failed to destroy usermode queue\n");
+		xa_unlock(&fpriv->userq_mgr.userq_xa);
+		if (!queue)
+			return -ENOENT;
+		amdgpu_userq_put(queue);
 		break;
+	}
 	default:
 		drm_dbg_driver(dev, "Invalid user queue op specified: %d\n", args->in.op);
 	/* Resume all the queues for this process */
 	xa_for_each(&uq_mgr->userq_xa, queue_id, queue) {
+		queue = amdgpu_userq_get(uq_mgr, queue_id);
+		if (!queue)
+			continue;
 		if (!amdgpu_userq_buffer_vas_mapped(queue)) {
 			drm_file_err(uq_mgr->file,
 				     "trying restore queue without va mapping\n");
 			queue->state = AMDGPU_USERQ_STATE_INVALID_VA;
+			amdgpu_userq_put(queue);
 			continue;
 		}
 		r = amdgpu_userq_restore_helper(queue);
 		if (r)
 			ret = r;
+		amdgpu_userq_put(queue);
 	}
 	if (ret)
 	amdgpu_userq_detect_and_reset_queues(uq_mgr);
 	/* Try to unmap all the queues in this process ctx */
 	xa_for_each(&uq_mgr->userq_xa, queue_id, queue) {
+		queue = amdgpu_userq_get(uq_mgr, queue_id);
+		if (!queue)
+			continue;
 		r = amdgpu_userq_preempt_helper(queue);
 		if (r)
 			ret = r;
+		amdgpu_userq_put(queue);
 	}
 	if (ret)
 	int ret;
 	xa_for_each(&uq_mgr->userq_xa, queue_id, queue) {
+		queue = amdgpu_userq_get(uq_mgr, queue_id);
+		if (!queue)
+			continue;
 		struct dma_fence *f = queue->last_fence;
-		if (!f || dma_fence_is_signaled(f))
+		if (!f || dma_fence_is_signaled(f)) {
+			amdgpu_userq_put(queue);
 			continue;
+		}
 		ret = dma_fence_wait_timeout(f, true, msecs_to_jiffies(100));
 		if (ret <= 0) {
 			drm_file_err(uq_mgr->file, "Timed out waiting for fence=%llu:%llu\n",
 				     f->context, f->seqno);
+			amdgpu_userq_put(queue);
 			return -ETIMEDOUT;
 		}
+		amdgpu_userq_put(queue);
 	}
 	return 0;
 void amdgpu_userq_mgr_fini(struct amdgpu_userq_mgr *userq_mgr)
 {
 	struct amdgpu_usermode_queue *queue;
-	unsigned long queue_id;
+	unsigned long queue_id = 0;
+	for (;;) {
+		xa_lock(&userq_mgr->userq_xa);
+		queue = xa_find(&userq_mgr->userq_xa, &queue_id, ULONG_MAX,
+				XA_PRESENT);
+		if (queue)
+			__xa_erase(&userq_mgr->userq_xa, queue_id);
+		xa_unlock(&userq_mgr->userq_xa);
-	cancel_delayed_work_sync(&userq_mgr->resume_work);
+		if (!queue)
+			break;
-	mutex_lock(&userq_mgr->userq_mutex);
+		amdgpu_userq_put(queue);
-	amdgpu_userq_detect_and_reset_queues(userq_mgr);
-	xa_for_each(&userq_mgr->userq_xa, queue_id, queue) {
-		amdgpu_userq_wait_for_last_fence(queue);
-		amdgpu_userq_unmap_helper(queue);
-		amdgpu_userq_cleanup(queue, queue_id);
 	}
 	xa_destroy(&userq_mgr->userq_xa);
-	mutex_unlock(&userq_mgr->userq_mutex);
 	mutex_destroy(&userq_mgr->userq_mutex);
 }

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.h+4−0

 	struct dentry		*debugfs_queue;
 	struct delayed_work hang_detect_work;
 	struct dma_fence *hang_detect_fence;
+	struct kref		refcount;
 	struct list_head	userq_va_list;
 };
 	struct amdgpu_userq_obj	*db_obj;
 };
+struct amdgpu_usermode_queue *amdgpu_userq_get(struct amdgpu_userq_mgr *uq_mgr, u32 qid);
+void amdgpu_userq_put(struct amdgpu_usermode_queue *queue);
 int amdgpu_userq_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
 int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr, struct drm_file *file_priv,

drivers/gpu/drm/amd/amdgpu/amdgpu_userq_fence.c+33−31

 static const struct dma_fence_ops amdgpu_userq_fence_ops;
 static struct kmem_cache *amdgpu_userq_fence_slab;
+#define AMDGPU_USERQ_MAX_HANDLES	(1U << 16)
 int amdgpu_userq_fence_slab_init(void)
 {
 	amdgpu_userq_fence_slab = kmem_cache_create("amdgpu_userq_fence",
 	struct drm_amdgpu_userq_signal *args = data;
 	struct drm_gem_object **gobj_write = NULL;
 	struct drm_gem_object **gobj_read = NULL;
-	struct amdgpu_usermode_queue *queue;
+	struct amdgpu_usermode_queue *queue = NULL;
 	struct amdgpu_userq_fence *userq_fence;
 	struct drm_syncobj **syncobj = NULL;
 	u32 *bo_handles_write, num_write_bo_handles;
 	if (!amdgpu_userq_enabled(dev))
 		return -ENOTSUPP;
+	if (args->num_syncobj_handles > AMDGPU_USERQ_MAX_HANDLES ||
+	    args->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
+	    args->num_bo_read_handles > AMDGPU_USERQ_MAX_HANDLES)
+		return -EINVAL;
 	num_syncobj_handles = args->num_syncobj_handles;
 	syncobj_handles = memdup_user(u64_to_user_ptr(args->syncobj_handles),
 				      size_mul(sizeof(u32), num_syncobj_handles));
 	}
 	/* Retrieve the user queue */
-	queue = xa_load(&userq_mgr->userq_xa, args->queue_id);
+	queue = amdgpu_userq_get(userq_mgr, args->queue_id);
 	if (!queue) {
 		r = -ENOENT;
 		goto put_gobj_write;
 free_syncobj_handles:
 	kfree(syncobj_handles);
+	if (queue)
+		amdgpu_userq_put(queue);
 	return r;
 }
 	struct drm_amdgpu_userq_wait *wait_info = data;
 	struct amdgpu_fpriv *fpriv = filp->driver_priv;
 	struct amdgpu_userq_mgr *userq_mgr = &fpriv->userq_mgr;
-	struct amdgpu_usermode_queue *waitq;
+	struct amdgpu_usermode_queue *waitq = NULL;
 	struct drm_gem_object **gobj_write;
 	struct drm_gem_object **gobj_read;
 	struct dma_fence **fences = NULL;
 	if (!amdgpu_userq_enabled(dev))
 		return -ENOTSUPP;
+	if (wait_info->num_syncobj_handles > AMDGPU_USERQ_MAX_HANDLES ||
+	    wait_info->num_bo_write_handles > AMDGPU_USERQ_MAX_HANDLES ||
+	    wait_info->num_bo_read_handles > AMDGPU_USERQ_MAX_HANDLES)
+		return -EINVAL;
 	num_read_bo_handles = wait_info->num_bo_read_handles;
 	bo_handles_read = memdup_user(u64_to_user_ptr(wait_info->bo_read_handles),
 				      size_mul(sizeof(u32), num_read_bo_handles));
 			dma_resv_for_each_fence(&resv_cursor, gobj_read[i]->resv,
 						DMA_RESV_USAGE_READ, fence) {
-				if (WARN_ON_ONCE(num_fences >= wait_info->num_fences)) {
+				if (num_fences >= wait_info->num_fences) {
 					r = -EINVAL;
 					goto free_fences;
 				}
 			dma_resv_for_each_fence(&resv_cursor, gobj_write[i]->resv,
 						DMA_RESV_USAGE_WRITE, fence) {
-				if (WARN_ON_ONCE(num_fences >= wait_info->num_fences)) {
+				if (num_fences >= wait_info->num_fences) {
 					r = -EINVAL;
 					goto free_fences;
 				}
 					goto free_fences;
 				dma_fence_unwrap_for_each(f, &iter, fence) {
-					if (WARN_ON_ONCE(num_fences >= wait_info->num_fences)) {
+					if (num_fences >= wait_info->num_fences) {
 						r = -EINVAL;
+						dma_fence_put(fence);
 						goto free_fences;
 					}
 			if (r)
 				goto free_fences;
-			if (WARN_ON_ONCE(num_fences >= wait_info->num_fences)) {
+			if (num_fences >= wait_info->num_fences) {
 				r = -EINVAL;
+				dma_fence_put(fence);
 				goto free_fences;
 			}
 		 */
 		num_fences = dma_fence_dedup_array(fences, num_fences);
-		waitq = xa_load(&userq_mgr->userq_xa, wait_info->waitq_id);
+		waitq = amdgpu_userq_get(userq_mgr, wait_info->waitq_id);
 		if (!waitq) {
 			r = -EINVAL;
 			goto free_fences;
 			r = -EFAULT;
 			goto free_fences;
 		}
-		kfree(fences);
-		kfree(fence_info);
 	}
-	drm_exec_fini(&exec);
-	for (i = 0; i < num_read_bo_handles; i++)
-		drm_gem_object_put(gobj_read[i]);
-	kfree(gobj_read);
-	for (i = 0; i < num_write_bo_handles; i++)
-		drm_gem_object_put(gobj_write[i]);
-	kfree(gobj_write);
-	kfree(timeline_points);
-	kfree(timeline_handles);
-	kfree(syncobj_handles);
-	kfree(bo_handles_write);
-	kfree(bo_handles_read);
-	return 0;
 free_fences:
-	while (num_fences-- > 0)
+	if (fences) {
-		dma_fence_put(fences[num_fences]);
+		while (num_fences-- > 0)
-	kfree(fences);
+			dma_fence_put(fences[num_fences]);
+		kfree(fences);
+	}
 free_fence_info:
 	kfree(fence_info);
 exec_fini:
 free_bo_handles_read:
 	kfree(bo_handles_read);
+	if (waitq)
+		amdgpu_userq_put(waitq);
 	return r;
 }

drivers/gpu/drm/amd/amdgpu/mes_v11_0.c+0−5

 	mes_set_hw_res_pkt.enable_reg_active_poll = 1;
 	mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
 	mes_set_hw_res_pkt.oversubscription_timer = 50;
-	if ((mes->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x7f)
-		mes_set_hw_res_pkt.enable_lr_compute_wa = 1;
-	else
-		dev_info_once(mes->adev->dev,
-			      "MES FW version must be >= 0x7f to enable LR compute workaround.\n");
 	if (amdgpu_mes_log_enable) {
 		mes_set_hw_res_pkt.enable_mes_event_int_logging = 1;

drivers/gpu/drm/amd/amdgpu/mes_v12_0.c+4−6

 	int i;
 	struct amdgpu_device *adev = mes->adev;
 	union MESAPI_SET_HW_RESOURCES mes_set_hw_res_pkt;
+	uint32_t mes_rev = (pipe == AMDGPU_MES_SCHED_PIPE) ?
+		(mes->sched_version & AMDGPU_MES_VERSION_MASK) :
+		(mes->kiq_version & AMDGPU_MES_VERSION_MASK);
 	memset(&mes_set_hw_res_pkt, 0, sizeof(mes_set_hw_res_pkt));
 	mes_set_hw_res_pkt.use_different_vmid_compute = 1;
 	mes_set_hw_res_pkt.enable_reg_active_poll = 1;
 	mes_set_hw_res_pkt.enable_level_process_quantum_check = 1;
-	if ((mes->adev->mes.sched_version & AMDGPU_MES_VERSION_MASK) >= 0x82)
-		mes_set_hw_res_pkt.enable_lr_compute_wa = 1;
-	else
-		dev_info_once(adev->dev,
-			      "MES FW version must be >= 0x82 to enable LR compute workaround.\n");
 	/*
 	 * Keep oversubscribe timer for sdma . When we have unmapped doorbell
 	 * handling support, other queue will not use the oversubscribe timer.
 	 * handling  mode - 0: disabled; 1: basic version; 2: basic+ version
 	 */
-	mes_set_hw_res_pkt.oversubscription_timer = 50;
+	mes_set_hw_res_pkt.oversubscription_timer = mes_rev < 0x8b ? 0 : 50;
 	mes_set_hw_res_pkt.unmapped_doorbell_handling = 1;
 	if (amdgpu_mes_log_enable) {

drivers/gpu/drm/amd/amdgpu/psp_v15_0.c+10−10

@@ -69,12 +69,12 @@ static int psp_v15_0_0_ring_stop(struct psp_context *psp, · 68 unmodified lines
69	0x80000000, 0x80000000, false);	69	0x80000000, 0x80000000, false);
70	} else {	70	} else {
71	/* Write the ring destroy command*/	71	/* Write the ring destroy command*/
72	WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_64,	72	WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_64,
73	GFX_CTRL_CMD_ID_DESTROY_RINGS);	73	GFX_CTRL_CMD_ID_DESTROY_RINGS);
74	/* there might be handshake issue with hardware which needs delay */	74	/* there might be handshake issue with hardware which needs delay */
75	mdelay(20);	75	mdelay(20);
76	/* Wait for response flag (bit 31) */	76	/* Wait for response flag (bit 31) */
77	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMPASP_SMN_C2PMSG_64),	77	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_64),
78	0x80000000, 0x80000000, false);	78	0x80000000, 0x80000000, false);
79	}	79	}
80		80
@@ -116,7 +116,7 @@ static int psp_v15_0_0_ring_create(struct psp_context *psp, · 35 unmodified lines
116		116
117	} else {	117	} else {
118	/* Wait for sOS ready for ring creation */	118	/* Wait for sOS ready for ring creation */
119	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMPASP_SMN_C2PMSG_64),	119	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_64),
120	0x80000000, 0x80000000, false);	120	0x80000000, 0x80000000, false);
121	if (ret) {	121	if (ret) {
122	DRM_ERROR("Failed to wait for trust OS ready for ring creation\n");	122	DRM_ERROR("Failed to wait for trust OS ready for ring creation\n");
@@ -125,23 +125,23 @@ static int psp_v15_0_0_ring_create(struct psp_context *psp, · 2 unmodified lines
125		125
126	/* Write low address of the ring to C2PMSG_69 */	126	/* Write low address of the ring to C2PMSG_69 */
127	psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);	127	psp_ring_reg = lower_32_bits(ring->ring_mem_mc_addr);
128	WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_69, psp_ring_reg);	128	WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_69, psp_ring_reg);
129	/* Write high address of the ring to C2PMSG_70 */	129	/* Write high address of the ring to C2PMSG_70 */
130	psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr);	130	psp_ring_reg = upper_32_bits(ring->ring_mem_mc_addr);
131	WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_70, psp_ring_reg);	131	WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_70, psp_ring_reg);
132	/* Write size of ring to C2PMSG_71 */	132	/* Write size of ring to C2PMSG_71 */
133	psp_ring_reg = ring->ring_size;	133	psp_ring_reg = ring->ring_size;
134	WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_71, psp_ring_reg);	134	WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_71, psp_ring_reg);
135	/* Write the ring initialization command to C2PMSG_64 */	135	/* Write the ring initialization command to C2PMSG_64 */
136	psp_ring_reg = ring_type;	136	psp_ring_reg = ring_type;
137	psp_ring_reg = psp_ring_reg << 16;	137	psp_ring_reg = psp_ring_reg << 16;
138	WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_64, psp_ring_reg);	138	WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_64, psp_ring_reg);
139		139
140	/* there might be handshake issue with hardware which needs delay */	140	/* there might be handshake issue with hardware which needs delay */
141	mdelay(20);	141	mdelay(20);
142		142
143	/* Wait for response flag (bit 31) in C2PMSG_64 */	143	/* Wait for response flag (bit 31) in C2PMSG_64 */
144	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMPASP_SMN_C2PMSG_64),	144	ret = psp_wait_for(psp, SOC15_REG_OFFSET(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_64),
145	0x80000000, 0x8000FFFF, false);	145	0x80000000, 0x8000FFFF, false);
146	}	146	}
147		147
@@ -174,7 +174,7 @@ static uint32_t psp_v15_0_0_ring_get_wptr(struct psp_context *psp) · 26 unmodified lines
174	if (amdgpu_sriov_vf(adev))	174	if (amdgpu_sriov_vf(adev))
175	data = RREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_102);	175	data = RREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_102);
176	else	176	else
177	data = RREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_67);	177	data = RREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_67);
178		178
179	return data;	179	return data;
180	}	180	}
@@ -188,7 +188,7 @@ static void psp_v15_0_0_ring_set_wptr(struct psp_context *psp, uint32_t value) · 7 unmodified lines
188	WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,	188	WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_101,
189	GFX_CTRL_CMD_ID_CONSUME_CMD);	189	GFX_CTRL_CMD_ID_CONSUME_CMD);
190	} else	190	} else
191	WREG32_SOC15(MP0, 0, regMPASP_SMN_C2PMSG_67, value);	191	WREG32_SOC15(MP0, 0, regMPASP_PCRU1_MPASP_C2PMSG_67, value);
192	}	192	}
193		193
194	static const struct psp_funcs psp_v15_0_0_funcs = {	194	static const struct psp_funcs psp_v15_0_0_funcs = {

drivers/gpu/drm/amd/amdgpu/soc21.c+3−1

 			AMD_CG_SUPPORT_IH_CG |
 			AMD_CG_SUPPORT_BIF_MGCG |
 			AMD_CG_SUPPORT_BIF_LS;
-		adev->pg_flags = AMD_PG_SUPPORT_VCN |
+		adev->pg_flags = AMD_PG_SUPPORT_VCN_DPG |
+			AMD_PG_SUPPORT_VCN |
+			AMD_PG_SUPPORT_JPEG_DPG |
 			AMD_PG_SUPPORT_JPEG |
 			AMD_PG_SUPPORT_GFX_PG;
 		adev->external_rev_id = adev->rev_id + 0x1;

drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c+4−0

@@ -174,6 +174,10 @@ static int vcn_v5_0_0_sw_init(struct amdgpu_ip_block *ip_block) · 173 unmodified lines
174	fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE);	174	fw_shared->present_flag_0 = cpu_to_le32(AMDGPU_FW_SHARED_FLAG_0_UNIFIED_QUEUE);
175	fw_shared->sq.is_enabled = 1;	175	fw_shared->sq.is_enabled = 1;
176		176
		177	fw_shared->present_flag_0 \|= cpu_to_le32(AMDGPU_VCN_SMU_DPM_INTERFACE_FLAG);
		178	fw_shared->smu_dpm_interface.smu_interface_type = (adev->flags & AMD_IS_APU) ?
		179	AMDGPU_VCN_SMU_DPM_INTERFACE_APU : AMDGPU_VCN_SMU_DPM_INTERFACE_DGPU;
		180
177	if (amdgpu_vcnfw_log)	181	if (amdgpu_vcnfw_log)
178	amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]);	182	amdgpu_vcn_fwlog_init(&adev->vcn.inst[i]);
179		183

drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c+1−0

@@ -593,6 +593,7 @@ int pqm_update_queue_properties(struct process_queue_manager *pqm, · 592 unmodified lines
593	p->queue_size)) {	593	p->queue_size)) {
594	pr_debug("ring buf 0x%llx size 0x%llx not mapped on GPU\n",	594	pr_debug("ring buf 0x%llx size 0x%llx not mapped on GPU\n",
595	p->queue_address, p->queue_size);	595	p->queue_address, p->queue_size);
		596	amdgpu_bo_unreserve(vm->root.bo);
596	return -EFAULT;	597	return -EFAULT;
597	}	598	}
598		599

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c+4−2

 	struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;
 	struct drm_atomic_state *state = plane_state->state;
 	const struct amdgpu_device *adev = drm_to_adev(colorop->dev);
+	bool has_3dlut = adev->dm.dc->caps.color.dpp.hw_3d_lut || adev->dm.dc->caps.color.mpc.preblend;
 	const struct drm_device *dev = colorop->dev;
 	const struct drm_color_lut32 *lut3d;
 	uint32_t lut3d_size;
 	}
 	if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_3D_LUT) {
-		if (!adev->dm.dc->caps.color.dpp.hw_3d_lut) {
+		if (!has_3dlut) {
 			drm_dbg(dev, "3D LUT is not supported by hardware\n");
 			return -EINVAL;
 		}
 	struct drm_colorop *colorop = plane_state->color_pipeline;
 	struct drm_device *dev = plane_state->plane->dev;
 	struct amdgpu_device *adev = drm_to_adev(dev);
+	bool has_3dlut = adev->dm.dc->caps.color.dpp.hw_3d_lut || adev->dm.dc->caps.color.mpc.preblend;
 	int ret;
 	/* 1D Curve - DEGAM TF */
 	if (ret)
 		return ret;
-	if (adev->dm.dc->caps.color.dpp.hw_3d_lut) {
+	if (has_3dlut) {
 		/* 1D Curve & LUT - SHAPER TF & LUT */
 		colorop = colorop->next;
 		if (!colorop) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c+2−1

 	struct drm_colorop *ops[MAX_COLOR_PIPELINE_OPS];
 	struct drm_device *dev = plane->dev;
 	struct amdgpu_device *adev = drm_to_adev(dev);
+	bool has_3dlut = adev->dm.dc->caps.color.dpp.hw_3d_lut || adev->dm.dc->caps.color.mpc.preblend;
 	int ret;
 	int i = 0;
 	i++;
-	if (adev->dm.dc->caps.color.dpp.hw_3d_lut) {
+	if (has_3dlut) {
 		/* 1D curve - SHAPER TF */
 		ops[i] = kzalloc_obj(*ops[0]);
 		if (!ops[i]) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c+8−8

 	dm->adev->mode_info.crtcs[crtc_index] = acrtc;
 	/* Don't enable DRM CRTC degamma property for
-	 * 1. Degamma is replaced by color pipeline.
+	 * 1. DCE since it doesn't support programmable degamma anywhere.
-	 * 2. DCE since it doesn't support programmable degamma anywhere.
+	 * 2. DCN401 since pre-blending degamma LUT doesn't apply to cursor.
-	 * 3. DCN401 since pre-blending degamma LUT doesn't apply to cursor.
+	 * Note: DEGAMMA properties are created even if the primary plane has the
+	 * COLOR_PIPELINE property. User space can use either the DEGAMMA properties
+	 * or the COLOR_PIPELINE property. An atomic commit which attempts to enable
+	 * both is rejected.
 	 */
-	if (plane->color_pipeline_property)
+	has_degamma = dm->adev->dm.dc->caps.color.dpp.dcn_arch &&
-		has_degamma = false;
+		      dm->adev->dm.dc->ctx->dce_version != DCN_VERSION_4_01;
-	else
-		has_degamma = dm->adev->dm.dc->caps.color.dpp.dcn_arch &&
-			      dm->adev->dm.dc->ctx->dce_version != DCN_VERSION_4_01;
 	drm_crtc_enable_color_mgmt(&acrtc->base, has_degamma ? MAX_COLOR_LUT_ENTRIES : 0,
 				   true, MAX_COLOR_LUT_ENTRIES);

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c+8−0

@@ -1256,6 +1256,14 @@ static int amdgpu_dm_plane_atomic_check(struct drm_plane *plane, · 1255 unmodified lines
1256	if (ret)	1256	if (ret)
1257	return ret;	1257	return ret;
1258		1258
		1259	/* Reject commits that attempt to use both COLOR_PIPELINE and CRTC DEGAMMA_LUT */
		1260	if (new_plane_state->color_pipeline && new_crtc_state->degamma_lut) {
		1261	drm_dbg_atomic(plane->dev,
		1262	"[PLANE:%d:%s] COLOR_PIPELINE and CRTC DEGAMMA_LUT cannot be enabled simultaneously\n",
		1263	plane->base.id, plane->name);
		1264	return -EINVAL;
		1265	}
		1266
1259	ret = amdgpu_dm_plane_fill_dc_scaling_info(adev, new_plane_state, &scaling_info);	1267	ret = amdgpu_dm_plane_fill_dc_scaling_info(adev, new_plane_state, &scaling_info);
1260	if (ret)	1268	if (ret)
1261	return ret;	1269	return ret;

drivers/gpu/drm/amd/display/dc/core/dc_stream.c+2−2

@@ -170,11 +170,11 @@ struct dc_stream_state *dc_create_stream_for_sink( · 169 unmodified lines
170	if (sink == NULL)	170	if (sink == NULL)
171	goto fail;	171	goto fail;
172		172
173	stream = kzalloc_obj(struct dc_stream_state);	173	stream = kzalloc_obj(struct dc_stream_state, GFP_ATOMIC);
174	if (stream == NULL)	174	if (stream == NULL)
175	goto fail;	175	goto fail;
176		176
177	stream->update_scratch = kzalloc((int32_t) dc_update_scratch_space_size(), GFP_KERNEL);	177	stream->update_scratch = kzalloc((int32_t) dc_update_scratch_space_size(), GFP_ATOMIC);
178	if (stream->update_scratch == NULL)	178	if (stream->update_scratch == NULL)
179	goto fail;	179	goto fail;
180		180

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h+5−1

 	DCCG_SRII(PIXEL_RATE_CNTL, OTG, 0),\
 	DCCG_SRII(PIXEL_RATE_CNTL, OTG, 1),\
 	SR(DISPCLK_FREQ_CHANGE_CNTL),\
-	SR(DC_MEM_GLOBAL_PWR_REQ_CNTL)
+	SR(DC_MEM_GLOBAL_PWR_REQ_CNTL),\
+	SR(MICROSECOND_TIME_BASE_DIV),\
+	SR(MILLISECOND_TIME_BASE_DIV),\
+	SR(DCCG_GATE_DISABLE_CNTL),\
+	SR(DCCG_GATE_DISABLE_CNTL2)
 #define DCCG_REG_LIST_DCN2() \
 	DCCG_COMMON_REG_LIST_DCN_BASE(),\

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c+20−1

@@ -96,6 +96,25 @@ static void dccg21_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppcl · 95 unmodified lines
96	dccg->pipe_dppclk_khz[dpp_inst] = req_dppclk;	96	dccg->pipe_dppclk_khz[dpp_inst] = req_dppclk;
97	}	97	}
98		98
		99	/*
		100	* On DCN21 S0i3 resume, BIOS programs MICROSECOND_TIME_BASE_DIV to
		101	* 0x00120464 as a marker that golden init has already been done.
		102	* dcn21_s0i3_golden_init_wa() reads this marker later in bios_golden_init()
		103	* to decide whether to skip golden init.
		104	*
		105	* dccg2_init() unconditionally overwrites MICROSECOND_TIME_BASE_DIV to
		106	* 0x00120264, destroying the marker before it can be read.
		107	*
		108	* Guard the call: if the S0i3 marker is present, skip dccg2_init() so the
		109	* WA can function correctly. bios_golden_init() will handle init in that case.
		110	*/
		111	static void dccg21_init(struct dccg *dccg)
		112	{
		113	if (dccg2_is_s0i3_golden_init_wa_done(dccg))
		114	return;
		115
		116	dccg2_init(dccg);
		117	}
99		118
100	static const struct dccg_funcs dccg21_funcs = {	119	static const struct dccg_funcs dccg21_funcs = {
101	.update_dpp_dto = dccg21_update_dpp_dto,	120	.update_dpp_dto = dccg21_update_dpp_dto,
@@ -103,7 +122,7 @@ static const struct dccg_funcs dccg21_funcs = { · 1 unmodified line
103	.set_fifo_errdet_ovr_en = dccg2_set_fifo_errdet_ovr_en,	122	.set_fifo_errdet_ovr_en = dccg2_set_fifo_errdet_ovr_en,
104	.otg_add_pixel = dccg2_otg_add_pixel,	123	.otg_add_pixel = dccg2_otg_add_pixel,
105	.otg_drop_pixel = dccg2_otg_drop_pixel,	124	.otg_drop_pixel = dccg2_otg_drop_pixel,
106	.dccg_init = dccg2_init,	125	.dccg_init = dccg21_init,
107	.refclk_setup = dccg2_refclk_setup, /* Deprecated - for backward compatibility only */	126	.refclk_setup = dccg2_refclk_setup, /* Deprecated - for backward compatibility only */
108	.allow_clock_gating = dccg2_allow_clock_gating,	127	.allow_clock_gating = dccg2_allow_clock_gating,
109	.enable_memory_low_power = dccg2_enable_memory_low_power,	128	.enable_memory_low_power = dccg2_enable_memory_low_power,

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.h+7−1

 	DCCG_SRII(DTO_PARAM, DPPCLK, 1),\
 	DCCG_SRII(DTO_PARAM, DPPCLK, 2),\
 	DCCG_SRII(DTO_PARAM, DPPCLK, 3),\
-	SR(REFCLK_CNTL)
+	SR(REFCLK_CNTL),\
+	SR(DISPCLK_FREQ_CHANGE_CNTL),\
+	SR(DC_MEM_GLOBAL_PWR_REQ_CNTL),\
+	SR(MICROSECOND_TIME_BASE_DIV),\
+	SR(MILLISECOND_TIME_BASE_DIV),\
+	SR(DCCG_GATE_DISABLE_CNTL),\
+	SR(DCCG_GATE_DISABLE_CNTL2)
 #define DCCG_MASK_SH_LIST_DCN301(mask_sh) \
 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_ENABLE, DPPCLK, 0, mask_sh),\

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h+4−1

 	SR(DSCCLK1_DTO_PARAM),\
 	SR(DSCCLK2_DTO_PARAM),\
 	SR(DSCCLK_DTO_CTRL),\
+	SR(DCCG_GATE_DISABLE_CNTL),\
 	SR(DCCG_GATE_DISABLE_CNTL2),\
 	SR(DCCG_GATE_DISABLE_CNTL3),\
-	SR(HDMISTREAMCLK0_DTO_PARAM)
+	SR(HDMISTREAMCLK0_DTO_PARAM),\
+	SR(DC_MEM_GLOBAL_PWR_REQ_CNTL),\
+	SR(MICROSECOND_TIME_BASE_DIV)
 #define DCCG_MASK_SH_LIST_DCN31(mask_sh) \

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h+4−1

 	SR(DSCCLK2_DTO_PARAM),\
 	SR(DSCCLK3_DTO_PARAM),\
 	SR(DSCCLK_DTO_CTRL),\
+	SR(DCCG_GATE_DISABLE_CNTL),\
 	SR(DCCG_GATE_DISABLE_CNTL2),\
 	SR(DCCG_GATE_DISABLE_CNTL3),\
 	SR(HDMISTREAMCLK0_DTO_PARAM),\
 	SR(OTG_PIXEL_RATE_DIV),\
-	SR(DTBCLK_P_CNTL)
+	SR(DTBCLK_P_CNTL),\
+	SR(DC_MEM_GLOBAL_PWR_REQ_CNTL),\
+	SR(MICROSECOND_TIME_BASE_DIV)
 #define DCCG_MASK_SH_LIST_DCN314_COMMON(mask_sh) \
 	DCCG_SFI(DPPCLK_DTO_CTRL, DTO_DB_EN, DPPCLK, 0, mask_sh),\

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c+5−1

 		 * audio corruption. Read current DISPCLK from DENTIST and request the same
 		 * freq to ensure that the timing is valid and unchanged.
 		 */
-		clocks->dispclk_khz = dc->clk_mgr->funcs->get_dispclk_from_dentist(dc->clk_mgr);
+		if (dc->clk_mgr->funcs->get_dispclk_from_dentist) {
+			clocks->dispclk_khz = dc->clk_mgr->funcs->get_dispclk_from_dentist(dc->clk_mgr);
+		} else {
+			clocks->dispclk_khz = dc->clk_mgr->boot_snapshot.dispclk * 1000;
+		}
 	}
 	clocks->ref_dtbclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dtbclk_mhz * 1000;
 	clocks->fclk_p_state_change_support = true;

drivers/gpu/drm/amd/include/asic_reg/mp/mp_15_0_0_offset.h+18−0

@@ -82,6 +82,24 @@ · 81 unmodified lines
82	#define regMPASP_SMN_IH_SW_INT_CTRL 0x0142	82	#define regMPASP_SMN_IH_SW_INT_CTRL 0x0142
83	#define regMPASP_SMN_IH_SW_INT_CTRL_BASE_IDX 0	83	#define regMPASP_SMN_IH_SW_INT_CTRL_BASE_IDX 0
84		84
		85	// addressBlock: mp_SmuMpASPPub_PcruDec
		86	// base address: 0x3800000
		87	#define regMPASP_PCRU1_MPASP_C2PMSG_64 0x4280
		88	#define regMPASP_PCRU1_MPASP_C2PMSG_64_BASE_IDX 3
		89	#define regMPASP_PCRU1_MPASP_C2PMSG_65 0x4281
		90	#define regMPASP_PCRU1_MPASP_C2PMSG_65_BASE_IDX 3
		91	#define regMPASP_PCRU1_MPASP_C2PMSG_66 0x4282
		92	#define regMPASP_PCRU1_MPASP_C2PMSG_66_BASE_IDX 3
		93	#define regMPASP_PCRU1_MPASP_C2PMSG_67 0x4283
		94	#define regMPASP_PCRU1_MPASP_C2PMSG_67_BASE_IDX 3
		95	#define regMPASP_PCRU1_MPASP_C2PMSG_68 0x4284
		96	#define regMPASP_PCRU1_MPASP_C2PMSG_68_BASE_IDX 3
		97	#define regMPASP_PCRU1_MPASP_C2PMSG_69 0x4285
		98	#define regMPASP_PCRU1_MPASP_C2PMSG_69_BASE_IDX 3
		99	#define regMPASP_PCRU1_MPASP_C2PMSG_70 0x4286
		100	#define regMPASP_PCRU1_MPASP_C2PMSG_70_BASE_IDX 3
		101	#define regMPASP_PCRU1_MPASP_C2PMSG_71 0x4287
		102	#define regMPASP_PCRU1_MPASP_C2PMSG_71_BASE_IDX 3
85		103
86	// addressBlock: mp_SmuMp1_SmnDec	104	// addressBlock: mp_SmuMp1_SmnDec
87	// base address: 0x0	105	// base address: 0x0

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c+9−2

@@ -2034,6 +2034,7 @@ static ssize_t smu_v13_0_0_get_gpu_metrics(struct smu_context *smu, · 2033 unmodified lines
2034	smu, SMU_DRIVER_TABLE_GPU_METRICS);	2034	smu, SMU_DRIVER_TABLE_GPU_METRICS);
2035	SmuMetricsExternal_t metrics_ext;	2035	SmuMetricsExternal_t metrics_ext;
2036	SmuMetrics_t *metrics = &metrics_ext.SmuMetrics;	2036	SmuMetrics_t *metrics = &metrics_ext.SmuMetrics;
		2037	uint32_t mp1_ver = amdgpu_ip_version(smu->adev, MP1_HWIP, 0);
2037	int ret = 0;	2038	int ret = 0;
2038		2039
2039	ret = smu_cmn_get_metrics_table(smu,	2040	ret = smu_cmn_get_metrics_table(smu,
@@ -2058,7 +2059,12 @@ static ssize_t smu_v13_0_0_get_gpu_metrics(struct smu_context *smu, · 18 unmodified lines
2058	metrics->Vcn1ActivityPercentage);	2059	metrics->Vcn1ActivityPercentage);
2059		2060
2060	gpu_metrics->average_socket_power = metrics->AverageSocketPower;	2061	gpu_metrics->average_socket_power = metrics->AverageSocketPower;
2061	gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;	2062
		2063	if ((mp1_ver == IP_VERSION(13, 0, 0) && smu->smc_fw_version <= 0x004e1e00) \|\|
		2064	(mp1_ver == IP_VERSION(13, 0, 10) && smu->smc_fw_version <= 0x00500800))
		2065	gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
		2066	else
		2067	gpu_metrics->energy_accumulator = UINT_MAX;
2062		2068
2063	if (metrics->AverageGfxActivity <= SMU_13_0_0_BUSY_THRESHOLD)	2069	if (metrics->AverageGfxActivity <= SMU_13_0_0_BUSY_THRESHOLD)
2064	gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;	2070	gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;
@@ -2216,7 +2222,8 @@ static int smu_v13_0_0_restore_user_od_settings(struct smu_context *smu) · 151 unmodified lines
2216	user_od_table->OverDriveTable.FeatureCtrlMask = BIT(PP_OD_FEATURE_GFXCLK_BIT) \|	2222	user_od_table->OverDriveTable.FeatureCtrlMask = BIT(PP_OD_FEATURE_GFXCLK_BIT) \|
2217	BIT(PP_OD_FEATURE_UCLK_BIT) \|	2223	BIT(PP_OD_FEATURE_UCLK_BIT) \|
2218	BIT(PP_OD_FEATURE_GFX_VF_CURVE_BIT) \|	2224	BIT(PP_OD_FEATURE_GFX_VF_CURVE_BIT) \|
2219	BIT(PP_OD_FEATURE_FAN_CURVE_BIT);	2225	BIT(PP_OD_FEATURE_FAN_CURVE_BIT) \|
		2226	BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
2220	res = smu_v13_0_0_upload_overdrive_table(smu, user_od_table);	2227	res = smu_v13_0_0_upload_overdrive_table(smu, user_od_table);
2221	user_od_table->OverDriveTable.FeatureCtrlMask = 0;	2228	user_od_table->OverDriveTable.FeatureCtrlMask = 0;
2222	if (res == 0)	2229	if (res == 0)

drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c+4−2

 					       metrics->Vcn1ActivityPercentage);
 	gpu_metrics->average_socket_power = metrics->AverageSocketPower;
-	gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
+	gpu_metrics->energy_accumulator = smu->smc_fw_version <= 0x00521400 ?
+		metrics->EnergyAccumulator : UINT_MAX;
 	if (metrics->AverageGfxActivity <= SMU_13_0_7_BUSY_THRESHOLD)
 		gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;
 	user_od_table->OverDriveTable.FeatureCtrlMask = BIT(PP_OD_FEATURE_GFXCLK_BIT) |
 							BIT(PP_OD_FEATURE_UCLK_BIT) |
 							BIT(PP_OD_FEATURE_GFX_VF_CURVE_BIT) |
-							BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+							BIT(PP_OD_FEATURE_FAN_CURVE_BIT) |
+							BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
 	res = smu_v13_0_7_upload_overdrive_table(smu, user_od_table);
 	user_od_table->OverDriveTable.FeatureCtrlMask = 0;
 	if (res == 0)

drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c+2−1

 	user_od_table->OverDriveTable.FeatureCtrlMask = BIT(PP_OD_FEATURE_GFXCLK_BIT) |
 							BIT(PP_OD_FEATURE_UCLK_BIT) |
 							BIT(PP_OD_FEATURE_GFX_VF_CURVE_BIT) |
-							BIT(PP_OD_FEATURE_FAN_CURVE_BIT);
+							BIT(PP_OD_FEATURE_FAN_CURVE_BIT) |
+							BIT(PP_OD_FEATURE_ZERO_FAN_BIT);
 	res = smu_v14_0_2_upload_overdrive_table(smu, user_od_table);
 	user_od_table->OverDriveTable.FeatureCtrlMask = 0;
 	if (res == 0)

drivers/gpu/drm/bridge/samsung-dsim.c+14−9

 	return 0;
 }
+static void samsung_dsim_unregister_te_irq(struct samsung_dsim *dsi)
+{
+	if (dsi->te_gpio) {
+		free_irq(gpiod_to_irq(dsi->te_gpio), dsi);
+		gpiod_put(dsi->te_gpio);
+	}
+}
 static int samsung_dsim_host_attach(struct mipi_dsi_host *host,
 				    struct mipi_dsi_device *device)
 {
 	if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO)) {
 		ret = samsung_dsim_register_te_irq(dsi, &device->dev);
 		if (ret)
-			return ret;
+			goto err_remove_bridge;
 	}
 	// The next bridge can be used by host_ops->attach
 err_release_next_bridge:
 	drm_bridge_put(dsi->bridge.next_bridge);
 	dsi->bridge.next_bridge = NULL;
-	return ret;
-}
-static void samsung_dsim_unregister_te_irq(struct samsung_dsim *dsi)
+	if (!(device->mode_flags & MIPI_DSI_MODE_VIDEO))
-{
+		samsung_dsim_unregister_te_irq(dsi);
-	if (dsi->te_gpio) {
+err_remove_bridge:
-		free_irq(gpiod_to_irq(dsi->te_gpio), dsi);
+	drm_bridge_remove(&dsi->bridge);
-		gpiod_put(dsi->te_gpio);
+	return ret;
-	}
 }
 static int samsung_dsim_host_detach(struct mipi_dsi_host *host,

drivers/gpu/drm/bridge/synopsys/dw-dp.c+3−1

@@ -2049,7 +2049,9 @@ struct dw_dp dw_dp_bind(struct device dev, struct drm_encoder *encoder, · 2048 unmodified lines
2049	bridge->type = DRM_MODE_CONNECTOR_DisplayPort;	2049	bridge->type = DRM_MODE_CONNECTOR_DisplayPort;
2050	bridge->ycbcr_420_allowed = true;	2050	bridge->ycbcr_420_allowed = true;
2051		2051
2052	devm_drm_bridge_add(dev, bridge);	2052	ret = devm_drm_bridge_add(dev, bridge);
		2053	if (ret)
		2054	return ERR_PTR(ret);
2053		2055
2054	dp->aux.dev = dev;	2056	dp->aux.dev = dev;
2055	dp->aux.drm_dev = encoder->dev;	2057	dp->aux.drm_dev = encoder->dev;

drivers/gpu/drm/bridge/ti-sn65dsi83.c+7−6

 	 *  DSI_CLK = mode clock * bpp / dsi_data_lanes / 2
 	 * the 2 is there because the bus is DDR.
 	 */
-	return DIV_ROUND_UP(clamp((unsigned int)mode->clock *
+	return clamp((unsigned int)mode->clock *
-			    mipi_dsi_pixel_format_to_bpp(ctx->dsi->format) /
+		     mipi_dsi_pixel_format_to_bpp(ctx->dsi->format) /
-			    ctx->dsi->lanes / 2, 40000U, 500000U), 5000U);
+		     ctx->dsi->lanes / 2, 40000U, 500000U) / 5000U;
 }
 static u8 sn65dsi83_get_dsi_div(struct sn65dsi83 *ctx)
 					struct drm_atomic_state *state)
 {
 	struct sn65dsi83 *ctx = bridge_to_sn65dsi83(bridge);
+	const unsigned int dual_factor = ctx->lvds_dual_link ? 2 : 1;
 	const struct drm_bridge_state *bridge_state;
 	const struct drm_crtc_state *crtc_state;
 	const struct drm_display_mode *mode;
 	/* 32 + 1 pixel clock to ensure proper operation */
 	le16val = cpu_to_le16(32 + 1);
 	regmap_bulk_write(ctx->regmap, REG_VID_CHA_SYNC_DELAY_LOW, &le16val, 2);
-	le16val = cpu_to_le16(mode->hsync_end - mode->hsync_start);
+	le16val = cpu_to_le16((mode->hsync_end - mode->hsync_start) / dual_factor);
 	regmap_bulk_write(ctx->regmap, REG_VID_CHA_HSYNC_PULSE_WIDTH_LOW,
 			  &le16val, 2);
 	le16val = cpu_to_le16(mode->vsync_end - mode->vsync_start);
 	regmap_bulk_write(ctx->regmap, REG_VID_CHA_VSYNC_PULSE_WIDTH_LOW,
 			  &le16val, 2);
 	regmap_write(ctx->regmap, REG_VID_CHA_HORIZONTAL_BACK_PORCH,
-		     mode->htotal - mode->hsync_end);
+		     (mode->htotal - mode->hsync_end) / dual_factor);
 	regmap_write(ctx->regmap, REG_VID_CHA_VERTICAL_BACK_PORCH,
 		     mode->vtotal - mode->vsync_end);
 	regmap_write(ctx->regmap, REG_VID_CHA_HORIZONTAL_FRONT_PORCH,
-		     mode->hsync_start - mode->hdisplay);
+		     (mode->hsync_start - mode->hdisplay) / dual_factor);
 	regmap_write(ctx->regmap, REG_VID_CHA_VERTICAL_FRONT_PORCH,
 		     mode->vsync_start - mode->vdisplay);
 	regmap_write(ctx->regmap, REG_VID_CHA_TEST_PATTERN, 0x00);

drivers/gpu/drm/bridge/ti-sn65dsi86.c+4−2

 {
 	struct ti_sn65dsi86 *pdata = dev_get_drvdata(adev->dev.parent);
 	struct device_node *np = pdata->dev->of_node;
+	const struct i2c_client *client = to_i2c_client(pdata->dev);
 	int ret;
 	pdata->next_bridge = devm_drm_of_get_bridge(&adev->dev, np, 1, 0);
 			   ? DRM_MODE_CONNECTOR_DisplayPort : DRM_MODE_CONNECTOR_eDP;
 	if (pdata->bridge.type == DRM_MODE_CONNECTOR_DisplayPort) {
-		pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT |
+		pdata->bridge.ops = DRM_BRIDGE_OP_EDID | DRM_BRIDGE_OP_DETECT;
-				    DRM_BRIDGE_OP_HPD;
+		if (client->irq)
+			pdata->bridge.ops |= DRM_BRIDGE_OP_HPD;
 		/*
 		 * If comms were already enabled they would have been enabled
 		 * with the wrong value of HPD_DISABLE. Update it now. Comms

drivers/gpu/drm/drm_client_modeset.c+2−1

 	mutex_unlock(&client->modeset_mutex);
 out:
 	kfree(crtcs);
-	modes_destroy(dev, modes, connector_count);
+	if (modes)
+		modes_destroy(dev, modes, connector_count);
 	kfree(modes);
 	kfree(offsets);
 	kfree(enabled);

drivers/gpu/drm/drm_gpusvm.c+5−5

@@ -1338,14 +1338,14 @@ bool drm_gpusvm_range_pages_valid(struct drm_gpusvm *gpusvm, · 1337 unmodified lines
1338	EXPORT_SYMBOL_GPL(drm_gpusvm_range_pages_valid);	1338	EXPORT_SYMBOL_GPL(drm_gpusvm_range_pages_valid);
1339		1339
1340	/**	1340	/**
1341	* drm_gpusvm_range_pages_valid_unlocked() - GPU SVM range pages valid unlocked	1341	* drm_gpusvm_pages_valid_unlocked() - GPU SVM pages valid unlocked
1342	* @gpusvm: Pointer to the GPU SVM structure	1342	* @gpusvm: Pointer to the GPU SVM structure
1343	* @range: Pointer to the GPU SVM range structure	1343	* @svm_pages: Pointer to the GPU SVM pages structure
1344	*	1344	*
1345	* This function determines if a GPU SVM range pages are valid. Expected be	1345	* This function determines if a GPU SVM pages are valid. Expected be called
1346	* called without holding gpusvm->notifier_lock.	1346	* without holding gpusvm->notifier_lock.
1347	*	1347	*
1348	* Return: True if GPU SVM range has valid pages, False otherwise	1348	* Return: True if GPU SVM pages are valid, False otherwise
1349	*/	1349	*/
1350	static bool drm_gpusvm_pages_valid_unlocked(struct drm_gpusvm *gpusvm,	1350	static bool drm_gpusvm_pages_valid_unlocked(struct drm_gpusvm *gpusvm,
1351	struct drm_gpusvm_pages *svm_pages)	1351	struct drm_gpusvm_pages *svm_pages)

drivers/gpu/drm/drm_pagemap.c+2−12

@@ -480,18 +480,8 @@ int drm_pagemap_migrate_to_devmem(struct drm_pagemap_devmem *devmem_allocation, · 479 unmodified lines
480	.start = start,	480	.start = start,
481	.end = end,	481	.end = end,
482	.pgmap_owner = pagemap->owner,	482	.pgmap_owner = pagemap->owner,
483	/*	483	.flags = MIGRATE_VMA_SELECT_SYSTEM \| MIGRATE_VMA_SELECT_DEVICE_COHERENT \|
484	* FIXME: MIGRATE_VMA_SELECT_DEVICE_PRIVATE intermittently	484	MIGRATE_VMA_SELECT_DEVICE_PRIVATE,
485	* causes 'xe_exec_system_allocator --r raceno*' to trigger aa
486	* engine reset and a hard hang due to getting stuck on a folio
487	* lock. This should work and needs to be root-caused. The only
488	* downside of not selecting MIGRATE_VMA_SELECT_DEVICE_PRIVATE
489	* is that device-to-device migrations won’t work; instead,
490	* memory will bounce through system memory. This path should be
491	* rare and only occur when the madvise attributes of memory are
492	* changed or atomics are being used.
493	*/
494	.flags = MIGRATE_VMA_SELECT_SYSTEM \| MIGRATE_VMA_SELECT_DEVICE_COHERENT,
495	};	485	};
496	unsigned long i, npages = npages_in_range(start, end);	486	unsigned long i, npages = npages_in_range(start, end);
497	unsigned long own_pages = 0, migrated_pages = 0;	487	unsigned long own_pages = 0, migrated_pages = 0;

drivers/gpu/drm/gud/gud_drv.c+8−1

 }
 static const struct drm_crtc_helper_funcs gud_crtc_helper_funcs = {
-	.atomic_check = drm_crtc_helper_atomic_check
+	.atomic_check = drm_crtc_helper_atomic_check,
+	.atomic_enable = gud_crtc_atomic_enable,
+	.atomic_disable = gud_crtc_atomic_disable,
 };
 static const struct drm_crtc_funcs gud_crtc_funcs = {
 	DRM_GEM_SHADOW_PLANE_FUNCS,
 };
+static const struct drm_mode_config_helper_funcs gud_mode_config_helpers = {
+	.atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
+};
 static const struct drm_mode_config_funcs gud_mode_config_funcs = {
 	.fb_create = drm_gem_fb_create_with_dirty,
 	.atomic_check = drm_atomic_helper_check,
 	drm->mode_config.min_height = le32_to_cpu(desc.min_height);
 	drm->mode_config.max_height = le32_to_cpu(desc.max_height);
 	drm->mode_config.funcs = &gud_mode_config_funcs;
+	drm->mode_config.helper_private = &gud_mode_config_helpers;
 	/* Format init */
 	formats_dev = devm_kmalloc(dev, GUD_FORMATS_MAX_NUM, GFP_KERNEL);

drivers/gpu/drm/gud/gud_internal.h+4−0

 void gud_clear_damage(struct gud_device *gdrm);
 void gud_flush_work(struct work_struct *work);
+void gud_crtc_atomic_enable(struct drm_crtc *crtc,
+			    struct drm_atomic_state *state);
+void gud_crtc_atomic_disable(struct drm_crtc *crtc,
+			     struct drm_atomic_state *state);
 int gud_plane_atomic_check(struct drm_plane *plane,
 			   struct drm_atomic_state *state);
 void gud_plane_atomic_update(struct drm_plane *plane,

drivers/gpu/drm/gud/gud_pipe.c+36−18

 	return ret;
 }
+void gud_crtc_atomic_enable(struct drm_crtc *crtc,
+			    struct drm_atomic_state *state)
+{
+	struct drm_device *drm = crtc->dev;
+	struct gud_device *gdrm = to_gud_device(drm);
+	int idx;
+	if (!drm_dev_enter(drm, &idx))
+		return;
+	gud_usb_set_u8(gdrm, GUD_REQ_SET_CONTROLLER_ENABLE, 1);
+	gud_usb_set(gdrm, GUD_REQ_SET_STATE_COMMIT, 0, NULL, 0);
+	gud_usb_set_u8(gdrm, GUD_REQ_SET_DISPLAY_ENABLE, 1);
+	drm_dev_exit(idx);
+}
+void gud_crtc_atomic_disable(struct drm_crtc *crtc,
+			     struct drm_atomic_state *state)
+{
+	struct drm_device *drm = crtc->dev;
+	struct gud_device *gdrm = to_gud_device(drm);
+	int idx;
+	if (!drm_dev_enter(drm, &idx))
+		return;
+	gud_usb_set_u8(gdrm, GUD_REQ_SET_DISPLAY_ENABLE, 0);
+	gud_usb_set_u8(gdrm, GUD_REQ_SET_CONTROLLER_ENABLE, 0);
+	drm_dev_exit(idx);
+}
 void gud_plane_atomic_update(struct drm_plane *plane,
 			     struct drm_atomic_state *atomic_state)
 {
 		mutex_unlock(&gdrm->damage_lock);
 	}
-	if (!drm_dev_enter(drm, &idx))
+	if (!crtc || !drm_dev_enter(drm, &idx))
 		return;
-	if (!old_state->fb)
-		gud_usb_set_u8(gdrm, GUD_REQ_SET_CONTROLLER_ENABLE, 1);
-	if (fb && (crtc->state->mode_changed || crtc->state->connectors_changed))
-		gud_usb_set(gdrm, GUD_REQ_SET_STATE_COMMIT, 0, NULL, 0);
-	if (crtc->state->active_changed)
-		gud_usb_set_u8(gdrm, GUD_REQ_SET_DISPLAY_ENABLE, crtc->state->active);
-	if (!fb)
-		goto ctrl_disable;
 	ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE);
 	if (ret)
-		goto ctrl_disable;
+		goto out;
 	drm_atomic_helper_damage_iter_init(&iter, old_state, new_state);
 	drm_atomic_for_each_plane_damage(&iter, &damage)
 	drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
-ctrl_disable:
+out:
-	if (!crtc->state->enable)
-		gud_usb_set_u8(gdrm, GUD_REQ_SET_CONTROLLER_ENABLE, 0);
 	drm_dev_exit(idx);
 }

drivers/gpu/drm/i915/display/intel_alpm.c+1−12

 void intel_alpm_init(struct intel_dp *intel_dp)
 {
-	u8 dpcd;
-	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_RECEIVER_ALPM_CAP, &dpcd) < 0)
-		return;
-	intel_dp->alpm_dpcd = dpcd;
 	mutex_init(&intel_dp->alpm.lock);
 }
 	mutex_lock(&intel_dp->alpm.lock);
 	intel_de_rmw(display, ALPM_CTL(display, cpu_transcoder),
-		     ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE |
+		     ALPM_CTL_ALPM_ENABLE | ALPM_CTL_LOBF_ENABLE, 0);
-		     ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
-	intel_de_rmw(display,
-		     PORT_ALPM_CTL(cpu_transcoder),
-		     PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
 	drm_dbg_kms(display->drm, "Disabling ALPM\n");
 	mutex_unlock(&intel_dp->alpm.lock);

drivers/gpu/drm/i915/display/intel_display.c+0−1

@@ -1614,7 +1614,6 @@ static void hsw_configure_cpu_transcoder(const struct intel_crtc_state *crtc_sta · 1613 unmodified lines
1614	}	1614	}
1615		1615
1616	intel_set_transcoder_timings(crtc_state);	1616	intel_set_transcoder_timings(crtc_state);
1617	intel_vrr_set_transcoder_timings(crtc_state);
1618		1617
1619	if (cpu_transcoder != TRANSCODER_EDP)	1618	if (cpu_transcoder != TRANSCODER_EDP)
1620	intel_de_write(display, TRANS_MULT(display, cpu_transcoder),	1619	intel_de_write(display, TRANS_MULT(display, cpu_transcoder),

drivers/gpu/drm/i915/display/intel_dp.c+7−0

 intel_edp_init_dpcd(struct intel_dp *intel_dp, struct intel_connector *connector)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
+	int ret;
 	/* this function is meant to be called only once */
 	drm_WARN_ON(display->drm, intel_dp->dpcd[DP_DPCD_REV] != 0);
 	 */
 	intel_dp_init_source_oui(intel_dp);
+	/* Read the ALPM DPCD caps */
+	ret = drm_dp_dpcd_read_byte(&intel_dp->aux, DP_RECEIVER_ALPM_CAP,
+				    &intel_dp->alpm_dpcd);
+	if (ret < 0)
+		return false;
 	/*
 	 * This has to be called after intel_dp->edp_dpcd is filled, PSR checks
 	 * for SET_POWER_CAPABLE bit in intel_dp->edp_dpcd[1]

drivers/gpu/drm/i915/display/intel_psr.c+56−15

@@ -1307,9 +1307,14 @@ static bool psr2_granularity_check(struct intel_crtc_state *crtc_state, · 1306 unmodified lines
1307	u16 sink_y_granularity = crtc_state->has_panel_replay ?	1307	u16 sink_y_granularity = crtc_state->has_panel_replay ?
1308	connector->dp.panel_replay_caps.su_y_granularity :	1308	connector->dp.panel_replay_caps.su_y_granularity :
1309	connector->dp.psr_caps.su_y_granularity;	1309	connector->dp.psr_caps.su_y_granularity;
1310	u16 sink_w_granularity = crtc_state->has_panel_replay ?	1310	u16 sink_w_granularity;
1311	connector->dp.panel_replay_caps.su_w_granularity :	1311
1312	connector->dp.psr_caps.su_w_granularity;	1312	if (crtc_state->has_panel_replay)
		1313	sink_w_granularity = connector->dp.panel_replay_caps.su_w_granularity ==
		1314	DP_PANEL_REPLAY_FULL_LINE_GRANULARITY ?
		1315	crtc_hdisplay : connector->dp.panel_replay_caps.su_w_granularity;
		1316	else
		1317	sink_w_granularity = connector->dp.psr_caps.su_w_granularity;
1313		1318
1314	/* PSR2 HW only send full lines so we only need to validate the width */	1319	/* PSR2 HW only send full lines so we only need to validate the width */
1315	if (crtc_hdisplay % sink_w_granularity)	1320	if (crtc_hdisplay % sink_w_granularity)
@@ -2614,6 +2619,12 @@ void intel_psr2_program_trans_man_trk_ctl(struct intel_dsb *dsb, · 1298 unmodified lines
2614		2619
2615	intel_de_write_dsb(display, dsb, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),	2620	intel_de_write_dsb(display, dsb, PIPE_SRCSZ_ERLY_TPT(crtc->pipe),
2616	crtc_state->pipe_srcsz_early_tpt);	2621	crtc_state->pipe_srcsz_early_tpt);
		2622
		2623	if (!crtc_state->dsc.compression_enable)
		2624	return;
		2625
		2626	intel_dsc_su_et_parameters_configure(dsb, encoder, crtc_state,
		2627	drm_rect_height(&crtc_state->psr2_su_area));
2617	}	2628	}
2618		2629
2619	static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,	2630	static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
@@ -2684,11 +2695,12 @@ static void clip_area_update(struct drm_rect *overlap_damage_area, · 64 unmodified lines
2684	overlap_damage_area->y2 = damage_area->y2;	2695	overlap_damage_area->y2 = damage_area->y2;
2685	}	2696	}
2686		2697
2687	static void intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_state)	2698	static bool intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_state)
2688	{	2699	{
2689	struct intel_display *display = to_intel_display(crtc_state);	2700	struct intel_display *display = to_intel_display(crtc_state);
2690	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;	2701	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2691	u16 y_alignment;	2702	u16 y_alignment;
		2703	bool su_area_changed = false;
2692		2704
2693	/* ADLP aligns the SU region to vdsc slice height in case dsc is enabled */	2705	/* ADLP aligns the SU region to vdsc slice height in case dsc is enabled */
2694	if (crtc_state->dsc.compression_enable &&	2706	if (crtc_state->dsc.compression_enable &&
@@ -2697,10 +2709,18 @@ static void intel_psr2_sel_fetch_pipe_alignment(struct intel_crtc_state *crtc_st · 2 unmodified lines
2697	else	2709	else
2698	y_alignment = crtc_state->su_y_granularity;	2710	y_alignment = crtc_state->su_y_granularity;
2699		2711
2700	crtc_state->psr2_su_area.y1 -= crtc_state->psr2_su_area.y1 % y_alignment;	2712	if (crtc_state->psr2_su_area.y1 % y_alignment) {
2701	if (crtc_state->psr2_su_area.y2 % y_alignment)	2713	crtc_state->psr2_su_area.y1 -= crtc_state->psr2_su_area.y1 % y_alignment;
		2714	su_area_changed = true;
		2715	}
		2716
		2717	if (crtc_state->psr2_su_area.y2 % y_alignment) {
2702	crtc_state->psr2_su_area.y2 = ((crtc_state->psr2_su_area.y2 /	2718	crtc_state->psr2_su_area.y2 = ((crtc_state->psr2_su_area.y2 /
2703	y_alignment) + 1) * y_alignment;	2719	y_alignment) + 1) * y_alignment;
		2720	su_area_changed = true;
		2721	}
		2722
		2723	return su_area_changed;
2704	}	2724	}
2705		2725
2706	/*	2726	/*
@@ -2834,7 +2854,7 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, · 127 unmodified lines
2834	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);	2854	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
2835	struct intel_plane_state new_plane_state, old_plane_state;	2855	struct intel_plane_state new_plane_state, old_plane_state;
2836	struct intel_plane *plane;	2856	struct intel_plane *plane;
2837	bool full_update = false, cursor_in_su_area = false;	2857	bool full_update = false, su_area_changed;
2838	int i, ret;	2858	int i, ret;
2839		2859
2840	if (!crtc_state->enable_psr2_sel_fetch)	2860	if (!crtc_state->enable_psr2_sel_fetch)
@@ -2941,15 +2961,32 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, · 100 unmodified lines
2941	if (ret)	2961	if (ret)
2942	return ret;	2962	return ret;
2943		2963
2944	/*	2964	do {
2945	* Adjust su area to cover cursor fully as necessary (early	2965	bool cursor_in_su_area;
2946	* transport). This needs to be done after	2966
2947	* drm_atomic_add_affected_planes to ensure visible cursor is added into	2967	/*
2948	* affected planes even when cursor is not updated by itself.	2968	* Adjust su area to cover cursor fully as necessary
2949	*/	2969	* (early transport). This needs to be done after
2950	intel_psr2_sel_fetch_et_alignment(state, crtc, &cursor_in_su_area);	2970	* drm_atomic_add_affected_planes to ensure visible
		2971	* cursor is added into affected planes even when
		2972	* cursor is not updated by itself.
		2973	*/
		2974	intel_psr2_sel_fetch_et_alignment(state, crtc, &cursor_in_su_area);
2951		2975
2952	intel_psr2_sel_fetch_pipe_alignment(crtc_state);	2976	su_area_changed = intel_psr2_sel_fetch_pipe_alignment(crtc_state);
		2977
		2978	/*
		2979	* If the cursor was outside the SU area before
		2980	* alignment, the alignment step (which only expands
		2981	* SU) may pull the cursor partially inside, so we
		2982	* must run ET alignment again to fully cover it. But
		2983	* if the cursor was already fully inside before
		2984	* alignment, expanding the SU area won't change that,
		2985	* so no further work is needed.
		2986	*/
		2987	if (cursor_in_su_area)
		2988	break;
		2989	} while (su_area_changed);
2953		2990
2954	/*	2991	/*
2955	* Now that we have the pipe damaged area check if it intersect with	2992	* Now that we have the pipe damaged area check if it intersect with
@@ -3009,6 +3046,10 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, · 53 unmodified lines
3009	}	3046	}
3010		3047
3011	skip_sel_fetch_set_loop:	3048	skip_sel_fetch_set_loop:
		3049	if (full_update)
		3050	clip_area_update(&crtc_state->psr2_su_area, &crtc_state->pipe_src,
		3051	&crtc_state->pipe_src);
		3052
3012	psr2_man_trk_ctl_calc(crtc_state, full_update);	3053	psr2_man_trk_ctl_calc(crtc_state, full_update);
3013	crtc_state->pipe_srcsz_early_tpt =	3054	crtc_state->pipe_srcsz_early_tpt =
3014	psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);	3055	psr2_pipe_srcsz_early_tpt_calc(crtc_state, full_update);

drivers/gpu/drm/i915/display/intel_vdsc.c+23−0

@@ -767,6 +767,29 @@ void intel_dsc_dp_pps_write(struct intel_encoder *encoder, · 766 unmodified lines
767	sizeof(dp_dsc_pps_sdp));	767	sizeof(dp_dsc_pps_sdp));
768	}	768	}
769		769
		770	void intel_dsc_su_et_parameters_configure(struct intel_dsb dsb, struct intel_encoder encoder,
		771	const struct intel_crtc_state *crtc_state, int su_lines)
		772	{
		773	struct intel_display *display = to_intel_display(crtc_state);
		774	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
		775	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
		776	enum pipe pipe = crtc->pipe;
		777	int vdsc_instances_per_pipe = intel_dsc_get_vdsc_per_pipe(crtc_state);
		778	int slice_row_per_frame = su_lines / vdsc_cfg->slice_height;
		779	u32 val;
		780
		781	drm_WARN_ON_ONCE(display->drm, su_lines % vdsc_cfg->slice_height);
		782	drm_WARN_ON_ONCE(display->drm, vdsc_instances_per_pipe > 2);
		783
		784	val = DSC_SUPS0_SU_SLICE_ROW_PER_FRAME(slice_row_per_frame);
		785	val \|= DSC_SUPS0_SU_PIC_HEIGHT(su_lines);
		786
		787	intel_de_write_dsb(display, dsb, LNL_DSC0_SU_PARAMETER_SET_0(pipe), val);
		788
		789	if (vdsc_instances_per_pipe == 2)
		790	intel_de_write_dsb(display, dsb, LNL_DSC1_SU_PARAMETER_SET_0(pipe), val);
		791	}
		792
770	static i915_reg_t dss_ctl1_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)	793	static i915_reg_t dss_ctl1_reg(struct intel_crtc *crtc, enum transcoder cpu_transcoder)
771	{	794	{
772	return is_pipe_dsc(crtc, cpu_transcoder) ?	795	return is_pipe_dsc(crtc, cpu_transcoder) ?

drivers/gpu/drm/i915/display/intel_vdsc.h+3−0

 enum transcoder;
 struct intel_crtc;
 struct intel_crtc_state;
+struct intel_dsb;
 struct intel_encoder;
 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
 			     const struct intel_crtc_state *crtc_state);
 void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
 			    const struct intel_crtc_state *crtc_state);
+void intel_dsc_su_et_parameters_configure(struct intel_dsb *dsb, struct intel_encoder *encoder,
+					  const struct intel_crtc_state *crtc_state, int su_lines);
 void intel_vdsc_state_dump(struct drm_printer *p, int indent,
 			   const struct intel_crtc_state *crtc_state);
 int intel_vdsc_min_cdclk(const struct intel_crtc_state *crtc_state);

drivers/gpu/drm/i915/display/intel_vdsc_regs.h+12−0

@@ -196,6 +196,18 @@ · 195 unmodified lines
196	#define DSC_PPS18_NSL_BPG_OFFSET(offset) REG_FIELD_PREP(DSC_PPS18_NSL_BPG_OFFSET_MASK, offset)	196	#define DSC_PPS18_NSL_BPG_OFFSET(offset) REG_FIELD_PREP(DSC_PPS18_NSL_BPG_OFFSET_MASK, offset)
197	#define DSC_PPS18_SL_OFFSET_ADJ(offset) REG_FIELD_PREP(DSC_PPS18_SL_OFFSET_ADJ_MASK, offset)	197	#define DSC_PPS18_SL_OFFSET_ADJ(offset) REG_FIELD_PREP(DSC_PPS18_SL_OFFSET_ADJ_MASK, offset)
198		198
		199	#define _LNL_DSC0_SU_PARAMETER_SET_0_PA 0x78064
		200	#define _LNL_DSC1_SU_PARAMETER_SET_0_PA 0x78164
		201	#define _LNL_DSC0_SU_PARAMETER_SET_0_PB 0x78264
		202	#define _LNL_DSC1_SU_PARAMETER_SET_0_PB 0x78364
		203	#define LNL_DSC0_SU_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe), _LNL_DSC0_SU_PARAMETER_SET_0_PA, _LNL_DSC0_SU_PARAMETER_SET_0_PB)
		204	#define LNL_DSC1_SU_PARAMETER_SET_0(pipe) _MMIO_PIPE((pipe), _LNL_DSC1_SU_PARAMETER_SET_0_PA, _LNL_DSC1_SU_PARAMETER_SET_0_PB)
		205
		206	#define DSC_SUPS0_SU_SLICE_ROW_PER_FRAME_MASK REG_GENMASK(31, 20)
		207	#define DSC_SUPS0_SU_SLICE_ROW_PER_FRAME(rows) REG_FIELD_PREP(DSC_SUPS0_SU_SLICE_ROW_PER_FRAME_MASK, (rows))
		208	#define DSC_SUPS0_SU_PIC_HEIGHT_MASK REG_GENMASK(15, 0)
		209	#define DSC_SUPS0_SU_PIC_HEIGHT(h) REG_FIELD_PREP(DSC_SUPS0_SU_PIC_HEIGHT_MASK, (h))
		210
199	/* Icelake Rate Control Buffer Threshold Registers */	211	/* Icelake Rate Control Buffer Threshold Registers */
200	#define DSCA_RC_BUF_THRESH_0 _MMIO(0x6B230)	212	#define DSCA_RC_BUF_THRESH_0 _MMIO(0x6B230)
201	#define DSCA_RC_BUF_THRESH_0_UDW _MMIO(0x6B230 + 4)	213	#define DSCA_RC_BUF_THRESH_0_UDW _MMIO(0x6B230 + 4)

drivers/gpu/drm/i915/display/intel_vrr.c+14−0

@@ -597,6 +597,18 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) · 596 unmodified lines
597	if (!HAS_VRR(display))	597	if (!HAS_VRR(display))
598	return;	598	return;
599		599
		600	/*
		601	* Bspec says:
		602	* "(note: VRR needs to be programmed after
		603	* TRANS_DDI_FUNC_CTL and before TRANS_CONF)."
		604	*
		605	* In practice it turns out that ICL can hang if
		606	* TRANS_VRR_VMAX/FLIPLINE are written before
		607	* enabling TRANS_DDI_FUNC_CTL.
		608	*/
		609	drm_WARN_ON(display->drm,
		610	!(intel_de_read(display, TRANS_DDI_FUNC_CTL(display, cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE));
		611
600	/*	612	/*
601	* This bit seems to have two meanings depending on the platform:	613	* This bit seems to have two meanings depending on the platform:
602	* TGL: generate VRR "safe window" for DSB vblank waits	614	* TGL: generate VRR "safe window" for DSB vblank waits
@@ -939,6 +951,8 @@ void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state) · 336 unmodified lines
939	{	951	{
940	struct intel_display *display = to_intel_display(crtc_state);	952	struct intel_display *display = to_intel_display(crtc_state);
941		953
		954	intel_vrr_set_transcoder_timings(crtc_state);
		955
942	if (!intel_vrr_possible(crtc_state))	956	if (!intel_vrr_possible(crtc_state))
943	return;	957	return;
944		958

drivers/gpu/drm/i915/gem/i915_gem_shmem.c+9−3

 			}
 		} while (1);
-		nr_pages = min_t(unsigned long,
+		nr_pages = min_array(((unsigned long[]) {
-				folio_nr_pages(folio), page_count - i);
+					folio_nr_pages(folio),
+					page_count - i,
+					max_segment / PAGE_SIZE,
+				      }), 3);
 		if (!i ||
 		    sg->length >= max_segment ||
 		    folio_pfn(folio) != next_pfn) {
 			st->nents++;
 			sg_set_folio(sg, folio, nr_pages * PAGE_SIZE, 0);
 		} else {
-			/* XXX: could overflow? */
+			nr_pages = min_t(unsigned long, nr_pages,
+					 (max_segment - sg->length) / PAGE_SIZE);
 			sg->length += nr_pages * PAGE_SIZE;
 		}
 		next_pfn = folio_pfn(folio) + nr_pages;

drivers/gpu/drm/imx/ipuv3/parallel-display.c+3−1

@@ -256,7 +256,9 @@ static int imx_pd_probe(struct platform_device *pdev) · 255 unmodified lines
256		256
257	platform_set_drvdata(pdev, imxpd);	257	platform_set_drvdata(pdev, imxpd);
258		258
259	devm_drm_bridge_add(dev, &imxpd->bridge);	259	ret = devm_drm_bridge_add(dev, &imxpd->bridge);
		260	if (ret)
		261	return ret;
260		262
261	return component_add(dev, &imx_pd_ops);	263	return component_add(dev, &imx_pd_ops);
262	}	264	}

drivers/gpu/drm/logicvc/logicvc_drm.c+2−2

 	struct device *dev = drm_dev->dev;
 	struct device_node *of_node = dev->of_node;
 	struct logicvc_drm_config *config = &logicvc->config;
-	struct device_node *layers_node;
 	int ret;
 	logicvc_of_property_parse_bool(of_node, LOGICVC_OF_PROPERTY_DITHERING,
 	if (ret)
 		return ret;
-	layers_node = of_get_child_by_name(of_node, "layers");
+	struct device_node *layers_node __free(device_node) =
+		of_get_child_by_name(of_node, "layers");
 	if (!layers_node) {
 		drm_err(drm_dev, "Missing non-optional layers node\n");
 		return -EINVAL;

drivers/gpu/drm/msm/adreno/a2xx_gpummu.c+1−1

@@ -78,7 +78,7 @@ static void a2xx_gpummu_destroy(struct msm_mmu *mmu) · 77 unmodified lines
78	{	78	{
79	struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);	79	struct a2xx_gpummu *gpummu = to_a2xx_gpummu(mmu);
80		80
81	dma_free_attrs(mmu->dev, TABLE_SIZE, gpummu->table, gpummu->pt_base,	81	dma_free_attrs(mmu->dev, TABLE_SIZE + 32, gpummu->table, gpummu->pt_base,
82	DMA_ATTR_FORCE_CONTIGUOUS);	82	DMA_ATTR_FORCE_CONTIGUOUS);
83		83
84	kfree(gpummu);	84	kfree(gpummu);

drivers/gpu/drm/msm/adreno/a6xx_catalog.c+1−2

 	A6XX_PROTECT_NORDWR(0x27c06, 0x0000),
 };
-DECLARE_ADRENO_PROTECT(x285_protect, 64);
+DECLARE_ADRENO_PROTECT(x285_protect, 15);
 static const struct adreno_reglist_pipe a840_nonctxt_regs[] = {
 	{ REG_A8XX_CP_SMMU_STREAM_ID_LPAC, 0x00000101, BIT(PIPE_NONE) },
 	BUILD_BUG_ON(a660_protect.count > a660_protect.count_max);
 	BUILD_BUG_ON(a690_protect.count > a690_protect.count_max);
 	BUILD_BUG_ON(a730_protect.count > a730_protect.count_max);
-	BUILD_BUG_ON(a840_protect.count > a840_protect.count_max);
 }

drivers/gpu/drm/msm/adreno/a8xx_gpu.c+12−2

@@ -310,11 +310,21 @@ static void a8xx_set_ubwc_config(struct msm_gpu *gpu) · 309 unmodified lines
310	hbb = cfg->highest_bank_bit - 13;	310	hbb = cfg->highest_bank_bit - 13;
311	hbb_hi = hbb >> 2;	311	hbb_hi = hbb >> 2;
312	hbb_lo = hbb & 3;	312	hbb_lo = hbb & 3;
313	a8xx_write_pipe(gpu, PIPE_BV, REG_A8XX_GRAS_NC_MODE_CNTL, hbb << 5);	313
314	a8xx_write_pipe(gpu, PIPE_BR, REG_A8XX_GRAS_NC_MODE_CNTL, hbb << 5);	314	a8xx_write_pipe(gpu, PIPE_BV, REG_A8XX_GRAS_NC_MODE_CNTL,
		315	hbb << 5 \|
		316	level3_swizzling_dis << 4 \|
		317	level2_swizzling_dis << 3);
		318
		319	a8xx_write_pipe(gpu, PIPE_BR, REG_A8XX_GRAS_NC_MODE_CNTL,
		320	hbb << 5 \|
		321	level3_swizzling_dis << 4 \|
		322	level2_swizzling_dis << 3);
315		323
316	a8xx_write_pipe(gpu, PIPE_BR, REG_A8XX_RB_CCU_NC_MODE_CNTL,	324	a8xx_write_pipe(gpu, PIPE_BR, REG_A8XX_RB_CCU_NC_MODE_CNTL,
317	yuvnotcomptofc << 6 \|	325	yuvnotcomptofc << 6 \|
		326	level3_swizzling_dis << 5 \|
		327	level2_swizzling_dis << 4 \|
318	hbb_hi << 3 \|	328	hbb_hi << 3 \|
319	hbb_lo << 1);	329	hbb_lo << 1);
320		330

drivers/gpu/drm/msm/adreno/adreno_device.c+1−0

@@ -302,6 +302,7 @@ static const struct of_device_id dt_match[] = { · 301 unmodified lines
302	{ .compatible = "qcom,kgsl-3d0" },	302	{ .compatible = "qcom,kgsl-3d0" },
303	{}	303	{}
304	};	304	};
		305	MODULE_DEVICE_TABLE(of, dt_match);
305		306
306	static int adreno_runtime_resume(struct device *dev)	307	static int adreno_runtime_resume(struct device *dev)
307	{	308	{

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h+6−6

@@ -133,7 +133,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = { · 132 unmodified lines
133	static const struct dpu_lm_cfg sc8280xp_lm[] = {	133	static const struct dpu_lm_cfg sc8280xp_lm[] = {
134	{	134	{
135	.name = "lm_0", .id = LM_0,	135	.name = "lm_0", .id = LM_0,
136	.base = 0x44000, .len = 0x320,	136	.base = 0x44000, .len = 0x400,
137	.features = MIXER_MSM8998_MASK,	137	.features = MIXER_MSM8998_MASK,
138	.sblk = &sdm845_lm_sblk,	138	.sblk = &sdm845_lm_sblk,
139	.lm_pair = LM_1,	139	.lm_pair = LM_1,
@@ -141,7 +141,7 @@ static const struct dpu_lm_cfg sc8280xp_lm[] = { · 1 unmodified line
141	.dspp = DSPP_0,	141	.dspp = DSPP_0,
142	}, {	142	}, {
143	.name = "lm_1", .id = LM_1,	143	.name = "lm_1", .id = LM_1,
144	.base = 0x45000, .len = 0x320,	144	.base = 0x45000, .len = 0x400,
145	.features = MIXER_MSM8998_MASK,	145	.features = MIXER_MSM8998_MASK,
146	.sblk = &sdm845_lm_sblk,	146	.sblk = &sdm845_lm_sblk,
147	.lm_pair = LM_0,	147	.lm_pair = LM_0,
@@ -149,7 +149,7 @@ static const struct dpu_lm_cfg sc8280xp_lm[] = { · 1 unmodified line
149	.dspp = DSPP_1,	149	.dspp = DSPP_1,
150	}, {	150	}, {
151	.name = "lm_2", .id = LM_2,	151	.name = "lm_2", .id = LM_2,
152	.base = 0x46000, .len = 0x320,	152	.base = 0x46000, .len = 0x400,
153	.features = MIXER_MSM8998_MASK,	153	.features = MIXER_MSM8998_MASK,
154	.sblk = &sdm845_lm_sblk,	154	.sblk = &sdm845_lm_sblk,
155	.lm_pair = LM_3,	155	.lm_pair = LM_3,
@@ -157,7 +157,7 @@ static const struct dpu_lm_cfg sc8280xp_lm[] = { · 1 unmodified line
157	.dspp = DSPP_2,	157	.dspp = DSPP_2,
158	}, {	158	}, {
159	.name = "lm_3", .id = LM_3,	159	.name = "lm_3", .id = LM_3,
160	.base = 0x47000, .len = 0x320,	160	.base = 0x47000, .len = 0x400,
161	.features = MIXER_MSM8998_MASK,	161	.features = MIXER_MSM8998_MASK,
162	.sblk = &sdm845_lm_sblk,	162	.sblk = &sdm845_lm_sblk,
163	.lm_pair = LM_2,	163	.lm_pair = LM_2,
@@ -165,14 +165,14 @@ static const struct dpu_lm_cfg sc8280xp_lm[] = { · 1 unmodified line
165	.dspp = DSPP_3,	165	.dspp = DSPP_3,
166	}, {	166	}, {
167	.name = "lm_4", .id = LM_4,	167	.name = "lm_4", .id = LM_4,
168	.base = 0x48000, .len = 0x320,	168	.base = 0x48000, .len = 0x400,
169	.features = MIXER_MSM8998_MASK,	169	.features = MIXER_MSM8998_MASK,
170	.sblk = &sdm845_lm_sblk,	170	.sblk = &sdm845_lm_sblk,
171	.lm_pair = LM_5,	171	.lm_pair = LM_5,
172	.pingpong = PINGPONG_4,	172	.pingpong = PINGPONG_4,
173	}, {	173	}, {
174	.name = "lm_5", .id = LM_5,	174	.name = "lm_5", .id = LM_5,
175	.base = 0x49000, .len = 0x320,	175	.base = 0x49000, .len = 0x400,
176	.features = MIXER_MSM8998_MASK,	176	.features = MIXER_MSM8998_MASK,
177	.sblk = &sdm845_lm_sblk,	177	.sblk = &sdm845_lm_sblk,
178	.lm_pair = LM_4,	178	.lm_pair = LM_4,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h+6−6

@@ -134,7 +134,7 @@ static const struct dpu_sspp_cfg sm8450_sspp[] = { · 133 unmodified lines
134	static const struct dpu_lm_cfg sm8450_lm[] = {	134	static const struct dpu_lm_cfg sm8450_lm[] = {
135	{	135	{
136	.name = "lm_0", .id = LM_0,	136	.name = "lm_0", .id = LM_0,
137	.base = 0x44000, .len = 0x320,	137	.base = 0x44000, .len = 0x400,
138	.features = MIXER_MSM8998_MASK,	138	.features = MIXER_MSM8998_MASK,
139	.sblk = &sdm845_lm_sblk,	139	.sblk = &sdm845_lm_sblk,
140	.lm_pair = LM_1,	140	.lm_pair = LM_1,
@@ -142,7 +142,7 @@ static const struct dpu_lm_cfg sm8450_lm[] = { · 1 unmodified line
142	.dspp = DSPP_0,	142	.dspp = DSPP_0,
143	}, {	143	}, {
144	.name = "lm_1", .id = LM_1,	144	.name = "lm_1", .id = LM_1,
145	.base = 0x45000, .len = 0x320,	145	.base = 0x45000, .len = 0x400,
146	.features = MIXER_MSM8998_MASK,	146	.features = MIXER_MSM8998_MASK,
147	.sblk = &sdm845_lm_sblk,	147	.sblk = &sdm845_lm_sblk,
148	.lm_pair = LM_0,	148	.lm_pair = LM_0,
@@ -150,7 +150,7 @@ static const struct dpu_lm_cfg sm8450_lm[] = { · 1 unmodified line
150	.dspp = DSPP_1,	150	.dspp = DSPP_1,
151	}, {	151	}, {
152	.name = "lm_2", .id = LM_2,	152	.name = "lm_2", .id = LM_2,
153	.base = 0x46000, .len = 0x320,	153	.base = 0x46000, .len = 0x400,
154	.features = MIXER_MSM8998_MASK,	154	.features = MIXER_MSM8998_MASK,
155	.sblk = &sdm845_lm_sblk,	155	.sblk = &sdm845_lm_sblk,
156	.lm_pair = LM_3,	156	.lm_pair = LM_3,
@@ -158,7 +158,7 @@ static const struct dpu_lm_cfg sm8450_lm[] = { · 1 unmodified line
158	.dspp = DSPP_2,	158	.dspp = DSPP_2,
159	}, {	159	}, {
160	.name = "lm_3", .id = LM_3,	160	.name = "lm_3", .id = LM_3,
161	.base = 0x47000, .len = 0x320,	161	.base = 0x47000, .len = 0x400,
162	.features = MIXER_MSM8998_MASK,	162	.features = MIXER_MSM8998_MASK,
163	.sblk = &sdm845_lm_sblk,	163	.sblk = &sdm845_lm_sblk,
164	.lm_pair = LM_2,	164	.lm_pair = LM_2,
@@ -166,14 +166,14 @@ static const struct dpu_lm_cfg sm8450_lm[] = { · 1 unmodified line
166	.dspp = DSPP_3,	166	.dspp = DSPP_3,
167	}, {	167	}, {
168	.name = "lm_4", .id = LM_4,	168	.name = "lm_4", .id = LM_4,
169	.base = 0x48000, .len = 0x320,	169	.base = 0x48000, .len = 0x400,
170	.features = MIXER_MSM8998_MASK,	170	.features = MIXER_MSM8998_MASK,
171	.sblk = &sdm845_lm_sblk,	171	.sblk = &sdm845_lm_sblk,
172	.lm_pair = LM_5,	172	.lm_pair = LM_5,
173	.pingpong = PINGPONG_4,	173	.pingpong = PINGPONG_4,
174	}, {	174	}, {
175	.name = "lm_5", .id = LM_5,	175	.name = "lm_5", .id = LM_5,
176	.base = 0x49000, .len = 0x320,	176	.base = 0x49000, .len = 0x400,
177	.features = MIXER_MSM8998_MASK,	177	.features = MIXER_MSM8998_MASK,
178	.sblk = &sdm845_lm_sblk,	178	.sblk = &sdm845_lm_sblk,
179	.lm_pair = LM_4,	179	.lm_pair = LM_4,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h+2−2

@@ -366,8 +366,8 @@ static const struct dpu_intf_cfg sa8775p_intf[] = { · 365 unmodified lines
366	.type = INTF_NONE,	366	.type = INTF_NONE,
367	.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */	367	.controller_id = MSM_DP_CONTROLLER_0, /* pair with intf_0 for DP MST */
368	.prog_fetch_lines_worst_case = 24,	368	.prog_fetch_lines_worst_case = 24,
369	.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17),	369	.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16),
370	.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16),	370	.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17),
371	}, {	371	}, {
372	.name = "intf_7", .id = INTF_7,	372	.name = "intf_7", .id = INTF_7,
373	.base = 0x3b000, .len = 0x280,	373	.base = 0x3b000, .len = 0x280,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h+6−6

@@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sm8550_sspp[] = { · 130 unmodified lines
131	static const struct dpu_lm_cfg sm8550_lm[] = {	131	static const struct dpu_lm_cfg sm8550_lm[] = {
132	{	132	{
133	.name = "lm_0", .id = LM_0,	133	.name = "lm_0", .id = LM_0,
134	.base = 0x44000, .len = 0x320,	134	.base = 0x44000, .len = 0x400,
135	.features = MIXER_MSM8998_MASK,	135	.features = MIXER_MSM8998_MASK,
136	.sblk = &sdm845_lm_sblk,	136	.sblk = &sdm845_lm_sblk,
137	.lm_pair = LM_1,	137	.lm_pair = LM_1,
@@ -139,7 +139,7 @@ static const struct dpu_lm_cfg sm8550_lm[] = { · 1 unmodified line
139	.dspp = DSPP_0,	139	.dspp = DSPP_0,
140	}, {	140	}, {
141	.name = "lm_1", .id = LM_1,	141	.name = "lm_1", .id = LM_1,
142	.base = 0x45000, .len = 0x320,	142	.base = 0x45000, .len = 0x400,
143	.features = MIXER_MSM8998_MASK,	143	.features = MIXER_MSM8998_MASK,
144	.sblk = &sdm845_lm_sblk,	144	.sblk = &sdm845_lm_sblk,
145	.lm_pair = LM_0,	145	.lm_pair = LM_0,
@@ -147,7 +147,7 @@ static const struct dpu_lm_cfg sm8550_lm[] = { · 1 unmodified line
147	.dspp = DSPP_1,	147	.dspp = DSPP_1,
148	}, {	148	}, {
149	.name = "lm_2", .id = LM_2,	149	.name = "lm_2", .id = LM_2,
150	.base = 0x46000, .len = 0x320,	150	.base = 0x46000, .len = 0x400,
151	.features = MIXER_MSM8998_MASK,	151	.features = MIXER_MSM8998_MASK,
152	.sblk = &sdm845_lm_sblk,	152	.sblk = &sdm845_lm_sblk,
153	.lm_pair = LM_3,	153	.lm_pair = LM_3,
@@ -155,7 +155,7 @@ static const struct dpu_lm_cfg sm8550_lm[] = { · 1 unmodified line
155	.dspp = DSPP_2,	155	.dspp = DSPP_2,
156	}, {	156	}, {
157	.name = "lm_3", .id = LM_3,	157	.name = "lm_3", .id = LM_3,
158	.base = 0x47000, .len = 0x320,	158	.base = 0x47000, .len = 0x400,
159	.features = MIXER_MSM8998_MASK,	159	.features = MIXER_MSM8998_MASK,
160	.sblk = &sdm845_lm_sblk,	160	.sblk = &sdm845_lm_sblk,
161	.lm_pair = LM_2,	161	.lm_pair = LM_2,
@@ -163,14 +163,14 @@ static const struct dpu_lm_cfg sm8550_lm[] = { · 1 unmodified line
163	.dspp = DSPP_3,	163	.dspp = DSPP_3,
164	}, {	164	}, {
165	.name = "lm_4", .id = LM_4,	165	.name = "lm_4", .id = LM_4,
166	.base = 0x48000, .len = 0x320,	166	.base = 0x48000, .len = 0x400,
167	.features = MIXER_MSM8998_MASK,	167	.features = MIXER_MSM8998_MASK,
168	.sblk = &sdm845_lm_sblk,	168	.sblk = &sdm845_lm_sblk,
169	.lm_pair = LM_5,	169	.lm_pair = LM_5,
170	.pingpong = PINGPONG_4,	170	.pingpong = PINGPONG_4,
171	}, {	171	}, {
172	.name = "lm_5", .id = LM_5,	172	.name = "lm_5", .id = LM_5,
173	.base = 0x49000, .len = 0x320,	173	.base = 0x49000, .len = 0x400,
174	.features = MIXER_MSM8998_MASK,	174	.features = MIXER_MSM8998_MASK,
175	.sblk = &sdm845_lm_sblk,	175	.sblk = &sdm845_lm_sblk,
176	.lm_pair = LM_4,	176	.lm_pair = LM_4,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h+6−6

@@ -131,7 +131,7 @@ static const struct dpu_sspp_cfg sar2130p_sspp[] = { · 130 unmodified lines
131	static const struct dpu_lm_cfg sar2130p_lm[] = {	131	static const struct dpu_lm_cfg sar2130p_lm[] = {
132	{	132	{
133	.name = "lm_0", .id = LM_0,	133	.name = "lm_0", .id = LM_0,
134	.base = 0x44000, .len = 0x320,	134	.base = 0x44000, .len = 0x400,
135	.features = MIXER_MSM8998_MASK,	135	.features = MIXER_MSM8998_MASK,
136	.sblk = &sdm845_lm_sblk,	136	.sblk = &sdm845_lm_sblk,
137	.lm_pair = LM_1,	137	.lm_pair = LM_1,
@@ -139,7 +139,7 @@ static const struct dpu_lm_cfg sar2130p_lm[] = { · 1 unmodified line
139	.dspp = DSPP_0,	139	.dspp = DSPP_0,
140	}, {	140	}, {
141	.name = "lm_1", .id = LM_1,	141	.name = "lm_1", .id = LM_1,
142	.base = 0x45000, .len = 0x320,	142	.base = 0x45000, .len = 0x400,
143	.features = MIXER_MSM8998_MASK,	143	.features = MIXER_MSM8998_MASK,
144	.sblk = &sdm845_lm_sblk,	144	.sblk = &sdm845_lm_sblk,
145	.lm_pair = LM_0,	145	.lm_pair = LM_0,
@@ -147,7 +147,7 @@ static const struct dpu_lm_cfg sar2130p_lm[] = { · 1 unmodified line
147	.dspp = DSPP_1,	147	.dspp = DSPP_1,
148	}, {	148	}, {
149	.name = "lm_2", .id = LM_2,	149	.name = "lm_2", .id = LM_2,
150	.base = 0x46000, .len = 0x320,	150	.base = 0x46000, .len = 0x400,
151	.features = MIXER_MSM8998_MASK,	151	.features = MIXER_MSM8998_MASK,
152	.sblk = &sdm845_lm_sblk,	152	.sblk = &sdm845_lm_sblk,
153	.lm_pair = LM_3,	153	.lm_pair = LM_3,
@@ -155,7 +155,7 @@ static const struct dpu_lm_cfg sar2130p_lm[] = { · 1 unmodified line
155	.dspp = DSPP_2,	155	.dspp = DSPP_2,
156	}, {	156	}, {
157	.name = "lm_3", .id = LM_3,	157	.name = "lm_3", .id = LM_3,
158	.base = 0x47000, .len = 0x320,	158	.base = 0x47000, .len = 0x400,
159	.features = MIXER_MSM8998_MASK,	159	.features = MIXER_MSM8998_MASK,
160	.sblk = &sdm845_lm_sblk,	160	.sblk = &sdm845_lm_sblk,
161	.lm_pair = LM_2,	161	.lm_pair = LM_2,
@@ -163,14 +163,14 @@ static const struct dpu_lm_cfg sar2130p_lm[] = { · 1 unmodified line
163	.dspp = DSPP_3,	163	.dspp = DSPP_3,
164	}, {	164	}, {
165	.name = "lm_4", .id = LM_4,	165	.name = "lm_4", .id = LM_4,
166	.base = 0x48000, .len = 0x320,	166	.base = 0x48000, .len = 0x400,
167	.features = MIXER_MSM8998_MASK,	167	.features = MIXER_MSM8998_MASK,
168	.sblk = &sdm845_lm_sblk,	168	.sblk = &sdm845_lm_sblk,
169	.lm_pair = LM_5,	169	.lm_pair = LM_5,
170	.pingpong = PINGPONG_4,	170	.pingpong = PINGPONG_4,
171	}, {	171	}, {
172	.name = "lm_5", .id = LM_5,	172	.name = "lm_5", .id = LM_5,
173	.base = 0x49000, .len = 0x320,	173	.base = 0x49000, .len = 0x400,
174	.features = MIXER_MSM8998_MASK,	174	.features = MIXER_MSM8998_MASK,
175	.sblk = &sdm845_lm_sblk,	175	.sblk = &sdm845_lm_sblk,
176	.lm_pair = LM_4,	176	.lm_pair = LM_4,

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h+6−6

@@ -130,7 +130,7 @@ static const struct dpu_sspp_cfg x1e80100_sspp[] = { · 129 unmodified lines
130	static const struct dpu_lm_cfg x1e80100_lm[] = {	130	static const struct dpu_lm_cfg x1e80100_lm[] = {
131	{	131	{
132	.name = "lm_0", .id = LM_0,	132	.name = "lm_0", .id = LM_0,
133	.base = 0x44000, .len = 0x320,	133	.base = 0x44000, .len = 0x400,
134	.features = MIXER_MSM8998_MASK,	134	.features = MIXER_MSM8998_MASK,
135	.sblk = &sdm845_lm_sblk,	135	.sblk = &sdm845_lm_sblk,
136	.lm_pair = LM_1,	136	.lm_pair = LM_1,
@@ -138,7 +138,7 @@ static const struct dpu_lm_cfg x1e80100_lm[] = { · 1 unmodified line
138	.dspp = DSPP_0,	138	.dspp = DSPP_0,
139	}, {	139	}, {
140	.name = "lm_1", .id = LM_1,	140	.name = "lm_1", .id = LM_1,
141	.base = 0x45000, .len = 0x320,	141	.base = 0x45000, .len = 0x400,
142	.features = MIXER_MSM8998_MASK,	142	.features = MIXER_MSM8998_MASK,
143	.sblk = &sdm845_lm_sblk,	143	.sblk = &sdm845_lm_sblk,
144	.lm_pair = LM_0,	144	.lm_pair = LM_0,
@@ -146,7 +146,7 @@ static const struct dpu_lm_cfg x1e80100_lm[] = { · 1 unmodified line
146	.dspp = DSPP_1,	146	.dspp = DSPP_1,
147	}, {	147	}, {
148	.name = "lm_2", .id = LM_2,	148	.name = "lm_2", .id = LM_2,
149	.base = 0x46000, .len = 0x320,	149	.base = 0x46000, .len = 0x400,
150	.features = MIXER_MSM8998_MASK,	150	.features = MIXER_MSM8998_MASK,
151	.sblk = &sdm845_lm_sblk,	151	.sblk = &sdm845_lm_sblk,
152	.lm_pair = LM_3,	152	.lm_pair = LM_3,
@@ -154,7 +154,7 @@ static const struct dpu_lm_cfg x1e80100_lm[] = { · 1 unmodified line
154	.dspp = DSPP_2,	154	.dspp = DSPP_2,
155	}, {	155	}, {
156	.name = "lm_3", .id = LM_3,	156	.name = "lm_3", .id = LM_3,
157	.base = 0x47000, .len = 0x320,	157	.base = 0x47000, .len = 0x400,
158	.features = MIXER_MSM8998_MASK,	158	.features = MIXER_MSM8998_MASK,
159	.sblk = &sdm845_lm_sblk,	159	.sblk = &sdm845_lm_sblk,
160	.lm_pair = LM_2,	160	.lm_pair = LM_2,
@@ -162,14 +162,14 @@ static const struct dpu_lm_cfg x1e80100_lm[] = { · 1 unmodified line
162	.dspp = DSPP_3,	162	.dspp = DSPP_3,
163	}, {	163	}, {
164	.name = "lm_4", .id = LM_4,	164	.name = "lm_4", .id = LM_4,
165	.base = 0x48000, .len = 0x320,	165	.base = 0x48000, .len = 0x400,
166	.features = MIXER_MSM8998_MASK,	166	.features = MIXER_MSM8998_MASK,
167	.sblk = &sdm845_lm_sblk,	167	.sblk = &sdm845_lm_sblk,
168	.lm_pair = LM_5,	168	.lm_pair = LM_5,
169	.pingpong = PINGPONG_4,	169	.pingpong = PINGPONG_4,
170	}, {	170	}, {
171	.name = "lm_5", .id = LM_5,	171	.name = "lm_5", .id = LM_5,
172	.base = 0x49000, .len = 0x320,	172	.base = 0x49000, .len = 0x400,
173	.features = MIXER_MSM8998_MASK,	173	.features = MIXER_MSM8998_MASK,
174	.sblk = &sdm845_lm_sblk,	174	.sblk = &sdm845_lm_sblk,
175	.lm_pair = LM_4,	175	.lm_pair = LM_4,

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.c+1−1

@@ -89,7 +89,7 @@ static void dpu_setup_dspp_gc(struct dpu_hw_dspp *ctx, · 88 unmodified lines
89	base = ctx->cap->sblk->gc.base;	89	base = ctx->cap->sblk->gc.base;
90		90
91	if (!base) {	91	if (!base) {
92	DRM_ERROR("invalid ctx %pK gc base\n", ctx);	92	DRM_ERROR("invalid ctx %p gc base\n", ctx);
93	return;	93	return;
94	}	94	}
95		95

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp_v13.c+3−1

 	u8 color;
 	u32 lr_pe[4], tb_pe[4];
 	const u32 bytemask = 0xff;
-	u32 offset = ctx->cap->sblk->sspp_rec0_blk.base;
+	u32 offset;
 	if (!ctx || !pe_ext)
 		return;
+	offset = ctx->cap->sblk->sspp_rec0_blk.base;
 	c = &ctx->hw;
 	/* program SW pixel extension override for all pipes*/
 	for (color = 0; color < DPU_MAX_PLANES; color++) {

drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c+14−38

 	return true;
 }
-static bool dpu_rm_find_lms(struct dpu_rm *rm,
+static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
-			    struct dpu_global_state *global_state,
+			       struct dpu_global_state *global_state,
-			    uint32_t crtc_id, bool skip_dspp,
+			       uint32_t crtc_id,
-			    struct msm_display_topology *topology,
+			       struct msm_display_topology *topology)
-			    int *lm_idx, int *pp_idx, int *dspp_idx)
 {
+	int lm_idx[MAX_BLOCKS];
+	int pp_idx[MAX_BLOCKS];
+	int dspp_idx[MAX_BLOCKS] = {0};
 	int i, lm_count = 0;
+	if (!topology->num_lm) {
+		DPU_ERROR("zero LMs in topology\n");
+		return -EINVAL;
+	}
 	/* Find a primary mixer */
 	for (i = 0; i < ARRAY_SIZE(rm->mixer_blks) &&
 			lm_count < topology->num_lm; i++) {
 		if (!rm->mixer_blks[i])
 			continue;
-		if (skip_dspp && to_dpu_hw_mixer(rm->mixer_blks[i])->cap->dspp) {
-			DPU_DEBUG("Skipping LM_%d, skipping LMs with DSPPs\n", i);
-			continue;
-		}
 		/*
 		 * Reset lm_count to an even index. This will drop the previous
 		 * primary mixer if failed to find its peer.
 		}
 	}
-	return lm_count == topology->num_lm;
+	if (lm_count != topology->num_lm) {
-}
-static int _dpu_rm_reserve_lms(struct dpu_rm *rm,
-			       struct dpu_global_state *global_state,
-			       uint32_t crtc_id,
-			       struct msm_display_topology *topology)
-{
-	int lm_idx[MAX_BLOCKS];
-	int pp_idx[MAX_BLOCKS];
-	int dspp_idx[MAX_BLOCKS] = {0};
-	int i;
-	bool found;
-	if (!topology->num_lm) {
-		DPU_ERROR("zero LMs in topology\n");
-		return -EINVAL;
-	}
-	/* Try using non-DSPP LM blocks first */
-	found = dpu_rm_find_lms(rm, global_state, crtc_id, !topology->num_dspp,
-				topology, lm_idx, pp_idx, dspp_idx);
-	if (!found && !topology->num_dspp)
-		found = dpu_rm_find_lms(rm, global_state, crtc_id, false,
-					topology, lm_idx, pp_idx, dspp_idx);
-	if (!found) {
 		DPU_DEBUG("unable to find appropriate mixers\n");
 		return -ENAVAIL;
 	}
-	for (i = 0; i < topology->num_lm; i++) {
+	for (i = 0; i < lm_count; i++) {
 		global_state->mixer_to_crtc_id[lm_idx[i]] = crtc_id;
 		global_state->pingpong_to_crtc_id[pp_idx[i]] = crtc_id;
 		global_state->dspp_to_crtc_id[dspp_idx[i]] =

drivers/gpu/drm/msm/dsi/dsi_host.c+31−12

  *  FIXME: Reconsider this if/when CMD mode handling is rewritten to use
  *  transfer time and data overhead as a starting point of the calculations.
  */
-static unsigned long dsi_adjust_pclk_for_compression(const struct drm_display_mode *mode,
+static unsigned long
-		const struct drm_dsc_config *dsc)
+dsi_adjust_pclk_for_compression(const struct drm_display_mode *mode,
+				const struct drm_dsc_config *dsc,
+				bool is_bonded_dsi)
 {
-	int new_hdisplay = DIV_ROUND_UP(mode->hdisplay * drm_dsc_get_bpp_int(dsc),
+	int hdisplay, new_hdisplay, new_htotal;
-			dsc->bits_per_component * 3);
-	int new_htotal = mode->htotal - mode->hdisplay + new_hdisplay;
+	/*
+	 * For bonded DSI, split hdisplay across two links and round up each
+	 * half separately, passing the full hdisplay would only round up once.
+	 * This also aligns with the hdisplay we program later in
+	 * dsi_timing_setup()
+	 */
+	hdisplay = mode->hdisplay;
+	if (is_bonded_dsi)
+		hdisplay /= 2;
+	new_hdisplay = DIV_ROUND_UP(hdisplay * drm_dsc_get_bpp_int(dsc),
+				    dsc->bits_per_component * 3);
+	if (is_bonded_dsi)
+		new_hdisplay *= 2;
+	new_htotal = mode->htotal - mode->hdisplay + new_hdisplay;
 	return mult_frac(mode->clock * 1000u, new_htotal, mode->htotal);
 }
 	pclk_rate = mode->clock * 1000u;
 	if (dsc)
-		pclk_rate = dsi_adjust_pclk_for_compression(mode, dsc);
+		pclk_rate = dsi_adjust_pclk_for_compression(mode, dsc, is_bonded_dsi);
 	/*
 	 * For bonded DSI mode, the current DRM mode has the complete width of the
 	if (msm_host->dsc) {
 		struct drm_dsc_config *dsc = msm_host->dsc;
-		u32 bytes_per_pclk;
+		u32 bits_per_pclk;
 		/* update dsc params with timing params */
 		if (!dsc || !mode->hdisplay || !mode->vdisplay) {
 		/*
 		 * DPU sends 3 bytes per pclk cycle to DSI. If widebus is
-		 * enabled, bus width is extended to 6 bytes.
+		 * enabled, MDP always sends out 48-bit compressed data per
+		 * pclk and on average, DSI consumes an amount of compressed
+		 * data equivalent to the uncompressed pixel depth per pclk.
 		 *
 		 * Calculate the number of pclks needed to transmit one line of
 		 * the compressed data.
 		 * unused anyway.
 		 */
 		h_total -= hdisplay;
-		if (wide_bus_enabled && !(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO))
+		if (wide_bus_enabled)
-			bytes_per_pclk = 6;
+			bits_per_pclk = mipi_dsi_pixel_format_to_bpp(msm_host->format);
 		else
-			bytes_per_pclk = 3;
+			bits_per_pclk = 24;
-		hdisplay = DIV_ROUND_UP(msm_dsc_get_bytes_per_line(msm_host->dsc), bytes_per_pclk);
+		hdisplay = DIV_ROUND_UP(msm_dsc_get_bytes_per_line(msm_host->dsc) * 8, bits_per_pclk);
 		h_total += hdisplay;
 		ha_end = ha_start + hdisplay;

drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c+11−11

@@ -51,8 +51,8 @@ · 50 unmodified lines
51	#define DSI_PHY_7NM_QUIRK_V4_3 BIT(3)	51	#define DSI_PHY_7NM_QUIRK_V4_3 BIT(3)
52	/* Hardware is V5.2 */	52	/* Hardware is V5.2 */
53	#define DSI_PHY_7NM_QUIRK_V5_2 BIT(4)	53	#define DSI_PHY_7NM_QUIRK_V5_2 BIT(4)
54	/* Hardware is V7.0 */	54	/* Hardware is V7.2 */
55	#define DSI_PHY_7NM_QUIRK_V7_0 BIT(5)	55	#define DSI_PHY_7NM_QUIRK_V7_2 BIT(5)
56		56
57	struct dsi_pll_config {	57	struct dsi_pll_config {
58	bool enable_ssc;	58	bool enable_ssc;
@@ -143,7 +143,7 @@ static void dsi_pll_calc_dec_frac(struct dsi_pll_7nm *pll, struct dsi_pll_config · 84 unmodified lines
143		143
144	if (pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_PRE_V4_1) {	144	if (pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_PRE_V4_1) {
145	config->pll_clock_inverters = 0x28;	145	config->pll_clock_inverters = 0x28;
146	} else if ((pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_0)) {	146	} else if ((pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_2)) {
147	if (pll_freq < 163000000ULL)	147	if (pll_freq < 163000000ULL)
148	config->pll_clock_inverters = 0xa0;	148	config->pll_clock_inverters = 0xa0;
149	else if (pll_freq < 175000000ULL)	149	else if (pll_freq < 175000000ULL)
@@ -284,7 +284,7 @@ static void dsi_pll_config_hzindep_reg(struct dsi_pll_7nm *pll) · 134 unmodified lines
284	}	284	}
285		285
286	if ((pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2) \|\|	286	if ((pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2) \|\|
287	(pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_0)) {	287	(pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_2)) {
288	if (pll->vco_current_rate < 1557000000ULL)	288	if (pll->vco_current_rate < 1557000000ULL)
289	vco_config_1 = 0x08;	289	vco_config_1 = 0x08;
290	else	290	else
@@ -699,7 +699,7 @@ static int dsi_7nm_set_usecase(struct msm_dsi_phy *phy) · 408 unmodified lines
699	case MSM_DSI_PHY_MASTER:	699	case MSM_DSI_PHY_MASTER:
700	pll_7nm->slave = pll_7nm_list[(pll_7nm->phy->id + 1) % DSI_MAX];	700	pll_7nm->slave = pll_7nm_list[(pll_7nm->phy->id + 1) % DSI_MAX];
701	/* v7.0: Enable ATB_EN0 and alternate clock output to external phy */	701	/* v7.0: Enable ATB_EN0 and alternate clock output to external phy */
702	if (phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_0)	702	if (phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_2)
703	writel(0x07, base + REG_DSI_7nm_PHY_CMN_CTRL_5);	703	writel(0x07, base + REG_DSI_7nm_PHY_CMN_CTRL_5);
704	break;	704	break;
705	case MSM_DSI_PHY_SLAVE:	705	case MSM_DSI_PHY_SLAVE:
@@ -987,7 +987,7 @@ static int dsi_7nm_phy_enable(struct msm_dsi_phy *phy, · 281 unmodified lines
987	/* Request for REFGEN READY */	987	/* Request for REFGEN READY */
988	if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V4_3) \|\|	988	if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V4_3) \|\|
989	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2) \|\|	989	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2) \|\|
990	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_0)) {	990	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_2)) {
991	writel(0x1, phy->base + REG_DSI_7nm_PHY_CMN_GLBL_DIGTOP_SPARE10);	991	writel(0x1, phy->base + REG_DSI_7nm_PHY_CMN_GLBL_DIGTOP_SPARE10);
992	udelay(500);	992	udelay(500);
993	}	993	}
@@ -1021,7 +1021,7 @@ static int dsi_7nm_phy_enable(struct msm_dsi_phy *phy, · 27 unmodified lines
1021	lane_ctrl0 = 0x1f;	1021	lane_ctrl0 = 0x1f;
1022	}	1022	}
1023		1023
1024	if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_0)) {	1024	if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_2)) {
1025	if (phy->cphy_mode) {	1025	if (phy->cphy_mode) {
1026	/* TODO: different for second phy */	1026	/* TODO: different for second phy */
1027	vreg_ctrl_0 = 0x57;	1027	vreg_ctrl_0 = 0x57;
@@ -1097,7 +1097,7 @@ static int dsi_7nm_phy_enable(struct msm_dsi_phy *phy, · 69 unmodified lines
1097		1097
1098	/* program CMN_CTRL_4 for minor_ver 2 chipsets*/	1098	/* program CMN_CTRL_4 for minor_ver 2 chipsets*/
1099	if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2) \|\|	1099	if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2) \|\|
1100	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_0) \|\|	1100	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_2) \|\|
1101	(readl(base + REG_DSI_7nm_PHY_CMN_REVISION_ID0) & (0xf0)) == 0x20)	1101	(readl(base + REG_DSI_7nm_PHY_CMN_REVISION_ID0) & (0xf0)) == 0x20)
1102	writel(0x04, base + REG_DSI_7nm_PHY_CMN_CTRL_4);	1102	writel(0x04, base + REG_DSI_7nm_PHY_CMN_CTRL_4);
1103		1103
@@ -1213,7 +1213,7 @@ static void dsi_7nm_phy_disable(struct msm_dsi_phy *phy) · 109 unmodified lines
1213	/* Turn off REFGEN Vote */	1213	/* Turn off REFGEN Vote */
1214	if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V4_3) \|\|	1214	if ((phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V4_3) \|\|
1215	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2) \|\|	1215	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V5_2) \|\|
1216	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_0)) {	1216	(phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V7_2)) {
1217	writel(0x0, base + REG_DSI_7nm_PHY_CMN_GLBL_DIGTOP_SPARE10);	1217	writel(0x0, base + REG_DSI_7nm_PHY_CMN_GLBL_DIGTOP_SPARE10);
1218	wmb();	1218	wmb();
1219	/* Delay to ensure HW removes vote before PHY shut down */	1219	/* Delay to ensure HW removes vote before PHY shut down */
@@ -1502,7 +1502,7 @@ const struct msm_dsi_phy_cfg dsi_phy_3nm_8750_cfgs = { · 282 unmodified lines
1502	#endif	1502	#endif
1503	.io_start = { 0xae95000, 0xae97000 },	1503	.io_start = { 0xae95000, 0xae97000 },
1504	.num_dsi_phy = 2,	1504	.num_dsi_phy = 2,
1505	.quirks = DSI_PHY_7NM_QUIRK_V7_0,	1505	.quirks = DSI_PHY_7NM_QUIRK_V7_2,
1506	};	1506	};
1507		1507
1508	const struct msm_dsi_phy_cfg dsi_phy_3nm_kaanapali_cfgs = {	1508	const struct msm_dsi_phy_cfg dsi_phy_3nm_kaanapali_cfgs = {
@@ -1525,5 +1525,5 @@ const struct msm_dsi_phy_cfg dsi_phy_3nm_kaanapali_cfgs = { · 16 unmodified lines
1525	#endif	1525	#endif
1526	.io_start = { 0x9ac1000, 0x9ac4000 },	1526	.io_start = { 0x9ac1000, 0x9ac4000 },
1527	.num_dsi_phy = 2,	1527	.num_dsi_phy = 2,
1528	.quirks = DSI_PHY_7NM_QUIRK_V7_0,	1528	.quirks = DSI_PHY_7NM_QUIRK_V7_2,
1529	};	1529	};

drivers/gpu/drm/nouveau/nouveau_connector.c+3−0

@@ -1230,6 +1230,9 @@ nouveau_connector_aux_xfer(struct drm_dp_aux obj, struct drm_dp_aux_msg msg) · 1229 unmodified lines
1230	u8 size = msg->size;	1230	u8 size = msg->size;
1231	int ret;	1231	int ret;
1232		1232
		1233	if (pm_runtime_suspended(nv_connector->base.dev->dev))
		1234	return -EBUSY;
		1235
1233	nv_encoder = find_encoder(&nv_connector->base, DCB_OUTPUT_DP);	1236	nv_encoder = find_encoder(&nv_connector->base, DCB_OUTPUT_DP);
1234	if (!nv_encoder)	1237	if (!nv_encoder)
1235	return -ENODEV;	1238	return -ENODEV;

drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/gsp.c+6−6

@@ -737,8 +737,8 @@ r535_gsp_acpi_caps(acpi_handle handle, CAPS_METHOD_DATA *caps) · 736 unmodified lines
737	if (!obj)	737	if (!obj)
738	goto done;	738	goto done;
739		739
740	if (WARN_ON(obj->type != ACPI_TYPE_BUFFER) \|\|	740	if (obj->type != ACPI_TYPE_BUFFER \|\|
741	WARN_ON(obj->buffer.length != 4))	741	obj->buffer.length != 4)
742	goto done;	742	goto done;
743		743
744	caps->status = 0;	744	caps->status = 0;
@@ -773,8 +773,8 @@ r535_gsp_acpi_jt(acpi_handle handle, JT_METHOD_DATA *jt) · 28 unmodified lines
773	if (!obj)	773	if (!obj)
774	goto done;	774	goto done;
775		775
776	if (WARN_ON(obj->type != ACPI_TYPE_BUFFER) \|\|	776	if (obj->type != ACPI_TYPE_BUFFER \|\|
777	WARN_ON(obj->buffer.length != 4))	777	obj->buffer.length != 4)
778	goto done;	778	goto done;
779		779
780	jt->status = 0;	780	jt->status = 0;
@@ -861,8 +861,8 @@ r535_gsp_acpi_dod(acpi_handle handle, DOD_METHOD_DATA *dod) · 80 unmodified lines
861		861
862	_DOD = output.pointer;	862	_DOD = output.pointer;
863		863
864	if (WARN_ON(_DOD->type != ACPI_TYPE_PACKAGE) \|\|	864	if (_DOD->type != ACPI_TYPE_PACKAGE \|\|
865	WARN_ON(_DOD->package.count > ARRAY_SIZE(dod->acpiIdList)))	865	_DOD->package.count > ARRAY_SIZE(dod->acpiIdList))
866	return;	866	return;
867		867
868	for (int i = 0; i < _DOD->package.count; i++) {	868	for (int i = 0; i < _DOD->package.count; i++) {

drivers/gpu/drm/panthor/panthor_sched.c+5−4

 out_sync:
 	/* Make sure the CPU caches are invalidated before the seqno is read.
-	 * drm_gem_shmem_sync() is a NOP if map_wc=true, so no need to check
+	 * panthor_gem_sync() is a NOP if map_wc=true, so no need to check
 	 * it here.
 	 */
-	panthor_gem_sync(&bo->base.base, queue->syncwait.offset,
+	panthor_gem_sync(&bo->base.base,
+			 DRM_PANTHOR_BO_SYNC_CPU_CACHE_FLUSH_AND_INVALIDATE,
+			 queue->syncwait.offset,
 			 queue->syncwait.sync64 ?
 			 sizeof(struct panthor_syncobj_64b) :
-			 sizeof(struct panthor_syncobj_32b),
+			 sizeof(struct panthor_syncobj_32b));
-			 DRM_PANTHOR_BO_SYNC_CPU_CACHE_FLUSH_AND_INVALIDATE);
 	return queue->syncwait.kmap + queue->syncwait.offset;

drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c+15−1

 				      struct mipi_dsi_device *device)
 {
 	struct rzg2l_mipi_dsi *dsi = host_to_rzg2l_mipi_dsi(host);
+	int bpp;
 	int ret;
 	if (device->lanes > dsi->num_data_lanes) {
 		return -EINVAL;
 	}
-	switch (mipi_dsi_pixel_format_to_bpp(device->format)) {
+	bpp = mipi_dsi_pixel_format_to_bpp(device->format);
+	switch (bpp) {
 	case 24:
 		break;
 	case 18:
 	drm_bridge_add(&dsi->bridge);
+	/*
+	 * Report the required division ratio setting for the MIPI clock dividers.
+	 *
+	 * vclk * bpp = hsclk * 8 * num_lanes
+	 *
+	 * vclk * DSI_AB_divider = hsclk * 16
+	 *
+	 *   which simplifies to...
+	 * DSI_AB_divider = bpp * 2 / num_lanes
+	 */
+	rzg2l_cpg_dsi_div_set_divider(bpp * 2 / dsi->lanes, PLL5_TARGET_DSI);
 	return 0;
 }

drivers/gpu/drm/scheduler/sched_main.c+1−0

@@ -361,6 +361,7 @@ static void drm_sched_run_free_queue(struct drm_gpu_scheduler *sched) · 360 unmodified lines
361	/**	361	/**
362	* drm_sched_job_done - complete a job	362	* drm_sched_job_done - complete a job
363	* @s_job: pointer to the job which is done	363	* @s_job: pointer to the job which is done
		364	* @result: 0 on success, -ERRNO on error
364	*	365	*
365	* Finish the job's fence and resubmit the work items.	366	* Finish the job's fence and resubmit the work items.
366	*/	367	*/

drivers/gpu/drm/sitronix/st7586.c+6−9

 	if (ret)
 		return ret;
+	/*
+	 * Override value set by mipi_dbi_spi_init(). This driver is a bit
+	 * non-standard, so best to set it explicitly here.
+	 */
+	dbi->write_memory_bpw = 8;
 	/* Cannot read from this controller via SPI */
 	dbi->read_commands = NULL;
 	if (ret)
 		return ret;
-	/*
-	 * we are using 8-bit data, so we are not actually swapping anything,
-	 * but setting mipi->swap_bytes makes mipi_dbi_typec3_command() do the
-	 * right thing and not use 16-bit transfers (which results in swapped
-	 * bytes on little-endian systems and causes out of order data to be
-	 * sent to the display).
-	 */
-	dbi->swap_bytes = true;
 	drm_mode_config_reset(drm);
 	ret = drm_dev_register(drm, 0);

drivers/gpu/drm/solomon/ssd130x.c+2−4

 	unsigned int height = drm_rect_height(rect);
 	unsigned int line_length = DIV_ROUND_UP(width, 8);
 	unsigned int page_height = SSD130X_PAGE_HEIGHT;
+	u8 page_start = ssd130x->page_offset + y / page_height;
 	unsigned int pages = DIV_ROUND_UP(height, page_height);
 	struct drm_device *drm = &ssd130x->drm;
 	u32 array_idx = 0;
 	 */
 	if (!ssd130x->page_address_mode) {
-		u8 page_start;
 		/* Set address range for horizontal addressing mode */
 		ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width);
 		if (ret < 0)
 			return ret;
-		page_start = ssd130x->page_offset + y / page_height;
 		ret = ssd130x_set_page_range(ssd130x, page_start, pages);
 		if (ret < 0)
 			return ret;
 		 */
 		if (ssd130x->page_address_mode) {
 			ret = ssd130x_set_page_pos(ssd130x,
-						   ssd130x->page_offset + i,
+						   page_start + i,
 						   ssd130x->col_offset + x);
 			if (ret < 0)
 				return ret;

drivers/gpu/drm/tiny/sharp-memory.c+2−2

@@ -541,8 +541,8 @@ static int sharp_memory_probe(struct spi_device *spi) · 540 unmodified lines
541		541
542	smd = devm_drm_dev_alloc(dev, &sharp_memory_drm_driver,	542	smd = devm_drm_dev_alloc(dev, &sharp_memory_drm_driver,
543	struct sharp_memory_device, drm);	543	struct sharp_memory_device, drm);
544	if (!smd)	544	if (IS_ERR(smd))
545	return -ENOMEM;	545	return PTR_ERR(smd);
546		546
547	spi_set_drvdata(spi, smd);	547	spi_set_drvdata(spi, smd);
548		548

drivers/gpu/drm/ttm/tests/ttm_bo_test.c+2−2

@@ -222,13 +222,13 @@ static void ttm_bo_reserve_interrupted(struct kunit *test) · 221 unmodified lines
222	KUNIT_FAIL(test, "Couldn't create ttm bo reserve task\n");	222	KUNIT_FAIL(test, "Couldn't create ttm bo reserve task\n");
223		223
224	/* Take a lock so the threaded reserve has to wait */	224	/* Take a lock so the threaded reserve has to wait */
225	mutex_lock(&bo->base.resv->lock.base);	225	dma_resv_lock(bo->base.resv, NULL);
226		226
227	wake_up_process(task);	227	wake_up_process(task);
228	msleep(20);	228	msleep(20);
229	err = kthread_stop(task);	229	err = kthread_stop(task);
230		230
231	mutex_unlock(&bo->base.resv->lock.base);	231	dma_resv_unlock(bo->base.resv);
232		232
233	KUNIT_ASSERT_EQ(test, err, -ERESTARTSYS);	233	KUNIT_ASSERT_EQ(test, err, -ERESTARTSYS);
234	}	234	}

drivers/gpu/drm/ttm/ttm_bo.c+5−6

 static s64
 ttm_bo_swapout_cb(struct ttm_lru_walk *walk, struct ttm_buffer_object *bo)
 {
-	struct ttm_resource *res = bo->resource;
+	struct ttm_place place = { .mem_type = bo->resource->mem_type };
-	struct ttm_place place = { .mem_type = res->mem_type };
 	struct ttm_bo_swapout_walk *swapout_walk =
 		container_of(walk, typeof(*swapout_walk), walk);
 	struct ttm_operation_ctx *ctx = walk->arg.ctx;
 	/*
 	 * Move to system cached
 	 */
-	if (res->mem_type != TTM_PL_SYSTEM) {
+	if (bo->resource->mem_type != TTM_PL_SYSTEM) {
 		struct ttm_resource *evict_mem;
 		struct ttm_place hop;
 	if (ttm_tt_is_populated(tt)) {
 		spin_lock(&bdev->lru_lock);
-		ttm_resource_del_bulk_move(res, bo);
+		ttm_resource_del_bulk_move(bo->resource, bo);
 		spin_unlock(&bdev->lru_lock);
 		ret = ttm_tt_swapout(bdev, tt, swapout_walk->gfp_flags);
 		spin_lock(&bdev->lru_lock);
 		if (ret)
-			ttm_resource_add_bulk_move(res, bo);
+			ttm_resource_add_bulk_move(bo->resource, bo);
-		ttm_resource_move_to_lru_tail(res);
+		ttm_resource_move_to_lru_tail(bo->resource);
 		spin_unlock(&bdev->lru_lock);
 	}

drivers/gpu/drm/ttm/ttm_pool_internal.h+1−1

@@ -17,7 +17,7 @@ static inline bool ttm_pool_uses_dma32(struct ttm_pool *pool) · 16 unmodified lines
17	return pool->alloc_flags & TTM_ALLOCATION_POOL_USE_DMA32;	17	return pool->alloc_flags & TTM_ALLOCATION_POOL_USE_DMA32;
18	}	18	}
19		19
20	static inline bool ttm_pool_beneficial_order(struct ttm_pool *pool)	20	static inline unsigned int ttm_pool_beneficial_order(struct ttm_pool *pool)
21	{	21	{
22	return pool->alloc_flags & 0xff;	22	return pool->alloc_flags & 0xff;
23	}	23	}

drivers/gpu/drm/vmwgfx/vmwgfx_cmdbuf.c+4−0

  * @handle: DMA address handle for the command buffer space if @using_mob is
  * false. Immutable.
  * @size: The size of the command buffer space. Immutable.
+ * @id: Monotonically increasing ID of the last cmdbuf submitted.
  * @num_contexts: Number of contexts actually enabled.
  */
 struct vmw_cmdbuf_man {
 	bool has_pool;
 	dma_addr_t handle;
 	size_t size;
+	u64 id;
 	u32 num_contexts;
 };
 	struct vmw_cmdbuf_man *man = header->man;
 	u32 val;
+	header->cb_header->id = man->id++;
 	val = upper_32_bits(header->handle);
 	vmw_write(man->dev_priv, SVGA_REG_COMMAND_HIGH, val);

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c+2−2

@@ -1143,7 +1143,7 @@ static int vmw_translate_mob_ptr(struct vmw_private *dev_priv, · 1142 unmodified lines
1143	ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);	1143	ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);
1144	if (ret != 0) {	1144	if (ret != 0) {
1145	drm_dbg(&dev_priv->drm, "Could not find or use MOB buffer.\n");	1145	drm_dbg(&dev_priv->drm, "Could not find or use MOB buffer.\n");
1146	return PTR_ERR(vmw_bo);	1146	return ret;
1147	}	1147	}
1148	vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_MOB, VMW_BO_DOMAIN_MOB);	1148	vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_MOB, VMW_BO_DOMAIN_MOB);
1149	ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo);	1149	ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo);
@@ -1199,7 +1199,7 @@ static int vmw_translate_guest_ptr(struct vmw_private *dev_priv, · 49 unmodified lines
1199	ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);	1199	ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);
1200	if (ret != 0) {	1200	if (ret != 0) {
1201	drm_dbg(&dev_priv->drm, "Could not find or use GMR region.\n");	1201	drm_dbg(&dev_priv->drm, "Could not find or use GMR region.\n");
1202	return PTR_ERR(vmw_bo);	1202	return ret;
1203	}	1203	}
1204	vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_GMR \| VMW_BO_DOMAIN_VRAM,	1204	vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_GMR \| VMW_BO_DOMAIN_VRAM,
1205	VMW_BO_DOMAIN_GMR \| VMW_BO_DOMAIN_VRAM);	1205	VMW_BO_DOMAIN_GMR \| VMW_BO_DOMAIN_VRAM);

drivers/gpu/drm/vmwgfx/vmwgfx_page_dirty.c+8−1

 	return ret;
 }
+static void vmw_bo_dirty_free(struct kref *kref)
+{
+	struct vmw_bo_dirty *dirty = container_of(kref, struct vmw_bo_dirty, ref_count);
+	kvfree(dirty);
+}
 /**
  * vmw_bo_dirty_release - Release a dirty-tracking user from a buffer object
  * @vbo: The buffer object
 {
 	struct vmw_bo_dirty *dirty = vbo->dirty;
-	if (dirty && kref_put(&dirty->ref_count, (void *)kvfree))
+	if (dirty && kref_put(&dirty->ref_count, vmw_bo_dirty_free))
 		vbo->dirty = NULL;
 }

drivers/gpu/drm/xe/regs/xe_engine_regs.h+6−0

 #define   ENABLE_SEMAPHORE_POLL_BIT		REG_BIT(13)
 #define RING_CMD_CCTL(base)			XE_REG((base) + 0xc4, XE_REG_OPTION_MASKED)
+#define CS_MMIO_GROUP_INSTANCE_SELECT(base)	XE_REG((base) + 0xcc)
+#define   SELECTIVE_READ_ADDRESSING		REG_BIT(30)
+#define   SELECTIVE_READ_GROUP			REG_GENMASK(29, 23)
+#define   SELECTIVE_READ_INSTANCE		REG_GENMASK(22, 16)
 /*
  * CMD_CCTL read/write fields take a MOCS value and _not_ a table index.
  * The lsb of each can be considered a separate enabling bit for encryption.

drivers/gpu/drm/xe/xe_configfs.c+1−0

@@ -830,6 +830,7 @@ static void xe_config_device_release(struct config_item *item) · 829 unmodified lines
830		830
831	mutex_destroy(&dev->lock);	831	mutex_destroy(&dev->lock);
832		832
		833	kfree(dev->config.ctx_restore_mid_bb[0].cs);
833	kfree(dev->config.ctx_restore_post_bb[0].cs);	834	kfree(dev->config.ctx_restore_post_bb[0].cs);
834	kfree(dev);	835	kfree(dev);
835	}	836	}

drivers/gpu/drm/xe/xe_exec_queue.c+11−12

 	return q;
 }
+static void __xe_exec_queue_fini(struct xe_exec_queue *q)
+{
+	int i;
+	q->ops->fini(q);
+	for (i = 0; i < q->width; ++i)
+		xe_lrc_put(q->lrc[i]);
+}
 static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
 {
 	int i, err;
 	return 0;
 err_lrc:
-	for (i = i - 1; i >= 0; --i)
+	__xe_exec_queue_fini(q);
-		xe_lrc_put(q->lrc[i]);
 	return err;
 }
-static void __xe_exec_queue_fini(struct xe_exec_queue *q)
-{
-	int i;
-	q->ops->fini(q);
-	for (i = 0; i < q->width; ++i)
-		xe_lrc_put(q->lrc[i]);
-}
 struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
 					   u32 logical_mask, u16 width,
 					   struct xe_hw_engine *hwe, u32 flags,

drivers/gpu/drm/xe/xe_gsc_proxy.c+35−8

 	return 0;
 }
-static void xe_gsc_proxy_remove(void *arg)
+static void xe_gsc_proxy_stop(struct xe_gsc *gsc)
 {
-	struct xe_gsc *gsc = arg;
 	struct xe_gt *gt = gsc_to_gt(gsc);
 	struct xe_device *xe = gt_to_xe(gt);
-	if (!gsc->proxy.component_added)
-		return;
 	/* disable HECI2 IRQs */
 	scoped_guard(xe_pm_runtime, xe) {
 		CLASS(xe_force_wake, fw_ref)(gt_to_fw(gt), XE_FW_GSC);
 	}
 	xe_gsc_wait_for_worker_completion(gsc);
+	gsc->proxy.started = false;
+}
+static void xe_gsc_proxy_remove(void *arg)
+{
+	struct xe_gsc *gsc = arg;
+	struct xe_gt *gt = gsc_to_gt(gsc);
+	struct xe_device *xe = gt_to_xe(gt);
+	if (!gsc->proxy.component_added)
+		return;
+	/*
+	 * GSC proxy start is an async process that can be ongoing during
+	 * Xe module load/unload. Using devm managed action to register
+	 * xe_gsc_proxy_stop could cause issues if Xe module unload has
+	 * already started when the action is registered, potentially leading
+	 * to the cleanup being called at the wrong time. Therefore, instead
+	 * of registering a separate devm action to undo what is done in
+	 * proxy start, we call it from here, but only if the start has
+	 * completed successfully (tracked with the 'started' flag).
+	 */
+	if (gsc->proxy.started)
+		xe_gsc_proxy_stop(gsc);
 	component_del(xe->drm.dev, &xe_gsc_proxy_component_ops);
 	gsc->proxy.component_added = false;
  */
 int xe_gsc_proxy_start(struct xe_gsc *gsc)
 {
+	struct xe_gt *gt = gsc_to_gt(gsc);
 	int err;
 	/* enable the proxy interrupt in the GSC shim layer */
 	 */
 	err = xe_gsc_proxy_request_handler(gsc);
 	if (err)
-		return err;
+		goto err_irq_disable;
 	if (!xe_gsc_proxy_init_done(gsc)) {
-		xe_gt_err(gsc_to_gt(gsc), "GSC FW reports proxy init not completed\n");
+		xe_gt_err(gt, "GSC FW reports proxy init not completed\n");
-		return -EIO;
+		err = -EIO;
+		goto err_irq_disable;
 	}
+	gsc->proxy.started = true;
 	return 0;
+err_irq_disable:
+	gsc_proxy_irq_toggle(gsc, false);
+	return err;
 }

drivers/gpu/drm/xe/xe_gsc_types.h+2−0

 		struct mutex mutex;
 		/** @proxy.component_added: whether the component has been added */
 		bool component_added;
+		/** @proxy.started: whether the proxy has been started */
+		bool started;
 		/** @proxy.bo: object to store message to and from the GSC */
 		struct xe_bo *bo;
 		/** @proxy.to_gsc: map of the memory used to send messages to the GSC */

drivers/gpu/drm/xe/xe_gt.c+54−12

 	return ret;
 }
+/* Dwords required to emit a RMW of a register */
+#define EMIT_RMW_DW 20
 static int emit_wa_job(struct xe_gt *gt, struct xe_exec_queue *q)
 {
-	struct xe_reg_sr *sr = &q->hwe->reg_lrc;
+	struct xe_hw_engine *hwe = q->hwe;
+	struct xe_reg_sr *sr = &hwe->reg_lrc;
 	struct xe_reg_sr_entry *entry;
-	int count_rmw = 0, count = 0, ret;
+	int count_rmw = 0, count_rmw_mcr = 0, count = 0, ret;
 	unsigned long idx;
 	struct xe_bb *bb;
 	size_t bb_len = 0;
 	xa_for_each(&sr->xa, idx, entry) {
 		if (entry->reg.masked || entry->clr_bits == ~0)
 			++count;
+		else if (entry->reg.mcr)
+			++count_rmw_mcr;
 		else
 			++count_rmw;
 	}
 	if (count)
 		bb_len += count * 2 + 1;
-	if (count_rmw)
+	/*
-		bb_len += count_rmw * 20 + 7;
+	 * RMW of MCR registers is the same as a normal RMW, except an
+	 * additional LRI (3 dwords) is required per register to steer the read
+	 * to a nom-terminated instance.
+	 *
+	 * We could probably shorten the batch slightly by eliding the
+	 * steering for consecutive MCR registers that have the same
+	 * group/instance target, but it's not worth the extra complexity to do
+	 * so.
+	 */
+	bb_len += count_rmw * EMIT_RMW_DW;
+	bb_len += count_rmw_mcr * (EMIT_RMW_DW + 3);
+	/*
+	 * After doing all RMW, we need 7 trailing dwords to clean up,
+	 * plus an additional 3 dwords to reset steering if any of the
+	 * registers were MCR.
+	 */
+	if (count_rmw || count_rmw_mcr)
+		bb_len += 7 + (count_rmw_mcr ? 3 : 0);
-	if (q->hwe->class == XE_ENGINE_CLASS_RENDER)
+	if (hwe->class == XE_ENGINE_CLASS_RENDER)
 		/*
 		 * Big enough to emit all of the context's 3DSTATE via
 		 * xe_lrc_emit_hwe_state_instructions()
 		 */
-		bb_len += xe_gt_lrc_size(gt, q->hwe->class) / sizeof(u32);
+		bb_len += xe_gt_lrc_size(gt, hwe->class) / sizeof(u32);
-	xe_gt_dbg(gt, "LRC %s WA job: %zu dwords\n", q->hwe->name, bb_len);
+	xe_gt_dbg(gt, "LRC %s WA job: %zu dwords\n", hwe->name, bb_len);
 	bb = xe_bb_new(gt, bb_len, false);
 	if (IS_ERR(bb))
 		}
 	}
-	if (count_rmw) {
+	if (count_rmw || count_rmw_mcr) {
-		/* Emit MI_MATH for each RMW reg: 20dw per reg + 7 trailing dw */
 		xa_for_each(&sr->xa, idx, entry) {
 			if (entry->reg.masked || entry->clr_bits == ~0)
 				continue;
+			if (entry->reg.mcr) {
+				struct xe_reg_mcr reg = { .__reg.raw = entry->reg.raw };
+				u8 group, instance;
+				xe_gt_mcr_get_nonterminated_steering(gt, reg, &group, &instance);
+				*cs++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1);
+				*cs++ = CS_MMIO_GROUP_INSTANCE_SELECT(hwe->mmio_base).addr;
+				*cs++ = SELECTIVE_READ_ADDRESSING |
+					REG_FIELD_PREP(SELECTIVE_READ_GROUP, group) |
+					REG_FIELD_PREP(SELECTIVE_READ_INSTANCE, instance);
+			}
 			*cs++ = MI_LOAD_REGISTER_REG | MI_LRR_DST_CS_MMIO;
 			*cs++ = entry->reg.addr;
 			*cs++ = CS_GPR_REG(0, 0).addr;
 			*cs++ = CS_GPR_REG(0, 0).addr;
 			*cs++ = entry->reg.addr;
-			xe_gt_dbg(gt, "REG[%#x] = ~%#x|%#x\n",
+			xe_gt_dbg(gt, "REG[%#x] = ~%#x|%#x%s\n",
-				  entry->reg.addr, entry->clr_bits, entry->set_bits);
+				  entry->reg.addr, entry->clr_bits, entry->set_bits,
+				  entry->reg.mcr ? " (MCR)" : "");
 		}
 		/* reset used GPR */
 		*cs++ = 0;
 		*cs++ = CS_GPR_REG(0, 2).addr;
 		*cs++ = 0;
+		/* reset steering */
+		if (count_rmw_mcr) {
+			*cs++ = MI_LOAD_REGISTER_IMM | MI_LRI_NUM_REGS(1);
+			*cs++ = CS_MMIO_GROUP_INSTANCE_SELECT(q->hwe->mmio_base).addr;
+			*cs++ = 0;
+		}
 	}
 	cs = xe_lrc_emit_hwe_state_instructions(q, cs);

drivers/gpu/drm/xe/xe_lrc.h+2−1

@@ -75,7 +75,8 @@ static inline struct xe_lrc xe_lrc_get(struct xe_lrc lrc) · 74 unmodified lines
75	*/	75	*/
76	static inline void xe_lrc_put(struct xe_lrc *lrc)	76	static inline void xe_lrc_put(struct xe_lrc *lrc)
77	{	77	{
78	kref_put(&lrc->refcount, xe_lrc_destroy);	78	if (lrc)
		79	kref_put(&lrc->refcount, xe_lrc_destroy);
79	}	80	}
80		81
81	/**	82	/**

drivers/gpu/drm/xe/xe_reg_sr.c+3−1

 	*pentry = *e;
 	ret = xa_err(xa_store(&sr->xa, idx, pentry, GFP_KERNEL));
 	if (ret)
-		goto fail;
+		goto fail_free;
 	return 0;
+fail_free:
+	kfree(pentry);
 fail:
 	xe_gt_err(gt,
 		  "discarding save-restore reg %04lx (clear: %08x, set: %08x, masked: %s, mcr: %s): ret=%d\n",

drivers/gpu/drm/xe/xe_ring_ops.c+9−0

 	i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);
+	/* Don't preempt fence signaling */
+	dw[i++] = MI_ARB_ON_OFF | MI_ARB_DISABLE;
 	if (job->user_fence.used) {
 		i = emit_flush_dw(dw, i);
 		i = emit_store_imm_ppgtt_posted(job->user_fence.addr,
 	i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);
+	/* Don't preempt fence signaling */
+	dw[i++] = MI_ARB_ON_OFF | MI_ARB_DISABLE;
 	if (job->user_fence.used) {
 		i = emit_flush_dw(dw, i);
 		i = emit_store_imm_ppgtt_posted(job->user_fence.addr,
 	i = emit_bb_start(batch_addr, ppgtt_flag, dw, i);
+	/* Don't preempt fence signaling */
+	dw[i++] = MI_ARB_ON_OFF | MI_ARB_DISABLE;
 	i = emit_render_cache_flush(job, dw, i);
 	if (job->user_fence.used)

drivers/gpu/drm/xe/xe_sync.c+21−9

 		if (!signal) {
 			sync->fence = drm_syncobj_fence_get(sync->syncobj);
-			if (XE_IOCTL_DBG(xe, !sync->fence))
+			if (XE_IOCTL_DBG(xe, !sync->fence)) {
-				return -EINVAL;
+				err = -EINVAL;
+				goto free_sync;
+			}
 		}
 		break;
 		if (signal) {
 			sync->chain_fence = dma_fence_chain_alloc();
-			if (!sync->chain_fence)
+			if (!sync->chain_fence) {
-				return -ENOMEM;
+				err = -ENOMEM;
+				goto free_sync;
+			}
 		} else {
 			sync->fence = drm_syncobj_fence_get(sync->syncobj);
-			if (XE_IOCTL_DBG(xe, !sync->fence))
+			if (XE_IOCTL_DBG(xe, !sync->fence)) {
-				return -EINVAL;
+				err = -EINVAL;
+				goto free_sync;
+			}
 			err = dma_fence_chain_find_seqno(&sync->fence,
 							 sync_in.timeline_value);
 			if (err)
-				return err;
+				goto free_sync;
 		}
 		break;
 			if (XE_IOCTL_DBG(xe, IS_ERR(sync->ufence)))
 				return PTR_ERR(sync->ufence);
 			sync->ufence_chain_fence = dma_fence_chain_alloc();
-			if (!sync->ufence_chain_fence)
+			if (!sync->ufence_chain_fence) {
-				return -ENOMEM;
+				err = -ENOMEM;
+				goto free_sync;
+			}
 			sync->ufence_syncobj = ufence_syncobj;
 		}
 	sync->timeline_value = sync_in.timeline_value;
 	return 0;
+free_sync:
+	xe_sync_entry_cleanup(sync);
+	return err;
 }
 ALLOW_ERROR_INJECTION(xe_sync_entry_parse, ERRNO);

drivers/gpu/drm/xe/xe_vm_madvise.c+2−1

 						    madvise_range.num_vmas,
 						    args->atomic.val)) {
 				err = -EINVAL;
-				goto madv_fini;
+				goto free_vmas;
 			}
 		}
 err_fini:
 	if (madvise_range.has_bo_vmas)
 		drm_exec_fini(&exec);
+free_vmas:
 	kfree(madvise_range.vmas);
 	madvise_range.vmas = NULL;
 madv_fini:

drivers/gpu/drm/xe/xe_wa.c+7−6

@@ -241,12 +241,13 @@ static const struct xe_rtp_entry_sr gt_was[] = { · 240 unmodified lines
241		241
242	{ XE_RTP_NAME("16025250150"),	242	{ XE_RTP_NAME("16025250150"),
243	XE_RTP_RULES(GRAPHICS_VERSION(2001)),	243	XE_RTP_RULES(GRAPHICS_VERSION(2001)),
244	XE_RTP_ACTIONS(SET(LSN_VC_REG2,	244	XE_RTP_ACTIONS(FIELD_SET(LSN_VC_REG2,
245	LSN_LNI_WGT(1) \|	245	LSN_LNI_WGT_MASK \| LSN_LNE_WGT_MASK \|
246	LSN_LNE_WGT(1) \|	246	LSN_DIM_X_WGT_MASK \| LSN_DIM_Y_WGT_MASK \|
247	LSN_DIM_X_WGT(1) \|	247	LSN_DIM_Z_WGT_MASK,
248	LSN_DIM_Y_WGT(1) \|	248	LSN_LNI_WGT(1) \| LSN_LNE_WGT(1) \|
249	LSN_DIM_Z_WGT(1)))	249	LSN_DIM_X_WGT(1) \| LSN_DIM_Y_WGT(1) \|
		250	LSN_DIM_Z_WGT(1)))
250	},	251	},
251		252
252	/* Xe2_HPM */	253	/* Xe2_HPM */

drivers/gpu/nova-core/gsp.rs+24−22

@@ -47,16 +47,12 @@ struct PteArray<const NUM_ENTRIES: usize>([u64; NUM_ENTRIES]); · 46 unmodified lines
47	unsafe impl<const NUM_ENTRIES: usize> AsBytes for PteArray<NUM_ENTRIES> {}	47	unsafe impl<const NUM_ENTRIES: usize> AsBytes for PteArray<NUM_ENTRIES> {}
48		48
49	impl<const NUM_PAGES: usize> PteArray<NUM_PAGES> {	49	impl<const NUM_PAGES: usize> PteArray<NUM_PAGES> {
50	/// Creates a new page table array mapping `NUM_PAGES` GSP pages starting at address `start`.	50	/// Returns the page table entry for `index`, for a mapping starting at `start`.
51	fn new(start: DmaAddress) -> Result<Self> {	51	// TODO: Replace with `IoView` projection once available.
52	let mut ptes = [0u64; NUM_PAGES];	52	fn entry(start: DmaAddress, index: usize) -> Result<u64> {
53	for (i, pte) in ptes.iter_mut().enumerate() {	53	start
54	*pte = start	54	.checked_add(num::usize_as_u64(index) << GSP_PAGE_SHIFT)
55	.checked_add(num::usize_as_u64(i) << GSP_PAGE_SHIFT)	55	.ok_or(EOVERFLOW)
56	.ok_or(EOVERFLOW)?;
57	}
58
59	Ok(Self(ptes))
60	}	56	}
61	}	57	}
62		58
@@ -86,16 +82,22 @@ impl LogBuffer { · 23 unmodified lines
86	NUM_PAGES * GSP_PAGE_SIZE,	82	NUM_PAGES * GSP_PAGE_SIZE,
87	GFP_KERNEL \| __GFP_ZERO,	83	GFP_KERNEL \| __GFP_ZERO,
88	)?);	84	)?);
89	let ptes = PteArray::<NUM_PAGES>::new(obj.0.dma_handle())?;	85
		86	let start_addr = obj.0.dma_handle();
90		87
91	// SAFETY: `obj` has just been created and we are its sole user.	88	// SAFETY: `obj` has just been created and we are its sole user.
92	unsafe {	89	let pte_region = unsafe {
93	// Copy the self-mapping PTE at the expected location.
94	obj.0	90	obj.0
95	.as_slice_mut(size_of::<u64>(), size_of_val(&ptes))?	91	.as_slice_mut(size_of::<u64>(), NUM_PAGES * size_of::<u64>())?
96	.copy_from_slice(ptes.as_bytes())
97	};	92	};
98		93
		94	// Write values one by one to avoid an on-stack instance of `PteArray`.
		95	for (i, chunk) in pte_region.chunks_exact_mut(size_of::<u64>()).enumerate() {
		96	let pte_value = PteArray::<0>::entry(start_addr, i)?;
		97
		98	chunk.copy_from_slice(&pte_value.to_ne_bytes());
		99	}
		100
99	Ok(obj)	101	Ok(obj)
100	}	102	}
101	}	103	}
@@ -143,14 +145,14 @@ impl Gsp { · 41 unmodified lines
143	// _kgspInitLibosLoggingStructures (allocates memory for buffers)	145	// _kgspInitLibosLoggingStructures (allocates memory for buffers)
144	// kgspSetupLibosInitArgs_IMPL (creates pLibosInitArgs[] array)	146	// kgspSetupLibosInitArgs_IMPL (creates pLibosInitArgs[] array)
145	dma_write!(	147	dma_write!(
146	libos[0] = LibosMemoryRegionInitArgument::new("LOGINIT", &loginit.0)	148	libos, [0]?, LibosMemoryRegionInitArgument::new("LOGINIT", &loginit.0)
147	)?;	149	);
148	dma_write!(	150	dma_write!(
149	libos[1] = LibosMemoryRegionInitArgument::new("LOGINTR", &logintr.0)	151	libos, [1]?, LibosMemoryRegionInitArgument::new("LOGINTR", &logintr.0)
150	)?;	152	);
151	dma_write!(libos[2] = LibosMemoryRegionInitArgument::new("LOGRM", &logrm.0))?;	153	dma_write!(libos, [2]?, LibosMemoryRegionInitArgument::new("LOGRM", &logrm.0));
152	dma_write!(rmargs[0].inner = fw::GspArgumentsCached::new(cmdq))?;	154	dma_write!(rmargs, [0]?.inner, fw::GspArgumentsCached::new(cmdq));
153	dma_write!(libos[3] = LibosMemoryRegionInitArgument::new("RMARGS", rmargs))?;	155	dma_write!(libos, [3]?, LibosMemoryRegionInitArgument::new("RMARGS", rmargs));
154	},	156	},
155	}))	157	}))
156	})	158	})

drivers/gpu/nova-core/gsp/boot.rs+1−1

@@ -157,7 +157,7 @@ impl super::Gsp { · 156 unmodified lines
157		157
158	let wpr_meta =	158	let wpr_meta =
159	CoherentAllocation::<GspFwWprMeta>::alloc_coherent(dev, 1, GFP_KERNEL \| __GFP_ZERO)?;	159	CoherentAllocation::<GspFwWprMeta>::alloc_coherent(dev, 1, GFP_KERNEL \| __GFP_ZERO)?;
160	dma_write!(wpr_meta[0] = GspFwWprMeta::new(&gsp_fw, &fb_layout))?;	160	dma_write!(wpr_meta, [0]?, GspFwWprMeta::new(&gsp_fw, &fb_layout));
161		161
162	self.cmdq	162	self.cmdq
163	.send_command(bar, commands::SetSystemInfo::new(pdev))?;	163	.send_command(bar, commands::SetSystemInfo::new(pdev))?;

drivers/gpu/nova-core/gsp/cmdq.rs+33−60

@@ -2,11 +2,7 @@ · 1 unmodified line
2		2
3	use core::{	3	use core::{
4	cmp,	4	cmp,
5	mem,	5	mem, //
6	sync::atomic::{
7	fence,
8	Ordering, //
9	}, //
10	};	6	};
11		7
12	use kernel::{	8	use kernel::{
@@ -146,30 +142,36 @@ static_assert!(align_of::<MsgqData>() == GSP_PAGE_SIZE); · 133 unmodified lines
146	#[repr(C)]	142	#[repr(C)]
147	// There is no struct defined for this in the open-gpu-kernel-source headers.	143	// There is no struct defined for this in the open-gpu-kernel-source headers.
148	// Instead it is defined by code in `GspMsgQueuesInit()`.	144	// Instead it is defined by code in `GspMsgQueuesInit()`.
149	struct Msgq {	145	// TODO: Revert to private once `IoView` projections replace the `gsp_mem` module.
		146	pub(super) struct Msgq {
150	/// Header for sending messages, including the write pointer.	147	/// Header for sending messages, including the write pointer.
151	tx: MsgqTxHeader,	148	pub(super) tx: MsgqTxHeader,
152	/// Header for receiving messages, including the read pointer.	149	/// Header for receiving messages, including the read pointer.
153	rx: MsgqRxHeader,	150	pub(super) rx: MsgqRxHeader,
154	/// The message queue proper.	151	/// The message queue proper.
155	msgq: MsgqData,	152	msgq: MsgqData,
156	}	153	}
157		154
158	/// Structure shared between the driver and the GSP and containing the command and message queues.	155	/// Structure shared between the driver and the GSP and containing the command and message queues.
159	#[repr(C)]	156	#[repr(C)]
160	struct GspMem {	157	// TODO: Revert to private once `IoView` projections replace the `gsp_mem` module.
		158	pub(super) struct GspMem {
161	/// Self-mapping page table entries.	159	/// Self-mapping page table entries.
162	ptes: PteArray<{ GSP_PAGE_SIZE / size_of::<u64>() }>,	160	ptes: PteArray<{ Self::PTE_ARRAY_SIZE }>,
163	/// CPU queue: the driver writes commands here, and the GSP reads them. It also contains the	161	/// CPU queue: the driver writes commands here, and the GSP reads them. It also contains the
164	/// write and read pointers that the CPU updates.	162	/// write and read pointers that the CPU updates.
165	///	163	///
166	/// This member is read-only for the GSP.	164	/// This member is read-only for the GSP.
167	cpuq: Msgq,	165	pub(super) cpuq: Msgq,
168	/// GSP queue: the GSP writes messages here, and the driver reads them. It also contains the	166	/// GSP queue: the GSP writes messages here, and the driver reads them. It also contains the
169	/// write and read pointers that the GSP updates.	167	/// write and read pointers that the GSP updates.
170	///	168	///
171	/// This member is read-only for the driver.	169	/// This member is read-only for the driver.
172	gspq: Msgq,	170	pub(super) gspq: Msgq,
		171	}
		172
		173	impl GspMem {
		174	const PTE_ARRAY_SIZE: usize = GSP_PAGE_SIZE / size_of::<u64>();
173	}	175	}
174		176
175	// SAFETY: These structs don't meet the no-padding requirements of AsBytes but	177	// SAFETY: These structs don't meet the no-padding requirements of AsBytes but
@@ -201,9 +203,19 @@ impl DmaGspMem { · 25 unmodified lines
201		203
202	let gsp_mem =	204	let gsp_mem =
203	CoherentAllocation::<GspMem>::alloc_coherent(dev, 1, GFP_KERNEL \| __GFP_ZERO)?;	205	CoherentAllocation::<GspMem>::alloc_coherent(dev, 1, GFP_KERNEL \| __GFP_ZERO)?;
204	dma_write!(gsp_mem[0].ptes = PteArray::new(gsp_mem.dma_handle())?)?;	206
205	dma_write!(gsp_mem[0].cpuq.tx = MsgqTxHeader::new(MSGQ_SIZE, RX_HDR_OFF, MSGQ_NUM_PAGES))?;	207	let start = gsp_mem.dma_handle();
206	dma_write!(gsp_mem[0].cpuq.rx = MsgqRxHeader::new())?;	208	// Write values one by one to avoid an on-stack instance of `PteArray`.
		209	for i in 0..GspMem::PTE_ARRAY_SIZE {
		210	dma_write!(gsp_mem, [0]?.ptes.0[i], PteArray::<0>::entry(start, i)?);
		211	}
		212
		213	dma_write!(
		214	gsp_mem,
		215	[0]?.cpuq.tx,
		216	MsgqTxHeader::new(MSGQ_SIZE, RX_HDR_OFF, MSGQ_NUM_PAGES)
		217	);
		218	dma_write!(gsp_mem, [0]?.cpuq.rx, MsgqRxHeader::new());
207		219
208	Ok(Self(gsp_mem))	220	Ok(Self(gsp_mem))
209	}	221	}
@@ -317,12 +329,7 @@ impl DmaGspMem { · 107 unmodified lines
317	//	329	//
318	// - The returned value is between `0` and `MSGQ_NUM_PAGES`.	330	// - The returned value is between `0` and `MSGQ_NUM_PAGES`.
319	fn gsp_write_ptr(&self) -> u32 {	331	fn gsp_write_ptr(&self) -> u32 {
320	let gsp_mem = self.0.start_ptr();	332	super::fw::gsp_mem::gsp_write_ptr(&self.0)
321
322	// SAFETY:
323	// - The 'CoherentAllocation' contains at least one object.
324	// - By the invariants of `CoherentAllocation` the pointer is valid.
325	(unsafe { (*gsp_mem).gspq.tx.write_ptr() } % MSGQ_NUM_PAGES)
326	}	333	}
327		334
328	// Returns the index of the memory page the GSP will read the next command from.	335	// Returns the index of the memory page the GSP will read the next command from.
@@ -331,12 +338,7 @@ impl DmaGspMem { · 2 unmodified lines
331	//	338	//
332	// - The returned value is between `0` and `MSGQ_NUM_PAGES`.	339	// - The returned value is between `0` and `MSGQ_NUM_PAGES`.
333	fn gsp_read_ptr(&self) -> u32 {	340	fn gsp_read_ptr(&self) -> u32 {
334	let gsp_mem = self.0.start_ptr();	341	super::fw::gsp_mem::gsp_read_ptr(&self.0)
335
336	// SAFETY:
337	// - The 'CoherentAllocation' contains at least one object.
338	// - By the invariants of `CoherentAllocation` the pointer is valid.
339	(unsafe { (*gsp_mem).gspq.rx.read_ptr() } % MSGQ_NUM_PAGES)
340	}	342	}
341		343
342	// Returns the index of the memory page the CPU can read the next message from.	344	// Returns the index of the memory page the CPU can read the next message from.
@@ -345,27 +347,12 @@ impl DmaGspMem { · 2 unmodified lines
345	//	347	//
346	// - The returned value is between `0` and `MSGQ_NUM_PAGES`.	348	// - The returned value is between `0` and `MSGQ_NUM_PAGES`.
347	fn cpu_read_ptr(&self) -> u32 {	349	fn cpu_read_ptr(&self) -> u32 {
348	let gsp_mem = self.0.start_ptr();	350	super::fw::gsp_mem::cpu_read_ptr(&self.0)
349
350	// SAFETY:
351	// - The ['CoherentAllocation'] contains at least one object.
352	// - By the invariants of CoherentAllocation the pointer is valid.
353	(unsafe { (*gsp_mem).cpuq.rx.read_ptr() } % MSGQ_NUM_PAGES)
354	}	351	}
355		352
356	// Informs the GSP that it can send `elem_count` new pages into the message queue.	353	// Informs the GSP that it can send `elem_count` new pages into the message queue.
357	fn advance_cpu_read_ptr(&mut self, elem_count: u32) {	354	fn advance_cpu_read_ptr(&mut self, elem_count: u32) {
358	let rptr = self.cpu_read_ptr().wrapping_add(elem_count) % MSGQ_NUM_PAGES;	355	super::fw::gsp_mem::advance_cpu_read_ptr(&self.0, elem_count)
359
360	// Ensure read pointer is properly ordered.
361	fence(Ordering::SeqCst);
362
363	let gsp_mem = self.0.start_ptr_mut();
364
365	// SAFETY:
366	// - The 'CoherentAllocation' contains at least one object.
367	// - By the invariants of `CoherentAllocation` the pointer is valid.
368	unsafe { (*gsp_mem).cpuq.rx.set_read_ptr(rptr) };
369	}	356	}
370		357
371	// Returns the index of the memory page the CPU can write the next command to.	358	// Returns the index of the memory page the CPU can write the next command to.
@@ -374,26 +361,12 @@ impl DmaGspMem { · 2 unmodified lines
374	//	361	//
375	// - The returned value is between `0` and `MSGQ_NUM_PAGES`.	362	// - The returned value is between `0` and `MSGQ_NUM_PAGES`.
376	fn cpu_write_ptr(&self) -> u32 {	363	fn cpu_write_ptr(&self) -> u32 {
377	let gsp_mem = self.0.start_ptr();	364	super::fw::gsp_mem::cpu_write_ptr(&self.0)
378
379	// SAFETY:
380	// - The 'CoherentAllocation' contains at least one object.
381	// - By the invariants of `CoherentAllocation` the pointer is valid.
382	(unsafe { (*gsp_mem).cpuq.tx.write_ptr() } % MSGQ_NUM_PAGES)
383	}	365	}
384		366
385	// Informs the GSP that it can process `elem_count` new pages from the command queue.	367	// Informs the GSP that it can process `elem_count` new pages from the command queue.
386	fn advance_cpu_write_ptr(&mut self, elem_count: u32) {	368	fn advance_cpu_write_ptr(&mut self, elem_count: u32) {
387	let wptr = self.cpu_write_ptr().wrapping_add(elem_count) & MSGQ_NUM_PAGES;	369	super::fw::gsp_mem::advance_cpu_write_ptr(&self.0, elem_count)
388	let gsp_mem = self.0.start_ptr_mut();
389
390	// SAFETY:
391	// - The 'CoherentAllocation' contains at least one object.
392	// - By the invariants of `CoherentAllocation` the pointer is valid.
393	unsafe { (*gsp_mem).cpuq.tx.set_write_ptr(wptr) };
394
395	// Ensure all command data is visible before triggering the GSP read.
396	fence(Ordering::SeqCst);
397	}	370	}
398	}	371	}
399		372

drivers/gpu/nova-core/gsp/fw.rs+69−32

@@ -40,6 +40,75 @@ use crate::{ · 39 unmodified lines
40	},	40	},
41	};	41	};
42		42
		43	// TODO: Replace with `IoView` projections once available; the `unwrap()` calls go away once we
		44	// switch to the new `dma::Coherent` API.
		45	pub(super) mod gsp_mem {
		46	use core::sync::atomic::{
		47	fence,
		48	Ordering, //
		49	};
		50
		51	use kernel::{
		52	dma::CoherentAllocation,
		53	dma_read,
		54	dma_write,
		55	prelude::*, //
		56	};
		57
		58	use crate::gsp::cmdq::{
		59	GspMem,
		60	MSGQ_NUM_PAGES, //
		61	};
		62
		63	pub(in crate::gsp) fn gsp_write_ptr(qs: &CoherentAllocation<GspMem>) -> u32 {
		64	// PANIC: A `dma::CoherentAllocation` always contains at least one element.
		65	\|\| -> Result<u32> { Ok(dma_read!(qs, [0]?.gspq.tx.0.writePtr) % MSGQ_NUM_PAGES) }().unwrap()
		66	}
		67
		68	pub(in crate::gsp) fn gsp_read_ptr(qs: &CoherentAllocation<GspMem>) -> u32 {
		69	// PANIC: A `dma::CoherentAllocation` always contains at least one element.
		70	\|\| -> Result<u32> { Ok(dma_read!(qs, [0]?.gspq.rx.0.readPtr) % MSGQ_NUM_PAGES) }().unwrap()
		71	}
		72
		73	pub(in crate::gsp) fn cpu_read_ptr(qs: &CoherentAllocation<GspMem>) -> u32 {
		74	// PANIC: A `dma::CoherentAllocation` always contains at least one element.
		75	\|\| -> Result<u32> { Ok(dma_read!(qs, [0]?.cpuq.rx.0.readPtr) % MSGQ_NUM_PAGES) }().unwrap()
		76	}
		77
		78	pub(in crate::gsp) fn advance_cpu_read_ptr(qs: &CoherentAllocation<GspMem>, count: u32) {
		79	let rptr = cpu_read_ptr(qs).wrapping_add(count) % MSGQ_NUM_PAGES;
		80
		81	// Ensure read pointer is properly ordered.
		82	fence(Ordering::SeqCst);
		83
		84	// PANIC: A `dma::CoherentAllocation` always contains at least one element.
		85	\|\| -> Result {
		86	dma_write!(qs, [0]?.cpuq.rx.0.readPtr, rptr);
		87	Ok(())
		88	}()
		89	.unwrap()
		90	}
		91
		92	pub(in crate::gsp) fn cpu_write_ptr(qs: &CoherentAllocation<GspMem>) -> u32 {
		93	// PANIC: A `dma::CoherentAllocation` always contains at least one element.
		94	\|\| -> Result<u32> { Ok(dma_read!(qs, [0]?.cpuq.tx.0.writePtr) % MSGQ_NUM_PAGES) }().unwrap()
		95	}
		96
		97	pub(in crate::gsp) fn advance_cpu_write_ptr(qs: &CoherentAllocation<GspMem>, count: u32) {
		98	let wptr = cpu_write_ptr(qs).wrapping_add(count) % MSGQ_NUM_PAGES;
		99
		100	// PANIC: A `dma::CoherentAllocation` always contains at least one element.
		101	\|\| -> Result {
		102	dma_write!(qs, [0]?.cpuq.tx.0.writePtr, wptr);
		103	Ok(())
		104	}()
		105	.unwrap();
		106
		107	// Ensure all command data is visible before triggering the GSP read.
		108	fence(Ordering::SeqCst);
		109	}
		110	}
		111
43	/// Empty type to group methods related to heap parameters for running the GSP firmware.	112	/// Empty type to group methods related to heap parameters for running the GSP firmware.
44	enum GspFwHeapParams {}	113	enum GspFwHeapParams {}
45		114
@@ -708,22 +777,6 @@ impl MsgqTxHeader { · 662 unmodified lines
708	entryOff: num::usize_into_u32::<GSP_PAGE_SIZE>(),	777	entryOff: num::usize_into_u32::<GSP_PAGE_SIZE>(),
709	})	778	})
710	}	779	}
711
712	/// Returns the value of the write pointer for this queue.
713	pub(crate) fn write_ptr(&self) -> u32 {
714	let ptr = core::ptr::from_ref(&self.0.writePtr);
715
716	// SAFETY: `ptr` is a valid pointer to a `u32`.
717	unsafe { ptr.read_volatile() }
718	}
719
720	/// Sets the value of the write pointer for this queue.
721	pub(crate) fn set_write_ptr(&mut self, val: u32) {
722	let ptr = core::ptr::from_mut(&mut self.0.writePtr);
723
724	// SAFETY: `ptr` is a valid pointer to a `u32`.
725	unsafe { ptr.write_volatile(val) }
726	}
727	}	780	}
728		781
729	// SAFETY: Padding is explicit and does not contain uninitialized data.	782	// SAFETY: Padding is explicit and does not contain uninitialized data.
@@ -739,22 +792,6 @@ impl MsgqRxHeader { · 9 unmodified lines
739	pub(crate) fn new() -> Self {	792	pub(crate) fn new() -> Self {
740	Self(Default::default())	793	Self(Default::default())
741	}	794	}
742
743	/// Returns the value of the read pointer for this queue.
744	pub(crate) fn read_ptr(&self) -> u32 {
745	let ptr = core::ptr::from_ref(&self.0.readPtr);
746
747	// SAFETY: `ptr` is a valid pointer to a `u32`.
748	unsafe { ptr.read_volatile() }
749	}
750
751	/// Sets the value of the read pointer for this queue.
752	pub(crate) fn set_read_ptr(&mut self, val: u32) {
753	let ptr = core::ptr::from_mut(&mut self.0.readPtr);
754
755	// SAFETY: `ptr` is a valid pointer to a `u32`.
756	unsafe { ptr.write_volatile(val) }
757	}
758	}	795	}
759		796
760	// SAFETY: Padding is explicit and does not contain uninitialized data.	797	// SAFETY: Padding is explicit and does not contain uninitialized data.

drivers/hid/hid-apple.c+4−3

 	{ "A3R" },
 	{ "hfd.cn" },
 	{ "WKB603" },
+	{ "TH87" },			/* EPOMAKER TH87 BT mode */
+	{ "HFD Epomaker TH87" },	/* EPOMAKER TH87 USB mode */
+	{ "2.4G Wireless Receiver" },	/* EPOMAKER TH87 dongle */
 };
 static bool apple_is_non_apple_keyboard(struct hid_device *hdev)
 		hid_info(hdev,
 			 "fixing up Magic Keyboard battery report descriptor\n");
 		*rsize = *rsize - 1;
-		rdesc = kmemdup(rdesc + 1, *rsize, GFP_KERNEL);
+		rdesc = rdesc + 1;
-		if (!rdesc)
-			return NULL;
 		rdesc[0] = 0x05;
 		rdesc[1] = 0x01;

drivers/hid/hid-asus.c+14−4

@@ -1399,14 +1399,21 @@ static const __u8 asus_report_fixup(struct hid_device hdev, __u8 *rdesc, · 1398 unmodified lines
1399	*/	1399	*/
1400	if (*rsize == rsize_orig &&	1400	if (*rsize == rsize_orig &&
1401	rdesc[offs] == 0x09 && rdesc[offs + 1] == 0x76) {	1401	rdesc[offs] == 0x09 && rdesc[offs + 1] == 0x76) {
1402	*rsize = rsize_orig + 1;	1402	__u8 *new_rdesc;
1403	rdesc = kmemdup(rdesc, *rsize, GFP_KERNEL);	1403
1404	if (!rdesc)	1404	new_rdesc = devm_kzalloc(&hdev->dev, rsize_orig + 1,
1405	return NULL;	1405	GFP_KERNEL);
		1406	if (!new_rdesc)
		1407	return rdesc;
1406		1408
1407	hid_info(hdev, "Fixing up %s keyb report descriptor\n",	1409	hid_info(hdev, "Fixing up %s keyb report descriptor\n",
1408	drvdata->quirks & QUIRK_T100CHI ?	1410	drvdata->quirks & QUIRK_T100CHI ?
1409	"T100CHI" : "T90CHI");	1411	"T100CHI" : "T90CHI");
		1412
		1413	memcpy(new_rdesc, rdesc, rsize_orig);
		1414	*rsize = rsize_orig + 1;
		1415	rdesc = new_rdesc;
		1416
1410	memmove(rdesc + offs + 4, rdesc + offs + 2, 12);	1417	memmove(rdesc + offs + 4, rdesc + offs + 2, 12);
1411	rdesc[offs] = 0x19;	1418	rdesc[offs] = 0x19;
1412	rdesc[offs + 1] = 0x00;	1419	rdesc[offs + 1] = 0x00;
@@ -1490,6 +1497,9 @@ static const struct hid_device_id asus_devices[] = { · 77 unmodified lines
1490	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK,	1497	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK,
1491	USB_DEVICE_ID_ASUSTEK_ROG_NKEY_ALLY_X),	1498	USB_DEVICE_ID_ASUSTEK_ROG_NKEY_ALLY_X),
1492	QUIRK_USE_KBD_BACKLIGHT \| QUIRK_ROG_NKEY_KEYBOARD \| QUIRK_ROG_ALLY_XPAD },	1499	QUIRK_USE_KBD_BACKLIGHT \| QUIRK_ROG_NKEY_KEYBOARD \| QUIRK_ROG_ALLY_XPAD },
		1500	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK,
		1501	USB_DEVICE_ID_ASUSTEK_XGM_2023),
		1502	},
1493	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK,	1503	{ HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK,
1494	USB_DEVICE_ID_ASUSTEK_ROG_CLAYMORE_II_KEYBOARD),	1504	USB_DEVICE_ID_ASUSTEK_ROG_CLAYMORE_II_KEYBOARD),
1495	QUIRK_ROG_CLAYMORE_II_KEYBOARD },	1505	QUIRK_ROG_CLAYMORE_II_KEYBOARD },

drivers/hid/hid-cmedia.c+1−1

@@ -99,7 +99,7 @@ static int cmhid_raw_event(struct hid_device hid, struct hid_report report, · 98 unmodified lines
99	{	99	{
100	struct cmhid *cm = hid_get_drvdata(hid);	100	struct cmhid *cm = hid_get_drvdata(hid);
101		101
102	if (len != CM6533_JD_RAWEV_LEN)	102	if (len != CM6533_JD_RAWEV_LEN \|\| !(hid->claimed & HID_CLAIMED_INPUT))
103	goto out;	103	goto out;
104	if (memcmp(data+CM6533_JD_SFX_OFFSET, ji_sfx, sizeof(ji_sfx)))	104	if (memcmp(data+CM6533_JD_SFX_OFFSET, ji_sfx, sizeof(ji_sfx)))
105	goto out;	105	goto out;

drivers/hid/hid-creative-sb0540.c+1−1

@@ -153,7 +153,7 @@ static int creative_sb0540_raw_event(struct hid_device *hid, · 152 unmodified lines
153	u64 code, main_code;	153	u64 code, main_code;
154	int key;	154	int key;
155		155
156	if (len != 6)	156	if (len != 6 \|\| !(hid->claimed & HID_CLAIMED_INPUT))
157	return 0;	157	return 0;
158		158
159	/* From daemons/hw_hiddev.c sb0540_rec() in lirc */	159	/* From daemons/hw_hiddev.c sb0540_rec() in lirc */

drivers/hid/hid-ids.h+1−0

@@ -229,6 +229,7 @@ · 228 unmodified lines
229	#define USB_DEVICE_ID_ASUSTEK_ROG_NKEY_ALLY_X 0x1b4c	229	#define USB_DEVICE_ID_ASUSTEK_ROG_NKEY_ALLY_X 0x1b4c
230	#define USB_DEVICE_ID_ASUSTEK_ROG_CLAYMORE_II_KEYBOARD 0x196b	230	#define USB_DEVICE_ID_ASUSTEK_ROG_CLAYMORE_II_KEYBOARD 0x196b
231	#define USB_DEVICE_ID_ASUSTEK_FX503VD_KEYBOARD 0x1869	231	#define USB_DEVICE_ID_ASUSTEK_FX503VD_KEYBOARD 0x1869
		232	#define USB_DEVICE_ID_ASUSTEK_XGM_2023 0x1a9a
232		233
233	#define USB_VENDOR_ID_ATEN 0x0557	234	#define USB_VENDOR_ID_ATEN 0x0557
234	#define USB_DEVICE_ID_ATEN_UC100KM 0x2004	235	#define USB_DEVICE_ID_ATEN_UC100KM 0x2004

drivers/hid/hid-magicmouse.c+2−4

 	 */
 	if ((is_usb_magicmouse2(hdev->vendor, hdev->product) ||
 	     is_usb_magictrackpad2(hdev->vendor, hdev->product)) &&
-	    *rsize == 83 && rdesc[46] == 0x84 && rdesc[58] == 0x85) {
+	    *rsize >= 83 && rdesc[46] == 0x84 && rdesc[58] == 0x85) {
 		hid_info(hdev,
 			 "fixing up magicmouse battery report descriptor\n");
 		*rsize = *rsize - 1;
-		rdesc = kmemdup(rdesc + 1, *rsize, GFP_KERNEL);
+		rdesc = rdesc + 1;
-		if (!rdesc)
-			return NULL;
 		rdesc[0] = 0x05;
 		rdesc[1] = 0x01;

drivers/hid/hid-mcp2221.c+2−0

 				usleep_range(90, 100);
 				retries++;
 			} else {
+				usleep_range(980, 1000);
+				mcp_cancel_last_cmd(mcp);
 				return ret;
 			}
 		} else {

drivers/hid/hid-multitouch.c+38−5

 #define MT_QUIRK_ORIENTATION_INVERT	BIT(22)
 #define MT_QUIRK_APPLE_TOUCHBAR		BIT(23)
 #define MT_QUIRK_YOGABOOK9I		BIT(24)
+#define MT_QUIRK_KEEP_LATENCY_ON_CLOSE	BIT(25)
 #define MT_INPUTMODE_TOUCHSCREEN	0x02
 #define MT_INPUTMODE_TOUCHPAD		0x03
 #define MT_CLS_WIN_8_DISABLE_WAKEUP		0x0016
 #define MT_CLS_WIN_8_NO_STICKY_FINGERS		0x0017
 #define MT_CLS_WIN_8_FORCE_MULTI_INPUT_NSMU	0x0018
+#define MT_CLS_WIN_8_KEEP_LATENCY_ON_CLOSE	0x0019
 /* vendor specific classes */
 #define MT_CLS_3M				0x0101
 #define MT_CLS_SMART_TECH			0x0113
 #define MT_CLS_APPLE_TOUCHBAR			0x0114
 #define MT_CLS_YOGABOOK9I			0x0115
+#define MT_CLS_EGALAX_P80H84			0x0116
 #define MT_CLS_SIS				0x0457
 #define MT_DEFAULT_MAXCONTACT	10
 			MT_QUIRK_CONTACT_CNT_ACCURATE |
 			MT_QUIRK_WIN8_PTP_BUTTONS,
 		.export_all_inputs = true },
+	{ .name = MT_CLS_WIN_8_KEEP_LATENCY_ON_CLOSE,
+		.quirks = MT_QUIRK_ALWAYS_VALID |
+			MT_QUIRK_IGNORE_DUPLICATES |
+			MT_QUIRK_HOVERING |
+			MT_QUIRK_CONTACT_CNT_ACCURATE |
+			MT_QUIRK_STICKY_FINGERS |
+			MT_QUIRK_WIN8_PTP_BUTTONS |
+			MT_QUIRK_KEEP_LATENCY_ON_CLOSE,
+		.export_all_inputs = true },
 	/*
 	 * vendor specific classes
 			MT_QUIRK_YOGABOOK9I,
 		.export_all_inputs = true
 	},
+	{ .name = MT_CLS_EGALAX_P80H84,
+		.quirks = MT_QUIRK_ALWAYS_VALID |
+			MT_QUIRK_IGNORE_DUPLICATES |
+			MT_QUIRK_CONTACT_CNT_ACCURATE,
+	},
 	{ }
 };
 			if ((cls->name == MT_CLS_WIN_8 ||
 			     cls->name == MT_CLS_WIN_8_FORCE_MULTI_INPUT ||
 			     cls->name == MT_CLS_WIN_8_FORCE_MULTI_INPUT_NSMU ||
-			     cls->name == MT_CLS_WIN_8_DISABLE_WAKEUP) &&
+			     cls->name == MT_CLS_WIN_8_DISABLE_WAKEUP ||
+			     cls->name == MT_CLS_WIN_8_KEEP_LATENCY_ON_CLOSE) &&
 				(field->application == HID_DG_TOUCHPAD ||
 				 field->application == HID_DG_TOUCHSCREEN))
 				app->quirks |= MT_QUIRK_CONFIDENCE;
 	int ret;
 	if (td->is_haptic_touchpad && (td->mtclass.name == MT_CLS_WIN_8 ||
-	    td->mtclass.name == MT_CLS_WIN_8_FORCE_MULTI_INPUT)) {
+	    td->mtclass.name == MT_CLS_WIN_8_FORCE_MULTI_INPUT ||
+	    td->mtclass.name == MT_CLS_WIN_8_KEEP_LATENCY_ON_CLOSE)) {
 		if (hid_haptic_input_configured(hdev, td->haptic, hi) == 0)
 			td->is_haptic_touchpad = false;
 	} else {
 static void mt_on_hid_hw_close(struct hid_device *hdev)
 {
-	mt_set_modes(hdev, HID_LATENCY_HIGH, TOUCHPAD_REPORT_NONE);
+	struct mt_device *td = hid_get_drvdata(hdev);
+	if (td->mtclass.quirks & MT_QUIRK_KEEP_LATENCY_ON_CLOSE)
+		mt_set_modes(hdev, HID_LATENCY_NORMAL, TOUCHPAD_REPORT_NONE);
+	else
+		mt_set_modes(hdev, HID_LATENCY_HIGH, TOUCHPAD_REPORT_NONE);
 }
 /*
 	{ .driver_data = MT_CLS_EGALAX_SERIAL,
 		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,
 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_C000) },
-	{ .driver_data = MT_CLS_EGALAX,
+	{ .driver_data = MT_CLS_EGALAX_P80H84,
-		MT_USB_DEVICE(USB_VENDOR_ID_DWAV,
+		HID_DEVICE(HID_BUS_ANY, HID_GROUP_MULTITOUCH_WIN_8,
+			USB_VENDOR_ID_DWAV,
 			USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_C002) },
 	/* Elan devices */
 		MT_USB_DEVICE(USB_VENDOR_ID_UNITEC,
 			USB_DEVICE_ID_UNITEC_USB_TOUCH_0A19) },
+	/* Uniwill touchpads */
+	{ .driver_data = MT_CLS_WIN_8_KEEP_LATENCY_ON_CLOSE,
+		HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8,
+			USB_VENDOR_ID_PIXART, 0x0255) },
+	{ .driver_data = MT_CLS_WIN_8_KEEP_LATENCY_ON_CLOSE,
+		HID_DEVICE(BUS_I2C, HID_GROUP_MULTITOUCH_WIN_8,
+			USB_VENDOR_ID_PIXART, 0x0274) },
 	/* VTL panels */
 	{ .driver_data = MT_CLS_VTL,
 		MT_USB_DEVICE(USB_VENDOR_ID_VTL,

drivers/hid/hid-zydacron.c+1−1

@@ -114,7 +114,7 @@ static int zc_raw_event(struct hid_device hdev, struct hid_report report, · 113 unmodified lines
114	unsigned key;	114	unsigned key;
115	unsigned short index;	115	unsigned short index;
116		116
117	if (report->id == data[0]) {	117	if (report->id == data[0] && (hdev->claimed & HID_CLAIMED_INPUT)) {
118		118
119	/* break keys */	119	/* break keys */
120	for (index = 0; index < 4; index++) {	120	for (index = 0; index < 4; index++) {

drivers/hid/intel-ish-hid/ipc/hw-ish.h+2−0

@@ -39,6 +39,8 @@ · 38 unmodified lines
39	#define PCI_DEVICE_ID_INTEL_ISH_PTL_H 0xE345	39	#define PCI_DEVICE_ID_INTEL_ISH_PTL_H 0xE345
40	#define PCI_DEVICE_ID_INTEL_ISH_PTL_P 0xE445	40	#define PCI_DEVICE_ID_INTEL_ISH_PTL_P 0xE445
41	#define PCI_DEVICE_ID_INTEL_ISH_WCL 0x4D45	41	#define PCI_DEVICE_ID_INTEL_ISH_WCL 0x4D45
		42	#define PCI_DEVICE_ID_INTEL_ISH_NVL_H 0xD354
		43	#define PCI_DEVICE_ID_INTEL_ISH_NVL_S 0x6E78
42		44
43	#define REVISION_ID_CHT_A0 0x6	45	#define REVISION_ID_CHT_A0 0x6
44	#define REVISION_ID_CHT_Ax_SI 0x0	46	#define REVISION_ID_CHT_Ax_SI 0x0

drivers/hid/intel-ish-hid/ipc/pci-ish.c+12−0

 	ISHTP_DRIVER_DATA_LNL_M,
 	ISHTP_DRIVER_DATA_PTL,
 	ISHTP_DRIVER_DATA_WCL,
+	ISHTP_DRIVER_DATA_NVL_H,
+	ISHTP_DRIVER_DATA_NVL_S,
 };
 #define ISH_FW_GEN_LNL_M "lnlm"
 #define ISH_FW_GEN_PTL "ptl"
 #define ISH_FW_GEN_WCL "wcl"
+#define ISH_FW_GEN_NVL_H "nvlh"
+#define ISH_FW_GEN_NVL_S "nvls"
 #define ISH_FIRMWARE_PATH(gen) "intel/ish/ish_" gen ".bin"
 #define ISH_FIRMWARE_PATH_ALL "intel/ish/ish_*.bin"
 	[ISHTP_DRIVER_DATA_WCL] = {
 		.fw_generation = ISH_FW_GEN_WCL,
 	},
+	[ISHTP_DRIVER_DATA_NVL_H] = {
+		.fw_generation = ISH_FW_GEN_NVL_H,
+	},
+	[ISHTP_DRIVER_DATA_NVL_S] = {
+		.fw_generation = ISH_FW_GEN_NVL_S,
+	},
 };
 static const struct pci_device_id ish_pci_tbl[] = {
 	{PCI_DEVICE_DATA(INTEL, ISH_PTL_H, ISHTP_DRIVER_DATA_PTL)},
 	{PCI_DEVICE_DATA(INTEL, ISH_PTL_P, ISHTP_DRIVER_DATA_PTL)},
 	{PCI_DEVICE_DATA(INTEL, ISH_WCL, ISHTP_DRIVER_DATA_WCL)},
+	{PCI_DEVICE_DATA(INTEL, ISH_NVL_H, ISHTP_DRIVER_DATA_NVL_H)},
+	{PCI_DEVICE_DATA(INTEL, ISH_NVL_S, ISHTP_DRIVER_DATA_NVL_S)},
 	{}
 };
 MODULE_DEVICE_TABLE(pci, ish_pci_tbl);

drivers/hid/usbhid/hid-pidff.c+7−4

@@ -1452,10 +1452,13 @@ static int pidff_init_fields(struct pidff_device pidff, struct input_dev dev) · 1451 unmodified lines
1452	hid_warn(pidff->hid, "unknown ramp effect layout\n");	1452	hid_warn(pidff->hid, "unknown ramp effect layout\n");
1453		1453
1454	if (PIDFF_FIND_FIELDS(set_condition, PID_SET_CONDITION, 1)) {	1454	if (PIDFF_FIND_FIELDS(set_condition, PID_SET_CONDITION, 1)) {
1455	if (test_and_clear_bit(FF_SPRING, dev->ffbit) \|\|	1455	bool test = false;
1456	test_and_clear_bit(FF_DAMPER, dev->ffbit) \|\|	1456
1457	test_and_clear_bit(FF_FRICTION, dev->ffbit) \|\|	1457	test \|= test_and_clear_bit(FF_SPRING, dev->ffbit);
1458	test_and_clear_bit(FF_INERTIA, dev->ffbit))	1458	test \|= test_and_clear_bit(FF_DAMPER, dev->ffbit);
		1459	test \|= test_and_clear_bit(FF_FRICTION, dev->ffbit);
		1460	test \|= test_and_clear_bit(FF_INERTIA, dev->ffbit);
		1461	if (test)
1459	hid_warn(pidff->hid, "unknown condition effect layout\n");	1462	hid_warn(pidff->hid, "unknown condition effect layout\n");
1460	}	1463	}
1461		1464

drivers/hwmon/Kconfig+2−14

 config SENSORS_LM75
 	tristate "National Semiconductor LM75 and compatibles"
-	depends on I2C
+	depends on I3C_OR_I2C
-	depends on I3C || !I3C
 	select REGMAP_I2C
 	select REGMAP_I3C if I3C
 	help
 	  This driver can also be built as a module. If so, the module
 	  will be called raspberrypi-hwmon.
-config SENSORS_SA67MCU
-	tristate "Kontron sa67mcu hardware monitoring driver"
-	depends on MFD_SL28CPLD || COMPILE_TEST
-	help
-	  If you say yes here you get support for the voltage and temperature
-	  monitor of the sa67 board management controller.
-	  This driver can also be built as a module.  If so, the module
-	  will be called sa67mcu-hwmon.
 config SENSORS_SL28CPLD
 	tristate "Kontron sl28cpld hardware monitoring driver"
 	depends on MFD_SL28CPLD || COMPILE_TEST
 config SENSORS_TMP108
 	tristate "Texas Instruments TMP108"
-	depends on I2C
+	depends on I3C_OR_I2C
-	depends on I3C || !I3C
 	select REGMAP_I2C
 	select REGMAP_I3C if I3C
 	help

drivers/hwmon/Makefile+0−1

@@ -199,7 +199,6 @@ obj-$(CONFIG_SENSORS_PT5161L) += pt5161l.o · 198 unmodified lines
199	obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o	199	obj-$(CONFIG_SENSORS_PWM_FAN) += pwm-fan.o
200	obj-$(CONFIG_SENSORS_QNAP_MCU_HWMON) += qnap-mcu-hwmon.o	200	obj-$(CONFIG_SENSORS_QNAP_MCU_HWMON) += qnap-mcu-hwmon.o
201	obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o	201	obj-$(CONFIG_SENSORS_RASPBERRYPI_HWMON) += raspberrypi-hwmon.o
202	obj-$(CONFIG_SENSORS_SA67MCU) += sa67mcu-hwmon.o
203	obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o	202	obj-$(CONFIG_SENSORS_SBTSI) += sbtsi_temp.o
204	obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o	203	obj-$(CONFIG_SENSORS_SBRMI) += sbrmi.o
205	obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o	204	obj-$(CONFIG_SENSORS_SCH56XX_COMMON)+= sch56xx-common.o

drivers/hwmon/aht10.c+4−2

 #define AHT10_CMD_MEAS	0b10101100
 #define AHT10_CMD_RST	0b10111010
-#define DHT20_CMD_INIT	0x71
+#define AHT20_CMD_INIT	0b10111110
+#define DHT20_CMD_INIT	0b01110001
 /*
  * Flags in the answer byte/command
 		data->meas_size = AHT20_MEAS_SIZE;
 		data->crc8 = true;
 		crc8_populate_msb(crc8_table, AHT20_CRC8_POLY);
-		data->init_cmd = AHT10_CMD_INIT;
+		data->init_cmd = AHT20_CMD_INIT;
 		break;
 	case dht20:
 		data->meas_size = AHT20_MEAS_SIZE;

drivers/hwmon/it87.c+4−1

 {
 	struct platform_device *pdev = to_platform_device(dev);
 	struct it87_data *data = dev_get_drvdata(dev);
+	int err;
 	it87_resume_sio(pdev);
-	it87_lock(data);
+	err = it87_lock(data);
+	if (err)
+		return err;
 	it87_check_pwm(dev);
 	it87_check_limit_regs(data);

drivers/hwmon/macsmc-hwmon.c+27−26

 #include <linux/bitfield.h>
 #include <linux/hwmon.h>
+#include <linux/math64.h>
 #include <linux/mfd/macsmc.h>
 #include <linux/module.h>
 #include <linux/of.h>
 	if (ret < 0)
 		return ret;
-	*p = mult_frac(val, scale, 65536);
+	*p = mul_u64_u32_div(val, scale, 65536);
 	return 0;
 }
  * them.
  */
 static int macsmc_hwmon_read_f32_scaled(struct apple_smc *smc, smc_key key,
-					int *p, int scale)
+					long *p, int scale)
 {
 	u32 fval;
 	u64 val;
 		val = 0;
 	else if (exp < 0)
 		val >>= -exp;
-	else if (exp != 0 && (val & ~((1UL << (64 - exp)) - 1))) /* overflow */
+	else if (exp != 0 && (val & ~((1ULL << (64 - exp)) - 1))) /* overflow */
 		val = U64_MAX;
 	else
 		val <<= exp;
 	if (fval & FLT_SIGN_MASK) {
-		if (val > (-(s64)INT_MIN))
+		if (val > (u64)LONG_MAX + 1)
-			*p = INT_MIN;
+			*p = LONG_MIN;
 		else
-			*p = -val;
+			*p = -(long)val;
 	} else {
-		if (val > INT_MAX)
+		if (val > (u64)LONG_MAX)
-			*p = INT_MAX;
+			*p = LONG_MAX;
 		else
-			*p = val;
+			*p = (long)val;
 	}
 	return 0;
 	switch (sensor->info.type_code) {
 	/* 32-bit IEEE 754 float */
 	case __SMC_KEY('f', 'l', 't', ' '): {
-		u32 flt_ = 0;
+		long flt_ = 0;
 		ret = macsmc_hwmon_read_f32_scaled(smc, sensor->macsmc_key,
 						   &flt_, scale);
 		if (ret)
 			return ret;
-		*val = (long)ioft;
+		if (ioft > LONG_MAX)
+			*val = LONG_MAX;
+		else
+			*val = (long)ioft;
 		break;
 	}
 	default:
 	return 0;
 }
-static int macsmc_hwmon_write_f32(struct apple_smc *smc, smc_key key, int value)
+static int macsmc_hwmon_write_f32(struct apple_smc *smc, smc_key key, long value)
 {
 	u64 val;
 	u32 fval = 0;
-	int exp = 0, neg;
+	int exp, neg;
+	neg = value < 0;
 	val = abs(value);
-	neg = val != value;
 	if (val) {
-		int msb = __fls(val) - exp;
+		exp = __fls(val);
-		if (msb > 23) {
+		if (exp > 23)
-			val >>= msb - FLT_MANT_BIAS;
+			val >>= exp - 23;
-			exp -= msb - FLT_MANT_BIAS;
+		else
-		} else if (msb < 23) {
+			val <<= 23 - exp;
-			val <<= FLT_MANT_BIAS - msb;
-			exp += msb;
-		}
 		fval = FIELD_PREP(FLT_SIGN_MASK, neg) |
 		       FIELD_PREP(FLT_EXP_MASK, exp + FLT_EXP_BIAS) |
-		       FIELD_PREP(FLT_MANT_MASK, val);
+		       FIELD_PREP(FLT_MANT_MASK, val & FLT_MANT_MASK);
 	}
 	return apple_smc_write_u32(smc, key, fval);
 		if (!hwmon->volt.sensors)
 			return -ENOMEM;
-		for_each_child_of_node_with_prefix(hwmon_node, key_node, "volt-") {
+		for_each_child_of_node_with_prefix(hwmon_node, key_node, "voltage-") {
-			sensor = &hwmon->temp.sensors[hwmon->temp.count];
+			sensor = &hwmon->volt.sensors[hwmon->volt.count];
 			if (!macsmc_hwmon_create_sensor(hwmon->dev, hwmon->smc, key_node, sensor)) {
 				sensor->attrs = HWMON_I_INPUT;

drivers/hwmon/max6639.c+1−1

@@ -607,7 +607,7 @@ static int max6639_init_client(struct i2c_client *client, · 606 unmodified lines
607	return err;	607	return err;
608		608
609	/* Fans PWM polarity high by default */	609	/* Fans PWM polarity high by default */
610	err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG2a(i), 0x00);	610	err = regmap_write(data->regmap, MAX6639_REG_FAN_CONFIG2a(i), 0x02);
611	if (err)	611	if (err)
612	return err;	612	return err;
613		613

drivers/hwmon/pmbus/q54sj108a2.c+10−9

@@ -79,7 +79,8 @@ static ssize_t q54sj108a2_debugfs_read(struct file file, char __user buf, · 78 unmodified lines
79	int idx = *idxp;	79	int idx = *idxp;
80	struct q54sj108a2_data *psu = to_psu(idxp, idx);	80	struct q54sj108a2_data *psu = to_psu(idxp, idx);
81	char data[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };	81	char data[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };
82	char data_char[I2C_SMBUS_BLOCK_MAX + 2] = { 0 };	82	char data_char[I2C_SMBUS_BLOCK_MAX * 2 + 2] = { 0 };
		83	char *out = data;
83	char *res;	84	char *res;
84		85
85	switch (idx) {	86	switch (idx) {
@@ -150,27 +151,27 @@ static ssize_t q54sj108a2_debugfs_read(struct file file, char __user buf, · 64 unmodified lines
150	if (rc < 0)	151	if (rc < 0)
151	return rc;	152	return rc;
152		153
153	res = bin2hex(data, data_char, 32);	154	res = bin2hex(data_char, data, rc);
154	rc = res - data;	155	rc = res - data_char;
155		156	out = data_char;
156	break;	157	break;
157	case Q54SJ108A2_DEBUGFS_FLASH_KEY:	158	case Q54SJ108A2_DEBUGFS_FLASH_KEY:
158	rc = i2c_smbus_read_block_data(psu->client, PMBUS_FLASH_KEY_WRITE, data);	159	rc = i2c_smbus_read_block_data(psu->client, PMBUS_FLASH_KEY_WRITE, data);
159	if (rc < 0)	160	if (rc < 0)
160	return rc;	161	return rc;
161		162
162	res = bin2hex(data, data_char, 4);	163	res = bin2hex(data_char, data, rc);
163	rc = res - data;	164	rc = res - data_char;
164		165	out = data_char;
165	break;	166	break;
166	default:	167	default:
167	return -EINVAL;	168	return -EINVAL;
168	}	169	}
169		170
170	data[rc] = '\n';	171	out[rc] = '\n';
171	rc += 2;	172	rc += 2;
172		173
173	return simple_read_from_buffer(buf, count, ppos, data, rc);	174	return simple_read_from_buffer(buf, count, ppos, out, rc);
174	}	175	}
175		176
176	static ssize_t q54sj108a2_debugfs_write(struct file file, const char __user buf,	177	static ssize_t q54sj108a2_debugfs_write(struct file file, const char __user buf,

drivers/hwmon/sa67mcu-hwmon.c+0−161

@@ -1,161 +0,0 @@
1	// SPDX-License-Identifier: GPL-2.0-only
2	/*
3	* sl67mcu hardware monitoring driver
4	*
5	* Copyright 2025 Kontron Europe GmbH
6	*/
7
8	#include <linux/bitfield.h>
9	#include <linux/hwmon.h>
10	#include <linux/kernel.h>
11	#include <linux/mod_devicetable.h>
12	#include <linux/module.h>
13	#include <linux/platform_device.h>
14	#include <linux/property.h>
15	#include <linux/regmap.h>
16
17	#define SA67MCU_VOLTAGE(n) (0x00 + ((n) * 2))
18	#define SA67MCU_TEMP(n) (0x04 + ((n) * 2))
19
20	struct sa67mcu_hwmon {
21	struct regmap *regmap;
22	u32 offset;
23	};
24
25	static int sa67mcu_hwmon_read(struct device *dev,
26	enum hwmon_sensor_types type, u32 attr,
27	int channel, long *input)
28	{
29	struct sa67mcu_hwmon *hwmon = dev_get_drvdata(dev);
30	unsigned int offset;
31	u8 reg[2];
32	int ret;
33
34	switch (type) {
35	case hwmon_in:
36	switch (attr) {
37	case hwmon_in_input:
38	offset = hwmon->offset + SA67MCU_VOLTAGE(channel);
39	break;
40	default:
41	return -EOPNOTSUPP;
42	}
43	break;
44	case hwmon_temp:
45	switch (attr) {
46	case hwmon_temp_input:
47	offset = hwmon->offset + SA67MCU_TEMP(channel);
48	break;
49	default:
50	return -EOPNOTSUPP;
51	}
52	break;
53	default:
54	return -EOPNOTSUPP;
55	}
56
57	/* Reading the low byte will capture the value */
58	ret = regmap_bulk_read(hwmon->regmap, offset, reg, ARRAY_SIZE(reg));
59	if (ret)
60	return ret;
61
62	*input = reg[1] << 8 \| reg[0];
63
64	/* Temperatures are s16 and in 0.1degC steps. */
65	if (type == hwmon_temp)
66	input = sign_extend32(input, 15) * 100;
67
68	return 0;
69	}
70
71	static const struct hwmon_channel_info * const sa67mcu_hwmon_info[] = {
72	HWMON_CHANNEL_INFO(in,
73	HWMON_I_INPUT \| HWMON_I_LABEL,
74	HWMON_I_INPUT \| HWMON_I_LABEL),
75	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
76	NULL
77	};
78
79	static const char *const sa67mcu_hwmon_in_labels[] = {
80	"VDDIN",
81	"VDD_RTC",
82	};
83
84	static int sa67mcu_hwmon_read_string(struct device *dev,
85	enum hwmon_sensor_types type, u32 attr,
86	int channel, const char **str)
87	{
88	switch (type) {
89	case hwmon_in:
90	switch (attr) {
91	case hwmon_in_label:
92	*str = sa67mcu_hwmon_in_labels[channel];
93	return 0;
94	default:
95	return -EOPNOTSUPP;
96	}
97	default:
98	return -EOPNOTSUPP;
99	}
100	}
101
102	static const struct hwmon_ops sa67mcu_hwmon_ops = {
103	.visible = 0444,
104	.read = sa67mcu_hwmon_read,
105	.read_string = sa67mcu_hwmon_read_string,
106	};
107
108	static const struct hwmon_chip_info sa67mcu_hwmon_chip_info = {
109	.ops = &sa67mcu_hwmon_ops,
110	.info = sa67mcu_hwmon_info,
111	};
112
113	static int sa67mcu_hwmon_probe(struct platform_device *pdev)
114	{
115	struct sa67mcu_hwmon *hwmon;
116	struct device *hwmon_dev;
117	int ret;
118
119	if (!pdev->dev.parent)
120	return -ENODEV;
121
122	hwmon = devm_kzalloc(&pdev->dev, sizeof(*hwmon), GFP_KERNEL);
123	if (!hwmon)
124	return -ENOMEM;
125
126	hwmon->regmap = dev_get_regmap(pdev->dev.parent, NULL);
127	if (!hwmon->regmap)
128	return -ENODEV;
129
130	ret = device_property_read_u32(&pdev->dev, "reg", &hwmon->offset);
131	if (ret)
132	return -EINVAL;
133
134	hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
135	"sa67mcu_hwmon", hwmon,
136	&sa67mcu_hwmon_chip_info,
137	NULL);
138	if (IS_ERR(hwmon_dev))
139	dev_err(&pdev->dev, "failed to register as hwmon device");
140
141	return PTR_ERR_OR_ZERO(hwmon_dev);
142	}
143
144	static const struct of_device_id sa67mcu_hwmon_of_match[] = {
145	{ .compatible = "kontron,sa67mcu-hwmon", },
146	{}
147	};
148	MODULE_DEVICE_TABLE(of, sa67mcu_hwmon_of_match);
149
150	static struct platform_driver sa67mcu_hwmon_driver = {
151	.probe = sa67mcu_hwmon_probe,
152	.driver = {
153	.name = "sa67mcu-hwmon",
154	.of_match_table = sa67mcu_hwmon_of_match,
155	},
156	};
157	module_platform_driver(sa67mcu_hwmon_driver);
158
159	MODULE_DESCRIPTION("sa67mcu Hardware Monitoring Driver");
160	MODULE_AUTHOR("Michael Walle <mwalle@kernel.org>");
161	MODULE_LICENSE("GPL");

drivers/i2c/busses/i2c-i801.c+10−4

 	/*
 	 * If set to true the host controller registers are reserved for
-	 * ACPI AML use.
+	 * ACPI AML use. Needs extra protection by acpi_lock.
 	 */
 	bool acpi_reserved;
+	struct mutex acpi_lock;
 };
 #define FEATURE_SMBUS_PEC	BIT(0)
 	int hwpec, ret;
 	struct i801_priv *priv = i2c_get_adapdata(adap);
-	if (priv->acpi_reserved)
+	mutex_lock(&priv->acpi_lock);
+	if (priv->acpi_reserved) {
+		mutex_unlock(&priv->acpi_lock);
 		return -EBUSY;
+	}
 	pm_runtime_get_sync(&priv->pci_dev->dev);
 	iowrite8(SMBHSTSTS_INUSE_STS | STATUS_FLAGS, SMBHSTSTS(priv));
 	pm_runtime_put_autosuspend(&priv->pci_dev->dev);
+	mutex_unlock(&priv->acpi_lock);
 	return ret;
 }
 	 * further access from the driver itself. This device is now owned
 	 * by the system firmware.
 	 */
-	i2c_lock_bus(&priv->adapter, I2C_LOCK_SEGMENT);
+	mutex_lock(&priv->acpi_lock);
 	if (!priv->acpi_reserved && i801_acpi_is_smbus_ioport(priv, address)) {
 		priv->acpi_reserved = true;
 	else
 		status = acpi_os_write_port(address, (u32)*value, bits);
-	i2c_unlock_bus(&priv->adapter, I2C_LOCK_SEGMENT);
+	mutex_unlock(&priv->acpi_lock);
 	return status;
 }
 	priv->adapter.dev.parent = &dev->dev;
 	acpi_use_parent_companion(&priv->adapter.dev);
 	priv->adapter.retries = 3;
+	mutex_init(&priv->acpi_lock);
 	priv->pci_dev = dev;
 	priv->features = id->driver_data;

drivers/i3c/Kconfig+12−0

@@ -22,3 +22,15 @@ menuconfig I3C · 21 unmodified lines
22	if I3C	22	if I3C
23	source "drivers/i3c/master/Kconfig"	23	source "drivers/i3c/master/Kconfig"
24	endif # I3C	24	endif # I3C
		25
		26	config I3C_OR_I2C
		27	tristate
		28	default m if I3C=m
		29	default I2C
		30	help
		31	Device drivers using module_i3c_i2c_driver() can use either
		32	i2c or i3c hosts, but cannot be built-in for the kernel when
		33	CONFIG_I3C=m.
		34
		35	Add 'depends on I2C_OR_I3C' in Kconfig for those drivers to
		36	get the correct dependencies.

drivers/i3c/master/dw-i3c-master.c+4−2

 		master->free_pos &= ~BIT(pos);
 	}
-	writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(dev->info.dyn_addr),
+	writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(dev->info.dyn_addr) | DEV_ADDR_TABLE_SIR_REJECT,
 	       master->regs +
 	       DEV_ADDR_TABLE_LOC(master->datstartaddr, data->index));
 	master->free_pos &= ~BIT(pos);
 	i3c_dev_set_master_data(dev, data);
-	writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(master->devs[pos].addr),
+	writel(DEV_ADDR_TABLE_DYNAMIC_ADDR(master->devs[pos].addr) | DEV_ADDR_TABLE_SIR_REJECT,
 	       master->regs +
 	       DEV_ADDR_TABLE_LOC(master->datstartaddr, data->index));
 		pm_runtime_get_noresume(&pdev->dev);
 	INIT_WORK(&master->hj_work, dw_i3c_hj_work);
+	device_set_of_node_from_dev(&master->base.i2c.dev, &pdev->dev);
 	ret = i3c_master_register(&master->base, &pdev->dev,
 				  &dw_mipi_i3c_ops, false);
 	if (ret)

drivers/i3c/master/mipi-i3c-hci/cmd.h+1−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	#define CMD_0_TOC W0_BIT_(31)	17	#define CMD_0_TOC W0_BIT_(31)
18	#define CMD_0_ROC W0_BIT_(30)	18	#define CMD_0_ROC W0_BIT_(30)
19	#define CMD_0_ATTR W0_MASK(2, 0)	19	#define CMD_0_ATTR W0_MASK(2, 0)
		20	#define CMD_0_TID W0_MASK(6, 3)
20		21
21	/*	22	/*
22	* Response Descriptor Structure	23	* Response Descriptor Structure

drivers/i3c/master/mipi-i3c-hci/cmd_v1.c+3−5

 			CMD_A0_ROC | CMD_A0_TOC;
 		xfer->cmd_desc[1] = 0;
 		xfer->completion = &done;
-		hci->io->queue_xfer(hci, xfer, 1);
+		xfer->timeout = HZ;
-		if (!wait_for_completion_timeout(&done, HZ) &&
+		ret = i3c_hci_process_xfer(hci, xfer, 1);
-		    hci->io->dequeue_xfer(hci, xfer, 1)) {
+		if (ret)
-			ret = -ETIME;
 			break;
-		}
 		if ((RESP_STATUS(xfer->response) == RESP_ERR_ADDR_HEADER ||
 		     RESP_STATUS(xfer->response) == RESP_ERR_NACK) &&
 		    RESP_DATA_LENGTH(xfer->response) == 1) {

drivers/i3c/master/mipi-i3c-hci/cmd_v2.c+3−5

 	xfer[0].rnw = true;
 	xfer[0].cmd_desc[1] = CMD_A1_DATA_LENGTH(8);
 	xfer[1].completion = &done;
+	xfer[1].timeout = HZ;
 	for (;;) {
 		ret = i3c_master_get_free_addr(&hci->master, next_addr);
 			CMD_A0_ASSIGN_ADDRESS(next_addr) |
 			CMD_A0_ROC |
 			CMD_A0_TOC;
-		hci->io->queue_xfer(hci, xfer, 2);
+		ret = i3c_hci_process_xfer(hci, xfer, 2);
-		if (!wait_for_completion_timeout(&done, HZ) &&
+		if (ret)
-		    hci->io->dequeue_xfer(hci, xfer, 2)) {
-			ret = -ETIME;
 			break;
-		}
 		if (RESP_STATUS(xfer[0].response) != RESP_SUCCESS) {
 			ret = 0;  /* no more devices to be assigned */
 			break;

drivers/i3c/master/mipi-i3c-hci/core.c+90−53

 	if (hci->quirks & HCI_QUIRK_RESP_BUF_THLD)
 		amd_set_resp_buf_thld(hci);
-	reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE);
+	scoped_guard(spinlock_irqsave, &hci->lock)
+		hci->irq_inactive = false;
+	/* Enable bus with Hot-Join disabled */
+	reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE | HC_CONTROL_HOT_JOIN_CTRL);
 	dev_dbg(&hci->master.dev, "HC_CONTROL = %#x", reg_read(HC_CONTROL));
 	return 0;
 	return ret;
 }
+static int i3c_hci_software_reset(struct i3c_hci *hci)
+{
+	u32 regval;
+	int ret;
+	/*
+	 * SOFT_RST must be clear before we write to it.
+	 * Then we must wait until it clears again.
+	 */
+	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
+				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
+	if (ret) {
+		dev_err(&hci->master.dev, "%s: Software reset stuck\n", __func__);
+		return ret;
+	}
+	reg_write(RESET_CONTROL, SOFT_RST);
+	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
+				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
+	if (ret) {
+		dev_err(&hci->master.dev, "%s: Software reset failed\n", __func__);
+		return ret;
+	}
+	return 0;
+}
 void i3c_hci_sync_irq_inactive(struct i3c_hci *hci)
 {
 	struct platform_device *pdev = to_platform_device(hci->master.dev.parent);
 	int irq = platform_get_irq(pdev, 0);
 	reg_write(INTR_SIGNAL_ENABLE, 0x0);
-	hci->irq_inactive = true;
 	synchronize_irq(irq);
+	scoped_guard(spinlock_irqsave, &hci->lock)
+		hci->irq_inactive = true;
 }
 static void i3c_hci_bus_cleanup(struct i3c_master_controller *m)
 {
 	struct i3c_hci *hci = to_i3c_hci(m);
-	i3c_hci_bus_disable(hci);
+	if (i3c_hci_bus_disable(hci))
+		i3c_hci_software_reset(hci);
 	hci->io->cleanup(hci);
 }
 	reg_write(DCT_SECTION, FIELD_PREP(DCT_TABLE_INDEX, 0));
 }
+int i3c_hci_process_xfer(struct i3c_hci *hci, struct hci_xfer *xfer, int n)
+{
+	struct completion *done = xfer[n - 1].completion;
+	unsigned long timeout = xfer[n - 1].timeout;
+	int ret;
+	ret = hci->io->queue_xfer(hci, xfer, n);
+	if (ret)
+		return ret;
+	if (!wait_for_completion_timeout(done, timeout)) {
+		if (hci->io->dequeue_xfer(hci, xfer, n)) {
+			dev_err(&hci->master.dev, "%s: timeout error\n", __func__);
+			return -ETIMEDOUT;
+		}
+		return 0;
+	}
+	if (hci->io->handle_error) {
+		bool error = false;
+		for (int i = 0; i < n && !error; i++)
+			error = RESP_STATUS(xfer[i].response);
+		if (error)
+			return hci->io->handle_error(hci, xfer, n);
+	}
+	return 0;
+}
 static int i3c_hci_send_ccc_cmd(struct i3c_master_controller *m,
 				struct i3c_ccc_cmd *ccc)
 {
 	last = i - 1;
 	xfer[last].cmd_desc[0] |= CMD_0_TOC;
 	xfer[last].completion = &done;
+	xfer[last].timeout = HZ;
 	if (prefixed)
 		xfer--;
-	ret = hci->io->queue_xfer(hci, xfer, nxfers);
+	ret = i3c_hci_process_xfer(hci, xfer, nxfers);
 	if (ret)
 		goto out;
-	if (!wait_for_completion_timeout(&done, HZ) &&
-	    hci->io->dequeue_xfer(hci, xfer, nxfers)) {
-		ret = -ETIME;
-		goto out;
-	}
 	for (i = prefixed; i < nxfers; i++) {
 		if (ccc->rnw)
 			ccc->dests[i - prefixed].payload.len =
 	last = i - 1;
 	xfer[last].cmd_desc[0] |= CMD_0_TOC;
 	xfer[last].completion = &done;
+	xfer[last].timeout = HZ;
-	ret = hci->io->queue_xfer(hci, xfer, nxfers);
+	ret = i3c_hci_process_xfer(hci, xfer, nxfers);
 	if (ret)
 		goto out;
-	if (!wait_for_completion_timeout(&done, HZ) &&
-	    hci->io->dequeue_xfer(hci, xfer, nxfers)) {
-		ret = -ETIME;
-		goto out;
-	}
 	for (i = 0; i < nxfers; i++) {
 		if (i3c_xfers[i].rnw)
 			i3c_xfers[i].len = RESP_DATA_LENGTH(xfer[i].response);
 	last = i - 1;
 	xfer[last].cmd_desc[0] |= CMD_0_TOC;
 	xfer[last].completion = &done;
+	xfer[last].timeout = m->i2c.timeout;
-	ret = hci->io->queue_xfer(hci, xfer, nxfers);
+	ret = i3c_hci_process_xfer(hci, xfer, nxfers);
 	if (ret)
 		goto out;
-	if (!wait_for_completion_timeout(&done, m->i2c.timeout) &&
-	    hci->io->dequeue_xfer(hci, xfer, nxfers)) {
-		ret = -ETIME;
-		goto out;
-	}
 	for (i = 0; i < nxfers; i++) {
 		if (RESP_STATUS(xfer[i].response) != RESP_SUCCESS) {
 			ret = -EIO;
 	irqreturn_t result = IRQ_NONE;
 	u32 val;
+	guard(spinlock)(&hci->lock);
 	/*
 	 * The IRQ can be shared, so the handler may be called when the IRQ is
 	 * due to a different device. That could happen when runtime suspended,
 	return result;
 }
-static int i3c_hci_software_reset(struct i3c_hci *hci)
-{
-	u32 regval;
-	int ret;
-	/*
-	 * SOFT_RST must be clear before we write to it.
-	 * Then we must wait until it clears again.
-	 */
-	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
-				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
-	if (ret) {
-		dev_err(&hci->master.dev, "%s: Software reset stuck\n", __func__);
-		return ret;
-	}
-	reg_write(RESET_CONTROL, SOFT_RST);
-	ret = readx_poll_timeout(reg_read, RESET_CONTROL, regval,
-				 !(regval & SOFT_RST), 0, 10 * USEC_PER_MSEC);
-	if (ret) {
-		dev_err(&hci->master.dev, "%s: Software reset failed\n", __func__);
-		return ret;
-	}
-	return 0;
-}
 static inline bool is_version_1_1_or_newer(struct i3c_hci *hci)
 {
 	return hci->version_major > 1 || (hci->version_major == 1 && hci->version_minor > 0);
 	int ret;
 	ret = i3c_hci_bus_disable(hci);
-	if (ret)
+	if (ret) {
+		/* Fall back to software reset to disable the bus */
+		ret = i3c_hci_software_reset(hci);
+		i3c_hci_sync_irq_inactive(hci);
 		return ret;
+	}
 	hci->io->suspend(hci);
 	mipi_i3c_hci_dat_v1.restore(hci);
-	hci->irq_inactive = false;
 	hci->io->resume(hci);
-	reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE);
+	scoped_guard(spinlock_irqsave, &hci->lock)
+		hci->irq_inactive = false;
+	/* Enable bus with Hot-Join disabled */
+	reg_set(HC_CONTROL, HC_CONTROL_BUS_ENABLE | HC_CONTROL_HOT_JOIN_CTRL);
 	return 0;
 }
 	if (!hci)
 		return -ENOMEM;
+	spin_lock_init(&hci->lock);
+	mutex_init(&hci->control_mutex);
 	/*
 	 * Multi-bus instances share the same MMIO address range, but not
 	 * necessarily in separate contiguous sub-ranges. To avoid overlapping
 	if (ret)
 		return ret;
+	hci->irq_inactive = true;
 	irq = platform_get_irq(pdev, 0);
 	ret = devm_request_irq(&pdev->dev, irq, i3c_hci_irq_handler,
 			       IRQF_SHARED, NULL, hci);

drivers/i3c/master/mipi-i3c-hci/dma.c+84−74

@@ -129,9 +129,8 @@ struct hci_rh_data { · 128 unmodified lines
129	dma_addr_t xfer_dma, resp_dma, ibi_status_dma, ibi_data_dma;	129	dma_addr_t xfer_dma, resp_dma, ibi_status_dma, ibi_data_dma;
130	unsigned int xfer_entries, ibi_status_entries, ibi_chunks_total;	130	unsigned int xfer_entries, ibi_status_entries, ibi_chunks_total;
131	unsigned int xfer_struct_sz, resp_struct_sz, ibi_status_sz, ibi_chunk_sz;	131	unsigned int xfer_struct_sz, resp_struct_sz, ibi_status_sz, ibi_chunk_sz;
132	unsigned int done_ptr, ibi_chunk_ptr;	132	unsigned int done_ptr, ibi_chunk_ptr, xfer_space;
133	struct hci_xfer **src_xfers;	133	struct hci_xfer **src_xfers;
134	spinlock_t lock;
135	struct completion op_done;	134	struct completion op_done;
136	};	135	};
137		136
@@ -261,6 +260,7 @@ ring_ready: · 123 unmodified lines
261		260
262	rh->done_ptr = 0;	261	rh->done_ptr = 0;
263	rh->ibi_chunk_ptr = 0;	262	rh->ibi_chunk_ptr = 0;
		263	rh->xfer_space = rh->xfer_entries;
264	}	264	}
265		265
266	static void hci_dma_init_rings(struct i3c_hci *hci)	266	static void hci_dma_init_rings(struct i3c_hci *hci)
@@ -344,7 +344,6 @@ static int hci_dma_init(struct i3c_hci *hci) · 77 unmodified lines
344	goto err_out;	344	goto err_out;
345	rh = &rings->headers[i];	345	rh = &rings->headers[i];
346	rh->regs = hci->base_regs + offset;	346	rh->regs = hci->base_regs + offset;
347	spin_lock_init(&rh->lock);
348	init_completion(&rh->op_done);	347	init_completion(&rh->op_done);
349		348
350	rh->xfer_entries = XFER_RING_ENTRIES;	349	rh->xfer_entries = XFER_RING_ENTRIES;
@@ -439,26 +438,63 @@ static void hci_dma_unmap_xfer(struct i3c_hci *hci, · 88 unmodified lines
439	}	438	}
440	}	439	}
441		440
		441	static struct i3c_dma hci_dma_map_xfer(struct device dev, struct hci_xfer *xfer)
		442	{
		443	enum dma_data_direction dir = xfer->rnw ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
		444	bool need_bounce = device_iommu_mapped(dev) && xfer->rnw && (xfer->data_len & 3);
		445
		446	return i3c_master_dma_map_single(dev, xfer->data, xfer->data_len, need_bounce, dir);
		447	}
		448
		449	static int hci_dma_map_xfer_list(struct i3c_hci hci, struct device dev,
		450	struct hci_xfer *xfer_list, int n)
		451	{
		452	for (int i = 0; i < n; i++) {
		453	struct hci_xfer *xfer = xfer_list + i;
		454
		455	if (!xfer->data)
		456	continue;
		457
		458	xfer->dma = hci_dma_map_xfer(dev, xfer);
		459	if (!xfer->dma) {
		460	hci_dma_unmap_xfer(hci, xfer_list, i);
		461	return -ENOMEM;
		462	}
		463	}
		464
		465	return 0;
		466	}
		467
442	static int hci_dma_queue_xfer(struct i3c_hci *hci,	468	static int hci_dma_queue_xfer(struct i3c_hci *hci,
443	struct hci_xfer *xfer_list, int n)	469	struct hci_xfer *xfer_list, int n)
444	{	470	{
445	struct hci_rings_data *rings = hci->io_data;	471	struct hci_rings_data *rings = hci->io_data;
446	struct hci_rh_data *rh;	472	struct hci_rh_data *rh;
447	unsigned int i, ring, enqueue_ptr;	473	unsigned int i, ring, enqueue_ptr;
448	u32 op1_val, op2_val;	474	u32 op1_val;
		475	int ret;
		476
		477	ret = hci_dma_map_xfer_list(hci, rings->sysdev, xfer_list, n);
		478	if (ret)
		479	return ret;
449		480
450	/* For now we only use ring 0 */	481	/* For now we only use ring 0 */
451	ring = 0;	482	ring = 0;
452	rh = &rings->headers[ring];	483	rh = &rings->headers[ring];
453		484
		485	spin_lock_irq(&hci->lock);
		486
		487	if (n > rh->xfer_space) {
		488	spin_unlock_irq(&hci->lock);
		489	hci_dma_unmap_xfer(hci, xfer_list, n);
		490	return -EBUSY;
		491	}
		492
454	op1_val = rh_reg_read(RING_OPERATION1);	493	op1_val = rh_reg_read(RING_OPERATION1);
455	enqueue_ptr = FIELD_GET(RING_OP1_CR_ENQ_PTR, op1_val);	494	enqueue_ptr = FIELD_GET(RING_OP1_CR_ENQ_PTR, op1_val);
456	for (i = 0; i < n; i++) {	495	for (i = 0; i < n; i++) {
457	struct hci_xfer *xfer = xfer_list + i;	496	struct hci_xfer *xfer = xfer_list + i;
458	u32 ring_data = rh->xfer + rh->xfer_struct_sz enqueue_ptr;	497	u32 ring_data = rh->xfer + rh->xfer_struct_sz enqueue_ptr;
459	enum dma_data_direction dir = xfer->rnw ? DMA_FROM_DEVICE :
460	DMA_TO_DEVICE;
461	bool need_bounce;
462		498
463	/* store cmd descriptor */	499	/* store cmd descriptor */
464	*ring_data++ = xfer->cmd_desc[0];	500	*ring_data++ = xfer->cmd_desc[0];
@@ -477,18 +513,6 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci, · 12 unmodified lines
477		513
478	/* 2nd and 3rd words of Data Buffer Descriptor Structure */	514	/* 2nd and 3rd words of Data Buffer Descriptor Structure */
479	if (xfer->data) {	515	if (xfer->data) {
480	need_bounce = device_iommu_mapped(rings->sysdev) &&
481	xfer->rnw &&
482	xfer->data_len != ALIGN(xfer->data_len, 4);
483	xfer->dma = i3c_master_dma_map_single(rings->sysdev,
484	xfer->data,
485	xfer->data_len,
486	need_bounce,
487	dir);
488	if (!xfer->dma) {
489	hci_dma_unmap_xfer(hci, xfer_list, i);
490	return -ENOMEM;
491	}
492	*ring_data++ = lower_32_bits(xfer->dma->addr);	516	*ring_data++ = lower_32_bits(xfer->dma->addr);
493	*ring_data++ = upper_32_bits(xfer->dma->addr);	517	*ring_data++ = upper_32_bits(xfer->dma->addr);
494	} else {	518	} else {
@@ -503,26 +527,14 @@ static int hci_dma_queue_xfer(struct i3c_hci *hci, · 8 unmodified lines
503	xfer->ring_entry = enqueue_ptr;	527	xfer->ring_entry = enqueue_ptr;
504		528
505	enqueue_ptr = (enqueue_ptr + 1) % rh->xfer_entries;	529	enqueue_ptr = (enqueue_ptr + 1) % rh->xfer_entries;
506
507	/*
508	* We may update the hardware view of the enqueue pointer
509	* only if we didn't reach its dequeue pointer.
510	*/
511	op2_val = rh_reg_read(RING_OPERATION2);
512	if (enqueue_ptr == FIELD_GET(RING_OP2_CR_DEQ_PTR, op2_val)) {
513	/* the ring is full */
514	hci_dma_unmap_xfer(hci, xfer_list, i + 1);
515	return -EBUSY;
516	}
517	}	530	}
518		531
519	/* take care to update the hardware enqueue pointer atomically */	532	rh->xfer_space -= n;
520	spin_lock_irq(&rh->lock);	533
521	op1_val = rh_reg_read(RING_OPERATION1);
522	op1_val &= ~RING_OP1_CR_ENQ_PTR;	534	op1_val &= ~RING_OP1_CR_ENQ_PTR;
523	op1_val \|= FIELD_PREP(RING_OP1_CR_ENQ_PTR, enqueue_ptr);	535	op1_val \|= FIELD_PREP(RING_OP1_CR_ENQ_PTR, enqueue_ptr);
524	rh_reg_write(RING_OPERATION1, op1_val);	536	rh_reg_write(RING_OPERATION1, op1_val);
525	spin_unlock_irq(&rh->lock);	537	spin_unlock_irq(&hci->lock);
526		538
527	return 0;	539	return 0;
528	}	540	}
@@ -534,18 +546,29 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, · 5 unmodified lines
534	struct hci_rh_data *rh = &rings->headers[xfer_list[0].ring_number];	546	struct hci_rh_data *rh = &rings->headers[xfer_list[0].ring_number];
535	unsigned int i;	547	unsigned int i;
536	bool did_unqueue = false;	548	bool did_unqueue = false;
537		549	u32 ring_status;
538	/* stop the ring */	550
539	rh_reg_write(RING_CONTROL, RING_CTRL_ABORT);	551	guard(mutex)(&hci->control_mutex);
540	if (wait_for_completion_timeout(&rh->op_done, HZ) == 0) {	552
541	/*	553	ring_status = rh_reg_read(RING_STATUS);
542	* We're deep in it if ever this condition is ever met.	554	if (ring_status & RING_STATUS_RUNNING) {
543	* Hardware might still be writing to memory, etc.	555	/* stop the ring */
544	*/	556	reinit_completion(&rh->op_done);
545	dev_crit(&hci->master.dev, "unable to abort the ring\n");	557	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE \| RING_CTRL_ABORT);
546	WARN_ON(1);	558	wait_for_completion_timeout(&rh->op_done, HZ);
		559	ring_status = rh_reg_read(RING_STATUS);
		560	if (ring_status & RING_STATUS_RUNNING) {
		561	/*
		562	* We're deep in it if ever this condition is ever met.
		563	* Hardware might still be writing to memory, etc.
		564	*/
		565	dev_crit(&hci->master.dev, "unable to abort the ring\n");
		566	WARN_ON(1);
		567	}
547	}	568	}
548		569
		570	spin_lock_irq(&hci->lock);
		571
549	for (i = 0; i < n; i++) {	572	for (i = 0; i < n; i++) {
550	struct hci_xfer *xfer = xfer_list + i;	573	struct hci_xfer *xfer = xfer_list + i;
551	int idx = xfer->ring_entry;	574	int idx = xfer->ring_entry;
@@ -559,7 +582,7 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, · 7 unmodified lines
559	u32 ring_data = rh->xfer + rh->xfer_struct_sz idx;	582	u32 ring_data = rh->xfer + rh->xfer_struct_sz idx;
560		583
561	/* store no-op cmd descriptor */	584	/* store no-op cmd descriptor */
562	*ring_data++ = FIELD_PREP(CMD_0_ATTR, 0x7);	585	*ring_data++ = FIELD_PREP(CMD_0_ATTR, 0x7) \| FIELD_PREP(CMD_0_TID, xfer->cmd_tid);
563	*ring_data++ = 0;	586	*ring_data++ = 0;
564	if (hci->cmd == &mipi_i3c_hci_cmd_v2) {	587	if (hci->cmd == &mipi_i3c_hci_cmd_v2) {
565	*ring_data++ = 0;	588	*ring_data++ = 0;
@@ -577,15 +600,25 @@ static bool hci_dma_dequeue_xfer(struct i3c_hci *hci, · 11 unmodified lines
577	}	600	}
578		601
579	/* restart the ring */	602	/* restart the ring */
		603	mipi_i3c_hci_resume(hci);
580	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE);	604	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE);
		605	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE \| RING_CTRL_RUN_STOP);
		606
		607	spin_unlock_irq(&hci->lock);
581		608
582	return did_unqueue;	609	return did_unqueue;
583	}	610	}
584		611
		612	static int hci_dma_handle_error(struct i3c_hci hci, struct hci_xfer xfer_list, int n)
		613	{
		614	return hci_dma_dequeue_xfer(hci, xfer_list, n) ? -EIO : 0;
		615	}
		616
585	static void hci_dma_xfer_done(struct i3c_hci hci, struct hci_rh_data rh)	617	static void hci_dma_xfer_done(struct i3c_hci hci, struct hci_rh_data rh)
586	{	618	{
587	u32 op1_val, op2_val, resp, *ring_resp;	619	u32 op1_val, op2_val, resp, *ring_resp;
588	unsigned int tid, done_ptr = rh->done_ptr;	620	unsigned int tid, done_ptr = rh->done_ptr;
		621	unsigned int done_cnt = 0;
589	struct hci_xfer *xfer;	622	struct hci_xfer *xfer;
590		623
591	for (;;) {	624	for (;;) {
@@ -603,6 +636,7 @@ static void hci_dma_xfer_done(struct i3c_hci hci, struct hci_rh_data rh) · 11 unmodified lines
603	dev_dbg(&hci->master.dev, "orphaned ring entry");	636	dev_dbg(&hci->master.dev, "orphaned ring entry");
604	} else {	637	} else {
605	hci_dma_unmap_xfer(hci, xfer, 1);	638	hci_dma_unmap_xfer(hci, xfer, 1);
		639	rh->src_xfers[done_ptr] = NULL;
606	xfer->ring_entry = -1;	640	xfer->ring_entry = -1;
607	xfer->response = resp;	641	xfer->response = resp;
608	if (tid != xfer->cmd_tid) {	642	if (tid != xfer->cmd_tid) {
@@ -617,15 +651,14 @@ static void hci_dma_xfer_done(struct i3c_hci hci, struct hci_rh_data rh) · 8 unmodified lines
617		651
618	done_ptr = (done_ptr + 1) % rh->xfer_entries;	652	done_ptr = (done_ptr + 1) % rh->xfer_entries;
619	rh->done_ptr = done_ptr;	653	rh->done_ptr = done_ptr;
		654	done_cnt += 1;
620	}	655	}
621		656
622	/* take care to update the software dequeue pointer atomically */	657	rh->xfer_space += done_cnt;
623	spin_lock(&rh->lock);
624	op1_val = rh_reg_read(RING_OPERATION1);	658	op1_val = rh_reg_read(RING_OPERATION1);
625	op1_val &= ~RING_OP1_CR_SW_DEQ_PTR;	659	op1_val &= ~RING_OP1_CR_SW_DEQ_PTR;
626	op1_val \|= FIELD_PREP(RING_OP1_CR_SW_DEQ_PTR, done_ptr);	660	op1_val \|= FIELD_PREP(RING_OP1_CR_SW_DEQ_PTR, done_ptr);
627	rh_reg_write(RING_OPERATION1, op1_val);	661	rh_reg_write(RING_OPERATION1, op1_val);
628	spin_unlock(&rh->lock);
629	}	662	}
630		663
631	static int hci_dma_request_ibi(struct i3c_hci hci, struct i3c_dev_desc dev,	664	static int hci_dma_request_ibi(struct i3c_hci hci, struct i3c_dev_desc dev,
@@ -805,13 +838,10 @@ static void hci_dma_process_ibi(struct i3c_hci hci, struct hci_rh_data rh) · 173 unmodified lines
805	i3c_master_queue_ibi(dev, slot);	838	i3c_master_queue_ibi(dev, slot);
806		839
807	done:	840	done:
808	/* take care to update the ibi dequeue pointer atomically */
809	spin_lock(&rh->lock);
810	op1_val = rh_reg_read(RING_OPERATION1);	841	op1_val = rh_reg_read(RING_OPERATION1);
811	op1_val &= ~RING_OP1_IBI_DEQ_PTR;	842	op1_val &= ~RING_OP1_IBI_DEQ_PTR;
812	op1_val \|= FIELD_PREP(RING_OP1_IBI_DEQ_PTR, deq_ptr);	843	op1_val \|= FIELD_PREP(RING_OP1_IBI_DEQ_PTR, deq_ptr);
813	rh_reg_write(RING_OPERATION1, op1_val);	844	rh_reg_write(RING_OPERATION1, op1_val);
814	spin_unlock(&rh->lock);
815		845
816	/* update the chunk pointer */	846	/* update the chunk pointer */
817	rh->ibi_chunk_ptr += ibi_chunks;	847	rh->ibi_chunk_ptr += ibi_chunks;
@@ -845,29 +875,8 @@ static bool hci_dma_irq_handler(struct i3c_hci *hci) · 27 unmodified lines
845	hci_dma_xfer_done(hci, rh);	875	hci_dma_xfer_done(hci, rh);
846	if (status & INTR_RING_OP)	876	if (status & INTR_RING_OP)
847	complete(&rh->op_done);	877	complete(&rh->op_done);
848		878	if (status & INTR_TRANSFER_ABORT)
849	if (status & INTR_TRANSFER_ABORT) {	879	dev_dbg(&hci->master.dev, "Ring %d: Transfer Aborted\n", i);
850	u32 ring_status;
851
852	dev_notice_ratelimited(&hci->master.dev,
853	"Ring %d: Transfer Aborted\n", i);
854	mipi_i3c_hci_resume(hci);
855	ring_status = rh_reg_read(RING_STATUS);
856	if (!(ring_status & RING_STATUS_RUNNING) &&
857	status & INTR_TRANSFER_COMPLETION &&
858	status & INTR_TRANSFER_ERR) {
859	/*
860	* Ring stop followed by run is an Intel
861	* specific required quirk after resuming the
862	* halted controller. Do it only when the ring
863	* is not in running state after a transfer
864	* error.
865	*/
866	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE);
867	rh_reg_write(RING_CONTROL, RING_CTRL_ENABLE \|
868	RING_CTRL_RUN_STOP);
869	}
870	}
871	if (status & INTR_IBI_RING_FULL)	880	if (status & INTR_IBI_RING_FULL)
872	dev_err_ratelimited(&hci->master.dev,	881	dev_err_ratelimited(&hci->master.dev,
873	"Ring %d: IBI Ring Full Condition\n", i);	882	"Ring %d: IBI Ring Full Condition\n", i);
@@ -883,6 +892,7 @@ const struct hci_io_ops mipi_i3c_hci_dma = { · 9 unmodified lines
883	.cleanup = hci_dma_cleanup,	892	.cleanup = hci_dma_cleanup,
884	.queue_xfer = hci_dma_queue_xfer,	893	.queue_xfer = hci_dma_queue_xfer,
885	.dequeue_xfer = hci_dma_dequeue_xfer,	894	.dequeue_xfer = hci_dma_dequeue_xfer,
		895	.handle_error = hci_dma_handle_error,
886	.irq_handler = hci_dma_irq_handler,	896	.irq_handler = hci_dma_irq_handler,
887	.request_ibi = hci_dma_request_ibi,	897	.request_ibi = hci_dma_request_ibi,
888	.free_ibi = hci_dma_free_ibi,	898	.free_ibi = hci_dma_free_ibi,

drivers/i3c/master/mipi-i3c-hci/hci.h+5−0

 	const struct hci_io_ops *io;
 	void *io_data;
 	const struct hci_cmd_ops *cmd;
+	spinlock_t lock;
+	struct mutex control_mutex;
 	atomic_t next_cmd_tid;
 	bool irq_inactive;
 	u32 caps;
 	unsigned int data_len;
 	unsigned int cmd_tid;
 	struct completion *completion;
+	unsigned long timeout;
 	union {
 		struct {
 			/* PIO specific */
 	bool (*irq_handler)(struct i3c_hci *hci);
 	int (*queue_xfer)(struct i3c_hci *hci, struct hci_xfer *xfer, int n);
 	bool (*dequeue_xfer)(struct i3c_hci *hci, struct hci_xfer *xfer, int n);
+	int (*handle_error)(struct i3c_hci *hci, struct hci_xfer *xfer, int n);
 	int (*request_ibi)(struct i3c_hci *hci, struct i3c_dev_desc *dev,
 			   const struct i3c_ibi_setup *req);
 	void (*free_ibi)(struct i3c_hci *hci, struct i3c_dev_desc *dev);
 void amd_set_od_pp_timing(struct i3c_hci *hci);
 void amd_set_resp_buf_thld(struct i3c_hci *hci);
 void i3c_hci_sync_irq_inactive(struct i3c_hci *hci);
+int i3c_hci_process_xfer(struct i3c_hci *hci, struct hci_xfer *xfer, int n);
 #endif

drivers/i3c/master/mipi-i3c-hci/pio.c+5−11

 };
 struct hci_pio_data {
-	spinlock_t lock;
 	struct hci_xfer *curr_xfer, *xfer_queue;
 	struct hci_xfer *curr_rx, *rx_queue;
 	struct hci_xfer *curr_tx, *tx_queue;
 		return -ENOMEM;
 	hci->io_data = pio;
-	spin_lock_init(&pio->lock);
 	__hci_pio_init(hci, &size_val);
 		xfer[i].data_left = xfer[i].data_len;
 	}
-	spin_lock_irq(&pio->lock);
+	spin_lock_irq(&hci->lock);
 	prev_queue_tail = pio->xfer_queue;
 	pio->xfer_queue = &xfer[n - 1];
 	if (pio->curr_xfer) {
 			pio_reg_read(INTR_STATUS),
 			pio_reg_read(INTR_SIGNAL_ENABLE));
 	}
-	spin_unlock_irq(&pio->lock);
+	spin_unlock_irq(&hci->lock);
 	return 0;
 }
 	struct hci_pio_data *pio = hci->io_data;
 	int ret;
-	spin_lock_irq(&pio->lock);
+	spin_lock_irq(&hci->lock);
 	dev_dbg(&hci->master.dev, "n=%d status=%#x/%#x", n,
 		pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
 	dev_dbg(&hci->master.dev, "main_status = %#x/%#x",
 		readl(hci->base_regs + 0x20), readl(hci->base_regs + 0x28));
 	ret = hci_pio_dequeue_xfer_common(hci, pio, xfer, n);
-	spin_unlock_irq(&pio->lock);
+	spin_unlock_irq(&hci->lock);
 	return ret;
 }
 	struct hci_pio_data *pio = hci->io_data;
 	u32 status;
-	spin_lock(&pio->lock);
 	status = pio_reg_read(INTR_STATUS);
 	dev_dbg(&hci->master.dev, "PIO_INTR_STATUS %#x/%#x",
 		status, pio->enabled_irqs);
 	status &= pio->enabled_irqs | STAT_LATENCY_WARNINGS;
-	if (!status) {
+	if (!status)
-		spin_unlock(&pio->lock);
 		return false;
-	}
 	if (status & STAT_IBI_STATUS_THLD)
 		hci_pio_process_ibi(hci, pio);
 	pio_reg_write(INTR_SIGNAL_ENABLE, pio->enabled_irqs);
 	dev_dbg(&hci->master.dev, "PIO_INTR_STATUS %#x/%#x",
 		pio_reg_read(INTR_STATUS), pio_reg_read(INTR_SIGNAL_ENABLE));
-	spin_unlock(&pio->lock);
 	return true;
 }

drivers/iio/adc/ad7768-1.c+11−2

 	return ret;
 }
-static void ad7768_fill_scale_tbl(struct iio_dev *dev)
+static int ad7768_fill_scale_tbl(struct iio_dev *dev)
 {
 	struct ad7768_state *st = iio_priv(dev);
 	const struct iio_scan_type *scan_type;
 	u64 tmp2;
 	scan_type = iio_get_current_scan_type(dev, &dev->channels[0]);
+	if (IS_ERR(scan_type)) {
+		dev_err(&st->spi->dev, "Failed to get scan type.\n");
+		return PTR_ERR(scan_type);
+	}
 	if (scan_type->sign == 's')
 		val2 = scan_type->realbits - 1;
 	else
 		st->scale_tbl[i][0] = tmp0; /* Integer part */
 		st->scale_tbl[i][1] = abs(tmp1); /* Fractional part */
 	}
+	return 0;
 }
 static int ad7768_set_sinc3_dec_rate(struct ad7768_state *st,
 	}
 	/* Update scale table: scale values vary according to the precision */
-	ad7768_fill_scale_tbl(dev);
+	ret = ad7768_fill_scale_tbl(dev);
+	if (ret)
+		return ret;
 	ad7768_fill_samp_freq_tbl(st);

drivers/iio/chemical/bme680_core.c+1−1

@@ -613,7 +613,7 @@ static int bme680_wait_for_eoc(struct bme680_data *data) · 612 unmodified lines
613	* + heater duration	613	* + heater duration
614	*/	614	*/
615	int wait_eoc_us = ((data->oversampling_temp + data->oversampling_press +	615	int wait_eoc_us = ((data->oversampling_temp + data->oversampling_press +
616	data->oversampling_humid) * 1936) + (477 * 4) +	616	data->oversampling_humid) * 1963) + (477 * 4) +
617	(477 * 5) + 1000 + (data->heater_dur * 1000);	617	(477 * 5) + 1000 + (data->heater_dur * 1000);
618		618
619	fsleep(wait_eoc_us);	619	fsleep(wait_eoc_us);

drivers/iio/chemical/sps30_i2c.c+1−1

@@ -171,7 +171,7 @@ static int sps30_i2c_read_meas(struct sps30_state state, __be32 meas, size_t n · 170 unmodified lines
171	if (!sps30_i2c_meas_ready(state))	171	if (!sps30_i2c_meas_ready(state))
172	return -ETIMEDOUT;	172	return -ETIMEDOUT;
173		173
174	return sps30_i2c_command(state, SPS30_I2C_READ_MEAS, NULL, 0, meas, sizeof(num) * num);	174	return sps30_i2c_command(state, SPS30_I2C_READ_MEAS, NULL, 0, meas, sizeof(meas) num);
175	}	175	}
176		176
177	static int sps30_i2c_clean_fan(struct sps30_state *state)	177	static int sps30_i2c_clean_fan(struct sps30_state *state)

drivers/iio/chemical/sps30_serial.c+1−1

@@ -303,7 +303,7 @@ static int sps30_serial_read_meas(struct sps30_state state, __be32 meas, size_ · 302 unmodified lines
303	if (msleep_interruptible(1000))	303	if (msleep_interruptible(1000))
304	return -EINTR;	304	return -EINTR;
305		305
306	ret = sps30_serial_command(state, SPS30_SERIAL_READ_MEAS, NULL, 0, meas, num * sizeof(num));	306	ret = sps30_serial_command(state, SPS30_SERIAL_READ_MEAS, NULL, 0, meas, num * sizeof(*meas));
307	if (ret < 0)	307	if (ret < 0)
308	return ret;	308	return ret;
309	/* if measurements aren't ready sensor returns empty frame */	309	/* if measurements aren't ready sensor returns empty frame */

drivers/iio/dac/ds4424.c+1−1

@@ -140,7 +140,7 @@ static int ds4424_write_raw(struct iio_dev *indio_dev, · 139 unmodified lines
140		140
141	switch (mask) {	141	switch (mask) {
142	case IIO_CHAN_INFO_RAW:	142	case IIO_CHAN_INFO_RAW:
143	if (val < S8_MIN \|\| val > S8_MAX)	143	if (val <= S8_MIN \|\| val > S8_MAX)
144	return -EINVAL;	144	return -EINVAL;
145		145
146	if (val > 0) {	146	if (val > 0) {

drivers/iio/frequency/adf4377.c+1−1

@@ -508,7 +508,7 @@ static int adf4377_soft_reset(struct adf4377_state *st) · 507 unmodified lines
508	return ret;	508	return ret;
509		509
510	return regmap_read_poll_timeout(st->regmap, 0x0, read_val,	510	return regmap_read_poll_timeout(st->regmap, 0x0, read_val,
511	!(read_val & (ADF4377_0000_SOFT_RESET_R_MSK \|	511	!(read_val & (ADF4377_0000_SOFT_RESET_MSK \|
512	ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 * 100);	512	ADF4377_0000_SOFT_RESET_R_MSK)), 200, 200 * 100);
513	}	513	}
514		514

drivers/iio/gyro/mpu3050-core.c+13−5

 		}
 	case IIO_CHAN_INFO_RAW:
 		/* Resume device */
-		pm_runtime_get_sync(mpu3050->dev);
+		ret = pm_runtime_resume_and_get(mpu3050->dev);
+		if (ret)
+			return ret;
 		mutex_lock(&mpu3050->lock);
 		ret = mpu3050_set_8khz_samplerate(mpu3050);
 static int mpu3050_buffer_preenable(struct iio_dev *indio_dev)
 {
 	struct mpu3050 *mpu3050 = iio_priv(indio_dev);
+	int ret;
-	pm_runtime_get_sync(mpu3050->dev);
+	ret = pm_runtime_resume_and_get(mpu3050->dev);
+	if (ret)
+		return ret;
 	/* Unless we have OUR trigger active, run at full speed */
-	if (!mpu3050->hw_irq_trigger)
+	if (!mpu3050->hw_irq_trigger) {
-		return mpu3050_set_8khz_samplerate(mpu3050);
+		ret = mpu3050_set_8khz_samplerate(mpu3050);
+		if (ret)
+			pm_runtime_put_autosuspend(mpu3050->dev);
+	}
-	return 0;
+	return ret;
 }
 static int mpu3050_buffer_postdisable(struct iio_dev *indio_dev)

drivers/iio/gyro/mpu3050-i2c.c+1−2

@@ -19,8 +19,7 @@ static int mpu3050_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id) · 18 unmodified lines
19	struct mpu3050 *mpu3050 = i2c_mux_priv(mux);	19	struct mpu3050 *mpu3050 = i2c_mux_priv(mux);
20		20
21	/* Just power up the device, that is all that is needed */	21	/* Just power up the device, that is all that is needed */
22	pm_runtime_get_sync(mpu3050->dev);	22	return pm_runtime_resume_and_get(mpu3050->dev);
23	return 0;
24	}	23	}
25		24
26	static int mpu3050_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)	25	static int mpu3050_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)

drivers/iio/imu/adis.c+1−1

@@ -526,7 +526,7 @@ int adis_init(struct adis adis, struct iio_dev indio_dev, · 525 unmodified lines
526		526
527	adis->spi = spi;	527	adis->spi = spi;
528	adis->data = data;	528	adis->data = data;
529	if (!adis->ops->write && !adis->ops->read && !adis->ops->reset)	529	if (!adis->ops)
530	adis->ops = &adis_default_ops;	530	adis->ops = &adis_default_ops;
531	else if (!adis->ops->write \|\| !adis->ops->read \|\| !adis->ops->reset)	531	else if (!adis->ops->write \|\| !adis->ops->read \|\| !adis->ops->reset)
532	return -EINVAL;	532	return -EINVAL;

drivers/iio/imu/inv_icm42600/inv_icm42600_accel.c+2−0

@@ -651,6 +651,8 @@ static int inv_icm42600_accel_write_odr(struct iio_dev *indio_dev, · 650 unmodified lines
651	return -EINVAL;	651	return -EINVAL;
652		652
653	conf.odr = inv_icm42600_accel_odr_conv[idx / 2];	653	conf.odr = inv_icm42600_accel_odr_conv[idx / 2];
		654	if (conf.odr == st->conf.accel.odr)
		655	return 0;
654		656
655	pm_runtime_get_sync(dev);	657	pm_runtime_get_sync(dev);
656	mutex_lock(&st->lock);	658	mutex_lock(&st->lock);

drivers/iio/imu/inv_icm42600/inv_icm42600_buffer.c+4−0

 static int inv_icm42600_buffer_postdisable(struct iio_dev *indio_dev)
 {
 	struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
+	struct inv_icm42600_sensor_state *sensor_st = iio_priv(indio_dev);
+	struct inv_sensors_timestamp *ts = &sensor_st->ts;
 	struct device *dev = regmap_get_device(st->map);
 	unsigned int sensor;
 	unsigned int *watermark;
 	mutex_lock(&st->lock);
+	inv_sensors_timestamp_apply_odr(ts, 0, 0, 0);
 	ret = inv_icm42600_buffer_set_fifo_en(st, st->fifo.en & ~sensor);
 	if (ret)
 		goto out_unlock;

drivers/iio/imu/inv_icm42600/inv_icm42600_gyro.c+2−0

@@ -358,6 +358,8 @@ static int inv_icm42600_gyro_write_odr(struct iio_dev *indio_dev, · 357 unmodified lines
358	return -EINVAL;	358	return -EINVAL;
359		359
360	conf.odr = inv_icm42600_gyro_odr_conv[idx / 2];	360	conf.odr = inv_icm42600_gyro_odr_conv[idx / 2];
		361	if (conf.odr == st->conf.gyro.odr)
		362	return 0;
361		363
362	pm_runtime_get_sync(dev);	364	pm_runtime_get_sync(dev);
363	mutex_lock(&st->lock);	365	mutex_lock(&st->lock);

drivers/iio/imu/inv_icm45600/inv_icm45600.h+1−1

@@ -205,7 +205,7 @@ struct inv_icm45600_sensor_state { · 204 unmodified lines
205	#define INV_ICM45600_SPI_SLEW_RATE_38NS 0	205	#define INV_ICM45600_SPI_SLEW_RATE_38NS 0
206		206
207	#define INV_ICM45600_REG_INT1_CONFIG2 0x0018	207	#define INV_ICM45600_REG_INT1_CONFIG2 0x0018
208	#define INV_ICM45600_INT1_CONFIG2_PUSH_PULL BIT(2)	208	#define INV_ICM45600_INT1_CONFIG2_OPEN_DRAIN BIT(2)
209	#define INV_ICM45600_INT1_CONFIG2_LATCHED BIT(1)	209	#define INV_ICM45600_INT1_CONFIG2_LATCHED BIT(1)
210	#define INV_ICM45600_INT1_CONFIG2_ACTIVE_HIGH BIT(0)	210	#define INV_ICM45600_INT1_CONFIG2_ACTIVE_HIGH BIT(0)
211	#define INV_ICM45600_INT1_CONFIG2_ACTIVE_LOW 0x00	211	#define INV_ICM45600_INT1_CONFIG2_ACTIVE_LOW 0x00

drivers/iio/imu/inv_icm45600/inv_icm45600_core.c+8−3

 		break;
 	}
-	if (!open_drain)
+	if (open_drain)
-		val |= INV_ICM45600_INT1_CONFIG2_PUSH_PULL;
+		val |= INV_ICM45600_INT1_CONFIG2_OPEN_DRAIN;
 	ret = regmap_write(st->map, INV_ICM45600_REG_INT1_CONFIG2, val);
 	if (ret)
 	 */
 	fsleep(5 * USEC_PER_MSEC);
+	/* set pm_runtime active early for disable vddio resource cleanup */
+	ret = pm_runtime_set_active(dev);
+	if (ret)
+		return ret;
 	ret = inv_icm45600_enable_regulator_vddio(st);
 	if (ret)
 		return ret;
 	if (ret)
 		return ret;
-	ret = devm_pm_runtime_set_active_enabled(dev);
+	ret = devm_pm_runtime_enable(dev);
 	if (ret)
 		return ret;

drivers/iio/imu/inv_mpu6050/inv_mpu_core.c+8−0

@@ -1943,6 +1943,14 @@ int inv_mpu_core_probe(struct regmap regmap, int irq, const char name, · 1942 unmodified lines
1943	irq_type);	1943	irq_type);
1944	return -EINVAL;	1944	return -EINVAL;
1945	}	1945	}
		1946
		1947	/*
		1948	* Acking interrupts by status register does not work reliably
		1949	* but seem to work when this bit is set.
		1950	*/
		1951	if (st->chip_type == INV_MPU9150)
		1952	st->irq_mask \|= INV_MPU6050_INT_RD_CLEAR;
		1953
1946	device_set_wakeup_capable(dev, true);	1954	device_set_wakeup_capable(dev, true);
1947		1955
1948	st->vdd_supply = devm_regulator_get(dev, "vdd");	1956	st->vdd_supply = devm_regulator_get(dev, "vdd");

drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h+2−0

@@ -390,6 +390,8 @@ struct inv_mpu6050_state { · 389 unmodified lines
390	/* enable level triggering */	390	/* enable level triggering */
391	#define INV_MPU6050_LATCH_INT_EN 0x20	391	#define INV_MPU6050_LATCH_INT_EN 0x20
392	#define INV_MPU6050_BIT_BYPASS_EN 0x2	392	#define INV_MPU6050_BIT_BYPASS_EN 0x2
		393	/* allow acking interrupts by any register read */
		394	#define INV_MPU6050_INT_RD_CLEAR 0x10
393		395
394	/* Allowed timestamp period jitter in percent */	396	/* Allowed timestamp period jitter in percent */
395	#define INV_MPU6050_TS_PERIOD_JITTER 4	397	#define INV_MPU6050_TS_PERIOD_JITTER 4

drivers/iio/imu/inv_mpu6050/inv_mpu_trigger.c+4−1

 	switch (st->chip_type) {
 	case INV_MPU6000:
 	case INV_MPU6050:
-	case INV_MPU9150:
 		/*
 		 * WoM is not supported and interrupt status read seems to be broken for
 		 * some chips. Since data ready is the only interrupt, bypass interrupt
 		wom_bits = 0;
 		int_status = INV_MPU6050_BIT_RAW_DATA_RDY_INT;
 		goto data_ready_interrupt;
+	case INV_MPU9150:
+		/* IRQ needs to be acked */
+		wom_bits = 0;
+		break;
 	case INV_MPU6500:
 	case INV_MPU6515:
 	case INV_MPU6880:

drivers/iio/industrialio-buffer.c+4−2

 	written = 0;
 	add_wait_queue(&rb->pollq, &wait);
 	do {
-		if (!indio_dev->info)
+		if (!indio_dev->info) {
-			return -ENODEV;
+			ret = -ENODEV;
+			break;
+		}
 		if (!iio_buffer_space_available(rb)) {
 			if (signal_pending(current)) {

drivers/iio/light/bh1780.c+1−1

 		case IIO_LIGHT:
 			pm_runtime_get_sync(&bh1780->client->dev);
 			value = bh1780_read_word(bh1780, BH1780_REG_DLOW);
+			pm_runtime_put_autosuspend(&bh1780->client->dev);
 			if (value < 0)
 				return value;
-			pm_runtime_put_autosuspend(&bh1780->client->dev);
 			*val = value;
 			return IIO_VAL_INT;

drivers/iio/magnetometer/Kconfig+1−2

 	tristate "MEMSIC MMC5633 3-axis magnetic sensor"
 	select REGMAP_I2C
 	select REGMAP_I3C if I3C
-	depends on I2C
+	depends on I3C_OR_I2C
-	depends on I3C || !I3C
 	help
 	  Say yes here to build support for the MEMSIC MMC5633 3-axis
 	  magnetic sensor.

drivers/iio/magnetometer/tlv493d.c+1−1

@@ -171,7 +171,7 @@ static s16 tlv493d_get_channel_data(u8 *b, enum tlv493d_channels ch) · 170 unmodified lines
171	switch (ch) {	171	switch (ch) {
172	case TLV493D_AXIS_X:	172	case TLV493D_AXIS_X:
173	val = FIELD_GET(TLV493D_BX_MAG_X_AXIS_MSB, b[TLV493D_RD_REG_BX]) << 4 \|	173	val = FIELD_GET(TLV493D_BX_MAG_X_AXIS_MSB, b[TLV493D_RD_REG_BX]) << 4 \|
174	FIELD_GET(TLV493D_BX2_MAG_X_AXIS_LSB, b[TLV493D_RD_REG_BX2]) >> 4;	174	FIELD_GET(TLV493D_BX2_MAG_X_AXIS_LSB, b[TLV493D_RD_REG_BX2]);
175	break;	175	break;
176	case TLV493D_AXIS_Y:	176	case TLV493D_AXIS_Y:
177	val = FIELD_GET(TLV493D_BY_MAG_Y_AXIS_MSB, b[TLV493D_RD_REG_BY]) << 4 \|	177	val = FIELD_GET(TLV493D_BY_MAG_Y_AXIS_MSB, b[TLV493D_RD_REG_BY]) << 4 \|

drivers/iio/potentiometer/mcp4131.c+1−1

@@ -221,7 +221,7 @@ static int mcp4131_write_raw(struct iio_dev *indio_dev, · 220 unmodified lines
221		221
222	mutex_lock(&data->lock);	222	mutex_lock(&data->lock);
223		223
224	data->buf[0] = address << MCP4131_WIPER_SHIFT;	224	data->buf[0] = address;
225	data->buf[0] \|= MCP4131_WRITE \| (val >> 8);	225	data->buf[0] \|= MCP4131_WRITE \| (val >> 8);
226	data->buf[1] = val & 0xFF; /* 8 bits here */	226	data->buf[1] = val & 0xFF; /* 8 bits here */
227		227

drivers/iio/proximity/hx9023s.c+4−2

 	struct device *dev = regmap_get_device(data->regmap);
 	unsigned int i, period_ms;
+	if (!val && !val2)
+		return -EINVAL;
 	period_ms = div_u64(NANO, (val * MEGA + val2));
 	for (i = 0; i < ARRAY_SIZE(hx9023s_samp_freq_table); i++) {
 	if (!bin)
 		return -ENOMEM;
-	memcpy(bin->data, fw->data, fw->size);
 	bin->fw_size = fw->size;
+	memcpy(bin->data, fw->data, bin->fw_size);
 	bin->fw_ver = bin->data[FW_VER_OFFSET];
 	bin->reg_count = get_unaligned_le16(bin->data + FW_REG_CNT_OFFSET);

drivers/infiniband/Kconfig+1−0

@@ -6,6 +6,7 @@ menuconfig INFINIBAND · 5 unmodified lines
6	depends on INET	6	depends on INET
7	depends on m \|\| IPV6 != m	7	depends on m \|\| IPV6 != m
8	depends on !ALPHA	8	depends on !ALPHA
		9	select DMA_SHARED_BUFFER
9	select IRQ_POLL	10	select IRQ_POLL
10	select DIMLIB	11	select DIMLIB
11	help	12	help

drivers/infiniband/core/cache.c+13−0

@@ -926,6 +926,13 @@ static int gid_table_setup_one(struct ib_device *ib_dev) · 925 unmodified lines
926	if (err)	926	if (err)
927	return err;	927	return err;
928		928
		929	/*
		930	* Mark the device as ready for GID cache updates. This allows netdev
		931	* event handlers to update the GID cache even before the device is
		932	* fully registered.
		933	*/
		934	ib_device_enable_gid_updates(ib_dev);
		935
929	rdma_roce_rescan_device(ib_dev);	936	rdma_roce_rescan_device(ib_dev);
930		937
931	return err;	938	return err;
@@ -1637,6 +1644,12 @@ void ib_cache_release_one(struct ib_device *device) · 705 unmodified lines
1637		1644
1638	void ib_cache_cleanup_one(struct ib_device *device)	1645	void ib_cache_cleanup_one(struct ib_device *device)
1639	{	1646	{
		1647	/*
		1648	* Clear the GID updates mark first to prevent event handlers from
		1649	* accessing the device while it's being torn down.
		1650	*/
		1651	ib_device_disable_gid_updates(device);
		1652
1640	/* The cleanup function waits for all in-progress workqueue	1653	/* The cleanup function waits for all in-progress workqueue
1641	* elements and cleans up the GID cache. This function should be	1654	* elements and cleans up the GID cache. This function should be
1642	* called after the device was removed from the devices list and	1655	* called after the device was removed from the devices list and

drivers/infiniband/core/cma.c+5−1

 	*to_destroy = NULL;
 	if (cma_family(id_priv) == AF_IB && !rdma_cap_ib_cm(cma_dev->device, 1))
 		return 0;
+	if (id_priv->restricted_node_type != RDMA_NODE_UNSPECIFIED &&
+	    id_priv->restricted_node_type != cma_dev->device->node_type)
+		return 0;
 	dev_id_priv =
 		__rdma_create_id(net, cma_listen_handler, id_priv,
 	if (IS_ERR(dev_id_priv))
 		return PTR_ERR(dev_id_priv);
+	dev_id_priv->restricted_node_type = id_priv->restricted_node_type;
 	dev_id_priv->state = RDMA_CM_ADDR_BOUND;
 	memcpy(cma_src_addr(dev_id_priv), cma_src_addr(id_priv),
 	       rdma_addr_size(cma_src_addr(id_priv)));
 	}
 	mutex_lock(&lock);
-	if (id_priv->cma_dev)
+	if (READ_ONCE(id_priv->state) != RDMA_CM_IDLE)
 		ret = -EALREADY;
 	else
 		id_priv->restricted_node_type = node_type;

drivers/infiniband/core/core_priv.h+3−0

@@ -100,6 +100,9 @@ void ib_enum_all_roce_netdevs(roce_netdev_filter filter, · 99 unmodified lines
100	roce_netdev_callback cb,	100	roce_netdev_callback cb,
101	void *cookie);	101	void *cookie);
102		102
		103	void ib_device_enable_gid_updates(struct ib_device *device);
		104	void ib_device_disable_gid_updates(struct ib_device *device);
		105
103	typedef int (nldev_callback)(struct ib_device device,	106	typedef int (nldev_callback)(struct ib_device device,
104	struct sk_buff *skb,	107	struct sk_buff *skb,
105	struct netlink_callback *cb,	108	struct netlink_callback *cb,

drivers/infiniband/core/device.c+33−1

@@ -93,6 +93,7 @@ static struct workqueue_struct *ib_unreg_wq; · 92 unmodified lines
93	static DEFINE_XARRAY_FLAGS(devices, XA_FLAGS_ALLOC);	93	static DEFINE_XARRAY_FLAGS(devices, XA_FLAGS_ALLOC);
94	static DECLARE_RWSEM(devices_rwsem);	94	static DECLARE_RWSEM(devices_rwsem);
95	#define DEVICE_REGISTERED XA_MARK_1	95	#define DEVICE_REGISTERED XA_MARK_1
		96	#define DEVICE_GID_UPDATES XA_MARK_2
96		97
97	static u32 highest_client_id;	98	static u32 highest_client_id;
98	#define CLIENT_REGISTERED XA_MARK_1	99	#define CLIENT_REGISTERED XA_MARK_1
@@ -2412,11 +2413,42 @@ void ib_enum_all_roce_netdevs(roce_netdev_filter filter, · 2313 unmodified lines
2412	unsigned long index;	2413	unsigned long index;
2413		2414
2414	down_read(&devices_rwsem);	2415	down_read(&devices_rwsem);
2415	xa_for_each_marked (&devices, index, dev, DEVICE_REGISTERED)	2416	xa_for_each_marked(&devices, index, dev, DEVICE_GID_UPDATES)
2416	ib_enum_roce_netdev(dev, filter, filter_cookie, cb, cookie);	2417	ib_enum_roce_netdev(dev, filter, filter_cookie, cb, cookie);
2417	up_read(&devices_rwsem);	2418	up_read(&devices_rwsem);
2418	}	2419	}
2419		2420
		2421	/**
		2422	* ib_device_enable_gid_updates - Mark device as ready for GID cache updates
		2423	* @device: Device to mark
		2424	*
		2425	* Called after GID table is allocated and initialized. After this mark is set,
		2426	* netdevice event handlers can update the device's GID cache. This allows
		2427	* events that arrive during device registration to be processed, avoiding
		2428	* stale GID entries when netdev properties change during the device
		2429	* registration process.
		2430	*/
		2431	void ib_device_enable_gid_updates(struct ib_device *device)
		2432	{
		2433	down_write(&devices_rwsem);
		2434	xa_set_mark(&devices, device->index, DEVICE_GID_UPDATES);
		2435	up_write(&devices_rwsem);
		2436	}
		2437
		2438	/**
		2439	* ib_device_disable_gid_updates - Clear the GID updates mark
		2440	* @device: Device to unmark
		2441	*
		2442	* Called before GID table cleanup to prevent event handlers from accessing
		2443	* the device while it's being torn down.
		2444	*/
		2445	void ib_device_disable_gid_updates(struct ib_device *device)
		2446	{
		2447	down_write(&devices_rwsem);
		2448	xa_clear_mark(&devices, device->index, DEVICE_GID_UPDATES);
		2449	up_write(&devices_rwsem);
		2450	}
		2451
2420	/*	2452	/*
2421	* ib_enum_all_devs - enumerate all ib_devices	2453	* ib_enum_all_devs - enumerate all ib_devices
2422	* @cb: Callback to call for each found ib_device	2454	* @cb: Callback to call for each found ib_device

drivers/infiniband/core/umem_dmabuf.c+1−3

 	err = ib_umem_dmabuf_map_pages(umem_dmabuf);
 	if (err)
-		goto err_unpin;
+		goto err_release;
 	dma_resv_unlock(umem_dmabuf->attach->dmabuf->resv);
 	return umem_dmabuf;
-err_unpin:
-	dma_buf_unpin(umem_dmabuf->attach);
 err_release:
 	dma_resv_unlock(umem_dmabuf->attach->dmabuf->resv);
 	ib_umem_release(&umem_dmabuf->umem);

drivers/infiniband/core/uverbs_std_types_dmabuf.c+2−0

@@ -10,6 +10,8 @@ · 9 unmodified lines
10	#include "rdma_core.h"	10	#include "rdma_core.h"
11	#include "uverbs.h"	11	#include "uverbs.h"
12		12
		13	MODULE_IMPORT_NS("DMA_BUF");
		14
13	static int uverbs_dmabuf_attach(struct dma_buf *dmabuf,	15	static int uverbs_dmabuf_attach(struct dma_buf *dmabuf,
14	struct dma_buf_attachment *attachment)	16	struct dma_buf_attachment *attachment)
15	{	17	{

drivers/infiniband/hw/bng_re/bng_dev.c+19−37

 {
 	struct bng_re_chip_ctx *chip_ctx;
-	if (!rdev->chip_ctx)
-		return;
 	kfree(rdev->dev_attr);
 	rdev->dev_attr = NULL;
 	struct bnge_fw_msg fw_msg = {};
 	int rc = -EINVAL;
-	if (!rdev)
-		return rc;
-	if (!aux_dev)
-		return rc;
 	bng_re_init_hwrm_hdr((void *)&req, HWRM_RING_FREE);
 	req.ring_type = type;
 	req.ring_id = cpu_to_le16(fw_ring_id);
 	struct hwrm_ring_alloc_input req = {};
 	struct hwrm_ring_alloc_output resp;
 	struct bnge_fw_msg fw_msg = {};
-	int rc = -EINVAL;
+	int rc;
-	if (!aux_dev)
-		return rc;
 	bng_re_init_hwrm_hdr((void *)&req, HWRM_RING_ALLOC);
 	req.enables = 0;
 	struct hwrm_stat_ctx_free_input req = {};
 	struct hwrm_stat_ctx_free_output resp = {};
 	struct bnge_fw_msg fw_msg = {};
-	int rc = -EINVAL;
+	int rc;
-	if (!aux_dev)
-		return rc;
 	bng_re_init_hwrm_hdr((void *)&req, HWRM_STAT_CTX_FREE);
 	req.stat_ctx_id = cpu_to_le32(rdev->stats_ctx.fw_id);
 	struct hwrm_stat_ctx_alloc_output resp = {};
 	struct hwrm_stat_ctx_alloc_input req = {};
 	struct bnge_fw_msg fw_msg = {};
-	int rc = -EINVAL;
+	int rc;
 	stats->fw_id = BNGE_INVALID_STATS_CTX_ID;
-	if (!aux_dev)
-		return rc;
 	bng_re_init_hwrm_hdr((void *)&req, HWRM_STAT_CTX_ALLOC);
 	req.update_period_ms = cpu_to_le32(1000);
 	req.stats_dma_addr = cpu_to_le64(stats->dma_map);
 	if (rc) {
 		ibdev_err(&rdev->ibdev,
 				"Failed to register with netedev: %#x\n", rc);
-		return -EINVAL;
+		goto reg_netdev_fail;
 	}
 	set_bit(BNG_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
 		ibdev_err(&rdev->ibdev,
 			  "RoCE requires minimum 2 MSI-X vectors, but only %d reserved\n",
 			  rdev->aux_dev->auxr_info->msix_requested);
-		bnge_unregister_dev(rdev->aux_dev);
+		rc = -EINVAL;
-		clear_bit(BNG_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
+		goto msix_ctx_fail;
-		return -EINVAL;
 	}
 	ibdev_dbg(&rdev->ibdev, "Got %d MSI-X vectors\n",
 		  rdev->aux_dev->auxr_info->msix_requested);
 	rc = bng_re_setup_chip_ctx(rdev);
 	if (rc) {
-		bnge_unregister_dev(rdev->aux_dev);
-		clear_bit(BNG_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
 		ibdev_err(&rdev->ibdev, "Failed to get chip context\n");
-		return -EINVAL;
+		goto msix_ctx_fail;
 	}
 	bng_re_query_hwrm_version(rdev);
 	if (rc) {
 		ibdev_err(&rdev->ibdev,
 			  "Failed to allocate RCFW Channel: %#x\n", rc);
-		goto fail;
+		goto alloc_fw_chl_fail;
 	}
 	/* Allocate nq record memory */
 	rdev->nqr = kzalloc_obj(*rdev->nqr);
 	if (!rdev->nqr) {
-		bng_re_destroy_chip_ctx(rdev);
+		rc = -ENOMEM;
-		bnge_unregister_dev(rdev->aux_dev);
+		goto nq_alloc_fail;
-		clear_bit(BNG_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
-		return -ENOMEM;
 	}
 	rdev->nqr->num_msix = rdev->aux_dev->auxr_info->msix_requested;
 free_ring:
 	bng_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type);
 free_rcfw:
+	kfree(rdev->nqr);
+nq_alloc_fail:
 	bng_re_free_rcfw_channel(&rdev->rcfw);
-fail:
+alloc_fw_chl_fail:
-	bng_re_dev_uninit(rdev);
+	bng_re_destroy_chip_ctx(rdev);
+msix_ctx_fail:
+	bnge_unregister_dev(rdev->aux_dev);
+	clear_bit(BNG_RE_FLAG_NETDEV_REGISTERED, &rdev->flags);
+reg_netdev_fail:
 	return rc;
 }
 	rdev = dev_info->rdev;
-	if (rdev)
+	bng_re_remove_device(rdev, adev);
-		bng_re_remove_device(rdev, adev);
 	kfree(dev_info);
 }

drivers/infiniband/hw/efa/efa_verbs.c+1−1

@@ -1661,7 +1661,7 @@ static struct efa_mr efa_alloc_mr(struct ib_pd ibpd, int access_flags, · 1660 unmodified lines
1661	struct efa_mr *mr;	1661	struct efa_mr *mr;
1662		1662
1663	if (udata && udata->inlen &&	1663	if (udata && udata->inlen &&
1664	!ib_is_udata_cleared(udata, 0, sizeof(udata->inlen))) {	1664	!ib_is_udata_cleared(udata, 0, udata->inlen)) {
1665	ibdev_dbg(&dev->ibdev,	1665	ibdev_dbg(&dev->ibdev,
1666	"Incompatible ABI params, udata not cleared\n");	1666	"Incompatible ABI params, udata not cleared\n");
1667	return ERR_PTR(-EINVAL);	1667	return ERR_PTR(-EINVAL);

drivers/infiniband/hw/ionic/ionic_controlpath.c+1−1

@@ -1218,7 +1218,7 @@ int ionic_create_cq(struct ib_cq ibcq, const struct ib_cq_init_attr attr, · 1217 unmodified lines
1218	rdma_udata_to_drv_context(udata, struct ionic_ctx, ibctx);	1218	rdma_udata_to_drv_context(udata, struct ionic_ctx, ibctx);
1219	struct ionic_vcq *vcq = to_ionic_vcq(ibcq);	1219	struct ionic_vcq *vcq = to_ionic_vcq(ibcq);
1220	struct ionic_tbl_buf buf = {};	1220	struct ionic_tbl_buf buf = {};
1221	struct ionic_cq_resp resp;	1221	struct ionic_cq_resp resp = {};
1222	struct ionic_cq_req req;	1222	struct ionic_cq_req req;
1223	int udma_idx = 0, rc;	1223	int udma_idx = 0, rc;
1224		1224

drivers/infiniband/hw/ionic/ionic_ibdev.c+2−0

@@ -81,6 +81,8 @@ static int ionic_query_port(struct ib_device *ibdev, u32 port, · 80 unmodified lines
81	return -EINVAL;	81	return -EINVAL;
82		82
83	ndev = ib_device_get_netdev(ibdev, port);	83	ndev = ib_device_get_netdev(ibdev, port);
		84	if (!ndev)
		85	return -ENODEV;
84		86
85	if (netif_running(ndev) && netif_carrier_ok(ndev)) {	87	if (netif_running(ndev) && netif_carrier_ok(ndev)) {
86	attr->state = IB_PORT_ACTIVE;	88	attr->state = IB_PORT_ACTIVE;

drivers/infiniband/hw/irdma/verbs.c+1−1

@@ -5212,7 +5212,7 @@ static int irdma_create_user_ah(struct ib_ah *ibah, · 5211 unmodified lines
5212	#define IRDMA_CREATE_AH_MIN_RESP_LEN offsetofend(struct irdma_create_ah_resp, rsvd)	5212	#define IRDMA_CREATE_AH_MIN_RESP_LEN offsetofend(struct irdma_create_ah_resp, rsvd)
5213	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);	5213	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5214	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);	5214	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5215	struct irdma_create_ah_resp uresp;	5215	struct irdma_create_ah_resp uresp = {};
5216	struct irdma_ah *parent_ah;	5216	struct irdma_ah *parent_ah;
5217	int err;	5217	int err;
5218		5218

drivers/infiniband/hw/mthca/mthca_provider.c+3−2

 	if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof(__u32))) {
 		mthca_free_srq(to_mdev(ibsrq->device), srq);
+		mthca_unmap_user_db(to_mdev(ibsrq->device), &context->uar,
+				    context->db_tab, ucmd.db_index);
 		return -EFAULT;
 	}
 static int mthca_destroy_srq(struct ib_srq *srq, struct ib_udata *udata)
 {
+	mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
 	if (udata) {
 		struct mthca_ucontext *context =
 			rdma_udata_to_drv_context(
 		mthca_unmap_user_db(to_mdev(srq->device), &context->uar,
 				    context->db_tab, to_msrq(srq)->db_index);
 	}
-	mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
 	return 0;
 }

drivers/irqchip/irq-gic-v3-its.c+4−0

 	int lpi_base;
 	int nr_lpis;
 	int nr_ites;
+	int id_bits;
 	int sz;
 	if (!its_alloc_device_table(its, dev_id))
 	/*
 	 * Even if the device wants a single LPI, the ITT must be
 	 * sized as a power of two (and you need at least one bit...).
+	 * Also honor the ITS's own EID limit.
 	 */
+	id_bits = FIELD_GET(GITS_TYPER_IDBITS, its->typer) + 1;
+	nvecs = min_t(unsigned int, nvecs, BIT(id_bits));
 	nr_ites = max(2, nvecs);
 	sz = nr_ites * (FIELD_GET(GITS_TYPER_ITT_ENTRY_SIZE, its->typer) + 1);
 	sz = max(sz, ITS_ITT_ALIGN);

drivers/irqchip/irq-gic-v5-irs.c+1−1

@@ -699,7 +699,7 @@ static int __init gicv5_irs_init(struct gicv5_irs_chip_data *irs_data) · 698 unmodified lines
699	*/	699	*/
700	if (list_empty(&irs_nodes)) {	700	if (list_empty(&irs_nodes)) {
701	idr = irs_readl_relaxed(irs_data, GICV5_IRS_IDR0);	701	idr = irs_readl_relaxed(irs_data, GICV5_IRS_IDR0);
702	gicv5_global_data.virt_capable = !FIELD_GET(GICV5_IRS_IDR0_VIRT, idr);	702	gicv5_global_data.virt_capable = !!FIELD_GET(GICV5_IRS_IDR0_VIRT, idr);
703		703
704	idr = irs_readl_relaxed(irs_data, GICV5_IRS_IDR1);	704	idr = irs_readl_relaxed(irs_data, GICV5_IRS_IDR1);
705	irs_setup_pri_bits(idr);	705	irs_setup_pri_bits(idr);

drivers/irqchip/irq-ls-extirq.c+34−19

@@ -125,32 +125,45 @@ static const struct irq_domain_ops extirq_domain_ops = { · 124 unmodified lines
125	static int	125	static int
126	ls_extirq_parse_map(struct ls_extirq_data priv, struct device_node node)	126	ls_extirq_parse_map(struct ls_extirq_data priv, struct device_node node)
127	{	127	{
128	struct of_imap_parser imap_parser;	128	const __be32 *map;
129	struct of_imap_item imap_item;	129	u32 mapsize;
130	int ret;	130	int ret;
131		131
132	ret = of_imap_parser_init(&imap_parser, node, &imap_item);	132	map = of_get_property(node, "interrupt-map", &mapsize);
133	if (ret)	133	if (!map)
134	return ret;	134	return -ENOENT;
		135	if (mapsize % sizeof(*map))
		136	return -EINVAL;
		137	mapsize /= sizeof(*map);
135		138
136	for_each_of_imap_item(&imap_parser, &imap_item) {	139	while (mapsize) {
137	struct device_node *ipar;	140	struct device_node *ipar;
138	u32 hwirq;	141	u32 hwirq, intsize, j;
139	int i;
140		142
141	hwirq = imap_item.child_imap[0];	143	if (mapsize < 3)
142	if (hwirq >= MAXIRQ) {	144	return -EINVAL;
143	of_node_put(imap_item.parent_args.np);	145	hwirq = be32_to_cpup(map);
		146	if (hwirq >= MAXIRQ)
144	return -EINVAL;	147	return -EINVAL;
145	}
146	priv->nirq = max(priv->nirq, hwirq + 1);	148	priv->nirq = max(priv->nirq, hwirq + 1);
147		149
148	ipar = of_node_get(imap_item.parent_args.np);	150	ipar = of_find_node_by_phandle(be32_to_cpup(map + 2));
149	priv->map[hwirq].fwnode = of_fwnode_handle(ipar);	151	map += 3;
		152	mapsize -= 3;
		153	if (!ipar)
		154	return -EINVAL;
		155	priv->map[hwirq].fwnode = &ipar->fwnode;
		156	ret = of_property_read_u32(ipar, "#interrupt-cells", &intsize);
		157	if (ret)
		158	return ret;
150		159
151	priv->map[hwirq].param_count = imap_item.parent_args.args_count;	160	if (intsize > mapsize)
152	for (i = 0; i < priv->map[hwirq].param_count; i++)	161	return -EINVAL;
153	priv->map[hwirq].param[i] = imap_item.parent_args.args[i];	162
		163	priv->map[hwirq].param_count = intsize;
		164	for (j = 0; j < intsize; ++j)
		165	priv->map[hwirq].param[j] = be32_to_cpup(map++);
		166	mapsize -= intsize;
154	}	167	}
155	return 0;	168	return 0;
156	}	169	}
@@ -177,8 +190,10 @@ static int ls_extirq_probe(struct platform_device *pdev) · 20 unmodified lines
177	return dev_err_probe(dev, -ENOMEM, "Failed to allocate memory\n");	190	return dev_err_probe(dev, -ENOMEM, "Failed to allocate memory\n");
178		191
179	priv->intpcr = devm_of_iomap(dev, node, 0, NULL);	192	priv->intpcr = devm_of_iomap(dev, node, 0, NULL);
180	if (!priv->intpcr)	193	if (IS_ERR(priv->intpcr)) {
181	return dev_err_probe(dev, -ENOMEM, "Cannot ioremap OF node %pOF\n", node);	194	return dev_err_probe(dev, PTR_ERR(priv->intpcr),
		195	"Cannot ioremap OF node %pOF\n", node);
		196	}
182		197
183	ret = ls_extirq_parse_map(priv, node);	198	ret = ls_extirq_parse_map(priv, node);
184	if (ret)	199	if (ret)

drivers/irqchip/irq-mmp.c+1−1

@@ -136,7 +136,7 @@ static void icu_unmask_irq(struct irq_data *d) · 135 unmodified lines
136	}	136	}
137	}	137	}
138		138
139	struct irq_chip icu_irq_chip = {	139	static const struct irq_chip icu_irq_chip = {
140	.name = "icu_irq",	140	.name = "icu_irq",
141	.irq_mask = icu_mask_irq,	141	.irq_mask = icu_mask_irq,
142	.irq_mask_ack = icu_mask_ack_irq,	142	.irq_mask_ack = icu_mask_ack_irq,

drivers/irqchip/irq-riscv-aplic-main.c+17−4

@@ -116,6 +116,16 @@ static struct syscore aplic_syscore = { · 115 unmodified lines
116	.ops = &aplic_syscore_ops,	116	.ops = &aplic_syscore_ops,
117	};	117	};
118		118
		119	static bool aplic_syscore_registered __ro_after_init;
		120
		121	static void aplic_syscore_init(void)
		122	{
		123	if (!aplic_syscore_registered) {
		124	register_syscore(&aplic_syscore);
		125	aplic_syscore_registered = true;
		126	}
		127	}
		128
119	static int aplic_pm_notifier(struct notifier_block nb, unsigned long action, void data)	129	static int aplic_pm_notifier(struct notifier_block nb, unsigned long action, void data)
120	{	130	{
121	struct aplic_priv *priv = container_of(nb, struct aplic_priv, genpd_nb);	131	struct aplic_priv *priv = container_of(nb, struct aplic_priv, genpd_nb);
@@ -372,18 +382,21 @@ static int aplic_probe(struct platform_device *pdev) · 250 unmodified lines
372	rc = aplic_msi_setup(dev, regs);	382	rc = aplic_msi_setup(dev, regs);
373	else	383	else
374	rc = aplic_direct_setup(dev, regs);	384	rc = aplic_direct_setup(dev, regs);
375	if (rc)	385
		386	if (rc) {
376	dev_err_probe(dev, rc, "failed to setup APLIC in %s mode\n",	387	dev_err_probe(dev, rc, "failed to setup APLIC in %s mode\n",
377	msi_mode ? "MSI" : "direct");	388	msi_mode ? "MSI" : "direct");
378	else	389	return rc;
379	register_syscore(&aplic_syscore);	390	}
		391
		392	aplic_syscore_init();
380		393
381	#ifdef CONFIG_ACPI	394	#ifdef CONFIG_ACPI
382	if (!acpi_disabled)	395	if (!acpi_disabled)
383	acpi_dev_clear_dependencies(ACPI_COMPANION(dev));	396	acpi_dev_clear_dependencies(ACPI_COMPANION(dev));
384	#endif	397	#endif
385		398
386	return rc;	399	return 0;
387	}	400	}
388		401
389	static const struct of_device_id aplic_match[] = {	402	static const struct of_device_id aplic_match[] = {

drivers/irqchip/irq-sifive-plic.c+6−1

 static void plic_irq_eoi(struct irq_data *d)
 {
 	struct plic_handler *handler = this_cpu_ptr(&plic_handlers);
+	u32 __iomem *reg;
+	bool enabled;
+	reg = handler->enable_base + (d->hwirq / 32) * sizeof(u32);
+	enabled = readl(reg) & BIT(d->hwirq % 32);
-	if (unlikely(irqd_irq_disabled(d))) {
+	if (unlikely(!enabled)) {
 		plic_toggle(handler, d->hwirq, 1);
 		writel(d->hwirq, handler->hart_base + CONTEXT_CLAIM);
 		plic_toggle(handler, d->hwirq, 0);

drivers/media/dvb-core/dmxdev.c+3−1

 			mutex_unlock(&dmxdev->mutex);
 			return -ENOMEM;
 		}
-		dvb_ringbuffer_init(&dmxdev->dvr_buffer, mem, DVR_BUFFER_SIZE);
+		dmxdev->dvr_buffer.data = mem;
+		dmxdev->dvr_buffer.size = DVR_BUFFER_SIZE;
+		dvb_ringbuffer_reset(&dmxdev->dvr_buffer);
 		if (dmxdev->may_do_mmap)
 			dvb_vb2_init(&dmxdev->dvr_vb2_ctx, "dvr",
 				     &dmxdev->mutex,

drivers/media/dvb-core/dvb_net.c+3−0

@@ -228,6 +228,9 @@ static int handle_one_ule_extension( struct dvb_net_priv *p ) · 227 unmodified lines
228	unsigned char hlen = (p->ule_sndu_type & 0x0700) >> 8;	228	unsigned char hlen = (p->ule_sndu_type & 0x0700) >> 8;
229	unsigned char htype = p->ule_sndu_type & 0x00FF;	229	unsigned char htype = p->ule_sndu_type & 0x00FF;
230		230
		231	if (htype >= ARRAY_SIZE(ule_mandatory_ext_handlers))
		232	return -1;
		233
231	/* Discriminate mandatory and optional extension headers. */	234	/* Discriminate mandatory and optional extension headers. */
232	if (hlen == 0) {	235	if (hlen == 0) {
233	/* Mandatory extension header */	236	/* Mandatory extension header */

drivers/misc/amd-sbi/Kconfig+1−2

 # SPDX-License-Identifier: GPL-2.0-only
 config AMD_SBRMI_I2C
 	tristate "AMD side band RMI support"
-	depends on I2C
+	depends on I3C_OR_I2C
 	depends on ARM || ARM64 || COMPILE_TEST
 	select REGMAP_I2C
-	depends on I3C || !I3C
 	select REGMAP_I3C if I3C
 	help
 	  Side band RMI over I2C/I3C support for AMD out of band management.

drivers/mmc/host/dw_mmc-rockchip.c+37−1

@@ -36,6 +36,8 @@ struct dw_mci_rockchip_priv_data { · 35 unmodified lines
36	int default_sample_phase;	36	int default_sample_phase;
37	int num_phases;	37	int num_phases;
38	bool internal_phase;	38	bool internal_phase;
		39	int sample_phase;
		40	int drv_phase;
39	};	41	};
40		42
41	/*	43	/*
@@ -573,9 +575,43 @@ static void dw_mci_rockchip_remove(struct platform_device *pdev) · 531 unmodified lines
573	dw_mci_pltfm_remove(pdev);	575	dw_mci_pltfm_remove(pdev);
574	}	576	}
575		577
		578	static int dw_mci_rockchip_runtime_suspend(struct device *dev)
		579	{
		580	struct platform_device *pdev = to_platform_device(dev);
		581	struct dw_mci *host = platform_get_drvdata(pdev);
		582	struct dw_mci_rockchip_priv_data *priv = host->priv;
		583
		584	if (priv->internal_phase) {
		585	priv->sample_phase = rockchip_mmc_get_phase(host, true);
		586	priv->drv_phase = rockchip_mmc_get_phase(host, false);
		587	}
		588
		589	return dw_mci_runtime_suspend(dev);
		590	}
		591
		592	static int dw_mci_rockchip_runtime_resume(struct device *dev)
		593	{
		594	struct platform_device *pdev = to_platform_device(dev);
		595	struct dw_mci *host = platform_get_drvdata(pdev);
		596	struct dw_mci_rockchip_priv_data *priv = host->priv;
		597	int ret;
		598
		599	ret = dw_mci_runtime_resume(dev);
		600	if (ret)
		601	return ret;
		602
		603	if (priv->internal_phase) {
		604	rockchip_mmc_set_phase(host, true, priv->sample_phase);
		605	rockchip_mmc_set_phase(host, false, priv->drv_phase);
		606	mci_writel(host, MISC_CON, MEM_CLK_AUTOGATE_ENABLE);
		607	}
		608
		609	return ret;
		610	}
		611
576	static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {	612	static const struct dev_pm_ops dw_mci_rockchip_dev_pm_ops = {
577	SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)	613	SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
578	RUNTIME_PM_OPS(dw_mci_runtime_suspend, dw_mci_runtime_resume, NULL)	614	RUNTIME_PM_OPS(dw_mci_rockchip_runtime_suspend, dw_mci_rockchip_runtime_resume, NULL)
579	};	615	};
580		616
581	static struct platform_driver dw_mci_rockchip_pltfm_driver = {	617	static struct platform_driver dw_mci_rockchip_pltfm_driver = {

drivers/mmc/host/mmci_qcom_dml.c+1−0

@@ -109,6 +109,7 @@ static int of_get_dml_pipe_index(struct device_node np, const char name) · 108 unmodified lines
109	&dma_spec))	109	&dma_spec))
110	return -ENODEV;	110	return -ENODEV;
111		111
		112	of_node_put(dma_spec.np);
112	if (dma_spec.args_count)	113	if (dma_spec.args_count)
113	return dma_spec.args[0];	114	return dma_spec.args[0];
114		115

drivers/mmc/host/sdhci-brcmstb.c+1−1

@@ -116,7 +116,7 @@ static void sdhci_brcmstb_restore_regs(struct mmc_host *mmc, enum cfg_core_ver v · 115 unmodified lines
116	writel(sr->boot_main_ctl, priv->boot_regs + SDIO_BOOT_MAIN_CTL);	116	writel(sr->boot_main_ctl, priv->boot_regs + SDIO_BOOT_MAIN_CTL);
117		117
118	if (ver == SDIO_CFG_CORE_V1) {	118	if (ver == SDIO_CFG_CORE_V1) {
119	writel(sr->sd_pin_sel, cr + SDIO_CFG_SD_PIN_SEL);	119	writel(sr->sd_pin_sel, cr + SDIO_CFG_V1_SD_PIN_SEL);
120	return;	120	return;
121	}	121	}
122		122

drivers/net/bonding/bond_main.c+70−9

@@ -324,7 +324,7 @@ static bool bond_sk_check(struct bonding *bond) · 323 unmodified lines
324	}	324	}
325	}	325	}
326		326
327	bool bond_xdp_check(struct bonding *bond, int mode)	327	bool __bond_xdp_check(int mode, int xmit_policy)
328	{	328	{
329	switch (mode) {	329	switch (mode) {
330	case BOND_MODE_ROUNDROBIN:	330	case BOND_MODE_ROUNDROBIN:
@@ -335,7 +335,7 @@ bool bond_xdp_check(struct bonding *bond, int mode) · 4 unmodified lines
335	/* vlan+srcmac is not supported with XDP as in most cases the 802.1q	335	/* vlan+srcmac is not supported with XDP as in most cases the 802.1q
336	* payload is not in the packet due to hardware offload.	336	* payload is not in the packet due to hardware offload.
337	*/	337	*/
338	if (bond->params.xmit_policy != BOND_XMIT_POLICY_VLAN_SRCMAC)	338	if (xmit_policy != BOND_XMIT_POLICY_VLAN_SRCMAC)
339	return true;	339	return true;
340	fallthrough;	340	fallthrough;
341	default:	341	default:
@@ -343,6 +343,11 @@ bool bond_xdp_check(struct bonding *bond, int mode) · 1 unmodified line
343	}	343	}
344	}	344	}
345		345
		346	bool bond_xdp_check(struct bonding *bond, int mode)
		347	{
		348	return __bond_xdp_check(mode, bond->params.xmit_policy);
		349	}
		350
346	/---------------------------------- VLAN -----------------------------------/	351	/---------------------------------- VLAN -----------------------------------/
347		352
348	/* In the following 2 functions, bond_vlan_rx_add_vid and bond_vlan_rx_kill_vid,	353	/* In the following 2 functions, bond_vlan_rx_add_vid and bond_vlan_rx_kill_vid,
@@ -1504,6 +1509,50 @@ static netdev_features_t bond_fix_features(struct net_device *dev, · 1155 unmodified lines
1504	return features;	1509	return features;
1505	}	1510	}
1506		1511
		1512	static int bond_header_create(struct sk_buff skb, struct net_device bond_dev,
		1513	unsigned short type, const void *daddr,
		1514	const void *saddr, unsigned int len)
		1515	{
		1516	struct bonding *bond = netdev_priv(bond_dev);
		1517	const struct header_ops *slave_ops;
		1518	struct slave *slave;
		1519	int ret = 0;
		1520
		1521	rcu_read_lock();
		1522	slave = rcu_dereference(bond->curr_active_slave);
		1523	if (slave) {
		1524	slave_ops = READ_ONCE(slave->dev->header_ops);
		1525	if (slave_ops && slave_ops->create)
		1526	ret = slave_ops->create(skb, slave->dev,
		1527	type, daddr, saddr, len);
		1528	}
		1529	rcu_read_unlock();
		1530	return ret;
		1531	}
		1532
		1533	static int bond_header_parse(const struct sk_buff skb, unsigned char haddr)
		1534	{
		1535	struct bonding *bond = netdev_priv(skb->dev);
		1536	const struct header_ops *slave_ops;
		1537	struct slave *slave;
		1538	int ret = 0;
		1539
		1540	rcu_read_lock();
		1541	slave = rcu_dereference(bond->curr_active_slave);
		1542	if (slave) {
		1543	slave_ops = READ_ONCE(slave->dev->header_ops);
		1544	if (slave_ops && slave_ops->parse)
		1545	ret = slave_ops->parse(skb, haddr);
		1546	}
		1547	rcu_read_unlock();
		1548	return ret;
		1549	}
		1550
		1551	static const struct header_ops bond_header_ops = {
		1552	.create = bond_header_create,
		1553	.parse = bond_header_parse,
		1554	};
		1555
1507	static void bond_setup_by_slave(struct net_device *bond_dev,	1556	static void bond_setup_by_slave(struct net_device *bond_dev,
1508	struct net_device *slave_dev)	1557	struct net_device *slave_dev)
1509	{	1558	{
@@ -1511,7 +1560,8 @@ static void bond_setup_by_slave(struct net_device *bond_dev, · 1 unmodified line
1511		1560
1512	dev_close(bond_dev);	1561	dev_close(bond_dev);
1513		1562
1514	bond_dev->header_ops = slave_dev->header_ops;	1563	bond_dev->header_ops = slave_dev->header_ops ?
		1564	&bond_header_ops : NULL;
1515		1565
1516	bond_dev->type = slave_dev->type;	1566	bond_dev->type = slave_dev->type;
1517	bond_dev->hard_header_len = slave_dev->hard_header_len;	1567	bond_dev->hard_header_len = slave_dev->hard_header_len;
@@ -2796,8 +2846,14 @@ static void bond_miimon_commit(struct bonding *bond) · 1278 unmodified lines
2796		2846
2797	continue;	2847	continue;
2798		2848
		2849	case BOND_LINK_FAIL:
		2850	case BOND_LINK_BACK:
		2851	slave_dbg(bond->dev, slave->dev, "link_new_state %d on slave\n",
		2852	slave->link_new_state);
		2853	continue;
		2854
2799	default:	2855	default:
2800	slave_err(bond->dev, slave->dev, "invalid new link %d on slave\n",	2856	slave_err(bond->dev, slave->dev, "invalid link_new_state %d on slave\n",
2801	slave->link_new_state);	2857	slave->link_new_state);
2802	bond_propose_link_state(slave, BOND_LINK_NOCHANGE);	2858	bond_propose_link_state(slave, BOND_LINK_NOCHANGE);
2803		2859
@@ -3372,7 +3428,7 @@ int bond_rcv_validate(const struct sk_buff skb, struct bonding bond, · 568 unmodified lines
3372	} else if (is_arp) {	3428	} else if (is_arp) {
3373	return bond_arp_rcv(skb, bond, slave);	3429	return bond_arp_rcv(skb, bond, slave);
3374	#if IS_ENABLED(CONFIG_IPV6)	3430	#if IS_ENABLED(CONFIG_IPV6)
3375	} else if (is_ipv6) {	3431	} else if (is_ipv6 && likely(ipv6_mod_enabled())) {
3376	return bond_na_rcv(skb, bond, slave);	3432	return bond_na_rcv(skb, bond, slave);
3377	#endif	3433	#endif
3378	} else {	3434	} else {
@@ -5064,13 +5120,18 @@ static void bond_set_slave_arr(struct bonding *bond, · 1685 unmodified lines
5064	{	5120	{
5065	struct bond_up_slave usable, all;	5121	struct bond_up_slave usable, all;
5066		5122
5067	usable = rtnl_dereference(bond->usable_slaves);
5068	rcu_assign_pointer(bond->usable_slaves, usable_slaves);
5069	kfree_rcu(usable, rcu);
5070
5071	all = rtnl_dereference(bond->all_slaves);	5123	all = rtnl_dereference(bond->all_slaves);
5072	rcu_assign_pointer(bond->all_slaves, all_slaves);	5124	rcu_assign_pointer(bond->all_slaves, all_slaves);
5073	kfree_rcu(all, rcu);	5125	kfree_rcu(all, rcu);
		5126
		5127	if (BOND_MODE(bond) == BOND_MODE_BROADCAST) {
		5128	kfree_rcu(usable_slaves, rcu);
		5129	return;
		5130	}
		5131
		5132	usable = rtnl_dereference(bond->usable_slaves);
		5133	rcu_assign_pointer(bond->usable_slaves, usable_slaves);
		5134	kfree_rcu(usable, rcu);
5074	}	5135	}
5075		5136
5076	static void bond_reset_slave_arr(struct bonding *bond)	5137	static void bond_reset_slave_arr(struct bonding *bond)

drivers/net/bonding/bond_options.c+2−0

 static int bond_option_xmit_hash_policy_set(struct bonding *bond,
 					    const struct bond_opt_value *newval)
 {
+	if (bond->xdp_prog && !__bond_xdp_check(BOND_MODE(bond), newval->value))
+		return -EOPNOTSUPP;
 	netdev_dbg(bond->dev, "Setting xmit hash policy to %s (%llu)\n",
 		   newval->string, newval->value);
 	bond->params.xmit_policy = newval->value;

drivers/net/caif/caif_serial.c+3−0

 			dev_close(ser->dev);
 			unregister_netdevice(ser->dev);
 			debugfs_deinit(ser);
+			tty_kref_put(tty->link);
 			tty_kref_put(tty);
 		}
 		rtnl_unlock();
 	ser = netdev_priv(dev);
 	ser->tty = tty_kref_get(tty);
+	tty_kref_get(tty->link);
 	ser->dev = dev;
 	debugfs_init(ser, tty);
 	tty->receive_room = 4096;
 	rtnl_lock();
 	result = register_netdevice(dev);
 	if (result) {
+		tty_kref_put(tty->link);
 		tty_kref_put(tty);
 		rtnl_unlock();
 		free_netdev(dev);

drivers/net/can/dev/calc_bittiming.c+1−1

@@ -8,7 +8,7 @@ · 7 unmodified lines
8	#include <linux/units.h>	8	#include <linux/units.h>
9	#include <linux/can/dev.h>	9	#include <linux/can/dev.h>
10		10
11	#define CAN_CALC_MAX_ERROR 50 /* in one-tenth of a percent */	11	#define CAN_CALC_MAX_ERROR 500 /* max error 5% */
12		12
13	/* CiA recommended sample points for Non Return to Zero encoding. */	13	/* CiA recommended sample points for Non Return to Zero encoding. */
14	static int can_calc_sample_point_nrz(const struct can_bittiming *bt)	14	static int can_calc_sample_point_nrz(const struct can_bittiming *bt)

drivers/net/can/dummy_can.c+1−0

@@ -241,6 +241,7 @@ static int __init dummy_can_init(void) · 240 unmodified lines
241		241
242	dev->netdev_ops = &dummy_can_netdev_ops;	242	dev->netdev_ops = &dummy_can_netdev_ops;
243	dev->ethtool_ops = &dummy_can_ethtool_ops;	243	dev->ethtool_ops = &dummy_can_ethtool_ops;
		244	dev->flags \|= IFF_ECHO; /* enable echo handling */
244	priv = netdev_priv(dev);	245	priv = netdev_priv(dev);
245	priv->can.bittiming_const = &dummy_can_bittiming_const;	246	priv->can.bittiming_const = &dummy_can_bittiming_const;
246	priv->can.bitrate_max = 20 * MEGA /* BPS */;	247	priv->can.bitrate_max = 20 * MEGA /* BPS */;

drivers/net/can/spi/hi311x.c+4−1

 		return ret;
 	mutex_lock(&priv->hi3110_lock);
-	hi3110_power_enable(priv->transceiver, 1);
+	ret = hi3110_power_enable(priv->transceiver, 1);
+	if (ret)
+		goto out_close_candev;
 	priv->force_quit = 0;
 	priv->tx_skb = NULL;
 	hi3110_hw_sleep(spi);
  out_close:
 	hi3110_power_enable(priv->transceiver, 0);
+ out_close_candev:
 	close_candev(net);
 	mutex_unlock(&priv->hi3110_lock);
 	return ret;

drivers/net/can/spi/mcp251x.c+14−1

 {
 	struct mcp251x_priv *priv = netdev_priv(net);
 	struct spi_device *spi = priv->spi;
+	bool release_irq = false;
 	unsigned long flags = 0;
 	int ret;
 	return 0;
 out_free_irq:
-	free_irq(spi->irq, priv);
+	/* The IRQ handler might be running, and if so it will be waiting
+	 * for the lock. But free_irq() must wait for the handler to finish
+	 * so calling it here would deadlock.
+	 *
+	 * Setting priv->force_quit will let the handler exit right away
+	 * without any access to the hardware. This make it safe to call
+	 * free_irq() after the lock is released.
+	 */
+	priv->force_quit = 1;
+	release_irq = true;
 	mcp251x_hw_sleep(spi);
 out_close:
 	mcp251x_power_enable(priv->transceiver, 0);
 	close_candev(net);
 	mutex_unlock(&priv->mcp_lock);
+	if (release_irq)
+		free_irq(spi->irq, priv);
 	return ret;
 }

drivers/net/can/usb/ems_usb.c+6−1

 		start = CPC_HEADER_SIZE;
 		while (msg_count) {
+			if (start + CPC_MSG_HEADER_LEN > urb->actual_length) {
+				netdev_err(netdev, "format error\n");
+				break;
+			}
 			msg = (struct ems_cpc_msg *)&ibuf[start];
 			switch (msg->type) {
 			start += CPC_MSG_HEADER_LEN + msg->length;
 			msg_count--;
-			if (start > urb->transfer_buffer_length) {
+			if (start > urb->actual_length) {
 				netdev_err(netdev, "format error\n");
 				break;
 			}

drivers/net/can/usb/esd_usb.c+17−13

 	struct usb_anchor rx_submitted;
+	unsigned int rx_pipe;
+	unsigned int tx_pipe;
 	int net_count;
 	u32 version;
 	int rxinitdone;
 	}
 resubmit_urb:
-	usb_fill_bulk_urb(urb, dev->udev, usb_rcvbulkpipe(dev->udev, 1),
+	usb_fill_bulk_urb(urb, dev->udev, dev->rx_pipe,
 			  urb->transfer_buffer, ESD_USB_RX_BUFFER_SIZE,
 			  esd_usb_read_bulk_callback, dev);
 {
 	int actual_length;
-	return usb_bulk_msg(dev->udev,
+	return usb_bulk_msg(dev->udev, dev->tx_pipe, msg,
-			    usb_sndbulkpipe(dev->udev, 2),
-			    msg,
 			    msg->hdr.len * sizeof(u32), /* convert to # of bytes */
 			    &actual_length,
 			    1000);
 {
 	int actual_length;
-	return usb_bulk_msg(dev->udev,
+	return usb_bulk_msg(dev->udev, dev->rx_pipe, msg,
-			    usb_rcvbulkpipe(dev->udev, 1),
+			    sizeof(*msg), &actual_length, 1000);
-			    msg,
-			    sizeof(*msg),
-			    &actual_length,
-			    1000);
 }
 static int esd_usb_setup_rx_urbs(struct esd_usb *dev)
 		urb->transfer_dma = buf_dma;
-		usb_fill_bulk_urb(urb, dev->udev,
+		usb_fill_bulk_urb(urb, dev->udev, dev->rx_pipe,
-				  usb_rcvbulkpipe(dev->udev, 1),
 				  buf, ESD_USB_RX_BUFFER_SIZE,
 				  esd_usb_read_bulk_callback, dev);
 		urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
 	/* hnd must not be 0 - MSB is stripped in txdone handling */
 	msg->tx.hnd = BIT(31) | i; /* returned in TX done message */
-	usb_fill_bulk_urb(urb, dev->udev, usb_sndbulkpipe(dev->udev, 2), buf,
+	usb_fill_bulk_urb(urb, dev->udev, dev->tx_pipe, buf,
 			  msg->hdr.len * sizeof(u32), /* convert to # of bytes */
 			  esd_usb_write_bulk_callback, context);
 static int esd_usb_probe(struct usb_interface *intf,
 			 const struct usb_device_id *id)
 {
+	struct usb_endpoint_descriptor *ep_in, *ep_out;
 	struct esd_usb *dev;
 	union esd_usb_msg *msg;
 	int i, err;
+	err = usb_find_common_endpoints(intf->cur_altsetting, &ep_in, &ep_out,
+					NULL, NULL);
+	if (err)
+		return err;
 	dev = kzalloc_obj(*dev);
 	if (!dev) {
 		err = -ENOMEM;
 	}
 	dev->udev = interface_to_usbdev(intf);
+	dev->rx_pipe = usb_rcvbulkpipe(dev->udev, ep_in->bEndpointAddress);
+	dev->tx_pipe = usb_sndbulkpipe(dev->udev, ep_out->bEndpointAddress);
 	init_usb_anchor(&dev->rx_submitted);

drivers/net/can/usb/etas_es58x/es58x_core.c+7−1

 	}
  resubmit_urb:
+	usb_anchor_urb(urb, &es58x_dev->rx_urbs);
 	ret = usb_submit_urb(urb, GFP_ATOMIC);
+	if (!ret)
+		return;
+	usb_unanchor_urb(urb);
 	if (ret == -ENODEV) {
 		for (i = 0; i < es58x_dev->num_can_ch; i++)
 			if (es58x_dev->netdev[i])
 				netif_device_detach(es58x_dev->netdev[i]);
-	} else if (ret)
+	} else
 		dev_err_ratelimited(dev,
 				    "Failed resubmitting read bulk urb: %pe\n",
 				    ERR_PTR(ret));

drivers/net/can/usb/f81604.c+40−5

@@ -413,6 +413,7 @@ static void f81604_read_bulk_callback(struct urb *urb) · 412 unmodified lines
413	{	413	{
414	struct f81604_can_frame *frame = urb->transfer_buffer;	414	struct f81604_can_frame *frame = urb->transfer_buffer;
415	struct net_device *netdev = urb->context;	415	struct net_device *netdev = urb->context;
		416	struct f81604_port_priv *priv = netdev_priv(netdev);
416	int ret;	417	int ret;
417		418
418	if (!netif_device_present(netdev))	419	if (!netif_device_present(netdev))
@@ -445,10 +446,15 @@ static void f81604_read_bulk_callback(struct urb *urb) · 26 unmodified lines
445	f81604_process_rx_packet(netdev, frame);	446	f81604_process_rx_packet(netdev, frame);
446		447
447	resubmit_urb:	448	resubmit_urb:
		449	usb_anchor_urb(urb, &priv->urbs_anchor);
448	ret = usb_submit_urb(urb, GFP_ATOMIC);	450	ret = usb_submit_urb(urb, GFP_ATOMIC);
		451	if (!ret)
		452	return;
		453	usb_unanchor_urb(urb);
		454
449	if (ret == -ENODEV)	455	if (ret == -ENODEV)
450	netif_device_detach(netdev);	456	netif_device_detach(netdev);
451	else if (ret)	457	else
452	netdev_err(netdev,	458	netdev_err(netdev,
453	"%s: failed to resubmit read bulk urb: %pe\n",	459	"%s: failed to resubmit read bulk urb: %pe\n",
454	__func__, ERR_PTR(ret));	460	__func__, ERR_PTR(ret));
@@ -620,6 +626,12 @@ static void f81604_read_int_callback(struct urb *urb) · 165 unmodified lines
620	netdev_info(netdev, "%s: Int URB aborted: %pe\n", __func__,	626	netdev_info(netdev, "%s: Int URB aborted: %pe\n", __func__,
621	ERR_PTR(urb->status));	627	ERR_PTR(urb->status));
622		628
		629	if (urb->actual_length < sizeof(*data)) {
		630	netdev_warn(netdev, "%s: short int URB: %u < %zu\n",
		631	__func__, urb->actual_length, sizeof(*data));
		632	goto resubmit_urb;
		633	}
		634
623	switch (urb->status) {	635	switch (urb->status) {
624	case 0: /* success */	636	case 0: /* success */
625	break;	637	break;
@@ -646,10 +658,15 @@ static void f81604_read_int_callback(struct urb *urb) · 20 unmodified lines
646	f81604_handle_tx(priv, data);	658	f81604_handle_tx(priv, data);
647		659
648	resubmit_urb:	660	resubmit_urb:
		661	usb_anchor_urb(urb, &priv->urbs_anchor);
649	ret = usb_submit_urb(urb, GFP_ATOMIC);	662	ret = usb_submit_urb(urb, GFP_ATOMIC);
		663	if (!ret)
		664	return;
		665	usb_unanchor_urb(urb);
		666
650	if (ret == -ENODEV)	667	if (ret == -ENODEV)
651	netif_device_detach(netdev);	668	netif_device_detach(netdev);
652	else if (ret)	669	else
653	netdev_err(netdev, "%s: failed to resubmit int urb: %pe\n",	670	netdev_err(netdev, "%s: failed to resubmit int urb: %pe\n",
654	__func__, ERR_PTR(ret));	671	__func__, ERR_PTR(ret));
655	}	672	}
@@ -874,9 +891,27 @@ static void f81604_write_bulk_callback(struct urb *urb) · 218 unmodified lines
874	if (!netif_device_present(netdev))	891	if (!netif_device_present(netdev))
875	return;	892	return;
876		893
877	if (urb->status)	894	if (!urb->status)
878	netdev_info(netdev, "%s: Tx URB error: %pe\n", __func__,	895	return;
879	ERR_PTR(urb->status));	896
		897	switch (urb->status) {
		898	case -ENOENT:
		899	case -ECONNRESET:
		900	case -ESHUTDOWN:
		901	return;
		902	default:
		903	break;
		904	}
		905
		906	if (net_ratelimit())
		907	netdev_err(netdev, "%s: Tx URB error: %pe\n", __func__,
		908	ERR_PTR(urb->status));
		909
		910	can_free_echo_skb(netdev, 0, NULL);
		911	netdev->stats.tx_dropped++;
		912	netdev->stats.tx_errors++;
		913
		914	netif_wake_queue(netdev);
880	}	915	}
881		916
882	static void f81604_clear_reg_work(struct work_struct *work)	917	static void f81604_clear_reg_work(struct work_struct *work)

drivers/net/can/usb/gs_usb.c+16−6

 	}
 }
-static int gs_usb_set_bittiming(struct net_device *netdev)
+static int gs_usb_set_bittiming(struct gs_can *dev)
 {
-	struct gs_can *dev = netdev_priv(netdev);
 	struct can_bittiming *bt = &dev->can.bittiming;
 	struct gs_device_bittiming dbt = {
 		.prop_seg = cpu_to_le32(bt->prop_seg),
 				    GFP_KERNEL);
 }
-static int gs_usb_set_data_bittiming(struct net_device *netdev)
+static int gs_usb_set_data_bittiming(struct gs_can *dev)
 {
-	struct gs_can *dev = netdev_priv(netdev);
 	struct can_bittiming *bt = &dev->can.fd.data_bittiming;
 	struct gs_device_bittiming dbt = {
 		.prop_seg = cpu_to_le32(bt->prop_seg),
 	if (dev->feature & GS_CAN_FEATURE_HW_TIMESTAMP)
 		flags |= GS_CAN_MODE_HW_TIMESTAMP;
+	rc = gs_usb_set_bittiming(dev);
+	if (rc) {
+		netdev_err(netdev, "failed to set bittiming: %pe\n", ERR_PTR(rc));
+		goto out_usb_kill_anchored_urbs;
+	}
+	if (ctrlmode & CAN_CTRLMODE_FD) {
+		rc = gs_usb_set_data_bittiming(dev);
+		if (rc) {
+			netdev_err(netdev, "failed to set data bittiming: %pe\n", ERR_PTR(rc));
+			goto out_usb_kill_anchored_urbs;
+		}
+	}
 	/* finally start device */
 	dev->can.state = CAN_STATE_ERROR_ACTIVE;
 	dm.flags = cpu_to_le32(flags);
 	dev->can.state = CAN_STATE_STOPPED;
 	dev->can.clock.freq = le32_to_cpu(bt_const.fclk_can);
 	dev->can.bittiming_const = &dev->bt_const;
-	dev->can.do_set_bittiming = gs_usb_set_bittiming;
 	dev->can.ctrlmode_supported = CAN_CTRLMODE_CC_LEN8_DLC;
 		 * GS_CAN_FEATURE_BT_CONST_EXT is set.
 		 */
 		dev->can.fd.data_bittiming_const = &dev->bt_const;
-		dev->can.fd.do_set_data_bittiming = gs_usb_set_data_bittiming;
 	}
 	if (feature & GS_CAN_FEATURE_TERMINATION) {

drivers/net/can/usb/ucan.c+1−1

@@ -748,7 +748,7 @@ static void ucan_read_bulk_callback(struct urb *urb) · 747 unmodified lines
748	len = le16_to_cpu(m->len);	748	len = le16_to_cpu(m->len);
749		749
750	/* check sanity (length of content) */	750	/* check sanity (length of content) */
751	if (urb->actual_length - pos < len) {	751	if ((len == 0) \|\| (urb->actual_length - pos < len)) {
752	netdev_warn(up->netdev,	752	netdev_warn(up->netdev,
753	"invalid message (short; no data; l:%d)\n",	753	"invalid message (short; no data; l:%d)\n",
754	urb->actual_length);	754	urb->actual_length);

drivers/net/dsa/microchip/ksz_ptp.c+8−3

 	const struct ksz_dev_ops *ops = port->ksz_dev->dev_ops;
 	struct ksz_irq *ptpirq = &port->ptpirq;
 	struct ksz_ptp_irq *ptpmsg_irq;
+	int ret;
 	ptpmsg_irq = &port->ptpmsg_irq[n];
 	ptpmsg_irq->num = irq_create_mapping(ptpirq->domain, n);
 	strscpy(ptpmsg_irq->name, name[n]);
-	return request_threaded_irq(ptpmsg_irq->num, NULL,
+	ret = request_threaded_irq(ptpmsg_irq->num, NULL,
-				    ksz_ptp_msg_thread_fn, IRQF_ONESHOT,
+				   ksz_ptp_msg_thread_fn, IRQF_ONESHOT,
-				    ptpmsg_irq->name, ptpmsg_irq);
+				   ptpmsg_irq->name, ptpmsg_irq);
+	if (ret)
+		irq_dispose_mapping(ptpmsg_irq->num);
+	return ret;
 }
 int ksz_ptp_irq_setup(struct dsa_switch *ds, u8 p)

drivers/net/dsa/mxl862xx/mxl862xx.c+0−1

@@ -149,7 +149,6 @@ static int mxl862xx_setup_mdio(struct dsa_switch *ds) · 148 unmodified lines
149	return -ENOMEM;	149	return -ENOMEM;
150		150
151	bus->priv = priv;	151	bus->priv = priv;
152	ds->user_mii_bus = bus;
153	bus->name = KBUILD_MODNAME "-mii";	152	bus->name = KBUILD_MODNAME "-mii";
154	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(dev));	153	snprintf(bus->id, MII_BUS_ID_SIZE, "%s-mii", dev_name(dev));
155	bus->read_c45 = mxl862xx_phy_read_c45_mii_bus;	154	bus->read_c45 = mxl862xx_phy_read_c45_mii_bus;

drivers/net/dsa/realtek/rtl8365mb.c+2−3

 out:
 	rtl83xx_unlock(priv);
-	return 0;
+	return ret;
 }
 static int rtl8365mb_phy_read(struct realtek_priv *priv, int phy, int regnum)
 	stats->rx_packets = cnt[RTL8365MB_MIB_ifInUcastPkts] +
 			    cnt[RTL8365MB_MIB_ifInMulticastPkts] +
-			    cnt[RTL8365MB_MIB_ifInBroadcastPkts] -
+			    cnt[RTL8365MB_MIB_ifInBroadcastPkts];
-			    cnt[RTL8365MB_MIB_ifOutDiscards];
 	stats->tx_packets = cnt[RTL8365MB_MIB_ifOutUcastPkts] +
 			    cnt[RTL8365MB_MIB_ifOutMulticastPkts] +

drivers/net/dsa/realtek/rtl8366rb-leds.c+3−3

@@ -12,11 +12,11 @@ static inline u32 rtl8366rb_led_group_port_mask(u8 led_group, u8 port) · 11 unmodified lines
12	case 0:	12	case 0:
13	return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));	13	return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));
14	case 1:	14	case 1:
15	return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));	15	return FIELD_PREP(RTL8366RB_LED_X_1_CTRL_MASK, BIT(port));
16	case 2:	16	case 2:
17	return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));	17	return FIELD_PREP(RTL8366RB_LED_2_X_CTRL_MASK, BIT(port));
18	case 3:	18	case 3:
19	return FIELD_PREP(RTL8366RB_LED_0_X_CTRL_MASK, BIT(port));	19	return FIELD_PREP(RTL8366RB_LED_X_3_CTRL_MASK, BIT(port));
20	default:	20	default:
21	return 0;	21	return 0;
22	}	22	}

drivers/net/dsa/sja1105/sja1105_main.c+11−5

@@ -2278,6 +2278,12 @@ int sja1105_static_config_reload(struct sja1105_private *priv, · 2277 unmodified lines
2278	* change it through the dynamic interface later.	2278	* change it through the dynamic interface later.
2279	*/	2279	*/
2280	dsa_switch_for_each_available_port(dp, ds) {	2280	dsa_switch_for_each_available_port(dp, ds) {
		2281	/* May be called during unbind when we unoffload a VLAN-aware
		2282	* bridge from port 1 while port 0 was already torn down
		2283	*/
		2284	if (!dp->pl)
		2285	continue;
		2286
2281	phylink_replay_link_begin(dp->pl);	2287	phylink_replay_link_begin(dp->pl);
2282	mac[dp->index].speed = priv->info->port_speed[SJA1105_SPEED_AUTO];	2288	mac[dp->index].speed = priv->info->port_speed[SJA1105_SPEED_AUTO];
2283	}	2289	}
@@ -2333,13 +2339,13 @@ int sja1105_static_config_reload(struct sja1105_private *priv, · 49 unmodified lines
2333	goto out;	2339	goto out;
2334	}	2340	}
2335		2341
2336	dsa_switch_for_each_available_port(dp, ds)
2337	phylink_replay_link_end(dp->pl);
2338
2339	rc = sja1105_reload_cbs(priv);	2342	rc = sja1105_reload_cbs(priv);
2340	if (rc < 0)	2343
2341	goto out;
2342	out:	2344	out:
		2345	dsa_switch_for_each_available_port(dp, ds)
		2346	if (dp->pl)
		2347	phylink_replay_link_end(dp->pl);
		2348
2343	mutex_unlock(&priv->mgmt_lock);	2349	mutex_unlock(&priv->mgmt_lock);
2344	mutex_unlock(&priv->fdb_lock);	2350	mutex_unlock(&priv->fdb_lock);
2345		2351

drivers/net/ethernet/amd/xgbe/xgbe-common.h+1−1

@@ -431,7 +431,7 @@ · 430 unmodified lines
431	#define MAC_SSIR_SSINC_INDEX 16	431	#define MAC_SSIR_SSINC_INDEX 16
432	#define MAC_SSIR_SSINC_WIDTH 8	432	#define MAC_SSIR_SSINC_WIDTH 8
433	#define MAC_TCR_SS_INDEX 29	433	#define MAC_TCR_SS_INDEX 29
434	#define MAC_TCR_SS_WIDTH 2	434	#define MAC_TCR_SS_WIDTH 3
435	#define MAC_TCR_TE_INDEX 0	435	#define MAC_TCR_TE_INDEX 0
436	#define MAC_TCR_TE_WIDTH 1	436	#define MAC_TCR_TE_WIDTH 1
437	#define MAC_TCR_VNE_INDEX 24	437	#define MAC_TCR_VNE_INDEX 24

drivers/net/ethernet/amd/xgbe/xgbe-drv.c+10−19

 {
 	struct xgbe_prv_data *pdata = netdev_priv(netdev);
 	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-	unsigned long flags;
 	DBGPR("-->xgbe_powerdown\n");
 		return -EINVAL;
 	}
-	spin_lock_irqsave(&pdata->lock, flags);
 	if (caller == XGMAC_DRIVER_CONTEXT)
 		netif_device_detach(netdev);
 	pdata->power_down = 1;
-	spin_unlock_irqrestore(&pdata->lock, flags);
 	DBGPR("<--xgbe_powerdown\n");
 	return 0;
 {
 	struct xgbe_prv_data *pdata = netdev_priv(netdev);
 	struct xgbe_hw_if *hw_if = &pdata->hw_if;
-	unsigned long flags;
 	DBGPR("-->xgbe_powerup\n");
 		return -EINVAL;
 	}
-	spin_lock_irqsave(&pdata->lock, flags);
 	pdata->power_down = 0;
 	xgbe_napi_enable(pdata, 0);
 	xgbe_start_timers(pdata);
-	spin_unlock_irqrestore(&pdata->lock, flags);
 	DBGPR("<--xgbe_powerup\n");
 	return 0;
 	if (ret)
 		goto err_napi;
+	/* Reset the phy settings */
+	ret = xgbe_phy_reset(pdata);
+	if (ret)
+		goto err_irqs;
+	/* Start the phy */
 	ret = phy_if->phy_start(pdata);
 	if (ret)
 		goto err_irqs;
 	hw_if->enable_tx(pdata);
 	hw_if->enable_rx(pdata);
+	/* Synchronize flag with hardware state after enabling TX/RX.
+	 * This prevents stale state after device restart cycles.
+	 */
+	pdata->data_path_stopped = false;
 	udp_tunnel_nic_reset_ntf(netdev);
-	/* Reset the phy settings */
-	ret = xgbe_phy_reset(pdata);
-	if (ret)
-		goto err_txrx;
 	netif_tx_start_all_queues(netdev);
 	xgbe_start_timers(pdata);
 	return 0;
-err_txrx:
-	hw_if->disable_rx(pdata);
-	hw_if->disable_tx(pdata);
 err_irqs:
 	xgbe_free_irqs(pdata);

drivers/net/ethernet/amd/xgbe/xgbe-main.c+0−1

@@ -76,7 +76,6 @@ struct xgbe_prv_data xgbe_alloc_pdata(struct device dev) · 75 unmodified lines
76	pdata->netdev = netdev;	76	pdata->netdev = netdev;
77	pdata->dev = dev;	77	pdata->dev = dev;
78		78
79	spin_lock_init(&pdata->lock);
80	spin_lock_init(&pdata->xpcs_lock);	79	spin_lock_init(&pdata->xpcs_lock);
81	mutex_init(&pdata->rss_mutex);	80	mutex_init(&pdata->rss_mutex);
82	spin_lock_init(&pdata->tstamp_lock);	81	spin_lock_init(&pdata->tstamp_lock);

drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c+75−7

@@ -1942,7 +1942,7 @@ static void xgbe_set_rx_adap_mode(struct xgbe_prv_data *pdata, · 1941 unmodified lines
1942	static void xgbe_rx_adaptation(struct xgbe_prv_data *pdata)	1942	static void xgbe_rx_adaptation(struct xgbe_prv_data *pdata)
1943	{	1943	{
1944	struct xgbe_phy_data *phy_data = pdata->phy_data;	1944	struct xgbe_phy_data *phy_data = pdata->phy_data;
1945	unsigned int reg;	1945	int reg;
1946		1946
1947	/* step 2: force PCS to send RX_ADAPT Req to PHY */	1947	/* step 2: force PCS to send RX_ADAPT Req to PHY */
1948	XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_EQ_CTRL4,	1948	XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_PMA_RX_EQ_CTRL4,
@@ -1964,11 +1964,20 @@ static void xgbe_rx_adaptation(struct xgbe_prv_data *pdata) · 15 unmodified lines
1964		1964
1965	/* Step 4: Check for Block lock */	1965	/* Step 4: Check for Block lock */
1966		1966
1967	/* Link status is latched low, so read once to clear
1968	* and then read again to get current state
1969	*/
1970	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
1971	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);	1967	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
		1968	if (reg < 0)
		1969	goto set_mode;
		1970
		1971	/* Link status is latched low so that momentary link drops
		1972	* can be detected. If link was already down read again
		1973	* to get the latest state.
		1974	*/
		1975	if (!pdata->phy.link && !(reg & MDIO_STAT1_LSTATUS)) {
		1976	reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
		1977	if (reg < 0)
		1978	goto set_mode;
		1979	}
		1980
1972	if (reg & MDIO_STAT1_LSTATUS) {	1981	if (reg & MDIO_STAT1_LSTATUS) {
1973	/* If the block lock is found, update the helpers	1982	/* If the block lock is found, update the helpers
1974	* and declare the link up	1983	* and declare the link up
@@ -2008,6 +2017,48 @@ rx_adapt_reinit: · 33 unmodified lines
2008	xgbe_rx_adaptation(pdata);	2017	xgbe_rx_adaptation(pdata);
2009	}	2018	}
2010		2019
		2020	/*
		2021	* xgbe_phy_stop_data_path - Stop TX/RX to prevent packet corruption
		2022	* @pdata: driver private data
		2023	*
		2024	* This function stops the data path (TX and RX) to prevent packet
		2025	* corruption during critical PHY operations like RX adaptation.
		2026	* Must be called before initiating RX adaptation when link goes down.
		2027	*/
		2028	static void xgbe_phy_stop_data_path(struct xgbe_prv_data *pdata)
		2029	{
		2030	if (pdata->data_path_stopped)
		2031	return;
		2032
		2033	/* Stop TX/RX to prevent packet corruption during RX adaptation */
		2034	pdata->hw_if.disable_tx(pdata);
		2035	pdata->hw_if.disable_rx(pdata);
		2036	pdata->data_path_stopped = true;
		2037
		2038	netif_dbg(pdata, link, pdata->netdev,
		2039	"stopping data path for RX adaptation\n");
		2040	}
		2041
		2042	/*
		2043	* xgbe_phy_start_data_path - Re-enable TX/RX after RX adaptation
		2044	* @pdata: driver private data
		2045	*
		2046	* This function re-enables the data path (TX and RX) after RX adaptation
		2047	* has completed successfully. Only called when link is confirmed up.
		2048	*/
		2049	static void xgbe_phy_start_data_path(struct xgbe_prv_data *pdata)
		2050	{
		2051	if (!pdata->data_path_stopped)
		2052	return;
		2053
		2054	pdata->hw_if.enable_rx(pdata);
		2055	pdata->hw_if.enable_tx(pdata);
		2056	pdata->data_path_stopped = false;
		2057
		2058	netif_dbg(pdata, link, pdata->netdev,
		2059	"restarting data path after RX adaptation\n");
		2060	}
		2061
2011	static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata)	2062	static void xgbe_phy_rx_reset(struct xgbe_prv_data *pdata)
2012	{	2063	{
2013	int reg;	2064	int reg;
@@ -2801,13 +2852,27 @@ static int xgbe_phy_link_status(struct xgbe_prv_data pdata, int an_restart) · 787 unmodified lines
2801	if (pdata->en_rx_adap) {	2852	if (pdata->en_rx_adap) {
2802	/* if the link is available and adaptation is done,	2853	/* if the link is available and adaptation is done,
2803	* declare link up	2854	* declare link up
		2855	*
		2856	* Note: When link is up and adaptation is done, we can
		2857	* safely re-enable the data path if it was stopped
		2858	* for adaptation.
2804	*/	2859	*/
2805	if ((reg & MDIO_STAT1_LSTATUS) && pdata->rx_adapt_done)	2860	if ((reg & MDIO_STAT1_LSTATUS) && pdata->rx_adapt_done) {
		2861	xgbe_phy_start_data_path(pdata);
2806	return 1;	2862	return 1;
		2863	}
2807	/* If either link is not available or adaptation is not done,	2864	/* If either link is not available or adaptation is not done,
2808	* retrigger the adaptation logic. (if the mode is not set,	2865	* retrigger the adaptation logic. (if the mode is not set,
2809	* then issue mailbox command first)	2866	* then issue mailbox command first)
2810	*/	2867	*/
		2868
		2869	/* CRITICAL: Stop data path BEFORE triggering RX adaptation
		2870	* to prevent CRC errors from packets corrupted during
		2871	* the adaptation process. This is especially important
		2872	* when AN is OFF in 10G KR mode.
		2873	*/
		2874	xgbe_phy_stop_data_path(pdata);
		2875
2811	if (pdata->mode_set) {	2876	if (pdata->mode_set) {
2812	xgbe_phy_rx_adaptation(pdata);	2877	xgbe_phy_rx_adaptation(pdata);
2813	} else {	2878	} else {
@@ -2815,8 +2880,11 @@ static int xgbe_phy_link_status(struct xgbe_prv_data pdata, int an_restart) · 1 unmodified line
2815	xgbe_phy_set_mode(pdata, phy_data->cur_mode);	2880	xgbe_phy_set_mode(pdata, phy_data->cur_mode);
2816	}	2881	}
2817		2882
2818	if (pdata->rx_adapt_done)	2883	if (pdata->rx_adapt_done) {
		2884	/* Adaptation complete, safe to re-enable data path */
		2885	xgbe_phy_start_data_path(pdata);
2819	return 1;	2886	return 1;
		2887	}
2820	} else if (reg & MDIO_STAT1_LSTATUS)	2888	} else if (reg & MDIO_STAT1_LSTATUS)
2821	return 1;	2889	return 1;
2822		2890

drivers/net/ethernet/amd/xgbe/xgbe.h+4−3

 	unsigned int pp3;
 	unsigned int pp4;
-	/* Overall device lock */
-	spinlock_t lock;
 	/* XPCS indirect addressing lock */
 	spinlock_t xpcs_lock;
 	unsigned int xpcs_window_def_reg;
 	bool en_rx_adap;
 	int rx_adapt_retries;
 	bool rx_adapt_done;
+	/* Flag to track if data path (TX/RX) was stopped for RX adaptation.
+	 * This prevents packet corruption during the adaptation window.
+	 */
+	bool data_path_stopped;
 	bool mode_set;
 	bool sph;
 };

drivers/net/ethernet/arc/emac_main.c+11−0

@@ -934,6 +934,17 @@ int arc_emac_probe(struct net_device *ndev, int interface) · 933 unmodified lines
934	/* Set poll rate so that it polls every 1 ms */	934	/* Set poll rate so that it polls every 1 ms */
935	arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);	935	arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
936		936
		937	/*
		938	* Put the device into a known quiescent state before requesting
		939	* the IRQ. Clear only EMAC interrupt status bits here; leave the
		940	* MDIO completion bit alone and avoid writing TXPL_MASK, which is
		941	* used to force TX polling rather than acknowledge interrupts.
		942	*/
		943	arc_reg_set(priv, R_ENABLE, 0);
		944	arc_reg_set(priv, R_STATUS, RXINT_MASK \| TXINT_MASK \| ERR_MASK \|
		945	TXCH_MASK \| MSER_MASK \| RXCR_MASK \|
		946	RXFR_MASK \| RXFL_MASK);
		947
937	ndev->irq = irq;	948	ndev->irq = irq;
938	dev_info(dev, "IRQ is %d\n", ndev->irq);	949	dev_info(dev, "IRQ is %d\n", ndev->irq);
939		950

drivers/net/ethernet/broadcom/bnxt/bnxt.c+7−6

 	int rc;
 	set_bit(BNXT_FLTR_FW_DELETED, &fltr->base.state);
+	if (!test_bit(BNXT_STATE_OPEN, &bp->state))
+		return 0;
 	rc = hwrm_req_init(bp, req, HWRM_CFA_NTUPLE_FILTER_FREE);
 	if (rc)
 		return rc;
 	struct bnxt_ntuple_filter *ntp_fltr;
 	int i;
-	if (netif_running(bp->dev)) {
+	bnxt_hwrm_vnic_free_one(bp, &rss_ctx->vnic);
-		bnxt_hwrm_vnic_free_one(bp, &rss_ctx->vnic);
+	for (i = 0; i < BNXT_MAX_CTX_PER_VNIC; i++) {
-		for (i = 0; i < BNXT_MAX_CTX_PER_VNIC; i++) {
+		if (vnic->fw_rss_cos_lb_ctx[i] != INVALID_HW_RING_ID)
-			if (vnic->fw_rss_cos_lb_ctx[i] != INVALID_HW_RING_ID)
+			bnxt_hwrm_vnic_ctx_free_one(bp, vnic, i);
-				bnxt_hwrm_vnic_ctx_free_one(bp, vnic, i);
-		}
 	}
 	if (!all)
 		return;

drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c+2−2

@@ -979,8 +979,8 @@ static int bnxt_set_channels(struct net_device *dev, · 978 unmodified lines
979		979
980	if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) !=	980	if (bnxt_get_nr_rss_ctxs(bp, req_rx_rings) !=
981	bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) &&	981	bnxt_get_nr_rss_ctxs(bp, bp->rx_nr_rings) &&
982	netif_is_rxfh_configured(dev)) {	982	(netif_is_rxfh_configured(dev) \|\| bp->num_rss_ctx)) {
983	netdev_warn(dev, "RSS table size change required, RSS table entries must be default to proceed\n");	983	netdev_warn(dev, "RSS table size change required, RSS table entries must be default (with no additional RSS contexts present) to proceed\n");
984	return -EINVAL;	984	return -EINVAL;
985	}	985	}
986		986

drivers/net/ethernet/broadcom/genet/bcmgenet.c+12−19

 	}
 }
-void bcmgenet_eee_enable_set(struct net_device *dev, bool enable,
+void bcmgenet_eee_enable_set(struct net_device *dev, bool enable)
-			     bool tx_lpi_enabled)
 {
 	struct bcmgenet_priv *priv = netdev_priv(dev);
 	u32 off = priv->hw_params->tbuf_offset + TBUF_ENERGY_CTRL;
 	/* Enable EEE and switch to a 27Mhz clock automatically */
 	reg = bcmgenet_readl(priv->base + off);
-	if (tx_lpi_enabled)
+	if (enable)
 		reg |= TBUF_EEE_EN | TBUF_PM_EN;
 	else
 		reg &= ~(TBUF_EEE_EN | TBUF_PM_EN);
 		priv->clk_eee_enabled = false;
 	}
-	priv->eee.eee_enabled = enable;
-	priv->eee.tx_lpi_enabled = tx_lpi_enabled;
 }
 static int bcmgenet_get_eee(struct net_device *dev, struct ethtool_keee *e)
 {
 	struct bcmgenet_priv *priv = netdev_priv(dev);
-	struct ethtool_keee *p = &priv->eee;
+	int ret;
 	if (GENET_IS_V1(priv))
 		return -EOPNOTSUPP;
 	if (!dev->phydev)
 		return -ENODEV;
-	e->tx_lpi_enabled = p->tx_lpi_enabled;
+	ret = phy_ethtool_get_eee(dev->phydev, e);
+	if (ret)
+		return ret;
+	/* tx_lpi_timer is maintained by the MAC hardware register; the
+	 * PHY-level eee_cfg timer is not set for GENET.
+	 */
 	e->tx_lpi_timer = bcmgenet_umac_readl(priv, UMAC_EEE_LPI_TIMER);
-	return phy_ethtool_get_eee(dev->phydev, e);
+	return 0;
 }
 static int bcmgenet_set_eee(struct net_device *dev, struct ethtool_keee *e)
 {
 	struct bcmgenet_priv *priv = netdev_priv(dev);
-	struct ethtool_keee *p = &priv->eee;
-	bool active;
 	if (GENET_IS_V1(priv))
 		return -EOPNOTSUPP;
 	if (!dev->phydev)
 		return -ENODEV;
-	p->eee_enabled = e->eee_enabled;
+	bcmgenet_umac_writel(priv, e->tx_lpi_timer, UMAC_EEE_LPI_TIMER);
-	if (!p->eee_enabled) {
-		bcmgenet_eee_enable_set(dev, false, false);
-	} else {
-		active = phy_init_eee(dev->phydev, false) >= 0;
-		bcmgenet_umac_writel(priv, e->tx_lpi_timer, UMAC_EEE_LPI_TIMER);
-		bcmgenet_eee_enable_set(dev, active, e->tx_lpi_enabled);
-	}
 	return phy_ethtool_set_eee(dev->phydev, e);
 }

drivers/net/ethernet/broadcom/genet/bcmgenet.h+1−4

 	u8 sopass[SOPASS_MAX];
 	struct bcmgenet_mib_counters mib;
-	struct ethtool_keee eee;
 };
 static inline bool bcmgenet_has_40bits(struct bcmgenet_priv *priv)
 int bcmgenet_wol_power_up_cfg(struct bcmgenet_priv *priv,
 			      enum bcmgenet_power_mode mode);
-void bcmgenet_eee_enable_set(struct net_device *dev, bool enable,
+void bcmgenet_eee_enable_set(struct net_device *dev, bool enable);
-			     bool tx_lpi_enabled);
 #endif /* __BCMGENET_H__ */

drivers/net/ethernet/broadcom/genet/bcmmii.c+5−5

 	struct bcmgenet_priv *priv = netdev_priv(dev);
 	struct phy_device *phydev = dev->phydev;
 	u32 reg, cmd_bits = 0;
-	bool active;
 	/* speed */
 	if (phydev->speed == SPEED_1000)
 	bcmgenet_umac_writel(priv, reg, UMAC_CMD);
 	spin_unlock_bh(&priv->reg_lock);
-	active = phy_init_eee(phydev, 0) >= 0;
-	bcmgenet_eee_enable_set(dev,
-				priv->eee.eee_enabled && active,
-				priv->eee.tx_lpi_enabled);
 }
 /* setup netdev link state when PHY link status change and
 		bcmgenet_ext_writel(priv, reg, EXT_RGMII_OOB_CTRL);
 	}
+	bcmgenet_eee_enable_set(dev, phydev->enable_tx_lpi);
 	phy_print_status(phydev);
 }
 	/* Indicate that the MAC is responsible for PHY PM */
 	dev->phydev->mac_managed_pm = true;
+	if (!GENET_IS_V1(priv))
+		phy_support_eee(dev->phydev);
 	return 0;
 }

drivers/net/ethernet/cadence/macb_main.c+95−3

@@ -36,6 +36,7 @@ · 35 unmodified lines
36	#include <linux/tcp.h>	36	#include <linux/tcp.h>
37	#include <linux/types.h>	37	#include <linux/types.h>
38	#include <linux/udp.h>	38	#include <linux/udp.h>
		39	#include <linux/gcd.h>
39	#include <net/pkt_sched.h>	40	#include <net/pkt_sched.h>
40	#include "macb.h"	41	#include "macb.h"
41		42
@@ -668,6 +669,97 @@ static void macb_mac_link_down(struct phylink_config *config, unsigned int mode, · 626 unmodified lines
668	netif_tx_stop_all_queues(ndev);	669	netif_tx_stop_all_queues(ndev);
669	}	670	}
670		671
		672	/* Use juggling algorithm to left rotate tx ring and tx skb array */
		673	static void gem_shuffle_tx_one_ring(struct macb_queue *queue)
		674	{
		675	unsigned int head, tail, count, ring_size, desc_size;
		676	struct macb_tx_skb tx_skb, skb_curr, skb_next;
		677	struct macb_dma_desc desc_curr, desc_next;
		678	unsigned int i, cycles, shift, curr, next;
		679	struct macb *bp = queue->bp;
		680	unsigned char desc[24];
		681	unsigned long flags;
		682
		683	desc_size = macb_dma_desc_get_size(bp);
		684
		685	if (WARN_ON_ONCE(desc_size > ARRAY_SIZE(desc)))
		686	return;
		687
		688	spin_lock_irqsave(&queue->tx_ptr_lock, flags);
		689	head = queue->tx_head;
		690	tail = queue->tx_tail;
		691	ring_size = bp->tx_ring_size;
		692	count = CIRC_CNT(head, tail, ring_size);
		693
		694	if (!(tail % ring_size))
		695	goto unlock;
		696
		697	if (!count) {
		698	queue->tx_head = 0;
		699	queue->tx_tail = 0;
		700	goto unlock;
		701	}
		702
		703	shift = tail % ring_size;
		704	cycles = gcd(ring_size, shift);
		705
		706	for (i = 0; i < cycles; i++) {
		707	memcpy(&desc, macb_tx_desc(queue, i), desc_size);
		708	memcpy(&tx_skb, macb_tx_skb(queue, i),
		709	sizeof(struct macb_tx_skb));
		710
		711	curr = i;
		712	next = (curr + shift) % ring_size;
		713
		714	while (next != i) {
		715	desc_curr = macb_tx_desc(queue, curr);
		716	desc_next = macb_tx_desc(queue, next);
		717
		718	memcpy(desc_curr, desc_next, desc_size);
		719
		720	if (next == ring_size - 1)
		721	desc_curr->ctrl &= ~MACB_BIT(TX_WRAP);
		722	if (curr == ring_size - 1)
		723	desc_curr->ctrl \|= MACB_BIT(TX_WRAP);
		724
		725	skb_curr = macb_tx_skb(queue, curr);
		726	skb_next = macb_tx_skb(queue, next);
		727	memcpy(skb_curr, skb_next, sizeof(struct macb_tx_skb));
		728
		729	curr = next;
		730	next = (curr + shift) % ring_size;
		731	}
		732
		733	desc_curr = macb_tx_desc(queue, curr);
		734	memcpy(desc_curr, &desc, desc_size);
		735	if (i == ring_size - 1)
		736	desc_curr->ctrl &= ~MACB_BIT(TX_WRAP);
		737	if (curr == ring_size - 1)
		738	desc_curr->ctrl \|= MACB_BIT(TX_WRAP);
		739	memcpy(macb_tx_skb(queue, curr), &tx_skb,
		740	sizeof(struct macb_tx_skb));
		741	}
		742
		743	queue->tx_head = count;
		744	queue->tx_tail = 0;
		745
		746	/* Make descriptor updates visible to hardware */
		747	wmb();
		748
		749	unlock:
		750	spin_unlock_irqrestore(&queue->tx_ptr_lock, flags);
		751	}
		752
		753	/* Rotate the queue so that the tail is at index 0 */
		754	static void gem_shuffle_tx_rings(struct macb *bp)
		755	{
		756	struct macb_queue *queue;
		757	int q;
		758
		759	for (q = 0, queue = bp->queues; q < bp->num_queues; q++, queue++)
		760	gem_shuffle_tx_one_ring(queue);
		761	}
		762
671	static void macb_mac_link_up(struct phylink_config *config,	763	static void macb_mac_link_up(struct phylink_config *config,
672	struct phy_device *phy,	764	struct phy_device *phy,
673	unsigned int mode, phy_interface_t interface,	765	unsigned int mode, phy_interface_t interface,
@@ -706,8 +798,6 @@ static void macb_mac_link_up(struct phylink_config *config, · 32 unmodified lines
706	ctrl \|= MACB_BIT(PAE);	798	ctrl \|= MACB_BIT(PAE);
707		799
708	for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {	800	for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {
709	queue->tx_head = 0;
710	queue->tx_tail = 0;
711	queue_writel(queue, IER,	801	queue_writel(queue, IER,
712	bp->rx_intr_mask \| MACB_TX_INT_FLAGS \| MACB_BIT(HRESP));	802	bp->rx_intr_mask \| MACB_TX_INT_FLAGS \| MACB_BIT(HRESP));
713	}	803	}
@@ -721,8 +811,10 @@ static void macb_mac_link_up(struct phylink_config *config, · 7 unmodified lines
721		811
722	spin_unlock_irqrestore(&bp->lock, flags);	812	spin_unlock_irqrestore(&bp->lock, flags);
723		813
724	if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC))	814	if (!(bp->caps & MACB_CAPS_MACB_IS_EMAC)) {
725	macb_set_tx_clk(bp, speed);	815	macb_set_tx_clk(bp, speed);
		816	gem_shuffle_tx_rings(bp);
		817	}
726		818
727	/* Enable Rx and Tx; Enable PTP unicast */	819	/* Enable Rx and Tx; Enable PTP unicast */
728	ctrl = macb_readl(bp, NCR);	820	ctrl = macb_readl(bp, NCR);

drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c+9−1

 	if_id = (status & 0xFFFF0000) >> 16;
 	if (if_id >= ethsw->sw_attr.num_ifs) {
 		dev_err(dev, "Invalid if_id %d in IRQ status\n", if_id);
-		goto out;
+		goto out_clear;
 	}
 	port_priv = ethsw->ports[if_id];
 			dpaa2_switch_port_connect_mac(port_priv);
 	}
+out_clear:
 	err = dpsw_clear_irq_status(ethsw->mc_io, 0, ethsw->dpsw_handle,
 				    DPSW_IRQ_INDEX_IF, status);
 	if (err)
 		goto err_close;
 	}
+	if (ethsw->sw_attr.num_ifs >= DPSW_MAX_IF) {
+		dev_err(dev, "DPSW num_ifs %u exceeds max %u\n",
+			ethsw->sw_attr.num_ifs, DPSW_MAX_IF);
+		err = -EINVAL;
+		goto err_close;
+	}
 	err = dpsw_get_api_version(ethsw->mc_io, 0,
 				   &ethsw->major,
 				   &ethsw->minor);

drivers/net/ethernet/freescale/enetc/enetc.c+1−1

@@ -3467,7 +3467,7 @@ static int enetc_int_vector_init(struct enetc_ndev_priv *priv, int i, · 3466 unmodified lines
3467	priv->rx_ring[i] = bdr;	3467	priv->rx_ring[i] = bdr;
3468		3468
3469	err = __xdp_rxq_info_reg(&bdr->xdp.rxq, priv->ndev, i, 0,	3469	err = __xdp_rxq_info_reg(&bdr->xdp.rxq, priv->ndev, i, 0,
3470	ENETC_RXB_DMA_SIZE_XDP);	3470	ENETC_RXB_TRUESIZE);
3471	if (err)	3471	if (err)
3472	goto free_vector;	3472	goto free_vector;
3473		3473

drivers/net/ethernet/freescale/enetc/netc_blk_ctrl.c+10−14

 	mdio_node = of_get_child_by_name(np, "mdio");
 	if (!mdio_node)
-		return 0;
+		return -ENODEV;
 	phy_node = of_get_next_child(mdio_node, NULL);
-	if (!phy_node)
+	if (!phy_node) {
+		err = -ENODEV;
 		goto of_put_mdio_node;
+	}
 	err = of_property_read_u32(phy_node, "reg", &addr);
 	if (err)
 			addr = netc_get_phy_addr(gchild);
 			if (addr < 0) {
+				if (addr == -ENODEV)
+					continue;
 				dev_err(dev, "Failed to get PHY address\n");
 				return addr;
 			}
 				return -EINVAL;
 			}
-			/* The default value of LaBCR[MDIO_PHYAD_PRTAD ] is
-			 * 0, so no need to set the register.
-			 */
-			if (!addr)
-				continue;
 			switch (bus_devfn) {
 			case IMX95_ENETC0_BUS_DEVFN:
 				netc_reg_write(priv->ierb, IERB_LBCR(0),
 	addr = netc_get_phy_addr(np);
 	if (addr < 0) {
+		if (addr == -ENODEV)
+			return 0;
 		dev_err(dev, "Failed to get PHY address\n");
 		return addr;
 	}
-	/* The default value of LaBCR[MDIO_PHYAD_PRTAD] is 0,
-	 * so no need to set the register.
-	 */
-	if (!addr)
-		return 0;
 	if (phy_mask & BIT(addr)) {
 		dev_err(dev,
 			"Find same PHY address in EMDIO and ENETC node\n");

drivers/net/ethernet/google/gve/gve_tx_dqo.c+25−31

@@ -167,6 +167,25 @@ gve_free_pending_packet(struct gve_tx_ring *tx, · 166 unmodified lines
167	}	167	}
168	}	168	}
169		169
		170	static void gve_unmap_packet(struct device *dev,
		171	struct gve_tx_pending_packet_dqo *pkt)
		172	{
		173	int i;
		174
		175	if (!pkt->num_bufs)
		176	return;
		177
		178	/* SKB linear portion is guaranteed to be mapped */
		179	dma_unmap_single(dev, dma_unmap_addr(pkt, dma[0]),
		180	dma_unmap_len(pkt, len[0]), DMA_TO_DEVICE);
		181	for (i = 1; i < pkt->num_bufs; i++) {
		182	netmem_dma_unmap_page_attrs(dev, dma_unmap_addr(pkt, dma[i]),
		183	dma_unmap_len(pkt, len[i]),
		184	DMA_TO_DEVICE, 0);
		185	}
		186	pkt->num_bufs = 0;
		187	}
		188
170	/* gve_tx_free_desc - Cleans up all pending tx requests and buffers.	189	/* gve_tx_free_desc - Cleans up all pending tx requests and buffers.
171	*/	190	*/
172	static void gve_tx_clean_pending_packets(struct gve_tx_ring *tx)	191	static void gve_tx_clean_pending_packets(struct gve_tx_ring *tx)
@@ -176,21 +195,12 @@ static void gve_tx_clean_pending_packets(struct gve_tx_ring *tx) · 3 unmodified lines
176	for (i = 0; i < tx->dqo.num_pending_packets; i++) {	195	for (i = 0; i < tx->dqo.num_pending_packets; i++) {
177	struct gve_tx_pending_packet_dqo *cur_state =	196	struct gve_tx_pending_packet_dqo *cur_state =
178	&tx->dqo.pending_packets[i];	197	&tx->dqo.pending_packets[i];
179	int j;	198
180		199	if (tx->dqo.qpl)
181	for (j = 0; j < cur_state->num_bufs; j++) {	200	gve_free_tx_qpl_bufs(tx, cur_state);
182	if (j == 0) {	201	else
183	dma_unmap_single(tx->dev,	202	gve_unmap_packet(tx->dev, cur_state);
184	dma_unmap_addr(cur_state, dma[j]),	203
185	dma_unmap_len(cur_state, len[j]),
186	DMA_TO_DEVICE);
187	} else {
188	dma_unmap_page(tx->dev,
189	dma_unmap_addr(cur_state, dma[j]),
190	dma_unmap_len(cur_state, len[j]),
191	DMA_TO_DEVICE);
192	}
193	}
194	if (cur_state->skb) {	204	if (cur_state->skb) {
195	dev_consume_skb_any(cur_state->skb);	205	dev_consume_skb_any(cur_state->skb);
196	cur_state->skb = NULL;	206	cur_state->skb = NULL;
@@ -1154,22 +1164,6 @@ static void remove_from_list(struct gve_tx_ring *tx, · 957 unmodified lines
1154	}	1164	}
1155	}	1165	}
1156		1166
1157	static void gve_unmap_packet(struct device *dev,
1158	struct gve_tx_pending_packet_dqo *pkt)
1159	{
1160	int i;
1161
1162	/* SKB linear portion is guaranteed to be mapped */
1163	dma_unmap_single(dev, dma_unmap_addr(pkt, dma[0]),
1164	dma_unmap_len(pkt, len[0]), DMA_TO_DEVICE);
1165	for (i = 1; i < pkt->num_bufs; i++) {
1166	netmem_dma_unmap_page_attrs(dev, dma_unmap_addr(pkt, dma[i]),
1167	dma_unmap_len(pkt, len[i]),
1168	DMA_TO_DEVICE, 0);
1169	}
1170	pkt->num_bufs = 0;
1171	}
1172
1173	/* Completion types and expected behavior:	1167	/* Completion types and expected behavior:
1174	* No Miss compl + Packet compl = Packet completed normally.	1168	* No Miss compl + Packet compl = Packet completed normally.
1175	* Miss compl + Re-inject compl = Packet completed normally.	1169	* Miss compl + Re-inject compl = Packet completed normally.

drivers/net/ethernet/intel/e1000/e1000_main.c+0−2

@@ -2952,8 +2952,6 @@ static int e1000_tx_map(struct e1000_adapter *adapter, · 2951 unmodified lines
2952	dma_error:	2952	dma_error:
2953	dev_err(&pdev->dev, "TX DMA map failed\n");	2953	dev_err(&pdev->dev, "TX DMA map failed\n");
2954	buffer_info->dma = 0;	2954	buffer_info->dma = 0;
2955	if (count)
2956	count--;
2957		2955
2958	while (count--) {	2956	while (count--) {
2959	if (i == 0)	2957	if (i == 0)

drivers/net/ethernet/intel/e1000e/defines.h+1−0

@@ -33,6 +33,7 @@ · 32 unmodified lines
33		33
34	/* Extended Device Control */	34	/* Extended Device Control */
35	#define E1000_CTRL_EXT_LPCD 0x00000004 /* LCD Power Cycle Done */	35	#define E1000_CTRL_EXT_LPCD 0x00000004 /* LCD Power Cycle Done */
		36	#define E1000_CTRL_EXT_DPG_EN 0x00000008 /* Dynamic Power Gating Enable */
36	#define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Definable Pin 3 */	37	#define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Definable Pin 3 */
37	#define E1000_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */	38	#define E1000_CTRL_EXT_FORCE_SMBUS 0x00000800 /* Force SMBus mode */
38	#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */	39	#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */

drivers/net/ethernet/intel/e1000e/e1000.h+3−1

 	board_pch_cnp,
 	board_pch_tgp,
 	board_pch_adp,
-	board_pch_mtp
+	board_pch_mtp,
+	board_pch_ptp
 };
 struct e1000_ps_page {
 extern const struct e1000_info e1000_pch_tgp_info;
 extern const struct e1000_info e1000_pch_adp_info;
 extern const struct e1000_info e1000_pch_mtp_info;
+extern const struct e1000_info e1000_pch_ptp_info;
 extern const struct e1000_info e1000_es2_info;
 void e1000e_ptp_init(struct e1000_adapter *adapter);

drivers/net/ethernet/intel/e1000e/hw.h+0−2

 #define E1000_DEV_ID_PCH_ARL_I219_V24		0x57A1
 #define E1000_DEV_ID_PCH_PTP_I219_LM25		0x57B3
 #define E1000_DEV_ID_PCH_PTP_I219_V25		0x57B4
-#define E1000_DEV_ID_PCH_PTP_I219_LM26		0x57B5
-#define E1000_DEV_ID_PCH_PTP_I219_V26		0x57B6
 #define E1000_DEV_ID_PCH_PTP_I219_LM27		0x57B7
 #define E1000_DEV_ID_PCH_PTP_I219_V27		0x57B8
 #define E1000_DEV_ID_PCH_NVL_I219_LM29		0x57B9

drivers/net/ethernet/intel/e1000e/ich8lan.c+30−1

@@ -528,7 +528,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) · 527 unmodified lines
528		528
529	phy->id = e1000_phy_unknown;	529	phy->id = e1000_phy_unknown;
530		530
531	if (hw->mac.type == e1000_pch_mtp) {	531	if (hw->mac.type == e1000_pch_mtp \|\| hw->mac.type == e1000_pch_ptp) {
532	phy->retry_count = 2;	532	phy->retry_count = 2;
533	e1000e_enable_phy_retry(hw);	533	e1000e_enable_phy_retry(hw);
534	}	534	}
@@ -4932,6 +4932,15 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) · 4397 unmodified lines
4932	reg \|= E1000_KABGTXD_BGSQLBIAS;	4932	reg \|= E1000_KABGTXD_BGSQLBIAS;
4933	ew32(KABGTXD, reg);	4933	ew32(KABGTXD, reg);
4934		4934
		4935	/* The hardware reset value of the DPG_EN bit is 1.
		4936	* Clear DPG_EN to prevent unexpected autonomous power gating.
		4937	*/
		4938	if (hw->mac.type >= e1000_pch_ptp) {
		4939	reg = er32(CTRL_EXT);
		4940	reg &= ~E1000_CTRL_EXT_DPG_EN;
		4941	ew32(CTRL_EXT, reg);
		4942	}
		4943
4935	return 0;	4944	return 0;
4936	}	4945	}
4937		4946
@@ -6208,3 +6217,23 @@ const struct e1000_info e1000_pch_mtp_info = { · 1270 unmodified lines
6208	.phy_ops = &ich8_phy_ops,	6217	.phy_ops = &ich8_phy_ops,
6209	.nvm_ops = &spt_nvm_ops,	6218	.nvm_ops = &spt_nvm_ops,
6210	};	6219	};
		6220
		6221	const struct e1000_info e1000_pch_ptp_info = {
		6222	.mac = e1000_pch_ptp,
		6223	.flags = FLAG_IS_ICH
		6224	\| FLAG_HAS_WOL
		6225	\| FLAG_HAS_HW_TIMESTAMP
		6226	\| FLAG_HAS_CTRLEXT_ON_LOAD
		6227	\| FLAG_HAS_AMT
		6228	\| FLAG_HAS_FLASH
		6229	\| FLAG_HAS_JUMBO_FRAMES
		6230	\| FLAG_APME_IN_WUC,
		6231	.flags2 = FLAG2_HAS_PHY_STATS
		6232	\| FLAG2_HAS_EEE,
		6233	.pba = 26,
		6234	.max_hw_frame_size = 9022,
		6235	.get_variants = e1000_get_variants_ich8lan,
		6236	.mac_ops = &ich8_mac_ops,
		6237	.phy_ops = &ich8_phy_ops,
		6238	.nvm_ops = &spt_nvm_ops,
		6239	};

drivers/net/ethernet/intel/e1000e/netdev.c+7−10

 	[board_pch_tgp]		= &e1000_pch_tgp_info,
 	[board_pch_adp]		= &e1000_pch_adp_info,
 	[board_pch_mtp]		= &e1000_pch_mtp_info,
+	[board_pch_ptp]		= &e1000_pch_ptp_info,
 };
 struct e1000_reg_info {
 dma_error:
 	dev_err(&pdev->dev, "Tx DMA map failed\n");
 	buffer_info->dma = 0;
-	if (count)
-		count--;
 	while (count--) {
 		if (i == 0)
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LNP_I219_V21), board_pch_mtp },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ARL_I219_LM24), board_pch_mtp },
 	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ARL_I219_V24), board_pch_mtp },
-	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM25), board_pch_mtp },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM25), board_pch_ptp },
-	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V25), board_pch_mtp },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V25), board_pch_ptp },
-	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM26), board_pch_mtp },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM27), board_pch_ptp },
-	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V26), board_pch_mtp },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V27), board_pch_ptp },
-	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_LM27), board_pch_mtp },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_LM29), board_pch_ptp },
-	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_PTP_I219_V27), board_pch_mtp },
+	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_V29), board_pch_ptp },
-	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_LM29), board_pch_mtp },
-	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_NVL_I219_V29), board_pch_mtp },
 	{ 0, 0, 0, 0, 0, 0, 0 }	/* terminate list */
 };

drivers/net/ethernet/intel/i40e/i40e_main.c+24−17

 	u16 pf_q = vsi->base_queue + ring->queue_index;
 	struct i40e_hw *hw = &vsi->back->hw;
 	struct i40e_hmc_obj_rxq rx_ctx;
+	u32 xdp_frame_sz;
 	int err = 0;
 	bool ok;
 	memset(&rx_ctx, 0, sizeof(rx_ctx));
 	ring->rx_buf_len = vsi->rx_buf_len;
+	xdp_frame_sz = i40e_rx_pg_size(ring) / 2;
 	/* XDP RX-queue info only needed for RX rings exposed to XDP */
 	if (ring->vsi->type != I40E_VSI_MAIN)
 		goto skip;
-	if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) {
-		err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
-					 ring->queue_index,
-					 ring->q_vector->napi.napi_id,
-					 ring->rx_buf_len);
-		if (err)
-			return err;
-	}
 	ring->xsk_pool = i40e_xsk_pool(ring);
 	if (ring->xsk_pool) {
-		xdp_rxq_info_unreg(&ring->xdp_rxq);
+		xdp_frame_sz = xsk_pool_get_rx_frag_step(ring->xsk_pool);
 		ring->rx_buf_len = xsk_pool_get_rx_frame_size(ring->xsk_pool);
 		err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
 					 ring->queue_index,
 					 ring->q_vector->napi.napi_id,
-					 ring->rx_buf_len);
+					 xdp_frame_sz);
 		if (err)
 			return err;
 		err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
 						 MEM_TYPE_XSK_BUFF_POOL,
 						 NULL);
 		if (err)
-			return err;
+			goto unreg_xdp;
 		dev_info(&vsi->back->pdev->dev,
 			 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
 			 ring->queue_index);
 	} else {
+		err = __xdp_rxq_info_reg(&ring->xdp_rxq, ring->netdev,
+					 ring->queue_index,
+					 ring->q_vector->napi.napi_id,
+					 xdp_frame_sz);
+		if (err)
+			return err;
 		err = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
 						 MEM_TYPE_PAGE_SHARED,
 						 NULL);
 		if (err)
-			return err;
+			goto unreg_xdp;
 	}
 skip:
-	xdp_init_buff(&ring->xdp, i40e_rx_pg_size(ring) / 2, &ring->xdp_rxq);
+	xdp_init_buff(&ring->xdp, xdp_frame_sz, &ring->xdp_rxq);
 	rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
 				    BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
 		dev_info(&vsi->back->pdev->dev,
 			 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
 			 ring->queue_index, pf_q, err);
-		return -ENOMEM;
+		err = -ENOMEM;
+		goto unreg_xdp;
 	}
 	/* set the context in the HMC */
 		dev_info(&vsi->back->pdev->dev,
 			 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
 			 ring->queue_index, pf_q, err);
-		return -ENOMEM;
+		err = -ENOMEM;
+		goto unreg_xdp;
 	}
 	/* configure Rx buffer alignment */
 		if (I40E_2K_TOO_SMALL_WITH_PADDING) {
 			dev_info(&vsi->back->pdev->dev,
 				 "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
-			return -EOPNOTSUPP;
+			err = -EOPNOTSUPP;
+			goto unreg_xdp;
 		}
 		clear_ring_build_skb_enabled(ring);
 	} else {
 	}
 	return 0;
+unreg_xdp:
+	if (ring->vsi->type == I40E_VSI_MAIN)
+		xdp_rxq_info_unreg(&ring->xdp_rxq);
+	return err;
 }
 /**

drivers/net/ethernet/intel/i40e/i40e_trace.h+1−1

@@ -88,7 +88,7 @@ TRACE_EVENT(i40e_napi_poll, · 87 unmodified lines
88	__entry->rx_clean_complete = rx_clean_complete;	88	__entry->rx_clean_complete = rx_clean_complete;
89	__entry->tx_clean_complete = tx_clean_complete;	89	__entry->tx_clean_complete = tx_clean_complete;
90	__entry->irq_num = q->irq_num;	90	__entry->irq_num = q->irq_num;
91	__entry->curr_cpu = get_cpu();	91	__entry->curr_cpu = smp_processor_id();
92	__assign_str(qname);	92	__assign_str(qname);
93	__assign_str(dev_name);	93	__assign_str(dev_name);
94	__assign_bitmask(irq_affinity, cpumask_bits(&q->affinity_mask),	94	__assign_bitmask(irq_affinity, cpumask_bits(&q->affinity_mask),

drivers/net/ethernet/intel/i40e/i40e_txrx.c+3−2

 	if (!rx_ring->rx_bi)
 		return;
+	if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
+		xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
 	if (rx_ring->xsk_pool) {
 		i40e_xsk_clean_rx_ring(rx_ring);
 		goto skip_free;
 void i40e_free_rx_resources(struct i40e_ring *rx_ring)
 {
 	i40e_clean_rx_ring(rx_ring);
-	if (rx_ring->vsi->type == I40E_VSI_MAIN)
-		xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
 	rx_ring->xdp_prog = NULL;
 	kfree(rx_ring->rx_bi);
 	rx_ring->rx_bi = NULL;

drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c+7−7

@@ -3833,10 +3833,10 @@ static int i40e_vc_del_cloud_filter(struct i40e_vf vf, u8 msg) · 3832 unmodified lines
3833	cfilter.n_proto = ETH_P_IP;	3833	cfilter.n_proto = ETH_P_IP;
3834	if (mask.dst_ip[0] & tcf.dst_ip[0])	3834	if (mask.dst_ip[0] & tcf.dst_ip[0])
3835	memcpy(&cfilter.ip.v4.dst_ip, tcf.dst_ip,	3835	memcpy(&cfilter.ip.v4.dst_ip, tcf.dst_ip,
3836	ARRAY_SIZE(tcf.dst_ip));	3836	sizeof(cfilter.ip.v4.dst_ip));
3837	else if (mask.src_ip[0] & tcf.dst_ip[0])	3837	else if (mask.src_ip[0] & tcf.src_ip[0])
3838	memcpy(&cfilter.ip.v4.src_ip, tcf.src_ip,	3838	memcpy(&cfilter.ip.v4.src_ip, tcf.src_ip,
3839	ARRAY_SIZE(tcf.dst_ip));	3839	sizeof(cfilter.ip.v4.src_ip));
3840	break;	3840	break;
3841	case VIRTCHNL_TCP_V6_FLOW:	3841	case VIRTCHNL_TCP_V6_FLOW:
3842	cfilter.n_proto = ETH_P_IPV6;	3842	cfilter.n_proto = ETH_P_IPV6;
@@ -3891,7 +3891,7 @@ static int i40e_vc_del_cloud_filter(struct i40e_vf vf, u8 msg) · 48 unmodified lines
3891	/* for ipv6, mask is set for all sixteen bytes (4 words) */	3891	/* for ipv6, mask is set for all sixteen bytes (4 words) */
3892	if (cfilter.n_proto == ETH_P_IPV6 && mask.dst_ip[3])	3892	if (cfilter.n_proto == ETH_P_IPV6 && mask.dst_ip[3])
3893	if (memcmp(&cfilter.ip.v6.dst_ip6, &cf->ip.v6.dst_ip6,	3893	if (memcmp(&cfilter.ip.v6.dst_ip6, &cf->ip.v6.dst_ip6,
3894	sizeof(cfilter.ip.v6.src_ip6)))	3894	sizeof(cfilter.ip.v6.dst_ip6)))
3895	continue;	3895	continue;
3896	if (mask.vlan_id)	3896	if (mask.vlan_id)
3897	if (cfilter.vlan_id != cf->vlan_id)	3897	if (cfilter.vlan_id != cf->vlan_id)
@@ -3979,10 +3979,10 @@ static int i40e_vc_add_cloud_filter(struct i40e_vf vf, u8 msg) · 81 unmodified lines
3979	cfilter->n_proto = ETH_P_IP;	3979	cfilter->n_proto = ETH_P_IP;
3980	if (mask.dst_ip[0] & tcf.dst_ip[0])	3980	if (mask.dst_ip[0] & tcf.dst_ip[0])
3981	memcpy(&cfilter->ip.v4.dst_ip, tcf.dst_ip,	3981	memcpy(&cfilter->ip.v4.dst_ip, tcf.dst_ip,
3982	ARRAY_SIZE(tcf.dst_ip));	3982	sizeof(cfilter->ip.v4.dst_ip));
3983	else if (mask.src_ip[0] & tcf.dst_ip[0])	3983	else if (mask.src_ip[0] & tcf.src_ip[0])
3984	memcpy(&cfilter->ip.v4.src_ip, tcf.src_ip,	3984	memcpy(&cfilter->ip.v4.src_ip, tcf.src_ip,
3985	ARRAY_SIZE(tcf.dst_ip));	3985	sizeof(cfilter->ip.v4.src_ip));
3986	break;	3986	break;
3987	case VIRTCHNL_TCP_V6_FLOW:	3987	case VIRTCHNL_TCP_V6_FLOW:
3988	cfilter->n_proto = ETH_P_IPV6;	3988	cfilter->n_proto = ETH_P_IPV6;

drivers/net/ethernet/intel/iavf/iavf.h+1−2

 	struct work_struct adminq_task;
 	struct work_struct finish_config;
 	wait_queue_head_t down_waitqueue;
-	wait_queue_head_t reset_waitqueue;
 	wait_queue_head_t vc_waitqueue;
 	struct iavf_q_vector *q_vectors;
 	struct list_head vlan_filter_list;
 void iavf_del_adv_rss_cfg(struct iavf_adapter *adapter);
 struct iavf_mac_filter *iavf_add_filter(struct iavf_adapter *adapter,
 					const u8 *macaddr);
-int iavf_wait_for_reset(struct iavf_adapter *adapter);
+void iavf_reset_step(struct iavf_adapter *adapter);
 #endif /* _IAVF_H_ */

drivers/net/ethernet/intel/iavf/iavf_ethtool.c+6−13

 {
 	struct iavf_adapter *adapter = netdev_priv(netdev);
 	u32 new_rx_count, new_tx_count;
-	int ret = 0;
 	if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
 		return -EINVAL;
 	}
 	if (netif_running(netdev)) {
-		iavf_schedule_reset(adapter, IAVF_FLAG_RESET_NEEDED);
+		adapter->flags |= IAVF_FLAG_RESET_NEEDED;
-		ret = iavf_wait_for_reset(adapter);
+		iavf_reset_step(adapter);
-		if (ret)
-			netdev_warn(netdev, "Changing ring parameters timeout or interrupted waiting for reset");
 	}
-	return ret;
+	return 0;
 }
 /**
 {
 	struct iavf_adapter *adapter = netdev_priv(netdev);
 	u32 num_req = ch->combined_count;
-	int ret = 0;
 	if ((adapter->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_ADQ) &&
 	    adapter->num_tc) {
 	adapter->num_req_queues = num_req;
 	adapter->flags |= IAVF_FLAG_REINIT_ITR_NEEDED;
-	iavf_schedule_reset(adapter, IAVF_FLAG_RESET_NEEDED);
+	adapter->flags |= IAVF_FLAG_RESET_NEEDED;
+	iavf_reset_step(adapter);
-	ret = iavf_wait_for_reset(adapter);
+	return 0;
-	if (ret)
-		netdev_warn(netdev, "Changing channel count timeout or interrupted waiting for reset");
-	return ret;
 }
 /**

drivers/net/ethernet/intel/iavf/iavf_main.c+44−54

@@ -185,31 +185,6 @@ static bool iavf_is_reset_in_progress(struct iavf_adapter *adapter) · 184 unmodified lines
185	return false;	185	return false;
186	}	186	}
187		187
188	/**
189	* iavf_wait_for_reset - Wait for reset to finish.
190	* @adapter: board private structure
191	*
192	* Returns 0 if reset finished successfully, negative on timeout or interrupt.
193	*/
194	int iavf_wait_for_reset(struct iavf_adapter *adapter)
195	{
196	int ret = wait_event_interruptible_timeout(adapter->reset_waitqueue,
197	!iavf_is_reset_in_progress(adapter),
198	msecs_to_jiffies(5000));
199
200	/* If ret < 0 then it means wait was interrupted.
201	* If ret == 0 then it means we got a timeout while waiting
202	* for reset to finish.
203	* If ret > 0 it means reset has finished.
204	*/
205	if (ret > 0)
206	return 0;
207	else if (ret < 0)
208	return -EINTR;
209	else
210	return -EBUSY;
211	}
212
213	/**	188	/**
214	* iavf_allocate_dma_mem_d - OS specific memory alloc for shared code	189	* iavf_allocate_dma_mem_d - OS specific memory alloc for shared code
215	* @hw: pointer to the HW structure	190	* @hw: pointer to the HW structure
@@ -2793,7 +2768,22 @@ static void iavf_init_config_adapter(struct iavf_adapter *adapter) · 2577 unmodified lines
2793	netdev->watchdog_timeo = 5 * HZ;	2768	netdev->watchdog_timeo = 5 * HZ;
2794		2769
2795	netdev->min_mtu = ETH_MIN_MTU;	2770	netdev->min_mtu = ETH_MIN_MTU;
2796	netdev->max_mtu = LIBIE_MAX_MTU;	2771
		2772	/* PF/VF API: vf_res->max_mtu is max frame size (not MTU).
		2773	* Convert to MTU.
		2774	*/
		2775	if (!adapter->vf_res->max_mtu) {
		2776	netdev->max_mtu = LIBIE_MAX_MTU;
		2777	} else if (adapter->vf_res->max_mtu < LIBETH_RX_LL_LEN + ETH_MIN_MTU \|\|
		2778	adapter->vf_res->max_mtu >
		2779	LIBETH_RX_LL_LEN + LIBIE_MAX_MTU) {
		2780	netdev_warn_once(adapter->netdev,
		2781	"invalid max frame size %d from PF, using default MTU %d",
		2782	adapter->vf_res->max_mtu, LIBIE_MAX_MTU);
		2783	netdev->max_mtu = LIBIE_MAX_MTU;
		2784	} else {
		2785	netdev->max_mtu = adapter->vf_res->max_mtu - LIBETH_RX_LL_LEN;
		2786	}
2797		2787
2798	if (!is_valid_ether_addr(adapter->hw.mac.addr)) {	2788	if (!is_valid_ether_addr(adapter->hw.mac.addr)) {
2799	dev_info(&pdev->dev, "Invalid MAC address %pM, using random\n",	2789	dev_info(&pdev->dev, "Invalid MAC address %pM, using random\n",
@@ -3021,6 +3011,8 @@ static void iavf_disable_vf(struct iavf_adapter *adapter) · 221 unmodified lines
3021		3011
3022	adapter->flags \|= IAVF_FLAG_PF_COMMS_FAILED;	3012	adapter->flags \|= IAVF_FLAG_PF_COMMS_FAILED;
3023		3013
		3014	iavf_ptp_release(adapter);
		3015
3024	/* We don't use netif_running() because it may be true prior to	3016	/* We don't use netif_running() because it may be true prior to
3025	* ndo_open() returning, so we can't assume it means all our open	3017	* ndo_open() returning, so we can't assume it means all our open
3026	* tasks have finished, since we're not holding the rtnl_lock here.	3018	* tasks have finished, since we're not holding the rtnl_lock here.
@@ -3096,18 +3088,16 @@ static void iavf_reconfig_qs_bw(struct iavf_adapter *adapter) · 69 unmodified lines
3096	}	3088	}
3097		3089
3098	/**	3090	/**
3099	* iavf_reset_task - Call-back task to handle hardware reset	3091	* iavf_reset_step - Perform the VF reset sequence
3100	* @work: pointer to work_struct	3092	* @adapter: board private structure
3101	*	3093	*
3102	* During reset we need to shut down and reinitialize the admin queue	3094	* Requests a reset from PF, polls for completion, and reconfigures
3103	* before we can use it to communicate with the PF again. We also clear	3095	* the driver. Caller must hold the netdev instance lock.
3104	* and reinit the rings because that context is lost as well.	3096	*
3105	**/	3097	* This can sleep for several seconds while polling HW registers.
3106	static void iavf_reset_task(struct work_struct *work)	3098	*/
		3099	void iavf_reset_step(struct iavf_adapter *adapter)
3107	{	3100	{
3108	struct iavf_adapter *adapter = container_of(work,
3109	struct iavf_adapter,
3110	reset_task);
3111	struct virtchnl_vf_resource *vfres = adapter->vf_res;	3101	struct virtchnl_vf_resource *vfres = adapter->vf_res;
3112	struct net_device *netdev = adapter->netdev;	3102	struct net_device *netdev = adapter->netdev;
3113	struct iavf_hw *hw = &adapter->hw;	3103	struct iavf_hw *hw = &adapter->hw;
@@ -3118,7 +3108,7 @@ static void iavf_reset_task(struct work_struct *work) · 4 unmodified lines
3118	int i = 0, err;	3108	int i = 0, err;
3119	bool running;	3109	bool running;
3120		3110
3121	netdev_lock(netdev);	3111	netdev_assert_locked(netdev);
3122		3112
3123	iavf_misc_irq_disable(adapter);	3113	iavf_misc_irq_disable(adapter);
3124	if (adapter->flags & IAVF_FLAG_RESET_NEEDED) {	3114	if (adapter->flags & IAVF_FLAG_RESET_NEEDED) {
@@ -3163,7 +3153,6 @@ static void iavf_reset_task(struct work_struct *work) · 38 unmodified lines
3163	dev_err(&adapter->pdev->dev, "Reset never finished (%x)\n",	3153	dev_err(&adapter->pdev->dev, "Reset never finished (%x)\n",
3164	reg_val);	3154	reg_val);
3165	iavf_disable_vf(adapter);	3155	iavf_disable_vf(adapter);
3166	netdev_unlock(netdev);
3167	return; /* Do not attempt to reinit. It's dead, Jim. */	3156	return; /* Do not attempt to reinit. It's dead, Jim. */
3168	}	3157	}
3169		3158
@@ -3175,7 +3164,6 @@ continue_reset: · 5 unmodified lines
3175	iavf_startup(adapter);	3164	iavf_startup(adapter);
3176	queue_delayed_work(adapter->wq, &adapter->watchdog_task,	3165	queue_delayed_work(adapter->wq, &adapter->watchdog_task,
3177	msecs_to_jiffies(30));	3166	msecs_to_jiffies(30));
3178	netdev_unlock(netdev);
3179	return;	3167	return;
3180	}	3168	}
3181		3169
@@ -3196,6 +3184,8 @@ continue_reset: · 14 unmodified lines
3196	iavf_change_state(adapter, __IAVF_RESETTING);	3184	iavf_change_state(adapter, __IAVF_RESETTING);
3197	adapter->flags &= ~IAVF_FLAG_RESET_PENDING;	3185	adapter->flags &= ~IAVF_FLAG_RESET_PENDING;
3198		3186
		3187	iavf_ptp_release(adapter);
		3188
3199	/* free the Tx/Rx rings and descriptors, might be better to just	3189	/* free the Tx/Rx rings and descriptors, might be better to just
3200	* re-use them sometime in the future	3190	* re-use them sometime in the future
3201	*/	3191	*/
@@ -3316,9 +3306,6 @@ continue_reset: · 114 unmodified lines
3316		3306
3317	adapter->flags &= ~IAVF_FLAG_REINIT_ITR_NEEDED;	3307	adapter->flags &= ~IAVF_FLAG_REINIT_ITR_NEEDED;
3318		3308
3319	wake_up(&adapter->reset_waitqueue);
3320	netdev_unlock(netdev);
3321
3322	return;	3309	return;
3323	reset_err:	3310	reset_err:
3324	if (running) {	3311	if (running) {
@@ -3327,10 +3314,21 @@ reset_err: · 2 unmodified lines
3327	}	3314	}
3328	iavf_disable_vf(adapter);	3315	iavf_disable_vf(adapter);
3329		3316
3330	netdev_unlock(netdev);
3331	dev_err(&adapter->pdev->dev, "failed to allocate resources during reinit\n");	3317	dev_err(&adapter->pdev->dev, "failed to allocate resources during reinit\n");
3332	}	3318	}
3333		3319
		3320	static void iavf_reset_task(struct work_struct *work)
		3321	{
		3322	struct iavf_adapter *adapter = container_of(work,
		3323	struct iavf_adapter,
		3324	reset_task);
		3325	struct net_device *netdev = adapter->netdev;
		3326
		3327	netdev_lock(netdev);
		3328	iavf_reset_step(adapter);
		3329	netdev_unlock(netdev);
		3330	}
		3331
3334	/**	3332	/**
3335	* iavf_adminq_task - worker thread to clean the admin queue	3333	* iavf_adminq_task - worker thread to clean the admin queue
3336	* @work: pointer to work_struct containing our data	3334	* @work: pointer to work_struct containing our data
@@ -4596,22 +4594,17 @@ static int iavf_close(struct net_device *netdev) · 1259 unmodified lines
4596	static int iavf_change_mtu(struct net_device *netdev, int new_mtu)	4594	static int iavf_change_mtu(struct net_device *netdev, int new_mtu)
4597	{	4595	{
4598	struct iavf_adapter *adapter = netdev_priv(netdev);	4596	struct iavf_adapter *adapter = netdev_priv(netdev);
4599	int ret = 0;
4600		4597
4601	netdev_dbg(netdev, "changing MTU from %d to %d\n",	4598	netdev_dbg(netdev, "changing MTU from %d to %d\n",
4602	netdev->mtu, new_mtu);	4599	netdev->mtu, new_mtu);
4603	WRITE_ONCE(netdev->mtu, new_mtu);	4600	WRITE_ONCE(netdev->mtu, new_mtu);
4604		4601
4605	if (netif_running(netdev)) {	4602	if (netif_running(netdev)) {
4606	iavf_schedule_reset(adapter, IAVF_FLAG_RESET_NEEDED);	4603	adapter->flags \|= IAVF_FLAG_RESET_NEEDED;
4607	ret = iavf_wait_for_reset(adapter);	4604	iavf_reset_step(adapter);
4608	if (ret < 0)
4609	netdev_warn(netdev, "MTU change interrupted waiting for reset");
4610	else if (ret)
4611	netdev_warn(netdev, "MTU change timed out waiting for reset");
4612	}	4605	}
4613		4606
4614	return ret;	4607	return 0;
4615	}	4608	}
4616		4609
4617	/**	4610	/**
@@ -5416,9 +5409,6 @@ static int iavf_probe(struct pci_dev pdev, const struct pci_device_id ent) · 798 unmodified lines
5416	/* Setup the wait queue for indicating transition to down status */	5409	/* Setup the wait queue for indicating transition to down status */
5417	init_waitqueue_head(&adapter->down_waitqueue);	5410	init_waitqueue_head(&adapter->down_waitqueue);
5418		5411
5419	/* Setup the wait queue for indicating transition to running state */
5420	init_waitqueue_head(&adapter->reset_waitqueue);
5421
5422	/* Setup the wait queue for indicating virtchannel events */	5412	/* Setup the wait queue for indicating virtchannel events */
5423	init_waitqueue_head(&adapter->vc_waitqueue);	5413	init_waitqueue_head(&adapter->vc_waitqueue);
5424		5414

drivers/net/ethernet/intel/iavf/iavf_virtchnl.c+0−1

@@ -2736,7 +2736,6 @@ void iavf_virtchnl_completion(struct iavf_adapter *adapter, · 2735 unmodified lines
2736	case VIRTCHNL_OP_ENABLE_QUEUES:	2736	case VIRTCHNL_OP_ENABLE_QUEUES:
2737	/* enable transmits */	2737	/* enable transmits */
2738	iavf_irq_enable(adapter, true);	2738	iavf_irq_enable(adapter, true);
2739	wake_up(&adapter->reset_waitqueue);
2740	adapter->flags &= ~IAVF_FLAG_QUEUES_DISABLED;	2739	adapter->flags &= ~IAVF_FLAG_QUEUES_DISABLED;
2741	break;	2740	break;
2742	case VIRTCHNL_OP_DISABLE_QUEUES:	2741	case VIRTCHNL_OP_DISABLE_QUEUES:

drivers/net/ethernet/intel/ice/devlink/devlink.c+2−2

@@ -1360,7 +1360,7 @@ ice_devlink_enable_roce_get(struct devlink *devlink, u32 id, · 1359 unmodified lines
1360		1360
1361	cdev = pf->cdev_info;	1361	cdev = pf->cdev_info;
1362	if (!cdev)	1362	if (!cdev)
1363	return -ENODEV;

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drivers/net/usb/r8152.c+1−0

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drivers/net/usb/usbnet.c+4−3

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drivers/net/vxlan/vxlan_core.c+5−0

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drivers/net/wan/farsync.c+2−0

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drivers/net/wireless/ath/ath12k/mac.c+3−3

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drivers/net/wireless/ath/ath12k/wmi.c+13−23

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drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c+3−4

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drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c+4−3

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drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.h+1−1

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drivers/net/wireless/marvell/libertas/main.c+2−2

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drivers/net/wireless/marvell/mwifiex/cfg80211.c+1−1

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drivers/net/wireless/mediatek/mt76/mt76_connac_mac.c+1−0

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drivers/net/wireless/mediatek/mt76/mt7925/mac.c+1−0

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drivers/net/wireless/mediatek/mt76/mt7996/mac.c+1−0

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drivers/net/wireless/rsi/rsi_91x_mac80211.c+1−1

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drivers/net/wireless/st/cw1200/pm.c+2−0

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drivers/net/wireless/ti/wlcore/main.c+2−2

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drivers/net/xen-netfront.c+17−17

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drivers/nfc/pn533/usb.c+1−0

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drivers/nvme/host/fabrics.c+2−2

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drivers/nvme/host/multipath.c+6−8

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drivers/nvme/host/nvme.h+56−1

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drivers/nvme/host/pci.c+189−5

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drivers/nvme/host/pr.c+2−2

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drivers/nvme/host/sysfs.c+23−0

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drivers/nvme/host/tcp.c+3−2

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drivers/nvme/target/admin-cmd.c+1−1

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drivers/nvme/target/core.c+12−2

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drivers/nvme/target/fcloop.c+11−4

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drivers/nvme/target/nvmet.h+1−0

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drivers/nvme/target/rdma.c+1−0

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drivers/pci/controller/dwc/pcie-designware-ep.c+16−9

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drivers/pci/xen-pcifront.c+4−4

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drivers/pinctrl/cirrus/pinctrl-cs42l43.c+2−3

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drivers/pinctrl/cix/pinctrl-sky1.c+1−2

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drivers/pinctrl/meson/pinctrl-amlogic-a4.c+1−2

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drivers/pinctrl/pinconf-generic.c+2−2

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drivers/pinctrl/pinctrl-amdisp.c+1−1

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drivers/pinctrl/pinctrl-cy8c95x0.c+2−2

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drivers/pinctrl/pinctrl-equilibrium.c+19−12

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drivers/pinctrl/pinctrl-rockchip.c+4−8

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drivers/pinctrl/qcom/pinctrl-qcs615.c+1−0

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drivers/pinctrl/qcom/pinctrl-sdm660-lpass-lpi.c+2−2

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drivers/pinctrl/sunxi/pinctrl-sunxi.c+51−0

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drivers/platform/x86/asus-armoury.h+75−0

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drivers/platform/x86/dell/alienware-wmi-wmax.c+1−1

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drivers/platform/x86/dell/dell-wmi-base.c+6−0

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drivers/platform/x86/dell/dell-wmi-sysman/passwordattr-interface.c+0−1

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drivers/platform/x86/hp/hp-bioscfg/enum-attributes.c+6−3

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drivers/platform/x86/hp/hp-wmi.c+11−1

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drivers/platform/x86/intel/hid.c+19−0

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drivers/platform/x86/intel/int3472/discrete.c+7−0

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drivers/platform/x86/lenovo/thinkpad_acpi.c+4−2

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drivers/platform/x86/oxpec.c+29−1

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drivers/platform/x86/redmi-wmi.c+24−1

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drivers/platform/x86/touchscreen_dmi.c+18−0

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drivers/platform/x86/uniwill/uniwill-acpi.c+75−35

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drivers/platform/x86/uniwill/uniwill-wmi.h+3−3

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drivers/pmdomain/bcm/bcm2835-power.c+3−3

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drivers/pmdomain/imx/gpcv2.c+3−1

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drivers/pmdomain/rockchip/pm-domains.c+1−1

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drivers/power/sequencing/pwrseq-pcie-m2.c+1−1

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drivers/regulator/Kconfig+1−1

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drivers/regulator/bq257xx-regulator.c+1−2

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drivers/regulator/fp9931.c+3−4

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drivers/regulator/mt6363-regulator.c+1−3

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drivers/regulator/pca9450-regulator.c+10−4

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drivers/regulator/pf9453-regulator.c+1−1

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drivers/regulator/tps65185.c+3−0

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drivers/remoteproc/imx_rproc.c+1−1

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drivers/remoteproc/mtk_scp.c+39−0

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drivers/remoteproc/qcom_sysmon.c+1−1

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drivers/remoteproc/qcom_wcnss.c+1−1

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drivers/s390/block/dasd_eckd.c+16−0

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drivers/s390/crypto/zcrypt_ccamisc.c+7−5

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drivers/s390/crypto/zcrypt_cex4.c+1−2

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drivers/scsi/hisi_sas/hisi_sas_main.c+1−1

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drivers/scsi/hisi_sas/hisi_sas_v3_hw.c+1−1

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drivers/scsi/lpfc/lpfc_init.c+2−0

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drivers/scsi/lpfc/lpfc_sli.c+30−6

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drivers/scsi/lpfc/lpfc_sli4.h+3−0

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drivers/scsi/mpi3mr/mpi3mr_fw.c+29−15

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drivers/scsi/pm8001/pm8001_sas.c+3−2

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drivers/scsi/qla2xxx/qla_iocb.c+0−2

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drivers/scsi/scsi_devinfo.c+1−1

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drivers/scsi/scsi_scan.c+2−5

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drivers/scsi/ses.c+2−3

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drivers/scsi/snic/vnic_dev.c+0−9

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drivers/scsi/storvsc_drv.c+3−2

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drivers/scsi/xen-scsifront.c+1−1

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drivers/spi/spi-amlogic-spifc-a4.c+2−3

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drivers/spi/spi-atcspi200.c+16−22

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drivers/spi/spi-cadence-quadspi.c+6−0

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drivers/spi/spi-dw-dma.c+1−1

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drivers/spi/spi-intel-pci.c+1−0

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drivers/spi/spi-rockchip-sfc.c+1−1

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drivers/spi/spi-stm32.c+3−0

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drivers/staging/rtl8723bs/core/rtw_ieee80211.c+10−5

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drivers/staging/rtl8723bs/core/rtw_mlme.c+4−1

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drivers/staging/sm750fb/sm750.c+1−0

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drivers/staging/sm750fb/sm750_hw.c+11−11

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drivers/target/target_core_configfs.c+6−9

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drivers/ufs/core/ufshcd.c+35−14

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drivers/usb/class/cdc-acm.c+5−0

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drivers/usb/class/cdc-acm.h+1−0

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drivers/usb/class/cdc-wdm.c+3−1

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drivers/usb/class/usbtmc.c+3−3

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drivers/usb/core/config.c+5−1

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drivers/usb/core/message.c+79−21

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drivers/usb/core/phy.c+1−7

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drivers/usb/core/quirks.c+21−0

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drivers/usb/dwc3/dwc3-pci.c+2−0

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drivers/usb/gadget/function/f_hid.c+4−0

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drivers/usb/gadget/function/f_mass_storage.c+10−2

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drivers/usb/gadget/function/f_ncm.c+80−66

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drivers/usb/gadget/function/f_tcm.c+14−0

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drivers/usb/gadget/function/u_ether.c+22−45

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drivers/usb/gadget/function/u_ether.h+26−30

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drivers/usb/gadget/function/u_ether_configfs.h+0−177

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drivers/usb/gadget/function/u_ncm.h+1−3

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drivers/usb/gadget/function/uvc_video.c+1−1

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drivers/usb/host/xhci-debugfs.c+9−1

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drivers/usb/host/xhci-ring.c+1−0

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drivers/usb/host/xhci.c+2−2

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drivers/usb/image/mdc800.c+4−2

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drivers/usb/misc/uss720.c+1−1

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drivers/usb/misc/yurex.c+1−1

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drivers/usb/renesas_usbhs/common.c+9−0

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drivers/usb/roles/class.c+6−1

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drivers/usb/typec/altmodes/displayport.c+6−1

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drivers/usb/typec/tcpm/tcpm.c+1−1

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drivers/video/fbdev/au1100fb.c+6−2

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drivers/xen/xen-acpi-processor.c+2−5

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drivers/xen/xen-pciback/xenbus.c+5−5

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drivers/xen/xenbus/xenbus_client.c+14−3

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drivers/xen/xenbus/xenbus_probe.c+39−3

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drivers/xen/xenbus/xenbus_probe_frontend.c+1−1

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fs/afs/addr_list.c+4−4

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fs/binfmt_elf.c+2−1

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fs/btrfs/block-group.c+0−1

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fs/btrfs/delayed-inode.c+1−1

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fs/btrfs/disk-io.c+27−16

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fs/btrfs/extent-tree.c+7−1

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fs/btrfs/extent_io.c+1−0

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fs/btrfs/inode.c+36−2

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fs/btrfs/ioctl.c+34−5

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fs/btrfs/messages.h+0−3

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fs/btrfs/print-tree.c+10−0

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fs/btrfs/qgroup.c+1−1

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fs/btrfs/relocation.c+8−0

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fs/btrfs/scrub.c+1−1

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fs/btrfs/space-info.c+4−1

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fs/btrfs/transaction.c+16−0

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fs/btrfs/tree-checker.c+2−2

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fs/btrfs/uuid-tree.c+38−0

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fs/btrfs/uuid-tree.h+2−0

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fs/btrfs/volumes.c+5−3

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fs/ceph/addr.c+0−1

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fs/ceph/debugfs.c+2−2

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fs/ceph/dir.c+15−2

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fs/ceph/file.c+2−2

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fs/ceph/inode.c+1−1

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fs/ceph/mds_client.c+3−0

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fs/erofs/inode.c+6−1

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fs/erofs/internal.h+7−9

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fs/erofs/ishare.c+9−5

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fs/erofs/super.c+36−49

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fs/erofs/zmap.c+5−4

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fs/eventpoll.c+3−2

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fs/file_attr.c+1−1

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fs/fs-writeback.c+5−4

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fs/iomap/buffered-io.c+13−3

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fs/iomap/direct-io.c+14−1

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fs/iomap/ioend.c+53−6

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fs/minix/bitmap.c+1−1

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fs/namespace.c+74−59

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fs/netfs/direct_write.c+212−16

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fs/netfs/internal.h+3−1

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fs/netfs/write_collect.c+0−21

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fs/netfs/write_issue.c+3−38

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fs/nfs/Kconfig+2−1

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fs/nfs/nfs3proc.c+6−1

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fs/nfsd/nfsctl.c+11−11

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fs/nfsd/nfssvc.c+4−3

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fs/nsfs.c+14−1

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fs/pidfs.c+4−6

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fs/proc/base.c+3−0

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fs/smb/client/Makefile+2−0

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fs/smb/client/cached_dir.c+1−1

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fs/smb/client/cifs_fs_sb.h+1−1

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fs/smb/client/cifs_ioctl.h+0−8

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fs/smb/client/cifs_unicode.c+0−14

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fs/smb/client/cifs_unicode.h+13−1

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fs/smb/client/cifsacl.c+7−12

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fs/smb/client/cifsfs.c+50−43

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fs/smb/client/cifsglob.h+67−17

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fs/smb/client/cifsproto.h+23−4

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fs/smb/client/connect.c+44−36

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fs/smb/client/dfs_cache.c+1−1

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fs/smb/client/dir.c+29−24

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fs/smb/client/file.c+114−118

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fs/smb/client/fs_context.c+75−76

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fs/smb/client/fs_context.h+1−1

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fs/smb/client/inode.c+77−71

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fs/smb/client/ioctl.c+1−1

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fs/smb/client/link.c+8−6

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fs/smb/client/misc.c+52−6

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fs/smb/client/readdir.c+21−18

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fs/smb/client/reparse.c+14−13

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fs/smb/client/reparse.h+2−2

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fs/smb/client/smb1encrypt.c+2−1

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fs/smb/client/smb1ops.c+15−9

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fs/smb/client/smb2file.c+1−1

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fs/smb/client/smb2glob.h+12−0

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fs/smb/client/smb2inode.c+15−15

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fs/smb/client/smb2maperror.c+18−13

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fs/smb/client/smb2maperror_test.c+9−3

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fs/smb/client/smb2misc.c+4−14

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fs/smb/client/smb2ops.c+18−8

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fs/smb/client/smb2pdu.c+19−39

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fs/smb/client/smb2pdu.h+5−2

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fs/smb/client/smb2proto.h+0−3

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fs/smb/client/smb2transport.c+3−1

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fs/smb/client/trace.h+2−0

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fs/smb/client/transport.c+10−11

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fs/smb/client/xattr.c+3−3

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fs/smb/server/Kconfig+1−0

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Merge tag 'v7.0-rc4' into togreg

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@@ -216,7 +216,7 @@ writeback_limit WO specifies the maximum amount of write IO zram · 215 unmodified lines
216	writeback_limit_enable RW show and set writeback_limit feature	216	writeback_limit_enable RW show and set writeback_limit feature
217	writeback_batch_size RW show and set maximum number of in-flight	217	writeback_batch_size RW show and set maximum number of in-flight
218	writeback operations	218	writeback operations
219	writeback_compressed RW show and set compressed writeback feature	219	compressed_writeback RW show and set compressed writeback feature
220	comp_algorithm RW show and change the compression algorithm	220	comp_algorithm RW show and change the compression algorithm
221	algorithm_params WO setup compression algorithm parameters	221	algorithm_params WO setup compression algorithm parameters
222	compact WO trigger memory compaction	222	compact WO trigger memory compaction
@@ -439,11 +439,11 @@ budget in next setting is user's job. · 216 unmodified lines
439	By default zram stores written back pages in decompressed (raw) form, which	439	By default zram stores written back pages in decompressed (raw) form, which
440	means that writeback operation involves decompression of the page before	440	means that writeback operation involves decompression of the page before
441	writing it to the backing device. This behavior can be changed by enabling	441	writing it to the backing device. This behavior can be changed by enabling
442	`writeback_compressed` feature, which causes zram to write compressed pages	442	`compressed_writeback` feature, which causes zram to write compressed pages
443	to the backing device, thus avoiding decompression overhead. To enable	443	to the backing device, thus avoiding decompression overhead. To enable
444	this feature, execute::	444	this feature, execute::
445		445
446	$ echo yes > /sys/block/zramX/writeback_compressed	446	$ echo yes > /sys/block/zramX/compressed_writeback
447		447
448	Note that this feature should be configured before the `zramX` device is	448	Note that this feature should be configured before the `zramX` device is
449	initialized.	449	initialized.

@@ -1396,7 +1396,10 @@ or its flags may be modified, but it may not be resized. · 1395 unmodified lines
1396	Memory for the region is taken starting at the address denoted by the	1396	Memory for the region is taken starting at the address denoted by the
1397	field userspace_addr, which must point at user addressable memory for	1397	field userspace_addr, which must point at user addressable memory for
1398	the entire memory slot size. Any object may back this memory, including	1398	the entire memory slot size. Any object may back this memory, including
1399	anonymous memory, ordinary files, and hugetlbfs.	1399	anonymous memory, ordinary files, and hugetlbfs. Changes in the backing
		1400	of the memory region are automatically reflected into the guest.
		1401	For example, an mmap() that affects the region will be made visible
		1402	immediately. Another example is madvise(MADV_DROP).
1400		1403
1401	On architectures that support a form of address tagging, userspace_addr must	1404	On architectures that support a form of address tagging, userspace_addr must
1402	be an untagged address.	1405	be an untagged address.
@@ -1412,11 +1415,6 @@ use it. The latter can be set, if KVM_CAP_READONLY_MEM capability allows it, · 9 unmodified lines
1412	to make a new slot read-only. In this case, writes to this memory will be	1415	to make a new slot read-only. In this case, writes to this memory will be
1413	posted to userspace as KVM_EXIT_MMIO exits.	1416	posted to userspace as KVM_EXIT_MMIO exits.
1414		1417
1415	When the KVM_CAP_SYNC_MMU capability is available, changes in the backing of
1416	the memory region are automatically reflected into the guest. For example, an
1417	mmap() that affects the region will be made visible immediately. Another
1418	example is madvise(MADV_DROP).
1419
1420	For TDX guest, deleting/moving memory region loses guest memory contents.	1418	For TDX guest, deleting/moving memory region loses guest memory contents.
1421	Read only region isn't supported. Only as-id 0 is supported.	1419	Read only region isn't supported. Only as-id 0 is supported.
1422		1420
@@ -8437,115 +8435,123 @@ KVM_CHECK_EXTENSION. · 7014 unmodified lines
8437		8435
8438	The valid bits in cap.args[0] are:	8436	The valid bits in cap.args[0] are:
8439		8437
8440	=================================== ============================================	8438	======================================== ================================================
8441	KVM_X86_QUIRK_LINT0_REENABLED By default, the reset value for the LVT	8439	KVM_X86_QUIRK_LINT0_REENABLED By default, the reset value for the LVT
8442	LINT0 register is 0x700 (APIC_MODE_EXTINT).	8440	LINT0 register is 0x700 (APIC_MODE_EXTINT).
8443	When this quirk is disabled, the reset value	8441	When this quirk is disabled, the reset value
8444	is 0x10000 (APIC_LVT_MASKED).	8442	is 0x10000 (APIC_LVT_MASKED).
8445		8443
8446	KVM_X86_QUIRK_CD_NW_CLEARED By default, KVM clears CR0.CD and CR0.NW on	8444	KVM_X86_QUIRK_CD_NW_CLEARED By default, KVM clears CR0.CD and CR0.NW on
8447	AMD CPUs to workaround buggy guest firmware	8445	AMD CPUs to workaround buggy guest firmware
8448	that runs in perpetuity with CR0.CD, i.e.	8446	that runs in perpetuity with CR0.CD, i.e.
8449	with caches in "no fill" mode.	8447	with caches in "no fill" mode.
8450		8448
8451	When this quirk is disabled, KVM does not	8449	When this quirk is disabled, KVM does not
8452	change the value of CR0.CD and CR0.NW.	8450	change the value of CR0.CD and CR0.NW.
8453		8451
8454	KVM_X86_QUIRK_LAPIC_MMIO_HOLE By default, the MMIO LAPIC interface is	8452	KVM_X86_QUIRK_LAPIC_MMIO_HOLE By default, the MMIO LAPIC interface is
8455	available even when configured for x2APIC	8453	available even when configured for x2APIC
8456	mode. When this quirk is disabled, KVM	8454	mode. When this quirk is disabled, KVM
8457	disables the MMIO LAPIC interface if the	8455	disables the MMIO LAPIC interface if the
8458	LAPIC is in x2APIC mode.	8456	LAPIC is in x2APIC mode.
8459		8457
8460	KVM_X86_QUIRK_OUT_7E_INC_RIP By default, KVM pre-increments %rip before	8458	KVM_X86_QUIRK_OUT_7E_INC_RIP By default, KVM pre-increments %rip before
8461	exiting to userspace for an OUT instruction	8459	exiting to userspace for an OUT instruction
8462	to port 0x7e. When this quirk is disabled,	8460	to port 0x7e. When this quirk is disabled,
8463	KVM does not pre-increment %rip before	8461	KVM does not pre-increment %rip before
8464	exiting to userspace.	8462	exiting to userspace.
8465		8463
8466	KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT When this quirk is disabled, KVM sets	8464	KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT When this quirk is disabled, KVM sets
8467	CPUID.01H:ECX[bit 3] (MONITOR/MWAIT) if	8465	CPUID.01H:ECX[bit 3] (MONITOR/MWAIT) if
8468	IA32_MISC_ENABLE[bit 18] (MWAIT) is set.	8466	IA32_MISC_ENABLE[bit 18] (MWAIT) is set.
8469	Additionally, when this quirk is disabled,	8467	Additionally, when this quirk is disabled,
8470	KVM clears CPUID.01H:ECX[bit 3] if	8468	KVM clears CPUID.01H:ECX[bit 3] if
8471	IA32_MISC_ENABLE[bit 18] is cleared.	8469	IA32_MISC_ENABLE[bit 18] is cleared.
8472		8470
8473	KVM_X86_QUIRK_FIX_HYPERCALL_INSN By default, KVM rewrites guest	8471	KVM_X86_QUIRK_FIX_HYPERCALL_INSN By default, KVM rewrites guest
8474	VMMCALL/VMCALL instructions to match the	8472	VMMCALL/VMCALL instructions to match the
8475	vendor's hypercall instruction for the	8473	vendor's hypercall instruction for the
8476	system. When this quirk is disabled, KVM	8474	system. When this quirk is disabled, KVM
8477	will no longer rewrite invalid guest	8475	will no longer rewrite invalid guest
8478	hypercall instructions. Executing the	8476	hypercall instructions. Executing the
8479	incorrect hypercall instruction will	8477	incorrect hypercall instruction will
8480	generate a #UD within the guest.	8478	generate a #UD within the guest.
8481		8479
8482	KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS By default, KVM emulates MONITOR/MWAIT (if	8480	KVM_X86_QUIRK_MWAIT_NEVER_UD_FAULTS By default, KVM emulates MONITOR/MWAIT (if
8483	they are intercepted) as NOPs regardless of	8481	they are intercepted) as NOPs regardless of
8484	whether or not MONITOR/MWAIT are supported	8482	whether or not MONITOR/MWAIT are supported
8485	according to guest CPUID. When this quirk	8483	according to guest CPUID. When this quirk
8486	is disabled and KVM_X86_DISABLE_EXITS_MWAIT	8484	is disabled and KVM_X86_DISABLE_EXITS_MWAIT
8487	is not set (MONITOR/MWAIT are intercepted),	8485	is not set (MONITOR/MWAIT are intercepted),
8488	KVM will inject a #UD on MONITOR/MWAIT if	8486	KVM will inject a #UD on MONITOR/MWAIT if
8489	they're unsupported per guest CPUID. Note,	8487	they're unsupported per guest CPUID. Note,
8490	KVM will modify MONITOR/MWAIT support in	8488	KVM will modify MONITOR/MWAIT support in
8491	guest CPUID on writes to MISC_ENABLE if	8489	guest CPUID on writes to MISC_ENABLE if
8492	KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT is	8490	KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT is
8493	disabled.	8491	disabled.
8494		8492
8495	KVM_X86_QUIRK_SLOT_ZAP_ALL By default, for KVM_X86_DEFAULT_VM VMs, KVM	8493	KVM_X86_QUIRK_SLOT_ZAP_ALL By default, for KVM_X86_DEFAULT_VM VMs, KVM
8496	invalidates all SPTEs in all memslots and	8494	invalidates all SPTEs in all memslots and
8497	address spaces when a memslot is deleted or	8495	address spaces when a memslot is deleted or
8498	moved. When this quirk is disabled (or the	8496	moved. When this quirk is disabled (or the
8499	VM type isn't KVM_X86_DEFAULT_VM), KVM only	8497	VM type isn't KVM_X86_DEFAULT_VM), KVM only
8500	ensures the backing memory of the deleted	8498	ensures the backing memory of the deleted
8501	or moved memslot isn't reachable, i.e KVM	8499	or moved memslot isn't reachable, i.e KVM
8502	_may_ invalidate only SPTEs related to the	8500	_may_ invalidate only SPTEs related to the
8503	memslot.	8501	memslot.
8504		8502
8505	KVM_X86_QUIRK_STUFF_FEATURE_MSRS By default, at vCPU creation, KVM sets the	8503	KVM_X86_QUIRK_STUFF_FEATURE_MSRS By default, at vCPU creation, KVM sets the
8506	vCPU's MSR_IA32_PERF_CAPABILITIES (0x345),	8504	vCPU's MSR_IA32_PERF_CAPABILITIES (0x345),
8507	MSR_IA32_ARCH_CAPABILITIES (0x10a),	8505	MSR_IA32_ARCH_CAPABILITIES (0x10a),
8508	MSR_PLATFORM_INFO (0xce), and all VMX MSRs	8506	MSR_PLATFORM_INFO (0xce), and all VMX MSRs
8509	(0x480..0x492) to the maximal capabilities	8507	(0x480..0x492) to the maximal capabilities
8510	supported by KVM. KVM also sets	8508	supported by KVM. KVM also sets
8511	MSR_IA32_UCODE_REV (0x8b) to an arbitrary	8509	MSR_IA32_UCODE_REV (0x8b) to an arbitrary
8512	value (which is different for Intel vs.	8510	value (which is different for Intel vs.
8513	AMD). Lastly, when guest CPUID is set (by	8511	AMD). Lastly, when guest CPUID is set (by
8514	userspace), KVM modifies select VMX MSR	8512	userspace), KVM modifies select VMX MSR
8515	fields to force consistency between guest	8513	fields to force consistency between guest
8516	CPUID and L2's effective ISA. When this	8514	CPUID and L2's effective ISA. When this
8517	quirk is disabled, KVM zeroes the vCPU's MSR	8515	quirk is disabled, KVM zeroes the vCPU's MSR
8518	values (with two exceptions, see below),	8516	values (with two exceptions, see below),
8519	i.e. treats the feature MSRs like CPUID	8517	i.e. treats the feature MSRs like CPUID
8520	leaves and gives userspace full control of	8518	leaves and gives userspace full control of
8521	the vCPU model definition. This quirk does	8519	the vCPU model definition. This quirk does
8522	not affect VMX MSRs CR0/CR4_FIXED1 (0x487	8520	not affect VMX MSRs CR0/CR4_FIXED1 (0x487
8523	and 0x489), as KVM does now allow them to	8521	and 0x489), as KVM does now allow them to
8524	be set by userspace (KVM sets them based on	8522	be set by userspace (KVM sets them based on
8525	guest CPUID, for safety purposes).	8523	guest CPUID, for safety purposes).
8526		8524
8527	KVM_X86_QUIRK_IGNORE_GUEST_PAT By default, on Intel platforms, KVM ignores	8525	KVM_X86_QUIRK_IGNORE_GUEST_PAT By default, on Intel platforms, KVM ignores
8528	guest PAT and forces the effective memory	8526	guest PAT and forces the effective memory
8529	type to WB in EPT. The quirk is not available	8527	type to WB in EPT. The quirk is not available
8530	on Intel platforms which are incapable of	8528	on Intel platforms which are incapable of
8531	safely honoring guest PAT (i.e., without CPU	8529	safely honoring guest PAT (i.e., without CPU
8532	self-snoop, KVM always ignores guest PAT and	8530	self-snoop, KVM always ignores guest PAT and
8533	forces effective memory type to WB). It is	8531	forces effective memory type to WB). It is
8534	also ignored on AMD platforms or, on Intel,	8532	also ignored on AMD platforms or, on Intel,
8535	when a VM has non-coherent DMA devices	8533	when a VM has non-coherent DMA devices
8536	assigned; KVM always honors guest PAT in	8534	assigned; KVM always honors guest PAT in
8537	such case. The quirk is needed to avoid	8535	such case. The quirk is needed to avoid
8538	slowdowns on certain Intel Xeon platforms	8536	slowdowns on certain Intel Xeon platforms
8539	(e.g. ICX, SPR) where self-snoop feature is	8537	(e.g. ICX, SPR) where self-snoop feature is
8540	supported but UC is slow enough to cause	8538	supported but UC is slow enough to cause
8541	issues with some older guests that use	8539	issues with some older guests that use
8542	UC instead of WC to map the video RAM.	8540	UC instead of WC to map the video RAM.
8543	Userspace can disable the quirk to honor	8541	Userspace can disable the quirk to honor
8544	guest PAT if it knows that there is no such	8542	guest PAT if it knows that there is no such
8545	guest software, for example if it does not	8543	guest software, for example if it does not
8546	expose a bochs graphics device (which is	8544	expose a bochs graphics device (which is
8547	known to have had a buggy driver).	8545	known to have had a buggy driver).
8548	=================================== ============================================	8546
		8547	KVM_X86_QUIRK_VMCS12_ALLOW_FREEZE_IN_SMM By default, KVM relaxes the consistency
		8548	check for GUEST_IA32_DEBUGCTL in vmcs12
		8549	to allow FREEZE_IN_SMM to be set. When
		8550	this quirk is disabled, KVM requires this
		8551	bit to be cleared. Note that the vmcs02
		8552	bit is still completely controlled by the
		8553	host, regardless of the quirk setting.
		8554	======================================== ================================================
8549		8555
8550	7.32 KVM_CAP_MAX_VCPU_ID	8556	7.32 KVM_CAP_MAX_VCPU_ID
8551	------------------------	8557	------------------------

@@ -368,15 +368,15 @@ struct amdgpu_mode_info { · 367 unmodified lines
368		368
369	struct drm_property *plane_ctm_property;	369	struct drm_property *plane_ctm_property;
370	/**	370	/**
371	* @shaper_lut_property: Plane property to set pre-blending shaper LUT	371	* @plane_shaper_lut_property: Plane property to set pre-blending
372	* that converts color content before 3D LUT. If	372	* shaper LUT that converts color content before 3D LUT.
373	* plane_shaper_tf_property != Identity TF, AMD color module will	373	* If plane_shaper_tf_property != Identity TF, AMD color module will
374	* combine the user LUT values with pre-defined TF into the LUT	374	* combine the user LUT values with pre-defined TF into the LUT
375	* parameters to be programmed.	375	* parameters to be programmed.
376	*/	376	*/
377	struct drm_property *plane_shaper_lut_property;	377	struct drm_property *plane_shaper_lut_property;
378	/**	378	/**
379	* @shaper_lut_size_property: Plane property for the size of	379	* @plane_shaper_lut_size_property: Plane property for the size of
380	* pre-blending shaper LUT as supported by the driver (read-only).	380	* pre-blending shaper LUT as supported by the driver (read-only).
381	*/	381	*/
382	struct drm_property *plane_shaper_lut_size_property;	382	struct drm_property *plane_shaper_lut_size_property;
@@ -400,10 +400,10 @@ struct amdgpu_mode_info { · 17 unmodified lines
400	*/	400	*/
401	struct drm_property *plane_lut3d_property;	401	struct drm_property *plane_lut3d_property;
402	/**	402	/**
403	* @plane_degamma_lut_size_property: Plane property to define the max	403	* @plane_lut3d_size_property: Plane property to define the max size
404	* size of 3D LUT as supported by the driver (read-only). The max size	404	* of 3D LUT as supported by the driver (read-only). The max size is
405	* is the max size of one dimension and, therefore, the max number of	405	* the max size of one dimension and, therefore, the max number of
406	* entries for 3D LUT array is the 3D LUT size cubed;	406	* entries for 3D LUT array is the 3D LUT size cubed.
407	*/	407	*/
408	struct drm_property *plane_lut3d_size_property;	408	struct drm_property *plane_lut3d_size_property;
409	/**	409	/**