History

Merge tag 'drm-xe-next-2025-12-19' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next

[airlied: fix guc submit double definition] UAPI Changes: - Multi-Queue support (Niranjana) - Add DRM_XE_EXEC_QUEUE_SET_HANG_REPLAY_STATE (Brost) - Add NO_COMPRESSION BO flag and query capability (Sanjay) - Add gt_id to struct drm_xe_oa_unit (Ashutosh) - Expose MERT OA unit (Ashutosh) - Sysfs Survivability refactor (Riana) Cross-subsystem Changes: - VFIO: Add device specific vfio_pci driver variant for Intel graphics (Winiarski) Driver Changes: - MAINTAINERS update (Lucas -> Matt) - Add helper to query compression enable status (Xin) - Xe_VM fixes and updates (Shuicheng, Himal) - Documentation fixes (Winiarski, Swaraj, Niranjana) - Kunit fix (Roper) - Fix potential leaks, uaf, null derref, and oversized allocations (Shuicheng, Sanjay, Mika, Tapani) - Other minor fixes like kbuild duplication and sysfs_emit (Shuicheng, Madhur) - Handle msix vector0 interrupt (Venkata) - Scope-based forcewake and runtime PM (Roper, Raag) - GuC/HuC related fixes and refactors (Lucas, Zhanjun, Brost, Julia, Wajdeczko) - Fix conversion from clock ticks to milliseconds (Harish) - SRIOV PF PF: Add support for MERT (Lukasz) - Enable SR-IOV VF migration and other SRIOV updates (Winiarski, Satya, Brost, Wajdeczko, Piotr, Tomasz, Daniele) - Optimize runtime suspend/resume and other PM improvements (Raag) - Some W/a additions and updates (Bala, Harish, Roper) - Use for_each_tlb_inval() to calculate invalidation fences (Roper) - Fix VFIO link error (Arnd) - Fix ix drm_gpusvm_init() arguments (Arnd) - Other OA refactor (Ashutosh) - Refactor PAT and expose debugfs (Xin) - Enable Indirect Ring State for xe3p_xpc (Niranjana) - MEI interrupt fix (Junxiao) - Add stats for mode switching on hw_engine_group (Francois) - DMA-Buf related changes (Thomas) - Multi Queue feature support (Niranjana) - Enable I2C controller for Crescent Island (Raag) - Enable NVM for Crescent Island (Sasha) - Increase TDF timeout (Jagmeet) - Restore engine registers before restarting schedulers after GT reset (Jan) - Page Reclamation Support for Xe3p Platforms (Brian, Brost, Oak) - Fix performance when pagefaults and 3d/display share resources (Brost) - More OA MERT work (Ashutosh) - Fix return values (Dan) - Some log level and messages improvements (Brost) Signed-off-by: Dave Airlie <airlied@redhat.com>

Dave Airlie committed 10 months ago

Commit 9ec3c8e2 parents c5fb82d 844758b152 files · +5329 −1498Browse files

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include/uapi/drm/xe_drm.h+78−3
@@ -106,6 +106,7 @@ extern "C" { · 105 unmodified lines
106#define DRM_XE_OBSERVATION 0x0b106#define DRM_XE_OBSERVATION 0x0b
107#define DRM_XE_MADVISE 0x0c107#define DRM_XE_MADVISE 0x0c
108#define DRM_XE_VM_QUERY_MEM_RANGE_ATTRS 0x0d108#define DRM_XE_VM_QUERY_MEM_RANGE_ATTRS 0x0d
109#define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x0e
109 110
110/* Must be kept compact -- no holes */111/* Must be kept compact -- no holes */
111 112
@@ -123,6 +124,7 @@ extern "C" { · 11 unmodified lines
123#define DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param)124#define DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param)
124#define DRM_IOCTL_XE_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_MADVISE, struct drm_xe_madvise)125#define DRM_IOCTL_XE_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_MADVISE, struct drm_xe_madvise)
125#define DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_QUERY_MEM_RANGE_ATTRS, struct drm_xe_vm_query_mem_range_attr)126#define DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_QUERY_MEM_RANGE_ATTRS, struct drm_xe_vm_query_mem_range_attr)
127#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property)
126 128
127/**129/**
128 * DOC: Xe IOCTL Extensions130 * DOC: Xe IOCTL Extensions
@@ -210,8 +212,12 @@ struct drm_xe_ext_set_property { · 81 unmodified lines
210 /** @pad: MBZ */212 /** @pad: MBZ */
211 __u32 pad;213 __u32 pad;
212 214
213 /** @value: property value */215 union {
214 __u64 value;216 /** @value: property value */
217 __u64 value;
218 /** @ptr: pointer to user value */
219 __u64 ptr;
220 };
215 221
216 /** @reserved: Reserved */222 /** @reserved: Reserved */
217 __u64 reserved[2];223 __u64 reserved[2];
@@ -403,6 +409,9 @@ struct drm_xe_query_mem_regions { · 185 unmodified lines
403 * has low latency hint support409 * has low latency hint support
404 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR - Flag is set if the410 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR - Flag is set if the
405 * device has CPU address mirroring support411 * device has CPU address mirroring support
412 * - %DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT - Flag is set if the
413 * device supports the userspace hint %DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION.
414 * This is exposed only on Xe2+.
406 * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment415 * - %DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT - Minimal memory alignment
407 * required by this device, typically SZ_4K or SZ_64K416 * required by this device, typically SZ_4K or SZ_64K
408 * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address417 * - %DRM_XE_QUERY_CONFIG_VA_BITS - Maximum bits of a virtual address
@@ -421,6 +430,7 @@ struct drm_xe_query_config { · 12 unmodified lines
421 #define DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM (1 << 0)430 #define DRM_XE_QUERY_CONFIG_FLAG_HAS_VRAM (1 << 0)
422 #define DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY (1 << 1)431 #define DRM_XE_QUERY_CONFIG_FLAG_HAS_LOW_LATENCY (1 << 1)
423 #define DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR (1 << 2)432 #define DRM_XE_QUERY_CONFIG_FLAG_HAS_CPU_ADDR_MIRROR (1 << 2)
433 #define DRM_XE_QUERY_CONFIG_FLAG_HAS_NO_COMPRESSION_HINT (1 << 3)
424#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2434#define DRM_XE_QUERY_CONFIG_MIN_ALIGNMENT 2
425#define DRM_XE_QUERY_CONFIG_VA_BITS 3435#define DRM_XE_QUERY_CONFIG_VA_BITS 3
426#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4436#define DRM_XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY 4
@@ -791,6 +801,17 @@ struct drm_xe_device_query { · 364 unmodified lines
791 * need to use VRAM for display surfaces, therefore the kernel requires801 * need to use VRAM for display surfaces, therefore the kernel requires
792 * setting this flag for such objects, otherwise an error is thrown on802 * setting this flag for such objects, otherwise an error is thrown on
793 * small-bar systems.803 * small-bar systems.
804 * - %DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION - Allows userspace to
805 * hint that compression (CCS) should be disabled for the buffer being
806 * created. This can avoid unnecessary memory operations and CCS state
807 * management.
808 * On pre-Xe2 platforms, this flag is currently rejected as compression
809 * control is not supported via PAT index. On Xe2+ platforms, compression
810 * is controlled via PAT entries. If this flag is set, the driver will reject
811 * any VM bind that requests a PAT index enabling compression for this BO.
812 * Note: On dGPU platforms, there is currently no change in behavior with
813 * this flag, but future improvements may leverage it. The current benefit is
814 * primarily applicable to iGPU platforms.
794 *815 *
795 * @cpu_caching supports the following values:816 * @cpu_caching supports the following values:
796 * - %DRM_XE_GEM_CPU_CACHING_WB - Allocate the pages with write-back817 * - %DRM_XE_GEM_CPU_CACHING_WB - Allocate the pages with write-back
@@ -837,6 +858,7 @@ struct drm_xe_gem_create { · 40 unmodified lines
837#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)858#define DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING (1 << 0)
838#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1)859#define DRM_XE_GEM_CREATE_FLAG_SCANOUT (1 << 1)
839#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)860#define DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM (1 << 2)
861#define DRM_XE_GEM_CREATE_FLAG_NO_COMPRESSION (1 << 3)
840 /**862 /**
841 * @flags: Flags, currently a mask of memory instances of where BO can863 * @flags: Flags, currently a mask of memory instances of where BO can
842 * be placed864 * be placed
@@ -1252,6 +1274,20 @@ struct drm_xe_vm_bind { · 409 unmodified lines
1252 * Given that going into a power-saving state kills PXP HWDRM sessions,1274 * Given that going into a power-saving state kills PXP HWDRM sessions,
1253 * runtime PM will be blocked while queues of this type are alive.1275 * runtime PM will be blocked while queues of this type are alive.
1254 * All PXP queues will be killed if a PXP invalidation event occurs.1276 * All PXP queues will be killed if a PXP invalidation event occurs.
1277 * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP - Create a multi-queue group
1278 * or add secondary queues to a multi-queue group.
1279 * If the extension's 'value' field has %DRM_XE_MULTI_GROUP_CREATE flag set,
1280 * then a new multi-queue group is created with this queue as the primary queue
1281 * (Q0). Otherwise, the queue gets added to the multi-queue group whose primary
1282 * queue's exec_queue_id is specified in the lower 32 bits of the 'value' field.
1283 * If the extension's 'value' field has %DRM_XE_MULTI_GROUP_KEEP_ACTIVE flag
1284 * set, then the multi-queue group is kept active after the primary queue is
1285 * destroyed.
1286 * All the other non-relevant bits of extension's 'value' field while adding the
1287 * primary or the secondary queues of the group must be set to 0.
1288 * - %DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY - Set the queue
1289 * priority within the multi-queue group. Current valid priority values are 0–2
1290 * (default is 1), with higher values indicating higher priority.
1255 *1291 *
1256 * The example below shows how to use @drm_xe_exec_queue_create to create1292 * The example below shows how to use @drm_xe_exec_queue_create to create
1257 * a simple exec_queue (no parallel submission) of class1293 * a simple exec_queue (no parallel submission) of class
@@ -1292,6 +1328,11 @@ struct drm_xe_exec_queue_create { · 34 unmodified lines
1292#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 01328#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY 0
1293#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 11329#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE 1
1294#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE 21330#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE 2
1331#define DRM_XE_EXEC_QUEUE_SET_HANG_REPLAY_STATE 3
1332#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_GROUP 4
1333#define DRM_XE_MULTI_GROUP_CREATE (1ull << 63)
1334#define DRM_XE_MULTI_GROUP_KEEP_ACTIVE (1ull << 62)
1335#define DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY 5
1295 /** @extensions: Pointer to the first extension struct, if any */1336 /** @extensions: Pointer to the first extension struct, if any */
1296 __u64 extensions;1337 __u64 extensions;
1297 1338
@@ -1655,6 +1696,9 @@ enum drm_xe_oa_unit_type { · 357 unmodified lines
1655 1696
1656 /** @DRM_XE_OA_UNIT_TYPE_OAM_SAG: OAM_SAG OA unit */1697 /** @DRM_XE_OA_UNIT_TYPE_OAM_SAG: OAM_SAG OA unit */
1657 DRM_XE_OA_UNIT_TYPE_OAM_SAG,1698 DRM_XE_OA_UNIT_TYPE_OAM_SAG,
1699
1700 /** @DRM_XE_OA_UNIT_TYPE_MERT: MERT OA unit */
1701 DRM_XE_OA_UNIT_TYPE_MERT,
1658};1702};
1659 1703
1660/**1704/**
@@ -1677,12 +1721,19 @@ struct drm_xe_oa_unit { · 16 unmodified lines
1677#define DRM_XE_OA_CAPS_OA_BUFFER_SIZE (1 << 2)1721#define DRM_XE_OA_CAPS_OA_BUFFER_SIZE (1 << 2)
1678#define DRM_XE_OA_CAPS_WAIT_NUM_REPORTS (1 << 3)1722#define DRM_XE_OA_CAPS_WAIT_NUM_REPORTS (1 << 3)
1679#define DRM_XE_OA_CAPS_OAM (1 << 4)1723#define DRM_XE_OA_CAPS_OAM (1 << 4)
1724#define DRM_XE_OA_CAPS_OA_UNIT_GT_ID (1 << 5)
1680 1725
1681 /** @oa_timestamp_freq: OA timestamp freq */1726 /** @oa_timestamp_freq: OA timestamp freq */
1682 __u64 oa_timestamp_freq;1727 __u64 oa_timestamp_freq;
1683 1728
1729 /** @gt_id: gt id for this OA unit */
1730 __u16 gt_id;
1731
1732 /** @reserved1: MBZ */
1733 __u16 reserved1[3];
1734
1684 /** @reserved: MBZ */1735 /** @reserved: MBZ */
1685 __u64 reserved[4];1736 __u64 reserved[3];
1686 1737
1687 /** @num_engines: number of engines in @eci array */1738 /** @num_engines: number of engines in @eci array */
1688 __u64 num_engines;1739 __u64 num_engines;
@@ -2274,6 +2325,30 @@ struct drm_xe_vm_query_mem_range_attr { · 585 unmodified lines
2274 2325
2275};2326};
2276 2327
2328/**
2329 * struct drm_xe_exec_queue_set_property - exec queue set property
2330 *
2331 * Sets execution queue properties dynamically.
2332 * Currently only %DRM_XE_EXEC_QUEUE_SET_PROPERTY_MULTI_QUEUE_PRIORITY
2333 * property can be dynamically set.
2334 */
2335struct drm_xe_exec_queue_set_property {
2336 /** @extensions: Pointer to the first extension struct, if any */
2337 __u64 extensions;
2338
2339 /** @exec_queue_id: Exec queue ID */
2340 __u32 exec_queue_id;
2341
2342 /** @property: property to set */
2343 __u32 property;
2344
2345 /** @value: property value */
2346 __u64 value;
2347
2348 /** @reserved: Reserved */
2349 __u64 reserved[2];
2350};
2351
2277#if defined(__cplusplus)2352#if defined(__cplusplus)
2278}2353}
2279#endif2354#endif