Pull Xtensa updates from Max Filippov: - switch to generated syscall table - switch ptrace to regsets, use regsets for core dumps - complete tracehook implementation - add syscall tracepoints support - add jumplabels support - add memtest support - drop unused/duplicated code from entry.S, ptrace.c, coprocessor.S, elf.h and syscall.h - clean up warnings caused by WSR/RSR macros - clean up DTC warnings about SPI controller node names in xtfpga.dtsi - simplify coprocessor.S - get rid of explicit 'l32r' instruction usage in assembly * tag 'xtensa-20181228' of git://github.com/jcmvbkbc/linux-xtensa: (25 commits) xtensa: implement jump_label support xtensa: implement syscall tracepoints xtensa: implement tracehook functions and enable HAVE_ARCH_TRACEHOOK xtensa: enable CORE_DUMP_USE_REGSET xtensa: implement TIE regset xtensa: implement task_user_regset_view xtensa: call do_syscall_trace_{enter,leave} selectively xtensa: use NO_SYSCALL instead of -1 xtensa: define syscall_get_arch() Move EM_XTENSA to uapi/linux/elf-em.h xtensa: support memtest xtensa: don't use l32r opcode directly xtensa: xtfpga.dtsi: fix dtc warnings about SPI xtensa: don't clear cpenable unconditionally on release xtensa: simplify coprocessor.S xtensa: clean up WSR*/RSR*/get_sr/set_sr xtensa: drop unused declarations from elf.h xtensa: clean up syscall.h xtensa: drop unused coprocessor helper functions xtensa: drop custom PTRACE_{PEEK,POKE}{TEXT,DATA} ...
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| @@ -411,6 +411,7 @@ enum { · 410 unmodified lines | ||
| 411 | 411 | #define AUDIT_ARCH_TILEGX32 (EM_TILEGX|__AUDIT_ARCH_LE) |
| 412 | 412 | #define AUDIT_ARCH_TILEPRO (EM_TILEPRO|__AUDIT_ARCH_LE) |
| 413 | 413 | #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) |
| 414 | +#define AUDIT_ARCH_XTENSA (EM_XTENSA) | |
| 414 | 415 | |
| 415 | 416 | #define AUDIT_PERM_EXEC 1 |
| 416 | 417 | #define AUDIT_PERM_WRITE 2 |
| @@ -34,6 +34,7 @@ · 33 unmodified lines | ||
| 34 | 34 | #define EM_M32R 88 /* Renesas M32R */ |
| 35 | 35 | #define EM_MN10300 89 /* Panasonic/MEI MN10300, AM33 */ |
| 36 | 36 | #define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */ |
| 37 | +#define EM_XTENSA 94 /* Tensilica Xtensa Architecture */ | |
| 37 | 38 | #define EM_BLACKFIN 106 /* ADI Blackfin Processor */ |
| 38 | 39 | #define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */ |
| 39 | 40 | #define EM_TI_C6000 140 /* TI C6X DSPs */ |