History

Merge tag 'char-misc-6.1-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc fixes from Greg KH: "Some small driver fixes for 6.1-rc3. They include: - iio driver bugfixes - counter driver bugfixes - coresight bugfixes, including a revert and then a second fix to get it right. All of these have been in linux-next with no reported problems" * tag 'char-misc-6.1-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (21 commits) misc: sgi-gru: use explicitly signed char coresight: cti: Fix hang in cti_disable_hw() Revert "coresight: cti: Fix hang in cti_disable_hw()" counter: 104-quad-8: Fix race getting function mode and direction counter: microchip-tcb-capture: Handle Signal1 read and Synapse coresight: cti: Fix hang in cti_disable_hw() coresight: Fix possible deadlock with lock dependency counter: ti-ecap-capture: fix IS_ERR() vs NULL check counter: Reduce DEFINE_COUNTER_ARRAY_POLARITY() to defining counter_array iio: bmc150-accel-core: Fix unsafe buffer attributes iio: adxl367: Fix unsafe buffer attributes iio: adxl372: Fix unsafe buffer attributes iio: at91-sama5d2_adc: Fix unsafe buffer attributes iio: temperature: ltc2983: allocate iio channels once tools: iio: iio_utils: fix digit calculation iio: adc: stm32-adc: fix channel sampling time init iio: adc: mcp3911: mask out device ID in debug prints iio: adc: mcp3911: use correct id bits iio: adc: mcp3911: return proper error code on failure to allocate trigger iio: adc: mcp3911: fix sizeof() vs ARRAY_SIZE() bug ...

Linus Torvalds committed 4 years ago

Commit 9f127542 parents c4d25ce 677047317 files · +175 −91Browse files

Unified · Split

17 files
  1. drivers/counter/104-quad-8.c +42 −22
  2. drivers/counter/microchip-tcb-capture.c +14 −4
  3. drivers/counter/ti-ecap-capture.c +4 −3
  4. drivers/hwtracing/coresight/coresight-core.c +4 −3
  5. drivers/hwtracing/coresight/coresight-cti-core.c +3 −7
  6. drivers/iio/accel/adxl367.c +18 −5
  7. drivers/iio/accel/adxl372.c +18 −5
  8. drivers/iio/accel/bmc150-accel-core.c +18 −5
  9. drivers/iio/adc/at91-sama5d2_adc.c +18 −5
  10. drivers/iio/adc/mcp3911.c +7 −6
  11. drivers/iio/adc/stm32-adc.c +6 −5
  12. drivers/iio/light/tsl2583.c +1 −1
  13. drivers/iio/temperature/ltc2983.c +6 −7
  14. drivers/misc/sgi-gru/grumain.c +3 −3
  15. drivers/misc/sgi-gru/grutables.h +7 −7
  16. include/linux/counter.h +2 −3
  17. tools/iio/iio_utils.c +4 −0
drivers/counter/104-quad-8.c+42−22
@@ -232,34 +232,45 @@ static const enum counter_function quad8_count_functions_list[] = { · 231 unmodified lines
232 COUNTER_FUNCTION_QUADRATURE_X4,232 COUNTER_FUNCTION_QUADRATURE_X4,
233};233};
234 234
235static int quad8_function_get(const struct quad8 *const priv, const size_t id,
236 enum counter_function *const function)
237{
238 if (!priv->quadrature_mode[id]) {
239 *function = COUNTER_FUNCTION_PULSE_DIRECTION;
240 return 0;
241 }
242
243 switch (priv->quadrature_scale[id]) {
244 case 0:
245 *function = COUNTER_FUNCTION_QUADRATURE_X1_A;
246 return 0;
247 case 1:
248 *function = COUNTER_FUNCTION_QUADRATURE_X2_A;
249 return 0;
250 case 2:
251 *function = COUNTER_FUNCTION_QUADRATURE_X4;
252 return 0;
253 default:
254 /* should never reach this path */
255 return -EINVAL;
256 }
257}
258
235static int quad8_function_read(struct counter_device *counter,259static int quad8_function_read(struct counter_device *counter,
236 struct counter_count *count,260 struct counter_count *count,
237 enum counter_function *function)261 enum counter_function *function)
238{262{
239 struct quad8 *const priv = counter_priv(counter);263 struct quad8 *const priv = counter_priv(counter);
240 const int id = count->id;
241 unsigned long irqflags;264 unsigned long irqflags;
265 int retval;
242 266
243 spin_lock_irqsave(&priv->lock, irqflags);267 spin_lock_irqsave(&priv->lock, irqflags);
244 268
245 if (priv->quadrature_mode[id])269 retval = quad8_function_get(priv, count->id, function);
246 switch (priv->quadrature_scale[id]) {
247 case 0:
248 *function = COUNTER_FUNCTION_QUADRATURE_X1_A;
249 break;
250 case 1:
251 *function = COUNTER_FUNCTION_QUADRATURE_X2_A;
252 break;
253 case 2:
254 *function = COUNTER_FUNCTION_QUADRATURE_X4;
255 break;
256 }
257 else
258 *function = COUNTER_FUNCTION_PULSE_DIRECTION;
259 270
260 spin_unlock_irqrestore(&priv->lock, irqflags);271 spin_unlock_irqrestore(&priv->lock, irqflags);
261 272
262 return 0;273 return retval;
263}274}
264 275
265static int quad8_function_write(struct counter_device *counter,276static int quad8_function_write(struct counter_device *counter,
@@ -359,6 +370,7 @@ static int quad8_action_read(struct counter_device *counter, · 93 unmodified lines
359 enum counter_synapse_action *action)370 enum counter_synapse_action *action)
360{371{
361 struct quad8 *const priv = counter_priv(counter);372 struct quad8 *const priv = counter_priv(counter);
373 unsigned long irqflags;
362 int err;374 int err;
363 enum counter_function function;375 enum counter_function function;
364 const size_t signal_a_id = count->synapses[0].signal->id;376 const size_t signal_a_id = count->synapses[0].signal->id;
@@ -374,9 +386,21 @@ static int quad8_action_read(struct counter_device *counter, · 9 unmodified lines
374 return 0;386 return 0;
375 }387 }
376 388
377 err = quad8_function_read(counter, count, &function);389 spin_lock_irqsave(&priv->lock, irqflags);
378 if (err)390
391 /* Get Count function and direction atomically */
392 err = quad8_function_get(priv, count->id, &function);
393 if (err) {
394 spin_unlock_irqrestore(&priv->lock, irqflags);
395 return err;
396 }
397 err = quad8_direction_read(counter, count, &direction);
398 if (err) {
399 spin_unlock_irqrestore(&priv->lock, irqflags);
379 return err;400 return err;
401 }
402
403 spin_unlock_irqrestore(&priv->lock, irqflags);
380 404
381 /* Default action mode */405 /* Default action mode */
382 *action = COUNTER_SYNAPSE_ACTION_NONE;406 *action = COUNTER_SYNAPSE_ACTION_NONE;
@@ -389,10 +413,6 @@ static int quad8_action_read(struct counter_device *counter, · 6 unmodified lines
389 return 0;413 return 0;
390 case COUNTER_FUNCTION_QUADRATURE_X1_A:414 case COUNTER_FUNCTION_QUADRATURE_X1_A:
391 if (synapse->signal->id == signal_a_id) {415 if (synapse->signal->id == signal_a_id) {
392 err = quad8_direction_read(counter, count, &direction);
393 if (err)
394 return err;
395
396 if (direction == COUNTER_COUNT_DIRECTION_FORWARD)416 if (direction == COUNTER_COUNT_DIRECTION_FORWARD)
397 *action = COUNTER_SYNAPSE_ACTION_RISING_EDGE;417 *action = COUNTER_SYNAPSE_ACTION_RISING_EDGE;
398 else418 else
drivers/counter/microchip-tcb-capture.c+14−4
@@ -28,7 +28,6 @@ struct mchp_tc_data { · 27 unmodified lines
28 int qdec_mode;28 int qdec_mode;
29 int num_channels;29 int num_channels;
30 int channel[2];30 int channel[2];
31 bool trig_inverted;
32};31};
33 32
34static const enum counter_function mchp_tc_count_functions[] = {33static const enum counter_function mchp_tc_count_functions[] = {
@@ -153,7 +152,7 @@ static int mchp_tc_count_signal_read(struct counter_device *counter, · 118 unmodified lines
153 152
154 regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr);153 regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], SR), &sr);
155 154
156 if (priv->trig_inverted)155 if (signal->id == 1)
157 sigstatus = (sr & ATMEL_TC_MTIOB);156 sigstatus = (sr & ATMEL_TC_MTIOB);
158 else157 else
159 sigstatus = (sr & ATMEL_TC_MTIOA);158 sigstatus = (sr & ATMEL_TC_MTIOA);
@@ -171,6 +170,17 @@ static int mchp_tc_count_action_read(struct counter_device *counter, · 11 unmodified lines
171 struct mchp_tc_data *const priv = counter_priv(counter);170 struct mchp_tc_data *const priv = counter_priv(counter);
172 u32 cmr;171 u32 cmr;
173 172
173 if (priv->qdec_mode) {
174 *action = COUNTER_SYNAPSE_ACTION_BOTH_EDGES;
175 return 0;
176 }
177
178 /* Only TIOA signal is evaluated in non-QDEC mode */
179 if (synapse->signal->id != 0) {
180 *action = COUNTER_SYNAPSE_ACTION_NONE;
181 return 0;
182 }
183
174 regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);184 regmap_read(priv->regmap, ATMEL_TC_REG(priv->channel[0], CMR), &cmr);
175 185
176 switch (cmr & ATMEL_TC_ETRGEDG) {186 switch (cmr & ATMEL_TC_ETRGEDG) {
@@ -199,8 +209,8 @@ static int mchp_tc_count_action_write(struct counter_device *counter, · 22 unmodified lines
199 struct mchp_tc_data *const priv = counter_priv(counter);209 struct mchp_tc_data *const priv = counter_priv(counter);
200 u32 edge = ATMEL_TC_ETRGEDG_NONE;210 u32 edge = ATMEL_TC_ETRGEDG_NONE;
201 211
202 /* QDEC mode is rising edge only */212 /* QDEC mode is rising edge only; only TIOA handled in non-QDEC mode */
203 if (priv->qdec_mode)213 if (priv->qdec_mode || synapse->signal->id != 0)
204 return -EINVAL;214 return -EINVAL;
205 215
206 switch (action) {216 switch (action) {
drivers/counter/ti-ecap-capture.c+4−3
@@ -377,7 +377,8 @@ static const enum counter_signal_polarity ecap_cnt_pol_avail[] = { · 376 unmodified lines
377 COUNTER_SIGNAL_POLARITY_NEGATIVE,377 COUNTER_SIGNAL_POLARITY_NEGATIVE,
378};378};
379 379
380static DEFINE_COUNTER_ARRAY_POLARITY(ecap_cnt_pol_array, ecap_cnt_pol_avail, ECAP_NB_CEVT);380static DEFINE_COUNTER_AVAILABLE(ecap_cnt_pol_available, ecap_cnt_pol_avail);
381static DEFINE_COUNTER_ARRAY_POLARITY(ecap_cnt_pol_array, ecap_cnt_pol_available, ECAP_NB_CEVT);
381 382
382static struct counter_comp ecap_cnt_signal_ext[] = {383static struct counter_comp ecap_cnt_signal_ext[] = {
383 COUNTER_COMP_ARRAY_POLARITY(ecap_cnt_pol_read, ecap_cnt_pol_write, ecap_cnt_pol_array),384 COUNTER_COMP_ARRAY_POLARITY(ecap_cnt_pol_read, ecap_cnt_pol_write, ecap_cnt_pol_array),
@@ -479,8 +480,8 @@ static int ecap_cnt_probe(struct platform_device *pdev) · 95 unmodified lines
479 int ret;480 int ret;
480 481
481 counter_dev = devm_counter_alloc(dev, sizeof(*ecap_dev));482 counter_dev = devm_counter_alloc(dev, sizeof(*ecap_dev));
482 if (IS_ERR(counter_dev))483 if (!counter_dev)
483 return PTR_ERR(counter_dev);484 return -ENOMEM;
484 485
485 counter_dev->name = ECAP_DRV_NAME;486 counter_dev->name = ECAP_DRV_NAME;
486 counter_dev->parent = dev;487 counter_dev->parent = dev;
drivers/hwtracing/coresight/coresight-core.c+4−3
@@ -1687,14 +1687,15 @@ struct coresight_device *coresight_register(struct coresight_desc *desc) · 1686 unmodified lines
1687 ret = coresight_fixup_device_conns(csdev);1687 ret = coresight_fixup_device_conns(csdev);
1688 if (!ret)1688 if (!ret)
1689 ret = coresight_fixup_orphan_conns(csdev);1689 ret = coresight_fixup_orphan_conns(csdev);
1690 if (!ret && cti_assoc_ops && cti_assoc_ops->add)
1691 cti_assoc_ops->add(csdev);
1692 1690
1693out_unlock:1691out_unlock:
1694 mutex_unlock(&coresight_mutex);1692 mutex_unlock(&coresight_mutex);
1695 /* Success */1693 /* Success */
1696 if (!ret)1694 if (!ret) {
1695 if (cti_assoc_ops && cti_assoc_ops->add)
1696 cti_assoc_ops->add(csdev);
1697 return csdev;1697 return csdev;
1698 }
1698 1699
1699 /* Unregister the device if needed */1700 /* Unregister the device if needed */
1700 if (registered) {1701 if (registered) {
drivers/hwtracing/coresight/coresight-cti-core.c+3−7
@@ -90,11 +90,9 @@ void cti_write_all_hw_regs(struct cti_drvdata *drvdata) · 89 unmodified lines
90static int cti_enable_hw(struct cti_drvdata *drvdata)90static int cti_enable_hw(struct cti_drvdata *drvdata)
91{91{
92 struct cti_config *config = &drvdata->config;92 struct cti_config *config = &drvdata->config;
93 struct device *dev = &drvdata->csdev->dev;
94 unsigned long flags;93 unsigned long flags;
95 int rc = 0;94 int rc = 0;
96 95
97 pm_runtime_get_sync(dev->parent);
98 spin_lock_irqsave(&drvdata->spinlock, flags);96 spin_lock_irqsave(&drvdata->spinlock, flags);
99 97
100 /* no need to do anything if enabled or unpowered*/98 /* no need to do anything if enabled or unpowered*/
@@ -119,7 +117,6 @@ cti_state_unchanged: · 18 unmodified lines
119 /* cannot enable due to error */117 /* cannot enable due to error */
120cti_err_not_enabled:118cti_err_not_enabled:
121 spin_unlock_irqrestore(&drvdata->spinlock, flags);119 spin_unlock_irqrestore(&drvdata->spinlock, flags);
122 pm_runtime_put(dev->parent);
123 return rc;120 return rc;
124}121}
125 122
@@ -153,7 +150,6 @@ cti_hp_not_enabled: · 27 unmodified lines
153static int cti_disable_hw(struct cti_drvdata *drvdata)150static int cti_disable_hw(struct cti_drvdata *drvdata)
154{151{
155 struct cti_config *config = &drvdata->config;152 struct cti_config *config = &drvdata->config;
156 struct device *dev = &drvdata->csdev->dev;
157 struct coresight_device *csdev = drvdata->csdev;153 struct coresight_device *csdev = drvdata->csdev;
158 154
159 spin_lock(&drvdata->spinlock);155 spin_lock(&drvdata->spinlock);
@@ -175,7 +171,6 @@ static int cti_disable_hw(struct cti_drvdata *drvdata) · 15 unmodified lines
175 coresight_disclaim_device_unlocked(csdev);171 coresight_disclaim_device_unlocked(csdev);
176 CS_LOCK(drvdata->base);172 CS_LOCK(drvdata->base);
177 spin_unlock(&drvdata->spinlock);173 spin_unlock(&drvdata->spinlock);
178 pm_runtime_put(dev->parent);
179 return 0;174 return 0;
180 175
181 /* not disabled this call */176 /* not disabled this call */
@@ -541,7 +536,7 @@ cti_match_fixup_csdev(struct cti_device *ctidev, const char *node_name, · 359 unmodified lines
541/*536/*
542 * Search the cti list to add an associated CTI into the supplied CS device537 * Search the cti list to add an associated CTI into the supplied CS device
543 * This will set the association if CTI declared before the CS device.538 * This will set the association if CTI declared before the CS device.
544 * (called from coresight_register() with coresight_mutex locked).539 * (called from coresight_register() without coresight_mutex locked).
545 */540 */
546static void cti_add_assoc_to_csdev(struct coresight_device *csdev)541static void cti_add_assoc_to_csdev(struct coresight_device *csdev)
547{542{
@@ -569,7 +564,8 @@ static void cti_add_assoc_to_csdev(struct coresight_device *csdev) · 21 unmodified lines
569 * if we found a matching csdev then update the ECT564 * if we found a matching csdev then update the ECT
570 * association pointer for the device with this CTI.565 * association pointer for the device with this CTI.
571 */566 */
572 csdev->ect_dev = ect_item->csdev;567 coresight_set_assoc_ectdev_mutex(csdev->ect_dev,
568 ect_item->csdev);
573 break;569 break;
574 }570 }
575 }571 }
drivers/iio/accel/adxl367.c+18−5
@@ -1185,17 +1185,30 @@ static ssize_t adxl367_get_fifo_watermark(struct device *dev, · 1184 unmodified lines
1185 return sysfs_emit(buf, "%d\n", fifo_watermark);1185 return sysfs_emit(buf, "%d\n", fifo_watermark);
1186}1186}
1187 1187
1188static IIO_CONST_ATTR(hwfifo_watermark_min, "1");1188static ssize_t hwfifo_watermark_min_show(struct device *dev,
1189static IIO_CONST_ATTR(hwfifo_watermark_max,1189 struct device_attribute *attr,
1190 __stringify(ADXL367_FIFO_MAX_WATERMARK));1190 char *buf)
1191{
1192 return sysfs_emit(buf, "%s\n", "1");
1193}
1194
1195static ssize_t hwfifo_watermark_max_show(struct device *dev,
1196 struct device_attribute *attr,
1197 char *buf)
1198{
1199 return sysfs_emit(buf, "%s\n", __stringify(ADXL367_FIFO_MAX_WATERMARK));
1200}
1201
1202static IIO_DEVICE_ATTR_RO(hwfifo_watermark_min, 0);
1203static IIO_DEVICE_ATTR_RO(hwfifo_watermark_max, 0);
1191static IIO_DEVICE_ATTR(hwfifo_watermark, 0444,1204static IIO_DEVICE_ATTR(hwfifo_watermark, 0444,
1192 adxl367_get_fifo_watermark, NULL, 0);1205 adxl367_get_fifo_watermark, NULL, 0);
1193static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,1206static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,
1194 adxl367_get_fifo_enabled, NULL, 0);1207 adxl367_get_fifo_enabled, NULL, 0);
1195 1208
1196static const struct attribute *adxl367_fifo_attributes[] = {1209static const struct attribute *adxl367_fifo_attributes[] = {
1197 &iio_const_attr_hwfifo_watermark_min.dev_attr.attr,1210 &iio_dev_attr_hwfifo_watermark_min.dev_attr.attr,
1198 &iio_const_attr_hwfifo_watermark_max.dev_attr.attr,1211 &iio_dev_attr_hwfifo_watermark_max.dev_attr.attr,
1199 &iio_dev_attr_hwfifo_watermark.dev_attr.attr,1212 &iio_dev_attr_hwfifo_watermark.dev_attr.attr,
1200 &iio_dev_attr_hwfifo_enabled.dev_attr.attr,1213 &iio_dev_attr_hwfifo_enabled.dev_attr.attr,
1201 NULL,1214 NULL,
drivers/iio/accel/adxl372.c+18−5
@@ -998,17 +998,30 @@ static ssize_t adxl372_get_fifo_watermark(struct device *dev, · 997 unmodified lines
998 return sprintf(buf, "%d\n", st->watermark);998 return sprintf(buf, "%d\n", st->watermark);
999}999}
1000 1000
1001static IIO_CONST_ATTR(hwfifo_watermark_min, "1");1001static ssize_t hwfifo_watermark_min_show(struct device *dev,
1002static IIO_CONST_ATTR(hwfifo_watermark_max,1002 struct device_attribute *attr,
1003 __stringify(ADXL372_FIFO_SIZE));1003 char *buf)
1004{
1005 return sysfs_emit(buf, "%s\n", "1");
1006}
1007
1008static ssize_t hwfifo_watermark_max_show(struct device *dev,
1009 struct device_attribute *attr,
1010 char *buf)
1011{
1012 return sysfs_emit(buf, "%s\n", __stringify(ADXL372_FIFO_SIZE));
1013}
1014
1015static IIO_DEVICE_ATTR_RO(hwfifo_watermark_min, 0);
1016static IIO_DEVICE_ATTR_RO(hwfifo_watermark_max, 0);
1004static IIO_DEVICE_ATTR(hwfifo_watermark, 0444,1017static IIO_DEVICE_ATTR(hwfifo_watermark, 0444,
1005 adxl372_get_fifo_watermark, NULL, 0);1018 adxl372_get_fifo_watermark, NULL, 0);
1006static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,1019static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,
1007 adxl372_get_fifo_enabled, NULL, 0);1020 adxl372_get_fifo_enabled, NULL, 0);
1008 1021
1009static const struct attribute *adxl372_fifo_attributes[] = {1022static const struct attribute *adxl372_fifo_attributes[] = {
1010 &iio_const_attr_hwfifo_watermark_min.dev_attr.attr,1023 &iio_dev_attr_hwfifo_watermark_min.dev_attr.attr,
1011 &iio_const_attr_hwfifo_watermark_max.dev_attr.attr,1024 &iio_dev_attr_hwfifo_watermark_max.dev_attr.attr,
1012 &iio_dev_attr_hwfifo_watermark.dev_attr.attr,1025 &iio_dev_attr_hwfifo_watermark.dev_attr.attr,
1013 &iio_dev_attr_hwfifo_enabled.dev_attr.attr,1026 &iio_dev_attr_hwfifo_enabled.dev_attr.attr,
1014 NULL,1027 NULL,
drivers/iio/accel/bmc150-accel-core.c+18−5
@@ -925,17 +925,30 @@ static const struct iio_chan_spec_ext_info bmc150_accel_ext_info[] = { · 924 unmodified lines
925 { }925 { }
926};926};
927 927
928static IIO_CONST_ATTR(hwfifo_watermark_min, "1");928static ssize_t hwfifo_watermark_min_show(struct device *dev,
929static IIO_CONST_ATTR(hwfifo_watermark_max,929 struct device_attribute *attr,
930 __stringify(BMC150_ACCEL_FIFO_LENGTH));930 char *buf)
931{
932 return sysfs_emit(buf, "%s\n", "1");
933}
934
935static ssize_t hwfifo_watermark_max_show(struct device *dev,
936 struct device_attribute *attr,
937 char *buf)
938{
939 return sysfs_emit(buf, "%s\n", __stringify(BMC150_ACCEL_FIFO_LENGTH));
940}
941
942static IIO_DEVICE_ATTR_RO(hwfifo_watermark_min, 0);
943static IIO_DEVICE_ATTR_RO(hwfifo_watermark_max, 0);
931static IIO_DEVICE_ATTR(hwfifo_enabled, S_IRUGO,944static IIO_DEVICE_ATTR(hwfifo_enabled, S_IRUGO,
932 bmc150_accel_get_fifo_state, NULL, 0);945 bmc150_accel_get_fifo_state, NULL, 0);
933static IIO_DEVICE_ATTR(hwfifo_watermark, S_IRUGO,946static IIO_DEVICE_ATTR(hwfifo_watermark, S_IRUGO,
934 bmc150_accel_get_fifo_watermark, NULL, 0);947 bmc150_accel_get_fifo_watermark, NULL, 0);
935 948
936static const struct attribute *bmc150_accel_fifo_attributes[] = {949static const struct attribute *bmc150_accel_fifo_attributes[] = {
937 &iio_const_attr_hwfifo_watermark_min.dev_attr.attr,950 &iio_dev_attr_hwfifo_watermark_min.dev_attr.attr,
938 &iio_const_attr_hwfifo_watermark_max.dev_attr.attr,951 &iio_dev_attr_hwfifo_watermark_max.dev_attr.attr,
939 &iio_dev_attr_hwfifo_watermark.dev_attr.attr,952 &iio_dev_attr_hwfifo_watermark.dev_attr.attr,
940 &iio_dev_attr_hwfifo_enabled.dev_attr.attr,953 &iio_dev_attr_hwfifo_enabled.dev_attr.attr,
941 NULL,954 NULL,
drivers/iio/adc/at91-sama5d2_adc.c+18−5
@@ -2193,17 +2193,30 @@ static ssize_t at91_adc_get_watermark(struct device *dev, · 2192 unmodified lines
2193 return scnprintf(buf, PAGE_SIZE, "%d\n", st->dma_st.watermark);2193 return scnprintf(buf, PAGE_SIZE, "%d\n", st->dma_st.watermark);
2194}2194}
2195 2195
2196static ssize_t hwfifo_watermark_min_show(struct device *dev,
2197 struct device_attribute *attr,
2198 char *buf)
2199{
2200 return sysfs_emit(buf, "%s\n", "2");
2201}
2202
2203static ssize_t hwfifo_watermark_max_show(struct device *dev,
2204 struct device_attribute *attr,
2205 char *buf)
2206{
2207 return sysfs_emit(buf, "%s\n", AT91_HWFIFO_MAX_SIZE_STR);
2208}
2209
2196static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,2210static IIO_DEVICE_ATTR(hwfifo_enabled, 0444,
2197 at91_adc_get_fifo_state, NULL, 0);2211 at91_adc_get_fifo_state, NULL, 0);
2198static IIO_DEVICE_ATTR(hwfifo_watermark, 0444,2212static IIO_DEVICE_ATTR(hwfifo_watermark, 0444,
2199 at91_adc_get_watermark, NULL, 0);2213 at91_adc_get_watermark, NULL, 0);
2200 2214static IIO_DEVICE_ATTR_RO(hwfifo_watermark_min, 0);
2201static IIO_CONST_ATTR(hwfifo_watermark_min, "2");2215static IIO_DEVICE_ATTR_RO(hwfifo_watermark_max, 0);
2202static IIO_CONST_ATTR(hwfifo_watermark_max, AT91_HWFIFO_MAX_SIZE_STR);
2203 2216
2204static const struct attribute *at91_adc_fifo_attributes[] = {2217static const struct attribute *at91_adc_fifo_attributes[] = {
2205 &iio_const_attr_hwfifo_watermark_min.dev_attr.attr,2218 &iio_dev_attr_hwfifo_watermark_min.dev_attr.attr,
2206 &iio_const_attr_hwfifo_watermark_max.dev_attr.attr,2219 &iio_dev_attr_hwfifo_watermark_max.dev_attr.attr,
2207 &iio_dev_attr_hwfifo_watermark.dev_attr.attr,2220 &iio_dev_attr_hwfifo_watermark.dev_attr.attr,
2208 &iio_dev_attr_hwfifo_enabled.dev_attr.attr,2221 &iio_dev_attr_hwfifo_enabled.dev_attr.attr,
2209 NULL,2222 NULL,
drivers/iio/adc/mcp3911.c+7−6
@@ -55,8 +55,9 @@ · 54 unmodified lines
55/* Internal voltage reference in mV */55/* Internal voltage reference in mV */
56#define MCP3911_INT_VREF_MV 120056#define MCP3911_INT_VREF_MV 1200
57 57
58#define MCP3911_REG_READ(reg, id) ((((reg) << 1) | ((id) << 5) | (1 << 0)) & 0xff)58#define MCP3911_REG_READ(reg, id) ((((reg) << 1) | ((id) << 6) | (1 << 0)) & 0xff)
59#define MCP3911_REG_WRITE(reg, id) ((((reg) << 1) | ((id) << 5) | (0 << 0)) & 0xff)59#define MCP3911_REG_WRITE(reg, id) ((((reg) << 1) | ((id) << 6) | (0 << 0)) & 0xff)
60#define MCP3911_REG_MASK GENMASK(4, 1)
60 61
61#define MCP3911_NUM_CHANNELS 262#define MCP3911_NUM_CHANNELS 2
62 63
@@ -89,8 +90,8 @@ static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) · 26 unmodified lines
89 90
90 be32_to_cpus(val);91 be32_to_cpus(val);
91 *val >>= ((4 - len) * 8);92 *val >>= ((4 - len) * 8);
92 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%x\n", *val,93 dev_dbg(&adc->spi->dev, "reading 0x%x from register 0x%lx\n", *val,
93 reg >> 1);94 FIELD_GET(MCP3911_REG_MASK, reg));
94 return ret;95 return ret;
95}96}
96 97
@@ -248,7 +249,7 @@ static int mcp3911_write_raw(struct iio_dev *indio_dev, · 151 unmodified lines
248 break;249 break;
249 250
250 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:251 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
251 for (int i = 0; i < sizeof(mcp3911_osr_table); i++) {252 for (int i = 0; i < ARRAY_SIZE(mcp3911_osr_table); i++) {
252 if (val == mcp3911_osr_table[i]) {253 if (val == mcp3911_osr_table[i]) {
253 val = FIELD_PREP(MCP3911_CONFIG_OSR, i);254 val = FIELD_PREP(MCP3911_CONFIG_OSR, i);
254 ret = mcp3911_update(adc, MCP3911_REG_CONFIG, MCP3911_CONFIG_OSR,255 ret = mcp3911_update(adc, MCP3911_REG_CONFIG, MCP3911_CONFIG_OSR,
@@ -496,7 +497,7 @@ static int mcp3911_probe(struct spi_device *spi) · 241 unmodified lines
496 indio_dev->name,497 indio_dev->name,
497 iio_device_id(indio_dev));498 iio_device_id(indio_dev));
498 if (!adc->trig)499 if (!adc->trig)
499 return PTR_ERR(adc->trig);500 return -ENOMEM;
500 501
501 adc->trig->ops = &mcp3911_trigger_ops;502 adc->trig->ops = &mcp3911_trigger_ops;
502 iio_trigger_set_drvdata(adc->trig, adc);503 iio_trigger_set_drvdata(adc->trig, adc);
drivers/iio/adc/stm32-adc.c+6−5
@@ -2086,18 +2086,19 @@ static int stm32_adc_generic_chan_init(struct iio_dev *indio_dev, · 2085 unmodified lines
2086 stm32_adc_chan_init_one(indio_dev, &channels[scan_index], val,2086 stm32_adc_chan_init_one(indio_dev, &channels[scan_index], val,
2087 vin[1], scan_index, differential);2087 vin[1], scan_index, differential);
2088 2088
2089 val = 0;
2089 ret = fwnode_property_read_u32(child, "st,min-sample-time-ns", &val);2090 ret = fwnode_property_read_u32(child, "st,min-sample-time-ns", &val);
2090 /* st,min-sample-time-ns is optional */2091 /* st,min-sample-time-ns is optional */
2091 if (!ret) {2092 if (ret && ret != -EINVAL) {
2092 stm32_adc_smpr_init(adc, channels[scan_index].channel, val);
2093 if (differential)
2094 stm32_adc_smpr_init(adc, vin[1], val);
2095 } else if (ret != -EINVAL) {
2096 dev_err(&indio_dev->dev, "Invalid st,min-sample-time-ns property %d\n",2093 dev_err(&indio_dev->dev, "Invalid st,min-sample-time-ns property %d\n",
2097 ret);2094 ret);
2098 goto err;2095 goto err;
2099 }2096 }
2100 2097
2098 stm32_adc_smpr_init(adc, channels[scan_index].channel, val);
2099 if (differential)
2100 stm32_adc_smpr_init(adc, vin[1], val);
2101
2101 scan_index++;2102 scan_index++;
2102 }2103 }
2103 2104
drivers/iio/light/tsl2583.c+1−1
@@ -858,7 +858,7 @@ static int tsl2583_probe(struct i2c_client *clientp, · 857 unmodified lines
858 TSL2583_POWER_OFF_DELAY_MS);858 TSL2583_POWER_OFF_DELAY_MS);
859 pm_runtime_use_autosuspend(&clientp->dev);859 pm_runtime_use_autosuspend(&clientp->dev);
860 860
861 ret = devm_iio_device_register(indio_dev->dev.parent, indio_dev);861 ret = iio_device_register(indio_dev);
862 if (ret) {862 if (ret) {
863 dev_err(&clientp->dev, "%s: iio registration failed\n",863 dev_err(&clientp->dev, "%s: iio registration failed\n",
864 __func__);864 __func__);
drivers/iio/temperature/ltc2983.c+6−7
@@ -1385,13 +1385,6 @@ static int ltc2983_setup(struct ltc2983_data *st, bool assign_iio) · 1384 unmodified lines
1385 return ret;1385 return ret;
1386 }1386 }
1387 1387
1388 st->iio_chan = devm_kzalloc(&st->spi->dev,
1389 st->iio_channels * sizeof(*st->iio_chan),
1390 GFP_KERNEL);
1391
1392 if (!st->iio_chan)
1393 return -ENOMEM;
1394
1395 ret = regmap_update_bits(st->regmap, LTC2983_GLOBAL_CONFIG_REG,1388 ret = regmap_update_bits(st->regmap, LTC2983_GLOBAL_CONFIG_REG,
1396 LTC2983_NOTCH_FREQ_MASK,1389 LTC2983_NOTCH_FREQ_MASK,
1397 LTC2983_NOTCH_FREQ(st->filter_notch_freq));1390 LTC2983_NOTCH_FREQ(st->filter_notch_freq));
@@ -1514,6 +1507,12 @@ static int ltc2983_probe(struct spi_device *spi) · 116 unmodified lines
1514 gpiod_set_value_cansleep(gpio, 0);1507 gpiod_set_value_cansleep(gpio, 0);
1515 }1508 }
1516 1509
1510 st->iio_chan = devm_kzalloc(&spi->dev,
1511 st->iio_channels * sizeof(*st->iio_chan),
1512 GFP_KERNEL);
1513 if (!st->iio_chan)
1514 return -ENOMEM;
1515
1517 ret = ltc2983_setup(st, true);1516 ret = ltc2983_setup(st, true);
1518 if (ret)1517 if (ret)
1519 return ret;1518 return ret;
drivers/misc/sgi-gru/grumain.c+3−3
@@ -152,7 +152,7 @@ static int gru_assign_asid(struct gru_state *gru) · 151 unmodified lines
152 * Optionally, build an array of chars that contain the bit numbers allocated.152 * Optionally, build an array of chars that contain the bit numbers allocated.
153 */153 */
154static unsigned long reserve_resources(unsigned long *p, int n, int mmax,154static unsigned long reserve_resources(unsigned long *p, int n, int mmax,
155 char *idx)155 signed char *idx)
156{156{
157 unsigned long bits = 0;157 unsigned long bits = 0;
158 int i;158 int i;
@@ -170,14 +170,14 @@ static unsigned long reserve_resources(unsigned long *p, int n, int mmax, · 11 unmodified lines
170}170}
171 171
172unsigned long gru_reserve_cb_resources(struct gru_state *gru, int cbr_au_count,172unsigned long gru_reserve_cb_resources(struct gru_state *gru, int cbr_au_count,
173 char *cbmap)173 signed char *cbmap)
174{174{
175 return reserve_resources(&gru->gs_cbr_map, cbr_au_count, GRU_CBR_AU,175 return reserve_resources(&gru->gs_cbr_map, cbr_au_count, GRU_CBR_AU,
176 cbmap);176 cbmap);
177}177}
178 178
179unsigned long gru_reserve_ds_resources(struct gru_state *gru, int dsr_au_count,179unsigned long gru_reserve_ds_resources(struct gru_state *gru, int dsr_au_count,
180 char *dsmap)180 signed char *dsmap)
181{181{
182 return reserve_resources(&gru->gs_dsr_map, dsr_au_count, GRU_DSR_AU,182 return reserve_resources(&gru->gs_dsr_map, dsr_au_count, GRU_DSR_AU,
183 dsmap);183 dsmap);
drivers/misc/sgi-gru/grutables.h+7−7
@@ -351,7 +351,7 @@ struct gru_thread_state { · 350 unmodified lines
351 pid_t ts_tgid_owner; /* task that is using the351 pid_t ts_tgid_owner; /* task that is using the
352 context - for migration */352 context - for migration */
353 short ts_user_blade_id;/* user selected blade */353 short ts_user_blade_id;/* user selected blade */
354 char ts_user_chiplet_id;/* user selected chiplet */354 signed char ts_user_chiplet_id;/* user selected chiplet */
355 unsigned short ts_sizeavail; /* Pagesizes in use */355 unsigned short ts_sizeavail; /* Pagesizes in use */
356 int ts_tsid; /* thread that owns the356 int ts_tsid; /* thread that owns the
357 structure */357 structure */
@@ -364,11 +364,11 @@ struct gru_thread_state { · 6 unmodified lines
364 required for contest */364 required for contest */
365 unsigned char ts_cbr_au_count;/* Number of CBR resources365 unsigned char ts_cbr_au_count;/* Number of CBR resources
366 required for contest */366 required for contest */
367 char ts_cch_req_slice;/* CCH packet slice */367 signed char ts_cch_req_slice;/* CCH packet slice */
368 char ts_blade; /* If >= 0, migrate context if368 signed char ts_blade; /* If >= 0, migrate context if
369 ref from different blade */369 ref from different blade */
370 char ts_force_cch_reload;370 signed char ts_force_cch_reload;
371 char ts_cbr_idx[GRU_CBR_AU];/* CBR numbers of each371 signed char ts_cbr_idx[GRU_CBR_AU];/* CBR numbers of each
372 allocated CB */372 allocated CB */
373 int ts_data_valid; /* Indicates if ts_gdata has373 int ts_data_valid; /* Indicates if ts_gdata has
374 valid data */374 valid data */
@@ -643,9 +643,9 @@ extern struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma, · 268 unmodified lines
643 int cbr_au_count, int dsr_au_count,643 int cbr_au_count, int dsr_au_count,
644 unsigned char tlb_preload_count, int options, int tsid);644 unsigned char tlb_preload_count, int options, int tsid);
645extern unsigned long gru_reserve_cb_resources(struct gru_state *gru,645extern unsigned long gru_reserve_cb_resources(struct gru_state *gru,
646 int cbr_au_count, char *cbmap);646 int cbr_au_count, signed char *cbmap);
647extern unsigned long gru_reserve_ds_resources(struct gru_state *gru,647extern unsigned long gru_reserve_ds_resources(struct gru_state *gru,
648 int dsr_au_count, char *dsmap);648 int dsr_au_count, signed char *dsmap);
649extern vm_fault_t gru_fault(struct vm_fault *vmf);649extern vm_fault_t gru_fault(struct vm_fault *vmf);
650extern struct gru_mm_struct *gru_register_mmu_notifier(void);650extern struct gru_mm_struct *gru_register_mmu_notifier(void);
651extern void gru_drop_mmu_notifier(struct gru_mm_struct *gms);651extern void gru_drop_mmu_notifier(struct gru_mm_struct *gms);
include/linux/counter.h+2−3
@@ -542,11 +542,10 @@ struct counter_array { · 541 unmodified lines
542#define DEFINE_COUNTER_ARRAY_CAPTURE(_name, _length) \542#define DEFINE_COUNTER_ARRAY_CAPTURE(_name, _length) \
543 DEFINE_COUNTER_ARRAY_U64(_name, _length)543 DEFINE_COUNTER_ARRAY_U64(_name, _length)
544 544
545#define DEFINE_COUNTER_ARRAY_POLARITY(_name, _enums, _length) \545#define DEFINE_COUNTER_ARRAY_POLARITY(_name, _available, _length) \
546 DEFINE_COUNTER_AVAILABLE(_name##_available, _enums); \
547 struct counter_array _name = { \546 struct counter_array _name = { \
548 .type = COUNTER_COMP_SIGNAL_POLARITY, \547 .type = COUNTER_COMP_SIGNAL_POLARITY, \
549 .avail = &(_name##_available), \548 .avail = &(_available), \
550 .length = (_length), \549 .length = (_length), \
551 }550 }
552 551
tools/iio/iio_utils.c+4−0
@@ -547,6 +547,10 @@ static int calc_digits(int num) · 546 unmodified lines
547{547{
548 int count = 0;548 int count = 0;
549 549
550 /* It takes a digit to represent zero */
551 if (!num)
552 return 1;
553
550 while (num != 0) {554 while (num != 0) {
551 num /= 10;555 num /= 10;
552 count++;556 count++;