With everything separated and prepared, we implement a model of a GICv3 distributor and redistributors by using the existing framework to provide handler functions for each register group. Currently we limit the emulation to a model enforcing a single security state, with SRE==1 (forcing system register access) and ARE==1 (allowing more than 8 VCPUs). We share some of the functions provided for GICv2 emulation, but take the different ways of addressing (v)CPUs into account. Save and restore is currently not implemented. Similar to the split-off of the GICv2 specific code, the new emulation code goes into a new file (vgic-v3-emul.c).
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| @@ -952,6 +952,8 @@ enum kvm_device_type { · 951 unmodified lines | |||
| 952 | #define KVM_DEV_TYPE_ARM_VGIC_V2 KVM_DEV_TYPE_ARM_VGIC_V2 | 952 | #define KVM_DEV_TYPE_ARM_VGIC_V2 KVM_DEV_TYPE_ARM_VGIC_V2 |
| 953 | KVM_DEV_TYPE_FLIC, | 953 | KVM_DEV_TYPE_FLIC, |
| 954 | #define KVM_DEV_TYPE_FLIC KVM_DEV_TYPE_FLIC | 954 | #define KVM_DEV_TYPE_FLIC KVM_DEV_TYPE_FLIC |
| 955 | KVM_DEV_TYPE_ARM_VGIC_V3, | ||
| 956 | #define KVM_DEV_TYPE_ARM_VGIC_V3 KVM_DEV_TYPE_ARM_VGIC_V3 | ||
| 955 | KVM_DEV_TYPE_MAX, | 957 | KVM_DEV_TYPE_MAX, |
| 956 | }; | 958 | }; |
| 957 | 959 | ||