lael-labs/linux

.mailmap+5−0

 Felix Moeller <felix@derklecks.de>
 Filipe Lautert <filipe@icewall.org>
 Franck Bui-Huu <vagabon.xyz@gmail.com>
+Frank Rowand <frowand.list@gmail.com> <frowand@mvista.com>
+Frank Rowand <frowand.list@gmail.com> <frank.rowand@am.sony.com>
+Frank Rowand <frowand.list@gmail.com> <frank.rowand@sonymobile.com>
 Frank Zago <fzago@systemfabricworks.com>
 Greg Kroah-Hartman <greg@echidna.(none)>
 Greg Kroah-Hartman <gregkh@suse.de>
 Jeff Garzik <jgarzik@pretzel.yyz.us>
 Jens Axboe <axboe@suse.de>
 Jens Osterkamp <Jens.Osterkamp@de.ibm.com>
+John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
 John Stultz <johnstul@us.ibm.com>
 <josh@joshtriplett.org> <josh@freedesktop.org>
 <josh@joshtriplett.org> <josh@kernel.org>
 Kenneth W Chen <kenneth.w.chen@intel.com>
 Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
 Koushik <raghavendra.koushik@neterion.com>
+Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
 Leonid I Ananiev <leonid.i.ananiev@intel.com>
 Linas Vepstas <linas@austin.ibm.com>

Documentation/devicetree/bindings/arc/archs-pct.txt+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2		2
3	The ARC HS can be configured with a pipeline performance monitor for counting	3	The ARC HS can be configured with a pipeline performance monitor for counting
4	CPU and cache events like cache misses and hits. Like conventional PCT there	4	CPU and cache events like cache misses and hits. Like conventional PCT there
5	are 100+ hardware conditions dynamically mapped to upto 32 counters.	5	are 100+ hardware conditions dynamically mapped to up to 32 counters.
6	It also supports overflow interrupts.	6	It also supports overflow interrupts.
7		7
8	Required properties:	8	Required properties:

Documentation/devicetree/bindings/arc/pct.txt+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2		2
3	The ARC700 can be configured with a pipeline performance monitor for counting	3	The ARC700 can be configured with a pipeline performance monitor for counting
4	CPU and cache events like cache misses and hits. Like conventional PCT there	4	CPU and cache events like cache misses and hits. Like conventional PCT there
5	are 100+ hardware conditions dynamically mapped to upto 32 counters	5	are 100+ hardware conditions dynamically mapped to up to 32 counters
6		6
7	Note that:	7	Note that:
8	* The ARC 700 PCT does not support interrupts; although HW events may be	8	* The ARC 700 PCT does not support interrupts; although HW events may be

Documentation/devicetree/bindings/arm/cpus.txt+0−1

@@ -192,7 +192,6 @@ nodes to be present and contain the properties described below. · 191 unmodified lines
192	can be one of:	192	can be one of:
193	"allwinner,sun6i-a31"	193	"allwinner,sun6i-a31"
194	"allwinner,sun8i-a23"	194	"allwinner,sun8i-a23"
195	"arm,psci"
196	"arm,realview-smp"	195	"arm,realview-smp"
197	"brcm,bcm-nsp-smp"	196	"brcm,bcm-nsp-smp"
198	"brcm,brahma-b15"	197	"brcm,brahma-b15"

Documentation/devicetree/bindings/ata/ahci-platform.txt+4−0

 - target-supply     : regulator for SATA target power
 - phys              : reference to the SATA PHY node
 - phy-names         : must be "sata-phy"
+- ports-implemented : Mask that indicates which ports that the HBA supports
+		      are available for software to use. Useful if PORTS_IMPL
+		      is not programmed by the BIOS, which is true with
+		      some embedded SOC's.
 Required properties when using sub-nodes:
 - #address-cells    : number of cells to encode an address

Documentation/devicetree/bindings/i2c/i2c-rk3x.txt+2−2

@@ -6,8 +6,8 @@ RK3xxx SoCs. · 5 unmodified lines
6	Required properties :	6	Required properties :
7		7
8	- reg : Offset and length of the register set for the device	8	- reg : Offset and length of the register set for the device
9	- compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or	9	- compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c",
10	"rockchip,rk3288-i2c".	10	"rockchip,rk3228-i2c" or "rockchip,rk3288-i2c".
11	- interrupts : interrupt number	11	- interrupts : interrupt number
12	- clocks : parent clock	12	- clocks : parent clock
13		13

Documentation/devicetree/bindings/net/cpsw.txt+3−3

@@ -45,13 +45,13 @@ Required properties: · 44 unmodified lines
45	Optional properties:	45	Optional properties:
46	- dual_emac_res_vlan : Specifies VID to be used to segregate the ports	46	- dual_emac_res_vlan : Specifies VID to be used to segregate the ports
47	- mac-address : See ethernet.txt file in the same directory	47	- mac-address : See ethernet.txt file in the same directory
48	- phy_id : Specifies slave phy id	48	- phy_id : Specifies slave phy id (deprecated, use phy-handle)
49	- phy-handle : See ethernet.txt file in the same directory	49	- phy-handle : See ethernet.txt file in the same directory
50		50
51	Slave sub-nodes:	51	Slave sub-nodes:
52	- fixed-link : See fixed-link.txt file in the same directory	52	- fixed-link : See fixed-link.txt file in the same directory
53	Either the property phy_id, or the sub-node	53
54	fixed-link can be specified	54	Note: Exactly one of phy_id, phy-handle, or fixed-link must be specified.
55		55
56	Note: "ti,hwmods" field is used to fetch the base address and irq	56	Note: "ti,hwmods" field is used to fetch the base address and irq
57	resources from TI, omap hwmod data base during device registration.	57	resources from TI, omap hwmod data base during device registration.

Documentation/devicetree/bindings/sound/davinci-mcbsp.txt+51−0

@@ -0,0 +1,51 @@
	1	Texas Instruments DaVinci McBSP module
	2	~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
	3
	4	This binding describes the "Multi-channel Buffered Serial Port" (McBSP)
	5	audio interface found in some TI DaVinci processors like the OMAP-L138 or AM180x.
	6
	7
	8	Required properties:
	9	~~~~~~~~~~~~~~~~~~~~
	10	- compatible :
	11	"ti,da850-mcbsp" : for DA850, AM180x and OPAM-L138 platforms
	12
	13	- reg : physical base address and length of the controller memory mapped
	14	region(s).
	15	- reg-names : Should contain:
	16	* "mpu" for the main registers (required).
	17	* "dat" for the data FIFO (optional).
	18
	19	- dmas: three element list of DMA controller phandles, DMA request line and
	20	TC channel ordered triplets.
	21	- dma-names: identifier string for each DMA request line in the dmas property.
	22	These strings correspond 1:1 with the ordered pairs in dmas. The dma
	23	identifiers must be "rx" and "tx".
	24
	25	Optional properties:
	26	~~~~~~~~~~~~~~~~~~~~
	27	- interrupts : Interrupt numbers for McBSP
	28	- interrupt-names : Known interrupt names are "rx" and "tx"
	29
	30	- pinctrl-0: Should specify pin control group used for this controller.
	31	- pinctrl-names: Should contain only one value - "default", for more details
	32	please refer to pinctrl-bindings.txt
	33
	34	Example (AM1808):
	35	~~~~~~~~~~~~~~~~~
	36
	37	mcbsp0: mcbsp@1d10000 {
	38	compatible = "ti,da850-mcbsp";
	39	pinctrl-names = "default";
	40	pinctrl-0 = <&mcbsp0_pins>;
	41
	42	reg = <0x00110000 0x1000>,
	43	<0x00310000 0x1000>;
	44	reg-names = "mpu", "dat";
	45	interrupts = <97 98>;
	46	interrupts-names = "rx", "tx";
	47	dmas = <&edma0 3 1
	48	&edma0 2 1>;
	49	dma-names = "tx", "rx";
	50	status = "okay";
	51	};

Documentation/devicetree/bindings/sound/fsl-sai.txt+7−2

 Required properties:
-  - compatible		: Compatible list, contains "fsl,vf610-sai" or
+  - compatible		: Compatible list, contains "fsl,vf610-sai",
-			  "fsl,imx6sx-sai".
+			  "fsl,imx6sx-sai" or "fsl,imx6ul-sai"
   - reg			: Offset and length of the register set for the device.
 			  receive data by following their own bit clocks and
 			  frame sync clocks separately.
+Optional properties (for mx6ul):
+  - fsl,sai-mclk-direction-output: This is a boolean property. If present,
+			 indicates that SAI will output the SAI MCLK clock.
 Note:
 - If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
   default synchronous mode (sync Rx with Tx) will be used, which means both

Documentation/devicetree/bindings/sound/pcm5102a.txt+13−0

@@ -0,0 +1,13 @@
	1	PCM5102a audio CODECs
	2
	3	These devices does not use I2C or SPI.
	4
	5	Required properties:
	6
	7	- compatible : set as "ti,pcm5102a"
	8
	9	Examples:
	10
	11	pcm5102a: pcm5102a {
	12	compatible = "ti,pcm5102a";
	13	};

Documentation/networking/altera_tse.txt+3−3

Documentation/networking/ipvlan.txt+3−3

Documentation/networking/pktgen.txt+3−3

Documentation/networking/vrf.txt+1−1

@@ -41,7 +41,7 @@ using an rx_handler which gives the impression that packets flow through · 40 unmodified lines
41	the VRF device. Similarly on egress routing rules are used to send packets	41	the VRF device. Similarly on egress routing rules are used to send packets
42	to the VRF device driver before getting sent out the actual interface. This	42	to the VRF device driver before getting sent out the actual interface. This
43	allows tcpdump on a VRF device to capture all packets into and out of the	43	allows tcpdump on a VRF device to capture all packets into and out of the
44	VRF as a whole.[1] Similiarly, netfilter [2] and tc rules can be applied	44	VRF as a whole.[1] Similarly, netfilter [2] and tc rules can be applied
45	using the VRF device to specify rules that apply to the VRF domain as a whole.	45	using the VRF device to specify rules that apply to the VRF domain as a whole.
46		46
47	[1] Packets in the forwarded state do not flow through the device, so those	47	[1] Packets in the forwarded state do not flow through the device, so those

Documentation/networking/xfrm_sync.txt+3−3

Documentation/sysctl/vm.txt+10−9

@@ -581,15 +581,16 @@ Specify "[Nn]ode" for node order · 580 unmodified lines
581	"Zone Order" orders the zonelists by zone type, then by node within each	581	"Zone Order" orders the zonelists by zone type, then by node within each
582	zone. Specify "[Zz]one" for zone order.	582	zone. Specify "[Zz]one" for zone order.
583		583
584	Specify "[Dd]efault" to request automatic configuration. Autoconfiguration	584	Specify "[Dd]efault" to request automatic configuration.
585	will select "node" order in following case.	585
586	(1) if the DMA zone does not exist or	586	On 32-bit, the Normal zone needs to be preserved for allocations accessible
587	(2) if the DMA zone comprises greater than 50% of the available memory or	587	by the kernel, so "zone" order will be selected.
588	(3) if any node's DMA zone comprises greater than 70% of its local memory and	588
589	the amount of local memory is big enough.	589	On 64-bit, devices that require DMA32/DMA are relatively rare, so "node"
590		590	order will be selected.
591	Otherwise, "zone" order will be selected. Default order is recommended unless	591
592	this is causing problems for your system/application.	592	Default order is recommended unless this is causing problems for your
		593	system/application.
593		594
594	==============================================================	595	==============================================================
595		596

MAINTAINERS+44−33

 F:	include/linux/perf/arm_pmu.h
 ARM PORT
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-W:	http://www.arm.linux.org.uk/
+W:	http://www.armlinux.org.uk/
 S:	Maintained
 F:	arch/arm/
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc.git
 ARM PRIMECELL AACI PL041 DRIVER
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 S:	Maintained
 F:	sound/arm/aaci.*
 ARM PRIMECELL CLCD PL110 DRIVER
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 S:	Maintained
 F:	drivers/video/fbdev/amba-clcd.*
 ARM PRIMECELL KMI PL050 DRIVER
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 S:	Maintained
 F:	drivers/input/serio/ambakmi.*
 F:	include/linux/amba/kmi.h
 ARM PRIMECELL MMCI PL180/1 DRIVER
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 S:	Maintained
 F:	drivers/mmc/host/mmci.*
 F:	include/linux/amba/mmci.h
 ARM PRIMECELL UART PL010 AND PL011 DRIVERS
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 S:	Maintained
 F:	drivers/tty/serial/amba-pl01*.c
 F:	include/linux/amba/serial.h
 ARM PRIMECELL BUS SUPPORT
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 S:	Maintained
 F:	drivers/amba/
 F:	include/linux/amba/bus.h
 S:	Maintained
 ARM/CLKDEV SUPPORT
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
 S:	Maintained
 F:	arch/arm/include/asm/clkdev.h
 N:	digicolor
 ARM/EBSA110 MACHINE SUPPORT
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-W:	http://www.arm.linux.org.uk/
+W:	http://www.armlinux.org.uk/
 S:	Maintained
 F:	arch/arm/mach-ebsa110/
 F:	drivers/net/ethernet/amd/am79c961a.*
 F:	arch/arm/mm/*-fa*
 ARM/FOOTBRIDGE ARCHITECTURE
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-W:	http://www.arm.linux.org.uk/
+W:	http://www.armlinux.org.uk/
 S:	Maintained
 F:	arch/arm/include/asm/hardware/dec21285.h
 F:	arch/arm/mach-footbridge/
 ARM/PT DIGITAL BOARD PORT
 M:	Stefan Eletzhofer <stefan.eletzhofer@eletztrick.de>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-W:	http://www.arm.linux.org.uk/
+W:	http://www.armlinux.org.uk/
 S:	Maintained
 ARM/QUALCOMM SUPPORT
 F:	arch/arm64/boot/dts/renesas/
 ARM/RISCPC ARCHITECTURE
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-W:	http://www.arm.linux.org.uk/
+W:	http://www.armlinux.org.uk/
 S:	Maintained
 F:	arch/arm/include/asm/hardware/entry-macro-iomd.S
 F:	arch/arm/include/asm/hardware/ioc.h
 F:	drivers/clocksource/versatile.c
 ARM/VFP SUPPORT
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-W:	http://www.arm.linux.org.uk/
+W:	http://www.armlinux.org.uk/
 S:	Maintained
 F:	arch/arm/vfp/
 F:	include/linux/cleancache.h
 CLK API
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 L:	linux-clk@vger.kernel.org
 S:	Maintained
 F:	include/linux/clk.h
 F:	drivers/net/ethernet/stmicro/stmmac/
 CYBERPRO FB DRIVER
-M:	Russell King <linux@arm.linux.org.uk>
+M:	Russell King <linux@armlinux.org.uk>
 L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
-W:	http://www.arm.linux.org.uk/
+W:	http://www.armlinux.org.uk/
 S:	Maintained
 F:	drivers/video/fbdev/cyber2000fb.*
 DRM DRIVERS FOR VIVANTE GPU IP
 M:	Lucas Stach <l.stach@pengutronix.de>
-R:	Russell King <linux+etnaviv@arm.linux.org.uk>
+R:	Russell King <linux+etnaviv@armlinux.org.uk>
 R:	Christian Gmeiner <christian.gmeiner@gmail.com>
 L:	dri-devel@lists.freedesktop.org
 S:	Maintained
 F:	arch/ia64/kernel/efi.c
 F:	arch/x86/boot/compressed/eboot.[ch]
 F:	arch/x86/include/asm/efi.h
-F:	arch/x86/platform/efi/*
+F:	arch/x86/platform/efi/
-F:	drivers/firmware/efi/*
+F:	drivers/firmware/efi/
 F:	include/linux/efi*.h
 EFI VARIABLE FILESYSTEM
 M:	Timur Tabi <timur@tabi.org>
 M:	Nicolin Chen <nicoleotsuka@gmail.com>
 M:	Xiubo Li <Xiubo.Lee@gmail.com>
+R:	Fabio Estevam <fabio.estevam@nxp.com>
 L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
 L:	linuxppc-dev@lists.ozlabs.org
 S:	Maintained
 FUSE: FILESYSTEM IN USERSPACE
 M:	Miklos Szeredi <miklos@szeredi.hu>
-L:	fuse-devel@lists.sourceforge.net
+L:	linux-fsdevel@vger.kernel.org
 W:	http://fuse.sourceforge.net/
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse.git
 S:	Maintained
 F:	include/net/gre.h
 GRETH 10/100/1G Ethernet MAC device driver
-M:	Kristoffer Glembo <kristoffer@gaisler.com>
+M:	Andreas Larsson <andreas@gaisler.com>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	drivers/net/ethernet/aeroflex/
 ISCSI EXTENSIONS FOR RDMA (ISER) INITIATOR
 M:	Or Gerlitz <ogerlitz@mellanox.com>
-M:	Sagi Grimberg <sagig@mellanox.com>
+M:	Sagi Grimberg <sagi@grimberg.me>
 M:	Roi Dayan <roid@mellanox.com>
 L:	linux-rdma@vger.kernel.org
 S:	Supported
 F:	drivers/infiniband/ulp/iser/
 ISCSI EXTENSIONS FOR RDMA (ISER) TARGET
-M:	Sagi Grimberg <sagig@mellanox.com>
+M:	Sagi Grimberg <sagi@grimberg.me>
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending.git master
 L:	linux-rdma@vger.kernel.org
 L:	target-devel@vger.kernel.org
 F:	mm/kmemleak-test.c
 KPROBES
-M:	Ananth N Mavinakayanahalli <ananth@in.ibm.com>
+M:	Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
 M:	Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
 M:	"David S. Miller" <davem@davemloft.net>
 M:	Masami Hiramatsu <mhiramat@kernel.org>
 S:	Maintained
 MARVELL ARMADA DRM SUPPORT
-M:	Russell King <rmk+kernel@arm.linux.org.uk>
+M:	Russell King <rmk+kernel@armlinux.org.uk>
 S:	Maintained
 F:	drivers/gpu/drm/armada/
 F:	drivers/nfc/nxp-nci
 NXP TDA998X DRM DRIVER
-M:	Russell King <rmk+kernel@arm.linux.org.uk>
+M:	Russell King <rmk+kernel@armlinux.org.uk>
 S:	Supported
 F:	drivers/gpu/drm/i2c/tda998x_drv.c
 F:	include/drm/i2c/tda998x.h
 F:	drivers/cpufreq/omap-cpufreq.c
 OMAP POWERDOMAIN SOC ADAPTATION LAYER SUPPORT
-M:	Rajendra Nayak <rnayak@ti.com>
+M:	Rajendra Nayak <rnayak@codeaurora.org>
 M:	Paul Walmsley <paul@pwsan.com>
 L:	linux-omap@vger.kernel.org
 S:	Maintained
 SFC NETWORK DRIVER
 M:	Solarflare linux maintainers <linux-net-drivers@solarflare.com>
-M:	Shradha Shah <sshah@solarflare.com>
+M:	Edward Cree <ecree@solarflare.com>
+M:	Bert Kenward <bkenward@solarflare.com>
 L:	netdev@vger.kernel.org
 S:	Supported
 F:	drivers/net/ethernet/sfc/
 F:	drivers/clk/ti/
 F:	include/linux/clk/ti.h
+TI ETHERNET SWITCH DRIVER (CPSW)
+M:	Mugunthan V N <mugunthanvnm@ti.com>
+R:	Grygorii Strashko <grygorii.strashko@ti.com>
+L:	linux-omap@vger.kernel.org
+L:	netdev@vger.kernel.org
+S:	Maintained
+F:	drivers/net/ethernet/ti/cpsw*
+F:	drivers/net/ethernet/ti/davinci*
 TI FLASH MEDIA INTERFACE DRIVER
 M:	Alex Dubov <oakad@yahoo.com>
 S:	Maintained

Makefile+2−2

@@ -1,8 +1,8 @@
1	VERSION = 4	1	VERSION = 4
2	PATCHLEVEL = 6	2	PATCHLEVEL = 6
3	SUBLEVEL = 0	3	SUBLEVEL = 0
4	EXTRAVERSION = -rc5	4	EXTRAVERSION = -rc7
5	NAME = Blurry Fish Butt	5	NAME = Charred Weasel
6		6
7	# DOCUMENTATION	7	# DOCUMENTATION
8	# To see a list of typical targets execute "make help"	8	# To see a list of typical targets execute "make help"

arch/arc/Kconfig+15−0

 	select NO_BOOTMEM
 	select OF
 	select OF_EARLY_FLATTREE
+	select OF_RESERVED_MEM
 	select PERF_USE_VMALLOC
 	select HAVE_DEBUG_STACKOVERFLOW
+	select HAVE_GENERIC_DMA_COHERENT
 config MIGHT_HAVE_PCI
 	bool
 config RWSEM_GENERIC_SPINLOCK
 	def_bool y
+config ARCH_DISCONTIGMEM_ENABLE
+	def_bool y
 config ARCH_FLATMEM_ENABLE
 	def_bool y
 endchoice
+config NODES_SHIFT
+	int "Maximum NUMA Nodes (as a power of 2)"
+	default "1" if !DISCONTIGMEM
+	default "2" if DISCONTIGMEM
+	depends on NEED_MULTIPLE_NODES
+	---help---
+	  Accessing memory beyond 1GB (with or w/o PAE) requires 2 memory
+	  zones.
 if ISA_ARCOMPACT
 config ARC_COMPACT_IRQ_LEVELS
 config HIGHMEM
 	bool "High Memory Support"
+	select DISCONTIGMEM
 	help
 	  With ARC 2G:2G address split, only upper 2G is directly addressable by
 	  kernel. Enable this to potentially allow access to rest of 2G and PAE

arch/arc/include/asm/io.h+18−9

 #include <asm/byteorder.h>
 #include <asm/page.h>
+#ifdef CONFIG_ISA_ARCV2
+#include <asm/barrier.h>
+#define __iormb()		rmb()
+#define __iowmb()		wmb()
+#else
+#define __iormb()		do { } while (0)
+#define __iowmb()		do { } while (0)
+#endif
 extern void __iomem *ioremap(phys_addr_t paddr, unsigned long size);
 extern void __iomem *ioremap_prot(phys_addr_t paddr, unsigned long size,
 				  unsigned long flags);
 #define ioremap_wc(phy, sz)		ioremap(phy, sz)
 #define ioremap_wt(phy, sz)		ioremap(phy, sz)
+/*
+ * io{read,write}{16,32}be() macros
+ */
+#define ioread16be(p)		({ u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
+#define ioread32be(p)		({ u32 __v = be32_to_cpu((__force __be32)__raw_readl(p)); __iormb(); __v; })
+#define iowrite16be(v,p)	({ __iowmb(); __raw_writew((__force u16)cpu_to_be16(v), p); })
+#define iowrite32be(v,p)	({ __iowmb(); __raw_writel((__force u32)cpu_to_be32(v), p); })
 /* Change struct page to physical address */
 #define page_to_phys(page)		(page_to_pfn(page) << PAGE_SHIFT)
 }
-#ifdef CONFIG_ISA_ARCV2
-#include <asm/barrier.h>
-#define __iormb()		rmb()
-#define __iowmb()		wmb()
-#else
-#define __iormb()		do { } while (0)
-#define __iowmb()		do { } while (0)
-#endif
 /*
  * MMIO can also get buffered/optimized in micro-arch, so barriers needed
  * Based on ARM model for the typical use case

arch/arc/include/asm/irqflags-arcv2.h+35−1

@@ -18,6 +18,12 @@ · 17 unmodified lines
18	#define STATUS_AD_MASK (1<<STATUS_AD_BIT)	18	#define STATUS_AD_MASK (1<<STATUS_AD_BIT)
19	#define STATUS_IE_MASK (1<<STATUS_IE_BIT)	19	#define STATUS_IE_MASK (1<<STATUS_IE_BIT)
20		20
		21	/* status32 Bits as encoded/expected by CLRI/SETI */
		22	#define CLRI_STATUS_IE_BIT 4
		23
		24	#define CLRI_STATUS_E_MASK 0xF
		25	#define CLRI_STATUS_IE_MASK (1 << CLRI_STATUS_IE_BIT)
		26
21	#define AUX_USER_SP 0x00D	27	#define AUX_USER_SP 0x00D
22	#define AUX_IRQ_CTRL 0x00E	28	#define AUX_IRQ_CTRL 0x00E
23	#define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */	29	#define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */
@@ -100,6 +106,13 @@ static inline long arch_local_save_flags(void) · 76 unmodified lines
100	:	106	:
101	: "memory");	107	: "memory");
102		108
		109	/* To be compatible with irq_save()/irq_restore()
		110	* encode the irq bits as expected by CLRI/SETI
		111	* (this was needed to make CONFIG_TRACE_IRQFLAGS work)
		112	*/
		113	temp = (1 << 5) \|
		114	((!!(temp & STATUS_IE_MASK)) << CLRI_STATUS_IE_BIT) \|
		115	(temp & CLRI_STATUS_E_MASK);
103	return temp;	116	return temp;
104	}	117	}
105		118
@@ -108,7 +121,7 @@ static inline long arch_local_save_flags(void) · 2 unmodified lines
108	*/	121	*/
109	static inline int arch_irqs_disabled_flags(unsigned long flags)	122	static inline int arch_irqs_disabled_flags(unsigned long flags)
110	{	123	{
111	return !(flags & (STATUS_IE_MASK));	124	return !(flags & CLRI_STATUS_IE_MASK);
112	}	125	}
113		126
114	static inline int arch_irqs_disabled(void)	127	static inline int arch_irqs_disabled(void)
@@ -128,11 +141,32 @@ static inline void arc_softirq_clear(int irq) · 13 unmodified lines
128		141
129	#else	142	#else
130		143
		144	#ifdef CONFIG_TRACE_IRQFLAGS
		145
		146	.macro TRACE_ASM_IRQ_DISABLE
		147	bl trace_hardirqs_off
		148	.endm
		149
		150	.macro TRACE_ASM_IRQ_ENABLE
		151	bl trace_hardirqs_on
		152	.endm
		153
		154	#else
		155
		156	.macro TRACE_ASM_IRQ_DISABLE
		157	.endm
		158
		159	.macro TRACE_ASM_IRQ_ENABLE
		160	.endm
		161
		162	#endif
131	.macro IRQ_DISABLE scratch	163	.macro IRQ_DISABLE scratch
132	clri	164	clri
		165	TRACE_ASM_IRQ_DISABLE
133	.endm	166	.endm
134		167
135	.macro IRQ_ENABLE scratch	168	.macro IRQ_ENABLE scratch
		169	TRACE_ASM_IRQ_ENABLE
136	seti	170	seti
137	.endm	171	.endm
138		172

arch/arc/include/asm/mmzone.h+43−0

@@ -0,0 +1,43 @@
	1	/*
	2	* Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com)
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8
	9	#ifndef _ASM_ARC_MMZONE_H
	10	#define _ASM_ARC_MMZONE_H
	11
	12	#ifdef CONFIG_DISCONTIGMEM
	13
	14	extern struct pglist_data node_data[];
	15	#define NODE_DATA(nid) (&node_data[nid])
	16
	17	static inline int pfn_to_nid(unsigned long pfn)
	18	{
	19	int is_end_low = 1;
	20
	21	if (IS_ENABLED(CONFIG_ARC_HAS_PAE40))
	22	is_end_low = pfn <= virt_to_pfn(0xFFFFFFFFUL);
	23
	24	/*
	25	* node 0: lowmem: 0x8000_0000 to 0xFFFF_FFFF
	26	* node 1: HIGHMEM w/o PAE40: 0x0 to 0x7FFF_FFFF
	27	* HIGHMEM with PAE40: 0x1_0000_0000 to ...
	28	*/
	29	if (pfn >= ARCH_PFN_OFFSET && is_end_low)
	30	return 0;
	31
	32	return 1;
	33	}
	34
	35	static inline int pfn_valid(unsigned long pfn)
	36	{
	37	int nid = pfn_to_nid(pfn);
	38
	39	return (pfn <= node_end_pfn(nid));
	40	}
	41	#endif /* CONFIG_DISCONTIGMEM */
	42
	43	#endif

arch/arc/include/asm/page.h+11−4

 typedef pte_t * pgtable_t;
+/*
+ * Use virt_to_pfn with caution:
+ * If used in pte or paddr related macros, it could cause truncation
+ * in PAE40 builds
+ * As a rule of thumb, only use it in helpers starting with virt_
+ * You have been warned !
+ */
 #define virt_to_pfn(kaddr)	(__pa(kaddr) >> PAGE_SHIFT)
 #define ARCH_PFN_OFFSET		virt_to_pfn(CONFIG_LINUX_LINK_BASE)
+#ifdef CONFIG_FLATMEM
 #define pfn_valid(pfn)		(((pfn) - ARCH_PFN_OFFSET) < max_mapnr)
+#endif
 /*
  * __pa, __va, virt_to_page (ALERT: deprecated, don't use them)
  * virt here means link-address/program-address as embedded in object code.
  * And for ARC, link-addr = physical address
  */
-#define __pa(vaddr)  ((unsigned long)vaddr)
+#define __pa(vaddr)  ((unsigned long)(vaddr))
 #define __va(paddr)  ((void *)((unsigned long)(paddr)))
-#define virt_to_page(kaddr)	\
+#define virt_to_page(kaddr)	pfn_to_page(virt_to_pfn(kaddr))
-	(mem_map + virt_to_pfn((kaddr) - CONFIG_LINUX_LINK_BASE))
 #define virt_addr_valid(kaddr)  pfn_valid(virt_to_pfn(kaddr))
 /* Default Permissions for stack/heaps pages (Non Executable) */

arch/arc/include/asm/pgtable.h+6−7

@@ -278,14 +278,13 @@ static inline void pmd_set(pmd_t pmdp, pte_t ptep) · 277 unmodified lines
278	#define pmd_present(x) (pmd_val(x))	278	#define pmd_present(x) (pmd_val(x))
279	#define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0)	279	#define pmd_clear(xp) do { pmd_val(*(xp)) = 0; } while (0)
280		280
281	#define pte_page(pte) \	281	#define pte_page(pte) pfn_to_page(pte_pfn(pte))
282	(mem_map + virt_to_pfn(pte_val(pte) - CONFIG_LINUX_LINK_BASE))
283
284	#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)	282	#define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot)
285	#define pte_pfn(pte) virt_to_pfn(pte_val(pte))	283	#define pfn_pte(pfn, prot) (__pte(((pte_t)(pfn) << PAGE_SHIFT) \| pgprot_val(prot)))
286	#define pfn_pte(pfn, prot) (__pte(((pte_t)(pfn) << PAGE_SHIFT) \| \	284
287	pgprot_val(prot)))	285	/* Don't use virt_to_pfn for macros below: could cause truncations for PAE40*/
288	#define __pte_index(addr) (virt_to_pfn(addr) & (PTRS_PER_PTE - 1))	286	#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
		287	#define __pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
289		288
290	/*	289	/*
291	* pte_offset gets a @ptr to PMD entry (PGD in our 2-tier paging system)	290	* pte_offset gets a @ptr to PMD entry (PGD in our 2-tier paging system)

arch/arc/kernel/entry-arcv2.S+9−1

 	clri		; To make status32.IE agree with CPU internal state
-	lr  r0, [ICAUSE]
+#ifdef CONFIG_TRACE_IRQFLAGS
+	TRACE_ASM_IRQ_DISABLE
+#endif
+	lr  r0, [ICAUSE]
 	mov   blink, ret_from_exception
 	b.d  arch_do_IRQ
 .Lrestore_regs:
+	# Interrpts are actually disabled from this point on, but will get
+	# reenabled after we return from interrupt/exception.
+	# But irq tracer needs to be told now...
+	TRACE_ASM_IRQ_ENABLE
 	ld	r0, [sp, PT_status32]	; U/K mode at time of entry
 	lr	r10, [AUX_IRQ_ACT]

arch/arc/kernel/entry-compact.S+3−0

@@ -341,6 +341,9 @@ END(call_do_page_fault) · 340 unmodified lines
341		341
342	.Lrestore_regs:	342	.Lrestore_regs:
343		343
		344	# Interrpts are actually disabled from this point on, but will get
		345	# reenabled after we return from interrupt/exception.
		346	# But irq tracer needs to be told now...
344	TRACE_ASM_IRQ_ENABLE	347	TRACE_ASM_IRQ_ENABLE
345		348
346	lr r10, [status32]	349	lr r10, [status32]

arch/arc/mm/init.c+43−15

 #ifdef CONFIG_BLK_DEV_INITRD
 #include <linux/initrd.h>
 #endif
+#include <linux/of_fdt.h>
 #include <linux/swap.h>
 #include <linux/module.h>
 #include <linux/highmem.h>
 static unsigned long low_mem_sz;
 #ifdef CONFIG_HIGHMEM
-static unsigned long min_high_pfn;
+static unsigned long min_high_pfn, max_high_pfn;
 static u64 high_mem_start;
 static u64 high_mem_sz;
 #endif
+#ifdef CONFIG_DISCONTIGMEM
+struct pglist_data node_data[MAX_NUMNODES] __read_mostly;
+EXPORT_SYMBOL(node_data);
+#endif
 /* User can over-ride above with "mem=nnn[KkMm]" in cmdline */
 static int __init setup_mem_sz(char *str)
 {
 	/* Last usable page of low mem */
 	max_low_pfn = max_pfn = PFN_DOWN(low_mem_start + low_mem_sz);
-#ifdef CONFIG_HIGHMEM
+#ifdef CONFIG_FLATMEM
-	min_high_pfn = PFN_DOWN(high_mem_start);
+	/* pfn_valid() uses this */
-	max_pfn = PFN_DOWN(high_mem_start + high_mem_sz);
+	max_mapnr = max_low_pfn - min_low_pfn;
 #endif
-	max_mapnr = max_pfn - min_low_pfn;
 	/*------------- bootmem allocator setup -----------------------*/
 	/*
 	 * the crash
 	 */
-	memblock_add(low_mem_start, low_mem_sz);
+	memblock_add_node(low_mem_start, low_mem_sz, 0);
 	memblock_reserve(low_mem_start, __pa(_end) - low_mem_start);
 #ifdef CONFIG_BLK_DEV_INITRD
 		memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
 #endif
+	early_init_fdt_reserve_self();
+	early_init_fdt_scan_reserved_mem();
 	memblock_dump_all();
 	/*----------------- node/zones setup --------------------------*/
 	zones_size[ZONE_NORMAL] = max_low_pfn - min_low_pfn;
 	zones_holes[ZONE_NORMAL] = 0;
-#ifdef CONFIG_HIGHMEM
-	zones_size[ZONE_HIGHMEM] = max_pfn - max_low_pfn;
-	/* This handles the peripheral address space hole */
-	zones_holes[ZONE_HIGHMEM] = min_high_pfn - max_low_pfn;
-#endif
 	/*
 	 * We can't use the helper free_area_init(zones[]) because it uses
 	 * PAGE_OFFSET to compute the @min_low_pfn which would be wrong
 			    zones_holes);	/* holes */
 #ifdef CONFIG_HIGHMEM
+	/*
+	 * Populate a new node with highmem
+	 *
+	 * On ARC (w/o PAE) HIGHMEM addresses are actually smaller (0 based)
+	 * than addresses in normal ala low memory (0x8000_0000 based).
+	 * Even with PAE, the huge peripheral space hole would waste a lot of
+	 * mem with single mem_map[]. This warrants a mem_map per region design.
+	 * Thus HIGHMEM on ARC is imlemented with DISCONTIGMEM.
+	 *
+	 * DISCONTIGMEM in turns requires multiple nodes. node 0 above is
+	 * populated with normal memory zone while node 1 only has highmem
+	 */
+	node_set_online(1);
+	min_high_pfn = PFN_DOWN(high_mem_start);
+	max_high_pfn = PFN_DOWN(high_mem_start + high_mem_sz);
+	zones_size[ZONE_NORMAL] = 0;
+	zones_holes[ZONE_NORMAL] = 0;
+	zones_size[ZONE_HIGHMEM] = max_high_pfn - min_high_pfn;
+	zones_holes[ZONE_HIGHMEM] = 0;
+	free_area_init_node(1,			/* node-id */
+			    zones_size,		/* num pages per zone */
+			    min_high_pfn,	/* first pfn of node */
+			    zones_holes);	/* holes */
 	high_memory = (void *)(min_high_pfn << PAGE_SHIFT);
 	kmap_init();
 #endif
 	unsigned long tmp;
 	reset_all_zones_managed_pages();
-	for (tmp = min_high_pfn; tmp < max_pfn; tmp++)
+	for (tmp = min_high_pfn; tmp < max_high_pfn; tmp++)
 		free_highmem_page(pfn_to_page(tmp));
 #endif

arch/arm/boot/dts/am33xx.dtsi+1−1

@@ -860,7 +860,7 @@ · 859 unmodified lines
860	ti,no-idle-on-init;	860	ti,no-idle-on-init;
861	reg = <0x50000000 0x2000>;	861	reg = <0x50000000 0x2000>;
862	interrupts = <100>;	862	interrupts = <100>;
863	dmas = <&edma 52>;	863	dmas = <&edma 52 0>;
864	dma-names = "rxtx";	864	dma-names = "rxtx";
865	gpmc,num-cs = <7>;	865	gpmc,num-cs = <7>;
866	gpmc,num-waitpins = <2>;	866	gpmc,num-waitpins = <2>;

arch/arm/boot/dts/am4372.dtsi+1−1

@@ -884,7 +884,7 @@ · 883 unmodified lines
884	gpmc: gpmc@50000000 {	884	gpmc: gpmc@50000000 {
885	compatible = "ti,am3352-gpmc";	885	compatible = "ti,am3352-gpmc";
886	ti,hwmods = "gpmc";	886	ti,hwmods = "gpmc";
887	dmas = <&edma 52>;	887	dmas = <&edma 52 0>;
888	dma-names = "rxtx";	888	dma-names = "rxtx";
889	clocks = <&l3s_gclk>;	889	clocks = <&l3s_gclk>;
890	clock-names = "fck";	890	clock-names = "fck";

arch/arm/boot/dts/am57xx-beagle-x15.dts+0−17

 		#cooling-cells = <2>;
 	};
-	extcon_usb1: extcon_usb1 {
-		compatible = "linux,extcon-usb-gpio";
-		id-gpio = <&gpio7 25 GPIO_ACTIVE_HIGH>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&extcon_usb1_pins>;
-	};
 	hdmi0: connector {
 		compatible = "hdmi-connector";
 		label = "hdmi";
 		>;
 	};
-	extcon_usb1_pins: extcon_usb1_pins {
-		pinctrl-single,pins = <
-			DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_rtsn.gpio7_25 */
-		>;
-	};
 	tpd12s015_pins: pinmux_tpd12s015_pins {
 		pinctrl-single,pins = <
 			DRA7XX_CORE_IOPAD(0x37b0, PIN_OUTPUT | MUX_MODE14)		/* gpio7_10 CT_CP_HPD */
 	pinctrl-0 = <&usb1_pins>;
 };
-&omap_dwc3_1 {
-	extcon = <&extcon_usb1>;
-};
 &omap_dwc3_2 {
 	extcon = <&extcon_usb2>;
 };

arch/arm/boot/dts/dm814x-clocks.dtsi+212−31

@@ -4,6 +4,157 @@ · 3 unmodified lines
4	* published by the Free Software Foundation.	4	* published by the Free Software Foundation.
5	*/	5	*/
6		6
		7	&pllss {
		8	/*
		9	* See TRM "2.6.10 Connected outputso DPLLS" and
		10	* "2.6.11 Connected Outputs of DPLLJ". Only clkout is
		11	* connected except for hdmi and usb.
		12	*/
		13	adpll_mpu_ck: adpll@40 {
		14	#clock-cells = <1>;
		15	compatible = "ti,dm814-adpll-s-clock";
		16	reg = <0x40 0x40>;
		17	clocks = <&devosc_ck &devosc_ck &devosc_ck>;
		18	clock-names = "clkinp", "clkinpulow", "clkinphif";
		19	clock-output-names = "481c5040.adpll.dcoclkldo",
		20	"481c5040.adpll.clkout",
		21	"481c5040.adpll.clkoutx2",
		22	"481c5040.adpll.clkouthif";
		23	};
		24
		25	adpll_dsp_ck: adpll@80 {
		26	#clock-cells = <1>;
		27	compatible = "ti,dm814-adpll-lj-clock";
		28	reg = <0x80 0x30>;
		29	clocks = <&devosc_ck &devosc_ck>;
		30	clock-names = "clkinp", "clkinpulow";
		31	clock-output-names = "481c5080.adpll.dcoclkldo",
		32	"481c5080.adpll.clkout",
		33	"481c5080.adpll.clkoutldo";
		34	};
		35
		36	adpll_sgx_ck: adpll@b0 {
		37	#clock-cells = <1>;
		38	compatible = "ti,dm814-adpll-lj-clock";
		39	reg = <0xb0 0x30>;
		40	clocks = <&devosc_ck &devosc_ck>;
		41	clock-names = "clkinp", "clkinpulow";
		42	clock-output-names = "481c50b0.adpll.dcoclkldo",
		43	"481c50b0.adpll.clkout",
		44	"481c50b0.adpll.clkoutldo";
		45	};
		46
		47	adpll_hdvic_ck: adpll@e0 {
		48	#clock-cells = <1>;
		49	compatible = "ti,dm814-adpll-lj-clock";
		50	reg = <0xe0 0x30>;
		51	clocks = <&devosc_ck &devosc_ck>;
		52	clock-names = "clkinp", "clkinpulow";
		53	clock-output-names = "481c50e0.adpll.dcoclkldo",
		54	"481c50e0.adpll.clkout",
		55	"481c50e0.adpll.clkoutldo";
		56	};
		57
		58	adpll_l3_ck: adpll@110 {
		59	#clock-cells = <1>;
		60	compatible = "ti,dm814-adpll-lj-clock";
		61	reg = <0x110 0x30>;
		62	clocks = <&devosc_ck &devosc_ck>;
		63	clock-names = "clkinp", "clkinpulow";
		64	clock-output-names = "481c5110.adpll.dcoclkldo",
		65	"481c5110.adpll.clkout",
		66	"481c5110.adpll.clkoutldo";
		67	};
		68
		69	adpll_isp_ck: adpll@140 {
		70	#clock-cells = <1>;
		71	compatible = "ti,dm814-adpll-lj-clock";
		72	reg = <0x140 0x30>;
		73	clocks = <&devosc_ck &devosc_ck>;
		74	clock-names = "clkinp", "clkinpulow";
		75	clock-output-names = "481c5140.adpll.dcoclkldo",
		76	"481c5140.adpll.clkout",
		77	"481c5140.adpll.clkoutldo";
		78	};
		79
		80	adpll_dss_ck: adpll@170 {
		81	#clock-cells = <1>;
		82	compatible = "ti,dm814-adpll-lj-clock";
		83	reg = <0x170 0x30>;
		84	clocks = <&devosc_ck &devosc_ck>;
		85	clock-names = "clkinp", "clkinpulow";
		86	clock-output-names = "481c5170.adpll.dcoclkldo",
		87	"481c5170.adpll.clkout",
		88	"481c5170.adpll.clkoutldo";
		89	};
		90
		91	adpll_video0_ck: adpll@1a0 {
		92	#clock-cells = <1>;
		93	compatible = "ti,dm814-adpll-lj-clock";
		94	reg = <0x1a0 0x30>;
		95	clocks = <&devosc_ck &devosc_ck>;
		96	clock-names = "clkinp", "clkinpulow";
		97	clock-output-names = "481c51a0.adpll.dcoclkldo",
		98	"481c51a0.adpll.clkout",
		99	"481c51a0.adpll.clkoutldo";
		100	};
		101
		102	adpll_video1_ck: adpll@1d0 {
		103	#clock-cells = <1>;
		104	compatible = "ti,dm814-adpll-lj-clock";
		105	reg = <0x1d0 0x30>;
		106	clocks = <&devosc_ck &devosc_ck>;
		107	clock-names = "clkinp", "clkinpulow";
		108	clock-output-names = "481c51d0.adpll.dcoclkldo",
		109	"481c51d0.adpll.clkout",
		110	"481c51d0.adpll.clkoutldo";
		111	};
		112
		113	adpll_hdmi_ck: adpll@200 {
		114	#clock-cells = <1>;
		115	compatible = "ti,dm814-adpll-lj-clock";
		116	reg = <0x200 0x30>;
		117	clocks = <&devosc_ck &devosc_ck>;
		118	clock-names = "clkinp", "clkinpulow";
		119	clock-output-names = "481c5200.adpll.dcoclkldo",
		120	"481c5200.adpll.clkout",
		121	"481c5200.adpll.clkoutldo";
		122	};
		123
		124	adpll_audio_ck: adpll@230 {
		125	#clock-cells = <1>;
		126	compatible = "ti,dm814-adpll-lj-clock";
		127	reg = <0x230 0x30>;
		128	clocks = <&devosc_ck &devosc_ck>;
		129	clock-names = "clkinp", "clkinpulow";
		130	clock-output-names = "481c5230.adpll.dcoclkldo",
		131	"481c5230.adpll.clkout",
		132	"481c5230.adpll.clkoutldo";
		133	};
		134
		135	adpll_usb_ck: adpll@260 {
		136	#clock-cells = <1>;
		137	compatible = "ti,dm814-adpll-lj-clock";
		138	reg = <0x260 0x30>;
		139	clocks = <&devosc_ck &devosc_ck>;
		140	clock-names = "clkinp", "clkinpulow";
		141	clock-output-names = "481c5260.adpll.dcoclkldo",
		142	"481c5260.adpll.clkout",
		143	"481c5260.adpll.clkoutldo";
		144	};
		145
		146	adpll_ddr_ck: adpll@290 {
		147	#clock-cells = <1>;
		148	compatible = "ti,dm814-adpll-lj-clock";
		149	reg = <0x290 0x30>;
		150	clocks = <&devosc_ck &devosc_ck>;
		151	clock-names = "clkinp", "clkinpulow";
		152	clock-output-names = "481c5290.adpll.dcoclkldo",
		153	"481c5290.adpll.clkout",
		154	"481c5290.adpll.clkoutldo";
		155	};
		156	};
		157
7	&pllss_clocks {	158	&pllss_clocks {
8	timer1_fck: timer1_fck {	159	timer1_fck: timer1_fck {
9	#clock-cells = <0>;	160	#clock-cells = <0>;
@@ -23,6 +174,24 @@ · 13 unmodified lines
23	reg = <0x2e0>;	174	reg = <0x2e0>;
24	};	175	};
25		176
		177	/* CPTS_RFT_CLK in RMII_REFCLK_SRC, usually sourced from auiod */
		178	cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
		179	#clock-cells = <0>;
		180	compatible = "ti,mux-clock";
		181	clocks = <&adpll_video0_ck 1
		182	&adpll_video1_ck 1
		183	&adpll_audio_ck 1>;
		184	ti,bit-shift = <1>;
		185	reg = <0x2e8>;
		186	};
		187
		188	/* REVISIT: Set up with a proper mux using RMII_REFCLK_SRC */
		189	cpsw_125mhz_gclk: cpsw_125mhz_gclk {
		190	#clock-cells = <0>;
		191	compatible = "fixed-clock";
		192	clock-frequency = <125000000>;
		193	};
		194
26	sysclk18_ck: sysclk18_ck {	195	sysclk18_ck: sysclk18_ck {
27	#clock-cells = <0>;	196	#clock-cells = <0>;
28	compatible = "ti,mux-clock";	197	compatible = "ti,mux-clock";
@@ -79,37 +248,6 @@ · 50 unmodified lines
79	compatible = "fixed-clock";	248	compatible = "fixed-clock";
80	clock-frequency = <1000000000>;	249	clock-frequency = <1000000000>;
81	};	250	};
82
83	sysclk4_ck: sysclk4_ck {
84	#clock-cells = <0>;
85	compatible = "fixed-clock";
86	clock-frequency = <222000000>;
87	};
88
89	sysclk6_ck: sysclk6_ck {
90	#clock-cells = <0>;
91	compatible = "fixed-clock";
92	clock-frequency = <100000000>;
93	};
94
95	sysclk10_ck: sysclk10_ck {
96	#clock-cells = <0>;
97	compatible = "fixed-clock";
98	clock-frequency = <48000000>;
99	};
100
101	cpsw_125mhz_gclk: cpsw_125mhz_gclk {
102	#clock-cells = <0>;
103	compatible = "fixed-clock";
104	clock-frequency = <125000000>;
105	};
106
107	cpsw_cpts_rft_clk: cpsw_cpts_rft_clk {
108	#clock-cells = <0>;
109	compatible = "fixed-clock";
110	clock-frequency = <250000000>;
111	};
112
113	};	251	};
114		252
115	&prcm_clocks {	253	&prcm_clocks {
@@ -138,6 +276,49 @@ · 22 unmodified lines
138	clock-div = <78125>;	276	clock-div = <78125>;
139	};	277	};
140		278
		279	/* L4_HS 220 MHz*/
		280	sysclk4_ck: sysclk4_ck {
		281	#clock-cells = <0>;
		282	compatible = "ti,fixed-factor-clock";
		283	clocks = <&adpll_l3_ck 1>;
		284	ti,clock-mult = <1>;
		285	ti,clock-div = <1>;
		286	};
		287
		288	/* L4_FWCFG */
		289	sysclk5_ck: sysclk5_ck {
		290	#clock-cells = <0>;
		291	compatible = "ti,fixed-factor-clock";
		292	clocks = <&adpll_l3_ck 1>;
		293	ti,clock-mult = <1>;
		294	ti,clock-div = <2>;
		295	};
		296
		297	/* L4_LS 110 MHz */
		298	sysclk6_ck: sysclk6_ck {
		299	#clock-cells = <0>;
		300	compatible = "ti,fixed-factor-clock";
		301	clocks = <&adpll_l3_ck 1>;
		302	ti,clock-mult = <1>;
		303	ti,clock-div = <2>;
		304	};
		305
		306	sysclk8_ck: sysclk8_ck {
		307	#clock-cells = <0>;
		308	compatible = "ti,fixed-factor-clock";
		309	clocks = <&adpll_usb_ck 1>;
		310	ti,clock-mult = <1>;
		311	ti,clock-div = <1>;
		312	};
		313
		314	sysclk10_ck: sysclk10_ck {
		315	compatible = "ti,divider-clock";
		316	reg = <0x324>;
		317	ti,max-div = <7>;
		318	#clock-cells = <0>;
		319	clocks = <&adpll_usb_ck 1>;
		320	};
		321
141	aud_clkin0_ck: aud_clkin0_ck {	322	aud_clkin0_ck: aud_clkin0_ck {
142	#clock-cells = <0>;	323	#clock-cells = <0>;
143	compatible = "fixed-clock";	324	compatible = "fixed-clock";

arch/arm/boot/dts/dra62x-clocks.dtsi+26−0

@@ -6,6 +6,32 @@ · 5 unmodified lines
6		6
7	#include "dm814x-clocks.dtsi"	7	#include "dm814x-clocks.dtsi"
8		8
		9	/* Compared to dm814x, dra62x does not have hdic, l3 or dss PLLs */
		10	&adpll_hdvic_ck {
		11	status = "disabled";
		12	};
		13
		14	&adpll_l3_ck {
		15	status = "disabled";
		16	};
		17
		18	&adpll_dss_ck {
		19	status = "disabled";
		20	};
		21
		22	/* Compared to dm814x, dra62x has interconnect clocks on isp PLL */
		23	&sysclk4_ck {
		24	clocks = <&adpll_isp_ck 1>;
		25	};
		26
		27	&sysclk5_ck {
		28	clocks = <&adpll_isp_ck 1>;
		29	};
		30
		31	&sysclk6_ck {
		32	clocks = <&adpll_isp_ck 1>;
		33	};
		34
9	/*	35	/*
10	* Compared to dm814x, dra62x has different shifts and more mux options.	36	* Compared to dm814x, dra62x has different shifts and more mux options.
11	* Please add the extra options for ysclk_14 and 16 if really needed.	37	* Please add the extra options for ysclk_14 and 16 if really needed.

arch/arm/boot/dts/dra7xx-clocks.dtsi+17−1

 		clock-frequency = <32768>;
 	};
-	sys_32k_ck: sys_32k_ck {
+	sys_clk32_crystal_ck: sys_clk32_crystal_ck {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 		clock-frequency = <32768>;
 	};
+	sys_clk32_pseudo_ck: sys_clk32_pseudo_ck {
+		#clock-cells = <0>;
+		compatible = "fixed-factor-clock";
+		clocks = <&sys_clkin1>;
+		clock-mult = <1>;
+		clock-div = <610>;
+	};
 	virt_12000000_ck: virt_12000000_ck {
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 		ti,bit-shift = <22>;
 		reg = <0x0558>;
 	};
+	sys_32k_ck: sys_32k_ck {
+		#clock-cells = <0>;
+		compatible = "ti,mux-clock";
+		clocks = <&sys_clk32_crystal_ck>, <&sys_clk32_pseudo_ck>, <&sys_clk32_pseudo_ck>, <&sys_clk32_pseudo_ck>;
+		ti,bit-shift = <8>;
+		reg = <0x6c4>;
+	};
 };

arch/arm/boot/dts/omap3-n900.dts+9−0

 	regulator-name = "V28";
 	regulator-min-microvolt = <2800000>;
 	regulator-max-microvolt = <2800000>;
+	regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 	regulator-always-on; /* due to battery cover sensor */
 };
 	regulator-name = "VCSI";
 	regulator-min-microvolt = <1800000>;
 	regulator-max-microvolt = <1800000>;
+	regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 };
 &vaux3 {
 	regulator-name = "VMMC2_30";
 	regulator-min-microvolt = <2800000>;
 	regulator-max-microvolt = <3000000>;
+	regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 };
 &vaux4 {
 	regulator-name = "VCAM_ANA_28";
 	regulator-min-microvolt = <2800000>;
 	regulator-max-microvolt = <2800000>;
+	regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 };
 &vmmc1 {
 	regulator-name = "VMMC1";
 	regulator-min-microvolt = <1850000>;
 	regulator-max-microvolt = <3150000>;
+	regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 };
 &vmmc2 {
 	regulator-name = "V28_A";
 	regulator-min-microvolt = <2800000>;
 	regulator-max-microvolt = <3000000>;
+	regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 	regulator-always-on; /* due VIO leak to AIC34 VDDs */
 };
 	regulator-name = "VPLL";
 	regulator-min-microvolt = <1800000>;
 	regulator-max-microvolt = <1800000>;
+	regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 	regulator-always-on;
 };
 	regulator-name = "VSDI_CSI";
 	regulator-min-microvolt = <1800000>;
 	regulator-max-microvolt = <1800000>;
+	regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 	regulator-always-on;
 };
 	regulator-name = "VMMC2_IO_18";
 	regulator-min-microvolt = <1800000>;
 	regulator-max-microvolt = <1800000>;
+	regulator-initial-mode = <0x0e>; /* RES_STATE_ACTIVE */
 };
 &vio {

arch/arm/boot/dts/omap34xx.dtsi+1−1

@@ -46,7 +46,7 @@ · 45 unmodified lines
46	0x480bd800 0x017c>;	46	0x480bd800 0x017c>;
47	interrupts = <24>;	47	interrupts = <24>;
48	iommus = <&mmu_isp>;	48	iommus = <&mmu_isp>;
49	syscon = <&scm_conf 0xdc>;	49	syscon = <&scm_conf 0x6c>;
50	ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;	50	ti,phy-type = <OMAP3ISP_PHY_TYPE_COMPLEX_IO>;
51	#clock-cells = <1>;	51	#clock-cells = <1>;
52	ports {	52	ports {

arch/arm/boot/dts/omap5-board-common.dtsi+2−2

@@ -472,7 +472,7 @@ · 471 unmodified lines
472	ldo1_reg: ldo1 {	472	ldo1_reg: ldo1 {
473	/* VDDAPHY_CAM: vdda_csiport */	473	/* VDDAPHY_CAM: vdda_csiport */
474	regulator-name = "ldo1";	474	regulator-name = "ldo1";
475	regulator-min-microvolt = <1500000>;	475	regulator-min-microvolt = <1800000>;
476	regulator-max-microvolt = <1800000>;	476	regulator-max-microvolt = <1800000>;
477	};	477	};
478		478
@@ -498,7 +498,7 @@ · 19 unmodified lines
498	ldo4_reg: ldo4 {	498	ldo4_reg: ldo4 {
499	/* VDDAPHY_DISP: vdda_dsiport/hdmi */	499	/* VDDAPHY_DISP: vdda_dsiport/hdmi */
500	regulator-name = "ldo4";	500	regulator-name = "ldo4";
501	regulator-min-microvolt = <1500000>;	501	regulator-min-microvolt = <1800000>;
502	regulator-max-microvolt = <1800000>;	502	regulator-max-microvolt = <1800000>;
503	};	503	};
504		504

arch/arm/boot/dts/omap5-cm-t54.dts+2−2

@@ -513,7 +513,7 @@ · 512 unmodified lines
513	ldo1_reg: ldo1 {	513	ldo1_reg: ldo1 {
514	/* VDDAPHY_CAM: vdda_csiport */	514	/* VDDAPHY_CAM: vdda_csiport */
515	regulator-name = "ldo1";	515	regulator-name = "ldo1";
516	regulator-min-microvolt = <1500000>;	516	regulator-min-microvolt = <1800000>;
517	regulator-max-microvolt = <1800000>;	517	regulator-max-microvolt = <1800000>;
518	};	518	};
519		519
@@ -537,7 +537,7 @@ · 17 unmodified lines
537	ldo4_reg: ldo4 {	537	ldo4_reg: ldo4 {
538	/* VDDAPHY_DISP: vdda_dsiport/hdmi */	538	/* VDDAPHY_DISP: vdda_dsiport/hdmi */
539	regulator-name = "ldo4";	539	regulator-name = "ldo4";
540	regulator-min-microvolt = <1500000>;	540	regulator-min-microvolt = <1800000>;
541	regulator-max-microvolt = <1800000>;	541	regulator-max-microvolt = <1800000>;
542	};	542	};
543		543

arch/arm/boot/dts/omap5.dtsi+1−1

@@ -269,7 +269,7 @@ · 268 unmodified lines
269	omap5_pmx_wkup: pinmux@c840 {	269	omap5_pmx_wkup: pinmux@c840 {
270	compatible = "ti,omap5-padconf",	270	compatible = "ti,omap5-padconf",
271	"pinctrl-single";	271	"pinctrl-single";
272	reg = <0xc840 0x0038>;	272	reg = <0xc840 0x003c>;
273	#address-cells = <1>;	273	#address-cells = <1>;
274	#size-cells = <0>;	274	#size-cells = <0>;
275	#interrupt-cells = <1>;	275	#interrupt-cells = <1>;

arch/arm/boot/dts/qcom-apq8064.dtsi+2−1

 		};
 		sata0: sata@29000000 {
-			compatible		= "generic-ahci";
+			compatible		= "qcom,apq8064-ahci", "generic-ahci";
 			status			= "disabled";
 			reg			= <0x29000000 0x180>;
 			interrupts		= <GIC_SPI 209 IRQ_TYPE_NONE>;
 			phys			= <&sata_phy0>;
 			phy-names		= "sata-phy";
+			ports-implemented	= <0x1>;
 		};
 		/* Temporary fixed regulator */

arch/arm/boot/dts/qcom-msm8974.dtsi+1−13

 /dts-v1/;
-#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
 #include "skeleton.dtsi"
 			clock-names = "core", "iface";
 			#address-cells = <1>;
 			#size-cells = <0>;
-			dmas = <&blsp2_dma 20>, <&blsp2_dma 21>;
-			dma-names = "tx", "rx";
 		};
 		spmi_bus: spmi@fc4cf000 {
 			interrupt-controller;
 			#interrupt-cells = <4>;
 		};
-		blsp2_dma: dma-controller@f9944000 {
-			compatible = "qcom,bam-v1.4.0";
-			reg = <0xf9944000 0x19000>;
-			interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&gcc GCC_BLSP2_AHB_CLK>;
-			clock-names = "bam_clk";
-			#dma-cells = <1>;
-			qcom,ee = <0>;
-		};
 	};
 	smd {

arch/arm/boot/dts/r8a7791-koelsch.dts+1−0

@@ -661,6 +661,7 @@ · 660 unmodified lines
661	};	661	};
662		662
663	&pcie_bus_clk {	663	&pcie_bus_clk {
		664	clock-frequency = <100000000>;
664	status = "okay";	665	status = "okay";
665	};	666	};
666		667

arch/arm/boot/dts/r8a7791-porter.dts+1−13

 };
 &pfc {
-	pinctrl-0 = <&scif_clk_pins>;
-	pinctrl-names = "default";
 	scif0_pins: serial0 {
 		renesas,groups = "scif0_data_d";
 		renesas,function = "scif0";
 	};
-	scif_clk_pins: scif_clk {
-		renesas,groups = "scif_clk";
-		renesas,function = "scif_clk";
-	};
 	ether_pins: ether {
 		renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
 		renesas,function = "eth";
 	status = "okay";
 };
-&scif_clk {
-	clock-frequency = <14745600>;
-	status = "okay";
-};
 &ether {
 	pinctrl-0 = <&ether_pins &phy1_pins>;
 	pinctrl-names = "default";
 };
 &pcie_bus_clk {
+	clock-frequency = <100000000>;
 	status = "okay";
 };

arch/arm/boot/dts/r8a7791.dtsi+1−4

 		pcie_bus_clk: pcie_bus_clk {
 			compatible = "fixed-clock";
 			#clock-cells = <0>;
-			clock-frequency = <100000000>;
+			clock-frequency = <0>;
 			clock-output-names = "pcie_bus";
-			status = "disabled";
 		};
 		/* External SCIF clock */
 			#clock-cells = <0>;
 			/* This value must be overridden by the board. */
 			clock-frequency = <0>;
-			status = "disabled";
 		};
 		/* External USB clock - can be overridden by the board */
 			/* This value must be overridden by the board. */
 			clock-frequency = <0>;
 			clock-output-names = "can_clk";
-			status = "disabled";
 		};
 		/* Special CPG clocks */

arch/arm/boot/dts/sun8i-q8-common.dtsi+0−2

@@ -125,8 +125,6 @@ · 124 unmodified lines
125	};	125	};
126		126
127	&reg_dc1sw {	127	&reg_dc1sw {
128	regulator-min-microvolt = <3000000>;
129	regulator-max-microvolt = <3000000>;
130	regulator-name = "vcc-lcd";	128	regulator-name = "vcc-lcd";
131	};	129	};
132		130

arch/arm/include/asm/domain.h+11−0

 #ifndef __ASSEMBLY__
+#ifdef CONFIG_CPU_CP15_MMU
 static inline unsigned int get_domain(void)
 {
 	unsigned int domain;
 	  : : "r" (val) : "memory");
 	isb();
 }
+#else
+static inline unsigned int get_domain(void)
+{
+	return 0;
+}
+static inline void set_domain(unsigned val)
+{
+}
+#endif
 #ifdef CONFIG_CPU_USE_DOMAINS
 #define modify_domain(dom,type)					\

arch/arm/kernel/head-nommu.S+1−1

@@ -236,7 +236,7 @@ ENTRY(__setup_mpu) · 235 unmodified lines
236	mov r0, #CONFIG_VECTORS_BASE @ Cover from VECTORS_BASE	236	mov r0, #CONFIG_VECTORS_BASE @ Cover from VECTORS_BASE
237	ldr r5,=(MPU_AP_PL1RW_PL0NA \| MPU_RGN_NORMAL)	237	ldr r5,=(MPU_AP_PL1RW_PL0NA \| MPU_RGN_NORMAL)
238	/* Writing N to bits 5:1 (RSR_SZ) --> region size 2^N+1 */	238	/* Writing N to bits 5:1 (RSR_SZ) --> region size 2^N+1 */
239	mov r6, #(((PAGE_SHIFT - 1) << MPU_RSR_SZ) \| 1 << MPU_RSR_EN)	239	mov r6, #(((2 * PAGE_SHIFT - 1) << MPU_RSR_SZ) \| 1 << MPU_RSR_EN)
240		240
241	setup_region r0, r5, r6, MPU_DATA_SIDE @ VECTORS_BASE, PL0 NA, enabled	241	setup_region r0, r5, r6, MPU_DATA_SIDE @ VECTORS_BASE, PL0 NA, enabled
242	beq 3f @ Memory-map not unified	242	beq 3f @ Memory-map not unified

arch/arm/kvm/mmu.c+1−1

@@ -1004,7 +1004,7 @@ static bool transparent_hugepage_adjust(kvm_pfn_t pfnp, phys_addr_t ipap) · 1003 unmodified lines
1004	kvm_pfn_t pfn = *pfnp;	1004	kvm_pfn_t pfn = *pfnp;
1005	gfn_t gfn = *ipap >> PAGE_SHIFT;	1005	gfn_t gfn = *ipap >> PAGE_SHIFT;
1006		1006
1007	if (PageTransCompound(pfn_to_page(pfn))) {	1007	if (PageTransCompoundMap(pfn_to_page(pfn))) {
1008	unsigned long mask;	1008	unsigned long mask;
1009	/*	1009	/*
1010	* The address we faulted on is backed by a transparent huge	1010	* The address we faulted on is backed by a transparent huge

arch/arm/mach-davinci/board-mityomapl138.c+5−0

 	const char *partnum = NULL;
 	struct davinci_soc_info *soc_info = &davinci_soc_info;
+	if (!IS_BUILTIN(CONFIG_NVMEM)) {
+		pr_warn("Factory Config not available without CONFIG_NVMEM\n");
+		goto bad_config;
+	}
 	ret = nvmem_device_read(nvmem, 0, sizeof(factory_config),
 				&factory_config);
 	if (ret != sizeof(struct factory_config)) {

arch/arm/mach-davinci/common.c+5−0

 	char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
 	off_t offset = (off_t)context;
+	if (!IS_BUILTIN(CONFIG_NVMEM)) {
+		pr_warn("Cannot read MAC addr from EEPROM without CONFIG_NVMEM\n");
+		return;
+	}
 	/* Read MAC addr from EEPROM */
 	if (nvmem_device_read(nvmem, offset, ETH_ALEN, mac_addr) == ETH_ALEN)
 		pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr);

arch/arm/mach-exynos/pm_domains.c+1−1

@@ -92,7 +92,7 @@ static int exynos_pd_power(struct generic_pm_domain *domain, bool power_on) · 91 unmodified lines
92	if (IS_ERR(pd->clk[i]))	92	if (IS_ERR(pd->clk[i]))
93	break;	93	break;
94		94
95	if (IS_ERR(pd->clk[i]))	95	if (IS_ERR(pd->pclk[i]))
96	continue; /* Skip on first power up */	96	continue; /* Skip on first power up */
97	if (clk_set_parent(pd->clk[i], pd->pclk[i]))	97	if (clk_set_parent(pd->clk[i], pd->pclk[i]))
98	pr_err("%s: error setting parent to clock%d\n",	98	pr_err("%s: error setting parent to clock%d\n",

arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c+3−2

@@ -71,6 +71,7 @@ struct platform_device *__init imx_add_sdhci_esdhc_imx( · 70 unmodified lines
71	if (!pdata)	71	if (!pdata)
72	pdata = &default_esdhc_pdata;	72	pdata = &default_esdhc_pdata;
73		73
74	return imx_add_platform_device(data->devid, data->id, res,	74	return imx_add_platform_device_dmamask(data->devid, data->id, res,
75	ARRAY_SIZE(res), pdata, sizeof(*pdata));	75	ARRAY_SIZE(res), pdata, sizeof(*pdata),
		76	DMA_BIT_MASK(32));
76	}	77	}

arch/arm/mach-omap2/clockdomains7xx_data.c+1−1

@@ -461,7 +461,7 @@ static struct clockdomain ipu_7xx_clkdm = { · 460 unmodified lines
461	.cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,	461	.cm_inst = DRA7XX_CM_CORE_AON_IPU_INST,
462	.clkdm_offs = DRA7XX_CM_CORE_AON_IPU_IPU_CDOFFS,	462	.clkdm_offs = DRA7XX_CM_CORE_AON_IPU_IPU_CDOFFS,
463	.dep_bit = DRA7XX_IPU_STATDEP_SHIFT,	463	.dep_bit = DRA7XX_IPU_STATDEP_SHIFT,
464	.flags = CLKDM_CAN_HWSUP_SWSUP,	464	.flags = CLKDM_CAN_SWSUP,
465	};	465	};
466		466
467	static struct clockdomain mpu1_7xx_clkdm = {	467	static struct clockdomain mpu1_7xx_clkdm = {

arch/arm/mach-omap2/io.c+2−1

 #ifdef CONFIG_SOC_DRA7XX
 void __init dra7xx_init_early(void)
 {
-	omap2_set_globals_tap(-1, OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
+	omap2_set_globals_tap(DRA7XX_CLASS,
+			      OMAP2_L4_IO_ADDRESS(DRA7XX_TAP_BASE));
 	omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
 	omap2_control_base_init();
 	omap4_pm_init_early();

arch/arm/mach-omap2/omap-wakeupgen.c+7−0

  */
 static void irq_save_context(void)
 {
+	/* DRA7 has no SAR to save */
+	if (soc_is_dra7xx())
+		return;
 	if (!sar_base)
 		sar_base = omap4_get_sar_ram_base();
 {
 	u32 val;
 	u32 offset = SAR_BACKUP_STATUS_OFFSET;
+	/* DRA7 has no SAR to save */
+	if (soc_is_dra7xx())
+		return;
 	if (soc_is_omap54xx())
 		offset = OMAP5_SAR_BACKUP_STATUS_OFFSET;

arch/arm/mach-omap2/pm34xx.c+13−10

 	int per_next_state = PWRDM_POWER_ON;
 	int core_next_state = PWRDM_POWER_ON;
 	int per_going_off;
-	int core_prev_state;
 	u32 sdrc_pwr = 0;
 	mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
 		sdrc_write_reg(sdrc_pwr, SDRC_POWER);
 	/* CORE */
-	if (core_next_state < PWRDM_POWER_ON) {
+	if (core_next_state < PWRDM_POWER_ON &&
-		core_prev_state = pwrdm_read_prev_pwrst(core_pwrdm);
+	    pwrdm_read_prev_pwrst(core_pwrdm) == PWRDM_POWER_OFF) {
-		if (core_prev_state == PWRDM_POWER_OFF) {
+		omap3_core_restore_context();
-			omap3_core_restore_context();
+		omap3_cm_restore_context();
-			omap3_cm_restore_context();
+		omap3_sram_restore_context();
-			omap3_sram_restore_context();
+		omap2_sms_restore_context();
-			omap2_sms_restore_context();
+	} else {
-		}
+		/*
+		 * In off-mode resume path above, omap3_core_restore_context
+		 * also handles the INTC autoidle restore done here so limit
+		 * this to non-off mode resume paths so we don't do it twice.
+		 */
+		omap3_intc_resume_idle();
 	}
-	omap3_intc_resume_idle();
 	pwrdm_post_transition(NULL);

arch/arm/mach-shmobile/timer.c+11−17

 void __init shmobile_init_delay(void)
 {
 	struct device_node *np, *cpus;
-	bool is_a7_a8_a9 = false;
+	unsigned int div = 0;
-	bool is_a15 = false;
 	bool has_arch_timer = false;
 	u32 max_freq = 0;
 		if (!of_property_read_u32(np, "clock-frequency", &freq))
 			max_freq = max(max_freq, freq);
-		if (of_device_is_compatible(np, "arm,cortex-a8") ||
+		if (of_device_is_compatible(np, "arm,cortex-a8")) {
-		    of_device_is_compatible(np, "arm,cortex-a9")) {
+			div = 2;
-			is_a7_a8_a9 = true;
+		} else if (of_device_is_compatible(np, "arm,cortex-a9")) {
-		} else if (of_device_is_compatible(np, "arm,cortex-a7")) {
+			div = 1;
-			is_a7_a8_a9 = true;
+		} else if (of_device_is_compatible(np, "arm,cortex-a7") ||
-			has_arch_timer = true;
+			 of_device_is_compatible(np, "arm,cortex-a15")) {
-		} else if (of_device_is_compatible(np, "arm,cortex-a15")) {
+			div = 1;
-			is_a15 = true;
 			has_arch_timer = true;
 		}
 	}
 	of_node_put(cpus);
-	if (!max_freq)
+	if (!max_freq || !div)
 		return;
-	if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
+	if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER))
-		if (is_a7_a8_a9)
+		shmobile_setup_delay_hz(max_freq, 1, div);
-			shmobile_setup_delay_hz(max_freq, 1, 3);
-		else if (is_a15)
-			shmobile_setup_delay_hz(max_freq, 2, 4);
-	}
 }

arch/arm/mach-socfpga/headsmp.S+1−0

@@ -13,6 +13,7 @@ · 12 unmodified lines
13	#include <asm/assembler.h>	13	#include <asm/assembler.h>
14		14
15	.arch armv7-a	15	.arch armv7-a
		16	.arm
16		17
17	ENTRY(secondary_trampoline)	18	ENTRY(secondary_trampoline)
18	/* CPU1 will always fetch from 0x0 when it is brought out of reset.	19	/* CPU1 will always fetch from 0x0 when it is brought out of reset.

arch/arm/mm/nommu.c+8−7

 /* MPU initialisation functions */
 void __init sanity_check_meminfo_mpu(void)
 {
-	int i;
 	phys_addr_t phys_offset = PHYS_OFFSET;
 	phys_addr_t aligned_region_size, specified_mem_size, rounded_mem_size;
 	struct memblock_region *reg;
 		} else {
 			/*
 			 * memblock auto merges contiguous blocks, remove
-			 * all blocks afterwards
+			 * all blocks afterwards in one go (we can't remove
+			 * blocks separately while iterating)
 			 */
 			pr_notice("Ignoring RAM after %pa, memory at %pa ignored\n",
-				  &mem_start, &reg->base);
+				  &mem_end, &reg->base);
-			memblock_remove(reg->base, reg->size);
+			memblock_remove(reg->base, 0 - reg->base);
+			break;
 		}
 	}
 		pr_warn("Truncating memory from %pa to %pa (MPU region constraints)",
 				&specified_mem_size, &aligned_region_size);
 		memblock_remove(mem_start + aligned_region_size,
-				specified_mem_size - aligned_round_size);
+				specified_mem_size - aligned_region_size);
 		mem_end = mem_start + aligned_region_size;
 	}
 		return;
 	region_err = mpu_setup_region(MPU_RAM_REGION, PHYS_OFFSET,
-					ilog2(meminfo.bank[0].size),
+					ilog2(memblock.memory.regions[0].size),
 					MPU_AP_PL1RW_PL0RW | MPU_RGN_NORMAL);
 	if (region_err) {
 		panic("MPU region initialization failure! %d", region_err);
 	 * some architectures which the DRAM is the exception vector to trap,
 	 * alloc_page breaks with error, although it is not NULL, but "0."
 	 */
-	memblock_reserve(CONFIG_VECTORS_BASE, PAGE_SIZE);
+	memblock_reserve(CONFIG_VECTORS_BASE, 2 * PAGE_SIZE);
 #else /* ifndef CONFIG_CPU_V7M */
 	/*
 	 * There is no dedicated vector page on V7-M. So nothing needs to be

arch/arm64/boot/dts/renesas/r8a7795.dtsi+0−1

@@ -120,7 +120,6 @@ · 119 unmodified lines
120	compatible = "fixed-clock";	120	compatible = "fixed-clock";
121	#clock-cells = <0>;	121	#clock-cells = <0>;
122	clock-frequency = <0>;	122	clock-frequency = <0>;
123	status = "disabled";
124	};	123	};
125		124
126	soc {	125	soc {

arch/arm64/boot/dts/socionext/uniphier-ph1-ld20-ref.dts+0−1

@@ -70,7 +70,6 @@ · 69 unmodified lines
70	i2c3 = &i2c3;	70	i2c3 = &i2c3;
71	i2c4 = &i2c4;	71	i2c4 = &i2c4;
72	i2c5 = &i2c5;	72	i2c5 = &i2c5;
73	i2c6 = &i2c6;
74	};	73	};
75	};	74	};
76		75

arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi+5−15

 		i2c2: i2c@58782000 {
 			compatible = "socionext,uniphier-fi2c";
-			status = "disabled";
 			reg = <0x58782000 0x80>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupts = <0 43 4>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_i2c2>;
 			clocks = <&i2c_clk>;
-			clock-frequency = <100000>;
+			clock-frequency = <400000>;
 		};
 		i2c3: i2c@58783000 {
 		i2c4: i2c@58784000 {
 			compatible = "socionext,uniphier-fi2c";
+			status = "disabled";
 			reg = <0x58784000 0x80>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			interrupts = <0 45 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_i2c4>;
 			clocks = <&i2c_clk>;
-			clock-frequency = <400000>;
+			clock-frequency = <100000>;
 		};
 		i2c5: i2c@58785000 {
 			clock-frequency = <400000>;
 		};
-		i2c6: i2c@58786000 {
-			compatible = "socionext,uniphier-fi2c";
-			reg = <0x58786000 0x80>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			interrupts = <0 26 4>;
-			clocks = <&i2c_clk>;
-			clock-frequency = <400000>;
-		};
 		system_bus: system-bus@58c00000 {
 			compatible = "socionext,uniphier-system-bus";
 			status = "disabled";

arch/nios2/lib/memset.c+1−1

@@ -68,7 +68,7 @@ void memset(void s, int c, size_t count) · 67 unmodified lines
68	"=r" (charcnt), /* %1 Output */	68	"=r" (charcnt), /* %1 Output */
69	"=r" (dwordcnt), /* %2 Output */	69	"=r" (dwordcnt), /* %2 Output */
70	"=r" (fill8reg), /* %3 Output */	70	"=r" (fill8reg), /* %3 Output */
71	"=r" (wrkrega) /* %4 Output */	71	"=&r" (wrkrega) /* %4 Output only */
72	: "r" (c), /* %5 Input */	72	: "r" (c), /* %5 Input */
73	"0" (s), /* %0 Input/Output */	73	"0" (s), /* %0 Input/Output */
74	"1" (count) /* %1 Input/Output */	74	"1" (count) /* %1 Input/Output */

arch/parisc/kernel/syscall.S+1−1

@@ -344,7 +344,7 @@ tracesys_next: · 343 unmodified lines
344	#endif	344	#endif
345		345
346	cmpib,COND(=),n -1,%r20,tracesys_exit /* seccomp may have returned -1 */	346	cmpib,COND(=),n -1,%r20,tracesys_exit /* seccomp may have returned -1 */
347	comiclr,>>= __NR_Linux_syscalls, %r20, %r0	347	comiclr,>> __NR_Linux_syscalls, %r20, %r0
348	b,n .Ltracesys_nosys	348	b,n .Ltracesys_nosys
349		349
350	LDREGX %r20(%r19), %r19	350	LDREGX %r20(%r19), %r19

arch/powerpc/include/asm/systbl.h+2−0

@@ -384,3 +384,5 @@ SYSCALL(ni_syscall) · 383 unmodified lines
384	SYSCALL(ni_syscall)	384	SYSCALL(ni_syscall)
385	SYSCALL(mlock2)	385	SYSCALL(mlock2)
386	SYSCALL(copy_file_range)	386	SYSCALL(copy_file_range)
		387	COMPAT_SYS_SPU(preadv2)
		388	COMPAT_SYS_SPU(pwritev2)

arch/powerpc/include/asm/unistd.h+1−1

@@ -12,7 +12,7 @@ · 11 unmodified lines
12	#include <uapi/asm/unistd.h>	12	#include <uapi/asm/unistd.h>
13		13
14		14
15	#define NR_syscalls 380	15	#define NR_syscalls 382
16		16
17	#define __NR__exit __NR_exit	17	#define __NR__exit __NR_exit
18		18

arch/powerpc/include/asm/word-at-a-time.h+1−1

@@ -82,7 +82,7 @@ static inline unsigned long create_zero_mask(unsigned long bits) · 81 unmodified lines
82	"andc %1,%1,%2\n\t"	82	"andc %1,%1,%2\n\t"
83	"popcntd %0,%1"	83	"popcntd %0,%1"
84	: "=r" (leading_zero_bits), "=&r" (trailing_zero_bit_mask)	84	: "=r" (leading_zero_bits), "=&r" (trailing_zero_bit_mask)
85	: "r" (bits));	85	: "b" (bits));
86		86
87	return leading_zero_bits;	87	return leading_zero_bits;
88	}	88	}

arch/powerpc/include/uapi/asm/unistd.h+2−0

@@ -390,5 +390,7 @@ · 389 unmodified lines
390	#define __NR_membarrier 365	390	#define __NR_membarrier 365
391	#define __NR_mlock2 378	391	#define __NR_mlock2 378
392	#define __NR_copy_file_range 379	392	#define __NR_copy_file_range 379
		393	#define __NR_preadv2 380
		394	#define __NR_pwritev2 381
393		395
394	#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */	396	#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */

arch/s390/include/asm/mmu.h+1−1

@@ -11,7 +11,7 @@ typedef struct { · 10 unmodified lines
11	spinlock_t list_lock;	11	spinlock_t list_lock;
12	struct list_head pgtable_list;	12	struct list_head pgtable_list;
13	struct list_head gmap_list;	13	struct list_head gmap_list;
14	unsigned long asce_bits;	14	unsigned long asce;
15	unsigned long asce_limit;	15	unsigned long asce_limit;
16	unsigned long vdso_base;	16	unsigned long vdso_base;
17	/* The mmu context allocates 4K page tables. */	17	/* The mmu context allocates 4K page tables. */

arch/s390/include/asm/mmu_context.h+22−6

 	mm->context.has_pgste = 0;
 	mm->context.use_skey = 0;
 #endif
-	if (mm->context.asce_limit == 0) {
+	switch (mm->context.asce_limit) {
+	case 1UL << 42:
+		/*
+		 * forked 3-level task, fall through to set new asce with new
+		 * mm->pgd
+		 */
+	case 0:
 		/* context created by exec, set asce limit to 4TB */
-		mm->context.asce_bits = _ASCE_TABLE_LENGTH |
-			_ASCE_USER_BITS | _ASCE_TYPE_REGION3;
 		mm->context.asce_limit = STACK_TOP_MAX;
-	} else if (mm->context.asce_limit == (1UL << 31)) {
+		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
+				   _ASCE_USER_BITS | _ASCE_TYPE_REGION3;
+		break;
+	case 1UL << 53:
+		/* forked 4-level task, set new asce with new mm->pgd */
+		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
+				   _ASCE_USER_BITS | _ASCE_TYPE_REGION2;
+		break;
+	case 1UL << 31:
+		/* forked 2-level compat task, set new asce with new mm->pgd */
+		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
+				   _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
+		/* pgd_alloc() did not increase mm->nr_pmds */
 		mm_inc_nr_pmds(mm);
 	}
 	crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
 static inline void set_user_asce(struct mm_struct *mm)
 {
-	S390_lowcore.user_asce = mm->context.asce_bits | __pa(mm->pgd);
+	S390_lowcore.user_asce = mm->context.asce;
 	if (current->thread.mm_segment.ar4)
 		__ctl_load(S390_lowcore.user_asce, 7, 7);
 	set_cpu_flag(CIF_ASCE);
 {
 	int cpu = smp_processor_id();
-	S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
+	S390_lowcore.user_asce = next->context.asce;
 	if (prev == next)
 		return;
 	if (MACHINE_HAS_TLB_LC)

arch/s390/include/asm/pgalloc.h+2−2

@@ -52,8 +52,8 @@ static inline unsigned long pgd_entry_type(struct mm_struct *mm) · 51 unmodified lines
52	return _REGION2_ENTRY_EMPTY;	52	return _REGION2_ENTRY_EMPTY;
53	}	53	}
54		54
55	int crst_table_upgrade(struct mm_struct *, unsigned long limit);	55	int crst_table_upgrade(struct mm_struct *);
56	void crst_table_downgrade(struct mm_struct *, unsigned long limit);	56	void crst_table_downgrade(struct mm_struct *);
57		57
58	static inline pud_t pud_alloc_one(struct mm_struct mm, unsigned long address)	58	static inline pud_t pud_alloc_one(struct mm_struct mm, unsigned long address)
59	{	59	{

arch/s390/include/asm/processor.h+1−1

@@ -175,7 +175,7 @@ extern __vector128 init_task_fpu_regs[__NUM_VXRS]; · 174 unmodified lines
175	regs->psw.mask = PSW_USER_BITS \| PSW_MASK_BA; \	175	regs->psw.mask = PSW_USER_BITS \| PSW_MASK_BA; \
176	regs->psw.addr = new_psw; \	176	regs->psw.addr = new_psw; \
177	regs->gprs[15] = new_stackp; \	177	regs->gprs[15] = new_stackp; \
178	crst_table_downgrade(current->mm, 1UL << 31); \	178	crst_table_downgrade(current->mm); \
179	execve_tail(); \	179	execve_tail(); \
180	} while (0)	180	} while (0)
181		181

arch/s390/include/asm/tlbflush.h+3−6

 static inline void __tlb_flush_kernel(void)
 {
 	if (MACHINE_HAS_IDTE)
-		__tlb_flush_idte((unsigned long) init_mm.pgd |
+		__tlb_flush_idte(init_mm.context.asce);
-				 init_mm.context.asce_bits);
 	else
 		__tlb_flush_global();
 }
 static inline void __tlb_flush_kernel(void)
 {
 	if (MACHINE_HAS_TLB_LC)
-		__tlb_flush_idte_local((unsigned long) init_mm.pgd |
+		__tlb_flush_idte_local(init_mm.context.asce);
-				       init_mm.context.asce_bits);
 	else
 		__tlb_flush_local();
 }
 	 * only ran on the local cpu.
 	 */
 	if (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))
-		__tlb_flush_asce(mm, (unsigned long) mm->pgd |
+		__tlb_flush_asce(mm, mm->context.asce);
-				 mm->context.asce_bits);
 	else
 		__tlb_flush_full(mm);
 }

arch/s390/mm/init.c+2−1

 		asce_bits = _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
 		pgd_type = _REGION3_ENTRY_EMPTY;
 	}
-	S390_lowcore.kernel_asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
+	init_mm.context.asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
+	S390_lowcore.kernel_asce = init_mm.context.asce;
 	clear_table((unsigned long *) init_mm.pgd, pgd_type,
 		    sizeof(unsigned long)*2048);
 	vmem_map_init();

arch/s390/mm/mmap.c+3−3

@@ -174,7 +174,7 @@ int s390_mmap_check(unsigned long addr, unsigned long len, unsigned long flags) · 173 unmodified lines
174	if (!(flags & MAP_FIXED))	174	if (!(flags & MAP_FIXED))
175	addr = 0;	175	addr = 0;
176	if ((addr + len) >= TASK_SIZE)	176	if ((addr + len) >= TASK_SIZE)
177	return crst_table_upgrade(current->mm, TASK_MAX_SIZE);	177	return crst_table_upgrade(current->mm);
178	return 0;	178	return 0;
179	}	179	}
180		180
@@ -191,7 +191,7 @@ s390_get_unmapped_area(struct file *filp, unsigned long addr, · 10 unmodified lines
191	return area;	191	return area;
192	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {	192	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {
193	/* Upgrade the page table to 4 levels and retry. */	193	/* Upgrade the page table to 4 levels and retry. */
194	rc = crst_table_upgrade(mm, TASK_MAX_SIZE);	194	rc = crst_table_upgrade(mm);
195	if (rc)	195	if (rc)
196	return (unsigned long) rc;	196	return (unsigned long) rc;
197	area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);	197	area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
@@ -213,7 +213,7 @@ s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr, · 15 unmodified lines
213	return area;	213	return area;
214	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {	214	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {
215	/* Upgrade the page table to 4 levels and retry. */	215	/* Upgrade the page table to 4 levels and retry. */
216	rc = crst_table_upgrade(mm, TASK_MAX_SIZE);	216	rc = crst_table_upgrade(mm);
217	if (rc)	217	if (rc)
218	return (unsigned long) rc;	218	return (unsigned long) rc;
219	area = arch_get_unmapped_area_topdown(filp, addr, len,	219	area = arch_get_unmapped_area_topdown(filp, addr, len,

arch/s390/mm/pgalloc.c+28−57

@@ -76,81 +76,52 @@ static void __crst_table_upgrade(void *arg) · 75 unmodified lines
76	__tlb_flush_local();	76	__tlb_flush_local();
77	}	77	}
78		78
79	int crst_table_upgrade(struct mm_struct *mm, unsigned long limit)	79	int crst_table_upgrade(struct mm_struct *mm)
80	{	80	{
81	unsigned long table, pgd;	81	unsigned long table, pgd;
82	unsigned long entry;
83	int flush;
84		82
85	BUG_ON(limit > TASK_MAX_SIZE);	83	/* upgrade should only happen from 3 to 4 levels */
86	flush = 0;	84	BUG_ON(mm->context.asce_limit != (1UL << 42));
87	repeat:	85
88	table = crst_table_alloc(mm);	86	table = crst_table_alloc(mm);
89	if (!table)	87	if (!table)
90	return -ENOMEM;	88	return -ENOMEM;
		89
91	spin_lock_bh(&mm->page_table_lock);	90	spin_lock_bh(&mm->page_table_lock);
92	if (mm->context.asce_limit < limit) {	91	pgd = (unsigned long *) mm->pgd;
93	pgd = (unsigned long *) mm->pgd;	92	crst_table_init(table, _REGION2_ENTRY_EMPTY);
94	if (mm->context.asce_limit <= (1UL << 31)) {	93	pgd_populate(mm, (pgd_t ) table, (pud_t ) pgd);
95	entry = _REGION3_ENTRY_EMPTY;	94	mm->pgd = (pgd_t *) table;
96	mm->context.asce_limit = 1UL << 42;	95	mm->context.asce_limit = 1UL << 53;
97	mm->context.asce_bits = _ASCE_TABLE_LENGTH \|	96	mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
98	_ASCE_USER_BITS \|	97	_ASCE_USER_BITS \| _ASCE_TYPE_REGION2;
99	_ASCE_TYPE_REGION3;	98	mm->task_size = mm->context.asce_limit;
100	} else {
101	entry = _REGION2_ENTRY_EMPTY;
102	mm->context.asce_limit = 1UL << 53;
103	mm->context.asce_bits = _ASCE_TABLE_LENGTH \|
104	_ASCE_USER_BITS \|
105	_ASCE_TYPE_REGION2;
106	}
107	crst_table_init(table, entry);
108	pgd_populate(mm, (pgd_t ) table, (pud_t ) pgd);
109	mm->pgd = (pgd_t *) table;
110	mm->task_size = mm->context.asce_limit;
111	table = NULL;
112	flush = 1;
113	}
114	spin_unlock_bh(&mm->page_table_lock);	99	spin_unlock_bh(&mm->page_table_lock);
115	if (table)	100
116	crst_table_free(mm, table);	101	on_each_cpu(__crst_table_upgrade, mm, 0);
117	if (mm->context.asce_limit < limit)
118	goto repeat;
119	if (flush)
120	on_each_cpu(__crst_table_upgrade, mm, 0);
121	return 0;	102	return 0;
122	}	103	}
123		104
124	void crst_table_downgrade(struct mm_struct *mm, unsigned long limit)	105	void crst_table_downgrade(struct mm_struct *mm)
125	{	106	{
126	pgd_t *pgd;	107	pgd_t *pgd;
127		108
		109	/* downgrade should only happen from 3 to 2 levels (compat only) */
		110	BUG_ON(mm->context.asce_limit != (1UL << 42));
		111
128	if (current->active_mm == mm) {	112	if (current->active_mm == mm) {
129	clear_user_asce();	113	clear_user_asce();
130	__tlb_flush_mm(mm);	114	__tlb_flush_mm(mm);
131	}	115	}
132	while (mm->context.asce_limit > limit) {	116
133	pgd = mm->pgd;	117	pgd = mm->pgd;
134	switch (pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) {	118	mm->pgd = (pgd_t ) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN);
135	case _REGION_ENTRY_TYPE_R2:	119	mm->context.asce_limit = 1UL << 31;
136	mm->context.asce_limit = 1UL << 42;	120	mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
137	mm->context.asce_bits = _ASCE_TABLE_LENGTH \|	121	_ASCE_USER_BITS \| _ASCE_TYPE_SEGMENT;
138	_ASCE_USER_BITS \|	122	mm->task_size = mm->context.asce_limit;
139	_ASCE_TYPE_REGION3;	123	crst_table_free(mm, (unsigned long *) pgd);
140	break;	124
141	case _REGION_ENTRY_TYPE_R3:
142	mm->context.asce_limit = 1UL << 31;
143	mm->context.asce_bits = _ASCE_TABLE_LENGTH \|
144	_ASCE_USER_BITS \|
145	_ASCE_TYPE_SEGMENT;
146	break;
147	default:
148	BUG();
149	}
150	mm->pgd = (pgd_t ) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN);
151	mm->task_size = mm->context.asce_limit;
152	crst_table_free(mm, (unsigned long *) pgd);
153	}
154	if (current->active_mm == mm)	125	if (current->active_mm == mm)
155	set_user_asce(mm);	126	set_user_asce(mm);
156	}	127	}

arch/s390/pci/pci_dma.c+10−6

 	zdev->dma_table = dma_alloc_cpu_table();
 	if (!zdev->dma_table) {
 		rc = -ENOMEM;
-		goto out_clean;
+		goto out;
 	}
 	/*
 	zdev->iommu_bitmap = vzalloc(zdev->iommu_pages / 8);
 	if (!zdev->iommu_bitmap) {
 		rc = -ENOMEM;
-		goto out_reg;
+		goto free_dma_table;
 	}
 	rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
 				(u64) zdev->dma_table);
 	if (rc)
-		goto out_reg;
+		goto free_bitmap;
-	return 0;
-out_reg:
+	return 0;
+free_bitmap:
+	vfree(zdev->iommu_bitmap);
+	zdev->iommu_bitmap = NULL;
+free_dma_table:
 	dma_free_cpu_table(zdev->dma_table);
-out_clean:
+	zdev->dma_table = NULL;
+out:
 	return rc;
 }

arch/sparc/configs/sparc32_defconfig+0−1

@@ -24,7 +24,6 @@ CONFIG_INET_AH=y · 23 unmodified lines
24	CONFIG_INET_ESP=y	24	CONFIG_INET_ESP=y
25	CONFIG_INET_IPCOMP=y	25	CONFIG_INET_IPCOMP=y
26	# CONFIG_INET_LRO is not set	26	# CONFIG_INET_LRO is not set
27	CONFIG_IPV6_PRIVACY=y
28	CONFIG_INET6_AH=m	27	CONFIG_INET6_AH=m
29	CONFIG_INET6_ESP=m	28	CONFIG_INET6_ESP=m
30	CONFIG_INET6_IPCOMP=m	29	CONFIG_INET6_IPCOMP=m

arch/sparc/configs/sparc64_defconfig+0−1

@@ -48,7 +48,6 @@ CONFIG_SYN_COOKIES=y · 47 unmodified lines
48	CONFIG_INET_AH=y	48	CONFIG_INET_AH=y
49	CONFIG_INET_ESP=y	49	CONFIG_INET_ESP=y
50	CONFIG_INET_IPCOMP=y	50	CONFIG_INET_IPCOMP=y
51	CONFIG_IPV6_PRIVACY=y
52	CONFIG_IPV6_ROUTER_PREF=y	51	CONFIG_IPV6_ROUTER_PREF=y
53	CONFIG_IPV6_ROUTE_INFO=y	52	CONFIG_IPV6_ROUTE_INFO=y
54	CONFIG_IPV6_OPTIMISTIC_DAD=y	53	CONFIG_IPV6_OPTIMISTIC_DAD=y

arch/sparc/include/asm/spitfire.h+1−0

@@ -48,6 +48,7 @@ · 47 unmodified lines
48	#define SUN4V_CHIP_SPARC_M6 0x06	48	#define SUN4V_CHIP_SPARC_M6 0x06
49	#define SUN4V_CHIP_SPARC_M7 0x07	49	#define SUN4V_CHIP_SPARC_M7 0x07
50	#define SUN4V_CHIP_SPARC64X 0x8a	50	#define SUN4V_CHIP_SPARC64X 0x8a
		51	#define SUN4V_CHIP_SPARC_SN 0x8b
51	#define SUN4V_CHIP_UNKNOWN 0xff	52	#define SUN4V_CHIP_UNKNOWN 0xff
52		53
53	#ifndef __ASSEMBLY__	54	#ifndef __ASSEMBLY__

arch/sparc/include/uapi/asm/unistd.h+3−1

 #define __NR_setsockopt		355
 #define __NR_mlock2		356
 #define __NR_copy_file_range	357
+#define __NR_preadv2		358
+#define __NR_pwritev2		359
-#define NR_syscalls		358
+#define NR_syscalls		360
 /* Bitmask values returned from kern_features system call.  */
 #define KERN_FEATURE_MIXED_MODE_STACK	0x00000001

arch/sparc/kernel/cherrs.S+5−9

 	subcc		%g1, %g2, %g1		! Next cacheline
 	bge,pt		%icc, 1b
 	 nop
-	ba,pt		%xcc, dcpe_icpe_tl1_common
+	ba,a,pt		%xcc, dcpe_icpe_tl1_common
-	 nop
 do_dcpe_tl1_fatal:
 	sethi		%hi(1f), %g7
 	mov		0x2, %o0
 	call		cheetah_plus_parity_error
 	 add		%sp, PTREGS_OFF, %o1
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_dcpe_tl1,.-do_dcpe_tl1
 	.globl		do_icpe_tl1
 	subcc		%g1, %g2, %g1
 	bge,pt		%icc, 1b
 	 nop
-	ba,pt		%xcc, dcpe_icpe_tl1_common
+	ba,a,pt		%xcc, dcpe_icpe_tl1_common
-	 nop
 do_icpe_tl1_fatal:
 	sethi		%hi(1f), %g7
 	mov		0x3, %o0
 	call		cheetah_plus_parity_error
 	 add		%sp, PTREGS_OFF, %o1
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_icpe_tl1,.-do_icpe_tl1
 	.type		dcpe_icpe_tl1_common,#function
 	 cmp		%g2, 0x63
 	be		c_cee
 	 nop
-	ba,pt		%xcc, c_deferred
+	ba,a,pt		%xcc, c_deferred
 	.size		__cheetah_log_error,.-__cheetah_log_error
 	/* Cheetah FECC trap handling, we get here from tl{0,1}_fecc

arch/sparc/kernel/cpu.c+6−0

 		sparc_pmu_type = "sparc-m7";
 		break;
+	case SUN4V_CHIP_SPARC_SN:
+		sparc_cpu_type = "SPARC-SN";
+		sparc_fpu_type = "SPARC-SN integrated FPU";
+		sparc_pmu_type = "sparc-sn";
+		break;
 	case SUN4V_CHIP_SPARC64X:
 		sparc_cpu_type = "SPARC64-X";
 		sparc_fpu_type = "SPARC64-X integrated FPU";

arch/sparc/kernel/cpumap.c+1−0

@@ -328,6 +328,7 @@ static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index) · 327 unmodified lines
328	case SUN4V_CHIP_NIAGARA5:	328	case SUN4V_CHIP_NIAGARA5:
329	case SUN4V_CHIP_SPARC_M6:	329	case SUN4V_CHIP_SPARC_M6:
330	case SUN4V_CHIP_SPARC_M7:	330	case SUN4V_CHIP_SPARC_M7:
		331	case SUN4V_CHIP_SPARC_SN:
331	case SUN4V_CHIP_SPARC64X:	332	case SUN4V_CHIP_SPARC64X:
332	rover_inc_table = niagara_iterate_method;	333	rover_inc_table = niagara_iterate_method;
333	break;	334	break;

arch/sparc/kernel/fpu_traps.S+5−6

@@ -100,8 +100,8 @@ do_fpdis: · 99 unmodified lines
100	fmuld %f0, %f2, %f26	100	fmuld %f0, %f2, %f26
101	faddd %f0, %f2, %f28	101	faddd %f0, %f2, %f28
102	fmuld %f0, %f2, %f30	102	fmuld %f0, %f2, %f30
103	b,pt %xcc, fpdis_exit	103	ba,a,pt %xcc, fpdis_exit
104	nop	104
105	2: andcc %g5, FPRS_DU, %g0	105	2: andcc %g5, FPRS_DU, %g0
106	bne,pt %icc, 3f	106	bne,pt %icc, 3f
107	fzero %f32	107	fzero %f32
@@ -144,8 +144,8 @@ do_fpdis: · 36 unmodified lines
144	fmuld %f32, %f34, %f58	144	fmuld %f32, %f34, %f58
145	faddd %f32, %f34, %f60	145	faddd %f32, %f34, %f60
146	fmuld %f32, %f34, %f62	146	fmuld %f32, %f34, %f62
147	ba,pt %xcc, fpdis_exit	147	ba,a,pt %xcc, fpdis_exit
148	nop	148
149	3: mov SECONDARY_CONTEXT, %g3	149	3: mov SECONDARY_CONTEXT, %g3
150	add %g6, TI_FPREGS, %g1	150	add %g6, TI_FPREGS, %g1
151		151
@@ -197,8 +197,7 @@ fpdis_exit2: · 45 unmodified lines
197	fp_other_bounce:	197	fp_other_bounce:
198	call do_fpother	198	call do_fpother
199	add %sp, PTREGS_OFF, %o0	199	add %sp, PTREGS_OFF, %o0
200	ba,pt %xcc, rtrap	200	ba,a,pt %xcc, rtrap
201	nop
202	.size fp_other_bounce,.-fp_other_bounce	201	.size fp_other_bounce,.-fp_other_bounce
203		202
204	.align 32	203	.align 32

arch/sparc/kernel/head_64.S+16−16

 	cmp	%g2, 'T'
 	be,pt	%xcc, 70f
 	 cmp	%g2, 'M'
+	be,pt	%xcc, 70f
+	 cmp	%g2, 'S'
 	bne,pn	%xcc, 49f
 	 nop
 	cmp	%g2, '7'
 	be,pt	%xcc, 5f
 	 mov	SUN4V_CHIP_SPARC_M7, %g4
+	cmp	%g2, 'N'
+	be,pt	%xcc, 5f
+	 mov	SUN4V_CHIP_SPARC_SN, %g4
 	ba,pt	%xcc, 49f
 	 nop
 	subcc	%g3, 1, %g3
 	bne,pt	%xcc, 41b
 	add	%g1, 1, %g1
-	mov	SUN4V_CHIP_SPARC64X, %g4
 	ba,pt	%xcc, 5f
-	nop
+	 mov	SUN4V_CHIP_SPARC64X, %g4
 49:
 	mov	SUN4V_CHIP_UNKNOWN, %g4
 	stxa		%g0, [%g7] ASI_DMMU
 	membar	#Sync
-	ba,pt		%xcc, sun4u_continue
+	ba,a,pt		%xcc, sun4u_continue
-	 nop
 sun4v_init:
 	/* Set ctx 0 */
 	mov		SECONDARY_CONTEXT, %g7
 	stxa		%g0, [%g7] ASI_MMU
 	membar		#Sync
-	ba,pt		%xcc, niagara_tlb_fixup
+	ba,a,pt		%xcc, niagara_tlb_fixup
-	 nop
 sun4u_continue:
 	BRANCH_IF_ANY_CHEETAH(g1, g7, cheetah_tlb_fixup)
-	ba,pt	%xcc, spitfire_tlb_fixup
+	ba,a,pt	%xcc, spitfire_tlb_fixup
-	 nop
 niagara_tlb_fixup:
 	mov	3, %g2		/* Set TLB type to hypervisor. */
 	be,pt	%xcc, niagara4_patch
 	 nop
 	cmp	%g1, SUN4V_CHIP_SPARC_M7
+	be,pt	%xcc, niagara4_patch
+	 nop
+	cmp	%g1, SUN4V_CHIP_SPARC_SN
 	be,pt	%xcc, niagara4_patch
 	 nop
 	call	hypervisor_patch_cachetlbops
 	 nop
-	ba,pt	%xcc, tlb_fixup_done
+	ba,a,pt	%xcc, tlb_fixup_done
-	 nop
 cheetah_tlb_fixup:
 	mov	2, %g2		/* Set TLB type to cheetah+. */
 	call	cheetah_patch_cachetlbops
 	 nop
-	ba,pt	%xcc, tlb_fixup_done
+	ba,a,pt	%xcc, tlb_fixup_done
-	 nop
 spitfire_tlb_fixup:
 	/* Set TLB type to spitfire. */
 	call	%o1
 	 add	%sp, (2047 + 128), %o0
-	ba,pt	%xcc, 2f
+	ba,a,pt	%xcc, 2f
-	 nop
 1:	sethi	%hi(sparc64_ttable_tl0), %o0
 	set	prom_set_trap_table_name, %g2
 	BRANCH_IF_ANY_CHEETAH(o2, o3, 1f)
-	ba,pt	%xcc, 2f
+	ba,a,pt	%xcc, 2f
-	 nop
 	/* Disable STICK_INT interrupts. */
 1:

arch/sparc/kernel/misctrap.S+4−8

 109:	or		%g7, %lo(109b), %g7
 	call		do_privact
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__do_privact,.-__do_privact
 	.type		do_mna,#function
 	mov		%l5, %o2
 	call		mem_address_unaligned
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_mna,.-do_mna
 	.type		do_lddfmna,#function
 	mov		%l5, %o2
 	call		handle_lddfmna
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_lddfmna,.-do_lddfmna
 	.type		do_stdfmna,#function
 	mov		%l5, %o2
 	call		handle_stdfmna
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_stdfmna,.-do_stdfmna
 	.type		breakpoint_trap,#function

arch/sparc/kernel/pci.c+36−6

@@ -245,6 +245,18 @@ static void pci_parse_of_addrs(struct platform_device *op, · 244 unmodified lines
245	}	245	}
246	}	246	}
247		247
		248	static void pci_init_dev_archdata(struct dev_archdata sd, void iommu,
		249	void stc, void host_controller,
		250	struct platform_device *op,
		251	int numa_node)
		252	{
		253	sd->iommu = iommu;
		254	sd->stc = stc;
		255	sd->host_controller = host_controller;
		256	sd->op = op;
		257	sd->numa_node = numa_node;
		258	}
		259
248	static struct pci_dev of_create_pci_dev(struct pci_pbm_info pbm,	260	static struct pci_dev of_create_pci_dev(struct pci_pbm_info pbm,
249	struct device_node *node,	261	struct device_node *node,
250	struct pci_bus *bus, int devfn)	262	struct pci_bus *bus, int devfn)
@@ -259,13 +271,10 @@ static struct pci_dev of_create_pci_dev(struct pci_pbm_info pbm, · 8 unmodified lines
259	if (!dev)	271	if (!dev)
260	return NULL;	272	return NULL;
261		273
		274	op = of_find_device_by_node(node);
262	sd = &dev->dev.archdata;	275	sd = &dev->dev.archdata;
263	sd->iommu = pbm->iommu;	276	pci_init_dev_archdata(sd, pbm->iommu, &pbm->stc, pbm, op,
264	sd->stc = &pbm->stc;	277	pbm->numa_node);
265	sd->host_controller = pbm;
266	sd->op = op = of_find_device_by_node(node);
267	sd->numa_node = pbm->numa_node;
268
269	sd = &op->dev.archdata;	278	sd = &op->dev.archdata;
270	sd->iommu = pbm->iommu;	279	sd->iommu = pbm->iommu;
271	sd->stc = &pbm->stc;	280	sd->stc = &pbm->stc;
@@ -994,6 +1003,27 @@ void pcibios_set_master(struct pci_dev *dev) · 722 unmodified lines
994	/* No special bus mastering setup handling */	1003	/* No special bus mastering setup handling */
995	}	1004	}
996		1005
		1006	#ifdef CONFIG_PCI_IOV
		1007	int pcibios_add_device(struct pci_dev *dev)
		1008	{
		1009	struct pci_dev *pdev;
		1010
		1011	/* Add sriov arch specific initialization here.
		1012	* Copy dev_archdata from PF to VF
		1013	*/
		1014	if (dev->is_virtfn) {
		1015	struct dev_archdata *psd;
		1016
		1017	pdev = dev->physfn;
		1018	psd = &pdev->dev.archdata;
		1019	pci_init_dev_archdata(&dev->dev.archdata, psd->iommu,
		1020	psd->stc, psd->host_controller, NULL,
		1021	psd->numa_node);
		1022	}
		1023	return 0;
		1024	}
		1025	#endif /* CONFIG_PCI_IOV */
		1026
997	static int __init pcibios_init(void)	1027	static int __init pcibios_init(void)
998	{	1028	{
999	pci_dfl_cache_line_size = 64 >> 2;	1029	pci_dfl_cache_line_size = 64 >> 2;

arch/sparc/kernel/setup_64.c+6−1

 	sun4v_patch_2insn_range(&__sun4v_2insn_patch,
 				&__sun4v_2insn_patch_end);
-	if (sun4v_chip_type == SUN4V_CHIP_SPARC_M7)
+	if (sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+	    sun4v_chip_type == SUN4V_CHIP_SPARC_SN)
 		sun_m7_patch_2insn_range(&__sun_m7_2insn_patch,
 					 &__sun_m7_2insn_patch_end);
 		    sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+		    sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC64X)
 			cap |= HWCAP_SPARC_BLKINIT;
 		if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
 		    sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+		    sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC64X)
 			cap |= HWCAP_SPARC_N2;
 	}
 			    sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+			    sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC64X)
 				cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 |
 					AV_SPARC_ASI_BLK_INIT |
 			    sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+			    sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC64X)
 				cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC |
 					AV_SPARC_FMAF);

arch/sparc/kernel/spiterrs.S+6−12

 	ba,pt		%xcc, etraptl1
 	 rd		%pc, %g7
-	ba,pt		%xcc, 2f
+	ba,a,pt		%xcc, 2f
-	 nop
 1:	ba,pt		%xcc, etrap_irq
 	 rd		%pc, %g7
 	mov		%l5, %o2
 	call		spitfire_access_error
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_access_error,.-__spitfire_access_error
 	/* This is the trap handler entry point for ECC correctable
 	mov		%l5, %o2
 	call		spitfire_data_access_exception_tl1
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_data_access_exception_tl1,.-__spitfire_data_access_exception_tl1
 	.type		__spitfire_data_access_exception,#function
 	mov		%l5, %o2
 	call		spitfire_data_access_exception
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_data_access_exception,.-__spitfire_data_access_exception
 	.type		__spitfire_insn_access_exception_tl1,#function
 	mov		%l5, %o2
 	call		spitfire_insn_access_exception_tl1
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_insn_access_exception_tl1,.-__spitfire_insn_access_exception_tl1
 	.type		__spitfire_insn_access_exception,#function
 	mov		%l5, %o2
 	call		spitfire_insn_access_exception
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_insn_access_exception,.-__spitfire_insn_access_exception

arch/sparc/kernel/systbls_32.S+1−1

@@ -88,4 +88,4 @@ sys_call_table: · 87 unmodified lines
88	/340/ .long sys_ni_syscall, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr	88	/340/ .long sys_ni_syscall, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
89	/345/ .long sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf	89	/345/ .long sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf
90	/350/ .long sys_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen	90	/350/ .long sys_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen
91	/355/ .long sys_setsockopt, sys_mlock2, sys_copy_file_range	91	/355/ .long sys_setsockopt, sys_mlock2, sys_copy_file_range, sys_preadv2, sys_pwritev2

arch/sparc/kernel/systbls_64.S+2−2

@@ -89,7 +89,7 @@ sys_call_table32: · 88 unmodified lines
89	/340/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr	89	/340/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
90	.word sys32_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf	90	.word sys32_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf
91	/350/ .word sys32_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen	91	/350/ .word sys32_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen
92	.word compat_sys_setsockopt, sys_mlock2, sys_copy_file_range	92	.word compat_sys_setsockopt, sys_mlock2, sys_copy_file_range, compat_sys_preadv2, compat_sys_pwritev2
93		93
94	#endif /* CONFIG_COMPAT */	94	#endif /* CONFIG_COMPAT */
95		95
@@ -170,4 +170,4 @@ sys_call_table: · 74 unmodified lines
170	/340/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr	170	/340/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
171	.word sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf	171	.word sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf
172	/350/ .word sys64_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen	172	/350/ .word sys64_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen
173	.word sys_setsockopt, sys_mlock2, sys_copy_file_range	173	.word sys_setsockopt, sys_mlock2, sys_copy_file_range, sys_preadv2, sys_pwritev2

arch/sparc/kernel/utrap.S+1−2

@@ -11,8 +11,7 @@ utrap_trap: /* %g3=handler,%g4=level */ · 10 unmodified lines
11	mov %l4, %o1	11	mov %l4, %o1
12	call bad_trap	12	call bad_trap
13	add %sp, PTREGS_OFF, %o0	13	add %sp, PTREGS_OFF, %o0
14	ba,pt %xcc, rtrap	14	ba,a,pt %xcc, rtrap
15	nop
16		15
17	invoke_utrap:	16	invoke_utrap:
18	sllx %g3, 3, %g3	17	sllx %g3, 3, %g3

arch/sparc/kernel/vio.c+18−0

 	return NULL;
 }
+static int vio_hotplug(struct device *dev, struct kobj_uevent_env *env)
+{
+	const struct vio_dev *vio_dev = to_vio_dev(dev);
+	add_uevent_var(env, "MODALIAS=vio:T%sS%s", vio_dev->type, vio_dev->compat);
+	return 0;
+}
 static int vio_bus_match(struct device *dev, struct device_driver *drv)
 {
 	struct vio_dev *vio_dev = to_vio_dev(dev);
 	return sprintf(buf, "%s\n", vdev->type);
 }
+static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
+			     char *buf)
+{
+	const struct vio_dev *vdev = to_vio_dev(dev);
+	return sprintf(buf, "vio:T%sS%s\n", vdev->type, vdev->compat);
+}
 static struct device_attribute vio_dev_attrs[] = {
 	__ATTR_RO(devspec),
 	__ATTR_RO(type),
+	__ATTR_RO(modalias),
 	__ATTR_NULL
 };
 static struct bus_type vio_bus_type = {
 	.name		= "vio",
 	.dev_attrs	= vio_dev_attrs,
+	.uevent         = vio_hotplug,
 	.match		= vio_bus_match,
 	.probe		= vio_device_probe,
 	.remove		= vio_device_remove,

arch/sparc/kernel/vmlinux.lds.S+4−0

 jiffies = jiffies_64;
 #endif
+#ifdef CONFIG_SPARC64
+ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
+#endif
 SECTIONS
 {
 #ifdef CONFIG_SPARC64

arch/sparc/kernel/winfixup.S+1−2

@@ -32,8 +32,7 @@ fill_fixup: · 31 unmodified lines
32	rd %pc, %g7	32	rd %pc, %g7
33	call do_sparc64_fault	33	call do_sparc64_fault
34	add %sp, PTREGS_OFF, %o0	34	add %sp, PTREGS_OFF, %o0
35	ba,pt %xcc, rtrap	35	ba,a,pt %xcc, rtrap
36	nop
37		36
38	/* Be very careful about usage of the trap globals here.	37	/* Be very careful about usage of the trap globals here.
39	* You cannot touch %g5 as that has the fault information.	38	* You cannot touch %g5 as that has the fault information.

arch/sparc/mm/init_64.c+3−0

 			max_phys_bits = 47;
 			break;
 		case SUN4V_CHIP_SPARC_M7:
+		case SUN4V_CHIP_SPARC_SN:
 		default:
 			/* M7 and later support 52-bit virtual addresses.  */
 			sparc64_va_hole_top =    0xfff8000000000000UL;
 	 */
 	switch (sun4v_chip_type) {
 	case SUN4V_CHIP_SPARC_M7:
+	case SUN4V_CHIP_SPARC_SN:
 		pagecv_flag = 0x00;
 		break;
 	default:
 	 */
 	switch (sun4v_chip_type) {
 	case SUN4V_CHIP_SPARC_M7:
+	case SUN4V_CHIP_SPARC_SN:
 		page_cache4v_flag = _PAGE_CP_4V;
 		break;
 	default:

arch/x86/events/amd/core.c+1−1

@@ -115,7 +115,7 @@ static __initconst const u64 amd_hw_cache_event_ids · 114 unmodified lines
115	/*	115	/*
116	* AMD Performance Monitor K7 and later.	116	* AMD Performance Monitor K7 and later.
117	*/	117	*/
118	static const u64 amd_perfmon_event_map[] =	118	static const u64 amd_perfmon_event_map[PERF_COUNT_HW_MAX] =
119	{	119	{
120	[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,	120	[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
121	[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,	121	[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,

arch/x86/events/amd/iommu.c+1−0

@@ -474,6 +474,7 @@ static __init int _init_perf_amd_iommu( · 473 unmodified lines
474		474
475	static struct perf_amd_iommu __perf_iommu = {	475	static struct perf_amd_iommu __perf_iommu = {
476	.pmu = {	476	.pmu = {
		477	.task_ctx_nr = perf_invalid_context,
477	.event_init = perf_iommu_event_init,	478	.event_init = perf_iommu_event_init,
478	.add = perf_iommu_add,	479	.add = perf_iommu_add,
479	.del = perf_iommu_del,	480	.del = perf_iommu_del,

arch/x86/events/intel/core.c+3−0

 		pr_cont("Knights Landing events, ");
 		break;
+	case 142: /* 14nm Kabylake Mobile */
+	case 158: /* 14nm Kabylake Desktop */
 	case 78: /* 14nm Skylake Mobile */
 	case 94: /* 14nm Skylake Desktop */
+	case 85: /* 14nm Skylake Server */
 		x86_pmu.late_ack = true;
 		memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
 		memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));

arch/x86/events/intel/lbr.c+4−2

 #define LBR_PLM (LBR_KERNEL | LBR_USER)
-#define LBR_SEL_MASK	0x1ff	/* valid bits in LBR_SELECT */
+#define LBR_SEL_MASK	0x3ff	/* valid bits in LBR_SELECT */
 #define LBR_NOT_SUPP	-1	/* LBR filter not supported */
 #define LBR_IGN		0	/* ignored */
 	 * The first 9 bits (LBR_SEL_MASK) in LBR_SELECT operate
 	 * in suppress mode. So LBR_SELECT should be set to
 	 * (~mask & LBR_SEL_MASK) | (mask & ~LBR_SEL_MASK)
+	 * But the 10th bit LBR_CALL_STACK does not operate
+	 * in suppress mode.
 	 */
-	reg->config = mask ^ x86_pmu.lbr_sel_mask;
+	reg->config = mask ^ (x86_pmu.lbr_sel_mask & ~LBR_CALL_STACK);
 	if ((br_type & PERF_SAMPLE_BRANCH_NO_CYCLES) &&
 	    (br_type & PERF_SAMPLE_BRANCH_NO_FLAGS) &&

arch/x86/events/intel/pt.c+64−11

@@ -136,9 +136,21 @@ static int __init pt_pmu_hw_init(void) · 135 unmodified lines
136	struct dev_ext_attribute *de_attrs;	136	struct dev_ext_attribute *de_attrs;
137	struct attribute **attrs;	137	struct attribute **attrs;
138	size_t size;	138	size_t size;
		139	u64 reg;
139	int ret;	140	int ret;
140	long i;	141	long i;
141		142
		143	if (boot_cpu_has(X86_FEATURE_VMX)) {
		144	/*
		145	* Intel SDM, 36.5 "Tracing post-VMXON" says that
		146	* "IA32_VMX_MISC[bit 14]" being 1 means PT can trace
		147	* post-VMXON.
		148	*/
		149	rdmsrl(MSR_IA32_VMX_MISC, reg);
		150	if (reg & BIT(14))
		151	pt_pmu.vmx = true;
		152	}
		153
142	attrs = NULL;	154	attrs = NULL;
143		155
144	for (i = 0; i < PT_CPUID_LEAVES; i++) {	156	for (i = 0; i < PT_CPUID_LEAVES; i++) {
@@ -269,20 +281,23 @@ static void pt_config(struct perf_event *event) · 124 unmodified lines
269		281
270	reg \|= (event->attr.config & PT_CONFIG_MASK);	282	reg \|= (event->attr.config & PT_CONFIG_MASK);
271		283
		284	event->hw.config = reg;
272	wrmsrl(MSR_IA32_RTIT_CTL, reg);	285	wrmsrl(MSR_IA32_RTIT_CTL, reg);
273	}	286	}
274		287
275	static void pt_config_start(bool start)	288	static void pt_config_stop(struct perf_event *event)
276	{	289	{
277	u64 ctl;	290	u64 ctl = READ_ONCE(event->hw.config);
		291
		292	/* may be already stopped by a PMI */
		293	if (!(ctl & RTIT_CTL_TRACEEN))
		294	return;
278		295
279	rdmsrl(MSR_IA32_RTIT_CTL, ctl);	296	ctl &= ~RTIT_CTL_TRACEEN;
280	if (start)
281	ctl \|= RTIT_CTL_TRACEEN;
282	else
283	ctl &= ~RTIT_CTL_TRACEEN;
284	wrmsrl(MSR_IA32_RTIT_CTL, ctl);	297	wrmsrl(MSR_IA32_RTIT_CTL, ctl);
285		298
		299	WRITE_ONCE(event->hw.config, ctl);
		300
286	/*	301	/*
287	* A wrmsr that disables trace generation serializes other PT	302	* A wrmsr that disables trace generation serializes other PT
288	* registers and causes all data packets to be written to memory,	303	* registers and causes all data packets to be written to memory,
@@ -291,8 +306,7 @@ static void pt_config_start(bool start) · 2 unmodified lines
291	* The below WMB, separating data store and aux_head store matches	306	* The below WMB, separating data store and aux_head store matches
292	* the consumer's RMB that separates aux_head load and data load.	307	* the consumer's RMB that separates aux_head load and data load.
293	*/	308	*/
294	if (!start)	309	wmb();
295	wmb();
296	}	310	}
297		311
298	static void pt_config_buffer(void *buf, unsigned int topa_idx,	312	static void pt_config_buffer(void *buf, unsigned int topa_idx,
@@ -942,11 +956,17 @@ void intel_pt_interrupt(void) · 643 unmodified lines
942	if (!ACCESS_ONCE(pt->handle_nmi))	956	if (!ACCESS_ONCE(pt->handle_nmi))
943	return;	957	return;
944		958
945	pt_config_start(false);	959	/*
		960	* If VMX is on and PT does not support it, don't touch anything.
		961	*/
		962	if (READ_ONCE(pt->vmx_on))
		963	return;
946		964
947	if (!event)	965	if (!event)
948	return;	966	return;
949		967
		968	pt_config_stop(event);
		969
950	buf = perf_get_aux(&pt->handle);	970	buf = perf_get_aux(&pt->handle);
951	if (!buf)	971	if (!buf)
952	return;	972	return;
@@ -983,6 +1003,35 @@ void intel_pt_interrupt(void) · 30 unmodified lines
983	}	1003	}
984	}	1004	}
985		1005
		1006	void intel_pt_handle_vmx(int on)
		1007	{
		1008	struct pt *pt = this_cpu_ptr(&pt_ctx);
		1009	struct perf_event *event;
		1010	unsigned long flags;
		1011
		1012	/* PT plays nice with VMX, do nothing */
		1013	if (pt_pmu.vmx)
		1014	return;
		1015
		1016	/*
		1017	* VMXON will clear RTIT_CTL.TraceEn; we need to make
		1018	* sure to not try to set it while VMX is on. Disable
		1019	* interrupts to avoid racing with pmu callbacks;
		1020	* concurrent PMI should be handled fine.
		1021	*/
		1022	local_irq_save(flags);
		1023	WRITE_ONCE(pt->vmx_on, on);
		1024
		1025	if (on) {
		1026	/* prevent pt_config_stop() from writing RTIT_CTL */
		1027	event = pt->handle.event;
		1028	if (event)
		1029	event->hw.config = 0;
		1030	}
		1031	local_irq_restore(flags);
		1032	}
		1033	EXPORT_SYMBOL_GPL(intel_pt_handle_vmx);
		1034
986	/*	1035	/*
987	* PMU callbacks	1036	* PMU callbacks
988	*/	1037	*/
@@ -992,6 +1041,9 @@ static void pt_event_start(struct perf_event *event, int mode) · 3 unmodified lines
992	struct pt *pt = this_cpu_ptr(&pt_ctx);	1041	struct pt *pt = this_cpu_ptr(&pt_ctx);
993	struct pt_buffer *buf = perf_get_aux(&pt->handle);	1042	struct pt_buffer *buf = perf_get_aux(&pt->handle);
994		1043
		1044	if (READ_ONCE(pt->vmx_on))
		1045	return;
		1046
995	if (!buf \|\| pt_buffer_is_full(buf, pt)) {	1047	if (!buf \|\| pt_buffer_is_full(buf, pt)) {
996	event->hw.state = PERF_HES_STOPPED;	1048	event->hw.state = PERF_HES_STOPPED;
997	return;	1049	return;
@@ -1014,7 +1066,8 @@ static void pt_event_stop(struct perf_event *event, int mode) · 16 unmodified lines
1014	* see comment in intel_pt_interrupt().	1066	* see comment in intel_pt_interrupt().
1015	*/	1067	*/
1016	ACCESS_ONCE(pt->handle_nmi) = 0;	1068	ACCESS_ONCE(pt->handle_nmi) = 0;
1017	pt_config_start(false);	1069
		1070	pt_config_stop(event);
1018		1071
1019	if (event->hw.state == PERF_HES_STOPPED)	1072	if (event->hw.state == PERF_HES_STOPPED)
1020	return;	1073	return;

arch/x86/events/intel/pt.h+3−0

 struct pt_pmu {
 	struct pmu		pmu;
 	u32			caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
+	bool			vmx;
 };
 /**
  * struct pt - per-cpu pt context
  * @handle:	perf output handle
  * @handle_nmi:	do handle PT PMI on this cpu, there's an active event
+ * @vmx_on:	1 if VMX is ON on this cpu
  */
 struct pt {
 	struct perf_output_handle handle;
 	int			handle_nmi;
+	int			vmx_on;
 };
 #endif /* __INTEL_PT_H__ */

arch/x86/events/intel/rapl.c+1−0

@@ -718,6 +718,7 @@ static int __init rapl_pmu_init(void) · 717 unmodified lines
718	break;	718	break;
719	case 60: /* Haswell */	719	case 60: /* Haswell */
720	case 69: /* Haswell-Celeron */	720	case 69: /* Haswell-Celeron */
		721	case 70: /* Haswell GT3e */
721	case 61: /* Broadwell */	722	case 61: /* Broadwell */
722	case 71: /* Broadwell-H */	723	case 71: /* Broadwell-H */
723	rapl_cntr_mask = RAPL_IDX_HSW;	724	rapl_cntr_mask = RAPL_IDX_HSW;

arch/x86/include/asm/perf_event.h+4−0

 static inline void perf_check_microcode(void) { }
 #endif
+#ifdef CONFIG_CPU_SUP_INTEL
+ extern void intel_pt_handle_vmx(int on);
+#endif
 #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
  extern void amd_pmu_enable_virt(void);
  extern void amd_pmu_disable_virt(void);

arch/x86/kernel/apic/vector.c+2−1

@@ -256,7 +256,8 @@ static void clear_irq_vector(int irq, struct apic_chip_data *data) · 255 unmodified lines
256	struct irq_desc *desc;	256	struct irq_desc *desc;
257	int cpu, vector;	257	int cpu, vector;
258		258
259	BUG_ON(!data->cfg.vector);	259	if (!data->cfg.vector)
		260	return;
260		261
261	vector = data->cfg.vector;	262	vector = data->cfg.vector;
262	for_each_cpu_and(cpu, data->domain, cpu_online_mask)	263	for_each_cpu_and(cpu, data->domain, cpu_online_mask)

arch/x86/kernel/apic/x2apic_uv_x.c+1−3

@@ -891,9 +891,7 @@ void __init uv_system_init(void) · 890 unmodified lines
891	}	891	}
892	pr_info("UV: Found %s hub\n", hub);	892	pr_info("UV: Found %s hub\n", hub);
893		893
894	/* We now only need to map the MMRs on UV1 */	894	map_low_mmrs();
895	if (is_uv1_hub())
896	map_low_mmrs();
897		895
898	m_n_config.v = uv_read_local_mmr(UVH_RH_GAM_CONFIG_MMR );	896	m_n_config.v = uv_read_local_mmr(UVH_RH_GAM_CONFIG_MMR );
899	m_val = m_n_config.s.m_skt;	897	m_val = m_n_config.s.m_skt;

arch/x86/kernel/head_32.S+0−6

 	/* Make changes effective */
 	wrmsr
-	/*
-	 * And make sure that all the mappings we set up have NX set from
-	 * the beginning.
-	 */
-	orl $(1 << (_PAGE_BIT_NX - 32)), pa(__supported_pte_mask + 4)
 enable_paging:
 /*

arch/x86/kernel/sysfb_efi.c+12−2

 					continue;
 				for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
 					resource_size_t start, end;
+					unsigned long flags;
+					flags = pci_resource_flags(dev, i);
+					if (!(flags & IORESOURCE_MEM))
+						continue;
+					if (flags & IORESOURCE_UNSET)
+						continue;
+					if (pci_resource_len(dev, i) == 0)
+						continue;
 					start = pci_resource_start(dev, i);
-					if (start == 0)
-						break;
 					end = pci_resource_end(dev, i);
 					if (screen_info.lfb_base >= start &&
 					    screen_info.lfb_base < end) {
 						found_bar = 1;
+						break;
 					}
 				}
 			}

arch/x86/kernel/tsc_msr.c+1−1

@@ -92,7 +92,7 @@ unsigned long try_msr_calibrate_tsc(void) · 91 unmodified lines
92		92
93	if (freq_desc_tables[cpu_index].msr_plat) {	93	if (freq_desc_tables[cpu_index].msr_plat) {
94	rdmsr(MSR_PLATFORM_INFO, lo, hi);	94	rdmsr(MSR_PLATFORM_INFO, lo, hi);
95	ratio = (lo >> 8) & 0x1f;	95	ratio = (lo >> 8) & 0xff;
96	} else {	96	} else {
97	rdmsr(MSR_IA32_PERF_STATUS, lo, hi);	97	rdmsr(MSR_IA32_PERF_STATUS, lo, hi);
98	ratio = (hi >> 8) & 0x1f;	98	ratio = (hi >> 8) & 0x1f;

arch/x86/kvm/mmu.c+2−2

@@ -2823,7 +2823,7 @@ static void transparent_hugepage_adjust(struct kvm_vcpu *vcpu, · 2822 unmodified lines
2823	*/	2823	*/
2824	if (!is_error_noslot_pfn(pfn) && !kvm_is_reserved_pfn(pfn) &&	2824	if (!is_error_noslot_pfn(pfn) && !kvm_is_reserved_pfn(pfn) &&
2825	level == PT_PAGE_TABLE_LEVEL &&	2825	level == PT_PAGE_TABLE_LEVEL &&
2826	PageTransCompound(pfn_to_page(pfn)) &&	2826	PageTransCompoundMap(pfn_to_page(pfn)) &&
2827	!mmu_gfn_lpage_is_disallowed(vcpu, gfn, PT_DIRECTORY_LEVEL)) {	2827	!mmu_gfn_lpage_is_disallowed(vcpu, gfn, PT_DIRECTORY_LEVEL)) {
2828	unsigned long mask;	2828	unsigned long mask;
2829	/*	2829	/*
@@ -4785,7 +4785,7 @@ restart: · 1955 unmodified lines
4785	*/	4785	*/
4786	if (sp->role.direct &&	4786	if (sp->role.direct &&
4787	!kvm_is_reserved_pfn(pfn) &&	4787	!kvm_is_reserved_pfn(pfn) &&
4788	PageTransCompound(pfn_to_page(pfn))) {	4788	PageTransCompoundMap(pfn_to_page(pfn))) {
4789	drop_spte(kvm, sptep);	4789	drop_spte(kvm, sptep);
4790	need_tlb_flush = 1;	4790	need_tlb_flush = 1;
4791	goto restart;	4791	goto restart;

arch/x86/kvm/vmx.c+4−0

 static void kvm_cpu_vmxon(u64 addr)
 {
+	intel_pt_handle_vmx(1);
 	asm volatile (ASM_VMX_VMXON_RAX
 			: : "a"(&addr), "m"(addr)
 			: "memory", "cc");
 static void kvm_cpu_vmxoff(void)
 {
 	asm volatile (__ex(ASM_VMX_VMXOFF) : : : "cc");
+	intel_pt_handle_vmx(0);
 }
 static void hardware_disable(void)

arch/x86/mm/setup_nx.c+3−2

@@ -32,8 +32,9 @@ early_param("noexec", noexec_setup); · 31 unmodified lines
32		32
33	void x86_configure_nx(void)	33	void x86_configure_nx(void)
34	{	34	{
35	/* If disable_nx is set, clear NX on all new mappings going forward. */	35	if (boot_cpu_has(X86_FEATURE_NX) && !disable_nx)
36	if (disable_nx)	36	__supported_pte_mask \|= _PAGE_NX;
		37	else
37	__supported_pte_mask &= ~_PAGE_NX;	38	__supported_pte_mask &= ~_PAGE_NX;
38	}	39	}
39		40

arch/x86/platform/efi/efi-bgrt.c+9−9

@@ -43,40 +43,40 @@ void __init efi_bgrt_init(void) · 42 unmodified lines
43	return;	43	return;
44		44
45	if (bgrt_tab->header.length < sizeof(*bgrt_tab)) {	45	if (bgrt_tab->header.length < sizeof(*bgrt_tab)) {
46	pr_err("Ignoring BGRT: invalid length %u (expected %zu)\n",	46	pr_notice("Ignoring BGRT: invalid length %u (expected %zu)\n",
47	bgrt_tab->header.length, sizeof(*bgrt_tab));	47	bgrt_tab->header.length, sizeof(*bgrt_tab));
48	return;	48	return;
49	}	49	}
50	if (bgrt_tab->version != 1) {	50	if (bgrt_tab->version != 1) {
51	pr_err("Ignoring BGRT: invalid version %u (expected 1)\n",	51	pr_notice("Ignoring BGRT: invalid version %u (expected 1)\n",
52	bgrt_tab->version);	52	bgrt_tab->version);
53	return;	53	return;
54	}	54	}
55	if (bgrt_tab->status & 0xfe) {	55	if (bgrt_tab->status & 0xfe) {
56	pr_err("Ignoring BGRT: reserved status bits are non-zero %u\n",	56	pr_notice("Ignoring BGRT: reserved status bits are non-zero %u\n",
57	bgrt_tab->status);	57	bgrt_tab->status);
58	return;	58	return;
59	}	59	}
60	if (bgrt_tab->image_type != 0) {	60	if (bgrt_tab->image_type != 0) {
61	pr_err("Ignoring BGRT: invalid image type %u (expected 0)\n",	61	pr_notice("Ignoring BGRT: invalid image type %u (expected 0)\n",
62	bgrt_tab->image_type);	62	bgrt_tab->image_type);
63	return;	63	return;
64	}	64	}
65	if (!bgrt_tab->image_address) {	65	if (!bgrt_tab->image_address) {
66	pr_err("Ignoring BGRT: null image address\n");	66	pr_notice("Ignoring BGRT: null image address\n");
67	return;	67	return;
68	}	68	}
69		69
70	image = memremap(bgrt_tab->image_address, sizeof(bmp_header), MEMREMAP_WB);	70	image = memremap(bgrt_tab->image_address, sizeof(bmp_header), MEMREMAP_WB);
71	if (!image) {	71	if (!image) {
72	pr_err("Ignoring BGRT: failed to map image header memory\n");	72	pr_notice("Ignoring BGRT: failed to map image header memory\n");
73	return;	73	return;
74	}	74	}
75		75
76	memcpy(&bmp_header, image, sizeof(bmp_header));	76	memcpy(&bmp_header, image, sizeof(bmp_header));
77	memunmap(image);	77	memunmap(image);
78	if (bmp_header.id != 0x4d42) {	78	if (bmp_header.id != 0x4d42) {
79	pr_err("Ignoring BGRT: Incorrect BMP magic number 0x%x (expected 0x4d42)\n",	79	pr_notice("Ignoring BGRT: Incorrect BMP magic number 0x%x (expected 0x4d42)\n",
80	bmp_header.id);	80	bmp_header.id);
81	return;	81	return;
82	}	82	}
@@ -84,14 +84,14 @@ void __init efi_bgrt_init(void) · 1 unmodified line
84		84
85	bgrt_image = kmalloc(bgrt_image_size, GFP_KERNEL \| __GFP_NOWARN);	85	bgrt_image = kmalloc(bgrt_image_size, GFP_KERNEL \| __GFP_NOWARN);
86	if (!bgrt_image) {	86	if (!bgrt_image) {
87	pr_err("Ignoring BGRT: failed to allocate memory for image (wanted %zu bytes)\n",	87	pr_notice("Ignoring BGRT: failed to allocate memory for image (wanted %zu bytes)\n",
88	bgrt_image_size);	88	bgrt_image_size);
89	return;	89	return;
90	}	90	}
91		91
92	image = memremap(bgrt_tab->image_address, bmp_header.size, MEMREMAP_WB);	92	image = memremap(bgrt_tab->image_address, bmp_header.size, MEMREMAP_WB);
93	if (!image) {	93	if (!image) {
94	pr_err("Ignoring BGRT: failed to map image memory\n");	94	pr_notice("Ignoring BGRT: failed to map image memory\n");
95	kfree(bgrt_image);	95	kfree(bgrt_image);
96	bgrt_image = NULL;	96	bgrt_image = NULL;
97	return;	97	return;

arch/x86/xen/spinlock.c+6−0

 static void xen_qlock_kick(int cpu)
 {
+	int irq = per_cpu(lock_kicker_irq, cpu);
+	/* Don't kick if the target's kicker interrupt is not initialized. */
+	if (irq == -1)
+		return;
 	xen_send_IPI_one(cpu, XEN_SPIN_UNLOCK_VECTOR);
 }

drivers/acpi/acpica/dsmethod.c+3−0

@@ -428,6 +428,9 @@ acpi_ds_begin_method_execution(struct acpi_namespace_node *method_node, · 427 unmodified lines
428	obj_desc->method.mutex->mutex.	428	obj_desc->method.mutex->mutex.
429	original_sync_level =	429	original_sync_level =
430	obj_desc->method.mutex->mutex.sync_level;	430	obj_desc->method.mutex->mutex.sync_level;
		431
		432	obj_desc->method.mutex->mutex.thread_id =
		433	acpi_os_get_thread_id();
431	}	434	}
432	}	435	}
433		436

drivers/acpi/nfit.c+4−1

 					offset);
 			rc = -ENXIO;
 		}
-	} else
+	} else {
 		rc = 0;
+		if (cmd_rc)
+			*cmd_rc = xlat_status(buf, cmd);
+	}
  out:
 	ACPI_FREE(out_obj);

drivers/ata/Kconfig+8−0

@@ -202,6 +202,14 @@ config SATA_FSL · 201 unmodified lines
202		202
203	If unsure, say N.	203	If unsure, say N.
204		204
		205	config SATA_AHCI_SEATTLE
		206	tristate "AMD Seattle 6.0Gbps AHCI SATA host controller support"
		207	depends on ARCH_SEATTLE
		208	help
		209	This option enables support for AMD Seattle SATA host controller.
		210
		211	If unsure, say N
		212
205	config SATA_INIC162X	213	config SATA_INIC162X
206	tristate "Initio 162x SATA support (Very Experimental)"	214	tristate "Initio 162x SATA support (Very Experimental)"
207	depends on PCI	215	depends on PCI

drivers/ata/Makefile+1−0

@@ -4,6 +4,7 @@ obj-$(CONFIG_ATA) += libata.o · 3 unmodified lines
4	# non-SFF interface	4	# non-SFF interface
5	obj-$(CONFIG_SATA_AHCI) += ahci.o libahci.o	5	obj-$(CONFIG_SATA_AHCI) += ahci.o libahci.o
6	obj-$(CONFIG_SATA_ACARD_AHCI) += acard-ahci.o libahci.o	6	obj-$(CONFIG_SATA_ACARD_AHCI) += acard-ahci.o libahci.o
		7	obj-$(CONFIG_SATA_AHCI_SEATTLE) += ahci_seattle.o libahci.o libahci_platform.o
7	obj-$(CONFIG_SATA_AHCI_PLATFORM) += ahci_platform.o libahci.o libahci_platform.o	8	obj-$(CONFIG_SATA_AHCI_PLATFORM) += ahci_platform.o libahci.o libahci_platform.o
8	obj-$(CONFIG_SATA_FSL) += sata_fsl.o	9	obj-$(CONFIG_SATA_FSL) += sata_fsl.o
9	obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o	10	obj-$(CONFIG_SATA_INIC162X) += sata_inic162x.o

drivers/ata/ahci_platform.c+3−0

@@ -51,6 +51,9 @@ static int ahci_probe(struct platform_device *pdev) · 50 unmodified lines
51	if (rc)	51	if (rc)
52	return rc;	52	return rc;
53		53
		54	of_property_read_u32(dev->of_node,
		55	"ports-implemented", &hpriv->force_port_map);
		56
54	if (of_device_is_compatible(dev->of_node, "hisilicon,hisi-ahci"))	57	if (of_device_is_compatible(dev->of_node, "hisilicon,hisi-ahci"))
55	hpriv->flags \|= AHCI_HFLAG_NO_FBS \| AHCI_HFLAG_NO_NCQ;	58	hpriv->flags \|= AHCI_HFLAG_NO_FBS \| AHCI_HFLAG_NO_NCQ;
56		59

drivers/ata/ahci_seattle.c+210−0

@@ -0,0 +1,210 @@
	1	/*
	2	* AMD Seattle AHCI SATA driver
	3	*
	4	* Copyright (c) 2015, Advanced Micro Devices
	5	* Author: Brijesh Singh <brijesh.singh@amd.com>
	6	*
	7	* based on the AHCI SATA platform driver by Jeff Garzik and Anton Vorontsov
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*/
	18
	19	#include <linux/kernel.h>
	20	#include <linux/module.h>
	21	#include <linux/pm.h>
	22	#include <linux/device.h>
	23	#include <linux/of_device.h>
	24	#include <linux/platform_device.h>
	25	#include <linux/libata.h>
	26	#include <linux/ahci_platform.h>
	27	#include <linux/acpi.h>
	28	#include <linux/pci_ids.h>
	29	#include "ahci.h"
	30
	31	/* SGPIO Control Register definition
	32	*
	33	* Bit Type Description
	34	* 31 RW OD7.2 (activity)
	35	* 30 RW OD7.1 (locate)
	36	* 29 RW OD7.0 (fault)
	37	* 28...8 RW OD6.2...OD0.0 (3bits per port, 1 bit per LED)
	38	* 7 RO SGPIO feature flag
	39	* 6:4 RO Reserved
	40	* 3:0 RO Number of ports (0 means no port supported)
	41	*/
	42	#define ACTIVITY_BIT_POS(x) (8 + (3 * x))
	43	#define LOCATE_BIT_POS(x) (ACTIVITY_BIT_POS(x) + 1)
	44	#define FAULT_BIT_POS(x) (LOCATE_BIT_POS(x) + 1)
	45
	46	#define ACTIVITY_MASK 0x00010000
	47	#define LOCATE_MASK 0x00080000
	48	#define FAULT_MASK 0x00400000
	49
	50	#define DRV_NAME "ahci-seattle"
	51
	52	static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state,
	53	ssize_t size);
	54
	55	struct seattle_plat_data {
	56	void __iomem *sgpio_ctrl;
	57	};
	58
	59	static struct ata_port_operations ahci_port_ops = {
	60	.inherits = &ahci_ops,
	61	};
	62
	63	static const struct ata_port_info ahci_port_info = {
	64	.flags = AHCI_FLAG_COMMON,
	65	.pio_mask = ATA_PIO4,
	66	.udma_mask = ATA_UDMA6,
	67	.port_ops = &ahci_port_ops,
	68	};
	69
	70	static struct ata_port_operations ahci_seattle_ops = {
	71	.inherits = &ahci_ops,
	72	.transmit_led_message = seattle_transmit_led_message,
	73	};
	74
	75	static const struct ata_port_info ahci_port_seattle_info = {
	76	.flags = AHCI_FLAG_COMMON \| ATA_FLAG_EM \| ATA_FLAG_SW_ACTIVITY,
	77	.link_flags = ATA_LFLAG_SW_ACTIVITY,
	78	.pio_mask = ATA_PIO4,
	79	.udma_mask = ATA_UDMA6,
	80	.port_ops = &ahci_seattle_ops,
	81	};
	82
	83	static struct scsi_host_template ahci_platform_sht = {
	84	AHCI_SHT(DRV_NAME),
	85	};
	86
	87	static ssize_t seattle_transmit_led_message(struct ata_port *ap, u32 state,
	88	ssize_t size)
	89	{
	90	struct ahci_host_priv *hpriv = ap->host->private_data;
	91	struct ahci_port_priv *pp = ap->private_data;
	92	struct seattle_plat_data *plat_data = hpriv->plat_data;
	93	unsigned long flags;
	94	int pmp;
	95	struct ahci_em_priv *emp;
	96	u32 val;
	97
	98	/* get the slot number from the message */
	99	pmp = (state & EM_MSG_LED_PMP_SLOT) >> 8;
	100	if (pmp >= EM_MAX_SLOTS)
	101	return -EINVAL;
	102	emp = &pp->em_priv[pmp];
	103
	104	val = ioread32(plat_data->sgpio_ctrl);
	105	if (state & ACTIVITY_MASK)
	106	val \|= 1 << ACTIVITY_BIT_POS((ap->port_no));
	107	else
	108	val &= ~(1 << ACTIVITY_BIT_POS((ap->port_no)));
	109
	110	if (state & LOCATE_MASK)
	111	val \|= 1 << LOCATE_BIT_POS((ap->port_no));
	112	else
	113	val &= ~(1 << LOCATE_BIT_POS((ap->port_no)));
	114
	115	if (state & FAULT_MASK)
	116	val \|= 1 << FAULT_BIT_POS((ap->port_no));
	117	else
	118	val &= ~(1 << FAULT_BIT_POS((ap->port_no)));
	119
	120	iowrite32(val, plat_data->sgpio_ctrl);
	121
	122	spin_lock_irqsave(ap->lock, flags);
	123
	124	/* save off new led state for port/slot */
	125	emp->led_state = state;
	126
	127	spin_unlock_irqrestore(ap->lock, flags);
	128
	129	return size;
	130	}
	131
	132	static const struct ata_port_info *ahci_seattle_get_port_info(
	133	struct platform_device pdev, struct ahci_host_priv hpriv)
	134	{
	135	struct device *dev = &pdev->dev;
	136	struct seattle_plat_data *plat_data;
	137	u32 val;
	138
	139	plat_data = devm_kzalloc(dev, sizeof(*plat_data), GFP_KERNEL);
	140	if (IS_ERR(plat_data))
	141	return &ahci_port_info;
	142
	143	plat_data->sgpio_ctrl = devm_ioremap_resource(dev,
	144	platform_get_resource(pdev, IORESOURCE_MEM, 1));
	145	if (IS_ERR(plat_data->sgpio_ctrl))
	146	return &ahci_port_info;
	147
	148	val = ioread32(plat_data->sgpio_ctrl);
	149
	150	if (!(val & 0xf))
	151	return &ahci_port_info;
	152
	153	hpriv->em_loc = 0;
	154	hpriv->em_buf_sz = 4;
	155	hpriv->em_msg_type = EM_MSG_TYPE_LED;
	156	hpriv->plat_data = plat_data;
	157
	158	dev_info(dev, "SGPIO LED control is enabled.\n");
	159	return &ahci_port_seattle_info;
	160	}
	161
	162	static int ahci_seattle_probe(struct platform_device *pdev)
	163	{
	164	int rc;
	165	struct ahci_host_priv *hpriv;
	166
	167	hpriv = ahci_platform_get_resources(pdev);
	168	if (IS_ERR(hpriv))
	169	return PTR_ERR(hpriv);
	170
	171	rc = ahci_platform_enable_resources(hpriv);
	172	if (rc)
	173	return rc;
	174
	175	rc = ahci_platform_init_host(pdev, hpriv,
	176	ahci_seattle_get_port_info(pdev, hpriv),
	177	&ahci_platform_sht);
	178	if (rc)
	179	goto disable_resources;
	180
	181	return 0;
	182	disable_resources:
	183	ahci_platform_disable_resources(hpriv);
	184	return rc;
	185	}
	186
	187	static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_platform_suspend,
	188	ahci_platform_resume);
	189
	190	static const struct acpi_device_id ahci_acpi_match[] = {
	191	{ "AMDI0600", 0 },
	192	{}
	193	};
	194	MODULE_DEVICE_TABLE(acpi, ahci_acpi_match);
	195
	196	static struct platform_driver ahci_seattle_driver = {
	197	.probe = ahci_seattle_probe,
	198	.remove = ata_platform_remove_one,
	199	.driver = {
	200	.name = DRV_NAME,
	201	.acpi_match_table = ahci_acpi_match,
	202	.pm = &ahci_pm_ops,
	203	},
	204	};
	205	module_platform_driver(ahci_seattle_driver);
	206
	207	MODULE_DESCRIPTION("Seattle AHCI SATA platform driver");
	208	MODULE_AUTHOR("Brijesh Singh <brijesh.singh@amd.com>");
	209	MODULE_LICENSE("GPL");
	210	MODULE_ALIAS("platform:" DRV_NAME);

drivers/ata/libahci.c+1−0

@@ -507,6 +507,7 @@ void ahci_save_initial_config(struct device dev, struct ahci_host_priv hpriv) · 506 unmodified lines
507	dev_info(dev, "forcing port_map 0x%x -> 0x%x\n",	507	dev_info(dev, "forcing port_map 0x%x -> 0x%x\n",
508	port_map, hpriv->force_port_map);	508	port_map, hpriv->force_port_map);
509	port_map = hpriv->force_port_map;	509	port_map = hpriv->force_port_map;
		510	hpriv->saved_port_map = port_map;
510	}	511	}
511		512
512	if (hpriv->mask_port_map) {	513	if (hpriv->mask_port_map) {

drivers/base/power/opp/core.c+0−3

 	reg = opp_table->regulator;
 	if (IS_ERR(reg)) {
 		/* Regulator may not be required for device */
-		if (reg)
-			dev_err(dev, "%s: Invalid regulator (%ld)\n", __func__,
-				PTR_ERR(reg));
 		rcu_read_unlock();
 		return 0;
 	}

drivers/base/property.c+1−1

@@ -21,7 +21,7 @@ · 20 unmodified lines
21		21
22	static inline bool is_pset_node(struct fwnode_handle *fwnode)	22	static inline bool is_pset_node(struct fwnode_handle *fwnode)
23	{	23	{
24	return fwnode && fwnode->type == FWNODE_PDATA;	24	return !IS_ERR_OR_NULL(fwnode) && fwnode->type == FWNODE_PDATA;
25	}	25	}
26		26
27	static inline struct property_set to_pset_node(struct fwnode_handle fwnode)	27	static inline struct property_set to_pset_node(struct fwnode_handle fwnode)

drivers/block/rbd.c+25−27

 				u8 *order, u64 *snap_size);
 static int _rbd_dev_v2_snap_features(struct rbd_device *rbd_dev, u64 snap_id,
 		u64 *snap_features);
-static u64 rbd_snap_id_by_name(struct rbd_device *rbd_dev, const char *name);
 static int rbd_open(struct block_device *bdev, fmode_t mode)
 {
 	struct rbd_device *rbd_dev = (struct rbd_device *)data;
 	int ret;
-	if (!rbd_dev)
-		return;
 	dout("%s: \"%s\" notify_id %llu opcode %u\n", __func__,
 		rbd_dev->header_name, (unsigned long long)notify_id,
 		(unsigned int)opcode);
 	ceph_osdc_cancel_event(rbd_dev->watch_event);
 	rbd_dev->watch_event = NULL;
+	dout("%s flushing notifies\n", __func__);
+	ceph_osdc_flush_notifies(&rbd_dev->rbd_client->client->osdc);
 }
 /*
 static void rbd_dev_update_size(struct rbd_device *rbd_dev)
 {
 	sector_t size;
-	bool removing;
 	/*
-	 * Don't hold the lock while doing disk operations,
+	 * If EXISTS is not set, rbd_dev->disk may be NULL, so don't
-	 * or lock ordering will conflict with the bdev mutex via:
+	 * try to update its size.  If REMOVING is set, updating size
-	 * rbd_add() -> blkdev_get() -> rbd_open()
+	 * is just useless work since the device can't be opened.
 	 */
-	spin_lock_irq(&rbd_dev->lock);
+	if (test_bit(RBD_DEV_FLAG_EXISTS, &rbd_dev->flags) &&
-	removing = test_bit(RBD_DEV_FLAG_REMOVING, &rbd_dev->flags);
+	    !test_bit(RBD_DEV_FLAG_REMOVING, &rbd_dev->flags)) {
-	spin_unlock_irq(&rbd_dev->lock);
-	/*
-	 * If the device is being removed, rbd_dev->disk has
-	 * been destroyed, so don't try to update its size
-	 */
-	if (!removing) {
 		size = (sector_t)rbd_dev->mapping.size / SECTOR_SIZE;
 		dout("setting size to %llu sectors", (unsigned long long)size);
 		set_capacity(rbd_dev->disk, size);
 		__le64 features;
 		__le64 incompat;
 	} __attribute__ ((packed)) features_buf = { 0 };
-	u64 incompat;
+	u64 unsup;
 	int ret;
 	ret = rbd_obj_method_sync(rbd_dev, rbd_dev->header_name,
 	if (ret < sizeof (features_buf))
 		return -ERANGE;
-	incompat = le64_to_cpu(features_buf.incompat);
+	unsup = le64_to_cpu(features_buf.incompat) & ~RBD_FEATURES_SUPPORTED;
-	if (incompat & ~RBD_FEATURES_SUPPORTED)
+	if (unsup) {
+		rbd_warn(rbd_dev, "image uses unsupported features: 0x%llx",
+			 unsup);
 		return -ENXIO;
+	}
 	*snap_features = le64_to_cpu(features_buf.features);
 	return ret;
 }
+/*
+ * rbd_dev->header_rwsem must be locked for write and will be unlocked
+ * upon return.
+ */
 static int rbd_dev_device_setup(struct rbd_device *rbd_dev)
 {
 	int ret;
 	ret = rbd_dev_id_get(rbd_dev);
 	if (ret)
-		return ret;
+		goto err_out_unlock;
 	BUILD_BUG_ON(DEV_NAME_LEN
 			< sizeof (RBD_DRV_NAME) + MAX_INT_FORMAT_WIDTH);
 	/* Everything's ready.  Announce the disk to the world. */
 	set_bit(RBD_DEV_FLAG_EXISTS, &rbd_dev->flags);
-	add_disk(rbd_dev->disk);
+	up_write(&rbd_dev->header_rwsem);
+	add_disk(rbd_dev->disk);
 	pr_info("%s: added with size 0x%llx\n", rbd_dev->disk->disk_name,
 		(unsigned long long) rbd_dev->mapping.size);
 		unregister_blkdev(rbd_dev->major, rbd_dev->name);
 err_out_id:
 	rbd_dev_id_put(rbd_dev);
+err_out_unlock:
+	up_write(&rbd_dev->header_rwsem);
 	return ret;
 }
 	spec = NULL;		/* rbd_dev now owns this */
 	rbd_opts = NULL;	/* rbd_dev now owns this */
+	down_write(&rbd_dev->header_rwsem);
 	rc = rbd_dev_image_probe(rbd_dev, 0);
 	if (rc < 0)
 		goto err_out_rbd_dev;
 	return rc;
 err_out_rbd_dev:
+	up_write(&rbd_dev->header_rwsem);
 	rbd_dev_destroy(rbd_dev);
 err_out_client:
 	rbd_put_client(rbdc);
 		return ret;
 	rbd_dev_header_unwatch_sync(rbd_dev);
-	/*
-	 * flush remaining watch callbacks - these must be complete
-	 * before the osd_client is shutdown
-	 */
-	dout("%s: flushing notifies", __func__);
-	ceph_osdc_flush_notifies(&rbd_dev->rbd_client->client->osdc);
 	/*
 	 * Don't free anything from rbd_dev->disk until after all

drivers/clk/imx/clk-imx6q.c+1−1

@@ -394,7 +394,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) · 393 unmodified lines
394	clk[IMX6QDL_CLK_LDB_DI1_DIV_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1", 2, 7);	394	clk[IMX6QDL_CLK_LDB_DI1_DIV_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1", 2, 7);
395	} else {	395	} else {
396	clk[IMX6QDL_CLK_ECSPI_ROOT] = imx_clk_divider("ecspi_root", "pll3_60m", base + 0x38, 19, 6);	396	clk[IMX6QDL_CLK_ECSPI_ROOT] = imx_clk_divider("ecspi_root", "pll3_60m", base + 0x38, 19, 6);
397	clk[IMX6QDL_CLK_CAN_ROOT] = imx_clk_divider("can_root", "pll3_60", base + 0x20, 2, 6);	397	clk[IMX6QDL_CLK_CAN_ROOT] = imx_clk_divider("can_root", "pll3_60m", base + 0x20, 2, 6);
398	clk[IMX6QDL_CLK_IPG_PER] = imx_clk_fixup_divider("ipg_per", "ipg", base + 0x1c, 0, 6, imx_cscmr1_fixup);	398	clk[IMX6QDL_CLK_IPG_PER] = imx_clk_fixup_divider("ipg_per", "ipg", base + 0x1c, 0, 6, imx_cscmr1_fixup);
399	clk[IMX6QDL_CLK_UART_SERIAL_PODF] = imx_clk_divider("uart_serial_podf", "pll3_80m", base + 0x24, 0, 6);	399	clk[IMX6QDL_CLK_UART_SERIAL_PODF] = imx_clk_divider("uart_serial_podf", "pll3_80m", base + 0x24, 0, 6);
400	clk[IMX6QDL_CLK_LDB_DI0_DIV_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);	400	clk[IMX6QDL_CLK_LDB_DI0_DIV_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);

drivers/cpufreq/cpufreq.c+15−11

 	if (!cpufreq_driver)
 		return;
-	if (!has_target())
+	if (!has_target() && !cpufreq_driver->suspend)
 		goto suspend;
 	pr_debug("%s: Suspending Governors\n", __func__);
 	for_each_active_policy(policy) {
-		down_write(&policy->rwsem);
+		if (has_target()) {
-		ret = cpufreq_governor(policy, CPUFREQ_GOV_STOP);
+			down_write(&policy->rwsem);
-		up_write(&policy->rwsem);
+			ret = cpufreq_governor(policy, CPUFREQ_GOV_STOP);
+			up_write(&policy->rwsem);
-		if (ret)
+			if (ret) {
-			pr_err("%s: Failed to stop governor for policy: %p\n",
+				pr_err("%s: Failed to stop governor for policy: %p\n",
-				__func__, policy);
+					__func__, policy);
-		else if (cpufreq_driver->suspend
+				continue;
-		    && cpufreq_driver->suspend(policy))
+			}
+		}
+		if (cpufreq_driver->suspend && cpufreq_driver->suspend(policy))
 			pr_err("%s: Failed to suspend driver: %p\n", __func__,
 				policy);
 	}
 	cpufreq_suspended = false;
-	if (!has_target())
+	if (!has_target() && !cpufreq_driver->resume)
 		return;
 	pr_debug("%s: Resuming Governors\n", __func__);
 		if (cpufreq_driver->resume && cpufreq_driver->resume(policy)) {
 			pr_err("%s: Failed to resume driver: %p\n", __func__,
 				policy);
-		} else {
+		} else if (has_target()) {
 			down_write(&policy->rwsem);
 			ret = cpufreq_start_governor(policy);
 			up_write(&policy->rwsem);

drivers/cpufreq/cpufreq_governor.c+2−6

 		wall_time = cur_wall_time - j_cdbs->prev_cpu_wall;
 		j_cdbs->prev_cpu_wall = cur_wall_time;
-		if (cur_idle_time <= j_cdbs->prev_cpu_idle) {
+		idle_time = cur_idle_time - j_cdbs->prev_cpu_idle;
-			idle_time = 0;
+		j_cdbs->prev_cpu_idle = cur_idle_time;
-		} else {
-			idle_time = cur_idle_time - j_cdbs->prev_cpu_idle;
-			j_cdbs->prev_cpu_idle = cur_idle_time;
-		}
 		if (ignore_nice) {
 			u64 cur_nice = kcpustat_cpu(j).cpustat[CPUTIME_NICE];

drivers/cpufreq/intel_pstate.c+23−8

 	}
 }
+static int intel_pstate_hwp_set_policy(struct cpufreq_policy *policy)
+{
+	if (hwp_active)
+		intel_pstate_hwp_set(policy->cpus);
+	return 0;
+}
 static void intel_pstate_hwp_set_online_cpus(void)
 {
 	get_online_cpus();
 			if (err)
 				goto skip_tar;
+			/* For level 1 and 2, bits[23:16] contain the ratio */
+			if (tdp_ctrl)
+				tdp_ratio >>= 16;
+			tdp_ratio &= 0xff; /* ratios are only 8 bits long */
 			if (tdp_ratio - 1 == tar) {
 				max_pstate = tar;
 				pr_debug("max_pstate=TAC %x\n", max_pstate);
 static inline int32_t get_avg_frequency(struct cpudata *cpu)
 {
-	return div64_u64(cpu->pstate.max_pstate_physical * cpu->sample.aperf *
+	return fp_toint(mul_fp(cpu->sample.core_pct_busy,
-		cpu->pstate.scaling, cpu->sample.mperf);
+			       int_tofp(cpu->pstate.max_pstate_physical *
+						cpu->pstate.scaling / 100)));
 }
 static inline int32_t get_target_pstate_use_cpu_load(struct cpudata *cpu)
 	int32_t core_busy, max_pstate, current_pstate, sample_ratio;
 	u64 duration_ns;
-	intel_pstate_calc_busy(cpu);
 	/*
 	 * core_busy is the ratio of actual performance to max
 	 * max_pstate is the max non turbo pstate available
 	if ((s64)delta_ns >= pid_params.sample_rate_ns) {
 		bool sample_taken = intel_pstate_sample(cpu, time);
-		if (sample_taken && !hwp_active)
+		if (sample_taken) {
-			intel_pstate_adjust_busy_pstate(cpu);
+			intel_pstate_calc_busy(cpu);
+			if (!hwp_active)
+				intel_pstate_adjust_busy_pstate(cpu);
+		}
 	}
 }
  out:
 	intel_pstate_set_update_util_hook(policy->cpu);
-	if (hwp_active)
+	intel_pstate_hwp_set_policy(policy);
-		intel_pstate_hwp_set(policy->cpus);
 	return 0;
 }
 	.flags		= CPUFREQ_CONST_LOOPS,
 	.verify		= intel_pstate_verify_policy,
 	.setpolicy	= intel_pstate_set_policy,
+	.resume		= intel_pstate_hwp_set_policy,
 	.get		= intel_pstate_get,
 	.init		= intel_pstate_cpu_init,
 	.stop_cpu	= intel_pstate_stop_cpu,

drivers/cpufreq/sti-cpufreq.c+4−0

 {
 	int ret;
+	if ((!of_machine_is_compatible("st,stih407")) &&
+		(!of_machine_is_compatible("st,stih410")))
+		return -ENODEV;
 	ddata.cpu = get_cpu_device(0);
 	if (!ddata.cpu) {
 		dev_err(ddata.cpu, "Failed to get device for CPU0\n");

drivers/cpuidle/cpuidle-arm.c+1−1

@@ -50,7 +50,7 @@ static int arm_enter_idle_state(struct cpuidle_device *dev, · 49 unmodified lines
50	* call the CPU ops suspend protocol with idle index as a	50	* call the CPU ops suspend protocol with idle index as a
51	* parameter.	51	* parameter.
52	*/	52	*/
53	arm_cpuidle_suspend(idx);	53	ret = arm_cpuidle_suspend(idx);
54		54
55	cpu_pm_exit();	55	cpu_pm_exit();
56	}	56	}

drivers/crypto/talitos.c+57−30

 		ptr->eptr = upper_32_bits(dma_addr);
 }
+static void copy_talitos_ptr(struct talitos_ptr *dst_ptr,
+			     struct talitos_ptr *src_ptr, bool is_sec1)
+{
+	dst_ptr->ptr = src_ptr->ptr;
+	if (!is_sec1)
+		dst_ptr->eptr = src_ptr->eptr;
+}
 static void to_talitos_ptr_len(struct talitos_ptr *ptr, unsigned int len,
 			       bool is_sec1)
 {
 	sg_count = dma_map_sg(dev, areq->src, edesc->src_nents ?: 1,
 			      (areq->src == areq->dst) ? DMA_BIDIRECTIONAL
 							   : DMA_TO_DEVICE);
 	/* hmac data */
 	desc->ptr[1].len = cpu_to_be16(areq->assoclen);
 	if (sg_count > 1 &&
 	    (ret = sg_to_link_tbl_offset(areq->src, sg_count, 0,
 					 areq->assoclen,
 					 &edesc->link_tbl[tbl_off])) > 1) {
-		tbl_off += ret;
 		to_talitos_ptr(&desc->ptr[1], edesc->dma_link_tbl + tbl_off *
 			       sizeof(struct talitos_ptr), 0);
 		desc->ptr[1].j_extent = DESC_PTR_LNKTBL_JUMP;
 		dma_sync_single_for_device(dev, edesc->dma_link_tbl,
 					   edesc->dma_len, DMA_BIDIRECTIONAL);
+		tbl_off += ret;
 	} else {
 		to_talitos_ptr(&desc->ptr[1], sg_dma_address(areq->src), 0);
 		desc->ptr[1].j_extent = 0;
 	if (edesc->desc.hdr & DESC_HDR_MODE1_MDEU_CICV)
 		sg_link_tbl_len += authsize;
-	if (sg_count > 1 &&
+	if (sg_count == 1) {
-	    (ret = sg_to_link_tbl_offset(areq->src, sg_count, areq->assoclen,
+		to_talitos_ptr(&desc->ptr[4], sg_dma_address(areq->src) +
-					 sg_link_tbl_len,
+			       areq->assoclen, 0);
-					 &edesc->link_tbl[tbl_off])) > 1) {
+	} else if ((ret = sg_to_link_tbl_offset(areq->src, sg_count,
-		tbl_off += ret;
+						areq->assoclen, sg_link_tbl_len,
+						&edesc->link_tbl[tbl_off])) >
+		   1) {
 		desc->ptr[4].j_extent |= DESC_PTR_LNKTBL_JUMP;
 		to_talitos_ptr(&desc->ptr[4], edesc->dma_link_tbl +
 					      tbl_off *
 		dma_sync_single_for_device(dev, edesc->dma_link_tbl,
 					   edesc->dma_len,
 					   DMA_BIDIRECTIONAL);
-	} else
+		tbl_off += ret;
-		to_talitos_ptr(&desc->ptr[4], sg_dma_address(areq->src), 0);
+	} else {
+		copy_talitos_ptr(&desc->ptr[4], &edesc->link_tbl[tbl_off], 0);
+	}
 	/* cipher out */
 	desc->ptr[5].len = cpu_to_be16(cryptlen);
 	edesc->icv_ool = false;
-	if (sg_count > 1 &&
+	if (sg_count == 1) {
-	    (sg_count = sg_to_link_tbl_offset(areq->dst, sg_count,
+		to_talitos_ptr(&desc->ptr[5], sg_dma_address(areq->dst) +
+			       areq->assoclen, 0);
+	} else if ((sg_count =
+			sg_to_link_tbl_offset(areq->dst, sg_count,
 					      areq->assoclen, cryptlen,
-					      &edesc->link_tbl[tbl_off])) >
+					      &edesc->link_tbl[tbl_off])) > 1) {
-	    1) {
 		struct talitos_ptr *tbl_ptr = &edesc->link_tbl[tbl_off];
 		to_talitos_ptr(&desc->ptr[5], edesc->dma_link_tbl +
 					   edesc->dma_len, DMA_BIDIRECTIONAL);
 		edesc->icv_ool = true;
-	} else
+	} else {
-		to_talitos_ptr(&desc->ptr[5], sg_dma_address(areq->dst), 0);
+		copy_talitos_ptr(&desc->ptr[5], &edesc->link_tbl[tbl_off], 0);
+	}
 	/* iv out */
 	map_single_talitos_ptr(dev, &desc->ptr[6], ivsize, ctx->iv,
 	struct talitos_alg_template algt;
 };
-static int talitos_cra_init(struct crypto_tfm *tfm)
+static int talitos_init_common(struct talitos_ctx *ctx,
+			       struct talitos_crypto_alg *talitos_alg)
 {
-	struct crypto_alg *alg = tfm->__crt_alg;
-	struct talitos_crypto_alg *talitos_alg;
-	struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
 	struct talitos_private *priv;
-	if ((alg->cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_AHASH)
-		talitos_alg = container_of(__crypto_ahash_alg(alg),
-					   struct talitos_crypto_alg,
-					   algt.alg.hash);
-	else
-		talitos_alg = container_of(alg, struct talitos_crypto_alg,
-					   algt.alg.crypto);
 	/* update context with ptr to dev */
 	ctx->dev = talitos_alg->dev;
 	return 0;
 }
+static int talitos_cra_init(struct crypto_tfm *tfm)
+{
+	struct crypto_alg *alg = tfm->__crt_alg;
+	struct talitos_crypto_alg *talitos_alg;
+	struct talitos_ctx *ctx = crypto_tfm_ctx(tfm);
+	if ((alg->cra_flags & CRYPTO_ALG_TYPE_MASK) == CRYPTO_ALG_TYPE_AHASH)
+		talitos_alg = container_of(__crypto_ahash_alg(alg),
+					   struct talitos_crypto_alg,
+					   algt.alg.hash);
+	else
+		talitos_alg = container_of(alg, struct talitos_crypto_alg,
+					   algt.alg.crypto);
+	return talitos_init_common(ctx, talitos_alg);
+}
 static int talitos_cra_init_aead(struct crypto_aead *tfm)
 {
-	talitos_cra_init(crypto_aead_tfm(tfm));
+	struct aead_alg *alg = crypto_aead_alg(tfm);
-	return 0;
+	struct talitos_crypto_alg *talitos_alg;
+	struct talitos_ctx *ctx = crypto_aead_ctx(tfm);
+	talitos_alg = container_of(alg, struct talitos_crypto_alg,
+				   algt.alg.aead);
+	return talitos_init_common(ctx, talitos_alg);
 }
 static int talitos_cra_init_ahash(struct crypto_tfm *tfm)

drivers/edac/i7core_edac.c+1−1

@@ -1866,7 +1866,7 @@ static int i7core_mce_check_error(struct notifier_block *nb, unsigned long val, · 1865 unmodified lines
1866		1866
1867	i7_dev = get_i7core_dev(mce->socketid);	1867	i7_dev = get_i7core_dev(mce->socketid);
1868	if (!i7_dev)	1868	if (!i7_dev)
1869	return NOTIFY_BAD;	1869	return NOTIFY_DONE;
1870		1870
1871	mci = i7_dev->mci;	1871	mci = i7_dev->mci;
1872	pvt = mci->pvt_info;	1872	pvt = mci->pvt_info;

drivers/edac/sb_edac.c+1−1

@@ -3168,7 +3168,7 @@ static int sbridge_mce_check_error(struct notifier_block *nb, unsigned long val, · 3167 unmodified lines
3168		3168
3169	mci = get_mci_for_node_id(mce->socketid);	3169	mci = get_mci_for_node_id(mce->socketid);
3170	if (!mci)	3170	if (!mci)
3171	return NOTIFY_BAD;	3171	return NOTIFY_DONE;
3172	pvt = mci->pvt_info;	3172	pvt = mci->pvt_info;
3173		3173
3174	/*	3174	/*

drivers/firmware/efi/vars.c+26−11

@@ -202,29 +202,44 @@ static const struct variable_validate variable_validate[] = { · 201 unmodified lines
202	{ NULL_GUID, "", NULL },	202	{ NULL_GUID, "", NULL },
203	};	203	};
204		204
		205	/*
		206	* Check if @var_name matches the pattern given in @match_name.
		207	*
		208	* @var_name: an array of @len non-NUL characters.
		209	* @match_name: a NUL-terminated pattern string, optionally ending in "*". A
		210	* final "*" character matches any trailing characters @var_name,
		211	* including the case when there are none left in @var_name.
		212	* @match: on output, the number of non-wildcard characters in @match_name
		213	* that @var_name matches, regardless of the return value.
		214	* @return: whether @var_name fully matches @match_name.
		215	*/
205	static bool	216	static bool
206	variable_matches(const char var_name, size_t len, const char match_name,	217	variable_matches(const char var_name, size_t len, const char match_name,
207	int *match)	218	int *match)
208	{	219	{
209	for (match = 0; ; (match)++) {	220	for (match = 0; ; (match)++) {
210	char c = match_name[*match];	221	char c = match_name[*match];
211	char u = var_name[*match];
212		222
213	/* Wildcard in the matching name means we've matched */	223	switch (c) {
214	if (c == '*')	224	case '*':
		225	/* Wildcard in @match_name means we've matched. */
215	return true;	226	return true;
216		227
217	/* Case sensitive match */	228	case '\0':
218	if (!c && *match == len)	229	/* @match_name has ended. Has @var_name too? */
219	return true;	230	return (*match == len);
220		231
221	if (c != u)	232	default:
		233	/*
		234	* We've reached a non-wildcard char in @match_name.
		235	* Continue only if there's an identical character in
		236	* @var_name.
		237	*/
		238	if (match < len && c == var_name[match])
		239	continue;
222	return false;	240	return false;
223		241	}
224	if (!c)
225	return true;
226	}	242	}
227	return true;
228	}	243	}
229		244
230	bool	245	bool

drivers/firmware/psci.c+1−1

@@ -360,7 +360,7 @@ static struct cpuidle_ops psci_cpuidle_ops __initdata = { · 359 unmodified lines
360	.init = psci_dt_cpu_init_idle,	360	.init = psci_dt_cpu_init_idle,
361	};	361	};
362		362
363	CPUIDLE_METHOD_OF_DECLARE(psci, "arm,psci", &psci_cpuidle_ops);	363	CPUIDLE_METHOD_OF_DECLARE(psci, "psci", &psci_cpuidle_ops);
364	#endif	364	#endif
365	#endif	365	#endif
366		366

drivers/firmware/qemu_fw_cfg.c+1−1

@@ -77,7 +77,7 @@ static inline u16 fw_cfg_sel_endianness(u16 key) · 76 unmodified lines
77	static inline void fw_cfg_read_blob(u16 key,	77	static inline void fw_cfg_read_blob(u16 key,
78	void *buf, loff_t pos, size_t count)	78	void *buf, loff_t pos, size_t count)
79	{	79	{
80	u32 glk;	80	u32 glk = -1U;
81	acpi_status status;	81	acpi_status status;
82		82
83	/* If we have ACPI, ensure mutual exclusion against any potential	83	/* If we have ACPI, ensure mutual exclusion against any potential

drivers/gpio/gpio-rcar.c+6−59

@@ -196,44 +196,6 @@ static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on) · 195 unmodified lines
196	return 0;	196	return 0;
197	}	197	}
198		198
199	static void gpio_rcar_irq_bus_lock(struct irq_data *d)
200	{
201	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
202	struct gpio_rcar_priv *p = gpiochip_get_data(gc);
203
204	pm_runtime_get_sync(&p->pdev->dev);
205	}
206
207	static void gpio_rcar_irq_bus_sync_unlock(struct irq_data *d)
208	{
209	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
210	struct gpio_rcar_priv *p = gpiochip_get_data(gc);
211
212	pm_runtime_put(&p->pdev->dev);
213	}
214
215
216	static int gpio_rcar_irq_request_resources(struct irq_data *d)
217	{
218	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
219	struct gpio_rcar_priv *p = gpiochip_get_data(gc);
220	int error;
221
222	error = pm_runtime_get_sync(&p->pdev->dev);
223	if (error < 0)
224	return error;
225
226	return 0;
227	}
228
229	static void gpio_rcar_irq_release_resources(struct irq_data *d)
230	{
231	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
232	struct gpio_rcar_priv *p = gpiochip_get_data(gc);
233
234	pm_runtime_put(&p->pdev->dev);
235	}
236
237	static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)	199	static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
238	{	200	{
239	struct gpio_rcar_priv *p = dev_id;	201	struct gpio_rcar_priv *p = dev_id;
@@ -280,32 +242,18 @@ static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip, · 40 unmodified lines
280		242
281	static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)	243	static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
282	{	244	{
283	struct gpio_rcar_priv *p = gpiochip_get_data(chip);	245	return pinctrl_request_gpio(chip->base + offset);
284	int error;
285
286	error = pm_runtime_get_sync(&p->pdev->dev);
287	if (error < 0)
288	return error;
289
290	error = pinctrl_request_gpio(chip->base + offset);
291	if (error)
292	pm_runtime_put(&p->pdev->dev);
293
294	return error;
295	}	246	}
296		247
297	static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)	248	static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
298	{	249	{
299	struct gpio_rcar_priv *p = gpiochip_get_data(chip);
300
301	pinctrl_free_gpio(chip->base + offset);	250	pinctrl_free_gpio(chip->base + offset);
302		251
303	/* Set the GPIO as an input to ensure that the next GPIO request won't	252	/*
		253	* Set the GPIO as an input to ensure that the next GPIO request won't
304	* drive the GPIO pin as an output.	254	* drive the GPIO pin as an output.
305	*/	255	*/
306	gpio_rcar_config_general_input_output_mode(chip, offset, false);	256	gpio_rcar_config_general_input_output_mode(chip, offset, false);
307
308	pm_runtime_put(&p->pdev->dev);
309	}	257	}
310		258
311	static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)	259	static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
@@ -452,6 +400,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) · 140 unmodified lines
452	}	400	}
453		401
454	pm_runtime_enable(dev);	402	pm_runtime_enable(dev);
		403	pm_runtime_get_sync(dev);
455		404
456	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);	405	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
457	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);	406	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@@ -488,10 +437,6 @@ static int gpio_rcar_probe(struct platform_device *pdev) · 30 unmodified lines
488	irq_chip->irq_unmask = gpio_rcar_irq_enable;	437	irq_chip->irq_unmask = gpio_rcar_irq_enable;
489	irq_chip->irq_set_type = gpio_rcar_irq_set_type;	438	irq_chip->irq_set_type = gpio_rcar_irq_set_type;
490	irq_chip->irq_set_wake = gpio_rcar_irq_set_wake;	439	irq_chip->irq_set_wake = gpio_rcar_irq_set_wake;
491	irq_chip->irq_bus_lock = gpio_rcar_irq_bus_lock;
492	irq_chip->irq_bus_sync_unlock = gpio_rcar_irq_bus_sync_unlock;
493	irq_chip->irq_request_resources = gpio_rcar_irq_request_resources;
494	irq_chip->irq_release_resources = gpio_rcar_irq_release_resources;
495	irq_chip->flags = IRQCHIP_SET_TYPE_MASKED \| IRQCHIP_MASK_ON_SUSPEND;	440	irq_chip->flags = IRQCHIP_SET_TYPE_MASKED \| IRQCHIP_MASK_ON_SUSPEND;
496		441
497	ret = gpiochip_add_data(gpio_chip, p);	442	ret = gpiochip_add_data(gpio_chip, p);
@@ -522,6 +467,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) · 24 unmodified lines
522	err1:	467	err1:
523	gpiochip_remove(gpio_chip);	468	gpiochip_remove(gpio_chip);
524	err0:	469	err0:
		470	pm_runtime_put(dev);
525	pm_runtime_disable(dev);	471	pm_runtime_disable(dev);
526	return ret;	472	return ret;
527	}	473	}
@@ -532,6 +478,7 @@ static int gpio_rcar_remove(struct platform_device *pdev) · 4 unmodified lines
532		478
533	gpiochip_remove(&p->gpio_chip);	479	gpiochip_remove(&p->gpio_chip);
534		480
		481	pm_runtime_put(&pdev->dev);
535	pm_runtime_disable(&pdev->dev);	482	pm_runtime_disable(&pdev->dev);
536	return 0;	483	return 0;
537	}	484	}

drivers/gpio/gpiolib-acpi.c+1−1

@@ -977,7 +977,7 @@ bool acpi_can_fallback_to_crs(struct acpi_device adev, const char con_id) · 976 unmodified lines
977	lookup = kmalloc(sizeof(*lookup), GFP_KERNEL);	977	lookup = kmalloc(sizeof(*lookup), GFP_KERNEL);
978	if (lookup) {	978	if (lookup) {
979	lookup->adev = adev;	979	lookup->adev = adev;
980	lookup->con_id = con_id;	980	lookup->con_id = kstrdup(con_id, GFP_KERNEL);
981	list_add_tail(&lookup->node, &acpi_crs_lookup_list);	981	list_add_tail(&lookup->node, &acpi_crs_lookup_list);
982	}	982	}
983	}	983	}

drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c+7−4

 	return amdgpu_atpx_priv.atpx_detected;
 }
-bool amdgpu_has_atpx_dgpu_power_cntl(void) {
-	return amdgpu_atpx_priv.atpx.functions.power_cntl;
-}
 /**
  * amdgpu_atpx_call - call an ATPX method
  *
  */
 static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
 {
+	/* make sure required functions are enabled */
+	/* dGPU power control is required */
+	if (atpx->functions.power_cntl == false) {
+		printk("ATPX dGPU power cntl not present, forcing\n");
+		atpx->functions.power_cntl = true;
+	}
 	if (atpx->functions.px_params) {
 		union acpi_object *info;
 		struct atpx_px_params output;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+1−7

 	"LAST",
 };
-#if defined(CONFIG_VGA_SWITCHEROO)
-bool amdgpu_has_atpx_dgpu_power_cntl(void);
-#else
-static inline bool amdgpu_has_atpx_dgpu_power_cntl(void) { return false; }
-#endif
 bool amdgpu_device_is_px(struct drm_device *dev)
 {
 	struct amdgpu_device *adev = dev->dev_private;
 	if (amdgpu_runtime_pm == 1)
 		runtime = true;
-	if (amdgpu_device_is_px(ddev) && amdgpu_has_atpx_dgpu_power_cntl())
+	if (amdgpu_device_is_px(ddev))
 		runtime = true;
 	vga_switcheroo_register_client(adev->pdev, &amdgpu_switcheroo_ops, runtime);
 	if (runtime)

drivers/gpu/drm/amd/amdgpu/amdgpu_object.c+1−0

@@ -541,6 +541,7 @@ int amdgpu_bo_set_metadata (struct amdgpu_bo bo, void metadata, · 540 unmodified lines
541	if (!metadata_size) {	541	if (!metadata_size) {
542	if (bo->metadata_size) {	542	if (bo->metadata_size) {
543	kfree(bo->metadata);	543	kfree(bo->metadata);
		544	bo->metadata = NULL;
544	bo->metadata_size = 0;	545	bo->metadata_size = 0;
545	}	546	}
546	return 0;	547	return 0;

drivers/gpu/drm/amd/amdgpu/atombios_encoders.c+4−0

 	    && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
 		adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
+	/* vertical FP must be at least 1 */
+	if (mode->crtc_vsync_start == mode->crtc_vdisplay)
+		adjusted_mode->crtc_vsync_start++;
 	/* get the native mode for scaling */
 	if (amdgpu_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT))
 		amdgpu_panel_mode_fixup(encoder, adjusted_mode);

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c+4−1

 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-	return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
+	if (amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS)
+		return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
+	else
+		return 0;
 }
 static int gmc_v7_0_sw_init(void *handle)

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c+4−1

 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-	return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
+	if (amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS)
+		return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
+	else
+		return 0;
 }
 #define mmMC_SEQ_MISC0_FIJI 0xA71

drivers/gpu/drm/drm_dp_mst_topology.c+20−0

 		req_payload.start_slot = cur_slots;
 		if (mgr->proposed_vcpis[i]) {
 			port = container_of(mgr->proposed_vcpis[i], struct drm_dp_mst_port, vcpi);
+			port = drm_dp_get_validated_port_ref(mgr, port);
+			if (!port) {
+				mutex_unlock(&mgr->payload_lock);
+				return -EINVAL;
+			}
 			req_payload.num_slots = mgr->proposed_vcpis[i]->num_slots;
 			req_payload.vcpi = mgr->proposed_vcpis[i]->vcpi;
 		} else {
 			mgr->payloads[i].payload_state = req_payload.payload_state;
 		}
 		cur_slots += req_payload.num_slots;
+		if (port)
+			drm_dp_put_port(port);
 	}
 	for (i = 0; i < mgr->max_payloads; i++) {
 	if (mgr->mst_primary) {
 		int sret;
+		u8 guid[16];
 		sret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE);
 		if (sret != DP_RECEIVER_CAP_SIZE) {
 			DRM_DEBUG_KMS("dpcd read failed - undocked during suspend?\n");
 			ret = -1;
 			goto out_unlock;
 		}
+		/* Some hubs forget their guids after they resume */
+		sret = drm_dp_dpcd_read(mgr->aux, DP_GUID, guid, 16);
+		if (sret != 16) {
+			DRM_DEBUG_KMS("dpcd read failed - undocked during suspend?\n");
+			ret = -1;
+			goto out_unlock;
+		}
+		drm_dp_check_mstb_guid(mgr->mst_primary, guid);
 		ret = 0;
 	} else
 		ret = -1;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c+18−13

 		goto fail;
 	}
+	/*
+	 * Set the GPU linear window to be at the end of the DMA window, where
+	 * the CMA area is likely to reside. This ensures that we are able to
+	 * map the command buffers while having the linear window overlap as
+	 * much RAM as possible, so we can optimize mappings for other buffers.
+	 *
+	 * For 3D cores only do this if MC2.0 is present, as with MC1.0 it leads
+	 * to different views of the memory on the individual engines.
+	 */
+	if (!(gpu->identity.features & chipFeatures_PIPE_3D) ||
+	    (gpu->identity.minor_features0 & chipMinorFeatures0_MC20)) {
+		u32 dma_mask = (u32)dma_get_required_mask(gpu->dev);
+		if (dma_mask < PHYS_OFFSET + SZ_2G)
+			gpu->memory_base = PHYS_OFFSET;
+		else
+			gpu->memory_base = dma_mask - SZ_2G + 1;
+	}
 	ret = etnaviv_hw_reset(gpu);
 	if (ret)
 		goto fail;
 {
 	struct device *dev = &pdev->dev;
 	struct etnaviv_gpu *gpu;
-	u32 dma_mask;
 	int err = 0;
 	gpu = devm_kzalloc(dev, sizeof(*gpu), GFP_KERNEL);
 	gpu->dev = &pdev->dev;
 	mutex_init(&gpu->lock);
-	/*
-	 * Set the GPU linear window to be at the end of the DMA window, where
-	 * the CMA area is likely to reside. This ensures that we are able to
-	 * map the command buffers while having the linear window overlap as
-	 * much RAM as possible, so we can optimize mappings for other buffers.
-	 */
-	dma_mask = (u32)dma_get_required_mask(dev);
-	if (dma_mask < PHYS_OFFSET + SZ_2G)
-		gpu->memory_base = PHYS_OFFSET;
-	else
-		gpu->memory_base = dma_mask - SZ_2G + 1;
 	/* Map registers: */
 	gpu->mmio = etnaviv_ioremap(pdev, NULL, dev_name(gpu->dev));
 	if (IS_ERR(gpu->mmio))

drivers/gpu/drm/i915/i915_drv.c+31−1

@@ -792,7 +792,7 @@ static int i915_drm_resume(struct drm_device *dev) · 791 unmodified lines
792	static int i915_drm_resume_early(struct drm_device *dev)	792	static int i915_drm_resume_early(struct drm_device *dev)
793	{	793	{
794	struct drm_i915_private *dev_priv = dev->dev_private;	794	struct drm_i915_private *dev_priv = dev->dev_private;
795	int ret = 0;	795	int ret;
796		796
797	/*	797	/*
798	* We have a resume ordering issue with the snd-hda driver also	798	* We have a resume ordering issue with the snd-hda driver also
@@ -803,6 +803,36 @@ static int i915_drm_resume_early(struct drm_device *dev) · 4 unmodified lines
803	* FIXME: This should be solved with a special hdmi sink device or	803	* FIXME: This should be solved with a special hdmi sink device or
804	* similar so that power domains can be employed.	804	* similar so that power domains can be employed.
805	*/	805	*/
		806
		807	/*
		808	* Note that we need to set the power state explicitly, since we
		809	* powered off the device during freeze and the PCI core won't power
		810	* it back up for us during thaw. Powering off the device during
		811	* freeze is not a hard requirement though, and during the
		812	* suspend/resume phases the PCI core makes sure we get here with the
		813	* device powered on. So in case we change our freeze logic and keep
		814	* the device powered we can also remove the following set power state
		815	* call.
		816	*/
		817	ret = pci_set_power_state(dev->pdev, PCI_D0);
		818	if (ret) {
		819	DRM_ERROR("failed to set PCI D0 power state (%d)\n", ret);
		820	goto out;
		821	}
		822
		823	/*
		824	* Note that pci_enable_device() first enables any parent bridge
		825	* device and only then sets the power state for this device. The
		826	* bridge enabling is a nop though, since bridge devices are resumed
		827	* first. The order of enabling power and enabling the device is
		828	* imposed by the PCI core as described above, so here we preserve the
		829	* same order for the freeze/thaw phases.
		830	*
		831	* TODO: eventually we should remove pci_disable_device() /
		832	* pci_enable_enable_device() from suspend/resume. Due to how they
		833	* depend on the device enable refcount we can't anyway depend on them
		834	* disabling/enabling the device.
		835	*/
806	if (pci_enable_device(dev->pdev)) {	836	if (pci_enable_device(dev->pdev)) {
807	ret = -EIO;	837	ret = -EIO;
808	goto out;	838	goto out;

drivers/gpu/drm/i915/i915_reg.h+8−1

 #define GEN6_RP_STATE_CAP	_MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5998)
 #define BXT_RP_STATE_CAP        _MMIO(0x138170)
-#define INTERVAL_1_28_US(us)	(((us) * 100) >> 7)
+/*
+ * Make these a multiple of magic 25 to avoid SNB (eg. Dell XPS
+ * 8300) freezing up around GPU hangs. Looks as if even
+ * scheduling/timer interrupts start misbehaving if the RPS
+ * EI/thresholds are "bad", leading to a very sluggish or even
+ * frozen machine.
+ */
+#define INTERVAL_1_28_US(us)	roundup(((us) * 100) >> 7, 25)
 #define INTERVAL_1_33_US(us)	(((us) * 3)   >> 2)
 #define INTERVAL_0_833_US(us)	(((us) * 6) / 5)
 #define GT_INTERVAL_FROM_US(dev_priv, us) (IS_GEN9(dev_priv) ? \

drivers/gpu/drm/i915/intel_ddi.c+13−9

@@ -443,9 +443,17 @@ void intel_prepare_ddi_buffer(struct intel_encoder *encoder) · 442 unmodified lines
443	} else if (IS_BROADWELL(dev_priv)) {	443	} else if (IS_BROADWELL(dev_priv)) {
444	ddi_translations_fdi = bdw_ddi_translations_fdi;	444	ddi_translations_fdi = bdw_ddi_translations_fdi;
445	ddi_translations_dp = bdw_ddi_translations_dp;	445	ddi_translations_dp = bdw_ddi_translations_dp;
446	ddi_translations_edp = bdw_ddi_translations_edp;	446
		447	if (dev_priv->edp_low_vswing) {
		448	ddi_translations_edp = bdw_ddi_translations_edp;
		449	n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_edp);
		450	} else {
		451	ddi_translations_edp = bdw_ddi_translations_dp;
		452	n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_dp);
		453	}
		454
447	ddi_translations_hdmi = bdw_ddi_translations_hdmi;	455	ddi_translations_hdmi = bdw_ddi_translations_hdmi;
448	n_edp_entries = ARRAY_SIZE(bdw_ddi_translations_edp);	456
449	n_dp_entries = ARRAY_SIZE(bdw_ddi_translations_dp);	457	n_dp_entries = ARRAY_SIZE(bdw_ddi_translations_dp);
450	n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);	458	n_hdmi_entries = ARRAY_SIZE(bdw_ddi_translations_hdmi);
451	hdmi_default_entry = 7;	459	hdmi_default_entry = 7;
@@ -3201,12 +3209,6 @@ void intel_ddi_get_config(struct intel_encoder *encoder, · 2749 unmodified lines
3201	intel_ddi_clock_get(encoder, pipe_config);	3209	intel_ddi_clock_get(encoder, pipe_config);
3202	}	3210	}
3203		3211
3204	static void intel_ddi_destroy(struct drm_encoder *encoder)
3205	{
3206	/* HDMI has nothing special to destroy, so we can go with this. */
3207	intel_dp_encoder_destroy(encoder);
3208	}
3209
3210	static bool intel_ddi_compute_config(struct intel_encoder *encoder,	3212	static bool intel_ddi_compute_config(struct intel_encoder *encoder,
3211	struct intel_crtc_state *pipe_config)	3213	struct intel_crtc_state *pipe_config)
3212	{	3214	{
@@ -3225,7 +3227,8 @@ static bool intel_ddi_compute_config(struct intel_encoder *encoder, · 12 unmodified lines
3225	}	3227	}
3226		3228
3227	static const struct drm_encoder_funcs intel_ddi_funcs = {	3229	static const struct drm_encoder_funcs intel_ddi_funcs = {
3228	.destroy = intel_ddi_destroy,	3230	.reset = intel_dp_encoder_reset,
		3231	.destroy = intel_dp_encoder_destroy,
3229	};	3232	};
3230		3233
3231	static struct intel_connector *	3234	static struct intel_connector *
@@ -3324,6 +3327,7 @@ void intel_ddi_init(struct drm_device *dev, enum port port) · 92 unmodified lines
3324	intel_encoder->post_disable = intel_ddi_post_disable;	3327	intel_encoder->post_disable = intel_ddi_post_disable;
3325	intel_encoder->get_hw_state = intel_ddi_get_hw_state;	3328	intel_encoder->get_hw_state = intel_ddi_get_hw_state;
3326	intel_encoder->get_config = intel_ddi_get_config;	3329	intel_encoder->get_config = intel_ddi_get_config;
		3330	intel_encoder->suspend = intel_dp_encoder_suspend;
3327		3331
3328	intel_dig_port->port = port;	3332	intel_dig_port->port = port;
3329	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &	3333	intel_dig_port->saved_port_bits = I915_READ(DDI_BUF_CTL(port)) &

drivers/gpu/drm/i915/intel_display.c+3−0

@@ -13351,6 +13351,9 @@ static int intel_atomic_prepare_commit(struct drm_device *dev, · 13350 unmodified lines
13351	}	13351	}
13352		13352
13353	for_each_crtc_in_state(state, crtc, crtc_state, i) {	13353	for_each_crtc_in_state(state, crtc, crtc_state, i) {
		13354	if (state->legacy_cursor_update)
		13355	continue;
		13356
13354	ret = intel_crtc_wait_for_pending_flips(crtc);	13357	ret = intel_crtc_wait_for_pending_flips(crtc);
13355	if (ret)	13358	if (ret)
13356	return ret;	13359	return ret;

drivers/gpu/drm/i915/intel_dp.c+2−2

@@ -4898,7 +4898,7 @@ void intel_dp_encoder_destroy(struct drm_encoder *encoder) · 4897 unmodified lines
4898	kfree(intel_dig_port);	4898	kfree(intel_dig_port);
4899	}	4899	}
4900		4900
4901	static void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder)	4901	void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder)
4902	{	4902	{
4903	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base);	4903	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base);
4904		4904
@@ -4940,7 +4940,7 @@ static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp) · 35 unmodified lines
4940	edp_panel_vdd_schedule_off(intel_dp);	4940	edp_panel_vdd_schedule_off(intel_dp);
4941	}	4941	}
4942		4942
4943	static void intel_dp_encoder_reset(struct drm_encoder *encoder)	4943	void intel_dp_encoder_reset(struct drm_encoder *encoder)
4944	{	4944	{
4945	struct intel_dp *intel_dp;	4945	struct intel_dp *intel_dp;
4946		4946

drivers/gpu/drm/i915/intel_drv.h+2−0

 void intel_dp_start_link_train(struct intel_dp *intel_dp);
 void intel_dp_stop_link_train(struct intel_dp *intel_dp);
 void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
+void intel_dp_encoder_reset(struct drm_encoder *encoder);
+void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
 void intel_dp_encoder_destroy(struct drm_encoder *encoder);
 int intel_dp_sink_crc(struct intel_dp *intel_dp, u8 *crc);
 bool intel_dp_compute_config(struct intel_encoder *encoder,

drivers/gpu/drm/i915/intel_hdmi.c+10−2

 				hdmi_to_dig_port(intel_hdmi));
 	}
-	if (!live_status)
+	if (!live_status) {
-		DRM_DEBUG_KMS("Live status not up!");
+		DRM_DEBUG_KMS("HDMI live status down\n");
+		/*
+		 * Live status register is not reliable on all intel platforms.
+		 * So consider live_status only for certain platforms, for
+		 * others, read EDID to determine presence of sink.
+		 */
+		if (INTEL_INFO(dev_priv)->gen < 7 || IS_IVYBRIDGE(dev_priv))
+			live_status = true;
+	}
 	intel_hdmi_unset_edid(connector);

drivers/gpu/drm/radeon/atombios_encoders.c+4−0

 	    && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
 		adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
+	/* vertical FP must be at least 1 */
+	if (mode->crtc_vsync_start == mode->crtc_vdisplay)
+		adjusted_mode->crtc_vsync_start++;
 	/* get the native mode for scaling */
 	if (radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) {
 		radeon_panel_mode_fixup(encoder, adjusted_mode);

drivers/gpu/drm/radeon/evergreen.c+153−1

@@ -2608,10 +2608,152 @@ static void evergreen_agp_enable(struct radeon_device *rdev) · 2607 unmodified lines
2608	WREG32(VM_CONTEXT1_CNTL, 0);	2608	WREG32(VM_CONTEXT1_CNTL, 0);
2609	}	2609	}
2610		2610
		2611	static const unsigned ni_dig_offsets[] =
		2612	{
		2613	NI_DIG0_REGISTER_OFFSET,
		2614	NI_DIG1_REGISTER_OFFSET,
		2615	NI_DIG2_REGISTER_OFFSET,
		2616	NI_DIG3_REGISTER_OFFSET,
		2617	NI_DIG4_REGISTER_OFFSET,
		2618	NI_DIG5_REGISTER_OFFSET
		2619	};
		2620
		2621	static const unsigned ni_tx_offsets[] =
		2622	{
		2623	NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1,
		2624	NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1,
		2625	NI_DCIO_UNIPHY2_UNIPHY_TX_CONTROL1,
		2626	NI_DCIO_UNIPHY3_UNIPHY_TX_CONTROL1,
		2627	NI_DCIO_UNIPHY4_UNIPHY_TX_CONTROL1,
		2628	NI_DCIO_UNIPHY5_UNIPHY_TX_CONTROL1
		2629	};
		2630
		2631	static const unsigned evergreen_dp_offsets[] =
		2632	{
		2633	EVERGREEN_DP0_REGISTER_OFFSET,
		2634	EVERGREEN_DP1_REGISTER_OFFSET,
		2635	EVERGREEN_DP2_REGISTER_OFFSET,
		2636	EVERGREEN_DP3_REGISTER_OFFSET,
		2637	EVERGREEN_DP4_REGISTER_OFFSET,
		2638	EVERGREEN_DP5_REGISTER_OFFSET
		2639	};
		2640
		2641
		2642	/*
		2643	* Assumption is that EVERGREEN_CRTC_MASTER_EN enable for requested crtc
		2644	* We go from crtc to connector and it is not relible since it
		2645	* should be an opposite direction .If crtc is enable then
		2646	* find the dig_fe which selects this crtc and insure that it enable.
		2647	* if such dig_fe is found then find dig_be which selects found dig_be and
		2648	* insure that it enable and in DP_SST mode.
		2649	* if UNIPHY_PLL_CONTROL1.enable then we should disconnect timing
		2650	* from dp symbols clocks .
		2651	*/
		2652	static bool evergreen_is_dp_sst_stream_enabled(struct radeon_device *rdev,
		2653	unsigned crtc_id, unsigned *ret_dig_fe)
		2654	{
		2655	unsigned i;
		2656	unsigned dig_fe;
		2657	unsigned dig_be;
		2658	unsigned dig_en_be;
		2659	unsigned uniphy_pll;
		2660	unsigned digs_fe_selected;
		2661	unsigned dig_be_mode;
		2662	unsigned dig_fe_mask;
		2663	bool is_enabled = false;
		2664	bool found_crtc = false;
		2665
		2666	/* loop through all running dig_fe to find selected crtc */
		2667	for (i = 0; i < ARRAY_SIZE(ni_dig_offsets); i++) {
		2668	dig_fe = RREG32(NI_DIG_FE_CNTL + ni_dig_offsets[i]);
		2669	if (dig_fe & NI_DIG_FE_CNTL_SYMCLK_FE_ON &&
		2670	crtc_id == NI_DIG_FE_CNTL_SOURCE_SELECT(dig_fe)) {
		2671	/* found running pipe */
		2672	found_crtc = true;
		2673	dig_fe_mask = 1 << i;
		2674	dig_fe = i;
		2675	break;
		2676	}
		2677	}
		2678
		2679	if (found_crtc) {
		2680	/* loop through all running dig_be to find selected dig_fe */
		2681	for (i = 0; i < ARRAY_SIZE(ni_dig_offsets); i++) {
		2682	dig_be = RREG32(NI_DIG_BE_CNTL + ni_dig_offsets[i]);
		2683	/* if dig_fe_selected by dig_be? */
		2684	digs_fe_selected = NI_DIG_BE_CNTL_FE_SOURCE_SELECT(dig_be);
		2685	dig_be_mode = NI_DIG_FE_CNTL_MODE(dig_be);
		2686	if (dig_fe_mask & digs_fe_selected &&
		2687	/* if dig_be in sst mode? */
		2688	dig_be_mode == NI_DIG_BE_DPSST) {
		2689	dig_en_be = RREG32(NI_DIG_BE_EN_CNTL +
		2690	ni_dig_offsets[i]);
		2691	uniphy_pll = RREG32(NI_DCIO_UNIPHY0_PLL_CONTROL1 +
		2692	ni_tx_offsets[i]);
		2693	/* dig_be enable and tx is running */
		2694	if (dig_en_be & NI_DIG_BE_EN_CNTL_ENABLE &&
		2695	dig_en_be & NI_DIG_BE_EN_CNTL_SYMBCLK_ON &&
		2696	uniphy_pll & NI_DCIO_UNIPHY0_PLL_CONTROL1_ENABLE) {
		2697	is_enabled = true;
		2698	*ret_dig_fe = dig_fe;
		2699	break;
		2700	}
		2701	}
		2702	}
		2703	}
		2704
		2705	return is_enabled;
		2706	}
		2707
		2708	/*
		2709	* Blank dig when in dp sst mode
		2710	* Dig ignores crtc timing
		2711	*/
		2712	static void evergreen_blank_dp_output(struct radeon_device *rdev,
		2713	unsigned dig_fe)
		2714	{
		2715	unsigned stream_ctrl;
		2716	unsigned fifo_ctrl;
		2717	unsigned counter = 0;
		2718
		2719	if (dig_fe >= ARRAY_SIZE(evergreen_dp_offsets)) {
		2720	DRM_ERROR("invalid dig_fe %d\n", dig_fe);
		2721	return;
		2722	}
		2723
		2724	stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
		2725	evergreen_dp_offsets[dig_fe]);
		2726	if (!(stream_ctrl & EVERGREEN_DP_VID_STREAM_CNTL_ENABLE)) {
		2727	DRM_ERROR("dig %d , should be enable\n", dig_fe);
		2728	return;
		2729	}
		2730
		2731	stream_ctrl &=~EVERGREEN_DP_VID_STREAM_CNTL_ENABLE;
		2732	WREG32(EVERGREEN_DP_VID_STREAM_CNTL +
		2733	evergreen_dp_offsets[dig_fe], stream_ctrl);
		2734
		2735	stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
		2736	evergreen_dp_offsets[dig_fe]);
		2737	while (counter < 32 && stream_ctrl & EVERGREEN_DP_VID_STREAM_STATUS) {
		2738	msleep(1);
		2739	counter++;
		2740	stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
		2741	evergreen_dp_offsets[dig_fe]);
		2742	}
		2743	if (counter >= 32 )
		2744	DRM_ERROR("counter exceeds %d\n", counter);
		2745
		2746	fifo_ctrl = RREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe]);
		2747	fifo_ctrl \|= EVERGREEN_DP_STEER_FIFO_RESET;
		2748	WREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe], fifo_ctrl);
		2749
		2750	}
		2751
2611	void evergreen_mc_stop(struct radeon_device rdev, struct evergreen_mc_save save)	2752	void evergreen_mc_stop(struct radeon_device rdev, struct evergreen_mc_save save)
2612	{	2753	{
2613	u32 crtc_enabled, tmp, frame_count, blackout;	2754	u32 crtc_enabled, tmp, frame_count, blackout;
2614	int i, j;	2755	int i, j;
		2756	unsigned dig_fe;
2615		2757
2616	if (!ASIC_IS_NODCE(rdev)) {	2758	if (!ASIC_IS_NODCE(rdev)) {
2617	save->vga_render_control = RREG32(VGA_RENDER_CONTROL);	2759	save->vga_render_control = RREG32(VGA_RENDER_CONTROL);
@@ -2651,7 +2793,17 @@ void evergreen_mc_stop(struct radeon_device rdev, struct evergreen_mc_save sav · 33 unmodified lines
2651	break;	2793	break;
2652	udelay(1);	2794	udelay(1);
2653	}	2795	}
2654		2796	/we should disable dig if it drives dp sst/
		2797	/but we are in radeon_device_init and the topology is unknown/
		2798	/and it is available after radeon_modeset_init/
		2799	/the following method radeon_atom_encoder_dpms_dig/
		2800	/does the job if we initialize it properly/
		2801	/for now we do it this manually/
		2802	/**/
		2803	if (ASIC_IS_DCE5(rdev) &&
		2804	evergreen_is_dp_sst_stream_enabled(rdev, i ,&dig_fe))
		2805	evergreen_blank_dp_output(rdev, dig_fe);
		2806	/we could remove 6 lines below/
2655	/* XXX this is a hack to avoid strange behavior with EFI on certain systems */	2807	/* XXX this is a hack to avoid strange behavior with EFI on certain systems */
2656	WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);	2808	WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
2657	tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);	2809	tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);

drivers/gpu/drm/radeon/evergreen_reg.h+46−0

@@ -250,8 +250,43 @@ · 249 unmodified lines
250		250
251	/* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */	251	/* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */
252	#define EVERGREEN_HDMI_BASE 0x7030	252	#define EVERGREEN_HDMI_BASE 0x7030
		253	/DIG block/
		254	#define NI_DIG0_REGISTER_OFFSET (0x7000 - 0x7000)
		255	#define NI_DIG1_REGISTER_OFFSET (0x7C00 - 0x7000)
		256	#define NI_DIG2_REGISTER_OFFSET (0x10800 - 0x7000)
		257	#define NI_DIG3_REGISTER_OFFSET (0x11400 - 0x7000)
		258	#define NI_DIG4_REGISTER_OFFSET (0x12000 - 0x7000)
		259	#define NI_DIG5_REGISTER_OFFSET (0x12C00 - 0x7000)
		260
		261
		262	#define NI_DIG_FE_CNTL 0x7000
		263	# define NI_DIG_FE_CNTL_SOURCE_SELECT(x) ((x) & 0x3)
		264	# define NI_DIG_FE_CNTL_SYMCLK_FE_ON (1<<24)
		265
		266
		267	#define NI_DIG_BE_CNTL 0x7140
		268	# define NI_DIG_BE_CNTL_FE_SOURCE_SELECT(x) (((x) >> 8 ) & 0x3F)
		269	# define NI_DIG_FE_CNTL_MODE(x) (((x) >> 16) & 0x7 )
		270
		271	#define NI_DIG_BE_EN_CNTL 0x7144
		272	# define NI_DIG_BE_EN_CNTL_ENABLE (1 << 0)
		273	# define NI_DIG_BE_EN_CNTL_SYMBCLK_ON (1 << 8)
		274	# define NI_DIG_BE_DPSST 0
253		275
254	/* Display Port block */	276	/* Display Port block */
		277	#define EVERGREEN_DP0_REGISTER_OFFSET (0x730C - 0x730C)
		278	#define EVERGREEN_DP1_REGISTER_OFFSET (0x7F0C - 0x730C)
		279	#define EVERGREEN_DP2_REGISTER_OFFSET (0x10B0C - 0x730C)
		280	#define EVERGREEN_DP3_REGISTER_OFFSET (0x1170C - 0x730C)
		281	#define EVERGREEN_DP4_REGISTER_OFFSET (0x1230C - 0x730C)
		282	#define EVERGREEN_DP5_REGISTER_OFFSET (0x12F0C - 0x730C)
		283
		284
		285	#define EVERGREEN_DP_VID_STREAM_CNTL 0x730C
		286	# define EVERGREEN_DP_VID_STREAM_CNTL_ENABLE (1 << 0)
		287	# define EVERGREEN_DP_VID_STREAM_STATUS (1 <<16)
		288	#define EVERGREEN_DP_STEER_FIFO 0x7310
		289	# define EVERGREEN_DP_STEER_FIFO_RESET (1 << 0)
255	#define EVERGREEN_DP_SEC_CNTL 0x7280	290	#define EVERGREEN_DP_SEC_CNTL 0x7280
256	# define EVERGREEN_DP_SEC_STREAM_ENABLE (1 << 0)	291	# define EVERGREEN_DP_SEC_STREAM_ENABLE (1 << 0)
257	# define EVERGREEN_DP_SEC_ASP_ENABLE (1 << 4)	292	# define EVERGREEN_DP_SEC_ASP_ENABLE (1 << 4)
@@ -266,4 +301,15 @@ · 8 unmodified lines
266	# define EVERGREEN_DP_SEC_N_BASE_MULTIPLE(x) (((x) & 0xf) << 24)	301	# define EVERGREEN_DP_SEC_N_BASE_MULTIPLE(x) (((x) & 0xf) << 24)
267	# define EVERGREEN_DP_SEC_SS_EN (1 << 28)	302	# define EVERGREEN_DP_SEC_SS_EN (1 << 28)
268		303
		304	/DCIO_UNIPHY block/
		305	#define NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1 (0x6600 -0x6600)
		306	#define NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1 (0x6640 -0x6600)
		307	#define NI_DCIO_UNIPHY2_UNIPHY_TX_CONTROL1 (0x6680 - 0x6600)
		308	#define NI_DCIO_UNIPHY3_UNIPHY_TX_CONTROL1 (0x66C0 - 0x6600)
		309	#define NI_DCIO_UNIPHY4_UNIPHY_TX_CONTROL1 (0x6700 - 0x6600)
		310	#define NI_DCIO_UNIPHY5_UNIPHY_TX_CONTROL1 (0x6740 - 0x6600)
		311
		312	#define NI_DCIO_UNIPHY0_PLL_CONTROL1 0x6618
		313	# define NI_DCIO_UNIPHY0_PLL_CONTROL1_ENABLE (1 << 0)
		314
269	#endif	315	#endif

drivers/gpu/drm/ttm/ttm_bo.c+4−13

 void ttm_bo_move_to_lru_tail(struct ttm_buffer_object *bo)
 {
-	struct ttm_bo_device *bdev = bo->bdev;
+	int put_count = 0;
-	struct ttm_mem_type_manager *man;
 	lockdep_assert_held(&bo->resv->lock.base);
-	if (bo->mem.placement & TTM_PL_FLAG_NO_EVICT) {
+	put_count = ttm_bo_del_from_lru(bo);
-		list_del_init(&bo->swap);
+	ttm_bo_list_ref_sub(bo, put_count, true);
-		list_del_init(&bo->lru);
+	ttm_bo_add_to_lru(bo);
-	} else {
-		if (bo->ttm && !(bo->ttm->page_flags & TTM_PAGE_FLAG_SG))
-			list_move_tail(&bo->swap, &bo->glob->swap_lru);
-		man = &bdev->man[bo->mem.mem_type];
-		list_move_tail(&bo->lru, &man->lru);
-	}
 }
 EXPORT_SYMBOL(ttm_bo_move_to_lru_tail);

drivers/gpu/drm/virtio/virtgpu_display.c+12−0

@@ -267,11 +267,23 @@ static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc, · 266 unmodified lines
267	return 0;	267	return 0;
268	}	268	}
269		269
		270	static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,
		271	struct drm_crtc_state *old_state)
		272	{
		273	unsigned long flags;
		274
		275	spin_lock_irqsave(&crtc->dev->event_lock, flags);
		276	if (crtc->state->event)
		277	drm_crtc_send_vblank_event(crtc, crtc->state->event);
		278	spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
		279	}
		280
270	static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {	281	static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
271	.enable = virtio_gpu_crtc_enable,	282	.enable = virtio_gpu_crtc_enable,
272	.disable = virtio_gpu_crtc_disable,	283	.disable = virtio_gpu_crtc_disable,
273	.mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,	284	.mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
274	.atomic_check = virtio_gpu_crtc_atomic_check,	285	.atomic_check = virtio_gpu_crtc_atomic_check,
		286	.atomic_flush = virtio_gpu_crtc_atomic_flush,
275	};	287	};
276		288
277	static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,	289	static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c+5−5

@@ -3293,19 +3293,19 @@ static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = { · 3292 unmodified lines
3293	&vmw_cmd_dx_cid_check, true, false, true),	3293	&vmw_cmd_dx_cid_check, true, false, true),
3294	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query,	3294	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query,
3295	true, false, true),	3295	true, false, true),
3296	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_ok,	3296	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_dx_cid_check,
3297	true, false, true),	3297	true, false, true),
3298	VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query,	3298	VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query,
3299	true, false, true),	3299	true, false, true),
3300	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET,	3300	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET,
3301	&vmw_cmd_ok, true, false, true),	3301	&vmw_cmd_dx_cid_check, true, false, true),
3302	VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_ok,	3302	VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_dx_cid_check,
3303	true, false, true),	3303	true, false, true),
3304	VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_ok,	3304	VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_dx_cid_check,
3305	true, false, true),	3305	true, false, true),
3306	VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid,	3306	VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid,
3307	true, false, true),	3307	true, false, true),
3308	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_invalid,	3308	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_dx_cid_check,
3309	true, false, true),	3309	true, false, true),
3310	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check,	3310	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check,
3311	true, false, true),	3311	true, false, true),

drivers/gpu/drm/vmwgfx/vmwgfx_fb.c+3−3

@@ -573,9 +573,9 @@ static int vmw_fb_set_par(struct fb_info *info) · 572 unmodified lines
573	mode = old_mode;	573	mode = old_mode;
574	old_mode = NULL;	574	old_mode = NULL;
575	} else if (!vmw_kms_validate_mode_vram(vmw_priv,	575	} else if (!vmw_kms_validate_mode_vram(vmw_priv,
576	mode->hdisplay *	576	mode->hdisplay *
577	(var->bits_per_pixel + 7) / 8,	577	DIV_ROUND_UP(var->bits_per_pixel, 8),
578	mode->vdisplay)) {	578	mode->vdisplay)) {
579	drm_mode_destroy(vmw_priv->dev, mode);	579	drm_mode_destroy(vmw_priv->dev, mode);
580	return -EINVAL;	580	return -EINVAL;
581	}	581	}

drivers/gpu/ipu-v3/ipu-common.c+6−1

 			goto err_register;
 		}
-		pdev->dev.of_node = of_node;
 		pdev->dev.parent = dev;
 		ret = platform_device_add_data(pdev, &reg->pdata,
 			platform_device_put(pdev);
 			goto err_register;
 		}
+		/*
+		 * Set of_node only after calling platform_device_add. Otherwise
+		 * the platform:imx-ipuv3-crtc modalias won't be used.
+		 */
+		pdev->dev.of_node = of_node;
 	}
 	return 0;

drivers/hid/hid-ids.h+1−0

@@ -259,6 +259,7 @@ · 258 unmodified lines
259	#define USB_DEVICE_ID_CORSAIR_K90 0x1b02	259	#define USB_DEVICE_ID_CORSAIR_K90 0x1b02
260		260
261	#define USB_VENDOR_ID_CREATIVELABS 0x041e	261	#define USB_VENDOR_ID_CREATIVELABS 0x041e
		262	#define USB_DEVICE_ID_CREATIVE_SB_OMNI_SURROUND_51 0x322c
262	#define USB_DEVICE_ID_PRODIKEYS_PCMIDI 0x2801	263	#define USB_DEVICE_ID_PRODIKEYS_PCMIDI 0x2801
263		264
264	#define USB_VENDOR_ID_CVTOUCH 0x1ff7	265	#define USB_VENDOR_ID_CVTOUCH 0x1ff7

drivers/hid/usbhid/hid-quirks.c+1−0

@@ -71,6 +71,7 @@ static const struct hid_blacklist { · 70 unmodified lines
71	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK, HID_QUIRK_NOGET },	71	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK, HID_QUIRK_NOGET },
72	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_AXIS_295, HID_QUIRK_NOGET },	72	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_AXIS_295, HID_QUIRK_NOGET },
73	{ USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE, HID_QUIRK_ALWAYS_POLL },	73	{ USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE, HID_QUIRK_ALWAYS_POLL },
		74	{ USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_CREATIVE_SB_OMNI_SURROUND_51, HID_QUIRK_NOGET },
74	{ USB_VENDOR_ID_DMI, USB_DEVICE_ID_DMI_ENC, HID_QUIRK_NOGET },	75	{ USB_VENDOR_ID_DMI, USB_DEVICE_ID_DMI_ENC, HID_QUIRK_NOGET },
75	{ USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_WIIU, HID_QUIRK_MULTI_INPUT },	76	{ USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_WIIU, HID_QUIRK_MULTI_INPUT },
76	{ USB_VENDOR_ID_ELAN, HID_ANY_ID, HID_QUIRK_ALWAYS_POLL },	77	{ USB_VENDOR_ID_ELAN, HID_ANY_ID, HID_QUIRK_ALWAYS_POLL },

drivers/hid/wacom_wac.c+6−0

 		wacom->tool[idx] = wacom_intuos_get_tool_type(wacom->id[idx]);
+		wacom->shared->stylus_in_proximity = true;
 		return 1;
 	}
 	{ "Wacom Intuos PT M 2", 21600, 13500, 2047, 63,
 	  INTUOSHT2, WACOM_INTUOS_RES, WACOM_INTUOS_RES, .touch_max = 16,
 	  .check_for_hid_type = true, .hid_type = HID_TYPE_USBNONE };
+static const struct wacom_features wacom_features_0x343 =
+	{ "Wacom DTK1651", 34616, 19559, 1023, 0,
+	  DTUS, WACOM_INTUOS_RES, WACOM_INTUOS_RES, 4,
+	  WACOM_DTU_OFFSET, WACOM_DTU_OFFSET };
 static const struct wacom_features wacom_features_HID_ANY_ID =
 	{ "Wacom HID", .type = HID_GENERIC };
 	{ USB_DEVICE_WACOM(0x33C) },
 	{ USB_DEVICE_WACOM(0x33D) },
 	{ USB_DEVICE_WACOM(0x33E) },
+	{ USB_DEVICE_WACOM(0x343) },
 	{ USB_DEVICE_WACOM(0x4001) },
 	{ USB_DEVICE_WACOM(0x4004) },
 	{ USB_DEVICE_WACOM(0x5000) },

drivers/hv/ring_buffer.c+20−6

  *    there is room for the producer to send the pending packet.
  */
-static bool hv_need_to_signal_on_read(u32 prev_write_sz,
+static bool hv_need_to_signal_on_read(struct hv_ring_buffer_info *rbi)
-				      struct hv_ring_buffer_info *rbi)
 {
 	u32 cur_write_sz;
 	u32 r_size;
-	u32 write_loc = rbi->ring_buffer->write_index;
+	u32 write_loc;
 	u32 read_loc = rbi->ring_buffer->read_index;
-	u32 pending_sz = rbi->ring_buffer->pending_send_sz;
+	u32 pending_sz;
+	/*
+	 * Issue a full memory barrier before making the signaling decision.
+	 * Here is the reason for having this barrier:
+	 * If the reading of the pend_sz (in this function)
+	 * were to be reordered and read before we commit the new read
+	 * index (in the calling function)  we could
+	 * have a problem. If the host were to set the pending_sz after we
+	 * have sampled pending_sz and go to sleep before we commit the
+	 * read index, we could miss sending the interrupt. Issue a full
+	 * memory barrier to address this.
+	 */
+	mb();
+	pending_sz = rbi->ring_buffer->pending_send_sz;
+	write_loc = rbi->ring_buffer->write_index;
 	/* If the other end is not blocked on write don't bother. */
 	if (pending_sz == 0)
 		return false;
 	cur_write_sz = write_loc >= read_loc ? r_size - (write_loc - read_loc) :
 			read_loc - write_loc;
-	if ((prev_write_sz < pending_sz) && (cur_write_sz >= pending_sz))
+	if (cur_write_sz >= pending_sz)
 		return true;
 	return false;
 	/* Update the read index */
 	hv_set_next_read_location(inring_info, next_read_location);
-	*signal = hv_need_to_signal_on_read(bytes_avail_towrite, inring_info);
+	*signal = hv_need_to_signal_on_read(inring_info);
 	return ret;
 }

drivers/i2c/busses/Kconfig+2−2

@@ -975,10 +975,10 @@ config I2C_XLR · 974 unmodified lines
975		975
976	config I2C_XLP9XX	976	config I2C_XLP9XX
977	tristate "XLP9XX I2C support"	977	tristate "XLP9XX I2C support"
978	depends on CPU_XLP \|\| COMPILE_TEST	978	depends on CPU_XLP \|\| ARCH_VULCAN \|\| COMPILE_TEST
979	help	979	help
980	This driver enables support for the on-chip I2C interface of	980	This driver enables support for the on-chip I2C interface of
981	the Broadcom XLP9xx/XLP5xx MIPS processors.	981	the Broadcom XLP9xx/XLP5xx MIPS and Vulcan ARM64 processors.
982		982
983	This driver can also be built as a module. If so, the module will	983	This driver can also be built as a module. If so, the module will
984	be called i2c-xlp9xx.	984	be called i2c-xlp9xx.

drivers/i2c/busses/i2c-cpm.c+2−2

@@ -116,8 +116,8 @@ struct cpm_i2c { · 115 unmodified lines
116	cbd_t __iomem *rbase;	116	cbd_t __iomem *rbase;
117	u_char *txbuf[CPM_MAXBD];	117	u_char *txbuf[CPM_MAXBD];
118	u_char *rxbuf[CPM_MAXBD];	118	u_char *rxbuf[CPM_MAXBD];
119	u32 txdma[CPM_MAXBD];	119	dma_addr_t txdma[CPM_MAXBD];
120	u32 rxdma[CPM_MAXBD];	120	dma_addr_t rxdma[CPM_MAXBD];
121	};	121	};
122		122
123	static irqreturn_t cpm_i2c_interrupt(int irq, void *dev_id)	123	static irqreturn_t cpm_i2c_interrupt(int irq, void *dev_id)

drivers/i2c/busses/i2c-exynos5.c+19−5

 		return -EIO;
 	}
-	clk_prepare_enable(i2c->clk);
+	ret = clk_enable(i2c->clk);
+	if (ret)
+		return ret;
 	for (i = 0; i < num; i++, msgs++) {
 		stop = (i == num - 1);
 	}
  out:
-	clk_disable_unprepare(i2c->clk);
+	clk_disable(i2c->clk);
 	return ret;
 }
 		return -ENOENT;
 	}
-	clk_prepare_enable(i2c->clk);
+	ret = clk_prepare_enable(i2c->clk);
+	if (ret)
+		return ret;
 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
 	platform_set_drvdata(pdev, i2c);
+	clk_disable(i2c->clk);
+	return 0;
  err_clk:
 	clk_disable_unprepare(i2c->clk);
 	return ret;
 	i2c_del_adapter(&i2c->adap);
+	clk_unprepare(i2c->clk);
 	return 0;
 }
 	i2c->suspended = 1;
+	clk_unprepare(i2c->clk);
 	return 0;
 }
 	struct exynos5_i2c *i2c = platform_get_drvdata(pdev);
 	int ret = 0;
-	clk_prepare_enable(i2c->clk);
+	ret = clk_prepare_enable(i2c->clk);
+	if (ret)
+		return ret;
 	ret = exynos5_hsi2c_clock_setup(i2c);
 	if (ret) {
 	}
 	exynos5_i2c_init(i2c);
-	clk_disable_unprepare(i2c->clk);
+	clk_disable(i2c->clk);
 	i2c->suspended = 0;
 	return 0;

drivers/i2c/busses/i2c-ismt.c+2−0

 /* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
 #define PCI_DEVICE_ID_INTEL_S1200_SMT0	0x0c59
 #define PCI_DEVICE_ID_INTEL_S1200_SMT1	0x0c5a
+#define PCI_DEVICE_ID_INTEL_DNV_SMT	0x19ac
 #define PCI_DEVICE_ID_INTEL_AVOTON_SMT	0x1f15
 #define ISMT_DESC_ENTRIES	2	/* number of descriptor entries */
 static const struct pci_device_id ismt_ids[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) },
 	{ 0, }
 };

drivers/i2c/busses/i2c-rk3x.c+1−0

@@ -855,6 +855,7 @@ static struct rk3x_i2c_soc_data soc_data[3] = { · 854 unmodified lines
855	static const struct of_device_id rk3x_i2c_match[] = {	855	static const struct of_device_id rk3x_i2c_match[] = {
856	{ .compatible = "rockchip,rk3066-i2c", .data = (void *)&soc_data[0] },	856	{ .compatible = "rockchip,rk3066-i2c", .data = (void *)&soc_data[0] },
857	{ .compatible = "rockchip,rk3188-i2c", .data = (void *)&soc_data[1] },	857	{ .compatible = "rockchip,rk3188-i2c", .data = (void *)&soc_data[1] },
		858	{ .compatible = "rockchip,rk3228-i2c", .data = (void *)&soc_data[2] },
858	{ .compatible = "rockchip,rk3288-i2c", .data = (void *)&soc_data[2] },	859	{ .compatible = "rockchip,rk3288-i2c", .data = (void *)&soc_data[2] },
859	{},	860	{},
860	};	861	};

drivers/iio/adc/at91-sama5d2_adc.c+2−0

@@ -451,6 +451,8 @@ static int at91_adc_probe(struct platform_device *pdev) · 450 unmodified lines
451	if (ret)	451	if (ret)
452	goto vref_disable;	452	goto vref_disable;
453		453
		454	platform_set_drvdata(pdev, indio_dev);
		455
454	ret = iio_device_register(indio_dev);	456	ret = iio_device_register(indio_dev);
455	if (ret < 0)	457	if (ret < 0)
456	goto per_clk_disable_unprepare;	458	goto per_clk_disable_unprepare;

drivers/iio/imu/inv_mpu6050/inv_mpu_i2c.c+27−3

 	return 0;
 }
+static const char *inv_mpu_match_acpi_device(struct device *dev, int *chip_id)
+{
+	const struct acpi_device_id *id;
+	id = acpi_match_device(dev->driver->acpi_match_table, dev);
+	if (!id)
+		return NULL;
+	*chip_id = (int)id->driver_data;
+	return dev_name(dev);
+}
 /**
  *  inv_mpu_probe() - probe function.
  *  @client:          i2c client.
 			 const struct i2c_device_id *id)
 {
 	struct inv_mpu6050_state *st;
-	int result;
+	int result, chip_type;
-	const char *name = id ? id->name : NULL;
 	struct regmap *regmap;
+	const char *name;
 	if (!i2c_check_functionality(client->adapter,
 				     I2C_FUNC_SMBUS_I2C_BLOCK))
 		return -EOPNOTSUPP;
+	if (id) {
+		chip_type = (int)id->driver_data;
+		name = id->name;
+	} else if (ACPI_HANDLE(&client->dev)) {
+		name = inv_mpu_match_acpi_device(&client->dev, &chip_type);
+		if (!name)
+			return -ENODEV;
+	} else {
+		return -ENOSYS;
+	}
 	regmap = devm_regmap_init_i2c(client, &inv_mpu_regmap_config);
 	if (IS_ERR(regmap)) {
 		dev_err(&client->dev, "Failed to register i2c regmap %d\n",
 	}
 	result = inv_mpu_core_probe(regmap, client->irq, name,
-				    NULL, id->driver_data);
+				    NULL, chip_type);
 	if (result < 0)
 		return result;

drivers/iio/imu/inv_mpu6050/inv_mpu_spi.c+2−1

 	struct regmap *regmap;
 	const struct spi_device_id *id = spi_get_device_id(spi);
 	const char *name = id ? id->name : NULL;
+	const int chip_type = id ? id->driver_data : 0;
 	regmap = devm_regmap_init_spi(spi, &inv_mpu_regmap_config);
 	if (IS_ERR(regmap)) {
 	}
 	return inv_mpu_core_probe(regmap, spi->irq, name,
-				  inv_mpu_i2c_disable, id->driver_data);
+				  inv_mpu_i2c_disable, chip_type);
 }
 static int inv_mpu_remove(struct spi_device *spi)

drivers/iio/magnetometer/ak8975.c+3−3

 	int rc;
 	int irq;
+	init_waitqueue_head(&data->data_ready_queue);
+	clear_bit(0, &data->flags);
 	if (client->irq)
 		irq = client->irq;
 	else
 		return rc;
 	}
-	init_waitqueue_head(&data->data_ready_queue);
-	clear_bit(0, &data->flags);
 	data->eoc_irq = irq;
 	return rc;
 	int eoc_gpio;
 	int err;
 	const char *name = NULL;
-	enum asahi_compass_chipset chipset;
+	enum asahi_compass_chipset chipset = AK_MAX_TYPE;
 	/* Grab and set up the supplied GPIO. */
 	if (client->dev.platform_data)

drivers/infiniband/core/cache.c+2−1

@@ -691,7 +691,8 @@ void ib_cache_gid_set_default_gid(struct ib_device *ib_dev, u8 port, · 690 unmodified lines
691	NULL);	691	NULL);
692		692
693	/* Coudn't find default GID location */	693	/* Coudn't find default GID location */
694	WARN_ON(ix < 0);	694	if (WARN_ON(ix < 0))
		695	goto release;
695		696
696	zattr_type.gid_type = gid_type;	697	zattr_type.gid_type = gid_type;
697		698

drivers/infiniband/core/ucm.c+4−0

 #include <asm/uaccess.h>
+#include <rdma/ib.h>
 #include <rdma/ib_cm.h>
 #include <rdma/ib_user_cm.h>
 #include <rdma/ib_marshall.h>
 	struct ib_ucm_cmd_hdr hdr;
 	ssize_t result;
+	if (WARN_ON_ONCE(!ib_safe_file_access(filp)))
+		return -EACCES;
 	if (len < sizeof(hdr))
 		return -EINVAL;

drivers/infiniband/core/ucma.c+3−0

@@ -1574,6 +1574,9 @@ static ssize_t ucma_write(struct file filp, const char __user buf, · 1573 unmodified lines
1574	struct rdma_ucm_cmd_hdr hdr;	1574	struct rdma_ucm_cmd_hdr hdr;
1575	ssize_t ret;	1575	ssize_t ret;
1576		1576
		1577	if (WARN_ON_ONCE(!ib_safe_file_access(filp)))
		1578	return -EACCES;
		1579
1577	if (len < sizeof(hdr))	1580	if (len < sizeof(hdr))
1578	return -EINVAL;	1581	return -EINVAL;
1579		1582

drivers/infiniband/core/uverbs_main.c+5−0

 #include <asm/uaccess.h>
+#include <rdma/ib.h>
 #include "uverbs.h"
 MODULE_AUTHOR("Roland Dreier");
 	int srcu_key;
 	ssize_t ret;
+	if (WARN_ON_ONCE(!ib_safe_file_access(filp)))
+		return -EACCES;
 	if (count < sizeof hdr)
 		return -EINVAL;

drivers/infiniband/core/verbs.c+2−1

@@ -1860,6 +1860,7 @@ EXPORT_SYMBOL(ib_drain_rq); · 1859 unmodified lines
1860	void ib_drain_qp(struct ib_qp *qp)	1860	void ib_drain_qp(struct ib_qp *qp)
1861	{	1861	{
1862	ib_drain_sq(qp);	1862	ib_drain_sq(qp);
1863	ib_drain_rq(qp);	1863	if (!qp->srq)
		1864	ib_drain_rq(qp);
1864	}	1865	}
1865	EXPORT_SYMBOL(ib_drain_qp);	1866	EXPORT_SYMBOL(ib_drain_qp);

drivers/infiniband/hw/cxgb3/iwch_provider.c+2−0

@@ -1390,6 +1390,8 @@ int iwch_register_device(struct iwch_dev *dev) · 1389 unmodified lines
1390	dev->ibdev.iwcm->add_ref = iwch_qp_add_ref;	1390	dev->ibdev.iwcm->add_ref = iwch_qp_add_ref;
1391	dev->ibdev.iwcm->rem_ref = iwch_qp_rem_ref;	1391	dev->ibdev.iwcm->rem_ref = iwch_qp_rem_ref;
1392	dev->ibdev.iwcm->get_qp = iwch_get_qp;	1392	dev->ibdev.iwcm->get_qp = iwch_get_qp;
		1393	memcpy(dev->ibdev.iwcm->ifname, dev->rdev.t3cdev_p->lldev->name,
		1394	sizeof(dev->ibdev.iwcm->ifname));
1393		1395
1394	ret = ib_register_device(&dev->ibdev, NULL);	1396	ret = ib_register_device(&dev->ibdev, NULL);
1395	if (ret)	1397	if (ret)

drivers/infiniband/hw/cxgb4/cq.c+1−1

@@ -162,7 +162,7 @@ static int create_cq(struct c4iw_rdev rdev, struct t4_cq cq, · 161 unmodified lines
162	cq->bar2_va = c4iw_bar2_addrs(rdev, cq->cqid, T4_BAR2_QTYPE_INGRESS,	162	cq->bar2_va = c4iw_bar2_addrs(rdev, cq->cqid, T4_BAR2_QTYPE_INGRESS,
163	&cq->bar2_qid,	163	&cq->bar2_qid,
164	user ? &cq->bar2_pa : NULL);	164	user ? &cq->bar2_pa : NULL);
165	if (user && !cq->bar2_va) {	165	if (user && !cq->bar2_pa) {
166	pr_warn(MOD "%s: cqid %u not in BAR2 range.\n",	166	pr_warn(MOD "%s: cqid %u not in BAR2 range.\n",
167	pci_name(rdev->lldi.pdev), cq->cqid);	167	pci_name(rdev->lldi.pdev), cq->cqid);
168	ret = -EINVAL;	168	ret = -EINVAL;

drivers/infiniband/hw/cxgb4/provider.c+2−0

@@ -580,6 +580,8 @@ int c4iw_register_device(struct c4iw_dev *dev) · 579 unmodified lines
580	dev->ibdev.iwcm->add_ref = c4iw_qp_add_ref;	580	dev->ibdev.iwcm->add_ref = c4iw_qp_add_ref;
581	dev->ibdev.iwcm->rem_ref = c4iw_qp_rem_ref;	581	dev->ibdev.iwcm->rem_ref = c4iw_qp_rem_ref;
582	dev->ibdev.iwcm->get_qp = c4iw_get_qp;	582	dev->ibdev.iwcm->get_qp = c4iw_get_qp;
		583	memcpy(dev->ibdev.iwcm->ifname, dev->rdev.lldi.ports[0]->name,
		584	sizeof(dev->ibdev.iwcm->ifname));
583		585
584	ret = ib_register_device(&dev->ibdev, NULL);	586	ret = ib_register_device(&dev->ibdev, NULL);
585	if (ret)	587	if (ret)

drivers/infiniband/hw/cxgb4/qp.c+21−3

 	if (pbar2_pa)
 		*pbar2_pa = (rdev->bar2_pa + bar2_qoffset) & PAGE_MASK;
+	if (is_t4(rdev->lldi.adapter_type))
+		return NULL;
 	return rdev->bar2_kva + bar2_qoffset;
 }
 	/*
 	 * User mode must have bar2 access.
 	 */
-	if (user && (!wq->sq.bar2_va || !wq->rq.bar2_va)) {
+	if (user && (!wq->sq.bar2_pa || !wq->rq.bar2_pa)) {
 		pr_warn(MOD "%s: sqid %u or rqid %u not in BAR2 range.\n",
 			pci_name(rdev->lldi.pdev), wq->sq.qid, wq->rq.qid);
 		goto free_dma;
 void c4iw_drain_sq(struct ib_qp *ibqp)
 {
 	struct c4iw_qp *qp = to_c4iw_qp(ibqp);
+	unsigned long flag;
+	bool need_to_wait;
-	wait_for_completion(&qp->sq_drained);
+	spin_lock_irqsave(&qp->lock, flag);
+	need_to_wait = !t4_sq_empty(&qp->wq);
+	spin_unlock_irqrestore(&qp->lock, flag);
+	if (need_to_wait)
+		wait_for_completion(&qp->sq_drained);
 }
 void c4iw_drain_rq(struct ib_qp *ibqp)
 {
 	struct c4iw_qp *qp = to_c4iw_qp(ibqp);
+	unsigned long flag;
+	bool need_to_wait;
+	spin_lock_irqsave(&qp->lock, flag);
+	need_to_wait = !t4_rq_empty(&qp->wq);
+	spin_unlock_irqrestore(&qp->lock, flag);
-	wait_for_completion(&qp->rq_drained);
+	if (need_to_wait)
+		wait_for_completion(&qp->rq_drained);
 }

drivers/infiniband/hw/mlx5/main.c+3−3

@@ -530,7 +530,7 @@ static int mlx5_ib_query_device(struct ib_device *ibdev, · 529 unmodified lines
530	sizeof(struct mlx5_wqe_ctrl_seg)) /	530	sizeof(struct mlx5_wqe_ctrl_seg)) /
531	sizeof(struct mlx5_wqe_data_seg);	531	sizeof(struct mlx5_wqe_data_seg);
532	props->max_sge = min(max_rq_sg, max_sq_sg);	532	props->max_sge = min(max_rq_sg, max_sq_sg);
533	props->max_sge_rd = props->max_sge;	533	props->max_sge_rd = MLX5_MAX_SGE_RD;
534	props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq);	534	props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq);
535	props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1;	535	props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1;
536	props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);	536	props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);
@@ -671,8 +671,8 @@ static int mlx5_query_hca_port(struct ib_device *ibdev, u8 port, · 134 unmodified lines
671	struct mlx5_ib_dev *dev = to_mdev(ibdev);	671	struct mlx5_ib_dev *dev = to_mdev(ibdev);
672	struct mlx5_core_dev *mdev = dev->mdev;	672	struct mlx5_core_dev *mdev = dev->mdev;
673	struct mlx5_hca_vport_context *rep;	673	struct mlx5_hca_vport_context *rep;
674	int max_mtu;	674	u16 max_mtu;
675	int oper_mtu;	675	u16 oper_mtu;
676	int err;	676	int err;
677	u8 ib_link_width_oper;	677	u8 ib_link_width_oper;
678	u8 vl_hw_cap;	678	u8 vl_hw_cap;

drivers/infiniband/hw/nes/nes_nic.c+0−3

@@ -500,9 +500,6 @@ static int nes_netdev_start_xmit(struct sk_buff skb, struct net_device netdev) · 499 unmodified lines
500	* skb_shinfo(skb)->nr_frags, skb_is_gso(skb));	500	* skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
501	*/	501	*/
502		502
503	if (!netif_carrier_ok(netdev))
504	return NETDEV_TX_OK;
505
506	if (netif_queue_stopped(netdev))	503	if (netif_queue_stopped(netdev))
507	return NETDEV_TX_BUSY;	504	return NETDEV_TX_BUSY;
508		505

drivers/infiniband/hw/qib/qib_file_ops.c+5−0

 #include <linux/export.h>
 #include <linux/uio.h>
+#include <rdma/ib.h>
 #include "qib.h"
 #include "qib_common.h"
 #include "qib_user_sdma.h"
 	ssize_t ret = 0;
 	void *dest;
+	if (WARN_ON_ONCE(!ib_safe_file_access(fp)))
+		return -EACCES;
 	if (count < sizeof(cmd.type)) {
 		ret = -EINVAL;
 		goto bail;

drivers/infiniband/sw/rdmavt/qp.c+2−2

 	spin_unlock_irqrestore(&qp->s_hlock, flags);
 	if (nreq) {
 		if (call_send)
-			rdi->driver_f.schedule_send_no_lock(qp);
-		else
 			rdi->driver_f.do_send(qp);
+		else
+			rdi->driver_f.schedule_send_no_lock(qp);
 	}
 	return err;
 }

drivers/infiniband/ulp/iser/iscsi_iser.c+10−4

 	struct Scsi_Host *shost;
 	struct iser_conn *iser_conn = NULL;
 	struct ib_conn *ib_conn;
+	u32 max_fr_sectors;
 	u16 max_cmds;
 	shost = iscsi_host_alloc(&iscsi_iser_sht, 0, 0);
 		iser_conn = ep->dd_data;
 		max_cmds = iser_conn->max_cmds;
 		shost->sg_tablesize = iser_conn->scsi_sg_tablesize;
-		shost->max_sectors = iser_conn->scsi_max_sectors;
 		mutex_lock(&iser_conn->state_mutex);
 		if (iser_conn->state != ISER_CONN_UP) {
 		 */
 		shost->sg_tablesize = min_t(unsigned short, shost->sg_tablesize,
 			ib_conn->device->ib_device->attrs.max_fast_reg_page_list_len);
-		shost->max_sectors = min_t(unsigned int,
-			1024, (shost->sg_tablesize * PAGE_SIZE) >> 9);
 		if (iscsi_host_add(shost,
 				   ib_conn->device->ib_device->dma_device)) {
 			goto free_host;
 	}
+	/*
+	 * FRs or FMRs can only map up to a (device) page per entry, but if the
+	 * first entry is misaligned we'll end up using using two entries
+	 * (head and tail) for a single page worth data, so we have to drop
+	 * one segment from the calculation.
+	 */
+	max_fr_sectors = ((shost->sg_tablesize - 1) * PAGE_SIZE) >> 9;
+	shost->max_sectors = min(iser_max_sectors, max_fr_sectors);
 	if (cmds_max > max_cmds) {
 		iser_info("cmds_max changed from %u to %u\n",
 			  cmds_max, max_cmds);
 	.queuecommand           = iscsi_queuecommand,
 	.change_queue_depth	= scsi_change_queue_depth,
 	.sg_tablesize           = ISCSI_ISER_DEF_SG_TABLESIZE,
-	.max_sectors            = ISER_DEF_MAX_SECTORS,
 	.cmd_per_lun            = ISER_DEF_CMD_PER_LUN,
 	.eh_abort_handler       = iscsi_eh_abort,
 	.eh_device_reset_handler= iscsi_eh_device_reset,

drivers/input/misc/twl6040-vibra.c+8−8

 {
 	struct vibra_info *info = container_of(work,
 				struct vibra_info, play_work);
+	int ret;
+	/* Do not allow effect, while the routing is set to use audio */
+	ret = twl6040_get_vibralr_status(info->twl6040);
+	if (ret & TWL6040_VIBSEL) {
+		dev_info(info->dev, "Vibra is configured for audio\n");
+		return;
+	}
 	mutex_lock(&info->mutex);
 		      struct ff_effect *effect)
 {
 	struct vibra_info *info = input_get_drvdata(input);
-	int ret;
-	/* Do not allow effect, while the routing is set to use audio */
-	ret = twl6040_get_vibralr_status(info->twl6040);
-	if (ret & TWL6040_VIBSEL) {
-		dev_info(&input->dev, "Vibra is configured for audio\n");
-		return -EBUSY;
-	}
 	info->weak_speed = effect->u.rumble.weak_magnitude;
 	info->strong_speed = effect->u.rumble.strong_magnitude;

drivers/input/touchscreen/atmel_mxt_ts.c+14−14

 	return 0;
 }
+static int mxt_acquire_irq(struct mxt_data *data)
+{
+	int error;
+	enable_irq(data->irq);
+	error = mxt_process_messages_until_invalid(data);
+	if (error)
+		return error;
+	return 0;
+}
 static int mxt_soft_reset(struct mxt_data *data)
 {
 	struct device *dev = &data->client->dev;
 	/* Ignore CHG line for 100ms after reset */
 	msleep(100);
-	enable_irq(data->irq);
+	mxt_acquire_irq(data);
 	ret = mxt_wait_for_completion(data, &data->reset_completion,
 				      MXT_RESET_TIMEOUT);
 	return ret;
 }
-static int mxt_acquire_irq(struct mxt_data *data)
-{
-	int error;
-	enable_irq(data->irq);
-	error = mxt_process_messages_until_invalid(data);
-	if (error)
-		return error;
-	return 0;
-}
 static int mxt_get_info(struct mxt_data *data)
 {
 	struct i2c_client *client = data->client;

drivers/input/touchscreen/zforce_ts.c+2−2

@@ -370,8 +370,8 @@ static int zforce_touch_event(struct zforce_ts ts, u8 payload) · 369 unmodified lines
370	point.coord_x = point.coord_y = 0;	370	point.coord_x = point.coord_y = 0;
371	}	371	}
372		372
373	point.state = payload[9 * i + 5] & 0x03;	373	point.state = payload[9 * i + 5] & 0x0f;
374	point.id = (payload[9 * i + 5] & 0xfc) >> 2;	374	point.id = (payload[9 * i + 5] & 0xf0) >> 4;
375		375
376	/* determine touch major, minor and orientation */	376	/* determine touch major, minor and orientation */
377	point.area_major = max(payload[9 * i + 6],	377	point.area_major = max(payload[9 * i + 6],

drivers/md/md.c+2−0

@@ -284,6 +284,8 @@ static blk_qc_t md_make_request(struct request_queue q, struct bio bio) · 283 unmodified lines
284	* go away inside make_request	284	* go away inside make_request
285	*/	285	*/
286	sectors = bio_sectors(bio);	286	sectors = bio_sectors(bio);
		287	/* bio could be mergeable after passing to underlayer */
		288	bio->bi_rw &= ~REQ_NOMERGE;
287	mddev->pers->make_request(mddev, bio);	289	mddev->pers->make_request(mddev, bio);
288		290
289	cpu = part_stat_lock();	291	cpu = part_stat_lock();

drivers/md/raid0.c+1−1

 			(unsigned long long)zone_size>>1);
 		zone_start = conf->strip_zone[j].zone_end;
 	}
-	printk(KERN_INFO "\n");
 }
 static int create_strip_zones(struct mddev *mddev, struct r0conf **private_conf)
 	struct r0conf *conf = kzalloc(sizeof(*conf), GFP_KERNEL);
 	unsigned short blksize = 512;
+	*private_conf = ERR_PTR(-ENOMEM);
 	if (!conf)
 		return -ENOMEM;
 	rdev_for_each(rdev1, mddev) {

drivers/md/raid5.c+0−2

@@ -3502,8 +3502,6 @@ returnbi: · 3501 unmodified lines
3502	dev = &sh->dev[i];	3502	dev = &sh->dev[i];
3503	} else if (test_bit(R5_Discard, &dev->flags))	3503	} else if (test_bit(R5_Discard, &dev->flags))
3504	discard_pending = 1;	3504	discard_pending = 1;
3505	WARN_ON(test_bit(R5_SkipCopy, &dev->flags));
3506	WARN_ON(dev->page != dev->orig_page);
3507	}	3505	}
3508		3506
3509	r5l_stripe_write_finished(sh);	3507	r5l_stripe_write_finished(sh);

drivers/media/media-device.c+4−4

 }
 EXPORT_SYMBOL_GPL(media_device_find_devres);
+#if IS_ENABLED(CONFIG_PCI)
 void media_device_pci_init(struct media_device *mdev,
 			   struct pci_dev *pci_dev,
 			   const char *name)
 {
-#ifdef CONFIG_PCI
 	mdev->dev = &pci_dev->dev;
 	if (name)
 	mdev->driver_version = LINUX_VERSION_CODE;
 	media_device_init(mdev);
-#endif
 }
 EXPORT_SYMBOL_GPL(media_device_pci_init);
+#endif
+#if IS_ENABLED(CONFIG_USB)
 void __media_device_usb_init(struct media_device *mdev,
 			     struct usb_device *udev,
 			     const char *board_name,
 			     const char *driver_name)
 {
-#ifdef CONFIG_USB
 	mdev->dev = &udev->dev;
 	if (driver_name)
 	mdev->driver_version = LINUX_VERSION_CODE;
 	media_device_init(mdev);
-#endif
 }
 EXPORT_SYMBOL_GPL(__media_device_usb_init);
+#endif
 #endif /* CONFIG_MEDIA_CONTROLLER */

drivers/media/platform/exynos4-is/media-dev.c+2−11

 	platform_set_drvdata(pdev, fmd);
-	/* Protect the media graph while we're registering entities */
-	mutex_lock(&fmd->media_dev.graph_mutex);
 	ret = fimc_md_register_platform_entities(fmd, dev->of_node);
-	if (ret) {
+	if (ret)
-		mutex_unlock(&fmd->media_dev.graph_mutex);
 		goto err_clk;
-	}
 	ret = fimc_md_register_sensor_entities(fmd);
-	if (ret) {
+	if (ret)
-		mutex_unlock(&fmd->media_dev.graph_mutex);
 		goto err_m_ent;
-	}
-	mutex_unlock(&fmd->media_dev.graph_mutex);
 	ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
 	if (ret)

drivers/media/platform/s3c-camif/camif-core.c+3−9

 	if (ret < 0)
 		goto err_sens;
-	mutex_lock(&camif->media_dev.graph_mutex);
 	ret = v4l2_device_register_subdev_nodes(&camif->v4l2_dev);
 	if (ret < 0)
-		goto err_unlock;
+		goto err_sens;
 	ret = camif_register_video_nodes(camif);
 	if (ret < 0)
-		goto err_unlock;
+		goto err_sens;
 	ret = camif_create_media_links(camif);
 	if (ret < 0)
-		goto err_unlock;
+		goto err_sens;
-	mutex_unlock(&camif->media_dev.graph_mutex);
 	ret = media_device_register(&camif->media_dev);
 	if (ret < 0)
 	pm_runtime_put(dev);
 	return 0;
-err_unlock:
-	mutex_unlock(&camif->media_dev.graph_mutex);
 err_sens:
 	v4l2_device_unregister(&camif->v4l2_dev);
 	media_device_unregister(&camif->media_dev);

drivers/media/usb/usbvision/usbvision-video.c+0−7

@@ -1452,13 +1452,6 @@ static int usbvision_probe(struct usb_interface *intf, · 1451 unmodified lines
1452	printk(KERN_INFO "%s: %s found\n", __func__,	1452	printk(KERN_INFO "%s: %s found\n", __func__,
1453	usbvision_device_data[model].model_string);	1453	usbvision_device_data[model].model_string);
1454		1454
1455	/*
1456	* this is a security check.
1457	* an exploit using an incorrect bInterfaceNumber is known
1458	*/
1459	if (ifnum >= USB_MAXINTERFACES \|\| !dev->actconfig->interface[ifnum])
1460	return -ENODEV;
1461
1462	if (usbvision_device_data[model].interface >= 0)	1455	if (usbvision_device_data[model].interface >= 0)
1463	interface = &dev->actconfig->interface[usbvision_device_data[model].interface]->altsetting[0];	1456	interface = &dev->actconfig->interface[usbvision_device_data[model].interface]->altsetting[0];
1464	else if (ifnum < dev->actconfig->desc.bNumInterfaces)	1457	else if (ifnum < dev->actconfig->desc.bNumInterfaces)

drivers/media/v4l2-core/videobuf2-core.c+15−5

  * Will sleep if required for nonblocking == false.
  */
 static int __vb2_get_done_vb(struct vb2_queue *q, struct vb2_buffer **vb,
-				int nonblocking)
+			     void *pb, int nonblocking)
 {
 	unsigned long flags;
 	int ret;
 	/*
 	 * Only remove the buffer from done_list if v4l2_buffer can handle all
 	 * the planes.
-	 * Verifying planes is NOT necessary since it already has been checked
-	 * before the buffer is queued/prepared. So it can never fail.
 	 */
-	list_del(&(*vb)->done_entry);
+	ret = call_bufop(q, verify_planes_array, *vb, pb);
+	if (!ret)
+		list_del(&(*vb)->done_entry);
 	spin_unlock_irqrestore(&q->done_lock, flags);
 	return ret;
 	struct vb2_buffer *vb = NULL;
 	int ret;
-	ret = __vb2_get_done_vb(q, &vb, nonblocking);
+	ret = __vb2_get_done_vb(q, &vb, pb, nonblocking);
 	if (ret < 0)
 		return ret;
 	if (!vb2_is_streaming(q) || q->error)
 		return POLLERR;
+	/*
+	 * If this quirk is set and QBUF hasn't been called yet then
+	 * return POLLERR as well. This only affects capture queues, output
+	 * queues will always initialize waiting_for_buffers to false.
+	 * This quirk is set by V4L2 for backwards compatibility reasons.
+	 */
+	if (q->quirk_poll_must_check_waiting_for_buffers &&
+	    q->waiting_for_buffers && (req_events & (POLLIN | POLLRDNORM)))
+		return POLLERR;
 	/*
 	 * For output streams you can call write() as long as there are fewer
 	 * buffers queued than there are buffers available.

drivers/media/v4l2-core/videobuf2-memops.c+1−1

@@ -49,7 +49,7 @@ struct frame_vector *vb2_create_framevec(unsigned long start, · 48 unmodified lines
49	vec = frame_vector_create(nr);	49	vec = frame_vector_create(nr);
50	if (!vec)	50	if (!vec)
51	return ERR_PTR(-ENOMEM);	51	return ERR_PTR(-ENOMEM);
52	ret = get_vaddr_frames(start, nr, write, 1, vec);	52	ret = get_vaddr_frames(start & PAGE_MASK, nr, write, true, vec);
53	if (ret < 0)	53	if (ret < 0)
54	goto out_destroy;	54	goto out_destroy;
55	/* We accept only complete set of PFNs */	55	/* We accept only complete set of PFNs */

drivers/media/v4l2-core/videobuf2-v4l2.c+12−8

 	return 0;
 }
+static int __verify_planes_array_core(struct vb2_buffer *vb, const void *pb)
+{
+	return __verify_planes_array(vb, pb);
+}
 /**
  * __verify_length() - Verify that the bytesused value for each plane fits in
  * the plane length and that the data offset doesn't exceed the bytesused value.
 }
 static const struct vb2_buf_ops v4l2_buf_ops = {
+	.verify_planes_array	= __verify_planes_array_core,
 	.fill_user_buffer	= __fill_v4l2_buffer,
 	.fill_vb2_buffer	= __fill_vb2_buffer,
 	.copy_timestamp		= __copy_timestamp,
 	q->is_output = V4L2_TYPE_IS_OUTPUT(q->type);
 	q->copy_timestamp = (q->timestamp_flags & V4L2_BUF_FLAG_TIMESTAMP_MASK)
 			== V4L2_BUF_FLAG_TIMESTAMP_COPY;
+	/*
+	 * For compatibility with vb1: if QBUF hasn't been called yet, then
+	 * return POLLERR as well. This only affects capture queues, output
+	 * queues will always initialize waiting_for_buffers to false.
+	 */
+	q->quirk_poll_must_check_waiting_for_buffers = true;
 	return vb2_core_queue_init(q);
 }
 			poll_wait(file, &fh->wait, wait);
 	}
-	/*
-	 * For compatibility with vb1: if QBUF hasn't been called yet, then
-	 * return POLLERR as well. This only affects capture queues, output
-	 * queues will always initialize waiting_for_buffers to false.
-	 */
-	if (q->waiting_for_buffers && (req_events & (POLLIN | POLLRDNORM)))
-		return POLLERR;
 	return res | vb2_core_poll(q, file, wait);
 }
 EXPORT_SYMBOL_GPL(vb2_poll);

drivers/misc/cxl/context.c+7−0

@@ -223,6 +223,13 @@ int __detach_context(struct cxl_context *ctx) · 222 unmodified lines
223	cxl_ops->link_ok(ctx->afu->adapter, ctx->afu));	223	cxl_ops->link_ok(ctx->afu->adapter, ctx->afu));
224	flush_work(&ctx->fault_work); /* Only needed for dedicated process */	224	flush_work(&ctx->fault_work); /* Only needed for dedicated process */
225		225
		226	/*
		227	* Wait until no further interrupts are presented by the PSL
		228	* for this context.
		229	*/
		230	if (cxl_ops->irq_wait)
		231	cxl_ops->irq_wait(ctx);
		232
226	/* release the reference to the group leader and mm handling pid */	233	/* release the reference to the group leader and mm handling pid */
227	put_pid(ctx->pid);	234	put_pid(ctx->pid);
228	put_pid(ctx->glpid);	235	put_pid(ctx->glpid);

drivers/misc/cxl/cxl.h+2−0

 #define CXL_PSL_DSISR_An_PE (1ull << (63-4))  /* PSL Error (implementation specific) */
 #define CXL_PSL_DSISR_An_AE (1ull << (63-5))  /* AFU Error */
 #define CXL_PSL_DSISR_An_OC (1ull << (63-6))  /* OS Context Warning */
+#define CXL_PSL_DSISR_PENDING (CXL_PSL_DSISR_TRANS | CXL_PSL_DSISR_An_PE | CXL_PSL_DSISR_An_AE | CXL_PSL_DSISR_An_OC)
 /* NOTE: Bits 32:63 are undefined if DSISR[DS] = 1 */
 #define CXL_PSL_DSISR_An_M  DSISR_NOHPTE      /* PTE not found */
 #define CXL_PSL_DSISR_An_P  DSISR_PROTFAULT   /* Storage protection violation */
 					u64 dsisr, u64 errstat);
 	irqreturn_t (*psl_interrupt)(int irq, void *data);
 	int (*ack_irq)(struct cxl_context *ctx, u64 tfc, u64 psl_reset_mask);
+	void (*irq_wait)(struct cxl_context *ctx);
 	int (*attach_process)(struct cxl_context *ctx, bool kernel,
 			u64 wed, u64 amr);
 	int (*detach_process)(struct cxl_context *ctx);

drivers/misc/cxl/irq.c+0−1

@@ -203,7 +203,6 @@ unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq, · 202 unmodified lines
203	void cxl_unmap_irq(unsigned int virq, void *cookie)	203	void cxl_unmap_irq(unsigned int virq, void *cookie)
204	{	204	{
205	free_irq(virq, cookie);	205	free_irq(virq, cookie);
206	irq_dispose_mapping(virq);
207	}	206	}
208		207
209	int cxl_register_one_irq(struct cxl *adapter,	208	int cxl_register_one_irq(struct cxl *adapter,

drivers/misc/cxl/native.c+31−0

@@ -14,6 +14,7 @@ · 13 unmodified lines
14	#include <linux/mutex.h>	14	#include <linux/mutex.h>
15	#include <linux/mm.h>	15	#include <linux/mm.h>
16	#include <linux/uaccess.h>	16	#include <linux/uaccess.h>
		17	#include <linux/delay.h>
17	#include <asm/synch.h>	18	#include <asm/synch.h>
18	#include <misc/cxl-base.h>	19	#include <misc/cxl-base.h>
19		20
@@ -797,6 +798,35 @@ static irqreturn_t native_irq_multiplexed(int irq, void *data) · 777 unmodified lines
797	return fail_psl_irq(afu, &irq_info);	798	return fail_psl_irq(afu, &irq_info);
798	}	799	}
799		800
		801	void native_irq_wait(struct cxl_context *ctx)
		802	{
		803	u64 dsisr;
		804	int timeout = 1000;
		805	int ph;
		806
		807	/*
		808	* Wait until no further interrupts are presented by the PSL
		809	* for this context.
		810	*/
		811	while (timeout--) {
		812	ph = cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) & 0xffff;
		813	if (ph != ctx->pe)
		814	return;
		815	dsisr = cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An);
		816	if ((dsisr & CXL_PSL_DSISR_PENDING) == 0)
		817	return;
		818	/*
		819	* We are waiting for the workqueue to process our
		820	* irq, so need to let that run here.
		821	*/
		822	msleep(1);
		823	}
		824
		825	dev_warn(&ctx->afu->dev, "WARNING: waiting on DSI for PE %i"
		826	" DSISR %016llx!\n", ph, dsisr);
		827	return;
		828	}
		829
800	static irqreturn_t native_slice_irq_err(int irq, void *data)	830	static irqreturn_t native_slice_irq_err(int irq, void *data)
801	{	831	{
802	struct cxl_afu *afu = data;	832	struct cxl_afu *afu = data;
@@ -1076,6 +1106,7 @@ const struct cxl_backend_ops cxl_native_ops = { · 273 unmodified lines
1076	.handle_psl_slice_error = native_handle_psl_slice_error,	1106	.handle_psl_slice_error = native_handle_psl_slice_error,
1077	.psl_interrupt = NULL,	1107	.psl_interrupt = NULL,
1078	.ack_irq = native_ack_irq,	1108	.ack_irq = native_ack_irq,
		1109	.irq_wait = native_irq_wait,
1079	.attach_process = native_attach_process,	1110	.attach_process = native_attach_process,
1080	.detach_process = native_detach_process,	1111	.detach_process = native_detach_process,
1081	.support_attributes = native_support_attributes,	1112	.support_attributes = native_support_attributes,

drivers/misc/mic/vop/vop_vringh.c+5−0

 			ret = -EFAULT;
 			goto free_ret;
 		}
+		/* Ensure desc has not changed between the two reads */
+		if (memcmp(&dd, dd_config, sizeof(dd))) {
+			ret = -EINVAL;
+			goto free_ret;
+		}
 		mutex_lock(&vdev->vdev_mutex);
 		mutex_lock(&vi->vop_mutex);
 		ret = vop_virtio_add_device(vdev, dd_config);

drivers/mmc/host/Kconfig+1−0

@@ -97,6 +97,7 @@ config MMC_RICOH_MMC · 96 unmodified lines
97	config MMC_SDHCI_ACPI	97	config MMC_SDHCI_ACPI
98	tristate "SDHCI support for ACPI enumerated SDHCI controllers"	98	tristate "SDHCI support for ACPI enumerated SDHCI controllers"
99	depends on MMC_SDHCI && ACPI	99	depends on MMC_SDHCI && ACPI
		100	select IOSF_MBI if X86
100	help	101	help
101	This selects support for ACPI enumerated SDHCI controllers,	102	This selects support for ACPI enumerated SDHCI controllers,
102	identified by ACPI Compatibility ID PNP0D40 or specific	103	identified by ACPI Compatibility ID PNP0D40 or specific

drivers/mmc/host/sdhci-acpi.c+81−0

@@ -41,6 +41,11 @@ · 40 unmodified lines
41	#include <linux/mmc/pm.h>	41	#include <linux/mmc/pm.h>
42	#include <linux/mmc/slot-gpio.h>	42	#include <linux/mmc/slot-gpio.h>
43		43
		44	#ifdef CONFIG_X86
		45	#include <asm/cpu_device_id.h>
		46	#include <asm/iosf_mbi.h>
		47	#endif
		48
44	#include "sdhci.h"	49	#include "sdhci.h"
45		50
46	enum {	51	enum {
@@ -116,6 +121,75 @@ static const struct sdhci_acpi_chip sdhci_acpi_chip_int = { · 69 unmodified lines
116	.ops = &sdhci_acpi_ops_int,	121	.ops = &sdhci_acpi_ops_int,
117	};	122	};
118		123
		124	#ifdef CONFIG_X86
		125
		126	static bool sdhci_acpi_byt(void)
		127	{
		128	static const struct x86_cpu_id byt[] = {
		129	{ X86_VENDOR_INTEL, 6, 0x37 },
		130	{}
		131	};
		132
		133	return x86_match_cpu(byt);
		134	}
		135
		136	#define BYT_IOSF_SCCEP 0x63
		137	#define BYT_IOSF_OCP_NETCTRL0 0x1078
		138	#define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
		139
		140	static void sdhci_acpi_byt_setting(struct device *dev)
		141	{
		142	u32 val = 0;
		143
		144	if (!sdhci_acpi_byt())
		145	return;
		146
		147	if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
		148	&val)) {
		149	dev_err(dev, "%s read error\n", __func__);
		150	return;
		151	}
		152
		153	if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
		154	return;
		155
		156	val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
		157
		158	if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
		159	val)) {
		160	dev_err(dev, "%s write error\n", __func__);
		161	return;
		162	}
		163
		164	dev_dbg(dev, "%s completed\n", __func__);
		165	}
		166
		167	static bool sdhci_acpi_byt_defer(struct device *dev)
		168	{
		169	if (!sdhci_acpi_byt())
		170	return false;
		171
		172	if (!iosf_mbi_available())
		173	return true;
		174
		175	sdhci_acpi_byt_setting(dev);
		176
		177	return false;
		178	}
		179
		180	#else
		181
		182	static inline void sdhci_acpi_byt_setting(struct device *dev)
		183	{
		184	}
		185
		186	static inline bool sdhci_acpi_byt_defer(struct device *dev)
		187	{
		188	return false;
		189	}
		190
		191	#endif
		192
119	static int bxt_get_cd(struct mmc_host *mmc)	193	static int bxt_get_cd(struct mmc_host *mmc)
120	{	194	{
121	int gpio_cd = mmc_gpio_get_cd(mmc);	195	int gpio_cd = mmc_gpio_get_cd(mmc);
@@ -322,6 +396,9 @@ static int sdhci_acpi_probe(struct platform_device *pdev) · 200 unmodified lines
322	if (acpi_bus_get_status(device) \|\| !device->status.present)	396	if (acpi_bus_get_status(device) \|\| !device->status.present)
323	return -ENODEV;	397	return -ENODEV;
324		398
		399	if (sdhci_acpi_byt_defer(dev))
		400	return -EPROBE_DEFER;
		401
325	hid = acpi_device_hid(device);	402	hid = acpi_device_hid(device);
326	uid = device->pnp.unique_id;	403	uid = device->pnp.unique_id;
327		404
@@ -447,6 +524,8 @@ static int sdhci_acpi_resume(struct device *dev) · 119 unmodified lines
447	{	524	{
448	struct sdhci_acpi_host *c = dev_get_drvdata(dev);	525	struct sdhci_acpi_host *c = dev_get_drvdata(dev);
449		526
		527	sdhci_acpi_byt_setting(&c->pdev->dev);
		528
450	return sdhci_resume_host(c->host);	529	return sdhci_resume_host(c->host);
451	}	530	}
452		531
@@ -470,6 +549,8 @@ static int sdhci_acpi_runtime_resume(struct device *dev) · 17 unmodified lines
470	{	549	{
471	struct sdhci_acpi_host *c = dev_get_drvdata(dev);	550	struct sdhci_acpi_host *c = dev_get_drvdata(dev);
472		551
		552	sdhci_acpi_byt_setting(&c->pdev->dev);
		553
473	return sdhci_runtime_resume_host(c->host);	554	return sdhci_runtime_resume_host(c->host);
474	}	555	}
475		556

drivers/mmc/host/sunxi-mmc.c+5−0

 				  MMC_CAP_1_8V_DDR |
 				  MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
+	/* TODO MMC DDR is not working on A80 */
+	if (of_device_is_compatible(pdev->dev.of_node,
+				    "allwinner,sun9i-a80-mmc"))
+		mmc->caps &= ~MMC_CAP_1_8V_DDR;
 	ret = mmc_of_parse(mmc);
 	if (ret)
 		goto error_free_dma;

drivers/net/Kconfig+2−3

 	  this device is consigned into oblivion) with a configurable IP
 	  address. It is most commonly used in order to make your currently
 	  inactive SLIP address seem like a real address for local programs.
-	  If you use SLIP or PPP, you might want to say Y here. Since this
+	  If you use SLIP or PPP, you might want to say Y here. It won't
-	  thing often comes in handy, the default is Y. It won't enlarge your
+	  enlarge your kernel. What a deal. Read about it in the Network
-	  kernel either. What a deal. Read about it in the Network
 	  Administrator's Guide, available from
 	  <http://www.tldp.org/docs.html#guide>.

drivers/net/dsa/mv88e6xxx.c+1−1

@@ -2181,7 +2181,7 @@ int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port, · 2180 unmodified lines
2181	struct net_device *bridge)	2181	struct net_device *bridge)
2182	{	2182	{
2183	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);	2183	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
2184	int i, err;	2184	int i, err = 0;
2185		2185
2186	mutex_lock(&ps->smi_mutex);	2186	mutex_lock(&ps->smi_mutex);
2187		2187

drivers/net/ethernet/broadcom/bnxt/bnxt.c+39−14

 	struct page *page;
 	dma_addr_t mapping;
 	u16 sw_prod = rxr->rx_sw_agg_prod;
+	unsigned int offset = 0;
-	page = alloc_page(gfp);
+	if (PAGE_SIZE > BNXT_RX_PAGE_SIZE) {
-	if (!page)
+		page = rxr->rx_page;
-		return -ENOMEM;
+		if (!page) {
+			page = alloc_page(gfp);
+			if (!page)
+				return -ENOMEM;
+			rxr->rx_page = page;
+			rxr->rx_page_offset = 0;
+		}
+		offset = rxr->rx_page_offset;
+		rxr->rx_page_offset += BNXT_RX_PAGE_SIZE;
+		if (rxr->rx_page_offset == PAGE_SIZE)
+			rxr->rx_page = NULL;
+		else
+			get_page(page);
+	} else {
+		page = alloc_page(gfp);
+		if (!page)
+			return -ENOMEM;
+	}
-	mapping = dma_map_page(&pdev->dev, page, 0, PAGE_SIZE,
+	mapping = dma_map_page(&pdev->dev, page, offset, BNXT_RX_PAGE_SIZE,
 			       PCI_DMA_FROMDEVICE);
 	if (dma_mapping_error(&pdev->dev, mapping)) {
 		__free_page(page);
 	rxr->rx_sw_agg_prod = NEXT_RX_AGG(sw_prod);
 	rx_agg_buf->page = page;
+	rx_agg_buf->offset = offset;
 	rx_agg_buf->mapping = mapping;
 	rxbd->rx_bd_haddr = cpu_to_le64(mapping);
 	rxbd->rx_bd_opaque = sw_prod;
 		page = cons_rx_buf->page;
 		cons_rx_buf->page = NULL;
 		prod_rx_buf->page = page;
+		prod_rx_buf->offset = cons_rx_buf->offset;
 		prod_rx_buf->mapping = cons_rx_buf->mapping;
 			    RX_AGG_CMP_LEN) >> RX_AGG_CMP_LEN_SHIFT;
 		cons_rx_buf = &rxr->rx_agg_ring[cons];
-		skb_fill_page_desc(skb, i, cons_rx_buf->page, 0, frag_len);
+		skb_fill_page_desc(skb, i, cons_rx_buf->page,
+				   cons_rx_buf->offset, frag_len);
 		__clear_bit(cons, rxr->rx_agg_bmap);
 		/* It is possible for bnxt_alloc_rx_page() to allocate
 			return NULL;
 		}
-		dma_unmap_page(&pdev->dev, mapping, PAGE_SIZE,
+		dma_unmap_page(&pdev->dev, mapping, BNXT_RX_PAGE_SIZE,
 			       PCI_DMA_FROMDEVICE);
 		skb->data_len += frag_len;
 			dma_unmap_page(&pdev->dev,
 				       dma_unmap_addr(rx_agg_buf, mapping),
-				       PAGE_SIZE, PCI_DMA_FROMDEVICE);
+				       BNXT_RX_PAGE_SIZE, PCI_DMA_FROMDEVICE);
 			rx_agg_buf->page = NULL;
 			__clear_bit(j, rxr->rx_agg_bmap);
 			__free_page(page);
 		}
+		if (rxr->rx_page) {
+			__free_page(rxr->rx_page);
+			rxr->rx_page = NULL;
+		}
 	}
 }
 	if (!(bp->flags & BNXT_FLAG_AGG_RINGS))
 		return 0;
-	type = ((u32)PAGE_SIZE << RX_BD_LEN_SHIFT) |
+	type = ((u32)BNXT_RX_PAGE_SIZE << RX_BD_LEN_SHIFT) |
 		RX_BD_TYPE_RX_AGG_BD | RX_BD_FLAGS_SOP;
 	bnxt_init_rxbd_pages(ring, type);
 	bp->rx_agg_nr_pages = 0;
 	if (bp->flags & BNXT_FLAG_TPA)
-		agg_factor = 4;
+		agg_factor = min_t(u32, 4, 65536 / BNXT_RX_PAGE_SIZE);
 	bp->flags &= ~BNXT_FLAG_JUMBO;
 	if (rx_space > PAGE_SIZE) {
 		/* Number of segs are log2 units, and first packet is not
 		 * included as part of this units.
 		 */
-		if (mss <= PAGE_SIZE) {
+		if (mss <= BNXT_RX_PAGE_SIZE) {
-			n = PAGE_SIZE / mss;
+			n = BNXT_RX_PAGE_SIZE / mss;
 			nsegs = (MAX_SKB_FRAGS - 1) * n;
 		} else {
-			n = mss / PAGE_SIZE;
+			n = mss / BNXT_RX_PAGE_SIZE;
-			if (mss & (PAGE_SIZE - 1))
+			if (mss & (BNXT_RX_PAGE_SIZE - 1))
 				n++;
 			nsegs = (MAX_SKB_FRAGS - n) / n;
 		}
 	if (bp->flags & BNXT_FLAG_MSIX_CAP)
 		rc = bnxt_setup_msix(bp);
-	if (!(bp->flags & BNXT_FLAG_USING_MSIX)) {
+	if (!(bp->flags & BNXT_FLAG_USING_MSIX) && BNXT_PF(bp)) {
 		/* fallback to INTA */
 		rc = bnxt_setup_inta(bp);
 	}

drivers/net/ethernet/broadcom/bnxt/bnxt.h+13−0

 #define BNXT_PAGE_SIZE	(1 << BNXT_PAGE_SHIFT)
+/* The RXBD length is 16-bit so we can only support page sizes < 64K */
+#if (PAGE_SHIFT > 15)
+#define BNXT_RX_PAGE_SHIFT 15
+#else
+#define BNXT_RX_PAGE_SHIFT PAGE_SHIFT
+#endif
+#define BNXT_RX_PAGE_SIZE (1 << BNXT_RX_PAGE_SHIFT)
 #define BNXT_MIN_PKT_SIZE	45
 #define BNXT_NUM_TESTS(bp)	0
 struct bnxt_sw_rx_agg_bd {
 	struct page		*page;
+	unsigned int		offset;
 	dma_addr_t		mapping;
 };
 	unsigned long		*rx_agg_bmap;
 	u16			rx_agg_bmap_size;
+	struct page		*rx_page;
+	unsigned int		rx_page_offset;
 	dma_addr_t		rx_desc_mapping[MAX_RX_PAGES];
 	dma_addr_t		rx_agg_desc_mapping[MAX_RX_AGG_PAGES];

drivers/net/ethernet/cadence/macb.c+21−13

 	snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
 		bp->pdev->name, bp->pdev->id);
 	bp->mii_bus->priv = bp;
-	bp->mii_bus->parent = &bp->dev->dev;
+	bp->mii_bus->parent = &bp->pdev->dev;
 	pdata = dev_get_platdata(&bp->pdev->dev);
 	dev_set_drvdata(&bp->dev->dev, bp->mii_bus);
 				struct phy_device *phydev;
 				phydev = mdiobus_scan(bp->mii_bus, i);
-				if (IS_ERR(phydev)) {
+				if (IS_ERR(phydev) &&
+				    PTR_ERR(phydev) != -ENODEV) {
 					err = PTR_ERR(phydev);
 					break;
 				}
 	if (err)
 		goto err_out_free_netdev;
+	err = macb_mii_init(bp);
+	if (err)
+		goto err_out_free_netdev;
+	phydev = bp->phy_dev;
+	netif_carrier_off(dev);
 	err = register_netdev(dev);
 	if (err) {
 		dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
-		goto err_out_unregister_netdev;
+		goto err_out_unregister_mdio;
 	}
-	err = macb_mii_init(bp);
+	phy_attached_info(phydev);
-	if (err)
-		goto err_out_unregister_netdev;
-	netif_carrier_off(dev);
 	netdev_info(dev, "Cadence %s rev 0x%08x at 0x%08lx irq %d (%pM)\n",
 		    macb_is_gem(bp) ? "GEM" : "MACB", macb_readl(bp, MID),
 		    dev->base_addr, dev->irq, dev->dev_addr);
-	phydev = bp->phy_dev;
-	phy_attached_info(phydev);
 	return 0;
-err_out_unregister_netdev:
+err_out_unregister_mdio:
-	unregister_netdev(dev);
+	phy_disconnect(bp->phy_dev);
+	mdiobus_unregister(bp->mii_bus);
+	mdiobus_free(bp->mii_bus);
+	/* Shutdown the PHY if there is a GPIO reset */
+	if (bp->reset_gpio)
+		gpiod_set_value(bp->reset_gpio, 0);
 err_out_free_netdev:
 	free_netdev(dev);

drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c+2−1

 	unsigned int nq0 = adap2pinfo(adap, 0)->nqsets;
 	unsigned int nq1 = adap->port[1] ? adap2pinfo(adap, 1)->nqsets : 1;
 	u8 cpus[SGE_QSETS + 1];
-	u16 rspq_map[RSS_TABLE_SIZE];
+	u16 rspq_map[RSS_TABLE_SIZE + 1];
 	for (i = 0; i < SGE_QSETS; ++i)
 		cpus[i] = i;
 		rspq_map[i] = i % nq0;
 		rspq_map[i + RSS_TABLE_SIZE / 2] = (i % nq1) + nq0;
 	}
+	rspq_map[RSS_TABLE_SIZE] = 0xffff; /* terminator */
 	t3_config_rss(adap, F_RQFEEDBACKENABLE | F_TNLLKPEN | F_TNLMAPEN |
 		      F_TNLPRTEN | F_TNL2TUPEN | F_TNL4TUPEN |

drivers/net/ethernet/marvell/mvneta.c+2−4

 		/* Enable per-CPU interrupts on the CPU that is
 		 * brought up.
 		 */
-		smp_call_function_single(cpu, mvneta_percpu_enable,
+		mvneta_percpu_enable(pp);
-					 pp, true);
 		/* Enable per-CPU interrupt on the one CPU we care
 		 * about.
 		/* Disable per-CPU interrupts on the CPU that is
 		 * brought down.
 		 */
-		smp_call_function_single(cpu, mvneta_percpu_disable,
+		mvneta_percpu_disable(pp);
-					 pp, true);
 		break;
 	case CPU_DEAD:

drivers/net/ethernet/marvell/pxa168_eth.c+2−0

@@ -979,6 +979,8 @@ static int pxa168_init_phy(struct net_device *dev) · 978 unmodified lines
979	return 0;	979	return 0;
980		980
981	pep->phy = mdiobus_scan(pep->smi_bus, pep->phy_addr);	981	pep->phy = mdiobus_scan(pep->smi_bus, pep->phy_addr);
		982	if (IS_ERR(pep->phy))
		983	return PTR_ERR(pep->phy);
982	if (!pep->phy)	984	if (!pep->phy)
983	return -ENODEV;	985	return -ENODEV;
984		986

drivers/net/ethernet/mellanox/mlx4/en_tx.c+4−2

@@ -405,7 +405,6 @@ static bool mlx4_en_process_tx_cq(struct net_device *dev, · 404 unmodified lines
405	u32 packets = 0;	405	u32 packets = 0;
406	u32 bytes = 0;	406	u32 bytes = 0;
407	int factor = priv->cqe_factor;	407	int factor = priv->cqe_factor;
408	u64 timestamp = 0;
409	int done = 0;	408	int done = 0;
410	int budget = priv->tx_work_limit;	409	int budget = priv->tx_work_limit;
411	u32 last_nr_txbb;	410	u32 last_nr_txbb;
@@ -445,9 +444,12 @@ static bool mlx4_en_process_tx_cq(struct net_device *dev, · 33 unmodified lines
445	new_index = be16_to_cpu(cqe->wqe_index) & size_mask;	444	new_index = be16_to_cpu(cqe->wqe_index) & size_mask;
446		445
447	do {	446	do {
		447	u64 timestamp = 0;
		448
448	txbbs_skipped += last_nr_txbb;	449	txbbs_skipped += last_nr_txbb;
449	ring_index = (ring_index + last_nr_txbb) & size_mask;	450	ring_index = (ring_index + last_nr_txbb) & size_mask;
450	if (ring->tx_info[ring_index].ts_requested)	451
		452	if (unlikely(ring->tx_info[ring_index].ts_requested))
451	timestamp = mlx4_en_get_cqe_ts(cqe);	453	timestamp = mlx4_en_get_cqe_ts(cqe);
452		454
453	/* free next descriptor */	455	/* free next descriptor */

drivers/net/ethernet/mellanox/mlx5/core/Kconfig+1−0

@@ -14,6 +14,7 @@ config MLX5_CORE_EN · 13 unmodified lines
14	bool "Mellanox Technologies ConnectX-4 Ethernet support"	14	bool "Mellanox Technologies ConnectX-4 Ethernet support"
15	depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE	15	depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE
16	select PTP_1588_CLOCK	16	select PTP_1588_CLOCK
		17	select VXLAN if MLX5_CORE=y
17	default n	18	default n
18	---help---	19	---help---
19	Ethernet support in Mellanox Technologies ConnectX-4 NIC.	20	Ethernet support in Mellanox Technologies ConnectX-4 NIC.

drivers/net/ethernet/mellanox/mlx5/core/en.h+2−1

 	struct mlx5e_vxlan_db      vxlan;
 	struct mlx5e_params        params;
+	struct workqueue_struct    *wq;
 	struct work_struct         update_carrier_work;
 	struct work_struct         set_rx_mode_work;
 	struct delayed_work        update_stats_work;
 	MLX5E_100GBASE_KR4	 = 22,
 	MLX5E_100GBASE_LR4	 = 23,
 	MLX5E_100BASE_TX	 = 24,
-	MLX5E_100BASE_T		 = 25,
+	MLX5E_1000BASE_T	 = 25,
 	MLX5E_10GBASE_T		 = 26,
 	MLX5E_25GBASE_CR	 = 27,
 	MLX5E_25GBASE_KR	 = 28,

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c+4−4

@@ -138,10 +138,10 @@ static const struct { · 137 unmodified lines
138	[MLX5E_100BASE_TX] = {	138	[MLX5E_100BASE_TX] = {
139	.speed = 100,	139	.speed = 100,
140	},	140	},
141	[MLX5E_100BASE_T] = {	141	[MLX5E_1000BASE_T] = {
142	.supported = SUPPORTED_100baseT_Full,	142	.supported = SUPPORTED_1000baseT_Full,
143	.advertised = ADVERTISED_100baseT_Full,	143	.advertised = ADVERTISED_1000baseT_Full,
144	.speed = 100,	144	.speed = 1000,
145	},	145	},
146	[MLX5E_10GBASE_T] = {	146	[MLX5E_10GBASE_T] = {
147	.supported = SUPPORTED_10000baseT_Full,	147	.supported = SUPPORTED_10000baseT_Full,

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+78−28

 	mutex_lock(&priv->state_lock);
 	if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 		mlx5e_update_stats(priv);
-		schedule_delayed_work(dwork,
+		queue_delayed_work(priv->wq, dwork,
-				      msecs_to_jiffies(
+				   msecs_to_jiffies(MLX5E_UPDATE_STATS_INTERVAL));
-					      MLX5E_UPDATE_STATS_INTERVAL));
 	}
 	mutex_unlock(&priv->state_lock);
 }
 	switch (event) {
 	case MLX5_DEV_EVENT_PORT_UP:
 	case MLX5_DEV_EVENT_PORT_DOWN:
-		schedule_work(&priv->update_carrier_work);
+		queue_work(priv->wq, &priv->update_carrier_work);
 		break;
 	default:
 	return 0;
 }
-static int mlx5e_set_dev_port_mtu(struct net_device *netdev)
+static int mlx5e_set_mtu(struct mlx5e_priv *priv, u16 mtu)
 {
-	struct mlx5e_priv *priv = netdev_priv(netdev);
 	struct mlx5_core_dev *mdev = priv->mdev;
-	int hw_mtu;
+	u16 hw_mtu = MLX5E_SW2HW_MTU(mtu);
 	int err;
-	err = mlx5_set_port_mtu(mdev, MLX5E_SW2HW_MTU(netdev->mtu), 1);
+	err = mlx5_set_port_mtu(mdev, hw_mtu, 1);
 	if (err)
 		return err;
-	mlx5_query_port_oper_mtu(mdev, &hw_mtu, 1);
+	/* Update vport context MTU */
+	mlx5_modify_nic_vport_mtu(mdev, hw_mtu);
+	return 0;
+}
+static void mlx5e_query_mtu(struct mlx5e_priv *priv, u16 *mtu)
+{
+	struct mlx5_core_dev *mdev = priv->mdev;
+	u16 hw_mtu = 0;
+	int err;
-	if (MLX5E_HW2SW_MTU(hw_mtu) != netdev->mtu)
+	err = mlx5_query_nic_vport_mtu(mdev, &hw_mtu);
-		netdev_warn(netdev, "%s: Port MTU %d is different than netdev mtu %d\n",
+	if (err || !hw_mtu) /* fallback to port oper mtu */
-			    __func__, MLX5E_HW2SW_MTU(hw_mtu), netdev->mtu);
+		mlx5_query_port_oper_mtu(mdev, &hw_mtu, 1);
+	*mtu = MLX5E_HW2SW_MTU(hw_mtu);
+}
+static int mlx5e_set_dev_port_mtu(struct net_device *netdev)
+{
+	struct mlx5e_priv *priv = netdev_priv(netdev);
+	u16 mtu;
+	int err;
-	netdev->mtu = MLX5E_HW2SW_MTU(hw_mtu);
+	err = mlx5e_set_mtu(priv, netdev->mtu);
+	if (err)
+		return err;
+	mlx5e_query_mtu(priv, &mtu);
+	if (mtu != netdev->mtu)
+		netdev_warn(netdev, "%s: VPort MTU %d is different than netdev mtu %d\n",
+			    __func__, mtu, netdev->mtu);
+	netdev->mtu = mtu;
 	return 0;
 }
 	mlx5e_update_carrier(priv);
 	mlx5e_timestamp_init(priv);
-	schedule_delayed_work(&priv->update_stats_work, 0);
+	queue_delayed_work(priv->wq, &priv->update_stats_work, 0);
 	return 0;
 {
 	struct mlx5e_priv *priv = netdev_priv(dev);
-	schedule_work(&priv->set_rx_mode_work);
+	queue_work(priv->wq, &priv->set_rx_mode_work);
 }
 static int mlx5e_set_mac(struct net_device *netdev, void *addr)
 	ether_addr_copy(netdev->dev_addr, saddr->sa_data);
 	netif_addr_unlock_bh(netdev);
-	schedule_work(&priv->set_rx_mode_work);
+	queue_work(priv->wq, &priv->set_rx_mode_work);
 	return 0;
 }
 	return err;
 }
+#define MXL5_HW_MIN_MTU 64
+#define MXL5E_MIN_MTU (MXL5_HW_MIN_MTU + ETH_FCS_LEN)
 static int mlx5e_change_mtu(struct net_device *netdev, int new_mtu)
 {
 	struct mlx5e_priv *priv = netdev_priv(netdev);
 	struct mlx5_core_dev *mdev = priv->mdev;
 	bool was_opened;
-	int max_mtu;
+	u16 max_mtu;
+	u16 min_mtu;
 	int err = 0;
 	mlx5_query_port_max_mtu(mdev, &max_mtu, 1);
 	max_mtu = MLX5E_HW2SW_MTU(max_mtu);
+	min_mtu = MLX5E_HW2SW_MTU(MXL5E_MIN_MTU);
-	if (new_mtu > max_mtu) {
+	if (new_mtu > max_mtu || new_mtu < min_mtu) {
 		netdev_err(netdev,
-			   "%s: Bad MTU (%d) > (%d) Max\n",
+			   "%s: Bad MTU (%d), valid range is: [%d..%d]\n",
-			   __func__, new_mtu, max_mtu);
+			   __func__, new_mtu, min_mtu, max_mtu);
 		return -EINVAL;
 	}
 	if (!mlx5e_vxlan_allowed(priv->mdev))
 		return;
-	mlx5e_vxlan_add_port(priv, be16_to_cpu(port));
+	mlx5e_vxlan_queue_work(priv, sa_family, be16_to_cpu(port), 1);
 }
 static void mlx5e_del_vxlan_port(struct net_device *netdev,
 	if (!mlx5e_vxlan_allowed(priv->mdev))
 		return;
-	mlx5e_vxlan_del_port(priv, be16_to_cpu(port));
+	mlx5e_vxlan_queue_work(priv, sa_family, be16_to_cpu(port), 0);
 }
 static netdev_features_t mlx5e_vxlan_features_check(struct mlx5e_priv *priv,
 	priv = netdev_priv(netdev);
+	priv->wq = create_singlethread_workqueue("mlx5e");
+	if (!priv->wq)
+		goto err_free_netdev;
 	err = mlx5_alloc_map_uar(mdev, &priv->cq_uar, false);
 	if (err) {
 		mlx5_core_err(mdev, "alloc_map uar failed, %d\n", err);
-		goto err_free_netdev;
+		goto err_destroy_wq;
 	}
 	err = mlx5_core_alloc_pd(mdev, &priv->pdn);
 		vxlan_get_rx_port(netdev);
 	mlx5e_enable_async_events(priv);
-	schedule_work(&priv->set_rx_mode_work);
+	queue_work(priv->wq, &priv->set_rx_mode_work);
 	return priv;
 err_unmap_free_uar:
 	mlx5_unmap_free_uar(mdev, &priv->cq_uar);
+err_destroy_wq:
+	destroy_workqueue(priv->wq);
 err_free_netdev:
 	free_netdev(netdev);
 	set_bit(MLX5E_STATE_DESTROYING, &priv->state);
-	schedule_work(&priv->set_rx_mode_work);
+	queue_work(priv->wq, &priv->set_rx_mode_work);
 	mlx5e_disable_async_events(priv);
-	flush_scheduled_work();
+	flush_workqueue(priv->wq);
-	unregister_netdev(netdev);
+	if (test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state)) {
+		netif_device_detach(netdev);
+		mutex_lock(&priv->state_lock);
+		if (test_bit(MLX5E_STATE_OPENED, &priv->state))
+			mlx5e_close_locked(netdev);
+		mutex_unlock(&priv->state_lock);
+	} else {
+		unregister_netdev(netdev);
+	}
 	mlx5e_tc_cleanup(priv);
 	mlx5e_vxlan_cleanup(priv);
 	mlx5e_destroy_flow_tables(priv);
 	mlx5_core_dealloc_transport_domain(priv->mdev, priv->tdn);
 	mlx5_core_dealloc_pd(priv->mdev, priv->pdn);
 	mlx5_unmap_free_uar(priv->mdev, &priv->cq_uar);
-	free_netdev(netdev);
+	cancel_delayed_work_sync(&priv->update_stats_work);
+	destroy_workqueue(priv->wq);
+	if (!test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state))
+		free_netdev(netdev);
 }
 static void *mlx5e_get_netdev(void *vpriv)

drivers/net/ethernet/mellanox/mlx5/core/fs_core.c+18−30

 	return rule;
 }
-static struct mlx5_flow_rule *add_rule_to_auto_fg(struct mlx5_flow_table *ft,
-						  u8 match_criteria_enable,
-						  u32 *match_criteria,
-						  u32 *match_value,
-						  u8 action,
-						  u32 flow_tag,
-						  struct mlx5_flow_destination *dest)
-{
-	struct mlx5_flow_rule *rule;
-	struct mlx5_flow_group *g;
-	g = create_autogroup(ft, match_criteria_enable, match_criteria);
-	if (IS_ERR(g))
-		return (void *)g;
-	rule = add_rule_fg(g, match_value,
-			   action, flow_tag, dest);
-	if (IS_ERR(rule)) {
-		/* Remove assumes refcount > 0 and autogroup creates a group
-		 * with a refcount = 0.
-		 */
-		tree_get_node(&g->node);
-		tree_remove_node(&g->node);
-	}
-	return rule;
-}
 static struct mlx5_flow_rule *
 _mlx5_add_flow_rule(struct mlx5_flow_table *ft,
 		    u8 match_criteria_enable,
 				goto unlock;
 		}
-	rule = add_rule_to_auto_fg(ft, match_criteria_enable, match_criteria,
+	g = create_autogroup(ft, match_criteria_enable, match_criteria);
-				   match_value, action, flow_tag, dest);
+	if (IS_ERR(g)) {
+		rule = (void *)g;
+		goto unlock;
+	}
+	rule = add_rule_fg(g, match_value,
+			   action, flow_tag, dest);
+	if (IS_ERR(rule)) {
+		/* Remove assumes refcount > 0 and autogroup creates a group
+		 * with a refcount = 0.
+		 */
+		unlock_ref_node(&ft->node);
+		tree_get_node(&g->node);
+		tree_remove_node(&g->node);
+		return rule;
+	}
 unlock:
 	unlock_ref_node(&ft->node);
 	return rule;
 {
 	struct mlx5_flow_root_namespace *root_ns = dev->priv.root_ns;
 	int prio;
-	static struct fs_prio *fs_prio;
+	struct fs_prio *fs_prio;
 	struct mlx5_flow_namespace *ns;
 	if (!root_ns)

drivers/net/ethernet/mellanox/mlx5/core/main.c+21−4

 	int err;
 	mutex_lock(&dev->intf_state_mutex);
-	if (dev->interface_state == MLX5_INTERFACE_STATE_UP) {
+	if (test_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state)) {
 		dev_warn(&dev->pdev->dev, "%s: interface is up, NOP\n",
 			 __func__);
 		goto out;
 	if (err)
 		pr_info("failed request module on %s\n", MLX5_IB_MOD);
-	dev->interface_state = MLX5_INTERFACE_STATE_UP;
+	clear_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state);
+	set_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state);
 out:
 	mutex_unlock(&dev->intf_state_mutex);
 	}
 	mutex_lock(&dev->intf_state_mutex);
-	if (dev->interface_state == MLX5_INTERFACE_STATE_DOWN) {
+	if (test_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state)) {
 		dev_warn(&dev->pdev->dev, "%s: interface is down, NOP\n",
 			 __func__);
 		goto out;
 	mlx5_cmd_cleanup(dev);
 out:
-	dev->interface_state = MLX5_INTERFACE_STATE_DOWN;
+	clear_bit(MLX5_INTERFACE_STATE_UP, &dev->intf_state);
+	set_bit(MLX5_INTERFACE_STATE_DOWN, &dev->intf_state);
 	mutex_unlock(&dev->intf_state_mutex);
 	return err;
 }
 	.resume		= mlx5_pci_resume
 };
+static void shutdown(struct pci_dev *pdev)
+{
+	struct mlx5_core_dev *dev  = pci_get_drvdata(pdev);
+	struct mlx5_priv *priv = &dev->priv;
+	dev_info(&pdev->dev, "Shutdown was called\n");
+	/* Notify mlx5 clients that the kernel is being shut down */
+	set_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &dev->intf_state);
+	mlx5_unload_one(dev, priv);
+	mlx5_pci_disable_device(dev);
+}
 static const struct pci_device_id mlx5_core_pci_table[] = {
 	{ PCI_VDEVICE(MELLANOX, 0x1011) },			/* Connect-IB */
 	{ PCI_VDEVICE(MELLANOX, 0x1012), MLX5_PCI_DEV_IS_VF},	/* Connect-IB VF */
 	{ PCI_VDEVICE(MELLANOX, 0x1014), MLX5_PCI_DEV_IS_VF},	/* ConnectX-4 VF */
 	{ PCI_VDEVICE(MELLANOX, 0x1015) },			/* ConnectX-4LX */
 	{ PCI_VDEVICE(MELLANOX, 0x1016), MLX5_PCI_DEV_IS_VF},	/* ConnectX-4LX VF */
+	{ PCI_VDEVICE(MELLANOX, 0x1017) },			/* ConnectX-5 */
+	{ PCI_VDEVICE(MELLANOX, 0x1018), MLX5_PCI_DEV_IS_VF},	/* ConnectX-5 VF */
 	{ 0, }
 };
 	.id_table       = mlx5_core_pci_table,
 	.probe          = init_one,
 	.remove         = remove_one,
+	.shutdown	= shutdown,
 	.err_handler	= &mlx5_err_handler,
 	.sriov_configure   = mlx5_core_sriov_configure,
 };

drivers/net/ethernet/mellanox/mlx5/core/port.c+5−5

drivers/net/ethernet/mellanox/mlx5/core/uar.c+4−2

 void mlx5_unmap_free_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar)
 {
-	iounmap(uar->map);
+	if (uar->map)
-	iounmap(uar->bf_map);
+		iounmap(uar->map);
+	else
+		iounmap(uar->bf_map);
 	mlx5_cmd_free_uar(mdev, uar->index);
 }
 EXPORT_SYMBOL(mlx5_unmap_free_uar);

drivers/net/ethernet/mellanox/mlx5/core/vport.c+40−0

@@ -196,6 +196,46 @@ int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *mdev, · 195 unmodified lines
196	}	196	}
197	EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);	197	EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mac_address);
198		198
		199	int mlx5_query_nic_vport_mtu(struct mlx5_core_dev mdev, u16 mtu)
		200	{
		201	int outlen = MLX5_ST_SZ_BYTES(query_nic_vport_context_out);
		202	u32 *out;
		203	int err;
		204
		205	out = mlx5_vzalloc(outlen);
		206	if (!out)
		207	return -ENOMEM;
		208
		209	err = mlx5_query_nic_vport_context(mdev, 0, out, outlen);
		210	if (!err)
		211	*mtu = MLX5_GET(query_nic_vport_context_out, out,
		212	nic_vport_context.mtu);
		213
		214	kvfree(out);
		215	return err;
		216	}
		217	EXPORT_SYMBOL_GPL(mlx5_query_nic_vport_mtu);
		218
		219	int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu)
		220	{
		221	int inlen = MLX5_ST_SZ_BYTES(modify_nic_vport_context_in);
		222	void *in;
		223	int err;
		224
		225	in = mlx5_vzalloc(inlen);
		226	if (!in)
		227	return -ENOMEM;
		228
		229	MLX5_SET(modify_nic_vport_context_in, in, field_select.mtu, 1);
		230	MLX5_SET(modify_nic_vport_context_in, in, nic_vport_context.mtu, mtu);
		231
		232	err = mlx5_modify_nic_vport_context(mdev, in, inlen);
		233
		234	kvfree(in);
		235	return err;
		236	}
		237	EXPORT_SYMBOL_GPL(mlx5_modify_nic_vport_mtu);
		238
199	int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,	239	int mlx5_query_nic_vport_mac_list(struct mlx5_core_dev *dev,
200	u32 vport,	240	u32 vport,
201	enum mlx5_list_type list_type,	241	enum mlx5_list_type list_type,

drivers/net/ethernet/mellanox/mlx5/core/vxlan.c+38−12

 	return vxlan;
 }
-int mlx5e_vxlan_add_port(struct mlx5e_priv *priv, u16 port)
+static void mlx5e_vxlan_add_port(struct work_struct *work)
 {
+	struct mlx5e_vxlan_work *vxlan_work =
+		container_of(work, struct mlx5e_vxlan_work, work);
+	struct mlx5e_priv *priv = vxlan_work->priv;
 	struct mlx5e_vxlan_db *vxlan_db = &priv->vxlan;
+	u16 port = vxlan_work->port;
 	struct mlx5e_vxlan *vxlan;
 	int err;
-	err = mlx5e_vxlan_core_add_port_cmd(priv->mdev, port);
+	if (mlx5e_vxlan_core_add_port_cmd(priv->mdev, port))
-	if (err)
+		goto free_work;
-		return err;
 	vxlan = kzalloc(sizeof(*vxlan), GFP_KERNEL);
-	if (!vxlan) {
+	if (!vxlan)
-		err = -ENOMEM;
 		goto err_delete_port;
-	}
 	vxlan->udp_port = port;
 	if (err)
 		goto err_free;
-	return 0;
+	goto free_work;
 err_free:
 	kfree(vxlan);
 err_delete_port:
 	mlx5e_vxlan_core_del_port_cmd(priv->mdev, port);
-	return err;
+free_work:
+	kfree(vxlan_work);
 }
 static void __mlx5e_vxlan_core_del_port(struct mlx5e_priv *priv, u16 port)
 	kfree(vxlan);
 }
-void mlx5e_vxlan_del_port(struct mlx5e_priv *priv, u16 port)
+static void mlx5e_vxlan_del_port(struct work_struct *work)
 {
-	if (!mlx5e_vxlan_lookup_port(priv, port))
+	struct mlx5e_vxlan_work *vxlan_work =
-		return;
+		container_of(work, struct mlx5e_vxlan_work, work);
+	struct mlx5e_priv *priv = vxlan_work->priv;
+	u16 port = vxlan_work->port;
 	__mlx5e_vxlan_core_del_port(priv, port);
+	kfree(vxlan_work);
+}
+void mlx5e_vxlan_queue_work(struct mlx5e_priv *priv, sa_family_t sa_family,
+			    u16 port, int add)
+{
+	struct mlx5e_vxlan_work *vxlan_work;
+	vxlan_work = kmalloc(sizeof(*vxlan_work), GFP_ATOMIC);
+	if (!vxlan_work)
+		return;
+	if (add)
+		INIT_WORK(&vxlan_work->work, mlx5e_vxlan_add_port);
+	else
+		INIT_WORK(&vxlan_work->work, mlx5e_vxlan_del_port);
+	vxlan_work->priv = priv;
+	vxlan_work->port = port;
+	vxlan_work->sa_family = sa_family;
+	queue_work(priv->wq, &vxlan_work->work);
 }
 void mlx5e_vxlan_cleanup(struct mlx5e_priv *priv)

drivers/net/ethernet/mellanox/mlx5/core/vxlan.h+9−2

 	u16 udp_port;
 };
+struct mlx5e_vxlan_work {
+	struct work_struct	work;
+	struct mlx5e_priv	*priv;
+	sa_family_t		sa_family;
+	u16			port;
+};
 static inline bool mlx5e_vxlan_allowed(struct mlx5_core_dev *mdev)
 {
 	return (MLX5_CAP_ETH(mdev, tunnel_stateless_vxlan) &&
 }
 void mlx5e_vxlan_init(struct mlx5e_priv *priv);
-int  mlx5e_vxlan_add_port(struct mlx5e_priv *priv, u16 port);
+void mlx5e_vxlan_queue_work(struct mlx5e_priv *priv, sa_family_t sa_family,
-void mlx5e_vxlan_del_port(struct mlx5e_priv *priv, u16 port);
+			    u16 port, int add);
 struct mlx5e_vxlan *mlx5e_vxlan_lookup_port(struct mlx5e_priv *priv, u16 port);
 void mlx5e_vxlan_cleanup(struct mlx5e_priv *priv);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c+2−2

 	del_timer_sync(&mgp->watchdog_timer);
 	mgp->running = MYRI10GE_ETH_STOPPING;
-	local_bh_disable(); /* myri10ge_ss_lock_napi needs bh disabled */
 	for (i = 0; i < mgp->num_slices; i++) {
 		napi_disable(&mgp->ss[i].napi);
+		local_bh_disable(); /* myri10ge_ss_lock_napi needs this */
 		/* Lock the slice to prevent the busy_poll handler from
 		 * accessing it.  Later when we bring the NIC up, myri10ge_open
 		 * resets the slice including this lock.
 			pr_info("Slice %d locked\n", i);
 			mdelay(1);
 		}
+		local_bh_enable();
 	}
-	local_bh_enable();
 	netif_carrier_off(dev);
 	netif_tx_stop_all_queues(dev);

drivers/net/ethernet/qlogic/qlcnic/qlcnic.h+2−2

@@ -37,8 +37,8 @@ · 36 unmodified lines
37		37
38	#define _QLCNIC_LINUX_MAJOR 5	38	#define _QLCNIC_LINUX_MAJOR 5
39	#define _QLCNIC_LINUX_MINOR 3	39	#define _QLCNIC_LINUX_MINOR 3
40	#define _QLCNIC_LINUX_SUBVERSION 63	40	#define _QLCNIC_LINUX_SUBVERSION 64
41	#define QLCNIC_LINUX_VERSIONID "5.3.63"	41	#define QLCNIC_LINUX_VERSIONID "5.3.64"
42	#define QLCNIC_DRV_IDC_VER 0x01	42	#define QLCNIC_DRV_IDC_VER 0x01
43	#define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) \|\	43	#define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) \|\
44	(_QLCNIC_LINUX_MINOR << 8) \| (_QLCNIC_LINUX_SUBVERSION))	44	(_QLCNIC_LINUX_MINOR << 8) \| (_QLCNIC_LINUX_SUBVERSION))

drivers/net/ethernet/sfc/ef10.c+13−2

 		return 0;
 	}
+	if (nic_data->datapath_caps &
+	    1 << MC_CMD_GET_CAPABILITIES_OUT_RX_RSS_LIMITED_LBN)
+		return -EOPNOTSUPP;
 	MCDI_SET_DWORD(inbuf, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
 		       nic_data->vport_id);
 	MCDI_SET_DWORD(inbuf, RSS_CONTEXT_ALLOC_IN_TYPE, alloc_type);
 				      bool replacing)
 {
 	struct efx_ef10_nic_data *nic_data = efx->nic_data;
+	u32 flags = spec->flags;
 	memset(inbuf, 0, MC_CMD_FILTER_OP_IN_LEN);
+	/* Remove RSS flag if we don't have an RSS context. */
+	if (flags & EFX_FILTER_FLAG_RX_RSS &&
+	    spec->rss_context == EFX_FILTER_RSS_CONTEXT_DEFAULT &&
+	    nic_data->rx_rss_context == EFX_EF10_RSS_CONTEXT_INVALID)
+		flags &= ~EFX_FILTER_FLAG_RX_RSS;
 	if (replacing) {
 		MCDI_SET_DWORD(inbuf, FILTER_OP_IN_OP,
 			       MC_CMD_FILTER_OP_IN_OP_REPLACE);
 		       spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP ?
 		       0 : spec->dmaq_id);
 	MCDI_SET_DWORD(inbuf, FILTER_OP_IN_RX_MODE,
-		       (spec->flags & EFX_FILTER_FLAG_RX_RSS) ?
+		       (flags & EFX_FILTER_FLAG_RX_RSS) ?
 		       MC_CMD_FILTER_OP_IN_RX_MODE_RSS :
 		       MC_CMD_FILTER_OP_IN_RX_MODE_SIMPLE);
-	if (spec->flags & EFX_FILTER_FLAG_RX_RSS)
+	if (flags & EFX_FILTER_FLAG_RX_RSS)
 		MCDI_SET_DWORD(inbuf, FILTER_OP_IN_RX_CONTEXT,
 			       spec->rss_context !=
 			       EFX_FILTER_RSS_CONTEXT_DEFAULT ?

drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c+16−34

 	u32	reg_shift;
 	struct	device *dev;
 	struct regmap *sys_mgr_base_addr;
-	struct reset_control *stmmac_rst;
 	void __iomem *splitter_base;
 	bool f2h_ptp_ref_clk;
 };
 	struct device_node *np_splitter;
 	struct resource res_splitter;
-	dwmac->stmmac_rst = devm_reset_control_get(dev,
-						  STMMAC_RESOURCE_NAME);
-	if (IS_ERR(dwmac->stmmac_rst)) {
-		dev_info(dev, "Could not get reset control!\n");
-		if (PTR_ERR(dwmac->stmmac_rst) == -EPROBE_DEFER)
-			return -EPROBE_DEFER;
-		dwmac->stmmac_rst = NULL;
-	}
 	dwmac->interface = of_get_phy_mode(np);
 	sys_mgr_base_addr = syscon_regmap_lookup_by_phandle(np, "altr,sysmgr-syscon");
 	return 0;
 }
-static void socfpga_dwmac_exit(struct platform_device *pdev, void *priv)
-{
-	struct socfpga_dwmac	*dwmac = priv;
-	/* On socfpga platform exit, assert and hold reset to the
-	 * enet controller - the default state after a hard reset.
-	 */
-	if (dwmac->stmmac_rst)
-		reset_control_assert(dwmac->stmmac_rst);
-}
 static int socfpga_dwmac_init(struct platform_device *pdev, void *priv)
 {
-	struct socfpga_dwmac	*dwmac = priv;
+	struct socfpga_dwmac *dwmac = priv;
 	struct net_device *ndev = platform_get_drvdata(pdev);
 	struct stmmac_priv *stpriv = NULL;
 	int ret = 0;
-	if (ndev)
+	if (!ndev)
-		stpriv = netdev_priv(ndev);
+		return -EINVAL;
+	stpriv = netdev_priv(ndev);
+	if (!stpriv)
+		return -EINVAL;
 	/* Assert reset to the enet controller before changing the phy mode */
-	if (dwmac->stmmac_rst)
+	if (stpriv->stmmac_rst)
-		reset_control_assert(dwmac->stmmac_rst);
+		reset_control_assert(stpriv->stmmac_rst);
 	/* Setup the phy mode in the system manager registers according to
 	 * devicetree configuration
 	/* Deassert reset for the phy configuration to be sampled by
 	 * the enet controller, and operation to start in requested mode
 	 */
-	if (dwmac->stmmac_rst)
+	if (stpriv->stmmac_rst)
-		reset_control_deassert(dwmac->stmmac_rst);
+		reset_control_deassert(stpriv->stmmac_rst);
 	/* Before the enet controller is suspended, the phy is suspended.
 	 * This causes the phy clock to be gated. The enet controller is
 	 * control register 0, and can be modified by the phy driver
 	 * framework.
 	 */
-	if (stpriv && stpriv->phydev)
+	if (stpriv->phydev)
 		phy_resume(stpriv->phydev);
 	return ret;
 	plat_dat->bsp_priv = dwmac;
 	plat_dat->init = socfpga_dwmac_init;
-	plat_dat->exit = socfpga_dwmac_exit;
 	plat_dat->fix_mac_speed = socfpga_dwmac_fix_mac_speed;
-	ret = socfpga_dwmac_init(pdev, plat_dat->bsp_priv);
+	ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
-	if (ret)
+	if (!ret)
-		return ret;
+		ret = socfpga_dwmac_init(pdev, dwmac);
-	return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+	return ret;
 }
 static const struct of_device_id socfpga_dwmac_match[] = {

drivers/net/ethernet/ti/cpsw.c+36−31

@@ -367,7 +367,6 @@ struct cpsw_priv { · 366 unmodified lines
367	spinlock_t lock;	367	spinlock_t lock;
368	struct platform_device *pdev;	368	struct platform_device *pdev;
369	struct net_device *ndev;	369	struct net_device *ndev;
370	struct device_node *phy_node;
371	struct napi_struct napi_rx;	370	struct napi_struct napi_rx;
372	struct napi_struct napi_tx;	371	struct napi_struct napi_tx;
373	struct device *dev;	372	struct device *dev;
@@ -1148,25 +1147,34 @@ static void cpsw_slave_open(struct cpsw_slave slave, struct cpsw_priv priv) · 774 unmodified lines
1148	cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,	1147	cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
1149	1 << slave_port, 0, 0, ALE_MCAST_FWD_2);	1148	1 << slave_port, 0, 0, ALE_MCAST_FWD_2);
1150		1149
1151	if (priv->phy_node)	1150	if (slave->data->phy_node) {
1152	slave->phy = of_phy_connect(priv->ndev, priv->phy_node,	1151	slave->phy = of_phy_connect(priv->ndev, slave->data->phy_node,
1153	&cpsw_adjust_link, 0, slave->data->phy_if);	1152	&cpsw_adjust_link, 0, slave->data->phy_if);
1154	else	1153	if (!slave->phy) {
		1154	dev_err(priv->dev, "phy \"%s\" not found on slave %d\n",
		1155	slave->data->phy_node->full_name,
		1156	slave->slave_num);
		1157	return;
		1158	}
		1159	} else {
1155	slave->phy = phy_connect(priv->ndev, slave->data->phy_id,	1160	slave->phy = phy_connect(priv->ndev, slave->data->phy_id,
1156	&cpsw_adjust_link, slave->data->phy_if);	1161	&cpsw_adjust_link, slave->data->phy_if);
1157	if (IS_ERR(slave->phy)) {	1162	if (IS_ERR(slave->phy)) {
1158	dev_err(priv->dev, "phy %s not found on slave %d\n",	1163	dev_err(priv->dev,
1159	slave->data->phy_id, slave->slave_num);	1164	"phy \"%s\" not found on slave %d, err %ld\n",
1160	slave->phy = NULL;	1165	slave->data->phy_id, slave->slave_num,
1161	} else {	1166	PTR_ERR(slave->phy));
1162	phy_attached_info(slave->phy);	1167	slave->phy = NULL;
		1168	return;
		1169	}
		1170	}
1163		1171
1164	phy_start(slave->phy);	1172	phy_attached_info(slave->phy);
1165		1173
1166	/* Configure GMII_SEL register */	1174	phy_start(slave->phy);
1167	cpsw_phy_sel(&priv->pdev->dev, slave->phy->interface,	1175
1168	slave->slave_num);	1176	/* Configure GMII_SEL register */
1169	}	1177	cpsw_phy_sel(&priv->pdev->dev, slave->phy->interface, slave->slave_num);
1170	}	1178	}
1171		1179
1172	static inline void cpsw_add_default_vlan(struct cpsw_priv *priv)	1180	static inline void cpsw_add_default_vlan(struct cpsw_priv *priv)
@@ -1940,12 +1948,11 @@ static void cpsw_slave_init(struct cpsw_slave slave, struct cpsw_priv priv, · 767 unmodified lines
1940	slave->port_vlan = data->dual_emac_res_vlan;	1948	slave->port_vlan = data->dual_emac_res_vlan;
1941	}	1949	}
1942		1950
1943	static int cpsw_probe_dt(struct cpsw_priv *priv,	1951	static int cpsw_probe_dt(struct cpsw_platform_data *data,
1944	struct platform_device *pdev)	1952	struct platform_device *pdev)
1945	{	1953	{
1946	struct device_node *node = pdev->dev.of_node;	1954	struct device_node *node = pdev->dev.of_node;
1947	struct device_node *slave_node;	1955	struct device_node *slave_node;
1948	struct cpsw_platform_data *data = &priv->data;
1949	int i = 0, ret;	1956	int i = 0, ret;
1950	u32 prop;	1957	u32 prop;
1951		1958
@@ -2033,25 +2040,21 @@ static int cpsw_probe_dt(struct cpsw_priv *priv, · 81 unmodified lines
2033	if (strcmp(slave_node->name, "slave"))	2040	if (strcmp(slave_node->name, "slave"))
2034	continue;	2041	continue;
2035		2042
2036	priv->phy_node = of_parse_phandle(slave_node, "phy-handle", 0);	2043	slave_data->phy_node = of_parse_phandle(slave_node,
		2044	"phy-handle", 0);
2037	parp = of_get_property(slave_node, "phy_id", &lenp);	2045	parp = of_get_property(slave_node, "phy_id", &lenp);
2038	if (of_phy_is_fixed_link(slave_node)) {	2046	if (slave_data->phy_node) {
2039	struct device_node *phy_node;	2047	dev_dbg(&pdev->dev,
2040	struct phy_device *phy_dev;	2048	"slave[%d] using phy-handle=\"%s\"\n",
2041		2049	i, slave_data->phy_node->full_name);
		2050	} else if (of_phy_is_fixed_link(slave_node)) {
2042	/* In the case of a fixed PHY, the DT node associated	2051	/* In the case of a fixed PHY, the DT node associated
2043	* to the PHY is the Ethernet MAC DT node.	2052	* to the PHY is the Ethernet MAC DT node.
2044	*/	2053	*/
2045	ret = of_phy_register_fixed_link(slave_node);	2054	ret = of_phy_register_fixed_link(slave_node);
2046	if (ret)	2055	if (ret)
2047	return ret;	2056	return ret;
2048	phy_node = of_node_get(slave_node);	2057	slave_data->phy_node = of_node_get(slave_node);
2049	phy_dev = of_phy_find_device(phy_node);
2050	if (!phy_dev)
2051	return -ENODEV;
2052	snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),
2053	PHY_ID_FMT, phy_dev->mdio.bus->id,
2054	phy_dev->mdio.addr);
2055	} else if (parp) {	2058	} else if (parp) {
2056	u32 phyid;	2059	u32 phyid;
2057	struct device_node *mdio_node;	2060	struct device_node *mdio_node;
@@ -2072,7 +2075,9 @@ static int cpsw_probe_dt(struct cpsw_priv *priv, · 14 unmodified lines
2072	snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),	2075	snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),
2073	PHY_ID_FMT, mdio->name, phyid);	2076	PHY_ID_FMT, mdio->name, phyid);
2074	} else {	2077	} else {
2075	dev_err(&pdev->dev, "No slave[%d] phy_id or fixed-link property\n", i);	2078	dev_err(&pdev->dev,
		2079	"No slave[%d] phy_id, phy-handle, or fixed-link property\n",
		2080	i);
2076	goto no_phy_slave;	2081	goto no_phy_slave;
2077	}	2082	}
2078	slave_data->phy_if = of_get_phy_mode(slave_node);	2083	slave_data->phy_if = of_get_phy_mode(slave_node);
@@ -2275,7 +2280,7 @@ static int cpsw_probe(struct platform_device *pdev) · 196 unmodified lines
2275	/* Select default pin state */	2280	/* Select default pin state */
2276	pinctrl_pm_select_default_state(&pdev->dev);	2281	pinctrl_pm_select_default_state(&pdev->dev);
2277		2282
2278	if (cpsw_probe_dt(priv, pdev)) {	2283	if (cpsw_probe_dt(&priv->data, pdev)) {
2279	dev_err(&pdev->dev, "cpsw: platform data missing\n");	2284	dev_err(&pdev->dev, "cpsw: platform data missing\n");
2280	ret = -ENODEV;	2285	ret = -ENODEV;
2281	goto clean_runtime_disable_ret;	2286	goto clean_runtime_disable_ret;

drivers/net/ethernet/ti/cpsw.h+1−0

@@ -18,6 +18,7 @@ · 17 unmodified lines
18	#include <linux/phy.h>	18	#include <linux/phy.h>
19		19
20	struct cpsw_slave_data {	20	struct cpsw_slave_data {
		21	struct device_node *phy_node;
21	char phy_id[MII_BUS_ID_SIZE];	22	char phy_id[MII_BUS_ID_SIZE];
22	int phy_if;	23	int phy_if;
23	u8 mac_addr[ETH_ALEN];	24	u8 mac_addr[ETH_ALEN];

drivers/net/ethernet/ti/davinci_emac.c+4−1

@@ -1512,7 +1512,10 @@ static int emac_devioctl(struct net_device ndev, struct ifreq ifrq, int cmd) · 1511 unmodified lines
1512		1512
1513	/* TODO: Add phy read and write and private statistics get feature */	1513	/* TODO: Add phy read and write and private statistics get feature */
1514		1514
1515	return phy_mii_ioctl(priv->phydev, ifrq, cmd);	1515	if (priv->phydev)
		1516	return phy_mii_ioctl(priv->phydev, ifrq, cmd);
		1517	else
		1518	return -EOPNOTSUPP;
1516	}	1519	}
1517		1520
1518	static int match_first_device(struct device dev, void data)	1521	static int match_first_device(struct device dev, void data)

drivers/net/ethernet/toshiba/ps3_gelic_wireless.c+1−1

@@ -1622,7 +1622,7 @@ static void gelic_wl_scan_complete_event(struct gelic_wl_info *wl) · 1621 unmodified lines
1622	continue;	1622	continue;
1623		1623
1624	/* copy hw scan info */	1624	/* copy hw scan info */
1625	memcpy(target->hwinfo, scan_info, scan_info->size);	1625	memcpy(target->hwinfo, scan_info, be16_to_cpu(scan_info->size));
1626	target->essid_len = strnlen(scan_info->essid,	1626	target->essid_len = strnlen(scan_info->essid,
1627	sizeof(scan_info->essid));	1627	sizeof(scan_info->essid));
1628	target->rate_len = 0;	1628	target->rate_len = 0;

drivers/net/macsec.c+42−23

 	macsec_skb_cb(skb)->valid = false;
 	skb = skb_share_check(skb, GFP_ATOMIC);
 	if (!skb)
-		return NULL;
+		return ERR_PTR(-ENOMEM);
 	req = aead_request_alloc(rx_sa->key.tfm, GFP_ATOMIC);
 	if (!req) {
 		kfree_skb(skb);
-		return NULL;
+		return ERR_PTR(-ENOMEM);
 	}
 	hdr = (struct macsec_eth_header *)skb->data;
 		skb = skb_unshare(skb, GFP_ATOMIC);
 		if (!skb) {
 			aead_request_free(req);
-			return NULL;
+			return ERR_PTR(-ENOMEM);
 		}
 	} else {
 		/* integrity only: all headers + data authenticated */
 	dev_hold(dev);
 	ret = crypto_aead_decrypt(req);
 	if (ret == -EINPROGRESS) {
-		return NULL;
+		return ERR_PTR(ret);
 	} else if (ret != 0) {
 		/* decryption/authentication failed
 		 * 10.6 if validateFrames is disabled, deliver anyway
 		 */
 		if (ret != -EBADMSG) {
 			kfree_skb(skb);
-			skb = NULL;
+			skb = ERR_PTR(ret);
 		}
 	} else {
 		macsec_skb_cb(skb)->valid = true;
 	    secy->validate_frames != MACSEC_VALIDATE_DISABLED)
 		skb = macsec_decrypt(skb, dev, rx_sa, sci, secy);
-	if (!skb) {
+	if (IS_ERR(skb)) {
-		macsec_rxsa_put(rx_sa);
+		/* the decrypt callback needs the reference */
+		if (PTR_ERR(skb) != -EINPROGRESS)
+			macsec_rxsa_put(rx_sa);
 		rcu_read_unlock();
 		*pskb = NULL;
 		return RX_HANDLER_CONSUMED;
 			    macsec_extra_len(macsec_skb_cb(skb)->has_sci));
 	macsec_reset_skb(skb, secy->netdev);
-	macsec_rxsa_put(rx_sa);
+	if (rx_sa)
+		macsec_rxsa_put(rx_sa);
 	count_rx(dev, skb->len);
 	rcu_read_unlock();
 	}
 	rx_sa = kmalloc(sizeof(*rx_sa), GFP_KERNEL);
-	if (init_rx_sa(rx_sa, nla_data(tb_sa[MACSEC_SA_ATTR_KEY]), secy->key_len,
+	if (!rx_sa || init_rx_sa(rx_sa, nla_data(tb_sa[MACSEC_SA_ATTR_KEY]),
-		       secy->icv_len)) {
+				 secy->key_len, secy->icv_len)) {
+		kfree(rx_sa);
 		rtnl_unlock();
 		return -ENOMEM;
 	}
 	tx_sa = kmalloc(sizeof(*tx_sa), GFP_KERNEL);
 	if (!tx_sa || init_tx_sa(tx_sa, nla_data(tb_sa[MACSEC_SA_ATTR_KEY]),
 				 secy->key_len, secy->icv_len)) {
+		kfree(tx_sa);
 		rtnl_unlock();
 		return -ENOMEM;
 	}
 		return 1;
 	if (nla_put_sci(skb, MACSEC_SECY_ATTR_SCI, secy->sci) ||
-	    nla_put_u64(skb, MACSEC_SECY_ATTR_CIPHER_SUITE, DEFAULT_CIPHER_ID) ||
+	    nla_put_u64(skb, MACSEC_SECY_ATTR_CIPHER_SUITE,
+			MACSEC_DEFAULT_CIPHER_ID) ||
 	    nla_put_u8(skb, MACSEC_SECY_ATTR_ICV_LEN, secy->icv_len) ||
 	    nla_put_u8(skb, MACSEC_SECY_ATTR_OPER, secy->operational) ||
 	    nla_put_u8(skb, MACSEC_SECY_ATTR_PROTECT, secy->protect_frames) ||
 	if (!hdr)
 		return -EMSGSIZE;
-	rtnl_lock();
+	genl_dump_check_consistent(cb, hdr, &macsec_fam);
 	if (nla_put_u32(skb, MACSEC_ATTR_IFINDEX, dev->ifindex))
 		goto nla_put_failure;
 	nla_nest_end(skb, rxsc_list);
-	rtnl_unlock();
 	genlmsg_end(skb, hdr);
 	return 0;
 nla_put_failure:
-	rtnl_unlock();
 	genlmsg_cancel(skb, hdr);
 	return -EMSGSIZE;
 }
+static int macsec_generation = 1; /* protected by RTNL */
 static int macsec_dump_txsc(struct sk_buff *skb, struct netlink_callback *cb)
 {
 	struct net *net = sock_net(skb->sk);
 	dev_idx = cb->args[0];
 	d = 0;
+	rtnl_lock();
+	cb->seq = macsec_generation;
 	for_each_netdev(net, dev) {
 		struct macsec_secy *secy;
 	}
 done:
+	rtnl_unlock();
 	cb->args[0] = d;
 	return skb->len;
 }
 	struct net_device *real_dev = macsec->real_dev;
 	struct macsec_rxh_data *rxd = macsec_data_rtnl(real_dev);
+	macsec_generation++;
 	unregister_netdevice_queue(dev, head);
 	list_del_rcu(&macsec->secys);
-	if (list_empty(&rxd->secys))
+	if (list_empty(&rxd->secys)) {
 		netdev_rx_handler_unregister(real_dev);
+		kfree(rxd);
+	}
 	macsec_del_dev(macsec);
 }
 		err = netdev_rx_handler_register(real_dev, macsec_handle_frame,
 						 rxd);
-		if (err < 0)
+		if (err < 0) {
+			kfree(rxd);
 			return err;
+		}
 	}
 	list_add_tail_rcu(&macsec->secys, &rxd->secys);
 	if (err < 0)
 		goto del_dev;
+	macsec_generation++;
 	dev_hold(real_dev);
 	return 0;
 static int macsec_validate_attr(struct nlattr *tb[], struct nlattr *data[])
 {
-	u64 csid = DEFAULT_CIPHER_ID;
+	u64 csid = MACSEC_DEFAULT_CIPHER_ID;
 	u8 icv_len = DEFAULT_ICV_LEN;
 	int flag;
 	bool es, scb, sci;
 		icv_len = nla_get_u8(data[IFLA_MACSEC_ICV_LEN]);
 	switch (csid) {
-	case DEFAULT_CIPHER_ID:
+	case MACSEC_DEFAULT_CIPHER_ID:
-	case DEFAULT_CIPHER_ALT:
+	case MACSEC_DEFAULT_CIPHER_ALT:
 		if (icv_len < MACSEC_MIN_ICV_LEN ||
 		    icv_len > MACSEC_MAX_ICV_LEN)
 			return -EINVAL;
 	    nla_get_u8(data[IFLA_MACSEC_VALIDATION]) > MACSEC_VALIDATE_MAX)
 		return -EINVAL;
-	if ((data[IFLA_MACSEC_PROTECT] &&
+	if ((data[IFLA_MACSEC_REPLAY_PROTECT] &&
-	     nla_get_u8(data[IFLA_MACSEC_PROTECT])) &&
+	     nla_get_u8(data[IFLA_MACSEC_REPLAY_PROTECT])) &&
 	    !data[IFLA_MACSEC_WINDOW])
 		return -EINVAL;
 	if (nla_put_sci(skb, IFLA_MACSEC_SCI, secy->sci) ||
 	    nla_put_u8(skb, IFLA_MACSEC_ICV_LEN, secy->icv_len) ||
-	    nla_put_u64(skb, IFLA_MACSEC_CIPHER_SUITE, DEFAULT_CIPHER_ID) ||
+	    nla_put_u64(skb, IFLA_MACSEC_CIPHER_SUITE,
+			MACSEC_DEFAULT_CIPHER_ID) ||
 	    nla_put_u8(skb, IFLA_MACSEC_ENCODING_SA, tx_sc->encoding_sa) ||
 	    nla_put_u8(skb, IFLA_MACSEC_ENCRYPT, tx_sc->encrypt) ||
 	    nla_put_u8(skb, IFLA_MACSEC_PROTECT, secy->protect_frames) ||

drivers/net/phy/at803x.c+18−22

@@ -359,27 +359,25 @@ static void at803x_link_change_notify(struct phy_device *phydev) · 358 unmodified lines
359	* in the FIFO. In such cases, the FIFO enters an error mode it	359	* in the FIFO. In such cases, the FIFO enters an error mode it
360	* cannot recover from by software.	360	* cannot recover from by software.
361	*/	361	*/
362	if (phydev->drv->phy_id == ATH8030_PHY_ID) {	362	if (phydev->state == PHY_NOLINK) {
363	if (phydev->state == PHY_NOLINK) {	363	if (priv->gpiod_reset && !priv->phy_reset) {
364	if (priv->gpiod_reset && !priv->phy_reset) {	364	struct at803x_context context;
365	struct at803x_context context;	365
366		366	at803x_context_save(phydev, &context);
367	at803x_context_save(phydev, &context);	367
368		368	gpiod_set_value(priv->gpiod_reset, 1);
369	gpiod_set_value(priv->gpiod_reset, 1);	369	msleep(1);
370	msleep(1);	370	gpiod_set_value(priv->gpiod_reset, 0);
371	gpiod_set_value(priv->gpiod_reset, 0);	371	msleep(1);
372	msleep(1);	372
373		373	at803x_context_restore(phydev, &context);
374	at803x_context_restore(phydev, &context);	374
375		375	phydev_dbg(phydev, "%s(): phy was reset\n",
376	phydev_dbg(phydev, "%s(): phy was reset\n",	376	__func__);
377	__func__);	377	priv->phy_reset = true;
378	priv->phy_reset = true;
379	}
380	} else {
381	priv->phy_reset = false;
382	}	378	}
		379	} else {
		380	priv->phy_reset = false;
383	}	381	}
384	}	382	}
385		383
@@ -391,7 +389,6 @@ static struct phy_driver at803x_driver[] = { · 5 unmodified lines
391	.phy_id_mask = 0xffffffef,	389	.phy_id_mask = 0xffffffef,
392	.probe = at803x_probe,	390	.probe = at803x_probe,
393	.config_init = at803x_config_init,	391	.config_init = at803x_config_init,
394	.link_change_notify = at803x_link_change_notify,
395	.set_wol = at803x_set_wol,	392	.set_wol = at803x_set_wol,
396	.get_wol = at803x_get_wol,	393	.get_wol = at803x_get_wol,
397	.suspend = at803x_suspend,	394	.suspend = at803x_suspend,
@@ -427,7 +424,6 @@ static struct phy_driver at803x_driver[] = { · 29 unmodified lines
427	.phy_id_mask = 0xffffffef,	424	.phy_id_mask = 0xffffffef,
428	.probe = at803x_probe,	425	.probe = at803x_probe,
429	.config_init = at803x_config_init,	426	.config_init = at803x_config_init,
430	.link_change_notify = at803x_link_change_notify,
431	.set_wol = at803x_set_wol,	427	.set_wol = at803x_set_wol,
432	.get_wol = at803x_get_wol,	428	.get_wol = at803x_get_wol,
433	.suspend = at803x_suspend,	429	.suspend = at803x_suspend,

drivers/net/usb/lan78xx.c+38−6

 	struct lan78xx_net *dev;
 	enum skb_state state;
 	size_t length;
+	int num_of_packet;
 };
 struct usb_context {
 static void lan78xx_link_status_change(struct net_device *net)
 {
-	/* nothing to do */
+	struct phy_device *phydev = net->phydev;
+	int ret, temp;
+	/* At forced 100 F/H mode, chip may fail to set mode correctly
+	 * when cable is switched between long(~50+m) and short one.
+	 * As workaround, set to 10 before setting to 100
+	 * at forced 100 F/H mode.
+	 */
+	if (!phydev->autoneg && (phydev->speed == 100)) {
+		/* disable phy interrupt */
+		temp = phy_read(phydev, LAN88XX_INT_MASK);
+		temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
+		ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
+		temp = phy_read(phydev, MII_BMCR);
+		temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
+		phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
+		temp |= BMCR_SPEED100;
+		phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
+		/* clear pending interrupt generated while workaround */
+		temp = phy_read(phydev, LAN88XX_INT_STS);
+		/* enable phy interrupt back */
+		temp = phy_read(phydev, LAN88XX_INT_MASK);
+		temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
+		ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
+	}
 }
 static int lan78xx_phy_init(struct lan78xx_net *dev)
 	struct lan78xx_net *dev = entry->dev;
 	if (urb->status == 0) {
-		dev->net->stats.tx_packets++;
+		dev->net->stats.tx_packets += entry->num_of_packet;
 		dev->net->stats.tx_bytes += entry->length;
 	} else {
 		dev->net->stats.tx_errors++;
 		return;
 	}
-	skb->protocol = eth_type_trans(skb, dev->net);
 	dev->net->stats.rx_packets++;
 	dev->net->stats.rx_bytes += skb->len;
+	skb->protocol = eth_type_trans(skb, dev->net);
 	netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
 		  skb->len + sizeof(struct ethhdr), skb->protocol);
 	memset(skb->cb, 0, sizeof(struct skb_data));
 	skb_totallen = 0;
 	pkt_cnt = 0;
+	count = 0;
+	length = 0;
 	for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
 		if (skb_is_gso(skb)) {
 			if (pkt_cnt) {
 				/* handle previous packets first */
 				break;
 			}
-			length = skb->len;
+			count = 1;
+			length = skb->len - TX_OVERHEAD;
 			skb2 = skb_dequeue(tqp);
 			goto gso_skb;
 		}
 	for (count = pos = 0; count < pkt_cnt; count++) {
 		skb2 = skb_dequeue(tqp);
 		if (skb2) {
+			length += (skb2->len - TX_OVERHEAD);
 			memcpy(skb->data + pos, skb2->data, skb2->len);
 			pos += roundup(skb2->len, sizeof(u32));
 			dev_kfree_skb(skb2);
 		}
 	}
-	length = skb_totallen;
 gso_skb:
 	urb = usb_alloc_urb(0, GFP_ATOMIC);
 	if (!urb) {
 	entry->urb = urb;
 	entry->dev = dev;
 	entry->length = length;
+	entry->num_of_packet = count;
 	spin_lock_irqsave(&dev->txq.lock, flags);
 	ret = usb_autopm_get_interface_async(dev->intf);

drivers/net/usb/pegasus.c+5−5

@@ -411,7 +411,7 @@ static int enable_net_traffic(struct net_device dev, struct usb_device usb) · 410 unmodified lines
411	int ret;	411	int ret;
412		412
413	read_mii_word(pegasus, pegasus->phy, MII_LPA, &linkpart);	413	read_mii_word(pegasus, pegasus->phy, MII_LPA, &linkpart);
414	data[0] = 0xc9;	414	data[0] = 0xc8; /* TX & RX enable, append status, no CRC */
415	data[1] = 0;	415	data[1] = 0;
416	if (linkpart & (ADVERTISE_100FULL \| ADVERTISE_10FULL))	416	if (linkpart & (ADVERTISE_100FULL \| ADVERTISE_10FULL))
417	data[1] \|= 0x20; /* set full duplex */	417	data[1] \|= 0x20; /* set full duplex */
@@ -497,7 +497,7 @@ static void read_bulk_callback(struct urb *urb) · 79 unmodified lines
497	pkt_len = buf[count - 3] << 8;	497	pkt_len = buf[count - 3] << 8;
498	pkt_len += buf[count - 4];	498	pkt_len += buf[count - 4];
499	pkt_len &= 0xfff;	499	pkt_len &= 0xfff;
500	pkt_len -= 8;	500	pkt_len -= 4;
501	}	501	}
502		502
503	/*	503	/*
@@ -528,7 +528,7 @@ static void read_bulk_callback(struct urb *urb) · 24 unmodified lines
528	goon:	528	goon:
529	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,	529	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,
530	usb_rcvbulkpipe(pegasus->usb, 1),	530	usb_rcvbulkpipe(pegasus->usb, 1),
531	pegasus->rx_skb->data, PEGASUS_MTU + 8,	531	pegasus->rx_skb->data, PEGASUS_MTU,
532	read_bulk_callback, pegasus);	532	read_bulk_callback, pegasus);
533	rx_status = usb_submit_urb(pegasus->rx_urb, GFP_ATOMIC);	533	rx_status = usb_submit_urb(pegasus->rx_urb, GFP_ATOMIC);
534	if (rx_status == -ENODEV)	534	if (rx_status == -ENODEV)
@@ -569,7 +569,7 @@ static void rx_fixup(unsigned long data) · 34 unmodified lines
569	}	569	}
570	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,	570	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,
571	usb_rcvbulkpipe(pegasus->usb, 1),	571	usb_rcvbulkpipe(pegasus->usb, 1),
572	pegasus->rx_skb->data, PEGASUS_MTU + 8,	572	pegasus->rx_skb->data, PEGASUS_MTU,
573	read_bulk_callback, pegasus);	573	read_bulk_callback, pegasus);
574	try_again:	574	try_again:
575	status = usb_submit_urb(pegasus->rx_urb, GFP_ATOMIC);	575	status = usb_submit_urb(pegasus->rx_urb, GFP_ATOMIC);
@@ -823,7 +823,7 @@ static int pegasus_open(struct net_device *net) · 247 unmodified lines
823		823
824	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,	824	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,
825	usb_rcvbulkpipe(pegasus->usb, 1),	825	usb_rcvbulkpipe(pegasus->usb, 1),
826	pegasus->rx_skb->data, PEGASUS_MTU + 8,	826	pegasus->rx_skb->data, PEGASUS_MTU,
827	read_bulk_callback, pegasus);	827	read_bulk_callback, pegasus);
828	if ((res = usb_submit_urb(pegasus->rx_urb, GFP_KERNEL))) {	828	if ((res = usb_submit_urb(pegasus->rx_urb, GFP_KERNEL))) {
829	if (res == -ENODEV)	829	if (res == -ENODEV)

drivers/net/usb/smsc75xx.c+11−1

 #include <linux/crc32.h>
 #include <linux/usb/usbnet.h>
 #include <linux/slab.h>
+#include <linux/of_net.h>
 #include "smsc75xx.h"
 #define SMSC_CHIPNAME			"smsc75xx"
 static void smsc75xx_init_mac_address(struct usbnet *dev)
 {
+	const u8 *mac_addr;
+	/* maybe the boot loader passed the MAC address in devicetree */
+	mac_addr = of_get_mac_address(dev->udev->dev.of_node);
+	if (mac_addr) {
+		memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN);
+		return;
+	}
 	/* try reading mac address from EEPROM */
 	if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 			dev->net->dev_addr) == 0) {
 		}
 	}
-	/* no eeprom, or eeprom values are invalid. generate random MAC */
+	/* no useful static MAC address found. generate a random one */
 	eth_hw_addr_random(dev->net);
 	netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
 }

drivers/net/usb/smsc95xx.c+11−1

 #include <linux/crc32.h>
 #include <linux/usb/usbnet.h>
 #include <linux/slab.h>
+#include <linux/of_net.h>
 #include "smsc95xx.h"
 #define SMSC_CHIPNAME			"smsc95xx"
 static void smsc95xx_init_mac_address(struct usbnet *dev)
 {
+	const u8 *mac_addr;
+	/* maybe the boot loader passed the MAC address in devicetree */
+	mac_addr = of_get_mac_address(dev->udev->dev.of_node);
+	if (mac_addr) {
+		memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN);
+		return;
+	}
 	/* try reading mac address from EEPROM */
 	if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 			dev->net->dev_addr) == 0) {
 		}
 	}
-	/* no eeprom, or eeprom values are invalid. generate random MAC */
+	/* no useful static MAC address found. generate a random one */
 	eth_hw_addr_random(dev->net);
 	netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
 }

drivers/net/wireless/ath/ath9k/ar5008_phy.c+3−5

 	};
 	static const int inc[4] = { 0, 100, 0, 0 };
+	memset(&mask_m, 0, sizeof(int8_t) * 123);
+	memset(&mask_p, 0, sizeof(int8_t) * 123);
 	cur_bin = -6000;
 	upper = bin + 100;
 	lower = bin - 100;
 	int tmp, new;
 	int i;
-	int8_t mask_m[123];
-	int8_t mask_p[123];
 	int cur_bb_spur;
 	bool is2GHz = IS_CHAN_2GHZ(chan);
-	memset(&mask_m, 0, sizeof(int8_t) * 123);
-	memset(&mask_p, 0, sizeof(int8_t) * 123);
 	for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
 		cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
 		if (AR_NO_SPUR == cur_bb_spur)

drivers/net/wireless/ath/ath9k/ar9002_phy.c+0−5

 	int i;
 	struct chan_centers centers;
-	int8_t mask_m[123];
-	int8_t mask_p[123];
 	int cur_bb_spur;
 	bool is2GHz = IS_CHAN_2GHZ(chan);
-	memset(&mask_m, 0, sizeof(int8_t) * 123);
-	memset(&mask_p, 0, sizeof(int8_t) * 123);
 	ath9k_hw_get_channel_centers(ah, chan, &centers);
 	freq = centers.synth_center;

drivers/net/wireless/intel/iwlwifi/iwl-8000.c+1−1

@@ -93,7 +93,7 @@ · 92 unmodified lines
93	#define IWL8260_SMEM_OFFSET 0x400000	93	#define IWL8260_SMEM_OFFSET 0x400000
94	#define IWL8260_SMEM_LEN 0x68000	94	#define IWL8260_SMEM_LEN 0x68000
95		95
96	#define IWL8000_FW_PRE "iwlwifi-8000"	96	#define IWL8000_FW_PRE "iwlwifi-8000C-"
97	#define IWL8000_MODULE_FIRMWARE(api) \	97	#define IWL8000_MODULE_FIRMWARE(api) \
98	IWL8000_FW_PRE "-" __stringify(api) ".ucode"	98	IWL8000_FW_PRE "-" __stringify(api) ".ucode"
99		99

drivers/net/wireless/intel/iwlwifi/iwl-drv.c+10−16

 	snprintf(drv->firmware_name, sizeof(drv->firmware_name), "%s%s.ucode",
 		 name_pre, tag);
-	/*
-	 * Starting 8000B - FW name format has changed. This overwrites the
-	 * previous name and uses the new format.
-	 */
-	if (drv->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
-		char rev_step = 'A' + CSR_HW_REV_STEP(drv->trans->hw_rev);
-		if (rev_step != 'A')
-			snprintf(drv->firmware_name,
-				 sizeof(drv->firmware_name), "%s%c-%s.ucode",
-				 name_pre, rev_step, tag);
-	}
 	IWL_DEBUG_INFO(drv, "attempting to load firmware %s'%s'\n",
 		       (drv->fw_index == UCODE_EXPERIMENTAL_INDEX)
 				? "EXPERIMENTAL " : "",
 		return -EINVAL;
 	}
-	if (WARN(fw_has_capa(capa, IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT) &&
+	/*
-		 !gscan_capa,
+	 * If ucode advertises that it supports GSCAN but GSCAN
-		 "GSCAN is supported but capabilities TLV is unavailable\n"))
+	 * capabilities TLV is not present, or if it has an old format,
+	 * warn and continue without GSCAN.
+	 */
+	if (fw_has_capa(capa, IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT) &&
+	    !gscan_capa) {
+		IWL_DEBUG_INFO(drv,
+			       "GSCAN is supported but capabilities TLV is unavailable\n");
 		__clear_bit((__force long)IWL_UCODE_TLV_CAPA_GSCAN_SUPPORT,
 			    capa->_capa);
+	}
 	return 0;

drivers/net/wireless/intel/iwlwifi/mvm/fw-dbg.c+4−2

 		file_len += sizeof(*dump_data) + sizeof(*dump_mem) + sram2_len;
 	/* Make room for fw's virtual image pages, if it exists */
-	if (mvm->fw->img[mvm->cur_ucode].paging_mem_size)
+	if (mvm->fw->img[mvm->cur_ucode].paging_mem_size &&
+	    mvm->fw_paging_db[0].fw_paging_block)
 		file_len += mvm->num_of_paging_blk *
 			(sizeof(*dump_data) +
 			 sizeof(struct iwl_fw_error_dump_paging) +
 	}
 	/* Dump fw's virtual image */
-	if (mvm->fw->img[mvm->cur_ucode].paging_mem_size) {
+	if (mvm->fw->img[mvm->cur_ucode].paging_mem_size &&
+	    mvm->fw_paging_db[0].fw_paging_block) {
 		for (i = 1; i < mvm->num_of_paging_blk + 1; i++) {
 			struct iwl_fw_error_dump_paging *paging;
 			struct page *pages =

drivers/net/wireless/intel/iwlwifi/mvm/fw.c+2−0

 		__free_pages(mvm->fw_paging_db[i].fw_paging_block,
 			     get_order(mvm->fw_paging_db[i].fw_paging_size));
+		mvm->fw_paging_db[i].fw_paging_block = NULL;
 	}
 	kfree(mvm->trans->paging_download_buf);
 	mvm->trans->paging_download_buf = NULL;
+	mvm->trans->paging_db = NULL;
 	memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db));
 }

drivers/net/wireless/intel/iwlwifi/pcie/drv.c+10−0

@@ -479,8 +479,18 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 478 unmodified lines
479	{IWL_PCI_DEVICE(0x24F3, 0x0930, iwl8260_2ac_cfg)},	479	{IWL_PCI_DEVICE(0x24F3, 0x0930, iwl8260_2ac_cfg)},
480	{IWL_PCI_DEVICE(0x24F3, 0x0000, iwl8265_2ac_cfg)},	480	{IWL_PCI_DEVICE(0x24F3, 0x0000, iwl8265_2ac_cfg)},
481	{IWL_PCI_DEVICE(0x24FD, 0x0010, iwl8265_2ac_cfg)},	481	{IWL_PCI_DEVICE(0x24FD, 0x0010, iwl8265_2ac_cfg)},
		482	{IWL_PCI_DEVICE(0x24FD, 0x0110, iwl8265_2ac_cfg)},
		483	{IWL_PCI_DEVICE(0x24FD, 0x1110, iwl8265_2ac_cfg)},
		484	{IWL_PCI_DEVICE(0x24FD, 0x1010, iwl8265_2ac_cfg)},
		485	{IWL_PCI_DEVICE(0x24FD, 0x0050, iwl8265_2ac_cfg)},
		486	{IWL_PCI_DEVICE(0x24FD, 0x0150, iwl8265_2ac_cfg)},
		487	{IWL_PCI_DEVICE(0x24FD, 0x9010, iwl8265_2ac_cfg)},
		488	{IWL_PCI_DEVICE(0x24FD, 0x8110, iwl8265_2ac_cfg)},
		489	{IWL_PCI_DEVICE(0x24FD, 0x8050, iwl8265_2ac_cfg)},
482	{IWL_PCI_DEVICE(0x24FD, 0x8010, iwl8265_2ac_cfg)},	490	{IWL_PCI_DEVICE(0x24FD, 0x8010, iwl8265_2ac_cfg)},
483	{IWL_PCI_DEVICE(0x24FD, 0x0810, iwl8265_2ac_cfg)},	491	{IWL_PCI_DEVICE(0x24FD, 0x0810, iwl8265_2ac_cfg)},
		492	{IWL_PCI_DEVICE(0x24FD, 0x9110, iwl8265_2ac_cfg)},
		493	{IWL_PCI_DEVICE(0x24FD, 0x8130, iwl8265_2ac_cfg)},
484		494
485	/* 9000 Series */	495	/* 9000 Series */
486	{IWL_PCI_DEVICE(0x9DF0, 0x2A10, iwl5165_2ac_cfg)},	496	{IWL_PCI_DEVICE(0x9DF0, 0x2A10, iwl5165_2ac_cfg)},

drivers/nvdimm/pmem.c+10−3

 	 */
 	start += start_pad;
 	npfns = (pmem->size - start_pad - end_trunc - SZ_8K) / SZ_4K;
-	if (nd_pfn->mode == PFN_MODE_PMEM)
+	if (nd_pfn->mode == PFN_MODE_PMEM) {
-		offset = ALIGN(start + SZ_8K + 64 * npfns, nd_pfn->align)
+		unsigned long memmap_size;
+		/*
+		 * vmemmap_populate_hugepages() allocates the memmap array in
+		 * HPAGE_SIZE chunks.
+		 */
+		memmap_size = ALIGN(64 * npfns, HPAGE_SIZE);
+		offset = ALIGN(start + SZ_8K + memmap_size, nd_pfn->align)
 			- start;
-	else if (nd_pfn->mode == PFN_MODE_RAM)
+	} else if (nd_pfn->mode == PFN_MODE_RAM)
 		offset = ALIGN(start + SZ_8K, nd_pfn->align) - start;
 	else
 		goto err;

drivers/nvmem/mxs-ocotp.c+2−2

@@ -94,7 +94,7 @@ static int mxs_ocotp_read(void context, const void reg, size_t reg_size, · 93 unmodified lines
94	if (ret)	94	if (ret)
95	goto close_banks;	95	goto close_banks;
96		96
97	while (val_size) {	97	while (val_size >= reg_size) {
98	if ((offset < OCOTP_DATA_OFFSET) \|\| (offset % 16)) {	98	if ((offset < OCOTP_DATA_OFFSET) \|\| (offset % 16)) {
99	/* fill up non-data register */	99	/* fill up non-data register */
100	*buf = 0;	100	*buf = 0;
@@ -103,7 +103,7 @@ static int mxs_ocotp_read(void context, const void reg, size_t reg_size, · 2 unmodified lines
103	}	103	}
104		104
105	buf++;	105	buf++;
106	val_size--;	106	val_size -= reg_size;
107	offset += reg_size;	107	offset += reg_size;
108	}	108	}
109		109

drivers/platform/x86/toshiba_acpi.c+1−1

@@ -135,7 +135,7 @@ MODULE_LICENSE("GPL"); · 134 unmodified lines
135	/* Field definitions */	135	/* Field definitions */
136	#define HCI_ACCEL_MASK 0x7fff	136	#define HCI_ACCEL_MASK 0x7fff
137	#define HCI_HOTKEY_DISABLE 0x0b	137	#define HCI_HOTKEY_DISABLE 0x0b
138	#define HCI_HOTKEY_ENABLE 0x01	138	#define HCI_HOTKEY_ENABLE 0x09
139	#define HCI_HOTKEY_SPECIAL_FUNCTIONS 0x10	139	#define HCI_HOTKEY_SPECIAL_FUNCTIONS 0x10
140	#define HCI_LCD_BRIGHTNESS_BITS 3	140	#define HCI_LCD_BRIGHTNESS_BITS 3
141	#define HCI_LCD_BRIGHTNESS_SHIFT (16-HCI_LCD_BRIGHTNESS_BITS)	141	#define HCI_LCD_BRIGHTNESS_SHIFT (16-HCI_LCD_BRIGHTNESS_BITS)

drivers/rapidio/devices/rio_mport_cdev.c+66−53

 	struct list_head node;
 	struct mport_dev *md;
 	enum rio_mport_map_dir dir;
-	u32 rioid;
+	u16 rioid;
 	u64 rio_addr;
 	dma_addr_t phys_addr; /* for mmap */
 	void *virt_addr; /* kernel address, for dma_free_coherent */
 struct rio_mport_dma_map {
 	int valid;
-	uint64_t length;
+	u64 length;
 	void *vaddr;
 	dma_addr_t paddr;
 };
 	struct kfifo            event_fifo;
 	wait_queue_head_t       event_rx_wait;
 	spinlock_t              fifo_lock;
-	unsigned int            event_mask; /* RIO_DOORBELL, RIO_PORTWRITE */
+	u32			event_mask; /* RIO_DOORBELL, RIO_PORTWRITE */
 #ifdef CONFIG_RAPIDIO_DMA_ENGINE
 	struct dma_chan		*dmach;
 	struct list_head	async_list;
 		return -EFAULT;
 	if ((maint_io.offset % 4) ||
-	    (maint_io.length == 0) || (maint_io.length % 4))
+	    (maint_io.length == 0) || (maint_io.length % 4) ||
+	    (maint_io.length + maint_io.offset) > RIO_MAINT_SPACE_SZ)
 		return -EINVAL;
 	buffer = vmalloc(maint_io.length);
 		offset += 4;
 	}
-	if (unlikely(copy_to_user(maint_io.buffer, buffer, maint_io.length)))
+	if (unlikely(copy_to_user((void __user *)(uintptr_t)maint_io.buffer,
+				   buffer, maint_io.length)))
 		ret = -EFAULT;
 out:
 	vfree(buffer);
 		return -EFAULT;
 	if ((maint_io.offset % 4) ||
-	    (maint_io.length == 0) || (maint_io.length % 4))
+	    (maint_io.length == 0) || (maint_io.length % 4) ||
+	    (maint_io.length + maint_io.offset) > RIO_MAINT_SPACE_SZ)
 		return -EINVAL;
 	buffer = vmalloc(maint_io.length);
 		return -ENOMEM;
 	length = maint_io.length;
-	if (unlikely(copy_from_user(buffer, maint_io.buffer, length))) {
+	if (unlikely(copy_from_user(buffer,
+			(void __user *)(uintptr_t)maint_io.buffer, length))) {
 		ret = -EFAULT;
 		goto out;
 	}
  */
 static int
 rio_mport_create_outbound_mapping(struct mport_dev *md, struct file *filp,
-				  u32 rioid, u64 raddr, u32 size,
+				  u16 rioid, u64 raddr, u32 size,
 				  dma_addr_t *paddr)
 {
 	struct rio_mport *mport = md->mport;
 	rmcd_debug(OBW, "did=%d ra=0x%llx sz=0x%x", rioid, raddr, size);
-	map = kzalloc(sizeof(struct rio_mport_mapping), GFP_KERNEL);
+	map = kzalloc(sizeof(*map), GFP_KERNEL);
 	if (map == NULL)
 		return -ENOMEM;
 static int
 rio_mport_get_outbound_mapping(struct mport_dev *md, struct file *filp,
-			       u32 rioid, u64 raddr, u32 size,
+			       u16 rioid, u64 raddr, u32 size,
 			       dma_addr_t *paddr)
 {
 	struct rio_mport_mapping *map;
 	dma_addr_t paddr;
 	int ret;
-	if (unlikely(copy_from_user(&map, arg, sizeof(struct rio_mmap))))
+	if (unlikely(copy_from_user(&map, arg, sizeof(map))))
 		return -EFAULT;
 	rmcd_debug(OBW, "did=%d ra=0x%llx sz=0x%llx",
 	map.handle = paddr;
-	if (unlikely(copy_to_user(arg, &map, sizeof(struct rio_mmap))))
+	if (unlikely(copy_to_user(arg, &map, sizeof(map))))
 		return -EFAULT;
 	return 0;
 }
 	if (!md->mport->ops->unmap_outb)
 		return -EPROTONOSUPPORT;
-	if (copy_from_user(&handle, arg, sizeof(u64)))
+	if (copy_from_user(&handle, arg, sizeof(handle)))
 		return -EFAULT;
 	rmcd_debug(OBW, "h=0x%llx", handle);
 static int maint_hdid_set(struct mport_cdev_priv *priv, void __user *arg)
 {
 	struct mport_dev *md = priv->md;
-	uint16_t hdid;
+	u16 hdid;
-	if (copy_from_user(&hdid, arg, sizeof(uint16_t)))
+	if (copy_from_user(&hdid, arg, sizeof(hdid)))
 		return -EFAULT;
 	md->mport->host_deviceid = hdid;
 static int maint_comptag_set(struct mport_cdev_priv *priv, void __user *arg)
 {
 	struct mport_dev *md = priv->md;
-	uint32_t comptag;
+	u32 comptag;
-	if (copy_from_user(&comptag, arg, sizeof(uint32_t)))
+	if (copy_from_user(&comptag, arg, sizeof(comptag)))
 		return -EFAULT;
 	rio_local_write_config_32(md->mport, RIO_COMPONENT_TAG_CSR, comptag);
  * @xfer: data transfer descriptor structure
  */
 static int
-rio_dma_transfer(struct file *filp, uint32_t transfer_mode,
+rio_dma_transfer(struct file *filp, u32 transfer_mode,
 		 enum rio_transfer_sync sync, enum dma_data_direction dir,
 		 struct rio_transfer_io *xfer)
 {
 		unsigned long offset;
 		long pinned;
-		offset = (unsigned long)xfer->loc_addr & ~PAGE_MASK;
+		offset = (unsigned long)(uintptr_t)xfer->loc_addr & ~PAGE_MASK;
 		nr_pages = PAGE_ALIGN(xfer->length + offset) >> PAGE_SHIFT;
 		page_list = kmalloc_array(nr_pages,
 	if (unlikely(copy_from_user(&transaction, arg, sizeof(transaction))))
 		return -EFAULT;
-	if (transaction.count != 1)
+	if (transaction.count != 1) /* only single transfer for now */
 		return -EINVAL;
 	if ((transaction.transfer_mode &
 	     priv->md->properties.transfer_mode) == 0)
 		return -ENODEV;
-	transfer = vmalloc(transaction.count * sizeof(struct rio_transfer_io));
+	transfer = vmalloc(transaction.count * sizeof(*transfer));
 	if (!transfer)
 		return -ENOMEM;
-	if (unlikely(copy_from_user(transfer, transaction.block,
+	if (unlikely(copy_from_user(transfer,
-	      transaction.count * sizeof(struct rio_transfer_io)))) {
+				    (void __user *)(uintptr_t)transaction.block,
+				    transaction.count * sizeof(*transfer)))) {
 		ret = -EFAULT;
 		goto out_free;
 	}
 		ret = rio_dma_transfer(filp, transaction.transfer_mode,
 			transaction.sync, dir, &transfer[i]);
-	if (unlikely(copy_to_user(transaction.block, transfer,
+	if (unlikely(copy_to_user((void __user *)(uintptr_t)transaction.block,
-	      transaction.count * sizeof(struct rio_transfer_io))))
+				  transfer,
+				  transaction.count * sizeof(*transfer))))
 		ret = -EFAULT;
 out_free:
 }
 static int rio_mport_create_dma_mapping(struct mport_dev *md, struct file *filp,
-			uint64_t size, struct rio_mport_mapping **mapping)
+			u64 size, struct rio_mport_mapping **mapping)
 {
 	struct rio_mport_mapping *map;
-	map = kzalloc(sizeof(struct rio_mport_mapping), GFP_KERNEL);
+	map = kzalloc(sizeof(*map), GFP_KERNEL);
 	if (map == NULL)
 		return -ENOMEM;
 	struct rio_mport_mapping *mapping = NULL;
 	int ret;
-	if (unlikely(copy_from_user(&map, arg, sizeof(struct rio_dma_mem))))
+	if (unlikely(copy_from_user(&map, arg, sizeof(map))))
 		return -EFAULT;
 	ret = rio_mport_create_dma_mapping(md, filp, map.length, &mapping);
 	map.dma_handle = mapping->phys_addr;
-	if (unlikely(copy_to_user(arg, &map, sizeof(struct rio_dma_mem)))) {
+	if (unlikely(copy_to_user(arg, &map, sizeof(map)))) {
 		mutex_lock(&md->buf_mutex);
 		kref_put(&mapping->ref, mport_release_mapping);
 		mutex_unlock(&md->buf_mutex);
 	int ret = -EFAULT;
 	struct rio_mport_mapping *map, *_map;
-	if (copy_from_user(&handle, arg, sizeof(u64)))
+	if (copy_from_user(&handle, arg, sizeof(handle)))
 		return -EFAULT;
 	rmcd_debug(EXIT, "filp=%p", filp);
 static int
 rio_mport_create_inbound_mapping(struct mport_dev *md, struct file *filp,
-				u64 raddr, u32 size,
+				u64 raddr, u64 size,
 				struct rio_mport_mapping **mapping)
 {
 	struct rio_mport *mport = md->mport;
 	struct rio_mport_mapping *map;
 	int ret;
-	map = kzalloc(sizeof(struct rio_mport_mapping), GFP_KERNEL);
+	/* rio_map_inb_region() accepts u32 size */
+	if (size > 0xffffffff)
+		return -EINVAL;
+	map = kzalloc(sizeof(*map), GFP_KERNEL);
 	if (map == NULL)
 		return -ENOMEM;
 	if (raddr == RIO_MAP_ANY_ADDR)
 		raddr = map->phys_addr;
-	ret = rio_map_inb_region(mport, map->phys_addr, raddr, size, 0);
+	ret = rio_map_inb_region(mport, map->phys_addr, raddr, (u32)size, 0);
 	if (ret < 0)
 		goto err_map_inb;
 static int
 rio_mport_get_inbound_mapping(struct mport_dev *md, struct file *filp,
-			      u64 raddr, u32 size,
+			      u64 raddr, u64 size,
 			      struct rio_mport_mapping **mapping)
 {
 	struct rio_mport_mapping *map;
 	if (!md->mport->ops->map_inb)
 		return -EPROTONOSUPPORT;
-	if (unlikely(copy_from_user(&map, arg, sizeof(struct rio_mmap))))
+	if (unlikely(copy_from_user(&map, arg, sizeof(map))))
 		return -EFAULT;
 	rmcd_debug(IBW, "%s filp=%p", dev_name(&priv->md->dev), filp);
 	map.handle = mapping->phys_addr;
 	map.rio_addr = mapping->rio_addr;
-	if (unlikely(copy_to_user(arg, &map, sizeof(struct rio_mmap)))) {
+	if (unlikely(copy_to_user(arg, &map, sizeof(map)))) {
 		/* Delete mapping if it was created by this request */
 		if (ret == 0 && mapping->filp == filp) {
 			mutex_lock(&md->buf_mutex);
 	if (!md->mport->ops->unmap_inb)
 		return -EPROTONOSUPPORT;
-	if (copy_from_user(&handle, arg, sizeof(u64)))
+	if (copy_from_user(&handle, arg, sizeof(handle)))
 		return -EFAULT;
 	mutex_lock(&md->buf_mutex);
 static int maint_port_idx_get(struct mport_cdev_priv *priv, void __user *arg)
 {
 	struct mport_dev *md = priv->md;
-	uint32_t port_idx = md->mport->index;
+	u32 port_idx = md->mport->index;
 	rmcd_debug(MPORT, "port_index=%d", port_idx);
 	handled = 0;
 	spin_lock(&data->db_lock);
 	list_for_each_entry(db_filter, &data->doorbells, data_node) {
-		if (((db_filter->filter.rioid == 0xffffffff ||
+		if (((db_filter->filter.rioid == RIO_INVALID_DESTID ||
 		      db_filter->filter.rioid == src)) &&
 		      info >= db_filter->filter.low &&
 		      info <= db_filter->filter.high) {
 	if (copy_from_user(&filter, arg, sizeof(filter)))
 		return -EFAULT;
+	if (filter.low > filter.high)
+		return -EINVAL;
 	spin_lock_irqsave(&priv->md->db_lock, flags);
 	list_for_each_entry(db_filter, &priv->db_filters, priv_node) {
 		if (db_filter->filter.rioid == filter.rioid &&
 		return -EEXIST;
 	}
-	size = sizeof(struct rio_dev);
+	size = sizeof(*rdev);
 	mport = md->mport;
-	destid = (u16)dev_info.destid;
+	destid = dev_info.destid;
-	hopcount = (u8)dev_info.hopcount;
+	hopcount = dev_info.hopcount;
 	if (rio_mport_read_config_32(mport, destid, hopcount,
 				     RIO_PEF_CAR, &rval))
 		do {
 			rdev = rio_get_comptag(dev_info.comptag, rdev);
 			if (rdev && rdev->dev.parent == &mport->net->dev &&
-			    rdev->destid == (u16)dev_info.destid &&
+			    rdev->destid == dev_info.destid &&
-			    rdev->hopcount == (u8)dev_info.hopcount)
+			    rdev->hopcount == dev_info.hopcount)
 				break;
 		} while (rdev);
 	}
 		return maint_port_idx_get(data, (void __user *)arg);
 	case RIO_MPORT_GET_PROPERTIES:
 		md->properties.hdid = md->mport->host_deviceid;
-		if (copy_to_user((void __user *)arg, &(data->md->properties),
+		if (copy_to_user((void __user *)arg, &(md->properties),
-				 sizeof(data->md->properties)))
+				 sizeof(md->properties)))
 			return -EFAULT;
 		return 0;
 	case RIO_ENABLE_DOORBELL_RANGE:
 	case RIO_DISABLE_PORTWRITE_RANGE:
 		return rio_mport_remove_pw_filter(data, (void __user *)arg);
 	case RIO_SET_EVENT_MASK:
-		data->event_mask = arg;
+		data->event_mask = (u32)arg;
 		return 0;
 	case RIO_GET_EVENT_MASK:
 		if (copy_to_user((void __user *)arg, &data->event_mask,
-				    sizeof(data->event_mask)))
+				    sizeof(u32)))
 			return -EFAULT;
 		return 0;
 	case RIO_MAP_OUTBOUND:
 			return -EINVAL;
 		ret = rio_mport_send_doorbell(mport,
-					      (u16)event.u.doorbell.rioid,
+					      event.u.doorbell.rioid,
 					      event.u.doorbell.payload);
 		if (ret < 0)
 			return ret;
 	struct mport_dev *md;
 	struct rio_mport_attr attr;
-	md = kzalloc(sizeof(struct mport_dev), GFP_KERNEL);
+	md = kzalloc(sizeof(*md), GFP_KERNEL);
 	if (!md) {
 		rmcd_error("Unable allocate a device object");
 		return NULL;
 	/* The transfer_mode property will be returned through mport query
 	 * interface
 	 */
-#ifdef CONFIG_PPC /* for now: only on Freescale's SoCs */
+#ifdef CONFIG_FSL_RIO /* for now: only on Freescale's SoCs */
 	md->properties.transfer_mode |= RIO_TRANSFER_MODE_MAPPED;
 #else
 	md->properties.transfer_mode |= RIO_TRANSFER_MODE_TRANSFER;
 	/* Create device class needed by udev */
 	dev_class = class_create(THIS_MODULE, DRV_NAME);
-	if (!dev_class) {
+	if (IS_ERR(dev_class)) {
 		rmcd_error("Unable to create " DRV_NAME " class");
-		return -EINVAL;
+		return PTR_ERR(dev_class);
 	}
 	ret = alloc_chrdev_region(&dev_number, 0, RIO_MAX_MPORTS, DRV_NAME);

drivers/s390/char/sclp_ctl.c+7−5

 {
 	struct sclp_ctl_sccb ctl_sccb;
 	struct sccb_header *sccb;
+	unsigned long copied;
 	int rc;
 	if (copy_from_user(&ctl_sccb, user_area, sizeof(ctl_sccb)))
 	sccb = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
 	if (!sccb)
 		return -ENOMEM;
-	if (copy_from_user(sccb, u64_to_uptr(ctl_sccb.sccb), sizeof(*sccb))) {
+	copied = PAGE_SIZE -
+		copy_from_user(sccb, u64_to_uptr(ctl_sccb.sccb), PAGE_SIZE);
+	if (offsetof(struct sccb_header, length) +
+	    sizeof(sccb->length) > copied || sccb->length > copied) {
 		rc = -EFAULT;
 		goto out_free;
 	}
-	if (sccb->length > PAGE_SIZE || sccb->length < 8)
+	if (sccb->length < 8) {
-		return -EINVAL;
+		rc = -EINVAL;
-	if (copy_from_user(sccb, u64_to_uptr(ctl_sccb.sccb), sccb->length)) {
-		rc = -EFAULT;
 		goto out_free;
 	}
 	rc = sclp_sync_request(ctl_sccb.cmdw, sccb);

drivers/scsi/cxgbi/libcxgbi.c+1−0

@@ -688,6 +688,7 @@ static struct rt6_info find_route_ipv6(const struct in6_addr saddr, · 687 unmodified lines
688	{	688	{
689	struct flowi6 fl;	689	struct flowi6 fl;
690		690
		691	memset(&fl, 0, sizeof(fl));
691	if (saddr)	692	if (saddr)
692	memcpy(&fl.saddr, saddr, sizeof(struct in6_addr));	693	memcpy(&fl.saddr, saddr, sizeof(struct in6_addr));
693	if (daddr)	694	if (daddr)

drivers/soc/mediatek/mtk-scpsys.c+6−5

 		genpd->dev_ops.active_wakeup = scpsys_active_wakeup;
 		/*
-		 * With CONFIG_PM disabled turn on all domains to make the
+		 * Initially turn on all domains to make the domains usable
-		 * hardware usable.
+		 * with !CONFIG_PM and to get the hardware in sync with the
+		 * software.  The unused domains will be switched off during
+		 * late_init time.
 		 */
-		if (!IS_ENABLED(CONFIG_PM))
+		genpd->power_on(genpd);
-			genpd->power_on(genpd);
-		pm_genpd_init(genpd, NULL, true);
+		pm_genpd_init(genpd, NULL, false);
 	}
 	/*

drivers/staging/media/davinci_vpfe/vpfe_video.c+34−20

 static int vpfe_update_pipe_state(struct vpfe_video_device *video)
 {
 	struct vpfe_pipeline *pipe = &video->pipe;
+	int ret;
-	if (vpfe_prepare_pipeline(video))
+	ret = vpfe_prepare_pipeline(video);
-		return vpfe_prepare_pipeline(video);
+	if (ret)
+		return ret;
 	/*
 	 * Find out if there is any input video
 	 */
 	if (pipe->input_num == 0) {
 		pipe->state = VPFE_PIPELINE_STREAM_CONTINUOUS;
-		if (vpfe_update_current_ext_subdev(video)) {
+		ret = vpfe_update_current_ext_subdev(video);
+		if (ret) {
 			pr_err("Invalid external subdev\n");
-			return vpfe_update_current_ext_subdev(video);
+			return ret;
 		}
 	} else {
 		pipe->state = VPFE_PIPELINE_STREAM_SINGLESHOT;
 	struct v4l2_subdev *subdev;
 	struct v4l2_format format;
 	struct media_pad *remote;
+	int ret;
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_enum_fmt\n");
 	sd_fmt.pad = remote->index;
 	sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
 	/* get output format of remote subdev */
-	if (v4l2_subdev_call(subdev, pad, get_fmt, NULL, &sd_fmt)) {
+	ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &sd_fmt);
+	if (ret) {
 		v4l2_err(&vpfe_dev->v4l2_dev,
 			 "invalid remote subdev for video node\n");
-		return v4l2_subdev_call(subdev, pad, get_fmt, NULL, &sd_fmt);
+		return ret;
 	}
 	/* convert to pix format */
 	mbus.code = sd_fmt.format.code;
 	struct vpfe_video_device *video = video_drvdata(file);
 	struct vpfe_device *vpfe_dev = video->vpfe_dev;
 	struct v4l2_format format;
+	int ret;
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_fmt\n");
 	/* If streaming is started, return error */
 		return -EBUSY;
 	}
 	/* get adjacent subdev's output pad format */
-	if (__vpfe_video_get_format(video, &format))
+	ret = __vpfe_video_get_format(video, &format);
-		return __vpfe_video_get_format(video, &format);
+	if (ret)
+		return ret;
 	*fmt = format;
 	video->fmt = *fmt;
 	return 0;
 	struct vpfe_video_device *video = video_drvdata(file);
 	struct vpfe_device *vpfe_dev = video->vpfe_dev;
 	struct v4l2_format format;
+	int ret;
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_try_fmt\n");
 	/* get adjacent subdev's output pad format */
-	if (__vpfe_video_get_format(video, &format))
+	ret = __vpfe_video_get_format(video, &format);
-		return __vpfe_video_get_format(video, &format);
+	if (ret)
+		return ret;
 	*fmt = format;
 	return 0;
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_input\n");
-	if (mutex_lock_interruptible(&video->lock))
+	ret = mutex_lock_interruptible(&video->lock);
-		return mutex_lock_interruptible(&video->lock);
+	if (ret)
+		return ret;
 	/*
 	 * If streaming is started return device busy
 	 * error
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_std\n");
 	/* Call decoder driver function to set the standard */
-	if (mutex_lock_interruptible(&video->lock))
+	ret = mutex_lock_interruptible(&video->lock);
-		return mutex_lock_interruptible(&video->lock);
+	if (ret)
+		return ret;
 	sdinfo = video->current_ext_subdev;
 	/* If streaming is started, return device busy error */
 	if (video->started) {
 		return -EINVAL;
 	}
-	if (mutex_lock_interruptible(&video->lock))
+	ret = mutex_lock_interruptible(&video->lock);
-		return mutex_lock_interruptible(&video->lock);
+	if (ret)
+		return ret;
 	if (video->io_usrs != 0) {
 		v4l2_err(&vpfe_dev->v4l2_dev, "Only one IO user allowed\n");
 	q->buf_struct_size = sizeof(struct vpfe_cap_buffer);
 	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
-	if (vb2_queue_init(q)) {
+	ret = vb2_queue_init(q);
+	if (ret) {
 		v4l2_err(&vpfe_dev->v4l2_dev, "vb2_queue_init() failed\n");
 		vb2_dma_contig_cleanup_ctx(vpfe_dev->pdev);
-		return vb2_queue_init(q);
+		return ret;
 	}
 	fh->io_allowed = 1;
 		return -EINVAL;
 	}
-	if (mutex_lock_interruptible(&video->lock))
+	ret = mutex_lock_interruptible(&video->lock);
-		return mutex_lock_interruptible(&video->lock);
+	if (ret)
+		return ret;
 	vpfe_stop_capture(video);
 	ret = vb2_streamoff(&video->buffer_queue, buf_type);

drivers/staging/rdma/hfi1/TODO+1−1

@@ -3,4 +3,4 @@ July, 2015 · 2 unmodified lines
3	- Remove unneeded file entries in sysfs	3	- Remove unneeded file entries in sysfs
4	- Remove software processing of IB protocol and place in library for use	4	- Remove software processing of IB protocol and place in library for use
5	by qib, ipath (if still present), hfi1, and eventually soft-roce	5	by qib, ipath (if still present), hfi1, and eventually soft-roce
6		6	- Replace incorrect uAPI

drivers/staging/rdma/hfi1/file_ops.c+35−56

 #include <linux/vmalloc.h>
 #include <linux/io.h>
+#include <rdma/ib.h>
 #include "hfi.h"
 #include "pio.h"
 #include "device.h"
 	int uctxt_required = 1;
 	int must_be_root = 0;
+	/* FIXME: This interface cannot continue out of staging */
+	if (WARN_ON_ONCE(!ib_safe_file_access(fp)))
+		return -EACCES;
 	if (count < sizeof(cmd)) {
 		ret = -EINVAL;
 		goto bail;
 	spin_unlock_irqrestore(&dd->uctxt_lock, flags);
 	dd->rcd[uctxt->ctxt] = NULL;
+	hfi1_user_exp_rcv_free(fdata);
+	hfi1_clear_ctxt_pkey(dd, uctxt->ctxt);
 	uctxt->rcvwait_to = 0;
 	uctxt->piowait_to = 0;
 	uctxt->rcvnowait = 0;
 	uctxt->pionowait = 0;
 	uctxt->event_flags = 0;
-	hfi1_user_exp_rcv_free(fdata);
-	hfi1_clear_ctxt_pkey(dd, uctxt->ctxt);
 	hfi1_stats.sps_ctxts--;
 	if (++dd->freectxts == dd->num_user_contexts)
 		aspm_enable_all(dd);
 static int user_init(struct file *fp)
 {
-	int ret;
 	unsigned int rcvctrl_ops = 0;
 	struct hfi1_filedata *fd = fp->private_data;
 	struct hfi1_ctxtdata *uctxt = fd->uctxt;
 	/* make sure that the context has already been setup */
-	if (!test_bit(HFI1_CTXT_SETUP_DONE, &uctxt->event_flags)) {
+	if (!test_bit(HFI1_CTXT_SETUP_DONE, &uctxt->event_flags))
-		ret = -EFAULT;
+		return -EFAULT;
-		goto done;
-	}
-	/*
-	 * Subctxts don't need to initialize anything since master
-	 * has done it.
-	 */
-	if (fd->subctxt) {
-		ret = wait_event_interruptible(uctxt->wait, !test_bit(
-					       HFI1_CTXT_MASTER_UNINIT,
-					       &uctxt->event_flags));
-		goto expected;
-	}
 	/* initialize poll variables... */
 	uctxt->urgent = 0;
 		wake_up(&uctxt->wait);
 	}
-expected:
+	return 0;
-	/*
-	 * Expected receive has to be setup for all processes (including
-	 * shared contexts). However, it has to be done after the master
-	 * context has been fully configured as it depends on the
-	 * eager/expected split of the RcvArray entries.
-	 * Setting it up here ensures that the subcontexts will be waiting
-	 * (due to the above wait_event_interruptible() until the master
-	 * is setup.
-	 */
-	ret = hfi1_user_exp_rcv_init(fp);
-done:
-	return ret;
 }
 static int get_ctxt_info(struct file *fp, void __user *ubase, __u32 len)
 	int ret = 0;
 	/*
-	 * Context should be set up only once (including allocation and
+	 * Context should be set up only once, including allocation and
 	 * programming of eager buffers. This is done if context sharing
 	 * is not requested or by the master process.
 	 */
 			if (ret)
 				goto done;
 		}
+	} else {
+		ret = wait_event_interruptible(uctxt->wait, !test_bit(
+					       HFI1_CTXT_MASTER_UNINIT,
+					       &uctxt->event_flags));
+		if (ret)
+			goto done;
 	}
 	ret = hfi1_user_sdma_alloc_queues(uctxt, fp);
+	if (ret)
+		goto done;
+	/*
+	 * Expected receive has to be setup for all processes (including
+	 * shared contexts). However, it has to be done after the master
+	 * context has been fully configured as it depends on the
+	 * eager/expected split of the RcvArray entries.
+	 * Setting it up here ensures that the subcontexts will be waiting
+	 * (due to the above wait_event_interruptible() until the master
+	 * is setup.
+	 */
+	ret = hfi1_user_exp_rcv_init(fp);
 	if (ret)
 		goto done;
 {
 	struct hfi1_devdata *dd = filp->private_data;
-	switch (whence) {
+	return fixed_size_llseek(filp, offset, whence,
-	case SEEK_SET:
+		(dd->kregend - dd->kregbase) + DC8051_DATA_MEM_SIZE);
-		break;
-	case SEEK_CUR:
-		offset += filp->f_pos;
-		break;
-	case SEEK_END:
-		offset = ((dd->kregend - dd->kregbase) + DC8051_DATA_MEM_SIZE) -
-			offset;
-		break;
-	default:
-		return -EINVAL;
-	}
-	if (offset < 0)
-		return -EINVAL;
-	if (offset >= (dd->kregend - dd->kregbase) + DC8051_DATA_MEM_SIZE)
-		return -EINVAL;
-	filp->f_pos = offset;
-	return filp->f_pos;
 }
 /* NOTE: assumes unsigned long is 8 bytes */

drivers/staging/rdma/hfi1/mmu_rb.c+25−15

 					    struct mm_struct *,
 					    unsigned long, unsigned long);
 static void mmu_notifier_mem_invalidate(struct mmu_notifier *,
+					struct mm_struct *,
 					unsigned long, unsigned long);
 static struct mmu_rb_node *__mmu_rb_search(struct mmu_rb_handler *,
 					   unsigned long, unsigned long);
 			rbnode = rb_entry(node, struct mmu_rb_node, node);
 			rb_erase(node, root);
 			if (handler->ops->remove)
-				handler->ops->remove(root, rbnode, false);
+				handler->ops->remove(root, rbnode, NULL);
 		}
 	}
 	return ret;
 }
-/* Caller must host handler lock */
+/* Caller must hold handler lock */
 static struct mmu_rb_node *__mmu_rb_search(struct mmu_rb_handler *handler,
 					   unsigned long addr,
 					   unsigned long len)
 	return node;
 }
+/* Caller must *not* hold handler lock. */
 static void __mmu_rb_remove(struct mmu_rb_handler *handler,
-			    struct mmu_rb_node *node, bool arg)
+			    struct mmu_rb_node *node, struct mm_struct *mm)
 {
+	unsigned long flags;
 	/* Validity of handler and node pointers has been checked by caller. */
 	hfi1_cdbg(MMU, "Removing node addr 0x%llx, len %u", node->addr,
 		  node->len);
+	spin_lock_irqsave(&handler->lock, flags);
 	__mmu_int_rb_remove(node, handler->root);
+	spin_unlock_irqrestore(&handler->lock, flags);
 	if (handler->ops->remove)
-		handler->ops->remove(handler->root, node, arg);
+		handler->ops->remove(handler->root, node, mm);
 }
 struct mmu_rb_node *hfi1_mmu_rb_search(struct rb_root *root, unsigned long addr,
 void hfi1_mmu_rb_remove(struct rb_root *root, struct mmu_rb_node *node)
 {
 	struct mmu_rb_handler *handler = find_mmu_handler(root);
-	unsigned long flags;
 	if (!handler || !node)
 		return;
-	spin_lock_irqsave(&handler->lock, flags);
+	__mmu_rb_remove(handler, node, NULL);
-	__mmu_rb_remove(handler, node, false);
-	spin_unlock_irqrestore(&handler->lock, flags);
 }
 static struct mmu_rb_handler *find_mmu_handler(struct rb_root *root)
 static inline void mmu_notifier_page(struct mmu_notifier *mn,
 				     struct mm_struct *mm, unsigned long addr)
 {
-	mmu_notifier_mem_invalidate(mn, addr, addr + PAGE_SIZE);
+	mmu_notifier_mem_invalidate(mn, mm, addr, addr + PAGE_SIZE);
 }
 static inline void mmu_notifier_range_start(struct mmu_notifier *mn,
 					    unsigned long start,
 					    unsigned long end)
 {
-	mmu_notifier_mem_invalidate(mn, start, end);
+	mmu_notifier_mem_invalidate(mn, mm, start, end);
 }
 static void mmu_notifier_mem_invalidate(struct mmu_notifier *mn,
+					struct mm_struct *mm,
 					unsigned long start, unsigned long end)
 {
 	struct mmu_rb_handler *handler =
 		container_of(mn, struct mmu_rb_handler, mn);
 	struct rb_root *root = handler->root;
-	struct mmu_rb_node *node;
+	struct mmu_rb_node *node, *ptr = NULL;
 	unsigned long flags;
 	spin_lock_irqsave(&handler->lock, flags);
-	for (node = __mmu_int_rb_iter_first(root, start, end - 1); node;
+	for (node = __mmu_int_rb_iter_first(root, start, end - 1);
-	     node = __mmu_int_rb_iter_next(node, start, end - 1)) {
+	     node; node = ptr) {
+		/* Guard against node removal. */
+		ptr = __mmu_int_rb_iter_next(node, start, end - 1);
 		hfi1_cdbg(MMU, "Invalidating node addr 0x%llx, len %u",
 			  node->addr, node->len);
-		if (handler->ops->invalidate(root, node))
+		if (handler->ops->invalidate(root, node)) {
-			__mmu_rb_remove(handler, node, true);
+			spin_unlock_irqrestore(&handler->lock, flags);
+			__mmu_rb_remove(handler, node, mm);
+			spin_lock_irqsave(&handler->lock, flags);
+		}
 	}
 	spin_unlock_irqrestore(&handler->lock, flags);
 }

drivers/staging/rdma/hfi1/mmu_rb.h+2−1

@@ -59,7 +59,8 @@ struct mmu_rb_node { · 58 unmodified lines
59	struct mmu_rb_ops {	59	struct mmu_rb_ops {
60	bool (filter)(struct mmu_rb_node , unsigned long, unsigned long);	60	bool (filter)(struct mmu_rb_node , unsigned long, unsigned long);
61	int (insert)(struct rb_root , struct mmu_rb_node *);	61	int (insert)(struct rb_root , struct mmu_rb_node *);
62	void (remove)(struct rb_root , struct mmu_rb_node *, bool);	62	void (remove)(struct rb_root , struct mmu_rb_node *,
		63	struct mm_struct *);
63	int (invalidate)(struct rb_root , struct mmu_rb_node *);	64	int (invalidate)(struct rb_root , struct mmu_rb_node *);
64	};	65	};
65		66

drivers/staging/rdma/hfi1/qp.c+2−0

 	 * do the flush work until that QP's
 	 * sdma work has finished.
 	 */
+	spin_lock(&qp->s_lock);
 	if (qp->s_flags & RVT_S_WAIT_DMA) {
 		qp->s_flags &= ~RVT_S_WAIT_DMA;
 		hfi1_schedule_send(qp);
 	}
+	spin_unlock(&qp->s_lock);
 }
 /**

drivers/staging/rdma/hfi1/user_exp_rcv.c+7−4

 static int set_rcvarray_entry(struct file *, unsigned long, u32,
 			      struct tid_group *, struct page **, unsigned);
 static int mmu_rb_insert(struct rb_root *, struct mmu_rb_node *);
-static void mmu_rb_remove(struct rb_root *, struct mmu_rb_node *, bool);
+static void mmu_rb_remove(struct rb_root *, struct mmu_rb_node *,
+			  struct mm_struct *);
 static int mmu_rb_invalidate(struct rb_root *, struct mmu_rb_node *);
 static int program_rcvarray(struct file *, unsigned long, struct tid_group *,
 			    struct tid_pageset *, unsigned, u16, struct page **,
 	struct hfi1_ctxtdata *uctxt = fd->uctxt;
 	struct tid_group *grp, *gptr;
+	if (!test_bit(HFI1_CTXT_SETUP_DONE, &uctxt->event_flags))
+		return 0;
 	/*
 	 * The notifier would have been removed when the process'es mm
 	 * was freed.
 	if (!node || node->rcventry != (uctxt->expected_base + rcventry))
 		return -EBADF;
 	if (HFI1_CAP_IS_USET(TID_UNMAP))
-		mmu_rb_remove(&fd->tid_rb_root, &node->mmu, false);
+		mmu_rb_remove(&fd->tid_rb_root, &node->mmu, NULL);
 	else
 		hfi1_mmu_rb_remove(&fd->tid_rb_root, &node->mmu);
 					continue;
 				if (HFI1_CAP_IS_USET(TID_UNMAP))
 					mmu_rb_remove(&fd->tid_rb_root,
-						      &node->mmu, false);
+						      &node->mmu, NULL);
 				else
 					hfi1_mmu_rb_remove(&fd->tid_rb_root,
 							   &node->mmu);
 }
 static void mmu_rb_remove(struct rb_root *root, struct mmu_rb_node *node,
-			  bool notifier)
+			  struct mm_struct *mm)
 {
 	struct hfi1_filedata *fdata =
 		container_of(root, struct hfi1_filedata, tid_rb_root);

drivers/staging/rdma/hfi1/user_sdma.c+22−11

 static void user_sdma_free_request(struct user_sdma_request *, bool);
 static int pin_vector_pages(struct user_sdma_request *,
 			    struct user_sdma_iovec *);
-static void unpin_vector_pages(struct mm_struct *, struct page **, unsigned);
+static void unpin_vector_pages(struct mm_struct *, struct page **, unsigned,
+			       unsigned);
 static int check_header_template(struct user_sdma_request *,
 				 struct hfi1_pkt_header *, u32, u32);
 static int set_txreq_header(struct user_sdma_request *,
 static void activate_packet_queue(struct iowait *, int);
 static bool sdma_rb_filter(struct mmu_rb_node *, unsigned long, unsigned long);
 static int sdma_rb_insert(struct rb_root *, struct mmu_rb_node *);
-static void sdma_rb_remove(struct rb_root *, struct mmu_rb_node *, bool);
+static void sdma_rb_remove(struct rb_root *, struct mmu_rb_node *,
+			   struct mm_struct *);
 static int sdma_rb_invalidate(struct rb_root *, struct mmu_rb_node *);
 static struct mmu_rb_ops sdma_rb_ops = {
 	rb_node = hfi1_mmu_rb_search(&pq->sdma_rb_root,
 				     (unsigned long)iovec->iov.iov_base,
 				     iovec->iov.iov_len);
-	if (rb_node)
+	if (rb_node && !IS_ERR(rb_node))
 		node = container_of(rb_node, struct sdma_mmu_node, rb);
+	else
+		rb_node = NULL;
 	if (!node) {
 		node = kzalloc(sizeof(*node), GFP_KERNEL);
 			goto bail;
 		}
 		if (pinned != npages) {
-			unpin_vector_pages(current->mm, pages, pinned);
+			unpin_vector_pages(current->mm, pages, node->npages,
+					   pinned);
 			ret = -EFAULT;
 			goto bail;
 		}
 }
 static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
-			       unsigned npages)
+			       unsigned start, unsigned npages)
 {
-	hfi1_release_user_pages(mm, pages, npages, 0);
+	hfi1_release_user_pages(mm, pages + start, npages, 0);
 	kfree(pages);
 }
 				&req->pq->sdma_rb_root,
 				(unsigned long)req->iovs[i].iov.iov_base,
 				req->iovs[i].iov.iov_len);
-			if (!mnode)
+			if (!mnode || IS_ERR(mnode))
 				continue;
 			node = container_of(mnode, struct sdma_mmu_node, rb);
 }
 static void sdma_rb_remove(struct rb_root *root, struct mmu_rb_node *mnode,
-			   bool notifier)
+			   struct mm_struct *mm)
 {
 	struct sdma_mmu_node *node =
 		container_of(mnode, struct sdma_mmu_node, rb);
 	node->pq->n_locked -= node->npages;
 	spin_unlock(&node->pq->evict_lock);
-	unpin_vector_pages(notifier ? NULL : current->mm, node->pages,
+	/*
+	 * If mm is set, we are being called by the MMU notifier and we
+	 * should not pass a mm_struct to unpin_vector_page(). This is to
+	 * prevent a deadlock when hfi1_release_user_pages() attempts to
+	 * take the mmap_sem, which the MMU notifier has already taken.
+	 */
+	unpin_vector_pages(mm ? NULL : current->mm, node->pages, 0,
 			   node->npages);
 	/*
 	 * If called by the MMU notifier, we have to adjust the pinned
 	 * page count ourselves.
 	 */
-	if (notifier)
+	if (mm)
-		current->mm->pinned_vm -= node->npages;
+		mm->pinned_vm -= node->npages;
 	kfree(node);
 }

drivers/thermal/hisi_thermal.c+2−2

@@ -68,12 +68,12 @@ static inline int _step_to_temp(int step) · 67 unmodified lines
68	* Every step equals (1 * 200) / 255 celsius, and finally	68	* Every step equals (1 * 200) / 255 celsius, and finally
69	* need convert to millicelsius.	69	* need convert to millicelsius.
70	*/	70	*/
71	return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;	71	return (HISI_TEMP_BASE * 1000 + (step * 200000 / 255));
72	}	72	}
73		73
74	static inline long _temp_to_step(long temp)	74	static inline long _temp_to_step(long temp)
75	{	75	{
76	return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);	76	return ((temp - HISI_TEMP_BASE * 1000) * 255) / 200000;
77	}	77	}
78		78
79	static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,	79	static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,

drivers/thermal/thermal_core.c+1−1

@@ -959,7 +959,7 @@ static DEVICE_ATTR(sustainable_power, S_IWUSR \| S_IRUGO, sustainable_power_show, · 958 unmodified lines
959	struct thermal_zone_device *tz = to_thermal_zone(dev); \	959	struct thermal_zone_device *tz = to_thermal_zone(dev); \
960	\	960	\
961	if (tz->tzp) \	961	if (tz->tzp) \
962	return sprintf(buf, "%u\n", tz->tzp->name); \	962	return sprintf(buf, "%d\n", tz->tzp->name); \
963	else \	963	else \
964	return -EIO; \	964	return -EIO; \
965	} \	965	} \

drivers/tty/pty.c+8−10

  */
 static struct tty_struct *ptm_unix98_lookup(struct tty_driver *driver,
-		struct inode *ptm_inode, int idx)
+		struct file *file, int idx)
 {
 	/* Master must be open via /dev/ptmx */
 	return ERR_PTR(-EIO);
  */
 static struct tty_struct *pts_unix98_lookup(struct tty_driver *driver,
-		struct inode *pts_inode, int idx)
+		struct file *file, int idx)
 {
 	struct tty_struct *tty;
 	mutex_lock(&devpts_mutex);
-	tty = devpts_get_priv(pts_inode);
+	tty = devpts_get_priv(file->f_path.dentry);
 	mutex_unlock(&devpts_mutex);
 	/* Master must be open before slave */
 	if (!tty)
 {
 	struct pts_fs_info *fsi;
 	struct tty_struct *tty;
-	struct inode *slave_inode;
+	struct dentry *dentry;
 	int retval;
 	int index;
 	tty_add_file(tty, filp);
-	slave_inode = devpts_pty_new(fsi,
+	dentry = devpts_pty_new(fsi, index, tty->link);
-			MKDEV(UNIX98_PTY_SLAVE_MAJOR, index), index,
+	if (IS_ERR(dentry)) {
-			tty->link);
+		retval = PTR_ERR(dentry);
-	if (IS_ERR(slave_inode)) {
-		retval = PTR_ERR(slave_inode);
 		goto err_release;
 	}
-	tty->link->driver_data = slave_inode;
+	tty->link->driver_data = dentry;
 	retval = ptm_driver->ops->open(tty, filp);
 	if (retval)

drivers/tty/tty_io.c+3−3

@@ -1367,12 +1367,12 @@ static ssize_t tty_line_name(struct tty_driver driver, int index, char p) · 1366 unmodified lines
1367	* Locking: tty_mutex must be held. If the tty is found, bump the tty kref.	1367	* Locking: tty_mutex must be held. If the tty is found, bump the tty kref.
1368	*/	1368	*/
1369	static struct tty_struct tty_driver_lookup_tty(struct tty_driver driver,	1369	static struct tty_struct tty_driver_lookup_tty(struct tty_driver driver,
1370	struct inode *inode, int idx)	1370	struct file *file, int idx)
1371	{	1371	{
1372	struct tty_struct *tty;	1372	struct tty_struct *tty;
1373		1373
1374	if (driver->ops->lookup)	1374	if (driver->ops->lookup)
1375	tty = driver->ops->lookup(driver, inode, idx);	1375	tty = driver->ops->lookup(driver, file, idx);
1376	else	1376	else
1377	tty = driver->ttys[idx];	1377	tty = driver->ttys[idx];
1378		1378
@@ -2040,7 +2040,7 @@ static struct tty_struct tty_open_by_driver(dev_t device, struct inode inode, · 661 unmodified lines
2040	}	2040	}
2041		2041
2042	/* check whether we're reopening an existing tty */	2042	/* check whether we're reopening an existing tty */
2043	tty = tty_driver_lookup_tty(driver, inode, index);	2043	tty = tty_driver_lookup_tty(driver, filp, index);
2044	if (IS_ERR(tty)) {	2044	if (IS_ERR(tty)) {
2045	mutex_unlock(&tty_mutex);	2045	mutex_unlock(&tty_mutex);
2046	goto out;	2046	goto out;

drivers/usb/core/port.c+0−6

 	return retval;
 }
-static int usb_port_prepare(struct device *dev)
-{
-	return 1;
-}
 #endif
 static const struct dev_pm_ops usb_port_pm_ops = {
 #ifdef CONFIG_PM
 	.runtime_suspend =	usb_port_runtime_suspend,
 	.runtime_resume =	usb_port_runtime_resume,
-	.prepare =		usb_port_prepare,
 #endif
 };

drivers/usb/core/usb.c+1−7

 static int usb_dev_prepare(struct device *dev)
 {
-	struct usb_device *udev = to_usb_device(dev);
+	return 0;		/* Implement eventually? */
-	/* Return 0 if the current wakeup setting is wrong, otherwise 1 */
-	if (udev->do_remote_wakeup != device_may_wakeup(dev))
-		return 0;
-	return 1;
 }
 static void usb_dev_complete(struct device *dev)

drivers/usb/musb/jz4740.c+2−2

@@ -83,9 +83,9 @@ static int jz4740_musb_init(struct musb *musb) · 82 unmodified lines
83	{	83	{
84	usb_phy_generic_register();	84	usb_phy_generic_register();
85	musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);	85	musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
86	if (!musb->xceiv) {	86	if (IS_ERR(musb->xceiv)) {
87	pr_err("HS UDC: no transceiver configured\n");	87	pr_err("HS UDC: no transceiver configured\n");
88	return -ENODEV;	88	return PTR_ERR(musb->xceiv);
89	}	89	}
90		90
91	/* Silicon does not implement ConfigData register.	91	/* Silicon does not implement ConfigData register.

drivers/usb/musb/musb_gadget.c+3−3

 		musb_writew(epio, MUSB_RXMAXP, 0);
 	}
-	musb_ep->desc = NULL;
-	musb_ep->end_point.desc = NULL;
 	/* abort all pending DMA and requests */
 	nuke(musb_ep, -ESHUTDOWN);
+	musb_ep->desc = NULL;
+	musb_ep->end_point.desc = NULL;
 	schedule_work(&musb->irq_work);
 	spin_unlock_irqrestore(&(musb->lock), flags);

drivers/usb/musb/musb_host.c+1−1

@@ -2735,7 +2735,7 @@ static const struct hc_driver musb_hc_driver = { · 2734 unmodified lines
2735	.description = "musb-hcd",	2735	.description = "musb-hcd",
2736	.product_desc = "MUSB HDRC host driver",	2736	.product_desc = "MUSB HDRC host driver",
2737	.hcd_priv_size = sizeof(struct musb *),	2737	.hcd_priv_size = sizeof(struct musb *),
2738	.flags = HCD_USB2 \| HCD_MEMORY \| HCD_BH,	2738	.flags = HCD_USB2 \| HCD_MEMORY,
2739		2739
2740	/* not using irq handler or reset hooks from usbcore, since	2740	/* not using irq handler or reset hooks from usbcore, since
2741	* those must be shared with peripheral code for OTG configs	2741	* those must be shared with peripheral code for OTG configs

drivers/usb/serial/cp210x.c+4−0

 	{ USB_DEVICE(0x10C4, 0x826B) }, /* Cygnal Integrated Products, Inc., Fasttrax GPS demonstration module */
 	{ USB_DEVICE(0x10C4, 0x8281) }, /* Nanotec Plug & Drive */
 	{ USB_DEVICE(0x10C4, 0x8293) }, /* Telegesis ETRX2USB */
+	{ USB_DEVICE(0x10C4, 0x82F4) }, /* Starizona MicroTouch */
 	{ USB_DEVICE(0x10C4, 0x82F9) }, /* Procyon AVS */
 	{ USB_DEVICE(0x10C4, 0x8341) }, /* Siemens MC35PU GPRS Modem */
 	{ USB_DEVICE(0x10C4, 0x8382) }, /* Cygnal Integrated Products, Inc. */
 	{ USB_DEVICE(0x10C4, 0x8418) }, /* IRZ Automation Teleport SG-10 GSM/GPRS Modem */
 	{ USB_DEVICE(0x10C4, 0x846E) }, /* BEI USB Sensor Interface (VCP) */
 	{ USB_DEVICE(0x10C4, 0x8477) }, /* Balluff RFID */
+	{ USB_DEVICE(0x10C4, 0x84B6) }, /* Starizona Hyperion */
 	{ USB_DEVICE(0x10C4, 0x85EA) }, /* AC-Services IBUS-IF */
 	{ USB_DEVICE(0x10C4, 0x85EB) }, /* AC-Services CIS-IBUS */
 	{ USB_DEVICE(0x10C4, 0x85F8) }, /* Virtenio Preon32 */
 	{ USB_DEVICE(0x10C4, 0xF004) }, /* Elan Digital Systems USBcount50 */
 	{ USB_DEVICE(0x10C5, 0xEA61) }, /* Silicon Labs MobiData GPRS USB Modem */
 	{ USB_DEVICE(0x10CE, 0xEA6A) }, /* Silicon Labs MobiData GPRS USB Modem 100EU */
+	{ USB_DEVICE(0x12B8, 0xEC60) }, /* Link G4 ECU */
+	{ USB_DEVICE(0x12B8, 0xEC62) }, /* Link G4+ ECU */
 	{ USB_DEVICE(0x13AD, 0x9999) }, /* Baltech card reader */
 	{ USB_DEVICE(0x1555, 0x0004) }, /* Owen AC4 USB-RS485 Converter */
 	{ USB_DEVICE(0x166A, 0x0201) }, /* Clipsal 5500PACA C-Bus Pascal Automation Controller */

drivers/virtio/virtio_ring.c+1−1

@@ -1006,7 +1006,7 @@ struct virtqueue *vring_create_virtqueue( · 1005 unmodified lines
1006	const char *name)	1006	const char *name)
1007	{	1007	{
1008	struct virtqueue *vq;	1008	struct virtqueue *vq;
1009	void *queue;	1009	void *queue = NULL;
1010	dma_addr_t dma_addr;	1010	dma_addr_t dma_addr;
1011	size_t queue_size_in_bytes;	1011	size_t queue_size_in_bytes;
1012	struct vring vring;	1012	struct vring vring;

drivers/xen/balloon.c+16−0

@@ -151,6 +151,8 @@ static DECLARE_WAIT_QUEUE_HEAD(balloon_wq); · 150 unmodified lines
151	static void balloon_process(struct work_struct *work);	151	static void balloon_process(struct work_struct *work);
152	static DECLARE_DELAYED_WORK(balloon_worker, balloon_process);	152	static DECLARE_DELAYED_WORK(balloon_worker, balloon_process);
153		153
		154	static void release_memory_resource(struct resource *resource);
		155
154	/* When ballooning out (allocating memory to return to Xen) we don't really	156	/* When ballooning out (allocating memory to return to Xen) we don't really
155	want the kernel to try too hard since that can trigger the oom killer. */	157	want the kernel to try too hard since that can trigger the oom killer. */
156	#define GFP_BALLOON \	158	#define GFP_BALLOON \
@@ -267,6 +269,20 @@ static struct resource *additional_memory_resource(phys_addr_t size) · 110 unmodified lines
267	return NULL;	269	return NULL;
268	}	270	}
269		271
		272	#ifdef CONFIG_SPARSEMEM
		273	{
		274	unsigned long limit = 1UL << (MAX_PHYSMEM_BITS - PAGE_SHIFT);
		275	unsigned long pfn = res->start >> PAGE_SHIFT;
		276
		277	if (pfn > limit) {
		278	pr_err("New System RAM resource outside addressable RAM (%lu > %lu)\n",
		279	pfn, limit);
		280	release_memory_resource(res);
		281	return NULL;
		282	}
		283	}
		284	#endif
		285
270	return res;	286	return res;
271	}	287	}
272		288

drivers/xen/evtchn.c+8−12

 {
 	unsigned int new_size;
 	evtchn_port_t *new_ring, *old_ring;
-	unsigned int p, c;
 	/*
 	 * Ensure the ring is large enough to capture all possible
 	/*
 	 * Copy the old ring contents to the new ring.
 	 *
-	 * If the ring contents crosses the end of the current ring,
+	 * To take care of wrapping, a full ring, and the new index
-	 * it needs to be copied in two chunks.
+	 * pointing into the second half, simply copy the old contents
+	 * twice.
 	 *
 	 * +---------+    +------------------+
-	 * |34567  12| -> |       1234567    |
+	 * |34567  12| -> |34567  1234567  12|
-	 * +-----p-c-+    +------------------+
+	 * +-----p-c-+    +-------c------p---+
 	 */
-	p = evtchn_ring_offset(u, u->ring_prod);
+	memcpy(new_ring, old_ring, u->ring_size * sizeof(*u->ring));
-	c = evtchn_ring_offset(u, u->ring_cons);
+	memcpy(new_ring + u->ring_size, old_ring,
-	if (p < c) {
+	       u->ring_size * sizeof(*u->ring));
-		memcpy(new_ring + c, u->ring + c, (u->ring_size - c) * sizeof(*u->ring));
-		memcpy(new_ring + u->ring_size, u->ring, p * sizeof(*u->ring));
-	} else
-		memcpy(new_ring + c, u->ring + c, (p - c) * sizeof(*u->ring));
 	u->ring = new_ring;
 	u->ring_size = new_size;

fs/ceph/mds_client.c+2−4

 	     atomic_read(&s->s_ref), atomic_read(&s->s_ref)-1);
 	if (atomic_dec_and_test(&s->s_ref)) {
 		if (s->s_auth.authorizer)
-			ceph_auth_destroy_authorizer(
+			ceph_auth_destroy_authorizer(s->s_auth.authorizer);
-				s->s_mdsc->fsc->client->monc.auth,
-				s->s_auth.authorizer);
 		kfree(s);
 	}
 }
 	struct ceph_auth_handshake *auth = &s->s_auth;
 	if (force_new && auth->authorizer) {
-		ceph_auth_destroy_authorizer(ac, auth->authorizer);
+		ceph_auth_destroy_authorizer(auth->authorizer);
 		auth->authorizer = NULL;
 	}
 	if (!auth->authorizer) {

fs/devpts/inode.c+12−41

@@ -604,8 +604,7 @@ void devpts_put_ref(struct pts_fs_info *fsi) · 603 unmodified lines
604	*	604	*
605	* The created inode is returned. Remove it from /dev/pts/ by devpts_pty_kill.	605	* The created inode is returned. Remove it from /dev/pts/ by devpts_pty_kill.
606	*/	606	*/
607	struct inode devpts_pty_new(struct pts_fs_info fsi, dev_t device, int index,	607	struct dentry devpts_pty_new(struct pts_fs_info fsi, int index, void *priv)
608	void *priv)
609	{	608	{
610	struct dentry *dentry;	609	struct dentry *dentry;
611	struct super_block *sb;	610	struct super_block *sb;
@@ -629,25 +628,21 @@ struct inode devpts_pty_new(struct pts_fs_info fsi, dev_t device, int index, · 17 unmodified lines
629	inode->i_uid = opts->setuid ? opts->uid : current_fsuid();	628	inode->i_uid = opts->setuid ? opts->uid : current_fsuid();
630	inode->i_gid = opts->setgid ? opts->gid : current_fsgid();	629	inode->i_gid = opts->setgid ? opts->gid : current_fsgid();
631	inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME;	630	inode->i_mtime = inode->i_atime = inode->i_ctime = CURRENT_TIME;
632	init_special_inode(inode, S_IFCHR\|opts->mode, device);	631	init_special_inode(inode, S_IFCHR\|opts->mode, MKDEV(UNIX98_PTY_SLAVE_MAJOR, index));
633	inode->i_private = priv;
634		632
635	sprintf(s, "%d", index);	633	sprintf(s, "%d", index);
636		634
637	inode_lock(d_inode(root));
638
639	dentry = d_alloc_name(root, s);	635	dentry = d_alloc_name(root, s);
640	if (dentry) {	636	if (dentry) {
		637	dentry->d_fsdata = priv;
641	d_add(dentry, inode);	638	d_add(dentry, inode);
642	fsnotify_create(d_inode(root), dentry);	639	fsnotify_create(d_inode(root), dentry);
643	} else {	640	} else {
644	iput(inode);	641	iput(inode);
645	inode = ERR_PTR(-ENOMEM);	642	dentry = ERR_PTR(-ENOMEM);
646	}	643	}
647		644
648	inode_unlock(d_inode(root));	645	return dentry;
649
650	return inode;
651	}	646	}
652		647
653	/**	648	/**
@@ -656,24 +651,10 @@ struct inode devpts_pty_new(struct pts_fs_info fsi, dev_t device, int index, · 2 unmodified lines
656	*	651	*
657	* Returns whatever was passed as priv in devpts_pty_new for a given inode.	652	* Returns whatever was passed as priv in devpts_pty_new for a given inode.
658	*/	653	*/
659	void devpts_get_priv(struct inode pts_inode)	654	void devpts_get_priv(struct dentry dentry)
660	{	655	{
661	struct dentry *dentry;	656	WARN_ON_ONCE(dentry->d_sb->s_magic != DEVPTS_SUPER_MAGIC);
662	void *priv = NULL;	657	return dentry->d_fsdata;
663
664	BUG_ON(pts_inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR));
665
666	/* Ensure dentry has not been deleted by devpts_pty_kill() */
667	dentry = d_find_alias(pts_inode);
668	if (!dentry)
669	return NULL;
670
671	if (pts_inode->i_sb->s_magic == DEVPTS_SUPER_MAGIC)
672	priv = pts_inode->i_private;
673
674	dput(dentry);
675
676	return priv;
677	}	658	}
678		659
679	/**	660	/**
@@ -682,24 +663,14 @@ void devpts_get_priv(struct inode pts_inode) · 2 unmodified lines
682	*	663	*
683	* This is an inverse operation of devpts_pty_new.	664	* This is an inverse operation of devpts_pty_new.
684	*/	665	*/
685	void devpts_pty_kill(struct inode *inode)	666	void devpts_pty_kill(struct dentry *dentry)
686	{	667	{
687	struct super_block *sb = pts_sb_from_inode(inode);	668	WARN_ON_ONCE(dentry->d_sb->s_magic != DEVPTS_SUPER_MAGIC);
688	struct dentry *root = sb->s_root;
689	struct dentry *dentry;
690		669
691	BUG_ON(inode->i_rdev == MKDEV(TTYAUX_MAJOR, PTMX_MINOR));	670	dentry->d_fsdata = NULL;
692		671	drop_nlink(dentry->d_inode);
693	inode_lock(d_inode(root));
694
695	dentry = d_find_alias(inode);
696
697	drop_nlink(inode);
698	d_delete(dentry);	672	d_delete(dentry);
699	dput(dentry); /* d_alloc_name() in devpts_pty_new() */	673	dput(dentry); /* d_alloc_name() in devpts_pty_new() */
700	dput(dentry); /* d_find_alias above */
701
702	inode_unlock(d_inode(root));
703	}	674	}
704		675
705	static int __init init_devpts_fs(void)	676	static int __init init_devpts_fs(void)

fs/fuse/file.c+1−1

@@ -1295,7 +1295,7 @@ static int fuse_get_user_pages(struct fuse_req req, struct iov_iter ii, · 1294 unmodified lines
1295		1295
1296	*nbytesp = nbytes;	1296	*nbytesp = nbytes;
1297		1297
1298	return ret;	1298	return ret < 0 ? ret : 0;
1299	}	1299	}
1300		1300
1301	static inline int fuse_iter_npages(const struct iov_iter *ii_p)	1301	static inline int fuse_iter_npages(const struct iov_iter *ii_p)

fs/ocfs2/dlm/dlmmaster.c+2−0

@@ -2455,6 +2455,8 @@ int dlm_deref_lockres_done_handler(struct o2net_msg msg, u32 len, void data, · 2454 unmodified lines
2455		2455
2456	spin_unlock(&dlm->spinlock);	2456	spin_unlock(&dlm->spinlock);
2457		2457
		2458	ret = 0;
		2459
2458	done:	2460	done:
2459	dlm_put(dlm);	2461	dlm_put(dlm);
2460	return ret;	2462	return ret;

fs/pnode.c+14−11

 /* all accesses are serialized by namespace_sem */
 static struct user_namespace *user_ns;
-static struct mount *last_dest, *last_source, *dest_master;
+static struct mount *last_dest, *first_source, *last_source, *dest_master;
 static struct mountpoint *mp;
 static struct hlist_head *list;
 		type = CL_MAKE_SHARED;
 	} else {
 		struct mount *n, *p;
+		bool done;
 		for (n = m; ; n = p) {
 			p = n->mnt_master;
-			if (p == dest_master || IS_MNT_MARKED(p)) {
+			if (p == dest_master || IS_MNT_MARKED(p))
-				while (last_dest->mnt_master != p) {
-					last_source = last_source->mnt_master;
-					last_dest = last_source->mnt_parent;
-				}
-				if (!peers(n, last_dest)) {
-					last_source = last_source->mnt_master;
-					last_dest = last_source->mnt_parent;
-				}
 				break;
-			}
 		}
+		do {
+			struct mount *parent = last_source->mnt_parent;
+			if (last_source == first_source)
+				break;
+			done = parent->mnt_master == p;
+			if (done && peers(n, parent))
+				break;
+			last_source = last_source->mnt_master;
+		} while (!done);
 		type = CL_SLAVE;
 		/* beginning of peer group among the slaves? */
 		if (IS_MNT_SHARED(m))
 	 */
 	user_ns = current->nsproxy->mnt_ns->user_ns;
 	last_dest = dest_mnt;
+	first_source = source_mnt;
 	last_source = source_mnt;
 	mp = dest_mp;
 	list = tree_list;

fs/proc/base.c+2−1

@@ -955,7 +955,8 @@ static ssize_t environ_read(struct file file, char __user buf, · 954 unmodified lines
955	struct mm_struct *mm = file->private_data;	955	struct mm_struct *mm = file->private_data;
956	unsigned long env_start, env_end;	956	unsigned long env_start, env_end;
957		957
958	if (!mm)	958	/* Ensure the process spawned far enough to have an environment. */
		959	if (!mm \|\| !mm->env_end)
959	return 0;	960	return 0;
960		961
961	page = (char *)__get_free_page(GFP_TEMPORARY);	962	page = (char *)__get_free_page(GFP_TEMPORARY);

fs/proc/task_mmu.c+30−3

@@ -1518,6 +1518,32 @@ static struct page can_gather_numa_stats(pte_t pte, struct vm_area_struct vma, · 1517 unmodified lines
1518	return page;	1518	return page;
1519	}	1519	}
1520		1520
		1521	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
		1522	static struct page *can_gather_numa_stats_pmd(pmd_t pmd,
		1523	struct vm_area_struct *vma,
		1524	unsigned long addr)
		1525	{
		1526	struct page *page;
		1527	int nid;
		1528
		1529	if (!pmd_present(pmd))
		1530	return NULL;
		1531
		1532	page = vm_normal_page_pmd(vma, addr, pmd);
		1533	if (!page)
		1534	return NULL;
		1535
		1536	if (PageReserved(page))
		1537	return NULL;
		1538
		1539	nid = page_to_nid(page);
		1540	if (!node_isset(nid, node_states[N_MEMORY]))
		1541	return NULL;
		1542
		1543	return page;
		1544	}
		1545	#endif
		1546
1521	static int gather_pte_stats(pmd_t *pmd, unsigned long addr,	1547	static int gather_pte_stats(pmd_t *pmd, unsigned long addr,
1522	unsigned long end, struct mm_walk *walk)	1548	unsigned long end, struct mm_walk *walk)
1523	{	1549	{
@@ -1527,14 +1553,14 @@ static int gather_pte_stats(pmd_t *pmd, unsigned long addr, · 3 unmodified lines
1527	pte_t *orig_pte;	1553	pte_t *orig_pte;
1528	pte_t *pte;	1554	pte_t *pte;
1529		1555
		1556	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1530	ptl = pmd_trans_huge_lock(pmd, vma);	1557	ptl = pmd_trans_huge_lock(pmd, vma);
1531	if (ptl) {	1558	if (ptl) {
1532	pte_t huge_pte = (pte_t )pmd;
1533	struct page *page;	1559	struct page *page;
1534		1560
1535	page = can_gather_numa_stats(huge_pte, vma, addr);	1561	page = can_gather_numa_stats_pmd(*pmd, vma, addr);
1536	if (page)	1562	if (page)
1537	gather_stats(page, md, pte_dirty(huge_pte),	1563	gather_stats(page, md, pmd_dirty(*pmd),
1538	HPAGE_PMD_SIZE/PAGE_SIZE);	1564	HPAGE_PMD_SIZE/PAGE_SIZE);
1539	spin_unlock(ptl);	1565	spin_unlock(ptl);
1540	return 0;	1566	return 0;
@@ -1542,6 +1568,7 @@ static int gather_pte_stats(pmd_t *pmd, unsigned long addr, · 1 unmodified line
1542		1568
1543	if (pmd_trans_unstable(pmd))	1569	if (pmd_trans_unstable(pmd))
1544	return 0;	1570	return 0;
		1571	#endif
1545	orig_pte = pte = pte_offset_map_lock(walk->mm, pmd, addr, &ptl);	1572	orig_pte = pte = pte_offset_map_lock(walk->mm, pmd, addr, &ptl);
1546	do {	1573	do {
1547	struct page page = can_gather_numa_stats(pte, vma, addr);	1574	struct page page = can_gather_numa_stats(pte, vma, addr);

fs/udf/super.c+2−2

@@ -919,14 +919,14 @@ static int udf_load_pvoldesc(struct super_block *sb, sector_t block) · 918 unmodified lines
919	#endif	919	#endif
920	}	920	}
921		921
922	ret = udf_CS0toUTF8(outstr, 31, pvoldesc->volIdent, 32);	922	ret = udf_dstrCS0toUTF8(outstr, 31, pvoldesc->volIdent, 32);
923	if (ret < 0)	923	if (ret < 0)
924	goto out_bh;	924	goto out_bh;
925		925
926	strncpy(UDF_SB(sb)->s_volume_ident, outstr, ret);	926	strncpy(UDF_SB(sb)->s_volume_ident, outstr, ret);
927	udf_debug("volIdent[] = '%s'\n", UDF_SB(sb)->s_volume_ident);	927	udf_debug("volIdent[] = '%s'\n", UDF_SB(sb)->s_volume_ident);
928		928
929	ret = udf_CS0toUTF8(outstr, 127, pvoldesc->volSetIdent, 128);	929	ret = udf_dstrCS0toUTF8(outstr, 127, pvoldesc->volSetIdent, 128);
930	if (ret < 0)	930	if (ret < 0)
931	goto out_bh;	931	goto out_bh;
932		932

fs/udf/udfdecl.h+1−1

@@ -212,7 +212,7 @@ extern int udf_get_filename(struct super_block , const uint8_t , int, · 211 unmodified lines
212	uint8_t *, int);	212	uint8_t *, int);
213	extern int udf_put_filename(struct super_block , const uint8_t , int,	213	extern int udf_put_filename(struct super_block , const uint8_t , int,
214	uint8_t *, int);	214	uint8_t *, int);
215	extern int udf_CS0toUTF8(uint8_t , int, const uint8_t , int);	215	extern int udf_dstrCS0toUTF8(uint8_t , int, const uint8_t , int);
216		216
217	/* ialloc.c */	217	/* ialloc.c */
218	extern void udf_free_inode(struct inode *);	218	extern void udf_free_inode(struct inode *);

fs/udf/unicode.c+14−2

@@ -335,9 +335,21 @@ try_again: · 334 unmodified lines
335	return u_len;	335	return u_len;
336	}	336	}
337		337
338	int udf_CS0toUTF8(uint8_t utf_o, int o_len, const uint8_t ocu_i, int i_len)	338	int udf_dstrCS0toUTF8(uint8_t *utf_o, int o_len,
		339	const uint8_t *ocu_i, int i_len)
339	{	340	{
340	return udf_name_from_CS0(utf_o, o_len, ocu_i, i_len,	341	int s_len = 0;
		342
		343	if (i_len > 0) {
		344	s_len = ocu_i[i_len - 1];
		345	if (s_len >= i_len) {
		346	pr_err("incorrect dstring lengths (%d/%d)\n",
		347	s_len, i_len);
		348	return -EINVAL;
		349	}
		350	}
		351
		352	return udf_name_from_CS0(utf_o, o_len, ocu_i, s_len,
341	udf_uni2char_utf8, 0);	353	udf_uni2char_utf8, 0);
342	}	354	}
343		355

include/acpi/acpi_bus.h+2−2

@@ -394,13 +394,13 @@ struct acpi_data_node { · 393 unmodified lines
394		394
395	static inline bool is_acpi_node(struct fwnode_handle *fwnode)	395	static inline bool is_acpi_node(struct fwnode_handle *fwnode)
396	{	396	{
397	return fwnode && (fwnode->type == FWNODE_ACPI	397	return !IS_ERR_OR_NULL(fwnode) && (fwnode->type == FWNODE_ACPI
398	\|\| fwnode->type == FWNODE_ACPI_DATA);	398	\|\| fwnode->type == FWNODE_ACPI_DATA);
399	}	399	}
400		400
401	static inline bool is_acpi_device_node(struct fwnode_handle *fwnode)	401	static inline bool is_acpi_device_node(struct fwnode_handle *fwnode)
402	{	402	{
403	return fwnode && fwnode->type == FWNODE_ACPI;	403	return !IS_ERR_OR_NULL(fwnode) && fwnode->type == FWNODE_ACPI;
404	}	404	}
405		405
406	static inline struct acpi_device to_acpi_device_node(struct fwnode_handle fwnode)	406	static inline struct acpi_device to_acpi_device_node(struct fwnode_handle fwnode)

include/linux/bpf.h+2−1

 void bpf_register_map_type(struct bpf_map_type_list *tl);
 struct bpf_prog *bpf_prog_get(u32 ufd);
+struct bpf_prog *bpf_prog_inc(struct bpf_prog *prog);
 void bpf_prog_put(struct bpf_prog *prog);
 void bpf_prog_put_rcu(struct bpf_prog *prog);
 struct bpf_map *bpf_map_get_with_uref(u32 ufd);
 struct bpf_map *__bpf_map_get(struct fd f);
-void bpf_map_inc(struct bpf_map *map, bool uref);
+struct bpf_map *bpf_map_inc(struct bpf_map *map, bool uref);
 void bpf_map_put_with_uref(struct bpf_map *map);
 void bpf_map_put(struct bpf_map *map);
 int bpf_map_precharge_memlock(u32 pages);

include/linux/ceph/auth.h+5−5

  */
 struct ceph_auth_client;
-struct ceph_authorizer;
 struct ceph_msg;
+struct ceph_authorizer {
+	void (*destroy)(struct ceph_authorizer *);
+};
 struct ceph_auth_handshake {
 	struct ceph_authorizer *authorizer;
 	void *authorizer_buf;
 				 struct ceph_auth_handshake *auth);
 	int (*verify_authorizer_reply)(struct ceph_auth_client *ac,
 				       struct ceph_authorizer *a, size_t len);
-	void (*destroy_authorizer)(struct ceph_auth_client *ac,
-				   struct ceph_authorizer *a);
 	void (*invalidate_authorizer)(struct ceph_auth_client *ac,
 				      int peer_type);
 extern int ceph_auth_create_authorizer(struct ceph_auth_client *ac,
 				       int peer_type,
 				       struct ceph_auth_handshake *auth);
-extern void ceph_auth_destroy_authorizer(struct ceph_auth_client *ac,
+void ceph_auth_destroy_authorizer(struct ceph_authorizer *a);
-					 struct ceph_authorizer *a);
 extern int ceph_auth_update_authorizer(struct ceph_auth_client *ac,
 				       int peer_type,
 				       struct ceph_auth_handshake *a);

include/linux/ceph/osd_client.h+0−1

@@ -16,7 +16,6 @@ struct ceph_msg; · 15 unmodified lines
16	struct ceph_snap_context;	16	struct ceph_snap_context;
17	struct ceph_osd_request;	17	struct ceph_osd_request;
18	struct ceph_osd_client;	18	struct ceph_osd_client;
19	struct ceph_authorizer;
20		19
21	/*	20	/*
22	* completion callback for async writepages	21	* completion callback for async writepages

include/linux/cgroup-defs.h+1−0

@@ -444,6 +444,7 @@ struct cgroup_subsys { · 443 unmodified lines
444	int (can_attach)(struct cgroup_taskset tset);	444	int (can_attach)(struct cgroup_taskset tset);
445	void (cancel_attach)(struct cgroup_taskset tset);	445	void (cancel_attach)(struct cgroup_taskset tset);
446	void (attach)(struct cgroup_taskset tset);	446	void (attach)(struct cgroup_taskset tset);
		447	void (*post_attach)(void);
447	int (can_fork)(struct task_struct task);	448	int (can_fork)(struct task_struct task);
448	void (cancel_fork)(struct task_struct task);	449	void (cancel_fork)(struct task_struct task);
449	void (fork)(struct task_struct task);	450	void (fork)(struct task_struct task);

include/linux/cpuset.h+0−6

 	task_unlock(current);
 }
-extern void cpuset_post_attach_flush(void);
 #else /* !CONFIG_CPUSETS */
 static inline bool cpusets_enabled(void) { return false; }
 	return false;
 }
-static inline void cpuset_post_attach_flush(void)
-{
-}
 #endif /* !CONFIG_CPUSETS */
 #endif /* _LINUX_CPUSET_H */

include/linux/devpts_fs.h+3−3

@@ -27,11 +27,11 @@ int devpts_new_index(struct pts_fs_info *); · 26 unmodified lines
27	void devpts_kill_index(struct pts_fs_info *, int);	27	void devpts_kill_index(struct pts_fs_info *, int);
28		28
29	/* mknod in devpts */	29	/* mknod in devpts */
30	struct inode devpts_pty_new(struct pts_fs_info , dev_t, int, void *);	30	struct dentry devpts_pty_new(struct pts_fs_info , int, void *);
31	/* get private structure */	31	/* get private structure */
32	void devpts_get_priv(struct inode pts_inode);	32	void devpts_get_priv(struct dentry );
33	/* unlink */	33	/* unlink */
34	void devpts_pty_kill(struct inode *inode);	34	void devpts_pty_kill(struct dentry *);
35		35
36	#endif	36	#endif
37		37

include/linux/hash.h+18−2

@@ -32,12 +32,28 @@ · 31 unmodified lines
32	#error Wordsize not 32 or 64	32	#error Wordsize not 32 or 64
33	#endif	33	#endif
34		34
		35	/*
		36	* The above primes are actively bad for hashing, since they are
		37	* too sparse. The 32-bit one is mostly ok, the 64-bit one causes
		38	* real problems. Besides, the "prime" part is pointless for the
		39	* multiplicative hash.
		40	*
		41	* Although a random odd number will do, it turns out that the golden
		42	* ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
		43	* properties.
		44	*
		45	* These are the negative, (1 - phi) = (phi^2) = (3 - sqrt(5))/2.
		46	* (See Knuth vol 3, section 6.4, exercise 9.)
		47	*/
		48	#define GOLDEN_RATIO_32 0x61C88647
		49	#define GOLDEN_RATIO_64 0x61C8864680B583EBull
		50
35	static __always_inline u64 hash_64(u64 val, unsigned int bits)	51	static __always_inline u64 hash_64(u64 val, unsigned int bits)
36	{	52	{
37	u64 hash = val;	53	u64 hash = val;
38		54
39	#if defined(CONFIG_ARCH_HAS_FAST_MULTIPLIER) && BITS_PER_LONG == 64	55	#if BITS_PER_LONG == 64
40	hash = hash * GOLDEN_RATIO_PRIME_64;	56	hash = hash * GOLDEN_RATIO_64;
41	#else	57	#else
42	/* Sigh, gcc can't optimise this alone like it does for 32 bits. */	58	/* Sigh, gcc can't optimise this alone like it does for 32 bits. */
43	u64 n = hash;	59	u64 n = hash;

include/linux/huge_mm.h+5−0

 }
 struct page *get_huge_zero_page(void);
+void put_huge_zero_page(void);
 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
 #define HPAGE_PMD_SHIFT ({ BUILD_BUG(); 0; })
 	return false;
 }
+static inline void put_huge_zero_page(void)
+{
+	BUILD_BUG();
+}
 static inline struct page *follow_devmap_pmd(struct vm_area_struct *vma,
 		unsigned long addr, pmd_t *pmd, int flags)

include/linux/if_ether.h+5−0

 	return (struct ethhdr *)skb_mac_header(skb);
 }
+static inline struct ethhdr *inner_eth_hdr(const struct sk_buff *skb)
+{
+	return (struct ethhdr *)skb_inner_mac_header(skb);
+}
 int eth_header_parse(const struct sk_buff *skb, unsigned char *haddr);
 extern ssize_t sysfs_format_mac(char *buf, const unsigned char *addr, int len);

include/linux/lockdep.h+5−3

  * We record lock dependency chains, so that we can cache them:
  */
 struct lock_chain {
-	u8				irq_context;
+	/* see BUILD_BUG_ON()s in lookup_chain_cache() */
-	u8				depth;
+	unsigned int			irq_context :  2,
-	u16				base;
+					depth       :  6,
+					base	    : 24;
+	/* 4 byte hole */
 	struct hlist_node		entry;
 	u64				chain_key;
 };

include/linux/mfd/syscon/imx6q-iomuxc-gpr.h+6−0

@@ -447,5 +447,11 @@ · 446 unmodified lines
447	#define IMX6UL_GPR1_ENET2_CLK_OUTPUT (0x1 << 18)	447	#define IMX6UL_GPR1_ENET2_CLK_OUTPUT (0x1 << 18)
448	#define IMX6UL_GPR1_ENET_CLK_DIR (0x3 << 17)	448	#define IMX6UL_GPR1_ENET_CLK_DIR (0x3 << 17)
449	#define IMX6UL_GPR1_ENET_CLK_OUTPUT (0x3 << 17)	449	#define IMX6UL_GPR1_ENET_CLK_OUTPUT (0x3 << 17)
		450	#define IMX6UL_GPR1_SAI1_MCLK_DIR (0x1 << 19)
		451	#define IMX6UL_GPR1_SAI2_MCLK_DIR (0x1 << 20)
		452	#define IMX6UL_GPR1_SAI3_MCLK_DIR (0x1 << 21)
		453	#define IMX6UL_GPR1_SAI_MCLK_MASK (0x7 << 19)
		454	#define MCLK_DIR(x) (x == 1 ? IMX6UL_GPR1_SAI1_MCLK_DIR : x == 2 ? \
		455	IMX6UL_GPR1_SAI2_MCLK_DIR : IMX6UL_GPR1_SAI3_MCLK_DIR)
450		456
451	#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */	457	#endif /* __LINUX_IMX6Q_IOMUXC_GPR_H */

include/linux/mlx5/device.h+11−0

@@ -392,6 +392,17 @@ enum { · 391 unmodified lines
392	MLX5_CAP_OFF_CMDIF_CSUM = 46,	392	MLX5_CAP_OFF_CMDIF_CSUM = 46,
393	};	393	};
394		394
		395	enum {
		396	/*
		397	* Max wqe size for rdma read is 512 bytes, so this
		398	* limits our max_sge_rd as the wqe needs to fit:
		399	* - ctrl segment (16 bytes)
		400	* - rdma segment (16 bytes)
		401	* - scatter elements (16 bytes each)
		402	*/
		403	MLX5_MAX_SGE_RD = (512 - 16 - 16) / 16
		404	};
		405
395	struct mlx5_inbox_hdr {	406	struct mlx5_inbox_hdr {
396	__be16 opcode;	407	__be16 opcode;
397	u8 rsvd[4];	408	u8 rsvd[4];

include/linux/mlx5/driver.h+4−3

 };
 enum mlx5_interface_state {
-	MLX5_INTERFACE_STATE_DOWN,
+	MLX5_INTERFACE_STATE_DOWN = BIT(0),
-	MLX5_INTERFACE_STATE_UP,
+	MLX5_INTERFACE_STATE_UP = BIT(1),
+	MLX5_INTERFACE_STATE_SHUTDOWN = BIT(2),
 };
 enum mlx5_pci_status {
 	enum mlx5_device_state	state;
 	/* sync interface state */
 	struct mutex		intf_state_mutex;
-	enum mlx5_interface_state interface_state;
+	unsigned long		intf_state;
 	void			(*event) (struct mlx5_core_dev *dev,
 					  enum mlx5_dev_event event,
 					  unsigned long param);

include/linux/mlx5/port.h+3−3

@@ -54,9 +54,9 @@ int mlx5_set_port_admin_status(struct mlx5_core_dev *dev, · 53 unmodified lines
54	int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,	54	int mlx5_query_port_admin_status(struct mlx5_core_dev *dev,
55	enum mlx5_port_status *status);	55	enum mlx5_port_status *status);
56		56
57	int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port);	57	int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port);
58	void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, int max_mtu, u8 port);	58	void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, u16 max_mtu, u8 port);
59	void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, int oper_mtu,	59	void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, u16 oper_mtu,
60	u8 port);	60	u8 port);
61		61
62	int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,	62	int mlx5_query_port_vl_hw_cap(struct mlx5_core_dev *dev,

include/linux/mlx5/vport.h+2−0

 				     u16 vport, u8 *addr);
 int mlx5_modify_nic_vport_mac_address(struct mlx5_core_dev *dev,
 				      u16 vport, u8 *addr);
+int mlx5_query_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 *mtu);
+int mlx5_modify_nic_vport_mtu(struct mlx5_core_dev *mdev, u16 mtu);
 int mlx5_query_nic_vport_system_image_guid(struct mlx5_core_dev *mdev,
 					   u64 *system_image_guid);
 int mlx5_query_nic_vport_node_guid(struct mlx5_core_dev *mdev, u64 *node_guid);

include/linux/mm.h+4−0

 	page = compound_head(page);
 	if (atomic_read(compound_mapcount_ptr(page)) >= 0)
 		return true;
+	if (PageHuge(page))
+		return false;
 	for (i = 0; i < hpage_nr_pages(page); i++) {
 		if (atomic_read(&page[i]._mapcount) >= 0)
 			return true;
 struct page *vm_normal_page(struct vm_area_struct *vma, unsigned long addr,
 		pte_t pte);
+struct page *vm_normal_page_pmd(struct vm_area_struct *vma, unsigned long addr,
+				pmd_t pmd);
 int zap_vma_ptes(struct vm_area_struct *vma, unsigned long address,
 		unsigned long size);

include/linux/net.h+9−1

@@ -246,7 +246,15 @@ do { \ · 245 unmodified lines
246	net_ratelimited_function(pr_warn, fmt, ##__VA_ARGS__)	246	net_ratelimited_function(pr_warn, fmt, ##__VA_ARGS__)
247	#define net_info_ratelimited(fmt, ...) \	247	#define net_info_ratelimited(fmt, ...) \
248	net_ratelimited_function(pr_info, fmt, ##__VA_ARGS__)	248	net_ratelimited_function(pr_info, fmt, ##__VA_ARGS__)
249	#if defined(DEBUG)	249	#if defined(CONFIG_DYNAMIC_DEBUG)
		250	#define net_dbg_ratelimited(fmt, ...) \
		251	do { \
		252	DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt); \
		253	if (unlikely(descriptor.flags & _DPRINTK_FLAGS_PRINT) && \
		254	net_ratelimit()) \
		255	__dynamic_pr_debug(&descriptor, fmt, ##__VA_ARGS__); \
		256	} while (0)
		257	#elif defined(DEBUG)
250	#define net_dbg_ratelimited(fmt, ...) \	258	#define net_dbg_ratelimited(fmt, ...) \
251	net_ratelimited_function(pr_debug, fmt, ##__VA_ARGS__)	259	net_ratelimited_function(pr_debug, fmt, ##__VA_ARGS__)
252	#else	260	#else

include/linux/netdevice.h+1−1

@@ -4004,7 +4004,7 @@ netdev_features_t netif_skb_features(struct sk_buff *skb); · 4003 unmodified lines
4004		4004
4005	static inline bool net_gso_ok(netdev_features_t features, int gso_type)	4005	static inline bool net_gso_ok(netdev_features_t features, int gso_type)
4006	{	4006	{
4007	netdev_features_t feature = gso_type << NETIF_F_GSO_SHIFT;	4007	netdev_features_t feature = (netdev_features_t)gso_type << NETIF_F_GSO_SHIFT;
4008		4008
4009	/* check flags correspondence */	4009	/* check flags correspondence */
4010	BUILD_BUG_ON(SKB_GSO_TCPV4 != (NETIF_F_TSO >> NETIF_F_GSO_SHIFT));	4010	BUILD_BUG_ON(SKB_GSO_TCPV4 != (NETIF_F_TSO >> NETIF_F_GSO_SHIFT));

include/linux/of.h+1−1

@@ -133,7 +133,7 @@ void of_core_init(void); · 132 unmodified lines
133		133
134	static inline bool is_of_node(struct fwnode_handle *fwnode)	134	static inline bool is_of_node(struct fwnode_handle *fwnode)
135	{	135	{
136	return fwnode && fwnode->type == FWNODE_OF;	136	return !IS_ERR_OR_NULL(fwnode) && fwnode->type == FWNODE_OF;
137	}	137	}
138		138
139	static inline struct device_node to_of_node(struct fwnode_handle fwnode)	139	static inline struct device_node to_of_node(struct fwnode_handle fwnode)

include/linux/page-flags.h+22−0

@@ -516,6 +516,27 @@ static inline int PageTransCompound(struct page *page) · 515 unmodified lines
516	return PageCompound(page);	516	return PageCompound(page);
517	}	517	}
518		518
		519	/*
		520	* PageTransCompoundMap is the same as PageTransCompound, but it also
		521	* guarantees the primary MMU has the entire compound page mapped
		522	* through pmd_trans_huge, which in turn guarantees the secondary MMUs
		523	* can also map the entire compound page. This allows the secondary
		524	* MMUs to call get_user_pages() only once for each compound page and
		525	* to immediately map the entire compound page with a single secondary
		526	* MMU fault. If there will be a pmd split later, the secondary MMUs
		527	* will get an update through the MMU notifier invalidation through
		528	* split_huge_pmd().
		529	*
		530	* Unlike PageTransCompound, this is safe to be called only while
		531	* split_huge_pmd() cannot run from under us, like if protected by the
		532	* MMU notifier, otherwise it may result in page->_mapcount < 0 false
		533	* positives.
		534	*/
		535	static inline int PageTransCompoundMap(struct page *page)
		536	{
		537	return PageTransCompound(page) && atomic_read(&page->_mapcount) < 0;
		538	}
		539
519	/*	540	/*
520	* PageTransTail returns true for both transparent huge pages	541	* PageTransTail returns true for both transparent huge pages
521	* and hugetlbfs pages, so it should only be called when it's known	542	* and hugetlbfs pages, so it should only be called when it's known
@@ -559,6 +580,7 @@ static inline int TestClearPageDoubleMap(struct page *page) · 37 unmodified lines
559	#else	580	#else
560	TESTPAGEFLAG_FALSE(TransHuge)	581	TESTPAGEFLAG_FALSE(TransHuge)
561	TESTPAGEFLAG_FALSE(TransCompound)	582	TESTPAGEFLAG_FALSE(TransCompound)
		583	TESTPAGEFLAG_FALSE(TransCompoundMap)
562	TESTPAGEFLAG_FALSE(TransTail)	584	TESTPAGEFLAG_FALSE(TransTail)
563	TESTPAGEFLAG_FALSE(DoubleMap)	585	TESTPAGEFLAG_FALSE(DoubleMap)
564	TESTSETFLAG_FALSE(DoubleMap)	586	TESTSETFLAG_FALSE(DoubleMap)

include/linux/swap.h+4−0

 #ifdef CONFIG_MEMCG
 static inline int mem_cgroup_swappiness(struct mem_cgroup *memcg)
 {
+	/* Cgroup2 doesn't have per-cgroup swappiness */
+	if (cgroup_subsys_on_dfl(memory_cgrp_subsys))
+		return vm_swappiness;
 	/* root ? */
 	if (mem_cgroup_disabled() || !memcg->css.parent)
 		return vm_swappiness;

include/linux/tty_driver.h+2−2

@@ -7,7 +7,7 @@ · 6 unmodified lines
7	* defined; unless noted otherwise, they are optional, and can be	7	* defined; unless noted otherwise, they are optional, and can be
8	* filled in with a null pointer.	8	* filled in with a null pointer.
9	*	9	*
10	* struct tty_struct * (lookup)(struct tty_driver self, int idx)	10	* struct tty_struct * (lookup)(struct tty_driver self, struct file *, int idx)
11	*	11	*
12	* Return the tty device corresponding to idx, NULL if there is not	12	* Return the tty device corresponding to idx, NULL if there is not
13	* one currently in use and an ERR_PTR value on error. Called under	13	* one currently in use and an ERR_PTR value on error. Called under
@@ -250,7 +250,7 @@ struct serial_icounter_struct; · 236 unmodified lines
250		250
251	struct tty_operations {	251	struct tty_operations {
252	struct tty_struct * (lookup)(struct tty_driver driver,	252	struct tty_struct * (lookup)(struct tty_driver driver,
253	struct inode *inode, int idx);	253	struct file *filp, int idx);
254	int (install)(struct tty_driver driver, struct tty_struct *tty);	254	int (install)(struct tty_driver driver, struct tty_struct *tty);
255	void (remove)(struct tty_driver driver, struct tty_struct *tty);	255	void (remove)(struct tty_driver driver, struct tty_struct *tty);
256	int (open)(struct tty_struct tty, struct file * filp);	256	int (open)(struct tty_struct tty, struct file * filp);

include/media/videobuf2-core.h+8−0

 /**
  * struct vb2_ops - driver-specific callbacks
  *
+ * @verify_planes_array: Verify that a given user space structure contains
+ *			enough planes for the buffer. This is called
+ *			for each dequeued buffer.
  * @fill_user_buffer:	given a vb2_buffer fill in the userspace structure.
  *			For V4L2 this is a struct v4l2_buffer.
  * @fill_vb2_buffer:	given a userspace structure, fill in the vb2_buffer.
  *			the vb2_buffer struct.
  */
 struct vb2_buf_ops {
+	int (*verify_planes_array)(struct vb2_buffer *vb, const void *pb);
 	void (*fill_user_buffer)(struct vb2_buffer *vb, void *pb);
 	int (*fill_vb2_buffer)(struct vb2_buffer *vb, const void *pb,
 				struct vb2_plane *planes);
  * @fileio_read_once:		report EOF after reading the first buffer
  * @fileio_write_immediately:	queue buffer after each write() call
  * @allow_zero_bytesused:	allow bytesused == 0 to be passed to the driver
+ * @quirk_poll_must_check_waiting_for_buffers: Return POLLERR at poll when QBUF
+ *              has not been called. This is a vb1 idiom that has been adopted
+ *              also by vb2.
  * @lock:	pointer to a mutex that protects the vb2_queue struct. The
  *		driver can set this to a mutex to let the v4l2 core serialize
  *		the queuing ioctls. If the driver wants to handle locking
 	unsigned			fileio_read_once:1;
 	unsigned			fileio_write_immediately:1;
 	unsigned			allow_zero_bytesused:1;
+	unsigned		   quirk_poll_must_check_waiting_for_buffers:1;
 	struct mutex			*lock;
 	void				*owner;

include/net/switchdev.h+4−0

 	struct net_device *orig_dev;
 	enum switchdev_attr_id id;
 	u32 flags;
+	void *complete_priv;
+	void (*complete)(struct net_device *dev, int err, void *priv);
 	union {
 		struct netdev_phys_item_id ppid;	/* PORT_PARENT_ID */
 		u8 stp_state;				/* PORT_STP_STATE */
 	struct net_device *orig_dev;
 	enum switchdev_obj_id id;
 	u32 flags;
+	void *complete_priv;
+	void (*complete)(struct net_device *dev, int err, void *priv);
 };
 /* SWITCHDEV_OBJ_ID_PORT_VLAN */

include/net/vxlan.h+3−1

 	    (skb->inner_protocol_type != ENCAP_TYPE_ETHER ||
 	     skb->inner_protocol != htons(ETH_P_TEB) ||
 	     (skb_inner_mac_header(skb) - skb_transport_header(skb) !=
-	      sizeof(struct udphdr) + sizeof(struct vxlanhdr))))
+	      sizeof(struct udphdr) + sizeof(struct vxlanhdr)) ||
+	     (skb->ip_summed != CHECKSUM_NONE &&
+	      !can_checksum_protocol(features, inner_eth_hdr(skb)->h_proto))))
 		return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
 	return features;

include/rdma/ib.h+16−0

@@ -34,6 +34,7 @@ · 33 unmodified lines
34	#define _RDMA_IB_H	34	#define _RDMA_IB_H
35		35
36	#include <linux/types.h>	36	#include <linux/types.h>
		37	#include <linux/sched.h>
37		38
38	struct ib_addr {	39	struct ib_addr {
39	union {	40	union {
@@ -86,4 +87,19 @@ struct sockaddr_ib { · 46 unmodified lines
86	__u64 sib_scope_id;	87	__u64 sib_scope_id;
87	};	88	};
88		89
		90	/*
		91	* The IB interfaces that use write() as bi-directional ioctl() are
		92	* fundamentally unsafe, since there are lots of ways to trigger "write()"
		93	* calls from various contexts with elevated privileges. That includes the
		94	* traditional suid executable error message writes, but also various kernel
		95	* interfaces that can write to file descriptors.
		96	*
		97	* This function provides protection for the legacy API by restricting the
		98	* calling context.
		99	*/
		100	static inline bool ib_safe_file_access(struct file *filp)
		101	{
		102	return filp->f_cred == current_cred() && segment_eq(get_fs(), USER_DS);
		103	}
		104
89	#endif /* _RDMA_IB_H */	105	#endif /* _RDMA_IB_H */

include/sound/dmaengine_pcm.h+12−0

 	void *filter_data);
 struct dma_chan *snd_dmaengine_pcm_get_chan(struct snd_pcm_substream *substream);
+/*
+ * The DAI supports packed transfers, eg 2 16-bit samples in a 32-bit word.
+ * If this flag is set the dmaengine driver won't put any restriction on
+ * the supported sample formats and set the DMA transfer size to undefined.
+ * The DAI driver is responsible to disable any unsupported formats in it's
+ * configuration and catch corner cases that are not already handled in
+ * the ALSA core.
+ */
+#define SND_DMAENGINE_PCM_DAI_FLAG_PACK BIT(0)
 /**
  * struct snd_dmaengine_dai_dma_data - DAI DMA configuration data
  * @addr: Address of the DAI data source or destination register.
  * requesting the DMA channel.
  * @chan_name: Custom channel name to use when requesting DMA channel.
  * @fifo_size: FIFO size of the DAI controller in bytes
+ * @flags: PCM_DAI flags, only SND_DMAENGINE_PCM_DAI_FLAG_PACK for now
  */
 struct snd_dmaengine_dai_dma_data {
 	dma_addr_t addr;
 	void *filter_data;
 	const char *chan_name;
 	unsigned int fifo_size;
+	unsigned int flags;
 };
 void snd_dmaengine_pcm_set_config_from_dai_data(

include/sound/hdaudio_ext.h+13−0

  * @gtscap: gts capabilities pointer
  * @drsmcap: dma resume capabilities pointer
  * @hlink_list: link list of HDA links
+ * @lock: lock for link mgmt
+ * @cmd_dma_state: state of cmd DMAs: CORB and RIRB
  */
 struct hdac_ext_bus {
 	struct hdac_bus bus;
 	void __iomem *drsmcap;
 	struct list_head hlink_list;
+	struct mutex lock;
+	bool cmd_dma_state;
 };
 int snd_hdac_ext_bus_init(struct hdac_ext_bus *sbus, struct device *dev,
 	void __iomem *ml_addr; /* link output stream reg pointer */
 	u32 lcaps;   /* link capablities */
 	u16 lsdiid;  /* link sdi identifier */
+	int ref_count;
 	struct list_head list;
 };
 void snd_hdac_ext_link_clear_stream_id(struct hdac_ext_link *link,
 				 int stream);
+int snd_hdac_ext_bus_link_get(struct hdac_ext_bus *ebus,
+				struct hdac_ext_link *link);
+int snd_hdac_ext_bus_link_put(struct hdac_ext_bus *ebus,
+				struct hdac_ext_link *link);
 /* update register macro */
 #define snd_hdac_updatel(addr, reg, mask, val)		\
 	writel(((readl(addr + reg) & ~(mask)) | (val)), \

include/sound/hdmi-codec.h+100−0

@@ -0,0 +1,100 @@
	1	/*
	2	* hdmi-codec.h - HDMI Codec driver API
	3	*
	4	* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
	5	*
	6	* Author: Jyri Sarha <jsarha@ti.com>
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License
	10	* version 2 as published by the Free Software Foundation.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*/
	17
	18	#ifndef __HDMI_CODEC_H__
	19	#define __HDMI_CODEC_H__
	20
	21	#include <linux/hdmi.h>
	22	#include <drm/drm_edid.h>
	23	#include <sound/asoundef.h>
	24	#include <uapi/sound/asound.h>
	25
	26	/*
	27	* Protocol between ASoC cpu-dai and HDMI-encoder
	28	*/
	29	struct hdmi_codec_daifmt {
	30	enum {
	31	HDMI_I2S,
	32	HDMI_RIGHT_J,
	33	HDMI_LEFT_J,
	34	HDMI_DSP_A,
	35	HDMI_DSP_B,
	36	HDMI_AC97,
	37	HDMI_SPDIF,
	38	} fmt;
	39	int bit_clk_inv:1;
	40	int frame_clk_inv:1;
	41	int bit_clk_master:1;
	42	int frame_clk_master:1;
	43	};
	44
	45	/*
	46	* HDMI audio parameters
	47	*/
	48	struct hdmi_codec_params {
	49	struct hdmi_audio_infoframe cea;
	50	struct snd_aes_iec958 iec;
	51	int sample_rate;
	52	int sample_width;
	53	int channels;
	54	};
	55
	56	struct hdmi_codec_ops {
	57	/*
	58	* Called when ASoC starts an audio stream setup.
	59	* Optional
	60	*/
	61	int (audio_startup)(struct device dev);
	62
	63	/*
	64	* Configures HDMI-encoder for audio stream.
	65	* Mandatory
	66	*/
	67	int (hw_params)(struct device dev,
	68	struct hdmi_codec_daifmt *fmt,
	69	struct hdmi_codec_params *hparms);
	70
	71	/*
	72	* Shuts down the audio stream.
	73	* Mandatory
	74	*/
	75	void (audio_shutdown)(struct device dev);
	76
	77	/*
	78	* Mute/unmute HDMI audio stream.
	79	* Optional
	80	*/
	81	int (digital_mute)(struct device dev, bool enable);
	82
	83	/*
	84	* Provides EDID-Like-Data from connected HDMI device.
	85	* Optional
	86	*/
	87	int (get_eld)(struct device dev, uint8_t *buf, size_t len);
	88	};
	89
	90	/* HDMI codec initalization data */
	91	struct hdmi_codec_pdata {
	92	const struct hdmi_codec_ops *ops;
	93	uint i2s:1;
	94	uint spdif:1;
	95	int max_i2s_channels;
	96	};
	97
	98	#define HDMI_CODEC_DRV_NAME "hdmi-audio-codec"
	99
	100	#endif /* __HDMI_CODEC_H__ */

include/sound/pcm_iec958.h+2−0

@@ -6,4 +6,6 @@ · 5 unmodified lines
6	int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime runtime, u8 cs,	6	int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime runtime, u8 cs,
7	size_t len);	7	size_t len);
8		8
		9	int snd_pcm_create_iec958_consumer_hw_params(struct snd_pcm_hw_params *params,
		10	u8 *cs, size_t len);
9	#endif	11	#endif

include/sound/soc-dapm.h+2−1

 {       .id = snd_soc_dapm_mixer_named_ctl, .name = wname, \
 	SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
 	.kcontrol_news = wcontrols, .num_kcontrols = wncontrols}
+/* DEPRECATED: use SND_SOC_DAPM_SUPPLY */
 #define SND_SOC_DAPM_MICBIAS(wname, wreg, wshift, winvert) \
 {	.id = snd_soc_dapm_micbias, .name = wname, \
 	SND_SOC_DAPM_INIT_REG_VAL(wreg, wshift, winvert), \
 	snd_soc_dapm_out_drv,			/* output driver */
 	snd_soc_dapm_adc,			/* analog to digital converter */
 	snd_soc_dapm_dac,			/* digital to analog converter */
-	snd_soc_dapm_micbias,		/* microphone bias (power) */
+	snd_soc_dapm_micbias,		/* microphone bias (power) - DEPRECATED: use snd_soc_dapm_supply */
 	snd_soc_dapm_mic,			/* microphone */
 	snd_soc_dapm_hp,			/* headphones */
 	snd_soc_dapm_spk,			/* speaker */

include/sound/soc.h+4−1

 	 */
 	const char *platform_name;
 	struct device_node *platform_of_node;
-	int be_id;	/* optional ID for machine driver BE identification */
+	int id;	/* optional ID for machine driver link identification */
 	const struct snd_soc_pcm_stream *params;
 	unsigned int num_params;
 int snd_soc_register_dai(struct snd_soc_component *component,
 	struct snd_soc_dai_driver *dai_drv);
+struct snd_soc_dai *snd_soc_find_dai(
+	const struct snd_soc_dai_link_component *dlc);
 #include <sound/soc-dai.h>
 #ifdef CONFIG_DEBUG_FS

include/uapi/asm-generic/unistd.h+2−2

@@ -718,9 +718,9 @@ __SYSCALL(__NR_mlock2, sys_mlock2) · 717 unmodified lines
718	#define __NR_copy_file_range 285	718	#define __NR_copy_file_range 285
719	__SYSCALL(__NR_copy_file_range, sys_copy_file_range)	719	__SYSCALL(__NR_copy_file_range, sys_copy_file_range)
720	#define __NR_preadv2 286	720	#define __NR_preadv2 286
721	__SYSCALL(__NR_preadv2, sys_preadv2)	721	__SC_COMP(__NR_preadv2, sys_preadv2, compat_sys_preadv2)
722	#define __NR_pwritev2 287	722	#define __NR_pwritev2 287
723	__SYSCALL(__NR_pwritev2, sys_pwritev2)	723	__SC_COMP(__NR_pwritev2, sys_pwritev2, compat_sys_pwritev2)
724		724
725	#undef __NR_syscalls	725	#undef __NR_syscalls
726	#define __NR_syscalls 288	726	#define __NR_syscalls 288

include/uapi/linux/if_macsec.h+2−2

@@ -19,8 +19,8 @@ · 18 unmodified lines
19		19
20	#define MACSEC_MAX_KEY_LEN 128	20	#define MACSEC_MAX_KEY_LEN 128
21		21
22	#define DEFAULT_CIPHER_ID 0x0080020001000001ULL	22	#define MACSEC_DEFAULT_CIPHER_ID 0x0080020001000001ULL
23	#define DEFAULT_CIPHER_ALT 0x0080C20001000001ULL	23	#define MACSEC_DEFAULT_CIPHER_ALT 0x0080C20001000001ULL
24		24
25	#define MACSEC_MIN_ICV_LEN 8	25	#define MACSEC_MIN_ICV_LEN 8
26	#define MACSEC_MAX_ICV_LEN 32	26	#define MACSEC_MAX_ICV_LEN 32

include/uapi/linux/rio_mport_cdev.hrenamed from include/linux/rio_mport_cdev.h+75−69

@@ -39,16 +39,16 @@ · 38 unmodified lines
39	#ifndef _RIO_MPORT_CDEV_H_	39	#ifndef _RIO_MPORT_CDEV_H_
40	#define _RIO_MPORT_CDEV_H_	40	#define _RIO_MPORT_CDEV_H_
41		41
42	#ifndef __user	42	#include <linux/ioctl.h>
43	#define __user	43	#include <linux/types.h>
44	#endif
45		44
46	struct rio_mport_maint_io {	45	struct rio_mport_maint_io {
47	uint32_t rioid; /* destID of remote device */	46	__u16 rioid; /* destID of remote device */
48	uint32_t hopcount; /* hopcount to remote device */	47	__u8 hopcount; /* hopcount to remote device */
49	uint32_t offset; /* offset in register space */	48	__u8 pad0[5];
50	size_t length; /* length in bytes */	49	__u32 offset; /* offset in register space */
51	void __user buffer; / data buffer */	50	__u32 length; /* length in bytes */
		51	__u64 buffer; /* pointer to data buffer */
52	};	52	};
53		53
54	/*	54	/*
@@ -66,22 +66,23 @@ struct rio_mport_maint_io { · 11 unmodified lines
66	#define RIO_CAP_MAP_INB (1 << 7)	66	#define RIO_CAP_MAP_INB (1 << 7)
67		67
68	struct rio_mport_properties {	68	struct rio_mport_properties {
69	uint16_t hdid;	69	__u16 hdid;
70	uint8_t id; /* Physical port ID */	70	__u8 id; /* Physical port ID */
71	uint8_t index;	71	__u8 index;
72	uint32_t flags;	72	__u32 flags;
73	uint32_t sys_size; /* Default addressing size */	73	__u32 sys_size; /* Default addressing size */
74	uint8_t port_ok;	74	__u8 port_ok;
75	uint8_t link_speed;	75	__u8 link_speed;
76	uint8_t link_width;	76	__u8 link_width;
77	uint32_t dma_max_sge;	77	__u8 pad0;
78	uint32_t dma_max_size;	78	__u32 dma_max_sge;
79	uint32_t dma_align;	79	__u32 dma_max_size;
80	uint32_t transfer_mode; /* Default transfer mode */	80	__u32 dma_align;
81	uint32_t cap_sys_size; /* Capable system sizes */	81	__u32 transfer_mode; /* Default transfer mode */
82	uint32_t cap_addr_size; /* Capable addressing sizes */	82	__u32 cap_sys_size; /* Capable system sizes */
83	uint32_t cap_transfer_mode; /* Capable transfer modes */	83	__u32 cap_addr_size; /* Capable addressing sizes */
84	uint32_t cap_mport; /* Mport capabilities */	84	__u32 cap_transfer_mode; /* Capable transfer modes */
		85	__u32 cap_mport; /* Mport capabilities */
85	};	86	};
86		87
87	/*	88	/*
@@ -93,54 +94,57 @@ struct rio_mport_properties { · 5 unmodified lines
93	#define RIO_PORTWRITE (1 << 1)	94	#define RIO_PORTWRITE (1 << 1)
94		95
95	struct rio_doorbell {	96	struct rio_doorbell {
96	uint32_t rioid;	97	__u16 rioid;
97	uint16_t payload;	98	__u16 payload;
98	};	99	};
99		100
100	struct rio_doorbell_filter {	101	struct rio_doorbell_filter {
101	uint32_t rioid; /* 0xffffffff to match all ids */	102	__u16 rioid; /* Use RIO_INVALID_DESTID to match all ids */
102	uint16_t low;	103	__u16 low;
103	uint16_t high;	104	__u16 high;
		105	__u16 pad0;
104	};	106	};
105		107
106		108
107	struct rio_portwrite {	109	struct rio_portwrite {
108	uint32_t payload[16];	110	__u32 payload[16];
109	};	111	};
110		112
111	struct rio_pw_filter {	113	struct rio_pw_filter {
112	uint32_t mask;	114	__u32 mask;
113	uint32_t low;	115	__u32 low;
114	uint32_t high;	116	__u32 high;
		117	__u32 pad0;
115	};	118	};
116		119
117	/* RapidIO base address for inbound requests set to value defined below	120	/* RapidIO base address for inbound requests set to value defined below
118	* indicates that no specific RIO-to-local address translation is requested	121	* indicates that no specific RIO-to-local address translation is requested
119	* and driver should use direct (one-to-one) address mapping.	122	* and driver should use direct (one-to-one) address mapping.
120	*/	123	*/
121	#define RIO_MAP_ANY_ADDR (uint64_t)(~((uint64_t) 0))	124	#define RIO_MAP_ANY_ADDR (__u64)(~((__u64) 0))
122		125
123	struct rio_mmap {	126	struct rio_mmap {
124	uint32_t rioid;	127	__u16 rioid;
125	uint64_t rio_addr;	128	__u16 pad0[3];
126	uint64_t length;	129	__u64 rio_addr;
127	uint64_t handle;	130	__u64 length;
128	void *address;	131	__u64 handle;
		132	__u64 address;
129	};	133	};
130		134
131	struct rio_dma_mem {	135	struct rio_dma_mem {
132	uint64_t length; /* length of DMA memory */	136	__u64 length; /* length of DMA memory */
133	uint64_t dma_handle; /* handle associated with this memory */	137	__u64 dma_handle; /* handle associated with this memory */
134	void buffer; / pointer to this memory */	138	__u64 address;
135	};	139	};
136		140
137
138	struct rio_event {	141	struct rio_event {
139	unsigned int header; /* event type RIO_DOORBELL or RIO_PORTWRITE */	142	__u32 header; /* event type RIO_DOORBELL or RIO_PORTWRITE */
140	union {	143	union {
141	struct rio_doorbell doorbell; /* header for RIO_DOORBELL */	144	struct rio_doorbell doorbell; /* header for RIO_DOORBELL */
142	struct rio_portwrite portwrite; /* header for RIO_PORTWRITE */	145	struct rio_portwrite portwrite; /* header for RIO_PORTWRITE */
143	} u;	146	} u;
		147	__u32 pad0;
144	};	148	};
145		149
146	enum rio_transfer_sync {	150	enum rio_transfer_sync {
@@ -184,35 +188,37 @@ enum rio_exchange { · 37 unmodified lines
184	};	188	};
185		189
186	struct rio_transfer_io {	190	struct rio_transfer_io {
187	uint32_t rioid; /* Target destID */	191	__u64 rio_addr; /* Address in target's RIO mem space */
188	uint64_t rio_addr; /* Address in target's RIO mem space */	192	__u64 loc_addr;
189	enum rio_exchange method; /* Data exchange method */	193	__u64 handle;
190	void __user *loc_addr;	194	__u64 offset; /* Offset in buffer */
191	uint64_t handle;	195	__u64 length; /* Length in bytes */
192	uint64_t offset; /* Offset in buffer */	196	__u16 rioid; /* Target destID */
193	uint64_t length; /* Length in bytes */	197	__u16 method; /* Data exchange method, one of rio_exchange enum */
194	uint32_t completion_code; /* Completion code for this transfer */	198	__u32 completion_code; /* Completion code for this transfer */
195	};	199	};
196		200
197	struct rio_transaction {	201	struct rio_transaction {
198	uint32_t transfer_mode; /* Data transfer mode */	202	__u64 block; /* Pointer to array of <count> transfers */
199	enum rio_transfer_sync sync; /* Synchronization method */	203	__u32 count; /* Number of transfers */
200	enum rio_transfer_dir dir; /* Transfer direction */	204	__u32 transfer_mode; /* Data transfer mode */
201	size_t count; /* Number of transfers */	205	__u16 sync; /* Synch method, one of rio_transfer_sync enum */
202	struct rio_transfer_io __user block; / Array of <count> transfers */	206	__u16 dir; /* Transfer direction, one of rio_transfer_dir enum */
		207	__u32 pad0;
203	};	208	};
204		209
205	struct rio_async_tx_wait {	210	struct rio_async_tx_wait {
206	uint32_t token; /* DMA transaction ID token */	211	__u32 token; /* DMA transaction ID token */
207	uint32_t timeout; /* Wait timeout in msec, if 0 use default TO */	212	__u32 timeout; /* Wait timeout in msec, if 0 use default TO */
208	};	213	};
209		214
210	#define RIO_MAX_DEVNAME_SZ 20	215	#define RIO_MAX_DEVNAME_SZ 20
211		216
212	struct rio_rdev_info {	217	struct rio_rdev_info {
213	uint32_t destid;	218	__u16 destid;
214	uint8_t hopcount;	219	__u8 hopcount;
215	uint32_t comptag;	220	__u8 pad0;
		221	__u32 comptag;
216	char name[RIO_MAX_DEVNAME_SZ + 1];	222	char name[RIO_MAX_DEVNAME_SZ + 1];
217	};	223	};
218		224
@@ -220,11 +226,11 @@ struct rio_rdev_info { · 1 unmodified line
220	#define RIO_MPORT_DRV_MAGIC 'm'	226	#define RIO_MPORT_DRV_MAGIC 'm'
221		227
222	#define RIO_MPORT_MAINT_HDID_SET \	228	#define RIO_MPORT_MAINT_HDID_SET \
223	_IOW(RIO_MPORT_DRV_MAGIC, 1, uint16_t)	229	_IOW(RIO_MPORT_DRV_MAGIC, 1, __u16)
224	#define RIO_MPORT_MAINT_COMPTAG_SET \	230	#define RIO_MPORT_MAINT_COMPTAG_SET \
225	_IOW(RIO_MPORT_DRV_MAGIC, 2, uint32_t)	231	_IOW(RIO_MPORT_DRV_MAGIC, 2, __u32)
226	#define RIO_MPORT_MAINT_PORT_IDX_GET \	232	#define RIO_MPORT_MAINT_PORT_IDX_GET \
227	_IOR(RIO_MPORT_DRV_MAGIC, 3, uint32_t)	233	_IOR(RIO_MPORT_DRV_MAGIC, 3, __u32)
228	#define RIO_MPORT_GET_PROPERTIES \	234	#define RIO_MPORT_GET_PROPERTIES \
229	_IOR(RIO_MPORT_DRV_MAGIC, 4, struct rio_mport_properties)	235	_IOR(RIO_MPORT_DRV_MAGIC, 4, struct rio_mport_properties)
230	#define RIO_MPORT_MAINT_READ_LOCAL \	236	#define RIO_MPORT_MAINT_READ_LOCAL \
@@ -244,9 +250,9 @@ struct rio_rdev_info { · 13 unmodified lines
244	#define RIO_DISABLE_PORTWRITE_RANGE \	250	#define RIO_DISABLE_PORTWRITE_RANGE \
245	_IOW(RIO_MPORT_DRV_MAGIC, 12, struct rio_pw_filter)	251	_IOW(RIO_MPORT_DRV_MAGIC, 12, struct rio_pw_filter)
246	#define RIO_SET_EVENT_MASK \	252	#define RIO_SET_EVENT_MASK \
247	_IOW(RIO_MPORT_DRV_MAGIC, 13, unsigned int)	253	_IOW(RIO_MPORT_DRV_MAGIC, 13, __u32)
248	#define RIO_GET_EVENT_MASK \	254	#define RIO_GET_EVENT_MASK \
249	_IOR(RIO_MPORT_DRV_MAGIC, 14, unsigned int)	255	_IOR(RIO_MPORT_DRV_MAGIC, 14, __u32)
250	#define RIO_MAP_OUTBOUND \	256	#define RIO_MAP_OUTBOUND \
251	_IOWR(RIO_MPORT_DRV_MAGIC, 15, struct rio_mmap)	257	_IOWR(RIO_MPORT_DRV_MAGIC, 15, struct rio_mmap)
252	#define RIO_UNMAP_OUTBOUND \	258	#define RIO_UNMAP_OUTBOUND \
@@ -254,11 +260,11 @@ struct rio_rdev_info { · 1 unmodified line
254	#define RIO_MAP_INBOUND \	260	#define RIO_MAP_INBOUND \
255	_IOWR(RIO_MPORT_DRV_MAGIC, 17, struct rio_mmap)	261	_IOWR(RIO_MPORT_DRV_MAGIC, 17, struct rio_mmap)
256	#define RIO_UNMAP_INBOUND \	262	#define RIO_UNMAP_INBOUND \
257	_IOW(RIO_MPORT_DRV_MAGIC, 18, uint64_t)	263	_IOW(RIO_MPORT_DRV_MAGIC, 18, __u64)
258	#define RIO_ALLOC_DMA \	264	#define RIO_ALLOC_DMA \
259	_IOWR(RIO_MPORT_DRV_MAGIC, 19, struct rio_dma_mem)	265	_IOWR(RIO_MPORT_DRV_MAGIC, 19, struct rio_dma_mem)
260	#define RIO_FREE_DMA \	266	#define RIO_FREE_DMA \
261	_IOW(RIO_MPORT_DRV_MAGIC, 20, uint64_t)	267	_IOW(RIO_MPORT_DRV_MAGIC, 20, __u64)
262	#define RIO_TRANSFER \	268	#define RIO_TRANSFER \
263	_IOWR(RIO_MPORT_DRV_MAGIC, 21, struct rio_transaction)	269	_IOWR(RIO_MPORT_DRV_MAGIC, 21, struct rio_transaction)
264	#define RIO_WAIT_FOR_ASYNC \	270	#define RIO_WAIT_FOR_ASYNC \

include/uapi/linux/swab.h+15−9

 static inline __attribute_const__ __u16 __fswab16(__u16 val)
 {
-#ifdef __HAVE_BUILTIN_BSWAP16__
+#if defined (__arch_swab16)
-	return __builtin_bswap16(val);
-#elif defined (__arch_swab16)
 	return __arch_swab16(val);
 #else
 	return ___constant_swab16(val);
 static inline __attribute_const__ __u32 __fswab32(__u32 val)
 {
-#ifdef __HAVE_BUILTIN_BSWAP32__
+#if defined(__arch_swab32)
-	return __builtin_bswap32(val);
-#elif defined(__arch_swab32)
 	return __arch_swab32(val);
 #else
 	return ___constant_swab32(val);
 static inline __attribute_const__ __u64 __fswab64(__u64 val)
 {
-#ifdef __HAVE_BUILTIN_BSWAP64__
+#if defined (__arch_swab64)
-	return __builtin_bswap64(val);
-#elif defined (__arch_swab64)
 	return __arch_swab64(val);
 #elif defined(__SWAB_64_THRU_32__)
 	__u32 h = val >> 32;
  * __swab16 - return a byteswapped 16-bit value
  * @x: value to byteswap
  */
+#ifdef __HAVE_BUILTIN_BSWAP16__
+#define __swab16(x) (__u16)__builtin_bswap16((__u16)(x))
+#else
 #define __swab16(x)				\
 	(__builtin_constant_p((__u16)(x)) ?	\
 	___constant_swab16(x) :			\
 	__fswab16(x))
+#endif
 /**
  * __swab32 - return a byteswapped 32-bit value
  * @x: value to byteswap
  */
+#ifdef __HAVE_BUILTIN_BSWAP32__
+#define __swab32(x) (__u32)__builtin_bswap32((__u32)(x))
+#else
 #define __swab32(x)				\
 	(__builtin_constant_p((__u32)(x)) ?	\
 	___constant_swab32(x) :			\
 	__fswab32(x))
+#endif
 /**
  * __swab64 - return a byteswapped 64-bit value
  * @x: value to byteswap
  */
+#ifdef __HAVE_BUILTIN_BSWAP64__
+#define __swab64(x) (__u64)__builtin_bswap64((__u64)(x))
+#else
 #define __swab64(x)				\
 	(__builtin_constant_p((__u64)(x)) ?	\
 	___constant_swab64(x) :			\
 	__fswab64(x))
+#endif
 /**
  * __swahw32 - return a word-swapped 32-bit value

include/uapi/linux/v4l2-dv-timings.h+20−10

 #define V4L2_DV_BT_CEA_3840X2160P24 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 1276, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_3840X2160P25 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
 }
 #define V4L2_DV_BT_CEA_3840X2160P30 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_3840X2160P50 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		594000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
 }
 #define V4L2_DV_BT_CEA_3840X2160P60 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		594000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_4096X2160P24 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 1020, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_4096X2160P25 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
 }
 #define V4L2_DV_BT_CEA_4096X2160P30 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_4096X2160P50 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		594000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
 }
 #define V4L2_DV_BT_CEA_4096X2160P60 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		594000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \

include/xen/page.h+2−2

@@ -15,9 +15,9 @@ · 14 unmodified lines
15	*/	15	*/
16		16
17	#define xen_pfn_to_page(xen_pfn) \	17	#define xen_pfn_to_page(xen_pfn) \
18	((pfn_to_page(((unsigned long)(xen_pfn) << XEN_PAGE_SHIFT) >> PAGE_SHIFT)))	18	(pfn_to_page((unsigned long)(xen_pfn) >> (PAGE_SHIFT - XEN_PAGE_SHIFT)))
19	#define page_to_xen_pfn(page) \	19	#define page_to_xen_pfn(page) \
20	(((page_to_pfn(page)) << PAGE_SHIFT) >> XEN_PAGE_SHIFT)	20	((page_to_pfn(page)) << (PAGE_SHIFT - XEN_PAGE_SHIFT))
21		21
22	#define XEN_PFN_PER_PAGE (PAGE_SIZE / XEN_PAGE_SIZE)	22	#define XEN_PFN_PER_PAGE (PAGE_SIZE / XEN_PAGE_SIZE)
23		23

kernel/bpf/inode.c+4−3

 {
 	switch (type) {
 	case BPF_TYPE_PROG:
-		atomic_inc(&((struct bpf_prog *)raw)->aux->refcnt);
+		raw = bpf_prog_inc(raw);
 		break;
 	case BPF_TYPE_MAP:
-		bpf_map_inc(raw, true);
+		raw = bpf_map_inc(raw, true);
 		break;
 	default:
 		WARN_ON_ONCE(1);
 		goto out;
 	raw = bpf_any_get(inode->i_private, *type);
-	touch_atime(&path);
+	if (!IS_ERR(raw))
+		touch_atime(&path);
 	path_put(&path);
 	return raw;

kernel/bpf/syscall.c+20−4

 	return f.file->private_data;
 }
-void bpf_map_inc(struct bpf_map *map, bool uref)
+/* prog's and map's refcnt limit */
+#define BPF_MAX_REFCNT 32768
+struct bpf_map *bpf_map_inc(struct bpf_map *map, bool uref)
 {
-	atomic_inc(&map->refcnt);
+	if (atomic_inc_return(&map->refcnt) > BPF_MAX_REFCNT) {
+		atomic_dec(&map->refcnt);
+		return ERR_PTR(-EBUSY);
+	}
 	if (uref)
 		atomic_inc(&map->usercnt);
+	return map;
 }
 struct bpf_map *bpf_map_get_with_uref(u32 ufd)
 	if (IS_ERR(map))
 		return map;
-	bpf_map_inc(map, true);
+	map = bpf_map_inc(map, true);
 	fdput(f);
 	return map;
 	return f.file->private_data;
 }
+struct bpf_prog *bpf_prog_inc(struct bpf_prog *prog)
+{
+	if (atomic_inc_return(&prog->aux->refcnt) > BPF_MAX_REFCNT) {
+		atomic_dec(&prog->aux->refcnt);
+		return ERR_PTR(-EBUSY);
+	}
+	return prog;
+}
 /* called by sockets/tracing/seccomp before attaching program to an event
  * pairs with bpf_prog_put()
  */
 	if (IS_ERR(prog))
 		return prog;
-	atomic_inc(&prog->aux->refcnt);
+	prog = bpf_prog_inc(prog);
 	fdput(f);
 	return prog;

kernel/bpf/verifier.c+47−30

 	[CONST_IMM]		= "imm",
 };
-static const struct {
-	int map_type;
-	int func_id;
-} func_limit[] = {
-	{BPF_MAP_TYPE_PROG_ARRAY, BPF_FUNC_tail_call},
-	{BPF_MAP_TYPE_PERF_EVENT_ARRAY, BPF_FUNC_perf_event_read},
-	{BPF_MAP_TYPE_PERF_EVENT_ARRAY, BPF_FUNC_perf_event_output},
-	{BPF_MAP_TYPE_STACK_TRACE, BPF_FUNC_get_stackid},
-};
 static void print_verifier_state(struct verifier_env *env)
 {
 	enum bpf_reg_type t;
 static int check_map_func_compatibility(struct bpf_map *map, int func_id)
 {
-	bool bool_map, bool_func;
-	int i;
 	if (!map)
 		return 0;
-	for (i = 0; i < ARRAY_SIZE(func_limit); i++) {
+	/* We need a two way check, first is from map perspective ... */
-		bool_map = (map->map_type == func_limit[i].map_type);
+	switch (map->map_type) {
-		bool_func = (func_id == func_limit[i].func_id);
+	case BPF_MAP_TYPE_PROG_ARRAY:
-		/* only when map & func pair match it can continue.
+		if (func_id != BPF_FUNC_tail_call)
-		 * don't allow any other map type to be passed into
+			goto error;
-		 * the special func;
+		break;
-		 */
+	case BPF_MAP_TYPE_PERF_EVENT_ARRAY:
-		if (bool_func && bool_map != bool_func) {
+		if (func_id != BPF_FUNC_perf_event_read &&
-			verbose("cannot pass map_type %d into func %d\n",
+		    func_id != BPF_FUNC_perf_event_output)
-				map->map_type, func_id);
+			goto error;
-			return -EINVAL;
+		break;
-		}
+	case BPF_MAP_TYPE_STACK_TRACE:
+		if (func_id != BPF_FUNC_get_stackid)
+			goto error;
+		break;
+	default:
+		break;
+	}
+	/* ... and second from the function itself. */
+	switch (func_id) {
+	case BPF_FUNC_tail_call:
+		if (map->map_type != BPF_MAP_TYPE_PROG_ARRAY)
+			goto error;
+		break;
+	case BPF_FUNC_perf_event_read:
+	case BPF_FUNC_perf_event_output:
+		if (map->map_type != BPF_MAP_TYPE_PERF_EVENT_ARRAY)
+			goto error;
+		break;
+	case BPF_FUNC_get_stackid:
+		if (map->map_type != BPF_MAP_TYPE_STACK_TRACE)
+			goto error;
+		break;
+	default:
+		break;
 	}
 	return 0;
+error:
+	verbose("cannot pass map_type %d into func %d\n",
+		map->map_type, func_id);
+	return -EINVAL;
 }
 static int check_call(struct verifier_env *env, int func_id)
 			if (IS_ERR(map)) {
 				verbose("fd %d is not pointing to valid bpf_map\n",
 					insn->imm);
-				fdput(f);
 				return PTR_ERR(map);
 			}
 				return -E2BIG;
 			}
-			/* remember this map */
-			env->used_maps[env->used_map_cnt++] = map;
 			/* hold the map. If the program is rejected by verifier,
 			 * the map will be released by release_maps() or it
 			 * will be used by the valid program until it's unloaded
 			 * and all maps are released in free_bpf_prog_info()
 			 */
-			bpf_map_inc(map, false);
+			map = bpf_map_inc(map, false);
+			if (IS_ERR(map)) {
+				fdput(f);
+				return PTR_ERR(map);
+			}
+			env->used_maps[env->used_map_cnt++] = map;
 			fdput(f);
 next_insn:
 			insn++;

kernel/cgroup.c+5−2

 				    size_t nbytes, loff_t off, bool threadgroup)
 {
 	struct task_struct *tsk;
+	struct cgroup_subsys *ss;
 	struct cgroup *cgrp;
 	pid_t pid;
-	int ret;
+	int ssid, ret;
 	if (kstrtoint(strstrip(buf), 0, &pid) || pid < 0)
 		return -EINVAL;
 	rcu_read_unlock();
 out_unlock_threadgroup:
 	percpu_up_write(&cgroup_threadgroup_rwsem);
+	for_each_subsys(ss, ssid)
+		if (ss->post_attach)
+			ss->post_attach();
 	cgroup_kn_unlock(of->kn);
-	cpuset_post_attach_flush();
 	return ret ?: nbytes;
 }

kernel/cpuset.c+2−2

 #include <asm/uaccess.h>
 #include <linux/atomic.h>
 #include <linux/mutex.h>
-#include <linux/workqueue.h>
 #include <linux/cgroup.h>
 #include <linux/wait.h>
 	}
 }
-void cpuset_post_attach_flush(void)
+static void cpuset_post_attach(void)
 {
 	flush_workqueue(cpuset_migrate_mm_wq);
 }
 	.can_attach	= cpuset_can_attach,
 	.cancel_attach	= cpuset_cancel_attach,
 	.attach		= cpuset_attach,
+	.post_attach	= cpuset_post_attach,
 	.bind		= cpuset_bind,
 	.legacy_cftypes	= files,
 	.early_init	= true,

kernel/events/core.c+38−17

 	if (ret || !write)
 		return ret;
-	if (sysctl_perf_cpu_time_max_percent == 100) {
+	if (sysctl_perf_cpu_time_max_percent == 100 ||
+	    sysctl_perf_cpu_time_max_percent == 0) {
 		printk(KERN_WARNING
 		       "perf: Dynamic interrupt throttling disabled, can hang your system!\n");
 		WRITE_ONCE(perf_sample_allowed_ns, 0);
  * function.
  *
  * Lock order:
+ *    cred_guard_mutex
  *	task_struct::perf_event_mutex
  *	  perf_event_context::mutex
  *	    perf_event::child_mutex;
 find_lively_task_by_vpid(pid_t vpid)
 {
 	struct task_struct *task;
-	int err;
 	rcu_read_lock();
 	if (!vpid)
 	if (!task)
 		return ERR_PTR(-ESRCH);
-	/* Reuse ptrace permission checks for now. */
-	err = -EACCES;
-	if (!ptrace_may_access(task, PTRACE_MODE_READ_REALCREDS))
-		goto errout;
 	return task;
-errout:
-	put_task_struct(task);
-	return ERR_PTR(err);
 }
 /*
 	get_online_cpus();
+	if (task) {
+		err = mutex_lock_interruptible(&task->signal->cred_guard_mutex);
+		if (err)
+			goto err_cpus;
+		/*
+		 * Reuse ptrace permission checks for now.
+		 *
+		 * We must hold cred_guard_mutex across this and any potential
+		 * perf_install_in_context() call for this new event to
+		 * serialize against exec() altering our credentials (and the
+		 * perf_event_exit_task() that could imply).
+		 */
+		err = -EACCES;
+		if (!ptrace_may_access(task, PTRACE_MODE_READ_REALCREDS))
+			goto err_cred;
+	}
 	if (flags & PERF_FLAG_PID_CGROUP)
 		cgroup_fd = pid;
 				 NULL, NULL, cgroup_fd);
 	if (IS_ERR(event)) {
 		err = PTR_ERR(event);
-		goto err_cpus;
+		goto err_cred;
 	}
 	if (is_sampling_event(event)) {
 		goto err_context;
 	}
-	if (task) {
-		put_task_struct(task);
-		task = NULL;
-	}
 	/*
 	 * Look up the group leader (we will attach this event to it):
 	 */
 	WARN_ON_ONCE(ctx->parent_ctx);
+	/*
+	 * This is the point on no return; we cannot fail hereafter. This is
+	 * where we start modifying current state.
+	 */
 	if (move_group) {
 		/*
 		 * See perf_event_ctx_lock() for comments on the details
 		mutex_unlock(&gctx->mutex);
 	mutex_unlock(&ctx->mutex);
+	if (task) {
+		mutex_unlock(&task->signal->cred_guard_mutex);
+		put_task_struct(task);
+	}
 	put_online_cpus();
 	mutex_lock(&current->perf_event_mutex);
 	 */
 	if (!event_file)
 		free_event(event);
+err_cred:
+	if (task)
+		mutex_unlock(&task->signal->cred_guard_mutex);
 err_cpus:
 	put_online_cpus();
 err_task:
 /*
  * When a child task exits, feed back event values to parent events.
+ *
+ * Can be called with cred_guard_mutex held when called from
+ * install_exec_creds().
  */
 void perf_event_exit_task(struct task_struct *child)
 {

kernel/kcov.c+2−1

 #define pr_fmt(fmt) "kcov: " fmt
+#define DISABLE_BRANCH_PROFILING
 #include <linux/compiler.h>
 #include <linux/types.h>
 #include <linux/file.h>
  * Entry point from instrumented code.
  * This is called once per basic-block/edge.
  */
-void __sanitizer_cov_trace_pc(void)
+void notrace __sanitizer_cov_trace_pc(void)
 {
 	struct task_struct *t;
 	enum kcov_mode mode;

kernel/kexec_core.c+5−2

 	VMCOREINFO_OFFSET(page, lru);
 	VMCOREINFO_OFFSET(page, _mapcount);
 	VMCOREINFO_OFFSET(page, private);
+	VMCOREINFO_OFFSET(page, compound_dtor);
+	VMCOREINFO_OFFSET(page, compound_order);
+	VMCOREINFO_OFFSET(page, compound_head);
 	VMCOREINFO_OFFSET(pglist_data, node_zones);
 	VMCOREINFO_OFFSET(pglist_data, nr_zones);
 #ifdef CONFIG_FLAT_NODE_MEM_MAP
 #ifdef CONFIG_X86
 	VMCOREINFO_NUMBER(KERNEL_IMAGE_SIZE);
 #endif
-#ifdef CONFIG_HUGETLBFS
+#ifdef CONFIG_HUGETLB_PAGE
-	VMCOREINFO_SYMBOL(free_huge_page);
+	VMCOREINFO_NUMBER(HUGETLB_PAGE_DTOR);
 #endif
 	arch_crash_save_vmcoreinfo();

kernel/locking/lockdep.c+34−3

 	chain->irq_context = hlock->irq_context;
 	i = get_first_held_lock(curr, hlock);
 	chain->depth = curr->lockdep_depth + 1 - i;
+	BUILD_BUG_ON((1UL << 24) <= ARRAY_SIZE(chain_hlocks));
+	BUILD_BUG_ON((1UL << 6)  <= ARRAY_SIZE(curr->held_locks));
+	BUILD_BUG_ON((1UL << 8*sizeof(chain_hlocks[0])) <= ARRAY_SIZE(lock_classes));
 	if (likely(nr_chain_hlocks + chain->depth <= MAX_LOCKDEP_CHAIN_HLOCKS)) {
 		chain->base = nr_chain_hlocks;
-		nr_chain_hlocks += chain->depth;
 		for (j = 0; j < chain->depth - 1; j++, i++) {
 			int lock_id = curr->held_locks[i].class_idx - 1;
 			chain_hlocks[chain->base + j] = lock_id;
 		}
 		chain_hlocks[chain->base + j] = class - lock_classes;
 	}
+	if (nr_chain_hlocks < MAX_LOCKDEP_CHAIN_HLOCKS)
+		nr_chain_hlocks += chain->depth;
+#ifdef CONFIG_DEBUG_LOCKDEP
+	/*
+	 * Important for check_no_collision().
+	 */
+	if (unlikely(nr_chain_hlocks > MAX_LOCKDEP_CHAIN_HLOCKS)) {
+		if (debug_locks_off_graph_unlock())
+			return 0;
+		print_lockdep_off("BUG: MAX_LOCKDEP_CHAIN_HLOCKS too low!");
+		dump_stack();
+		return 0;
+	}
+#endif
 	hlist_add_head_rcu(&chain->entry, hash_head);
 	debug_atomic_inc(chain_lookup_misses);
 	inc_chains();
 	return 1;
 }
+static inline unsigned int task_irq_context(struct task_struct *task)
+{
+	return 2 * !!task->hardirq_context + !!task->softirq_context;
+}
 static int separate_irq_context(struct task_struct *curr,
 		struct held_lock *hlock)
 {
 	/*
 	 * Keep track of points where we cross into an interrupt context:
 	 */
-	hlock->irq_context = 2*(curr->hardirq_context ? 1 : 0) +
-				curr->softirq_context;
 	if (depth) {
 		struct held_lock *prev_hlock;
 	return 1;
 }
+static inline unsigned int task_irq_context(struct task_struct *task)
+{
+	return 0;
+}
 static inline int separate_irq_context(struct task_struct *curr,
 		struct held_lock *hlock)
 {
 	hlock->acquire_ip = ip;
 	hlock->instance = lock;
 	hlock->nest_lock = nest_lock;
+	hlock->irq_context = task_irq_context(curr);
 	hlock->trylock = trylock;
 	hlock->read = read;
 	hlock->check = check;

kernel/locking/lockdep_proc.c+2−0

@@ -141,6 +141,8 @@ static int lc_show(struct seq_file m, void v) · 140 unmodified lines
141	int i;	141	int i;
142		142
143	if (v == SEQ_START_TOKEN) {	143	if (v == SEQ_START_TOKEN) {
		144	if (nr_chain_hlocks > MAX_LOCKDEP_CHAIN_HLOCKS)
		145	seq_printf(m, "(buggered) ");
144	seq_printf(m, "all lock chains:\n");	146	seq_printf(m, "all lock chains:\n");
145	return 0;	147	return 0;
146	}	148	}

kernel/sched/core.c+16−13

 		return false;
 	/*
-	 * FIFO realtime policy runs the highest priority task (after DEADLINE).
+	 * If there are more than one RR tasks, we need the tick to effect the
-	 * Other runnable tasks are of a lower priority. The scheduler tick
+	 * actual RR behaviour.
-	 * isn't needed.
-	 */
-	fifo_nr_running = rq->rt.rt_nr_running - rq->rt.rr_nr_running;
-	if (fifo_nr_running)
-		return true;
-	/*
-	 * Round-robin realtime tasks time slice with other tasks at the same
-	 * realtime priority.
 	 */
 	if (rq->rt.rr_nr_running) {
 		if (rq->rt.rr_nr_running == 1)
 			return false;
 	}
-	/* Normal multitasking need periodic preemption checks */
+	/*
-	if (rq->cfs.nr_running > 1)
+	 * If there's no RR tasks, but FIFO tasks, we can skip the tick, no
+	 * forced preemption between FIFO tasks.
+	 */
+	fifo_nr_running = rq->rt.rt_nr_running - rq->rt.rr_nr_running;
+	if (fifo_nr_running)
+		return true;
+	/*
+	 * If there are no DL,RR/FIFO tasks, there must only be CFS tasks left;
+	 * if there's more than one we need the tick for involuntary
+	 * preemption.
+	 */
+	if (rq->nr_running > 1)
 		return false;
 	return true;

kernel/trace/trace_events.c+7−2

 	trace_create_file("filter", 0644, file->dir, file,
 			  &ftrace_event_filter_fops);
-	trace_create_file("trigger", 0644, file->dir, file,
+	/*
-			  &event_trigger_fops);
+	 * Only event directories that can be enabled should have
+	 * triggers.
+	 */
+	if (!(call->flags & TRACE_EVENT_FL_IGNORE_ENABLE))
+		trace_create_file("trigger", 0644, file->dir, file,
+				  &event_trigger_fops);
 	trace_create_file("format", 0444, file->dir, call,
 			  &ftrace_event_format_fops);

kernel/workqueue.c+29−0

@@ -666,6 +666,35 @@ static void set_work_pool_and_clear_pending(struct work_struct *work, · 665 unmodified lines
666	*/	666	*/
667	smp_wmb();	667	smp_wmb();
668	set_work_data(work, (unsigned long)pool_id << WORK_OFFQ_POOL_SHIFT, 0);	668	set_work_data(work, (unsigned long)pool_id << WORK_OFFQ_POOL_SHIFT, 0);
		669	/*
		670	* The following mb guarantees that previous clear of a PENDING bit
		671	* will not be reordered with any speculative LOADS or STORES from
		672	* work->current_func, which is executed afterwards. This possible
		673	* reordering can lead to a missed execution on attempt to qeueue
		674	* the same @work. E.g. consider this case:
		675	*
		676	* CPU#0 CPU#1
		677	* ---------------------------- --------------------------------
		678	*
		679	* 1 STORE event_indicated
		680	* 2 queue_work_on() {
		681	* 3 test_and_set_bit(PENDING)
		682	* 4 } set_..._and_clear_pending() {
		683	* 5 set_work_data() # clear bit
		684	* 6 smp_mb()
		685	* 7 work->current_func() {
		686	* 8 LOAD event_indicated
		687	* }
		688	*
		689	* Without an explicit full barrier speculative LOAD on line 8 can
		690	* be executed before CPU#0 does STORE on line 1. If that happens,
		691	* CPU#0 observes the PENDING bit is still set and new execution of
		692	* a @work is not queued in a hope, that CPU#1 will eventually
		693	* finish the queued @work. Meanwhile CPU#1 does not see
		694	* event_indicated is set, because speculative LOAD was executed
		695	* before actual STORE.
		696	*/
		697	smp_mb();
669	}	698	}
670		699
671	static void clear_work_data(struct work_struct *work)	700	static void clear_work_data(struct work_struct *work)

lib/stackdepot.c+5−5

 #define DEPOT_STACK_BITS (sizeof(depot_stack_handle_t) * 8)
+#define STACK_ALLOC_NULL_PROTECTION_BITS 1
 #define STACK_ALLOC_ORDER 2 /* 'Slab' size order for stack depot, 4 pages */
 #define STACK_ALLOC_SIZE (1LL << (PAGE_SHIFT + STACK_ALLOC_ORDER))
 #define STACK_ALLOC_ALIGN 4
 #define STACK_ALLOC_OFFSET_BITS (STACK_ALLOC_ORDER + PAGE_SHIFT - \
 					STACK_ALLOC_ALIGN)
-#define STACK_ALLOC_INDEX_BITS (DEPOT_STACK_BITS - STACK_ALLOC_OFFSET_BITS)
+#define STACK_ALLOC_INDEX_BITS (DEPOT_STACK_BITS - \
+		STACK_ALLOC_NULL_PROTECTION_BITS - STACK_ALLOC_OFFSET_BITS)
 #define STACK_ALLOC_SLABS_CAP 1024
 #define STACK_ALLOC_MAX_SLABS \
 	(((1LL << (STACK_ALLOC_INDEX_BITS)) < STACK_ALLOC_SLABS_CAP) ? \
 	struct {
 		u32 slabindex : STACK_ALLOC_INDEX_BITS;
 		u32 offset : STACK_ALLOC_OFFSET_BITS;
+		u32 valid : STACK_ALLOC_NULL_PROTECTION_BITS;
 	};
 };
 	stack->size = size;
 	stack->handle.slabindex = depot_index;
 	stack->handle.offset = depot_offset >> STACK_ALLOC_ALIGN;
+	stack->handle.valid = 1;
 	memcpy(stack->entries, entries, size * sizeof(unsigned long));
 	depot_offset += required_size;
 		goto fast_exit;
 	hash = hash_stack(trace->entries, trace->nr_entries);
-	/* Bad luck, we won't store this stack. */
-	if (hash == 0)
-		goto exit;
 	bucket = &stack_table[hash & STACK_HASH_MASK];
 	/*

mm/compaction.c+4−10

 		pfn = isolate_migratepages_block(cc, pfn, block_end_pfn,
 							ISOLATE_UNEVICTABLE);
-		/*
+		if (!pfn)
-		 * In case of fatal failure, release everything that might
-		 * have been isolated in the previous iteration, and signal
-		 * the failure back to caller.
-		 */
-		if (!pfn) {
-			putback_movable_pages(&cc->migratepages);
-			cc->nr_migratepages = 0;
 			break;
-		}
 		if (cc->nr_migratepages == COMPACT_CLUSTER_MAX)
 			break;
 static inline bool kcompactd_work_requested(pg_data_t *pgdat)
 {
-	return pgdat->kcompactd_max_order > 0;
+	return pgdat->kcompactd_max_order > 0 || kthread_should_stop();
 }
 static bool kcompactd_node_suitable(pg_data_t *pgdat)
 		INIT_LIST_HEAD(&cc.freepages);
 		INIT_LIST_HEAD(&cc.migratepages);
+		if (kthread_should_stop())
+			return;
 		status = compact_zone(zone, &cc);
 		if (zone_watermark_ok(zone, cc.order, low_wmark_pages(zone),

mm/huge_memory.c+7−9

 	return READ_ONCE(huge_zero_page);
 }
-static void put_huge_zero_page(void)
+void put_huge_zero_page(void)
 {
 	/*
 	 * Counter should never go to zero here. Only shrinker can put
 	if (vma_is_dax(vma)) {
 		spin_unlock(ptl);
 		if (is_huge_zero_pmd(orig_pmd))
-			put_huge_zero_page();
+			tlb_remove_page(tlb, pmd_page(orig_pmd));
 	} else if (is_huge_zero_pmd(orig_pmd)) {
 		pte_free(tlb->mm, pgtable_trans_huge_withdraw(tlb->mm, pmd));
 		atomic_long_dec(&tlb->mm->nr_ptes);
 		spin_unlock(ptl);
-		put_huge_zero_page();
+		tlb_remove_page(tlb, pmd_page(orig_pmd));
 	} else {
 		struct page *page = pmd_page(orig_pmd);
 		page_remove_rmap(page, true);
 		 * page fault if needed.
 		 */
 		return 0;
-	if (vma->vm_ops)
+	if (vma->vm_ops || (vm_flags & VM_NO_THP))
 		/* khugepaged not yet working on file or special mappings */
 		return 0;
-	VM_BUG_ON_VMA(vm_flags & VM_NO_THP, vma);
 	hstart = (vma->vm_start + ~HPAGE_PMD_MASK) & HPAGE_PMD_MASK;
 	hend = vma->vm_end & HPAGE_PMD_MASK;
 	if (hstart < hend)
 		return false;
 	if (is_vma_temporary_stack(vma))
 		return false;
-	VM_BUG_ON_VMA(vma->vm_flags & VM_NO_THP, vma);
+	return !(vma->vm_flags & VM_NO_THP);
-	return true;
 }
 static void collapse_huge_page(struct mm_struct *mm,
 		}
 	}
-	pr_info("%lu of %lu THP split", split, total);
+	pr_info("%lu of %lu THP split\n", split, total);
 	return 0;
 }
 {
 	void *ret;
-	ret = debugfs_create_file("split_huge_pages", 0644, NULL, NULL,
+	ret = debugfs_create_file("split_huge_pages", 0200, NULL, NULL,
 			&split_huge_pages_fops);
 	if (!ret)
 		pr_warn("Failed to create split_huge_pages in debugfs");

mm/memcontrol.c+19−18

 /* "mc" and its members are protected by cgroup_mutex */
 static struct move_charge_struct {
 	spinlock_t	  lock; /* for from, to */
+	struct mm_struct  *mm;
 	struct mem_cgroup *from;
 	struct mem_cgroup *to;
 	unsigned long flags;
 static void mem_cgroup_clear_mc(void)
 {
+	struct mm_struct *mm = mc.mm;
 	/*
 	 * we must clear moving_task before waking up waiters at the end of
 	 * task migration.
 	spin_lock(&mc.lock);
 	mc.from = NULL;
 	mc.to = NULL;
+	mc.mm = NULL;
 	spin_unlock(&mc.lock);
+	mmput(mm);
 }
 static int mem_cgroup_can_attach(struct cgroup_taskset *tset)
 		VM_BUG_ON(mc.moved_swap);
 		spin_lock(&mc.lock);
+		mc.mm = mm;
 		mc.from = from;
 		mc.to = memcg;
 		mc.flags = move_flags;
 		ret = mem_cgroup_precharge_mc(mm);
 		if (ret)
 			mem_cgroup_clear_mc();
+	} else {
+		mmput(mm);
 	}
-	mmput(mm);
 	return ret;
 }
 	return ret;
 }
-static void mem_cgroup_move_charge(struct mm_struct *mm)
+static void mem_cgroup_move_charge(void)
 {
 	struct mm_walk mem_cgroup_move_charge_walk = {
 		.pmd_entry = mem_cgroup_move_charge_pte_range,
-		.mm = mm,
+		.mm = mc.mm,
 	};
 	lru_add_drain_all();
 	atomic_inc(&mc.from->moving_account);
 	synchronize_rcu();
 retry:
-	if (unlikely(!down_read_trylock(&mm->mmap_sem))) {
+	if (unlikely(!down_read_trylock(&mc.mm->mmap_sem))) {
 		/*
 		 * Someone who are holding the mmap_sem might be waiting in
 		 * waitq. So we cancel all extra charges, wake up all waiters,
 	 * additional charge, the page walk just aborts.
 	 */
 	walk_page_range(0, ~0UL, &mem_cgroup_move_charge_walk);
-	up_read(&mm->mmap_sem);
+	up_read(&mc.mm->mmap_sem);
 	atomic_dec(&mc.from->moving_account);
 }
-static void mem_cgroup_move_task(struct cgroup_taskset *tset)
+static void mem_cgroup_move_task(void)
 {
-	struct cgroup_subsys_state *css;
+	if (mc.to) {
-	struct task_struct *p = cgroup_taskset_first(tset, &css);
+		mem_cgroup_move_charge();
-	struct mm_struct *mm = get_task_mm(p);
-	if (mm) {
-		if (mc.to)
-			mem_cgroup_move_charge(mm);
-		mmput(mm);
-	}
-	if (mc.to)
 		mem_cgroup_clear_mc();
+	}
 }
 #else	/* !CONFIG_MMU */
 static int mem_cgroup_can_attach(struct cgroup_taskset *tset)
 static void mem_cgroup_cancel_attach(struct cgroup_taskset *tset)
 {
 }
-static void mem_cgroup_move_task(struct cgroup_taskset *tset)
+static void mem_cgroup_move_task(void)
 {
 }
 #endif
 	.css_reset = mem_cgroup_css_reset,
 	.can_attach = mem_cgroup_can_attach,
 	.cancel_attach = mem_cgroup_cancel_attach,
-	.attach = mem_cgroup_move_task,
+	.post_attach = mem_cgroup_move_task,
 	.bind = mem_cgroup_bind,
 	.dfl_cftypes = memory_files,
 	.legacy_cftypes = mem_cgroup_legacy_files,

mm/memory-failure.c+9−1

@@ -888,7 +888,15 @@ int get_hwpoison_page(struct page *page) · 887 unmodified lines
888	}	888	}
889	}	889	}
890		890
891	return get_page_unless_zero(head);	891	if (get_page_unless_zero(head)) {
		892	if (head == compound_head(page))
		893	return 1;
		894
		895	pr_info("MCE: %#lx cannot catch tail\n", page_to_pfn(page));
		896	put_page(head);
		897	}
		898
		899	return 0;
892	}	900	}
893	EXPORT_SYMBOL_GPL(get_hwpoison_page);	901	EXPORT_SYMBOL_GPL(get_hwpoison_page);
894		902

mm/memory.c+42−9

@@ -789,6 +789,46 @@ out: · 788 unmodified lines
789	return pfn_to_page(pfn);	789	return pfn_to_page(pfn);
790	}	790	}
791		791
		792	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
		793	struct page vm_normal_page_pmd(struct vm_area_struct vma, unsigned long addr,
		794	pmd_t pmd)
		795	{
		796	unsigned long pfn = pmd_pfn(pmd);
		797
		798	/*
		799	* There is no pmd_special() but there may be special pmds, e.g.
		800	* in a direct-access (dax) mapping, so let's just replicate the
		801	* !HAVE_PTE_SPECIAL case from vm_normal_page() here.
		802	*/
		803	if (unlikely(vma->vm_flags & (VM_PFNMAP\|VM_MIXEDMAP))) {
		804	if (vma->vm_flags & VM_MIXEDMAP) {
		805	if (!pfn_valid(pfn))
		806	return NULL;
		807	goto out;
		808	} else {
		809	unsigned long off;
		810	off = (addr - vma->vm_start) >> PAGE_SHIFT;
		811	if (pfn == vma->vm_pgoff + off)
		812	return NULL;
		813	if (!is_cow_mapping(vma->vm_flags))
		814	return NULL;
		815	}
		816	}
		817
		818	if (is_zero_pfn(pfn))
		819	return NULL;
		820	if (unlikely(pfn > highest_memmap_pfn))
		821	return NULL;
		822
		823	/*
		824	* NOTE! We still have PageReserved() pages in the page tables.
		825	* eg. VDSO mappings can cause them to exist.
		826	*/
		827	out:
		828	return pfn_to_page(pfn);
		829	}
		830	#endif
		831
792	/*	832	/*
793	* copy one vm_area from one task to the other. Assumes the page tables	833	* copy one vm_area from one task to the other. Assumes the page tables
794	* already present in the new task to be cleared in the whole range	834	* already present in the new task to be cleared in the whole range
@@ -1182,15 +1222,8 @@ static inline unsigned long zap_pmd_range(struct mmu_gather *tlb, · 387 unmodified lines
1182	next = pmd_addr_end(addr, end);	1222	next = pmd_addr_end(addr, end);
1183	if (pmd_trans_huge(pmd) \|\| pmd_devmap(pmd)) {	1223	if (pmd_trans_huge(pmd) \|\| pmd_devmap(pmd)) {
1184	if (next - addr != HPAGE_PMD_SIZE) {	1224	if (next - addr != HPAGE_PMD_SIZE) {
1185	#ifdef CONFIG_DEBUG_VM	1225	VM_BUG_ON_VMA(vma_is_anonymous(vma) &&
1186	if (!rwsem_is_locked(&tlb->mm->mmap_sem)) {	1226	!rwsem_is_locked(&tlb->mm->mmap_sem), vma);
1187	pr_err("%s: mmap_sem is unlocked! addr=0x%lx end=0x%lx vma->vm_start=0x%lx vma->vm_end=0x%lx\n",
1188	__func__, addr, end,
1189	vma->vm_start,
1190	vma->vm_end);
1191	BUG();
1192	}
1193	#endif
1194	split_huge_pmd(vma, pmd, addr);	1227	split_huge_pmd(vma, pmd, addr);
1195	} else if (zap_huge_pmd(tlb, vma, pmd, addr))	1228	} else if (zap_huge_pmd(tlb, vma, pmd, addr))
1196	goto next;	1229	goto next;

mm/migrate.c+7−1

 		dec_zone_page_state(page, NR_ISOLATED_ANON +
 				page_is_file_cache(page));
 		/* Soft-offlined page shouldn't go through lru cache list */
-		if (reason == MR_MEMORY_FAILURE) {
+		if (reason == MR_MEMORY_FAILURE && rc == MIGRATEPAGE_SUCCESS) {
+			/*
+			 * With this release, we free successfully migrated
+			 * page and set PG_HWPoison on just freed page
+			 * intentionally. Although it's rather weird, it's how
+			 * HWPoison flag works at the moment.
+			 */
 			put_page(page);
 			if (!test_set_page_hwpoison(page))
 				num_poisoned_pages_inc();

mm/page-writeback.c+4−2

 	if (gdtc->dirty > gdtc->bg_thresh)
 		return true;
-	if (wb_stat(wb, WB_RECLAIMABLE) > __wb_calc_thresh(gdtc))
+	if (wb_stat(wb, WB_RECLAIMABLE) >
+	    wb_calc_thresh(gdtc->wb, gdtc->bg_thresh))
 		return true;
 	if (mdtc) {
 		if (mdtc->dirty > mdtc->bg_thresh)
 			return true;
-		if (wb_stat(wb, WB_RECLAIMABLE) > __wb_calc_thresh(mdtc))
+		if (wb_stat(wb, WB_RECLAIMABLE) >
+		    wb_calc_thresh(mdtc->wb, mdtc->bg_thresh))
 			return true;
 	}

mm/page_alloc.c+1−1

@@ -6485,7 +6485,7 @@ int __meminit init_per_zone_wmark_min(void) · 6484 unmodified lines
6485	setup_per_zone_inactive_ratio();	6485	setup_per_zone_inactive_ratio();
6486	return 0;	6486	return 0;
6487	}	6487	}
6488	module_init(init_per_zone_wmark_min)	6488	core_initcall(init_per_zone_wmark_min)
6489		6489
6490	/*	6490	/*
6491	* min_free_kbytes_sysctl_handler - just a wrapper around proc_dointvec() so	6491	* min_free_kbytes_sysctl_handler - just a wrapper around proc_dointvec() so

mm/page_io.c+5−1

 	ret = bdev_read_page(sis->bdev, swap_page_sector(page), page);
 	if (!ret) {
-		swap_slot_free_notify(page);
+		if (trylock_page(page)) {
+			swap_slot_free_notify(page);
+			unlock_page(page);
+		}
 		count_vm_event(PSWPIN);
 		return 0;
 	}

mm/swap.c+5−0

 			zone = NULL;
 		}
+		if (is_huge_zero_page(page)) {
+			put_huge_zero_page();
+			continue;
+		}
 		page = compound_head(page);
 		if (!put_page_testzero(page))
 			continue;

mm/vmscan.c+15−15

 		sc->gfp_mask |= __GFP_HIGHMEM;
 	for_each_zone_zonelist_nodemask(zone, z, zonelist,
-					requested_highidx, sc->nodemask) {
+					gfp_zone(sc->gfp_mask), sc->nodemask) {
 		enum zone_type classzone_idx;
 		if (!populated_zone(zone))
 	/* Try to sleep for a short interval */
 	if (prepare_kswapd_sleep(pgdat, order, remaining,
 						balanced_classzone_idx)) {
+		/*
+		 * Compaction records what page blocks it recently failed to
+		 * isolate pages from and skips them in the future scanning.
+		 * When kswapd is going to sleep, it is reasonable to assume
+		 * that pages and compaction may succeed so reset the cache.
+		 */
+		reset_isolation_suitable(pgdat);
+		/*
+		 * We have freed the memory, now we should compact it to make
+		 * allocation of the requested order possible.
+		 */
+		wakeup_kcompactd(pgdat, order, classzone_idx);
 		remaining = schedule_timeout(HZ/10);
 		finish_wait(&pgdat->kswapd_wait, &wait);
 		prepare_to_wait(&pgdat->kswapd_wait, &wait, TASK_INTERRUPTIBLE);
 		 */
 		set_pgdat_percpu_threshold(pgdat, calculate_normal_threshold);
-		/*
-		 * Compaction records what page blocks it recently failed to
-		 * isolate pages from and skips them in the future scanning.
-		 * When kswapd is going to sleep, it is reasonable to assume
-		 * that pages and compaction may succeed so reset the cache.
-		 */
-		reset_isolation_suitable(pgdat);
-		/*
-		 * We have freed the memory, now we should compact it to make
-		 * allocation of the requested order possible.
-		 */
-		wakeup_kcompactd(pgdat, order, classzone_idx);
 		if (!kthread_should_stop())
 			schedule();

mm/zswap.c+7−1

 static LIST_HEAD(zswap_pools);
 /* protects zswap_pools list modification */
 static DEFINE_SPINLOCK(zswap_pools_lock);
+/* pool counter to provide unique names to zpool */
+static atomic_t zswap_pools_count = ATOMIC_INIT(0);
 /* used by param callback function */
 static bool zswap_init_started;
 static struct zswap_pool *zswap_pool_create(char *type, char *compressor)
 {
 	struct zswap_pool *pool;
+	char name[38]; /* 'zswap' + 32 char (max) num + \0 */
 	gfp_t gfp = __GFP_NORETRY | __GFP_NOWARN | __GFP_KSWAPD_RECLAIM;
 	pool = kzalloc(sizeof(*pool), GFP_KERNEL);
 		return NULL;
 	}
-	pool->zpool = zpool_create_pool(type, "zswap", gfp, &zswap_zpool_ops);
+	/* unique name for each pool specifically required by zsmalloc */
+	snprintf(name, 38, "zswap%x", atomic_inc_return(&zswap_pools_count));
+	pool->zpool = zpool_create_pool(type, name, gfp, &zswap_zpool_ops);
 	if (!pool->zpool) {
 		pr_err("%s zpool not available\n", type);
 		goto error;

net/batman-adv/bat_v.c+12−0

 #include "bat_v_elp.h"
 #include "bat_v_ogm.h"
+#include "hard-interface.h"
 #include "hash.h"
 #include "originator.h"
 #include "packet.h"
+static void batadv_v_iface_activate(struct batadv_hard_iface *hard_iface)
+{
+	/* B.A.T.M.A.N. V does not use any queuing mechanism, therefore it can
+	 * set the interface as ACTIVE right away, without any risk of race
+	 * condition
+	 */
+	if (hard_iface->if_status == BATADV_IF_TO_BE_ACTIVATED)
+		hard_iface->if_status = BATADV_IF_ACTIVE;
+}
 static int batadv_v_iface_enable(struct batadv_hard_iface *hard_iface)
 {
 	int ret;
 static struct batadv_algo_ops batadv_batman_v __read_mostly = {
 	.name = "BATMAN_V",
+	.bat_iface_activate = batadv_v_iface_activate,
 	.bat_iface_enable = batadv_v_iface_enable,
 	.bat_iface_disable = batadv_v_iface_disable,
 	.bat_iface_update_mac = batadv_v_iface_update_mac,

net/batman-adv/distributed-arp-table.c+10−7

  * be sent to
  * @bat_priv: the bat priv with all the soft interface information
  * @ip_dst: ipv4 to look up in the DHT
+ * @vid: VLAN identifier
  *
  * An originator O is selected if and only if its DHT_ID value is one of three
  * closest values (from the LEFT, with wrap around if needed) then the hash
  * Return: the candidate array of size BATADV_DAT_CANDIDATE_NUM.
  */
 static struct batadv_dat_candidate *
-batadv_dat_select_candidates(struct batadv_priv *bat_priv, __be32 ip_dst)
+batadv_dat_select_candidates(struct batadv_priv *bat_priv, __be32 ip_dst,
+			     unsigned short vid)
 {
 	int select;
 	batadv_dat_addr_t last_max = BATADV_DAT_ADDR_MAX, ip_key;
 		return NULL;
 	dat.ip = ip_dst;
-	dat.vid = 0;
+	dat.vid = vid;
 	ip_key = (batadv_dat_addr_t)batadv_hash_dat(&dat,
 						    BATADV_DAT_ADDR_MAX);
  * @bat_priv: the bat priv with all the soft interface information
  * @skb: payload to send
  * @ip: the DHT key
+ * @vid: VLAN identifier
  * @packet_subtype: unicast4addr packet subtype to use
  *
  * This function copies the skb with pskb_copy() and is sent as unicast packet
  */
 static bool batadv_dat_send_data(struct batadv_priv *bat_priv,
 				 struct sk_buff *skb, __be32 ip,
-				 int packet_subtype)
+				 unsigned short vid, int packet_subtype)
 {
 	int i;
 	bool ret = false;
 	struct sk_buff *tmp_skb;
 	struct batadv_dat_candidate *cand;
-	cand = batadv_dat_select_candidates(bat_priv, ip);
+	cand = batadv_dat_select_candidates(bat_priv, ip, vid);
 	if (!cand)
 		goto out;
 		ret = true;
 	} else {
 		/* Send the request to the DHT */
-		ret = batadv_dat_send_data(bat_priv, skb, ip_dst,
+		ret = batadv_dat_send_data(bat_priv, skb, ip_dst, vid,
 					   BATADV_P_DAT_DHT_GET);
 	}
 out:
 	/* Send the ARP reply to the candidates for both the IP addresses that
 	 * the node obtained from the ARP reply
 	 */
-	batadv_dat_send_data(bat_priv, skb, ip_src, BATADV_P_DAT_DHT_PUT);
+	batadv_dat_send_data(bat_priv, skb, ip_src, vid, BATADV_P_DAT_DHT_PUT);
-	batadv_dat_send_data(bat_priv, skb, ip_dst, BATADV_P_DAT_DHT_PUT);
+	batadv_dat_send_data(bat_priv, skb, ip_dst, vid, BATADV_P_DAT_DHT_PUT);
 }
 /**

net/batman-adv/hard-interface.c+4−2

 	batadv_update_min_mtu(hard_iface->soft_iface);
+	if (bat_priv->bat_algo_ops->bat_iface_activate)
+		bat_priv->bat_algo_ops->bat_iface_activate(hard_iface);
 out:
 	if (primary_if)
 		batadv_hardif_put(primary_if);
 	struct batadv_priv *bat_priv = netdev_priv(hard_iface->soft_iface);
 	struct batadv_hard_iface *primary_if = NULL;
-	if (hard_iface->if_status == BATADV_IF_ACTIVE)
+	batadv_hardif_deactivate_interface(hard_iface);
-		batadv_hardif_deactivate_interface(hard_iface);
 	if (hard_iface->if_status != BATADV_IF_INACTIVE)
 		goto out;

net/batman-adv/originator.c+6−11

 {
 	struct hlist_node *node_tmp;
 	struct batadv_neigh_node *neigh_node;
-	struct batadv_hardif_neigh_node *hardif_neigh;
 	struct batadv_neigh_ifinfo *neigh_ifinfo;
 	struct batadv_algo_ops *bao;
 		batadv_neigh_ifinfo_put(neigh_ifinfo);
 	}
-	hardif_neigh = batadv_hardif_neigh_get(neigh_node->if_incoming,
+	batadv_hardif_neigh_put(neigh_node->hardif_neigh);
-					       neigh_node->addr);
-	if (hardif_neigh) {
-		/* batadv_hardif_neigh_get() increases refcount too */
-		batadv_hardif_neigh_put(hardif_neigh);
-		batadv_hardif_neigh_put(hardif_neigh);
-	}
 	if (bao->bat_neigh_free)
 		bao->bat_neigh_free(neigh_node);
 	ether_addr_copy(neigh_node->addr, neigh_addr);
 	neigh_node->if_incoming = hard_iface;
 	neigh_node->orig_node = orig_node;
+	neigh_node->last_seen = jiffies;
+	/* increment unique neighbor refcount */
+	kref_get(&hardif_neigh->refcount);
+	neigh_node->hardif_neigh = hardif_neigh;
 	/* extra reference for return */
 	kref_init(&neigh_node->refcount);
 	hlist_add_head_rcu(&neigh_node->list, &orig_node->neigh_list);
 	spin_unlock_bh(&orig_node->neigh_list_lock);
-	/* increment unique neighbor refcount */
-	kref_get(&hardif_neigh->refcount);
 	batadv_dbg(BATADV_DBG_BATMAN, orig_node->bat_priv,
 		   "Creating new neighbor %pM for orig_node %pM on interface %s\n",
 		   neigh_addr, orig_node->orig, hard_iface->net_dev->name);

net/batman-adv/routing.c+9−0

@@ -105,6 +105,15 @@ static void _batadv_update_route(struct batadv_priv *bat_priv, · 104 unmodified lines
105	neigh_node = NULL;	105	neigh_node = NULL;
106		106
107	spin_lock_bh(&orig_node->neigh_list_lock);	107	spin_lock_bh(&orig_node->neigh_list_lock);
		108	/* curr_router used earlier may not be the current orig_ifinfo->router
		109	* anymore because it was dereferenced outside of the neigh_list_lock
		110	* protected region. After the new best neighbor has replace the current
		111	* best neighbor the reference counter needs to decrease. Consequently,
		112	* the code needs to ensure the curr_router variable contains a pointer
		113	* to the replaced best neighbor.
		114	*/
		115	curr_router = rcu_dereference_protected(orig_ifinfo->router, true);
		116
108	rcu_assign_pointer(orig_ifinfo->router, neigh_node);	117	rcu_assign_pointer(orig_ifinfo->router, neigh_node);
109	spin_unlock_bh(&orig_node->neigh_list_lock);	118	spin_unlock_bh(&orig_node->neigh_list_lock);
110	batadv_orig_ifinfo_put(orig_ifinfo);	119	batadv_orig_ifinfo_put(orig_ifinfo);

net/batman-adv/send.c+6−0

 		if (pending) {
 			hlist_del(&forw_packet->list);
+			if (!forw_packet->own)
+				atomic_inc(&bat_priv->bcast_queue_left);
 			batadv_forw_packet_free(forw_packet);
 		}
 	}
 		if (pending) {
 			hlist_del(&forw_packet->list);
+			if (!forw_packet->own)
+				atomic_inc(&bat_priv->batman_queue_left);
 			batadv_forw_packet_free(forw_packet);
 		}
 	}

net/batman-adv/soft-interface.c+6−2

 	 */
 	nf_reset(skb);
+	if (unlikely(!pskb_may_pull(skb, ETH_HLEN)))
+		goto dropped;
 	vid = batadv_get_vid(skb, 0);
 	ethhdr = eth_hdr(skb);
 	switch (ntohs(ethhdr->h_proto)) {
 	case ETH_P_8021Q:
+		if (!pskb_may_pull(skb, VLAN_ETH_HLEN))
+			goto dropped;
 		vhdr = (struct vlan_ethhdr *)skb->data;
 		if (vhdr->h_vlan_encapsulated_proto != ethertype)
 	}
 	/* skb->dev & skb->pkt_type are set here */
-	if (unlikely(!pskb_may_pull(skb, ETH_HLEN)))
-		goto dropped;
 	skb->protocol = eth_type_trans(skb, soft_iface);
 	/* should not be necessary anymore as we use skb_pull_rcsum()

net/batman-adv/translation-table.c+4−38

 	tt_local_entry = container_of(ref, struct batadv_tt_local_entry,
 				      common.refcount);
+	batadv_softif_vlan_put(tt_local_entry->vlan);
 	kfree_rcu(tt_local_entry, common.rcu);
 }
 	kref_get(&tt_local->common.refcount);
 	tt_local->last_seen = jiffies;
 	tt_local->common.added_at = tt_local->last_seen;
+	tt_local->vlan = vlan;
 	/* the batman interface mac and multicast addresses should never be
 	 * purged
 	struct batadv_tt_common_entry *tt_common_entry;
 	struct batadv_tt_local_entry *tt_local;
 	struct batadv_hard_iface *primary_if;
-	struct batadv_softif_vlan *vlan;
 	struct hlist_head *head;
 	unsigned short vid;
 	u32 i;
 			last_seen_msecs = last_seen_msecs % 1000;
 			no_purge = tt_common_entry->flags & np_flag;
-			vlan = batadv_softif_vlan_get(bat_priv, vid);
-			if (!vlan) {
-				seq_printf(seq, "Cannot retrieve VLAN %d\n",
-					   BATADV_PRINT_VID(vid));
-				continue;
-			}
 			seq_printf(seq,
 				   " * %pM %4i [%c%c%c%c%c%c] %3u.%03u   (%#.8x)\n",
 				   tt_common_entry->addr,
 				     BATADV_TT_CLIENT_ISOLA) ? 'I' : '.'),
 				   no_purge ? 0 : last_seen_secs,
 				   no_purge ? 0 : last_seen_msecs,
-				   vlan->tt.crc);
+				   tt_local->vlan->tt.crc);
-			batadv_softif_vlan_put(vlan);
 		}
 		rcu_read_unlock();
 	}
 {
 	struct batadv_tt_local_entry *tt_local_entry;
 	u16 flags, curr_flags = BATADV_NO_FLAGS;
-	struct batadv_softif_vlan *vlan;
 	void *tt_entry_exists;
 	tt_local_entry = batadv_tt_local_hash_find(bat_priv, addr, vid);
 	/* extra call to free the local tt entry */
 	batadv_tt_local_entry_put(tt_local_entry);
-	/* decrease the reference held for this vlan */
-	vlan = batadv_softif_vlan_get(bat_priv, vid);
-	if (!vlan)
-		goto out;
-	batadv_softif_vlan_put(vlan);
-	batadv_softif_vlan_put(vlan);
 out:
 	if (tt_local_entry)
 		batadv_tt_local_entry_put(tt_local_entry);
 	spinlock_t *list_lock; /* protects write access to the hash lists */
 	struct batadv_tt_common_entry *tt_common_entry;
 	struct batadv_tt_local_entry *tt_local;
-	struct batadv_softif_vlan *vlan;
 	struct hlist_node *node_tmp;
 	struct hlist_head *head;
 	u32 i;
 						struct batadv_tt_local_entry,
 						common);
-			/* decrease the reference held for this vlan */
-			vlan = batadv_softif_vlan_get(bat_priv,
-						      tt_common_entry->vid);
-			if (vlan) {
-				batadv_softif_vlan_put(vlan);
-				batadv_softif_vlan_put(vlan);
-			}
 			batadv_tt_local_entry_put(tt_local);
 		}
 		spin_unlock_bh(list_lock);
 	struct batadv_hashtable *hash = bat_priv->tt.local_hash;
 	struct batadv_tt_common_entry *tt_common;
 	struct batadv_tt_local_entry *tt_local;
-	struct batadv_softif_vlan *vlan;
 	struct hlist_node *node_tmp;
 	struct hlist_head *head;
 	spinlock_t *list_lock; /* protects write access to the hash lists */
 						struct batadv_tt_local_entry,
 						common);
-			/* decrease the reference held for this vlan */
-			vlan = batadv_softif_vlan_get(bat_priv, tt_common->vid);
-			if (vlan) {
-				batadv_softif_vlan_put(vlan);
-				batadv_softif_vlan_put(vlan);
-			}
 			batadv_tt_local_entry_put(tt_local);
 		}
 		spin_unlock_bh(list_lock);

net/batman-adv/types.h+7−0

  * @ifinfo_lock: lock protecting private ifinfo members and list
  * @if_incoming: pointer to incoming hard-interface
  * @last_seen: when last packet via this neighbor was received
+ * @hardif_neigh: hardif_neigh of this neighbor
  * @refcount: number of contexts the object is used
  * @rcu: struct used for freeing in an RCU-safe manner
  */
 	spinlock_t ifinfo_lock;	/* protects ifinfo_list and its members */
 	struct batadv_hard_iface *if_incoming;
 	unsigned long last_seen;
+	struct batadv_hardif_neigh_node *hardif_neigh;
 	struct kref refcount;
 	struct rcu_head rcu;
 };
  * struct batadv_tt_local_entry - translation table local entry data
  * @common: general translation table data
  * @last_seen: timestamp used for purging stale tt local entries
+ * @vlan: soft-interface vlan of the entry
  */
 struct batadv_tt_local_entry {
 	struct batadv_tt_common_entry common;
 	unsigned long last_seen;
+	struct batadv_softif_vlan *vlan;
 };
 /**
  * struct batadv_algo_ops - mesh algorithm callbacks
  * @list: list node for the batadv_algo_list
  * @name: name of the algorithm
+ * @bat_iface_activate: start routing mechanisms when hard-interface is brought
+ *  up
  * @bat_iface_enable: init routing info when hard-interface is enabled
  * @bat_iface_disable: de-init routing info when hard-interface is disabled
  * @bat_iface_update_mac: (re-)init mac addresses of the protocol information
 struct batadv_algo_ops {
 	struct hlist_node list;
 	char *name;
+	void (*bat_iface_activate)(struct batadv_hard_iface *hard_iface);
 	int (*bat_iface_enable)(struct batadv_hard_iface *hard_iface);
 	void (*bat_iface_disable)(struct batadv_hard_iface *hard_iface);
 	void (*bat_iface_update_mac)(struct batadv_hard_iface *hard_iface);

net/bridge/br_mdb.c+79−45

 		e->flags |= MDB_FLAGS_OFFLOAD;
 }
+static void __mdb_entry_to_br_ip(struct br_mdb_entry *entry, struct br_ip *ip)
+{
+	memset(ip, 0, sizeof(struct br_ip));
+	ip->vid = entry->vid;
+	ip->proto = entry->addr.proto;
+	if (ip->proto == htons(ETH_P_IP))
+		ip->u.ip4 = entry->addr.u.ip4;
+#if IS_ENABLED(CONFIG_IPV6)
+	else
+		ip->u.ip6 = entry->addr.u.ip6;
+#endif
+}
 static int br_mdb_fill_info(struct sk_buff *skb, struct netlink_callback *cb,
 			    struct net_device *dev)
 {
 		+ nla_total_size(sizeof(struct br_mdb_entry));
 }
-static void __br_mdb_notify(struct net_device *dev, struct br_mdb_entry *entry,
+struct br_mdb_complete_info {
-			    int type, struct net_bridge_port_group *pg)
+	struct net_bridge_port *port;
+	struct br_ip ip;
+};
+static void br_mdb_complete(struct net_device *dev, int err, void *priv)
 {
+	struct br_mdb_complete_info *data = priv;
+	struct net_bridge_port_group __rcu **pp;
+	struct net_bridge_port_group *p;
+	struct net_bridge_mdb_htable *mdb;
+	struct net_bridge_mdb_entry *mp;
+	struct net_bridge_port *port = data->port;
+	struct net_bridge *br = port->br;
+	if (err)
+		goto err;
+	spin_lock_bh(&br->multicast_lock);
+	mdb = mlock_dereference(br->mdb, br);
+	mp = br_mdb_ip_get(mdb, &data->ip);
+	if (!mp)
+		goto out;
+	for (pp = &mp->ports; (p = mlock_dereference(*pp, br)) != NULL;
+	     pp = &p->next) {
+		if (p->port != port)
+			continue;
+		p->flags |= MDB_PG_FLAGS_OFFLOAD;
+	}
+out:
+	spin_unlock_bh(&br->multicast_lock);
+err:
+	kfree(priv);
+}
+static void __br_mdb_notify(struct net_device *dev, struct net_bridge_port *p,
+			    struct br_mdb_entry *entry, int type)
+{
+	struct br_mdb_complete_info *complete_info;
 	struct switchdev_obj_port_mdb mdb = {
 		.obj = {
 			.id = SWITCHDEV_OBJ_ID_PORT_MDB,
 	mdb.obj.orig_dev = port_dev;
 	if (port_dev && type == RTM_NEWMDB) {
-		err = switchdev_port_obj_add(port_dev, &mdb.obj);
+		complete_info = kmalloc(sizeof(*complete_info), GFP_ATOMIC);
-		if (!err && pg)
+		if (complete_info) {
-			pg->flags |= MDB_PG_FLAGS_OFFLOAD;
+			complete_info->port = p;
+			__mdb_entry_to_br_ip(entry, &complete_info->ip);
+			mdb.obj.complete_priv = complete_info;
+			mdb.obj.complete = br_mdb_complete;
+			switchdev_port_obj_add(port_dev, &mdb.obj);
+		}
 	} else if (port_dev && type == RTM_DELMDB) {
 		switchdev_port_obj_del(port_dev, &mdb.obj);
 	}
 	rtnl_set_sk_err(net, RTNLGRP_MDB, err);
 }
-void br_mdb_notify(struct net_device *dev, struct net_bridge_port_group *pg,
+void br_mdb_notify(struct net_device *dev, struct net_bridge_port *port,
-		   int type)
+		   struct br_ip *group, int type, u8 flags)
 {
 	struct br_mdb_entry entry;
 	memset(&entry, 0, sizeof(entry));
-	entry.ifindex = pg->port->dev->ifindex;
+	entry.ifindex = port->dev->ifindex;
-	entry.addr.proto = pg->addr.proto;
+	entry.addr.proto = group->proto;
-	entry.addr.u.ip4 = pg->addr.u.ip4;
+	entry.addr.u.ip4 = group->u.ip4;
 #if IS_ENABLED(CONFIG_IPV6)
-	entry.addr.u.ip6 = pg->addr.u.ip6;
+	entry.addr.u.ip6 = group->u.ip6;
 #endif
-	entry.vid = pg->addr.vid;
+	entry.vid = group->vid;
-	__mdb_entry_fill_flags(&entry, pg->flags);
+	__mdb_entry_fill_flags(&entry, flags);
-	__br_mdb_notify(dev, &entry, type, pg);
+	__br_mdb_notify(dev, port, &entry, type);
 }
 static int nlmsg_populate_rtr_fill(struct sk_buff *skb,
 }
 static int br_mdb_add_group(struct net_bridge *br, struct net_bridge_port *port,
-			    struct br_ip *group, unsigned char state,
+			    struct br_ip *group, unsigned char state)
-			    struct net_bridge_port_group **pg)
 {
 	struct net_bridge_mdb_entry *mp;
 	struct net_bridge_port_group *p;
 	if (unlikely(!p))
 		return -ENOMEM;
 	rcu_assign_pointer(*pp, p);
-	*pg = p;
 	if (state == MDB_TEMPORARY)
 		mod_timer(&p->timer, now + br->multicast_membership_interval);
 }
 static int __br_mdb_add(struct net *net, struct net_bridge *br,
-			struct br_mdb_entry *entry,
+			struct br_mdb_entry *entry)
-			struct net_bridge_port_group **pg)
 {
 	struct br_ip ip;
 	struct net_device *dev;
 	if (!p || p->br != br || p->state == BR_STATE_DISABLED)
 		return -EINVAL;
-	memset(&ip, 0, sizeof(ip));
+	__mdb_entry_to_br_ip(entry, &ip);
-	ip.vid = entry->vid;
-	ip.proto = entry->addr.proto;
-	if (ip.proto == htons(ETH_P_IP))
-		ip.u.ip4 = entry->addr.u.ip4;
-#if IS_ENABLED(CONFIG_IPV6)
-	else
-		ip.u.ip6 = entry->addr.u.ip6;
-#endif
 	spin_lock_bh(&br->multicast_lock);
-	ret = br_mdb_add_group(br, p, &ip, entry->state, pg);
+	ret = br_mdb_add_group(br, p, &ip, entry->state);
 	spin_unlock_bh(&br->multicast_lock);
 	return ret;
 }
 static int br_mdb_add(struct sk_buff *skb, struct nlmsghdr *nlh)
 {
 	struct net *net = sock_net(skb->sk);
-	struct net_bridge_port_group *pg;
 	struct net_bridge_vlan_group *vg;
 	struct net_device *dev, *pdev;
 	struct br_mdb_entry *entry;
 	if (br_vlan_enabled(br) && vg && entry->vid == 0) {
 		list_for_each_entry(v, &vg->vlan_list, vlist) {
 			entry->vid = v->vid;
-			err = __br_mdb_add(net, br, entry, &pg);
+			err = __br_mdb_add(net, br, entry);
 			if (err)
 				break;
-			__br_mdb_notify(dev, entry, RTM_NEWMDB, pg);
+			__br_mdb_notify(dev, p, entry, RTM_NEWMDB);
 		}
 	} else {
-		err = __br_mdb_add(net, br, entry, &pg);
+		err = __br_mdb_add(net, br, entry);
 		if (!err)
-			__br_mdb_notify(dev, entry, RTM_NEWMDB, pg);
+			__br_mdb_notify(dev, p, entry, RTM_NEWMDB);
 	}
 	return err;
 	if (!netif_running(br->dev) || br->multicast_disabled)
 		return -EINVAL;
-	memset(&ip, 0, sizeof(ip));
+	__mdb_entry_to_br_ip(entry, &ip);
-	ip.vid = entry->vid;
-	ip.proto = entry->addr.proto;
-	if (ip.proto == htons(ETH_P_IP))
-		ip.u.ip4 = entry->addr.u.ip4;
-#if IS_ENABLED(CONFIG_IPV6)
-	else
-		ip.u.ip6 = entry->addr.u.ip6;
-#endif
 	spin_lock_bh(&br->multicast_lock);
 	mdb = mlock_dereference(br->mdb, br);
 			entry->vid = v->vid;
 			err = __br_mdb_del(br, entry);
 			if (!err)
-				__br_mdb_notify(dev, entry, RTM_DELMDB, NULL);
+				__br_mdb_notify(dev, p, entry, RTM_DELMDB);
 		}
 	} else {
 		err = __br_mdb_del(br, entry);
 		if (!err)
-			__br_mdb_notify(dev, entry, RTM_DELMDB, NULL);
+			__br_mdb_notify(dev, p, entry, RTM_DELMDB);
 	}
 	return err;

net/bridge/br_multicast.c+5−3

 		rcu_assign_pointer(*pp, p->next);
 		hlist_del_init(&p->mglist);
 		del_timer(&p->timer);
-		br_mdb_notify(br->dev, p, RTM_DELMDB);
+		br_mdb_notify(br->dev, p->port, &pg->addr, RTM_DELMDB,
+			      p->flags);
 		call_rcu_bh(&p->rcu, br_multicast_free_pg);
 		if (!mp->ports && !mp->mglist &&
 	if (unlikely(!p))
 		goto err;
 	rcu_assign_pointer(*pp, p);
-	br_mdb_notify(br->dev, p, RTM_NEWMDB);
+	br_mdb_notify(br->dev, port, group, RTM_NEWMDB, 0);
 found:
 	mod_timer(&p->timer, now + br->multicast_membership_interval);
 			hlist_del_init(&p->mglist);
 			del_timer(&p->timer);
 			call_rcu_bh(&p->rcu, br_multicast_free_pg);
-			br_mdb_notify(br->dev, p, RTM_DELMDB);
+			br_mdb_notify(br->dev, port, group, RTM_DELMDB,
+				      p->flags);
 			if (!mp->ports && !mp->mglist &&
 			    netif_running(br->dev))

net/bridge/br_private.h+2−2

@@ -560,8 +560,8 @@ br_multicast_new_port_group(struct net_bridge_port port, struct br_ip group, · 559 unmodified lines
560	unsigned char flags);	560	unsigned char flags);
561	void br_mdb_init(void);	561	void br_mdb_init(void);
562	void br_mdb_uninit(void);	562	void br_mdb_uninit(void);
563	void br_mdb_notify(struct net_device dev, struct net_bridge_port_group pg,	563	void br_mdb_notify(struct net_device dev, struct net_bridge_port port,
564	int type);	564	struct br_ip *group, int type, u8 flags);
565	void br_rtr_notify(struct net_device dev, struct net_bridge_port port,	565	void br_rtr_notify(struct net_device dev, struct net_bridge_port port,
566	int type);	566	int type);
567		567

net/ceph/auth.c+2−6

 }
 EXPORT_SYMBOL(ceph_auth_create_authorizer);
-void ceph_auth_destroy_authorizer(struct ceph_auth_client *ac,
+void ceph_auth_destroy_authorizer(struct ceph_authorizer *a)
-				  struct ceph_authorizer *a)
 {
-	mutex_lock(&ac->mutex);
+	a->destroy(a);
-	if (ac->ops && ac->ops->destroy_authorizer)
-		ac->ops->destroy_authorizer(ac, a);
-	mutex_unlock(&ac->mutex);
 }
 EXPORT_SYMBOL(ceph_auth_destroy_authorizer);

net/ceph/auth_none.c+39−32

@@ -16,7 +16,6 @@ static void reset(struct ceph_auth_client *ac) · 15 unmodified lines
16	struct ceph_auth_none_info *xi = ac->private;	16	struct ceph_auth_none_info *xi = ac->private;
17		17
18	xi->starting = true;	18	xi->starting = true;
19	xi->built_authorizer = false;
20	}	19	}
21		20
22	static void destroy(struct ceph_auth_client *ac)	21	static void destroy(struct ceph_auth_client *ac)
@@ -39,6 +38,27 @@ static int should_authenticate(struct ceph_auth_client *ac) · 16 unmodified lines
39	return xi->starting;	38	return xi->starting;
40	}	39	}
41		40
		41	static int ceph_auth_none_build_authorizer(struct ceph_auth_client *ac,
		42	struct ceph_none_authorizer *au)
		43	{
		44	void *p = au->buf;
		45	void *const end = p + sizeof(au->buf);
		46	int ret;
		47
		48	ceph_encode_8_safe(&p, end, 1, e_range);
		49	ret = ceph_entity_name_encode(ac->name, &p, end);
		50	if (ret < 0)
		51	return ret;
		52
		53	ceph_encode_64_safe(&p, end, ac->global_id, e_range);
		54	au->buf_len = p - (void *)au->buf;
		55	dout("%s built authorizer len %d\n", __func__, au->buf_len);
		56	return 0;
		57
		58	e_range:
		59	return -ERANGE;
		60	}
		61
42	static int build_request(struct ceph_auth_client ac, void buf, void *end)	62	static int build_request(struct ceph_auth_client ac, void buf, void *end)
43	{	63	{
44	return 0;	64	return 0;
@@ -57,32 +77,32 @@ static int handle_reply(struct ceph_auth_client *ac, int result, · 12 unmodified lines
57	return result;	77	return result;
58	}	78	}
59		79
		80	static void ceph_auth_none_destroy_authorizer(struct ceph_authorizer *a)
		81	{
		82	kfree(a);
		83	}
		84
60	/*	85	/*
61	* build an 'authorizer' with our entity_name and global_id. we can	86	* build an 'authorizer' with our entity_name and global_id. it is
62	* reuse a single static copy since it is identical for all services	87	* identical for all services we connect to.
63	* we connect to.
64	*/	88	*/
65	static int ceph_auth_none_create_authorizer(	89	static int ceph_auth_none_create_authorizer(
66	struct ceph_auth_client *ac, int peer_type,	90	struct ceph_auth_client *ac, int peer_type,
67	struct ceph_auth_handshake *auth)	91	struct ceph_auth_handshake *auth)
68	{	92	{
69	struct ceph_auth_none_info *ai = ac->private;	93	struct ceph_none_authorizer *au;
70	struct ceph_none_authorizer *au = &ai->au;
71	void p, end;
72	int ret;	94	int ret;
73		95
74	if (!ai->built_authorizer) {	96	au = kmalloc(sizeof(*au), GFP_NOFS);
75	p = au->buf;	97	if (!au)
76	end = p + sizeof(au->buf);	98	return -ENOMEM;
77	ceph_encode_8(&p, 1);	99
78	ret = ceph_entity_name_encode(ac->name, &p, end - 8);	100	au->base.destroy = ceph_auth_none_destroy_authorizer;
79	if (ret < 0)	101
80	goto bad;	102	ret = ceph_auth_none_build_authorizer(ac, au);
81	ceph_decode_need(&p, end, sizeof(u64), bad2);	103	if (ret) {
82	ceph_encode_64(&p, ac->global_id);	104	kfree(au);
83	au->buf_len = p - (void *)au->buf;	105	return ret;
84	ai->built_authorizer = true;
85	dout("built authorizer len %d\n", au->buf_len);
86	}	106	}
87		107
88	auth->authorizer = (struct ceph_authorizer *) au;	108	auth->authorizer = (struct ceph_authorizer *) au;
@@ -92,17 +112,6 @@ static int ceph_auth_none_create_authorizer( · 3 unmodified lines
92	auth->authorizer_reply_buf_len = sizeof (au->reply_buf);	112	auth->authorizer_reply_buf_len = sizeof (au->reply_buf);
93		113
94	return 0;	114	return 0;
95
96	bad2:
97	ret = -ERANGE;
98	bad:
99	return ret;
100	}
101
102	static void ceph_auth_none_destroy_authorizer(struct ceph_auth_client *ac,
103	struct ceph_authorizer *a)
104	{
105	/* nothing to do */
106	}	115	}
107		116
108	static const struct ceph_auth_client_ops ceph_auth_none_ops = {	117	static const struct ceph_auth_client_ops ceph_auth_none_ops = {
@@ -114,7 +123,6 @@ static const struct ceph_auth_client_ops ceph_auth_none_ops = { · 5 unmodified lines
114	.build_request = build_request,	123	.build_request = build_request,
115	.handle_reply = handle_reply,	124	.handle_reply = handle_reply,
116	.create_authorizer = ceph_auth_none_create_authorizer,	125	.create_authorizer = ceph_auth_none_create_authorizer,
117	.destroy_authorizer = ceph_auth_none_destroy_authorizer,
118	};	126	};
119		127
120	int ceph_auth_none_init(struct ceph_auth_client *ac)	128	int ceph_auth_none_init(struct ceph_auth_client *ac)
@@ -127,7 +135,6 @@ int ceph_auth_none_init(struct ceph_auth_client *ac) · 6 unmodified lines
127	return -ENOMEM;	135	return -ENOMEM;
128		136
129	xi->starting = true;	137	xi->starting = true;
130	xi->built_authorizer = false;
131		138
132	ac->protocol = CEPH_AUTH_NONE;	139	ac->protocol = CEPH_AUTH_NONE;
133	ac->private = xi;	140	ac->private = xi;

net/ceph/auth_none.h+1−2

  */
 struct ceph_none_authorizer {
+	struct ceph_authorizer base;
 	char buf[128];
 	int buf_len;
 	char reply_buf[0];
 struct ceph_auth_none_info {
 	bool starting;
-	bool built_authorizer;
-	struct ceph_none_authorizer au;   /* we only need one; it's static */
 };
 int ceph_auth_none_init(struct ceph_auth_client *ac);

net/ceph/auth_x.c+10−11

 	return -EAGAIN;
 }
+static void ceph_x_destroy_authorizer(struct ceph_authorizer *a)
+{
+	struct ceph_x_authorizer *au = (void *)a;
+	ceph_x_authorizer_cleanup(au);
+	kfree(au);
+}
 static int ceph_x_create_authorizer(
 	struct ceph_auth_client *ac, int peer_type,
 	struct ceph_auth_handshake *auth)
 	if (!au)
 		return -ENOMEM;
+	au->base.destroy = ceph_x_destroy_authorizer;
 	ret = ceph_x_build_authorizer(ac, th, au);
 	if (ret) {
 		kfree(au);
 	return ret;
 }
-static void ceph_x_destroy_authorizer(struct ceph_auth_client *ac,
-				      struct ceph_authorizer *a)
-{
-	struct ceph_x_authorizer *au = (void *)a;
-	ceph_x_authorizer_cleanup(au);
-	kfree(au);
-}
 static void ceph_x_reset(struct ceph_auth_client *ac)
 {
 	struct ceph_x_info *xi = ac->private;
 	.create_authorizer = ceph_x_create_authorizer,
 	.update_authorizer = ceph_x_update_authorizer,
 	.verify_authorizer_reply = ceph_x_verify_authorizer_reply,
-	.destroy_authorizer = ceph_x_destroy_authorizer,
 	.invalidate_authorizer = ceph_x_invalidate_authorizer,
 	.reset =  ceph_x_reset,
 	.destroy = ceph_x_destroy,

net/ceph/auth_x.h+1−0

@@ -26,6 +26,7 @@ struct ceph_x_ticket_handler { · 25 unmodified lines
26		26
27		27
28	struct ceph_x_authorizer {	28	struct ceph_x_authorizer {
		29	struct ceph_authorizer base;
29	struct ceph_crypto_key session_key;	30	struct ceph_crypto_key session_key;
30	struct ceph_buffer *buf;	31	struct ceph_buffer *buf;
31	unsigned int service;	32	unsigned int service;

net/ceph/osd_client.c+2−4

 	dout("put_osd %p %d -> %d\n", osd, atomic_read(&osd->o_ref),
 	     atomic_read(&osd->o_ref) - 1);
 	if (atomic_dec_and_test(&osd->o_ref)) {
-		struct ceph_auth_client *ac = osd->o_osdc->client->monc.auth;
 		if (osd->o_auth.authorizer)
-			ceph_auth_destroy_authorizer(ac, osd->o_auth.authorizer);
+			ceph_auth_destroy_authorizer(osd->o_auth.authorizer);
 		kfree(osd);
 	}
 }
 	struct ceph_auth_handshake *auth = &o->o_auth;
 	if (force_new && auth->authorizer) {
-		ceph_auth_destroy_authorizer(ac, auth->authorizer);
+		ceph_auth_destroy_authorizer(auth->authorizer);
 		auth->authorizer = NULL;
 	}
 	if (!auth->authorizer) {

net/core/dev.c+1−1

@@ -2802,7 +2802,7 @@ static netdev_features_t harmonize_features(struct sk_buff *skb, · 2801 unmodified lines
2802		2802
2803	if (skb->ip_summed != CHECKSUM_NONE &&	2803	if (skb->ip_summed != CHECKSUM_NONE &&
2804	!can_checksum_protocol(features, type)) {	2804	!can_checksum_protocol(features, type)) {
2805	features &= ~NETIF_F_CSUM_MASK;	2805	features &= ~(NETIF_F_CSUM_MASK \| NETIF_F_GSO_MASK);
2806	} else if (illegal_highdma(skb->dev, skb)) {	2806	} else if (illegal_highdma(skb->dev, skb)) {
2807	features &= ~NETIF_F_SG;	2807	features &= ~NETIF_F_SG;
2808	}	2808	}

net/ipv4/fib_frontend.c+5−1

 	if (ifa->ifa_flags & IFA_F_SECONDARY) {
 		prim = inet_ifa_byprefix(in_dev, any, ifa->ifa_mask);
 		if (!prim) {
-			pr_warn("%s: bug: prim == NULL\n", __func__);
+			/* if the device has been deleted, we don't perform
+			 * address promotion
+			 */
+			if (!in_dev->dead)
+				pr_warn("%s: bug: prim == NULL\n", __func__);
 			return;
 		}
 		if (iprim && iprim != prim) {

net/ipv4/inet_hashtables.c+2−0

 						     const struct sock *sk2,
 						     bool match_wildcard))
 {
+	struct inet_bind_bucket *tb = inet_csk(sk)->icsk_bind_hash;
 	struct sock *sk2;
 	struct hlist_nulls_node *node;
 	kuid_t uid = sock_i_uid(sk);
 		    sk2->sk_family == sk->sk_family &&
 		    ipv6_only_sock(sk2) == ipv6_only_sock(sk) &&
 		    sk2->sk_bound_dev_if == sk->sk_bound_dev_if &&
+		    inet_csk(sk2)->icsk_bind_hash == tb &&
 		    sk2->sk_reuseport && uid_eq(uid, sock_i_uid(sk2)) &&
 		    saddr_same(sk, sk2, false))
 			return reuseport_add_sock(sk, sk2);

net/ipv4/ip_gre.c+21−9

 	return flags;
 }
+/* Fills in tpi and returns header length to be pulled. */
 static int parse_gre_header(struct sk_buff *skb, struct tnl_ptk_info *tpi,
 			    bool *csum_err)
 {
 				return -EINVAL;
 		}
 	}
-	return iptunnel_pull_header(skb, hdr_len, tpi->proto, false);
+	return hdr_len;
 }
 static void ipgre_err(struct sk_buff *skb, u32 info,
 	struct tnl_ptk_info tpi;
 	bool csum_err = false;
-	if (parse_gre_header(skb, &tpi, &csum_err)) {
+	if (parse_gre_header(skb, &tpi, &csum_err) < 0) {
 		if (!csum_err)		/* ignore csum errors. */
 			return;
 	}
 {
 	struct tnl_ptk_info tpi;
 	bool csum_err = false;
+	int hdr_len;
 #ifdef CONFIG_NET_IPGRE_BROADCAST
 	if (ipv4_is_multicast(ip_hdr(skb)->daddr)) {
 	}
 #endif
-	if (parse_gre_header(skb, &tpi, &csum_err) < 0)
+	hdr_len = parse_gre_header(skb, &tpi, &csum_err);
+	if (hdr_len < 0)
+		goto drop;
+	if (iptunnel_pull_header(skb, hdr_len, tpi.proto, false) < 0)
 		goto drop;
 	if (ipgre_rcv(skb, &tpi) == PACKET_RCVD)
 	return ip_route_output_key(net, fl);
 }
-static void gre_fb_xmit(struct sk_buff *skb, struct net_device *dev)
+static void gre_fb_xmit(struct sk_buff *skb, struct net_device *dev,
+			__be16 proto)
 {
 	struct ip_tunnel_info *tun_info;
 	const struct ip_tunnel_key *key;
 	}
 	flags = tun_info->key.tun_flags & (TUNNEL_CSUM | TUNNEL_KEY);
-	build_header(skb, tunnel_hlen, flags, htons(ETH_P_TEB),
+	build_header(skb, tunnel_hlen, flags, proto,
 		     tunnel_id_to_key(tun_info->key.tun_id), 0);
 	df = key->tun_flags & TUNNEL_DONT_FRAGMENT ?  htons(IP_DF) : 0;
 	const struct iphdr *tnl_params;
 	if (tunnel->collect_md) {
-		gre_fb_xmit(skb, dev);
+		gre_fb_xmit(skb, dev, skb->protocol);
 		return NETDEV_TX_OK;
 	}
 	struct ip_tunnel *tunnel = netdev_priv(dev);
 	if (tunnel->collect_md) {
-		gre_fb_xmit(skb, dev);
+		gre_fb_xmit(skb, dev, htons(ETH_P_TEB));
 		return NETDEV_TX_OK;
 	}
 	netif_keep_dst(dev);
 	dev->addr_len		= 4;
-	if (iph->daddr) {
+	if (iph->daddr && !tunnel->collect_md) {
 #ifdef CONFIG_NET_IPGRE_BROADCAST
 		if (ipv4_is_multicast(iph->daddr)) {
 			if (!iph->saddr)
 			dev->header_ops = &ipgre_header_ops;
 		}
 #endif
-	} else
+	} else if (!tunnel->collect_md) {
 		dev->header_ops = &ipgre_header_ops;
+	}
 	return ip_tunnel_init(dev);
 }
 	if (flags & (GRE_VERSION|GRE_ROUTING))
 		return -EINVAL;
+	if (data[IFLA_GRE_COLLECT_METADATA] &&
+	    data[IFLA_GRE_ENCAP_TYPE] &&
+	    nla_get_u16(data[IFLA_GRE_ENCAP_TYPE]) != TUNNEL_ENCAP_NONE)
+		return -EINVAL;
 	return 0;
 }

net/ipv4/ip_tunnel.c+2−2

 		if (!IS_ERR(rt)) {
 			tdev = rt->dst.dev;
-			dst_cache_set_ip4(&tunnel->dst_cache, &rt->dst,
-					  fl4.saddr);
 			ip_rt_put(rt);
 		}
 		if (dev->type != ARPHRD_ETHER)
 			dev->flags |= IFF_POINTOPOINT;
+		dst_cache_reset(&tunnel->dst_cache);
 	}
 	if (!tdev && tunnel->parms.link)

net/ipv6/addrconf.c+15−33

@@ -3176,35 +3176,9 @@ static void addrconf_gre_config(struct net_device *dev) · 3175 unmodified lines
3176	}	3176	}
3177	#endif	3177	#endif
3178		3178
3179	#if IS_ENABLED(CONFIG_NET_L3_MASTER_DEV)
3180	/* If the host route is cached on the addr struct make sure it is associated
3181	* with the proper table. e.g., enslavement can change and if so the cached
3182	* host route needs to move to the new table.
3183	*/
3184	static void l3mdev_check_host_rt(struct inet6_dev *idev,
3185	struct inet6_ifaddr *ifp)
3186	{
3187	if (ifp->rt) {
3188	u32 tb_id = l3mdev_fib_table(idev->dev) ? : RT6_TABLE_LOCAL;
3189
3190	if (tb_id != ifp->rt->rt6i_table->tb6_id) {
3191	ip6_del_rt(ifp->rt);
3192	ifp->rt = NULL;
3193	}
3194	}
3195	}
3196	#else
3197	static void l3mdev_check_host_rt(struct inet6_dev *idev,
3198	struct inet6_ifaddr *ifp)
3199	{
3200	}
3201	#endif
3202
3203	static int fixup_permanent_addr(struct inet6_dev *idev,	3179	static int fixup_permanent_addr(struct inet6_dev *idev,
3204	struct inet6_ifaddr *ifp)	3180	struct inet6_ifaddr *ifp)
3205	{	3181	{
3206	l3mdev_check_host_rt(idev, ifp);
3207
3208	if (!ifp->rt) {	3182	if (!ifp->rt) {
3209	struct rt6_info *rt;	3183	struct rt6_info *rt;
3210		3184
@@ -3304,6 +3278,9 @@ static int addrconf_notify(struct notifier_block *this, unsigned long event, · 93 unmodified lines
3304	break;	3278	break;
3305		3279
3306	if (event == NETDEV_UP) {	3280	if (event == NETDEV_UP) {
		3281	/* restore routes for permanent addresses */
		3282	addrconf_permanent_addr(dev);
		3283
3307	if (!addrconf_qdisc_ok(dev)) {	3284	if (!addrconf_qdisc_ok(dev)) {
3308	/* device is not ready yet. */	3285	/* device is not ready yet. */
3309	pr_info("ADDRCONF(NETDEV_UP): %s: link is not ready\n",	3286	pr_info("ADDRCONF(NETDEV_UP): %s: link is not ready\n",
@@ -3337,9 +3314,6 @@ static int addrconf_notify(struct notifier_block *this, unsigned long event, · 27 unmodified lines
3337	run_pending = 1;	3314	run_pending = 1;
3338	}	3315	}
3339		3316
3340	/* restore routes for permanent addresses */
3341	addrconf_permanent_addr(dev);
3342
3343	switch (dev->type) {	3317	switch (dev->type) {
3344	#if IS_ENABLED(CONFIG_IPV6_SIT)	3318	#if IS_ENABLED(CONFIG_IPV6_SIT)
3345	case ARPHRD_SIT:	3319	case ARPHRD_SIT:
@@ -3556,6 +3530,8 @@ restart: · 210 unmodified lines
3556		3530
3557	INIT_LIST_HEAD(&del_list);	3531	INIT_LIST_HEAD(&del_list);
3558	list_for_each_entry_safe(ifa, tmp, &idev->addr_list, if_list) {	3532	list_for_each_entry_safe(ifa, tmp, &idev->addr_list, if_list) {
		3533	struct rt6_info *rt = NULL;
		3534
3559	addrconf_del_dad_work(ifa);	3535	addrconf_del_dad_work(ifa);
3560		3536
3561	write_unlock_bh(&idev->lock);	3537	write_unlock_bh(&idev->lock);
@@ -3568,6 +3544,9 @@ restart: · 6 unmodified lines
3568	ifa->state = 0;	3544	ifa->state = 0;
3569	if (!(ifa->flags & IFA_F_NODAD))	3545	if (!(ifa->flags & IFA_F_NODAD))
3570	ifa->flags \|= IFA_F_TENTATIVE;	3546	ifa->flags \|= IFA_F_TENTATIVE;
		3547
		3548	rt = ifa->rt;
		3549	ifa->rt = NULL;
3571	} else {	3550	} else {
3572	state = ifa->state;	3551	state = ifa->state;
3573	ifa->state = INET6_IFADDR_STATE_DEAD;	3552	ifa->state = INET6_IFADDR_STATE_DEAD;
@@ -3578,6 +3557,9 @@ restart: · 4 unmodified lines
3578		3557
3579	spin_unlock_bh(&ifa->lock);	3558	spin_unlock_bh(&ifa->lock);
3580		3559
		3560	if (rt)
		3561	ip6_del_rt(rt);
		3562
3581	if (state != INET6_IFADDR_STATE_DEAD) {	3563	if (state != INET6_IFADDR_STATE_DEAD) {
3582	__ipv6_ifa_notify(RTM_DELADDR, ifa);	3564	__ipv6_ifa_notify(RTM_DELADDR, ifa);
3583	inet6addr_notifier_call_chain(NETDEV_DOWN, ifa);	3565	inet6addr_notifier_call_chain(NETDEV_DOWN, ifa);
@@ -5343,10 +5325,10 @@ static void __ipv6_ifa_notify(int event, struct inet6_ifaddr *ifp) · 1759 unmodified lines
5343	if (rt)	5325	if (rt)
5344	ip6_del_rt(rt);	5326	ip6_del_rt(rt);
5345	}	5327	}
5346	dst_hold(&ifp->rt->dst);	5328	if (ifp->rt) {
5347		5329	dst_hold(&ifp->rt->dst);
5348	ip6_del_rt(ifp->rt);	5330	ip6_del_rt(ifp->rt);
5349		5331	}
5350	rt_genid_bump_ipv6(net);	5332	rt_genid_bump_ipv6(net);
5351	break;	5333	break;
5352	}	5334	}

net/ipv6/ila/ila_lwt.c+1−2

@@ -120,8 +120,7 @@ nla_put_failure: · 119 unmodified lines
120		120
121	static int ila_encap_nlsize(struct lwtunnel_state *lwtstate)	121	static int ila_encap_nlsize(struct lwtunnel_state *lwtstate)
122	{	122	{
123	/* No encapsulation overhead */	123	return nla_total_size(sizeof(u64)); /* ILA_ATTR_LOCATOR */
124	return 0;
125	}	124	}
126		125
127	static int ila_encap_cmp(struct lwtunnel_state a, struct lwtunnel_state b)	126	static int ila_encap_cmp(struct lwtunnel_state a, struct lwtunnel_state b)

net/l2tp/l2tp_core.c+2−2

@@ -1376,9 +1376,9 @@ static int l2tp_tunnel_sock_create(struct net *net, · 1375 unmodified lines
1376	memcpy(&udp_conf.peer_ip6, cfg->peer_ip6,	1376	memcpy(&udp_conf.peer_ip6, cfg->peer_ip6,
1377	sizeof(udp_conf.peer_ip6));	1377	sizeof(udp_conf.peer_ip6));
1378	udp_conf.use_udp6_tx_checksums =	1378	udp_conf.use_udp6_tx_checksums =
1379	cfg->udp6_zero_tx_checksums;	1379	! cfg->udp6_zero_tx_checksums;
1380	udp_conf.use_udp6_rx_checksums =	1380	udp_conf.use_udp6_rx_checksums =
1381	cfg->udp6_zero_rx_checksums;	1381	! cfg->udp6_zero_rx_checksums;
1382	} else	1382	} else
1383	#endif	1383	#endif
1384	{	1384	{

net/mac80211/iface.c+2−2

@@ -1761,7 +1761,7 @@ int ieee80211_if_add(struct ieee80211_local local, const char name, · 1760 unmodified lines
1761		1761
1762	ret = dev_alloc_name(ndev, ndev->name);	1762	ret = dev_alloc_name(ndev, ndev->name);
1763	if (ret < 0) {	1763	if (ret < 0) {
1764	free_netdev(ndev);	1764	ieee80211_if_free(ndev);
1765	return ret;	1765	return ret;
1766	}	1766	}
1767		1767
@@ -1847,7 +1847,7 @@ int ieee80211_if_add(struct ieee80211_local local, const char name, · 79 unmodified lines
1847		1847
1848	ret = register_netdevice(ndev);	1848	ret = register_netdevice(ndev);
1849	if (ret) {	1849	if (ret) {
1850	free_netdev(ndev);	1850	ieee80211_if_free(ndev);
1851	return ret;	1851	return ret;
1852	}	1852	}
1853	}	1853	}

net/rds/tcp.c+2−1

 /*
  * This is the only path that sets tc->t_sock.  Send and receive trust that
- * it is set.  The RDS_CONN_CONNECTED bit protects those paths from being
+ * it is set.  The RDS_CONN_UP bit protects those paths from being
  * called while it isn't set.
  */
 void rds_tcp_set_callbacks(struct socket *sock, struct rds_connection *conn)
 	if (!tc)
 		return -ENOMEM;
+	mutex_init(&tc->t_conn_lock);
 	tc->t_sock = NULL;
 	tc->t_tinc = NULL;
 	tc->t_tinc_hdr_rem = sizeof(struct rds_header);

net/rds/tcp.h+4−0

 	struct list_head	t_tcp_node;
 	struct rds_connection   *conn;
+	/* t_conn_lock synchronizes the connection establishment between
+	 * rds_tcp_accept_one and rds_tcp_conn_connect
+	 */
+	struct mutex		t_conn_lock;
 	struct socket		*t_sock;
 	void			*t_orig_write_space;
 	void			*t_orig_data_ready;

net/rds/tcp_connect.c+8−0

 	struct socket *sock = NULL;
 	struct sockaddr_in src, dest;
 	int ret;
+	struct rds_tcp_connection *tc = conn->c_transport_data;
+	mutex_lock(&tc->t_conn_lock);
+	if (rds_conn_up(conn)) {
+		mutex_unlock(&tc->t_conn_lock);
+		return 0;
+	}
 	ret = sock_create_kern(rds_conn_net(conn), PF_INET,
 			       SOCK_STREAM, IPPROTO_TCP, &sock);
 	if (ret < 0)
 	}
 out:
+	mutex_unlock(&tc->t_conn_lock);
 	if (sock)
 		sock_release(sock);
 	return ret;

net/rds/tcp_listen.c+36−18

 	struct rds_connection *conn;
 	int ret;
 	struct inet_sock *inet;
-	struct rds_tcp_connection *rs_tcp;
+	struct rds_tcp_connection *rs_tcp = NULL;
+	int conn_state;
+	struct sock *nsk;
 	ret = sock_create_kern(sock_net(sock->sk), sock->sk->sk_family,
 			       sock->sk->sk_type, sock->sk->sk_protocol,
 	 * rds_tcp_state_change() will do that cleanup
 	 */
 	rs_tcp = (struct rds_tcp_connection *)conn->c_transport_data;
-	if (rs_tcp->t_sock &&
-	    ntohl(inet->inet_saddr) < ntohl(inet->inet_daddr)) {
-		struct sock *nsk = new_sock->sk;
-		nsk->sk_user_data = NULL;
-		nsk->sk_prot->disconnect(nsk, 0);
-		tcp_done(nsk);
-		new_sock = NULL;
-		ret = 0;
-		goto out;
-	} else if (rs_tcp->t_sock) {
-		rds_tcp_restore_callbacks(rs_tcp->t_sock, rs_tcp);
-		conn->c_outgoing = 0;
-	}
 	rds_conn_transition(conn, RDS_CONN_DOWN, RDS_CONN_CONNECTING);
+	mutex_lock(&rs_tcp->t_conn_lock);
+	conn_state = rds_conn_state(conn);
+	if (conn_state != RDS_CONN_CONNECTING && conn_state != RDS_CONN_UP)
+		goto rst_nsk;
+	if (rs_tcp->t_sock) {
+		/* Need to resolve a duelling SYN between peers.
+		 * We have an outstanding SYN to this peer, which may
+		 * potentially have transitioned to the RDS_CONN_UP state,
+		 * so we must quiesce any send threads before resetting
+		 * c_transport_data.
+		 */
+		wait_event(conn->c_waitq,
+			   !test_bit(RDS_IN_XMIT, &conn->c_flags));
+		if (ntohl(inet->inet_saddr) < ntohl(inet->inet_daddr)) {
+			goto rst_nsk;
+		} else if (rs_tcp->t_sock) {
+			rds_tcp_restore_callbacks(rs_tcp->t_sock, rs_tcp);
+			conn->c_outgoing = 0;
+		}
+	}
 	rds_tcp_set_callbacks(new_sock, conn);
-	rds_connect_complete(conn);
+	rds_connect_complete(conn); /* marks RDS_CONN_UP */
+	new_sock = NULL;
+	ret = 0;
+	goto out;
+rst_nsk:
+	/* reset the newly returned accept sock and bail */
+	nsk = new_sock->sk;
+	rds_tcp_stats_inc(s_tcp_listen_closed_stale);
+	nsk->sk_user_data = NULL;
+	nsk->sk_prot->disconnect(nsk, 0);
+	tcp_done(nsk);
 	new_sock = NULL;
 	ret = 0;
 out:
+	if (rs_tcp)
+		mutex_unlock(&rs_tcp->t_conn_lock);
 	if (new_sock)
 		sock_release(new_sock);
 	return ret;

net/sched/sch_netem.c+59−2

@@ -395,6 +395,25 @@ static void tfifo_enqueue(struct sk_buff nskb, struct Qdisc sch) · 394 unmodified lines
395	sch->q.qlen++;	395	sch->q.qlen++;
396	}	396	}
397		397
		398	/* netem can't properly corrupt a megapacket (like we get from GSO), so instead
		399	* when we statistically choose to corrupt one, we instead segment it, returning
		400	* the first packet to be corrupted, and re-enqueue the remaining frames
		401	*/
		402	static struct sk_buff netem_segment(struct sk_buff skb, struct Qdisc *sch)
		403	{
		404	struct sk_buff *segs;
		405	netdev_features_t features = netif_skb_features(skb);
		406
		407	segs = skb_gso_segment(skb, features & ~NETIF_F_GSO_MASK);
		408
		409	if (IS_ERR_OR_NULL(segs)) {
		410	qdisc_reshape_fail(skb, sch);
		411	return NULL;
		412	}
		413	consume_skb(skb);
		414	return segs;
		415	}
		416
398	/*	417	/*
399	* Insert one skb into qdisc.	418	* Insert one skb into qdisc.
400	* Note: parent depends on return value to account for queue length.	419	* Note: parent depends on return value to account for queue length.
@@ -407,7 +426,11 @@ static int netem_enqueue(struct sk_buff skb, struct Qdisc sch) · 6 unmodified lines
407	/* We don't fill cb now as skb_unshare() may invalidate it */	426	/* We don't fill cb now as skb_unshare() may invalidate it */
408	struct netem_skb_cb *cb;	427	struct netem_skb_cb *cb;
409	struct sk_buff *skb2;	428	struct sk_buff *skb2;
		429	struct sk_buff *segs = NULL;
		430	unsigned int len = 0, last_len, prev_len = qdisc_pkt_len(skb);
		431	int nb = 0;
410	int count = 1;	432	int count = 1;
		433	int rc = NET_XMIT_SUCCESS;
411		434
412	/* Random duplication */	435	/* Random duplication */
413	if (q->duplicate && q->duplicate >= get_crandom(&q->dup_cor))	436	if (q->duplicate && q->duplicate >= get_crandom(&q->dup_cor))
@@ -453,10 +476,23 @@ static int netem_enqueue(struct sk_buff skb, struct Qdisc sch) · 39 unmodified lines
453	* do it now in software before we mangle it.	476	* do it now in software before we mangle it.
454	*/	477	*/
455	if (q->corrupt && q->corrupt >= get_crandom(&q->corrupt_cor)) {	478	if (q->corrupt && q->corrupt >= get_crandom(&q->corrupt_cor)) {
		479	if (skb_is_gso(skb)) {
		480	segs = netem_segment(skb, sch);
		481	if (!segs)
		482	return NET_XMIT_DROP;
		483	} else {
		484	segs = skb;
		485	}
		486
		487	skb = segs;
		488	segs = segs->next;
		489
456	if (!(skb = skb_unshare(skb, GFP_ATOMIC)) \|\|	490	if (!(skb = skb_unshare(skb, GFP_ATOMIC)) \|\|
457	(skb->ip_summed == CHECKSUM_PARTIAL &&	491	(skb->ip_summed == CHECKSUM_PARTIAL &&
458	skb_checksum_help(skb)))	492	skb_checksum_help(skb))) {
459	return qdisc_drop(skb, sch);	493	rc = qdisc_drop(skb, sch);
		494	goto finish_segs;
		495	}
460		496
461	skb->data[prandom_u32() % skb_headlen(skb)] ^=	497	skb->data[prandom_u32() % skb_headlen(skb)] ^=
462	1<<(prandom_u32() % 8);	498	1<<(prandom_u32() % 8);
@@ -516,6 +552,27 @@ static int netem_enqueue(struct sk_buff skb, struct Qdisc sch) · 53 unmodified lines
516	sch->qstats.requeues++;	552	sch->qstats.requeues++;
517	}	553	}
518		554
		555	finish_segs:
		556	if (segs) {
		557	while (segs) {
		558	skb2 = segs->next;
		559	segs->next = NULL;
		560	qdisc_skb_cb(segs)->pkt_len = segs->len;
		561	last_len = segs->len;
		562	rc = qdisc_enqueue(segs, sch);
		563	if (rc != NET_XMIT_SUCCESS) {
		564	if (net_xmit_drop_count(rc))
		565	qdisc_qstats_drop(sch);
		566	} else {
		567	nb++;
		568	len += last_len;
		569	}
		570	segs = skb2;
		571	}
		572	sch->q.qlen += nb;
		573	if (nb > 1)
		574	qdisc_tree_reduce_backlog(sch, 1 - nb, prev_len - len);
		575	}
519	return NET_XMIT_SUCCESS;	576	return NET_XMIT_SUCCESS;
520	}	577	}
521		578

net/switchdev/switchdev.c+6−0

 	if (err && err != -EOPNOTSUPP)
 		netdev_err(dev, "failed (err=%d) to set attribute (id=%d)\n",
 			   err, attr->id);
+	if (attr->complete)
+		attr->complete(dev, err, attr->complete_priv);
 }
 static int switchdev_port_attr_set_defer(struct net_device *dev,
 	if (err && err != -EOPNOTSUPP)
 		netdev_err(dev, "failed (err=%d) to add object (id=%d)\n",
 			   err, obj->id);
+	if (obj->complete)
+		obj->complete(dev, err, obj->complete_priv);
 }
 static int switchdev_port_obj_add_defer(struct net_device *dev,
 	if (err && err != -EOPNOTSUPP)
 		netdev_err(dev, "failed (err=%d) to del object (id=%d)\n",
 			   err, obj->id);
+	if (obj->complete)
+		obj->complete(dev, err, obj->complete_priv);
 }
 static int switchdev_port_obj_del_defer(struct net_device *dev,

net/tipc/node.c+5−0

 	int bearer_id = b->identity;
 	struct tipc_link_entry *le;
 	u16 bc_ack = msg_bcast_ack(hdr);
+	u32 self = tipc_own_addr(net);
 	int rc = 0;
 	__skb_queue_head_init(&xmitq);
 			return tipc_node_bc_rcv(net, skb, bearer_id);
 	}
+	/* Discard unicast link messages destined for another node */
+	if (unlikely(!msg_short(hdr) && (msg_destnode(hdr) != self)))
+		goto discard;
 	/* Locate neighboring node that sent packet */
 	n = tipc_node_find(net, msg_prevnode(hdr));
 	if (unlikely(!n))

samples/bpf/trace_output_kern.c+0−1

@@ -18,7 +18,6 @@ int bpf_prog1(struct pt_regs *ctx) · 17 unmodified lines
18	u64 cookie;	18	u64 cookie;
19	} data;	19	} data;
20		20
21	memset(&data, 0, sizeof(data));
22	data.pid = bpf_get_current_pid_tgid();	21	data.pid = bpf_get_current_pid_tgid();
23	data.cookie = 0x12345678;	22	data.cookie = 0x12345678;
24		23

scripts/mod/file2alias.c+45−24

@@ -371,6 +371,49 @@ static void do_usb_table(void *symval, unsigned long size, · 370 unmodified lines
371	do_usb_entry_multi(symval + i, mod);	371	do_usb_entry_multi(symval + i, mod);
372	}	372	}
373		373
		374	static void do_of_entry_multi(void symval, struct module mod)
		375	{
		376	char alias[500];
		377	int len;
		378	char *tmp;
		379
		380	DEF_FIELD_ADDR(symval, of_device_id, name);
		381	DEF_FIELD_ADDR(symval, of_device_id, type);
		382	DEF_FIELD_ADDR(symval, of_device_id, compatible);
		383
		384	len = sprintf(alias, "of:N%sT%s", (name)[0] ? name : "*",
		385	(type)[0] ? type : "*");
		386
		387	if (compatible[0])
		388	sprintf(&alias[len], "%sC%s", (type)[0] ? "" : "",
		389	*compatible);
		390
		391	/* Replace all whitespace with underscores */
		392	for (tmp = alias; tmp && *tmp; tmp++)
		393	if (isspace(*tmp))
		394	*tmp = '_';
		395
		396	buf_printf(&mod->dev_table_buf, "MODULE_ALIAS(\"%s\");\n", alias);
		397	strcat(alias, "C");
		398	add_wildcard(alias);
		399	buf_printf(&mod->dev_table_buf, "MODULE_ALIAS(\"%s\");\n", alias);
		400	}
		401
		402	static void do_of_table(void *symval, unsigned long size,
		403	struct module *mod)
		404	{
		405	unsigned int i;
		406	const unsigned long id_size = SIZE_of_device_id;
		407
		408	device_id_check(mod->name, "of", size, id_size, symval);
		409
		410	/* Leave last one: it's the terminator. */
		411	size -= id_size;
		412
		413	for (i = 0; i < size; i += id_size)
		414	do_of_entry_multi(symval + i, mod);
		415	}
		416
374	/* Looks like: hid:bNvNpN */	417	/* Looks like: hid:bNvNpN */
375	static int do_hid_entry(const char *filename,	418	static int do_hid_entry(const char *filename,
376	void symval, char alias)	419	void symval, char alias)
@@ -684,30 +727,6 @@ static int do_pcmcia_entry(const char *filename, · 307 unmodified lines
684	}	727	}
685	ADD_TO_DEVTABLE("pcmcia", pcmcia_device_id, do_pcmcia_entry);	728	ADD_TO_DEVTABLE("pcmcia", pcmcia_device_id, do_pcmcia_entry);
686		729
687	static int do_of_entry (const char filename, void symval, char *alias)
688	{
689	int len;
690	char *tmp;
691	DEF_FIELD_ADDR(symval, of_device_id, name);
692	DEF_FIELD_ADDR(symval, of_device_id, type);
693	DEF_FIELD_ADDR(symval, of_device_id, compatible);
694
695	len = sprintf(alias, "of:N%sT%s", (name)[0] ? name : "*",
696	(type)[0] ? type : "*");
697
698	if (compatible[0])
699	sprintf(&alias[len], "%sC%s", (type)[0] ? "" : "",
700	*compatible);
701
702	/* Replace all whitespace with underscores */
703	for (tmp = alias; tmp && *tmp; tmp++)
704	if (isspace (*tmp))
705	*tmp = '_';
706
707	return 1;
708	}
709	ADD_TO_DEVTABLE("of", of_device_id, do_of_entry);
710
711	static int do_vio_entry(const char filename, void symval,	730	static int do_vio_entry(const char filename, void symval,
712	char *alias)	731	char *alias)
713	{	732	{
@@ -1348,6 +1367,8 @@ void handle_moddevtable(struct module mod, struct elf_info info, · 634 unmodified lines
1348	/* First handle the "special" cases */	1367	/* First handle the "special" cases */
1349	if (sym_is(name, namelen, "usb"))	1368	if (sym_is(name, namelen, "usb"))
1350	do_usb_table(symval, sym->st_size, mod);	1369	do_usb_table(symval, sym->st_size, mod);
		1370	if (sym_is(name, namelen, "of"))
		1371	do_of_table(symval, sym->st_size, mod);
1351	else if (sym_is(name, namelen, "pnp"))	1372	else if (sym_is(name, namelen, "pnp"))
1352	do_pnp_device_entry(symval, sym->st_size, mod);	1373	do_pnp_device_entry(symval, sym->st_size, mod);
1353	else if (sym_is(name, namelen, "pnp_card"))	1374	else if (sym_is(name, namelen, "pnp_card"))

security/integrity/ima/ima_policy.c+2−2

 	"BPRM_CHECK",
 	"MODULE_CHECK",
 	"FIRMWARE_CHECK",
+	"POST_SETATTR",
 	"KEXEC_KERNEL_CHECK",
 	"KEXEC_INITRAMFS_CHECK",
-	"POLICY_CHECK",
+	"POLICY_CHECK"
-	"POST_SETATTR"
 };
 void *ima_policy_start(struct seq_file *m, loff_t *pos)

sound/core/pcm_dmaengine.c+9−2

  * direction of the substream. If the substream is a playback stream the dst
  * fields will be initialized, if it is a capture stream the src fields will be
  * initialized. The {dst,src}_addr_width field will only be initialized if the
- * addr_width field of the DAI DMA data struct is not equal to
+ * SND_DMAENGINE_PCM_DAI_FLAG_PACK flag is set or if the addr_width field of
- * DMA_SLAVE_BUSWIDTH_UNDEFINED.
+ * the DAI DMA data struct is not equal to DMA_SLAVE_BUSWIDTH_UNDEFINED. If
+ * both conditions are met the latter takes priority.
  */
 void snd_dmaengine_pcm_set_config_from_dai_data(
 	const struct snd_pcm_substream *substream,
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 		slave_config->dst_addr = dma_data->addr;
 		slave_config->dst_maxburst = dma_data->maxburst;
+		if (dma_data->flags & SND_DMAENGINE_PCM_DAI_FLAG_PACK)
+			slave_config->dst_addr_width =
+				DMA_SLAVE_BUSWIDTH_UNDEFINED;
 		if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED)
 			slave_config->dst_addr_width = dma_data->addr_width;
 	} else {
 		slave_config->src_addr = dma_data->addr;
 		slave_config->src_maxburst = dma_data->maxburst;
+		if (dma_data->flags & SND_DMAENGINE_PCM_DAI_FLAG_PACK)
+			slave_config->src_addr_width =
+				DMA_SLAVE_BUSWIDTH_UNDEFINED;
 		if (dma_data->addr_width != DMA_SLAVE_BUSWIDTH_UNDEFINED)
 			slave_config->src_addr_width = dma_data->addr_width;
 	}

sound/core/pcm_iec958.c+48−17

 #include <linux/types.h>
 #include <sound/asoundef.h>
 #include <sound/pcm.h>
+#include <sound/pcm_params.h>
 #include <sound/pcm_iec958.h>
-/**
+static int create_iec958_consumer(uint rate, uint sample_width,
- * snd_pcm_create_iec958_consumer - create consumer format IEC958 channel status
+				  u8 *cs, size_t len)
- * @runtime: pcm runtime structure with ->rate filled in
- * @cs: channel status buffer, at least four bytes
- * @len: length of channel status buffer
- *
- * Create the consumer format channel status data in @cs of maximum size
- * @len corresponding to the parameters of the PCM runtime @runtime.
- *
- * Drivers may wish to tweak the contents of the buffer after creation.
- *
- * Returns: length of buffer, or negative error code if something failed.
- */
-int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs,
-	size_t len)
 {
 	unsigned int fs, ws;
 	if (len < 4)
 		return -EINVAL;
-	switch (runtime->rate) {
+	switch (rate) {
 	case 32000:
 		fs = IEC958_AES3_CON_FS_32000;
 		break;
 	}
 	if (len > 4) {
-		switch (snd_pcm_format_width(runtime->format)) {
+		switch (sample_width) {
 		case 16:
 			ws = IEC958_AES4_CON_WORDLEN_20_16;
 			break;
 			     IEC958_AES4_CON_MAX_WORDLEN_24;
 			break;
 		case 24:
+		case 32: /* Assume 24-bit width for 32-bit samples. */
 			ws = IEC958_AES4_CON_WORDLEN_24_20 |
 			     IEC958_AES4_CON_MAX_WORDLEN_24;
 			break;
 	return len;
 }
+/**
+ * snd_pcm_create_iec958_consumer - create consumer format IEC958 channel status
+ * @runtime: pcm runtime structure with ->rate filled in
+ * @cs: channel status buffer, at least four bytes
+ * @len: length of channel status buffer
+ *
+ * Create the consumer format channel status data in @cs of maximum size
+ * @len corresponding to the parameters of the PCM runtime @runtime.
+ *
+ * Drivers may wish to tweak the contents of the buffer after creation.
+ *
+ * Returns: length of buffer, or negative error code if something failed.
+ */
+int snd_pcm_create_iec958_consumer(struct snd_pcm_runtime *runtime, u8 *cs,
+	size_t len)
+{
+	return create_iec958_consumer(runtime->rate,
+				      snd_pcm_format_width(runtime->format),
+				      cs, len);
+}
 EXPORT_SYMBOL(snd_pcm_create_iec958_consumer);
+/**
+ * snd_pcm_create_iec958_consumer_hw_params - create IEC958 channel status
+ * @hw_params: the hw_params instance for extracting rate and sample format
+ * @cs: channel status buffer, at least four bytes
+ * @len: length of channel status buffer
+ *
+ * Create the consumer format channel status data in @cs of maximum size
+ * @len corresponding to the parameters of the PCM runtime @runtime.
+ *
+ * Drivers may wish to tweak the contents of the buffer after creation.
+ *
+ * Returns: length of buffer, or negative error code if something failed.
+ */
+int snd_pcm_create_iec958_consumer_hw_params(struct snd_pcm_hw_params *params,
+					     u8 *cs, size_t len)
+{
+	return create_iec958_consumer(params_rate(params), params_width(params),
+				      cs, len);
+}
+EXPORT_SYMBOL(snd_pcm_create_iec958_consumer_hw_params);

sound/hda/ext/hdac_ext_bus.c+3−0

@@ -105,6 +105,9 @@ int snd_hdac_ext_bus_init(struct hdac_ext_bus ebus, struct device dev, · 104 unmodified lines
105	INIT_LIST_HEAD(&ebus->hlink_list);	105	INIT_LIST_HEAD(&ebus->hlink_list);
106	ebus->idx = idx++;	106	ebus->idx = idx++;
107		107
		108	mutex_init(&ebus->lock);
		109	ebus->cmd_dma_state = true;
		110
108	return 0;	111	return 0;
109	}	112	}
110	EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_init);	113	EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_init);

sound/hda/ext/hdac_ext_controller.c+66−0

@@ -186,6 +186,9 @@ int snd_hdac_ext_bus_get_ml_capabilities(struct hdac_ext_bus *ebus) · 185 unmodified lines
186	hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);	186	hlink->lcaps = readl(hlink->ml_addr + AZX_REG_ML_LCAP);
187	hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);	187	hlink->lsdiid = readw(hlink->ml_addr + AZX_REG_ML_LSDIID);
188		188
		189	/* since link in On, update the ref */
		190	hlink->ref_count = 1;
		191
189	list_add_tail(&hlink->list, &ebus->hlink_list);	192	list_add_tail(&hlink->list, &ebus->hlink_list);
190	}	193	}
191		194
@@ -327,3 +330,66 @@ int snd_hdac_ext_bus_link_power_down_all(struct hdac_ext_bus *ebus) · 135 unmodified lines
327	return 0;	330	return 0;
328	}	331	}
329	EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all);	332	EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_power_down_all);
		333
		334	int snd_hdac_ext_bus_link_get(struct hdac_ext_bus *ebus,
		335	struct hdac_ext_link *link)
		336	{
		337	int ret = 0;
		338
		339	mutex_lock(&ebus->lock);
		340
		341	/*
		342	* if we move from 0 to 1, count will be 1 so power up this link
		343	* as well, also check the dma status and trigger that
		344	*/
		345	if (++link->ref_count == 1) {
		346	if (!ebus->cmd_dma_state) {
		347	snd_hdac_bus_init_cmd_io(&ebus->bus);
		348	ebus->cmd_dma_state = true;
		349	}
		350
		351	ret = snd_hdac_ext_bus_link_power_up(link);
		352	}
		353
		354	mutex_unlock(&ebus->lock);
		355	return ret;
		356	}
		357	EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_get);
		358
		359	int snd_hdac_ext_bus_link_put(struct hdac_ext_bus *ebus,
		360	struct hdac_ext_link *link)
		361	{
		362	int ret = 0;
		363	struct hdac_ext_link *hlink;
		364	bool link_up = false;
		365
		366	mutex_lock(&ebus->lock);
		367
		368	/*
		369	* if we move from 1 to 0, count will be 0
		370	* so power down this link as well
		371	*/
		372	if (--link->ref_count == 0) {
		373	ret = snd_hdac_ext_bus_link_power_down(link);
		374
		375	/*
		376	* now check if all links are off, if so turn off
		377	* cmd dma as well
		378	*/
		379	list_for_each_entry(hlink, &ebus->hlink_list, list) {
		380	if (hlink->ref_count) {
		381	link_up = true;
		382	break;
		383	}
		384	}
		385
		386	if (!link_up) {
		387	snd_hdac_bus_stop_cmd_io(&ebus->bus);
		388	ebus->cmd_dma_state = false;
		389	}
		390	}
		391
		392	mutex_unlock(&ebus->lock);
		393	return ret;
		394	}
		395	EXPORT_SYMBOL_GPL(snd_hdac_ext_bus_link_put);

sound/hda/local.h+10−0

@@ -16,6 +16,16 @@ static inline int get_wcaps_type(unsigned int wcaps) · 15 unmodified lines
16	return (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;	16	return (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
17	}	17	}
18		18
		19	static inline unsigned int get_wcaps_channels(u32 wcaps)
		20	{
		21	unsigned int chans;
		22
		23	chans = (wcaps & AC_WCAP_CHAN_CNT_EXT) >> 13;
		24	chans = (chans + 1) * 2;
		25
		26	return chans;
		27	}
		28
19	extern const struct attribute_group *hdac_dev_attr_groups[];	29	extern const struct attribute_group *hdac_dev_attr_groups[];
20	int hda_widget_sysfs_init(struct hdac_device *codec);	30	int hda_widget_sysfs_init(struct hdac_device *codec);
21	void hda_widget_sysfs_exit(struct hdac_device *codec);	31	void hda_widget_sysfs_exit(struct hdac_device *codec);

sound/soc/atmel/atmel_ssc_dai.c+2−2

@@ -652,7 +652,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream, · 651 unmodified lines
652	rcmr = SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)	652	rcmr = SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)
653	\| SSC_BF(RCMR_STTDLY, 1)	653	\| SSC_BF(RCMR_STTDLY, 1)
654	\| SSC_BF(RCMR_START, SSC_START_RISING_RF)	654	\| SSC_BF(RCMR_START, SSC_START_RISING_RF)
655	\| SSC_BF(RCMR_CKI, SSC_CKI_FALLING)	655	\| SSC_BF(RCMR_CKI, SSC_CKI_RISING)
656	\| SSC_BF(RCMR_CKO, SSC_CKO_NONE)	656	\| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
657	\| SSC_BF(RCMR_CKS, SSC_CKS_DIV);	657	\| SSC_BF(RCMR_CKS, SSC_CKS_DIV);
658		658
@@ -692,7 +692,7 @@ static int atmel_ssc_hw_params(struct snd_pcm_substream *substream, · 33 unmodified lines
692	rcmr = SSC_BF(RCMR_PERIOD, 0)	692	rcmr = SSC_BF(RCMR_PERIOD, 0)
693	\| SSC_BF(RCMR_STTDLY, START_DELAY)	693	\| SSC_BF(RCMR_STTDLY, START_DELAY)
694	\| SSC_BF(RCMR_START, SSC_START_RISING_RF)	694	\| SSC_BF(RCMR_START, SSC_START_RISING_RF)
695	\| SSC_BF(RCMR_CKI, SSC_CKI_FALLING)	695	\| SSC_BF(RCMR_CKI, SSC_CKI_RISING)
696	\| SSC_BF(RCMR_CKO, SSC_CKO_NONE)	696	\| SSC_BF(RCMR_CKO, SSC_CKO_NONE)
697	\| SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?	697	\| SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
698	SSC_CKS_PIN : SSC_CKS_CLOCK);	698	SSC_CKS_PIN : SSC_CKS_CLOCK);

sound/soc/au1x/dbdma2.c+2−2

@@ -206,8 +206,8 @@ static int au1xpsc_pcm_hw_params(struct snd_pcm_substream *substream, · 205 unmodified lines
206	stype = substream->stream;	206	stype = substream->stream;
207	pcd = to_dmadata(substream);	207	pcd = to_dmadata(substream);
208		208
209	DBG("runtime->dma_area = 0x%08lx dma_addr_t = 0x%08lx dma_size = %d "	209	DBG("runtime->dma_area = 0x%08lx dma_addr_t = 0x%08lx dma_size = %zu "
210	"runtime->min_align %d\n",	210	"runtime->min_align %lu\n",
211	(unsigned long)runtime->dma_area,	211	(unsigned long)runtime->dma_area,
212	(unsigned long)runtime->dma_addr, runtime->dma_bytes,	212	(unsigned long)runtime->dma_addr, runtime->dma_bytes,
213	runtime->min_align);	213	runtime->min_align);

sound/soc/bcm/bcm2835-i2s.c+24−3

 	case SNDRV_PCM_FORMAT_S16_LE:
 		data_length = 16;
 		break;
+	case SNDRV_PCM_FORMAT_S24_LE:
+		data_length = 24;
+		break;
 	case SNDRV_PCM_FORMAT_S32_LE:
 		data_length = 32;
 		break;
 		/* otherwise calculate a fitting block ratio */
 		bclk_ratio = 2 * data_length;
-	/* set target clock rate*/
+	/* Clock should only be set up here if CPU is clock master */
-	clk_set_rate(dev->clk, sampling_rate * bclk_ratio);
+	switch (dev->fmt & SND_SOC_DAIFMT_MASTER_MASK) {
+	case SND_SOC_DAIFMT_CBS_CFS:
+	case SND_SOC_DAIFMT_CBS_CFM:
+		clk_set_rate(dev->clk, sampling_rate * bclk_ratio);
+		break;
+	default:
+		break;
+	}
 	/* Setup the frame format */
 	format = BCM2835_I2S_CHEN;
-	if (data_length > 24)
+	if (data_length >= 24)
 		format |= BCM2835_I2S_CHWEX;
 	format |= BCM2835_I2S_CHWID((data_length-8)&0xf);
 		.channels_max = 2,
 		.rates =	SNDRV_PCM_RATE_8000_192000,
 		.formats =	SNDRV_PCM_FMTBIT_S16_LE
+				| SNDRV_PCM_FMTBIT_S24_LE
 				| SNDRV_PCM_FMTBIT_S32_LE
 		},
 	.capture = {
 		.channels_max = 2,
 		.rates =	SNDRV_PCM_RATE_8000_192000,
 		.formats =	SNDRV_PCM_FMTBIT_S16_LE
+				| SNDRV_PCM_FMTBIT_S24_LE
 				| SNDRV_PCM_FMTBIT_S32_LE
 		},
 	.ops = &bcm2835_i2s_dai_ops,
 	dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].maxburst = 2;
 	dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].maxburst = 2;
+	/*
+	 * Set the PACK flag to enable S16_LE support (2 S16_LE values
+	 * packed into 32-bit transfers).
+	 */
+	dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].flags =
+		SND_DMAENGINE_PCM_DAI_FLAG_PACK;
+	dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].flags =
+		SND_DMAENGINE_PCM_DAI_FLAG_PACK;
 	/* BCLK ratio - use default */
 	dev->bclk_ratio = 0;

sound/soc/codecs/Kconfig+10−0

 	select SND_SOC_MC13783 if MFD_MC13XXX
 	select SND_SOC_ML26124 if I2C
 	select SND_SOC_NAU8825 if I2C
+	select SND_SOC_HDMI_CODEC
 	select SND_SOC_PCM1681 if I2C
 	select SND_SOC_PCM179X_I2C if I2C
 	select SND_SOC_PCM179X_SPI if SPI_MASTER
 	select SND_SOC_PCM3008
 	select SND_SOC_PCM3168A_I2C if I2C
 	select SND_SOC_PCM3168A_SPI if SPI_MASTER
+	select SND_SOC_PCM5102A
 	select SND_SOC_PCM512x_I2C if I2C
 	select SND_SOC_PCM512x_SPI if SPI_MASTER
 	select SND_SOC_RT286 if I2C
 config SND_SOC_DMIC
 	tristate
+config SND_SOC_HDMI_CODEC
+       tristate
+       select SND_PCM_ELD
+       select SND_PCM_IEC958
 config SND_SOC_ES8328
 	tristate "Everest Semi ES8328 CODEC"
 	select SND_SOC_PCM3168A
 	select REGMAP_SPI
+config SND_SOC_PCM5102A
+	tristate
 config SND_SOC_PCM512x
 	tristate

sound/soc/codecs/Makefile+4−0

 snd-soc-mc13783-objs := mc13783.o
 snd-soc-ml26124-objs := ml26124.o
 snd-soc-nau8825-objs := nau8825.o
+snd-soc-hdmi-codec-objs := hdmi-codec.o
 snd-soc-pcm1681-objs := pcm1681.o
 snd-soc-pcm179x-codec-objs := pcm179x.o
 snd-soc-pcm179x-i2c-objs := pcm179x-i2c.o
 snd-soc-pcm3168a-objs := pcm3168a.o
 snd-soc-pcm3168a-i2c-objs := pcm3168a-i2c.o
 snd-soc-pcm3168a-spi-objs := pcm3168a-spi.o
+snd-soc-pcm5102a-objs := pcm5102a.o
 snd-soc-pcm512x-objs := pcm512x.o
 snd-soc-pcm512x-i2c-objs := pcm512x-i2c.o
 snd-soc-pcm512x-spi-objs := pcm512x-spi.o
 obj-$(CONFIG_SND_SOC_MC13783)	+= snd-soc-mc13783.o
 obj-$(CONFIG_SND_SOC_ML26124)	+= snd-soc-ml26124.o
 obj-$(CONFIG_SND_SOC_NAU8825)   += snd-soc-nau8825.o
+obj-$(CONFIG_SND_SOC_HDMI_CODEC)	+= snd-soc-hdmi-codec.o
 obj-$(CONFIG_SND_SOC_PCM1681)	+= snd-soc-pcm1681.o
 obj-$(CONFIG_SND_SOC_PCM179X)	+= snd-soc-pcm179x-codec.o
 obj-$(CONFIG_SND_SOC_PCM179X_I2C)	+= snd-soc-pcm179x-i2c.o
 obj-$(CONFIG_SND_SOC_PCM3168A)	+= snd-soc-pcm3168a.o
 obj-$(CONFIG_SND_SOC_PCM3168A_I2C)	+= snd-soc-pcm3168a-i2c.o
 obj-$(CONFIG_SND_SOC_PCM3168A_SPI)	+= snd-soc-pcm3168a-spi.o
+obj-$(CONFIG_SND_SOC_PCM5102A)	+= snd-soc-pcm5102a.o
 obj-$(CONFIG_SND_SOC_PCM512x)	+= snd-soc-pcm512x.o
 obj-$(CONFIG_SND_SOC_PCM512x_I2C)	+= snd-soc-pcm512x-i2c.o
 obj-$(CONFIG_SND_SOC_PCM512x_SPI)	+= snd-soc-pcm512x-spi.o

sound/soc/codecs/ak4642.c+1−3

@@ -608,9 +608,7 @@ static struct clk ak4642_of_parse_mcko(struct device dev) · 607 unmodified lines
608		608
609	of_property_read_string(np, "clock-output-names", &clk_name);	609	of_property_read_string(np, "clock-output-names", &clk_name);
610		610
611	clk = clk_register_fixed_rate(dev, clk_name, parent_clk_name,	611	clk = clk_register_fixed_rate(dev, clk_name, parent_clk_name, 0, rate);
612	(parent_clk_name) ? 0 : CLK_IS_ROOT,
613	rate);
614	if (!IS_ERR(clk))	612	if (!IS_ERR(clk))
615	of_clk_add_provider(np, of_clk_src_simple_get, clk);	613	of_clk_add_provider(np, of_clk_src_simple_get, clk);
616		614

sound/soc/codecs/arizona.c+18−14

 	switch (arizona->type) {
 	case WM8997:
+	case CS47L24:
+	case WM1831:
 		break;
 	default:
 		ret = snd_soc_dapm_new_controls(dapm, &arizona_spkr, 1);
 		   int event)
 {
 	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
-	unsigned int mask = 0x3 << w->shift;
 	unsigned int val;
 	switch (event) {
 		return 0;
 	}
-	snd_soc_update_bits(codec, ARIZONA_CLOCK_CONTROL, mask, val);
+	snd_soc_write(codec, ARIZONA_CLOCK_CONTROL, val);
 	return 0;
 }
 			init_ratio, Fref, refdiv);
 	while (div <= ARIZONA_FLL_MAX_REFDIV) {
-		for (ratio = init_ratio; ratio <= ARIZONA_FLL_MAX_FRATIO;
+		/* start from init_ratio because this may already give a
+		 * fractional N.K
+		 */
+		for (ratio = init_ratio; ratio > 0; ratio--) {
+			if (target % (ratio * Fref)) {
+				cfg->refdiv = refdiv;
+				cfg->fratio = ratio - 1;
+				arizona_fll_dbg(fll,
+					"pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n",
+					Fref, refdiv, div, ratio);
+				return ratio;
+			}
+		}
+		for (ratio = init_ratio + 1; ratio <= ARIZONA_FLL_MAX_FRATIO;
 		     ratio++) {
 			if ((ARIZONA_FLL_VCO_CORNER / 2) /
 			    (fll->vco_mult * ratio) < Fref) {
 			}
 		}
-		for (ratio = init_ratio - 1; ratio > 0; ratio--) {
-			if (target % (ratio * Fref)) {
-				cfg->refdiv = refdiv;
-				cfg->fratio = ratio - 1;
-				arizona_fll_dbg(fll,
-					"pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n",
-					Fref, refdiv, div, ratio);
-				return ratio;
-			}
-		}
 		div *= 2;
 		Fref /= 2;
 		refdiv++;

sound/soc/codecs/cs42l56.c+1−1

@@ -56,7 +56,7 @@ struct cs42l56_private { · 55 unmodified lines
56	u8 iface;	56	u8 iface;
57	u8 iface_fmt;	57	u8 iface_fmt;
58	u8 iface_inv;	58	u8 iface_inv;
59	#if defined(CONFIG_INPUT) \|\| defined(CONFIG_INPUT_MODULE)	59	#if IS_ENABLED(CONFIG_INPUT)
60	struct input_dev *beep;	60	struct input_dev *beep;
61	struct work_struct beep_work;	61	struct work_struct beep_work;
62	int beep_rate;	62	int beep_rate;

sound/soc/codecs/cs47l24.c+42−4

 	{ "IN2L PGA", NULL, "IN2L" },
 	{ "IN2R PGA", NULL, "IN2R" },
+	{ "Audio Trace DSP", NULL, "DSP2" },
+	{ "Audio Trace DSP", NULL, "SYSCLK" },
 	ARIZONA_MIXER_ROUTES("OUT1L", "HPOUT1L"),
 	ARIZONA_MIXER_ROUTES("OUT1R", "HPOUT1R"),
 			.formats = CS47L24_FORMATS,
 		},
 	},
+	{
+		.name = "cs47l24-cpu-trace",
+		.capture = {
+			.stream_name = "Audio Trace CPU",
+			.channels_min = 1,
+			.channels_max = 6,
+			.rates = CS47L24_RATES,
+			.formats = CS47L24_FORMATS,
+		},
+		.compress_new = snd_soc_new_compress,
+	},
+	{
+		.name = "cs47l24-dsp-trace",
+		.capture = {
+			.stream_name = "Audio Trace DSP",
+			.channels_min = 1,
+			.channels_max = 6,
+			.rates = CS47L24_RATES,
+			.formats = CS47L24_FORMATS,
+		},
+	},
 };
 static int cs47l24_open(struct snd_compr_stream *stream)
 	if (strcmp(rtd->codec_dai->name, "cs47l24-dsp-voicectrl") == 0) {
 		n_adsp = 2;
+	} else if (strcmp(rtd->codec_dai->name, "cs47l24-dsp-trace") == 0) {
+		n_adsp = 1;
 	} else {
 		dev_err(arizona->dev,
 			"No suitable compressed stream for DAI '%s'\n",
 {
 	struct cs47l24_priv *priv = data;
 	struct arizona *arizona = priv->core.arizona;
-	int ret;
+	int serviced = 0;
+	int i, ret;
-	ret = wm_adsp_compr_handle_irq(&priv->core.adsp[2]);
+	for (i = 1; i <= 2; ++i) {
-	if (ret == -ENODEV) {
+		ret = wm_adsp_compr_handle_irq(&priv->core.adsp[i]);
+		if (ret != -ENODEV)
+			serviced++;
+	}
+	if (!serviced) {
 		dev_err(arizona->dev, "Spurious compressed data IRQ\n");
 		return IRQ_NONE;
 	}
 static struct snd_soc_platform_driver cs47l24_compr_platform = {
 	.compr_ops = &cs47l24_compr_ops,
 };
 static int cs47l24_probe(struct platform_device *pdev)
 {
 	struct arizona *arizona = dev_get_drvdata(pdev->dev.parent);
 		dev_err(&pdev->dev, "Failed to register platform: %d\n", ret);
 		return ret;
 	}
 	ret = snd_soc_register_codec(&pdev->dev, &soc_codec_dev_cs47l24,
 				      cs47l24_dai, ARRAY_SIZE(cs47l24_dai));
 	if (ret < 0) {
 		dev_err(&pdev->dev, "Failed to register codec: %d\n", ret);
 		snd_soc_unregister_platform(&pdev->dev);
 static int cs47l24_remove(struct platform_device *pdev)
 {
+	struct cs47l24_priv *cs47l24 = platform_get_drvdata(pdev);
 	snd_soc_unregister_platform(&pdev->dev);
 	snd_soc_unregister_codec(&pdev->dev);
 	pm_runtime_disable(&pdev->dev);
+	wm_adsp2_remove(&cs47l24->core.adsp[1]);
+	wm_adsp2_remove(&cs47l24->core.adsp[2]);
 	return 0;
 }

sound/soc/codecs/da7213.c+82−17

@@ -725,6 +725,68 @@ static const struct snd_kcontrol_new da7213_dapm_mixoutr_controls[] = { · 724 unmodified lines
725	};	725	};
726		726
727		727
		728	/*
		729	* DAPM Events
		730	*/
		731
		732	static int da7213_dai_event(struct snd_soc_dapm_widget *w,
		733	struct snd_kcontrol *kcontrol, int event)
		734	{
		735	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
		736	struct da7213_priv *da7213 = snd_soc_codec_get_drvdata(codec);
		737	u8 pll_ctrl, pll_status;
		738	int i = 0;
		739	bool srm_lock = false;
		740
		741	switch (event) {
		742	case SND_SOC_DAPM_PRE_PMU:
		743	/* Enable DAI clks for master mode */
		744	if (da7213->master)
		745	snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
		746	DA7213_DAI_CLK_EN_MASK,
		747	DA7213_DAI_CLK_EN_MASK);
		748
		749	/* PC synchronised to DAI */
		750	snd_soc_update_bits(codec, DA7213_PC_COUNT,
		751	DA7213_PC_FREERUN_MASK, 0);
		752
		753	/* Slave mode, if SRM not enabled no need for status checks */
		754	pll_ctrl = snd_soc_read(codec, DA7213_PLL_CTRL);
		755	if (!(pll_ctrl & DA7213_PLL_SRM_EN))
		756	return 0;
		757
		758	/* Check SRM has locked */
		759	do {
		760	pll_status = snd_soc_read(codec, DA7213_PLL_STATUS);
		761	if (pll_status & DA7219_PLL_SRM_LOCK) {
		762	srm_lock = true;
		763	} else {
		764	++i;
		765	msleep(50);
		766	}
		767	} while ((i < DA7213_SRM_CHECK_RETRIES) & (!srm_lock));
		768
		769	if (!srm_lock)
		770	dev_warn(codec->dev, "SRM failed to lock\n");
		771
		772	return 0;
		773	case SND_SOC_DAPM_POST_PMD:
		774	/* PC free-running */
		775	snd_soc_update_bits(codec, DA7213_PC_COUNT,
		776	DA7213_PC_FREERUN_MASK,
		777	DA7213_PC_FREERUN_MASK);
		778
		779	/* Disable DAI clks if in master mode */
		780	if (da7213->master)
		781	snd_soc_update_bits(codec, DA7213_DAI_CLK_MODE,
		782	DA7213_DAI_CLK_EN_MASK, 0);
		783	return 0;
		784	default:
		785	return -EINVAL;
		786	}
		787	}
		788
		789
728	/*	790	/*
729	* DAPM widgets	791	* DAPM widgets
730	*/	792	*/
@@ -736,7 +798,8 @@ static const struct snd_soc_dapm_widget da7213_dapm_widgets[] = { · 5 unmodified lines
736		798
737	/* Use a supply here as this controls both input & output DAIs */	799	/* Use a supply here as this controls both input & output DAIs */
738	SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT,	800	SND_SOC_DAPM_SUPPLY("DAI", DA7213_DAI_CTRL, DA7213_DAI_EN_SHIFT,
739	DA7213_NO_INVERT, NULL, 0),	801	DA7213_NO_INVERT, da7213_dai_event,
		802	SND_SOC_DAPM_PRE_PMU \| SND_SOC_DAPM_POST_PMD),
740		803
741	/*	804	/*
742	* Input	805	* Input
@@ -1143,11 +1206,9 @@ static int da7213_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) · 400 unmodified lines
1143	/* Set master/slave mode */	1206	/* Set master/slave mode */
1144	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {	1207	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1145	case SND_SOC_DAIFMT_CBM_CFM:	1208	case SND_SOC_DAIFMT_CBM_CFM:
1146	dai_clk_mode \|= DA7213_DAI_CLK_EN_MASTER_MODE;
1147	da7213->master = true;	1209	da7213->master = true;
1148	break;	1210	break;
1149	case SND_SOC_DAIFMT_CBS_CFS:	1211	case SND_SOC_DAIFMT_CBS_CFS:
1150	dai_clk_mode \|= DA7213_DAI_CLK_EN_SLAVE_MODE;
1151	da7213->master = false;	1212	da7213->master = false;
1152	break;	1213	break;
1153	default:	1214	default:
@@ -1281,28 +1342,28 @@ static int da7213_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, · 127 unmodified lines
1281	pll_ctrl = 0;	1342	pll_ctrl = 0;
1282		1343
1283	/* Workout input divider based on MCLK rate */	1344	/* Workout input divider based on MCLK rate */
1284	if ((da7213->mclk_rate == 32768) && (source == DA7213_SYSCLK_PLL)) {	1345	if (da7213->mclk_rate == 32768) {
1285	/* 32KHz PLL Mode */	1346	/* 32KHz PLL Mode */
1286	indiv_bits = DA7213_PLL_INDIV_10_20_MHZ;	1347	indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1287	indiv = DA7213_PLL_INDIV_10_20_MHZ_VAL;	1348	indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
1288	freq_ref = 3750000;	1349	freq_ref = 3750000;
1289	pll_ctrl \|= DA7213_PLL_32K_MODE;	1350	pll_ctrl \|= DA7213_PLL_32K_MODE;
1290	} else {	1351	} else {
1291	/* 5 - 54MHz MCLK */	1352	/* 5 - 54MHz MCLK */
1292	if (da7213->mclk_rate < 5000000) {	1353	if (da7213->mclk_rate < 5000000) {
1293	goto pll_err;	1354	goto pll_err;
1294	} else if (da7213->mclk_rate <= 10000000) {	1355	} else if (da7213->mclk_rate <= 9000000) {
1295	indiv_bits = DA7213_PLL_INDIV_5_10_MHZ;	1356	indiv_bits = DA7213_PLL_INDIV_5_TO_9_MHZ;
1296	indiv = DA7213_PLL_INDIV_5_10_MHZ_VAL;	1357	indiv = DA7213_PLL_INDIV_5_TO_9_MHZ_VAL;
1297	} else if (da7213->mclk_rate <= 20000000) {	1358	} else if (da7213->mclk_rate <= 18000000) {
1298	indiv_bits = DA7213_PLL_INDIV_10_20_MHZ;	1359	indiv_bits = DA7213_PLL_INDIV_9_TO_18_MHZ;
1299	indiv = DA7213_PLL_INDIV_10_20_MHZ_VAL;	1360	indiv = DA7213_PLL_INDIV_9_TO_18_MHZ_VAL;
1300	} else if (da7213->mclk_rate <= 40000000) {	1361	} else if (da7213->mclk_rate <= 36000000) {
1301	indiv_bits = DA7213_PLL_INDIV_20_40_MHZ;	1362	indiv_bits = DA7213_PLL_INDIV_18_TO_36_MHZ;
1302	indiv = DA7213_PLL_INDIV_20_40_MHZ_VAL;	1363	indiv = DA7213_PLL_INDIV_18_TO_36_MHZ_VAL;
1303	} else if (da7213->mclk_rate <= 54000000) {	1364	} else if (da7213->mclk_rate <= 54000000) {
1304	indiv_bits = DA7213_PLL_INDIV_40_54_MHZ;	1365	indiv_bits = DA7213_PLL_INDIV_36_TO_54_MHZ;
1305	indiv = DA7213_PLL_INDIV_40_54_MHZ_VAL;	1366	indiv = DA7213_PLL_INDIV_36_TO_54_MHZ_VAL;
1306	} else {	1367	} else {
1307	goto pll_err;	1368	goto pll_err;
1308	}	1369	}
@@ -1547,6 +1608,10 @@ static int da7213_probe(struct snd_soc_codec *codec) · 238 unmodified lines
1547	/* Default to using SRM for slave mode */	1608	/* Default to using SRM for slave mode */
1548	da7213->srm_en = true;	1609	da7213->srm_en = true;
1549		1610
		1611	/* Default PC counter to free-running */
		1612	snd_soc_update_bits(codec, DA7213_PC_COUNT, DA7213_PC_FREERUN_MASK,
		1613	DA7213_PC_FREERUN_MASK);
		1614
1550	/* Enable all Gain Ramps */	1615	/* Enable all Gain Ramps */
1551	snd_soc_update_bits(codec, DA7213_AUX_L_CTRL,	1616	snd_soc_update_bits(codec, DA7213_AUX_L_CTRL,
1552	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);	1617	DA7213_GAIN_RAMP_EN, DA7213_GAIN_RAMP_EN);

sound/soc/codecs/da7213.h+20−15

  * Bit fields
  */
+/* DA7213_PLL_STATUS = 0x03 */
+#define DA7219_PLL_SRM_LOCK					(0x1 << 1)
 /* DA7213_SR = 0x22 */
 #define DA7213_SR_8000						(0x1 << 0)
 #define DA7213_SR_11025						(0x2 << 0)
 #define DA7213_VMID_EN						(0x1 << 7)
 /* DA7213_PLL_CTRL = 0x27 */
-#define DA7213_PLL_INDIV_5_10_MHZ				(0x0 << 2)
+#define DA7213_PLL_INDIV_5_TO_9_MHZ				(0x0 << 2)
-#define DA7213_PLL_INDIV_10_20_MHZ				(0x1 << 2)
+#define DA7213_PLL_INDIV_9_TO_18_MHZ				(0x1 << 2)
-#define DA7213_PLL_INDIV_20_40_MHZ				(0x2 << 2)
+#define DA7213_PLL_INDIV_18_TO_36_MHZ				(0x2 << 2)
-#define DA7213_PLL_INDIV_40_54_MHZ				(0x3 << 2)
+#define DA7213_PLL_INDIV_36_TO_54_MHZ				(0x3 << 2)
 #define DA7213_PLL_INDIV_MASK					(0x3 << 2)
 #define DA7213_PLL_MCLK_SQR_EN					(0x1 << 4)
 #define DA7213_PLL_32K_MODE					(0x1 << 5)
 #define DA7213_DAI_BCLKS_PER_WCLK_MASK				(0x3 << 0)
 #define DA7213_DAI_CLK_POL_INV					(0x1 << 2)
 #define DA7213_DAI_WCLK_POL_INV					(0x1 << 3)
-#define DA7213_DAI_CLK_EN_SLAVE_MODE				(0x0 << 7)
-#define DA7213_DAI_CLK_EN_MASTER_MODE				(0x1 << 7)
 #define DA7213_DAI_CLK_EN_MASK					(0x1 << 7)
 /* DA7213_DAI_CTRL = 0x29 */
 #define DA7213_DMIC_CLK_RATE_SHIFT				2
 #define DA7213_DMIC_CLK_RATE_MASK				(0x1 << 2)
+/* DA7213_PC_COUNT = 0x94 */
+#define DA7213_PC_FREERUN_MASK					(0x1 << 0)
 /* DA7213_DIG_CTRL = 0x99 */
 #define DA7213_DAC_L_INV_SHIFT					3
 #define DA7213_DAC_R_INV_SHIFT					7
 #define DA7213_ALC_AVG_ITERATIONS	5
 /* PLL related */
-#define DA7213_SYSCLK_MCLK		0
+#define DA7213_SYSCLK_MCLK			0
-#define DA7213_SYSCLK_PLL		1
+#define DA7213_SYSCLK_PLL			1
-#define DA7213_PLL_FREQ_OUT_90316800	90316800
+#define DA7213_PLL_FREQ_OUT_90316800		90316800
-#define DA7213_PLL_FREQ_OUT_98304000	98304000
+#define DA7213_PLL_FREQ_OUT_98304000		98304000
-#define DA7213_PLL_FREQ_OUT_94310400	94310400
+#define DA7213_PLL_FREQ_OUT_94310400		94310400
-#define DA7213_PLL_INDIV_5_10_MHZ_VAL	2
+#define DA7213_PLL_INDIV_5_TO_9_MHZ_VAL		2
-#define DA7213_PLL_INDIV_10_20_MHZ_VAL	4
+#define DA7213_PLL_INDIV_9_TO_18_MHZ_VAL	4
-#define DA7213_PLL_INDIV_20_40_MHZ_VAL	8
+#define DA7213_PLL_INDIV_18_TO_36_MHZ_VAL	8
-#define DA7213_PLL_INDIV_40_54_MHZ_VAL	16
+#define DA7213_PLL_INDIV_36_TO_54_MHZ_VAL	16
+#define DA7213_SRM_CHECK_RETRIES		8
 enum da7213_clk_src {
 	DA7213_CLKSRC_MCLK = 0,

sound/soc/codecs/da7218.c+16−16

@@ -1868,27 +1868,27 @@ static int da7218_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, · 1867 unmodified lines
1868		1868
1869	/* Verify 32KHz, 2MHz - 54MHz MCLK provided, and set input divider */	1869	/* Verify 32KHz, 2MHz - 54MHz MCLK provided, and set input divider */
1870	if (da7218->mclk_rate == 32768) {	1870	if (da7218->mclk_rate == 32768) {
1871	indiv_bits = DA7218_PLL_INDIV_2_5_MHZ;	1871	indiv_bits = DA7218_PLL_INDIV_9_TO_18_MHZ;
1872	indiv = DA7218_PLL_INDIV_2_10_MHZ_VAL;	1872	indiv = DA7218_PLL_INDIV_9_TO_18_MHZ_VAL;
1873	} else if (da7218->mclk_rate < 2000000) {	1873	} else if (da7218->mclk_rate < 2000000) {
1874	dev_err(codec->dev, "PLL input clock %d below valid range\n",	1874	dev_err(codec->dev, "PLL input clock %d below valid range\n",
1875	da7218->mclk_rate);	1875	da7218->mclk_rate);
1876	return -EINVAL;	1876	return -EINVAL;
1877	} else if (da7218->mclk_rate <= 5000000) {	1877	} else if (da7218->mclk_rate <= 4500000) {
1878	indiv_bits = DA7218_PLL_INDIV_2_5_MHZ;	1878	indiv_bits = DA7218_PLL_INDIV_2_TO_4_5_MHZ;
1879	indiv = DA7218_PLL_INDIV_2_10_MHZ_VAL;	1879	indiv = DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL;
1880	} else if (da7218->mclk_rate <= 10000000) {	1880	} else if (da7218->mclk_rate <= 9000000) {
1881	indiv_bits = DA7218_PLL_INDIV_5_10_MHZ;	1881	indiv_bits = DA7218_PLL_INDIV_4_5_TO_9_MHZ;
1882	indiv = DA7218_PLL_INDIV_2_10_MHZ_VAL;	1882	indiv = DA7218_PLL_INDIV_4_5_TO_9_MHZ_VAL;
1883	} else if (da7218->mclk_rate <= 20000000) {	1883	} else if (da7218->mclk_rate <= 18000000) {
1884	indiv_bits = DA7218_PLL_INDIV_10_20_MHZ;	1884	indiv_bits = DA7218_PLL_INDIV_9_TO_18_MHZ;
1885	indiv = DA7218_PLL_INDIV_10_20_MHZ_VAL;	1885	indiv = DA7218_PLL_INDIV_9_TO_18_MHZ_VAL;
1886	} else if (da7218->mclk_rate <= 40000000) {	1886	} else if (da7218->mclk_rate <= 36000000) {
1887	indiv_bits = DA7218_PLL_INDIV_20_40_MHZ;	1887	indiv_bits = DA7218_PLL_INDIV_18_TO_36_MHZ;
1888	indiv = DA7218_PLL_INDIV_20_40_MHZ_VAL;	1888	indiv = DA7218_PLL_INDIV_18_TO_36_MHZ_VAL;
1889	} else if (da7218->mclk_rate <= 54000000) {	1889	} else if (da7218->mclk_rate <= 54000000) {
1890	indiv_bits = DA7218_PLL_INDIV_40_54_MHZ;	1890	indiv_bits = DA7218_PLL_INDIV_36_TO_54_MHZ;
1891	indiv = DA7218_PLL_INDIV_40_54_MHZ_VAL;	1891	indiv = DA7218_PLL_INDIV_36_TO_54_MHZ_VAL;
1892	} else {	1892	} else {
1893	dev_err(codec->dev, "PLL input clock %d above valid range\n",	1893	dev_err(codec->dev, "PLL input clock %d above valid range\n",
1894	da7218->mclk_rate);	1894	da7218->mclk_rate);

sound/soc/codecs/da7218.h+12−9

 /* DA7218_PLL_CTRL = 0x91 */
 #define DA7218_PLL_INDIV_SHIFT		0
 #define DA7218_PLL_INDIV_MASK		(0x7 << 0)
-#define DA7218_PLL_INDIV_2_5_MHZ	(0x0 << 0)
+#define DA7218_PLL_INDIV_2_TO_4_5_MHZ	(0x0 << 0)
-#define DA7218_PLL_INDIV_5_10_MHZ	(0x1 << 0)
+#define DA7218_PLL_INDIV_4_5_TO_9_MHZ	(0x1 << 0)
-#define DA7218_PLL_INDIV_10_20_MHZ	(0x2 << 0)
+#define DA7218_PLL_INDIV_9_TO_18_MHZ	(0x2 << 0)
-#define DA7218_PLL_INDIV_20_40_MHZ	(0x3 << 0)
+#define DA7218_PLL_INDIV_18_TO_36_MHZ	(0x3 << 0)
-#define DA7218_PLL_INDIV_40_54_MHZ	(0x4 << 0)
+#define DA7218_PLL_INDIV_36_TO_54_MHZ	(0x4 << 0)
-#define DA7218_PLL_INDIV_2_10_MHZ_VAL	2
-#define DA7218_PLL_INDIV_10_20_MHZ_VAL	4
-#define DA7218_PLL_INDIV_20_40_MHZ_VAL	8
-#define DA7218_PLL_INDIV_40_54_MHZ_VAL	16
 #define DA7218_PLL_MCLK_SQR_EN_SHIFT	4
 #define DA7218_PLL_MCLK_SQR_EN_MASK	(0x1 << 4)
 #define DA7218_PLL_MODE_SHIFT		6
 #define DA7218_PLL_FREQ_OUT_90316	90316800
 #define DA7218_PLL_FREQ_OUT_98304	98304000
+/* PLL Frequency Dividers */
+#define DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL	1
+#define DA7218_PLL_INDIV_4_5_TO_9_MHZ_VAL	2
+#define DA7218_PLL_INDIV_9_TO_18_MHZ_VAL	4
+#define DA7218_PLL_INDIV_18_TO_36_MHZ_VAL	8
+#define DA7218_PLL_INDIV_36_TO_54_MHZ_VAL	16
 /* ALC Calibration */
 #define DA7218_ALC_CALIB_DELAY_MIN	2500
 #define DA7218_ALC_CALIB_DELAY_MAX	5000

sound/soc/codecs/da7219.c+23−15

  * option) any later version.
  */
+#include <linux/acpi.h>
 #include <linux/clk.h>
 #include <linux/i2c.h>
 #include <linux/of_device.h>
 	if ((da7219->clk_src == clk_id) && (da7219->mclk_rate == freq))
 		return 0;
-	if (((freq < 2000000) && (freq != 32768)) || (freq > 54000000)) {
+	if ((freq < 2000000) || (freq > 54000000)) {
 		dev_err(codec_dai->dev, "Unsupported MCLK value %d\n",
 			freq);
 		return -EINVAL;
 		dev_err(codec->dev, "PLL input clock %d below valid range\n",
 			da7219->mclk_rate);
 		return -EINVAL;
-	} else if (da7219->mclk_rate <= 5000000) {
+	} else if (da7219->mclk_rate <= 4500000) {
-		indiv_bits = DA7219_PLL_INDIV_2_5_MHZ;
+		indiv_bits = DA7219_PLL_INDIV_2_TO_4_5_MHZ;
-		indiv = DA7219_PLL_INDIV_2_5_MHZ_VAL;
+		indiv = DA7219_PLL_INDIV_2_TO_4_5_MHZ_VAL;
-	} else if (da7219->mclk_rate <= 10000000) {
+	} else if (da7219->mclk_rate <= 9000000) {
-		indiv_bits = DA7219_PLL_INDIV_5_10_MHZ;
+		indiv_bits = DA7219_PLL_INDIV_4_5_TO_9_MHZ;
-		indiv = DA7219_PLL_INDIV_5_10_MHZ_VAL;
+		indiv = DA7219_PLL_INDIV_4_5_TO_9_MHZ_VAL;
-	} else if (da7219->mclk_rate <= 20000000) {
+	} else if (da7219->mclk_rate <= 18000000) {
-		indiv_bits = DA7219_PLL_INDIV_10_20_MHZ;
+		indiv_bits = DA7219_PLL_INDIV_9_TO_18_MHZ;
-		indiv = DA7219_PLL_INDIV_10_20_MHZ_VAL;
+		indiv = DA7219_PLL_INDIV_9_TO_18_MHZ_VAL;
-	} else if (da7219->mclk_rate <= 40000000) {
+	} else if (da7219->mclk_rate <= 36000000) {
-		indiv_bits = DA7219_PLL_INDIV_20_40_MHZ;
+		indiv_bits = DA7219_PLL_INDIV_18_TO_36_MHZ;
-		indiv = DA7219_PLL_INDIV_20_40_MHZ_VAL;
+		indiv = DA7219_PLL_INDIV_18_TO_36_MHZ_VAL;
 	} else if (da7219->mclk_rate <= 54000000) {
-		indiv_bits = DA7219_PLL_INDIV_40_54_MHZ;
+		indiv_bits = DA7219_PLL_INDIV_36_TO_54_MHZ;
-		indiv = DA7219_PLL_INDIV_40_54_MHZ_VAL;
+		indiv = DA7219_PLL_INDIV_36_TO_54_MHZ_VAL;
 	} else {
 		dev_err(codec->dev, "PLL input clock %d above valid range\n",
 			da7219->mclk_rate);
 };
 MODULE_DEVICE_TABLE(of, da7219_of_match);
+static const struct acpi_device_id da7219_acpi_match[] = {
+	{ .id = "DLGS7219", },
+	{ }
+};
+MODULE_DEVICE_TABLE(acpi, da7219_acpi_match);
 static enum da7219_micbias_voltage
 	da7219_of_micbias_lvl(struct snd_soc_codec *codec, u32 val)
 {
 	.driver = {
 		.name = "da7219",
 		.of_match_table = of_match_ptr(da7219_of_match),
+		.acpi_match_table = ACPI_PTR(da7219_acpi_match),
 	},
 	.probe		= da7219_i2c_probe,
 	.remove		= da7219_i2c_remove,

sound/soc/codecs/da7219.h+10−10

@@ -194,11 +194,11 @@ · 193 unmodified lines
194	/* DA7219_PLL_CTRL = 0x20 */	194	/* DA7219_PLL_CTRL = 0x20 */
195	#define DA7219_PLL_INDIV_SHIFT 2	195	#define DA7219_PLL_INDIV_SHIFT 2
196	#define DA7219_PLL_INDIV_MASK (0x7 << 2)	196	#define DA7219_PLL_INDIV_MASK (0x7 << 2)
197	#define DA7219_PLL_INDIV_2_5_MHZ (0x0 << 2)	197	#define DA7219_PLL_INDIV_2_TO_4_5_MHZ (0x0 << 2)
198	#define DA7219_PLL_INDIV_5_10_MHZ (0x1 << 2)	198	#define DA7219_PLL_INDIV_4_5_TO_9_MHZ (0x1 << 2)
199	#define DA7219_PLL_INDIV_10_20_MHZ (0x2 << 2)	199	#define DA7219_PLL_INDIV_9_TO_18_MHZ (0x2 << 2)
200	#define DA7219_PLL_INDIV_20_40_MHZ (0x3 << 2)	200	#define DA7219_PLL_INDIV_18_TO_36_MHZ (0x3 << 2)
201	#define DA7219_PLL_INDIV_40_54_MHZ (0x4 << 2)	201	#define DA7219_PLL_INDIV_36_TO_54_MHZ (0x4 << 2)
202	#define DA7219_PLL_MCLK_SQR_EN_SHIFT 5	202	#define DA7219_PLL_MCLK_SQR_EN_SHIFT 5
203	#define DA7219_PLL_MCLK_SQR_EN_MASK (0x1 << 5)	203	#define DA7219_PLL_MCLK_SQR_EN_MASK (0x1 << 5)
204	#define DA7219_PLL_MODE_SHIFT 6	204	#define DA7219_PLL_MODE_SHIFT 6
@@ -761,11 +761,11 @@ · 556 unmodified lines
761	#define DA7219_PLL_FREQ_OUT_98304 98304000	761	#define DA7219_PLL_FREQ_OUT_98304 98304000
762		762
763	/* PLL Frequency Dividers */	763	/* PLL Frequency Dividers */
764	#define DA7219_PLL_INDIV_2_5_MHZ_VAL 1	764	#define DA7219_PLL_INDIV_2_TO_4_5_MHZ_VAL 1
765	#define DA7219_PLL_INDIV_5_10_MHZ_VAL 2	765	#define DA7219_PLL_INDIV_4_5_TO_9_MHZ_VAL 2
766	#define DA7219_PLL_INDIV_10_20_MHZ_VAL 4	766	#define DA7219_PLL_INDIV_9_TO_18_MHZ_VAL 4
767	#define DA7219_PLL_INDIV_20_40_MHZ_VAL 8	767	#define DA7219_PLL_INDIV_18_TO_36_MHZ_VAL 8
768	#define DA7219_PLL_INDIV_40_54_MHZ_VAL 16	768	#define DA7219_PLL_INDIV_36_TO_54_MHZ_VAL 16
769		769
770	/* SRM */	770	/* SRM */
771	#define DA7219_SRM_CHECK_RETRIES 8	771	#define DA7219_SRM_CHECK_RETRIES 8

sound/soc/codecs/es8328.c+149−45

@@ -26,18 +26,30 @@ · 25 unmodified lines
26	#include <sound/tlv.h>	26	#include <sound/tlv.h>
27	#include "es8328.h"	27	#include "es8328.h"
28		28
29	#define ES8328_SYSCLK_RATE_1X 11289600	29	static const unsigned int rates_12288[] = {
30	#define ES8328_SYSCLK_RATE_2X 22579200	30	8000, 12000, 16000, 24000, 32000, 48000, 96000,
		31	};
31		32
32	/* Run the codec at 22.5792 or 11.2896 MHz to support these rates */	33	static const int ratios_12288[] = {
33	static struct {	34	10, 7, 6, 4, 3, 2, 0,
34	int rate;	35	};
35	u8 ratio;	36
36	} mclk_ratios[] = {	37	static const struct snd_pcm_hw_constraint_list constraints_12288 = {
37	{ 8000, 9 },	38	.count = ARRAY_SIZE(rates_12288),
38	{11025, 7 },	39	.list = rates_12288,
39	{22050, 4 },	40	};
40	{44100, 2 },	41
		42	static const unsigned int rates_11289[] = {
		43	8018, 11025, 22050, 44100, 88200,
		44	};
		45
		46	static const int ratios_11289[] = {
		47	9, 7, 4, 2, 0,
		48	};
		49
		50	static const struct snd_pcm_hw_constraint_list constraints_11289 = {
		51	.count = ARRAY_SIZE(rates_11289),
		52	.list = rates_11289,
41	};	53	};
42		54
43	/* regulator supplies for sgtl5000, VDDD is an optional external supply */	55	/* regulator supplies for sgtl5000, VDDD is an optional external supply */
@@ -57,16 +69,28 @@ static const char * const supply_names[ES8328_SUPPLY_NUM] = { · 13 unmodified lines
57	"HPVDD",	69	"HPVDD",
58	};	70	};
59		71
60	#define ES8328_RATES (SNDRV_PCM_RATE_44100 \| \	72	#define ES8328_RATES (SNDRV_PCM_RATE_96000 \| \
		73	SNDRV_PCM_RATE_48000 \| \
		74	SNDRV_PCM_RATE_44100 \| \
		75	SNDRV_PCM_RATE_32000 \| \
61	SNDRV_PCM_RATE_22050 \| \	76	SNDRV_PCM_RATE_22050 \| \
62	SNDRV_PCM_RATE_11025)	77	SNDRV_PCM_RATE_16000 \| \
63	#define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE)	78	SNDRV_PCM_RATE_11025 \| \
		79	SNDRV_PCM_RATE_8000)
		80	#define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \| \
		81	SNDRV_PCM_FMTBIT_S18_3LE \| \
		82	SNDRV_PCM_FMTBIT_S20_3LE \| \
		83	SNDRV_PCM_FMTBIT_S24_LE \| \
		84	SNDRV_PCM_FMTBIT_S32_LE)
64		85
65	struct es8328_priv {	86	struct es8328_priv {
66	struct regmap *regmap;	87	struct regmap *regmap;
67	struct clk *clk;	88	struct clk *clk;
68	int playback_fs;	89	int playback_fs;
69	bool deemph;	90	bool deemph;
		91	int mclkdiv2;
		92	const struct snd_pcm_hw_constraint_list *sysclk_constraints;
		93	const int *mclk_ratios;
70	struct regulator_bulk_data supplies[ES8328_SUPPLY_NUM];	94	struct regulator_bulk_data supplies[ES8328_SUPPLY_NUM];
71	};	95	};
72		96
@@ -439,54 +463,131 @@ static int es8328_mute(struct snd_soc_dai *dai, int mute) · 366 unmodified lines
439	mute ? ES8328_DACCONTROL3_DACMUTE : 0);	463	mute ? ES8328_DACCONTROL3_DACMUTE : 0);
440	}	464	}
441		465
		466	static int es8328_startup(struct snd_pcm_substream *substream,
		467	struct snd_soc_dai *dai)
		468	{
		469	struct snd_soc_codec *codec = dai->codec;
		470	struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec);
		471
		472	if (es8328->sysclk_constraints)
		473	snd_pcm_hw_constraint_list(substream->runtime, 0,
		474	SNDRV_PCM_HW_PARAM_RATE,
		475	es8328->sysclk_constraints);
		476
		477	return 0;
		478	}
		479
442	static int es8328_hw_params(struct snd_pcm_substream *substream,	480	static int es8328_hw_params(struct snd_pcm_substream *substream,
443	struct snd_pcm_hw_params *params,	481	struct snd_pcm_hw_params *params,
444	struct snd_soc_dai *dai)	482	struct snd_soc_dai *dai)
445	{	483	{
446	struct snd_soc_codec *codec = dai->codec;	484	struct snd_soc_codec *codec = dai->codec;
447	struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec);	485	struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec);
448	int clk_rate;
449	int i;	486	int i;
450	int reg;	487	int reg;
451	u8 ratio;	488	int wl;
		489	int ratio;
		490
		491	if (!es8328->sysclk_constraints) {
		492	dev_err(codec->dev, "No MCLK configured\n");
		493	return -EINVAL;
		494	}
452		495
453	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)	496	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
454	reg = ES8328_DACCONTROL2;	497	reg = ES8328_DACCONTROL2;
455	else	498	else
456	reg = ES8328_ADCCONTROL5;	499	reg = ES8328_ADCCONTROL5;
457		500
458	clk_rate = clk_get_rate(es8328->clk);	501	for (i = 0; i < es8328->sysclk_constraints->count; i++)
		502	if (es8328->sysclk_constraints->list[i] == params_rate(params))
		503	break;
459		504
460	if ((clk_rate != ES8328_SYSCLK_RATE_1X) &&	505	if (i == es8328->sysclk_constraints->count) {
461	(clk_rate != ES8328_SYSCLK_RATE_2X)) {	506	dev_err(codec->dev, "LRCLK %d unsupported with current clock\n",
462	dev_err(codec->dev,	507	params_rate(params));
463	"%s: clock is running at %d Hz, not %d or %d Hz\n",
464	__func__, clk_rate,
465	ES8328_SYSCLK_RATE_1X, ES8328_SYSCLK_RATE_2X);
466	return -EINVAL;	508	return -EINVAL;
467	}	509	}
468		510
469	/* find master mode MCLK to sampling frequency ratio */	511	ratio = es8328->mclk_ratios[i];
470	ratio = mclk_ratios[0].rate;	512	snd_soc_update_bits(codec, ES8328_MASTERMODE,
471	for (i = 1; i < ARRAY_SIZE(mclk_ratios); i++)	513	ES8328_MASTERMODE_MCLKDIV2,
472	if (params_rate(params) <= mclk_ratios[i].rate)	514	es8328->mclkdiv2 ? ES8328_MASTERMODE_MCLKDIV2 : 0);
473	ratio = mclk_ratios[i].ratio;	515
		516	switch (params_width(params)) {
		517	case 16:
		518	wl = 3;
		519	break;
		520	case 18:
		521	wl = 2;
		522	break;
		523	case 20:
		524	wl = 1;
		525	break;
		526	case 24:
		527	wl = 0;
		528	break;
		529	case 32:
		530	wl = 4;
		531	break;
		532	default:
		533	return -EINVAL;
		534	}
474		535
475	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {	536	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
		537	snd_soc_update_bits(codec, ES8328_DACCONTROL1,
		538	ES8328_DACCONTROL1_DACWL_MASK,
		539	wl << ES8328_DACCONTROL1_DACWL_SHIFT);
		540
476	es8328->playback_fs = params_rate(params);	541	es8328->playback_fs = params_rate(params);
477	es8328_set_deemph(codec);	542	es8328_set_deemph(codec);
478	}	543	} else
		544	snd_soc_update_bits(codec, ES8328_ADCCONTROL4,
		545	ES8328_ADCCONTROL4_ADCWL_MASK,
		546	wl << ES8328_ADCCONTROL4_ADCWL_SHIFT);
479		547
480	return snd_soc_update_bits(codec, reg, ES8328_RATEMASK, ratio);	548	return snd_soc_update_bits(codec, reg, ES8328_RATEMASK, ratio);
481	}	549	}
482		550
		551	static int es8328_set_sysclk(struct snd_soc_dai *codec_dai,
		552	int clk_id, unsigned int freq, int dir)
		553	{
		554	struct snd_soc_codec *codec = codec_dai->codec;
		555	struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec);
		556	int mclkdiv2 = 0;
		557
		558	switch (freq) {
		559	case 0:
		560	es8328->sysclk_constraints = NULL;
		561	es8328->mclk_ratios = NULL;
		562	break;
		563	case 22579200:
		564	mclkdiv2 = 1;
		565	/* fallthru */
		566	case 11289600:
		567	es8328->sysclk_constraints = &constraints_11289;
		568	es8328->mclk_ratios = ratios_11289;
		569	break;
		570	case 24576000:
		571	mclkdiv2 = 1;
		572	/* fallthru */
		573	case 12288000:
		574	es8328->sysclk_constraints = &constraints_12288;
		575	es8328->mclk_ratios = ratios_12288;
		576	break;
		577	default:
		578	return -EINVAL;
		579	}
		580
		581	es8328->mclkdiv2 = mclkdiv2;
		582	return 0;
		583	}
		584
483	static int es8328_set_dai_fmt(struct snd_soc_dai *codec_dai,	585	static int es8328_set_dai_fmt(struct snd_soc_dai *codec_dai,
484	unsigned int fmt)	586	unsigned int fmt)
485	{	587	{
486	struct snd_soc_codec *codec = codec_dai->codec;	588	struct snd_soc_codec *codec = codec_dai->codec;
487	struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec);	589	u8 dac_mode = 0;
488	int clk_rate;	590	u8 adc_mode = 0;
489	u8 mode = ES8328_DACCONTROL1_DACWL_16;
490		591
491	/* set master/slave audio interface */	592	/* set master/slave audio interface */
492	if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBM_CFM)	593	if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBM_CFM)
@@ -495,13 +596,16 @@ static int es8328_set_dai_fmt(struct snd_soc_dai *codec_dai, · 2 unmodified lines
495	/* interface format */	596	/* interface format */
496	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {	597	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
497	case SND_SOC_DAIFMT_I2S:	598	case SND_SOC_DAIFMT_I2S:
498	mode \|= ES8328_DACCONTROL1_DACFORMAT_I2S;	599	dac_mode \|= ES8328_DACCONTROL1_DACFORMAT_I2S;
		600	adc_mode \|= ES8328_ADCCONTROL4_ADCFORMAT_I2S;
499	break;	601	break;
500	case SND_SOC_DAIFMT_RIGHT_J:	602	case SND_SOC_DAIFMT_RIGHT_J:
501	mode \|= ES8328_DACCONTROL1_DACFORMAT_RJUST;	603	dac_mode \|= ES8328_DACCONTROL1_DACFORMAT_RJUST;
		604	adc_mode \|= ES8328_ADCCONTROL4_ADCFORMAT_RJUST;
502	break;	605	break;
503	case SND_SOC_DAIFMT_LEFT_J:	606	case SND_SOC_DAIFMT_LEFT_J:
504	mode \|= ES8328_DACCONTROL1_DACFORMAT_LJUST;	607	dac_mode \|= ES8328_DACCONTROL1_DACFORMAT_LJUST;
		608	adc_mode \|= ES8328_ADCCONTROL4_ADCFORMAT_LJUST;
505	break;	609	break;
506	default:	610	default:
507	return -EINVAL;	611	return -EINVAL;
@@ -511,18 +615,14 @@ static int es8328_set_dai_fmt(struct snd_soc_dai *codec_dai, · 3 unmodified lines
511	if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF)	615	if ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF)
512	return -EINVAL;	616	return -EINVAL;
513		617
514	snd_soc_write(codec, ES8328_DACCONTROL1, mode);	618	snd_soc_update_bits(codec, ES8328_DACCONTROL1,
515	snd_soc_write(codec, ES8328_ADCCONTROL4, mode);	619	ES8328_DACCONTROL1_DACFORMAT_MASK, dac_mode);
		620	snd_soc_update_bits(codec, ES8328_ADCCONTROL4,
		621	ES8328_ADCCONTROL4_ADCFORMAT_MASK, adc_mode);
516		622
517	/* Master serial port mode, with BCLK generated automatically */	623	/* Master serial port mode, with BCLK generated automatically */
518	clk_rate = clk_get_rate(es8328->clk);	624	snd_soc_update_bits(codec, ES8328_MASTERMODE,
519	if (clk_rate == ES8328_SYSCLK_RATE_1X)	625	ES8328_MASTERMODE_MSC, ES8328_MASTERMODE_MSC);
520	snd_soc_write(codec, ES8328_MASTERMODE,
521	ES8328_MASTERMODE_MSC);
522	else
523	snd_soc_write(codec, ES8328_MASTERMODE,
524	ES8328_MASTERMODE_MCLKDIV2 \|
525	ES8328_MASTERMODE_MSC);
526		626
527	return 0;	627	return 0;
528	}	628	}
@@ -579,8 +679,10 @@ static int es8328_set_bias_level(struct snd_soc_codec *codec, · 50 unmodified lines
579	}	679	}
580		680
581	static const struct snd_soc_dai_ops es8328_dai_ops = {	681	static const struct snd_soc_dai_ops es8328_dai_ops = {
		682	.startup = es8328_startup,
582	.hw_params = es8328_hw_params,	683	.hw_params = es8328_hw_params,
583	.digital_mute = es8328_mute,	684	.digital_mute = es8328_mute,
		685	.set_sysclk = es8328_set_sysclk,
584	.set_fmt = es8328_set_dai_fmt,	686	.set_fmt = es8328_set_dai_fmt,
585	};	687	};
586		688
@@ -601,6 +703,7 @@ static struct snd_soc_dai_driver es8328_dai = { · 14 unmodified lines
601	.formats = ES8328_FORMATS,	703	.formats = ES8328_FORMATS,
602	},	704	},
603	.ops = &es8328_dai_ops,	705	.ops = &es8328_dai_ops,
		706	.symmetric_rates = 1,
604	};	707	};
605		708
606	static int es8328_suspend(struct snd_soc_codec *codec)	709	static int es8328_suspend(struct snd_soc_codec *codec)
@@ -708,6 +811,7 @@ const struct regmap_config es8328_regmap_config = { · 101 unmodified lines
708	.val_bits = 8,	811	.val_bits = 8,
709	.max_register = ES8328_REG_MAX,	812	.max_register = ES8328_REG_MAX,
710	.cache_type = REGCACHE_RBTREE,	813	.cache_type = REGCACHE_RBTREE,
		814	.use_single_rw = true,
711	};	815	};
712	EXPORT_SYMBOL_GPL(es8328_regmap_config);	816	EXPORT_SYMBOL_GPL(es8328_regmap_config);
713		817

sound/soc/codecs/es8328.h+17−6

 #define ES8328_CONTROL1_VMIDSEL_50k (1 << 0)
 #define ES8328_CONTROL1_VMIDSEL_500k (2 << 0)
 #define ES8328_CONTROL1_VMIDSEL_5k (3 << 0)
-#define ES8328_CONTROL1_VMIDSEL_MASK (7 << 0)
+#define ES8328_CONTROL1_VMIDSEL_MASK (3 << 0)
 #define ES8328_CONTROL1_ENREF (1 << 2)
 #define ES8328_CONTROL1_SEQEN (1 << 3)
 #define ES8328_CONTROL1_SAMEFS (1 << 4)
 #define ES8328_ADCCONTROL1	0x09
 #define ES8328_ADCCONTROL2	0x0a
 #define ES8328_ADCCONTROL3	0x0b
 #define ES8328_ADCCONTROL4	0x0c
+#define ES8328_ADCCONTROL4_ADCFORMAT_MASK (3 << 0)
+#define ES8328_ADCCONTROL4_ADCFORMAT_I2S (0 << 0)
+#define ES8328_ADCCONTROL4_ADCFORMAT_LJUST (1 << 0)
+#define ES8328_ADCCONTROL4_ADCFORMAT_RJUST (2 << 0)
+#define ES8328_ADCCONTROL4_ADCFORMAT_PCM (3 << 0)
+#define ES8328_ADCCONTROL4_ADCWL_SHIFT 2
+#define ES8328_ADCCONTROL4_ADCWL_MASK (7 << 2)
+#define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_NORMAL (0 << 5)
+#define ES8328_ADCCONTROL4_ADCLRP_I2S_POL_INV (1 << 5)
+#define ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK2 (0 << 5)
+#define ES8328_ADCCONTROL4_ADCLRP_PCM_MSB_CLK1 (1 << 5)
 #define ES8328_ADCCONTROL5	0x0d
 #define ES8328_ADCCONTROL5_RATEMASK (0x1f << 0)
 #define ES8328_ADCCONTROL14	0x16
 #define ES8328_DACCONTROL1	0x17
+#define ES8328_DACCONTROL1_DACFORMAT_MASK (3 << 1)
 #define ES8328_DACCONTROL1_DACFORMAT_I2S (0 << 1)
 #define ES8328_DACCONTROL1_DACFORMAT_LJUST (1 << 1)
 #define ES8328_DACCONTROL1_DACFORMAT_RJUST (2 << 1)
 #define ES8328_DACCONTROL1_DACFORMAT_PCM (3 << 1)
-#define ES8328_DACCONTROL1_DACWL_24 (0 << 3)
+#define ES8328_DACCONTROL1_DACWL_SHIFT 3
-#define ES8328_DACCONTROL1_DACWL_20 (1 << 3)
+#define ES8328_DACCONTROL1_DACWL_MASK (7 << 3)
-#define ES8328_DACCONTROL1_DACWL_18 (2 << 3)
-#define ES8328_DACCONTROL1_DACWL_16 (3 << 3)
-#define ES8328_DACCONTROL1_DACWL_32 (4 << 3)
 #define ES8328_DACCONTROL1_DACLRP_I2S_POL_NORMAL (0 << 6)
 #define ES8328_DACCONTROL1_DACLRP_I2S_POL_INV (1 << 6)
 #define ES8328_DACCONTROL1_DACLRP_PCM_MSB_CLK2 (0 << 6)

sound/soc/codecs/hdac_hdmi.c+184−11

 #include <sound/hdaudio_ext.h>
 #include <sound/hda_i915.h>
 #include <sound/pcm_drm_eld.h>
+#include <sound/hda_chmap.h>
 #include "../../hda/local.h"
 #include "hdac_hdmi.h"
 	struct hdac_hdmi_cvt_params params;
 };
+/* Currently only spk_alloc, more to be added */
+struct hdac_hdmi_parsed_eld {
+	u8 spk_alloc;
+};
 struct hdac_hdmi_eld {
 	bool	monitor_present;
 	bool	eld_valid;
 	int	eld_size;
 	char    eld_buffer[ELD_MAX_SIZE];
+	struct	hdac_hdmi_parsed_eld info;
 };
 struct hdac_hdmi_pin {
 	struct hdac_ext_device *edev;
 	int repoll_count;
 	struct delayed_work work;
+	struct mutex lock;
+	bool chmap_set;
+	unsigned char chmap[8]; /* ALSA API channel-map */
+	int channels; /* current number of channels */
 };
 struct hdac_hdmi_pcm {
 	int num_pin;
 	int num_cvt;
 	struct mutex pin_mutex;
+	struct hdac_chmap chmap;
 };
+static struct hdac_hdmi_pcm *get_hdmi_pcm_from_id(struct hdac_hdmi_priv *hdmi,
+						int pcm_idx)
+{
+	struct hdac_hdmi_pcm *pcm;
+	list_for_each_entry(pcm, &hdmi->pcm_list, head) {
+		if (pcm->pcm_id == pcm_idx)
+			return pcm;
+	}
+	return NULL;
+}
 static inline struct hdac_ext_device *to_hda_ext_device(struct device *dev)
 {
 	struct hdac_device *hdac = dev_to_hdac_dev(dev);
 	int i;
 	const u8 *eld_buf;
 	u8 conn_type;
-	int channels = 2;
+	int channels, ca;
 	list_for_each_entry(pin, &hdmi->pin_list, head) {
 		if (pin->nid == pin_nid)
 			break;
 	}
+	ca = snd_hdac_channel_allocation(&hdac->hdac, pin->eld.info.spk_alloc,
+			pin->channels, pin->chmap_set, true, pin->chmap);
+	channels = snd_hdac_get_active_channels(ca);
+	hdmi->chmap.ops.set_channel_count(&hdac->hdac, cvt_nid, channels);
+	snd_hdac_setup_channel_mapping(&hdmi->chmap, pin->nid, false, ca,
+				pin->channels, pin->chmap, pin->chmap_set);
 	eld_buf = pin->eld.eld_buffer;
 	conn_type = drm_eld_get_conn_type(eld_buf);
-	/* setup channel count */
-	snd_hdac_codec_write(&hdac->hdac, cvt_nid, 0,
-			    AC_VERB_SET_CVT_CHAN_COUNT, channels - 1);
 	switch (conn_type) {
 	case DRM_ELD_CONN_TYPE_HDMI:
 		hdmi_audio_infoframe_init(&frame);
-		/* Default stereo for now */
 		frame.channels = channels;
+		frame.channel_allocation = ca;
 		ret = hdmi_audio_infoframe_pack(&frame, buffer, sizeof(buffer));
 		if (ret < 0)
 		dp_ai.len	= 0x1b;
 		dp_ai.ver	= 0x11 << 2;
 		dp_ai.CC02_CT47	= channels - 1;
-		dp_ai.CA	= 0;
+		dp_ai.CA	= ca;
 		dip = (u8 *)&dp_ai;
 		break;
 	struct hdac_ext_device *hdac = snd_soc_dai_get_drvdata(dai);
 	struct hdac_hdmi_priv *hdmi = hdac->private_data;
 	struct hdac_hdmi_dai_pin_map *dai_map;
+	struct hdac_hdmi_pin *pin;
 	struct hdac_ext_dma_params *dd;
 	int ret;
 	dai_map = &hdmi->dai_map[dai->id];
+	pin = dai_map->pin;
 	dd = (struct hdac_ext_dma_params *)snd_soc_dai_get_dma_data(dai, substream);
 	dev_dbg(&hdac->hdac.dev, "stream tag from cpu dai %d format in cvt 0x%x\n",
 			dd->stream_tag,	dd->format);
+	mutex_lock(&pin->lock);
+	pin->channels = substream->runtime->channels;
 	ret = hdac_hdmi_setup_audio_infoframe(hdac, dai_map->cvt->nid,
 						dai_map->pin->nid);
+	mutex_unlock(&pin->lock);
 	if (ret < 0)
 		return ret;
 		snd_hdac_codec_write(&hdac->hdac, dai_map->pin->nid, 0,
 			AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE);
+		mutex_lock(&dai_map->pin->lock);
+		dai_map->pin->chmap_set = false;
+		memset(dai_map->pin->chmap, 0, sizeof(dai_map->pin->chmap));
+		dai_map->pin->channels = 0;
+		mutex_unlock(&dai_map->pin->lock);
 		dai_map->pin = NULL;
 	}
 }
 static int
 hdac_hdmi_query_cvt_params(struct hdac_device *hdac, struct hdac_hdmi_cvt *cvt)
 {
+	unsigned int chans;
+	struct hdac_ext_device *edev = to_ehdac_device(hdac);
+	struct hdac_hdmi_priv *hdmi = edev->private_data;
 	int err;
-	/* Only stereo supported as of now */
+	chans = get_wcaps(hdac, cvt->nid);
-	cvt->params.channels_min = cvt->params.channels_max = 2;
+	chans = get_wcaps_channels(chans);
+	cvt->params.channels_min = 2;
+	cvt->params.channels_max = chans;
+	if (chans > hdmi->chmap.channels_max)
+		hdmi->chmap.channels_max = chans;
 	err = snd_hdac_query_supported_pcm(hdac, cvt->nid,
 			&cvt->params.rates,
 	return hdac_hdmi_query_cvt_params(&edev->hdac, cvt);
 }
+static void hdac_hdmi_parse_eld(struct hdac_ext_device *edev,
+			struct hdac_hdmi_pin *pin)
+{
+	pin->eld.info.spk_alloc = pin->eld.eld_buffer[DRM_ELD_SPEAKER];
+}
 static void hdac_hdmi_present_sense(struct hdac_hdmi_pin *pin, int repoll)
 {
 	struct hdac_ext_device *edev = pin->edev;
 				snd_jack_report(pcm->jack, SND_JACK_AVOUT);
 			}
+			hdac_hdmi_parse_eld(edev, pin);
 			print_hex_dump_bytes("ELD: ", DUMP_PREFIX_OFFSET,
 					pin->eld.eld_buffer, pin->eld.eld_size);
 	hdmi->num_pin++;
 	pin->edev = edev;
+	mutex_init(&pin->lock);
 	INIT_DELAYED_WORK(&pin->work, hdac_hdmi_repoll_eld);
 	return 0;
 	.pin_eld_notify	= hdac_hdmi_eld_notify_cb,
 };
+static struct snd_pcm *hdac_hdmi_get_pcm_from_id(struct snd_soc_card *card,
+						int device)
+{
+	struct snd_soc_pcm_runtime *rtd;
+	list_for_each_entry(rtd, &card->rtd_list, list) {
+		if (rtd->pcm && (rtd->pcm->device == device))
+			return rtd->pcm;
+	}
+	return NULL;
+}
 int hdac_hdmi_jack_init(struct snd_soc_dai *dai, int device)
 {
 	char jack_name[NAME_SIZE];
 		snd_soc_component_get_dapm(&codec->component);
 	struct hdac_hdmi_priv *hdmi = edev->private_data;
 	struct hdac_hdmi_pcm *pcm;
+	struct snd_pcm *snd_pcm;
+	int err;
 	/*
 	 * this is a new PCM device, create new pcm and
 	pcm->pcm_id = device;
 	pcm->cvt = hdmi->dai_map[dai->id].cvt;
+	snd_pcm = hdac_hdmi_get_pcm_from_id(dai->component->card, device);
+	if (snd_pcm) {
+		err = snd_hdac_add_chmap_ctls(snd_pcm, device, &hdmi->chmap);
+		if (err < 0) {
+			dev_err(&edev->hdac.dev,
+				"chmap control add failed with err: %d for pcm: %d\n",
+				err, device);
+			kfree(pcm);
+			return err;
+		}
+	}
 	list_add_tail(&pcm->head, &hdmi->pcm_list);
 	sprintf(jack_name, "HDMI/DP, pcm=%d Jack", device);
 	struct snd_soc_dapm_context *dapm =
 		snd_soc_component_get_dapm(&codec->component);
 	struct hdac_hdmi_pin *pin;
+	struct hdac_ext_link *hlink = NULL;
 	int ret;
 	edev->scodec = codec;
+	/*
+	 * hold the ref while we probe, also no need to drop the ref on
+	 * exit, we call pm_runtime_suspend() so that will do for us
+	 */
+	hlink = snd_hdac_ext_bus_get_link(edev->ebus, dev_name(&edev->hdac.dev));
+	snd_hdac_ext_bus_link_get(edev->ebus, hlink);
 	ret = create_fill_widget_route_map(dapm);
 	if (ret < 0)
 		return ret;
 	.idle_bias_off	= true,
 };
+static void hdac_hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
+					unsigned char *chmap)
+{
+	struct hdac_ext_device *edev = to_ehdac_device(hdac);
+	struct hdac_hdmi_priv *hdmi = edev->private_data;
+	struct hdac_hdmi_pcm *pcm = get_hdmi_pcm_from_id(hdmi, pcm_idx);
+	struct hdac_hdmi_pin *pin = pcm->pin;
+	/* chmap is already set to 0 in caller */
+	if (!pin)
+		return;
+	memcpy(chmap, pin->chmap, ARRAY_SIZE(pin->chmap));
+}
+static void hdac_hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
+				unsigned char *chmap, int prepared)
+{
+	struct hdac_ext_device *edev = to_ehdac_device(hdac);
+	struct hdac_hdmi_priv *hdmi = edev->private_data;
+	struct hdac_hdmi_pcm *pcm = get_hdmi_pcm_from_id(hdmi, pcm_idx);
+	struct hdac_hdmi_pin *pin = pcm->pin;
+	mutex_lock(&pin->lock);
+	pin->chmap_set = true;
+	memcpy(pin->chmap, chmap, ARRAY_SIZE(pin->chmap));
+	if (prepared)
+		hdac_hdmi_setup_audio_infoframe(edev, pcm->cvt->nid, pin->nid);
+	mutex_unlock(&pin->lock);
+}
+static bool is_hdac_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
+{
+	struct hdac_ext_device *edev = to_ehdac_device(hdac);
+	struct hdac_hdmi_priv *hdmi = edev->private_data;
+	struct hdac_hdmi_pcm *pcm = get_hdmi_pcm_from_id(hdmi, pcm_idx);
+	struct hdac_hdmi_pin *pin = pcm->pin;
+	return pin ? true:false;
+}
+static int hdac_hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
+{
+	struct hdac_ext_device *edev = to_ehdac_device(hdac);
+	struct hdac_hdmi_priv *hdmi = edev->private_data;
+	struct hdac_hdmi_pcm *pcm = get_hdmi_pcm_from_id(hdmi, pcm_idx);
+	struct hdac_hdmi_pin *pin = pcm->pin;
+	if (!pin || !pin->eld.eld_valid)
+		return 0;
+	return pin->eld.info.spk_alloc;
+}
 static int hdac_hdmi_dev_probe(struct hdac_ext_device *edev)
 {
 	struct hdac_device *codec = &edev->hdac;
 	struct hdac_hdmi_priv *hdmi_priv;
 	struct snd_soc_dai_driver *hdmi_dais = NULL;
+	struct hdac_ext_link *hlink = NULL;
 	int num_dais = 0;
 	int ret = 0;
+	/* hold the ref while we probe */
+	hlink = snd_hdac_ext_bus_get_link(edev->ebus, dev_name(&edev->hdac.dev));
+	snd_hdac_ext_bus_link_get(edev->ebus, hlink);
 	hdmi_priv = devm_kzalloc(&codec->dev, sizeof(*hdmi_priv), GFP_KERNEL);
 	if (hdmi_priv == NULL)
 		return -ENOMEM;
 	edev->private_data = hdmi_priv;
+	snd_hdac_register_chmap_ops(codec, &hdmi_priv->chmap);
+	hdmi_priv->chmap.ops.get_chmap = hdac_hdmi_get_chmap;
+	hdmi_priv->chmap.ops.set_chmap = hdac_hdmi_set_chmap;
+	hdmi_priv->chmap.ops.is_pcm_attached = is_hdac_hdmi_pcm_attached;
+	hdmi_priv->chmap.ops.get_spk_alloc = hdac_hdmi_get_spk_alloc;
 	dev_set_drvdata(&codec->dev, edev);
 	}
 	/* ASoC specific initialization */
-	return snd_soc_register_codec(&codec->dev, &hdmi_hda_codec,
+	ret = snd_soc_register_codec(&codec->dev, &hdmi_hda_codec,
-			hdmi_dais, num_dais);
+					hdmi_dais, num_dais);
+	snd_hdac_ext_bus_link_put(edev->ebus, hlink);
+	return ret;
 }
 static int hdac_hdmi_dev_remove(struct hdac_ext_device *edev)
 	struct hdac_ext_device *edev = to_hda_ext_device(dev);
 	struct hdac_device *hdac = &edev->hdac;
 	struct hdac_bus *bus = hdac->bus;
+	unsigned long timeout;
+	struct hdac_ext_bus *ebus = hbus_to_ebus(bus);
+	struct hdac_ext_link *hlink = NULL;
 	int err;
 	dev_dbg(dev, "Enter: %s\n", __func__);
 		return err;
 	}
+	hlink = snd_hdac_ext_bus_get_link(ebus, dev_name(dev));
+	snd_hdac_ext_bus_link_put(ebus, hlink);
 	return 0;
 }
 	struct hdac_ext_device *edev = to_hda_ext_device(dev);
 	struct hdac_device *hdac = &edev->hdac;
 	struct hdac_bus *bus = hdac->bus;
+	struct hdac_ext_bus *ebus = hbus_to_ebus(bus);
+	struct hdac_ext_link *hlink = NULL;
 	int err;
 	dev_dbg(dev, "Enter: %s\n", __func__);
 	if (!bus)
 		return 0;
+	hlink = snd_hdac_ext_bus_get_link(ebus, dev_name(dev));
+	snd_hdac_ext_bus_link_get(ebus, hlink);
 	err = snd_hdac_display_power(bus, true);
 	if (err < 0) {
 		dev_err(bus->dev, "Cannot turn on display power on i915\n");

sound/soc/codecs/hdmi-codec.c+432−0

@@ -0,0 +1,432 @@
	1	/*
	2	* ALSA SoC codec for HDMI encoder drivers
	3	* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
	4	* Author: Jyri Sarha <jsarha@ti.com>
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* version 2 as published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	13	* General Public License for more details.
	14	*/
	15	#include <linux/module.h>
	16	#include <linux/string.h>
	17	#include <sound/core.h>
	18	#include <sound/pcm.h>
	19	#include <sound/pcm_params.h>
	20	#include <sound/soc.h>
	21	#include <sound/pcm_drm_eld.h>
	22	#include <sound/hdmi-codec.h>
	23	#include <sound/pcm_iec958.h>
	24
	25	#include <drm/drm_crtc.h> /* This is only to get MAX_ELD_BYTES */
	26
	27	struct hdmi_codec_priv {
	28	struct hdmi_codec_pdata hcd;
	29	struct snd_soc_dai_driver *daidrv;
	30	struct hdmi_codec_daifmt daifmt[2];
	31	struct mutex current_stream_lock;
	32	struct snd_pcm_substream *current_stream;
	33	struct snd_pcm_hw_constraint_list ratec;
	34	uint8_t eld[MAX_ELD_BYTES];
	35	};
	36
	37	static const struct snd_soc_dapm_widget hdmi_widgets[] = {
	38	SND_SOC_DAPM_OUTPUT("TX"),
	39	};
	40
	41	static const struct snd_soc_dapm_route hdmi_routes[] = {
	42	{ "TX", NULL, "Playback" },
	43	};
	44
	45	enum {
	46	DAI_ID_I2S = 0,
	47	DAI_ID_SPDIF,
	48	};
	49
	50	static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
	51	struct snd_ctl_elem_info *uinfo)
	52	{
	53	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
	54	struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
	55
	56	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
	57	uinfo->count = sizeof(hcp->eld);
	58
	59	return 0;
	60	}
	61
	62	static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
	63	struct snd_ctl_elem_value *ucontrol)
	64	{
	65	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
	66	struct hdmi_codec_priv *hcp = snd_soc_component_get_drvdata(component);
	67
	68	memcpy(ucontrol->value.bytes.data, hcp->eld, sizeof(hcp->eld));
	69
	70	return 0;
	71	}
	72
	73	static const struct snd_kcontrol_new hdmi_controls[] = {
	74	{
	75	.access = SNDRV_CTL_ELEM_ACCESS_READ \|
	76	SNDRV_CTL_ELEM_ACCESS_VOLATILE,
	77	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
	78	.name = "ELD",
	79	.info = hdmi_eld_ctl_info,
	80	.get = hdmi_eld_ctl_get,
	81	},
	82	};
	83
	84	static int hdmi_codec_new_stream(struct snd_pcm_substream *substream,
	85	struct snd_soc_dai *dai)
	86	{
	87	struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
	88	int ret = 0;
	89
	90	mutex_lock(&hcp->current_stream_lock);
	91	if (!hcp->current_stream) {
	92	hcp->current_stream = substream;
	93	} else if (hcp->current_stream != substream) {
	94	dev_err(dai->dev, "Only one simultaneous stream supported!\n");
	95	ret = -EINVAL;
	96	}
	97	mutex_unlock(&hcp->current_stream_lock);
	98
	99	return ret;
	100	}
	101
	102	static int hdmi_codec_startup(struct snd_pcm_substream *substream,
	103	struct snd_soc_dai *dai)
	104	{
	105	struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
	106	int ret = 0;
	107
	108	dev_dbg(dai->dev, "%s()\n", __func__);
	109
	110	ret = hdmi_codec_new_stream(substream, dai);
	111	if (ret)
	112	return ret;
	113
	114	if (hcp->hcd.ops->audio_startup) {
	115	ret = hcp->hcd.ops->audio_startup(dai->dev->parent);
	116	if (ret) {
	117	mutex_lock(&hcp->current_stream_lock);
	118	hcp->current_stream = NULL;
	119	mutex_unlock(&hcp->current_stream_lock);
	120	return ret;
	121	}
	122	}
	123
	124	if (hcp->hcd.ops->get_eld) {
	125	ret = hcp->hcd.ops->get_eld(dai->dev->parent, hcp->eld,
	126	sizeof(hcp->eld));
	127
	128	if (!ret) {
	129	ret = snd_pcm_hw_constraint_eld(substream->runtime,
	130	hcp->eld);
	131	if (ret)
	132	return ret;
	133	}
	134	}
	135	return 0;
	136	}
	137
	138	static void hdmi_codec_shutdown(struct snd_pcm_substream *substream,
	139	struct snd_soc_dai *dai)
	140	{
	141	struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
	142
	143	dev_dbg(dai->dev, "%s()\n", __func__);
	144
	145	WARN_ON(hcp->current_stream != substream);
	146
	147	hcp->hcd.ops->audio_shutdown(dai->dev->parent);
	148
	149	mutex_lock(&hcp->current_stream_lock);
	150	hcp->current_stream = NULL;
	151	mutex_unlock(&hcp->current_stream_lock);
	152	}
	153
	154	static int hdmi_codec_hw_params(struct snd_pcm_substream *substream,
	155	struct snd_pcm_hw_params *params,
	156	struct snd_soc_dai *dai)
	157	{
	158	struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
	159	struct hdmi_codec_params hp = {
	160	.iec = {
	161	.status = { 0 },
	162	.subcode = { 0 },
	163	.pad = 0,
	164	.dig_subframe = { 0 },
	165	}
	166	};
	167	int ret;
	168
	169	dev_dbg(dai->dev, "%s() width %d rate %d channels %d\n", __func__,
	170	params_width(params), params_rate(params),
	171	params_channels(params));
	172
	173	if (params_width(params) > 24)
	174	params->msbits = 24;
	175
	176	ret = snd_pcm_create_iec958_consumer_hw_params(params, hp.iec.status,
	177	sizeof(hp.iec.status));
	178	if (ret < 0) {
	179	dev_err(dai->dev, "Creating IEC958 channel status failed %d\n",
	180	ret);
	181	return ret;
	182	}
	183
	184	ret = hdmi_codec_new_stream(substream, dai);
	185	if (ret)
	186	return ret;
	187
	188	hdmi_audio_infoframe_init(&hp.cea);
	189	hp.cea.channels = params_channels(params);
	190	hp.cea.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
	191	hp.cea.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
	192	hp.cea.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
	193
	194	hp.sample_width = params_width(params);
	195	hp.sample_rate = params_rate(params);
	196	hp.channels = params_channels(params);
	197
	198	return hcp->hcd.ops->hw_params(dai->dev->parent, &hcp->daifmt[dai->id],
	199	&hp);
	200	}
	201
	202	static int hdmi_codec_set_fmt(struct snd_soc_dai *dai,
	203	unsigned int fmt)
	204	{
	205	struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
	206	struct hdmi_codec_daifmt cf = { 0 };
	207	int ret = 0;
	208
	209	dev_dbg(dai->dev, "%s()\n", __func__);
	210
	211	if (dai->id == DAI_ID_SPDIF) {
	212	cf.fmt = HDMI_SPDIF;
	213	} else {
	214	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
	215	case SND_SOC_DAIFMT_CBM_CFM:
	216	cf.bit_clk_master = 1;
	217	cf.frame_clk_master = 1;
	218	break;
	219	case SND_SOC_DAIFMT_CBS_CFM:
	220	cf.frame_clk_master = 1;
	221	break;
	222	case SND_SOC_DAIFMT_CBM_CFS:
	223	cf.bit_clk_master = 1;
	224	break;
	225	case SND_SOC_DAIFMT_CBS_CFS:
	226	break;
	227	default:
	228	return -EINVAL;
	229	}
	230
	231	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
	232	case SND_SOC_DAIFMT_NB_NF:
	233	break;
	234	case SND_SOC_DAIFMT_NB_IF:
	235	cf.frame_clk_inv = 1;
	236	break;
	237	case SND_SOC_DAIFMT_IB_NF:
	238	cf.bit_clk_inv = 1;
	239	break;
	240	case SND_SOC_DAIFMT_IB_IF:
	241	cf.frame_clk_inv = 1;
	242	cf.bit_clk_inv = 1;
	243	break;
	244	}
	245
	246	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
	247	case SND_SOC_DAIFMT_I2S:
	248	cf.fmt = HDMI_I2S;
	249	break;
	250	case SND_SOC_DAIFMT_DSP_A:
	251	cf.fmt = HDMI_DSP_A;
	252	break;
	253	case SND_SOC_DAIFMT_DSP_B:
	254	cf.fmt = HDMI_DSP_B;
	255	break;
	256	case SND_SOC_DAIFMT_RIGHT_J:
	257	cf.fmt = HDMI_RIGHT_J;
	258	break;
	259	case SND_SOC_DAIFMT_LEFT_J:
	260	cf.fmt = HDMI_LEFT_J;
	261	break;
	262	case SND_SOC_DAIFMT_AC97:
	263	cf.fmt = HDMI_AC97;
	264	break;
	265	default:
	266	dev_err(dai->dev, "Invalid DAI interface format\n");
	267	return -EINVAL;
	268	}
	269	}
	270
	271	hcp->daifmt[dai->id] = cf;
	272
	273	return ret;
	274	}
	275
	276	static int hdmi_codec_digital_mute(struct snd_soc_dai *dai, int mute)
	277	{
	278	struct hdmi_codec_priv *hcp = snd_soc_dai_get_drvdata(dai);
	279
	280	dev_dbg(dai->dev, "%s()\n", __func__);
	281
	282	if (hcp->hcd.ops->digital_mute)
	283	return hcp->hcd.ops->digital_mute(dai->dev->parent, mute);
	284
	285	return 0;
	286	}
	287
	288	static const struct snd_soc_dai_ops hdmi_dai_ops = {
	289	.startup = hdmi_codec_startup,
	290	.shutdown = hdmi_codec_shutdown,
	291	.hw_params = hdmi_codec_hw_params,
	292	.set_fmt = hdmi_codec_set_fmt,
	293	.digital_mute = hdmi_codec_digital_mute,
	294	};
	295
	296
	297	#define HDMI_RATES (SNDRV_PCM_RATE_32000 \| SNDRV_PCM_RATE_44100 \|\
	298	SNDRV_PCM_RATE_48000 \| SNDRV_PCM_RATE_88200 \|\
	299	SNDRV_PCM_RATE_96000 \| SNDRV_PCM_RATE_176400 \|\
	300	SNDRV_PCM_RATE_192000)
	301
	302	#define SPDIF_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \| SNDRV_PCM_FMTBIT_S16_BE \|\
	303	SNDRV_PCM_FMTBIT_S20_3LE \| SNDRV_PCM_FMTBIT_S20_3BE \|\
	304	SNDRV_PCM_FMTBIT_S24_3LE \| SNDRV_PCM_FMTBIT_S24_3BE \|\
	305	SNDRV_PCM_FMTBIT_S24_LE \| SNDRV_PCM_FMTBIT_S24_BE)
	306
	307	/*
	308	* This list is only for formats allowed on the I2S bus. So there is
	309	* some formats listed that are not supported by HDMI interface. For
	310	* instance allowing the 32-bit formats enables 24-precision with CPU
	311	* DAIs that do not support 24-bit formats. If the extra formats cause
	312	* problems, we should add the video side driver an option to disable
	313	* them.
	314	*/
	315	#define I2S_FORMATS (SNDRV_PCM_FMTBIT_S16_LE \| SNDRV_PCM_FMTBIT_S16_BE \|\
	316	SNDRV_PCM_FMTBIT_S20_3LE \| SNDRV_PCM_FMTBIT_S20_3BE \|\
	317	SNDRV_PCM_FMTBIT_S24_3LE \| SNDRV_PCM_FMTBIT_S24_3BE \|\
	318	SNDRV_PCM_FMTBIT_S24_LE \| SNDRV_PCM_FMTBIT_S24_BE \|\
	319	SNDRV_PCM_FMTBIT_S32_LE \| SNDRV_PCM_FMTBIT_S32_BE)
	320
	321	static struct snd_soc_dai_driver hdmi_i2s_dai = {
	322	.name = "i2s-hifi",
	323	.id = DAI_ID_I2S,
	324	.playback = {
	325	.stream_name = "Playback",
	326	.channels_min = 2,
	327	.channels_max = 8,
	328	.rates = HDMI_RATES,
	329	.formats = I2S_FORMATS,
	330	.sig_bits = 24,
	331	},
	332	.ops = &hdmi_dai_ops,
	333	};
	334
	335	static const struct snd_soc_dai_driver hdmi_spdif_dai = {
	336	.name = "spdif-hifi",
	337	.id = DAI_ID_SPDIF,
	338	.playback = {
	339	.stream_name = "Playback",
	340	.channels_min = 2,
	341	.channels_max = 2,
	342	.rates = HDMI_RATES,
	343	.formats = SPDIF_FORMATS,
	344	},
	345	.ops = &hdmi_dai_ops,
	346	};
	347
	348	static struct snd_soc_codec_driver hdmi_codec = {
	349	.controls = hdmi_controls,
	350	.num_controls = ARRAY_SIZE(hdmi_controls),
	351	.dapm_widgets = hdmi_widgets,
	352	.num_dapm_widgets = ARRAY_SIZE(hdmi_widgets),
	353	.dapm_routes = hdmi_routes,
	354	.num_dapm_routes = ARRAY_SIZE(hdmi_routes),
	355	};
	356
	357	static int hdmi_codec_probe(struct platform_device *pdev)
	358	{
	359	struct hdmi_codec_pdata *hcd = pdev->dev.platform_data;
	360	struct device *dev = &pdev->dev;
	361	struct hdmi_codec_priv *hcp;
	362	int dai_count, i = 0;
	363	int ret;
	364
	365	dev_dbg(dev, "%s()\n", __func__);
	366
	367	if (!hcd) {
	368	dev_err(dev, "%s: No plalform data\n", __func__);
	369	return -EINVAL;
	370	}
	371
	372	dai_count = hcd->i2s + hcd->spdif;
	373	if (dai_count < 1 \|\| !hcd->ops \|\| !hcd->ops->hw_params \|\|
	374	!hcd->ops->audio_shutdown) {
	375	dev_err(dev, "%s: Invalid parameters\n", __func__);
	376	return -EINVAL;
	377	}
	378
	379	hcp = devm_kzalloc(dev, sizeof(*hcp), GFP_KERNEL);
	380	if (!hcp)
	381	return -ENOMEM;
	382
	383	hcp->hcd = *hcd;
	384	mutex_init(&hcp->current_stream_lock);
	385
	386	hcp->daidrv = devm_kzalloc(dev, dai_count * sizeof(*hcp->daidrv),
	387	GFP_KERNEL);
	388	if (!hcp->daidrv)
	389	return -ENOMEM;
	390
	391	if (hcd->i2s) {
	392	hcp->daidrv[i] = hdmi_i2s_dai;
	393	hcp->daidrv[i].playback.channels_max =
	394	hcd->max_i2s_channels;
	395	i++;
	396	}
	397
	398	if (hcd->spdif)
	399	hcp->daidrv[i] = hdmi_spdif_dai;
	400
	401	ret = snd_soc_register_codec(dev, &hdmi_codec, hcp->daidrv,
	402	dai_count);
	403	if (ret) {
	404	dev_err(dev, "%s: snd_soc_register_codec() failed (%d)\n",
	405	__func__, ret);
	406	return ret;
	407	}
	408
	409	dev_set_drvdata(dev, hcp);
	410	return 0;
	411	}
	412
	413	static int hdmi_codec_remove(struct platform_device *pdev)
	414	{
	415	snd_soc_unregister_codec(&pdev->dev);
	416	return 0;
	417	}
	418
	419	static struct platform_driver hdmi_codec_driver = {
	420	.driver = {
	421	.name = HDMI_CODEC_DRV_NAME,
	422	},
	423	.probe = hdmi_codec_probe,
	424	.remove = hdmi_codec_remove,
	425	};
	426
	427	module_platform_driver(hdmi_codec_driver);
	428
	429	MODULE_AUTHOR("Jyri Sarha <jsarha@ti.com>");
	430	MODULE_DESCRIPTION("HDMI Audio Codec Driver");
	431	MODULE_LICENSE("GPL");
	432	MODULE_ALIAS("platform:" HDMI_CODEC_DRV_NAME);

sound/soc/codecs/pcm5102a.c+69−0

@@ -0,0 +1,69 @@
	1	/*
	2	* Driver for the PCM5102A codec
	3	*
	4	* Author: Florian Meier <florian.meier@koalo.de>
	5	* Copyright 2013
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* version 2 as published by the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful, but
	12	* WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	* General Public License for more details.
	15	*/
	16
	17	#include <linux/init.h>
	18	#include <linux/module.h>
	19	#include <linux/platform_device.h>
	20
	21	#include <sound/soc.h>
	22
	23	static struct snd_soc_dai_driver pcm5102a_dai = {
	24	.name = "pcm5102a-hifi",
	25	.playback = {
	26	.channels_min = 2,
	27	.channels_max = 2,
	28	.rates = SNDRV_PCM_RATE_8000_192000,
	29	.formats = SNDRV_PCM_FMTBIT_S16_LE \|
	30	SNDRV_PCM_FMTBIT_S24_LE \|
	31	SNDRV_PCM_FMTBIT_S32_LE
	32	},
	33	};
	34
	35	static struct snd_soc_codec_driver soc_codec_dev_pcm5102a;
	36
	37	static int pcm5102a_probe(struct platform_device *pdev)
	38	{
	39	return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_pcm5102a,
	40	&pcm5102a_dai, 1);
	41	}
	42
	43	static int pcm5102a_remove(struct platform_device *pdev)
	44	{
	45	snd_soc_unregister_codec(&pdev->dev);
	46	return 0;
	47	}
	48
	49	static const struct of_device_id pcm5102a_of_match[] = {
	50	{ .compatible = "ti,pcm5102a", },
	51	{ }
	52	};
	53	MODULE_DEVICE_TABLE(of, pcm5102a_of_match);
	54
	55	static struct platform_driver pcm5102a_codec_driver = {
	56	.probe = pcm5102a_probe,
	57	.remove = pcm5102a_remove,
	58	.driver = {
	59	.name = "pcm5102a-codec",
	60	.owner = THIS_MODULE,
	61	.of_match_table = pcm5102a_of_match,
	62	},
	63	};
	64
	65	module_platform_driver(pcm5102a_codec_driver);
	66
	67	MODULE_DESCRIPTION("ASoC PCM5102A codec driver");
	68	MODULE_AUTHOR("Florian Meier <florian.meier@koalo.de>");
	69	MODULE_LICENSE("GPL v2");

sound/soc/codecs/rt298.c+18−1

 #include <linux/i2c.h>
 #include <linux/platform_device.h>
 #include <linux/spi/spi.h>
+#include <linux/dmi.h>
 #include <linux/acpi.h>
 #include <sound/core.h>
 #include <sound/pcm.h>
 };
 MODULE_DEVICE_TABLE(acpi, rt298_acpi_match);
+static const struct dmi_system_id force_combo_jack_table[] = {
+	{
+		.ident = "Intel Broxton P",
+		.matches = {
+			DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp"),
+			DMI_MATCH(DMI_PRODUCT_NAME, "Broxton P")
+		}
+	},
+	{ }
+};
 static int rt298_i2c_probe(struct i2c_client *i2c,
 			   const struct i2c_device_id *id)
 {
 	/* enable jack combo mode on supported devices */
 	acpiid = acpi_match_device(dev->driver->acpi_match_table, dev);
-	if (acpiid) {
+	if (acpiid && acpiid->driver_data) {
 		rt298->pdata = *(struct rt298_platform_data *)
 				acpiid->driver_data;
 	}
+	if (dmi_check_system(force_combo_jack_table)) {
+		rt298->pdata.cbj_en = true;
+		rt298->pdata.gpio2_en = false;
+	}
 	/* VREF Charging */
 	regmap_update_bits(rt298->regmap, 0x04, 0x80, 0x80);
 	regmap_update_bits(rt298->regmap, 0x1b, 0x860, 0x860);

sound/soc/codecs/rt5645.c+10−6

 		if (btn_type == 0)/* button release */
 			report =  rt5645->jack_type;
 		else {
-			if (rt5645->pdata.jd_invert) {
+			mod_timer(&rt5645->btn_check_timer,
-				mod_timer(&rt5645->btn_check_timer,
+				msecs_to_jiffies(100));
-					msecs_to_jiffies(100));
-			}
 		}
 		break;
 			DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
 		},
 	},
+	{
+		.ident = "Google Setzer",
+		.matches = {
+			DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
+		},
+	},
 	{ }
 };
 	if (rt5645->pdata.jd_invert) {
 		regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
 			RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
-		setup_timer(&rt5645->btn_check_timer,
-			rt5645_btn_check_callback, (unsigned long)rt5645);
 	}
+	setup_timer(&rt5645->btn_check_timer,
+		rt5645_btn_check_callback, (unsigned long)rt5645);
 	INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
 	INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work);

sound/soc/codecs/wm5102.c+4−0

 static int wm5102_remove(struct platform_device *pdev)
 {
+	struct wm5102_priv *wm5102 = platform_get_drvdata(pdev);
 	snd_soc_unregister_platform(&pdev->dev);
 	snd_soc_unregister_codec(&pdev->dev);
 	pm_runtime_disable(&pdev->dev);
+	wm_adsp2_remove(&wm5102->core.adsp[0]);
 	return 0;
 }

sound/soc/codecs/wm5110.c+6−0

 static int wm5110_remove(struct platform_device *pdev)
 {
+	struct wm5110_priv *wm5110 = platform_get_drvdata(pdev);
+	int i;
 	snd_soc_unregister_platform(&pdev->dev);
 	snd_soc_unregister_codec(&pdev->dev);
 	pm_runtime_disable(&pdev->dev);
+	for (i = 0; i < WM5110_NUM_ADSP; i++)
+		wm_adsp2_remove(&wm5110->core.adsp[i]);
 	return 0;
 }

sound/soc/codecs/wm_adsp.c+223−69

@@ -160,6 +160,8 @@ · 159 unmodified lines
160	#define ADSP2_RAM_RDY_SHIFT 0	160	#define ADSP2_RAM_RDY_SHIFT 0
161	#define ADSP2_RAM_RDY_WIDTH 1	161	#define ADSP2_RAM_RDY_WIDTH 1
162		162
		163	#define ADSP_MAX_STD_CTRL_SIZE 512
		164
163	struct wm_adsp_buf {	165	struct wm_adsp_buf {
164	struct list_head list;	166	struct list_head list;
165	void *buf;	167	void *buf;
@@ -271,8 +273,11 @@ struct wm_adsp_buffer { · 105 unmodified lines
271	__be32 words_written[2]; /* total words written (64 bit) */	273	__be32 words_written[2]; /* total words written (64 bit) */
272	};	274	};
273		275
		276	struct wm_adsp_compr;
		277
274	struct wm_adsp_compr_buf {	278	struct wm_adsp_compr_buf {
275	struct wm_adsp *dsp;	279	struct wm_adsp *dsp;
		280	struct wm_adsp_compr *compr;
276		281
277	struct wm_adsp_buffer_region *regions;	282	struct wm_adsp_buffer_region *regions;
278	u32 host_buf_ptr;	283	u32 host_buf_ptr;
@@ -435,6 +440,7 @@ struct wm_coeff_ctl { · 156 unmodified lines
435	size_t len;	440	size_t len;
436	unsigned int set:1;	441	unsigned int set:1;
437	struct snd_kcontrol *kcontrol;	442	struct snd_kcontrol *kcontrol;
		443	struct soc_bytes_ext bytes_ext;
438	unsigned int flags;	444	unsigned int flags;
439	};	445	};
440		446
@@ -711,10 +717,17 @@ static void wm_adsp2_show_fw_status(struct wm_adsp *dsp) · 270 unmodified lines
711	be16_to_cpu(scratch[3]));	717	be16_to_cpu(scratch[3]));
712	}	718	}
713		719
		720	static inline struct wm_coeff_ctl bytes_ext_to_ctl(struct soc_bytes_ext ext)
		721	{
		722	return container_of(ext, struct wm_coeff_ctl, bytes_ext);
		723	}
		724
714	static int wm_coeff_info(struct snd_kcontrol *kctl,	725	static int wm_coeff_info(struct snd_kcontrol *kctl,
715	struct snd_ctl_elem_info *uinfo)	726	struct snd_ctl_elem_info *uinfo)
716	{	727	{
717	struct wm_coeff_ctl ctl = (struct wm_coeff_ctl )kctl->private_value;	728	struct soc_bytes_ext *bytes_ext =
		729	(struct soc_bytes_ext *)kctl->private_value;
		730	struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
718		731
719	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;	732	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
720	uinfo->count = ctl->len;	733	uinfo->count = ctl->len;
@@ -763,7 +776,9 @@ static int wm_coeff_write_control(struct wm_coeff_ctl *ctl, · 42 unmodified lines
763	static int wm_coeff_put(struct snd_kcontrol *kctl,	776	static int wm_coeff_put(struct snd_kcontrol *kctl,
764	struct snd_ctl_elem_value *ucontrol)	777	struct snd_ctl_elem_value *ucontrol)
765	{	778	{
766	struct wm_coeff_ctl ctl = (struct wm_coeff_ctl )kctl->private_value;	779	struct soc_bytes_ext *bytes_ext =
		780	(struct soc_bytes_ext *)kctl->private_value;
		781	struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
767	char *p = ucontrol->value.bytes.data;	782	char *p = ucontrol->value.bytes.data;
768	int ret = 0;	783	int ret = 0;
769		784
@@ -780,6 +795,29 @@ static int wm_coeff_put(struct snd_kcontrol *kctl, · 10 unmodified lines
780	return ret;	795	return ret;
781	}	796	}
782		797
		798	static int wm_coeff_tlv_put(struct snd_kcontrol *kctl,
		799	const unsigned int __user *bytes, unsigned int size)
		800	{
		801	struct soc_bytes_ext *bytes_ext =
		802	(struct soc_bytes_ext *)kctl->private_value;
		803	struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
		804	int ret = 0;
		805
		806	mutex_lock(&ctl->dsp->pwr_lock);
		807
		808	if (copy_from_user(ctl->cache, bytes, size)) {
		809	ret = -EFAULT;
		810	} else {
		811	ctl->set = 1;
		812	if (ctl->enabled)
		813	ret = wm_coeff_write_control(ctl, ctl->cache, size);
		814	}
		815
		816	mutex_unlock(&ctl->dsp->pwr_lock);
		817
		818	return ret;
		819	}
		820
783	static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,	821	static int wm_coeff_read_control(struct wm_coeff_ctl *ctl,
784	void *buf, size_t len)	822	void *buf, size_t len)
785	{	823	{
@@ -822,7 +860,9 @@ static int wm_coeff_read_control(struct wm_coeff_ctl *ctl, · 36 unmodified lines
822	static int wm_coeff_get(struct snd_kcontrol *kctl,	860	static int wm_coeff_get(struct snd_kcontrol *kctl,
823	struct snd_ctl_elem_value *ucontrol)	861	struct snd_ctl_elem_value *ucontrol)
824	{	862	{
825	struct wm_coeff_ctl ctl = (struct wm_coeff_ctl )kctl->private_value;	863	struct soc_bytes_ext *bytes_ext =
		864	(struct soc_bytes_ext *)kctl->private_value;
		865	struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
826	char *p = ucontrol->value.bytes.data;	866	char *p = ucontrol->value.bytes.data;
827	int ret = 0;	867	int ret = 0;
828		868
@@ -845,12 +885,72 @@ static int wm_coeff_get(struct snd_kcontrol *kctl, · 16 unmodified lines
845	return ret;	885	return ret;
846	}	886	}
847		887
		888	static int wm_coeff_tlv_get(struct snd_kcontrol *kctl,
		889	unsigned int __user *bytes, unsigned int size)
		890	{
		891	struct soc_bytes_ext *bytes_ext =
		892	(struct soc_bytes_ext *)kctl->private_value;
		893	struct wm_coeff_ctl *ctl = bytes_ext_to_ctl(bytes_ext);
		894	int ret = 0;
		895
		896	mutex_lock(&ctl->dsp->pwr_lock);
		897
		898	if (ctl->flags & WMFW_CTL_FLAG_VOLATILE) {
		899	if (ctl->enabled)
		900	ret = wm_coeff_read_control(ctl, ctl->cache, size);
		901	else
		902	ret = -EPERM;
		903	} else {
		904	if (!ctl->flags && ctl->enabled)
		905	ret = wm_coeff_read_control(ctl, ctl->cache, size);
		906	}
		907
		908	if (!ret && copy_to_user(bytes, ctl->cache, size))
		909	ret = -EFAULT;
		910
		911	mutex_unlock(&ctl->dsp->pwr_lock);
		912
		913	return ret;
		914	}
		915
848	struct wmfw_ctl_work {	916	struct wmfw_ctl_work {
849	struct wm_adsp *dsp;	917	struct wm_adsp *dsp;
850	struct wm_coeff_ctl *ctl;	918	struct wm_coeff_ctl *ctl;
851	struct work_struct work;	919	struct work_struct work;
852	};	920	};
853		921
		922	static unsigned int wmfw_convert_flags(unsigned int in, unsigned int len)
		923	{
		924	unsigned int out, rd, wr, vol;
		925
		926	if (len > ADSP_MAX_STD_CTRL_SIZE) {
		927	rd = SNDRV_CTL_ELEM_ACCESS_TLV_READ;
		928	wr = SNDRV_CTL_ELEM_ACCESS_TLV_WRITE;
		929	vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
		930
		931	out = SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK;
		932	} else {
		933	rd = SNDRV_CTL_ELEM_ACCESS_READ;
		934	wr = SNDRV_CTL_ELEM_ACCESS_WRITE;
		935	vol = SNDRV_CTL_ELEM_ACCESS_VOLATILE;
		936
		937	out = 0;
		938	}
		939
		940	if (in) {
		941	if (in & WMFW_CTL_FLAG_READABLE)
		942	out \|= rd;
		943	if (in & WMFW_CTL_FLAG_WRITEABLE)
		944	out \|= wr;
		945	if (in & WMFW_CTL_FLAG_VOLATILE)
		946	out \|= vol;
		947	} else {
		948	out \|= rd \| wr \| vol;
		949	}
		950
		951	return out;
		952	}
		953
854	static int wmfw_add_ctl(struct wm_adsp dsp, struct wm_coeff_ctl ctl)	954	static int wmfw_add_ctl(struct wm_adsp dsp, struct wm_coeff_ctl ctl)
855	{	955	{
856	struct snd_kcontrol_new *kcontrol;	956	struct snd_kcontrol_new *kcontrol;
@@ -868,19 +968,15 @@ static int wmfw_add_ctl(struct wm_adsp dsp, struct wm_coeff_ctl ctl) · 11 unmodified lines
868	kcontrol->info = wm_coeff_info;	968	kcontrol->info = wm_coeff_info;
869	kcontrol->get = wm_coeff_get;	969	kcontrol->get = wm_coeff_get;
870	kcontrol->put = wm_coeff_put;	970	kcontrol->put = wm_coeff_put;
871	kcontrol->private_value = (unsigned long)ctl;	971	kcontrol->iface = SNDRV_CTL_ELEM_IFACE_MIXER;
		972	kcontrol->tlv.c = snd_soc_bytes_tlv_callback;
		973	kcontrol->private_value = (unsigned long)&ctl->bytes_ext;
872		974
873	if (ctl->flags) {	975	ctl->bytes_ext.max = ctl->len;
874	if (ctl->flags & WMFW_CTL_FLAG_WRITEABLE)	976	ctl->bytes_ext.get = wm_coeff_tlv_get;
875	kcontrol->access \|= SNDRV_CTL_ELEM_ACCESS_WRITE;	977	ctl->bytes_ext.put = wm_coeff_tlv_put;
876	if (ctl->flags & WMFW_CTL_FLAG_READABLE)	978
877	kcontrol->access \|= SNDRV_CTL_ELEM_ACCESS_READ;	979	kcontrol->access = wmfw_convert_flags(ctl->flags, ctl->len);
878	if (ctl->flags & WMFW_CTL_FLAG_VOLATILE)
879	kcontrol->access \|= SNDRV_CTL_ELEM_ACCESS_VOLATILE;
880	} else {
881	kcontrol->access = SNDRV_CTL_ELEM_ACCESS_READWRITE;
882	kcontrol->access \|= SNDRV_CTL_ELEM_ACCESS_VOLATILE;
883	}
884		980
885	ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1);	981	ret = snd_soc_add_card_controls(dsp->card, kcontrol, 1);
886	if (ret < 0)	982	if (ret < 0)
@@ -944,6 +1040,13 @@ static void wm_adsp_ctl_work(struct work_struct *work) · 57 unmodified lines
944	kfree(ctl_work);	1040	kfree(ctl_work);
945	}	1041	}
946		1042
		1043	static void wm_adsp_free_ctl_blk(struct wm_coeff_ctl *ctl)
		1044	{
		1045	kfree(ctl->cache);
		1046	kfree(ctl->name);
		1047	kfree(ctl);
		1048	}
		1049
947	static int wm_adsp_create_control(struct wm_adsp *dsp,	1050	static int wm_adsp_create_control(struct wm_adsp *dsp,
948	const struct wm_adsp_alg_region *alg_region,	1051	const struct wm_adsp_alg_region *alg_region,
949	unsigned int offset, unsigned int len,	1052	unsigned int offset, unsigned int len,
@@ -1032,11 +1135,6 @@ static int wm_adsp_create_control(struct wm_adsp *dsp, · 82 unmodified lines
1032		1135
1033	ctl->flags = flags;	1136	ctl->flags = flags;
1034	ctl->offset = offset;	1137	ctl->offset = offset;
1035	if (len > 512) {
1036	adsp_warn(dsp, "Truncating control %s from %d\n",
1037	ctl->name, len);
1038	len = 512;
1039	}
1040	ctl->len = len;	1138	ctl->len = len;
1041	ctl->cache = kzalloc(ctl->len, GFP_KERNEL);	1139	ctl->cache = kzalloc(ctl->len, GFP_KERNEL);
1042	if (!ctl->cache) {	1140	if (!ctl->cache) {
@@ -1564,6 +1662,19 @@ static struct wm_adsp_alg_region wm_adsp_create_region(struct wm_adsp dsp, · 521 unmodified lines
1564	return alg_region;	1662	return alg_region;
1565	}	1663	}
1566		1664
		1665	static void wm_adsp_free_alg_regions(struct wm_adsp *dsp)
		1666	{
		1667	struct wm_adsp_alg_region *alg_region;
		1668
		1669	while (!list_empty(&dsp->alg_regions)) {
		1670	alg_region = list_first_entry(&dsp->alg_regions,
		1671	struct wm_adsp_alg_region,
		1672	list);
		1673	list_del(&alg_region->list);
		1674	kfree(alg_region);
		1675	}
		1676	}
		1677
1567	static int wm_adsp1_setup_algs(struct wm_adsp *dsp)	1678	static int wm_adsp1_setup_algs(struct wm_adsp *dsp)
1568	{	1679	{
1569	struct wmfw_adsp1_id_hdr adsp1_id;	1680	struct wmfw_adsp1_id_hdr adsp1_id;
@@ -1994,7 +2105,6 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, · 424 unmodified lines
1994	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);	2105	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1995	struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);	2106	struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
1996	struct wm_adsp *dsp = &dsps[w->shift];	2107	struct wm_adsp *dsp = &dsps[w->shift];
1997	struct wm_adsp_alg_region *alg_region;
1998	struct wm_coeff_ctl *ctl;	2108	struct wm_coeff_ctl *ctl;
1999	int ret;	2109	int ret;
2000	unsigned int val;	2110	unsigned int val;
@@ -2074,13 +2184,8 @@ int wm_adsp1_event(struct snd_soc_dapm_widget *w, · 73 unmodified lines
2074	list_for_each_entry(ctl, &dsp->ctl_list, list)	2184	list_for_each_entry(ctl, &dsp->ctl_list, list)
2075	ctl->enabled = 0;	2185	ctl->enabled = 0;
2076		2186
2077	while (!list_empty(&dsp->alg_regions)) {	2187
2078	alg_region = list_first_entry(&dsp->alg_regions,	2188	wm_adsp_free_alg_regions(dsp);
2079	struct wm_adsp_alg_region,
2080	list);
2081	list_del(&alg_region->list);
2082	kfree(alg_region);
2083	}
2084	break;	2189	break;
2085		2190
2086	default:	2191	default:
@@ -2222,7 +2327,6 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, · 135 unmodified lines
2222	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);	2327	struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
2223	struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);	2328	struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
2224	struct wm_adsp *dsp = &dsps[w->shift];	2329	struct wm_adsp *dsp = &dsps[w->shift];
2225	struct wm_adsp_alg_region *alg_region;
2226	struct wm_coeff_ctl *ctl;	2330	struct wm_coeff_ctl *ctl;
2227	int ret;	2331	int ret;
2228		2332
@@ -2240,9 +2344,13 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, · 11 unmodified lines
2240	if (ret != 0)	2344	if (ret != 0)
2241	goto err;	2345	goto err;
2242		2346
		2347	mutex_lock(&dsp->pwr_lock);
		2348
2243	if (wm_adsp_fw[dsp->fw].num_caps != 0)	2349	if (wm_adsp_fw[dsp->fw].num_caps != 0)
2244	ret = wm_adsp_buffer_init(dsp);	2350	ret = wm_adsp_buffer_init(dsp);
2245		2351
		2352	mutex_unlock(&dsp->pwr_lock);
		2353
2246	break;	2354	break;
2247		2355
2248	case SND_SOC_DAPM_PRE_PMD:	2356	case SND_SOC_DAPM_PRE_PMD:
@@ -2269,13 +2377,7 @@ int wm_adsp2_event(struct snd_soc_dapm_widget *w, · 20 unmodified lines
2269	list_for_each_entry(ctl, &dsp->ctl_list, list)	2377	list_for_each_entry(ctl, &dsp->ctl_list, list)
2270	ctl->enabled = 0;	2378	ctl->enabled = 0;
2271		2379
2272	while (!list_empty(&dsp->alg_regions)) {	2380	wm_adsp_free_alg_regions(dsp);
2273	alg_region = list_first_entry(&dsp->alg_regions,
2274	struct wm_adsp_alg_region,
2275	list);
2276	list_del(&alg_region->list);
2277	kfree(alg_region);
2278	}
2279		2381
2280	if (wm_adsp_fw[dsp->fw].num_caps != 0)	2382	if (wm_adsp_fw[dsp->fw].num_caps != 0)
2281	wm_adsp_buffer_free(dsp);	2383	wm_adsp_buffer_free(dsp);
@@ -2340,6 +2442,54 @@ int wm_adsp2_init(struct wm_adsp *dsp) · 58 unmodified lines
2340	}	2442	}
2341	EXPORT_SYMBOL_GPL(wm_adsp2_init);	2443	EXPORT_SYMBOL_GPL(wm_adsp2_init);
2342		2444
		2445	void wm_adsp2_remove(struct wm_adsp *dsp)
		2446	{
		2447	struct wm_coeff_ctl *ctl;
		2448
		2449	while (!list_empty(&dsp->ctl_list)) {
		2450	ctl = list_first_entry(&dsp->ctl_list, struct wm_coeff_ctl,
		2451	list);
		2452	list_del(&ctl->list);
		2453	wm_adsp_free_ctl_blk(ctl);
		2454	}
		2455	}
		2456	EXPORT_SYMBOL_GPL(wm_adsp2_remove);
		2457
		2458	static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
		2459	{
		2460	return compr->buf != NULL;
		2461	}
		2462
		2463	static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
		2464	{
		2465	/*
		2466	* Note this will be more complex once each DSP can support multiple
		2467	* streams
		2468	*/
		2469	if (!compr->dsp->buffer)
		2470	return -EINVAL;
		2471
		2472	compr->buf = compr->dsp->buffer;
		2473	compr->buf->compr = compr;
		2474
		2475	return 0;
		2476	}
		2477
		2478	static void wm_adsp_compr_detach(struct wm_adsp_compr *compr)
		2479	{
		2480	if (!compr)
		2481	return;
		2482
		2483	/* Wake the poll so it can see buffer is no longer attached */
		2484	if (compr->stream)
		2485	snd_compr_fragment_elapsed(compr->stream);
		2486
		2487	if (wm_adsp_compr_attached(compr)) {
		2488	compr->buf->compr = NULL;
		2489	compr->buf = NULL;
		2490	}
		2491	}
		2492
2343	int wm_adsp_compr_open(struct wm_adsp dsp, struct snd_compr_stream stream)	2493	int wm_adsp_compr_open(struct wm_adsp dsp, struct snd_compr_stream stream)
2344	{	2494	{
2345	struct wm_adsp_compr *compr;	2495	struct wm_adsp_compr *compr;
@@ -2393,6 +2543,7 @@ int wm_adsp_compr_free(struct snd_compr_stream *stream) · 47 unmodified lines
2393		2543
2394	mutex_lock(&dsp->pwr_lock);	2544	mutex_lock(&dsp->pwr_lock);
2395		2545
		2546	wm_adsp_compr_detach(compr);
2396	dsp->compr = NULL;	2547	dsp->compr = NULL;
2397		2548
2398	kfree(compr->raw_buf);	2549	kfree(compr->raw_buf);
@@ -2689,6 +2840,8 @@ err_buffer: · 290 unmodified lines
2689	static int wm_adsp_buffer_free(struct wm_adsp *dsp)	2840	static int wm_adsp_buffer_free(struct wm_adsp *dsp)
2690	{	2841	{
2691	if (dsp->buffer) {	2842	if (dsp->buffer) {
		2843	wm_adsp_compr_detach(dsp->buffer->compr);
		2844
2692	kfree(dsp->buffer->regions);	2845	kfree(dsp->buffer->regions);
2693	kfree(dsp->buffer);	2846	kfree(dsp->buffer);
2694		2847
@@ -2698,25 +2851,6 @@ static int wm_adsp_buffer_free(struct wm_adsp *dsp) · 3 unmodified lines
2698	return 0;	2851	return 0;
2699	}	2852	}
2700		2853
2701	static inline int wm_adsp_compr_attached(struct wm_adsp_compr *compr)
2702	{
2703	return compr->buf != NULL;
2704	}
2705
2706	static int wm_adsp_compr_attach(struct wm_adsp_compr *compr)
2707	{
2708	/*
2709	* Note this will be more complex once each DSP can support multiple
2710	* streams
2711	*/
2712	if (!compr->dsp->buffer)
2713	return -EINVAL;
2714
2715	compr->buf = compr->dsp->buffer;
2716
2717	return 0;
2718	}
2719
2720	int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd)	2854	int wm_adsp_compr_trigger(struct snd_compr_stream *stream, int cmd)
2721	{	2855	{
2722	struct wm_adsp_compr *compr = stream->runtime->private_data;	2856	struct wm_adsp_compr *compr = stream->runtime->private_data;
@@ -2805,21 +2939,41 @@ static int wm_adsp_buffer_update_avail(struct wm_adsp_compr_buf *buf) · 82 unmodified lines
2805	avail += wm_adsp_buffer_size(buf);	2939	avail += wm_adsp_buffer_size(buf);
2806		2940
2807	adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n",	2941	adsp_dbg(buf->dsp, "readindex=0x%x, writeindex=0x%x, avail=%d\n",
2808	buf->read_index, write_index, avail);	2942	buf->read_index, write_index, avail * WM_ADSP_DATA_WORD_SIZE);
2809		2943
2810	buf->avail = avail;	2944	buf->avail = avail;
2811		2945
2812	return 0;	2946	return 0;
2813	}	2947	}
2814		2948
		2949	static int wm_adsp_buffer_get_error(struct wm_adsp_compr_buf *buf)
		2950	{
		2951	int ret;
		2952
		2953	ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);
		2954	if (ret < 0) {
		2955	adsp_err(buf->dsp, "Failed to check buffer error: %d\n", ret);
		2956	return ret;
		2957	}
		2958	if (buf->error != 0) {
		2959	adsp_err(buf->dsp, "Buffer error occurred: %d\n", buf->error);
		2960	return -EIO;
		2961	}
		2962
		2963	return 0;
		2964	}
		2965
2815	int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)	2966	int wm_adsp_compr_handle_irq(struct wm_adsp *dsp)
2816	{	2967	{
2817	struct wm_adsp_compr_buf *buf = dsp->buffer;	2968	struct wm_adsp_compr_buf *buf;
2818	struct wm_adsp_compr *compr = dsp->compr;	2969	struct wm_adsp_compr *compr;
2819	int ret = 0;	2970	int ret = 0;
2820		2971
2821	mutex_lock(&dsp->pwr_lock);	2972	mutex_lock(&dsp->pwr_lock);
2822		2973
		2974	buf = dsp->buffer;
		2975	compr = dsp->compr;
		2976
2823	if (!buf) {	2977	if (!buf) {
2824	ret = -ENODEV;	2978	ret = -ENODEV;
2825	goto out;	2979	goto out;
@@ -2827,16 +2981,9 @@ int wm_adsp_compr_handle_irq(struct wm_adsp *dsp) · 1 unmodified line
2827		2981
2828	adsp_dbg(dsp, "Handling buffer IRQ\n");	2982	adsp_dbg(dsp, "Handling buffer IRQ\n");
2829		2983
2830	ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(error), &buf->error);	2984	ret = wm_adsp_buffer_get_error(buf);
2831	if (ret < 0) {	2985	if (ret < 0)
2832	adsp_err(dsp, "Failed to check buffer error: %d\n", ret);	2986	goto out_notify; /* Wake poll to report error */
2833	goto out;
2834	}
2835	if (buf->error != 0) {
2836	adsp_err(dsp, "Buffer error occurred: %d\n", buf->error);
2837	ret = -EIO;
2838	goto out;
2839	}
2840		2987
2841	ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),	2988	ret = wm_adsp_buffer_read(buf, HOST_BUFFER_FIELD(irq_count),
2842	&buf->irq_count);	2989	&buf->irq_count);
@@ -2851,6 +2998,7 @@ int wm_adsp_compr_handle_irq(struct wm_adsp *dsp) · 8 unmodified lines
2851	goto out;	2998	goto out;
2852	}	2999	}
2853		3000
		3001	out_notify:
2854	if (compr && compr->stream)	3002	if (compr && compr->stream)
2855	snd_compr_fragment_elapsed(compr->stream);	3003	snd_compr_fragment_elapsed(compr->stream);
2856		3004
@@ -2879,14 +3027,16 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, · 22 unmodified lines
2879	struct snd_compr_tstamp *tstamp)	3027	struct snd_compr_tstamp *tstamp)
2880	{	3028	{
2881	struct wm_adsp_compr *compr = stream->runtime->private_data;	3029	struct wm_adsp_compr *compr = stream->runtime->private_data;
2882	struct wm_adsp_compr_buf *buf = compr->buf;
2883	struct wm_adsp *dsp = compr->dsp;	3030	struct wm_adsp *dsp = compr->dsp;
		3031	struct wm_adsp_compr_buf *buf;
2884	int ret = 0;	3032	int ret = 0;
2885		3033
2886	adsp_dbg(dsp, "Pointer request\n");	3034	adsp_dbg(dsp, "Pointer request\n");
2887		3035
2888	mutex_lock(&dsp->pwr_lock);	3036	mutex_lock(&dsp->pwr_lock);
2889		3037
		3038	buf = compr->buf;
		3039
2890	if (!compr->buf) {	3040	if (!compr->buf) {
2891	ret = -ENXIO;	3041	ret = -ENXIO;
2892	goto out;	3042	goto out;
@@ -2909,6 +3059,10 @@ int wm_adsp_compr_pointer(struct snd_compr_stream *stream, · 16 unmodified lines
2909	* DSP to inform us once a whole fragment is available.	3059	* DSP to inform us once a whole fragment is available.
2910	*/	3060	*/
2911	if (buf->avail < wm_adsp_compr_frag_words(compr)) {	3061	if (buf->avail < wm_adsp_compr_frag_words(compr)) {
		3062	ret = wm_adsp_buffer_get_error(buf);
		3063	if (ret < 0)
		3064	goto out;
		3065
2912	ret = wm_adsp_buffer_reenable_irq(buf);	3066	ret = wm_adsp_buffer_reenable_irq(buf);
2913	if (ret < 0) {	3067	if (ret < 0) {
2914	adsp_err(dsp,	3068	adsp_err(dsp,

sound/soc/codecs/wm_adsp.h+1−0

@@ -92,6 +92,7 @@ extern const struct snd_kcontrol_new wm_adsp_fw_controls[]; · 91 unmodified lines
92		92
93	int wm_adsp1_init(struct wm_adsp *dsp);	93	int wm_adsp1_init(struct wm_adsp *dsp);
94	int wm_adsp2_init(struct wm_adsp *dsp);	94	int wm_adsp2_init(struct wm_adsp *dsp);
		95	void wm_adsp2_remove(struct wm_adsp *dsp);
95	int wm_adsp2_codec_probe(struct wm_adsp dsp, struct snd_soc_codec codec);	96	int wm_adsp2_codec_probe(struct wm_adsp dsp, struct snd_soc_codec codec);
96	int wm_adsp2_codec_remove(struct wm_adsp dsp, struct snd_soc_codec codec);	97	int wm_adsp2_codec_remove(struct wm_adsp dsp, struct snd_soc_codec codec);
97	int wm_adsp1_event(struct snd_soc_dapm_widget *w,	98	int wm_adsp1_event(struct snd_soc_dapm_widget *w,

sound/soc/davinci/Kconfig+5−1

 	  - DRA7xx family
 config SND_DAVINCI_SOC_I2S
-	tristate
+	tristate "DaVinci Multichannel Buffered Serial Port (McBSP) support"
+	depends on SND_EDMA_SOC
+	help
+	  Say Y or M here if you want to have support for McBSP IP found in
+	  Texas Instruments DaVinci DA850 SoCs.
 config SND_DAVINCI_SOC_MCASP
 	tristate "Multichannel Audio Serial Port (McASP) support"

sound/soc/davinci/davinci-i2s.c+54−26

@@ -4,9 +4,15 @@ · 3 unmodified lines
4	* Author: Vladimir Barinov, <vbarinov@embeddedalley.com>	4	* Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
5	* Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>	5	* Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
6	*	6	*
		7	* DT support (c) 2016 Petr Kulhavy, Barix AG <petr@barix.com>
		8	* based on davinci-mcasp.c DT support
		9	*
7	* This program is free software; you can redistribute it and/or modify	10	* This program is free software; you can redistribute it and/or modify
8	* it under the terms of the GNU General Public License version 2 as	11	* it under the terms of the GNU General Public License version 2 as
9	* published by the Free Software Foundation.	12	* published by the Free Software Foundation.
		13	*
		14	* TODO:
		15	* on DA850 implement HW FIFOs instead of DMA into DXR and DRR registers
10	*/	16	*/
11		17
12	#include <linux/init.h>	18	#include <linux/init.h>
@@ -650,13 +656,24 @@ static const struct snd_soc_component_driver davinci_i2s_component = { · 637 unmodified lines
650		656
651	static int davinci_i2s_probe(struct platform_device *pdev)	657	static int davinci_i2s_probe(struct platform_device *pdev)
652	{	658	{
		659	struct snd_dmaengine_dai_dma_data *dma_data;
653	struct davinci_mcbsp_dev *dev;	660	struct davinci_mcbsp_dev *dev;
654	struct resource mem, res;	661	struct resource mem, res;
655	void __iomem *io_base;	662	void __iomem *io_base;
656	int *dma;	663	int *dma;
657	int ret;	664	int ret;
658		665
659	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);	666	mem = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu");
		667	if (!mem) {
		668	dev_warn(&pdev->dev,
		669	"\"mpu\" mem resource not found, using index 0\n");
		670	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
		671	if (!mem) {
		672	dev_err(&pdev->dev, "no mem resource?\n");
		673	return -ENODEV;
		674	}
		675	}
		676
660	io_base = devm_ioremap_resource(&pdev->dev, mem);	677	io_base = devm_ioremap_resource(&pdev->dev, mem);
661	if (IS_ERR(io_base))	678	if (IS_ERR(io_base))
662	return PTR_ERR(io_base);	679	return PTR_ERR(io_base);
@@ -666,39 +683,43 @@ static int davinci_i2s_probe(struct platform_device *pdev) · 3 unmodified lines
666	if (!dev)	683	if (!dev)
667	return -ENOMEM;	684	return -ENOMEM;
668		685
669	dev->clk = clk_get(&pdev->dev, NULL);
670	if (IS_ERR(dev->clk))
671	return -ENODEV;
672	clk_enable(dev->clk);
673
674	dev->base = io_base;	686	dev->base = io_base;
675		687
676	dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].addr =	688	/* setup DMA, first TX, then RX */
677	(dma_addr_t)(mem->start + DAVINCI_MCBSP_DXR_REG);	689	dma_data = &dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK];
		690	dma_data->addr = (dma_addr_t)(mem->start + DAVINCI_MCBSP_DXR_REG);
678		691
679	dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].addr =
680	(dma_addr_t)(mem->start + DAVINCI_MCBSP_DRR_REG);
681
682	/* first TX, then RX */
683	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);	692	res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
684	if (!res) {	693	if (res) {
685	dev_err(&pdev->dev, "no DMA resource\n");	694	dma = &dev->dma_request[SNDRV_PCM_STREAM_PLAYBACK];
686	ret = -ENXIO;	695	*dma = res->start;
687	goto err_release_clk;	696	dma_data->filter_data = dma;
		697	} else if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
		698	dma_data->filter_data = "tx";
		699	} else {
		700	dev_err(&pdev->dev, "Missing DMA tx resource\n");
		701	return -ENODEV;
688	}	702	}
689	dma = &dev->dma_request[SNDRV_PCM_STREAM_PLAYBACK];	703
690	*dma = res->start;	704	dma_data = &dev->dma_data[SNDRV_PCM_STREAM_CAPTURE];
691	dev->dma_data[SNDRV_PCM_STREAM_PLAYBACK].filter_data = dma;	705	dma_data->addr = (dma_addr_t)(mem->start + DAVINCI_MCBSP_DRR_REG);
692		706
693	res = platform_get_resource(pdev, IORESOURCE_DMA, 1);	707	res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
694	if (!res) {	708	if (res) {
695	dev_err(&pdev->dev, "no DMA resource\n");	709	dma = &dev->dma_request[SNDRV_PCM_STREAM_CAPTURE];
696	ret = -ENXIO;	710	*dma = res->start;
697	goto err_release_clk;	711	dma_data->filter_data = dma;
		712	} else if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
		713	dma_data->filter_data = "rx";
		714	} else {
		715	dev_err(&pdev->dev, "Missing DMA rx resource\n");
		716	return -ENODEV;
698	}	717	}
699	dma = &dev->dma_request[SNDRV_PCM_STREAM_CAPTURE];	718
700	*dma = res->start;	719	dev->clk = clk_get(&pdev->dev, NULL);
701	dev->dma_data[SNDRV_PCM_STREAM_CAPTURE].filter_data = dma;	720	if (IS_ERR(dev->clk))
		721	return -ENODEV;
		722	clk_enable(dev->clk);
702		723
703	dev->dev = &pdev->dev;	724	dev->dev = &pdev->dev;
704	dev_set_drvdata(&pdev->dev, dev);	725	dev_set_drvdata(&pdev->dev, dev);
@@ -737,11 +758,18 @@ static int davinci_i2s_remove(struct platform_device *pdev) · 32 unmodified lines
737	return 0;	758	return 0;
738	}	759	}
739		760
		761	static const struct of_device_id davinci_i2s_match[] = {
		762	{ .compatible = "ti,da850-mcbsp" },
		763	{},
		764	};
		765	MODULE_DEVICE_TABLE(of, davinci_i2s_match);
		766
740	static struct platform_driver davinci_mcbsp_driver = {	767	static struct platform_driver davinci_mcbsp_driver = {
741	.probe = davinci_i2s_probe,	768	.probe = davinci_i2s_probe,
742	.remove = davinci_i2s_remove,	769	.remove = davinci_i2s_remove,
743	.driver = {	770	.driver = {
744	.name = "davinci-mcbsp",	771	.name = "davinci-mcbsp",
		772	.of_match_table = of_match_ptr(davinci_i2s_match),
745	},	773	},
746	};	774	};
747		775

sound/soc/davinci/davinci-mcasp.c+59−33

@@ -489,7 +489,7 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, · 488 unmodified lines
489	mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);	489	mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);
490		490
491	mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG,	491	mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG,
492	ACLKX \| AHCLKX \| AFSX \| ACLKR \| AHCLKR \| AFSR);	492	ACLKX \| AFSX \| ACLKR \| AHCLKR \| AFSR);
493	mcasp->bclk_master = 0;	493	mcasp->bclk_master = 0;
494	break;	494	break;
495	default:	495	default:
@@ -540,21 +540,19 @@ out: · 44 unmodified lines
540	return ret;	540	return ret;
541	}	541	}
542		542
543	static int __davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id,	543	static int __davinci_mcasp_set_clkdiv(struct davinci_mcasp *mcasp, int div_id,
544	int div, bool explicit)	544	int div, bool explicit)
545	{	545	{
546	struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
547
548	pm_runtime_get_sync(mcasp->dev);	546	pm_runtime_get_sync(mcasp->dev);
549	switch (div_id) {	547	switch (div_id) {
550	case 0: /* MCLK divider */	548	case MCASP_CLKDIV_AUXCLK: /* MCLK divider */
551	mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG,	549	mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG,
552	AHCLKXDIV(div - 1), AHCLKXDIV_MASK);	550	AHCLKXDIV(div - 1), AHCLKXDIV_MASK);
553	mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG,	551	mcasp_mod_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG,
554	AHCLKRDIV(div - 1), AHCLKRDIV_MASK);	552	AHCLKRDIV(div - 1), AHCLKRDIV_MASK);
555	break;	553	break;
556		554
557	case 1: /* BCLK divider */	555	case MCASP_CLKDIV_BCLK: /* BCLK divider */
558	mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG,	556	mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG,
559	ACLKXDIV(div - 1), ACLKXDIV_MASK);	557	ACLKXDIV(div - 1), ACLKXDIV_MASK);
560	mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG,	558	mcasp_mod_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG,
@@ -563,7 +561,8 @@ static int __davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, · 2 unmodified lines
563	mcasp->bclk_div = div;	561	mcasp->bclk_div = div;
564	break;	562	break;
565		563
566	case 2: /*	564	case MCASP_CLKDIV_BCLK_FS_RATIO:
		565	/*
567	* BCLK/LRCLK ratio descries how many bit-clock cycles	566	* BCLK/LRCLK ratio descries how many bit-clock cycles
568	* fit into one frame. The clock ratio is given for a	567	* fit into one frame. The clock ratio is given for a
569	* full period of data (for I2S format both left and	568	* full period of data (for I2S format both left and
@@ -591,7 +590,9 @@ static int __davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id, · 21 unmodified lines
591	static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id,	590	static int davinci_mcasp_set_clkdiv(struct snd_soc_dai *dai, int div_id,
592	int div)	591	int div)
593	{	592	{
594	return __davinci_mcasp_set_clkdiv(dai, div_id, div, 1);	593	struct davinci_mcasp *mcasp = snd_soc_dai_get_drvdata(dai);
		594
		595	return __davinci_mcasp_set_clkdiv(mcasp, div_id, div, 1);
595	}	596	}
596		597
597	static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id,	598	static int davinci_mcasp_set_sysclk(struct snd_soc_dai *dai, int clk_id,
@@ -999,27 +1000,53 @@ static int mcasp_dit_hw_param(struct davinci_mcasp *mcasp, · 401 unmodified lines
999	}	1000	}
1000		1001
1001	static int davinci_mcasp_calc_clk_div(struct davinci_mcasp *mcasp,	1002	static int davinci_mcasp_calc_clk_div(struct davinci_mcasp *mcasp,
1002	unsigned int bclk_freq,	1003	unsigned int bclk_freq, bool set)
1003	int *error_ppm)
1004	{	1004	{
1005	int div = mcasp->sysclk_freq / bclk_freq;	1005	int error_ppm;
1006	int rem = mcasp->sysclk_freq % bclk_freq;	1006	unsigned int sysclk_freq = mcasp->sysclk_freq;
		1007	u32 reg = mcasp_get_reg(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG);
		1008	int div = sysclk_freq / bclk_freq;
		1009	int rem = sysclk_freq % bclk_freq;
		1010	int aux_div = 1;
		1011
		1012	if (div > (ACLKXDIV_MASK + 1)) {
		1013	if (reg & AHCLKXE) {
		1014	aux_div = div / (ACLKXDIV_MASK + 1);
		1015	if (div % (ACLKXDIV_MASK + 1))
		1016	aux_div++;
		1017
		1018	sysclk_freq /= aux_div;
		1019	div = sysclk_freq / bclk_freq;
		1020	rem = sysclk_freq % bclk_freq;
		1021	} else if (set) {
		1022	dev_warn(mcasp->dev, "Too fast reference clock (%u)\n",
		1023	sysclk_freq);
		1024	}
		1025	}
1007		1026
1008	if (rem != 0) {	1027	if (rem != 0) {
1009	if (div == 0 \|\|	1028	if (div == 0 \|\|
1010	((mcasp->sysclk_freq / div) - bclk_freq) >	1029	((sysclk_freq / div) - bclk_freq) >
1011	(bclk_freq - (mcasp->sysclk_freq / (div+1)))) {	1030	(bclk_freq - (sysclk_freq / (div+1)))) {
1012	div++;	1031	div++;
1013	rem = rem - bclk_freq;	1032	rem = rem - bclk_freq;
1014	}	1033	}
1015	}	1034	}
1016	if (error_ppm)	1035	error_ppm = (div1000000 + (int)div64_long(1000000LLrem,
1017	*error_ppm =	1036	(int)bclk_freq)) / div - 1000000;
1018	(div1000000 + (int)div64_long(1000000LLrem,	1037
1019	(int)bclk_freq))	1038	if (set) {
1020	/div - 1000000;	1039	if (error_ppm)
		1040	dev_info(mcasp->dev, "Sample-rate is off by %d PPM\n",
		1041	error_ppm);
		1042
		1043	__davinci_mcasp_set_clkdiv(mcasp, MCASP_CLKDIV_BCLK, div, 0);
		1044	if (reg & AHCLKXE)
		1045	__davinci_mcasp_set_clkdiv(mcasp, MCASP_CLKDIV_AUXCLK,
		1046	aux_div, 0);
		1047	}
1021		1048
1022	return div;	1049	return error_ppm;
1023	}	1050	}
1024		1051
1025	static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,	1052	static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
@@ -1044,18 +1071,11 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, · 18 unmodified lines
1044	int slots = mcasp->tdm_slots;	1071	int slots = mcasp->tdm_slots;
1045	int rate = params_rate(params);	1072	int rate = params_rate(params);
1046	int sbits = params_width(params);	1073	int sbits = params_width(params);
1047	int ppm, div;
1048		1074
1049	if (mcasp->slot_width)	1075	if (mcasp->slot_width)
1050	sbits = mcasp->slot_width;	1076	sbits = mcasp->slot_width;
1051		1077
1052	div = davinci_mcasp_calc_clk_div(mcasp, ratesbitsslots,	1078	davinci_mcasp_calc_clk_div(mcasp, rate * sbits * slots, true);
1053	&ppm);
1054	if (ppm)
1055	dev_info(mcasp->dev, "Sample-rate is off by %d PPM\n",
1056	ppm);
1057
1058	__davinci_mcasp_set_clkdiv(cpu_dai, 1, div, 0);
1059	}	1079	}
1060		1080
1061	ret = mcasp_common_hw_param(mcasp, substream->stream,	1081	ret = mcasp_common_hw_param(mcasp, substream->stream,
@@ -1166,7 +1186,8 @@ static int davinci_mcasp_hw_rule_rate(struct snd_pcm_hw_params *params, · 104 unmodified lines
1166	davinci_mcasp_dai_rates[i];	1186	davinci_mcasp_dai_rates[i];
1167	int ppm;	1187	int ppm;
1168		1188
1169	davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq, &ppm);	1189	ppm = davinci_mcasp_calc_clk_div(rd->mcasp, bclk_freq,
		1190	false);
1170	if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {	1191	if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {
1171	if (range.empty) {	1192	if (range.empty) {
1172	range.min = davinci_mcasp_dai_rates[i];	1193	range.min = davinci_mcasp_dai_rates[i];
@@ -1205,8 +1226,9 @@ static int davinci_mcasp_hw_rule_format(struct snd_pcm_hw_params *params, · 32 unmodified lines
1205	if (rd->mcasp->slot_width)	1226	if (rd->mcasp->slot_width)
1206	sbits = rd->mcasp->slot_width;	1227	sbits = rd->mcasp->slot_width;
1207		1228
1208	davinci_mcasp_calc_clk_div(rd->mcasp, sbitsslotsrate,	1229	ppm = davinci_mcasp_calc_clk_div(rd->mcasp,
1209	&ppm);	1230	sbits * slots * rate,
		1231	false);
1210	if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {	1232	if (abs(ppm) < DAVINCI_MAX_RATE_ERROR_PPM) {
1211	snd_mask_set(&nfmt, i);	1233	snd_mask_set(&nfmt, i);
1212	count++;	1234	count++;
@@ -1230,11 +1252,15 @@ static int davinci_mcasp_startup(struct snd_pcm_substream *substream, · 17 unmodified lines
1230	int i, dir;	1252	int i, dir;
1231	int tdm_slots = mcasp->tdm_slots;	1253	int tdm_slots = mcasp->tdm_slots;
1232		1254
1233	if (mcasp->tdm_mask[substream->stream])	1255	/* Do not allow more then one stream per direction */
1234	tdm_slots = hweight32(mcasp->tdm_mask[substream->stream]);	1256	if (mcasp->substreams[substream->stream])
		1257	return -EBUSY;
1235		1258
1236	mcasp->substreams[substream->stream] = substream;	1259	mcasp->substreams[substream->stream] = substream;
1237		1260
		1261	if (mcasp->tdm_mask[substream->stream])
		1262	tdm_slots = hweight32(mcasp->tdm_mask[substream->stream]);
		1263
1238	if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE)	1264	if (mcasp->op_mode == DAVINCI_MCASP_DIT_MODE)
1239	return 0;	1265	return 0;
1240		1266

sound/soc/davinci/davinci-mcasp.h+5−0

@@ -306,4 +306,9 @@ · 305 unmodified lines
306	#define NUMEVT(x) (((x) & 0xFF) << 8)	306	#define NUMEVT(x) (((x) & 0xFF) << 8)
307	#define NUMDMA_MASK (0xFF)	307	#define NUMDMA_MASK (0xFF)
308		308
		309	/* clock divider IDs */
		310	#define MCASP_CLKDIV_AUXCLK 0 /* HCLK divider from AUXCLK */
		311	#define MCASP_CLKDIV_BCLK 1 /* BCLK divider from HCLK */
		312	#define MCASP_CLKDIV_BCLK_FS_RATIO 2 /* to set BCLK FS ration */
		313
309	#endif /* DAVINCI_MCASP_H */	314	#endif /* DAVINCI_MCASP_H */

sound/soc/dwc/designware_i2s.c+10−4

 	struct device *dev;
 	u32 ccr;
 	u32 xfer_resolution;
+	u32 fifo_th;
 	/* data related to DMA transfers b/w i2s and DMAC */
 	union dw_i2s_snd_dma_data play_dma_data;
 static void i2s_start(struct dw_i2s_dev *dev,
 		      struct snd_pcm_substream *substream)
 {
+	struct i2s_clk_config_data *config = &dev->config;
 	u32 i, irq;
 	i2s_write_reg(dev->i2s_base, IER, 1);
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-		for (i = 0; i < 4; i++) {
+		for (i = 0; i < (config->chan_nr / 2); i++) {
 			irq = i2s_read_reg(dev->i2s_base, IMR(i));
 			i2s_write_reg(dev->i2s_base, IMR(i), irq & ~0x30);
 		}
 		i2s_write_reg(dev->i2s_base, ITER, 1);
 	} else {
-		for (i = 0; i < 4; i++) {
+		for (i = 0; i < (config->chan_nr / 2); i++) {
 			irq = i2s_read_reg(dev->i2s_base, IMR(i));
 			i2s_write_reg(dev->i2s_base, IMR(i), irq & ~0x03);
 		}
 		if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
 			i2s_write_reg(dev->i2s_base, TCR(ch_reg),
 				      dev->xfer_resolution);
-			i2s_write_reg(dev->i2s_base, TFCR(ch_reg), 0x02);
+			i2s_write_reg(dev->i2s_base, TFCR(ch_reg),
+				      dev->fifo_th - 1);
 			irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
 			i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x30);
 			i2s_write_reg(dev->i2s_base, TER(ch_reg), 1);
 		} else {
 			i2s_write_reg(dev->i2s_base, RCR(ch_reg),
 				      dev->xfer_resolution);
-			i2s_write_reg(dev->i2s_base, RFCR(ch_reg), 0x07);
+			i2s_write_reg(dev->i2s_base, RFCR(ch_reg),
+				      dev->fifo_th - 1);
 			irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg));
 			i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x03);
 			i2s_write_reg(dev->i2s_base, RER(ch_reg), 1);
 	 */
 	u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1);
 	u32 comp2 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp2);
+	u32 fifo_depth = 1 << (1 + COMP1_FIFO_DEPTH_GLOBAL(comp1));
 	u32 idx;
 	if (dev->capability & DWC_I2S_RECORD &&
 		dev->capability |= DW_I2S_SLAVE;
 	}
+	dev->fifo_th = fifo_depth / 2;
 	return 0;
 }

sound/soc/fsl/fsl_sai.c+23−1

 #include <sound/core.h>
 #include <sound/dmaengine_pcm.h>
 #include <sound/pcm_params.h>
+#include <linux/mfd/syscon.h>
+#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
 #include "fsl_sai.h"
 #include "imx-pcm.h"
 {
 	struct device_node *np = pdev->dev.of_node;
 	struct fsl_sai *sai;
+	struct regmap *gpr;
 	struct resource *res;
 	void __iomem *base;
 	char tmp[8];
 	int irq, ret, i;
+	int index;
 	sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
 	if (!sai)
 	sai->pdev = pdev;
-	if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx6sx-sai"))
+	if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx6sx-sai") ||
+	    of_device_is_compatible(pdev->dev.of_node, "fsl,imx6ul-sai"))
 		sai->sai_on_imx = true;
 	sai->is_lsb_first = of_property_read_bool(np, "lsb-first");
 		fsl_sai_dai.symmetric_samplebits = 0;
 	}
+	if (of_find_property(np, "fsl,sai-mclk-direction-output", NULL) &&
+	    of_device_is_compatible(pdev->dev.of_node, "fsl,imx6ul-sai")) {
+		gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr");
+		if (IS_ERR(gpr)) {
+			dev_err(&pdev->dev, "cannot find iomuxc registers\n");
+			return PTR_ERR(gpr);
+		}
+		index = of_alias_get_id(np, "sai");
+		if (index < 0)
+			return index;
+		regmap_update_bits(gpr, IOMUXC_GPR1, MCLK_DIR(index),
+				   MCLK_DIR(index));
+	}
 	sai->dma_params_rx.addr = res->start + FSL_SAI_RDR;
 	sai->dma_params_tx.addr = res->start + FSL_SAI_TDR;
 	sai->dma_params_rx.maxburst = FSL_SAI_MAXBURST_RX;
 static const struct of_device_id fsl_sai_ids[] = {
 	{ .compatible = "fsl,vf610-sai", },
 	{ .compatible = "fsl,imx6sx-sai", },
+	{ .compatible = "fsl,imx6ul-sai", },
 	{ /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, fsl_sai_ids);

sound/soc/fsl/fsl_ssi.c+70−11

 	case CCSR_SSI_SACDAT:
 	case CCSR_SSI_SATAG:
 	case CCSR_SSI_SACCST:
+	case CCSR_SSI_SOR:
 		return true;
 	default:
 		return false;
 	struct fsl_ssi_dbg dbg_stats;
 	const struct fsl_ssi_soc_data *soc;
+	struct device *dev;
 };
 /*
 	}
 }
+/*
+ * Clear RX or TX FIFO to remove samples from the previous
+ * stream session which may be still present in the FIFO and
+ * may introduce bad samples and/or channel slipping.
+ *
+ * Note: The SOR is not documented in recent IMX datasheet, but
+ * is described in IMX51 reference manual at section 56.3.3.15.
+ */
+static void fsl_ssi_fifo_clear(struct fsl_ssi_private *ssi_private,
+		bool is_rx)
+{
+	if (is_rx) {
+		regmap_update_bits(ssi_private->regs, CCSR_SSI_SOR,
+			CCSR_SSI_SOR_RX_CLR, CCSR_SSI_SOR_RX_CLR);
+	} else {
+		regmap_update_bits(ssi_private->regs, CCSR_SSI_SOR,
+			CCSR_SSI_SOR_TX_CLR, CCSR_SSI_SOR_TX_CLR);
+	}
+}
 /*
  * Calculate the bits that have to be disabled for the current stream that is
  * getting disabled. This keeps the bits enabled that are necessary for the
 	 * (online configuration)
 	 */
 	if (enable) {
-		regmap_update_bits(regs, CCSR_SSI_SIER, vals->sier, vals->sier);
+		fsl_ssi_fifo_clear(ssi_private, vals->scr & CCSR_SSI_SCR_RE);
 		regmap_update_bits(regs, CCSR_SSI_SRCR, vals->srcr, vals->srcr);
 		regmap_update_bits(regs, CCSR_SSI_STCR, vals->stcr, vals->stcr);
+		regmap_update_bits(regs, CCSR_SSI_SIER, vals->sier, vals->sier);
 	} else {
 		u32 sier;
 		u32 srcr;
 config_done:
 	/* Enabling of subunits is done after configuration */
-	if (enable)
+	if (enable) {
+		if (ssi_private->use_dma && (vals->scr & CCSR_SSI_SCR_TE)) {
+			/*
+			 * Be sure the Tx FIFO is filled when TE is set.
+			 * Otherwise, there are some chances to start the
+			 * playback with some void samples inserted first,
+			 * generating a channel slip.
+			 *
+			 * First, SSIEN must be set, to let the FIFO be filled.
+			 *
+			 * Notes:
+			 * - Limit this fix to the DMA case until FIQ cases can
+			 *   be tested.
+			 * - Limit the length of the busy loop to not lock the
+			 *   system too long, even if 1-2 loops are sufficient
+			 *   in general.
+			 */
+			int i;
+			int max_loop = 100;
+			regmap_update_bits(regs, CCSR_SSI_SCR,
+					CCSR_SSI_SCR_SSIEN, CCSR_SSI_SCR_SSIEN);
+			for (i = 0; i < max_loop; i++) {
+				u32 sfcsr;
+				regmap_read(regs, CCSR_SSI_SFCSR, &sfcsr);
+				if (CCSR_SSI_SFCSR_TFCNT0(sfcsr))
+					break;
+			}
+			if (i == max_loop) {
+				dev_err(ssi_private->dev,
+					"Timeout waiting TX FIFO filling\n");
+			}
+		}
 		regmap_update_bits(regs, CCSR_SSI_SCR, vals->scr, vals->scr);
+	}
 }
 	if (IS_ERR(ssi_private->baudclk))
 		return -EINVAL;
+	/*
+	 * Hardware limitation: The bclk rate must be
+	 * never greater than 1/5 IPG clock rate
+	 */
+	if (freq * 5 > clk_get_rate(ssi_private->clk)) {
+		dev_err(cpu_dai->dev, "bitclk > ipgclk/5\n");
+		return -EINVAL;
+	}
 	baudclk_is_used = ssi_private->baudclk_streams & ~(BIT(substream->stream));
 	/* It should be already enough to divide clock by setting pm alone */
 		else
 			clkrate = clk_round_rate(ssi_private->baudclk, tmprate);
-		/*
-		 * Hardware limitation: The bclk rate must be
-		 * never greater than 1/5 IPG clock rate
-		 */
-		if (clkrate * 5 > clk_get_rate(ssi_private->clk))
-			continue;
 		clkrate /= factor;
 		afreq = clkrate / (i + 1);
 	.playback = {
 		.stream_name = "CPU-Playback",
 		.channels_min = 1,
-		.channels_max = 2,
+		.channels_max = 32,
 		.rates = FSLSSI_I2S_RATES,
 		.formats = FSLSSI_I2S_FORMATS,
 	},
 	.capture = {
 		.stream_name = "CPU-Capture",
 		.channels_min = 1,
-		.channels_max = 2,
+		.channels_max = 32,
 		.rates = FSLSSI_I2S_RATES,
 		.formats = FSLSSI_I2S_FORMATS,
 	},
 	}
 	ssi_private->soc = of_id->data;
+	ssi_private->dev = &pdev->dev;
 	sprop = of_get_property(np, "fsl,mode", NULL);
 	if (sprop) {

sound/soc/fsl/imx-pcm-fiq.c+1−1

@@ -220,7 +220,7 @@ static int snd_imx_pcm_mmap(struct snd_pcm_substream *substream, · 219 unmodified lines
220	ret = dma_mmap_wc(substream->pcm->card->dev, vma, runtime->dma_area,	220	ret = dma_mmap_wc(substream->pcm->card->dev, vma, runtime->dma_area,
221	runtime->dma_addr, runtime->dma_bytes);	221	runtime->dma_addr, runtime->dma_bytes);
222		222
223	pr_debug("%s: ret: %d %p %pad 0x%08x\n", __func__, ret,	223	pr_debug("%s: ret: %d %p %pad 0x%08zx\n", __func__, ret,
224	runtime->dma_area,	224	runtime->dma_area,
225	&runtime->dma_addr,	225	&runtime->dma_addr,
226	runtime->dma_bytes);	226	runtime->dma_bytes);

sound/soc/intel/Kconfig+16−0

@@ -58,6 +58,21 @@ config SND_SOC_INTEL_HASWELL_MACH · 57 unmodified lines
58	Say Y if you have such a device	58	Say Y if you have such a device
59	If unsure select "N".	59	If unsure select "N".
60		60
		61	config SND_SOC_INTEL_BXT_RT298_MACH
		62	tristate "ASoC Audio driver for Broxton with RT298 I2S mode"
		63	depends on X86 && ACPI && I2C
		64	select SND_SOC_INTEL_SST
		65	select SND_SOC_INTEL_SKYLAKE
		66	select SND_SOC_RT298
		67	select SND_SOC_DMIC
		68	select SND_SOC_HDAC_HDMI
		69	select SND_HDA_DSP_LOADER
		70	help
		71	This adds support for ASoC machine driver for Broxton platforms
		72	with RT286 I2S audio codec.
		73	Say Y if you have such a device
		74	If unsure select "N".
		75
61	config SND_SOC_INTEL_BYT_RT5640_MACH	76	config SND_SOC_INTEL_BYT_RT5640_MACH
62	tristate "ASoC Audio driver for Intel Baytrail with RT5640 codec"	77	tristate "ASoC Audio driver for Intel Baytrail with RT5640 codec"
63	depends on X86_INTEL_LPSS && I2C	78	depends on X86_INTEL_LPSS && I2C
@@ -162,6 +177,7 @@ config SND_SOC_INTEL_CHT_BSW_MAX98090_TI_MACH · 98 unmodified lines
162	config SND_SOC_INTEL_SKYLAKE	177	config SND_SOC_INTEL_SKYLAKE
163	tristate	178	tristate
164	select SND_HDA_EXT_CORE	179	select SND_HDA_EXT_CORE
		180	select SND_HDA_DSP_LOADER
165	select SND_SOC_TOPOLOGY	181	select SND_SOC_TOPOLOGY
166	select SND_SOC_INTEL_SST	182	select SND_SOC_INTEL_SST
167		183

sound/soc/intel/atom/sst-atom-controls.c+1−1

@@ -195,7 +195,7 @@ static int sst_check_and_send_slot_map(struct sst_data *drv, struct snd_kcontrol · 194 unmodified lines
195		195
196	if (e->w && e->w->power)	196	if (e->w && e->w->power)
197	ret = sst_send_slot_map(drv);	197	ret = sst_send_slot_map(drv);
198	else	198	else if (!e->w)
199	dev_err(&drv->pdev->dev, "Slot control: %s doesn't have DAPM widget!!!\n",	199	dev_err(&drv->pdev->dev, "Slot control: %s doesn't have DAPM widget!!!\n",
200	kcontrol->id.name);	200	kcontrol->id.name);
201	return ret;	201	return ret;

sound/soc/intel/boards/Makefile+2−0

 snd-soc-sst-byt-rt5640-mach-objs := byt-rt5640.o
 snd-soc-sst-byt-max98090-mach-objs := byt-max98090.o
 snd-soc-sst-broadwell-objs := broadwell.o
+snd-soc-sst-bxt-rt298-objs := bxt_rt298.o
 snd-soc-sst-bytcr-rt5640-objs := bytcr_rt5640.o
 snd-soc-sst-bytcr-rt5651-objs := bytcr_rt5651.o
 snd-soc-sst-cht-bsw-rt5672-objs := cht_bsw_rt5672.o
 obj-$(CONFIG_SND_SOC_INTEL_HASWELL_MACH) += snd-soc-sst-haswell.o
 obj-$(CONFIG_SND_SOC_INTEL_BYT_RT5640_MACH) += snd-soc-sst-byt-rt5640-mach.o
 obj-$(CONFIG_SND_SOC_INTEL_BYT_MAX98090_MACH) += snd-soc-sst-byt-max98090-mach.o
+obj-$(CONFIG_SND_SOC_INTEL_BXT_RT298_MACH) += snd-soc-sst-bxt-rt298.o
 obj-$(CONFIG_SND_SOC_INTEL_BROADWELL_MACH) += snd-soc-sst-broadwell.o
 obj-$(CONFIG_SND_SOC_INTEL_BYTCR_RT5640_MACH) += snd-soc-sst-bytcr-rt5640.o
 obj-$(CONFIG_SND_SOC_INTEL_BYTCR_RT5651_MACH) += snd-soc-sst-bytcr-rt5651.o

sound/soc/intel/boards/broadwell.c+1−1

@@ -201,7 +201,7 @@ static struct snd_soc_dai_link broadwell_rt286_dais[] = { · 200 unmodified lines
201	{	201	{
202	/* SSP0 - Codec */	202	/* SSP0 - Codec */
203	.name = "Codec",	203	.name = "Codec",
204	.be_id = 0,	204	.id = 0,
205	.cpu_dai_name = "snd-soc-dummy-dai",	205	.cpu_dai_name = "snd-soc-dummy-dai",
206	.platform_name = "snd-soc-dummy",	206	.platform_name = "snd-soc-dummy",
207	.no_pcm = 1,	207	.no_pcm = 1,

sound/soc/intel/boards/bxt_rt298.c+353−0

@@ -0,0 +1,353 @@
	1	/*
	2	* Intel Broxton-P I2S Machine Driver
	3	*
	4	* Copyright (C) 2014-2016, Intel Corporation. All rights reserved.
	5	*
	6	* Modified from:
	7	* Intel Skylake I2S Machine driver
	8	*
	9	* This program is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License version
	11	* 2 as published by the Free Software Foundation.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*/
	18
	19	#include <linux/module.h>
	20	#include <linux/platform_device.h>
	21	#include <sound/core.h>
	22	#include <sound/pcm.h>
	23	#include <sound/soc.h>
	24	#include <sound/jack.h>
	25	#include <sound/pcm_params.h>
	26	#include "../../codecs/hdac_hdmi.h"
	27	#include "../../codecs/rt298.h"
	28
	29	static struct snd_soc_jack broxton_headset;
	30	/* Headset jack detection DAPM pins */
	31
	32	enum {
	33	BXT_DPCM_AUDIO_PB = 0,
	34	BXT_DPCM_AUDIO_CP,
	35	BXT_DPCM_AUDIO_REF_CP,
	36	BXT_DPCM_AUDIO_HDMI1_PB,
	37	BXT_DPCM_AUDIO_HDMI2_PB,
	38	BXT_DPCM_AUDIO_HDMI3_PB,
	39	};
	40
	41	static struct snd_soc_jack_pin broxton_headset_pins[] = {
	42	{
	43	.pin = "Mic Jack",
	44	.mask = SND_JACK_MICROPHONE,
	45	},
	46	{
	47	.pin = "Headphone Jack",
	48	.mask = SND_JACK_HEADPHONE,
	49	},
	50	};
	51
	52	static const struct snd_kcontrol_new broxton_controls[] = {
	53	SOC_DAPM_PIN_SWITCH("Speaker"),
	54	SOC_DAPM_PIN_SWITCH("Headphone Jack"),
	55	SOC_DAPM_PIN_SWITCH("Mic Jack"),
	56	};
	57
	58	static const struct snd_soc_dapm_widget broxton_widgets[] = {
	59	SND_SOC_DAPM_HP("Headphone Jack", NULL),
	60	SND_SOC_DAPM_SPK("Speaker", NULL),
	61	SND_SOC_DAPM_MIC("Mic Jack", NULL),
	62	SND_SOC_DAPM_MIC("DMIC2", NULL),
	63	SND_SOC_DAPM_MIC("SoC DMIC", NULL),
	64	SND_SOC_DAPM_SPK("HDMI1", NULL),
	65	SND_SOC_DAPM_SPK("HDMI2", NULL),
	66	SND_SOC_DAPM_SPK("HDMI3", NULL),
	67	};
	68
	69	static const struct snd_soc_dapm_route broxton_rt298_map[] = {
	70	/* speaker */
	71	{"Speaker", NULL, "SPOR"},
	72	{"Speaker", NULL, "SPOL"},
	73
	74	/* HP jack connectors - unknown if we have jack detect */
	75	{"Headphone Jack", NULL, "HPO Pin"},
	76
	77	/* other jacks */
	78	{"MIC1", NULL, "Mic Jack"},
	79
	80	/* digital mics */
	81	{"DMIC1 Pin", NULL, "DMIC2"},
	82	{"DMic", NULL, "SoC DMIC"},
	83
	84	{"HDMI1", NULL, "hif5 Output"},
	85	{"HDMI2", NULL, "hif6 Output"},
	86	{"HDMI3", NULL, "hif7 Output"},
	87
	88	/* CODEC BE connections */
	89	{ "AIF1 Playback", NULL, "ssp5 Tx"},
	90	{ "ssp5 Tx", NULL, "codec0_out"},
	91
	92	{ "codec0_in", NULL, "ssp5 Rx" },
	93	{ "ssp5 Rx", NULL, "AIF1 Capture" },
	94
	95	{ "dmic01_hifi", NULL, "DMIC01 Rx" },
	96	{ "DMIC01 Rx", NULL, "Capture" },
	97
	98	{ "hifi3", NULL, "iDisp3 Tx"},
	99	{ "iDisp3 Tx", NULL, "iDisp3_out"},
	100	{ "hifi2", NULL, "iDisp2 Tx"},
	101	{ "iDisp2 Tx", NULL, "iDisp2_out"},
	102	{ "hifi1", NULL, "iDisp1 Tx"},
	103	{ "iDisp1 Tx", NULL, "iDisp1_out"},
	104
	105	};
	106
	107	static int broxton_rt298_codec_init(struct snd_soc_pcm_runtime *rtd)
	108	{
	109	struct snd_soc_codec *codec = rtd->codec;
	110	int ret = 0;
	111
	112	ret = snd_soc_card_jack_new(rtd->card, "Headset",
	113	SND_JACK_HEADSET \| SND_JACK_BTN_0,
	114	&broxton_headset,
	115	broxton_headset_pins, ARRAY_SIZE(broxton_headset_pins));
	116
	117	if (ret)
	118	return ret;
	119
	120	rt298_mic_detect(codec, &broxton_headset);
	121	return 0;
	122	}
	123
	124	static int broxton_hdmi_init(struct snd_soc_pcm_runtime *rtd)
	125	{
	126	struct snd_soc_dai *dai = rtd->codec_dai;
	127
	128	return hdac_hdmi_jack_init(dai, BXT_DPCM_AUDIO_HDMI1_PB + dai->id);
	129	}
	130
	131	static int broxton_ssp5_fixup(struct snd_soc_pcm_runtime *rtd,
	132	struct snd_pcm_hw_params *params)
	133	{
	134	struct snd_interval *rate = hw_param_interval(params,
	135	SNDRV_PCM_HW_PARAM_RATE);
	136	struct snd_interval *channels = hw_param_interval(params,
	137	SNDRV_PCM_HW_PARAM_CHANNELS);
	138	struct snd_mask *fmt = hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT);
	139
	140	/* The ADSP will covert the FE rate to 48k, stereo */
	141	rate->min = rate->max = 48000;
	142	channels->min = channels->max = 2;
	143
	144	/* set SSP5 to 24 bit */
	145	snd_mask_none(fmt);
	146	snd_mask_set(fmt, SNDRV_PCM_FORMAT_S24_LE);
	147
	148	return 0;
	149	}
	150
	151	static int broxton_rt298_hw_params(struct snd_pcm_substream *substream,
	152	struct snd_pcm_hw_params *params)
	153	{
	154	struct snd_soc_pcm_runtime *rtd = substream->private_data;
	155	struct snd_soc_dai *codec_dai = rtd->codec_dai;
	156	int ret;
	157
	158	ret = snd_soc_dai_set_sysclk(codec_dai, RT298_SCLK_S_PLL,
	159	19200000, SND_SOC_CLOCK_IN);
	160	if (ret < 0) {
	161	dev_err(rtd->dev, "can't set codec sysclk configuration\n");
	162	return ret;
	163	}
	164
	165	return ret;
	166	}
	167
	168	static struct snd_soc_ops broxton_rt298_ops = {
	169	.hw_params = broxton_rt298_hw_params,
	170	};
	171
	172	/* broxton digital audio interface glue - connects codec <--> CPU */
	173	static struct snd_soc_dai_link broxton_rt298_dais[] = {
	174	/* Front End DAI links */
	175	[BXT_DPCM_AUDIO_PB]
	176	{
	177	.name = "Bxt Audio Port",
	178	.stream_name = "Audio",
	179	.cpu_dai_name = "System Pin",
	180	.platform_name = "0000:00:0e.0",
	181	.nonatomic = 1,
	182	.dynamic = 1,
	183	.codec_name = "snd-soc-dummy",
	184	.codec_dai_name = "snd-soc-dummy-dai",
	185	.trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST},
	186	.dpcm_playback = 1,
	187	},
	188	[BXT_DPCM_AUDIO_CP]
	189	{
	190	.name = "Bxt Audio Capture Port",
	191	.stream_name = "Audio Record",
	192	.cpu_dai_name = "System Pin",
	193	.platform_name = "0000:00:0e.0",
	194	.nonatomic = 1,
	195	.dynamic = 1,
	196	.codec_name = "snd-soc-dummy",
	197	.codec_dai_name = "snd-soc-dummy-dai",
	198	.trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST},
	199	.dpcm_capture = 1,
	200	},
	201	[BXT_DPCM_AUDIO_REF_CP]
	202	{
	203	.name = "Bxt Audio Reference cap",
	204	.stream_name = "refcap",
	205	.cpu_dai_name = "Reference Pin",
	206	.codec_name = "snd-soc-dummy",
	207	.codec_dai_name = "snd-soc-dummy-dai",
	208	.platform_name = "0000:00:0e.0",
	209	.init = NULL,
	210	.dpcm_capture = 1,
	211	.nonatomic = 1,
	212	.dynamic = 1,
	213	},
	214	[BXT_DPCM_AUDIO_HDMI1_PB]
	215	{
	216	.name = "Bxt HDMI Port1",
	217	.stream_name = "Hdmi1",
	218	.cpu_dai_name = "HDMI1 Pin",
	219	.codec_name = "snd-soc-dummy",
	220	.codec_dai_name = "snd-soc-dummy-dai",
	221	.platform_name = "0000:00:0e.0",
	222	.dpcm_playback = 1,
	223	.init = NULL,
	224	.nonatomic = 1,
	225	.dynamic = 1,
	226	},
	227	[BXT_DPCM_AUDIO_HDMI2_PB]
	228	{
	229	.name = "Bxt HDMI Port2",
	230	.stream_name = "Hdmi2",
	231	.cpu_dai_name = "HDMI2 Pin",
	232	.codec_name = "snd-soc-dummy",
	233	.codec_dai_name = "snd-soc-dummy-dai",
	234	.platform_name = "0000:00:0e.0",
	235	.dpcm_playback = 1,
	236	.init = NULL,
	237	.nonatomic = 1,
	238	.dynamic = 1,
	239	},
	240	[BXT_DPCM_AUDIO_HDMI3_PB]
	241	{
	242	.name = "Bxt HDMI Port3",
	243	.stream_name = "Hdmi3",
	244	.cpu_dai_name = "HDMI3 Pin",
	245	.codec_name = "snd-soc-dummy",
	246	.codec_dai_name = "snd-soc-dummy-dai",
	247	.platform_name = "0000:00:0e.0",
	248	.dpcm_playback = 1,
	249	.init = NULL,
	250	.nonatomic = 1,
	251	.dynamic = 1,
	252	},
	253	/* Back End DAI links */
	254	{
	255	/* SSP5 - Codec */
	256	.name = "SSP5-Codec",
	257	.id = 0,
	258	.cpu_dai_name = "SSP5 Pin",
	259	.platform_name = "0000:00:0e.0",
	260	.no_pcm = 1,
	261	.codec_name = "i2c-INT343A:00",
	262	.codec_dai_name = "rt298-aif1",
	263	.init = broxton_rt298_codec_init,
	264	.dai_fmt = SND_SOC_DAIFMT_DSP_A \| SND_SOC_DAIFMT_NB_NF \|
	265	SND_SOC_DAIFMT_CBS_CFS,
	266	.ignore_pmdown_time = 1,
	267	.be_hw_params_fixup = broxton_ssp5_fixup,
	268	.ops = &broxton_rt298_ops,
	269	.dpcm_playback = 1,
	270	.dpcm_capture = 1,
	271	},
	272	{
	273	.name = "dmic01",
	274	.id = 1,
	275	.cpu_dai_name = "DMIC01 Pin",
	276	.codec_name = "dmic-codec",
	277	.codec_dai_name = "dmic-hifi",
	278	.platform_name = "0000:00:0e.0",
	279	.ignore_suspend = 1,
	280	.dpcm_capture = 1,
	281	.no_pcm = 1,
	282	},
	283	{
	284	.name = "iDisp1",
	285	.id = 3,
	286	.cpu_dai_name = "iDisp1 Pin",
	287	.codec_name = "ehdaudio0D2",
	288	.codec_dai_name = "intel-hdmi-hifi1",
	289	.platform_name = "0000:00:0e.0",
	290	.init = broxton_hdmi_init,
	291	.dpcm_playback = 1,
	292	.no_pcm = 1,
	293	},
	294	{
	295	.name = "iDisp2",
	296	.id = 4,
	297	.cpu_dai_name = "iDisp2 Pin",
	298	.codec_name = "ehdaudio0D2",
	299	.codec_dai_name = "intel-hdmi-hifi2",
	300	.platform_name = "0000:00:0e.0",
	301	.init = broxton_hdmi_init,
	302	.dpcm_playback = 1,
	303	.no_pcm = 1,
	304	},
	305	{
	306	.name = "iDisp3",
	307	.id = 5,
	308	.cpu_dai_name = "iDisp3 Pin",
	309	.codec_name = "ehdaudio0D2",
	310	.codec_dai_name = "intel-hdmi-hifi3",
	311	.platform_name = "0000:00:0e.0",
	312	.init = broxton_hdmi_init,
	313	.dpcm_playback = 1,
	314	.no_pcm = 1,
	315	},
	316	};
	317
	318	/* broxton audio machine driver for SPT + RT298S */
	319	static struct snd_soc_card broxton_rt298 = {
	320	.name = "broxton-rt298",
	321	.owner = THIS_MODULE,
	322	.dai_link = broxton_rt298_dais,
	323	.num_links = ARRAY_SIZE(broxton_rt298_dais),
	324	.controls = broxton_controls,
	325	.num_controls = ARRAY_SIZE(broxton_controls),
	326	.dapm_widgets = broxton_widgets,
	327	.num_dapm_widgets = ARRAY_SIZE(broxton_widgets),
	328	.dapm_routes = broxton_rt298_map,
	329	.num_dapm_routes = ARRAY_SIZE(broxton_rt298_map),
	330	.fully_routed = true,
	331	};
	332
	333	static int broxton_audio_probe(struct platform_device *pdev)
	334	{
	335	broxton_rt298.dev = &pdev->dev;
	336
	337	return devm_snd_soc_register_card(&pdev->dev, &broxton_rt298);
	338	}
	339
	340	static struct platform_driver broxton_audio = {
	341	.probe = broxton_audio_probe,
	342	.driver = {
	343	.name = "bxt_alc298s_i2s",
	344	},
	345	};
	346	module_platform_driver(broxton_audio)
	347
	348	/* Module information */
	349	MODULE_AUTHOR("Ramesh Babu <Ramesh.Babu@intel.com>");
	350	MODULE_AUTHOR("Senthilnathan Veppur <senthilnathanx.veppur@intel.com>");
	351	MODULE_DESCRIPTION("Intel SST Audio for Broxton");
	352	MODULE_LICENSE("GPL v2");
	353	MODULE_ALIAS("platform:bxt_alc298s_i2s");

sound/soc/intel/boards/bytcr_rt5640.c+1−1

@@ -304,7 +304,7 @@ static struct snd_soc_dai_link byt_rt5640_dais[] = { · 303 unmodified lines
304	/* back ends */	304	/* back ends */
305	{	305	{
306	.name = "SSP2-Codec",	306	.name = "SSP2-Codec",
307	.be_id = 1,	307	.id = 1,
308	.cpu_dai_name = "ssp2-port",	308	.cpu_dai_name = "ssp2-port",
309	.platform_name = "sst-mfld-platform",	309	.platform_name = "sst-mfld-platform",
310	.no_pcm = 1,	310	.no_pcm = 1,

sound/soc/intel/boards/bytcr_rt5651.c+1−1

@@ -267,7 +267,7 @@ static struct snd_soc_dai_link byt_rt5651_dais[] = { · 266 unmodified lines
267	/* back ends */	267	/* back ends */
268	{	268	{
269	.name = "SSP2-Codec",	269	.name = "SSP2-Codec",
270	.be_id = 1,	270	.id = 1,
271	.cpu_dai_name = "ssp2-port",	271	.cpu_dai_name = "ssp2-port",
272	.platform_name = "sst-mfld-platform",	272	.platform_name = "sst-mfld-platform",
273	.no_pcm = 1,	273	.no_pcm = 1,

sound/soc/intel/boards/cht_bsw_max98090_ti.c+1−1

@@ -255,7 +255,7 @@ static struct snd_soc_dai_link cht_dailink[] = { · 254 unmodified lines
255	/* back ends */	255	/* back ends */
256	{	256	{
257	.name = "SSP2-Codec",	257	.name = "SSP2-Codec",
258	.be_id = 1,	258	.id = 1,
259	.cpu_dai_name = "ssp2-port",	259	.cpu_dai_name = "ssp2-port",
260	.platform_name = "sst-mfld-platform",	260	.platform_name = "sst-mfld-platform",
261	.no_pcm = 1,	261	.no_pcm = 1,

sound/soc/intel/boards/cht_bsw_rt5645.c+1−1

@@ -295,7 +295,7 @@ static struct snd_soc_dai_link cht_dailink[] = { · 294 unmodified lines
295	/* back ends */	295	/* back ends */
296	{	296	{
297	.name = "SSP2-Codec",	297	.name = "SSP2-Codec",
298	.be_id = 1,	298	.id = 1,
299	.cpu_dai_name = "ssp2-port",	299	.cpu_dai_name = "ssp2-port",
300	.platform_name = "sst-mfld-platform",	300	.platform_name = "sst-mfld-platform",
301	.no_pcm = 1,	301	.no_pcm = 1,

sound/soc/intel/boards/cht_bsw_rt5672.c+1−1

@@ -273,7 +273,7 @@ static struct snd_soc_dai_link cht_dailink[] = { · 272 unmodified lines
273	{	273	{
274	/* SSP2 - Codec */	274	/* SSP2 - Codec */
275	.name = "SSP2-Codec",	275	.name = "SSP2-Codec",
276	.be_id = 1,	276	.id = 1,
277	.cpu_dai_name = "ssp2-port",	277	.cpu_dai_name = "ssp2-port",
278	.platform_name = "sst-mfld-platform",	278	.platform_name = "sst-mfld-platform",
279	.no_pcm = 1,	279	.no_pcm = 1,

sound/soc/intel/boards/haswell.c+1−1

@@ -156,7 +156,7 @@ static struct snd_soc_dai_link haswell_rt5640_dais[] = { · 155 unmodified lines
156	{	156	{
157	/* SSP0 - Codec */	157	/* SSP0 - Codec */
158	.name = "Codec",	158	.name = "Codec",
159	.be_id = 0,	159	.id = 0,
160	.cpu_dai_name = "snd-soc-dummy-dai",	160	.cpu_dai_name = "snd-soc-dummy-dai",
161	.platform_name = "snd-soc-dummy",	161	.platform_name = "snd-soc-dummy",
162	.no_pcm = 1,	162	.no_pcm = 1,

sound/soc/intel/boards/skl_nau88l25_max98357a.c+77−10

 static struct snd_soc_jack skylake_headset;
 static struct snd_soc_card skylake_audio_card;
+struct skl_hdmi_pcm {
+	struct list_head head;
+	struct snd_soc_dai *codec_dai;
+	int device;
+};
+struct skl_nau8825_private {
+	struct list_head hdmi_pcm_list;
+};
 enum {
 	SKL_DPCM_AUDIO_PB = 0,
 	SKL_DPCM_AUDIO_CP,
 static int skylake_hdmi1_init(struct snd_soc_pcm_runtime *rtd)
 {
+	struct skl_nau8825_private *ctx = snd_soc_card_get_drvdata(rtd->card);
 	struct snd_soc_dai *dai = rtd->codec_dai;
+	struct skl_hdmi_pcm *pcm;
+	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
+	if (!pcm)
+		return -ENOMEM;
+	pcm->device = SKL_DPCM_AUDIO_HDMI1_PB;
+	pcm->codec_dai = dai;
-	return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI1_PB);
+	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
+	return 0;
 }
 static int skylake_hdmi2_init(struct snd_soc_pcm_runtime *rtd)
 {
+	struct skl_nau8825_private *ctx = snd_soc_card_get_drvdata(rtd->card);
 	struct snd_soc_dai *dai = rtd->codec_dai;
+	struct skl_hdmi_pcm *pcm;
+	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
+	if (!pcm)
+		return -ENOMEM;
+	pcm->device = SKL_DPCM_AUDIO_HDMI2_PB;
+	pcm->codec_dai = dai;
-	return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI2_PB);
+	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
+	return 0;
 }
 static int skylake_hdmi3_init(struct snd_soc_pcm_runtime *rtd)
 {
+	struct skl_nau8825_private *ctx = snd_soc_card_get_drvdata(rtd->card);
 	struct snd_soc_dai *dai = rtd->codec_dai;
+	struct skl_hdmi_pcm *pcm;
+	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
+	if (!pcm)
+		return -ENOMEM;
-	return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI3_PB);
+	pcm->device = SKL_DPCM_AUDIO_HDMI3_PB;
+	pcm->codec_dai = dai;
+	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
+	return 0;
 }
 static int skylake_nau8825_fe_init(struct snd_soc_pcm_runtime *rtd)
 		.platform_name = "0000:00:1f.3",
 		.init = NULL,
 		.dpcm_capture = 1,
-		.ignore_suspend = 1,
 		.nonatomic = 1,
 		.dynamic = 1,
 		.ops = &skylaye_refcap_ops,
 	{
 		/* SSP0 - Codec */
 		.name = "SSP0-Codec",
-		.be_id = 0,
+		.id = 0,
 		.cpu_dai_name = "SSP0 Pin",
 		.platform_name = "0000:00:1f.3",
 		.no_pcm = 1,
 	{
 		/* SSP1 - Codec */
 		.name = "SSP1-Codec",
-		.be_id = 1,
+		.id = 1,
 		.cpu_dai_name = "SSP1 Pin",
 		.platform_name = "0000:00:1f.3",
 		.no_pcm = 1,
 	},
 	{
 		.name = "dmic01",
-		.be_id = 2,
+		.id = 2,
 		.cpu_dai_name = "DMIC01 Pin",
 		.codec_name = "dmic-codec",
 		.codec_dai_name = "dmic-hifi",
 	},
 	{
 		.name = "iDisp1",
-		.be_id = 3,
+		.id = 3,
 		.cpu_dai_name = "iDisp1 Pin",
 		.codec_name = "ehdaudio0D2",
 		.codec_dai_name = "intel-hdmi-hifi1",
 	},
 	{
 		.name = "iDisp2",
-		.be_id = 4,
+		.id = 4,
 		.cpu_dai_name = "iDisp2 Pin",
 		.codec_name = "ehdaudio0D2",
 		.codec_dai_name = "intel-hdmi-hifi2",
 	},
 	{
 		.name = "iDisp3",
-		.be_id = 5,
+		.id = 5,
 		.cpu_dai_name = "iDisp3 Pin",
 		.codec_name = "ehdaudio0D2",
 		.codec_dai_name = "intel-hdmi-hifi3",
 	},
 };
+static int skylake_card_late_probe(struct snd_soc_card *card)
+{
+	struct skl_nau8825_private *ctx = snd_soc_card_get_drvdata(card);
+	struct skl_hdmi_pcm *pcm;
+	int err;
+	list_for_each_entry(pcm, &ctx->hdmi_pcm_list, head) {
+		err = hdac_hdmi_jack_init(pcm->codec_dai, pcm->device);
+		if (err < 0)
+			return err;
+	}
+	return 0;
+}
 /* skylake audio machine driver for SPT + NAU88L25 */
 static struct snd_soc_card skylake_audio_card = {
 	.name = "sklnau8825max",
 	.dapm_routes = skylake_map,
 	.num_dapm_routes = ARRAY_SIZE(skylake_map),
 	.fully_routed = true,
+	.late_probe = skylake_card_late_probe,
 };
 static int skylake_audio_probe(struct platform_device *pdev)
 {
+	struct skl_nau8825_private *ctx;
+	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_ATOMIC);
+	if (!ctx)
+		return -ENOMEM;
+	INIT_LIST_HEAD(&ctx->hdmi_pcm_list);
 	skylake_audio_card.dev = &pdev->dev;
+	snd_soc_card_set_drvdata(&skylake_audio_card, ctx);
 	return devm_snd_soc_register_card(&pdev->dev, &skylake_audio_card);
 }

sound/soc/intel/boards/skl_nau88l25_ssm4567.c+76−10

 static struct snd_soc_jack skylake_headset;
 static struct snd_soc_card skylake_audio_card;
+struct skl_hdmi_pcm {
+	struct list_head head;
+	struct snd_soc_dai *codec_dai;
+	int device;
+};
+struct skl_nau88125_private {
+	struct list_head hdmi_pcm_list;
+};
 enum {
 	SKL_DPCM_AUDIO_PB = 0,
 	SKL_DPCM_AUDIO_CP,
 static int skylake_hdmi1_init(struct snd_soc_pcm_runtime *rtd)
 {
+	struct skl_nau88125_private *ctx = snd_soc_card_get_drvdata(rtd->card);
 	struct snd_soc_dai *dai = rtd->codec_dai;
+	struct skl_hdmi_pcm *pcm;
+	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
+	if (!pcm)
+		return -ENOMEM;
+	pcm->device = SKL_DPCM_AUDIO_HDMI1_PB;
+	pcm->codec_dai = dai;
+	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
-	return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI1_PB);
+	return 0;
 }
 static int skylake_hdmi2_init(struct snd_soc_pcm_runtime *rtd)
 {
+	struct skl_nau88125_private *ctx = snd_soc_card_get_drvdata(rtd->card);
 	struct snd_soc_dai *dai = rtd->codec_dai;
+	struct skl_hdmi_pcm *pcm;
+	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
+	if (!pcm)
+		return -ENOMEM;
+	pcm->device = SKL_DPCM_AUDIO_HDMI2_PB;
+	pcm->codec_dai = dai;
-	return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI2_PB);
+	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
+	return 0;
 }
 static int skylake_hdmi3_init(struct snd_soc_pcm_runtime *rtd)
 {
+	struct skl_nau88125_private *ctx = snd_soc_card_get_drvdata(rtd->card);
 	struct snd_soc_dai *dai = rtd->codec_dai;
+	struct skl_hdmi_pcm *pcm;
+	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
+	if (!pcm)
+		return -ENOMEM;
-	return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI3_PB);
+	pcm->device = SKL_DPCM_AUDIO_HDMI3_PB;
+	pcm->codec_dai = dai;
+	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
+	return 0;
 }
 static int skylake_nau8825_fe_init(struct snd_soc_pcm_runtime *rtd)
 		.platform_name = "0000:00:1f.3",
 		.init = NULL,
 		.dpcm_capture = 1,
-		.ignore_suspend = 1,
 		.nonatomic = 1,
 		.dynamic = 1,
 		.ops = &skylaye_refcap_ops,
 	{
 		/* SSP0 - Codec */
 		.name = "SSP0-Codec",
-		.be_id = 0,
+		.id = 0,
 		.cpu_dai_name = "SSP0 Pin",
 		.platform_name = "0000:00:1f.3",
 		.no_pcm = 1,
 	{
 		/* SSP1 - Codec */
 		.name = "SSP1-Codec",
-		.be_id = 1,
+		.id = 1,
 		.cpu_dai_name = "SSP1 Pin",
 		.platform_name = "0000:00:1f.3",
 		.no_pcm = 1,
 	},
 	{
 		.name = "dmic01",
-		.be_id = 2,
+		.id = 2,
 		.cpu_dai_name = "DMIC01 Pin",
 		.codec_name = "dmic-codec",
 		.codec_dai_name = "dmic-hifi",
 	},
 	{
 		.name = "iDisp1",
-		.be_id = 3,
+		.id = 3,
 		.cpu_dai_name = "iDisp1 Pin",
 		.codec_name = "ehdaudio0D2",
 		.codec_dai_name = "intel-hdmi-hifi1",
 	},
 	{
 		.name = "iDisp2",
-		.be_id = 4,
+		.id = 4,
 		.cpu_dai_name = "iDisp2 Pin",
 		.codec_name = "ehdaudio0D2",
 		.codec_dai_name = "intel-hdmi-hifi2",
 	},
 	{
 		.name = "iDisp3",
-		.be_id = 5,
+		.id = 5,
 		.cpu_dai_name = "iDisp3 Pin",
 		.codec_name = "ehdaudio0D2",
 		.codec_dai_name = "intel-hdmi-hifi3",
 	},
 };
+static int skylake_card_late_probe(struct snd_soc_card *card)
+{
+	struct skl_nau88125_private *ctx = snd_soc_card_get_drvdata(card);
+	struct skl_hdmi_pcm *pcm;
+	int err;
+	list_for_each_entry(pcm, &ctx->hdmi_pcm_list, head) {
+		err = hdac_hdmi_jack_init(pcm->codec_dai, pcm->device);
+		if (err < 0)
+			return err;
+	}
+	return 0;
+}
 /* skylake audio machine driver for SPT + NAU88L25 */
 static struct snd_soc_card skylake_audio_card = {
 	.name = "sklnau8825adi",
 	.codec_conf = ssm4567_codec_conf,
 	.num_configs = ARRAY_SIZE(ssm4567_codec_conf),
 	.fully_routed = true,
+	.late_probe = skylake_card_late_probe,
 };
 static int skylake_audio_probe(struct platform_device *pdev)
 {
+	struct skl_nau88125_private *ctx;
+	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_ATOMIC);
+	if (!ctx)
+		return -ENOMEM;
+	INIT_LIST_HEAD(&ctx->hdmi_pcm_list);
 	skylake_audio_card.dev = &pdev->dev;
+	snd_soc_card_set_drvdata(&skylake_audio_card, ctx);
 	return devm_snd_soc_register_card(&pdev->dev, &skylake_audio_card);
 }

sound/soc/intel/boards/skl_rt286.c+52−7

 static struct snd_soc_jack skylake_headset;
+struct skl_hdmi_pcm {
+	struct list_head head;
+	struct snd_soc_dai *codec_dai;
+	int device;
+};
+struct skl_rt286_private {
+	struct list_head hdmi_pcm_list;
+};
 enum {
 	SKL_DPCM_AUDIO_PB = 0,
 	SKL_DPCM_AUDIO_CP,
 static int skylake_hdmi_init(struct snd_soc_pcm_runtime *rtd)
 {
+	struct skl_rt286_private *ctx = snd_soc_card_get_drvdata(rtd->card);
 	struct snd_soc_dai *dai = rtd->codec_dai;
+	struct skl_hdmi_pcm *pcm;
+	pcm = devm_kzalloc(rtd->card->dev, sizeof(*pcm), GFP_KERNEL);
+	if (!pcm)
+		return -ENOMEM;
-	return hdac_hdmi_jack_init(dai, SKL_DPCM_AUDIO_HDMI1_PB + dai->id);
+	pcm->device = SKL_DPCM_AUDIO_HDMI1_PB + dai->id;
+	pcm->codec_dai = dai;
+	list_add_tail(&pcm->head, &ctx->hdmi_pcm_list);
+	return 0;
 }
 static unsigned int rates[] = {
 		.platform_name = "0000:00:1f.3",
 		.init = NULL,
 		.dpcm_capture = 1,
-		.ignore_suspend = 1,
 		.nonatomic = 1,
 		.dynamic = 1,
 	},
 	{
 		/* SSP0 - Codec */
 		.name = "SSP0-Codec",
-		.be_id = 0,
+		.id = 0,
 		.cpu_dai_name = "SSP0 Pin",
 		.platform_name = "0000:00:1f.3",
 		.no_pcm = 1,
 	},
 	{
 		.name = "dmic01",
-		.be_id = 1,
+		.id = 1,
 		.cpu_dai_name = "DMIC01 Pin",
 		.codec_name = "dmic-codec",
 		.codec_dai_name = "dmic-hifi",
 	},
 	{
 		.name = "iDisp1",
-		.be_id = 2,
+		.id = 2,
 		.cpu_dai_name = "iDisp1 Pin",
 		.codec_name = "ehdaudio0D2",
 		.codec_dai_name = "intel-hdmi-hifi1",
 	},
 	{
 		.name = "iDisp2",
-		.be_id = 3,
+		.id = 3,
 		.cpu_dai_name = "iDisp2 Pin",
 		.codec_name = "ehdaudio0D2",
 		.codec_dai_name = "intel-hdmi-hifi2",
 	},
 	{
 		.name = "iDisp3",
-		.be_id = 4,
+		.id = 4,
 		.cpu_dai_name = "iDisp3 Pin",
 		.codec_name = "ehdaudio0D2",
 		.codec_dai_name = "intel-hdmi-hifi3",
 	},
 };
+static int skylake_card_late_probe(struct snd_soc_card *card)
+{
+	struct skl_rt286_private *ctx = snd_soc_card_get_drvdata(card);
+	struct skl_hdmi_pcm *pcm;
+	int err;
+	list_for_each_entry(pcm, &ctx->hdmi_pcm_list, head) {
+		err = hdac_hdmi_jack_init(pcm->codec_dai, pcm->device);
+		if (err < 0)
+			return err;
+	}
+	return 0;
+}
 /* skylake audio machine driver for SPT + RT286S */
 static struct snd_soc_card skylake_rt286 = {
 	.name = "skylake-rt286",
 	.dapm_routes = skylake_rt286_map,
 	.num_dapm_routes = ARRAY_SIZE(skylake_rt286_map),
 	.fully_routed = true,
+	.late_probe = skylake_card_late_probe,
 };
 static int skylake_audio_probe(struct platform_device *pdev)
 {
+	struct skl_rt286_private *ctx;
+	ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_ATOMIC);
+	if (!ctx)
+		return -ENOMEM;
+	INIT_LIST_HEAD(&ctx->hdmi_pcm_list);
 	skylake_rt286.dev = &pdev->dev;
+	snd_soc_card_set_drvdata(&skylake_rt286, ctx);
 	return devm_snd_soc_register_card(&pdev->dev, &skylake_rt286);
 }

sound/soc/intel/common/sst-acpi.h+9−0

  *
  */
+#include <linux/kconfig.h>
+#include <linux/stddef.h>
 #include <linux/acpi.h>
 /* translation fron HID to I2C name, needed for DAI codec_name */
+#if IS_ENABLED(CONFIG_ACPI)
 const char *sst_acpi_find_name_from_hid(const u8 hid[ACPI_ID_LEN]);
+#else
+inline const char *sst_acpi_find_name_from_hid(const u8 hid[ACPI_ID_LEN])
+{
+	return NULL;
+}
+#endif
 /* acpi match */
 struct sst_acpi_mach *sst_acpi_find_machine(struct sst_acpi_mach *machines);

sound/soc/intel/haswell/sst-haswell-pcm.c+1−1

@@ -445,7 +445,7 @@ static int create_adsp_page_table(struct snd_pcm_substream *substream, · 444 unmodified lines
445		445
446	pages = snd_sgbuf_aligned_pages(size);	446	pages = snd_sgbuf_aligned_pages(size);
447		447
448	dev_dbg(rtd->dev, "generating page table for %p size 0x%zu pages %d\n",	448	dev_dbg(rtd->dev, "generating page table for %p size 0x%zx pages %d\n",
449	dma_area, size, pages);	449	dma_area, size, pages);
450		450
451	for (i = 0; i < pages; i++) {	451	for (i = 0; i < pages; i++) {

sound/soc/intel/skylake/Makefile+1−1

@@ -5,6 +5,6 @@ obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += snd-soc-skl.o · 4 unmodified lines
5		5
6	# Skylake IPC Support	6	# Skylake IPC Support
7	snd-soc-skl-ipc-objs := skl-sst-ipc.o skl-sst-dsp.o skl-sst-cldma.o \	7	snd-soc-skl-ipc-objs := skl-sst-ipc.o skl-sst-dsp.o skl-sst-cldma.o \
8	skl-sst.o	8	skl-sst.o bxt-sst.o
9		9
10	obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += snd-soc-skl-ipc.o	10	obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += snd-soc-skl-ipc.o

sound/soc/intel/skylake/bxt-sst.c+328−0

@@ -0,0 +1,328 @@
	1	/*
	2	* bxt-sst.c - DSP library functions for BXT platform
	3	*
	4	* Copyright (C) 2015-16 Intel Corp
	5	* Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
	6	* Jeeja KP <jeeja.kp@intel.com>
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; version 2 of the License.
	11	*
	12	* This program is distributed in the hope that it will be useful, but
	13	* WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	15	* General Public License for more details.
	16	*/
	17
	18	#include <linux/module.h>
	19	#include <linux/delay.h>
	20	#include <linux/firmware.h>
	21	#include <linux/device.h>
	22
	23	#include "../common/sst-dsp.h"
	24	#include "../common/sst-dsp-priv.h"
	25	#include "skl-sst-ipc.h"
	26
	27	#define BXT_BASEFW_TIMEOUT 3000
	28	#define BXT_INIT_TIMEOUT 500
	29	#define BXT_IPC_PURGE_FW 0x01004000
	30
	31	#define BXT_ROM_INIT 0x5
	32	#define BXT_ADSP_SRAM0_BASE 0x80000
	33
	34	/* Firmware status window */
	35	#define BXT_ADSP_FW_STATUS BXT_ADSP_SRAM0_BASE
	36	#define BXT_ADSP_ERROR_CODE (BXT_ADSP_FW_STATUS + 0x4)
	37
	38	#define BXT_ADSP_SRAM1_BASE 0xA0000
	39
	40	static unsigned int bxt_get_errorcode(struct sst_dsp *ctx)
	41	{
	42	return sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE);
	43	}
	44
	45	static int sst_bxt_prepare_fw(struct sst_dsp *ctx,
	46	const void *fwdata, u32 fwsize)
	47	{
	48	int stream_tag, ret, i;
	49	u32 reg;
	50
	51	stream_tag = ctx->dsp_ops.prepare(ctx->dev, 0x40, fwsize, &ctx->dmab);
	52	if (stream_tag < 0) {
	53	dev_err(ctx->dev, "Failed to prepare DMA FW loading err: %x\n",
	54	stream_tag);
	55	return stream_tag;
	56	}
	57
	58	ctx->dsp_ops.stream_tag = stream_tag;
	59	memcpy(ctx->dmab.area, fwdata, fwsize);
	60
	61	/* Purge FW request */
	62	sst_dsp_shim_write(ctx, SKL_ADSP_REG_HIPCI, SKL_ADSP_REG_HIPCI_BUSY \|
	63	BXT_IPC_PURGE_FW \| (stream_tag - 1));
	64
	65	ret = skl_dsp_enable_core(ctx);
	66	if (ret < 0) {
	67	dev_err(ctx->dev, "Boot dsp core failed ret: %d\n", ret);
	68	ret = -EIO;
	69	goto base_fw_load_failed;
	70	}
	71
	72	for (i = BXT_INIT_TIMEOUT; i > 0; --i) {
	73	reg = sst_dsp_shim_read(ctx, SKL_ADSP_REG_HIPCIE);
	74
	75	if (reg & SKL_ADSP_REG_HIPCIE_DONE) {
	76	sst_dsp_shim_update_bits_forced(ctx,
	77	SKL_ADSP_REG_HIPCIE,
	78	SKL_ADSP_REG_HIPCIE_DONE,
	79	SKL_ADSP_REG_HIPCIE_DONE);
	80	break;
	81	}
	82	mdelay(1);
	83	}
	84	if (!i) {
	85	dev_info(ctx->dev, "Waiting for HIPCIE done, reg: 0x%x\n", reg);
	86	sst_dsp_shim_update_bits(ctx, SKL_ADSP_REG_HIPCIE,
	87	SKL_ADSP_REG_HIPCIE_DONE,
	88	SKL_ADSP_REG_HIPCIE_DONE);
	89	}
	90
	91	/* enable Interrupt */
	92	skl_ipc_int_enable(ctx);
	93	skl_ipc_op_int_enable(ctx);
	94
	95	for (i = BXT_INIT_TIMEOUT; i > 0; --i) {
	96	if (SKL_FW_INIT ==
	97	(sst_dsp_shim_read(ctx, BXT_ADSP_FW_STATUS) &
	98	SKL_FW_STS_MASK)) {
	99
	100	dev_info(ctx->dev, "ROM loaded, continue FW loading\n");
	101	break;
	102	}
	103	mdelay(1);
	104	}
	105	if (!i) {
	106	dev_err(ctx->dev, "Timeout for ROM init, HIPCIE: 0x%x\n", reg);
	107	ret = -EIO;
	108	goto base_fw_load_failed;
	109	}
	110
	111	return ret;
	112
	113	base_fw_load_failed:
	114	ctx->dsp_ops.cleanup(ctx->dev, &ctx->dmab, stream_tag);
	115	skl_dsp_disable_core(ctx);
	116	return ret;
	117	}
	118
	119	static int sst_transfer_fw_host_dma(struct sst_dsp *ctx)
	120	{
	121	int ret;
	122
	123	ctx->dsp_ops.trigger(ctx->dev, true, ctx->dsp_ops.stream_tag);
	124	ret = sst_dsp_register_poll(ctx, BXT_ADSP_FW_STATUS, SKL_FW_STS_MASK,
	125	BXT_ROM_INIT, BXT_BASEFW_TIMEOUT, "Firmware boot");
	126
	127	ctx->dsp_ops.trigger(ctx->dev, false, ctx->dsp_ops.stream_tag);
	128	ctx->dsp_ops.cleanup(ctx->dev, &ctx->dmab, ctx->dsp_ops.stream_tag);
	129
	130	return ret;
	131	}
	132
	133	static int bxt_load_base_firmware(struct sst_dsp *ctx)
	134	{
	135	const struct firmware *fw = NULL;
	136	struct skl_sst *skl = ctx->thread_context;
	137	int ret;
	138
	139	ret = request_firmware(&fw, ctx->fw_name, ctx->dev);
	140	if (ret < 0) {
	141	dev_err(ctx->dev, "Request firmware failed %d\n", ret);
	142	goto sst_load_base_firmware_failed;
	143	}
	144
	145	ret = sst_bxt_prepare_fw(ctx, fw->data, fw->size);
	146	/* Retry Enabling core and ROM load. Retry seemed to help */
	147	if (ret < 0) {
	148	ret = sst_bxt_prepare_fw(ctx, fw->data, fw->size);
	149	if (ret < 0) {
	150	dev_err(ctx->dev, "Core En/ROM load fail:%d\n", ret);
	151	goto sst_load_base_firmware_failed;
	152	}
	153	}
	154
	155	ret = sst_transfer_fw_host_dma(ctx);
	156	if (ret < 0) {
	157	dev_err(ctx->dev, "Transfer firmware failed %d\n", ret);
	158	dev_info(ctx->dev, "Error code=0x%x: FW status=0x%x\n",
	159	sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE),
	160	sst_dsp_shim_read(ctx, BXT_ADSP_FW_STATUS));
	161
	162	skl_dsp_disable_core(ctx);
	163	} else {
	164	dev_dbg(ctx->dev, "Firmware download successful\n");
	165	ret = wait_event_timeout(skl->boot_wait, skl->boot_complete,
	166	msecs_to_jiffies(SKL_IPC_BOOT_MSECS));
	167	if (ret == 0) {
	168	dev_err(ctx->dev, "DSP boot fail, FW Ready timeout\n");
	169	skl_dsp_disable_core(ctx);
	170	ret = -EIO;
	171	} else {
	172	skl_dsp_set_state_locked(ctx, SKL_DSP_RUNNING);
	173	ret = 0;
	174	}
	175	}
	176
	177	sst_load_base_firmware_failed:
	178	release_firmware(fw);
	179	return ret;
	180	}
	181
	182	static int bxt_set_dsp_D0(struct sst_dsp *ctx)
	183	{
	184	struct skl_sst *skl = ctx->thread_context;
	185	int ret;
	186
	187	skl->boot_complete = false;
	188
	189	ret = skl_dsp_enable_core(ctx);
	190	if (ret < 0) {
	191	dev_err(ctx->dev, "enable dsp core failed ret: %d\n", ret);
	192	return ret;
	193	}
	194
	195	/* enable interrupt */
	196	skl_ipc_int_enable(ctx);
	197	skl_ipc_op_int_enable(ctx);
	198
	199	ret = wait_event_timeout(skl->boot_wait, skl->boot_complete,
	200	msecs_to_jiffies(SKL_IPC_BOOT_MSECS));
	201	if (ret == 0) {
	202	dev_err(ctx->dev, "ipc: error DSP boot timeout\n");
	203	dev_err(ctx->dev, "Error code=0x%x: FW status=0x%x\n",
	204	sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE),
	205	sst_dsp_shim_read(ctx, BXT_ADSP_FW_STATUS));
	206	return -EIO;
	207	}
	208
	209	skl_dsp_set_state_locked(ctx, SKL_DSP_RUNNING);
	210	return 0;
	211	}
	212
	213	static int bxt_set_dsp_D3(struct sst_dsp *ctx)
	214	{
	215	struct skl_ipc_dxstate_info dx;
	216	struct skl_sst *skl = ctx->thread_context;
	217	int ret = 0;
	218
	219	if (!is_skl_dsp_running(ctx))
	220	return ret;
	221
	222	dx.core_mask = SKL_DSP_CORE0_MASK;
	223	dx.dx_mask = SKL_IPC_D3_MASK;
	224
	225	ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID,
	226	SKL_BASE_FW_MODULE_ID, &dx);
	227	if (ret < 0) {
	228	dev_err(ctx->dev, "Failed to set DSP to D3 state: %d\n", ret);
	229	return ret;
	230	}
	231
	232	ret = skl_dsp_disable_core(ctx);
	233	if (ret < 0) {
	234	dev_err(ctx->dev, "disbale dsp core failed: %d\n", ret);
	235	ret = -EIO;
	236	}
	237
	238	skl_dsp_set_state_locked(ctx, SKL_DSP_RESET);
	239	return 0;
	240	}
	241
	242	static struct skl_dsp_fw_ops bxt_fw_ops = {
	243	.set_state_D0 = bxt_set_dsp_D0,
	244	.set_state_D3 = bxt_set_dsp_D3,
	245	.load_fw = bxt_load_base_firmware,
	246	.get_fw_errcode = bxt_get_errorcode,
	247	};
	248
	249	static struct sst_ops skl_ops = {
	250	.irq_handler = skl_dsp_sst_interrupt,
	251	.write = sst_shim32_write,
	252	.read = sst_shim32_read,
	253	.ram_read = sst_memcpy_fromio_32,
	254	.ram_write = sst_memcpy_toio_32,
	255	.free = skl_dsp_free,
	256	};
	257
	258	static struct sst_dsp_device skl_dev = {
	259	.thread = skl_dsp_irq_thread_handler,
	260	.ops = &skl_ops,
	261	};
	262
	263	int bxt_sst_dsp_init(struct device dev, void __iomem mmio_base, int irq,
	264	const char *fw_name, struct skl_dsp_loader_ops dsp_ops,
	265	struct skl_sst **dsp)
	266	{
	267	struct skl_sst *skl;
	268	struct sst_dsp *sst;
	269	int ret;
	270
	271	skl = devm_kzalloc(dev, sizeof(*skl), GFP_KERNEL);
	272	if (skl == NULL)
	273	return -ENOMEM;
	274
	275	skl->dev = dev;
	276	skl_dev.thread_context = skl;
	277
	278	skl->dsp = skl_dsp_ctx_init(dev, &skl_dev, irq);
	279	if (!skl->dsp) {
	280	dev_err(skl->dev, "skl_dsp_ctx_init failed\n");
	281	return -ENODEV;
	282	}
	283
	284	sst = skl->dsp;
	285	sst->fw_name = fw_name;
	286	sst->dsp_ops = dsp_ops;
	287	sst->fw_ops = bxt_fw_ops;
	288	sst->addr.lpe = mmio_base;
	289	sst->addr.shim = mmio_base;
	290
	291	sst_dsp_mailbox_init(sst, (BXT_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ),
	292	SKL_ADSP_W0_UP_SZ, BXT_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ);
	293
	294	ret = skl_ipc_init(dev, skl);
	295	if (ret)
	296	return ret;
	297
	298	skl->boot_complete = false;
	299	init_waitqueue_head(&skl->boot_wait);
	300
	301	ret = sst->fw_ops.load_fw(sst);
	302	if (ret < 0) {
	303	dev_err(dev, "Load base fw failed: %x", ret);
	304	return ret;
	305	}
	306
	307	if (dsp)
	308	*dsp = skl;
	309
	310	return 0;
	311	}
	312	EXPORT_SYMBOL_GPL(bxt_sst_dsp_init);
	313
	314
	315	void bxt_sst_dsp_cleanup(struct device dev, struct skl_sst ctx)
	316	{
	317	skl_ipc_free(&ctx->ipc);
	318	ctx->dsp->cl_dev.ops.cl_cleanup_controller(ctx->dsp);
	319
	320	if (ctx->dsp->addr.lpe)
	321	iounmap(ctx->dsp->addr.lpe);
	322
	323	ctx->dsp->ops->free(ctx->dsp);
	324	}
	325	EXPORT_SYMBOL_GPL(bxt_sst_dsp_cleanup);
	326
	327	MODULE_LICENSE("GPL v2");
	328	MODULE_DESCRIPTION("Intel Broxton IPC driver");

sound/soc/intel/skylake/skl-messages.c+121−1

@@ -72,6 +72,105 @@ static void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable) · 71 unmodified lines
72	skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);	72	skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask);
73	}	73	}
74		74
		75	static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
		76	int stream_tag, int enable)
		77	{
		78	struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
		79	struct hdac_bus *bus = ebus_to_hbus(ebus);
		80	struct hdac_stream *stream = snd_hdac_get_stream(bus,
		81	SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
		82	struct hdac_ext_stream *estream;
		83
		84	if (!stream)
		85	return -EINVAL;
		86
		87	estream = stream_to_hdac_ext_stream(stream);
		88	/* enable/disable SPIB for this hdac stream */
		89	snd_hdac_ext_stream_spbcap_enable(ebus, enable, stream->index);
		90
		91	/* set the spib value */
		92	snd_hdac_ext_stream_set_spib(ebus, estream, size);
		93
		94	return 0;
		95	}
		96
		97	static int skl_dsp_prepare(struct device *dev, unsigned int format,
		98	unsigned int size, struct snd_dma_buffer *dmab)
		99	{
		100	struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
		101	struct hdac_bus *bus = ebus_to_hbus(ebus);
		102	struct hdac_ext_stream *estream;
		103	struct hdac_stream *stream;
		104	struct snd_pcm_substream substream;
		105	int ret;
		106
		107	if (!bus)
		108	return -ENODEV;
		109
		110	memset(&substream, 0, sizeof(substream));
		111	substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
		112
		113	estream = snd_hdac_ext_stream_assign(ebus, &substream,
		114	HDAC_EXT_STREAM_TYPE_HOST);
		115	if (!estream)
		116	return -ENODEV;
		117
		118	stream = hdac_stream(estream);
		119
		120	/* assign decouple host dma channel */
		121	ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
		122	if (ret < 0)
		123	return ret;
		124
		125	skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
		126
		127	return stream->stream_tag;
		128	}
		129
		130	static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
		131	{
		132	struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
		133	struct hdac_stream *stream;
		134	struct hdac_bus *bus = ebus_to_hbus(ebus);
		135
		136	if (!bus)
		137	return -ENODEV;
		138
		139	stream = snd_hdac_get_stream(bus,
		140	SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
		141	if (!stream)
		142	return -EINVAL;
		143
		144	snd_hdac_dsp_trigger(stream, start);
		145
		146	return 0;
		147	}
		148
		149	static int skl_dsp_cleanup(struct device *dev,
		150	struct snd_dma_buffer *dmab, int stream_tag)
		151	{
		152	struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
		153	struct hdac_stream *stream;
		154	struct hdac_ext_stream *estream;
		155	struct hdac_bus *bus = ebus_to_hbus(ebus);
		156
		157	if (!bus)
		158	return -ENODEV;
		159
		160	stream = snd_hdac_get_stream(bus,
		161	SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
		162	if (!stream)
		163	return -EINVAL;
		164
		165	estream = stream_to_hdac_ext_stream(stream);
		166	skl_dsp_setup_spib(dev, 0, stream_tag, false);
		167	snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
		168
		169	snd_hdac_dsp_cleanup(stream, dmab);
		170
		171	return 0;
		172	}
		173
75	static struct skl_dsp_loader_ops skl_get_loader_ops(void)	174	static struct skl_dsp_loader_ops skl_get_loader_ops(void)
76	{	175	{
77	struct skl_dsp_loader_ops loader_ops;	176	struct skl_dsp_loader_ops loader_ops;
@@ -84,6 +183,21 @@ static struct skl_dsp_loader_ops skl_get_loader_ops(void) · 6 unmodified lines
84	return loader_ops;	183	return loader_ops;
85	};	184	};
86		185
		186	static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
		187	{
		188	struct skl_dsp_loader_ops loader_ops;
		189
		190	memset(&loader_ops, 0, sizeof(loader_ops));
		191
		192	loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
		193	loader_ops.free_dma_buf = skl_free_dma_buf;
		194	loader_ops.prepare = skl_dsp_prepare;
		195	loader_ops.trigger = skl_dsp_trigger;
		196	loader_ops.cleanup = skl_dsp_cleanup;
		197
		198	return loader_ops;
		199	};
		200
87	static const struct skl_dsp_ops dsp_ops[] = {	201	static const struct skl_dsp_ops dsp_ops[] = {
88	{	202	{
89	.id = 0x9d70,	203	.id = 0x9d70,
@@ -91,6 +205,12 @@ static const struct skl_dsp_ops dsp_ops[] = { · 1 unmodified line
91	.init = skl_sst_dsp_init,	205	.init = skl_sst_dsp_init,
92	.cleanup = skl_sst_dsp_cleanup	206	.cleanup = skl_sst_dsp_cleanup
93	},	207	},
		208	{
		209	.id = 0x5a98,
		210	.loader_ops = bxt_get_loader_ops,
		211	.init = bxt_sst_dsp_init,
		212	.cleanup = bxt_sst_dsp_cleanup
		213	},
94	};	214	};
95		215
96	static int skl_get_dsp_ops(int pci_id)	216	static int skl_get_dsp_ops(int pci_id)
@@ -744,7 +864,7 @@ int skl_init_module(struct skl_sst *ctx, · 647 unmodified lines
744	return ret;	864	return ret;
745	}	865	}
746	mconfig->m_state = SKL_MODULE_INIT_DONE;	866	mconfig->m_state = SKL_MODULE_INIT_DONE;
747		867	kfree(param_data);
748	return ret;	868	return ret;
749	}	869	}
750		870

sound/soc/intel/skylake/skl-nhlt.c+9−6

@@ -25,11 +25,12 @@ static u8 OSC_UUID[16] = {0x6E, 0x88, 0x9F, 0xA6, 0xEB, 0x6C, 0x94, 0x45, · 24 unmodified lines
25		25
26	#define DSDT_NHLT_PATH "\\_SB.PCI0.HDAS"	26	#define DSDT_NHLT_PATH "\\_SB.PCI0.HDAS"
27		27
28	void skl_nhlt_init(struct device dev)	28	struct nhlt_acpi_table skl_nhlt_init(struct device dev)
29	{	29	{
30	acpi_handle handle;	30	acpi_handle handle;
31	union acpi_object *obj;	31	union acpi_object *obj;
32	struct nhlt_resource_desc *nhlt_ptr = NULL;	32	struct nhlt_resource_desc *nhlt_ptr = NULL;
		33	struct nhlt_acpi_table *nhlt_table = NULL;
33		34
34	if (ACPI_FAILURE(acpi_get_handle(NULL, DSDT_NHLT_PATH, &handle))) {	35	if (ACPI_FAILURE(acpi_get_handle(NULL, DSDT_NHLT_PATH, &handle))) {
35	dev_err(dev, "Requested NHLT device not found\n");	36	dev_err(dev, "Requested NHLT device not found\n");
@@ -39,18 +40,20 @@ void skl_nhlt_init(struct device dev) · 3 unmodified lines
39	obj = acpi_evaluate_dsm(handle, OSC_UUID, 1, 1, NULL);	40	obj = acpi_evaluate_dsm(handle, OSC_UUID, 1, 1, NULL);
40	if (obj && obj->type == ACPI_TYPE_BUFFER) {	41	if (obj && obj->type == ACPI_TYPE_BUFFER) {
41	nhlt_ptr = (struct nhlt_resource_desc *)obj->buffer.pointer;	42	nhlt_ptr = (struct nhlt_resource_desc *)obj->buffer.pointer;
42		43	nhlt_table = (struct nhlt_acpi_table *)
43	return memremap(nhlt_ptr->min_addr, nhlt_ptr->length,	44	memremap(nhlt_ptr->min_addr, nhlt_ptr->length,
44	MEMREMAP_WB);	45	MEMREMAP_WB);
		46	ACPI_FREE(obj);
		47	return nhlt_table;
45	}	48	}
46		49
47	dev_err(dev, "device specific method to extract NHLT blob failed\n");	50	dev_err(dev, "device specific method to extract NHLT blob failed\n");
48	return NULL;	51	return NULL;
49	}	52	}
50		53
51	void skl_nhlt_free(void *addr)	54	void skl_nhlt_free(struct nhlt_acpi_table *nhlt)
52	{	55	{
53	memunmap(addr);	56	memunmap((void *) nhlt);
54	}	57	}
55		58
56	static struct nhlt_specific_cfg *skl_get_specific_cfg(	59	static struct nhlt_specific_cfg *skl_get_specific_cfg(
@@ -120,7 +123,7 @@ struct nhlt_specific_cfg · 63 unmodified lines
120	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);	123	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
121	struct device *dev = bus->dev;	124	struct device *dev = bus->dev;
122	struct nhlt_specific_cfg *sp_config;	125	struct nhlt_specific_cfg *sp_config;
123	struct nhlt_acpi_table nhlt = (struct nhlt_acpi_table )skl->nhlt;	126	struct nhlt_acpi_table *nhlt = skl->nhlt;
124	u16 bps = (s_fmt == 16) ? 16 : 32;	127	u16 bps = (s_fmt == 16) ? 16 : 32;
125	u8 j;	128	u8 j;
126		129

sound/soc/intel/skylake/skl-pcm.c+100−19

 	.rate_min =		8000,
 	.rate_max =		48000,
 	.channels_min =		1,
-	.channels_max =		HDA_QUAD,
+	.channels_max =		8,
 	.buffer_bytes_max =	AZX_MAX_BUF_SIZE,
 	.period_bytes_min =	128,
 	.period_bytes_max =	AZX_MAX_BUF_SIZE / 2,
 	struct skl_sst *ctx = skl->skl_sst;
 	struct skl_module_cfg *mconfig;
-	if ((dai->playback_active > 1) || (dai->capture_active > 1))
+	if (dai->playback_widget->power || dai->capture_widget->power)
 		return 0;
 	mconfig = skl_tplg_be_get_cpr_module(dai, substream->stream);
 	struct skl_module_cfg *mconfig;
 	struct hdac_ext_bus *ebus = get_bus_ctx(substream);
 	struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
+	struct snd_soc_dapm_widget *w;
 	int ret;
 	mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
 	if (!mconfig)
 		return -EIO;
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+		w = dai->playback_widget;
+	else
+		w = dai->capture_widget;
 	switch (cmd) {
 	case SNDRV_PCM_TRIGGER_RESUME:
-		skl_pcm_prepare(substream, dai);
+		if (!w->ignore_suspend) {
-		/*
+			skl_pcm_prepare(substream, dai);
-		 * enable DMA Resume enable bit for the stream, set the dpib
+			/*
-		 * & lpib position to resune before starting the DMA
+			 * enable DMA Resume enable bit for the stream, set the
-		 */
+			 * dpib & lpib position to resume before starting the
-		snd_hdac_ext_stream_drsm_enable(ebus, true,
+			 * DMA
-					hdac_stream(stream)->index);
+			 */
-		snd_hdac_ext_stream_set_dpibr(ebus, stream, stream->dpib);
+			snd_hdac_ext_stream_drsm_enable(ebus, true,
-		snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
+						hdac_stream(stream)->index);
+			snd_hdac_ext_stream_set_dpibr(ebus, stream,
+							stream->dpib);
+			snd_hdac_ext_stream_set_lpib(stream, stream->lpib);
+		}
 	case SNDRV_PCM_TRIGGER_START:
 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 			return ret;
 		ret = skl_decoupled_trigger(substream, cmd);
-		if (cmd == SNDRV_PCM_TRIGGER_SUSPEND) {
+		if ((cmd == SNDRV_PCM_TRIGGER_SUSPEND) && !w->ignore_suspend) {
 			/* save the dpib and lpib positions */
 			stream->dpib = readl(ebus->bus.remap_addr +
 					AZX_REG_VS_SDXDPIB_XBASE +
 	if (!link)
 		return -EINVAL;
-	snd_hdac_ext_bus_link_power_up(link);
 	snd_hdac_ext_link_stream_reset(link_dev);
 	snd_hdac_ext_link_stream_setup(link_dev, format_val);
 	.playback = {
 		.stream_name = "HDMI1 Playback",
 		.channels_min = HDA_STEREO,
-		.channels_max = HDA_STEREO,
+		.channels_max = 8,
 		.rates = SNDRV_PCM_RATE_32000 |	SNDRV_PCM_RATE_44100 |
 			SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 			SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 	.playback = {
 		.stream_name = "HDMI2 Playback",
 		.channels_min = HDA_STEREO,
-		.channels_max = HDA_STEREO,
+		.channels_max = 8,
 		.rates = SNDRV_PCM_RATE_32000 |	SNDRV_PCM_RATE_44100 |
 			SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 			SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 	.playback = {
 		.stream_name = "HDMI3 Playback",
 		.channels_min = HDA_STEREO,
-		.channels_max = HDA_STEREO,
+		.channels_max = 8,
 		.rates = SNDRV_PCM_RATE_32000 |	SNDRV_PCM_RATE_44100 |
 			SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
 			SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
 		.formats = SNDRV_PCM_FMTBIT_S16_LE,
 	},
 },
+{
+	.name = "SSP2 Pin",
+	.ops = &skl_be_ssp_dai_ops,
+	.playback = {
+		.stream_name = "ssp2 Tx",
+		.channels_min = HDA_STEREO,
+		.channels_max = HDA_STEREO,
+		.rates = SNDRV_PCM_RATE_48000,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+	},
+	.capture = {
+		.stream_name = "ssp2 Rx",
+		.channels_min = HDA_STEREO,
+		.channels_max = HDA_STEREO,
+		.rates = SNDRV_PCM_RATE_48000,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+	},
+},
+{
+	.name = "SSP3 Pin",
+	.ops = &skl_be_ssp_dai_ops,
+	.playback = {
+		.stream_name = "ssp3 Tx",
+		.channels_min = HDA_STEREO,
+		.channels_max = HDA_STEREO,
+		.rates = SNDRV_PCM_RATE_48000,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+	},
+	.capture = {
+		.stream_name = "ssp3 Rx",
+		.channels_min = HDA_STEREO,
+		.channels_max = HDA_STEREO,
+		.rates = SNDRV_PCM_RATE_48000,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+	},
+},
+{
+	.name = "SSP4 Pin",
+	.ops = &skl_be_ssp_dai_ops,
+	.playback = {
+		.stream_name = "ssp4 Tx",
+		.channels_min = HDA_STEREO,
+		.channels_max = HDA_STEREO,
+		.rates = SNDRV_PCM_RATE_48000,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+	},
+	.capture = {
+		.stream_name = "ssp4 Rx",
+		.channels_min = HDA_STEREO,
+		.channels_max = HDA_STEREO,
+		.rates = SNDRV_PCM_RATE_48000,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+	},
+},
+{
+	.name = "SSP5 Pin",
+	.ops = &skl_be_ssp_dai_ops,
+	.playback = {
+		.stream_name = "ssp5 Tx",
+		.channels_min = HDA_STEREO,
+		.channels_max = HDA_STEREO,
+		.rates = SNDRV_PCM_RATE_48000,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+	},
+	.capture = {
+		.stream_name = "ssp5 Rx",
+		.channels_min = HDA_STEREO,
+		.channels_max = HDA_STEREO,
+		.rates = SNDRV_PCM_RATE_48000,
+		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+	},
+},
 {
 	.name = "iDisp1 Pin",
 	.ops = &skl_link_dai_ops,
 	.playback = {
 		.stream_name = "iDisp1 Tx",
 		.channels_min = HDA_STEREO,
-		.channels_max = HDA_STEREO,
+		.channels_max = 8,
 		.rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
 		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
 			SNDRV_PCM_FMTBIT_S24_LE,
 	.playback = {
 		.stream_name = "iDisp2 Tx",
 		.channels_min = HDA_STEREO,
-		.channels_max = HDA_STEREO,
+		.channels_max = 8,
 		.rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
 			SNDRV_PCM_RATE_48000,
 		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |
 	.playback = {
 		.stream_name = "iDisp3 Tx",
 		.channels_min = HDA_STEREO,
-		.channels_max = HDA_STEREO,
+		.channels_max = 8,
 		.rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|
 			SNDRV_PCM_RATE_48000,
 		.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE |

sound/soc/intel/skylake/skl-sst-dsp.c+0−2

@@ -336,8 +336,6 @@ void skl_dsp_free(struct sst_dsp *dsp) · 335 unmodified lines
336	skl_ipc_int_disable(dsp);	336	skl_ipc_int_disable(dsp);
337		337
338	free_irq(dsp->irq, dsp);	338	free_irq(dsp->irq, dsp);
339	dsp->cl_dev.ops.cl_cleanup_controller(dsp);
340	skl_cldma_int_disable(dsp);
341	skl_ipc_op_int_disable(dsp);	339	skl_ipc_op_int_disable(dsp);
342	skl_ipc_int_disable(dsp);	340	skl_ipc_int_disable(dsp);
343		341

sound/soc/intel/skylake/skl-sst-dsp.h+14−1

 	int (*set_state_D0)(struct sst_dsp *ctx);
 	int (*set_state_D3)(struct sst_dsp *ctx);
 	unsigned int (*get_fw_errcode)(struct sst_dsp *ctx);
-	int (*load_mod)(struct sst_dsp *ctx, u16 mod_id, char *mod_name);
+	int (*load_mod)(struct sst_dsp *ctx, u16 mod_id, u8 *mod_name);
 	int (*unload_mod)(struct sst_dsp *ctx, u16 mod_id);
 };
 struct skl_dsp_loader_ops {
+	int stream_tag;
 	int (*alloc_dma_buf)(struct device *dev,
 		struct snd_dma_buffer *dmab, size_t size);
 	int (*free_dma_buf)(struct device *dev,
 		struct snd_dma_buffer *dmab);
+	int (*prepare)(struct device *dev, unsigned int format,
+				unsigned int byte_size,
+				struct snd_dma_buffer *bufp);
+	int (*trigger)(struct device *dev, bool start, int stream_tag);
+	int (*cleanup)(struct device *dev, struct snd_dma_buffer *dmab,
+				 int stream_tag);
 };
 struct skl_load_module_info {
 int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq,
 		const char *fw_name, struct skl_dsp_loader_ops dsp_ops,
 		struct skl_sst **dsp);
+int bxt_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq,
+		const char *fw_name, struct skl_dsp_loader_ops dsp_ops,
+		struct skl_sst **dsp);
 void skl_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx);
+void bxt_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx);
 #endif /*__SKL_SST_DSP_H__*/

sound/soc/intel/skylake/skl-sst.c+10−3

 #include <linux/delay.h>
 #include <linux/device.h>
 #include <linux/err.h>
+#include <linux/uuid.h>
 #include "../common/sst-dsp.h"
 #include "../common/sst-dsp-priv.h"
 #include "../common/sst-ipc.h"
 	return ret;
 }
-static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, char *guid)
+static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, u8 *guid)
 {
 	struct skl_module_table *module_entry = NULL;
 	int ret = 0;
 	char mod_name[64]; /* guid str = 32 chars + 4 hyphens */
+	uuid_le *uuid_mod;
-	snprintf(mod_name, sizeof(mod_name), "%s%s%s",
+	uuid_mod = (uuid_le *)guid;
-			"intel/dsp_fw_", guid, ".bin");
+	snprintf(mod_name, sizeof(mod_name), "%s%pUL%s",
+				"intel/dsp_fw_", uuid_mod, ".bin");
 	module_entry = skl_module_get_from_id(ctx, mod_id);
 	if (module_entry == NULL) {
 	skl_clear_module_table(ctx->dsp);
 	skl_ipc_free(&ctx->ipc);
 	ctx->dsp->ops->free(ctx->dsp);
+	if (ctx->boot_complete) {
+		ctx->dsp->cl_dev.ops.cl_cleanup_controller(ctx->dsp);
+		skl_cldma_int_disable(ctx->dsp);
+	}
 }
 EXPORT_SYMBOL_GPL(skl_sst_dsp_cleanup);

sound/soc/intel/skylake/skl-topology.c+22−5

 	dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg);
 }
+static void skl_tplg_update_chmap(struct skl_module_fmt *fmt, int chs)
+{
+	int slot_map = 0xFFFFFFFF;
+	int start_slot = 0;
+	int i;
+	for (i = 0; i < chs; i++) {
+		/*
+		 * For 2 channels with starting slot as 0, slot map will
+		 * look like 0xFFFFFF10.
+		 */
+		slot_map &= (~(0xF << (4 * i)) | (start_slot << (4 * i)));
+		start_slot++;
+	}
+	fmt->ch_map = slot_map;
+}
 static void skl_tplg_update_params(struct skl_module_fmt *fmt,
 			struct skl_pipe_params *params, int fixup)
 {
 	if (fixup & SKL_RATE_FIXUP_MASK)
 		fmt->s_freq = params->s_freq;
-	if (fixup & SKL_CH_FIXUP_MASK)
+	if (fixup & SKL_CH_FIXUP_MASK) {
 		fmt->channels = params->ch;
+		skl_tplg_update_chmap(fmt, fmt->channels);
+	}
 	if (fixup & SKL_FMT_FIXUP_MASK) {
 		fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
 		return -ENOMEM;
 	w->priv = mconfig;
+	memcpy(&mconfig->guid, &dfw_config->uuid, 16);
 	mconfig->id.module_id = dfw_config->module_id;
 	mconfig->id.instance_id = dfw_config->instance_id;
 	mconfig->mcps = dfw_config->max_mcps;
 	mconfig->time_slot = dfw_config->time_slot;
 	mconfig->formats_config.caps_size = dfw_config->caps.caps_size;
-	if (dfw_config->is_loadable)
-		memcpy(mconfig->guid, dfw_config->uuid,
-					ARRAY_SIZE(dfw_config->uuid));
 	mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) *
 						sizeof(*mconfig->m_in_pin),
 						GFP_KERNEL);

sound/soc/intel/skylake/skl-topology.h+1−1

@@ -281,7 +281,7 @@ enum skl_module_state { · 280 unmodified lines
281	};	281	};
282		282
283	struct skl_module_cfg {	283	struct skl_module_cfg {
284	char guid[SKL_UUID_STR_SZ];	284	u8 guid[16];
285	struct skl_module_inst_id id;	285	struct skl_module_inst_id id;
286	u8 domain;	286	u8 domain;
287	bool homogenous_inputs;	287	bool homogenous_inputs;

sound/soc/intel/skylake/skl-tplg-interface.h+1−1

@@ -181,7 +181,7 @@ struct skl_dfw_pipe { · 180 unmodified lines
181	} __packed;	181	} __packed;
182		182
183	struct skl_dfw_module {	183	struct skl_dfw_module {
184	char uuid[SKL_UUID_STR_SZ];	184	u8 uuid[16];
185		185
186	u16 module_id;	186	u16 module_id;
187	u16 instance_id;	187	u16 instance_id;

sound/soc/intel/skylake/skl.c+38−1

 	 * running, we need to save the state for these and continue
 	 */
 	if (skl->supend_active) {
+		/* turn off the links and stop the CORB/RIRB DMA if it is On */
 		snd_hdac_ext_bus_link_power_down_all(ebus);
+		if (ebus->cmd_dma_state)
+			snd_hdac_bus_stop_cmd_io(&ebus->bus);
 		enable_irq_wake(bus->irq);
 		pci_save_state(pci);
 		pci_disable_device(pci);
 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
 	struct skl *skl  = ebus_to_skl(ebus);
 	struct hdac_bus *bus = ebus_to_hbus(ebus);
+	struct hdac_ext_link *hlink = NULL;
 	int ret;
 	/* Turned OFF in HDMI codec driver after codec reconfiguration */
 		ret = pci_enable_device(pci);
 		snd_hdac_ext_bus_link_power_up_all(ebus);
 		disable_irq_wake(bus->irq);
+		/*
+		 * turn On the links which are On before active suspend
+		 * and start the CORB/RIRB DMA if On before
+		 * active suspend.
+		 */
+		list_for_each_entry(hlink, &ebus->hlink_list, list) {
+			if (hlink->ref_count)
+				snd_hdac_ext_bus_link_power_up(hlink);
+		}
+		if (ebus->cmd_dma_state)
+			snd_hdac_bus_init_cmd_io(&ebus->bus);
 	} else {
 		ret = _skl_resume(ebus);
+		/* turn off the links which are off before suspend */
+		list_for_each_entry(hlink, &ebus->hlink_list, list) {
+			if (!hlink->ref_count)
+				snd_hdac_ext_bus_link_power_down(hlink);
+		}
+		if (!ebus->cmd_dma_state)
+			snd_hdac_bus_stop_cmd_io(&ebus->bus);
 	}
 	return ret;
 	struct skl *skl;
 	struct hdac_ext_bus *ebus = NULL;
 	struct hdac_bus *bus = NULL;
+	struct hdac_ext_link *hlink = NULL;
 	int err;
 	/* we use ext core ops, so provide NULL for ops here */
 		err = skl_machine_device_register(skl,
 				  (void *)pci_id->driver_data);
 		if (err < 0)
-			goto out_free;
+			goto out_nhlt_free;
 		err = skl_init_dsp(skl);
 		if (err < 0) {
 		}
 	}
+	/*
+	 * we are done probling so decrement link counts
+	 */
+	list_for_each_entry(hlink, &ebus->hlink_list, list)
+		snd_hdac_ext_bus_link_put(ebus, hlink);
 	/*configure PM */
 	pm_runtime_put_noidle(bus->dev);
 	pm_runtime_allow(bus->dev);
 	skl_free_dsp(skl);
 out_mach_free:
 	skl_machine_device_unregister(skl);
+out_nhlt_free:
+	skl_nhlt_free(skl->nhlt);
 out_free:
 	skl->init_failed = 1;
 	skl_free(ebus);
 	skl_free_dsp(skl);
 	skl_machine_device_unregister(skl);
 	skl_dmic_device_unregister(skl);
+	skl_nhlt_free(skl->nhlt);
 	skl_free(ebus);
 	dev_set_drvdata(&pci->dev, NULL);
 }

sound/soc/intel/skylake/skl.h+3−3

@@ -66,7 +66,7 @@ struct skl { · 65 unmodified lines
66	struct platform_device *dmic_dev;	66	struct platform_device *dmic_dev;
67	struct platform_device *i2s_dev;	67	struct platform_device *i2s_dev;
68		68
69	void nhlt; / nhlt ptr */	69	struct nhlt_acpi_table nhlt; / nhlt ptr */
70	struct skl_sst skl_sst; / sst skl ctx */	70	struct skl_sst skl_sst; / sst skl ctx */
71		71
72	struct skl_dsp_resource resource;	72	struct skl_dsp_resource resource;
@@ -103,8 +103,8 @@ struct skl_dsp_ops { · 30 unmodified lines
103	int skl_platform_unregister(struct device *dev);	103	int skl_platform_unregister(struct device *dev);
104	int skl_platform_register(struct device *dev);	104	int skl_platform_register(struct device *dev);
105		105
106	void skl_nhlt_init(struct device dev);	106	struct nhlt_acpi_table skl_nhlt_init(struct device dev);
107	void skl_nhlt_free(void *addr);	107	void skl_nhlt_free(struct nhlt_acpi_table *addr);
108	struct nhlt_specific_cfg skl_get_ep_blob(struct skl skl, u32 instance,	108	struct nhlt_specific_cfg skl_get_ep_blob(struct skl skl, u32 instance,
109	u8 link_type, u8 s_fmt, u8 no_ch, u32 s_rate, u8 dirn);	109	u8 link_type, u8 s_fmt, u8 no_ch, u32 s_rate, u8 dirn);
110		110

sound/soc/rockchip/rockchip_i2s.c+55−32

@@ -34,6 +34,13 @@ struct rk_i2s_dev { · 33 unmodified lines
34		34
35	struct regmap *regmap;	35	struct regmap *regmap;
36		36
		37	/*
		38	* Used to indicate the tx/rx status.
		39	* I2S controller hopes to start the tx and rx together,
		40	* also to stop them when they are both try to stop.
		41	*/
		42	bool tx_start;
		43	bool rx_start;
37	bool is_master_mode;	44	bool is_master_mode;
38	};	45	};
39		46
@@ -75,29 +82,37 @@ static void rockchip_snd_txctrl(struct rk_i2s_dev *i2s, int on) · 35 unmodified lines
75	I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE);	82	I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_ENABLE);
76		83
77	regmap_update_bits(i2s->regmap, I2S_XFER,	84	regmap_update_bits(i2s->regmap, I2S_XFER,
78	I2S_XFER_TXS_START,	85	I2S_XFER_TXS_START \| I2S_XFER_RXS_START,
79	I2S_XFER_TXS_START);	86	I2S_XFER_TXS_START \| I2S_XFER_RXS_START);
		87
		88	i2s->tx_start = true;
80	} else {	89	} else {
		90	i2s->tx_start = false;
		91
81	regmap_update_bits(i2s->regmap, I2S_DMACR,	92	regmap_update_bits(i2s->regmap, I2S_DMACR,
82	I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE);	93	I2S_DMACR_TDE_ENABLE, I2S_DMACR_TDE_DISABLE);
83		94
84	regmap_update_bits(i2s->regmap, I2S_XFER,	95	if (!i2s->rx_start) {
85	I2S_XFER_TXS_START,	96	regmap_update_bits(i2s->regmap, I2S_XFER,
86	I2S_XFER_TXS_STOP);	97	I2S_XFER_TXS_START \|
		98	I2S_XFER_RXS_START,
		99	I2S_XFER_TXS_STOP \|
		100	I2S_XFER_RXS_STOP);
87		101
88	regmap_update_bits(i2s->regmap, I2S_CLR,	102	regmap_update_bits(i2s->regmap, I2S_CLR,
89	I2S_CLR_TXC,	103	I2S_CLR_TXC \| I2S_CLR_RXC,
90	I2S_CLR_TXC);	104	I2S_CLR_TXC \| I2S_CLR_RXC);
91		105
92	regmap_read(i2s->regmap, I2S_CLR, &val);
93
94	/* Should wait for clear operation to finish */
95	while (val & I2S_CLR_TXC) {
96	regmap_read(i2s->regmap, I2S_CLR, &val);	106	regmap_read(i2s->regmap, I2S_CLR, &val);
97	retry--;	107
98	if (!retry) {	108	/* Should wait for clear operation to finish */
99	dev_warn(i2s->dev, "fail to clear\n");	109	while (val) {
100	break;	110	regmap_read(i2s->regmap, I2S_CLR, &val);
		111	retry--;
		112	if (!retry) {
		113	dev_warn(i2s->dev, "fail to clear\n");
		114	break;
		115	}
101	}	116	}
102	}	117	}
103	}	118	}
@@ -113,29 +128,37 @@ static void rockchip_snd_rxctrl(struct rk_i2s_dev *i2s, int on) · 9 unmodified lines
113	I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE);	128	I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_ENABLE);
114		129
115	regmap_update_bits(i2s->regmap, I2S_XFER,	130	regmap_update_bits(i2s->regmap, I2S_XFER,
116	I2S_XFER_RXS_START,	131	I2S_XFER_TXS_START \| I2S_XFER_RXS_START,
117	I2S_XFER_RXS_START);	132	I2S_XFER_TXS_START \| I2S_XFER_RXS_START);
		133
		134	i2s->rx_start = true;
118	} else {	135	} else {
		136	i2s->rx_start = false;
		137
119	regmap_update_bits(i2s->regmap, I2S_DMACR,	138	regmap_update_bits(i2s->regmap, I2S_DMACR,
120	I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE);	139	I2S_DMACR_RDE_ENABLE, I2S_DMACR_RDE_DISABLE);
121		140
122	regmap_update_bits(i2s->regmap, I2S_XFER,	141	if (!i2s->tx_start) {
123	I2S_XFER_RXS_START,	142	regmap_update_bits(i2s->regmap, I2S_XFER,
124	I2S_XFER_RXS_STOP);	143	I2S_XFER_TXS_START \|
		144	I2S_XFER_RXS_START,
		145	I2S_XFER_TXS_STOP \|
		146	I2S_XFER_RXS_STOP);
125		147
126	regmap_update_bits(i2s->regmap, I2S_CLR,	148	regmap_update_bits(i2s->regmap, I2S_CLR,
127	I2S_CLR_RXC,	149	I2S_CLR_TXC \| I2S_CLR_RXC,
128	I2S_CLR_RXC);	150	I2S_CLR_TXC \| I2S_CLR_RXC);
129		151
130	regmap_read(i2s->regmap, I2S_CLR, &val);
131
132	/* Should wait for clear operation to finish */
133	while (val & I2S_CLR_RXC) {
134	regmap_read(i2s->regmap, I2S_CLR, &val);	152	regmap_read(i2s->regmap, I2S_CLR, &val);
135	retry--;	153
136	if (!retry) {	154	/* Should wait for clear operation to finish */
137	dev_warn(i2s->dev, "fail to clear\n");	155	while (val) {
138	break;	156	regmap_read(i2s->regmap, I2S_CLR, &val);
		157	retry--;
		158	if (!retry) {
		159	dev_warn(i2s->dev, "fail to clear\n");
		160	break;
		161	}
139	}	162	}
140	}	163	}
141	}	164	}

sound/soc/soc-core.c+13−1

 	return NULL;
 }
-static struct snd_soc_dai *snd_soc_find_dai(
+/**
+ * snd_soc_find_dai - Find a registered DAI
+ *
+ * @dlc: name of the DAI and optional component info to match
+ *
+ * This function will search all regsitered components and their DAIs to
+ * find the DAI of the same name. The component's of_node and name
+ * should also match if being specified.
+ *
+ * Return: pointer of DAI, or NULL if not found.
+ */
+struct snd_soc_dai *snd_soc_find_dai(
 	const struct snd_soc_dai_link_component *dlc)
 {
 	struct snd_soc_component *component;
 	return NULL;
 }
+EXPORT_SYMBOL_GPL(snd_soc_find_dai);
 static bool soc_is_dai_link_bound(struct snd_soc_card *card,
 		struct snd_soc_dai_link *dai_link)

sound/soc/soc-generic-dmaengine-pcm.c+34−23

@@ -163,31 +163,42 @@ static int dmaengine_pcm_set_runtime_hwparams(struct snd_pcm_substream *substrea · 162 unmodified lines
163	}	163	}
164		164
165	/*	165	/*
166	* Prepare formats mask for valid/allowed sample types. If the dma does	166	* If SND_DMAENGINE_PCM_DAI_FLAG_PACK is set keep
167	* not have support for the given physical word size, it needs to be	167	* hw.formats set to 0, meaning no restrictions are in place.
168	* masked out so user space can not use the format which produces	168	* In this case it's the responsibility of the DAI driver to
169	* corrupted audio.	169	* provide the supported format information.
170	* In case the dma driver does not implement the slave_caps the default
171	* assumption is that it supports 1, 2 and 4 bytes widths.
172	*/	170	*/
173	for (i = 0; i <= SNDRV_PCM_FORMAT_LAST; i++) {	171	if (!(dma_data->flags & SND_DMAENGINE_PCM_DAI_FLAG_PACK))
174	int bits = snd_pcm_format_physical_width(i);	172	/*
175		173	* Prepare formats mask for valid/allowed sample types. If the
176	/* Enable only samples with DMA supported physical widths */	174	* dma does not have support for the given physical word size,
177	switch (bits) {	175	* it needs to be masked out so user space can not use the
178	case 8:	176	* format which produces corrupted audio.
179	case 16:	177	* In case the dma driver does not implement the slave_caps the
180	case 24:	178	* default assumption is that it supports 1, 2 and 4 bytes
181	case 32:	179	* widths.
182	case 64:	180	*/
183	if (addr_widths & (1 << (bits / 8)))	181	for (i = 0; i <= SNDRV_PCM_FORMAT_LAST; i++) {
184	hw.formats \|= (1LL << i);	182	int bits = snd_pcm_format_physical_width(i);
185	break;	183
186	default:	184	/*
187	/* Unsupported types */	185	* Enable only samples with DMA supported physical
188	break;	186	* widths
		187	*/
		188	switch (bits) {
		189	case 8:
		190	case 16:
		191	case 24:
		192	case 32:
		193	case 64:
		194	if (addr_widths & (1 << (bits / 8)))
		195	hw.formats \|= (1LL << i);
		196	break;
		197	default:
		198	/* Unsupported types */
		199	break;
		200	}
189	}	201	}
190	}
191		202
192	return snd_soc_set_runtime_hwparams(substream, &hw);	203	return snd_soc_set_runtime_hwparams(substream, &hw);
193	}	204	}

@@ -6,7 +6,7 @@ This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers · 5 unmodified lines
6	using the SGDMA and MSGDMA soft DMA IP components. The driver uses the	6	using the SGDMA and MSGDMA soft DMA IP components. The driver uses the
7	platform bus to obtain component resources. The designs used to test this	7	platform bus to obtain component resources. The designs used to test this
8	driver were built for a Cyclone(R) V SOC FPGA board, a Cyclone(R) V FPGA board,	8	driver were built for a Cyclone(R) V SOC FPGA board, a Cyclone(R) V FPGA board,
9	and tested with ARM and NIOS processor hosts seperately. The anticipated use	9	and tested with ARM and NIOS processor hosts separately. The anticipated use
10	cases are simple communications between an embedded system and an external peer	10	cases are simple communications between an embedded system and an external peer
11	for status and simple configuration of the embedded system.	11	for status and simple configuration of the embedded system.
12		12
@@ -65,14 +65,14 @@ Driver parameters can be also passed in command line by using: · 52 unmodified lines
65	4.1) Transmit process	65	4.1) Transmit process
66	When the driver's transmit routine is called by the kernel, it sets up a	66	When the driver's transmit routine is called by the kernel, it sets up a
67	transmit descriptor by calling the underlying DMA transmit routine (SGDMA or	67	transmit descriptor by calling the underlying DMA transmit routine (SGDMA or
68	MSGDMA), and initites a transmit operation. Once the transmit is complete, an	68	MSGDMA), and initiates a transmit operation. Once the transmit is complete, an
69	interrupt is driven by the transmit DMA logic. The driver handles the transmit	69	interrupt is driven by the transmit DMA logic. The driver handles the transmit
70	completion in the context of the interrupt handling chain by recycling	70	completion in the context of the interrupt handling chain by recycling
71	resource required to send and track the requested transmit operation.	71	resource required to send and track the requested transmit operation.
72		72
73	4.2) Receive process	73	4.2) Receive process
74	The driver will post receive buffers to the receive DMA logic during driver	74	The driver will post receive buffers to the receive DMA logic during driver
75	intialization. Receive buffers may or may not be queued depending upon the	75	initialization. Receive buffers may or may not be queued depending upon the
76	underlying DMA logic (MSGDMA is able queue receive buffers, SGDMA is not able	76	underlying DMA logic (MSGDMA is able queue receive buffers, SGDMA is not able
77	to queue receive buffers to the SGDMA receive logic). When a packet is	77	to queue receive buffers to the SGDMA receive logic). When a packet is
78	received, the DMA logic generates an interrupt. The driver handles a receive	78	received, the DMA logic generates an interrupt. The driver handles a receive

@@ -8,7 +8,7 @@ Initial Release: · 7 unmodified lines
8	This is conceptually very similar to the macvlan driver with one major	8	This is conceptually very similar to the macvlan driver with one major
9	exception of using L3 for mux-ing /demux-ing among slaves. This property makes	9	exception of using L3 for mux-ing /demux-ing among slaves. This property makes
10	the master device share the L2 with it's slave devices. I have developed this	10	the master device share the L2 with it's slave devices. I have developed this
11	driver in conjuntion with network namespaces and not sure if there is use case	11	driver in conjunction with network namespaces and not sure if there is use case
12	outside of it.	12	outside of it.
13		13
14		14
@@ -42,7 +42,7 @@ out. In this mode the slaves will RX/TX multicast and broadcast (if applicable) · 27 unmodified lines
42	as well.	42	as well.
43		43
44	4.2 L3 mode:	44	4.2 L3 mode:
45	In this mode TX processing upto L3 happens on the stack instance attached	45	In this mode TX processing up to L3 happens on the stack instance attached
46	to the slave device and packets are switched to the stack instance of the	46	to the slave device and packets are switched to the stack instance of the
47	master device for the L2 processing and routing from that instance will be	47	master device for the L2 processing and routing from that instance will be
48	used before packets are queued on the outbound device. In this mode the slaves	48	used before packets are queued on the outbound device. In this mode the slaves
@@ -56,7 +56,7 @@ situations defines your use case then you can choose to use ipvlan - · 7 unmodified lines
56	(a) The Linux host that is connected to the external switch / router has	56	(a) The Linux host that is connected to the external switch / router has
57	policy configured that allows only one mac per port.	57	policy configured that allows only one mac per port.
58	(b) No of virtual devices created on a master exceed the mac capacity and	58	(b) No of virtual devices created on a master exceed the mac capacity and
59	puts the NIC in promiscous mode and degraded performance is a concern.	59	puts the NIC in promiscuous mode and degraded performance is a concern.
60	(c) If the slave device is to be put into the hostile / untrusted network	60	(c) If the slave device is to be put into the hostile / untrusted network
61	namespace where L2 on the slave could be changed / misused.	61	namespace where L2 on the slave could be changed / misused.
62		62

@@ -67,12 +67,12 @@ The two basic thread commands are: · 66 unmodified lines
67	* add_device DEVICE@NAME -- adds a single device	67	* add_device DEVICE@NAME -- adds a single device
68	* rem_device_all -- remove all associated devices	68	* rem_device_all -- remove all associated devices
69		69
70	When adding a device to a thread, a corrosponding procfile is created	70	When adding a device to a thread, a corresponding procfile is created
71	which is used for configuring this device. Thus, device names need to	71	which is used for configuring this device. Thus, device names need to
72	be unique.	72	be unique.
73		73
74	To support adding the same device to multiple threads, which is useful	74	To support adding the same device to multiple threads, which is useful
75	with multi queue NICs, a the device naming scheme is extended with "@":	75	with multi queue NICs, the device naming scheme is extended with "@":
76	device@something	76	device@something
77		77
78	The part after "@" can be anything, but it is custom to use the thread	78	The part after "@" can be anything, but it is custom to use the thread
@@ -221,7 +221,7 @@ Sample scripts · 142 unmodified lines
221		221
222	A collection of tutorial scripts and helpers for pktgen is in the	222	A collection of tutorial scripts and helpers for pktgen is in the
223	samples/pktgen directory. The helper parameters.sh file support easy	223	samples/pktgen directory. The helper parameters.sh file support easy
224	and consistant parameter parsing across the sample scripts.	224	and consistent parameter parsing across the sample scripts.
225		225
226	Usage example and help:	226	Usage example and help:
227	./pktgen_sample01_simple.sh -i eth4 -m 00:1B:21:3C:9D:F8 -d 192.168.8.2	227	./pktgen_sample01_simple.sh -i eth4 -m 00:1B:21:3C:9D:F8 -d 192.168.8.2

@@ -4,7 +4,7 @@ Krisztian <hidden@balabit.hu> and others and additional patches · 3 unmodified lines
4	from Jamal <hadi@cyberus.ca>.	4	from Jamal <hadi@cyberus.ca>.
5		5
6	The end goal for syncing is to be able to insert attributes + generate	6	The end goal for syncing is to be able to insert attributes + generate
7	events so that the an SA can be safely moved from one machine to another	7	events so that the SA can be safely moved from one machine to another
8	for HA purposes.	8	for HA purposes.
9	The idea is to synchronize the SA so that the takeover machine can do	9	The idea is to synchronize the SA so that the takeover machine can do
10	the processing of the SA as accurate as possible if it has access to it.	10	the processing of the SA as accurate as possible if it has access to it.
@@ -13,7 +13,7 @@ We already have the ability to generate SA add/del/upd events. · 2 unmodified lines
13	These patches add ability to sync and have accurate lifetime byte (to	13	These patches add ability to sync and have accurate lifetime byte (to
14	ensure proper decay of SAs) and replay counters to avoid replay attacks	14	ensure proper decay of SAs) and replay counters to avoid replay attacks
15	with as minimal loss at failover time.	15	with as minimal loss at failover time.
16	This way a backup stays as closely uptodate as an active member.	16	This way a backup stays as closely up-to-date as an active member.
17		17
18	Because the above items change for every packet the SA receives,	18	Because the above items change for every packet the SA receives,
19	it is possible for a lot of the events to be generated.	19	it is possible for a lot of the events to be generated.
@@ -163,7 +163,7 @@ If you have an SA that is getting hit by traffic in bursts such that · 143 unmodified lines
163	there is a period where the timer threshold expires with no packets	163	there is a period where the timer threshold expires with no packets
164	seen, then an odd behavior is seen as follows:	164	seen, then an odd behavior is seen as follows:
165	The first packet arrival after a timer expiry will trigger a timeout	165	The first packet arrival after a timer expiry will trigger a timeout
166	aevent; i.e we dont wait for a timeout period or a packet threshold	166	event; i.e we don't wait for a timeout period or a packet threshold
167	to be reached. This is done for simplicity and efficiency reasons.	167	to be reached. This is done for simplicity and efficiency reasons.
168		168
169	-JHS	169	-JHS

@@ -247,8 +247,8 @@ int mlx5_query_port_admin_status(struct mlx5_core_dev *dev, · 246 unmodified lines
247	}	247	}
248	EXPORT_SYMBOL_GPL(mlx5_query_port_admin_status);	248	EXPORT_SYMBOL_GPL(mlx5_query_port_admin_status);
249		249
250	static void mlx5_query_port_mtu(struct mlx5_core_dev dev, int admin_mtu,	250	static void mlx5_query_port_mtu(struct mlx5_core_dev dev, u16 admin_mtu,
251	int max_mtu, int oper_mtu, u8 port)	251	u16 max_mtu, u16 oper_mtu, u8 port)
252	{	252	{
253	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];	253	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];
254	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];	254	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];
@@ -268,7 +268,7 @@ static void mlx5_query_port_mtu(struct mlx5_core_dev dev, int admin_mtu, · 13 unmodified lines
268	*admin_mtu = MLX5_GET(pmtu_reg, out, admin_mtu);	268	*admin_mtu = MLX5_GET(pmtu_reg, out, admin_mtu);
269	}	269	}
270		270
271	int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port)	271	int mlx5_set_port_mtu(struct mlx5_core_dev *dev, u16 mtu, u8 port)
272	{	272	{
273	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];	273	u32 in[MLX5_ST_SZ_DW(pmtu_reg)];
274	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];	274	u32 out[MLX5_ST_SZ_DW(pmtu_reg)];
@@ -283,14 +283,14 @@ int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu, u8 port) · 8 unmodified lines
283	}	283	}
284	EXPORT_SYMBOL_GPL(mlx5_set_port_mtu);	284	EXPORT_SYMBOL_GPL(mlx5_set_port_mtu);
285		285
286	void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, int max_mtu,	286	void mlx5_query_port_max_mtu(struct mlx5_core_dev dev, u16 max_mtu,
287	u8 port)	287	u8 port)
288	{	288	{
289	mlx5_query_port_mtu(dev, NULL, max_mtu, NULL, port);	289	mlx5_query_port_mtu(dev, NULL, max_mtu, NULL, port);
290	}	290	}
291	EXPORT_SYMBOL_GPL(mlx5_query_port_max_mtu);	291	EXPORT_SYMBOL_GPL(mlx5_query_port_max_mtu);
292		292
293	void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, int oper_mtu,	293	void mlx5_query_port_oper_mtu(struct mlx5_core_dev dev, u16 oper_mtu,
294	u8 port)	294	u8 port)
295	{	295	{
296	mlx5_query_port_mtu(dev, NULL, NULL, oper_mtu, port);	296	mlx5_query_port_mtu(dev, NULL, NULL, oper_mtu, port);