Pull clk fixes from Stephen Boyd: "A small set of fixes for clk drivers. One to fix a DT refcount imbalance, two to mark some Amlogic clks as critical, and one final one that fixes a clk name for the Qualcomm driver merged this cycle" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: clk: qcom: gcc: Fix board clock node name clk: meson: axg: mark fdiv2 and fdiv3 as critical clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL clk: fixed-factor: fix of_node_get-put imbalance
Unified · Split
| @@ -210,6 +210,7 @@ static int of_fixed_factor_clk_remove(struct platform_device *pdev) · 209 unmodified lines | ||
| 210 | 210 | { |
| 211 | 211 | struct clk *clk = platform_get_drvdata(pdev); |
| 212 | 212 | |
| 213 | + of_clk_del_provider(pdev->dev.of_node); | |
| 213 | 214 | clk_unregister_fixed_factor(clk); |
| 214 | 215 | |
| 215 | 216 | return 0; |
| @@ -325,6 +325,7 @@ static struct clk_regmap axg_fclk_div2 = { · 324 unmodified lines | ||
| 325 | 325 | .ops = &clk_regmap_gate_ops, |
| 326 | 326 | .parent_names = (const char *[]){ "fclk_div2_div" }, |
| 327 | 327 | .num_parents = 1, |
| 328 | + .flags = CLK_IS_CRITICAL, | |
| 328 | 329 | }, |
| 329 | 330 | }; |
| 330 | 331 | |
| @@ -349,6 +350,18 @@ static struct clk_regmap axg_fclk_div3 = { · 18 unmodified lines | ||
| 349 | 350 | .ops = &clk_regmap_gate_ops, |
| 350 | 351 | .parent_names = (const char *[]){ "fclk_div3_div" }, |
| 351 | 352 | .num_parents = 1, |
| 353 | + /* | |
| 354 | + * FIXME: | |
| 355 | + * This clock, as fdiv2, is used by the SCPI FW and is required | |
| 356 | + * by the platform to operate correctly. | |
| 357 | + * Until the following condition are met, we need this clock to | |
| 358 | + * be marked as critical: | |
| 359 | + * a) The SCPI generic driver claims and enable all the clocks | |
| 360 | + * it needs | |
| 361 | + * b) CCF has a clock hand-off mechanism to make the sure the | |
| 362 | + * clock stays on until the proper driver comes along | |
| 363 | + */ | |
| 364 | + .flags = CLK_IS_CRITICAL, | |
| 352 | 365 | }, |
| 353 | 366 | }; |
| 354 | 367 | |
| @@ -506,6 +506,18 @@ static struct clk_regmap gxbb_fclk_div3 = { · 505 unmodified lines | ||
| 506 | 506 | .ops = &clk_regmap_gate_ops, |
| 507 | 507 | .parent_names = (const char *[]){ "fclk_div3_div" }, |
| 508 | 508 | .num_parents = 1, |
| 509 | + /* | |
| 510 | + * FIXME: | |
| 511 | + * This clock, as fdiv2, is used by the SCPI FW and is required | |
| 512 | + * by the platform to operate correctly. | |
| 513 | + * Until the following condition are met, we need this clock to | |
| 514 | + * be marked as critical: | |
| 515 | + * a) The SCPI generic driver claims and enable all the clocks | |
| 516 | + * it needs | |
| 517 | + * b) CCF has a clock hand-off mechanism to make the sure the | |
| 518 | + * clock stays on until the proper driver comes along | |
| 519 | + */ | |
| 520 | + .flags = CLK_IS_CRITICAL, | |
| 509 | 521 | }, |
| 510 | 522 | }; |
| 511 | 523 | |
| @@ -265,7 +265,7 @@ static struct clk_fixed_factor cxo = { · 264 unmodified lines | ||
| 265 | 265 | .div = 1, |
| 266 | 266 | .hw.init = &(struct clk_init_data){ |
| 267 | 267 | .name = "cxo", |
| 268 | − .parent_names = (const char *[]){ "xo_board" }, | |
| 268 | + .parent_names = (const char *[]){ "xo-board" }, | |
| 269 | 269 | .num_parents = 1, |
| 270 | 270 | .ops = &clk_fixed_factor_ops, |
| 271 | 271 | }, |