lael-labs/linux

Documentation/ABI/testing/sysfs-bus-pci+12−0

@@ -210,3 +210,15 @@ Users: · 209 unmodified lines
210	firmware assigned instance number of the PCI	210	firmware assigned instance number of the PCI
211	device that can help in understanding the firmware	211	device that can help in understanding the firmware
212	intended order of the PCI device.	212	intended order of the PCI device.
		213
		214	What: /sys/bus/pci/devices/.../d3cold_allowed
		215	Date: July 2012
		216	Contact: Huang Ying <ying.huang@intel.com>
		217	Description:
		218	d3cold_allowed is bit to control whether the corresponding PCI
		219	device can be put into D3Cold state. If it is cleared, the
		220	device will never be put into D3Cold state. If it is set, the
		221	device may be put into D3Cold state if other requirements are
		222	satisfied too. Reading this attribute will show the current
		223	value of d3cold_allowed bit. Writing this attribute will set
		224	the value of d3cold_allowed bit.

Documentation/block/00-INDEX+8−2

 biodoc.txt
 	- Notes on the Generic Block Layer Rewrite in Linux 2.5
 capability.txt
-	- Generic Block Device Capability (/sys/block/<disk>/capability)
+	- Generic Block Device Capability (/sys/block/<device>/capability)
+cfq-iosched.txt
+	- CFQ IO scheduler tunables
+data-integrity.txt
+	- Block data integrity
 deadline-iosched.txt
 	- Deadline IO scheduler tunables
 ioprio.txt
 	- Block io priorities (in CFQ scheduler)
+queue-sysfs.txt
+	- Queue's sysfs entries
 request.txt
 	- The members of struct request (in include/linux/blkdev.h)
 stat.txt
-	- Block layer statistics in /sys/block/<dev>/stat
+	- Block layer statistics in /sys/block/<device>/stat
 switching-sched.txt
 	- Switching I/O schedulers at runtime
 writeback_cache_control.txt

Documentation/block/cfq-iosched.txt+77−0

@@ -1,3 +1,14 @@
		1	CFQ (Complete Fairness Queueing)
		2	===============================
		3
		4	The main aim of CFQ scheduler is to provide a fair allocation of the disk
		5	I/O bandwidth for all the processes which requests an I/O operation.
		6
		7	CFQ maintains the per process queue for the processes which request I/O
		8	operation(syncronous requests). In case of asynchronous requests, all the
		9	requests from all the processes are batched together according to their
		10	process's I/O priority.
		11
1	CFQ ioscheduler tunables	12	CFQ ioscheduler tunables
2	========================	13	========================
3		14
@@ -25,6 +36,72 @@ there are multiple spindles behind single LUN (Host based hardware RAID · 21 unmodified lines
25	controller or for storage arrays), setting slice_idle=0 might end up in better	36	controller or for storage arrays), setting slice_idle=0 might end up in better
26	throughput and acceptable latencies.	37	throughput and acceptable latencies.
27		38
		39	back_seek_max
		40	-------------
		41	This specifies, given in Kbytes, the maximum "distance" for backward seeking.
		42	The distance is the amount of space from the current head location to the
		43	sectors that are backward in terms of distance.
		44
		45	This parameter allows the scheduler to anticipate requests in the "backward"
		46	direction and consider them as being the "next" if they are within this
		47	distance from the current head location.
		48
		49	back_seek_penalty
		50	-----------------
		51	This parameter is used to compute the cost of backward seeking. If the
		52	backward distance of request is just 1/back_seek_penalty from a "front"
		53	request, then the seeking cost of two requests is considered equivalent.
		54
		55	So scheduler will not bias toward one or the other request (otherwise scheduler
		56	will bias toward front request). Default value of back_seek_penalty is 2.
		57
		58	fifo_expire_async
		59	-----------------
		60	This parameter is used to set the timeout of asynchronous requests. Default
		61	value of this is 248ms.
		62
		63	fifo_expire_sync
		64	----------------
		65	This parameter is used to set the timeout of synchronous requests. Default
		66	value of this is 124ms. In case to favor synchronous requests over asynchronous
		67	one, this value should be decreased relative to fifo_expire_async.
		68
		69	slice_async
		70	-----------
		71	This parameter is same as of slice_sync but for asynchronous queue. The
		72	default value is 40ms.
		73
		74	slice_async_rq
		75	--------------
		76	This parameter is used to limit the dispatching of asynchronous request to
		77	device request queue in queue's slice time. The maximum number of request that
		78	are allowed to be dispatched also depends upon the io priority. Default value
		79	for this is 2.
		80
		81	slice_sync
		82	----------
		83	When a queue is selected for execution, the queues IO requests are only
		84	executed for a certain amount of time(time_slice) before switching to another
		85	queue. This parameter is used to calculate the time slice of synchronous
		86	queue.
		87
		88	time_slice is computed using the below equation:-
		89	time_slice = slice_sync + (slice_sync/5 * (4 - prio)). To increase the
		90	time_slice of synchronous queue, increase the value of slice_sync. Default
		91	value is 100ms.
		92
		93	quantum
		94	-------
		95	This specifies the number of request dispatched to the device queue. In a
		96	queue's time slice, a request will not be dispatched if the number of request
		97	in the device exceeds this parameter. This parameter is used for synchronous
		98	request.
		99
		100	In case of storage with several disk, this setting can limit the parallel
		101	processing of request. Therefore, increasing the value can imporve the
		102	performace although this can cause the latency of some I/O to increase due
		103	to more number of requests.
		104
28	CFQ IOPS Mode for group scheduling	105	CFQ IOPS Mode for group scheduling
29	===================================	106	===================================
30	Basic CFQ design is to provide priority based time slices. Higher priority	107	Basic CFQ design is to provide priority based time slices. Higher priority

Documentation/block/queue-sysfs.txt+64−0

@@ -9,20 +9,71 @@ These files are the ones found in the /sys/block/xxx/queue/ directory. · 8 unmodified lines
9	Files denoted with a RO postfix are readonly and the RW postfix means	9	Files denoted with a RO postfix are readonly and the RW postfix means
10	read-write.	10	read-write.
11		11
		12	add_random (RW)
		13	----------------
		14	This file allows to trun off the disk entropy contribution. Default
		15	value of this file is '1'(on).
		16
		17	discard_granularity (RO)
		18	-----------------------
		19	This shows the size of internal allocation of the device in bytes, if
		20	reported by the device. A value of '0' means device does not support
		21	the discard functionality.
		22
		23	discard_max_bytes (RO)
		24	----------------------
		25	Devices that support discard functionality may have internal limits on
		26	the number of bytes that can be trimmed or unmapped in a single operation.
		27	The discard_max_bytes parameter is set by the device driver to the maximum
		28	number of bytes that can be discarded in a single operation. Discard
		29	requests issued to the device must not exceed this limit. A discard_max_bytes
		30	value of 0 means that the device does not support discard functionality.
		31
		32	discard_zeroes_data (RO)
		33	------------------------
		34	When read, this file will show if the discarded block are zeroed by the
		35	device or not. If its value is '1' the blocks are zeroed otherwise not.
		36
12	hw_sector_size (RO)	37	hw_sector_size (RO)
13	-------------------	38	-------------------
14	This is the hardware sector size of the device, in bytes.	39	This is the hardware sector size of the device, in bytes.
15		40
		41	iostats (RW)
		42	-------------
		43	This file is used to control (on/off) the iostats accounting of the
		44	disk.
		45
		46	logical_block_size (RO)
		47	-----------------------
		48	This is the logcal block size of the device, in bytes.
		49
16	max_hw_sectors_kb (RO)	50	max_hw_sectors_kb (RO)
17	----------------------	51	----------------------
18	This is the maximum number of kilobytes supported in a single data transfer.	52	This is the maximum number of kilobytes supported in a single data transfer.
19		53
		54	max_integrity_segments (RO)
		55	---------------------------
		56	When read, this file shows the max limit of integrity segments as
		57	set by block layer which a hardware controller can handle.
		58
20	max_sectors_kb (RW)	59	max_sectors_kb (RW)
21	-------------------	60	-------------------
22	This is the maximum number of kilobytes that the block layer will allow	61	This is the maximum number of kilobytes that the block layer will allow
23	for a filesystem request. Must be smaller than or equal to the maximum	62	for a filesystem request. Must be smaller than or equal to the maximum
24	size allowed by the hardware.	63	size allowed by the hardware.
25		64
		65	max_segments (RO)
		66	-----------------
		67	Maximum number of segments of the device.
		68
		69	max_segment_size (RO)
		70	---------------------
		71	Maximum segment size of the device.
		72
		73	minimum_io_size (RO)
		74	--------------------
		75	This is the smallest preferred io size reported by the device.
		76
26	nomerges (RW)	77	nomerges (RW)
27	-------------	78	-------------
28	This enables the user to disable the lookup logic involved with IO	79	This enables the user to disable the lookup logic involved with IO
@@ -45,11 +96,24 @@ per-block-cgroup request pool. IOW, if there are N block cgroups, · 16 unmodified lines
45	each request queue may have upto N request pools, each independently	96	each request queue may have upto N request pools, each independently
46	regulated by nr_requests.	97	regulated by nr_requests.
47		98
		99	optimal_io_size (RO)
		100	--------------------
		101	This is the optimal io size reported by the device.
		102
		103	physical_block_size (RO)
		104	------------------------
		105	This is the physical block size of device, in bytes.
		106
48	read_ahead_kb (RW)	107	read_ahead_kb (RW)
49	------------------	108	------------------
50	Maximum number of kilobytes to read-ahead for filesystems on this block	109	Maximum number of kilobytes to read-ahead for filesystems on this block
51	device.	110	device.
52		111
		112	rotational (RW)
		113	---------------
		114	This file is used to stat if the device is of rotational type or
		115	non-rotational type.
		116
53	rq_affinity (RW)	117	rq_affinity (RW)
54	----------------	118	----------------
55	If this option is '1', the block layer will migrate request completions to the	119	If this option is '1', the block layer will migrate request completions to the

Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt+4−4

@@ -10,8 +10,8 @@ Required properties: · 9 unmodified lines
10	- compatible : Should be "fsl,<chip>-esdhc"	10	- compatible : Should be "fsl,<chip>-esdhc"
11		11
12	Optional properties:	12	Optional properties:
13	- fsl,cd-internal : Indicate to use controller internal card detection	13	- fsl,cd-controller : Indicate to use controller internal card detection
14	- fsl,wp-internal : Indicate to use controller internal write protection	14	- fsl,wp-controller : Indicate to use controller internal write protection
15		15
16	Examples:	16	Examples:
17		17
@@ -19,8 +19,8 @@ esdhc@70004000 { · 1 unmodified line
19	compatible = "fsl,imx51-esdhc";	19	compatible = "fsl,imx51-esdhc";
20	reg = <0x70004000 0x4000>;	20	reg = <0x70004000 0x4000>;
21	interrupts = <1>;	21	interrupts = <1>;
22	fsl,cd-internal;	22	fsl,cd-controller;
23	fsl,wp-internal;	23	fsl,wp-controller;
24	};	24	};
25		25
26	esdhc@70008000 {	26	esdhc@70008000 {

Documentation/feature-removal-schedule.txt+1−1

@@ -579,7 +579,7 @@ Why: KVM tracepoints provide mostly equivalent information in a much more · 578 unmodified lines
579	----------------------------	579	----------------------------
580		580
581	What: at91-mci driver ("CONFIG_MMC_AT91")	581	What: at91-mci driver ("CONFIG_MMC_AT91")
582	When: 3.7	582	When: 3.8
583	Why: There are two mci drivers: at91-mci and atmel-mci. The PDC support	583	Why: There are two mci drivers: at91-mci and atmel-mci. The PDC support
584	was added to atmel-mci as a first step to support more chips.	584	was added to atmel-mci as a first step to support more chips.
585	Then at91-mci was kept only for old IP versions (on at91rm9200 and	585	Then at91-mci was kept only for old IP versions (on at91rm9200 and

Documentation/watchdog/src/watchdog-test.c+1−1

@@ -31,7 +31,7 @@ static void keep_alive(void) · 30 unmodified lines
31	* or "-e" to enable the card.	31	* or "-e" to enable the card.
32	*/	32	*/
33		33
34	void term(int sig)	34	static void term(int sig)
35	{	35	{
36	close(fd);	36	close(fd);
37	fprintf(stderr, "Stopping watchdog ticks...\n");	37	fprintf(stderr, "Stopping watchdog ticks...\n");

Makefile+1−1

@@ -1,7 +1,7 @@
1	VERSION = 3	1	VERSION = 3
2	PATCHLEVEL = 6	2	PATCHLEVEL = 6
3	SUBLEVEL = 0	3	SUBLEVEL = 0
4	EXTRAVERSION = -rc3	4	EXTRAVERSION = -rc5
5	NAME = Saber-toothed Squirrel	5	NAME = Saber-toothed Squirrel
6		6
7	# DOCUMENTATION	7	# DOCUMENTATION

arch/arm/Kconfig+2−1

 	select HAVE_DMA_API_DEBUG
 	select HAVE_IDE if PCI || ISA || PCMCIA
 	select HAVE_DMA_ATTRS
-	select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
+	select HAVE_DMA_CONTIGUOUS if MMU
 	select HAVE_MEMBLOCK
 	select RTC_LIB
 	select SYS_SUPPORTS_APM_EMULATION
 config CPU_FREQ_IMX
 	tristate "CPUfreq driver for i.MX CPUs"
 	depends on ARCH_MXC && CPU_FREQ
+	select CPU_FREQ_TABLE
 	help
 	  This enables the CPUfreq driver for i.MX CPUs.

arch/arm/boot/dts/am33xx.dtsi+5−0

 			#size-cells = <0>;
 			ti,hwmods = "i2c3";
 		};
+		wdt2: wdt@44e35000 {
+			compatible = "ti,omap3-wdt";
+			ti,hwmods = "wd_timer2";
+		};
 	};
 };

arch/arm/boot/dts/at91sam9g25ek.dts+1−1

@@ -15,7 +15,7 @@ · 14 unmodified lines
15	compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";	15	compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
16		16
17	chosen {	17	chosen {
18	bootargs = "128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";	18	bootargs = "console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";
19	};	19	};
20		20
21	ahb {	21	ahb {

arch/arm/boot/dts/imx51-babbage.dts+2−2

@@ -25,8 +25,8 @@ · 24 unmodified lines
25	aips@70000000 { /* aips-1 */	25	aips@70000000 { /* aips-1 */
26	spba@70000000 {	26	spba@70000000 {
27	esdhc@70004000 { /* ESDHC1 */	27	esdhc@70004000 { /* ESDHC1 */
28	fsl,cd-internal;	28	fsl,cd-controller;
29	fsl,wp-internal;	29	fsl,wp-controller;
30	status = "okay";	30	status = "okay";
31	};	31	};
32		32

arch/arm/boot/dts/kirkwood-iconnect.dts+5−1

 		};
 		power-blue {
 			label = "power:blue";
-			gpios = <&gpio1 11 0>;
+			gpios = <&gpio1 10 0>;
 			linux,default-trigger = "timer";
 		};
+		power-red {
+			label = "power:red";
+			gpios = <&gpio1 11 0>;
+		};
 		usb1 {
 			label = "usb1:blue";
 			gpios = <&gpio1 12 0>;

arch/arm/boot/dts/twl6030.dtsi+3−0

 	vcxio: regulator@8 {
 		compatible = "ti,twl6030-vcxio";
+		regulator-always-on;
 	};
 	vusb: regulator@9 {
 	v1v8: regulator@10 {
 		compatible = "ti,twl6030-v1v8";
+		regulator-always-on;
 	};
 	v2v1: regulator@11 {
 		compatible = "ti,twl6030-v2v1";
+		regulator-always-on;
 	};
 	clk32kg: regulator@12 {

arch/arm/configs/armadillo800eva_defconfig+1−1

@@ -33,7 +33,7 @@ CONFIG_AEABI=y · 32 unmodified lines
33	CONFIG_FORCE_MAX_ZONEORDER=13	33	CONFIG_FORCE_MAX_ZONEORDER=13
34	CONFIG_ZBOOT_ROM_TEXT=0x0	34	CONFIG_ZBOOT_ROM_TEXT=0x0
35	CONFIG_ZBOOT_ROM_BSS=0x0	35	CONFIG_ZBOOT_ROM_BSS=0x0
36	CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096"	36	CONFIG_CMDLINE="console=tty0 console=ttySC1,115200 earlyprintk=sh-sci.1,115200 ignore_loglevel root=/dev/nfs ip=dhcp nfsroot=,rsize=4096,wsize=4096 rw"
37	CONFIG_CMDLINE_FORCE=y	37	CONFIG_CMDLINE_FORCE=y
38	CONFIG_KEXEC=y	38	CONFIG_KEXEC=y
39	CONFIG_VFP=y	39	CONFIG_VFP=y

arch/arm/configs/u8500_defconfig+1−0

@@ -86,6 +86,7 @@ CONFIG_NEW_LEDS=y · 85 unmodified lines
86	CONFIG_LEDS_CLASS=y	86	CONFIG_LEDS_CLASS=y
87	CONFIG_LEDS_LM3530=y	87	CONFIG_LEDS_LM3530=y
88	CONFIG_LEDS_LP5521=y	88	CONFIG_LEDS_LP5521=y
		89	CONFIG_LEDS_GPIO=y
89	CONFIG_RTC_CLASS=y	90	CONFIG_RTC_CLASS=y
90	CONFIG_RTC_DRV_AB8500=y	91	CONFIG_RTC_DRV_AB8500=y
91	CONFIG_RTC_DRV_PL031=y	92	CONFIG_RTC_DRV_PL031=y

arch/arm/include/asm/dma-mapping.h+7−0

@@ -202,6 +202,13 @@ static inline void dma_free_writecombine(struct device *dev, size_t size, · 201 unmodified lines
202	return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);	202	return dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
203	}	203	}
204		204
		205	/*
		206	* This can be called during early boot to increase the size of the atomic
		207	* coherent DMA pool above the default value of 256KiB. It must be called
		208	* before postcore_initcall.
		209	*/
		210	extern void __init init_dma_coherent_pool_size(unsigned long size);
		211
205	/*	212	/*
206	* This can be called during boot to increase the size of the consistent	213	* This can be called during boot to increase the size of the consistent
207	* DMA region above it's default value of 2MB. It must be called before the	214	* DMA region above it's default value of 2MB. It must be called before the

arch/arm/mach-at91/at91rm9200_time.c+1−1

@@ -197,7 +197,7 @@ void __init at91rm9200_timer_init(void) · 196 unmodified lines
197	at91_st_read(AT91_ST_SR);	197	at91_st_read(AT91_ST_SR);
198		198
199	/* Make IRQs happen for the system timer */	199	/* Make IRQs happen for the system timer */
200	setup_irq(AT91_ID_SYS, &at91rm9200_timer_irq);	200	setup_irq(NR_IRQS_LEGACY + AT91_ID_SYS, &at91rm9200_timer_irq);
201		201
202	/* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used	202	/* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
203	* directly for the clocksource and all clockevents, after adjusting	203	* directly for the clocksource and all clockevents, after adjusting

arch/arm/mach-at91/at91sam9260_devices.c+5−1

 		.flags	= IORESOURCE_MEM,
 	}, {
 		.flags	= IORESOURCE_MEM,
+	}, {
+		.flags  = IORESOURCE_IRQ,
 	},
 };
 	 * The second resource is needed:
 	 * GPBR will serve as the storage for RTC time offset
 	 */
-	at91sam9260_rtt_device.num_resources = 2;
+	at91sam9260_rtt_device.num_resources = 3;
 	rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
 				 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 	rtt_resources[1].end = rtt_resources[1].start + 3;
+	rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+	rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)

arch/arm/mach-at91/at91sam9261_devices.c+5−1

 		.flags	= IORESOURCE_MEM,
 	}, {
 		.flags	= IORESOURCE_MEM,
+	}, {
+		.flags  = IORESOURCE_IRQ,
 	}
 };
 	 * The second resource is needed:
 	 * GPBR will serve as the storage for RTC time offset
 	 */
-	at91sam9261_rtt_device.num_resources = 2;
+	at91sam9261_rtt_device.num_resources = 3;
 	rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
 				 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 	rtt_resources[1].end = rtt_resources[1].start + 3;
+	rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+	rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)

arch/arm/mach-at91/at91sam9263_devices.c+8−2

 		.flags	= IORESOURCE_MEM,
 	}, {
 		.flags	= IORESOURCE_MEM,
+	}, {
+		.flags  = IORESOURCE_IRQ,
 	}
 };
 		.flags	= IORESOURCE_MEM,
 	}, {
 		.flags	= IORESOURCE_MEM,
+	}, {
+		.flags  = IORESOURCE_IRQ,
 	}
 };
 		 * The second resource is needed only for the chosen RTT:
 		 * GPBR will serve as the storage for RTC time offset
 		 */
-		at91sam9263_rtt0_device.num_resources = 2;
+		at91sam9263_rtt0_device.num_resources = 3;
 		at91sam9263_rtt1_device.num_resources = 1;
 		pdev = &at91sam9263_rtt0_device;
 		r = rtt0_resources;
 		break;
 	case 1:
 		at91sam9263_rtt0_device.num_resources = 1;
-		at91sam9263_rtt1_device.num_resources = 2;
+		at91sam9263_rtt1_device.num_resources = 3;
 		pdev = &at91sam9263_rtt1_device;
 		r = rtt1_resources;
 		break;
 	pdev->name = "rtc-at91sam9";
 	r[1].start = AT91SAM9263_BASE_GPBR + 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 	r[1].end = r[1].start + 3;
+	r[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+	r[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)

arch/arm/mach-at91/at91sam9g45_devices.c+5−1

 		.flags	= IORESOURCE_MEM,
 	}, {
 		.flags	= IORESOURCE_MEM,
+	}, {
+		.flags  = IORESOURCE_IRQ,
 	}
 };
 	 * The second resource is needed:
 	 * GPBR will serve as the storage for RTC time offset
 	 */
-	at91sam9g45_rtt_device.num_resources = 2;
+	at91sam9g45_rtt_device.num_resources = 3;
 	rtt_resources[1].start = AT91SAM9G45_BASE_GPBR +
 				 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 	rtt_resources[1].end = rtt_resources[1].start + 3;
+	rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+	rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)

arch/arm/mach-at91/at91sam9rl_devices.c+5−1

 		.flags	= IORESOURCE_MEM,
 	}, {
 		.flags	= IORESOURCE_MEM,
+	}, {
+		.flags  = IORESOURCE_IRQ,
 	}
 };
 	 * The second resource is needed:
 	 * GPBR will serve as the storage for RTC time offset
 	 */
-	at91sam9rl_rtt_device.num_resources = 2;
+	at91sam9rl_rtt_device.num_resources = 3;
 	rtt_resources[1].start = AT91SAM9RL_BASE_GPBR +
 				 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 	rtt_resources[1].end = rtt_resources[1].start + 3;
+	rtt_resources[2].start = NR_IRQS_LEGACY + AT91_ID_SYS;
+	rtt_resources[2].end = NR_IRQS_LEGACY + AT91_ID_SYS;
 }
 #else
 static void __init at91_add_device_rtt_rtc(void)

arch/arm/mach-at91/clock.c+12−0

 #define cpu_has_300M_plla()	(cpu_is_at91sam9g10())
+#define cpu_has_240M_plla()	(cpu_is_at91sam9261() \
+				|| cpu_is_at91sam9263() \
+				|| cpu_is_at91sam9rl())
+#define cpu_has_210M_plla()	(cpu_is_at91sam9260())
 #define cpu_has_pllb()		(!(cpu_is_at91sam9rl() \
 				|| cpu_is_at91sam9g45() \
 				|| cpu_is_at91sam9x5() \
 	} else if (cpu_has_800M_plla()) {
 		if (plla.rate_hz > 800000000)
 			pll_overclock = true;
+	} else if (cpu_has_240M_plla()) {
+		if (plla.rate_hz > 240000000)
+			pll_overclock = true;
+	} else if (cpu_has_210M_plla()) {
+		if (plla.rate_hz > 210000000)
+			pll_overclock = true;
 	} else {
 		if (plla.rate_hz > 209000000)
 			pll_overclock = true;

arch/arm/mach-dove/common.c+2−1

@@ -102,7 +102,8 @@ void __init dove_ehci1_init(void) · 101 unmodified lines
102	void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)	102	void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
103	{	103	{
104	orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,	104	orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
105	IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR);	105	IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
		106	1600);
106	}	107	}
107		108
108	/*****************************************************************************	109	/*****************************************************************************

arch/arm/mach-exynos/mach-origen.c+7−0

 #include <plat/backlight.h>
 #include <plat/fb.h>
 #include <plat/mfc.h>
+#include <plat/hdmi.h>
 #include <mach/ohci.h>
 #include <mach/map.h>
 	s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
 }
+/* I2C module and id for HDMIPHY */
+static struct i2c_board_info hdmiphy_info = {
+	I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
+};
 static void s5p_tv_setup(void)
 {
 	/* Direct HPD to HDMI chip */
 	s5p_tv_setup();
 	s5p_i2c_hdmiphy_set_platdata(NULL);
+	s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
 #ifdef CONFIG_DRM_EXYNOS
 	s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;

arch/arm/mach-exynos/mach-smdkv310.c+7−0

 #include <plat/mfc.h>
 #include <plat/ehci.h>
 #include <plat/clock.h>
+#include <plat/hdmi.h>
 #include <mach/map.h>
 #include <mach/ohci.h>
 	.pwm_period_ns  = 1000,
 };
+/* I2C module and id for HDMIPHY */
+static struct i2c_board_info hdmiphy_info = {
+	I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
+};
 static void s5p_tv_setup(void)
 {
 	/* direct HPD to HDMI chip */
 	s5p_tv_setup();
 	s5p_i2c_hdmiphy_set_platdata(NULL);
+	s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
 	samsung_keypad_set_platdata(&smdkv310_keypad_data);

arch/arm/mach-gemini/irq.c+1−0

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	#include <linux/sched.h>	17	#include <linux/sched.h>
18	#include <asm/irq.h>	18	#include <asm/irq.h>
19	#include <asm/mach/irq.h>	19	#include <asm/mach/irq.h>
		20	#include <asm/system_misc.h>
20	#include <mach/hardware.h>	21	#include <mach/hardware.h>
21		22
22	#define IRQ_SOURCE(base_addr) (base_addr + 0x00)	23	#define IRQ_SOURCE(base_addr) (base_addr + 0x00)

arch/arm/mach-imx/Makefile+5−5

 obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o clk-imx31.o iomux-imx31.o ehci-imx31.o pm-imx3.o
 obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o clk-imx35.o ehci-imx35.o pm-imx3.o
-obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o pm-imx5.o cpu_op-mx51.o
+imx5-pm-$(CONFIG_PM) += pm-imx5.o
+obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(imx5-pm-y) cpu_op-mx51.o
 obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
 			    clk-pfd.o clk-busy.o
 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
 obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
 obj-$(CONFIG_HAVE_IMX_SRC) += src.o
-obj-$(CONFIG_CPU_V7) += head-v7.o
+AFLAGS_headsmp.o :=-Wa,-march=armv7-a
-AFLAGS_head-v7.o :=-Wa,-march=armv7-a
+obj-$(CONFIG_SMP) += headsmp.o platsmp.o
-obj-$(CONFIG_SMP) += platsmp.o
 obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
 obj-$(CONFIG_SOC_IMX6Q) += clk-imx6q.o mach-imx6q.o
 ifeq ($(CONFIG_PM),y)
-obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o
+obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o headsmp.o
 endif
 # i.MX5 based machines

arch/arm/mach-imx/clk-imx6q.c+5−3

 	ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
 	usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
 	pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
-	ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2,
+	ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,
 	clk_max
 };
 	clk[gpu3d_shader]     = imx_clk_divider("gpu3d_shader",     "gpu3d_shader_sel",  base + 0x18, 29, 3);
 	clk[ipu1_podf]        = imx_clk_divider("ipu1_podf",        "ipu1_sel",          base + 0x3c, 11, 3);
 	clk[ipu2_podf]        = imx_clk_divider("ipu2_podf",        "ipu2_sel",          base + 0x3c, 16, 3);
-	clk[ldb_di0_podf]     = imx_clk_divider("ldb_di0_podf",     "ldb_di0_sel",       base + 0x20, 10, 1);
+	clk[ldb_di0_div_3_5]  = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);
-	clk[ldb_di1_podf]     = imx_clk_divider("ldb_di1_podf",     "ldb_di1_sel",       base + 0x20, 11, 1);
+	clk[ldb_di0_podf]     = imx_clk_divider("ldb_di0_podf",     "ldb_di0_div_3_5",       base + 0x20, 10, 1);
+	clk[ldb_di1_div_3_5]  = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1_sel", 2, 7);
+	clk[ldb_di1_podf]     = imx_clk_divider("ldb_di1_podf",     "ldb_di1_div_3_5",   base + 0x20, 11, 1);
 	clk[ipu1_di0_pre]     = imx_clk_divider("ipu1_di0_pre",     "ipu1_di0_pre_sel",  base + 0x34, 3,  3);
 	clk[ipu1_di1_pre]     = imx_clk_divider("ipu1_di1_pre",     "ipu1_di1_pre_sel",  base + 0x34, 12, 3);
 	clk[ipu2_di0_pre]     = imx_clk_divider("ipu2_di0_pre",     "ipu2_di0_pre_sel",  base + 0x38, 3,  3);

arch/arm/mach-imx/headsmp.Srenamed from arch/arm/mach-imx/head-v7.S+0−0

File renamed without changes.

arch/arm/mach-imx/hotplug.c+3−20

@@ -42,22 +42,6 @@ static inline void cpu_enter_lowpower(void) · 41 unmodified lines
42	: "cc");	42	: "cc");
43	}	43	}
44		44
45	static inline void cpu_leave_lowpower(void)
46	{
47	unsigned int v;
48
49	asm volatile(
50	"mrc p15, 0, %0, c1, c0, 0\n"
51	" orr %0, %0, %1\n"
52	" mcr p15, 0, %0, c1, c0, 0\n"
53	" mrc p15, 0, %0, c1, c0, 1\n"
54	" orr %0, %0, %2\n"
55	" mcr p15, 0, %0, c1, c0, 1\n"
56	: "=&r" (v)
57	: "Ir" (CR_C), "Ir" (0x40)
58	: "cc");
59	}
60
61	/*	45	/*
62	* platform-specific code to shutdown a CPU	46	* platform-specific code to shutdown a CPU
63	*	47	*
@@ -67,11 +51,10 @@ void platform_cpu_die(unsigned int cpu) · 3 unmodified lines
67	{	51	{
68	cpu_enter_lowpower();	52	cpu_enter_lowpower();
69	imx_enable_cpu(cpu, false);	53	imx_enable_cpu(cpu, false);
70	cpu_do_idle();
71	cpu_leave_lowpower();
72		54
73	/* We should never return from idle */	55	/* spin here until hardware takes it down */
74	panic("cpu %d unexpectedly exit from shutdown\n", cpu);	56	while (1)
		57	;
75	}	58	}
76		59
77	int platform_cpu_disable(unsigned int cpu)	60	int platform_cpu_disable(unsigned int cpu)

arch/arm/mach-imx/mach-imx6q.c+2−2

@@ -71,7 +71,7 @@ soft: · 70 unmodified lines
71	/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */	71	/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
72	static int ksz9021rn_phy_fixup(struct phy_device *phydev)	72	static int ksz9021rn_phy_fixup(struct phy_device *phydev)
73	{	73	{
74	if (IS_ENABLED(CONFIG_PHYLIB)) {	74	if (IS_BUILTIN(CONFIG_PHYLIB)) {
75	/* min rx data delay */	75	/* min rx data delay */
76	phy_write(phydev, 0x0b, 0x8105);	76	phy_write(phydev, 0x0b, 0x8105);
77	phy_write(phydev, 0x0c, 0x0000);	77	phy_write(phydev, 0x0c, 0x0000);
@@ -112,7 +112,7 @@ put_clk: · 34 unmodified lines
112		112
113	static void __init imx6q_sabrelite_init(void)	113	static void __init imx6q_sabrelite_init(void)
114	{	114	{
115	if (IS_ENABLED(CONFIG_PHYLIB))	115	if (IS_BUILTIN(CONFIG_PHYLIB))
116	phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,	116	phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
117	ksz9021rn_phy_fixup);	117	ksz9021rn_phy_fixup);
118	imx6q_sabrelite_cko1_setup();	118	imx6q_sabrelite_cko1_setup();

arch/arm/mach-kirkwood/Makefile.boot+2−1

 dtb-$(CONFIG_MACH_DLINK_KIRKWOOD_DT) += kirkwood-dns325.dtb
 dtb-$(CONFIG_MACH_ICONNECT_DT) += kirkwood-iconnect.dtb
 dtb-$(CONFIG_MACH_IB62X0_DT) += kirkwood-ib62x0.dtb
-dtb-$(CONFIG_MACH_TS219_DT)	+= kirkwood-qnap-ts219.dtb
+dtb-$(CONFIG_MACH_TS219_DT)	+= kirkwood-ts219-6281.dtb
+dtb-$(CONFIG_MACH_TS219_DT)	+= kirkwood-ts219-6282.dtb
 dtb-$(CONFIG_MACH_GOFLEXNET_DT) += kirkwood-goflexnet.dtb
 dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lschlv2.dtb
 dtb-$(CONFIG_MACH_LSXL_DT) += kirkwood-lsxhl.dtb

arch/arm/mach-kirkwood/common.c+9−2

 {
 	orion_ge00_init(eth_data,
 			GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
-			IRQ_KIRKWOOD_GE00_ERR);
+			IRQ_KIRKWOOD_GE00_ERR, 1600);
 	/* The interface forgets the MAC address assigned by u-boot if
 	the clock is turned off, so claim the clk now. */
 	clk_prepare_enable(ge0);
 {
 	orion_ge01_init(eth_data,
 			GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
-			IRQ_KIRKWOOD_GE01_ERR);
+			IRQ_KIRKWOOD_GE01_ERR, 1600);
 	clk_prepare_enable(ge1);
 }
 void __init kirkwood_init_early(void)
 {
 	orion_time_set_base(TIMER_VIRT_BASE);
+	/*
+	 * Some Kirkwood devices allocate their coherent buffers from atomic
+	 * context. Increase size of atomic coherent pool to make sure such
+	 * the allocations won't fail.
+	 */
+	init_dma_coherent_pool_size(SZ_1M);
 }
 int kirkwood_tclk;

arch/arm/mach-kirkwood/db88f6281-bp-setup.c+1−0

@@ -10,6 +10,7 @@ · 9 unmodified lines
10		10
11	#include <linux/kernel.h>	11	#include <linux/kernel.h>
12	#include <linux/init.h>	12	#include <linux/init.h>
		13	#include <linux/sizes.h>
13	#include <linux/platform_device.h>	14	#include <linux/platform_device.h>
14	#include <linux/mtd/partitions.h>	15	#include <linux/mtd/partitions.h>
15	#include <linux/ata_platform.h>	16	#include <linux/ata_platform.h>

arch/arm/mach-mmp/sram.c+1−1

@@ -68,7 +68,7 @@ static int __devinit sram_probe(struct platform_device *pdev) · 67 unmodified lines
68	struct resource *res;	68	struct resource *res;
69	int ret = 0;	69	int ret = 0;
70		70
71	if (!pdata && !pdata->pool_name)	71	if (!pdata \|\| !pdata->pool_name)
72	return -ENODEV;	72	return -ENODEV;
73		73
74	info = kzalloc(sizeof(*info), GFP_KERNEL);	74	info = kzalloc(sizeof(*info), GFP_KERNEL);

arch/arm/mach-mv78xx0/addr-map.c+1−1

@@ -37,7 +37,7 @@ · 36 unmodified lines
37	#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))	37	#define WIN0_OFF(n) (BRIDGE_VIRT_BASE + 0x0000 + ((n) << 4))
38	#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))	38	#define WIN8_OFF(n) (BRIDGE_VIRT_BASE + 0x0900 + (((n) - 8) << 4))
39		39
40	static void __init __iomem *win_cfg_base(int win)	40	static void __init __iomem win_cfg_base(const struct orion_addr_map_cfg cfg, int win)
41	{	41	{
42	/*	42	/*
43	* Find the control register base address for this window.	43	* Find the control register base address for this window.

arch/arm/mach-mv78xx0/common.c+4−2

 {
 	orion_ge00_init(eth_data,
 			GE00_PHYS_BASE, IRQ_MV78XX0_GE00_SUM,
-			IRQ_MV78XX0_GE_ERR);
+			IRQ_MV78XX0_GE_ERR,
+			MV643XX_TX_CSUM_DEFAULT_LIMIT);
 }
 {
 	orion_ge01_init(eth_data,
 			GE01_PHYS_BASE, IRQ_MV78XX0_GE01_SUM,
-			NO_IRQ);
+			NO_IRQ,
+			MV643XX_TX_CSUM_DEFAULT_LIMIT);
 }

arch/arm/mach-omap1/board-ams-delta.c+0−1

@@ -37,7 +37,6 @@ · 36 unmodified lines
37	#include <plat/board-ams-delta.h>	37	#include <plat/board-ams-delta.h>
38	#include <plat/keypad.h>	38	#include <plat/keypad.h>
39	#include <plat/mux.h>	39	#include <plat/mux.h>
40	#include <plat/board.h>
41		40
42	#include <mach/hardware.h>	41	#include <mach/hardware.h>
43	#include <mach/ams-delta-fiq.h>	42	#include <mach/ams-delta-fiq.h>

arch/arm/mach-omap1/board-fsample.c+0−1

@@ -32,7 +32,6 @@ · 31 unmodified lines
32	#include <plat/flash.h>	32	#include <plat/flash.h>
33	#include <plat/fpga.h>	33	#include <plat/fpga.h>
34	#include <plat/keypad.h>	34	#include <plat/keypad.h>
35	#include <plat/board.h>
36		35
37	#include <mach/hardware.h>	36	#include <mach/hardware.h>
38		37

arch/arm/mach-omap1/board-generic.c+0−6

 #include <asm/mach/map.h>
 #include <plat/mux.h>
-#include <plat/board.h>
 #include <mach/usb.h>
 };
 #endif
-static struct omap_board_config_kernel generic_config[] __initdata = {
-};
 static void __init omap_generic_init(void)
 {
 #ifdef CONFIG_ARCH_OMAP15XX
 	}
 #endif
-	omap_board_config = generic_config;
-	omap_board_config_size = ARRAY_SIZE(generic_config);
 	omap_serial_init();
 	omap_register_i2c_bus(1, 100, NULL, 0);
 }

arch/arm/mach-omap1/board-htcherald.c+0−1

@@ -42,7 +42,6 @@ · 41 unmodified lines
42	#include <asm/mach/arch.h>	42	#include <asm/mach/arch.h>
43		43
44	#include <plat/omap7xx.h>	44	#include <plat/omap7xx.h>
45	#include <plat/board.h>
46	#include <plat/keypad.h>	45	#include <plat/keypad.h>
47	#include <plat/mmc.h>	46	#include <plat/mmc.h>
48		47

arch/arm/mach-omap1/board-nokia770.c+0−1

@@ -26,7 +26,6 @@ · 25 unmodified lines
26	#include <asm/mach/map.h>	26	#include <asm/mach/map.h>
27		27
28	#include <plat/mux.h>	28	#include <plat/mux.h>
29	#include <plat/board.h>
30	#include <plat/keypad.h>	29	#include <plat/keypad.h>
31	#include <plat/lcd_mipid.h>	30	#include <plat/lcd_mipid.h>
32	#include <plat/mmc.h>	31	#include <plat/mmc.h>

arch/arm/mach-omap1/board-osk.c+1−0

@@ -39,6 +39,7 @@ · 38 unmodified lines
39	#include <linux/mtd/partitions.h>	39	#include <linux/mtd/partitions.h>
40	#include <linux/mtd/physmap.h>	40	#include <linux/mtd/physmap.h>
41	#include <linux/i2c/tps65010.h>	41	#include <linux/i2c/tps65010.h>
		42	#include <linux/platform_data/omap1_bl.h>
42		43
43	#include <asm/mach-types.h>	44	#include <asm/mach-types.h>
44	#include <asm/mach/arch.h>	45	#include <asm/mach/arch.h>

arch/arm/mach-omap1/board-palmte.c+1−1

 #include <linux/interrupt.h>
 #include <linux/apm-emulation.h>
 #include <linux/omapfb.h>
+#include <linux/platform_data/omap1_bl.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <plat/mux.h>
 #include <plat/tc.h>
 #include <plat/dma.h>
-#include <plat/board.h>
 #include <plat/irda.h>
 #include <plat/keypad.h>

arch/arm/mach-omap1/board-palmtt.c+1−1

 #include <linux/omapfb.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
+#include <linux/platform_data/omap1_bl.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <plat/mux.h>
 #include <plat/dma.h>
 #include <plat/tc.h>
-#include <plat/board.h>
 #include <plat/irda.h>
 #include <plat/keypad.h>

arch/arm/mach-omap1/board-palmz71.c+1−1

 #include <linux/omapfb.h>
 #include <linux/spi/spi.h>
 #include <linux/spi/ads7846.h>
+#include <linux/platform_data/omap1_bl.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <plat/mux.h>
 #include <plat/dma.h>
 #include <plat/tc.h>
-#include <plat/board.h>
 #include <plat/irda.h>
 #include <plat/keypad.h>

arch/arm/mach-omap1/board-perseus2.c+0−1

@@ -32,7 +32,6 @@ · 31 unmodified lines
32	#include <plat/fpga.h>	32	#include <plat/fpga.h>
33	#include <plat/flash.h>	33	#include <plat/flash.h>
34	#include <plat/keypad.h>	34	#include <plat/keypad.h>
35	#include <plat/board.h>
36		35
37	#include <mach/hardware.h>	36	#include <mach/hardware.h>
38		37

arch/arm/mach-omap1/board-sx1.c+0−1

@@ -38,7 +38,6 @@ · 37 unmodified lines
38	#include <plat/dma.h>	38	#include <plat/dma.h>
39	#include <plat/irda.h>	39	#include <plat/irda.h>
40	#include <plat/tc.h>	40	#include <plat/tc.h>
41	#include <plat/board.h>
42	#include <plat/keypad.h>	41	#include <plat/keypad.h>
43	#include <plat/board-sx1.h>	42	#include <plat/board-sx1.h>
44		43

arch/arm/mach-omap1/board-voiceblue.c+0−6

 #include <plat/flash.h>
 #include <plat/mux.h>
 #include <plat/tc.h>
-#include <plat/board.h>
 #include <mach/hardware.h>
 #include <mach/usb.h>
 	.pins[2]	= 6,
 };
-static struct omap_board_config_kernel voiceblue_config[] = {
-};
 #define MACHINE_PANICED		1
 #define MACHINE_REBOOTING	2
 #define MACHINE_REBOOT		4
 	voiceblue_smc91x_resources[1].start = gpio_to_irq(8);
 	voiceblue_smc91x_resources[1].end = gpio_to_irq(8);
 	platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
-	omap_board_config = voiceblue_config;
-	omap_board_config_size = ARRAY_SIZE(voiceblue_config);
 	omap_serial_init();
 	omap1_usb_init(&voiceblue_usb_config);
 	omap_register_i2c_bus(1, 100, NULL, 0);

arch/arm/mach-omap1/clock_data.c+0−8

 #include <plat/clock.h>
 #include <plat/cpu.h>
 #include <plat/clkdev_omap.h>
-#include <plat/board.h>
 #include <plat/sram.h>	/* for omap_sram_reprogram_clock() */
 #include <mach/hardware.h>
 int __init omap1_clk_init(void)
 {
 	struct omap_clk *c;
-	const struct omap_clock_config *info;
 	int crystal_type = 0; /* Default 12 MHz */
 	u32 reg;
 	ck_dpll1_p = clk_get(NULL, "ck_dpll1");
 	ck_ref_p = clk_get(NULL, "ck_ref");
-	info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config);
-	if (info != NULL) {
-		if (!cpu_is_omap15xx())
-			crystal_type = info->system_clock_type;
-	}
 	if (cpu_is_omap7xx())
 		ck_ref.rate = 13000000;
 	if (cpu_is_omap16xx() && crystal_type == 2)

arch/arm/mach-omap1/devices.c+0−1

@@ -20,7 +20,6 @@ · 19 unmodified lines
20	#include <asm/mach/map.h>	20	#include <asm/mach/map.h>
21		21
22	#include <plat/tc.h>	22	#include <plat/tc.h>
23	#include <plat/board.h>
24	#include <plat/mux.h>	23	#include <plat/mux.h>
25	#include <plat/dma.h>	24	#include <plat/dma.h>
26	#include <plat/mmc.h>	25	#include <plat/mmc.h>

arch/arm/mach-omap1/serial.c+0−1

@@ -22,7 +22,6 @@ · 21 unmodified lines
22		22
23	#include <asm/mach-types.h>	23	#include <asm/mach-types.h>
24		24
25	#include <plat/board.h>
26	#include <plat/mux.h>	25	#include <plat/mux.h>
27	#include <plat/fpga.h>	26	#include <plat/fpga.h>
28		27

arch/arm/mach-omap2/Kconfig+2−1

 	select PM_OPP if PM
 	select USB_ARCH_HAS_EHCI if USB_SUPPORT
 	select ARM_CPU_SUSPEND if PM
-	select ARCH_NEEDS_CPU_IDLE_COUPLED
+	select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
 config SOC_OMAP5
 	bool "TI OMAP5"
 	select CPU_V7
 	select ARM_GIC
 	select HAVE_SMP
+	select ARM_CPU_SUSPEND if PM
 comment "OMAP Core Type"
 	depends on ARCH_OMAP2

arch/arm/mach-omap2/board-2430sdp.c+0−1

@@ -33,7 +33,6 @@ · 32 unmodified lines
33	#include <asm/mach/arch.h>	33	#include <asm/mach/arch.h>
34	#include <asm/mach/map.h>	34	#include <asm/mach/map.h>
35		35
36	#include <plat/board.h>
37	#include "common.h"	36	#include "common.h"
38	#include <plat/gpmc.h>	37	#include <plat/gpmc.h>
39	#include <plat/usb.h>	38	#include <plat/usb.h>

arch/arm/mach-omap2/board-3430sdp.c+0−6

 #include <asm/mach/map.h>
 #include <plat/mcspi.h>
-#include <plat/board.h>
 #include <plat/usb.h>
 #include "common.h"
 #include <plat/dma.h>
 	.default_device	= &sdp3430_lcd_device,
 };
-static struct omap_board_config_kernel sdp3430_config[] __initdata = {
-};
 static struct omap2_hsmmc_info mmc[] = {
 	{
 		.mmc		= 1,
 	int gpio_pendown;
 	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
-	omap_board_config = sdp3430_config;
-	omap_board_config_size = ARRAY_SIZE(sdp3430_config);
 	omap_hsmmc_init(mmc);
 	omap3430_i2c_init();
 	omap_display_init(&sdp3430_dss_data);

arch/arm/mach-omap2/board-3630sdp.c+0−6

 #include <asm/mach/arch.h>
 #include "common.h"
-#include <plat/board.h>
 #include <plat/gpmc-smc91x.h>
 #include <plat/usb.h>
 	.reset_gpio_port[2]  = -EINVAL
 };
-static struct omap_board_config_kernel sdp_config[] __initdata = {
-};
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
 	{ .reg_offset = OMAP_MUX_TERMINATOR },
 static void __init omap_sdp_init(void)
 {
 	omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
-	omap_board_config = sdp_config;
-	omap_board_config_size = ARRAY_SIZE(sdp_config);
 	zoom_peripherals_init();
 	omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
 				  h8mbx00u0mer0em_sdrc_params);

arch/arm/mach-omap2/board-4430sdp.c+0−1

@@ -34,7 +34,6 @@ · 33 unmodified lines
34	#include <asm/mach/arch.h>	34	#include <asm/mach/arch.h>
35	#include <asm/mach/map.h>	35	#include <asm/mach/map.h>
36		36
37	#include <plat/board.h>
38	#include "common.h"	37	#include "common.h"
39	#include <plat/usb.h>	38	#include <plat/usb.h>
40	#include <plat/mmc.h>	39	#include <plat/mmc.h>

arch/arm/mach-omap2/board-am3517crane.c+0−9

 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <plat/board.h>
 #include "common.h"
 #include <plat/usb.h>
 #define GPIO_USB_POWER		35
 #define GPIO_USB_NRESET		38
-/* Board initialization */
-static struct omap_board_config_kernel am3517_crane_config[] __initdata = {
-};
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
 	{ .reg_offset = OMAP_MUX_TERMINATOR },
 	omap_serial_init();
 	omap_sdrc_init(NULL, NULL);
-	omap_board_config = am3517_crane_config;
-	omap_board_config_size = ARRAY_SIZE(am3517_crane_config);
 	/* Configure GPIO for EHCI port */
 	if (omap_mux_init_gpio(GPIO_USB_NRESET, OMAP_PIN_OUTPUT)) {
 		pr_err("Can not configure mux for GPIO_USB_NRESET %d\n",

arch/arm/mach-omap2/board-am3517evm.c+0−6

 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <plat/board.h>
 #include "common.h"
 #include <plat/usb.h>
 #include <video/omapdss.h>
 	platform_device_register(&am3517_hecc_device);
 }
-static struct omap_board_config_kernel am3517_evm_config[] __initdata = {
-};
 static struct omap2_hsmmc_info mmc[] = {
 	{
 		.mmc		= 1,
 static void __init am3517_evm_init(void)
 {
-	omap_board_config = am3517_evm_config;
-	omap_board_config_size = ARRAY_SIZE(am3517_evm_config);
 	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
 	am3517_evm_i2c_init();

arch/arm/mach-omap2/board-apollon.c+0−1

@@ -35,7 +35,6 @@ · 34 unmodified lines
35	#include <asm/mach/flash.h>	35	#include <asm/mach/flash.h>
36		36
37	#include <plat/led.h>	37	#include <plat/led.h>
38	#include <plat/board.h>
39	#include "common.h"	38	#include "common.h"
40	#include <plat/gpmc.h>	39	#include <plat/gpmc.h>
41		40

arch/arm/mach-omap2/board-cm-t35.c+0−6

 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <plat/board.h>
 #include "common.h"
 #include <plat/nand.h>
 #include <plat/gpmc.h>
 static inline void cm_t3730_init_mux(void) {}
 #endif
-static struct omap_board_config_kernel cm_t35_config[] __initdata = {
-};
 static void __init cm_t3x_common_init(void)
 {
-	omap_board_config = cm_t35_config;
-	omap_board_config_size = ARRAY_SIZE(cm_t35_config);
 	omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
 	omap_serial_init();
 	omap_sdrc_init(mt46h32m32lf6_sdrc_params,

arch/arm/mach-omap2/board-cm-t3517.c+0−6

 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <plat/board.h>
 #include "common.h"
 #include <plat/usb.h>
 #include <plat/nand.h>
 static inline void cm_t3517_init_nand(void) {}
 #endif
-static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
-};
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
 	/* GPIO186 - Green LED */
 	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
 	omap_serial_init();
 	omap_sdrc_init(NULL, NULL);
-	omap_board_config = cm_t3517_config;
-	omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
 	cm_t3517_init_leds();
 	cm_t3517_init_nand();
 	cm_t3517_init_rtc();

arch/arm/mach-omap2/board-devkit8000.c+0−1

@@ -40,7 +40,6 @@ · 39 unmodified lines
40	#include <asm/mach/map.h>	40	#include <asm/mach/map.h>
41	#include <asm/mach/flash.h>	41	#include <asm/mach/flash.h>
42		42
43	#include <plat/board.h>
44	#include "common.h"	43	#include "common.h"
45	#include <plat/gpmc.h>	44	#include <plat/gpmc.h>
46	#include <plat/nand.h>	45	#include <plat/nand.h>

arch/arm/mach-omap2/board-generic.c+0−1

@@ -20,7 +20,6 @@ · 19 unmodified lines
20	#include <asm/hardware/gic.h>	20	#include <asm/hardware/gic.h>
21	#include <asm/mach/arch.h>	21	#include <asm/mach/arch.h>
22		22
23	#include <plat/board.h>
24	#include "common.h"	23	#include "common.h"
25	#include "common-board-devices.h"	24	#include "common-board-devices.h"
26		25

arch/arm/mach-omap2/board-h4.c+1−1

 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <plat/board.h>
 #include "common.h"
 #include <plat/menelaus.h>
 #include <plat/dma.h>
 #include <plat/gpmc.h>
+#include <plat/debug-devices.h>
 #include <video/omapdss.h>
 #include <video/omap-panel-generic-dpi.h>

arch/arm/mach-omap2/board-igep0020.c+2−1

 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
-#include <plat/board.h>
 #include "common.h"
 #include <plat/gpmc.h>
 #include <plat/usb.h>
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
+	/* SMSC9221 LAN Controller ETH IRQ (GPIO_176) */
+	OMAP3_MUX(MCSPI1_CS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
 	{ .reg_offset = OMAP_MUX_TERMINATOR },
 };
 #endif

arch/arm/mach-omap2/board-ldp.c+0−1

@@ -35,7 +35,6 @@ · 34 unmodified lines
35	#include <asm/mach/map.h>	35	#include <asm/mach/map.h>
36		36
37	#include <plat/mcspi.h>	37	#include <plat/mcspi.h>
38	#include <plat/board.h>
39	#include "common.h"	38	#include "common.h"
40	#include <plat/gpmc.h>	39	#include <plat/gpmc.h>
41	#include <mach/board-zoom.h>	40	#include <mach/board-zoom.h>

arch/arm/mach-omap2/board-n8x0.c+0−1

@@ -25,7 +25,6 @@ · 24 unmodified lines
25	#include <asm/mach/arch.h>	25	#include <asm/mach/arch.h>
26	#include <asm/mach-types.h>	26	#include <asm/mach-types.h>
27		27
28	#include <plat/board.h>
29	#include "common.h"	28	#include "common.h"
30	#include <plat/menelaus.h>	29	#include <plat/menelaus.h>
31	#include <mach/irqs.h>	30	#include <mach/irqs.h>

arch/arm/mach-omap2/board-omap3beagle.c+0−1

@@ -39,7 +39,6 @@ · 38 unmodified lines
39	#include <asm/mach/map.h>	39	#include <asm/mach/map.h>
40	#include <asm/mach/flash.h>	40	#include <asm/mach/flash.h>
41		41
42	#include <plat/board.h>
43	#include "common.h"	42	#include "common.h"
44	#include <video/omapdss.h>	43	#include <video/omapdss.h>
45	#include <video/omap-panel-tfp410.h>	44	#include <video/omap-panel-tfp410.h>

arch/arm/mach-omap2/board-omap3evm.c+13−7

 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
-#include <plat/board.h>
 #include <plat/usb.h>
 #include <plat/nand.h>
 #include "common.h"
 #include "hsmmc.h"
 #include "common-board-devices.h"
+#define OMAP3_EVM_TS_GPIO	175
 #define OMAP3_EVM_EHCI_VBUS	22
 #define OMAP3_EVM_EHCI_SELECT	61
 #define OMAP3EVM_GEN1_ETHR_GPIO_RST	64
 #define OMAP3EVM_GEN2_ETHR_GPIO_RST	7
+/*
+ * OMAP35x EVM revision
+ * Run time detection of EVM revision is done by reading Ethernet
+ * PHY ID -
+ *	GEN_1	= 0x01150000
+ *	GEN_2	= 0x92200000
+ */
+enum {
+	OMAP3EVM_BOARD_GEN_1 = 0,	/* EVM Rev between  A - D */
+	OMAP3EVM_BOARD_GEN_2,		/* EVM Rev >= Rev E */
+};
 static u8 omap3_evm_version;
 u8 get_omap3_evm_rev(void)
 	return 0;
 }
-static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
-};
 static struct usbhs_omap_board_data usbhs_bdata __initdata = {
 	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
 	obm = (cpu_is_omap3630()) ? omap36x_board_mux : omap35x_board_mux;
 	omap3_mux_init(obm, OMAP_PACKAGE_CBB);
-	omap_board_config = omap3_evm_config;
-	omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
 	omap_mux_init_gpio(63, OMAP_PIN_INPUT);
 	omap_hsmmc_init(mmc);

arch/arm/mach-omap2/board-omap3logic.c+0−1

@@ -41,7 +41,6 @@ · 40 unmodified lines
41	#include "common-board-devices.h"	41	#include "common-board-devices.h"
42		42
43	#include <plat/mux.h>	43	#include <plat/mux.h>
44	#include <plat/board.h>
45	#include "common.h"	44	#include "common.h"
46	#include <plat/gpmc-smsc911x.h>	45	#include <plat/gpmc-smsc911x.h>
47	#include <plat/gpmc.h>	46	#include <plat/gpmc.h>

arch/arm/mach-omap2/board-omap3pandora.c+0−1

@@ -40,7 +40,6 @@ · 39 unmodified lines
40	#include <asm/mach/arch.h>	40	#include <asm/mach/arch.h>
41	#include <asm/mach/map.h>	41	#include <asm/mach/map.h>
42		42
43	#include <plat/board.h>
44	#include "common.h"	43	#include "common.h"
45	#include <mach/hardware.h>	44	#include <mach/hardware.h>
46	#include <plat/mcspi.h>	45	#include <plat/mcspi.h>

arch/arm/mach-omap2/board-omap3stalker.c+0−6

 #include <asm/mach/map.h>
 #include <asm/mach/flash.h>
-#include <plat/board.h>
 #include "common.h"
 #include <plat/gpmc.h>
 #include <plat/nand.h>
 #define OMAP3_STALKER_TS_GPIO	175
-static struct omap_board_config_kernel omap3_stalker_config[] __initdata = {
-};
 static struct platform_device *omap3_stalker_devices[] __initdata = {
 	&keys_gpio,
 };
 {
 	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
 	omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
-	omap_board_config = omap3_stalker_config;
-	omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
 	omap_mux_init_gpio(23, OMAP_PIN_INPUT);
 	omap_hsmmc_init(mmc);

arch/arm/mach-omap2/board-omap3touchbook.c+0−1

@@ -44,7 +44,6 @@ · 43 unmodified lines
44	#include <asm/mach/flash.h>	44	#include <asm/mach/flash.h>
45	#include <asm/system_info.h>	45	#include <asm/system_info.h>
46		46
47	#include <plat/board.h>
48	#include "common.h"	47	#include "common.h"
49	#include <plat/gpmc.h>	48	#include <plat/gpmc.h>
50	#include <plat/nand.h>	49	#include <plat/nand.h>

arch/arm/mach-omap2/board-omap4panda.c+0−1

@@ -39,7 +39,6 @@ · 38 unmodified lines
39	#include <asm/mach/map.h>	39	#include <asm/mach/map.h>
40	#include <video/omapdss.h>	40	#include <video/omapdss.h>
41		41
42	#include <plat/board.h>
43	#include "common.h"	42	#include "common.h"
44	#include <plat/usb.h>	43	#include <plat/usb.h>
45	#include <plat/mmc.h>	44	#include <plat/mmc.h>

arch/arm/mach-omap2/board-overo.c+0−1

@@ -42,7 +42,6 @@ · 41 unmodified lines
42	#include <asm/mach/flash.h>	42	#include <asm/mach/flash.h>
43	#include <asm/mach/map.h>	43	#include <asm/mach/map.h>
44		44
45	#include <plat/board.h>
46	#include "common.h"	45	#include "common.h"
47	#include <video/omapdss.h>	46	#include <video/omapdss.h>
48	#include <video/omap-panel-generic-dpi.h>	47	#include <video/omap-panel-generic-dpi.h>

arch/arm/mach-omap2/board-rx51-peripherals.c+0−1

@@ -28,7 +28,6 @@ · 27 unmodified lines
28	#include <asm/system_info.h>	28	#include <asm/system_info.h>
29		29
30	#include <plat/mcspi.h>	30	#include <plat/mcspi.h>
31	#include <plat/board.h>
32	#include "common.h"	31	#include "common.h"
33	#include <plat/dma.h>	32	#include <plat/dma.h>
34	#include <plat/gpmc.h>	33	#include <plat/gpmc.h>

arch/arm/mach-omap2/board-rx51.c+0−1

@@ -24,7 +24,6 @@ · 23 unmodified lines
24	#include <asm/mach/map.h>	24	#include <asm/mach/map.h>
25		25
26	#include <plat/mcspi.h>	26	#include <plat/mcspi.h>
27	#include <plat/board.h>
28	#include "common.h"	27	#include "common.h"
29	#include <plat/dma.h>	28	#include <plat/dma.h>
30	#include <plat/gpmc.h>	29	#include <plat/gpmc.h>

arch/arm/mach-omap2/board-ti8168evm.c+0−6

 #include <asm/mach/map.h>
 #include <plat/irqs.h>
-#include <plat/board.h>
 #include "common.h"
 #include <plat/usb.h>
 	.power		= 500,
 };
-static struct omap_board_config_kernel ti81xx_evm_config[] __initdata = {
-};
 static void __init ti81xx_evm_init(void)
 {
 	omap_serial_init();
 	omap_sdrc_init(NULL, NULL);
-	omap_board_config = ti81xx_evm_config;
-	omap_board_config_size = ARRAY_SIZE(ti81xx_evm_config);
 	usb_musb_init(&musb_board_data);
 }

arch/arm/mach-omap2/board-zoom.c+0−1

@@ -22,7 +22,6 @@ · 21 unmodified lines
22	#include <asm/mach/arch.h>	22	#include <asm/mach/arch.h>
23		23
24	#include "common.h"	24	#include "common.h"
25	#include <plat/board.h>
26	#include <plat/usb.h>	25	#include <plat/usb.h>
27		26
28	#include <mach/board-zoom.h>	27	#include <mach/board-zoom.h>

arch/arm/mach-omap2/common-board-devices.c+0−11

 	.turbo_mode	= 0,
 };
-/*
- * ADS7846 driver maybe request a gpio according to the value
- * of pdata->get_pendown_state, but we have done this. So set
- * get_pendown_state to avoid twice gpio requesting.
- */
-static int omap3_get_pendown_state(void)
-{
-	return !gpio_get_value(OMAP3_EVM_TS_GPIO);
-}
 static struct ads7846_platform_data ads7846_config = {
 	.x_max			= 0x0fff,
 	.y_max			= 0x0fff,
 	.debounce_rep		= 1,
 	.gpio_pendown		= -EINVAL,
 	.keep_vref_on		= 1,
-	.get_pendown_state	= &omap3_get_pendown_state,
 };
 static struct spi_board_info ads7846_spi_board_info __initdata = {

arch/arm/mach-omap2/common-board-devices.h+0−1

@@ -4,7 +4,6 @@ · 3 unmodified lines
4	#include "twl-common.h"	4	#include "twl-common.h"
5		5
6	#define NAND_BLOCK_SIZE SZ_128K	6	#define NAND_BLOCK_SIZE SZ_128K
7	#define OMAP3_EVM_TS_GPIO 175
8		7
9	struct mtd_partition;	8	struct mtd_partition;
10	struct ads7846_platform_data;	9	struct ads7846_platform_data;

arch/arm/mach-omap2/common.c+0−1

@@ -18,7 +18,6 @@ · 17 unmodified lines
18	#include <linux/io.h>	18	#include <linux/io.h>
19		19
20	#include <plat/hardware.h>	20	#include <plat/hardware.h>
21	#include <plat/board.h>
22	#include <plat/mux.h>	21	#include <plat/mux.h>
23	#include <plat/clock.h>	22	#include <plat/clock.h>
24		23

arch/arm/mach-omap2/cpuidle44xx.c+2−1

@@ -238,8 +238,9 @@ int __init omap4_idle_init(void) · 237 unmodified lines
238	for_each_cpu(cpu_id, cpu_online_mask) {	238	for_each_cpu(cpu_id, cpu_online_mask) {
239	dev = &per_cpu(omap4_idle_dev, cpu_id);	239	dev = &per_cpu(omap4_idle_dev, cpu_id);
240	dev->cpu = cpu_id;	240	dev->cpu = cpu_id;
		241	#ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
241	dev->coupled_cpus = *cpu_online_mask;	242	dev->coupled_cpus = *cpu_online_mask;
242		243	#endif
243	cpuidle_register_driver(&omap4_idle_driver);	244	cpuidle_register_driver(&omap4_idle_driver);
244		245
245	if (cpuidle_register_device(dev)) {	246	if (cpuidle_register_device(dev)) {

arch/arm/mach-omap2/devices.c+0−1

@@ -26,7 +26,6 @@ · 25 unmodified lines
26	#include <asm/pmu.h>	26	#include <asm/pmu.h>
27		27
28	#include "iomap.h"	28	#include "iomap.h"
29	#include <plat/board.h>
30	#include <plat/dma.h>	29	#include <plat/dma.h>
31	#include <plat/omap_hwmod.h>	30	#include <plat/omap_hwmod.h>
32	#include <plat/omap_device.h>	31	#include <plat/omap_device.h>

arch/arm/mach-omap2/gpmc-nand.c+23−6

 #include <plat/cpu.h>
 #include <plat/nand.h>
-#include <plat/board.h>
 #include <plat/gpmc.h>
-static struct resource gpmc_nand_resource = {
+static struct resource gpmc_nand_resource[] = {
-	.flags		= IORESOURCE_MEM,
+	{
+		.flags		= IORESOURCE_MEM,
+	},
+	{
+		.flags		= IORESOURCE_IRQ,
+	},
+	{
+		.flags		= IORESOURCE_IRQ,
+	},
 };
 static struct platform_device gpmc_nand_device = {
 	.name		= "omap2-nand",
 	.id		= 0,
-	.num_resources	= 1,
+	.num_resources	= ARRAY_SIZE(gpmc_nand_resource),
-	.resource	= &gpmc_nand_resource,
+	.resource	= gpmc_nand_resource,
 };
 static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
 		gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_DEV_SIZE, 0);
 	gpmc_cs_configure(gpmc_nand_data->cs,
 			GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NAND);
+	gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_WP, 0);
 	err = gpmc_cs_set_timings(gpmc_nand_data->cs, &t);
 	if (err)
 		return err;
 	gpmc_nand_device.dev.platform_data = gpmc_nand_data;
 	err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
-				&gpmc_nand_data->phys_base);
+				(unsigned long *)&gpmc_nand_resource[0].start);
 	if (err < 0) {
 		dev_err(dev, "Cannot request GPMC CS\n");
 		return err;
 	}
+	gpmc_nand_resource[0].end = gpmc_nand_resource[0].start +
+							NAND_IO_SIZE - 1;
+	gpmc_nand_resource[1].start =
+				gpmc_get_client_irq(GPMC_IRQ_FIFOEVENTENABLE);
+	gpmc_nand_resource[2].start =
+				gpmc_get_client_irq(GPMC_IRQ_COUNT_EVENT);
 	 /* Set timings in GPMC */
 	err = omap2_nand_gpmc_retime(gpmc_nand_data);
 	if (err < 0) {
 		gpmc_cs_configure(gpmc_nand_data->cs, GPMC_CONFIG_RDY_BSY, 1);
 	}
+	gpmc_update_nand_reg(&gpmc_nand_data->reg, gpmc_nand_data->cs);
 	err = platform_device_register(&gpmc_nand_device);
 	if (err < 0) {
 		dev_err(dev, "Unable to register NAND device\n");

arch/arm/mach-omap2/gpmc-onenand.c+22−2

 #include <plat/cpu.h>
 #include <plat/onenand.h>
-#include <plat/board.h>
 #include <plat/gpmc.h>
+#define	ONENAND_IO_SIZE	SZ_128K
 static struct omap_onenand_platform_data *gpmc_onenand_data;
+static struct resource gpmc_onenand_resource = {
+	.flags		= IORESOURCE_MEM,
+};
 static struct platform_device gpmc_onenand_device = {
 	.name		= "omap2-onenand",
 	.id		= -1,
+	.num_resources	= 1,
+	.resource	= &gpmc_onenand_resource,
 };
 static int omap2_onenand_set_async_mode(int cs, void __iomem *onenand_base)
 void __init gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
 {
+	int err;
 	gpmc_onenand_data = _onenand_data;
 	gpmc_onenand_data->onenand_setup = gpmc_onenand_setup;
 	gpmc_onenand_device.dev.platform_data = gpmc_onenand_data;
 		gpmc_onenand_data->flags |= ONENAND_SYNC_READ;
 	}
+	err = gpmc_cs_request(gpmc_onenand_data->cs, ONENAND_IO_SIZE,
+				(unsigned long *)&gpmc_onenand_resource.start);
+	if (err < 0) {
+		pr_err("%s: Cannot request GPMC CS\n", __func__);
+		return;
+	}
+	gpmc_onenand_resource.end = gpmc_onenand_resource.start +
+							ONENAND_IO_SIZE - 1;
 	if (platform_device_register(&gpmc_onenand_device) < 0) {
-		printk(KERN_ERR "Unable to register OneNAND device\n");
+		pr_err("%s: Unable to register OneNAND device\n", __func__);
+		gpmc_cs_free(gpmc_onenand_data->cs);
 		return;
 	}
 }

arch/arm/mach-omap2/gpmc-smc91x.c+0−1

@@ -17,7 +17,6 @@ · 16 unmodified lines
17	#include <linux/io.h>	17	#include <linux/io.h>
18	#include <linux/smc91x.h>	18	#include <linux/smc91x.h>
19		19
20	#include <plat/board.h>
21	#include <plat/gpmc.h>	20	#include <plat/gpmc.h>
22	#include <plat/gpmc-smc91x.h>	21	#include <plat/gpmc-smc91x.h>
23		22

arch/arm/mach-omap2/gpmc-smsc911x.c+0−1

@@ -20,7 +20,6 @@ · 19 unmodified lines
20	#include <linux/io.h>	20	#include <linux/io.h>
21	#include <linux/smsc911x.h>	21	#include <linux/smsc911x.h>
22		22
23	#include <plat/board.h>
24	#include <plat/gpmc.h>	23	#include <plat/gpmc.h>
25	#include <plat/gpmc-smsc911x.h>	24	#include <plat/gpmc-smsc911x.h>
26		25

arch/arm/mach-omap2/gpmc.c+139−17

@@ -78,6 +78,15 @@ · 77 unmodified lines
78	#define ENABLE_PREFETCH (0x1 << 7)	78	#define ENABLE_PREFETCH (0x1 << 7)
79	#define DMA_MPU_MODE 2	79	#define DMA_MPU_MODE 2
80		80
		81	/* XXX: Only NAND irq has been considered,currently these are the only ones used
		82	*/
		83	#define GPMC_NR_IRQ 2
		84
		85	struct gpmc_client_irq {
		86	unsigned irq;
		87	u32 bitmask;
		88	};
		89
81	/* Structure to save gpmc cs context */	90	/* Structure to save gpmc cs context */
82	struct gpmc_cs_config {	91	struct gpmc_cs_config {
83	u32 config1;	92	u32 config1;
@@ -105,6 +114,10 @@ struct omap3_gpmc_regs { · 21 unmodified lines
105	struct gpmc_cs_config cs_context[GPMC_CS_NUM];	114	struct gpmc_cs_config cs_context[GPMC_CS_NUM];
106	};	115	};
107		116
		117	static struct gpmc_client_irq gpmc_client_irq[GPMC_NR_IRQ];
		118	static struct irq_chip gpmc_irq_chip;
		119	static unsigned gpmc_irq_start;
		120
108	static struct resource gpmc_mem_root;	121	static struct resource gpmc_mem_root;
109	static struct resource gpmc_cs_mem[GPMC_CS_NUM];	122	static struct resource gpmc_cs_mem[GPMC_CS_NUM];
110	static DEFINE_SPINLOCK(gpmc_mem_lock);	123	static DEFINE_SPINLOCK(gpmc_mem_lock);
@@ -682,6 +695,117 @@ int gpmc_prefetch_reset(int cs) · 571 unmodified lines
682	}	695	}
683	EXPORT_SYMBOL(gpmc_prefetch_reset);	696	EXPORT_SYMBOL(gpmc_prefetch_reset);
684		697
		698	void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs)
		699	{
		700	reg->gpmc_status = gpmc_base + GPMC_STATUS;
		701	reg->gpmc_nand_command = gpmc_base + GPMC_CS0_OFFSET +
		702	GPMC_CS_NAND_COMMAND + GPMC_CS_SIZE * cs;
		703	reg->gpmc_nand_address = gpmc_base + GPMC_CS0_OFFSET +
		704	GPMC_CS_NAND_ADDRESS + GPMC_CS_SIZE * cs;
		705	reg->gpmc_nand_data = gpmc_base + GPMC_CS0_OFFSET +
		706	GPMC_CS_NAND_DATA + GPMC_CS_SIZE * cs;
		707	reg->gpmc_prefetch_config1 = gpmc_base + GPMC_PREFETCH_CONFIG1;
		708	reg->gpmc_prefetch_config2 = gpmc_base + GPMC_PREFETCH_CONFIG2;
		709	reg->gpmc_prefetch_control = gpmc_base + GPMC_PREFETCH_CONTROL;
		710	reg->gpmc_prefetch_status = gpmc_base + GPMC_PREFETCH_STATUS;
		711	reg->gpmc_ecc_config = gpmc_base + GPMC_ECC_CONFIG;
		712	reg->gpmc_ecc_control = gpmc_base + GPMC_ECC_CONTROL;
		713	reg->gpmc_ecc_size_config = gpmc_base + GPMC_ECC_SIZE_CONFIG;
		714	reg->gpmc_ecc1_result = gpmc_base + GPMC_ECC1_RESULT;
		715	reg->gpmc_bch_result0 = gpmc_base + GPMC_ECC_BCH_RESULT_0;
		716	}
		717
		718	int gpmc_get_client_irq(unsigned irq_config)
		719	{
		720	int i;
		721
		722	if (hweight32(irq_config) > 1)
		723	return 0;
		724
		725	for (i = 0; i < GPMC_NR_IRQ; i++)
		726	if (gpmc_client_irq[i].bitmask & irq_config)
		727	return gpmc_client_irq[i].irq;
		728
		729	return 0;
		730	}
		731
		732	static int gpmc_irq_endis(unsigned irq, bool endis)
		733	{
		734	int i;
		735	u32 regval;
		736
		737	for (i = 0; i < GPMC_NR_IRQ; i++)
		738	if (irq == gpmc_client_irq[i].irq) {
		739	regval = gpmc_read_reg(GPMC_IRQENABLE);
		740	if (endis)
		741	regval \|= gpmc_client_irq[i].bitmask;
		742	else
		743	regval &= ~gpmc_client_irq[i].bitmask;
		744	gpmc_write_reg(GPMC_IRQENABLE, regval);
		745	break;
		746	}
		747
		748	return 0;
		749	}
		750
		751	static void gpmc_irq_disable(struct irq_data *p)
		752	{
		753	gpmc_irq_endis(p->irq, false);
		754	}
		755
		756	static void gpmc_irq_enable(struct irq_data *p)
		757	{
		758	gpmc_irq_endis(p->irq, true);
		759	}
		760
		761	static void gpmc_irq_noop(struct irq_data *data) { }
		762
		763	static unsigned int gpmc_irq_noop_ret(struct irq_data *data) { return 0; }
		764
		765	static int gpmc_setup_irq(int gpmc_irq)
		766	{
		767	int i;
		768	u32 regval;
		769
		770	if (!gpmc_irq)
		771	return -EINVAL;
		772
		773	gpmc_irq_start = irq_alloc_descs(-1, 0, GPMC_NR_IRQ, 0);
		774	if (IS_ERR_VALUE(gpmc_irq_start)) {
		775	pr_err("irq_alloc_descs failed\n");
		776	return gpmc_irq_start;
		777	}
		778
		779	gpmc_irq_chip.name = "gpmc";
		780	gpmc_irq_chip.irq_startup = gpmc_irq_noop_ret;
		781	gpmc_irq_chip.irq_enable = gpmc_irq_enable;
		782	gpmc_irq_chip.irq_disable = gpmc_irq_disable;
		783	gpmc_irq_chip.irq_shutdown = gpmc_irq_noop;
		784	gpmc_irq_chip.irq_ack = gpmc_irq_noop;
		785	gpmc_irq_chip.irq_mask = gpmc_irq_noop;
		786	gpmc_irq_chip.irq_unmask = gpmc_irq_noop;
		787
		788	gpmc_client_irq[0].bitmask = GPMC_IRQ_FIFOEVENTENABLE;
		789	gpmc_client_irq[1].bitmask = GPMC_IRQ_COUNT_EVENT;
		790
		791	for (i = 0; i < GPMC_NR_IRQ; i++) {
		792	gpmc_client_irq[i].irq = gpmc_irq_start + i;
		793	irq_set_chip_and_handler(gpmc_client_irq[i].irq,
		794	&gpmc_irq_chip, handle_simple_irq);
		795	set_irq_flags(gpmc_client_irq[i].irq,
		796	IRQF_VALID \| IRQF_NOAUTOEN);
		797	}
		798
		799	/* Disable interrupts */
		800	gpmc_write_reg(GPMC_IRQENABLE, 0);
		801
		802	/* clear interrupts */
		803	regval = gpmc_read_reg(GPMC_IRQSTATUS);
		804	gpmc_write_reg(GPMC_IRQSTATUS, regval);
		805
		806	return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
		807	}
		808
685	static void __init gpmc_mem_init(void)	809	static void __init gpmc_mem_init(void)
686	{	810	{
687	int cs;	811	int cs;
@@ -711,8 +835,8 @@ static void __init gpmc_mem_init(void) · 23 unmodified lines
711		835
712	static int __init gpmc_init(void)	836	static int __init gpmc_init(void)
713	{	837	{
714	u32 l, irq;	838	u32 l;
715	int cs, ret = -EINVAL;	839	int ret = -EINVAL;
716	int gpmc_irq;	840	int gpmc_irq;
717	char *ck = NULL;	841	char *ck = NULL;
718		842
@@ -761,16 +885,7 @@ static int __init gpmc_init(void) · 42 unmodified lines
761	gpmc_write_reg(GPMC_SYSCONFIG, l);	885	gpmc_write_reg(GPMC_SYSCONFIG, l);
762	gpmc_mem_init();	886	gpmc_mem_init();
763		887
764	/* initalize the irq_chained */	888	ret = gpmc_setup_irq(gpmc_irq);
765	irq = OMAP_GPMC_IRQ_BASE;
766	for (cs = 0; cs < GPMC_CS_NUM; cs++) {
767	irq_set_chip_and_handler(irq, &dummy_irq_chip,
768	handle_simple_irq);
769	set_irq_flags(irq, IRQF_VALID);
770	irq++;
771	}
772
773	ret = request_irq(gpmc_irq, gpmc_handle_irq, IRQF_SHARED, "gpmc", NULL);
774	if (ret)	889	if (ret)
775	pr_err("gpmc: irq-%d could not claim: err %d\n",	890	pr_err("gpmc: irq-%d could not claim: err %d\n",
776	gpmc_irq, ret);	891	gpmc_irq, ret);
@@ -780,12 +895,19 @@ postcore_initcall(gpmc_init); · 3 unmodified lines
780		895
781	static irqreturn_t gpmc_handle_irq(int irq, void *dev)	896	static irqreturn_t gpmc_handle_irq(int irq, void *dev)
782	{	897	{
783	u8 cs;	898	int i;
		899	u32 regval;
		900
		901	regval = gpmc_read_reg(GPMC_IRQSTATUS);
		902
		903	if (!regval)
		904	return IRQ_NONE;
		905
		906	for (i = 0; i < GPMC_NR_IRQ; i++)
		907	if (regval & gpmc_client_irq[i].bitmask)
		908	generic_handle_irq(gpmc_client_irq[i].irq);
784		909
785	/* check cs to invoke the irq */	910	gpmc_write_reg(GPMC_IRQSTATUS, regval);
786	cs = ((gpmc_read_reg(GPMC_PREFETCH_CONFIG1)) >> CS_NUM_SHIFT) & 0x7;
787	if (OMAP_GPMC_IRQ_BASE+cs <= OMAP_GPMC_IRQ_END)
788	generic_handle_irq(OMAP_GPMC_IRQ_BASE+cs);
789		911
790	return IRQ_HANDLED;	912	return IRQ_HANDLED;
791	}	913	}

arch/arm/mach-omap2/mux.h+0−1

@@ -127,7 +127,6 @@ struct omap_mux_partition { · 126 unmodified lines
127	* @gpio: GPIO number	127	* @gpio: GPIO number
128	* @muxnames: available signal modes for a ball	128	* @muxnames: available signal modes for a ball
129	* @balls: available balls on the package	129	* @balls: available balls on the package
130	* @partition: mux partition
131	*/	130	*/
132	struct omap_mux {	131	struct omap_mux {
133	u16 reg_offset;	132	u16 reg_offset;

arch/arm/mach-omap2/opp4xxx_data.c+1−1

@@ -94,7 +94,7 @@ int __init omap4_opp_init(void) · 93 unmodified lines
94	{	94	{
95	int r = -ENODEV;	95	int r = -ENODEV;
96		96
97	if (!cpu_is_omap44xx())	97	if (!cpu_is_omap443x())
98	return r;	98	return r;
99		99
100	r = omap_init_opp_table(omap44xx_opp_def_list,	100	r = omap_init_opp_table(omap44xx_opp_def_list,

arch/arm/mach-omap2/pm-debug.c+0−1

@@ -28,7 +28,6 @@ · 27 unmodified lines
28	#include <linux/slab.h>	28	#include <linux/slab.h>
29		29
30	#include <plat/clock.h>	30	#include <plat/clock.h>
31	#include <plat/board.h>
32	#include "powerdomain.h"	31	#include "powerdomain.h"
33	#include "clockdomain.h"	32	#include "clockdomain.h"
34	#include <plat/dmtimer.h>	33	#include <plat/dmtimer.h>

arch/arm/mach-omap2/pm24xx.c+0−11

 #include <plat/clock.h>
 #include <plat/sram.h>
 #include <plat/dma.h>
-#include <plat/board.h>
 #include <mach/irqs.h>
 	prcm_setup_regs();
-	/* Hack to prevent MPU retention when STI console is enabled. */
-	{
-		const struct omap_sti_console_config *sti;
-		sti = omap_get_config(OMAP_TAG_STI_CONSOLE,
-				      struct omap_sti_console_config);
-		if (sti != NULL && sti->enable)
-			sti_console_enabled = 1;
-	}
 	/*
 	 * We copy the assembler sleep/wakeup routines to SRAM.
 	 * These routines need to be in SRAM as that's the only

arch/arm/mach-omap2/pm34xx.c+4−15

 	per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
 	core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
-	if (mpu_next_state < PWRDM_POWER_ON) {
+	pwrdm_pre_transition(NULL);
-		pwrdm_pre_transition(mpu_pwrdm);
-		pwrdm_pre_transition(neon_pwrdm);
-	}
 	/* PER */
 	if (per_next_state < PWRDM_POWER_ON) {
-		pwrdm_pre_transition(per_pwrdm);
 		per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0;
 		omap2_gpio_prepare_for_idle(per_going_off);
 	}
 	/* CORE */
 	if (core_next_state < PWRDM_POWER_ON) {
-		pwrdm_pre_transition(core_pwrdm);
 		if (core_next_state == PWRDM_POWER_OFF) {
 			omap3_core_save_context();
 			omap3_cm_save_context();
 			omap2_prm_clear_mod_reg_bits(OMAP3430_AUTO_OFF_MASK,
 					       OMAP3430_GR_MOD,
 					       OMAP3_PRM_VOLTCTRL_OFFSET);
-		pwrdm_post_transition(core_pwrdm);
 	}
 	omap3_intc_resume_idle();
+	pwrdm_post_transition(NULL);
 	/* PER */
-	if (per_next_state < PWRDM_POWER_ON) {
+	if (per_next_state < PWRDM_POWER_ON)
 		omap2_gpio_resume_after_idle();
-		pwrdm_post_transition(per_pwrdm);
-	}
-	if (mpu_next_state < PWRDM_POWER_ON) {
-		pwrdm_post_transition(mpu_pwrdm);
-		pwrdm_post_transition(neon_pwrdm);
-	}
 }
 static void omap3_pm_idle(void)

arch/arm/mach-omap2/serial.c+0−1

@@ -29,7 +29,6 @@ · 28 unmodified lines
29		29
30	#include <plat/omap-serial.h>	30	#include <plat/omap-serial.h>
31	#include "common.h"	31	#include "common.h"
32	#include <plat/board.h>
33	#include <plat/dma.h>	32	#include <plat/dma.h>
34	#include <plat/omap_hwmod.h>	33	#include <plat/omap_hwmod.h>
35	#include <plat/omap_device.h>	34	#include <plat/omap_device.h>

arch/arm/mach-omap2/sleep44xx.S+6−2

  * The restore function pointer is stored at CPUx_WAKEUP_NS_PA_ADDR_OFFSET.
  * It returns to the caller for CPU INACTIVE and ON power states or in case
  * CPU failed to transition to targeted OFF/DORMANT state.
+ *
+ * omap4_finish_suspend() calls v7_flush_dcache_all() which doesn't save
+ * stack frame and it expects the caller to take care of it. Hence the entire
+ * stack frame is saved to avoid possible stack corruption.
  */
 ENTRY(omap4_finish_suspend)
-	stmfd	sp!, {lr}
+	stmfd	sp!, {r4-r12, lr}
 	cmp	r0, #0x0
 	beq	do_WFI				@ No lowpower state, jump to WFI
 skip_scu_gp_clear:
 	isb
 	dsb
-	ldmfd	sp!, {pc}
+	ldmfd	sp!, {r4-r12, pc}
 ENDPROC(omap4_finish_suspend)
 /*

arch/arm/mach-omap2/twl-common.c+1−0

@@ -67,6 +67,7 @@ void __init omap_pmic_init(int bus, u32 clkrate, · 66 unmodified lines
67	const char *pmic_type, int pmic_irq,	67	const char *pmic_type, int pmic_irq,
68	struct twl4030_platform_data *pmic_data)	68	struct twl4030_platform_data *pmic_data)
69	{	69	{
		70	omap_mux_init_signal("sys_nirq", OMAP_PIN_INPUT_PULLUP \| OMAP_PIN_OFF_WAKEUPENABLE);
70	strncpy(pmic_i2c_board_info.type, pmic_type,	71	strncpy(pmic_i2c_board_info.type, pmic_type,
71	sizeof(pmic_i2c_board_info.type));	72	sizeof(pmic_i2c_board_info.type));
72	pmic_i2c_board_info.irq = pmic_irq;	73	pmic_i2c_board_info.irq = pmic_irq;

arch/arm/mach-orion5x/common.c+2−1

@@ -109,7 +109,8 @@ void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data) · 108 unmodified lines
109	{	109	{
110	orion_ge00_init(eth_data,	110	orion_ge00_init(eth_data,
111	ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,	111	ORION5X_ETH_PHYS_BASE, IRQ_ORION5X_ETH_SUM,
112	IRQ_ORION5X_ETH_ERR);	112	IRQ_ORION5X_ETH_ERR,
		113	MV643XX_TX_CSUM_DEFAULT_LIMIT);
113	}	114	}
114		115
115		116

arch/arm/mach-s3c24xx/include/mach/dma.h+2−1

@@ -24,7 +24,8 @@ · 23 unmodified lines
24	*/	24	*/
25		25
26	enum dma_ch {	26	enum dma_ch {
27	DMACH_XD0,	27	DMACH_DT_PROP = -1, /* not yet supported, do not use */
		28	DMACH_XD0 = 0,
28	DMACH_XD1,	29	DMACH_XD1,
29	DMACH_SDI,	30	DMACH_SDI,
30	DMACH_SPI0,	31	DMACH_SPI0,

arch/arm/mach-shmobile/board-armadillo800eva.c+7−6

 };
 /* GPIO KEY */
-#define GPIO_KEY(c, g, d) { .code = c, .gpio = g, .desc = d, .active_low = 1 }
+#define GPIO_KEY(c, g, d, ...) \
+	{ .code = c, .gpio = g, .desc = d, .active_low = 1, __VA_ARGS__ }
 static struct gpio_keys_button gpio_buttons[] = {
-	GPIO_KEY(KEY_POWER,	GPIO_PORT99,	"SW1"),
+	GPIO_KEY(KEY_POWER,	GPIO_PORT99,	"SW3", .wakeup = 1),
-	GPIO_KEY(KEY_BACK,	GPIO_PORT100,	"SW2"),
+	GPIO_KEY(KEY_BACK,	GPIO_PORT100,	"SW4"),
-	GPIO_KEY(KEY_MENU,	GPIO_PORT97,	"SW3"),
+	GPIO_KEY(KEY_MENU,	GPIO_PORT97,	"SW5"),
-	GPIO_KEY(KEY_HOME,	GPIO_PORT98,	"SW4"),
+	GPIO_KEY(KEY_HOME,	GPIO_PORT98,	"SW6"),
 };
 static struct gpio_keys_platform_data gpio_key_info = {
 	&camera_device,
 	&ceu0_device,
 	&fsi_device,
-	&fsi_hdmi_device,
 	&fsi_wm8978_device,
+	&fsi_hdmi_device,
 };
 static void __init eva_clock_init(void)

arch/arm/mach-shmobile/board-mackerel.c+2−1

  *  - J30 "open"
  *  - modify usbhs1_get_id() USBHS_HOST -> USBHS_GADGET
  *  - add .get_vbus = usbhs_get_vbus in usbhs1_private
+ *  - check usbhs0_device(pio)/usbhs1_device(irq) order in mackerel_devices.
  */
 #define IRQ8 evt2irq(0x0300)
 #define USB_PHY_MODE		(1 << 4)
 	&nor_flash_device,
 	&smc911x_device,
 	&lcdc_device,
-	&usbhs1_device,
 	&usbhs0_device,
+	&usbhs1_device,
 	&leds_device,
 	&fsi_device,
 	&fsi_ak4643_device,

arch/arm/mach-shmobile/board-marzen.c+1−1

@@ -67,7 +67,7 @@ static struct smsc911x_platform_config smsc911x_platdata = { · 66 unmodified lines
67		67
68	static struct platform_device eth_device = {	68	static struct platform_device eth_device = {
69	.name = "smsc911x",	69	.name = "smsc911x",
70	.id = 0,	70	.id = -1,
71	.dev = {	71	.dev = {
72	.platform_data = &smsc911x_platdata,	72	.platform_data = &smsc911x_platdata,
73	},	73	},

arch/arm/mach-shmobile/intc-sh73a0.c+2−2

@@ -259,9 +259,9 @@ static int sh73a0_set_wake(struct irq_data *data, unsigned int on) · 258 unmodified lines
259	return 0; /* always allow wakeup */	259	return 0; /* always allow wakeup */
260	}	260	}
261		261
262	#define RELOC_BASE 0x1000	262	#define RELOC_BASE 0x1200
263		263
264	/* INTCA IRQ pins at INTCS + 0x1000 to make space for GIC+INTC handling */	264	/* INTCA IRQ pins at INTCS + RELOC_BASE to make space for GIC+INTC handling */
265	#define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE)	265	#define INTCS_VECT_RELOC(n, vect) INTCS_VECT((n), (vect) + RELOC_BASE)
266		266
267	INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,	267	INTC_IRQ_PINS_32(intca_irq_pins, 0xe6900000,

arch/arm/mach-ux500/Kconfig+0−1

@@ -41,7 +41,6 @@ config MACH_HREFV60 · 40 unmodified lines
41	config MACH_SNOWBALL	41	config MACH_SNOWBALL
42	bool "U8500 Snowball platform"	42	bool "U8500 Snowball platform"
43	select MACH_MOP500	43	select MACH_MOP500
44	select LEDS_GPIO
45	help	44	help
46	Include support for the snowball development platform.	45	Include support for the snowball development platform.
47		46

arch/arm/mach-ux500/board-mop500-msp.c+5−5

@@ -191,9 +191,9 @@ static struct platform_device db8500_add_msp_i2s(struct device parent, · 190 unmodified lines
191	return pdev;	191	return pdev;
192	}	192	}
193		193
194	/* Platform device for ASoC U8500 machine */	194	/* Platform device for ASoC MOP500 machine */
195	static struct platform_device snd_soc_u8500 = {	195	static struct platform_device snd_soc_mop500 = {
196	.name = "snd-soc-u8500",	196	.name = "snd-soc-mop500",
197	.id = 0,	197	.id = 0,
198	.dev = {	198	.dev = {
199	.platform_data = NULL,	199	.platform_data = NULL,
@@ -227,8 +227,8 @@ int mop500_msp_init(struct device *parent) · 27 unmodified lines
227	{	227	{
228	struct platform_device *msp1;	228	struct platform_device *msp1;
229		229
230	pr_info("%s: Register platform-device 'snd-soc-u8500'.\n", __func__);	230	pr_info("%s: Register platform-device 'snd-soc-mop500'.\n", __func__);
231	platform_device_register(&snd_soc_u8500);	231	platform_device_register(&snd_soc_mop500);
232		232
233	pr_info("Initialize MSP I2S-devices.\n");	233	pr_info("Initialize MSP I2S-devices.\n");
234	db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,	234	db8500_add_msp_i2s(parent, 0, U8500_MSP0_BASE, IRQ_DB8500_MSP0,

arch/arm/mach-ux500/board-mop500.c+4−0

 				ARRAY_SIZE(mop500_platform_devs));
 		mop500_sdi_init(parent);
+		mop500_msp_init(parent);
 		i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
 		i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
 		i2c_register_board_info(2, mop500_i2c2_devices,
 		mop500_uib_init();
+	} else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
+		mop500_msp_init(parent);
 	} else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
 		/*
 		 * The HREFv60 board removed a GPIO expander and routed
 				ARRAY_SIZE(mop500_platform_devs));
 		hrefv60_sdi_init(parent);
+		mop500_msp_init(parent);
 		i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
 		i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;

arch/arm/mm/dma-mapping.c+104−10

 	vunmap(cpu_addr);
 }
+#define DEFAULT_DMA_COHERENT_POOL_SIZE	SZ_256K
 struct dma_pool {
 	size_t size;
 	spinlock_t lock;
 	unsigned long *bitmap;
 	unsigned long nr_pages;
 	void *vaddr;
-	struct page *page;
+	struct page **pages;
 };
 static struct dma_pool atomic_pool = {
-	.size = SZ_256K,
+	.size = DEFAULT_DMA_COHERENT_POOL_SIZE,
 };
 static int __init early_coherent_pool(char *p)
 }
 early_param("coherent_pool", early_coherent_pool);
+void __init init_dma_coherent_pool_size(unsigned long size)
+{
+	/*
+	 * Catch any attempt to set the pool size too late.
+	 */
+	BUG_ON(atomic_pool.vaddr);
+	/*
+	 * Set architecture specific coherent pool size only if
+	 * it has not been changed by kernel command line parameter.
+	 */
+	if (atomic_pool.size == DEFAULT_DMA_COHERENT_POOL_SIZE)
+		atomic_pool.size = size;
+}
 /*
  * Initialise the coherent pool for atomic allocations.
  */
 	unsigned long nr_pages = pool->size >> PAGE_SHIFT;
 	unsigned long *bitmap;
 	struct page *page;
+	struct page **pages;
 	void *ptr;
 	int bitmap_size = BITS_TO_LONGS(nr_pages) * sizeof(long);
 	if (!bitmap)
 		goto no_bitmap;
+	pages = kzalloc(nr_pages * sizeof(struct page *), GFP_KERNEL);
+	if (!pages)
+		goto no_pages;
 	if (IS_ENABLED(CONFIG_CMA))
 		ptr = __alloc_from_contiguous(NULL, pool->size, prot, &page);
 	else
 		ptr = __alloc_remap_buffer(NULL, pool->size, GFP_KERNEL, prot,
 					   &page, NULL);
 	if (ptr) {
+		int i;
+		for (i = 0; i < nr_pages; i++)
+			pages[i] = page + i;
 		spin_lock_init(&pool->lock);
 		pool->vaddr = ptr;
-		pool->page = page;
+		pool->pages = pages;
 		pool->bitmap = bitmap;
 		pool->nr_pages = nr_pages;
 		pr_info("DMA: preallocated %u KiB pool for atomic coherent allocations\n",
 		       (unsigned)pool->size / 1024);
 		return 0;
 	}
+no_pages:
 	kfree(bitmap);
 no_bitmap:
 	pr_err("DMA: failed to allocate %u KiB pool for atomic coherent allocation\n",
 	if (pageno < pool->nr_pages) {
 		bitmap_set(pool->bitmap, pageno, count);
 		ptr = pool->vaddr + PAGE_SIZE * pageno;
-		*ret_page = pool->page + pageno;
+		*ret_page = pool->pages[pageno];
+	} else {
+		pr_err_once("ERROR: %u KiB atomic DMA coherent pool is too small!\n"
+			    "Please increase it with coherent_pool= kernel parameter!\n",
+			    (unsigned)pool->size / 1024);
 	}
 	spin_unlock_irqrestore(&pool->lock, flags);
 	return ptr;
 }
+static bool __in_atomic_pool(void *start, size_t size)
+{
+	struct dma_pool *pool = &atomic_pool;
+	void *end = start + size;
+	void *pool_start = pool->vaddr;
+	void *pool_end = pool->vaddr + pool->size;
+	if (start < pool_start || start > pool_end)
+		return false;
+	if (end <= pool_end)
+		return true;
+	WARN(1, "Wrong coherent size(%p-%p) from atomic pool(%p-%p)\n",
+	     start, end - 1, pool_start, pool_end - 1);
+	return false;
+}
 static int __free_from_pool(void *start, size_t size)
 {
 	struct dma_pool *pool = &atomic_pool;
 	unsigned long pageno, count;
 	unsigned long flags;
-	if (start < pool->vaddr || start > pool->vaddr + pool->size)
+	if (!__in_atomic_pool(start, size))
 		return 0;
-	if (start + size > pool->vaddr + pool->size) {
-		WARN(1, "freeing wrong coherent size from pool\n");
-		return 0;
-	}
 	pageno = (start - pool->vaddr) >> PAGE_SHIFT;
 	count = size >> PAGE_SHIFT;
 	return 0;
 }
+static struct page **__atomic_get_pages(void *addr)
+{
+	struct dma_pool *pool = &atomic_pool;
+	struct page **pages = pool->pages;
+	int offs = (addr - pool->vaddr) >> PAGE_SHIFT;
+	return pages + offs;
+}
 static struct page **__iommu_get_pages(void *cpu_addr, struct dma_attrs *attrs)
 {
 	struct vm_struct *area;
+	if (__in_atomic_pool(cpu_addr, PAGE_SIZE))
+		return __atomic_get_pages(cpu_addr);
 	if (dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs))
 		return cpu_addr;
 	return NULL;
 }
+static void *__iommu_alloc_atomic(struct device *dev, size_t size,
+				  dma_addr_t *handle)
+{
+	struct page *page;
+	void *addr;
+	addr = __alloc_from_pool(size, &page);
+	if (!addr)
+		return NULL;
+	*handle = __iommu_create_mapping(dev, &page, size);
+	if (*handle == DMA_ERROR_CODE)
+		goto err_mapping;
+	return addr;
+err_mapping:
+	__free_from_pool(addr, size);
+	return NULL;
+}
+static void __iommu_free_atomic(struct device *dev, struct page **pages,
+				dma_addr_t handle, size_t size)
+{
+	__iommu_remove_mapping(dev, handle, size);
+	__free_from_pool(page_address(pages[0]), size);
+}
 static void *arm_iommu_alloc_attrs(struct device *dev, size_t size,
 	    dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
 {
 	*handle = DMA_ERROR_CODE;
 	size = PAGE_ALIGN(size);
+	if (gfp & GFP_ATOMIC)
+		return __iommu_alloc_atomic(dev, size, handle);
 	pages = __iommu_alloc_buffer(dev, size, gfp);
 	if (!pages)
 		return NULL;
 		return;
 	}
+	if (__in_atomic_pool(cpu_addr, size)) {
+		__iommu_free_atomic(dev, pages, handle, size);
+		return;
+	}
 	if (!dma_get_attr(DMA_ATTR_NO_KERNEL_MAPPING, attrs)) {
 		unmap_kernel_range((unsigned long)cpu_addr, size);
 		vunmap(cpu_addr);

arch/arm/plat-omap/common.c+0−40

@@ -17,52 +17,12 @@ · 16 unmodified lines
17	#include <linux/dma-mapping.h>	17	#include <linux/dma-mapping.h>
18		18
19	#include <plat/common.h>	19	#include <plat/common.h>
20	#include <plat/board.h>
21	#include <plat/vram.h>	20	#include <plat/vram.h>
22	#include <plat/dsp.h>	21	#include <plat/dsp.h>
23	#include <plat/dma.h>	22	#include <plat/dma.h>
24		23
25	#include <plat/omap-secure.h>	24	#include <plat/omap-secure.h>
26		25
27
28	#define NO_LENGTH_CHECK 0xffffffff
29
30	struct omap_board_config_kernel *omap_board_config __initdata;
31	int omap_board_config_size;
32
33	static const void *__init get_config(u16 tag, size_t len,
34	int skip, size_t *len_out)
35	{
36	struct omap_board_config_kernel *kinfo = NULL;
37	int i;
38
39	/* Try to find the config from the board-specific structures
40	* in the kernel. */
41	for (i = 0; i < omap_board_config_size; i++) {
42	if (omap_board_config[i].tag == tag) {
43	if (skip == 0) {
44	kinfo = &omap_board_config[i];
45	break;
46	} else {
47	skip--;
48	}
49	}
50	}
51	if (kinfo == NULL)
52	return NULL;
53	return kinfo->data;
54	}
55
56	const void *__init __omap_get_config(u16 tag, size_t len, int nr)
57	{
58	return get_config(tag, len, nr, NULL);
59	}
60
61	const void __init omap_get_var_config(u16 tag, size_t len)
62	{
63	return get_config(tag, NO_LENGTH_CHECK, 0, len);
64	}
65
66	void __init omap_reserve(void)	26	void __init omap_reserve(void)
67	{	27	{
68	omap_vram_reserve_sdram_memblock();	28	omap_vram_reserve_sdram_memblock();

arch/arm/plat-omap/counter_32k.c+0−1

@@ -24,7 +24,6 @@ · 23 unmodified lines
24		24
25	#include <plat/hardware.h>	25	#include <plat/hardware.h>
26	#include <plat/common.h>	26	#include <plat/common.h>
27	#include <plat/board.h>
28		27
29	#include <plat/clock.h>	28	#include <plat/clock.h>
30		29

arch/arm/plat-omap/debug-devices.c+0−3

@@ -17,9 +17,6 @@ · 16 unmodified lines
17		17
18	#include <mach/hardware.h>	18	#include <mach/hardware.h>
19		19
20	#include <plat/board.h>
21
22
23	/* Many OMAP development platforms reuse the same "debug board"; these	20	/* Many OMAP development platforms reuse the same "debug board"; these
24	* platforms include H2, H3, H4, and Perseus2.	21	* platforms include H2, H3, H4, and Perseus2.
25	*/	22	*/

arch/arm/plat-omap/devices.c+0−1

@@ -23,7 +23,6 @@ · 22 unmodified lines
23	#include <asm/memblock.h>	23	#include <asm/memblock.h>
24		24
25	#include <plat/tc.h>	25	#include <plat/tc.h>
26	#include <plat/board.h>
27	#include <plat/mmc.h>	26	#include <plat/mmc.h>
28	#include <plat/menelaus.h>	27	#include <plat/menelaus.h>
29	#include <plat/omap44xx.h>	28	#include <plat/omap44xx.h>

arch/arm/plat-omap/dmtimer.c+3−3

 		timer->reserved = 1;
 		break;
 	}
+	spin_unlock_irqrestore(&dm_timer_lock, flags);
 	if (timer) {
 		ret = omap_dm_timer_prepare(timer);
 			timer = NULL;
 		}
 	}
-	spin_unlock_irqrestore(&dm_timer_lock, flags);
 	if (!timer)
 		pr_debug("%s: timer request failed!\n", __func__);
 			break;
 		}
 	}
+	spin_unlock_irqrestore(&dm_timer_lock, flags);
 	if (timer) {
 		ret = omap_dm_timer_prepare(timer);
 			timer = NULL;
 		}
 	}
-	spin_unlock_irqrestore(&dm_timer_lock, flags);
 	if (!timer)
 		pr_debug("%s: timer%d request failed!\n", __func__, id);
 void omap_dm_timer_disable(struct omap_dm_timer *timer)
 {
-	pm_runtime_put(&timer->pdev->dev);
+	pm_runtime_put_sync(&timer->pdev->dev);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_disable);

arch/arm/plat-omap/fb.c+0−2

@@ -33,8 +33,6 @@ · 32 unmodified lines
33	#include <mach/hardware.h>	33	#include <mach/hardware.h>
34	#include <asm/mach/map.h>	34	#include <asm/mach/map.h>
35		35
36	#include <plat/board.h>
37
38	#if defined(CONFIG_FB_OMAP) \|\| defined(CONFIG_FB_OMAP_MODULE)	36	#if defined(CONFIG_FB_OMAP) \|\| defined(CONFIG_FB_OMAP_MODULE)
39		37
40	static bool omapfb_lcd_configured;	38	static bool omapfb_lcd_configured;

arch/arm/plat-omap/include/plat/board.h+0−138

@@ -1,138 +0,0 @@
1	/*
2	* arch/arm/plat-omap/include/mach/board.h
3	*
4	* Information structures for board-specific data
5	*
6	* Copyright (C) 2004 Nokia Corporation
7	* Written by Juha Yrjölä <juha.yrjola@nokia.com>
8	*/
9
10	#ifndef _OMAP_BOARD_H
11	#define _OMAP_BOARD_H
12
13	#include <linux/types.h>
14
15	#include <plat/gpio-switch.h>
16
17	/*
18	* OMAP35x EVM revision
19	* Run time detection of EVM revision is done by reading Ethernet
20	* PHY ID -
21	* GEN_1 = 0x01150000
22	* GEN_2 = 0x92200000
23	*/
24	enum {
25	OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between A - D */
26	OMAP3EVM_BOARD_GEN_2, /* EVM Rev >= Rev E */
27	};
28
29	/* Different peripheral ids */
30	#define OMAP_TAG_CLOCK 0x4f01
31	#define OMAP_TAG_GPIO_SWITCH 0x4f06
32	#define OMAP_TAG_STI_CONSOLE 0x4f09
33	#define OMAP_TAG_CAMERA_SENSOR 0x4f0a
34
35	#define OMAP_TAG_BOOT_REASON 0x4f80
36	#define OMAP_TAG_FLASH_PART 0x4f81
37	#define OMAP_TAG_VERSION_STR 0x4f82
38
39	struct omap_clock_config {
40	/* 0 for 12 MHz, 1 for 13 MHz and 2 for 19.2 MHz */
41	u8 system_clock_type;
42	};
43
44	struct omap_serial_console_config {
45	u8 console_uart;
46	u32 console_speed;
47	};
48
49	struct omap_sti_console_config {
50	unsigned enable:1;
51	u8 channel;
52	};
53
54	struct omap_camera_sensor_config {
55	u16 reset_gpio;
56	int (power_on)(void data);
57	int (power_off)(void data);
58	};
59
60	struct omap_lcd_config {
61	char panel_name[16];
62	char ctrl_name[16];
63	s16 nreset_gpio;
64	u8 data_lines;
65	};
66
67	struct device;
68	struct fb_info;
69	struct omap_backlight_config {
70	int default_intensity;
71	int (set_power)(struct device dev, int state);
72	};
73
74	struct omap_fbmem_config {
75	u32 start;
76	u32 size;
77	};
78
79	struct omap_pwm_led_platform_data {
80	const char *name;
81	int intensity_timer;
82	int blink_timer;
83	void (set_power)(struct omap_pwm_led_platform_data self, int on_off);
84	};
85
86	struct omap_uart_config {
87	/* Bit field of UARTs present; bit 0 --> UART1 */
88	unsigned int enabled_uarts;
89	};
90
91
92	struct omap_flash_part_config {
93	char part_table[0];
94	};
95
96	struct omap_boot_reason_config {
97	char reason_str[12];
98	};
99
100	struct omap_version_config {
101	char component[12];
102	char version[12];
103	};
104
105	struct omap_board_config_entry {
106	u16 tag;
107	u16 len;
108	u8 data[0];
109	};
110
111	struct omap_board_config_kernel {
112	u16 tag;
113	const void *data;
114	};
115
116	extern const void *__init __omap_get_config(u16 tag, size_t len, int nr);
117
118	#define omap_get_config(tag, type) \
119	((const type *) __omap_get_config((tag), sizeof(type), 0))
120	#define omap_get_nr_config(tag, type, nr) \
121	((const type *) __omap_get_config((tag), sizeof(type), (nr)))
122
123	extern const void __init omap_get_var_config(u16 tag, size_t len);
124
125	extern struct omap_board_config_kernel *omap_board_config;
126	extern int omap_board_config_size;
127
128
129	/* for TI reference platforms sharing the same debug card */
130	extern int debug_card_init(u32 addr, unsigned gpio);
131
132	/* OMAP3EVM revision */
133	#if defined(CONFIG_MACH_OMAP3EVM)
134	u8 get_omap3_evm_rev(void);
135	#else
136	#define get_omap3_evm_rev() (-EINVAL)
137	#endif
138	#endif

arch/arm/plat-omap/include/plat/cpu.h+2−1

@@ -372,7 +372,8 @@ IS_OMAP_TYPE(3430, 0x3430) · 371 unmodified lines
372	#define cpu_class_is_omap1() (cpu_is_omap7xx() \|\| cpu_is_omap15xx() \|\| \	372	#define cpu_class_is_omap1() (cpu_is_omap7xx() \|\| cpu_is_omap15xx() \|\| \
373	cpu_is_omap16xx())	373	cpu_is_omap16xx())
374	#define cpu_class_is_omap2() (cpu_is_omap24xx() \|\| cpu_is_omap34xx() \|\| \	374	#define cpu_class_is_omap2() (cpu_is_omap24xx() \|\| cpu_is_omap34xx() \|\| \
375	cpu_is_omap44xx() \|\| soc_is_omap54xx())	375	cpu_is_omap44xx() \|\| soc_is_omap54xx() \|\| \
		376	soc_is_am33xx())
376		377
377	/* Various silicon revisions for omap2 */	378	/* Various silicon revisions for omap2 */
378	#define OMAP242X_CLASS 0x24200024	379	#define OMAP242X_CLASS 0x24200024

arch/arm/plat-omap/include/plat/debug-devices.h+9−0

@@ -0,0 +1,9 @@
	1	#ifndef _OMAP_DEBUG_DEVICES_H
	2	#define _OMAP_DEBUG_DEVICES_H
	3
	4	#include <linux/types.h>
	5
	6	/* for TI reference platforms sharing the same debug card */
	7	extern int debug_card_init(u32 addr, unsigned gpio);
	8
	9	#endif

arch/arm/plat-omap/include/plat/gpmc.h+19−0

@@ -133,6 +133,25 @@ struct gpmc_timings { · 132 unmodified lines
133	u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */	133	u16 wr_data_mux_bus; /* WRDATAONADMUXBUS */
134	};	134	};
135		135
		136	struct gpmc_nand_regs {
		137	void __iomem *gpmc_status;
		138	void __iomem *gpmc_nand_command;
		139	void __iomem *gpmc_nand_address;
		140	void __iomem *gpmc_nand_data;
		141	void __iomem *gpmc_prefetch_config1;
		142	void __iomem *gpmc_prefetch_config2;
		143	void __iomem *gpmc_prefetch_control;
		144	void __iomem *gpmc_prefetch_status;
		145	void __iomem *gpmc_ecc_config;
		146	void __iomem *gpmc_ecc_control;
		147	void __iomem *gpmc_ecc_size_config;
		148	void __iomem *gpmc_ecc1_result;
		149	void __iomem *gpmc_bch_result0;
		150	};
		151
		152	extern void gpmc_update_nand_reg(struct gpmc_nand_regs *reg, int cs);
		153	extern int gpmc_get_client_irq(unsigned irq_config);
		154
136	extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns);	155	extern unsigned int gpmc_ns_to_ticks(unsigned int time_ns);
137	extern unsigned int gpmc_ps_to_ticks(unsigned int time_ps);	156	extern unsigned int gpmc_ps_to_ticks(unsigned int time_ps);
138	extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);	157	extern unsigned int gpmc_ticks_to_ns(unsigned int ticks);

arch/arm/plat-omap/include/plat/mmc.h+0−1

@@ -15,7 +15,6 @@ · 14 unmodified lines
15	#include <linux/device.h>	15	#include <linux/device.h>
16	#include <linux/mmc/host.h>	16	#include <linux/mmc/host.h>
17		17
18	#include <plat/board.h>
19	#include <plat/omap_hwmod.h>	18	#include <plat/omap_hwmod.h>
20		19
21	#define OMAP15XX_NR_MMC 1	20	#define OMAP15XX_NR_MMC 1

arch/arm/plat-omap/include/plat/multi.h+9−0

@@ -108,4 +108,13 @@ · 107 unmodified lines
108	# endif	108	# endif
109	#endif	109	#endif
110		110
		111	#ifdef CONFIG_SOC_AM33XX
		112	# ifdef OMAP_NAME
		113	# undef MULTI_OMAP2
		114	# define MULTI_OMAP2
		115	# else
		116	# define OMAP_NAME am33xx
		117	# endif
		118	#endif
		119
111	#endif /* __PLAT_OMAP_MULTI_H */	120	#endif /* __PLAT_OMAP_MULTI_H */

arch/arm/plat-omap/include/plat/nand.h+1−1

 	bool			dev_ready;
 	int			gpmc_irq;
 	enum nand_io		xfer_type;
-	unsigned long		phys_base;
 	int			devsize;
 	enum omap_ecc           ecc_opt;
+	struct gpmc_nand_regs	reg;
 };
 /* minimum size for IO mapping */

arch/arm/plat-omap/include/plat/uncompress.h+1−3

 	_DEBUG_LL_ENTRY(mach, AM33XX_UART##p##_BASE, OMAP_PORT_SHIFT,	\
 		AM33XXUART##p)
-static inline void __arch_decomp_setup(unsigned long arch_id)
+static inline void arch_decomp_setup(void)
 {
 	int port = 0;
 	} while (0);
 }
-#define arch_decomp_setup()	__arch_decomp_setup(arch_id)
 /*
  * nothing to do
  */

arch/arm/plat-omap/include/plat/usb.h+0−1

@@ -5,7 +5,6 @@ · 4 unmodified lines
5		5
6	#include <linux/io.h>	6	#include <linux/io.h>
7	#include <linux/usb/musb.h>	7	#include <linux/usb/musb.h>
8	#include <plat/board.h>
9		8
10	#define OMAP3_HS_USB_PORTS 3	9	#define OMAP3_HS_USB_PORTS 3
11		10

arch/arm/plat-omap/sram.c+0−1

@@ -26,7 +26,6 @@ · 25 unmodified lines
26	#include <asm/mach/map.h>	26	#include <asm/mach/map.h>
27		27
28	#include <plat/sram.h>	28	#include <plat/sram.h>
29	#include <plat/board.h>
30	#include <plat/cpu.h>	29	#include <plat/cpu.h>
31		30
32	#include "sram.h"	31	#include "sram.h"

arch/arm/plat-orion/common.c+6−2

 void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
 			    unsigned long mapbase,
 			    unsigned long irq,
-			    unsigned long irq_err)
+			    unsigned long irq_err,
+			    unsigned int tx_csum_limit)
 {
 	fill_resources(&orion_ge00_shared, orion_ge00_shared_resources,
 		       mapbase + 0x2000, SZ_16K - 1, irq_err);
+	orion_ge00_shared_data.tx_csum_limit = tx_csum_limit;
 	ge_complete(&orion_ge00_shared_data,
 		    orion_ge00_resources, irq, &orion_ge00_shared,
 		    eth_data, &orion_ge00);
 void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
 			    unsigned long mapbase,
 			    unsigned long irq,
-			    unsigned long irq_err)
+			    unsigned long irq_err,
+			    unsigned int tx_csum_limit)
 {
 	fill_resources(&orion_ge01_shared, orion_ge01_shared_resources,
 		       mapbase + 0x2000, SZ_16K - 1, irq_err);
+	orion_ge01_shared_data.tx_csum_limit = tx_csum_limit;
 	ge_complete(&orion_ge01_shared_data,
 		    orion_ge01_resources, irq, &orion_ge01_shared,
 		    eth_data, &orion_ge01);

arch/arm/plat-orion/include/plat/common.h+4−2

 void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data,
 			    unsigned long mapbase,
 			    unsigned long irq,
-			    unsigned long irq_err);
+			    unsigned long irq_err,
+			    unsigned int tx_csum_limit);
 void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data,
 			    unsigned long mapbase,
 			    unsigned long irq,
-			    unsigned long irq_err);
+			    unsigned long irq_err,
+			    unsigned int tx_csum_limit);
 void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data,
 			    unsigned long mapbase,

arch/arm/plat-s3c24xx/dma.c+1−1

@@ -430,7 +430,7 @@ s3c2410_dma_canload(struct s3c2410_dma_chan *chan) · 429 unmodified lines
430	* when necessary.	430	* when necessary.
431	*/	431	*/
432		432
433	int s3c2410_dma_enqueue(unsigned int channel, void *id,	433	int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
434	dma_addr_t data, int size)	434	dma_addr_t data, int size)
435	{	435	{
436	struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);	436	struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel);

arch/arm/plat-samsung/devs.c+28−1

@@ -32,6 +32,8 @@ · 31 unmodified lines
32	#include <linux/platform_data/s3c-hsudc.h>	32	#include <linux/platform_data/s3c-hsudc.h>
33	#include <linux/platform_data/s3c-hsotg.h>	33	#include <linux/platform_data/s3c-hsotg.h>
34		34
		35	#include <media/s5p_hdmi.h>
		36
35	#include <asm/irq.h>	37	#include <asm/irq.h>
36	#include <asm/pmu.h>	38	#include <asm/pmu.h>
37	#include <asm/mach/arch.h>	39	#include <asm/mach/arch.h>
@@ -748,7 +750,8 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) · 710 unmodified lines
748	if (!pd) {	750	if (!pd) {
749	pd = &default_i2c_data;	751	pd = &default_i2c_data;
750		752
751	if (soc_is_exynos4210())	753	if (soc_is_exynos4210() \|\|
		754	soc_is_exynos4212() \|\| soc_is_exynos4412())
752	pd->bus_num = 8;	755	pd->bus_num = 8;
753	else if (soc_is_s5pv210())	756	else if (soc_is_s5pv210())
754	pd->bus_num = 3;	757	pd->bus_num = 3;
@@ -759,6 +762,30 @@ void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd) · 4 unmodified lines
759	npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),	762	npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
760	&s5p_device_i2c_hdmiphy);	763	&s5p_device_i2c_hdmiphy);
761	}	764	}
		765
		766	struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
		767
		768	void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
		769	struct i2c_board_info *mhl_info, int mhl_bus)
		770	{
		771	struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
		772
		773	if (soc_is_exynos4210() \|\|
		774	soc_is_exynos4212() \|\| soc_is_exynos4412())
		775	pd->hdmiphy_bus = 8;
		776	else if (soc_is_s5pv210())
		777	pd->hdmiphy_bus = 3;
		778	else
		779	pd->hdmiphy_bus = 0;
		780
		781	pd->hdmiphy_info = hdmiphy_info;
		782	pd->mhl_info = mhl_info;
		783	pd->mhl_bus = mhl_bus;
		784
		785	s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
		786	&s5p_device_hdmi);
		787	}
		788
762	#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */	789	#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
763		790
764	/* I2S */	791	/* I2S */

arch/arm/plat-samsung/include/plat/hdmi.h+16−0

@@ -0,0 +1,16 @@
	1	/*
	2	* Copyright (C) 2012 Samsung Electronics Co.Ltd
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms of the GNU General Public License as published by the
	6	* Free Software Foundation; either version 2 of the License, or (at your
	7	* option) any later version.
	8	*/
	9
	10	#ifndef __PLAT_SAMSUNG_HDMI_H
	11	#define __PLAT_SAMSUNG_HDMI_H __FILE__
	12
	13	extern void s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
	14	struct i2c_board_info *mhl_info, int mhl_bus);
	15
	16	#endif /* __PLAT_SAMSUNG_HDMI_H */

arch/arm/plat-samsung/pm.c+1−1

@@ -74,7 +74,7 @@ unsigned char pm_uart_udivslot; · 73 unmodified lines
74		74
75	#ifdef CONFIG_SAMSUNG_PM_DEBUG	75	#ifdef CONFIG_SAMSUNG_PM_DEBUG
76		76
77	struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];	77	static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
78		78
79	static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)	79	static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
80	{	80	{

arch/mips/Kconfig+1−0

@@ -89,6 +89,7 @@ config ATH79 · 88 unmodified lines
89	select CEVT_R4K	89	select CEVT_R4K
90	select CSRC_R4K	90	select CSRC_R4K
91	select DMA_NONCOHERENT	91	select DMA_NONCOHERENT
		92	select HAVE_CLK
92	select IRQ_CPU	93	select IRQ_CPU
93	select MIPS_MACHINE	94	select MIPS_MACHINE
94	select SYS_HAS_CPU_MIPS32_R2	95	select SYS_HAS_CPU_MIPS32_R2

arch/mips/alchemy/board-mtx1.c+2−0

@@ -228,6 +228,8 @@ static int mtx1_pci_idsel(unsigned int devsel, int assert) · 227 unmodified lines
228	* adapter on the mtx-1 "singleboard" variant. It triggers a custom	228	* adapter on the mtx-1 "singleboard" variant. It triggers a custom
229	* logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.	229	* logic chip connected to EXT_IO3 (GPIO1) to suppress IDSEL signals.
230	*/	230	*/
		231	udelay(1);
		232
231	if (assert && devsel != 0)	233	if (assert && devsel != 0)
232	/* Suppress signal to Cardbus */	234	/* Suppress signal to Cardbus */
233	alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */	235	alchemy_gpio_set_value(1, 0); /* set EXT_IO3 OFF */

arch/mips/ath79/dev-usb.c+2−0

@@ -145,6 +145,8 @@ static void __init ar7240_usb_setup(void) · 144 unmodified lines
145		145
146	ath79_ohci_resources[0].start = AR7240_OHCI_BASE;	146	ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
147	ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;	147	ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
		148	ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;
		149	ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;
148	platform_device_register(&ath79_ohci_device);	150	platform_device_register(&ath79_ohci_device);
149	}	151	}
150		152

arch/mips/ath79/gpio.c+4−2

 	if (soc_is_ar71xx())
 		ath79_gpio_count = AR71XX_GPIO_COUNT;
-	else if (soc_is_ar724x())
+	else if (soc_is_ar7240())
-		ath79_gpio_count = AR724X_GPIO_COUNT;
+		ath79_gpio_count = AR7240_GPIO_COUNT;
+	else if (soc_is_ar7241() || soc_is_ar7242())
+		ath79_gpio_count = AR7241_GPIO_COUNT;
 	else if (soc_is_ar913x())
 		ath79_gpio_count = AR913X_GPIO_COUNT;
 	else if (soc_is_ar933x())

arch/mips/bcm63xx/dev-spi.c+4−0

 	if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
 		spi_resources[0].end += BCM_6338_RSET_SPI_SIZE - 1;
 		spi_pdata.fifo_size = SPI_6338_MSG_DATA_SIZE;
+		spi_pdata.msg_type_shift = SPI_6338_MSG_TYPE_SHIFT;
+		spi_pdata.msg_ctl_width = SPI_6338_MSG_CTL_WIDTH;
 	}
 	if (BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
 		spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
 		spi_pdata.fifo_size = SPI_6358_MSG_DATA_SIZE;
+		spi_pdata.msg_type_shift = SPI_6358_MSG_TYPE_SHIFT;
+		spi_pdata.msg_ctl_width = SPI_6358_MSG_CTL_WIDTH;
 	}
 	bcm63xx_spi_regs_init();

arch/mips/cavium-octeon/octeon-irq.c+43−46

 	octeon_irq_ciu_to_irq[line][bit] = irq;
 }
+static void octeon_irq_force_ciu_mapping(struct irq_domain *domain,
+					 int irq, int line, int bit)
+{
+	irq_domain_associate(domain, irq, line << 6 | bit);
+}
 static int octeon_coreid_for_cpu(int cpu)
 {
 #ifdef CONFIG_SMP
 		mutex_init(&cd->core_irq_mutex);
 		irq = OCTEON_IRQ_SW0 + i;
-		switch (irq) {
+		irq_set_chip_data(irq, cd);
-		case OCTEON_IRQ_TIMER:
+		irq_set_chip_and_handler(irq, &octeon_irq_chip_core,
-		case OCTEON_IRQ_SW0:
+					 handle_percpu_irq);
-		case OCTEON_IRQ_SW1:
-		case OCTEON_IRQ_5:
-		case OCTEON_IRQ_PERF:
-			irq_set_chip_data(irq, cd);
-			irq_set_chip_and_handler(irq, &octeon_irq_chip_core,
-						 handle_percpu_irq);
-			break;
-		default:
-			break;
-		}
 	}
 }
 	unsigned int type;
 	unsigned int pin;
 	unsigned int trigger;
-	struct octeon_irq_gpio_domain_data *gpiod;
 	if (d->of_node != node)
 		return -EINVAL;
 		break;
 	}
 	*out_type = type;
-	gpiod = d->host_data;
+	*out_hwirq = pin;
-	*out_hwirq = gpiod->base_hwirq + pin;
 	return 0;
 }
 static int octeon_irq_gpio_map(struct irq_domain *d,
 			       unsigned int virq, irq_hw_number_t hw)
 {
-	unsigned int line = hw >> 6;
+	struct octeon_irq_gpio_domain_data *gpiod = d->host_data;
-	unsigned int bit = hw & 63;
+	unsigned int line, bit;
 	if (!octeon_irq_virq_in_range(virq))
 		return -EINVAL;
+	hw += gpiod->base_hwirq;
+	line = hw >> 6;
+	bit = hw & 63;
 	if (line > 1 || octeon_irq_ciu_to_irq[line][bit] != 0)
 		return -EINVAL;
 	octeon_irq_set_ciu_mapping(virq, line, bit,
 				   octeon_irq_gpio_chip,
 				   octeon_irq_handle_gpio);
 	return 0;
 }
 	struct irq_chip *chip_wd;
 	struct device_node *gpio_node;
 	struct device_node *ciu_node;
+	struct irq_domain *ciu_domain = NULL;
 	octeon_irq_init_ciu_percpu();
 	octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu;
 	/* Mips internal */
 	octeon_irq_init_core();
-	/* CIU_0 */
-	for (i = 0; i < 16; i++)
-		octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WORKQ0, 0, i + 0, chip, handle_level_irq);
-	octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq);
-	octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq);
-	for (i = 0; i < 4; i++)
-		octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_PCI_INT0, 0, i + 36, chip, handle_level_irq);
-	for (i = 0; i < 4; i++)
-		octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_PCI_MSI0, 0, i + 40, chip, handle_level_irq);
-	octeon_irq_set_ciu_mapping(OCTEON_IRQ_RML, 0, 46, chip, handle_level_irq);
-	for (i = 0; i < 4; i++)
-		octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_TIMER0, 0, i + 52, chip, handle_edge_irq);
-	octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB0, 0, 56, chip, handle_level_irq);
-	octeon_irq_set_ciu_mapping(OCTEON_IRQ_BOOTDMA, 0, 63, chip, handle_level_irq);
-	/* CIU_1 */
-	for (i = 0; i < 16; i++)
-		octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, chip_wd, handle_level_irq);
-	octeon_irq_set_ciu_mapping(OCTEON_IRQ_USB1, 1, 17, chip, handle_level_irq);
 	gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio");
 	if (gpio_node) {
 		struct octeon_irq_gpio_domain_data *gpiod;
 	ciu_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-ciu");
 	if (ciu_node) {
-		irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu_ops, NULL);
+		ciu_domain = irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu_ops, NULL);
 		of_node_put(ciu_node);
 	} else
-		pr_warn("Cannot find device node for cavium,octeon-3860-ciu.\n");
+		panic("Cannot find device node for cavium,octeon-3860-ciu.");
+	/* CIU_0 */
+	for (i = 0; i < 16; i++)
+		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_WORKQ0, 0, i + 0);
+	octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, chip_mbox, handle_percpu_irq);
+	octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, chip_mbox, handle_percpu_irq);
+	for (i = 0; i < 4; i++)
+		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_INT0, 0, i + 36);
+	for (i = 0; i < 4; i++)
+		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 0, i + 40);
+	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_RML, 0, 46);
+	for (i = 0; i < 4; i++)
+		octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_TIMER0, 0, i + 52);
+	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 0, 56);
+	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_BOOTDMA, 0, 63);
+	/* CIU_1 */
+	for (i = 0; i < 16; i++)
+		octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, chip_wd, handle_level_irq);
+	octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB1, 1, 17);
 	/* Enable the CIU lines */
 	set_c0_status(STATUSF_IP3 | STATUSF_IP2);

arch/mips/include/asm/mach-ath79/ar71xx_regs.h+2−1

@@ -393,7 +393,8 @@ · 392 unmodified lines
393	#define AR71XX_GPIO_REG_FUNC 0x28	393	#define AR71XX_GPIO_REG_FUNC 0x28
394		394
395	#define AR71XX_GPIO_COUNT 16	395	#define AR71XX_GPIO_COUNT 16
396	#define AR724X_GPIO_COUNT 18	396	#define AR7240_GPIO_COUNT 18
		397	#define AR7241_GPIO_COUNT 20
397	#define AR913X_GPIO_COUNT 22	398	#define AR913X_GPIO_COUNT 22
398	#define AR933X_GPIO_COUNT 30	399	#define AR933X_GPIO_COUNT 30
399	#define AR934X_GPIO_COUNT 23	400	#define AR934X_GPIO_COUNT 23

arch/mips/include/asm/mach-ath79/cpu-feature-overrides.h+0−1

@@ -42,7 +42,6 @@ · 41 unmodified lines
42	#define cpu_has_mips64r1 0	42	#define cpu_has_mips64r1 0
43	#define cpu_has_mips64r2 0	43	#define cpu_has_mips64r2 0
44		44
45	#define cpu_has_dsp 0
46	#define cpu_has_mipsmt 0	45	#define cpu_has_mipsmt 0
47		46
48	#define cpu_has_64bits 0	47	#define cpu_has_64bits 0

arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_spi.h+2−0

@@ -9,6 +9,8 @@ int __init bcm63xx_spi_register(void); · 8 unmodified lines
9		9
10	struct bcm63xx_spi_pdata {	10	struct bcm63xx_spi_pdata {
11	unsigned int fifo_size;	11	unsigned int fifo_size;
		12	unsigned int msg_type_shift;
		13	unsigned int msg_ctl_width;
12	int bus_num;	14	int bus_num;
13	int num_chipselect;	15	int num_chipselect;
14	u32 speed_hz;	16	u32 speed_hz;

arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h+10−3

 #define SPI_6338_FILL_BYTE		0x07
 #define SPI_6338_MSG_TAIL		0x09
 #define SPI_6338_RX_TAIL		0x0b
-#define SPI_6338_MSG_CTL		0x40
+#define SPI_6338_MSG_CTL		0x40	/* 8-bits register */
+#define SPI_6338_MSG_CTL_WIDTH		8
 #define SPI_6338_MSG_DATA		0x41
 #define SPI_6338_MSG_DATA_SIZE		0x3f
 #define SPI_6338_RX_DATA		0x80
 #define SPI_6348_FILL_BYTE		0x07
 #define SPI_6348_MSG_TAIL		0x09
 #define SPI_6348_RX_TAIL		0x0b
-#define SPI_6348_MSG_CTL		0x40
+#define SPI_6348_MSG_CTL		0x40	/* 8-bits register */
+#define SPI_6348_MSG_CTL_WIDTH		8
 #define SPI_6348_MSG_DATA		0x41
 #define SPI_6348_MSG_DATA_SIZE		0x3f
 #define SPI_6348_RX_DATA		0x80
 /* BCM 6358 SPI core */
 #define SPI_6358_MSG_CTL		0x00	/* 16-bits register */
+#define SPI_6358_MSG_CTL_WIDTH		16
 #define SPI_6358_MSG_DATA		0x02
 #define SPI_6358_MSG_DATA_SIZE		0x21e
 #define SPI_6358_RX_DATA		0x400
 /* BCM 6358 SPI core */
 #define SPI_6368_MSG_CTL		0x00	/* 16-bits register */
+#define SPI_6368_MSG_CTL_WIDTH		16
 #define SPI_6368_MSG_DATA		0x02
 #define SPI_6368_MSG_DATA_SIZE		0x21e
 #define SPI_6368_RX_DATA		0x400
 #define SPI_HD_W			0x01
 #define SPI_HD_R			0x02
 #define SPI_BYTE_CNT_SHIFT		0
-#define SPI_MSG_TYPE_SHIFT		14
+#define SPI_6338_MSG_TYPE_SHIFT		6
+#define SPI_6348_MSG_TYPE_SHIFT		6
+#define SPI_6358_MSG_TYPE_SHIFT		14
+#define SPI_6368_MSG_TYPE_SHIFT		14
 /* Command */
 #define SPI_CMD_NOOP			0x00

arch/mips/include/asm/mach-cavium-octeon/irq.h+1−9

 	OCTEON_IRQ_TIMER,
 /* sources in CIU_INTX_EN0 */
 	OCTEON_IRQ_WORKQ0,
-	OCTEON_IRQ_GPIO0 = OCTEON_IRQ_WORKQ0 + 16,
+	OCTEON_IRQ_WDOG0 = OCTEON_IRQ_WORKQ0 + 16,
-	OCTEON_IRQ_WDOG0 = OCTEON_IRQ_GPIO0 + 16,
 	OCTEON_IRQ_WDOG15 = OCTEON_IRQ_WDOG0 + 15,
 	OCTEON_IRQ_MBOX0 = OCTEON_IRQ_WDOG0 + 16,
 	OCTEON_IRQ_MBOX1,
-	OCTEON_IRQ_UART0,
-	OCTEON_IRQ_UART1,
-	OCTEON_IRQ_UART2,
 	OCTEON_IRQ_PCI_INT0,
 	OCTEON_IRQ_PCI_INT1,
 	OCTEON_IRQ_PCI_INT2,
 	OCTEON_IRQ_PCI_MSI2,
 	OCTEON_IRQ_PCI_MSI3,
-	OCTEON_IRQ_TWSI,
-	OCTEON_IRQ_TWSI2,
 	OCTEON_IRQ_RML,
 	OCTEON_IRQ_TIMER0,
 	OCTEON_IRQ_TIMER1,
 	OCTEON_IRQ_TIMER3,
 	OCTEON_IRQ_USB0,
 	OCTEON_IRQ_USB1,
-	OCTEON_IRQ_MII0,
-	OCTEON_IRQ_MII1,
 	OCTEON_IRQ_BOOTDMA,
 #ifndef CONFIG_PCI_MSI
 	OCTEON_IRQ_LAST = 127

arch/mips/include/asm/module.h+1−0

@@ -10,6 +10,7 @@ struct mod_arch_specific { · 9 unmodified lines
10	struct list_head dbe_list;	10	struct list_head dbe_list;
11	const struct exception_table_entry *dbe_start;	11	const struct exception_table_entry *dbe_start;
12	const struct exception_table_entry *dbe_end;	12	const struct exception_table_entry *dbe_end;
		13	struct mips_hi16 *r_mips_hi16_list;
13	};	14	};
14		15
15	typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */	16	typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */

arch/mips/include/asm/r4k-timer.h+4−4

@@ -12,16 +12,16 @@ · 11 unmodified lines
12		12
13	#ifdef CONFIG_SYNC_R4K	13	#ifdef CONFIG_SYNC_R4K
14		14
15	extern void synchronise_count_master(void);	15	extern void synchronise_count_master(int cpu);
16	extern void synchronise_count_slave(void);	16	extern void synchronise_count_slave(int cpu);
17		17
18	#else	18	#else
19		19
20	static inline void synchronise_count_master(void)	20	static inline void synchronise_count_master(int cpu)
21	{	21	{
22	}	22	}
23		23
24	static inline void synchronise_count_slave(void)	24	static inline void synchronise_count_slave(int cpu)
25	{	25	{
26	}	26	}
27		27

arch/mips/kernel/module.c+34−9

 	Elf_Addr value;
 };
-static struct mips_hi16 *mips_hi16_list;
 static LIST_HEAD(dbe_list);
 static DEFINE_SPINLOCK(dbe_lock);
 	n->addr = (Elf_Addr *)location;
 	n->value = v;
-	n->next = mips_hi16_list;
+	n->next = me->arch.r_mips_hi16_list;
-	mips_hi16_list = n;
+	me->arch.r_mips_hi16_list = n;
 	return 0;
 }
 	return 0;
 }
+static void free_relocation_chain(struct mips_hi16 *l)
+{
+	struct mips_hi16 *next;
+	while (l) {
+		next = l->next;
+		kfree(l);
+		l = next;
+	}
+}
 static int apply_r_mips_lo16_rel(struct module *me, u32 *location, Elf_Addr v)
 {
 	unsigned long insnlo = *location;
+	struct mips_hi16 *l;
 	Elf_Addr val, vallo;
 	/* Sign extend the addend we extract from the lo insn.  */
 	vallo = ((insnlo & 0xffff) ^ 0x8000) - 0x8000;
-	if (mips_hi16_list != NULL) {
+	if (me->arch.r_mips_hi16_list != NULL) {
-		struct mips_hi16 *l;
+		l = me->arch.r_mips_hi16_list;
-		l = mips_hi16_list;
 		while (l != NULL) {
 			struct mips_hi16 *next;
 			unsigned long insn;
 			l = next;
 		}
-		mips_hi16_list = NULL;
+		me->arch.r_mips_hi16_list = NULL;
 	}
 	/*
 	return 0;
 out_danger:
+	free_relocation_chain(l);
+	me->arch.r_mips_hi16_list = NULL;
 	pr_err("module %s: dangerous R_MIPS_LO16 REL relocation\n", me->name);
 	return -ENOEXEC;
 	pr_debug("Applying relocate section %u to %u\n", relsec,
 	       sechdrs[relsec].sh_info);
+	me->arch.r_mips_hi16_list = NULL;
 	for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
 		/* This is where to make the change */
 		location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
 			return res;
 	}
+	/*
+	 * Normally the hi16 list should be deallocated at this point.  A
+	 * malformed binary however could contain a series of R_MIPS_HI16
+	 * relocations not followed by a R_MIPS_LO16 relocation.  In that
+	 * case, free up the list and return an error.
+	 */
+	if (me->arch.r_mips_hi16_list) {
+		free_relocation_chain(me->arch.r_mips_hi16_list);
+		me->arch.r_mips_hi16_list = NULL;
+		return -ENOEXEC;
+	}
 	return 0;
 }

arch/mips/kernel/smp.c+2−2

 	cpu_set(cpu, cpu_callin_map);
-	synchronise_count_slave();
+	synchronise_count_slave(cpu);
 	/*
 	 * irq will be enabled in ->smp_finish(), enabling it too early
 void __init smp_cpus_done(unsigned int max_cpus)
 {
 	mp_ops->cpus_done();
-	synchronise_count_master();
 }
 /* called from main before smp_init() */
 	while (!cpu_isset(cpu, cpu_callin_map))
 		udelay(100);
+	synchronise_count_master(cpu);
 	return 0;
 }

arch/mips/kernel/sync-r4k.c+11−15

 #define COUNTON	100
 #define NR_LOOPS 5
-void __cpuinit synchronise_count_master(void)
+void __cpuinit synchronise_count_master(int cpu)
 {
 	int i;
 	unsigned long flags;
 	unsigned int initcount;
-	int nslaves;
 #ifdef CONFIG_MIPS_MT_SMTC
 	/*
 	return;
 #endif
-	printk(KERN_INFO "Synchronize counters across %u CPUs: ",
+	printk(KERN_INFO "Synchronize counters for CPU %u: ", cpu);
-	       num_online_cpus());
 	local_irq_save(flags);
 	 * Notify the slaves that it's time to start
 	 */
 	atomic_set(&count_reference, read_c0_count());
-	atomic_set(&count_start_flag, 1);
+	atomic_set(&count_start_flag, cpu);
 	smp_wmb();
 	/* Count will be initialised to current timer for all CPU's */
 	 * two CPUs.
 	 */
-	nslaves = num_online_cpus()-1;
 	for (i = 0; i < NR_LOOPS; i++) {
-		/* slaves loop on '!= ncpus' */
+		/* slaves loop on '!= 2' */
-		while (atomic_read(&count_count_start) != nslaves)
+		while (atomic_read(&count_count_start) != 1)
 			mb();
 		atomic_set(&count_count_stop, 0);
 		smp_wmb();
 		/*
 		 * Wait for all slaves to leave the synchronization point:
 		 */
-		while (atomic_read(&count_count_stop) != nslaves)
+		while (atomic_read(&count_count_stop) != 1)
 			mb();
 		atomic_set(&count_count_start, 0);
 		smp_wmb();
 	}
 	/* Arrange for an interrupt in a short while */
 	write_c0_compare(read_c0_count() + COUNTON);
+	atomic_set(&count_start_flag, 0);
 	local_irq_restore(flags);
 	printk("done.\n");
 }
-void __cpuinit synchronise_count_slave(void)
+void __cpuinit synchronise_count_slave(int cpu)
 {
 	int i;
 	unsigned int initcount;
-	int ncpus;
 #ifdef CONFIG_MIPS_MT_SMTC
 	/*
 	 * so we first wait for the master to say everyone is ready
 	 */
-	while (!atomic_read(&count_start_flag))
+	while (atomic_read(&count_start_flag) != cpu)
 		mb();
 	/* Count will be initialised to next expire for all CPU's */
 	initcount = atomic_read(&count_reference);
-	ncpus = num_online_cpus();
 	for (i = 0; i < NR_LOOPS; i++) {
 		atomic_inc(&count_count_start);
-		while (atomic_read(&count_count_start) != ncpus)
+		while (atomic_read(&count_count_start) != 2)
 			mb();
 		/*
 			write_c0_count(initcount);
 		atomic_inc(&count_count_stop);
-		while (atomic_read(&count_count_stop) != ncpus)
+		while (atomic_read(&count_count_stop) != 2)
 			mb();
 	}
 	/* Arrange for an interrupt in a short while */

arch/mips/mti-malta/malta-pci.c+0−13

@@ -252,16 +252,3 @@ void __init mips_pcibios_init(void) · 251 unmodified lines
252		252
253	register_pci_controller(controller);	253	register_pci_controller(controller);
254	}	254	}
255
256	/* Enable PCI 2.1 compatibility in PIIX4 */
257	static void __devinit quirk_dlcsetup(struct pci_dev *dev)
258	{
259	u8 odlc, ndlc;
260	(void) pci_read_config_byte(dev, 0x82, &odlc);
261	/* Enable passive releases and delayed transaction */
262	ndlc = odlc \| 7;
263	(void) pci_write_config_byte(dev, 0x82, ndlc);
264	}
265
266	DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_0,
267	quirk_dlcsetup);

arch/mips/pci/pci-ar724x.c+22−0

 #define AR724X_PCI_MEM_BASE	0x10000000
 #define AR724X_PCI_MEM_SIZE	0x08000000
+#define AR724X_PCI_REG_RESET		0x18
 #define AR724X_PCI_REG_INT_STATUS	0x4c
 #define AR724X_PCI_REG_INT_MASK		0x50
+#define AR724X_PCI_RESET_LINK_UP	BIT(0)
 #define AR724X_PCI_INT_DEV0		BIT(14)
 #define AR724X_PCI_IRQ_COUNT		1
 static u32 ar724x_pci_bar0_value;
 static bool ar724x_pci_bar0_is_cached;
+static bool ar724x_pci_link_up;
+static inline bool ar724x_pci_check_link(void)
+{
+	u32 reset;
+	reset = __raw_readl(ar724x_pci_ctrl_base + AR724X_PCI_REG_RESET);
+	return reset & AR724X_PCI_RESET_LINK_UP;
+}
 static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 			    int size, uint32_t *value)
 	void __iomem *base;
 	u32 data;
+	if (!ar724x_pci_link_up)
+		return PCIBIOS_DEVICE_NOT_FOUND;
 	if (devfn)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	u32 data;
 	int s;
+	if (!ar724x_pci_link_up)
+		return PCIBIOS_DEVICE_NOT_FOUND;
 	if (devfn)
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	if (ar724x_pci_ctrl_base == NULL)
 		goto err_unmap_devcfg;
+	ar724x_pci_link_up = ar724x_pci_check_link();
+	if (!ar724x_pci_link_up)
+		pr_warn("ar724x: PCIe link is down\n");
 	ar724x_pci_irq_init(irq);
 	register_pci_controller(&ar724x_pci_controller);

arch/parisc/include/asm/atomic.h+2−2

@@ -141,7 +141,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u) · 140 unmodified lines
141		141
142	#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)	142	#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
143		143
144	#define ATOMIC_INIT(i) ((atomic_t) { (i) })	144	#define ATOMIC_INIT(i) { (i) }
145		145
146	#define smp_mb__before_atomic_dec() smp_mb()	146	#define smp_mb__before_atomic_dec() smp_mb()
147	#define smp_mb__after_atomic_dec() smp_mb()	147	#define smp_mb__after_atomic_dec() smp_mb()
@@ -150,7 +150,7 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u) · 2 unmodified lines
150		150
151	#ifdef CONFIG_64BIT	151	#ifdef CONFIG_64BIT
152		152
153	#define ATOMIC64_INIT(i) ((atomic64_t) { (i) })	153	#define ATOMIC64_INIT(i) { (i) }
154		154
155	static __inline__ s64	155	static __inline__ s64
156	__atomic64_add_return(s64 i, atomic64_t *v)	156	__atomic64_add_return(s64 i, atomic64_t *v)

arch/parisc/kernel/process.c+1−1

@@ -309,7 +309,7 @@ copy_thread(unsigned long clone_flags, unsigned long usp, · 308 unmodified lines
309	cregs->ksp = (unsigned long)stack	309	cregs->ksp = (unsigned long)stack
310	+ (pregs->gr[21] & (THREAD_SIZE - 1));	310	+ (pregs->gr[21] & (THREAD_SIZE - 1));
311	cregs->gr[30] = usp;	311	cregs->gr[30] = usp;
312	if (p->personality == PER_HPUX) {	312	if (personality(p->personality) == PER_HPUX) {
313	#ifdef CONFIG_HPUX	313	#ifdef CONFIG_HPUX
314	cregs->kpc = (unsigned long) &hpux_child_return;	314	cregs->kpc = (unsigned long) &hpux_child_return;
315	#else	315	#else

arch/parisc/kernel/sys_parisc.c+4−4

@@ -225,12 +225,12 @@ long parisc_personality(unsigned long personality) · 224 unmodified lines
225	long err;	225	long err;
226		226
227	if (personality(current->personality) == PER_LINUX32	227	if (personality(current->personality) == PER_LINUX32
228	&& personality == PER_LINUX)	228	&& personality(personality) == PER_LINUX)
229	personality = PER_LINUX32;	229	personality = (personality & ~PER_MASK) \| PER_LINUX32;
230		230
231	err = sys_personality(personality);	231	err = sys_personality(personality);
232	if (err == PER_LINUX32)	232	if (personality(err) == PER_LINUX32)
233	err = PER_LINUX;	233	err = (err & ~PER_MASK) \| PER_LINUX;
234		234
235	return err;	235	return err;
236	}	236	}

arch/powerpc/boot/dts/fsl/p4080si-post.dtsi+7−0

@@ -345,6 +345,13 @@ · 344 unmodified lines
345	/include/ "qoriq-duart-1.dtsi"	345	/include/ "qoriq-duart-1.dtsi"
346	/include/ "qoriq-gpio-0.dtsi"	346	/include/ "qoriq-gpio-0.dtsi"
347	/include/ "qoriq-usb2-mph-0.dtsi"	347	/include/ "qoriq-usb2-mph-0.dtsi"
		348	usb@210000 {
		349	compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
		350	port0;
		351	};
348	/include/ "qoriq-usb2-dr-0.dtsi"	352	/include/ "qoriq-usb2-dr-0.dtsi"
		353	usb@211000 {
		354	compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
		355	};
349	/include/ "qoriq-sec4.0-0.dtsi"	356	/include/ "qoriq-sec4.0-0.dtsi"
350	};	357	};

arch/powerpc/configs/85xx/p1023rds_defconfig+10−21

 CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_AUDIT=y
-CONFIG_SPARSE_IRQ=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_KALLSYMS_ALL=y
-CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_EMBEDDED=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_MAC_PARTITION=y
 CONFIG_P1023_RDS=y
 CONFIG_QUICC_ENGINE=y
 CONFIG_QE_GPIO=y
 CONFIG_CPM2=y
-CONFIG_GPIO_MPC8XXX=y
 CONFIG_HIGHMEM=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_BINFMT_MISC=m
 CONFIG_MATH_EMULATION=y
 CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_SATA_SIL24=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
+CONFIG_FS_ENET=y
+CONFIG_FSL_PQ_MDIO=y
+CONFIG_E1000E=y
 CONFIG_MARVELL_PHY=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_CICADA_PHY=y
 CONFIG_VITESSE_PHY=y
 CONFIG_FIXED_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_FS_ENET=y
-CONFIG_E1000E=y
-CONFIG_FSL_PQ_MDIO=y
 CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=2
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_DETECT_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
 CONFIG_SERIAL_QE=m
-CONFIG_HW_RANDOM=y
 CONFIG_NVRAM=y
 CONFIG_I2C=y
 CONFIG_I2C_CPM=m
 CONFIG_I2C_MPC=y
+CONFIG_GPIO_MPC8XXX=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
 CONFIG_SOUND=y
 CONFIG_FSL_DMA=y
 # CONFIG_NET_DMA is not set
 CONFIG_STAGING=y
-# CONFIG_STAGING_EXCLUDE_BUILD is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 CONFIG_SYSV_FS=m
 CONFIG_UFS_FS=m
 CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
 CONFIG_CRC_T10DIF=y
 CONFIG_FRAME_WARN=8092
 CONFIG_DEBUG_FS=y
-CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_DEBUG_BUGVERBOSE is not set
 CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=y

arch/powerpc/configs/corenet32_smp_defconfig+9−20

 CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_AUDIT=y
-CONFIG_SPARSE_IRQ=y
+CONFIG_NO_HZ=y
-CONFIG_RCU_TRACE=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_MAC_PARTITION=y
 CONFIG_P2041_RDB=y
 CONFIG_P3041_DS=y
 CONFIG_P4080_DS=y
 CONFIG_P5020_DS=y
 CONFIG_HIGHMEM=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_BINFMT_MISC=m
 CONFIG_KEXEC=y
 CONFIG_IRQ_ALL_CPUS=y
 CONFIG_FORCE_MAX_ZONEORDER=13
-CONFIG_FSL_LBC=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
-CONFIG_PCI_MSI=y
 # CONFIG_PCIEASPM is not set
+CONFIG_PCI_MSI=y
 CONFIG_RAPIDIO=y
 CONFIG_FSL_RIO=y
 CONFIG_NET=y
 CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_M25P80=y
 CONFIG_MTD_NAND=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_NAND_IDS=y
-CONFIG_MTD_NAND_FSL_IFC=y
 CONFIG_MTD_NAND_FSL_ELBC=y
-CONFIG_MTD_M25P80=y
+CONFIG_MTD_NAND_FSL_IFC=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_MISC_DEVICES=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
 CONFIG_PPC_EPAPR_HV_BYTECHAN=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_DETECT_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
-CONFIG_HW_RANDOM=y
 CONFIG_NVRAM=y
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_VIDEO_OUTPUT_CONTROL=y
 CONFIG_USB_HID=m
 CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
 CONFIG_USB_MON=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_FSL=y
 CONFIG_USB_STORAGE=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
-CONFIG_MMC_SDHCI_OF=y
-CONFIG_MMC_SDHCI_OF_ESDHC=y
 CONFIG_EDAC=y
 CONFIG_EDAC_MM_EDAC=y
 CONFIG_EDAC_MPC85XX=y
 CONFIG_JFFS2_FS=y
 CONFIG_CRAMFS=y
 CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_NLS_UTF8=m
 CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEBUG_INFO=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_RCU_TRACE=y
 CONFIG_CRYPTO_NULL=y
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_MD4=y

arch/powerpc/configs/corenet64_smp_defconfig+1−0

@@ -56,6 +56,7 @@ CONFIG_INET_ESP=y · 55 unmodified lines
56	CONFIG_IPV6=y	56	CONFIG_IPV6=y
57	CONFIG_IP_SCTP=m	57	CONFIG_IP_SCTP=m
58	CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"	58	CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
		59	CONFIG_DEVTMPFS=y
59	CONFIG_MTD=y	60	CONFIG_MTD=y
60	CONFIG_MTD_CMDLINE_PARTS=y	61	CONFIG_MTD_CMDLINE_PARTS=y
61	CONFIG_MTD_CHAR=y	62	CONFIG_MTD_CHAR=y

arch/powerpc/configs/g5_defconfig+73−30

+CONFIG_PPC64=y
+CONFIG_ALTIVEC=y
+CONFIG_SMP=y
+CONFIG_NR_CPUS=4
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_PARTITION_ADVANCED=y
+# CONFIG_PPC_PSERIES is not set
-CONFIG_MAC_PARTITION=y
-CONFIG_SMP=y
-CONFIG_NR_CPUS=4
-CONFIG_KEXEC=y
-# CONFIG_RELOCATABLE is not set
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_GOV_POWERSAVE=y
 CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_PMAC64=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_KEXEC=y
+CONFIG_IRQ_ALL_CPUS=y
+# CONFIG_MIGRATION is not set
 CONFIG_PCI_MSI=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 CONFIG_NF_CONNTRACK_IPV4=m
 CONFIG_IP_NF_QUEUE=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_CDROM_PKTCDVD=m
 CONFIG_IDE=y
 CONFIG_BLK_DEV_IDECD=y
+CONFIG_BLK_DEV_IDE_PMAC=y
+CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
 CONFIG_DM_SNAPSHOT=m
 CONFIG_DM_MIRROR=m
 CONFIG_DM_ZERO=m
-CONFIG_MACINTOSH_DRIVERS=y
+CONFIG_IEEE1394=y
+CONFIG_IEEE1394_OHCI1394=y
+CONFIG_IEEE1394_SBP2=m
+CONFIG_IEEE1394_ETH1394=m
+CONFIG_IEEE1394_RAWIO=y
+CONFIG_IEEE1394_VIDEO1394=m
+CONFIG_IEEE1394_DV1394=m
+CONFIG_ADB_PMU=y
+CONFIG_PMAC_SMU=y
 CONFIG_MAC_EMUMOUSEBTN=y
+CONFIG_THERM_PM72=y
+CONFIG_WINDFARM=y
+CONFIG_WINDFARM_PM81=y
+CONFIG_WINDFARM_PM91=y
+CONFIG_WINDFARM_PM112=y
+CONFIG_WINDFARM_PM121=y
 CONFIG_NETDEVICES=y
-CONFIG_BONDING=m
 CONFIG_DUMMY=m
-CONFIG_MII=y
+CONFIG_BONDING=m
 CONFIG_TUN=m
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+CONFIG_SUNGEM=y
 CONFIG_ACENIC=m
 CONFIG_ACENIC_OMIT_TIGON_I=y
-CONFIG_TIGON3=y
 CONFIG_E1000=y
-CONFIG_SUNGEM=y
+CONFIG_TIGON3=y
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
 CONFIG_USB_CATC=m
 CONFIG_USB_KAWETH=m
 CONFIG_USB_PEGASUS=m
 # CONFIG_USB_NET_NET1080 is not set
 # CONFIG_USB_NET_CDC_SUBSET is not set
 # CONFIG_USB_NET_ZAURUS is not set
+CONFIG_PPP=m
+CONFIG_PPP_ASYNC=m
+CONFIG_PPP_SYNC_TTY=m
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPPOE=m
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
 CONFIG_INPUT_JOYDEV=m
 CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
 # CONFIG_MOUSE_PS2 is not set
+# CONFIG_SERIO_I8042 is not set
 # CONFIG_SERIO_SERPORT is not set
-CONFIG_VT_HW_CONSOLE_BINDING=y
 # CONFIG_HW_RANDOM is not set
 CONFIG_GEN_RTC=y
 CONFIG_RAW_DRIVER=y
 CONFIG_I2C_CHARDEV=y
 # CONFIG_HWMON is not set
-CONFIG_AGP=y
+CONFIG_AGP=m
-CONFIG_DRM=y
+CONFIG_AGP_UNINORTH=m
-CONFIG_DRM_NOUVEAU=y
 CONFIG_VIDEO_OUTPUT_CONTROL=m
+CONFIG_FB=y
 CONFIG_FIRMWARE_EDID=y
 CONFIG_FB_TILEBLITTING=y
+CONFIG_FB_OF=y
+CONFIG_FB_NVIDIA=y
+CONFIG_FB_NVIDIA_I2C=y
 CONFIG_FB_RADEON=y
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
 CONFIG_LOGO=y
 CONFIG_SOUND=m
 CONFIG_SND=m
 CONFIG_SND_MIXER_OSS=m
 CONFIG_SND_PCM_OSS=m
 CONFIG_SND_SEQUENCER_OSS=y
+CONFIG_SND_POWERMAC=m
+CONFIG_SND_AOA=m
+CONFIG_SND_AOA_FABRIC_LAYOUT=m
+CONFIG_SND_AOA_ONYX=m
+CONFIG_SND_AOA_TAS=m
+CONFIG_SND_AOA_TOONIE=m
 CONFIG_SND_USB_AUDIO=m
+CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
 CONFIG_HID_GYRATION=y
 CONFIG_LOGITECH_FF=y
 CONFIG_HID_PANTHERLORD=y
 CONFIG_HID_SAMSUNG=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SUNPLUS=y
-CONFIG_HID_PID=y
-CONFIG_USB_HIDDEV=y
 CONFIG_USB=y
+CONFIG_USB_DEVICEFS=y
 CONFIG_USB_MON=y
 CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_HCD_PPC_OF is not set
 CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
 CONFIG_USB_ACM=m
 CONFIG_USB_PRINTER=y
 CONFIG_USB_STORAGE=y
 CONFIG_REISERFS_FS_SECURITY=y
 CONFIG_XFS_FS=m
 CONFIG_XFS_POSIX_ACL=y
+CONFIG_INOTIFY=y
+CONFIG_AUTOFS_FS=m
 CONFIG_ISO9660_FS=y
 CONFIG_JOLIET=y
 CONFIG_ZISOFS=y
 CONFIG_HFSPLUS_FS=m
 CONFIG_CRAMFS=y
 CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
 CONFIG_NFS_V3_ACL=y
 CONFIG_NFS_V4=y
 CONFIG_NFSD=y
 CONFIG_NFSD_V3_ACL=y
 CONFIG_NFSD_V4=y
 CONFIG_CIFS=m
+CONFIG_PARTITION_ADVANCED=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_CODEPAGE_1250=y
 CONFIG_NLS_CODEPAGE_1251=y
 CONFIG_NLS_ISO8859_1=y
 CONFIG_NLS_ISO8859_15=y
 CONFIG_NLS_UTF8=y
+CONFIG_CRC_T10DIF=y
+CONFIG_LIBCRC32C=m
 CONFIG_MAGIC_SYSRQ=y
-# CONFIG_UNUSED_SYMBOLS is not set
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DEBUG_MUTEXES=y
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_LATENCYTOP=y
-CONFIG_STRICT_DEVMEM=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_BOOTX_TEXT=y
 CONFIG_CRYPTO_NULL=m
 CONFIG_CRYPTO_TEST=m
+CONFIG_CRYPTO_ECB=m
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_MD4=m
 CONFIG_CRYPTO_MICHAEL_MIC=m
 CONFIG_CRYPTO_SHA256=m
 CONFIG_CRYPTO_SHA512=m
 CONFIG_CRYPTO_WP512=m
 CONFIG_CRYPTO_AES=m
 CONFIG_CRYPTO_ANUBIS=m
+CONFIG_CRYPTO_ARC4=m
 CONFIG_CRYPTO_BLOWFISH=m
 CONFIG_CRYPTO_CAST5=m
 CONFIG_CRYPTO_CAST6=m
 CONFIG_CRYPTO_TWOFISH=m
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
-# CONFIG_VIRTUALIZATION is not set
-CONFIG_CRC_T10DIF=y
-CONFIG_LIBCRC32C=m

arch/powerpc/configs/mpc83xx_defconfig+5−13

 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
 CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
 # CONFIG_PPC_CHRP is not set
 # CONFIG_PPC_PMAC is not set
 CONFIG_PPC_83xx=y
 CONFIG_QUICC_ENGINE=y
 CONFIG_QE_GPIO=y
 CONFIG_MATH_EMULATION=y
-CONFIG_SPARSE_IRQ=y
 CONFIG_PCI=y
 CONFIG_NET=y
 CONFIG_PACKET=y
 # CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
 # CONFIG_FW_LOADER is not set
 CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_OF_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
 CONFIG_SATA_FSL=y
 CONFIG_SATA_SIL=y
 CONFIG_NETDEVICES=y
+CONFIG_MII=y
+CONFIG_UCC_GETH=y
+CONFIG_GIANFAR=y
 CONFIG_MARVELL_PHY=y
 CONFIG_DAVICOM_PHY=y
 CONFIG_VITESSE_PHY=y
 CONFIG_ICPLUS_PHY=y
 CONFIG_FIXED_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_GIANFAR=y
-CONFIG_UCC_GETH=y
 CONFIG_INPUT_FF_MEMLESS=m
 # CONFIG_INPUT_MOUSEDEV is not set
 # CONFIG_INPUT_KEYBOARD is not set
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_INOTIFY=y
 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
 CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
 CONFIG_CRC_T10DIF=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_CRYPTO_ECB=m
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_SHA256=y

arch/powerpc/configs/mpc85xx_defconfig+9−24

 CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_AUDIT=y
-CONFIG_SPARSE_IRQ=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_MAC_PARTITION=y
 CONFIG_MPC8540_ADS=y
 CONFIG_MPC8560_ADS=y
 CONFIG_MPC85xx_CDS=y
 CONFIG_QUICC_ENGINE=y
 CONFIG_QE_GPIO=y
 CONFIG_HIGHMEM=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BINFMT_MISC=m
 CONFIG_MATH_EMULATION=y
 CONFIG_FORCE_MAX_ZONEORDER=12
 CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
 CONFIG_FTL=y
-CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_M25P80=y
-CONFIG_MTD_OF_PARTS=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_FSL_ELBC=y
 CONFIG_MTD_NAND_FSL_IFC=y
-CONFIG_MTD_NAND_IDS=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_M25P80=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_SATA_AHCI=y
 CONFIG_SATA_FSL=y
 CONFIG_PATA_ALI=y
+CONFIG_PATA_VIA=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
 CONFIG_FS_ENET=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=2
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_DETECT_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SUNPLUS=y
 CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
 CONFIG_USB_MON=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_FSL=y
 CONFIG_SYSV_FS=m
 CONFIG_UFS_FS=m
 CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
 CONFIG_CRC_T10DIF=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEBUG_INFO=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=y

arch/powerpc/configs/mpc85xx_smp_defconfig+8−24

 CONFIG_POSIX_MQUEUE=y
 CONFIG_BSD_PROCESS_ACCT=y
 CONFIG_AUDIT=y
-CONFIG_SPARSE_IRQ=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_MAC_PARTITION=y
 CONFIG_MPC8540_ADS=y
 CONFIG_MPC8560_ADS=y
 CONFIG_MPC85xx_CDS=y
 CONFIG_QUICC_ENGINE=y
 CONFIG_QE_GPIO=y
 CONFIG_HIGHMEM=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BINFMT_MISC=m
 CONFIG_MATH_EMULATION=y
 CONFIG_IRQ_ALL_CPUS=y
 CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
 CONFIG_MTD=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
 CONFIG_FTL=y
-CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI=y
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-CONFIG_MTD_CFI_I1=y
-CONFIG_MTD_CFI_I2=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_UTIL=y
 CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_M25P80=y
-CONFIG_MTD_OF_PARTS=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_FSL_ELBC=y
 CONFIG_MTD_NAND_FSL_IFC=y
-CONFIG_MTD_NAND_IDS=y
-CONFIG_MTD_NAND_ECC=y
-CONFIG_MTD_M25P80=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_8250_NR_UARTS=2
 CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_DETECT_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
 CONFIG_HID_SONY=y
 CONFIG_HID_SUNPLUS=y
 CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
 CONFIG_USB_MON=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_FSL=y
 CONFIG_SYSV_FS=m
 CONFIG_UFS_FS=m
 CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
 CONFIG_NFS_V4=y
 CONFIG_ROOT_NFS=y
 CONFIG_NFSD=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
 CONFIG_CRC_T10DIF=y
 CONFIG_DEBUG_FS=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEBUG_INFO=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
 CONFIG_CRYPTO_PCBC=m
 CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=y

arch/powerpc/include/asm/cputable.h+0−2

@@ -553,9 +553,7 @@ static inline int cpu_has_feature(unsigned long feature) · 552 unmodified lines
553	& feature);	553	& feature);
554	}	554	}
555		555
556	#ifdef CONFIG_HAVE_HW_BREAKPOINT
557	#define HBP_NUM 1	556	#define HBP_NUM 1
558	#endif /* CONFIG_HAVE_HW_BREAKPOINT */
559		557
560	#endif /* !__ASSEMBLY__ */	558	#endif /* !__ASSEMBLY__ */
561		559

arch/powerpc/include/asm/kvm_host.h+1−0

@@ -33,6 +33,7 @@ · 32 unmodified lines
33	#include <asm/kvm_asm.h>	33	#include <asm/kvm_asm.h>
34	#include <asm/processor.h>	34	#include <asm/processor.h>
35	#include <asm/page.h>	35	#include <asm/page.h>
		36	#include <asm/cacheflush.h>
36		37
37	#define KVM_MAX_VCPUS NR_CPUS	38	#define KVM_MAX_VCPUS NR_CPUS
38	#define KVM_MAX_VCORES NR_CPUS	39	#define KVM_MAX_VCORES NR_CPUS

arch/powerpc/include/asm/kvm_ppc.h+12−0

@@ -219,4 +219,16 @@ void kvmppc_claim_lpid(long lpid); · 218 unmodified lines
219	void kvmppc_free_lpid(long lpid);	219	void kvmppc_free_lpid(long lpid);
220	void kvmppc_init_lpid(unsigned long nr_lpids);	220	void kvmppc_init_lpid(unsigned long nr_lpids);
221		221
		222	static inline void kvmppc_mmu_flush_icache(pfn_t pfn)
		223	{
		224	/* Clear i-cache for new pages */
		225	struct page *page;
		226	page = pfn_to_page(pfn);
		227	if (!test_bit(PG_arch_1, &page->flags)) {
		228	flush_dcache_icache_page(page);
		229	set_bit(PG_arch_1, &page->flags);
		230	}
		231	}
		232
		233
222	#endif /* __POWERPC_KVM_PPC_H__ */	234	#endif /* __POWERPC_KVM_PPC_H__ */

arch/powerpc/include/asm/mpic_msgr.h+1−0

@@ -14,6 +14,7 @@ · 13 unmodified lines
14	#include <linux/types.h>	14	#include <linux/types.h>
15	#include <linux/spinlock.h>	15	#include <linux/spinlock.h>
16	#include <asm/smp.h>	16	#include <asm/smp.h>
		17	#include <asm/io.h>
17		18
18	struct mpic_msgr {	19	struct mpic_msgr {
19	u32 __iomem *base;	20	u32 __iomem *base;

arch/powerpc/include/asm/processor.h+1−0

@@ -386,6 +386,7 @@ extern unsigned long cpuidle_disable; · 385 unmodified lines
386	enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};	386	enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
387		387
388	extern int powersave_nap; /* set if nap mode can be used in idle loop */	388	extern int powersave_nap; /* set if nap mode can be used in idle loop */
		389	extern void power7_nap(void);
389		390
390	#ifdef CONFIG_PSERIES_IDLE	391	#ifdef CONFIG_PSERIES_IDLE
391	extern void update_smt_snooze_delay(int snooze);	392	extern void update_smt_snooze_delay(int snooze);

arch/powerpc/kernel/asm-offsets.c+1−0

@@ -76,6 +76,7 @@ int main(void) · 75 unmodified lines
76	DEFINE(SIGSEGV, SIGSEGV);	76	DEFINE(SIGSEGV, SIGSEGV);
77	DEFINE(NMI_MASK, NMI_MASK);	77	DEFINE(NMI_MASK, NMI_MASK);
78	DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));	78	DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
		79	DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
79	#else	80	#else
80	DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));	81	DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
81	#endif /* CONFIG_PPC64 */	82	#endif /* CONFIG_PPC64 */

arch/powerpc/kernel/dbell.c+2−0

@@ -28,6 +28,8 @@ void doorbell_setup_this_cpu(void) · 27 unmodified lines
28		28
29	void doorbell_cause_ipi(int cpu, unsigned long data)	29	void doorbell_cause_ipi(int cpu, unsigned long data)
30	{	30	{
		31	/* Order previous accesses vs. msgsnd, which is treated as a store */
		32	mb();
31	ppc_msgsnd(PPC_DBELL, 0, data);	33	ppc_msgsnd(PPC_DBELL, 0, data);
32	}	34	}
33		35

arch/powerpc/kernel/dma-iommu.c+4−5

 		return 0;
 	}
-	if ((tbl->it_offset + tbl->it_size) > (mask >> IOMMU_PAGE_SHIFT)) {
+	if (tbl->it_offset > (mask >> IOMMU_PAGE_SHIFT)) {
-		dev_info(dev, "Warning: IOMMU window too big for device mask\n");
+		dev_info(dev, "Warning: IOMMU offset too big for device mask\n");
-		dev_info(dev, "mask: 0x%08llx, table end: 0x%08lx\n",
+		dev_info(dev, "mask: 0x%08llx, table offset: 0x%08lx\n",
-				mask, (tbl->it_offset + tbl->it_size) <<
+				mask, tbl->it_offset << IOMMU_PAGE_SHIFT);
-				IOMMU_PAGE_SHIFT);
 		return 0;
 	} else
 		return 1;

arch/powerpc/kernel/entry_64.S+17−6

 	li	r3,0
 	b	syscall_exit
+	.section	".toc","aw"
+DSCR_DEFAULT:
+	.tc dscr_default[TC],dscr_default
+	.section	".text"
 /*
  * This routine switches between two different tasks.  The process
  * state of one is saved on its kernel stack.  Then the state
 	mr	r1,r8		/* start using new stack pointer */
 	std	r7,PACAKSAVE(r13)
-	ld	r6,_CCR(r1)
-	mtcrf	0xFF,r6
 #ifdef CONFIG_ALTIVEC
 BEGIN_FTR_SECTION
 	ld	r0,THREAD_VRSAVE(r4)
 #endif /* CONFIG_ALTIVEC */
 #ifdef CONFIG_PPC64
 BEGIN_FTR_SECTION
+	lwz	r6,THREAD_DSCR_INHERIT(r4)
+	ld	r7,DSCR_DEFAULT@toc(2)
 	ld	r0,THREAD_DSCR(r4)
-	cmpd	r0,r25
+	cmpwi	r6,0
-	beq	1f
+	bne	1f
+	ld	r0,0(r7)
+1:	cmpd	r0,r25
+	beq	2f
 	mtspr	SPRN_DSCR,r0
-1:
+2:
 END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
 #endif
+	ld	r6,_CCR(r1)
+	mtcrf	0xFF,r6
 	/* r3-r13 are destroyed -- Cort */
 	REST_8GPRS(14, r1)
 	REST_10GPRS(22, r1)

arch/powerpc/kernel/exceptions-64s.S+2−1

 	KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
 	MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
-	MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
+	STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
 	STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
 	KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
 	STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
 	STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
+	STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
 	STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
 	STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
 	STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)

arch/powerpc/kernel/hw_breakpoint.c+1−1

@@ -253,7 +253,7 @@ int __kprobes hw_breakpoint_handler(struct die_args *args) · 252 unmodified lines
253		253
254	/* Do not emulate user-space instructions, instead single-step them */	254	/* Do not emulate user-space instructions, instead single-step them */
255	if (user_mode(regs)) {	255	if (user_mode(regs)) {
256	bp->ctx->task->thread.last_hit_ubp = bp;	256	current->thread.last_hit_ubp = bp;
257	regs->msr \|= MSR_SE;	257	regs->msr \|= MSR_SE;
258	goto out;	258	goto out;
259	}	259	}

arch/powerpc/kernel/idle_power7.S+2−0

 	lwz	r4,ADDROFF(powersave_nap)(r3)
 	cmpwi	0,r4,0
 	beqlr
+	/* fall through */
+_GLOBAL(power7_nap)
 	/* NAP is a state loss, we create a regs frame on the
 	 * stack, fill it up with the state we care about and
 	 * stick a pointer to it in PACAR1. We really only

arch/powerpc/kernel/kgdb.c+24−3

 #include <asm/processor.h>
 #include <asm/machdep.h>
 #include <asm/debug.h>
+#include <linux/slab.h>
 /*
  * This table contains the mapping between PowerPC hardware trap types, and
 	return SIGHUP;		/* default for things we don't know about */
 }
+/**
+ *
+ *	kgdb_skipexception - Bail out of KGDB when we've been triggered.
+ *	@exception: Exception vector number
+ *	@regs: Current &struct pt_regs.
+ *
+ *	On some architectures we need to skip a breakpoint exception when
+ *	it occurs after a breakpoint has been removed.
+ *
+ */
+int kgdb_skipexception(int exception, struct pt_regs *regs)
+{
+	return kgdb_isremovedbreak(regs->nip);
+}
 static int kgdb_call_nmi_hook(struct pt_regs *regs)
 {
 	kgdb_nmicallback(raw_smp_processor_id(), regs);
 static int kgdb_singlestep(struct pt_regs *regs)
 {
 	struct thread_info *thread_info, *exception_thread_info;
+	struct thread_info *backup_current_thread_info = \
+		(struct thread_info *)kmalloc(sizeof(struct thread_info), GFP_KERNEL);
 	if (user_mode(regs))
 		return 0;
 	thread_info = (struct thread_info *)(regs->gpr[1] & ~(THREAD_SIZE-1));
 	exception_thread_info = current_thread_info();
-	if (thread_info != exception_thread_info)
+	if (thread_info != exception_thread_info) {
+		/* Save the original current_thread_info. */
+		memcpy(backup_current_thread_info, exception_thread_info, sizeof *thread_info);
 		memcpy(exception_thread_info, thread_info, sizeof *thread_info);
+	}
 	kgdb_handle_exception(0, SIGTRAP, 0, regs);
 	if (thread_info != exception_thread_info)
-		memcpy(thread_info, exception_thread_info, sizeof *thread_info);
+		/* Restore current_thread_info lastly. */
+		memcpy(exception_thread_info, backup_current_thread_info, sizeof *thread_info);
 	return 1;
 }
 #else
 			linux_regs->msr |= MSR_SE;
 #endif
-			kgdb_single_step = 1;
 			atomic_set(&kgdb_cpu_doing_single_step,
 				   raw_smp_processor_id());
 		}

arch/powerpc/kernel/process.c+2−10

 #endif /* CONFIG_PPC_STD_MMU_64 */
 #ifdef CONFIG_PPC64
 	if (cpu_has_feature(CPU_FTR_DSCR)) {
-		if (current->thread.dscr_inherit) {
+		p->thread.dscr_inherit = current->thread.dscr_inherit;
-			p->thread.dscr_inherit = 1;
+		p->thread.dscr = current->thread.dscr;
-			p->thread.dscr = current->thread.dscr;
-		} else if (0 != dscr_default) {
-			p->thread.dscr_inherit = 1;
-			p->thread.dscr = dscr_default;
-		} else {
-			p->thread.dscr_inherit = 0;
-			p->thread.dscr = 0;
-		}
 	}
 #endif

arch/powerpc/kernel/smp.c+9−2

 	struct cpu_messages *info = &per_cpu(ipi_message, cpu);
 	char *message = (char *)&info->messages;
+	/*
+	 * Order previous accesses before accesses in the IPI handler.
+	 */
+	smp_mb();
 	message[msg] = 1;
-	mb();
+	/*
+	 * cause_ipi functions are required to include a full barrier
+	 * before doing whatever causes the IPI.
+	 */
 	smp_ops->cause_ipi(cpu, info->data);
 }
 	mb();	/* order any irq clear */
 	do {
-		all = xchg_local(&info->messages, 0);
+		all = xchg(&info->messages, 0);
 #ifdef __BIG_ENDIAN
 		if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION)))

arch/powerpc/kernel/syscalls.c+4−4

@@ -107,11 +107,11 @@ long ppc64_personality(unsigned long personality) · 106 unmodified lines
107	long ret;	107	long ret;
108		108
109	if (personality(current->personality) == PER_LINUX32	109	if (personality(current->personality) == PER_LINUX32
110	&& personality == PER_LINUX)	110	&& personality(personality) == PER_LINUX)
111	personality = PER_LINUX32;	111	personality = (personality & ~PER_MASK) \| PER_LINUX32;
112	ret = sys_personality(personality);	112	ret = sys_personality(personality);
113	if (ret == PER_LINUX32)	113	if (personality(ret) == PER_LINUX32)
114	ret = PER_LINUX;	114	ret = (ret & ~PER_MASK) \| PER_LINUX;
115	return ret;	115	return ret;
116	}	116	}
117	#endif	117	#endif

arch/powerpc/kernel/sysfs.c+10−0

 	return sprintf(buf, "%lx\n", dscr_default);
 }
+static void update_dscr(void *dummy)
+{
+	if (!current->thread.dscr_inherit) {
+		current->thread.dscr = dscr_default;
+		mtspr(SPRN_DSCR, dscr_default);
+	}
+}
 static ssize_t __used store_dscr_default(struct device *dev,
 		struct device_attribute *attr, const char *buf,
 		size_t count)
 		return -EINVAL;
 	dscr_default = val;
+	on_each_cpu(update_dscr, NULL, 1);
 	return count;
 }

arch/powerpc/kernel/time.c+9−0

@@ -535,6 +535,15 @@ void timer_interrupt(struct pt_regs * regs) · 534 unmodified lines
535	trace_timer_interrupt_exit(regs);	535	trace_timer_interrupt_exit(regs);
536	}	536	}
537		537
		538	/*
		539	* Hypervisor decrementer interrupts shouldn't occur but are sometimes
		540	* left pending on exit from a KVM guest. We don't need to do anything
		541	* to clear them, as they are edge-triggered.
		542	*/
		543	void hdec_interrupt(struct pt_regs *regs)
		544	{
		545	}
		546
538	#ifdef CONFIG_SUSPEND	547	#ifdef CONFIG_SUSPEND
539	static void generic_suspend_disable_irqs(void)	548	static void generic_suspend_disable_irqs(void)
540	{	549	{

arch/powerpc/kernel/traps.c+2−1

 			cpu_has_feature(CPU_FTR_DSCR)) {
 		PPC_WARN_EMULATED(mtdscr, regs);
 		rd = (instword >> 21) & 0x1f;
-		mtspr(SPRN_DSCR, regs->gpr[rd]);
+		current->thread.dscr = regs->gpr[rd];
 		current->thread.dscr_inherit = 1;
+		mtspr(SPRN_DSCR, current->thread.dscr);
 		return 0;
 	}
 #endif

arch/powerpc/kvm/book3s_32_mmu_host.c+3−0

@@ -211,6 +211,9 @@ next_pteg: · 210 unmodified lines
211	pteg1 \|= PP_RWRX;	211	pteg1 \|= PP_RWRX;
212	}	212	}
213		213
		214	if (orig_pte->may_execute)
		215	kvmppc_mmu_flush_icache(hpaddr >> PAGE_SHIFT);
		216
214	local_irq_disable();	217	local_irq_disable();
215		218
216	if (pteg[rr]) {	219	if (pteg[rr]) {

arch/powerpc/kvm/book3s_64_mmu_host.c+2−0

@@ -126,6 +126,8 @@ int kvmppc_mmu_map_page(struct kvm_vcpu vcpu, struct kvmppc_pte orig_pte) · 125 unmodified lines
126		126
127	if (!orig_pte->may_execute)	127	if (!orig_pte->may_execute)
128	rflags \|= HPTE_R_N;	128	rflags \|= HPTE_R_N;
		129	else
		130	kvmppc_mmu_flush_icache(hpaddr >> PAGE_SHIFT);
129		131
130	hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M);	132	hash = hpt_hash(va, PTE_SIZE, MMU_SEGSIZE_256M);
131		133

arch/powerpc/kvm/book3s_hv_rmhandlers.S+7−5

 	sync			/* order setting ceded vs. testing prodded */
 	lbz	r5,VCPU_PRODDED(r3)
 	cmpwi	r5,0
-	bne	1f
+	bne	kvm_cede_prodded
 	li	r0,0		/* set trap to 0 to say hcall is handled */
 	stw	r0,VCPU_TRAP(r3)
 	li	r0,H_SUCCESS
 	std	r0,VCPU_GPR(R3)(r3)
 BEGIN_FTR_SECTION
-	b	2f		/* just send it up to host on 970 */
+	b	kvm_cede_exit	/* just send it up to host on 970 */
 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
 	/*
 	or	r4,r4,r0
 	PPC_POPCNTW(R7,R4)
 	cmpw	r7,r8
-	bge	2f
+	bge	kvm_cede_exit
 	stwcx.	r4,0,r6
 	bne	31b
 	li	r0,1
 	b	hcall_real_fallback
 	/* cede when already previously prodded case */
-1:	li	r0,0
+kvm_cede_prodded:
+	li	r0,0
 	stb	r0,VCPU_PRODDED(r3)
 	sync			/* order testing prodded vs. clearing ceded */
 	stb	r0,VCPU_CEDED(r3)
 	blr
 	/* we've ceded but we want to give control to the host */
-2:	li	r3,H_TOO_HARD
+kvm_cede_exit:
+	li	r3,H_TOO_HARD
 	blr
 secondary_too_late:

arch/powerpc/kvm/e500_tlb.c+7−4

 static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
 {
 	if (vcpu_e500->g2h_tlb1_map)
-		memset(vcpu_e500->g2h_tlb1_map,
+		memset(vcpu_e500->g2h_tlb1_map, 0,
-		       sizeof(u64) * vcpu_e500->gtlb_params[1].entries, 0);
+		       sizeof(u64) * vcpu_e500->gtlb_params[1].entries);
 	if (vcpu_e500->h2g_tlb1_rmap)
-		memset(vcpu_e500->h2g_tlb1_rmap,
+		memset(vcpu_e500->h2g_tlb1_rmap, 0,
-		       sizeof(unsigned int) * host_tlb_params[1].entries, 0);
+		       sizeof(unsigned int) * host_tlb_params[1].entries);
 }
 static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
 	kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
 				ref, gvaddr, stlbe);
+	/* Clear i-cache for new pages */
+	kvmppc_mmu_flush_icache(pfn);
 }
 /* XXX only map the one-one case, for now use TLB0 */

arch/powerpc/lib/code-patching.c+1−1

@@ -20,7 +20,7 @@ int patch_instruction(unsigned int *addr, unsigned int instr) · 19 unmodified lines
20	{	20	{
21	int err;	21	int err;
22		22
23	err = __put_user(instr, addr);	23	__put_user_size(instr, addr, 4, err);
24	if (err)	24	if (err)
25	return err;	25	return err;
26	asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (addr));	26	asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (addr));

arch/powerpc/lib/copyuser_power7.S+2−33

@@ -288,7 +288,7 @@ err1; stb r0,0(r3) · 287 unmodified lines
288	std r0,16(r1)	288	std r0,16(r1)
289	stdu r1,-STACKFRAMESIZE(r1)	289	stdu r1,-STACKFRAMESIZE(r1)
290	bl .enter_vmx_usercopy	290	bl .enter_vmx_usercopy
291	cmpwi r3,0	291	cmpwi cr1,r3,0
292	ld r0,STACKFRAMESIZE+16(r1)	292	ld r0,STACKFRAMESIZE+16(r1)
293	ld r3,STACKFRAMESIZE+48(r1)	293	ld r3,STACKFRAMESIZE+48(r1)
294	ld r4,STACKFRAMESIZE+56(r1)	294	ld r4,STACKFRAMESIZE+56(r1)
@@ -326,38 +326,7 @@ err1; stb r0,0(r3) · 31 unmodified lines
326	dcbt r0,r8,0b01010 /* GO */	326	dcbt r0,r8,0b01010 /* GO */
327	.machine pop	327	.machine pop
328		328
329	/*	329	beq cr1,.Lunwind_stack_nonvmx_copy
330	* We prefetch both the source and destination using enhanced touch
331	* instructions. We use a stream ID of 0 for the load side and
332	* 1 for the store side.
333	*/
334	clrrdi r6,r4,7
335	clrrdi r9,r3,7
336	ori r9,r9,1 /* stream=1 */
337
338	srdi r7,r5,7 /* length in cachelines, capped at 0x3FF */
339	cmpldi cr1,r7,0x3FF
340	ble cr1,1f
341	li r7,0x3FF
342	1: lis r0,0x0E00 /* depth=7 */
343	sldi r7,r7,7
344	or r7,r7,r0
345	ori r10,r7,1 /* stream=1 */
346
347	lis r8,0x8000 /* GO=1 */
348	clrldi r8,r8,32
349
350	.machine push
351	.machine "power4"
352	dcbt r0,r6,0b01000
353	dcbt r0,r7,0b01010
354	dcbtst r0,r9,0b01000
355	dcbtst r0,r10,0b01010
356	eieio
357	dcbt r0,r8,0b01010 /* GO */
358	.machine pop
359
360	beq .Lunwind_stack_nonvmx_copy
361		330
362	/*	331	/*
363	* If source and destination are not relatively aligned we use a	332	* If source and destination are not relatively aligned we use a

arch/powerpc/lib/memcpy_power7.S+2−2

@@ -222,7 +222,7 @@ _GLOBAL(memcpy_power7) · 221 unmodified lines
222	std r0,16(r1)	222	std r0,16(r1)
223	stdu r1,-STACKFRAMESIZE(r1)	223	stdu r1,-STACKFRAMESIZE(r1)
224	bl .enter_vmx_copy	224	bl .enter_vmx_copy
225	cmpwi r3,0	225	cmpwi cr1,r3,0
226	ld r0,STACKFRAMESIZE+16(r1)	226	ld r0,STACKFRAMESIZE+16(r1)
227	ld r3,STACKFRAMESIZE+48(r1)	227	ld r3,STACKFRAMESIZE+48(r1)
228	ld r4,STACKFRAMESIZE+56(r1)	228	ld r4,STACKFRAMESIZE+56(r1)
@@ -260,7 +260,7 @@ _GLOBAL(memcpy_power7) · 31 unmodified lines
260	dcbt r0,r8,0b01010 /* GO */	260	dcbt r0,r8,0b01010 /* GO */
261	.machine pop	261	.machine pop
262		262
263	beq .Lunwind_stack_nonvmx_copy	263	beq cr1,.Lunwind_stack_nonvmx_copy
264		264
265	/*	265	/*
266	* If source and destination are not relatively aligned we use a	266	* If source and destination are not relatively aligned we use a

arch/powerpc/mm/mem.c+1−0

@@ -469,6 +469,7 @@ void flush_dcache_icache_page(struct page *page) · 468 unmodified lines
469	__flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);	469	__flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
470	#endif	470	#endif
471	}	471	}
		472	EXPORT_SYMBOL(flush_dcache_icache_page);
472		473
473	void clear_user_page(void page, unsigned long vaddr, struct page pg)	474	void clear_user_page(void page, unsigned long vaddr, struct page pg)
474	{	475	{

arch/powerpc/mm/numa.c+4−3

 /*
  * Update the node maps and sysfs entries for each cpu whose home node
- * has changed.
+ * has changed. Returns 1 when the topology has changed, and 0 otherwise.
  */
 int arch_update_cpu_topology(void)
 {
-	int cpu, nid, old_nid;
+	int cpu, nid, old_nid, changed = 0;
 	unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
 	struct device *dev;
 		dev = get_cpu_device(cpu);
 		if (dev)
 			kobject_uevent(&dev->kobj, KOBJ_CHANGE);
+		changed = 1;
 	}
-	return 1;
+	return changed;
 }
 static void topology_work_fn(struct work_struct *work)

arch/powerpc/perf/core-book3s.c+1−1

@@ -1431,7 +1431,7 @@ static void perf_event_interrupt(struct pt_regs *regs) · 1430 unmodified lines
1431	if (!event->hw.idx \|\| is_limited_pmc(event->hw.idx))	1431	if (!event->hw.idx \|\| is_limited_pmc(event->hw.idx))
1432	continue;	1432	continue;
1433	val = read_pmc(event->hw.idx);	1433	val = read_pmc(event->hw.idx);
1434	if ((int)val < 0) {	1434	if (pmc_overflow(val)) {
1435	/* event has overflowed */	1435	/* event has overflowed */
1436	found = 1;	1436	found = 1;
1437	record_and_restart(event, val, regs);	1437	record_and_restart(event, val, regs);

arch/powerpc/platforms/powernv/smp.c+1−9

 {
 	unsigned int cpu;
-	/* If powersave_nap is enabled, use NAP mode, else just
-	 * spin aimlessly
-	 */
-	if (!powersave_nap) {
-		generic_mach_cpu_die();
-		return;
-	}
 	/* Standard hot unplug procedure */
 	local_irq_disable();
 	idle_task_exit();
 	 */
 	mtspr(SPRN_LPCR, mfspr(SPRN_LPCR) & ~(u64)LPCR_PECE1);
 	while (!generic_check_cpu_restart(cpu)) {
-		power7_idle();
+		power7_nap();
 		if (!generic_check_cpu_restart(cpu)) {
 			DBG("CPU%d Unexpected exit while offline !\n", cpu);
 			/* We may be getting an IPI, so we re-enable

arch/powerpc/sysdev/fsl_pci.c+8−5

 			iounmap(hose->cfg_data);
 		iounmap(hose->cfg_addr);
 		pcibios_free_controller(hose);
-		return 0;
+		return -ENODEV;
 	}
 	setup_pci_cmd(hose);
 void __devinit fsl_pci_init(void)
 {
+	int ret;
 	struct device_node *node;
 	struct pci_controller *hose;
 	dma_addr_t max = 0xffffffff;
 			if (!fsl_pci_primary)
 				fsl_pci_primary = node;
-			fsl_add_bridge(node, fsl_pci_primary == node);
+			ret = fsl_add_bridge(node, fsl_pci_primary == node);
-			hose = pci_find_hose_for_OF_device(node);
+			if (ret == 0) {
-			max = min(max, hose->dma_window_base_cur +
+				hose = pci_find_hose_for_OF_device(node);
-					hose->dma_window_size);
+				max = min(max, hose->dma_window_base_cur +
+						hose->dma_window_size);
+			}
 		}
 	}

arch/powerpc/sysdev/mpic_msgr.c+3−0

 #include <linux/list.h>
 #include <linux/of_platform.h>
 #include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/export.h>
+#include <linux/slab.h>
 #include <asm/prom.h>
 #include <asm/hw_irq.h>
 #include <asm/ppc-pci.h>

arch/powerpc/sysdev/xics/icp-hv.c+5−1

 static inline void icp_hv_set_qirr(int n_cpu , u8 value)
 {
 	int hw_cpu = get_hard_smp_processor_id(n_cpu);
-	long rc = plpar_hcall_norets(H_IPI, hw_cpu, value);
+	long rc;
+	/* Make sure all previous accesses are ordered before IPI sending */
+	mb();
+	rc = plpar_hcall_norets(H_IPI, hw_cpu, value);
 	if (rc != H_SUCCESS) {
 		pr_err("%s: bad return code qirr cpu=%d hw_cpu=%d mfrr=0x%x "
 			"returned %ld\n", __func__, n_cpu, hw_cpu, value, rc);

arch/powerpc/xmon/xmon.c+34−50

@@ -17,6 +17,7 @@ · 16 unmodified lines
17	#include <linux/reboot.h>	17	#include <linux/reboot.h>
18	#include <linux/delay.h>	18	#include <linux/delay.h>
19	#include <linux/kallsyms.h>	19	#include <linux/kallsyms.h>
		20	#include <linux/kmsg_dump.h>
20	#include <linux/cpumask.h>	21	#include <linux/cpumask.h>
21	#include <linux/export.h>	22	#include <linux/export.h>
22	#include <linux/sysrq.h>	23	#include <linux/sysrq.h>
@@ -894,13 +895,13 @@ cmds(struct pt_regs *excp) · 871 unmodified lines
894	#endif	895	#endif
895	default:	896	default:
896	printf("Unrecognized command: ");	897	printf("Unrecognized command: ");
897	do {	898	do {
898	if (' ' < cmd && cmd <= '~')	899	if (' ' < cmd && cmd <= '~')
899	putchar(cmd);	900	putchar(cmd);
900	else	901	else
901	printf("\\x%x", cmd);	902	printf("\\x%x", cmd);
902	cmd = inchar();	903	cmd = inchar();
903	} while (cmd != '\n');	904	} while (cmd != '\n');
904	printf(" (type ? for help)\n");	905	printf(" (type ? for help)\n");
905	break;	906	break;
906	}	907	}
@@ -1097,7 +1098,7 @@ static long check_bp_loc(unsigned long addr) · 190 unmodified lines
1097	return 1;	1098	return 1;
1098	}	1099	}
1099		1100
1100	static char *breakpoint_help_string =	1101	static char *breakpoint_help_string =
1101	"Breakpoint command usage:\n"	1102	"Breakpoint command usage:\n"
1102	"b show breakpoints\n"	1103	"b show breakpoints\n"
1103	"b <addr> [cnt] set breakpoint at given instr addr\n"	1104	"b <addr> [cnt] set breakpoint at given instr addr\n"
@@ -1193,7 +1194,7 @@ bpt_cmds(void) · 89 unmodified lines
1193		1194
1194	default:	1195	default:
1195	termch = cmd;	1196	termch = cmd;
1196	cmd = skipbl();	1197	cmd = skipbl();
1197	if (cmd == '?') {	1198	if (cmd == '?') {
1198	printf(breakpoint_help_string);	1199	printf(breakpoint_help_string);
1199	break;	1200	break;
@@ -1359,7 +1360,7 @@ static void xmon_show_stack(unsigned long sp, unsigned long lr, · 159 unmodified lines
1359	sp + REGS_OFFSET);	1360	sp + REGS_OFFSET);
1360	break;	1361	break;
1361	}	1362	}
1362	printf("--- Exception: %lx %s at ", regs.trap,	1363	printf("--- Exception: %lx %s at ", regs.trap,
1363	getvecname(TRAP(&regs)));	1364	getvecname(TRAP(&regs)));
1364	pc = regs.nip;	1365	pc = regs.nip;
1365	lr = regs.link;	1366	lr = regs.link;
@@ -1623,14 +1624,14 @@ static void super_regs(void) · 257 unmodified lines
1623		1624
1624	cmd = skipbl();	1625	cmd = skipbl();
1625	if (cmd == '\n') {	1626	if (cmd == '\n') {
1626	unsigned long sp, toc;	1627	unsigned long sp, toc;
1627	asm("mr %0,1" : "=r" (sp) :);	1628	asm("mr %0,1" : "=r" (sp) :);
1628	asm("mr %0,2" : "=r" (toc) :);	1629	asm("mr %0,2" : "=r" (toc) :);
1629		1630
1630	printf("msr = "REG" sprg0= "REG"\n",	1631	printf("msr = "REG" sprg0= "REG"\n",
1631	mfmsr(), mfspr(SPRN_SPRG0));	1632	mfmsr(), mfspr(SPRN_SPRG0));
1632	printf("pvr = "REG" sprg1= "REG"\n",	1633	printf("pvr = "REG" sprg1= "REG"\n",
1633	mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));	1634	mfspr(SPRN_PVR), mfspr(SPRN_SPRG1));
1634	printf("dec = "REG" sprg2= "REG"\n",	1635	printf("dec = "REG" sprg2= "REG"\n",
1635	mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));	1636	mfspr(SPRN_DEC), mfspr(SPRN_SPRG2));
1636	printf("sp = "REG" sprg3= "REG"\n", sp, mfspr(SPRN_SPRG3));	1637	printf("sp = "REG" sprg3= "REG"\n", sp, mfspr(SPRN_SPRG3));
@@ -1783,7 +1784,7 @@ byterev(unsigned char *val, int size) · 146 unmodified lines
1783	static int brev;	1784	static int brev;
1784	static int mnoread;	1785	static int mnoread;
1785		1786
1786	static char *memex_help_string =	1787	static char *memex_help_string =
1787	"Memory examine command usage:\n"	1788	"Memory examine command usage:\n"
1788	"m [addr] [flags] examine/change memory\n"	1789	"m [addr] [flags] examine/change memory\n"
1789	" addr is optional. will start where left off.\n"	1790	" addr is optional. will start where left off.\n"
@@ -1798,7 +1799,7 @@ static char *memex_help_string = · 8 unmodified lines
1798	"NOTE: flags are saved as defaults\n"	1799	"NOTE: flags are saved as defaults\n"
1799	"";	1800	"";
1800		1801
1801	static char *memex_subcmd_help_string =	1802	static char *memex_subcmd_help_string =
1802	"Memory examine subcommands:\n"	1803	"Memory examine subcommands:\n"
1803	" hexval write this val to current location\n"	1804	" hexval write this val to current location\n"
1804	" 'string' write chars from string to this location\n"	1805	" 'string' write chars from string to this location\n"
@@ -2064,7 +2065,7 @@ prdump(unsigned long adrs, long ndump) · 259 unmodified lines
2064	nr = mread(adrs, temp, r);	2065	nr = mread(adrs, temp, r);
2065	adrs += nr;	2066	adrs += nr;
2066	for (m = 0; m < r; ++m) {	2067	for (m = 0; m < r; ++m) {
2067	if ((m & (sizeof(long) - 1)) == 0 && m > 0)	2068	if ((m & (sizeof(long) - 1)) == 0 && m > 0)
2068	putchar(' ');	2069	putchar(' ');
2069	if (m < nr)	2070	if (m < nr)
2070	printf("%.2x", temp[m]);	2071	printf("%.2x", temp[m]);
@@ -2072,7 +2073,7 @@ prdump(unsigned long adrs, long ndump) · 1 unmodified line
2072	printf("%s", fault_chars[fault_type]);	2073	printf("%s", fault_chars[fault_type]);
2073	}	2074	}
2074	for (; m < 16; ++m) {	2075	for (; m < 16; ++m) {
2075	if ((m & (sizeof(long) - 1)) == 0)	2076	if ((m & (sizeof(long) - 1)) == 0)
2076	putchar(' ');	2077	putchar(' ');
2077	printf(" ");	2078	printf(" ");
2078	}	2079	}
@@ -2148,45 +2149,28 @@ print_address(unsigned long addr) · 69 unmodified lines
2148	void	2149	void
2149	dump_log_buf(void)	2150	dump_log_buf(void)
2150	{	2151	{
2151	const unsigned long size = 128;	2152	struct kmsg_dumper dumper = { .active = 1 };
2152	unsigned long end, addr;	2153	unsigned char buf[128];
2153	unsigned char buf[size + 1];	2154	size_t len;
2154		2155
2155	addr = 0;	2156	if (setjmp(bus_error_jmp) != 0) {
2156	buf[size] = '\0';	2157	printf("Error dumping printk buffer!\n");
2157		2158	return;
2158	if (setjmp(bus_error_jmp) != 0) {	2159	}
2159	printf("Unable to lookup symbol __log_buf!\n");	2160
2160	return;	2161	catch_memory_errors = 1;
2161	}	2162	sync();
2162		2163
2163	catch_memory_errors = 1;	2164	kmsg_dump_rewind_nolock(&dumper);
2164	sync();	2165	while (kmsg_dump_get_line_nolock(&dumper, false, buf, sizeof(buf), &len)) {
2165	addr = kallsyms_lookup_name("__log_buf");	2166	buf[len] = '\0';
2166		2167	printf("%s", buf);
2167	if (! addr)	2168	}
2168	printf("Symbol __log_buf not found!\n");	2169
2169	else {	2170	sync();
2170	end = addr + (1 << CONFIG_LOG_BUF_SHIFT);	2171	/* wait a little while to see if we get a machine check */
2171	while (addr < end) {	2172	__delay(200);
2172	if (! mread(addr, buf, size)) {	2173	catch_memory_errors = 0;
2173	printf("Can't read memory at address 0x%lx\n", addr);
2174	break;
2175	}
2176
2177	printf("%s", buf);
2178
2179	if (strlen(buf) < size)
2180	break;
2181
2182	addr += size;
2183	}
2184	}
2185
2186	sync();
2187	/* wait a little while to see if we get a machine check */
2188	__delay(200);
2189	catch_memory_errors = 0;
2190	}	2174	}
2191		2175
2192	/*	2176	/*

arch/s390/include/asm/elf.h+2−1

@@ -180,7 +180,8 @@ extern char elf_platform[]; · 179 unmodified lines
180	#define ELF_PLATFORM (elf_platform)	180	#define ELF_PLATFORM (elf_platform)
181		181
182	#ifndef CONFIG_64BIT	182	#ifndef CONFIG_64BIT
183	#define SET_PERSONALITY(ex) set_personality(PER_LINUX)	183	#define SET_PERSONALITY(ex) \
		184	set_personality(PER_LINUX \| (current->personality & (~PER_MASK)))
184	#else /* CONFIG_64BIT */	185	#else /* CONFIG_64BIT */
185	#define SET_PERSONALITY(ex) \	186	#define SET_PERSONALITY(ex) \
186	do { \	187	do { \

arch/s390/include/asm/posix_types.h+1−2

  */
 typedef unsigned long   __kernel_size_t;
+typedef long            __kernel_ssize_t;
 #define __kernel_size_t __kernel_size_t
 typedef unsigned short	__kernel_old_dev_t;
 typedef unsigned short  __kernel_ipc_pid_t;
 typedef unsigned short  __kernel_uid_t;
 typedef unsigned short  __kernel_gid_t;
-typedef int             __kernel_ssize_t;
 typedef int             __kernel_ptrdiff_t;
 #else /* __s390x__ */
 typedef int             __kernel_ipc_pid_t;
 typedef unsigned int    __kernel_uid_t;
 typedef unsigned int    __kernel_gid_t;
-typedef long            __kernel_ssize_t;
 typedef long            __kernel_ptrdiff_t;
 typedef unsigned long   __kernel_sigset_t;      /* at least 32 bits */

arch/s390/include/asm/smp.h+1−0

@@ -44,6 +44,7 @@ static inline void smp_call_online_cpu(void (func)(void ), void *data) · 43 unmodified lines
44	}	44	}
45		45
46	static inline int smp_find_processor_id(int address) { return 0; }	46	static inline int smp_find_processor_id(int address) { return 0; }
		47	static inline int smp_store_status(int cpu) { return 0; }
47	static inline int smp_vcpu_scheduled(int cpu) { return 1; }	48	static inline int smp_vcpu_scheduled(int cpu) { return 1; }
48	static inline void smp_yield_cpu(int cpu) { }	49	static inline void smp_yield_cpu(int cpu) { }
49	static inline void smp_yield(void) { }	50	static inline void smp_yield(void) { }

arch/um/os-Linux/time.c+1−1

@@ -114,7 +114,7 @@ static void deliver_alarm(void) · 113 unmodified lines
114	skew += this_tick - last_tick;	114	skew += this_tick - last_tick;
115		115
116	while (skew >= one_tick) {	116	while (skew >= one_tick) {
117	alarm_handler(SIGVTALRM, NULL);	117	alarm_handler(SIGVTALRM, NULL, NULL);
118	skew -= one_tick;	118	skew -= one_tick;
119	}	119	}
120		120

arch/x86/include/asm/spinlock.h+1−2

  * Simple spin lock operations.  There are two variants, one clears IRQ's
  * on the local processor, one does not.
  *
- * These are fair FIFO ticket locks, which are currently limited to 256
+ * These are fair FIFO ticket locks, which support up to 2^16 CPUs.
- * CPUs.
  *
  * (the type definitions are in asm/spinlock_types.h)
  */

arch/x86/kernel/alternative.c+1−1

@@ -165,7 +165,7 @@ static const unsigned char * const k7_nops[ASM_NOP_MAX+2] = · 164 unmodified lines
165	#endif	165	#endif
166		166
167	#ifdef P6_NOP1	167	#ifdef P6_NOP1
168	static const unsigned char __initconst_or_module p6nops[] =	168	static const unsigned char p6nops[] =
169	{	169	{
170	P6_NOP1,	170	P6_NOP1,
171	P6_NOP2,	171	P6_NOP2,

arch/x86/kernel/irq.c+1−1

@@ -270,7 +270,7 @@ void fixup_irqs(void) · 269 unmodified lines
270		270
271	if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {	271	if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
272	break_affinity = 1;	272	break_affinity = 1;
273	affinity = cpu_all_mask;	273	affinity = cpu_online_mask;
274	}	274	}
275		275
276	chip = irq_data_get_irq_chip(data);	276	chip = irq_data_get_irq_chip(data);

arch/x86/kernel/microcode_amd.c+4−3

 				  unsigned int *current_size)
 {
 	struct microcode_header_amd *mc_hdr;
-	unsigned int actual_size;
+	unsigned int actual_size, patch_size;
 	u16 equiv_cpu_id;
 	/* size of the current patch we're staring at */
-	*current_size = *(u32 *)(ucode_ptr + 4) + SECTION_HDR_SIZE;
+	patch_size = *(u32 *)(ucode_ptr + 4);
+	*current_size = patch_size + SECTION_HDR_SIZE;
 	equiv_cpu_id = find_equiv_id();
 	if (!equiv_cpu_id)
 	/*
 	 * now that the header looks sane, verify its size
 	 */
-	actual_size = verify_ucode_size(cpu, *current_size, leftover_size);
+	actual_size = verify_ucode_size(cpu, patch_size, leftover_size);
 	if (!actual_size)
 		return 0;

arch/x86/kvm/emulate.c+21−9

 	return address_mask(ctxt, reg);
 }
+static void masked_increment(ulong *reg, ulong mask, int inc)
+{
+	assign_masked(reg, *reg + inc, mask);
+}
 static inline void
 register_address_increment(struct x86_emulate_ctxt *ctxt, unsigned long *reg, int inc)
 {
+	ulong mask;
 	if (ctxt->ad_bytes == sizeof(unsigned long))
-		*reg += inc;
+		mask = ~0UL;
 	else
-		*reg = (*reg & ~ad_mask(ctxt)) | ((*reg + inc) & ad_mask(ctxt));
+		mask = ad_mask(ctxt);
+	masked_increment(reg, mask, inc);
+}
+static void rsp_increment(struct x86_emulate_ctxt *ctxt, int inc)
+{
+	masked_increment(&ctxt->regs[VCPU_REGS_RSP], stack_mask(ctxt), inc);
 }
 static inline void jmp_rel(struct x86_emulate_ctxt *ctxt, int rel)
 {
 	struct segmented_address addr;
-	register_address_increment(ctxt, &ctxt->regs[VCPU_REGS_RSP], -bytes);
+	rsp_increment(ctxt, -bytes);
-	addr.ea = register_address(ctxt, ctxt->regs[VCPU_REGS_RSP]);
+	addr.ea = ctxt->regs[VCPU_REGS_RSP] & stack_mask(ctxt);
 	addr.seg = VCPU_SREG_SS;
 	return segmented_write(ctxt, addr, data, bytes);
 	int rc;
 	struct segmented_address addr;
-	addr.ea = register_address(ctxt, ctxt->regs[VCPU_REGS_RSP]);
+	addr.ea = ctxt->regs[VCPU_REGS_RSP] & stack_mask(ctxt);
 	addr.seg = VCPU_SREG_SS;
 	rc = segmented_read(ctxt, addr, dest, len);
 	if (rc != X86EMUL_CONTINUE)
 		return rc;
-	register_address_increment(ctxt, &ctxt->regs[VCPU_REGS_RSP], len);
+	rsp_increment(ctxt, len);
 	return rc;
 }
 	while (reg >= VCPU_REGS_RAX) {
 		if (reg == VCPU_REGS_RSP) {
-			register_address_increment(ctxt, &ctxt->regs[VCPU_REGS_RSP],
+			rsp_increment(ctxt, ctxt->op_bytes);
-							ctxt->op_bytes);
 			--reg;
 		}
 	rc = emulate_pop(ctxt, &ctxt->dst.val, ctxt->op_bytes);
 	if (rc != X86EMUL_CONTINUE)
 		return rc;
-	register_address_increment(ctxt, &ctxt->regs[VCPU_REGS_RSP], ctxt->src.val);
+	rsp_increment(ctxt, ctxt->src.val);
 	return X86EMUL_CONTINUE;
 }

arch/x86/kvm/mmu.c+9−4

 		int idx;
 		LIST_HEAD(invalid_list);
+		/*
+		 * Never scan more than sc->nr_to_scan VM instances.
+		 * Will not hit this condition practically since we do not try
+		 * to shrink more than one VM and it is very unlikely to see
+		 * !n_used_mmu_pages so many times.
+		 */
+		if (!nr_to_scan--)
+			break;
 		/*
 		 * n_used_mmu_pages is accessed without holding kvm->mmu_lock
 		 * here. We may skip a VM instance errorneosly, but we do not
 		 * want to shrink a VM that only started to populate its MMU
 		 * anyway.
 		 */
-		if (kvm->arch.n_used_mmu_pages > 0) {
+		if (!kvm->arch.n_used_mmu_pages)
-			if (!nr_to_scan--)
-				break;
 			continue;
-		}
 		idx = srcu_read_lock(&kvm->srcu);
 		spin_lock(&kvm->mmu_lock);

arch/x86/kvm/x86.c+4−1

  * kvm-specific. Those are put in the beginning of the list.
  */
-#define KVM_SAVE_MSRS_BEGIN	9
+#define KVM_SAVE_MSRS_BEGIN	10
 static u32 msrs_to_save[] = {
 	MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 	MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 	case MSR_KVM_STEAL_TIME:
 		data = vcpu->arch.st.msr_val;
 		break;
+	case MSR_KVM_PV_EOI_EN:
+		data = vcpu->arch.pv_eoi.msr_val;
+		break;
 	case MSR_IA32_P5_MC_ADDR:
 	case MSR_IA32_P5_MC_TYPE:
 	case MSR_IA32_MCG_CAP:

arch/x86/xen/enlighten.c+11−107

@@ -31,7 +31,6 @@ · 30 unmodified lines
31	#include <linux/pci.h>	31	#include <linux/pci.h>
32	#include <linux/gfp.h>	32	#include <linux/gfp.h>
33	#include <linux/memblock.h>	33	#include <linux/memblock.h>
34	#include <linux/syscore_ops.h>
35		34
36	#include <xen/xen.h>	35	#include <xen/xen.h>
37	#include <xen/interface/xen.h>	36	#include <xen/interface/xen.h>
@@ -1470,130 +1469,38 @@ asmlinkage void __init xen_start_kernel(void) · 1432 unmodified lines
1470	#endif	1469	#endif
1471	}	1470	}
1472		1471
1473	#ifdef CONFIG_XEN_PVHVM	1472	void __ref xen_hvm_init_shared_info(void)
1474	/*
1475	* The pfn containing the shared_info is located somewhere in RAM. This
1476	* will cause trouble if the current kernel is doing a kexec boot into a
1477	* new kernel. The new kernel (and its startup code) can not know where
1478	* the pfn is, so it can not reserve the page. The hypervisor will
1479	* continue to update the pfn, and as a result memory corruption occours
1480	* in the new kernel.
1481	*
1482	* One way to work around this issue is to allocate a page in the
1483	* xen-platform pci device's BAR memory range. But pci init is done very
1484	* late and the shared_info page is already in use very early to read
1485	* the pvclock. So moving the pfn from RAM to MMIO is racy because some
1486	* code paths on other vcpus could access the pfn during the small
1487	* window when the old pfn is moved to the new pfn. There is even a
1488	* small window were the old pfn is not backed by a mfn, and during that
1489	* time all reads return -1.
1490	*
1491	* Because it is not known upfront where the MMIO region is located it
1492	* can not be used right from the start in xen_hvm_init_shared_info.
1493	*
1494	* To minimise trouble the move of the pfn is done shortly before kexec.
1495	* This does not eliminate the race because all vcpus are still online
1496	* when the syscore_ops will be called. But hopefully there is no work
1497	* pending at this point in time. Also the syscore_op is run last which
1498	* reduces the risk further.
1499	*/
1500
1501	static struct shared_info *xen_hvm_shared_info;
1502
1503	static void xen_hvm_connect_shared_info(unsigned long pfn)
1504	{	1473	{
		1474	int cpu;
1505	struct xen_add_to_physmap xatp;	1475	struct xen_add_to_physmap xatp;
		1476	static struct shared_info *shared_info_page = 0;
1506		1477
		1478	if (!shared_info_page)
		1479	shared_info_page = (struct shared_info *)
		1480	extend_brk(PAGE_SIZE, PAGE_SIZE);
1507	xatp.domid = DOMID_SELF;	1481	xatp.domid = DOMID_SELF;
1508	xatp.idx = 0;	1482	xatp.idx = 0;
1509	xatp.space = XENMAPSPACE_shared_info;	1483	xatp.space = XENMAPSPACE_shared_info;
1510	xatp.gpfn = pfn;	1484	xatp.gpfn = __pa(shared_info_page) >> PAGE_SHIFT;
1511	if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))	1485	if (HYPERVISOR_memory_op(XENMEM_add_to_physmap, &xatp))
1512	BUG();	1486	BUG();
1513		1487
1514	}	1488	HYPERVISOR_shared_info = (struct shared_info *)shared_info_page;
1515	static void xen_hvm_set_shared_info(struct shared_info *sip)
1516	{
1517	int cpu;
1518
1519	HYPERVISOR_shared_info = sip;
1520		1489
1521	/* xen_vcpu is a pointer to the vcpu_info struct in the shared_info	1490	/* xen_vcpu is a pointer to the vcpu_info struct in the shared_info
1522	* page, we use it in the event channel upcall and in some pvclock	1491	* page, we use it in the event channel upcall and in some pvclock
1523	* related functions. We don't need the vcpu_info placement	1492	* related functions. We don't need the vcpu_info placement
1524	* optimizations because we don't use any pv_mmu or pv_irq op on	1493	* optimizations because we don't use any pv_mmu or pv_irq op on
1525	* HVM.	1494	* HVM.
1526	* When xen_hvm_set_shared_info is run at boot time only vcpu 0 is	1495	* When xen_hvm_init_shared_info is run at boot time only vcpu 0 is
1527	* online but xen_hvm_set_shared_info is run at resume time too and	1496	* online but xen_hvm_init_shared_info is run at resume time too and
1528	* in that case multiple vcpus might be online. */	1497	* in that case multiple vcpus might be online. */
1529	for_each_online_cpu(cpu) {	1498	for_each_online_cpu(cpu) {
1530	per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];	1499	per_cpu(xen_vcpu, cpu) = &HYPERVISOR_shared_info->vcpu_info[cpu];
1531	}	1500	}
1532	}	1501	}
1533		1502
1534	/* Reconnect the shared_info pfn to a mfn */	1503	#ifdef CONFIG_XEN_PVHVM
1535	void xen_hvm_resume_shared_info(void)
1536	{
1537	xen_hvm_connect_shared_info(__pa(xen_hvm_shared_info) >> PAGE_SHIFT);
1538	}
1539
1540	#ifdef CONFIG_KEXEC
1541	static struct shared_info *xen_hvm_shared_info_kexec;
1542	static unsigned long xen_hvm_shared_info_pfn_kexec;
1543
1544	/* Remember a pfn in MMIO space for kexec reboot */
1545	void __devinit xen_hvm_prepare_kexec(struct shared_info *sip, unsigned long pfn)
1546	{
1547	xen_hvm_shared_info_kexec = sip;
1548	xen_hvm_shared_info_pfn_kexec = pfn;
1549	}
1550
1551	static void xen_hvm_syscore_shutdown(void)
1552	{
1553	struct xen_memory_reservation reservation = {
1554	.domid = DOMID_SELF,
1555	.nr_extents = 1,
1556	};
1557	unsigned long prev_pfn;
1558	int rc;
1559
1560	if (!xen_hvm_shared_info_kexec)
1561	return;
1562
1563	prev_pfn = __pa(xen_hvm_shared_info) >> PAGE_SHIFT;
1564	set_xen_guest_handle(reservation.extent_start, &prev_pfn);
1565
1566	/* Move pfn to MMIO, disconnects previous pfn from mfn */
1567	xen_hvm_connect_shared_info(xen_hvm_shared_info_pfn_kexec);
1568
1569	/* Update pointers, following hypercall is also a memory barrier */
1570	xen_hvm_set_shared_info(xen_hvm_shared_info_kexec);
1571
1572	/* Allocate new mfn for previous pfn */
1573	do {
1574	rc = HYPERVISOR_memory_op(XENMEM_populate_physmap, &reservation);
1575	if (rc == 0)
1576	msleep(123);
1577	} while (rc == 0);
1578
1579	/* Make sure the previous pfn is really connected to a (new) mfn */
1580	BUG_ON(rc != 1);
1581	}
1582
1583	static struct syscore_ops xen_hvm_syscore_ops = {
1584	.shutdown = xen_hvm_syscore_shutdown,
1585	};
1586	#endif
1587
1588	/* Use a pfn in RAM, may move to MMIO before kexec. */
1589	static void __init xen_hvm_init_shared_info(void)
1590	{
1591	/* Remember pointer for resume */
1592	xen_hvm_shared_info = extend_brk(PAGE_SIZE, PAGE_SIZE);
1593	xen_hvm_connect_shared_info(__pa(xen_hvm_shared_info) >> PAGE_SHIFT);
1594	xen_hvm_set_shared_info(xen_hvm_shared_info);
1595	}
1596
1597	static void __init init_hvm_pv_info(void)	1504	static void __init init_hvm_pv_info(void)
1598	{	1505	{
1599	int major, minor;	1506	int major, minor;
@@ -1644,9 +1551,6 @@ static void __init xen_hvm_guest_init(void) · 44 unmodified lines
1644	init_hvm_pv_info();	1551	init_hvm_pv_info();
1645		1552
1646	xen_hvm_init_shared_info();	1553	xen_hvm_init_shared_info();
1647	#ifdef CONFIG_KEXEC
1648	register_syscore_ops(&xen_hvm_syscore_ops);
1649	#endif
1650		1554
1651	if (xen_feature(XENFEAT_hvm_callback_vector))	1555	if (xen_feature(XENFEAT_hvm_callback_vector))
1652	xen_have_vector_callback = 1;	1556	xen_have_vector_callback = 1;

arch/x86/xen/mmu.c+1−1

@@ -1283,7 +1283,7 @@ static void xen_flush_tlb_others(const struct cpumask *cpus, · 1282 unmodified lines
1283	cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));	1283	cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1284		1284
1285	args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;	1285	args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1286	if (start != TLB_FLUSH_ALL && (end - start) <= PAGE_SIZE) {	1286	if (end != TLB_FLUSH_ALL && (end - start) <= PAGE_SIZE) {
1287	args->op.cmd = MMUEXT_INVLPG_MULTI;	1287	args->op.cmd = MMUEXT_INVLPG_MULTI;
1288	args->op.arg1.linear_addr = start;	1288	args->op.arg1.linear_addr = start;
1289	}	1289	}

arch/x86/xen/p2m.c+92−3

@@ -196,9 +196,11 @@ RESERVE_BRK(p2m_mid_identity, PAGE_SIZE * 2 * 3); · 195 unmodified lines
196		196
197	/* When we populate back during bootup, the amount of pages can vary. The	197	/* When we populate back during bootup, the amount of pages can vary. The
198	* max we have is seen is 395979, but that does not mean it can't be more.	198	* max we have is seen is 395979, but that does not mean it can't be more.
199	* But some machines can have 3GB I/O holes even. So lets reserve enough	199	* Some machines can have 3GB I/O holes even. With early_can_reuse_p2m_middle
200	* for 4GB of I/O and E820 holes. */	200	* it can re-use Xen provided mfn_list array, so we only need to allocate at
201	RESERVE_BRK(p2m_populated, PMD_SIZE * 4);	201	* most three P2M top nodes. */
		202	RESERVE_BRK(p2m_populated, PAGE_SIZE * 3);
		203
202	static inline unsigned p2m_top_index(unsigned long pfn)	204	static inline unsigned p2m_top_index(unsigned long pfn)
203	{	205	{
204	BUG_ON(pfn >= MAX_P2M_PFN);	206	BUG_ON(pfn >= MAX_P2M_PFN);
@@ -575,12 +577,99 @@ static bool __init early_alloc_p2m(unsigned long pfn) · 370 unmodified lines
575	}	577	}
576	return true;	578	return true;
577	}	579	}
		580
		581	/*
		582	* Skim over the P2M tree looking at pages that are either filled with
		583	* INVALID_P2M_ENTRY or with 1:1 PFNs. If found, re-use that page and
		584	* replace the P2M leaf with a p2m_missing or p2m_identity.
		585	* Stick the old page in the new P2M tree location.
		586	*/
		587	bool __init early_can_reuse_p2m_middle(unsigned long set_pfn, unsigned long set_mfn)
		588	{
		589	unsigned topidx;
		590	unsigned mididx;
		591	unsigned ident_pfns;
		592	unsigned inv_pfns;
		593	unsigned long *p2m;
		594	unsigned long *mid_mfn_p;
		595	unsigned idx;
		596	unsigned long pfn;
		597
		598	/* We only look when this entails a P2M middle layer */
		599	if (p2m_index(set_pfn))
		600	return false;
		601
		602	for (pfn = 0; pfn < MAX_DOMAIN_PAGES; pfn += P2M_PER_PAGE) {
		603	topidx = p2m_top_index(pfn);
		604
		605	if (!p2m_top[topidx])
		606	continue;
		607
		608	if (p2m_top[topidx] == p2m_mid_missing)
		609	continue;
		610
		611	mididx = p2m_mid_index(pfn);
		612	p2m = p2m_top[topidx][mididx];
		613	if (!p2m)
		614	continue;
		615
		616	if ((p2m == p2m_missing) \|\| (p2m == p2m_identity))
		617	continue;
		618
		619	if ((unsigned long)p2m == INVALID_P2M_ENTRY)
		620	continue;
		621
		622	ident_pfns = 0;
		623	inv_pfns = 0;
		624	for (idx = 0; idx < P2M_PER_PAGE; idx++) {
		625	/* IDENTITY_PFNs are 1:1 */
		626	if (p2m[idx] == IDENTITY_FRAME(pfn + idx))
		627	ident_pfns++;
		628	else if (p2m[idx] == INVALID_P2M_ENTRY)
		629	inv_pfns++;
		630	else
		631	break;
		632	}
		633	if ((ident_pfns == P2M_PER_PAGE) \|\| (inv_pfns == P2M_PER_PAGE))
		634	goto found;
		635	}
		636	return false;
		637	found:
		638	/* Found one, replace old with p2m_identity or p2m_missing */
		639	p2m_top[topidx][mididx] = (ident_pfns ? p2m_identity : p2m_missing);
		640	/* And the other for save/restore.. */
		641	mid_mfn_p = p2m_top_mfn_p[topidx];
		642	/* NOTE: Even if it is a p2m_identity it should still be point to
		643	* a page filled with INVALID_P2M_ENTRY entries. */
		644	mid_mfn_p[mididx] = virt_to_mfn(p2m_missing);
		645
		646	/* Reset where we want to stick the old page in. */
		647	topidx = p2m_top_index(set_pfn);
		648	mididx = p2m_mid_index(set_pfn);
		649
		650	/* This shouldn't happen */
		651	if (WARN_ON(p2m_top[topidx] == p2m_mid_missing))
		652	early_alloc_p2m(set_pfn);
		653
		654	if (WARN_ON(p2m_top[topidx][mididx] != p2m_missing))
		655	return false;
		656
		657	p2m_init(p2m);
		658	p2m_top[topidx][mididx] = p2m;
		659	mid_mfn_p = p2m_top_mfn_p[topidx];
		660	mid_mfn_p[mididx] = virt_to_mfn(p2m);
		661
		662	return true;
		663	}
578	bool __init early_set_phys_to_machine(unsigned long pfn, unsigned long mfn)	664	bool __init early_set_phys_to_machine(unsigned long pfn, unsigned long mfn)
579	{	665	{
580	if (unlikely(!__set_phys_to_machine(pfn, mfn))) {	666	if (unlikely(!__set_phys_to_machine(pfn, mfn))) {
581	if (!early_alloc_p2m(pfn))	667	if (!early_alloc_p2m(pfn))
582	return false;	668	return false;
583		669
		670	if (early_can_reuse_p2m_middle(pfn, mfn))
		671	return __set_phys_to_machine(pfn, mfn);
		672
584	if (!early_alloc_p2m_middle(pfn, false /* boundary crossover OK!*/))	673	if (!early_alloc_p2m_middle(pfn, false /* boundary crossover OK!*/))
585	return false;	674	return false;
586		675

arch/x86/xen/setup.c+8−1

 	memblock_reserve(start, size);
 	xen_max_p2m_pfn = PFN_DOWN(start + size);
+	for (pfn = PFN_DOWN(start); pfn < xen_max_p2m_pfn; pfn++) {
+		unsigned long mfn = pfn_to_mfn(pfn);
+		if (WARN(mfn == pfn, "Trying to over-write 1-1 mapping (pfn: %lx)\n", pfn))
+			continue;
+		WARN(mfn != INVALID_P2M_ENTRY, "Trying to remove %lx which has %lx mfn!\n",
+			pfn, mfn);
-	for (pfn = PFN_DOWN(start); pfn <= xen_max_p2m_pfn; pfn++)
 		__set_phys_to_machine(pfn, INVALID_P2M_ENTRY);
+	}
 }
 static unsigned long __init xen_do_chunk(unsigned long start,

arch/x86/xen/suspend.c+1−1

@@ -30,7 +30,7 @@ void xen_arch_hvm_post_suspend(int suspend_cancelled) · 29 unmodified lines
30	{	30	{
31	#ifdef CONFIG_XEN_PVHVM	31	#ifdef CONFIG_XEN_PVHVM
32	int cpu;	32	int cpu;
33	xen_hvm_resume_shared_info();	33	xen_hvm_init_shared_info();
34	xen_callback_vector();	34	xen_callback_vector();
35	xen_unplug_emulated_devices();	35	xen_unplug_emulated_devices();
36	if (xen_feature(XENFEAT_hvm_safe_pvclock)) {	36	if (xen_feature(XENFEAT_hvm_safe_pvclock)) {

arch/x86/xen/xen-ops.h+1−1

@@ -41,7 +41,7 @@ void xen_enable_syscall(void); · 40 unmodified lines
41	void xen_vcpu_restore(void);	41	void xen_vcpu_restore(void);
42		42
43	void xen_callback_vector(void);	43	void xen_callback_vector(void);
44	void xen_hvm_resume_shared_info(void);	44	void xen_hvm_init_shared_info(void);
45	void xen_unplug_emulated_devices(void);	45	void xen_unplug_emulated_devices(void);
46		46
47	void __init xen_build_dynamic_phys_to_machine(void);	47	void __init xen_build_dynamic_phys_to_machine(void);

block/blk-lib.c+28−13

 	struct request_queue *q = bdev_get_queue(bdev);
 	int type = REQ_WRITE | REQ_DISCARD;
 	unsigned int max_discard_sectors;
+	unsigned int granularity, alignment, mask;
 	struct bio_batch bb;
 	struct bio *bio;
 	int ret = 0;
 	if (!blk_queue_discard(q))
 		return -EOPNOTSUPP;
+	/* Zero-sector (unknown) and one-sector granularities are the same.  */
+	granularity = max(q->limits.discard_granularity >> 9, 1U);
+	mask = granularity - 1;
+	alignment = (bdev_discard_alignment(bdev) >> 9) & mask;
 	/*
 	 * Ensure that max_discard_sectors is of the proper
-	 * granularity
+	 * granularity, so that requests stay aligned after a split.
 	 */
 	max_discard_sectors = min(q->limits.max_discard_sectors, UINT_MAX >> 9);
+	max_discard_sectors = round_down(max_discard_sectors, granularity);
 	if (unlikely(!max_discard_sectors)) {
 		/* Avoid infinite loop below. Being cautious never hurts. */
 		return -EOPNOTSUPP;
-	} else if (q->limits.discard_granularity) {
-		unsigned int disc_sects = q->limits.discard_granularity >> 9;
-		max_discard_sectors &= ~(disc_sects - 1);
 	}
 	if (flags & BLKDEV_DISCARD_SECURE) {
 	bb.wait = &wait;
 	while (nr_sects) {
+		unsigned int req_sects;
+		sector_t end_sect;
 		bio = bio_alloc(gfp_mask, 1);
 		if (!bio) {
 			ret = -ENOMEM;
 			break;
 		}
+		req_sects = min_t(sector_t, nr_sects, max_discard_sectors);
+		/*
+		 * If splitting a request, and the next starting sector would be
+		 * misaligned, stop the discard at the previous aligned sector.
+		 */
+		end_sect = sector + req_sects;
+		if (req_sects < nr_sects && (end_sect & mask) != alignment) {
+			end_sect =
+				round_down(end_sect - alignment, granularity)
+				+ alignment;
+			req_sects = end_sect - sector;
+		}
 		bio->bi_sector = sector;
 		bio->bi_end_io = bio_batch_end_io;
 		bio->bi_bdev = bdev;
 		bio->bi_private = &bb;
-		if (nr_sects > max_discard_sectors) {
+		bio->bi_size = req_sects << 9;
-			bio->bi_size = max_discard_sectors << 9;
+		nr_sects -= req_sects;
-			nr_sects -= max_discard_sectors;
+		sector = end_sect;
-			sector += max_discard_sectors;
-		} else {
-			bio->bi_size = nr_sects << 9;
-			nr_sects = 0;
-		}
 		atomic_inc(&bb.done);
 		submit_bio(type, bio);

block/blk-merge.c+82−35

@@ -110,6 +110,49 @@ static int blk_phys_contig_segment(struct request_queue q, struct bio bio, · 109 unmodified lines
110	return 0;	110	return 0;
111	}	111	}
112		112
		113	static void
		114	__blk_segment_map_sg(struct request_queue q, struct bio_vec bvec,
		115	struct scatterlist sglist, struct bio_vec *bvprv,
		116	struct scatterlist *sg, int nsegs, int *cluster)
		117	{
		118
		119	int nbytes = bvec->bv_len;
		120
		121	if (bvprv && cluster) {
		122	if ((*sg)->length + nbytes > queue_max_segment_size(q))
		123	goto new_segment;
		124
		125	if (!BIOVEC_PHYS_MERGEABLE(*bvprv, bvec))
		126	goto new_segment;
		127	if (!BIOVEC_SEG_BOUNDARY(q, *bvprv, bvec))
		128	goto new_segment;
		129
		130	(*sg)->length += nbytes;
		131	} else {
		132	new_segment:
		133	if (!*sg)
		134	*sg = sglist;
		135	else {
		136	/*
		137	* If the driver previously mapped a shorter
		138	* list, we could see a termination bit
		139	* prematurely unless it fully inits the sg
		140	* table on each mapping. We KNOW that there
		141	* must be more entries here or the driver
		142	* would be buggy, so force clear the
		143	* termination bit to avoid doing a full
		144	* sg_init_table() in drivers for each command.
		145	*/
		146	(*sg)->page_link &= ~0x02;
		147	sg = sg_next(sg);
		148	}
		149
		150	sg_set_page(*sg, bvec->bv_page, nbytes, bvec->bv_offset);
		151	(*nsegs)++;
		152	}
		153	*bvprv = bvec;
		154	}
		155
113	/*	156	/*
114	* map a request to scatterlist, return number of sg entries setup. Caller	157	* map a request to scatterlist, return number of sg entries setup. Caller
115	* must make sure sg can hold rq->nr_phys_segments entries	158	* must make sure sg can hold rq->nr_phys_segments entries
@@ -131,41 +174,8 @@ int blk_rq_map_sg(struct request_queue q, struct request rq, · 15 unmodified lines
131	bvprv = NULL;	174	bvprv = NULL;
132	sg = NULL;	175	sg = NULL;
133	rq_for_each_segment(bvec, rq, iter) {	176	rq_for_each_segment(bvec, rq, iter) {
134	int nbytes = bvec->bv_len;	177	__blk_segment_map_sg(q, bvec, sglist, &bvprv, &sg,
135		178	&nsegs, &cluster);
136	if (bvprv && cluster) {
137	if (sg->length + nbytes > queue_max_segment_size(q))
138	goto new_segment;
139
140	if (!BIOVEC_PHYS_MERGEABLE(bvprv, bvec))
141	goto new_segment;
142	if (!BIOVEC_SEG_BOUNDARY(q, bvprv, bvec))
143	goto new_segment;
144
145	sg->length += nbytes;
146	} else {
147	new_segment:
148	if (!sg)
149	sg = sglist;
150	else {
151	/*
152	* If the driver previously mapped a shorter
153	* list, we could see a termination bit
154	* prematurely unless it fully inits the sg
155	* table on each mapping. We KNOW that there
156	* must be more entries here or the driver
157	* would be buggy, so force clear the
158	* termination bit to avoid doing a full
159	* sg_init_table() in drivers for each command.
160	*/
161	sg->page_link &= ~0x02;
162	sg = sg_next(sg);
163	}
164
165	sg_set_page(sg, bvec->bv_page, nbytes, bvec->bv_offset);
166	nsegs++;
167	}
168	bvprv = bvec;
169	} /* segments in rq */	179	} /* segments in rq */
170		180
171		181
@@ -199,6 +209,43 @@ new_segment: · 27 unmodified lines
199	}	209	}
200	EXPORT_SYMBOL(blk_rq_map_sg);	210	EXPORT_SYMBOL(blk_rq_map_sg);
201		211
		212	/**
		213	* blk_bio_map_sg - map a bio to a scatterlist
		214	* @q: request_queue in question
		215	* @bio: bio being mapped
		216	* @sglist: scatterlist being mapped
		217	*
		218	* Note:
		219	* Caller must make sure sg can hold bio->bi_phys_segments entries
		220	*
		221	* Will return the number of sg entries setup
		222	*/
		223	int blk_bio_map_sg(struct request_queue q, struct bio bio,
		224	struct scatterlist *sglist)
		225	{
		226	struct bio_vec bvec, bvprv;
		227	struct scatterlist *sg;
		228	int nsegs, cluster;
		229	unsigned long i;
		230
		231	nsegs = 0;
		232	cluster = blk_queue_cluster(q);
		233
		234	bvprv = NULL;
		235	sg = NULL;
		236	bio_for_each_segment(bvec, bio, i) {
		237	__blk_segment_map_sg(q, bvec, sglist, &bvprv, &sg,
		238	&nsegs, &cluster);
		239	} /* segments in bio */
		240
		241	if (sg)
		242	sg_mark_end(sg);
		243
		244	BUG_ON(bio->bi_phys_segments && nsegs > bio->bi_phys_segments);
		245	return nsegs;
		246	}
		247	EXPORT_SYMBOL(blk_bio_map_sg);
		248
202	static inline int ll_new_hw_segment(struct request_queue *q,	249	static inline int ll_new_hw_segment(struct request_queue *q,
203	struct request *req,	250	struct request *req,
204	struct bio *bio)	251	struct bio *bio)

block/genhd.c+1−1

@@ -835,7 +835,7 @@ static void disk_seqf_stop(struct seq_file seqf, void v) · 834 unmodified lines
835		835
836	static void show_partition_start(struct seq_file seqf, loff_t *pos)	836	static void show_partition_start(struct seq_file seqf, loff_t *pos)
837	{	837	{
838	static void *p;	838	void *p;
839		839
840	p = disk_seqf_start(seqf, pos);	840	p = disk_seqf_start(seqf, pos);
841	if (!IS_ERR_OR_NULL(p) && !*pos)	841	if (!IS_ERR_OR_NULL(p) && !*pos)

drivers/ata/Kconfig+1−1

@@ -115,7 +115,7 @@ config SATA_SIL24 · 114 unmodified lines
115	If unsure, say N.	115	If unsure, say N.
116		116
117	config ATA_SFF	117	config ATA_SFF
118	bool "ATA SFF support"	118	bool "ATA SFF support (for legacy IDE and PATA)"
119	default y	119	default y
120	help	120	help
121	This option adds support for ATA controllers with SFF	121	This option adds support for ATA controllers with SFF

drivers/ata/ahci.c+8−0

@@ -256,6 +256,14 @@ static const struct pci_device_id ahci_pci_tbl[] = { · 255 unmodified lines
256	{ PCI_VDEVICE(INTEL, 0x8c07), board_ahci }, /* Lynx Point RAID */	256	{ PCI_VDEVICE(INTEL, 0x8c07), board_ahci }, /* Lynx Point RAID */
257	{ PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */	257	{ PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */
258	{ PCI_VDEVICE(INTEL, 0x8c0f), board_ahci }, /* Lynx Point RAID */	258	{ PCI_VDEVICE(INTEL, 0x8c0f), board_ahci }, /* Lynx Point RAID */
		259	{ PCI_VDEVICE(INTEL, 0x9c02), board_ahci }, /* Lynx Point-LP AHCI */
		260	{ PCI_VDEVICE(INTEL, 0x9c03), board_ahci }, /* Lynx Point-LP AHCI */
		261	{ PCI_VDEVICE(INTEL, 0x9c04), board_ahci }, /* Lynx Point-LP RAID */
		262	{ PCI_VDEVICE(INTEL, 0x9c05), board_ahci }, /* Lynx Point-LP RAID */
		263	{ PCI_VDEVICE(INTEL, 0x9c06), board_ahci }, /* Lynx Point-LP RAID */
		264	{ PCI_VDEVICE(INTEL, 0x9c07), board_ahci }, /* Lynx Point-LP RAID */
		265	{ PCI_VDEVICE(INTEL, 0x9c0e), board_ahci }, /* Lynx Point-LP RAID */
		266	{ PCI_VDEVICE(INTEL, 0x9c0f), board_ahci }, /* Lynx Point-LP RAID */
259		267
260	/* JMicron 360/1/3/5/6, match class to avoid IDE function */	268	/* JMicron 360/1/3/5/6, match class to avoid IDE function */
261	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,	269	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,

drivers/ata/ahci.h+1−0

@@ -320,6 +320,7 @@ extern struct device_attribute *ahci_sdev_attrs[]; · 319 unmodified lines
320	extern struct ata_port_operations ahci_ops;	320	extern struct ata_port_operations ahci_ops;
321	extern struct ata_port_operations ahci_pmp_retry_srst_ops;	321	extern struct ata_port_operations ahci_pmp_retry_srst_ops;
322		322
		323	unsigned int ahci_dev_classify(struct ata_port *ap);
323	void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,	324	void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,
324	u32 opts);	325	u32 opts);
325	void ahci_save_initial_config(struct device *dev,	326	void ahci_save_initial_config(struct device *dev,

drivers/ata/ata_piix.c+8−0

@@ -329,6 +329,14 @@ static const struct pci_device_id piix_pci_tbl[] = { · 328 unmodified lines
329	{ 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },	329	{ 0x8086, 0x8c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
330	/* SATA Controller IDE (Lynx Point) */	330	/* SATA Controller IDE (Lynx Point) */
331	{ 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },	331	{ 0x8086, 0x8c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
		332	/* SATA Controller IDE (Lynx Point-LP) */
		333	{ 0x8086, 0x9c00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
		334	/* SATA Controller IDE (Lynx Point-LP) */
		335	{ 0x8086, 0x9c01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata_snb },
		336	/* SATA Controller IDE (Lynx Point-LP) */
		337	{ 0x8086, 0x9c08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
		338	/* SATA Controller IDE (Lynx Point-LP) */
		339	{ 0x8086, 0x9c09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
332	/* SATA Controller IDE (DH89xxCC) */	340	/* SATA Controller IDE (DH89xxCC) */
333	{ 0x8086, 0x2326, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },	341	{ 0x8086, 0x2326, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
334	{ } /* terminate list */	342	{ } /* terminate list */

drivers/ata/libahci.c+2−1

 	}
 }
-static unsigned int ahci_dev_classify(struct ata_port *ap)
+unsigned int ahci_dev_classify(struct ata_port *ap)
 {
 	void __iomem *port_mmio = ahci_port_base(ap);
 	struct ata_taskfile tf;
 	return ata_dev_classify(&tf);
 }
+EXPORT_SYMBOL_GPL(ahci_dev_classify);
 void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,
 			u32 opts)

drivers/ata/libata-acpi.c+4−11

 	if (ap->flags & ATA_FLAG_ACPI_SATA)
 		return NULL;
-	/*
+	return acpi_get_child(DEVICE_ACPI_HANDLE(ap->host->dev), ap->port_no);
-	 * If acpi bind operation has already happened, we can get the handle
-	 * for the port by checking the corresponding scsi_host device's
-	 * firmware node, otherwise we will need to find out the handle from
-	 * its parent's acpi node.
-	 */
-	if (ap->scsi_host)
-		return DEVICE_ACPI_HANDLE(&ap->scsi_host->shost_gendev);
-	else
-		return acpi_get_child(DEVICE_ACPI_HANDLE(ap->host->dev),
-				ap->port_no);
 }
 EXPORT_SYMBOL(ata_ap_acpi_handle);
 	if (!*handle)
 		return -ENODEV;
+	if (ata_acpi_gtm(ap, &ap->__acpi_init_gtm) == 0)
+		ap->pflags |= ATA_PFLAG_INIT_GTM_VALID;
 	return 0;
 }

drivers/ata/libata-core.c+2−1

 	{ "_NEC DV5800A", 	NULL,		ATA_HORKAGE_NODMA },
 	{ "SAMSUNG CD-ROM SN-124", "N001",	ATA_HORKAGE_NODMA },
 	{ "Seagate STT20000A", NULL,		ATA_HORKAGE_NODMA },
-	{ "2GB ATA Flash Disk", "ADMA428M",	ATA_HORKAGE_NODMA },
+	{ " 2GB ATA Flash Disk", "ADMA428M",	ATA_HORKAGE_NODMA },
 	/* Odd clown on sil3726/4726 PMPs */
 	{ "Config  Disk",	NULL,		ATA_HORKAGE_DISABLE },
 	/* Devices that do not need bridging limits applied */
 	{ "MTRON MSP-SATA*",		NULL,	ATA_HORKAGE_BRIDGE_OK, },
+	{ "BUFFALO HD-QSU2/R5",		NULL,	ATA_HORKAGE_BRIDGE_OK, },
 	/* Devices which aren't very happy with higher link speeds */
 	{ "WD My Book",			NULL,	ATA_HORKAGE_1_5_GBPS, },

drivers/ata/pata_atiixp.c+16−0

 #include <linux/delay.h>
 #include <scsi/scsi_host.h>
 #include <linux/libata.h>
+#include <linux/dmi.h>
 #define DRV_NAME "pata_atiixp"
 #define DRV_VERSION "0.4.6"
 	ATIIXP_IDE_UDMA_MODE 	= 0x56
 };
+static const struct dmi_system_id attixp_cable_override_dmi_table[] = {
+	{
+		/* Board has onboard PATA<->SATA converters */
+		.ident = "MSI E350DM-E33",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_VENDOR, "MSI"),
+			DMI_MATCH(DMI_BOARD_NAME, "E350DM-E33(MS-7720)"),
+		},
+	},
+	{ }
+};
 static int atiixp_cable_detect(struct ata_port *ap)
 {
 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 	u8 udma;
+	if (dmi_check_system(attixp_cable_override_dmi_table))
+		return ATA_CBL_PATA40_SHORT;
 	/* Hack from drivers/ide/pci. Really we want to know how to do the
 	   raw detection not play follow the bios mode guess */
 	pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);

drivers/base/dma-contiguous.c+1−1

@@ -250,7 +250,7 @@ int __init dma_declare_contiguous(struct device *dev, unsigned long size, · 249 unmodified lines
250	return -EINVAL;	250	return -EINVAL;
251		251
252	/* Sanitise input arguments */	252	/* Sanitise input arguments */
253	alignment = PAGE_SIZE << max(MAX_ORDER, pageblock_order);	253	alignment = PAGE_SIZE << max(MAX_ORDER - 1, pageblock_order);
254	base = ALIGN(base, alignment);	254	base = ALIGN(base, alignment);
255	size = ALIGN(size, alignment);	255	size = ALIGN(size, alignment);
256	limit &= ~(alignment - 1);	256	limit &= ~(alignment - 1);

drivers/block/drbd/drbd_bitmap.c+14−1

 	unsigned int done;
 	unsigned flags;
 #define BM_AIO_COPY_PAGES	1
+#define BM_WRITE_ALL_PAGES	2
 	int error;
 	struct kref kref;
 };
 		if (lazy_writeout_upper_idx && i == lazy_writeout_upper_idx)
 			break;
 		if (rw & WRITE) {
-			if (bm_test_page_unchanged(b->bm_pages[i])) {
+			if (!(flags & BM_WRITE_ALL_PAGES) &&
+			    bm_test_page_unchanged(b->bm_pages[i])) {
 				dynamic_dev_dbg(DEV, "skipped bm write for idx %u\n", i);
 				continue;
 			}
 	return bm_rw(mdev, WRITE, 0, 0);
 }
+/**
+ * drbd_bm_write_all() - Write the whole bitmap to its on disk location.
+ * @mdev:	DRBD device.
+ *
+ * Will write all pages.
+ */
+int drbd_bm_write_all(struct drbd_conf *mdev) __must_hold(local)
+{
+	return bm_rw(mdev, WRITE, BM_WRITE_ALL_PAGES, 0);
+}
 /**
  * drbd_bm_lazy_write_out() - Write bitmap pages 0 to @upper_idx-1, if they have changed.
  * @mdev:	DRBD device.

drivers/block/drbd/drbd_int.h+1−0

@@ -1469,6 +1469,7 @@ extern int drbd_bm_e_weight(struct drbd_conf *mdev, unsigned long enr); · 1468 unmodified lines
1469	extern int drbd_bm_write_page(struct drbd_conf *mdev, unsigned int idx) __must_hold(local);	1469	extern int drbd_bm_write_page(struct drbd_conf *mdev, unsigned int idx) __must_hold(local);
1470	extern int drbd_bm_read(struct drbd_conf *mdev) __must_hold(local);	1470	extern int drbd_bm_read(struct drbd_conf *mdev) __must_hold(local);
1471	extern int drbd_bm_write(struct drbd_conf *mdev) __must_hold(local);	1471	extern int drbd_bm_write(struct drbd_conf *mdev) __must_hold(local);
		1472	extern int drbd_bm_write_all(struct drbd_conf *mdev) __must_hold(local);
1472	extern int drbd_bm_write_copy_pages(struct drbd_conf *mdev) __must_hold(local);	1473	extern int drbd_bm_write_copy_pages(struct drbd_conf *mdev) __must_hold(local);
1473	extern unsigned long drbd_bm_ALe_set_all(struct drbd_conf *mdev,	1474	extern unsigned long drbd_bm_ALe_set_all(struct drbd_conf *mdev,
1474	unsigned long al_enr);	1475	unsigned long al_enr);

drivers/block/drbd/drbd_main.c+12−16

 static void md_sync_timer_fn(unsigned long data);
 static int w_bitmap_io(struct drbd_conf *mdev, struct drbd_work *w, int unused);
 static int w_go_diskless(struct drbd_conf *mdev, struct drbd_work *w, int unused);
+static void _tl_clear(struct drbd_conf *mdev);
 MODULE_AUTHOR("Philipp Reisner <phil@linbit.com>, "
 	      "Lars Ellenberg <lars@linbit.com>");
 	/* Actions operating on the disk state, also want to work on
 	   requests that got barrier acked. */
-	switch (what) {
-	case fail_frozen_disk_io:
-	case restart_frozen_disk_io:
-		list_for_each_safe(le, tle, &mdev->barrier_acked_requests) {
-			req = list_entry(le, struct drbd_request, tl_requests);
-			_req_mod(req, what);
-		}
-	case connection_lost_while_pending:
+	list_for_each_safe(le, tle, &mdev->barrier_acked_requests) {
-	case resend:
+		req = list_entry(le, struct drbd_request, tl_requests);
-		break;
+		_req_mod(req, what);
-	default:
-		dev_err(DEV, "what = %d in _tl_restart()\n", what);
 	}
 }
  * receiver thread and the worker thread.
  */
 void tl_clear(struct drbd_conf *mdev)
+{
+	spin_lock_irq(&mdev->req_lock);
+	_tl_clear(mdev);
+	spin_unlock_irq(&mdev->req_lock);
+}
+static void _tl_clear(struct drbd_conf *mdev)
 {
 	struct list_head *le, *tle;
 	struct drbd_request *r;
-	spin_lock_irq(&mdev->req_lock);
 	_tl_restart(mdev, connection_lost_while_pending);
 	/* we expect this list to be empty. */
 	memset(mdev->app_reads_hash, 0, APP_R_HSIZE*sizeof(void *));
-	spin_unlock_irq(&mdev->req_lock);
 }
 void tl_restart(struct drbd_conf *mdev, enum drbd_req_event what)
 	if (ns.susp_fen) {
 		/* case1: The outdate peer handler is successful: */
 		if (os.pdsk > D_OUTDATED  && ns.pdsk <= D_OUTDATED) {
-			tl_clear(mdev);
 			if (test_bit(NEW_CUR_UUID, &mdev->flags)) {
 				drbd_uuid_new_current(mdev);
 				clear_bit(NEW_CUR_UUID, &mdev->flags);
 			}
 			spin_lock_irq(&mdev->req_lock);
+			_tl_clear(mdev);
 			_drbd_set_state(_NS(mdev, susp_fen, 0), CS_VERBOSE, NULL);
 			spin_unlock_irq(&mdev->req_lock);
 		}

drivers/block/drbd/drbd_nl.c+2−2

@@ -674,8 +674,8 @@ enum determine_dev_size drbd_determine_dev_size(struct drbd_conf *mdev, enum dds · 673 unmodified lines
674	la_size_changed && md_moved ? "size changed and md moved" :	674	la_size_changed && md_moved ? "size changed and md moved" :
675	la_size_changed ? "size changed" : "md moved");	675	la_size_changed ? "size changed" : "md moved");
676	/* next line implicitly does drbd_suspend_io()+drbd_resume_io() */	676	/* next line implicitly does drbd_suspend_io()+drbd_resume_io() */
677	err = drbd_bitmap_io(mdev, &drbd_bm_write,	677	err = drbd_bitmap_io(mdev, md_moved ? &drbd_bm_write_all : &drbd_bm_write,
678	"size changed", BM_LOCKED_MASK);	678	"size changed", BM_LOCKED_MASK);
679	if (err) {	679	if (err) {
680	rv = dev_size_error;	680	rv = dev_size_error;
681	goto out;	681	goto out;

drivers/block/drbd/drbd_req.c+32−4

 		break;
 	case resend:
+		/* Simply complete (local only) READs. */
+		if (!(req->rq_state & RQ_WRITE) && !req->w.cb) {
+			_req_may_be_done(req, m);
+			break;
+		}
 		/* If RQ_NET_OK is already set, we got a P_WRITE_ACK or P_RECV_ACK
 		   before the connection loss (B&C only); only P_BARRIER_ACK was missing.
 		   Trowing them out of the TL here by pretending we got a BARRIER_ACK
 		req->private_bio = NULL;
 	}
 	if (rw == WRITE) {
-		remote = 1;
+		/* Need to replicate writes.  Unless it is an empty flush,
+		 * which is better mapped to a DRBD P_BARRIER packet,
+		 * also for drbd wire protocol compatibility reasons. */
+		if (unlikely(size == 0)) {
+			/* The only size==0 bios we expect are empty flushes. */
+			D_ASSERT(bio->bi_rw & REQ_FLUSH);
+			remote = 0;
+		} else
+			remote = 1;
 	} else {
 		/* READ || READA */
 		if (local) {
 	 * extent.  This waits for any resync activity in the corresponding
 	 * resync extent to finish, and, if necessary, pulls in the target
 	 * extent into the activity log, which involves further disk io because
-	 * of transactional on-disk meta data updates. */
+	 * of transactional on-disk meta data updates.
-	if (rw == WRITE && local && !test_bit(AL_SUSPENDED, &mdev->flags)) {
+	 * Empty flushes don't need to go into the activity log, they can only
+	 * flush data for pending writes which are already in there. */
+	if (rw == WRITE && local && size
+	&& !test_bit(AL_SUSPENDED, &mdev->flags)) {
 		req->rq_state |= RQ_IN_ACT_LOG;
 		drbd_al_begin_io(mdev, sector);
 	}
 	if (rw == WRITE && _req_conflicts(req))
 		goto fail_conflicting;
-	list_add_tail(&req->tl_requests, &mdev->newest_tle->requests);
+	/* no point in adding empty flushes to the transfer log,
+	 * they are mapped to drbd barriers already. */
+	if (likely(size!=0))
+		list_add_tail(&req->tl_requests, &mdev->newest_tle->requests);
 	/* NOTE remote first: to get the concurrent write detection right,
 	 * we must register the request before start of local IO.  */
 	    mdev->net_conf->on_congestion != OC_BLOCK && mdev->agreed_pro_version >= 96)
 		maybe_pull_ahead(mdev);
+	/* If this was a flush, queue a drbd barrier/start a new epoch.
+	 * Unless the current epoch was empty anyways, or we are not currently
+	 * replicating, in which case there is no point. */
+	if (unlikely(bio->bi_rw & REQ_FLUSH)
+		&& mdev->newest_tle->n_writes
+		&& drbd_should_do_remote(mdev->state))
+		queue_barrier(mdev);
 	spin_unlock_irq(&mdev->req_lock);
 	kfree(b); /* if someone else has beaten us to it... */

drivers/cpufreq/omap-cpufreq.c+3−1

 	policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu);
-	if (atomic_inc_return(&freq_table_users) == 1)
+	if (!freq_table)
 		result = opp_init_cpufreq_table(mpu_dev, &freq_table);
 	if (result) {
 		goto fail_ck;
 	}
+	atomic_inc_return(&freq_table_users);
 	result = cpufreq_frequency_table_cpuinfo(policy, freq_table);
 	if (result)
 		goto fail_table;

drivers/crypto/caam/jr.c+5−5

@@ -63,7 +63,7 @@ static void caam_jr_dequeue(unsigned long devarg) · 62 unmodified lines
63		63
64	head = ACCESS_ONCE(jrp->head);	64	head = ACCESS_ONCE(jrp->head);
65		65
66	spin_lock_bh(&jrp->outlock);	66	spin_lock(&jrp->outlock);
67		67
68	sw_idx = tail = jrp->tail;	68	sw_idx = tail = jrp->tail;
69	hw_idx = jrp->out_ring_read_index;	69	hw_idx = jrp->out_ring_read_index;
@@ -115,7 +115,7 @@ static void caam_jr_dequeue(unsigned long devarg) · 45 unmodified lines
115	jrp->tail = tail;	115	jrp->tail = tail;
116	}	116	}
117		117
118	spin_unlock_bh(&jrp->outlock);	118	spin_unlock(&jrp->outlock);
119		119
120	/* Finally, execute user's callback */	120	/* Finally, execute user's callback */
121	usercall(dev, userdesc, userstatus, userarg);	121	usercall(dev, userdesc, userstatus, userarg);
@@ -236,14 +236,14 @@ int caam_jr_enqueue(struct device dev, u32 desc, · 114 unmodified lines
236	return -EIO;	236	return -EIO;
237	}	237	}
238		238
239	spin_lock(&jrp->inplock);	239	spin_lock_bh(&jrp->inplock);
240		240
241	head = jrp->head;	241	head = jrp->head;
242	tail = ACCESS_ONCE(jrp->tail);	242	tail = ACCESS_ONCE(jrp->tail);
243		243
244	if (!rd_reg32(&jrp->rregs->inpring_avail) \|\|	244	if (!rd_reg32(&jrp->rregs->inpring_avail) \|\|
245	CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {	245	CIRC_SPACE(head, tail, JOBR_DEPTH) <= 0) {
246	spin_unlock(&jrp->inplock);	246	spin_unlock_bh(&jrp->inplock);
247	dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);	247	dma_unmap_single(dev, desc_dma, desc_size, DMA_TO_DEVICE);
248	return -EBUSY;	248	return -EBUSY;
249	}	249	}
@@ -265,7 +265,7 @@ int caam_jr_enqueue(struct device dev, u32 desc, · 15 unmodified lines
265		265
266	wr_reg32(&jrp->rregs->inpring_jobadd, 1);	266	wr_reg32(&jrp->rregs->inpring_jobadd, 1);
267		267
268	spin_unlock(&jrp->inplock);	268	spin_unlock_bh(&jrp->inplock);
269		269
270	return 0;	270	return 0;
271	}	271	}

drivers/crypto/hifn_795x.c+2−2

@@ -821,8 +821,8 @@ static int hifn_register_rng(struct hifn_device *dev) · 820 unmodified lines
821	/*	821	/*
822	* We must wait at least 256 Pk_clk cycles between two reads of the rng.	822	* We must wait at least 256 Pk_clk cycles between two reads of the rng.
823	*/	823	*/
824	dev->rng_wait_time = DIV_ROUND_UP(NSEC_PER_SEC, dev->pk_clk_freq) *	824	dev->rng_wait_time = DIV_ROUND_UP_ULL(NSEC_PER_SEC,
825	256;	825	dev->pk_clk_freq) * 256;
826		826
827	dev->rng.name = dev->name;	827	dev->rng.name = dev->name;
828	dev->rng.data_present = hifn_rng_data_present,	828	dev->rng.data_present = hifn_rng_data_present,

drivers/gpio/Kconfig+1−1

@@ -294,7 +294,7 @@ config GPIO_MAX732X_IRQ · 293 unmodified lines
294		294
295	config GPIO_MC9S08DZ60	295	config GPIO_MC9S08DZ60
296	bool "MX35 3DS BOARD MC9S08DZ60 GPIO functions"	296	bool "MX35 3DS BOARD MC9S08DZ60 GPIO functions"
297	depends on I2C && MACH_MX35_3DS	297	depends on I2C=y && MACH_MX35_3DS
298	help	298	help
299	Select this to enable the MC9S08DZ60 GPIO driver	299	Select this to enable the MC9S08DZ60 GPIO driver
300		300

drivers/gpio/gpio-em.c+2−2

@@ -247,9 +247,9 @@ static int __devinit em_gio_irq_domain_init(struct em_gio_priv *p) · 246 unmodified lines
247		247
248	p->irq_base = irq_alloc_descs(pdata->irq_base, 0,	248	p->irq_base = irq_alloc_descs(pdata->irq_base, 0,
249	pdata->number_of_pins, numa_node_id());	249	pdata->number_of_pins, numa_node_id());
250	if (IS_ERR_VALUE(p->irq_base)) {	250	if (p->irq_base < 0) {
251	dev_err(&pdev->dev, "cannot get irq_desc\n");	251	dev_err(&pdev->dev, "cannot get irq_desc\n");
252	return -ENXIO;	252	return p->irq_base;
253	}	253	}
254	pr_debug("gio: hw base = %d, nr = %d, sw base = %d\n",	254	pr_debug("gio: hw base = %d, nr = %d, sw base = %d\n",
255	pdata->gpio_base, pdata->number_of_pins, p->irq_base);	255	pdata->gpio_base, pdata->number_of_pins, p->irq_base);

drivers/gpio/gpio-rdc321x.c+1−0

@@ -170,6 +170,7 @@ static int __devinit rdc321x_gpio_probe(struct platform_device *pdev) · 169 unmodified lines
170	rdc321x_gpio_dev->reg2_data_base = r->start + 0x4;	170	rdc321x_gpio_dev->reg2_data_base = r->start + 0x4;
171		171
172	rdc321x_gpio_dev->chip.label = "rdc321x-gpio";	172	rdc321x_gpio_dev->chip.label = "rdc321x-gpio";
		173	rdc321x_gpio_dev->chip.owner = THIS_MODULE;
173	rdc321x_gpio_dev->chip.direction_input = rdc_gpio_direction_input;	174	rdc321x_gpio_dev->chip.direction_input = rdc_gpio_direction_input;
174	rdc321x_gpio_dev->chip.direction_output = rdc_gpio_config;	175	rdc321x_gpio_dev->chip.direction_output = rdc_gpio_config;
175	rdc321x_gpio_dev->chip.get = rdc_gpio_get_value;	176	rdc321x_gpio_dev->chip.get = rdc_gpio_get_value;

drivers/gpio/gpiolib-of.c+1−1

@@ -82,7 +82,7 @@ int of_get_named_gpio_flags(struct device_node np, const char propname, · 81 unmodified lines
82	gpiochip_find(&gg_data, of_gpiochip_find_and_xlate);	82	gpiochip_find(&gg_data, of_gpiochip_find_and_xlate);
83		83
84	of_node_put(gg_data.gpiospec.np);	84	of_node_put(gg_data.gpiospec.np);
85	pr_debug("%s exited with status %d\n", __func__, ret);	85	pr_debug("%s exited with status %d\n", __func__, gg_data.out_gpio);
86	return gg_data.out_gpio;	86	return gg_data.out_gpio;
87	}	87	}
88	EXPORT_SYMBOL(of_get_named_gpio_flags);	88	EXPORT_SYMBOL(of_get_named_gpio_flags);

drivers/gpu/drm/drm_crtc.c+1−1

@@ -1981,7 +1981,7 @@ int drm_mode_cursor_ioctl(struct drm_device *dev, · 1980 unmodified lines
1981	if (!drm_core_check_feature(dev, DRIVER_MODESET))	1981	if (!drm_core_check_feature(dev, DRIVER_MODESET))
1982	return -EINVAL;	1982	return -EINVAL;
1983		1983
1984	if (!req->flags)	1984	if (!req->flags \|\| (~DRM_MODE_CURSOR_FLAGS & req->flags))
1985	return -EINVAL;	1985	return -EINVAL;
1986		1986
1987	mutex_lock(&dev->mode_config.mutex);	1987	mutex_lock(&dev->mode_config.mutex);

drivers/gpu/drm/drm_edid.c+3−0

 	int product_id;
 	u32 quirks;
 } edid_quirk_list[] = {
+	/* ASUS VW222S */
+	{ "ACI", 0x22a2, EDID_QUIRK_FORCE_REDUCED_BLANKING },
 	/* Acer AL1706 */
 	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
 	/* Acer F51 */

drivers/gpu/drm/gma500/psb_intel_display.c+3−0

@@ -1362,6 +1362,9 @@ void psb_intel_crtc_init(struct drm_device *dev, int pipe, · 1361 unmodified lines
1362	(struct drm_connector **) (psb_intel_crtc + 1);	1362	(struct drm_connector **) (psb_intel_crtc + 1);
1363	psb_intel_crtc->mode_set.num_connectors = 0;	1363	psb_intel_crtc->mode_set.num_connectors = 0;
1364	psb_intel_cursor_init(dev, psb_intel_crtc);	1364	psb_intel_cursor_init(dev, psb_intel_crtc);
		1365
		1366	/* Set to true so that the pipe is forced off on initial config. */
		1367	psb_intel_crtc->active = true;
1365	}	1368	}
1366		1369
1367	int psb_intel_get_pipe_from_crtc_id(struct drm_device dev, void data,	1370	int psb_intel_get_pipe_from_crtc_id(struct drm_device dev, void data,

drivers/gpu/drm/i915/i915_gem_gtt.c+1−1

@@ -72,7 +72,7 @@ int i915_gem_init_aliasing_ppgtt(struct drm_device *dev) · 71 unmodified lines
72	/* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024	72	/* ppgtt PDEs reside in the global gtt pagetable, which has 512*1024
73	* entries. For aliasing ppgtt support we just steal them at the end for	73	* entries. For aliasing ppgtt support we just steal them at the end for
74	* now. */	74	* now. */
75	first_pd_entry_in_global_pt = 512*1024 - I915_PPGTT_PD_ENTRIES;	75	first_pd_entry_in_global_pt = dev_priv->mm.gtt->gtt_total_entries - I915_PPGTT_PD_ENTRIES;
76		76
77	ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);	77	ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
78	if (!ppgtt)	78	if (!ppgtt)

drivers/gpu/drm/i915/intel_display.c+6−6

@@ -1384,7 +1384,7 @@ static void assert_pch_hdmi_disabled(struct drm_i915_private *dev_priv, · 1383 unmodified lines
1384	enum pipe pipe, int reg)	1384	enum pipe pipe, int reg)
1385	{	1385	{
1386	u32 val = I915_READ(reg);	1386	u32 val = I915_READ(reg);
1387	WARN(hdmi_pipe_enabled(dev_priv, val, pipe),	1387	WARN(hdmi_pipe_enabled(dev_priv, pipe, val),
1388	"PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n",	1388	"PCH HDMI (0x%08x) enabled on transcoder %c, should be disabled\n",
1389	reg, pipe_name(pipe));	1389	reg, pipe_name(pipe));
1390		1390
@@ -1404,13 +1404,13 @@ static void assert_pch_ports_disabled(struct drm_i915_private *dev_priv, · 13 unmodified lines
1404		1404
1405	reg = PCH_ADPA;	1405	reg = PCH_ADPA;
1406	val = I915_READ(reg);	1406	val = I915_READ(reg);
1407	WARN(adpa_pipe_enabled(dev_priv, val, pipe),	1407	WARN(adpa_pipe_enabled(dev_priv, pipe, val),
1408	"PCH VGA enabled on transcoder %c, should be disabled\n",	1408	"PCH VGA enabled on transcoder %c, should be disabled\n",
1409	pipe_name(pipe));	1409	pipe_name(pipe));
1410		1410
1411	reg = PCH_LVDS;	1411	reg = PCH_LVDS;
1412	val = I915_READ(reg);	1412	val = I915_READ(reg);
1413	WARN(lvds_pipe_enabled(dev_priv, val, pipe),	1413	WARN(lvds_pipe_enabled(dev_priv, pipe, val),
1414	"PCH LVDS enabled on transcoder %c, should be disabled\n",	1414	"PCH LVDS enabled on transcoder %c, should be disabled\n",
1415	pipe_name(pipe));	1415	pipe_name(pipe));
1416		1416
@@ -1872,7 +1872,7 @@ static void disable_pch_hdmi(struct drm_i915_private *dev_priv, · 455 unmodified lines
1872	enum pipe pipe, int reg)	1872	enum pipe pipe, int reg)
1873	{	1873	{
1874	u32 val = I915_READ(reg);	1874	u32 val = I915_READ(reg);
1875	if (hdmi_pipe_enabled(dev_priv, val, pipe)) {	1875	if (hdmi_pipe_enabled(dev_priv, pipe, val)) {
1876	DRM_DEBUG_KMS("Disabling pch HDMI %x on pipe %d\n",	1876	DRM_DEBUG_KMS("Disabling pch HDMI %x on pipe %d\n",
1877	reg, pipe);	1877	reg, pipe);
1878	I915_WRITE(reg, val & ~PORT_ENABLE);	1878	I915_WRITE(reg, val & ~PORT_ENABLE);
@@ -1894,12 +1894,12 @@ static void intel_disable_pch_ports(struct drm_i915_private *dev_priv, · 15 unmodified lines
1894		1894
1895	reg = PCH_ADPA;	1895	reg = PCH_ADPA;
1896	val = I915_READ(reg);	1896	val = I915_READ(reg);
1897	if (adpa_pipe_enabled(dev_priv, val, pipe))	1897	if (adpa_pipe_enabled(dev_priv, pipe, val))
1898	I915_WRITE(reg, val & ~ADPA_DAC_ENABLE);	1898	I915_WRITE(reg, val & ~ADPA_DAC_ENABLE);
1899		1899
1900	reg = PCH_LVDS;	1900	reg = PCH_LVDS;
1901	val = I915_READ(reg);	1901	val = I915_READ(reg);
1902	if (lvds_pipe_enabled(dev_priv, val, pipe)) {	1902	if (lvds_pipe_enabled(dev_priv, pipe, val)) {
1903	DRM_DEBUG_KMS("disable lvds on pipe %d val 0x%08x\n", pipe, val);	1903	DRM_DEBUG_KMS("disable lvds on pipe %d val 0x%08x\n", pipe, val);
1904	I915_WRITE(reg, val & ~LVDS_PORT_EN);	1904	I915_WRITE(reg, val & ~LVDS_PORT_EN);
1905	POSTING_READ(reg);	1905	POSTING_READ(reg);

drivers/gpu/drm/i915/intel_lvds.c+8−0

@@ -780,6 +780,14 @@ static const struct dmi_system_id intel_no_lvds[] = { · 779 unmodified lines
780	DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),	780	DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
781	},	781	},
782	},	782	},
		783	{
		784	.callback = intel_no_lvds_dmi_callback,
		785	.ident = "Gigabyte GA-D525TUD",
		786	.matches = {
		787	DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
		788	DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
		789	},
		790	},
783		791
784	{ } /* terminating entry */	792	{ } /* terminating entry */
785	};	793	};

drivers/gpu/drm/i915/intel_sprite.c+2−2

@@ -60,11 +60,11 @@ ivb_update_plane(struct drm_plane plane, struct drm_framebuffer fb, · 59 unmodified lines
60		60
61	switch (fb->pixel_format) {	61	switch (fb->pixel_format) {
62	case DRM_FORMAT_XBGR8888:	62	case DRM_FORMAT_XBGR8888:
63	sprctl \|= SPRITE_FORMAT_RGBX888;	63	sprctl \|= SPRITE_FORMAT_RGBX888 \| SPRITE_RGB_ORDER_RGBX;
64	pixel_size = 4;	64	pixel_size = 4;
65	break;	65	break;
66	case DRM_FORMAT_XRGB8888:	66	case DRM_FORMAT_XRGB8888:
67	sprctl \|= SPRITE_FORMAT_RGBX888 \| SPRITE_RGB_ORDER_RGBX;	67	sprctl \|= SPRITE_FORMAT_RGBX888;
68	pixel_size = 4;	68	pixel_size = 4;
69	break;	69	break;
70	case DRM_FORMAT_YUYV:	70	case DRM_FORMAT_YUYV:

drivers/gpu/drm/nouveau/nouveau_state.c+4−2

 			}
 			break;
 		case NV_C0:
-			nvc0_copy_create(dev, 1);
+			if (!(nv_rd32(dev, 0x022500) & 0x00000200))
+				nvc0_copy_create(dev, 1);
 		case NV_D0:
-			nvc0_copy_create(dev, 0);
+			if (!(nv_rd32(dev, 0x022500) & 0x00000100))
+				nvc0_copy_create(dev, 0);
 			break;
 		default:
 			break;

drivers/gpu/drm/radeon/atombios_crtc.c+16−20

 		radeon_crtc->enabled = true;
 		/* adjust pm to dpms changes BEFORE enabling crtcs */
 		radeon_pm_compute_clocks(rdev);
-		/* disable crtc pair power gating before programming */
 		if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set)
 			atombios_powergate_crtc(crtc, ATOM_DISABLE);
 		atombios_enable_crtc(crtc, ATOM_ENABLE);
 			atombios_enable_crtc_memreq(crtc, ATOM_DISABLE);
 		atombios_enable_crtc(crtc, ATOM_DISABLE);
 		radeon_crtc->enabled = false;
-		/* power gating is per-pair */
+		if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set)
-		if (ASIC_IS_DCE6(rdev) && !radeon_crtc->in_mode_set) {
+			atombios_powergate_crtc(crtc, ATOM_ENABLE);
-			struct drm_crtc *other_crtc;
-			struct radeon_crtc *other_radeon_crtc;
-			list_for_each_entry(other_crtc, &rdev->ddev->mode_config.crtc_list, head) {
-				other_radeon_crtc = to_radeon_crtc(other_crtc);
-				if (((radeon_crtc->crtc_id == 0) && (other_radeon_crtc->crtc_id == 1)) ||
-				    ((radeon_crtc->crtc_id == 1) && (other_radeon_crtc->crtc_id == 0)) ||
-				    ((radeon_crtc->crtc_id == 2) && (other_radeon_crtc->crtc_id == 3)) ||
-				    ((radeon_crtc->crtc_id == 3) && (other_radeon_crtc->crtc_id == 2)) ||
-				    ((radeon_crtc->crtc_id == 4) && (other_radeon_crtc->crtc_id == 5)) ||
-				    ((radeon_crtc->crtc_id == 5) && (other_radeon_crtc->crtc_id == 4))) {
-					/* if both crtcs in the pair are off, enable power gating */
-					if (other_radeon_crtc->enabled == false)
-						atombios_powergate_crtc(crtc, ATOM_ENABLE);
-					break;
-				}
-			}
-		}
 		/* adjust pm to dpms changes AFTER disabling crtcs */
 		radeon_pm_compute_clocks(rdev);
 		break;
 	struct drm_device *dev = crtc->dev;
 	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_atom_ss ss;
+	int i;
 	atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
+	for (i = 0; i < rdev->num_crtc; i++) {
+		if (rdev->mode_info.crtcs[i] &&
+		    rdev->mode_info.crtcs[i]->enabled &&
+		    i != radeon_crtc->crtc_id &&
+		    radeon_crtc->pll_id == rdev->mode_info.crtcs[i]->pll_id) {
+			/* one other crtc is using this pll don't turn
+			 * off the pll
+			 */
+			goto done;
+		}
+	}
 	switch (radeon_crtc->pll_id) {
 	case ATOM_PPLL1:
 	case ATOM_PPLL2:
 	default:
 		break;
 	}
+done:
 	radeon_crtc->pll_id = -1;
 }

drivers/gpu/drm/radeon/atombios_dp.c+12−17

 	struct radeon_device *rdev = dev->dev_private;
 	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 	int panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE;
+	u16 dp_bridge = radeon_connector_encoder_get_dp_bridge_encoder_id(connector);
+	u8 tmp;
 	if (!ASIC_IS_DCE4(rdev))
 		return panel_mode;
-	if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) ==
+	if (dp_bridge != ENCODER_OBJECT_ID_NONE) {
-	    ENCODER_OBJECT_ID_NUTMEG)
+		/* DP bridge chips */
-		panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE;
+		tmp = radeon_read_dpcd_reg(radeon_connector, DP_EDP_CONFIGURATION_CAP);
-	else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) ==
+		if (tmp & 1)
-		 ENCODER_OBJECT_ID_TRAVIS) {
+			panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
-		u8 id[6];
+		else if ((dp_bridge == ENCODER_OBJECT_ID_NUTMEG) ||
-		int i;
+			 (dp_bridge == ENCODER_OBJECT_ID_TRAVIS))
-		for (i = 0; i < 6; i++)
-			id[i] = radeon_read_dpcd_reg(radeon_connector, 0x503 + i);
-		if (id[0] == 0x73 &&
-		    id[1] == 0x69 &&
-		    id[2] == 0x76 &&
-		    id[3] == 0x61 &&
-		    id[4] == 0x72 &&
-		    id[5] == 0x54)
 			panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE;
 		else
-			panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
+			panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE;
 	} else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
-		u8 tmp = radeon_read_dpcd_reg(radeon_connector, DP_EDP_CONFIGURATION_CAP);
+		/* eDP */
+		tmp = radeon_read_dpcd_reg(radeon_connector, DP_EDP_CONFIGURATION_CAP);
 		if (tmp & 1)
 			panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE;
 	}

drivers/gpu/drm/radeon/atombios_encoders.c+73−67

@@ -1379,6 +1379,8 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) · 1378 unmodified lines
1379	struct drm_device *dev = encoder->dev;	1379	struct drm_device *dev = encoder->dev;
1380	struct radeon_device *rdev = dev->dev_private;	1380	struct radeon_device *rdev = dev->dev_private;
1381	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);	1381	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
		1382	struct drm_encoder *ext_encoder = radeon_get_external_encoder(encoder);
		1383	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
1382	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);	1384	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
1383	struct radeon_connector *radeon_connector = NULL;	1385	struct radeon_connector *radeon_connector = NULL;
1384	struct radeon_connector_atom_dig *radeon_dig_connector = NULL;	1386	struct radeon_connector_atom_dig *radeon_dig_connector = NULL;
@@ -1390,19 +1392,37 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) · 5 unmodified lines
1390		1392
1391	switch (mode) {	1393	switch (mode) {
1392	case DRM_MODE_DPMS_ON:	1394	case DRM_MODE_DPMS_ON:
1393	/* some early dce3.2 boards have a bug in their transmitter control table */	1395	if (ASIC_IS_DCE41(rdev) \|\| ASIC_IS_DCE5(rdev)) {
1394	if ((rdev->family == CHIP_RV710) \|\| (rdev->family == CHIP_RV730) \|\|	1396	if (!connector)
1395	ASIC_IS_DCE41(rdev) \|\| ASIC_IS_DCE5(rdev)) {	1397	dig->panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE;
1396	if (ASIC_IS_DCE6(rdev)) {	1398	else
1397	/* It seems we need to call ATOM_ENCODER_CMD_SETUP again	1399	dig->panel_mode = radeon_dp_get_panel_mode(encoder, connector);
1398	* before reenabling encoder on DPMS ON, otherwise we never	1400
1399	* get picture	1401	/* setup and enable the encoder */
1400	*/	1402	atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0);
1401	atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0);	1403	atombios_dig_encoder_setup(encoder,
		1404	ATOM_ENCODER_CMD_SETUP_PANEL_MODE,
		1405	dig->panel_mode);
		1406	if (ext_encoder) {
		1407	if (ASIC_IS_DCE41(rdev) \|\| ASIC_IS_DCE61(rdev))
		1408	atombios_external_encoder_setup(encoder, ext_encoder,
		1409	EXTERNAL_ENCODER_ACTION_V3_ENCODER_SETUP);
1402	}	1410	}
1403	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);	1411	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
1404	} else {	1412	} else if (ASIC_IS_DCE4(rdev)) {
		1413	/* setup and enable the encoder */
		1414	atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0);
		1415	/* enable the transmitter */
		1416	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
1405	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);	1417	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
		1418	} else {
		1419	/* setup and enable the encoder and transmitter */
		1420	atombios_dig_encoder_setup(encoder, ATOM_ENABLE, 0);
		1421	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0);
		1422	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
		1423	/* some early dce3.2 boards have a bug in their transmitter control table */
		1424	if ((rdev->family != CHIP_RV710) \|\| (rdev->family != CHIP_RV730))
		1425	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0);
1406	}	1426	}
1407	if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {	1427	if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {
1408	if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {	1428	if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
@@ -1420,10 +1440,19 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) · 11 unmodified lines
1420	case DRM_MODE_DPMS_STANDBY:	1440	case DRM_MODE_DPMS_STANDBY:
1421	case DRM_MODE_DPMS_SUSPEND:	1441	case DRM_MODE_DPMS_SUSPEND:
1422	case DRM_MODE_DPMS_OFF:	1442	case DRM_MODE_DPMS_OFF:
1423	if (ASIC_IS_DCE41(rdev) \|\| ASIC_IS_DCE5(rdev))	1443	if (ASIC_IS_DCE41(rdev) \|\| ASIC_IS_DCE5(rdev)) {
		1444	/* disable the transmitter */
1424	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);	1445	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
1425	else	1446	} else if (ASIC_IS_DCE4(rdev)) {
		1447	/* disable the transmitter */
		1448	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0);
		1449	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
		1450	} else {
		1451	/* disable the encoder and transmitter */
1426	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0);	1452	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0);
		1453	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
		1454	atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0);
		1455	}
1427	if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {	1456	if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) {
1428	if (ASIC_IS_DCE4(rdev))	1457	if (ASIC_IS_DCE4(rdev))
1429	atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);	1458	atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
@@ -1740,13 +1769,34 @@ static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder) · 310 unmodified lines
1740	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);	1769	struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
1741	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);	1770	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1742	struct drm_encoder *test_encoder;	1771	struct drm_encoder *test_encoder;
1743	struct radeon_encoder_atom_dig *dig;	1772	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
1744	uint32_t dig_enc_in_use = 0;	1773	uint32_t dig_enc_in_use = 0;
1745		1774
1746	/* DCE4/5 */	1775	if (ASIC_IS_DCE6(rdev)) {
1747	if (ASIC_IS_DCE4(rdev)) {	1776	/* DCE6 */
1748	dig = radeon_encoder->enc_priv;	1777	switch (radeon_encoder->encoder_id) {
1749	if (ASIC_IS_DCE41(rdev)) {	1778	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
		1779	if (dig->linkb)
		1780	return 1;
		1781	else
		1782	return 0;
		1783	break;
		1784	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
		1785	if (dig->linkb)
		1786	return 3;
		1787	else
		1788	return 2;
		1789	break;
		1790	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
		1791	if (dig->linkb)
		1792	return 5;
		1793	else
		1794	return 4;
		1795	break;
		1796	}
		1797	} else if (ASIC_IS_DCE4(rdev)) {
		1798	/* DCE4/5 */
		1799	if (ASIC_IS_DCE41(rdev) && !ASIC_IS_DCE61(rdev)) {
1750	/* ontario follows DCE4 */	1800	/* ontario follows DCE4 */
1751	if (rdev->family == CHIP_PALM) {	1801	if (rdev->family == CHIP_PALM) {
1752	if (dig->linkb)	1802	if (dig->linkb)
@@ -1848,10 +1898,12 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, · 95 unmodified lines
1848	struct drm_device *dev = encoder->dev;	1898	struct drm_device *dev = encoder->dev;
1849	struct radeon_device *rdev = dev->dev_private;	1899	struct radeon_device *rdev = dev->dev_private;
1850	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);	1900	struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1851	struct drm_encoder *ext_encoder = radeon_get_external_encoder(encoder);
1852		1901
1853	radeon_encoder->pixel_clock = adjusted_mode->clock;	1902	radeon_encoder->pixel_clock = adjusted_mode->clock;
1854		1903
		1904	/* need to call this here rather than in prepare() since we need some crtc info */
		1905	radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
		1906
1855	if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE4(rdev)) {	1907	if (ASIC_IS_AVIVO(rdev) && !ASIC_IS_DCE4(rdev)) {
1856	if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT \| ATOM_DEVICE_TV_SUPPORT))	1908	if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT \| ATOM_DEVICE_TV_SUPPORT))
1857	atombios_yuv_setup(encoder, true);	1909	atombios_yuv_setup(encoder, true);
@@ -1870,38 +1922,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, · 12 unmodified lines
1870	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:	1922	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
1871	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:	1923	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
1872	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:	1924	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
1873	if (ASIC_IS_DCE41(rdev) \|\| ASIC_IS_DCE5(rdev)) {	1925	/* handled in dpms */
1874	struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
1875	struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
1876
1877	if (!connector)
1878	dig->panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE;
1879	else
1880	dig->panel_mode = radeon_dp_get_panel_mode(encoder, connector);
1881
1882	/* setup and enable the encoder */
1883	atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0);
1884	atombios_dig_encoder_setup(encoder,
1885	ATOM_ENCODER_CMD_SETUP_PANEL_MODE,
1886	dig->panel_mode);
1887	} else if (ASIC_IS_DCE4(rdev)) {
1888	/* disable the transmitter */
1889	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
1890	/* setup and enable the encoder */
1891	atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_SETUP, 0);
1892
1893	/* enable the transmitter */
1894	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
1895	} else {
1896	/* disable the encoder and transmitter */
1897	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
1898	atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0);
1899
1900	/* setup and enable the encoder and transmitter */
1901	atombios_dig_encoder_setup(encoder, ATOM_ENABLE, 0);
1902	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0);
1903	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0);
1904	}
1905	break;	1926	break;
1906	case ENCODER_OBJECT_ID_INTERNAL_DDI:	1927	case ENCODER_OBJECT_ID_INTERNAL_DDI:
1907	case ENCODER_OBJECT_ID_INTERNAL_DVO1:	1928	case ENCODER_OBJECT_ID_INTERNAL_DVO1:
@@ -1922,14 +1943,6 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, · 14 unmodified lines
1922	break;	1943	break;
1923	}	1944	}
1924		1945
1925	if (ext_encoder) {
1926	if (ASIC_IS_DCE41(rdev) \|\| ASIC_IS_DCE61(rdev))
1927	atombios_external_encoder_setup(encoder, ext_encoder,
1928	EXTERNAL_ENCODER_ACTION_V3_ENCODER_SETUP);
1929	else
1930	atombios_external_encoder_setup(encoder, ext_encoder, ATOM_ENABLE);
1931	}
1932
1933	atombios_apply_encoder_quirks(encoder, adjusted_mode);	1946	atombios_apply_encoder_quirks(encoder, adjusted_mode);
1934		1947
1935	if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) {	1948	if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) {
@@ -2116,7 +2129,6 @@ static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) · 180 unmodified lines
2116	}	2129	}
2117		2130
2118	radeon_atom_output_lock(encoder, true);	2131	radeon_atom_output_lock(encoder, true);
2119	radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
2120		2132
2121	if (connector) {	2133	if (connector) {
2122	struct radeon_connector *radeon_connector = to_radeon_connector(connector);	2134	struct radeon_connector *radeon_connector = to_radeon_connector(connector);
@@ -2137,6 +2149,7 @@ static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) · 14 unmodified lines
2137		2149
2138	static void radeon_atom_encoder_commit(struct drm_encoder *encoder)	2150	static void radeon_atom_encoder_commit(struct drm_encoder *encoder)
2139	{	2151	{
		2152	/* need to call this here as we need the crtc set up */
2140	radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_ON);	2153	radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
2141	radeon_atom_output_lock(encoder, false);	2154	radeon_atom_output_lock(encoder, false);
2142	}	2155	}
@@ -2177,14 +2190,7 @@ static void radeon_atom_encoder_disable(struct drm_encoder *encoder) · 34 unmodified lines
2177	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:	2190	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
2178	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:	2191	case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
2179	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:	2192	case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
2180	if (ASIC_IS_DCE4(rdev))	2193	/* handled in dpms */
2181	/* disable the transmitter */
2182	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
2183	else {
2184	/* disable the encoder and transmitter */
2185	atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE, 0, 0);
2186	atombios_dig_encoder_setup(encoder, ATOM_DISABLE, 0);
2187	}
2188	break;	2194	break;
2189	case ENCODER_OBJECT_ID_INTERNAL_DDI:	2195	case ENCODER_OBJECT_ID_INTERNAL_DDI:
2190	case ENCODER_OBJECT_ID_INTERNAL_DVO1:	2196	case ENCODER_OBJECT_ID_INTERNAL_DVO1:

drivers/gpu/drm/radeon/r600_cs.c+26−4

 	u32			cb_color_size_idx[8]; /* unused */
 	u32			cb_target_mask;
 	u32			cb_shader_mask;  /* unused */
+	bool			is_resolve;
 	u32			cb_color_size[8];
 	u32			vgt_strmout_en;
 	u32			vgt_strmout_buffer_en;
 		track->cb_color_bo[i] = NULL;
 		track->cb_color_bo_offset[i] = 0xFFFFFFFF;
 		track->cb_color_bo_mc[i] = 0xFFFFFFFF;
-	}
+		track->cb_color_frag_bo[i] = NULL;
+		track->cb_color_frag_offset[i] = 0xFFFFFFFF;
+		track->cb_color_tile_bo[i] = NULL;
+		track->cb_color_tile_offset[i] = 0xFFFFFFFF;
+		track->cb_color_mask[i] = 0xFFFFFFFF;
+	}
+	track->is_resolve = false;
+	track->nsamples = 16;
+	track->log_nsamples = 4;
 	track->cb_target_mask = 0xFFFFFFFF;
 	track->cb_shader_mask = 0xFFFFFFFF;
 	track->cb_dirty = true;
 	volatile u32 *ib = p->ib.ptr;
 	unsigned array_mode;
 	u32 format;
+	/* When resolve is used, the second colorbuffer has always 1 sample. */
+	unsigned nsamples = track->is_resolve && i == 1 ? 1 : track->nsamples;
 	size = radeon_bo_size(track->cb_color_bo[i]) - track->cb_color_bo_offset[i];
 	format = G_0280A0_FORMAT(track->cb_color_info[i]);
 	array_check.group_size = track->group_size;
 	array_check.nbanks = track->nbanks;
 	array_check.npipes = track->npipes;
-	array_check.nsamples = track->nsamples;
+	array_check.nsamples = nsamples;
 	array_check.blocksize = r600_fmt_get_blocksize(format);
 	if (r600_get_array_mode_alignment(&array_check,
 					  &pitch_align, &height_align, &depth_align, &base_align)) {
 	/* check offset */
 	tmp = r600_fmt_get_nblocksy(format, height) * r600_fmt_get_nblocksx(format, pitch) *
-	      r600_fmt_get_blocksize(format) * track->nsamples;
+	      r600_fmt_get_blocksize(format) * nsamples;
 	switch (array_mode) {
 	default:
 	case V_0280A0_ARRAY_LINEAR_GENERAL:
 	 */
 	if (track->cb_dirty) {
 		tmp = track->cb_target_mask;
+		/* We must check both colorbuffers for RESOLVE. */
+		if (track->is_resolve) {
+			tmp |= 0xff;
+		}
 		for (i = 0; i < 8; i++) {
 			if ((tmp >> (i * 4)) & 0xF) {
 				/* at least one component is enabled */
 		track->nsamples = 1 << tmp;
 		track->cb_dirty = true;
 		break;
+	case R_028808_CB_COLOR_CONTROL:
+		tmp = G_028808_SPECIAL_OP(radeon_get_ib_value(p, idx));
+		track->is_resolve = tmp == V_028808_SPECIAL_RESOLVE_BOX;
+		track->cb_dirty = true;
+		break;
 	case R_0280A0_CB_COLOR0_INFO:
 	case R_0280A4_CB_COLOR1_INFO:
 	case R_0280A8_CB_COLOR2_INFO:
 	case R_028118_CB_COLOR6_MASK:
 	case R_02811C_CB_COLOR7_MASK:
 		tmp = (reg - R_028100_CB_COLOR0_MASK) / 4;
-		track->cb_color_mask[tmp] = ib[idx];
+		track->cb_color_mask[tmp] = radeon_get_ib_value(p, idx);
 		if (G_0280A0_TILE_MODE(track->cb_color_info[tmp])) {
 			track->cb_dirty = true;
 		}

drivers/gpu/drm/radeon/r600d.h+8−0

@@ -66,6 +66,14 @@ · 65 unmodified lines
66	#define CC_RB_BACKEND_DISABLE 0x98F4	66	#define CC_RB_BACKEND_DISABLE 0x98F4
67	#define BACKEND_DISABLE(x) ((x) << 16)	67	#define BACKEND_DISABLE(x) ((x) << 16)
68		68
		69	#define R_028808_CB_COLOR_CONTROL 0x28808
		70	#define S_028808_SPECIAL_OP(x) (((x) & 0x7) << 4)
		71	#define G_028808_SPECIAL_OP(x) (((x) >> 4) & 0x7)
		72	#define C_028808_SPECIAL_OP 0xFFFFFF8F
		73	#define V_028808_SPECIAL_NORMAL 0x00
		74	#define V_028808_SPECIAL_DISABLE 0x01
		75	#define V_028808_SPECIAL_RESOLVE_BOX 0x07
		76
69	#define CB_COLOR0_BASE 0x28040	77	#define CB_COLOR0_BASE 0x28040
70	#define CB_COLOR1_BASE 0x28044	78	#define CB_COLOR1_BASE 0x28044
71	#define CB_COLOR2_BASE 0x28048	79	#define CB_COLOR2_BASE 0x28048

drivers/gpu/drm/radeon/radeon_device.c+4−1

 	if (rdev->flags & RADEON_IS_AGP)
 		rdev->need_dma32 = true;
 	if ((rdev->flags & RADEON_IS_PCI) &&
-	    (rdev->family < CHIP_RS400))
+	    (rdev->family <= CHIP_RS740))
 		rdev->need_dma32 = true;
 	dma_bits = rdev->need_dma32 ? 32 : 40;
 		for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 			radeon_ring_restore(rdev, &rdev->ring[i],
 					    ring_sizes[i], ring_data[i]);
+			ring_sizes[i] = 0;
+			ring_data[i] = NULL;
 		}
 		r = radeon_ib_ring_tests(rdev);
 		if (r) {
 			dev_err(rdev->dev, "ib ring test failed (%d).\n", r);
 			if (saved) {
+				saved = false;
 				radeon_suspend(rdev);
 				goto retry;
 			}

drivers/gpu/drm/radeon/radeon_drv.c+2−1

  *   2.19.0 - r600-eg: MSAA textures
  *   2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
  *   2.21.0 - r600-r700: FMASK and CMASK
+ *   2.22.0 - r600 only: RESOLVE_BOX allowed
  */
 #define KMS_DRIVER_MAJOR	2
-#define KMS_DRIVER_MINOR	21
+#define KMS_DRIVER_MINOR	22
 #define KMS_DRIVER_PATCHLEVEL	0
 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
 int radeon_driver_unload_kms(struct drm_device *dev);

drivers/gpu/drm/radeon/reg_srcs/r600+0−1

@@ -744,7 +744,6 @@ r600 0x9400 · 743 unmodified lines
744	0x00028C38 CB_CLRCMP_DST	744	0x00028C38 CB_CLRCMP_DST
745	0x00028C3C CB_CLRCMP_MSK	745	0x00028C3C CB_CLRCMP_MSK
746	0x00028C34 CB_CLRCMP_SRC	746	0x00028C34 CB_CLRCMP_SRC
747	0x00028808 CB_COLOR_CONTROL
748	0x0002842C CB_FOG_BLUE	747	0x0002842C CB_FOG_BLUE
749	0x00028428 CB_FOG_GREEN	748	0x00028428 CB_FOG_GREEN
750	0x00028424 CB_FOG_RED	749	0x00028424 CB_FOG_RED

drivers/hid/hid-core.c+5−3

 	struct hid_driver *hdrv = hid->driver;
 	int ret;
-	hid_dump_input(hid, usage, value);
+	if (!list_empty(&hid->debug_list))
+		hid_dump_input(hid, usage, value);
 	if (hdrv && hdrv->event && hid_match_usage(hid, usage)) {
 		ret = hdrv->event(hid, field, usage, value);
 	{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M610X) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LABTEC, USB_DEVICE_ID_LABTEC_WIRELESS_KEYBOARD) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LCPOWER, USB_DEVICE_ID_LCPOWER_LC1000 ) },
- 	{ HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_TPKBD) },
+#if IS_ENABLED(CONFIG_HID_LENOVO_TPKBD)
+	{ HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_TPKBD) },
+#endif
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_MX3000_RECEIVER) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_S510_RECEIVER) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_S510_RECEIVER_2) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_PETALYNX, USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_PRIMAX, USB_DEVICE_ID_PRIMAX_KEYBOARD) },
-	{ HID_USB_DEVICE(USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_PIXART_IMAGING_INC_OPTICAL_TOUCH_SCREEN) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_KONE) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_ARVO) },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_ROCCAT, USB_DEVICE_ID_ROCCAT_ISKU) },

drivers/hid/hid-logitech-dj.c+2−2

@@ -439,7 +439,7 @@ static int logi_dj_recv_query_paired_devices(struct dj_receiver_dev *djrcv_dev) · 438 unmodified lines
439	struct dj_report *dj_report;	439	struct dj_report *dj_report;
440	int retval;	440	int retval;
441		441
442	dj_report = kzalloc(sizeof(dj_report), GFP_KERNEL);	442	dj_report = kzalloc(sizeof(struct dj_report), GFP_KERNEL);
443	if (!dj_report)	443	if (!dj_report)
444	return -ENOMEM;	444	return -ENOMEM;
445	dj_report->report_id = REPORT_ID_DJ_SHORT;	445	dj_report->report_id = REPORT_ID_DJ_SHORT;
@@ -456,7 +456,7 @@ static int logi_dj_recv_switch_to_dj_mode(struct dj_receiver_dev *djrcv_dev, · 10 unmodified lines
456	struct dj_report *dj_report;	456	struct dj_report *dj_report;
457	int retval;	457	int retval;
458		458
459	dj_report = kzalloc(sizeof(dj_report), GFP_KERNEL);	459	dj_report = kzalloc(sizeof(struct dj_report), GFP_KERNEL);
460	if (!dj_report)	460	if (!dj_report)
461	return -ENOMEM;	461	return -ENOMEM;
462	dj_report->report_id = REPORT_ID_DJ_SHORT;	462	dj_report->report_id = REPORT_ID_DJ_SHORT;

drivers/hid/usbhid/hid-quirks.c+1−0

@@ -70,6 +70,7 @@ static const struct hid_blacklist { · 69 unmodified lines
70	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_AXIS_295, HID_QUIRK_NOGET },	70	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_AXIS_295, HID_QUIRK_NOGET },
71	{ USB_VENDOR_ID_DMI, USB_DEVICE_ID_DMI_ENC, HID_QUIRK_NOGET },	71	{ USB_VENDOR_ID_DMI, USB_DEVICE_ID_DMI_ENC, HID_QUIRK_NOGET },
72	{ USB_VENDOR_ID_ELO, USB_DEVICE_ID_ELO_TS2700, HID_QUIRK_NOGET },	72	{ USB_VENDOR_ID_ELO, USB_DEVICE_ID_ELO_TS2700, HID_QUIRK_NOGET },
		73	{ USB_VENDOR_ID_MGE, USB_DEVICE_ID_MGE_UPS, HID_QUIRK_NOGET },
73	{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN, HID_QUIRK_NO_INIT_REPORTS },	74	{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN, HID_QUIRK_NO_INIT_REPORTS },
74	{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN1, HID_QUIRK_NO_INIT_REPORTS },	75	{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN1, HID_QUIRK_NO_INIT_REPORTS },
75	{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN2, HID_QUIRK_NO_INIT_REPORTS },	76	{ USB_VENDOR_ID_PIXART, USB_DEVICE_ID_PIXART_OPTICAL_TOUCH_SCREEN2, HID_QUIRK_NO_INIT_REPORTS },

drivers/hwmon/asus_atk0110.c+6−0

 		.matches = {
 			DMI_MATCH(DMI_BOARD_NAME, "SABERTOOTH X58")
 		}
+	}, {
+		/* Old interface reads the same sensor for fan0 and fan1 */
+		.ident = "Asus M5A78L",
+		.matches = {
+			DMI_MATCH(DMI_BOARD_NAME, "M5A78L")
+		}
 	},
 	{ }
 };

drivers/ide/ide-pm.c+2−2

@@ -4,7 +4,7 @@ · 3 unmodified lines
4		4
5	int generic_ide_suspend(struct device *dev, pm_message_t mesg)	5	int generic_ide_suspend(struct device *dev, pm_message_t mesg)
6	{	6	{
7	ide_drive_t *drive = dev_get_drvdata(dev);	7	ide_drive_t *drive = to_ide_device(dev);
8	ide_drive_t *pair = ide_get_pair_dev(drive);	8	ide_drive_t *pair = ide_get_pair_dev(drive);
9	ide_hwif_t *hwif = drive->hwif;	9	ide_hwif_t *hwif = drive->hwif;
10	struct request *rq;	10	struct request *rq;
@@ -40,7 +40,7 @@ int generic_ide_suspend(struct device *dev, pm_message_t mesg) · 29 unmodified lines
40		40
41	int generic_ide_resume(struct device *dev)	41	int generic_ide_resume(struct device *dev)
42	{	42	{
43	ide_drive_t *drive = dev_get_drvdata(dev);	43	ide_drive_t *drive = to_ide_device(dev);
44	ide_drive_t *pair = ide_get_pair_dev(drive);	44	ide_drive_t *pair = ide_get_pair_dev(drive);
45	ide_hwif_t *hwif = drive->hwif;	45	ide_hwif_t *hwif = drive->hwif;
46	struct request *rq;	46	struct request *rq;

drivers/input/keyboard/imx_keypad.c+3−0

 	/* Inhibit KDI and KRI interrupts. */
 	reg_val = readw(keypad->mmio_base + KPSR);
 	reg_val &= ~(KBD_STAT_KRIE | KBD_STAT_KDIE);
+	reg_val |= KBD_STAT_KPKR | KBD_STAT_KPKD;
 	writew(reg_val, keypad->mmio_base + KPSR);
 	/* Colums as open drain and disable all rows */
 	input_set_drvdata(input_dev, keypad);
 	/* Ensure that the keypad will stay dormant until opened */
+	clk_enable(keypad->clk);
 	imx_keypad_inhibit(keypad);
+	clk_disable(keypad->clk);
 	error = request_irq(irq, imx_keypad_irq_handler, 0,
 			    pdev->name, keypad);

drivers/input/serio/i8042-x86ia64io.h+14−0

@@ -176,6 +176,20 @@ static const struct dmi_system_id __initconst i8042_dmi_noloop_table[] = { · 175 unmodified lines
176	DMI_MATCH(DMI_PRODUCT_NAME, "Spring Peak"),	176	DMI_MATCH(DMI_PRODUCT_NAME, "Spring Peak"),
177	},	177	},
178	},	178	},
		179	{
		180	/* Gigabyte T1005 - defines wrong chassis type ("Other") */
		181	.matches = {
		182	DMI_MATCH(DMI_SYS_VENDOR, "GIGABYTE"),
		183	DMI_MATCH(DMI_PRODUCT_NAME, "T1005"),
		184	},
		185	},
		186	{
		187	/* Gigabyte T1005M/P - defines wrong chassis type ("Other") */
		188	.matches = {
		189	DMI_MATCH(DMI_SYS_VENDOR, "GIGABYTE"),
		190	DMI_MATCH(DMI_PRODUCT_NAME, "T1005M/P"),
		191	},
		192	},
179	{	193	{
180	.matches = {	194	.matches = {
181	DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),	195	DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),

drivers/input/tablet/wacom_wac.c+5−1

 	{ "Wacom Intuos5 M", WACOM_PKGLEN_INTUOS,  44704, 27940, 2047,
 	  63, INTUOS5, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };
 static const struct wacom_features wacom_features_0xF4 =
-	{ "Wacom Cintiq 24HD",    WACOM_PKGLEN_INTUOS,   104480, 65600, 2047,
+	{ "Wacom Cintiq 24HD",       WACOM_PKGLEN_INTUOS,   104480, 65600, 2047,
+	  63, WACOM_24HD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };
+static const struct wacom_features wacom_features_0xF8 =
+	{ "Wacom Cintiq 24HD touch", WACOM_PKGLEN_INTUOS,   104480, 65600, 2047,
 	  63, WACOM_24HD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES };
 static const struct wacom_features wacom_features_0x3F =
 	{ "Wacom Cintiq 21UX",    WACOM_PKGLEN_INTUOS,    87200, 65600, 1023,
 	{ USB_DEVICE_WACOM(0xEF) },
 	{ USB_DEVICE_WACOM(0x47) },
 	{ USB_DEVICE_WACOM(0xF4) },
+	{ USB_DEVICE_WACOM(0xF8) },
 	{ USB_DEVICE_WACOM(0xFA) },
 	{ USB_DEVICE_LENOVO(0x6004) },
 	{ }

drivers/input/touchscreen/edt-ft5x06.c+1−1

 {
 	if (tsdata->debug_dir)
 		debugfs_remove_recursive(tsdata->debug_dir);
+	kfree(tsdata->raw_buffer);
 }
 #else
 	if (gpio_is_valid(pdata->reset_pin))
 		gpio_free(pdata->reset_pin);
-	kfree(tsdata->raw_buffer);
 	kfree(tsdata);
 	return 0;

drivers/mmc/card/block.c+25−1

@@ -1411,7 +1411,8 @@ static int mmc_blk_issue_rq(struct mmc_queue mq, struct request req) · 1410 unmodified lines
1411	/* complete ongoing async transfer before issuing discard */	1411	/* complete ongoing async transfer before issuing discard */
1412	if (card->host->areq)	1412	if (card->host->areq)
1413	mmc_blk_issue_rw_rq(mq, NULL);	1413	mmc_blk_issue_rw_rq(mq, NULL);
1414	if (req->cmd_flags & REQ_SECURE)	1414	if (req->cmd_flags & REQ_SECURE &&
		1415	!(card->quirks & MMC_QUIRK_SEC_ERASE_TRIM_BROKEN))
1415	ret = mmc_blk_issue_secdiscard_rq(mq, req);	1416	ret = mmc_blk_issue_secdiscard_rq(mq, req);
1416	else	1417	else
1417	ret = mmc_blk_issue_discard_rq(mq, req);	1418	ret = mmc_blk_issue_discard_rq(mq, req);
@@ -1716,6 +1717,7 @@ force_ro_fail: · 298 unmodified lines
1716	#define CID_MANFID_SANDISK 0x2	1717	#define CID_MANFID_SANDISK 0x2
1717	#define CID_MANFID_TOSHIBA 0x11	1718	#define CID_MANFID_TOSHIBA 0x11
1718	#define CID_MANFID_MICRON 0x13	1719	#define CID_MANFID_MICRON 0x13
		1720	#define CID_MANFID_SAMSUNG 0x15
1719		1721
1720	static const struct mmc_fixup blk_fixups[] =	1722	static const struct mmc_fixup blk_fixups[] =
1721	{	1723	{
@@ -1752,6 +1754,28 @@ static const struct mmc_fixup blk_fixups[] = · 30 unmodified lines
1752	MMC_FIXUP(CID_NAME_ANY, CID_MANFID_MICRON, 0x200, add_quirk_mmc,	1754	MMC_FIXUP(CID_NAME_ANY, CID_MANFID_MICRON, 0x200, add_quirk_mmc,
1753	MMC_QUIRK_LONG_READ_TIME),	1755	MMC_QUIRK_LONG_READ_TIME),
1754		1756
		1757	/*
		1758	* On these Samsung MoviNAND parts, performing secure erase or
		1759	* secure trim can result in unrecoverable corruption due to a
		1760	* firmware bug.
		1761	*/
		1762	MMC_FIXUP("M8G2FA", CID_MANFID_SAMSUNG, CID_OEMID_ANY, add_quirk_mmc,
		1763	MMC_QUIRK_SEC_ERASE_TRIM_BROKEN),
		1764	MMC_FIXUP("MAG4FA", CID_MANFID_SAMSUNG, CID_OEMID_ANY, add_quirk_mmc,
		1765	MMC_QUIRK_SEC_ERASE_TRIM_BROKEN),
		1766	MMC_FIXUP("MBG8FA", CID_MANFID_SAMSUNG, CID_OEMID_ANY, add_quirk_mmc,
		1767	MMC_QUIRK_SEC_ERASE_TRIM_BROKEN),
		1768	MMC_FIXUP("MCGAFA", CID_MANFID_SAMSUNG, CID_OEMID_ANY, add_quirk_mmc,
		1769	MMC_QUIRK_SEC_ERASE_TRIM_BROKEN),
		1770	MMC_FIXUP("VAL00M", CID_MANFID_SAMSUNG, CID_OEMID_ANY, add_quirk_mmc,
		1771	MMC_QUIRK_SEC_ERASE_TRIM_BROKEN),
		1772	MMC_FIXUP("VYL00M", CID_MANFID_SAMSUNG, CID_OEMID_ANY, add_quirk_mmc,
		1773	MMC_QUIRK_SEC_ERASE_TRIM_BROKEN),
		1774	MMC_FIXUP("KYL00M", CID_MANFID_SAMSUNG, CID_OEMID_ANY, add_quirk_mmc,
		1775	MMC_QUIRK_SEC_ERASE_TRIM_BROKEN),
		1776	MMC_FIXUP("VZL00M", CID_MANFID_SAMSUNG, CID_OEMID_ANY, add_quirk_mmc,
		1777	MMC_QUIRK_SEC_ERASE_TRIM_BROKEN),
		1778
1755	END_FIXUP	1779	END_FIXUP
1756	};	1780	};
1757		1781

drivers/mmc/host/atmel-mci.c+5−1

 	bool	has_bad_data_ordering;
 	bool	need_reset_after_xfer;
 	bool	need_blksz_mul_4;
+	bool	need_notbusy_for_read_ops;
 };
 struct atmel_mci_dma {
 				__func__);
 			atmci_set_completed(host, EVENT_XFER_COMPLETE);
-			if (host->data->flags & MMC_DATA_WRITE) {
+			if (host->caps.need_notbusy_for_read_ops ||
+			   (host->data->flags & MMC_DATA_WRITE)) {
 				atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY);
 				state = STATE_WAITING_NOTBUSY;
 			} else if (host->mrq->stop) {
 	host->caps.has_bad_data_ordering = 1;
 	host->caps.need_reset_after_xfer = 1;
 	host->caps.need_blksz_mul_4 = 1;
+	host->caps.need_notbusy_for_read_ops = 0;
 	/* keep only major version number */
 	switch (version & 0xf00) {
 	case 0x200:
 		host->caps.has_rwproof = 1;
 		host->caps.need_blksz_mul_4 = 0;
+		host->caps.need_notbusy_for_read_ops = 1;
 	case 0x100:
 		host->caps.has_bad_data_ordering = 0;
 		host->caps.need_reset_after_xfer = 0;

drivers/mmc/host/bfin_sdh.c+0−7

@@ -49,13 +49,6 @@ · 48 unmodified lines
49	#define bfin_write_SDH_CFG bfin_write_RSI_CFG	49	#define bfin_write_SDH_CFG bfin_write_RSI_CFG
50	#endif	50	#endif
51		51
52	struct dma_desc_array {
53	unsigned long start_addr;
54	unsigned short cfg;
55	unsigned short x_count;
56	short x_modify;
57	} __packed;
58
59	struct sdh_host {	52	struct sdh_host {
60	struct mmc_host *mmc;	53	struct mmc_host *mmc;
61	spinlock_t lock;	54	spinlock_t lock;

drivers/mmc/host/dw_mmc.c+46−39

 {
 	struct dw_mci *host = slot->host;
 	u32 div;
+	u32 clk_en_a;
 	if (slot->clock != host->current_speed) {
 		div = host->bus_hz / slot->clock;
 		mci_send_cmd(slot,
 			     SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0);
-		/* enable clock */
+		/* enable clock; only low power if no SDIO */
-		mci_writel(host, CLKENA, ((SDMMC_CLKEN_ENABLE |
+		clk_en_a = SDMMC_CLKEN_ENABLE << slot->id;
-			   SDMMC_CLKEN_LOW_PWR) << slot->id));
+		if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id)))
+			clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id;
+		mci_writel(host, CLKENA, clk_en_a);
 		/* inform CIU */
 		mci_send_cmd(slot,
 	return present;
 }
+/*
+ * Disable lower power mode.
+ *
+ * Low power mode will stop the card clock when idle.  According to the
+ * description of the CLKENA register we should disable low power mode
+ * for SDIO cards if we need SDIO interrupts to work.
+ *
+ * This function is fast if low power mode is already disabled.
+ */
+static void dw_mci_disable_low_power(struct dw_mci_slot *slot)
+{
+	struct dw_mci *host = slot->host;
+	u32 clk_en_a;
+	const u32 clken_low_pwr = SDMMC_CLKEN_LOW_PWR << slot->id;
+	clk_en_a = mci_readl(host, CLKENA);
+	if (clk_en_a & clken_low_pwr) {
+		mci_writel(host, CLKENA, clk_en_a & ~clken_low_pwr);
+		mci_send_cmd(slot, SDMMC_CMD_UPD_CLK |
+			     SDMMC_CMD_PRV_DAT_WAIT, 0);
+	}
+}
 static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb)
 {
 	struct dw_mci_slot *slot = mmc_priv(mmc);
 	/* Enable/disable Slot Specific SDIO interrupt */
 	int_mask = mci_readl(host, INTMASK);
 	if (enb) {
+		/*
+		 * Turn off low power mode if it was enabled.  This is a bit of
+		 * a heavy operation and we disable / enable IRQs a lot, so
+		 * we'll leave low power mode disabled and it will get
+		 * re-enabled again in dw_mci_setup_bus().
+		 */
+		dw_mci_disable_low_power(slot);
 		mci_writel(host, INTMASK,
 			   (int_mask | SDMMC_INT_SDIO(slot->id)));
 	} else {
 			nbytes += len;
 			remain -= len;
 		} while (remain);
-		sg_miter->consumed = offset;
+		sg_miter->consumed = offset;
 		status = mci_readl(host, MINTSTS);
 		mci_writel(host, RINTSTS, SDMMC_INT_RXDR);
-		if (status & DW_MCI_DATA_ERROR_FLAGS) {
-			host->data_status = status;
-			data->bytes_xfered += nbytes;
-			sg_miter_stop(sg_miter);
-			host->sg = NULL;
-			smp_wmb();
-			set_bit(EVENT_DATA_ERROR, &host->pending_events);
-			tasklet_schedule(&host->tasklet);
-			return;
-		}
 	} while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/
 	data->bytes_xfered += nbytes;
 			nbytes += len;
 			remain -= len;
 		} while (remain);
-		sg_miter->consumed = offset;
+		sg_miter->consumed = offset;
 		status = mci_readl(host, MINTSTS);
 		mci_writel(host, RINTSTS, SDMMC_INT_TXDR);
-		if (status & DW_MCI_DATA_ERROR_FLAGS) {
-			host->data_status = status;
-			data->bytes_xfered += nbytes;
-			sg_miter_stop(sg_miter);
-			host->sg = NULL;
-			smp_wmb();
-			set_bit(EVENT_DATA_ERROR, &host->pending_events);
-			tasklet_schedule(&host->tasklet);
-			return;
-		}
 	} while (status & SDMMC_INT_TXDR); /* if TXDR write again */
 	data->bytes_xfered += nbytes;
 static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
 {
 	struct dw_mci *host = dev_id;
-	u32 status, pending;
+	u32 pending;
 	unsigned int pass_count = 0;
 	int i;
 	do {
-		status = mci_readl(host, RINTSTS);
 		pending = mci_readl(host, MINTSTS); /* read-only mask reg */
 		/*
 		if (pending & DW_MCI_CMD_ERROR_FLAGS) {
 			mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS);
-			host->cmd_status = status;
+			host->cmd_status = pending;
 			smp_wmb();
 			set_bit(EVENT_CMD_COMPLETE, &host->pending_events);
 		}
 		if (pending & DW_MCI_DATA_ERROR_FLAGS) {
 			/* if there is an error report DATA_ERROR */
 			mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS);
-			host->data_status = status;
+			host->data_status = pending;
 			smp_wmb();
 			set_bit(EVENT_DATA_ERROR, &host->pending_events);
-			if (!(pending & (SDMMC_INT_DTO | SDMMC_INT_DCRC |
+			tasklet_schedule(&host->tasklet);
-					 SDMMC_INT_SBE | SDMMC_INT_EBE)))
-				tasklet_schedule(&host->tasklet);
 		}
 		if (pending & SDMMC_INT_DATA_OVER) {
 			mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER);
 			if (!host->data_status)
-				host->data_status = status;
+				host->data_status = pending;
 			smp_wmb();
 			if (host->dir_status == DW_MCI_RECV_STATUS) {
 				if (host->sg != NULL)
 		if (pending & SDMMC_INT_CMD_DONE) {
 			mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE);
-			dw_mci_cmd_interrupt(host, status);
+			dw_mci_cmd_interrupt(host, pending);
 		}
 		if (pending & SDMMC_INT_CD) {

drivers/mmc/host/mxs-mmc.c+7−7

 	writel(stat & MXS_MMC_IRQ_BITS,
 	       host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR);
+	spin_unlock(&host->lock);
 	if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
 		mmc_signal_sdio_irq(host->mmc);
-	spin_unlock(&host->lock);
 	if (stat & BM_SSP_CTRL1_RESP_TIMEOUT_IRQ)
 		cmd->error = -ETIMEDOUT;
 	else if (stat & BM_SSP_CTRL1_RESP_ERR_IRQ)
 		       host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
 		writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
 		       host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_SET);
-		if (readl(host->base + HW_SSP_STATUS(host)) &
-				BM_SSP_STATUS_SDIO_IRQ)
-			mmc_signal_sdio_irq(host->mmc);
 	} else {
 		writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
 		       host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
 	}
 	spin_unlock_irqrestore(&host->lock, flags);
+	if (enable && readl(host->base + HW_SSP_STATUS(host)) &
+			BM_SSP_STATUS_SDIO_IRQ)
+		mmc_signal_sdio_irq(host->mmc);
 }
 static const struct mmc_host_ops mxs_mmc_ops = {

drivers/mmc/host/omap.c+11−4

 #include <asm/io.h>
 #include <asm/irq.h>
-#include <plat/board.h>
 #include <plat/mmc.h>
 #include <asm/gpio.h>
 #include <plat/dma.h>
 static void
 mmc_omap_xfer_data(struct mmc_omap_host *host, int write)
 {
-	int n;
+	int n, nwords;
 	if (host->buffer_bytes_left == 0) {
 		host->sg_idx++;
 	n = 64;
 	if (n > host->buffer_bytes_left)
 		n = host->buffer_bytes_left;
+	nwords = n / 2;
+	nwords += n & 1; /* handle odd number of bytes to transfer */
 	host->buffer_bytes_left -= n;
 	host->total_bytes_left -= n;
 	host->data->bytes_xfered += n;
 	if (write) {
-		__raw_writesw(host->virt_base + OMAP_MMC_REG(host, DATA), host->buffer, n);
+		__raw_writesw(host->virt_base + OMAP_MMC_REG(host, DATA),
+			      host->buffer, nwords);
 	} else {
-		__raw_readsw(host->virt_base + OMAP_MMC_REG(host, DATA), host->buffer, n);
+		__raw_readsw(host->virt_base + OMAP_MMC_REG(host, DATA),
+			     host->buffer, nwords);
 	}
+	host->buffer += nwords;
 }
 static inline void mmc_omap_report_irq(u16 status)

drivers/mmc/host/omap_hsmmc.c+0−1

@@ -40,7 +40,6 @@ · 39 unmodified lines
40	#include <linux/regulator/consumer.h>	40	#include <linux/regulator/consumer.h>
41	#include <linux/pm_runtime.h>	41	#include <linux/pm_runtime.h>
42	#include <mach/hardware.h>	42	#include <mach/hardware.h>
43	#include <plat/board.h>
44	#include <plat/mmc.h>	43	#include <plat/mmc.h>
45	#include <plat/cpu.h>	44	#include <plat/cpu.h>
46		45

drivers/mmc/host/sdhci-esdhc.h+3−3

 	int div = 1;
 	u32 temp;
+	if (clock == 0)
+		goto out;
 	temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);
 	temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN
 		| ESDHC_CLOCK_MASK);
 	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
-	if (clock == 0)
-		goto out;
 	while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
 		pre_div *= 2;

drivers/mtd/nand/omap2.c+225−76

@@ -101,6 +101,16 @@ · 100 unmodified lines
101	#define P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0)	101	#define P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0)
102	#define P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1)	102	#define P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1)
103		103
		104	#define PREFETCH_CONFIG1_CS_SHIFT 24
		105	#define ECC_CONFIG_CS_SHIFT 1
		106	#define CS_MASK 0x7
		107	#define ENABLE_PREFETCH (0x1 << 7)
		108	#define DMA_MPU_MODE_SHIFT 2
		109	#define ECCSIZE1_SHIFT 22
		110	#define ECC1RESULTSIZE 0x1
		111	#define ECCCLEAR 0x100
		112	#define ECC1 0x1
		113
104	/* oob info generated runtime depending on ecc algorithm and layout selected */	114	/* oob info generated runtime depending on ecc algorithm and layout selected */
105	static struct nand_ecclayout omap_oobinfo;	115	static struct nand_ecclayout omap_oobinfo;
106	/* Define some generic bad / good block scan pattern which are used	116	/* Define some generic bad / good block scan pattern which are used
@@ -124,15 +134,18 @@ struct omap_nand_info { · 17 unmodified lines
124		134
125	int gpmc_cs;	135	int gpmc_cs;
126	unsigned long phys_base;	136	unsigned long phys_base;
		137	unsigned long mem_size;
127	struct completion comp;	138	struct completion comp;
128	struct dma_chan *dma;	139	struct dma_chan *dma;
129	int gpmc_irq;	140	int gpmc_irq_fifo;
		141	int gpmc_irq_count;
130	enum {	142	enum {
131	OMAP_NAND_IO_READ = 0, /* read */	143	OMAP_NAND_IO_READ = 0, /* read */
132	OMAP_NAND_IO_WRITE, /* write */	144	OMAP_NAND_IO_WRITE, /* write */
133	} iomode;	145	} iomode;
134	u_char *buf;	146	u_char *buf;
135	int buf_len;	147	int buf_len;
		148	struct gpmc_nand_regs reg;
136		149
137	#ifdef CONFIG_MTD_NAND_OMAP_BCH	150	#ifdef CONFIG_MTD_NAND_OMAP_BCH
138	struct bch_control *bch;	151	struct bch_control *bch;
@@ -140,6 +153,63 @@ struct omap_nand_info { · 1 unmodified line
140	#endif	153	#endif
141	};	154	};
142		155
		156	/**
		157	* omap_prefetch_enable - configures and starts prefetch transfer
		158	* @cs: cs (chip select) number
		159	* @fifo_th: fifo threshold to be used for read/ write
		160	* @dma_mode: dma mode enable (1) or disable (0)
		161	* @u32_count: number of bytes to be transferred
		162	* @is_write: prefetch read(0) or write post(1) mode
		163	*/
		164	static int omap_prefetch_enable(int cs, int fifo_th, int dma_mode,
		165	unsigned int u32_count, int is_write, struct omap_nand_info *info)
		166	{
		167	u32 val;
		168
		169	if (fifo_th > PREFETCH_FIFOTHRESHOLD_MAX)
		170	return -1;
		171
		172	if (readl(info->reg.gpmc_prefetch_control))
		173	return -EBUSY;
		174
		175	/* Set the amount of bytes to be prefetched */
		176	writel(u32_count, info->reg.gpmc_prefetch_config2);
		177
		178	/* Set dma/mpu mode, the prefetch read / post write and
		179	* enable the engine. Set which cs is has requested for.
		180	*/
		181	val = ((cs << PREFETCH_CONFIG1_CS_SHIFT) \|
		182	PREFETCH_FIFOTHRESHOLD(fifo_th) \| ENABLE_PREFETCH \|
		183	(dma_mode << DMA_MPU_MODE_SHIFT) \| (0x1 & is_write));
		184	writel(val, info->reg.gpmc_prefetch_config1);
		185
		186	/* Start the prefetch engine */
		187	writel(0x1, info->reg.gpmc_prefetch_control);
		188
		189	return 0;
		190	}
		191
		192	/**
		193	* omap_prefetch_reset - disables and stops the prefetch engine
		194	*/
		195	static int omap_prefetch_reset(int cs, struct omap_nand_info *info)
		196	{
		197	u32 config1;
		198
		199	/* check if the same module/cs is trying to reset */
		200	config1 = readl(info->reg.gpmc_prefetch_config1);
		201	if (((config1 >> PREFETCH_CONFIG1_CS_SHIFT) & CS_MASK) != cs)
		202	return -EINVAL;
		203
		204	/* Stop the PFPW engine */
		205	writel(0x0, info->reg.gpmc_prefetch_control);
		206
		207	/* Reset/disable the PFPW engine */
		208	writel(0x0, info->reg.gpmc_prefetch_config1);
		209
		210	return 0;
		211	}
		212
143	/**	213	/**
144	* omap_hwcontrol - hardware specific access to control-lines	214	* omap_hwcontrol - hardware specific access to control-lines
145	* @mtd: MTD device structure	215	* @mtd: MTD device structure
@@ -158,13 +228,13 @@ static void omap_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) · 12 unmodified lines
158		228
159	if (cmd != NAND_CMD_NONE) {	229	if (cmd != NAND_CMD_NONE) {
160	if (ctrl & NAND_CLE)	230	if (ctrl & NAND_CLE)
161	gpmc_nand_write(info->gpmc_cs, GPMC_NAND_COMMAND, cmd);	231	writeb(cmd, info->reg.gpmc_nand_command);
162		232
163	else if (ctrl & NAND_ALE)	233	else if (ctrl & NAND_ALE)
164	gpmc_nand_write(info->gpmc_cs, GPMC_NAND_ADDRESS, cmd);	234	writeb(cmd, info->reg.gpmc_nand_address);
165		235
166	else /* NAND_NCE */	236	else /* NAND_NCE */
167	gpmc_nand_write(info->gpmc_cs, GPMC_NAND_DATA, cmd);	237	writeb(cmd, info->reg.gpmc_nand_data);
168	}	238	}
169	}	239	}
170		240
@@ -198,7 +268,8 @@ static void omap_write_buf8(struct mtd_info mtd, const u_char buf, int len) · 27 unmodified lines
198	iowrite8(*p++, info->nand.IO_ADDR_W);	268	iowrite8(*p++, info->nand.IO_ADDR_W);
199	/* wait until buffer is available for write */	269	/* wait until buffer is available for write */
200	do {	270	do {
201	status = gpmc_read_status(GPMC_STATUS_BUFFER);	271	status = readl(info->reg.gpmc_status) &
		272	GPMC_STATUS_BUFF_EMPTY;
202	} while (!status);	273	} while (!status);
203	}	274	}
204	}	275	}
@@ -235,7 +306,8 @@ static void omap_write_buf16(struct mtd_info mtd, const u_char buf, int len) · 30 unmodified lines
235	iowrite16(*p++, info->nand.IO_ADDR_W);	306	iowrite16(*p++, info->nand.IO_ADDR_W);
236	/* wait until buffer is available for write */	307	/* wait until buffer is available for write */
237	do {	308	do {
238	status = gpmc_read_status(GPMC_STATUS_BUFFER);	309	status = readl(info->reg.gpmc_status) &
		310	GPMC_STATUS_BUFF_EMPTY;
239	} while (!status);	311	} while (!status);
240	}	312	}
241	}	313	}
@@ -265,8 +337,8 @@ static void omap_read_buf_pref(struct mtd_info mtd, u_char buf, int len) · 23 unmodified lines
265	}	337	}
266		338
267	/* configure and start prefetch transfer */	339	/* configure and start prefetch transfer */
268	ret = gpmc_prefetch_enable(info->gpmc_cs,	340	ret = omap_prefetch_enable(info->gpmc_cs,
269	PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x0);	341	PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x0, info);
270	if (ret) {	342	if (ret) {
271	/* PFPW engine is busy, use cpu copy method */	343	/* PFPW engine is busy, use cpu copy method */
272	if (info->nand.options & NAND_BUSWIDTH_16)	344	if (info->nand.options & NAND_BUSWIDTH_16)
@@ -275,14 +347,15 @@ static void omap_read_buf_pref(struct mtd_info mtd, u_char buf, int len) · 2 unmodified lines
275	omap_read_buf8(mtd, (u_char *)p, len);	347	omap_read_buf8(mtd, (u_char *)p, len);
276	} else {	348	} else {
277	do {	349	do {
278	r_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);	350	r_count = readl(info->reg.gpmc_prefetch_status);
		351	r_count = GPMC_PREFETCH_STATUS_FIFO_CNT(r_count);
279	r_count = r_count >> 2;	352	r_count = r_count >> 2;
280	ioread32_rep(info->nand.IO_ADDR_R, p, r_count);	353	ioread32_rep(info->nand.IO_ADDR_R, p, r_count);
281	p += r_count;	354	p += r_count;
282	len -= r_count << 2;	355	len -= r_count << 2;
283	} while (len);	356	} while (len);
284	/* disable and stop the PFPW engine */	357	/* disable and stop the PFPW engine */
285	gpmc_prefetch_reset(info->gpmc_cs);	358	omap_prefetch_reset(info->gpmc_cs, info);
286	}	359	}
287	}	360	}
288		361
@@ -301,6 +374,7 @@ static void omap_write_buf_pref(struct mtd_info *mtd, · 12 unmodified lines
301	int i = 0, ret = 0;	374	int i = 0, ret = 0;
302	u16 p = (u16 )buf;	375	u16 p = (u16 )buf;
303	unsigned long tim, limit;	376	unsigned long tim, limit;
		377	u32 val;
304		378
305	/* take care of subpage writes */	379	/* take care of subpage writes */
306	if (len % 2 != 0) {	380	if (len % 2 != 0) {
@@ -310,8 +384,8 @@ static void omap_write_buf_pref(struct mtd_info *mtd, · 3 unmodified lines
310	}	384	}
311		385
312	/* configure and start prefetch transfer */	386	/* configure and start prefetch transfer */
313	ret = gpmc_prefetch_enable(info->gpmc_cs,	387	ret = omap_prefetch_enable(info->gpmc_cs,
314	PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x1);	388	PREFETCH_FIFOTHRESHOLD_MAX, 0x0, len, 0x1, info);
315	if (ret) {	389	if (ret) {
316	/* PFPW engine is busy, use cpu copy method */	390	/* PFPW engine is busy, use cpu copy method */
317	if (info->nand.options & NAND_BUSWIDTH_16)	391	if (info->nand.options & NAND_BUSWIDTH_16)
@@ -320,7 +394,8 @@ static void omap_write_buf_pref(struct mtd_info *mtd, · 2 unmodified lines
320	omap_write_buf8(mtd, (u_char *)p, len);	394	omap_write_buf8(mtd, (u_char *)p, len);
321	} else {	395	} else {
322	while (len) {	396	while (len) {
323	w_count = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);	397	w_count = readl(info->reg.gpmc_prefetch_status);
		398	w_count = GPMC_PREFETCH_STATUS_FIFO_CNT(w_count);
324	w_count = w_count >> 1;	399	w_count = w_count >> 1;
325	for (i = 0; (i < w_count) && len; i++, len -= 2)	400	for (i = 0; (i < w_count) && len; i++, len -= 2)
326	iowrite16(*p++, info->nand.IO_ADDR_W);	401	iowrite16(*p++, info->nand.IO_ADDR_W);
@@ -329,11 +404,14 @@ static void omap_write_buf_pref(struct mtd_info *mtd, · 2 unmodified lines
329	tim = 0;	404	tim = 0;
330	limit = (loops_per_jiffy *	405	limit = (loops_per_jiffy *
331	msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));	406	msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
332	while (gpmc_read_status(GPMC_PREFETCH_COUNT) && (tim++ < limit))	407	do {
333	cpu_relax();	408	cpu_relax();
		409	val = readl(info->reg.gpmc_prefetch_status);
		410	val = GPMC_PREFETCH_STATUS_COUNT(val);
		411	} while (val && (tim++ < limit));
334		412
335	/* disable and stop the PFPW engine */	413	/* disable and stop the PFPW engine */
336	gpmc_prefetch_reset(info->gpmc_cs);	414	omap_prefetch_reset(info->gpmc_cs, info);
337	}	415	}
338	}	416	}
339		417
@@ -365,6 +443,7 @@ static inline int omap_nand_dma_transfer(struct mtd_info mtd, void addr, · 25 unmodified lines
365	unsigned long tim, limit;	443	unsigned long tim, limit;
366	unsigned n;	444	unsigned n;
367	int ret;	445	int ret;
		446	u32 val;
368		447
369	if (addr >= high_memory) {	448	if (addr >= high_memory) {
370	struct page *p1;	449	struct page *p1;
@@ -396,9 +475,9 @@ static inline int omap_nand_dma_transfer(struct mtd_info mtd, void addr, · 25 unmodified lines
396	tx->callback_param = &info->comp;	475	tx->callback_param = &info->comp;
397	dmaengine_submit(tx);	476	dmaengine_submit(tx);
398		477
399	/* configure and start prefetch transfer */	478	/* configure and start prefetch transfer */
400	ret = gpmc_prefetch_enable(info->gpmc_cs,	479	ret = omap_prefetch_enable(info->gpmc_cs,
401	PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write);	480	PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write, info);
402	if (ret)	481	if (ret)
403	/* PFPW engine is busy, use cpu copy method */	482	/* PFPW engine is busy, use cpu copy method */
404	goto out_copy_unmap;	483	goto out_copy_unmap;
@@ -410,11 +489,15 @@ static inline int omap_nand_dma_transfer(struct mtd_info mtd, void addr, · 5 unmodified lines
410	wait_for_completion(&info->comp);	489	wait_for_completion(&info->comp);
411	tim = 0;	490	tim = 0;
412	limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));	491	limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
413	while (gpmc_read_status(GPMC_PREFETCH_COUNT) && (tim++ < limit))	492
		493	do {
414	cpu_relax();	494	cpu_relax();
		495	val = readl(info->reg.gpmc_prefetch_status);
		496	val = GPMC_PREFETCH_STATUS_COUNT(val);
		497	} while (val && (tim++ < limit));
415		498
416	/* disable and stop the PFPW engine */	499	/* disable and stop the PFPW engine */
417	gpmc_prefetch_reset(info->gpmc_cs);	500	omap_prefetch_reset(info->gpmc_cs, info);
418		501
419	dma_unmap_sg(info->dma->device->dev, &sg, 1, dir);	502	dma_unmap_sg(info->dma->device->dev, &sg, 1, dir);
420	return 0;	503	return 0;
@@ -471,13 +554,12 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev) · 50 unmodified lines
471	{	554	{
472	struct omap_nand_info info = (struct omap_nand_info ) dev;	555	struct omap_nand_info info = (struct omap_nand_info ) dev;
473	u32 bytes;	556	u32 bytes;
474	u32 irq_stat;
475		557
476	irq_stat = gpmc_read_status(GPMC_GET_IRQ_STATUS);	558	bytes = readl(info->reg.gpmc_prefetch_status);
477	bytes = gpmc_read_status(GPMC_PREFETCH_FIFO_CNT);	559	bytes = GPMC_PREFETCH_STATUS_FIFO_CNT(bytes);
478	bytes = bytes & 0xFFFC; /* io in multiple of 4 bytes */	560	bytes = bytes & 0xFFFC; /* io in multiple of 4 bytes */
479	if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */	561	if (info->iomode == OMAP_NAND_IO_WRITE) { /* checks for write io */
480	if (irq_stat & 0x2)	562	if (this_irq == info->gpmc_irq_count)
481	goto done;	563	goto done;
482		564
483	if (info->buf_len && (info->buf_len < bytes))	565	if (info->buf_len && (info->buf_len < bytes))
@@ -494,20 +576,17 @@ static irqreturn_t omap_nand_irq(int this_irq, void *dev) · 10 unmodified lines
494	(u32 *)info->buf, bytes >> 2);	576	(u32 *)info->buf, bytes >> 2);
495	info->buf = info->buf + bytes;	577	info->buf = info->buf + bytes;
496		578
497	if (irq_stat & 0x2)	579	if (this_irq == info->gpmc_irq_count)
498	goto done;	580	goto done;
499	}	581	}
500	gpmc_cs_configure(info->gpmc_cs, GPMC_SET_IRQ_STATUS, irq_stat);
501		582
502	return IRQ_HANDLED;	583	return IRQ_HANDLED;
503		584
504	done:	585	done:
505	complete(&info->comp);	586	complete(&info->comp);
506	/* disable irq */
507	gpmc_cs_configure(info->gpmc_cs, GPMC_ENABLE_IRQ, 0);
508		587
509	/* clear status */	588	disable_irq_nosync(info->gpmc_irq_fifo);
510	gpmc_cs_configure(info->gpmc_cs, GPMC_SET_IRQ_STATUS, irq_stat);	589	disable_irq_nosync(info->gpmc_irq_count);
511		590
512	return IRQ_HANDLED;	591	return IRQ_HANDLED;
513	}	592	}
@@ -534,22 +613,22 @@ static void omap_read_buf_irq_pref(struct mtd_info mtd, u_char buf, int len) · 20 unmodified lines
534	init_completion(&info->comp);	613	init_completion(&info->comp);
535		614
536	/* configure and start prefetch transfer */	615	/* configure and start prefetch transfer */
537	ret = gpmc_prefetch_enable(info->gpmc_cs,	616	ret = omap_prefetch_enable(info->gpmc_cs,
538	PREFETCH_FIFOTHRESHOLD_MAX/2, 0x0, len, 0x0);	617	PREFETCH_FIFOTHRESHOLD_MAX/2, 0x0, len, 0x0, info);
539	if (ret)	618	if (ret)
540	/* PFPW engine is busy, use cpu copy method */	619	/* PFPW engine is busy, use cpu copy method */
541	goto out_copy;	620	goto out_copy;
542		621
543	info->buf_len = len;	622	info->buf_len = len;
544	/* enable irq */	623
545	gpmc_cs_configure(info->gpmc_cs, GPMC_ENABLE_IRQ,	624	enable_irq(info->gpmc_irq_count);
546	(GPMC_IRQ_FIFOEVENTENABLE \| GPMC_IRQ_COUNT_EVENT));	625	enable_irq(info->gpmc_irq_fifo);
547		626
548	/* waiting for read to complete */	627	/* waiting for read to complete */
549	wait_for_completion(&info->comp);	628	wait_for_completion(&info->comp);
550		629
551	/* disable and stop the PFPW engine */	630	/* disable and stop the PFPW engine */
552	gpmc_prefetch_reset(info->gpmc_cs);	631	omap_prefetch_reset(info->gpmc_cs, info);
553	return;	632	return;
554		633
555	out_copy:	634	out_copy:
@@ -572,6 +651,7 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd, · 16 unmodified lines
572	struct omap_nand_info, mtd);	651	struct omap_nand_info, mtd);
573	int ret = 0;	652	int ret = 0;
574	unsigned long tim, limit;	653	unsigned long tim, limit;
		654	u32 val;
575		655
576	if (len <= mtd->oobsize) {	656	if (len <= mtd->oobsize) {
577	omap_write_buf_pref(mtd, buf, len);	657	omap_write_buf_pref(mtd, buf, len);
@@ -583,27 +663,31 @@ static void omap_write_buf_irq_pref(struct mtd_info *mtd, · 5 unmodified lines
583	init_completion(&info->comp);	663	init_completion(&info->comp);
584		664
585	/* configure and start prefetch transfer : size=24 */	665	/* configure and start prefetch transfer : size=24 */
586	ret = gpmc_prefetch_enable(info->gpmc_cs,	666	ret = omap_prefetch_enable(info->gpmc_cs,
587	(PREFETCH_FIFOTHRESHOLD_MAX * 3) / 8, 0x0, len, 0x1);	667	(PREFETCH_FIFOTHRESHOLD_MAX * 3) / 8, 0x0, len, 0x1, info);
588	if (ret)	668	if (ret)
589	/* PFPW engine is busy, use cpu copy method */	669	/* PFPW engine is busy, use cpu copy method */
590	goto out_copy;	670	goto out_copy;
591		671
592	info->buf_len = len;	672	info->buf_len = len;
593	/* enable irq */	673
594	gpmc_cs_configure(info->gpmc_cs, GPMC_ENABLE_IRQ,	674	enable_irq(info->gpmc_irq_count);
595	(GPMC_IRQ_FIFOEVENTENABLE \| GPMC_IRQ_COUNT_EVENT));	675	enable_irq(info->gpmc_irq_fifo);
596		676
597	/* waiting for write to complete */	677	/* waiting for write to complete */
598	wait_for_completion(&info->comp);	678	wait_for_completion(&info->comp);
		679
599	/* wait for data to flushed-out before reset the prefetch */	680	/* wait for data to flushed-out before reset the prefetch */
600	tim = 0;	681	tim = 0;
601	limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));	682	limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
602	while (gpmc_read_status(GPMC_PREFETCH_COUNT) && (tim++ < limit))	683	do {
		684	val = readl(info->reg.gpmc_prefetch_status);
		685	val = GPMC_PREFETCH_STATUS_COUNT(val);
603	cpu_relax();	686	cpu_relax();
		687	} while (val && (tim++ < limit));
604		688
605	/* disable and stop the PFPW engine */	689	/* disable and stop the PFPW engine */
606	gpmc_prefetch_reset(info->gpmc_cs);	690	omap_prefetch_reset(info->gpmc_cs, info);
607	return;	691	return;
608		692
609	out_copy:	693	out_copy:
@@ -843,7 +927,20 @@ static int omap_calculate_ecc(struct mtd_info mtd, const u_char dat, · 233 unmodified lines
843	{	927	{
844	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,	928	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
845	mtd);	929	mtd);
846	return gpmc_calculate_ecc(info->gpmc_cs, dat, ecc_code);	930	u32 val;
		931
		932	val = readl(info->reg.gpmc_ecc_config);
		933	if (((val >> ECC_CONFIG_CS_SHIFT) & ~CS_MASK) != info->gpmc_cs)
		934	return -EINVAL;
		935
		936	/* read ecc result */
		937	val = readl(info->reg.gpmc_ecc1_result);
		938	ecc_code++ = val; / P128e, ..., P1e */
		939	ecc_code++ = val >> 16; / P128o, ..., P1o */
		940	/* P2048o, P1024o, P512o, P256o, P2048e, P1024e, P512e, P256e */
		941	*ecc_code++ = ((val >> 8) & 0x0f) \| ((val >> 20) & 0xf0);
		942
		943	return 0;
847	}	944	}
848		945
849	/**	946	/**
@@ -857,8 +954,34 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int mode) · 7 unmodified lines
857	mtd);	954	mtd);
858	struct nand_chip *chip = mtd->priv;	955	struct nand_chip *chip = mtd->priv;
859	unsigned int dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;	956	unsigned int dev_width = (chip->options & NAND_BUSWIDTH_16) ? 1 : 0;
		957	u32 val;
		958
		959	/* clear ecc and enable bits */
		960	val = ECCCLEAR \| ECC1;
		961	writel(val, info->reg.gpmc_ecc_control);
		962
		963	/* program ecc and result sizes */
		964	val = ((((info->nand.ecc.size >> 1) - 1) << ECCSIZE1_SHIFT) \|
		965	ECC1RESULTSIZE);
		966	writel(val, info->reg.gpmc_ecc_size_config);
860		967
861	gpmc_enable_hwecc(info->gpmc_cs, mode, dev_width, info->nand.ecc.size);	968	switch (mode) {
		969	case NAND_ECC_READ:
		970	case NAND_ECC_WRITE:
		971	writel(ECCCLEAR \| ECC1, info->reg.gpmc_ecc_control);
		972	break;
		973	case NAND_ECC_READSYN:
		974	writel(ECCCLEAR, info->reg.gpmc_ecc_control);
		975	break;
		976	default:
		977	dev_info(&info->pdev->dev,
		978	"error: unrecognized Mode[%d]!\n", mode);
		979	break;
		980	}
		981
		982	/* (ECC 16 or 8 bit col) \| ( CS ) \| ECC Enable */
		983	val = (dev_width << 7) \| (info->gpmc_cs << 1) \| (0x1);
		984	writel(val, info->reg.gpmc_ecc_config);
862	}	985	}
863		986
864	/**	987	/**
@@ -886,10 +1009,9 @@ static int omap_wait(struct mtd_info mtd, struct nand_chip chip) · 21 unmodified lines
886	else	1009	else
887	timeo += (HZ * 20) / 1000;	1010	timeo += (HZ * 20) / 1000;
888		1011
889	gpmc_nand_write(info->gpmc_cs,	1012	writeb(NAND_CMD_STATUS & 0xFF, info->reg.gpmc_nand_command);
890	GPMC_NAND_COMMAND, (NAND_CMD_STATUS & 0xFF));
891	while (time_before(jiffies, timeo)) {	1013	while (time_before(jiffies, timeo)) {
892	status = gpmc_nand_read(info->gpmc_cs, GPMC_NAND_DATA);	1014	status = readb(info->reg.gpmc_nand_data);
893	if (status & NAND_STATUS_READY)	1015	if (status & NAND_STATUS_READY)
894	break;	1016	break;
895	cond_resched();	1017	cond_resched();
@@ -909,22 +1031,13 @@ static int omap_dev_ready(struct mtd_info *mtd) · 13 unmodified lines
909	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,	1031	struct omap_nand_info *info = container_of(mtd, struct omap_nand_info,
910	mtd);	1032	mtd);
911		1033
912	val = gpmc_read_status(GPMC_GET_IRQ_STATUS);	1034	val = readl(info->reg.gpmc_status);
		1035
913	if ((val & 0x100) == 0x100) {	1036	if ((val & 0x100) == 0x100) {
914	/* Clear IRQ Interrupt */	1037	return 1;
915	val \|= 0x100;
916	val &= ~(0x0);
917	gpmc_cs_configure(info->gpmc_cs, GPMC_SET_IRQ_STATUS, val);
918	} else {	1038	} else {
919	unsigned int cnt = 0;	1039	return 0;
920	while (cnt++ < 0x1FF) {
921	if ((val & 0x100) == 0x100)
922	return 0;
923	val = gpmc_read_status(GPMC_GET_IRQ_STATUS);
924	}
925	}	1040	}
926
927	return 1;
928	}	1041	}
929		1042
930	#ifdef CONFIG_MTD_NAND_OMAP_BCH	1043	#ifdef CONFIG_MTD_NAND_OMAP_BCH
@@ -1155,6 +1268,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev) · 224 unmodified lines
1155	int i, offset;	1268	int i, offset;
1156	dma_cap_mask_t mask;	1269	dma_cap_mask_t mask;
1157	unsigned sig;	1270	unsigned sig;
		1271	struct resource *res;
1158		1272
1159	pdata = pdev->dev.platform_data;	1273	pdata = pdev->dev.platform_data;
1160	if (pdata == NULL) {	1274	if (pdata == NULL) {
@@ -1174,7 +1288,7 @@ static int __devinit omap_nand_probe(struct platform_device *pdev) · 13 unmodified lines
1174	info->pdev = pdev;	1288	info->pdev = pdev;
1175		1289
1176	info->gpmc_cs = pdata->cs;	1290	info->gpmc_cs = pdata->cs;
1177	info->phys_base = pdata->phys_base;	1291	info->reg = pdata->reg;
1178		1292
1179	info->mtd.priv = &info->nand;	1293	info->mtd.priv = &info->nand;
1180	info->mtd.name = dev_name(&pdev->dev);	1294	info->mtd.name = dev_name(&pdev->dev);
@@ -1183,16 +1297,23 @@ static int __devinit omap_nand_probe(struct platform_device *pdev) · 2 unmodified lines
1183	info->nand.options = pdata->devsize;	1297	info->nand.options = pdata->devsize;
1184	info->nand.options \|= NAND_SKIP_BBTSCAN;	1298	info->nand.options \|= NAND_SKIP_BBTSCAN;
1185		1299
1186	/* NAND write protect off */	1300	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1187	gpmc_cs_configure(info->gpmc_cs, GPMC_CONFIG_WP, 0);	1301	if (res == NULL) {
		1302	err = -EINVAL;
		1303	dev_err(&pdev->dev, "error getting memory resource\n");
		1304	goto out_free_info;
		1305	}
		1306
		1307	info->phys_base = res->start;
		1308	info->mem_size = resource_size(res);
1188		1309
1189	if (!request_mem_region(info->phys_base, NAND_IO_SIZE,	1310	if (!request_mem_region(info->phys_base, info->mem_size,
1190	pdev->dev.driver->name)) {	1311	pdev->dev.driver->name)) {
1191	err = -EBUSY;	1312	err = -EBUSY;
1192	goto out_free_info;	1313	goto out_free_info;
1193	}	1314	}
1194		1315
1195	info->nand.IO_ADDR_R = ioremap(info->phys_base, NAND_IO_SIZE);	1316	info->nand.IO_ADDR_R = ioremap(info->phys_base, info->mem_size);
1196	if (!info->nand.IO_ADDR_R) {	1317	if (!info->nand.IO_ADDR_R) {
1197	err = -ENOMEM;	1318	err = -ENOMEM;
1198	goto out_release_mem_region;	1319	goto out_release_mem_region;
@@ -1265,17 +1386,39 @@ static int __devinit omap_nand_probe(struct platform_device *pdev) · 66 unmodified lines
1265	break;	1386	break;
1266		1387
1267	case NAND_OMAP_PREFETCH_IRQ:	1388	case NAND_OMAP_PREFETCH_IRQ:
1268	err = request_irq(pdata->gpmc_irq,	1389	info->gpmc_irq_fifo = platform_get_irq(pdev, 0);
1269	omap_nand_irq, IRQF_SHARED, "gpmc-nand", info);	1390	if (info->gpmc_irq_fifo <= 0) {
		1391	dev_err(&pdev->dev, "error getting fifo irq\n");
		1392	err = -ENODEV;
		1393	goto out_release_mem_region;
		1394	}
		1395	err = request_irq(info->gpmc_irq_fifo, omap_nand_irq,
		1396	IRQF_SHARED, "gpmc-nand-fifo", info);
1270	if (err) {	1397	if (err) {
1271	dev_err(&pdev->dev, "requesting irq(%d) error:%d",	1398	dev_err(&pdev->dev, "requesting irq(%d) error:%d",
1272	pdata->gpmc_irq, err);	1399	info->gpmc_irq_fifo, err);
		1400	info->gpmc_irq_fifo = 0;
		1401	goto out_release_mem_region;
		1402	}
		1403
		1404	info->gpmc_irq_count = platform_get_irq(pdev, 1);
		1405	if (info->gpmc_irq_count <= 0) {
		1406	dev_err(&pdev->dev, "error getting count irq\n");
		1407	err = -ENODEV;
		1408	goto out_release_mem_region;
		1409	}
		1410	err = request_irq(info->gpmc_irq_count, omap_nand_irq,
		1411	IRQF_SHARED, "gpmc-nand-count", info);
		1412	if (err) {
		1413	dev_err(&pdev->dev, "requesting irq(%d) error:%d",
		1414	info->gpmc_irq_count, err);
		1415	info->gpmc_irq_count = 0;
1273	goto out_release_mem_region;	1416	goto out_release_mem_region;
1274	} else {
1275	info->gpmc_irq = pdata->gpmc_irq;
1276	info->nand.read_buf = omap_read_buf_irq_pref;
1277	info->nand.write_buf = omap_write_buf_irq_pref;
1278	}	1417	}
		1418
		1419	info->nand.read_buf = omap_read_buf_irq_pref;
		1420	info->nand.write_buf = omap_write_buf_irq_pref;
		1421
1279	break;	1422	break;
1280		1423
1281	default:	1424	default:
@@ -1363,7 +1506,11 @@ static int __devinit omap_nand_probe(struct platform_device *pdev) · 81 unmodified lines
1363	out_release_mem_region:	1506	out_release_mem_region:
1364	if (info->dma)	1507	if (info->dma)
1365	dma_release_channel(info->dma);	1508	dma_release_channel(info->dma);
1366	release_mem_region(info->phys_base, NAND_IO_SIZE);	1509	if (info->gpmc_irq_count > 0)
		1510	free_irq(info->gpmc_irq_count, info);
		1511	if (info->gpmc_irq_fifo > 0)
		1512	free_irq(info->gpmc_irq_fifo, info);
		1513	release_mem_region(info->phys_base, info->mem_size);
1367	out_free_info:	1514	out_free_info:
1368	kfree(info);	1515	kfree(info);
1369		1516
@@ -1381,8 +1528,10 @@ static int omap_nand_remove(struct platform_device *pdev) · 11 unmodified lines
1381	if (info->dma)	1528	if (info->dma)
1382	dma_release_channel(info->dma);	1529	dma_release_channel(info->dma);
1383		1530
1384	if (info->gpmc_irq)	1531	if (info->gpmc_irq_count > 0)
1385	free_irq(info->gpmc_irq, info);	1532	free_irq(info->gpmc_irq_count, info);
		1533	if (info->gpmc_irq_fifo > 0)
		1534	free_irq(info->gpmc_irq_fifo, info);
1386		1535
1387	/* Release NAND device, its internal structures and partitions */	1536	/* Release NAND device, its internal structures and partitions */
1388	nand_release(&info->mtd);	1537	nand_release(&info->mtd);

drivers/mtd/onenand/omap2.c+16−15

 #include <plat/dma.h>
-#include <plat/board.h>
 #define DRIVER_NAME "omap2-onenand"
-#define ONENAND_IO_SIZE		SZ_128K
 #define ONENAND_BUFRAM_SIZE	(1024 * 5)
 struct omap2_onenand {
 	struct platform_device *pdev;
 	int gpmc_cs;
 	unsigned long phys_base;
+	unsigned int mem_size;
 	int gpio_irq;
 	struct mtd_info mtd;
 	struct onenand_chip onenand;
 	struct omap2_onenand *c;
 	struct onenand_chip *this;
 	int r;
+	struct resource *res;
 	pdata = pdev->dev.platform_data;
 	if (pdata == NULL) {
 		c->gpio_irq = 0;
 	}
-	r = gpmc_cs_request(c->gpmc_cs, ONENAND_IO_SIZE, &c->phys_base);
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-	if (r < 0) {
+	if (res == NULL) {
-		dev_err(&pdev->dev, "Cannot request GPMC CS\n");
+		r = -EINVAL;
+		dev_err(&pdev->dev, "error getting memory resource\n");
 		goto err_kfree;
 	}
-	if (request_mem_region(c->phys_base, ONENAND_IO_SIZE,
+	c->phys_base = res->start;
+	c->mem_size = resource_size(res);
+	if (request_mem_region(c->phys_base, c->mem_size,
 			       pdev->dev.driver->name) == NULL) {
-		dev_err(&pdev->dev, "Cannot reserve memory region at 0x%08lx, "
+		dev_err(&pdev->dev, "Cannot reserve memory region at 0x%08lx, size: 0x%x\n",
-			"size: 0x%x\n",	c->phys_base, ONENAND_IO_SIZE);
+						c->phys_base, c->mem_size);
 		r = -EBUSY;
-		goto err_free_cs;
+		goto err_kfree;
 	}
-	c->onenand.base = ioremap(c->phys_base, ONENAND_IO_SIZE);
+	c->onenand.base = ioremap(c->phys_base, c->mem_size);
 	if (c->onenand.base == NULL) {
 		r = -ENOMEM;
 		goto err_release_mem_region;
 err_iounmap:
 	iounmap(c->onenand.base);
 err_release_mem_region:
-	release_mem_region(c->phys_base, ONENAND_IO_SIZE);
+	release_mem_region(c->phys_base, c->mem_size);
-err_free_cs:
-	gpmc_cs_free(c->gpmc_cs);
 err_kfree:
 	kfree(c);
 		gpio_free(c->gpio_irq);
 	}
 	iounmap(c->onenand.base);
-	release_mem_region(c->phys_base, ONENAND_IO_SIZE);
+	release_mem_region(c->phys_base, c->mem_size);
 	gpmc_cs_free(c->gpmc_cs);
 	kfree(c);

drivers/mtd/ubi/vtbl.c+2−2

@@ -340,7 +340,7 @@ retry: · 339 unmodified lines
340	* of this LEB as it will be deleted and freed in 'ubi_add_to_av()'.	340	* of this LEB as it will be deleted and freed in 'ubi_add_to_av()'.
341	*/	341	*/
342	err = ubi_add_to_av(ubi, ai, new_aeb->pnum, new_aeb->ec, vid_hdr, 0);	342	err = ubi_add_to_av(ubi, ai, new_aeb->pnum, new_aeb->ec, vid_hdr, 0);
343	kfree(new_aeb);	343	kmem_cache_free(ai->aeb_slab_cache, new_aeb);
344	ubi_free_vid_hdr(ubi, vid_hdr);	344	ubi_free_vid_hdr(ubi, vid_hdr);
345	return err;	345	return err;
346		346
@@ -353,7 +353,7 @@ write_error: · 6 unmodified lines
353	list_add(&new_aeb->u.list, &ai->erase);	353	list_add(&new_aeb->u.list, &ai->erase);
354	goto retry;	354	goto retry;
355	}	355	}
356	kfree(new_aeb);	356	kmem_cache_free(ai->aeb_slab_cache, new_aeb);
357	out_free:	357	out_free:
358	ubi_free_vid_hdr(ubi, vid_hdr);	358	ubi_free_vid_hdr(ubi, vid_hdr);
359	return err;	359	return err;

drivers/net/can/sja1000/sja1000_platform.c+3−1

 	priv = netdev_priv(dev);
 	dev->irq = res_irq->start;
-	priv->irq_flags = res_irq->flags & (IRQF_TRIGGER_MASK | IRQF_SHARED);
+	priv->irq_flags = res_irq->flags & IRQF_TRIGGER_MASK;
+	if (res_irq->flags & IORESOURCE_IRQ_SHAREABLE)
+		priv->irq_flags |= IRQF_SHARED;
 	priv->reg_base = addr;
 	/* The CAN clock frequency is half the oscillator clock frequency */
 	priv->can.clock.freq = pdata->osc_freq / 2;

drivers/net/can/softing/softing_fw.c+4−3

 	const uint8_t *mem, *end, *dat;
 	uint16_t type, len;
 	uint32_t addr;
-	uint8_t *buf = NULL;
+	uint8_t *buf = NULL, *new_buf;
 	int buflen = 0;
 	int8_t type_end = 0;
 		if (len > buflen) {
 			/* align buflen */
 			buflen = (len + (1024-1)) & ~(1024-1);
-			buf = krealloc(buf, buflen, GFP_KERNEL);
+			new_buf = krealloc(buf, buflen, GFP_KERNEL);
-			if (!buf) {
+			if (!new_buf) {
 				ret = -ENOMEM;
 				goto failed;
 			}
+			buf = new_buf;
 		}
 		/* verify record data */
 		memcpy_fromio(buf, &dpram[addr + offset], len);

drivers/net/ethernet/broadcom/bnx2x/bnx2x.h+0−3

@@ -1708,9 +1708,6 @@ struct bnx2x_func_init_params { · 1707 unmodified lines
1708	continue; \	1708	continue; \
1709	else	1709	else
1710		1710
1711	#define for_each_napi_rx_queue(bp, var) \
1712	for ((var) = 0; (var) < bp->num_napi_queues; (var)++)
1713
1714	/* Skip OOO FP */	1711	/* Skip OOO FP */
1715	#define for_each_tx_queue(bp, var) \	1712	#define for_each_tx_queue(bp, var) \
1716	for ((var) = 0; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \	1713	for ((var) = 0; (var) < BNX2X_NUM_QUEUES(bp); (var)++) \

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c+4−0

 	 */
 	bnx2x_setup_tc(bp->dev, bp->max_cos);
+	/* Add all NAPI objects */
+	bnx2x_add_all_napi(bp);
 	bnx2x_napi_enable(bp);
 	/* set pf load just before approaching the MCP */
 		/* Disable HW interrupts, NAPI */
 		bnx2x_netif_stop(bp, 1);
+		/* Delete all NAPI objects */
+		bnx2x_del_all_napi(bp);
 		/* Release IRQs */
 		bnx2x_free_irq(bp);

drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.h+2−2

@@ -792,7 +792,7 @@ static inline void bnx2x_add_all_napi(struct bnx2x *bp) · 791 unmodified lines
792	bp->num_napi_queues = bp->num_queues;	792	bp->num_napi_queues = bp->num_queues;
793		793
794	/* Add NAPI objects */	794	/* Add NAPI objects */
795	for_each_napi_rx_queue(bp, i)	795	for_each_rx_queue(bp, i)
796	netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi),	796	netif_napi_add(bp->dev, &bnx2x_fp(bp, i, napi),
797	bnx2x_poll, BNX2X_NAPI_WEIGHT);	797	bnx2x_poll, BNX2X_NAPI_WEIGHT);
798	}	798	}
@@ -801,7 +801,7 @@ static inline void bnx2x_del_all_napi(struct bnx2x *bp) · 2 unmodified lines
801	{	801	{
802	int i;	802	int i;
803		803
804	for_each_napi_rx_queue(bp, i)	804	for_each_rx_queue(bp, i)
805	netif_napi_del(&bnx2x_fp(bp, i, napi));	805	netif_napi_del(&bnx2x_fp(bp, i, napi));
806	}	806	}
807		807

drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c+0−2

  */
 static void bnx2x_change_num_queues(struct bnx2x *bp, int num_rss)
 {
-	bnx2x_del_all_napi(bp);
 	bnx2x_disable_msi(bp);
 	BNX2X_NUM_QUEUES(bp) = num_rss + NON_ETH_CONTEXT_USE;
 	bnx2x_set_int_mode(bp);
-	bnx2x_add_all_napi(bp);
 }
 /**

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c+9−9

 	/* Disable HW interrupts, NAPI */
 	bnx2x_netif_stop(bp, 1);
+	/* Delete all NAPI objects */
+	bnx2x_del_all_napi(bp);
 	/* Release IRQs */
 	bnx2x_free_irq(bp);
 static void poll_bnx2x(struct net_device *dev)
 {
 	struct bnx2x *bp = netdev_priv(dev);
+	int i;
-	disable_irq(bp->pdev->irq);
+	for_each_eth_queue(bp, i) {
-	bnx2x_interrupt(bp->pdev->irq, dev);
+		struct bnx2x_fastpath *fp = &bp->fp[i];
-	enable_irq(bp->pdev->irq);
+		napi_schedule(&bnx2x_fp(bp, fp->index, napi));
+	}
 }
 #endif
 	 */
 	bnx2x_set_int_mode(bp);
-	/* Add all NAPI objects */
-	bnx2x_add_all_napi(bp);
 	rc = register_netdev(dev);
 	if (rc) {
 		dev_err(&pdev->dev, "Cannot register net device\n");
 	unregister_netdev(dev);
-	/* Delete all NAPI objects */
-	bnx2x_del_all_napi(bp);
 	/* Power on: we can't let PCI layer write to us while we are in D3 */
 	bnx2x_set_power_state(bp, PCI_D0);
 	bnx2x_tx_disable(bp);
 	bnx2x_netif_stop(bp, 0);
+	/* Delete all NAPI objects */
+	bnx2x_del_all_napi(bp);
 	del_timer_sync(&bp->timer);

drivers/net/ethernet/cirrus/cs89x0.c+5−5

 {
 	struct net_local *lp = netdev_priv(dev);
 	unsigned long flags;
+	u16 cfg;
 	spin_lock_irqsave(&lp->lock, flags);
 	if (dev->flags & IFF_PROMISC)
 	/* in promiscuous mode, we accept errored packets,
 	 * so we have to enable interrupts on them also
 	 */
-	writereg(dev, PP_RxCFG,
+	cfg = lp->curr_rx_cfg;
-		 (lp->curr_rx_cfg |
+	if (lp->rx_mode == RX_ALL_ACCEPT)
-		  (lp->rx_mode == RX_ALL_ACCEPT)
+		cfg |= RX_CRC_ERROR_ENBL | RX_RUNT_ENBL | RX_EXTRA_DATA_ENBL;
-		  ? (RX_CRC_ERROR_ENBL | RX_RUNT_ENBL | RX_EXTRA_DATA_ENBL)
+	writereg(dev, PP_RxCFG, cfg);
-		  : 0));
 	spin_unlock_irqrestore(&lp->lock, flags);
 }

drivers/net/ethernet/emulex/benet/be_cmds.c+4−2

 	int num = 0, status = 0;
 	struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
-	spin_lock_bh(&adapter->mcc_cq_lock);
+	spin_lock(&adapter->mcc_cq_lock);
 	while ((compl = be_mcc_compl_get(adapter))) {
 		if (compl->flags & CQE_FLAGS_ASYNC_MASK) {
 			/* Interpret flags as an async trailer */
 	if (num)
 		be_cq_notify(adapter, mcc_obj->cq.id, mcc_obj->rearm_cq, num);
-	spin_unlock_bh(&adapter->mcc_cq_lock);
+	spin_unlock(&adapter->mcc_cq_lock);
 	return status;
 }
 		if (be_error(adapter))
 			return -EIO;
+		local_bh_disable();
 		status = be_process_mcc(adapter);
+		local_bh_enable();
 		if (atomic_read(&mcc_obj->q.used) == 0)
 			break;

drivers/net/ethernet/emulex/benet/be_main.c+2−0

 	/* when interrupts are not yet enabled, just reap any pending
 	* mcc completions */
 	if (!netif_running(adapter->netdev)) {
+		local_bh_disable();
 		be_process_mcc(adapter);
+		local_bh_enable();
 		goto reschedule;
 	}

drivers/net/ethernet/freescale/gianfar.c+1−1

@@ -1041,7 +1041,7 @@ static int gfar_probe(struct platform_device *ofdev) · 1040 unmodified lines
1041		1041
1042	if (priv->device_flags & FSL_GIANFAR_DEV_HAS_VLAN) {	1042	if (priv->device_flags & FSL_GIANFAR_DEV_HAS_VLAN) {
1043	dev->hw_features \|= NETIF_F_HW_VLAN_TX \| NETIF_F_HW_VLAN_RX;	1043	dev->hw_features \|= NETIF_F_HW_VLAN_TX \| NETIF_F_HW_VLAN_RX;
1044	dev->features \|= NETIF_F_HW_VLAN_TX \| NETIF_F_HW_VLAN_RX;	1044	dev->features \|= NETIF_F_HW_VLAN_RX;
1045	}	1045	}
1046		1046
1047	if (priv->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) {	1047	if (priv->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) {

drivers/net/ethernet/intel/e1000e/e1000.h+1−0

@@ -310,6 +310,7 @@ struct e1000_adapter { · 309 unmodified lines
310	*/	310	*/
311	struct e1000_ring tx_ring / One per active queue */	311	struct e1000_ring tx_ring / One per active queue */
312	____cacheline_aligned_in_smp;	312	____cacheline_aligned_in_smp;
		313	u32 tx_fifo_limit;
313		314
314	struct napi_struct napi;	315	struct napi_struct napi;
315		316

drivers/net/ethernet/intel/e1000e/netdev.c+23−25

@@ -3516,6 +3516,15 @@ void e1000e_reset(struct e1000_adapter *adapter) · 3515 unmodified lines
3516	break;	3516	break;
3517	}	3517	}
3518		3518
		3519	/*
		3520	* Alignment of Tx data is on an arbitrary byte boundary with the
		3521	* maximum size per Tx descriptor limited only to the transmit
		3522	* allocation of the packet buffer minus 96 bytes with an upper
		3523	* limit of 24KB due to receive synchronization limitations.
		3524	*/
		3525	adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
		3526	24 << 10);
		3527
3519	/*	3528	/*
3520	* Disable Adaptive Interrupt Moderation if 2 full packets cannot	3529	* Disable Adaptive Interrupt Moderation if 2 full packets cannot
3521	* fit in receive buffer.	3530	* fit in receive buffer.
@@ -4785,12 +4794,9 @@ static bool e1000_tx_csum(struct e1000_ring tx_ring, struct sk_buff skb) · 1263 unmodified lines
4785	return 1;	4794	return 1;
4786	}	4795	}
4787		4796
4788	#define E1000_MAX_PER_TXD 8192
4789	#define E1000_MAX_TXD_PWR 12
4790
4791	static int e1000_tx_map(struct e1000_ring tx_ring, struct sk_buff skb,	4797	static int e1000_tx_map(struct e1000_ring tx_ring, struct sk_buff skb,
4792	unsigned int first, unsigned int max_per_txd,	4798	unsigned int first, unsigned int max_per_txd,
4793	unsigned int nr_frags, unsigned int mss)	4799	unsigned int nr_frags)
4794	{	4800	{
4795	struct e1000_adapter *adapter = tx_ring->adapter;	4801	struct e1000_adapter *adapter = tx_ring->adapter;
4796	struct pci_dev *pdev = adapter->pdev;	4802	struct pci_dev *pdev = adapter->pdev;
@@ -5023,20 +5029,19 @@ static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size) · 226 unmodified lines
5023		5029
5024	static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)	5030	static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5025	{	5031	{
		5032	BUG_ON(size > tx_ring->count);
		5033
5026	if (e1000_desc_unused(tx_ring) >= size)	5034	if (e1000_desc_unused(tx_ring) >= size)
5027	return 0;	5035	return 0;
5028	return __e1000_maybe_stop_tx(tx_ring, size);	5036	return __e1000_maybe_stop_tx(tx_ring, size);
5029	}	5037	}
5030		5038
5031	#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1)
5032	static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,	5039	static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5033	struct net_device *netdev)	5040	struct net_device *netdev)
5034	{	5041	{
5035	struct e1000_adapter *adapter = netdev_priv(netdev);	5042	struct e1000_adapter *adapter = netdev_priv(netdev);
5036	struct e1000_ring *tx_ring = adapter->tx_ring;	5043	struct e1000_ring *tx_ring = adapter->tx_ring;
5037	unsigned int first;	5044	unsigned int first;
5038	unsigned int max_per_txd = E1000_MAX_PER_TXD;
5039	unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
5040	unsigned int tx_flags = 0;	5045	unsigned int tx_flags = 0;
5041	unsigned int len = skb_headlen(skb);	5046	unsigned int len = skb_headlen(skb);
5042	unsigned int nr_frags;	5047	unsigned int nr_frags;
@@ -5056,18 +5061,8 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, · 13 unmodified lines
5056	}	5061	}
5057		5062
5058	mss = skb_shinfo(skb)->gso_size;	5063	mss = skb_shinfo(skb)->gso_size;
5059	/*
5060	* The controller does a simple calculation to
5061	* make sure there is enough room in the FIFO before
5062	* initiating the DMA for each buffer. The calc is:
5063	* 4 = ceil(buffer len/mss). To make sure we don't
5064	* overrun the FIFO, adjust the max buffer len if mss
5065	* drops.
5066	*/
5067	if (mss) {	5064	if (mss) {
5068	u8 hdr_len;	5065	u8 hdr_len;
5069	max_per_txd = min(mss << 2, max_per_txd);
5070	max_txd_pwr = fls(max_per_txd) - 1;
5071		5066
5072	/*	5067	/*
5073	* TSO Workaround for 82571/2/3 Controllers -- if skb->data	5068	* TSO Workaround for 82571/2/3 Controllers -- if skb->data
@@ -5097,12 +5092,12 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, · 23 unmodified lines
5097	count++;	5092	count++;
5098	count++;	5093	count++;
5099		5094
5100	count += TXD_USE_COUNT(len, max_txd_pwr);	5095	count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5101		5096
5102	nr_frags = skb_shinfo(skb)->nr_frags;	5097	nr_frags = skb_shinfo(skb)->nr_frags;
5103	for (f = 0; f < nr_frags; f++)	5098	for (f = 0; f < nr_frags; f++)
5104	count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),	5099	count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5105	max_txd_pwr);	5100	adapter->tx_fifo_limit);
5106		5101
5107	if (adapter->hw.mac.tx_pkt_filtering)	5102	if (adapter->hw.mac.tx_pkt_filtering)
5108	e1000_transfer_dhcp_info(adapter, skb);	5103	e1000_transfer_dhcp_info(adapter, skb);
@@ -5144,15 +5139,18 @@ static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb, · 35 unmodified lines
5144	tx_flags \|= E1000_TX_FLAGS_NO_FCS;	5139	tx_flags \|= E1000_TX_FLAGS_NO_FCS;
5145		5140
5146	/* if count is 0 then mapping error has occurred */	5141	/* if count is 0 then mapping error has occurred */
5147	count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss);	5142	count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
		5143	nr_frags);
5148	if (count) {	5144	if (count) {
5149	skb_tx_timestamp(skb);	5145	skb_tx_timestamp(skb);
5150		5146
5151	netdev_sent_queue(netdev, skb->len);	5147	netdev_sent_queue(netdev, skb->len);
5152	e1000_tx_queue(tx_ring, tx_flags, count);	5148	e1000_tx_queue(tx_ring, tx_flags, count);
5153	/* Make sure there is space in the ring for the next send. */	5149	/* Make sure there is space in the ring for the next send. */
5154	e1000_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 2);	5150	e1000_maybe_stop_tx(tx_ring,
5155		5151	(MAX_SKB_FRAGS *
		5152	DIV_ROUND_UP(PAGE_SIZE,
		5153	adapter->tx_fifo_limit) + 2));
5156	} else {	5154	} else {
5157	dev_kfree_skb_any(skb);	5155	dev_kfree_skb_any(skb);
5158	tx_ring->buffer_info[first].time_stamp = 0;	5156	tx_ring->buffer_info[first].time_stamp = 0;
@@ -6327,8 +6325,8 @@ static int __devinit e1000_probe(struct pci_dev *pdev, · 1168 unmodified lines
6327	adapter->hw.phy.autoneg_advertised = 0x2f;	6325	adapter->hw.phy.autoneg_advertised = 0x2f;
6328		6326
6329	/* ring size defaults */	6327	/* ring size defaults */
6330	adapter->rx_ring->count = 256;	6328	adapter->rx_ring->count = E1000_DEFAULT_RXD;
6331	adapter->tx_ring->count = 256;	6329	adapter->tx_ring->count = E1000_DEFAULT_TXD;
6332		6330
6333	/*	6331	/*
6334	* Initial Wake on LAN setting - If APM wake is enabled in	6332	* Initial Wake on LAN setting - If APM wake is enabled in

drivers/net/ethernet/sfc/ethtool.c+2−2

@@ -863,8 +863,8 @@ static int efx_ethtool_get_class_rule(struct efx_nic *efx, · 862 unmodified lines
863	&ip_entry->ip4dst, &ip_entry->pdst);	863	&ip_entry->ip4dst, &ip_entry->pdst);
864	if (rc != 0) {	864	if (rc != 0) {
865	rc = efx_filter_get_ipv4_full(	865	rc = efx_filter_get_ipv4_full(
866	&spec, &proto, &ip_entry->ip4src, &ip_entry->psrc,	866	&spec, &proto, &ip_entry->ip4dst, &ip_entry->pdst,
867	&ip_entry->ip4dst, &ip_entry->pdst);	867	&ip_entry->ip4src, &ip_entry->psrc);
868	EFX_WARN_ON_PARANOID(rc);	868	EFX_WARN_ON_PARANOID(rc);
869	ip_mask->ip4src = ~0;	869	ip_mask->ip4src = ~0;
870	ip_mask->psrc = ~0;	870	ip_mask->psrc = ~0;

drivers/net/ethernet/stmicro/stmmac/common.h+5−0

   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *******************************************************************************/
+#ifndef __COMMON_H__
+#define __COMMON_H__
 #include <linux/etherdevice.h>
 #include <linux/netdevice.h>
 #include <linux/phy.h>
 extern void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr);
 extern const struct stmmac_ring_mode_ops ring_mode_ops;
+#endif /* __COMMON_H__ */

drivers/net/ethernet/stmicro/stmmac/descs.h+6−0

   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *******************************************************************************/
+#ifndef __DESCS_H__
+#define __DESCS_H__
 struct dma_desc {
 	/* Receive descriptor */
 	union {
 					 * is not calculated */
 	cic_full = 3,		/* IP header and pseudoheader */
 };
+#endif /* __DESCS_H__ */

drivers/net/ethernet/stmicro/stmmac/descs_com.h+5−0

   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *******************************************************************************/
+#ifndef __DESC_COM_H__
+#define __DESC_COM_H__
 #if defined(CONFIG_STMMAC_RING)
 static inline void ehn_desc_rx_set_on_ring_chain(struct dma_desc *p, int end)
 {
 	p->des01.tx.buffer1_size = len;
 }
 #endif
+#endif /* __DESC_COM_H__ */

drivers/net/ethernet/stmicro/stmmac/dwmac100.h+5−0

   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *******************************************************************************/
+#ifndef __DWMAC100_H__
+#define __DWMAC100_H__
 #include <linux/phy.h>
 #include "common.h"
 #define DMA_MISSED_FRAME_M_CNTR	0x0000ffff	/* Missed Frame Couinter */
 extern const struct stmmac_dma_ops dwmac100_dma_ops;
+#endif /* __DWMAC100_H__ */

drivers/net/ethernet/stmicro/stmmac/dwmac1000.h+4−1

   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *******************************************************************************/
+#ifndef __DWMAC1000_H__
+#define __DWMAC1000_H__
 #include <linux/phy.h>
 #include "common.h"
 #define GMAC_MMC_RX_CSUM_OFFLOAD   0x208
 /* Synopsys Core versions */
-#define	DWMAC_CORE_3_40	34
+#define	DWMAC_CORE_3_40	0x34
 extern const struct stmmac_dma_ops dwmac1000_dma_ops;
+#endif /* __DWMAC1000_H__ */

drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h+5−0

   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *******************************************************************************/
+#ifndef __DWMAC_DMA_H__
+#define __DWMAC_DMA_H__
 /* DMA CRS Control and Status Register Mapping */
 #define DMA_BUS_MODE		0x00001000	/* Bus Mode */
 #define DMA_XMT_POLL_DEMAND	0x00001004	/* Transmit Poll Demand */
 extern void dwmac_dma_stop_rx(void __iomem *ioaddr);
 extern int dwmac_dma_interrupt(void __iomem *ioaddr,
 				struct stmmac_extra_stats *x);
+#endif /* __DWMAC_DMA_H__ */

drivers/net/ethernet/stmicro/stmmac/mmc.h+5−0

   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *******************************************************************************/
+#ifndef __MMC_H__
+#define __MMC_H__
 /* MMC control register */
 /* When set, all counter are reset */
 #define MMC_CNTRL_COUNTER_RESET		0x1
 extern void dwmac_mmc_ctrl(void __iomem *ioaddr, unsigned int mode);
 extern void dwmac_mmc_intr_all_mask(void __iomem *ioaddr);
 extern void dwmac_mmc_read(void __iomem *ioaddr, struct stmmac_counters *mmc);
+#endif /* __MMC_H__ */

drivers/net/ethernet/stmicro/stmmac/mmc_core.c+3−3

@@ -33,7 +33,7 @@ · 32 unmodified lines
33	#define MMC_TX_INTR 0x00000108 /* MMC TX Interrupt */	33	#define MMC_TX_INTR 0x00000108 /* MMC TX Interrupt */
34	#define MMC_RX_INTR_MASK 0x0000010c /* MMC Interrupt Mask */	34	#define MMC_RX_INTR_MASK 0x0000010c /* MMC Interrupt Mask */
35	#define MMC_TX_INTR_MASK 0x00000110 /* MMC Interrupt Mask */	35	#define MMC_TX_INTR_MASK 0x00000110 /* MMC Interrupt Mask */
36	#define MMC_DEFAUL_MASK 0xffffffff	36	#define MMC_DEFAULT_MASK 0xffffffff
37		37
38	/* MMC TX counter registers */	38	/* MMC TX counter registers */
39		39
@@ -147,8 +147,8 @@ void dwmac_mmc_ctrl(void __iomem *ioaddr, unsigned int mode) · 107 unmodified lines
147	/* To mask all all interrupts.*/	147	/* To mask all all interrupts.*/
148	void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)	148	void dwmac_mmc_intr_all_mask(void __iomem *ioaddr)
149	{	149	{
150	writel(MMC_DEFAUL_MASK, ioaddr + MMC_RX_INTR_MASK);	150	writel(MMC_DEFAULT_MASK, ioaddr + MMC_RX_INTR_MASK);
151	writel(MMC_DEFAUL_MASK, ioaddr + MMC_TX_INTR_MASK);	151	writel(MMC_DEFAULT_MASK, ioaddr + MMC_TX_INTR_MASK);
152	}	152	}
153		153
154	/* This reads the MAC core counters (if actaully supported).	154	/* This reads the MAC core counters (if actaully supported).

drivers/net/ethernet/stmicro/stmmac/stmmac.h+5−0

   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *******************************************************************************/
+#ifndef __STMMAC_H__
+#define __STMMAC_H__
 #define STMMAC_RESOURCE_NAME   "stmmaceth"
 #define DRV_MODULE_VERSION	"March_2012"
 {
 }
 #endif /* CONFIG_STMMAC_PCI */
+#endif /* __STMMAC_H__ */

drivers/net/ethernet/stmicro/stmmac/stmmac_timer.h+4−0

   Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
 *******************************************************************************/
+#ifndef __STMMAC_TIMER_H__
+#define __STMMAC_TIMER_H__
 struct stmmac_timer {
 	void (*timer_start) (unsigned int new_freq);
 extern int tmu2_register_user(void *fnt, void *data);
 extern void tmu2_unregister_user(void);
 #endif
+#endif /* __STMMAC_TIMER_H__ */

drivers/net/ethernet/ti/davinci_mdio.c+3−1

 	struct device *dev = &pdev->dev;
 	struct davinci_mdio_data *data = dev_get_drvdata(dev);
-	if (data->bus)
+	if (data->bus) {
+		mdiobus_unregister(data->bus);
 		mdiobus_free(data->bus);
+	}
 	if (data->clk)
 		clk_put(data->clk);

drivers/net/fddi/skfp/pmf.c+1−1

@@ -673,7 +673,7 @@ void smt_add_para(struct s_smc smc, struct s_pcon pcon, u_short para, · 672 unmodified lines
673	sm_pm_get_ls(smc,port_to_mib(smc,port))) ;	673	sm_pm_get_ls(smc,port_to_mib(smc,port))) ;
674	break ;	674	break ;
675	case SMT_P_REASON :	675	case SMT_P_REASON :
676	* (u_long *) to = 0 ;	676	(u32 )to = 0 ;
677	sp_len = 4 ;	677	sp_len = 4 ;
678	goto sp_done ;	678	goto sp_done ;
679	case SMT_P1033 : /* time stamp */	679	case SMT_P1033 : /* time stamp */

drivers/net/usb/qmi_wwan.c+4−0

 	/* 5. Gobi 2000 and 3000 devices */
 	{QMI_GOBI_DEVICE(0x413c, 0x8186)},	/* Dell Gobi 2000 Modem device (N0218, VU936) */
+	{QMI_GOBI_DEVICE(0x413c, 0x8194)},	/* Dell Gobi 3000 Composite */
 	{QMI_GOBI_DEVICE(0x05c6, 0x920b)},	/* Generic Gobi 2000 Modem device */
+	{QMI_GOBI_DEVICE(0x05c6, 0x920d)},	/* Gobi 3000 Composite */
 	{QMI_GOBI_DEVICE(0x05c6, 0x9225)},	/* Sony Gobi 2000 Modem device (N0279, VU730) */
 	{QMI_GOBI_DEVICE(0x05c6, 0x9245)},	/* Samsung Gobi 2000 Modem device (VL176) */
 	{QMI_GOBI_DEVICE(0x03f0, 0x251d)},	/* HP Gobi 2000 Modem device (VP412) */
 	{QMI_GOBI_DEVICE(0x1199, 0x9015)},	/* Sierra Wireless Gobi 3000 Modem device */
 	{QMI_GOBI_DEVICE(0x1199, 0x9019)},	/* Sierra Wireless Gobi 3000 Modem device */
 	{QMI_GOBI_DEVICE(0x1199, 0x901b)},	/* Sierra Wireless MC7770 */
+	{QMI_GOBI_DEVICE(0x12d1, 0x14f1)},	/* Sony Gobi 3000 Composite */
+	{QMI_GOBI_DEVICE(0x1410, 0xa021)},	/* Foxconn Gobi 3000 Modem device (Novatel E396) */
 	{ }					/* END */
 };

drivers/net/usb/usbnet.c+1−1

@@ -1573,7 +1573,7 @@ int usbnet_resume (struct usb_interface *intf) · 1572 unmodified lines
1573	netif_device_present(dev->net) &&	1573	netif_device_present(dev->net) &&
1574	!timer_pending(&dev->delay) &&	1574	!timer_pending(&dev->delay) &&
1575	!test_bit(EVENT_RX_HALT, &dev->flags))	1575	!test_bit(EVENT_RX_HALT, &dev->flags))
1576	rx_alloc_submit(dev, GFP_KERNEL);	1576	rx_alloc_submit(dev, GFP_NOIO);
1577		1577
1578	if (!(dev->txq.qlen >= TX_QLEN(dev)))	1578	if (!(dev->txq.qlen >= TX_QLEN(dev)))
1579	netif_tx_wake_all_queues(dev->net);	1579	netif_tx_wake_all_queues(dev->net);

drivers/net/wireless/ath/ath5k/eeprom.c+1−1

@@ -1482,7 +1482,7 @@ ath5k_eeprom_read_target_rate_pwr_info(struct ath5k_hw *ah, unsigned int mode) · 1481 unmodified lines
1482	case AR5K_EEPROM_MODE_11A:	1482	case AR5K_EEPROM_MODE_11A:
1483	offset += AR5K_EEPROM_TARGET_PWR_OFF_11A(ee->ee_version);	1483	offset += AR5K_EEPROM_TARGET_PWR_OFF_11A(ee->ee_version);
1484	rate_pcal_info = ee->ee_rate_tpwr_a;	1484	rate_pcal_info = ee->ee_rate_tpwr_a;
1485	ee->ee_rate_target_pwr_num[mode] = AR5K_EEPROM_N_5GHZ_CHAN;	1485	ee->ee_rate_target_pwr_num[mode] = AR5K_EEPROM_N_5GHZ_RATE_CHAN;
1486	break;	1486	break;
1487	case AR5K_EEPROM_MODE_11B:	1487	case AR5K_EEPROM_MODE_11B:
1488	offset += AR5K_EEPROM_TARGET_PWR_OFF_11B(ee->ee_version);	1488	offset += AR5K_EEPROM_TARGET_PWR_OFF_11B(ee->ee_version);

drivers/net/wireless/ath/ath5k/eeprom.h+1−0

@@ -182,6 +182,7 @@ · 181 unmodified lines
182	#define AR5K_EEPROM_EEP_DELTA 10	182	#define AR5K_EEPROM_EEP_DELTA 10
183	#define AR5K_EEPROM_N_MODES 3	183	#define AR5K_EEPROM_N_MODES 3
184	#define AR5K_EEPROM_N_5GHZ_CHAN 10	184	#define AR5K_EEPROM_N_5GHZ_CHAN 10
		185	#define AR5K_EEPROM_N_5GHZ_RATE_CHAN 8
185	#define AR5K_EEPROM_N_2GHZ_CHAN 3	186	#define AR5K_EEPROM_N_2GHZ_CHAN 3
186	#define AR5K_EEPROM_N_2GHZ_CHAN_2413 4	187	#define AR5K_EEPROM_N_2GHZ_CHAN_2413 4
187	#define AR5K_EEPROM_N_2GHZ_CHAN_MAX 4	188	#define AR5K_EEPROM_N_2GHZ_CHAN_MAX 4

drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c+3−0

@@ -1233,6 +1233,9 @@ uint brcms_reset(struct brcms_info *wl) · 1232 unmodified lines
1233	/* dpc will not be rescheduled */	1233	/* dpc will not be rescheduled */
1234	wl->resched = false;	1234	wl->resched = false;
1235		1235
		1236	/* inform publicly that interface is down */
		1237	wl->pub->up = false;
		1238
1236	return 0;	1239	return 0;
1237	}	1240	}
1238		1241

drivers/net/wireless/ipw2x00/ipw2100.c+2−1

 		return;
 	}
 	len = ETH_ALEN;
-	ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID, &bssid, &len);
+	ret = ipw2100_get_ordinal(priv, IPW_ORD_STAT_ASSN_AP_BSSID, bssid,
+				  &len);
 	if (ret) {
 		IPW_DEBUG_INFO("failed querying ordinals at line %d\n",
 			       __LINE__);

drivers/net/wireless/iwlwifi/dvm/debugfs.c+3−0

@@ -124,6 +124,9 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file, · 123 unmodified lines
124	const struct fw_img *img;	124	const struct fw_img *img;
125	size_t bufsz;	125	size_t bufsz;
126		126
		127	if (!iwl_is_ready_rf(priv))
		128	return -EAGAIN;
		129
127	/* default is to dump the entire data segment */	130	/* default is to dump the entire data segment */
128	if (!priv->dbgfs_sram_offset && !priv->dbgfs_sram_len) {	131	if (!priv->dbgfs_sram_offset && !priv->dbgfs_sram_len) {
129	priv->dbgfs_sram_offset = 0x800000;	132	priv->dbgfs_sram_offset = 0x800000;

drivers/net/wireless/iwlwifi/pcie/internal.h+1−1

@@ -350,7 +350,7 @@ int iwl_queue_space(const struct iwl_queue *q); · 349 unmodified lines
350	/*****************************************************	350	/*****************************************************
351	* Error handling	351	* Error handling
352	******************************************************/	352	******************************************************/
353	int iwl_dump_fh(struct iwl_trans trans, char *buf, bool display);	353	int iwl_dump_fh(struct iwl_trans trans, char *buf);
354	void iwl_dump_csr(struct iwl_trans *trans);	354	void iwl_dump_csr(struct iwl_trans *trans);
355		355
356	/*****************************************************	356	/*****************************************************

drivers/net/wireless/iwlwifi/pcie/rx.c+1−1

@@ -555,7 +555,7 @@ static void iwl_irq_handle_error(struct iwl_trans *trans) · 554 unmodified lines
555	}	555	}
556		556
557	iwl_dump_csr(trans);	557	iwl_dump_csr(trans);
558	iwl_dump_fh(trans, NULL, false);	558	iwl_dump_fh(trans, NULL);
559		559
560	iwl_op_mode_nic_error(trans->op_mode);	560	iwl_op_mode_nic_error(trans->op_mode);
561	}	561	}

drivers/net/wireless/iwlwifi/pcie/trans.c+16−14

@@ -1649,13 +1649,9 @@ static const char *get_fh_string(int cmd) · 1648 unmodified lines
1649	#undef IWL_CMD	1649	#undef IWL_CMD
1650	}	1650	}
1651		1651
1652	int iwl_dump_fh(struct iwl_trans trans, char *buf, bool display)	1652	int iwl_dump_fh(struct iwl_trans trans, char *buf)
1653	{	1653	{
1654	int i;	1654	int i;
1655	#ifdef CONFIG_IWLWIFI_DEBUG
1656	int pos = 0;
1657	size_t bufsz = 0;
1658	#endif
1659	static const u32 fh_tbl[] = {	1655	static const u32 fh_tbl[] = {
1660	FH_RSCSR_CHNL0_STTS_WPTR_REG,	1656	FH_RSCSR_CHNL0_STTS_WPTR_REG,
1661	FH_RSCSR_CHNL0_RBDCB_BASE_REG,	1657	FH_RSCSR_CHNL0_RBDCB_BASE_REG,
@@ -1667,29 +1663,35 @@ int iwl_dump_fh(struct iwl_trans trans, char *buf, bool display) · 5 unmodified lines
1667	FH_TSSR_TX_STATUS_REG,	1663	FH_TSSR_TX_STATUS_REG,
1668	FH_TSSR_TX_ERROR_REG	1664	FH_TSSR_TX_ERROR_REG
1669	};	1665	};
1670	#ifdef CONFIG_IWLWIFI_DEBUG	1666
1671	if (display) {	1667	#ifdef CONFIG_IWLWIFI_DEBUGFS
1672	bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;	1668	if (buf) {
		1669	int pos = 0;
		1670	size_t bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
		1671
1673	*buf = kmalloc(bufsz, GFP_KERNEL);	1672	*buf = kmalloc(bufsz, GFP_KERNEL);
1674	if (!*buf)	1673	if (!*buf)
1675	return -ENOMEM;	1674	return -ENOMEM;
		1675
1676	pos += scnprintf(*buf + pos, bufsz - pos,	1676	pos += scnprintf(*buf + pos, bufsz - pos,
1677	"FH register values:\n");	1677	"FH register values:\n");
1678	for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {	1678
		1679	for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
1679	pos += scnprintf(*buf + pos, bufsz - pos,	1680	pos += scnprintf(*buf + pos, bufsz - pos,
1680	" %34s: 0X%08x\n",	1681	" %34s: 0X%08x\n",
1681	get_fh_string(fh_tbl[i]),	1682	get_fh_string(fh_tbl[i]),
1682	iwl_read_direct32(trans, fh_tbl[i]));	1683	iwl_read_direct32(trans, fh_tbl[i]));
1683	}	1684
1684	return pos;	1685	return pos;
1685	}	1686	}
1686	#endif	1687	#endif
		1688
1687	IWL_ERR(trans, "FH register values:\n");	1689	IWL_ERR(trans, "FH register values:\n");
1688	for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {	1690	for (i = 0; i < ARRAY_SIZE(fh_tbl); i++)
1689	IWL_ERR(trans, " %34s: 0X%08x\n",	1691	IWL_ERR(trans, " %34s: 0X%08x\n",
1690	get_fh_string(fh_tbl[i]),	1692	get_fh_string(fh_tbl[i]),
1691	iwl_read_direct32(trans, fh_tbl[i]));	1693	iwl_read_direct32(trans, fh_tbl[i]));
1692	}	1694
1693	return 0;	1695	return 0;
1694	}	1696	}
1695		1697
@@ -1982,11 +1984,11 @@ static ssize_t iwl_dbgfs_fh_reg_read(struct file *file, · 286 unmodified lines
1982	size_t count, loff_t *ppos)	1984	size_t count, loff_t *ppos)
1983	{	1985	{
1984	struct iwl_trans *trans = file->private_data;	1986	struct iwl_trans *trans = file->private_data;
1985	char *buf;	1987	char *buf = NULL;
1986	int pos = 0;	1988	int pos = 0;
1987	ssize_t ret = -EFAULT;	1989	ssize_t ret = -EFAULT;
1988		1990
1989	ret = pos = iwl_dump_fh(trans, &buf, true);	1991	ret = pos = iwl_dump_fh(trans, &buf);
1990	if (buf) {	1992	if (buf) {
1991	ret = simple_read_from_buffer(user_buf,	1993	ret = simple_read_from_buffer(user_buf,
1992	count, ppos, buf, pos);	1994	count, ppos, buf, pos);

drivers/net/xen-netfront.c+10−29

 static const struct ethtool_ops xennet_ethtool_ops;
 struct netfront_cb {
-	struct page *page;
+	int pull_to;
-	unsigned offset;
 };
 #define NETFRONT_SKB_CB(skb)	((struct netfront_cb *)((skb)->cb))
 	struct sk_buff *skb;
 	while ((skb = __skb_dequeue(rxq)) != NULL) {
-		struct page *page = NETFRONT_SKB_CB(skb)->page;
+		int pull_to = NETFRONT_SKB_CB(skb)->pull_to;
-		void *vaddr = page_address(page);
-		unsigned offset = NETFRONT_SKB_CB(skb)->offset;
-		memcpy(skb->data, vaddr + offset,
-		       skb_headlen(skb));
-		if (page != skb_frag_page(&skb_shinfo(skb)->frags[0]))
+		__pskb_pull_tail(skb, pull_to - skb_headlen(skb));
-			__free_page(page);
 		/* Ethernet work: Delayed to here as it peeks the header. */
 		skb->protocol = eth_type_trans(skb, dev);
 	struct sk_buff_head errq;
 	struct sk_buff_head tmpq;
 	unsigned long flags;
-	unsigned int len;
 	int err;
 	spin_lock(&np->rx_lock);
 			}
 		}
-		NETFRONT_SKB_CB(skb)->page =
+		NETFRONT_SKB_CB(skb)->pull_to = rx->status;
-			skb_frag_page(&skb_shinfo(skb)->frags[0]);
+		if (NETFRONT_SKB_CB(skb)->pull_to > RX_COPY_THRESHOLD)
-		NETFRONT_SKB_CB(skb)->offset = rx->offset;
+			NETFRONT_SKB_CB(skb)->pull_to = RX_COPY_THRESHOLD;
-		len = rx->status;
-		if (len > RX_COPY_THRESHOLD)
-			len = RX_COPY_THRESHOLD;
-		skb_put(skb, len);
-		if (rx->status > len) {
+		skb_shinfo(skb)->frags[0].page_offset = rx->offset;
-			skb_shinfo(skb)->frags[0].page_offset =
+		skb_frag_size_set(&skb_shinfo(skb)->frags[0], rx->status);
-				rx->offset + len;
+		skb->data_len = rx->status;
-			skb_frag_size_set(&skb_shinfo(skb)->frags[0], rx->status - len);
-			skb->data_len = rx->status - len;
-		} else {
-			__skb_fill_page_desc(skb, 0, NULL, 0, 0);
-			skb_shinfo(skb)->nr_frags = 0;
-		}
 		i = xennet_fill_frags(np, skb, &tmpq);
 		 * receive throughout using the standard receive
 		 * buffer size was cut by 25%(!!!).
 		 */
-		skb->truesize += skb->data_len - (RX_COPY_THRESHOLD - len);
+		skb->truesize += skb->data_len - RX_COPY_THRESHOLD;
 		skb->len += skb->data_len;
 		if (rx->flags & XEN_NETRXF_csum_blank)

drivers/pci/pci-driver.c+6−0

 {
 	struct drv_dev_and_id *ddi = _ddi;
 	struct device *dev = &ddi->dev->dev;
+	struct device *parent = dev->parent;
 	int rc;
+	/* The parent bridge must be in active state when probing */
+	if (parent)
+		pm_runtime_get_sync(parent);
 	/* Unbound PCI devices are always set to disabled and suspended.
 	 * During probe, the device is set to enabled and active and the
 	 * usage count is incremented.  If the driver supports runtime PM,
 		pm_runtime_set_suspended(dev);
 		pm_runtime_put_noidle(dev);
 	}
+	if (parent)
+		pm_runtime_put(parent);
 	return rc;
 }

drivers/pci/pci-sysfs.c+42−0

@@ -458,6 +458,40 @@ boot_vga_show(struct device dev, struct device_attribute attr, char *buf) · 457 unmodified lines
458	}	458	}
459	struct device_attribute vga_attr = __ATTR_RO(boot_vga);	459	struct device_attribute vga_attr = __ATTR_RO(boot_vga);
460		460
		461	static void
		462	pci_config_pm_runtime_get(struct pci_dev *pdev)
		463	{
		464	struct device *dev = &pdev->dev;
		465	struct device *parent = dev->parent;
		466
		467	if (parent)
		468	pm_runtime_get_sync(parent);
		469	pm_runtime_get_noresume(dev);
		470	/*
		471	* pdev->current_state is set to PCI_D3cold during suspending,
		472	* so wait until suspending completes
		473	*/
		474	pm_runtime_barrier(dev);
		475	/*
		476	* Only need to resume devices in D3cold, because config
		477	* registers are still accessible for devices suspended but
		478	* not in D3cold.
		479	*/
		480	if (pdev->current_state == PCI_D3cold)
		481	pm_runtime_resume(dev);
		482	}
		483
		484	static void
		485	pci_config_pm_runtime_put(struct pci_dev *pdev)
		486	{
		487	struct device *dev = &pdev->dev;
		488	struct device *parent = dev->parent;
		489
		490	pm_runtime_put(dev);
		491	if (parent)
		492	pm_runtime_put_sync(parent);
		493	}
		494
461	static ssize_t	495	static ssize_t
462	pci_read_config(struct file filp, struct kobject kobj,	496	pci_read_config(struct file filp, struct kobject kobj,
463	struct bin_attribute *bin_attr,	497	struct bin_attribute *bin_attr,
@@ -484,6 +518,8 @@ pci_read_config(struct file filp, struct kobject kobj, · 20 unmodified lines
484	size = count;	518	size = count;
485	}	519	}
486		520
		521	pci_config_pm_runtime_get(dev);
		522
487	if ((off & 1) && size) {	523	if ((off & 1) && size) {
488	u8 val;	524	u8 val;
489	pci_user_read_config_byte(dev, off, &val);	525	pci_user_read_config_byte(dev, off, &val);
@@ -529,6 +565,8 @@ pci_read_config(struct file filp, struct kobject kobj, · 39 unmodified lines
529	--size;	565	--size;
530	}	566	}
531		567
		568	pci_config_pm_runtime_put(dev);
		569
532	return count;	570	return count;
533	}	571	}
534		572
@@ -549,6 +587,8 @@ pci_write_config(struct file* filp, struct kobject *kobj, · 14 unmodified lines
549	count = size;	587	count = size;
550	}	588	}
551		589
		590	pci_config_pm_runtime_get(dev);
		591
552	if ((off & 1) && size) {	592	if ((off & 1) && size) {
553	pci_user_write_config_byte(dev, off, data[off - init_off]);	593	pci_user_write_config_byte(dev, off, data[off - init_off]);
554	off++;	594	off++;
@@ -587,6 +627,8 @@ pci_write_config(struct file* filp, struct kobject *kobj, · 32 unmodified lines
587	--size;	627	--size;
588	}	628	}
589		629
		630	pci_config_pm_runtime_put(dev);
		631
590	return count;	632	return count;
591	}	633	}
592		634

drivers/pci/pci.c+1−0

@@ -1941,6 +1941,7 @@ void pci_pm_init(struct pci_dev *dev) · 1940 unmodified lines
1941	dev->pm_cap = pm;	1941	dev->pm_cap = pm;
1942	dev->d3_delay = PCI_PM_D3_WAIT;	1942	dev->d3_delay = PCI_PM_D3_WAIT;
1943	dev->d3cold_delay = PCI_PM_D3COLD_WAIT;	1943	dev->d3cold_delay = PCI_PM_D3COLD_WAIT;
		1944	dev->d3cold_allowed = true;
1944		1945
1945	dev->d1_support = false;	1946	dev->d1_support = false;
1946	dev->d2_support = false;	1947	dev->d2_support = false;

drivers/pci/pcie/portdrv_pci.c+14−0

 {
 	return 0;
 }
+static int pcie_port_runtime_idle(struct device *dev)
+{
+	/* Delay for a short while to prevent too frequent suspend/resume */
+	pm_schedule_suspend(dev, 10);
+	return -EBUSY;
+}
 #else
 #define pcie_port_runtime_suspend	NULL
 #define pcie_port_runtime_resume	NULL
+#define pcie_port_runtime_idle		NULL
 #endif
 static const struct dev_pm_ops pcie_portdrv_pm_ops = {
 	.resume_noirq	= pcie_port_resume_noirq,
 	.runtime_suspend = pcie_port_runtime_suspend,
 	.runtime_resume = pcie_port_runtime_resume,
+	.runtime_idle	= pcie_port_runtime_idle,
 };
 #define PCIE_PORTDRV_PM_OPS	(&pcie_portdrv_pm_ops)
 		return status;
 	pci_save_state(dev);
+	/*
+	 * D3cold may not work properly on some PCIe port, so disable
+	 * it by default.
+	 */
+	dev->d3cold_allowed = false;
 	if (!pci_match_id(port_runtime_pm_black_list, dev))
 		pm_runtime_put_noidle(&dev->dev);

drivers/pci/probe.c+17−14

 	case PCI_BASE_ADDRESS_MEM_TYPE_32:
 		break;
 	case PCI_BASE_ADDRESS_MEM_TYPE_1M:
-		dev_info(&dev->dev, "1M mem BAR treated as 32-bit BAR\n");
+		/* 1M mem BAR treated as 32-bit BAR */
 		break;
 	case PCI_BASE_ADDRESS_MEM_TYPE_64:
 		flags |= IORESOURCE_MEM_64;
 		break;
 	default:
-		dev_warn(&dev->dev,
+		/* mem unknown type treated as 32-bit BAR */
-			 "mem unknown type %x treated as 32-bit BAR\n",
-			 mem_type);
 		break;
 	}
 	return flags;
 	u32 l, sz, mask;
 	u16 orig_cmd;
 	struct pci_bus_region region;
+	bool bar_too_big = false, bar_disabled = false;
 	mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
+	/* No printks while decoding is disabled! */
 	if (!dev->mmio_always_on) {
 		pci_read_config_word(dev, PCI_COMMAND, &orig_cmd);
 		pci_write_config_word(dev, PCI_COMMAND,
 			goto fail;
 		if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
-			dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n",
+			bar_too_big = true;
-				pos);
 			goto fail;
 		}
 			region.start = 0;
 			region.end = sz64;
 			pcibios_bus_to_resource(dev, res, &region);
+			bar_disabled = true;
 		} else {
 			region.start = l64;
 			region.end = l64 + sz64;
 			pcibios_bus_to_resource(dev, res, &region);
-			dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
-				   pos, res);
 		}
 	} else {
 		sz = pci_size(l, sz, mask);
 		region.start = l;
 		region.end = l + sz;
 		pcibios_bus_to_resource(dev, res, &region);
-		dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
 	}
- out:
+	goto out;
+fail:
+	res->flags = 0;
+out:
 	if (!dev->mmio_always_on)
 		pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
+	if (bar_too_big)
+		dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n", pos);
+	if (res->flags && !bar_disabled)
+		dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
 	return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
- fail:
-	res->flags = 0;
-	goto out;
 }
 static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)

drivers/rtc/rtc-at91sam9.c+15−7

 	struct rtc_device	*rtcdev;
 	u32			imr;
 	void __iomem		*gpbr;
+	int 			irq;
 };
 #define rtt_readl(rtc, field) \
 {
 	struct resource	*r, *r_gpbr;
 	struct sam9_rtc	*rtc;
-	int		ret;
+	int		ret, irq;
 	u32		mr;
 	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 		return -ENODEV;
 	}
+	irq = platform_get_irq(pdev, 0);
+	if (irq < 0) {
+		dev_err(&pdev->dev, "failed to get interrupt resource\n");
+		return irq;
+	}
 	rtc = kzalloc(sizeof *rtc, GFP_KERNEL);
 	if (!rtc)
 		return -ENOMEM;
+	rtc->irq = irq;
 	/* platform setup code should have handled this; sigh */
 	if (!device_can_wakeup(&pdev->dev))
 		device_init_wakeup(&pdev->dev, 1);
 	}
 	/* register irq handler after we know what name we'll use */
-	ret = request_irq(AT91_ID_SYS, at91_rtc_interrupt,
+	ret = request_irq(rtc->irq, at91_rtc_interrupt, IRQF_SHARED,
-				IRQF_SHARED,
 				dev_name(&rtc->rtcdev->dev), rtc);
 	if (ret) {
-		dev_dbg(&pdev->dev, "can't share IRQ %d?\n", AT91_ID_SYS);
+		dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq);
 		rtc_device_unregister(rtc->rtcdev);
 		goto fail_register;
 	}
 	/* disable all interrupts */
 	rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
-	free_irq(AT91_ID_SYS, rtc);
+	free_irq(rtc->irq, rtc);
 	rtc_device_unregister(rtc->rtcdev);
 	rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
 	if (rtc->imr) {
 		if (device_may_wakeup(&pdev->dev) && (mr & AT91_RTT_ALMIEN)) {
-			enable_irq_wake(AT91_ID_SYS);
+			enable_irq_wake(rtc->irq);
 			/* don't let RTTINC cause wakeups */
 			if (mr & AT91_RTT_RTTINCIEN)
 				rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
 	if (rtc->imr) {
 		if (device_may_wakeup(&pdev->dev))
-			disable_irq_wake(AT91_ID_SYS);
+			disable_irq_wake(rtc->irq);
 		mr = rtt_readl(rtc, MR);
 		rtt_writel(rtc, MR, mr | rtc->imr);
 	}

drivers/s390/block/dasd_eckd.c+1−1

@@ -3804,7 +3804,7 @@ dasd_eckd_ioctl(struct dasd_block block, unsigned int cmd, void __user argp) · 3803 unmodified lines
3804	case BIODASDSYMMIO:	3804	case BIODASDSYMMIO:
3805	return dasd_symm_io(device, argp);	3805	return dasd_symm_io(device, argp);
3806	default:	3806	default:
3807	return -ENOIOCTLCMD;	3807	return -ENOTTY;
3808	}	3808	}
3809	}	3809	}
3810		3810

drivers/s390/block/dasd_ioctl.c+2−5

 		break;
 	default:
 		/* if the discipline has an ioctl method try it. */
-		if (base->discipline->ioctl) {
+		rc = -ENOTTY;
+		if (base->discipline->ioctl)
 			rc = base->discipline->ioctl(block, cmd, argp);
-			if (rc == -ENOIOCTLCMD)
-				rc = -EINVAL;
-		} else
-			rc = -EINVAL;
 	}
 	dasd_put_device(base);
 	return rc;

drivers/spi/spi-bcm63xx.c+26−5

 	/* Platform data */
 	u32			speed_hz;
 	unsigned		fifo_size;
+	unsigned int		msg_type_shift;
+	unsigned int		msg_ctl_width;
 	/* Data buffers */
 	const unsigned char	*tx_ptr;
 	msg_ctl = (t->len << SPI_BYTE_CNT_SHIFT);
 	if (t->rx_buf && t->tx_buf)
-		msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT);
+		msg_ctl |= (SPI_FD_RW << bs->msg_type_shift);
 	else if (t->rx_buf)
-		msg_ctl |= (SPI_HD_R << SPI_MSG_TYPE_SHIFT);
+		msg_ctl |= (SPI_HD_R << bs->msg_type_shift);
 	else if (t->tx_buf)
-		msg_ctl |= (SPI_HD_W << SPI_MSG_TYPE_SHIFT);
+		msg_ctl |= (SPI_HD_W << bs->msg_type_shift);
-	bcm_spi_writew(bs, msg_ctl, SPI_MSG_CTL);
+	switch (bs->msg_ctl_width) {
+	case 8:
+		bcm_spi_writeb(bs, msg_ctl, SPI_MSG_CTL);
+		break;
+	case 16:
+		bcm_spi_writew(bs, msg_ctl, SPI_MSG_CTL);
+		break;
+	}
 	/* Issue the transfer */
 	cmd = SPI_CMD_START_IMMEDIATE;
 	master->transfer_one_message = bcm63xx_spi_transfer_one;
 	master->mode_bits = MODEBITS;
 	bs->speed_hz = pdata->speed_hz;
+	bs->msg_type_shift = pdata->msg_type_shift;
+	bs->msg_ctl_width = pdata->msg_ctl_width;
 	bs->tx_io = (u8 *)(bs->regs + bcm63xx_spireg(SPI_MSG_DATA));
 	bs->rx_io = (const u8 *)(bs->regs + bcm63xx_spireg(SPI_RX_DATA));
+	switch (bs->msg_ctl_width) {
+	case 8:
+	case 16:
+		break;
+	default:
+		dev_err(dev, "unsupported MSG_CTL width: %d\n",
+			 bs->msg_ctl_width);
+		goto out_clk_disable;
+	}
 	/* Initialize hardware */
 	clk_enable(bs->clk);
 	bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);

drivers/video/auo_k190x.c+0−2

 	fb_dealloc_cmap(&info->cmap);
 err_cmap:
 	fb_deferred_io_cleanup(info);
-	kfree(info->fbdefio);
 err_defio:
 	vfree((void *)info->screen_base);
 err_irq:
 	fb_dealloc_cmap(&info->cmap);
 	fb_deferred_io_cleanup(info);
-	kfree(info->fbdefio);
 	vfree((void *)info->screen_base);

drivers/video/backlight/omap1_bl.c+1−1

 #include <linux/fb.h>
 #include <linux/backlight.h>
 #include <linux/slab.h>
+#include <linux/platform_data/omap1_bl.h>
 #include <mach/hardware.h>
-#include <plat/board.h>
 #include <plat/mux.h>
 #define OMAPBL_MAX_INTENSITY		0xff

drivers/video/console/bitblit.c+1−1

@@ -162,7 +162,7 @@ static void bit_putcs(struct vc_data vc, struct fb_info info, · 161 unmodified lines
162	image.depth = 1;	162	image.depth = 1;
163		163
164	if (attribute) {	164	if (attribute) {
165	buf = kmalloc(cellsize, GFP_KERNEL);	165	buf = kmalloc(cellsize, GFP_ATOMIC);
166	if (!buf)	166	if (!buf)
167	return;	167	return;
168	}	168	}

drivers/video/console/fbcon.c+1−1

@@ -449,7 +449,7 @@ static int __init fb_console_setup(char *this_opt) · 448 unmodified lines
449		449
450	while ((options = strsep(&this_opt, ",")) != NULL) {	450	while ((options = strsep(&this_opt, ",")) != NULL) {
451	if (!strncmp(options, "font:", 5))	451	if (!strncmp(options, "font:", 5))
452	strcpy(fontname, options + 5);	452	strlcpy(fontname, options + 5, sizeof(fontname));
453		453
454	if (!strncmp(options, "scrollback:", 11)) {	454	if (!strncmp(options, "scrollback:", 11)) {
455	options += 11;	455	options += 11;

drivers/video/mb862xx/mb862xxfbdrv.c+2−0

 	case MB862XX_L1_SET_CFG:
 		if (copy_from_user(l1_cfg, argp, sizeof(*l1_cfg)))
 			return -EFAULT;
+		if (l1_cfg->dh == 0 || l1_cfg->dw == 0)
+			return -EINVAL;
 		if ((l1_cfg->sw >= l1_cfg->dw) && (l1_cfg->sh >= l1_cfg->dh)) {
 			/* downscaling */
 			outreg(cap, GC_CAP_CSC,

drivers/video/omap2/dss/sdi.c+14−0

@@ -105,6 +105,20 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev) · 104 unmodified lines
105		105
106	sdi_config_lcd_manager(dssdev);	106	sdi_config_lcd_manager(dssdev);
107		107
		108	/*
		109	* LCLK and PCLK divisors are located in shadow registers, and we
		110	* normally write them to DISPC registers when enabling the output.
		111	* However, SDI uses pck-free as source clock for its PLL, and pck-free
		112	* is affected by the divisors. And as we need the PLL before enabling
		113	* the output, we need to write the divisors early.
		114	*
		115	* It seems just writing to the DISPC register is enough, and we don't
		116	* need to care about the shadow register mechanism for pck-free. The
		117	* exact reason for this is unknown.
		118	*/
		119	dispc_mgr_set_clock_div(dssdev->manager->id,
		120	&sdi.mgr_config.clock_info);
		121
108	dss_sdi_init(dssdev->phy.sdi.datapairs);	122	dss_sdi_init(dssdev->phy.sdi.datapairs);
109	r = dss_sdi_enable();	123	r = dss_sdi_enable();
110	if (r)	124	if (r)

drivers/video/omap2/omapfb/omapfb-main.c+1−1

@@ -1192,7 +1192,7 @@ static int _setcolreg(struct fb_info *fbi, u_int regno, u_int red, u_int green, · 1191 unmodified lines
1192	break;	1192	break;
1193		1193
1194	if (regno < 16) {	1194	if (regno < 16) {
1195	u16 pal;	1195	u32 pal;
1196	pal = ((red >> (16 - var->red.length)) <<	1196	pal = ((red >> (16 - var->red.length)) <<
1197	var->red.offset) \|	1197	var->red.offset) \|
1198	((green >> (16 - var->green.length)) <<	1198	((green >> (16 - var->green.length)) <<

drivers/watchdog/booke_wdt.c+3−4

 	switch (cmd) {
 	case WDIOC_GETSUPPORT:
-		if (copy_to_user((void *)arg, &ident, sizeof(ident)))
+		return copy_to_user(p, &ident, sizeof(ident)) ? -EFAULT : 0;
-			return -EFAULT;
 	case WDIOC_GETSTATUS:
 		return put_user(0, p);
 	case WDIOC_GETBOOTSTATUS:
 		/* XXX: something is clearing TSR */
 		tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
 		/* returns CARDRESET if last reset was caused by the WDT */
-		return (tmp ? WDIOF_CARDRESET : 0);
+		return put_user((tmp ? WDIOF_CARDRESET : 0), p);
 	case WDIOC_SETOPTIONS:
 		if (get_user(tmp, p))
-			return -EINVAL;
+			return -EFAULT;
 		if (tmp == WDIOS_ENABLECARD) {
 			booke_wdt_ping();
 			break;

drivers/watchdog/da9052_wdt.c+0−1

@@ -21,7 +21,6 @@ · 20 unmodified lines
21	#include <linux/types.h>	21	#include <linux/types.h>
22	#include <linux/kernel.h>	22	#include <linux/kernel.h>
23	#include <linux/jiffies.h>	23	#include <linux/jiffies.h>
24	#include <linux/delay.h>
25		24
26	#include <linux/mfd/da9052/reg.h>	25	#include <linux/mfd/da9052/reg.h>
27	#include <linux/mfd/da9052/da9052.h>	26	#include <linux/mfd/da9052/da9052.h>

drivers/xen/platform-pci.c+0−15

@@ -101,19 +101,6 @@ static int platform_pci_resume(struct pci_dev *pdev) · 100 unmodified lines
101	return 0;	101	return 0;
102	}	102	}
103		103
104	static void __devinit prepare_shared_info(void)
105	{
106	#ifdef CONFIG_KEXEC
107	unsigned long addr;
108	struct shared_info *hvm_shared_info;
109
110	addr = alloc_xen_mmio(PAGE_SIZE);
111	hvm_shared_info = ioremap(addr, PAGE_SIZE);
112	memset(hvm_shared_info, 0, PAGE_SIZE);
113	xen_hvm_prepare_kexec(hvm_shared_info, addr >> PAGE_SHIFT);
114	#endif
115	}
116
117	static int __devinit platform_pci_init(struct pci_dev *pdev,	104	static int __devinit platform_pci_init(struct pci_dev *pdev,
118	const struct pci_device_id *ent)	105	const struct pci_device_id *ent)
119	{	106	{
@@ -151,8 +138,6 @@ static int __devinit platform_pci_init(struct pci_dev *pdev, · 31 unmodified lines
151	platform_mmio = mmio_addr;	138	platform_mmio = mmio_addr;
152	platform_mmiolen = mmio_len;	139	platform_mmiolen = mmio_len;
153		140
154	prepare_shared_info();
155
156	if (!xen_have_vector_callback) {	141	if (!xen_have_vector_callback) {
157	ret = xen_allocate_irq(pdev);	142	ret = xen_allocate_irq(pdev);
158	if (ret) {	143	if (ret) {

drivers/xen/swiotlb-xen.c+1−1

@@ -232,7 +232,7 @@ xen_swiotlb_alloc_coherent(struct device *hwdev, size_t size, · 231 unmodified lines
232	return ret;	232	return ret;
233		233
234	if (hwdev && hwdev->coherent_dma_mask)	234	if (hwdev && hwdev->coherent_dma_mask)
235	dma_mask = hwdev->coherent_dma_mask;	235	dma_mask = dma_alloc_coherent_mask(hwdev, flags);
236		236
237	phys = virt_to_phys(ret);	237	phys = virt_to_phys(ret);
238	dev_addr = xen_phys_to_bus(phys);	238	dev_addr = xen_phys_to_bus(phys);

drivers/xen/xen-pciback/pci_stub.c+4−4

@@ -353,16 +353,16 @@ static int __devinit pcistub_init_device(struct pci_dev *dev) · 352 unmodified lines
353	if (err)	353	if (err)
354	goto config_release;	354	goto config_release;
355		355
356	dev_dbg(&dev->dev, "reseting (FLR, D3, etc) the device\n");
357	__pci_reset_function_locked(dev);
358
359	/* We need the device active to save the state. */	356	/* We need the device active to save the state. */
360	dev_dbg(&dev->dev, "save state of device\n");	357	dev_dbg(&dev->dev, "save state of device\n");
361	pci_save_state(dev);	358	pci_save_state(dev);
362	dev_data->pci_saved_state = pci_store_saved_state(dev);	359	dev_data->pci_saved_state = pci_store_saved_state(dev);
363	if (!dev_data->pci_saved_state)	360	if (!dev_data->pci_saved_state)
364	dev_err(&dev->dev, "Could not store PCI conf saved state!\n");	361	dev_err(&dev->dev, "Could not store PCI conf saved state!\n");
365		362	else {
		363	dev_dbg(&dev->dev, "reseting (FLR, D3, etc) the device\n");
		364	__pci_reset_function_locked(dev);
		365	}
366	/* Now disable the device (this also ensures some private device	366	/* Now disable the device (this also ensures some private device
367	* data is setup before we export)	367	* data is setup before we export)
368	*/	368	*/

fs/bio.c+6−5

 {
 	unsigned int sz = sizeof(struct bio) + extra_size;
 	struct kmem_cache *slab = NULL;
-	struct bio_slab *bslab;
+	struct bio_slab *bslab, *new_bio_slabs;
 	unsigned int i, entry = -1;
 	mutex_lock(&bio_slab_lock);
 	if (bio_slab_nr == bio_slab_max && entry == -1) {
 		bio_slab_max <<= 1;
-		bio_slabs = krealloc(bio_slabs,
+		new_bio_slabs = krealloc(bio_slabs,
-				     bio_slab_max * sizeof(struct bio_slab),
+					 bio_slab_max * sizeof(struct bio_slab),
-				     GFP_KERNEL);
+					 GFP_KERNEL);
-		if (!bio_slabs)
+		if (!new_bio_slabs)
 			goto out_unlock;
+		bio_slabs = new_bio_slabs;
 	}
 	if (entry == -1)
 		entry = bio_slab_nr++;

fs/block_dev.c+3−0

 			 unsigned long nr_segs, loff_t pos)
 {
 	struct file *file = iocb->ki_filp;
+	struct blk_plug plug;
 	ssize_t ret;
 	BUG_ON(iocb->ki_pos != pos);
+	blk_start_plug(&plug);
 	ret = __generic_file_aio_write(iocb, iov, nr_segs, &iocb->ki_pos);
 	if (ret > 0 || ret == -EIOCBQUEUED) {
 		ssize_t err;
 		if (err < 0 && ret > 0)
 			ret = err;
 	}
+	blk_finish_plug(&plug);
 	return ret;
 }
 EXPORT_SYMBOL_GPL(blkdev_aio_write);

fs/btrfs/backref.c+2−2

 	ret = extent_from_logical(fs_info, logical, path,
 					&found_key);
 	btrfs_release_path(path);
-	if (ret & BTRFS_EXTENT_FLAG_TREE_BLOCK)
-		ret = -EINVAL;
 	if (ret < 0)
 		return ret;
+	if (ret & BTRFS_EXTENT_FLAG_TREE_BLOCK)
+		return -EINVAL;
 	extent_item_pos = logical - found_key.objectid;
 	ret = iterate_extent_inodes(fs_info, found_key.objectid,

fs/btrfs/compression.c+1−0

@@ -818,6 +818,7 @@ static void free_workspace(int type, struct list_head *workspace) · 817 unmodified lines
818	btrfs_compress_op[idx]->free_workspace(workspace);	818	btrfs_compress_op[idx]->free_workspace(workspace);
819	atomic_dec(alloc_workspace);	819	atomic_dec(alloc_workspace);
820	wake:	820	wake:
		821	smp_mb();
821	if (waitqueue_active(workspace_wait))	822	if (waitqueue_active(workspace_wait))
822	wake_up(workspace_wait);	823	wake_up(workspace_wait);
823	}	824	}

fs/btrfs/ctree.c+3−6

 	}
 	spin_unlock(&fs_info->tree_mod_seq_lock);
-	/*
-	 * we removed the lowest blocker from the blocker list, so there may be
-	 * more processible delayed refs.
-	 */
-	wake_up(&fs_info->tree_mod_seq_wait);
 	/*
 	 * anything that's lower than the lowest existing (read: blocked)
 	 * sequence number can be removed from the tree.
 	u32 nritems;
 	int ret;
+	if (btrfs_header_level(eb) == 0)
+		return;
 	nritems = btrfs_header_nritems(eb);
 	for (i = nritems - 1; i >= 0; i--) {
 		ret = tree_mod_log_insert_key_locked(fs_info, eb, i,

fs/btrfs/ctree.h+1−2

 	atomic_t tree_mod_seq;
 	struct list_head tree_mod_seq_list;
 	struct seq_list tree_mod_seq_elem;
-	wait_queue_head_t tree_mod_seq_wait;
 	/* this protects tree_mod_log */
 	rwlock_t tree_mod_log_lock;
 int btrfs_lookup_bio_sums(struct btrfs_root *root, struct inode *inode,
 			  struct bio *bio, u32 *dst);
 int btrfs_lookup_bio_sums_dio(struct btrfs_root *root, struct inode *inode,
-			      struct bio *bio, u64 logical_offset, u32 *dst);
+			      struct bio *bio, u64 logical_offset);
 int btrfs_insert_file_extent(struct btrfs_trans_handle *trans,
 			     struct btrfs_root *root,
 			     u64 objectid, u64 pos,

fs/btrfs/delayed-inode.c+6−6

 	rb_erase(&delayed_item->rb_node, root);
 	delayed_item->delayed_node->count--;
-	atomic_dec(&delayed_root->items);
+	if (atomic_dec_return(&delayed_root->items) <
-	if (atomic_read(&delayed_root->items) < BTRFS_DELAYED_BACKGROUND &&
+	    BTRFS_DELAYED_BACKGROUND &&
 	    waitqueue_active(&delayed_root->wait))
 		wake_up(&delayed_root->wait);
 }
 		btrfs_release_delayed_item(prev);
 		ret = 0;
 		btrfs_release_path(path);
-		if (curr)
+		if (curr) {
+			mutex_unlock(&node->mutex);
 			goto do_again;
-		else
+		} else
 			goto delete_fail;
 	}
 		delayed_node->count--;
 		delayed_root = delayed_node->root->fs_info->delayed_root;
-		atomic_dec(&delayed_root->items);
+		if (atomic_dec_return(&delayed_root->items) <
-		if (atomic_read(&delayed_root->items) <
 		    BTRFS_DELAYED_BACKGROUND &&
 		    waitqueue_active(&delayed_root->wait))
 			wake_up(&delayed_root->wait);

fs/btrfs/delayed-ref.c+128−35

@@ -38,17 +38,14 @@ · 37 unmodified lines
38	static int comp_tree_refs(struct btrfs_delayed_tree_ref *ref2,	38	static int comp_tree_refs(struct btrfs_delayed_tree_ref *ref2,
39	struct btrfs_delayed_tree_ref *ref1)	39	struct btrfs_delayed_tree_ref *ref1)
40	{	40	{
41	if (ref1->node.type == BTRFS_TREE_BLOCK_REF_KEY) {	41	if (ref1->root < ref2->root)
42	if (ref1->root < ref2->root)	42	return -1;
43	return -1;	43	if (ref1->root > ref2->root)
44	if (ref1->root > ref2->root)	44	return 1;
45	return 1;	45	if (ref1->parent < ref2->parent)
46	} else {	46	return -1;
47	if (ref1->parent < ref2->parent)	47	if (ref1->parent > ref2->parent)
48	return -1;	48	return 1;
49	if (ref1->parent > ref2->parent)
50	return 1;
51	}
52	return 0;	49	return 0;
53	}	50	}
54		51
@@ -85,7 +82,8 @@ static int comp_data_refs(struct btrfs_delayed_data_ref *ref2, · 30 unmodified lines
85	* type of the delayed backrefs and content of delayed backrefs.	82	* type of the delayed backrefs and content of delayed backrefs.
86	*/	83	*/
87	static int comp_entry(struct btrfs_delayed_ref_node *ref2,	84	static int comp_entry(struct btrfs_delayed_ref_node *ref2,
88	struct btrfs_delayed_ref_node *ref1)	85	struct btrfs_delayed_ref_node *ref1,
		86	bool compare_seq)
89	{	87	{
90	if (ref1->bytenr < ref2->bytenr)	88	if (ref1->bytenr < ref2->bytenr)
91	return -1;	89	return -1;
@@ -102,10 +100,12 @@ static int comp_entry(struct btrfs_delayed_ref_node *ref2, · 10 unmodified lines
102	if (ref1->type > ref2->type)	100	if (ref1->type > ref2->type)
103	return 1;	101	return 1;
104	/* merging of sequenced refs is not allowed */	102	/* merging of sequenced refs is not allowed */
105	if (ref1->seq < ref2->seq)	103	if (compare_seq) {
106	return -1;	104	if (ref1->seq < ref2->seq)
107	if (ref1->seq > ref2->seq)	105	return -1;
108	return 1;	106	if (ref1->seq > ref2->seq)
		107	return 1;
		108	}
109	if (ref1->type == BTRFS_TREE_BLOCK_REF_KEY \|\|	109	if (ref1->type == BTRFS_TREE_BLOCK_REF_KEY \|\|
110	ref1->type == BTRFS_SHARED_BLOCK_REF_KEY) {	110	ref1->type == BTRFS_SHARED_BLOCK_REF_KEY) {
111	return comp_tree_refs(btrfs_delayed_node_to_tree_ref(ref2),	111	return comp_tree_refs(btrfs_delayed_node_to_tree_ref(ref2),
@@ -139,7 +139,7 @@ static struct btrfs_delayed_ref_node tree_insert(struct rb_root root, · 27 unmodified lines
139	entry = rb_entry(parent_node, struct btrfs_delayed_ref_node,	139	entry = rb_entry(parent_node, struct btrfs_delayed_ref_node,
140	rb_node);	140	rb_node);
141		141
142	cmp = comp_entry(entry, ins);	142	cmp = comp_entry(entry, ins, 1);
143	if (cmp < 0)	143	if (cmp < 0)
144	p = &(*p)->rb_left;	144	p = &(*p)->rb_left;
145	else if (cmp > 0)	145	else if (cmp > 0)
@@ -233,6 +233,114 @@ int btrfs_delayed_ref_lock(struct btrfs_trans_handle *trans, · 87 unmodified lines
233	return 0;	233	return 0;
234	}	234	}
235		235
		236	static void inline drop_delayed_ref(struct btrfs_trans_handle *trans,
		237	struct btrfs_delayed_ref_root *delayed_refs,
		238	struct btrfs_delayed_ref_node *ref)
		239	{
		240	rb_erase(&ref->rb_node, &delayed_refs->root);
		241	ref->in_tree = 0;
		242	btrfs_put_delayed_ref(ref);
		243	delayed_refs->num_entries--;
		244	if (trans->delayed_ref_updates)
		245	trans->delayed_ref_updates--;
		246	}
		247
		248	static int merge_ref(struct btrfs_trans_handle *trans,
		249	struct btrfs_delayed_ref_root *delayed_refs,
		250	struct btrfs_delayed_ref_node *ref, u64 seq)
		251	{
		252	struct rb_node *node;
		253	int merged = 0;
		254	int mod = 0;
		255	int done = 0;
		256
		257	node = rb_prev(&ref->rb_node);
		258	while (node) {
		259	struct btrfs_delayed_ref_node *next;
		260
		261	next = rb_entry(node, struct btrfs_delayed_ref_node, rb_node);
		262	node = rb_prev(node);
		263	if (next->bytenr != ref->bytenr)
		264	break;
		265	if (seq && next->seq >= seq)
		266	break;
		267	if (comp_entry(ref, next, 0))
		268	continue;
		269
		270	if (ref->action == next->action) {
		271	mod = next->ref_mod;
		272	} else {
		273	if (ref->ref_mod < next->ref_mod) {
		274	struct btrfs_delayed_ref_node *tmp;
		275
		276	tmp = ref;
		277	ref = next;
		278	next = tmp;
		279	done = 1;
		280	}
		281	mod = -next->ref_mod;
		282	}
		283
		284	merged++;
		285	drop_delayed_ref(trans, delayed_refs, next);
		286	ref->ref_mod += mod;
		287	if (ref->ref_mod == 0) {
		288	drop_delayed_ref(trans, delayed_refs, ref);
		289	break;
		290	} else {
		291	/*
		292	* You can't have multiples of the same ref on a tree
		293	* block.
		294	*/
		295	WARN_ON(ref->type == BTRFS_TREE_BLOCK_REF_KEY \|\|
		296	ref->type == BTRFS_SHARED_BLOCK_REF_KEY);
		297	}
		298
		299	if (done)
		300	break;
		301	node = rb_prev(&ref->rb_node);
		302	}
		303
		304	return merged;
		305	}
		306
		307	void btrfs_merge_delayed_refs(struct btrfs_trans_handle *trans,
		308	struct btrfs_fs_info *fs_info,
		309	struct btrfs_delayed_ref_root *delayed_refs,
		310	struct btrfs_delayed_ref_head *head)
		311	{
		312	struct rb_node *node;
		313	u64 seq = 0;
		314
		315	spin_lock(&fs_info->tree_mod_seq_lock);
		316	if (!list_empty(&fs_info->tree_mod_seq_list)) {
		317	struct seq_list *elem;
		318
		319	elem = list_first_entry(&fs_info->tree_mod_seq_list,
		320	struct seq_list, list);
		321	seq = elem->seq;
		322	}
		323	spin_unlock(&fs_info->tree_mod_seq_lock);
		324
		325	node = rb_prev(&head->node.rb_node);
		326	while (node) {
		327	struct btrfs_delayed_ref_node *ref;
		328
		329	ref = rb_entry(node, struct btrfs_delayed_ref_node,
		330	rb_node);
		331	if (ref->bytenr != head->node.bytenr)
		332	break;
		333
		334	/* We can't merge refs that are outside of our seq count */
		335	if (seq && ref->seq >= seq)
		336	break;
		337	if (merge_ref(trans, delayed_refs, ref, seq))
		338	node = rb_prev(&head->node.rb_node);
		339	else
		340	node = rb_prev(node);
		341	}
		342	}
		343
236	int btrfs_check_delayed_seq(struct btrfs_fs_info *fs_info,	344	int btrfs_check_delayed_seq(struct btrfs_fs_info *fs_info,
237	struct btrfs_delayed_ref_root *delayed_refs,	345	struct btrfs_delayed_ref_root *delayed_refs,
238	u64 seq)	346	u64 seq)
@@ -336,18 +444,11 @@ update_existing_ref(struct btrfs_trans_handle *trans, · 97 unmodified lines
336	* every changing the extent allocation tree.	444	* every changing the extent allocation tree.
337	*/	445	*/
338	existing->ref_mod--;	446	existing->ref_mod--;
339	if (existing->ref_mod == 0) {	447	if (existing->ref_mod == 0)
340	rb_erase(&existing->rb_node,	448	drop_delayed_ref(trans, delayed_refs, existing);
341	&delayed_refs->root);	449	else
342	existing->in_tree = 0;
343	btrfs_put_delayed_ref(existing);
344	delayed_refs->num_entries--;
345	if (trans->delayed_ref_updates)
346	trans->delayed_ref_updates--;
347	} else {
348	WARN_ON(existing->type == BTRFS_TREE_BLOCK_REF_KEY \|\|	450	WARN_ON(existing->type == BTRFS_TREE_BLOCK_REF_KEY \|\|
349	existing->type == BTRFS_SHARED_BLOCK_REF_KEY);	451	existing->type == BTRFS_SHARED_BLOCK_REF_KEY);
350	}
351	} else {	452	} else {
352	WARN_ON(existing->type == BTRFS_TREE_BLOCK_REF_KEY \|\|	453	WARN_ON(existing->type == BTRFS_TREE_BLOCK_REF_KEY \|\|
353	existing->type == BTRFS_SHARED_BLOCK_REF_KEY);	454	existing->type == BTRFS_SHARED_BLOCK_REF_KEY);
@@ -662,9 +763,6 @@ int btrfs_add_delayed_tree_ref(struct btrfs_fs_info *fs_info, · 308 unmodified lines
662	add_delayed_tree_ref(fs_info, trans, &ref->node, bytenr,	763	add_delayed_tree_ref(fs_info, trans, &ref->node, bytenr,
663	num_bytes, parent, ref_root, level, action,	764	num_bytes, parent, ref_root, level, action,
664	for_cow);	765	for_cow);
665	if (!need_ref_seq(for_cow, ref_root) &&
666	waitqueue_active(&fs_info->tree_mod_seq_wait))
667	wake_up(&fs_info->tree_mod_seq_wait);
668	spin_unlock(&delayed_refs->lock);	766	spin_unlock(&delayed_refs->lock);
669	if (need_ref_seq(for_cow, ref_root))	767	if (need_ref_seq(for_cow, ref_root))
670	btrfs_qgroup_record_ref(trans, &ref->node, extent_op);	768	btrfs_qgroup_record_ref(trans, &ref->node, extent_op);
@@ -713,9 +811,6 @@ int btrfs_add_delayed_data_ref(struct btrfs_fs_info *fs_info, · 42 unmodified lines
713	add_delayed_data_ref(fs_info, trans, &ref->node, bytenr,	811	add_delayed_data_ref(fs_info, trans, &ref->node, bytenr,
714	num_bytes, parent, ref_root, owner, offset,	812	num_bytes, parent, ref_root, owner, offset,
715	action, for_cow);	813	action, for_cow);
716	if (!need_ref_seq(for_cow, ref_root) &&
717	waitqueue_active(&fs_info->tree_mod_seq_wait))
718	wake_up(&fs_info->tree_mod_seq_wait);
719	spin_unlock(&delayed_refs->lock);	814	spin_unlock(&delayed_refs->lock);
720	if (need_ref_seq(for_cow, ref_root))	815	if (need_ref_seq(for_cow, ref_root))
721	btrfs_qgroup_record_ref(trans, &ref->node, extent_op);	816	btrfs_qgroup_record_ref(trans, &ref->node, extent_op);
@@ -744,8 +839,6 @@ int btrfs_add_delayed_extent_op(struct btrfs_fs_info *fs_info, · 22 unmodified lines
744	num_bytes, BTRFS_UPDATE_DELAYED_HEAD,	839	num_bytes, BTRFS_UPDATE_DELAYED_HEAD,
745	extent_op->is_data);	840	extent_op->is_data);
746		841
747	if (waitqueue_active(&fs_info->tree_mod_seq_wait))
748	wake_up(&fs_info->tree_mod_seq_wait);
749	spin_unlock(&delayed_refs->lock);	842	spin_unlock(&delayed_refs->lock);
750	return 0;	843	return 0;
751	}	844	}

fs/btrfs/delayed-ref.h+4−0

 				struct btrfs_trans_handle *trans,
 				u64 bytenr, u64 num_bytes,
 				struct btrfs_delayed_extent_op *extent_op);
+void btrfs_merge_delayed_refs(struct btrfs_trans_handle *trans,
+			      struct btrfs_fs_info *fs_info,
+			      struct btrfs_delayed_ref_root *delayed_refs,
+			      struct btrfs_delayed_ref_head *head);
 struct btrfs_delayed_ref_head *
 btrfs_find_delayed_ref_head(struct btrfs_trans_handle *trans, u64 bytenr);

fs/btrfs/disk-io.c+14−39

 		ret = read_extent_buffer_pages(io_tree, eb, start,
 					       WAIT_COMPLETE,
 					       btree_get_extent, mirror_num);
-		if (!ret && !verify_parent_transid(io_tree, eb,
+		if (!ret) {
+			if (!verify_parent_transid(io_tree, eb,
 						   parent_transid, 0))
-			break;
+				break;
+			else
+				ret = -EIO;
+		}
 		/*
 		 * This buffer's crc is fine, but its contents are corrupted, so
 	limit = btrfs_async_submit_limit(fs_info);
 	limit = limit * 2 / 3;
-	atomic_dec(&fs_info->nr_async_submits);
+	if (atomic_dec_return(&fs_info->nr_async_submits) < limit &&
-	if (atomic_read(&fs_info->nr_async_submits) < limit &&
 	    waitqueue_active(&fs_info->async_submit_wait))
 		wake_up(&fs_info->async_submit_wait);
 	fs_info->free_chunk_space = 0;
 	fs_info->tree_mod_log = RB_ROOT;
-	init_waitqueue_head(&fs_info->tree_mod_seq_wait);
 	/* readahead state */
 	INIT_RADIX_TREE(&fs_info->reada_tree, GFP_NOFS & ~__GFP_WAIT);
 	spin_lock_init(&fs_info->reada_lock);
 		goto fail_trans_kthread;
 	/* do not make disk changes in broken FS */
-	if (btrfs_super_log_root(disk_super) != 0 &&
+	if (btrfs_super_log_root(disk_super) != 0) {
-	    !(fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR)) {
 		u64 bytenr = btrfs_super_log_root(disk_super);
 		if (fs_devices->rw_devices == 0) {
 	/* clear out the rbtree of defraggable inodes */
 	btrfs_run_defrag_inodes(fs_info);
-	/*
-	 * Here come 2 situations when btrfs is broken to flip readonly:
-	 *
-	 * 1. when btrfs flips readonly somewhere else before
-	 * btrfs_commit_super, sb->s_flags has MS_RDONLY flag,
-	 * and btrfs will skip to write sb directly to keep
-	 * ERROR state on disk.
-	 *
-	 * 2. when btrfs flips readonly just in btrfs_commit_super,
-	 * and in such case, btrfs cannot write sb via btrfs_commit_super,
-	 * and since fs_state has been set BTRFS_SUPER_FLAG_ERROR flag,
-	 * btrfs will cleanup all FS resources first and write sb then.
-	 */
 	if (!(fs_info->sb->s_flags & MS_RDONLY)) {
 		ret = btrfs_commit_super(root);
 		if (ret)
 			printk(KERN_ERR "btrfs: commit super ret %d\n", ret);
 	}
-	if (fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR) {
+	if (fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR)
-		ret = btrfs_error_commit_super(root);
+		btrfs_error_commit_super(root);
-		if (ret)
-			printk(KERN_ERR "btrfs: commit super ret %d\n", ret);
-	}
 	btrfs_put_block_group_cache(fs_info);
 	if (read_only)
 		return 0;
-	if (fs_info->fs_state & BTRFS_SUPER_FLAG_ERROR) {
-		printk(KERN_WARNING "warning: mount fs with errors, "
-		       "running btrfsck is recommended\n");
-	}
 	return 0;
 }
-int btrfs_error_commit_super(struct btrfs_root *root)
+void btrfs_error_commit_super(struct btrfs_root *root)
 {
-	int ret;
 	mutex_lock(&root->fs_info->cleaner_mutex);
 	btrfs_run_delayed_iputs(root);
 	mutex_unlock(&root->fs_info->cleaner_mutex);
 	/* cleanup FS via transaction */
 	btrfs_cleanup_transaction(root);
-	ret = write_ctree_super(NULL, root, 0);
-	return ret;
 }
 static void btrfs_destroy_ordered_operations(struct btrfs_root *root)
 		/* FIXME: cleanup wait for commit */
 		t->in_commit = 1;
 		t->blocked = 1;
+		smp_mb();
 		if (waitqueue_active(&root->fs_info->transaction_blocked_wait))
 			wake_up(&root->fs_info->transaction_blocked_wait);
 		t->blocked = 0;
+		smp_mb();
 		if (waitqueue_active(&root->fs_info->transaction_wait))
 			wake_up(&root->fs_info->transaction_wait);
 		t->commit_done = 1;
+		smp_mb();
 		if (waitqueue_active(&t->commit_wait))
 			wake_up(&t->commit_wait);

fs/btrfs/disk-io.h+1−1

@@ -54,7 +54,7 @@ int write_ctree_super(struct btrfs_trans_handle *trans, · 53 unmodified lines
54	struct btrfs_root *root, int max_mirrors);	54	struct btrfs_root *root, int max_mirrors);
55	struct buffer_head btrfs_read_dev_super(struct block_device bdev);	55	struct buffer_head btrfs_read_dev_super(struct block_device bdev);
56	int btrfs_commit_super(struct btrfs_root *root);	56	int btrfs_commit_super(struct btrfs_root *root);
57	int btrfs_error_commit_super(struct btrfs_root *root);	57	void btrfs_error_commit_super(struct btrfs_root *root);
58	struct extent_buffer btrfs_find_tree_block(struct btrfs_root root,	58	struct extent_buffer btrfs_find_tree_block(struct btrfs_root root,
59	u64 bytenr, u32 blocksize);	59	u64 bytenr, u32 blocksize);
60	struct btrfs_root btrfs_read_fs_root_no_radix(struct btrfs_root tree_root,	60	struct btrfs_root btrfs_read_fs_root_no_radix(struct btrfs_root tree_root,

fs/btrfs/extent-tree.c+58−65

 			}
 		}
+		/*
+		 * We need to try and merge add/drops of the same ref since we
+		 * can run into issues with relocate dropping the implicit ref
+		 * and then it being added back again before the drop can
+		 * finish.  If we merged anything we need to re-loop so we can
+		 * get a good ref.
+		 */
+		btrfs_merge_delayed_refs(trans, fs_info, delayed_refs,
+					 locked_ref);
 		/*
 		 * locked_ref is the head node, so we have to go one
 		 * node back for any delayed ref updates
 		ref->in_tree = 0;
 		rb_erase(&ref->rb_node, &delayed_refs->root);
 		delayed_refs->num_entries--;
-		/*
+		if (locked_ref) {
-		 * we modified num_entries, but as we're currently running
+			/*
-		 * delayed refs, skip
+			 * when we play the delayed ref, also correct the
-		 *     wake_up(&delayed_refs->seq_wait);
+			 * ref_mod on head
-		 * here.
+			 */
-		 */
+			switch (ref->action) {
+			case BTRFS_ADD_DELAYED_REF:
+			case BTRFS_ADD_DELAYED_EXTENT:
+				locked_ref->node.ref_mod -= ref->ref_mod;
+				break;
+			case BTRFS_DROP_DELAYED_REF:
+				locked_ref->node.ref_mod += ref->ref_mod;
+				break;
+			default:
+				WARN_ON(1);
+			}
+		}
 		spin_unlock(&delayed_refs->lock);
 		ret = run_one_delayed_ref(trans, root, ref, extent_op,
 	return count;
 }
-static void wait_for_more_refs(struct btrfs_fs_info *fs_info,
-			       struct btrfs_delayed_ref_root *delayed_refs,
-			       unsigned long num_refs,
-			       struct list_head *first_seq)
-{
-	spin_unlock(&delayed_refs->lock);
-	pr_debug("waiting for more refs (num %ld, first %p)\n",
-		 num_refs, first_seq);
-	wait_event(fs_info->tree_mod_seq_wait,
-		   num_refs != delayed_refs->num_entries ||
-		   fs_info->tree_mod_seq_list.next != first_seq);
-	pr_debug("done waiting for more refs (num %ld, first %p)\n",
-		 delayed_refs->num_entries, fs_info->tree_mod_seq_list.next);
-	spin_lock(&delayed_refs->lock);
-}
 #ifdef SCRAMBLE_DELAYED_REFS
 /*
  * Normally delayed refs get processed in ascending bytenr order. This
 	struct btrfs_delayed_ref_root *delayed_refs;
 	struct btrfs_delayed_ref_node *ref;
 	struct list_head cluster;
-	struct list_head *first_seq = NULL;
 	int ret;
 	u64 delayed_start;
 	int run_all = count == (unsigned long)-1;
 	int run_most = 0;
-	unsigned long num_refs = 0;
+	int loops;
-	int consider_waiting;
 	/* We'll clean this up in btrfs_cleanup_transaction */
 	if (trans->aborted)
 	delayed_refs = &trans->transaction->delayed_refs;
 	INIT_LIST_HEAD(&cluster);
 again:
-	consider_waiting = 0;
+	loops = 0;
 	spin_lock(&delayed_refs->lock);
 #ifdef SCRAMBLE_DELAYED_REFS
 		if (ret)
 			break;
-		if (delayed_start >= delayed_refs->run_delayed_start) {
-			if (consider_waiting == 0) {
-				/*
-				 * btrfs_find_ref_cluster looped. let's do one
-				 * more cycle. if we don't run any delayed ref
-				 * during that cycle (because we can't because
-				 * all of them are blocked) and if the number of
-				 * refs doesn't change, we avoid busy waiting.
-				 */
-				consider_waiting = 1;
-				num_refs = delayed_refs->num_entries;
-				first_seq = root->fs_info->tree_mod_seq_list.next;
-			} else {
-				wait_for_more_refs(root->fs_info, delayed_refs,
-						   num_refs, first_seq);
-				/*
-				 * after waiting, things have changed. we
-				 * dropped the lock and someone else might have
-				 * run some refs, built new clusters and so on.
-				 * therefore, we restart staleness detection.
-				 */
-				consider_waiting = 0;
-			}
-		}
 		ret = run_clustered_refs(trans, root, &cluster);
 		if (ret < 0) {
 			spin_unlock(&delayed_refs->lock);
 		if (count == 0)
 			break;
-		if (ret || delayed_refs->run_delayed_start == 0) {
+		if (delayed_start >= delayed_refs->run_delayed_start) {
+			if (loops == 0) {
+				/*
+				 * btrfs_find_ref_cluster looped. let's do one
+				 * more cycle. if we don't run any delayed ref
+				 * during that cycle (because we can't because
+				 * all of them are blocked), bail out.
+				 */
+				loops = 1;
+			} else {
+				/*
+				 * no runnable refs left, stop trying
+				 */
+				BUG_ON(run_all);
+				break;
+			}
+		}
+		if (ret) {
 			/* refs were run, let's reset staleness detection */
-			consider_waiting = 0;
+			loops = 0;
 		}
 	}
 	}
 	spin_unlock(&block_group->lock);
-	num_pages = (int)div64_u64(block_group->key.offset, 1024 * 1024 * 1024);
+	/*
+	 * Try to preallocate enough space based on how big the block group is.
+	 * Keep in mind this has to include any pinned space which could end up
+	 * taking up quite a bit since it's not folded into the other space
+	 * cache.
+	 */
+	num_pages = (int)div64_u64(block_group->key.offset, 256 * 1024 * 1024);
 	if (!num_pages)
 		num_pages = 1;
-	/*
-	 * Just to make absolutely sure we have enough space, we're going to
-	 * preallocate 12 pages worth of space for each block group.  In
-	 * practice we ought to use at most 8, but we need extra space so we can
-	 * add our header and have a terminator between the extents and the
-	 * bitmaps.
-	 */
 	num_pages *= 16;
 	num_pages *= PAGE_CACHE_SIZE;
 	if (root->fs_info->quota_enabled) {
 		ret = btrfs_qgroup_reserve(root, num_bytes +
 					   nr_extents * root->leafsize);
-		if (ret)
+		if (ret) {
+			mutex_unlock(&BTRFS_I(inode)->delalloc_mutex);
 			return ret;
+		}
 	}
 	ret = reserve_metadata_bytes(root, block_rsv, to_reserve, flush);
 	rb_erase(&head->node.rb_node, &delayed_refs->root);
 	delayed_refs->num_entries--;
-	smp_mb();
-	if (waitqueue_active(&root->fs_info->tree_mod_seq_wait))
-		wake_up(&root->fs_info->tree_mod_seq_wait);
 	/*
 	 * we don't take a ref on the node because we're removing it from the

fs/btrfs/extent_io.c+2−15

@@ -2330,23 +2330,10 @@ static void end_bio_extent_readpage(struct bio *bio, int err) · 2329 unmodified lines
2330	if (uptodate && tree->ops && tree->ops->readpage_end_io_hook) {	2330	if (uptodate && tree->ops && tree->ops->readpage_end_io_hook) {
2331	ret = tree->ops->readpage_end_io_hook(page, start, end,	2331	ret = tree->ops->readpage_end_io_hook(page, start, end,
2332	state, mirror);	2332	state, mirror);
2333	if (ret) {	2333	if (ret)
2334	/* no IO indicated but software detected errors
2335	* in the block, either checksum errors or
2336	* issues with the contents */
2337	struct btrfs_root *root =
2338	BTRFS_I(page->mapping->host)->root;
2339	struct btrfs_device *device;
2340
2341	uptodate = 0;	2334	uptodate = 0;
2342	device = btrfs_find_device_for_logical(	2335	else
2343	root, start, mirror);
2344	if (device)
2345	btrfs_dev_stat_inc_and_print(device,
2346	BTRFS_DEV_STAT_CORRUPTION_ERRS);
2347	} else {
2348	clean_io_failure(start, page);	2336	clean_io_failure(start, page);
2349	}
2350	}	2337	}
2351		2338
2352	if (!uptodate && tree->ops && tree->ops->readpage_io_failed_hook) {	2339	if (!uptodate && tree->ops && tree->ops->readpage_io_failed_hook) {

fs/btrfs/file-item.c+2−2

@@ -272,9 +272,9 @@ int btrfs_lookup_bio_sums(struct btrfs_root root, struct inode inode, · 271 unmodified lines
272	}	272	}
273		273
274	int btrfs_lookup_bio_sums_dio(struct btrfs_root root, struct inode inode,	274	int btrfs_lookup_bio_sums_dio(struct btrfs_root root, struct inode inode,
275	struct bio bio, u64 offset, u32 dst)	275	struct bio *bio, u64 offset)
276	{	276	{
277	return __btrfs_lookup_bio_sums(root, inode, bio, offset, dst, 1);	277	return __btrfs_lookup_bio_sums(root, inode, bio, offset, NULL, 1);
278	}	278	}
279		279
280	int btrfs_lookup_csums_range(struct btrfs_root *root, u64 start, u64 end,	280	int btrfs_lookup_csums_range(struct btrfs_root *root, u64 start, u64 end,

fs/btrfs/inode.c+164−162

 	nr_pages = (async_cow->end - async_cow->start + PAGE_CACHE_SIZE) >>
 		PAGE_CACHE_SHIFT;
-	atomic_sub(nr_pages, &root->fs_info->async_delalloc_pages);
+	if (atomic_sub_return(nr_pages, &root->fs_info->async_delalloc_pages) <
-	if (atomic_read(&root->fs_info->async_delalloc_pages) <
 	    5 * 1024 * 1024 &&
 	    waitqueue_active(&root->fs_info->async_submit_wait))
 		wake_up(&root->fs_info->async_submit_wait);
 				trans = btrfs_join_transaction_nolock(root);
 			else
 				trans = btrfs_join_transaction(root);
-			if (IS_ERR(trans))
+			if (IS_ERR(trans)) {
-				return PTR_ERR(trans);
+				ret = PTR_ERR(trans);
+				trans = NULL;
+				goto out;
+			}
 			trans->block_rsv = &root->fs_info->delalloc_block_rsv;
 			ret = btrfs_update_inode_fallback(trans, root, inode);
 			if (ret) /* -ENOMEM or corruption */
 	btrfs_i_size_write(dir, dir->i_size - name_len * 2);
 	inode_inc_iversion(dir);
 	dir->i_mtime = dir->i_ctime = CURRENT_TIME;
-	ret = btrfs_update_inode(trans, root, dir);
+	ret = btrfs_update_inode_fallback(trans, root, dir);
 	if (ret)
 		btrfs_abort_transaction(trans, root, ret);
 out:
 	return ret;
 }
+static int lock_extent_direct(struct inode *inode, u64 lockstart, u64 lockend,
+			      struct extent_state **cached_state, int writing)
+{
+	struct btrfs_ordered_extent *ordered;
+	int ret = 0;
+	while (1) {
+		lock_extent_bits(&BTRFS_I(inode)->io_tree, lockstart, lockend,
+				 0, cached_state);
+		/*
+		 * We're concerned with the entire range that we're going to be
+		 * doing DIO to, so we need to make sure theres no ordered
+		 * extents in this range.
+		 */
+		ordered = btrfs_lookup_ordered_range(inode, lockstart,
+						     lockend - lockstart + 1);
+		/*
+		 * We need to make sure there are no buffered pages in this
+		 * range either, we could have raced between the invalidate in
+		 * generic_file_direct_write and locking the extent.  The
+		 * invalidate needs to happen so that reads after a write do not
+		 * get stale data.
+		 */
+		if (!ordered && (!writing ||
+		    !test_range_bit(&BTRFS_I(inode)->io_tree,
+				    lockstart, lockend, EXTENT_UPTODATE, 0,
+				    *cached_state)))
+			break;
+		unlock_extent_cached(&BTRFS_I(inode)->io_tree, lockstart, lockend,
+				     cached_state, GFP_NOFS);
+		if (ordered) {
+			btrfs_start_ordered_extent(inode, ordered, 1);
+			btrfs_put_ordered_extent(ordered);
+		} else {
+			/* Screw you mmap */
+			ret = filemap_write_and_wait_range(inode->i_mapping,
+							   lockstart,
+							   lockend);
+			if (ret)
+				break;
+			/*
+			 * If we found a page that couldn't be invalidated just
+			 * fall back to buffered.
+			 */
+			ret = invalidate_inode_pages2_range(inode->i_mapping,
+					lockstart >> PAGE_CACHE_SHIFT,
+					lockend >> PAGE_CACHE_SHIFT);
+			if (ret)
+				break;
+		}
+		cond_resched();
+	}
+	return ret;
+}
 static int btrfs_get_blocks_direct(struct inode *inode, sector_t iblock,
 				   struct buffer_head *bh_result, int create)
 {
 	struct extent_map *em;
 	struct btrfs_root *root = BTRFS_I(inode)->root;
+	struct extent_state *cached_state = NULL;
 	u64 start = iblock << inode->i_blkbits;
+	u64 lockstart, lockend;
 	u64 len = bh_result->b_size;
 	struct btrfs_trans_handle *trans;
+	int unlock_bits = EXTENT_LOCKED;
+	int ret;
+	if (create) {
+		ret = btrfs_delalloc_reserve_space(inode, len);
+		if (ret)
+			return ret;
+		unlock_bits |= EXTENT_DELALLOC | EXTENT_DIRTY;
+	} else {
+		len = min_t(u64, len, root->sectorsize);
+	}
+	lockstart = start;
+	lockend = start + len - 1;
+	/*
+	 * If this errors out it's because we couldn't invalidate pagecache for
+	 * this range and we need to fallback to buffered.
+	 */
+	if (lock_extent_direct(inode, lockstart, lockend, &cached_state, create))
+		return -ENOTBLK;
+	if (create) {
+		ret = set_extent_bit(&BTRFS_I(inode)->io_tree, lockstart,
+				     lockend, EXTENT_DELALLOC, NULL,
+				     &cached_state, GFP_NOFS);
+		if (ret)
+			goto unlock_err;
+	}
 	em = btrfs_get_extent(inode, NULL, 0, start, len, 0);
-	if (IS_ERR(em))
+	if (IS_ERR(em)) {
-		return PTR_ERR(em);
+		ret = PTR_ERR(em);
+		goto unlock_err;
+	}
 	/*
 	 * Ok for INLINE and COMPRESSED extents we need to fallback on buffered
 	if (test_bit(EXTENT_FLAG_COMPRESSED, &em->flags) ||
 	    em->block_start == EXTENT_MAP_INLINE) {
 		free_extent_map(em);
-		return -ENOTBLK;
+		ret = -ENOTBLK;
+		goto unlock_err;
 	}
 	/* Just a good old fashioned hole, return */
 	if (!create && (em->block_start == EXTENT_MAP_HOLE ||
 			test_bit(EXTENT_FLAG_PREALLOC, &em->flags))) {
 		free_extent_map(em);
-		/* DIO will do one hole at a time, so just unlock a sector */
+		ret = 0;
-		unlock_extent(&BTRFS_I(inode)->io_tree, start,
+		goto unlock_err;
-			      start + root->sectorsize - 1);
-		return 0;
 	}
 	/*
 	 *
 	 */
 	if (!create) {
-		len = em->len - (start - em->start);
+		len = min(len, em->len - (start - em->start));
-		goto map;
+		lockstart = start + len;
+		goto unlock;
 	}
 	if (test_bit(EXTENT_FLAG_PREALLOC, &em->flags) ||
 			btrfs_end_transaction(trans, root);
 			if (ret) {
 				free_extent_map(em);
-				return ret;
+				goto unlock_err;
 			}
 			goto unlock;
 		}
 	 */
 	len = bh_result->b_size;
 	em = btrfs_new_extent_direct(inode, em, start, len);
-	if (IS_ERR(em))
+	if (IS_ERR(em)) {
-		return PTR_ERR(em);
+		ret = PTR_ERR(em);
+		goto unlock_err;
+	}
 	len = min(len, em->len - (start - em->start));
 unlock:
-	clear_extent_bit(&BTRFS_I(inode)->io_tree, start, start + len - 1,
-			  EXTENT_LOCKED | EXTENT_DELALLOC | EXTENT_DIRTY, 1,
-			  0, NULL, GFP_NOFS);
-map:
 	bh_result->b_blocknr = (em->block_start + (start - em->start)) >>
 		inode->i_blkbits;
 	bh_result->b_size = len;
 			i_size_write(inode, start + len);
 	}
+	/*
+	 * In the case of write we need to clear and unlock the entire range,
+	 * in the case of read we need to unlock only the end area that we
+	 * aren't using if there is any left over space.
+	 */
+	if (lockstart < lockend) {
+		if (create && len < lockend - lockstart) {
+			clear_extent_bit(&BTRFS_I(inode)->io_tree, lockstart,
+					 lockstart + len - 1, unlock_bits, 1, 0,
+					 &cached_state, GFP_NOFS);
+			/*
+			 * Beside unlock, we also need to cleanup reserved space
+			 * for the left range by attaching EXTENT_DO_ACCOUNTING.
+			 */
+			clear_extent_bit(&BTRFS_I(inode)->io_tree,
+					 lockstart + len, lockend,
+					 unlock_bits | EXTENT_DO_ACCOUNTING,
+					 1, 0, NULL, GFP_NOFS);
+		} else {
+			clear_extent_bit(&BTRFS_I(inode)->io_tree, lockstart,
+					 lockend, unlock_bits, 1, 0,
+					 &cached_state, GFP_NOFS);
+		}
+	} else {
+		free_extent_state(cached_state);
+	}
 	free_extent_map(em);
 	return 0;
+unlock_err:
+	if (create)
+		unlock_bits |= EXTENT_DO_ACCOUNTING;
+	clear_extent_bit(&BTRFS_I(inode)->io_tree, lockstart, lockend,
+			 unlock_bits, 1, 0, &cached_state, GFP_NOFS);
+	return ret;
 }
 struct btrfs_dio_private {
 	u64 logical_offset;
 	u64 disk_bytenr;
 	u64 bytes;
-	u32 *csums;
 	void *private;
 	/* number of bios pending for this dio */
 	struct inode *inode = dip->inode;
 	struct btrfs_root *root = BTRFS_I(inode)->root;
 	u64 start;
-	u32 *private = dip->csums;
 	start = dip->logical_offset;
 	do {
 			struct page *page = bvec->bv_page;
 			char *kaddr;
 			u32 csum = ~(u32)0;
+			u64 private = ~(u32)0;
 			unsigned long flags;
+			if (get_state_private(&BTRFS_I(inode)->io_tree,
+					      start, &private))
+				goto failed;
 			local_irq_save(flags);
 			kaddr = kmap_atomic(page);
 			csum = btrfs_csum_data(root, kaddr + bvec->bv_offset,
 			local_irq_restore(flags);
 			flush_dcache_page(bvec->bv_page);
-			if (csum != *private) {
+			if (csum != private) {
+failed:
 				printk(KERN_ERR "btrfs csum failed ino %llu off"
 				      " %llu csum %u private %u\n",
 				      (unsigned long long)btrfs_ino(inode),
 				      (unsigned long long)start,
-				      csum, *private);
+				      csum, (unsigned)private);
 				err = -EIO;
 			}
 		}
 		start += bvec->bv_len;
-		private++;
 		bvec++;
 	} while (bvec <= bvec_end);
 		      dip->logical_offset + dip->bytes - 1);
 	bio->bi_private = dip->private;
-	kfree(dip->csums);
 	kfree(dip);
 	/* If we had a csum failure make sure to clear the uptodate flag */
 static inline int __btrfs_submit_dio_bio(struct bio *bio, struct inode *inode,
 					 int rw, u64 file_offset, int skip_sum,
-					 u32 *csums, int async_submit)
+					 int async_submit)
 {
 	int write = rw & REQ_WRITE;
 	struct btrfs_root *root = BTRFS_I(inode)->root;
 		if (ret)
 			goto err;
 	} else if (!skip_sum) {
-		ret = btrfs_lookup_bio_sums_dio(root, inode, bio,
+		ret = btrfs_lookup_bio_sums_dio(root, inode, bio, file_offset);
-					  file_offset, csums);
 		if (ret)
 			goto err;
 	}
 	u64 submit_len = 0;
 	u64 map_length;
 	int nr_pages = 0;
-	u32 *csums = dip->csums;
 	int ret = 0;
 	int async_submit = 0;
-	int write = rw & REQ_WRITE;
 	map_length = orig_bio->bi_size;
 	ret = btrfs_map_block(map_tree, READ, start_sector << 9,
 			atomic_inc(&dip->pending_bios);
 			ret = __btrfs_submit_dio_bio(bio, inode, rw,
 						     file_offset, skip_sum,
-						     csums, async_submit);
+						     async_submit);
 			if (ret) {
 				bio_put(bio);
 				atomic_dec(&dip->pending_bios);
 				goto out_err;
 			}
-			/* Write's use the ordered csums */
-			if (!write && !skip_sum)
-				csums = csums + nr_pages;
 			start_sector += submit_len >> 9;
 			file_offset += submit_len;
 submit:
 	ret = __btrfs_submit_dio_bio(bio, inode, rw, file_offset, skip_sum,
-				     csums, async_submit);
+				     async_submit);
 	if (!ret)
 		return 0;
 		ret = -ENOMEM;
 		goto free_ordered;
 	}
-	dip->csums = NULL;
-	/* Write's use the ordered csum stuff, so we don't need dip->csums */
-	if (!write && !skip_sum) {
-		dip->csums = kmalloc(sizeof(u32) * bio->bi_vcnt, GFP_NOFS);
-		if (!dip->csums) {
-			kfree(dip);
-			ret = -ENOMEM;
-			goto free_ordered;
-		}
-	}
 	dip->private = bio->bi_private;
 	dip->inode = inode;
 out:
 	return retval;
 }
 static ssize_t btrfs_direct_IO(int rw, struct kiocb *iocb,
 			const struct iovec *iov, loff_t offset,
 			unsigned long nr_segs)
 {
 	struct file *file = iocb->ki_filp;
 	struct inode *inode = file->f_mapping->host;
-	struct btrfs_ordered_extent *ordered;
-	struct extent_state *cached_state = NULL;
-	u64 lockstart, lockend;
-	ssize_t ret;
-	int writing = rw & WRITE;
-	int write_bits = 0;
-	size_t count = iov_length(iov, nr_segs);
 	if (check_direct_IO(BTRFS_I(inode)->root, rw, iocb, iov,
-			    offset, nr_segs)) {
+			    offset, nr_segs))
 		return 0;
-	}
-	lockstart = offset;
-	lockend = offset + count - 1;
-	if (writing) {
-		ret = btrfs_delalloc_reserve_space(inode, count);
-		if (ret)
-			goto out;
-	}
-	while (1) {
-		lock_extent_bits(&BTRFS_I(inode)->io_tree, lockstart, lockend,
-				 0, &cached_state);
-		/*
-		 * We're concerned with the entire range that we're going to be
-		 * doing DIO to, so we need to make sure theres no ordered
-		 * extents in this range.
-		 */
-		ordered = btrfs_lookup_ordered_range(inode, lockstart,
-						     lockend - lockstart + 1);
-		/*
-		 * We need to make sure there are no buffered pages in this
-		 * range either, we could have raced between the invalidate in
-		 * generic_file_direct_write and locking the extent.  The
-		 * invalidate needs to happen so that reads after a write do not
-		 * get stale data.
-		 */
-		if (!ordered && (!writing ||
-		    !test_range_bit(&BTRFS_I(inode)->io_tree,
-				    lockstart, lockend, EXTENT_UPTODATE, 0,
-				    cached_state)))
-			break;
-		unlock_extent_cached(&BTRFS_I(inode)->io_tree, lockstart, lockend,
-				     &cached_state, GFP_NOFS);
-		if (ordered) {
-			btrfs_start_ordered_extent(inode, ordered, 1);
-			btrfs_put_ordered_extent(ordered);
-		} else {
-			/* Screw you mmap */
-			ret = filemap_write_and_wait_range(file->f_mapping,
-							   lockstart,
-							   lockend);
-			if (ret)
-				goto out;
-			/*
-			 * If we found a page that couldn't be invalidated just
-			 * fall back to buffered.
-			 */
-			ret = invalidate_inode_pages2_range(file->f_mapping,
-					lockstart >> PAGE_CACHE_SHIFT,
-					lockend >> PAGE_CACHE_SHIFT);
-			if (ret) {
-				if (ret == -EBUSY)
-					ret = 0;
-				goto out;
-			}
-		}
-		cond_resched();
-	}
-	/*
+	return __blockdev_direct_IO(rw, iocb, inode,
-	 * we don't use btrfs_set_extent_delalloc because we don't want
-	 * the dirty or uptodate bits
-	 */
-	if (writing) {
-		write_bits = EXTENT_DELALLOC | EXTENT_DO_ACCOUNTING;
-		ret = set_extent_bit(&BTRFS_I(inode)->io_tree, lockstart, lockend,
-				     EXTENT_DELALLOC, NULL, &cached_state,
-				     GFP_NOFS);
-		if (ret) {
-			clear_extent_bit(&BTRFS_I(inode)->io_tree, lockstart,
-					 lockend, EXTENT_LOCKED | write_bits,
-					 1, 0, &cached_state, GFP_NOFS);
-			goto out;
-		}
-	}
-	free_extent_state(cached_state);
-	cached_state = NULL;
-	ret = __blockdev_direct_IO(rw, iocb, inode,
 		   BTRFS_I(inode)->root->fs_info->fs_devices->latest_bdev,
 		   iov, offset, nr_segs, btrfs_get_blocks_direct, NULL,
 		   btrfs_submit_direct, 0);
-	if (ret < 0 && ret != -EIOCBQUEUED) {
-		clear_extent_bit(&BTRFS_I(inode)->io_tree, offset,
-			      offset + iov_length(iov, nr_segs) - 1,
-			      EXTENT_LOCKED | write_bits, 1, 0,
-			      &cached_state, GFP_NOFS);
-	} else if (ret >= 0 && ret < iov_length(iov, nr_segs)) {
-		/*
-		 * We're falling back to buffered, unlock the section we didn't
-		 * do IO on.
-		 */
-		clear_extent_bit(&BTRFS_I(inode)->io_tree, offset + ret,
-			      offset + iov_length(iov, nr_segs) - 1,
-			      EXTENT_LOCKED | write_bits, 1, 0,
-			      &cached_state, GFP_NOFS);
-	}
-out:
-	free_extent_state(cached_state);
-	return ret;
 }
 static int btrfs_fiemap(struct inode *inode, struct fiemap_extent_info *fieinfo,

fs/btrfs/ioctl.c+1−1

@@ -424,7 +424,7 @@ static noinline int create_subvol(struct btrfs_root *root, · 423 unmodified lines
424	uuid_le_gen(&new_uuid);	424	uuid_le_gen(&new_uuid);
425	memcpy(root_item.uuid, new_uuid.b, BTRFS_UUID_SIZE);	425	memcpy(root_item.uuid, new_uuid.b, BTRFS_UUID_SIZE);
426	root_item.otime.sec = cpu_to_le64(cur_time.tv_sec);	426	root_item.otime.sec = cpu_to_le64(cur_time.tv_sec);
427	root_item.otime.nsec = cpu_to_le64(cur_time.tv_nsec);	427	root_item.otime.nsec = cpu_to_le32(cur_time.tv_nsec);
428	root_item.ctime = root_item.otime;	428	root_item.ctime = root_item.otime;
429	btrfs_set_root_ctransid(&root_item, trans->transid);	429	btrfs_set_root_ctransid(&root_item, trans->transid);
430	btrfs_set_root_otransid(&root_item, trans->transid);	430	btrfs_set_root_otransid(&root_item, trans->transid);

fs/btrfs/locking.c+1−1

@@ -67,7 +67,7 @@ void btrfs_clear_lock_blocking_rw(struct extent_buffer *eb, int rw) · 66 unmodified lines
67	{	67	{
68	if (eb->lock_nested) {	68	if (eb->lock_nested) {
69	read_lock(&eb->lock);	69	read_lock(&eb->lock);
70	if (&eb->lock_nested && current->pid == eb->lock_owner) {	70	if (eb->lock_nested && current->pid == eb->lock_owner) {
71	read_unlock(&eb->lock);	71	read_unlock(&eb->lock);
72	return;	72	return;
73	}	73	}

fs/btrfs/qgroup.c+9−3

 	spin_lock(&fs_info->qgroup_lock);
 	dstgroup = add_qgroup_rb(fs_info, objectid);
-	if (!dstgroup)
+	if (IS_ERR(dstgroup)) {
+		ret = PTR_ERR(dstgroup);
 		goto unlock;
+	}
 	if (srcid) {
 		srcgroup = find_qgroup_rb(fs_info, srcid);
-		if (!srcgroup)
+		if (!srcgroup) {
+			ret = -EINVAL;
 			goto unlock;
+		}
 		dstgroup->rfer = srcgroup->rfer - level_size;
 		dstgroup->rfer_cmpr = srcgroup->rfer_cmpr - level_size;
 		srcgroup->excl = level_size;
 		qgroup_dirty(fs_info, srcgroup);
 	}
-	if (!inherit)
+	if (!inherit) {
+		ret = -EINVAL;
 		goto unlock;
+	}
 	i_qgroups = (u64 *)(inherit + 1);
 	for (i = 0; i < inherit->num_qgroups; ++i) {

fs/btrfs/root-tree.c+2−2

@@ -544,8 +544,8 @@ void btrfs_update_root_times(struct btrfs_trans_handle *trans, · 543 unmodified lines
544	struct timespec ct = CURRENT_TIME;	544	struct timespec ct = CURRENT_TIME;
545		545
546	spin_lock(&root->root_times_lock);	546	spin_lock(&root->root_times_lock);
547	item->ctransid = trans->transid;	547	item->ctransid = cpu_to_le64(trans->transid);
548	item->ctime.sec = cpu_to_le64(ct.tv_sec);	548	item->ctime.sec = cpu_to_le64(ct.tv_sec);
549	item->ctime.nsec = cpu_to_le64(ct.tv_nsec);	549	item->ctime.nsec = cpu_to_le32(ct.tv_nsec);
550	spin_unlock(&root->root_times_lock);	550	spin_unlock(&root->root_times_lock);
551	}	551	}

fs/btrfs/super.c+11−4

 	struct btrfs_trans_handle *trans;
 	struct btrfs_fs_info *fs_info = btrfs_sb(sb);
 	struct btrfs_root *root = fs_info->tree_root;
-	int ret;
 	trace_btrfs_sync_fs(wait);
 	btrfs_wait_ordered_extents(root, 0, 0);
-	trans = btrfs_start_transaction(root, 0);
+	spin_lock(&fs_info->trans_lock);
+	if (!fs_info->running_transaction) {
+		spin_unlock(&fs_info->trans_lock);
+		return 0;
+	}
+	spin_unlock(&fs_info->trans_lock);
+	trans = btrfs_join_transaction(root);
 	if (IS_ERR(trans))
 		return PTR_ERR(trans);
-	ret = btrfs_commit_transaction(trans, root);
+	return btrfs_commit_transaction(trans, root);
-	return ret;
 }
 static int btrfs_show_options(struct seq_file *seq, struct dentry *dentry)
 	while (cur_devices) {
 		head = &cur_devices->devices;
 		list_for_each_entry(dev, head, dev_list) {
+			if (dev->missing)
+				continue;
 			if (!first_dev || dev->devid < first_dev->devid)
 				first_dev = dev;
 		}

fs/btrfs/transaction.c+2−1

 	btrfs_i_size_write(parent_inode, parent_inode->i_size +
 					 dentry->d_name.len * 2);
+	parent_inode->i_mtime = parent_inode->i_ctime = CURRENT_TIME;
 	ret = btrfs_update_inode(trans, parent_root, parent_inode);
 	if (ret)
 		goto abort_trans_dput;
 	memcpy(new_root_item->parent_uuid, root->root_item.uuid,
 			BTRFS_UUID_SIZE);
 	new_root_item->otime.sec = cpu_to_le64(cur_time.tv_sec);
-	new_root_item->otime.nsec = cpu_to_le64(cur_time.tv_nsec);
+	new_root_item->otime.nsec = cpu_to_le32(cur_time.tv_nsec);
 	btrfs_set_root_otransid(new_root_item, trans->transid);
 	memset(&new_root_item->stime, 0, sizeof(new_root_item->stime));
 	memset(&new_root_item->rtime, 0, sizeof(new_root_item->rtime));

fs/btrfs/volumes.c+6−27

 		cur = pending;
 		pending = pending->bi_next;
 		cur->bi_next = NULL;
-		atomic_dec(&fs_info->nr_async_bios);
-		if (atomic_read(&fs_info->nr_async_bios) < limit &&
+		if (atomic_dec_return(&fs_info->nr_async_bios) < limit &&
 		    waitqueue_active(&fs_info->async_submit_wait))
 			wake_up(&fs_info->async_submit_wait);
 		memcpy(new_device, device, sizeof(*new_device));
 		/* Safe because we are under uuid_mutex */
-		name = rcu_string_strdup(device->name->str, GFP_NOFS);
+		if (device->name) {
-		BUG_ON(device->name && !name); /* -ENOMEM */
+			name = rcu_string_strdup(device->name->str, GFP_NOFS);
-		rcu_assign_pointer(new_device->name, name);
+			BUG_ON(device->name && !name); /* -ENOMEM */
+			rcu_assign_pointer(new_device->name, name);
+		}
 		new_device->bdev = NULL;
 		new_device->writeable = 0;
 		new_device->in_fs_metadata = 0;
 	return ret;
 }
-struct btrfs_device *btrfs_find_device_for_logical(struct btrfs_root *root,
-						   u64 logical, int mirror_num)
-{
-	struct btrfs_mapping_tree *map_tree = &root->fs_info->mapping_tree;
-	int ret;
-	u64 map_length = 0;
-	struct btrfs_bio *bbio = NULL;
-	struct btrfs_device *device;
-	BUG_ON(mirror_num == 0);
-	ret = btrfs_map_block(map_tree, WRITE, logical, &map_length, &bbio,
-			      mirror_num);
-	if (ret) {
-		BUG_ON(bbio != NULL);
-		return NULL;
-	}
-	BUG_ON(mirror_num != bbio->mirror_num);
-	device = bbio->stripes[mirror_num - 1].dev;
-	kfree(bbio);
-	return device;
-}
 int btrfs_read_chunk_tree(struct btrfs_root *root)
 {
 	struct btrfs_path *path;

fs/btrfs/volumes.h+0−2

 int btrfs_chunk_readonly(struct btrfs_root *root, u64 chunk_offset);
 int find_free_dev_extent(struct btrfs_device *device, u64 num_bytes,
 			 u64 *start, u64 *max_avail);
-struct btrfs_device *btrfs_find_device_for_logical(struct btrfs_root *root,
-						   u64 logical, int mirror_num);
 void btrfs_dev_stat_print_on_error(struct btrfs_device *device);
 void btrfs_dev_stat_inc_and_print(struct btrfs_device *dev, int index);
 int btrfs_get_dev_stats(struct btrfs_root *root,

fs/buffer.c+30−36

@@ -914,7 +914,7 @@ link_dev_buffers(struct page page, struct buffer_head head) · 913 unmodified lines
914	/*	914	/*
915	* Initialise the state of a blockdev page's buffers.	915	* Initialise the state of a blockdev page's buffers.
916	*/	916	*/
917	static void	917	static sector_t
918	init_page_buffers(struct page page, struct block_device bdev,	918	init_page_buffers(struct page page, struct block_device bdev,
919	sector_t block, int size)	919	sector_t block, int size)
920	{	920	{
@@ -936,33 +936,41 @@ init_page_buffers(struct page page, struct block_device bdev, · 15 unmodified lines
936	block++;	936	block++;
937	bh = bh->b_this_page;	937	bh = bh->b_this_page;
938	} while (bh != head);	938	} while (bh != head);
		939
		940	/*
		941	* Caller needs to validate requested block against end of device.
		942	*/
		943	return end_block;
939	}	944	}
940		945
941	/*	946	/*
942	* Create the page-cache page that contains the requested block.	947	* Create the page-cache page that contains the requested block.
943	*	948	*
944	* This is user purely for blockdev mappings.	949	* This is used purely for blockdev mappings.
945	*/	950	*/
946	static struct page *	951	static int
947	grow_dev_page(struct block_device *bdev, sector_t block,	952	grow_dev_page(struct block_device *bdev, sector_t block,
948	pgoff_t index, int size)	953	pgoff_t index, int size, int sizebits)
949	{	954	{
950	struct inode *inode = bdev->bd_inode;	955	struct inode *inode = bdev->bd_inode;
951	struct page *page;	956	struct page *page;
952	struct buffer_head *bh;	957	struct buffer_head *bh;
		958	sector_t end_block;
		959	int ret = 0; /* Will call free_more_memory() */
953		960
954	page = find_or_create_page(inode->i_mapping, index,	961	page = find_or_create_page(inode->i_mapping, index,
955	(mapping_gfp_mask(inode->i_mapping) & ~__GFP_FS)\|__GFP_MOVABLE);	962	(mapping_gfp_mask(inode->i_mapping) & ~__GFP_FS)\|__GFP_MOVABLE);
956	if (!page)	963	if (!page)
957	return NULL;	964	return ret;
958		965
959	BUG_ON(!PageLocked(page));	966	BUG_ON(!PageLocked(page));
960		967
961	if (page_has_buffers(page)) {	968	if (page_has_buffers(page)) {
962	bh = page_buffers(page);	969	bh = page_buffers(page);
963	if (bh->b_size == size) {	970	if (bh->b_size == size) {
964	init_page_buffers(page, bdev, block, size);	971	end_block = init_page_buffers(page, bdev,
965	return page;	972	index << sizebits, size);
		973	goto done;
966	}	974	}
967	if (!try_to_free_buffers(page))	975	if (!try_to_free_buffers(page))
968	goto failed;	976	goto failed;
@@ -982,14 +990,14 @@ grow_dev_page(struct block_device *bdev, sector_t block, · 13 unmodified lines
982	*/	990	*/
983	spin_lock(&inode->i_mapping->private_lock);	991	spin_lock(&inode->i_mapping->private_lock);
984	link_dev_buffers(page, bh);	992	link_dev_buffers(page, bh);
985	init_page_buffers(page, bdev, block, size);	993	end_block = init_page_buffers(page, bdev, index << sizebits, size);
986	spin_unlock(&inode->i_mapping->private_lock);	994	spin_unlock(&inode->i_mapping->private_lock);
987	return page;	995	done:
988		996	ret = (block < end_block) ? 1 : -ENXIO;
989	failed:	997	failed:
990	unlock_page(page);	998	unlock_page(page);
991	page_cache_release(page);	999	page_cache_release(page);
992	return NULL;	1000	return ret;
993	}	1001	}
994		1002
995	/*	1003	/*
@@ -999,7 +1007,6 @@ failed: · 3 unmodified lines
999	static int	1007	static int
1000	grow_buffers(struct block_device *bdev, sector_t block, int size)	1008	grow_buffers(struct block_device *bdev, sector_t block, int size)
1001	{	1009	{
1002	struct page *page;
1003	pgoff_t index;	1010	pgoff_t index;
1004	int sizebits;	1011	int sizebits;
1005		1012
@@ -1023,22 +1030,14 @@ grow_buffers(struct block_device *bdev, sector_t block, int size) · 17 unmodified lines
1023	bdevname(bdev, b));	1030	bdevname(bdev, b));
1024	return -EIO;	1031	return -EIO;
1025	}	1032	}
1026	block = index << sizebits;	1033
1027	/* Create a page with the proper size buffers.. */	1034	/* Create a page with the proper size buffers.. */
1028	page = grow_dev_page(bdev, block, index, size);	1035	return grow_dev_page(bdev, block, index, size, sizebits);
1029	if (!page)
1030	return 0;
1031	unlock_page(page);
1032	page_cache_release(page);
1033	return 1;
1034	}	1036	}
1035		1037
1036	static struct buffer_head *	1038	static struct buffer_head *
1037	__getblk_slow(struct block_device *bdev, sector_t block, int size)	1039	__getblk_slow(struct block_device *bdev, sector_t block, int size)
1038	{	1040	{
1039	int ret;
1040	struct buffer_head *bh;
1041
1042	/* Size must be multiple of hard sectorsize */	1041	/* Size must be multiple of hard sectorsize */
1043	if (unlikely(size & (bdev_logical_block_size(bdev)-1) \|\|	1042	if (unlikely(size & (bdev_logical_block_size(bdev)-1) \|\|
1044	(size < 512 \|\| size > PAGE_SIZE))) {	1043	(size < 512 \|\| size > PAGE_SIZE))) {
@@ -1051,21 +1050,20 @@ __getblk_slow(struct block_device *bdev, sector_t block, int size) · 6 unmodified lines
1051	return NULL;	1050	return NULL;
1052	}	1051	}
1053		1052
1054	retry:	1053	for (;;) {
1055	bh = __find_get_block(bdev, block, size);	1054	struct buffer_head *bh;
1056	if (bh)	1055	int ret;
1057	return bh;
1058		1056
1059	ret = grow_buffers(bdev, block, size);
1060	if (ret == 0) {
1061	free_more_memory();
1062	goto retry;
1063	} else if (ret > 0) {
1064	bh = __find_get_block(bdev, block, size);	1057	bh = __find_get_block(bdev, block, size);
1065	if (bh)	1058	if (bh)
1066	return bh;	1059	return bh;
		1060
		1061	ret = grow_buffers(bdev, block, size);
		1062	if (ret < 0)
		1063	return NULL;
		1064	if (ret == 0)
		1065	free_more_memory();
1067	}	1066	}
1068	return NULL;
1069	}	1067	}
1070		1068
1071	/*	1069	/*
@@ -1321,10 +1319,6 @@ EXPORT_SYMBOL(__find_get_block); · 249 unmodified lines
1321	* which corresponds to the passed block_device, block and size. The	1319	* which corresponds to the passed block_device, block and size. The
1322	* returned buffer has its reference count incremented.	1320	* returned buffer has its reference count incremented.
1323	*	1321	*
1324	* __getblk() cannot fail - it just keeps trying. If you pass it an
1325	* illegal block number, __getblk() will happily return a buffer_head
1326	* which represents the non-existent block. Very weird.
1327	*
1328	* __getblk() will lock up the machine if grow_dev_page's try_to_free_buffers()	1322	* __getblk() will lock up the machine if grow_dev_page's try_to_free_buffers()
1329	* attempt is failing. FIXME, perhaps?	1323	* attempt is failing. FIXME, perhaps?
1330	*/	1324	*/

fs/cifs/cifssmb.c+8−3

@@ -1576,9 +1576,14 @@ cifs_readv_callback(struct mid_q_entry *mid) · 1575 unmodified lines
1576	/* result already set, check signature */	1576	/* result already set, check signature */
1577	if (server->sec_mode &	1577	if (server->sec_mode &
1578	(SECMODE_SIGN_REQUIRED \| SECMODE_SIGN_ENABLED)) {	1578	(SECMODE_SIGN_REQUIRED \| SECMODE_SIGN_ENABLED)) {
1579	if (cifs_verify_signature(rdata->iov, rdata->nr_iov,	1579	int rc = 0;
1580	server, mid->sequence_number + 1))	1580
1581	cERROR(1, "Unexpected SMB signature");	1581	rc = cifs_verify_signature(rdata->iov, rdata->nr_iov,
		1582	server,
		1583	mid->sequence_number + 1);
		1584	if (rc)
		1585	cERROR(1, "SMB signature verification returned "
		1586	"error = %d", rc);
1582	}	1587	}
1583	/* FIXME: should this be counted toward the initiating task? */	1588	/* FIXME: should this be counted toward the initiating task? */
1584	task_io_account_read(rdata->bytes);	1589	task_io_account_read(rdata->bytes);

fs/cifs/dir.c+1−8

 cifs_create_set_dentry:
 	if (rc != 0) {
 		cFYI(1, "Create worked, get_inode_info failed rc = %d", rc);
+		CIFSSMBClose(xid, tcon, *fileHandle);
 		goto out;
 	}
 	d_drop(direntry);
 	d_add(direntry, newinode);
-	/* ENOENT for create?  How weird... */
-	rc = -ENOENT;
-	if (!newinode) {
-		CIFSSMBClose(xid, tcon, *fileHandle);
-		goto out;
-	}
-	rc = 0;
 out:
 	kfree(buf);
 	kfree(full_path);

fs/cifs/inode.c+16−8

@@ -124,10 +124,10 @@ cifs_fattr_to_inode(struct inode inode, struct cifs_fattr fattr) · 123 unmodified lines
124	{	124	{
125	struct cifsInodeInfo *cifs_i = CIFS_I(inode);	125	struct cifsInodeInfo *cifs_i = CIFS_I(inode);
126	struct cifs_sb_info *cifs_sb = CIFS_SB(inode->i_sb);	126	struct cifs_sb_info *cifs_sb = CIFS_SB(inode->i_sb);
127	unsigned long oldtime = cifs_i->time;
128		127
129	cifs_revalidate_cache(inode, fattr);	128	cifs_revalidate_cache(inode, fattr);
130		129
		130	spin_lock(&inode->i_lock);
131	inode->i_atime = fattr->cf_atime;	131	inode->i_atime = fattr->cf_atime;
132	inode->i_mtime = fattr->cf_mtime;	132	inode->i_mtime = fattr->cf_mtime;
133	inode->i_ctime = fattr->cf_ctime;	133	inode->i_ctime = fattr->cf_ctime;
@@ -148,9 +148,6 @@ cifs_fattr_to_inode(struct inode inode, struct cifs_fattr fattr) · 14 unmodified lines
148	else	148	else
149	cifs_i->time = jiffies;	149	cifs_i->time = jiffies;
150		150
151	cFYI(1, "inode 0x%p old_time=%ld new_time=%ld", inode,
152	oldtime, cifs_i->time);
153
154	cifs_i->delete_pending = fattr->cf_flags & CIFS_FATTR_DELETE_PENDING;	151	cifs_i->delete_pending = fattr->cf_flags & CIFS_FATTR_DELETE_PENDING;
155		152
156	cifs_i->server_eof = fattr->cf_eof;	153	cifs_i->server_eof = fattr->cf_eof;
@@ -158,7 +155,6 @@ cifs_fattr_to_inode(struct inode inode, struct cifs_fattr fattr) · 1 unmodified line
158	* Can't safely change the file size here if the client is writing to	155	* Can't safely change the file size here if the client is writing to
159	* it due to potential races.	156	* it due to potential races.
160	*/	157	*/
161	spin_lock(&inode->i_lock);
162	if (is_size_safe_to_change(cifs_i, fattr->cf_eof)) {	158	if (is_size_safe_to_change(cifs_i, fattr->cf_eof)) {
163	i_size_write(inode, fattr->cf_eof);	159	i_size_write(inode, fattr->cf_eof);
164		160
@@ -859,12 +855,14 @@ struct inode cifs_root_iget(struct super_block sb) · 694 unmodified lines
859		855
860	if (rc && tcon->ipc) {	856	if (rc && tcon->ipc) {
861	cFYI(1, "ipc connection - fake read inode");	857	cFYI(1, "ipc connection - fake read inode");
		858	spin_lock(&inode->i_lock);
862	inode->i_mode \|= S_IFDIR;	859	inode->i_mode \|= S_IFDIR;
863	set_nlink(inode, 2);	860	set_nlink(inode, 2);
864	inode->i_op = &cifs_ipc_inode_ops;	861	inode->i_op = &cifs_ipc_inode_ops;
865	inode->i_fop = &simple_dir_operations;	862	inode->i_fop = &simple_dir_operations;
866	inode->i_uid = cifs_sb->mnt_uid;	863	inode->i_uid = cifs_sb->mnt_uid;
867	inode->i_gid = cifs_sb->mnt_gid;	864	inode->i_gid = cifs_sb->mnt_gid;
		865	spin_unlock(&inode->i_lock);
868	} else if (rc) {	866	} else if (rc) {
869	iget_failed(inode);	867	iget_failed(inode);
870	inode = ERR_PTR(rc);	868	inode = ERR_PTR(rc);
@@ -1110,6 +1108,15 @@ undo_setattr: · 239 unmodified lines
1110	goto out_close;	1108	goto out_close;
1111	}	1109	}
1112		1110
		1111	/* copied from fs/nfs/dir.c with small changes */
		1112	static void
		1113	cifs_drop_nlink(struct inode *inode)
		1114	{
		1115	spin_lock(&inode->i_lock);
		1116	if (inode->i_nlink > 0)
		1117	drop_nlink(inode);
		1118	spin_unlock(&inode->i_lock);
		1119	}
1113		1120
1114	/*	1121	/*
1115	* If dentry->d_inode is null (usually meaning the cached dentry	1122	* If dentry->d_inode is null (usually meaning the cached dentry
@@ -1166,13 +1173,13 @@ retry_std_delete: · 50 unmodified lines
1166	psx_del_no_retry:	1173	psx_del_no_retry:
1167	if (!rc) {	1174	if (!rc) {
1168	if (inode)	1175	if (inode)
1169	drop_nlink(inode);	1176	cifs_drop_nlink(inode);
1170	} else if (rc == -ENOENT) {	1177	} else if (rc == -ENOENT) {
1171	d_drop(dentry);	1178	d_drop(dentry);
1172	} else if (rc == -ETXTBSY) {	1179	} else if (rc == -ETXTBSY) {
1173	rc = cifs_rename_pending_delete(full_path, dentry, xid);	1180	rc = cifs_rename_pending_delete(full_path, dentry, xid);
1174	if (rc == 0)	1181	if (rc == 0)
1175	drop_nlink(inode);	1182	cifs_drop_nlink(inode);
1176	} else if ((rc == -EACCES) && (dosattr == 0) && inode) {	1183	} else if ((rc == -EACCES) && (dosattr == 0) && inode) {
1177	attrs = kzalloc(sizeof(*attrs), GFP_KERNEL);	1184	attrs = kzalloc(sizeof(*attrs), GFP_KERNEL);
1178	if (attrs == NULL) {	1185	if (attrs == NULL) {
@@ -1241,9 +1248,10 @@ cifs_mkdir_qinfo(struct inode inode, struct dentry dentry, umode_t mode, · 62 unmodified lines
1241	* setting nlink not necessary except in cases where we failed to get it	1248	* setting nlink not necessary except in cases where we failed to get it
1242	* from the server or was set bogus	1249	* from the server or was set bogus
1243	*/	1250	*/
		1251	spin_lock(&dentry->d_inode->i_lock);
1244	if ((dentry->d_inode) && (dentry->d_inode->i_nlink < 2))	1252	if ((dentry->d_inode) && (dentry->d_inode->i_nlink < 2))
1245	set_nlink(dentry->d_inode, 2);	1253	set_nlink(dentry->d_inode, 2);
1246		1254	spin_unlock(&dentry->d_inode->i_lock);
1247	mode &= ~current_umask();	1255	mode &= ~current_umask();
1248	/* must turn on setgid bit if parent dir has it */	1256	/* must turn on setgid bit if parent dir has it */
1249	if (inode->i_mode & S_ISGID)	1257	if (inode->i_mode & S_ISGID)

fs/cifs/link.c+2−0

 	if (old_file->d_inode) {
 		cifsInode = CIFS_I(old_file->d_inode);
 		if (rc == 0) {
+			spin_lock(&old_file->d_inode->i_lock);
 			inc_nlink(old_file->d_inode);
+			spin_unlock(&old_file->d_inode->i_lock);
 /* BB should we make this contingent on superblock flag NOATIME? */
 /*			old_file->d_inode->i_ctime = CURRENT_TIME;*/
 			/* parent dir timestamps will update from srv

fs/cifs/smb2misc.c+9−7

 			cERROR(1, "Bad protocol string signature header %x",
 				  *(unsigned int *) hdr->ProtocolId);
 		if (mid != hdr->MessageId)
-			cERROR(1, "Mids do not match");
+			cERROR(1, "Mids do not match: %llu and %llu", mid,
+				  hdr->MessageId);
 	}
 	cERROR(1, "Bad SMB detected. The Mid=%llu", hdr->MessageId);
 	return 1;
 	 * ie Validate the wct via smb2_struct_sizes table above
 	 */
-	if (length < 2 + sizeof(struct smb2_hdr)) {
+	if (length < sizeof(struct smb2_pdu)) {
 		if ((length >= sizeof(struct smb2_hdr)) && (hdr->Status != 0)) {
 			pdu->StructureSize2 = 0;
 			/*
 		return 1;
 	}
 	if (len > CIFSMaxBufSize + MAX_SMB2_HDR_SIZE - 4) {
-		cERROR(1, "SMB length greater than maximum, mid=%lld", mid);
+		cERROR(1, "SMB length greater than maximum, mid=%llu", mid);
 		return 1;
 	}
 	if (check_smb2_hdr(hdr, mid))
 		return 1;
-	if (hdr->StructureSize != SMB2_HEADER_SIZE) {
+	if (hdr->StructureSize != SMB2_HEADER_STRUCTURE_SIZE) {
-		cERROR(1, "Illegal structure size %d",
+		cERROR(1, "Illegal structure size %u",
 			  le16_to_cpu(hdr->StructureSize));
 		return 1;
 	}
 	if (4 + len != clc_len) {
 		cFYI(1, "Calculated size %u length %u mismatch mid %llu",
 			clc_len, 4 + len, mid);
-		if (clc_len == 4 + len + 1) /* BB FIXME (fix samba) */
+		/* server can return one byte more */
-			return 0; /* BB workaround Samba 3 bug SessSetup rsp */
+		if (clc_len == 4 + len + 1)
+			return 0;
 		return 1;
 	}
 	return 0;

fs/cifs/smb2pdu.h+6−4

 #define SMB2_PROTO_NUMBER __constant_cpu_to_le32(0x424d53fe)
-#define SMB2_HEADER_SIZE __constant_le16_to_cpu(64)
-#define SMB2_ERROR_STRUCTURE_SIZE2 __constant_le16_to_cpu(9)
 /*
  * SMB2 Header Definition
  *
  * "PDU" :  "Protocol Data Unit" (ie a network "frame")
  *
  */
+#define SMB2_HEADER_STRUCTURE_SIZE __constant_le16_to_cpu(64)
 struct smb2_hdr {
 	__be32 smb2_buf_length;	/* big endian on wire */
 				/* length is only two or three bytes - with
  *  command code name for the struct. Note that structures must be packed.
  *
  */
+#define SMB2_ERROR_STRUCTURE_SIZE2 __constant_le16_to_cpu(9)
 struct smb2_err_rsp {
 	struct smb2_hdr hdr;
 	__le16 StructureSize;

fs/cifs/transport.c+6−3

 	/* convert the length into a more usable form */
 	if (server->sec_mode & (SECMODE_SIGN_REQUIRED | SECMODE_SIGN_ENABLED)) {
 		struct kvec iov;
+		int rc = 0;
 		iov.iov_base = mid->resp_buf;
 		iov.iov_len = len;
 		/* FIXME: add code to kill session */
-		if (cifs_verify_signature(&iov, 1, server,
+		rc = cifs_verify_signature(&iov, 1, server,
-					  mid->sequence_number + 1) != 0)
+					   mid->sequence_number + 1);
-			cERROR(1, "Unexpected SMB signature");
+		if (rc)
+			cERROR(1, "SMB signature verification returned error = "
+			       "%d", rc);
 	}
 	/* BB special case reconnect tid and uid here? */

fs/direct-io.c+5−0

 	unsigned long user_addr;
 	size_t bytes;
 	struct buffer_head map_bh = { 0, };
+	struct blk_plug plug;
 	if (rw & WRITE)
 		rw = WRITE_ODIRECT;
 				PAGE_SIZE - user_addr / PAGE_SIZE);
 	}
+	blk_start_plug(&plug);
 	for (seg = 0; seg < nr_segs; seg++) {
 		user_addr = (unsigned long)iov[seg].iov_base;
 		sdio.size += bytes = iov[seg].iov_len;
 	if (sdio.bio)
 		dio_bio_submit(dio, &sdio);
+	blk_finish_plug(&plug);
 	/*
 	 * It is possible that, we return short IO due to end of file.
 	 * In that case, we need to release all the pages we got hold on.

fs/jbd/journal.c+5−0

 	BUG_ON(!mutex_is_locked(&journal->j_checkpoint_mutex));
 	spin_lock(&journal->j_state_lock);
+	/* Is it already empty? */
+	if (sb->s_start == 0) {
+		spin_unlock(&journal->j_state_lock);
+		return;
+	}
 	jbd_debug(1, "JBD: Marking journal as empty (seq %d)\n",
         	  journal->j_tail_sequence);

fs/logfs/dev_bdev.c+7−8

@@ -26,6 +26,7 @@ static int sync_request(struct page page, struct block_device bdev, int rw) · 25 unmodified lines
26	struct completion complete;	26	struct completion complete;
27		27
28	bio_init(&bio);	28	bio_init(&bio);
		29	bio.bi_max_vecs = 1;
29	bio.bi_io_vec = &bio_vec;	30	bio.bi_io_vec = &bio_vec;
30	bio_vec.bv_page = page;	31	bio_vec.bv_page = page;
31	bio_vec.bv_len = PAGE_SIZE;	32	bio_vec.bv_len = PAGE_SIZE;
@@ -95,12 +96,11 @@ static int __bdev_writeseg(struct super_block *sb, u64 ofs, pgoff_t index, · 63 unmodified lines
95	struct address_space *mapping = super->s_mapping_inode->i_mapping;	96	struct address_space *mapping = super->s_mapping_inode->i_mapping;
96	struct bio *bio;	97	struct bio *bio;
97	struct page *page;	98	struct page *page;
98	struct request_queue *q = bdev_get_queue(sb->s_bdev);	99	unsigned int max_pages;
99	unsigned int max_pages = queue_max_hw_sectors(q) >> (PAGE_SHIFT - 9);
100	int i;	100	int i;
101		101
102	if (max_pages > BIO_MAX_PAGES)	102	max_pages = min(nr_pages, (size_t) bio_get_nr_vecs(super->s_bdev));
103	max_pages = BIO_MAX_PAGES;	103
104	bio = bio_alloc(GFP_NOFS, max_pages);	104	bio = bio_alloc(GFP_NOFS, max_pages);
105	BUG_ON(!bio);	105	BUG_ON(!bio);
106		106
@@ -190,12 +190,11 @@ static int do_erase(struct super_block *sb, u64 ofs, pgoff_t index, · 83 unmodified lines
190	{	190	{
191	struct logfs_super *super = logfs_super(sb);	191	struct logfs_super *super = logfs_super(sb);
192	struct bio *bio;	192	struct bio *bio;
193	struct request_queue *q = bdev_get_queue(sb->s_bdev);	193	unsigned int max_pages;
194	unsigned int max_pages = queue_max_hw_sectors(q) >> (PAGE_SHIFT - 9);
195	int i;	194	int i;
196		195
197	if (max_pages > BIO_MAX_PAGES)	196	max_pages = min(nr_pages, (size_t) bio_get_nr_vecs(super->s_bdev));
198	max_pages = BIO_MAX_PAGES;	197
199	bio = bio_alloc(GFP_NOFS, max_pages);	198	bio = bio_alloc(GFP_NOFS, max_pages);
200	BUG_ON(!bio);	199	BUG_ON(!bio);
201		200

fs/logfs/inode.c+17−1

 	call_rcu(&inode->i_rcu, logfs_i_callback);
 }
+static void __logfs_destroy_meta_inode(struct inode *inode)
+{
+	struct logfs_inode *li = logfs_inode(inode);
+	BUG_ON(li->li_block);
+	call_rcu(&inode->i_rcu, logfs_i_callback);
+}
 static void logfs_destroy_inode(struct inode *inode)
 {
 	struct logfs_inode *li = logfs_inode(inode);
+	if (inode->i_ino < LOGFS_RESERVED_INOS) {
+		/*
+		 * The reserved inodes are never destroyed unless we are in
+		 * unmont path.
+		 */
+		__logfs_destroy_meta_inode(inode);
+		return;
+	}
 	BUG_ON(list_empty(&li->li_freeing_list));
 	spin_lock(&logfs_inode_lock);
 	li->li_refcount--;
 {
 	struct logfs_super *super = logfs_super(sb);
 	/* kill the meta-inodes */
-	iput(super->s_master_inode);
 	iput(super->s_segfile_inode);
+	iput(super->s_master_inode);
 	iput(super->s_mapping_inode);
 }

fs/logfs/journal.c+1−1

@@ -565,7 +565,7 @@ static void write_wbuf(struct super_block sb, struct logfs_area area, · 564 unmodified lines
565	index = ofs >> PAGE_SHIFT;	565	index = ofs >> PAGE_SHIFT;
566	page_ofs = ofs & (PAGE_SIZE - 1);	566	page_ofs = ofs & (PAGE_SIZE - 1);
567		567
568	page = find_lock_page(mapping, index);	568	page = find_or_create_page(mapping, index, GFP_NOFS);
569	BUG_ON(!page);	569	BUG_ON(!page);
570	memcpy(wbuf, page_address(page) + page_ofs, super->s_writesize);	570	memcpy(wbuf, page_address(page) + page_ofs, super->s_writesize);
571	unlock_page(page);	571	unlock_page(page);

fs/logfs/readwrite.c+0−1

@@ -2189,7 +2189,6 @@ void logfs_evict_inode(struct inode *inode) · 2188 unmodified lines
2189	return;	2189	return;
2190	}	2190	}
2191		2191
2192	BUG_ON(inode->i_ino < LOGFS_RESERVED_INOS);
2193	page = inode_to_page(inode);	2192	page = inode_to_page(inode);
2194	BUG_ON(!page); /* FIXME: Use emergency page */	2193	BUG_ON(!page); /* FIXME: Use emergency page */
2195	logfs_put_write_page(page);	2194	logfs_put_write_page(page);

fs/logfs/segment.c+1−1

@@ -886,7 +886,7 @@ static struct logfs_area alloc_area(struct super_block sb) · 885 unmodified lines
886		886
887	static void map_invalidatepage(struct page *page, unsigned long l)	887	static void map_invalidatepage(struct page *page, unsigned long l)
888	{	888	{
889	BUG();	889	return;
890	}	890	}
891		891
892	static int map_releasepage(struct page *page, gfp_t g)	892	static int map_releasepage(struct page *page, gfp_t g)

fs/nfsd/nfs4callback.c+2−2

@@ -651,12 +651,12 @@ static int setup_callback_client(struct nfs4_client clp, struct nfs4_cb_conn c · 650 unmodified lines
651		651
652	if (clp->cl_minorversion == 0) {	652	if (clp->cl_minorversion == 0) {
653	if (!clp->cl_cred.cr_principal &&	653	if (!clp->cl_cred.cr_principal &&
654	(clp->cl_flavor >= RPC_AUTH_GSS_KRB5))	654	(clp->cl_cred.cr_flavor >= RPC_AUTH_GSS_KRB5))
655	return -EINVAL;	655	return -EINVAL;
656	args.client_name = clp->cl_cred.cr_principal;	656	args.client_name = clp->cl_cred.cr_principal;
657	args.prognumber = conn->cb_prog,	657	args.prognumber = conn->cb_prog,
658	args.protocol = XPRT_TRANSPORT_TCP;	658	args.protocol = XPRT_TRANSPORT_TCP;
659	args.authflavor = clp->cl_flavor;	659	args.authflavor = clp->cl_cred.cr_flavor;
660	clp->cl_cb_ident = conn->cb_ident;	660	clp->cl_cb_ident = conn->cb_ident;
661	} else {	661	} else {
662	if (!conn->cb_xprt)	662	if (!conn->cb_xprt)

fs/nfsd/state.h+0−1

@@ -231,7 +231,6 @@ struct nfs4_client { · 230 unmodified lines
231	nfs4_verifier cl_verifier; /* generated by client */	231	nfs4_verifier cl_verifier; /* generated by client */
232	time_t cl_time; /* time of last lease renewal */	232	time_t cl_time; /* time of last lease renewal */
233	struct sockaddr_storage cl_addr; /* client ipaddress */	233	struct sockaddr_storage cl_addr; /* client ipaddress */
234	u32 cl_flavor; /* setclientid pseudoflavor */
235	struct svc_cred cl_cred; /* setclientid principal */	234	struct svc_cred cl_cred; /* setclientid principal */
236	clientid_t cl_clientid; /* generated by server */	235	clientid_t cl_clientid; /* generated by server */
237	nfs4_verifier cl_confirm; /* generated by server */	236	nfs4_verifier cl_confirm; /* generated by server */

fs/quota/dquot.c+1−1

 		goto out;
 	}
-	down_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
 	for (cnt = 0; cnt < MAXQUOTAS; cnt++)
 		warn[cnt].w_type = QUOTA_NL_NOWARN;
+	down_read(&sb_dqopt(inode->i_sb)->dqptr_sem);
 	spin_lock(&dq_data_lock);
 	for (cnt = 0; cnt < MAXQUOTAS; cnt++) {
 		if (!dquots[cnt])

fs/reiserfs/bitmap.c+0−2

 	else if (bitmap == 0)
 		block = (REISERFS_DISK_OFFSET_IN_BYTES >> sb->s_blocksize_bits) + 1;
-	reiserfs_write_unlock(sb);
 	bh = sb_bread(sb, block);
-	reiserfs_write_lock(sb);
 	if (bh == NULL)
 		reiserfs_warning(sb, "sh-2029: %s: bitmap block (#%u) "
 		                 "reading failed", __func__, block);

fs/reiserfs/inode.c+1−1

 		;
 	}
       out:
+	reiserfs_write_unlock_once(inode->i_sb, depth);
 	clear_inode(inode);	/* note this must go after the journal_end to prevent deadlock */
 	dquot_drop(inode);
 	inode->i_blocks = 0;
-	reiserfs_write_unlock_once(inode->i_sb, depth);
 	return;
 no_delete:

fs/ubifs/debug.h+1−1

@@ -167,7 +167,7 @@ struct ubifs_global_debug_info { · 166 unmodified lines
167	#define ubifs_dbg_msg(type, fmt, ...) \	167	#define ubifs_dbg_msg(type, fmt, ...) \
168	pr_debug("UBIFS DBG " type ": " fmt "\n", ##__VA_ARGS__)	168	pr_debug("UBIFS DBG " type ": " fmt "\n", ##__VA_ARGS__)
169		169
170	#define DBG_KEY_BUF_LEN 32	170	#define DBG_KEY_BUF_LEN 48
171	#define ubifs_dbg_msg_key(type, key, fmt, ...) do { \	171	#define ubifs_dbg_msg_key(type, key, fmt, ...) do { \
172	char __tmp_key_buf[DBG_KEY_BUF_LEN]; \	172	char __tmp_key_buf[DBG_KEY_BUF_LEN]; \
173	pr_debug("UBIFS DBG " type ": " fmt "%s\n", ##__VA_ARGS__, \	173	pr_debug("UBIFS DBG " type ": " fmt "%s\n", ##__VA_ARGS__, \

fs/ubifs/lpt.c+4−1

 	return 0;
 out_err:
-	ubifs_lpt_free(c, 0);
+	if (wr)
+		ubifs_lpt_free(c, 1);
+	if (rd)
+		ubifs_lpt_free(c, 0);
 	return err;
 }

fs/ubifs/recovery.c+1−1

@@ -788,7 +788,7 @@ struct ubifs_scan_leb ubifs_recover_leb(struct ubifs_info c, int lnum, · 787 unmodified lines
788		788
789	corrupted_rescan:	789	corrupted_rescan:
790	/* Re-scan the corrupted data with verbose messages */	790	/* Re-scan the corrupted data with verbose messages */
791	ubifs_err("corruptio %d", ret);	791	ubifs_err("corruption %d", ret);
792	ubifs_scan_a_node(c, buf, len, lnum, offs, 1);	792	ubifs_scan_a_node(c, buf, len, lnum, offs, 1);
793	corrupted:	793	corrupted:
794	ubifs_scanned_corruption(c, lnum, offs, buf);	794	ubifs_scanned_corruption(c, lnum, offs, buf);

fs/ubifs/replay.c+1−2

 	c->replaying = 1;
 	lnum = c->ltail_lnum = c->lhead_lnum;
-	lnum = UBIFS_LOG_LNUM;
 	do {
 		err = replay_log_leb(c, lnum, 0, c->sbuf);
 		if (err == 1)
 		if (err)
 			goto out;
 		lnum = ubifs_next_log_lnum(c, lnum);
-	} while (lnum != UBIFS_LOG_LNUM);
+	} while (lnum != c->ltail_lnum);
 	err = replay_buds(c);
 	if (err)

fs/ubifs/super.c+0−3

  *
  * This function mounts UBIFS file system. Returns zero in case of success and
  * a negative error code in case of failure.
- *
- * Note, the function does not de-allocate resources it it fails half way
- * through, and the caller has to do this instead.
  */
 static int mount_ubifs(struct ubifs_info *c)
 {

fs/udf/inode.c+4−1

 				if (err)
 					return err;
 				down_write(&iinfo->i_data_sem);
-			} else
+			} else {
 				iinfo->i_lenAlloc = newsize;
+				goto set_size;
+			}
 		}
 		err = udf_extend_file(inode, newsize);
 		if (err) {
 			up_write(&iinfo->i_data_sem);
 			return err;
 		}
+set_size:
 		truncate_setsize(inode, newsize);
 		up_write(&iinfo->i_data_sem);
 	} else {

fs/udf/super.c+6−1

 		udf_err(sb, "error loading logical volume descriptor: "
 			"Partition table too long (%u > %lu)\n", table_len,
 			sb->s_blocksize - sizeof(*lvd));
+		ret = 1;
 		goto out_bh;
 	}
 						UDF_ID_SPARABLE,
 						strlen(UDF_ID_SPARABLE))) {
 				if (udf_load_sparable_map(sb, map,
-				    (struct sparablePartitionMap *)gpm) < 0)
+				    (struct sparablePartitionMap *)gpm) < 0) {
+					ret = 1;
 					goto out_bh;
+				}
 			} else if (!strncmp(upm2->partIdent.ident,
 						UDF_ID_METADATA,
 						strlen(UDF_ID_METADATA))) {
 			if (!silent)
 				pr_notice("Rescanning with blocksize %d\n",
 					  UDF_DEFAULT_BLOCKSIZE);
+			brelse(sbi->s_lvid_bh);
+			sbi->s_lvid_bh = NULL;
 			uopt.blocksize = UDF_DEFAULT_BLOCKSIZE;
 			ret = udf_load_vrs(sb, &uopt, silent, &fileset);
 		}

fs/xfs/xfs_discard.c+4−2

 	 * used by the fstrim application.  In the end it really doesn't
 	 * matter as trimming blocks is an advisory interface.
 	 */
+	if (range.start >= XFS_FSB_TO_B(mp, mp->m_sb.sb_dblocks) ||
+	    range.minlen > XFS_FSB_TO_B(mp, XFS_ALLOC_AG_MAX_USABLE(mp)))
+		return -XFS_ERROR(EINVAL);
 	start = BTOBB(range.start);
 	end = start + BTOBBT(range.len) - 1;
 	minlen = BTOBB(max_t(u64, granularity, range.minlen));
-	if (XFS_BB_TO_FSB(mp, start) >= mp->m_sb.sb_dblocks)
-		return -XFS_ERROR(EINVAL);
 	if (end > XFS_FSB_TO_BB(mp, mp->m_sb.sb_dblocks) - 1)
 		end = XFS_FSB_TO_BB(mp, mp->m_sb.sb_dblocks)- 1;

fs/xfs/xfs_ialloc.c+9−8

@@ -962,23 +962,22 @@ xfs_dialloc( · 961 unmodified lines
962	if (!pag->pagi_freecount && !okalloc)	962	if (!pag->pagi_freecount && !okalloc)
963	goto nextag;	963	goto nextag;
964		964
		965	/*
		966	* Then read in the AGI buffer and recheck with the AGI buffer
		967	* lock held.
		968	*/
965	error = xfs_ialloc_read_agi(mp, tp, agno, &agbp);	969	error = xfs_ialloc_read_agi(mp, tp, agno, &agbp);
966	if (error)	970	if (error)
967	goto out_error;	971	goto out_error;
968		972
969	/*
970	* Once the AGI has been read in we have to recheck
971	* pagi_freecount with the AGI buffer lock held.
972	*/
973	if (pag->pagi_freecount) {	973	if (pag->pagi_freecount) {
974	xfs_perag_put(pag);	974	xfs_perag_put(pag);
975	goto out_alloc;	975	goto out_alloc;
976	}	976	}
977		977
978	if (!okalloc) {	978	if (!okalloc)
979	xfs_trans_brelse(tp, agbp);	979	goto nextag_relse_buffer;
980	goto nextag;	980
981	}
982		981
983	error = xfs_ialloc_ag_alloc(tp, agbp, &ialloced);	982	error = xfs_ialloc_ag_alloc(tp, agbp, &ialloced);
984	if (error) {	983	if (error) {
@@ -1007,6 +1006,8 @@ xfs_dialloc( · 22 unmodified lines
1007	return 0;	1006	return 0;
1008	}	1007	}
1009		1008
		1009	nextag_relse_buffer:
		1010	xfs_trans_brelse(tp, agbp);
1010	nextag:	1011	nextag:
1011	xfs_perag_put(pag);	1012	xfs_perag_put(pag);
1012	if (++agno == mp->m_sb.sb_agcount)	1013	if (++agno == mp->m_sb.sb_agcount)

fs/xfs/xfs_rtalloc.c+1−1

@@ -857,7 +857,7 @@ xfs_rtbuf_get( · 856 unmodified lines
857	xfs_buf_t bp; / block buffer, result */	857	xfs_buf_t bp; / block buffer, result */
858	xfs_inode_t ip; / bitmap or summary inode */	858	xfs_inode_t ip; / bitmap or summary inode */
859	xfs_bmbt_irec_t map;	859	xfs_bmbt_irec_t map;
860	int nmap;	860	int nmap = 1;
861	int error; /* error value */	861	int error; /* error value */
862		862
863	ip = issum ? mp->m_rsumip : mp->m_rbmip;	863	ip = issum ? mp->m_rsumip : mp->m_rbmip;

include/drm/drm_crtc.h+2−1

@@ -118,7 +118,8 @@ enum drm_mode_status { · 117 unmodified lines
118	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \	118	.hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
119	.htotal = (ht), .hskew = (hsk), .vdisplay = (vd), \	119	.htotal = (ht), .hskew = (hsk), .vdisplay = (vd), \
120	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \	120	.vsync_start = (vss), .vsync_end = (vse), .vtotal = (vt), \
121	.vscan = (vs), .flags = (f), .vrefresh = 0	121	.vscan = (vs), .flags = (f), .vrefresh = 0, \
		122	.base.type = DRM_MODE_OBJECT_MODE
122		123
123	#define CRTC_INTERLACE_HALVE_V 0x1 /* halve V values for interlacing */	124	#define CRTC_INTERLACE_HALVE_V 0x1 /* halve V values for interlacing */
124		125

include/drm/drm_mode.h+3−2

@@ -359,8 +359,9 @@ struct drm_mode_mode_cmd { · 358 unmodified lines
359	struct drm_mode_modeinfo mode;	359	struct drm_mode_modeinfo mode;
360	};	360	};
361		361
362	#define DRM_MODE_CURSOR_BO (1<<0)	362	#define DRM_MODE_CURSOR_BO 0x01
363	#define DRM_MODE_CURSOR_MOVE (1<<1)	363	#define DRM_MODE_CURSOR_MOVE 0x02
		364	#define DRM_MODE_CURSOR_FLAGS 0x03
364		365
365	/*	366	/*
366	* depending on the value in flags different members are used.	367	* depending on the value in flags different members are used.

include/linux/blkdev.h+13−1

  * it already be started by driver.
  */
 #define RQ_NOMERGE_FLAGS	\
-	(REQ_NOMERGE | REQ_STARTED | REQ_SOFTBARRIER | REQ_FLUSH | REQ_FUA)
+	(REQ_NOMERGE | REQ_STARTED | REQ_SOFTBARRIER | REQ_FLUSH | REQ_FUA | REQ_DISCARD)
 #define rq_mergeable(rq)	\
 	(!((rq)->cmd_flags & RQ_NOMERGE_FLAGS) && \
 	 (((rq)->cmd_flags & REQ_DISCARD) || \
 extern struct backing_dev_info *blk_get_backing_dev_info(struct block_device *bdev);
 extern int blk_rq_map_sg(struct request_queue *, struct request *, struct scatterlist *);
+extern int blk_bio_map_sg(struct request_queue *q, struct bio *bio,
+			  struct scatterlist *sglist);
 extern void blk_dump_rq_flags(struct request *, char *);
 extern long nr_blockdev_pages(void);
 		& (lim->discard_granularity - 1);
 }
+static inline int bdev_discard_alignment(struct block_device *bdev)
+{
+	struct request_queue *q = bdev_get_queue(bdev);
+	if (bdev != bdev->bd_contains)
+		return bdev->bd_part->discard_alignment;
+	return q->limits.discard_alignment;
+}
 static inline unsigned int queue_discard_zeroes_data(struct request_queue *q)
 {
 	if (q->limits.max_discard_sectors && q->limits.discard_zeroes_data == 1)

include/linux/cpuidle.h+4−0

 #ifdef CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED
 void cpuidle_coupled_parallel_barrier(struct cpuidle_device *dev, atomic_t *a);
+#else
+static inline void cpuidle_coupled_parallel_barrier(struct cpuidle_device *dev, atomic_t *a)
+{
+}
 #endif
 /******************************

include/linux/kernel.h+10−2

 	__x - (__x % (y));				\
 }							\
 )
+/*
+ * Divide positive or negative dividend by positive divisor and round
+ * to closest integer. Result is undefined for negative divisors.
+ */
 #define DIV_ROUND_CLOSEST(x, divisor)(			\
 {							\
-	typeof(divisor) __divisor = divisor;		\
+	typeof(x) __x = x;				\
-	(((x) + ((__divisor) / 2)) / (__divisor));	\
+	typeof(divisor) __d = divisor;			\
+	(((typeof(x))-1) >= 0 || (__x) >= 0) ?		\
+		(((__x) + ((__d) / 2)) / (__d)) :	\
+		(((__x) - ((__d) / 2)) / (__d));	\
 }							\
 )

include/linux/ktime.h+0−7

@@ -58,13 +58,6 @@ union ktime { · 57 unmodified lines
58		58
59	typedef union ktime ktime_t; /* Kill this */	59	typedef union ktime ktime_t; /* Kill this */
60		60
61	#define KTIME_MAX ((s64)~((u64)1 << 63))
62	#if (BITS_PER_LONG == 64)
63	# define KTIME_SEC_MAX (KTIME_MAX / NSEC_PER_SEC)
64	#else
65	# define KTIME_SEC_MAX LONG_MAX
66	#endif
67
68	/*	61	/*
69	* ktime_t definitions when using the 64-bit scalar representation:	62	* ktime_t definitions when using the 64-bit scalar representation:
70	*/	63	*/

include/linux/mmc/card.h+1−0

@@ -239,6 +239,7 @@ struct mmc_card { · 238 unmodified lines
239	#define MMC_QUIRK_BLK_NO_CMD23 (1<<7) /* Avoid CMD23 for regular multiblock */	239	#define MMC_QUIRK_BLK_NO_CMD23 (1<<7) /* Avoid CMD23 for regular multiblock */
240	#define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8) /* Avoid sending 512 bytes in */	240	#define MMC_QUIRK_BROKEN_BYTE_MODE_512 (1<<8) /* Avoid sending 512 bytes in */
241	#define MMC_QUIRK_LONG_READ_TIME (1<<9) /* Data read time > CSD says */	241	#define MMC_QUIRK_LONG_READ_TIME (1<<9) /* Data read time > CSD says */
		242	#define MMC_QUIRK_SEC_ERASE_TRIM_BROKEN (1<<10) /* Skip secure for erase/trim */
242	/* byte mode */	243	/* byte mode */
243	unsigned int poweroff_notify_state; /* eMMC4.5 notify feature */	244	unsigned int poweroff_notify_state; /* eMMC4.5 notify feature */
244	#define MMC_NO_POWER_NOTIFICATION 0	245	#define MMC_NO_POWER_NOTIFICATION 0

include/linux/mv643xx_eth.h+2−0

@@ -15,6 +15,8 @@ · 14 unmodified lines
15	#define MV643XX_ETH_SIZE_REG_4 0x2224	15	#define MV643XX_ETH_SIZE_REG_4 0x2224
16	#define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290	16	#define MV643XX_ETH_BASE_ADDR_ENABLE_REG 0x2290
17		17
		18	#define MV643XX_TX_CSUM_DEFAULT_LIMIT 0
		19
18	struct mv643xx_eth_shared_platform_data {	20	struct mv643xx_eth_shared_platform_data {
19	struct mbus_dram_target_info *dram;	21	struct mbus_dram_target_info *dram;
20	struct platform_device *shared_smi;	22	struct platform_device *shared_smi;

include/linux/omapfb.h+6−1

 #ifdef __KERNEL__
-#include <plat/board.h>
+struct omap_lcd_config {
+	char panel_name[16];
+	char ctrl_name[16];
+	s16  nreset_gpio;
+	u8   data_lines;
+};
 struct omapfb_platform_data {
 	struct omap_lcd_config		lcd;

include/linux/pci_ids.h+1−1

@@ -2149,7 +2149,7 @@ · 2148 unmodified lines
2149	#define PCI_DEVICE_ID_TIGON3_5704S 0x16a8	2149	#define PCI_DEVICE_ID_TIGON3_5704S 0x16a8
2150	#define PCI_DEVICE_ID_NX2_57800_VF 0x16a9	2150	#define PCI_DEVICE_ID_NX2_57800_VF 0x16a9
2151	#define PCI_DEVICE_ID_NX2_5706S 0x16aa	2151	#define PCI_DEVICE_ID_NX2_5706S 0x16aa
2152	#define PCI_DEVICE_ID_NX2_57840_MF 0x16ab	2152	#define PCI_DEVICE_ID_NX2_57840_MF 0x16a4
2153	#define PCI_DEVICE_ID_NX2_5708S 0x16ac	2153	#define PCI_DEVICE_ID_NX2_5708S 0x16ac
2154	#define PCI_DEVICE_ID_NX2_57840_VF 0x16ad	2154	#define PCI_DEVICE_ID_NX2_57840_VF 0x16ad
2155	#define PCI_DEVICE_ID_NX2_57810_MF 0x16ae	2155	#define PCI_DEVICE_ID_NX2_57810_MF 0x16ae

include/linux/platform_data/omap1_bl.h+11−0

@@ -0,0 +1,11 @@
	1	#ifndef __OMAP1_BL_H__
	2	#define __OMAP1_BL_H__
	3
	4	#include <linux/device.h>
	5
	6	struct omap_backlight_config {
	7	int default_intensity;
	8	int (set_power)(struct device dev, int state);
	9	};
	10
	11	#endif

include/linux/time.h+27−2

@@ -107,11 +107,36 @@ static inline struct timespec timespec_sub(struct timespec lhs, · 106 unmodified lines
107	return ts_delta;	107	return ts_delta;
108	}	108	}
109		109
		110	#define KTIME_MAX ((s64)~((u64)1 << 63))
		111	#if (BITS_PER_LONG == 64)
		112	# define KTIME_SEC_MAX (KTIME_MAX / NSEC_PER_SEC)
		113	#else
		114	# define KTIME_SEC_MAX LONG_MAX
		115	#endif
		116
110	/*	117	/*
111	* Returns true if the timespec is norm, false if denorm:	118	* Returns true if the timespec is norm, false if denorm:
112	*/	119	*/
113	#define timespec_valid(ts) \	120	static inline bool timespec_valid(const struct timespec *ts)
114	(((ts)->tv_sec >= 0) && (((unsigned long) (ts)->tv_nsec) < NSEC_PER_SEC))	121	{
		122	/* Dates before 1970 are bogus */
		123	if (ts->tv_sec < 0)
		124	return false;
		125	/* Can't have more nanoseconds then a second */
		126	if ((unsigned long)ts->tv_nsec >= NSEC_PER_SEC)
		127	return false;
		128	return true;
		129	}
		130
		131	static inline bool timespec_valid_strict(const struct timespec *ts)
		132	{
		133	if (!timespec_valid(ts))
		134	return false;
		135	/* Disallow values that could overflow ktime_t */
		136	if ((unsigned long long)ts->tv_sec >= KTIME_SEC_MAX)
		137	return false;
		138	return true;
		139	}
115		140
116	extern void read_persistent_clock(struct timespec *ts);	141	extern void read_persistent_clock(struct timespec *ts);
117	extern void read_boot_clock(struct timespec *ts);	142	extern void read_boot_clock(struct timespec *ts);

include/net/netfilter/nf_conntrack_ecache.h+1−0

@@ -18,6 +18,7 @@ struct nf_conntrack_ecache { · 17 unmodified lines
18	u16 ctmask; /* bitmask of ct events to be delivered */	18	u16 ctmask; /* bitmask of ct events to be delivered */
19	u16 expmask; /* bitmask of expect events to be delivered */	19	u16 expmask; /* bitmask of expect events to be delivered */
20	u32 pid; /* netlink pid of destroyer */	20	u32 pid; /* netlink pid of destroyer */
		21	struct timer_list timeout;
21	};	22	};
22		23
23	static inline struct nf_conntrack_ecache *	24	static inline struct nf_conntrack_ecache *

include/xen/events.h+0−2

@@ -58,8 +58,6 @@ void notify_remote_via_irq(int irq); · 57 unmodified lines
58		58
59	void xen_irq_resume(void);	59	void xen_irq_resume(void);
60		60
61	void xen_hvm_prepare_kexec(struct shared_info *sip, unsigned long pfn);
62
63	/* Clear an irq's pending state, in preparation for polling on it */	61	/* Clear an irq's pending state, in preparation for polling on it */
64	void xen_clear_irq_pending(int irq);	62	void xen_clear_irq_pending(int irq);
65	void xen_set_irq_pending(int irq);	63	void xen_set_irq_pending(int irq);

kernel/fork.c+2−2

@@ -455,8 +455,8 @@ static int dup_mmap(struct mm_struct mm, struct mm_struct oldmm) · 454 unmodified lines
455	if (retval)	455	if (retval)
456	goto out;	456	goto out;
457		457
458	if (file && uprobe_mmap(tmp))	458	if (file)
459	goto out;	459	uprobe_mmap(tmp);
460	}	460	}
461	/* a new mm has just been created */	461	/* a new mm has just been created */
462	arch_dup_mmap(oldmm, mm);	462	arch_dup_mmap(oldmm, mm);

kernel/time/timekeeping.c+33−6

 {
 	tk->xtime_sec += ts->tv_sec;
 	tk->xtime_nsec += (u64)ts->tv_nsec << tk->shift;
+	tk_normalize_xtime(tk);
 }
 static void tk_set_wall_to_mono(struct timekeeper *tk, struct timespec wtm)
 	tk->xtime_nsec += cycle_delta * tk->mult;
 	/* If arch requires, add in gettimeoffset() */
-	tk->xtime_nsec += arch_gettimeoffset() << tk->shift;
+	tk->xtime_nsec += (u64)arch_gettimeoffset() << tk->shift;
 	tk_normalize_xtime(tk);
 	struct timespec ts_delta, xt;
 	unsigned long flags;
-	if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
+	if (!timespec_valid_strict(tv))
 		return -EINVAL;
 	write_seqlock_irqsave(&tk->lock, flags);
 {
 	struct timekeeper *tk = &timekeeper;
 	unsigned long flags;
+	struct timespec tmp;
+	int ret = 0;
 	if ((unsigned long)ts->tv_nsec >= NSEC_PER_SEC)
 		return -EINVAL;
 	timekeeping_forward_now(tk);
+	/* Make sure the proposed value is valid */
+	tmp = timespec_add(tk_xtime(tk),  *ts);
+	if (!timespec_valid_strict(&tmp)) {
+		ret = -EINVAL;
+		goto error;
+	}
 	tk_xtime_add(tk, ts);
 	tk_set_wall_to_mono(tk, timespec_sub(tk->wall_to_monotonic, *ts));
+error: /* even if we error out, we forwarded the time, so call update */
 	timekeeping_update(tk, true);
 	write_sequnlock_irqrestore(&tk->lock, flags);
 	/* signal hrtimers about time change */
 	clock_was_set();
-	return 0;
+	return ret;
 }
 EXPORT_SYMBOL(timekeeping_inject_offset);
 	struct timespec now, boot, tmp;
 	read_persistent_clock(&now);
+	if (!timespec_valid_strict(&now)) {
+		pr_warn("WARNING: Persistent clock returned invalid value!\n"
+			"         Check your CMOS/BIOS settings.\n");
+		now.tv_sec = 0;
+		now.tv_nsec = 0;
+	}
 	read_boot_clock(&boot);
+	if (!timespec_valid_strict(&boot)) {
+		pr_warn("WARNING: Boot clock returned invalid value!\n"
+			"         Check your CMOS/BIOS settings.\n");
+		boot.tv_sec = 0;
+		boot.tv_nsec = 0;
+	}
 	seqlock_init(&tk->lock);
 static void __timekeeping_inject_sleeptime(struct timekeeper *tk,
 							struct timespec *delta)
 {
-	if (!timespec_valid(delta)) {
+	if (!timespec_valid_strict(delta)) {
 		printk(KERN_WARNING "__timekeeping_inject_sleeptime: Invalid "
 					"sleep delta value!\n");
 		return;
 	offset = (clock->read(clock) - clock->cycle_last) & clock->mask;
 #endif
+	/* Check if there's really nothing to do */
+	if (offset < tk->cycle_interval)
+		goto out;
 	/*
 	 * With NO_HZ we may have to accumulate many cycle_intervals
 	 * (think "ticks") worth of time at once. To do this efficiently,
 	* the vsyscall implementations are converted to use xtime_nsec
 	* (shifted nanoseconds), this can be killed.
 	*/
-	remainder = tk->xtime_nsec & ((1 << tk->shift) - 1);
+	remainder = tk->xtime_nsec & ((1ULL << tk->shift) - 1);
 	tk->xtime_nsec -= remainder;
-	tk->xtime_nsec += 1 << tk->shift;
+	tk->xtime_nsec += 1ULL << tk->shift;
 	tk->ntp_error += remainder << tk->ntp_error_shift;
 	/*

kernel/trace/trace_syscalls.c+4−0

 	int size;
 	syscall_nr = syscall_get_nr(current, regs);
+	if (syscall_nr < 0)
+		return;
 	if (!test_bit(syscall_nr, enabled_perf_enter_syscalls))
 		return;
 	int size;
 	syscall_nr = syscall_get_nr(current, regs);
+	if (syscall_nr < 0)
+		return;
 	if (!test_bit(syscall_nr, enabled_perf_exit_syscalls))
 		return;

mm/filemap.c+0−7

 			retval = filemap_write_and_wait_range(mapping, pos,
 					pos + iov_length(iov, nr_segs) - 1);
 			if (!retval) {
-				struct blk_plug plug;
-				blk_start_plug(&plug);
 				retval = mapping->a_ops->direct_IO(READ, iocb,
 							iov, pos, nr_segs);
-				blk_finish_plug(&plug);
 			}
 			if (retval > 0) {
 				*ppos = pos + retval;
 {
 	struct file *file = iocb->ki_filp;
 	struct inode *inode = file->f_mapping->host;
-	struct blk_plug plug;
 	ssize_t ret;
 	BUG_ON(iocb->ki_pos != pos);
 	sb_start_write(inode->i_sb);
 	mutex_lock(&inode->i_mutex);
-	blk_start_plug(&plug);
 	ret = __generic_file_aio_write(iocb, iov, nr_segs, &iocb->ki_pos);
 	mutex_unlock(&inode->i_mutex);
 		if (err < 0 && ret > 0)
 			ret = err;
 	}
-	blk_finish_plug(&plug);
 	sb_end_write(inode->i_sb);
 	return ret;
 }

mm/mempolicy.c+1−1

@@ -2562,7 +2562,7 @@ int mpol_to_str(char buffer, int maxlen, struct mempolicy pol, int no_context) · 2561 unmodified lines
2562	break;	2562	break;
2563		2563
2564	default:	2564	default:
2565	BUG();	2565	return -EINVAL;
2566	}	2566	}
2567		2567
2568	l = strlen(policy_modes[mode]);	2568	l = strlen(policy_modes[mode]);

mm/mmap.c+2−3

@@ -1356,9 +1356,8 @@ out: · 1355 unmodified lines
1356	} else if ((flags & MAP_POPULATE) && !(flags & MAP_NONBLOCK))	1356	} else if ((flags & MAP_POPULATE) && !(flags & MAP_NONBLOCK))
1357	make_pages_present(addr, addr + len);	1357	make_pages_present(addr, addr + len);
1358		1358
1359	if (file && uprobe_mmap(vma))	1359	if (file)
1360	/* matching probes but cannot insert */	1360	uprobe_mmap(vma);
1361	goto unmap_and_free_vma;
1362		1361
1363	return addr;	1362	return addr;
1364		1363

mm/slab.c+1−0

@@ -3260,6 +3260,7 @@ force_grow: · 3259 unmodified lines
3260		3260
3261	/* cache_grow can reenable interrupts, then ac could change. */	3261	/* cache_grow can reenable interrupts, then ac could change. */
3262	ac = cpu_cache_get(cachep);	3262	ac = cpu_cache_get(cachep);
		3263	node = numa_mem_id();
3263		3264
3264	/* no objects in sight? abort */	3265	/* no objects in sight? abort */
3265	if (!x && (ac->avail == 0 \|\| force_refill))	3266	if (!x && (ac->avail == 0 \|\| force_refill))

net/core/netpoll.c+1−9

 	struct napi_struct *napi;
 	int budget = 16;
-	WARN_ON_ONCE(!irqs_disabled());
 	list_for_each_entry(napi, &dev->napi_list, dev_list) {
-		local_irq_enable();
 		if (napi->poll_owner != smp_processor_id() &&
 		    spin_trylock(&napi->poll_lock)) {
-			rcu_read_lock_bh();
 			budget = poll_one_napi(rcu_dereference_bh(dev->npinfo),
 					       napi, budget);
-			rcu_read_unlock_bh();
 			spin_unlock(&napi->poll_lock);
-			if (!budget) {
+			if (!budget)
-				local_irq_disable();
 				break;
-			}
 		}
-		local_irq_disable();
 	}
 }

net/ipv4/ipmr.c+12−2

 static struct kmem_cache *mrt_cachep __read_mostly;
 static struct mr_table *ipmr_new_table(struct net *net, u32 id);
+static void ipmr_free_table(struct mr_table *mrt);
 static int ip_mr_forward(struct net *net, struct mr_table *mrt,
 			 struct sk_buff *skb, struct mfc_cache *cache,
 			 int local);
 			     struct sk_buff *pkt, vifi_t vifi, int assert);
 static int __ipmr_fill_mroute(struct mr_table *mrt, struct sk_buff *skb,
 			      struct mfc_cache *c, struct rtmsg *rtm);
+static void mroute_clean_tables(struct mr_table *mrt);
 static void ipmr_expire_process(unsigned long arg);
 #ifdef CONFIG_IP_MROUTE_MULTIPLE_TABLES
 	list_for_each_entry_safe(mrt, next, &net->ipv4.mr_tables, list) {
 		list_del(&mrt->list);
-		kfree(mrt);
+		ipmr_free_table(mrt);
 	}
 	fib_rules_unregister(net->ipv4.mr_rules_ops);
 }
 static void __net_exit ipmr_rules_exit(struct net *net)
 {
-	kfree(net->ipv4.mrt);
+	ipmr_free_table(net->ipv4.mrt);
 }
 #endif
 	return mrt;
 }
+static void ipmr_free_table(struct mr_table *mrt)
+{
+	del_timer_sync(&mrt->ipmr_expire_timer);
+	mroute_clean_tables(mrt);
+	kfree(mrt);
+}
 /* Service routines creating virtual interfaces: DVMRP tunnels and PIMREG */
 static void ipmr_del_tunnel(struct net_device *dev, struct vifctl *v)

net/ipv4/netfilter/nf_nat_sip.c+4−1

 		ret = nf_ct_expect_related(rtcp_exp);
 		if (ret == 0)
 			break;
-		else if (ret != -EBUSY) {
+		else if (ret == -EBUSY) {
+			nf_ct_unexpect_related(rtp_exp);
+			continue;
+		} else if (ret < 0) {
 			nf_ct_unexpect_related(rtp_exp);
 			port = 0;
 			break;

net/ipv4/route.c+4−2

 	if (mtu < ip_rt_min_pmtu)
 		mtu = ip_rt_min_pmtu;
+	rcu_read_lock();
 	if (fib_lookup(dev_net(rt->dst.dev), fl4, &res) == 0) {
 		struct fib_nh *nh = &FIB_RES_NH(res);
 		update_or_create_fnhe(nh, fl4->daddr, 0, mtu,
 				      jiffies + ip_rt_mtu_expires);
 	}
+	rcu_read_unlock();
 	return mtu;
 }
 		dst->obsolete = DST_OBSOLETE_KILL;
 	} else {
 		rt->rt_pmtu = mtu;
-		dst_set_expires(&rt->dst, ip_rt_mtu_expires);
+		rt->dst.expires = max(1UL, jiffies + ip_rt_mtu_expires);
 	}
 }
 {
 	struct rtable *rt = (struct rtable *) dst;
-	if (dst->flags & DST_NOCACHE) {
+	if (!list_empty(&rt->rt_uncached)) {
 		spin_lock_bh(&rt_uncached_lock);
 		list_del(&rt->rt_uncached);
 		spin_unlock_bh(&rt_uncached_lock);

net/ipv4/tcp_input.c+7−8

  * tcp_xmit_retransmit_queue().
  */
 static void tcp_fastretrans_alert(struct sock *sk, int pkts_acked,
-				  int newly_acked_sacked, bool is_dupack,
+				  int prior_sacked, bool is_dupack,
 				  int flag)
 {
 	struct inet_connection_sock *icsk = inet_csk(sk);
 	struct tcp_sock *tp = tcp_sk(sk);
 	int do_lost = is_dupack || ((flag & FLAG_DATA_SACKED) &&
 				    (tcp_fackets_out(tp) > tp->reordering));
+	int newly_acked_sacked = 0;
 	int fast_rexmit = 0;
 	if (WARN_ON(!tp->packets_out && tp->sacked_out))
 				tcp_add_reno_sack(sk);
 		} else
 			do_lost = tcp_try_undo_partial(sk, pkts_acked);
+		newly_acked_sacked = pkts_acked + tp->sacked_out - prior_sacked;
 		break;
 	case TCP_CA_Loss:
 		if (flag & FLAG_DATA_ACKED)
 			if (is_dupack)
 				tcp_add_reno_sack(sk);
 		}
+		newly_acked_sacked = pkts_acked + tp->sacked_out - prior_sacked;
 		if (icsk->icsk_ca_state <= TCP_CA_Disorder)
 			tcp_try_undo_dsack(sk);
 	int prior_packets;
 	int prior_sacked = tp->sacked_out;
 	int pkts_acked = 0;
-	int newly_acked_sacked = 0;
 	bool frto_cwnd = false;
 	/* If the ack is older than previous acks
 	flag |= tcp_clean_rtx_queue(sk, prior_fackets, prior_snd_una);
 	pkts_acked = prior_packets - tp->packets_out;
-	newly_acked_sacked = (prior_packets - prior_sacked) -
-			     (tp->packets_out - tp->sacked_out);
 	if (tp->frto_counter)
 		frto_cwnd = tcp_process_frto(sk, flag);
 		    tcp_may_raise_cwnd(sk, flag))
 			tcp_cong_avoid(sk, ack, prior_in_flight);
 		is_dupack = !(flag & (FLAG_SND_UNA_ADVANCED | FLAG_NOT_DUP));
-		tcp_fastretrans_alert(sk, pkts_acked, newly_acked_sacked,
+		tcp_fastretrans_alert(sk, pkts_acked, prior_sacked,
 				      is_dupack, flag);
 	} else {
 		if ((flag & FLAG_DATA_ACKED) && !frto_cwnd)
 no_queue:
 	/* If data was DSACKed, see if we can undo a cwnd reduction. */
 	if (flag & FLAG_DSACKING_ACK)
-		tcp_fastretrans_alert(sk, pkts_acked, newly_acked_sacked,
+		tcp_fastretrans_alert(sk, pkts_acked, prior_sacked,
 				      is_dupack, flag);
 	/* If this ack opens up a zero window, clear backoff.  It was
 	 * being used to time the probes, and is probably far higher than
 	 */
 	if (TCP_SKB_CB(skb)->sacked) {
 		flag |= tcp_sacktag_write_queue(sk, skb, prior_snd_una);
-		newly_acked_sacked = tp->sacked_out - prior_sacked;
+		tcp_fastretrans_alert(sk, pkts_acked, prior_sacked,
-		tcp_fastretrans_alert(sk, pkts_acked, newly_acked_sacked,
 				      is_dupack, flag);
 	}

net/ipv6/esp6.c+3−3

 	struct esp_data *esp = x->data;
 	/* skb is pure payload to encrypt */
-	err = -ENOMEM;
 	aead = esp->aead;
 	alen = crypto_aead_authsize(aead);
 	}
 	tmp = esp_alloc_tmp(aead, nfrags + sglists, seqhilen);
-	if (!tmp)
+	if (!tmp) {
+		err = -ENOMEM;
 		goto error;
+	}
 	seqhi = esp_tmp_seqhi(tmp);
 	iv = esp_tmp_iv(aead, tmp, seqhilen);

net/l2tp/l2tp_core.c+1−2

 	/* Remove from tunnel list */
 	spin_lock_bh(&pn->l2tp_tunnel_list_lock);
 	list_del_rcu(&tunnel->list);
+	kfree_rcu(tunnel, rcu);
 	spin_unlock_bh(&pn->l2tp_tunnel_list_lock);
-	synchronize_rcu();
 	atomic_dec(&l2tp_tunnel_count);
-	kfree(tunnel);
 }
 /* Create a socket for the tunnel, if one isn't set up by

net/l2tp/l2tp_core.h+1−0

@@ -163,6 +163,7 @@ struct l2tp_tunnel_cfg { · 162 unmodified lines
163		163
164	struct l2tp_tunnel {	164	struct l2tp_tunnel {
165	int magic; /* Should be L2TP_TUNNEL_MAGIC */	165	int magic; /* Should be L2TP_TUNNEL_MAGIC */
		166	struct rcu_head rcu;
166	rwlock_t hlist_lock; /* protect session_hlist */	167	rwlock_t hlist_lock; /* protect session_hlist */
167	struct hlist_head session_hlist[L2TP_HASH_SIZE];	168	struct hlist_head session_hlist[L2TP_HASH_SIZE];
168	/* hashed list of sessions,	169	/* hashed list of sessions,

net/mac80211/tx.c+16−22

 			meshhdrlen = ieee80211_new_mesh_header(&mesh_hdr,
 					sdata, NULL, NULL);
 		} else {
-			int is_mesh_mcast = 1;
+			/* DS -> MBSS (802.11-2012 13.11.3.3).
-			const u8 *mesh_da;
+			 * For unicast with unknown forwarding information,
+			 * destination might be in the MBSS or if that fails
+			 * forwarded to another mesh gate. In either case
+			 * resolution will be handled in ieee80211_xmit(), so
+			 * leave the original DA. This also works for mcast */
+			const u8 *mesh_da = skb->data;
+			if (mppath)
+				mesh_da = mppath->mpp;
+			else if (mpath)
+				mesh_da = mpath->dst;
+			rcu_read_unlock();
-			if (is_multicast_ether_addr(skb->data))
-				/* DA TA mSA AE:SA */
-				mesh_da = skb->data;
-			else {
-				static const u8 bcast[ETH_ALEN] =
-					{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
-				if (mppath) {
-					/* RA TA mDA mSA AE:DA SA */
-					mesh_da = mppath->mpp;
-					is_mesh_mcast = 0;
-				} else if (mpath) {
-					mesh_da = mpath->dst;
-					is_mesh_mcast = 0;
-				} else {
-					/* DA TA mSA AE:SA */
-					mesh_da = bcast;
-				}
-			}
 			hdrlen = ieee80211_fill_mesh_addresses(&hdr, &fc,
 					mesh_da, sdata->vif.addr);
-			rcu_read_unlock();
+			if (is_multicast_ether_addr(mesh_da))
-			if (is_mesh_mcast)
+				/* DA TA mSA AE:SA */
 				meshhdrlen =
 					ieee80211_new_mesh_header(&mesh_hdr,
 							sdata,
 							skb->data + ETH_ALEN,
 							NULL);
 			else
+				/* RA TA mDA mSA AE:DA SA */
 				meshhdrlen =
 					ieee80211_new_mesh_header(&mesh_hdr,
 							sdata,

net/netfilter/ipvs/ip_vs_ctl.c+3−1

 		goto out_err;
 	}
 	svc->stats.cpustats = alloc_percpu(struct ip_vs_cpu_stats);
-	if (!svc->stats.cpustats)
+	if (!svc->stats.cpustats) {
+		ret = -ENOMEM;
 		goto out_err;
+	}
 	/* I'm the first user of the service */
 	atomic_set(&svc->usecnt, 0);

net/netfilter/nf_conntrack_core.c+11−5

 {
 	struct nf_conn *ct = (void *)ul_conntrack;
 	struct net *net = nf_ct_net(ct);
+	struct nf_conntrack_ecache *ecache = nf_ct_ecache_find(ct);
+	BUG_ON(ecache == NULL);
 	if (nf_conntrack_event(IPCT_DESTROY, ct) < 0) {
 		/* bad luck, let's retry again */
-		ct->timeout.expires = jiffies +
+		ecache->timeout.expires = jiffies +
 			(random32() % net->ct.sysctl_events_retry_timeout);
-		add_timer(&ct->timeout);
+		add_timer(&ecache->timeout);
 		return;
 	}
 	/* we've got the event delivered, now it's dying */
 void nf_ct_insert_dying_list(struct nf_conn *ct)
 {
 	struct net *net = nf_ct_net(ct);
+	struct nf_conntrack_ecache *ecache = nf_ct_ecache_find(ct);
+	BUG_ON(ecache == NULL);
 	/* add this conntrack to the dying list */
 	spin_lock_bh(&nf_conntrack_lock);
 			     &net->ct.dying);
 	spin_unlock_bh(&nf_conntrack_lock);
 	/* set a new timer to retry event delivery */
-	setup_timer(&ct->timeout, death_by_event, (unsigned long)ct);
+	setup_timer(&ecache->timeout, death_by_event, (unsigned long)ct);
-	ct->timeout.expires = jiffies +
+	ecache->timeout.expires = jiffies +
 		(random32() % net->ct.sysctl_events_retry_timeout);
-	add_timer(&ct->timeout);
+	add_timer(&ecache->timeout);
 }
 EXPORT_SYMBOL_GPL(nf_ct_insert_dying_list);

net/netfilter/nf_conntrack_netlink.c+2−1

@@ -2790,7 +2790,8 @@ static int __init ctnetlink_init(void) · 2789 unmodified lines
2790	goto err_unreg_subsys;	2790	goto err_unreg_subsys;
2791	}	2791	}
2792		2792
2793	if (register_pernet_subsys(&ctnetlink_net_ops)) {	2793	ret = register_pernet_subsys(&ctnetlink_net_ops);
		2794	if (ret < 0) {
2794	pr_err("ctnetlink_init: cannot register pernet operations\n");	2795	pr_err("ctnetlink_init: cannot register pernet operations\n");
2795	goto err_unreg_exp_subsys;	2796	goto err_unreg_exp_subsys;
2796	}	2797	}

net/netfilter/nfnetlink_log.c+4−2

 	}
 	if (indev && skb_mac_header_was_set(skb)) {
-		if (nla_put_be32(inst->skb, NFULA_HWTYPE, htons(skb->dev->type)) ||
+		if (nla_put_be16(inst->skb, NFULA_HWTYPE, htons(skb->dev->type)) ||
 		    nla_put_be16(inst->skb, NFULA_HWLEN,
 				 htons(skb->dev->hard_header_len)) ||
 		    nla_put(inst->skb, NFULA_HWHEADER, skb->dev->hard_header_len,
 #ifdef CONFIG_PROC_FS
 	if (!proc_create("nfnetlink_log", 0440,
-			 proc_net_netfilter, &nful_file_ops))
+			 proc_net_netfilter, &nful_file_ops)) {
+		status = -ENOMEM;
 		goto cleanup_logger;
+	}
 #endif
 	return status;

net/netlink/af_netlink.c+3−1

 		dst_pid = addr->nl_pid;
 		dst_group = ffs(addr->nl_groups);
 		err =  -EPERM;
-		if (dst_group && !netlink_capable(sock, NL_NONROOT_SEND))
+		if ((dst_group || dst_pid) &&
+		    !netlink_capable(sock, NL_NONROOT_SEND))
 			goto out;
 	} else {
 		dst_pid = nlk->dst_pid;
 	rcu_assign_pointer(nl_table[NETLINK_USERSOCK].listeners, listeners);
 	nl_table[NETLINK_USERSOCK].module = THIS_MODULE;
 	nl_table[NETLINK_USERSOCK].registered = 1;
+	nl_table[NETLINK_USERSOCK].nl_nonroot = NL_NONROOT_SEND;
 	netlink_table_ungrab();
 }

net/packet/af_packet.c+1−1

@@ -1273,7 +1273,7 @@ static void __fanout_unlink(struct sock sk, struct packet_sock po) · 1272 unmodified lines
1273	spin_unlock(&f->lock);	1273	spin_unlock(&f->lock);
1274	}	1274	}
1275		1275
1276	bool match_fanout_group(struct packet_type ptype, struct sock sk)	1276	static bool match_fanout_group(struct packet_type ptype, struct sock sk)
1277	{	1277	{
1278	if (ptype->af_packet_priv == (void)((struct packet_sock )sk)->fanout)	1278	if (ptype->af_packet_priv == (void)((struct packet_sock )sk)->fanout)
1279	return true;	1279	return true;

net/socket.c+2−2

@@ -2604,7 +2604,7 @@ static int do_siocgstamp(struct net net, struct socket sock, · 2603 unmodified lines
2604	err = sock_do_ioctl(net, sock, cmd, (unsigned long)&ktv);	2604	err = sock_do_ioctl(net, sock, cmd, (unsigned long)&ktv);
2605	set_fs(old_fs);	2605	set_fs(old_fs);
2606	if (!err)	2606	if (!err)
2607	err = compat_put_timeval(up, &ktv);	2607	err = compat_put_timeval(&ktv, up);
2608		2608
2609	return err;	2609	return err;
2610	}	2610	}
@@ -2620,7 +2620,7 @@ static int do_siocgstampns(struct net net, struct socket sock, · 9 unmodified lines
2620	err = sock_do_ioctl(net, sock, cmd, (unsigned long)&kts);	2620	err = sock_do_ioctl(net, sock, cmd, (unsigned long)&kts);
2621	set_fs(old_fs);	2621	set_fs(old_fs);
2622	if (!err)	2622	if (!err)
2623	err = compat_put_timespec(up, &kts);	2623	err = compat_put_timespec(&kts, up);
2624		2624
2625	return err;	2625	return err;
2626	}	2626	}

net/sunrpc/svc_xprt.c+4−6

  */
 void svc_xprt_enqueue(struct svc_xprt *xprt)
 {
-	struct svc_serv	*serv = xprt->xpt_server;
 	struct svc_pool *pool;
 	struct svc_rqst	*rqstp;
 	int cpu;
 				rqstp, rqstp->rq_xprt);
 		rqstp->rq_xprt = xprt;
 		svc_xprt_get(xprt);
-		rqstp->rq_reserved = serv->sv_max_mesg;
-		atomic_add(rqstp->rq_reserved, &xprt->xpt_reserved);
 		pool->sp_stats.threads_woken++;
 		wake_up(&rqstp->rq_wait);
 	} else {
 	if (xprt) {
 		rqstp->rq_xprt = xprt;
 		svc_xprt_get(xprt);
-		rqstp->rq_reserved = serv->sv_max_mesg;
-		atomic_add(rqstp->rq_reserved, &xprt->xpt_reserved);
 		/* As there is a shortage of threads and this request
 		 * had to be queued, don't allow the thread to wait so
 		else
 			len = xprt->xpt_ops->xpo_recvfrom(rqstp);
 		dprintk("svc: got len=%d\n", len);
+		rqstp->rq_reserved = serv->sv_max_mesg;
+		atomic_add(rqstp->rq_reserved, &xprt->xpt_reserved);
 	}
 	svc_xprt_received(xprt);
 	/* Grab mutex to serialize outgoing data. */
 	mutex_lock(&xprt->xpt_mutex);
-	if (test_bit(XPT_DEAD, &xprt->xpt_flags))
+	if (test_bit(XPT_DEAD, &xprt->xpt_flags)
+			|| test_bit(XPT_CLOSE, &xprt->xpt_flags))
 		len = -ENOTCONN;
 	else
 		len = xprt->xpt_ops->xpo_sendto(rqstp);

net/sunrpc/svcsock.c+1−1

 	if (len >= 0)
 		svsk->sk_tcplen += len;
 	if (len != want) {
+		svc_tcp_save_pages(svsk, rqstp);
 		if (len < 0 && len != -EAGAIN)
 			goto err_other;
-		svc_tcp_save_pages(svsk, rqstp);
 		dprintk("svc: incomplete TCP record (%d of %d)\n",
 			svsk->sk_tcplen, svsk->sk_reclen);
 		goto err_noclose;

net/xfrm/xfrm_state.c+3−1

 		goto error;
 	x->outer_mode = xfrm_get_mode(x->props.mode, family);
-	if (x->outer_mode == NULL)
+	if (x->outer_mode == NULL) {
+		err = -EPROTONOSUPPORT;
 		goto error;
+	}
 	if (init_replay) {
 		err = xfrm_init_replay(x);

scripts/Makefile.fwinst+1−1

@@ -42,7 +42,7 @@ quiet_cmd_install = INSTALL $(subst $(srctree)/,,$@) · 41 unmodified lines
42	$(installed-fw-dirs):	42	$(installed-fw-dirs):
43	$(call cmd,mkdir)	43	$(call cmd,mkdir)
44		44
45	$(installed-fw): $(INSTALL_FW_PATH)/%: $(obj)/% \| $(INSTALL_FW_PATH)/$$(dir %)	45	$(installed-fw): $(INSTALL_FW_PATH)/%: $(obj)/% \| $$(dir $(INSTALL_FW_PATH)/%)
46	$(call cmd,install)	46	$(call cmd,install)
47		47
48	PHONY += __fw_install __fw_modinst FORCE	48	PHONY += __fw_install __fw_modinst FORCE

scripts/link-vmlinux.sh+1−1

@@ -211,7 +211,7 @@ if [ -n "${CONFIG_KALLSYMS}" ]; then · 210 unmodified lines
211		211
212	if ! cmp -s System.map .tmp_System.map; then	212	if ! cmp -s System.map .tmp_System.map; then
213	echo >&2 Inconsistent kallsyms data	213	echo >&2 Inconsistent kallsyms data
214	echo >&2 echo Try "make KALLSYMS_EXTRA_PASS=1" as a workaround	214	echo >&2 Try "make KALLSYMS_EXTRA_PASS=1" as a workaround
215	cleanup	215	cleanup
216	exit 1	216	exit 1
217	fi	217	fi

sound/pci/hda/hda_codec.c+8−2

 	kfree(codec);
 }
+static bool snd_hda_codec_get_supported_ps(struct hda_codec *codec,
+				hda_nid_t fg, unsigned int power_state);
 static void hda_set_power_state(struct hda_codec *codec, hda_nid_t fg,
 				unsigned int power_state);
 					   AC_VERB_GET_SUBSYSTEM_ID, 0);
 	}
+	codec->epss = snd_hda_codec_get_supported_ps(codec,
+					codec->afg ? codec->afg : codec->mfg,
+					AC_PWRST_EPSS);
 	/* power-up all before initialization */
 	hda_set_power_state(codec,
 			    codec->afg ? codec->afg : codec->mfg,
 	/* this delay seems necessary to avoid click noise at power-down */
 	if (power_state == AC_PWRST_D3) {
 		/* transition time less than 10ms for power down */
-		bool epss = snd_hda_codec_get_supported_ps(codec, fg, AC_PWRST_EPSS);
+		msleep(codec->epss ? 10 : 100);
-		msleep(epss ? 10 : 100);
 	}
 	/* repeat power states setting at most 10 times*/

sound/pci/hda/hda_codec.h+1−0

@@ -862,6 +862,7 @@ struct hda_codec { · 861 unmodified lines
862	unsigned int ignore_misc_bit:1; /* ignore MISC_NO_PRESENCE bit */	862	unsigned int ignore_misc_bit:1; /* ignore MISC_NO_PRESENCE bit */
863	unsigned int no_jack_detect:1; /* Machine has no jack-detection */	863	unsigned int no_jack_detect:1; /* Machine has no jack-detection */
864	unsigned int pcm_format_first:1; /* PCM format must be set first */	864	unsigned int pcm_format_first:1; /* PCM format must be set first */
		865	unsigned int epss:1; /* supporting EPSS? */
865	#ifdef CONFIG_SND_HDA_POWER_SAVE	866	#ifdef CONFIG_SND_HDA_POWER_SAVE
866	unsigned int power_on :1; /* current (global) power-state */	867	unsigned int power_on :1; /* current (global) power-state */
867	int power_transition; /* power-state in transition */	868	int power_transition; /* power-state in transition */

sound/pci/hda/patch_sigmatel.c+4−0

 	struct auto_pin_cfg *cfg = &spec->autocfg;
 	int i;
+	if (cfg->speaker_outs == 0)
+		return;
 	for (i = 0; i < cfg->line_outs; i++) {
 		if (presence)
 			break;
 		snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
 	}
+	codec->epss = 0; /* longer delay needed for D3 */
 	codec->no_trigger_sense = 1;
 	codec->spec = spec;

sound/usb/card.c+2−2

@@ -553,7 +553,7 @@ static void snd_usb_audio_disconnect(struct usb_device *dev, · 552 unmodified lines
553	struct snd_usb_audio *chip)	553	struct snd_usb_audio *chip)
554	{	554	{
555	struct snd_card *card;	555	struct snd_card *card;
556	struct list_head *p;	556	struct list_head p, n;
557		557
558	if (chip == (void *)-1L)	558	if (chip == (void *)-1L)
559	return;	559	return;
@@ -570,7 +570,7 @@ static void snd_usb_audio_disconnect(struct usb_device *dev, · 10 unmodified lines
570	snd_usb_stream_disconnect(p);	570	snd_usb_stream_disconnect(p);
571	}	571	}
572	/* release the endpoint resources */	572	/* release the endpoint resources */
573	list_for_each(p, &chip->ep_list) {	573	list_for_each_safe(p, n, &chip->ep_list) {
574	snd_usb_endpoint_free(p);	574	snd_usb_endpoint_free(p);
575	}	575	}
576	/* release the midi resources */	576	/* release the midi resources */

sound/usb/endpoint.c+10−14

  *
  * For implicit feedback, next_packet_size() is unused.
  */
-static int next_packet_size(struct snd_usb_endpoint *ep)
+int snd_usb_endpoint_next_packet_size(struct snd_usb_endpoint *ep)
 {
 	unsigned long flags;
 	int ret;
 		ep->retire_data_urb(ep->data_subs, urb);
 }
-static void prepare_outbound_urb_sizes(struct snd_usb_endpoint *ep,
-				       struct snd_urb_ctx *ctx)
-{
-	int i;
-	for (i = 0; i < ctx->packets; ++i)
-		ctx->packet_size[i] = next_packet_size(ep);
-}
 /*
  * Prepare a PLAYBACK urb for submission to the bus.
  */
 			goto exit_clear;
 		}
-		prepare_outbound_urb_sizes(ep, ctx);
 		prepare_outbound_urb(ep, ctx);
 	} else {
 		retire_inbound_urb(ep, ctx);
 /**
  * snd_usb_endpoint_start: start an snd_usb_endpoint
  *
- * @ep: the endpoint to start
+ * @ep:		the endpoint to start
+ * @can_sleep:	flag indicating whether the operation is executed in
+ * 		non-atomic context
  *
  * A call to this function will increment the use count of the endpoint.
  * In case it is not already running, the URBs for this endpoint will be
  *
  * Returns an error if the URB submission failed, 0 in all other cases.
  */
-int snd_usb_endpoint_start(struct snd_usb_endpoint *ep)
+int snd_usb_endpoint_start(struct snd_usb_endpoint *ep, int can_sleep)
 {
 	int err;
 	unsigned int i;
 	if (++ep->use_count != 1)
 		return 0;
+	/* just to be sure */
+	deactivate_urbs(ep, 0, can_sleep);
+	if (can_sleep)
+		wait_clear_urbs(ep);
 	ep->active_mask = 0;
 	ep->unlink_mask = 0;
 	ep->phase = 0;
 			goto __error;
 		if (usb_pipeout(ep->pipe)) {
-			prepare_outbound_urb_sizes(ep, urb->context);
 			prepare_outbound_urb(ep, urb->context);
 		} else {
 			prepare_inbound_urb(ep, urb->context);

sound/usb/endpoint.h+2−1

 				struct audioformat *fmt,
 				struct snd_usb_endpoint *sync_ep);
-int  snd_usb_endpoint_start(struct snd_usb_endpoint *ep);
+int  snd_usb_endpoint_start(struct snd_usb_endpoint *ep, int can_sleep);
 void snd_usb_endpoint_stop(struct snd_usb_endpoint *ep,
 			   int force, int can_sleep, int wait);
 int  snd_usb_endpoint_activate(struct snd_usb_endpoint *ep);
 void snd_usb_endpoint_free(struct list_head *head);
 int snd_usb_endpoint_implict_feedback_sink(struct snd_usb_endpoint *ep);
+int snd_usb_endpoint_next_packet_size(struct snd_usb_endpoint *ep);
 void snd_usb_handle_sync_urb(struct snd_usb_endpoint *ep,
 			     struct snd_usb_endpoint *sender,

sound/usb/pcm.c+52−12

 	}
 }
-static int start_endpoints(struct snd_usb_substream *subs)
+static int start_endpoints(struct snd_usb_substream *subs, int can_sleep)
 {
 	int err;
 		snd_printdd(KERN_DEBUG "Starting data EP @%p\n", ep);
 		ep->data_subs = subs;
-		err = snd_usb_endpoint_start(ep);
+		err = snd_usb_endpoint_start(ep, can_sleep);
 		if (err < 0) {
 			clear_bit(SUBSTREAM_FLAG_DATA_EP_STARTED, &subs->flags);
 			return err;
 	    !test_and_set_bit(SUBSTREAM_FLAG_SYNC_EP_STARTED, &subs->flags)) {
 		struct snd_usb_endpoint *ep = subs->sync_endpoint;
+		if (subs->data_endpoint->iface != subs->sync_endpoint->iface ||
+		    subs->data_endpoint->alt_idx != subs->sync_endpoint->alt_idx) {
+			err = usb_set_interface(subs->dev,
+						subs->sync_endpoint->iface,
+						subs->sync_endpoint->alt_idx);
+			if (err < 0) {
+				snd_printk(KERN_ERR
+					   "%d:%d:%d: cannot set interface (%d)\n",
+					   subs->dev->devnum,
+					   subs->sync_endpoint->iface,
+					   subs->sync_endpoint->alt_idx, err);
+				return -EIO;
+			}
+		}
 		snd_printdd(KERN_DEBUG "Starting sync EP @%p\n", ep);
 		ep->sync_slave = subs->data_endpoint;
-		err = snd_usb_endpoint_start(ep);
+		err = snd_usb_endpoint_start(ep, can_sleep);
 		if (err < 0) {
 			clear_bit(SUBSTREAM_FLAG_SYNC_EP_STARTED, &subs->flags);
 			return err;
 	subs->last_frame_number = 0;
 	runtime->delay = 0;
-	/* clear the pending deactivation on the target EPs */
-	deactivate_endpoints(subs);
 	/* for playback, submit the URBs now; otherwise, the first hwptr_done
 	 * updates for all URBs would happen at the same time when starting */
 	if (subs->direction == SNDRV_PCM_STREAM_PLAYBACK)
-		return start_endpoints(subs);
+		return start_endpoints(subs, 1);
 	return 0;
 }
 				 struct urb *urb)
 {
 	struct snd_pcm_runtime *runtime = subs->pcm_substream->runtime;
+	struct snd_usb_endpoint *ep = subs->data_endpoint;
 	struct snd_urb_ctx *ctx = urb->context;
 	unsigned int counts, frames, bytes;
 	int i, stride, period_elapsed = 0;
 	urb->number_of_packets = 0;
 	spin_lock_irqsave(&subs->lock, flags);
 	for (i = 0; i < ctx->packets; i++) {
-		counts = ctx->packet_size[i];
+		if (ctx->packet_size[i])
+			counts = ctx->packet_size[i];
+		else
+			counts = snd_usb_endpoint_next_packet_size(ep);
 		/* set up descriptor */
 		urb->iso_frame_desc[i].offset = frames * stride;
 		urb->iso_frame_desc[i].length = counts * stride;
 	subs->hwptr_done += bytes;
 	if (subs->hwptr_done >= runtime->buffer_size * stride)
 		subs->hwptr_done -= runtime->buffer_size * stride;
+	/* update delay with exact number of samples queued */
+	runtime->delay = subs->last_delay;
 	runtime->delay += frames;
+	subs->last_delay = runtime->delay;
+	/* realign last_frame_number */
+	subs->last_frame_number = usb_get_current_frame_number(subs->dev);
+	subs->last_frame_number &= 0xFF; /* keep 8 LSBs */
 	spin_unlock_irqrestore(&subs->lock, flags);
 	urb->transfer_buffer_length = bytes;
 	if (period_elapsed)
 	struct snd_pcm_runtime *runtime = subs->pcm_substream->runtime;
 	int stride = runtime->frame_bits >> 3;
 	int processed = urb->transfer_buffer_length / stride;
+	int est_delay;
 	spin_lock_irqsave(&subs->lock, flags);
-	if (processed > runtime->delay)
+	est_delay = snd_usb_pcm_delay(subs, runtime->rate);
-		runtime->delay = 0;
+	/* update delay with exact number of samples played */
+	if (processed > subs->last_delay)
+		subs->last_delay = 0;
 	else
-		runtime->delay -= processed;
+		subs->last_delay -= processed;
+	runtime->delay = subs->last_delay;
+	/*
+	 * Report when delay estimate is off by more than 2ms.
+	 * The error should be lower than 2ms since the estimate relies
+	 * on two reads of a counter updated every ms.
+	 */
+	if (abs(est_delay - subs->last_delay) * 1000 > runtime->rate * 2)
+		snd_printk(KERN_DEBUG "delay: estimated %d, actual %d\n",
+			est_delay, subs->last_delay);
 	spin_unlock_irqrestore(&subs->lock, flags);
 }
 	switch (cmd) {
 	case SNDRV_PCM_TRIGGER_START:
-		err = start_endpoints(subs);
+		err = start_endpoints(subs, 0);
 		if (err < 0)
 			return err;

tools/perf/util/python-ext-sources+2−0

@@ -10,10 +10,12 @@ util/ctype.c · 9 unmodified lines
10	util/evlist.c	10	util/evlist.c
11	util/evsel.c	11	util/evsel.c
12	util/cpumap.c	12	util/cpumap.c
		13	util/hweight.c
13	util/thread_map.c	14	util/thread_map.c
14	util/util.c	15	util/util.c
15	util/xyarray.c	16	util/xyarray.c
16	util/cgroup.c	17	util/cgroup.c
17	util/debugfs.c	18	util/debugfs.c
		19	util/rblist.c
18	util/strlist.c	20	util/strlist.c
19	../../lib/rbtree.c	21	../../lib/rbtree.c

virt/kvm/kvm_main.c+4−3

 			if (copy_from_user(&csigset, sigmask_arg->sigset,
 					   sizeof csigset))
 				goto out;
-		}
+			sigset_from_compat(&sigset, &csigset);
-		sigset_from_compat(&sigset, &csigset);
+			r = kvm_vcpu_ioctl_set_sigmask(vcpu, &sigset);
-		r = kvm_vcpu_ioctl_set_sigmask(vcpu, &sigset);
+		} else
+			r = kvm_vcpu_ioctl_set_sigmask(vcpu, NULL);
 		break;
 	}
 	default: